2 files changed, 78 insertions, 0 deletions

diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 7e5c6a60b8ee..5084c2f5ac20 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -1025,4 +1025,22 @@ unsigned long calc_aperfmperf_ratio(struct aperfmperf *old,
         return ratio;
 }
 
+/*
+ * AMD errata checking
+ */
+#ifdef CONFIG_CPU_SUP_AMD
+extern bool cpu_has_amd_erratum(const int *);
+
+#define AMD_LEGACY_ERRATUM(...)         { -1, __VA_ARGS__, 0 }
+#define AMD_OSVW_ERRATUM(osvw_id, ...)  { osvw_id, __VA_ARGS__, 0 }
+#define AMD_MODEL_RANGE(f, m_start, s_start, m_end, s_end) \
+        ((f << 24) | (m_start << 16) | (s_start << 12) | (m_end << 4) | (s_end))
+#define AMD_MODEL_RANGE_FAMILY(range)   (((range) >> 24) & 0xff)
+#define AMD_MODEL_RANGE_START(range)    (((range) >> 12) & 0xfff)
+#define AMD_MODEL_RANGE_END(range)      ((range) & 0xfff)
+
+#else
+#define cpu_has_amd_erratum(x)  (false)
+#endif /* CONFIG_CPU_SUP_AMD */
+
 #endif /* _ASM_X86_PROCESSOR_H */
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 12b9cff047c1..80665410b064 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -609,3 +609,63 @@ static const struct cpu_dev __cpuinitconst amd_cpu_dev = {
 };
 
 cpu_dev_register(amd_cpu_dev);
+
+/*
+ * AMD errata checking
+ *
+ * Errata are defined as arrays of ints using the AMD_LEGACY_ERRATUM() or
+ * AMD_OSVW_ERRATUM() macros. The latter is intended for newer errata that
+ * have an OSVW id assigned, which it takes as first argument. Both take a
+ * variable number of family-specific model-stepping ranges created by
+ * AMD_MODEL_RANGE(). Each erratum also has to be declared as extern const
+ * int[] in arch/x86/include/asm/processor.h.
+ *
+ * Example:
+ *
+ * const int amd_erratum_319[] =
+ *      AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0x4, 0x2),
+ *                         AMD_MODEL_RANGE(0x10, 0x8, 0x0, 0x8, 0x0),
+ *                         AMD_MODEL_RANGE(0x10, 0x9, 0x0, 0x9, 0x0));
+ */
+
+bool cpu_has_amd_erratum(const int *erratum)
+{
+        struct cpuinfo_x86 *cpu = &current_cpu_data;
+        int osvw_id = *erratum++;
+        u32 range;
+        u32 ms;
+
+        /*
+         * If called early enough that current_cpu_data hasn't been initialized
+         * yet, fall back to boot_cpu_data.
+         */
+        if (cpu->x86 == 0)
+                cpu = &boot_cpu_data;
+
+        if (cpu->x86_vendor != X86_VENDOR_AMD)
+                return false;
+
+        if (osvw_id >= 0 && osvw_id < 65536 &&
+            cpu_has(cpu, X86_FEATURE_OSVW)) {
+                u64 osvw_len;
+
+                rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, osvw_len);
+                if (osvw_id < osvw_len) {
+                        u64 osvw_bits;
+
+                        rdmsrl(MSR_AMD64_OSVW_STATUS + (osvw_id >> 6),
+                            osvw_bits);
+                        return osvw_bits & (1ULL << (osvw_id & 0x3f));
+                }
+        }
+
+        /* OSVW unavailable or ID unknown, match family-model-stepping range */
+        ms = (cpu->x86_model << 8) | cpu->x86_mask;
+        while ((range = *erratum++))
+                if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) &&
+                    (ms >= AMD_MODEL_RANGE_START(range)) &&
+                    (ms <= AMD_MODEL_RANGE_END(range)))
+                        return true;
+
+        return false;
+}