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-rw-r--r--arch/alpha/kernel/osf_sys.c6
-rw-r--r--arch/arm/Kconfig10
-rw-r--r--arch/arm/Makefile13
-rw-r--r--arch/arm/boot/Makefile10
-rw-r--r--arch/arm/boot/compressed/head.S14
-rw-r--r--arch/arm/boot/dts/at91sam9g20ek_common.dtsi4
-rw-r--r--arch/arm/boot/dts/dbx5x0.dtsi17
-rw-r--r--arch/arm/boot/dts/exynos4210-trats.dts6
-rw-r--r--arch/arm/boot/dts/imx23.dtsi1
-rw-r--r--arch/arm/boot/dts/imx28.dtsi1
-rw-r--r--arch/arm/boot/dts/omap3.dtsi4
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi4
-rw-r--r--arch/arm/common/timer-sp.c2
-rw-r--r--arch/arm/configs/imx_v6_v7_defconfig2
-rw-r--r--arch/arm/configs/mvebu_defconfig10
-rw-r--r--arch/arm/configs/versatile_defconfig1
-rw-r--r--arch/arm/include/asm/flat.h2
-rw-r--r--arch/arm/include/asm/io.h4
-rw-r--r--arch/arm/include/asm/sched_clock.h2
-rw-r--r--arch/arm/include/asm/uaccess.h4
-rw-r--r--arch/arm/include/asm/vfpmacros.h12
-rw-r--r--arch/arm/include/debug/8250_32.S27
-rw-r--r--arch/arm/include/debug/picoxcell.S18
-rw-r--r--arch/arm/include/debug/socfpga.S5
-rw-r--r--arch/arm/include/uapi/asm/hwcap.h3
-rw-r--r--arch/arm/kernel/irq.c2
-rw-r--r--arch/arm/kernel/kprobes-test-arm.c4
-rw-r--r--arch/arm/kernel/machine_kexec.c7
-rw-r--r--arch/arm/kernel/perf_event.c4
-rw-r--r--arch/arm/kernel/sched_clock.c18
-rw-r--r--arch/arm/kernel/smp.c14
-rw-r--r--arch/arm/kernel/smp_twd.c4
-rw-r--r--arch/arm/lib/delay.c1
-rw-r--r--arch/arm/mach-at91/Kconfig10
-rw-r--r--arch/arm/mach-at91/at91rm9200.c2
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c6
-rw-r--r--arch/arm/mach-at91/at91sam9260.c4
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c6
-rw-r--r--arch/arm/mach-at91/at91sam9261.c4
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c6
-rw-r--r--arch/arm/mach-at91/at91sam9263.c2
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c6
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c12
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c4
-rw-r--r--arch/arm/mach-at91/at91x40.c2
-rw-r--r--arch/arm/mach-at91/board-neocore926.c2
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c2
-rw-r--r--arch/arm/mach-at91/board-sam9263ek.c2
-rw-r--r--arch/arm/mach-at91/generic.h3
-rw-r--r--arch/arm/mach-at91/irq.c9
-rw-r--r--arch/arm/mach-at91/setup.c4
-rw-r--r--arch/arm/mach-davinci/dm644x.c3
-rw-r--r--arch/arm/mach-dove/include/mach/pm.h2
-rw-r--r--arch/arm/mach-dove/irq.c14
-rw-r--r--arch/arm/mach-exynos/common.c5
-rw-r--r--arch/arm/mach-exynos/dma.c3
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h1
-rw-r--r--arch/arm/mach-exynos/mach-exynos4-dt.c1
-rw-r--r--arch/arm/mach-highbank/system.c3
-rw-r--r--arch/arm/mach-imx/clk-busy.c2
-rw-r--r--arch/arm/mach-imx/clk-gate2.c2
-rw-r--r--arch/arm/mach-imx/clk-imx25.c4
-rw-r--r--arch/arm/mach-imx/clk-imx27.c4
-rw-r--r--arch/arm/mach-imx/ehci-imx25.c2
-rw-r--r--arch/arm/mach-imx/ehci-imx35.c2
-rw-r--r--arch/arm/mach-imx/mm-imx3.c5
-rw-r--r--arch/arm/mach-ixp4xx/common-pci.c1
-rw-r--r--arch/arm/mach-ixp4xx/common.c13
-rw-r--r--arch/arm/mach-ixp4xx/goramo_mlr.c3
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/debug-macro.S4
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h46
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/qmgr.h12
-rw-r--r--arch/arm/mach-ixp4xx/ixp4xx_npe.c9
-rw-r--r--arch/arm/mach-ixp4xx/ixp4xx_qmgr.c12
-rw-r--r--arch/arm/mach-kirkwood/pcie.c11
-rw-r--r--arch/arm/mach-omap2/Kconfig1
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c5
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c22
-rw-r--r--arch/arm/mach-omap2/clock33xx_data.c2
-rw-r--r--arch/arm/mach-omap2/clockdomains44xx_data.c2
-rw-r--r--arch/arm/mach-omap2/common-board-devices.c34
-rw-r--r--arch/arm/mach-omap2/devices.c79
-rw-r--r--arch/arm/mach-omap2/mux34xx.c8
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c63
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c36
-rw-r--r--arch/arm/mach-omap2/pm.h1
-rw-r--r--arch/arm/mach-omap2/pm34xx.c30
-rw-r--r--arch/arm/mach-omap2/serial.c5
-rw-r--r--arch/arm/mach-omap2/twl-common.c3
-rw-r--r--arch/arm/mach-omap2/vc.c2
-rw-r--r--arch/arm/mach-pxa/hx4700.c8
-rw-r--r--arch/arm/mach-pxa/spitz_pm.c8
-rw-r--r--arch/arm/mach-s3c24xx/s3c2416.c2
-rw-r--r--arch/arm/mach-s3c24xx/s3c2443.c4
-rw-r--r--arch/arm/mach-s5p64x0/common.c3
-rw-r--r--arch/arm/mach-s5pc100/common.c3
-rw-r--r--arch/arm/mach-s5pv210/common.c3
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7779.c2
-rw-r--r--arch/arm/mach-spear13xx/include/mach/spear1310_misc_regs.h0
-rw-r--r--arch/arm/mach-spear13xx/include/mach/spear1340_misc_regs.h0
-rw-r--r--arch/arm/mach-ux500/cpu.c1
-rw-r--r--arch/arm/mm/alignment.c6
-rw-r--r--arch/arm/mm/dma-mapping.c2
-rw-r--r--arch/arm/mm/proc-v6.S2
-rw-r--r--arch/arm/mm/vmregion.h1
-rw-r--r--arch/arm/plat-mxc/devices/platform-mxc-mmc.c2
-rw-r--r--arch/arm/plat-omap/Kconfig1
-rw-r--r--arch/arm/plat-omap/i2c.c21
-rw-r--r--arch/arm/plat-omap/include/plat/omap-serial.h4
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h6
-rw-r--r--arch/arm/plat-s3c24xx/dma.c9
-rw-r--r--arch/arm/plat-samsung/include/plat/spi-core.h30
-rw-r--r--arch/arm/tools/Makefile2
-rw-r--r--arch/arm/vfp/vfpmodule.c9
-rw-r--r--arch/arm/xen/enlighten.c11
-rw-r--r--arch/arm/xen/hypercall.S14
-rw-r--r--arch/arm64/Kconfig1
-rw-r--r--arch/arm64/include/asm/elf.h5
-rw-r--r--arch/arm64/include/asm/fpsimd.h5
-rw-r--r--arch/arm64/include/asm/io.h10
-rw-r--r--arch/arm64/include/asm/pgtable-hwdef.h6
-rw-r--r--arch/arm64/include/asm/pgtable.h40
-rw-r--r--arch/arm64/include/asm/processor.h2
-rw-r--r--arch/arm64/include/asm/unistd.h1
-rw-r--r--arch/arm64/include/asm/unistd32.h2
-rw-r--r--arch/arm64/kernel/perf_event.c10
-rw-r--r--arch/arm64/kernel/process.c18
-rw-r--r--arch/arm64/kernel/smp.c3
-rw-r--r--arch/arm64/mm/init.c2
-rw-r--r--arch/c6x/include/asm/setup.h33
-rw-r--r--arch/c6x/include/uapi/asm/Kbuild2
-rw-r--r--arch/c6x/include/uapi/asm/kvm_para.h1
-rw-r--r--arch/c6x/include/uapi/asm/setup.h33
-rw-r--r--arch/c6x/kernel/entry.S5
-rw-r--r--arch/frv/Kconfig1
-rw-r--r--arch/frv/boot/Makefile10
-rw-r--r--arch/frv/include/asm/unistd.h1
-rw-r--r--arch/frv/kernel/entry.S28
-rw-r--r--arch/frv/kernel/process.c5
-rw-r--r--arch/frv/mb93090-mb00/pci-dma-nommu.c1
-rw-r--r--arch/h8300/include/asm/cache.h3
-rw-r--r--arch/ia64/mm/init.c1
-rw-r--r--arch/m68k/include/asm/signal.h6
-rw-r--r--arch/microblaze/kernel/signal.c2
-rw-r--r--arch/mips/cavium-octeon/executive/cvmx-l2c.c1
-rw-r--r--arch/mips/fw/arc/misc.c1
-rw-r--r--arch/mips/include/asm/bitops.h128
-rw-r--r--arch/mips/include/asm/compat.h2
-rw-r--r--arch/mips/include/asm/hugetlb.h12
-rw-r--r--arch/mips/include/asm/io.h1
-rw-r--r--arch/mips/include/asm/irqflags.h207
-rw-r--r--arch/mips/include/asm/thread_info.h6
-rw-r--r--arch/mips/kernel/cpu-probe.c1
-rw-r--r--arch/mips/kernel/entry.S7
-rw-r--r--arch/mips/kernel/scall64-n32.S6
-rw-r--r--arch/mips/kernel/setup.c26
-rw-r--r--arch/mips/lib/Makefile5
-rw-r--r--arch/mips/lib/bitops.c179
-rw-r--r--arch/mips/lib/mips-atomic.c176
-rw-r--r--arch/mips/mm/tlb-r4k.c18
-rw-r--r--arch/mips/mti-malta/malta-platform.c3
-rw-r--r--arch/openrisc/kernel/signal.c6
-rw-r--r--arch/parisc/kernel/signal32.c6
-rw-r--r--arch/parisc/kernel/sys_parisc.c2
-rw-r--r--arch/parisc/kernel/syscall_table.S2
-rw-r--r--arch/powerpc/boot/dts/mpc5200b.dtsi6
-rw-r--r--arch/powerpc/boot/dts/o2d.dtsi6
-rw-r--r--arch/powerpc/boot/dts/pcm030.dts7
-rw-r--r--arch/powerpc/kernel/signal.c4
-rw-r--r--arch/powerpc/kernel/uprobes.c6
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_pic.c9
-rw-r--r--arch/powerpc/platforms/pseries/eeh_pe.c2
-rw-r--r--arch/powerpc/platforms/pseries/msi.c3
-rw-r--r--arch/s390/Kconfig1
-rw-r--r--arch/s390/include/asm/cio.h2
-rw-r--r--arch/s390/include/asm/compat.h2
-rw-r--r--arch/s390/include/asm/pgtable.h35
-rw-r--r--arch/s390/include/asm/topology.h3
-rw-r--r--arch/s390/include/uapi/asm/ptrace.h4
-rw-r--r--arch/s390/kernel/compat_signal.c14
-rw-r--r--arch/s390/kernel/compat_wrapper.S2
-rw-r--r--arch/s390/kernel/sclp.S8
-rw-r--r--arch/s390/kernel/signal.c14
-rw-r--r--arch/s390/kernel/topology.c6
-rw-r--r--arch/s390/lib/uaccess_pt.c2
-rw-r--r--arch/s390/mm/gup.c7
-rw-r--r--arch/score/kernel/signal.c7
-rw-r--r--arch/sh/kernel/signal_64.c6
-rw-r--r--arch/sparc/Kconfig1
-rw-r--r--arch/sparc/boot/piggyback.c12
-rw-r--r--arch/sparc/crypto/Makefile16
-rw-r--r--arch/sparc/crypto/aes_glue.c2
-rw-r--r--arch/sparc/crypto/camellia_glue.c2
-rw-r--r--arch/sparc/crypto/crc32c_glue.c2
-rw-r--r--arch/sparc/crypto/des_glue.c2
-rw-r--r--arch/sparc/crypto/md5_glue.c2
-rw-r--r--arch/sparc/crypto/sha1_glue.c2
-rw-r--r--arch/sparc/crypto/sha256_glue.c2
-rw-r--r--arch/sparc/crypto/sha512_glue.c2
-rw-r--r--arch/sparc/include/asm/atomic_64.h4
-rw-r--r--arch/sparc/include/asm/backoff.h69
-rw-r--r--arch/sparc/include/asm/compat.h5
-rw-r--r--arch/sparc/include/asm/processor_64.h17
-rw-r--r--arch/sparc/include/asm/prom.h8
-rw-r--r--arch/sparc/include/asm/thread_info_64.h5
-rw-r--r--arch/sparc/include/asm/ttable.h24
-rw-r--r--arch/sparc/include/uapi/asm/unistd.h7
-rw-r--r--arch/sparc/kernel/entry.h7
-rw-r--r--arch/sparc/kernel/leon_kernel.c6
-rw-r--r--arch/sparc/kernel/perf_event.c22
-rw-r--r--arch/sparc/kernel/process_64.c42
-rw-r--r--arch/sparc/kernel/ptrace_64.c4
-rw-r--r--arch/sparc/kernel/setup_64.c21
-rw-r--r--arch/sparc/kernel/signal_64.c4
-rw-r--r--arch/sparc/kernel/sys32.S2
-rw-r--r--arch/sparc/kernel/sys_sparc_64.c5
-rw-r--r--arch/sparc/kernel/syscalls.S14
-rw-r--r--arch/sparc/kernel/systbls_32.S1
-rw-r--r--arch/sparc/kernel/systbls_64.S4
-rw-r--r--arch/sparc/kernel/unaligned_64.c36
-rw-r--r--arch/sparc/kernel/visemul.c23
-rw-r--r--arch/sparc/kernel/vmlinux.lds.S5
-rw-r--r--arch/sparc/kernel/winfixup.S2
-rw-r--r--arch/sparc/lib/atomic_64.S16
-rw-r--r--arch/sparc/lib/ksyms.c1
-rw-r--r--arch/sparc/math-emu/math_64.c2
-rw-r--r--arch/um/kernel/exec.c3
-rw-r--r--arch/unicore32/Kconfig7
-rw-r--r--arch/unicore32/include/asm/Kbuild1
-rw-r--r--arch/unicore32/include/asm/bug.h5
-rw-r--r--arch/unicore32/include/asm/cmpxchg.h2
-rw-r--r--arch/unicore32/include/asm/kvm_para.h1
-rw-r--r--arch/unicore32/include/asm/processor.h5
-rw-r--r--arch/unicore32/include/asm/ptrace.h76
-rw-r--r--arch/unicore32/include/uapi/asm/Kbuild7
-rw-r--r--arch/unicore32/include/uapi/asm/byteorder.h (renamed from arch/unicore32/include/asm/byteorder.h)0
-rw-r--r--arch/unicore32/include/uapi/asm/ptrace.h90
-rw-r--r--arch/unicore32/include/uapi/asm/sigcontext.h (renamed from arch/unicore32/include/asm/sigcontext.h)0
-rw-r--r--arch/unicore32/include/uapi/asm/unistd.h (renamed from arch/unicore32/include/asm/unistd.h)1
-rw-r--r--arch/unicore32/kernel/entry.S20
-rw-r--r--arch/unicore32/kernel/process.c58
-rw-r--r--arch/unicore32/kernel/setup.h6
-rw-r--r--arch/unicore32/kernel/sys.c63
-rw-r--r--arch/unicore32/mm/fault.c37
-rw-r--r--arch/x86/boot/compressed/eboot.c2
-rw-r--r--arch/x86/boot/header.S3
-rw-r--r--arch/x86/include/asm/Kbuild3
-rw-r--r--arch/x86/include/asm/efi.h6
-rw-r--r--arch/x86/include/asm/fpu-internal.h15
-rw-r--r--arch/x86/include/asm/ptrace.h15
-rw-r--r--arch/x86/include/asm/xen/hypercall.h21
-rw-r--r--arch/x86/include/asm/xen/hypervisor.h1
-rw-r--r--arch/x86/kernel/apic/io_apic.c3
-rw-r--r--arch/x86/kernel/cpu/amd.c14
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_amd.c2
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_intel.c31
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel_uncore.c45
-rw-r--r--arch/x86/kernel/cpu/perf_event_knc.c93
-rw-r--r--arch/x86/kernel/cpu/perf_event_p6.c127
-rw-r--r--arch/x86/kernel/e820.c3
-rw-r--r--arch/x86/kernel/entry_64.S14
-rw-r--r--arch/x86/kernel/head_32.S9
-rw-r--r--arch/x86/kernel/microcode_amd.c8
-rw-r--r--arch/x86/kernel/ptrace.c37
-rw-r--r--arch/x86/kernel/setup.c27
-rw-r--r--arch/x86/kernel/smpboot.c5
-rw-r--r--arch/x86/kernel/uprobes.c54
-rw-r--r--arch/x86/kvm/cpuid.h3
-rw-r--r--arch/x86/kvm/emulate.c3
-rw-r--r--arch/x86/kvm/vmx.c11
-rw-r--r--arch/x86/kvm/x86.c63
-rw-r--r--arch/x86/mm/init.c58
-rw-r--r--arch/x86/mm/init_64.c7
-rw-r--r--arch/x86/mm/tlb.c2
-rw-r--r--arch/x86/pci/ce4100.c13
-rw-r--r--arch/x86/platform/ce4100/ce4100.c24
-rw-r--r--arch/x86/platform/efi/efi.c47
-rw-r--r--arch/x86/platform/efi/efi_64.c7
-rw-r--r--arch/x86/xen/mmu.c21
-rw-r--r--arch/xtensa/Kconfig2
-rw-r--r--arch/xtensa/include/asm/io.h4
-rw-r--r--arch/xtensa/include/asm/processor.h4
-rw-r--r--arch/xtensa/include/asm/syscall.h2
-rw-r--r--arch/xtensa/include/asm/unistd.h15
-rw-r--r--arch/xtensa/include/uapi/asm/unistd.h16
-rw-r--r--arch/xtensa/kernel/entry.S57
-rw-r--r--arch/xtensa/kernel/process.c128
-rw-r--r--arch/xtensa/kernel/syscall.c7
-rw-r--r--arch/xtensa/kernel/xtensa_ksyms.c1
289 files changed, 2519 insertions, 1418 deletions
diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c
index 1e6956a90608..14db93e4c8a8 100644
--- a/arch/alpha/kernel/osf_sys.c
+++ b/arch/alpha/kernel/osf_sys.c
@@ -445,7 +445,7 @@ struct procfs_args {
445 * unhappy with OSF UFS. [CHECKME] 445 * unhappy with OSF UFS. [CHECKME]
446 */ 446 */
447static int 447static int
448osf_ufs_mount(char *dirname, struct ufs_args __user *args, int flags) 448osf_ufs_mount(const char *dirname, struct ufs_args __user *args, int flags)
449{ 449{
450 int retval; 450 int retval;
451 struct cdfs_args tmp; 451 struct cdfs_args tmp;
@@ -465,7 +465,7 @@ osf_ufs_mount(char *dirname, struct ufs_args __user *args, int flags)
465} 465}
466 466
467static int 467static int
468osf_cdfs_mount(char *dirname, struct cdfs_args __user *args, int flags) 468osf_cdfs_mount(const char *dirname, struct cdfs_args __user *args, int flags)
469{ 469{
470 int retval; 470 int retval;
471 struct cdfs_args tmp; 471 struct cdfs_args tmp;
@@ -485,7 +485,7 @@ osf_cdfs_mount(char *dirname, struct cdfs_args __user *args, int flags)
485} 485}
486 486
487static int 487static int
488osf_procfs_mount(char *dirname, struct procfs_args __user *args, int flags) 488osf_procfs_mount(const char *dirname, struct procfs_args __user *args, int flags)
489{ 489{
490 struct procfs_args tmp; 490 struct procfs_args tmp;
491 491
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 73067efd4845..9759fec0b704 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -547,6 +547,7 @@ config ARCH_KIRKWOOD
547 select CPU_FEROCEON 547 select CPU_FEROCEON
548 select GENERIC_CLOCKEVENTS 548 select GENERIC_CLOCKEVENTS
549 select PCI 549 select PCI
550 select PCI_QUIRKS
550 select PLAT_ORION_LEGACY 551 select PLAT_ORION_LEGACY
551 help 552 help
552 Support for the following Marvell Kirkwood series SoCs: 553 Support for the following Marvell Kirkwood series SoCs:
@@ -1603,8 +1604,8 @@ config NR_CPUS
1603 default "4" 1604 default "4"
1604 1605
1605config HOTPLUG_CPU 1606config HOTPLUG_CPU
1606 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" 1607 bool "Support for hot-pluggable CPUs"
1607 depends on SMP && HOTPLUG && EXPERIMENTAL 1608 depends on SMP && HOTPLUG
1608 help 1609 help
1609 Say Y here to experiment with turning CPUs off and on. CPUs 1610 Say Y here to experiment with turning CPUs off and on. CPUs
1610 can be controlled through /sys/devices/system/cpu. 1611 can be controlled through /sys/devices/system/cpu.
@@ -1645,8 +1646,8 @@ config HZ
1645 default 100 1646 default 100
1646 1647
1647config THUMB2_KERNEL 1648config THUMB2_KERNEL
1648 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)" 1649 bool "Compile the kernel in Thumb-2 mode"
1649 depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL 1650 depends on CPU_V7 && !CPU_V6 && !CPU_V6K
1650 select AEABI 1651 select AEABI
1651 select ARM_ASM_UNIFIED 1652 select ARM_ASM_UNIFIED
1652 select ARM_UNWIND 1653 select ARM_UNWIND
@@ -1850,6 +1851,7 @@ config XEN_DOM0
1850config XEN 1851config XEN
1851 bool "Xen guest support on ARM (EXPERIMENTAL)" 1852 bool "Xen guest support on ARM (EXPERIMENTAL)"
1852 depends on EXPERIMENTAL && ARM && OF 1853 depends on EXPERIMENTAL && ARM && OF
1854 depends on CPU_V7 && !CPU_V6
1853 help 1855 help
1854 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM. 1856 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1855 1857
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index f023e3acdfbd..5f914fca911b 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -21,8 +21,6 @@ endif
21OBJCOPYFLAGS :=-O binary -R .comment -S 21OBJCOPYFLAGS :=-O binary -R .comment -S
22GZFLAGS :=-9 22GZFLAGS :=-9
23#KBUILD_CFLAGS +=-pipe 23#KBUILD_CFLAGS +=-pipe
24# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb:
25KBUILD_CFLAGS +=$(call cc-option,-marm,)
26 24
27# Never generate .eh_frame 25# Never generate .eh_frame
28KBUILD_CFLAGS += $(call cc-option,-fno-dwarf2-cfi-asm) 26KBUILD_CFLAGS += $(call cc-option,-fno-dwarf2-cfi-asm)
@@ -105,17 +103,20 @@ endif
105ifeq ($(CONFIG_THUMB2_KERNEL),y) 103ifeq ($(CONFIG_THUMB2_KERNEL),y)
106AFLAGS_AUTOIT :=$(call as-option,-Wa$(comma)-mimplicit-it=always,-Wa$(comma)-mauto-it) 104AFLAGS_AUTOIT :=$(call as-option,-Wa$(comma)-mimplicit-it=always,-Wa$(comma)-mauto-it)
107AFLAGS_NOWARN :=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W) 105AFLAGS_NOWARN :=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W)
108CFLAGS_THUMB2 :=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN) 106CFLAGS_ISA :=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN)
109AFLAGS_THUMB2 :=$(CFLAGS_THUMB2) -Wa$(comma)-mthumb 107AFLAGS_ISA :=$(CFLAGS_ISA) -Wa$(comma)-mthumb
110# Work around buggy relocation from gas if requested: 108# Work around buggy relocation from gas if requested:
111ifeq ($(CONFIG_THUMB2_AVOID_R_ARM_THM_JUMP11),y) 109ifeq ($(CONFIG_THUMB2_AVOID_R_ARM_THM_JUMP11),y)
112CFLAGS_MODULE +=-fno-optimize-sibling-calls 110CFLAGS_MODULE +=-fno-optimize-sibling-calls
113endif 111endif
112else
113CFLAGS_ISA :=$(call cc-option,-marm,)
114AFLAGS_ISA :=$(CFLAGS_ISA)
114endif 115endif
115 116
116# Need -Uarm for gcc < 3.x 117# Need -Uarm for gcc < 3.x
117KBUILD_CFLAGS +=$(CFLAGS_ABI) $(CFLAGS_THUMB2) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm 118KBUILD_CFLAGS +=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm
118KBUILD_AFLAGS +=$(CFLAGS_ABI) $(AFLAGS_THUMB2) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float 119KBUILD_AFLAGS +=$(CFLAGS_ABI) $(AFLAGS_ISA) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float
119 120
120CHECKFLAGS += -D__arm__ 121CHECKFLAGS += -D__arm__
121 122
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
index 3fdab016aa5c..9137df539b61 100644
--- a/arch/arm/boot/Makefile
+++ b/arch/arm/boot/Makefile
@@ -33,7 +33,7 @@ ifeq ($(CONFIG_XIP_KERNEL),y)
33 33
34$(obj)/xipImage: vmlinux FORCE 34$(obj)/xipImage: vmlinux FORCE
35 $(call if_changed,objcopy) 35 $(call if_changed,objcopy)
36 @echo ' Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))' 36 @$(kecho) ' Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))'
37 37
38$(obj)/Image $(obj)/zImage: FORCE 38$(obj)/Image $(obj)/zImage: FORCE
39 @echo 'Kernel configured for XIP (CONFIG_XIP_KERNEL=y)' 39 @echo 'Kernel configured for XIP (CONFIG_XIP_KERNEL=y)'
@@ -48,14 +48,14 @@ $(obj)/xipImage: FORCE
48 48
49$(obj)/Image: vmlinux FORCE 49$(obj)/Image: vmlinux FORCE
50 $(call if_changed,objcopy) 50 $(call if_changed,objcopy)
51 @echo ' Kernel: $@ is ready' 51 @$(kecho) ' Kernel: $@ is ready'
52 52
53$(obj)/compressed/vmlinux: $(obj)/Image FORCE 53$(obj)/compressed/vmlinux: $(obj)/Image FORCE
54 $(Q)$(MAKE) $(build)=$(obj)/compressed $@ 54 $(Q)$(MAKE) $(build)=$(obj)/compressed $@
55 55
56$(obj)/zImage: $(obj)/compressed/vmlinux FORCE 56$(obj)/zImage: $(obj)/compressed/vmlinux FORCE
57 $(call if_changed,objcopy) 57 $(call if_changed,objcopy)
58 @echo ' Kernel: $@ is ready' 58 @$(kecho) ' Kernel: $@ is ready'
59 59
60endif 60endif
61 61
@@ -90,7 +90,7 @@ fi
90$(obj)/uImage: $(obj)/zImage FORCE 90$(obj)/uImage: $(obj)/zImage FORCE
91 @$(check_for_multiple_loadaddr) 91 @$(check_for_multiple_loadaddr)
92 $(call if_changed,uimage) 92 $(call if_changed,uimage)
93 @echo ' Image $@ is ready' 93 @$(kecho) ' Image $@ is ready'
94 94
95$(obj)/bootp/bootp: $(obj)/zImage initrd FORCE 95$(obj)/bootp/bootp: $(obj)/zImage initrd FORCE
96 $(Q)$(MAKE) $(build)=$(obj)/bootp $@ 96 $(Q)$(MAKE) $(build)=$(obj)/bootp $@
@@ -98,7 +98,7 @@ $(obj)/bootp/bootp: $(obj)/zImage initrd FORCE
98 98
99$(obj)/bootpImage: $(obj)/bootp/bootp FORCE 99$(obj)/bootpImage: $(obj)/bootp/bootp FORCE
100 $(call if_changed,objcopy) 100 $(call if_changed,objcopy)
101 @echo ' Kernel: $@ is ready' 101 @$(kecho) ' Kernel: $@ is ready'
102 102
103PHONY += initrd FORCE 103PHONY += initrd FORCE
104initrd: 104initrd:
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 90275f036cd1..49ca86e37b8d 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -652,6 +652,15 @@ __setup_mmu: sub r3, r4, #16384 @ Page directory size
652 mov pc, lr 652 mov pc, lr
653ENDPROC(__setup_mmu) 653ENDPROC(__setup_mmu)
654 654
655@ Enable unaligned access on v6, to allow better code generation
656@ for the decompressor C code:
657__armv6_mmu_cache_on:
658 mrc p15, 0, r0, c1, c0, 0 @ read SCTLR
659 bic r0, r0, #2 @ A (no unaligned access fault)
660 orr r0, r0, #1 << 22 @ U (v6 unaligned access model)
661 mcr p15, 0, r0, c1, c0, 0 @ write SCTLR
662 b __armv4_mmu_cache_on
663
655__arm926ejs_mmu_cache_on: 664__arm926ejs_mmu_cache_on:
656#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH 665#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
657 mov r0, #4 @ put dcache in WT mode 666 mov r0, #4 @ put dcache in WT mode
@@ -694,6 +703,9 @@ __armv7_mmu_cache_on:
694 bic r0, r0, #1 << 28 @ clear SCTLR.TRE 703 bic r0, r0, #1 << 28 @ clear SCTLR.TRE
695 orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement 704 orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement
696 orr r0, r0, #0x003c @ write buffer 705 orr r0, r0, #0x003c @ write buffer
706 bic r0, r0, #2 @ A (no unaligned access fault)
707 orr r0, r0, #1 << 22 @ U (v6 unaligned access model)
708 @ (needed for ARM1176)
697#ifdef CONFIG_MMU 709#ifdef CONFIG_MMU
698#ifdef CONFIG_CPU_ENDIAN_BE8 710#ifdef CONFIG_CPU_ENDIAN_BE8
699 orr r0, r0, #1 << 25 @ big-endian page tables 711 orr r0, r0, #1 << 25 @ big-endian page tables
@@ -914,7 +926,7 @@ proc_types:
914 926
915 .word 0x0007b000 @ ARMv6 927 .word 0x0007b000 @ ARMv6
916 .word 0x000ff000 928 .word 0x000ff000
917 W(b) __armv4_mmu_cache_on 929 W(b) __armv6_mmu_cache_on
918 W(b) __armv4_mmu_cache_off 930 W(b) __armv4_mmu_cache_off
919 W(b) __armv6_mmu_cache_flush 931 W(b) __armv6_mmu_cache_flush
920 932
diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
index b06c0db273b1..e6391a4e6649 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
@@ -126,14 +126,14 @@
126 #size-cells = <0>; 126 #size-cells = <0>;
127 127
128 btn3 { 128 btn3 {
129 label = "Buttin 3"; 129 label = "Button 3";
130 gpios = <&pioA 30 1>; 130 gpios = <&pioA 30 1>;
131 linux,code = <0x103>; 131 linux,code = <0x103>;
132 gpio-key,wakeup; 132 gpio-key,wakeup;
133 }; 133 };
134 134
135 btn4 { 135 btn4 {
136 label = "Buttin 4"; 136 label = "Button 4";
137 gpios = <&pioA 31 1>; 137 gpios = <&pioA 31 1>;
138 linux,code = <0x104>; 138 linux,code = <0x104>;
139 gpio-key,wakeup; 139 gpio-key,wakeup;
diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi
index 748ba7aa746c..4b0e0ca08f40 100644
--- a/arch/arm/boot/dts/dbx5x0.dtsi
+++ b/arch/arm/boot/dts/dbx5x0.dtsi
@@ -483,6 +483,8 @@
483 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; 483 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
484 reg = <0x80004000 0x1000>; 484 reg = <0x80004000 0x1000>;
485 interrupts = <0 21 0x4>; 485 interrupts = <0 21 0x4>;
486 arm,primecell-periphid = <0x180024>;
487
486 #address-cells = <1>; 488 #address-cells = <1>;
487 #size-cells = <0>; 489 #size-cells = <0>;
488 v-i2c-supply = <&db8500_vape_reg>; 490 v-i2c-supply = <&db8500_vape_reg>;
@@ -494,6 +496,8 @@
494 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; 496 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
495 reg = <0x80122000 0x1000>; 497 reg = <0x80122000 0x1000>;
496 interrupts = <0 22 0x4>; 498 interrupts = <0 22 0x4>;
499 arm,primecell-periphid = <0x180024>;
500
497 #address-cells = <1>; 501 #address-cells = <1>;
498 #size-cells = <0>; 502 #size-cells = <0>;
499 v-i2c-supply = <&db8500_vape_reg>; 503 v-i2c-supply = <&db8500_vape_reg>;
@@ -505,6 +509,8 @@
505 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; 509 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
506 reg = <0x80128000 0x1000>; 510 reg = <0x80128000 0x1000>;
507 interrupts = <0 55 0x4>; 511 interrupts = <0 55 0x4>;
512 arm,primecell-periphid = <0x180024>;
513
508 #address-cells = <1>; 514 #address-cells = <1>;
509 #size-cells = <0>; 515 #size-cells = <0>;
510 v-i2c-supply = <&db8500_vape_reg>; 516 v-i2c-supply = <&db8500_vape_reg>;
@@ -516,6 +522,8 @@
516 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; 522 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
517 reg = <0x80110000 0x1000>; 523 reg = <0x80110000 0x1000>;
518 interrupts = <0 12 0x4>; 524 interrupts = <0 12 0x4>;
525 arm,primecell-periphid = <0x180024>;
526
519 #address-cells = <1>; 527 #address-cells = <1>;
520 #size-cells = <0>; 528 #size-cells = <0>;
521 v-i2c-supply = <&db8500_vape_reg>; 529 v-i2c-supply = <&db8500_vape_reg>;
@@ -527,6 +535,8 @@
527 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; 535 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
528 reg = <0x8012a000 0x1000>; 536 reg = <0x8012a000 0x1000>;
529 interrupts = <0 51 0x4>; 537 interrupts = <0 51 0x4>;
538 arm,primecell-periphid = <0x180024>;
539
530 #address-cells = <1>; 540 #address-cells = <1>;
531 #size-cells = <0>; 541 #size-cells = <0>;
532 v-i2c-supply = <&db8500_vape_reg>; 542 v-i2c-supply = <&db8500_vape_reg>;
@@ -573,33 +583,38 @@
573 interrupts = <0 60 0x4>; 583 interrupts = <0 60 0x4>;
574 status = "disabled"; 584 status = "disabled";
575 }; 585 };
586
576 sdi@80118000 { 587 sdi@80118000 {
577 compatible = "arm,pl18x", "arm,primecell"; 588 compatible = "arm,pl18x", "arm,primecell";
578 reg = <0x80118000 0x1000>; 589 reg = <0x80118000 0x1000>;
579 interrupts = <0 50 0x4>; 590 interrupts = <0 50 0x4>;
580 status = "disabled"; 591 status = "disabled";
581 }; 592 };
593
582 sdi@80005000 { 594 sdi@80005000 {
583 compatible = "arm,pl18x", "arm,primecell"; 595 compatible = "arm,pl18x", "arm,primecell";
584 reg = <0x80005000 0x1000>; 596 reg = <0x80005000 0x1000>;
585 interrupts = <0 41 0x4>; 597 interrupts = <0 41 0x4>;
586 status = "disabled"; 598 status = "disabled";
587 }; 599 };
600
588 sdi@80119000 { 601 sdi@80119000 {
589 compatible = "arm,pl18x", "arm,primecell"; 602 compatible = "arm,pl18x", "arm,primecell";
590 reg = <0x80119000 0x1000>; 603 reg = <0x80119000 0x1000>;
591 interrupts = <0 59 0x4>; 604 interrupts = <0 59 0x4>;
592 status = "disabled"; 605 status = "disabled";
593 }; 606 };
607
594 sdi@80114000 { 608 sdi@80114000 {
595 compatible = "arm,pl18x", "arm,primecell"; 609 compatible = "arm,pl18x", "arm,primecell";
596 reg = <0x80114000 0x1000>; 610 reg = <0x80114000 0x1000>;
597 interrupts = <0 99 0x4>; 611 interrupts = <0 99 0x4>;
598 status = "disabled"; 612 status = "disabled";
599 }; 613 };
614
600 sdi@80008000 { 615 sdi@80008000 {
601 compatible = "arm,pl18x", "arm,primecell"; 616 compatible = "arm,pl18x", "arm,primecell";
602 reg = <0x80114000 0x1000>; 617 reg = <0x80008000 0x1000>;
603 interrupts = <0 100 0x4>; 618 interrupts = <0 100 0x4>;
604 status = "disabled"; 619 status = "disabled";
605 }; 620 };
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index 73567b843e72..a21511c14071 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -20,8 +20,10 @@
20 compatible = "samsung,trats", "samsung,exynos4210"; 20 compatible = "samsung,trats", "samsung,exynos4210";
21 21
22 memory { 22 memory {
23 reg = <0x40000000 0x20000000 23 reg = <0x40000000 0x10000000
24 0x60000000 0x20000000>; 24 0x50000000 0x10000000
25 0x60000000 0x10000000
26 0x70000000 0x10000000>;
25 }; 27 };
26 28
27 chosen { 29 chosen {
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index 9ca4ca70c1bc..6d31aa383460 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -69,6 +69,7 @@
69 interrupts = <13>, <56>; 69 interrupts = <13>, <56>;
70 interrupt-names = "gpmi-dma", "bch"; 70 interrupt-names = "gpmi-dma", "bch";
71 clocks = <&clks 34>; 71 clocks = <&clks 34>;
72 clock-names = "gpmi_io";
72 fsl,gpmi-dma-channel = <4>; 73 fsl,gpmi-dma-channel = <4>;
73 status = "disabled"; 74 status = "disabled";
74 }; 75 };
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index e16d63155480..55c57ea6169e 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -85,6 +85,7 @@
85 interrupts = <88>, <41>; 85 interrupts = <88>, <41>;
86 interrupt-names = "gpmi-dma", "bch"; 86 interrupt-names = "gpmi-dma", "bch";
87 clocks = <&clks 50>; 87 clocks = <&clks 50>;
88 clock-names = "gpmi_io";
88 fsl,gpmi-dma-channel = <4>; 89 fsl,gpmi-dma-channel = <4>;
89 status = "disabled"; 90 status = "disabled";
90 }; 91 };
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index f38ea8771b44..696e929d0304 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -257,7 +257,7 @@
257 interrupt-names = "common", "tx", "rx", "sidetone"; 257 interrupt-names = "common", "tx", "rx", "sidetone";
258 interrupt-parent = <&intc>; 258 interrupt-parent = <&intc>;
259 ti,buffer-size = <1280>; 259 ti,buffer-size = <1280>;
260 ti,hwmods = "mcbsp2"; 260 ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
261 }; 261 };
262 262
263 mcbsp3: mcbsp@49024000 { 263 mcbsp3: mcbsp@49024000 {
@@ -272,7 +272,7 @@
272 interrupt-names = "common", "tx", "rx", "sidetone"; 272 interrupt-names = "common", "tx", "rx", "sidetone";
273 interrupt-parent = <&intc>; 273 interrupt-parent = <&intc>;
274 ti,buffer-size = <128>; 274 ti,buffer-size = <128>;
275 ti,hwmods = "mcbsp3"; 275 ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
276 }; 276 };
277 277
278 mcbsp4: mcbsp@49026000 { 278 mcbsp4: mcbsp@49026000 {
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index b1497c7d7d68..df7f2270fc91 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -73,8 +73,8 @@
73 73
74 pinmux: pinmux { 74 pinmux: pinmux {
75 compatible = "nvidia,tegra30-pinmux"; 75 compatible = "nvidia,tegra30-pinmux";
76 reg = <0x70000868 0xd0 /* Pad control registers */ 76 reg = <0x70000868 0xd4 /* Pad control registers */
77 0x70003000 0x3e0>; /* Mux registers */ 77 0x70003000 0x3e4>; /* Mux registers */
78 }; 78 };
79 79
80 serial@70006000 { 80 serial@70006000 {
diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c
index df13a3ffff35..9d2d3ba339ff 100644
--- a/arch/arm/common/timer-sp.c
+++ b/arch/arm/common/timer-sp.c
@@ -162,7 +162,6 @@ static struct clock_event_device sp804_clockevent = {
162 .set_mode = sp804_set_mode, 162 .set_mode = sp804_set_mode,
163 .set_next_event = sp804_set_next_event, 163 .set_next_event = sp804_set_next_event,
164 .rating = 300, 164 .rating = 300,
165 .cpumask = cpu_all_mask,
166}; 165};
167 166
168static struct irqaction sp804_timer_irq = { 167static struct irqaction sp804_timer_irq = {
@@ -185,6 +184,7 @@ void __init sp804_clockevents_init(void __iomem *base, unsigned int irq,
185 clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ); 184 clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ);
186 evt->name = name; 185 evt->name = name;
187 evt->irq = irq; 186 evt->irq = irq;
187 evt->cpumask = cpu_possible_mask;
188 188
189 setup_irq(irq, &sp804_timer_irq); 189 setup_irq(irq, &sp804_timer_irq);
190 clockevents_config_and_register(evt, rate, 0xf, 0xffffffff); 190 clockevents_config_and_register(evt, rate, 0xf, 0xffffffff);
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index 66aa7a6db884..394ded624e37 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -139,6 +139,7 @@ CONFIG_I2C_IMX=y
139CONFIG_SPI=y 139CONFIG_SPI=y
140CONFIG_SPI_IMX=y 140CONFIG_SPI_IMX=y
141CONFIG_GPIO_SYSFS=y 141CONFIG_GPIO_SYSFS=y
142CONFIG_GPIO_MC9S08DZ60=y
142# CONFIG_HWMON is not set 143# CONFIG_HWMON is not set
143CONFIG_WATCHDOG=y 144CONFIG_WATCHDOG=y
144CONFIG_IMX2_WDT=y 145CONFIG_IMX2_WDT=y
@@ -155,6 +156,7 @@ CONFIG_SOC_CAMERA=y
155CONFIG_SOC_CAMERA_OV2640=y 156CONFIG_SOC_CAMERA_OV2640=y
156CONFIG_VIDEO_MX3=y 157CONFIG_VIDEO_MX3=y
157CONFIG_FB=y 158CONFIG_FB=y
159CONFIG_LCD_PLATFORM=y
158CONFIG_BACKLIGHT_LCD_SUPPORT=y 160CONFIG_BACKLIGHT_LCD_SUPPORT=y
159CONFIG_LCD_CLASS_DEVICE=y 161CONFIG_LCD_CLASS_DEVICE=y
160CONFIG_LCD_L4F00242T03=y 162CONFIG_LCD_L4F00242T03=y
diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig
index 7bcf850eddcd..3458752c4bb2 100644
--- a/arch/arm/configs/mvebu_defconfig
+++ b/arch/arm/configs/mvebu_defconfig
@@ -1,6 +1,6 @@
1CONFIG_EXPERIMENTAL=y 1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y 2CONFIG_SYSVIPC=y
3CONFIG_NO_HZ=y 3CONFIG_IRQ_DOMAIN_DEBUG=y
4CONFIG_HIGH_RES_TIMERS=y 4CONFIG_HIGH_RES_TIMERS=y
5CONFIG_LOG_BUF_SHIFT=14 5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_BLK_DEV_INITRD=y 6CONFIG_BLK_DEV_INITRD=y
@@ -9,10 +9,12 @@ CONFIG_SLAB=y
9CONFIG_MODULES=y 9CONFIG_MODULES=y
10CONFIG_MODULE_UNLOAD=y 10CONFIG_MODULE_UNLOAD=y
11CONFIG_ARCH_MVEBU=y 11CONFIG_ARCH_MVEBU=y
12CONFIG_MACH_ARMADA_370_XP=y 12CONFIG_MACH_ARMADA_370=y
13CONFIG_MACH_ARMADA_XP=y
14# CONFIG_CACHE_L2X0 is not set
13CONFIG_AEABI=y 15CONFIG_AEABI=y
14CONFIG_HIGHMEM=y 16CONFIG_HIGHMEM=y
15CONFIG_USE_OF=y 17# CONFIG_COMPACTION is not set
16CONFIG_ZBOOT_ROM_TEXT=0x0 18CONFIG_ZBOOT_ROM_TEXT=0x0
17CONFIG_ZBOOT_ROM_BSS=0x0 19CONFIG_ZBOOT_ROM_BSS=0x0
18CONFIG_ARM_APPENDED_DTB=y 20CONFIG_ARM_APPENDED_DTB=y
@@ -23,6 +25,8 @@ CONFIG_SERIAL_8250_CONSOLE=y
23CONFIG_SERIAL_OF_PLATFORM=y 25CONFIG_SERIAL_OF_PLATFORM=y
24CONFIG_GPIOLIB=y 26CONFIG_GPIOLIB=y
25CONFIG_GPIO_SYSFS=y 27CONFIG_GPIO_SYSFS=y
28# CONFIG_USB_SUPPORT is not set
29# CONFIG_IOMMU_SUPPORT is not set
26CONFIG_EXT2_FS=y 30CONFIG_EXT2_FS=y
27CONFIG_EXT3_FS=y 31CONFIG_EXT3_FS=y
28# CONFIG_EXT3_FS_XATTR is not set 32# CONFIG_EXT3_FS_XATTR is not set
diff --git a/arch/arm/configs/versatile_defconfig b/arch/arm/configs/versatile_defconfig
index cdd4d2bd3962..2ba9e63d0f17 100644
--- a/arch/arm/configs/versatile_defconfig
+++ b/arch/arm/configs/versatile_defconfig
@@ -1,3 +1,4 @@
1CONFIG_ARCH_VERSATILE=y
1CONFIG_EXPERIMENTAL=y 2CONFIG_EXPERIMENTAL=y
2# CONFIG_LOCALVERSION_AUTO is not set 3# CONFIG_LOCALVERSION_AUTO is not set
3CONFIG_SYSVIPC=y 4CONFIG_SYSVIPC=y
diff --git a/arch/arm/include/asm/flat.h b/arch/arm/include/asm/flat.h
index 59426a4595c9..e847d23351ed 100644
--- a/arch/arm/include/asm/flat.h
+++ b/arch/arm/include/asm/flat.h
@@ -8,7 +8,7 @@
8#define flat_argvp_envp_on_stack() 1 8#define flat_argvp_envp_on_stack() 1
9#define flat_old_ram_flag(flags) (flags) 9#define flat_old_ram_flag(flags) (flags)
10#define flat_reloc_valid(reloc, size) ((reloc) <= (size)) 10#define flat_reloc_valid(reloc, size) ((reloc) <= (size))
11#define flat_get_addr_from_rp(rp, relval, flags, persistent) get_unaligned(rp) 11#define flat_get_addr_from_rp(rp, relval, flags, persistent) ((void)persistent,get_unaligned(rp))
12#define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp) 12#define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp)
13#define flat_get_relocate_addr(rel) (rel) 13#define flat_get_relocate_addr(rel) (rel)
14#define flat_set_persistent(relval, p) 0 14#define flat_set_persistent(relval, p) 0
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 35c1ed89b936..42f042ee4ada 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -64,7 +64,7 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
64static inline void __raw_writew(u16 val, volatile void __iomem *addr) 64static inline void __raw_writew(u16 val, volatile void __iomem *addr)
65{ 65{
66 asm volatile("strh %1, %0" 66 asm volatile("strh %1, %0"
67 : "+Qo" (*(volatile u16 __force *)addr) 67 : "+Q" (*(volatile u16 __force *)addr)
68 : "r" (val)); 68 : "r" (val));
69} 69}
70 70
@@ -72,7 +72,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)
72{ 72{
73 u16 val; 73 u16 val;
74 asm volatile("ldrh %1, %0" 74 asm volatile("ldrh %1, %0"
75 : "+Qo" (*(volatile u16 __force *)addr), 75 : "+Q" (*(volatile u16 __force *)addr),
76 "=r" (val)); 76 "=r" (val));
77 return val; 77 return val;
78} 78}
diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h
index 05b8e82ec9f5..e3f757263438 100644
--- a/arch/arm/include/asm/sched_clock.h
+++ b/arch/arm/include/asm/sched_clock.h
@@ -10,7 +10,5 @@
10 10
11extern void sched_clock_postinit(void); 11extern void sched_clock_postinit(void);
12extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate); 12extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
13extern void setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
14 unsigned long rate);
15 13
16#endif 14#endif
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index 77bd79f2ffdb..7e1f76027f66 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -200,8 +200,8 @@ extern int __put_user_8(void *, unsigned long long);
200#define USER_DS KERNEL_DS 200#define USER_DS KERNEL_DS
201 201
202#define segment_eq(a,b) (1) 202#define segment_eq(a,b) (1)
203#define __addr_ok(addr) (1) 203#define __addr_ok(addr) ((void)(addr),1)
204#define __range_ok(addr,size) (0) 204#define __range_ok(addr,size) ((void)(addr),0)
205#define get_fs() (KERNEL_DS) 205#define get_fs() (KERNEL_DS)
206 206
207static inline void set_fs(mm_segment_t fs) 207static inline void set_fs(mm_segment_t fs)
diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h
index 6a6f1e485f41..301c1db3e99b 100644
--- a/arch/arm/include/asm/vfpmacros.h
+++ b/arch/arm/include/asm/vfpmacros.h
@@ -27,9 +27,9 @@
27#if __LINUX_ARM_ARCH__ <= 6 27#if __LINUX_ARM_ARCH__ <= 6
28 ldr \tmp, =elf_hwcap @ may not have MVFR regs 28 ldr \tmp, =elf_hwcap @ may not have MVFR regs
29 ldr \tmp, [\tmp, #0] 29 ldr \tmp, [\tmp, #0]
30 tst \tmp, #HWCAP_VFPv3D16 30 tst \tmp, #HWCAP_VFPD32
31 ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} 31 ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
32 addne \base, \base, #32*4 @ step over unused register space 32 addeq \base, \base, #32*4 @ step over unused register space
33#else 33#else
34 VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 34 VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
35 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field 35 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
@@ -51,9 +51,9 @@
51#if __LINUX_ARM_ARCH__ <= 6 51#if __LINUX_ARM_ARCH__ <= 6
52 ldr \tmp, =elf_hwcap @ may not have MVFR regs 52 ldr \tmp, =elf_hwcap @ may not have MVFR regs
53 ldr \tmp, [\tmp, #0] 53 ldr \tmp, [\tmp, #0]
54 tst \tmp, #HWCAP_VFPv3D16 54 tst \tmp, #HWCAP_VFPD32
55 stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} 55 stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
56 addne \base, \base, #32*4 @ step over unused register space 56 addeq \base, \base, #32*4 @ step over unused register space
57#else 57#else
58 VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 58 VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
59 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field 59 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
diff --git a/arch/arm/include/debug/8250_32.S b/arch/arm/include/debug/8250_32.S
new file mode 100644
index 000000000000..8db01eeabbb4
--- /dev/null
+++ b/arch/arm/include/debug/8250_32.S
@@ -0,0 +1,27 @@
1/*
2 * Copyright (c) 2011 Picochip Ltd., Jamie Iles
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit
9 * accesses to the 8250.
10 */
11
12#include <linux/serial_reg.h>
13
14 .macro senduart,rd,rx
15 str \rd, [\rx, #UART_TX << UART_SHIFT]
16 .endm
17
18 .macro busyuart,rd,rx
191002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT]
20 and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
21 teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
22 bne 1002b
23 .endm
24
25 /* The UART's don't have any flow control IO's wired up. */
26 .macro waituart,rd,rx
27 .endm
diff --git a/arch/arm/include/debug/picoxcell.S b/arch/arm/include/debug/picoxcell.S
index 7419deb1b948..bc1f07c49cd4 100644
--- a/arch/arm/include/debug/picoxcell.S
+++ b/arch/arm/include/debug/picoxcell.S
@@ -5,10 +5,7 @@
5 * it under the terms of the GNU General Public License version 2 as 5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 * 7 *
8 * Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit
9 * accesses to the 8250.
10 */ 8 */
11#include <linux/serial_reg.h>
12 9
13#define UART_SHIFT 2 10#define UART_SHIFT 2
14#define PICOXCELL_UART1_BASE 0x80230000 11#define PICOXCELL_UART1_BASE 0x80230000
@@ -19,17 +16,4 @@
19 ldr \rp, =PICOXCELL_UART1_BASE 16 ldr \rp, =PICOXCELL_UART1_BASE
20 .endm 17 .endm
21 18
22 .macro senduart,rd,rx 19#include "8250_32.S"
23 str \rd, [\rx, #UART_TX << UART_SHIFT]
24 .endm
25
26 .macro busyuart,rd,rx
271002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT]
28 and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
29 teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
30 bne 1002b
31 .endm
32
33 /* The UART's don't have any flow control IO's wired up. */
34 .macro waituart,rd,rx
35 .endm
diff --git a/arch/arm/include/debug/socfpga.S b/arch/arm/include/debug/socfpga.S
index d6f26d23374f..966b2f994946 100644
--- a/arch/arm/include/debug/socfpga.S
+++ b/arch/arm/include/debug/socfpga.S
@@ -7,6 +7,9 @@
7 * published by the Free Software Foundation. 7 * published by the Free Software Foundation.
8 */ 8 */
9 9
10#define UART_SHIFT 2
11#define DEBUG_LL_UART_OFFSET 0x00002000
12
10 .macro addruart, rp, rv, tmp 13 .macro addruart, rp, rv, tmp
11 mov \rp, #DEBUG_LL_UART_OFFSET 14 mov \rp, #DEBUG_LL_UART_OFFSET
12 orr \rp, \rp, #0x00c00000 15 orr \rp, \rp, #0x00c00000
@@ -14,3 +17,5 @@
14 orr \rp, \rp, #0xff000000 @ physical base 17 orr \rp, \rp, #0xff000000 @ physical base
15 .endm 18 .endm
16 19
20#include "8250_32.S"
21
diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h
index f254f6503cce..3688fd15a32d 100644
--- a/arch/arm/include/uapi/asm/hwcap.h
+++ b/arch/arm/include/uapi/asm/hwcap.h
@@ -18,11 +18,12 @@
18#define HWCAP_THUMBEE (1 << 11) 18#define HWCAP_THUMBEE (1 << 11)
19#define HWCAP_NEON (1 << 12) 19#define HWCAP_NEON (1 << 12)
20#define HWCAP_VFPv3 (1 << 13) 20#define HWCAP_VFPv3 (1 << 13)
21#define HWCAP_VFPv3D16 (1 << 14) 21#define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */
22#define HWCAP_TLS (1 << 15) 22#define HWCAP_TLS (1 << 15)
23#define HWCAP_VFPv4 (1 << 16) 23#define HWCAP_VFPv4 (1 << 16)
24#define HWCAP_IDIVA (1 << 17) 24#define HWCAP_IDIVA (1 << 17)
25#define HWCAP_IDIVT (1 << 18) 25#define HWCAP_IDIVT (1 << 18)
26#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */
26#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) 27#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
27 28
28 29
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 16cedb42c0c3..896165096d6a 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -34,6 +34,7 @@
34#include <linux/list.h> 34#include <linux/list.h>
35#include <linux/kallsyms.h> 35#include <linux/kallsyms.h>
36#include <linux/proc_fs.h> 36#include <linux/proc_fs.h>
37#include <linux/export.h>
37 38
38#include <asm/exception.h> 39#include <asm/exception.h>
39#include <asm/mach/arch.h> 40#include <asm/mach/arch.h>
@@ -109,6 +110,7 @@ void set_irq_flags(unsigned int irq, unsigned int iflags)
109 /* Order is clear bits in "clr" then set bits in "set" */ 110 /* Order is clear bits in "clr" then set bits in "set" */
110 irq_modify_status(irq, clr, set & ~clr); 111 irq_modify_status(irq, clr, set & ~clr);
111} 112}
113EXPORT_SYMBOL_GPL(set_irq_flags);
112 114
113void __init init_IRQ(void) 115void __init init_IRQ(void)
114{ 116{
diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c
index 38c1a3b103a0..839312905067 100644
--- a/arch/arm/kernel/kprobes-test-arm.c
+++ b/arch/arm/kernel/kprobes-test-arm.c
@@ -366,7 +366,9 @@ void kprobe_arm_test_cases(void)
366 TEST_UNSUPPORTED(".word 0xe04f0392 @ umaal r0, pc, r2, r3") 366 TEST_UNSUPPORTED(".word 0xe04f0392 @ umaal r0, pc, r2, r3")
367 TEST_UNSUPPORTED(".word 0xe0500090 @ undef") 367 TEST_UNSUPPORTED(".word 0xe0500090 @ undef")
368 TEST_UNSUPPORTED(".word 0xe05fff9f @ undef") 368 TEST_UNSUPPORTED(".word 0xe05fff9f @ undef")
369#endif
369 370
371#if __LINUX_ARM_ARCH__ >= 7
370 TEST_RRR( "mls r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") 372 TEST_RRR( "mls r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
371 TEST_RRR( "mlshi r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") 373 TEST_RRR( "mlshi r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
372 TEST_RR( "mls lr, r",1, VAL2,", r",2, VAL3,", r13") 374 TEST_RR( "mls lr, r",1, VAL2,", r",2, VAL3,", r13")
@@ -456,6 +458,8 @@ void kprobe_arm_test_cases(void)
456 TEST_UNSUPPORTED(".word 0xe1700090") /* Unallocated space */ 458 TEST_UNSUPPORTED(".word 0xe1700090") /* Unallocated space */
457#if __LINUX_ARM_ARCH__ >= 6 459#if __LINUX_ARM_ARCH__ >= 6
458 TEST_UNSUPPORTED("ldrex r2, [sp]") 460 TEST_UNSUPPORTED("ldrex r2, [sp]")
461#endif
462#if (__LINUX_ARM_ARCH__ >= 7) || defined(CONFIG_CPU_32v6K)
459 TEST_UNSUPPORTED("strexd r0, r2, r3, [sp]") 463 TEST_UNSUPPORTED("strexd r0, r2, r3, [sp]")
460 TEST_UNSUPPORTED("ldrexd r2, r3, [sp]") 464 TEST_UNSUPPORTED("ldrexd r2, r3, [sp]")
461 TEST_UNSUPPORTED("strexb r0, r2, [sp]") 465 TEST_UNSUPPORTED("strexb r0, r2, [sp]")
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index e29c3337ca81..8ef8c9337809 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -45,10 +45,9 @@ int machine_kexec_prepare(struct kimage *image)
45 for (i = 0; i < image->nr_segments; i++) { 45 for (i = 0; i < image->nr_segments; i++) {
46 current_segment = &image->segment[i]; 46 current_segment = &image->segment[i];
47 47
48 err = memblock_is_region_memory(current_segment->mem, 48 if (!memblock_is_region_memory(current_segment->mem,
49 current_segment->memsz); 49 current_segment->memsz))
50 if (err) 50 return -EINVAL;
51 return - EINVAL;
52 51
53 err = get_user(header, (__be32*)current_segment->buf); 52 err = get_user(header, (__be32*)current_segment->buf);
54 if (err) 53 if (err)
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 93971b1a4f0b..53c0304b734a 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -96,6 +96,10 @@ armpmu_event_set_period(struct perf_event *event,
96 s64 period = hwc->sample_period; 96 s64 period = hwc->sample_period;
97 int ret = 0; 97 int ret = 0;
98 98
99 /* The period may have been changed by PERF_EVENT_IOC_PERIOD */
100 if (unlikely(period != hwc->last_period))
101 left = period - (hwc->last_period - left);
102
99 if (unlikely(left <= -period)) { 103 if (unlikely(left <= -period)) {
100 left = period; 104 left = period;
101 local64_set(&hwc->period_left, left); 105 local64_set(&hwc->period_left, left);
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index e21bac20d90d..fc6692e2b603 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -107,13 +107,6 @@ static void sched_clock_poll(unsigned long wrap_ticks)
107 update_sched_clock(); 107 update_sched_clock();
108} 108}
109 109
110void __init setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
111 unsigned long rate)
112{
113 setup_sched_clock(read, bits, rate);
114 cd.needs_suspend = true;
115}
116
117void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) 110void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
118{ 111{
119 unsigned long r, w; 112 unsigned long r, w;
@@ -189,18 +182,15 @@ void __init sched_clock_postinit(void)
189static int sched_clock_suspend(void) 182static int sched_clock_suspend(void)
190{ 183{
191 sched_clock_poll(sched_clock_timer.data); 184 sched_clock_poll(sched_clock_timer.data);
192 if (cd.needs_suspend) 185 cd.suspended = true;
193 cd.suspended = true;
194 return 0; 186 return 0;
195} 187}
196 188
197static void sched_clock_resume(void) 189static void sched_clock_resume(void)
198{ 190{
199 if (cd.needs_suspend) { 191 cd.epoch_cyc = read_sched_clock();
200 cd.epoch_cyc = read_sched_clock(); 192 cd.epoch_cyc_copy = cd.epoch_cyc;
201 cd.epoch_cyc_copy = cd.epoch_cyc; 193 cd.suspended = false;
202 cd.suspended = false;
203 }
204} 194}
205 195
206static struct syscore_ops sched_clock_ops = { 196static struct syscore_ops sched_clock_ops = {
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 8e20754dd31d..fbc8b2623d82 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -294,18 +294,24 @@ static void percpu_timer_setup(void);
294asmlinkage void __cpuinit secondary_start_kernel(void) 294asmlinkage void __cpuinit secondary_start_kernel(void)
295{ 295{
296 struct mm_struct *mm = &init_mm; 296 struct mm_struct *mm = &init_mm;
297 unsigned int cpu = smp_processor_id(); 297 unsigned int cpu;
298
299 /*
300 * The identity mapping is uncached (strongly ordered), so
301 * switch away from it before attempting any exclusive accesses.
302 */
303 cpu_switch_mm(mm->pgd, mm);
304 enter_lazy_tlb(mm, current);
305 local_flush_tlb_all();
298 306
299 /* 307 /*
300 * All kernel threads share the same mm context; grab a 308 * All kernel threads share the same mm context; grab a
301 * reference and switch to it. 309 * reference and switch to it.
302 */ 310 */
311 cpu = smp_processor_id();
303 atomic_inc(&mm->mm_count); 312 atomic_inc(&mm->mm_count);
304 current->active_mm = mm; 313 current->active_mm = mm;
305 cpumask_set_cpu(cpu, mm_cpumask(mm)); 314 cpumask_set_cpu(cpu, mm_cpumask(mm));
306 cpu_switch_mm(mm->pgd, mm);
307 enter_lazy_tlb(mm, current);
308 local_flush_tlb_all();
309 315
310 printk("CPU%u: Booted secondary processor\n", cpu); 316 printk("CPU%u: Booted secondary processor\n", cpu);
311 317
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index e1f906989bb8..b22d700fea27 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -42,10 +42,10 @@ static void twd_set_mode(enum clock_event_mode mode,
42 42
43 switch (mode) { 43 switch (mode) {
44 case CLOCK_EVT_MODE_PERIODIC: 44 case CLOCK_EVT_MODE_PERIODIC:
45 /* timer load already set up */
46 ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE 45 ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE
47 | TWD_TIMER_CONTROL_PERIODIC; 46 | TWD_TIMER_CONTROL_PERIODIC;
48 __raw_writel(twd_timer_rate / HZ, twd_base + TWD_TIMER_LOAD); 47 __raw_writel(DIV_ROUND_CLOSEST(twd_timer_rate, HZ),
48 twd_base + TWD_TIMER_LOAD);
49 break; 49 break;
50 case CLOCK_EVT_MODE_ONESHOT: 50 case CLOCK_EVT_MODE_ONESHOT:
51 /* period set, and timer enabled in 'next_event' hook */ 51 /* period set, and timer enabled in 'next_event' hook */
diff --git a/arch/arm/lib/delay.c b/arch/arm/lib/delay.c
index 9d0a30032d7f..0dc53854a5d8 100644
--- a/arch/arm/lib/delay.c
+++ b/arch/arm/lib/delay.c
@@ -45,6 +45,7 @@ int read_current_timer(unsigned long *timer_val)
45 *timer_val = delay_timer->read_current_timer(); 45 *timer_val = delay_timer->read_current_timer();
46 return 0; 46 return 0;
47} 47}
48EXPORT_SYMBOL_GPL(read_current_timer);
48 49
49static void __timer_delay(unsigned long cycles) 50static void __timer_delay(unsigned long cycles)
50{ 51{
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index b14207101938..043624219b55 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -21,19 +21,13 @@ config SOC_AT91SAM9
21 bool 21 bool
22 select CPU_ARM926T 22 select CPU_ARM926T
23 select GENERIC_CLOCKEVENTS 23 select GENERIC_CLOCKEVENTS
24 select MULTI_IRQ_HANDLER
25 select SPARSE_IRQ
24 26
25menu "Atmel AT91 System-on-Chip" 27menu "Atmel AT91 System-on-Chip"
26 28
27comment "Atmel AT91 Processor" 29comment "Atmel AT91 Processor"
28 30
29config SOC_AT91SAM9
30 bool
31 select AT91_SAM9_SMC
32 select AT91_SAM9_TIME
33 select CPU_ARM926T
34 select MULTI_IRQ_HANDLER
35 select SPARSE_IRQ
36
37config SOC_AT91RM9200 31config SOC_AT91RM9200
38 bool "AT91RM9200" 32 bool "AT91RM9200"
39 select CPU_ARM920T 33 select CPU_ARM920T
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index b4f0565aff63..5269825194a8 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -187,7 +187,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
187 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), 187 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
188 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), 188 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
189 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), 189 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
190 CLKDEV_CON_DEV_ID(NULL, "i2c-at91rm9200", &twi_clk), 190 CLKDEV_CON_DEV_ID(NULL, "i2c-at91rm9200.0", &twi_clk),
191 /* fake hclk clock */ 191 /* fake hclk clock */
192 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), 192 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
193 CLKDEV_CON_ID("pioA", &pioA_clk), 193 CLKDEV_CON_ID("pioA", &pioA_clk),
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index a563189cdfc3..3cee0e6ea7c3 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -68,7 +68,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
68 68
69 /* Enable overcurrent notification */ 69 /* Enable overcurrent notification */
70 for (i = 0; i < data->ports; i++) { 70 for (i = 0; i < data->ports; i++) {
71 if (data->overcurrent_pin[i]) 71 if (gpio_is_valid(data->overcurrent_pin[i]))
72 at91_set_gpio_input(data->overcurrent_pin[i], 1); 72 at91_set_gpio_input(data->overcurrent_pin[i], 1);
73 } 73 }
74 74
@@ -479,7 +479,7 @@ static struct i2c_gpio_platform_data pdata = {
479 479
480static struct platform_device at91rm9200_twi_device = { 480static struct platform_device at91rm9200_twi_device = {
481 .name = "i2c-gpio", 481 .name = "i2c-gpio",
482 .id = -1, 482 .id = 0,
483 .dev.platform_data = &pdata, 483 .dev.platform_data = &pdata,
484}; 484};
485 485
@@ -512,7 +512,7 @@ static struct resource twi_resources[] = {
512 512
513static struct platform_device at91rm9200_twi_device = { 513static struct platform_device at91rm9200_twi_device = {
514 .name = "i2c-at91rm9200", 514 .name = "i2c-at91rm9200",
515 .id = -1, 515 .id = 0,
516 .resource = twi_resources, 516 .resource = twi_resources,
517 .num_resources = ARRAY_SIZE(twi_resources), 517 .num_resources = ARRAY_SIZE(twi_resources),
518}; 518};
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index ad29f93f20ca..f8202615f4a8 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -211,8 +211,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
211 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk), 211 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
212 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk), 212 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
213 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk), 213 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk),
214 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260", &twi_clk), 214 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),
215 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20", &twi_clk), 215 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20.0", &twi_clk),
216 /* more usart lookup table for DT entries */ 216 /* more usart lookup table for DT entries */
217 CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck), 217 CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
218 CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk), 218 CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index a76b8684f52d..414bd855fb0c 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
72 72
73 /* Enable overcurrent notification */ 73 /* Enable overcurrent notification */
74 for (i = 0; i < data->ports; i++) { 74 for (i = 0; i < data->ports; i++) {
75 if (data->overcurrent_pin[i]) 75 if (gpio_is_valid(data->overcurrent_pin[i]))
76 at91_set_gpio_input(data->overcurrent_pin[i], 1); 76 at91_set_gpio_input(data->overcurrent_pin[i], 1);
77 } 77 }
78 78
@@ -389,7 +389,7 @@ static struct i2c_gpio_platform_data pdata = {
389 389
390static struct platform_device at91sam9260_twi_device = { 390static struct platform_device at91sam9260_twi_device = {
391 .name = "i2c-gpio", 391 .name = "i2c-gpio",
392 .id = -1, 392 .id = 0,
393 .dev.platform_data = &pdata, 393 .dev.platform_data = &pdata,
394}; 394};
395 395
@@ -421,7 +421,7 @@ static struct resource twi_resources[] = {
421}; 421};
422 422
423static struct platform_device at91sam9260_twi_device = { 423static struct platform_device at91sam9260_twi_device = {
424 .id = -1, 424 .id = 0,
425 .resource = twi_resources, 425 .resource = twi_resources,
426 .num_resources = ARRAY_SIZE(twi_resources), 426 .num_resources = ARRAY_SIZE(twi_resources),
427}; 427};
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 8d999eb1a137..04295c04b3e0 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -178,8 +178,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
178 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), 178 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
179 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), 179 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
180 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0), 180 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0),
181 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9261", &twi_clk), 181 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9261.0", &twi_clk),
182 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10", &twi_clk), 182 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10.0", &twi_clk),
183 CLKDEV_CON_ID("pioA", &pioA_clk), 183 CLKDEV_CON_ID("pioA", &pioA_clk),
184 CLKDEV_CON_ID("pioB", &pioB_clk), 184 CLKDEV_CON_ID("pioB", &pioB_clk),
185 CLKDEV_CON_ID("pioC", &pioC_clk), 185 CLKDEV_CON_ID("pioC", &pioC_clk),
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 9752f17efba9..cd604aad8e96 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
72 72
73 /* Enable overcurrent notification */ 73 /* Enable overcurrent notification */
74 for (i = 0; i < data->ports; i++) { 74 for (i = 0; i < data->ports; i++) {
75 if (data->overcurrent_pin[i]) 75 if (gpio_is_valid(data->overcurrent_pin[i]))
76 at91_set_gpio_input(data->overcurrent_pin[i], 1); 76 at91_set_gpio_input(data->overcurrent_pin[i], 1);
77 } 77 }
78 78
@@ -285,7 +285,7 @@ static struct i2c_gpio_platform_data pdata = {
285 285
286static struct platform_device at91sam9261_twi_device = { 286static struct platform_device at91sam9261_twi_device = {
287 .name = "i2c-gpio", 287 .name = "i2c-gpio",
288 .id = -1, 288 .id = 0,
289 .dev.platform_data = &pdata, 289 .dev.platform_data = &pdata,
290}; 290};
291 291
@@ -317,7 +317,7 @@ static struct resource twi_resources[] = {
317}; 317};
318 318
319static struct platform_device at91sam9261_twi_device = { 319static struct platform_device at91sam9261_twi_device = {
320 .id = -1, 320 .id = 0,
321 .resource = twi_resources, 321 .resource = twi_resources,
322 .num_resources = ARRAY_SIZE(twi_resources), 322 .num_resources = ARRAY_SIZE(twi_resources),
323}; 323};
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 6a01d0360dfb..d6f9c23927c4 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -193,7 +193,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
193 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), 193 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
194 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), 194 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
195 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), 195 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
196 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260", &twi_clk), 196 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),
197 /* fake hclk clock */ 197 /* fake hclk clock */
198 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), 198 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
199 CLKDEV_CON_ID("pioA", &pioA_clk), 199 CLKDEV_CON_ID("pioA", &pioA_clk),
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 8dde220b42b6..9c61e59a2104 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -78,7 +78,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
78 78
79 /* Enable overcurrent notification */ 79 /* Enable overcurrent notification */
80 for (i = 0; i < data->ports; i++) { 80 for (i = 0; i < data->ports; i++) {
81 if (data->overcurrent_pin[i]) 81 if (gpio_is_valid(data->overcurrent_pin[i]))
82 at91_set_gpio_input(data->overcurrent_pin[i], 1); 82 at91_set_gpio_input(data->overcurrent_pin[i], 1);
83 } 83 }
84 84
@@ -567,7 +567,7 @@ static struct i2c_gpio_platform_data pdata = {
567 567
568static struct platform_device at91sam9263_twi_device = { 568static struct platform_device at91sam9263_twi_device = {
569 .name = "i2c-gpio", 569 .name = "i2c-gpio",
570 .id = -1, 570 .id = 0,
571 .dev.platform_data = &pdata, 571 .dev.platform_data = &pdata,
572}; 572};
573 573
@@ -600,7 +600,7 @@ static struct resource twi_resources[] = {
600 600
601static struct platform_device at91sam9263_twi_device = { 601static struct platform_device at91sam9263_twi_device = {
602 .name = "i2c-at91sam9260", 602 .name = "i2c-at91sam9260",
603 .id = -1, 603 .id = 0,
604 .resource = twi_resources, 604 .resource = twi_resources,
605 .num_resources = ARRAY_SIZE(twi_resources), 605 .num_resources = ARRAY_SIZE(twi_resources),
606}; 606};
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index b1596072dcc2..fcd233cb33d2 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -1841,8 +1841,8 @@ static struct resource sha_resources[] = {
1841 .flags = IORESOURCE_MEM, 1841 .flags = IORESOURCE_MEM,
1842 }, 1842 },
1843 [1] = { 1843 [1] = {
1844 .start = AT91SAM9G45_ID_AESTDESSHA, 1844 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
1845 .end = AT91SAM9G45_ID_AESTDESSHA, 1845 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
1846 .flags = IORESOURCE_IRQ, 1846 .flags = IORESOURCE_IRQ,
1847 }, 1847 },
1848}; 1848};
@@ -1874,8 +1874,8 @@ static struct resource tdes_resources[] = {
1874 .flags = IORESOURCE_MEM, 1874 .flags = IORESOURCE_MEM,
1875 }, 1875 },
1876 [1] = { 1876 [1] = {
1877 .start = AT91SAM9G45_ID_AESTDESSHA, 1877 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
1878 .end = AT91SAM9G45_ID_AESTDESSHA, 1878 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
1879 .flags = IORESOURCE_IRQ, 1879 .flags = IORESOURCE_IRQ,
1880 }, 1880 },
1881}; 1881};
@@ -1910,8 +1910,8 @@ static struct resource aes_resources[] = {
1910 .flags = IORESOURCE_MEM, 1910 .flags = IORESOURCE_MEM,
1911 }, 1911 },
1912 [1] = { 1912 [1] = {
1913 .start = AT91SAM9G45_ID_AESTDESSHA, 1913 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
1914 .end = AT91SAM9G45_ID_AESTDESSHA, 1914 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
1915 .flags = IORESOURCE_IRQ, 1915 .flags = IORESOURCE_IRQ,
1916 }, 1916 },
1917}; 1917};
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index d6ca0543ce8d..5047bdc92adf 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -314,7 +314,7 @@ static struct i2c_gpio_platform_data pdata = {
314 314
315static struct platform_device at91sam9rl_twi_device = { 315static struct platform_device at91sam9rl_twi_device = {
316 .name = "i2c-gpio", 316 .name = "i2c-gpio",
317 .id = -1, 317 .id = 0,
318 .dev.platform_data = &pdata, 318 .dev.platform_data = &pdata,
319}; 319};
320 320
@@ -347,7 +347,7 @@ static struct resource twi_resources[] = {
347 347
348static struct platform_device at91sam9rl_twi_device = { 348static struct platform_device at91sam9rl_twi_device = {
349 .name = "i2c-at91sam9g20", 349 .name = "i2c-at91sam9g20",
350 .id = -1, 350 .id = 0,
351 .resource = twi_resources, 351 .resource = twi_resources,
352 .num_resources = ARRAY_SIZE(twi_resources), 352 .num_resources = ARRAY_SIZE(twi_resources),
353}; 353};
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c
index 6bd7300a2bc5..bb7f54474b92 100644
--- a/arch/arm/mach-at91/at91x40.c
+++ b/arch/arm/mach-at91/at91x40.c
@@ -88,6 +88,6 @@ void __init at91x40_init_interrupts(unsigned int priority[NR_AIC_IRQS])
88 if (!priority) 88 if (!priority)
89 priority = at91x40_default_irq_priority; 89 priority = at91x40_default_irq_priority;
90 90
91 at91_aic_init(priority); 91 at91_aic_init(priority, at91_extern_irq);
92} 92}
93 93
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
index 9cda3fd346ae..6960778af4c2 100644
--- a/arch/arm/mach-at91/board-neocore926.c
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -129,7 +129,7 @@ static struct spi_board_info neocore926_spi_devices[] = {
129 .max_speed_hz = 125000 * 16, 129 .max_speed_hz = 125000 * 16,
130 .bus_num = 0, 130 .bus_num = 0,
131 .platform_data = &ads_info, 131 .platform_data = &ads_info,
132 .irq = AT91SAM9263_ID_IRQ1, 132 .irq = NR_IRQS_LEGACY + AT91SAM9263_ID_IRQ1,
133 }, 133 },
134#endif 134#endif
135}; 135};
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index 27b3af1a3047..a9167dd45f96 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -309,7 +309,7 @@ static struct spi_board_info ek_spi_devices[] = {
309 .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */ 309 .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */
310 .bus_num = 0, 310 .bus_num = 0,
311 .platform_data = &ads_info, 311 .platform_data = &ads_info,
312 .irq = AT91SAM9261_ID_IRQ0, 312 .irq = NR_IRQS_LEGACY + AT91SAM9261_ID_IRQ0,
313 .controller_data = (void *) AT91_PIN_PA28, /* CS pin */ 313 .controller_data = (void *) AT91_PIN_PA28, /* CS pin */
314 }, 314 },
315#endif 315#endif
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index 073e17403d98..b87dbe2be0d6 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -132,7 +132,7 @@ static struct spi_board_info ek_spi_devices[] = {
132 .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */ 132 .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */
133 .bus_num = 0, 133 .bus_num = 0,
134 .platform_data = &ads_info, 134 .platform_data = &ads_info,
135 .irq = AT91SAM9263_ID_IRQ1, 135 .irq = NR_IRQS_LEGACY + AT91SAM9263_ID_IRQ1,
136 }, 136 },
137#endif 137#endif
138}; 138};
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index f49650677653..b62f560e6c75 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -26,7 +26,8 @@ extern void __init at91_dt_initialize(void);
26extern void __init at91_init_irq_default(void); 26extern void __init at91_init_irq_default(void);
27extern void __init at91_init_interrupts(unsigned int priority[]); 27extern void __init at91_init_interrupts(unsigned int priority[]);
28extern void __init at91x40_init_interrupts(unsigned int priority[]); 28extern void __init at91x40_init_interrupts(unsigned int priority[]);
29extern void __init at91_aic_init(unsigned int priority[]); 29extern void __init at91_aic_init(unsigned int priority[],
30 unsigned int ext_irq_mask);
30extern int __init at91_aic_of_init(struct device_node *node, 31extern int __init at91_aic_of_init(struct device_node *node,
31 struct device_node *parent); 32 struct device_node *parent);
32extern int __init at91_aic5_of_init(struct device_node *node, 33extern int __init at91_aic5_of_init(struct device_node *node,
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index 1e02c0e49dcc..febc2ee901a5 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -502,14 +502,19 @@ int __init at91_aic5_of_init(struct device_node *node,
502/* 502/*
503 * Initialize the AIC interrupt controller. 503 * Initialize the AIC interrupt controller.
504 */ 504 */
505void __init at91_aic_init(unsigned int *priority) 505void __init at91_aic_init(unsigned int *priority, unsigned int ext_irq_mask)
506{ 506{
507 unsigned int i; 507 unsigned int i;
508 int irq_base; 508 int irq_base;
509 509
510 if (at91_aic_pm_init()) 510 at91_extern_irq = kzalloc(BITS_TO_LONGS(n_irqs)
511 * sizeof(*at91_extern_irq), GFP_KERNEL);
512
513 if (at91_aic_pm_init() || at91_extern_irq == NULL)
511 panic("Unable to allocate bit maps\n"); 514 panic("Unable to allocate bit maps\n");
512 515
516 *at91_extern_irq = ext_irq_mask;
517
513 at91_aic_base = ioremap(AT91_AIC, 512); 518 at91_aic_base = ioremap(AT91_AIC, 512);
514 if (!at91_aic_base) 519 if (!at91_aic_base)
515 panic("Unable to ioremap AIC registers\n"); 520 panic("Unable to ioremap AIC registers\n");
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index da9881b161e1..0b32c81730a5 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -47,7 +47,7 @@ void __init at91_init_irq_default(void)
47void __init at91_init_interrupts(unsigned int *priority) 47void __init at91_init_interrupts(unsigned int *priority)
48{ 48{
49 /* Initialize the AIC interrupt controller */ 49 /* Initialize the AIC interrupt controller */
50 at91_aic_init(priority); 50 at91_aic_init(priority, at91_extern_irq);
51 51
52 /* Enable GPIO interrupts */ 52 /* Enable GPIO interrupts */
53 at91_gpio_irq_setup(); 53 at91_gpio_irq_setup();
@@ -151,7 +151,7 @@ static void __init soc_detect(u32 dbgu_base)
151 } 151 }
152 152
153 /* at91sam9g10 */ 153 /* at91sam9g10 */
154 if ((cidr & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) { 154 if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
155 at91_soc_initdata.type = AT91_SOC_SAM9G10; 155 at91_soc_initdata.type = AT91_SOC_SAM9G10;
156 at91_boot_soc = at91sam9261_soc; 156 at91_boot_soc = at91sam9261_soc;
157 } 157 }
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index cd0c8b1e1ecf..14e9947bad6e 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -713,8 +713,7 @@ static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
713 break; 713 break;
714 case VPBE_ENC_CUSTOM_TIMINGS: 714 case VPBE_ENC_CUSTOM_TIMINGS:
715 if (pclock <= 27000000) { 715 if (pclock <= 27000000) {
716 v |= DM644X_VPSS_MUXSEL_PLL2_MODE | 716 v |= DM644X_VPSS_DACCLKEN;
717 DM644X_VPSS_DACCLKEN;
718 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); 717 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
719 } else { 718 } else {
720 /* 719 /*
diff --git a/arch/arm/mach-dove/include/mach/pm.h b/arch/arm/mach-dove/include/mach/pm.h
index 7bcd0dfce4b1..b47f75038686 100644
--- a/arch/arm/mach-dove/include/mach/pm.h
+++ b/arch/arm/mach-dove/include/mach/pm.h
@@ -63,7 +63,7 @@ static inline int pmu_to_irq(int pin)
63 63
64static inline int irq_to_pmu(int irq) 64static inline int irq_to_pmu(int irq)
65{ 65{
66 if (IRQ_DOVE_PMU_START < irq && irq < NR_IRQS) 66 if (IRQ_DOVE_PMU_START <= irq && irq < NR_IRQS)
67 return irq - IRQ_DOVE_PMU_START; 67 return irq - IRQ_DOVE_PMU_START;
68 68
69 return -EINVAL; 69 return -EINVAL;
diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
index 087711524e8a..bc4344aa1009 100644
--- a/arch/arm/mach-dove/irq.c
+++ b/arch/arm/mach-dove/irq.c
@@ -46,8 +46,20 @@ static void pmu_irq_ack(struct irq_data *d)
46 int pin = irq_to_pmu(d->irq); 46 int pin = irq_to_pmu(d->irq);
47 u32 u; 47 u32 u;
48 48
49 /*
50 * The PMU mask register is not RW0C: it is RW. This means that
51 * the bits take whatever value is written to them; if you write
52 * a '1', you will set the interrupt.
53 *
54 * Unfortunately this means there is NO race free way to clear
55 * these interrupts.
56 *
57 * So, let's structure the code so that the window is as small as
58 * possible.
59 */
49 u = ~(1 << (pin & 31)); 60 u = ~(1 << (pin & 31));
50 writel(u, PMU_INTERRUPT_CAUSE); 61 u &= readl_relaxed(PMU_INTERRUPT_CAUSE);
62 writel_relaxed(u, PMU_INTERRUPT_CAUSE);
51} 63}
52 64
53static struct irq_chip pmu_irq_chip = { 65static struct irq_chip pmu_irq_chip = {
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 715b690e5009..1947be8e5f5b 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -47,6 +47,7 @@
47#include <plat/fimc-core.h> 47#include <plat/fimc-core.h>
48#include <plat/iic-core.h> 48#include <plat/iic-core.h>
49#include <plat/tv-core.h> 49#include <plat/tv-core.h>
50#include <plat/spi-core.h>
50#include <plat/regs-serial.h> 51#include <plat/regs-serial.h>
51 52
52#include "common.h" 53#include "common.h"
@@ -346,6 +347,8 @@ static void __init exynos4_map_io(void)
346 347
347 s5p_fb_setname(0, "exynos4-fb"); 348 s5p_fb_setname(0, "exynos4-fb");
348 s5p_hdmi_setname("exynos4-hdmi"); 349 s5p_hdmi_setname("exynos4-hdmi");
350
351 s3c64xx_spi_setname("exynos4210-spi");
349} 352}
350 353
351static void __init exynos5_map_io(void) 354static void __init exynos5_map_io(void)
@@ -366,6 +369,8 @@ static void __init exynos5_map_io(void)
366 s3c_i2c0_setname("s3c2440-i2c"); 369 s3c_i2c0_setname("s3c2440-i2c");
367 s3c_i2c1_setname("s3c2440-i2c"); 370 s3c_i2c1_setname("s3c2440-i2c");
368 s3c_i2c2_setname("s3c2440-i2c"); 371 s3c_i2c2_setname("s3c2440-i2c");
372
373 s3c64xx_spi_setname("exynos4210-spi");
369} 374}
370 375
371static void __init exynos4_init_clocks(int xtal) 376static void __init exynos4_init_clocks(int xtal)
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index 21d568b3b149..87e07d6fc615 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -275,6 +275,9 @@ static int __init exynos_dma_init(void)
275 exynos_pdma1_pdata.nr_valid_peri = 275 exynos_pdma1_pdata.nr_valid_peri =
276 ARRAY_SIZE(exynos4210_pdma1_peri); 276 ARRAY_SIZE(exynos4210_pdma1_peri);
277 exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri; 277 exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri;
278
279 if (samsung_rev() == EXYNOS4210_REV_0)
280 exynos_mdma1_device.res.start = EXYNOS4_PA_S_MDMA1;
278 } else if (soc_is_exynos4212() || soc_is_exynos4412()) { 281 } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
279 exynos_pdma0_pdata.nr_valid_peri = 282 exynos_pdma0_pdata.nr_valid_peri =
280 ARRAY_SIZE(exynos4212_pdma0_peri); 283 ARRAY_SIZE(exynos4212_pdma0_peri);
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 8480849affb9..ed4da4544cd2 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -90,6 +90,7 @@
90 90
91#define EXYNOS4_PA_MDMA0 0x10810000 91#define EXYNOS4_PA_MDMA0 0x10810000
92#define EXYNOS4_PA_MDMA1 0x12850000 92#define EXYNOS4_PA_MDMA1 0x12850000
93#define EXYNOS4_PA_S_MDMA1 0x12840000
93#define EXYNOS4_PA_PDMA0 0x12680000 94#define EXYNOS4_PA_PDMA0 0x12680000
94#define EXYNOS4_PA_PDMA1 0x12690000 95#define EXYNOS4_PA_PDMA1 0x12690000
95#define EXYNOS5_PA_MDMA0 0x10800000 96#define EXYNOS5_PA_MDMA0 0x10800000
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c
index e58d786faf78..eadf4b59e7d2 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -99,6 +99,7 @@ static char const *exynos4_dt_compat[] __initdata = {
99 99
100DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)") 100DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)")
101 /* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */ 101 /* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */
102 .smp = smp_ops(exynos_smp_ops),
102 .init_irq = exynos4_init_irq, 103 .init_irq = exynos4_init_irq,
103 .map_io = exynos4_dt_map_io, 104 .map_io = exynos4_dt_map_io,
104 .handle_irq = gic_handle_irq, 105 .handle_irq = gic_handle_irq,
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c
index 82c27230d4a9..86e37cd9376c 100644
--- a/arch/arm/mach-highbank/system.c
+++ b/arch/arm/mach-highbank/system.c
@@ -28,6 +28,7 @@ void highbank_restart(char mode, const char *cmd)
28 hignbank_set_pwr_soft_reset(); 28 hignbank_set_pwr_soft_reset();
29 29
30 scu_power_mode(scu_base_addr, SCU_PM_POWEROFF); 30 scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
31 cpu_do_idle(); 31 while (1)
32 cpu_do_idle();
32} 33}
33 34
diff --git a/arch/arm/mach-imx/clk-busy.c b/arch/arm/mach-imx/clk-busy.c
index 1a7a8dd045a1..1ab91b5209e6 100644
--- a/arch/arm/mach-imx/clk-busy.c
+++ b/arch/arm/mach-imx/clk-busy.c
@@ -108,7 +108,7 @@ struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
108 busy->div.hw.init = &init; 108 busy->div.hw.init = &init;
109 109
110 clk = clk_register(NULL, &busy->div.hw); 110 clk = clk_register(NULL, &busy->div.hw);
111 if (!clk) 111 if (IS_ERR(clk))
112 kfree(busy); 112 kfree(busy);
113 113
114 return clk; 114 return clk;
diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c
index 3c1b8ff9a0a6..cc49c7ae186e 100644
--- a/arch/arm/mach-imx/clk-gate2.c
+++ b/arch/arm/mach-imx/clk-gate2.c
@@ -112,7 +112,7 @@ struct clk *clk_register_gate2(struct device *dev, const char *name,
112 112
113 clk = clk_register(dev, &gate->hw); 113 clk = clk_register(dev, &gate->hw);
114 if (IS_ERR(clk)) 114 if (IS_ERR(clk))
115 kfree(clk); 115 kfree(gate);
116 116
117 return clk; 117 return clk;
118} 118}
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index d20d4795f4ea..01e2f843bf2e 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -127,8 +127,8 @@ int __init mx25_clocks_init(void)
127 clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0), 4); 127 clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0), 4);
128 clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0), 5); 128 clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0), 5);
129 clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0), 6); 129 clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0), 6);
130 clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per8", ccm(CCM_CGCR0), 7); 130 clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per7", ccm(CCM_CGCR0), 7);
131 clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "ipg_per", ccm(CCM_CGCR0), 8); 131 clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "per8", ccm(CCM_CGCR0), 8);
132 clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13); 132 clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13);
133 clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14); 133 clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14);
134 clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15); 134 clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15);
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 3b6b640eed24..366e5d59d886 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -109,7 +109,7 @@ int __init mx27_clocks_init(unsigned long fref)
109 clk[per3_div] = imx_clk_divider("per3_div", "mpll_main2", CCM_PCDR1, 16, 6); 109 clk[per3_div] = imx_clk_divider("per3_div", "mpll_main2", CCM_PCDR1, 16, 6);
110 clk[per4_div] = imx_clk_divider("per4_div", "mpll_main2", CCM_PCDR1, 24, 6); 110 clk[per4_div] = imx_clk_divider("per4_div", "mpll_main2", CCM_PCDR1, 24, 6);
111 clk[vpu_sel] = imx_clk_mux("vpu_sel", CCM_CSCR, 21, 1, vpu_sel_clks, ARRAY_SIZE(vpu_sel_clks)); 111 clk[vpu_sel] = imx_clk_mux("vpu_sel", CCM_CSCR, 21, 1, vpu_sel_clks, ARRAY_SIZE(vpu_sel_clks));
112 clk[vpu_div] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 3); 112 clk[vpu_div] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 6);
113 clk[usb_div] = imx_clk_divider("usb_div", "spll", CCM_CSCR, 28, 3); 113 clk[usb_div] = imx_clk_divider("usb_div", "spll", CCM_CSCR, 28, 3);
114 clk[cpu_sel] = imx_clk_mux("cpu_sel", CCM_CSCR, 15, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks)); 114 clk[cpu_sel] = imx_clk_mux("cpu_sel", CCM_CSCR, 15, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks));
115 clk[clko_sel] = imx_clk_mux("clko_sel", CCM_CCSR, 0, 5, clko_sel_clks, ARRAY_SIZE(clko_sel_clks)); 115 clk[clko_sel] = imx_clk_mux("clko_sel", CCM_CCSR, 0, 5, clko_sel_clks, ARRAY_SIZE(clko_sel_clks));
@@ -121,7 +121,7 @@ int __init mx27_clocks_init(unsigned long fref)
121 clk[ssi1_sel] = imx_clk_mux("ssi1_sel", CCM_CSCR, 22, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks)); 121 clk[ssi1_sel] = imx_clk_mux("ssi1_sel", CCM_CSCR, 22, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks));
122 clk[ssi2_sel] = imx_clk_mux("ssi2_sel", CCM_CSCR, 23, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks)); 122 clk[ssi2_sel] = imx_clk_mux("ssi2_sel", CCM_CSCR, 23, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks));
123 clk[ssi1_div] = imx_clk_divider("ssi1_div", "ssi1_sel", CCM_PCDR0, 16, 6); 123 clk[ssi1_div] = imx_clk_divider("ssi1_div", "ssi1_sel", CCM_PCDR0, 16, 6);
124 clk[ssi2_div] = imx_clk_divider("ssi2_div", "ssi2_sel", CCM_PCDR0, 26, 3); 124 clk[ssi2_div] = imx_clk_divider("ssi2_div", "ssi2_sel", CCM_PCDR0, 26, 6);
125 clk[clko_en] = imx_clk_gate("clko_en", "clko_div", CCM_PCCR0, 0); 125 clk[clko_en] = imx_clk_gate("clko_en", "clko_div", CCM_PCCR0, 0);
126 clk[ssi2_ipg_gate] = imx_clk_gate("ssi2_ipg_gate", "ipg", CCM_PCCR0, 0); 126 clk[ssi2_ipg_gate] = imx_clk_gate("ssi2_ipg_gate", "ipg", CCM_PCCR0, 0);
127 clk[ssi1_ipg_gate] = imx_clk_gate("ssi1_ipg_gate", "ipg", CCM_PCCR0, 1); 127 clk[ssi1_ipg_gate] = imx_clk_gate("ssi1_ipg_gate", "ipg", CCM_PCCR0, 1);
diff --git a/arch/arm/mach-imx/ehci-imx25.c b/arch/arm/mach-imx/ehci-imx25.c
index 412c583a24b0..576af7446952 100644
--- a/arch/arm/mach-imx/ehci-imx25.c
+++ b/arch/arm/mach-imx/ehci-imx25.c
@@ -30,7 +30,7 @@
30#define MX25_H1_SIC_SHIFT 21 30#define MX25_H1_SIC_SHIFT 21
31#define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT) 31#define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT)
32#define MX25_H1_PP_BIT (1 << 18) 32#define MX25_H1_PP_BIT (1 << 18)
33#define MX25_H1_PM_BIT (1 << 8) 33#define MX25_H1_PM_BIT (1 << 16)
34#define MX25_H1_IPPUE_UP_BIT (1 << 7) 34#define MX25_H1_IPPUE_UP_BIT (1 << 7)
35#define MX25_H1_IPPUE_DOWN_BIT (1 << 6) 35#define MX25_H1_IPPUE_DOWN_BIT (1 << 6)
36#define MX25_H1_TLL_BIT (1 << 5) 36#define MX25_H1_TLL_BIT (1 << 5)
diff --git a/arch/arm/mach-imx/ehci-imx35.c b/arch/arm/mach-imx/ehci-imx35.c
index 779e16eb65cb..293397852e4e 100644
--- a/arch/arm/mach-imx/ehci-imx35.c
+++ b/arch/arm/mach-imx/ehci-imx35.c
@@ -30,7 +30,7 @@
30#define MX35_H1_SIC_SHIFT 21 30#define MX35_H1_SIC_SHIFT 21
31#define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT) 31#define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT)
32#define MX35_H1_PP_BIT (1 << 18) 32#define MX35_H1_PP_BIT (1 << 18)
33#define MX35_H1_PM_BIT (1 << 8) 33#define MX35_H1_PM_BIT (1 << 16)
34#define MX35_H1_IPPUE_UP_BIT (1 << 7) 34#define MX35_H1_IPPUE_UP_BIT (1 << 7)
35#define MX35_H1_IPPUE_DOWN_BIT (1 << 6) 35#define MX35_H1_IPPUE_DOWN_BIT (1 << 6)
36#define MX35_H1_TLL_BIT (1 << 5) 36#define MX35_H1_TLL_BIT (1 << 5)
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 9d2c843bde02..b5deb0554552 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -108,9 +108,8 @@ void __init imx3_init_l2x0(void)
108 } 108 }
109 109
110 l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096); 110 l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096);
111 if (IS_ERR(l2x0_base)) { 111 if (!l2x0_base) {
112 printk(KERN_ERR "remapping L2 cache area failed with %ld\n", 112 printk(KERN_ERR "remapping L2 cache area failed\n");
113 PTR_ERR(l2x0_base));
114 return; 113 return;
115 } 114 }
116 115
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 1694f01ce2b6..6d6bde3e15fa 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -410,6 +410,7 @@ void __init ixp4xx_pci_preinit(void)
410 * Enable the IO window to be way up high, at 0xfffffc00 410 * Enable the IO window to be way up high, at 0xfffffc00
411 */ 411 */
412 local_write_config(PCI_BASE_ADDRESS_5, 4, 0xfffffc01); 412 local_write_config(PCI_BASE_ADDRESS_5, 4, 0xfffffc01);
413 local_write_config(0x40, 4, 0x000080FF); /* No TRDY time limit */
413 } else { 414 } else {
414 printk("PCI: IXP4xx is target - No bus scan performed\n"); 415 printk("PCI: IXP4xx is target - No bus scan performed\n");
415 } 416 }
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index fdf91a160884..8c0c0e2d0727 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -67,15 +67,12 @@ static struct map_desc ixp4xx_io_desc[] __initdata = {
67 .pfn = __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS), 67 .pfn = __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS),
68 .length = IXP4XX_PCI_CFG_REGION_SIZE, 68 .length = IXP4XX_PCI_CFG_REGION_SIZE,
69 .type = MT_DEVICE 69 .type = MT_DEVICE
70 }, 70 }, { /* Queue Manager */
71#ifdef CONFIG_DEBUG_LL 71 .virtual = (unsigned long)IXP4XX_QMGR_BASE_VIRT,
72 { /* Debug UART mapping */ 72 .pfn = __phys_to_pfn(IXP4XX_QMGR_BASE_PHYS),
73 .virtual = (unsigned long)IXP4XX_DEBUG_UART_BASE_VIRT, 73 .length = IXP4XX_QMGR_REGION_SIZE,
74 .pfn = __phys_to_pfn(IXP4XX_DEBUG_UART_BASE_PHYS),
75 .length = IXP4XX_DEBUG_UART_REGION_SIZE,
76 .type = MT_DEVICE 74 .type = MT_DEVICE
77 } 75 },
78#endif
79}; 76};
80 77
81void __init ixp4xx_map_io(void) 78void __init ixp4xx_map_io(void)
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index b800a031207c..53b8348dfcc2 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -15,6 +15,7 @@
15#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
16#include <asm/mach/flash.h> 16#include <asm/mach/flash.h>
17#include <asm/mach/pci.h> 17#include <asm/mach/pci.h>
18#include <asm/system_info.h>
18 19
19#define SLOT_ETHA 0x0B /* IDSEL = AD21 */ 20#define SLOT_ETHA 0x0B /* IDSEL = AD21 */
20#define SLOT_ETHB 0x0C /* IDSEL = AD20 */ 21#define SLOT_ETHB 0x0C /* IDSEL = AD20 */
@@ -329,7 +330,7 @@ static struct platform_device device_hss_tab[] = {
329}; 330};
330 331
331 332
332static struct platform_device *device_tab[6] __initdata = { 333static struct platform_device *device_tab[7] __initdata = {
333 &device_flash, /* index 0 */ 334 &device_flash, /* index 0 */
334}; 335};
335 336
diff --git a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
index 8c9f8d564492..ff686cbc5df4 100644
--- a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
@@ -17,8 +17,8 @@
17#else 17#else
18 mov \rp, #0 18 mov \rp, #0
19#endif 19#endif
20 orr \rv, \rp, #0xff000000 @ virtual 20 orr \rv, \rp, #0xfe000000 @ virtual
21 orr \rv, \rv, #0x00b00000 21 orr \rv, \rv, #0x00f00000
22 orr \rp, \rp, #0xc8000000 @ physical 22 orr \rp, \rp, #0xc8000000 @ physical
23 .endm 23 .endm
24 24
diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
index eb68b61ce975..c5bae9c035d5 100644
--- a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
@@ -30,51 +30,43 @@
30 * 30 *
31 * 0x50000000 0x10000000 ioremap'd EXP BUS 31 * 0x50000000 0x10000000 ioremap'd EXP BUS
32 * 32 *
33 * 0x6000000 0x00004000 ioremap'd QMgr 33 * 0xC8000000 0x00013000 0xFEF00000 On-Chip Peripherals
34 * 34 *
35 * 0xC0000000 0x00001000 0xffbff000 PCI CFG 35 * 0xC0000000 0x00001000 0xFEF13000 PCI CFG
36 * 36 *
37 * 0xC4000000 0x00001000 0xffbfe000 EXP CFG 37 * 0xC4000000 0x00001000 0xFEF14000 EXP CFG
38 * 38 *
39 * 0xC8000000 0x00013000 0xffbeb000 On-Chip Peripherals 39 * 0x60000000 0x00004000 0xFEF15000 QMgr
40 */ 40 */
41 41
42/* 42/*
43 * Queue Manager 43 * Queue Manager
44 */ 44 */
45#define IXP4XX_QMGR_BASE_PHYS (0x60000000) 45#define IXP4XX_QMGR_BASE_PHYS 0x60000000
46#define IXP4XX_QMGR_REGION_SIZE (0x00004000) 46#define IXP4XX_QMGR_BASE_VIRT IOMEM(0xFEF15000)
47#define IXP4XX_QMGR_REGION_SIZE 0x00004000
47 48
48/* 49/*
49 * Expansion BUS Configuration registers 50 * Peripheral space, including debug UART. Must be section-aligned so that
51 * it can be used with the low-level debug code.
50 */ 52 */
51#define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000) 53#define IXP4XX_PERIPHERAL_BASE_PHYS 0xC8000000
52#define IXP4XX_EXP_CFG_BASE_VIRT IOMEM(0xFFBFE000) 54#define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFEF00000)
53#define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000) 55#define IXP4XX_PERIPHERAL_REGION_SIZE 0x00013000
54 56
55/* 57/*
56 * PCI Config registers 58 * PCI Config registers
57 */ 59 */
58#define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000) 60#define IXP4XX_PCI_CFG_BASE_PHYS 0xC0000000
59#define IXP4XX_PCI_CFG_BASE_VIRT IOMEM(0xFFBFF000) 61#define IXP4XX_PCI_CFG_BASE_VIRT IOMEM(0xFEF13000)
60#define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000) 62#define IXP4XX_PCI_CFG_REGION_SIZE 0x00001000
61
62/*
63 * Peripheral space
64 */
65#define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000)
66#define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFFBEB000)
67#define IXP4XX_PERIPHERAL_REGION_SIZE (0x00013000)
68 63
69/* 64/*
70 * Debug UART 65 * Expansion BUS Configuration registers
71 *
72 * This is basically a remap of UART1 into a region that is section
73 * aligned so that it * can be used with the low-level debug code.
74 */ 66 */
75#define IXP4XX_DEBUG_UART_BASE_PHYS (0xC8000000) 67#define IXP4XX_EXP_CFG_BASE_PHYS 0xC4000000
76#define IXP4XX_DEBUG_UART_BASE_VIRT IOMEM(0xffb00000) 68#define IXP4XX_EXP_CFG_BASE_VIRT 0xFEF14000
77#define IXP4XX_DEBUG_UART_REGION_SIZE (0x00001000) 69#define IXP4XX_EXP_CFG_REGION_SIZE 0x00001000
78 70
79#define IXP4XX_EXP_CS0_OFFSET 0x00 71#define IXP4XX_EXP_CS0_OFFSET 0x00
80#define IXP4XX_EXP_CS1_OFFSET 0x04 72#define IXP4XX_EXP_CS1_OFFSET 0x04
diff --git a/arch/arm/mach-ixp4xx/include/mach/qmgr.h b/arch/arm/mach-ixp4xx/include/mach/qmgr.h
index 9e7cad2d54cb..4de8da536dbb 100644
--- a/arch/arm/mach-ixp4xx/include/mach/qmgr.h
+++ b/arch/arm/mach-ixp4xx/include/mach/qmgr.h
@@ -86,7 +86,7 @@ void qmgr_release_queue(unsigned int queue);
86 86
87static inline void qmgr_put_entry(unsigned int queue, u32 val) 87static inline void qmgr_put_entry(unsigned int queue, u32 val)
88{ 88{
89 extern struct qmgr_regs __iomem *qmgr_regs; 89 struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
90#if DEBUG_QMGR 90#if DEBUG_QMGR
91 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */ 91 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
92 92
@@ -99,7 +99,7 @@ static inline void qmgr_put_entry(unsigned int queue, u32 val)
99static inline u32 qmgr_get_entry(unsigned int queue) 99static inline u32 qmgr_get_entry(unsigned int queue)
100{ 100{
101 u32 val; 101 u32 val;
102 extern struct qmgr_regs __iomem *qmgr_regs; 102 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
103 val = __raw_readl(&qmgr_regs->acc[queue][0]); 103 val = __raw_readl(&qmgr_regs->acc[queue][0]);
104#if DEBUG_QMGR 104#if DEBUG_QMGR
105 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */ 105 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
@@ -112,14 +112,14 @@ static inline u32 qmgr_get_entry(unsigned int queue)
112 112
113static inline int __qmgr_get_stat1(unsigned int queue) 113static inline int __qmgr_get_stat1(unsigned int queue)
114{ 114{
115 extern struct qmgr_regs __iomem *qmgr_regs; 115 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
116 return (__raw_readl(&qmgr_regs->stat1[queue >> 3]) 116 return (__raw_readl(&qmgr_regs->stat1[queue >> 3])
117 >> ((queue & 7) << 2)) & 0xF; 117 >> ((queue & 7) << 2)) & 0xF;
118} 118}
119 119
120static inline int __qmgr_get_stat2(unsigned int queue) 120static inline int __qmgr_get_stat2(unsigned int queue)
121{ 121{
122 extern struct qmgr_regs __iomem *qmgr_regs; 122 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
123 BUG_ON(queue >= HALF_QUEUES); 123 BUG_ON(queue >= HALF_QUEUES);
124 return (__raw_readl(&qmgr_regs->stat2[queue >> 4]) 124 return (__raw_readl(&qmgr_regs->stat2[queue >> 4])
125 >> ((queue & 0xF) << 1)) & 0x3; 125 >> ((queue & 0xF) << 1)) & 0x3;
@@ -145,7 +145,7 @@ static inline int qmgr_stat_empty(unsigned int queue)
145 */ 145 */
146static inline int qmgr_stat_below_low_watermark(unsigned int queue) 146static inline int qmgr_stat_below_low_watermark(unsigned int queue)
147{ 147{
148 extern struct qmgr_regs __iomem *qmgr_regs; 148 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
149 if (queue >= HALF_QUEUES) 149 if (queue >= HALF_QUEUES)
150 return (__raw_readl(&qmgr_regs->statne_h) >> 150 return (__raw_readl(&qmgr_regs->statne_h) >>
151 (queue - HALF_QUEUES)) & 0x01; 151 (queue - HALF_QUEUES)) & 0x01;
@@ -172,7 +172,7 @@ static inline int qmgr_stat_above_high_watermark(unsigned int queue)
172 */ 172 */
173static inline int qmgr_stat_full(unsigned int queue) 173static inline int qmgr_stat_full(unsigned int queue)
174{ 174{
175 extern struct qmgr_regs __iomem *qmgr_regs; 175 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
176 if (queue >= HALF_QUEUES) 176 if (queue >= HALF_QUEUES)
177 return (__raw_readl(&qmgr_regs->statf_h) >> 177 return (__raw_readl(&qmgr_regs->statf_h) >>
178 (queue - HALF_QUEUES)) & 0x01; 178 (queue - HALF_QUEUES)) & 0x01;
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_npe.c b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
index a17ed79207a4..d4eb09a62863 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_npe.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
@@ -116,7 +116,11 @@
116/* NPE mailbox_status value for reset */ 116/* NPE mailbox_status value for reset */
117#define RESET_MBOX_STAT 0x0000F0F0 117#define RESET_MBOX_STAT 0x0000F0F0
118 118
119const char *npe_names[] = { "NPE-A", "NPE-B", "NPE-C" }; 119#define NPE_A_FIRMWARE "NPE-A"
120#define NPE_B_FIRMWARE "NPE-B"
121#define NPE_C_FIRMWARE "NPE-C"
122
123const char *npe_names[] = { NPE_A_FIRMWARE, NPE_B_FIRMWARE, NPE_C_FIRMWARE };
120 124
121#define print_npe(pri, npe, fmt, ...) \ 125#define print_npe(pri, npe, fmt, ...) \
122 printk(pri "%s: " fmt, npe_name(npe), ## __VA_ARGS__) 126 printk(pri "%s: " fmt, npe_name(npe), ## __VA_ARGS__)
@@ -724,6 +728,9 @@ module_exit(npe_cleanup_module);
724 728
725MODULE_AUTHOR("Krzysztof Halasa"); 729MODULE_AUTHOR("Krzysztof Halasa");
726MODULE_LICENSE("GPL v2"); 730MODULE_LICENSE("GPL v2");
731MODULE_FIRMWARE(NPE_A_FIRMWARE);
732MODULE_FIRMWARE(NPE_B_FIRMWARE);
733MODULE_FIRMWARE(NPE_C_FIRMWARE);
727 734
728EXPORT_SYMBOL(npe_names); 735EXPORT_SYMBOL(npe_names);
729EXPORT_SYMBOL(npe_running); 736EXPORT_SYMBOL(npe_running);
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
index 852f7c9f87d0..9d1b6b7c394c 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
@@ -14,7 +14,7 @@
14#include <linux/module.h> 14#include <linux/module.h>
15#include <mach/qmgr.h> 15#include <mach/qmgr.h>
16 16
17struct qmgr_regs __iomem *qmgr_regs; 17static struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
18static struct resource *mem_res; 18static struct resource *mem_res;
19static spinlock_t qmgr_lock; 19static spinlock_t qmgr_lock;
20static u32 used_sram_bitmap[4]; /* 128 16-dword pages */ 20static u32 used_sram_bitmap[4]; /* 128 16-dword pages */
@@ -293,12 +293,6 @@ static int qmgr_init(void)
293 if (mem_res == NULL) 293 if (mem_res == NULL)
294 return -EBUSY; 294 return -EBUSY;
295 295
296 qmgr_regs = ioremap(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
297 if (qmgr_regs == NULL) {
298 err = -ENOMEM;
299 goto error_map;
300 }
301
302 /* reset qmgr registers */ 296 /* reset qmgr registers */
303 for (i = 0; i < 4; i++) { 297 for (i = 0; i < 4; i++) {
304 __raw_writel(0x33333333, &qmgr_regs->stat1[i]); 298 __raw_writel(0x33333333, &qmgr_regs->stat1[i]);
@@ -347,8 +341,6 @@ static int qmgr_init(void)
347error_irq2: 341error_irq2:
348 free_irq(IRQ_IXP4XX_QM1, NULL); 342 free_irq(IRQ_IXP4XX_QM1, NULL);
349error_irq: 343error_irq:
350 iounmap(qmgr_regs);
351error_map:
352 release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE); 344 release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
353 return err; 345 return err;
354} 346}
@@ -359,7 +351,6 @@ static void qmgr_remove(void)
359 free_irq(IRQ_IXP4XX_QM2, NULL); 351 free_irq(IRQ_IXP4XX_QM2, NULL);
360 synchronize_irq(IRQ_IXP4XX_QM1); 352 synchronize_irq(IRQ_IXP4XX_QM1);
361 synchronize_irq(IRQ_IXP4XX_QM2); 353 synchronize_irq(IRQ_IXP4XX_QM2);
362 iounmap(qmgr_regs);
363 release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE); 354 release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
364} 355}
365 356
@@ -369,7 +360,6 @@ module_exit(qmgr_remove);
369MODULE_LICENSE("GPL v2"); 360MODULE_LICENSE("GPL v2");
370MODULE_AUTHOR("Krzysztof Halasa"); 361MODULE_AUTHOR("Krzysztof Halasa");
371 362
372EXPORT_SYMBOL(qmgr_regs);
373EXPORT_SYMBOL(qmgr_set_irq); 363EXPORT_SYMBOL(qmgr_set_irq);
374EXPORT_SYMBOL(qmgr_enable_irq); 364EXPORT_SYMBOL(qmgr_enable_irq);
375EXPORT_SYMBOL(qmgr_disable_irq); 365EXPORT_SYMBOL(qmgr_disable_irq);
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index ec544918b12c..74fc5a074fc4 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -207,14 +207,19 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
207 return 1; 207 return 1;
208} 208}
209 209
210/*
211 * The root complex has a hardwired class of PCI_CLASS_MEMORY_OTHER, when it
212 * is operating as a root complex this needs to be switched to
213 * PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on
214 * the device. Decoding setup is handled by the orion code.
215 */
210static void __devinit rc_pci_fixup(struct pci_dev *dev) 216static void __devinit rc_pci_fixup(struct pci_dev *dev)
211{ 217{
212 /*
213 * Prevent enumeration of root complex.
214 */
215 if (dev->bus->parent == NULL && dev->devfn == 0) { 218 if (dev->bus->parent == NULL && dev->devfn == 0) {
216 int i; 219 int i;
217 220
221 dev->class &= 0xff;
222 dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
218 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 223 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
219 dev->resource[i].start = 0; 224 dev->resource[i].start = 0;
220 dev->resource[i].end = 0; 225 dev->resource[i].end = 0;
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 2a1a898c7f90..d669e227e00c 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -11,7 +11,6 @@ config ARCH_OMAP2PLUS_TYPICAL
11 select I2C_OMAP 11 select I2C_OMAP
12 select MENELAUS if ARCH_OMAP2 12 select MENELAUS if ARCH_OMAP2
13 select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5 13 select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5
14 select PINCTRL
15 select PM_RUNTIME 14 select PM_RUNTIME
16 select REGULATOR 15 select REGULATOR
17 select SERIAL_OMAP 16 select SERIAL_OMAP
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 48d5e41dfbfa..378590694447 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -580,6 +580,11 @@ static void __init igep_wlan_bt_init(void)
580 } else 580 } else
581 return; 581 return;
582 582
583 /* Make sure that the GPIO pins are muxed correctly */
584 omap_mux_init_gpio(igep_wlan_bt_gpios[0].gpio, OMAP_PIN_OUTPUT);
585 omap_mux_init_gpio(igep_wlan_bt_gpios[1].gpio, OMAP_PIN_OUTPUT);
586 omap_mux_init_gpio(igep_wlan_bt_gpios[2].gpio, OMAP_PIN_OUTPUT);
587
583 err = gpio_request_array(igep_wlan_bt_gpios, 588 err = gpio_request_array(igep_wlan_bt_gpios,
584 ARRAY_SIZE(igep_wlan_bt_gpios)); 589 ARRAY_SIZE(igep_wlan_bt_gpios));
585 if (err) { 590 if (err) {
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 388c431c745a..d41ab98890ff 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -24,6 +24,7 @@
24#include <linux/input.h> 24#include <linux/input.h>
25#include <linux/gpio_keys.h> 25#include <linux/gpio_keys.h>
26#include <linux/opp.h> 26#include <linux/opp.h>
27#include <linux/cpu.h>
27 28
28#include <linux/mtd/mtd.h> 29#include <linux/mtd/mtd.h>
29#include <linux/mtd/partitions.h> 30#include <linux/mtd/partitions.h>
@@ -444,27 +445,31 @@ static struct omap_board_mux board_mux[] __initdata = {
444}; 445};
445#endif 446#endif
446 447
447static void __init beagle_opp_init(void) 448static int __init beagle_opp_init(void)
448{ 449{
449 int r = 0; 450 int r = 0;
450 451
451 /* Initialize the omap3 opp table */ 452 if (!machine_is_omap3_beagle())
452 if (omap3_opp_init()) { 453 return 0;
454
455 /* Initialize the omap3 opp table if not already created. */
456 r = omap3_opp_init();
457 if (IS_ERR_VALUE(r) && (r != -EEXIST)) {
453 pr_err("%s: opp default init failed\n", __func__); 458 pr_err("%s: opp default init failed\n", __func__);
454 return; 459 return r;
455 } 460 }
456 461
457 /* Custom OPP enabled for all xM versions */ 462 /* Custom OPP enabled for all xM versions */
458 if (cpu_is_omap3630()) { 463 if (cpu_is_omap3630()) {
459 struct device *mpu_dev, *iva_dev; 464 struct device *mpu_dev, *iva_dev;
460 465
461 mpu_dev = omap_device_get_by_hwmod_name("mpu"); 466 mpu_dev = get_cpu_device(0);
462 iva_dev = omap_device_get_by_hwmod_name("iva"); 467 iva_dev = omap_device_get_by_hwmod_name("iva");
463 468
464 if (IS_ERR(mpu_dev) || IS_ERR(iva_dev)) { 469 if (IS_ERR(mpu_dev) || IS_ERR(iva_dev)) {
465 pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n", 470 pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n",
466 __func__, mpu_dev, iva_dev); 471 __func__, mpu_dev, iva_dev);
467 return; 472 return -ENODEV;
468 } 473 }
469 /* Enable MPU 1GHz and lower opps */ 474 /* Enable MPU 1GHz and lower opps */
470 r = opp_enable(mpu_dev, 800000000); 475 r = opp_enable(mpu_dev, 800000000);
@@ -484,8 +489,9 @@ static void __init beagle_opp_init(void)
484 opp_disable(iva_dev, 660000000); 489 opp_disable(iva_dev, 660000000);
485 } 490 }
486 } 491 }
487 return; 492 return 0;
488} 493}
494device_initcall(beagle_opp_init);
489 495
490static void __init omap3_beagle_init(void) 496static void __init omap3_beagle_init(void)
491{ 497{
@@ -522,8 +528,6 @@ static void __init omap3_beagle_init(void)
522 /* Ensure SDRC pins are mux'd for self-refresh */ 528 /* Ensure SDRC pins are mux'd for self-refresh */
523 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); 529 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
524 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); 530 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
525
526 beagle_opp_init();
527} 531}
528 532
529MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") 533MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
diff --git a/arch/arm/mach-omap2/clock33xx_data.c b/arch/arm/mach-omap2/clock33xx_data.c
index 114ab4b8e0e3..1a45d6bd2539 100644
--- a/arch/arm/mach-omap2/clock33xx_data.c
+++ b/arch/arm/mach-omap2/clock33xx_data.c
@@ -1073,6 +1073,8 @@ static struct omap_clk am33xx_clks[] = {
1073 CLK(NULL, "gfx_fck_div_ck", &gfx_fck_div_ck, CK_AM33XX), 1073 CLK(NULL, "gfx_fck_div_ck", &gfx_fck_div_ck, CK_AM33XX),
1074 CLK(NULL, "sysclkout_pre_ck", &sysclkout_pre_ck, CK_AM33XX), 1074 CLK(NULL, "sysclkout_pre_ck", &sysclkout_pre_ck, CK_AM33XX),
1075 CLK(NULL, "clkout2_ck", &clkout2_ck, CK_AM33XX), 1075 CLK(NULL, "clkout2_ck", &clkout2_ck, CK_AM33XX),
1076 CLK(NULL, "timer_32k_ck", &clkdiv32k_ick, CK_AM33XX),
1077 CLK(NULL, "timer_sys_ck", &sys_clkin_ck, CK_AM33XX),
1076}; 1078};
1077 1079
1078int __init am33xx_clk_init(void) 1080int __init am33xx_clk_init(void)
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index b56d06b48782..95192a062d5d 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -359,7 +359,7 @@ static struct clockdomain iss_44xx_clkdm = {
359 .clkdm_offs = OMAP4430_CM2_CAM_CAM_CDOFFS, 359 .clkdm_offs = OMAP4430_CM2_CAM_CAM_CDOFFS,
360 .wkdep_srcs = iss_wkup_sleep_deps, 360 .wkdep_srcs = iss_wkup_sleep_deps,
361 .sleepdep_srcs = iss_wkup_sleep_deps, 361 .sleepdep_srcs = iss_wkup_sleep_deps,
362 .flags = CLKDM_CAN_HWSUP_SWSUP, 362 .flags = CLKDM_CAN_SWSUP,
363}; 363};
364 364
365static struct clockdomain l3_dss_44xx_clkdm = { 365static struct clockdomain l3_dss_44xx_clkdm = {
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index 48daac2581b4..84551f205e46 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -64,30 +64,36 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
64 struct spi_board_info *spi_bi = &ads7846_spi_board_info; 64 struct spi_board_info *spi_bi = &ads7846_spi_board_info;
65 int err; 65 int err;
66 66
67 err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown"); 67 /*
68 if (err) { 68 * If a board defines get_pendown_state() function, request the pendown
69 pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err); 69 * GPIO and set the GPIO debounce time.
70 return; 70 * If a board does not define the get_pendown_state() function, then
71 } 71 * the ads7846 driver will setup the pendown GPIO itself.
72 */
73 if (board_pdata && board_pdata->get_pendown_state) {
74 err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown");
75 if (err) {
76 pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err);
77 return;
78 }
72 79
73 if (gpio_debounce) 80 if (gpio_debounce)
74 gpio_set_debounce(gpio_pendown, gpio_debounce); 81 gpio_set_debounce(gpio_pendown, gpio_debounce);
82
83 gpio_export(gpio_pendown, 0);
84 }
75 85
76 spi_bi->bus_num = bus_num; 86 spi_bi->bus_num = bus_num;
77 spi_bi->irq = gpio_to_irq(gpio_pendown); 87 spi_bi->irq = gpio_to_irq(gpio_pendown);
78 88
89 ads7846_config.gpio_pendown = gpio_pendown;
90
79 if (board_pdata) { 91 if (board_pdata) {
80 board_pdata->gpio_pendown = gpio_pendown; 92 board_pdata->gpio_pendown = gpio_pendown;
93 board_pdata->gpio_pendown_debounce = gpio_debounce;
81 spi_bi->platform_data = board_pdata; 94 spi_bi->platform_data = board_pdata;
82 if (board_pdata->get_pendown_state)
83 gpio_export(gpio_pendown, 0);
84 } else {
85 ads7846_config.gpio_pendown = gpio_pendown;
86 } 95 }
87 96
88 if (!board_pdata || (board_pdata && !board_pdata->get_pendown_state))
89 gpio_free(gpio_pendown);
90
91 spi_register_board_info(&ads7846_spi_board_info, 1); 97 spi_register_board_info(&ads7846_spi_board_info, 1);
92} 98}
93#else 99#else
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index cba60e05e32e..c72b5a727720 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -19,6 +19,7 @@
19#include <linux/of.h> 19#include <linux/of.h>
20#include <linux/pinctrl/machine.h> 20#include <linux/pinctrl/machine.h>
21#include <linux/platform_data/omap4-keypad.h> 21#include <linux/platform_data/omap4-keypad.h>
22#include <linux/platform_data/omap_ocp2scp.h>
22 23
23#include <asm/mach-types.h> 24#include <asm/mach-types.h>
24#include <asm/mach/map.h> 25#include <asm/mach/map.h>
@@ -613,6 +614,83 @@ static void omap_init_vout(void)
613static inline void omap_init_vout(void) {} 614static inline void omap_init_vout(void) {}
614#endif 615#endif
615 616
617#if defined(CONFIG_OMAP_OCP2SCP) || defined(CONFIG_OMAP_OCP2SCP_MODULE)
618static int count_ocp2scp_devices(struct omap_ocp2scp_dev *ocp2scp_dev)
619{
620 int cnt = 0;
621
622 while (ocp2scp_dev->drv_name != NULL) {
623 cnt++;
624 ocp2scp_dev++;
625 }
626
627 return cnt;
628}
629
630static void omap_init_ocp2scp(void)
631{
632 struct omap_hwmod *oh;
633 struct platform_device *pdev;
634 int bus_id = -1, dev_cnt = 0, i;
635 struct omap_ocp2scp_dev *ocp2scp_dev;
636 const char *oh_name, *name;
637 struct omap_ocp2scp_platform_data *pdata;
638
639 if (!cpu_is_omap44xx())
640 return;
641
642 oh_name = "ocp2scp_usb_phy";
643 name = "omap-ocp2scp";
644
645 oh = omap_hwmod_lookup(oh_name);
646 if (!oh) {
647 pr_err("%s: could not find omap_hwmod for %s\n", __func__,
648 oh_name);
649 return;
650 }
651
652 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
653 if (!pdata) {
654 pr_err("%s: No memory for ocp2scp pdata\n", __func__);
655 return;
656 }
657
658 ocp2scp_dev = oh->dev_attr;
659 dev_cnt = count_ocp2scp_devices(ocp2scp_dev);
660
661 if (!dev_cnt) {
662 pr_err("%s: No devices connected to ocp2scp\n", __func__);
663 kfree(pdata);
664 return;
665 }
666
667 pdata->devices = kzalloc(sizeof(struct omap_ocp2scp_dev *)
668 * dev_cnt, GFP_KERNEL);
669 if (!pdata->devices) {
670 pr_err("%s: No memory for ocp2scp pdata devices\n", __func__);
671 kfree(pdata);
672 return;
673 }
674
675 for (i = 0; i < dev_cnt; i++, ocp2scp_dev++)
676 pdata->devices[i] = ocp2scp_dev;
677
678 pdata->dev_cnt = dev_cnt;
679
680 pdev = omap_device_build(name, bus_id, oh, pdata, sizeof(*pdata), NULL,
681 0, false);
682 if (IS_ERR(pdev)) {
683 pr_err("Could not build omap_device for %s %s\n",
684 name, oh_name);
685 kfree(pdata->devices);
686 kfree(pdata);
687 return;
688 }
689}
690#else
691static inline void omap_init_ocp2scp(void) { }
692#endif
693
616/*-------------------------------------------------------------------------*/ 694/*-------------------------------------------------------------------------*/
617 695
618static int __init omap2_init_devices(void) 696static int __init omap2_init_devices(void)
@@ -640,6 +718,7 @@ static int __init omap2_init_devices(void)
640 omap_init_sham(); 718 omap_init_sham();
641 omap_init_aes(); 719 omap_init_aes();
642 omap_init_vout(); 720 omap_init_vout();
721 omap_init_ocp2scp();
643 722
644 return 0; 723 return 0;
645} 724}
diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c
index 17f80e4ab162..c47140bbbec4 100644
--- a/arch/arm/mach-omap2/mux34xx.c
+++ b/arch/arm/mach-omap2/mux34xx.c
@@ -614,16 +614,16 @@ static struct omap_mux __initdata omap3_muxmodes[] = {
614 "sys_off_mode", NULL, NULL, NULL, 614 "sys_off_mode", NULL, NULL, NULL,
615 "gpio_9", NULL, NULL, "safe_mode"), 615 "gpio_9", NULL, NULL, "safe_mode"),
616 _OMAP3_MUXENTRY(UART1_CTS, 150, 616 _OMAP3_MUXENTRY(UART1_CTS, 150,
617 "uart1_cts", NULL, NULL, NULL, 617 "uart1_cts", "ssi1_rdy_tx", NULL, NULL,
618 "gpio_150", "hsusb3_tll_clk", NULL, "safe_mode"), 618 "gpio_150", "hsusb3_tll_clk", NULL, "safe_mode"),
619 _OMAP3_MUXENTRY(UART1_RTS, 149, 619 _OMAP3_MUXENTRY(UART1_RTS, 149,
620 "uart1_rts", NULL, NULL, NULL, 620 "uart1_rts", "ssi1_flag_tx", NULL, NULL,
621 "gpio_149", NULL, NULL, "safe_mode"), 621 "gpio_149", NULL, NULL, "safe_mode"),
622 _OMAP3_MUXENTRY(UART1_RX, 151, 622 _OMAP3_MUXENTRY(UART1_RX, 151,
623 "uart1_rx", NULL, "mcbsp1_clkr", "mcspi4_clk", 623 "uart1_rx", "ss1_wake_tx", "mcbsp1_clkr", "mcspi4_clk",
624 "gpio_151", NULL, NULL, "safe_mode"), 624 "gpio_151", NULL, NULL, "safe_mode"),
625 _OMAP3_MUXENTRY(UART1_TX, 148, 625 _OMAP3_MUXENTRY(UART1_TX, 148,
626 "uart1_tx", NULL, NULL, NULL, 626 "uart1_tx", "ssi1_dat_tx", NULL, NULL,
627 "gpio_148", NULL, NULL, "safe_mode"), 627 "gpio_148", NULL, NULL, "safe_mode"),
628 _OMAP3_MUXENTRY(UART2_CTS, 144, 628 _OMAP3_MUXENTRY(UART2_CTS, 144,
629 "uart2_cts", "mcbsp3_dx", "gpt9_pwm_evt", NULL, 629 "uart2_cts", "mcbsp3_dx", "gpt9_pwm_evt", NULL,
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index b969ab1d258b..87cc6d058de2 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -422,6 +422,38 @@ static int _set_softreset(struct omap_hwmod *oh, u32 *v)
422} 422}
423 423
424/** 424/**
425 * _wait_softreset_complete - wait for an OCP softreset to complete
426 * @oh: struct omap_hwmod * to wait on
427 *
428 * Wait until the IP block represented by @oh reports that its OCP
429 * softreset is complete. This can be triggered by software (see
430 * _ocp_softreset()) or by hardware upon returning from off-mode (one
431 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
432 * microseconds. Returns the number of microseconds waited.
433 */
434static int _wait_softreset_complete(struct omap_hwmod *oh)
435{
436 struct omap_hwmod_class_sysconfig *sysc;
437 u32 softrst_mask;
438 int c = 0;
439
440 sysc = oh->class->sysc;
441
442 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
443 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
444 & SYSS_RESETDONE_MASK),
445 MAX_MODULE_SOFTRESET_WAIT, c);
446 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
447 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
448 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
449 & softrst_mask),
450 MAX_MODULE_SOFTRESET_WAIT, c);
451 }
452
453 return c;
454}
455
456/**
425 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v 457 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
426 * @oh: struct omap_hwmod * 458 * @oh: struct omap_hwmod *
427 * 459 *
@@ -1282,6 +1314,18 @@ static void _enable_sysc(struct omap_hwmod *oh)
1282 if (!oh->class->sysc) 1314 if (!oh->class->sysc)
1283 return; 1315 return;
1284 1316
1317 /*
1318 * Wait until reset has completed, this is needed as the IP
1319 * block is reset automatically by hardware in some cases
1320 * (off-mode for example), and the drivers require the
1321 * IP to be ready when they access it
1322 */
1323 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1324 _enable_optional_clocks(oh);
1325 _wait_softreset_complete(oh);
1326 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1327 _disable_optional_clocks(oh);
1328
1285 v = oh->_sysc_cache; 1329 v = oh->_sysc_cache;
1286 sf = oh->class->sysc->sysc_flags; 1330 sf = oh->class->sysc->sysc_flags;
1287 1331
@@ -1804,7 +1848,7 @@ static int _am33xx_disable_module(struct omap_hwmod *oh)
1804 */ 1848 */
1805static int _ocp_softreset(struct omap_hwmod *oh) 1849static int _ocp_softreset(struct omap_hwmod *oh)
1806{ 1850{
1807 u32 v, softrst_mask; 1851 u32 v;
1808 int c = 0; 1852 int c = 0;
1809 int ret = 0; 1853 int ret = 0;
1810 1854
@@ -1834,19 +1878,7 @@ static int _ocp_softreset(struct omap_hwmod *oh)
1834 if (oh->class->sysc->srst_udelay) 1878 if (oh->class->sysc->srst_udelay)
1835 udelay(oh->class->sysc->srst_udelay); 1879 udelay(oh->class->sysc->srst_udelay);
1836 1880
1837 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS) 1881 c = _wait_softreset_complete(oh);
1838 omap_test_timeout((omap_hwmod_read(oh,
1839 oh->class->sysc->syss_offs)
1840 & SYSS_RESETDONE_MASK),
1841 MAX_MODULE_SOFTRESET_WAIT, c);
1842 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1843 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
1844 omap_test_timeout(!(omap_hwmod_read(oh,
1845 oh->class->sysc->sysc_offs)
1846 & softrst_mask),
1847 MAX_MODULE_SOFTRESET_WAIT, c);
1848 }
1849
1850 if (c == MAX_MODULE_SOFTRESET_WAIT) 1882 if (c == MAX_MODULE_SOFTRESET_WAIT)
1851 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n", 1883 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1852 oh->name, MAX_MODULE_SOFTRESET_WAIT); 1884 oh->name, MAX_MODULE_SOFTRESET_WAIT);
@@ -2352,6 +2384,9 @@ static int __init _setup_reset(struct omap_hwmod *oh)
2352 if (oh->_state != _HWMOD_STATE_INITIALIZED) 2384 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2353 return -EINVAL; 2385 return -EINVAL;
2354 2386
2387 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2388 return -EPERM;
2389
2355 if (oh->rst_lines_cnt == 0) { 2390 if (oh->rst_lines_cnt == 0) {
2356 r = _enable(oh); 2391 r = _enable(oh);
2357 if (r) { 2392 if (r) {
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 652d0285bd6d..0b1249e00398 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -21,6 +21,7 @@
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/platform_data/gpio-omap.h> 22#include <linux/platform_data/gpio-omap.h>
23#include <linux/power/smartreflex.h> 23#include <linux/power/smartreflex.h>
24#include <linux/platform_data/omap_ocp2scp.h>
24 25
25#include <plat/omap_hwmod.h> 26#include <plat/omap_hwmod.h>
26#include <plat/i2c.h> 27#include <plat/i2c.h>
@@ -2125,6 +2126,14 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {
2125 .name = "mcpdm", 2126 .name = "mcpdm",
2126 .class = &omap44xx_mcpdm_hwmod_class, 2127 .class = &omap44xx_mcpdm_hwmod_class,
2127 .clkdm_name = "abe_clkdm", 2128 .clkdm_name = "abe_clkdm",
2129 /*
2130 * It's suspected that the McPDM requires an off-chip main
2131 * functional clock, controlled via I2C. This IP block is
2132 * currently reset very early during boot, before I2C is
2133 * available, so it doesn't seem that we have any choice in
2134 * the kernel other than to avoid resetting it.
2135 */
2136 .flags = HWMOD_EXT_OPT_MAIN_CLK,
2128 .mpu_irqs = omap44xx_mcpdm_irqs, 2137 .mpu_irqs = omap44xx_mcpdm_irqs,
2129 .sdma_reqs = omap44xx_mcpdm_sdma_reqs, 2138 .sdma_reqs = omap44xx_mcpdm_sdma_reqs,
2130 .main_clk = "mcpdm_fck", 2139 .main_clk = "mcpdm_fck",
@@ -2681,6 +2690,32 @@ static struct omap_hwmod_class omap44xx_ocp2scp_hwmod_class = {
2681 .sysc = &omap44xx_ocp2scp_sysc, 2690 .sysc = &omap44xx_ocp2scp_sysc,
2682}; 2691};
2683 2692
2693/* ocp2scp dev_attr */
2694static struct resource omap44xx_usb_phy_and_pll_addrs[] = {
2695 {
2696 .name = "usb_phy",
2697 .start = 0x4a0ad080,
2698 .end = 0x4a0ae000,
2699 .flags = IORESOURCE_MEM,
2700 },
2701 {
2702 /* XXX: Remove this once control module driver is in place */
2703 .name = "ctrl_dev",
2704 .start = 0x4a002300,
2705 .end = 0x4a002303,
2706 .flags = IORESOURCE_MEM,
2707 },
2708 { }
2709};
2710
2711static struct omap_ocp2scp_dev ocp2scp_dev_attr[] = {
2712 {
2713 .drv_name = "omap-usb2",
2714 .res = omap44xx_usb_phy_and_pll_addrs,
2715 },
2716 { }
2717};
2718
2684/* ocp2scp_usb_phy */ 2719/* ocp2scp_usb_phy */
2685static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = { 2720static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
2686 .name = "ocp2scp_usb_phy", 2721 .name = "ocp2scp_usb_phy",
@@ -2694,6 +2729,7 @@ static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
2694 .modulemode = MODULEMODE_HWCTRL, 2729 .modulemode = MODULEMODE_HWCTRL,
2695 }, 2730 },
2696 }, 2731 },
2732 .dev_attr = ocp2scp_dev_attr,
2697}; 2733};
2698 2734
2699/* 2735/*
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 686137d164da..67d66131cfa7 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -91,6 +91,7 @@ extern void omap3_save_scratchpad_contents(void);
91 91
92#define PM_RTA_ERRATUM_i608 (1 << 0) 92#define PM_RTA_ERRATUM_i608 (1 << 0)
93#define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1) 93#define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1)
94#define PM_PER_MEMORIES_ERRATUM_i582 (1 << 2)
94 95
95#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) 96#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
96extern u16 pm34xx_errata; 97extern u16 pm34xx_errata;
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index ba670db1fd37..3a904de4313e 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -652,14 +652,17 @@ static void __init pm_errata_configure(void)
652 /* Enable the l2 cache toggling in sleep logic */ 652 /* Enable the l2 cache toggling in sleep logic */
653 enable_omap3630_toggle_l2_on_restore(); 653 enable_omap3630_toggle_l2_on_restore();
654 if (omap_rev() < OMAP3630_REV_ES1_2) 654 if (omap_rev() < OMAP3630_REV_ES1_2)
655 pm34xx_errata |= PM_SDRC_WAKEUP_ERRATUM_i583; 655 pm34xx_errata |= (PM_SDRC_WAKEUP_ERRATUM_i583 |
656 PM_PER_MEMORIES_ERRATUM_i582);
657 } else if (cpu_is_omap34xx()) {
658 pm34xx_errata |= PM_PER_MEMORIES_ERRATUM_i582;
656 } 659 }
657} 660}
658 661
659int __init omap3_pm_init(void) 662int __init omap3_pm_init(void)
660{ 663{
661 struct power_state *pwrst, *tmp; 664 struct power_state *pwrst, *tmp;
662 struct clockdomain *neon_clkdm, *mpu_clkdm; 665 struct clockdomain *neon_clkdm, *mpu_clkdm, *per_clkdm, *wkup_clkdm;
663 int ret; 666 int ret;
664 667
665 if (!omap3_has_io_chain_ctrl()) 668 if (!omap3_has_io_chain_ctrl())
@@ -711,6 +714,8 @@ int __init omap3_pm_init(void)
711 714
712 neon_clkdm = clkdm_lookup("neon_clkdm"); 715 neon_clkdm = clkdm_lookup("neon_clkdm");
713 mpu_clkdm = clkdm_lookup("mpu_clkdm"); 716 mpu_clkdm = clkdm_lookup("mpu_clkdm");
717 per_clkdm = clkdm_lookup("per_clkdm");
718 wkup_clkdm = clkdm_lookup("wkup_clkdm");
714 719
715#ifdef CONFIG_SUSPEND 720#ifdef CONFIG_SUSPEND
716 omap_pm_suspend = omap3_pm_suspend; 721 omap_pm_suspend = omap3_pm_suspend;
@@ -727,6 +732,27 @@ int __init omap3_pm_init(void)
727 if (IS_PM34XX_ERRATUM(PM_RTA_ERRATUM_i608)) 732 if (IS_PM34XX_ERRATUM(PM_RTA_ERRATUM_i608))
728 omap3630_ctrl_disable_rta(); 733 omap3630_ctrl_disable_rta();
729 734
735 /*
736 * The UART3/4 FIFO and the sidetone memory in McBSP2/3 are
737 * not correctly reset when the PER powerdomain comes back
738 * from OFF or OSWR when the CORE powerdomain is kept active.
739 * See OMAP36xx Erratum i582 "PER Domain reset issue after
740 * Domain-OFF/OSWR Wakeup". This wakeup dependency is not a
741 * complete workaround. The kernel must also prevent the PER
742 * powerdomain from going to OSWR/OFF while the CORE
743 * powerdomain is not going to OSWR/OFF. And if PER last
744 * power state was off while CORE last power state was ON, the
745 * UART3/4 and McBSP2/3 SIDETONE devices need to run a
746 * self-test using their loopback tests; if that fails, those
747 * devices are unusable until the PER/CORE can complete a transition
748 * from ON to OSWR/OFF and then back to ON.
749 *
750 * XXX Technically this workaround is only needed if off-mode
751 * or OSWR is enabled.
752 */
753 if (IS_PM34XX_ERRATUM(PM_PER_MEMORIES_ERRATUM_i582))
754 clkdm_add_wkdep(per_clkdm, wkup_clkdm);
755
730 clkdm_add_wkdep(neon_clkdm, mpu_clkdm); 756 clkdm_add_wkdep(neon_clkdm, mpu_clkdm);
731 if (omap_type() != OMAP2_DEVICE_TYPE_GP) { 757 if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
732 omap3_secure_ram_storage = 758 omap3_secure_ram_storage =
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 0405c8190803..a507cd6cf4f1 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -329,6 +329,11 @@ void __init omap_serial_init_port(struct omap_board_data *bdata,
329 329
330 oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); 330 oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
331 331
332 if (console_uart_id == bdata->id) {
333 omap_device_enable(pdev);
334 pm_runtime_set_active(&pdev->dev);
335 }
336
332 oh->dev_attr = uart; 337 oh->dev_attr = uart;
333 338
334 if (((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads) 339 if (((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads)
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 635e109f5ad3..a256135d8e48 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -73,6 +73,7 @@ void __init omap4_pmic_init(const char *pmic_type,
73{ 73{
74 /* PMIC part*/ 74 /* PMIC part*/
75 omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE); 75 omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
76 omap_mux_init_signal("fref_clk0_out.sys_drm_msecure", OMAP_PIN_OUTPUT);
76 omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data); 77 omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data);
77 78
78 /* Register additional devices on i2c1 bus if needed */ 79 /* Register additional devices on i2c1 bus if needed */
@@ -366,7 +367,7 @@ static struct regulator_init_data omap4_clk32kg_idata = {
366}; 367};
367 368
368static struct regulator_consumer_supply omap4_vdd1_supply[] = { 369static struct regulator_consumer_supply omap4_vdd1_supply[] = {
369 REGULATOR_SUPPLY("vcc", "mpu.0"), 370 REGULATOR_SUPPLY("vcc", "cpu0"),
370}; 371};
371 372
372static struct regulator_consumer_supply omap4_vdd2_supply[] = { 373static struct regulator_consumer_supply omap4_vdd2_supply[] = {
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 880249b17012..75878c37959b 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -264,7 +264,7 @@ static void __init omap_vc_i2c_init(struct voltagedomain *voltdm)
264 264
265 if (initialized) { 265 if (initialized) {
266 if (voltdm->pmic->i2c_high_speed != i2c_high_speed) 266 if (voltdm->pmic->i2c_high_speed != i2c_high_speed)
267 pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).", 267 pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).\n",
268 __func__, voltdm->name, i2c_high_speed); 268 __func__, voltdm->name, i2c_high_speed);
269 return; 269 return;
270 } 270 }
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 5ecbd17b5641..e2c6391863fe 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -28,6 +28,7 @@
28#include <linux/mfd/asic3.h> 28#include <linux/mfd/asic3.h>
29#include <linux/mtd/physmap.h> 29#include <linux/mtd/physmap.h>
30#include <linux/pda_power.h> 30#include <linux/pda_power.h>
31#include <linux/pwm.h>
31#include <linux/pwm_backlight.h> 32#include <linux/pwm_backlight.h>
32#include <linux/regulator/driver.h> 33#include <linux/regulator/driver.h>
33#include <linux/regulator/gpio-regulator.h> 34#include <linux/regulator/gpio-regulator.h>
@@ -556,7 +557,7 @@ static struct platform_device hx4700_lcd = {
556 */ 557 */
557 558
558static struct platform_pwm_backlight_data backlight_data = { 559static struct platform_pwm_backlight_data backlight_data = {
559 .pwm_id = 1, 560 .pwm_id = -1, /* Superseded by pwm_lookup */
560 .max_brightness = 200, 561 .max_brightness = 200,
561 .dft_brightness = 100, 562 .dft_brightness = 100,
562 .pwm_period_ns = 30923, 563 .pwm_period_ns = 30923,
@@ -571,6 +572,10 @@ static struct platform_device backlight = {
571 }, 572 },
572}; 573};
573 574
575static struct pwm_lookup hx4700_pwm_lookup[] = {
576 PWM_LOOKUP("pxa27x-pwm.1", 0, "pwm-backlight", NULL),
577};
578
574/* 579/*
575 * USB "Transceiver" 580 * USB "Transceiver"
576 */ 581 */
@@ -872,6 +877,7 @@ static void __init hx4700_init(void)
872 pxa_set_stuart_info(NULL); 877 pxa_set_stuart_info(NULL);
873 878
874 platform_add_devices(devices, ARRAY_SIZE(devices)); 879 platform_add_devices(devices, ARRAY_SIZE(devices));
880 pwm_add_table(hx4700_pwm_lookup, ARRAY_SIZE(hx4700_pwm_lookup));
875 881
876 pxa_set_ficp_info(&ficp_info); 882 pxa_set_ficp_info(&ficp_info);
877 pxa27x_set_i2c_power_info(NULL); 883 pxa27x_set_i2c_power_info(NULL);
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 438f02fe122a..842596d4d31e 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -86,10 +86,7 @@ static void spitz_discharge1(int on)
86 gpio_set_value(SPITZ_GPIO_LED_GREEN, on); 86 gpio_set_value(SPITZ_GPIO_LED_GREEN, on);
87} 87}
88 88
89static unsigned long gpio18_config[] = { 89static unsigned long gpio18_config = GPIO18_GPIO;
90 GPIO18_RDY,
91 GPIO18_GPIO,
92};
93 90
94static void spitz_presuspend(void) 91static void spitz_presuspend(void)
95{ 92{
@@ -112,7 +109,7 @@ static void spitz_presuspend(void)
112 PGSR3 &= ~SPITZ_GPIO_G3_STROBE_BIT; 109 PGSR3 &= ~SPITZ_GPIO_G3_STROBE_BIT;
113 PGSR2 |= GPIO_bit(SPITZ_GPIO_KEY_STROBE0); 110 PGSR2 |= GPIO_bit(SPITZ_GPIO_KEY_STROBE0);
114 111
115 pxa2xx_mfp_config(&gpio18_config[0], 1); 112 pxa2xx_mfp_config(&gpio18_config, 1);
116 gpio_request_one(18, GPIOF_OUT_INIT_HIGH, "Unknown"); 113 gpio_request_one(18, GPIOF_OUT_INIT_HIGH, "Unknown");
117 gpio_free(18); 114 gpio_free(18);
118 115
@@ -131,7 +128,6 @@ static void spitz_presuspend(void)
131 128
132static void spitz_postsuspend(void) 129static void spitz_postsuspend(void)
133{ 130{
134 pxa2xx_mfp_config(&gpio18_config[1], 1);
135} 131}
136 132
137static int spitz_should_wakeup(unsigned int resume_on_alarm) 133static int spitz_should_wakeup(unsigned int resume_on_alarm)
diff --git a/arch/arm/mach-s3c24xx/s3c2416.c b/arch/arm/mach-s3c24xx/s3c2416.c
index ed5a95ece9eb..77ee0b732237 100644
--- a/arch/arm/mach-s3c24xx/s3c2416.c
+++ b/arch/arm/mach-s3c24xx/s3c2416.c
@@ -61,6 +61,7 @@
61#include <plat/nand-core.h> 61#include <plat/nand-core.h>
62#include <plat/adc-core.h> 62#include <plat/adc-core.h>
63#include <plat/rtc-core.h> 63#include <plat/rtc-core.h>
64#include <plat/spi-core.h>
64 65
65static struct map_desc s3c2416_iodesc[] __initdata = { 66static struct map_desc s3c2416_iodesc[] __initdata = {
66 IODESC_ENT(WATCHDOG), 67 IODESC_ENT(WATCHDOG),
@@ -132,6 +133,7 @@ void __init s3c2416_map_io(void)
132 /* initialize device information early */ 133 /* initialize device information early */
133 s3c2416_default_sdhci0(); 134 s3c2416_default_sdhci0();
134 s3c2416_default_sdhci1(); 135 s3c2416_default_sdhci1();
136 s3c64xx_spi_setname("s3c2443-spi");
135 137
136 iotable_init(s3c2416_iodesc, ARRAY_SIZE(s3c2416_iodesc)); 138 iotable_init(s3c2416_iodesc, ARRAY_SIZE(s3c2416_iodesc));
137} 139}
diff --git a/arch/arm/mach-s3c24xx/s3c2443.c b/arch/arm/mach-s3c24xx/s3c2443.c
index ab648ad8fa50..165b6a6b3daa 100644
--- a/arch/arm/mach-s3c24xx/s3c2443.c
+++ b/arch/arm/mach-s3c24xx/s3c2443.c
@@ -43,6 +43,7 @@
43#include <plat/nand-core.h> 43#include <plat/nand-core.h>
44#include <plat/adc-core.h> 44#include <plat/adc-core.h>
45#include <plat/rtc-core.h> 45#include <plat/rtc-core.h>
46#include <plat/spi-core.h>
46 47
47static struct map_desc s3c2443_iodesc[] __initdata = { 48static struct map_desc s3c2443_iodesc[] __initdata = {
48 IODESC_ENT(WATCHDOG), 49 IODESC_ENT(WATCHDOG),
@@ -100,6 +101,9 @@ void __init s3c2443_map_io(void)
100 s3c24xx_gpiocfg_default.set_pull = s3c2443_gpio_setpull; 101 s3c24xx_gpiocfg_default.set_pull = s3c2443_gpio_setpull;
101 s3c24xx_gpiocfg_default.get_pull = s3c2443_gpio_getpull; 102 s3c24xx_gpiocfg_default.get_pull = s3c2443_gpio_getpull;
102 103
104 /* initialize device information early */
105 s3c64xx_spi_setname("s3c2443-spi");
106
103 iotable_init(s3c2443_iodesc, ARRAY_SIZE(s3c2443_iodesc)); 107 iotable_init(s3c2443_iodesc, ARRAY_SIZE(s3c2443_iodesc));
104} 108}
105 109
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index 6e6a0a9d6778..111e404a81fd 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -44,6 +44,7 @@
44#include <plat/sdhci.h> 44#include <plat/sdhci.h>
45#include <plat/adc-core.h> 45#include <plat/adc-core.h>
46#include <plat/fb-core.h> 46#include <plat/fb-core.h>
47#include <plat/spi-core.h>
47#include <plat/gpio-cfg.h> 48#include <plat/gpio-cfg.h>
48#include <plat/regs-irqtype.h> 49#include <plat/regs-irqtype.h>
49#include <plat/regs-serial.h> 50#include <plat/regs-serial.h>
@@ -179,6 +180,7 @@ void __init s5p6440_map_io(void)
179 /* initialize any device information early */ 180 /* initialize any device information early */
180 s3c_adc_setname("s3c64xx-adc"); 181 s3c_adc_setname("s3c64xx-adc");
181 s3c_fb_setname("s5p64x0-fb"); 182 s3c_fb_setname("s5p64x0-fb");
183 s3c64xx_spi_setname("s5p64x0-spi");
182 184
183 s5p64x0_default_sdhci0(); 185 s5p64x0_default_sdhci0();
184 s5p64x0_default_sdhci1(); 186 s5p64x0_default_sdhci1();
@@ -193,6 +195,7 @@ void __init s5p6450_map_io(void)
193 /* initialize any device information early */ 195 /* initialize any device information early */
194 s3c_adc_setname("s3c64xx-adc"); 196 s3c_adc_setname("s3c64xx-adc");
195 s3c_fb_setname("s5p64x0-fb"); 197 s3c_fb_setname("s5p64x0-fb");
198 s3c64xx_spi_setname("s5p64x0-spi");
196 199
197 s5p64x0_default_sdhci0(); 200 s5p64x0_default_sdhci0();
198 s5p64x0_default_sdhci1(); 201 s5p64x0_default_sdhci1();
diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c
index 621908658861..cc6e561c9958 100644
--- a/arch/arm/mach-s5pc100/common.c
+++ b/arch/arm/mach-s5pc100/common.c
@@ -45,6 +45,7 @@
45#include <plat/fb-core.h> 45#include <plat/fb-core.h>
46#include <plat/iic-core.h> 46#include <plat/iic-core.h>
47#include <plat/onenand-core.h> 47#include <plat/onenand-core.h>
48#include <plat/spi-core.h>
48#include <plat/regs-serial.h> 49#include <plat/regs-serial.h>
49#include <plat/watchdog-reset.h> 50#include <plat/watchdog-reset.h>
50 51
@@ -165,6 +166,8 @@ void __init s5pc100_map_io(void)
165 s3c_onenand_setname("s5pc100-onenand"); 166 s3c_onenand_setname("s5pc100-onenand");
166 s3c_fb_setname("s5pc100-fb"); 167 s3c_fb_setname("s5pc100-fb");
167 s3c_cfcon_setname("s5pc100-pata"); 168 s3c_cfcon_setname("s5pc100-pata");
169
170 s3c64xx_spi_setname("s5pc100-spi");
168} 171}
169 172
170void __init s5pc100_init_clocks(int xtal) 173void __init s5pc100_init_clocks(int xtal)
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c
index 4c9e9027df9a..a0c50efe8145 100644
--- a/arch/arm/mach-s5pv210/common.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -43,6 +43,7 @@
43#include <plat/iic-core.h> 43#include <plat/iic-core.h>
44#include <plat/keypad-core.h> 44#include <plat/keypad-core.h>
45#include <plat/tv-core.h> 45#include <plat/tv-core.h>
46#include <plat/spi-core.h>
46#include <plat/regs-serial.h> 47#include <plat/regs-serial.h>
47 48
48#include "common.h" 49#include "common.h"
@@ -196,6 +197,8 @@ void __init s5pv210_map_io(void)
196 197
197 /* setup TV devices */ 198 /* setup TV devices */
198 s5p_hdmi_setname("s5pv210-hdmi"); 199 s5p_hdmi_setname("s5pv210-hdmi");
200
201 s3c64xx_spi_setname("s5pv210-spi");
199} 202}
200 203
201void __init s5pv210_init_clocks(int xtal) 204void __init s5pv210_init_clocks(int xtal)
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index 2917668f0091..ebbffc25f24f 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -247,7 +247,7 @@ void __init r8a7779_add_standard_devices(void)
247{ 247{
248#ifdef CONFIG_CACHE_L2X0 248#ifdef CONFIG_CACHE_L2X0
249 /* Early BRESP enable, Shared attribute override enable, 64K*16way */ 249 /* Early BRESP enable, Shared attribute override enable, 64K*16way */
250 l2x0_init((void __iomem __force *)(0xf0100000), 0x40470000, 0x82000fff); 250 l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff);
251#endif 251#endif
252 r8a7779_pm_init(); 252 r8a7779_pm_init();
253 253
diff --git a/arch/arm/mach-spear13xx/include/mach/spear1310_misc_regs.h b/arch/arm/mach-spear13xx/include/mach/spear1310_misc_regs.h
deleted file mode 100644
index e69de29bb2d1..000000000000
--- a/arch/arm/mach-spear13xx/include/mach/spear1310_misc_regs.h
+++ /dev/null
diff --git a/arch/arm/mach-spear13xx/include/mach/spear1340_misc_regs.h b/arch/arm/mach-spear13xx/include/mach/spear1340_misc_regs.h
deleted file mode 100644
index e69de29bb2d1..000000000000
--- a/arch/arm/mach-spear13xx/include/mach/spear1340_misc_regs.h
+++ /dev/null
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index 2236cbd03cd7..1f3fbc2bb776 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -16,6 +16,7 @@
16#include <linux/stat.h> 16#include <linux/stat.h>
17#include <linux/of.h> 17#include <linux/of.h>
18#include <linux/of_irq.h> 18#include <linux/of_irq.h>
19#include <linux/irq.h>
19#include <linux/platform_data/clk-ux500.h> 20#include <linux/platform_data/clk-ux500.h>
20 21
21#include <asm/hardware/gic.h> 22#include <asm/hardware/gic.h>
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index b9f60ebe3bc4..b820edaf3184 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -745,7 +745,7 @@ do_alignment_t32_to_handler(unsigned long *pinstr, struct pt_regs *regs,
745static int 745static int
746do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) 746do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
747{ 747{
748 union offset_union offset; 748 union offset_union uninitialized_var(offset);
749 unsigned long instr = 0, instrptr; 749 unsigned long instr = 0, instrptr;
750 int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs); 750 int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs);
751 unsigned int type; 751 unsigned int type;
@@ -856,8 +856,10 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
856 if (thumb2_32b) { 856 if (thumb2_32b) {
857 offset.un = 0; 857 offset.un = 0;
858 handler = do_alignment_t32_to_handler(&instr, regs, &offset); 858 handler = do_alignment_t32_to_handler(&instr, regs, &offset);
859 } else 859 } else {
860 offset.un = 0;
860 handler = do_alignment_ldmstm; 861 handler = do_alignment_ldmstm;
862 }
861 break; 863 break;
862 864
863 default: 865 default:
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 477a2d23ddf1..58bc3e4d3bd0 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -610,7 +610,7 @@ static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
610 gfp_t gfp, pgprot_t prot, bool is_coherent, const void *caller) 610 gfp_t gfp, pgprot_t prot, bool is_coherent, const void *caller)
611{ 611{
612 u64 mask = get_coherent_dma_mask(dev); 612 u64 mask = get_coherent_dma_mask(dev);
613 struct page *page; 613 struct page *page = NULL;
614 void *addr; 614 void *addr;
615 615
616#ifdef CONFIG_DMA_API_DEBUG 616#ifdef CONFIG_DMA_API_DEBUG
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 86b8b480634f..09c5233f4dfc 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -89,7 +89,7 @@ ENTRY(cpu_v6_dcache_clean_area)
89 mov pc, lr 89 mov pc, lr
90 90
91/* 91/*
92 * cpu_arm926_switch_mm(pgd_phys, tsk) 92 * cpu_v6_switch_mm(pgd_phys, tsk)
93 * 93 *
94 * Set the translation table base pointer to be pgd_phys 94 * Set the translation table base pointer to be pgd_phys
95 * 95 *
diff --git a/arch/arm/mm/vmregion.h b/arch/arm/mm/vmregion.h
index bf312c354a21..0f5a5f2a2c7b 100644
--- a/arch/arm/mm/vmregion.h
+++ b/arch/arm/mm/vmregion.h
@@ -17,7 +17,6 @@ struct arm_vmregion {
17 struct list_head vm_list; 17 struct list_head vm_list;
18 unsigned long vm_start; 18 unsigned long vm_start;
19 unsigned long vm_end; 19 unsigned long vm_end;
20 void *priv;
21 int vm_active; 20 int vm_active;
22 const void *caller; 21 const void *caller;
23}; 22};
diff --git a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c b/arch/arm/plat-mxc/devices/platform-mxc-mmc.c
index 540d3a7d92df..e7b920b58675 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c
+++ b/arch/arm/plat-mxc/devices/platform-mxc-mmc.c
@@ -55,7 +55,7 @@ struct platform_device *__init imx_add_mxc_mmc(
55 struct resource res[] = { 55 struct resource res[] = {
56 { 56 {
57 .start = data->iobase, 57 .start = data->iobase,
58 .end = data->iobase + SZ_4K - 1, 58 .end = data->iobase + data->iosize - 1,
59 .flags = IORESOURCE_MEM, 59 .flags = IORESOURCE_MEM,
60 }, { 60 }, {
61 .start = data->irq, 61 .start = data->irq,
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 7cd56ed5cd94..82fcb206b5b2 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -26,6 +26,7 @@ config ARCH_OMAP2PLUS
26 select CLKDEV_LOOKUP 26 select CLKDEV_LOOKUP
27 select GENERIC_IRQ_CHIP 27 select GENERIC_IRQ_CHIP
28 select OMAP_DM_TIMER 28 select OMAP_DM_TIMER
29 select PINCTRL
29 select PROC_DEVICETREE if PROC_FS 30 select PROC_DEVICETREE if PROC_FS
30 select SPARSE_IRQ 31 select SPARSE_IRQ
31 select USE_OF 32 select USE_OF
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index a5683a84c6ee..6013831a043e 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -26,12 +26,14 @@
26#include <linux/kernel.h> 26#include <linux/kernel.h>
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/i2c.h> 28#include <linux/i2c.h>
29#include <linux/i2c-omap.h>
29#include <linux/slab.h> 30#include <linux/slab.h>
30#include <linux/err.h> 31#include <linux/err.h>
31#include <linux/clk.h> 32#include <linux/clk.h>
32 33
33#include <mach/irqs.h> 34#include <mach/irqs.h>
34#include <plat/i2c.h> 35#include <plat/i2c.h>
36#include <plat/omap-pm.h>
35#include <plat/omap_device.h> 37#include <plat/omap_device.h>
36 38
37#define OMAP_I2C_SIZE 0x3f 39#define OMAP_I2C_SIZE 0x3f
@@ -127,6 +129,16 @@ static inline int omap1_i2c_add_bus(int bus_id)
127 129
128 130
129#ifdef CONFIG_ARCH_OMAP2PLUS 131#ifdef CONFIG_ARCH_OMAP2PLUS
132/*
133 * XXX This function is a temporary compatibility wrapper - only
134 * needed until the I2C driver can be converted to call
135 * omap_pm_set_max_dev_wakeup_lat() and handle a return code.
136 */
137static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
138{
139 omap_pm_set_max_mpu_wakeup_lat(dev, t);
140}
141
130static inline int omap2_i2c_add_bus(int bus_id) 142static inline int omap2_i2c_add_bus(int bus_id)
131{ 143{
132 int l; 144 int l;
@@ -158,6 +170,15 @@ static inline int omap2_i2c_add_bus(int bus_id)
158 dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr; 170 dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
159 pdata->flags = dev_attr->flags; 171 pdata->flags = dev_attr->flags;
160 172
173 /*
174 * When waiting for completion of a i2c transfer, we need to
175 * set a wake up latency constraint for the MPU. This is to
176 * ensure quick enough wakeup from idle, when transfer
177 * completes.
178 * Only omap3 has support for constraints
179 */
180 if (cpu_is_omap34xx())
181 pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
161 pdev = omap_device_build(name, bus_id, oh, pdata, 182 pdev = omap_device_build(name, bus_id, oh, pdata,
162 sizeof(struct omap_i2c_bus_platform_data), 183 sizeof(struct omap_i2c_bus_platform_data),
163 NULL, 0, 0); 184 NULL, 0, 0);
diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h
index f4a4cd014795..1957a8516e93 100644
--- a/arch/arm/plat-omap/include/plat/omap-serial.h
+++ b/arch/arm/plat-omap/include/plat/omap-serial.h
@@ -40,10 +40,10 @@
40#define OMAP_UART_WER_MOD_WKUP 0X7F 40#define OMAP_UART_WER_MOD_WKUP 0X7F
41 41
42/* Enable XON/XOFF flow control on output */ 42/* Enable XON/XOFF flow control on output */
43#define OMAP_UART_SW_TX 0x8 43#define OMAP_UART_SW_TX 0x04
44 44
45/* Enable XON/XOFF flow control on input */ 45/* Enable XON/XOFF flow control on input */
46#define OMAP_UART_SW_RX 0x2 46#define OMAP_UART_SW_RX 0x04
47 47
48#define OMAP_UART_SYSC_RESET 0X07 48#define OMAP_UART_SYSC_RESET 0X07
49#define OMAP_UART_TCR_TRIG 0X0F 49#define OMAP_UART_TCR_TRIG 0X0F
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index b3349f7b1a2c..1db029438022 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -443,6 +443,11 @@ struct omap_hwmod_omap4_prcm {
443 * in order to complete the reset. Optional clocks will be disabled 443 * in order to complete the reset. Optional clocks will be disabled
444 * again after the reset. 444 * again after the reset.
445 * HWMOD_16BIT_REG: Module has 16bit registers 445 * HWMOD_16BIT_REG: Module has 16bit registers
446 * HWMOD_EXT_OPT_MAIN_CLK: The only main functional clock source for
447 * this IP block comes from an off-chip source and is not always
448 * enabled. This prevents the hwmod code from being able to
449 * enable and reset the IP block early. XXX Eventually it should
450 * be possible to query the clock framework for this information.
446 */ 451 */
447#define HWMOD_SWSUP_SIDLE (1 << 0) 452#define HWMOD_SWSUP_SIDLE (1 << 0)
448#define HWMOD_SWSUP_MSTANDBY (1 << 1) 453#define HWMOD_SWSUP_MSTANDBY (1 << 1)
@@ -453,6 +458,7 @@ struct omap_hwmod_omap4_prcm {
453#define HWMOD_NO_IDLEST (1 << 6) 458#define HWMOD_NO_IDLEST (1 << 6)
454#define HWMOD_CONTROL_OPT_CLKS_IN_RESET (1 << 7) 459#define HWMOD_CONTROL_OPT_CLKS_IN_RESET (1 << 7)
455#define HWMOD_16BIT_REG (1 << 8) 460#define HWMOD_16BIT_REG (1 << 8)
461#define HWMOD_EXT_OPT_MAIN_CLK (1 << 9)
456 462
457/* 463/*
458 * omap_hwmod._int_flags definitions 464 * omap_hwmod._int_flags definitions
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index db98e7021f0d..0abd1c469887 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -473,12 +473,13 @@ int s3c2410_dma_enqueue(enum dma_ch channel, void *id,
473 pr_debug("dma%d: %s: buffer %p queued onto non-empty channel\n", 473 pr_debug("dma%d: %s: buffer %p queued onto non-empty channel\n",
474 chan->number, __func__, buf); 474 chan->number, __func__, buf);
475 475
476 if (chan->end == NULL) 476 if (chan->end == NULL) {
477 pr_debug("dma%d: %s: %p not empty, and chan->end==NULL?\n", 477 pr_debug("dma%d: %s: %p not empty, and chan->end==NULL?\n",
478 chan->number, __func__, chan); 478 chan->number, __func__, chan);
479 479 } else {
480 chan->end->next = buf; 480 chan->end->next = buf;
481 chan->end = buf; 481 chan->end = buf;
482 }
482 } 483 }
483 484
484 /* if necessary, update the next buffer field */ 485 /* if necessary, update the next buffer field */
diff --git a/arch/arm/plat-samsung/include/plat/spi-core.h b/arch/arm/plat-samsung/include/plat/spi-core.h
new file mode 100644
index 000000000000..0b9428ab3fc3
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/spi-core.h
@@ -0,0 +1,30 @@
1/*
2 * Copyright (C) 2012 Heiko Stuebner <heiko@sntech.de>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __PLAT_S3C_SPI_CORE_H
10#define __PLAT_S3C_SPI_CORE_H
11
12/* These functions are only for use with the core support code, such as
13 * the cpu specific initialisation code
14 */
15
16/* re-define device name depending on support. */
17static inline void s3c64xx_spi_setname(char *name)
18{
19#ifdef CONFIG_S3C64XX_DEV_SPI0
20 s3c64xx_device_spi0.name = name;
21#endif
22#ifdef CONFIG_S3C64XX_DEV_SPI1
23 s3c64xx_device_spi1.name = name;
24#endif
25#ifdef CONFIG_S3C64XX_DEV_SPI2
26 s3c64xx_device_spi2.name = name;
27#endif
28}
29
30#endif /* __PLAT_S3C_SPI_CORE_H */
diff --git a/arch/arm/tools/Makefile b/arch/arm/tools/Makefile
index 635cb1865e4d..32d05c8219dc 100644
--- a/arch/arm/tools/Makefile
+++ b/arch/arm/tools/Makefile
@@ -5,6 +5,6 @@
5# 5#
6 6
7include/generated/mach-types.h: $(src)/gen-mach-types $(src)/mach-types 7include/generated/mach-types.h: $(src)/gen-mach-types $(src)/mach-types
8 @echo ' Generating $@' 8 @$(kecho) ' Generating $@'
9 @mkdir -p $(dir $@) 9 @mkdir -p $(dir $@)
10 $(Q)$(AWK) -f $^ > $@ || { rm -f $@; /bin/false; } 10 $(Q)$(AWK) -f $^ > $@ || { rm -f $@; /bin/false; }
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index c834b32af275..3b44e0dd0a93 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -701,11 +701,14 @@ static int __init vfp_init(void)
701 elf_hwcap |= HWCAP_VFPv3; 701 elf_hwcap |= HWCAP_VFPv3;
702 702
703 /* 703 /*
704 * Check for VFPv3 D16. CPUs in this configuration 704 * Check for VFPv3 D16 and VFPv4 D16. CPUs in
705 * only have 16 x 64bit registers. 705 * this configuration only have 16 x 64bit
706 * registers.
706 */ 707 */
707 if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1) 708 if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1)
708 elf_hwcap |= HWCAP_VFPv3D16; 709 elf_hwcap |= HWCAP_VFPv3D16; /* also v4-D16 */
710 else
711 elf_hwcap |= HWCAP_VFPD32;
709 } 712 }
710#endif 713#endif
711 /* 714 /*
diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c
index 59bcb96ac369..f57609275449 100644
--- a/arch/arm/xen/enlighten.c
+++ b/arch/arm/xen/enlighten.c
@@ -166,3 +166,14 @@ void free_xenballooned_pages(int nr_pages, struct page **pages)
166 *pages = NULL; 166 *pages = NULL;
167} 167}
168EXPORT_SYMBOL_GPL(free_xenballooned_pages); 168EXPORT_SYMBOL_GPL(free_xenballooned_pages);
169
170/* In the hypervisor.S file. */
171EXPORT_SYMBOL_GPL(HYPERVISOR_event_channel_op);
172EXPORT_SYMBOL_GPL(HYPERVISOR_grant_table_op);
173EXPORT_SYMBOL_GPL(HYPERVISOR_xen_version);
174EXPORT_SYMBOL_GPL(HYPERVISOR_console_io);
175EXPORT_SYMBOL_GPL(HYPERVISOR_sched_op);
176EXPORT_SYMBOL_GPL(HYPERVISOR_hvm_op);
177EXPORT_SYMBOL_GPL(HYPERVISOR_memory_op);
178EXPORT_SYMBOL_GPL(HYPERVISOR_physdev_op);
179EXPORT_SYMBOL_GPL(privcmd_call);
diff --git a/arch/arm/xen/hypercall.S b/arch/arm/xen/hypercall.S
index 074f5ed101b9..71f723984cbd 100644
--- a/arch/arm/xen/hypercall.S
+++ b/arch/arm/xen/hypercall.S
@@ -48,20 +48,16 @@
48 48
49#include <linux/linkage.h> 49#include <linux/linkage.h>
50#include <asm/assembler.h> 50#include <asm/assembler.h>
51#include <asm/opcodes-virt.h>
51#include <xen/interface/xen.h> 52#include <xen/interface/xen.h>
52 53
53 54
54/* HVC 0xEA1 */ 55#define XEN_IMM 0xEA1
55#ifdef CONFIG_THUMB2_KERNEL
56#define xen_hvc .word 0xf7e08ea1
57#else
58#define xen_hvc .word 0xe140ea71
59#endif
60 56
61#define HYPERCALL_SIMPLE(hypercall) \ 57#define HYPERCALL_SIMPLE(hypercall) \
62ENTRY(HYPERVISOR_##hypercall) \ 58ENTRY(HYPERVISOR_##hypercall) \
63 mov r12, #__HYPERVISOR_##hypercall; \ 59 mov r12, #__HYPERVISOR_##hypercall; \
64 xen_hvc; \ 60 __HVC(XEN_IMM); \
65 mov pc, lr; \ 61 mov pc, lr; \
66ENDPROC(HYPERVISOR_##hypercall) 62ENDPROC(HYPERVISOR_##hypercall)
67 63
@@ -76,7 +72,7 @@ ENTRY(HYPERVISOR_##hypercall) \
76 stmdb sp!, {r4} \ 72 stmdb sp!, {r4} \
77 ldr r4, [sp, #4] \ 73 ldr r4, [sp, #4] \
78 mov r12, #__HYPERVISOR_##hypercall; \ 74 mov r12, #__HYPERVISOR_##hypercall; \
79 xen_hvc \ 75 __HVC(XEN_IMM); \
80 ldm sp!, {r4} \ 76 ldm sp!, {r4} \
81 mov pc, lr \ 77 mov pc, lr \
82ENDPROC(HYPERVISOR_##hypercall) 78ENDPROC(HYPERVISOR_##hypercall)
@@ -100,7 +96,7 @@ ENTRY(privcmd_call)
100 mov r2, r3 96 mov r2, r3
101 ldr r3, [sp, #8] 97 ldr r3, [sp, #8]
102 ldr r4, [sp, #4] 98 ldr r4, [sp, #4]
103 xen_hvc 99 __HVC(XEN_IMM)
104 ldm sp!, {r4} 100 ldm sp!, {r4}
105 mov pc, lr 101 mov pc, lr
106ENDPROC(privcmd_call); 102ENDPROC(privcmd_call);
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index ef54a59a9e89..15ac18a56c93 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1,6 +1,7 @@
1config ARM64 1config ARM64
2 def_bool y 2 def_bool y
3 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 3 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
4 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
4 select GENERIC_CLOCKEVENTS 5 select GENERIC_CLOCKEVENTS
5 select GENERIC_HARDIRQS_NO_DEPRECATED 6 select GENERIC_HARDIRQS_NO_DEPRECATED
6 select GENERIC_IOMAP 7 select GENERIC_IOMAP
diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
index cf284649dfcb..07fea290d7c1 100644
--- a/arch/arm64/include/asm/elf.h
+++ b/arch/arm64/include/asm/elf.h
@@ -25,12 +25,10 @@
25#include <asm/user.h> 25#include <asm/user.h>
26 26
27typedef unsigned long elf_greg_t; 27typedef unsigned long elf_greg_t;
28typedef unsigned long elf_freg_t[3];
29 28
30#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) 29#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
31typedef elf_greg_t elf_gregset_t[ELF_NGREG]; 30typedef elf_greg_t elf_gregset_t[ELF_NGREG];
32 31typedef struct user_fpsimd_state elf_fpregset_t;
33typedef struct user_fp elf_fpregset_t;
34 32
35#define EM_AARCH64 183 33#define EM_AARCH64 183
36 34
@@ -87,7 +85,6 @@ typedef struct user_fp elf_fpregset_t;
87#define R_AARCH64_MOVW_PREL_G2_NC 292 85#define R_AARCH64_MOVW_PREL_G2_NC 292
88#define R_AARCH64_MOVW_PREL_G3 293 86#define R_AARCH64_MOVW_PREL_G3 293
89 87
90
91/* 88/*
92 * These are used to set parameters in the core dumps. 89 * These are used to set parameters in the core dumps.
93 */ 90 */
diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
index b42fab9f62a9..c43b4ac13008 100644
--- a/arch/arm64/include/asm/fpsimd.h
+++ b/arch/arm64/include/asm/fpsimd.h
@@ -25,9 +25,8 @@
25 * - FPSR and FPCR 25 * - FPSR and FPCR
26 * - 32 128-bit data registers 26 * - 32 128-bit data registers
27 * 27 *
28 * Note that user_fp forms a prefix of this structure, which is relied 28 * Note that user_fpsimd forms a prefix of this structure, which is
29 * upon in the ptrace FP/SIMD accessors. struct user_fpsimd_state must 29 * relied upon in the ptrace FP/SIMD accessors.
30 * form a prefix of struct fpsimd_state.
31 */ 30 */
32struct fpsimd_state { 31struct fpsimd_state {
33 union { 32 union {
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index 74a2a7d304a9..d2f05a608274 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h
@@ -114,7 +114,7 @@ static inline u64 __raw_readq(const volatile void __iomem *addr)
114 * I/O port access primitives. 114 * I/O port access primitives.
115 */ 115 */
116#define IO_SPACE_LIMIT 0xffff 116#define IO_SPACE_LIMIT 0xffff
117#define PCI_IOBASE ((void __iomem *)0xffffffbbfffe0000UL) 117#define PCI_IOBASE ((void __iomem *)(MODULES_VADDR - SZ_2M))
118 118
119static inline u8 inb(unsigned long addr) 119static inline u8 inb(unsigned long addr)
120{ 120{
@@ -222,12 +222,12 @@ extern void __iomem *__ioremap(phys_addr_t phys_addr, size_t size, pgprot_t prot
222extern void __iounmap(volatile void __iomem *addr); 222extern void __iounmap(volatile void __iomem *addr);
223 223
224#define PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_DIRTY) 224#define PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_DIRTY)
225#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_XN | PTE_ATTRINDX(MT_DEVICE_nGnRE)) 225#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRE))
226#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL_NC)) 226#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL_NC))
227 227
228#define ioremap(addr, size) __ioremap((addr), (size), PROT_DEVICE_nGnRE) 228#define ioremap(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))
229#define ioremap_nocache(addr, size) __ioremap((addr), (size), PROT_DEVICE_nGnRE) 229#define ioremap_nocache(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))
230#define ioremap_wc(addr, size) __ioremap((addr), (size), PROT_NORMAL_NC) 230#define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC))
231#define iounmap __iounmap 231#define iounmap __iounmap
232 232
233#define ARCH_HAS_IOREMAP_WC 233#define ARCH_HAS_IOREMAP_WC
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h
index 0f3b4581d925..75fd13d289b9 100644
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -38,7 +38,8 @@
38#define PMD_SECT_S (_AT(pmdval_t, 3) << 8) 38#define PMD_SECT_S (_AT(pmdval_t, 3) << 8)
39#define PMD_SECT_AF (_AT(pmdval_t, 1) << 10) 39#define PMD_SECT_AF (_AT(pmdval_t, 1) << 10)
40#define PMD_SECT_NG (_AT(pmdval_t, 1) << 11) 40#define PMD_SECT_NG (_AT(pmdval_t, 1) << 11)
41#define PMD_SECT_XN (_AT(pmdval_t, 1) << 54) 41#define PMD_SECT_PXN (_AT(pmdval_t, 1) << 53)
42#define PMD_SECT_UXN (_AT(pmdval_t, 1) << 54)
42 43
43/* 44/*
44 * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers). 45 * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).
@@ -57,7 +58,8 @@
57#define PTE_SHARED (_AT(pteval_t, 3) << 8) /* SH[1:0], inner shareable */ 58#define PTE_SHARED (_AT(pteval_t, 3) << 8) /* SH[1:0], inner shareable */
58#define PTE_AF (_AT(pteval_t, 1) << 10) /* Access Flag */ 59#define PTE_AF (_AT(pteval_t, 1) << 10) /* Access Flag */
59#define PTE_NG (_AT(pteval_t, 1) << 11) /* nG */ 60#define PTE_NG (_AT(pteval_t, 1) << 11) /* nG */
60#define PTE_XN (_AT(pteval_t, 1) << 54) /* XN */ 61#define PTE_PXN (_AT(pteval_t, 1) << 53) /* Privileged XN */
62#define PTE_UXN (_AT(pteval_t, 1) << 54) /* User XN */
61 63
62/* 64/*
63 * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers). 65 * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index 8960239be722..14aba2db6776 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -62,23 +62,23 @@ extern pgprot_t pgprot_default;
62 62
63#define _MOD_PROT(p, b) __pgprot(pgprot_val(p) | (b)) 63#define _MOD_PROT(p, b) __pgprot(pgprot_val(p) | (b))
64 64
65#define PAGE_NONE _MOD_PROT(pgprot_default, PTE_NG | PTE_XN | PTE_RDONLY) 65#define PAGE_NONE _MOD_PROT(pgprot_default, PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
66#define PAGE_SHARED _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_XN) 66#define PAGE_SHARED _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
67#define PAGE_SHARED_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG) 67#define PAGE_SHARED_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN)
68#define PAGE_COPY _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY) 68#define PAGE_COPY _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
69#define PAGE_COPY_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_RDONLY) 69#define PAGE_COPY_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
70#define PAGE_READONLY _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY) 70#define PAGE_READONLY _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
71#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_RDONLY) 71#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
72#define PAGE_KERNEL _MOD_PROT(pgprot_default, PTE_XN | PTE_DIRTY) 72#define PAGE_KERNEL _MOD_PROT(pgprot_default, PTE_PXN | PTE_UXN | PTE_DIRTY)
73#define PAGE_KERNEL_EXEC _MOD_PROT(pgprot_default, PTE_DIRTY) 73#define PAGE_KERNEL_EXEC _MOD_PROT(pgprot_default, PTE_UXN | PTE_DIRTY)
74 74
75#define __PAGE_NONE __pgprot(_PAGE_DEFAULT | PTE_NG | PTE_XN | PTE_RDONLY) 75#define __PAGE_NONE __pgprot(_PAGE_DEFAULT | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
76#define __PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_XN) 76#define __PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
77#define __PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG) 77#define __PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN)
78#define __PAGE_COPY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY) 78#define __PAGE_COPY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
79#define __PAGE_COPY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_RDONLY) 79#define __PAGE_COPY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
80#define __PAGE_READONLY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY) 80#define __PAGE_READONLY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
81#define __PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_RDONLY) 81#define __PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
82 82
83#endif /* __ASSEMBLY__ */ 83#endif /* __ASSEMBLY__ */
84 84
@@ -130,10 +130,10 @@ extern struct page *empty_zero_page;
130#define pte_young(pte) (pte_val(pte) & PTE_AF) 130#define pte_young(pte) (pte_val(pte) & PTE_AF)
131#define pte_special(pte) (pte_val(pte) & PTE_SPECIAL) 131#define pte_special(pte) (pte_val(pte) & PTE_SPECIAL)
132#define pte_write(pte) (!(pte_val(pte) & PTE_RDONLY)) 132#define pte_write(pte) (!(pte_val(pte) & PTE_RDONLY))
133#define pte_exec(pte) (!(pte_val(pte) & PTE_XN)) 133#define pte_exec(pte) (!(pte_val(pte) & PTE_UXN))
134 134
135#define pte_present_exec_user(pte) \ 135#define pte_present_exec_user(pte) \
136 ((pte_val(pte) & (PTE_VALID | PTE_USER | PTE_XN)) == \ 136 ((pte_val(pte) & (PTE_VALID | PTE_USER | PTE_UXN)) == \
137 (PTE_VALID | PTE_USER)) 137 (PTE_VALID | PTE_USER))
138 138
139#define PTE_BIT_FUNC(fn,op) \ 139#define PTE_BIT_FUNC(fn,op) \
@@ -262,7 +262,7 @@ static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
262 262
263static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 263static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
264{ 264{
265 const pteval_t mask = PTE_USER | PTE_XN | PTE_RDONLY; 265 const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY;
266 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask); 266 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
267 return pte; 267 return pte;
268} 268}
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index 5d810044feda..77f696c14339 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -43,6 +43,8 @@
43#else 43#else
44#define STACK_TOP STACK_TOP_MAX 44#define STACK_TOP STACK_TOP_MAX
45#endif /* CONFIG_COMPAT */ 45#endif /* CONFIG_COMPAT */
46
47#define ARCH_LOW_ADDRESS_LIMIT PHYS_MASK
46#endif /* __KERNEL__ */ 48#endif /* __KERNEL__ */
47 49
48struct debug_info { 50struct debug_info {
diff --git a/arch/arm64/include/asm/unistd.h b/arch/arm64/include/asm/unistd.h
index 63f853f8b718..68aff2816e86 100644
--- a/arch/arm64/include/asm/unistd.h
+++ b/arch/arm64/include/asm/unistd.h
@@ -14,7 +14,6 @@
14 * along with this program. If not, see <http://www.gnu.org/licenses/>. 14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */ 15 */
16#ifdef CONFIG_COMPAT 16#ifdef CONFIG_COMPAT
17#define __ARCH_WANT_COMPAT_IPC_PARSE_VERSION
18#define __ARCH_WANT_COMPAT_STAT64 17#define __ARCH_WANT_COMPAT_STAT64
19#define __ARCH_WANT_SYS_GETHOSTNAME 18#define __ARCH_WANT_SYS_GETHOSTNAME
20#define __ARCH_WANT_SYS_PAUSE 19#define __ARCH_WANT_SYS_PAUSE
diff --git a/arch/arm64/include/asm/unistd32.h b/arch/arm64/include/asm/unistd32.h
index 6d909faebf28..656a6f291a35 100644
--- a/arch/arm64/include/asm/unistd32.h
+++ b/arch/arm64/include/asm/unistd32.h
@@ -392,7 +392,7 @@ __SYSCALL(367, sys_fanotify_init)
392__SYSCALL(368, compat_sys_fanotify_mark_wrapper) 392__SYSCALL(368, compat_sys_fanotify_mark_wrapper)
393__SYSCALL(369, sys_prlimit64) 393__SYSCALL(369, sys_prlimit64)
394__SYSCALL(370, sys_name_to_handle_at) 394__SYSCALL(370, sys_name_to_handle_at)
395__SYSCALL(371, sys_open_by_handle_at) 395__SYSCALL(371, compat_sys_open_by_handle_at)
396__SYSCALL(372, sys_clock_adjtime) 396__SYSCALL(372, sys_clock_adjtime)
397__SYSCALL(373, sys_syncfs) 397__SYSCALL(373, sys_syncfs)
398 398
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index ecbf2d81ec5c..c76c7241125b 100644
--- a/arch/arm64/kernel/perf_event.c
+++ b/arch/arm64/kernel/perf_event.c
@@ -613,17 +613,11 @@ enum armv8_pmuv3_perf_types {
613 ARMV8_PMUV3_PERFCTR_BUS_ACCESS = 0x19, 613 ARMV8_PMUV3_PERFCTR_BUS_ACCESS = 0x19,
614 ARMV8_PMUV3_PERFCTR_MEM_ERROR = 0x1A, 614 ARMV8_PMUV3_PERFCTR_MEM_ERROR = 0x1A,
615 ARMV8_PMUV3_PERFCTR_BUS_CYCLES = 0x1D, 615 ARMV8_PMUV3_PERFCTR_BUS_CYCLES = 0x1D,
616
617 /*
618 * This isn't an architected event.
619 * We detect this event number and use the cycle counter instead.
620 */
621 ARMV8_PMUV3_PERFCTR_CPU_CYCLES = 0xFF,
622}; 616};
623 617
624/* PMUv3 HW events mapping. */ 618/* PMUv3 HW events mapping. */
625static const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX] = { 619static const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX] = {
626 [PERF_COUNT_HW_CPU_CYCLES] = ARMV8_PMUV3_PERFCTR_CPU_CYCLES, 620 [PERF_COUNT_HW_CPU_CYCLES] = ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES,
627 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV8_PMUV3_PERFCTR_INSTR_EXECUTED, 621 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV8_PMUV3_PERFCTR_INSTR_EXECUTED,
628 [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_ACCESS, 622 [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_ACCESS,
629 [PERF_COUNT_HW_CACHE_MISSES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_REFILL, 623 [PERF_COUNT_HW_CACHE_MISSES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_REFILL,
@@ -1106,7 +1100,7 @@ static int armv8pmu_get_event_idx(struct pmu_hw_events *cpuc,
1106 unsigned long evtype = event->config_base & ARMV8_EVTYPE_EVENT; 1100 unsigned long evtype = event->config_base & ARMV8_EVTYPE_EVENT;
1107 1101
1108 /* Always place a cycle counter into the cycle counter. */ 1102 /* Always place a cycle counter into the cycle counter. */
1109 if (evtype == ARMV8_PMUV3_PERFCTR_CPU_CYCLES) { 1103 if (evtype == ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES) {
1110 if (test_and_set_bit(ARMV8_IDX_CYCLE_COUNTER, cpuc->used_mask)) 1104 if (test_and_set_bit(ARMV8_IDX_CYCLE_COUNTER, cpuc->used_mask))
1111 return -EAGAIN; 1105 return -EAGAIN;
1112 1106
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index f22965ea1cfc..e04cebdbb47f 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -310,24 +310,6 @@ struct task_struct *__switch_to(struct task_struct *prev,
310} 310}
311 311
312/* 312/*
313 * Fill in the task's elfregs structure for a core dump.
314 */
315int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs)
316{
317 elf_core_copy_regs(elfregs, task_pt_regs(t));
318 return 1;
319}
320
321/*
322 * fill in the fpe structure for a core dump...
323 */
324int dump_fpu (struct pt_regs *regs, struct user_fp *fp)
325{
326 return 0;
327}
328EXPORT_SYMBOL(dump_fpu);
329
330/*
331 * Shuffle the argument into the correct register before calling the 313 * Shuffle the argument into the correct register before calling the
332 * thread function. x1 is the thread argument, x2 is the pointer to 314 * thread function. x1 is the thread argument, x2 is the pointer to
333 * the thread function, and x3 points to the exit function. 315 * the thread function, and x3 points to the exit function.
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 226b6bf6e9c2..538300f2273d 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -211,8 +211,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
211 * before we continue. 211 * before we continue.
212 */ 212 */
213 set_cpu_online(cpu, true); 213 set_cpu_online(cpu, true);
214 while (!cpu_active(cpu)) 214 complete(&cpu_running);
215 cpu_relax();
216 215
217 /* 216 /*
218 * OK, it's off to the idle thread for us 217 * OK, it's off to the idle thread for us
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index efbf7df05d3f..4cd28931dba9 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -80,7 +80,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
80#ifdef CONFIG_ZONE_DMA32 80#ifdef CONFIG_ZONE_DMA32
81 /* 4GB maximum for 32-bit only capable devices */ 81 /* 4GB maximum for 32-bit only capable devices */
82 max_dma32 = min(max, MAX_DMA32_PFN); 82 max_dma32 = min(max, MAX_DMA32_PFN);
83 zone_size[ZONE_DMA32] = max_dma32 - min; 83 zone_size[ZONE_DMA32] = max(min, max_dma32) - min;
84#endif 84#endif
85 zone_size[ZONE_NORMAL] = max - max_dma32; 85 zone_size[ZONE_NORMAL] = max - max_dma32;
86 86
diff --git a/arch/c6x/include/asm/setup.h b/arch/c6x/include/asm/setup.h
new file mode 100644
index 000000000000..ecead15872a6
--- /dev/null
+++ b/arch/c6x/include/asm/setup.h
@@ -0,0 +1,33 @@
1/*
2 * Port on Texas Instruments TMS320C6x architecture
3 *
4 * Copyright (C) 2004, 2009, 2010 2011 Texas Instruments Incorporated
5 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef _ASM_C6X_SETUP_H
12#define _ASM_C6X_SETUP_H
13
14#include <uapi/asm/setup.h>
15
16#ifndef __ASSEMBLY__
17extern char c6x_command_line[COMMAND_LINE_SIZE];
18
19extern int c6x_add_memory(phys_addr_t start, unsigned long size);
20
21extern unsigned long ram_start;
22extern unsigned long ram_end;
23
24extern int c6x_num_cores;
25extern unsigned int c6x_silicon_rev;
26extern unsigned int c6x_devstat;
27extern unsigned char c6x_fuse_mac[6];
28
29extern void machine_init(unsigned long dt_ptr);
30extern void time_init(void);
31
32#endif /* !__ASSEMBLY__ */
33#endif /* _ASM_C6X_SETUP_H */
diff --git a/arch/c6x/include/uapi/asm/Kbuild b/arch/c6x/include/uapi/asm/Kbuild
index c312b424c433..e9bc2b2b8147 100644
--- a/arch/c6x/include/uapi/asm/Kbuild
+++ b/arch/c6x/include/uapi/asm/Kbuild
@@ -1,6 +1,8 @@
1# UAPI Header export list 1# UAPI Header export list
2include include/uapi/asm-generic/Kbuild.asm 2include include/uapi/asm-generic/Kbuild.asm
3 3
4generic-y += kvm_para.h
5
4header-y += byteorder.h 6header-y += byteorder.h
5header-y += kvm_para.h 7header-y += kvm_para.h
6header-y += ptrace.h 8header-y += ptrace.h
diff --git a/arch/c6x/include/uapi/asm/kvm_para.h b/arch/c6x/include/uapi/asm/kvm_para.h
deleted file mode 100644
index 14fab8f0b957..000000000000
--- a/arch/c6x/include/uapi/asm/kvm_para.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/kvm_para.h>
diff --git a/arch/c6x/include/uapi/asm/setup.h b/arch/c6x/include/uapi/asm/setup.h
index a01e31896fa9..ad9ac97a8dad 100644
--- a/arch/c6x/include/uapi/asm/setup.h
+++ b/arch/c6x/include/uapi/asm/setup.h
@@ -1,33 +1,6 @@
1/* 1#ifndef _UAPI_ASM_C6X_SETUP_H
2 * Port on Texas Instruments TMS320C6x architecture 2#define _UAPI_ASM_C6X_SETUP_H
3 *
4 * Copyright (C) 2004, 2009, 2010 2011 Texas Instruments Incorporated
5 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef _ASM_C6X_SETUP_H
12#define _ASM_C6X_SETUP_H
13 3
14#define COMMAND_LINE_SIZE 1024 4#define COMMAND_LINE_SIZE 1024
15 5
16#ifndef __ASSEMBLY__ 6#endif /* _UAPI_ASM_C6X_SETUP_H */
17extern char c6x_command_line[COMMAND_LINE_SIZE];
18
19extern int c6x_add_memory(phys_addr_t start, unsigned long size);
20
21extern unsigned long ram_start;
22extern unsigned long ram_end;
23
24extern int c6x_num_cores;
25extern unsigned int c6x_silicon_rev;
26extern unsigned int c6x_devstat;
27extern unsigned char c6x_fuse_mac[6];
28
29extern void machine_init(unsigned long dt_ptr);
30extern void time_init(void);
31
32#endif /* !__ASSEMBLY__ */
33#endif /* _ASM_C6X_SETUP_H */
diff --git a/arch/c6x/kernel/entry.S b/arch/c6x/kernel/entry.S
index 5449c36018fe..0ed6157dd256 100644
--- a/arch/c6x/kernel/entry.S
+++ b/arch/c6x/kernel/entry.S
@@ -277,6 +277,8 @@ work_rescheduled:
277 [A1] BNOP .S1 work_resched,5 277 [A1] BNOP .S1 work_resched,5
278 278
279work_notifysig: 279work_notifysig:
280 ;; enable interrupts for do_notify_resume()
281 UNMASK_INT B2
280 B .S2 do_notify_resume 282 B .S2 do_notify_resume
281 LDW .D2T1 *+SP(REGS__END+8),A6 ; syscall flag 283 LDW .D2T1 *+SP(REGS__END+8),A6 ; syscall flag
282 ADDKPC .S2 resume_userspace,B3,1 284 ADDKPC .S2 resume_userspace,B3,1
@@ -427,8 +429,7 @@ ENTRY(ret_from_kernel_execve)
427ENDPROC(ret_from_kernel_execve) 429ENDPROC(ret_from_kernel_execve)
428 430
429 ;; 431 ;;
430 ;; These are the interrupt handlers, responsible for calling __do_IRQ() 432 ;; These are the interrupt handlers, responsible for calling c6x_do_IRQ()
431 ;; int6 is used for syscalls (see _system_call entry)
432 ;; 433 ;;
433 .macro SAVE_ALL_INT 434 .macro SAVE_ALL_INT
434 SAVE_ALL IRP,ITSR 435 SAVE_ALL IRP,ITSR
diff --git a/arch/frv/Kconfig b/arch/frv/Kconfig
index b7412504f08a..df2eb4bd9fa2 100644
--- a/arch/frv/Kconfig
+++ b/arch/frv/Kconfig
@@ -13,6 +13,7 @@ config FRV
13 select GENERIC_CPU_DEVICES 13 select GENERIC_CPU_DEVICES
14 select ARCH_WANT_IPC_PARSE_VERSION 14 select ARCH_WANT_IPC_PARSE_VERSION
15 select GENERIC_KERNEL_THREAD 15 select GENERIC_KERNEL_THREAD
16 select GENERIC_KERNEL_EXECVE
16 17
17config ZONE_DMA 18config ZONE_DMA
18 bool 19 bool
diff --git a/arch/frv/boot/Makefile b/arch/frv/boot/Makefile
index 6ae3254da019..636d5bbcd53f 100644
--- a/arch/frv/boot/Makefile
+++ b/arch/frv/boot/Makefile
@@ -17,6 +17,8 @@ PARAMS_PHYS = 0x0207c000
17INITRD_PHYS = 0x02180000 17INITRD_PHYS = 0x02180000
18INITRD_VIRT = 0x02180000 18INITRD_VIRT = 0x02180000
19 19
20OBJCOPYFLAGS :=-O binary -R .note -R .note.gnu.build-id -R .comment
21
20# 22#
21# If you don't define ZRELADDR above, 23# If you don't define ZRELADDR above,
22# then it defaults to ZTEXTADDR 24# then it defaults to ZTEXTADDR
@@ -32,18 +34,18 @@ Image: $(obj)/Image
32targets: $(obj)/Image 34targets: $(obj)/Image
33 35
34$(obj)/Image: vmlinux FORCE 36$(obj)/Image: vmlinux FORCE
35 $(OBJCOPY) -O binary -R .note -R .comment -S vmlinux $@ 37 $(OBJCOPY) $(OBJCOPYFLAGS) -S vmlinux $@
36 38
37#$(obj)/Image: $(CONFIGURE) $(SYSTEM) 39#$(obj)/Image: $(CONFIGURE) $(SYSTEM)
38# $(OBJCOPY) -O binary -R .note -R .comment -g -S $(SYSTEM) $@ 40# $(OBJCOPY) $(OBJCOPYFLAGS) -g -S $(SYSTEM) $@
39 41
40bzImage: zImage 42bzImage: zImage
41 43
42zImage: $(CONFIGURE) compressed/$(LINUX) 44zImage: $(CONFIGURE) compressed/$(LINUX)
43 $(OBJCOPY) -O binary -R .note -R .comment -S compressed/$(LINUX) $@ 45 $(OBJCOPY) $(OBJCOPYFLAGS) -S compressed/$(LINUX) $@
44 46
45bootpImage: bootp/bootp 47bootpImage: bootp/bootp
46 $(OBJCOPY) -O binary -R .note -R .comment -S bootp/bootp $@ 48 $(OBJCOPY) $(OBJCOPYFLAGS) -S bootp/bootp $@
47 49
48compressed/$(LINUX): $(LINUX) dep 50compressed/$(LINUX): $(LINUX) dep
49 @$(MAKE) -C compressed $(LINUX) 51 @$(MAKE) -C compressed $(LINUX)
diff --git a/arch/frv/include/asm/unistd.h b/arch/frv/include/asm/unistd.h
index 266a5b25a0c1..2358634cacca 100644
--- a/arch/frv/include/asm/unistd.h
+++ b/arch/frv/include/asm/unistd.h
@@ -30,7 +30,6 @@
30#define __ARCH_WANT_SYS_RT_SIGACTION 30#define __ARCH_WANT_SYS_RT_SIGACTION
31#define __ARCH_WANT_SYS_RT_SIGSUSPEND 31#define __ARCH_WANT_SYS_RT_SIGSUSPEND
32#define __ARCH_WANT_SYS_EXECVE 32#define __ARCH_WANT_SYS_EXECVE
33#define __ARCH_WANT_KERNEL_EXECVE
34 33
35/* 34/*
36 * "Conditional" syscalls 35 * "Conditional" syscalls
diff --git a/arch/frv/kernel/entry.S b/arch/frv/kernel/entry.S
index ee0beb354e4d..dfcd263c0517 100644
--- a/arch/frv/kernel/entry.S
+++ b/arch/frv/kernel/entry.S
@@ -869,11 +869,6 @@ ret_from_kernel_thread:
869 call schedule_tail 869 call schedule_tail
870 calll.p @(gr21,gr0) 870 calll.p @(gr21,gr0)
871 or gr20,gr20,gr8 871 or gr20,gr20,gr8
872 bra sys_exit
873
874 .globl ret_from_kernel_execve
875ret_from_kernel_execve:
876 ori gr28,0,sp
877 bra __syscall_exit 872 bra __syscall_exit
878 873
879################################################################################################### 874###################################################################################################
@@ -1080,27 +1075,10 @@ __entry_return_from_kernel_interrupt:
1080 subicc gr5,#0,gr0,icc0 1075 subicc gr5,#0,gr0,icc0
1081 beq icc0,#0,__entry_return_direct 1076 beq icc0,#0,__entry_return_direct
1082 1077
1083__entry_preempt_need_resched: 1078 subcc gr0,gr0,gr0,icc2 /* set Z and clear C */
1084 ldi @(gr15,#TI_FLAGS),gr4 1079 call preempt_schedule_irq
1085 andicc gr4,#_TIF_NEED_RESCHED,gr0,icc0
1086 beq icc0,#1,__entry_return_direct
1087
1088 setlos #PREEMPT_ACTIVE,gr5
1089 sti gr5,@(gr15,#TI_FLAGS)
1090
1091 andi gr23,#~PSR_PIL,gr23
1092 movgs gr23,psr
1093
1094 call schedule
1095 sti gr0,@(gr15,#TI_PRE_COUNT)
1096
1097 movsg psr,gr23
1098 ori gr23,#PSR_PIL_14,gr23
1099 movgs gr23,psr
1100 bra __entry_preempt_need_resched
1101#else
1102 bra __entry_return_direct
1103#endif 1080#endif
1081 bra __entry_return_direct
1104 1082
1105 1083
1106############################################################################### 1084###############################################################################
diff --git a/arch/frv/kernel/process.c b/arch/frv/kernel/process.c
index e1e3aa196aa4..7e33215f1d8f 100644
--- a/arch/frv/kernel/process.c
+++ b/arch/frv/kernel/process.c
@@ -181,6 +181,9 @@ int copy_thread(unsigned long clone_flags,
181 childregs = (struct pt_regs *) 181 childregs = (struct pt_regs *)
182 (task_stack_page(p) + THREAD_SIZE - FRV_FRAME0_SIZE); 182 (task_stack_page(p) + THREAD_SIZE - FRV_FRAME0_SIZE);
183 183
184 /* set up the userspace frame (the only place that the USP is stored) */
185 *childregs = *__kernel_frame0_ptr;
186
184 p->set_child_tid = p->clear_child_tid = NULL; 187 p->set_child_tid = p->clear_child_tid = NULL;
185 188
186 p->thread.frame = childregs; 189 p->thread.frame = childregs;
@@ -191,10 +194,8 @@ int copy_thread(unsigned long clone_flags,
191 p->thread.frame0 = childregs; 194 p->thread.frame0 = childregs;
192 195
193 if (unlikely(!regs)) { 196 if (unlikely(!regs)) {
194 memset(childregs, 0, sizeof(struct pt_regs));
195 childregs->gr9 = usp; /* function */ 197 childregs->gr9 = usp; /* function */
196 childregs->gr8 = arg; 198 childregs->gr8 = arg;
197 childregs->psr = PSR_S;
198 p->thread.pc = (unsigned long) ret_from_kernel_thread; 199 p->thread.pc = (unsigned long) ret_from_kernel_thread;
199 save_user_regs(p->thread.user); 200 save_user_regs(p->thread.user);
200 return 0; 201 return 0;
diff --git a/arch/frv/mb93090-mb00/pci-dma-nommu.c b/arch/frv/mb93090-mb00/pci-dma-nommu.c
index e47857f889b6..b99c2a7cc7a4 100644
--- a/arch/frv/mb93090-mb00/pci-dma-nommu.c
+++ b/arch/frv/mb93090-mb00/pci-dma-nommu.c
@@ -11,6 +11,7 @@
11 11
12#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/slab.h> 13#include <linux/slab.h>
14#include <linux/export.h>
14#include <linux/dma-mapping.h> 15#include <linux/dma-mapping.h>
15#include <linux/list.h> 16#include <linux/list.h>
16#include <linux/pci.h> 17#include <linux/pci.h>
diff --git a/arch/h8300/include/asm/cache.h b/arch/h8300/include/asm/cache.h
index c6350283649d..05887a1d80e5 100644
--- a/arch/h8300/include/asm/cache.h
+++ b/arch/h8300/include/asm/cache.h
@@ -2,7 +2,8 @@
2#define __ARCH_H8300_CACHE_H 2#define __ARCH_H8300_CACHE_H
3 3
4/* bytes per L1 cache line */ 4/* bytes per L1 cache line */
5#define L1_CACHE_BYTES 4 5#define L1_CACHE_SHIFT 2
6#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
6 7
7/* m68k-elf-gcc 2.95.2 doesn't like these */ 8/* m68k-elf-gcc 2.95.2 doesn't like these */
8 9
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c
index acd5b68e8871..082e383c1b6f 100644
--- a/arch/ia64/mm/init.c
+++ b/arch/ia64/mm/init.c
@@ -637,7 +637,6 @@ mem_init (void)
637 637
638 high_memory = __va(max_low_pfn * PAGE_SIZE); 638 high_memory = __va(max_low_pfn * PAGE_SIZE);
639 639
640 reset_zone_present_pages();
641 for_each_online_pgdat(pgdat) 640 for_each_online_pgdat(pgdat)
642 if (pgdat->bdata->node_bootmem_map) 641 if (pgdat->bdata->node_bootmem_map)
643 totalram_pages += free_all_bootmem_node(pgdat); 642 totalram_pages += free_all_bootmem_node(pgdat);
diff --git a/arch/m68k/include/asm/signal.h b/arch/m68k/include/asm/signal.h
index 67e489d8d1bd..2df26b57c26a 100644
--- a/arch/m68k/include/asm/signal.h
+++ b/arch/m68k/include/asm/signal.h
@@ -41,7 +41,7 @@ struct k_sigaction {
41static inline void sigaddset(sigset_t *set, int _sig) 41static inline void sigaddset(sigset_t *set, int _sig)
42{ 42{
43 asm ("bfset %0{%1,#1}" 43 asm ("bfset %0{%1,#1}"
44 : "+od" (*set) 44 : "+o" (*set)
45 : "id" ((_sig - 1) ^ 31) 45 : "id" ((_sig - 1) ^ 31)
46 : "cc"); 46 : "cc");
47} 47}
@@ -49,7 +49,7 @@ static inline void sigaddset(sigset_t *set, int _sig)
49static inline void sigdelset(sigset_t *set, int _sig) 49static inline void sigdelset(sigset_t *set, int _sig)
50{ 50{
51 asm ("bfclr %0{%1,#1}" 51 asm ("bfclr %0{%1,#1}"
52 : "+od" (*set) 52 : "+o" (*set)
53 : "id" ((_sig - 1) ^ 31) 53 : "id" ((_sig - 1) ^ 31)
54 : "cc"); 54 : "cc");
55} 55}
@@ -65,7 +65,7 @@ static inline int __gen_sigismember(sigset_t *set, int _sig)
65 int ret; 65 int ret;
66 asm ("bfextu %1{%2,#1},%0" 66 asm ("bfextu %1{%2,#1},%0"
67 : "=d" (ret) 67 : "=d" (ret)
68 : "od" (*set), "id" ((_sig-1) ^ 31) 68 : "o" (*set), "id" ((_sig-1) ^ 31)
69 : "cc"); 69 : "cc");
70 return ret; 70 return ret;
71} 71}
diff --git a/arch/microblaze/kernel/signal.c b/arch/microblaze/kernel/signal.c
index 3847e5b9c601..3903e3d11f5a 100644
--- a/arch/microblaze/kernel/signal.c
+++ b/arch/microblaze/kernel/signal.c
@@ -111,7 +111,7 @@ asmlinkage long sys_rt_sigreturn(struct pt_regs *regs)
111 111
112 /* It is more difficult to avoid calling this function than to 112 /* It is more difficult to avoid calling this function than to
113 call it and ignore errors. */ 113 call it and ignore errors. */
114 if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->r1)) 114 if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->r1) == -EFAULT)
115 goto badframe; 115 goto badframe;
116 116
117 return rval; 117 return rval;
diff --git a/arch/mips/cavium-octeon/executive/cvmx-l2c.c b/arch/mips/cavium-octeon/executive/cvmx-l2c.c
index d38246e33ddb..9f883bf76953 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-l2c.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-l2c.c
@@ -30,6 +30,7 @@
30 * measurement, and debugging facilities. 30 * measurement, and debugging facilities.
31 */ 31 */
32 32
33#include <linux/irqflags.h>
33#include <asm/octeon/cvmx.h> 34#include <asm/octeon/cvmx.h>
34#include <asm/octeon/cvmx-l2c.h> 35#include <asm/octeon/cvmx-l2c.h>
35#include <asm/octeon/cvmx-spinlock.h> 36#include <asm/octeon/cvmx-spinlock.h>
diff --git a/arch/mips/fw/arc/misc.c b/arch/mips/fw/arc/misc.c
index 7cf80ca2c1d2..f9f5307434c2 100644
--- a/arch/mips/fw/arc/misc.c
+++ b/arch/mips/fw/arc/misc.c
@@ -11,6 +11,7 @@
11 */ 11 */
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/irqflags.h>
14 15
15#include <asm/bcache.h> 16#include <asm/bcache.h>
16 17
diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h
index 82ad35ce2b45..46ac73abd5ee 100644
--- a/arch/mips/include/asm/bitops.h
+++ b/arch/mips/include/asm/bitops.h
@@ -14,7 +14,6 @@
14#endif 14#endif
15 15
16#include <linux/compiler.h> 16#include <linux/compiler.h>
17#include <linux/irqflags.h>
18#include <linux/types.h> 17#include <linux/types.h>
19#include <asm/barrier.h> 18#include <asm/barrier.h>
20#include <asm/byteorder.h> /* sigh ... */ 19#include <asm/byteorder.h> /* sigh ... */
@@ -44,6 +43,24 @@
44#define smp_mb__before_clear_bit() smp_mb__before_llsc() 43#define smp_mb__before_clear_bit() smp_mb__before_llsc()
45#define smp_mb__after_clear_bit() smp_llsc_mb() 44#define smp_mb__after_clear_bit() smp_llsc_mb()
46 45
46
47/*
48 * These are the "slower" versions of the functions and are in bitops.c.
49 * These functions call raw_local_irq_{save,restore}().
50 */
51void __mips_set_bit(unsigned long nr, volatile unsigned long *addr);
52void __mips_clear_bit(unsigned long nr, volatile unsigned long *addr);
53void __mips_change_bit(unsigned long nr, volatile unsigned long *addr);
54int __mips_test_and_set_bit(unsigned long nr,
55 volatile unsigned long *addr);
56int __mips_test_and_set_bit_lock(unsigned long nr,
57 volatile unsigned long *addr);
58int __mips_test_and_clear_bit(unsigned long nr,
59 volatile unsigned long *addr);
60int __mips_test_and_change_bit(unsigned long nr,
61 volatile unsigned long *addr);
62
63
47/* 64/*
48 * set_bit - Atomically set a bit in memory 65 * set_bit - Atomically set a bit in memory
49 * @nr: the bit to set 66 * @nr: the bit to set
@@ -57,7 +74,7 @@
57static inline void set_bit(unsigned long nr, volatile unsigned long *addr) 74static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
58{ 75{
59 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); 76 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
60 unsigned short bit = nr & SZLONG_MASK; 77 int bit = nr & SZLONG_MASK;
61 unsigned long temp; 78 unsigned long temp;
62 79
63 if (kernel_uses_llsc && R10000_LLSC_WAR) { 80 if (kernel_uses_llsc && R10000_LLSC_WAR) {
@@ -92,17 +109,8 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
92 : "=&r" (temp), "+m" (*m) 109 : "=&r" (temp), "+m" (*m)
93 : "ir" (1UL << bit)); 110 : "ir" (1UL << bit));
94 } while (unlikely(!temp)); 111 } while (unlikely(!temp));
95 } else { 112 } else
96 volatile unsigned long *a = addr; 113 __mips_set_bit(nr, addr);
97 unsigned long mask;
98 unsigned long flags;
99
100 a += nr >> SZLONG_LOG;
101 mask = 1UL << bit;
102 raw_local_irq_save(flags);
103 *a |= mask;
104 raw_local_irq_restore(flags);
105 }
106} 114}
107 115
108/* 116/*
@@ -118,7 +126,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
118static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) 126static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
119{ 127{
120 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); 128 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
121 unsigned short bit = nr & SZLONG_MASK; 129 int bit = nr & SZLONG_MASK;
122 unsigned long temp; 130 unsigned long temp;
123 131
124 if (kernel_uses_llsc && R10000_LLSC_WAR) { 132 if (kernel_uses_llsc && R10000_LLSC_WAR) {
@@ -153,17 +161,8 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
153 : "=&r" (temp), "+m" (*m) 161 : "=&r" (temp), "+m" (*m)
154 : "ir" (~(1UL << bit))); 162 : "ir" (~(1UL << bit)));
155 } while (unlikely(!temp)); 163 } while (unlikely(!temp));
156 } else { 164 } else
157 volatile unsigned long *a = addr; 165 __mips_clear_bit(nr, addr);
158 unsigned long mask;
159 unsigned long flags;
160
161 a += nr >> SZLONG_LOG;
162 mask = 1UL << bit;
163 raw_local_irq_save(flags);
164 *a &= ~mask;
165 raw_local_irq_restore(flags);
166 }
167} 166}
168 167
169/* 168/*
@@ -191,7 +190,7 @@ static inline void clear_bit_unlock(unsigned long nr, volatile unsigned long *ad
191 */ 190 */
192static inline void change_bit(unsigned long nr, volatile unsigned long *addr) 191static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
193{ 192{
194 unsigned short bit = nr & SZLONG_MASK; 193 int bit = nr & SZLONG_MASK;
195 194
196 if (kernel_uses_llsc && R10000_LLSC_WAR) { 195 if (kernel_uses_llsc && R10000_LLSC_WAR) {
197 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); 196 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
@@ -220,17 +219,8 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
220 : "=&r" (temp), "+m" (*m) 219 : "=&r" (temp), "+m" (*m)
221 : "ir" (1UL << bit)); 220 : "ir" (1UL << bit));
222 } while (unlikely(!temp)); 221 } while (unlikely(!temp));
223 } else { 222 } else
224 volatile unsigned long *a = addr; 223 __mips_change_bit(nr, addr);
225 unsigned long mask;
226 unsigned long flags;
227
228 a += nr >> SZLONG_LOG;
229 mask = 1UL << bit;
230 raw_local_irq_save(flags);
231 *a ^= mask;
232 raw_local_irq_restore(flags);
233 }
234} 224}
235 225
236/* 226/*
@@ -244,7 +234,7 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
244static inline int test_and_set_bit(unsigned long nr, 234static inline int test_and_set_bit(unsigned long nr,
245 volatile unsigned long *addr) 235 volatile unsigned long *addr)
246{ 236{
247 unsigned short bit = nr & SZLONG_MASK; 237 int bit = nr & SZLONG_MASK;
248 unsigned long res; 238 unsigned long res;
249 239
250 smp_mb__before_llsc(); 240 smp_mb__before_llsc();
@@ -281,18 +271,8 @@ static inline int test_and_set_bit(unsigned long nr,
281 } while (unlikely(!res)); 271 } while (unlikely(!res));
282 272
283 res = temp & (1UL << bit); 273 res = temp & (1UL << bit);
284 } else { 274 } else
285 volatile unsigned long *a = addr; 275 res = __mips_test_and_set_bit(nr, addr);
286 unsigned long mask;
287 unsigned long flags;
288
289 a += nr >> SZLONG_LOG;
290 mask = 1UL << bit;
291 raw_local_irq_save(flags);
292 res = (mask & *a);
293 *a |= mask;
294 raw_local_irq_restore(flags);
295 }
296 276
297 smp_llsc_mb(); 277 smp_llsc_mb();
298 278
@@ -310,7 +290,7 @@ static inline int test_and_set_bit(unsigned long nr,
310static inline int test_and_set_bit_lock(unsigned long nr, 290static inline int test_and_set_bit_lock(unsigned long nr,
311 volatile unsigned long *addr) 291 volatile unsigned long *addr)
312{ 292{
313 unsigned short bit = nr & SZLONG_MASK; 293 int bit = nr & SZLONG_MASK;
314 unsigned long res; 294 unsigned long res;
315 295
316 if (kernel_uses_llsc && R10000_LLSC_WAR) { 296 if (kernel_uses_llsc && R10000_LLSC_WAR) {
@@ -345,18 +325,8 @@ static inline int test_and_set_bit_lock(unsigned long nr,
345 } while (unlikely(!res)); 325 } while (unlikely(!res));
346 326
347 res = temp & (1UL << bit); 327 res = temp & (1UL << bit);
348 } else { 328 } else
349 volatile unsigned long *a = addr; 329 res = __mips_test_and_set_bit_lock(nr, addr);
350 unsigned long mask;
351 unsigned long flags;
352
353 a += nr >> SZLONG_LOG;
354 mask = 1UL << bit;
355 raw_local_irq_save(flags);
356 res = (mask & *a);
357 *a |= mask;
358 raw_local_irq_restore(flags);
359 }
360 330
361 smp_llsc_mb(); 331 smp_llsc_mb();
362 332
@@ -373,7 +343,7 @@ static inline int test_and_set_bit_lock(unsigned long nr,
373static inline int test_and_clear_bit(unsigned long nr, 343static inline int test_and_clear_bit(unsigned long nr,
374 volatile unsigned long *addr) 344 volatile unsigned long *addr)
375{ 345{
376 unsigned short bit = nr & SZLONG_MASK; 346 int bit = nr & SZLONG_MASK;
377 unsigned long res; 347 unsigned long res;
378 348
379 smp_mb__before_llsc(); 349 smp_mb__before_llsc();
@@ -428,18 +398,8 @@ static inline int test_and_clear_bit(unsigned long nr,
428 } while (unlikely(!res)); 398 } while (unlikely(!res));
429 399
430 res = temp & (1UL << bit); 400 res = temp & (1UL << bit);
431 } else { 401 } else
432 volatile unsigned long *a = addr; 402 res = __mips_test_and_clear_bit(nr, addr);
433 unsigned long mask;
434 unsigned long flags;
435
436 a += nr >> SZLONG_LOG;
437 mask = 1UL << bit;
438 raw_local_irq_save(flags);
439 res = (mask & *a);
440 *a &= ~mask;
441 raw_local_irq_restore(flags);
442 }
443 403
444 smp_llsc_mb(); 404 smp_llsc_mb();
445 405
@@ -457,7 +417,7 @@ static inline int test_and_clear_bit(unsigned long nr,
457static inline int test_and_change_bit(unsigned long nr, 417static inline int test_and_change_bit(unsigned long nr,
458 volatile unsigned long *addr) 418 volatile unsigned long *addr)
459{ 419{
460 unsigned short bit = nr & SZLONG_MASK; 420 int bit = nr & SZLONG_MASK;
461 unsigned long res; 421 unsigned long res;
462 422
463 smp_mb__before_llsc(); 423 smp_mb__before_llsc();
@@ -494,18 +454,8 @@ static inline int test_and_change_bit(unsigned long nr,
494 } while (unlikely(!res)); 454 } while (unlikely(!res));
495 455
496 res = temp & (1UL << bit); 456 res = temp & (1UL << bit);
497 } else { 457 } else
498 volatile unsigned long *a = addr; 458 res = __mips_test_and_change_bit(nr, addr);
499 unsigned long mask;
500 unsigned long flags;
501
502 a += nr >> SZLONG_LOG;
503 mask = 1UL << bit;
504 raw_local_irq_save(flags);
505 res = (mask & *a);
506 *a ^= mask;
507 raw_local_irq_restore(flags);
508 }
509 459
510 smp_llsc_mb(); 460 smp_llsc_mb();
511 461
diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h
index 58277e0e9cd4..3c5d1464b7bd 100644
--- a/arch/mips/include/asm/compat.h
+++ b/arch/mips/include/asm/compat.h
@@ -290,7 +290,7 @@ struct compat_shmid64_ds {
290 290
291static inline int is_compat_task(void) 291static inline int is_compat_task(void)
292{ 292{
293 return test_thread_flag(TIF_32BIT); 293 return test_thread_flag(TIF_32BIT_ADDR);
294} 294}
295 295
296#endif /* _ASM_COMPAT_H */ 296#endif /* _ASM_COMPAT_H */
diff --git a/arch/mips/include/asm/hugetlb.h b/arch/mips/include/asm/hugetlb.h
index bd94946a18f3..ef99db994c2f 100644
--- a/arch/mips/include/asm/hugetlb.h
+++ b/arch/mips/include/asm/hugetlb.h
@@ -95,7 +95,17 @@ static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma,
95 pte_t *ptep, pte_t pte, 95 pte_t *ptep, pte_t pte,
96 int dirty) 96 int dirty)
97{ 97{
98 return ptep_set_access_flags(vma, addr, ptep, pte, dirty); 98 int changed = !pte_same(*ptep, pte);
99
100 if (changed) {
101 set_pte_at(vma->vm_mm, addr, ptep, pte);
102 /*
103 * There could be some standard sized pages in there,
104 * get them all.
105 */
106 flush_tlb_range(vma, addr, addr + HPAGE_SIZE);
107 }
108 return changed;
99} 109}
100 110
101static inline pte_t huge_ptep_get(pte_t *ptep) 111static inline pte_t huge_ptep_get(pte_t *ptep)
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 29d9c23c20c7..ff2e0345e013 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -15,6 +15,7 @@
15#include <linux/compiler.h> 15#include <linux/compiler.h>
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/types.h> 17#include <linux/types.h>
18#include <linux/irqflags.h>
18 19
19#include <asm/addrspace.h> 20#include <asm/addrspace.h>
20#include <asm/bug.h> 21#include <asm/bug.h>
diff --git a/arch/mips/include/asm/irqflags.h b/arch/mips/include/asm/irqflags.h
index 309cbcd6909c..9f3384c789d7 100644
--- a/arch/mips/include/asm/irqflags.h
+++ b/arch/mips/include/asm/irqflags.h
@@ -16,83 +16,13 @@
16#include <linux/compiler.h> 16#include <linux/compiler.h>
17#include <asm/hazards.h> 17#include <asm/hazards.h>
18 18
19__asm__( 19#if defined(CONFIG_CPU_MIPSR2) && !defined(CONFIG_MIPS_MT_SMTC)
20 " .macro arch_local_irq_enable \n"
21 " .set push \n"
22 " .set reorder \n"
23 " .set noat \n"
24#ifdef CONFIG_MIPS_MT_SMTC
25 " mfc0 $1, $2, 1 # SMTC - clear TCStatus.IXMT \n"
26 " ori $1, 0x400 \n"
27 " xori $1, 0x400 \n"
28 " mtc0 $1, $2, 1 \n"
29#elif defined(CONFIG_CPU_MIPSR2)
30 " ei \n"
31#else
32 " mfc0 $1,$12 \n"
33 " ori $1,0x1f \n"
34 " xori $1,0x1e \n"
35 " mtc0 $1,$12 \n"
36#endif
37 " irq_enable_hazard \n"
38 " .set pop \n"
39 " .endm");
40 20
41extern void smtc_ipi_replay(void);
42
43static inline void arch_local_irq_enable(void)
44{
45#ifdef CONFIG_MIPS_MT_SMTC
46 /*
47 * SMTC kernel needs to do a software replay of queued
48 * IPIs, at the cost of call overhead on each local_irq_enable()
49 */
50 smtc_ipi_replay();
51#endif
52 __asm__ __volatile__(
53 "arch_local_irq_enable"
54 : /* no outputs */
55 : /* no inputs */
56 : "memory");
57}
58
59
60/*
61 * For cli() we have to insert nops to make sure that the new value
62 * has actually arrived in the status register before the end of this
63 * macro.
64 * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
65 * no nops at all.
66 */
67/*
68 * For TX49, operating only IE bit is not enough.
69 *
70 * If mfc0 $12 follows store and the mfc0 is last instruction of a
71 * page and fetching the next instruction causes TLB miss, the result
72 * of the mfc0 might wrongly contain EXL bit.
73 *
74 * ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008
75 *
76 * Workaround: mask EXL bit of the result or place a nop before mfc0.
77 */
78__asm__( 21__asm__(
79 " .macro arch_local_irq_disable\n" 22 " .macro arch_local_irq_disable\n"
80 " .set push \n" 23 " .set push \n"
81 " .set noat \n" 24 " .set noat \n"
82#ifdef CONFIG_MIPS_MT_SMTC
83 " mfc0 $1, $2, 1 \n"
84 " ori $1, 0x400 \n"
85 " .set noreorder \n"
86 " mtc0 $1, $2, 1 \n"
87#elif defined(CONFIG_CPU_MIPSR2)
88 " di \n" 25 " di \n"
89#else
90 " mfc0 $1,$12 \n"
91 " ori $1,0x1f \n"
92 " xori $1,0x1f \n"
93 " .set noreorder \n"
94 " mtc0 $1,$12 \n"
95#endif
96 " irq_disable_hazard \n" 26 " irq_disable_hazard \n"
97 " .set pop \n" 27 " .set pop \n"
98 " .endm \n"); 28 " .endm \n");
@@ -106,46 +36,14 @@ static inline void arch_local_irq_disable(void)
106 : "memory"); 36 : "memory");
107} 37}
108 38
109__asm__(
110 " .macro arch_local_save_flags flags \n"
111 " .set push \n"
112 " .set reorder \n"
113#ifdef CONFIG_MIPS_MT_SMTC
114 " mfc0 \\flags, $2, 1 \n"
115#else
116 " mfc0 \\flags, $12 \n"
117#endif
118 " .set pop \n"
119 " .endm \n");
120
121static inline unsigned long arch_local_save_flags(void)
122{
123 unsigned long flags;
124 asm volatile("arch_local_save_flags %0" : "=r" (flags));
125 return flags;
126}
127 39
128__asm__( 40__asm__(
129 " .macro arch_local_irq_save result \n" 41 " .macro arch_local_irq_save result \n"
130 " .set push \n" 42 " .set push \n"
131 " .set reorder \n" 43 " .set reorder \n"
132 " .set noat \n" 44 " .set noat \n"
133#ifdef CONFIG_MIPS_MT_SMTC
134 " mfc0 \\result, $2, 1 \n"
135 " ori $1, \\result, 0x400 \n"
136 " .set noreorder \n"
137 " mtc0 $1, $2, 1 \n"
138 " andi \\result, \\result, 0x400 \n"
139#elif defined(CONFIG_CPU_MIPSR2)
140 " di \\result \n" 45 " di \\result \n"
141 " andi \\result, 1 \n" 46 " andi \\result, 1 \n"
142#else
143 " mfc0 \\result, $12 \n"
144 " ori $1, \\result, 0x1f \n"
145 " xori $1, 0x1f \n"
146 " .set noreorder \n"
147 " mtc0 $1, $12 \n"
148#endif
149 " irq_disable_hazard \n" 47 " irq_disable_hazard \n"
150 " .set pop \n" 48 " .set pop \n"
151 " .endm \n"); 49 " .endm \n");
@@ -160,61 +58,37 @@ static inline unsigned long arch_local_irq_save(void)
160 return flags; 58 return flags;
161} 59}
162 60
61
163__asm__( 62__asm__(
164 " .macro arch_local_irq_restore flags \n" 63 " .macro arch_local_irq_restore flags \n"
165 " .set push \n" 64 " .set push \n"
166 " .set noreorder \n" 65 " .set noreorder \n"
167 " .set noat \n" 66 " .set noat \n"
168#ifdef CONFIG_MIPS_MT_SMTC 67#if defined(CONFIG_IRQ_CPU)
169 "mfc0 $1, $2, 1 \n"
170 "andi \\flags, 0x400 \n"
171 "ori $1, 0x400 \n"
172 "xori $1, 0x400 \n"
173 "or \\flags, $1 \n"
174 "mtc0 \\flags, $2, 1 \n"
175#elif defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU)
176 /* 68 /*
177 * Slow, but doesn't suffer from a relatively unlikely race 69 * Slow, but doesn't suffer from a relatively unlikely race
178 * condition we're having since days 1. 70 * condition we're having since days 1.
179 */ 71 */
180 " beqz \\flags, 1f \n" 72 " beqz \\flags, 1f \n"
181 " di \n" 73 " di \n"
182 " ei \n" 74 " ei \n"
183 "1: \n" 75 "1: \n"
184#elif defined(CONFIG_CPU_MIPSR2) 76#else
185 /* 77 /*
186 * Fast, dangerous. Life is fun, life is good. 78 * Fast, dangerous. Life is fun, life is good.
187 */ 79 */
188 " mfc0 $1, $12 \n" 80 " mfc0 $1, $12 \n"
189 " ins $1, \\flags, 0, 1 \n" 81 " ins $1, \\flags, 0, 1 \n"
190 " mtc0 $1, $12 \n" 82 " mtc0 $1, $12 \n"
191#else
192 " mfc0 $1, $12 \n"
193 " andi \\flags, 1 \n"
194 " ori $1, 0x1f \n"
195 " xori $1, 0x1f \n"
196 " or \\flags, $1 \n"
197 " mtc0 \\flags, $12 \n"
198#endif 83#endif
199 " irq_disable_hazard \n" 84 " irq_disable_hazard \n"
200 " .set pop \n" 85 " .set pop \n"
201 " .endm \n"); 86 " .endm \n");
202 87
203
204static inline void arch_local_irq_restore(unsigned long flags) 88static inline void arch_local_irq_restore(unsigned long flags)
205{ 89{
206 unsigned long __tmp1; 90 unsigned long __tmp1;
207 91
208#ifdef CONFIG_MIPS_MT_SMTC
209 /*
210 * SMTC kernel needs to do a software replay of queued
211 * IPIs, at the cost of branch and call overhead on each
212 * local_irq_restore()
213 */
214 if (unlikely(!(flags & 0x0400)))
215 smtc_ipi_replay();
216#endif
217
218 __asm__ __volatile__( 92 __asm__ __volatile__(
219 "arch_local_irq_restore\t%0" 93 "arch_local_irq_restore\t%0"
220 : "=r" (__tmp1) 94 : "=r" (__tmp1)
@@ -232,6 +106,75 @@ static inline void __arch_local_irq_restore(unsigned long flags)
232 : "0" (flags) 106 : "0" (flags)
233 : "memory"); 107 : "memory");
234} 108}
109#else
110/* Functions that require preempt_{dis,en}able() are in mips-atomic.c */
111void arch_local_irq_disable(void);
112unsigned long arch_local_irq_save(void);
113void arch_local_irq_restore(unsigned long flags);
114void __arch_local_irq_restore(unsigned long flags);
115#endif /* if defined(CONFIG_CPU_MIPSR2) && !defined(CONFIG_MIPS_MT_SMTC) */
116
117
118__asm__(
119 " .macro arch_local_irq_enable \n"
120 " .set push \n"
121 " .set reorder \n"
122 " .set noat \n"
123#ifdef CONFIG_MIPS_MT_SMTC
124 " mfc0 $1, $2, 1 # SMTC - clear TCStatus.IXMT \n"
125 " ori $1, 0x400 \n"
126 " xori $1, 0x400 \n"
127 " mtc0 $1, $2, 1 \n"
128#elif defined(CONFIG_CPU_MIPSR2)
129 " ei \n"
130#else
131 " mfc0 $1,$12 \n"
132 " ori $1,0x1f \n"
133 " xori $1,0x1e \n"
134 " mtc0 $1,$12 \n"
135#endif
136 " irq_enable_hazard \n"
137 " .set pop \n"
138 " .endm");
139
140extern void smtc_ipi_replay(void);
141
142static inline void arch_local_irq_enable(void)
143{
144#ifdef CONFIG_MIPS_MT_SMTC
145 /*
146 * SMTC kernel needs to do a software replay of queued
147 * IPIs, at the cost of call overhead on each local_irq_enable()
148 */
149 smtc_ipi_replay();
150#endif
151 __asm__ __volatile__(
152 "arch_local_irq_enable"
153 : /* no outputs */
154 : /* no inputs */
155 : "memory");
156}
157
158
159__asm__(
160 " .macro arch_local_save_flags flags \n"
161 " .set push \n"
162 " .set reorder \n"
163#ifdef CONFIG_MIPS_MT_SMTC
164 " mfc0 \\flags, $2, 1 \n"
165#else
166 " mfc0 \\flags, $12 \n"
167#endif
168 " .set pop \n"
169 " .endm \n");
170
171static inline unsigned long arch_local_save_flags(void)
172{
173 unsigned long flags;
174 asm volatile("arch_local_save_flags %0" : "=r" (flags));
175 return flags;
176}
177
235 178
236static inline int arch_irqs_disabled_flags(unsigned long flags) 179static inline int arch_irqs_disabled_flags(unsigned long flags)
237{ 180{
@@ -245,7 +188,7 @@ static inline int arch_irqs_disabled_flags(unsigned long flags)
245#endif 188#endif
246} 189}
247 190
248#endif 191#endif /* #ifndef __ASSEMBLY__ */
249 192
250/* 193/*
251 * Do the CPU's IRQ-state tracing from assembly code. 194 * Do the CPU's IRQ-state tracing from assembly code.
diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h
index 8debe9e91754..18806a52061c 100644
--- a/arch/mips/include/asm/thread_info.h
+++ b/arch/mips/include/asm/thread_info.h
@@ -112,12 +112,6 @@ register struct thread_info *__current_thread_info __asm__("$28");
112#define TIF_LOAD_WATCH 25 /* If set, load watch registers */ 112#define TIF_LOAD_WATCH 25 /* If set, load watch registers */
113#define TIF_SYSCALL_TRACE 31 /* syscall trace active */ 113#define TIF_SYSCALL_TRACE 31 /* syscall trace active */
114 114
115#ifdef CONFIG_MIPS32_O32
116#define TIF_32BIT TIF_32BIT_REGS
117#elif defined(CONFIG_MIPS32_N32)
118#define TIF_32BIT _TIF_32BIT_ADDR
119#endif /* CONFIG_MIPS32_O32 */
120
121#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 115#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
122#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) 116#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
123#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 117#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index b1fb7af3c350..cce3782c96c9 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -510,7 +510,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
510 c->cputype = CPU_R3000A; 510 c->cputype = CPU_R3000A;
511 __cpu_name[cpu] = "R3000A"; 511 __cpu_name[cpu] = "R3000A";
512 } 512 }
513 break;
514 } else { 513 } else {
515 c->cputype = CPU_R3000; 514 c->cputype = CPU_R3000;
516 __cpu_name[cpu] = "R3000"; 515 __cpu_name[cpu] = "R3000";
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index a6c133212003..9b00362f32f6 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -36,6 +36,11 @@ FEXPORT(ret_from_exception)
36FEXPORT(ret_from_irq) 36FEXPORT(ret_from_irq)
37 LONG_S s0, TI_REGS($28) 37 LONG_S s0, TI_REGS($28)
38FEXPORT(__ret_from_irq) 38FEXPORT(__ret_from_irq)
39/*
40 * We can be coming here from a syscall done in the kernel space,
41 * e.g. a failed kernel_execve().
42 */
43resume_userspace_check:
39 LONG_L t0, PT_STATUS(sp) # returning to kernel mode? 44 LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
40 andi t0, t0, KU_USER 45 andi t0, t0, KU_USER
41 beqz t0, resume_kernel 46 beqz t0, resume_kernel
@@ -162,7 +167,7 @@ work_notifysig: # deal with pending signals and
162 move a0, sp 167 move a0, sp
163 li a1, 0 168 li a1, 0
164 jal do_notify_resume # a2 already loaded 169 jal do_notify_resume # a2 already loaded
165 j resume_userspace 170 j resume_userspace_check
166 171
167FEXPORT(syscall_exit_partial) 172FEXPORT(syscall_exit_partial)
168 local_irq_disable # make sure need_resched doesn't 173 local_irq_disable # make sure need_resched doesn't
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index f6ba8381ee01..86ec03f0e00c 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -397,14 +397,14 @@ EXPORT(sysn32_call_table)
397 PTR sys_timerfd_create 397 PTR sys_timerfd_create
398 PTR compat_sys_timerfd_gettime /* 6285 */ 398 PTR compat_sys_timerfd_gettime /* 6285 */
399 PTR compat_sys_timerfd_settime 399 PTR compat_sys_timerfd_settime
400 PTR sys_signalfd4 400 PTR compat_sys_signalfd4
401 PTR sys_eventfd2 401 PTR sys_eventfd2
402 PTR sys_epoll_create1 402 PTR sys_epoll_create1
403 PTR sys_dup3 /* 6290 */ 403 PTR sys_dup3 /* 6290 */
404 PTR sys_pipe2 404 PTR sys_pipe2
405 PTR sys_inotify_init1 405 PTR sys_inotify_init1
406 PTR sys_preadv 406 PTR compat_sys_preadv
407 PTR sys_pwritev 407 PTR compat_sys_pwritev
408 PTR compat_sys_rt_tgsigqueueinfo /* 6295 */ 408 PTR compat_sys_rt_tgsigqueueinfo /* 6295 */
409 PTR sys_perf_event_open 409 PTR sys_perf_event_open
410 PTR sys_accept4 410 PTR sys_accept4
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index a53f8ec37aac..290dc6a1d7a3 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -79,7 +79,7 @@ static struct resource data_resource = { .name = "Kernel data", };
79void __init add_memory_region(phys_t start, phys_t size, long type) 79void __init add_memory_region(phys_t start, phys_t size, long type)
80{ 80{
81 int x = boot_mem_map.nr_map; 81 int x = boot_mem_map.nr_map;
82 struct boot_mem_map_entry *prev = boot_mem_map.map + x - 1; 82 int i;
83 83
84 /* Sanity check */ 84 /* Sanity check */
85 if (start + size < start) { 85 if (start + size < start) {
@@ -88,15 +88,29 @@ void __init add_memory_region(phys_t start, phys_t size, long type)
88 } 88 }
89 89
90 /* 90 /*
91 * Try to merge with previous entry if any. This is far less than 91 * Try to merge with existing entry, if any.
92 * perfect but is sufficient for most real world cases.
93 */ 92 */
94 if (x && prev->addr + prev->size == start && prev->type == type) { 93 for (i = 0; i < boot_mem_map.nr_map; i++) {
95 prev->size += size; 94 struct boot_mem_map_entry *entry = boot_mem_map.map + i;
95 unsigned long top;
96
97 if (entry->type != type)
98 continue;
99
100 if (start + size < entry->addr)
101 continue; /* no overlap */
102
103 if (entry->addr + entry->size < start)
104 continue; /* no overlap */
105
106 top = max(entry->addr + entry->size, start + size);
107 entry->addr = min(entry->addr, start);
108 entry->size = top - entry->addr;
109
96 return; 110 return;
97 } 111 }
98 112
99 if (x == BOOT_MEM_MAP_MAX) { 113 if (boot_mem_map.nr_map == BOOT_MEM_MAP_MAX) {
100 pr_err("Ooops! Too many entries in the memory map!\n"); 114 pr_err("Ooops! Too many entries in the memory map!\n");
101 return; 115 return;
102 } 116 }
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index c4a82e841c73..eeddc58802e1 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -2,8 +2,9 @@
2# Makefile for MIPS-specific library files.. 2# Makefile for MIPS-specific library files..
3# 3#
4 4
5lib-y += csum_partial.o delay.o memcpy.o memset.o \ 5lib-y += bitops.o csum_partial.o delay.o memcpy.o memset.o \
6 strlen_user.o strncpy_user.o strnlen_user.o uncached.o 6 mips-atomic.o strlen_user.o strncpy_user.o \
7 strnlen_user.o uncached.o
7 8
8obj-y += iomap.o 9obj-y += iomap.o
9obj-$(CONFIG_PCI) += iomap-pci.o 10obj-$(CONFIG_PCI) += iomap-pci.o
diff --git a/arch/mips/lib/bitops.c b/arch/mips/lib/bitops.c
new file mode 100644
index 000000000000..239a9c957b02
--- /dev/null
+++ b/arch/mips/lib/bitops.c
@@ -0,0 +1,179 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (c) 1994-1997, 99, 2000, 06, 07 Ralf Baechle (ralf@linux-mips.org)
7 * Copyright (c) 1999, 2000 Silicon Graphics, Inc.
8 */
9#include <linux/bitops.h>
10#include <linux/irqflags.h>
11#include <linux/export.h>
12
13
14/**
15 * __mips_set_bit - Atomically set a bit in memory. This is called by
16 * set_bit() if it cannot find a faster solution.
17 * @nr: the bit to set
18 * @addr: the address to start counting from
19 */
20void __mips_set_bit(unsigned long nr, volatile unsigned long *addr)
21{
22 volatile unsigned long *a = addr;
23 unsigned bit = nr & SZLONG_MASK;
24 unsigned long mask;
25 unsigned long flags;
26
27 a += nr >> SZLONG_LOG;
28 mask = 1UL << bit;
29 raw_local_irq_save(flags);
30 *a |= mask;
31 raw_local_irq_restore(flags);
32}
33EXPORT_SYMBOL(__mips_set_bit);
34
35
36/**
37 * __mips_clear_bit - Clears a bit in memory. This is called by clear_bit() if
38 * it cannot find a faster solution.
39 * @nr: Bit to clear
40 * @addr: Address to start counting from
41 */
42void __mips_clear_bit(unsigned long nr, volatile unsigned long *addr)
43{
44 volatile unsigned long *a = addr;
45 unsigned bit = nr & SZLONG_MASK;
46 unsigned long mask;
47 unsigned long flags;
48
49 a += nr >> SZLONG_LOG;
50 mask = 1UL << bit;
51 raw_local_irq_save(flags);
52 *a &= ~mask;
53 raw_local_irq_restore(flags);
54}
55EXPORT_SYMBOL(__mips_clear_bit);
56
57
58/**
59 * __mips_change_bit - Toggle a bit in memory. This is called by change_bit()
60 * if it cannot find a faster solution.
61 * @nr: Bit to change
62 * @addr: Address to start counting from
63 */
64void __mips_change_bit(unsigned long nr, volatile unsigned long *addr)
65{
66 volatile unsigned long *a = addr;
67 unsigned bit = nr & SZLONG_MASK;
68 unsigned long mask;
69 unsigned long flags;
70
71 a += nr >> SZLONG_LOG;
72 mask = 1UL << bit;
73 raw_local_irq_save(flags);
74 *a ^= mask;
75 raw_local_irq_restore(flags);
76}
77EXPORT_SYMBOL(__mips_change_bit);
78
79
80/**
81 * __mips_test_and_set_bit - Set a bit and return its old value. This is
82 * called by test_and_set_bit() if it cannot find a faster solution.
83 * @nr: Bit to set
84 * @addr: Address to count from
85 */
86int __mips_test_and_set_bit(unsigned long nr,
87 volatile unsigned long *addr)
88{
89 volatile unsigned long *a = addr;
90 unsigned bit = nr & SZLONG_MASK;
91 unsigned long mask;
92 unsigned long flags;
93 unsigned long res;
94
95 a += nr >> SZLONG_LOG;
96 mask = 1UL << bit;
97 raw_local_irq_save(flags);
98 res = (mask & *a);
99 *a |= mask;
100 raw_local_irq_restore(flags);
101 return res;
102}
103EXPORT_SYMBOL(__mips_test_and_set_bit);
104
105
106/**
107 * __mips_test_and_set_bit_lock - Set a bit and return its old value. This is
108 * called by test_and_set_bit_lock() if it cannot find a faster solution.
109 * @nr: Bit to set
110 * @addr: Address to count from
111 */
112int __mips_test_and_set_bit_lock(unsigned long nr,
113 volatile unsigned long *addr)
114{
115 volatile unsigned long *a = addr;
116 unsigned bit = nr & SZLONG_MASK;
117 unsigned long mask;
118 unsigned long flags;
119 unsigned long res;
120
121 a += nr >> SZLONG_LOG;
122 mask = 1UL << bit;
123 raw_local_irq_save(flags);
124 res = (mask & *a);
125 *a |= mask;
126 raw_local_irq_restore(flags);
127 return res;
128}
129EXPORT_SYMBOL(__mips_test_and_set_bit_lock);
130
131
132/**
133 * __mips_test_and_clear_bit - Clear a bit and return its old value. This is
134 * called by test_and_clear_bit() if it cannot find a faster solution.
135 * @nr: Bit to clear
136 * @addr: Address to count from
137 */
138int __mips_test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
139{
140 volatile unsigned long *a = addr;
141 unsigned bit = nr & SZLONG_MASK;
142 unsigned long mask;
143 unsigned long flags;
144 unsigned long res;
145
146 a += nr >> SZLONG_LOG;
147 mask = 1UL << bit;
148 raw_local_irq_save(flags);
149 res = (mask & *a);
150 *a &= ~mask;
151 raw_local_irq_restore(flags);
152 return res;
153}
154EXPORT_SYMBOL(__mips_test_and_clear_bit);
155
156
157/**
158 * __mips_test_and_change_bit - Change a bit and return its old value. This is
159 * called by test_and_change_bit() if it cannot find a faster solution.
160 * @nr: Bit to change
161 * @addr: Address to count from
162 */
163int __mips_test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
164{
165 volatile unsigned long *a = addr;
166 unsigned bit = nr & SZLONG_MASK;
167 unsigned long mask;
168 unsigned long flags;
169 unsigned long res;
170
171 a += nr >> SZLONG_LOG;
172 mask = 1UL << bit;
173 raw_local_irq_save(flags);
174 res = (mask & *a);
175 *a ^= mask;
176 raw_local_irq_restore(flags);
177 return res;
178}
179EXPORT_SYMBOL(__mips_test_and_change_bit);
diff --git a/arch/mips/lib/mips-atomic.c b/arch/mips/lib/mips-atomic.c
new file mode 100644
index 000000000000..cd160be3ce4d
--- /dev/null
+++ b/arch/mips/lib/mips-atomic.c
@@ -0,0 +1,176 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 by Ralf Baechle
7 * Copyright (C) 1996 by Paul M. Antoine
8 * Copyright (C) 1999 Silicon Graphics
9 * Copyright (C) 2000 MIPS Technologies, Inc.
10 */
11#include <asm/irqflags.h>
12#include <asm/hazards.h>
13#include <linux/compiler.h>
14#include <linux/preempt.h>
15#include <linux/export.h>
16
17#if !defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT_SMTC)
18
19/*
20 * For cli() we have to insert nops to make sure that the new value
21 * has actually arrived in the status register before the end of this
22 * macro.
23 * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
24 * no nops at all.
25 */
26/*
27 * For TX49, operating only IE bit is not enough.
28 *
29 * If mfc0 $12 follows store and the mfc0 is last instruction of a
30 * page and fetching the next instruction causes TLB miss, the result
31 * of the mfc0 might wrongly contain EXL bit.
32 *
33 * ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008
34 *
35 * Workaround: mask EXL bit of the result or place a nop before mfc0.
36 */
37__asm__(
38 " .macro arch_local_irq_disable\n"
39 " .set push \n"
40 " .set noat \n"
41#ifdef CONFIG_MIPS_MT_SMTC
42 " mfc0 $1, $2, 1 \n"
43 " ori $1, 0x400 \n"
44 " .set noreorder \n"
45 " mtc0 $1, $2, 1 \n"
46#elif defined(CONFIG_CPU_MIPSR2)
47 /* see irqflags.h for inline function */
48#else
49 " mfc0 $1,$12 \n"
50 " ori $1,0x1f \n"
51 " xori $1,0x1f \n"
52 " .set noreorder \n"
53 " mtc0 $1,$12 \n"
54#endif
55 " irq_disable_hazard \n"
56 " .set pop \n"
57 " .endm \n");
58
59notrace void arch_local_irq_disable(void)
60{
61 preempt_disable();
62 __asm__ __volatile__(
63 "arch_local_irq_disable"
64 : /* no outputs */
65 : /* no inputs */
66 : "memory");
67 preempt_enable();
68}
69EXPORT_SYMBOL(arch_local_irq_disable);
70
71
72__asm__(
73 " .macro arch_local_irq_save result \n"
74 " .set push \n"
75 " .set reorder \n"
76 " .set noat \n"
77#ifdef CONFIG_MIPS_MT_SMTC
78 " mfc0 \\result, $2, 1 \n"
79 " ori $1, \\result, 0x400 \n"
80 " .set noreorder \n"
81 " mtc0 $1, $2, 1 \n"
82 " andi \\result, \\result, 0x400 \n"
83#elif defined(CONFIG_CPU_MIPSR2)
84 /* see irqflags.h for inline function */
85#else
86 " mfc0 \\result, $12 \n"
87 " ori $1, \\result, 0x1f \n"
88 " xori $1, 0x1f \n"
89 " .set noreorder \n"
90 " mtc0 $1, $12 \n"
91#endif
92 " irq_disable_hazard \n"
93 " .set pop \n"
94 " .endm \n");
95
96notrace unsigned long arch_local_irq_save(void)
97{
98 unsigned long flags;
99 preempt_disable();
100 asm volatile("arch_local_irq_save\t%0"
101 : "=r" (flags)
102 : /* no inputs */
103 : "memory");
104 preempt_enable();
105 return flags;
106}
107EXPORT_SYMBOL(arch_local_irq_save);
108
109
110__asm__(
111 " .macro arch_local_irq_restore flags \n"
112 " .set push \n"
113 " .set noreorder \n"
114 " .set noat \n"
115#ifdef CONFIG_MIPS_MT_SMTC
116 "mfc0 $1, $2, 1 \n"
117 "andi \\flags, 0x400 \n"
118 "ori $1, 0x400 \n"
119 "xori $1, 0x400 \n"
120 "or \\flags, $1 \n"
121 "mtc0 \\flags, $2, 1 \n"
122#elif defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU)
123 /* see irqflags.h for inline function */
124#elif defined(CONFIG_CPU_MIPSR2)
125 /* see irqflags.h for inline function */
126#else
127 " mfc0 $1, $12 \n"
128 " andi \\flags, 1 \n"
129 " ori $1, 0x1f \n"
130 " xori $1, 0x1f \n"
131 " or \\flags, $1 \n"
132 " mtc0 \\flags, $12 \n"
133#endif
134 " irq_disable_hazard \n"
135 " .set pop \n"
136 " .endm \n");
137
138notrace void arch_local_irq_restore(unsigned long flags)
139{
140 unsigned long __tmp1;
141
142#ifdef CONFIG_MIPS_MT_SMTC
143 /*
144 * SMTC kernel needs to do a software replay of queued
145 * IPIs, at the cost of branch and call overhead on each
146 * local_irq_restore()
147 */
148 if (unlikely(!(flags & 0x0400)))
149 smtc_ipi_replay();
150#endif
151 preempt_disable();
152 __asm__ __volatile__(
153 "arch_local_irq_restore\t%0"
154 : "=r" (__tmp1)
155 : "0" (flags)
156 : "memory");
157 preempt_enable();
158}
159EXPORT_SYMBOL(arch_local_irq_restore);
160
161
162notrace void __arch_local_irq_restore(unsigned long flags)
163{
164 unsigned long __tmp1;
165
166 preempt_disable();
167 __asm__ __volatile__(
168 "arch_local_irq_restore\t%0"
169 : "=r" (__tmp1)
170 : "0" (flags)
171 : "memory");
172 preempt_enable();
173}
174EXPORT_SYMBOL(__arch_local_irq_restore);
175
176#endif /* !defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT_SMTC) */
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index 4b9b935a070e..88e79ad6f811 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -120,18 +120,11 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
120 120
121 if (cpu_context(cpu, mm) != 0) { 121 if (cpu_context(cpu, mm) != 0) {
122 unsigned long size, flags; 122 unsigned long size, flags;
123 int huge = is_vm_hugetlb_page(vma);
124 123
125 ENTER_CRITICAL(flags); 124 ENTER_CRITICAL(flags);
126 if (huge) { 125 start = round_down(start, PAGE_SIZE << 1);
127 start = round_down(start, HPAGE_SIZE); 126 end = round_up(end, PAGE_SIZE << 1);
128 end = round_up(end, HPAGE_SIZE); 127 size = (end - start) >> (PAGE_SHIFT + 1);
129 size = (end - start) >> HPAGE_SHIFT;
130 } else {
131 start = round_down(start, PAGE_SIZE << 1);
132 end = round_up(end, PAGE_SIZE << 1);
133 size = (end - start) >> (PAGE_SHIFT + 1);
134 }
135 if (size <= current_cpu_data.tlbsize/2) { 128 if (size <= current_cpu_data.tlbsize/2) {
136 int oldpid = read_c0_entryhi(); 129 int oldpid = read_c0_entryhi();
137 int newpid = cpu_asid(cpu, mm); 130 int newpid = cpu_asid(cpu, mm);
@@ -140,10 +133,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
140 int idx; 133 int idx;
141 134
142 write_c0_entryhi(start | newpid); 135 write_c0_entryhi(start | newpid);
143 if (huge) 136 start += (PAGE_SIZE << 1);
144 start += HPAGE_SIZE;
145 else
146 start += (PAGE_SIZE << 1);
147 mtc0_tlbw_hazard(); 137 mtc0_tlbw_hazard();
148 tlb_probe(); 138 tlb_probe();
149 tlb_probe_hazard(); 139 tlb_probe_hazard();
diff --git a/arch/mips/mti-malta/malta-platform.c b/arch/mips/mti-malta/malta-platform.c
index 80562b81f0f2..74732177851c 100644
--- a/arch/mips/mti-malta/malta-platform.c
+++ b/arch/mips/mti-malta/malta-platform.c
@@ -29,6 +29,7 @@
29#include <linux/mtd/partitions.h> 29#include <linux/mtd/partitions.h>
30#include <linux/mtd/physmap.h> 30#include <linux/mtd/physmap.h>
31#include <linux/platform_device.h> 31#include <linux/platform_device.h>
32#include <asm/mips-boards/maltaint.h>
32#include <mtd/mtd-abi.h> 33#include <mtd/mtd-abi.h>
33 34
34#define SMC_PORT(base, int) \ 35#define SMC_PORT(base, int) \
@@ -48,7 +49,7 @@ static struct plat_serial8250_port uart8250_data[] = {
48 SMC_PORT(0x2F8, 3), 49 SMC_PORT(0x2F8, 3),
49 { 50 {
50 .mapbase = 0x1f000900, /* The CBUS UART */ 51 .mapbase = 0x1f000900, /* The CBUS UART */
51 .irq = MIPS_CPU_IRQ_BASE + 2, 52 .irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_MB2,
52 .uartclk = 3686400, /* Twice the usual clk! */ 53 .uartclk = 3686400, /* Twice the usual clk! */
53 .iotype = UPIO_MEM32, 54 .iotype = UPIO_MEM32,
54 .flags = CBUS_UART_FLAGS, 55 .flags = CBUS_UART_FLAGS,
diff --git a/arch/openrisc/kernel/signal.c b/arch/openrisc/kernel/signal.c
index 30110297f4f9..ddedc8a77861 100644
--- a/arch/openrisc/kernel/signal.c
+++ b/arch/openrisc/kernel/signal.c
@@ -84,7 +84,6 @@ asmlinkage long _sys_rt_sigreturn(struct pt_regs *regs)
84{ 84{
85 struct rt_sigframe *frame = (struct rt_sigframe __user *)regs->sp; 85 struct rt_sigframe *frame = (struct rt_sigframe __user *)regs->sp;
86 sigset_t set; 86 sigset_t set;
87 stack_t st;
88 87
89 /* 88 /*
90 * Since we stacked the signal on a dword boundary, 89 * Since we stacked the signal on a dword boundary,
@@ -104,11 +103,10 @@ asmlinkage long _sys_rt_sigreturn(struct pt_regs *regs)
104 if (restore_sigcontext(regs, &frame->uc.uc_mcontext)) 103 if (restore_sigcontext(regs, &frame->uc.uc_mcontext))
105 goto badframe; 104 goto badframe;
106 105
107 if (__copy_from_user(&st, &frame->uc.uc_stack, sizeof(st)))
108 goto badframe;
109 /* It is more difficult to avoid calling this function than to 106 /* It is more difficult to avoid calling this function than to
110 call it and ignore errors. */ 107 call it and ignore errors. */
111 do_sigaltstack(&st, NULL, regs->sp); 108 if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->sp) == -EFAULT)
109 goto badframe;
112 110
113 return regs->gpr[11]; 111 return regs->gpr[11];
114 112
diff --git a/arch/parisc/kernel/signal32.c b/arch/parisc/kernel/signal32.c
index fd49aeda9eb8..5dede04f2f3e 100644
--- a/arch/parisc/kernel/signal32.c
+++ b/arch/parisc/kernel/signal32.c
@@ -65,7 +65,8 @@ put_sigset32(compat_sigset_t __user *up, sigset_t *set, size_t sz)
65{ 65{
66 compat_sigset_t s; 66 compat_sigset_t s;
67 67
68 if (sz != sizeof *set) panic("put_sigset32()"); 68 if (sz != sizeof *set)
69 return -EINVAL;
69 sigset_64to32(&s, set); 70 sigset_64to32(&s, set);
70 71
71 return copy_to_user(up, &s, sizeof s); 72 return copy_to_user(up, &s, sizeof s);
@@ -77,7 +78,8 @@ get_sigset32(compat_sigset_t __user *up, sigset_t *set, size_t sz)
77 compat_sigset_t s; 78 compat_sigset_t s;
78 int r; 79 int r;
79 80
80 if (sz != sizeof *set) panic("put_sigset32()"); 81 if (sz != sizeof *set)
82 return -EINVAL;
81 83
82 if ((r = copy_from_user(&s, up, sz)) == 0) { 84 if ((r = copy_from_user(&s, up, sz)) == 0) {
83 sigset_32to64(set, &s); 85 sigset_32to64(set, &s);
diff --git a/arch/parisc/kernel/sys_parisc.c b/arch/parisc/kernel/sys_parisc.c
index 7426e40699bd..f76c10863c62 100644
--- a/arch/parisc/kernel/sys_parisc.c
+++ b/arch/parisc/kernel/sys_parisc.c
@@ -73,6 +73,8 @@ static unsigned long get_shared_area(struct address_space *mapping,
73 struct vm_area_struct *vma; 73 struct vm_area_struct *vma;
74 int offset = mapping ? get_offset(mapping) : 0; 74 int offset = mapping ? get_offset(mapping) : 0;
75 75
76 offset = (offset + (pgoff << PAGE_SHIFT)) & 0x3FF000;
77
76 addr = DCACHE_ALIGN(addr - offset) + offset; 78 addr = DCACHE_ALIGN(addr - offset) + offset;
77 79
78 for (vma = find_vma(current->mm, addr); ; vma = vma->vm_next) { 80 for (vma = find_vma(current->mm, addr); ; vma = vma->vm_next) {
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index 3735abd7f8f6..cbf5d59d5d6a 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -60,7 +60,7 @@
60 ENTRY_SAME(fork_wrapper) 60 ENTRY_SAME(fork_wrapper)
61 ENTRY_SAME(read) 61 ENTRY_SAME(read)
62 ENTRY_SAME(write) 62 ENTRY_SAME(write)
63 ENTRY_SAME(open) /* 5 */ 63 ENTRY_COMP(open) /* 5 */
64 ENTRY_SAME(close) 64 ENTRY_SAME(close)
65 ENTRY_SAME(waitpid) 65 ENTRY_SAME(waitpid)
66 ENTRY_SAME(creat) 66 ENTRY_SAME(creat)
diff --git a/arch/powerpc/boot/dts/mpc5200b.dtsi b/arch/powerpc/boot/dts/mpc5200b.dtsi
index 7ab286ab5300..39ed65a44c5f 100644
--- a/arch/powerpc/boot/dts/mpc5200b.dtsi
+++ b/arch/powerpc/boot/dts/mpc5200b.dtsi
@@ -231,6 +231,12 @@
231 interrupts = <2 7 0>; 231 interrupts = <2 7 0>;
232 }; 232 };
233 233
234 sclpc@3c00 {
235 compatible = "fsl,mpc5200-lpbfifo";
236 reg = <0x3c00 0x60>;
237 interrupts = <2 23 0>;
238 };
239
234 i2c@3d00 { 240 i2c@3d00 {
235 #address-cells = <1>; 241 #address-cells = <1>;
236 #size-cells = <0>; 242 #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/o2d.dtsi b/arch/powerpc/boot/dts/o2d.dtsi
index 3444eb8f0ade..24f668039295 100644
--- a/arch/powerpc/boot/dts/o2d.dtsi
+++ b/arch/powerpc/boot/dts/o2d.dtsi
@@ -86,12 +86,6 @@
86 reg = <0>; 86 reg = <0>;
87 }; 87 };
88 }; 88 };
89
90 sclpc@3c00 {
91 compatible = "fsl,mpc5200-lpbfifo";
92 reg = <0x3c00 0x60>;
93 interrupts = <3 23 0>;
94 };
95 }; 89 };
96 90
97 localbus { 91 localbus {
diff --git a/arch/powerpc/boot/dts/pcm030.dts b/arch/powerpc/boot/dts/pcm030.dts
index 9e354997eb7e..96512c058033 100644
--- a/arch/powerpc/boot/dts/pcm030.dts
+++ b/arch/powerpc/boot/dts/pcm030.dts
@@ -59,7 +59,7 @@
59 #gpio-cells = <2>; 59 #gpio-cells = <2>;
60 }; 60 };
61 61
62 psc@2000 { /* PSC1 in ac97 mode */ 62 audioplatform: psc@2000 { /* PSC1 in ac97 mode */
63 compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97"; 63 compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97";
64 cell-index = <0>; 64 cell-index = <0>;
65 }; 65 };
@@ -134,4 +134,9 @@
134 localbus { 134 localbus {
135 status = "disabled"; 135 status = "disabled";
136 }; 136 };
137
138 sound {
139 compatible = "phytec,pcm030-audio-fabric";
140 asoc-platform = <&audioplatform>;
141 };
137}; 142};
diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c
index a2dc75793bd5..3b997118df50 100644
--- a/arch/powerpc/kernel/signal.c
+++ b/arch/powerpc/kernel/signal.c
@@ -158,10 +158,8 @@ static int do_signal(struct pt_regs *regs)
158 158
159void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags) 159void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags)
160{ 160{
161 if (thread_info_flags & _TIF_UPROBE) { 161 if (thread_info_flags & _TIF_UPROBE)
162 clear_thread_flag(TIF_UPROBE);
163 uprobe_notify_resume(regs); 162 uprobe_notify_resume(regs);
164 }
165 163
166 if (thread_info_flags & _TIF_SIGPENDING) 164 if (thread_info_flags & _TIF_SIGPENDING)
167 do_signal(regs); 165 do_signal(regs);
diff --git a/arch/powerpc/kernel/uprobes.c b/arch/powerpc/kernel/uprobes.c
index d2d46d1014f8..bc77834dbf43 100644
--- a/arch/powerpc/kernel/uprobes.c
+++ b/arch/powerpc/kernel/uprobes.c
@@ -64,6 +64,8 @@ int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
64 autask->saved_trap_nr = current->thread.trap_nr; 64 autask->saved_trap_nr = current->thread.trap_nr;
65 current->thread.trap_nr = UPROBE_TRAP_NR; 65 current->thread.trap_nr = UPROBE_TRAP_NR;
66 regs->nip = current->utask->xol_vaddr; 66 regs->nip = current->utask->xol_vaddr;
67
68 user_enable_single_step(current);
67 return 0; 69 return 0;
68} 70}
69 71
@@ -119,6 +121,8 @@ int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
119 * to be executed. 121 * to be executed.
120 */ 122 */
121 regs->nip = utask->vaddr + MAX_UINSN_BYTES; 123 regs->nip = utask->vaddr + MAX_UINSN_BYTES;
124
125 user_disable_single_step(current);
122 return 0; 126 return 0;
123} 127}
124 128
@@ -162,6 +166,8 @@ void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
162 166
163 current->thread.trap_nr = utask->autask.saved_trap_nr; 167 current->thread.trap_nr = utask->autask.saved_trap_nr;
164 instruction_pointer_set(regs, utask->vaddr); 168 instruction_pointer_set(regs, utask->vaddr);
169
170 user_disable_single_step(current);
165} 171}
166 172
167/* 173/*
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index 8520b58a5e9a..b89ef65392dc 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -372,10 +372,11 @@ static int mpc52xx_irqhost_map(struct irq_domain *h, unsigned int virq,
372 case MPC52xx_IRQ_L1_MAIN: irqchip = &mpc52xx_main_irqchip; break; 372 case MPC52xx_IRQ_L1_MAIN: irqchip = &mpc52xx_main_irqchip; break;
373 case MPC52xx_IRQ_L1_PERP: irqchip = &mpc52xx_periph_irqchip; break; 373 case MPC52xx_IRQ_L1_PERP: irqchip = &mpc52xx_periph_irqchip; break;
374 case MPC52xx_IRQ_L1_SDMA: irqchip = &mpc52xx_sdma_irqchip; break; 374 case MPC52xx_IRQ_L1_SDMA: irqchip = &mpc52xx_sdma_irqchip; break;
375 default: 375 case MPC52xx_IRQ_L1_CRIT:
376 pr_err("%s: invalid irq: virq=%i, l1=%i, l2=%i\n", 376 pr_warn("%s: Critical IRQ #%d is unsupported! Nopping it.\n",
377 __func__, virq, l1irq, l2irq); 377 __func__, l2irq);
378 return -EINVAL; 378 irq_set_chip(virq, &no_irq_chip);
379 return 0;
379 } 380 }
380 381
381 irq_set_chip_and_handler(virq, irqchip, handle_level_irq); 382 irq_set_chip_and_handler(virq, irqchip, handle_level_irq);
diff --git a/arch/powerpc/platforms/pseries/eeh_pe.c b/arch/powerpc/platforms/pseries/eeh_pe.c
index 797cd181dc3f..d16c8ded1084 100644
--- a/arch/powerpc/platforms/pseries/eeh_pe.c
+++ b/arch/powerpc/platforms/pseries/eeh_pe.c
@@ -449,7 +449,7 @@ int eeh_rmv_from_parent_pe(struct eeh_dev *edev, int purge_pe)
449 if (list_empty(&pe->edevs)) { 449 if (list_empty(&pe->edevs)) {
450 cnt = 0; 450 cnt = 0;
451 list_for_each_entry(child, &pe->child_list, child) { 451 list_for_each_entry(child, &pe->child_list, child) {
452 if (!(pe->type & EEH_PE_INVALID)) { 452 if (!(child->type & EEH_PE_INVALID)) {
453 cnt++; 453 cnt++;
454 break; 454 break;
455 } 455 }
diff --git a/arch/powerpc/platforms/pseries/msi.c b/arch/powerpc/platforms/pseries/msi.c
index d19f4977c834..e5b084723131 100644
--- a/arch/powerpc/platforms/pseries/msi.c
+++ b/arch/powerpc/platforms/pseries/msi.c
@@ -220,7 +220,8 @@ static struct device_node *find_pe_dn(struct pci_dev *dev, int *total)
220 220
221 /* Get the top level device in the PE */ 221 /* Get the top level device in the PE */
222 edev = of_node_to_eeh_dev(dn); 222 edev = of_node_to_eeh_dev(dn);
223 edev = list_first_entry(&edev->pe->edevs, struct eeh_dev, list); 223 if (edev->pe)
224 edev = list_first_entry(&edev->pe->edevs, struct eeh_dev, list);
224 dn = eeh_dev_to_of_node(edev); 225 dn = eeh_dev_to_of_node(edev);
225 if (!dn) 226 if (!dn)
226 return NULL; 227 return NULL;
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 5dba755a43e6..d385f396dfee 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -96,6 +96,7 @@ config S390
96 select HAVE_MEMBLOCK_NODE_MAP 96 select HAVE_MEMBLOCK_NODE_MAP
97 select HAVE_CMPXCHG_LOCAL 97 select HAVE_CMPXCHG_LOCAL
98 select HAVE_CMPXCHG_DOUBLE 98 select HAVE_CMPXCHG_DOUBLE
99 select HAVE_ALIGNED_STRUCT_PAGE if SLUB
99 select HAVE_VIRT_CPU_ACCOUNTING 100 select HAVE_VIRT_CPU_ACCOUNTING
100 select VIRT_CPU_ACCOUNTING 101 select VIRT_CPU_ACCOUNTING
101 select ARCH_DISCARD_MEMBLOCK 102 select ARCH_DISCARD_MEMBLOCK
diff --git a/arch/s390/include/asm/cio.h b/arch/s390/include/asm/cio.h
index 55bde6035216..ad2b924167d7 100644
--- a/arch/s390/include/asm/cio.h
+++ b/arch/s390/include/asm/cio.h
@@ -9,6 +9,8 @@
9 9
10#define LPM_ANYPATH 0xff 10#define LPM_ANYPATH 0xff
11#define __MAX_CSSID 0 11#define __MAX_CSSID 0
12#define __MAX_SUBCHANNEL 65535
13#define __MAX_SSID 3
12 14
13#include <asm/scsw.h> 15#include <asm/scsw.h>
14 16
diff --git a/arch/s390/include/asm/compat.h b/arch/s390/include/asm/compat.h
index a34a9d612fc0..18cd6b592650 100644
--- a/arch/s390/include/asm/compat.h
+++ b/arch/s390/include/asm/compat.h
@@ -20,7 +20,7 @@
20#define PSW32_MASK_CC 0x00003000UL 20#define PSW32_MASK_CC 0x00003000UL
21#define PSW32_MASK_PM 0x00000f00UL 21#define PSW32_MASK_PM 0x00000f00UL
22 22
23#define PSW32_MASK_USER 0x00003F00UL 23#define PSW32_MASK_USER 0x0000FF00UL
24 24
25#define PSW32_ADDR_AMODE 0x80000000UL 25#define PSW32_ADDR_AMODE 0x80000000UL
26#define PSW32_ADDR_INSN 0x7FFFFFFFUL 26#define PSW32_ADDR_INSN 0x7FFFFFFFUL
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index dd647c919a66..2d3b7cb26005 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -506,12 +506,15 @@ static inline int pud_bad(pud_t pud)
506 506
507static inline int pmd_present(pmd_t pmd) 507static inline int pmd_present(pmd_t pmd)
508{ 508{
509 return (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN) != 0UL; 509 unsigned long mask = _SEGMENT_ENTRY_INV | _SEGMENT_ENTRY_RO;
510 return (pmd_val(pmd) & mask) == _HPAGE_TYPE_NONE ||
511 !(pmd_val(pmd) & _SEGMENT_ENTRY_INV);
510} 512}
511 513
512static inline int pmd_none(pmd_t pmd) 514static inline int pmd_none(pmd_t pmd)
513{ 515{
514 return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) != 0UL; 516 return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) &&
517 !(pmd_val(pmd) & _SEGMENT_ENTRY_RO);
515} 518}
516 519
517static inline int pmd_large(pmd_t pmd) 520static inline int pmd_large(pmd_t pmd)
@@ -1223,6 +1226,11 @@ static inline void __pmd_idte(unsigned long address, pmd_t *pmdp)
1223} 1226}
1224 1227
1225#ifdef CONFIG_TRANSPARENT_HUGEPAGE 1228#ifdef CONFIG_TRANSPARENT_HUGEPAGE
1229
1230#define SEGMENT_NONE __pgprot(_HPAGE_TYPE_NONE)
1231#define SEGMENT_RO __pgprot(_HPAGE_TYPE_RO)
1232#define SEGMENT_RW __pgprot(_HPAGE_TYPE_RW)
1233
1226#define __HAVE_ARCH_PGTABLE_DEPOSIT 1234#define __HAVE_ARCH_PGTABLE_DEPOSIT
1227extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable); 1235extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable);
1228 1236
@@ -1242,16 +1250,15 @@ static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1242 1250
1243static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot) 1251static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot)
1244{ 1252{
1245 unsigned long pgprot_pmd = 0; 1253 /*
1246 1254 * pgprot is PAGE_NONE, PAGE_RO, or PAGE_RW (see __Pxxx / __Sxxx)
1247 if (pgprot_val(pgprot) & _PAGE_INVALID) { 1255 * Convert to segment table entry format.
1248 if (pgprot_val(pgprot) & _PAGE_SWT) 1256 */
1249 pgprot_pmd |= _HPAGE_TYPE_NONE; 1257 if (pgprot_val(pgprot) == pgprot_val(PAGE_NONE))
1250 pgprot_pmd |= _SEGMENT_ENTRY_INV; 1258 return pgprot_val(SEGMENT_NONE);
1251 } 1259 if (pgprot_val(pgprot) == pgprot_val(PAGE_RO))
1252 if (pgprot_val(pgprot) & _PAGE_RO) 1260 return pgprot_val(SEGMENT_RO);
1253 pgprot_pmd |= _SEGMENT_ENTRY_RO; 1261 return pgprot_val(SEGMENT_RW);
1254 return pgprot_pmd;
1255} 1262}
1256 1263
1257static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 1264static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
@@ -1269,7 +1276,9 @@ static inline pmd_t pmd_mkhuge(pmd_t pmd)
1269 1276
1270static inline pmd_t pmd_mkwrite(pmd_t pmd) 1277static inline pmd_t pmd_mkwrite(pmd_t pmd)
1271{ 1278{
1272 pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO; 1279 /* Do not clobber _HPAGE_TYPE_NONE pages! */
1280 if (!(pmd_val(pmd) & _SEGMENT_ENTRY_INV))
1281 pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO;
1273 return pmd; 1282 return pmd;
1274} 1283}
1275 1284
diff --git a/arch/s390/include/asm/topology.h b/arch/s390/include/asm/topology.h
index 9ca305383760..9935cbd6a46f 100644
--- a/arch/s390/include/asm/topology.h
+++ b/arch/s390/include/asm/topology.h
@@ -8,6 +8,9 @@ struct cpu;
8 8
9#ifdef CONFIG_SCHED_BOOK 9#ifdef CONFIG_SCHED_BOOK
10 10
11extern unsigned char cpu_socket_id[NR_CPUS];
12#define topology_physical_package_id(cpu) (cpu_socket_id[cpu])
13
11extern unsigned char cpu_core_id[NR_CPUS]; 14extern unsigned char cpu_core_id[NR_CPUS];
12extern cpumask_t cpu_core_map[NR_CPUS]; 15extern cpumask_t cpu_core_map[NR_CPUS];
13 16
diff --git a/arch/s390/include/uapi/asm/ptrace.h b/arch/s390/include/uapi/asm/ptrace.h
index 705588a16d70..a5ca214b34fd 100644
--- a/arch/s390/include/uapi/asm/ptrace.h
+++ b/arch/s390/include/uapi/asm/ptrace.h
@@ -239,7 +239,7 @@ typedef struct
239#define PSW_MASK_EA 0x00000000UL 239#define PSW_MASK_EA 0x00000000UL
240#define PSW_MASK_BA 0x00000000UL 240#define PSW_MASK_BA 0x00000000UL
241 241
242#define PSW_MASK_USER 0x00003F00UL 242#define PSW_MASK_USER 0x0000FF00UL
243 243
244#define PSW_ADDR_AMODE 0x80000000UL 244#define PSW_ADDR_AMODE 0x80000000UL
245#define PSW_ADDR_INSN 0x7FFFFFFFUL 245#define PSW_ADDR_INSN 0x7FFFFFFFUL
@@ -269,7 +269,7 @@ typedef struct
269#define PSW_MASK_EA 0x0000000100000000UL 269#define PSW_MASK_EA 0x0000000100000000UL
270#define PSW_MASK_BA 0x0000000080000000UL 270#define PSW_MASK_BA 0x0000000080000000UL
271 271
272#define PSW_MASK_USER 0x00003F8180000000UL 272#define PSW_MASK_USER 0x0000FF8180000000UL
273 273
274#define PSW_ADDR_AMODE 0x0000000000000000UL 274#define PSW_ADDR_AMODE 0x0000000000000000UL
275#define PSW_ADDR_INSN 0xFFFFFFFFFFFFFFFFUL 275#define PSW_ADDR_INSN 0xFFFFFFFFFFFFFFFFUL
diff --git a/arch/s390/kernel/compat_signal.c b/arch/s390/kernel/compat_signal.c
index a1e8a8694bb7..593fcc9253fc 100644
--- a/arch/s390/kernel/compat_signal.c
+++ b/arch/s390/kernel/compat_signal.c
@@ -309,6 +309,10 @@ static int restore_sigregs32(struct pt_regs *regs,_sigregs32 __user *sregs)
309 regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) | 309 regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) |
310 (__u64)(regs32.psw.mask & PSW32_MASK_USER) << 32 | 310 (__u64)(regs32.psw.mask & PSW32_MASK_USER) << 32 |
311 (__u64)(regs32.psw.addr & PSW32_ADDR_AMODE); 311 (__u64)(regs32.psw.addr & PSW32_ADDR_AMODE);
312 /* Check for invalid user address space control. */
313 if ((regs->psw.mask & PSW_MASK_ASC) >= (psw_kernel_bits & PSW_MASK_ASC))
314 regs->psw.mask = (psw_user_bits & PSW_MASK_ASC) |
315 (regs->psw.mask & ~PSW_MASK_ASC);
312 regs->psw.addr = (__u64)(regs32.psw.addr & PSW32_ADDR_INSN); 316 regs->psw.addr = (__u64)(regs32.psw.addr & PSW32_ADDR_INSN);
313 for (i = 0; i < NUM_GPRS; i++) 317 for (i = 0; i < NUM_GPRS; i++)
314 regs->gprs[i] = (__u64) regs32.gprs[i]; 318 regs->gprs[i] = (__u64) regs32.gprs[i];
@@ -481,7 +485,10 @@ static int setup_frame32(int sig, struct k_sigaction *ka,
481 485
482 /* Set up registers for signal handler */ 486 /* Set up registers for signal handler */
483 regs->gprs[15] = (__force __u64) frame; 487 regs->gprs[15] = (__force __u64) frame;
484 regs->psw.mask |= PSW_MASK_BA; /* force amode 31 */ 488 /* Force 31 bit amode and default user address space control. */
489 regs->psw.mask = PSW_MASK_BA |
490 (psw_user_bits & PSW_MASK_ASC) |
491 (regs->psw.mask & ~PSW_MASK_ASC);
485 regs->psw.addr = (__force __u64) ka->sa.sa_handler; 492 regs->psw.addr = (__force __u64) ka->sa.sa_handler;
486 493
487 regs->gprs[2] = map_signal(sig); 494 regs->gprs[2] = map_signal(sig);
@@ -549,7 +556,10 @@ static int setup_rt_frame32(int sig, struct k_sigaction *ka, siginfo_t *info,
549 556
550 /* Set up registers for signal handler */ 557 /* Set up registers for signal handler */
551 regs->gprs[15] = (__force __u64) frame; 558 regs->gprs[15] = (__force __u64) frame;
552 regs->psw.mask |= PSW_MASK_BA; /* force amode 31 */ 559 /* Force 31 bit amode and default user address space control. */
560 regs->psw.mask = PSW_MASK_BA |
561 (psw_user_bits & PSW_MASK_ASC) |
562 (regs->psw.mask & ~PSW_MASK_ASC);
553 regs->psw.addr = (__u64) ka->sa.sa_handler; 563 regs->psw.addr = (__u64) ka->sa.sa_handler;
554 564
555 regs->gprs[2] = map_signal(sig); 565 regs->gprs[2] = map_signal(sig);
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index ad79b846535c..827e094a2f49 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -28,7 +28,7 @@ ENTRY(sys32_open_wrapper)
28 llgtr %r2,%r2 # const char * 28 llgtr %r2,%r2 # const char *
29 lgfr %r3,%r3 # int 29 lgfr %r3,%r3 # int
30 lgfr %r4,%r4 # int 30 lgfr %r4,%r4 # int
31 jg sys_open # branch to system call 31 jg compat_sys_open # branch to system call
32 32
33ENTRY(sys32_close_wrapper) 33ENTRY(sys32_close_wrapper)
34 llgfr %r2,%r2 # unsigned int 34 llgfr %r2,%r2 # unsigned int
diff --git a/arch/s390/kernel/sclp.S b/arch/s390/kernel/sclp.S
index bf053898630d..b6506ee32a36 100644
--- a/arch/s390/kernel/sclp.S
+++ b/arch/s390/kernel/sclp.S
@@ -44,6 +44,12 @@ _sclp_wait_int:
44#endif 44#endif
45 mvc .LoldpswS1-.LbaseS1(16,%r13),0(%r8) 45 mvc .LoldpswS1-.LbaseS1(16,%r13),0(%r8)
46 mvc 0(16,%r8),0(%r9) 46 mvc 0(16,%r8),0(%r9)
47#ifdef CONFIG_64BIT
48 epsw %r6,%r7 # set current addressing mode
49 nill %r6,0x1 # in new psw (31 or 64 bit mode)
50 nilh %r7,0x8000
51 stm %r6,%r7,0(%r8)
52#endif
47 lhi %r6,0x0200 # cr mask for ext int (cr0.54) 53 lhi %r6,0x0200 # cr mask for ext int (cr0.54)
48 ltr %r2,%r2 54 ltr %r2,%r2
49 jz .LsetctS1 55 jz .LsetctS1
@@ -87,7 +93,7 @@ _sclp_wait_int:
87 .long 0x00080000, 0x80000000+.LwaitS1 # PSW to handle ext int 93 .long 0x00080000, 0x80000000+.LwaitS1 # PSW to handle ext int
88#ifdef CONFIG_64BIT 94#ifdef CONFIG_64BIT
89.LextpswS1_64: 95.LextpswS1_64:
90 .quad 0x0000000180000000, .LwaitS1 # PSW to handle ext int, 64 bit 96 .quad 0, .LwaitS1 # PSW to handle ext int, 64 bit
91#endif 97#endif
92.LwaitpswS1: 98.LwaitpswS1:
93 .long 0x010a0000, 0x00000000+.LloopS1 # PSW to wait for ext int 99 .long 0x010a0000, 0x00000000+.LloopS1 # PSW to wait for ext int
diff --git a/arch/s390/kernel/signal.c b/arch/s390/kernel/signal.c
index c13a2a37ef00..d1259d875074 100644
--- a/arch/s390/kernel/signal.c
+++ b/arch/s390/kernel/signal.c
@@ -136,6 +136,10 @@ static int restore_sigregs(struct pt_regs *regs, _sigregs __user *sregs)
136 /* Use regs->psw.mask instead of psw_user_bits to preserve PER bit. */ 136 /* Use regs->psw.mask instead of psw_user_bits to preserve PER bit. */
137 regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) | 137 regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) |
138 (user_sregs.regs.psw.mask & PSW_MASK_USER); 138 (user_sregs.regs.psw.mask & PSW_MASK_USER);
139 /* Check for invalid user address space control. */
140 if ((regs->psw.mask & PSW_MASK_ASC) >= (psw_kernel_bits & PSW_MASK_ASC))
141 regs->psw.mask = (psw_user_bits & PSW_MASK_ASC) |
142 (regs->psw.mask & ~PSW_MASK_ASC);
139 /* Check for invalid amode */ 143 /* Check for invalid amode */
140 if (regs->psw.mask & PSW_MASK_EA) 144 if (regs->psw.mask & PSW_MASK_EA)
141 regs->psw.mask |= PSW_MASK_BA; 145 regs->psw.mask |= PSW_MASK_BA;
@@ -273,7 +277,10 @@ static int setup_frame(int sig, struct k_sigaction *ka,
273 277
274 /* Set up registers for signal handler */ 278 /* Set up registers for signal handler */
275 regs->gprs[15] = (unsigned long) frame; 279 regs->gprs[15] = (unsigned long) frame;
276 regs->psw.mask |= PSW_MASK_EA | PSW_MASK_BA; /* 64 bit amode */ 280 /* Force default amode and default user address space control. */
281 regs->psw.mask = PSW_MASK_EA | PSW_MASK_BA |
282 (psw_user_bits & PSW_MASK_ASC) |
283 (regs->psw.mask & ~PSW_MASK_ASC);
277 regs->psw.addr = (unsigned long) ka->sa.sa_handler | PSW_ADDR_AMODE; 284 regs->psw.addr = (unsigned long) ka->sa.sa_handler | PSW_ADDR_AMODE;
278 285
279 regs->gprs[2] = map_signal(sig); 286 regs->gprs[2] = map_signal(sig);
@@ -346,7 +353,10 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
346 353
347 /* Set up registers for signal handler */ 354 /* Set up registers for signal handler */
348 regs->gprs[15] = (unsigned long) frame; 355 regs->gprs[15] = (unsigned long) frame;
349 regs->psw.mask |= PSW_MASK_EA | PSW_MASK_BA; /* 64 bit amode */ 356 /* Force default amode and default user address space control. */
357 regs->psw.mask = PSW_MASK_EA | PSW_MASK_BA |
358 (psw_user_bits & PSW_MASK_ASC) |
359 (regs->psw.mask & ~PSW_MASK_ASC);
350 regs->psw.addr = (unsigned long) ka->sa.sa_handler | PSW_ADDR_AMODE; 360 regs->psw.addr = (unsigned long) ka->sa.sa_handler | PSW_ADDR_AMODE;
351 361
352 regs->gprs[2] = map_signal(sig); 362 regs->gprs[2] = map_signal(sig);
diff --git a/arch/s390/kernel/topology.c b/arch/s390/kernel/topology.c
index 54d93f4b6818..dd55f7c20104 100644
--- a/arch/s390/kernel/topology.c
+++ b/arch/s390/kernel/topology.c
@@ -40,6 +40,7 @@ static DEFINE_SPINLOCK(topology_lock);
40static struct mask_info core_info; 40static struct mask_info core_info;
41cpumask_t cpu_core_map[NR_CPUS]; 41cpumask_t cpu_core_map[NR_CPUS];
42unsigned char cpu_core_id[NR_CPUS]; 42unsigned char cpu_core_id[NR_CPUS];
43unsigned char cpu_socket_id[NR_CPUS];
43 44
44static struct mask_info book_info; 45static struct mask_info book_info;
45cpumask_t cpu_book_map[NR_CPUS]; 46cpumask_t cpu_book_map[NR_CPUS];
@@ -83,11 +84,12 @@ static struct mask_info *add_cpus_to_mask(struct topology_cpu *tl_cpu,
83 cpumask_set_cpu(lcpu, &book->mask); 84 cpumask_set_cpu(lcpu, &book->mask);
84 cpu_book_id[lcpu] = book->id; 85 cpu_book_id[lcpu] = book->id;
85 cpumask_set_cpu(lcpu, &core->mask); 86 cpumask_set_cpu(lcpu, &core->mask);
87 cpu_core_id[lcpu] = rcpu;
86 if (one_core_per_cpu) { 88 if (one_core_per_cpu) {
87 cpu_core_id[lcpu] = rcpu; 89 cpu_socket_id[lcpu] = rcpu;
88 core = core->next; 90 core = core->next;
89 } else { 91 } else {
90 cpu_core_id[lcpu] = core->id; 92 cpu_socket_id[lcpu] = core->id;
91 } 93 }
92 smp_cpu_set_polarization(lcpu, tl_cpu->pp); 94 smp_cpu_set_polarization(lcpu, tl_cpu->pp);
93 } 95 }
diff --git a/arch/s390/lib/uaccess_pt.c b/arch/s390/lib/uaccess_pt.c
index 2d37bb861faf..9017a63dda3d 100644
--- a/arch/s390/lib/uaccess_pt.c
+++ b/arch/s390/lib/uaccess_pt.c
@@ -39,7 +39,7 @@ static __always_inline unsigned long follow_table(struct mm_struct *mm,
39 pmd = pmd_offset(pud, addr); 39 pmd = pmd_offset(pud, addr);
40 if (pmd_none(*pmd)) 40 if (pmd_none(*pmd))
41 return -0x10UL; 41 return -0x10UL;
42 if (pmd_huge(*pmd)) { 42 if (pmd_large(*pmd)) {
43 if (write && (pmd_val(*pmd) & _SEGMENT_ENTRY_RO)) 43 if (write && (pmd_val(*pmd) & _SEGMENT_ENTRY_RO))
44 return -0x04UL; 44 return -0x04UL;
45 return (pmd_val(*pmd) & HPAGE_MASK) + (addr & ~HPAGE_MASK); 45 return (pmd_val(*pmd) & HPAGE_MASK) + (addr & ~HPAGE_MASK);
diff --git a/arch/s390/mm/gup.c b/arch/s390/mm/gup.c
index 60acb93a4680..1f5315d1215c 100644
--- a/arch/s390/mm/gup.c
+++ b/arch/s390/mm/gup.c
@@ -126,7 +126,7 @@ static inline int gup_pmd_range(pud_t *pudp, pud_t pud, unsigned long addr,
126 */ 126 */
127 if (pmd_none(pmd) || pmd_trans_splitting(pmd)) 127 if (pmd_none(pmd) || pmd_trans_splitting(pmd))
128 return 0; 128 return 0;
129 if (unlikely(pmd_huge(pmd))) { 129 if (unlikely(pmd_large(pmd))) {
130 if (!gup_huge_pmd(pmdp, pmd, addr, next, 130 if (!gup_huge_pmd(pmdp, pmd, addr, next,
131 write, pages, nr)) 131 write, pages, nr))
132 return 0; 132 return 0;
@@ -180,8 +180,7 @@ int __get_user_pages_fast(unsigned long start, int nr_pages, int write,
180 addr = start; 180 addr = start;
181 len = (unsigned long) nr_pages << PAGE_SHIFT; 181 len = (unsigned long) nr_pages << PAGE_SHIFT;
182 end = start + len; 182 end = start + len;
183 if (unlikely(!access_ok(write ? VERIFY_WRITE : VERIFY_READ, 183 if ((end < start) || (end > TASK_SIZE))
184 (void __user *)start, len)))
185 return 0; 184 return 0;
186 185
187 local_irq_save(flags); 186 local_irq_save(flags);
@@ -229,7 +228,7 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
229 addr = start; 228 addr = start;
230 len = (unsigned long) nr_pages << PAGE_SHIFT; 229 len = (unsigned long) nr_pages << PAGE_SHIFT;
231 end = start + len; 230 end = start + len;
232 if (end < start) 231 if ((end < start) || (end > TASK_SIZE))
233 goto slow_irqon; 232 goto slow_irqon;
234 233
235 /* 234 /*
diff --git a/arch/score/kernel/signal.c b/arch/score/kernel/signal.c
index c268bbf8b410..02353bde92d8 100644
--- a/arch/score/kernel/signal.c
+++ b/arch/score/kernel/signal.c
@@ -148,7 +148,6 @@ score_rt_sigreturn(struct pt_regs *regs)
148{ 148{
149 struct rt_sigframe __user *frame; 149 struct rt_sigframe __user *frame;
150 sigset_t set; 150 sigset_t set;
151 stack_t st;
152 int sig; 151 int sig;
153 152
154 /* Always make any pending restarted system calls return -EINTR */ 153 /* Always make any pending restarted system calls return -EINTR */
@@ -168,12 +167,10 @@ score_rt_sigreturn(struct pt_regs *regs)
168 else if (sig) 167 else if (sig)
169 force_sig(sig, current); 168 force_sig(sig, current);
170 169
171 if (__copy_from_user(&st, &frame->rs_uc.uc_stack, sizeof(st)))
172 goto badframe;
173
174 /* It is more difficult to avoid calling this function than to 170 /* It is more difficult to avoid calling this function than to
175 call it and ignore errors. */ 171 call it and ignore errors. */
176 do_sigaltstack((stack_t __user *)&st, NULL, regs->regs[0]); 172 if (do_sigaltstack(&frame->rs_uc.uc_stack, NULL, regs->regs[0]) == -EFAULT)
173 goto badframe;
177 regs->is_syscall = 0; 174 regs->is_syscall = 0;
178 175
179 __asm__ __volatile__( 176 __asm__ __volatile__(
diff --git a/arch/sh/kernel/signal_64.c b/arch/sh/kernel/signal_64.c
index 23853814bd17..d867cd95a622 100644
--- a/arch/sh/kernel/signal_64.c
+++ b/arch/sh/kernel/signal_64.c
@@ -347,7 +347,6 @@ asmlinkage int sys_rt_sigreturn(unsigned long r2, unsigned long r3,
347{ 347{
348 struct rt_sigframe __user *frame = (struct rt_sigframe __user *) (long) REF_REG_SP; 348 struct rt_sigframe __user *frame = (struct rt_sigframe __user *) (long) REF_REG_SP;
349 sigset_t set; 349 sigset_t set;
350 stack_t __user st;
351 long long ret; 350 long long ret;
352 351
353 /* Always make any pending restarted system calls return -EINTR */ 352 /* Always make any pending restarted system calls return -EINTR */
@@ -365,11 +364,10 @@ asmlinkage int sys_rt_sigreturn(unsigned long r2, unsigned long r3,
365 goto badframe; 364 goto badframe;
366 regs->pc -= 4; 365 regs->pc -= 4;
367 366
368 if (__copy_from_user(&st, &frame->uc.uc_stack, sizeof(st)))
369 goto badframe;
370 /* It is more difficult to avoid calling this function than to 367 /* It is more difficult to avoid calling this function than to
371 call it and ignore errors. */ 368 call it and ignore errors. */
372 do_sigaltstack(&st, NULL, REF_REG_SP); 369 if (do_sigaltstack(&frame->uc.uc_stack, NULL, REF_REG_SP) == -EFAULT)
370 goto badframe;
373 371
374 return (int) ret; 372 return (int) ret;
375 373
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index b6b442b0d793..9f2edb5c5551 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -20,6 +20,7 @@ config SPARC
20 select HAVE_ARCH_TRACEHOOK 20 select HAVE_ARCH_TRACEHOOK
21 select SYSCTL_EXCEPTION_TRACE 21 select SYSCTL_EXCEPTION_TRACE
22 select ARCH_WANT_OPTIONAL_GPIOLIB 22 select ARCH_WANT_OPTIONAL_GPIOLIB
23 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
23 select RTC_CLASS 24 select RTC_CLASS
24 select RTC_DRV_M48T59 25 select RTC_DRV_M48T59
25 select HAVE_IRQ_WORK 26 select HAVE_IRQ_WORK
diff --git a/arch/sparc/boot/piggyback.c b/arch/sparc/boot/piggyback.c
index c0a798fcf030..bb7c95161d71 100644
--- a/arch/sparc/boot/piggyback.c
+++ b/arch/sparc/boot/piggyback.c
@@ -81,18 +81,18 @@ static void usage(void)
81 81
82static int start_line(const char *line) 82static int start_line(const char *line)
83{ 83{
84 if (strcmp(line + 8, " T _start\n") == 0) 84 if (strcmp(line + 10, " _start\n") == 0)
85 return 1; 85 return 1;
86 else if (strcmp(line + 16, " T _start\n") == 0) 86 else if (strcmp(line + 18, " _start\n") == 0)
87 return 1; 87 return 1;
88 return 0; 88 return 0;
89} 89}
90 90
91static int end_line(const char *line) 91static int end_line(const char *line)
92{ 92{
93 if (strcmp(line + 8, " A _end\n") == 0) 93 if (strcmp(line + 10, " _end\n") == 0)
94 return 1; 94 return 1;
95 else if (strcmp (line + 16, " A _end\n") == 0) 95 else if (strcmp (line + 18, " _end\n") == 0)
96 return 1; 96 return 1;
97 return 0; 97 return 0;
98} 98}
@@ -100,8 +100,8 @@ static int end_line(const char *line)
100/* 100/*
101 * Find address for start and end in System.map. 101 * Find address for start and end in System.map.
102 * The file looks like this: 102 * The file looks like this:
103 * f0004000 T _start 103 * f0004000 ... _start
104 * f0379f79 A _end 104 * f0379f79 ... _end
105 * 1234567890123456 105 * 1234567890123456
106 * ^coloumn 1 106 * ^coloumn 1
107 * There is support for 64 bit addresses too. 107 * There is support for 64 bit addresses too.
diff --git a/arch/sparc/crypto/Makefile b/arch/sparc/crypto/Makefile
index 6ae1ad5e502b..5d469d81761f 100644
--- a/arch/sparc/crypto/Makefile
+++ b/arch/sparc/crypto/Makefile
@@ -13,13 +13,13 @@ obj-$(CONFIG_CRYPTO_DES_SPARC64) += camellia-sparc64.o
13 13
14obj-$(CONFIG_CRYPTO_CRC32C_SPARC64) += crc32c-sparc64.o 14obj-$(CONFIG_CRYPTO_CRC32C_SPARC64) += crc32c-sparc64.o
15 15
16sha1-sparc64-y := sha1_asm.o sha1_glue.o crop_devid.o 16sha1-sparc64-y := sha1_asm.o sha1_glue.o
17sha256-sparc64-y := sha256_asm.o sha256_glue.o crop_devid.o 17sha256-sparc64-y := sha256_asm.o sha256_glue.o
18sha512-sparc64-y := sha512_asm.o sha512_glue.o crop_devid.o 18sha512-sparc64-y := sha512_asm.o sha512_glue.o
19md5-sparc64-y := md5_asm.o md5_glue.o crop_devid.o 19md5-sparc64-y := md5_asm.o md5_glue.o
20 20
21aes-sparc64-y := aes_asm.o aes_glue.o crop_devid.o 21aes-sparc64-y := aes_asm.o aes_glue.o
22des-sparc64-y := des_asm.o des_glue.o crop_devid.o 22des-sparc64-y := des_asm.o des_glue.o
23camellia-sparc64-y := camellia_asm.o camellia_glue.o crop_devid.o 23camellia-sparc64-y := camellia_asm.o camellia_glue.o
24 24
25crc32c-sparc64-y := crc32c_asm.o crc32c_glue.o crop_devid.o 25crc32c-sparc64-y := crc32c_asm.o crc32c_glue.o
diff --git a/arch/sparc/crypto/aes_glue.c b/arch/sparc/crypto/aes_glue.c
index 8f1c9980f637..3965d1d36dfa 100644
--- a/arch/sparc/crypto/aes_glue.c
+++ b/arch/sparc/crypto/aes_glue.c
@@ -475,3 +475,5 @@ MODULE_LICENSE("GPL");
475MODULE_DESCRIPTION("AES Secure Hash Algorithm, sparc64 aes opcode accelerated"); 475MODULE_DESCRIPTION("AES Secure Hash Algorithm, sparc64 aes opcode accelerated");
476 476
477MODULE_ALIAS("aes"); 477MODULE_ALIAS("aes");
478
479#include "crop_devid.c"
diff --git a/arch/sparc/crypto/camellia_glue.c b/arch/sparc/crypto/camellia_glue.c
index 42905c084299..62c89af3fd3f 100644
--- a/arch/sparc/crypto/camellia_glue.c
+++ b/arch/sparc/crypto/camellia_glue.c
@@ -320,3 +320,5 @@ MODULE_LICENSE("GPL");
320MODULE_DESCRIPTION("Camellia Cipher Algorithm, sparc64 camellia opcode accelerated"); 320MODULE_DESCRIPTION("Camellia Cipher Algorithm, sparc64 camellia opcode accelerated");
321 321
322MODULE_ALIAS("aes"); 322MODULE_ALIAS("aes");
323
324#include "crop_devid.c"
diff --git a/arch/sparc/crypto/crc32c_glue.c b/arch/sparc/crypto/crc32c_glue.c
index 0bd89cea8d8e..5162fad912ce 100644
--- a/arch/sparc/crypto/crc32c_glue.c
+++ b/arch/sparc/crypto/crc32c_glue.c
@@ -177,3 +177,5 @@ MODULE_LICENSE("GPL");
177MODULE_DESCRIPTION("CRC32c (Castagnoli), sparc64 crc32c opcode accelerated"); 177MODULE_DESCRIPTION("CRC32c (Castagnoli), sparc64 crc32c opcode accelerated");
178 178
179MODULE_ALIAS("crc32c"); 179MODULE_ALIAS("crc32c");
180
181#include "crop_devid.c"
diff --git a/arch/sparc/crypto/des_glue.c b/arch/sparc/crypto/des_glue.c
index c4940c2d3073..41524cebcc49 100644
--- a/arch/sparc/crypto/des_glue.c
+++ b/arch/sparc/crypto/des_glue.c
@@ -527,3 +527,5 @@ MODULE_LICENSE("GPL");
527MODULE_DESCRIPTION("DES & Triple DES EDE Cipher Algorithms, sparc64 des opcode accelerated"); 527MODULE_DESCRIPTION("DES & Triple DES EDE Cipher Algorithms, sparc64 des opcode accelerated");
528 528
529MODULE_ALIAS("des"); 529MODULE_ALIAS("des");
530
531#include "crop_devid.c"
diff --git a/arch/sparc/crypto/md5_glue.c b/arch/sparc/crypto/md5_glue.c
index 603d723038ce..09a9ea1dfb69 100644
--- a/arch/sparc/crypto/md5_glue.c
+++ b/arch/sparc/crypto/md5_glue.c
@@ -186,3 +186,5 @@ MODULE_LICENSE("GPL");
186MODULE_DESCRIPTION("MD5 Secure Hash Algorithm, sparc64 md5 opcode accelerated"); 186MODULE_DESCRIPTION("MD5 Secure Hash Algorithm, sparc64 md5 opcode accelerated");
187 187
188MODULE_ALIAS("md5"); 188MODULE_ALIAS("md5");
189
190#include "crop_devid.c"
diff --git a/arch/sparc/crypto/sha1_glue.c b/arch/sparc/crypto/sha1_glue.c
index 2bbb20bee9f1..6cd5f29e1e0d 100644
--- a/arch/sparc/crypto/sha1_glue.c
+++ b/arch/sparc/crypto/sha1_glue.c
@@ -181,3 +181,5 @@ MODULE_LICENSE("GPL");
181MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, sparc64 sha1 opcode accelerated"); 181MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, sparc64 sha1 opcode accelerated");
182 182
183MODULE_ALIAS("sha1"); 183MODULE_ALIAS("sha1");
184
185#include "crop_devid.c"
diff --git a/arch/sparc/crypto/sha256_glue.c b/arch/sparc/crypto/sha256_glue.c
index 591e656bd891..04f555ab2680 100644
--- a/arch/sparc/crypto/sha256_glue.c
+++ b/arch/sparc/crypto/sha256_glue.c
@@ -239,3 +239,5 @@ MODULE_DESCRIPTION("SHA-224 and SHA-256 Secure Hash Algorithm, sparc64 sha256 op
239 239
240MODULE_ALIAS("sha224"); 240MODULE_ALIAS("sha224");
241MODULE_ALIAS("sha256"); 241MODULE_ALIAS("sha256");
242
243#include "crop_devid.c"
diff --git a/arch/sparc/crypto/sha512_glue.c b/arch/sparc/crypto/sha512_glue.c
index 486f0a2b7001..f04d1994d19a 100644
--- a/arch/sparc/crypto/sha512_glue.c
+++ b/arch/sparc/crypto/sha512_glue.c
@@ -224,3 +224,5 @@ MODULE_DESCRIPTION("SHA-384 and SHA-512 Secure Hash Algorithm, sparc64 sha512 op
224 224
225MODULE_ALIAS("sha384"); 225MODULE_ALIAS("sha384");
226MODULE_ALIAS("sha512"); 226MODULE_ALIAS("sha512");
227
228#include "crop_devid.c"
diff --git a/arch/sparc/include/asm/atomic_64.h b/arch/sparc/include/asm/atomic_64.h
index ce35a1cf1a20..be56a244c9cf 100644
--- a/arch/sparc/include/asm/atomic_64.h
+++ b/arch/sparc/include/asm/atomic_64.h
@@ -1,7 +1,7 @@
1/* atomic.h: Thankfully the V9 is at least reasonable for this 1/* atomic.h: Thankfully the V9 is at least reasonable for this
2 * stuff. 2 * stuff.
3 * 3 *
4 * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com) 4 * Copyright (C) 1996, 1997, 2000, 2012 David S. Miller (davem@redhat.com)
5 */ 5 */
6 6
7#ifndef __ARCH_SPARC64_ATOMIC__ 7#ifndef __ARCH_SPARC64_ATOMIC__
@@ -106,6 +106,8 @@ static inline long atomic64_add_unless(atomic64_t *v, long a, long u)
106 106
107#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) 107#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
108 108
109extern long atomic64_dec_if_positive(atomic64_t *v);
110
109/* Atomic operations are already serializing */ 111/* Atomic operations are already serializing */
110#define smp_mb__before_atomic_dec() barrier() 112#define smp_mb__before_atomic_dec() barrier()
111#define smp_mb__after_atomic_dec() barrier() 113#define smp_mb__after_atomic_dec() barrier()
diff --git a/arch/sparc/include/asm/backoff.h b/arch/sparc/include/asm/backoff.h
index db3af0d30fb1..4e02086b839c 100644
--- a/arch/sparc/include/asm/backoff.h
+++ b/arch/sparc/include/asm/backoff.h
@@ -1,6 +1,46 @@
1#ifndef _SPARC64_BACKOFF_H 1#ifndef _SPARC64_BACKOFF_H
2#define _SPARC64_BACKOFF_H 2#define _SPARC64_BACKOFF_H
3 3
4/* The macros in this file implement an exponential backoff facility
5 * for atomic operations.
6 *
7 * When multiple threads compete on an atomic operation, it is
8 * possible for one thread to be continually denied a successful
9 * completion of the compare-and-swap instruction. Heavily
10 * threaded cpu implementations like Niagara can compound this
11 * problem even further.
12 *
13 * When an atomic operation fails and needs to be retried, we spin a
14 * certain number of times. At each subsequent failure of the same
15 * operation we double the spin count, realizing an exponential
16 * backoff.
17 *
18 * When we spin, we try to use an operation that will cause the
19 * current cpu strand to block, and therefore make the core fully
20 * available to any other other runnable strands. There are two
21 * options, based upon cpu capabilities.
22 *
23 * On all cpus prior to SPARC-T4 we do three dummy reads of the
24 * condition code register. Each read blocks the strand for something
25 * between 40 and 50 cpu cycles.
26 *
27 * For SPARC-T4 and later we have a special "pause" instruction
28 * available. This is implemented using writes to register %asr27.
29 * The cpu will block the number of cycles written into the register,
30 * unless a disrupting trap happens first. SPARC-T4 specifically
31 * implements pause with a granularity of 8 cycles. Each strand has
32 * an internal pause counter which decrements every 8 cycles. So the
33 * chip shifts the %asr27 value down by 3 bits, and writes the result
34 * into the pause counter. If a value smaller than 8 is written, the
35 * chip blocks for 1 cycle.
36 *
37 * To achieve the same amount of backoff as the three %ccr reads give
38 * on earlier chips, we shift the backoff value up by 7 bits. (Three
39 * %ccr reads block for about 128 cycles, 1 << 7 == 128) We write the
40 * whole amount we want to block into the pause register, rather than
41 * loop writing 128 each time.
42 */
43
4#define BACKOFF_LIMIT (4 * 1024) 44#define BACKOFF_LIMIT (4 * 1024)
5 45
6#ifdef CONFIG_SMP 46#ifdef CONFIG_SMP
@@ -11,16 +51,25 @@
11#define BACKOFF_LABEL(spin_label, continue_label) \ 51#define BACKOFF_LABEL(spin_label, continue_label) \
12 spin_label 52 spin_label
13 53
14#define BACKOFF_SPIN(reg, tmp, label) \ 54#define BACKOFF_SPIN(reg, tmp, label) \
15 mov reg, tmp; \ 55 mov reg, tmp; \
1688: brnz,pt tmp, 88b; \ 5688: rd %ccr, %g0; \
17 sub tmp, 1, tmp; \ 57 rd %ccr, %g0; \
18 set BACKOFF_LIMIT, tmp; \ 58 rd %ccr, %g0; \
19 cmp reg, tmp; \ 59 .section .pause_3insn_patch,"ax";\
20 bg,pn %xcc, label; \ 60 .word 88b; \
21 nop; \ 61 sllx tmp, 7, tmp; \
22 ba,pt %xcc, label; \ 62 wr tmp, 0, %asr27; \
23 sllx reg, 1, reg; 63 clr tmp; \
64 .previous; \
65 brnz,pt tmp, 88b; \
66 sub tmp, 1, tmp; \
67 set BACKOFF_LIMIT, tmp; \
68 cmp reg, tmp; \
69 bg,pn %xcc, label; \
70 nop; \
71 ba,pt %xcc, label; \
72 sllx reg, 1, reg;
24 73
25#else 74#else
26 75
diff --git a/arch/sparc/include/asm/compat.h b/arch/sparc/include/asm/compat.h
index cef99fbc0a21..830502fe62b4 100644
--- a/arch/sparc/include/asm/compat.h
+++ b/arch/sparc/include/asm/compat.h
@@ -232,9 +232,10 @@ static inline void __user *arch_compat_alloc_user_space(long len)
232 struct pt_regs *regs = current_thread_info()->kregs; 232 struct pt_regs *regs = current_thread_info()->kregs;
233 unsigned long usp = regs->u_regs[UREG_I6]; 233 unsigned long usp = regs->u_regs[UREG_I6];
234 234
235 if (!(test_thread_flag(TIF_32BIT))) 235 if (test_thread_64bit_stack(usp))
236 usp += STACK_BIAS; 236 usp += STACK_BIAS;
237 else 237
238 if (test_thread_flag(TIF_32BIT))
238 usp &= 0xffffffffUL; 239 usp &= 0xffffffffUL;
239 240
240 usp -= len; 241 usp -= len;
diff --git a/arch/sparc/include/asm/processor_64.h b/arch/sparc/include/asm/processor_64.h
index 4e5a483122a0..721e25f0e2ea 100644
--- a/arch/sparc/include/asm/processor_64.h
+++ b/arch/sparc/include/asm/processor_64.h
@@ -196,7 +196,22 @@ extern unsigned long get_wchan(struct task_struct *task);
196#define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc) 196#define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc)
197#define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP]) 197#define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP])
198 198
199#define cpu_relax() barrier() 199/* Please see the commentary in asm/backoff.h for a description of
200 * what these instructions are doing and how they have been choosen.
201 * To make a long story short, we are trying to yield the current cpu
202 * strand during busy loops.
203 */
204#define cpu_relax() asm volatile("\n99:\n\t" \
205 "rd %%ccr, %%g0\n\t" \
206 "rd %%ccr, %%g0\n\t" \
207 "rd %%ccr, %%g0\n\t" \
208 ".section .pause_3insn_patch,\"ax\"\n\t"\
209 ".word 99b\n\t" \
210 "wr %%g0, 128, %%asr27\n\t" \
211 "nop\n\t" \
212 "nop\n\t" \
213 ".previous" \
214 ::: "memory")
200 215
201/* Prefetch support. This is tuned for UltraSPARC-III and later. 216/* Prefetch support. This is tuned for UltraSPARC-III and later.
202 * UltraSPARC-I will treat these as nops, and UltraSPARC-II has 217 * UltraSPARC-I will treat these as nops, and UltraSPARC-II has
diff --git a/arch/sparc/include/asm/prom.h b/arch/sparc/include/asm/prom.h
index c28765110706..67c62578d170 100644
--- a/arch/sparc/include/asm/prom.h
+++ b/arch/sparc/include/asm/prom.h
@@ -63,5 +63,13 @@ extern char *of_console_options;
63extern void irq_trans_init(struct device_node *dp); 63extern void irq_trans_init(struct device_node *dp);
64extern char *build_path_component(struct device_node *dp); 64extern char *build_path_component(struct device_node *dp);
65 65
66/* SPARC has local implementations */
67extern int of_address_to_resource(struct device_node *dev, int index,
68 struct resource *r);
69#define of_address_to_resource of_address_to_resource
70
71void __iomem *of_iomap(struct device_node *node, int index);
72#define of_iomap of_iomap
73
66#endif /* __KERNEL__ */ 74#endif /* __KERNEL__ */
67#endif /* _SPARC_PROM_H */ 75#endif /* _SPARC_PROM_H */
diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/asm/thread_info_64.h
index 4e2276631081..a3fe4dcc0aa6 100644
--- a/arch/sparc/include/asm/thread_info_64.h
+++ b/arch/sparc/include/asm/thread_info_64.h
@@ -259,6 +259,11 @@ static inline bool test_and_clear_restore_sigmask(void)
259 259
260#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG) 260#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG)
261 261
262#define thread32_stack_is_64bit(__SP) (((__SP) & 0x1) != 0)
263#define test_thread_64bit_stack(__SP) \
264 ((test_thread_flag(TIF_32BIT) && !thread32_stack_is_64bit(__SP)) ? \
265 false : true)
266
262#endif /* !__ASSEMBLY__ */ 267#endif /* !__ASSEMBLY__ */
263 268
264#endif /* __KERNEL__ */ 269#endif /* __KERNEL__ */
diff --git a/arch/sparc/include/asm/ttable.h b/arch/sparc/include/asm/ttable.h
index 48f2807d3265..71b5a67522ab 100644
--- a/arch/sparc/include/asm/ttable.h
+++ b/arch/sparc/include/asm/ttable.h
@@ -372,7 +372,9 @@ etrap_spill_fixup_64bit: \
372 372
373/* Normal 32bit spill */ 373/* Normal 32bit spill */
374#define SPILL_2_GENERIC(ASI) \ 374#define SPILL_2_GENERIC(ASI) \
375 srl %sp, 0, %sp; \ 375 and %sp, 1, %g3; \
376 brnz,pn %g3, (. - (128 + 4)); \
377 srl %sp, 0, %sp; \
376 stwa %l0, [%sp + %g0] ASI; \ 378 stwa %l0, [%sp + %g0] ASI; \
377 mov 0x04, %g3; \ 379 mov 0x04, %g3; \
378 stwa %l1, [%sp + %g3] ASI; \ 380 stwa %l1, [%sp + %g3] ASI; \
@@ -398,14 +400,16 @@ etrap_spill_fixup_64bit: \
398 stwa %i6, [%g1 + %g0] ASI; \ 400 stwa %i6, [%g1 + %g0] ASI; \
399 stwa %i7, [%g1 + %g3] ASI; \ 401 stwa %i7, [%g1 + %g3] ASI; \
400 saved; \ 402 saved; \
401 retry; nop; nop; \ 403 retry; \
402 b,a,pt %xcc, spill_fixup_dax; \ 404 b,a,pt %xcc, spill_fixup_dax; \
403 b,a,pt %xcc, spill_fixup_mna; \ 405 b,a,pt %xcc, spill_fixup_mna; \
404 b,a,pt %xcc, spill_fixup; 406 b,a,pt %xcc, spill_fixup;
405 407
406#define SPILL_2_GENERIC_ETRAP \ 408#define SPILL_2_GENERIC_ETRAP \
407etrap_user_spill_32bit: \ 409etrap_user_spill_32bit: \
408 srl %sp, 0, %sp; \ 410 and %sp, 1, %g3; \
411 brnz,pn %g3, etrap_user_spill_64bit; \
412 srl %sp, 0, %sp; \
409 stwa %l0, [%sp + 0x00] %asi; \ 413 stwa %l0, [%sp + 0x00] %asi; \
410 stwa %l1, [%sp + 0x04] %asi; \ 414 stwa %l1, [%sp + 0x04] %asi; \
411 stwa %l2, [%sp + 0x08] %asi; \ 415 stwa %l2, [%sp + 0x08] %asi; \
@@ -427,7 +431,7 @@ etrap_user_spill_32bit: \
427 ba,pt %xcc, etrap_save; \ 431 ba,pt %xcc, etrap_save; \
428 wrpr %g1, %cwp; \ 432 wrpr %g1, %cwp; \
429 nop; nop; nop; nop; \ 433 nop; nop; nop; nop; \
430 nop; nop; nop; nop; \ 434 nop; nop; \
431 ba,a,pt %xcc, etrap_spill_fixup_32bit; \ 435 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
432 ba,a,pt %xcc, etrap_spill_fixup_32bit; \ 436 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
433 ba,a,pt %xcc, etrap_spill_fixup_32bit; 437 ba,a,pt %xcc, etrap_spill_fixup_32bit;
@@ -592,7 +596,9 @@ user_rtt_fill_64bit: \
592 596
593/* Normal 32bit fill */ 597/* Normal 32bit fill */
594#define FILL_2_GENERIC(ASI) \ 598#define FILL_2_GENERIC(ASI) \
595 srl %sp, 0, %sp; \ 599 and %sp, 1, %g3; \
600 brnz,pn %g3, (. - (128 + 4)); \
601 srl %sp, 0, %sp; \
596 lduwa [%sp + %g0] ASI, %l0; \ 602 lduwa [%sp + %g0] ASI, %l0; \
597 mov 0x04, %g2; \ 603 mov 0x04, %g2; \
598 mov 0x08, %g3; \ 604 mov 0x08, %g3; \
@@ -616,14 +622,16 @@ user_rtt_fill_64bit: \
616 lduwa [%g1 + %g3] ASI, %i6; \ 622 lduwa [%g1 + %g3] ASI, %i6; \
617 lduwa [%g1 + %g5] ASI, %i7; \ 623 lduwa [%g1 + %g5] ASI, %i7; \
618 restored; \ 624 restored; \
619 retry; nop; nop; nop; nop; \ 625 retry; nop; nop; \
620 b,a,pt %xcc, fill_fixup_dax; \ 626 b,a,pt %xcc, fill_fixup_dax; \
621 b,a,pt %xcc, fill_fixup_mna; \ 627 b,a,pt %xcc, fill_fixup_mna; \
622 b,a,pt %xcc, fill_fixup; 628 b,a,pt %xcc, fill_fixup;
623 629
624#define FILL_2_GENERIC_RTRAP \ 630#define FILL_2_GENERIC_RTRAP \
625user_rtt_fill_32bit: \ 631user_rtt_fill_32bit: \
626 srl %sp, 0, %sp; \ 632 and %sp, 1, %g3; \
633 brnz,pn %g3, user_rtt_fill_64bit; \
634 srl %sp, 0, %sp; \
627 lduwa [%sp + 0x00] %asi, %l0; \ 635 lduwa [%sp + 0x00] %asi, %l0; \
628 lduwa [%sp + 0x04] %asi, %l1; \ 636 lduwa [%sp + 0x04] %asi, %l1; \
629 lduwa [%sp + 0x08] %asi, %l2; \ 637 lduwa [%sp + 0x08] %asi, %l2; \
@@ -643,7 +651,7 @@ user_rtt_fill_32bit: \
643 ba,pt %xcc, user_rtt_pre_restore; \ 651 ba,pt %xcc, user_rtt_pre_restore; \
644 restored; \ 652 restored; \
645 nop; nop; nop; nop; nop; \ 653 nop; nop; nop; nop; nop; \
646 nop; nop; nop; nop; nop; \ 654 nop; nop; nop; \
647 ba,a,pt %xcc, user_rtt_fill_fixup; \ 655 ba,a,pt %xcc, user_rtt_fill_fixup; \
648 ba,a,pt %xcc, user_rtt_fill_fixup; \ 656 ba,a,pt %xcc, user_rtt_fill_fixup; \
649 ba,a,pt %xcc, user_rtt_fill_fixup; 657 ba,a,pt %xcc, user_rtt_fill_fixup;
diff --git a/arch/sparc/include/uapi/asm/unistd.h b/arch/sparc/include/uapi/asm/unistd.h
index 8974ef7ae920..cac719d1bc5c 100644
--- a/arch/sparc/include/uapi/asm/unistd.h
+++ b/arch/sparc/include/uapi/asm/unistd.h
@@ -405,8 +405,13 @@
405#define __NR_setns 337 405#define __NR_setns 337
406#define __NR_process_vm_readv 338 406#define __NR_process_vm_readv 338
407#define __NR_process_vm_writev 339 407#define __NR_process_vm_writev 339
408#define __NR_kern_features 340
409#define __NR_kcmp 341
408 410
409#define NR_syscalls 340 411#define NR_syscalls 342
412
413/* Bitmask values returned from kern_features system call. */
414#define KERN_FEATURE_MIXED_MODE_STACK 0x00000001
410 415
411#ifdef __32bit_syscall_numbers__ 416#ifdef __32bit_syscall_numbers__
412/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants, 417/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants,
diff --git a/arch/sparc/kernel/entry.h b/arch/sparc/kernel/entry.h
index 0c218e4c0881..cc3c5cb47cda 100644
--- a/arch/sparc/kernel/entry.h
+++ b/arch/sparc/kernel/entry.h
@@ -59,6 +59,13 @@ struct popc_6insn_patch_entry {
59extern struct popc_6insn_patch_entry __popc_6insn_patch, 59extern struct popc_6insn_patch_entry __popc_6insn_patch,
60 __popc_6insn_patch_end; 60 __popc_6insn_patch_end;
61 61
62struct pause_patch_entry {
63 unsigned int addr;
64 unsigned int insns[3];
65};
66extern struct pause_patch_entry __pause_3insn_patch,
67 __pause_3insn_patch_end;
68
62extern void __init per_cpu_patch(void); 69extern void __init per_cpu_patch(void);
63extern void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *, 70extern void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *,
64 struct sun4v_1insn_patch_entry *); 71 struct sun4v_1insn_patch_entry *);
diff --git a/arch/sparc/kernel/leon_kernel.c b/arch/sparc/kernel/leon_kernel.c
index f8b6eee40bde..87f60ee65433 100644
--- a/arch/sparc/kernel/leon_kernel.c
+++ b/arch/sparc/kernel/leon_kernel.c
@@ -56,11 +56,13 @@ static inline unsigned int leon_eirq_get(int cpu)
56static void leon_handle_ext_irq(unsigned int irq, struct irq_desc *desc) 56static void leon_handle_ext_irq(unsigned int irq, struct irq_desc *desc)
57{ 57{
58 unsigned int eirq; 58 unsigned int eirq;
59 struct irq_bucket *p;
59 int cpu = sparc_leon3_cpuid(); 60 int cpu = sparc_leon3_cpuid();
60 61
61 eirq = leon_eirq_get(cpu); 62 eirq = leon_eirq_get(cpu);
62 if ((eirq & 0x10) && irq_map[eirq]->irq) /* bit4 tells if IRQ happened */ 63 p = irq_map[eirq];
63 generic_handle_irq(irq_map[eirq]->irq); 64 if ((eirq & 0x10) && p && p->irq) /* bit4 tells if IRQ happened */
65 generic_handle_irq(p->irq);
64} 66}
65 67
66/* The extended IRQ controller has been found, this function registers it */ 68/* The extended IRQ controller has been found, this function registers it */
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c
index 885a8af74064..b5c38faa4ead 100644
--- a/arch/sparc/kernel/perf_event.c
+++ b/arch/sparc/kernel/perf_event.c
@@ -1762,15 +1762,25 @@ static void perf_callchain_user_32(struct perf_callchain_entry *entry,
1762 1762
1763 ufp = regs->u_regs[UREG_I6] & 0xffffffffUL; 1763 ufp = regs->u_regs[UREG_I6] & 0xffffffffUL;
1764 do { 1764 do {
1765 struct sparc_stackf32 *usf, sf;
1766 unsigned long pc; 1765 unsigned long pc;
1767 1766
1768 usf = (struct sparc_stackf32 *) ufp; 1767 if (thread32_stack_is_64bit(ufp)) {
1769 if (__copy_from_user_inatomic(&sf, usf, sizeof(sf))) 1768 struct sparc_stackf *usf, sf;
1770 break;
1771 1769
1772 pc = sf.callers_pc; 1770 ufp += STACK_BIAS;
1773 ufp = (unsigned long)sf.fp; 1771 usf = (struct sparc_stackf *) ufp;
1772 if (__copy_from_user_inatomic(&sf, usf, sizeof(sf)))
1773 break;
1774 pc = sf.callers_pc & 0xffffffff;
1775 ufp = ((unsigned long) sf.fp) & 0xffffffff;
1776 } else {
1777 struct sparc_stackf32 *usf, sf;
1778 usf = (struct sparc_stackf32 *) ufp;
1779 if (__copy_from_user_inatomic(&sf, usf, sizeof(sf)))
1780 break;
1781 pc = sf.callers_pc;
1782 ufp = (unsigned long)sf.fp;
1783 }
1774 perf_callchain_store(entry, pc); 1784 perf_callchain_store(entry, pc);
1775 } while (entry->nr < PERF_MAX_STACK_DEPTH); 1785 } while (entry->nr < PERF_MAX_STACK_DEPTH);
1776} 1786}
diff --git a/arch/sparc/kernel/process_64.c b/arch/sparc/kernel/process_64.c
index d778248ef3f8..c6e0c2910043 100644
--- a/arch/sparc/kernel/process_64.c
+++ b/arch/sparc/kernel/process_64.c
@@ -452,13 +452,16 @@ void flush_thread(void)
452/* It's a bit more tricky when 64-bit tasks are involved... */ 452/* It's a bit more tricky when 64-bit tasks are involved... */
453static unsigned long clone_stackframe(unsigned long csp, unsigned long psp) 453static unsigned long clone_stackframe(unsigned long csp, unsigned long psp)
454{ 454{
455 bool stack_64bit = test_thread_64bit_stack(psp);
455 unsigned long fp, distance, rval; 456 unsigned long fp, distance, rval;
456 457
457 if (!(test_thread_flag(TIF_32BIT))) { 458 if (stack_64bit) {
458 csp += STACK_BIAS; 459 csp += STACK_BIAS;
459 psp += STACK_BIAS; 460 psp += STACK_BIAS;
460 __get_user(fp, &(((struct reg_window __user *)psp)->ins[6])); 461 __get_user(fp, &(((struct reg_window __user *)psp)->ins[6]));
461 fp += STACK_BIAS; 462 fp += STACK_BIAS;
463 if (test_thread_flag(TIF_32BIT))
464 fp &= 0xffffffff;
462 } else 465 } else
463 __get_user(fp, &(((struct reg_window32 __user *)psp)->ins[6])); 466 __get_user(fp, &(((struct reg_window32 __user *)psp)->ins[6]));
464 467
@@ -472,7 +475,7 @@ static unsigned long clone_stackframe(unsigned long csp, unsigned long psp)
472 rval = (csp - distance); 475 rval = (csp - distance);
473 if (copy_in_user((void __user *) rval, (void __user *) psp, distance)) 476 if (copy_in_user((void __user *) rval, (void __user *) psp, distance))
474 rval = 0; 477 rval = 0;
475 else if (test_thread_flag(TIF_32BIT)) { 478 else if (!stack_64bit) {
476 if (put_user(((u32)csp), 479 if (put_user(((u32)csp),
477 &(((struct reg_window32 __user *)rval)->ins[6]))) 480 &(((struct reg_window32 __user *)rval)->ins[6])))
478 rval = 0; 481 rval = 0;
@@ -507,18 +510,18 @@ void synchronize_user_stack(void)
507 510
508 flush_user_windows(); 511 flush_user_windows();
509 if ((window = get_thread_wsaved()) != 0) { 512 if ((window = get_thread_wsaved()) != 0) {
510 int winsize = sizeof(struct reg_window);
511 int bias = 0;
512
513 if (test_thread_flag(TIF_32BIT))
514 winsize = sizeof(struct reg_window32);
515 else
516 bias = STACK_BIAS;
517
518 window -= 1; 513 window -= 1;
519 do { 514 do {
520 unsigned long sp = (t->rwbuf_stkptrs[window] + bias);
521 struct reg_window *rwin = &t->reg_window[window]; 515 struct reg_window *rwin = &t->reg_window[window];
516 int winsize = sizeof(struct reg_window);
517 unsigned long sp;
518
519 sp = t->rwbuf_stkptrs[window];
520
521 if (test_thread_64bit_stack(sp))
522 sp += STACK_BIAS;
523 else
524 winsize = sizeof(struct reg_window32);
522 525
523 if (!copy_to_user((char __user *)sp, rwin, winsize)) { 526 if (!copy_to_user((char __user *)sp, rwin, winsize)) {
524 shift_window_buffer(window, get_thread_wsaved() - 1, t); 527 shift_window_buffer(window, get_thread_wsaved() - 1, t);
@@ -544,13 +547,6 @@ void fault_in_user_windows(void)
544{ 547{
545 struct thread_info *t = current_thread_info(); 548 struct thread_info *t = current_thread_info();
546 unsigned long window; 549 unsigned long window;
547 int winsize = sizeof(struct reg_window);
548 int bias = 0;
549
550 if (test_thread_flag(TIF_32BIT))
551 winsize = sizeof(struct reg_window32);
552 else
553 bias = STACK_BIAS;
554 550
555 flush_user_windows(); 551 flush_user_windows();
556 window = get_thread_wsaved(); 552 window = get_thread_wsaved();
@@ -558,8 +554,16 @@ void fault_in_user_windows(void)
558 if (likely(window != 0)) { 554 if (likely(window != 0)) {
559 window -= 1; 555 window -= 1;
560 do { 556 do {
561 unsigned long sp = (t->rwbuf_stkptrs[window] + bias);
562 struct reg_window *rwin = &t->reg_window[window]; 557 struct reg_window *rwin = &t->reg_window[window];
558 int winsize = sizeof(struct reg_window);
559 unsigned long sp;
560
561 sp = t->rwbuf_stkptrs[window];
562
563 if (test_thread_64bit_stack(sp))
564 sp += STACK_BIAS;
565 else
566 winsize = sizeof(struct reg_window32);
563 567
564 if (unlikely(sp & 0x7UL)) 568 if (unlikely(sp & 0x7UL))
565 stack_unaligned(sp); 569 stack_unaligned(sp);
diff --git a/arch/sparc/kernel/ptrace_64.c b/arch/sparc/kernel/ptrace_64.c
index 484dabac7045..7ff45e4ba681 100644
--- a/arch/sparc/kernel/ptrace_64.c
+++ b/arch/sparc/kernel/ptrace_64.c
@@ -151,7 +151,7 @@ static int regwindow64_get(struct task_struct *target,
151{ 151{
152 unsigned long rw_addr = regs->u_regs[UREG_I6]; 152 unsigned long rw_addr = regs->u_regs[UREG_I6];
153 153
154 if (test_tsk_thread_flag(current, TIF_32BIT)) { 154 if (!test_thread_64bit_stack(rw_addr)) {
155 struct reg_window32 win32; 155 struct reg_window32 win32;
156 int i; 156 int i;
157 157
@@ -176,7 +176,7 @@ static int regwindow64_set(struct task_struct *target,
176{ 176{
177 unsigned long rw_addr = regs->u_regs[UREG_I6]; 177 unsigned long rw_addr = regs->u_regs[UREG_I6];
178 178
179 if (test_tsk_thread_flag(current, TIF_32BIT)) { 179 if (!test_thread_64bit_stack(rw_addr)) {
180 struct reg_window32 win32; 180 struct reg_window32 win32;
181 int i; 181 int i;
182 182
diff --git a/arch/sparc/kernel/setup_64.c b/arch/sparc/kernel/setup_64.c
index 0800e71d8a88..0eaf0059aaef 100644
--- a/arch/sparc/kernel/setup_64.c
+++ b/arch/sparc/kernel/setup_64.c
@@ -316,6 +316,25 @@ static void __init popc_patch(void)
316 } 316 }
317} 317}
318 318
319static void __init pause_patch(void)
320{
321 struct pause_patch_entry *p;
322
323 p = &__pause_3insn_patch;
324 while (p < &__pause_3insn_patch_end) {
325 unsigned long i, addr = p->addr;
326
327 for (i = 0; i < 3; i++) {
328 *(unsigned int *) (addr + (i * 4)) = p->insns[i];
329 wmb();
330 __asm__ __volatile__("flush %0"
331 : : "r" (addr + (i * 4)));
332 }
333
334 p++;
335 }
336}
337
319#ifdef CONFIG_SMP 338#ifdef CONFIG_SMP
320void __init boot_cpu_id_too_large(int cpu) 339void __init boot_cpu_id_too_large(int cpu)
321{ 340{
@@ -528,6 +547,8 @@ static void __init init_sparc64_elf_hwcap(void)
528 547
529 if (sparc64_elf_hwcap & AV_SPARC_POPC) 548 if (sparc64_elf_hwcap & AV_SPARC_POPC)
530 popc_patch(); 549 popc_patch();
550 if (sparc64_elf_hwcap & AV_SPARC_PAUSE)
551 pause_patch();
531} 552}
532 553
533void __init setup_arch(char **cmdline_p) 554void __init setup_arch(char **cmdline_p)
diff --git a/arch/sparc/kernel/signal_64.c b/arch/sparc/kernel/signal_64.c
index 867de2f8189c..689e1ba62809 100644
--- a/arch/sparc/kernel/signal_64.c
+++ b/arch/sparc/kernel/signal_64.c
@@ -295,9 +295,7 @@ void do_rt_sigreturn(struct pt_regs *regs)
295 err |= restore_fpu_state(regs, fpu_save); 295 err |= restore_fpu_state(regs, fpu_save);
296 296
297 err |= __copy_from_user(&set, &sf->mask, sizeof(sigset_t)); 297 err |= __copy_from_user(&set, &sf->mask, sizeof(sigset_t));
298 err |= do_sigaltstack(&sf->stack, NULL, (unsigned long)sf); 298 if (err || do_sigaltstack(&sf->stack, NULL, (unsigned long)sf) == -EFAULT)
299
300 if (err)
301 goto segv; 299 goto segv;
302 300
303 err |= __get_user(rwin_save, &sf->rwin_save); 301 err |= __get_user(rwin_save, &sf->rwin_save);
diff --git a/arch/sparc/kernel/sys32.S b/arch/sparc/kernel/sys32.S
index 44025f4ba41f..8475a474273a 100644
--- a/arch/sparc/kernel/sys32.S
+++ b/arch/sparc/kernel/sys32.S
@@ -47,7 +47,7 @@ STUB: sra REG1, 0, REG1; \
47 sra REG4, 0, REG4 47 sra REG4, 0, REG4
48 48
49SIGN1(sys32_exit, sparc_exit, %o0) 49SIGN1(sys32_exit, sparc_exit, %o0)
50SIGN1(sys32_exit_group, sys_exit_group, %o0) 50SIGN1(sys32_exit_group, sparc_exit_group, %o0)
51SIGN1(sys32_wait4, compat_sys_wait4, %o2) 51SIGN1(sys32_wait4, compat_sys_wait4, %o2)
52SIGN1(sys32_creat, sys_creat, %o1) 52SIGN1(sys32_creat, sys_creat, %o1)
53SIGN1(sys32_mknod, sys_mknod, %o1) 53SIGN1(sys32_mknod, sys_mknod, %o1)
diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c
index 11c6c9603e71..878ef3d5fec5 100644
--- a/arch/sparc/kernel/sys_sparc_64.c
+++ b/arch/sparc/kernel/sys_sparc_64.c
@@ -751,3 +751,8 @@ int kernel_execve(const char *filename,
751 : "cc"); 751 : "cc");
752 return __res; 752 return __res;
753} 753}
754
755asmlinkage long sys_kern_features(void)
756{
757 return KERN_FEATURE_MIXED_MODE_STACK;
758}
diff --git a/arch/sparc/kernel/syscalls.S b/arch/sparc/kernel/syscalls.S
index 7f5f65d0b3fd..bf2347794e33 100644
--- a/arch/sparc/kernel/syscalls.S
+++ b/arch/sparc/kernel/syscalls.S
@@ -118,10 +118,20 @@ ret_from_syscall:
118 ba,pt %xcc, ret_sys_call 118 ba,pt %xcc, ret_sys_call
119 ldx [%sp + PTREGS_OFF + PT_V9_I0], %o0 119 ldx [%sp + PTREGS_OFF + PT_V9_I0], %o0
120 120
121 .globl sparc_exit_group
122 .type sparc_exit_group,#function
123sparc_exit_group:
124 sethi %hi(sys_exit_group), %g7
125 ba,pt %xcc, 1f
126 or %g7, %lo(sys_exit_group), %g7
127 .size sparc_exit_group,.-sparc_exit_group
128
121 .globl sparc_exit 129 .globl sparc_exit
122 .type sparc_exit,#function 130 .type sparc_exit,#function
123sparc_exit: 131sparc_exit:
124 rdpr %pstate, %g2 132 sethi %hi(sys_exit), %g7
133 or %g7, %lo(sys_exit), %g7
1341: rdpr %pstate, %g2
125 wrpr %g2, PSTATE_IE, %pstate 135 wrpr %g2, PSTATE_IE, %pstate
126 rdpr %otherwin, %g1 136 rdpr %otherwin, %g1
127 rdpr %cansave, %g3 137 rdpr %cansave, %g3
@@ -129,7 +139,7 @@ sparc_exit:
129 wrpr %g3, 0x0, %cansave 139 wrpr %g3, 0x0, %cansave
130 wrpr %g0, 0x0, %otherwin 140 wrpr %g0, 0x0, %otherwin
131 wrpr %g2, 0x0, %pstate 141 wrpr %g2, 0x0, %pstate
132 ba,pt %xcc, sys_exit 142 jmpl %g7, %g0
133 stb %g0, [%g6 + TI_WSAVED] 143 stb %g0, [%g6 + TI_WSAVED]
134 .size sparc_exit,.-sparc_exit 144 .size sparc_exit,.-sparc_exit
135 145
diff --git a/arch/sparc/kernel/systbls_32.S b/arch/sparc/kernel/systbls_32.S
index 63402f9e9f51..5147f574f125 100644
--- a/arch/sparc/kernel/systbls_32.S
+++ b/arch/sparc/kernel/systbls_32.S
@@ -85,3 +85,4 @@ sys_call_table:
85/*325*/ .long sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init 85/*325*/ .long sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init
86/*330*/ .long sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime 86/*330*/ .long sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime
87/*335*/ .long sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev 87/*335*/ .long sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev
88/*340*/ .long sys_ni_syscall, sys_kcmp
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S
index 3a58e0d66f51..017b74a63dcb 100644
--- a/arch/sparc/kernel/systbls_64.S
+++ b/arch/sparc/kernel/systbls_64.S
@@ -86,6 +86,7 @@ sys_call_table32:
86 .word compat_sys_pwritev, compat_sys_rt_tgsigqueueinfo, sys_perf_event_open, compat_sys_recvmmsg, sys_fanotify_init 86 .word compat_sys_pwritev, compat_sys_rt_tgsigqueueinfo, sys_perf_event_open, compat_sys_recvmmsg, sys_fanotify_init
87/*330*/ .word sys32_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, compat_sys_open_by_handle_at, compat_sys_clock_adjtime 87/*330*/ .word sys32_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, compat_sys_open_by_handle_at, compat_sys_clock_adjtime
88 .word sys_syncfs, compat_sys_sendmmsg, sys_setns, compat_sys_process_vm_readv, compat_sys_process_vm_writev 88 .word sys_syncfs, compat_sys_sendmmsg, sys_setns, compat_sys_process_vm_readv, compat_sys_process_vm_writev
89/*340*/ .word sys_kern_features, sys_kcmp
89 90
90#endif /* CONFIG_COMPAT */ 91#endif /* CONFIG_COMPAT */
91 92
@@ -132,7 +133,7 @@ sys_call_table:
132/*170*/ .word sys_lsetxattr, sys_fsetxattr, sys_getxattr, sys_lgetxattr, sys_getdents 133/*170*/ .word sys_lsetxattr, sys_fsetxattr, sys_getxattr, sys_lgetxattr, sys_getdents
133 .word sys_setsid, sys_fchdir, sys_fgetxattr, sys_listxattr, sys_llistxattr 134 .word sys_setsid, sys_fchdir, sys_fgetxattr, sys_listxattr, sys_llistxattr
134/*180*/ .word sys_flistxattr, sys_removexattr, sys_lremovexattr, sys_nis_syscall, sys_ni_syscall 135/*180*/ .word sys_flistxattr, sys_removexattr, sys_lremovexattr, sys_nis_syscall, sys_ni_syscall
135 .word sys_setpgid, sys_fremovexattr, sys_tkill, sys_exit_group, sys_newuname 136 .word sys_setpgid, sys_fremovexattr, sys_tkill, sparc_exit_group, sys_newuname
136/*190*/ .word sys_init_module, sys_sparc64_personality, sys_remap_file_pages, sys_epoll_create, sys_epoll_ctl 137/*190*/ .word sys_init_module, sys_sparc64_personality, sys_remap_file_pages, sys_epoll_create, sys_epoll_ctl
137 .word sys_epoll_wait, sys_ioprio_set, sys_getppid, sys_nis_syscall, sys_sgetmask 138 .word sys_epoll_wait, sys_ioprio_set, sys_getppid, sys_nis_syscall, sys_sgetmask
138/*200*/ .word sys_ssetmask, sys_nis_syscall, sys_newlstat, sys_uselib, sys_nis_syscall 139/*200*/ .word sys_ssetmask, sys_nis_syscall, sys_newlstat, sys_uselib, sys_nis_syscall
@@ -163,3 +164,4 @@ sys_call_table:
163 .word sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init 164 .word sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init
164/*330*/ .word sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime 165/*330*/ .word sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime
165 .word sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev 166 .word sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev
167/*340*/ .word sys_kern_features, sys_kcmp
diff --git a/arch/sparc/kernel/unaligned_64.c b/arch/sparc/kernel/unaligned_64.c
index f81d038f7340..8201c25e7669 100644
--- a/arch/sparc/kernel/unaligned_64.c
+++ b/arch/sparc/kernel/unaligned_64.c
@@ -113,21 +113,24 @@ static inline long sign_extend_imm13(long imm)
113 113
114static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs) 114static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
115{ 115{
116 unsigned long value; 116 unsigned long value, fp;
117 117
118 if (reg < 16) 118 if (reg < 16)
119 return (!reg ? 0 : regs->u_regs[reg]); 119 return (!reg ? 0 : regs->u_regs[reg]);
120
121 fp = regs->u_regs[UREG_FP];
122
120 if (regs->tstate & TSTATE_PRIV) { 123 if (regs->tstate & TSTATE_PRIV) {
121 struct reg_window *win; 124 struct reg_window *win;
122 win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); 125 win = (struct reg_window *)(fp + STACK_BIAS);
123 value = win->locals[reg - 16]; 126 value = win->locals[reg - 16];
124 } else if (test_thread_flag(TIF_32BIT)) { 127 } else if (!test_thread_64bit_stack(fp)) {
125 struct reg_window32 __user *win32; 128 struct reg_window32 __user *win32;
126 win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); 129 win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
127 get_user(value, &win32->locals[reg - 16]); 130 get_user(value, &win32->locals[reg - 16]);
128 } else { 131 } else {
129 struct reg_window __user *win; 132 struct reg_window __user *win;
130 win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); 133 win = (struct reg_window __user *)(fp + STACK_BIAS);
131 get_user(value, &win->locals[reg - 16]); 134 get_user(value, &win->locals[reg - 16]);
132 } 135 }
133 return value; 136 return value;
@@ -135,19 +138,24 @@ static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
135 138
136static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs) 139static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
137{ 140{
141 unsigned long fp;
142
138 if (reg < 16) 143 if (reg < 16)
139 return &regs->u_regs[reg]; 144 return &regs->u_regs[reg];
145
146 fp = regs->u_regs[UREG_FP];
147
140 if (regs->tstate & TSTATE_PRIV) { 148 if (regs->tstate & TSTATE_PRIV) {
141 struct reg_window *win; 149 struct reg_window *win;
142 win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); 150 win = (struct reg_window *)(fp + STACK_BIAS);
143 return &win->locals[reg - 16]; 151 return &win->locals[reg - 16];
144 } else if (test_thread_flag(TIF_32BIT)) { 152 } else if (!test_thread_64bit_stack(fp)) {
145 struct reg_window32 *win32; 153 struct reg_window32 *win32;
146 win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP])); 154 win32 = (struct reg_window32 *)((unsigned long)((u32)fp));
147 return (unsigned long *)&win32->locals[reg - 16]; 155 return (unsigned long *)&win32->locals[reg - 16];
148 } else { 156 } else {
149 struct reg_window *win; 157 struct reg_window *win;
150 win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); 158 win = (struct reg_window *)(fp + STACK_BIAS);
151 return &win->locals[reg - 16]; 159 return &win->locals[reg - 16];
152 } 160 }
153} 161}
@@ -392,13 +400,15 @@ int handle_popc(u32 insn, struct pt_regs *regs)
392 if (rd) 400 if (rd)
393 regs->u_regs[rd] = ret; 401 regs->u_regs[rd] = ret;
394 } else { 402 } else {
395 if (test_thread_flag(TIF_32BIT)) { 403 unsigned long fp = regs->u_regs[UREG_FP];
404
405 if (!test_thread_64bit_stack(fp)) {
396 struct reg_window32 __user *win32; 406 struct reg_window32 __user *win32;
397 win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); 407 win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
398 put_user(ret, &win32->locals[rd - 16]); 408 put_user(ret, &win32->locals[rd - 16]);
399 } else { 409 } else {
400 struct reg_window __user *win; 410 struct reg_window __user *win;
401 win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); 411 win = (struct reg_window __user *)(fp + STACK_BIAS);
402 put_user(ret, &win->locals[rd - 16]); 412 put_user(ret, &win->locals[rd - 16]);
403 } 413 }
404 } 414 }
@@ -554,7 +564,7 @@ void handle_ld_nf(u32 insn, struct pt_regs *regs)
554 reg[0] = 0; 564 reg[0] = 0;
555 if ((insn & 0x780000) == 0x180000) 565 if ((insn & 0x780000) == 0x180000)
556 reg[1] = 0; 566 reg[1] = 0;
557 } else if (test_thread_flag(TIF_32BIT)) { 567 } else if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) {
558 put_user(0, (int __user *) reg); 568 put_user(0, (int __user *) reg);
559 if ((insn & 0x780000) == 0x180000) 569 if ((insn & 0x780000) == 0x180000)
560 put_user(0, ((int __user *) reg) + 1); 570 put_user(0, ((int __user *) reg) + 1);
diff --git a/arch/sparc/kernel/visemul.c b/arch/sparc/kernel/visemul.c
index 08e074b7eb6a..c096c624ac4d 100644
--- a/arch/sparc/kernel/visemul.c
+++ b/arch/sparc/kernel/visemul.c
@@ -149,21 +149,24 @@ static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
149 149
150static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs) 150static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
151{ 151{
152 unsigned long value; 152 unsigned long value, fp;
153 153
154 if (reg < 16) 154 if (reg < 16)
155 return (!reg ? 0 : regs->u_regs[reg]); 155 return (!reg ? 0 : regs->u_regs[reg]);
156
157 fp = regs->u_regs[UREG_FP];
158
156 if (regs->tstate & TSTATE_PRIV) { 159 if (regs->tstate & TSTATE_PRIV) {
157 struct reg_window *win; 160 struct reg_window *win;
158 win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); 161 win = (struct reg_window *)(fp + STACK_BIAS);
159 value = win->locals[reg - 16]; 162 value = win->locals[reg - 16];
160 } else if (test_thread_flag(TIF_32BIT)) { 163 } else if (!test_thread_64bit_stack(fp)) {
161 struct reg_window32 __user *win32; 164 struct reg_window32 __user *win32;
162 win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); 165 win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
163 get_user(value, &win32->locals[reg - 16]); 166 get_user(value, &win32->locals[reg - 16]);
164 } else { 167 } else {
165 struct reg_window __user *win; 168 struct reg_window __user *win;
166 win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); 169 win = (struct reg_window __user *)(fp + STACK_BIAS);
167 get_user(value, &win->locals[reg - 16]); 170 get_user(value, &win->locals[reg - 16]);
168 } 171 }
169 return value; 172 return value;
@@ -172,16 +175,18 @@ static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
172static inline unsigned long __user *__fetch_reg_addr_user(unsigned int reg, 175static inline unsigned long __user *__fetch_reg_addr_user(unsigned int reg,
173 struct pt_regs *regs) 176 struct pt_regs *regs)
174{ 177{
178 unsigned long fp = regs->u_regs[UREG_FP];
179
175 BUG_ON(reg < 16); 180 BUG_ON(reg < 16);
176 BUG_ON(regs->tstate & TSTATE_PRIV); 181 BUG_ON(regs->tstate & TSTATE_PRIV);
177 182
178 if (test_thread_flag(TIF_32BIT)) { 183 if (!test_thread_64bit_stack(fp)) {
179 struct reg_window32 __user *win32; 184 struct reg_window32 __user *win32;
180 win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); 185 win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
181 return (unsigned long __user *)&win32->locals[reg - 16]; 186 return (unsigned long __user *)&win32->locals[reg - 16];
182 } else { 187 } else {
183 struct reg_window __user *win; 188 struct reg_window __user *win;
184 win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); 189 win = (struct reg_window __user *)(fp + STACK_BIAS);
185 return &win->locals[reg - 16]; 190 return &win->locals[reg - 16];
186 } 191 }
187} 192}
@@ -204,7 +209,7 @@ static void store_reg(struct pt_regs *regs, unsigned long val, unsigned long rd)
204 } else { 209 } else {
205 unsigned long __user *rd_user = __fetch_reg_addr_user(rd, regs); 210 unsigned long __user *rd_user = __fetch_reg_addr_user(rd, regs);
206 211
207 if (test_thread_flag(TIF_32BIT)) 212 if (!test_thread_64bit_stack(regs->u_regs[UREG_FP]))
208 __put_user((u32)val, (u32 __user *)rd_user); 213 __put_user((u32)val, (u32 __user *)rd_user);
209 else 214 else
210 __put_user(val, rd_user); 215 __put_user(val, rd_user);
diff --git a/arch/sparc/kernel/vmlinux.lds.S b/arch/sparc/kernel/vmlinux.lds.S
index 89c2c29f154b..0bacceb19150 100644
--- a/arch/sparc/kernel/vmlinux.lds.S
+++ b/arch/sparc/kernel/vmlinux.lds.S
@@ -132,6 +132,11 @@ SECTIONS
132 *(.popc_6insn_patch) 132 *(.popc_6insn_patch)
133 __popc_6insn_patch_end = .; 133 __popc_6insn_patch_end = .;
134 } 134 }
135 .pause_3insn_patch : {
136 __pause_3insn_patch = .;
137 *(.pause_3insn_patch)
138 __pause_3insn_patch_end = .;
139 }
135 PERCPU_SECTION(SMP_CACHE_BYTES) 140 PERCPU_SECTION(SMP_CACHE_BYTES)
136 141
137 . = ALIGN(PAGE_SIZE); 142 . = ALIGN(PAGE_SIZE);
diff --git a/arch/sparc/kernel/winfixup.S b/arch/sparc/kernel/winfixup.S
index a6b0863c27df..1e67ce958369 100644
--- a/arch/sparc/kernel/winfixup.S
+++ b/arch/sparc/kernel/winfixup.S
@@ -43,6 +43,8 @@ spill_fixup_mna:
43spill_fixup_dax: 43spill_fixup_dax:
44 TRAP_LOAD_THREAD_REG(%g6, %g1) 44 TRAP_LOAD_THREAD_REG(%g6, %g1)
45 ldx [%g6 + TI_FLAGS], %g1 45 ldx [%g6 + TI_FLAGS], %g1
46 andcc %sp, 0x1, %g0
47 movne %icc, 0, %g1
46 andcc %g1, _TIF_32BIT, %g0 48 andcc %g1, _TIF_32BIT, %g0
47 ldub [%g6 + TI_WSAVED], %g1 49 ldub [%g6 + TI_WSAVED], %g1
48 sll %g1, 3, %g3 50 sll %g1, 3, %g3
diff --git a/arch/sparc/lib/atomic_64.S b/arch/sparc/lib/atomic_64.S
index 4d502da3de78..85c233d0a340 100644
--- a/arch/sparc/lib/atomic_64.S
+++ b/arch/sparc/lib/atomic_64.S
@@ -1,6 +1,6 @@
1/* atomic.S: These things are too big to do inline. 1/* atomic.S: These things are too big to do inline.
2 * 2 *
3 * Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net) 3 * Copyright (C) 1999, 2007 2012 David S. Miller (davem@davemloft.net)
4 */ 4 */
5 5
6#include <linux/linkage.h> 6#include <linux/linkage.h>
@@ -117,3 +117,17 @@ ENTRY(atomic64_sub_ret) /* %o0 = decrement, %o1 = atomic_ptr */
117 sub %g1, %o0, %o0 117 sub %g1, %o0, %o0
1182: BACKOFF_SPIN(%o2, %o3, 1b) 1182: BACKOFF_SPIN(%o2, %o3, 1b)
119ENDPROC(atomic64_sub_ret) 119ENDPROC(atomic64_sub_ret)
120
121ENTRY(atomic64_dec_if_positive) /* %o0 = atomic_ptr */
122 BACKOFF_SETUP(%o2)
1231: ldx [%o0], %g1
124 brlez,pn %g1, 3f
125 sub %g1, 1, %g7
126 casx [%o0], %g1, %g7
127 cmp %g1, %g7
128 bne,pn %xcc, BACKOFF_LABEL(2f, 1b)
129 nop
1303: retl
131 sub %g1, 1, %o0
1322: BACKOFF_SPIN(%o2, %o3, 1b)
133ENDPROC(atomic64_dec_if_positive)
diff --git a/arch/sparc/lib/ksyms.c b/arch/sparc/lib/ksyms.c
index ee31b884c61b..0c4e35e522fa 100644
--- a/arch/sparc/lib/ksyms.c
+++ b/arch/sparc/lib/ksyms.c
@@ -116,6 +116,7 @@ EXPORT_SYMBOL(atomic64_add);
116EXPORT_SYMBOL(atomic64_add_ret); 116EXPORT_SYMBOL(atomic64_add_ret);
117EXPORT_SYMBOL(atomic64_sub); 117EXPORT_SYMBOL(atomic64_sub);
118EXPORT_SYMBOL(atomic64_sub_ret); 118EXPORT_SYMBOL(atomic64_sub_ret);
119EXPORT_SYMBOL(atomic64_dec_if_positive);
119 120
120/* Atomic bit operations. */ 121/* Atomic bit operations. */
121EXPORT_SYMBOL(test_and_set_bit); 122EXPORT_SYMBOL(test_and_set_bit);
diff --git a/arch/sparc/math-emu/math_64.c b/arch/sparc/math-emu/math_64.c
index 1704068da928..034aadbff036 100644
--- a/arch/sparc/math-emu/math_64.c
+++ b/arch/sparc/math-emu/math_64.c
@@ -320,7 +320,7 @@ int do_mathemu(struct pt_regs *regs, struct fpustate *f, bool illegal_insn_trap)
320 XR = 0; 320 XR = 0;
321 else if (freg < 16) 321 else if (freg < 16)
322 XR = regs->u_regs[freg]; 322 XR = regs->u_regs[freg];
323 else if (test_thread_flag(TIF_32BIT)) { 323 else if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) {
324 struct reg_window32 __user *win32; 324 struct reg_window32 __user *win32;
325 flushw_user (); 325 flushw_user ();
326 win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); 326 win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
diff --git a/arch/um/kernel/exec.c b/arch/um/kernel/exec.c
index 3a8ece7d09ca..0d7103c9eff3 100644
--- a/arch/um/kernel/exec.c
+++ b/arch/um/kernel/exec.c
@@ -32,13 +32,14 @@ void flush_thread(void)
32 "err = %d\n", ret); 32 "err = %d\n", ret);
33 force_sig(SIGKILL, current); 33 force_sig(SIGKILL, current);
34 } 34 }
35 get_safe_registers(current_pt_regs()->regs.gp,
36 current_pt_regs()->regs.fp);
35 37
36 __switch_mm(&current->mm->context.id); 38 __switch_mm(&current->mm->context.id);
37} 39}
38 40
39void start_thread(struct pt_regs *regs, unsigned long eip, unsigned long esp) 41void start_thread(struct pt_regs *regs, unsigned long eip, unsigned long esp)
40{ 42{
41 get_safe_registers(regs->regs.gp, regs->regs.fp);
42 PT_REGS_IP(regs) = eip; 43 PT_REGS_IP(regs) = eip;
43 PT_REGS_SP(regs) = esp; 44 PT_REGS_SP(regs) = esp;
44 current->ptrace &= ~PT_DTRACE; 45 current->ptrace &= ~PT_DTRACE;
diff --git a/arch/unicore32/Kconfig b/arch/unicore32/Kconfig
index e5c5473e69ce..c4fbb21e802b 100644
--- a/arch/unicore32/Kconfig
+++ b/arch/unicore32/Kconfig
@@ -16,6 +16,8 @@ config UNICORE32
16 select ARCH_WANT_FRAME_POINTERS 16 select ARCH_WANT_FRAME_POINTERS
17 select GENERIC_IOMAP 17 select GENERIC_IOMAP
18 select MODULES_USE_ELF_REL 18 select MODULES_USE_ELF_REL
19 select GENERIC_KERNEL_THREAD
20 select GENERIC_KERNEL_EXECVE
19 help 21 help
20 UniCore-32 is 32-bit Instruction Set Architecture, 22 UniCore-32 is 32-bit Instruction Set Architecture,
21 including a series of low-power-consumption RISC chip 23 including a series of low-power-consumption RISC chip
@@ -64,6 +66,9 @@ config GENERIC_CALIBRATE_DELAY
64config ARCH_MAY_HAVE_PC_FDC 66config ARCH_MAY_HAVE_PC_FDC
65 bool 67 bool
66 68
69config ZONE_DMA
70 def_bool y
71
67config NEED_DMA_MAP_STATE 72config NEED_DMA_MAP_STATE
68 def_bool y 73 def_bool y
69 74
@@ -216,7 +221,7 @@ config PUV3_GPIO
216 bool 221 bool
217 depends on !ARCH_FPGA 222 depends on !ARCH_FPGA
218 select GENERIC_GPIO 223 select GENERIC_GPIO
219 select GPIO_SYSFS if EXPERIMENTAL 224 select GPIO_SYSFS
220 default y 225 default y
221 226
222if PUV3_NB0916 227if PUV3_NB0916
diff --git a/arch/unicore32/include/asm/Kbuild b/arch/unicore32/include/asm/Kbuild
index 7be503e45695..89d8b6c4e39a 100644
--- a/arch/unicore32/include/asm/Kbuild
+++ b/arch/unicore32/include/asm/Kbuild
@@ -1,4 +1,3 @@
1include include/asm-generic/Kbuild.asm
2 1
3generic-y += atomic.h 2generic-y += atomic.h
4generic-y += auxvec.h 3generic-y += auxvec.h
diff --git a/arch/unicore32/include/asm/bug.h b/arch/unicore32/include/asm/bug.h
index b1ff8cadb086..93a56f3e2344 100644
--- a/arch/unicore32/include/asm/bug.h
+++ b/arch/unicore32/include/asm/bug.h
@@ -19,9 +19,4 @@ extern void die(const char *msg, struct pt_regs *regs, int err);
19extern void uc32_notify_die(const char *str, struct pt_regs *regs, 19extern void uc32_notify_die(const char *str, struct pt_regs *regs,
20 struct siginfo *info, unsigned long err, unsigned long trap); 20 struct siginfo *info, unsigned long err, unsigned long trap);
21 21
22extern asmlinkage void __backtrace(void);
23extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
24
25extern void __show_regs(struct pt_regs *);
26
27#endif /* __UNICORE_BUG_H__ */ 22#endif /* __UNICORE_BUG_H__ */
diff --git a/arch/unicore32/include/asm/cmpxchg.h b/arch/unicore32/include/asm/cmpxchg.h
index df4d5acfd19f..8e797ad4fa24 100644
--- a/arch/unicore32/include/asm/cmpxchg.h
+++ b/arch/unicore32/include/asm/cmpxchg.h
@@ -35,7 +35,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
35 : "memory", "cc"); 35 : "memory", "cc");
36 break; 36 break;
37 default: 37 default:
38 ret = __xchg_bad_pointer(); 38 __xchg_bad_pointer();
39 } 39 }
40 40
41 return ret; 41 return ret;
diff --git a/arch/unicore32/include/asm/kvm_para.h b/arch/unicore32/include/asm/kvm_para.h
deleted file mode 100644
index 14fab8f0b957..000000000000
--- a/arch/unicore32/include/asm/kvm_para.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/kvm_para.h>
diff --git a/arch/unicore32/include/asm/processor.h b/arch/unicore32/include/asm/processor.h
index 14382cb09657..4eaa42167667 100644
--- a/arch/unicore32/include/asm/processor.h
+++ b/arch/unicore32/include/asm/processor.h
@@ -72,11 +72,6 @@ unsigned long get_wchan(struct task_struct *p);
72 72
73#define cpu_relax() barrier() 73#define cpu_relax() barrier()
74 74
75/*
76 * Create a new kernel thread
77 */
78extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
79
80#define task_pt_regs(p) \ 75#define task_pt_regs(p) \
81 ((struct pt_regs *)(THREAD_START_SP + task_stack_page(p)) - 1) 76 ((struct pt_regs *)(THREAD_START_SP + task_stack_page(p)) - 1)
82 77
diff --git a/arch/unicore32/include/asm/ptrace.h b/arch/unicore32/include/asm/ptrace.h
index b9caf9b0997b..726749dab52f 100644
--- a/arch/unicore32/include/asm/ptrace.h
+++ b/arch/unicore32/include/asm/ptrace.h
@@ -12,80 +12,10 @@
12#ifndef __UNICORE_PTRACE_H__ 12#ifndef __UNICORE_PTRACE_H__
13#define __UNICORE_PTRACE_H__ 13#define __UNICORE_PTRACE_H__
14 14
15#define PTRACE_GET_THREAD_AREA 22 15#include <uapi/asm/ptrace.h>
16
17/*
18 * PSR bits
19 */
20#define USER_MODE 0x00000010
21#define REAL_MODE 0x00000011
22#define INTR_MODE 0x00000012
23#define PRIV_MODE 0x00000013
24#define ABRT_MODE 0x00000017
25#define EXTN_MODE 0x0000001b
26#define SUSR_MODE 0x0000001f
27#define MODE_MASK 0x0000001f
28#define PSR_R_BIT 0x00000040
29#define PSR_I_BIT 0x00000080
30#define PSR_V_BIT 0x10000000
31#define PSR_C_BIT 0x20000000
32#define PSR_Z_BIT 0x40000000
33#define PSR_S_BIT 0x80000000
34
35/*
36 * Groups of PSR bits
37 */
38#define PSR_f 0xff000000 /* Flags */
39#define PSR_c 0x000000ff /* Control */
40 16
41#ifndef __ASSEMBLY__ 17#ifndef __ASSEMBLY__
42 18
43/*
44 * This struct defines the way the registers are stored on the
45 * stack during a system call. Note that sizeof(struct pt_regs)
46 * has to be a multiple of 8.
47 */
48struct pt_regs {
49 unsigned long uregs[34];
50};
51
52#define UCreg_asr uregs[32]
53#define UCreg_pc uregs[31]
54#define UCreg_lr uregs[30]
55#define UCreg_sp uregs[29]
56#define UCreg_ip uregs[28]
57#define UCreg_fp uregs[27]
58#define UCreg_26 uregs[26]
59#define UCreg_25 uregs[25]
60#define UCreg_24 uregs[24]
61#define UCreg_23 uregs[23]
62#define UCreg_22 uregs[22]
63#define UCreg_21 uregs[21]
64#define UCreg_20 uregs[20]
65#define UCreg_19 uregs[19]
66#define UCreg_18 uregs[18]
67#define UCreg_17 uregs[17]
68#define UCreg_16 uregs[16]
69#define UCreg_15 uregs[15]
70#define UCreg_14 uregs[14]
71#define UCreg_13 uregs[13]
72#define UCreg_12 uregs[12]
73#define UCreg_11 uregs[11]
74#define UCreg_10 uregs[10]
75#define UCreg_09 uregs[9]
76#define UCreg_08 uregs[8]
77#define UCreg_07 uregs[7]
78#define UCreg_06 uregs[6]
79#define UCreg_05 uregs[5]
80#define UCreg_04 uregs[4]
81#define UCreg_03 uregs[3]
82#define UCreg_02 uregs[2]
83#define UCreg_01 uregs[1]
84#define UCreg_00 uregs[0]
85#define UCreg_ORIG_00 uregs[33]
86
87#ifdef __KERNEL__
88
89#define user_mode(regs) \ 19#define user_mode(regs) \
90 (processor_mode(regs) == USER_MODE) 20 (processor_mode(regs) == USER_MODE)
91 21
@@ -125,9 +55,5 @@ static inline int valid_user_regs(struct pt_regs *regs)
125 55
126#define instruction_pointer(regs) ((regs)->UCreg_pc) 56#define instruction_pointer(regs) ((regs)->UCreg_pc)
127 57
128#endif /* __KERNEL__ */
129
130#endif /* __ASSEMBLY__ */ 58#endif /* __ASSEMBLY__ */
131
132#endif 59#endif
133
diff --git a/arch/unicore32/include/uapi/asm/Kbuild b/arch/unicore32/include/uapi/asm/Kbuild
index baebb3da1d44..0514d7ad6855 100644
--- a/arch/unicore32/include/uapi/asm/Kbuild
+++ b/arch/unicore32/include/uapi/asm/Kbuild
@@ -1,3 +1,10 @@
1# UAPI Header export list 1# UAPI Header export list
2include include/uapi/asm-generic/Kbuild.asm 2include include/uapi/asm-generic/Kbuild.asm
3 3
4header-y += byteorder.h
5header-y += kvm_para.h
6header-y += ptrace.h
7header-y += sigcontext.h
8header-y += unistd.h
9
10generic-y += kvm_para.h
diff --git a/arch/unicore32/include/asm/byteorder.h b/arch/unicore32/include/uapi/asm/byteorder.h
index ebe1b3fef3e3..ebe1b3fef3e3 100644
--- a/arch/unicore32/include/asm/byteorder.h
+++ b/arch/unicore32/include/uapi/asm/byteorder.h
diff --git a/arch/unicore32/include/uapi/asm/ptrace.h b/arch/unicore32/include/uapi/asm/ptrace.h
new file mode 100644
index 000000000000..187aa2e98a53
--- /dev/null
+++ b/arch/unicore32/include/uapi/asm/ptrace.h
@@ -0,0 +1,90 @@
1/*
2 * linux/arch/unicore32/include/asm/ptrace.h
3 *
4 * Code specific to PKUnity SoC and UniCore ISA
5 *
6 * Copyright (C) 2001-2010 GUAN Xue-tao
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#ifndef _UAPI__UNICORE_PTRACE_H__
13#define _UAPI__UNICORE_PTRACE_H__
14
15#define PTRACE_GET_THREAD_AREA 22
16
17/*
18 * PSR bits
19 */
20#define USER_MODE 0x00000010
21#define REAL_MODE 0x00000011
22#define INTR_MODE 0x00000012
23#define PRIV_MODE 0x00000013
24#define ABRT_MODE 0x00000017
25#define EXTN_MODE 0x0000001b
26#define SUSR_MODE 0x0000001f
27#define MODE_MASK 0x0000001f
28#define PSR_R_BIT 0x00000040
29#define PSR_I_BIT 0x00000080
30#define PSR_V_BIT 0x10000000
31#define PSR_C_BIT 0x20000000
32#define PSR_Z_BIT 0x40000000
33#define PSR_S_BIT 0x80000000
34
35/*
36 * Groups of PSR bits
37 */
38#define PSR_f 0xff000000 /* Flags */
39#define PSR_c 0x000000ff /* Control */
40
41#ifndef __ASSEMBLY__
42
43/*
44 * This struct defines the way the registers are stored on the
45 * stack during a system call. Note that sizeof(struct pt_regs)
46 * has to be a multiple of 8.
47 */
48struct pt_regs {
49 unsigned long uregs[34];
50};
51
52#define UCreg_asr uregs[32]
53#define UCreg_pc uregs[31]
54#define UCreg_lr uregs[30]
55#define UCreg_sp uregs[29]
56#define UCreg_ip uregs[28]
57#define UCreg_fp uregs[27]
58#define UCreg_26 uregs[26]
59#define UCreg_25 uregs[25]
60#define UCreg_24 uregs[24]
61#define UCreg_23 uregs[23]
62#define UCreg_22 uregs[22]
63#define UCreg_21 uregs[21]
64#define UCreg_20 uregs[20]
65#define UCreg_19 uregs[19]
66#define UCreg_18 uregs[18]
67#define UCreg_17 uregs[17]
68#define UCreg_16 uregs[16]
69#define UCreg_15 uregs[15]
70#define UCreg_14 uregs[14]
71#define UCreg_13 uregs[13]
72#define UCreg_12 uregs[12]
73#define UCreg_11 uregs[11]
74#define UCreg_10 uregs[10]
75#define UCreg_09 uregs[9]
76#define UCreg_08 uregs[8]
77#define UCreg_07 uregs[7]
78#define UCreg_06 uregs[6]
79#define UCreg_05 uregs[5]
80#define UCreg_04 uregs[4]
81#define UCreg_03 uregs[3]
82#define UCreg_02 uregs[2]
83#define UCreg_01 uregs[1]
84#define UCreg_00 uregs[0]
85#define UCreg_ORIG_00 uregs[33]
86
87
88#endif /* __ASSEMBLY__ */
89
90#endif /* _UAPI__UNICORE_PTRACE_H__ */
diff --git a/arch/unicore32/include/asm/sigcontext.h b/arch/unicore32/include/uapi/asm/sigcontext.h
index 6a2d7671c052..6a2d7671c052 100644
--- a/arch/unicore32/include/asm/sigcontext.h
+++ b/arch/unicore32/include/uapi/asm/sigcontext.h
diff --git a/arch/unicore32/include/asm/unistd.h b/arch/unicore32/include/uapi/asm/unistd.h
index 2abcf61c615d..d18a3be89b38 100644
--- a/arch/unicore32/include/asm/unistd.h
+++ b/arch/unicore32/include/uapi/asm/unistd.h
@@ -12,3 +12,4 @@
12 12
13/* Use the standard ABI for syscalls. */ 13/* Use the standard ABI for syscalls. */
14#include <asm-generic/unistd.h> 14#include <asm-generic/unistd.h>
15#define __ARCH_WANT_SYS_EXECVE
diff --git a/arch/unicore32/kernel/entry.S b/arch/unicore32/kernel/entry.S
index dcb87ab19ddd..7049350c790f 100644
--- a/arch/unicore32/kernel/entry.S
+++ b/arch/unicore32/kernel/entry.S
@@ -573,17 +573,16 @@ ENDPROC(ret_to_user)
573 */ 573 */
574ENTRY(ret_from_fork) 574ENTRY(ret_from_fork)
575 b.l schedule_tail 575 b.l schedule_tail
576 get_thread_info tsk
577 ldw r1, [tsk+], #TI_FLAGS @ check for syscall tracing
578 mov why, #1
579 cand.a r1, #_TIF_SYSCALL_TRACE @ are we tracing syscalls?
580 beq ret_slow_syscall
581 mov r1, sp
582 mov r0, #1 @ trace exit [IP = 1]
583 b.l syscall_trace
584 b ret_slow_syscall 576 b ret_slow_syscall
585ENDPROC(ret_from_fork) 577ENDPROC(ret_from_fork)
586 578
579ENTRY(ret_from_kernel_thread)
580 b.l schedule_tail
581 mov r0, r5
582 adr lr, ret_slow_syscall
583 mov pc, r4
584ENDPROC(ret_from_kernel_thread)
585
587/*============================================================================= 586/*=============================================================================
588 * SWI handler 587 * SWI handler
589 *----------------------------------------------------------------------------- 588 *-----------------------------------------------------------------------------
@@ -669,11 +668,6 @@ __cr_alignment:
669#endif 668#endif
670 .ltorg 669 .ltorg
671 670
672ENTRY(sys_execve)
673 add r3, sp, #S_OFF
674 b __sys_execve
675ENDPROC(sys_execve)
676
677ENTRY(sys_clone) 671ENTRY(sys_clone)
678 add ip, sp, #S_OFF 672 add ip, sp, #S_OFF
679 stw ip, [sp+], #4 673 stw ip, [sp+], #4
diff --git a/arch/unicore32/kernel/process.c b/arch/unicore32/kernel/process.c
index b008586dad75..a8fe265ce2c0 100644
--- a/arch/unicore32/kernel/process.c
+++ b/arch/unicore32/kernel/process.c
@@ -258,6 +258,7 @@ void release_thread(struct task_struct *dead_task)
258} 258}
259 259
260asmlinkage void ret_from_fork(void) __asm__("ret_from_fork"); 260asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
261asmlinkage void ret_from_kernel_thread(void) __asm__("ret_from_kernel_thread");
261 262
262int 263int
263copy_thread(unsigned long clone_flags, unsigned long stack_start, 264copy_thread(unsigned long clone_flags, unsigned long stack_start,
@@ -266,17 +267,22 @@ copy_thread(unsigned long clone_flags, unsigned long stack_start,
266 struct thread_info *thread = task_thread_info(p); 267 struct thread_info *thread = task_thread_info(p);
267 struct pt_regs *childregs = task_pt_regs(p); 268 struct pt_regs *childregs = task_pt_regs(p);
268 269
269 *childregs = *regs;
270 childregs->UCreg_00 = 0;
271 childregs->UCreg_sp = stack_start;
272
273 memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save)); 270 memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save));
274 thread->cpu_context.sp = (unsigned long)childregs; 271 thread->cpu_context.sp = (unsigned long)childregs;
275 thread->cpu_context.pc = (unsigned long)ret_from_fork; 272 if (unlikely(!regs)) {
276 273 thread->cpu_context.pc = (unsigned long)ret_from_kernel_thread;
277 if (clone_flags & CLONE_SETTLS) 274 thread->cpu_context.r4 = stack_start;
278 childregs->UCreg_16 = regs->UCreg_03; 275 thread->cpu_context.r5 = stk_sz;
276 memset(childregs, 0, sizeof(struct pt_regs));
277 } else {
278 thread->cpu_context.pc = (unsigned long)ret_from_fork;
279 *childregs = *regs;
280 childregs->UCreg_00 = 0;
281 childregs->UCreg_sp = stack_start;
279 282
283 if (clone_flags & CLONE_SETTLS)
284 childregs->UCreg_16 = regs->UCreg_03;
285 }
280 return 0; 286 return 0;
281} 287}
282 288
@@ -305,42 +311,6 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fp)
305} 311}
306EXPORT_SYMBOL(dump_fpu); 312EXPORT_SYMBOL(dump_fpu);
307 313
308/*
309 * Shuffle the argument into the correct register before calling the
310 * thread function. r1 is the thread argument, r2 is the pointer to
311 * the thread function, and r3 points to the exit function.
312 */
313asm(".pushsection .text\n"
314" .align\n"
315" .type kernel_thread_helper, #function\n"
316"kernel_thread_helper:\n"
317" mov.a asr, r7\n"
318" mov r0, r4\n"
319" mov lr, r6\n"
320" mov pc, r5\n"
321" .size kernel_thread_helper, . - kernel_thread_helper\n"
322" .popsection");
323
324/*
325 * Create a kernel thread.
326 */
327pid_t kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
328{
329 struct pt_regs regs;
330
331 memset(&regs, 0, sizeof(regs));
332
333 regs.UCreg_04 = (unsigned long)arg;
334 regs.UCreg_05 = (unsigned long)fn;
335 regs.UCreg_06 = (unsigned long)do_exit;
336 regs.UCreg_07 = PRIV_MODE;
337 regs.UCreg_pc = (unsigned long)kernel_thread_helper;
338 regs.UCreg_asr = regs.UCreg_07 | PSR_I_BIT;
339
340 return do_fork(flags|CLONE_VM|CLONE_UNTRACED, 0, &regs, 0, NULL, NULL);
341}
342EXPORT_SYMBOL(kernel_thread);
343
344unsigned long get_wchan(struct task_struct *p) 314unsigned long get_wchan(struct task_struct *p)
345{ 315{
346 struct stackframe frame; 316 struct stackframe frame;
diff --git a/arch/unicore32/kernel/setup.h b/arch/unicore32/kernel/setup.h
index f23955028a18..30f749da8f73 100644
--- a/arch/unicore32/kernel/setup.h
+++ b/arch/unicore32/kernel/setup.h
@@ -30,4 +30,10 @@ extern char __vectors_start[], __vectors_end[];
30extern void kernel_thread_helper(void); 30extern void kernel_thread_helper(void);
31 31
32extern void __init early_signal_init(void); 32extern void __init early_signal_init(void);
33
34extern asmlinkage void __backtrace(void);
35extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
36
37extern void __show_regs(struct pt_regs *);
38
33#endif 39#endif
diff --git a/arch/unicore32/kernel/sys.c b/arch/unicore32/kernel/sys.c
index fabdee96110b..9680134b31f0 100644
--- a/arch/unicore32/kernel/sys.c
+++ b/arch/unicore32/kernel/sys.c
@@ -42,69 +42,6 @@ asmlinkage long __sys_clone(unsigned long clone_flags, unsigned long newsp,
42 parent_tid, child_tid); 42 parent_tid, child_tid);
43} 43}
44 44
45/* sys_execve() executes a new program.
46 * This is called indirectly via a small wrapper
47 */
48asmlinkage long __sys_execve(const char __user *filename,
49 const char __user *const __user *argv,
50 const char __user *const __user *envp,
51 struct pt_regs *regs)
52{
53 int error;
54 struct filename *fn;
55
56 fn = getname(filename);
57 error = PTR_ERR(fn);
58 if (IS_ERR(fn))
59 goto out;
60 error = do_execve(fn->name, argv, envp, regs);
61 putname(fn);
62out:
63 return error;
64}
65
66int kernel_execve(const char *filename,
67 const char *const argv[],
68 const char *const envp[])
69{
70 struct pt_regs regs;
71 int ret;
72
73 memset(&regs, 0, sizeof(struct pt_regs));
74 ret = do_execve(filename,
75 (const char __user *const __user *)argv,
76 (const char __user *const __user *)envp, &regs);
77 if (ret < 0)
78 goto out;
79
80 /*
81 * Save argc to the register structure for userspace.
82 */
83 regs.UCreg_00 = ret;
84
85 /*
86 * We were successful. We won't be returning to our caller, but
87 * instead to user space by manipulating the kernel stack.
88 */
89 asm("add r0, %0, %1\n\t"
90 "mov r1, %2\n\t"
91 "mov r2, %3\n\t"
92 "mov r22, #0\n\t" /* not a syscall */
93 "mov r23, %0\n\t" /* thread structure */
94 "b.l memmove\n\t" /* copy regs to top of stack */
95 "mov sp, r0\n\t" /* reposition stack pointer */
96 "b ret_to_user"
97 :
98 : "r" (current_thread_info()),
99 "Ir" (THREAD_START_SP - sizeof(regs)),
100 "r" (&regs),
101 "Ir" (sizeof(regs))
102 : "r0", "r1", "r2", "r3", "ip", "lr", "memory");
103
104 out:
105 return ret;
106}
107
108/* Note: used by the compat code even in 64-bit Linux. */ 45/* Note: used by the compat code even in 64-bit Linux. */
109SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, len, 46SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, len,
110 unsigned long, prot, unsigned long, flags, 47 unsigned long, prot, unsigned long, flags,
diff --git a/arch/unicore32/mm/fault.c b/arch/unicore32/mm/fault.c
index 2eeb9c04cab0..f9b5c10bccee 100644
--- a/arch/unicore32/mm/fault.c
+++ b/arch/unicore32/mm/fault.c
@@ -168,7 +168,7 @@ static inline bool access_error(unsigned int fsr, struct vm_area_struct *vma)
168} 168}
169 169
170static int __do_pf(struct mm_struct *mm, unsigned long addr, unsigned int fsr, 170static int __do_pf(struct mm_struct *mm, unsigned long addr, unsigned int fsr,
171 struct task_struct *tsk) 171 unsigned int flags, struct task_struct *tsk)
172{ 172{
173 struct vm_area_struct *vma; 173 struct vm_area_struct *vma;
174 int fault; 174 int fault;
@@ -194,14 +194,7 @@ good_area:
194 * If for any reason at all we couldn't handle the fault, make 194 * If for any reason at all we couldn't handle the fault, make
195 * sure we exit gracefully rather than endlessly redo the fault. 195 * sure we exit gracefully rather than endlessly redo the fault.
196 */ 196 */
197 fault = handle_mm_fault(mm, vma, addr & PAGE_MASK, 197 fault = handle_mm_fault(mm, vma, addr & PAGE_MASK, flags);
198 (!(fsr ^ 0x12)) ? FAULT_FLAG_WRITE : 0);
199 if (unlikely(fault & VM_FAULT_ERROR))
200 return fault;
201 if (fault & VM_FAULT_MAJOR)
202 tsk->maj_flt++;
203 else
204 tsk->min_flt++;
205 return fault; 198 return fault;
206 199
207check_stack: 200check_stack:
@@ -216,6 +209,8 @@ static int do_pf(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
216 struct task_struct *tsk; 209 struct task_struct *tsk;
217 struct mm_struct *mm; 210 struct mm_struct *mm;
218 int fault, sig, code; 211 int fault, sig, code;
212 unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
213 ((!(fsr ^ 0x12)) ? FAULT_FLAG_WRITE : 0);
219 214
220 tsk = current; 215 tsk = current;
221 mm = tsk->mm; 216 mm = tsk->mm;
@@ -236,6 +231,7 @@ static int do_pf(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
236 if (!user_mode(regs) 231 if (!user_mode(regs)
237 && !search_exception_tables(regs->UCreg_pc)) 232 && !search_exception_tables(regs->UCreg_pc))
238 goto no_context; 233 goto no_context;
234retry:
239 down_read(&mm->mmap_sem); 235 down_read(&mm->mmap_sem);
240 } else { 236 } else {
241 /* 237 /*
@@ -251,7 +247,28 @@ static int do_pf(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
251#endif 247#endif
252 } 248 }
253 249
254 fault = __do_pf(mm, addr, fsr, tsk); 250 fault = __do_pf(mm, addr, fsr, flags, tsk);
251
252 /* If we need to retry but a fatal signal is pending, handle the
253 * signal first. We do not need to release the mmap_sem because
254 * it would already be released in __lock_page_or_retry in
255 * mm/filemap.c. */
256 if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
257 return 0;
258
259 if (!(fault & VM_FAULT_ERROR) && (flags & FAULT_FLAG_ALLOW_RETRY)) {
260 if (fault & VM_FAULT_MAJOR)
261 tsk->maj_flt++;
262 else
263 tsk->min_flt++;
264 if (fault & VM_FAULT_RETRY) {
265 /* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk
266 * of starvation. */
267 flags &= ~FAULT_FLAG_ALLOW_RETRY;
268 goto retry;
269 }
270 }
271
255 up_read(&mm->mmap_sem); 272 up_read(&mm->mmap_sem);
256 273
257 /* 274 /*
diff --git a/arch/x86/boot/compressed/eboot.c b/arch/x86/boot/compressed/eboot.c
index c760e073963e..e87b0cac14b5 100644
--- a/arch/x86/boot/compressed/eboot.c
+++ b/arch/x86/boot/compressed/eboot.c
@@ -12,6 +12,8 @@
12#include <asm/setup.h> 12#include <asm/setup.h>
13#include <asm/desc.h> 13#include <asm/desc.h>
14 14
15#undef memcpy /* Use memcpy from misc.c */
16
15#include "eboot.h" 17#include "eboot.h"
16 18
17static efi_system_table_t *sys_table; 19static efi_system_table_t *sys_table;
diff --git a/arch/x86/boot/header.S b/arch/x86/boot/header.S
index 2a017441b8b2..8c132a625b94 100644
--- a/arch/x86/boot/header.S
+++ b/arch/x86/boot/header.S
@@ -476,6 +476,3 @@ die:
476setup_corrupt: 476setup_corrupt:
477 .byte 7 477 .byte 7
478 .string "No setup signature found...\n" 478 .string "No setup signature found...\n"
479
480 .data
481dummy: .long 0
diff --git a/arch/x86/include/asm/Kbuild b/arch/x86/include/asm/Kbuild
index 66e5f0ef0523..79fd8a3418f9 100644
--- a/arch/x86/include/asm/Kbuild
+++ b/arch/x86/include/asm/Kbuild
@@ -12,6 +12,7 @@ header-y += mce.h
12header-y += msr-index.h 12header-y += msr-index.h
13header-y += msr.h 13header-y += msr.h
14header-y += mtrr.h 14header-y += mtrr.h
15header-y += perf_regs.h
15header-y += posix_types_32.h 16header-y += posix_types_32.h
16header-y += posix_types_64.h 17header-y += posix_types_64.h
17header-y += posix_types_x32.h 18header-y += posix_types_x32.h
@@ -19,8 +20,10 @@ header-y += prctl.h
19header-y += processor-flags.h 20header-y += processor-flags.h
20header-y += ptrace-abi.h 21header-y += ptrace-abi.h
21header-y += sigcontext32.h 22header-y += sigcontext32.h
23header-y += svm.h
22header-y += ucontext.h 24header-y += ucontext.h
23header-y += vm86.h 25header-y += vm86.h
26header-y += vmx.h
24header-y += vsyscall.h 27header-y += vsyscall.h
25 28
26genhdr-y += unistd_32.h 29genhdr-y += unistd_32.h
diff --git a/arch/x86/include/asm/efi.h b/arch/x86/include/asm/efi.h
index c9dcc181d4d1..6e8fdf5ad113 100644
--- a/arch/x86/include/asm/efi.h
+++ b/arch/x86/include/asm/efi.h
@@ -35,7 +35,7 @@ extern unsigned long asmlinkage efi_call_phys(void *, ...);
35#define efi_call_virt6(f, a1, a2, a3, a4, a5, a6) \ 35#define efi_call_virt6(f, a1, a2, a3, a4, a5, a6) \
36 efi_call_virt(f, a1, a2, a3, a4, a5, a6) 36 efi_call_virt(f, a1, a2, a3, a4, a5, a6)
37 37
38#define efi_ioremap(addr, size, type) ioremap_cache(addr, size) 38#define efi_ioremap(addr, size, type, attr) ioremap_cache(addr, size)
39 39
40#else /* !CONFIG_X86_32 */ 40#else /* !CONFIG_X86_32 */
41 41
@@ -89,7 +89,7 @@ extern u64 efi_call6(void *fp, u64 arg1, u64 arg2, u64 arg3,
89 (u64)(a3), (u64)(a4), (u64)(a5), (u64)(a6)) 89 (u64)(a3), (u64)(a4), (u64)(a5), (u64)(a6))
90 90
91extern void __iomem *efi_ioremap(unsigned long addr, unsigned long size, 91extern void __iomem *efi_ioremap(unsigned long addr, unsigned long size,
92 u32 type); 92 u32 type, u64 attribute);
93 93
94#endif /* CONFIG_X86_32 */ 94#endif /* CONFIG_X86_32 */
95 95
@@ -98,6 +98,8 @@ extern void efi_set_executable(efi_memory_desc_t *md, bool executable);
98extern int efi_memblock_x86_reserve_range(void); 98extern int efi_memblock_x86_reserve_range(void);
99extern void efi_call_phys_prelog(void); 99extern void efi_call_phys_prelog(void);
100extern void efi_call_phys_epilog(void); 100extern void efi_call_phys_epilog(void);
101extern void efi_unmap_memmap(void);
102extern void efi_memory_uc(u64 addr, unsigned long size);
101 103
102#ifndef CONFIG_EFI 104#ifndef CONFIG_EFI
103/* 105/*
diff --git a/arch/x86/include/asm/fpu-internal.h b/arch/x86/include/asm/fpu-internal.h
index 831dbb9c6c02..41ab26ea6564 100644
--- a/arch/x86/include/asm/fpu-internal.h
+++ b/arch/x86/include/asm/fpu-internal.h
@@ -399,14 +399,17 @@ static inline void drop_init_fpu(struct task_struct *tsk)
399typedef struct { int preload; } fpu_switch_t; 399typedef struct { int preload; } fpu_switch_t;
400 400
401/* 401/*
402 * FIXME! We could do a totally lazy restore, but we need to 402 * Must be run with preemption disabled: this clears the fpu_owner_task,
403 * add a per-cpu "this was the task that last touched the FPU 403 * on this CPU.
404 * on this CPU" variable, and the task needs to have a "I last
405 * touched the FPU on this CPU" and check them.
406 * 404 *
407 * We don't do that yet, so "fpu_lazy_restore()" always returns 405 * This will disable any lazy FPU state restore of the current FPU state,
408 * false, but some day.. 406 * but if the current thread owns the FPU, it will still be saved by.
409 */ 407 */
408static inline void __cpu_disable_lazy_restore(unsigned int cpu)
409{
410 per_cpu(fpu_owner_task, cpu) = NULL;
411}
412
410static inline int fpu_lazy_restore(struct task_struct *new, unsigned int cpu) 413static inline int fpu_lazy_restore(struct task_struct *new, unsigned int cpu)
411{ 414{
412 return new == this_cpu_read_stable(fpu_owner_task) && 415 return new == this_cpu_read_stable(fpu_owner_task) &&
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
index dcfde52979c3..19f16ebaf4fa 100644
--- a/arch/x86/include/asm/ptrace.h
+++ b/arch/x86/include/asm/ptrace.h
@@ -205,21 +205,14 @@ static inline bool user_64bit_mode(struct pt_regs *regs)
205} 205}
206#endif 206#endif
207 207
208/*
209 * X86_32 CPUs don't save ss and esp if the CPU is already in kernel mode
210 * when it traps. The previous stack will be directly underneath the saved
211 * registers, and 'sp/ss' won't even have been saved. Thus the '&regs->sp'.
212 *
213 * This is valid only for kernel mode traps.
214 */
215static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
216{
217#ifdef CONFIG_X86_32 208#ifdef CONFIG_X86_32
218 return (unsigned long)(&regs->sp); 209extern unsigned long kernel_stack_pointer(struct pt_regs *regs);
219#else 210#else
211static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
212{
220 return regs->sp; 213 return regs->sp;
221#endif
222} 214}
215#endif
223 216
224#define GET_IP(regs) ((regs)->ip) 217#define GET_IP(regs) ((regs)->ip)
225#define GET_FP(regs) ((regs)->bp) 218#define GET_FP(regs) ((regs)->bp)
diff --git a/arch/x86/include/asm/xen/hypercall.h b/arch/x86/include/asm/xen/hypercall.h
index 59c226d120cd..c20d1ce62dc6 100644
--- a/arch/x86/include/asm/xen/hypercall.h
+++ b/arch/x86/include/asm/xen/hypercall.h
@@ -359,18 +359,14 @@ HYPERVISOR_update_va_mapping(unsigned long va, pte_t new_val,
359 return _hypercall4(int, update_va_mapping, va, 359 return _hypercall4(int, update_va_mapping, va,
360 new_val.pte, new_val.pte >> 32, flags); 360 new_val.pte, new_val.pte >> 32, flags);
361} 361}
362extern int __must_check xen_event_channel_op_compat(int, void *);
362 363
363static inline int 364static inline int
364HYPERVISOR_event_channel_op(int cmd, void *arg) 365HYPERVISOR_event_channel_op(int cmd, void *arg)
365{ 366{
366 int rc = _hypercall2(int, event_channel_op, cmd, arg); 367 int rc = _hypercall2(int, event_channel_op, cmd, arg);
367 if (unlikely(rc == -ENOSYS)) { 368 if (unlikely(rc == -ENOSYS))
368 struct evtchn_op op; 369 rc = xen_event_channel_op_compat(cmd, arg);
369 op.cmd = cmd;
370 memcpy(&op.u, arg, sizeof(op.u));
371 rc = _hypercall1(int, event_channel_op_compat, &op);
372 memcpy(arg, &op.u, sizeof(op.u));
373 }
374 return rc; 370 return rc;
375} 371}
376 372
@@ -386,17 +382,14 @@ HYPERVISOR_console_io(int cmd, int count, char *str)
386 return _hypercall3(int, console_io, cmd, count, str); 382 return _hypercall3(int, console_io, cmd, count, str);
387} 383}
388 384
385extern int __must_check HYPERVISOR_physdev_op_compat(int, void *);
386
389static inline int 387static inline int
390HYPERVISOR_physdev_op(int cmd, void *arg) 388HYPERVISOR_physdev_op(int cmd, void *arg)
391{ 389{
392 int rc = _hypercall2(int, physdev_op, cmd, arg); 390 int rc = _hypercall2(int, physdev_op, cmd, arg);
393 if (unlikely(rc == -ENOSYS)) { 391 if (unlikely(rc == -ENOSYS))
394 struct physdev_op op; 392 rc = HYPERVISOR_physdev_op_compat(cmd, arg);
395 op.cmd = cmd;
396 memcpy(&op.u, arg, sizeof(op.u));
397 rc = _hypercall1(int, physdev_op_compat, &op);
398 memcpy(arg, &op.u, sizeof(op.u));
399 }
400 return rc; 393 return rc;
401} 394}
402 395
diff --git a/arch/x86/include/asm/xen/hypervisor.h b/arch/x86/include/asm/xen/hypervisor.h
index 66d0fff1ee84..125f344f06a9 100644
--- a/arch/x86/include/asm/xen/hypervisor.h
+++ b/arch/x86/include/asm/xen/hypervisor.h
@@ -33,7 +33,6 @@
33#ifndef _ASM_X86_XEN_HYPERVISOR_H 33#ifndef _ASM_X86_XEN_HYPERVISOR_H
34#define _ASM_X86_XEN_HYPERVISOR_H 34#define _ASM_X86_XEN_HYPERVISOR_H
35 35
36/* arch/i386/kernel/setup.c */
37extern struct shared_info *HYPERVISOR_shared_info; 36extern struct shared_info *HYPERVISOR_shared_info;
38extern struct start_info *xen_start_info; 37extern struct start_info *xen_start_info;
39 38
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index c265593ec2cd..1817fa911024 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -2257,6 +2257,9 @@ asmlinkage void smp_irq_move_cleanup_interrupt(void)
2257 continue; 2257 continue;
2258 2258
2259 cfg = irq_cfg(irq); 2259 cfg = irq_cfg(irq);
2260 if (!cfg)
2261 continue;
2262
2260 raw_spin_lock(&desc->lock); 2263 raw_spin_lock(&desc->lock);
2261 2264
2262 /* 2265 /*
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index f7e98a2c0d12..1b7d1656a042 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -631,6 +631,20 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
631 } 631 }
632 } 632 }
633 633
634 /*
635 * The way access filter has a performance penalty on some workloads.
636 * Disable it on the affected CPUs.
637 */
638 if ((c->x86 == 0x15) &&
639 (c->x86_model >= 0x02) && (c->x86_model < 0x20)) {
640 u64 val;
641
642 if (!rdmsrl_safe(0xc0011021, &val) && !(val & 0x1E)) {
643 val |= 0x1E;
644 wrmsrl_safe(0xc0011021, val);
645 }
646 }
647
634 cpu_detect_cache_sizes(c); 648 cpu_detect_cache_sizes(c);
635 649
636 /* Multi core CPU? */ 650 /* Multi core CPU? */
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 698b6ec12e0f..1ac581f38dfa 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -6,7 +6,7 @@
6 * 6 *
7 * Written by Jacob Shin - AMD, Inc. 7 * Written by Jacob Shin - AMD, Inc.
8 * 8 *
9 * Support: borislav.petkov@amd.com 9 * Maintained by: Borislav Petkov <bp@alien8.de>
10 * 10 *
11 * April 2006 11 * April 2006
12 * - added support for AMD Family 0x10 processors 12 * - added support for AMD Family 0x10 processors
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c
index 5f88abf07e9c..4f9a3cbfc4a3 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel.c
@@ -285,34 +285,39 @@ void cmci_clear(void)
285 raw_spin_unlock_irqrestore(&cmci_discover_lock, flags); 285 raw_spin_unlock_irqrestore(&cmci_discover_lock, flags);
286} 286}
287 287
288static long cmci_rediscover_work_func(void *arg)
289{
290 int banks;
291
292 /* Recheck banks in case CPUs don't all have the same */
293 if (cmci_supported(&banks))
294 cmci_discover(banks);
295
296 return 0;
297}
298
288/* 299/*
289 * After a CPU went down cycle through all the others and rediscover 300 * After a CPU went down cycle through all the others and rediscover
290 * Must run in process context. 301 * Must run in process context.
291 */ 302 */
292void cmci_rediscover(int dying) 303void cmci_rediscover(int dying)
293{ 304{
294 int banks; 305 int cpu, banks;
295 int cpu;
296 cpumask_var_t old;
297 306
298 if (!cmci_supported(&banks)) 307 if (!cmci_supported(&banks))
299 return; 308 return;
300 if (!alloc_cpumask_var(&old, GFP_KERNEL))
301 return;
302 cpumask_copy(old, &current->cpus_allowed);
303 309
304 for_each_online_cpu(cpu) { 310 for_each_online_cpu(cpu) {
305 if (cpu == dying) 311 if (cpu == dying)
306 continue; 312 continue;
307 if (set_cpus_allowed_ptr(current, cpumask_of(cpu))) 313
314 if (cpu == smp_processor_id()) {
315 cmci_rediscover_work_func(NULL);
308 continue; 316 continue;
309 /* Recheck banks in case CPUs don't all have the same */ 317 }
310 if (cmci_supported(&banks))
311 cmci_discover(banks);
312 }
313 318
314 set_cpus_allowed_ptr(current, old); 319 work_on_cpu(cpu, cmci_rediscover_work_func, NULL);
315 free_cpumask_var(old); 320 }
316} 321}
317 322
318/* 323/*
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
index 5df8d32ba91e..3cf3d97cce3a 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
@@ -118,22 +118,24 @@ static void snbep_uncore_pci_disable_box(struct intel_uncore_box *box)
118{ 118{
119 struct pci_dev *pdev = box->pci_dev; 119 struct pci_dev *pdev = box->pci_dev;
120 int box_ctl = uncore_pci_box_ctl(box); 120 int box_ctl = uncore_pci_box_ctl(box);
121 u32 config; 121 u32 config = 0;
122 122
123 pci_read_config_dword(pdev, box_ctl, &config); 123 if (!pci_read_config_dword(pdev, box_ctl, &config)) {
124 config |= SNBEP_PMON_BOX_CTL_FRZ; 124 config |= SNBEP_PMON_BOX_CTL_FRZ;
125 pci_write_config_dword(pdev, box_ctl, config); 125 pci_write_config_dword(pdev, box_ctl, config);
126 }
126} 127}
127 128
128static void snbep_uncore_pci_enable_box(struct intel_uncore_box *box) 129static void snbep_uncore_pci_enable_box(struct intel_uncore_box *box)
129{ 130{
130 struct pci_dev *pdev = box->pci_dev; 131 struct pci_dev *pdev = box->pci_dev;
131 int box_ctl = uncore_pci_box_ctl(box); 132 int box_ctl = uncore_pci_box_ctl(box);
132 u32 config; 133 u32 config = 0;
133 134
134 pci_read_config_dword(pdev, box_ctl, &config); 135 if (!pci_read_config_dword(pdev, box_ctl, &config)) {
135 config &= ~SNBEP_PMON_BOX_CTL_FRZ; 136 config &= ~SNBEP_PMON_BOX_CTL_FRZ;
136 pci_write_config_dword(pdev, box_ctl, config); 137 pci_write_config_dword(pdev, box_ctl, config);
138 }
137} 139}
138 140
139static void snbep_uncore_pci_enable_event(struct intel_uncore_box *box, struct perf_event *event) 141static void snbep_uncore_pci_enable_event(struct intel_uncore_box *box, struct perf_event *event)
@@ -156,7 +158,7 @@ static u64 snbep_uncore_pci_read_counter(struct intel_uncore_box *box, struct pe
156{ 158{
157 struct pci_dev *pdev = box->pci_dev; 159 struct pci_dev *pdev = box->pci_dev;
158 struct hw_perf_event *hwc = &event->hw; 160 struct hw_perf_event *hwc = &event->hw;
159 u64 count; 161 u64 count = 0;
160 162
161 pci_read_config_dword(pdev, hwc->event_base, (u32 *)&count); 163 pci_read_config_dword(pdev, hwc->event_base, (u32 *)&count);
162 pci_read_config_dword(pdev, hwc->event_base + 4, (u32 *)&count + 1); 164 pci_read_config_dword(pdev, hwc->event_base + 4, (u32 *)&count + 1);
@@ -603,11 +605,12 @@ static struct pci_driver snbep_uncore_pci_driver = {
603/* 605/*
604 * build pci bus to socket mapping 606 * build pci bus to socket mapping
605 */ 607 */
606static void snbep_pci2phy_map_init(void) 608static int snbep_pci2phy_map_init(void)
607{ 609{
608 struct pci_dev *ubox_dev = NULL; 610 struct pci_dev *ubox_dev = NULL;
609 int i, bus, nodeid; 611 int i, bus, nodeid;
610 u32 config; 612 int err = 0;
613 u32 config = 0;
611 614
612 while (1) { 615 while (1) {
613 /* find the UBOX device */ 616 /* find the UBOX device */
@@ -618,10 +621,14 @@ static void snbep_pci2phy_map_init(void)
618 break; 621 break;
619 bus = ubox_dev->bus->number; 622 bus = ubox_dev->bus->number;
620 /* get the Node ID of the local register */ 623 /* get the Node ID of the local register */
621 pci_read_config_dword(ubox_dev, 0x40, &config); 624 err = pci_read_config_dword(ubox_dev, 0x40, &config);
625 if (err)
626 break;
622 nodeid = config; 627 nodeid = config;
623 /* get the Node ID mapping */ 628 /* get the Node ID mapping */
624 pci_read_config_dword(ubox_dev, 0x54, &config); 629 err = pci_read_config_dword(ubox_dev, 0x54, &config);
630 if (err)
631 break;
625 /* 632 /*
626 * every three bits in the Node ID mapping register maps 633 * every three bits in the Node ID mapping register maps
627 * to a particular node. 634 * to a particular node.
@@ -633,7 +640,11 @@ static void snbep_pci2phy_map_init(void)
633 } 640 }
634 } 641 }
635 }; 642 };
636 return; 643
644 if (ubox_dev)
645 pci_dev_put(ubox_dev);
646
647 return err ? pcibios_err_to_errno(err) : 0;
637} 648}
638/* end of Sandy Bridge-EP uncore support */ 649/* end of Sandy Bridge-EP uncore support */
639 650
@@ -1547,7 +1558,6 @@ void nhmex_rbox_alter_er(struct intel_uncore_box *box, struct perf_event *event)
1547{ 1558{
1548 struct hw_perf_event *hwc = &event->hw; 1559 struct hw_perf_event *hwc = &event->hw;
1549 struct hw_perf_event_extra *reg1 = &hwc->extra_reg; 1560 struct hw_perf_event_extra *reg1 = &hwc->extra_reg;
1550 int port;
1551 1561
1552 /* adjust the main event selector and extra register index */ 1562 /* adjust the main event selector and extra register index */
1553 if (reg1->idx % 2) { 1563 if (reg1->idx % 2) {
@@ -1559,7 +1569,6 @@ void nhmex_rbox_alter_er(struct intel_uncore_box *box, struct perf_event *event)
1559 } 1569 }
1560 1570
1561 /* adjust extra register config */ 1571 /* adjust extra register config */
1562 port = reg1->idx / 6 + box->pmu->pmu_idx * 4;
1563 switch (reg1->idx % 6) { 1572 switch (reg1->idx % 6) {
1564 case 2: 1573 case 2:
1565 /* shift the 8~15 bits to the 0~7 bits */ 1574 /* shift the 8~15 bits to the 0~7 bits */
@@ -2578,9 +2587,11 @@ static int __init uncore_pci_init(void)
2578 2587
2579 switch (boot_cpu_data.x86_model) { 2588 switch (boot_cpu_data.x86_model) {
2580 case 45: /* Sandy Bridge-EP */ 2589 case 45: /* Sandy Bridge-EP */
2590 ret = snbep_pci2phy_map_init();
2591 if (ret)
2592 return ret;
2581 pci_uncores = snbep_pci_uncores; 2593 pci_uncores = snbep_pci_uncores;
2582 uncore_pci_driver = &snbep_uncore_pci_driver; 2594 uncore_pci_driver = &snbep_uncore_pci_driver;
2583 snbep_pci2phy_map_init();
2584 break; 2595 break;
2585 default: 2596 default:
2586 return 0; 2597 return 0;
diff --git a/arch/x86/kernel/cpu/perf_event_knc.c b/arch/x86/kernel/cpu/perf_event_knc.c
index 7c46bfdbc373..4b7731bf23a8 100644
--- a/arch/x86/kernel/cpu/perf_event_knc.c
+++ b/arch/x86/kernel/cpu/perf_event_knc.c
@@ -3,6 +3,8 @@
3#include <linux/perf_event.h> 3#include <linux/perf_event.h>
4#include <linux/types.h> 4#include <linux/types.h>
5 5
6#include <asm/hardirq.h>
7
6#include "perf_event.h" 8#include "perf_event.h"
7 9
8static const u64 knc_perfmon_event_map[] = 10static const u64 knc_perfmon_event_map[] =
@@ -173,30 +175,100 @@ static void knc_pmu_enable_all(int added)
173static inline void 175static inline void
174knc_pmu_disable_event(struct perf_event *event) 176knc_pmu_disable_event(struct perf_event *event)
175{ 177{
176 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
177 struct hw_perf_event *hwc = &event->hw; 178 struct hw_perf_event *hwc = &event->hw;
178 u64 val; 179 u64 val;
179 180
180 val = hwc->config; 181 val = hwc->config;
181 if (cpuc->enabled) 182 val &= ~ARCH_PERFMON_EVENTSEL_ENABLE;
182 val &= ~ARCH_PERFMON_EVENTSEL_ENABLE;
183 183
184 (void)wrmsrl_safe(hwc->config_base + hwc->idx, val); 184 (void)wrmsrl_safe(hwc->config_base + hwc->idx, val);
185} 185}
186 186
187static void knc_pmu_enable_event(struct perf_event *event) 187static void knc_pmu_enable_event(struct perf_event *event)
188{ 188{
189 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
190 struct hw_perf_event *hwc = &event->hw; 189 struct hw_perf_event *hwc = &event->hw;
191 u64 val; 190 u64 val;
192 191
193 val = hwc->config; 192 val = hwc->config;
194 if (cpuc->enabled) 193 val |= ARCH_PERFMON_EVENTSEL_ENABLE;
195 val |= ARCH_PERFMON_EVENTSEL_ENABLE;
196 194
197 (void)wrmsrl_safe(hwc->config_base + hwc->idx, val); 195 (void)wrmsrl_safe(hwc->config_base + hwc->idx, val);
198} 196}
199 197
198static inline u64 knc_pmu_get_status(void)
199{
200 u64 status;
201
202 rdmsrl(MSR_KNC_IA32_PERF_GLOBAL_STATUS, status);
203
204 return status;
205}
206
207static inline void knc_pmu_ack_status(u64 ack)
208{
209 wrmsrl(MSR_KNC_IA32_PERF_GLOBAL_OVF_CONTROL, ack);
210}
211
212static int knc_pmu_handle_irq(struct pt_regs *regs)
213{
214 struct perf_sample_data data;
215 struct cpu_hw_events *cpuc;
216 int handled = 0;
217 int bit, loops;
218 u64 status;
219
220 cpuc = &__get_cpu_var(cpu_hw_events);
221
222 knc_pmu_disable_all();
223
224 status = knc_pmu_get_status();
225 if (!status) {
226 knc_pmu_enable_all(0);
227 return handled;
228 }
229
230 loops = 0;
231again:
232 knc_pmu_ack_status(status);
233 if (++loops > 100) {
234 WARN_ONCE(1, "perf: irq loop stuck!\n");
235 perf_event_print_debug();
236 goto done;
237 }
238
239 inc_irq_stat(apic_perf_irqs);
240
241 for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {
242 struct perf_event *event = cpuc->events[bit];
243
244 handled++;
245
246 if (!test_bit(bit, cpuc->active_mask))
247 continue;
248
249 if (!intel_pmu_save_and_restart(event))
250 continue;
251
252 perf_sample_data_init(&data, 0, event->hw.last_period);
253
254 if (perf_event_overflow(event, &data, regs))
255 x86_pmu_stop(event, 0);
256 }
257
258 /*
259 * Repeat if there is more work to be done:
260 */
261 status = knc_pmu_get_status();
262 if (status)
263 goto again;
264
265done:
266 knc_pmu_enable_all(0);
267
268 return handled;
269}
270
271
200PMU_FORMAT_ATTR(event, "config:0-7" ); 272PMU_FORMAT_ATTR(event, "config:0-7" );
201PMU_FORMAT_ATTR(umask, "config:8-15" ); 273PMU_FORMAT_ATTR(umask, "config:8-15" );
202PMU_FORMAT_ATTR(edge, "config:18" ); 274PMU_FORMAT_ATTR(edge, "config:18" );
@@ -214,7 +286,7 @@ static struct attribute *intel_knc_formats_attr[] = {
214 286
215static __initconst struct x86_pmu knc_pmu = { 287static __initconst struct x86_pmu knc_pmu = {
216 .name = "knc", 288 .name = "knc",
217 .handle_irq = x86_pmu_handle_irq, 289 .handle_irq = knc_pmu_handle_irq,
218 .disable_all = knc_pmu_disable_all, 290 .disable_all = knc_pmu_disable_all,
219 .enable_all = knc_pmu_enable_all, 291 .enable_all = knc_pmu_enable_all,
220 .enable = knc_pmu_enable_event, 292 .enable = knc_pmu_enable_event,
@@ -226,12 +298,11 @@ static __initconst struct x86_pmu knc_pmu = {
226 .event_map = knc_pmu_event_map, 298 .event_map = knc_pmu_event_map,
227 .max_events = ARRAY_SIZE(knc_perfmon_event_map), 299 .max_events = ARRAY_SIZE(knc_perfmon_event_map),
228 .apic = 1, 300 .apic = 1,
229 .max_period = (1ULL << 31) - 1, 301 .max_period = (1ULL << 39) - 1,
230 .version = 0, 302 .version = 0,
231 .num_counters = 2, 303 .num_counters = 2,
232 /* in theory 40 bits, early silicon is buggy though */ 304 .cntval_bits = 40,
233 .cntval_bits = 32, 305 .cntval_mask = (1ULL << 40) - 1,
234 .cntval_mask = (1ULL << 32) - 1,
235 .get_event_constraints = x86_get_event_constraints, 306 .get_event_constraints = x86_get_event_constraints,
236 .event_constraints = knc_event_constraints, 307 .event_constraints = knc_event_constraints,
237 .format_attrs = intel_knc_formats_attr, 308 .format_attrs = intel_knc_formats_attr,
diff --git a/arch/x86/kernel/cpu/perf_event_p6.c b/arch/x86/kernel/cpu/perf_event_p6.c
index 900b76b5d6ef..f2af39f5dc3d 100644
--- a/arch/x86/kernel/cpu/perf_event_p6.c
+++ b/arch/x86/kernel/cpu/perf_event_p6.c
@@ -8,13 +8,106 @@
8 */ 8 */
9static const u64 p6_perfmon_event_map[] = 9static const u64 p6_perfmon_event_map[] =
10{ 10{
11 [PERF_COUNT_HW_CPU_CYCLES] = 0x0079, 11 [PERF_COUNT_HW_CPU_CYCLES] = 0x0079, /* CPU_CLK_UNHALTED */
12 [PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0, 12 [PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0, /* INST_RETIRED */
13 [PERF_COUNT_HW_CACHE_REFERENCES] = 0x0f2e, 13 [PERF_COUNT_HW_CACHE_REFERENCES] = 0x0f2e, /* L2_RQSTS:M:E:S:I */
14 [PERF_COUNT_HW_CACHE_MISSES] = 0x012e, 14 [PERF_COUNT_HW_CACHE_MISSES] = 0x012e, /* L2_RQSTS:I */
15 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c4, 15 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c4, /* BR_INST_RETIRED */
16 [PERF_COUNT_HW_BRANCH_MISSES] = 0x00c5, 16 [PERF_COUNT_HW_BRANCH_MISSES] = 0x00c5, /* BR_MISS_PRED_RETIRED */
17 [PERF_COUNT_HW_BUS_CYCLES] = 0x0062, 17 [PERF_COUNT_HW_BUS_CYCLES] = 0x0062, /* BUS_DRDY_CLOCKS */
18 [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x00a2, /* RESOURCE_STALLS */
19
20};
21
22static __initconst u64 p6_hw_cache_event_ids
23 [PERF_COUNT_HW_CACHE_MAX]
24 [PERF_COUNT_HW_CACHE_OP_MAX]
25 [PERF_COUNT_HW_CACHE_RESULT_MAX] =
26{
27 [ C(L1D) ] = {
28 [ C(OP_READ) ] = {
29 [ C(RESULT_ACCESS) ] = 0x0043, /* DATA_MEM_REFS */
30 [ C(RESULT_MISS) ] = 0x0045, /* DCU_LINES_IN */
31 },
32 [ C(OP_WRITE) ] = {
33 [ C(RESULT_ACCESS) ] = 0,
34 [ C(RESULT_MISS) ] = 0x0f29, /* L2_LD:M:E:S:I */
35 },
36 [ C(OP_PREFETCH) ] = {
37 [ C(RESULT_ACCESS) ] = 0,
38 [ C(RESULT_MISS) ] = 0,
39 },
40 },
41 [ C(L1I ) ] = {
42 [ C(OP_READ) ] = {
43 [ C(RESULT_ACCESS) ] = 0x0080, /* IFU_IFETCH */
44 [ C(RESULT_MISS) ] = 0x0f28, /* L2_IFETCH:M:E:S:I */
45 },
46 [ C(OP_WRITE) ] = {
47 [ C(RESULT_ACCESS) ] = -1,
48 [ C(RESULT_MISS) ] = -1,
49 },
50 [ C(OP_PREFETCH) ] = {
51 [ C(RESULT_ACCESS) ] = 0,
52 [ C(RESULT_MISS) ] = 0,
53 },
54 },
55 [ C(LL ) ] = {
56 [ C(OP_READ) ] = {
57 [ C(RESULT_ACCESS) ] = 0,
58 [ C(RESULT_MISS) ] = 0,
59 },
60 [ C(OP_WRITE) ] = {
61 [ C(RESULT_ACCESS) ] = 0,
62 [ C(RESULT_MISS) ] = 0x0025, /* L2_M_LINES_INM */
63 },
64 [ C(OP_PREFETCH) ] = {
65 [ C(RESULT_ACCESS) ] = 0,
66 [ C(RESULT_MISS) ] = 0,
67 },
68 },
69 [ C(DTLB) ] = {
70 [ C(OP_READ) ] = {
71 [ C(RESULT_ACCESS) ] = 0x0043, /* DATA_MEM_REFS */
72 [ C(RESULT_MISS) ] = 0,
73 },
74 [ C(OP_WRITE) ] = {
75 [ C(RESULT_ACCESS) ] = 0,
76 [ C(RESULT_MISS) ] = 0,
77 },
78 [ C(OP_PREFETCH) ] = {
79 [ C(RESULT_ACCESS) ] = 0,
80 [ C(RESULT_MISS) ] = 0,
81 },
82 },
83 [ C(ITLB) ] = {
84 [ C(OP_READ) ] = {
85 [ C(RESULT_ACCESS) ] = 0x0080, /* IFU_IFETCH */
86 [ C(RESULT_MISS) ] = 0x0085, /* ITLB_MISS */
87 },
88 [ C(OP_WRITE) ] = {
89 [ C(RESULT_ACCESS) ] = -1,
90 [ C(RESULT_MISS) ] = -1,
91 },
92 [ C(OP_PREFETCH) ] = {
93 [ C(RESULT_ACCESS) ] = -1,
94 [ C(RESULT_MISS) ] = -1,
95 },
96 },
97 [ C(BPU ) ] = {
98 [ C(OP_READ) ] = {
99 [ C(RESULT_ACCESS) ] = 0x00c4, /* BR_INST_RETIRED */
100 [ C(RESULT_MISS) ] = 0x00c5, /* BR_MISS_PRED_RETIRED */
101 },
102 [ C(OP_WRITE) ] = {
103 [ C(RESULT_ACCESS) ] = -1,
104 [ C(RESULT_MISS) ] = -1,
105 },
106 [ C(OP_PREFETCH) ] = {
107 [ C(RESULT_ACCESS) ] = -1,
108 [ C(RESULT_MISS) ] = -1,
109 },
110 },
18}; 111};
19 112
20static u64 p6_pmu_event_map(int hw_event) 113static u64 p6_pmu_event_map(int hw_event)
@@ -34,7 +127,7 @@ static struct event_constraint p6_event_constraints[] =
34{ 127{
35 INTEL_EVENT_CONSTRAINT(0xc1, 0x1), /* FLOPS */ 128 INTEL_EVENT_CONSTRAINT(0xc1, 0x1), /* FLOPS */
36 INTEL_EVENT_CONSTRAINT(0x10, 0x1), /* FP_COMP_OPS_EXE */ 129 INTEL_EVENT_CONSTRAINT(0x10, 0x1), /* FP_COMP_OPS_EXE */
37 INTEL_EVENT_CONSTRAINT(0x11, 0x1), /* FP_ASSIST */ 130 INTEL_EVENT_CONSTRAINT(0x11, 0x2), /* FP_ASSIST */
38 INTEL_EVENT_CONSTRAINT(0x12, 0x2), /* MUL */ 131 INTEL_EVENT_CONSTRAINT(0x12, 0x2), /* MUL */
39 INTEL_EVENT_CONSTRAINT(0x13, 0x2), /* DIV */ 132 INTEL_EVENT_CONSTRAINT(0x13, 0x2), /* DIV */
40 INTEL_EVENT_CONSTRAINT(0x14, 0x1), /* CYCLES_DIV_BUSY */ 133 INTEL_EVENT_CONSTRAINT(0x14, 0x1), /* CYCLES_DIV_BUSY */
@@ -64,25 +157,25 @@ static void p6_pmu_enable_all(int added)
64static inline void 157static inline void
65p6_pmu_disable_event(struct perf_event *event) 158p6_pmu_disable_event(struct perf_event *event)
66{ 159{
67 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
68 struct hw_perf_event *hwc = &event->hw; 160 struct hw_perf_event *hwc = &event->hw;
69 u64 val = P6_NOP_EVENT; 161 u64 val = P6_NOP_EVENT;
70 162
71 if (cpuc->enabled)
72 val |= ARCH_PERFMON_EVENTSEL_ENABLE;
73
74 (void)wrmsrl_safe(hwc->config_base, val); 163 (void)wrmsrl_safe(hwc->config_base, val);
75} 164}
76 165
77static void p6_pmu_enable_event(struct perf_event *event) 166static void p6_pmu_enable_event(struct perf_event *event)
78{ 167{
79 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
80 struct hw_perf_event *hwc = &event->hw; 168 struct hw_perf_event *hwc = &event->hw;
81 u64 val; 169 u64 val;
82 170
83 val = hwc->config; 171 val = hwc->config;
84 if (cpuc->enabled) 172
85 val |= ARCH_PERFMON_EVENTSEL_ENABLE; 173 /*
174 * p6 only has a global event enable, set on PerfEvtSel0
175 * We "disable" events by programming P6_NOP_EVENT
176 * and we rely on p6_pmu_enable_all() being called
177 * to actually enable the events.
178 */
86 179
87 (void)wrmsrl_safe(hwc->config_base, val); 180 (void)wrmsrl_safe(hwc->config_base, val);
88} 181}
@@ -160,5 +253,9 @@ __init int p6_pmu_init(void)
160 253
161 x86_pmu = p6_pmu; 254 x86_pmu = p6_pmu;
162 255
256 memcpy(hw_cache_event_ids, p6_hw_cache_event_ids,
257 sizeof(hw_cache_event_ids));
258
259
163 return 0; 260 return 0;
164} 261}
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index ed858e9e9a74..df06ade26bef 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -1077,6 +1077,9 @@ void __init memblock_x86_fill(void)
1077 memblock_add(ei->addr, ei->size); 1077 memblock_add(ei->addr, ei->size);
1078 } 1078 }
1079 1079
1080 /* throw away partial pages */
1081 memblock_trim_memory(PAGE_SIZE);
1082
1080 memblock_dump_all(); 1083 memblock_dump_all();
1081} 1084}
1082 1085
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index b51b2c7ee51f..1328fe49a3f1 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -995,8 +995,8 @@ END(interrupt)
995 */ 995 */
996 .p2align CONFIG_X86_L1_CACHE_SHIFT 996 .p2align CONFIG_X86_L1_CACHE_SHIFT
997common_interrupt: 997common_interrupt:
998 ASM_CLAC
999 XCPT_FRAME 998 XCPT_FRAME
999 ASM_CLAC
1000 addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */ 1000 addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */
1001 interrupt do_IRQ 1001 interrupt do_IRQ
1002 /* 0(%rsp): old_rsp-ARGOFFSET */ 1002 /* 0(%rsp): old_rsp-ARGOFFSET */
@@ -1135,8 +1135,8 @@ END(common_interrupt)
1135 */ 1135 */
1136.macro apicinterrupt num sym do_sym 1136.macro apicinterrupt num sym do_sym
1137ENTRY(\sym) 1137ENTRY(\sym)
1138 ASM_CLAC
1139 INTR_FRAME 1138 INTR_FRAME
1139 ASM_CLAC
1140 pushq_cfi $~(\num) 1140 pushq_cfi $~(\num)
1141.Lcommon_\sym: 1141.Lcommon_\sym:
1142 interrupt \do_sym 1142 interrupt \do_sym
@@ -1190,8 +1190,8 @@ apicinterrupt IRQ_WORK_VECTOR \
1190 */ 1190 */
1191.macro zeroentry sym do_sym 1191.macro zeroentry sym do_sym
1192ENTRY(\sym) 1192ENTRY(\sym)
1193 ASM_CLAC
1194 INTR_FRAME 1193 INTR_FRAME
1194 ASM_CLAC
1195 PARAVIRT_ADJUST_EXCEPTION_FRAME 1195 PARAVIRT_ADJUST_EXCEPTION_FRAME
1196 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ 1196 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
1197 subq $ORIG_RAX-R15, %rsp 1197 subq $ORIG_RAX-R15, %rsp
@@ -1208,8 +1208,8 @@ END(\sym)
1208 1208
1209.macro paranoidzeroentry sym do_sym 1209.macro paranoidzeroentry sym do_sym
1210ENTRY(\sym) 1210ENTRY(\sym)
1211 ASM_CLAC
1212 INTR_FRAME 1211 INTR_FRAME
1212 ASM_CLAC
1213 PARAVIRT_ADJUST_EXCEPTION_FRAME 1213 PARAVIRT_ADJUST_EXCEPTION_FRAME
1214 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ 1214 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
1215 subq $ORIG_RAX-R15, %rsp 1215 subq $ORIG_RAX-R15, %rsp
@@ -1227,8 +1227,8 @@ END(\sym)
1227#define INIT_TSS_IST(x) PER_CPU_VAR(init_tss) + (TSS_ist + ((x) - 1) * 8) 1227#define INIT_TSS_IST(x) PER_CPU_VAR(init_tss) + (TSS_ist + ((x) - 1) * 8)
1228.macro paranoidzeroentry_ist sym do_sym ist 1228.macro paranoidzeroentry_ist sym do_sym ist
1229ENTRY(\sym) 1229ENTRY(\sym)
1230 ASM_CLAC
1231 INTR_FRAME 1230 INTR_FRAME
1231 ASM_CLAC
1232 PARAVIRT_ADJUST_EXCEPTION_FRAME 1232 PARAVIRT_ADJUST_EXCEPTION_FRAME
1233 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ 1233 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
1234 subq $ORIG_RAX-R15, %rsp 1234 subq $ORIG_RAX-R15, %rsp
@@ -1247,8 +1247,8 @@ END(\sym)
1247 1247
1248.macro errorentry sym do_sym 1248.macro errorentry sym do_sym
1249ENTRY(\sym) 1249ENTRY(\sym)
1250 ASM_CLAC
1251 XCPT_FRAME 1250 XCPT_FRAME
1251 ASM_CLAC
1252 PARAVIRT_ADJUST_EXCEPTION_FRAME 1252 PARAVIRT_ADJUST_EXCEPTION_FRAME
1253 subq $ORIG_RAX-R15, %rsp 1253 subq $ORIG_RAX-R15, %rsp
1254 CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 1254 CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15
@@ -1266,8 +1266,8 @@ END(\sym)
1266 /* error code is on the stack already */ 1266 /* error code is on the stack already */
1267.macro paranoiderrorentry sym do_sym 1267.macro paranoiderrorentry sym do_sym
1268ENTRY(\sym) 1268ENTRY(\sym)
1269 ASM_CLAC
1270 XCPT_FRAME 1269 XCPT_FRAME
1270 ASM_CLAC
1271 PARAVIRT_ADJUST_EXCEPTION_FRAME 1271 PARAVIRT_ADJUST_EXCEPTION_FRAME
1272 subq $ORIG_RAX-R15, %rsp 1272 subq $ORIG_RAX-R15, %rsp
1273 CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 1273 CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index 957a47aec64e..4dac2f68ed4a 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -292,8 +292,8 @@ default_entry:
292 * be using the global pages. 292 * be using the global pages.
293 * 293 *
294 * NOTE! If we are on a 486 we may have no cr4 at all! 294 * NOTE! If we are on a 486 we may have no cr4 at all!
295 * Specifically, cr4 exists if and only if CPUID exists, 295 * Specifically, cr4 exists if and only if CPUID exists
296 * which in turn exists if and only if EFLAGS.ID exists. 296 * and has flags other than the FPU flag set.
297 */ 297 */
298 movl $X86_EFLAGS_ID,%ecx 298 movl $X86_EFLAGS_ID,%ecx
299 pushl %ecx 299 pushl %ecx
@@ -308,6 +308,11 @@ default_entry:
308 testl %ecx,%eax 308 testl %ecx,%eax
309 jz 6f # No ID flag = no CPUID = no CR4 309 jz 6f # No ID flag = no CPUID = no CR4
310 310
311 movl $1,%eax
312 cpuid
313 andl $~1,%edx # Ignore CPUID.FPU
314 jz 6f # No flags or only CPUID.FPU = no CR4
315
311 movl pa(mmu_cr4_features),%eax 316 movl pa(mmu_cr4_features),%eax
312 movl %eax,%cr4 317 movl %eax,%cr4
313 318
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c
index 7720ff5a9ee2..efdec7cd8e01 100644
--- a/arch/x86/kernel/microcode_amd.c
+++ b/arch/x86/kernel/microcode_amd.c
@@ -8,8 +8,8 @@
8 * Tigran Aivazian <tigran@aivazian.fsnet.co.uk> 8 * Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
9 * 9 *
10 * Maintainers: 10 * Maintainers:
11 * Andreas Herrmann <andreas.herrmann3@amd.com> 11 * Andreas Herrmann <herrmann.der.user@googlemail.com>
12 * Borislav Petkov <borislav.petkov@amd.com> 12 * Borislav Petkov <bp@alien8.de>
13 * 13 *
14 * This driver allows to upgrade microcode on F10h AMD 14 * This driver allows to upgrade microcode on F10h AMD
15 * CPUs and later. 15 * CPUs and later.
@@ -190,6 +190,7 @@ static unsigned int verify_patch_size(int cpu, u32 patch_size,
190#define F1XH_MPB_MAX_SIZE 2048 190#define F1XH_MPB_MAX_SIZE 2048
191#define F14H_MPB_MAX_SIZE 1824 191#define F14H_MPB_MAX_SIZE 1824
192#define F15H_MPB_MAX_SIZE 4096 192#define F15H_MPB_MAX_SIZE 4096
193#define F16H_MPB_MAX_SIZE 3458
193 194
194 switch (c->x86) { 195 switch (c->x86) {
195 case 0x14: 196 case 0x14:
@@ -198,6 +199,9 @@ static unsigned int verify_patch_size(int cpu, u32 patch_size,
198 case 0x15: 199 case 0x15:
199 max_size = F15H_MPB_MAX_SIZE; 200 max_size = F15H_MPB_MAX_SIZE;
200 break; 201 break;
202 case 0x16:
203 max_size = F16H_MPB_MAX_SIZE;
204 break;
201 default: 205 default:
202 max_size = F1XH_MPB_MAX_SIZE; 206 max_size = F1XH_MPB_MAX_SIZE;
203 break; 207 break;
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index b00b33a18390..974b67e46dd0 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -22,6 +22,7 @@
22#include <linux/perf_event.h> 22#include <linux/perf_event.h>
23#include <linux/hw_breakpoint.h> 23#include <linux/hw_breakpoint.h>
24#include <linux/rcupdate.h> 24#include <linux/rcupdate.h>
25#include <linux/module.h>
25 26
26#include <asm/uaccess.h> 27#include <asm/uaccess.h>
27#include <asm/pgtable.h> 28#include <asm/pgtable.h>
@@ -166,6 +167,35 @@ static inline bool invalid_selector(u16 value)
166 167
167#define FLAG_MASK FLAG_MASK_32 168#define FLAG_MASK FLAG_MASK_32
168 169
170/*
171 * X86_32 CPUs don't save ss and esp if the CPU is already in kernel mode
172 * when it traps. The previous stack will be directly underneath the saved
173 * registers, and 'sp/ss' won't even have been saved. Thus the '&regs->sp'.
174 *
175 * Now, if the stack is empty, '&regs->sp' is out of range. In this
176 * case we try to take the previous stack. To always return a non-null
177 * stack pointer we fall back to regs as stack if no previous stack
178 * exists.
179 *
180 * This is valid only for kernel mode traps.
181 */
182unsigned long kernel_stack_pointer(struct pt_regs *regs)
183{
184 unsigned long context = (unsigned long)regs & ~(THREAD_SIZE - 1);
185 unsigned long sp = (unsigned long)&regs->sp;
186 struct thread_info *tinfo;
187
188 if (context == (sp & ~(THREAD_SIZE - 1)))
189 return sp;
190
191 tinfo = (struct thread_info *)context;
192 if (tinfo->previous_esp)
193 return tinfo->previous_esp;
194
195 return (unsigned long)regs;
196}
197EXPORT_SYMBOL_GPL(kernel_stack_pointer);
198
169static unsigned long *pt_regs_access(struct pt_regs *regs, unsigned long regno) 199static unsigned long *pt_regs_access(struct pt_regs *regs, unsigned long regno)
170{ 200{
171 BUILD_BUG_ON(offsetof(struct pt_regs, bx) != 0); 201 BUILD_BUG_ON(offsetof(struct pt_regs, bx) != 0);
@@ -1511,6 +1541,13 @@ void syscall_trace_leave(struct pt_regs *regs)
1511{ 1541{
1512 bool step; 1542 bool step;
1513 1543
1544 /*
1545 * We may come here right after calling schedule_user()
1546 * or do_notify_resume(), in which case we can be in RCU
1547 * user mode.
1548 */
1549 rcu_user_exit();
1550
1514 audit_syscall_exit(regs); 1551 audit_syscall_exit(regs);
1515 1552
1516 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) 1553 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 468e98dfd44e..ca45696f30fb 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -921,18 +921,19 @@ void __init setup_arch(char **cmdline_p)
921#ifdef CONFIG_X86_64 921#ifdef CONFIG_X86_64
922 if (max_pfn > max_low_pfn) { 922 if (max_pfn > max_low_pfn) {
923 int i; 923 int i;
924 for (i = 0; i < e820.nr_map; i++) { 924 unsigned long start, end;
925 struct e820entry *ei = &e820.map[i]; 925 unsigned long start_pfn, end_pfn;
926 926
927 if (ei->addr + ei->size <= 1UL << 32) 927 for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn,
928 continue; 928 NULL) {
929 929
930 if (ei->type == E820_RESERVED) 930 end = PFN_PHYS(end_pfn);
931 if (end <= (1UL<<32))
931 continue; 932 continue;
932 933
934 start = PFN_PHYS(start_pfn);
933 max_pfn_mapped = init_memory_mapping( 935 max_pfn_mapped = init_memory_mapping(
934 ei->addr < 1UL << 32 ? 1UL << 32 : ei->addr, 936 max((1UL<<32), start), end);
935 ei->addr + ei->size);
936 } 937 }
937 938
938 /* can we preseve max_low_pfn ?*/ 939 /* can we preseve max_low_pfn ?*/
@@ -1048,6 +1049,18 @@ void __init setup_arch(char **cmdline_p)
1048 arch_init_ideal_nops(); 1049 arch_init_ideal_nops();
1049 1050
1050 register_refined_jiffies(CLOCK_TICK_RATE); 1051 register_refined_jiffies(CLOCK_TICK_RATE);
1052
1053#ifdef CONFIG_EFI
1054 /* Once setup is done above, disable efi_enabled on mismatched
1055 * firmware/kernel archtectures since there is no support for
1056 * runtime services.
1057 */
1058 if (efi_enabled && IS_ENABLED(CONFIG_X86_64) != efi_64bit) {
1059 pr_info("efi: Setup done, disabling due to 32/64-bit mismatch\n");
1060 efi_unmap_memmap();
1061 efi_enabled = 0;
1062 }
1063#endif
1051} 1064}
1052 1065
1053#ifdef CONFIG_X86_32 1066#ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index c80a33bc528b..f3e2ec878b8c 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -68,6 +68,8 @@
68#include <asm/mwait.h> 68#include <asm/mwait.h>
69#include <asm/apic.h> 69#include <asm/apic.h>
70#include <asm/io_apic.h> 70#include <asm/io_apic.h>
71#include <asm/i387.h>
72#include <asm/fpu-internal.h>
71#include <asm/setup.h> 73#include <asm/setup.h>
72#include <asm/uv/uv.h> 74#include <asm/uv/uv.h>
73#include <linux/mc146818rtc.h> 75#include <linux/mc146818rtc.h>
@@ -818,6 +820,9 @@ int __cpuinit native_cpu_up(unsigned int cpu, struct task_struct *tidle)
818 820
819 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE; 821 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
820 822
823 /* the FPU context is blank, nobody can own it */
824 __cpu_disable_lazy_restore(cpu);
825
821 err = do_boot_cpu(apicid, cpu, tidle); 826 err = do_boot_cpu(apicid, cpu, tidle);
822 if (err) { 827 if (err) {
823 pr_debug("do_boot_cpu failed %d\n", err); 828 pr_debug("do_boot_cpu failed %d\n", err);
diff --git a/arch/x86/kernel/uprobes.c b/arch/x86/kernel/uprobes.c
index aafa5557b396..c71025b67462 100644
--- a/arch/x86/kernel/uprobes.c
+++ b/arch/x86/kernel/uprobes.c
@@ -478,6 +478,11 @@ int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
478 regs->ip = current->utask->xol_vaddr; 478 regs->ip = current->utask->xol_vaddr;
479 pre_xol_rip_insn(auprobe, regs, autask); 479 pre_xol_rip_insn(auprobe, regs, autask);
480 480
481 autask->saved_tf = !!(regs->flags & X86_EFLAGS_TF);
482 regs->flags |= X86_EFLAGS_TF;
483 if (test_tsk_thread_flag(current, TIF_BLOCKSTEP))
484 set_task_blockstep(current, false);
485
481 return 0; 486 return 0;
482} 487}
483 488
@@ -603,6 +608,16 @@ int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
603 if (auprobe->fixups & UPROBE_FIX_CALL) 608 if (auprobe->fixups & UPROBE_FIX_CALL)
604 result = adjust_ret_addr(regs->sp, correction); 609 result = adjust_ret_addr(regs->sp, correction);
605 610
611 /*
612 * arch_uprobe_pre_xol() doesn't save the state of TIF_BLOCKSTEP
613 * so we can get an extra SIGTRAP if we do not clear TF. We need
614 * to examine the opcode to make it right.
615 */
616 if (utask->autask.saved_tf)
617 send_sig(SIGTRAP, current, 0);
618 else if (!(auprobe->fixups & UPROBE_FIX_SETF))
619 regs->flags &= ~X86_EFLAGS_TF;
620
606 return result; 621 return result;
607} 622}
608 623
@@ -647,6 +662,10 @@ void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
647 current->thread.trap_nr = utask->autask.saved_trap_nr; 662 current->thread.trap_nr = utask->autask.saved_trap_nr;
648 handle_riprel_post_xol(auprobe, regs, NULL); 663 handle_riprel_post_xol(auprobe, regs, NULL);
649 instruction_pointer_set(regs, utask->vaddr); 664 instruction_pointer_set(regs, utask->vaddr);
665
666 /* clear TF if it was set by us in arch_uprobe_pre_xol() */
667 if (!utask->autask.saved_tf)
668 regs->flags &= ~X86_EFLAGS_TF;
650} 669}
651 670
652/* 671/*
@@ -676,38 +695,3 @@ bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)
676 send_sig(SIGTRAP, current, 0); 695 send_sig(SIGTRAP, current, 0);
677 return ret; 696 return ret;
678} 697}
679
680void arch_uprobe_enable_step(struct arch_uprobe *auprobe)
681{
682 struct task_struct *task = current;
683 struct arch_uprobe_task *autask = &task->utask->autask;
684 struct pt_regs *regs = task_pt_regs(task);
685
686 autask->saved_tf = !!(regs->flags & X86_EFLAGS_TF);
687
688 regs->flags |= X86_EFLAGS_TF;
689 if (test_tsk_thread_flag(task, TIF_BLOCKSTEP))
690 set_task_blockstep(task, false);
691}
692
693void arch_uprobe_disable_step(struct arch_uprobe *auprobe)
694{
695 struct task_struct *task = current;
696 struct arch_uprobe_task *autask = &task->utask->autask;
697 bool trapped = (task->utask->state == UTASK_SSTEP_TRAPPED);
698 struct pt_regs *regs = task_pt_regs(task);
699 /*
700 * The state of TIF_BLOCKSTEP was not saved so we can get an extra
701 * SIGTRAP if we do not clear TF. We need to examine the opcode to
702 * make it right.
703 */
704 if (unlikely(trapped)) {
705 if (!autask->saved_tf)
706 regs->flags &= ~X86_EFLAGS_TF;
707 } else {
708 if (autask->saved_tf)
709 send_sig(SIGTRAP, task, 0);
710 else if (!(auprobe->fixups & UPROBE_FIX_SETF))
711 regs->flags &= ~X86_EFLAGS_TF;
712 }
713}
diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h
index a10e46016851..58fc51488828 100644
--- a/arch/x86/kvm/cpuid.h
+++ b/arch/x86/kvm/cpuid.h
@@ -24,6 +24,9 @@ static inline bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
24{ 24{
25 struct kvm_cpuid_entry2 *best; 25 struct kvm_cpuid_entry2 *best;
26 26
27 if (!static_cpu_has(X86_FEATURE_XSAVE))
28 return 0;
29
27 best = kvm_find_cpuid_entry(vcpu, 1, 0); 30 best = kvm_find_cpuid_entry(vcpu, 1, 0);
28 return best && (best->ecx & bit(X86_FEATURE_XSAVE)); 31 return best && (best->ecx & bit(X86_FEATURE_XSAVE));
29} 32}
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 39171cb307ea..bba39bfa1c4b 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -426,8 +426,7 @@ static void invalidate_registers(struct x86_emulate_ctxt *ctxt)
426 _ASM_EXTABLE(1b, 3b) \ 426 _ASM_EXTABLE(1b, 3b) \
427 : "=m" ((ctxt)->eflags), "=&r" (_tmp), \ 427 : "=m" ((ctxt)->eflags), "=&r" (_tmp), \
428 "+a" (*rax), "+d" (*rdx), "+qm"(_ex) \ 428 "+a" (*rax), "+d" (*rdx), "+qm"(_ex) \
429 : "i" (EFLAGS_MASK), "m" ((ctxt)->src.val), \ 429 : "i" (EFLAGS_MASK), "m" ((ctxt)->src.val)); \
430 "a" (*rax), "d" (*rdx)); \
431 } while (0) 430 } while (0)
432 431
433/* instruction has only one source operand, destination is implicit (e.g. mul, div, imul, idiv) */ 432/* instruction has only one source operand, destination is implicit (e.g. mul, div, imul, idiv) */
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index ad6b1dd06f8b..f85815945fc6 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -6549,19 +6549,22 @@ static void vmx_cpuid_update(struct kvm_vcpu *vcpu)
6549 } 6549 }
6550 } 6550 }
6551 6551
6552 exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
6553 /* Exposing INVPCID only when PCID is exposed */ 6552 /* Exposing INVPCID only when PCID is exposed */
6554 best = kvm_find_cpuid_entry(vcpu, 0x7, 0); 6553 best = kvm_find_cpuid_entry(vcpu, 0x7, 0);
6555 if (vmx_invpcid_supported() && 6554 if (vmx_invpcid_supported() &&
6556 best && (best->ebx & bit(X86_FEATURE_INVPCID)) && 6555 best && (best->ebx & bit(X86_FEATURE_INVPCID)) &&
6557 guest_cpuid_has_pcid(vcpu)) { 6556 guest_cpuid_has_pcid(vcpu)) {
6557 exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
6558 exec_control |= SECONDARY_EXEC_ENABLE_INVPCID; 6558 exec_control |= SECONDARY_EXEC_ENABLE_INVPCID;
6559 vmcs_write32(SECONDARY_VM_EXEC_CONTROL, 6559 vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
6560 exec_control); 6560 exec_control);
6561 } else { 6561 } else {
6562 exec_control &= ~SECONDARY_EXEC_ENABLE_INVPCID; 6562 if (cpu_has_secondary_exec_ctrls()) {
6563 vmcs_write32(SECONDARY_VM_EXEC_CONTROL, 6563 exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
6564 exec_control); 6564 exec_control &= ~SECONDARY_EXEC_ENABLE_INVPCID;
6565 vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
6566 exec_control);
6567 }
6565 if (best) 6568 if (best)
6566 best->ebx &= ~bit(X86_FEATURE_INVPCID); 6569 best->ebx &= ~bit(X86_FEATURE_INVPCID);
6567 } 6570 }
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 1eefebe5d727..4f7641756be2 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -3779,7 +3779,7 @@ static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3779{ 3779{
3780 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0]; 3780 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
3781 3781
3782 memcpy(vcpu->run->mmio.data, frag->data, frag->len); 3782 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
3783 return X86EMUL_CONTINUE; 3783 return X86EMUL_CONTINUE;
3784} 3784}
3785 3785
@@ -3832,18 +3832,11 @@ mmio:
3832 bytes -= handled; 3832 bytes -= handled;
3833 val += handled; 3833 val += handled;
3834 3834
3835 while (bytes) { 3835 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
3836 unsigned now = min(bytes, 8U); 3836 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
3837 3837 frag->gpa = gpa;
3838 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++]; 3838 frag->data = val;
3839 frag->gpa = gpa; 3839 frag->len = bytes;
3840 frag->data = val;
3841 frag->len = now;
3842
3843 gpa += now;
3844 val += now;
3845 bytes -= now;
3846 }
3847 return X86EMUL_CONTINUE; 3840 return X86EMUL_CONTINUE;
3848} 3841}
3849 3842
@@ -3890,7 +3883,7 @@ int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
3890 vcpu->mmio_needed = 1; 3883 vcpu->mmio_needed = 1;
3891 vcpu->mmio_cur_fragment = 0; 3884 vcpu->mmio_cur_fragment = 0;
3892 3885
3893 vcpu->run->mmio.len = vcpu->mmio_fragments[0].len; 3886 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
3894 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write; 3887 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
3895 vcpu->run->exit_reason = KVM_EXIT_MMIO; 3888 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3896 vcpu->run->mmio.phys_addr = gpa; 3889 vcpu->run->mmio.phys_addr = gpa;
@@ -5522,28 +5515,44 @@ static int complete_emulated_pio(struct kvm_vcpu *vcpu)
5522 * 5515 *
5523 * read: 5516 * read:
5524 * for each fragment 5517 * for each fragment
5525 * write gpa, len 5518 * for each mmio piece in the fragment
5526 * exit 5519 * write gpa, len
5527 * copy data 5520 * exit
5521 * copy data
5528 * execute insn 5522 * execute insn
5529 * 5523 *
5530 * write: 5524 * write:
5531 * for each fragment 5525 * for each fragment
5532 * write gpa, len 5526 * for each mmio piece in the fragment
5533 * copy data 5527 * write gpa, len
5534 * exit 5528 * copy data
5529 * exit
5535 */ 5530 */
5536static int complete_emulated_mmio(struct kvm_vcpu *vcpu) 5531static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
5537{ 5532{
5538 struct kvm_run *run = vcpu->run; 5533 struct kvm_run *run = vcpu->run;
5539 struct kvm_mmio_fragment *frag; 5534 struct kvm_mmio_fragment *frag;
5535 unsigned len;
5540 5536
5541 BUG_ON(!vcpu->mmio_needed); 5537 BUG_ON(!vcpu->mmio_needed);
5542 5538
5543 /* Complete previous fragment */ 5539 /* Complete previous fragment */
5544 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment++]; 5540 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
5541 len = min(8u, frag->len);
5545 if (!vcpu->mmio_is_write) 5542 if (!vcpu->mmio_is_write)
5546 memcpy(frag->data, run->mmio.data, frag->len); 5543 memcpy(frag->data, run->mmio.data, len);
5544
5545 if (frag->len <= 8) {
5546 /* Switch to the next fragment. */
5547 frag++;
5548 vcpu->mmio_cur_fragment++;
5549 } else {
5550 /* Go forward to the next mmio piece. */
5551 frag->data += len;
5552 frag->gpa += len;
5553 frag->len -= len;
5554 }
5555
5547 if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) { 5556 if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
5548 vcpu->mmio_needed = 0; 5557 vcpu->mmio_needed = 0;
5549 if (vcpu->mmio_is_write) 5558 if (vcpu->mmio_is_write)
@@ -5551,13 +5560,12 @@ static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
5551 vcpu->mmio_read_completed = 1; 5560 vcpu->mmio_read_completed = 1;
5552 return complete_emulated_io(vcpu); 5561 return complete_emulated_io(vcpu);
5553 } 5562 }
5554 /* Initiate next fragment */ 5563
5555 ++frag;
5556 run->exit_reason = KVM_EXIT_MMIO; 5564 run->exit_reason = KVM_EXIT_MMIO;
5557 run->mmio.phys_addr = frag->gpa; 5565 run->mmio.phys_addr = frag->gpa;
5558 if (vcpu->mmio_is_write) 5566 if (vcpu->mmio_is_write)
5559 memcpy(run->mmio.data, frag->data, frag->len); 5567 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
5560 run->mmio.len = frag->len; 5568 run->mmio.len = min(8u, frag->len);
5561 run->mmio.is_write = vcpu->mmio_is_write; 5569 run->mmio.is_write = vcpu->mmio_is_write;
5562 vcpu->arch.complete_userspace_io = complete_emulated_mmio; 5570 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5563 return 0; 5571 return 0;
@@ -5773,6 +5781,9 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5773 int pending_vec, max_bits, idx; 5781 int pending_vec, max_bits, idx;
5774 struct desc_ptr dt; 5782 struct desc_ptr dt;
5775 5783
5784 if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
5785 return -EINVAL;
5786
5776 dt.size = sregs->idt.limit; 5787 dt.size = sregs->idt.limit;
5777 dt.address = sregs->idt.base; 5788 dt.address = sregs->idt.base;
5778 kvm_x86_ops->set_idt(vcpu, &dt); 5789 kvm_x86_ops->set_idt(vcpu, &dt);
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index ab1f6a93b527..d7aea41563b3 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -35,40 +35,44 @@ struct map_range {
35 unsigned page_size_mask; 35 unsigned page_size_mask;
36}; 36};
37 37
38static void __init find_early_table_space(struct map_range *mr, unsigned long end, 38/*
39 int use_pse, int use_gbpages) 39 * First calculate space needed for kernel direct mapping page tables to cover
40 * mr[0].start to mr[nr_range - 1].end, while accounting for possible 2M and 1GB
41 * pages. Then find enough contiguous space for those page tables.
42 */
43static void __init find_early_table_space(struct map_range *mr, int nr_range)
40{ 44{
41 unsigned long puds, pmds, ptes, tables, start = 0, good_end = end; 45 int i;
46 unsigned long puds = 0, pmds = 0, ptes = 0, tables;
47 unsigned long start = 0, good_end;
42 phys_addr_t base; 48 phys_addr_t base;
43 49
44 puds = (end + PUD_SIZE - 1) >> PUD_SHIFT; 50 for (i = 0; i < nr_range; i++) {
45 tables = roundup(puds * sizeof(pud_t), PAGE_SIZE); 51 unsigned long range, extra;
46
47 if (use_gbpages) {
48 unsigned long extra;
49
50 extra = end - ((end>>PUD_SHIFT) << PUD_SHIFT);
51 pmds = (extra + PMD_SIZE - 1) >> PMD_SHIFT;
52 } else
53 pmds = (end + PMD_SIZE - 1) >> PMD_SHIFT;
54 52
55 tables += roundup(pmds * sizeof(pmd_t), PAGE_SIZE); 53 range = mr[i].end - mr[i].start;
54 puds += (range + PUD_SIZE - 1) >> PUD_SHIFT;
56 55
57 if (use_pse) { 56 if (mr[i].page_size_mask & (1 << PG_LEVEL_1G)) {
58 unsigned long extra; 57 extra = range - ((range >> PUD_SHIFT) << PUD_SHIFT);
58 pmds += (extra + PMD_SIZE - 1) >> PMD_SHIFT;
59 } else {
60 pmds += (range + PMD_SIZE - 1) >> PMD_SHIFT;
61 }
59 62
60 extra = end - ((end>>PMD_SHIFT) << PMD_SHIFT); 63 if (mr[i].page_size_mask & (1 << PG_LEVEL_2M)) {
64 extra = range - ((range >> PMD_SHIFT) << PMD_SHIFT);
61#ifdef CONFIG_X86_32 65#ifdef CONFIG_X86_32
62 extra += PMD_SIZE; 66 extra += PMD_SIZE;
63#endif 67#endif
64 /* The first 2/4M doesn't use large pages. */ 68 ptes += (extra + PAGE_SIZE - 1) >> PAGE_SHIFT;
65 if (mr->start < PMD_SIZE) 69 } else {
66 extra += mr->end - mr->start; 70 ptes += (range + PAGE_SIZE - 1) >> PAGE_SHIFT;
67 71 }
68 ptes = (extra + PAGE_SIZE - 1) >> PAGE_SHIFT; 72 }
69 } else
70 ptes = (end + PAGE_SIZE - 1) >> PAGE_SHIFT;
71 73
74 tables = roundup(puds * sizeof(pud_t), PAGE_SIZE);
75 tables += roundup(pmds * sizeof(pmd_t), PAGE_SIZE);
72 tables += roundup(ptes * sizeof(pte_t), PAGE_SIZE); 76 tables += roundup(ptes * sizeof(pte_t), PAGE_SIZE);
73 77
74#ifdef CONFIG_X86_32 78#ifdef CONFIG_X86_32
@@ -86,7 +90,7 @@ static void __init find_early_table_space(struct map_range *mr, unsigned long en
86 pgt_buf_top = pgt_buf_start + (tables >> PAGE_SHIFT); 90 pgt_buf_top = pgt_buf_start + (tables >> PAGE_SHIFT);
87 91
88 printk(KERN_DEBUG "kernel direct mapping tables up to %#lx @ [mem %#010lx-%#010lx]\n", 92 printk(KERN_DEBUG "kernel direct mapping tables up to %#lx @ [mem %#010lx-%#010lx]\n",
89 end - 1, pgt_buf_start << PAGE_SHIFT, 93 mr[nr_range - 1].end - 1, pgt_buf_start << PAGE_SHIFT,
90 (pgt_buf_top << PAGE_SHIFT) - 1); 94 (pgt_buf_top << PAGE_SHIFT) - 1);
91} 95}
92 96
@@ -267,7 +271,7 @@ unsigned long __init_refok init_memory_mapping(unsigned long start,
267 * nodes are discovered. 271 * nodes are discovered.
268 */ 272 */
269 if (!after_bootmem) 273 if (!after_bootmem)
270 find_early_table_space(&mr[0], end, use_pse, use_gbpages); 274 find_early_table_space(mr, nr_range);
271 275
272 for (i = 0; i < nr_range; i++) 276 for (i = 0; i < nr_range; i++)
273 ret = kernel_physical_mapping_init(mr[i].start, mr[i].end, 277 ret = kernel_physical_mapping_init(mr[i].start, mr[i].end,
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index 2b6b4a3c8beb..3baff255adac 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -386,7 +386,8 @@ phys_pte_init(pte_t *pte_page, unsigned long addr, unsigned long end,
386 * these mappings are more intelligent. 386 * these mappings are more intelligent.
387 */ 387 */
388 if (pte_val(*pte)) { 388 if (pte_val(*pte)) {
389 pages++; 389 if (!after_bootmem)
390 pages++;
390 continue; 391 continue;
391 } 392 }
392 393
@@ -451,6 +452,8 @@ phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end,
451 * attributes. 452 * attributes.
452 */ 453 */
453 if (page_size_mask & (1 << PG_LEVEL_2M)) { 454 if (page_size_mask & (1 << PG_LEVEL_2M)) {
455 if (!after_bootmem)
456 pages++;
454 last_map_addr = next; 457 last_map_addr = next;
455 continue; 458 continue;
456 } 459 }
@@ -526,6 +529,8 @@ phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end,
526 * attributes. 529 * attributes.
527 */ 530 */
528 if (page_size_mask & (1 << PG_LEVEL_1G)) { 531 if (page_size_mask & (1 << PG_LEVEL_1G)) {
532 if (!after_bootmem)
533 pages++;
529 last_map_addr = next; 534 last_map_addr = next;
530 continue; 535 continue;
531 } 536 }
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 0777f042e400..60f926cd8b0e 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -197,7 +197,7 @@ void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
197 } 197 }
198 198
199 if (end == TLB_FLUSH_ALL || tlb_flushall_shift == -1 199 if (end == TLB_FLUSH_ALL || tlb_flushall_shift == -1
200 || vmflag == VM_HUGETLB) { 200 || vmflag & VM_HUGETLB) {
201 local_flush_tlb(); 201 local_flush_tlb();
202 goto flush_all; 202 goto flush_all;
203 } 203 }
diff --git a/arch/x86/pci/ce4100.c b/arch/x86/pci/ce4100.c
index 41bd2a2d2c50..b914e20b5a00 100644
--- a/arch/x86/pci/ce4100.c
+++ b/arch/x86/pci/ce4100.c
@@ -115,6 +115,16 @@ static void sata_revid_read(struct sim_dev_reg *reg, u32 *value)
115 reg_read(reg, value); 115 reg_read(reg, value);
116} 116}
117 117
118static void reg_noirq_read(struct sim_dev_reg *reg, u32 *value)
119{
120 unsigned long flags;
121
122 raw_spin_lock_irqsave(&pci_config_lock, flags);
123 /* force interrupt pin value to 0 */
124 *value = reg->sim_reg.value & 0xfff00ff;
125 raw_spin_unlock_irqrestore(&pci_config_lock, flags);
126}
127
118static struct sim_dev_reg bus1_fixups[] = { 128static struct sim_dev_reg bus1_fixups[] = {
119 DEFINE_REG(2, 0, 0x10, (16*MB), reg_init, reg_read, reg_write) 129 DEFINE_REG(2, 0, 0x10, (16*MB), reg_init, reg_read, reg_write)
120 DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write) 130 DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write)
@@ -144,6 +154,7 @@ static struct sim_dev_reg bus1_fixups[] = {
144 DEFINE_REG(11, 5, 0x10, (64*KB), reg_init, reg_read, reg_write) 154 DEFINE_REG(11, 5, 0x10, (64*KB), reg_init, reg_read, reg_write)
145 DEFINE_REG(11, 6, 0x10, (256), reg_init, reg_read, reg_write) 155 DEFINE_REG(11, 6, 0x10, (256), reg_init, reg_read, reg_write)
146 DEFINE_REG(11, 7, 0x10, (64*KB), reg_init, reg_read, reg_write) 156 DEFINE_REG(11, 7, 0x10, (64*KB), reg_init, reg_read, reg_write)
157 DEFINE_REG(11, 7, 0x3c, 256, reg_init, reg_noirq_read, reg_write)
147 DEFINE_REG(12, 0, 0x10, (128*KB), reg_init, reg_read, reg_write) 158 DEFINE_REG(12, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
148 DEFINE_REG(12, 0, 0x14, (256), reg_init, reg_read, reg_write) 159 DEFINE_REG(12, 0, 0x14, (256), reg_init, reg_read, reg_write)
149 DEFINE_REG(12, 1, 0x10, (1024), reg_init, reg_read, reg_write) 160 DEFINE_REG(12, 1, 0x10, (1024), reg_init, reg_read, reg_write)
@@ -161,8 +172,10 @@ static struct sim_dev_reg bus1_fixups[] = {
161 DEFINE_REG(16, 0, 0x10, (64*KB), reg_init, reg_read, reg_write) 172 DEFINE_REG(16, 0, 0x10, (64*KB), reg_init, reg_read, reg_write)
162 DEFINE_REG(16, 0, 0x14, (64*MB), reg_init, reg_read, reg_write) 173 DEFINE_REG(16, 0, 0x14, (64*MB), reg_init, reg_read, reg_write)
163 DEFINE_REG(16, 0, 0x18, (64*MB), reg_init, reg_read, reg_write) 174 DEFINE_REG(16, 0, 0x18, (64*MB), reg_init, reg_read, reg_write)
175 DEFINE_REG(16, 0, 0x3c, 256, reg_init, reg_noirq_read, reg_write)
164 DEFINE_REG(17, 0, 0x10, (128*KB), reg_init, reg_read, reg_write) 176 DEFINE_REG(17, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
165 DEFINE_REG(18, 0, 0x10, (1*KB), reg_init, reg_read, reg_write) 177 DEFINE_REG(18, 0, 0x10, (1*KB), reg_init, reg_read, reg_write)
178 DEFINE_REG(18, 0, 0x3c, 256, reg_init, reg_noirq_read, reg_write)
166}; 179};
167 180
168static void __init init_sim_regs(void) 181static void __init init_sim_regs(void)
diff --git a/arch/x86/platform/ce4100/ce4100.c b/arch/x86/platform/ce4100/ce4100.c
index 4c61b52191eb..92525cb8e54c 100644
--- a/arch/x86/platform/ce4100/ce4100.c
+++ b/arch/x86/platform/ce4100/ce4100.c
@@ -21,12 +21,25 @@
21#include <asm/i8259.h> 21#include <asm/i8259.h>
22#include <asm/io.h> 22#include <asm/io.h>
23#include <asm/io_apic.h> 23#include <asm/io_apic.h>
24#include <asm/emergency-restart.h>
24 25
25static int ce4100_i8042_detect(void) 26static int ce4100_i8042_detect(void)
26{ 27{
27 return 0; 28 return 0;
28} 29}
29 30
31/*
32 * The CE4100 platform has an internal 8051 Microcontroller which is
33 * responsible for signaling to the external Power Management Unit the
34 * intention to reset, reboot or power off the system. This 8051 device has
35 * its command register mapped at I/O port 0xcf9 and the value 0x4 is used
36 * to power off the system.
37 */
38static void ce4100_power_off(void)
39{
40 outb(0x4, 0xcf9);
41}
42
30#ifdef CONFIG_SERIAL_8250 43#ifdef CONFIG_SERIAL_8250
31 44
32static unsigned int mem_serial_in(struct uart_port *p, int offset) 45static unsigned int mem_serial_in(struct uart_port *p, int offset)
@@ -139,8 +152,19 @@ void __init x86_ce4100_early_setup(void)
139 x86_init.mpparse.find_smp_config = x86_init_noop; 152 x86_init.mpparse.find_smp_config = x86_init_noop;
140 x86_init.pci.init = ce4100_pci_init; 153 x86_init.pci.init = ce4100_pci_init;
141 154
155 /*
156 * By default, the reboot method is ACPI which is supported by the
157 * CE4100 bootloader CEFDK using FADT.ResetReg Address and ResetValue
158 * the bootloader will however issue a system power off instead of
159 * reboot. By using BOOT_KBD we ensure proper system reboot as
160 * expected.
161 */
162 reboot_type = BOOT_KBD;
163
142#ifdef CONFIG_X86_IO_APIC 164#ifdef CONFIG_X86_IO_APIC
143 x86_init.pci.init_irq = sdv_pci_init; 165 x86_init.pci.init_irq = sdv_pci_init;
144 x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc_nocheck; 166 x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc_nocheck;
145#endif 167#endif
168
169 pm_power_off = ce4100_power_off;
146} 170}
diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c
index aded2a91162a..ad4439145f85 100644
--- a/arch/x86/platform/efi/efi.c
+++ b/arch/x86/platform/efi/efi.c
@@ -70,11 +70,15 @@ EXPORT_SYMBOL(efi);
70struct efi_memory_map memmap; 70struct efi_memory_map memmap;
71 71
72bool efi_64bit; 72bool efi_64bit;
73static bool efi_native;
74 73
75static struct efi efi_phys __initdata; 74static struct efi efi_phys __initdata;
76static efi_system_table_t efi_systab __initdata; 75static efi_system_table_t efi_systab __initdata;
77 76
77static inline bool efi_is_native(void)
78{
79 return IS_ENABLED(CONFIG_X86_64) == efi_64bit;
80}
81
78static int __init setup_noefi(char *arg) 82static int __init setup_noefi(char *arg)
79{ 83{
80 efi_enabled = 0; 84 efi_enabled = 0;
@@ -420,7 +424,7 @@ void __init efi_reserve_boot_services(void)
420 } 424 }
421} 425}
422 426
423static void __init efi_unmap_memmap(void) 427void __init efi_unmap_memmap(void)
424{ 428{
425 if (memmap.map) { 429 if (memmap.map) {
426 early_iounmap(memmap.map, memmap.nr_map * memmap.desc_size); 430 early_iounmap(memmap.map, memmap.nr_map * memmap.desc_size);
@@ -432,7 +436,7 @@ void __init efi_free_boot_services(void)
432{ 436{
433 void *p; 437 void *p;
434 438
435 if (!efi_native) 439 if (!efi_is_native())
436 return; 440 return;
437 441
438 for (p = memmap.map; p < memmap.map_end; p += memmap.desc_size) { 442 for (p = memmap.map; p < memmap.map_end; p += memmap.desc_size) {
@@ -684,12 +688,10 @@ void __init efi_init(void)
684 return; 688 return;
685 } 689 }
686 efi_phys.systab = (efi_system_table_t *)boot_params.efi_info.efi_systab; 690 efi_phys.systab = (efi_system_table_t *)boot_params.efi_info.efi_systab;
687 efi_native = !efi_64bit;
688#else 691#else
689 efi_phys.systab = (efi_system_table_t *) 692 efi_phys.systab = (efi_system_table_t *)
690 (boot_params.efi_info.efi_systab | 693 (boot_params.efi_info.efi_systab |
691 ((__u64)boot_params.efi_info.efi_systab_hi<<32)); 694 ((__u64)boot_params.efi_info.efi_systab_hi<<32));
692 efi_native = efi_64bit;
693#endif 695#endif
694 696
695 if (efi_systab_init(efi_phys.systab)) { 697 if (efi_systab_init(efi_phys.systab)) {
@@ -723,7 +725,7 @@ void __init efi_init(void)
723 * that doesn't match the kernel 32/64-bit mode. 725 * that doesn't match the kernel 32/64-bit mode.
724 */ 726 */
725 727
726 if (!efi_native) 728 if (!efi_is_native())
727 pr_info("No EFI runtime due to 32/64-bit mismatch with kernel\n"); 729 pr_info("No EFI runtime due to 32/64-bit mismatch with kernel\n");
728 else if (efi_runtime_init()) { 730 else if (efi_runtime_init()) {
729 efi_enabled = 0; 731 efi_enabled = 0;
@@ -735,7 +737,7 @@ void __init efi_init(void)
735 return; 737 return;
736 } 738 }
737#ifdef CONFIG_X86_32 739#ifdef CONFIG_X86_32
738 if (efi_native) { 740 if (efi_is_native()) {
739 x86_platform.get_wallclock = efi_get_time; 741 x86_platform.get_wallclock = efi_get_time;
740 x86_platform.set_wallclock = efi_set_rtc_mmss; 742 x86_platform.set_wallclock = efi_set_rtc_mmss;
741 } 743 }
@@ -810,6 +812,16 @@ void __iomem *efi_lookup_mapped_addr(u64 phys_addr)
810 return NULL; 812 return NULL;
811} 813}
812 814
815void efi_memory_uc(u64 addr, unsigned long size)
816{
817 unsigned long page_shift = 1UL << EFI_PAGE_SHIFT;
818 u64 npages;
819
820 npages = round_up(size, page_shift) / page_shift;
821 memrange_efi_to_native(&addr, &npages);
822 set_memory_uc(addr, npages);
823}
824
813/* 825/*
814 * This function will switch the EFI runtime services to virtual mode. 826 * This function will switch the EFI runtime services to virtual mode.
815 * Essentially, look through the EFI memmap and map every region that 827 * Essentially, look through the EFI memmap and map every region that
@@ -823,7 +835,7 @@ void __init efi_enter_virtual_mode(void)
823 efi_memory_desc_t *md, *prev_md = NULL; 835 efi_memory_desc_t *md, *prev_md = NULL;
824 efi_status_t status; 836 efi_status_t status;
825 unsigned long size; 837 unsigned long size;
826 u64 end, systab, addr, npages, end_pfn; 838 u64 end, systab, end_pfn;
827 void *p, *va, *new_memmap = NULL; 839 void *p, *va, *new_memmap = NULL;
828 int count = 0; 840 int count = 0;
829 841
@@ -834,7 +846,7 @@ void __init efi_enter_virtual_mode(void)
834 * non-native EFI 846 * non-native EFI
835 */ 847 */
836 848
837 if (!efi_native) { 849 if (!efi_is_native()) {
838 efi_unmap_memmap(); 850 efi_unmap_memmap();
839 return; 851 return;
840 } 852 }
@@ -879,10 +891,14 @@ void __init efi_enter_virtual_mode(void)
879 end_pfn = PFN_UP(end); 891 end_pfn = PFN_UP(end);
880 if (end_pfn <= max_low_pfn_mapped 892 if (end_pfn <= max_low_pfn_mapped
881 || (end_pfn > (1UL << (32 - PAGE_SHIFT)) 893 || (end_pfn > (1UL << (32 - PAGE_SHIFT))
882 && end_pfn <= max_pfn_mapped)) 894 && end_pfn <= max_pfn_mapped)) {
883 va = __va(md->phys_addr); 895 va = __va(md->phys_addr);
884 else 896
885 va = efi_ioremap(md->phys_addr, size, md->type); 897 if (!(md->attribute & EFI_MEMORY_WB))
898 efi_memory_uc((u64)(unsigned long)va, size);
899 } else
900 va = efi_ioremap(md->phys_addr, size,
901 md->type, md->attribute);
886 902
887 md->virt_addr = (u64) (unsigned long) va; 903 md->virt_addr = (u64) (unsigned long) va;
888 904
@@ -892,13 +908,6 @@ void __init efi_enter_virtual_mode(void)
892 continue; 908 continue;
893 } 909 }
894 910
895 if (!(md->attribute & EFI_MEMORY_WB)) {
896 addr = md->virt_addr;
897 npages = md->num_pages;
898 memrange_efi_to_native(&addr, &npages);
899 set_memory_uc(addr, npages);
900 }
901
902 systab = (u64) (unsigned long) efi_phys.systab; 911 systab = (u64) (unsigned long) efi_phys.systab;
903 if (md->phys_addr <= systab && systab < end) { 912 if (md->phys_addr <= systab && systab < end) {
904 systab += md->virt_addr - md->phys_addr; 913 systab += md->virt_addr - md->phys_addr;
diff --git a/arch/x86/platform/efi/efi_64.c b/arch/x86/platform/efi/efi_64.c
index ac3aa54e2654..95fd505dfeb6 100644
--- a/arch/x86/platform/efi/efi_64.c
+++ b/arch/x86/platform/efi/efi_64.c
@@ -82,7 +82,7 @@ void __init efi_call_phys_epilog(void)
82} 82}
83 83
84void __iomem *__init efi_ioremap(unsigned long phys_addr, unsigned long size, 84void __iomem *__init efi_ioremap(unsigned long phys_addr, unsigned long size,
85 u32 type) 85 u32 type, u64 attribute)
86{ 86{
87 unsigned long last_map_pfn; 87 unsigned long last_map_pfn;
88 88
@@ -92,8 +92,11 @@ void __iomem *__init efi_ioremap(unsigned long phys_addr, unsigned long size,
92 last_map_pfn = init_memory_mapping(phys_addr, phys_addr + size); 92 last_map_pfn = init_memory_mapping(phys_addr, phys_addr + size);
93 if ((last_map_pfn << PAGE_SHIFT) < phys_addr + size) { 93 if ((last_map_pfn << PAGE_SHIFT) < phys_addr + size) {
94 unsigned long top = last_map_pfn << PAGE_SHIFT; 94 unsigned long top = last_map_pfn << PAGE_SHIFT;
95 efi_ioremap(top, size - (top - phys_addr), type); 95 efi_ioremap(top, size - (top - phys_addr), type, attribute);
96 } 96 }
97 97
98 if (!(attribute & EFI_MEMORY_WB))
99 efi_memory_uc((u64)(unsigned long)__va(phys_addr), size);
100
98 return (void __iomem *)__va(phys_addr); 101 return (void __iomem *)__va(phys_addr);
99} 102}
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 6226c99729b9..dcf5f2dd91ec 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -1288,6 +1288,25 @@ unsigned long xen_read_cr2_direct(void)
1288 return this_cpu_read(xen_vcpu_info.arch.cr2); 1288 return this_cpu_read(xen_vcpu_info.arch.cr2);
1289} 1289}
1290 1290
1291void xen_flush_tlb_all(void)
1292{
1293 struct mmuext_op *op;
1294 struct multicall_space mcs;
1295
1296 trace_xen_mmu_flush_tlb_all(0);
1297
1298 preempt_disable();
1299
1300 mcs = xen_mc_entry(sizeof(*op));
1301
1302 op = mcs.args;
1303 op->cmd = MMUEXT_TLB_FLUSH_ALL;
1304 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1305
1306 xen_mc_issue(PARAVIRT_LAZY_MMU);
1307
1308 preempt_enable();
1309}
1291static void xen_flush_tlb(void) 1310static void xen_flush_tlb(void)
1292{ 1311{
1293 struct mmuext_op *op; 1312 struct mmuext_op *op;
@@ -2518,7 +2537,7 @@ int xen_remap_domain_mfn_range(struct vm_area_struct *vma,
2518 err = 0; 2537 err = 0;
2519out: 2538out:
2520 2539
2521 flush_tlb_all(); 2540 xen_flush_tlb_all();
2522 2541
2523 return err; 2542 return err;
2524} 2543}
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index cdcb48adee4c..0d1f36a22c98 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -13,6 +13,8 @@ config XTENSA
13 select GENERIC_CPU_DEVICES 13 select GENERIC_CPU_DEVICES
14 select MODULES_USE_ELF_RELA 14 select MODULES_USE_ELF_RELA
15 select GENERIC_PCI_IOMAP 15 select GENERIC_PCI_IOMAP
16 select GENERIC_KERNEL_THREAD
17 select GENERIC_KERNEL_EXECVE
16 select ARCH_WANT_OPTIONAL_GPIOLIB 18 select ARCH_WANT_OPTIONAL_GPIOLIB
17 help 19 help
18 Xtensa processors are 32-bit RISC machines designed by Tensilica 20 Xtensa processors are 32-bit RISC machines designed by Tensilica
diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h
index e6be5b9091c2..700c2e6f2d25 100644
--- a/arch/xtensa/include/asm/io.h
+++ b/arch/xtensa/include/asm/io.h
@@ -62,6 +62,10 @@ static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
62static inline void iounmap(volatile void __iomem *addr) 62static inline void iounmap(volatile void __iomem *addr)
63{ 63{
64} 64}
65
66#define virt_to_bus virt_to_phys
67#define bus_to_virt phys_to_virt
68
65#endif /* CONFIG_MMU */ 69#endif /* CONFIG_MMU */
66 70
67/* 71/*
diff --git a/arch/xtensa/include/asm/processor.h b/arch/xtensa/include/asm/processor.h
index 5c371d8d4528..2d630e7399ca 100644
--- a/arch/xtensa/include/asm/processor.h
+++ b/arch/xtensa/include/asm/processor.h
@@ -152,6 +152,7 @@ struct thread_struct {
152 152
153/* Clearing a0 terminates the backtrace. */ 153/* Clearing a0 terminates the backtrace. */
154#define start_thread(regs, new_pc, new_sp) \ 154#define start_thread(regs, new_pc, new_sp) \
155 memset(regs, 0, sizeof(*regs)); \
155 regs->pc = new_pc; \ 156 regs->pc = new_pc; \
156 regs->ps = USER_PS_VALUE; \ 157 regs->ps = USER_PS_VALUE; \
157 regs->areg[1] = new_sp; \ 158 regs->areg[1] = new_sp; \
@@ -168,9 +169,6 @@ struct mm_struct;
168/* Free all resources held by a thread. */ 169/* Free all resources held by a thread. */
169#define release_thread(thread) do { } while(0) 170#define release_thread(thread) do { } while(0)
170 171
171/* Create a kernel thread without removing it from tasklists */
172extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
173
174/* Copy and release all segment info associated with a VM */ 172/* Copy and release all segment info associated with a VM */
175#define copy_segments(p, mm) do { } while(0) 173#define copy_segments(p, mm) do { } while(0)
176#define release_segments(mm) do { } while(0) 174#define release_segments(mm) do { } while(0)
diff --git a/arch/xtensa/include/asm/syscall.h b/arch/xtensa/include/asm/syscall.h
index c1dacca312f3..124aeee0d381 100644
--- a/arch/xtensa/include/asm/syscall.h
+++ b/arch/xtensa/include/asm/syscall.h
@@ -10,7 +10,7 @@
10 10
11struct pt_regs; 11struct pt_regs;
12struct sigaction; 12struct sigaction;
13asmlinkage long xtensa_execve(char*, char**, char**, struct pt_regs*); 13asmlinkage long sys_execve(char*, char**, char**, struct pt_regs*);
14asmlinkage long xtensa_clone(unsigned long, unsigned long, struct pt_regs*); 14asmlinkage long xtensa_clone(unsigned long, unsigned long, struct pt_regs*);
15asmlinkage long xtensa_ptrace(long, long, long, long); 15asmlinkage long xtensa_ptrace(long, long, long, long);
16asmlinkage long xtensa_sigreturn(struct pt_regs*); 16asmlinkage long xtensa_sigreturn(struct pt_regs*);
diff --git a/arch/xtensa/include/asm/unistd.h b/arch/xtensa/include/asm/unistd.h
index 9ef1c31d2c83..f4e6eaa40d1c 100644
--- a/arch/xtensa/include/asm/unistd.h
+++ b/arch/xtensa/include/asm/unistd.h
@@ -1,16 +1,9 @@
1/* 1#ifndef _XTENSA_UNISTD_H
2 * include/asm-xtensa/unistd.h 2#define _XTENSA_UNISTD_H
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10 3
4#define __ARCH_WANT_SYS_EXECVE
11#include <uapi/asm/unistd.h> 5#include <uapi/asm/unistd.h>
12 6
13
14/* 7/*
15 * "Conditional" syscalls 8 * "Conditional" syscalls
16 * 9 *
@@ -37,3 +30,5 @@
37#define __IGNORE_mmap /* use mmap2 */ 30#define __IGNORE_mmap /* use mmap2 */
38#define __IGNORE_vfork /* use clone */ 31#define __IGNORE_vfork /* use clone */
39#define __IGNORE_fadvise64 /* use fadvise64_64 */ 32#define __IGNORE_fadvise64 /* use fadvise64_64 */
33
34#endif /* _XTENSA_UNISTD_H */
diff --git a/arch/xtensa/include/uapi/asm/unistd.h b/arch/xtensa/include/uapi/asm/unistd.h
index 479abaea5aae..9f36d0e3e0ac 100644
--- a/arch/xtensa/include/uapi/asm/unistd.h
+++ b/arch/xtensa/include/uapi/asm/unistd.h
@@ -1,14 +1,4 @@
1/* 1#if !defined(_UAPI_XTENSA_UNISTD_H) || defined(__SYSCALL)
2 * include/asm-xtensa/unistd.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2012 Tensilica Inc.
9 */
10
11#ifndef _UAPI_XTENSA_UNISTD_H
12#define _UAPI_XTENSA_UNISTD_H 2#define _UAPI_XTENSA_UNISTD_H
13 3
14#ifndef __SYSCALL 4#ifndef __SYSCALL
@@ -272,7 +262,7 @@ __SYSCALL(115, sys_sendmmsg, 4)
272#define __NR_clone 116 262#define __NR_clone 116
273__SYSCALL(116, xtensa_clone, 5) 263__SYSCALL(116, xtensa_clone, 5)
274#define __NR_execve 117 264#define __NR_execve 117
275__SYSCALL(117, xtensa_execve, 3) 265__SYSCALL(117, sys_execve, 3)
276#define __NR_exit 118 266#define __NR_exit 118
277__SYSCALL(118, sys_exit, 1) 267__SYSCALL(118, sys_exit, 1)
278#define __NR_exit_group 119 268#define __NR_exit_group 119
@@ -759,4 +749,6 @@ __SYSCALL(331, sys_kcmp, 5)
759 749
760#define SYS_XTENSA_COUNT 5 /* count */ 750#define SYS_XTENSA_COUNT 5 /* count */
761 751
752#undef __SYSCALL
753
762#endif /* _UAPI_XTENSA_UNISTD_H */ 754#endif /* _UAPI_XTENSA_UNISTD_H */
diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S
index 18453067c258..90bfc1dbc13d 100644
--- a/arch/xtensa/kernel/entry.S
+++ b/arch/xtensa/kernel/entry.S
@@ -1833,50 +1833,6 @@ ENTRY(system_call)
1833 1833
1834 1834
1835/* 1835/*
1836 * Create a kernel thread
1837 *
1838 * int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
1839 * a2 a2 a3 a4
1840 */
1841
1842ENTRY(kernel_thread)
1843 entry a1, 16
1844
1845 mov a5, a2 # preserve fn over syscall
1846 mov a7, a3 # preserve args over syscall
1847
1848 movi a3, _CLONE_VM | _CLONE_UNTRACED
1849 movi a2, __NR_clone
1850 or a6, a4, a3 # arg0: flags
1851 mov a3, a1 # arg1: sp
1852 syscall
1853
1854 beq a3, a1, 1f # branch if parent
1855 mov a6, a7 # args
1856 callx4 a5 # fn(args)
1857
1858 movi a2, __NR_exit
1859 syscall # return value of fn(args) still in a6
1860
18611: retw
1862
1863/*
1864 * Do a system call from kernel instead of calling sys_execve, so we end up
1865 * with proper pt_regs.
1866 *
1867 * int kernel_execve(const char *fname, char *const argv[], charg *const envp[])
1868 * a2 a2 a3 a4
1869 */
1870
1871ENTRY(kernel_execve)
1872 entry a1, 16
1873 mov a6, a2 # arg0 is in a6
1874 movi a2, __NR_execve
1875 syscall
1876
1877 retw
1878
1879/*
1880 * Task switch. 1836 * Task switch.
1881 * 1837 *
1882 * struct task* _switch_to (struct task* prev, struct task* next) 1838 * struct task* _switch_to (struct task* prev, struct task* next)
@@ -1958,3 +1914,16 @@ ENTRY(ret_from_fork)
1958 1914
1959 j common_exception_return 1915 j common_exception_return
1960 1916
1917/*
1918 * Kernel thread creation helper
1919 * On entry, set up by copy_thread: a2 = thread_fn, a3 = thread_fn arg
1920 * left from _switch_to: a6 = prev
1921 */
1922ENTRY(ret_from_kernel_thread)
1923
1924 call4 schedule_tail
1925 mov a6, a3
1926 callx4 a2
1927 j common_exception_return
1928
1929ENDPROC(ret_from_kernel_thread)
diff --git a/arch/xtensa/kernel/process.c b/arch/xtensa/kernel/process.c
index 1908f6642d31..09ae7bfab9a7 100644
--- a/arch/xtensa/kernel/process.c
+++ b/arch/xtensa/kernel/process.c
@@ -45,6 +45,7 @@
45#include <asm/regs.h> 45#include <asm/regs.h>
46 46
47extern void ret_from_fork(void); 47extern void ret_from_fork(void);
48extern void ret_from_kernel_thread(void);
48 49
49struct task_struct *current_set[NR_CPUS] = {&init_task, }; 50struct task_struct *current_set[NR_CPUS] = {&init_task, };
50 51
@@ -158,18 +159,30 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
158/* 159/*
159 * Copy thread. 160 * Copy thread.
160 * 161 *
162 * There are two modes in which this function is called:
163 * 1) Userspace thread creation,
164 * regs != NULL, usp_thread_fn is userspace stack pointer.
165 * It is expected to copy parent regs (in case CLONE_VM is not set
166 * in the clone_flags) and set up passed usp in the childregs.
167 * 2) Kernel thread creation,
168 * regs == NULL, usp_thread_fn is the function to run in the new thread
169 * and thread_fn_arg is its parameter.
170 * childregs are not used for the kernel threads.
171 *
161 * The stack layout for the new thread looks like this: 172 * The stack layout for the new thread looks like this:
162 * 173 *
163 * +------------------------+ <- sp in childregs (= tos) 174 * +------------------------+
164 * | childregs | 175 * | childregs |
165 * +------------------------+ <- thread.sp = sp in dummy-frame 176 * +------------------------+ <- thread.sp = sp in dummy-frame
166 * | dummy-frame | (saved in dummy-frame spill-area) 177 * | dummy-frame | (saved in dummy-frame spill-area)
167 * +------------------------+ 178 * +------------------------+
168 * 179 *
169 * We create a dummy frame to return to ret_from_fork: 180 * We create a dummy frame to return to either ret_from_fork or
170 * a0 points to ret_from_fork (simulating a call4) 181 * ret_from_kernel_thread:
182 * a0 points to ret_from_fork/ret_from_kernel_thread (simulating a call4)
171 * sp points to itself (thread.sp) 183 * sp points to itself (thread.sp)
172 * a2, a3 are unused. 184 * a2, a3 are unused for userspace threads,
185 * a2 points to thread_fn, a3 holds thread_fn arg for kernel threads.
173 * 186 *
174 * Note: This is a pristine frame, so we don't need any spill region on top of 187 * Note: This is a pristine frame, so we don't need any spill region on top of
175 * childregs. 188 * childregs.
@@ -185,43 +198,63 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
185 * involved. Much simpler to just not copy those live frames across. 198 * involved. Much simpler to just not copy those live frames across.
186 */ 199 */
187 200
188int copy_thread(unsigned long clone_flags, unsigned long usp, 201int copy_thread(unsigned long clone_flags, unsigned long usp_thread_fn,
189 unsigned long unused, 202 unsigned long thread_fn_arg,
190 struct task_struct * p, struct pt_regs * regs) 203 struct task_struct *p, struct pt_regs *unused)
191{ 204{
192 struct pt_regs *childregs; 205 struct pt_regs *childregs = task_pt_regs(p);
193 unsigned long tos;
194 int user_mode = user_mode(regs);
195 206
196#if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS) 207#if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS)
197 struct thread_info *ti; 208 struct thread_info *ti;
198#endif 209#endif
199 210
200 /* Set up new TSS. */
201 tos = (unsigned long)task_stack_page(p) + THREAD_SIZE;
202 if (user_mode)
203 childregs = (struct pt_regs*)(tos - PT_USER_SIZE);
204 else
205 childregs = (struct pt_regs*)tos - 1;
206
207 /* This does not copy all the regs. In a bout of brilliance or madness,
208 ARs beyond a0-a15 exist past the end of the struct. */
209 *childregs = *regs;
210
211 /* Create a call4 dummy-frame: a0 = 0, a1 = childregs. */ 211 /* Create a call4 dummy-frame: a0 = 0, a1 = childregs. */
212 *((int*)childregs - 3) = (unsigned long)childregs; 212 *((int*)childregs - 3) = (unsigned long)childregs;
213 *((int*)childregs - 4) = 0; 213 *((int*)childregs - 4) = 0;
214 214
215 childregs->areg[2] = 0;
216 p->set_child_tid = p->clear_child_tid = NULL;
217 p->thread.ra = MAKE_RA_FOR_CALL((unsigned long)ret_from_fork, 0x1);
218 p->thread.sp = (unsigned long)childregs; 215 p->thread.sp = (unsigned long)childregs;
219 216
220 if (user_mode(regs)) { 217 if (!(p->flags & PF_KTHREAD)) {
218 struct pt_regs *regs = current_pt_regs();
219 unsigned long usp = usp_thread_fn ?
220 usp_thread_fn : regs->areg[1];
221 221
222 p->thread.ra = MAKE_RA_FOR_CALL(
223 (unsigned long)ret_from_fork, 0x1);
224
225 /* This does not copy all the regs.
226 * In a bout of brilliance or madness,
227 * ARs beyond a0-a15 exist past the end of the struct.
228 */
229 *childregs = *regs;
222 childregs->areg[1] = usp; 230 childregs->areg[1] = usp;
231 childregs->areg[2] = 0;
232
233 /* When sharing memory with the parent thread, the child
234 usually starts on a pristine stack, so we have to reset
235 windowbase, windowstart and wmask.
236 (Note that such a new thread is required to always create
237 an initial call4 frame)
238 The exception is vfork, where the new thread continues to
239 run on the parent's stack until it calls execve. This could
240 be a call8 or call12, which requires a legal stack frame
241 of the previous caller for the overflow handlers to work.
242 (Note that it's always legal to overflow live registers).
243 In this case, ensure to spill at least the stack pointer
244 of that frame. */
245
223 if (clone_flags & CLONE_VM) { 246 if (clone_flags & CLONE_VM) {
224 childregs->wmask = 1; /* can't share live windows */ 247 /* check that caller window is live and same stack */
248 int len = childregs->wmask & ~0xf;
249 if (regs->areg[1] == usp && len != 0) {
250 int callinc = (regs->areg[0] >> 30) & 3;
251 int caller_ars = XCHAL_NUM_AREGS - callinc * 4;
252 put_user(regs->areg[caller_ars+1],
253 (unsigned __user*)(usp - 12));
254 }
255 childregs->wmask = 1;
256 childregs->windowstart = 1;
257 childregs->windowbase = 0;
225 } else { 258 } else {
226 int len = childregs->wmask & ~0xf; 259 int len = childregs->wmask & ~0xf;
227 memcpy(&childregs->areg[XCHAL_NUM_AREGS - len/4], 260 memcpy(&childregs->areg[XCHAL_NUM_AREGS - len/4],
@@ -230,11 +263,19 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
230// FIXME: we need to set THREADPTR in thread_info... 263// FIXME: we need to set THREADPTR in thread_info...
231 if (clone_flags & CLONE_SETTLS) 264 if (clone_flags & CLONE_SETTLS)
232 childregs->areg[2] = childregs->areg[6]; 265 childregs->areg[2] = childregs->areg[6];
233
234 } else { 266 } else {
235 /* In kernel space, we start a new thread with a new stack. */ 267 p->thread.ra = MAKE_RA_FOR_CALL(
236 childregs->wmask = 1; 268 (unsigned long)ret_from_kernel_thread, 1);
237 childregs->areg[1] = tos; 269
270 /* pass parameters to ret_from_kernel_thread:
271 * a2 = thread_fn, a3 = thread_fn arg
272 */
273 *((int *)childregs - 1) = thread_fn_arg;
274 *((int *)childregs - 2) = usp_thread_fn;
275
276 /* Childregs are only used when we're going to userspace
277 * in which case start_thread will set them up.
278 */
238 } 279 }
239 280
240#if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS) 281#if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS)
@@ -330,32 +371,5 @@ long xtensa_clone(unsigned long clone_flags, unsigned long newsp,
330 void __user *child_tid, long a5, 371 void __user *child_tid, long a5,
331 struct pt_regs *regs) 372 struct pt_regs *regs)
332{ 373{
333 if (!newsp)
334 newsp = regs->areg[1];
335 return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid); 374 return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
336} 375}
337
338/*
339 * xtensa_execve() executes a new program.
340 */
341
342asmlinkage
343long xtensa_execve(const char __user *name,
344 const char __user *const __user *argv,
345 const char __user *const __user *envp,
346 long a3, long a4, long a5,
347 struct pt_regs *regs)
348{
349 long error;
350 struct filename *filename;
351
352 filename = getname(name);
353 error = PTR_ERR(filename);
354 if (IS_ERR(filename))
355 goto out;
356 error = do_execve(filename->name, argv, envp, regs);
357 putname(filename);
358out:
359 return error;
360}
361
diff --git a/arch/xtensa/kernel/syscall.c b/arch/xtensa/kernel/syscall.c
index a5c01e74d5d5..5702065f472a 100644
--- a/arch/xtensa/kernel/syscall.c
+++ b/arch/xtensa/kernel/syscall.c
@@ -32,10 +32,8 @@ typedef void (*syscall_t)(void);
32syscall_t sys_call_table[__NR_syscall_count] /* FIXME __cacheline_aligned */= { 32syscall_t sys_call_table[__NR_syscall_count] /* FIXME __cacheline_aligned */= {
33 [0 ... __NR_syscall_count - 1] = (syscall_t)&sys_ni_syscall, 33 [0 ... __NR_syscall_count - 1] = (syscall_t)&sys_ni_syscall,
34 34
35#undef __SYSCALL
36#define __SYSCALL(nr,symbol,nargs) [ nr ] = (syscall_t)symbol, 35#define __SYSCALL(nr,symbol,nargs) [ nr ] = (syscall_t)symbol,
37#undef __KERNEL_SYSCALLS__ 36#include <uapi/asm/unistd.h>
38#include <asm/unistd.h>
39}; 37};
40 38
41asmlinkage long xtensa_shmat(int shmid, char __user *shmaddr, int shmflg) 39asmlinkage long xtensa_shmat(int shmid, char __user *shmaddr, int shmflg)
@@ -49,7 +47,8 @@ asmlinkage long xtensa_shmat(int shmid, char __user *shmaddr, int shmflg)
49 return (long)ret; 47 return (long)ret;
50} 48}
51 49
52asmlinkage long xtensa_fadvise64_64(int fd, int advice, unsigned long long offset, unsigned long long len) 50asmlinkage long xtensa_fadvise64_64(int fd, int advice,
51 unsigned long long offset, unsigned long long len)
53{ 52{
54 return sys_fadvise64_64(fd, offset, len, advice); 53 return sys_fadvise64_64(fd, offset, len, advice);
55} 54}
diff --git a/arch/xtensa/kernel/xtensa_ksyms.c b/arch/xtensa/kernel/xtensa_ksyms.c
index a8b9f1fd1e17..afe058b24e6e 100644
--- a/arch/xtensa/kernel/xtensa_ksyms.c
+++ b/arch/xtensa/kernel/xtensa_ksyms.c
@@ -43,7 +43,6 @@ EXPORT_SYMBOL(__strncpy_user);
43EXPORT_SYMBOL(clear_page); 43EXPORT_SYMBOL(clear_page);
44EXPORT_SYMBOL(copy_page); 44EXPORT_SYMBOL(copy_page);
45 45
46EXPORT_SYMBOL(kernel_thread);
47EXPORT_SYMBOL(empty_zero_page); 46EXPORT_SYMBOL(empty_zero_page);
48 47
49/* 48/*