5 files changed, 71 insertions, 5 deletions
diff --git a/arch/powerpc/boot/44x.c b/arch/powerpc/boot/44x.c
index bc3f570ff9ba..9f64e840bef6 100644
--- a/arch/powerpc/boot/44x.c
+++ b/arch/powerpc/boot/44x.c
@@ -54,3 +54,32 @@ void ibm44x_dbcr_reset(void)
                );
 }
+/* Read 4xx EBC bus bridge registers to get mappings of the peripheral
+ * banks into the OPB address space */
+void ibm4xx_fixup_ebc_ranges(const char *ebc)
+{
+        void *devp;
+        u32 bxcr;
+        u32 ranges[EBC_NUM_BANKS*4];
+        u32 *p = ranges;
+        int i;
+        for (i = 0; i < EBC_NUM_BANKS; i++) {
+                mtdcr(DCRN_EBC0_CFGADDR, EBC_BXCR(i));
+                bxcr = mfdcr(DCRN_EBC0_CFGDATA);
+                if ((bxcr & EBC_BXCR_BU) != EBC_BXCR_BU_OFF) {
+                        *p++ = i;
+                        *p++ = 0;
+                        *p++ = bxcr & EBC_BXCR_BAS;
+                        *p++ = EBC_BXCR_BANK_SIZE(bxcr);
+                }
+        }
+        devp = finddevice(ebc);
+        if (! devp)
+                fatal("Couldn't locate EBC node %s\n\r", ebc);
+        setprop(devp, "ranges", ranges, (p - ranges) * sizeof(u32));
+}
diff --git a/arch/powerpc/boot/44x.h b/arch/powerpc/boot/44x.h
index 0da4abf390ad..577982c9a3cd 100644
--- a/arch/powerpc/boot/44x.h
+++ b/arch/powerpc/boot/44x.h
@@ -11,6 +11,7 @@
 #define _PPC_BOOT_44X_H_
 void ibm44x_fixup_memsize(void);
+void ibm4xx_fixup_ebc_ranges(const char *ebc);
 void ibm44x_dbcr_reset(void);
 void ebony_init(void *mac0, void *mac1);
diff --git a/arch/powerpc/boot/dcr.h b/arch/powerpc/boot/dcr.h
index 877bc97b1e97..14b44aa96fea 100644
--- a/arch/powerpc/boot/dcr.h
+++ b/arch/powerpc/boot/dcr.h
@@ -26,6 +26,43 @@ static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR, SDRAM0_B2C
 #define                 SDRAM_CONFIG_BANK_SIZE(reg)     \
        (0x00400000 << ((reg & SDRAM_CONFIG_SIZE_MASK) >> 17))
+/* 440GP External Bus Controller (EBC) */
+#define DCRN_EBC0_CFGADDR                               0x012
+#define DCRN_EBC0_CFGDATA                               0x013
+#define   EBC_NUM_BANKS                                   8
+#define   EBC_B0CR                                        0x00
+#define   EBC_B1CR                                        0x01
+#define   EBC_B2CR                                        0x02
+#define   EBC_B3CR                                        0x03
+#define   EBC_B4CR                                        0x04
+#define   EBC_B5CR                                        0x05
+#define   EBC_B6CR                                        0x06
+#define   EBC_B7CR                                        0x07
+#define   EBC_BXCR(n)                                     (n)
+#define     EBC_BXCR_BAS                                    0xfff00000
+#define     EBC_BXCR_BS                                     0x000e0000
+#define     EBC_BXCR_BANK_SIZE(reg) \
+        (0x100000 << (((reg) & EBC_BXCR_BS) >> 17))
+#define     EBC_BXCR_BU                                     0x00018000
+#define       EBC_BXCR_BU_OFF                                 0x00000000
+#define       EBC_BXCR_BU_RO                                  0x00008000
+#define       EBC_BXCR_BU_WO                                  0x00010000
+#define       EBC_BXCR_BU_RW                                  0x00018000
+#define     EBC_BXCR_BW                                     0x00006000
+#define   EBC_B0AP                                        0x10
+#define   EBC_B1AP                                        0x11
+#define   EBC_B2AP                                        0x12
+#define   EBC_B3AP                                        0x13
+#define   EBC_B4AP                                        0x14
+#define   EBC_B5AP                                        0x15
+#define   EBC_B6AP                                        0x16
+#define   EBC_B7AP                                        0x17
+#define   EBC_BXAP(n)                                     (0x10+(n))
+#define   EBC_BEAR                                        0x20
+#define   EBC_BESR                                        0x21
+#define   EBC_CFG                                         0x23
+#define   EBC_CID                                         0x24
 /* 440GP Clock, PM, chip control */
 #define DCRN_CPC0_SR                                    0x0b0
 #define DCRN_CPC0_ER                                    0x0b1
diff --git a/arch/powerpc/boot/dts/ebony.dts b/arch/powerpc/boot/dts/ebony.dts
index 0ec02f4726b5..586a2fc13c63 100644
--- a/arch/powerpc/boot/dts/ebony.dts
+++ b/arch/powerpc/boot/dts/ebony.dts
@@ -135,11 +135,9 @@
                                #address-cells = <2>;
                                #size-cells = <1>;
                                clock-frequency = <0>; // Filled in by zImage
-                                ranges = <0 00000000 fff00000 100000
+                                // ranges property is supplied by zImage
-                                          1 00000000 48000000 100000
+                                // based on firmware's configuration of the
-                                          2 00000000 ff800000 400000
+                                // EBC bridge
-                                          3 00000000 48200000 100000
-                                          7 00000000 48300000 100000>;
                                interrupts = <5 4>;
                                interrupt-parent = <&UIC1>;
diff --git a/arch/powerpc/boot/ebony.c b/arch/powerpc/boot/ebony.c
index 634985802006..75daedafd0a4 100644
--- a/arch/powerpc/boot/ebony.c
+++ b/arch/powerpc/boot/ebony.c
@@ -100,6 +100,7 @@ static void ebony_fixups(void)
        ibm440gp_fixup_clocks(sysclk, 6 * 1843200);
        ibm44x_fixup_memsize();
        dt_fixup_mac_addresses(ebony_mac0, ebony_mac1);
+        ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
 }
 void ebony_init(void *mac0, void *mac1)

diff --git a/arch/powerpc/boot/44x.c b/arch/powerpc/boot/44x.c index bc3f570ff9ba..9f64e840bef6 100644 --- a/arch/powerpc/boot/44x.c +++ b/arch/powerpc/boot/44x.c
@@ -54,3 +54,32 @@ void ibm44x_dbcr_reset(void)
54	);	54	);
55		55
56	}	56	}
		57
		58	/* Read 4xx EBC bus bridge registers to get mappings of the peripheral
		59	* banks into the OPB address space */
		60	void ibm4xx_fixup_ebc_ranges(const char *ebc)
		61	{
		62	void *devp;
		63	u32 bxcr;
		64	u32 ranges[EBC_NUM_BANKS*4];
		65	u32 *p = ranges;
		66	int i;
		67
		68	for (i = 0; i < EBC_NUM_BANKS; i++) {
		69	mtdcr(DCRN_EBC0_CFGADDR, EBC_BXCR(i));
		70	bxcr = mfdcr(DCRN_EBC0_CFGDATA);
		71
		72	if ((bxcr & EBC_BXCR_BU) != EBC_BXCR_BU_OFF) {
		73	*p++ = i;
		74	*p++ = 0;
		75	*p++ = bxcr & EBC_BXCR_BAS;
		76	*p++ = EBC_BXCR_BANK_SIZE(bxcr);
		77	}
		78	}
		79
		80	devp = finddevice(ebc);
		81	if (! devp)
		82	fatal("Couldn't locate EBC node %s\n\r", ebc);
		83
		84	setprop(devp, "ranges", ranges, (p - ranges) * sizeof(u32));
		85	}


diff --git a/arch/powerpc/boot/44x.h b/arch/powerpc/boot/44x.h index 0da4abf390ad..577982c9a3cd 100644 --- a/arch/powerpc/boot/44x.h +++ b/arch/powerpc/boot/44x.h
@@ -11,6 +11,7 @@
11	#define _PPC_BOOT_44X_H_	11	#define _PPC_BOOT_44X_H_
12		12
13	void ibm44x_fixup_memsize(void);	13	void ibm44x_fixup_memsize(void);
		14	void ibm4xx_fixup_ebc_ranges(const char *ebc);
14		15
15	void ibm44x_dbcr_reset(void);	16	void ibm44x_dbcr_reset(void);
16	void ebony_init(void mac0, void mac1);	17	void ebony_init(void mac0, void mac1);


diff --git a/arch/powerpc/boot/dcr.h b/arch/powerpc/boot/dcr.h index 877bc97b1e97..14b44aa96fea 100644 --- a/arch/powerpc/boot/dcr.h +++ b/arch/powerpc/boot/dcr.h
@@ -26,6 +26,43 @@ static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR, SDRAM0_B2C
26	#define SDRAM_CONFIG_BANK_SIZE(reg) \	26	#define SDRAM_CONFIG_BANK_SIZE(reg) \
27	(0x00400000 << ((reg & SDRAM_CONFIG_SIZE_MASK) >> 17))	27	(0x00400000 << ((reg & SDRAM_CONFIG_SIZE_MASK) >> 17))
28		28
		29	/* 440GP External Bus Controller (EBC) */
		30	#define DCRN_EBC0_CFGADDR 0x012
		31	#define DCRN_EBC0_CFGDATA 0x013
		32	#define EBC_NUM_BANKS 8
		33	#define EBC_B0CR 0x00
		34	#define EBC_B1CR 0x01
		35	#define EBC_B2CR 0x02
		36	#define EBC_B3CR 0x03
		37	#define EBC_B4CR 0x04
		38	#define EBC_B5CR 0x05
		39	#define EBC_B6CR 0x06
		40	#define EBC_B7CR 0x07
		41	#define EBC_BXCR(n) (n)
		42	#define EBC_BXCR_BAS 0xfff00000
		43	#define EBC_BXCR_BS 0x000e0000
		44	#define EBC_BXCR_BANK_SIZE(reg) \
		45	(0x100000 << (((reg) & EBC_BXCR_BS) >> 17))
		46	#define EBC_BXCR_BU 0x00018000
		47	#define EBC_BXCR_BU_OFF 0x00000000
		48	#define EBC_BXCR_BU_RO 0x00008000
		49	#define EBC_BXCR_BU_WO 0x00010000
		50	#define EBC_BXCR_BU_RW 0x00018000
		51	#define EBC_BXCR_BW 0x00006000
		52	#define EBC_B0AP 0x10
		53	#define EBC_B1AP 0x11
		54	#define EBC_B2AP 0x12
		55	#define EBC_B3AP 0x13
		56	#define EBC_B4AP 0x14
		57	#define EBC_B5AP 0x15
		58	#define EBC_B6AP 0x16
		59	#define EBC_B7AP 0x17
		60	#define EBC_BXAP(n) (0x10+(n))
		61	#define EBC_BEAR 0x20
		62	#define EBC_BESR 0x21
		63	#define EBC_CFG 0x23
		64	#define EBC_CID 0x24
		65
29	/* 440GP Clock, PM, chip control */	66	/* 440GP Clock, PM, chip control */
30	#define DCRN_CPC0_SR 0x0b0	67	#define DCRN_CPC0_SR 0x0b0
31	#define DCRN_CPC0_ER 0x0b1	68	#define DCRN_CPC0_ER 0x0b1


diff --git a/arch/powerpc/boot/dts/ebony.dts b/arch/powerpc/boot/dts/ebony.dts index 0ec02f4726b5..586a2fc13c63 100644 --- a/arch/powerpc/boot/dts/ebony.dts +++ b/arch/powerpc/boot/dts/ebony.dts
@@ -135,11 +135,9 @@
135	#address-cells = <2>;	135	#address-cells = <2>;
136	#size-cells = <1>;	136	#size-cells = <1>;
137	clock-frequency = <0>; // Filled in by zImage	137	clock-frequency = <0>; // Filled in by zImage
138	ranges = <0 00000000 fff00000 100000	138	// ranges property is supplied by zImage
139	1 00000000 48000000 100000	139	// based on firmware's configuration of the
140	2 00000000 ff800000 400000	140	// EBC bridge
141	3 00000000 48200000 100000
142	7 00000000 48300000 100000>;
143	interrupts = <5 4>;	141	interrupts = <5 4>;
144	interrupt-parent = <&UIC1>;	142	interrupt-parent = <&UIC1>;
145		143


diff --git a/arch/powerpc/boot/ebony.c b/arch/powerpc/boot/ebony.c index 634985802006..75daedafd0a4 100644 --- a/arch/powerpc/boot/ebony.c +++ b/arch/powerpc/boot/ebony.c
@@ -100,6 +100,7 @@ static void ebony_fixups(void)
100	ibm440gp_fixup_clocks(sysclk, 6 * 1843200);	100	ibm440gp_fixup_clocks(sysclk, 6 * 1843200);
101	ibm44x_fixup_memsize();	101	ibm44x_fixup_memsize();
102	dt_fixup_mac_addresses(ebony_mac0, ebony_mac1);	102	dt_fixup_mac_addresses(ebony_mac0, ebony_mac1);
		103	ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
103	}	104	}
104		105
105	void ebony_init(void mac0, void mac1)	106	void ebony_init(void mac0, void mac1)