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-rw-r--r--arch/alpha/kernel/osf_sys.c6
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/boot/compressed/head.S14
-rw-r--r--arch/arm/common/timer-sp.c2
-rw-r--r--arch/arm/include/asm/dma-mapping.h1
-rw-r--r--arch/arm/mach-davinci/dm644x.c3
-rw-r--r--arch/arm/mach-dove/include/mach/pm.h2
-rw-r--r--arch/arm/mach-dove/irq.c14
-rw-r--r--arch/arm/mach-exynos/dma.c3
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h1
-rw-r--r--arch/arm/mach-ixp4xx/common-pci.c1
-rw-r--r--arch/arm/mach-ixp4xx/common.c13
-rw-r--r--arch/arm/mach-ixp4xx/goramo_mlr.c3
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/debug-macro.S4
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h46
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/qmgr.h12
-rw-r--r--arch/arm/mach-ixp4xx/ixp4xx_npe.c9
-rw-r--r--arch/arm/mach-ixp4xx/ixp4xx_qmgr.c12
-rw-r--r--arch/arm/mach-kirkwood/pcie.c11
-rw-r--r--arch/arm/mach-omap2/Makefile2
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c5
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c22
-rw-r--r--arch/arm/mach-omap2/common-board-devices.c34
-rw-r--r--arch/arm/mach-omap2/devices.c4
-rw-r--r--arch/arm/mach-omap2/iommu2.c361
-rw-r--r--arch/arm/mach-omap2/omap-iommu.c169
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c6
-rw-r--r--arch/arm/mach-omap2/twl-common.c1
-rw-r--r--arch/arm/mm/proc-v6.S2
-rw-r--r--arch/arm/plat-omap/i2c.c21
-rw-r--r--arch/arm/plat-omap/include/plat/iommu.h221
-rw-r--r--arch/arm/plat-omap/include/plat/iommu2.h96
-rw-r--r--arch/arm/plat-omap/include/plat/iopgtable.h120
-rw-r--r--arch/arm/plat-omap/include/plat/iovmm.h89
-rw-r--r--arch/arm/plat-s3c24xx/dma.c9
-rw-r--r--arch/arm64/include/asm/dma-mapping.h1
-rw-r--r--arch/arm64/include/asm/unistd32.h2
-rw-r--r--arch/c6x/include/asm/dma-mapping.h1
-rw-r--r--arch/c6x/include/asm/setup.h33
-rw-r--r--arch/c6x/include/uapi/asm/Kbuild2
-rw-r--r--arch/c6x/include/uapi/asm/kvm_para.h1
-rw-r--r--arch/c6x/include/uapi/asm/setup.h33
-rw-r--r--arch/c6x/kernel/entry.S5
-rw-r--r--arch/ia64/include/asm/dma-mapping.h1
-rw-r--r--arch/m68k/include/asm/signal.h6
-rw-r--r--arch/microblaze/include/asm/dma-mapping.h2
-rw-r--r--arch/microblaze/kernel/signal.c2
-rw-r--r--arch/mips/include/asm/dma-mapping.h2
-rw-r--r--arch/mips/include/asm/hugetlb.h12
-rw-r--r--arch/mips/kernel/cpu-probe.c1
-rw-r--r--arch/mips/kernel/entry.S7
-rw-r--r--arch/mips/kernel/scall64-n32.S6
-rw-r--r--arch/mips/kernel/setup.c26
-rw-r--r--arch/mips/lib/mips-atomic.c8
-rw-r--r--arch/mips/mm/tlb-r4k.c18
-rw-r--r--arch/openrisc/kernel/signal.c6
-rw-r--r--arch/parisc/kernel/signal32.c6
-rw-r--r--arch/parisc/kernel/sys_parisc.c2
-rw-r--r--arch/parisc/kernel/syscall_table.S2
-rw-r--r--arch/powerpc/boot/dts/mpc5200b.dtsi6
-rw-r--r--arch/powerpc/boot/dts/o2d.dtsi6
-rw-r--r--arch/powerpc/boot/dts/pcm030.dts7
-rw-r--r--arch/powerpc/include/asm/dma-mapping.h1
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_pic.c9
-rw-r--r--arch/powerpc/platforms/pseries/eeh_pe.c2
-rw-r--r--arch/powerpc/platforms/pseries/msi.c3
-rw-r--r--arch/s390/kernel/compat_wrapper.S2
-rw-r--r--arch/score/kernel/signal.c7
-rw-r--r--arch/sh/include/asm/dma-mapping.h1
-rw-r--r--arch/sh/kernel/signal_64.c6
-rw-r--r--arch/sparc/boot/piggyback.c12
-rw-r--r--arch/sparc/include/asm/dma-mapping.h1
-rw-r--r--arch/sparc/include/asm/prom.h5
-rw-r--r--arch/sparc/kernel/signal_64.c4
-rw-r--r--arch/sparc/kernel/sys32.S2
-rw-r--r--arch/sparc/kernel/syscalls.S14
-rw-r--r--arch/sparc/kernel/systbls_64.S2
-rw-r--r--arch/tile/include/asm/dma-mapping.h1
-rw-r--r--arch/um/kernel/exec.c3
-rw-r--r--arch/x86/boot/compressed/eboot.c2
-rw-r--r--arch/x86/boot/header.S3
-rw-r--r--arch/x86/include/asm/Kbuild3
-rw-r--r--arch/x86/include/asm/dma-mapping.h1
-rw-r--r--arch/x86/include/asm/fpu-internal.h15
-rw-r--r--arch/x86/include/asm/ptrace.h15
-rw-r--r--arch/x86/kernel/cpu/amd.c14
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_amd.c2
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_intel.c31
-rw-r--r--arch/x86/kernel/entry_64.S14
-rw-r--r--arch/x86/kernel/head_32.S9
-rw-r--r--arch/x86/kernel/microcode_amd.c8
-rw-r--r--arch/x86/kernel/ptrace.c37
-rw-r--r--arch/x86/kernel/smpboot.c5
-rw-r--r--arch/x86/kvm/emulate.c3
-rw-r--r--arch/x86/mm/tlb.c2
-rw-r--r--arch/x86/pci/ce4100.c13
-rw-r--r--arch/x86/platform/ce4100/ce4100.c24
98 files changed, 506 insertions, 1296 deletions
diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c
index 1e6956a90608..14db93e4c8a8 100644
--- a/arch/alpha/kernel/osf_sys.c
+++ b/arch/alpha/kernel/osf_sys.c
@@ -445,7 +445,7 @@ struct procfs_args {
445 * unhappy with OSF UFS. [CHECKME] 445 * unhappy with OSF UFS. [CHECKME]
446 */ 446 */
447static int 447static int
448osf_ufs_mount(char *dirname, struct ufs_args __user *args, int flags) 448osf_ufs_mount(const char *dirname, struct ufs_args __user *args, int flags)
449{ 449{
450 int retval; 450 int retval;
451 struct cdfs_args tmp; 451 struct cdfs_args tmp;
@@ -465,7 +465,7 @@ osf_ufs_mount(char *dirname, struct ufs_args __user *args, int flags)
465} 465}
466 466
467static int 467static int
468osf_cdfs_mount(char *dirname, struct cdfs_args __user *args, int flags) 468osf_cdfs_mount(const char *dirname, struct cdfs_args __user *args, int flags)
469{ 469{
470 int retval; 470 int retval;
471 struct cdfs_args tmp; 471 struct cdfs_args tmp;
@@ -485,7 +485,7 @@ osf_cdfs_mount(char *dirname, struct cdfs_args __user *args, int flags)
485} 485}
486 486
487static int 487static int
488osf_procfs_mount(char *dirname, struct procfs_args __user *args, int flags) 488osf_procfs_mount(const char *dirname, struct procfs_args __user *args, int flags)
489{ 489{
490 struct procfs_args tmp; 490 struct procfs_args tmp;
491 491
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ade7e924bef5..9759fec0b704 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -547,6 +547,7 @@ config ARCH_KIRKWOOD
547 select CPU_FEROCEON 547 select CPU_FEROCEON
548 select GENERIC_CLOCKEVENTS 548 select GENERIC_CLOCKEVENTS
549 select PCI 549 select PCI
550 select PCI_QUIRKS
550 select PLAT_ORION_LEGACY 551 select PLAT_ORION_LEGACY
551 help 552 help
552 Support for the following Marvell Kirkwood series SoCs: 553 Support for the following Marvell Kirkwood series SoCs:
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 90275f036cd1..49ca86e37b8d 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -652,6 +652,15 @@ __setup_mmu: sub r3, r4, #16384 @ Page directory size
652 mov pc, lr 652 mov pc, lr
653ENDPROC(__setup_mmu) 653ENDPROC(__setup_mmu)
654 654
655@ Enable unaligned access on v6, to allow better code generation
656@ for the decompressor C code:
657__armv6_mmu_cache_on:
658 mrc p15, 0, r0, c1, c0, 0 @ read SCTLR
659 bic r0, r0, #2 @ A (no unaligned access fault)
660 orr r0, r0, #1 << 22 @ U (v6 unaligned access model)
661 mcr p15, 0, r0, c1, c0, 0 @ write SCTLR
662 b __armv4_mmu_cache_on
663
655__arm926ejs_mmu_cache_on: 664__arm926ejs_mmu_cache_on:
656#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH 665#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
657 mov r0, #4 @ put dcache in WT mode 666 mov r0, #4 @ put dcache in WT mode
@@ -694,6 +703,9 @@ __armv7_mmu_cache_on:
694 bic r0, r0, #1 << 28 @ clear SCTLR.TRE 703 bic r0, r0, #1 << 28 @ clear SCTLR.TRE
695 orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement 704 orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement
696 orr r0, r0, #0x003c @ write buffer 705 orr r0, r0, #0x003c @ write buffer
706 bic r0, r0, #2 @ A (no unaligned access fault)
707 orr r0, r0, #1 << 22 @ U (v6 unaligned access model)
708 @ (needed for ARM1176)
697#ifdef CONFIG_MMU 709#ifdef CONFIG_MMU
698#ifdef CONFIG_CPU_ENDIAN_BE8 710#ifdef CONFIG_CPU_ENDIAN_BE8
699 orr r0, r0, #1 << 25 @ big-endian page tables 711 orr r0, r0, #1 << 25 @ big-endian page tables
@@ -914,7 +926,7 @@ proc_types:
914 926
915 .word 0x0007b000 @ ARMv6 927 .word 0x0007b000 @ ARMv6
916 .word 0x000ff000 928 .word 0x000ff000
917 W(b) __armv4_mmu_cache_on 929 W(b) __armv6_mmu_cache_on
918 W(b) __armv4_mmu_cache_off 930 W(b) __armv4_mmu_cache_off
919 W(b) __armv6_mmu_cache_flush 931 W(b) __armv6_mmu_cache_flush
920 932
diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c
index df13a3ffff35..9d2d3ba339ff 100644
--- a/arch/arm/common/timer-sp.c
+++ b/arch/arm/common/timer-sp.c
@@ -162,7 +162,6 @@ static struct clock_event_device sp804_clockevent = {
162 .set_mode = sp804_set_mode, 162 .set_mode = sp804_set_mode,
163 .set_next_event = sp804_set_next_event, 163 .set_next_event = sp804_set_next_event,
164 .rating = 300, 164 .rating = 300,
165 .cpumask = cpu_all_mask,
166}; 165};
167 166
168static struct irqaction sp804_timer_irq = { 167static struct irqaction sp804_timer_irq = {
@@ -185,6 +184,7 @@ void __init sp804_clockevents_init(void __iomem *base, unsigned int irq,
185 clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ); 184 clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ);
186 evt->name = name; 185 evt->name = name;
187 evt->irq = irq; 186 evt->irq = irq;
187 evt->cpumask = cpu_possible_mask;
188 188
189 setup_irq(irq, &sp804_timer_irq); 189 setup_irq(irq, &sp804_timer_irq);
190 clockevents_config_and_register(evt, rate, 0xf, 0xffffffff); 190 clockevents_config_and_register(evt, rate, 0xf, 0xffffffff);
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 23004847bb05..78d8e9b5544f 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -91,6 +91,7 @@ static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
91 */ 91 */
92static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 92static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
93{ 93{
94 debug_dma_mapping_error(dev, dma_addr);
94 return dma_addr == DMA_ERROR_CODE; 95 return dma_addr == DMA_ERROR_CODE;
95} 96}
96 97
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index cd0c8b1e1ecf..14e9947bad6e 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -713,8 +713,7 @@ static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
713 break; 713 break;
714 case VPBE_ENC_CUSTOM_TIMINGS: 714 case VPBE_ENC_CUSTOM_TIMINGS:
715 if (pclock <= 27000000) { 715 if (pclock <= 27000000) {
716 v |= DM644X_VPSS_MUXSEL_PLL2_MODE | 716 v |= DM644X_VPSS_DACCLKEN;
717 DM644X_VPSS_DACCLKEN;
718 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); 717 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
719 } else { 718 } else {
720 /* 719 /*
diff --git a/arch/arm/mach-dove/include/mach/pm.h b/arch/arm/mach-dove/include/mach/pm.h
index 7bcd0dfce4b1..b47f75038686 100644
--- a/arch/arm/mach-dove/include/mach/pm.h
+++ b/arch/arm/mach-dove/include/mach/pm.h
@@ -63,7 +63,7 @@ static inline int pmu_to_irq(int pin)
63 63
64static inline int irq_to_pmu(int irq) 64static inline int irq_to_pmu(int irq)
65{ 65{
66 if (IRQ_DOVE_PMU_START < irq && irq < NR_IRQS) 66 if (IRQ_DOVE_PMU_START <= irq && irq < NR_IRQS)
67 return irq - IRQ_DOVE_PMU_START; 67 return irq - IRQ_DOVE_PMU_START;
68 68
69 return -EINVAL; 69 return -EINVAL;
diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
index 087711524e8a..bc4344aa1009 100644
--- a/arch/arm/mach-dove/irq.c
+++ b/arch/arm/mach-dove/irq.c
@@ -46,8 +46,20 @@ static void pmu_irq_ack(struct irq_data *d)
46 int pin = irq_to_pmu(d->irq); 46 int pin = irq_to_pmu(d->irq);
47 u32 u; 47 u32 u;
48 48
49 /*
50 * The PMU mask register is not RW0C: it is RW. This means that
51 * the bits take whatever value is written to them; if you write
52 * a '1', you will set the interrupt.
53 *
54 * Unfortunately this means there is NO race free way to clear
55 * these interrupts.
56 *
57 * So, let's structure the code so that the window is as small as
58 * possible.
59 */
49 u = ~(1 << (pin & 31)); 60 u = ~(1 << (pin & 31));
50 writel(u, PMU_INTERRUPT_CAUSE); 61 u &= readl_relaxed(PMU_INTERRUPT_CAUSE);
62 writel_relaxed(u, PMU_INTERRUPT_CAUSE);
51} 63}
52 64
53static struct irq_chip pmu_irq_chip = { 65static struct irq_chip pmu_irq_chip = {
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index 21d568b3b149..87e07d6fc615 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -275,6 +275,9 @@ static int __init exynos_dma_init(void)
275 exynos_pdma1_pdata.nr_valid_peri = 275 exynos_pdma1_pdata.nr_valid_peri =
276 ARRAY_SIZE(exynos4210_pdma1_peri); 276 ARRAY_SIZE(exynos4210_pdma1_peri);
277 exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri; 277 exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri;
278
279 if (samsung_rev() == EXYNOS4210_REV_0)
280 exynos_mdma1_device.res.start = EXYNOS4_PA_S_MDMA1;
278 } else if (soc_is_exynos4212() || soc_is_exynos4412()) { 281 } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
279 exynos_pdma0_pdata.nr_valid_peri = 282 exynos_pdma0_pdata.nr_valid_peri =
280 ARRAY_SIZE(exynos4212_pdma0_peri); 283 ARRAY_SIZE(exynos4212_pdma0_peri);
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 8480849affb9..ed4da4544cd2 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -90,6 +90,7 @@
90 90
91#define EXYNOS4_PA_MDMA0 0x10810000 91#define EXYNOS4_PA_MDMA0 0x10810000
92#define EXYNOS4_PA_MDMA1 0x12850000 92#define EXYNOS4_PA_MDMA1 0x12850000
93#define EXYNOS4_PA_S_MDMA1 0x12840000
93#define EXYNOS4_PA_PDMA0 0x12680000 94#define EXYNOS4_PA_PDMA0 0x12680000
94#define EXYNOS4_PA_PDMA1 0x12690000 95#define EXYNOS4_PA_PDMA1 0x12690000
95#define EXYNOS5_PA_MDMA0 0x10800000 96#define EXYNOS5_PA_MDMA0 0x10800000
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 1694f01ce2b6..6d6bde3e15fa 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -410,6 +410,7 @@ void __init ixp4xx_pci_preinit(void)
410 * Enable the IO window to be way up high, at 0xfffffc00 410 * Enable the IO window to be way up high, at 0xfffffc00
411 */ 411 */
412 local_write_config(PCI_BASE_ADDRESS_5, 4, 0xfffffc01); 412 local_write_config(PCI_BASE_ADDRESS_5, 4, 0xfffffc01);
413 local_write_config(0x40, 4, 0x000080FF); /* No TRDY time limit */
413 } else { 414 } else {
414 printk("PCI: IXP4xx is target - No bus scan performed\n"); 415 printk("PCI: IXP4xx is target - No bus scan performed\n");
415 } 416 }
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index fdf91a160884..8c0c0e2d0727 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -67,15 +67,12 @@ static struct map_desc ixp4xx_io_desc[] __initdata = {
67 .pfn = __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS), 67 .pfn = __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS),
68 .length = IXP4XX_PCI_CFG_REGION_SIZE, 68 .length = IXP4XX_PCI_CFG_REGION_SIZE,
69 .type = MT_DEVICE 69 .type = MT_DEVICE
70 }, 70 }, { /* Queue Manager */
71#ifdef CONFIG_DEBUG_LL 71 .virtual = (unsigned long)IXP4XX_QMGR_BASE_VIRT,
72 { /* Debug UART mapping */ 72 .pfn = __phys_to_pfn(IXP4XX_QMGR_BASE_PHYS),
73 .virtual = (unsigned long)IXP4XX_DEBUG_UART_BASE_VIRT, 73 .length = IXP4XX_QMGR_REGION_SIZE,
74 .pfn = __phys_to_pfn(IXP4XX_DEBUG_UART_BASE_PHYS),
75 .length = IXP4XX_DEBUG_UART_REGION_SIZE,
76 .type = MT_DEVICE 74 .type = MT_DEVICE
77 } 75 },
78#endif
79}; 76};
80 77
81void __init ixp4xx_map_io(void) 78void __init ixp4xx_map_io(void)
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index b800a031207c..53b8348dfcc2 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -15,6 +15,7 @@
15#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
16#include <asm/mach/flash.h> 16#include <asm/mach/flash.h>
17#include <asm/mach/pci.h> 17#include <asm/mach/pci.h>
18#include <asm/system_info.h>
18 19
19#define SLOT_ETHA 0x0B /* IDSEL = AD21 */ 20#define SLOT_ETHA 0x0B /* IDSEL = AD21 */
20#define SLOT_ETHB 0x0C /* IDSEL = AD20 */ 21#define SLOT_ETHB 0x0C /* IDSEL = AD20 */
@@ -329,7 +330,7 @@ static struct platform_device device_hss_tab[] = {
329}; 330};
330 331
331 332
332static struct platform_device *device_tab[6] __initdata = { 333static struct platform_device *device_tab[7] __initdata = {
333 &device_flash, /* index 0 */ 334 &device_flash, /* index 0 */
334}; 335};
335 336
diff --git a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
index 8c9f8d564492..ff686cbc5df4 100644
--- a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
@@ -17,8 +17,8 @@
17#else 17#else
18 mov \rp, #0 18 mov \rp, #0
19#endif 19#endif
20 orr \rv, \rp, #0xff000000 @ virtual 20 orr \rv, \rp, #0xfe000000 @ virtual
21 orr \rv, \rv, #0x00b00000 21 orr \rv, \rv, #0x00f00000
22 orr \rp, \rp, #0xc8000000 @ physical 22 orr \rp, \rp, #0xc8000000 @ physical
23 .endm 23 .endm
24 24
diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
index eb68b61ce975..c5bae9c035d5 100644
--- a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
@@ -30,51 +30,43 @@
30 * 30 *
31 * 0x50000000 0x10000000 ioremap'd EXP BUS 31 * 0x50000000 0x10000000 ioremap'd EXP BUS
32 * 32 *
33 * 0x6000000 0x00004000 ioremap'd QMgr 33 * 0xC8000000 0x00013000 0xFEF00000 On-Chip Peripherals
34 * 34 *
35 * 0xC0000000 0x00001000 0xffbff000 PCI CFG 35 * 0xC0000000 0x00001000 0xFEF13000 PCI CFG
36 * 36 *
37 * 0xC4000000 0x00001000 0xffbfe000 EXP CFG 37 * 0xC4000000 0x00001000 0xFEF14000 EXP CFG
38 * 38 *
39 * 0xC8000000 0x00013000 0xffbeb000 On-Chip Peripherals 39 * 0x60000000 0x00004000 0xFEF15000 QMgr
40 */ 40 */
41 41
42/* 42/*
43 * Queue Manager 43 * Queue Manager
44 */ 44 */
45#define IXP4XX_QMGR_BASE_PHYS (0x60000000) 45#define IXP4XX_QMGR_BASE_PHYS 0x60000000
46#define IXP4XX_QMGR_REGION_SIZE (0x00004000) 46#define IXP4XX_QMGR_BASE_VIRT IOMEM(0xFEF15000)
47#define IXP4XX_QMGR_REGION_SIZE 0x00004000
47 48
48/* 49/*
49 * Expansion BUS Configuration registers 50 * Peripheral space, including debug UART. Must be section-aligned so that
51 * it can be used with the low-level debug code.
50 */ 52 */
51#define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000) 53#define IXP4XX_PERIPHERAL_BASE_PHYS 0xC8000000
52#define IXP4XX_EXP_CFG_BASE_VIRT IOMEM(0xFFBFE000) 54#define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFEF00000)
53#define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000) 55#define IXP4XX_PERIPHERAL_REGION_SIZE 0x00013000
54 56
55/* 57/*
56 * PCI Config registers 58 * PCI Config registers
57 */ 59 */
58#define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000) 60#define IXP4XX_PCI_CFG_BASE_PHYS 0xC0000000
59#define IXP4XX_PCI_CFG_BASE_VIRT IOMEM(0xFFBFF000) 61#define IXP4XX_PCI_CFG_BASE_VIRT IOMEM(0xFEF13000)
60#define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000) 62#define IXP4XX_PCI_CFG_REGION_SIZE 0x00001000
61
62/*
63 * Peripheral space
64 */
65#define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000)
66#define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFFBEB000)
67#define IXP4XX_PERIPHERAL_REGION_SIZE (0x00013000)
68 63
69/* 64/*
70 * Debug UART 65 * Expansion BUS Configuration registers
71 *
72 * This is basically a remap of UART1 into a region that is section
73 * aligned so that it * can be used with the low-level debug code.
74 */ 66 */
75#define IXP4XX_DEBUG_UART_BASE_PHYS (0xC8000000) 67#define IXP4XX_EXP_CFG_BASE_PHYS 0xC4000000
76#define IXP4XX_DEBUG_UART_BASE_VIRT IOMEM(0xffb00000) 68#define IXP4XX_EXP_CFG_BASE_VIRT 0xFEF14000
77#define IXP4XX_DEBUG_UART_REGION_SIZE (0x00001000) 69#define IXP4XX_EXP_CFG_REGION_SIZE 0x00001000
78 70
79#define IXP4XX_EXP_CS0_OFFSET 0x00 71#define IXP4XX_EXP_CS0_OFFSET 0x00
80#define IXP4XX_EXP_CS1_OFFSET 0x04 72#define IXP4XX_EXP_CS1_OFFSET 0x04
diff --git a/arch/arm/mach-ixp4xx/include/mach/qmgr.h b/arch/arm/mach-ixp4xx/include/mach/qmgr.h
index 9e7cad2d54cb..4de8da536dbb 100644
--- a/arch/arm/mach-ixp4xx/include/mach/qmgr.h
+++ b/arch/arm/mach-ixp4xx/include/mach/qmgr.h
@@ -86,7 +86,7 @@ void qmgr_release_queue(unsigned int queue);
86 86
87static inline void qmgr_put_entry(unsigned int queue, u32 val) 87static inline void qmgr_put_entry(unsigned int queue, u32 val)
88{ 88{
89 extern struct qmgr_regs __iomem *qmgr_regs; 89 struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
90#if DEBUG_QMGR 90#if DEBUG_QMGR
91 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */ 91 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
92 92
@@ -99,7 +99,7 @@ static inline void qmgr_put_entry(unsigned int queue, u32 val)
99static inline u32 qmgr_get_entry(unsigned int queue) 99static inline u32 qmgr_get_entry(unsigned int queue)
100{ 100{
101 u32 val; 101 u32 val;
102 extern struct qmgr_regs __iomem *qmgr_regs; 102 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
103 val = __raw_readl(&qmgr_regs->acc[queue][0]); 103 val = __raw_readl(&qmgr_regs->acc[queue][0]);
104#if DEBUG_QMGR 104#if DEBUG_QMGR
105 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */ 105 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
@@ -112,14 +112,14 @@ static inline u32 qmgr_get_entry(unsigned int queue)
112 112
113static inline int __qmgr_get_stat1(unsigned int queue) 113static inline int __qmgr_get_stat1(unsigned int queue)
114{ 114{
115 extern struct qmgr_regs __iomem *qmgr_regs; 115 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
116 return (__raw_readl(&qmgr_regs->stat1[queue >> 3]) 116 return (__raw_readl(&qmgr_regs->stat1[queue >> 3])
117 >> ((queue & 7) << 2)) & 0xF; 117 >> ((queue & 7) << 2)) & 0xF;
118} 118}
119 119
120static inline int __qmgr_get_stat2(unsigned int queue) 120static inline int __qmgr_get_stat2(unsigned int queue)
121{ 121{
122 extern struct qmgr_regs __iomem *qmgr_regs; 122 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
123 BUG_ON(queue >= HALF_QUEUES); 123 BUG_ON(queue >= HALF_QUEUES);
124 return (__raw_readl(&qmgr_regs->stat2[queue >> 4]) 124 return (__raw_readl(&qmgr_regs->stat2[queue >> 4])
125 >> ((queue & 0xF) << 1)) & 0x3; 125 >> ((queue & 0xF) << 1)) & 0x3;
@@ -145,7 +145,7 @@ static inline int qmgr_stat_empty(unsigned int queue)
145 */ 145 */
146static inline int qmgr_stat_below_low_watermark(unsigned int queue) 146static inline int qmgr_stat_below_low_watermark(unsigned int queue)
147{ 147{
148 extern struct qmgr_regs __iomem *qmgr_regs; 148 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
149 if (queue >= HALF_QUEUES) 149 if (queue >= HALF_QUEUES)
150 return (__raw_readl(&qmgr_regs->statne_h) >> 150 return (__raw_readl(&qmgr_regs->statne_h) >>
151 (queue - HALF_QUEUES)) & 0x01; 151 (queue - HALF_QUEUES)) & 0x01;
@@ -172,7 +172,7 @@ static inline int qmgr_stat_above_high_watermark(unsigned int queue)
172 */ 172 */
173static inline int qmgr_stat_full(unsigned int queue) 173static inline int qmgr_stat_full(unsigned int queue)
174{ 174{
175 extern struct qmgr_regs __iomem *qmgr_regs; 175 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
176 if (queue >= HALF_QUEUES) 176 if (queue >= HALF_QUEUES)
177 return (__raw_readl(&qmgr_regs->statf_h) >> 177 return (__raw_readl(&qmgr_regs->statf_h) >>
178 (queue - HALF_QUEUES)) & 0x01; 178 (queue - HALF_QUEUES)) & 0x01;
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_npe.c b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
index a17ed79207a4..d4eb09a62863 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_npe.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
@@ -116,7 +116,11 @@
116/* NPE mailbox_status value for reset */ 116/* NPE mailbox_status value for reset */
117#define RESET_MBOX_STAT 0x0000F0F0 117#define RESET_MBOX_STAT 0x0000F0F0
118 118
119const char *npe_names[] = { "NPE-A", "NPE-B", "NPE-C" }; 119#define NPE_A_FIRMWARE "NPE-A"
120#define NPE_B_FIRMWARE "NPE-B"
121#define NPE_C_FIRMWARE "NPE-C"
122
123const char *npe_names[] = { NPE_A_FIRMWARE, NPE_B_FIRMWARE, NPE_C_FIRMWARE };
120 124
121#define print_npe(pri, npe, fmt, ...) \ 125#define print_npe(pri, npe, fmt, ...) \
122 printk(pri "%s: " fmt, npe_name(npe), ## __VA_ARGS__) 126 printk(pri "%s: " fmt, npe_name(npe), ## __VA_ARGS__)
@@ -724,6 +728,9 @@ module_exit(npe_cleanup_module);
724 728
725MODULE_AUTHOR("Krzysztof Halasa"); 729MODULE_AUTHOR("Krzysztof Halasa");
726MODULE_LICENSE("GPL v2"); 730MODULE_LICENSE("GPL v2");
731MODULE_FIRMWARE(NPE_A_FIRMWARE);
732MODULE_FIRMWARE(NPE_B_FIRMWARE);
733MODULE_FIRMWARE(NPE_C_FIRMWARE);
727 734
728EXPORT_SYMBOL(npe_names); 735EXPORT_SYMBOL(npe_names);
729EXPORT_SYMBOL(npe_running); 736EXPORT_SYMBOL(npe_running);
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
index 852f7c9f87d0..9d1b6b7c394c 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
@@ -14,7 +14,7 @@
14#include <linux/module.h> 14#include <linux/module.h>
15#include <mach/qmgr.h> 15#include <mach/qmgr.h>
16 16
17struct qmgr_regs __iomem *qmgr_regs; 17static struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
18static struct resource *mem_res; 18static struct resource *mem_res;
19static spinlock_t qmgr_lock; 19static spinlock_t qmgr_lock;
20static u32 used_sram_bitmap[4]; /* 128 16-dword pages */ 20static u32 used_sram_bitmap[4]; /* 128 16-dword pages */
@@ -293,12 +293,6 @@ static int qmgr_init(void)
293 if (mem_res == NULL) 293 if (mem_res == NULL)
294 return -EBUSY; 294 return -EBUSY;
295 295
296 qmgr_regs = ioremap(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
297 if (qmgr_regs == NULL) {
298 err = -ENOMEM;
299 goto error_map;
300 }
301
302 /* reset qmgr registers */ 296 /* reset qmgr registers */
303 for (i = 0; i < 4; i++) { 297 for (i = 0; i < 4; i++) {
304 __raw_writel(0x33333333, &qmgr_regs->stat1[i]); 298 __raw_writel(0x33333333, &qmgr_regs->stat1[i]);
@@ -347,8 +341,6 @@ static int qmgr_init(void)
347error_irq2: 341error_irq2:
348 free_irq(IRQ_IXP4XX_QM1, NULL); 342 free_irq(IRQ_IXP4XX_QM1, NULL);
349error_irq: 343error_irq:
350 iounmap(qmgr_regs);
351error_map:
352 release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE); 344 release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
353 return err; 345 return err;
354} 346}
@@ -359,7 +351,6 @@ static void qmgr_remove(void)
359 free_irq(IRQ_IXP4XX_QM2, NULL); 351 free_irq(IRQ_IXP4XX_QM2, NULL);
360 synchronize_irq(IRQ_IXP4XX_QM1); 352 synchronize_irq(IRQ_IXP4XX_QM1);
361 synchronize_irq(IRQ_IXP4XX_QM2); 353 synchronize_irq(IRQ_IXP4XX_QM2);
362 iounmap(qmgr_regs);
363 release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE); 354 release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
364} 355}
365 356
@@ -369,7 +360,6 @@ module_exit(qmgr_remove);
369MODULE_LICENSE("GPL v2"); 360MODULE_LICENSE("GPL v2");
370MODULE_AUTHOR("Krzysztof Halasa"); 361MODULE_AUTHOR("Krzysztof Halasa");
371 362
372EXPORT_SYMBOL(qmgr_regs);
373EXPORT_SYMBOL(qmgr_set_irq); 363EXPORT_SYMBOL(qmgr_set_irq);
374EXPORT_SYMBOL(qmgr_enable_irq); 364EXPORT_SYMBOL(qmgr_enable_irq);
375EXPORT_SYMBOL(qmgr_disable_irq); 365EXPORT_SYMBOL(qmgr_disable_irq);
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index ec544918b12c..74fc5a074fc4 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -207,14 +207,19 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
207 return 1; 207 return 1;
208} 208}
209 209
210/*
211 * The root complex has a hardwired class of PCI_CLASS_MEMORY_OTHER, when it
212 * is operating as a root complex this needs to be switched to
213 * PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on
214 * the device. Decoding setup is handled by the orion code.
215 */
210static void __devinit rc_pci_fixup(struct pci_dev *dev) 216static void __devinit rc_pci_fixup(struct pci_dev *dev)
211{ 217{
212 /*
213 * Prevent enumeration of root complex.
214 */
215 if (dev->bus->parent == NULL && dev->devfn == 0) { 218 if (dev->bus->parent == NULL && dev->devfn == 0) {
216 int i; 219 int i;
217 220
221 dev->class &= 0xff;
222 dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
218 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 223 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
219 dev->resource[i].start = 0; 224 dev->resource[i].start = 0;
220 dev->resource[i].end = 0; 225 dev->resource[i].end = 0;
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index fe40d9e488c9..d6721a7f4c3b 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -184,8 +184,6 @@ obj-$(CONFIG_HW_PERF_EVENTS) += pmu.o
184obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o 184obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o
185mailbox_mach-objs := mailbox.o 185mailbox_mach-objs := mailbox.o
186 186
187obj-$(CONFIG_OMAP_IOMMU) += iommu2.o
188
189iommu-$(CONFIG_OMAP_IOMMU) := omap-iommu.o 187iommu-$(CONFIG_OMAP_IOMMU) := omap-iommu.o
190obj-y += $(iommu-m) $(iommu-y) 188obj-y += $(iommu-m) $(iommu-y)
191 189
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 48d5e41dfbfa..378590694447 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -580,6 +580,11 @@ static void __init igep_wlan_bt_init(void)
580 } else 580 } else
581 return; 581 return;
582 582
583 /* Make sure that the GPIO pins are muxed correctly */
584 omap_mux_init_gpio(igep_wlan_bt_gpios[0].gpio, OMAP_PIN_OUTPUT);
585 omap_mux_init_gpio(igep_wlan_bt_gpios[1].gpio, OMAP_PIN_OUTPUT);
586 omap_mux_init_gpio(igep_wlan_bt_gpios[2].gpio, OMAP_PIN_OUTPUT);
587
583 err = gpio_request_array(igep_wlan_bt_gpios, 588 err = gpio_request_array(igep_wlan_bt_gpios,
584 ARRAY_SIZE(igep_wlan_bt_gpios)); 589 ARRAY_SIZE(igep_wlan_bt_gpios));
585 if (err) { 590 if (err) {
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 6efc30c961a5..067c486fe295 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -1316,16 +1316,6 @@ static struct clk dmic_fck = {
1316 .clkdm_name = "abe_clkdm", 1316 .clkdm_name = "abe_clkdm",
1317}; 1317};
1318 1318
1319static struct clk dsp_fck = {
1320 .name = "dsp_fck",
1321 .ops = &clkops_omap2_dflt,
1322 .enable_reg = OMAP4430_CM_TESLA_TESLA_CLKCTRL,
1323 .enable_bit = OMAP4430_MODULEMODE_HWCTRL,
1324 .clkdm_name = "tesla_clkdm",
1325 .parent = &dpll_iva_m4x2_ck,
1326 .recalc = &followparent_recalc,
1327};
1328
1329static struct clk dss_sys_clk = { 1319static struct clk dss_sys_clk = {
1330 .name = "dss_sys_clk", 1320 .name = "dss_sys_clk",
1331 .ops = &clkops_omap2_dflt, 1321 .ops = &clkops_omap2_dflt,
@@ -1696,16 +1686,6 @@ static struct clk i2c4_fck = {
1696 .recalc = &followparent_recalc, 1686 .recalc = &followparent_recalc,
1697}; 1687};
1698 1688
1699static struct clk ipu_fck = {
1700 .name = "ipu_fck",
1701 .ops = &clkops_omap2_dflt,
1702 .enable_reg = OMAP4430_CM_DUCATI_DUCATI_CLKCTRL,
1703 .enable_bit = OMAP4430_MODULEMODE_HWCTRL,
1704 .clkdm_name = "ducati_clkdm",
1705 .parent = &ducati_clk_mux_ck,
1706 .recalc = &followparent_recalc,
1707};
1708
1709static struct clk iss_ctrlclk = { 1689static struct clk iss_ctrlclk = {
1710 .name = "iss_ctrlclk", 1690 .name = "iss_ctrlclk",
1711 .ops = &clkops_omap2_dflt, 1691 .ops = &clkops_omap2_dflt,
@@ -3151,7 +3131,6 @@ static struct omap_clk omap44xx_clks[] = {
3151 CLK(NULL, "div_ts_ck", &div_ts_ck, CK_446X), 3131 CLK(NULL, "div_ts_ck", &div_ts_ck, CK_446X),
3152 CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X), 3132 CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X),
3153 CLK(NULL, "dmic_fck", &dmic_fck, CK_443X), 3133 CLK(NULL, "dmic_fck", &dmic_fck, CK_443X),
3154 CLK(NULL, "dsp_fck", &dsp_fck, CK_443X),
3155 CLK(NULL, "dss_sys_clk", &dss_sys_clk, CK_443X), 3134 CLK(NULL, "dss_sys_clk", &dss_sys_clk, CK_443X),
3156 CLK(NULL, "dss_tv_clk", &dss_tv_clk, CK_443X), 3135 CLK(NULL, "dss_tv_clk", &dss_tv_clk, CK_443X),
3157 CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, CK_443X), 3136 CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, CK_443X),
@@ -3183,7 +3162,6 @@ static struct omap_clk omap44xx_clks[] = {
3183 CLK(NULL, "i2c2_fck", &i2c2_fck, CK_443X), 3162 CLK(NULL, "i2c2_fck", &i2c2_fck, CK_443X),
3184 CLK(NULL, "i2c3_fck", &i2c3_fck, CK_443X), 3163 CLK(NULL, "i2c3_fck", &i2c3_fck, CK_443X),
3185 CLK(NULL, "i2c4_fck", &i2c4_fck, CK_443X), 3164 CLK(NULL, "i2c4_fck", &i2c4_fck, CK_443X),
3186 CLK(NULL, "ipu_fck", &ipu_fck, CK_443X),
3187 CLK(NULL, "iss_ctrlclk", &iss_ctrlclk, CK_443X), 3165 CLK(NULL, "iss_ctrlclk", &iss_ctrlclk, CK_443X),
3188 CLK(NULL, "iss_fck", &iss_fck, CK_443X), 3166 CLK(NULL, "iss_fck", &iss_fck, CK_443X),
3189 CLK(NULL, "iva_fck", &iva_fck, CK_443X), 3167 CLK(NULL, "iva_fck", &iva_fck, CK_443X),
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index 48daac2581b4..84551f205e46 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -64,30 +64,36 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
64 struct spi_board_info *spi_bi = &ads7846_spi_board_info; 64 struct spi_board_info *spi_bi = &ads7846_spi_board_info;
65 int err; 65 int err;
66 66
67 err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown"); 67 /*
68 if (err) { 68 * If a board defines get_pendown_state() function, request the pendown
69 pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err); 69 * GPIO and set the GPIO debounce time.
70 return; 70 * If a board does not define the get_pendown_state() function, then
71 } 71 * the ads7846 driver will setup the pendown GPIO itself.
72 */
73 if (board_pdata && board_pdata->get_pendown_state) {
74 err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown");
75 if (err) {
76 pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err);
77 return;
78 }
72 79
73 if (gpio_debounce) 80 if (gpio_debounce)
74 gpio_set_debounce(gpio_pendown, gpio_debounce); 81 gpio_set_debounce(gpio_pendown, gpio_debounce);
82
83 gpio_export(gpio_pendown, 0);
84 }
75 85
76 spi_bi->bus_num = bus_num; 86 spi_bi->bus_num = bus_num;
77 spi_bi->irq = gpio_to_irq(gpio_pendown); 87 spi_bi->irq = gpio_to_irq(gpio_pendown);
78 88
89 ads7846_config.gpio_pendown = gpio_pendown;
90
79 if (board_pdata) { 91 if (board_pdata) {
80 board_pdata->gpio_pendown = gpio_pendown; 92 board_pdata->gpio_pendown = gpio_pendown;
93 board_pdata->gpio_pendown_debounce = gpio_debounce;
81 spi_bi->platform_data = board_pdata; 94 spi_bi->platform_data = board_pdata;
82 if (board_pdata->get_pendown_state)
83 gpio_export(gpio_pendown, 0);
84 } else {
85 ads7846_config.gpio_pendown = gpio_pendown;
86 } 95 }
87 96
88 if (!board_pdata || (board_pdata && !board_pdata->get_pendown_state))
89 gpio_free(gpio_pendown);
90
91 spi_register_board_info(&ads7846_spi_board_info, 1); 97 spi_register_board_info(&ads7846_spi_board_info, 1);
92} 98}
93#else 99#else
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index c72b5a727720..787a996ec4eb 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -127,7 +127,7 @@ static struct platform_device omap2cam_device = {
127 127
128#if defined(CONFIG_IOMMU_API) 128#if defined(CONFIG_IOMMU_API)
129 129
130#include <plat/iommu.h> 130#include <linux/platform_data/iommu-omap.h>
131 131
132static struct resource omap3isp_resources[] = { 132static struct resource omap3isp_resources[] = {
133 { 133 {
@@ -214,7 +214,7 @@ static struct platform_device omap3isp_device = {
214}; 214};
215 215
216static struct omap_iommu_arch_data omap3_isp_iommu = { 216static struct omap_iommu_arch_data omap3_isp_iommu = {
217 .name = "isp", 217 .name = "mmu_isp",
218}; 218};
219 219
220int omap3_init_camera(struct isp_platform_data *pdata) 220int omap3_init_camera(struct isp_platform_data *pdata)
diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c
deleted file mode 100644
index eefc37912ef3..000000000000
--- a/arch/arm/mach-omap2/iommu2.c
+++ /dev/null
@@ -1,361 +0,0 @@
1/*
2 * omap iommu: omap2/3 architecture specific functions
3 *
4 * Copyright (C) 2008-2009 Nokia Corporation
5 *
6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>,
7 * Paul Mundt and Toshihiro Kobayashi
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/err.h>
15#include <linux/device.h>
16#include <linux/jiffies.h>
17#include <linux/module.h>
18#include <linux/slab.h>
19#include <linux/stringify.h>
20
21#include <plat/iommu.h>
22
23/*
24 * omap2 architecture specific register bit definitions
25 */
26#define IOMMU_ARCH_VERSION 0x00000011
27
28/* SYSCONF */
29#define MMU_SYS_IDLE_SHIFT 3
30#define MMU_SYS_IDLE_FORCE (0 << MMU_SYS_IDLE_SHIFT)
31#define MMU_SYS_IDLE_NONE (1 << MMU_SYS_IDLE_SHIFT)
32#define MMU_SYS_IDLE_SMART (2 << MMU_SYS_IDLE_SHIFT)
33#define MMU_SYS_IDLE_MASK (3 << MMU_SYS_IDLE_SHIFT)
34
35#define MMU_SYS_SOFTRESET (1 << 1)
36#define MMU_SYS_AUTOIDLE 1
37
38/* SYSSTATUS */
39#define MMU_SYS_RESETDONE 1
40
41/* IRQSTATUS & IRQENABLE */
42#define MMU_IRQ_MULTIHITFAULT (1 << 4)
43#define MMU_IRQ_TABLEWALKFAULT (1 << 3)
44#define MMU_IRQ_EMUMISS (1 << 2)
45#define MMU_IRQ_TRANSLATIONFAULT (1 << 1)
46#define MMU_IRQ_TLBMISS (1 << 0)
47
48#define __MMU_IRQ_FAULT \
49 (MMU_IRQ_MULTIHITFAULT | MMU_IRQ_EMUMISS | MMU_IRQ_TRANSLATIONFAULT)
50#define MMU_IRQ_MASK \
51 (__MMU_IRQ_FAULT | MMU_IRQ_TABLEWALKFAULT | MMU_IRQ_TLBMISS)
52#define MMU_IRQ_TWL_MASK (__MMU_IRQ_FAULT | MMU_IRQ_TABLEWALKFAULT)
53#define MMU_IRQ_TLB_MISS_MASK (__MMU_IRQ_FAULT | MMU_IRQ_TLBMISS)
54
55/* MMU_CNTL */
56#define MMU_CNTL_SHIFT 1
57#define MMU_CNTL_MASK (7 << MMU_CNTL_SHIFT)
58#define MMU_CNTL_EML_TLB (1 << 3)
59#define MMU_CNTL_TWL_EN (1 << 2)
60#define MMU_CNTL_MMU_EN (1 << 1)
61
62#define get_cam_va_mask(pgsz) \
63 (((pgsz) == MMU_CAM_PGSZ_16M) ? 0xff000000 : \
64 ((pgsz) == MMU_CAM_PGSZ_1M) ? 0xfff00000 : \
65 ((pgsz) == MMU_CAM_PGSZ_64K) ? 0xffff0000 : \
66 ((pgsz) == MMU_CAM_PGSZ_4K) ? 0xfffff000 : 0)
67
68
69static void __iommu_set_twl(struct omap_iommu *obj, bool on)
70{
71 u32 l = iommu_read_reg(obj, MMU_CNTL);
72
73 if (on)
74 iommu_write_reg(obj, MMU_IRQ_TWL_MASK, MMU_IRQENABLE);
75 else
76 iommu_write_reg(obj, MMU_IRQ_TLB_MISS_MASK, MMU_IRQENABLE);
77
78 l &= ~MMU_CNTL_MASK;
79 if (on)
80 l |= (MMU_CNTL_MMU_EN | MMU_CNTL_TWL_EN);
81 else
82 l |= (MMU_CNTL_MMU_EN);
83
84 iommu_write_reg(obj, l, MMU_CNTL);
85}
86
87
88static int omap2_iommu_enable(struct omap_iommu *obj)
89{
90 u32 l, pa;
91 unsigned long timeout;
92
93 if (!obj->iopgd || !IS_ALIGNED((u32)obj->iopgd, SZ_16K))
94 return -EINVAL;
95
96 pa = virt_to_phys(obj->iopgd);
97 if (!IS_ALIGNED(pa, SZ_16K))
98 return -EINVAL;
99
100 iommu_write_reg(obj, MMU_SYS_SOFTRESET, MMU_SYSCONFIG);
101
102 timeout = jiffies + msecs_to_jiffies(20);
103 do {
104 l = iommu_read_reg(obj, MMU_SYSSTATUS);
105 if (l & MMU_SYS_RESETDONE)
106 break;
107 } while (!time_after(jiffies, timeout));
108
109 if (!(l & MMU_SYS_RESETDONE)) {
110 dev_err(obj->dev, "can't take mmu out of reset\n");
111 return -ENODEV;
112 }
113
114 l = iommu_read_reg(obj, MMU_REVISION);
115 dev_info(obj->dev, "%s: version %d.%d\n", obj->name,
116 (l >> 4) & 0xf, l & 0xf);
117
118 l = iommu_read_reg(obj, MMU_SYSCONFIG);
119 l &= ~MMU_SYS_IDLE_MASK;
120 l |= (MMU_SYS_IDLE_SMART | MMU_SYS_AUTOIDLE);
121 iommu_write_reg(obj, l, MMU_SYSCONFIG);
122
123 iommu_write_reg(obj, pa, MMU_TTB);
124
125 __iommu_set_twl(obj, true);
126
127 return 0;
128}
129
130static void omap2_iommu_disable(struct omap_iommu *obj)
131{
132 u32 l = iommu_read_reg(obj, MMU_CNTL);
133
134 l &= ~MMU_CNTL_MASK;
135 iommu_write_reg(obj, l, MMU_CNTL);
136 iommu_write_reg(obj, MMU_SYS_IDLE_FORCE, MMU_SYSCONFIG);
137
138 dev_dbg(obj->dev, "%s is shutting down\n", obj->name);
139}
140
141static void omap2_iommu_set_twl(struct omap_iommu *obj, bool on)
142{
143 __iommu_set_twl(obj, false);
144}
145
146static u32 omap2_iommu_fault_isr(struct omap_iommu *obj, u32 *ra)
147{
148 u32 stat, da;
149 u32 errs = 0;
150
151 stat = iommu_read_reg(obj, MMU_IRQSTATUS);
152 stat &= MMU_IRQ_MASK;
153 if (!stat) {
154 *ra = 0;
155 return 0;
156 }
157
158 da = iommu_read_reg(obj, MMU_FAULT_AD);
159 *ra = da;
160
161 if (stat & MMU_IRQ_TLBMISS)
162 errs |= OMAP_IOMMU_ERR_TLB_MISS;
163 if (stat & MMU_IRQ_TRANSLATIONFAULT)
164 errs |= OMAP_IOMMU_ERR_TRANS_FAULT;
165 if (stat & MMU_IRQ_EMUMISS)
166 errs |= OMAP_IOMMU_ERR_EMU_MISS;
167 if (stat & MMU_IRQ_TABLEWALKFAULT)
168 errs |= OMAP_IOMMU_ERR_TBLWALK_FAULT;
169 if (stat & MMU_IRQ_MULTIHITFAULT)
170 errs |= OMAP_IOMMU_ERR_MULTIHIT_FAULT;
171 iommu_write_reg(obj, stat, MMU_IRQSTATUS);
172
173 return errs;
174}
175
176static void omap2_tlb_read_cr(struct omap_iommu *obj, struct cr_regs *cr)
177{
178 cr->cam = iommu_read_reg(obj, MMU_READ_CAM);
179 cr->ram = iommu_read_reg(obj, MMU_READ_RAM);
180}
181
182static void omap2_tlb_load_cr(struct omap_iommu *obj, struct cr_regs *cr)
183{
184 iommu_write_reg(obj, cr->cam | MMU_CAM_V, MMU_CAM);
185 iommu_write_reg(obj, cr->ram, MMU_RAM);
186}
187
188static u32 omap2_cr_to_virt(struct cr_regs *cr)
189{
190 u32 page_size = cr->cam & MMU_CAM_PGSZ_MASK;
191 u32 mask = get_cam_va_mask(cr->cam & page_size);
192
193 return cr->cam & mask;
194}
195
196static struct cr_regs *omap2_alloc_cr(struct omap_iommu *obj,
197 struct iotlb_entry *e)
198{
199 struct cr_regs *cr;
200
201 if (e->da & ~(get_cam_va_mask(e->pgsz))) {
202 dev_err(obj->dev, "%s:\twrong alignment: %08x\n", __func__,
203 e->da);
204 return ERR_PTR(-EINVAL);
205 }
206
207 cr = kmalloc(sizeof(*cr), GFP_KERNEL);
208 if (!cr)
209 return ERR_PTR(-ENOMEM);
210
211 cr->cam = (e->da & MMU_CAM_VATAG_MASK) | e->prsvd | e->pgsz | e->valid;
212 cr->ram = e->pa | e->endian | e->elsz | e->mixed;
213
214 return cr;
215}
216
217static inline int omap2_cr_valid(struct cr_regs *cr)
218{
219 return cr->cam & MMU_CAM_V;
220}
221
222static u32 omap2_get_pte_attr(struct iotlb_entry *e)
223{
224 u32 attr;
225
226 attr = e->mixed << 5;
227 attr |= e->endian;
228 attr |= e->elsz >> 3;
229 attr <<= (((e->pgsz == MMU_CAM_PGSZ_4K) ||
230 (e->pgsz == MMU_CAM_PGSZ_64K)) ? 0 : 6);
231 return attr;
232}
233
234static ssize_t
235omap2_dump_cr(struct omap_iommu *obj, struct cr_regs *cr, char *buf)
236{
237 char *p = buf;
238
239 /* FIXME: Need more detail analysis of cam/ram */
240 p += sprintf(p, "%08x %08x %01x\n", cr->cam, cr->ram,
241 (cr->cam & MMU_CAM_P) ? 1 : 0);
242
243 return p - buf;
244}
245
246#define pr_reg(name) \
247 do { \
248 ssize_t bytes; \
249 const char *str = "%20s: %08x\n"; \
250 const int maxcol = 32; \
251 bytes = snprintf(p, maxcol, str, __stringify(name), \
252 iommu_read_reg(obj, MMU_##name)); \
253 p += bytes; \
254 len -= bytes; \
255 if (len < maxcol) \
256 goto out; \
257 } while (0)
258
259static ssize_t
260omap2_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len)
261{
262 char *p = buf;
263
264 pr_reg(REVISION);
265 pr_reg(SYSCONFIG);
266 pr_reg(SYSSTATUS);
267 pr_reg(IRQSTATUS);
268 pr_reg(IRQENABLE);
269 pr_reg(WALKING_ST);
270 pr_reg(CNTL);
271 pr_reg(FAULT_AD);
272 pr_reg(TTB);
273 pr_reg(LOCK);
274 pr_reg(LD_TLB);
275 pr_reg(CAM);
276 pr_reg(RAM);
277 pr_reg(GFLUSH);
278 pr_reg(FLUSH_ENTRY);
279 pr_reg(READ_CAM);
280 pr_reg(READ_RAM);
281 pr_reg(EMU_FAULT_AD);
282out:
283 return p - buf;
284}
285
286static void omap2_iommu_save_ctx(struct omap_iommu *obj)
287{
288 int i;
289 u32 *p = obj->ctx;
290
291 for (i = 0; i < (MMU_REG_SIZE / sizeof(u32)); i++) {
292 p[i] = iommu_read_reg(obj, i * sizeof(u32));
293 dev_dbg(obj->dev, "%s\t[%02d] %08x\n", __func__, i, p[i]);
294 }
295
296 BUG_ON(p[0] != IOMMU_ARCH_VERSION);
297}
298
299static void omap2_iommu_restore_ctx(struct omap_iommu *obj)
300{
301 int i;
302 u32 *p = obj->ctx;
303
304 for (i = 0; i < (MMU_REG_SIZE / sizeof(u32)); i++) {
305 iommu_write_reg(obj, p[i], i * sizeof(u32));
306 dev_dbg(obj->dev, "%s\t[%02d] %08x\n", __func__, i, p[i]);
307 }
308
309 BUG_ON(p[0] != IOMMU_ARCH_VERSION);
310}
311
312static void omap2_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e)
313{
314 e->da = cr->cam & MMU_CAM_VATAG_MASK;
315 e->pa = cr->ram & MMU_RAM_PADDR_MASK;
316 e->valid = cr->cam & MMU_CAM_V;
317 e->pgsz = cr->cam & MMU_CAM_PGSZ_MASK;
318 e->endian = cr->ram & MMU_RAM_ENDIAN_MASK;
319 e->elsz = cr->ram & MMU_RAM_ELSZ_MASK;
320 e->mixed = cr->ram & MMU_RAM_MIXED;
321}
322
323static const struct iommu_functions omap2_iommu_ops = {
324 .version = IOMMU_ARCH_VERSION,
325
326 .enable = omap2_iommu_enable,
327 .disable = omap2_iommu_disable,
328 .set_twl = omap2_iommu_set_twl,
329 .fault_isr = omap2_iommu_fault_isr,
330
331 .tlb_read_cr = omap2_tlb_read_cr,
332 .tlb_load_cr = omap2_tlb_load_cr,
333
334 .cr_to_e = omap2_cr_to_e,
335 .cr_to_virt = omap2_cr_to_virt,
336 .alloc_cr = omap2_alloc_cr,
337 .cr_valid = omap2_cr_valid,
338 .dump_cr = omap2_dump_cr,
339
340 .get_pte_attr = omap2_get_pte_attr,
341
342 .save_ctx = omap2_iommu_save_ctx,
343 .restore_ctx = omap2_iommu_restore_ctx,
344 .dump_ctx = omap2_iommu_dump_ctx,
345};
346
347static int __init omap2_iommu_init(void)
348{
349 return omap_install_iommu_arch(&omap2_iommu_ops);
350}
351module_init(omap2_iommu_init);
352
353static void __exit omap2_iommu_exit(void)
354{
355 omap_uninstall_iommu_arch(&omap2_iommu_ops);
356}
357module_exit(omap2_iommu_exit);
358
359MODULE_AUTHOR("Hiroshi DOYU, Paul Mundt and Toshihiro Kobayashi");
360MODULE_DESCRIPTION("omap iommu: omap2/3 architecture specific functions");
361MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c
index df298d46707c..7642fc4672c1 100644
--- a/arch/arm/mach-omap2/omap-iommu.c
+++ b/arch/arm/mach-omap2/omap-iommu.c
@@ -12,153 +12,60 @@
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/err.h>
16#include <linux/slab.h>
15 17
16#include <plat/iommu.h> 18#include <linux/platform_data/iommu-omap.h>
19#include <plat/omap_hwmod.h>
20#include <plat/omap_device.h>
17 21
18#include "soc.h" 22static int __init omap_iommu_dev_init(struct omap_hwmod *oh, void *unused)
19#include "common.h"
20
21struct iommu_device {
22 resource_size_t base;
23 int irq;
24 struct iommu_platform_data pdata;
25 struct resource res[2];
26};
27static struct iommu_device *devices;
28static int num_iommu_devices;
29
30#ifdef CONFIG_ARCH_OMAP3
31static struct iommu_device omap3_devices[] = {
32 {
33 .base = 0x480bd400,
34 .irq = 24 + OMAP_INTC_START,
35 .pdata = {
36 .name = "isp",
37 .nr_tlb_entries = 8,
38 .clk_name = "cam_ick",
39 .da_start = 0x0,
40 .da_end = 0xFFFFF000,
41 },
42 },
43#if defined(CONFIG_OMAP_IOMMU_IVA2)
44 {
45 .base = 0x5d000000,
46 .irq = 28 + OMAP_INTC_START,
47 .pdata = {
48 .name = "iva2",
49 .nr_tlb_entries = 32,
50 .clk_name = "iva2_ck",
51 .da_start = 0x11000000,
52 .da_end = 0xFFFFF000,
53 },
54 },
55#endif
56};
57#define NR_OMAP3_IOMMU_DEVICES ARRAY_SIZE(omap3_devices)
58static struct platform_device *omap3_iommu_pdev[NR_OMAP3_IOMMU_DEVICES];
59#else
60#define omap3_devices NULL
61#define NR_OMAP3_IOMMU_DEVICES 0
62#define omap3_iommu_pdev NULL
63#endif
64
65#ifdef CONFIG_ARCH_OMAP4
66static struct iommu_device omap4_devices[] = {
67 {
68 .base = OMAP4_MMU1_BASE,
69 .irq = 100 + OMAP44XX_IRQ_GIC_START,
70 .pdata = {
71 .name = "ducati",
72 .nr_tlb_entries = 32,
73 .clk_name = "ipu_fck",
74 .da_start = 0x0,
75 .da_end = 0xFFFFF000,
76 },
77 },
78 {
79 .base = OMAP4_MMU2_BASE,
80 .irq = 28 + OMAP44XX_IRQ_GIC_START,
81 .pdata = {
82 .name = "tesla",
83 .nr_tlb_entries = 32,
84 .clk_name = "dsp_fck",
85 .da_start = 0x0,
86 .da_end = 0xFFFFF000,
87 },
88 },
89};
90#define NR_OMAP4_IOMMU_DEVICES ARRAY_SIZE(omap4_devices)
91static struct platform_device *omap4_iommu_pdev[NR_OMAP4_IOMMU_DEVICES];
92#else
93#define omap4_devices NULL
94#define NR_OMAP4_IOMMU_DEVICES 0
95#define omap4_iommu_pdev NULL
96#endif
97
98static struct platform_device **omap_iommu_pdev;
99
100static int __init omap_iommu_init(void)
101{ 23{
102 int i, err; 24 struct platform_device *pdev;
103 struct resource res[] = { 25 struct iommu_platform_data *pdata;
104 { .flags = IORESOURCE_MEM }, 26 struct omap_mmu_dev_attr *a = (struct omap_mmu_dev_attr *)oh->dev_attr;
105 { .flags = IORESOURCE_IRQ }, 27 static int i;
106 }; 28
29 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
30 if (!pdata)
31 return -ENOMEM;
32
33 pdata->name = oh->name;
34 pdata->nr_tlb_entries = a->nr_tlb_entries;
35 pdata->da_start = a->da_start;
36 pdata->da_end = a->da_end;
37
38 if (oh->rst_lines_cnt == 1) {
39 pdata->reset_name = oh->rst_lines->name;
40 pdata->assert_reset = omap_device_assert_hardreset;
41 pdata->deassert_reset = omap_device_deassert_hardreset;
42 }
107 43
108 if (cpu_is_omap34xx()) { 44 pdev = omap_device_build("omap-iommu", i, oh, pdata, sizeof(*pdata),
109 devices = omap3_devices; 45 NULL, 0, 0);
110 omap_iommu_pdev = omap3_iommu_pdev;
111 num_iommu_devices = NR_OMAP3_IOMMU_DEVICES;
112 } else if (cpu_is_omap44xx()) {
113 devices = omap4_devices;
114 omap_iommu_pdev = omap4_iommu_pdev;
115 num_iommu_devices = NR_OMAP4_IOMMU_DEVICES;
116 } else
117 return -ENODEV;
118 46
119 for (i = 0; i < num_iommu_devices; i++) { 47 kfree(pdata);
120 struct platform_device *pdev;
121 const struct iommu_device *d = &devices[i];
122 48
123 pdev = platform_device_alloc("omap-iommu", i); 49 if (IS_ERR(pdev)) {
124 if (!pdev) { 50 pr_err("%s: device build err: %ld\n", __func__, PTR_ERR(pdev));
125 err = -ENOMEM; 51 return PTR_ERR(pdev);
126 goto err_out; 52 }
127 }
128 53
129 res[0].start = d->base; 54 i++;
130 res[0].end = d->base + MMU_REG_SIZE - 1;
131 res[1].start = res[1].end = d->irq;
132 55
133 err = platform_device_add_resources(pdev, res,
134 ARRAY_SIZE(res));
135 if (err)
136 goto err_out;
137 err = platform_device_add_data(pdev, &d->pdata,
138 sizeof(d->pdata));
139 if (err)
140 goto err_out;
141 err = platform_device_add(pdev);
142 if (err)
143 goto err_out;
144 omap_iommu_pdev[i] = pdev;
145 }
146 return 0; 56 return 0;
57}
147 58
148err_out: 59static int __init omap_iommu_init(void)
149 while (i--) 60{
150 platform_device_put(omap_iommu_pdev[i]); 61 return omap_hwmod_for_each_by_class("mmu", omap_iommu_dev_init, NULL);
151 return err;
152} 62}
153/* must be ready before omap3isp is probed */ 63/* must be ready before omap3isp is probed */
154subsys_initcall(omap_iommu_init); 64subsys_initcall(omap_iommu_init);
155 65
156static void __exit omap_iommu_exit(void) 66static void __exit omap_iommu_exit(void)
157{ 67{
158 int i; 68 /* Do nothing */
159
160 for (i = 0; i < num_iommu_devices; i++)
161 platform_device_unregister(omap_iommu_pdev[i]);
162} 69}
163module_exit(omap_iommu_exit); 70module_exit(omap_iommu_exit);
164 71
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index f67b7ee07dd4..621bc7137233 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -26,8 +26,8 @@
26#include <plat/mmc.h> 26#include <plat/mmc.h>
27#include <linux/platform_data/asoc-ti-mcbsp.h> 27#include <linux/platform_data/asoc-ti-mcbsp.h>
28#include <linux/platform_data/spi-omap2-mcspi.h> 28#include <linux/platform_data/spi-omap2-mcspi.h>
29#include <linux/platform_data/iommu-omap.h>
29#include <plat/dmtimer.h> 30#include <plat/dmtimer.h>
30#include <plat/iommu.h>
31 31
32#include "am35xx.h" 32#include "am35xx.h"
33 33
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 0b1249e00398..4b985b9b81d0 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -28,10 +28,10 @@
28#include <plat/dma.h> 28#include <plat/dma.h>
29#include <linux/platform_data/spi-omap2-mcspi.h> 29#include <linux/platform_data/spi-omap2-mcspi.h>
30#include <linux/platform_data/asoc-ti-mcbsp.h> 30#include <linux/platform_data/asoc-ti-mcbsp.h>
31#include <linux/platform_data/iommu-omap.h>
31#include <plat/mmc.h> 32#include <plat/mmc.h>
32#include <plat/dmtimer.h> 33#include <plat/dmtimer.h>
33#include <plat/common.h> 34#include <plat/common.h>
34#include <plat/iommu.h>
35 35
36#include "omap_hwmod_common_data.h" 36#include "omap_hwmod_common_data.h"
37#include "cm1_44xx.h" 37#include "cm1_44xx.h"
@@ -651,7 +651,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod = {
651 .mpu_irqs = omap44xx_dsp_irqs, 651 .mpu_irqs = omap44xx_dsp_irqs,
652 .rst_lines = omap44xx_dsp_resets, 652 .rst_lines = omap44xx_dsp_resets,
653 .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets), 653 .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets),
654 .main_clk = "dsp_fck", 654 .main_clk = "dpll_iva_m4x2_ck",
655 .prcm = { 655 .prcm = {
656 .omap4 = { 656 .omap4 = {
657 .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, 657 .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET,
@@ -1678,7 +1678,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
1678 .mpu_irqs = omap44xx_ipu_irqs, 1678 .mpu_irqs = omap44xx_ipu_irqs,
1679 .rst_lines = omap44xx_ipu_resets, 1679 .rst_lines = omap44xx_ipu_resets,
1680 .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), 1680 .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets),
1681 .main_clk = "ipu_fck", 1681 .main_clk = "ducati_clk_mux_ck",
1682 .prcm = { 1682 .prcm = {
1683 .omap4 = { 1683 .omap4 = {
1684 .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, 1684 .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET,
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 44c42057b61c..a256135d8e48 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -73,6 +73,7 @@ void __init omap4_pmic_init(const char *pmic_type,
73{ 73{
74 /* PMIC part*/ 74 /* PMIC part*/
75 omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE); 75 omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
76 omap_mux_init_signal("fref_clk0_out.sys_drm_msecure", OMAP_PIN_OUTPUT);
76 omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data); 77 omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data);
77 78
78 /* Register additional devices on i2c1 bus if needed */ 79 /* Register additional devices on i2c1 bus if needed */
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 86b8b480634f..09c5233f4dfc 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -89,7 +89,7 @@ ENTRY(cpu_v6_dcache_clean_area)
89 mov pc, lr 89 mov pc, lr
90 90
91/* 91/*
92 * cpu_arm926_switch_mm(pgd_phys, tsk) 92 * cpu_v6_switch_mm(pgd_phys, tsk)
93 * 93 *
94 * Set the translation table base pointer to be pgd_phys 94 * Set the translation table base pointer to be pgd_phys
95 * 95 *
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index a5683a84c6ee..6013831a043e 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -26,12 +26,14 @@
26#include <linux/kernel.h> 26#include <linux/kernel.h>
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/i2c.h> 28#include <linux/i2c.h>
29#include <linux/i2c-omap.h>
29#include <linux/slab.h> 30#include <linux/slab.h>
30#include <linux/err.h> 31#include <linux/err.h>
31#include <linux/clk.h> 32#include <linux/clk.h>
32 33
33#include <mach/irqs.h> 34#include <mach/irqs.h>
34#include <plat/i2c.h> 35#include <plat/i2c.h>
36#include <plat/omap-pm.h>
35#include <plat/omap_device.h> 37#include <plat/omap_device.h>
36 38
37#define OMAP_I2C_SIZE 0x3f 39#define OMAP_I2C_SIZE 0x3f
@@ -127,6 +129,16 @@ static inline int omap1_i2c_add_bus(int bus_id)
127 129
128 130
129#ifdef CONFIG_ARCH_OMAP2PLUS 131#ifdef CONFIG_ARCH_OMAP2PLUS
132/*
133 * XXX This function is a temporary compatibility wrapper - only
134 * needed until the I2C driver can be converted to call
135 * omap_pm_set_max_dev_wakeup_lat() and handle a return code.
136 */
137static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
138{
139 omap_pm_set_max_mpu_wakeup_lat(dev, t);
140}
141
130static inline int omap2_i2c_add_bus(int bus_id) 142static inline int omap2_i2c_add_bus(int bus_id)
131{ 143{
132 int l; 144 int l;
@@ -158,6 +170,15 @@ static inline int omap2_i2c_add_bus(int bus_id)
158 dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr; 170 dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
159 pdata->flags = dev_attr->flags; 171 pdata->flags = dev_attr->flags;
160 172
173 /*
174 * When waiting for completion of a i2c transfer, we need to
175 * set a wake up latency constraint for the MPU. This is to
176 * ensure quick enough wakeup from idle, when transfer
177 * completes.
178 * Only omap3 has support for constraints
179 */
180 if (cpu_is_omap34xx())
181 pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
161 pdev = omap_device_build(name, bus_id, oh, pdata, 182 pdev = omap_device_build(name, bus_id, oh, pdata,
162 sizeof(struct omap_i2c_bus_platform_data), 183 sizeof(struct omap_i2c_bus_platform_data),
163 NULL, 0, 0); 184 NULL, 0, 0);
diff --git a/arch/arm/plat-omap/include/plat/iommu.h b/arch/arm/plat-omap/include/plat/iommu.h
deleted file mode 100644
index 68b5f0362f35..000000000000
--- a/arch/arm/plat-omap/include/plat/iommu.h
+++ /dev/null
@@ -1,221 +0,0 @@
1/*
2 * omap iommu: main structures
3 *
4 * Copyright (C) 2008-2009 Nokia Corporation
5 *
6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __MACH_IOMMU_H
14#define __MACH_IOMMU_H
15
16struct iotlb_entry {
17 u32 da;
18 u32 pa;
19 u32 pgsz, prsvd, valid;
20 union {
21 u16 ap;
22 struct {
23 u32 endian, elsz, mixed;
24 };
25 };
26};
27
28struct omap_iommu {
29 const char *name;
30 struct module *owner;
31 struct clk *clk;
32 void __iomem *regbase;
33 struct device *dev;
34 void *isr_priv;
35 struct iommu_domain *domain;
36
37 unsigned int refcount;
38 spinlock_t iommu_lock; /* global for this whole object */
39
40 /*
41 * We don't change iopgd for a situation like pgd for a task,
42 * but share it globally for each iommu.
43 */
44 u32 *iopgd;
45 spinlock_t page_table_lock; /* protect iopgd */
46
47 int nr_tlb_entries;
48
49 struct list_head mmap;
50 struct mutex mmap_lock; /* protect mmap */
51
52 void *ctx; /* iommu context: registres saved area */
53 u32 da_start;
54 u32 da_end;
55};
56
57struct cr_regs {
58 union {
59 struct {
60 u16 cam_l;
61 u16 cam_h;
62 };
63 u32 cam;
64 };
65 union {
66 struct {
67 u16 ram_l;
68 u16 ram_h;
69 };
70 u32 ram;
71 };
72};
73
74struct iotlb_lock {
75 short base;
76 short vict;
77};
78
79/* architecture specific functions */
80struct iommu_functions {
81 unsigned long version;
82
83 int (*enable)(struct omap_iommu *obj);
84 void (*disable)(struct omap_iommu *obj);
85 void (*set_twl)(struct omap_iommu *obj, bool on);
86 u32 (*fault_isr)(struct omap_iommu *obj, u32 *ra);
87
88 void (*tlb_read_cr)(struct omap_iommu *obj, struct cr_regs *cr);
89 void (*tlb_load_cr)(struct omap_iommu *obj, struct cr_regs *cr);
90
91 struct cr_regs *(*alloc_cr)(struct omap_iommu *obj,
92 struct iotlb_entry *e);
93 int (*cr_valid)(struct cr_regs *cr);
94 u32 (*cr_to_virt)(struct cr_regs *cr);
95 void (*cr_to_e)(struct cr_regs *cr, struct iotlb_entry *e);
96 ssize_t (*dump_cr)(struct omap_iommu *obj, struct cr_regs *cr,
97 char *buf);
98
99 u32 (*get_pte_attr)(struct iotlb_entry *e);
100
101 void (*save_ctx)(struct omap_iommu *obj);
102 void (*restore_ctx)(struct omap_iommu *obj);
103 ssize_t (*dump_ctx)(struct omap_iommu *obj, char *buf, ssize_t len);
104};
105
106/**
107 * struct omap_mmu_dev_attr - OMAP mmu device attributes for omap_hwmod
108 * @da_start: device address where the va space starts.
109 * @da_end: device address where the va space ends.
110 * @nr_tlb_entries: number of entries supported by the translation
111 * look-aside buffer (TLB).
112 */
113struct omap_mmu_dev_attr {
114 u32 da_start;
115 u32 da_end;
116 int nr_tlb_entries;
117};
118
119struct iommu_platform_data {
120 const char *name;
121 const char *clk_name;
122 const int nr_tlb_entries;
123 u32 da_start;
124 u32 da_end;
125};
126
127/**
128 * struct iommu_arch_data - omap iommu private data
129 * @name: name of the iommu device
130 * @iommu_dev: handle of the iommu device
131 *
132 * This is an omap iommu private data object, which binds an iommu user
133 * to its iommu device. This object should be placed at the iommu user's
134 * dev_archdata so generic IOMMU API can be used without having to
135 * utilize omap-specific plumbing anymore.
136 */
137struct omap_iommu_arch_data {
138 const char *name;
139 struct omap_iommu *iommu_dev;
140};
141
142#ifdef CONFIG_IOMMU_API
143/**
144 * dev_to_omap_iommu() - retrieves an omap iommu object from a user device
145 * @dev: iommu client device
146 */
147static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev)
148{
149 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu;
150
151 return arch_data->iommu_dev;
152}
153#endif
154
155/* IOMMU errors */
156#define OMAP_IOMMU_ERR_TLB_MISS (1 << 0)
157#define OMAP_IOMMU_ERR_TRANS_FAULT (1 << 1)
158#define OMAP_IOMMU_ERR_EMU_MISS (1 << 2)
159#define OMAP_IOMMU_ERR_TBLWALK_FAULT (1 << 3)
160#define OMAP_IOMMU_ERR_MULTIHIT_FAULT (1 << 4)
161
162#if defined(CONFIG_ARCH_OMAP1)
163#error "iommu for this processor not implemented yet"
164#else
165#include <plat/iommu2.h>
166#endif
167
168/*
169 * utilities for super page(16MB, 1MB, 64KB and 4KB)
170 */
171
172#define iopgsz_max(bytes) \
173 (((bytes) >= SZ_16M) ? SZ_16M : \
174 ((bytes) >= SZ_1M) ? SZ_1M : \
175 ((bytes) >= SZ_64K) ? SZ_64K : \
176 ((bytes) >= SZ_4K) ? SZ_4K : 0)
177
178#define bytes_to_iopgsz(bytes) \
179 (((bytes) == SZ_16M) ? MMU_CAM_PGSZ_16M : \
180 ((bytes) == SZ_1M) ? MMU_CAM_PGSZ_1M : \
181 ((bytes) == SZ_64K) ? MMU_CAM_PGSZ_64K : \
182 ((bytes) == SZ_4K) ? MMU_CAM_PGSZ_4K : -1)
183
184#define iopgsz_to_bytes(iopgsz) \
185 (((iopgsz) == MMU_CAM_PGSZ_16M) ? SZ_16M : \
186 ((iopgsz) == MMU_CAM_PGSZ_1M) ? SZ_1M : \
187 ((iopgsz) == MMU_CAM_PGSZ_64K) ? SZ_64K : \
188 ((iopgsz) == MMU_CAM_PGSZ_4K) ? SZ_4K : 0)
189
190#define iopgsz_ok(bytes) (bytes_to_iopgsz(bytes) >= 0)
191
192/*
193 * global functions
194 */
195extern u32 omap_iommu_arch_version(void);
196
197extern void omap_iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e);
198
199extern int
200omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e);
201
202extern int omap_iommu_set_isr(const char *name,
203 int (*isr)(struct omap_iommu *obj, u32 da, u32 iommu_errs,
204 void *priv),
205 void *isr_priv);
206
207extern void omap_iommu_save_ctx(struct device *dev);
208extern void omap_iommu_restore_ctx(struct device *dev);
209
210extern int omap_install_iommu_arch(const struct iommu_functions *ops);
211extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops);
212
213extern int omap_foreach_iommu_device(void *data,
214 int (*fn)(struct device *, void *));
215
216extern ssize_t
217omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len);
218extern size_t
219omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t len);
220
221#endif /* __MACH_IOMMU_H */
diff --git a/arch/arm/plat-omap/include/plat/iommu2.h b/arch/arm/plat-omap/include/plat/iommu2.h
deleted file mode 100644
index d4116b595e40..000000000000
--- a/arch/arm/plat-omap/include/plat/iommu2.h
+++ /dev/null
@@ -1,96 +0,0 @@
1/*
2 * omap iommu: omap2 architecture specific definitions
3 *
4 * Copyright (C) 2008-2009 Nokia Corporation
5 *
6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __MACH_IOMMU2_H
14#define __MACH_IOMMU2_H
15
16#include <linux/io.h>
17
18/*
19 * MMU Register offsets
20 */
21#define MMU_REVISION 0x00
22#define MMU_SYSCONFIG 0x10
23#define MMU_SYSSTATUS 0x14
24#define MMU_IRQSTATUS 0x18
25#define MMU_IRQENABLE 0x1c
26#define MMU_WALKING_ST 0x40
27#define MMU_CNTL 0x44
28#define MMU_FAULT_AD 0x48
29#define MMU_TTB 0x4c
30#define MMU_LOCK 0x50
31#define MMU_LD_TLB 0x54
32#define MMU_CAM 0x58
33#define MMU_RAM 0x5c
34#define MMU_GFLUSH 0x60
35#define MMU_FLUSH_ENTRY 0x64
36#define MMU_READ_CAM 0x68
37#define MMU_READ_RAM 0x6c
38#define MMU_EMU_FAULT_AD 0x70
39
40#define MMU_REG_SIZE 256
41
42/*
43 * MMU Register bit definitions
44 */
45#define MMU_LOCK_BASE_SHIFT 10
46#define MMU_LOCK_BASE_MASK (0x1f << MMU_LOCK_BASE_SHIFT)
47#define MMU_LOCK_BASE(x) \
48 ((x & MMU_LOCK_BASE_MASK) >> MMU_LOCK_BASE_SHIFT)
49
50#define MMU_LOCK_VICT_SHIFT 4
51#define MMU_LOCK_VICT_MASK (0x1f << MMU_LOCK_VICT_SHIFT)
52#define MMU_LOCK_VICT(x) \
53 ((x & MMU_LOCK_VICT_MASK) >> MMU_LOCK_VICT_SHIFT)
54
55#define MMU_CAM_VATAG_SHIFT 12
56#define MMU_CAM_VATAG_MASK \
57 ((~0UL >> MMU_CAM_VATAG_SHIFT) << MMU_CAM_VATAG_SHIFT)
58#define MMU_CAM_P (1 << 3)
59#define MMU_CAM_V (1 << 2)
60#define MMU_CAM_PGSZ_MASK 3
61#define MMU_CAM_PGSZ_1M (0 << 0)
62#define MMU_CAM_PGSZ_64K (1 << 0)
63#define MMU_CAM_PGSZ_4K (2 << 0)
64#define MMU_CAM_PGSZ_16M (3 << 0)
65
66#define MMU_RAM_PADDR_SHIFT 12
67#define MMU_RAM_PADDR_MASK \
68 ((~0UL >> MMU_RAM_PADDR_SHIFT) << MMU_RAM_PADDR_SHIFT)
69#define MMU_RAM_ENDIAN_SHIFT 9
70#define MMU_RAM_ENDIAN_MASK (1 << MMU_RAM_ENDIAN_SHIFT)
71#define MMU_RAM_ENDIAN_BIG (1 << MMU_RAM_ENDIAN_SHIFT)
72#define MMU_RAM_ENDIAN_LITTLE (0 << MMU_RAM_ENDIAN_SHIFT)
73#define MMU_RAM_ELSZ_SHIFT 7
74#define MMU_RAM_ELSZ_MASK (3 << MMU_RAM_ELSZ_SHIFT)
75#define MMU_RAM_ELSZ_8 (0 << MMU_RAM_ELSZ_SHIFT)
76#define MMU_RAM_ELSZ_16 (1 << MMU_RAM_ELSZ_SHIFT)
77#define MMU_RAM_ELSZ_32 (2 << MMU_RAM_ELSZ_SHIFT)
78#define MMU_RAM_ELSZ_NONE (3 << MMU_RAM_ELSZ_SHIFT)
79#define MMU_RAM_MIXED_SHIFT 6
80#define MMU_RAM_MIXED_MASK (1 << MMU_RAM_MIXED_SHIFT)
81#define MMU_RAM_MIXED MMU_RAM_MIXED_MASK
82
83/*
84 * register accessors
85 */
86static inline u32 iommu_read_reg(struct omap_iommu *obj, size_t offs)
87{
88 return __raw_readl(obj->regbase + offs);
89}
90
91static inline void iommu_write_reg(struct omap_iommu *obj, u32 val, size_t offs)
92{
93 __raw_writel(val, obj->regbase + offs);
94}
95
96#endif /* __MACH_IOMMU2_H */
diff --git a/arch/arm/plat-omap/include/plat/iopgtable.h b/arch/arm/plat-omap/include/plat/iopgtable.h
deleted file mode 100644
index 66a813977d52..000000000000
--- a/arch/arm/plat-omap/include/plat/iopgtable.h
+++ /dev/null
@@ -1,120 +0,0 @@
1/*
2 * omap iommu: pagetable definitions
3 *
4 * Copyright (C) 2008-2010 Nokia Corporation
5 *
6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __PLAT_OMAP_IOMMU_H
14#define __PLAT_OMAP_IOMMU_H
15
16/*
17 * "L2 table" address mask and size definitions.
18 */
19#define IOPGD_SHIFT 20
20#define IOPGD_SIZE (1UL << IOPGD_SHIFT)
21#define IOPGD_MASK (~(IOPGD_SIZE - 1))
22
23/*
24 * "section" address mask and size definitions.
25 */
26#define IOSECTION_SHIFT 20
27#define IOSECTION_SIZE (1UL << IOSECTION_SHIFT)
28#define IOSECTION_MASK (~(IOSECTION_SIZE - 1))
29
30/*
31 * "supersection" address mask and size definitions.
32 */
33#define IOSUPER_SHIFT 24
34#define IOSUPER_SIZE (1UL << IOSUPER_SHIFT)
35#define IOSUPER_MASK (~(IOSUPER_SIZE - 1))
36
37#define PTRS_PER_IOPGD (1UL << (32 - IOPGD_SHIFT))
38#define IOPGD_TABLE_SIZE (PTRS_PER_IOPGD * sizeof(u32))
39
40/*
41 * "small page" address mask and size definitions.
42 */
43#define IOPTE_SHIFT 12
44#define IOPTE_SIZE (1UL << IOPTE_SHIFT)
45#define IOPTE_MASK (~(IOPTE_SIZE - 1))
46
47/*
48 * "large page" address mask and size definitions.
49 */
50#define IOLARGE_SHIFT 16
51#define IOLARGE_SIZE (1UL << IOLARGE_SHIFT)
52#define IOLARGE_MASK (~(IOLARGE_SIZE - 1))
53
54#define PTRS_PER_IOPTE (1UL << (IOPGD_SHIFT - IOPTE_SHIFT))
55#define IOPTE_TABLE_SIZE (PTRS_PER_IOPTE * sizeof(u32))
56
57#define IOPAGE_MASK IOPTE_MASK
58
59/**
60 * omap_iommu_translate() - va to pa translation
61 * @d: omap iommu descriptor
62 * @va: virtual address
63 * @mask: omap iommu descriptor mask
64 *
65 * va to pa translation
66 */
67static inline phys_addr_t omap_iommu_translate(u32 d, u32 va, u32 mask)
68{
69 return (d & mask) | (va & (~mask));
70}
71
72/*
73 * some descriptor attributes.
74 */
75#define IOPGD_TABLE (1 << 0)
76#define IOPGD_SECTION (2 << 0)
77#define IOPGD_SUPER (1 << 18 | 2 << 0)
78
79#define iopgd_is_table(x) (((x) & 3) == IOPGD_TABLE)
80#define iopgd_is_section(x) (((x) & (1 << 18 | 3)) == IOPGD_SECTION)
81#define iopgd_is_super(x) (((x) & (1 << 18 | 3)) == IOPGD_SUPER)
82
83#define IOPTE_SMALL (2 << 0)
84#define IOPTE_LARGE (1 << 0)
85
86#define iopte_is_small(x) (((x) & 2) == IOPTE_SMALL)
87#define iopte_is_large(x) (((x) & 3) == IOPTE_LARGE)
88
89/* to find an entry in a page-table-directory */
90#define iopgd_index(da) (((da) >> IOPGD_SHIFT) & (PTRS_PER_IOPGD - 1))
91#define iopgd_offset(obj, da) ((obj)->iopgd + iopgd_index(da))
92
93#define iopgd_page_paddr(iopgd) (*iopgd & ~((1 << 10) - 1))
94#define iopgd_page_vaddr(iopgd) ((u32 *)phys_to_virt(iopgd_page_paddr(iopgd)))
95
96/* to find an entry in the second-level page table. */
97#define iopte_index(da) (((da) >> IOPTE_SHIFT) & (PTRS_PER_IOPTE - 1))
98#define iopte_offset(iopgd, da) (iopgd_page_vaddr(iopgd) + iopte_index(da))
99
100static inline u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa,
101 u32 flags)
102{
103 memset(e, 0, sizeof(*e));
104
105 e->da = da;
106 e->pa = pa;
107 e->valid = 1;
108 /* FIXME: add OMAP1 support */
109 e->pgsz = flags & MMU_CAM_PGSZ_MASK;
110 e->endian = flags & MMU_RAM_ENDIAN_MASK;
111 e->elsz = flags & MMU_RAM_ELSZ_MASK;
112 e->mixed = flags & MMU_RAM_MIXED_MASK;
113
114 return iopgsz_to_bytes(e->pgsz);
115}
116
117#define to_iommu(dev) \
118 (struct omap_iommu *)platform_get_drvdata(to_platform_device(dev))
119
120#endif /* __PLAT_OMAP_IOMMU_H */
diff --git a/arch/arm/plat-omap/include/plat/iovmm.h b/arch/arm/plat-omap/include/plat/iovmm.h
deleted file mode 100644
index 498e57cda6cd..000000000000
--- a/arch/arm/plat-omap/include/plat/iovmm.h
+++ /dev/null
@@ -1,89 +0,0 @@
1/*
2 * omap iommu: simple virtual address space management
3 *
4 * Copyright (C) 2008-2009 Nokia Corporation
5 *
6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __IOMMU_MMAP_H
14#define __IOMMU_MMAP_H
15
16#include <linux/iommu.h>
17
18struct iovm_struct {
19 struct omap_iommu *iommu; /* iommu object which this belongs to */
20 u32 da_start; /* area definition */
21 u32 da_end;
22 u32 flags; /* IOVMF_: see below */
23 struct list_head list; /* linked in ascending order */
24 const struct sg_table *sgt; /* keep 'page' <-> 'da' mapping */
25 void *va; /* mpu side mapped address */
26};
27
28/*
29 * IOVMF_FLAGS: attribute for iommu virtual memory area(iovma)
30 *
31 * lower 16 bit is used for h/w and upper 16 bit is for s/w.
32 */
33#define IOVMF_SW_SHIFT 16
34
35/*
36 * iovma: h/w flags derived from cam and ram attribute
37 */
38#define IOVMF_CAM_MASK (~((1 << 10) - 1))
39#define IOVMF_RAM_MASK (~IOVMF_CAM_MASK)
40
41#define IOVMF_PGSZ_MASK (3 << 0)
42#define IOVMF_PGSZ_1M MMU_CAM_PGSZ_1M
43#define IOVMF_PGSZ_64K MMU_CAM_PGSZ_64K
44#define IOVMF_PGSZ_4K MMU_CAM_PGSZ_4K
45#define IOVMF_PGSZ_16M MMU_CAM_PGSZ_16M
46
47#define IOVMF_ENDIAN_MASK (1 << 9)
48#define IOVMF_ENDIAN_BIG MMU_RAM_ENDIAN_BIG
49#define IOVMF_ENDIAN_LITTLE MMU_RAM_ENDIAN_LITTLE
50
51#define IOVMF_ELSZ_MASK (3 << 7)
52#define IOVMF_ELSZ_8 MMU_RAM_ELSZ_8
53#define IOVMF_ELSZ_16 MMU_RAM_ELSZ_16
54#define IOVMF_ELSZ_32 MMU_RAM_ELSZ_32
55#define IOVMF_ELSZ_NONE MMU_RAM_ELSZ_NONE
56
57#define IOVMF_MIXED_MASK (1 << 6)
58#define IOVMF_MIXED MMU_RAM_MIXED
59
60/*
61 * iovma: s/w flags, used for mapping and umapping internally.
62 */
63#define IOVMF_MMIO (1 << IOVMF_SW_SHIFT)
64#define IOVMF_ALLOC (2 << IOVMF_SW_SHIFT)
65#define IOVMF_ALLOC_MASK (3 << IOVMF_SW_SHIFT)
66
67/* "superpages" is supported just with physically linear pages */
68#define IOVMF_DISCONT (1 << (2 + IOVMF_SW_SHIFT))
69#define IOVMF_LINEAR (2 << (2 + IOVMF_SW_SHIFT))
70#define IOVMF_LINEAR_MASK (3 << (2 + IOVMF_SW_SHIFT))
71
72#define IOVMF_DA_FIXED (1 << (4 + IOVMF_SW_SHIFT))
73
74
75extern struct iovm_struct *omap_find_iovm_area(struct device *dev, u32 da);
76extern u32
77omap_iommu_vmap(struct iommu_domain *domain, struct device *dev, u32 da,
78 const struct sg_table *sgt, u32 flags);
79extern struct sg_table *omap_iommu_vunmap(struct iommu_domain *domain,
80 struct device *dev, u32 da);
81extern u32
82omap_iommu_vmalloc(struct iommu_domain *domain, struct device *dev,
83 u32 da, size_t bytes, u32 flags);
84extern void
85omap_iommu_vfree(struct iommu_domain *domain, struct device *dev,
86 const u32 da);
87extern void *omap_da_to_va(struct device *dev, u32 da);
88
89#endif /* __IOMMU_MMAP_H */
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index db98e7021f0d..0abd1c469887 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -473,12 +473,13 @@ int s3c2410_dma_enqueue(enum dma_ch channel, void *id,
473 pr_debug("dma%d: %s: buffer %p queued onto non-empty channel\n", 473 pr_debug("dma%d: %s: buffer %p queued onto non-empty channel\n",
474 chan->number, __func__, buf); 474 chan->number, __func__, buf);
475 475
476 if (chan->end == NULL) 476 if (chan->end == NULL) {
477 pr_debug("dma%d: %s: %p not empty, and chan->end==NULL?\n", 477 pr_debug("dma%d: %s: %p not empty, and chan->end==NULL?\n",
478 chan->number, __func__, chan); 478 chan->number, __func__, chan);
479 479 } else {
480 chan->end->next = buf; 480 chan->end->next = buf;
481 chan->end = buf; 481 chan->end = buf;
482 }
482 } 483 }
483 484
484 /* if necessary, update the next buffer field */ 485 /* if necessary, update the next buffer field */
diff --git a/arch/arm64/include/asm/dma-mapping.h b/arch/arm64/include/asm/dma-mapping.h
index 538f4b44db5d..994776894198 100644
--- a/arch/arm64/include/asm/dma-mapping.h
+++ b/arch/arm64/include/asm/dma-mapping.h
@@ -50,6 +50,7 @@ static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr)
50static inline int dma_mapping_error(struct device *dev, dma_addr_t dev_addr) 50static inline int dma_mapping_error(struct device *dev, dma_addr_t dev_addr)
51{ 51{
52 struct dma_map_ops *ops = get_dma_ops(dev); 52 struct dma_map_ops *ops = get_dma_ops(dev);
53 debug_dma_mapping_error(dev, dev_addr);
53 return ops->mapping_error(dev, dev_addr); 54 return ops->mapping_error(dev, dev_addr);
54} 55}
55 56
diff --git a/arch/arm64/include/asm/unistd32.h b/arch/arm64/include/asm/unistd32.h
index 6d909faebf28..656a6f291a35 100644
--- a/arch/arm64/include/asm/unistd32.h
+++ b/arch/arm64/include/asm/unistd32.h
@@ -392,7 +392,7 @@ __SYSCALL(367, sys_fanotify_init)
392__SYSCALL(368, compat_sys_fanotify_mark_wrapper) 392__SYSCALL(368, compat_sys_fanotify_mark_wrapper)
393__SYSCALL(369, sys_prlimit64) 393__SYSCALL(369, sys_prlimit64)
394__SYSCALL(370, sys_name_to_handle_at) 394__SYSCALL(370, sys_name_to_handle_at)
395__SYSCALL(371, sys_open_by_handle_at) 395__SYSCALL(371, compat_sys_open_by_handle_at)
396__SYSCALL(372, sys_clock_adjtime) 396__SYSCALL(372, sys_clock_adjtime)
397__SYSCALL(373, sys_syncfs) 397__SYSCALL(373, sys_syncfs)
398 398
diff --git a/arch/c6x/include/asm/dma-mapping.h b/arch/c6x/include/asm/dma-mapping.h
index 03579fd99dba..3c694065030f 100644
--- a/arch/c6x/include/asm/dma-mapping.h
+++ b/arch/c6x/include/asm/dma-mapping.h
@@ -32,6 +32,7 @@ static inline int dma_set_mask(struct device *dev, u64 dma_mask)
32 */ 32 */
33static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 33static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
34{ 34{
35 debug_dma_mapping_error(dev, dma_addr);
35 return dma_addr == ~0; 36 return dma_addr == ~0;
36} 37}
37 38
diff --git a/arch/c6x/include/asm/setup.h b/arch/c6x/include/asm/setup.h
new file mode 100644
index 000000000000..ecead15872a6
--- /dev/null
+++ b/arch/c6x/include/asm/setup.h
@@ -0,0 +1,33 @@
1/*
2 * Port on Texas Instruments TMS320C6x architecture
3 *
4 * Copyright (C) 2004, 2009, 2010 2011 Texas Instruments Incorporated
5 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef _ASM_C6X_SETUP_H
12#define _ASM_C6X_SETUP_H
13
14#include <uapi/asm/setup.h>
15
16#ifndef __ASSEMBLY__
17extern char c6x_command_line[COMMAND_LINE_SIZE];
18
19extern int c6x_add_memory(phys_addr_t start, unsigned long size);
20
21extern unsigned long ram_start;
22extern unsigned long ram_end;
23
24extern int c6x_num_cores;
25extern unsigned int c6x_silicon_rev;
26extern unsigned int c6x_devstat;
27extern unsigned char c6x_fuse_mac[6];
28
29extern void machine_init(unsigned long dt_ptr);
30extern void time_init(void);
31
32#endif /* !__ASSEMBLY__ */
33#endif /* _ASM_C6X_SETUP_H */
diff --git a/arch/c6x/include/uapi/asm/Kbuild b/arch/c6x/include/uapi/asm/Kbuild
index c312b424c433..e9bc2b2b8147 100644
--- a/arch/c6x/include/uapi/asm/Kbuild
+++ b/arch/c6x/include/uapi/asm/Kbuild
@@ -1,6 +1,8 @@
1# UAPI Header export list 1# UAPI Header export list
2include include/uapi/asm-generic/Kbuild.asm 2include include/uapi/asm-generic/Kbuild.asm
3 3
4generic-y += kvm_para.h
5
4header-y += byteorder.h 6header-y += byteorder.h
5header-y += kvm_para.h 7header-y += kvm_para.h
6header-y += ptrace.h 8header-y += ptrace.h
diff --git a/arch/c6x/include/uapi/asm/kvm_para.h b/arch/c6x/include/uapi/asm/kvm_para.h
deleted file mode 100644
index 14fab8f0b957..000000000000
--- a/arch/c6x/include/uapi/asm/kvm_para.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/kvm_para.h>
diff --git a/arch/c6x/include/uapi/asm/setup.h b/arch/c6x/include/uapi/asm/setup.h
index a01e31896fa9..ad9ac97a8dad 100644
--- a/arch/c6x/include/uapi/asm/setup.h
+++ b/arch/c6x/include/uapi/asm/setup.h
@@ -1,33 +1,6 @@
1/* 1#ifndef _UAPI_ASM_C6X_SETUP_H
2 * Port on Texas Instruments TMS320C6x architecture 2#define _UAPI_ASM_C6X_SETUP_H
3 *
4 * Copyright (C) 2004, 2009, 2010 2011 Texas Instruments Incorporated
5 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef _ASM_C6X_SETUP_H
12#define _ASM_C6X_SETUP_H
13 3
14#define COMMAND_LINE_SIZE 1024 4#define COMMAND_LINE_SIZE 1024
15 5
16#ifndef __ASSEMBLY__ 6#endif /* _UAPI_ASM_C6X_SETUP_H */
17extern char c6x_command_line[COMMAND_LINE_SIZE];
18
19extern int c6x_add_memory(phys_addr_t start, unsigned long size);
20
21extern unsigned long ram_start;
22extern unsigned long ram_end;
23
24extern int c6x_num_cores;
25extern unsigned int c6x_silicon_rev;
26extern unsigned int c6x_devstat;
27extern unsigned char c6x_fuse_mac[6];
28
29extern void machine_init(unsigned long dt_ptr);
30extern void time_init(void);
31
32#endif /* !__ASSEMBLY__ */
33#endif /* _ASM_C6X_SETUP_H */
diff --git a/arch/c6x/kernel/entry.S b/arch/c6x/kernel/entry.S
index 5449c36018fe..0ed6157dd256 100644
--- a/arch/c6x/kernel/entry.S
+++ b/arch/c6x/kernel/entry.S
@@ -277,6 +277,8 @@ work_rescheduled:
277 [A1] BNOP .S1 work_resched,5 277 [A1] BNOP .S1 work_resched,5
278 278
279work_notifysig: 279work_notifysig:
280 ;; enable interrupts for do_notify_resume()
281 UNMASK_INT B2
280 B .S2 do_notify_resume 282 B .S2 do_notify_resume
281 LDW .D2T1 *+SP(REGS__END+8),A6 ; syscall flag 283 LDW .D2T1 *+SP(REGS__END+8),A6 ; syscall flag
282 ADDKPC .S2 resume_userspace,B3,1 284 ADDKPC .S2 resume_userspace,B3,1
@@ -427,8 +429,7 @@ ENTRY(ret_from_kernel_execve)
427ENDPROC(ret_from_kernel_execve) 429ENDPROC(ret_from_kernel_execve)
428 430
429 ;; 431 ;;
430 ;; These are the interrupt handlers, responsible for calling __do_IRQ() 432 ;; These are the interrupt handlers, responsible for calling c6x_do_IRQ()
431 ;; int6 is used for syscalls (see _system_call entry)
432 ;; 433 ;;
433 .macro SAVE_ALL_INT 434 .macro SAVE_ALL_INT
434 SAVE_ALL IRP,ITSR 435 SAVE_ALL IRP,ITSR
diff --git a/arch/ia64/include/asm/dma-mapping.h b/arch/ia64/include/asm/dma-mapping.h
index 4f5e8148440d..cf3ab7e784b5 100644
--- a/arch/ia64/include/asm/dma-mapping.h
+++ b/arch/ia64/include/asm/dma-mapping.h
@@ -58,6 +58,7 @@ static inline void dma_free_attrs(struct device *dev, size_t size,
58static inline int dma_mapping_error(struct device *dev, dma_addr_t daddr) 58static inline int dma_mapping_error(struct device *dev, dma_addr_t daddr)
59{ 59{
60 struct dma_map_ops *ops = platform_dma_get_ops(dev); 60 struct dma_map_ops *ops = platform_dma_get_ops(dev);
61 debug_dma_mapping_error(dev, daddr);
61 return ops->mapping_error(dev, daddr); 62 return ops->mapping_error(dev, daddr);
62} 63}
63 64
diff --git a/arch/m68k/include/asm/signal.h b/arch/m68k/include/asm/signal.h
index 67e489d8d1bd..2df26b57c26a 100644
--- a/arch/m68k/include/asm/signal.h
+++ b/arch/m68k/include/asm/signal.h
@@ -41,7 +41,7 @@ struct k_sigaction {
41static inline void sigaddset(sigset_t *set, int _sig) 41static inline void sigaddset(sigset_t *set, int _sig)
42{ 42{
43 asm ("bfset %0{%1,#1}" 43 asm ("bfset %0{%1,#1}"
44 : "+od" (*set) 44 : "+o" (*set)
45 : "id" ((_sig - 1) ^ 31) 45 : "id" ((_sig - 1) ^ 31)
46 : "cc"); 46 : "cc");
47} 47}
@@ -49,7 +49,7 @@ static inline void sigaddset(sigset_t *set, int _sig)
49static inline void sigdelset(sigset_t *set, int _sig) 49static inline void sigdelset(sigset_t *set, int _sig)
50{ 50{
51 asm ("bfclr %0{%1,#1}" 51 asm ("bfclr %0{%1,#1}"
52 : "+od" (*set) 52 : "+o" (*set)
53 : "id" ((_sig - 1) ^ 31) 53 : "id" ((_sig - 1) ^ 31)
54 : "cc"); 54 : "cc");
55} 55}
@@ -65,7 +65,7 @@ static inline int __gen_sigismember(sigset_t *set, int _sig)
65 int ret; 65 int ret;
66 asm ("bfextu %1{%2,#1},%0" 66 asm ("bfextu %1{%2,#1},%0"
67 : "=d" (ret) 67 : "=d" (ret)
68 : "od" (*set), "id" ((_sig-1) ^ 31) 68 : "o" (*set), "id" ((_sig-1) ^ 31)
69 : "cc"); 69 : "cc");
70 return ret; 70 return ret;
71} 71}
diff --git a/arch/microblaze/include/asm/dma-mapping.h b/arch/microblaze/include/asm/dma-mapping.h
index 01d228286cb0..46460f1c49c4 100644
--- a/arch/microblaze/include/asm/dma-mapping.h
+++ b/arch/microblaze/include/asm/dma-mapping.h
@@ -114,6 +114,8 @@ static inline void __dma_sync(unsigned long paddr,
114static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 114static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
115{ 115{
116 struct dma_map_ops *ops = get_dma_ops(dev); 116 struct dma_map_ops *ops = get_dma_ops(dev);
117
118 debug_dma_mapping_error(dev, dma_addr);
117 if (ops->mapping_error) 119 if (ops->mapping_error)
118 return ops->mapping_error(dev, dma_addr); 120 return ops->mapping_error(dev, dma_addr);
119 121
diff --git a/arch/microblaze/kernel/signal.c b/arch/microblaze/kernel/signal.c
index 3847e5b9c601..3903e3d11f5a 100644
--- a/arch/microblaze/kernel/signal.c
+++ b/arch/microblaze/kernel/signal.c
@@ -111,7 +111,7 @@ asmlinkage long sys_rt_sigreturn(struct pt_regs *regs)
111 111
112 /* It is more difficult to avoid calling this function than to 112 /* It is more difficult to avoid calling this function than to
113 call it and ignore errors. */ 113 call it and ignore errors. */
114 if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->r1)) 114 if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->r1) == -EFAULT)
115 goto badframe; 115 goto badframe;
116 116
117 return rval; 117 return rval;
diff --git a/arch/mips/include/asm/dma-mapping.h b/arch/mips/include/asm/dma-mapping.h
index be39a12901c6..006b43e38a9c 100644
--- a/arch/mips/include/asm/dma-mapping.h
+++ b/arch/mips/include/asm/dma-mapping.h
@@ -40,6 +40,8 @@ static inline int dma_supported(struct device *dev, u64 mask)
40static inline int dma_mapping_error(struct device *dev, u64 mask) 40static inline int dma_mapping_error(struct device *dev, u64 mask)
41{ 41{
42 struct dma_map_ops *ops = get_dma_ops(dev); 42 struct dma_map_ops *ops = get_dma_ops(dev);
43
44 debug_dma_mapping_error(dev, mask);
43 return ops->mapping_error(dev, mask); 45 return ops->mapping_error(dev, mask);
44} 46}
45 47
diff --git a/arch/mips/include/asm/hugetlb.h b/arch/mips/include/asm/hugetlb.h
index bd94946a18f3..ef99db994c2f 100644
--- a/arch/mips/include/asm/hugetlb.h
+++ b/arch/mips/include/asm/hugetlb.h
@@ -95,7 +95,17 @@ static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma,
95 pte_t *ptep, pte_t pte, 95 pte_t *ptep, pte_t pte,
96 int dirty) 96 int dirty)
97{ 97{
98 return ptep_set_access_flags(vma, addr, ptep, pte, dirty); 98 int changed = !pte_same(*ptep, pte);
99
100 if (changed) {
101 set_pte_at(vma->vm_mm, addr, ptep, pte);
102 /*
103 * There could be some standard sized pages in there,
104 * get them all.
105 */
106 flush_tlb_range(vma, addr, addr + HPAGE_SIZE);
107 }
108 return changed;
99} 109}
100 110
101static inline pte_t huge_ptep_get(pte_t *ptep) 111static inline pte_t huge_ptep_get(pte_t *ptep)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index b1fb7af3c350..cce3782c96c9 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -510,7 +510,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
510 c->cputype = CPU_R3000A; 510 c->cputype = CPU_R3000A;
511 __cpu_name[cpu] = "R3000A"; 511 __cpu_name[cpu] = "R3000A";
512 } 512 }
513 break;
514 } else { 513 } else {
515 c->cputype = CPU_R3000; 514 c->cputype = CPU_R3000;
516 __cpu_name[cpu] = "R3000"; 515 __cpu_name[cpu] = "R3000";
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index a6c133212003..9b00362f32f6 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -36,6 +36,11 @@ FEXPORT(ret_from_exception)
36FEXPORT(ret_from_irq) 36FEXPORT(ret_from_irq)
37 LONG_S s0, TI_REGS($28) 37 LONG_S s0, TI_REGS($28)
38FEXPORT(__ret_from_irq) 38FEXPORT(__ret_from_irq)
39/*
40 * We can be coming here from a syscall done in the kernel space,
41 * e.g. a failed kernel_execve().
42 */
43resume_userspace_check:
39 LONG_L t0, PT_STATUS(sp) # returning to kernel mode? 44 LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
40 andi t0, t0, KU_USER 45 andi t0, t0, KU_USER
41 beqz t0, resume_kernel 46 beqz t0, resume_kernel
@@ -162,7 +167,7 @@ work_notifysig: # deal with pending signals and
162 move a0, sp 167 move a0, sp
163 li a1, 0 168 li a1, 0
164 jal do_notify_resume # a2 already loaded 169 jal do_notify_resume # a2 already loaded
165 j resume_userspace 170 j resume_userspace_check
166 171
167FEXPORT(syscall_exit_partial) 172FEXPORT(syscall_exit_partial)
168 local_irq_disable # make sure need_resched doesn't 173 local_irq_disable # make sure need_resched doesn't
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index f6ba8381ee01..86ec03f0e00c 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -397,14 +397,14 @@ EXPORT(sysn32_call_table)
397 PTR sys_timerfd_create 397 PTR sys_timerfd_create
398 PTR compat_sys_timerfd_gettime /* 6285 */ 398 PTR compat_sys_timerfd_gettime /* 6285 */
399 PTR compat_sys_timerfd_settime 399 PTR compat_sys_timerfd_settime
400 PTR sys_signalfd4 400 PTR compat_sys_signalfd4
401 PTR sys_eventfd2 401 PTR sys_eventfd2
402 PTR sys_epoll_create1 402 PTR sys_epoll_create1
403 PTR sys_dup3 /* 6290 */ 403 PTR sys_dup3 /* 6290 */
404 PTR sys_pipe2 404 PTR sys_pipe2
405 PTR sys_inotify_init1 405 PTR sys_inotify_init1
406 PTR sys_preadv 406 PTR compat_sys_preadv
407 PTR sys_pwritev 407 PTR compat_sys_pwritev
408 PTR compat_sys_rt_tgsigqueueinfo /* 6295 */ 408 PTR compat_sys_rt_tgsigqueueinfo /* 6295 */
409 PTR sys_perf_event_open 409 PTR sys_perf_event_open
410 PTR sys_accept4 410 PTR sys_accept4
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index a53f8ec37aac..290dc6a1d7a3 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -79,7 +79,7 @@ static struct resource data_resource = { .name = "Kernel data", };
79void __init add_memory_region(phys_t start, phys_t size, long type) 79void __init add_memory_region(phys_t start, phys_t size, long type)
80{ 80{
81 int x = boot_mem_map.nr_map; 81 int x = boot_mem_map.nr_map;
82 struct boot_mem_map_entry *prev = boot_mem_map.map + x - 1; 82 int i;
83 83
84 /* Sanity check */ 84 /* Sanity check */
85 if (start + size < start) { 85 if (start + size < start) {
@@ -88,15 +88,29 @@ void __init add_memory_region(phys_t start, phys_t size, long type)
88 } 88 }
89 89
90 /* 90 /*
91 * Try to merge with previous entry if any. This is far less than 91 * Try to merge with existing entry, if any.
92 * perfect but is sufficient for most real world cases.
93 */ 92 */
94 if (x && prev->addr + prev->size == start && prev->type == type) { 93 for (i = 0; i < boot_mem_map.nr_map; i++) {
95 prev->size += size; 94 struct boot_mem_map_entry *entry = boot_mem_map.map + i;
95 unsigned long top;
96
97 if (entry->type != type)
98 continue;
99
100 if (start + size < entry->addr)
101 continue; /* no overlap */
102
103 if (entry->addr + entry->size < start)
104 continue; /* no overlap */
105
106 top = max(entry->addr + entry->size, start + size);
107 entry->addr = min(entry->addr, start);
108 entry->size = top - entry->addr;
109
96 return; 110 return;
97 } 111 }
98 112
99 if (x == BOOT_MEM_MAP_MAX) { 113 if (boot_mem_map.nr_map == BOOT_MEM_MAP_MAX) {
100 pr_err("Ooops! Too many entries in the memory map!\n"); 114 pr_err("Ooops! Too many entries in the memory map!\n");
101 return; 115 return;
102 } 116 }
diff --git a/arch/mips/lib/mips-atomic.c b/arch/mips/lib/mips-atomic.c
index e091430dbeb1..cd160be3ce4d 100644
--- a/arch/mips/lib/mips-atomic.c
+++ b/arch/mips/lib/mips-atomic.c
@@ -56,7 +56,7 @@ __asm__(
56 " .set pop \n" 56 " .set pop \n"
57 " .endm \n"); 57 " .endm \n");
58 58
59void arch_local_irq_disable(void) 59notrace void arch_local_irq_disable(void)
60{ 60{
61 preempt_disable(); 61 preempt_disable();
62 __asm__ __volatile__( 62 __asm__ __volatile__(
@@ -93,7 +93,7 @@ __asm__(
93 " .set pop \n" 93 " .set pop \n"
94 " .endm \n"); 94 " .endm \n");
95 95
96unsigned long arch_local_irq_save(void) 96notrace unsigned long arch_local_irq_save(void)
97{ 97{
98 unsigned long flags; 98 unsigned long flags;
99 preempt_disable(); 99 preempt_disable();
@@ -135,7 +135,7 @@ __asm__(
135 " .set pop \n" 135 " .set pop \n"
136 " .endm \n"); 136 " .endm \n");
137 137
138void arch_local_irq_restore(unsigned long flags) 138notrace void arch_local_irq_restore(unsigned long flags)
139{ 139{
140 unsigned long __tmp1; 140 unsigned long __tmp1;
141 141
@@ -159,7 +159,7 @@ void arch_local_irq_restore(unsigned long flags)
159EXPORT_SYMBOL(arch_local_irq_restore); 159EXPORT_SYMBOL(arch_local_irq_restore);
160 160
161 161
162void __arch_local_irq_restore(unsigned long flags) 162notrace void __arch_local_irq_restore(unsigned long flags)
163{ 163{
164 unsigned long __tmp1; 164 unsigned long __tmp1;
165 165
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index 4b9b935a070e..88e79ad6f811 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -120,18 +120,11 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
120 120
121 if (cpu_context(cpu, mm) != 0) { 121 if (cpu_context(cpu, mm) != 0) {
122 unsigned long size, flags; 122 unsigned long size, flags;
123 int huge = is_vm_hugetlb_page(vma);
124 123
125 ENTER_CRITICAL(flags); 124 ENTER_CRITICAL(flags);
126 if (huge) { 125 start = round_down(start, PAGE_SIZE << 1);
127 start = round_down(start, HPAGE_SIZE); 126 end = round_up(end, PAGE_SIZE << 1);
128 end = round_up(end, HPAGE_SIZE); 127 size = (end - start) >> (PAGE_SHIFT + 1);
129 size = (end - start) >> HPAGE_SHIFT;
130 } else {
131 start = round_down(start, PAGE_SIZE << 1);
132 end = round_up(end, PAGE_SIZE << 1);
133 size = (end - start) >> (PAGE_SHIFT + 1);
134 }
135 if (size <= current_cpu_data.tlbsize/2) { 128 if (size <= current_cpu_data.tlbsize/2) {
136 int oldpid = read_c0_entryhi(); 129 int oldpid = read_c0_entryhi();
137 int newpid = cpu_asid(cpu, mm); 130 int newpid = cpu_asid(cpu, mm);
@@ -140,10 +133,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
140 int idx; 133 int idx;
141 134
142 write_c0_entryhi(start | newpid); 135 write_c0_entryhi(start | newpid);
143 if (huge) 136 start += (PAGE_SIZE << 1);
144 start += HPAGE_SIZE;
145 else
146 start += (PAGE_SIZE << 1);
147 mtc0_tlbw_hazard(); 137 mtc0_tlbw_hazard();
148 tlb_probe(); 138 tlb_probe();
149 tlb_probe_hazard(); 139 tlb_probe_hazard();
diff --git a/arch/openrisc/kernel/signal.c b/arch/openrisc/kernel/signal.c
index 30110297f4f9..ddedc8a77861 100644
--- a/arch/openrisc/kernel/signal.c
+++ b/arch/openrisc/kernel/signal.c
@@ -84,7 +84,6 @@ asmlinkage long _sys_rt_sigreturn(struct pt_regs *regs)
84{ 84{
85 struct rt_sigframe *frame = (struct rt_sigframe __user *)regs->sp; 85 struct rt_sigframe *frame = (struct rt_sigframe __user *)regs->sp;
86 sigset_t set; 86 sigset_t set;
87 stack_t st;
88 87
89 /* 88 /*
90 * Since we stacked the signal on a dword boundary, 89 * Since we stacked the signal on a dword boundary,
@@ -104,11 +103,10 @@ asmlinkage long _sys_rt_sigreturn(struct pt_regs *regs)
104 if (restore_sigcontext(regs, &frame->uc.uc_mcontext)) 103 if (restore_sigcontext(regs, &frame->uc.uc_mcontext))
105 goto badframe; 104 goto badframe;
106 105
107 if (__copy_from_user(&st, &frame->uc.uc_stack, sizeof(st)))
108 goto badframe;
109 /* It is more difficult to avoid calling this function than to 106 /* It is more difficult to avoid calling this function than to
110 call it and ignore errors. */ 107 call it and ignore errors. */
111 do_sigaltstack(&st, NULL, regs->sp); 108 if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->sp) == -EFAULT)
109 goto badframe;
112 110
113 return regs->gpr[11]; 111 return regs->gpr[11];
114 112
diff --git a/arch/parisc/kernel/signal32.c b/arch/parisc/kernel/signal32.c
index fd49aeda9eb8..5dede04f2f3e 100644
--- a/arch/parisc/kernel/signal32.c
+++ b/arch/parisc/kernel/signal32.c
@@ -65,7 +65,8 @@ put_sigset32(compat_sigset_t __user *up, sigset_t *set, size_t sz)
65{ 65{
66 compat_sigset_t s; 66 compat_sigset_t s;
67 67
68 if (sz != sizeof *set) panic("put_sigset32()"); 68 if (sz != sizeof *set)
69 return -EINVAL;
69 sigset_64to32(&s, set); 70 sigset_64to32(&s, set);
70 71
71 return copy_to_user(up, &s, sizeof s); 72 return copy_to_user(up, &s, sizeof s);
@@ -77,7 +78,8 @@ get_sigset32(compat_sigset_t __user *up, sigset_t *set, size_t sz)
77 compat_sigset_t s; 78 compat_sigset_t s;
78 int r; 79 int r;
79 80
80 if (sz != sizeof *set) panic("put_sigset32()"); 81 if (sz != sizeof *set)
82 return -EINVAL;
81 83
82 if ((r = copy_from_user(&s, up, sz)) == 0) { 84 if ((r = copy_from_user(&s, up, sz)) == 0) {
83 sigset_32to64(set, &s); 85 sigset_32to64(set, &s);
diff --git a/arch/parisc/kernel/sys_parisc.c b/arch/parisc/kernel/sys_parisc.c
index 7426e40699bd..f76c10863c62 100644
--- a/arch/parisc/kernel/sys_parisc.c
+++ b/arch/parisc/kernel/sys_parisc.c
@@ -73,6 +73,8 @@ static unsigned long get_shared_area(struct address_space *mapping,
73 struct vm_area_struct *vma; 73 struct vm_area_struct *vma;
74 int offset = mapping ? get_offset(mapping) : 0; 74 int offset = mapping ? get_offset(mapping) : 0;
75 75
76 offset = (offset + (pgoff << PAGE_SHIFT)) & 0x3FF000;
77
76 addr = DCACHE_ALIGN(addr - offset) + offset; 78 addr = DCACHE_ALIGN(addr - offset) + offset;
77 79
78 for (vma = find_vma(current->mm, addr); ; vma = vma->vm_next) { 80 for (vma = find_vma(current->mm, addr); ; vma = vma->vm_next) {
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index 3735abd7f8f6..cbf5d59d5d6a 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -60,7 +60,7 @@
60 ENTRY_SAME(fork_wrapper) 60 ENTRY_SAME(fork_wrapper)
61 ENTRY_SAME(read) 61 ENTRY_SAME(read)
62 ENTRY_SAME(write) 62 ENTRY_SAME(write)
63 ENTRY_SAME(open) /* 5 */ 63 ENTRY_COMP(open) /* 5 */
64 ENTRY_SAME(close) 64 ENTRY_SAME(close)
65 ENTRY_SAME(waitpid) 65 ENTRY_SAME(waitpid)
66 ENTRY_SAME(creat) 66 ENTRY_SAME(creat)
diff --git a/arch/powerpc/boot/dts/mpc5200b.dtsi b/arch/powerpc/boot/dts/mpc5200b.dtsi
index 7ab286ab5300..39ed65a44c5f 100644
--- a/arch/powerpc/boot/dts/mpc5200b.dtsi
+++ b/arch/powerpc/boot/dts/mpc5200b.dtsi
@@ -231,6 +231,12 @@
231 interrupts = <2 7 0>; 231 interrupts = <2 7 0>;
232 }; 232 };
233 233
234 sclpc@3c00 {
235 compatible = "fsl,mpc5200-lpbfifo";
236 reg = <0x3c00 0x60>;
237 interrupts = <2 23 0>;
238 };
239
234 i2c@3d00 { 240 i2c@3d00 {
235 #address-cells = <1>; 241 #address-cells = <1>;
236 #size-cells = <0>; 242 #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/o2d.dtsi b/arch/powerpc/boot/dts/o2d.dtsi
index 3444eb8f0ade..24f668039295 100644
--- a/arch/powerpc/boot/dts/o2d.dtsi
+++ b/arch/powerpc/boot/dts/o2d.dtsi
@@ -86,12 +86,6 @@
86 reg = <0>; 86 reg = <0>;
87 }; 87 };
88 }; 88 };
89
90 sclpc@3c00 {
91 compatible = "fsl,mpc5200-lpbfifo";
92 reg = <0x3c00 0x60>;
93 interrupts = <3 23 0>;
94 };
95 }; 89 };
96 90
97 localbus { 91 localbus {
diff --git a/arch/powerpc/boot/dts/pcm030.dts b/arch/powerpc/boot/dts/pcm030.dts
index 9e354997eb7e..96512c058033 100644
--- a/arch/powerpc/boot/dts/pcm030.dts
+++ b/arch/powerpc/boot/dts/pcm030.dts
@@ -59,7 +59,7 @@
59 #gpio-cells = <2>; 59 #gpio-cells = <2>;
60 }; 60 };
61 61
62 psc@2000 { /* PSC1 in ac97 mode */ 62 audioplatform: psc@2000 { /* PSC1 in ac97 mode */
63 compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97"; 63 compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97";
64 cell-index = <0>; 64 cell-index = <0>;
65 }; 65 };
@@ -134,4 +134,9 @@
134 localbus { 134 localbus {
135 status = "disabled"; 135 status = "disabled";
136 }; 136 };
137
138 sound {
139 compatible = "phytec,pcm030-audio-fabric";
140 asoc-platform = <&audioplatform>;
141 };
137}; 142};
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index 78160874809a..e27e9ad6818e 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -172,6 +172,7 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
172{ 172{
173 struct dma_map_ops *dma_ops = get_dma_ops(dev); 173 struct dma_map_ops *dma_ops = get_dma_ops(dev);
174 174
175 debug_dma_mapping_error(dev, dma_addr);
175 if (dma_ops->mapping_error) 176 if (dma_ops->mapping_error)
176 return dma_ops->mapping_error(dev, dma_addr); 177 return dma_ops->mapping_error(dev, dma_addr);
177 178
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index 8520b58a5e9a..b89ef65392dc 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -372,10 +372,11 @@ static int mpc52xx_irqhost_map(struct irq_domain *h, unsigned int virq,
372 case MPC52xx_IRQ_L1_MAIN: irqchip = &mpc52xx_main_irqchip; break; 372 case MPC52xx_IRQ_L1_MAIN: irqchip = &mpc52xx_main_irqchip; break;
373 case MPC52xx_IRQ_L1_PERP: irqchip = &mpc52xx_periph_irqchip; break; 373 case MPC52xx_IRQ_L1_PERP: irqchip = &mpc52xx_periph_irqchip; break;
374 case MPC52xx_IRQ_L1_SDMA: irqchip = &mpc52xx_sdma_irqchip; break; 374 case MPC52xx_IRQ_L1_SDMA: irqchip = &mpc52xx_sdma_irqchip; break;
375 default: 375 case MPC52xx_IRQ_L1_CRIT:
376 pr_err("%s: invalid irq: virq=%i, l1=%i, l2=%i\n", 376 pr_warn("%s: Critical IRQ #%d is unsupported! Nopping it.\n",
377 __func__, virq, l1irq, l2irq); 377 __func__, l2irq);
378 return -EINVAL; 378 irq_set_chip(virq, &no_irq_chip);
379 return 0;
379 } 380 }
380 381
381 irq_set_chip_and_handler(virq, irqchip, handle_level_irq); 382 irq_set_chip_and_handler(virq, irqchip, handle_level_irq);
diff --git a/arch/powerpc/platforms/pseries/eeh_pe.c b/arch/powerpc/platforms/pseries/eeh_pe.c
index 797cd181dc3f..d16c8ded1084 100644
--- a/arch/powerpc/platforms/pseries/eeh_pe.c
+++ b/arch/powerpc/platforms/pseries/eeh_pe.c
@@ -449,7 +449,7 @@ int eeh_rmv_from_parent_pe(struct eeh_dev *edev, int purge_pe)
449 if (list_empty(&pe->edevs)) { 449 if (list_empty(&pe->edevs)) {
450 cnt = 0; 450 cnt = 0;
451 list_for_each_entry(child, &pe->child_list, child) { 451 list_for_each_entry(child, &pe->child_list, child) {
452 if (!(pe->type & EEH_PE_INVALID)) { 452 if (!(child->type & EEH_PE_INVALID)) {
453 cnt++; 453 cnt++;
454 break; 454 break;
455 } 455 }
diff --git a/arch/powerpc/platforms/pseries/msi.c b/arch/powerpc/platforms/pseries/msi.c
index d19f4977c834..e5b084723131 100644
--- a/arch/powerpc/platforms/pseries/msi.c
+++ b/arch/powerpc/platforms/pseries/msi.c
@@ -220,7 +220,8 @@ static struct device_node *find_pe_dn(struct pci_dev *dev, int *total)
220 220
221 /* Get the top level device in the PE */ 221 /* Get the top level device in the PE */
222 edev = of_node_to_eeh_dev(dn); 222 edev = of_node_to_eeh_dev(dn);
223 edev = list_first_entry(&edev->pe->edevs, struct eeh_dev, list); 223 if (edev->pe)
224 edev = list_first_entry(&edev->pe->edevs, struct eeh_dev, list);
224 dn = eeh_dev_to_of_node(edev); 225 dn = eeh_dev_to_of_node(edev);
225 if (!dn) 226 if (!dn)
226 return NULL; 227 return NULL;
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index ad79b846535c..827e094a2f49 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -28,7 +28,7 @@ ENTRY(sys32_open_wrapper)
28 llgtr %r2,%r2 # const char * 28 llgtr %r2,%r2 # const char *
29 lgfr %r3,%r3 # int 29 lgfr %r3,%r3 # int
30 lgfr %r4,%r4 # int 30 lgfr %r4,%r4 # int
31 jg sys_open # branch to system call 31 jg compat_sys_open # branch to system call
32 32
33ENTRY(sys32_close_wrapper) 33ENTRY(sys32_close_wrapper)
34 llgfr %r2,%r2 # unsigned int 34 llgfr %r2,%r2 # unsigned int
diff --git a/arch/score/kernel/signal.c b/arch/score/kernel/signal.c
index c268bbf8b410..02353bde92d8 100644
--- a/arch/score/kernel/signal.c
+++ b/arch/score/kernel/signal.c
@@ -148,7 +148,6 @@ score_rt_sigreturn(struct pt_regs *regs)
148{ 148{
149 struct rt_sigframe __user *frame; 149 struct rt_sigframe __user *frame;
150 sigset_t set; 150 sigset_t set;
151 stack_t st;
152 int sig; 151 int sig;
153 152
154 /* Always make any pending restarted system calls return -EINTR */ 153 /* Always make any pending restarted system calls return -EINTR */
@@ -168,12 +167,10 @@ score_rt_sigreturn(struct pt_regs *regs)
168 else if (sig) 167 else if (sig)
169 force_sig(sig, current); 168 force_sig(sig, current);
170 169
171 if (__copy_from_user(&st, &frame->rs_uc.uc_stack, sizeof(st)))
172 goto badframe;
173
174 /* It is more difficult to avoid calling this function than to 170 /* It is more difficult to avoid calling this function than to
175 call it and ignore errors. */ 171 call it and ignore errors. */
176 do_sigaltstack((stack_t __user *)&st, NULL, regs->regs[0]); 172 if (do_sigaltstack(&frame->rs_uc.uc_stack, NULL, regs->regs[0]) == -EFAULT)
173 goto badframe;
177 regs->is_syscall = 0; 174 regs->is_syscall = 0;
178 175
179 __asm__ __volatile__( 176 __asm__ __volatile__(
diff --git a/arch/sh/include/asm/dma-mapping.h b/arch/sh/include/asm/dma-mapping.h
index 8bd965e00a15..b437f2c780b8 100644
--- a/arch/sh/include/asm/dma-mapping.h
+++ b/arch/sh/include/asm/dma-mapping.h
@@ -46,6 +46,7 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
46{ 46{
47 struct dma_map_ops *ops = get_dma_ops(dev); 47 struct dma_map_ops *ops = get_dma_ops(dev);
48 48
49 debug_dma_mapping_error(dev, dma_addr);
49 if (ops->mapping_error) 50 if (ops->mapping_error)
50 return ops->mapping_error(dev, dma_addr); 51 return ops->mapping_error(dev, dma_addr);
51 52
diff --git a/arch/sh/kernel/signal_64.c b/arch/sh/kernel/signal_64.c
index 23853814bd17..d867cd95a622 100644
--- a/arch/sh/kernel/signal_64.c
+++ b/arch/sh/kernel/signal_64.c
@@ -347,7 +347,6 @@ asmlinkage int sys_rt_sigreturn(unsigned long r2, unsigned long r3,
347{ 347{
348 struct rt_sigframe __user *frame = (struct rt_sigframe __user *) (long) REF_REG_SP; 348 struct rt_sigframe __user *frame = (struct rt_sigframe __user *) (long) REF_REG_SP;
349 sigset_t set; 349 sigset_t set;
350 stack_t __user st;
351 long long ret; 350 long long ret;
352 351
353 /* Always make any pending restarted system calls return -EINTR */ 352 /* Always make any pending restarted system calls return -EINTR */
@@ -365,11 +364,10 @@ asmlinkage int sys_rt_sigreturn(unsigned long r2, unsigned long r3,
365 goto badframe; 364 goto badframe;
366 regs->pc -= 4; 365 regs->pc -= 4;
367 366
368 if (__copy_from_user(&st, &frame->uc.uc_stack, sizeof(st)))
369 goto badframe;
370 /* It is more difficult to avoid calling this function than to 367 /* It is more difficult to avoid calling this function than to
371 call it and ignore errors. */ 368 call it and ignore errors. */
372 do_sigaltstack(&st, NULL, REF_REG_SP); 369 if (do_sigaltstack(&frame->uc.uc_stack, NULL, REF_REG_SP) == -EFAULT)
370 goto badframe;
373 371
374 return (int) ret; 372 return (int) ret;
375 373
diff --git a/arch/sparc/boot/piggyback.c b/arch/sparc/boot/piggyback.c
index c0a798fcf030..bb7c95161d71 100644
--- a/arch/sparc/boot/piggyback.c
+++ b/arch/sparc/boot/piggyback.c
@@ -81,18 +81,18 @@ static void usage(void)
81 81
82static int start_line(const char *line) 82static int start_line(const char *line)
83{ 83{
84 if (strcmp(line + 8, " T _start\n") == 0) 84 if (strcmp(line + 10, " _start\n") == 0)
85 return 1; 85 return 1;
86 else if (strcmp(line + 16, " T _start\n") == 0) 86 else if (strcmp(line + 18, " _start\n") == 0)
87 return 1; 87 return 1;
88 return 0; 88 return 0;
89} 89}
90 90
91static int end_line(const char *line) 91static int end_line(const char *line)
92{ 92{
93 if (strcmp(line + 8, " A _end\n") == 0) 93 if (strcmp(line + 10, " _end\n") == 0)
94 return 1; 94 return 1;
95 else if (strcmp (line + 16, " A _end\n") == 0) 95 else if (strcmp (line + 18, " _end\n") == 0)
96 return 1; 96 return 1;
97 return 0; 97 return 0;
98} 98}
@@ -100,8 +100,8 @@ static int end_line(const char *line)
100/* 100/*
101 * Find address for start and end in System.map. 101 * Find address for start and end in System.map.
102 * The file looks like this: 102 * The file looks like this:
103 * f0004000 T _start 103 * f0004000 ... _start
104 * f0379f79 A _end 104 * f0379f79 ... _end
105 * 1234567890123456 105 * 1234567890123456
106 * ^coloumn 1 106 * ^coloumn 1
107 * There is support for 64 bit addresses too. 107 * There is support for 64 bit addresses too.
diff --git a/arch/sparc/include/asm/dma-mapping.h b/arch/sparc/include/asm/dma-mapping.h
index 8493fd3c7ba5..05fe53f5346e 100644
--- a/arch/sparc/include/asm/dma-mapping.h
+++ b/arch/sparc/include/asm/dma-mapping.h
@@ -59,6 +59,7 @@ static inline void dma_free_attrs(struct device *dev, size_t size,
59 59
60static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 60static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
61{ 61{
62 debug_dma_mapping_error(dev, dma_addr);
62 return (dma_addr == DMA_ERROR_CODE); 63 return (dma_addr == DMA_ERROR_CODE);
63} 64}
64 65
diff --git a/arch/sparc/include/asm/prom.h b/arch/sparc/include/asm/prom.h
index f93003123bce..67c62578d170 100644
--- a/arch/sparc/include/asm/prom.h
+++ b/arch/sparc/include/asm/prom.h
@@ -63,10 +63,13 @@ extern char *of_console_options;
63extern void irq_trans_init(struct device_node *dp); 63extern void irq_trans_init(struct device_node *dp);
64extern char *build_path_component(struct device_node *dp); 64extern char *build_path_component(struct device_node *dp);
65 65
66/* SPARC has a local implementation */ 66/* SPARC has local implementations */
67extern int of_address_to_resource(struct device_node *dev, int index, 67extern int of_address_to_resource(struct device_node *dev, int index,
68 struct resource *r); 68 struct resource *r);
69#define of_address_to_resource of_address_to_resource 69#define of_address_to_resource of_address_to_resource
70 70
71void __iomem *of_iomap(struct device_node *node, int index);
72#define of_iomap of_iomap
73
71#endif /* __KERNEL__ */ 74#endif /* __KERNEL__ */
72#endif /* _SPARC_PROM_H */ 75#endif /* _SPARC_PROM_H */
diff --git a/arch/sparc/kernel/signal_64.c b/arch/sparc/kernel/signal_64.c
index 867de2f8189c..689e1ba62809 100644
--- a/arch/sparc/kernel/signal_64.c
+++ b/arch/sparc/kernel/signal_64.c
@@ -295,9 +295,7 @@ void do_rt_sigreturn(struct pt_regs *regs)
295 err |= restore_fpu_state(regs, fpu_save); 295 err |= restore_fpu_state(regs, fpu_save);
296 296
297 err |= __copy_from_user(&set, &sf->mask, sizeof(sigset_t)); 297 err |= __copy_from_user(&set, &sf->mask, sizeof(sigset_t));
298 err |= do_sigaltstack(&sf->stack, NULL, (unsigned long)sf); 298 if (err || do_sigaltstack(&sf->stack, NULL, (unsigned long)sf) == -EFAULT)
299
300 if (err)
301 goto segv; 299 goto segv;
302 300
303 err |= __get_user(rwin_save, &sf->rwin_save); 301 err |= __get_user(rwin_save, &sf->rwin_save);
diff --git a/arch/sparc/kernel/sys32.S b/arch/sparc/kernel/sys32.S
index 44025f4ba41f..8475a474273a 100644
--- a/arch/sparc/kernel/sys32.S
+++ b/arch/sparc/kernel/sys32.S
@@ -47,7 +47,7 @@ STUB: sra REG1, 0, REG1; \
47 sra REG4, 0, REG4 47 sra REG4, 0, REG4
48 48
49SIGN1(sys32_exit, sparc_exit, %o0) 49SIGN1(sys32_exit, sparc_exit, %o0)
50SIGN1(sys32_exit_group, sys_exit_group, %o0) 50SIGN1(sys32_exit_group, sparc_exit_group, %o0)
51SIGN1(sys32_wait4, compat_sys_wait4, %o2) 51SIGN1(sys32_wait4, compat_sys_wait4, %o2)
52SIGN1(sys32_creat, sys_creat, %o1) 52SIGN1(sys32_creat, sys_creat, %o1)
53SIGN1(sys32_mknod, sys_mknod, %o1) 53SIGN1(sys32_mknod, sys_mknod, %o1)
diff --git a/arch/sparc/kernel/syscalls.S b/arch/sparc/kernel/syscalls.S
index 7f5f65d0b3fd..bf2347794e33 100644
--- a/arch/sparc/kernel/syscalls.S
+++ b/arch/sparc/kernel/syscalls.S
@@ -118,10 +118,20 @@ ret_from_syscall:
118 ba,pt %xcc, ret_sys_call 118 ba,pt %xcc, ret_sys_call
119 ldx [%sp + PTREGS_OFF + PT_V9_I0], %o0 119 ldx [%sp + PTREGS_OFF + PT_V9_I0], %o0
120 120
121 .globl sparc_exit_group
122 .type sparc_exit_group,#function
123sparc_exit_group:
124 sethi %hi(sys_exit_group), %g7
125 ba,pt %xcc, 1f
126 or %g7, %lo(sys_exit_group), %g7
127 .size sparc_exit_group,.-sparc_exit_group
128
121 .globl sparc_exit 129 .globl sparc_exit
122 .type sparc_exit,#function 130 .type sparc_exit,#function
123sparc_exit: 131sparc_exit:
124 rdpr %pstate, %g2 132 sethi %hi(sys_exit), %g7
133 or %g7, %lo(sys_exit), %g7
1341: rdpr %pstate, %g2
125 wrpr %g2, PSTATE_IE, %pstate 135 wrpr %g2, PSTATE_IE, %pstate
126 rdpr %otherwin, %g1 136 rdpr %otherwin, %g1
127 rdpr %cansave, %g3 137 rdpr %cansave, %g3
@@ -129,7 +139,7 @@ sparc_exit:
129 wrpr %g3, 0x0, %cansave 139 wrpr %g3, 0x0, %cansave
130 wrpr %g0, 0x0, %otherwin 140 wrpr %g0, 0x0, %otherwin
131 wrpr %g2, 0x0, %pstate 141 wrpr %g2, 0x0, %pstate
132 ba,pt %xcc, sys_exit 142 jmpl %g7, %g0
133 stb %g0, [%g6 + TI_WSAVED] 143 stb %g0, [%g6 + TI_WSAVED]
134 .size sparc_exit,.-sparc_exit 144 .size sparc_exit,.-sparc_exit
135 145
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S
index 1c9af9fa38e9..017b74a63dcb 100644
--- a/arch/sparc/kernel/systbls_64.S
+++ b/arch/sparc/kernel/systbls_64.S
@@ -133,7 +133,7 @@ sys_call_table:
133/*170*/ .word sys_lsetxattr, sys_fsetxattr, sys_getxattr, sys_lgetxattr, sys_getdents 133/*170*/ .word sys_lsetxattr, sys_fsetxattr, sys_getxattr, sys_lgetxattr, sys_getdents
134 .word sys_setsid, sys_fchdir, sys_fgetxattr, sys_listxattr, sys_llistxattr 134 .word sys_setsid, sys_fchdir, sys_fgetxattr, sys_listxattr, sys_llistxattr
135/*180*/ .word sys_flistxattr, sys_removexattr, sys_lremovexattr, sys_nis_syscall, sys_ni_syscall 135/*180*/ .word sys_flistxattr, sys_removexattr, sys_lremovexattr, sys_nis_syscall, sys_ni_syscall
136 .word sys_setpgid, sys_fremovexattr, sys_tkill, sys_exit_group, sys_newuname 136 .word sys_setpgid, sys_fremovexattr, sys_tkill, sparc_exit_group, sys_newuname
137/*190*/ .word sys_init_module, sys_sparc64_personality, sys_remap_file_pages, sys_epoll_create, sys_epoll_ctl 137/*190*/ .word sys_init_module, sys_sparc64_personality, sys_remap_file_pages, sys_epoll_create, sys_epoll_ctl
138 .word sys_epoll_wait, sys_ioprio_set, sys_getppid, sys_nis_syscall, sys_sgetmask 138 .word sys_epoll_wait, sys_ioprio_set, sys_getppid, sys_nis_syscall, sys_sgetmask
139/*200*/ .word sys_ssetmask, sys_nis_syscall, sys_newlstat, sys_uselib, sys_nis_syscall 139/*200*/ .word sys_ssetmask, sys_nis_syscall, sys_newlstat, sys_uselib, sys_nis_syscall
diff --git a/arch/tile/include/asm/dma-mapping.h b/arch/tile/include/asm/dma-mapping.h
index 4b6247d1a315..f2ff191376b4 100644
--- a/arch/tile/include/asm/dma-mapping.h
+++ b/arch/tile/include/asm/dma-mapping.h
@@ -72,6 +72,7 @@ static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
72static inline int 72static inline int
73dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 73dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
74{ 74{
75 debug_dma_mapping_error(dev, dma_addr);
75 return get_dma_ops(dev)->mapping_error(dev, dma_addr); 76 return get_dma_ops(dev)->mapping_error(dev, dma_addr);
76} 77}
77 78
diff --git a/arch/um/kernel/exec.c b/arch/um/kernel/exec.c
index 3a8ece7d09ca..0d7103c9eff3 100644
--- a/arch/um/kernel/exec.c
+++ b/arch/um/kernel/exec.c
@@ -32,13 +32,14 @@ void flush_thread(void)
32 "err = %d\n", ret); 32 "err = %d\n", ret);
33 force_sig(SIGKILL, current); 33 force_sig(SIGKILL, current);
34 } 34 }
35 get_safe_registers(current_pt_regs()->regs.gp,
36 current_pt_regs()->regs.fp);
35 37
36 __switch_mm(&current->mm->context.id); 38 __switch_mm(&current->mm->context.id);
37} 39}
38 40
39void start_thread(struct pt_regs *regs, unsigned long eip, unsigned long esp) 41void start_thread(struct pt_regs *regs, unsigned long eip, unsigned long esp)
40{ 42{
41 get_safe_registers(regs->regs.gp, regs->regs.fp);
42 PT_REGS_IP(regs) = eip; 43 PT_REGS_IP(regs) = eip;
43 PT_REGS_SP(regs) = esp; 44 PT_REGS_SP(regs) = esp;
44 current->ptrace &= ~PT_DTRACE; 45 current->ptrace &= ~PT_DTRACE;
diff --git a/arch/x86/boot/compressed/eboot.c b/arch/x86/boot/compressed/eboot.c
index c760e073963e..e87b0cac14b5 100644
--- a/arch/x86/boot/compressed/eboot.c
+++ b/arch/x86/boot/compressed/eboot.c
@@ -12,6 +12,8 @@
12#include <asm/setup.h> 12#include <asm/setup.h>
13#include <asm/desc.h> 13#include <asm/desc.h>
14 14
15#undef memcpy /* Use memcpy from misc.c */
16
15#include "eboot.h" 17#include "eboot.h"
16 18
17static efi_system_table_t *sys_table; 19static efi_system_table_t *sys_table;
diff --git a/arch/x86/boot/header.S b/arch/x86/boot/header.S
index 2a017441b8b2..8c132a625b94 100644
--- a/arch/x86/boot/header.S
+++ b/arch/x86/boot/header.S
@@ -476,6 +476,3 @@ die:
476setup_corrupt: 476setup_corrupt:
477 .byte 7 477 .byte 7
478 .string "No setup signature found...\n" 478 .string "No setup signature found...\n"
479
480 .data
481dummy: .long 0
diff --git a/arch/x86/include/asm/Kbuild b/arch/x86/include/asm/Kbuild
index 66e5f0ef0523..79fd8a3418f9 100644
--- a/arch/x86/include/asm/Kbuild
+++ b/arch/x86/include/asm/Kbuild
@@ -12,6 +12,7 @@ header-y += mce.h
12header-y += msr-index.h 12header-y += msr-index.h
13header-y += msr.h 13header-y += msr.h
14header-y += mtrr.h 14header-y += mtrr.h
15header-y += perf_regs.h
15header-y += posix_types_32.h 16header-y += posix_types_32.h
16header-y += posix_types_64.h 17header-y += posix_types_64.h
17header-y += posix_types_x32.h 18header-y += posix_types_x32.h
@@ -19,8 +20,10 @@ header-y += prctl.h
19header-y += processor-flags.h 20header-y += processor-flags.h
20header-y += ptrace-abi.h 21header-y += ptrace-abi.h
21header-y += sigcontext32.h 22header-y += sigcontext32.h
23header-y += svm.h
22header-y += ucontext.h 24header-y += ucontext.h
23header-y += vm86.h 25header-y += vm86.h
26header-y += vmx.h
24header-y += vsyscall.h 27header-y += vsyscall.h
25 28
26genhdr-y += unistd_32.h 29genhdr-y += unistd_32.h
diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h
index f7b4c7903e7e..808dae63eeea 100644
--- a/arch/x86/include/asm/dma-mapping.h
+++ b/arch/x86/include/asm/dma-mapping.h
@@ -47,6 +47,7 @@ static inline struct dma_map_ops *get_dma_ops(struct device *dev)
47static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 47static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
48{ 48{
49 struct dma_map_ops *ops = get_dma_ops(dev); 49 struct dma_map_ops *ops = get_dma_ops(dev);
50 debug_dma_mapping_error(dev, dma_addr);
50 if (ops->mapping_error) 51 if (ops->mapping_error)
51 return ops->mapping_error(dev, dma_addr); 52 return ops->mapping_error(dev, dma_addr);
52 53
diff --git a/arch/x86/include/asm/fpu-internal.h b/arch/x86/include/asm/fpu-internal.h
index 831dbb9c6c02..41ab26ea6564 100644
--- a/arch/x86/include/asm/fpu-internal.h
+++ b/arch/x86/include/asm/fpu-internal.h
@@ -399,14 +399,17 @@ static inline void drop_init_fpu(struct task_struct *tsk)
399typedef struct { int preload; } fpu_switch_t; 399typedef struct { int preload; } fpu_switch_t;
400 400
401/* 401/*
402 * FIXME! We could do a totally lazy restore, but we need to 402 * Must be run with preemption disabled: this clears the fpu_owner_task,
403 * add a per-cpu "this was the task that last touched the FPU 403 * on this CPU.
404 * on this CPU" variable, and the task needs to have a "I last
405 * touched the FPU on this CPU" and check them.
406 * 404 *
407 * We don't do that yet, so "fpu_lazy_restore()" always returns 405 * This will disable any lazy FPU state restore of the current FPU state,
408 * false, but some day.. 406 * but if the current thread owns the FPU, it will still be saved by.
409 */ 407 */
408static inline void __cpu_disable_lazy_restore(unsigned int cpu)
409{
410 per_cpu(fpu_owner_task, cpu) = NULL;
411}
412
410static inline int fpu_lazy_restore(struct task_struct *new, unsigned int cpu) 413static inline int fpu_lazy_restore(struct task_struct *new, unsigned int cpu)
411{ 414{
412 return new == this_cpu_read_stable(fpu_owner_task) && 415 return new == this_cpu_read_stable(fpu_owner_task) &&
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
index dcfde52979c3..19f16ebaf4fa 100644
--- a/arch/x86/include/asm/ptrace.h
+++ b/arch/x86/include/asm/ptrace.h
@@ -205,21 +205,14 @@ static inline bool user_64bit_mode(struct pt_regs *regs)
205} 205}
206#endif 206#endif
207 207
208/*
209 * X86_32 CPUs don't save ss and esp if the CPU is already in kernel mode
210 * when it traps. The previous stack will be directly underneath the saved
211 * registers, and 'sp/ss' won't even have been saved. Thus the '&regs->sp'.
212 *
213 * This is valid only for kernel mode traps.
214 */
215static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
216{
217#ifdef CONFIG_X86_32 208#ifdef CONFIG_X86_32
218 return (unsigned long)(&regs->sp); 209extern unsigned long kernel_stack_pointer(struct pt_regs *regs);
219#else 210#else
211static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
212{
220 return regs->sp; 213 return regs->sp;
221#endif
222} 214}
215#endif
223 216
224#define GET_IP(regs) ((regs)->ip) 217#define GET_IP(regs) ((regs)->ip)
225#define GET_FP(regs) ((regs)->bp) 218#define GET_FP(regs) ((regs)->bp)
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index f7e98a2c0d12..1b7d1656a042 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -631,6 +631,20 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
631 } 631 }
632 } 632 }
633 633
634 /*
635 * The way access filter has a performance penalty on some workloads.
636 * Disable it on the affected CPUs.
637 */
638 if ((c->x86 == 0x15) &&
639 (c->x86_model >= 0x02) && (c->x86_model < 0x20)) {
640 u64 val;
641
642 if (!rdmsrl_safe(0xc0011021, &val) && !(val & 0x1E)) {
643 val |= 0x1E;
644 wrmsrl_safe(0xc0011021, val);
645 }
646 }
647
634 cpu_detect_cache_sizes(c); 648 cpu_detect_cache_sizes(c);
635 649
636 /* Multi core CPU? */ 650 /* Multi core CPU? */
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 698b6ec12e0f..1ac581f38dfa 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -6,7 +6,7 @@
6 * 6 *
7 * Written by Jacob Shin - AMD, Inc. 7 * Written by Jacob Shin - AMD, Inc.
8 * 8 *
9 * Support: borislav.petkov@amd.com 9 * Maintained by: Borislav Petkov <bp@alien8.de>
10 * 10 *
11 * April 2006 11 * April 2006
12 * - added support for AMD Family 0x10 processors 12 * - added support for AMD Family 0x10 processors
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c
index 5f88abf07e9c..4f9a3cbfc4a3 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel.c
@@ -285,34 +285,39 @@ void cmci_clear(void)
285 raw_spin_unlock_irqrestore(&cmci_discover_lock, flags); 285 raw_spin_unlock_irqrestore(&cmci_discover_lock, flags);
286} 286}
287 287
288static long cmci_rediscover_work_func(void *arg)
289{
290 int banks;
291
292 /* Recheck banks in case CPUs don't all have the same */
293 if (cmci_supported(&banks))
294 cmci_discover(banks);
295
296 return 0;
297}
298
288/* 299/*
289 * After a CPU went down cycle through all the others and rediscover 300 * After a CPU went down cycle through all the others and rediscover
290 * Must run in process context. 301 * Must run in process context.
291 */ 302 */
292void cmci_rediscover(int dying) 303void cmci_rediscover(int dying)
293{ 304{
294 int banks; 305 int cpu, banks;
295 int cpu;
296 cpumask_var_t old;
297 306
298 if (!cmci_supported(&banks)) 307 if (!cmci_supported(&banks))
299 return; 308 return;
300 if (!alloc_cpumask_var(&old, GFP_KERNEL))
301 return;
302 cpumask_copy(old, &current->cpus_allowed);
303 309
304 for_each_online_cpu(cpu) { 310 for_each_online_cpu(cpu) {
305 if (cpu == dying) 311 if (cpu == dying)
306 continue; 312 continue;
307 if (set_cpus_allowed_ptr(current, cpumask_of(cpu))) 313
314 if (cpu == smp_processor_id()) {
315 cmci_rediscover_work_func(NULL);
308 continue; 316 continue;
309 /* Recheck banks in case CPUs don't all have the same */ 317 }
310 if (cmci_supported(&banks))
311 cmci_discover(banks);
312 }
313 318
314 set_cpus_allowed_ptr(current, old); 319 work_on_cpu(cpu, cmci_rediscover_work_func, NULL);
315 free_cpumask_var(old); 320 }
316} 321}
317 322
318/* 323/*
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index b51b2c7ee51f..1328fe49a3f1 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -995,8 +995,8 @@ END(interrupt)
995 */ 995 */
996 .p2align CONFIG_X86_L1_CACHE_SHIFT 996 .p2align CONFIG_X86_L1_CACHE_SHIFT
997common_interrupt: 997common_interrupt:
998 ASM_CLAC
999 XCPT_FRAME 998 XCPT_FRAME
999 ASM_CLAC
1000 addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */ 1000 addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */
1001 interrupt do_IRQ 1001 interrupt do_IRQ
1002 /* 0(%rsp): old_rsp-ARGOFFSET */ 1002 /* 0(%rsp): old_rsp-ARGOFFSET */
@@ -1135,8 +1135,8 @@ END(common_interrupt)
1135 */ 1135 */
1136.macro apicinterrupt num sym do_sym 1136.macro apicinterrupt num sym do_sym
1137ENTRY(\sym) 1137ENTRY(\sym)
1138 ASM_CLAC
1139 INTR_FRAME 1138 INTR_FRAME
1139 ASM_CLAC
1140 pushq_cfi $~(\num) 1140 pushq_cfi $~(\num)
1141.Lcommon_\sym: 1141.Lcommon_\sym:
1142 interrupt \do_sym 1142 interrupt \do_sym
@@ -1190,8 +1190,8 @@ apicinterrupt IRQ_WORK_VECTOR \
1190 */ 1190 */
1191.macro zeroentry sym do_sym 1191.macro zeroentry sym do_sym
1192ENTRY(\sym) 1192ENTRY(\sym)
1193 ASM_CLAC
1194 INTR_FRAME 1193 INTR_FRAME
1194 ASM_CLAC
1195 PARAVIRT_ADJUST_EXCEPTION_FRAME 1195 PARAVIRT_ADJUST_EXCEPTION_FRAME
1196 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ 1196 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
1197 subq $ORIG_RAX-R15, %rsp 1197 subq $ORIG_RAX-R15, %rsp
@@ -1208,8 +1208,8 @@ END(\sym)
1208 1208
1209.macro paranoidzeroentry sym do_sym 1209.macro paranoidzeroentry sym do_sym
1210ENTRY(\sym) 1210ENTRY(\sym)
1211 ASM_CLAC
1212 INTR_FRAME 1211 INTR_FRAME
1212 ASM_CLAC
1213 PARAVIRT_ADJUST_EXCEPTION_FRAME 1213 PARAVIRT_ADJUST_EXCEPTION_FRAME
1214 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ 1214 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
1215 subq $ORIG_RAX-R15, %rsp 1215 subq $ORIG_RAX-R15, %rsp
@@ -1227,8 +1227,8 @@ END(\sym)
1227#define INIT_TSS_IST(x) PER_CPU_VAR(init_tss) + (TSS_ist + ((x) - 1) * 8) 1227#define INIT_TSS_IST(x) PER_CPU_VAR(init_tss) + (TSS_ist + ((x) - 1) * 8)
1228.macro paranoidzeroentry_ist sym do_sym ist 1228.macro paranoidzeroentry_ist sym do_sym ist
1229ENTRY(\sym) 1229ENTRY(\sym)
1230 ASM_CLAC
1231 INTR_FRAME 1230 INTR_FRAME
1231 ASM_CLAC
1232 PARAVIRT_ADJUST_EXCEPTION_FRAME 1232 PARAVIRT_ADJUST_EXCEPTION_FRAME
1233 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ 1233 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
1234 subq $ORIG_RAX-R15, %rsp 1234 subq $ORIG_RAX-R15, %rsp
@@ -1247,8 +1247,8 @@ END(\sym)
1247 1247
1248.macro errorentry sym do_sym 1248.macro errorentry sym do_sym
1249ENTRY(\sym) 1249ENTRY(\sym)
1250 ASM_CLAC
1251 XCPT_FRAME 1250 XCPT_FRAME
1251 ASM_CLAC
1252 PARAVIRT_ADJUST_EXCEPTION_FRAME 1252 PARAVIRT_ADJUST_EXCEPTION_FRAME
1253 subq $ORIG_RAX-R15, %rsp 1253 subq $ORIG_RAX-R15, %rsp
1254 CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 1254 CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15
@@ -1266,8 +1266,8 @@ END(\sym)
1266 /* error code is on the stack already */ 1266 /* error code is on the stack already */
1267.macro paranoiderrorentry sym do_sym 1267.macro paranoiderrorentry sym do_sym
1268ENTRY(\sym) 1268ENTRY(\sym)
1269 ASM_CLAC
1270 XCPT_FRAME 1269 XCPT_FRAME
1270 ASM_CLAC
1271 PARAVIRT_ADJUST_EXCEPTION_FRAME 1271 PARAVIRT_ADJUST_EXCEPTION_FRAME
1272 subq $ORIG_RAX-R15, %rsp 1272 subq $ORIG_RAX-R15, %rsp
1273 CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 1273 CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index 957a47aec64e..4dac2f68ed4a 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -292,8 +292,8 @@ default_entry:
292 * be using the global pages. 292 * be using the global pages.
293 * 293 *
294 * NOTE! If we are on a 486 we may have no cr4 at all! 294 * NOTE! If we are on a 486 we may have no cr4 at all!
295 * Specifically, cr4 exists if and only if CPUID exists, 295 * Specifically, cr4 exists if and only if CPUID exists
296 * which in turn exists if and only if EFLAGS.ID exists. 296 * and has flags other than the FPU flag set.
297 */ 297 */
298 movl $X86_EFLAGS_ID,%ecx 298 movl $X86_EFLAGS_ID,%ecx
299 pushl %ecx 299 pushl %ecx
@@ -308,6 +308,11 @@ default_entry:
308 testl %ecx,%eax 308 testl %ecx,%eax
309 jz 6f # No ID flag = no CPUID = no CR4 309 jz 6f # No ID flag = no CPUID = no CR4
310 310
311 movl $1,%eax
312 cpuid
313 andl $~1,%edx # Ignore CPUID.FPU
314 jz 6f # No flags or only CPUID.FPU = no CR4
315
311 movl pa(mmu_cr4_features),%eax 316 movl pa(mmu_cr4_features),%eax
312 movl %eax,%cr4 317 movl %eax,%cr4
313 318
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c
index 7720ff5a9ee2..efdec7cd8e01 100644
--- a/arch/x86/kernel/microcode_amd.c
+++ b/arch/x86/kernel/microcode_amd.c
@@ -8,8 +8,8 @@
8 * Tigran Aivazian <tigran@aivazian.fsnet.co.uk> 8 * Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
9 * 9 *
10 * Maintainers: 10 * Maintainers:
11 * Andreas Herrmann <andreas.herrmann3@amd.com> 11 * Andreas Herrmann <herrmann.der.user@googlemail.com>
12 * Borislav Petkov <borislav.petkov@amd.com> 12 * Borislav Petkov <bp@alien8.de>
13 * 13 *
14 * This driver allows to upgrade microcode on F10h AMD 14 * This driver allows to upgrade microcode on F10h AMD
15 * CPUs and later. 15 * CPUs and later.
@@ -190,6 +190,7 @@ static unsigned int verify_patch_size(int cpu, u32 patch_size,
190#define F1XH_MPB_MAX_SIZE 2048 190#define F1XH_MPB_MAX_SIZE 2048
191#define F14H_MPB_MAX_SIZE 1824 191#define F14H_MPB_MAX_SIZE 1824
192#define F15H_MPB_MAX_SIZE 4096 192#define F15H_MPB_MAX_SIZE 4096
193#define F16H_MPB_MAX_SIZE 3458
193 194
194 switch (c->x86) { 195 switch (c->x86) {
195 case 0x14: 196 case 0x14:
@@ -198,6 +199,9 @@ static unsigned int verify_patch_size(int cpu, u32 patch_size,
198 case 0x15: 199 case 0x15:
199 max_size = F15H_MPB_MAX_SIZE; 200 max_size = F15H_MPB_MAX_SIZE;
200 break; 201 break;
202 case 0x16:
203 max_size = F16H_MPB_MAX_SIZE;
204 break;
201 default: 205 default:
202 max_size = F1XH_MPB_MAX_SIZE; 206 max_size = F1XH_MPB_MAX_SIZE;
203 break; 207 break;
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index b00b33a18390..974b67e46dd0 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -22,6 +22,7 @@
22#include <linux/perf_event.h> 22#include <linux/perf_event.h>
23#include <linux/hw_breakpoint.h> 23#include <linux/hw_breakpoint.h>
24#include <linux/rcupdate.h> 24#include <linux/rcupdate.h>
25#include <linux/module.h>
25 26
26#include <asm/uaccess.h> 27#include <asm/uaccess.h>
27#include <asm/pgtable.h> 28#include <asm/pgtable.h>
@@ -166,6 +167,35 @@ static inline bool invalid_selector(u16 value)
166 167
167#define FLAG_MASK FLAG_MASK_32 168#define FLAG_MASK FLAG_MASK_32
168 169
170/*
171 * X86_32 CPUs don't save ss and esp if the CPU is already in kernel mode
172 * when it traps. The previous stack will be directly underneath the saved
173 * registers, and 'sp/ss' won't even have been saved. Thus the '&regs->sp'.
174 *
175 * Now, if the stack is empty, '&regs->sp' is out of range. In this
176 * case we try to take the previous stack. To always return a non-null
177 * stack pointer we fall back to regs as stack if no previous stack
178 * exists.
179 *
180 * This is valid only for kernel mode traps.
181 */
182unsigned long kernel_stack_pointer(struct pt_regs *regs)
183{
184 unsigned long context = (unsigned long)regs & ~(THREAD_SIZE - 1);
185 unsigned long sp = (unsigned long)&regs->sp;
186 struct thread_info *tinfo;
187
188 if (context == (sp & ~(THREAD_SIZE - 1)))
189 return sp;
190
191 tinfo = (struct thread_info *)context;
192 if (tinfo->previous_esp)
193 return tinfo->previous_esp;
194
195 return (unsigned long)regs;
196}
197EXPORT_SYMBOL_GPL(kernel_stack_pointer);
198
169static unsigned long *pt_regs_access(struct pt_regs *regs, unsigned long regno) 199static unsigned long *pt_regs_access(struct pt_regs *regs, unsigned long regno)
170{ 200{
171 BUILD_BUG_ON(offsetof(struct pt_regs, bx) != 0); 201 BUILD_BUG_ON(offsetof(struct pt_regs, bx) != 0);
@@ -1511,6 +1541,13 @@ void syscall_trace_leave(struct pt_regs *regs)
1511{ 1541{
1512 bool step; 1542 bool step;
1513 1543
1544 /*
1545 * We may come here right after calling schedule_user()
1546 * or do_notify_resume(), in which case we can be in RCU
1547 * user mode.
1548 */
1549 rcu_user_exit();
1550
1514 audit_syscall_exit(regs); 1551 audit_syscall_exit(regs);
1515 1552
1516 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) 1553 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index c80a33bc528b..f3e2ec878b8c 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -68,6 +68,8 @@
68#include <asm/mwait.h> 68#include <asm/mwait.h>
69#include <asm/apic.h> 69#include <asm/apic.h>
70#include <asm/io_apic.h> 70#include <asm/io_apic.h>
71#include <asm/i387.h>
72#include <asm/fpu-internal.h>
71#include <asm/setup.h> 73#include <asm/setup.h>
72#include <asm/uv/uv.h> 74#include <asm/uv/uv.h>
73#include <linux/mc146818rtc.h> 75#include <linux/mc146818rtc.h>
@@ -818,6 +820,9 @@ int __cpuinit native_cpu_up(unsigned int cpu, struct task_struct *tidle)
818 820
819 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE; 821 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
820 822
823 /* the FPU context is blank, nobody can own it */
824 __cpu_disable_lazy_restore(cpu);
825
821 err = do_boot_cpu(apicid, cpu, tidle); 826 err = do_boot_cpu(apicid, cpu, tidle);
822 if (err) { 827 if (err) {
823 pr_debug("do_boot_cpu failed %d\n", err); 828 pr_debug("do_boot_cpu failed %d\n", err);
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 39171cb307ea..bba39bfa1c4b 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -426,8 +426,7 @@ static void invalidate_registers(struct x86_emulate_ctxt *ctxt)
426 _ASM_EXTABLE(1b, 3b) \ 426 _ASM_EXTABLE(1b, 3b) \
427 : "=m" ((ctxt)->eflags), "=&r" (_tmp), \ 427 : "=m" ((ctxt)->eflags), "=&r" (_tmp), \
428 "+a" (*rax), "+d" (*rdx), "+qm"(_ex) \ 428 "+a" (*rax), "+d" (*rdx), "+qm"(_ex) \
429 : "i" (EFLAGS_MASK), "m" ((ctxt)->src.val), \ 429 : "i" (EFLAGS_MASK), "m" ((ctxt)->src.val)); \
430 "a" (*rax), "d" (*rdx)); \
431 } while (0) 430 } while (0)
432 431
433/* instruction has only one source operand, destination is implicit (e.g. mul, div, imul, idiv) */ 432/* instruction has only one source operand, destination is implicit (e.g. mul, div, imul, idiv) */
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 0777f042e400..60f926cd8b0e 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -197,7 +197,7 @@ void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
197 } 197 }
198 198
199 if (end == TLB_FLUSH_ALL || tlb_flushall_shift == -1 199 if (end == TLB_FLUSH_ALL || tlb_flushall_shift == -1
200 || vmflag == VM_HUGETLB) { 200 || vmflag & VM_HUGETLB) {
201 local_flush_tlb(); 201 local_flush_tlb();
202 goto flush_all; 202 goto flush_all;
203 } 203 }
diff --git a/arch/x86/pci/ce4100.c b/arch/x86/pci/ce4100.c
index 41bd2a2d2c50..b914e20b5a00 100644
--- a/arch/x86/pci/ce4100.c
+++ b/arch/x86/pci/ce4100.c
@@ -115,6 +115,16 @@ static void sata_revid_read(struct sim_dev_reg *reg, u32 *value)
115 reg_read(reg, value); 115 reg_read(reg, value);
116} 116}
117 117
118static void reg_noirq_read(struct sim_dev_reg *reg, u32 *value)
119{
120 unsigned long flags;
121
122 raw_spin_lock_irqsave(&pci_config_lock, flags);
123 /* force interrupt pin value to 0 */
124 *value = reg->sim_reg.value & 0xfff00ff;
125 raw_spin_unlock_irqrestore(&pci_config_lock, flags);
126}
127
118static struct sim_dev_reg bus1_fixups[] = { 128static struct sim_dev_reg bus1_fixups[] = {
119 DEFINE_REG(2, 0, 0x10, (16*MB), reg_init, reg_read, reg_write) 129 DEFINE_REG(2, 0, 0x10, (16*MB), reg_init, reg_read, reg_write)
120 DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write) 130 DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write)
@@ -144,6 +154,7 @@ static struct sim_dev_reg bus1_fixups[] = {
144 DEFINE_REG(11, 5, 0x10, (64*KB), reg_init, reg_read, reg_write) 154 DEFINE_REG(11, 5, 0x10, (64*KB), reg_init, reg_read, reg_write)
145 DEFINE_REG(11, 6, 0x10, (256), reg_init, reg_read, reg_write) 155 DEFINE_REG(11, 6, 0x10, (256), reg_init, reg_read, reg_write)
146 DEFINE_REG(11, 7, 0x10, (64*KB), reg_init, reg_read, reg_write) 156 DEFINE_REG(11, 7, 0x10, (64*KB), reg_init, reg_read, reg_write)
157 DEFINE_REG(11, 7, 0x3c, 256, reg_init, reg_noirq_read, reg_write)
147 DEFINE_REG(12, 0, 0x10, (128*KB), reg_init, reg_read, reg_write) 158 DEFINE_REG(12, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
148 DEFINE_REG(12, 0, 0x14, (256), reg_init, reg_read, reg_write) 159 DEFINE_REG(12, 0, 0x14, (256), reg_init, reg_read, reg_write)
149 DEFINE_REG(12, 1, 0x10, (1024), reg_init, reg_read, reg_write) 160 DEFINE_REG(12, 1, 0x10, (1024), reg_init, reg_read, reg_write)
@@ -161,8 +172,10 @@ static struct sim_dev_reg bus1_fixups[] = {
161 DEFINE_REG(16, 0, 0x10, (64*KB), reg_init, reg_read, reg_write) 172 DEFINE_REG(16, 0, 0x10, (64*KB), reg_init, reg_read, reg_write)
162 DEFINE_REG(16, 0, 0x14, (64*MB), reg_init, reg_read, reg_write) 173 DEFINE_REG(16, 0, 0x14, (64*MB), reg_init, reg_read, reg_write)
163 DEFINE_REG(16, 0, 0x18, (64*MB), reg_init, reg_read, reg_write) 174 DEFINE_REG(16, 0, 0x18, (64*MB), reg_init, reg_read, reg_write)
175 DEFINE_REG(16, 0, 0x3c, 256, reg_init, reg_noirq_read, reg_write)
164 DEFINE_REG(17, 0, 0x10, (128*KB), reg_init, reg_read, reg_write) 176 DEFINE_REG(17, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
165 DEFINE_REG(18, 0, 0x10, (1*KB), reg_init, reg_read, reg_write) 177 DEFINE_REG(18, 0, 0x10, (1*KB), reg_init, reg_read, reg_write)
178 DEFINE_REG(18, 0, 0x3c, 256, reg_init, reg_noirq_read, reg_write)
166}; 179};
167 180
168static void __init init_sim_regs(void) 181static void __init init_sim_regs(void)
diff --git a/arch/x86/platform/ce4100/ce4100.c b/arch/x86/platform/ce4100/ce4100.c
index 4c61b52191eb..92525cb8e54c 100644
--- a/arch/x86/platform/ce4100/ce4100.c
+++ b/arch/x86/platform/ce4100/ce4100.c
@@ -21,12 +21,25 @@
21#include <asm/i8259.h> 21#include <asm/i8259.h>
22#include <asm/io.h> 22#include <asm/io.h>
23#include <asm/io_apic.h> 23#include <asm/io_apic.h>
24#include <asm/emergency-restart.h>
24 25
25static int ce4100_i8042_detect(void) 26static int ce4100_i8042_detect(void)
26{ 27{
27 return 0; 28 return 0;
28} 29}
29 30
31/*
32 * The CE4100 platform has an internal 8051 Microcontroller which is
33 * responsible for signaling to the external Power Management Unit the
34 * intention to reset, reboot or power off the system. This 8051 device has
35 * its command register mapped at I/O port 0xcf9 and the value 0x4 is used
36 * to power off the system.
37 */
38static void ce4100_power_off(void)
39{
40 outb(0x4, 0xcf9);
41}
42
30#ifdef CONFIG_SERIAL_8250 43#ifdef CONFIG_SERIAL_8250
31 44
32static unsigned int mem_serial_in(struct uart_port *p, int offset) 45static unsigned int mem_serial_in(struct uart_port *p, int offset)
@@ -139,8 +152,19 @@ void __init x86_ce4100_early_setup(void)
139 x86_init.mpparse.find_smp_config = x86_init_noop; 152 x86_init.mpparse.find_smp_config = x86_init_noop;
140 x86_init.pci.init = ce4100_pci_init; 153 x86_init.pci.init = ce4100_pci_init;
141 154
155 /*
156 * By default, the reboot method is ACPI which is supported by the
157 * CE4100 bootloader CEFDK using FADT.ResetReg Address and ResetValue
158 * the bootloader will however issue a system power off instead of
159 * reboot. By using BOOT_KBD we ensure proper system reboot as
160 * expected.
161 */
162 reboot_type = BOOT_KBD;
163
142#ifdef CONFIG_X86_IO_APIC 164#ifdef CONFIG_X86_IO_APIC
143 x86_init.pci.init_irq = sdv_pci_init; 165 x86_init.pci.init_irq = sdv_pci_init;
144 x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc_nocheck; 166 x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc_nocheck;
145#endif 167#endif
168
169 pm_power_off = ce4100_power_off;
146} 170}