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-rw-r--r--arch/mn10300/kernel/irq.c2
-rw-r--r--arch/x86/kvm/i8259.c2
-rw-r--r--arch/x86/kvm/mmu.c3
-rw-r--r--arch/x86/oprofile/op_model_amd.c24
4 files changed, 21 insertions, 10 deletions
diff --git a/arch/mn10300/kernel/irq.c b/arch/mn10300/kernel/irq.c
index c2e44597c22b..ac11754ecec5 100644
--- a/arch/mn10300/kernel/irq.c
+++ b/arch/mn10300/kernel/irq.c
@@ -459,7 +459,7 @@ void migrate_irqs(void)
459 tmp = CROSS_GxICR(irq, new); 459 tmp = CROSS_GxICR(irq, new);
460 460
461 x &= GxICR_LEVEL | GxICR_ENABLE; 461 x &= GxICR_LEVEL | GxICR_ENABLE;
462 if (GxICR(irq) & GxICR_REQUEST) { 462 if (GxICR(irq) & GxICR_REQUEST)
463 x |= GxICR_REQUEST | GxICR_DETECT; 463 x |= GxICR_REQUEST | GxICR_DETECT;
464 CROSS_GxICR(irq, new) = x; 464 CROSS_GxICR(irq, new) = x;
465 tmp = CROSS_GxICR(irq, new); 465 tmp = CROSS_GxICR(irq, new);
diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c
index f628234fbeca..3cece05e4ac4 100644
--- a/arch/x86/kvm/i8259.c
+++ b/arch/x86/kvm/i8259.c
@@ -575,6 +575,8 @@ struct kvm_pic *kvm_create_pic(struct kvm *kvm)
575 s->pics[1].elcr_mask = 0xde; 575 s->pics[1].elcr_mask = 0xde;
576 s->pics[0].pics_state = s; 576 s->pics[0].pics_state = s;
577 s->pics[1].pics_state = s; 577 s->pics[1].pics_state = s;
578 s->pics[0].isr_ack = 0xff;
579 s->pics[1].isr_ack = 0xff;
578 580
579 /* 581 /*
580 * Initialize PIO device 582 * Initialize PIO device
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index fb8b376bf28c..fbb04aee8301 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -2394,7 +2394,8 @@ static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
2394 ASSERT(!VALID_PAGE(root)); 2394 ASSERT(!VALID_PAGE(root));
2395 spin_lock(&vcpu->kvm->mmu_lock); 2395 spin_lock(&vcpu->kvm->mmu_lock);
2396 kvm_mmu_free_some_pages(vcpu); 2396 kvm_mmu_free_some_pages(vcpu);
2397 sp = kvm_mmu_get_page(vcpu, i << 30, i << 30, 2397 sp = kvm_mmu_get_page(vcpu, i << (30 - PAGE_SHIFT),
2398 i << 30,
2398 PT32_ROOT_LEVEL, 1, ACC_ALL, 2399 PT32_ROOT_LEVEL, 1, ACC_ALL,
2399 NULL); 2400 NULL);
2400 root = __pa(sp->spt); 2401 root = __pa(sp->spt);
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c
index a011bcc0f943..7d90d47655ba 100644
--- a/arch/x86/oprofile/op_model_amd.c
+++ b/arch/x86/oprofile/op_model_amd.c
@@ -630,21 +630,29 @@ static int __init_ibs_nmi(void)
630 return 0; 630 return 0;
631} 631}
632 632
633/* initialize the APIC for the IBS interrupts if available */ 633/*
634 * check and reserve APIC extended interrupt LVT offset for IBS if
635 * available
636 *
637 * init_ibs() preforms implicitly cpu-local operations, so pin this
638 * thread to its current CPU
639 */
640
634static void init_ibs(void) 641static void init_ibs(void)
635{ 642{
636 ibs_caps = get_ibs_caps(); 643 preempt_disable();
637 644
645 ibs_caps = get_ibs_caps();
638 if (!ibs_caps) 646 if (!ibs_caps)
639 return; 647 goto out;
640 648
641 if (__init_ibs_nmi()) { 649 if (__init_ibs_nmi() < 0)
642 ibs_caps = 0; 650 ibs_caps = 0;
643 return; 651 else
644 } 652 printk(KERN_INFO "oprofile: AMD IBS detected (0x%08x)\n", ibs_caps);
645 653
646 printk(KERN_INFO "oprofile: AMD IBS detected (0x%08x)\n", 654out:
647 (unsigned)ibs_caps); 655 preempt_enable();
648} 656}
649 657
650static int (*create_arch_files)(struct super_block *sb, struct dentry *root); 658static int (*create_arch_files)(struct super_block *sb, struct dentry *root);