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-rw-r--r--arch/Kconfig15
-rw-r--r--arch/alpha/include/asm/Kbuild1
-rw-r--r--arch/alpha/include/asm/ioctls.h3
-rw-r--r--arch/alpha/include/asm/mman.h11
-rw-r--r--arch/alpha/kernel/osf_sys.c6
-rw-r--r--arch/alpha/kernel/srmcons.c5
-rw-r--r--arch/arm/Kconfig6
-rw-r--r--arch/arm/Makefile4
-rw-r--r--arch/arm/boot/Makefile22
-rw-r--r--arch/arm/boot/compressed/head.S14
-rw-r--r--arch/arm/boot/dts/Makefile56
-rw-r--r--arch/arm/boot/dts/animeo_ip.dts178
-rw-r--r--arch/arm/boot/dts/at91rm9200.dtsi349
-rw-r--r--arch/arm/boot/dts/at91rm9200ek.dts79
-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi295
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi299
-rw-r--r--arch/arm/boot/dts/at91sam9263ek.dts29
-rw-r--r--arch/arm/boot/dts/at91sam9g15.dtsi28
-rw-r--r--arch/arm/boot/dts/at91sam9g15ek.dts16
-rw-r--r--arch/arm/boot/dts/at91sam9g20ek_2mmc.dts26
-rw-r--r--arch/arm/boot/dts/at91sam9g20ek_common.dtsi30
-rw-r--r--arch/arm/boot/dts/at91sam9g25.dtsi28
-rw-r--r--arch/arm/boot/dts/at91sam9g25ek.dts49
-rw-r--r--arch/arm/boot/dts/at91sam9g35.dtsi28
-rw-r--r--arch/arm/boot/dts/at91sam9g35ek.dts16
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi301
-rw-r--r--arch/arm/boot/dts/at91sam9m10g45ek.dts48
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi225
-rw-r--r--arch/arm/boot/dts/at91sam9n12ek.dts22
-rw-r--r--arch/arm/boot/dts/at91sam9x25.dtsi49
-rw-r--r--arch/arm/boot/dts/at91sam9x25ek.dts16
-rw-r--r--arch/arm/boot/dts/at91sam9x35.dtsi28
-rw-r--r--arch/arm/boot/dts/at91sam9x35ek.dts16
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi270
-rw-r--r--arch/arm/boot/dts/at91sam9x5ek.dtsi101
-rw-r--r--arch/arm/boot/dts/imx28.dtsi1
-rw-r--r--arch/arm/boot/dts/pm9g45.dts165
-rw-r--r--arch/arm/boot/dts/spear1310-evb.dts4
-rw-r--r--arch/arm/boot/dts/spear1310.dtsi27
-rw-r--r--arch/arm/boot/dts/spear1340-evb.dts4
-rw-r--r--arch/arm/boot/dts/spear1340.dtsi26
-rw-r--r--arch/arm/boot/dts/spear310.dtsi22
-rw-r--r--arch/arm/boot/dts/spear320-evb.dts4
-rw-r--r--arch/arm/boot/dts/spear320.dtsi23
-rw-r--r--arch/arm/boot/dts/tegra20-seaboard.dts4
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi4
-rw-r--r--arch/arm/common/timer-sp.c2
-rw-r--r--arch/arm/configs/afeb9260_defconfig2
-rw-r--r--arch/arm/configs/at91_dt_defconfig1
-rw-r--r--arch/arm/configs/at91sam9260_defconfig2
-rw-r--r--arch/arm/configs/at91sam9261_defconfig2
-rw-r--r--arch/arm/configs/at91sam9263_defconfig2
-rw-r--r--arch/arm/configs/at91sam9g20_defconfig2
-rw-r--r--arch/arm/configs/corgi_defconfig2
-rw-r--r--arch/arm/configs/davinci_all_defconfig2
-rw-r--r--arch/arm/configs/h7202_defconfig3
-rw-r--r--arch/arm/configs/magician_defconfig2
-rw-r--r--arch/arm/configs/mini2440_defconfig2
-rw-r--r--arch/arm/configs/omap1_defconfig3
-rw-r--r--arch/arm/configs/prima2_defconfig1
-rw-r--r--arch/arm/configs/spitz_defconfig2
-rw-r--r--arch/arm/configs/stamp9g20_defconfig2
-rw-r--r--arch/arm/configs/viper_defconfig2
-rw-r--r--arch/arm/configs/zeus_defconfig2
-rw-r--r--arch/arm/include/asm/Kbuild1
-rw-r--r--arch/arm/include/asm/hardware/sp810.h2
-rw-r--r--arch/arm/include/asm/io.h2
-rw-r--r--arch/arm/include/asm/prom.h2
-rw-r--r--arch/arm/mach-at91/Kconfig9
-rw-r--r--arch/arm/mach-at91/Makefile1
-rw-r--r--arch/arm/mach-at91/at91rm9200.c22
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c2
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c63
-rw-r--r--arch/arm/mach-at91/at91sam9260.c8
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c2
-rw-r--r--arch/arm/mach-at91/at91sam9261.c4
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c2
-rw-r--r--arch/arm/mach-at91/at91sam9263.c11
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c2
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c12
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c12
-rw-r--r--arch/arm/mach-at91/at91sam9n12.c16
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c4
-rw-r--r--arch/arm/mach-at91/at91sam9x5.c21
-rw-r--r--arch/arm/mach-at91/board-dt.c2
-rw-r--r--arch/arm/mach-at91/board-rm9200-dt.c57
-rw-r--r--arch/arm/mach-at91/generic.h1
-rw-r--r--arch/arm/mach-at91/gpio.c190
-rw-r--r--arch/arm/mach-at91/include/mach/board.h10
-rw-r--r--arch/arm/mach-at91/setup.c20
-rw-r--r--arch/arm/mach-at91/soc.h12
-rw-r--r--arch/arm/mach-cns3xxx/cns3420vb.c53
-rw-r--r--arch/arm/mach-davinci/dm644x.c3
-rw-r--r--arch/arm/mach-dove/include/mach/pm.h2
-rw-r--r--arch/arm/mach-dove/irq.c14
-rw-r--r--arch/arm/mach-exynos/dma.c3
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h1
-rw-r--r--arch/arm/mach-highbank/system.c3
-rw-r--r--arch/arm/mach-imx/clk-gate2.c2
-rw-r--r--arch/arm/mach-imx/ehci-imx25.c2
-rw-r--r--arch/arm/mach-imx/ehci-imx35.c2
-rw-r--r--arch/arm/mach-integrator/impd1.c69
-rw-r--r--arch/arm/mach-ixp4xx/common-pci.c1
-rw-r--r--arch/arm/mach-ixp4xx/common.c13
-rw-r--r--arch/arm/mach-ixp4xx/goramo_mlr.c3
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/debug-macro.S4
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h46
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/qmgr.h12
-rw-r--r--arch/arm/mach-ixp4xx/ixp4xx_npe.c9
-rw-r--r--arch/arm/mach-ixp4xx/ixp4xx_qmgr.c12
-rw-r--r--arch/arm/mach-kirkwood/pcie.c11
-rw-r--r--arch/arm/mach-nomadik/board-nhk8815.c3
-rw-r--r--arch/arm/mach-nomadik/cpu-8815.c2
-rw-r--r--arch/arm/mach-nomadik/i2c-8815nhk.c3
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c5
-rw-r--r--arch/arm/mach-omap2/board-overo.c1
-rw-r--r--arch/arm/mach-omap2/clockdomains44xx_data.c2
-rw-r--r--arch/arm/mach-omap2/common-board-devices.c34
-rw-r--r--arch/arm/mach-omap2/devices.c79
-rw-r--r--arch/arm/mach-omap2/drm.c7
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c63
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c36
-rw-r--r--arch/arm/mach-omap2/twl-common.c3
-rw-r--r--arch/arm/mach-omap2/vc.c2
-rw-r--r--arch/arm/mach-pxa/hx4700.c8
-rw-r--r--arch/arm/mach-pxa/spitz_pm.c8
-rw-r--r--arch/arm/mach-shmobile/board-kzm9g.c2
-rw-r--r--arch/arm/mach-u300/core.c5
-rw-r--r--arch/arm/mach-u300/include/mach/irqs.h126
-rw-r--r--arch/arm/mach-ux500/board-mop500-audio.c3
-rw-r--r--arch/arm/mach-ux500/board-mop500-pins.c3
-rw-r--r--arch/arm/mach-ux500/board-mop500.c2
-rw-r--r--arch/arm/mach-ux500/cpu-db8500.c12
-rw-r--r--arch/arm/mach-ux500/devices-common.c3
-rw-r--r--arch/arm/mach-ux500/devices-common.h8
-rw-r--r--arch/arm/mach-vexpress/v2m.c2
-rw-r--r--arch/arm/mm/mmap.c134
-rw-r--r--arch/arm/mm/proc-v6.S2
-rw-r--r--arch/arm/plat-nomadik/include/plat/gpio-nomadik.h102
-rw-r--r--arch/arm/plat-nomadik/include/plat/pincfg.h173
-rw-r--r--arch/arm/plat-omap/i2c.c21
-rw-r--r--arch/arm/plat-omap/include/plat/mmc.h1
-rw-r--r--arch/arm/plat-omap/include/plat/omap-serial.h55
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h6
-rw-r--r--arch/arm/plat-omap/include/plat/serial.h9
-rw-r--r--arch/arm/plat-s3c24xx/dma.c9
-rw-r--r--arch/arm/plat-spear/Kconfig1
-rw-r--r--arch/arm/tools/Makefile2
-rw-r--r--arch/arm64/Makefile17
-rw-r--r--arch/arm64/boot/Makefile5
-rw-r--r--arch/arm64/boot/dts/.gitignore1
-rw-r--r--arch/arm64/boot/dts/Makefile5
-rw-r--r--arch/arm64/include/asm/Kbuild1
-rw-r--r--arch/arm64/include/asm/io.h2
-rw-r--r--arch/arm64/include/asm/pgtable-hwdef.h6
-rw-r--r--arch/arm64/include/asm/pgtable.h40
-rw-r--r--arch/arm64/include/asm/unistd32.h2
-rw-r--r--arch/avr32/Kconfig3
-rw-r--r--arch/avr32/configs/atngw100_defconfig2
-rw-r--r--arch/avr32/configs/atngw100_evklcd100_defconfig2
-rw-r--r--arch/avr32/configs/atngw100_evklcd101_defconfig2
-rw-r--r--arch/avr32/configs/atngw100_mrmt_defconfig2
-rw-r--r--arch/avr32/configs/atngw100mkii_defconfig2
-rw-r--r--arch/avr32/configs/atngw100mkii_evklcd100_defconfig2
-rw-r--r--arch/avr32/configs/atngw100mkii_evklcd101_defconfig2
-rw-r--r--arch/avr32/configs/atstk1002_defconfig2
-rw-r--r--arch/avr32/configs/atstk1003_defconfig2
-rw-r--r--arch/avr32/configs/atstk1004_defconfig2
-rw-r--r--arch/avr32/configs/atstk1006_defconfig2
-rw-r--r--arch/avr32/configs/favr-32_defconfig2
-rw-r--r--arch/avr32/configs/hammerhead_defconfig2
-rw-r--r--arch/avr32/include/asm/Kbuild1
-rw-r--r--arch/blackfin/configs/CM-BF527_defconfig2
-rw-r--r--arch/blackfin/configs/CM-BF548_defconfig2
-rw-r--r--arch/blackfin/configs/CM-BF561_defconfig2
-rw-r--r--arch/blackfin/include/asm/Kbuild1
-rw-r--r--arch/c6x/Makefile2
-rw-r--r--arch/c6x/boot/Makefile20
-rw-r--r--arch/c6x/boot/dts/Makefile20
-rw-r--r--arch/c6x/boot/dts/linked_dtb.S2
-rw-r--r--arch/c6x/boot/linked_dtb.S2
-rw-r--r--arch/c6x/include/asm/Kbuild1
-rw-r--r--arch/c6x/include/asm/setup.h33
-rw-r--r--arch/c6x/include/uapi/asm/Kbuild2
-rw-r--r--arch/c6x/include/uapi/asm/kvm_para.h1
-rw-r--r--arch/c6x/include/uapi/asm/setup.h33
-rw-r--r--arch/c6x/kernel/entry.S5
-rw-r--r--arch/cris/include/asm/Kbuild1
-rw-r--r--arch/frv/include/asm/Kbuild1
-rw-r--r--arch/h8300/include/asm/Kbuild1
-rw-r--r--arch/hexagon/include/asm/Kbuild1
-rw-r--r--arch/ia64/hp/sim/simserial.c1
-rw-r--r--arch/ia64/include/asm/Kbuild1
-rw-r--r--arch/ia64/include/asm/cputime.h2
-rw-r--r--arch/ia64/include/asm/device.h3
-rw-r--r--arch/ia64/include/asm/io.h2
-rw-r--r--arch/ia64/kernel/acpi.c2
-rw-r--r--arch/ia64/kernel/efi.c2
-rw-r--r--arch/ia64/kernel/time.c22
-rw-r--r--arch/ia64/mm/init.c1
-rw-r--r--arch/m32r/include/asm/Kbuild1
-rw-r--r--arch/m68k/emu/nfcon.c6
-rw-r--r--arch/m68k/include/asm/Kbuild1
-rw-r--r--arch/m68k/include/asm/signal.h6
-rw-r--r--arch/microblaze/Makefile2
-rw-r--r--arch/microblaze/boot/Makefile19
-rw-r--r--arch/microblaze/boot/dts/Makefile22
-rw-r--r--arch/microblaze/boot/dts/linked_dtb.S2
-rw-r--r--arch/microblaze/boot/linked_dtb.S3
-rw-r--r--arch/microblaze/include/asm/Kbuild1
-rw-r--r--arch/microblaze/kernel/signal.c2
-rw-r--r--arch/microblaze/pci/pci-common.c4
-rw-r--r--arch/mips/alchemy/common/Makefile2
-rw-r--r--arch/mips/alchemy/common/platform.c58
-rw-r--r--arch/mips/alchemy/common/usb.c614
-rw-r--r--arch/mips/ath79/dev-usb.c2
-rw-r--r--arch/mips/cavium-octeon/Makefile3
-rw-r--r--arch/mips/cavium-octeon/executive/cvmx-l2c.c1
-rw-r--r--arch/mips/configs/bcm47xx_defconfig2
-rw-r--r--arch/mips/configs/db1000_defconfig1
-rw-r--r--arch/mips/configs/db1235_defconfig2
-rw-r--r--arch/mips/configs/gpr_defconfig1
-rw-r--r--arch/mips/configs/ls1b_defconfig1
-rw-r--r--arch/mips/configs/mtx1_defconfig3
-rw-r--r--arch/mips/fw/arc/misc.c1
-rw-r--r--arch/mips/include/asm/Kbuild1
-rw-r--r--arch/mips/include/asm/bitops.h128
-rw-r--r--arch/mips/include/asm/compat.h2
-rw-r--r--arch/mips/include/asm/hugetlb.h12
-rw-r--r--arch/mips/include/asm/io.h1
-rw-r--r--arch/mips/include/asm/irqflags.h207
-rw-r--r--arch/mips/include/asm/thread_info.h6
-rw-r--r--arch/mips/include/uapi/asm/ioctls.h3
-rw-r--r--arch/mips/include/uapi/asm/mman.h11
-rw-r--r--arch/mips/kernel/cpu-probe.c1
-rw-r--r--arch/mips/kernel/entry.S7
-rw-r--r--arch/mips/kernel/scall64-n32.S6
-rw-r--r--arch/mips/kernel/setup.c26
-rw-r--r--arch/mips/lantiq/dts/Makefile3
-rw-r--r--arch/mips/lib/Makefile5
-rw-r--r--arch/mips/lib/bitops.c179
-rw-r--r--arch/mips/lib/mips-atomic.c176
-rw-r--r--arch/mips/loongson1/common/platform.c7
-rw-r--r--arch/mips/mm/mmap.c111
-rw-r--r--arch/mips/mm/tlb-r4k.c18
-rw-r--r--arch/mips/mti-malta/malta-platform.c3
-rw-r--r--arch/mips/netlogic/dts/Makefile3
-rw-r--r--arch/mips/netlogic/xlr/platform.c17
-rw-r--r--arch/mips/pci/pci.c2
-rw-r--r--arch/mips/pnx8550/common/platform.c31
-rw-r--r--arch/mn10300/include/asm/Kbuild1
-rw-r--r--arch/openrisc/Makefile2
-rw-r--r--arch/openrisc/boot/dts/Makefile (renamed from arch/openrisc/boot/Makefile)5
-rw-r--r--arch/openrisc/include/asm/Kbuild1
-rw-r--r--arch/openrisc/kernel/signal.c6
-rw-r--r--arch/parisc/include/asm/Kbuild1
-rw-r--r--arch/parisc/include/uapi/asm/ioctls.h3
-rw-r--r--arch/parisc/include/uapi/asm/mman.h11
-rw-r--r--arch/parisc/kernel/pdc_cons.c5
-rw-r--r--arch/parisc/kernel/signal32.c6
-rw-r--r--arch/parisc/kernel/sys_parisc.c2
-rw-r--r--arch/parisc/kernel/syscall_table.S2
-rw-r--r--arch/powerpc/boot/dts/mpc5200b.dtsi6
-rw-r--r--arch/powerpc/boot/dts/o2d.dtsi6
-rw-r--r--arch/powerpc/boot/dts/pcm030.dts7
-rw-r--r--arch/powerpc/include/asm/Kbuild1
-rw-r--r--arch/powerpc/include/asm/cputime.h2
-rw-r--r--arch/powerpc/include/uapi/asm/ioctls.h3
-rw-r--r--arch/powerpc/kernel/pci-common.c4
-rw-r--r--arch/powerpc/kernel/pci_64.c4
-rw-r--r--arch/powerpc/kernel/signal.c4
-rw-r--r--arch/powerpc/kernel/sysfs.c4
-rw-r--r--arch/powerpc/kernel/time.c20
-rw-r--r--arch/powerpc/kernel/uprobes.c6
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_pic.c9
-rw-r--r--arch/powerpc/platforms/cell/celleb_pci.c4
-rw-r--r--arch/powerpc/platforms/powermac/pfunc_core.c2
-rw-r--r--arch/powerpc/platforms/pseries/eeh_pe.c2
-rw-r--r--arch/powerpc/platforms/pseries/msi.c3
-rw-r--r--arch/powerpc/platforms/pseries/processor_idle.c4
-rw-r--r--arch/powerpc/platforms/pseries/reconfig.c3
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c2
-rw-r--r--arch/powerpc/sysdev/scom.c2
-rw-r--r--arch/s390/Kconfig1
-rw-r--r--arch/s390/include/asm/Kbuild1
-rw-r--r--arch/s390/include/asm/compat.h2
-rw-r--r--arch/s390/include/asm/cputime.h1
-rw-r--r--arch/s390/include/asm/page.h3
-rw-r--r--arch/s390/include/asm/topology.h3
-rw-r--r--arch/s390/include/uapi/asm/ptrace.h4
-rw-r--r--arch/s390/kernel/compat_signal.c14
-rw-r--r--arch/s390/kernel/compat_wrapper.S2
-rw-r--r--arch/s390/kernel/signal.c14
-rw-r--r--arch/s390/kernel/topology.c6
-rw-r--r--arch/s390/kernel/vtime.c13
-rw-r--r--arch/s390/kvm/kvm-s390.c4
-rw-r--r--arch/s390/mm/gup.c5
-rw-r--r--arch/score/include/asm/Kbuild1
-rw-r--r--arch/score/kernel/signal.c7
-rw-r--r--arch/sh/configs/ecovec24_defconfig2
-rw-r--r--arch/sh/configs/se7724_defconfig2
-rw-r--r--arch/sh/drivers/pci/pci.c2
-rw-r--r--arch/sh/include/asm/Kbuild1
-rw-r--r--arch/sh/include/asm/io.h2
-rw-r--r--arch/sh/include/uapi/asm/ioctls.h3
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7720.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7757.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7763.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7786.c6
-rw-r--r--arch/sh/kernel/signal_64.c6
-rw-r--r--arch/sh/mm/mmap.c139
-rw-r--r--arch/sparc/boot/piggyback.c12
-rw-r--r--arch/sparc/include/asm/Kbuild1
-rw-r--r--arch/sparc/include/asm/prom.h5
-rw-r--r--arch/sparc/include/uapi/asm/ioctls.h3
-rw-r--r--arch/sparc/kernel/pci_impl.h2
-rw-r--r--arch/sparc/kernel/signal_64.c4
-rw-r--r--arch/sparc/kernel/sys32.S2
-rw-r--r--arch/sparc/kernel/sys_sparc_32.c27
-rw-r--r--arch/sparc/kernel/sys_sparc_64.c150
-rw-r--r--arch/sparc/kernel/syscalls.S14
-rw-r--r--arch/sparc/kernel/systbls_64.S2
-rw-r--r--arch/sparc/mm/hugetlbpage.c124
-rw-r--r--arch/tile/include/asm/Kbuild1
-rw-r--r--arch/tile/mm/hugetlbpage.c139
-rw-r--r--arch/um/drivers/chan_kern.c17
-rw-r--r--arch/um/drivers/line.c2
-rw-r--r--arch/um/drivers/mconsole_kern.c2
-rw-r--r--arch/um/include/asm/Kbuild1
-rw-r--r--arch/um/kernel/exec.c3
-rw-r--r--arch/unicore32/Kconfig7
-rw-r--r--arch/unicore32/include/asm/Kbuild2
-rw-r--r--arch/unicore32/include/asm/bug.h5
-rw-r--r--arch/unicore32/include/asm/cmpxchg.h2
-rw-r--r--arch/unicore32/include/asm/kvm_para.h1
-rw-r--r--arch/unicore32/include/asm/processor.h5
-rw-r--r--arch/unicore32/include/asm/ptrace.h76
-rw-r--r--arch/unicore32/include/uapi/asm/Kbuild7
-rw-r--r--arch/unicore32/include/uapi/asm/byteorder.h (renamed from arch/unicore32/include/asm/byteorder.h)0
-rw-r--r--arch/unicore32/include/uapi/asm/ptrace.h90
-rw-r--r--arch/unicore32/include/uapi/asm/sigcontext.h (renamed from arch/unicore32/include/asm/sigcontext.h)0
-rw-r--r--arch/unicore32/include/uapi/asm/unistd.h (renamed from arch/unicore32/include/asm/unistd.h)1
-rw-r--r--arch/unicore32/kernel/entry.S20
-rw-r--r--arch/unicore32/kernel/pci.c2
-rw-r--r--arch/unicore32/kernel/process.c58
-rw-r--r--arch/unicore32/kernel/setup.h6
-rw-r--r--arch/unicore32/kernel/sys.c63
-rw-r--r--arch/unicore32/mm/fault.c37
-rw-r--r--arch/x86/Kconfig59
-rw-r--r--arch/x86/Kconfig.cpu73
-rw-r--r--arch/x86/Makefile_32.cpu1
-rw-r--r--arch/x86/boot/compressed/eboot.c2
-rw-r--r--arch/x86/boot/header.S3
-rw-r--r--arch/x86/include/asm/Kbuild3
-rw-r--r--arch/x86/include/asm/atomic.h16
-rw-r--r--arch/x86/include/asm/cmpxchg_32.h55
-rw-r--r--arch/x86/include/asm/context_tracking.h (renamed from arch/x86/include/asm/rcu.h)15
-rw-r--r--arch/x86/include/asm/cpu.h4
-rw-r--r--arch/x86/include/asm/cpufeature.h7
-rw-r--r--arch/x86/include/asm/device.h3
-rw-r--r--arch/x86/include/asm/elf.h6
-rw-r--r--arch/x86/include/asm/fpu-internal.h15
-rw-r--r--arch/x86/include/asm/futex.h12
-rw-r--r--arch/x86/include/asm/local.h18
-rw-r--r--arch/x86/include/asm/mman.h3
-rw-r--r--arch/x86/include/asm/module.h2
-rw-r--r--arch/x86/include/asm/msr-index.h2
-rw-r--r--arch/x86/include/asm/percpu.h3
-rw-r--r--arch/x86/include/asm/processor.h35
-rw-r--r--arch/x86/include/asm/ptrace.h24
-rw-r--r--arch/x86/include/asm/smp.h1
-rw-r--r--arch/x86/include/asm/swab.h29
-rw-r--r--arch/x86/include/asm/tlbflush.h3
-rw-r--r--arch/x86/include/asm/trace_clock.h20
-rw-r--r--arch/x86/include/asm/uaccess.h42
-rw-r--r--arch/x86/kernel/Makefile2
-rw-r--r--arch/x86/kernel/acpi/boot.c6
-rw-r--r--arch/x86/kernel/acpi/sleep.c2
-rw-r--r--arch/x86/kernel/apic/apic.c73
-rw-r--r--arch/x86/kernel/apic/io_apic.c35
-rw-r--r--arch/x86/kernel/cpu/amd.c26
-rw-r--r--arch/x86/kernel/cpu/bugs.c41
-rw-r--r--arch/x86/kernel/cpu/common.c5
-rw-r--r--arch/x86/kernel/cpu/intel.c4
-rw-r--r--arch/x86/kernel/cpu/intel_cacheinfo.c75
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_amd.c2
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_intel.c31
-rw-r--r--arch/x86/kernel/cpu/mtrr/main.c9
-rw-r--r--arch/x86/kernel/cpu/perf_event.c121
-rw-r--r--arch/x86/kernel/cpu/perf_event.h5
-rw-r--r--arch/x86/kernel/cpu/perf_event_amd.c9
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c9
-rw-r--r--arch/x86/kernel/cpu/perf_event_p6.c2
-rw-r--r--arch/x86/kernel/entry_64.S57
-rw-r--r--arch/x86/kernel/head_32.S22
-rw-r--r--arch/x86/kernel/head_64.S16
-rw-r--r--arch/x86/kernel/hpet.c4
-rw-r--r--arch/x86/kernel/i387.c6
-rw-r--r--arch/x86/kernel/microcode_amd.c8
-rw-r--r--arch/x86/kernel/process.c39
-rw-r--r--arch/x86/kernel/ptrace.c42
-rw-r--r--arch/x86/kernel/rtc.c6
-rw-r--r--arch/x86/kernel/signal.c5
-rw-r--r--arch/x86/kernel/smpboot.c156
-rw-r--r--arch/x86/kernel/sys_x86_64.c151
-rw-r--r--arch/x86/kernel/topology.c101
-rw-r--r--arch/x86/kernel/trace_clock.c21
-rw-r--r--arch/x86/kernel/traps.c2
-rw-r--r--arch/x86/kernel/tsc.c6
-rw-r--r--arch/x86/kernel/uprobes.c54
-rw-r--r--arch/x86/kvm/cpuid.h3
-rw-r--r--arch/x86/kvm/emulate.c3
-rw-r--r--arch/x86/kvm/vmx.c11
-rw-r--r--arch/x86/kvm/x86.c3
-rw-r--r--arch/x86/lib/Makefile1
-rw-r--r--arch/x86/lib/cmpxchg.c54
-rw-r--r--arch/x86/lib/copy_page_64.S120
-rw-r--r--arch/x86/lib/usercopy_32.c57
-rw-r--r--arch/x86/mm/fault.c2
-rw-r--r--arch/x86/mm/hugetlbpage.c130
-rw-r--r--arch/x86/mm/init_32.c5
-rw-r--r--arch/x86/mm/tlb.c10
-rw-r--r--arch/x86/pci/ce4100.c13
-rw-r--r--arch/x86/platform/ce4100/ce4100.c27
-rw-r--r--arch/x86/power/cpu.c82
-rw-r--r--arch/x86/tools/gen-insn-attr-x86.awk6
-rw-r--r--arch/x86/um/Kconfig2
-rw-r--r--arch/x86/vdso/vma.c2
-rw-r--r--arch/x86/xen/Kconfig2
-rw-r--r--arch/xtensa/include/asm/Kbuild1
-rw-r--r--arch/xtensa/include/uapi/asm/ioctls.h3
-rw-r--r--arch/xtensa/include/uapi/asm/mman.h11
-rw-r--r--arch/xtensa/platforms/iss/console.c1
433 files changed, 6552 insertions, 3588 deletions
diff --git a/arch/Kconfig b/arch/Kconfig
index 366ec06a5185..cc74aaea116c 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -300,15 +300,16 @@ config SECCOMP_FILTER
300 300
301 See Documentation/prctl/seccomp_filter.txt for details. 301 See Documentation/prctl/seccomp_filter.txt for details.
302 302
303config HAVE_RCU_USER_QS 303config HAVE_CONTEXT_TRACKING
304 bool 304 bool
305 help 305 help
306 Provide kernel entry/exit hooks necessary for userspace 306 Provide kernel/user boundaries probes necessary for subsystems
307 RCU extended quiescent state. Syscalls need to be wrapped inside 307 that need it, such as userspace RCU extended quiescent state.
308 rcu_user_exit()-rcu_user_enter() through the slow path using 308 Syscalls need to be wrapped inside user_exit()-user_enter() through
309 TIF_NOHZ flag. Exceptions handlers must be wrapped as well. Irqs 309 the slow path using TIF_NOHZ flag. Exceptions handlers must be
310 are already protected inside rcu_irq_enter/rcu_irq_exit() but 310 wrapped as well. Irqs are already protected inside
311 preemption or signal handling on irq exit still need to be protected. 311 rcu_irq_enter/rcu_irq_exit() but preemption or signal handling on
312 irq exit still need to be protected.
312 313
313config HAVE_VIRT_CPU_ACCOUNTING 314config HAVE_VIRT_CPU_ACCOUNTING
314 bool 315 bool
diff --git a/arch/alpha/include/asm/Kbuild b/arch/alpha/include/asm/Kbuild
index 64ffc9e9e548..dcfabb9f05a0 100644
--- a/arch/alpha/include/asm/Kbuild
+++ b/arch/alpha/include/asm/Kbuild
@@ -11,3 +11,4 @@ header-y += reg.h
11header-y += regdef.h 11header-y += regdef.h
12header-y += sysinfo.h 12header-y += sysinfo.h
13generic-y += exec.h 13generic-y += exec.h
14generic-y += trace_clock.h
diff --git a/arch/alpha/include/asm/ioctls.h b/arch/alpha/include/asm/ioctls.h
index 80e1cee90f1f..92c557be49fc 100644
--- a/arch/alpha/include/asm/ioctls.h
+++ b/arch/alpha/include/asm/ioctls.h
@@ -95,6 +95,9 @@
95#define TIOCGDEV _IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */ 95#define TIOCGDEV _IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */
96#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */ 96#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */
97#define TIOCVHANGUP 0x5437 97#define TIOCVHANGUP 0x5437
98#define TIOCGPKT _IOR('T', 0x38, int) /* Get packet mode state */
99#define TIOCGPTLCK _IOR('T', 0x39, int) /* Get Pty lock state */
100#define TIOCGEXCL _IOR('T', 0x40, int) /* Get exclusive mode state */
98 101
99#define TIOCSERCONFIG 0x5453 102#define TIOCSERCONFIG 0x5453
100#define TIOCSERGWILD 0x5454 103#define TIOCSERGWILD 0x5454
diff --git a/arch/alpha/include/asm/mman.h b/arch/alpha/include/asm/mman.h
index cbeb3616a28e..0086b472bc2b 100644
--- a/arch/alpha/include/asm/mman.h
+++ b/arch/alpha/include/asm/mman.h
@@ -63,4 +63,15 @@
63/* compatibility flags */ 63/* compatibility flags */
64#define MAP_FILE 0 64#define MAP_FILE 0
65 65
66/*
67 * When MAP_HUGETLB is set bits [26:31] encode the log2 of the huge page size.
68 * This gives us 6 bits, which is enough until someone invents 128 bit address
69 * spaces.
70 *
71 * Assume these are all power of twos.
72 * When 0 use the default page size.
73 */
74#define MAP_HUGE_SHIFT 26
75#define MAP_HUGE_MASK 0x3f
76
66#endif /* __ALPHA_MMAN_H__ */ 77#endif /* __ALPHA_MMAN_H__ */
diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c
index 1e6956a90608..14db93e4c8a8 100644
--- a/arch/alpha/kernel/osf_sys.c
+++ b/arch/alpha/kernel/osf_sys.c
@@ -445,7 +445,7 @@ struct procfs_args {
445 * unhappy with OSF UFS. [CHECKME] 445 * unhappy with OSF UFS. [CHECKME]
446 */ 446 */
447static int 447static int
448osf_ufs_mount(char *dirname, struct ufs_args __user *args, int flags) 448osf_ufs_mount(const char *dirname, struct ufs_args __user *args, int flags)
449{ 449{
450 int retval; 450 int retval;
451 struct cdfs_args tmp; 451 struct cdfs_args tmp;
@@ -465,7 +465,7 @@ osf_ufs_mount(char *dirname, struct ufs_args __user *args, int flags)
465} 465}
466 466
467static int 467static int
468osf_cdfs_mount(char *dirname, struct cdfs_args __user *args, int flags) 468osf_cdfs_mount(const char *dirname, struct cdfs_args __user *args, int flags)
469{ 469{
470 int retval; 470 int retval;
471 struct cdfs_args tmp; 471 struct cdfs_args tmp;
@@ -485,7 +485,7 @@ osf_cdfs_mount(char *dirname, struct cdfs_args __user *args, int flags)
485} 485}
486 486
487static int 487static int
488osf_procfs_mount(char *dirname, struct procfs_args __user *args, int flags) 488osf_procfs_mount(const char *dirname, struct procfs_args __user *args, int flags)
489{ 489{
490 struct procfs_args tmp; 490 struct procfs_args tmp;
491 491
diff --git a/arch/alpha/kernel/srmcons.c b/arch/alpha/kernel/srmcons.c
index 5d5865204a1d..59b7bbad8394 100644
--- a/arch/alpha/kernel/srmcons.c
+++ b/arch/alpha/kernel/srmcons.c
@@ -205,7 +205,6 @@ static const struct tty_operations srmcons_ops = {
205static int __init 205static int __init
206srmcons_init(void) 206srmcons_init(void)
207{ 207{
208 tty_port_init(&srmcons_singleton.port);
209 setup_timer(&srmcons_singleton.timer, srmcons_receive_chars, 208 setup_timer(&srmcons_singleton.timer, srmcons_receive_chars,
210 (unsigned long)&srmcons_singleton); 209 (unsigned long)&srmcons_singleton);
211 if (srm_is_registered_console) { 210 if (srm_is_registered_console) {
@@ -215,6 +214,9 @@ srmcons_init(void)
215 driver = alloc_tty_driver(MAX_SRM_CONSOLE_DEVICES); 214 driver = alloc_tty_driver(MAX_SRM_CONSOLE_DEVICES);
216 if (!driver) 215 if (!driver)
217 return -ENOMEM; 216 return -ENOMEM;
217
218 tty_port_init(&srmcons_singleton.port);
219
218 driver->driver_name = "srm"; 220 driver->driver_name = "srm";
219 driver->name = "srm"; 221 driver->name = "srm";
220 driver->major = 0; /* dynamic */ 222 driver->major = 0; /* dynamic */
@@ -227,6 +229,7 @@ srmcons_init(void)
227 err = tty_register_driver(driver); 229 err = tty_register_driver(driver);
228 if (err) { 230 if (err) {
229 put_tty_driver(driver); 231 put_tty_driver(driver);
232 tty_port_destroy(&srmcons_singleton.port);
230 return err; 233 return err;
231 } 234 }
232 srmcons_driver = driver; 235 srmcons_driver = driver;
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ade7e924bef5..8a027f9e339e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -330,6 +330,8 @@ config ARCH_AT91
330 select IRQ_DOMAIN 330 select IRQ_DOMAIN
331 select NEED_MACH_GPIO_H 331 select NEED_MACH_GPIO_H
332 select NEED_MACH_IO_H if PCCARD 332 select NEED_MACH_IO_H if PCCARD
333 select PINCTRL
334 select PINCTRL_AT91 if USE_OF
333 help 335 help
334 This enables support for systems based on Atmel 336 This enables support for systems based on Atmel
335 AT91RM9200 and AT91SAM9* processors. 337 AT91RM9200 and AT91SAM9* processors.
@@ -364,6 +366,7 @@ config ARCH_CNS3XXX
364 366
365config ARCH_CLPS711X 367config ARCH_CLPS711X
366 bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" 368 bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
369 select ARCH_REQUIRE_GPIOLIB
367 select ARCH_USES_GETTIMEOFFSET 370 select ARCH_USES_GETTIMEOFFSET
368 select CLKDEV_LOOKUP 371 select CLKDEV_LOOKUP
369 select COMMON_CLK 372 select COMMON_CLK
@@ -547,6 +550,7 @@ config ARCH_KIRKWOOD
547 select CPU_FEROCEON 550 select CPU_FEROCEON
548 select GENERIC_CLOCKEVENTS 551 select GENERIC_CLOCKEVENTS
549 select PCI 552 select PCI
553 select PCI_QUIRKS
550 select PLAT_ORION_LEGACY 554 select PLAT_ORION_LEGACY
551 help 555 help
552 Support for the following Marvell Kirkwood series SoCs: 556 Support for the following Marvell Kirkwood series SoCs:
@@ -586,6 +590,7 @@ config ARCH_MMP
586 select GPIO_PXA 590 select GPIO_PXA
587 select IRQ_DOMAIN 591 select IRQ_DOMAIN
588 select NEED_MACH_GPIO_H 592 select NEED_MACH_GPIO_H
593 select PINCTRL
589 select PLAT_PXA 594 select PLAT_PXA
590 select SPARSE_IRQ 595 select SPARSE_IRQ
591 help 596 help
@@ -904,6 +909,7 @@ config ARCH_NOMADIK
904 909
905config PLAT_SPEAR 910config PLAT_SPEAR
906 bool "ST SPEAr" 911 bool "ST SPEAr"
912 select ARCH_HAS_CPUFREQ
907 select ARCH_REQUIRE_GPIOLIB 913 select ARCH_REQUIRE_GPIOLIB
908 select ARM_AMBA 914 select ARM_AMBA
909 select CLKDEV_LOOKUP 915 select CLKDEV_LOOKUP
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 5f914fca911b..c35baf102f6f 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -292,10 +292,10 @@ zinstall uinstall install: vmlinux
292 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@ 292 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@
293 293
294%.dtb: scripts 294%.dtb: scripts
295 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@ 295 $(Q)$(MAKE) $(build)=$(boot)/dts MACHINE=$(MACHINE) $(boot)/dts/$@
296 296
297dtbs: scripts 297dtbs: scripts
298 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@ 298 $(Q)$(MAKE) $(build)=$(boot)/dts MACHINE=$(MACHINE) dtbs
299 299
300# We use MRPROPER_FILES and CLEAN_FILES now 300# We use MRPROPER_FILES and CLEAN_FILES now
301archclean: 301archclean:
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
index f2aa09eb658e..abfce280f57b 100644
--- a/arch/arm/boot/Makefile
+++ b/arch/arm/boot/Makefile
@@ -15,8 +15,6 @@ ifneq ($(MACHINE),)
15include $(srctree)/$(MACHINE)/Makefile.boot 15include $(srctree)/$(MACHINE)/Makefile.boot
16endif 16endif
17 17
18include $(srctree)/arch/arm/boot/dts/Makefile
19
20# Note: the following conditions must always be true: 18# Note: the following conditions must always be true:
21# ZRELADDR == virt_to_phys(PAGE_OFFSET + TEXT_OFFSET) 19# ZRELADDR == virt_to_phys(PAGE_OFFSET + TEXT_OFFSET)
22# PARAMS_PHYS must be within 4MB of ZRELADDR 20# PARAMS_PHYS must be within 4MB of ZRELADDR
@@ -33,7 +31,7 @@ ifeq ($(CONFIG_XIP_KERNEL),y)
33 31
34$(obj)/xipImage: vmlinux FORCE 32$(obj)/xipImage: vmlinux FORCE
35 $(call if_changed,objcopy) 33 $(call if_changed,objcopy)
36 $(kecho) ' Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))' 34 @$(kecho) ' Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))'
37 35
38$(obj)/Image $(obj)/zImage: FORCE 36$(obj)/Image $(obj)/zImage: FORCE
39 @echo 'Kernel configured for XIP (CONFIG_XIP_KERNEL=y)' 37 @echo 'Kernel configured for XIP (CONFIG_XIP_KERNEL=y)'
@@ -48,27 +46,17 @@ $(obj)/xipImage: FORCE
48 46
49$(obj)/Image: vmlinux FORCE 47$(obj)/Image: vmlinux FORCE
50 $(call if_changed,objcopy) 48 $(call if_changed,objcopy)
51 $(kecho) ' Kernel: $@ is ready' 49 @$(kecho) ' Kernel: $@ is ready'
52 50
53$(obj)/compressed/vmlinux: $(obj)/Image FORCE 51$(obj)/compressed/vmlinux: $(obj)/Image FORCE
54 $(Q)$(MAKE) $(build)=$(obj)/compressed $@ 52 $(Q)$(MAKE) $(build)=$(obj)/compressed $@
55 53
56$(obj)/zImage: $(obj)/compressed/vmlinux FORCE 54$(obj)/zImage: $(obj)/compressed/vmlinux FORCE
57 $(call if_changed,objcopy) 55 $(call if_changed,objcopy)
58 $(kecho) ' Kernel: $@ is ready' 56 @$(kecho) ' Kernel: $@ is ready'
59 57
60endif 58endif
61 59
62targets += $(dtb-y)
63
64# Rule to build device tree blobs
65$(obj)/%.dtb: $(src)/dts/%.dts FORCE
66 $(call if_changed_dep,dtc)
67
68$(obj)/dtbs: $(addprefix $(obj)/, $(dtb-y))
69
70clean-files := *.dtb
71
72ifneq ($(LOADADDR),) 60ifneq ($(LOADADDR),)
73 UIMAGE_LOADADDR=$(LOADADDR) 61 UIMAGE_LOADADDR=$(LOADADDR)
74else 62else
@@ -90,7 +78,7 @@ fi
90$(obj)/uImage: $(obj)/zImage FORCE 78$(obj)/uImage: $(obj)/zImage FORCE
91 @$(check_for_multiple_loadaddr) 79 @$(check_for_multiple_loadaddr)
92 $(call if_changed,uimage) 80 $(call if_changed,uimage)
93 $(kecho) ' Image $@ is ready' 81 @$(kecho) ' Image $@ is ready'
94 82
95$(obj)/bootp/bootp: $(obj)/zImage initrd FORCE 83$(obj)/bootp/bootp: $(obj)/zImage initrd FORCE
96 $(Q)$(MAKE) $(build)=$(obj)/bootp $@ 84 $(Q)$(MAKE) $(build)=$(obj)/bootp $@
@@ -98,7 +86,7 @@ $(obj)/bootp/bootp: $(obj)/zImage initrd FORCE
98 86
99$(obj)/bootpImage: $(obj)/bootp/bootp FORCE 87$(obj)/bootpImage: $(obj)/bootp/bootp FORCE
100 $(call if_changed,objcopy) 88 $(call if_changed,objcopy)
101 $(kecho) ' Kernel: $@ is ready' 89 @$(kecho) ' Kernel: $@ is ready'
102 90
103PHONY += initrd FORCE 91PHONY += initrd FORCE
104initrd: 92initrd:
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 90275f036cd1..49ca86e37b8d 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -652,6 +652,15 @@ __setup_mmu: sub r3, r4, #16384 @ Page directory size
652 mov pc, lr 652 mov pc, lr
653ENDPROC(__setup_mmu) 653ENDPROC(__setup_mmu)
654 654
655@ Enable unaligned access on v6, to allow better code generation
656@ for the decompressor C code:
657__armv6_mmu_cache_on:
658 mrc p15, 0, r0, c1, c0, 0 @ read SCTLR
659 bic r0, r0, #2 @ A (no unaligned access fault)
660 orr r0, r0, #1 << 22 @ U (v6 unaligned access model)
661 mcr p15, 0, r0, c1, c0, 0 @ write SCTLR
662 b __armv4_mmu_cache_on
663
655__arm926ejs_mmu_cache_on: 664__arm926ejs_mmu_cache_on:
656#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH 665#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
657 mov r0, #4 @ put dcache in WT mode 666 mov r0, #4 @ put dcache in WT mode
@@ -694,6 +703,9 @@ __armv7_mmu_cache_on:
694 bic r0, r0, #1 << 28 @ clear SCTLR.TRE 703 bic r0, r0, #1 << 28 @ clear SCTLR.TRE
695 orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement 704 orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement
696 orr r0, r0, #0x003c @ write buffer 705 orr r0, r0, #0x003c @ write buffer
706 bic r0, r0, #2 @ A (no unaligned access fault)
707 orr r0, r0, #1 << 22 @ U (v6 unaligned access model)
708 @ (needed for ARM1176)
697#ifdef CONFIG_MMU 709#ifdef CONFIG_MMU
698#ifdef CONFIG_CPU_ENDIAN_BE8 710#ifdef CONFIG_CPU_ENDIAN_BE8
699 orr r0, r0, #1 << 25 @ big-endian page tables 711 orr r0, r0, #1 << 25 @ big-endian page tables
@@ -914,7 +926,7 @@ proc_types:
914 926
915 .word 0x0007b000 @ ARMv6 927 .word 0x0007b000 @ ARMv6
916 .word 0x000ff000 928 .word 0x000ff000
917 W(b) __armv4_mmu_cache_on 929 W(b) __armv6_mmu_cache_on
918 W(b) __armv4_mmu_cache_off 930 W(b) __armv4_mmu_cache_off
919 W(b) __armv6_mmu_cache_flush 931 W(b) __armv6_mmu_cache_flush
920 932
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f37cf9fa5fa0..262493752234 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1,21 +1,37 @@
1ifeq ($(CONFIG_OF),y) 1ifeq ($(CONFIG_OF),y)
2 2
3dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb \ 3# Keep at91 dtb files sorted alphabetically for each SoC
4 at91sam9263ek.dtb \ 4# rm9200
5 at91sam9g20ek_2mmc.dtb \ 5dtb-$(CONFIG_ARCH_AT91) += at91rm9200ek.dtb
6 at91sam9g20ek.dtb \ 6# sam9260
7 at91sam9g25ek.dtb \ 7dtb-$(CONFIG_ARCH_AT91) += animeo_ip.dtb
8 at91sam9m10g45ek.dtb \ 8dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb
9 at91sam9n12ek.dtb \ 9dtb-$(CONFIG_ARCH_AT91) += ethernut5.dtb
10 ethernut5.dtb \ 10dtb-$(CONFIG_ARCH_AT91) += evk-pro3.dtb
11 evk-pro3.dtb \ 11dtb-$(CONFIG_ARCH_AT91) += tny_a9260.dtb
12 kizbox.dtb \ 12dtb-$(CONFIG_ARCH_AT91) += usb_a9260.dtb
13 tny_a9260.dtb \ 13# sam9263
14 tny_a9263.dtb \ 14dtb-$(CONFIG_ARCH_AT91) += at91sam9263ek.dtb
15 tny_a9g20.dtb \ 15dtb-$(CONFIG_ARCH_AT91) += tny_a9263.dtb
16 usb_a9260.dtb \ 16dtb-$(CONFIG_ARCH_AT91) += usb_a9263.dtb
17 usb_a9263.dtb \ 17# sam9g20
18 usb_a9g20.dtb 18dtb-$(CONFIG_ARCH_AT91) += at91sam9g20ek.dtb
19dtb-$(CONFIG_ARCH_AT91) += at91sam9g20ek_2mmc.dtb
20dtb-$(CONFIG_ARCH_AT91) += kizbox.dtb
21dtb-$(CONFIG_ARCH_AT91) += tny_a9g20.dtb
22dtb-$(CONFIG_ARCH_AT91) += usb_a9g20.dtb
23# sam9g45
24dtb-$(CONFIG_ARCH_AT91) += at91sam9m10g45ek.dtb
25dtb-$(CONFIG_ARCH_AT91) += pm9g45.dtb
26# sam9n12
27dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb
28# sam9x5
29dtb-$(CONFIG_ARCH_AT91) += at91sam9g15ek.dtb
30dtb-$(CONFIG_ARCH_AT91) += at91sam9g25ek.dtb
31dtb-$(CONFIG_ARCH_AT91) += at91sam9g35ek.dtb
32dtb-$(CONFIG_ARCH_AT91) += at91sam9x25ek.dtb
33dtb-$(CONFIG_ARCH_AT91) += at91sam9x35ek.dtb
34
19dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb 35dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
20dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \ 36dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
21 dove-cubox.dtb \ 37 dove-cubox.dtb \
@@ -104,4 +120,12 @@ dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \
104 wm8505-ref.dtb \ 120 wm8505-ref.dtb \
105 wm8650-mid.dtb 121 wm8650-mid.dtb
106 122
123targets += dtbs
107endif 124endif
125
126# *.dtb used to be generated in the directory above. Clean out the
127# old build results so people don't accidentally use them.
128dtbs: $(addprefix $(obj)/, $(dtb-y))
129 $(Q)rm -f $(obj)/../*.dtb
130
131clean-files := *.dtb
diff --git a/arch/arm/boot/dts/animeo_ip.dts b/arch/arm/boot/dts/animeo_ip.dts
new file mode 100644
index 000000000000..74d92cd29d87
--- /dev/null
+++ b/arch/arm/boot/dts/animeo_ip.dts
@@ -0,0 +1,178 @@
1/*
2 * animeo_ip.dts - Device Tree file for Somfy Animeo IP Boards
3 *
4 * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
6 * Licensed under GPLv2 only.
7 */
8
9/dts-v1/;
10/include/ "at91sam9260.dtsi"
11
12/ {
13 model = "Somfy Animeo IP";
14 compatible = "somfy,animeo-ip", "atmel,at91sam9260", "atmel,at91sam9";
15
16 aliases {
17 serial0 = &usart1;
18 serial1 = &usart2;
19 serial2 = &usart0;
20 serial3 = &dbgu;
21 serial4 = &usart3;
22 serial5 = &uart0;
23 serial6 = &uart1;
24 };
25
26 chosen {
27 linux,stdout-path = &usart2;
28 };
29
30 memory {
31 reg = <0x20000000 0x4000000>;
32 };
33
34 clocks {
35 #address-cells = <1>;
36 #size-cells = <1>;
37 ranges;
38
39 main_clock: clock@0 {
40 compatible = "atmel,osc", "fixed-clock";
41 clock-frequency = <18432000>;
42 };
43 };
44
45 ahb {
46 apb {
47 usart0: serial@fffb0000 {
48 pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts>;
49 linux,rs485-enabled-at-boot-time;
50 status = "okay";
51 };
52
53 usart1: serial@fffb4000 {
54 pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts>;
55 linux,rs485-enabled-at-boot-time;
56 status = "okay";
57 };
58
59 usart2: serial@fffb8000 {
60 pinctrl-0 = <&pinctrl_usart2>;
61 status = "okay";
62 };
63
64 macb0: ethernet@fffc4000 {
65 pinctrl-0 = <&pinctrl_macb_rmii &pinctrl_macb_rmii_mii>;
66 phy-mode = "mii";
67 status = "okay";
68 };
69
70 mmc0: mmc@fffa8000 {
71 pinctrl-0 = <&pinctrl_mmc0_clk
72 &pinctrl_mmc0_slot1_cmd_dat0
73 &pinctrl_mmc0_slot1_dat1_3>;
74 status = "okay";
75
76 slot@1 {
77 reg = <1>;
78 bus-width = <4>;
79 };
80 };
81 };
82
83 nand0: nand@40000000 {
84 nand-bus-width = <8>;
85 nand-ecc-mode = "soft";
86 nand-on-flash-bbt;
87 status = "okay";
88
89 at91bootstrap@0 {
90 label = "at91bootstrap";
91 reg = <0x0 0x8000>;
92 };
93
94 barebox@8000 {
95 label = "barebox";
96 reg = <0x8000 0x40000>;
97 };
98
99 bareboxenv@48000 {
100 label = "bareboxenv";
101 reg = <0x48000 0x8000>;
102 };
103
104 user_block@0x50000 {
105 label = "user_block";
106 reg = <0x50000 0xb0000>;
107 };
108
109 kernel@100000 {
110 label = "kernel";
111 reg = <0x100000 0x1b0000>;
112 };
113
114 root@2b0000 {
115 label = "root";
116 reg = <0x2b0000 0x1D50000>;
117 };
118 };
119
120 usb0: ohci@00500000 {
121 num-ports = <2>;
122 atmel,vbus-gpio = <&pioB 15 1>;
123 status = "okay";
124 };
125 };
126
127 leds {
128 compatible = "gpio-leds";
129
130 power_green {
131 label = "power_green";
132 gpios = <&pioC 17 0>;
133 linux,default-trigger = "heartbeat";
134 };
135
136 power_red {
137 label = "power_red";
138 gpios = <&pioA 2 0>;
139 };
140
141 tx_green {
142 label = "tx_green";
143 gpios = <&pioC 19 0>;
144 };
145
146 tx_red {
147 label = "tx_red";
148 gpios = <&pioC 18 0>;
149 };
150 };
151
152 gpio_keys {
153 compatible = "gpio-keys";
154 #address-cells = <1>;
155 #size-cells = <0>;
156
157 keyswitch_in {
158 label = "keyswitch_in";
159 gpios = <&pioB 1 0>;
160 linux,code = <28>;
161 gpio-key,wakeup;
162 };
163
164 error_in {
165 label = "error_in";
166 gpios = <&pioB 2 0>;
167 linux,code = <29>;
168 gpio-key,wakeup;
169 };
170
171 btn {
172 label = "btn";
173 gpios = <&pioC 23 0>;
174 linux,code = <31>;
175 gpio-key,wakeup;
176 };
177 };
178};
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
new file mode 100644
index 000000000000..e154f242c680
--- /dev/null
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -0,0 +1,349 @@
1/*
2 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2012 Joachim Eastwood <manabian@gmail.com>
7 *
8 * Based on at91sam9260.dtsi
9 *
10 * Licensed under GPLv2 or later.
11 */
12
13/include/ "skeleton.dtsi"
14
15/ {
16 model = "Atmel AT91RM9200 family SoC";
17 compatible = "atmel,at91rm9200";
18 interrupt-parent = <&aic>;
19
20 aliases {
21 serial0 = &dbgu;
22 serial1 = &usart0;
23 serial2 = &usart1;
24 serial3 = &usart2;
25 serial4 = &usart3;
26 gpio0 = &pioA;
27 gpio1 = &pioB;
28 gpio2 = &pioC;
29 gpio3 = &pioD;
30 tcb0 = &tcb0;
31 tcb1 = &tcb1;
32 };
33 cpus {
34 cpu@0 {
35 compatible = "arm,arm920t";
36 };
37 };
38
39 memory {
40 reg = <0x20000000 0x04000000>;
41 };
42
43 ahb {
44 compatible = "simple-bus";
45 #address-cells = <1>;
46 #size-cells = <1>;
47 ranges;
48
49 apb {
50 compatible = "simple-bus";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 ranges;
54
55 aic: interrupt-controller@fffff000 {
56 #interrupt-cells = <3>;
57 compatible = "atmel,at91rm9200-aic";
58 interrupt-controller;
59 reg = <0xfffff000 0x200>;
60 atmel,external-irqs = <25 26 27 28 29 30 31>;
61 };
62
63 ramc0: ramc@ffffff00 {
64 compatible = "atmel,at91rm9200-sdramc";
65 reg = <0xffffff00 0x100>;
66 };
67
68 pmc: pmc@fffffc00 {
69 compatible = "atmel,at91rm9200-pmc";
70 reg = <0xfffffc00 0x100>;
71 };
72
73 st: timer@fffffd00 {
74 compatible = "atmel,at91rm9200-st";
75 reg = <0xfffffd00 0x100>;
76 interrupts = <1 4 7>;
77 };
78
79 tcb0: timer@fffa0000 {
80 compatible = "atmel,at91rm9200-tcb";
81 reg = <0xfffa0000 0x100>;
82 interrupts = <17 4 0 18 4 0 19 4 0>;
83 };
84
85 tcb1: timer@fffa4000 {
86 compatible = "atmel,at91rm9200-tcb";
87 reg = <0xfffa4000 0x100>;
88 interrupts = <20 4 0 21 4 0 22 4 0>;
89 };
90
91 pinctrl@fffff400 {
92 #address-cells = <1>;
93 #size-cells = <1>;
94 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
95 ranges = <0xfffff400 0xfffff400 0x800>;
96
97 atmel,mux-mask = <
98 /* A B */
99 0xffffffff 0xffffffff /* pioA */
100 0xffffffff 0x083fffff /* pioB */
101 0xffff3fff 0x00000000 /* pioC */
102 0x03ff87ff 0x0fffff80 /* pioD */
103 >;
104
105 /* shared pinctrl settings */
106 dbgu {
107 pinctrl_dbgu: dbgu-0 {
108 atmel,pins =
109 <0 30 0x1 0x0 /* PA30 periph A */
110 0 31 0x1 0x1>; /* PA31 periph with pullup */
111 };
112 };
113
114 uart0 {
115 pinctrl_uart0: uart0-0 {
116 atmel,pins =
117 <0 17 0x1 0x0 /* PA17 periph A */
118 0 18 0x1 0x0>; /* PA18 periph A */
119 };
120
121 pinctrl_uart0_rts: uart0_rts-0 {
122 atmel,pins =
123 <0 20 0x1 0x0>; /* PA20 periph A */
124 };
125
126 pinctrl_uart0_cts: uart0_cts-0 {
127 atmel,pins =
128 <0 21 0x1 0x0>; /* PA21 periph A */
129 };
130 };
131
132 uart1 {
133 pinctrl_uart1: uart1-0 {
134 atmel,pins =
135 <1 20 0x1 0x1 /* PB20 periph A with pullup */
136 1 21 0x1 0x0>; /* PB21 periph A */
137 };
138
139 pinctrl_uart1_rts: uart1_rts-0 {
140 atmel,pins =
141 <1 24 0x1 0x0>; /* PB24 periph A */
142 };
143
144 pinctrl_uart1_cts: uart1_cts-0 {
145 atmel,pins =
146 <1 26 0x1 0x0>; /* PB26 periph A */
147 };
148
149 pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
150 atmel,pins =
151 <1 19 0x1 0x0 /* PB19 periph A */
152 1 25 0x1 0x0>; /* PB25 periph A */
153 };
154
155 pinctrl_uart1_dcd: uart1_dcd-0 {
156 atmel,pins =
157 <1 23 0x1 0x0>; /* PB23 periph A */
158 };
159
160 pinctrl_uart1_ri: uart1_ri-0 {
161 atmel,pins =
162 <1 18 0x1 0x0>; /* PB18 periph A */
163 };
164 };
165
166 uart2 {
167 pinctrl_uart2: uart2-0 {
168 atmel,pins =
169 <0 22 0x1 0x0 /* PA22 periph A */
170 0 23 0x1 0x1>; /* PA23 periph A with pullup */
171 };
172
173 pinctrl_uart2_rts: uart2_rts-0 {
174 atmel,pins =
175 <0 30 0x2 0x0>; /* PA30 periph B */
176 };
177
178 pinctrl_uart2_cts: uart2_cts-0 {
179 atmel,pins =
180 <0 31 0x2 0x0>; /* PA31 periph B */
181 };
182 };
183
184 uart3 {
185 pinctrl_uart3: uart3-0 {
186 atmel,pins =
187 <0 5 0x2 0x1 /* PA5 periph B with pullup */
188 0 6 0x2 0x0>; /* PA6 periph B */
189 };
190
191 pinctrl_uart3_rts: uart3_rts-0 {
192 atmel,pins =
193 <1 0 0x2 0x0>; /* PB0 periph B */
194 };
195
196 pinctrl_uart3_cts: uart3_cts-0 {
197 atmel,pins =
198 <1 1 0x2 0x0>; /* PB1 periph B */
199 };
200 };
201
202 nand {
203 pinctrl_nand: nand-0 {
204 atmel,pins =
205 <2 2 0x0 0x1 /* PC2 gpio RDY pin pull_up */
206 1 1 0x0 0x1>; /* PB1 gpio CD pin pull_up */
207 };
208 };
209
210 pioA: gpio@fffff400 {
211 compatible = "atmel,at91rm9200-gpio";
212 reg = <0xfffff400 0x200>;
213 interrupts = <2 4 1>;
214 #gpio-cells = <2>;
215 gpio-controller;
216 interrupt-controller;
217 #interrupt-cells = <2>;
218 };
219
220 pioB: gpio@fffff600 {
221 compatible = "atmel,at91rm9200-gpio";
222 reg = <0xfffff600 0x200>;
223 interrupts = <3 4 1>;
224 #gpio-cells = <2>;
225 gpio-controller;
226 interrupt-controller;
227 #interrupt-cells = <2>;
228 };
229
230 pioC: gpio@fffff800 {
231 compatible = "atmel,at91rm9200-gpio";
232 reg = <0xfffff800 0x200>;
233 interrupts = <4 4 1>;
234 #gpio-cells = <2>;
235 gpio-controller;
236 interrupt-controller;
237 #interrupt-cells = <2>;
238 };
239
240 pioD: gpio@fffffa00 {
241 compatible = "atmel,at91rm9200-gpio";
242 reg = <0xfffffa00 0x200>;
243 interrupts = <5 4 1>;
244 #gpio-cells = <2>;
245 gpio-controller;
246 interrupt-controller;
247 #interrupt-cells = <2>;
248 };
249 };
250
251 dbgu: serial@fffff200 {
252 compatible = "atmel,at91rm9200-usart";
253 reg = <0xfffff200 0x200>;
254 interrupts = <1 4 7>;
255 pinctrl-names = "default";
256 pinctrl-0 = <&pinctrl_dbgu>;
257 status = "disabled";
258 };
259
260 usart0: serial@fffc0000 {
261 compatible = "atmel,at91rm9200-usart";
262 reg = <0xfffc0000 0x200>;
263 interrupts = <6 4 5>;
264 atmel,use-dma-rx;
265 atmel,use-dma-tx;
266 pinctrl-names = "default";
267 pinctrl-0 = <&pinctrl_uart0>;
268 status = "disabled";
269 };
270
271 usart1: serial@fffc4000 {
272 compatible = "atmel,at91rm9200-usart";
273 reg = <0xfffc4000 0x200>;
274 interrupts = <7 4 5>;
275 atmel,use-dma-rx;
276 atmel,use-dma-tx;
277 pinctrl-names = "default";
278 pinctrl-0 = <&pinctrl_uart1>;
279 status = "disabled";
280 };
281
282 usart2: serial@fffc8000 {
283 compatible = "atmel,at91rm9200-usart";
284 reg = <0xfffc8000 0x200>;
285 interrupts = <8 4 5>;
286 atmel,use-dma-rx;
287 atmel,use-dma-tx;
288 pinctrl-names = "default";
289 pinctrl-0 = <&pinctrl_uart2>;
290 status = "disabled";
291 };
292
293 usart3: serial@fffcc000 {
294 compatible = "atmel,at91rm9200-usart";
295 reg = <0xfffcc000 0x200>;
296 interrupts = <23 4 5>;
297 atmel,use-dma-rx;
298 atmel,use-dma-tx;
299 pinctrl-names = "default";
300 pinctrl-0 = <&pinctrl_uart3>;
301 status = "disabled";
302 };
303
304 usb1: gadget@fffb0000 {
305 compatible = "atmel,at91rm9200-udc";
306 reg = <0xfffb0000 0x4000>;
307 interrupts = <11 4 2>;
308 status = "disabled";
309 };
310 };
311
312 nand0: nand@40000000 {
313 compatible = "atmel,at91rm9200-nand";
314 #address-cells = <1>;
315 #size-cells = <1>;
316 reg = <0x40000000 0x10000000>;
317 atmel,nand-addr-offset = <21>;
318 atmel,nand-cmd-offset = <22>;
319 pinctrl-names = "default";
320 pinctrl-0 = <&pinctrl_nand>;
321 nand-ecc-mode = "soft";
322 gpios = <&pioC 2 0
323 0
324 &pioB 1 0
325 >;
326 status = "disabled";
327 };
328
329 usb0: ohci@00300000 {
330 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
331 reg = <0x00300000 0x100000>;
332 interrupts = <23 4 2>;
333 status = "disabled";
334 };
335 };
336
337 i2c@0 {
338 compatible = "i2c-gpio";
339 gpios = <&pioA 23 0 /* sda */
340 &pioA 24 0 /* scl */
341 >;
342 i2c-gpio,sda-open-drain;
343 i2c-gpio,scl-open-drain;
344 i2c-gpio,delay-us = <2>; /* ~100 kHz */
345 #address-cells = <1>;
346 #size-cells = <0>;
347 status = "disabled";
348 };
349};
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts b/arch/arm/boot/dts/at91rm9200ek.dts
new file mode 100644
index 000000000000..8aa48931e0a2
--- /dev/null
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -0,0 +1,79 @@
1/*
2 * at91rm9200ek.dts - Device Tree file for Atmel AT91RM9200 evaluation kit
3 *
4 * Copyright (C) 2012 Joachim Eastwood <manabian@gmail.com>
5 *
6 * Licensed under GPLv2 only
7 */
8/dts-v1/;
9/include/ "at91rm9200.dtsi"
10
11/ {
12 model = "Atmel AT91RM9200 evaluation kit";
13 compatible = "atmel,at91rm9200ek", "atmel,at91rm9200";
14
15 memory {
16 reg = <0x20000000 0x4000000>;
17 };
18
19 clocks {
20 #address-cells = <1>;
21 #size-cells = <1>;
22 ranges;
23
24 main_clock: clock@0 {
25 compatible = "atmel,osc", "fixed-clock";
26 clock-frequency = <18432000>;
27 };
28 };
29
30 ahb {
31 apb {
32 dbgu: serial@fffff200 {
33 status = "okay";
34 };
35
36 usart1: serial@fffc4000 {
37 pinctrl-0 =
38 <&pinctrl_uart1
39 &pinctrl_uart1_rts
40 &pinctrl_uart1_cts
41 &pinctrl_uart1_dtr_dsr
42 &pinctrl_uart1_dcd
43 &pinctrl_uart1_ri>;
44 status = "okay";
45 };
46
47 usb1: gadget@fffb0000 {
48 atmel,vbus-gpio = <&pioD 4 0>;
49 status = "okay";
50 };
51 };
52
53 usb0: ohci@00300000 {
54 num-ports = <2>;
55 status = "okay";
56 };
57 };
58
59 leds {
60 compatible = "gpio-leds";
61
62 ds2 {
63 label = "green";
64 gpios = <&pioB 0 0x1>;
65 linux,default-trigger = "mmc0";
66 };
67
68 ds4 {
69 label = "yellow";
70 gpios = <&pioB 1 0x1>;
71 linux,default-trigger = "heartbeat";
72 };
73
74 ds6 {
75 label = "red";
76 gpios = <&pioB 2 0x1>;
77 };
78 };
79};
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index d410581a5a85..b1d3fab60e0a 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -21,8 +21,8 @@
21 serial2 = &usart1; 21 serial2 = &usart1;
22 serial3 = &usart2; 22 serial3 = &usart2;
23 serial4 = &usart3; 23 serial4 = &usart3;
24 serial5 = &usart4; 24 serial5 = &uart0;
25 serial6 = &usart5; 25 serial6 = &uart1;
26 gpio0 = &pioA; 26 gpio0 = &pioA;
27 gpio1 = &pioB; 27 gpio1 = &pioB;
28 gpio2 = &pioC; 28 gpio2 = &pioC;
@@ -98,40 +98,250 @@
98 interrupts = <26 4 0 27 4 0 28 4 0>; 98 interrupts = <26 4 0 27 4 0 28 4 0>;
99 }; 99 };
100 100
101 pioA: gpio@fffff400 { 101 pinctrl@fffff400 {
102 compatible = "atmel,at91rm9200-gpio"; 102 #address-cells = <1>;
103 reg = <0xfffff400 0x100>; 103 #size-cells = <1>;
104 interrupts = <2 4 1>; 104 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
105 #gpio-cells = <2>; 105 ranges = <0xfffff400 0xfffff400 0x600>;
106 gpio-controller; 106
107 interrupt-controller; 107 atmel,mux-mask = <
108 #interrupt-cells = <2>; 108 /* A B */
109 }; 109 0xffffffff 0xffc00c3b /* pioA */
110 0xffffffff 0x7fff3ccf /* pioB */
111 0xffffffff 0x007fffff /* pioC */
112 >;
113
114 /* shared pinctrl settings */
115 dbgu {
116 pinctrl_dbgu: dbgu-0 {
117 atmel,pins =
118 <1 14 0x1 0x0 /* PB14 periph A */
119 1 15 0x1 0x1>; /* PB15 periph with pullup */
120 };
121 };
110 122
111 pioB: gpio@fffff600 { 123 usart0 {
112 compatible = "atmel,at91rm9200-gpio"; 124 pinctrl_usart0: usart0-0 {
113 reg = <0xfffff600 0x100>; 125 atmel,pins =
114 interrupts = <3 4 1>; 126 <1 4 0x1 0x0 /* PB4 periph A */
115 #gpio-cells = <2>; 127 1 5 0x1 0x0>; /* PB5 periph A */
116 gpio-controller; 128 };
117 interrupt-controller; 129
118 #interrupt-cells = <2>; 130 pinctrl_usart0_rts: usart0_rts-0 {
119 }; 131 atmel,pins =
132 <1 26 0x1 0x0>; /* PB26 periph A */
133 };
134
135 pinctrl_usart0_cts: usart0_cts-0 {
136 atmel,pins =
137 <1 27 0x1 0x0>; /* PB27 periph A */
138 };
139
140 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
141 atmel,pins =
142 <1 24 0x1 0x0 /* PB24 periph A */
143 1 22 0x1 0x0>; /* PB22 periph A */
144 };
145
146 pinctrl_usart0_dcd: usart0_dcd-0 {
147 atmel,pins =
148 <1 23 0x1 0x0>; /* PB23 periph A */
149 };
150
151 pinctrl_usart0_ri: usart0_ri-0 {
152 atmel,pins =
153 <1 25 0x1 0x0>; /* PB25 periph A */
154 };
155 };
120 156
121 pioC: gpio@fffff800 { 157 usart1 {
122 compatible = "atmel,at91rm9200-gpio"; 158 pinctrl_usart1: usart1-0 {
123 reg = <0xfffff800 0x100>; 159 atmel,pins =
124 interrupts = <4 4 1>; 160 <2 6 0x1 0x1 /* PB6 periph A with pullup */
125 #gpio-cells = <2>; 161 2 7 0x1 0x0>; /* PB7 periph A */
126 gpio-controller; 162 };
127 interrupt-controller; 163
128 #interrupt-cells = <2>; 164 pinctrl_usart1_rts: usart1_rts-0 {
165 atmel,pins =
166 <1 28 0x1 0x0>; /* PB28 periph A */
167 };
168
169 pinctrl_usart1_cts: usart1_cts-0 {
170 atmel,pins =
171 <1 29 0x1 0x0>; /* PB29 periph A */
172 };
173 };
174
175 usart2 {
176 pinctrl_usart2: usart2-0 {
177 atmel,pins =
178 <1 8 0x1 0x1 /* PB8 periph A with pullup */
179 1 9 0x1 0x0>; /* PB9 periph A */
180 };
181
182 pinctrl_usart2_rts: usart2_rts-0 {
183 atmel,pins =
184 <0 4 0x1 0x0>; /* PA4 periph A */
185 };
186
187 pinctrl_usart2_cts: usart2_cts-0 {
188 atmel,pins =
189 <0 5 0x1 0x0>; /* PA5 periph A */
190 };
191 };
192
193 usart3 {
194 pinctrl_usart3: usart3-0 {
195 atmel,pins =
196 <2 10 0x1 0x1 /* PB10 periph A with pullup */
197 2 11 0x1 0x0>; /* PB11 periph A */
198 };
199
200 pinctrl_usart3_rts: usart3_rts-0 {
201 atmel,pins =
202 <3 8 0x2 0x0>; /* PB8 periph B */
203 };
204
205 pinctrl_usart3_cts: usart3_cts-0 {
206 atmel,pins =
207 <3 10 0x2 0x0>; /* PB10 periph B */
208 };
209 };
210
211 uart0 {
212 pinctrl_uart0: uart0-0 {
213 atmel,pins =
214 <0 31 0x2 0x1 /* PA31 periph B with pullup */
215 0 30 0x2 0x0>; /* PA30 periph B */
216 };
217 };
218
219 uart1 {
220 pinctrl_uart1: uart1-0 {
221 atmel,pins =
222 <2 12 0x1 0x1 /* PB12 periph A with pullup */
223 2 13 0x1 0x0>; /* PB13 periph A */
224 };
225 };
226
227 nand {
228 pinctrl_nand: nand-0 {
229 atmel,pins =
230 <2 13 0x0 0x1 /* PC13 gpio RDY pin pull_up */
231 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
232 };
233 };
234
235 macb {
236 pinctrl_macb_rmii: macb_rmii-0 {
237 atmel,pins =
238 <0 12 0x1 0x0 /* PA12 periph A */
239 0 13 0x1 0x0 /* PA13 periph A */
240 0 14 0x1 0x0 /* PA14 periph A */
241 0 15 0x1 0x0 /* PA15 periph A */
242 0 16 0x1 0x0 /* PA16 periph A */
243 0 17 0x1 0x0 /* PA17 periph A */
244 0 18 0x1 0x0 /* PA18 periph A */
245 0 19 0x1 0x0 /* PA19 periph A */
246 0 20 0x1 0x0 /* PA20 periph A */
247 0 21 0x1 0x0>; /* PA21 periph A */
248 };
249
250 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
251 atmel,pins =
252 <0 22 0x2 0x0 /* PA22 periph B */
253 0 23 0x2 0x0 /* PA23 periph B */
254 0 24 0x2 0x0 /* PA24 periph B */
255 0 25 0x2 0x0 /* PA25 periph B */
256 0 26 0x2 0x0 /* PA26 periph B */
257 0 27 0x2 0x0 /* PA27 periph B */
258 0 28 0x2 0x0 /* PA28 periph B */
259 0 29 0x2 0x0>; /* PA29 periph B */
260 };
261
262 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
263 atmel,pins =
264 <0 10 0x2 0x0 /* PA10 periph B */
265 0 11 0x2 0x0 /* PA11 periph B */
266 0 24 0x2 0x0 /* PA24 periph B */
267 0 25 0x2 0x0 /* PA25 periph B */
268 0 26 0x2 0x0 /* PA26 periph B */
269 0 27 0x2 0x0 /* PA27 periph B */
270 0 28 0x2 0x0 /* PA28 periph B */
271 0 29 0x2 0x0>; /* PA29 periph B */
272 };
273 };
274
275 mmc0 {
276 pinctrl_mmc0_clk: mmc0_clk-0 {
277 atmel,pins =
278 <0 8 0x1 0x0>; /* PA8 periph A */
279 };
280
281 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
282 atmel,pins =
283 <0 7 0x1 0x1 /* PA7 periph A with pullup */
284 0 6 0x1 0x1>; /* PA6 periph A with pullup */
285 };
286
287 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
288 atmel,pins =
289 <0 9 0x1 0x1 /* PA9 periph A with pullup */
290 0 10 0x1 0x1 /* PA10 periph A with pullup */
291 0 11 0x1 0x1>; /* PA11 periph A with pullup */
292 };
293
294 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
295 atmel,pins =
296 <0 1 0x2 0x1 /* PA1 periph B with pullup */
297 0 0 0x2 0x1>; /* PA0 periph B with pullup */
298 };
299
300 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
301 atmel,pins =
302 <0 5 0x2 0x1 /* PA5 periph B with pullup */
303 0 4 0x2 0x1 /* PA4 periph B with pullup */
304 0 3 0x2 0x1>; /* PA3 periph B with pullup */
305 };
306 };
307
308 pioA: gpio@fffff400 {
309 compatible = "atmel,at91rm9200-gpio";
310 reg = <0xfffff400 0x200>;
311 interrupts = <2 4 1>;
312 #gpio-cells = <2>;
313 gpio-controller;
314 interrupt-controller;
315 #interrupt-cells = <2>;
316 };
317
318 pioB: gpio@fffff600 {
319 compatible = "atmel,at91rm9200-gpio";
320 reg = <0xfffff600 0x200>;
321 interrupts = <3 4 1>;
322 #gpio-cells = <2>;
323 gpio-controller;
324 interrupt-controller;
325 #interrupt-cells = <2>;
326 };
327
328 pioC: gpio@fffff800 {
329 compatible = "atmel,at91rm9200-gpio";
330 reg = <0xfffff800 0x200>;
331 interrupts = <4 4 1>;
332 #gpio-cells = <2>;
333 gpio-controller;
334 interrupt-controller;
335 #interrupt-cells = <2>;
336 };
129 }; 337 };
130 338
131 dbgu: serial@fffff200 { 339 dbgu: serial@fffff200 {
132 compatible = "atmel,at91sam9260-usart"; 340 compatible = "atmel,at91sam9260-usart";
133 reg = <0xfffff200 0x200>; 341 reg = <0xfffff200 0x200>;
134 interrupts = <1 4 7>; 342 interrupts = <1 4 7>;
343 pinctrl-names = "default";
344 pinctrl-0 = <&pinctrl_dbgu>;
135 status = "disabled"; 345 status = "disabled";
136 }; 346 };
137 347
@@ -141,6 +351,8 @@
141 interrupts = <6 4 5>; 351 interrupts = <6 4 5>;
142 atmel,use-dma-rx; 352 atmel,use-dma-rx;
143 atmel,use-dma-tx; 353 atmel,use-dma-tx;
354 pinctrl-names = "default";
355 pinctrl-0 = <&pinctrl_usart0>;
144 status = "disabled"; 356 status = "disabled";
145 }; 357 };
146 358
@@ -150,6 +362,8 @@
150 interrupts = <7 4 5>; 362 interrupts = <7 4 5>;
151 atmel,use-dma-rx; 363 atmel,use-dma-rx;
152 atmel,use-dma-tx; 364 atmel,use-dma-tx;
365 pinctrl-names = "default";
366 pinctrl-0 = <&pinctrl_usart1>;
153 status = "disabled"; 367 status = "disabled";
154 }; 368 };
155 369
@@ -159,6 +373,8 @@
159 interrupts = <8 4 5>; 373 interrupts = <8 4 5>;
160 atmel,use-dma-rx; 374 atmel,use-dma-rx;
161 atmel,use-dma-tx; 375 atmel,use-dma-tx;
376 pinctrl-names = "default";
377 pinctrl-0 = <&pinctrl_usart2>;
162 status = "disabled"; 378 status = "disabled";
163 }; 379 };
164 380
@@ -168,24 +384,30 @@
168 interrupts = <23 4 5>; 384 interrupts = <23 4 5>;
169 atmel,use-dma-rx; 385 atmel,use-dma-rx;
170 atmel,use-dma-tx; 386 atmel,use-dma-tx;
387 pinctrl-names = "default";
388 pinctrl-0 = <&pinctrl_usart3>;
171 status = "disabled"; 389 status = "disabled";
172 }; 390 };
173 391
174 usart4: serial@fffd4000 { 392 uart0: serial@fffd4000 {
175 compatible = "atmel,at91sam9260-usart"; 393 compatible = "atmel,at91sam9260-usart";
176 reg = <0xfffd4000 0x200>; 394 reg = <0xfffd4000 0x200>;
177 interrupts = <24 4 5>; 395 interrupts = <24 4 5>;
178 atmel,use-dma-rx; 396 atmel,use-dma-rx;
179 atmel,use-dma-tx; 397 atmel,use-dma-tx;
398 pinctrl-names = "default";
399 pinctrl-0 = <&pinctrl_uart0>;
180 status = "disabled"; 400 status = "disabled";
181 }; 401 };
182 402
183 usart5: serial@fffd8000 { 403 uart1: serial@fffd8000 {
184 compatible = "atmel,at91sam9260-usart"; 404 compatible = "atmel,at91sam9260-usart";
185 reg = <0xfffd8000 0x200>; 405 reg = <0xfffd8000 0x200>;
186 interrupts = <25 4 5>; 406 interrupts = <25 4 5>;
187 atmel,use-dma-rx; 407 atmel,use-dma-rx;
188 atmel,use-dma-tx; 408 atmel,use-dma-tx;
409 pinctrl-names = "default";
410 pinctrl-0 = <&pinctrl_uart1>;
189 status = "disabled"; 411 status = "disabled";
190 }; 412 };
191 413
@@ -193,6 +415,8 @@
193 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 415 compatible = "cdns,at32ap7000-macb", "cdns,macb";
194 reg = <0xfffc4000 0x100>; 416 reg = <0xfffc4000 0x100>;
195 interrupts = <21 4 3>; 417 interrupts = <21 4 3>;
418 pinctrl-names = "default";
419 pinctrl-0 = <&pinctrl_macb_rmii>;
196 status = "disabled"; 420 status = "disabled";
197 }; 421 };
198 422
@@ -212,6 +436,15 @@
212 status = "disabled"; 436 status = "disabled";
213 }; 437 };
214 438
439 mmc0: mmc@fffa8000 {
440 compatible = "atmel,hsmci";
441 reg = <0xfffa8000 0x600>;
442 interrupts = <9 4 0>;
443 #address-cells = <1>;
444 #size-cells = <0>;
445 status = "disabled";
446 };
447
215 adc0: adc@fffe0000 { 448 adc0: adc@fffe0000 {
216 compatible = "atmel,at91sam9260-adc"; 449 compatible = "atmel,at91sam9260-adc";
217 reg = <0xfffe0000 0x100>; 450 reg = <0xfffe0000 0x100>;
@@ -257,6 +490,8 @@
257 >; 490 >;
258 atmel,nand-addr-offset = <21>; 491 atmel,nand-addr-offset = <21>;
259 atmel,nand-cmd-offset = <22>; 492 atmel,nand-cmd-offset = <22>;
493 pinctrl-names = "default";
494 pinctrl-0 = <&pinctrl_nand>;
260 gpios = <&pioC 13 0 495 gpios = <&pioC 13 0
261 &pioC 14 0 496 &pioC 14 0
262 0 497 0
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 3e6e5c1abbf3..66106eecf1ed 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -89,60 +89,243 @@
89 reg = <0xfffffd10 0x10>; 89 reg = <0xfffffd10 0x10>;
90 }; 90 };
91 91
92 pioA: gpio@fffff200 { 92 pinctrl@fffff200 {
93 compatible = "atmel,at91rm9200-gpio"; 93 #address-cells = <1>;
94 reg = <0xfffff200 0x100>; 94 #size-cells = <1>;
95 interrupts = <2 4 1>; 95 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
96 #gpio-cells = <2>; 96 ranges = <0xfffff200 0xfffff200 0xa00>;
97 gpio-controller;
98 interrupt-controller;
99 #interrupt-cells = <2>;
100 };
101 97
102 pioB: gpio@fffff400 { 98 atmel,mux-mask = <
103 compatible = "atmel,at91rm9200-gpio"; 99 /* A B */
104 reg = <0xfffff400 0x100>; 100 0xfffffffb 0xffffe07f /* pioA */
105 interrupts = <3 4 1>; 101 0x0007ffff 0x39072fff /* pioB */
106 #gpio-cells = <2>; 102 0xffffffff 0x3ffffff8 /* pioC */
107 gpio-controller; 103 0xfffffbff 0xffffffff /* pioD */
108 interrupt-controller; 104 0xffe00fff 0xfbfcff00 /* pioE */
109 #interrupt-cells = <2>; 105 >;
110 };
111 106
112 pioC: gpio@fffff600 { 107 /* shared pinctrl settings */
113 compatible = "atmel,at91rm9200-gpio"; 108 dbgu {
114 reg = <0xfffff600 0x100>; 109 pinctrl_dbgu: dbgu-0 {
115 interrupts = <4 4 1>; 110 atmel,pins =
116 #gpio-cells = <2>; 111 <2 30 0x1 0x0 /* PC30 periph A */
117 gpio-controller; 112 2 31 0x1 0x1>; /* PC31 periph with pullup */
118 interrupt-controller; 113 };
119 #interrupt-cells = <2>; 114 };
120 };
121 115
122 pioD: gpio@fffff800 { 116 usart0 {
123 compatible = "atmel,at91rm9200-gpio"; 117 pinctrl_usart0: usart0-0 {
124 reg = <0xfffff800 0x100>; 118 atmel,pins =
125 interrupts = <4 4 1>; 119 <0 26 0x1 0x1 /* PA26 periph A with pullup */
126 #gpio-cells = <2>; 120 0 27 0x1 0x0>; /* PA27 periph A */
127 gpio-controller; 121 };
128 interrupt-controller;
129 #interrupt-cells = <2>;
130 };
131 122
132 pioE: gpio@fffffa00 { 123 pinctrl_usart0_rts: usart0_rts-0 {
133 compatible = "atmel,at91rm9200-gpio"; 124 atmel,pins =
134 reg = <0xfffffa00 0x100>; 125 <0 28 0x1 0x0>; /* PA28 periph A */
135 interrupts = <4 4 1>; 126 };
136 #gpio-cells = <2>; 127
137 gpio-controller; 128 pinctrl_usart0_cts: usart0_cts-0 {
138 interrupt-controller; 129 atmel,pins =
139 #interrupt-cells = <2>; 130 <0 29 0x1 0x0>; /* PA29 periph A */
131 };
132 };
133
134 usart1 {
135 pinctrl_usart1: usart1-0 {
136 atmel,pins =
137 <3 0 0x1 0x1 /* PD0 periph A with pullup */
138 3 1 0x1 0x0>; /* PD1 periph A */
139 };
140
141 pinctrl_usart1_rts: usart1_rts-0 {
142 atmel,pins =
143 <3 7 0x2 0x0>; /* PD7 periph B */
144 };
145
146 pinctrl_usart1_cts: usart1_cts-0 {
147 atmel,pins =
148 <3 8 0x2 0x0>; /* PD8 periph B */
149 };
150 };
151
152 usart2 {
153 pinctrl_usart2: usart2-0 {
154 atmel,pins =
155 <3 2 0x1 0x1 /* PD2 periph A with pullup */
156 3 3 0x1 0x0>; /* PD3 periph A */
157 };
158
159 pinctrl_usart2_rts: usart2_rts-0 {
160 atmel,pins =
161 <3 5 0x2 0x0>; /* PD5 periph B */
162 };
163
164 pinctrl_usart2_cts: usart2_cts-0 {
165 atmel,pins =
166 <4 6 0x2 0x0>; /* PD6 periph B */
167 };
168 };
169
170 nand {
171 pinctrl_nand: nand-0 {
172 atmel,pins =
173 <0 22 0x0 0x1 /* PA22 gpio RDY pin pull_up*/
174 3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */
175 };
176 };
177
178 macb {
179 pinctrl_macb_rmii: macb_rmii-0 {
180 atmel,pins =
181 <2 25 0x2 0x0 /* PC25 periph B */
182 4 21 0x1 0x0 /* PE21 periph A */
183 4 23 0x1 0x0 /* PE23 periph A */
184 4 24 0x1 0x0 /* PE24 periph A */
185 4 25 0x1 0x0 /* PE25 periph A */
186 4 26 0x1 0x0 /* PE26 periph A */
187 4 27 0x1 0x0 /* PE27 periph A */
188 4 28 0x1 0x0 /* PE28 periph A */
189 4 29 0x1 0x0 /* PE29 periph A */
190 4 30 0x1 0x0>; /* PE30 periph A */
191 };
192
193 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
194 atmel,pins =
195 <2 20 0x2 0x0 /* PC20 periph B */
196 2 21 0x2 0x0 /* PC21 periph B */
197 2 22 0x2 0x0 /* PC22 periph B */
198 2 23 0x2 0x0 /* PC23 periph B */
199 2 24 0x2 0x0 /* PC24 periph B */
200 2 25 0x2 0x0 /* PC25 periph B */
201 2 27 0x2 0x0 /* PC27 periph B */
202 4 22 0x2 0x0>; /* PE22 periph B */
203 };
204 };
205
206 mmc0 {
207 pinctrl_mmc0_clk: mmc0_clk-0 {
208 atmel,pins =
209 <0 12 0x1 0x0>; /* PA12 periph A */
210 };
211
212 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
213 atmel,pins =
214 <0 1 0x1 0x1 /* PA1 periph A with pullup */
215 0 0 0x1 0x1>; /* PA0 periph A with pullup */
216 };
217
218 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
219 atmel,pins =
220 <0 3 0x1 0x1 /* PA3 periph A with pullup */
221 0 4 0x1 0x1 /* PA4 periph A with pullup */
222 0 5 0x1 0x1>; /* PA5 periph A with pullup */
223 };
224
225 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
226 atmel,pins =
227 <0 16 0x1 0x1 /* PA16 periph A with pullup */
228 0 17 0x1 0x1>; /* PA17 periph A with pullup */
229 };
230
231 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
232 atmel,pins =
233 <0 18 0x1 0x1 /* PA18 periph A with pullup */
234 0 19 0x1 0x1 /* PA19 periph A with pullup */
235 0 20 0x1 0x1>; /* PA20 periph A with pullup */
236 };
237 };
238
239 mmc1 {
240 pinctrl_mmc1_clk: mmc1_clk-0 {
241 atmel,pins =
242 <0 6 0x1 0x0>; /* PA6 periph A */
243 };
244
245 pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
246 atmel,pins =
247 <0 7 0x1 0x1 /* PA7 periph A with pullup */
248 0 8 0x1 0x1>; /* PA8 periph A with pullup */
249 };
250
251 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
252 atmel,pins =
253 <0 9 0x1 0x1 /* PA9 periph A with pullup */
254 0 10 0x1 0x1 /* PA10 periph A with pullup */
255 0 11 0x1 0x1>; /* PA11 periph A with pullup */
256 };
257
258 pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
259 atmel,pins =
260 <0 21 0x1 0x1 /* PA21 periph A with pullup */
261 0 22 0x1 0x1>; /* PA22 periph A with pullup */
262 };
263
264 pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
265 atmel,pins =
266 <0 23 0x1 0x1 /* PA23 periph A with pullup */
267 0 24 0x1 0x1 /* PA24 periph A with pullup */
268 0 25 0x1 0x1>; /* PA25 periph A with pullup */
269 };
270 };
271
272 pioA: gpio@fffff200 {
273 compatible = "atmel,at91rm9200-gpio";
274 reg = <0xfffff200 0x200>;
275 interrupts = <2 4 1>;
276 #gpio-cells = <2>;
277 gpio-controller;
278 interrupt-controller;
279 #interrupt-cells = <2>;
280 };
281
282 pioB: gpio@fffff400 {
283 compatible = "atmel,at91rm9200-gpio";
284 reg = <0xfffff400 0x200>;
285 interrupts = <3 4 1>;
286 #gpio-cells = <2>;
287 gpio-controller;
288 interrupt-controller;
289 #interrupt-cells = <2>;
290 };
291
292 pioC: gpio@fffff600 {
293 compatible = "atmel,at91rm9200-gpio";
294 reg = <0xfffff600 0x200>;
295 interrupts = <4 4 1>;
296 #gpio-cells = <2>;
297 gpio-controller;
298 interrupt-controller;
299 #interrupt-cells = <2>;
300 };
301
302 pioD: gpio@fffff800 {
303 compatible = "atmel,at91rm9200-gpio";
304 reg = <0xfffff800 0x200>;
305 interrupts = <4 4 1>;
306 #gpio-cells = <2>;
307 gpio-controller;
308 interrupt-controller;
309 #interrupt-cells = <2>;
310 };
311
312 pioE: gpio@fffffa00 {
313 compatible = "atmel,at91rm9200-gpio";
314 reg = <0xfffffa00 0x200>;
315 interrupts = <4 4 1>;
316 #gpio-cells = <2>;
317 gpio-controller;
318 interrupt-controller;
319 #interrupt-cells = <2>;
320 };
140 }; 321 };
141 322
142 dbgu: serial@ffffee00 { 323 dbgu: serial@ffffee00 {
143 compatible = "atmel,at91sam9260-usart"; 324 compatible = "atmel,at91sam9260-usart";
144 reg = <0xffffee00 0x200>; 325 reg = <0xffffee00 0x200>;
145 interrupts = <1 4 7>; 326 interrupts = <1 4 7>;
327 pinctrl-names = "default";
328 pinctrl-0 = <&pinctrl_dbgu>;
146 status = "disabled"; 329 status = "disabled";
147 }; 330 };
148 331
@@ -152,6 +335,8 @@
152 interrupts = <7 4 5>; 335 interrupts = <7 4 5>;
153 atmel,use-dma-rx; 336 atmel,use-dma-rx;
154 atmel,use-dma-tx; 337 atmel,use-dma-tx;
338 pinctrl-names = "default";
339 pinctrl-0 = <&pinctrl_usart0>;
155 status = "disabled"; 340 status = "disabled";
156 }; 341 };
157 342
@@ -161,6 +346,8 @@
161 interrupts = <8 4 5>; 346 interrupts = <8 4 5>;
162 atmel,use-dma-rx; 347 atmel,use-dma-rx;
163 atmel,use-dma-tx; 348 atmel,use-dma-tx;
349 pinctrl-names = "default";
350 pinctrl-0 = <&pinctrl_usart1>;
164 status = "disabled"; 351 status = "disabled";
165 }; 352 };
166 353
@@ -170,6 +357,8 @@
170 interrupts = <9 4 5>; 357 interrupts = <9 4 5>;
171 atmel,use-dma-rx; 358 atmel,use-dma-rx;
172 atmel,use-dma-tx; 359 atmel,use-dma-tx;
360 pinctrl-names = "default";
361 pinctrl-0 = <&pinctrl_usart2>;
173 status = "disabled"; 362 status = "disabled";
174 }; 363 };
175 364
@@ -177,6 +366,8 @@
177 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 366 compatible = "cdns,at32ap7000-macb", "cdns,macb";
178 reg = <0xfffbc000 0x100>; 367 reg = <0xfffbc000 0x100>;
179 interrupts = <21 4 3>; 368 interrupts = <21 4 3>;
369 pinctrl-names = "default";
370 pinctrl-0 = <&pinctrl_macb_rmii>;
180 status = "disabled"; 371 status = "disabled";
181 }; 372 };
182 373
@@ -195,6 +386,24 @@
195 #size-cells = <0>; 386 #size-cells = <0>;
196 status = "disabled"; 387 status = "disabled";
197 }; 388 };
389
390 mmc0: mmc@fff80000 {
391 compatible = "atmel,hsmci";
392 reg = <0xfff80000 0x600>;
393 interrupts = <10 4 0>;
394 #address-cells = <1>;
395 #size-cells = <0>;
396 status = "disabled";
397 };
398
399 mmc1: mmc@fff84000 {
400 compatible = "atmel,hsmci";
401 reg = <0xfff84000 0x600>;
402 interrupts = <11 4 0>;
403 #address-cells = <1>;
404 #size-cells = <0>;
405 status = "disabled";
406 };
198 }; 407 };
199 408
200 nand0: nand@40000000 { 409 nand0: nand@40000000 {
@@ -206,6 +415,8 @@
206 >; 415 >;
207 atmel,nand-addr-offset = <21>; 416 atmel,nand-addr-offset = <21>;
208 atmel,nand-cmd-offset = <22>; 417 atmel,nand-cmd-offset = <22>;
418 pinctrl-names = "default";
419 pinctrl-0 = <&pinctrl_nand>;
209 gpios = <&pioA 22 0 420 gpios = <&pioA 22 0
210 &pioD 15 0 421 &pioD 15 0
211 0 422 0
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts
index f86ac4b609fc..1eb08728f527 100644
--- a/arch/arm/boot/dts/at91sam9263ek.dts
+++ b/arch/arm/boot/dts/at91sam9263ek.dts
@@ -38,6 +38,10 @@
38 }; 38 };
39 39
40 usart0: serial@fff8c000 { 40 usart0: serial@fff8c000 {
41 pinctrl-0 = <
42 &pinctrl_usart0
43 &pinctrl_usart0_rts
44 &pinctrl_usart0_cts>;
41 status = "okay"; 45 status = "okay";
42 }; 46 };
43 47
@@ -50,6 +54,31 @@
50 atmel,vbus-gpio = <&pioA 25 0>; 54 atmel,vbus-gpio = <&pioA 25 0>;
51 status = "okay"; 55 status = "okay";
52 }; 56 };
57
58 mmc0: mmc@fff80000 {
59 pinctrl-0 = <
60 &pinctrl_board_mmc0
61 &pinctrl_mmc0_clk
62 &pinctrl_mmc0_slot0_cmd_dat0
63 &pinctrl_mmc0_slot0_dat1_3>;
64 status = "okay";
65 slot@0 {
66 reg = <0>;
67 bus-width = <4>;
68 cd-gpios = <&pioE 18 0>;
69 wp-gpios = <&pioE 19 0>;
70 };
71 };
72
73 pinctrl@fffff200 {
74 mmc0 {
75 pinctrl_board_mmc0: mmc0-board {
76 atmel,pins =
77 <5 18 0x0 0x5 /* PE18 gpio CD pin pull up and deglitch */
78 5 19 0x0 0x1>; /* PE19 gpio WP pin pull up */
79 };
80 };
81 };
53 }; 82 };
54 83
55 nand0: nand@40000000 { 84 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9g15.dtsi b/arch/arm/boot/dts/at91sam9g15.dtsi
new file mode 100644
index 000000000000..fbe7a7089c2a
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9g15.dtsi
@@ -0,0 +1,28 @@
1/*
2 * at91sam9g15.dtsi - Device Tree Include file for AT91SAM9G15 SoC
3 *
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
6 * Licensed under GPLv2.
7 */
8
9/include/ "at91sam9x5.dtsi"
10
11/ {
12 model = "Atmel AT91SAM9G15 SoC";
13 compatible = "atmel, at91sam9g15, atmel,at91sam9x5";
14
15 ahb {
16 apb {
17 pinctrl@fffff400 {
18 atmel,mux-mask = <
19 /* A B C */
20 0xffffffff 0xffe0399f 0x00000000 /* pioA */
21 0x00040000 0x00047e3f 0x00000000 /* pioB */
22 0xfdffffff 0x00000000 0xb83fffff /* pioC */
23 0x003fffff 0x003f8000 0x00000000 /* pioD */
24 >;
25 };
26 };
27 };
28};
diff --git a/arch/arm/boot/dts/at91sam9g15ek.dts b/arch/arm/boot/dts/at91sam9g15ek.dts
new file mode 100644
index 000000000000..86dd3f6d938f
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9g15ek.dts
@@ -0,0 +1,16 @@
1/*
2 * at91sam9g15ek.dts - Device Tree file for AT91SAM9G15-EK board
3 *
4 * Copyright (C) 2012 Atmel,
5 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9/dts-v1/;
10/include/ "at91sam9g15.dtsi"
11/include/ "at91sam9x5ek.dtsi"
12
13/ {
14 model = "Atmel AT91SAM9G25-EK";
15 compatible = "atmel,at91sam9g15ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
16};
diff --git a/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts b/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts
index f1b2e148ac8c..66467b113126 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts
+++ b/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts
@@ -12,6 +12,32 @@
12 model = "Atmel at91sam9g20ek 2 mmc"; 12 model = "Atmel at91sam9g20ek 2 mmc";
13 compatible = "atmel,at91sam9g20ek_2mmc", "atmel,at91sam9g20", "atmel,at91sam9"; 13 compatible = "atmel,at91sam9g20ek_2mmc", "atmel,at91sam9g20", "atmel,at91sam9";
14 14
15 ahb {
16 apb{
17 mmc0: mmc@fffa8000 {
18 /* clk already mux wuth slot0 */
19 pinctrl-0 = <
20 &pinctrl_board_mmc0_slot0
21 &pinctrl_mmc0_slot0_cmd_dat0
22 &pinctrl_mmc0_slot0_dat1_3>;
23 slot@0 {
24 reg = <0>;
25 bus-width = <4>;
26 cd-gpios = <&pioC 2 0>;
27 };
28 };
29
30 pinctrl@fffff400 {
31 mmc0_slot0 {
32 pinctrl_board_mmc0_slot0: mmc0_slot0-board {
33 atmel,pins =
34 <2 2 0x0 0x5>; /* PC2 gpio CD pin pull up and deglitch */
35 };
36 };
37 };
38 };
39 };
40
15 leds { 41 leds {
16 compatible = "gpio-leds"; 42 compatible = "gpio-leds";
17 43
diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
index e6391a4e6649..32a500a0e481 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
@@ -35,6 +35,13 @@
35 }; 35 };
36 36
37 usart0: serial@fffb0000 { 37 usart0: serial@fffb0000 {
38 pinctrl-0 =
39 <&pinctrl_usart0
40 &pinctrl_usart0_rts
41 &pinctrl_usart0_cts
42 &pinctrl_usart0_dtr_dsr
43 &pinctrl_usart0_dcd
44 &pinctrl_usart0_ri>;
38 status = "okay"; 45 status = "okay";
39 }; 46 };
40 47
@@ -51,6 +58,29 @@
51 atmel,vbus-gpio = <&pioC 5 0>; 58 atmel,vbus-gpio = <&pioC 5 0>;
52 status = "okay"; 59 status = "okay";
53 }; 60 };
61
62 mmc0: mmc@fffa8000 {
63 pinctrl-0 = <
64 &pinctrl_board_mmc0_slot1
65 &pinctrl_mmc0_clk
66 &pinctrl_mmc0_slot1_cmd_dat0
67 &pinctrl_mmc0_slot1_dat1_3>;
68 status = "okay";
69 slot@1 {
70 reg = <1>;
71 bus-width = <4>;
72 cd-gpios = <&pioC 9 0>;
73 };
74 };
75
76 pinctrl@fffff400 {
77 mmc0_slot1 {
78 pinctrl_board_mmc0_slot1: mmc0_slot1-board {
79 atmel,pins =
80 <2 9 0x0 0x5>; /* PC9 gpio CD pin pull up and deglitch */
81 };
82 };
83 };
54 }; 84 };
55 85
56 nand0: nand@40000000 { 86 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9g25.dtsi b/arch/arm/boot/dts/at91sam9g25.dtsi
new file mode 100644
index 000000000000..05a718fb83c4
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9g25.dtsi
@@ -0,0 +1,28 @@
1/*
2 * at91sam9g25.dtsi - Device Tree Include file for AT91SAM9G25 SoC
3 *
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
6 * Licensed under GPLv2.
7 */
8
9/include/ "at91sam9x5.dtsi"
10
11/ {
12 model = "Atmel AT91SAM9G25 SoC";
13 compatible = "atmel, at91sam9g25, atmel,at91sam9x5";
14
15 ahb {
16 apb {
17 pinctrl@fffff400 {
18 atmel,mux-mask = <
19 /* A B C */
20 0xffffffff 0xffe0399f 0xc000001c /* pioA */
21 0x0007ffff 0x8000fe3f 0x00000000 /* pioB */
22 0x80000000 0x07c0ffff 0xb83fffff /* pioC */
23 0x003fffff 0x003f8000 0x00000000 /* pioD */
24 >;
25 };
26 };
27 };
28};
diff --git a/arch/arm/boot/dts/at91sam9g25ek.dts b/arch/arm/boot/dts/at91sam9g25ek.dts
index 877c08f06763..c5ab16fba059 100644
--- a/arch/arm/boot/dts/at91sam9g25ek.dts
+++ b/arch/arm/boot/dts/at91sam9g25ek.dts
@@ -7,55 +7,10 @@
7 * Licensed under GPLv2 or later. 7 * Licensed under GPLv2 or later.
8 */ 8 */
9/dts-v1/; 9/dts-v1/;
10/include/ "at91sam9x5.dtsi" 10/include/ "at91sam9g25.dtsi"
11/include/ "at91sam9x5cm.dtsi" 11/include/ "at91sam9x5ek.dtsi"
12 12
13/ { 13/ {
14 model = "Atmel AT91SAM9G25-EK"; 14 model = "Atmel AT91SAM9G25-EK";
15 compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9"; 15 compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
16
17 chosen {
18 bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
19 };
20
21 ahb {
22 apb {
23 dbgu: serial@fffff200 {
24 status = "okay";
25 };
26
27 usart0: serial@f801c000 {
28 status = "okay";
29 };
30
31 macb0: ethernet@f802c000 {
32 phy-mode = "rmii";
33 status = "okay";
34 };
35
36 i2c0: i2c@f8010000 {
37 status = "okay";
38 };
39
40 i2c1: i2c@f8014000 {
41 status = "okay";
42 };
43
44 i2c2: i2c@f8018000 {
45 status = "okay";
46 };
47 };
48
49 usb0: ohci@00600000 {
50 status = "okay";
51 num-ports = <2>;
52 atmel,vbus-gpio = <&pioD 19 1
53 &pioD 20 1
54 >;
55 };
56
57 usb1: ehci@00700000 {
58 status = "okay";
59 };
60 };
61}; 16};
diff --git a/arch/arm/boot/dts/at91sam9g35.dtsi b/arch/arm/boot/dts/at91sam9g35.dtsi
new file mode 100644
index 000000000000..f9d14a722794
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9g35.dtsi
@@ -0,0 +1,28 @@
1/*
2 * at91sam9g35.dtsi - Device Tree Include file for AT91SAM9G35 SoC
3 *
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
6 * Licensed under GPLv2.
7 */
8
9/include/ "at91sam9x5.dtsi"
10
11/ {
12 model = "Atmel AT91SAM9G35 SoC";
13 compatible = "atmel, at91sam9g35, atmel,at91sam9x5";
14
15 ahb {
16 apb {
17 pinctrl@fffff400 {
18 atmel,mux-mask = <
19 /* A B C */
20 0xffffffff 0xffe0399f 0xc000000c /* pioA */
21 0x000406ff 0x00047e3f 0x00000000 /* pioB */
22 0xfdffffff 0x00000000 0xb83fffff /* pioC */
23 0x003fffff 0x003f8000 0x00000000 /* pioD */
24 >;
25 };
26 };
27 };
28};
diff --git a/arch/arm/boot/dts/at91sam9g35ek.dts b/arch/arm/boot/dts/at91sam9g35ek.dts
new file mode 100644
index 000000000000..95944bdd798d
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9g35ek.dts
@@ -0,0 +1,16 @@
1/*
2 * at91sam9g35ek.dts - Device Tree file for AT91SAM9G35-EK board
3 *
4 * Copyright (C) 2012 Atmel,
5 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9/dts-v1/;
10/include/ "at91sam9g35.dtsi"
11/include/ "at91sam9x5ek.dtsi"
12
13/ {
14 model = "Atmel AT91SAM9G35-EK";
15 compatible = "atmel,at91sam9g35ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
16};
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 3add030d61f8..0741caeeced1 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -108,60 +108,243 @@
108 interrupts = <21 4 0>; 108 interrupts = <21 4 0>;
109 }; 109 };
110 110
111 pioA: gpio@fffff200 { 111 pinctrl@fffff200 {
112 compatible = "atmel,at91rm9200-gpio"; 112 #address-cells = <1>;
113 reg = <0xfffff200 0x100>; 113 #size-cells = <1>;
114 interrupts = <2 4 1>; 114 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
115 #gpio-cells = <2>; 115 ranges = <0xfffff200 0xfffff200 0xa00>;
116 gpio-controller; 116
117 interrupt-controller; 117 atmel,mux-mask = <
118 #interrupt-cells = <2>; 118 /* A B */
119 }; 119 0xffffffff 0xffc003ff /* pioA */
120 0xffffffff 0x800f8f00 /* pioB */
121 0xffffffff 0x00000e00 /* pioC */
122 0xffffffff 0xff0c1381 /* pioD */
123 0xffffffff 0x81ffff81 /* pioE */
124 >;
125
126 /* shared pinctrl settings */
127 dbgu {
128 pinctrl_dbgu: dbgu-0 {
129 atmel,pins =
130 <1 12 0x1 0x0 /* PB12 periph A */
131 1 13 0x1 0x0>; /* PB13 periph A */
132 };
133 };
120 134
121 pioB: gpio@fffff400 { 135 usart0 {
122 compatible = "atmel,at91rm9200-gpio"; 136 pinctrl_usart0: usart0-0 {
123 reg = <0xfffff400 0x100>; 137 atmel,pins =
124 interrupts = <3 4 1>; 138 <1 19 0x1 0x1 /* PB19 periph A with pullup */
125 #gpio-cells = <2>; 139 1 18 0x1 0x0>; /* PB18 periph A */
126 gpio-controller; 140 };
127 interrupt-controller; 141
128 #interrupt-cells = <2>; 142 pinctrl_usart0_rts: usart0_rts-0 {
129 }; 143 atmel,pins =
144 <1 17 0x2 0x0>; /* PB17 periph B */
145 };
146
147 pinctrl_usart0_cts: usart0_cts-0 {
148 atmel,pins =
149 <1 15 0x2 0x0>; /* PB15 periph B */
150 };
151 };
130 152
131 pioC: gpio@fffff600 { 153 uart1 {
132 compatible = "atmel,at91rm9200-gpio"; 154 pinctrl_usart1: usart1-0 {
133 reg = <0xfffff600 0x100>; 155 atmel,pins =
134 interrupts = <4 4 1>; 156 <1 4 0x1 0x1 /* PB4 periph A with pullup */
135 #gpio-cells = <2>; 157 1 5 0x1 0x0>; /* PB5 periph A */
136 gpio-controller; 158 };
137 interrupt-controller; 159
138 #interrupt-cells = <2>; 160 pinctrl_usart1_rts: usart1_rts-0 {
139 }; 161 atmel,pins =
162 <3 16 0x1 0x0>; /* PD16 periph A */
163 };
164
165 pinctrl_usart1_cts: usart1_cts-0 {
166 atmel,pins =
167 <3 17 0x1 0x0>; /* PD17 periph A */
168 };
169 };
140 170
141 pioD: gpio@fffff800 { 171 usart2 {
142 compatible = "atmel,at91rm9200-gpio"; 172 pinctrl_usart2: usart2-0 {
143 reg = <0xfffff800 0x100>; 173 atmel,pins =
144 interrupts = <5 4 1>; 174 <1 6 0x1 0x1 /* PB6 periph A with pullup */
145 #gpio-cells = <2>; 175 1 7 0x1 0x0>; /* PB7 periph A */
146 gpio-controller; 176 };
147 interrupt-controller; 177
148 #interrupt-cells = <2>; 178 pinctrl_usart2_rts: usart2_rts-0 {
149 }; 179 atmel,pins =
180 <2 9 0x2 0x0>; /* PC9 periph B */
181 };
182
183 pinctrl_usart2_cts: usart2_cts-0 {
184 atmel,pins =
185 <2 11 0x2 0x0>; /* PC11 periph B */
186 };
187 };
150 188
151 pioE: gpio@fffffa00 { 189 usart3 {
152 compatible = "atmel,at91rm9200-gpio"; 190 pinctrl_usart3: usart3-0 {
153 reg = <0xfffffa00 0x100>; 191 atmel,pins =
154 interrupts = <5 4 1>; 192 <1 8 0x1 0x1 /* PB9 periph A with pullup */
155 #gpio-cells = <2>; 193 1 9 0x1 0x0>; /* PB8 periph A */
156 gpio-controller; 194 };
157 interrupt-controller; 195
158 #interrupt-cells = <2>; 196 pinctrl_usart3_rts: usart3_rts-0 {
197 atmel,pins =
198 <0 23 0x2 0x0>; /* PA23 periph B */
199 };
200
201 pinctrl_usart3_cts: usart3_cts-0 {
202 atmel,pins =
203 <0 24 0x2 0x0>; /* PA24 periph B */
204 };
205 };
206
207 nand {
208 pinctrl_nand: nand-0 {
209 atmel,pins =
210 <2 8 0x0 0x1 /* PC8 gpio RDY pin pull_up*/
211 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
212 };
213 };
214
215 macb {
216 pinctrl_macb_rmii: macb_rmii-0 {
217 atmel,pins =
218 <0 10 0x1 0x0 /* PA10 periph A */
219 0 11 0x1 0x0 /* PA11 periph A */
220 0 12 0x1 0x0 /* PA12 periph A */
221 0 13 0x1 0x0 /* PA13 periph A */
222 0 14 0x1 0x0 /* PA14 periph A */
223 0 15 0x1 0x0 /* PA15 periph A */
224 0 16 0x1 0x0 /* PA16 periph A */
225 0 17 0x1 0x0 /* PA17 periph A */
226 0 18 0x1 0x0 /* PA18 periph A */
227 0 19 0x1 0x0>; /* PA19 periph A */
228 };
229
230 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
231 atmel,pins =
232 <0 6 0x2 0x0 /* PA6 periph B */
233 0 7 0x2 0x0 /* PA7 periph B */
234 0 8 0x2 0x0 /* PA8 periph B */
235 0 9 0x2 0x0 /* PA9 periph B */
236 0 27 0x2 0x0 /* PA27 periph B */
237 0 28 0x2 0x0 /* PA28 periph B */
238 0 29 0x2 0x0 /* PA29 periph B */
239 0 30 0x2 0x0>; /* PA30 periph B */
240 };
241 };
242
243 mmc0 {
244 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
245 atmel,pins =
246 <0 0 0x1 0x0 /* PA0 periph A */
247 0 1 0x1 0x1 /* PA1 periph A with pullup */
248 0 2 0x1 0x1>; /* PA2 periph A with pullup */
249 };
250
251 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
252 atmel,pins =
253 <0 3 0x1 0x1 /* PA3 periph A with pullup */
254 0 4 0x1 0x1 /* PA4 periph A with pullup */
255 0 5 0x1 0x1>; /* PA5 periph A with pullup */
256 };
257
258 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
259 atmel,pins =
260 <0 6 0x1 0x1 /* PA6 periph A with pullup */
261 0 7 0x1 0x1 /* PA7 periph A with pullup */
262 0 8 0x1 0x1 /* PA8 periph A with pullup */
263 0 9 0x1 0x1>; /* PA9 periph A with pullup */
264 };
265 };
266
267 mmc1 {
268 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
269 atmel,pins =
270 <0 31 0x1 0x0 /* PA31 periph A */
271 0 22 0x1 0x1 /* PA22 periph A with pullup */
272 0 23 0x1 0x1>; /* PA23 periph A with pullup */
273 };
274
275 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
276 atmel,pins =
277 <0 24 0x1 0x1 /* PA24 periph A with pullup */
278 0 25 0x1 0x1 /* PA25 periph A with pullup */
279 0 26 0x1 0x1>; /* PA26 periph A with pullup */
280 };
281
282 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
283 atmel,pins =
284 <0 27 0x1 0x1 /* PA27 periph A with pullup */
285 0 28 0x1 0x1 /* PA28 periph A with pullup */
286 0 29 0x1 0x1 /* PA29 periph A with pullup */
287 0 20 0x1 0x1>; /* PA30 periph A with pullup */
288 };
289 };
290
291 pioA: gpio@fffff200 {
292 compatible = "atmel,at91rm9200-gpio";
293 reg = <0xfffff200 0x200>;
294 interrupts = <2 4 1>;
295 #gpio-cells = <2>;
296 gpio-controller;
297 interrupt-controller;
298 #interrupt-cells = <2>;
299 };
300
301 pioB: gpio@fffff400 {
302 compatible = "atmel,at91rm9200-gpio";
303 reg = <0xfffff400 0x200>;
304 interrupts = <3 4 1>;
305 #gpio-cells = <2>;
306 gpio-controller;
307 interrupt-controller;
308 #interrupt-cells = <2>;
309 };
310
311 pioC: gpio@fffff600 {
312 compatible = "atmel,at91rm9200-gpio";
313 reg = <0xfffff600 0x200>;
314 interrupts = <4 4 1>;
315 #gpio-cells = <2>;
316 gpio-controller;
317 interrupt-controller;
318 #interrupt-cells = <2>;
319 };
320
321 pioD: gpio@fffff800 {
322 compatible = "atmel,at91rm9200-gpio";
323 reg = <0xfffff800 0x200>;
324 interrupts = <5 4 1>;
325 #gpio-cells = <2>;
326 gpio-controller;
327 interrupt-controller;
328 #interrupt-cells = <2>;
329 };
330
331 pioE: gpio@fffffa00 {
332 compatible = "atmel,at91rm9200-gpio";
333 reg = <0xfffffa00 0x200>;
334 interrupts = <5 4 1>;
335 #gpio-cells = <2>;
336 gpio-controller;
337 interrupt-controller;
338 #interrupt-cells = <2>;
339 };
159 }; 340 };
160 341
161 dbgu: serial@ffffee00 { 342 dbgu: serial@ffffee00 {
162 compatible = "atmel,at91sam9260-usart"; 343 compatible = "atmel,at91sam9260-usart";
163 reg = <0xffffee00 0x200>; 344 reg = <0xffffee00 0x200>;
164 interrupts = <1 4 7>; 345 interrupts = <1 4 7>;
346 pinctrl-names = "default";
347 pinctrl-0 = <&pinctrl_dbgu>;
165 status = "disabled"; 348 status = "disabled";
166 }; 349 };
167 350
@@ -171,6 +354,8 @@
171 interrupts = <7 4 5>; 354 interrupts = <7 4 5>;
172 atmel,use-dma-rx; 355 atmel,use-dma-rx;
173 atmel,use-dma-tx; 356 atmel,use-dma-tx;
357 pinctrl-names = "default";
358 pinctrl-0 = <&pinctrl_usart0>;
174 status = "disabled"; 359 status = "disabled";
175 }; 360 };
176 361
@@ -180,6 +365,8 @@
180 interrupts = <8 4 5>; 365 interrupts = <8 4 5>;
181 atmel,use-dma-rx; 366 atmel,use-dma-rx;
182 atmel,use-dma-tx; 367 atmel,use-dma-tx;
368 pinctrl-names = "default";
369 pinctrl-0 = <&pinctrl_usart1>;
183 status = "disabled"; 370 status = "disabled";
184 }; 371 };
185 372
@@ -189,6 +376,8 @@
189 interrupts = <9 4 5>; 376 interrupts = <9 4 5>;
190 atmel,use-dma-rx; 377 atmel,use-dma-rx;
191 atmel,use-dma-tx; 378 atmel,use-dma-tx;
379 pinctrl-names = "default";
380 pinctrl-0 = <&pinctrl_usart2>;
192 status = "disabled"; 381 status = "disabled";
193 }; 382 };
194 383
@@ -198,6 +387,8 @@
198 interrupts = <10 4 5>; 387 interrupts = <10 4 5>;
199 atmel,use-dma-rx; 388 atmel,use-dma-rx;
200 atmel,use-dma-tx; 389 atmel,use-dma-tx;
390 pinctrl-names = "default";
391 pinctrl-0 = <&pinctrl_usart3>;
201 status = "disabled"; 392 status = "disabled";
202 }; 393 };
203 394
@@ -205,6 +396,8 @@
205 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 396 compatible = "cdns,at32ap7000-macb", "cdns,macb";
206 reg = <0xfffbc000 0x100>; 397 reg = <0xfffbc000 0x100>;
207 interrupts = <25 4 3>; 398 interrupts = <25 4 3>;
399 pinctrl-names = "default";
400 pinctrl-0 = <&pinctrl_macb_rmii>;
208 status = "disabled"; 401 status = "disabled";
209 }; 402 };
210 403
@@ -262,6 +455,24 @@
262 trigger-value = <0x6>; 455 trigger-value = <0x6>;
263 }; 456 };
264 }; 457 };
458
459 mmc0: mmc@fff80000 {
460 compatible = "atmel,hsmci";
461 reg = <0xfff80000 0x600>;
462 interrupts = <11 4 0>;
463 #address-cells = <1>;
464 #size-cells = <0>;
465 status = "disabled";
466 };
467
468 mmc1: mmc@fffd0000 {
469 compatible = "atmel,hsmci";
470 reg = <0xfffd0000 0x600>;
471 interrupts = <29 4 0>;
472 #address-cells = <1>;
473 #size-cells = <0>;
474 status = "disabled";
475 };
265 }; 476 };
266 477
267 nand0: nand@40000000 { 478 nand0: nand@40000000 {
@@ -273,6 +484,8 @@
273 >; 484 >;
274 atmel,nand-addr-offset = <21>; 485 atmel,nand-addr-offset = <21>;
275 atmel,nand-cmd-offset = <22>; 486 atmel,nand-cmd-offset = <22>;
487 pinctrl-names = "default";
488 pinctrl-0 = <&pinctrl_nand>;
276 gpios = <&pioC 8 0 489 gpios = <&pioC 8 0
277 &pioC 14 0 490 &pioC 14 0
278 0 491 0
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 15e1dd43f625..20c31913c270 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -39,6 +39,10 @@
39 }; 39 };
40 40
41 usart1: serial@fff90000 { 41 usart1: serial@fff90000 {
42 pinctrl-0 =
43 <&pinctrl_usart1
44 &pinctrl_usart1_rts
45 &pinctrl_usart1_cts>;
42 status = "okay"; 46 status = "okay";
43 }; 47 };
44 48
@@ -54,6 +58,50 @@
54 i2c1: i2c@fff88000 { 58 i2c1: i2c@fff88000 {
55 status = "okay"; 59 status = "okay";
56 }; 60 };
61
62 mmc0: mmc@fff80000 {
63 pinctrl-0 = <
64 &pinctrl_board_mmc0
65 &pinctrl_mmc0_slot0_clk_cmd_dat0
66 &pinctrl_mmc0_slot0_dat1_3>;
67 status = "okay";
68 slot@0 {
69 reg = <0>;
70 bus-width = <4>;
71 cd-gpios = <&pioD 10 0>;
72 };
73 };
74
75 mmc1: mmc@fffd0000 {
76 pinctrl-0 = <
77 &pinctrl_board_mmc1
78 &pinctrl_mmc1_slot0_clk_cmd_dat0
79 &pinctrl_mmc1_slot0_dat1_3>;
80 status = "okay";
81 slot@0 {
82 reg = <0>;
83 bus-width = <4>;
84 cd-gpios = <&pioD 11 0>;
85 wp-gpios = <&pioD 29 0>;
86 };
87 };
88
89 pinctrl@fffff200 {
90 mmc0 {
91 pinctrl_board_mmc0: mmc0-board {
92 atmel,pins =
93 <3 10 0x0 0x5>; /* PD10 gpio CD pin pull up and deglitch */
94 };
95 };
96
97 mmc1 {
98 pinctrl_board_mmc1: mmc1-board {
99 atmel,pins =
100 <3 11 0x0 0x5 /* PD11 gpio CD pin pull up and deglitch */
101 3 29 0x0 0x1>; /* PD29 gpio WP pin pull up */
102 };
103 };
104 };
57 }; 105 };
58 106
59 nand0: nand@40000000 { 107 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 82508d68aa7e..e9efb34f4379 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -84,6 +84,15 @@
84 reg = <0xfffffe10 0x10>; 84 reg = <0xfffffe10 0x10>;
85 }; 85 };
86 86
87 mmc0: mmc@f0008000 {
88 compatible = "atmel,hsmci";
89 reg = <0xf0008000 0x600>;
90 interrupts = <12 4 0>;
91 #address-cells = <1>;
92 #size-cells = <0>;
93 status = "disabled";
94 };
95
87 tcb0: timer@f8008000 { 96 tcb0: timer@f8008000 {
88 compatible = "atmel,at91sam9x5-tcb"; 97 compatible = "atmel,at91sam9x5-tcb";
89 reg = <0xf8008000 0x100>; 98 reg = <0xf8008000 0x100>;
@@ -102,50 +111,186 @@
102 interrupts = <20 4 0>; 111 interrupts = <20 4 0>;
103 }; 112 };
104 113
105 pioA: gpio@fffff400 { 114 pinctrl@fffff400 {
106 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 115 #address-cells = <1>;
107 reg = <0xfffff400 0x100>; 116 #size-cells = <1>;
108 interrupts = <2 4 1>; 117 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
109 #gpio-cells = <2>; 118 ranges = <0xfffff400 0xfffff400 0x800>;
110 gpio-controller;
111 interrupt-controller;
112 #interrupt-cells = <2>;
113 };
114 119
115 pioB: gpio@fffff600 { 120 atmel,mux-mask = <
116 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 121 /* A B C */
117 reg = <0xfffff600 0x100>; 122 0xffffffff 0xffe07983 0x00000000 /* pioA */
118 interrupts = <2 4 1>; 123 0x00040000 0x00047e0f 0x00000000 /* pioB */
119 #gpio-cells = <2>; 124 0xfdffffff 0x07c00000 0xb83fffff /* pioC */
120 gpio-controller; 125 0x003fffff 0x003f8000 0x00000000 /* pioD */
121 interrupt-controller; 126 >;
122 #interrupt-cells = <2>;
123 };
124 127
125 pioC: gpio@fffff800 { 128 /* shared pinctrl settings */
126 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 129 dbgu {
127 reg = <0xfffff800 0x100>; 130 pinctrl_dbgu: dbgu-0 {
128 interrupts = <3 4 1>; 131 atmel,pins =
129 #gpio-cells = <2>; 132 <0 9 0x1 0x0 /* PA9 periph A */
130 gpio-controller; 133 0 10 0x1 0x1>; /* PA10 periph with pullup */
131 interrupt-controller; 134 };
132 #interrupt-cells = <2>; 135 };
133 };
134 136
135 pioD: gpio@fffffa00 { 137 usart0 {
136 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 138 pinctrl_usart0: usart0-0 {
137 reg = <0xfffffa00 0x100>; 139 atmel,pins =
138 interrupts = <3 4 1>; 140 <0 1 0x1 0x1 /* PA1 periph A with pullup */
139 #gpio-cells = <2>; 141 0 0 0x1 0x0>; /* PA0 periph A */
140 gpio-controller; 142 };
141 interrupt-controller; 143
142 #interrupt-cells = <2>; 144 pinctrl_usart0_rts: usart0_rts-0 {
145 atmel,pins =
146 <0 2 0x1 0x0>; /* PA2 periph A */
147 };
148
149 pinctrl_usart0_cts: usart0_cts-0 {
150 atmel,pins =
151 <0 3 0x1 0x0>; /* PA3 periph A */
152 };
153 };
154
155 usart1 {
156 pinctrl_usart1: usart1-0 {
157 atmel,pins =
158 <0 6 0x1 0x1 /* PA6 periph A with pullup */
159 0 5 0x1 0x0>; /* PA5 periph A */
160 };
161 };
162
163 usart2 {
164 pinctrl_usart2: usart2-0 {
165 atmel,pins =
166 <0 8 0x1 0x1 /* PA8 periph A with pullup */
167 0 7 0x1 0x0>; /* PA7 periph A */
168 };
169
170 pinctrl_usart2_rts: usart2_rts-0 {
171 atmel,pins =
172 <1 0 0x2 0x0>; /* PB0 periph B */
173 };
174
175 pinctrl_usart2_cts: usart2_cts-0 {
176 atmel,pins =
177 <1 1 0x2 0x0>; /* PB1 periph B */
178 };
179 };
180
181 usart3 {
182 pinctrl_usart3: usart3-0 {
183 atmel,pins =
184 <2 23 0x2 0x1 /* PC23 periph B with pullup */
185 2 22 0x2 0x0>; /* PC22 periph B */
186 };
187
188 pinctrl_usart3_rts: usart3_rts-0 {
189 atmel,pins =
190 <2 24 0x2 0x0>; /* PC24 periph B */
191 };
192
193 pinctrl_usart3_cts: usart3_cts-0 {
194 atmel,pins =
195 <2 25 0x2 0x0>; /* PC25 periph B */
196 };
197 };
198
199 uart0 {
200 pinctrl_uart0: uart0-0 {
201 atmel,pins =
202 <2 9 0x3 0x1 /* PC9 periph C with pullup */
203 2 8 0x3 0x0>; /* PC8 periph C */
204 };
205 };
206
207 uart1 {
208 pinctrl_uart1: uart1-0 {
209 atmel,pins =
210 <2 16 0x3 0x1 /* PC17 periph C with pullup */
211 2 17 0x3 0x0>; /* PC16 periph C */
212 };
213 };
214
215 nand {
216 pinctrl_nand: nand-0 {
217 atmel,pins =
218 <3 5 0x0 0x1 /* PD5 gpio RDY pin pull_up*/
219 3 4 0x0 0x1>; /* PD4 gpio enable pin pull_up */
220 };
221 };
222
223 mmc0 {
224 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
225 atmel,pins =
226 <0 17 0x1 0x0 /* PA17 periph A */
227 0 16 0x1 0x1 /* PA16 periph A with pullup */
228 0 15 0x1 0x1>; /* PA15 periph A with pullup */
229 };
230
231 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
232 atmel,pins =
233 <0 18 0x1 0x1 /* PA18 periph A with pullup */
234 0 19 0x1 0x1 /* PA19 periph A with pullup */
235 0 20 0x1 0x1>; /* PA20 periph A with pullup */
236 };
237
238 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
239 atmel,pins =
240 <0 11 0x2 0x1 /* PA11 periph B with pullup */
241 0 12 0x2 0x1 /* PA12 periph B with pullup */
242 0 13 0x2 0x1 /* PA13 periph B with pullup */
243 0 14 0x2 0x1>; /* PA14 periph B with pullup */
244 };
245 };
246
247 pioA: gpio@fffff400 {
248 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
249 reg = <0xfffff400 0x200>;
250 interrupts = <2 4 1>;
251 #gpio-cells = <2>;
252 gpio-controller;
253 interrupt-controller;
254 #interrupt-cells = <2>;
255 };
256
257 pioB: gpio@fffff600 {
258 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
259 reg = <0xfffff600 0x200>;
260 interrupts = <2 4 1>;
261 #gpio-cells = <2>;
262 gpio-controller;
263 interrupt-controller;
264 #interrupt-cells = <2>;
265 };
266
267 pioC: gpio@fffff800 {
268 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
269 reg = <0xfffff800 0x200>;
270 interrupts = <3 4 1>;
271 #gpio-cells = <2>;
272 gpio-controller;
273 interrupt-controller;
274 #interrupt-cells = <2>;
275 };
276
277 pioD: gpio@fffffa00 {
278 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
279 reg = <0xfffffa00 0x200>;
280 interrupts = <3 4 1>;
281 #gpio-cells = <2>;
282 gpio-controller;
283 interrupt-controller;
284 #interrupt-cells = <2>;
285 };
143 }; 286 };
144 287
145 dbgu: serial@fffff200 { 288 dbgu: serial@fffff200 {
146 compatible = "atmel,at91sam9260-usart"; 289 compatible = "atmel,at91sam9260-usart";
147 reg = <0xfffff200 0x200>; 290 reg = <0xfffff200 0x200>;
148 interrupts = <1 4 7>; 291 interrupts = <1 4 7>;
292 pinctrl-names = "default";
293 pinctrl-0 = <&pinctrl_dbgu>;
149 status = "disabled"; 294 status = "disabled";
150 }; 295 };
151 296
@@ -155,6 +300,8 @@
155 interrupts = <5 4 5>; 300 interrupts = <5 4 5>;
156 atmel,use-dma-rx; 301 atmel,use-dma-rx;
157 atmel,use-dma-tx; 302 atmel,use-dma-tx;
303 pinctrl-names = "default";
304 pinctrl-0 = <&pinctrl_usart0>;
158 status = "disabled"; 305 status = "disabled";
159 }; 306 };
160 307
@@ -164,6 +311,8 @@
164 interrupts = <6 4 5>; 311 interrupts = <6 4 5>;
165 atmel,use-dma-rx; 312 atmel,use-dma-rx;
166 atmel,use-dma-tx; 313 atmel,use-dma-tx;
314 pinctrl-names = "default";
315 pinctrl-0 = <&pinctrl_usart1>;
167 status = "disabled"; 316 status = "disabled";
168 }; 317 };
169 318
@@ -173,6 +322,8 @@
173 interrupts = <7 4 5>; 322 interrupts = <7 4 5>;
174 atmel,use-dma-rx; 323 atmel,use-dma-rx;
175 atmel,use-dma-tx; 324 atmel,use-dma-tx;
325 pinctrl-names = "default";
326 pinctrl-0 = <&pinctrl_usart2>;
176 status = "disabled"; 327 status = "disabled";
177 }; 328 };
178 329
@@ -182,6 +333,8 @@
182 interrupts = <8 4 5>; 333 interrupts = <8 4 5>;
183 atmel,use-dma-rx; 334 atmel,use-dma-rx;
184 atmel,use-dma-tx; 335 atmel,use-dma-tx;
336 pinctrl-names = "default";
337 pinctrl-0 = <&pinctrl_usart3>;
185 status = "disabled"; 338 status = "disabled";
186 }; 339 };
187 340
@@ -215,6 +368,8 @@
215 >; 368 >;
216 atmel,nand-addr-offset = <21>; 369 atmel,nand-addr-offset = <21>;
217 atmel,nand-cmd-offset = <22>; 370 atmel,nand-cmd-offset = <22>;
371 pinctrl-names = "default";
372 pinctrl-0 = <&pinctrl_nand>;
218 gpios = <&pioD 5 0 373 gpios = <&pioD 5 0
219 &pioD 4 0 374 &pioD 4 0
220 0 375 0
diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts
index 912b2c283d6f..0376bf4fd66b 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -45,6 +45,28 @@
45 i2c1: i2c@f8014000 { 45 i2c1: i2c@f8014000 {
46 status = "okay"; 46 status = "okay";
47 }; 47 };
48
49 mmc0: mmc@f0008000 {
50 pinctrl-0 = <
51 &pinctrl_board_mmc0
52 &pinctrl_mmc0_slot0_clk_cmd_dat0
53 &pinctrl_mmc0_slot0_dat1_3>;
54 status = "okay";
55 slot@0 {
56 reg = <0>;
57 bus-width = <4>;
58 cd-gpios = <&pioA 7 0>;
59 };
60 };
61
62 pinctrl@fffff400 {
63 mmc0 {
64 pinctrl_board_mmc0: mmc0-board {
65 atmel,pins =
66 <0 7 0x0 0x5>; /* PA7 gpio CD pin pull up and deglitch */
67 };
68 };
69 };
48 }; 70 };
49 71
50 nand0: nand@40000000 { 72 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9x25.dtsi b/arch/arm/boot/dts/at91sam9x25.dtsi
new file mode 100644
index 000000000000..54eb33ba6d22
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x25.dtsi
@@ -0,0 +1,49 @@
1/*
2 * at91sam9x25.dtsi - Device Tree Include file for AT91SAM9X25 SoC
3 *
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
6 * Licensed under GPLv2.
7 */
8
9/include/ "at91sam9x5.dtsi"
10
11/ {
12 model = "Atmel AT91SAM9X25 SoC";
13 compatible = "atmel, at91sam9x25, atmel,at91sam9x5";
14
15 ahb {
16 apb {
17 pinctrl@fffff400 {
18 atmel,mux-mask = <
19 /* A B C */
20 0xffffffff 0xffe03fff 0xc000001c /* pioA */
21 0x0007ffff 0x00047e3f 0x00000000 /* pioB */
22 0x80000000 0xfffd0000 0xb83fffff /* pioC */
23 0x003fffff 0x003f8000 0x00000000 /* pioD */
24 >;
25
26 macb1 {
27 pinctrl_macb1_rmii: macb1_rmii-0 {
28 atmel,pins =
29 <2 16 0x2 0x0 /* PC16 periph B */
30 2 18 0x2 0x0 /* PC18 periph B */
31 2 19 0x2 0x0 /* PC19 periph B */
32 2 20 0x2 0x0 /* PC20 periph B */
33 2 21 0x2 0x0 /* PC21 periph B */
34 2 27 0x2 0x0 /* PC27 periph B */
35 2 28 0x2 0x0 /* PC28 periph B */
36 2 29 0x2 0x0 /* PC29 periph B */
37 2 30 0x2 0x0 /* PC30 periph B */
38 2 31 0x2 0x0>; /* PC31 periph B */
39 };
40 };
41 };
42
43 macb1: ethernet@f8030000 {
44 pinctrl-names = "default";
45 pinctrl-0 = <&pinctrl_macb1_rmii>;
46 };
47 };
48 };
49};
diff --git a/arch/arm/boot/dts/at91sam9x25ek.dts b/arch/arm/boot/dts/at91sam9x25ek.dts
new file mode 100644
index 000000000000..af907eaa1f25
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x25ek.dts
@@ -0,0 +1,16 @@
1/*
2 * at91sam9x25ek.dts - Device Tree file for AT91SAM9X25-EK board
3 *
4 * Copyright (C) 2012 Atmel,
5 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9/dts-v1/;
10/include/ "at91sam9x25.dtsi"
11/include/ "at91sam9x5ek.dtsi"
12
13/ {
14 model = "Atmel AT91SAM9G25-EK";
15 compatible = "atmel,at91sam9x25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
16};
diff --git a/arch/arm/boot/dts/at91sam9x35.dtsi b/arch/arm/boot/dts/at91sam9x35.dtsi
new file mode 100644
index 000000000000..fb102d6126ce
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x35.dtsi
@@ -0,0 +1,28 @@
1/*
2 * at91sam9x35.dtsi - Device Tree Include file for AT91SAM9X35 SoC
3 *
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
6 * Licensed under GPLv2.
7 */
8
9/include/ "at91sam9x5.dtsi"
10
11/ {
12 model = "Atmel AT91SAM9X35 SoC";
13 compatible = "atmel, at91sam9x35, atmel,at91sam9x5";
14
15 ahb {
16 apb {
17 pinctrl@fffff400 {
18 atmel,mux-mask = <
19 /* A B C */
20 0xffffffff 0xffe03fff 0xc000000c /* pioA */
21 0x000406ff 0x00047e3f 0x00000000 /* pioB */
22 0xfdffffff 0x00000000 0xb83fffff /* pioC */
23 0x003fffff 0x003f8000 0x00000000 /* pioD */
24 >;
25 };
26 };
27 };
28};
diff --git a/arch/arm/boot/dts/at91sam9x35ek.dts b/arch/arm/boot/dts/at91sam9x35ek.dts
new file mode 100644
index 000000000000..5ccb607b5414
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x35ek.dts
@@ -0,0 +1,16 @@
1/*
2 * at91sam9x35ek.dts - Device Tree file for AT91SAM9X35-EK board
3 *
4 * Copyright (C) 2012 Atmel,
5 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9/dts-v1/;
10/include/ "at91sam9x35.dtsi"
11/include/ "at91sam9x5ek.dtsi"
12
13/ {
14 model = "Atmel AT91SAM9X35-EK";
15 compatible = "atmel,at91sam9x35ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
16};
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 03fc136421c5..7ee49e8daf98 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -111,50 +111,244 @@
111 interrupts = <21 4 0>; 111 interrupts = <21 4 0>;
112 }; 112 };
113 113
114 pioA: gpio@fffff400 { 114 pinctrl@fffff400 {
115 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 115 #address-cells = <1>;
116 reg = <0xfffff400 0x100>; 116 #size-cells = <1>;
117 interrupts = <2 4 1>; 117 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
118 #gpio-cells = <2>; 118 ranges = <0xfffff400 0xfffff400 0x800>;
119 gpio-controller; 119
120 interrupt-controller; 120 /* shared pinctrl settings */
121 #interrupt-cells = <2>; 121 dbgu {
122 }; 122 pinctrl_dbgu: dbgu-0 {
123 atmel,pins =
124 <0 9 0x1 0x0 /* PA9 periph A */
125 0 10 0x1 0x1>; /* PA10 periph A with pullup */
126 };
127 };
123 128
124 pioB: gpio@fffff600 { 129 usart0 {
125 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 130 pinctrl_usart0: usart0-0 {
126 reg = <0xfffff600 0x100>; 131 atmel,pins =
127 interrupts = <2 4 1>; 132 <0 0 0x1 0x1 /* PA0 periph A with pullup */
128 #gpio-cells = <2>; 133 0 1 0x1 0x0>; /* PA1 periph A */
129 gpio-controller; 134 };
130 interrupt-controller; 135
131 #interrupt-cells = <2>; 136 pinctrl_usart0_rts: usart0_rts-0 {
137 atmel,pins =
138 <0 2 0x1 0x0>; /* PA2 periph A */
139 };
140
141 pinctrl_usart0_cts: usart0_cts-0 {
142 atmel,pins =
143 <0 3 0x1 0x0>; /* PA3 periph A */
144 };
145 };
146
147 usart1 {
148 pinctrl_usart1: usart1-0 {
149 atmel,pins =
150 <0 5 0x1 0x1 /* PA5 periph A with pullup */
151 0 6 0x1 0x0>; /* PA6 periph A */
152 };
153
154 pinctrl_usart1_rts: usart1_rts-0 {
155 atmel,pins =
156 <3 27 0x3 0x0>; /* PC27 periph C */
157 };
158
159 pinctrl_usart1_cts: usart1_cts-0 {
160 atmel,pins =
161 <3 28 0x3 0x0>; /* PC28 periph C */
162 };
163 };
164
165 usart2 {
166 pinctrl_usart2: usart2-0 {
167 atmel,pins =
168 <0 7 0x1 0x1 /* PA7 periph A with pullup */
169 0 8 0x1 0x0>; /* PA8 periph A */
170 };
171
172 pinctrl_uart2_rts: uart2_rts-0 {
173 atmel,pins =
174 <0 0 0x2 0x0>; /* PB0 periph B */
175 };
176
177 pinctrl_uart2_cts: uart2_cts-0 {
178 atmel,pins =
179 <0 1 0x2 0x0>; /* PB1 periph B */
180 };
181 };
182
183 usart3 {
184 pinctrl_uart3: usart3-0 {
185 atmel,pins =
186 <3 23 0x2 0x1 /* PC22 periph B with pullup */
187 3 23 0x2 0x0>; /* PC23 periph B */
188 };
189
190 pinctrl_usart3_rts: usart3_rts-0 {
191 atmel,pins =
192 <3 24 0x2 0x0>; /* PC24 periph B */
193 };
194
195 pinctrl_usart3_cts: usart3_cts-0 {
196 atmel,pins =
197 <3 25 0x2 0x0>; /* PC25 periph B */
198 };
199 };
200
201 uart0 {
202 pinctrl_uart0: uart0-0 {
203 atmel,pins =
204 <3 8 0x3 0x0 /* PC8 periph C */
205 3 9 0x3 0x1>; /* PC9 periph C with pullup */
206 };
207 };
208
209 uart1 {
210 pinctrl_uart1: uart1-0 {
211 atmel,pins =
212 <3 16 0x3 0x0 /* PC16 periph C */
213 3 17 0x3 0x1>; /* PC17 periph C with pullup */
214 };
215 };
216
217 nand {
218 pinctrl_nand: nand-0 {
219 atmel,pins =
220 <3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */
221 3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */
222 };
223 };
224
225 macb0 {
226 pinctrl_macb0_rmii: macb0_rmii-0 {
227 atmel,pins =
228 <1 0 0x1 0x0 /* PB0 periph A */
229 1 1 0x1 0x0 /* PB1 periph A */
230 1 2 0x1 0x0 /* PB2 periph A */
231 1 3 0x1 0x0 /* PB3 periph A */
232 1 4 0x1 0x0 /* PB4 periph A */
233 1 5 0x1 0x0 /* PB5 periph A */
234 1 6 0x1 0x0 /* PB6 periph A */
235 1 7 0x1 0x0 /* PB7 periph A */
236 1 9 0x1 0x0 /* PB9 periph A */
237 1 10 0x1 0x0>; /* PB10 periph A */
238 };
239
240 pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
241 atmel,pins =
242 <1 8 0x1 0x0 /* PA8 periph A */
243 1 11 0x1 0x0 /* PA11 periph A */
244 1 12 0x1 0x0 /* PA12 periph A */
245 1 13 0x1 0x0 /* PA13 periph A */
246 1 14 0x1 0x0 /* PA14 periph A */
247 1 15 0x1 0x0 /* PA15 periph A */
248 1 16 0x1 0x0 /* PA16 periph A */
249 1 17 0x1 0x0>; /* PA17 periph A */
250 };
251 };
252
253 mmc0 {
254 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
255 atmel,pins =
256 <0 17 0x1 0x0 /* PA17 periph A */
257 0 16 0x1 0x1 /* PA16 periph A with pullup */
258 0 15 0x1 0x1>; /* PA15 periph A with pullup */
259 };
260
261 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
262 atmel,pins =
263 <0 18 0x1 0x1 /* PA18 periph A with pullup */
264 0 19 0x1 0x1 /* PA19 periph A with pullup */
265 0 20 0x1 0x1>; /* PA20 periph A with pullup */
266 };
267 };
268
269 mmc1 {
270 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
271 atmel,pins =
272 <0 13 0x2 0x0 /* PA13 periph B */
273 0 12 0x2 0x1 /* PA12 periph B with pullup */
274 0 11 0x2 0x1>; /* PA11 periph B with pullup */
275 };
276
277 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
278 atmel,pins =
279 <0 2 0x2 0x1 /* PA2 periph B with pullup */
280 0 3 0x2 0x1 /* PA3 periph B with pullup */
281 0 4 0x2 0x1>; /* PA4 periph B with pullup */
282 };
283 };
284
285 pioA: gpio@fffff400 {
286 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
287 reg = <0xfffff400 0x200>;
288 interrupts = <2 4 1>;
289 #gpio-cells = <2>;
290 gpio-controller;
291 interrupt-controller;
292 #interrupt-cells = <2>;
293 };
294
295 pioB: gpio@fffff600 {
296 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
297 reg = <0xfffff600 0x200>;
298 interrupts = <2 4 1>;
299 #gpio-cells = <2>;
300 gpio-controller;
301 #gpio-lines = <19>;
302 interrupt-controller;
303 #interrupt-cells = <2>;
304 };
305
306 pioC: gpio@fffff800 {
307 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
308 reg = <0xfffff800 0x200>;
309 interrupts = <3 4 1>;
310 #gpio-cells = <2>;
311 gpio-controller;
312 interrupt-controller;
313 #interrupt-cells = <2>;
314 };
315
316 pioD: gpio@fffffa00 {
317 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
318 reg = <0xfffffa00 0x200>;
319 interrupts = <3 4 1>;
320 #gpio-cells = <2>;
321 gpio-controller;
322 #gpio-lines = <22>;
323 interrupt-controller;
324 #interrupt-cells = <2>;
325 };
132 }; 326 };
133 327
134 pioC: gpio@fffff800 { 328 mmc0: mmc@f0008000 {
135 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 329 compatible = "atmel,hsmci";
136 reg = <0xfffff800 0x100>; 330 reg = <0xf0008000 0x600>;
137 interrupts = <3 4 1>; 331 interrupts = <12 4 0>;
138 #gpio-cells = <2>; 332 #address-cells = <1>;
139 gpio-controller; 333 #size-cells = <0>;
140 interrupt-controller; 334 status = "disabled";
141 #interrupt-cells = <2>;
142 }; 335 };
143 336
144 pioD: gpio@fffffa00 { 337 mmc1: mmc@f000c000 {
145 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 338 compatible = "atmel,hsmci";
146 reg = <0xfffffa00 0x100>; 339 reg = <0xf000c000 0x600>;
147 interrupts = <3 4 1>; 340 interrupts = <26 4 0>;
148 #gpio-cells = <2>; 341 #address-cells = <1>;
149 gpio-controller; 342 #size-cells = <0>;
150 interrupt-controller; 343 status = "disabled";
151 #interrupt-cells = <2>;
152 }; 344 };
153 345
154 dbgu: serial@fffff200 { 346 dbgu: serial@fffff200 {
155 compatible = "atmel,at91sam9260-usart"; 347 compatible = "atmel,at91sam9260-usart";
156 reg = <0xfffff200 0x200>; 348 reg = <0xfffff200 0x200>;
157 interrupts = <1 4 7>; 349 interrupts = <1 4 7>;
350 pinctrl-names = "default";
351 pinctrl-0 = <&pinctrl_dbgu>;
158 status = "disabled"; 352 status = "disabled";
159 }; 353 };
160 354
@@ -164,6 +358,8 @@
164 interrupts = <5 4 5>; 358 interrupts = <5 4 5>;
165 atmel,use-dma-rx; 359 atmel,use-dma-rx;
166 atmel,use-dma-tx; 360 atmel,use-dma-tx;
361 pinctrl-names = "default";
362 pinctrl-0 = <&pinctrl_usart0>;
167 status = "disabled"; 363 status = "disabled";
168 }; 364 };
169 365
@@ -173,6 +369,8 @@
173 interrupts = <6 4 5>; 369 interrupts = <6 4 5>;
174 atmel,use-dma-rx; 370 atmel,use-dma-rx;
175 atmel,use-dma-tx; 371 atmel,use-dma-tx;
372 pinctrl-names = "default";
373 pinctrl-0 = <&pinctrl_usart1>;
176 status = "disabled"; 374 status = "disabled";
177 }; 375 };
178 376
@@ -182,6 +380,8 @@
182 interrupts = <7 4 5>; 380 interrupts = <7 4 5>;
183 atmel,use-dma-rx; 381 atmel,use-dma-rx;
184 atmel,use-dma-tx; 382 atmel,use-dma-tx;
383 pinctrl-names = "default";
384 pinctrl-0 = <&pinctrl_usart2>;
185 status = "disabled"; 385 status = "disabled";
186 }; 386 };
187 387
@@ -189,6 +389,8 @@
189 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 389 compatible = "cdns,at32ap7000-macb", "cdns,macb";
190 reg = <0xf802c000 0x100>; 390 reg = <0xf802c000 0x100>;
191 interrupts = <24 4 3>; 391 interrupts = <24 4 3>;
392 pinctrl-names = "default";
393 pinctrl-0 = <&pinctrl_macb0_rmii>;
192 status = "disabled"; 394 status = "disabled";
193 }; 395 };
194 396
@@ -273,6 +475,8 @@
273 >; 475 >;
274 atmel,nand-addr-offset = <21>; 476 atmel,nand-addr-offset = <21>;
275 atmel,nand-cmd-offset = <22>; 477 atmel,nand-cmd-offset = <22>;
478 pinctrl-names = "default";
479 pinctrl-0 = <&pinctrl_nand>;
276 gpios = <&pioD 5 0 480 gpios = <&pioD 5 0
277 &pioD 4 0 481 &pioD 4 0
278 0 482 0
diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi b/arch/arm/boot/dts/at91sam9x5ek.dtsi
new file mode 100644
index 000000000000..8a7cf1d9cf5d
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi
@@ -0,0 +1,101 @@
1/*
2 * at91sam9x5ek.dtsi - Device Tree file for AT91SAM9x5CM Base board
3 *
4 * Copyright (C) 2012 Atmel,
5 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9/include/ "at91sam9x5cm.dtsi"
10
11/ {
12 model = "Atmel AT91SAM9X5-EK";
13 compatible = "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
14
15 chosen {
16 bootargs = "128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
17 };
18
19 ahb {
20 apb {
21 mmc0: mmc@f0008000 {
22 pinctrl-0 = <
23 &pinctrl_board_mmc0
24 &pinctrl_mmc0_slot0_clk_cmd_dat0
25 &pinctrl_mmc0_slot0_dat1_3>;
26 status = "okay";
27 slot@0 {
28 reg = <0>;
29 bus-width = <4>;
30 cd-gpios = <&pioD 15 0>;
31 };
32 };
33
34 mmc1: mmc@f000c000 {
35 pinctrl-0 = <
36 &pinctrl_board_mmc1
37 &pinctrl_mmc1_slot0_clk_cmd_dat0
38 &pinctrl_mmc1_slot0_dat1_3>;
39 status = "okay";
40 slot@0 {
41 reg = <0>;
42 bus-width = <4>;
43 cd-gpios = <&pioD 14 0>;
44 };
45 };
46
47 dbgu: serial@fffff200 {
48 status = "okay";
49 };
50
51 usart0: serial@f801c000 {
52 status = "okay";
53 };
54
55 macb0: ethernet@f802c000 {
56 phy-mode = "rmii";
57 status = "okay";
58 };
59
60 i2c0: i2c@f8010000 {
61 status = "okay";
62 };
63
64 i2c1: i2c@f8014000 {
65 status = "okay";
66 };
67
68 i2c2: i2c@f8018000 {
69 status = "okay";
70 };
71
72 pinctrl@fffff400 {
73 mmc0 {
74 pinctrl_board_mmc0: mmc0-board {
75 atmel,pins =
76 <3 15 0x0 0x5>; /* PD15 gpio CD pin pull up and deglitch */
77 };
78 };
79
80 mmc1 {
81 pinctrl_board_mmc1: mmc1-board {
82 atmel,pins =
83 <3 14 0x0 0x5>; /* PD14 gpio CD pin pull up and deglitch */
84 };
85 };
86 };
87 };
88
89 usb0: ohci@00600000 {
90 status = "okay";
91 num-ports = <2>;
92 atmel,vbus-gpio = <&pioD 19 1
93 &pioD 20 1
94 >;
95 };
96
97 usb1: ehci@00700000 {
98 status = "okay";
99 };
100 };
101};
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 55c57ea6169e..b4587b27ae42 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -799,6 +799,7 @@
799 compatible = "fsl,imx28-auart", "fsl,imx23-auart"; 799 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
800 reg = <0x8006a000 0x2000>; 800 reg = <0x8006a000 0x2000>;
801 interrupts = <112 70 71>; 801 interrupts = <112 70 71>;
802 fsl,auart-dma-channel = <8 9>;
802 clocks = <&clks 45>; 803 clocks = <&clks 45>;
803 status = "disabled"; 804 status = "disabled";
804 }; 805 };
diff --git a/arch/arm/boot/dts/pm9g45.dts b/arch/arm/boot/dts/pm9g45.dts
new file mode 100644
index 000000000000..387fedb58988
--- /dev/null
+++ b/arch/arm/boot/dts/pm9g45.dts
@@ -0,0 +1,165 @@
1/*
2 * pm9g45.dts - Device Tree file for Ronetix pm9g45 board
3 *
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
6 * Licensed under GPLv2.
7 */
8/dts-v1/;
9/include/ "at91sam9g45.dtsi"
10
11/ {
12 model = "Ronetix pm9g45";
13 compatible = "ronetix,pm9g45", "atmel,at91sam9g45", "atmel,at91sam9";
14
15 chosen {
16 bootargs = "console=ttyS0,115200";
17 };
18
19 memory {
20 reg = <0x70000000 0x8000000>;
21 };
22
23 clocks {
24 #address-cells = <1>;
25 #size-cells = <1>;
26 ranges;
27
28 main_clock: clock@0 {
29 compatible = "atmel,osc", "fixed-clock";
30 clock-frequency = <12000000>;
31 };
32 };
33
34 ahb {
35 apb {
36 dbgu: serial@ffffee00 {
37 status = "okay";
38 };
39
40 pinctrl@fffff200 {
41
42 board {
43 pinctrl_board_nand: nand0-board {
44 atmel,pins =
45 <3 3 0x0 0x1 /* PD3 gpio RDY pin pull_up*/
46 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
47 };
48 };
49
50 mmc {
51 pinctrl_board_mmc: mmc0-board {
52 atmel,pins =
53 <3 6 0x0 0x5>; /* PD6 gpio CD pin pull_up and deglitch */
54 };
55 };
56 };
57
58 mmc0: mmc@fff80000 {
59 pinctrl-0 = <
60 &pinctrl_board_mmc
61 &pinctrl_mmc0_slot0_clk_cmd_dat0
62 &pinctrl_mmc0_slot0_dat1_3>;
63 status = "okay";
64 slot@0 {
65 reg = <0>;
66 bus-width = <4>;
67 cd-gpios = <&pioD 6 0>;
68 };
69 };
70
71 macb0: ethernet@fffbc000 {
72 phy-mode = "rmii";
73 status = "okay";
74 };
75
76 };
77
78 nand0: nand@40000000 {
79 nand-bus-width = <8>;
80 nand-ecc-mode = "soft";
81 nand-on-flash-bbt;
82 pinctrl-0 = <&pinctrl_board_nand>;
83
84 gpios = <&pioD 3 0
85 &pioC 14 0
86 0
87 >;
88
89 status = "okay";
90
91 at91bootstrap@0 {
92 label = "at91bootstrap";
93 reg = <0x0 0x20000>;
94 };
95
96 barebox@20000 {
97 label = "barebox";
98 reg = <0x20000 0x40000>;
99 };
100
101 bareboxenv@60000 {
102 label = "bareboxenv";
103 reg = <0x60000 0x1A0000>;
104 };
105
106 kernel@200000 {
107 label = "bareboxenv2";
108 reg = <0x200000 0x300000>;
109 };
110
111 kernel@500000 {
112 label = "root";
113 reg = <0x500000 0x400000>;
114 };
115
116 data@900000 {
117 label = "data";
118 reg = <0x900000 0x8340000>;
119 };
120 };
121
122 usb0: ohci@00700000 {
123 status = "okay";
124 num-ports = <2>;
125 };
126
127 usb1: ehci@00800000 {
128 status = "okay";
129 };
130 };
131
132 leds {
133 compatible = "gpio-leds";
134
135 led0 {
136 label = "led0";
137 gpios = <&pioD 0 1>;
138 linux,default-trigger = "nand-disk";
139 };
140
141 led1 {
142 label = "led1";
143 gpios = <&pioD 31 0>;
144 linux,default-trigger = "heartbeat";
145 };
146 };
147
148 gpio_keys {
149 compatible = "gpio-keys";
150 #address-cells = <1>;
151 #size-cells = <0>;
152
153 right {
154 label = "SW4";
155 gpios = <&pioE 7 1>;
156 linux,code = <106>;
157 };
158
159 up {
160 label = "SW3";
161 gpios = <&pioE 8 1>;
162 linux,code = <103>;
163 };
164 };
165};
diff --git a/arch/arm/boot/dts/spear1310-evb.dts b/arch/arm/boot/dts/spear1310-evb.dts
index dd4358bc26e2..2e4c5727468e 100644
--- a/arch/arm/boot/dts/spear1310-evb.dts
+++ b/arch/arm/boot/dts/spear1310-evb.dts
@@ -181,6 +181,10 @@
181 status = "okay"; 181 status = "okay";
182 }; 182 };
183 183
184 gpio@d8400000 {
185 status = "okay";
186 };
187
184 i2c0: i2c@e0280000 { 188 i2c0: i2c@e0280000 {
185 status = "okay"; 189 status = "okay";
186 }; 190 };
diff --git a/arch/arm/boot/dts/spear1310.dtsi b/arch/arm/boot/dts/spear1310.dtsi
index 419ea7413d23..7cd25eb4f8e0 100644
--- a/arch/arm/boot/dts/spear1310.dtsi
+++ b/arch/arm/boot/dts/spear1310.dtsi
@@ -70,6 +70,12 @@
70 status = "disabled"; 70 status = "disabled";
71 }; 71 };
72 72
73 pinmux: pinmux@e0700000 {
74 compatible = "st,spear1310-pinmux";
75 reg = <0xe0700000 0x1000>;
76 #gpio-range-cells = <2>;
77 };
78
73 spi1: spi@5d400000 { 79 spi1: spi@5d400000 {
74 compatible = "arm,pl022", "arm,primecell"; 80 compatible = "arm,pl022", "arm,primecell";
75 reg = <0x5d400000 0x1000>; 81 reg = <0x5d400000 0x1000>;
@@ -179,6 +185,27 @@
179 thermal@e07008c4 { 185 thermal@e07008c4 {
180 st,thermal-flags = <0x7000>; 186 st,thermal-flags = <0x7000>;
181 }; 187 };
188
189 gpiopinctrl: gpio@d8400000 {
190 compatible = "st,spear-plgpio";
191 reg = <0xd8400000 0x1000>;
192 interrupts = <0 100 0x4>;
193 #interrupt-cells = <1>;
194 interrupt-controller;
195 gpio-controller;
196 #gpio-cells = <2>;
197 gpio-ranges = <&pinmux 0 246>;
198 status = "disabled";
199
200 st-plgpio,ngpio = <246>;
201 st-plgpio,enb-reg = <0xd0>;
202 st-plgpio,wdata-reg = <0x90>;
203 st-plgpio,dir-reg = <0xb0>;
204 st-plgpio,ie-reg = <0x30>;
205 st-plgpio,rdata-reg = <0x70>;
206 st-plgpio,mis-reg = <0x10>;
207 st-plgpio,eit-reg = <0x50>;
208 };
182 }; 209 };
183 }; 210 };
184}; 211};
diff --git a/arch/arm/boot/dts/spear1340-evb.dts b/arch/arm/boot/dts/spear1340-evb.dts
index c9a54e06fb68..045f7123ffac 100644
--- a/arch/arm/boot/dts/spear1340-evb.dts
+++ b/arch/arm/boot/dts/spear1340-evb.dts
@@ -193,6 +193,10 @@
193 status = "okay"; 193 status = "okay";
194 }; 194 };
195 195
196 gpio@e2800000 {
197 status = "okay";
198 };
199
196 i2c0: i2c@e0280000 { 200 i2c0: i2c@e0280000 {
197 status = "okay"; 201 status = "okay";
198 }; 202 };
diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi
index d71fe2a68f09..6c09eb0a1b2b 100644
--- a/arch/arm/boot/dts/spear1340.dtsi
+++ b/arch/arm/boot/dts/spear1340.dtsi
@@ -24,6 +24,12 @@
24 status = "disabled"; 24 status = "disabled";
25 }; 25 };
26 26
27 pinmux: pinmux@e0700000 {
28 compatible = "st,spear1340-pinmux";
29 reg = <0xe0700000 0x1000>;
30 #gpio-range-cells = <2>;
31 };
32
27 spi1: spi@5d400000 { 33 spi1: spi@5d400000 {
28 compatible = "arm,pl022", "arm,primecell"; 34 compatible = "arm,pl022", "arm,primecell";
29 reg = <0x5d400000 0x1000>; 35 reg = <0x5d400000 0x1000>;
@@ -51,6 +57,26 @@
51 thermal@e07008c4 { 57 thermal@e07008c4 {
52 st,thermal-flags = <0x2a00>; 58 st,thermal-flags = <0x2a00>;
53 }; 59 };
60
61 gpiopinctrl: gpio@e2800000 {
62 compatible = "st,spear-plgpio";
63 reg = <0xe2800000 0x1000>;
64 interrupts = <0 107 0x4>;
65 #interrupt-cells = <1>;
66 interrupt-controller;
67 gpio-controller;
68 #gpio-cells = <2>;
69 gpio-ranges = <&pinmux 0 252>;
70 status = "disabled";
71
72 st-plgpio,ngpio = <250>;
73 st-plgpio,wdata-reg = <0x40>;
74 st-plgpio,dir-reg = <0x00>;
75 st-plgpio,ie-reg = <0x80>;
76 st-plgpio,rdata-reg = <0x20>;
77 st-plgpio,mis-reg = <0xa0>;
78 st-plgpio,eit-reg = <0x60>;
79 };
54 }; 80 };
55 }; 81 };
56}; 82};
diff --git a/arch/arm/boot/dts/spear310.dtsi b/arch/arm/boot/dts/spear310.dtsi
index 62fc4fb3e5f9..930303e48df9 100644
--- a/arch/arm/boot/dts/spear310.dtsi
+++ b/arch/arm/boot/dts/spear310.dtsi
@@ -22,9 +22,10 @@
22 0xb0000000 0xb0000000 0x10000000 22 0xb0000000 0xb0000000 0x10000000
23 0xd0000000 0xd0000000 0x30000000>; 23 0xd0000000 0xd0000000 0x30000000>;
24 24
25 pinmux@b4000000 { 25 pinmux: pinmux@b4000000 {
26 compatible = "st,spear310-pinmux"; 26 compatible = "st,spear310-pinmux";
27 reg = <0xb4000000 0x1000>; 27 reg = <0xb4000000 0x1000>;
28 #gpio-range-cells = <2>;
28 }; 29 };
29 30
30 fsmc: flash@44000000 { 31 fsmc: flash@44000000 {
@@ -75,6 +76,25 @@
75 reg = <0xb2200000 0x1000>; 76 reg = <0xb2200000 0x1000>;
76 status = "disabled"; 77 status = "disabled";
77 }; 78 };
79
80 gpiopinctrl: gpio@b4000000 {
81 compatible = "st,spear-plgpio";
82 reg = <0xb4000000 0x1000>;
83 #interrupt-cells = <1>;
84 interrupt-controller;
85 gpio-controller;
86 #gpio-cells = <2>;
87 gpio-ranges = <&pinmux 0 102>;
88 status = "disabled";
89
90 st-plgpio,ngpio = <102>;
91 st-plgpio,enb-reg = <0x10>;
92 st-plgpio,wdata-reg = <0x20>;
93 st-plgpio,dir-reg = <0x30>;
94 st-plgpio,ie-reg = <0x50>;
95 st-plgpio,rdata-reg = <0x40>;
96 st-plgpio,mis-reg = <0x60>;
97 };
78 }; 98 };
79 }; 99 };
80}; 100};
diff --git a/arch/arm/boot/dts/spear320-evb.dts b/arch/arm/boot/dts/spear320-evb.dts
index 082328bd64ab..ad4bfc68ee05 100644
--- a/arch/arm/boot/dts/spear320-evb.dts
+++ b/arch/arm/boot/dts/spear320-evb.dts
@@ -164,6 +164,10 @@
164 status = "okay"; 164 status = "okay";
165 }; 165 };
166 166
167 gpio@b3000000 {
168 status = "okay";
169 };
170
167 i2c0: i2c@d0180000 { 171 i2c0: i2c@d0180000 {
168 status = "okay"; 172 status = "okay";
169 }; 173 };
diff --git a/arch/arm/boot/dts/spear320.dtsi b/arch/arm/boot/dts/spear320.dtsi
index 1f49d69595a0..67d7ada71275 100644
--- a/arch/arm/boot/dts/spear320.dtsi
+++ b/arch/arm/boot/dts/spear320.dtsi
@@ -21,9 +21,10 @@
21 ranges = <0x40000000 0x40000000 0x80000000 21 ranges = <0x40000000 0x40000000 0x80000000
22 0xd0000000 0xd0000000 0x30000000>; 22 0xd0000000 0xd0000000 0x30000000>;
23 23
24 pinmux@b3000000 { 24 pinmux: pinmux@b3000000 {
25 compatible = "st,spear320-pinmux"; 25 compatible = "st,spear320-pinmux";
26 reg = <0xb3000000 0x1000>; 26 reg = <0xb3000000 0x1000>;
27 #gpio-range-cells = <2>;
27 }; 28 };
28 29
29 clcd@90000000 { 30 clcd@90000000 {
@@ -90,6 +91,26 @@
90 reg = <0xa4000000 0x1000>; 91 reg = <0xa4000000 0x1000>;
91 status = "disabled"; 92 status = "disabled";
92 }; 93 };
94
95 gpiopinctrl: gpio@b3000000 {
96 compatible = "st,spear-plgpio";
97 reg = <0xb3000000 0x1000>;
98 #interrupt-cells = <1>;
99 interrupt-controller;
100 gpio-controller;
101 #gpio-cells = <2>;
102 gpio-ranges = <&pinmux 0 102>;
103 status = "disabled";
104
105 st-plgpio,ngpio = <102>;
106 st-plgpio,enb-reg = <0x24>;
107 st-plgpio,wdata-reg = <0x34>;
108 st-plgpio,dir-reg = <0x44>;
109 st-plgpio,ie-reg = <0x64>;
110 st-plgpio,rdata-reg = <0x54>;
111 st-plgpio,mis-reg = <0x84>;
112 st-plgpio,eit-reg = <0x94>;
113 };
93 }; 114 };
94 }; 115 };
95}; 116};
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index f0ba901676ac..a20d4ff3fb3c 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -523,12 +523,12 @@
523 }; 523 };
524 524
525 temperature-sensor@4c { 525 temperature-sensor@4c {
526 compatible = "nct1008"; 526 compatible = "onnn,nct1008";
527 reg = <0x4c>; 527 reg = <0x4c>;
528 }; 528 };
529 529
530 magnetometer@c { 530 magnetometer@c {
531 compatible = "ak8975"; 531 compatible = "ak,ak8975";
532 reg = <0xc>; 532 reg = <0xc>;
533 interrupt-parent = <&gpio>; 533 interrupt-parent = <&gpio>;
534 interrupts = <109 0x04>; /* gpio PN5 */ 534 interrupts = <109 0x04>; /* gpio PN5 */
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index b1497c7d7d68..df7f2270fc91 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -73,8 +73,8 @@
73 73
74 pinmux: pinmux { 74 pinmux: pinmux {
75 compatible = "nvidia,tegra30-pinmux"; 75 compatible = "nvidia,tegra30-pinmux";
76 reg = <0x70000868 0xd0 /* Pad control registers */ 76 reg = <0x70000868 0xd4 /* Pad control registers */
77 0x70003000 0x3e0>; /* Mux registers */ 77 0x70003000 0x3e4>; /* Mux registers */
78 }; 78 };
79 79
80 serial@70006000 { 80 serial@70006000 {
diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c
index df13a3ffff35..9d2d3ba339ff 100644
--- a/arch/arm/common/timer-sp.c
+++ b/arch/arm/common/timer-sp.c
@@ -162,7 +162,6 @@ static struct clock_event_device sp804_clockevent = {
162 .set_mode = sp804_set_mode, 162 .set_mode = sp804_set_mode,
163 .set_next_event = sp804_set_next_event, 163 .set_next_event = sp804_set_next_event,
164 .rating = 300, 164 .rating = 300,
165 .cpumask = cpu_all_mask,
166}; 165};
167 166
168static struct irqaction sp804_timer_irq = { 167static struct irqaction sp804_timer_irq = {
@@ -185,6 +184,7 @@ void __init sp804_clockevents_init(void __iomem *base, unsigned int irq,
185 clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ); 184 clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ);
186 evt->name = name; 185 evt->name = name;
187 evt->irq = irq; 186 evt->irq = irq;
187 evt->cpumask = cpu_possible_mask;
188 188
189 setup_irq(irq, &sp804_timer_irq); 189 setup_irq(irq, &sp804_timer_irq);
190 clockevents_config_and_register(evt, rate, 0xf, 0xffffffff); 190 clockevents_config_and_register(evt, rate, 0xf, 0xffffffff);
diff --git a/arch/arm/configs/afeb9260_defconfig b/arch/arm/configs/afeb9260_defconfig
index c285a9d777d9..a8dbc1e05253 100644
--- a/arch/arm/configs/afeb9260_defconfig
+++ b/arch/arm/configs/afeb9260_defconfig
@@ -79,7 +79,7 @@ CONFIG_USB_STORAGE=y
79CONFIG_USB_GADGET=y 79CONFIG_USB_GADGET=y
80CONFIG_USB_ZERO=m 80CONFIG_USB_ZERO=m
81CONFIG_USB_GADGETFS=m 81CONFIG_USB_GADGETFS=m
82CONFIG_USB_FILE_STORAGE=m 82CONFIG_USB_MASS_STORAGE=m
83CONFIG_USB_G_SERIAL=m 83CONFIG_USB_G_SERIAL=m
84CONFIG_RTC_CLASS=y 84CONFIG_RTC_CLASS=y
85CONFIG_RTC_DEBUG=y 85CONFIG_RTC_DEBUG=y
diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig
index 67bc571ed0c3..b175577d7abb 100644
--- a/arch/arm/configs/at91_dt_defconfig
+++ b/arch/arm/configs/at91_dt_defconfig
@@ -111,6 +111,7 @@ CONFIG_I2C=y
111CONFIG_I2C_GPIO=y 111CONFIG_I2C_GPIO=y
112CONFIG_SPI=y 112CONFIG_SPI=y
113CONFIG_SPI_ATMEL=y 113CONFIG_SPI_ATMEL=y
114CONFIG_PINCTRL_AT91=y
114# CONFIG_HWMON is not set 115# CONFIG_HWMON is not set
115CONFIG_WATCHDOG=y 116CONFIG_WATCHDOG=y
116CONFIG_AT91SAM9X_WATCHDOG=y 117CONFIG_AT91SAM9X_WATCHDOG=y
diff --git a/arch/arm/configs/at91sam9260_defconfig b/arch/arm/configs/at91sam9260_defconfig
index 505b3765f87e..0ea5d2c97fc4 100644
--- a/arch/arm/configs/at91sam9260_defconfig
+++ b/arch/arm/configs/at91sam9260_defconfig
@@ -75,7 +75,7 @@ CONFIG_USB_STORAGE_DEBUG=y
75CONFIG_USB_GADGET=y 75CONFIG_USB_GADGET=y
76CONFIG_USB_ZERO=m 76CONFIG_USB_ZERO=m
77CONFIG_USB_GADGETFS=m 77CONFIG_USB_GADGETFS=m
78CONFIG_USB_FILE_STORAGE=m 78CONFIG_USB_MASS_STORAGE=m
79CONFIG_USB_G_SERIAL=m 79CONFIG_USB_G_SERIAL=m
80CONFIG_RTC_CLASS=y 80CONFIG_RTC_CLASS=y
81CONFIG_RTC_DRV_AT91SAM9=y 81CONFIG_RTC_DRV_AT91SAM9=y
diff --git a/arch/arm/configs/at91sam9261_defconfig b/arch/arm/configs/at91sam9261_defconfig
index 1e8712ef062e..c87beb973b37 100644
--- a/arch/arm/configs/at91sam9261_defconfig
+++ b/arch/arm/configs/at91sam9261_defconfig
@@ -125,7 +125,7 @@ CONFIG_USB_GADGET=y
125CONFIG_USB_ZERO=m 125CONFIG_USB_ZERO=m
126CONFIG_USB_ETH=m 126CONFIG_USB_ETH=m
127CONFIG_USB_GADGETFS=m 127CONFIG_USB_GADGETFS=m
128CONFIG_USB_FILE_STORAGE=m 128CONFIG_USB_MASS_STORAGE=m
129CONFIG_USB_G_SERIAL=m 129CONFIG_USB_G_SERIAL=m
130CONFIG_MMC=y 130CONFIG_MMC=y
131CONFIG_MMC_ATMELMCI=m 131CONFIG_MMC_ATMELMCI=m
diff --git a/arch/arm/configs/at91sam9263_defconfig b/arch/arm/configs/at91sam9263_defconfig
index d2050cada82d..c5212f43eee6 100644
--- a/arch/arm/configs/at91sam9263_defconfig
+++ b/arch/arm/configs/at91sam9263_defconfig
@@ -133,7 +133,7 @@ CONFIG_USB_GADGET=y
133CONFIG_USB_ZERO=m 133CONFIG_USB_ZERO=m
134CONFIG_USB_ETH=m 134CONFIG_USB_ETH=m
135CONFIG_USB_GADGETFS=m 135CONFIG_USB_GADGETFS=m
136CONFIG_USB_FILE_STORAGE=m 136CONFIG_USB_MASS_STORAGE=m
137CONFIG_USB_G_SERIAL=m 137CONFIG_USB_G_SERIAL=m
138CONFIG_MMC=y 138CONFIG_MMC=y
139CONFIG_SDIO_UART=m 139CONFIG_SDIO_UART=m
diff --git a/arch/arm/configs/at91sam9g20_defconfig b/arch/arm/configs/at91sam9g20_defconfig
index e1b0e80b54a5..3b1881033ad8 100644
--- a/arch/arm/configs/at91sam9g20_defconfig
+++ b/arch/arm/configs/at91sam9g20_defconfig
@@ -96,7 +96,7 @@ CONFIG_USB_STORAGE=y
96CONFIG_USB_GADGET=y 96CONFIG_USB_GADGET=y
97CONFIG_USB_ZERO=m 97CONFIG_USB_ZERO=m
98CONFIG_USB_GADGETFS=m 98CONFIG_USB_GADGETFS=m
99CONFIG_USB_FILE_STORAGE=m 99CONFIG_USB_MASS_STORAGE=m
100CONFIG_USB_G_SERIAL=m 100CONFIG_USB_G_SERIAL=m
101CONFIG_MMC=y 101CONFIG_MMC=y
102CONFIG_MMC_ATMELMCI=m 102CONFIG_MMC_ATMELMCI=m
diff --git a/arch/arm/configs/corgi_defconfig b/arch/arm/configs/corgi_defconfig
index 4b8a25d9e686..1fd1d1de3220 100644
--- a/arch/arm/configs/corgi_defconfig
+++ b/arch/arm/configs/corgi_defconfig
@@ -218,7 +218,7 @@ CONFIG_USB_GADGET=y
218CONFIG_USB_ZERO=m 218CONFIG_USB_ZERO=m
219CONFIG_USB_ETH=m 219CONFIG_USB_ETH=m
220CONFIG_USB_GADGETFS=m 220CONFIG_USB_GADGETFS=m
221CONFIG_USB_FILE_STORAGE=m 221CONFIG_USB_MASS_STORAGE=m
222CONFIG_USB_G_SERIAL=m 222CONFIG_USB_G_SERIAL=m
223CONFIG_MMC=y 223CONFIG_MMC=y
224CONFIG_MMC_PXA=y 224CONFIG_MMC_PXA=y
diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig
index 67b5abb6f857..4ea7c95719d2 100644
--- a/arch/arm/configs/davinci_all_defconfig
+++ b/arch/arm/configs/davinci_all_defconfig
@@ -144,7 +144,7 @@ CONFIG_USB_GADGET_DEBUG_FS=y
144CONFIG_USB_ZERO=m 144CONFIG_USB_ZERO=m
145CONFIG_USB_ETH=m 145CONFIG_USB_ETH=m
146CONFIG_USB_GADGETFS=m 146CONFIG_USB_GADGETFS=m
147CONFIG_USB_FILE_STORAGE=m 147CONFIG_USB_MASS_STORAGE=m
148CONFIG_USB_G_SERIAL=m 148CONFIG_USB_G_SERIAL=m
149CONFIG_USB_G_PRINTER=m 149CONFIG_USB_G_PRINTER=m
150CONFIG_USB_CDC_COMPOSITE=m 150CONFIG_USB_CDC_COMPOSITE=m
diff --git a/arch/arm/configs/h7202_defconfig b/arch/arm/configs/h7202_defconfig
index 69405a762423..e16d3f372e2a 100644
--- a/arch/arm/configs/h7202_defconfig
+++ b/arch/arm/configs/h7202_defconfig
@@ -34,8 +34,7 @@ CONFIG_FB_MODE_HELPERS=y
34CONFIG_USB_GADGET=m 34CONFIG_USB_GADGET=m
35CONFIG_USB_ZERO=m 35CONFIG_USB_ZERO=m
36CONFIG_USB_GADGETFS=m 36CONFIG_USB_GADGETFS=m
37CONFIG_USB_FILE_STORAGE=m 37CONFIG_USB_MASS_STORAGE=m
38CONFIG_USB_FILE_STORAGE_TEST=y
39CONFIG_USB_G_SERIAL=m 38CONFIG_USB_G_SERIAL=m
40CONFIG_EXT2_FS=y 39CONFIG_EXT2_FS=y
41CONFIG_TMPFS=y 40CONFIG_TMPFS=y
diff --git a/arch/arm/configs/magician_defconfig b/arch/arm/configs/magician_defconfig
index a691ef4c6008..557dd291288b 100644
--- a/arch/arm/configs/magician_defconfig
+++ b/arch/arm/configs/magician_defconfig
@@ -136,7 +136,7 @@ CONFIG_USB_PXA27X=y
136CONFIG_USB_ETH=m 136CONFIG_USB_ETH=m
137# CONFIG_USB_ETH_RNDIS is not set 137# CONFIG_USB_ETH_RNDIS is not set
138CONFIG_USB_GADGETFS=m 138CONFIG_USB_GADGETFS=m
139CONFIG_USB_FILE_STORAGE=m 139CONFIG_USB_MASS_STORAGE=m
140CONFIG_USB_G_SERIAL=m 140CONFIG_USB_G_SERIAL=m
141CONFIG_USB_CDC_COMPOSITE=m 141CONFIG_USB_CDC_COMPOSITE=m
142CONFIG_USB_GPIO_VBUS=y 142CONFIG_USB_GPIO_VBUS=y
diff --git a/arch/arm/configs/mini2440_defconfig b/arch/arm/configs/mini2440_defconfig
index 00630e6af45c..a07948a87caa 100644
--- a/arch/arm/configs/mini2440_defconfig
+++ b/arch/arm/configs/mini2440_defconfig
@@ -240,7 +240,7 @@ CONFIG_USB_GADGET_S3C2410=y
240CONFIG_USB_ZERO=m 240CONFIG_USB_ZERO=m
241CONFIG_USB_ETH=m 241CONFIG_USB_ETH=m
242CONFIG_USB_GADGETFS=m 242CONFIG_USB_GADGETFS=m
243CONFIG_USB_FILE_STORAGE=m 243CONFIG_USB_MASS_STORAGE=m
244CONFIG_USB_G_SERIAL=m 244CONFIG_USB_G_SERIAL=m
245CONFIG_USB_CDC_COMPOSITE=m 245CONFIG_USB_CDC_COMPOSITE=m
246CONFIG_MMC=y 246CONFIG_MMC=y
diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig
index dde2a1af7b39..42eab9a2a0fd 100644
--- a/arch/arm/configs/omap1_defconfig
+++ b/arch/arm/configs/omap1_defconfig
@@ -214,8 +214,7 @@ CONFIG_USB_TEST=y
214CONFIG_USB_GADGET=y 214CONFIG_USB_GADGET=y
215CONFIG_USB_ETH=m 215CONFIG_USB_ETH=m
216# CONFIG_USB_ETH_RNDIS is not set 216# CONFIG_USB_ETH_RNDIS is not set
217CONFIG_USB_FILE_STORAGE=m 217CONFIG_USB_MASS_STORAGE=m
218CONFIG_USB_FILE_STORAGE_TEST=y
219CONFIG_MMC=y 218CONFIG_MMC=y
220CONFIG_MMC_SDHCI=y 219CONFIG_MMC_SDHCI=y
221CONFIG_MMC_SDHCI_PLTFM=y 220CONFIG_MMC_SDHCI_PLTFM=y
diff --git a/arch/arm/configs/prima2_defconfig b/arch/arm/configs/prima2_defconfig
index 807d4e2acb17..6a936c7c078a 100644
--- a/arch/arm/configs/prima2_defconfig
+++ b/arch/arm/configs/prima2_defconfig
@@ -37,7 +37,6 @@ CONFIG_SPI_SIRF=y
37CONFIG_SPI_SPIDEV=y 37CONFIG_SPI_SPIDEV=y
38# CONFIG_HWMON is not set 38# CONFIG_HWMON is not set
39CONFIG_USB_GADGET=y 39CONFIG_USB_GADGET=y
40CONFIG_USB_FILE_STORAGE=m
41CONFIG_USB_MASS_STORAGE=m 40CONFIG_USB_MASS_STORAGE=m
42CONFIG_MMC=y 41CONFIG_MMC=y
43CONFIG_MMC_SDHCI=y 42CONFIG_MMC_SDHCI=y
diff --git a/arch/arm/configs/spitz_defconfig b/arch/arm/configs/spitz_defconfig
index df77931a4326..2e0419d1b964 100644
--- a/arch/arm/configs/spitz_defconfig
+++ b/arch/arm/configs/spitz_defconfig
@@ -214,7 +214,7 @@ CONFIG_USB_GADGET_DUMMY_HCD=y
214CONFIG_USB_ZERO=m 214CONFIG_USB_ZERO=m
215CONFIG_USB_ETH=m 215CONFIG_USB_ETH=m
216CONFIG_USB_GADGETFS=m 216CONFIG_USB_GADGETFS=m
217CONFIG_USB_FILE_STORAGE=m 217CONFIG_USB_MASS_STORAGE=m
218CONFIG_USB_G_SERIAL=m 218CONFIG_USB_G_SERIAL=m
219CONFIG_MMC=y 219CONFIG_MMC=y
220CONFIG_MMC_PXA=y 220CONFIG_MMC_PXA=y
diff --git a/arch/arm/configs/stamp9g20_defconfig b/arch/arm/configs/stamp9g20_defconfig
index 52f1488591c7..b845f5519bcc 100644
--- a/arch/arm/configs/stamp9g20_defconfig
+++ b/arch/arm/configs/stamp9g20_defconfig
@@ -97,7 +97,7 @@ CONFIG_USB_STORAGE=y
97CONFIG_USB_GADGET=m 97CONFIG_USB_GADGET=m
98CONFIG_USB_ZERO=m 98CONFIG_USB_ZERO=m
99CONFIG_USB_ETH=m 99CONFIG_USB_ETH=m
100CONFIG_USB_FILE_STORAGE=m 100CONFIG_USB_MASS_STORAGE=m
101CONFIG_USB_G_SERIAL=m 101CONFIG_USB_G_SERIAL=m
102CONFIG_MMC=y 102CONFIG_MMC=y
103CONFIG_MMC_ATMELMCI=y 103CONFIG_MMC_ATMELMCI=y
diff --git a/arch/arm/configs/viper_defconfig b/arch/arm/configs/viper_defconfig
index 1d01ddd33122..d36e0d3c86ec 100644
--- a/arch/arm/configs/viper_defconfig
+++ b/arch/arm/configs/viper_defconfig
@@ -139,7 +139,7 @@ CONFIG_USB_SERIAL_MCT_U232=m
139CONFIG_USB_GADGET=m 139CONFIG_USB_GADGET=m
140CONFIG_USB_ETH=m 140CONFIG_USB_ETH=m
141CONFIG_USB_GADGETFS=m 141CONFIG_USB_GADGETFS=m
142CONFIG_USB_FILE_STORAGE=m 142CONFIG_USB_MASS_STORAGE=m
143CONFIG_USB_G_SERIAL=m 143CONFIG_USB_G_SERIAL=m
144CONFIG_USB_G_PRINTER=m 144CONFIG_USB_G_PRINTER=m
145CONFIG_RTC_CLASS=y 145CONFIG_RTC_CLASS=y
diff --git a/arch/arm/configs/zeus_defconfig b/arch/arm/configs/zeus_defconfig
index 547a3c1e59db..731d4f985310 100644
--- a/arch/arm/configs/zeus_defconfig
+++ b/arch/arm/configs/zeus_defconfig
@@ -143,7 +143,7 @@ CONFIG_USB_GADGET=m
143CONFIG_USB_PXA27X=y 143CONFIG_USB_PXA27X=y
144CONFIG_USB_ETH=m 144CONFIG_USB_ETH=m
145CONFIG_USB_GADGETFS=m 145CONFIG_USB_GADGETFS=m
146CONFIG_USB_FILE_STORAGE=m 146CONFIG_USB_MASS_STORAGE=m
147CONFIG_USB_G_SERIAL=m 147CONFIG_USB_G_SERIAL=m
148CONFIG_USB_G_PRINTER=m 148CONFIG_USB_G_PRINTER=m
149CONFIG_MMC=y 149CONFIG_MMC=y
diff --git a/arch/arm/include/asm/Kbuild b/arch/arm/include/asm/Kbuild
index f70ae175a3d6..514e398f1a07 100644
--- a/arch/arm/include/asm/Kbuild
+++ b/arch/arm/include/asm/Kbuild
@@ -31,5 +31,6 @@ generic-y += sockios.h
31generic-y += termbits.h 31generic-y += termbits.h
32generic-y += termios.h 32generic-y += termios.h
33generic-y += timex.h 33generic-y += timex.h
34generic-y += trace_clock.h
34generic-y += types.h 35generic-y += types.h
35generic-y += unaligned.h 36generic-y += unaligned.h
diff --git a/arch/arm/include/asm/hardware/sp810.h b/arch/arm/include/asm/hardware/sp810.h
index 6b9b077d86b3..afd7e916472f 100644
--- a/arch/arm/include/asm/hardware/sp810.h
+++ b/arch/arm/include/asm/hardware/sp810.h
@@ -56,6 +56,8 @@
56#define SCCTRL_TIMEREN1SEL_REFCLK (0 << 17) 56#define SCCTRL_TIMEREN1SEL_REFCLK (0 << 17)
57#define SCCTRL_TIMEREN1SEL_TIMCLK (1 << 17) 57#define SCCTRL_TIMEREN1SEL_TIMCLK (1 << 17)
58 58
59#define SCCTRL_TIMERENnSEL_SHIFT(n) (15 + ((n) * 2))
60
59static inline void sysctl_soft_reset(void __iomem *base) 61static inline void sysctl_soft_reset(void __iomem *base)
60{ 62{
61 /* switch to slow mode */ 63 /* switch to slow mode */
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 42f042ee4ada..652b56086de7 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -374,7 +374,7 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr);
374 374
375#ifdef CONFIG_MMU 375#ifdef CONFIG_MMU
376#define ARCH_HAS_VALID_PHYS_ADDR_RANGE 376#define ARCH_HAS_VALID_PHYS_ADDR_RANGE
377extern int valid_phys_addr_range(unsigned long addr, size_t size); 377extern int valid_phys_addr_range(phys_addr_t addr, size_t size);
378extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size); 378extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
379extern int devmem_is_allowed(unsigned long pfn); 379extern int devmem_is_allowed(unsigned long pfn);
380#endif 380#endif
diff --git a/arch/arm/include/asm/prom.h b/arch/arm/include/asm/prom.h
index aeae9c609df4..6d65ba222db9 100644
--- a/arch/arm/include/asm/prom.h
+++ b/arch/arm/include/asm/prom.h
@@ -11,6 +11,8 @@
11#ifndef __ASMARM_PROM_H 11#ifndef __ASMARM_PROM_H
12#define __ASMARM_PROM_H 12#define __ASMARM_PROM_H
13 13
14#define HAVE_ARCH_DEVTREE_FIXUPS
15
14#ifdef CONFIG_OF 16#ifdef CONFIG_OF
15 17
16extern struct machine_desc *setup_machine_fdt(unsigned int dt_phys); 18extern struct machine_desc *setup_machine_fdt(unsigned int dt_phys);
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 043624219b55..e34c1bdb804d 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -494,8 +494,17 @@ endif
494 494
495comment "Generic Board Type" 495comment "Generic Board Type"
496 496
497config MACH_AT91RM9200_DT
498 bool "Atmel AT91RM9200 Evaluation Kits with device-tree support"
499 depends on SOC_AT91RM9200
500 select USE_OF
501 help
502 Select this if you want to experiment device-tree with
503 an Atmel RM9200 Evaluation Kit.
504
497config MACH_AT91SAM_DT 505config MACH_AT91SAM_DT
498 bool "Atmel AT91SAM Evaluation Kits with device-tree support" 506 bool "Atmel AT91SAM Evaluation Kits with device-tree support"
507 depends on SOC_AT91SAM9
499 select USE_OF 508 select USE_OF
500 help 509 help
501 Select this if you want to experiment device-tree with 510 Select this if you want to experiment device-tree with
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 3bb7a51efc9d..b38a1dcb79b8 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -88,6 +88,7 @@ obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
88obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o 88obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o
89 89
90# AT91SAM board with device-tree 90# AT91SAM board with device-tree
91obj-$(CONFIG_MACH_AT91RM9200_DT) += board-rm9200-dt.o
91obj-$(CONFIG_MACH_AT91SAM_DT) += board-dt.o 92obj-$(CONFIG_MACH_AT91SAM_DT) += board-dt.o
92 93
93# AT91X40 board-specific support 94# AT91X40 board-specific support
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 5269825194a8..6cceb42a4c33 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -194,6 +194,24 @@ static struct clk_lookup periph_clocks_lookups[] = {
194 CLKDEV_CON_ID("pioB", &pioB_clk), 194 CLKDEV_CON_ID("pioB", &pioB_clk),
195 CLKDEV_CON_ID("pioC", &pioC_clk), 195 CLKDEV_CON_ID("pioC", &pioC_clk),
196 CLKDEV_CON_ID("pioD", &pioD_clk), 196 CLKDEV_CON_ID("pioD", &pioD_clk),
197 /* usart lookup table for DT entries */
198 CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
199 CLKDEV_CON_DEV_ID("usart", "fffc0000.serial", &usart0_clk),
200 CLKDEV_CON_DEV_ID("usart", "fffc4000.serial", &usart1_clk),
201 CLKDEV_CON_DEV_ID("usart", "fffc8000.serial", &usart2_clk),
202 CLKDEV_CON_DEV_ID("usart", "fffcc000.serial", &usart3_clk),
203 /* tc lookup table for DT entries */
204 CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
205 CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
206 CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
207 CLKDEV_CON_DEV_ID("t0_clk", "fffa4000.timer", &tc3_clk),
208 CLKDEV_CON_DEV_ID("t1_clk", "fffa4000.timer", &tc4_clk),
209 CLKDEV_CON_DEV_ID("t2_clk", "fffa4000.timer", &tc5_clk),
210 CLKDEV_CON_DEV_ID("hclk", "300000.ohci", &ohci_clk),
211 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
212 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
213 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
214 CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk),
197}; 215};
198 216
199static struct clk_lookup usart_clocks_lookups[] = { 217static struct clk_lookup usart_clocks_lookups[] = {
@@ -361,10 +379,10 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
361 0 /* Advanced Interrupt Controller (IRQ6) */ 379 0 /* Advanced Interrupt Controller (IRQ6) */
362}; 380};
363 381
364struct at91_init_soc __initdata at91rm9200_soc = { 382AT91_SOC_START(rm9200)
365 .map_io = at91rm9200_map_io, 383 .map_io = at91rm9200_map_io,
366 .default_irq_priority = at91rm9200_default_irq_priority, 384 .default_irq_priority = at91rm9200_default_irq_priority,
367 .ioremap_registers = at91rm9200_ioremap_registers, 385 .ioremap_registers = at91rm9200_ioremap_registers,
368 .register_clocks = at91rm9200_register_clocks, 386 .register_clocks = at91rm9200_register_clocks,
369 .init = at91rm9200_initialize, 387 .init = at91rm9200_initialize,
370}; 388AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 1e122bcd7845..3cee0e6ea7c3 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -68,7 +68,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
68 68
69 /* Enable overcurrent notification */ 69 /* Enable overcurrent notification */
70 for (i = 0; i < data->ports; i++) { 70 for (i = 0; i < data->ports; i++) {
71 if (data->overcurrent_pin[i]) 71 if (gpio_is_valid(data->overcurrent_pin[i]))
72 at91_set_gpio_input(data->overcurrent_pin[i], 1); 72 at91_set_gpio_input(data->overcurrent_pin[i], 1);
73 } 73 }
74 74
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index aaa443b48c91..cafe98836c8a 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -24,6 +24,9 @@
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/clockchips.h> 25#include <linux/clockchips.h>
26#include <linux/export.h> 26#include <linux/export.h>
27#include <linux/of.h>
28#include <linux/of_address.h>
29#include <linux/of_irq.h>
27 30
28#include <asm/mach/time.h> 31#include <asm/mach/time.h>
29 32
@@ -91,7 +94,8 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
91static struct irqaction at91rm9200_timer_irq = { 94static struct irqaction at91rm9200_timer_irq = {
92 .name = "at91_tick", 95 .name = "at91_tick",
93 .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 96 .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
94 .handler = at91rm9200_timer_interrupt 97 .handler = at91rm9200_timer_interrupt,
98 .irq = NR_IRQS_LEGACY + AT91_ID_SYS,
95}; 99};
96 100
97static cycle_t read_clk32k(struct clocksource *cs) 101static cycle_t read_clk32k(struct clocksource *cs)
@@ -179,8 +183,60 @@ static struct clock_event_device clkevt = {
179void __iomem *at91_st_base; 183void __iomem *at91_st_base;
180EXPORT_SYMBOL_GPL(at91_st_base); 184EXPORT_SYMBOL_GPL(at91_st_base);
181 185
186#ifdef CONFIG_OF
187static struct of_device_id at91rm9200_st_timer_ids[] = {
188 { .compatible = "atmel,at91rm9200-st" },
189 { /* sentinel */ }
190};
191
192static int __init of_at91rm9200_st_init(void)
193{
194 struct device_node *np;
195 int ret;
196
197 np = of_find_matching_node(NULL, at91rm9200_st_timer_ids);
198 if (!np)
199 goto err;
200
201 at91_st_base = of_iomap(np, 0);
202 if (!at91_st_base)
203 goto node_err;
204
205 /* Get the interrupts property */
206 ret = irq_of_parse_and_map(np, 0);
207 if (!ret)
208 goto ioremap_err;
209 at91rm9200_timer_irq.irq = ret;
210
211 of_node_put(np);
212
213 return 0;
214
215ioremap_err:
216 iounmap(at91_st_base);
217node_err:
218 of_node_put(np);
219err:
220 return -EINVAL;
221}
222#else
223static int __init of_at91rm9200_st_init(void)
224{
225 return -EINVAL;
226}
227#endif
228
182void __init at91rm9200_ioremap_st(u32 addr) 229void __init at91rm9200_ioremap_st(u32 addr)
183{ 230{
231#ifdef CONFIG_OF
232 struct device_node *np;
233
234 np = of_find_matching_node(NULL, at91rm9200_st_timer_ids);
235 if (np) {
236 of_node_put(np);
237 return;
238 }
239#endif
184 at91_st_base = ioremap(addr, 256); 240 at91_st_base = ioremap(addr, 256);
185 if (!at91_st_base) 241 if (!at91_st_base)
186 panic("Impossible to ioremap ST\n"); 242 panic("Impossible to ioremap ST\n");
@@ -191,13 +247,16 @@ void __init at91rm9200_ioremap_st(u32 addr)
191 */ 247 */
192void __init at91rm9200_timer_init(void) 248void __init at91rm9200_timer_init(void)
193{ 249{
250 /* For device tree enabled device: initialize here */
251 of_at91rm9200_st_init();
252
194 /* Disable all timer interrupts, and clear any pending ones */ 253 /* Disable all timer interrupts, and clear any pending ones */
195 at91_st_write(AT91_ST_IDR, 254 at91_st_write(AT91_ST_IDR,
196 AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS); 255 AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS);
197 at91_st_read(AT91_ST_SR); 256 at91_st_read(AT91_ST_SR);
198 257
199 /* Make IRQs happen for the system timer */ 258 /* Make IRQs happen for the system timer */
200 setup_irq(NR_IRQS_LEGACY + AT91_ID_SYS, &at91rm9200_timer_irq); 259 setup_irq(at91rm9200_timer_irq.irq, &at91rm9200_timer_irq);
201 260
202 /* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used 261 /* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used
203 * directly for the clocksource and all clockevents, after adjusting 262 * directly for the clocksource and all clockevents, after adjusting
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index f8202615f4a8..c9e029e44d8a 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -230,11 +230,15 @@ static struct clk_lookup periph_clocks_lookups[] = {
230 CLKDEV_CON_DEV_ID("t1_clk", "fffdc000.timer", &tc4_clk), 230 CLKDEV_CON_DEV_ID("t1_clk", "fffdc000.timer", &tc4_clk),
231 CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk), 231 CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk),
232 CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk), 232 CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk),
233 CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
233 /* fake hclk clock */ 234 /* fake hclk clock */
234 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), 235 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
235 CLKDEV_CON_ID("pioA", &pioA_clk), 236 CLKDEV_CON_ID("pioA", &pioA_clk),
236 CLKDEV_CON_ID("pioB", &pioB_clk), 237 CLKDEV_CON_ID("pioB", &pioB_clk),
237 CLKDEV_CON_ID("pioC", &pioC_clk), 238 CLKDEV_CON_ID("pioC", &pioC_clk),
239 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
240 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
241 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
238}; 242};
239 243
240static struct clk_lookup usart_clocks_lookups[] = { 244static struct clk_lookup usart_clocks_lookups[] = {
@@ -390,10 +394,10 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
390 0, /* Advanced Interrupt Controller */ 394 0, /* Advanced Interrupt Controller */
391}; 395};
392 396
393struct at91_init_soc __initdata at91sam9260_soc = { 397AT91_SOC_START(sam9260)
394 .map_io = at91sam9260_map_io, 398 .map_io = at91sam9260_map_io,
395 .default_irq_priority = at91sam9260_default_irq_priority, 399 .default_irq_priority = at91sam9260_default_irq_priority,
396 .ioremap_registers = at91sam9260_ioremap_registers, 400 .ioremap_registers = at91sam9260_ioremap_registers,
397 .register_clocks = at91sam9260_register_clocks, 401 .register_clocks = at91sam9260_register_clocks,
398 .init = at91sam9260_initialize, 402 .init = at91sam9260_initialize,
399}; 403AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index aa1e58729885..414bd855fb0c 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
72 72
73 /* Enable overcurrent notification */ 73 /* Enable overcurrent notification */
74 for (i = 0; i < data->ports; i++) { 74 for (i = 0; i < data->ports; i++) {
75 if (data->overcurrent_pin[i]) 75 if (gpio_is_valid(data->overcurrent_pin[i]))
76 at91_set_gpio_input(data->overcurrent_pin[i], 1); 76 at91_set_gpio_input(data->overcurrent_pin[i], 1);
77 } 77 }
78 78
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 04295c04b3e0..4d262f346fd9 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -334,10 +334,10 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
334 0, /* Advanced Interrupt Controller */ 334 0, /* Advanced Interrupt Controller */
335}; 335};
336 336
337struct at91_init_soc __initdata at91sam9261_soc = { 337AT91_SOC_START(sam9261)
338 .map_io = at91sam9261_map_io, 338 .map_io = at91sam9261_map_io,
339 .default_irq_priority = at91sam9261_default_irq_priority, 339 .default_irq_priority = at91sam9261_default_irq_priority,
340 .ioremap_registers = at91sam9261_ioremap_registers, 340 .ioremap_registers = at91sam9261_ioremap_registers,
341 .register_clocks = at91sam9261_register_clocks, 341 .register_clocks = at91sam9261_register_clocks,
342 .init = at91sam9261_initialize, 342 .init = at91sam9261_initialize,
343}; 343AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index b9487696b7be..cd604aad8e96 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
72 72
73 /* Enable overcurrent notification */ 73 /* Enable overcurrent notification */
74 for (i = 0; i < data->ports; i++) { 74 for (i = 0; i < data->ports; i++) {
75 if (data->overcurrent_pin[i]) 75 if (gpio_is_valid(data->overcurrent_pin[i]))
76 at91_set_gpio_input(data->overcurrent_pin[i], 1); 76 at91_set_gpio_input(data->overcurrent_pin[i], 1);
77 } 77 }
78 78
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index d6f9c23927c4..ed390f6fa232 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -211,7 +211,14 @@ static struct clk_lookup periph_clocks_lookups[] = {
211 CLKDEV_CON_DEV_ID("hclk", "a00000.ohci", &ohci_clk), 211 CLKDEV_CON_DEV_ID("hclk", "a00000.ohci", &ohci_clk),
212 CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk), 212 CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
213 CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk), 213 CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
214 CLKDEV_CON_DEV_ID("mci_clk", "fff80000.mmc", &mmc0_clk),
215 CLKDEV_CON_DEV_ID("mci_clk", "fff84000.mmc", &mmc1_clk),
214 CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi_clk), 216 CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi_clk),
217 CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
218 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
219 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioCDE_clk),
220 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCDE_clk),
221 CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCDE_clk),
215}; 222};
216 223
217static struct clk_lookup usart_clocks_lookups[] = { 224static struct clk_lookup usart_clocks_lookups[] = {
@@ -365,10 +372,10 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
365 0, /* Advanced Interrupt Controller (IRQ1) */ 372 0, /* Advanced Interrupt Controller (IRQ1) */
366}; 373};
367 374
368struct at91_init_soc __initdata at91sam9263_soc = { 375AT91_SOC_START(sam9263)
369 .map_io = at91sam9263_map_io, 376 .map_io = at91sam9263_map_io,
370 .default_irq_priority = at91sam9263_default_irq_priority, 377 .default_irq_priority = at91sam9263_default_irq_priority,
371 .ioremap_registers = at91sam9263_ioremap_registers, 378 .ioremap_registers = at91sam9263_ioremap_registers,
372 .register_clocks = at91sam9263_register_clocks, 379 .register_clocks = at91sam9263_register_clocks,
373 .init = at91sam9263_initialize, 380 .init = at91sam9263_initialize,
374}; 381AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index cb85da2eccea..9c61e59a2104 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -78,7 +78,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
78 78
79 /* Enable overcurrent notification */ 79 /* Enable overcurrent notification */
80 for (i = 0; i < data->ports; i++) { 80 for (i = 0; i < data->ports; i++) {
81 if (data->overcurrent_pin[i]) 81 if (gpio_is_valid(data->overcurrent_pin[i]))
82 at91_set_gpio_input(data->overcurrent_pin[i], 1); 82 at91_set_gpio_input(data->overcurrent_pin[i], 1);
83 } 83 }
84 84
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 84af1b506d92..c5c2acc4bf22 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -256,10 +256,18 @@ static struct clk_lookup periph_clocks_lookups[] = {
256 CLKDEV_CON_DEV_ID("t0_clk", "fffd4000.timer", &tcb0_clk), 256 CLKDEV_CON_DEV_ID("t0_clk", "fffd4000.timer", &tcb0_clk),
257 CLKDEV_CON_DEV_ID("hclk", "700000.ohci", &uhphs_clk), 257 CLKDEV_CON_DEV_ID("hclk", "700000.ohci", &uhphs_clk),
258 CLKDEV_CON_DEV_ID("ehci_clk", "800000.ehci", &uhphs_clk), 258 CLKDEV_CON_DEV_ID("ehci_clk", "800000.ehci", &uhphs_clk),
259 CLKDEV_CON_DEV_ID("mci_clk", "fff80000.mmc", &mmc0_clk),
260 CLKDEV_CON_DEV_ID("mci_clk", "fffd0000.mmc", &mmc1_clk),
259 CLKDEV_CON_DEV_ID(NULL, "fff84000.i2c", &twi0_clk), 261 CLKDEV_CON_DEV_ID(NULL, "fff84000.i2c", &twi0_clk),
260 CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk), 262 CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk),
261 /* fake hclk clock */ 263 /* fake hclk clock */
262 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk), 264 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
265 CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
266 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
267 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioC_clk),
268 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioDE_clk),
269 CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioDE_clk),
270
263 CLKDEV_CON_ID("pioA", &pioA_clk), 271 CLKDEV_CON_ID("pioA", &pioA_clk),
264 CLKDEV_CON_ID("pioB", &pioB_clk), 272 CLKDEV_CON_ID("pioB", &pioB_clk),
265 CLKDEV_CON_ID("pioC", &pioC_clk), 273 CLKDEV_CON_ID("pioC", &pioC_clk),
@@ -409,10 +417,10 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
409 0, /* Advanced Interrupt Controller (IRQ0) */ 417 0, /* Advanced Interrupt Controller (IRQ0) */
410}; 418};
411 419
412struct at91_init_soc __initdata at91sam9g45_soc = { 420AT91_SOC_START(sam9g45)
413 .map_io = at91sam9g45_map_io, 421 .map_io = at91sam9g45_map_io,
414 .default_irq_priority = at91sam9g45_default_irq_priority, 422 .default_irq_priority = at91sam9g45_default_irq_priority,
415 .ioremap_registers = at91sam9g45_ioremap_registers, 423 .ioremap_registers = at91sam9g45_ioremap_registers,
416 .register_clocks = at91sam9g45_register_clocks, 424 .register_clocks = at91sam9g45_register_clocks,
417 .init = at91sam9g45_initialize, 425 .init = at91sam9g45_initialize,
418}; 426AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index b1596072dcc2..fcd233cb33d2 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -1841,8 +1841,8 @@ static struct resource sha_resources[] = {
1841 .flags = IORESOURCE_MEM, 1841 .flags = IORESOURCE_MEM,
1842 }, 1842 },
1843 [1] = { 1843 [1] = {
1844 .start = AT91SAM9G45_ID_AESTDESSHA, 1844 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
1845 .end = AT91SAM9G45_ID_AESTDESSHA, 1845 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
1846 .flags = IORESOURCE_IRQ, 1846 .flags = IORESOURCE_IRQ,
1847 }, 1847 },
1848}; 1848};
@@ -1874,8 +1874,8 @@ static struct resource tdes_resources[] = {
1874 .flags = IORESOURCE_MEM, 1874 .flags = IORESOURCE_MEM,
1875 }, 1875 },
1876 [1] = { 1876 [1] = {
1877 .start = AT91SAM9G45_ID_AESTDESSHA, 1877 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
1878 .end = AT91SAM9G45_ID_AESTDESSHA, 1878 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
1879 .flags = IORESOURCE_IRQ, 1879 .flags = IORESOURCE_IRQ,
1880 }, 1880 },
1881}; 1881};
@@ -1910,8 +1910,8 @@ static struct resource aes_resources[] = {
1910 .flags = IORESOURCE_MEM, 1910 .flags = IORESOURCE_MEM,
1911 }, 1911 },
1912 [1] = { 1912 [1] = {
1913 .start = AT91SAM9G45_ID_AESTDESSHA, 1913 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
1914 .end = AT91SAM9G45_ID_AESTDESSHA, 1914 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
1915 .flags = IORESOURCE_IRQ, 1915 .flags = IORESOURCE_IRQ,
1916 }, 1916 },
1917}; 1917};
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c
index 732d3d3f4ec5..70b3a99244ab 100644
--- a/arch/arm/mach-at91/at91sam9n12.c
+++ b/arch/arm/mach-at91/at91sam9n12.c
@@ -168,13 +168,14 @@ static struct clk_lookup periph_clocks_lookups[] = {
168 CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk), 168 CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk),
169 CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb_clk), 169 CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb_clk),
170 CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb_clk), 170 CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb_clk),
171 CLKDEV_CON_DEV_ID("mci_clk", "f0008000.mmc", &mmc_clk),
171 CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma_clk), 172 CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma_clk),
172 CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk), 173 CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
173 CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk), 174 CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
174 CLKDEV_CON_ID("pioA", &pioAB_clk), 175 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
175 CLKDEV_CON_ID("pioB", &pioAB_clk), 176 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
176 CLKDEV_CON_ID("pioC", &pioCD_clk), 177 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
177 CLKDEV_CON_ID("pioD", &pioCD_clk), 178 CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCD_clk),
178 /* additional fake clock for macb_hclk */ 179 /* additional fake clock for macb_hclk */
179 CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &uhp_clk), 180 CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &uhp_clk),
180 CLKDEV_CON_DEV_ID("ohci_clk", "500000.ohci", &uhp_clk), 181 CLKDEV_CON_DEV_ID("ohci_clk", "500000.ohci", &uhp_clk),
@@ -223,13 +224,10 @@ static void __init at91sam9n12_map_io(void)
223void __init at91sam9n12_initialize(void) 224void __init at91sam9n12_initialize(void)
224{ 225{
225 at91_extern_irq = (1 << AT91SAM9N12_ID_IRQ0); 226 at91_extern_irq = (1 << AT91SAM9N12_ID_IRQ0);
226
227 /* Register GPIO subsystem (using DT) */
228 at91_gpio_init(NULL, 0);
229} 227}
230 228
231struct at91_init_soc __initdata at91sam9n12_soc = { 229AT91_SOC_START(sam9n12)
232 .map_io = at91sam9n12_map_io, 230 .map_io = at91sam9n12_map_io,
233 .register_clocks = at91sam9n12_register_clocks, 231 .register_clocks = at91sam9n12_register_clocks,
234 .init = at91sam9n12_initialize, 232 .init = at91sam9n12_initialize,
235}; 233AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 72e908412222..cbe72e44c13f 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -338,10 +338,10 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
338 0, /* Advanced Interrupt Controller */ 338 0, /* Advanced Interrupt Controller */
339}; 339};
340 340
341struct at91_init_soc __initdata at91sam9rl_soc = { 341AT91_SOC_START(sam9rl)
342 .map_io = at91sam9rl_map_io, 342 .map_io = at91sam9rl_map_io,
343 .default_irq_priority = at91sam9rl_default_irq_priority, 343 .default_irq_priority = at91sam9rl_default_irq_priority,
344 .ioremap_registers = at91sam9rl_ioremap_registers, 344 .ioremap_registers = at91sam9rl_ioremap_registers,
345 .register_clocks = at91sam9rl_register_clocks, 345 .register_clocks = at91sam9rl_register_clocks,
346 .init = at91sam9rl_initialize, 346 .init = at91sam9rl_initialize,
347}; 347AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index e5035380dcbc..3c729f0e2d3c 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -229,15 +229,17 @@ static struct clk_lookup periph_clocks_lookups[] = {
229 CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk), 229 CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk),
230 CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb0_clk), 230 CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb0_clk),
231 CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk), 231 CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk),
232 CLKDEV_CON_DEV_ID("mci_clk", "f0008000.mmc", &mmc0_clk),
233 CLKDEV_CON_DEV_ID("mci_clk", "f000c000.mmc", &mmc1_clk),
232 CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma0_clk), 234 CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma0_clk),
233 CLKDEV_CON_DEV_ID("dma_clk", "ffffee00.dma-controller", &dma1_clk), 235 CLKDEV_CON_DEV_ID("dma_clk", "ffffee00.dma-controller", &dma1_clk),
234 CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk), 236 CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
235 CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk), 237 CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
236 CLKDEV_CON_DEV_ID(NULL, "f8018000.i2c", &twi2_clk), 238 CLKDEV_CON_DEV_ID(NULL, "f8018000.i2c", &twi2_clk),
237 CLKDEV_CON_ID("pioA", &pioAB_clk), 239 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
238 CLKDEV_CON_ID("pioB", &pioAB_clk), 240 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
239 CLKDEV_CON_ID("pioC", &pioCD_clk), 241 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
240 CLKDEV_CON_ID("pioD", &pioCD_clk), 242 CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCD_clk),
241 /* additional fake clock for macb_hclk */ 243 /* additional fake clock for macb_hclk */
242 CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb0_clk), 244 CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb0_clk),
243 CLKDEV_CON_DEV_ID("hclk", "f8030000.ethernet", &macb1_clk), 245 CLKDEV_CON_DEV_ID("hclk", "f8030000.ethernet", &macb1_clk),
@@ -313,18 +315,11 @@ static void __init at91sam9x5_map_io(void)
313 at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE); 315 at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE);
314} 316}
315 317
316void __init at91sam9x5_initialize(void)
317{
318 /* Register GPIO subsystem (using DT) */
319 at91_gpio_init(NULL, 0);
320}
321
322/* -------------------------------------------------------------------- 318/* --------------------------------------------------------------------
323 * Interrupt initialization 319 * Interrupt initialization
324 * -------------------------------------------------------------------- */ 320 * -------------------------------------------------------------------- */
325 321
326struct at91_init_soc __initdata at91sam9x5_soc = { 322AT91_SOC_START(sam9x5)
327 .map_io = at91sam9x5_map_io, 323 .map_io = at91sam9x5_map_io,
328 .register_clocks = at91sam9x5_register_clocks, 324 .register_clocks = at91sam9x5_register_clocks,
329 .init = at91sam9x5_initialize, 325AT91_SOC_END
330};
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c
index e8f45c4e0ea8..3b6a94820fa0 100644
--- a/arch/arm/mach-at91/board-dt.c
+++ b/arch/arm/mach-at91/board-dt.c
@@ -30,8 +30,6 @@
30static const struct of_device_id irq_of_match[] __initconst = { 30static const struct of_device_id irq_of_match[] __initconst = {
31 31
32 { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init }, 32 { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
33 { .compatible = "atmel,at91rm9200-gpio", .data = at91_gpio_of_irq_setup },
34 { .compatible = "atmel,at91sam9x5-gpio", .data = at91_gpio_of_irq_setup },
35 { /*sentinel*/ } 33 { /*sentinel*/ }
36}; 34};
37 35
diff --git a/arch/arm/mach-at91/board-rm9200-dt.c b/arch/arm/mach-at91/board-rm9200-dt.c
new file mode 100644
index 000000000000..5f9ce3da3fde
--- /dev/null
+++ b/arch/arm/mach-at91/board-rm9200-dt.c
@@ -0,0 +1,57 @@
1/*
2 * Setup code for AT91RM9200 Evaluation Kits with Device Tree support
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
6 * 2012 Joachim Eastwood <manabian@gmail.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
10
11#include <linux/types.h>
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/gpio.h>
15#include <linux/of.h>
16#include <linux/of_irq.h>
17#include <linux/of_platform.h>
18
19#include <asm/setup.h>
20#include <asm/irq.h>
21#include <asm/mach/arch.h>
22#include <asm/mach/map.h>
23#include <asm/mach/irq.h>
24
25#include "at91_aic.h"
26#include "generic.h"
27
28
29static const struct of_device_id irq_of_match[] __initconst = {
30 { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
31 { /*sentinel*/ }
32};
33
34static void __init at91rm9200_dt_init_irq(void)
35{
36 of_irq_init(irq_of_match);
37}
38
39static void __init at91rm9200_dt_device_init(void)
40{
41 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
42}
43
44static const char *at91rm9200_dt_board_compat[] __initdata = {
45 "atmel,at91rm9200",
46 NULL
47};
48
49DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200 (Device Tree)")
50 .timer = &at91rm9200_timer,
51 .map_io = at91_map_io,
52 .handle_irq = at91_aic_handle_irq,
53 .init_early = at91rm9200_dt_initialize,
54 .init_irq = at91rm9200_dt_init_irq,
55 .init_machine = at91rm9200_dt_device_init,
56 .dt_compat = at91rm9200_dt_board_compat,
57MACHINE_END
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index b62f560e6c75..fc593d615e7d 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -20,6 +20,7 @@ extern void __init at91_init_sram(int bank, unsigned long base,
20extern void __init at91rm9200_set_type(int type); 20extern void __init at91rm9200_set_type(int type);
21extern void __init at91_initialize(unsigned long main_clock); 21extern void __init at91_initialize(unsigned long main_clock);
22extern void __init at91x40_initialize(unsigned long main_clock); 22extern void __init at91x40_initialize(unsigned long main_clock);
23extern void __init at91rm9200_dt_initialize(void);
23extern void __init at91_dt_initialize(void); 24extern void __init at91_dt_initialize(void);
24 25
25 /* Interrupts */ 26 /* Interrupts */
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index be42cf0e74bd..c5d7e1e9d757 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -23,8 +23,6 @@
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/irqdomain.h> 24#include <linux/irqdomain.h>
25#include <linux/of_address.h> 25#include <linux/of_address.h>
26#include <linux/of_irq.h>
27#include <linux/of_gpio.h>
28 26
29#include <asm/mach/irq.h> 27#include <asm/mach/irq.h>
30 28
@@ -33,6 +31,8 @@
33 31
34#include "generic.h" 32#include "generic.h"
35 33
34#define MAX_NB_GPIO_PER_BANK 32
35
36struct at91_gpio_chip { 36struct at91_gpio_chip {
37 struct gpio_chip chip; 37 struct gpio_chip chip;
38 struct at91_gpio_chip *next; /* Bank sharing same clock */ 38 struct at91_gpio_chip *next; /* Bank sharing same clock */
@@ -46,6 +46,7 @@ struct at91_gpio_chip {
46 46
47#define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip) 47#define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip)
48 48
49static int at91_gpiolib_request(struct gpio_chip *chip, unsigned offset);
49static void at91_gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip); 50static void at91_gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip);
50static void at91_gpiolib_set(struct gpio_chip *chip, unsigned offset, int val); 51static void at91_gpiolib_set(struct gpio_chip *chip, unsigned offset, int val);
51static int at91_gpiolib_get(struct gpio_chip *chip, unsigned offset); 52static int at91_gpiolib_get(struct gpio_chip *chip, unsigned offset);
@@ -55,26 +56,27 @@ static int at91_gpiolib_direction_input(struct gpio_chip *chip,
55 unsigned offset); 56 unsigned offset);
56static int at91_gpiolib_to_irq(struct gpio_chip *chip, unsigned offset); 57static int at91_gpiolib_to_irq(struct gpio_chip *chip, unsigned offset);
57 58
58#define AT91_GPIO_CHIP(name, nr_gpio) \ 59#define AT91_GPIO_CHIP(name) \
59 { \ 60 { \
60 .chip = { \ 61 .chip = { \
61 .label = name, \ 62 .label = name, \
63 .request = at91_gpiolib_request, \
62 .direction_input = at91_gpiolib_direction_input, \ 64 .direction_input = at91_gpiolib_direction_input, \
63 .direction_output = at91_gpiolib_direction_output, \ 65 .direction_output = at91_gpiolib_direction_output, \
64 .get = at91_gpiolib_get, \ 66 .get = at91_gpiolib_get, \
65 .set = at91_gpiolib_set, \ 67 .set = at91_gpiolib_set, \
66 .dbg_show = at91_gpiolib_dbg_show, \ 68 .dbg_show = at91_gpiolib_dbg_show, \
67 .to_irq = at91_gpiolib_to_irq, \ 69 .to_irq = at91_gpiolib_to_irq, \
68 .ngpio = nr_gpio, \ 70 .ngpio = MAX_NB_GPIO_PER_BANK, \
69 }, \ 71 }, \
70 } 72 }
71 73
72static struct at91_gpio_chip gpio_chip[] = { 74static struct at91_gpio_chip gpio_chip[] = {
73 AT91_GPIO_CHIP("pioA", 32), 75 AT91_GPIO_CHIP("pioA"),
74 AT91_GPIO_CHIP("pioB", 32), 76 AT91_GPIO_CHIP("pioB"),
75 AT91_GPIO_CHIP("pioC", 32), 77 AT91_GPIO_CHIP("pioC"),
76 AT91_GPIO_CHIP("pioD", 32), 78 AT91_GPIO_CHIP("pioD"),
77 AT91_GPIO_CHIP("pioE", 32), 79 AT91_GPIO_CHIP("pioE"),
78}; 80};
79 81
80static int gpio_banks; 82static int gpio_banks;
@@ -89,7 +91,7 @@ static unsigned long at91_gpio_caps;
89 91
90static inline void __iomem *pin_to_controller(unsigned pin) 92static inline void __iomem *pin_to_controller(unsigned pin)
91{ 93{
92 pin /= 32; 94 pin /= MAX_NB_GPIO_PER_BANK;
93 if (likely(pin < gpio_banks)) 95 if (likely(pin < gpio_banks))
94 return gpio_chip[pin].regbase; 96 return gpio_chip[pin].regbase;
95 97
@@ -98,7 +100,7 @@ static inline void __iomem *pin_to_controller(unsigned pin)
98 100
99static inline unsigned pin_to_mask(unsigned pin) 101static inline unsigned pin_to_mask(unsigned pin)
100{ 102{
101 return 1 << (pin % 32); 103 return 1 << (pin % MAX_NB_GPIO_PER_BANK);
102} 104}
103 105
104 106
@@ -713,80 +715,6 @@ postcore_initcall(at91_gpio_debugfs_init);
713 */ 715 */
714static struct lock_class_key gpio_lock_class; 716static struct lock_class_key gpio_lock_class;
715 717
716#if defined(CONFIG_OF)
717static int at91_gpio_irq_map(struct irq_domain *h, unsigned int virq,
718 irq_hw_number_t hw)
719{
720 struct at91_gpio_chip *at91_gpio = h->host_data;
721
722 irq_set_lockdep_class(virq, &gpio_lock_class);
723
724 /*
725 * Can use the "simple" and not "edge" handler since it's
726 * shorter, and the AIC handles interrupts sanely.
727 */
728 irq_set_chip_and_handler(virq, &gpio_irqchip,
729 handle_simple_irq);
730 set_irq_flags(virq, IRQF_VALID);
731 irq_set_chip_data(virq, at91_gpio);
732
733 return 0;
734}
735
736static struct irq_domain_ops at91_gpio_ops = {
737 .map = at91_gpio_irq_map,
738 .xlate = irq_domain_xlate_twocell,
739};
740
741int __init at91_gpio_of_irq_setup(struct device_node *node,
742 struct device_node *parent)
743{
744 struct at91_gpio_chip *prev = NULL;
745 int alias_idx = of_alias_get_id(node, "gpio");
746 struct at91_gpio_chip *at91_gpio = &gpio_chip[alias_idx];
747
748 /* Setup proper .irq_set_type function */
749 if (has_pio3())
750 gpio_irqchip.irq_set_type = alt_gpio_irq_type;
751 else
752 gpio_irqchip.irq_set_type = gpio_irq_type;
753
754 /* Disable irqs of this PIO controller */
755 __raw_writel(~0, at91_gpio->regbase + PIO_IDR);
756
757 /* Setup irq domain */
758 at91_gpio->domain = irq_domain_add_linear(node, at91_gpio->chip.ngpio,
759 &at91_gpio_ops, at91_gpio);
760 if (!at91_gpio->domain)
761 panic("at91_gpio.%d: couldn't allocate irq domain (DT).\n",
762 at91_gpio->pioc_idx);
763
764 /* Setup chained handler */
765 if (at91_gpio->pioc_idx)
766 prev = &gpio_chip[at91_gpio->pioc_idx - 1];
767
768 /* The toplevel handler handles one bank of GPIOs, except
769 * on some SoC it can handles up to three...
770 * We only set up the handler for the first of the list.
771 */
772 if (prev && prev->next == at91_gpio)
773 return 0;
774
775 at91_gpio->pioc_virq = irq_create_mapping(irq_find_host(parent),
776 at91_gpio->pioc_hwirq);
777 irq_set_chip_data(at91_gpio->pioc_virq, at91_gpio);
778 irq_set_chained_handler(at91_gpio->pioc_virq, gpio_irq_handler);
779
780 return 0;
781}
782#else
783int __init at91_gpio_of_irq_setup(struct device_node *node,
784 struct device_node *parent)
785{
786 return -EINVAL;
787}
788#endif
789
790/* 718/*
791 * irqdomain initialization: pile up irqdomains on top of AIC range 719 * irqdomain initialization: pile up irqdomains on top of AIC range
792 */ 720 */
@@ -862,6 +790,16 @@ void __init at91_gpio_irq_setup(void)
862} 790}
863 791
864/* gpiolib support */ 792/* gpiolib support */
793static int at91_gpiolib_request(struct gpio_chip *chip, unsigned offset)
794{
795 struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
796 void __iomem *pio = at91_gpio->regbase;
797 unsigned mask = 1 << offset;
798
799 __raw_writel(mask, pio + PIO_PER);
800 return 0;
801}
802
865static int at91_gpiolib_direction_input(struct gpio_chip *chip, 803static int at91_gpiolib_direction_input(struct gpio_chip *chip,
866 unsigned offset) 804 unsigned offset)
867{ 805{
@@ -975,81 +913,11 @@ err:
975 return -EINVAL; 913 return -EINVAL;
976} 914}
977 915
978#ifdef CONFIG_OF_GPIO
979static void __init of_at91_gpio_init_one(struct device_node *np)
980{
981 int alias_idx;
982 struct at91_gpio_chip *at91_gpio;
983
984 if (!np)
985 return;
986
987 alias_idx = of_alias_get_id(np, "gpio");
988 if (alias_idx >= MAX_GPIO_BANKS) {
989 pr_err("at91_gpio, failed alias idx(%d) > MAX_GPIO_BANKS(%d), ignoring.\n",
990 alias_idx, MAX_GPIO_BANKS);
991 return;
992 }
993
994 at91_gpio = &gpio_chip[alias_idx];
995 at91_gpio->chip.base = alias_idx * at91_gpio->chip.ngpio;
996
997 at91_gpio->regbase = of_iomap(np, 0);
998 if (!at91_gpio->regbase) {
999 pr_err("at91_gpio.%d, failed to map registers, ignoring.\n",
1000 alias_idx);
1001 return;
1002 }
1003
1004 /* Get the interrupts property */
1005 if (of_property_read_u32(np, "interrupts", &at91_gpio->pioc_hwirq)) {
1006 pr_err("at91_gpio.%d, failed to get interrupts property, ignoring.\n",
1007 alias_idx);
1008 goto ioremap_err;
1009 }
1010
1011 /* Get capabilities from compatibility property */
1012 if (of_device_is_compatible(np, "atmel,at91sam9x5-gpio"))
1013 at91_gpio_caps |= AT91_GPIO_CAP_PIO3;
1014
1015 /* Setup clock */
1016 if (at91_gpio_setup_clk(alias_idx))
1017 goto ioremap_err;
1018
1019 at91_gpio->chip.of_node = np;
1020 gpio_banks = max(gpio_banks, alias_idx + 1);
1021 at91_gpio->pioc_idx = alias_idx;
1022 return;
1023
1024ioremap_err:
1025 iounmap(at91_gpio->regbase);
1026}
1027
1028static int __init of_at91_gpio_init(void)
1029{
1030 struct device_node *np = NULL;
1031
1032 /*
1033 * This isn't ideal, but it gets things hooked up until this
1034 * driver is converted into a platform_device
1035 */
1036 for_each_compatible_node(np, NULL, "atmel,at91rm9200-gpio")
1037 of_at91_gpio_init_one(np);
1038
1039 return gpio_banks > 0 ? 0 : -EINVAL;
1040}
1041#else
1042static int __init of_at91_gpio_init(void)
1043{
1044 return -EINVAL;
1045}
1046#endif
1047
1048static void __init at91_gpio_init_one(int idx, u32 regbase, int pioc_hwirq) 916static void __init at91_gpio_init_one(int idx, u32 regbase, int pioc_hwirq)
1049{ 917{
1050 struct at91_gpio_chip *at91_gpio = &gpio_chip[idx]; 918 struct at91_gpio_chip *at91_gpio = &gpio_chip[idx];
1051 919
1052 at91_gpio->chip.base = idx * at91_gpio->chip.ngpio; 920 at91_gpio->chip.base = idx * MAX_NB_GPIO_PER_BANK;
1053 at91_gpio->pioc_hwirq = pioc_hwirq; 921 at91_gpio->pioc_hwirq = pioc_hwirq;
1054 at91_gpio->pioc_idx = idx; 922 at91_gpio->pioc_idx = idx;
1055 923
@@ -1079,11 +947,11 @@ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
1079 947
1080 BUG_ON(nr_banks > MAX_GPIO_BANKS); 948 BUG_ON(nr_banks > MAX_GPIO_BANKS);
1081 949
1082 if (of_at91_gpio_init() < 0) { 950 if (of_have_populated_dt())
1083 /* No GPIO controller found in device tree */ 951 return;
1084 for (i = 0; i < nr_banks; i++) 952
1085 at91_gpio_init_one(i, data[i].regbase, data[i].id); 953 for (i = 0; i < nr_banks; i++)
1086 } 954 at91_gpio_init_one(i, data[i].regbase, data[i].id);
1087 955
1088 for (i = 0; i < gpio_banks; i++) { 956 for (i = 0; i < gpio_banks; i++) {
1089 at91_gpio = &gpio_chip[i]; 957 at91_gpio = &gpio_chip[i];
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index c55a4364ffb4..a0d92a960f46 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -70,16 +70,6 @@ struct at91_cf_data {
70extern void __init at91_add_device_cf(struct at91_cf_data *data); 70extern void __init at91_add_device_cf(struct at91_cf_data *data);
71 71
72 /* MMC / SD */ 72 /* MMC / SD */
73 /* at91_mci platform config */
74struct at91_mmc_data {
75 int det_pin; /* card detect IRQ */
76 unsigned slot_b:1; /* uses Slot B */
77 unsigned wire4:1; /* (SD) supports DAT0..DAT3 */
78 int wp_pin; /* (SD) writeprotect detect */
79 int vcc_pin; /* power switching (high == on) */
80};
81extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data);
82
83 /* atmel-mci platform config */ 73 /* atmel-mci platform config */
84extern void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data); 74extern void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data);
85 75
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 0b32c81730a5..19cdd0b5b391 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -10,6 +10,7 @@
10#include <linux/mm.h> 10#include <linux/mm.h>
11#include <linux/pm.h> 11#include <linux/pm.h>
12#include <linux/of_address.h> 12#include <linux/of_address.h>
13#include <linux/pinctrl/machine.h>
13 14
14#include <asm/system_misc.h> 15#include <asm/system_misc.h>
15#include <asm/mach/map.h> 16#include <asm/mach/map.h>
@@ -338,6 +339,7 @@ static void at91_dt_rstc(void)
338} 339}
339 340
340static struct of_device_id ramc_ids[] = { 341static struct of_device_id ramc_ids[] = {
342 { .compatible = "atmel,at91rm9200-sdramc" },
341 { .compatible = "atmel,at91sam9260-sdramc" }, 343 { .compatible = "atmel,at91sam9260-sdramc" },
342 { .compatible = "atmel,at91sam9g45-ddramc" }, 344 { .compatible = "atmel,at91sam9g45-ddramc" },
343 { /*sentinel*/ } 345 { /*sentinel*/ }
@@ -436,6 +438,19 @@ end:
436 of_node_put(np); 438 of_node_put(np);
437} 439}
438 440
441void __init at91rm9200_dt_initialize(void)
442{
443 at91_dt_ramc();
444
445 /* Init clock subsystem */
446 at91_dt_clock_init();
447
448 /* Register the processor-specific clocks */
449 at91_boot_soc.register_clocks();
450
451 at91_boot_soc.init();
452}
453
439void __init at91_dt_initialize(void) 454void __init at91_dt_initialize(void)
440{ 455{
441 at91_dt_rstc(); 456 at91_dt_rstc();
@@ -448,7 +463,8 @@ void __init at91_dt_initialize(void)
448 /* Register the processor-specific clocks */ 463 /* Register the processor-specific clocks */
449 at91_boot_soc.register_clocks(); 464 at91_boot_soc.register_clocks();
450 465
451 at91_boot_soc.init(); 466 if (at91_boot_soc.init)
467 at91_boot_soc.init();
452} 468}
453#endif 469#endif
454 470
@@ -463,4 +479,6 @@ void __init at91_initialize(unsigned long main_clock)
463 at91_boot_soc.register_clocks(); 479 at91_boot_soc.register_clocks();
464 480
465 at91_boot_soc.init(); 481 at91_boot_soc.init();
482
483 pinctrl_provide_dummies();
466} 484}
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index a9cfeb153719..9c6d3d4f9a23 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -5,6 +5,7 @@
5 */ 5 */
6 6
7struct at91_init_soc { 7struct at91_init_soc {
8 int builtin;
8 unsigned int *default_irq_priority; 9 unsigned int *default_irq_priority;
9 void (*map_io)(void); 10 void (*map_io)(void);
10 void (*ioremap_registers)(void); 11 void (*ioremap_registers)(void);
@@ -22,9 +23,18 @@ extern struct at91_init_soc at91sam9rl_soc;
22extern struct at91_init_soc at91sam9x5_soc; 23extern struct at91_init_soc at91sam9x5_soc;
23extern struct at91_init_soc at91sam9n12_soc; 24extern struct at91_init_soc at91sam9n12_soc;
24 25
26#define AT91_SOC_START(_name) \
27struct at91_init_soc __initdata at91##_name##_soc \
28 __used \
29 = { \
30 .builtin = 1, \
31
32#define AT91_SOC_END \
33};
34
25static inline int at91_soc_is_enabled(void) 35static inline int at91_soc_is_enabled(void)
26{ 36{
27 return at91_boot_soc.init != NULL; 37 return at91_boot_soc.builtin;
28} 38}
29 39
30#if !defined(CONFIG_SOC_AT91RM9200) 40#if !defined(CONFIG_SOC_AT91RM9200)
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c
index 2c5fb4c7e509..ae305397003c 100644
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
@@ -24,6 +24,8 @@
24#include <linux/mtd/mtd.h> 24#include <linux/mtd/mtd.h>
25#include <linux/mtd/physmap.h> 25#include <linux/mtd/physmap.h>
26#include <linux/mtd/partitions.h> 26#include <linux/mtd/partitions.h>
27#include <linux/usb/ehci_pdriver.h>
28#include <linux/usb/ohci_pdriver.h>
27#include <asm/setup.h> 29#include <asm/setup.h>
28#include <asm/mach-types.h> 30#include <asm/mach-types.h>
29#include <asm/hardware/gic.h> 31#include <asm/hardware/gic.h>
@@ -32,6 +34,7 @@
32#include <asm/mach/time.h> 34#include <asm/mach/time.h>
33#include <mach/cns3xxx.h> 35#include <mach/cns3xxx.h>
34#include <mach/irqs.h> 36#include <mach/irqs.h>
37#include <mach/pm.h>
35#include "core.h" 38#include "core.h"
36#include "devices.h" 39#include "devices.h"
37 40
@@ -125,13 +128,52 @@ static struct resource cns3xxx_usb_ehci_resources[] = {
125 128
126static u64 cns3xxx_usb_ehci_dma_mask = DMA_BIT_MASK(32); 129static u64 cns3xxx_usb_ehci_dma_mask = DMA_BIT_MASK(32);
127 130
131static int csn3xxx_usb_power_on(struct platform_device *pdev)
132{
133 /*
134 * EHCI and OHCI share the same clock and power,
135 * resetting twice would cause the 1st controller been reset.
136 * Therefore only do power up at the first up device, and
137 * power down at the last down device.
138 *
139 * Set USB AHB INCR length to 16
140 */
141 if (atomic_inc_return(&usb_pwr_ref) == 1) {
142 cns3xxx_pwr_power_up(1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_USB);
143 cns3xxx_pwr_clk_en(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST);
144 cns3xxx_pwr_soft_rst(1 << PM_SOFT_RST_REG_OFFST_USB_HOST);
145 __raw_writel((__raw_readl(MISC_CHIP_CONFIG_REG) | (0X2 << 24)),
146 MISC_CHIP_CONFIG_REG);
147 }
148
149 return 0;
150}
151
152static void csn3xxx_usb_power_off(struct platform_device *pdev)
153{
154 /*
155 * EHCI and OHCI share the same clock and power,
156 * resetting twice would cause the 1st controller been reset.
157 * Therefore only do power up at the first up device, and
158 * power down at the last down device.
159 */
160 if (atomic_dec_return(&usb_pwr_ref) == 0)
161 cns3xxx_pwr_clk_dis(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST);
162}
163
164static struct usb_ehci_pdata cns3xxx_usb_ehci_pdata = {
165 .power_on = csn3xxx_usb_power_on,
166 .power_off = csn3xxx_usb_power_off,
167};
168
128static struct platform_device cns3xxx_usb_ehci_device = { 169static struct platform_device cns3xxx_usb_ehci_device = {
129 .name = "cns3xxx-ehci", 170 .name = "ehci-platform",
130 .num_resources = ARRAY_SIZE(cns3xxx_usb_ehci_resources), 171 .num_resources = ARRAY_SIZE(cns3xxx_usb_ehci_resources),
131 .resource = cns3xxx_usb_ehci_resources, 172 .resource = cns3xxx_usb_ehci_resources,
132 .dev = { 173 .dev = {
133 .dma_mask = &cns3xxx_usb_ehci_dma_mask, 174 .dma_mask = &cns3xxx_usb_ehci_dma_mask,
134 .coherent_dma_mask = DMA_BIT_MASK(32), 175 .coherent_dma_mask = DMA_BIT_MASK(32),
176 .platform_data = &cns3xxx_usb_ehci_pdata,
135 }, 177 },
136}; 178};
137 179
@@ -149,13 +191,20 @@ static struct resource cns3xxx_usb_ohci_resources[] = {
149 191
150static u64 cns3xxx_usb_ohci_dma_mask = DMA_BIT_MASK(32); 192static u64 cns3xxx_usb_ohci_dma_mask = DMA_BIT_MASK(32);
151 193
194static struct usb_ohci_pdata cns3xxx_usb_ohci_pdata = {
195 .num_ports = 1,
196 .power_on = csn3xxx_usb_power_on,
197 .power_off = csn3xxx_usb_power_off,
198};
199
152static struct platform_device cns3xxx_usb_ohci_device = { 200static struct platform_device cns3xxx_usb_ohci_device = {
153 .name = "cns3xxx-ohci", 201 .name = "ohci-platform",
154 .num_resources = ARRAY_SIZE(cns3xxx_usb_ohci_resources), 202 .num_resources = ARRAY_SIZE(cns3xxx_usb_ohci_resources),
155 .resource = cns3xxx_usb_ohci_resources, 203 .resource = cns3xxx_usb_ohci_resources,
156 .dev = { 204 .dev = {
157 .dma_mask = &cns3xxx_usb_ohci_dma_mask, 205 .dma_mask = &cns3xxx_usb_ohci_dma_mask,
158 .coherent_dma_mask = DMA_BIT_MASK(32), 206 .coherent_dma_mask = DMA_BIT_MASK(32),
207 .platform_data = &cns3xxx_usb_ohci_pdata,
159 }, 208 },
160}; 209};
161 210
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index cd0c8b1e1ecf..14e9947bad6e 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -713,8 +713,7 @@ static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
713 break; 713 break;
714 case VPBE_ENC_CUSTOM_TIMINGS: 714 case VPBE_ENC_CUSTOM_TIMINGS:
715 if (pclock <= 27000000) { 715 if (pclock <= 27000000) {
716 v |= DM644X_VPSS_MUXSEL_PLL2_MODE | 716 v |= DM644X_VPSS_DACCLKEN;
717 DM644X_VPSS_DACCLKEN;
718 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); 717 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
719 } else { 718 } else {
720 /* 719 /*
diff --git a/arch/arm/mach-dove/include/mach/pm.h b/arch/arm/mach-dove/include/mach/pm.h
index 7bcd0dfce4b1..b47f75038686 100644
--- a/arch/arm/mach-dove/include/mach/pm.h
+++ b/arch/arm/mach-dove/include/mach/pm.h
@@ -63,7 +63,7 @@ static inline int pmu_to_irq(int pin)
63 63
64static inline int irq_to_pmu(int irq) 64static inline int irq_to_pmu(int irq)
65{ 65{
66 if (IRQ_DOVE_PMU_START < irq && irq < NR_IRQS) 66 if (IRQ_DOVE_PMU_START <= irq && irq < NR_IRQS)
67 return irq - IRQ_DOVE_PMU_START; 67 return irq - IRQ_DOVE_PMU_START;
68 68
69 return -EINVAL; 69 return -EINVAL;
diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
index 087711524e8a..bc4344aa1009 100644
--- a/arch/arm/mach-dove/irq.c
+++ b/arch/arm/mach-dove/irq.c
@@ -46,8 +46,20 @@ static void pmu_irq_ack(struct irq_data *d)
46 int pin = irq_to_pmu(d->irq); 46 int pin = irq_to_pmu(d->irq);
47 u32 u; 47 u32 u;
48 48
49 /*
50 * The PMU mask register is not RW0C: it is RW. This means that
51 * the bits take whatever value is written to them; if you write
52 * a '1', you will set the interrupt.
53 *
54 * Unfortunately this means there is NO race free way to clear
55 * these interrupts.
56 *
57 * So, let's structure the code so that the window is as small as
58 * possible.
59 */
49 u = ~(1 << (pin & 31)); 60 u = ~(1 << (pin & 31));
50 writel(u, PMU_INTERRUPT_CAUSE); 61 u &= readl_relaxed(PMU_INTERRUPT_CAUSE);
62 writel_relaxed(u, PMU_INTERRUPT_CAUSE);
51} 63}
52 64
53static struct irq_chip pmu_irq_chip = { 65static struct irq_chip pmu_irq_chip = {
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index 21d568b3b149..87e07d6fc615 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -275,6 +275,9 @@ static int __init exynos_dma_init(void)
275 exynos_pdma1_pdata.nr_valid_peri = 275 exynos_pdma1_pdata.nr_valid_peri =
276 ARRAY_SIZE(exynos4210_pdma1_peri); 276 ARRAY_SIZE(exynos4210_pdma1_peri);
277 exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri; 277 exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri;
278
279 if (samsung_rev() == EXYNOS4210_REV_0)
280 exynos_mdma1_device.res.start = EXYNOS4_PA_S_MDMA1;
278 } else if (soc_is_exynos4212() || soc_is_exynos4412()) { 281 } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
279 exynos_pdma0_pdata.nr_valid_peri = 282 exynos_pdma0_pdata.nr_valid_peri =
280 ARRAY_SIZE(exynos4212_pdma0_peri); 283 ARRAY_SIZE(exynos4212_pdma0_peri);
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 8480849affb9..ed4da4544cd2 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -90,6 +90,7 @@
90 90
91#define EXYNOS4_PA_MDMA0 0x10810000 91#define EXYNOS4_PA_MDMA0 0x10810000
92#define EXYNOS4_PA_MDMA1 0x12850000 92#define EXYNOS4_PA_MDMA1 0x12850000
93#define EXYNOS4_PA_S_MDMA1 0x12840000
93#define EXYNOS4_PA_PDMA0 0x12680000 94#define EXYNOS4_PA_PDMA0 0x12680000
94#define EXYNOS4_PA_PDMA1 0x12690000 95#define EXYNOS4_PA_PDMA1 0x12690000
95#define EXYNOS5_PA_MDMA0 0x10800000 96#define EXYNOS5_PA_MDMA0 0x10800000
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c
index 82c27230d4a9..86e37cd9376c 100644
--- a/arch/arm/mach-highbank/system.c
+++ b/arch/arm/mach-highbank/system.c
@@ -28,6 +28,7 @@ void highbank_restart(char mode, const char *cmd)
28 hignbank_set_pwr_soft_reset(); 28 hignbank_set_pwr_soft_reset();
29 29
30 scu_power_mode(scu_base_addr, SCU_PM_POWEROFF); 30 scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
31 cpu_do_idle(); 31 while (1)
32 cpu_do_idle();
32} 33}
33 34
diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c
index 3c1b8ff9a0a6..cc49c7ae186e 100644
--- a/arch/arm/mach-imx/clk-gate2.c
+++ b/arch/arm/mach-imx/clk-gate2.c
@@ -112,7 +112,7 @@ struct clk *clk_register_gate2(struct device *dev, const char *name,
112 112
113 clk = clk_register(dev, &gate->hw); 113 clk = clk_register(dev, &gate->hw);
114 if (IS_ERR(clk)) 114 if (IS_ERR(clk))
115 kfree(clk); 115 kfree(gate);
116 116
117 return clk; 117 return clk;
118} 118}
diff --git a/arch/arm/mach-imx/ehci-imx25.c b/arch/arm/mach-imx/ehci-imx25.c
index 412c583a24b0..576af7446952 100644
--- a/arch/arm/mach-imx/ehci-imx25.c
+++ b/arch/arm/mach-imx/ehci-imx25.c
@@ -30,7 +30,7 @@
30#define MX25_H1_SIC_SHIFT 21 30#define MX25_H1_SIC_SHIFT 21
31#define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT) 31#define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT)
32#define MX25_H1_PP_BIT (1 << 18) 32#define MX25_H1_PP_BIT (1 << 18)
33#define MX25_H1_PM_BIT (1 << 8) 33#define MX25_H1_PM_BIT (1 << 16)
34#define MX25_H1_IPPUE_UP_BIT (1 << 7) 34#define MX25_H1_IPPUE_UP_BIT (1 << 7)
35#define MX25_H1_IPPUE_DOWN_BIT (1 << 6) 35#define MX25_H1_IPPUE_DOWN_BIT (1 << 6)
36#define MX25_H1_TLL_BIT (1 << 5) 36#define MX25_H1_TLL_BIT (1 << 5)
diff --git a/arch/arm/mach-imx/ehci-imx35.c b/arch/arm/mach-imx/ehci-imx35.c
index 779e16eb65cb..293397852e4e 100644
--- a/arch/arm/mach-imx/ehci-imx35.c
+++ b/arch/arm/mach-imx/ehci-imx35.c
@@ -30,7 +30,7 @@
30#define MX35_H1_SIC_SHIFT 21 30#define MX35_H1_SIC_SHIFT 21
31#define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT) 31#define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT)
32#define MX35_H1_PP_BIT (1 << 18) 32#define MX35_H1_PP_BIT (1 << 18)
33#define MX35_H1_PM_BIT (1 << 8) 33#define MX35_H1_PM_BIT (1 << 16)
34#define MX35_H1_IPPUE_UP_BIT (1 << 7) 34#define MX35_H1_IPPUE_UP_BIT (1 << 7)
35#define MX35_H1_IPPUE_DOWN_BIT (1 << 6) 35#define MX35_H1_IPPUE_DOWN_BIT (1 << 6)
36#define MX35_H1_TLL_BIT (1 << 5) 36#define MX35_H1_TLL_BIT (1 << 5)
diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c
index e428f3ab15c7..b3d86d7081a0 100644
--- a/arch/arm/mach-integrator/impd1.c
+++ b/arch/arm/mach-integrator/impd1.c
@@ -21,10 +21,9 @@
21#include <linux/amba/bus.h> 21#include <linux/amba/bus.h>
22#include <linux/amba/clcd.h> 22#include <linux/amba/clcd.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/platform_data/clk-integrator.h>
24#include <linux/slab.h> 25#include <linux/slab.h>
25#include <linux/clkdev.h>
26 26
27#include <asm/hardware/icst.h>
28#include <mach/lm.h> 27#include <mach/lm.h>
29#include <mach/impd1.h> 28#include <mach/impd1.h>
30#include <asm/sizes.h> 29#include <asm/sizes.h>
@@ -36,45 +35,6 @@ MODULE_PARM_DESC(lmid, "logic module stack position");
36 35
37struct impd1_module { 36struct impd1_module {
38 void __iomem *base; 37 void __iomem *base;
39 struct clk vcos[2];
40 struct clk_lookup *clks[3];
41};
42
43static const struct icst_params impd1_vco_params = {
44 .ref = 24000000, /* 24 MHz */
45 .vco_max = ICST525_VCO_MAX_3V,
46 .vco_min = ICST525_VCO_MIN,
47 .vd_min = 12,
48 .vd_max = 519,
49 .rd_min = 3,
50 .rd_max = 120,
51 .s2div = icst525_s2div,
52 .idx2s = icst525_idx2s,
53};
54
55static void impd1_setvco(struct clk *clk, struct icst_vco vco)
56{
57 struct impd1_module *impd1 = clk->data;
58 u32 val = vco.v | (vco.r << 9) | (vco.s << 16);
59
60 writel(0xa05f, impd1->base + IMPD1_LOCK);
61 writel(val, clk->vcoreg);
62 writel(0, impd1->base + IMPD1_LOCK);
63
64#ifdef DEBUG
65 vco.v = val & 0x1ff;
66 vco.r = (val >> 9) & 0x7f;
67 vco.s = (val >> 16) & 7;
68
69 pr_debug("IM-PD1: VCO%d clock is %ld Hz\n",
70 vconr, icst525_hz(&impd1_vco_params, vco));
71#endif
72}
73
74static const struct clk_ops impd1_clk_ops = {
75 .round = icst_clk_round,
76 .set = icst_clk_set,
77 .setvco = impd1_setvco,
78}; 38};
79 39
80void impd1_tweak_control(struct device *dev, u32 mask, u32 val) 40void impd1_tweak_control(struct device *dev, u32 mask, u32 val)
@@ -344,10 +304,6 @@ static struct impd1_device impd1_devs[] = {
344 } 304 }
345}; 305};
346 306
347static struct clk fixed_14745600 = {
348 .rate = 14745600,
349};
350
351static int impd1_probe(struct lm_device *dev) 307static int impd1_probe(struct lm_device *dev)
352{ 308{
353 struct impd1_module *impd1; 309 struct impd1_module *impd1;
@@ -376,23 +332,7 @@ static int impd1_probe(struct lm_device *dev)
376 printk("IM-PD1 found at 0x%08lx\n", 332 printk("IM-PD1 found at 0x%08lx\n",
377 (unsigned long)dev->resource.start); 333 (unsigned long)dev->resource.start);
378 334
379 for (i = 0; i < ARRAY_SIZE(impd1->vcos); i++) { 335 integrator_impd1_clk_init(impd1->base, dev->id);
380 impd1->vcos[i].ops = &impd1_clk_ops,
381 impd1->vcos[i].owner = THIS_MODULE,
382 impd1->vcos[i].params = &impd1_vco_params,
383 impd1->vcos[i].data = impd1;
384 }
385 impd1->vcos[0].vcoreg = impd1->base + IMPD1_OSC1;
386 impd1->vcos[1].vcoreg = impd1->base + IMPD1_OSC2;
387
388 impd1->clks[0] = clkdev_alloc(&impd1->vcos[0], NULL, "lm%x:01000",
389 dev->id);
390 impd1->clks[1] = clkdev_alloc(&fixed_14745600, NULL, "lm%x:00100",
391 dev->id);
392 impd1->clks[2] = clkdev_alloc(&fixed_14745600, NULL, "lm%x:00200",
393 dev->id);
394 for (i = 0; i < ARRAY_SIZE(impd1->clks); i++)
395 clkdev_add(impd1->clks[i]);
396 336
397 for (i = 0; i < ARRAY_SIZE(impd1_devs); i++) { 337 for (i = 0; i < ARRAY_SIZE(impd1_devs); i++) {
398 struct impd1_device *idev = impd1_devs + i; 338 struct impd1_device *idev = impd1_devs + i;
@@ -431,12 +371,9 @@ static int impd1_remove_one(struct device *dev, void *data)
431static void impd1_remove(struct lm_device *dev) 371static void impd1_remove(struct lm_device *dev)
432{ 372{
433 struct impd1_module *impd1 = lm_get_drvdata(dev); 373 struct impd1_module *impd1 = lm_get_drvdata(dev);
434 int i;
435 374
436 device_for_each_child(&dev->dev, NULL, impd1_remove_one); 375 device_for_each_child(&dev->dev, NULL, impd1_remove_one);
437 376 integrator_impd1_clk_exit(dev->id);
438 for (i = 0; i < ARRAY_SIZE(impd1->clks); i++)
439 clkdev_drop(impd1->clks[i]);
440 377
441 lm_set_drvdata(dev, NULL); 378 lm_set_drvdata(dev, NULL);
442 379
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 1694f01ce2b6..6d6bde3e15fa 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -410,6 +410,7 @@ void __init ixp4xx_pci_preinit(void)
410 * Enable the IO window to be way up high, at 0xfffffc00 410 * Enable the IO window to be way up high, at 0xfffffc00
411 */ 411 */
412 local_write_config(PCI_BASE_ADDRESS_5, 4, 0xfffffc01); 412 local_write_config(PCI_BASE_ADDRESS_5, 4, 0xfffffc01);
413 local_write_config(0x40, 4, 0x000080FF); /* No TRDY time limit */
413 } else { 414 } else {
414 printk("PCI: IXP4xx is target - No bus scan performed\n"); 415 printk("PCI: IXP4xx is target - No bus scan performed\n");
415 } 416 }
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index fdf91a160884..8c0c0e2d0727 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -67,15 +67,12 @@ static struct map_desc ixp4xx_io_desc[] __initdata = {
67 .pfn = __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS), 67 .pfn = __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS),
68 .length = IXP4XX_PCI_CFG_REGION_SIZE, 68 .length = IXP4XX_PCI_CFG_REGION_SIZE,
69 .type = MT_DEVICE 69 .type = MT_DEVICE
70 }, 70 }, { /* Queue Manager */
71#ifdef CONFIG_DEBUG_LL 71 .virtual = (unsigned long)IXP4XX_QMGR_BASE_VIRT,
72 { /* Debug UART mapping */ 72 .pfn = __phys_to_pfn(IXP4XX_QMGR_BASE_PHYS),
73 .virtual = (unsigned long)IXP4XX_DEBUG_UART_BASE_VIRT, 73 .length = IXP4XX_QMGR_REGION_SIZE,
74 .pfn = __phys_to_pfn(IXP4XX_DEBUG_UART_BASE_PHYS),
75 .length = IXP4XX_DEBUG_UART_REGION_SIZE,
76 .type = MT_DEVICE 74 .type = MT_DEVICE
77 } 75 },
78#endif
79}; 76};
80 77
81void __init ixp4xx_map_io(void) 78void __init ixp4xx_map_io(void)
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index b800a031207c..53b8348dfcc2 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -15,6 +15,7 @@
15#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
16#include <asm/mach/flash.h> 16#include <asm/mach/flash.h>
17#include <asm/mach/pci.h> 17#include <asm/mach/pci.h>
18#include <asm/system_info.h>
18 19
19#define SLOT_ETHA 0x0B /* IDSEL = AD21 */ 20#define SLOT_ETHA 0x0B /* IDSEL = AD21 */
20#define SLOT_ETHB 0x0C /* IDSEL = AD20 */ 21#define SLOT_ETHB 0x0C /* IDSEL = AD20 */
@@ -329,7 +330,7 @@ static struct platform_device device_hss_tab[] = {
329}; 330};
330 331
331 332
332static struct platform_device *device_tab[6] __initdata = { 333static struct platform_device *device_tab[7] __initdata = {
333 &device_flash, /* index 0 */ 334 &device_flash, /* index 0 */
334}; 335};
335 336
diff --git a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
index 8c9f8d564492..ff686cbc5df4 100644
--- a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
@@ -17,8 +17,8 @@
17#else 17#else
18 mov \rp, #0 18 mov \rp, #0
19#endif 19#endif
20 orr \rv, \rp, #0xff000000 @ virtual 20 orr \rv, \rp, #0xfe000000 @ virtual
21 orr \rv, \rv, #0x00b00000 21 orr \rv, \rv, #0x00f00000
22 orr \rp, \rp, #0xc8000000 @ physical 22 orr \rp, \rp, #0xc8000000 @ physical
23 .endm 23 .endm
24 24
diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
index eb68b61ce975..c5bae9c035d5 100644
--- a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
@@ -30,51 +30,43 @@
30 * 30 *
31 * 0x50000000 0x10000000 ioremap'd EXP BUS 31 * 0x50000000 0x10000000 ioremap'd EXP BUS
32 * 32 *
33 * 0x6000000 0x00004000 ioremap'd QMgr 33 * 0xC8000000 0x00013000 0xFEF00000 On-Chip Peripherals
34 * 34 *
35 * 0xC0000000 0x00001000 0xffbff000 PCI CFG 35 * 0xC0000000 0x00001000 0xFEF13000 PCI CFG
36 * 36 *
37 * 0xC4000000 0x00001000 0xffbfe000 EXP CFG 37 * 0xC4000000 0x00001000 0xFEF14000 EXP CFG
38 * 38 *
39 * 0xC8000000 0x00013000 0xffbeb000 On-Chip Peripherals 39 * 0x60000000 0x00004000 0xFEF15000 QMgr
40 */ 40 */
41 41
42/* 42/*
43 * Queue Manager 43 * Queue Manager
44 */ 44 */
45#define IXP4XX_QMGR_BASE_PHYS (0x60000000) 45#define IXP4XX_QMGR_BASE_PHYS 0x60000000
46#define IXP4XX_QMGR_REGION_SIZE (0x00004000) 46#define IXP4XX_QMGR_BASE_VIRT IOMEM(0xFEF15000)
47#define IXP4XX_QMGR_REGION_SIZE 0x00004000
47 48
48/* 49/*
49 * Expansion BUS Configuration registers 50 * Peripheral space, including debug UART. Must be section-aligned so that
51 * it can be used with the low-level debug code.
50 */ 52 */
51#define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000) 53#define IXP4XX_PERIPHERAL_BASE_PHYS 0xC8000000
52#define IXP4XX_EXP_CFG_BASE_VIRT IOMEM(0xFFBFE000) 54#define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFEF00000)
53#define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000) 55#define IXP4XX_PERIPHERAL_REGION_SIZE 0x00013000
54 56
55/* 57/*
56 * PCI Config registers 58 * PCI Config registers
57 */ 59 */
58#define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000) 60#define IXP4XX_PCI_CFG_BASE_PHYS 0xC0000000
59#define IXP4XX_PCI_CFG_BASE_VIRT IOMEM(0xFFBFF000) 61#define IXP4XX_PCI_CFG_BASE_VIRT IOMEM(0xFEF13000)
60#define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000) 62#define IXP4XX_PCI_CFG_REGION_SIZE 0x00001000
61
62/*
63 * Peripheral space
64 */
65#define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000)
66#define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFFBEB000)
67#define IXP4XX_PERIPHERAL_REGION_SIZE (0x00013000)
68 63
69/* 64/*
70 * Debug UART 65 * Expansion BUS Configuration registers
71 *
72 * This is basically a remap of UART1 into a region that is section
73 * aligned so that it * can be used with the low-level debug code.
74 */ 66 */
75#define IXP4XX_DEBUG_UART_BASE_PHYS (0xC8000000) 67#define IXP4XX_EXP_CFG_BASE_PHYS 0xC4000000
76#define IXP4XX_DEBUG_UART_BASE_VIRT IOMEM(0xffb00000) 68#define IXP4XX_EXP_CFG_BASE_VIRT 0xFEF14000
77#define IXP4XX_DEBUG_UART_REGION_SIZE (0x00001000) 69#define IXP4XX_EXP_CFG_REGION_SIZE 0x00001000
78 70
79#define IXP4XX_EXP_CS0_OFFSET 0x00 71#define IXP4XX_EXP_CS0_OFFSET 0x00
80#define IXP4XX_EXP_CS1_OFFSET 0x04 72#define IXP4XX_EXP_CS1_OFFSET 0x04
diff --git a/arch/arm/mach-ixp4xx/include/mach/qmgr.h b/arch/arm/mach-ixp4xx/include/mach/qmgr.h
index 9e7cad2d54cb..4de8da536dbb 100644
--- a/arch/arm/mach-ixp4xx/include/mach/qmgr.h
+++ b/arch/arm/mach-ixp4xx/include/mach/qmgr.h
@@ -86,7 +86,7 @@ void qmgr_release_queue(unsigned int queue);
86 86
87static inline void qmgr_put_entry(unsigned int queue, u32 val) 87static inline void qmgr_put_entry(unsigned int queue, u32 val)
88{ 88{
89 extern struct qmgr_regs __iomem *qmgr_regs; 89 struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
90#if DEBUG_QMGR 90#if DEBUG_QMGR
91 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */ 91 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
92 92
@@ -99,7 +99,7 @@ static inline void qmgr_put_entry(unsigned int queue, u32 val)
99static inline u32 qmgr_get_entry(unsigned int queue) 99static inline u32 qmgr_get_entry(unsigned int queue)
100{ 100{
101 u32 val; 101 u32 val;
102 extern struct qmgr_regs __iomem *qmgr_regs; 102 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
103 val = __raw_readl(&qmgr_regs->acc[queue][0]); 103 val = __raw_readl(&qmgr_regs->acc[queue][0]);
104#if DEBUG_QMGR 104#if DEBUG_QMGR
105 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */ 105 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
@@ -112,14 +112,14 @@ static inline u32 qmgr_get_entry(unsigned int queue)
112 112
113static inline int __qmgr_get_stat1(unsigned int queue) 113static inline int __qmgr_get_stat1(unsigned int queue)
114{ 114{
115 extern struct qmgr_regs __iomem *qmgr_regs; 115 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
116 return (__raw_readl(&qmgr_regs->stat1[queue >> 3]) 116 return (__raw_readl(&qmgr_regs->stat1[queue >> 3])
117 >> ((queue & 7) << 2)) & 0xF; 117 >> ((queue & 7) << 2)) & 0xF;
118} 118}
119 119
120static inline int __qmgr_get_stat2(unsigned int queue) 120static inline int __qmgr_get_stat2(unsigned int queue)
121{ 121{
122 extern struct qmgr_regs __iomem *qmgr_regs; 122 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
123 BUG_ON(queue >= HALF_QUEUES); 123 BUG_ON(queue >= HALF_QUEUES);
124 return (__raw_readl(&qmgr_regs->stat2[queue >> 4]) 124 return (__raw_readl(&qmgr_regs->stat2[queue >> 4])
125 >> ((queue & 0xF) << 1)) & 0x3; 125 >> ((queue & 0xF) << 1)) & 0x3;
@@ -145,7 +145,7 @@ static inline int qmgr_stat_empty(unsigned int queue)
145 */ 145 */
146static inline int qmgr_stat_below_low_watermark(unsigned int queue) 146static inline int qmgr_stat_below_low_watermark(unsigned int queue)
147{ 147{
148 extern struct qmgr_regs __iomem *qmgr_regs; 148 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
149 if (queue >= HALF_QUEUES) 149 if (queue >= HALF_QUEUES)
150 return (__raw_readl(&qmgr_regs->statne_h) >> 150 return (__raw_readl(&qmgr_regs->statne_h) >>
151 (queue - HALF_QUEUES)) & 0x01; 151 (queue - HALF_QUEUES)) & 0x01;
@@ -172,7 +172,7 @@ static inline int qmgr_stat_above_high_watermark(unsigned int queue)
172 */ 172 */
173static inline int qmgr_stat_full(unsigned int queue) 173static inline int qmgr_stat_full(unsigned int queue)
174{ 174{
175 extern struct qmgr_regs __iomem *qmgr_regs; 175 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
176 if (queue >= HALF_QUEUES) 176 if (queue >= HALF_QUEUES)
177 return (__raw_readl(&qmgr_regs->statf_h) >> 177 return (__raw_readl(&qmgr_regs->statf_h) >>
178 (queue - HALF_QUEUES)) & 0x01; 178 (queue - HALF_QUEUES)) & 0x01;
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_npe.c b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
index a17ed79207a4..d4eb09a62863 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_npe.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
@@ -116,7 +116,11 @@
116/* NPE mailbox_status value for reset */ 116/* NPE mailbox_status value for reset */
117#define RESET_MBOX_STAT 0x0000F0F0 117#define RESET_MBOX_STAT 0x0000F0F0
118 118
119const char *npe_names[] = { "NPE-A", "NPE-B", "NPE-C" }; 119#define NPE_A_FIRMWARE "NPE-A"
120#define NPE_B_FIRMWARE "NPE-B"
121#define NPE_C_FIRMWARE "NPE-C"
122
123const char *npe_names[] = { NPE_A_FIRMWARE, NPE_B_FIRMWARE, NPE_C_FIRMWARE };
120 124
121#define print_npe(pri, npe, fmt, ...) \ 125#define print_npe(pri, npe, fmt, ...) \
122 printk(pri "%s: " fmt, npe_name(npe), ## __VA_ARGS__) 126 printk(pri "%s: " fmt, npe_name(npe), ## __VA_ARGS__)
@@ -724,6 +728,9 @@ module_exit(npe_cleanup_module);
724 728
725MODULE_AUTHOR("Krzysztof Halasa"); 729MODULE_AUTHOR("Krzysztof Halasa");
726MODULE_LICENSE("GPL v2"); 730MODULE_LICENSE("GPL v2");
731MODULE_FIRMWARE(NPE_A_FIRMWARE);
732MODULE_FIRMWARE(NPE_B_FIRMWARE);
733MODULE_FIRMWARE(NPE_C_FIRMWARE);
727 734
728EXPORT_SYMBOL(npe_names); 735EXPORT_SYMBOL(npe_names);
729EXPORT_SYMBOL(npe_running); 736EXPORT_SYMBOL(npe_running);
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
index 852f7c9f87d0..9d1b6b7c394c 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
@@ -14,7 +14,7 @@
14#include <linux/module.h> 14#include <linux/module.h>
15#include <mach/qmgr.h> 15#include <mach/qmgr.h>
16 16
17struct qmgr_regs __iomem *qmgr_regs; 17static struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
18static struct resource *mem_res; 18static struct resource *mem_res;
19static spinlock_t qmgr_lock; 19static spinlock_t qmgr_lock;
20static u32 used_sram_bitmap[4]; /* 128 16-dword pages */ 20static u32 used_sram_bitmap[4]; /* 128 16-dword pages */
@@ -293,12 +293,6 @@ static int qmgr_init(void)
293 if (mem_res == NULL) 293 if (mem_res == NULL)
294 return -EBUSY; 294 return -EBUSY;
295 295
296 qmgr_regs = ioremap(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
297 if (qmgr_regs == NULL) {
298 err = -ENOMEM;
299 goto error_map;
300 }
301
302 /* reset qmgr registers */ 296 /* reset qmgr registers */
303 for (i = 0; i < 4; i++) { 297 for (i = 0; i < 4; i++) {
304 __raw_writel(0x33333333, &qmgr_regs->stat1[i]); 298 __raw_writel(0x33333333, &qmgr_regs->stat1[i]);
@@ -347,8 +341,6 @@ static int qmgr_init(void)
347error_irq2: 341error_irq2:
348 free_irq(IRQ_IXP4XX_QM1, NULL); 342 free_irq(IRQ_IXP4XX_QM1, NULL);
349error_irq: 343error_irq:
350 iounmap(qmgr_regs);
351error_map:
352 release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE); 344 release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
353 return err; 345 return err;
354} 346}
@@ -359,7 +351,6 @@ static void qmgr_remove(void)
359 free_irq(IRQ_IXP4XX_QM2, NULL); 351 free_irq(IRQ_IXP4XX_QM2, NULL);
360 synchronize_irq(IRQ_IXP4XX_QM1); 352 synchronize_irq(IRQ_IXP4XX_QM1);
361 synchronize_irq(IRQ_IXP4XX_QM2); 353 synchronize_irq(IRQ_IXP4XX_QM2);
362 iounmap(qmgr_regs);
363 release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE); 354 release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
364} 355}
365 356
@@ -369,7 +360,6 @@ module_exit(qmgr_remove);
369MODULE_LICENSE("GPL v2"); 360MODULE_LICENSE("GPL v2");
370MODULE_AUTHOR("Krzysztof Halasa"); 361MODULE_AUTHOR("Krzysztof Halasa");
371 362
372EXPORT_SYMBOL(qmgr_regs);
373EXPORT_SYMBOL(qmgr_set_irq); 363EXPORT_SYMBOL(qmgr_set_irq);
374EXPORT_SYMBOL(qmgr_enable_irq); 364EXPORT_SYMBOL(qmgr_enable_irq);
375EXPORT_SYMBOL(qmgr_disable_irq); 365EXPORT_SYMBOL(qmgr_disable_irq);
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index ec544918b12c..74fc5a074fc4 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -207,14 +207,19 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
207 return 1; 207 return 1;
208} 208}
209 209
210/*
211 * The root complex has a hardwired class of PCI_CLASS_MEMORY_OTHER, when it
212 * is operating as a root complex this needs to be switched to
213 * PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on
214 * the device. Decoding setup is handled by the orion code.
215 */
210static void __devinit rc_pci_fixup(struct pci_dev *dev) 216static void __devinit rc_pci_fixup(struct pci_dev *dev)
211{ 217{
212 /*
213 * Prevent enumeration of root complex.
214 */
215 if (dev->bus->parent == NULL && dev->devfn == 0) { 218 if (dev->bus->parent == NULL && dev->devfn == 0) {
216 int i; 219 int i;
217 220
221 dev->class &= 0xff;
222 dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
218 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 223 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
219 dev->resource[i].start = 0; 224 dev->resource[i].start = 0;
220 dev->resource[i].end = 0; 225 dev->resource[i].end = 0;
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index bfa1eab91f41..22ef8a1abe08 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -24,6 +24,7 @@
24#include <linux/i2c.h> 24#include <linux/i2c.h>
25#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/pinctrl/machine.h> 26#include <linux/pinctrl/machine.h>
27#include <linux/platform_data/pinctrl-nomadik.h>
27#include <asm/hardware/vic.h> 28#include <asm/hardware/vic.h>
28#include <asm/sizes.h> 29#include <asm/sizes.h>
29#include <asm/mach-types.h> 30#include <asm/mach-types.h>
@@ -32,9 +33,7 @@
32#include <asm/mach/flash.h> 33#include <asm/mach/flash.h>
33#include <asm/mach/time.h> 34#include <asm/mach/time.h>
34 35
35#include <plat/gpio-nomadik.h>
36#include <plat/mtu.h> 36#include <plat/mtu.h>
37#include <plat/pincfg.h>
38 37
39#include <linux/platform_data/mtd-nomadik-nand.h> 38#include <linux/platform_data/mtd-nomadik-nand.h>
40#include <mach/fsmc.h> 39#include <mach/fsmc.h>
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index b617eaed0ce5..1273931303fb 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -26,8 +26,8 @@
26#include <linux/irq.h> 26#include <linux/irq.h>
27#include <linux/dma-mapping.h> 27#include <linux/dma-mapping.h>
28#include <linux/platform_data/clk-nomadik.h> 28#include <linux/platform_data/clk-nomadik.h>
29#include <linux/platform_data/pinctrl-nomadik.h>
29 30
30#include <plat/gpio-nomadik.h>
31#include <mach/hardware.h> 31#include <mach/hardware.h>
32#include <mach/irqs.h> 32#include <mach/irqs.h>
33#include <asm/mach/map.h> 33#include <asm/mach/map.h>
diff --git a/arch/arm/mach-nomadik/i2c-8815nhk.c b/arch/arm/mach-nomadik/i2c-8815nhk.c
index 6d14454d4609..0c2f6628299a 100644
--- a/arch/arm/mach-nomadik/i2c-8815nhk.c
+++ b/arch/arm/mach-nomadik/i2c-8815nhk.c
@@ -4,8 +4,7 @@
4#include <linux/i2c-algo-bit.h> 4#include <linux/i2c-algo-bit.h>
5#include <linux/i2c-gpio.h> 5#include <linux/i2c-gpio.h>
6#include <linux/platform_device.h> 6#include <linux/platform_device.h>
7#include <plat/gpio-nomadik.h> 7#include <linux/platform_data/pinctrl-nomadik.h>
8#include <plat/pincfg.h>
9 8
10/* 9/*
11 * There are two busses in the 8815NHK. 10 * There are two busses in the 8815NHK.
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 48d5e41dfbfa..378590694447 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -580,6 +580,11 @@ static void __init igep_wlan_bt_init(void)
580 } else 580 } else
581 return; 581 return;
582 582
583 /* Make sure that the GPIO pins are muxed correctly */
584 omap_mux_init_gpio(igep_wlan_bt_gpios[0].gpio, OMAP_PIN_OUTPUT);
585 omap_mux_init_gpio(igep_wlan_bt_gpios[1].gpio, OMAP_PIN_OUTPUT);
586 omap_mux_init_gpio(igep_wlan_bt_gpios[2].gpio, OMAP_PIN_OUTPUT);
587
583 err = gpio_request_array(igep_wlan_bt_gpios, 588 err = gpio_request_array(igep_wlan_bt_gpios,
584 ARRAY_SIZE(igep_wlan_bt_gpios)); 589 ARRAY_SIZE(igep_wlan_bt_gpios));
585 if (err) { 590 if (err) {
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index b700685762b5..56277a047136 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -45,7 +45,6 @@
45#include <asm/mach/flash.h> 45#include <asm/mach/flash.h>
46#include <asm/mach/map.h> 46#include <asm/mach/map.h>
47 47
48#include "common.h"
49#include <video/omapdss.h> 48#include <video/omapdss.h>
50#include <video/omap-panel-generic-dpi.h> 49#include <video/omap-panel-generic-dpi.h>
51#include <video/omap-panel-tfp410.h> 50#include <video/omap-panel-tfp410.h>
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index b56d06b48782..95192a062d5d 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -359,7 +359,7 @@ static struct clockdomain iss_44xx_clkdm = {
359 .clkdm_offs = OMAP4430_CM2_CAM_CAM_CDOFFS, 359 .clkdm_offs = OMAP4430_CM2_CAM_CAM_CDOFFS,
360 .wkdep_srcs = iss_wkup_sleep_deps, 360 .wkdep_srcs = iss_wkup_sleep_deps,
361 .sleepdep_srcs = iss_wkup_sleep_deps, 361 .sleepdep_srcs = iss_wkup_sleep_deps,
362 .flags = CLKDM_CAN_HWSUP_SWSUP, 362 .flags = CLKDM_CAN_SWSUP,
363}; 363};
364 364
365static struct clockdomain l3_dss_44xx_clkdm = { 365static struct clockdomain l3_dss_44xx_clkdm = {
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index 48daac2581b4..84551f205e46 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -64,30 +64,36 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
64 struct spi_board_info *spi_bi = &ads7846_spi_board_info; 64 struct spi_board_info *spi_bi = &ads7846_spi_board_info;
65 int err; 65 int err;
66 66
67 err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown"); 67 /*
68 if (err) { 68 * If a board defines get_pendown_state() function, request the pendown
69 pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err); 69 * GPIO and set the GPIO debounce time.
70 return; 70 * If a board does not define the get_pendown_state() function, then
71 } 71 * the ads7846 driver will setup the pendown GPIO itself.
72 */
73 if (board_pdata && board_pdata->get_pendown_state) {
74 err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown");
75 if (err) {
76 pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err);
77 return;
78 }
72 79
73 if (gpio_debounce) 80 if (gpio_debounce)
74 gpio_set_debounce(gpio_pendown, gpio_debounce); 81 gpio_set_debounce(gpio_pendown, gpio_debounce);
82
83 gpio_export(gpio_pendown, 0);
84 }
75 85
76 spi_bi->bus_num = bus_num; 86 spi_bi->bus_num = bus_num;
77 spi_bi->irq = gpio_to_irq(gpio_pendown); 87 spi_bi->irq = gpio_to_irq(gpio_pendown);
78 88
89 ads7846_config.gpio_pendown = gpio_pendown;
90
79 if (board_pdata) { 91 if (board_pdata) {
80 board_pdata->gpio_pendown = gpio_pendown; 92 board_pdata->gpio_pendown = gpio_pendown;
93 board_pdata->gpio_pendown_debounce = gpio_debounce;
81 spi_bi->platform_data = board_pdata; 94 spi_bi->platform_data = board_pdata;
82 if (board_pdata->get_pendown_state)
83 gpio_export(gpio_pendown, 0);
84 } else {
85 ads7846_config.gpio_pendown = gpio_pendown;
86 } 95 }
87 96
88 if (!board_pdata || (board_pdata && !board_pdata->get_pendown_state))
89 gpio_free(gpio_pendown);
90
91 spi_register_board_info(&ads7846_spi_board_info, 1); 97 spi_register_board_info(&ads7846_spi_board_info, 1);
92} 98}
93#else 99#else
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index cba60e05e32e..c72b5a727720 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -19,6 +19,7 @@
19#include <linux/of.h> 19#include <linux/of.h>
20#include <linux/pinctrl/machine.h> 20#include <linux/pinctrl/machine.h>
21#include <linux/platform_data/omap4-keypad.h> 21#include <linux/platform_data/omap4-keypad.h>
22#include <linux/platform_data/omap_ocp2scp.h>
22 23
23#include <asm/mach-types.h> 24#include <asm/mach-types.h>
24#include <asm/mach/map.h> 25#include <asm/mach/map.h>
@@ -613,6 +614,83 @@ static void omap_init_vout(void)
613static inline void omap_init_vout(void) {} 614static inline void omap_init_vout(void) {}
614#endif 615#endif
615 616
617#if defined(CONFIG_OMAP_OCP2SCP) || defined(CONFIG_OMAP_OCP2SCP_MODULE)
618static int count_ocp2scp_devices(struct omap_ocp2scp_dev *ocp2scp_dev)
619{
620 int cnt = 0;
621
622 while (ocp2scp_dev->drv_name != NULL) {
623 cnt++;
624 ocp2scp_dev++;
625 }
626
627 return cnt;
628}
629
630static void omap_init_ocp2scp(void)
631{
632 struct omap_hwmod *oh;
633 struct platform_device *pdev;
634 int bus_id = -1, dev_cnt = 0, i;
635 struct omap_ocp2scp_dev *ocp2scp_dev;
636 const char *oh_name, *name;
637 struct omap_ocp2scp_platform_data *pdata;
638
639 if (!cpu_is_omap44xx())
640 return;
641
642 oh_name = "ocp2scp_usb_phy";
643 name = "omap-ocp2scp";
644
645 oh = omap_hwmod_lookup(oh_name);
646 if (!oh) {
647 pr_err("%s: could not find omap_hwmod for %s\n", __func__,
648 oh_name);
649 return;
650 }
651
652 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
653 if (!pdata) {
654 pr_err("%s: No memory for ocp2scp pdata\n", __func__);
655 return;
656 }
657
658 ocp2scp_dev = oh->dev_attr;
659 dev_cnt = count_ocp2scp_devices(ocp2scp_dev);
660
661 if (!dev_cnt) {
662 pr_err("%s: No devices connected to ocp2scp\n", __func__);
663 kfree(pdata);
664 return;
665 }
666
667 pdata->devices = kzalloc(sizeof(struct omap_ocp2scp_dev *)
668 * dev_cnt, GFP_KERNEL);
669 if (!pdata->devices) {
670 pr_err("%s: No memory for ocp2scp pdata devices\n", __func__);
671 kfree(pdata);
672 return;
673 }
674
675 for (i = 0; i < dev_cnt; i++, ocp2scp_dev++)
676 pdata->devices[i] = ocp2scp_dev;
677
678 pdata->dev_cnt = dev_cnt;
679
680 pdev = omap_device_build(name, bus_id, oh, pdata, sizeof(*pdata), NULL,
681 0, false);
682 if (IS_ERR(pdev)) {
683 pr_err("Could not build omap_device for %s %s\n",
684 name, oh_name);
685 kfree(pdata->devices);
686 kfree(pdata);
687 return;
688 }
689}
690#else
691static inline void omap_init_ocp2scp(void) { }
692#endif
693
616/*-------------------------------------------------------------------------*/ 694/*-------------------------------------------------------------------------*/
617 695
618static int __init omap2_init_devices(void) 696static int __init omap2_init_devices(void)
@@ -640,6 +718,7 @@ static int __init omap2_init_devices(void)
640 omap_init_sham(); 718 omap_init_sham();
641 omap_init_aes(); 719 omap_init_aes();
642 omap_init_vout(); 720 omap_init_vout();
721 omap_init_ocp2scp();
643 722
644 return 0; 723 return 0;
645} 724}
diff --git a/arch/arm/mach-omap2/drm.c b/arch/arm/mach-omap2/drm.c
index 72e0f01b715c..49a7ffb716a5 100644
--- a/arch/arm/mach-omap2/drm.c
+++ b/arch/arm/mach-omap2/drm.c
@@ -23,15 +23,20 @@
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/dma-mapping.h> 25#include <linux/dma-mapping.h>
26#include <linux/platform_data/omap_drm.h>
26 27
27#include <plat/omap_device.h> 28#include <plat/omap_device.h>
28#include <plat/omap_hwmod.h> 29#include <plat/omap_hwmod.h>
30#include <plat/cpu.h>
29 31
30#if defined(CONFIG_DRM_OMAP) || (CONFIG_DRM_OMAP_MODULE) 32#if defined(CONFIG_DRM_OMAP) || (CONFIG_DRM_OMAP_MODULE)
31 33
34static struct omap_drm_platform_data platform_data;
35
32static struct platform_device omap_drm_device = { 36static struct platform_device omap_drm_device = {
33 .dev = { 37 .dev = {
34 .coherent_dma_mask = DMA_BIT_MASK(32), 38 .coherent_dma_mask = DMA_BIT_MASK(32),
39 .platform_data = &platform_data,
35 }, 40 },
36 .name = "omapdrm", 41 .name = "omapdrm",
37 .id = 0, 42 .id = 0,
@@ -52,6 +57,8 @@ static int __init omap_init_drm(void)
52 oh->name); 57 oh->name);
53 } 58 }
54 59
60 platform_data.omaprev = GET_OMAP_REVISION();
61
55 return platform_device_register(&omap_drm_device); 62 return platform_device_register(&omap_drm_device);
56 63
57} 64}
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index b969ab1d258b..87cc6d058de2 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -422,6 +422,38 @@ static int _set_softreset(struct omap_hwmod *oh, u32 *v)
422} 422}
423 423
424/** 424/**
425 * _wait_softreset_complete - wait for an OCP softreset to complete
426 * @oh: struct omap_hwmod * to wait on
427 *
428 * Wait until the IP block represented by @oh reports that its OCP
429 * softreset is complete. This can be triggered by software (see
430 * _ocp_softreset()) or by hardware upon returning from off-mode (one
431 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
432 * microseconds. Returns the number of microseconds waited.
433 */
434static int _wait_softreset_complete(struct omap_hwmod *oh)
435{
436 struct omap_hwmod_class_sysconfig *sysc;
437 u32 softrst_mask;
438 int c = 0;
439
440 sysc = oh->class->sysc;
441
442 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
443 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
444 & SYSS_RESETDONE_MASK),
445 MAX_MODULE_SOFTRESET_WAIT, c);
446 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
447 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
448 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
449 & softrst_mask),
450 MAX_MODULE_SOFTRESET_WAIT, c);
451 }
452
453 return c;
454}
455
456/**
425 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v 457 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
426 * @oh: struct omap_hwmod * 458 * @oh: struct omap_hwmod *
427 * 459 *
@@ -1282,6 +1314,18 @@ static void _enable_sysc(struct omap_hwmod *oh)
1282 if (!oh->class->sysc) 1314 if (!oh->class->sysc)
1283 return; 1315 return;
1284 1316
1317 /*
1318 * Wait until reset has completed, this is needed as the IP
1319 * block is reset automatically by hardware in some cases
1320 * (off-mode for example), and the drivers require the
1321 * IP to be ready when they access it
1322 */
1323 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1324 _enable_optional_clocks(oh);
1325 _wait_softreset_complete(oh);
1326 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1327 _disable_optional_clocks(oh);
1328
1285 v = oh->_sysc_cache; 1329 v = oh->_sysc_cache;
1286 sf = oh->class->sysc->sysc_flags; 1330 sf = oh->class->sysc->sysc_flags;
1287 1331
@@ -1804,7 +1848,7 @@ static int _am33xx_disable_module(struct omap_hwmod *oh)
1804 */ 1848 */
1805static int _ocp_softreset(struct omap_hwmod *oh) 1849static int _ocp_softreset(struct omap_hwmod *oh)
1806{ 1850{
1807 u32 v, softrst_mask; 1851 u32 v;
1808 int c = 0; 1852 int c = 0;
1809 int ret = 0; 1853 int ret = 0;
1810 1854
@@ -1834,19 +1878,7 @@ static int _ocp_softreset(struct omap_hwmod *oh)
1834 if (oh->class->sysc->srst_udelay) 1878 if (oh->class->sysc->srst_udelay)
1835 udelay(oh->class->sysc->srst_udelay); 1879 udelay(oh->class->sysc->srst_udelay);
1836 1880
1837 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS) 1881 c = _wait_softreset_complete(oh);
1838 omap_test_timeout((omap_hwmod_read(oh,
1839 oh->class->sysc->syss_offs)
1840 & SYSS_RESETDONE_MASK),
1841 MAX_MODULE_SOFTRESET_WAIT, c);
1842 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1843 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
1844 omap_test_timeout(!(omap_hwmod_read(oh,
1845 oh->class->sysc->sysc_offs)
1846 & softrst_mask),
1847 MAX_MODULE_SOFTRESET_WAIT, c);
1848 }
1849
1850 if (c == MAX_MODULE_SOFTRESET_WAIT) 1882 if (c == MAX_MODULE_SOFTRESET_WAIT)
1851 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n", 1883 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1852 oh->name, MAX_MODULE_SOFTRESET_WAIT); 1884 oh->name, MAX_MODULE_SOFTRESET_WAIT);
@@ -2352,6 +2384,9 @@ static int __init _setup_reset(struct omap_hwmod *oh)
2352 if (oh->_state != _HWMOD_STATE_INITIALIZED) 2384 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2353 return -EINVAL; 2385 return -EINVAL;
2354 2386
2387 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2388 return -EPERM;
2389
2355 if (oh->rst_lines_cnt == 0) { 2390 if (oh->rst_lines_cnt == 0) {
2356 r = _enable(oh); 2391 r = _enable(oh);
2357 if (r) { 2392 if (r) {
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 652d0285bd6d..0b1249e00398 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -21,6 +21,7 @@
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/platform_data/gpio-omap.h> 22#include <linux/platform_data/gpio-omap.h>
23#include <linux/power/smartreflex.h> 23#include <linux/power/smartreflex.h>
24#include <linux/platform_data/omap_ocp2scp.h>
24 25
25#include <plat/omap_hwmod.h> 26#include <plat/omap_hwmod.h>
26#include <plat/i2c.h> 27#include <plat/i2c.h>
@@ -2125,6 +2126,14 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {
2125 .name = "mcpdm", 2126 .name = "mcpdm",
2126 .class = &omap44xx_mcpdm_hwmod_class, 2127 .class = &omap44xx_mcpdm_hwmod_class,
2127 .clkdm_name = "abe_clkdm", 2128 .clkdm_name = "abe_clkdm",
2129 /*
2130 * It's suspected that the McPDM requires an off-chip main
2131 * functional clock, controlled via I2C. This IP block is
2132 * currently reset very early during boot, before I2C is
2133 * available, so it doesn't seem that we have any choice in
2134 * the kernel other than to avoid resetting it.
2135 */
2136 .flags = HWMOD_EXT_OPT_MAIN_CLK,
2128 .mpu_irqs = omap44xx_mcpdm_irqs, 2137 .mpu_irqs = omap44xx_mcpdm_irqs,
2129 .sdma_reqs = omap44xx_mcpdm_sdma_reqs, 2138 .sdma_reqs = omap44xx_mcpdm_sdma_reqs,
2130 .main_clk = "mcpdm_fck", 2139 .main_clk = "mcpdm_fck",
@@ -2681,6 +2690,32 @@ static struct omap_hwmod_class omap44xx_ocp2scp_hwmod_class = {
2681 .sysc = &omap44xx_ocp2scp_sysc, 2690 .sysc = &omap44xx_ocp2scp_sysc,
2682}; 2691};
2683 2692
2693/* ocp2scp dev_attr */
2694static struct resource omap44xx_usb_phy_and_pll_addrs[] = {
2695 {
2696 .name = "usb_phy",
2697 .start = 0x4a0ad080,
2698 .end = 0x4a0ae000,
2699 .flags = IORESOURCE_MEM,
2700 },
2701 {
2702 /* XXX: Remove this once control module driver is in place */
2703 .name = "ctrl_dev",
2704 .start = 0x4a002300,
2705 .end = 0x4a002303,
2706 .flags = IORESOURCE_MEM,
2707 },
2708 { }
2709};
2710
2711static struct omap_ocp2scp_dev ocp2scp_dev_attr[] = {
2712 {
2713 .drv_name = "omap-usb2",
2714 .res = omap44xx_usb_phy_and_pll_addrs,
2715 },
2716 { }
2717};
2718
2684/* ocp2scp_usb_phy */ 2719/* ocp2scp_usb_phy */
2685static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = { 2720static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
2686 .name = "ocp2scp_usb_phy", 2721 .name = "ocp2scp_usb_phy",
@@ -2694,6 +2729,7 @@ static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
2694 .modulemode = MODULEMODE_HWCTRL, 2729 .modulemode = MODULEMODE_HWCTRL,
2695 }, 2730 },
2696 }, 2731 },
2732 .dev_attr = ocp2scp_dev_attr,
2697}; 2733};
2698 2734
2699/* 2735/*
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 635e109f5ad3..a256135d8e48 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -73,6 +73,7 @@ void __init omap4_pmic_init(const char *pmic_type,
73{ 73{
74 /* PMIC part*/ 74 /* PMIC part*/
75 omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE); 75 omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
76 omap_mux_init_signal("fref_clk0_out.sys_drm_msecure", OMAP_PIN_OUTPUT);
76 omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data); 77 omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data);
77 78
78 /* Register additional devices on i2c1 bus if needed */ 79 /* Register additional devices on i2c1 bus if needed */
@@ -366,7 +367,7 @@ static struct regulator_init_data omap4_clk32kg_idata = {
366}; 367};
367 368
368static struct regulator_consumer_supply omap4_vdd1_supply[] = { 369static struct regulator_consumer_supply omap4_vdd1_supply[] = {
369 REGULATOR_SUPPLY("vcc", "mpu.0"), 370 REGULATOR_SUPPLY("vcc", "cpu0"),
370}; 371};
371 372
372static struct regulator_consumer_supply omap4_vdd2_supply[] = { 373static struct regulator_consumer_supply omap4_vdd2_supply[] = {
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 880249b17012..75878c37959b 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -264,7 +264,7 @@ static void __init omap_vc_i2c_init(struct voltagedomain *voltdm)
264 264
265 if (initialized) { 265 if (initialized) {
266 if (voltdm->pmic->i2c_high_speed != i2c_high_speed) 266 if (voltdm->pmic->i2c_high_speed != i2c_high_speed)
267 pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).", 267 pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).\n",
268 __func__, voltdm->name, i2c_high_speed); 268 __func__, voltdm->name, i2c_high_speed);
269 return; 269 return;
270 } 270 }
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 5ecbd17b5641..e2c6391863fe 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -28,6 +28,7 @@
28#include <linux/mfd/asic3.h> 28#include <linux/mfd/asic3.h>
29#include <linux/mtd/physmap.h> 29#include <linux/mtd/physmap.h>
30#include <linux/pda_power.h> 30#include <linux/pda_power.h>
31#include <linux/pwm.h>
31#include <linux/pwm_backlight.h> 32#include <linux/pwm_backlight.h>
32#include <linux/regulator/driver.h> 33#include <linux/regulator/driver.h>
33#include <linux/regulator/gpio-regulator.h> 34#include <linux/regulator/gpio-regulator.h>
@@ -556,7 +557,7 @@ static struct platform_device hx4700_lcd = {
556 */ 557 */
557 558
558static struct platform_pwm_backlight_data backlight_data = { 559static struct platform_pwm_backlight_data backlight_data = {
559 .pwm_id = 1, 560 .pwm_id = -1, /* Superseded by pwm_lookup */
560 .max_brightness = 200, 561 .max_brightness = 200,
561 .dft_brightness = 100, 562 .dft_brightness = 100,
562 .pwm_period_ns = 30923, 563 .pwm_period_ns = 30923,
@@ -571,6 +572,10 @@ static struct platform_device backlight = {
571 }, 572 },
572}; 573};
573 574
575static struct pwm_lookup hx4700_pwm_lookup[] = {
576 PWM_LOOKUP("pxa27x-pwm.1", 0, "pwm-backlight", NULL),
577};
578
574/* 579/*
575 * USB "Transceiver" 580 * USB "Transceiver"
576 */ 581 */
@@ -872,6 +877,7 @@ static void __init hx4700_init(void)
872 pxa_set_stuart_info(NULL); 877 pxa_set_stuart_info(NULL);
873 878
874 platform_add_devices(devices, ARRAY_SIZE(devices)); 879 platform_add_devices(devices, ARRAY_SIZE(devices));
880 pwm_add_table(hx4700_pwm_lookup, ARRAY_SIZE(hx4700_pwm_lookup));
875 881
876 pxa_set_ficp_info(&ficp_info); 882 pxa_set_ficp_info(&ficp_info);
877 pxa27x_set_i2c_power_info(NULL); 883 pxa27x_set_i2c_power_info(NULL);
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 438f02fe122a..842596d4d31e 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -86,10 +86,7 @@ static void spitz_discharge1(int on)
86 gpio_set_value(SPITZ_GPIO_LED_GREEN, on); 86 gpio_set_value(SPITZ_GPIO_LED_GREEN, on);
87} 87}
88 88
89static unsigned long gpio18_config[] = { 89static unsigned long gpio18_config = GPIO18_GPIO;
90 GPIO18_RDY,
91 GPIO18_GPIO,
92};
93 90
94static void spitz_presuspend(void) 91static void spitz_presuspend(void)
95{ 92{
@@ -112,7 +109,7 @@ static void spitz_presuspend(void)
112 PGSR3 &= ~SPITZ_GPIO_G3_STROBE_BIT; 109 PGSR3 &= ~SPITZ_GPIO_G3_STROBE_BIT;
113 PGSR2 |= GPIO_bit(SPITZ_GPIO_KEY_STROBE0); 110 PGSR2 |= GPIO_bit(SPITZ_GPIO_KEY_STROBE0);
114 111
115 pxa2xx_mfp_config(&gpio18_config[0], 1); 112 pxa2xx_mfp_config(&gpio18_config, 1);
116 gpio_request_one(18, GPIOF_OUT_INIT_HIGH, "Unknown"); 113 gpio_request_one(18, GPIOF_OUT_INIT_HIGH, "Unknown");
117 gpio_free(18); 114 gpio_free(18);
118 115
@@ -131,7 +128,6 @@ static void spitz_presuspend(void)
131 128
132static void spitz_postsuspend(void) 129static void spitz_postsuspend(void)
133{ 130{
134 pxa2xx_mfp_config(&gpio18_config[1], 1);
135} 131}
136 132
137static int spitz_should_wakeup(unsigned int resume_on_alarm) 133static int spitz_should_wakeup(unsigned int resume_on_alarm)
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index 0a43f3189c21..7a05de794a8c 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -548,7 +548,6 @@ static struct platform_device fsi_ak4648_device = {
548/* I2C */ 548/* I2C */
549static struct pcf857x_platform_data pcf8575_pdata = { 549static struct pcf857x_platform_data pcf8575_pdata = {
550 .gpio_base = GPIO_PCF8575_BASE, 550 .gpio_base = GPIO_PCF8575_BASE,
551 .irq = intcs_evt2irq(0x3260), /* IRQ19 */
552}; 551};
553 552
554static struct i2c_board_info i2c0_devices[] = { 553static struct i2c_board_info i2c0_devices[] = {
@@ -570,6 +569,7 @@ static struct i2c_board_info i2c1_devices[] = {
570static struct i2c_board_info i2c3_devices[] = { 569static struct i2c_board_info i2c3_devices[] = {
571 { 570 {
572 I2C_BOARD_INFO("pcf8575", 0x20), 571 I2C_BOARD_INFO("pcf8575", 0x20),
572 .irq = intcs_evt2irq(0x3260), /* IRQ19 */
573 .platform_data = &pcf8575_pdata, 573 .platform_data = &pcf8575_pdata,
574 }, 574 },
575}; 575};
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index b8efac4daed8..ece8a2dfb814 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -1445,8 +1445,6 @@ static struct platform_device pinctrl_device = {
1445static struct u300_gpio_platform u300_gpio_plat = { 1445static struct u300_gpio_platform u300_gpio_plat = {
1446 .ports = 7, 1446 .ports = 7,
1447 .gpio_base = 0, 1447 .gpio_base = 0,
1448 .gpio_irq_base = IRQ_U300_GPIO_BASE,
1449 .pinctrl_device = &pinctrl_device,
1450}; 1448};
1451 1449
1452static struct platform_device gpio_device = { 1450static struct platform_device gpio_device = {
@@ -1590,6 +1588,7 @@ static struct platform_device *platform_devs[] __initdata = {
1590 &i2c1_device, 1588 &i2c1_device,
1591 &keypad_device, 1589 &keypad_device,
1592 &rtc_device, 1590 &rtc_device,
1591 &pinctrl_device,
1593 &gpio_device, 1592 &gpio_device,
1594 &nand_device, 1593 &nand_device,
1595 &wdog_device, 1594 &wdog_device,
@@ -1804,7 +1803,7 @@ MACHINE_START(U300, "Ericsson AB U335 S335/B335 Prototype Board")
1804 /* Maintainer: Linus Walleij <linus.walleij@stericsson.com> */ 1803 /* Maintainer: Linus Walleij <linus.walleij@stericsson.com> */
1805 .atag_offset = 0x100, 1804 .atag_offset = 0x100,
1806 .map_io = u300_map_io, 1805 .map_io = u300_map_io,
1807 .nr_irqs = NR_IRQS_U300, 1806 .nr_irqs = 0,
1808 .init_irq = u300_init_irq, 1807 .init_irq = u300_init_irq,
1809 .handle_irq = vic_handle_irq, 1808 .handle_irq = vic_handle_irq,
1810 .timer = &u300_timer, 1809 .timer = &u300_timer,
diff --git a/arch/arm/mach-u300/include/mach/irqs.h b/arch/arm/mach-u300/include/mach/irqs.h
index e27425a63fa1..21d5e76a6cd3 100644
--- a/arch/arm/mach-u300/include/mach/irqs.h
+++ b/arch/arm/mach-u300/include/mach/irqs.h
@@ -12,79 +12,69 @@
12#ifndef __MACH_IRQS_H 12#ifndef __MACH_IRQS_H
13#define __MACH_IRQS_H 13#define __MACH_IRQS_H
14 14
15#define IRQ_U300_INTCON0_START 1 15#define IRQ_U300_INTCON0_START 32
16#define IRQ_U300_INTCON1_START 33 16#define IRQ_U300_INTCON1_START 64
17/* These are on INTCON0 - 30 lines */ 17/* These are on INTCON0 - 30 lines */
18#define IRQ_U300_IRQ0_EXT 1 18#define IRQ_U300_IRQ0_EXT 32
19#define IRQ_U300_IRQ1_EXT 2 19#define IRQ_U300_IRQ1_EXT 33
20#define IRQ_U300_DMA 3 20#define IRQ_U300_DMA 34
21#define IRQ_U300_VIDEO_ENC_0 4 21#define IRQ_U300_VIDEO_ENC_0 35
22#define IRQ_U300_VIDEO_ENC_1 5 22#define IRQ_U300_VIDEO_ENC_1 36
23#define IRQ_U300_AAIF_RX 6 23#define IRQ_U300_AAIF_RX 37
24#define IRQ_U300_AAIF_TX 7 24#define IRQ_U300_AAIF_TX 38
25#define IRQ_U300_AAIF_VGPIO 8 25#define IRQ_U300_AAIF_VGPIO 39
26#define IRQ_U300_AAIF_WAKEUP 9 26#define IRQ_U300_AAIF_WAKEUP 40
27#define IRQ_U300_PCM_I2S0_FRAME 10 27#define IRQ_U300_PCM_I2S0_FRAME 41
28#define IRQ_U300_PCM_I2S0_FIFO 11 28#define IRQ_U300_PCM_I2S0_FIFO 42
29#define IRQ_U300_PCM_I2S1_FRAME 12 29#define IRQ_U300_PCM_I2S1_FRAME 43
30#define IRQ_U300_PCM_I2S1_FIFO 13 30#define IRQ_U300_PCM_I2S1_FIFO 44
31#define IRQ_U300_XGAM_GAMCON 14 31#define IRQ_U300_XGAM_GAMCON 45
32#define IRQ_U300_XGAM_CDI 15 32#define IRQ_U300_XGAM_CDI 46
33#define IRQ_U300_XGAM_CDICON 16 33#define IRQ_U300_XGAM_CDICON 47
34#define IRQ_U300_XGAM_PDI 18 34#define IRQ_U300_XGAM_PDI 49
35#define IRQ_U300_XGAM_PDICON 19 35#define IRQ_U300_XGAM_PDICON 50
36#define IRQ_U300_XGAM_GAMEACC 20 36#define IRQ_U300_XGAM_GAMEACC 51
37#define IRQ_U300_XGAM_MCIDCT 21 37#define IRQ_U300_XGAM_MCIDCT 52
38#define IRQ_U300_APEX 22 38#define IRQ_U300_APEX 53
39#define IRQ_U300_UART0 23 39#define IRQ_U300_UART0 54
40#define IRQ_U300_SPI 24 40#define IRQ_U300_SPI 55
41#define IRQ_U300_TIMER_APP_OS 25 41#define IRQ_U300_TIMER_APP_OS 56
42#define IRQ_U300_TIMER_APP_DD 26 42#define IRQ_U300_TIMER_APP_DD 57
43#define IRQ_U300_TIMER_APP_GP1 27 43#define IRQ_U300_TIMER_APP_GP1 58
44#define IRQ_U300_TIMER_APP_GP2 28 44#define IRQ_U300_TIMER_APP_GP2 59
45#define IRQ_U300_TIMER_OS 29 45#define IRQ_U300_TIMER_OS 60
46#define IRQ_U300_TIMER_MS 30 46#define IRQ_U300_TIMER_MS 61
47#define IRQ_U300_KEYPAD_KEYBF 31 47#define IRQ_U300_KEYPAD_KEYBF 62
48#define IRQ_U300_KEYPAD_KEYBR 32 48#define IRQ_U300_KEYPAD_KEYBR 63
49/* These are on INTCON1 - 32 lines */ 49/* These are on INTCON1 - 32 lines */
50#define IRQ_U300_GPIO_PORT0 33 50#define IRQ_U300_GPIO_PORT0 64
51#define IRQ_U300_GPIO_PORT1 34 51#define IRQ_U300_GPIO_PORT1 65
52#define IRQ_U300_GPIO_PORT2 35 52#define IRQ_U300_GPIO_PORT2 66
53 53
54/* These are for DB3150, DB3200 and DB3350 */ 54/* These are for DB3150, DB3200 and DB3350 */
55#define IRQ_U300_WDOG 36 55#define IRQ_U300_WDOG 67
56#define IRQ_U300_EVHIST 37 56#define IRQ_U300_EVHIST 68
57#define IRQ_U300_MSPRO 38 57#define IRQ_U300_MSPRO 69
58#define IRQ_U300_MMCSD_MCIINTR0 39 58#define IRQ_U300_MMCSD_MCIINTR0 70
59#define IRQ_U300_MMCSD_MCIINTR1 40 59#define IRQ_U300_MMCSD_MCIINTR1 71
60#define IRQ_U300_I2C0 41 60#define IRQ_U300_I2C0 72
61#define IRQ_U300_I2C1 42 61#define IRQ_U300_I2C1 73
62#define IRQ_U300_RTC 43 62#define IRQ_U300_RTC 74
63#define IRQ_U300_NFIF 44 63#define IRQ_U300_NFIF 75
64#define IRQ_U300_NFIF2 45 64#define IRQ_U300_NFIF2 76
65 65
66/* The DB3350-specific interrupt lines */ 66/* The DB3350-specific interrupt lines */
67#define IRQ_U300_ISP_F0 46 67#define IRQ_U300_ISP_F0 77
68#define IRQ_U300_ISP_F1 47 68#define IRQ_U300_ISP_F1 78
69#define IRQ_U300_ISP_F2 48 69#define IRQ_U300_ISP_F2 79
70#define IRQ_U300_ISP_F3 49 70#define IRQ_U300_ISP_F3 80
71#define IRQ_U300_ISP_F4 50 71#define IRQ_U300_ISP_F4 81
72#define IRQ_U300_GPIO_PORT3 51 72#define IRQ_U300_GPIO_PORT3 82
73#define IRQ_U300_SYSCON_PLL_LOCK 52 73#define IRQ_U300_SYSCON_PLL_LOCK 83
74#define IRQ_U300_UART1 53 74#define IRQ_U300_UART1 84
75#define IRQ_U300_GPIO_PORT4 54 75#define IRQ_U300_GPIO_PORT4 85
76#define IRQ_U300_GPIO_PORT5 55 76#define IRQ_U300_GPIO_PORT5 86
77#define IRQ_U300_GPIO_PORT6 56 77#define IRQ_U300_GPIO_PORT6 87
78#define U300_VIC_IRQS_END 57 78#define U300_VIC_IRQS_END 88
79
80/* Maximum 8*7 GPIO lines */
81#ifdef CONFIG_PINCTRL_COH901
82#define IRQ_U300_GPIO_BASE (U300_VIC_IRQS_END)
83#define IRQ_U300_GPIO_END (IRQ_U300_GPIO_BASE + 56)
84#else
85#define IRQ_U300_GPIO_END (U300_VIC_IRQS_END)
86#endif
87
88#define NR_IRQS_U300 (IRQ_U300_GPIO_END - IRQ_U300_INTCON0_START)
89 79
90#endif 80#endif
diff --git a/arch/arm/mach-ux500/board-mop500-audio.c b/arch/arm/mach-ux500/board-mop500-audio.c
index 070629a95625..33631c9f1218 100644
--- a/arch/arm/mach-ux500/board-mop500-audio.c
+++ b/arch/arm/mach-ux500/board-mop500-audio.c
@@ -7,9 +7,8 @@
7#include <linux/platform_device.h> 7#include <linux/platform_device.h>
8#include <linux/init.h> 8#include <linux/init.h>
9#include <linux/gpio.h> 9#include <linux/gpio.h>
10#include <linux/platform_data/pinctrl-nomadik.h>
10 11
11#include <plat/gpio-nomadik.h>
12#include <plat/pincfg.h>
13#include <plat/ste_dma40.h> 12#include <plat/ste_dma40.h>
14 13
15#include <mach/devices.h> 14#include <mach/devices.h>
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index a267c6d30e37..c34d4efd0d5c 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -9,10 +9,9 @@
9#include <linux/bug.h> 9#include <linux/bug.h>
10#include <linux/string.h> 10#include <linux/string.h>
11#include <linux/pinctrl/machine.h> 11#include <linux/pinctrl/machine.h>
12#include <linux/platform_data/pinctrl-nomadik.h>
12 13
13#include <asm/mach-types.h> 14#include <asm/mach-types.h>
14#include <plat/pincfg.h>
15#include <plat/gpio-nomadik.h>
16 15
17#include <mach/hardware.h> 16#include <mach/hardware.h>
18 17
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 416d436111f2..0a3dd601a400 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -37,13 +37,13 @@
37#include <linux/of_platform.h> 37#include <linux/of_platform.h>
38#include <linux/leds.h> 38#include <linux/leds.h>
39#include <linux/pinctrl/consumer.h> 39#include <linux/pinctrl/consumer.h>
40#include <linux/platform_data/pinctrl-nomadik.h>
40 41
41#include <asm/mach-types.h> 42#include <asm/mach-types.h>
42#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
43#include <asm/hardware/gic.h> 44#include <asm/hardware/gic.h>
44 45
45#include <plat/ste_dma40.h> 46#include <plat/ste_dma40.h>
46#include <plat/gpio-nomadik.h>
47 47
48#include <mach/hardware.h> 48#include <mach/hardware.h>
49#include <mach/setup.h> 49#include <mach/setup.h>
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index bcdfe6b1d453..91f028c1264a 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -17,14 +17,14 @@
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/mfd/abx500/ab8500.h> 19#include <linux/mfd/abx500/ab8500.h>
20#include <linux/platform_data/usb-musb-ux500.h>
21#include <linux/platform_data/pinctrl-nomadik.h>
20 22
21#include <asm/pmu.h> 23#include <asm/pmu.h>
22#include <asm/mach/map.h> 24#include <asm/mach/map.h>
23#include <plat/gpio-nomadik.h>
24#include <mach/hardware.h> 25#include <mach/hardware.h>
25#include <mach/setup.h> 26#include <mach/setup.h>
26#include <mach/devices.h> 27#include <mach/devices.h>
27#include <linux/platform_data/usb-musb-ux500.h>
28#include <mach/db8500-regs.h> 28#include <mach/db8500-regs.h>
29 29
30#include "devices-db8500.h" 30#include "devices-db8500.h"
@@ -158,7 +158,7 @@ static void __init db8500_add_gpios(struct device *parent)
158 158
159 dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base), 159 dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base),
160 IRQ_DB8500_GPIO0, &pdata); 160 IRQ_DB8500_GPIO0, &pdata);
161 dbx500_add_pinctrl(parent, "pinctrl-db8500"); 161 dbx500_add_pinctrl(parent, "pinctrl-db8500", U8500_PRCMU_BASE);
162} 162}
163 163
164static int usb_db8500_rx_dma_cfg[] = { 164static int usb_db8500_rx_dma_cfg[] = {
@@ -214,9 +214,6 @@ struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500)
214 db8500_add_gpios(parent); 214 db8500_add_gpios(parent);
215 db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg); 215 db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
216 216
217 platform_device_register_data(parent,
218 "cpufreq-u8500", -1, NULL, 0);
219
220 for (i = 0; i < ARRAY_SIZE(platform_devs); i++) 217 for (i = 0; i < ARRAY_SIZE(platform_devs); i++)
221 platform_devs[i]->dev.parent = parent; 218 platform_devs[i]->dev.parent = parent;
222 219
@@ -236,9 +233,6 @@ struct device * __init u8500_of_init_devices(void)
236 233
237 db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg); 234 db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
238 235
239 platform_device_register_data(parent,
240 "cpufreq-u8500", -1, NULL, 0);
241
242 u8500_dma40_device.dev.parent = parent; 236 u8500_dma40_device.dev.parent = parent;
243 237
244 /* 238 /*
diff --git a/arch/arm/mach-ux500/devices-common.c b/arch/arm/mach-ux500/devices-common.c
index dfdd4a54668d..692a77a1c153 100644
--- a/arch/arm/mach-ux500/devices-common.c
+++ b/arch/arm/mach-ux500/devices-common.c
@@ -11,8 +11,7 @@
11#include <linux/irq.h> 11#include <linux/irq.h>
12#include <linux/slab.h> 12#include <linux/slab.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14 14#include <linux/platform_data/pinctrl-nomadik.h>
15#include <plat/gpio-nomadik.h>
16 15
17#include <mach/hardware.h> 16#include <mach/hardware.h>
18 17
diff --git a/arch/arm/mach-ux500/devices-common.h b/arch/arm/mach-ux500/devices-common.h
index 7fbf0ba336e1..96fa4ac89e2e 100644
--- a/arch/arm/mach-ux500/devices-common.h
+++ b/arch/arm/mach-ux500/devices-common.h
@@ -129,12 +129,18 @@ void dbx500_add_gpios(struct device *parent, resource_size_t *base, int num,
129 int irq, struct nmk_gpio_platform_data *pdata); 129 int irq, struct nmk_gpio_platform_data *pdata);
130 130
131static inline void 131static inline void
132dbx500_add_pinctrl(struct device *parent, const char *name) 132dbx500_add_pinctrl(struct device *parent, const char *name,
133 resource_size_t base)
133{ 134{
135 struct resource res[] = {
136 DEFINE_RES_MEM(base, SZ_8K),
137 };
134 struct platform_device_info pdevinfo = { 138 struct platform_device_info pdevinfo = {
135 .parent = parent, 139 .parent = parent,
136 .name = name, 140 .name = name,
137 .id = -1, 141 .id = -1,
142 .res = res,
143 .num_res = ARRAY_SIZE(res),
138 }; 144 };
139 145
140 platform_device_register_full(&pdevinfo); 146 platform_device_register_full(&pdevinfo);
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 560e0df728f8..359f782c747d 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -589,7 +589,7 @@ void __init v2m_dt_init_early(void)
589 return; 589 return;
590 590
591 /* Confirm board type against DT property, if available */ 591 /* Confirm board type against DT property, if available */
592 if (of_property_read_u32(allnodes, "arm,hbi", &dt_hbi) == 0) { 592 if (of_property_read_u32(of_allnodes, "arm,hbi", &dt_hbi) == 0) {
593 int site = v2m_get_master_site(); 593 int site = v2m_get_master_site();
594 u32 id = readl(v2m_sysreg_base + (site == SYS_CFG_SITE_DB2 ? 594 u32 id = readl(v2m_sysreg_base + (site == SYS_CFG_SITE_DB2 ?
595 V2M_SYS_PROCID1 : V2M_SYS_PROCID0)); 595 V2M_SYS_PROCID1 : V2M_SYS_PROCID0));
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index ce8cb1970d7a..10062ceadd1c 100644
--- a/arch/arm/mm/mmap.c
+++ b/arch/arm/mm/mmap.c
@@ -11,18 +11,6 @@
11#include <linux/random.h> 11#include <linux/random.h>
12#include <asm/cachetype.h> 12#include <asm/cachetype.h>
13 13
14static inline unsigned long COLOUR_ALIGN_DOWN(unsigned long addr,
15 unsigned long pgoff)
16{
17 unsigned long base = addr & ~(SHMLBA-1);
18 unsigned long off = (pgoff << PAGE_SHIFT) & (SHMLBA-1);
19
20 if (base + off <= addr)
21 return base + off;
22
23 return base - off;
24}
25
26#define COLOUR_ALIGN(addr,pgoff) \ 14#define COLOUR_ALIGN(addr,pgoff) \
27 ((((addr)+SHMLBA-1)&~(SHMLBA-1)) + \ 15 ((((addr)+SHMLBA-1)&~(SHMLBA-1)) + \
28 (((pgoff)<<PAGE_SHIFT) & (SHMLBA-1))) 16 (((pgoff)<<PAGE_SHIFT) & (SHMLBA-1)))
@@ -69,9 +57,9 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
69{ 57{
70 struct mm_struct *mm = current->mm; 58 struct mm_struct *mm = current->mm;
71 struct vm_area_struct *vma; 59 struct vm_area_struct *vma;
72 unsigned long start_addr;
73 int do_align = 0; 60 int do_align = 0;
74 int aliasing = cache_is_vipt_aliasing(); 61 int aliasing = cache_is_vipt_aliasing();
62 struct vm_unmapped_area_info info;
75 63
76 /* 64 /*
77 * We only need to do colour alignment if either the I or D 65 * We only need to do colour alignment if either the I or D
@@ -104,46 +92,14 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
104 (!vma || addr + len <= vma->vm_start)) 92 (!vma || addr + len <= vma->vm_start))
105 return addr; 93 return addr;
106 } 94 }
107 if (len > mm->cached_hole_size) {
108 start_addr = addr = mm->free_area_cache;
109 } else {
110 start_addr = addr = mm->mmap_base;
111 mm->cached_hole_size = 0;
112 }
113 95
114full_search: 96 info.flags = 0;
115 if (do_align) 97 info.length = len;
116 addr = COLOUR_ALIGN(addr, pgoff); 98 info.low_limit = mm->mmap_base;
117 else 99 info.high_limit = TASK_SIZE;
118 addr = PAGE_ALIGN(addr); 100 info.align_mask = do_align ? (PAGE_MASK & (SHMLBA - 1)) : 0;
119 101 info.align_offset = pgoff << PAGE_SHIFT;
120 for (vma = find_vma(mm, addr); ; vma = vma->vm_next) { 102 return vm_unmapped_area(&info);
121 /* At this point: (!vma || addr < vma->vm_end). */
122 if (TASK_SIZE - len < addr) {
123 /*
124 * Start a new search - just in case we missed
125 * some holes.
126 */
127 if (start_addr != TASK_UNMAPPED_BASE) {
128 start_addr = addr = TASK_UNMAPPED_BASE;
129 mm->cached_hole_size = 0;
130 goto full_search;
131 }
132 return -ENOMEM;
133 }
134 if (!vma || addr + len <= vma->vm_start) {
135 /*
136 * Remember the place where we stopped the search:
137 */
138 mm->free_area_cache = addr + len;
139 return addr;
140 }
141 if (addr + mm->cached_hole_size < vma->vm_start)
142 mm->cached_hole_size = vma->vm_start - addr;
143 addr = vma->vm_end;
144 if (do_align)
145 addr = COLOUR_ALIGN(addr, pgoff);
146 }
147} 103}
148 104
149unsigned long 105unsigned long
@@ -156,6 +112,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
156 unsigned long addr = addr0; 112 unsigned long addr = addr0;
157 int do_align = 0; 113 int do_align = 0;
158 int aliasing = cache_is_vipt_aliasing(); 114 int aliasing = cache_is_vipt_aliasing();
115 struct vm_unmapped_area_info info;
159 116
160 /* 117 /*
161 * We only need to do colour alignment if either the I or D 118 * We only need to do colour alignment if either the I or D
@@ -187,70 +144,27 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
187 return addr; 144 return addr;
188 } 145 }
189 146
190 /* check if free_area_cache is useful for us */ 147 info.flags = VM_UNMAPPED_AREA_TOPDOWN;
191 if (len <= mm->cached_hole_size) { 148 info.length = len;
192 mm->cached_hole_size = 0; 149 info.low_limit = PAGE_SIZE;
193 mm->free_area_cache = mm->mmap_base; 150 info.high_limit = mm->mmap_base;
194 } 151 info.align_mask = do_align ? (PAGE_MASK & (SHMLBA - 1)) : 0;
195 152 info.align_offset = pgoff << PAGE_SHIFT;
196 /* either no address requested or can't fit in requested address hole */ 153 addr = vm_unmapped_area(&info);
197 addr = mm->free_area_cache;
198 if (do_align) {
199 unsigned long base = COLOUR_ALIGN_DOWN(addr - len, pgoff);
200 addr = base + len;
201 }
202
203 /* make sure it can fit in the remaining address space */
204 if (addr > len) {
205 vma = find_vma(mm, addr-len);
206 if (!vma || addr <= vma->vm_start)
207 /* remember the address as a hint for next time */
208 return (mm->free_area_cache = addr-len);
209 }
210
211 if (mm->mmap_base < len)
212 goto bottomup;
213
214 addr = mm->mmap_base - len;
215 if (do_align)
216 addr = COLOUR_ALIGN_DOWN(addr, pgoff);
217
218 do {
219 /*
220 * Lookup failure means no vma is above this address,
221 * else if new region fits below vma->vm_start,
222 * return with success:
223 */
224 vma = find_vma(mm, addr);
225 if (!vma || addr+len <= vma->vm_start)
226 /* remember the address as a hint for next time */
227 return (mm->free_area_cache = addr);
228 154
229 /* remember the largest hole we saw so far */
230 if (addr + mm->cached_hole_size < vma->vm_start)
231 mm->cached_hole_size = vma->vm_start - addr;
232
233 /* try just below the current vma->vm_start */
234 addr = vma->vm_start - len;
235 if (do_align)
236 addr = COLOUR_ALIGN_DOWN(addr, pgoff);
237 } while (len < vma->vm_start);
238
239bottomup:
240 /* 155 /*
241 * A failed mmap() very likely causes application failure, 156 * A failed mmap() very likely causes application failure,
242 * so fall back to the bottom-up function here. This scenario 157 * so fall back to the bottom-up function here. This scenario
243 * can happen with large stack limits and large mmap() 158 * can happen with large stack limits and large mmap()
244 * allocations. 159 * allocations.
245 */ 160 */
246 mm->cached_hole_size = ~0UL; 161 if (addr & ~PAGE_MASK) {
247 mm->free_area_cache = TASK_UNMAPPED_BASE; 162 VM_BUG_ON(addr != -ENOMEM);
248 addr = arch_get_unmapped_area(filp, addr0, len, pgoff, flags); 163 info.flags = 0;
249 /* 164 info.low_limit = mm->mmap_base;
250 * Restore the topdown base: 165 info.high_limit = TASK_SIZE;
251 */ 166 addr = vm_unmapped_area(&info);
252 mm->free_area_cache = mm->mmap_base; 167 }
253 mm->cached_hole_size = ~0UL;
254 168
255 return addr; 169 return addr;
256} 170}
@@ -279,7 +193,7 @@ void arch_pick_mmap_layout(struct mm_struct *mm)
279 * You really shouldn't be using read() or write() on /dev/mem. This 193 * You really shouldn't be using read() or write() on /dev/mem. This
280 * might go away in the future. 194 * might go away in the future.
281 */ 195 */
282int valid_phys_addr_range(unsigned long addr, size_t size) 196int valid_phys_addr_range(phys_addr_t addr, size_t size)
283{ 197{
284 if (addr < PHYS_OFFSET) 198 if (addr < PHYS_OFFSET)
285 return 0; 199 return 0;
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 86b8b480634f..09c5233f4dfc 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -89,7 +89,7 @@ ENTRY(cpu_v6_dcache_clean_area)
89 mov pc, lr 89 mov pc, lr
90 90
91/* 91/*
92 * cpu_arm926_switch_mm(pgd_phys, tsk) 92 * cpu_v6_switch_mm(pgd_phys, tsk)
93 * 93 *
94 * Set the translation table base pointer to be pgd_phys 94 * Set the translation table base pointer to be pgd_phys
95 * 95 *
diff --git a/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h b/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h
deleted file mode 100644
index c08a54d9d889..000000000000
--- a/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h
+++ /dev/null
@@ -1,102 +0,0 @@
1/*
2 * Structures and registers for GPIO access in the Nomadik SoC
3 *
4 * Copyright (C) 2008 STMicroelectronics
5 * Author: Prafulla WADASKAR <prafulla.wadaskar@st.com>
6 * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __PLAT_NOMADIK_GPIO
14#define __PLAT_NOMADIK_GPIO
15
16/*
17 * "nmk_gpio" and "NMK_GPIO" stand for "Nomadik GPIO", leaving
18 * the "gpio" namespace for generic and cross-machine functions
19 */
20
21/* Register in the logic block */
22#define NMK_GPIO_DAT 0x00
23#define NMK_GPIO_DATS 0x04
24#define NMK_GPIO_DATC 0x08
25#define NMK_GPIO_PDIS 0x0c
26#define NMK_GPIO_DIR 0x10
27#define NMK_GPIO_DIRS 0x14
28#define NMK_GPIO_DIRC 0x18
29#define NMK_GPIO_SLPC 0x1c
30#define NMK_GPIO_AFSLA 0x20
31#define NMK_GPIO_AFSLB 0x24
32#define NMK_GPIO_LOWEMI 0x28
33
34#define NMK_GPIO_RIMSC 0x40
35#define NMK_GPIO_FIMSC 0x44
36#define NMK_GPIO_IS 0x48
37#define NMK_GPIO_IC 0x4c
38#define NMK_GPIO_RWIMSC 0x50
39#define NMK_GPIO_FWIMSC 0x54
40#define NMK_GPIO_WKS 0x58
41
42/* Alternate functions: function C is set in hw by setting both A and B */
43#define NMK_GPIO_ALT_GPIO 0
44#define NMK_GPIO_ALT_A 1
45#define NMK_GPIO_ALT_B 2
46#define NMK_GPIO_ALT_C (NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
47
48#define NMK_GPIO_ALT_CX_SHIFT 2
49#define NMK_GPIO_ALT_C1 ((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
50#define NMK_GPIO_ALT_C2 ((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
51#define NMK_GPIO_ALT_C3 ((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
52#define NMK_GPIO_ALT_C4 ((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
53
54/* Pull up/down values */
55enum nmk_gpio_pull {
56 NMK_GPIO_PULL_NONE,
57 NMK_GPIO_PULL_UP,
58 NMK_GPIO_PULL_DOWN,
59};
60
61/* Sleep mode */
62enum nmk_gpio_slpm {
63 NMK_GPIO_SLPM_INPUT,
64 NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT,
65 NMK_GPIO_SLPM_NOCHANGE,
66 NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE,
67};
68
69extern int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode);
70extern int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull);
71#ifdef CONFIG_PINCTRL_NOMADIK
72extern int nmk_gpio_set_mode(int gpio, int gpio_mode);
73#else
74static inline int nmk_gpio_set_mode(int gpio, int gpio_mode)
75{
76 return -ENODEV;
77}
78#endif
79extern int nmk_gpio_get_mode(int gpio);
80
81extern void nmk_gpio_wakeups_suspend(void);
82extern void nmk_gpio_wakeups_resume(void);
83
84extern void nmk_gpio_clocks_enable(void);
85extern void nmk_gpio_clocks_disable(void);
86
87extern void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up);
88
89/*
90 * Platform data to register a block: only the initial gpio/irq number.
91 */
92struct nmk_gpio_platform_data {
93 char *name;
94 int first_gpio;
95 int first_irq;
96 int num_gpio;
97 u32 (*get_secondary_status)(unsigned int bank);
98 void (*set_ioforce)(bool enable);
99 bool supports_sleepmode;
100};
101
102#endif /* __PLAT_NOMADIK_GPIO */
diff --git a/arch/arm/plat-nomadik/include/plat/pincfg.h b/arch/arm/plat-nomadik/include/plat/pincfg.h
deleted file mode 100644
index 3b8ec60af351..000000000000
--- a/arch/arm/plat-nomadik/include/plat/pincfg.h
+++ /dev/null
@@ -1,173 +0,0 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License terms: GNU General Public License, version 2
5 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
6 *
7 * Based on arch/arm/mach-pxa/include/mach/mfp.h:
8 * Copyright (C) 2007 Marvell International Ltd.
9 * eric miao <eric.miao@marvell.com>
10 */
11
12#ifndef __PLAT_PINCFG_H
13#define __PLAT_PINCFG_H
14
15/*
16 * pin configurations are represented by 32-bit integers:
17 *
18 * bit 0.. 8 - Pin Number (512 Pins Maximum)
19 * bit 9..10 - Alternate Function Selection
20 * bit 11..12 - Pull up/down state
21 * bit 13 - Sleep mode behaviour
22 * bit 14 - Direction
23 * bit 15 - Value (if output)
24 * bit 16..18 - SLPM pull up/down state
25 * bit 19..20 - SLPM direction
26 * bit 21..22 - SLPM Value (if output)
27 * bit 23..25 - PDIS value (if input)
28 * bit 26 - Gpio mode
29 * bit 27 - Sleep mode
30 *
31 * to facilitate the definition, the following macros are provided
32 *
33 * PIN_CFG_DEFAULT - default config (0):
34 * pull up/down = disabled
35 * sleep mode = input/wakeup
36 * direction = input
37 * value = low
38 * SLPM direction = same as normal
39 * SLPM pull = same as normal
40 * SLPM value = same as normal
41 *
42 * PIN_CFG - default config with alternate function
43 */
44
45typedef unsigned long pin_cfg_t;
46
47#define PIN_NUM_MASK 0x1ff
48#define PIN_NUM(x) ((x) & PIN_NUM_MASK)
49
50#define PIN_ALT_SHIFT 9
51#define PIN_ALT_MASK (0x3 << PIN_ALT_SHIFT)
52#define PIN_ALT(x) (((x) & PIN_ALT_MASK) >> PIN_ALT_SHIFT)
53#define PIN_GPIO (NMK_GPIO_ALT_GPIO << PIN_ALT_SHIFT)
54#define PIN_ALT_A (NMK_GPIO_ALT_A << PIN_ALT_SHIFT)
55#define PIN_ALT_B (NMK_GPIO_ALT_B << PIN_ALT_SHIFT)
56#define PIN_ALT_C (NMK_GPIO_ALT_C << PIN_ALT_SHIFT)
57
58#define PIN_PULL_SHIFT 11
59#define PIN_PULL_MASK (0x3 << PIN_PULL_SHIFT)
60#define PIN_PULL(x) (((x) & PIN_PULL_MASK) >> PIN_PULL_SHIFT)
61#define PIN_PULL_NONE (NMK_GPIO_PULL_NONE << PIN_PULL_SHIFT)
62#define PIN_PULL_UP (NMK_GPIO_PULL_UP << PIN_PULL_SHIFT)
63#define PIN_PULL_DOWN (NMK_GPIO_PULL_DOWN << PIN_PULL_SHIFT)
64
65#define PIN_SLPM_SHIFT 13
66#define PIN_SLPM_MASK (0x1 << PIN_SLPM_SHIFT)
67#define PIN_SLPM(x) (((x) & PIN_SLPM_MASK) >> PIN_SLPM_SHIFT)
68#define PIN_SLPM_MAKE_INPUT (NMK_GPIO_SLPM_INPUT << PIN_SLPM_SHIFT)
69#define PIN_SLPM_NOCHANGE (NMK_GPIO_SLPM_NOCHANGE << PIN_SLPM_SHIFT)
70/* These two replace the above in DB8500v2+ */
71#define PIN_SLPM_WAKEUP_ENABLE (NMK_GPIO_SLPM_WAKEUP_ENABLE << PIN_SLPM_SHIFT)
72#define PIN_SLPM_WAKEUP_DISABLE (NMK_GPIO_SLPM_WAKEUP_DISABLE << PIN_SLPM_SHIFT)
73#define PIN_SLPM_USE_MUX_SETTINGS_IN_SLEEP PIN_SLPM_WAKEUP_DISABLE
74
75#define PIN_SLPM_GPIO PIN_SLPM_WAKEUP_ENABLE /* In SLPM, pin is a gpio */
76#define PIN_SLPM_ALTFUNC PIN_SLPM_WAKEUP_DISABLE /* In SLPM, pin is altfunc */
77
78#define PIN_DIR_SHIFT 14
79#define PIN_DIR_MASK (0x1 << PIN_DIR_SHIFT)
80#define PIN_DIR(x) (((x) & PIN_DIR_MASK) >> PIN_DIR_SHIFT)
81#define PIN_DIR_INPUT (0 << PIN_DIR_SHIFT)
82#define PIN_DIR_OUTPUT (1 << PIN_DIR_SHIFT)
83
84#define PIN_VAL_SHIFT 15
85#define PIN_VAL_MASK (0x1 << PIN_VAL_SHIFT)
86#define PIN_VAL(x) (((x) & PIN_VAL_MASK) >> PIN_VAL_SHIFT)
87#define PIN_VAL_LOW (0 << PIN_VAL_SHIFT)
88#define PIN_VAL_HIGH (1 << PIN_VAL_SHIFT)
89
90#define PIN_SLPM_PULL_SHIFT 16
91#define PIN_SLPM_PULL_MASK (0x7 << PIN_SLPM_PULL_SHIFT)
92#define PIN_SLPM_PULL(x) \
93 (((x) & PIN_SLPM_PULL_MASK) >> PIN_SLPM_PULL_SHIFT)
94#define PIN_SLPM_PULL_NONE \
95 ((1 + NMK_GPIO_PULL_NONE) << PIN_SLPM_PULL_SHIFT)
96#define PIN_SLPM_PULL_UP \
97 ((1 + NMK_GPIO_PULL_UP) << PIN_SLPM_PULL_SHIFT)
98#define PIN_SLPM_PULL_DOWN \
99 ((1 + NMK_GPIO_PULL_DOWN) << PIN_SLPM_PULL_SHIFT)
100
101#define PIN_SLPM_DIR_SHIFT 19
102#define PIN_SLPM_DIR_MASK (0x3 << PIN_SLPM_DIR_SHIFT)
103#define PIN_SLPM_DIR(x) \
104 (((x) & PIN_SLPM_DIR_MASK) >> PIN_SLPM_DIR_SHIFT)
105#define PIN_SLPM_DIR_INPUT ((1 + 0) << PIN_SLPM_DIR_SHIFT)
106#define PIN_SLPM_DIR_OUTPUT ((1 + 1) << PIN_SLPM_DIR_SHIFT)
107
108#define PIN_SLPM_VAL_SHIFT 21
109#define PIN_SLPM_VAL_MASK (0x3 << PIN_SLPM_VAL_SHIFT)
110#define PIN_SLPM_VAL(x) \
111 (((x) & PIN_SLPM_VAL_MASK) >> PIN_SLPM_VAL_SHIFT)
112#define PIN_SLPM_VAL_LOW ((1 + 0) << PIN_SLPM_VAL_SHIFT)
113#define PIN_SLPM_VAL_HIGH ((1 + 1) << PIN_SLPM_VAL_SHIFT)
114
115#define PIN_SLPM_PDIS_SHIFT 23
116#define PIN_SLPM_PDIS_MASK (0x3 << PIN_SLPM_PDIS_SHIFT)
117#define PIN_SLPM_PDIS(x) \
118 (((x) & PIN_SLPM_PDIS_MASK) >> PIN_SLPM_PDIS_SHIFT)
119#define PIN_SLPM_PDIS_NO_CHANGE (0 << PIN_SLPM_PDIS_SHIFT)
120#define PIN_SLPM_PDIS_DISABLED (1 << PIN_SLPM_PDIS_SHIFT)
121#define PIN_SLPM_PDIS_ENABLED (2 << PIN_SLPM_PDIS_SHIFT)
122
123#define PIN_LOWEMI_SHIFT 25
124#define PIN_LOWEMI_MASK (0x1 << PIN_LOWEMI_SHIFT)
125#define PIN_LOWEMI(x) (((x) & PIN_LOWEMI_MASK) >> PIN_LOWEMI_SHIFT)
126#define PIN_LOWEMI_DISABLED (0 << PIN_LOWEMI_SHIFT)
127#define PIN_LOWEMI_ENABLED (1 << PIN_LOWEMI_SHIFT)
128
129#define PIN_GPIOMODE_SHIFT 26
130#define PIN_GPIOMODE_MASK (0x1 << PIN_GPIOMODE_SHIFT)
131#define PIN_GPIOMODE(x) (((x) & PIN_GPIOMODE_MASK) >> PIN_GPIOMODE_SHIFT)
132#define PIN_GPIOMODE_DISABLED (0 << PIN_GPIOMODE_SHIFT)
133#define PIN_GPIOMODE_ENABLED (1 << PIN_GPIOMODE_SHIFT)
134
135#define PIN_SLEEPMODE_SHIFT 27
136#define PIN_SLEEPMODE_MASK (0x1 << PIN_SLEEPMODE_SHIFT)
137#define PIN_SLEEPMODE(x) (((x) & PIN_SLEEPMODE_MASK) >> PIN_SLEEPMODE_SHIFT)
138#define PIN_SLEEPMODE_DISABLED (0 << PIN_SLEEPMODE_SHIFT)
139#define PIN_SLEEPMODE_ENABLED (1 << PIN_SLEEPMODE_SHIFT)
140
141
142/* Shortcuts. Use these instead of separate DIR, PULL, and VAL. */
143#define PIN_INPUT_PULLDOWN (PIN_DIR_INPUT | PIN_PULL_DOWN)
144#define PIN_INPUT_PULLUP (PIN_DIR_INPUT | PIN_PULL_UP)
145#define PIN_INPUT_NOPULL (PIN_DIR_INPUT | PIN_PULL_NONE)
146#define PIN_OUTPUT_LOW (PIN_DIR_OUTPUT | PIN_VAL_LOW)
147#define PIN_OUTPUT_HIGH (PIN_DIR_OUTPUT | PIN_VAL_HIGH)
148
149#define PIN_SLPM_INPUT_PULLDOWN (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_DOWN)
150#define PIN_SLPM_INPUT_PULLUP (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_UP)
151#define PIN_SLPM_INPUT_NOPULL (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_NONE)
152#define PIN_SLPM_OUTPUT_LOW (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_LOW)
153#define PIN_SLPM_OUTPUT_HIGH (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_HIGH)
154
155#define PIN_CFG_DEFAULT (0)
156
157#define PIN_CFG(num, alt) \
158 (PIN_CFG_DEFAULT |\
159 (PIN_NUM(num) | PIN_##alt))
160
161#define PIN_CFG_INPUT(num, alt, pull) \
162 (PIN_CFG_DEFAULT |\
163 (PIN_NUM(num) | PIN_##alt | PIN_INPUT_##pull))
164
165#define PIN_CFG_OUTPUT(num, alt, val) \
166 (PIN_CFG_DEFAULT |\
167 (PIN_NUM(num) | PIN_##alt | PIN_OUTPUT_##val))
168
169extern int nmk_config_pin(pin_cfg_t cfg, bool sleep);
170extern int nmk_config_pins(pin_cfg_t *cfgs, int num);
171extern int nmk_config_pins_sleep(pin_cfg_t *cfgs, int num);
172
173#endif
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index a5683a84c6ee..6013831a043e 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -26,12 +26,14 @@
26#include <linux/kernel.h> 26#include <linux/kernel.h>
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/i2c.h> 28#include <linux/i2c.h>
29#include <linux/i2c-omap.h>
29#include <linux/slab.h> 30#include <linux/slab.h>
30#include <linux/err.h> 31#include <linux/err.h>
31#include <linux/clk.h> 32#include <linux/clk.h>
32 33
33#include <mach/irqs.h> 34#include <mach/irqs.h>
34#include <plat/i2c.h> 35#include <plat/i2c.h>
36#include <plat/omap-pm.h>
35#include <plat/omap_device.h> 37#include <plat/omap_device.h>
36 38
37#define OMAP_I2C_SIZE 0x3f 39#define OMAP_I2C_SIZE 0x3f
@@ -127,6 +129,16 @@ static inline int omap1_i2c_add_bus(int bus_id)
127 129
128 130
129#ifdef CONFIG_ARCH_OMAP2PLUS 131#ifdef CONFIG_ARCH_OMAP2PLUS
132/*
133 * XXX This function is a temporary compatibility wrapper - only
134 * needed until the I2C driver can be converted to call
135 * omap_pm_set_max_dev_wakeup_lat() and handle a return code.
136 */
137static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
138{
139 omap_pm_set_max_mpu_wakeup_lat(dev, t);
140}
141
130static inline int omap2_i2c_add_bus(int bus_id) 142static inline int omap2_i2c_add_bus(int bus_id)
131{ 143{
132 int l; 144 int l;
@@ -158,6 +170,15 @@ static inline int omap2_i2c_add_bus(int bus_id)
158 dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr; 170 dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
159 pdata->flags = dev_attr->flags; 171 pdata->flags = dev_attr->flags;
160 172
173 /*
174 * When waiting for completion of a i2c transfer, we need to
175 * set a wake up latency constraint for the MPU. This is to
176 * ensure quick enough wakeup from idle, when transfer
177 * completes.
178 * Only omap3 has support for constraints
179 */
180 if (cpu_is_omap34xx())
181 pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
161 pdev = omap_device_build(name, bus_id, oh, pdata, 182 pdev = omap_device_build(name, bus_id, oh, pdata,
162 sizeof(struct omap_i2c_bus_platform_data), 183 sizeof(struct omap_i2c_bus_platform_data),
163 NULL, 0, 0); 184 NULL, 0, 0);
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h
index 8b4e4f2da2f5..346af5b490be 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/arch/arm/plat-omap/include/plat/mmc.h
@@ -126,6 +126,7 @@ struct omap_mmc_platform_data {
126 /* we can put the features above into this variable */ 126 /* we can put the features above into this variable */
127#define HSMMC_HAS_PBIAS (1 << 0) 127#define HSMMC_HAS_PBIAS (1 << 0)
128#define HSMMC_HAS_UPDATED_RESET (1 << 1) 128#define HSMMC_HAS_UPDATED_RESET (1 << 1)
129#define HSMMC_HAS_HSPE_SUPPORT (1 << 2)
129 unsigned features; 130 unsigned features;
130 131
131 int switch_pin; /* gpio (card detect) */ 132 int switch_pin; /* gpio (card detect) */
diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h
index 1957a8516e93..ff9b0aab5281 100644
--- a/arch/arm/plat-omap/include/plat/omap-serial.h
+++ b/arch/arm/plat-omap/include/plat/omap-serial.h
@@ -30,35 +30,6 @@
30 */ 30 */
31#define OMAP_SERIAL_NAME "ttyO" 31#define OMAP_SERIAL_NAME "ttyO"
32 32
33#define OMAP_MODE13X_SPEED 230400
34
35#define OMAP_UART_SCR_TX_EMPTY 0x08
36
37/* WER = 0x7F
38 * Enable module level wakeup in WER reg
39 */
40#define OMAP_UART_WER_MOD_WKUP 0X7F
41
42/* Enable XON/XOFF flow control on output */
43#define OMAP_UART_SW_TX 0x04
44
45/* Enable XON/XOFF flow control on input */
46#define OMAP_UART_SW_RX 0x04
47
48#define OMAP_UART_SYSC_RESET 0X07
49#define OMAP_UART_TCR_TRIG 0X0F
50#define OMAP_UART_SW_CLR 0XF0
51#define OMAP_UART_FIFO_CLR 0X06
52
53#define OMAP_UART_DMA_CH_FREE -1
54
55#define OMAP_MAX_HSUART_PORTS 6
56
57#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
58
59#define UART_ERRATA_i202_MDR1_ACCESS BIT(0)
60#define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1)
61
62struct omap_uart_port_info { 33struct omap_uart_port_info {
63 bool dma_enabled; /* To specify DMA Mode */ 34 bool dma_enabled; /* To specify DMA Mode */
64 unsigned int uartclk; /* UART clock rate */ 35 unsigned int uartclk; /* UART clock rate */
@@ -77,30 +48,4 @@ struct omap_uart_port_info {
77 void (*enable_wakeup)(struct device *, bool); 48 void (*enable_wakeup)(struct device *, bool);
78}; 49};
79 50
80struct uart_omap_dma {
81 u8 uart_dma_tx;
82 u8 uart_dma_rx;
83 int rx_dma_channel;
84 int tx_dma_channel;
85 dma_addr_t rx_buf_dma_phys;
86 dma_addr_t tx_buf_dma_phys;
87 unsigned int uart_base;
88 /*
89 * Buffer for rx dma.It is not required for tx because the buffer
90 * comes from port structure.
91 */
92 unsigned char *rx_buf;
93 unsigned int prev_rx_dma_pos;
94 int tx_buf_size;
95 int tx_dma_used;
96 int rx_dma_used;
97 spinlock_t tx_lock;
98 spinlock_t rx_lock;
99 /* timer to poll activity on rx dma */
100 struct timer_list rx_timer;
101 unsigned int rx_buf_size;
102 unsigned int rx_poll_rate;
103 unsigned int rx_timeout;
104};
105
106#endif /* __OMAP_SERIAL_H__ */ 51#endif /* __OMAP_SERIAL_H__ */
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index b3349f7b1a2c..1db029438022 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -443,6 +443,11 @@ struct omap_hwmod_omap4_prcm {
443 * in order to complete the reset. Optional clocks will be disabled 443 * in order to complete the reset. Optional clocks will be disabled
444 * again after the reset. 444 * again after the reset.
445 * HWMOD_16BIT_REG: Module has 16bit registers 445 * HWMOD_16BIT_REG: Module has 16bit registers
446 * HWMOD_EXT_OPT_MAIN_CLK: The only main functional clock source for
447 * this IP block comes from an off-chip source and is not always
448 * enabled. This prevents the hwmod code from being able to
449 * enable and reset the IP block early. XXX Eventually it should
450 * be possible to query the clock framework for this information.
446 */ 451 */
447#define HWMOD_SWSUP_SIDLE (1 << 0) 452#define HWMOD_SWSUP_SIDLE (1 << 0)
448#define HWMOD_SWSUP_MSTANDBY (1 << 1) 453#define HWMOD_SWSUP_MSTANDBY (1 << 1)
@@ -453,6 +458,7 @@ struct omap_hwmod_omap4_prcm {
453#define HWMOD_NO_IDLEST (1 << 6) 458#define HWMOD_NO_IDLEST (1 << 6)
454#define HWMOD_CONTROL_OPT_CLKS_IN_RESET (1 << 7) 459#define HWMOD_CONTROL_OPT_CLKS_IN_RESET (1 << 7)
455#define HWMOD_16BIT_REG (1 << 8) 460#define HWMOD_16BIT_REG (1 << 8)
461#define HWMOD_EXT_OPT_MAIN_CLK (1 << 9)
456 462
457/* 463/*
458 * omap_hwmod._int_flags definitions 464 * omap_hwmod._int_flags definitions
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h
index 65fce44dce34..b780470d03ea 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/plat-omap/include/plat/serial.h
@@ -109,15 +109,6 @@
109#define OMAP5UART4 OMAP4UART4 109#define OMAP5UART4 OMAP4UART4
110#define ZOOM_UART 95 /* Only on zoom2/3 */ 110#define ZOOM_UART 95 /* Only on zoom2/3 */
111 111
112/* This is only used by 8250.c for omap1510 */
113#define is_omap_port(pt) ({int __ret = 0; \
114 if ((pt)->port.mapbase == OMAP1_UART1_BASE || \
115 (pt)->port.mapbase == OMAP1_UART2_BASE || \
116 (pt)->port.mapbase == OMAP1_UART3_BASE) \
117 __ret = 1; \
118 __ret; \
119 })
120
121#ifndef __ASSEMBLER__ 112#ifndef __ASSEMBLER__
122 113
123struct omap_board_data; 114struct omap_board_data;
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index db98e7021f0d..0abd1c469887 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -473,12 +473,13 @@ int s3c2410_dma_enqueue(enum dma_ch channel, void *id,
473 pr_debug("dma%d: %s: buffer %p queued onto non-empty channel\n", 473 pr_debug("dma%d: %s: buffer %p queued onto non-empty channel\n",
474 chan->number, __func__, buf); 474 chan->number, __func__, buf);
475 475
476 if (chan->end == NULL) 476 if (chan->end == NULL) {
477 pr_debug("dma%d: %s: %p not empty, and chan->end==NULL?\n", 477 pr_debug("dma%d: %s: %p not empty, and chan->end==NULL?\n",
478 chan->number, __func__, chan); 478 chan->number, __func__, chan);
479 479 } else {
480 chan->end->next = buf; 480 chan->end->next = buf;
481 chan->end = buf; 481 chan->end = buf;
482 }
482 } 483 }
483 484
484 /* if necessary, update the next buffer field */ 485 /* if necessary, update the next buffer field */
diff --git a/arch/arm/plat-spear/Kconfig b/arch/arm/plat-spear/Kconfig
index f8db7b2deb36..87dbd81bdf51 100644
--- a/arch/arm/plat-spear/Kconfig
+++ b/arch/arm/plat-spear/Kconfig
@@ -12,6 +12,7 @@ config ARCH_SPEAR13XX
12 bool "ST SPEAr13xx with Device Tree" 12 bool "ST SPEAr13xx with Device Tree"
13 select ARM_GIC 13 select ARM_GIC
14 select CPU_V7 14 select CPU_V7
15 select GPIO_SPEAR_SPICS
15 select HAVE_SMP 16 select HAVE_SMP
16 select MIGHT_HAVE_CACHE_L2X0 17 select MIGHT_HAVE_CACHE_L2X0
17 select PINCTRL 18 select PINCTRL
diff --git a/arch/arm/tools/Makefile b/arch/arm/tools/Makefile
index cd60a81163e9..32d05c8219dc 100644
--- a/arch/arm/tools/Makefile
+++ b/arch/arm/tools/Makefile
@@ -5,6 +5,6 @@
5# 5#
6 6
7include/generated/mach-types.h: $(src)/gen-mach-types $(src)/mach-types 7include/generated/mach-types.h: $(src)/gen-mach-types $(src)/mach-types
8 $(kecho) ' Generating $@' 8 @$(kecho) ' Generating $@'
9 @mkdir -p $(dir $@) 9 @mkdir -p $(dir $@)
10 $(Q)$(AWK) -f $^ > $@ || { rm -f $@; /bin/false; } 10 $(Q)$(AWK) -f $^ > $@ || { rm -f $@; /bin/false; }
diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile
index 364191f3be43..c95c5cb212fd 100644
--- a/arch/arm64/Makefile
+++ b/arch/arm64/Makefile
@@ -41,20 +41,24 @@ libs-y := arch/arm64/lib/ $(libs-y)
41libs-y += $(LIBGCC) 41libs-y += $(LIBGCC)
42 42
43# Default target when executing plain make 43# Default target when executing plain make
44KBUILD_IMAGE := Image.gz 44KBUILD_IMAGE := Image.gz
45KBUILD_DTBS := dtbs
45 46
46all: $(KBUILD_IMAGE) 47all: $(KBUILD_IMAGE) $(KBUILD_DTBS)
47 48
48boot := arch/arm64/boot 49boot := arch/arm64/boot
49 50
50Image Image.gz: vmlinux 51Image Image.gz: vmlinux
51 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@ 52 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
52 53
53zinstall install: vmlinux 54zinstall install: vmlinux
54 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@ 55 $(Q)$(MAKE) $(build)=$(boot) $@
55 56
56%.dtb: 57%.dtb: scripts
57 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@ 58 $(Q)$(MAKE) $(build)=$(boot)/dts $(boot)/dts/$@
59
60dtbs: scripts
61 $(Q)$(MAKE) $(build)=$(boot)/dts dtbs
58 62
59# We use MRPROPER_FILES and CLEAN_FILES now 63# We use MRPROPER_FILES and CLEAN_FILES now
60archclean: 64archclean:
@@ -63,6 +67,7 @@ archclean:
63define archhelp 67define archhelp
64 echo '* Image.gz - Compressed kernel image (arch/$(ARCH)/boot/Image.gz)' 68 echo '* Image.gz - Compressed kernel image (arch/$(ARCH)/boot/Image.gz)'
65 echo ' Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)' 69 echo ' Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)'
70 echo '* dtbs - Build device tree blobs for enabled boards'
66 echo ' install - Install uncompressed kernel' 71 echo ' install - Install uncompressed kernel'
67 echo ' zinstall - Install compressed kernel' 72 echo ' zinstall - Install compressed kernel'
68 echo ' Install using (your) ~/bin/installkernel or' 73 echo ' Install using (your) ~/bin/installkernel or'
diff --git a/arch/arm64/boot/Makefile b/arch/arm64/boot/Makefile
index eca209b2b0bf..5a0e3ab854a5 100644
--- a/arch/arm64/boot/Makefile
+++ b/arch/arm64/boot/Makefile
@@ -22,9 +22,6 @@ $(obj)/Image: vmlinux FORCE
22$(obj)/Image.gz: $(obj)/Image FORCE 22$(obj)/Image.gz: $(obj)/Image FORCE
23 $(call if_changed,gzip) 23 $(call if_changed,gzip)
24 24
25$(obj)/%.dtb: $(src)/dts/%.dts
26 $(call cmd,dtc)
27
28install: $(obj)/Image 25install: $(obj)/Image
29 $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \ 26 $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
30 $(obj)/Image System.map "$(INSTALL_PATH)" 27 $(obj)/Image System.map "$(INSTALL_PATH)"
@@ -32,5 +29,3 @@ install: $(obj)/Image
32zinstall: $(obj)/Image.gz 29zinstall: $(obj)/Image.gz
33 $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \ 30 $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
34 $(obj)/Image.gz System.map "$(INSTALL_PATH)" 31 $(obj)/Image.gz System.map "$(INSTALL_PATH)"
35
36clean-files += *.dtb
diff --git a/arch/arm64/boot/dts/.gitignore b/arch/arm64/boot/dts/.gitignore
new file mode 100644
index 000000000000..b60ed208c779
--- /dev/null
+++ b/arch/arm64/boot/dts/.gitignore
@@ -0,0 +1 @@
*.dtb
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
new file mode 100644
index 000000000000..801e2d7fcbc6
--- /dev/null
+++ b/arch/arm64/boot/dts/Makefile
@@ -0,0 +1,5 @@
1targets += dtbs
2
3dtbs: $(addprefix $(obj)/, $(dtb-y))
4
5clean-files := *.dtb
diff --git a/arch/arm64/include/asm/Kbuild b/arch/arm64/include/asm/Kbuild
index 3c24f4ea3339..14a9d5a2b85b 100644
--- a/arch/arm64/include/asm/Kbuild
+++ b/arch/arm64/include/asm/Kbuild
@@ -44,6 +44,7 @@ generic-y += swab.h
44generic-y += termbits.h 44generic-y += termbits.h
45generic-y += termios.h 45generic-y += termios.h
46generic-y += topology.h 46generic-y += topology.h
47generic-y += trace_clock.h
47generic-y += types.h 48generic-y += types.h
48generic-y += unaligned.h 49generic-y += unaligned.h
49generic-y += user.h 50generic-y += user.h
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index 54f6116697f7..d2f05a608274 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h
@@ -222,7 +222,7 @@ extern void __iomem *__ioremap(phys_addr_t phys_addr, size_t size, pgprot_t prot
222extern void __iounmap(volatile void __iomem *addr); 222extern void __iounmap(volatile void __iomem *addr);
223 223
224#define PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_DIRTY) 224#define PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_DIRTY)
225#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_XN | PTE_ATTRINDX(MT_DEVICE_nGnRE)) 225#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRE))
226#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL_NC)) 226#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL_NC))
227 227
228#define ioremap(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE)) 228#define ioremap(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h
index 0f3b4581d925..75fd13d289b9 100644
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -38,7 +38,8 @@
38#define PMD_SECT_S (_AT(pmdval_t, 3) << 8) 38#define PMD_SECT_S (_AT(pmdval_t, 3) << 8)
39#define PMD_SECT_AF (_AT(pmdval_t, 1) << 10) 39#define PMD_SECT_AF (_AT(pmdval_t, 1) << 10)
40#define PMD_SECT_NG (_AT(pmdval_t, 1) << 11) 40#define PMD_SECT_NG (_AT(pmdval_t, 1) << 11)
41#define PMD_SECT_XN (_AT(pmdval_t, 1) << 54) 41#define PMD_SECT_PXN (_AT(pmdval_t, 1) << 53)
42#define PMD_SECT_UXN (_AT(pmdval_t, 1) << 54)
42 43
43/* 44/*
44 * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers). 45 * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).
@@ -57,7 +58,8 @@
57#define PTE_SHARED (_AT(pteval_t, 3) << 8) /* SH[1:0], inner shareable */ 58#define PTE_SHARED (_AT(pteval_t, 3) << 8) /* SH[1:0], inner shareable */
58#define PTE_AF (_AT(pteval_t, 1) << 10) /* Access Flag */ 59#define PTE_AF (_AT(pteval_t, 1) << 10) /* Access Flag */
59#define PTE_NG (_AT(pteval_t, 1) << 11) /* nG */ 60#define PTE_NG (_AT(pteval_t, 1) << 11) /* nG */
60#define PTE_XN (_AT(pteval_t, 1) << 54) /* XN */ 61#define PTE_PXN (_AT(pteval_t, 1) << 53) /* Privileged XN */
62#define PTE_UXN (_AT(pteval_t, 1) << 54) /* User XN */
61 63
62/* 64/*
63 * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers). 65 * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index 937ae2064682..64b133949502 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -62,23 +62,23 @@ extern pgprot_t pgprot_default;
62 62
63#define _MOD_PROT(p, b) __pgprot(pgprot_val(p) | (b)) 63#define _MOD_PROT(p, b) __pgprot(pgprot_val(p) | (b))
64 64
65#define PAGE_NONE _MOD_PROT(pgprot_default, PTE_NG | PTE_XN | PTE_RDONLY) 65#define PAGE_NONE _MOD_PROT(pgprot_default, PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
66#define PAGE_SHARED _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_XN) 66#define PAGE_SHARED _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
67#define PAGE_SHARED_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG) 67#define PAGE_SHARED_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN)
68#define PAGE_COPY _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY) 68#define PAGE_COPY _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
69#define PAGE_COPY_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_RDONLY) 69#define PAGE_COPY_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
70#define PAGE_READONLY _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY) 70#define PAGE_READONLY _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
71#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_RDONLY) 71#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
72#define PAGE_KERNEL _MOD_PROT(pgprot_default, PTE_XN | PTE_DIRTY) 72#define PAGE_KERNEL _MOD_PROT(pgprot_default, PTE_PXN | PTE_UXN | PTE_DIRTY)
73#define PAGE_KERNEL_EXEC _MOD_PROT(pgprot_default, PTE_DIRTY) 73#define PAGE_KERNEL_EXEC _MOD_PROT(pgprot_default, PTE_UXN | PTE_DIRTY)
74 74
75#define __PAGE_NONE __pgprot(_PAGE_DEFAULT | PTE_NG | PTE_XN | PTE_RDONLY) 75#define __PAGE_NONE __pgprot(_PAGE_DEFAULT | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
76#define __PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_XN) 76#define __PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
77#define __PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG) 77#define __PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN)
78#define __PAGE_COPY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY) 78#define __PAGE_COPY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
79#define __PAGE_COPY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_RDONLY) 79#define __PAGE_COPY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
80#define __PAGE_READONLY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY) 80#define __PAGE_READONLY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
81#define __PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_RDONLY) 81#define __PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
82 82
83#endif /* __ASSEMBLY__ */ 83#endif /* __ASSEMBLY__ */
84 84
@@ -130,10 +130,10 @@ extern struct page *empty_zero_page;
130#define pte_young(pte) (pte_val(pte) & PTE_AF) 130#define pte_young(pte) (pte_val(pte) & PTE_AF)
131#define pte_special(pte) (pte_val(pte) & PTE_SPECIAL) 131#define pte_special(pte) (pte_val(pte) & PTE_SPECIAL)
132#define pte_write(pte) (!(pte_val(pte) & PTE_RDONLY)) 132#define pte_write(pte) (!(pte_val(pte) & PTE_RDONLY))
133#define pte_exec(pte) (!(pte_val(pte) & PTE_XN)) 133#define pte_exec(pte) (!(pte_val(pte) & PTE_UXN))
134 134
135#define pte_present_exec_user(pte) \ 135#define pte_present_exec_user(pte) \
136 ((pte_val(pte) & (PTE_VALID | PTE_USER | PTE_XN)) == \ 136 ((pte_val(pte) & (PTE_VALID | PTE_USER | PTE_UXN)) == \
137 (PTE_VALID | PTE_USER)) 137 (PTE_VALID | PTE_USER))
138 138
139#define PTE_BIT_FUNC(fn,op) \ 139#define PTE_BIT_FUNC(fn,op) \
@@ -264,7 +264,7 @@ static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
264 264
265static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 265static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
266{ 266{
267 const pteval_t mask = PTE_USER | PTE_XN | PTE_RDONLY; 267 const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY;
268 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask); 268 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
269 return pte; 269 return pte;
270} 270}
diff --git a/arch/arm64/include/asm/unistd32.h b/arch/arm64/include/asm/unistd32.h
index e067f9d7d21a..50104e8ce55d 100644
--- a/arch/arm64/include/asm/unistd32.h
+++ b/arch/arm64/include/asm/unistd32.h
@@ -392,7 +392,7 @@ __SYSCALL(367, sys_fanotify_init)
392__SYSCALL(368, compat_sys_fanotify_mark_wrapper) 392__SYSCALL(368, compat_sys_fanotify_mark_wrapper)
393__SYSCALL(369, sys_prlimit64) 393__SYSCALL(369, sys_prlimit64)
394__SYSCALL(370, sys_name_to_handle_at) 394__SYSCALL(370, sys_name_to_handle_at)
395__SYSCALL(371, sys_open_by_handle_at) 395__SYSCALL(371, compat_sys_open_by_handle_at)
396__SYSCALL(372, compat_sys_clock_adjtime) 396__SYSCALL(372, compat_sys_clock_adjtime)
397__SYSCALL(373, sys_syncfs) 397__SYSCALL(373, sys_syncfs)
398 398
diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
index 06e73bf665e9..c2bbc9a72222 100644
--- a/arch/avr32/Kconfig
+++ b/arch/avr32/Kconfig
@@ -193,9 +193,6 @@ source "kernel/Kconfig.preempt"
193config QUICKLIST 193config QUICKLIST
194 def_bool y 194 def_bool y
195 195
196config HAVE_ARCH_BOOTMEM
197 def_bool n
198
199config ARCH_HAVE_MEMORY_PRESENT 196config ARCH_HAVE_MEMORY_PRESENT
200 def_bool n 197 def_bool n
201 198
diff --git a/arch/avr32/configs/atngw100_defconfig b/arch/avr32/configs/atngw100_defconfig
index a06bfccc2840..f4025db184ff 100644
--- a/arch/avr32/configs/atngw100_defconfig
+++ b/arch/avr32/configs/atngw100_defconfig
@@ -109,7 +109,7 @@ CONFIG_USB_GADGET_VBUS_DRAW=350
109CONFIG_USB_ZERO=m 109CONFIG_USB_ZERO=m
110CONFIG_USB_ETH=m 110CONFIG_USB_ETH=m
111CONFIG_USB_GADGETFS=m 111CONFIG_USB_GADGETFS=m
112CONFIG_USB_FILE_STORAGE=m 112CONFIG_USB_MASS_STORAGE=m
113CONFIG_USB_G_SERIAL=m 113CONFIG_USB_G_SERIAL=m
114CONFIG_USB_CDC_COMPOSITE=m 114CONFIG_USB_CDC_COMPOSITE=m
115CONFIG_MMC=y 115CONFIG_MMC=y
diff --git a/arch/avr32/configs/atngw100_evklcd100_defconfig b/arch/avr32/configs/atngw100_evklcd100_defconfig
index d8f1fe80d210..c76a49b9e9d0 100644
--- a/arch/avr32/configs/atngw100_evklcd100_defconfig
+++ b/arch/avr32/configs/atngw100_evklcd100_defconfig
@@ -125,7 +125,7 @@ CONFIG_USB_GADGET_VBUS_DRAW=350
125CONFIG_USB_ZERO=m 125CONFIG_USB_ZERO=m
126CONFIG_USB_ETH=m 126CONFIG_USB_ETH=m
127CONFIG_USB_GADGETFS=m 127CONFIG_USB_GADGETFS=m
128CONFIG_USB_FILE_STORAGE=m 128CONFIG_USB_MASS_STORAGE=m
129CONFIG_USB_G_SERIAL=m 129CONFIG_USB_G_SERIAL=m
130CONFIG_USB_CDC_COMPOSITE=m 130CONFIG_USB_CDC_COMPOSITE=m
131CONFIG_MMC=y 131CONFIG_MMC=y
diff --git a/arch/avr32/configs/atngw100_evklcd101_defconfig b/arch/avr32/configs/atngw100_evklcd101_defconfig
index d4c5b19ec950..2d8ab089a64e 100644
--- a/arch/avr32/configs/atngw100_evklcd101_defconfig
+++ b/arch/avr32/configs/atngw100_evklcd101_defconfig
@@ -124,7 +124,7 @@ CONFIG_USB_GADGET_VBUS_DRAW=350
124CONFIG_USB_ZERO=m 124CONFIG_USB_ZERO=m
125CONFIG_USB_ETH=m 125CONFIG_USB_ETH=m
126CONFIG_USB_GADGETFS=m 126CONFIG_USB_GADGETFS=m
127CONFIG_USB_FILE_STORAGE=m 127CONFIG_USB_MASS_STORAGE=m
128CONFIG_USB_G_SERIAL=m 128CONFIG_USB_G_SERIAL=m
129CONFIG_USB_CDC_COMPOSITE=m 129CONFIG_USB_CDC_COMPOSITE=m
130CONFIG_MMC=y 130CONFIG_MMC=y
diff --git a/arch/avr32/configs/atngw100_mrmt_defconfig b/arch/avr32/configs/atngw100_mrmt_defconfig
index 77ca4f905d2c..b189e0cab04b 100644
--- a/arch/avr32/configs/atngw100_mrmt_defconfig
+++ b/arch/avr32/configs/atngw100_mrmt_defconfig
@@ -99,7 +99,7 @@ CONFIG_SND_ATMEL_AC97C=m
99# CONFIG_SND_SPI is not set 99# CONFIG_SND_SPI is not set
100CONFIG_USB_GADGET=m 100CONFIG_USB_GADGET=m
101CONFIG_USB_GADGET_DEBUG_FILES=y 101CONFIG_USB_GADGET_DEBUG_FILES=y
102CONFIG_USB_FILE_STORAGE=m 102CONFIG_USB_MASS_STORAGE=m
103CONFIG_USB_G_SERIAL=m 103CONFIG_USB_G_SERIAL=m
104CONFIG_MMC=y 104CONFIG_MMC=y
105CONFIG_MMC_ATMELMCI=y 105CONFIG_MMC_ATMELMCI=y
diff --git a/arch/avr32/configs/atngw100mkii_defconfig b/arch/avr32/configs/atngw100mkii_defconfig
index 6e0dca4d3131..2e4de42a53c4 100644
--- a/arch/avr32/configs/atngw100mkii_defconfig
+++ b/arch/avr32/configs/atngw100mkii_defconfig
@@ -111,7 +111,7 @@ CONFIG_USB_GADGET_VBUS_DRAW=350
111CONFIG_USB_ZERO=m 111CONFIG_USB_ZERO=m
112CONFIG_USB_ETH=m 112CONFIG_USB_ETH=m
113CONFIG_USB_GADGETFS=m 113CONFIG_USB_GADGETFS=m
114CONFIG_USB_FILE_STORAGE=m 114CONFIG_USB_MASS_STORAGE=m
115CONFIG_USB_G_SERIAL=m 115CONFIG_USB_G_SERIAL=m
116CONFIG_USB_CDC_COMPOSITE=m 116CONFIG_USB_CDC_COMPOSITE=m
117CONFIG_MMC=y 117CONFIG_MMC=y
diff --git a/arch/avr32/configs/atngw100mkii_evklcd100_defconfig b/arch/avr32/configs/atngw100mkii_evklcd100_defconfig
index 7f2a344a5fa8..fad3cd22dfd3 100644
--- a/arch/avr32/configs/atngw100mkii_evklcd100_defconfig
+++ b/arch/avr32/configs/atngw100mkii_evklcd100_defconfig
@@ -128,7 +128,7 @@ CONFIG_USB_GADGET_VBUS_DRAW=350
128CONFIG_USB_ZERO=m 128CONFIG_USB_ZERO=m
129CONFIG_USB_ETH=m 129CONFIG_USB_ETH=m
130CONFIG_USB_GADGETFS=m 130CONFIG_USB_GADGETFS=m
131CONFIG_USB_FILE_STORAGE=m 131CONFIG_USB_MASS_STORAGE=m
132CONFIG_USB_G_SERIAL=m 132CONFIG_USB_G_SERIAL=m
133CONFIG_USB_CDC_COMPOSITE=m 133CONFIG_USB_CDC_COMPOSITE=m
134CONFIG_MMC=y 134CONFIG_MMC=y
diff --git a/arch/avr32/configs/atngw100mkii_evklcd101_defconfig b/arch/avr32/configs/atngw100mkii_evklcd101_defconfig
index 085eeba88f67..29986230aaa5 100644
--- a/arch/avr32/configs/atngw100mkii_evklcd101_defconfig
+++ b/arch/avr32/configs/atngw100mkii_evklcd101_defconfig
@@ -127,7 +127,7 @@ CONFIG_USB_GADGET_VBUS_DRAW=350
127CONFIG_USB_ZERO=m 127CONFIG_USB_ZERO=m
128CONFIG_USB_ETH=m 128CONFIG_USB_ETH=m
129CONFIG_USB_GADGETFS=m 129CONFIG_USB_GADGETFS=m
130CONFIG_USB_FILE_STORAGE=m 130CONFIG_USB_MASS_STORAGE=m
131CONFIG_USB_G_SERIAL=m 131CONFIG_USB_G_SERIAL=m
132CONFIG_USB_CDC_COMPOSITE=m 132CONFIG_USB_CDC_COMPOSITE=m
133CONFIG_MMC=y 133CONFIG_MMC=y
diff --git a/arch/avr32/configs/atstk1002_defconfig b/arch/avr32/configs/atstk1002_defconfig
index d1a887e64055..a582465e1cef 100644
--- a/arch/avr32/configs/atstk1002_defconfig
+++ b/arch/avr32/configs/atstk1002_defconfig
@@ -126,7 +126,7 @@ CONFIG_USB_GADGET=y
126CONFIG_USB_ZERO=m 126CONFIG_USB_ZERO=m
127CONFIG_USB_ETH=m 127CONFIG_USB_ETH=m
128CONFIG_USB_GADGETFS=m 128CONFIG_USB_GADGETFS=m
129CONFIG_USB_FILE_STORAGE=m 129CONFIG_USB_MASS_STORAGE=m
130CONFIG_USB_G_SERIAL=m 130CONFIG_USB_G_SERIAL=m
131CONFIG_USB_CDC_COMPOSITE=m 131CONFIG_USB_CDC_COMPOSITE=m
132CONFIG_MMC=y 132CONFIG_MMC=y
diff --git a/arch/avr32/configs/atstk1003_defconfig b/arch/avr32/configs/atstk1003_defconfig
index 956f2819ad45..57a79df2ce5d 100644
--- a/arch/avr32/configs/atstk1003_defconfig
+++ b/arch/avr32/configs/atstk1003_defconfig
@@ -105,7 +105,7 @@ CONFIG_USB_GADGET=y
105CONFIG_USB_ZERO=m 105CONFIG_USB_ZERO=m
106CONFIG_USB_ETH=m 106CONFIG_USB_ETH=m
107CONFIG_USB_GADGETFS=m 107CONFIG_USB_GADGETFS=m
108CONFIG_USB_FILE_STORAGE=m 108CONFIG_USB_MASS_STORAGE=m
109CONFIG_USB_G_SERIAL=m 109CONFIG_USB_G_SERIAL=m
110CONFIG_USB_CDC_COMPOSITE=m 110CONFIG_USB_CDC_COMPOSITE=m
111CONFIG_MMC=y 111CONFIG_MMC=y
diff --git a/arch/avr32/configs/atstk1004_defconfig b/arch/avr32/configs/atstk1004_defconfig
index 40c69f38c61a..1a49bd8c6340 100644
--- a/arch/avr32/configs/atstk1004_defconfig
+++ b/arch/avr32/configs/atstk1004_defconfig
@@ -104,7 +104,7 @@ CONFIG_USB_GADGET=y
104CONFIG_USB_ZERO=m 104CONFIG_USB_ZERO=m
105CONFIG_USB_ETH=m 105CONFIG_USB_ETH=m
106CONFIG_USB_GADGETFS=m 106CONFIG_USB_GADGETFS=m
107CONFIG_USB_FILE_STORAGE=m 107CONFIG_USB_MASS_STORAGE=m
108CONFIG_USB_G_SERIAL=m 108CONFIG_USB_G_SERIAL=m
109CONFIG_USB_CDC_COMPOSITE=m 109CONFIG_USB_CDC_COMPOSITE=m
110CONFIG_MMC=y 110CONFIG_MMC=y
diff --git a/arch/avr32/configs/atstk1006_defconfig b/arch/avr32/configs/atstk1006_defconfig
index 511eb8af356d..206a1b67f763 100644
--- a/arch/avr32/configs/atstk1006_defconfig
+++ b/arch/avr32/configs/atstk1006_defconfig
@@ -129,7 +129,7 @@ CONFIG_USB_GADGET=y
129CONFIG_USB_ZERO=m 129CONFIG_USB_ZERO=m
130CONFIG_USB_ETH=m 130CONFIG_USB_ETH=m
131CONFIG_USB_GADGETFS=m 131CONFIG_USB_GADGETFS=m
132CONFIG_USB_FILE_STORAGE=m 132CONFIG_USB_MASS_STORAGE=m
133CONFIG_USB_G_SERIAL=m 133CONFIG_USB_G_SERIAL=m
134CONFIG_USB_CDC_COMPOSITE=m 134CONFIG_USB_CDC_COMPOSITE=m
135CONFIG_MMC=y 135CONFIG_MMC=y
diff --git a/arch/avr32/configs/favr-32_defconfig b/arch/avr32/configs/favr-32_defconfig
index 19973b06170c..0421498d666b 100644
--- a/arch/avr32/configs/favr-32_defconfig
+++ b/arch/avr32/configs/favr-32_defconfig
@@ -117,7 +117,7 @@ CONFIG_USB_GADGET=y
117CONFIG_USB_ZERO=m 117CONFIG_USB_ZERO=m
118CONFIG_USB_ETH=m 118CONFIG_USB_ETH=m
119CONFIG_USB_GADGETFS=m 119CONFIG_USB_GADGETFS=m
120CONFIG_USB_FILE_STORAGE=m 120CONFIG_USB_MASS_STORAGE=m
121CONFIG_USB_G_SERIAL=m 121CONFIG_USB_G_SERIAL=m
122CONFIG_USB_CDC_COMPOSITE=m 122CONFIG_USB_CDC_COMPOSITE=m
123CONFIG_MMC=y 123CONFIG_MMC=y
diff --git a/arch/avr32/configs/hammerhead_defconfig b/arch/avr32/configs/hammerhead_defconfig
index 6f45681196d1..82f24eb251bd 100644
--- a/arch/avr32/configs/hammerhead_defconfig
+++ b/arch/avr32/configs/hammerhead_defconfig
@@ -127,7 +127,7 @@ CONFIG_USB_GADGET=y
127CONFIG_USB_ZERO=m 127CONFIG_USB_ZERO=m
128CONFIG_USB_ETH=m 128CONFIG_USB_ETH=m
129CONFIG_USB_GADGETFS=m 129CONFIG_USB_GADGETFS=m
130CONFIG_USB_FILE_STORAGE=m 130CONFIG_USB_MASS_STORAGE=m
131CONFIG_USB_G_SERIAL=m 131CONFIG_USB_G_SERIAL=m
132CONFIG_MMC=m 132CONFIG_MMC=m
133CONFIG_MMC_ATMELMCI=m 133CONFIG_MMC_ATMELMCI=m
diff --git a/arch/avr32/include/asm/Kbuild b/arch/avr32/include/asm/Kbuild
index 4807ded352c5..4dd4f78d3dcc 100644
--- a/arch/avr32/include/asm/Kbuild
+++ b/arch/avr32/include/asm/Kbuild
@@ -1,3 +1,4 @@
1 1
2generic-y += clkdev.h 2generic-y += clkdev.h
3generic-y += exec.h 3generic-y += exec.h
4generic-y += trace_clock.h
diff --git a/arch/blackfin/configs/CM-BF527_defconfig b/arch/blackfin/configs/CM-BF527_defconfig
index c280a50e7943..f59c80ee78e3 100644
--- a/arch/blackfin/configs/CM-BF527_defconfig
+++ b/arch/blackfin/configs/CM-BF527_defconfig
@@ -106,7 +106,7 @@ CONFIG_MUSB_PIO_ONLY=y
106CONFIG_USB_STORAGE=m 106CONFIG_USB_STORAGE=m
107CONFIG_USB_GADGET=m 107CONFIG_USB_GADGET=m
108CONFIG_USB_ETH=m 108CONFIG_USB_ETH=m
109CONFIG_USB_FILE_STORAGE=m 109CONFIG_USB_MASS_STORAGE=m
110CONFIG_USB_G_SERIAL=m 110CONFIG_USB_G_SERIAL=m
111CONFIG_USB_G_PRINTER=m 111CONFIG_USB_G_PRINTER=m
112CONFIG_RTC_CLASS=y 112CONFIG_RTC_CLASS=y
diff --git a/arch/blackfin/configs/CM-BF548_defconfig b/arch/blackfin/configs/CM-BF548_defconfig
index 349922be01f3..e961483f1879 100644
--- a/arch/blackfin/configs/CM-BF548_defconfig
+++ b/arch/blackfin/configs/CM-BF548_defconfig
@@ -107,7 +107,7 @@ CONFIG_USB_ZERO=m
107CONFIG_USB_ETH=m 107CONFIG_USB_ETH=m
108# CONFIG_USB_ETH_RNDIS is not set 108# CONFIG_USB_ETH_RNDIS is not set
109CONFIG_USB_GADGETFS=m 109CONFIG_USB_GADGETFS=m
110CONFIG_USB_FILE_STORAGE=m 110CONFIG_USB_MASS_STORAGE=m
111CONFIG_USB_G_SERIAL=m 111CONFIG_USB_G_SERIAL=m
112CONFIG_USB_G_PRINTER=m 112CONFIG_USB_G_PRINTER=m
113CONFIG_MMC=m 113CONFIG_MMC=m
diff --git a/arch/blackfin/configs/CM-BF561_defconfig b/arch/blackfin/configs/CM-BF561_defconfig
index 0456deaa2d6f..24936b91a6ee 100644
--- a/arch/blackfin/configs/CM-BF561_defconfig
+++ b/arch/blackfin/configs/CM-BF561_defconfig
@@ -83,7 +83,7 @@ CONFIG_GPIOLIB=y
83CONFIG_GPIO_SYSFS=y 83CONFIG_GPIO_SYSFS=y
84CONFIG_USB_GADGET=m 84CONFIG_USB_GADGET=m
85CONFIG_USB_ETH=m 85CONFIG_USB_ETH=m
86CONFIG_USB_FILE_STORAGE=m 86CONFIG_USB_MASS_STORAGE=m
87CONFIG_USB_G_SERIAL=m 87CONFIG_USB_G_SERIAL=m
88CONFIG_USB_G_PRINTER=m 88CONFIG_USB_G_PRINTER=m
89CONFIG_MMC=y 89CONFIG_MMC=y
diff --git a/arch/blackfin/include/asm/Kbuild b/arch/blackfin/include/asm/Kbuild
index 5a0625aad6a0..27d70759474c 100644
--- a/arch/blackfin/include/asm/Kbuild
+++ b/arch/blackfin/include/asm/Kbuild
@@ -38,6 +38,7 @@ generic-y += statfs.h
38generic-y += termbits.h 38generic-y += termbits.h
39generic-y += termios.h 39generic-y += termios.h
40generic-y += topology.h 40generic-y += topology.h
41generic-y += trace_clock.h
41generic-y += types.h 42generic-y += types.h
42generic-y += ucontext.h 43generic-y += ucontext.h
43generic-y += unaligned.h 44generic-y += unaligned.h
diff --git a/arch/c6x/Makefile b/arch/c6x/Makefile
index a9eb9597e03c..e72eb3417239 100644
--- a/arch/c6x/Makefile
+++ b/arch/c6x/Makefile
@@ -41,7 +41,7 @@ DTB:=$(subst dtbImage.,,$(filter dtbImage.%, $(MAKECMDGOALS)))
41export DTB 41export DTB
42 42
43ifneq ($(DTB),) 43ifneq ($(DTB),)
44core-y += $(boot)/ 44core-y += $(boot)/dts/
45endif 45endif
46 46
47# With make 3.82 we cannot mix normal and wildcard targets 47# With make 3.82 we cannot mix normal and wildcard targets
diff --git a/arch/c6x/boot/Makefile b/arch/c6x/boot/Makefile
index 6891257d514c..8734abee548e 100644
--- a/arch/c6x/boot/Makefile
+++ b/arch/c6x/boot/Makefile
@@ -6,25 +6,5 @@ OBJCOPYFLAGS_vmlinux.bin := -O binary
6$(obj)/vmlinux.bin: vmlinux FORCE 6$(obj)/vmlinux.bin: vmlinux FORCE
7 $(call if_changed,objcopy) 7 $(call if_changed,objcopy)
8 8
9DTC_FLAGS ?= -p 1024
10
11ifneq ($(DTB),)
12obj-y += linked_dtb.o
13endif
14
15$(obj)/%.dtb: $(src)/dts/%.dts FORCE
16 $(call if_changed_dep,dtc)
17
18quiet_cmd_cp = CP $< $@$2
19 cmd_cp = cat $< >$@$2 || (rm -f $@ && echo false)
20
21# Generate builtin.dtb from $(DTB).dtb
22$(obj)/builtin.dtb: $(obj)/$(DTB).dtb
23 $(call if_changed,cp)
24
25$(obj)/linked_dtb.o: $(obj)/builtin.dtb
26
27$(obj)/dtbImage.%: vmlinux 9$(obj)/dtbImage.%: vmlinux
28 $(call if_changed,objcopy) 10 $(call if_changed,objcopy)
29
30clean-files := $(obj)/*.dtb
diff --git a/arch/c6x/boot/dts/Makefile b/arch/c6x/boot/dts/Makefile
new file mode 100644
index 000000000000..c7528b02d061
--- /dev/null
+++ b/arch/c6x/boot/dts/Makefile
@@ -0,0 +1,20 @@
1#
2# Makefile for device trees
3#
4
5DTC_FLAGS ?= -p 1024
6
7ifneq ($(DTB),)
8obj-y += linked_dtb.o
9endif
10
11quiet_cmd_cp = CP $< $@$2
12 cmd_cp = cat $< >$@$2 || (rm -f $@ && echo false)
13
14# Generate builtin.dtb from $(DTB).dtb
15$(obj)/builtin.dtb: $(obj)/$(DTB).dtb
16 $(call if_changed,cp)
17
18$(obj)/linked_dtb.o: $(obj)/builtin.dtb
19
20clean-files := *.dtb
diff --git a/arch/c6x/boot/dts/linked_dtb.S b/arch/c6x/boot/dts/linked_dtb.S
new file mode 100644
index 000000000000..cf347f1d16ce
--- /dev/null
+++ b/arch/c6x/boot/dts/linked_dtb.S
@@ -0,0 +1,2 @@
1.section __fdt_blob,"a"
2.incbin "arch/c6x/boot/dts/builtin.dtb"
diff --git a/arch/c6x/boot/linked_dtb.S b/arch/c6x/boot/linked_dtb.S
deleted file mode 100644
index 57a4454eaec3..000000000000
--- a/arch/c6x/boot/linked_dtb.S
+++ /dev/null
@@ -1,2 +0,0 @@
1.section __fdt_blob,"a"
2.incbin "arch/c6x/boot/builtin.dtb"
diff --git a/arch/c6x/include/asm/Kbuild b/arch/c6x/include/asm/Kbuild
index 112a496d8355..eae7b5963e86 100644
--- a/arch/c6x/include/asm/Kbuild
+++ b/arch/c6x/include/asm/Kbuild
@@ -49,6 +49,7 @@ generic-y += termbits.h
49generic-y += termios.h 49generic-y += termios.h
50generic-y += tlbflush.h 50generic-y += tlbflush.h
51generic-y += topology.h 51generic-y += topology.h
52generic-y += trace_clock.h
52generic-y += types.h 53generic-y += types.h
53generic-y += ucontext.h 54generic-y += ucontext.h
54generic-y += user.h 55generic-y += user.h
diff --git a/arch/c6x/include/asm/setup.h b/arch/c6x/include/asm/setup.h
new file mode 100644
index 000000000000..ecead15872a6
--- /dev/null
+++ b/arch/c6x/include/asm/setup.h
@@ -0,0 +1,33 @@
1/*
2 * Port on Texas Instruments TMS320C6x architecture
3 *
4 * Copyright (C) 2004, 2009, 2010 2011 Texas Instruments Incorporated
5 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef _ASM_C6X_SETUP_H
12#define _ASM_C6X_SETUP_H
13
14#include <uapi/asm/setup.h>
15
16#ifndef __ASSEMBLY__
17extern char c6x_command_line[COMMAND_LINE_SIZE];
18
19extern int c6x_add_memory(phys_addr_t start, unsigned long size);
20
21extern unsigned long ram_start;
22extern unsigned long ram_end;
23
24extern int c6x_num_cores;
25extern unsigned int c6x_silicon_rev;
26extern unsigned int c6x_devstat;
27extern unsigned char c6x_fuse_mac[6];
28
29extern void machine_init(unsigned long dt_ptr);
30extern void time_init(void);
31
32#endif /* !__ASSEMBLY__ */
33#endif /* _ASM_C6X_SETUP_H */
diff --git a/arch/c6x/include/uapi/asm/Kbuild b/arch/c6x/include/uapi/asm/Kbuild
index c312b424c433..e9bc2b2b8147 100644
--- a/arch/c6x/include/uapi/asm/Kbuild
+++ b/arch/c6x/include/uapi/asm/Kbuild
@@ -1,6 +1,8 @@
1# UAPI Header export list 1# UAPI Header export list
2include include/uapi/asm-generic/Kbuild.asm 2include include/uapi/asm-generic/Kbuild.asm
3 3
4generic-y += kvm_para.h
5
4header-y += byteorder.h 6header-y += byteorder.h
5header-y += kvm_para.h 7header-y += kvm_para.h
6header-y += ptrace.h 8header-y += ptrace.h
diff --git a/arch/c6x/include/uapi/asm/kvm_para.h b/arch/c6x/include/uapi/asm/kvm_para.h
deleted file mode 100644
index 14fab8f0b957..000000000000
--- a/arch/c6x/include/uapi/asm/kvm_para.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/kvm_para.h>
diff --git a/arch/c6x/include/uapi/asm/setup.h b/arch/c6x/include/uapi/asm/setup.h
index a01e31896fa9..ad9ac97a8dad 100644
--- a/arch/c6x/include/uapi/asm/setup.h
+++ b/arch/c6x/include/uapi/asm/setup.h
@@ -1,33 +1,6 @@
1/* 1#ifndef _UAPI_ASM_C6X_SETUP_H
2 * Port on Texas Instruments TMS320C6x architecture 2#define _UAPI_ASM_C6X_SETUP_H
3 *
4 * Copyright (C) 2004, 2009, 2010 2011 Texas Instruments Incorporated
5 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef _ASM_C6X_SETUP_H
12#define _ASM_C6X_SETUP_H
13 3
14#define COMMAND_LINE_SIZE 1024 4#define COMMAND_LINE_SIZE 1024
15 5
16#ifndef __ASSEMBLY__ 6#endif /* _UAPI_ASM_C6X_SETUP_H */
17extern char c6x_command_line[COMMAND_LINE_SIZE];
18
19extern int c6x_add_memory(phys_addr_t start, unsigned long size);
20
21extern unsigned long ram_start;
22extern unsigned long ram_end;
23
24extern int c6x_num_cores;
25extern unsigned int c6x_silicon_rev;
26extern unsigned int c6x_devstat;
27extern unsigned char c6x_fuse_mac[6];
28
29extern void machine_init(unsigned long dt_ptr);
30extern void time_init(void);
31
32#endif /* !__ASSEMBLY__ */
33#endif /* _ASM_C6X_SETUP_H */
diff --git a/arch/c6x/kernel/entry.S b/arch/c6x/kernel/entry.S
index 5449c36018fe..0ed6157dd256 100644
--- a/arch/c6x/kernel/entry.S
+++ b/arch/c6x/kernel/entry.S
@@ -277,6 +277,8 @@ work_rescheduled:
277 [A1] BNOP .S1 work_resched,5 277 [A1] BNOP .S1 work_resched,5
278 278
279work_notifysig: 279work_notifysig:
280 ;; enable interrupts for do_notify_resume()
281 UNMASK_INT B2
280 B .S2 do_notify_resume 282 B .S2 do_notify_resume
281 LDW .D2T1 *+SP(REGS__END+8),A6 ; syscall flag 283 LDW .D2T1 *+SP(REGS__END+8),A6 ; syscall flag
282 ADDKPC .S2 resume_userspace,B3,1 284 ADDKPC .S2 resume_userspace,B3,1
@@ -427,8 +429,7 @@ ENTRY(ret_from_kernel_execve)
427ENDPROC(ret_from_kernel_execve) 429ENDPROC(ret_from_kernel_execve)
428 430
429 ;; 431 ;;
430 ;; These are the interrupt handlers, responsible for calling __do_IRQ() 432 ;; These are the interrupt handlers, responsible for calling c6x_do_IRQ()
431 ;; int6 is used for syscalls (see _system_call entry)
432 ;; 433 ;;
433 .macro SAVE_ALL_INT 434 .macro SAVE_ALL_INT
434 SAVE_ALL IRP,ITSR 435 SAVE_ALL IRP,ITSR
diff --git a/arch/cris/include/asm/Kbuild b/arch/cris/include/asm/Kbuild
index 6d43a951b5ec..15a122c3767c 100644
--- a/arch/cris/include/asm/Kbuild
+++ b/arch/cris/include/asm/Kbuild
@@ -11,3 +11,4 @@ header-y += sync_serial.h
11generic-y += clkdev.h 11generic-y += clkdev.h
12generic-y += exec.h 12generic-y += exec.h
13generic-y += module.h 13generic-y += module.h
14generic-y += trace_clock.h
diff --git a/arch/frv/include/asm/Kbuild b/arch/frv/include/asm/Kbuild
index 4a159da23633..c5d767028306 100644
--- a/arch/frv/include/asm/Kbuild
+++ b/arch/frv/include/asm/Kbuild
@@ -1,3 +1,4 @@
1 1
2generic-y += clkdev.h 2generic-y += clkdev.h
3generic-y += exec.h 3generic-y += exec.h
4generic-y += trace_clock.h
diff --git a/arch/h8300/include/asm/Kbuild b/arch/h8300/include/asm/Kbuild
index 50bbf387b2f8..4bc8ae73e08a 100644
--- a/arch/h8300/include/asm/Kbuild
+++ b/arch/h8300/include/asm/Kbuild
@@ -3,3 +3,4 @@ include include/asm-generic/Kbuild.asm
3generic-y += clkdev.h 3generic-y += clkdev.h
4generic-y += exec.h 4generic-y += exec.h
5generic-y += module.h 5generic-y += module.h
6generic-y += trace_clock.h
diff --git a/arch/hexagon/include/asm/Kbuild b/arch/hexagon/include/asm/Kbuild
index 3bfa9b30f448..bdb54ceb53bc 100644
--- a/arch/hexagon/include/asm/Kbuild
+++ b/arch/hexagon/include/asm/Kbuild
@@ -48,6 +48,7 @@ generic-y += stat.h
48generic-y += termbits.h 48generic-y += termbits.h
49generic-y += termios.h 49generic-y += termios.h
50generic-y += topology.h 50generic-y += topology.h
51generic-y += trace_clock.h
51generic-y += types.h 52generic-y += types.h
52generic-y += ucontext.h 53generic-y += ucontext.h
53generic-y += unaligned.h 54generic-y += unaligned.h
diff --git a/arch/ia64/hp/sim/simserial.c b/arch/ia64/hp/sim/simserial.c
index ec536e4e36c9..fc3924d18c1f 100644
--- a/arch/ia64/hp/sim/simserial.c
+++ b/arch/ia64/hp/sim/simserial.c
@@ -555,6 +555,7 @@ static int __init simrs_init(void)
555 return 0; 555 return 0;
556err_free_tty: 556err_free_tty:
557 put_tty_driver(hp_simserial_driver); 557 put_tty_driver(hp_simserial_driver);
558 tty_port_destroy(&state->port);
558 return retval; 559 return retval;
559} 560}
560 561
diff --git a/arch/ia64/include/asm/Kbuild b/arch/ia64/include/asm/Kbuild
index dd02f09b6eda..05b03ecd7933 100644
--- a/arch/ia64/include/asm/Kbuild
+++ b/arch/ia64/include/asm/Kbuild
@@ -2,3 +2,4 @@
2generic-y += clkdev.h 2generic-y += clkdev.h
3generic-y += exec.h 3generic-y += exec.h
4generic-y += kvm_para.h 4generic-y += kvm_para.h
5generic-y += trace_clock.h
diff --git a/arch/ia64/include/asm/cputime.h b/arch/ia64/include/asm/cputime.h
index 3deac956d325..7fcf7f08ab06 100644
--- a/arch/ia64/include/asm/cputime.h
+++ b/arch/ia64/include/asm/cputime.h
@@ -103,5 +103,7 @@ static inline void cputime_to_timeval(const cputime_t ct, struct timeval *val)
103#define cputime64_to_clock_t(__ct) \ 103#define cputime64_to_clock_t(__ct) \
104 cputime_to_clock_t((__force cputime_t)__ct) 104 cputime_to_clock_t((__force cputime_t)__ct)
105 105
106extern void arch_vtime_task_switch(struct task_struct *tsk);
107
106#endif /* CONFIG_VIRT_CPU_ACCOUNTING */ 108#endif /* CONFIG_VIRT_CPU_ACCOUNTING */
107#endif /* __IA64_CPUTIME_H */ 109#endif /* __IA64_CPUTIME_H */
diff --git a/arch/ia64/include/asm/device.h b/arch/ia64/include/asm/device.h
index d05e78f6db94..f69c32ffbe6a 100644
--- a/arch/ia64/include/asm/device.h
+++ b/arch/ia64/include/asm/device.h
@@ -7,9 +7,6 @@
7#define _ASM_IA64_DEVICE_H 7#define _ASM_IA64_DEVICE_H
8 8
9struct dev_archdata { 9struct dev_archdata {
10#ifdef CONFIG_ACPI
11 void *acpi_handle;
12#endif
13#ifdef CONFIG_INTEL_IOMMU 10#ifdef CONFIG_INTEL_IOMMU
14 void *iommu; /* hook for IOMMU specific extension */ 11 void *iommu; /* hook for IOMMU specific extension */
15#endif 12#endif
diff --git a/arch/ia64/include/asm/io.h b/arch/ia64/include/asm/io.h
index 2c26321c28c3..74a7cc3293bc 100644
--- a/arch/ia64/include/asm/io.h
+++ b/arch/ia64/include/asm/io.h
@@ -90,7 +90,7 @@ phys_to_virt (unsigned long address)
90 90
91#define ARCH_HAS_VALID_PHYS_ADDR_RANGE 91#define ARCH_HAS_VALID_PHYS_ADDR_RANGE
92extern u64 kern_mem_attribute (unsigned long phys_addr, unsigned long size); 92extern u64 kern_mem_attribute (unsigned long phys_addr, unsigned long size);
93extern int valid_phys_addr_range (unsigned long addr, size_t count); /* efi.c */ 93extern int valid_phys_addr_range (phys_addr_t addr, size_t count); /* efi.c */
94extern int valid_mmap_phys_addr_range (unsigned long pfn, size_t count); 94extern int valid_mmap_phys_addr_range (unsigned long pfn, size_t count);
95 95
96/* 96/*
diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c
index 440578850ae5..e9682f5be343 100644
--- a/arch/ia64/kernel/acpi.c
+++ b/arch/ia64/kernel/acpi.c
@@ -633,6 +633,7 @@ int acpi_register_gsi(struct device *dev, u32 gsi, int triggering, int polarity)
633 ACPI_EDGE_SENSITIVE) ? IOSAPIC_EDGE : 633 ACPI_EDGE_SENSITIVE) ? IOSAPIC_EDGE :
634 IOSAPIC_LEVEL); 634 IOSAPIC_LEVEL);
635} 635}
636EXPORT_SYMBOL_GPL(acpi_register_gsi);
636 637
637void acpi_unregister_gsi(u32 gsi) 638void acpi_unregister_gsi(u32 gsi)
638{ 639{
@@ -644,6 +645,7 @@ void acpi_unregister_gsi(u32 gsi)
644 645
645 iosapic_unregister_intr(gsi); 646 iosapic_unregister_intr(gsi);
646} 647}
648EXPORT_SYMBOL_GPL(acpi_unregister_gsi);
647 649
648static int __init acpi_parse_fadt(struct acpi_table_header *table) 650static int __init acpi_parse_fadt(struct acpi_table_header *table)
649{ 651{
diff --git a/arch/ia64/kernel/efi.c b/arch/ia64/kernel/efi.c
index d37bbd48637f..f034563aeae5 100644
--- a/arch/ia64/kernel/efi.c
+++ b/arch/ia64/kernel/efi.c
@@ -870,7 +870,7 @@ kern_mem_attribute (unsigned long phys_addr, unsigned long size)
870EXPORT_SYMBOL(kern_mem_attribute); 870EXPORT_SYMBOL(kern_mem_attribute);
871 871
872int 872int
873valid_phys_addr_range (unsigned long phys_addr, unsigned long size) 873valid_phys_addr_range (phys_addr_t phys_addr, unsigned long size)
874{ 874{
875 u64 attr; 875 u64 attr;
876 876
diff --git a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c
index f6388216080d..b1995efbfd21 100644
--- a/arch/ia64/kernel/time.c
+++ b/arch/ia64/kernel/time.c
@@ -83,7 +83,7 @@ static struct clocksource *itc_clocksource;
83 83
84extern cputime_t cycle_to_cputime(u64 cyc); 84extern cputime_t cycle_to_cputime(u64 cyc);
85 85
86static void vtime_account_user(struct task_struct *tsk) 86void vtime_account_user(struct task_struct *tsk)
87{ 87{
88 cputime_t delta_utime; 88 cputime_t delta_utime;
89 struct thread_info *ti = task_thread_info(tsk); 89 struct thread_info *ti = task_thread_info(tsk);
@@ -100,18 +100,11 @@ static void vtime_account_user(struct task_struct *tsk)
100 * accumulated times to the current process, and to prepare accounting on 100 * accumulated times to the current process, and to prepare accounting on
101 * the next process. 101 * the next process.
102 */ 102 */
103void vtime_task_switch(struct task_struct *prev) 103void arch_vtime_task_switch(struct task_struct *prev)
104{ 104{
105 struct thread_info *pi = task_thread_info(prev); 105 struct thread_info *pi = task_thread_info(prev);
106 struct thread_info *ni = task_thread_info(current); 106 struct thread_info *ni = task_thread_info(current);
107 107
108 if (idle_task(smp_processor_id()) != prev)
109 vtime_account_system(prev);
110 else
111 vtime_account_idle(prev);
112
113 vtime_account_user(prev);
114
115 pi->ac_stamp = ni->ac_stamp; 108 pi->ac_stamp = ni->ac_stamp;
116 ni->ac_stime = ni->ac_utime = 0; 109 ni->ac_stime = ni->ac_utime = 0;
117} 110}
@@ -126,6 +119,8 @@ static cputime_t vtime_delta(struct task_struct *tsk)
126 cputime_t delta_stime; 119 cputime_t delta_stime;
127 __u64 now; 120 __u64 now;
128 121
122 WARN_ON_ONCE(!irqs_disabled());
123
129 now = ia64_get_itc(); 124 now = ia64_get_itc();
130 125
131 delta_stime = cycle_to_cputime(ti->ac_stime + (now - ti->ac_stamp)); 126 delta_stime = cycle_to_cputime(ti->ac_stime + (now - ti->ac_stamp));
@@ -147,15 +142,6 @@ void vtime_account_idle(struct task_struct *tsk)
147 account_idle_time(vtime_delta(tsk)); 142 account_idle_time(vtime_delta(tsk));
148} 143}
149 144
150/*
151 * Called from the timer interrupt handler to charge accumulated user time
152 * to the current process. Must be called with interrupts disabled.
153 */
154void account_process_tick(struct task_struct *p, int user_tick)
155{
156 vtime_account_user(p);
157}
158
159#endif /* CONFIG_VIRT_CPU_ACCOUNTING */ 145#endif /* CONFIG_VIRT_CPU_ACCOUNTING */
160 146
161static irqreturn_t 147static irqreturn_t
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c
index acd5b68e8871..082e383c1b6f 100644
--- a/arch/ia64/mm/init.c
+++ b/arch/ia64/mm/init.c
@@ -637,7 +637,6 @@ mem_init (void)
637 637
638 high_memory = __va(max_low_pfn * PAGE_SIZE); 638 high_memory = __va(max_low_pfn * PAGE_SIZE);
639 639
640 reset_zone_present_pages();
641 for_each_online_pgdat(pgdat) 640 for_each_online_pgdat(pgdat)
642 if (pgdat->bdata->node_bootmem_map) 641 if (pgdat->bdata->node_bootmem_map)
643 totalram_pages += free_all_bootmem_node(pgdat); 642 totalram_pages += free_all_bootmem_node(pgdat);
diff --git a/arch/m32r/include/asm/Kbuild b/arch/m32r/include/asm/Kbuild
index 50bbf387b2f8..4bc8ae73e08a 100644
--- a/arch/m32r/include/asm/Kbuild
+++ b/arch/m32r/include/asm/Kbuild
@@ -3,3 +3,4 @@ include include/asm-generic/Kbuild.asm
3generic-y += clkdev.h 3generic-y += clkdev.h
4generic-y += exec.h 4generic-y += exec.h
5generic-y += module.h 5generic-y += module.h
6generic-y += trace_clock.h
diff --git a/arch/m68k/emu/nfcon.c b/arch/m68k/emu/nfcon.c
index 16d170f53bfd..6685bf45c2c3 100644
--- a/arch/m68k/emu/nfcon.c
+++ b/arch/m68k/emu/nfcon.c
@@ -120,8 +120,6 @@ static int __init nfcon_init(void)
120{ 120{
121 int res; 121 int res;
122 122
123 tty_port_init(&nfcon_tty_port);
124
125 stderr_id = nf_get_id("NF_STDERR"); 123 stderr_id = nf_get_id("NF_STDERR");
126 if (!stderr_id) 124 if (!stderr_id)
127 return -ENODEV; 125 return -ENODEV;
@@ -130,6 +128,8 @@ static int __init nfcon_init(void)
130 if (!nfcon_tty_driver) 128 if (!nfcon_tty_driver)
131 return -ENOMEM; 129 return -ENOMEM;
132 130
131 tty_port_init(&nfcon_tty_port);
132
133 nfcon_tty_driver->driver_name = "nfcon"; 133 nfcon_tty_driver->driver_name = "nfcon";
134 nfcon_tty_driver->name = "nfcon"; 134 nfcon_tty_driver->name = "nfcon";
135 nfcon_tty_driver->type = TTY_DRIVER_TYPE_SYSTEM; 135 nfcon_tty_driver->type = TTY_DRIVER_TYPE_SYSTEM;
@@ -143,6 +143,7 @@ static int __init nfcon_init(void)
143 if (res) { 143 if (res) {
144 pr_err("failed to register nfcon tty driver\n"); 144 pr_err("failed to register nfcon tty driver\n");
145 put_tty_driver(nfcon_tty_driver); 145 put_tty_driver(nfcon_tty_driver);
146 tty_port_destroy(&nfcon_tty_port);
146 return res; 147 return res;
147 } 148 }
148 149
@@ -157,6 +158,7 @@ static void __exit nfcon_exit(void)
157 unregister_console(&nf_console); 158 unregister_console(&nf_console);
158 tty_unregister_driver(nfcon_tty_driver); 159 tty_unregister_driver(nfcon_tty_driver);
159 put_tty_driver(nfcon_tty_driver); 160 put_tty_driver(nfcon_tty_driver);
161 tty_port_destroy(&nfcon_tty_port);
160} 162}
161 163
162module_init(nfcon_init); 164module_init(nfcon_init);
diff --git a/arch/m68k/include/asm/Kbuild b/arch/m68k/include/asm/Kbuild
index 88fa3ac86fae..7f1949c0e089 100644
--- a/arch/m68k/include/asm/Kbuild
+++ b/arch/m68k/include/asm/Kbuild
@@ -24,6 +24,7 @@ generic-y += sections.h
24generic-y += siginfo.h 24generic-y += siginfo.h
25generic-y += statfs.h 25generic-y += statfs.h
26generic-y += topology.h 26generic-y += topology.h
27generic-y += trace_clock.h
27generic-y += types.h 28generic-y += types.h
28generic-y += word-at-a-time.h 29generic-y += word-at-a-time.h
29generic-y += xor.h 30generic-y += xor.h
diff --git a/arch/m68k/include/asm/signal.h b/arch/m68k/include/asm/signal.h
index 67e489d8d1bd..2df26b57c26a 100644
--- a/arch/m68k/include/asm/signal.h
+++ b/arch/m68k/include/asm/signal.h
@@ -41,7 +41,7 @@ struct k_sigaction {
41static inline void sigaddset(sigset_t *set, int _sig) 41static inline void sigaddset(sigset_t *set, int _sig)
42{ 42{
43 asm ("bfset %0{%1,#1}" 43 asm ("bfset %0{%1,#1}"
44 : "+od" (*set) 44 : "+o" (*set)
45 : "id" ((_sig - 1) ^ 31) 45 : "id" ((_sig - 1) ^ 31)
46 : "cc"); 46 : "cc");
47} 47}
@@ -49,7 +49,7 @@ static inline void sigaddset(sigset_t *set, int _sig)
49static inline void sigdelset(sigset_t *set, int _sig) 49static inline void sigdelset(sigset_t *set, int _sig)
50{ 50{
51 asm ("bfclr %0{%1,#1}" 51 asm ("bfclr %0{%1,#1}"
52 : "+od" (*set) 52 : "+o" (*set)
53 : "id" ((_sig - 1) ^ 31) 53 : "id" ((_sig - 1) ^ 31)
54 : "cc"); 54 : "cc");
55} 55}
@@ -65,7 +65,7 @@ static inline int __gen_sigismember(sigset_t *set, int _sig)
65 int ret; 65 int ret;
66 asm ("bfextu %1{%2,#1},%0" 66 asm ("bfextu %1{%2,#1},%0"
67 : "=d" (ret) 67 : "=d" (ret)
68 : "od" (*set), "id" ((_sig-1) ^ 31) 68 : "o" (*set), "id" ((_sig-1) ^ 31)
69 : "cc"); 69 : "cc");
70 return ret; 70 return ret;
71} 71}
diff --git a/arch/microblaze/Makefile b/arch/microblaze/Makefile
index b23c40eb7a52..d26fb905ee0a 100644
--- a/arch/microblaze/Makefile
+++ b/arch/microblaze/Makefile
@@ -57,7 +57,7 @@ boot := arch/microblaze/boot
57DTB:=$(subst simpleImage.,,$(filter simpleImage.%, $(MAKECMDGOALS))) 57DTB:=$(subst simpleImage.,,$(filter simpleImage.%, $(MAKECMDGOALS)))
58 58
59ifneq ($(DTB),) 59ifneq ($(DTB),)
60 core-y += $(boot)/ 60 core-y += $(boot)/dts/
61endif 61endif
62 62
63# defines filename extension depending memory management type 63# defines filename extension depending memory management type
diff --git a/arch/microblaze/boot/Makefile b/arch/microblaze/boot/Makefile
index fa83ea497db7..80fe54fb7ca3 100644
--- a/arch/microblaze/boot/Makefile
+++ b/arch/microblaze/boot/Makefile
@@ -2,21 +2,10 @@
2# arch/microblaze/boot/Makefile 2# arch/microblaze/boot/Makefile
3# 3#
4 4
5obj-y += linked_dtb.o
6
7targets := linux.bin linux.bin.gz simpleImage.% 5targets := linux.bin linux.bin.gz simpleImage.%
8 6
9OBJCOPYFLAGS := -R .note -R .comment -R .note.gnu.build-id -O binary 7OBJCOPYFLAGS := -R .note -R .comment -R .note.gnu.build-id -O binary
10 8
11# Ensure system.dtb exists
12$(obj)/linked_dtb.o: $(obj)/system.dtb
13
14# Generate system.dtb from $(DTB).dtb
15ifneq ($(DTB),system)
16$(obj)/system.dtb: $(obj)/$(DTB).dtb
17 $(call if_changed,cp)
18endif
19
20$(obj)/linux.bin: vmlinux FORCE 9$(obj)/linux.bin: vmlinux FORCE
21 $(call if_changed,objcopy) 10 $(call if_changed,objcopy)
22 $(call if_changed,uimage) 11 $(call if_changed,uimage)
@@ -45,10 +34,4 @@ $(obj)/simpleImage.%: vmlinux FORCE
45 @echo 'Kernel: $@ is ready' ' (#'`cat .version`')' 34 @echo 'Kernel: $@ is ready' ' (#'`cat .version`')'
46 35
47 36
48# Rule to build device tree blobs 37clean-files += simpleImage.*.unstrip linux.bin.ub
49DTC_FLAGS := -p 1024
50
51$(obj)/%.dtb: $(src)/dts/%.dts FORCE
52 $(call if_changed_dep,dtc)
53
54clean-files += *.dtb simpleImage.*.unstrip linux.bin.ub
diff --git a/arch/microblaze/boot/dts/Makefile b/arch/microblaze/boot/dts/Makefile
new file mode 100644
index 000000000000..c3b3a5d67b89
--- /dev/null
+++ b/arch/microblaze/boot/dts/Makefile
@@ -0,0 +1,22 @@
1#
2# arch/microblaze/boot/Makefile
3#
4
5obj-y += linked_dtb.o
6
7# Ensure system.dtb exists
8$(obj)/linked_dtb.o: $(obj)/system.dtb
9
10# Generate system.dtb from $(DTB).dtb
11ifneq ($(DTB),system)
12$(obj)/system.dtb: $(obj)/$(DTB).dtb
13 $(call if_changed,cp)
14endif
15
16quiet_cmd_cp = CP $< $@$2
17 cmd_cp = cat $< >$@$2 || (rm -f $@ && echo false)
18
19# Rule to build device tree blobs
20DTC_FLAGS := -p 1024
21
22clean-files += *.dtb
diff --git a/arch/microblaze/boot/dts/linked_dtb.S b/arch/microblaze/boot/dts/linked_dtb.S
new file mode 100644
index 000000000000..23345af3721f
--- /dev/null
+++ b/arch/microblaze/boot/dts/linked_dtb.S
@@ -0,0 +1,2 @@
1.section __fdt_blob,"a"
2.incbin "arch/microblaze/boot/dts/system.dtb"
diff --git a/arch/microblaze/boot/linked_dtb.S b/arch/microblaze/boot/linked_dtb.S
deleted file mode 100644
index cb2b537aebee..000000000000
--- a/arch/microblaze/boot/linked_dtb.S
+++ /dev/null
@@ -1,3 +0,0 @@
1.section __fdt_blob,"a"
2.incbin "arch/microblaze/boot/system.dtb"
3
diff --git a/arch/microblaze/include/asm/Kbuild b/arch/microblaze/include/asm/Kbuild
index 8653072d7e9f..2957fcc71764 100644
--- a/arch/microblaze/include/asm/Kbuild
+++ b/arch/microblaze/include/asm/Kbuild
@@ -3,3 +3,4 @@ include include/asm-generic/Kbuild.asm
3header-y += elf.h 3header-y += elf.h
4generic-y += clkdev.h 4generic-y += clkdev.h
5generic-y += exec.h 5generic-y += exec.h
6generic-y += trace_clock.h
diff --git a/arch/microblaze/kernel/signal.c b/arch/microblaze/kernel/signal.c
index 3847e5b9c601..3903e3d11f5a 100644
--- a/arch/microblaze/kernel/signal.c
+++ b/arch/microblaze/kernel/signal.c
@@ -111,7 +111,7 @@ asmlinkage long sys_rt_sigreturn(struct pt_regs *regs)
111 111
112 /* It is more difficult to avoid calling this function than to 112 /* It is more difficult to avoid calling this function than to
113 call it and ignore errors. */ 113 call it and ignore errors. */
114 if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->r1)) 114 if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->r1) == -EFAULT)
115 goto badframe; 115 goto badframe;
116 116
117 return rval; 117 return rval;
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index 4dbb5055d04b..a1c5b996d66d 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
@@ -1346,8 +1346,6 @@ void __init pcibios_resource_survey(void)
1346 pci_assign_unassigned_resources(); 1346 pci_assign_unassigned_resources();
1347} 1347}
1348 1348
1349#ifdef CONFIG_HOTPLUG
1350
1351/* This is used by the PCI hotplug driver to allocate resource 1349/* This is used by the PCI hotplug driver to allocate resource
1352 * of newly plugged busses. We can try to consolidate with the 1350 * of newly plugged busses. We can try to consolidate with the
1353 * rest of the code later, for now, keep it as-is as our main 1351 * rest of the code later, for now, keep it as-is as our main
@@ -1407,8 +1405,6 @@ void pcibios_finish_adding_to_bus(struct pci_bus *bus)
1407} 1405}
1408EXPORT_SYMBOL_GPL(pcibios_finish_adding_to_bus); 1406EXPORT_SYMBOL_GPL(pcibios_finish_adding_to_bus);
1409 1407
1410#endif /* CONFIG_HOTPLUG */
1411
1412int pcibios_enable_device(struct pci_dev *dev, int mask) 1408int pcibios_enable_device(struct pci_dev *dev, int mask)
1413{ 1409{
1414 return pci_enable_resources(dev, mask); 1410 return pci_enable_resources(dev, mask);
diff --git a/arch/mips/alchemy/common/Makefile b/arch/mips/alchemy/common/Makefile
index 407ebc00e661..cb83d8d21aef 100644
--- a/arch/mips/alchemy/common/Makefile
+++ b/arch/mips/alchemy/common/Makefile
@@ -6,7 +6,7 @@
6# 6#
7 7
8obj-y += prom.o time.o clocks.o platform.o power.o setup.o \ 8obj-y += prom.o time.o clocks.o platform.o power.o setup.o \
9 sleeper.o dma.o dbdma.o vss.o irq.o 9 sleeper.o dma.o dbdma.o vss.o irq.o usb.o
10 10
11# optional gpiolib support 11# optional gpiolib support
12ifeq ($(CONFIG_ALCHEMY_GPIO_INDIRECT),) 12ifeq ($(CONFIG_ALCHEMY_GPIO_INDIRECT),)
diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c
index c0f3ce6dcb56..7af941d8e717 100644
--- a/arch/mips/alchemy/common/platform.c
+++ b/arch/mips/alchemy/common/platform.c
@@ -17,6 +17,8 @@
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/serial_8250.h> 18#include <linux/serial_8250.h>
19#include <linux/slab.h> 19#include <linux/slab.h>
20#include <linux/usb/ehci_pdriver.h>
21#include <linux/usb/ohci_pdriver.h>
20 22
21#include <asm/mach-au1x00/au1000.h> 23#include <asm/mach-au1x00/au1000.h>
22#include <asm/mach-au1x00/au1xxx_dbdma.h> 24#include <asm/mach-au1x00/au1xxx_dbdma.h>
@@ -122,6 +124,53 @@ static void __init alchemy_setup_uarts(int ctype)
122static u64 alchemy_ohci_dmamask = DMA_BIT_MASK(32); 124static u64 alchemy_ohci_dmamask = DMA_BIT_MASK(32);
123static u64 __maybe_unused alchemy_ehci_dmamask = DMA_BIT_MASK(32); 125static u64 __maybe_unused alchemy_ehci_dmamask = DMA_BIT_MASK(32);
124 126
127/* Power on callback for the ehci platform driver */
128static int alchemy_ehci_power_on(struct platform_device *pdev)
129{
130 return alchemy_usb_control(ALCHEMY_USB_EHCI0, 1);
131}
132
133/* Power off/suspend callback for the ehci platform driver */
134static void alchemy_ehci_power_off(struct platform_device *pdev)
135{
136 alchemy_usb_control(ALCHEMY_USB_EHCI0, 0);
137}
138
139static struct usb_ehci_pdata alchemy_ehci_pdata = {
140 .no_io_watchdog = 1,
141 .power_on = alchemy_ehci_power_on,
142 .power_off = alchemy_ehci_power_off,
143 .power_suspend = alchemy_ehci_power_off,
144};
145
146/* Power on callback for the ohci platform driver */
147static int alchemy_ohci_power_on(struct platform_device *pdev)
148{
149 int unit;
150
151 unit = (pdev->id == 1) ?
152 ALCHEMY_USB_OHCI1 : ALCHEMY_USB_OHCI0;
153
154 return alchemy_usb_control(unit, 1);
155}
156
157/* Power off/suspend callback for the ohci platform driver */
158static void alchemy_ohci_power_off(struct platform_device *pdev)
159{
160 int unit;
161
162 unit = (pdev->id == 1) ?
163 ALCHEMY_USB_OHCI1 : ALCHEMY_USB_OHCI0;
164
165 alchemy_usb_control(unit, 0);
166}
167
168static struct usb_ohci_pdata alchemy_ohci_pdata = {
169 .power_on = alchemy_ohci_power_on,
170 .power_off = alchemy_ohci_power_off,
171 .power_suspend = alchemy_ohci_power_off,
172};
173
125static unsigned long alchemy_ohci_data[][2] __initdata = { 174static unsigned long alchemy_ohci_data[][2] __initdata = {
126 [ALCHEMY_CPU_AU1000] = { AU1000_USB_OHCI_PHYS_ADDR, AU1000_USB_HOST_INT }, 175 [ALCHEMY_CPU_AU1000] = { AU1000_USB_OHCI_PHYS_ADDR, AU1000_USB_HOST_INT },
127 [ALCHEMY_CPU_AU1500] = { AU1000_USB_OHCI_PHYS_ADDR, AU1500_USB_HOST_INT }, 176 [ALCHEMY_CPU_AU1500] = { AU1000_USB_OHCI_PHYS_ADDR, AU1500_USB_HOST_INT },
@@ -169,9 +218,10 @@ static void __init alchemy_setup_usb(int ctype)
169 res[1].start = alchemy_ohci_data[ctype][1]; 218 res[1].start = alchemy_ohci_data[ctype][1];
170 res[1].end = res[1].start; 219 res[1].end = res[1].start;
171 res[1].flags = IORESOURCE_IRQ; 220 res[1].flags = IORESOURCE_IRQ;
172 pdev->name = "au1xxx-ohci"; 221 pdev->name = "ohci-platform";
173 pdev->id = 0; 222 pdev->id = 0;
174 pdev->dev.dma_mask = &alchemy_ohci_dmamask; 223 pdev->dev.dma_mask = &alchemy_ohci_dmamask;
224 pdev->dev.platform_data = &alchemy_ohci_pdata;
175 225
176 if (platform_device_register(pdev)) 226 if (platform_device_register(pdev))
177 printk(KERN_INFO "Alchemy USB: cannot add OHCI0\n"); 227 printk(KERN_INFO "Alchemy USB: cannot add OHCI0\n");
@@ -188,9 +238,10 @@ static void __init alchemy_setup_usb(int ctype)
188 res[1].start = alchemy_ehci_data[ctype][1]; 238 res[1].start = alchemy_ehci_data[ctype][1];
189 res[1].end = res[1].start; 239 res[1].end = res[1].start;
190 res[1].flags = IORESOURCE_IRQ; 240 res[1].flags = IORESOURCE_IRQ;
191 pdev->name = "au1xxx-ehci"; 241 pdev->name = "ehci-platform";
192 pdev->id = 0; 242 pdev->id = 0;
193 pdev->dev.dma_mask = &alchemy_ehci_dmamask; 243 pdev->dev.dma_mask = &alchemy_ehci_dmamask;
244 pdev->dev.platform_data = &alchemy_ehci_pdata;
194 245
195 if (platform_device_register(pdev)) 246 if (platform_device_register(pdev))
196 printk(KERN_INFO "Alchemy USB: cannot add EHCI0\n"); 247 printk(KERN_INFO "Alchemy USB: cannot add EHCI0\n");
@@ -207,9 +258,10 @@ static void __init alchemy_setup_usb(int ctype)
207 res[1].start = AU1300_USB_INT; 258 res[1].start = AU1300_USB_INT;
208 res[1].end = res[1].start; 259 res[1].end = res[1].start;
209 res[1].flags = IORESOURCE_IRQ; 260 res[1].flags = IORESOURCE_IRQ;
210 pdev->name = "au1xxx-ohci"; 261 pdev->name = "ohci-platform";
211 pdev->id = 1; 262 pdev->id = 1;
212 pdev->dev.dma_mask = &alchemy_ohci_dmamask; 263 pdev->dev.dma_mask = &alchemy_ohci_dmamask;
264 pdev->dev.platform_data = &alchemy_ohci_pdata;
213 265
214 if (platform_device_register(pdev)) 266 if (platform_device_register(pdev))
215 printk(KERN_INFO "Alchemy USB: cannot add OHCI1\n"); 267 printk(KERN_INFO "Alchemy USB: cannot add OHCI1\n");
diff --git a/arch/mips/alchemy/common/usb.c b/arch/mips/alchemy/common/usb.c
new file mode 100644
index 000000000000..936af8359fb2
--- /dev/null
+++ b/arch/mips/alchemy/common/usb.c
@@ -0,0 +1,614 @@
1/*
2 * USB block power/access management abstraction.
3 *
4 * Au1000+: The OHCI block control register is at the far end of the OHCI memory
5 * area. Au1550 has OHCI on different base address. No need to handle
6 * UDC here.
7 * Au1200: one register to control access and clocks to O/EHCI, UDC and OTG
8 * as well as the PHY for EHCI and UDC.
9 *
10 */
11
12#include <linux/init.h>
13#include <linux/io.h>
14#include <linux/module.h>
15#include <linux/spinlock.h>
16#include <linux/syscore_ops.h>
17#include <asm/mach-au1x00/au1000.h>
18
19/* control register offsets */
20#define AU1000_OHCICFG 0x7fffc
21#define AU1550_OHCICFG 0x07ffc
22#define AU1200_USBCFG 0x04
23
24/* Au1000 USB block config bits */
25#define USBHEN_RD (1 << 4) /* OHCI reset-done indicator */
26#define USBHEN_CE (1 << 3) /* OHCI block clock enable */
27#define USBHEN_E (1 << 2) /* OHCI block enable */
28#define USBHEN_C (1 << 1) /* OHCI block coherency bit */
29#define USBHEN_BE (1 << 0) /* OHCI Big-Endian */
30
31/* Au1200 USB config bits */
32#define USBCFG_PFEN (1 << 31) /* prefetch enable (undoc) */
33#define USBCFG_RDCOMB (1 << 30) /* read combining (undoc) */
34#define USBCFG_UNKNOWN (5 << 20) /* unknown, leave this way */
35#define USBCFG_SSD (1 << 23) /* serial short detect en */
36#define USBCFG_PPE (1 << 19) /* HS PHY PLL */
37#define USBCFG_UCE (1 << 18) /* UDC clock enable */
38#define USBCFG_ECE (1 << 17) /* EHCI clock enable */
39#define USBCFG_OCE (1 << 16) /* OHCI clock enable */
40#define USBCFG_FLA(x) (((x) & 0x3f) << 8)
41#define USBCFG_UCAM (1 << 7) /* coherent access (undoc) */
42#define USBCFG_GME (1 << 6) /* OTG mem access */
43#define USBCFG_DBE (1 << 5) /* UDC busmaster enable */
44#define USBCFG_DME (1 << 4) /* UDC mem enable */
45#define USBCFG_EBE (1 << 3) /* EHCI busmaster enable */
46#define USBCFG_EME (1 << 2) /* EHCI mem enable */
47#define USBCFG_OBE (1 << 1) /* OHCI busmaster enable */
48#define USBCFG_OME (1 << 0) /* OHCI mem enable */
49#define USBCFG_INIT_AU1200 (USBCFG_PFEN | USBCFG_RDCOMB | USBCFG_UNKNOWN |\
50 USBCFG_SSD | USBCFG_FLA(0x20) | USBCFG_UCAM | \
51 USBCFG_GME | USBCFG_DBE | USBCFG_DME | \
52 USBCFG_EBE | USBCFG_EME | USBCFG_OBE | \
53 USBCFG_OME)
54
55/* Au1300 USB config registers */
56#define USB_DWC_CTRL1 0x00
57#define USB_DWC_CTRL2 0x04
58#define USB_VBUS_TIMER 0x10
59#define USB_SBUS_CTRL 0x14
60#define USB_MSR_ERR 0x18
61#define USB_DWC_CTRL3 0x1C
62#define USB_DWC_CTRL4 0x20
63#define USB_OTG_STATUS 0x28
64#define USB_DWC_CTRL5 0x2C
65#define USB_DWC_CTRL6 0x30
66#define USB_DWC_CTRL7 0x34
67#define USB_PHY_STATUS 0xC0
68#define USB_INT_STATUS 0xC4
69#define USB_INT_ENABLE 0xC8
70
71#define USB_DWC_CTRL1_OTGD 0x04 /* set to DISable OTG */
72#define USB_DWC_CTRL1_HSTRS 0x02 /* set to ENable EHCI */
73#define USB_DWC_CTRL1_DCRS 0x01 /* set to ENable UDC */
74
75#define USB_DWC_CTRL2_PHY1RS 0x04 /* set to enable PHY1 */
76#define USB_DWC_CTRL2_PHY0RS 0x02 /* set to enable PHY0 */
77#define USB_DWC_CTRL2_PHYRS 0x01 /* set to enable PHY */
78
79#define USB_DWC_CTRL3_OHCI1_CKEN (1 << 19)
80#define USB_DWC_CTRL3_OHCI0_CKEN (1 << 18)
81#define USB_DWC_CTRL3_EHCI0_CKEN (1 << 17)
82#define USB_DWC_CTRL3_OTG0_CKEN (1 << 16)
83
84#define USB_SBUS_CTRL_SBCA 0x04 /* coherent access */
85
86#define USB_INTEN_FORCE 0x20
87#define USB_INTEN_PHY 0x10
88#define USB_INTEN_UDC 0x08
89#define USB_INTEN_EHCI 0x04
90#define USB_INTEN_OHCI1 0x02
91#define USB_INTEN_OHCI0 0x01
92
93static DEFINE_SPINLOCK(alchemy_usb_lock);
94
95static inline void __au1300_usb_phyctl(void __iomem *base, int enable)
96{
97 unsigned long r, s;
98
99 r = __raw_readl(base + USB_DWC_CTRL2);
100 s = __raw_readl(base + USB_DWC_CTRL3);
101
102 s &= USB_DWC_CTRL3_OHCI1_CKEN | USB_DWC_CTRL3_OHCI0_CKEN |
103 USB_DWC_CTRL3_EHCI0_CKEN | USB_DWC_CTRL3_OTG0_CKEN;
104
105 if (enable) {
106 /* simply enable all PHYs */
107 r |= USB_DWC_CTRL2_PHY1RS | USB_DWC_CTRL2_PHY0RS |
108 USB_DWC_CTRL2_PHYRS;
109 __raw_writel(r, base + USB_DWC_CTRL2);
110 wmb();
111 } else if (!s) {
112 /* no USB block active, do disable all PHYs */
113 r &= ~(USB_DWC_CTRL2_PHY1RS | USB_DWC_CTRL2_PHY0RS |
114 USB_DWC_CTRL2_PHYRS);
115 __raw_writel(r, base + USB_DWC_CTRL2);
116 wmb();
117 }
118}
119
120static inline void __au1300_ohci_control(void __iomem *base, int enable, int id)
121{
122 unsigned long r;
123
124 if (enable) {
125 __raw_writel(1, base + USB_DWC_CTRL7); /* start OHCI clock */
126 wmb();
127
128 r = __raw_readl(base + USB_DWC_CTRL3); /* enable OHCI block */
129 r |= (id == 0) ? USB_DWC_CTRL3_OHCI0_CKEN
130 : USB_DWC_CTRL3_OHCI1_CKEN;
131 __raw_writel(r, base + USB_DWC_CTRL3);
132 wmb();
133
134 __au1300_usb_phyctl(base, enable); /* power up the PHYs */
135
136 r = __raw_readl(base + USB_INT_ENABLE);
137 r |= (id == 0) ? USB_INTEN_OHCI0 : USB_INTEN_OHCI1;
138 __raw_writel(r, base + USB_INT_ENABLE);
139 wmb();
140
141 /* reset the OHCI start clock bit */
142 __raw_writel(0, base + USB_DWC_CTRL7);
143 wmb();
144 } else {
145 r = __raw_readl(base + USB_INT_ENABLE);
146 r &= ~((id == 0) ? USB_INTEN_OHCI0 : USB_INTEN_OHCI1);
147 __raw_writel(r, base + USB_INT_ENABLE);
148 wmb();
149
150 r = __raw_readl(base + USB_DWC_CTRL3);
151 r &= ~((id == 0) ? USB_DWC_CTRL3_OHCI0_CKEN
152 : USB_DWC_CTRL3_OHCI1_CKEN);
153 __raw_writel(r, base + USB_DWC_CTRL3);
154 wmb();
155
156 __au1300_usb_phyctl(base, enable);
157 }
158}
159
160static inline void __au1300_ehci_control(void __iomem *base, int enable)
161{
162 unsigned long r;
163
164 if (enable) {
165 r = __raw_readl(base + USB_DWC_CTRL3);
166 r |= USB_DWC_CTRL3_EHCI0_CKEN;
167 __raw_writel(r, base + USB_DWC_CTRL3);
168 wmb();
169
170 r = __raw_readl(base + USB_DWC_CTRL1);
171 r |= USB_DWC_CTRL1_HSTRS;
172 __raw_writel(r, base + USB_DWC_CTRL1);
173 wmb();
174
175 __au1300_usb_phyctl(base, enable);
176
177 r = __raw_readl(base + USB_INT_ENABLE);
178 r |= USB_INTEN_EHCI;
179 __raw_writel(r, base + USB_INT_ENABLE);
180 wmb();
181 } else {
182 r = __raw_readl(base + USB_INT_ENABLE);
183 r &= ~USB_INTEN_EHCI;
184 __raw_writel(r, base + USB_INT_ENABLE);
185 wmb();
186
187 r = __raw_readl(base + USB_DWC_CTRL1);
188 r &= ~USB_DWC_CTRL1_HSTRS;
189 __raw_writel(r, base + USB_DWC_CTRL1);
190 wmb();
191
192 r = __raw_readl(base + USB_DWC_CTRL3);
193 r &= ~USB_DWC_CTRL3_EHCI0_CKEN;
194 __raw_writel(r, base + USB_DWC_CTRL3);
195 wmb();
196
197 __au1300_usb_phyctl(base, enable);
198 }
199}
200
201static inline void __au1300_udc_control(void __iomem *base, int enable)
202{
203 unsigned long r;
204
205 if (enable) {
206 r = __raw_readl(base + USB_DWC_CTRL1);
207 r |= USB_DWC_CTRL1_DCRS;
208 __raw_writel(r, base + USB_DWC_CTRL1);
209 wmb();
210
211 __au1300_usb_phyctl(base, enable);
212
213 r = __raw_readl(base + USB_INT_ENABLE);
214 r |= USB_INTEN_UDC;
215 __raw_writel(r, base + USB_INT_ENABLE);
216 wmb();
217 } else {
218 r = __raw_readl(base + USB_INT_ENABLE);
219 r &= ~USB_INTEN_UDC;
220 __raw_writel(r, base + USB_INT_ENABLE);
221 wmb();
222
223 r = __raw_readl(base + USB_DWC_CTRL1);
224 r &= ~USB_DWC_CTRL1_DCRS;
225 __raw_writel(r, base + USB_DWC_CTRL1);
226 wmb();
227
228 __au1300_usb_phyctl(base, enable);
229 }
230}
231
232static inline void __au1300_otg_control(void __iomem *base, int enable)
233{
234 unsigned long r;
235 if (enable) {
236 r = __raw_readl(base + USB_DWC_CTRL3);
237 r |= USB_DWC_CTRL3_OTG0_CKEN;
238 __raw_writel(r, base + USB_DWC_CTRL3);
239 wmb();
240
241 r = __raw_readl(base + USB_DWC_CTRL1);
242 r &= ~USB_DWC_CTRL1_OTGD;
243 __raw_writel(r, base + USB_DWC_CTRL1);
244 wmb();
245
246 __au1300_usb_phyctl(base, enable);
247 } else {
248 r = __raw_readl(base + USB_DWC_CTRL1);
249 r |= USB_DWC_CTRL1_OTGD;
250 __raw_writel(r, base + USB_DWC_CTRL1);
251 wmb();
252
253 r = __raw_readl(base + USB_DWC_CTRL3);
254 r &= ~USB_DWC_CTRL3_OTG0_CKEN;
255 __raw_writel(r, base + USB_DWC_CTRL3);
256 wmb();
257
258 __au1300_usb_phyctl(base, enable);
259 }
260}
261
262static inline int au1300_usb_control(int block, int enable)
263{
264 void __iomem *base =
265 (void __iomem *)KSEG1ADDR(AU1300_USB_CTL_PHYS_ADDR);
266 int ret = 0;
267
268 switch (block) {
269 case ALCHEMY_USB_OHCI0:
270 __au1300_ohci_control(base, enable, 0);
271 break;
272 case ALCHEMY_USB_OHCI1:
273 __au1300_ohci_control(base, enable, 1);
274 break;
275 case ALCHEMY_USB_EHCI0:
276 __au1300_ehci_control(base, enable);
277 break;
278 case ALCHEMY_USB_UDC0:
279 __au1300_udc_control(base, enable);
280 break;
281 case ALCHEMY_USB_OTG0:
282 __au1300_otg_control(base, enable);
283 break;
284 default:
285 ret = -ENODEV;
286 }
287 return ret;
288}
289
290static inline void au1300_usb_init(void)
291{
292 void __iomem *base =
293 (void __iomem *)KSEG1ADDR(AU1300_USB_CTL_PHYS_ADDR);
294
295 /* set some sane defaults. Note: we don't fiddle with DWC_CTRL4
296 * here at all: Port 2 routing (EHCI or UDC) must be set either
297 * by boot firmware or platform init code; I can't autodetect
298 * a sane setting.
299 */
300 __raw_writel(0, base + USB_INT_ENABLE); /* disable all USB irqs */
301 wmb();
302 __raw_writel(0, base + USB_DWC_CTRL3); /* disable all clocks */
303 wmb();
304 __raw_writel(~0, base + USB_MSR_ERR); /* clear all errors */
305 wmb();
306 __raw_writel(~0, base + USB_INT_STATUS); /* clear int status */
307 wmb();
308 /* set coherent access bit */
309 __raw_writel(USB_SBUS_CTRL_SBCA, base + USB_SBUS_CTRL);
310 wmb();
311}
312
313static inline void __au1200_ohci_control(void __iomem *base, int enable)
314{
315 unsigned long r = __raw_readl(base + AU1200_USBCFG);
316 if (enable) {
317 __raw_writel(r | USBCFG_OCE, base + AU1200_USBCFG);
318 wmb();
319 udelay(2000);
320 } else {
321 __raw_writel(r & ~USBCFG_OCE, base + AU1200_USBCFG);
322 wmb();
323 udelay(1000);
324 }
325}
326
327static inline void __au1200_ehci_control(void __iomem *base, int enable)
328{
329 unsigned long r = __raw_readl(base + AU1200_USBCFG);
330 if (enable) {
331 __raw_writel(r | USBCFG_ECE | USBCFG_PPE, base + AU1200_USBCFG);
332 wmb();
333 udelay(1000);
334 } else {
335 if (!(r & USBCFG_UCE)) /* UDC also off? */
336 r &= ~USBCFG_PPE; /* yes: disable HS PHY PLL */
337 __raw_writel(r & ~USBCFG_ECE, base + AU1200_USBCFG);
338 wmb();
339 udelay(1000);
340 }
341}
342
343static inline void __au1200_udc_control(void __iomem *base, int enable)
344{
345 unsigned long r = __raw_readl(base + AU1200_USBCFG);
346 if (enable) {
347 __raw_writel(r | USBCFG_UCE | USBCFG_PPE, base + AU1200_USBCFG);
348 wmb();
349 } else {
350 if (!(r & USBCFG_ECE)) /* EHCI also off? */
351 r &= ~USBCFG_PPE; /* yes: disable HS PHY PLL */
352 __raw_writel(r & ~USBCFG_UCE, base + AU1200_USBCFG);
353 wmb();
354 }
355}
356
357static inline int au1200_coherency_bug(void)
358{
359#if defined(CONFIG_DMA_COHERENT)
360 /* Au1200 AB USB does not support coherent memory */
361 if (!(read_c0_prid() & 0xff)) {
362 printk(KERN_INFO "Au1200 USB: this is chip revision AB !!\n");
363 printk(KERN_INFO "Au1200 USB: update your board or re-configure"
364 " the kernel\n");
365 return -ENODEV;
366 }
367#endif
368 return 0;
369}
370
371static inline int au1200_usb_control(int block, int enable)
372{
373 void __iomem *base =
374 (void __iomem *)KSEG1ADDR(AU1200_USB_CTL_PHYS_ADDR);
375 int ret = 0;
376
377 switch (block) {
378 case ALCHEMY_USB_OHCI0:
379 ret = au1200_coherency_bug();
380 if (ret && enable)
381 goto out;
382 __au1200_ohci_control(base, enable);
383 break;
384 case ALCHEMY_USB_UDC0:
385 __au1200_udc_control(base, enable);
386 break;
387 case ALCHEMY_USB_EHCI0:
388 ret = au1200_coherency_bug();
389 if (ret && enable)
390 goto out;
391 __au1200_ehci_control(base, enable);
392 break;
393 default:
394 ret = -ENODEV;
395 }
396out:
397 return ret;
398}
399
400
401/* initialize USB block(s) to a known working state */
402static inline void au1200_usb_init(void)
403{
404 void __iomem *base =
405 (void __iomem *)KSEG1ADDR(AU1200_USB_CTL_PHYS_ADDR);
406 __raw_writel(USBCFG_INIT_AU1200, base + AU1200_USBCFG);
407 wmb();
408 udelay(1000);
409}
410
411static inline void au1000_usb_init(unsigned long rb, int reg)
412{
413 void __iomem *base = (void __iomem *)KSEG1ADDR(rb + reg);
414 unsigned long r = __raw_readl(base);
415
416#if defined(__BIG_ENDIAN)
417 r |= USBHEN_BE;
418#endif
419 r |= USBHEN_C;
420
421 __raw_writel(r, base);
422 wmb();
423 udelay(1000);
424}
425
426
427static inline void __au1xx0_ohci_control(int enable, unsigned long rb, int creg)
428{
429 void __iomem *base = (void __iomem *)KSEG1ADDR(rb);
430 unsigned long r = __raw_readl(base + creg);
431
432 if (enable) {
433 __raw_writel(r | USBHEN_CE, base + creg);
434 wmb();
435 udelay(1000);
436 __raw_writel(r | USBHEN_CE | USBHEN_E, base + creg);
437 wmb();
438 udelay(1000);
439
440 /* wait for reset complete (read reg twice: au1500 erratum) */
441 while (__raw_readl(base + creg),
442 !(__raw_readl(base + creg) & USBHEN_RD))
443 udelay(1000);
444 } else {
445 __raw_writel(r & ~(USBHEN_CE | USBHEN_E), base + creg);
446 wmb();
447 }
448}
449
450static inline int au1000_usb_control(int block, int enable, unsigned long rb,
451 int creg)
452{
453 int ret = 0;
454
455 switch (block) {
456 case ALCHEMY_USB_OHCI0:
457 __au1xx0_ohci_control(enable, rb, creg);
458 break;
459 default:
460 ret = -ENODEV;
461 }
462 return ret;
463}
464
465/*
466 * alchemy_usb_control - control Alchemy on-chip USB blocks
467 * @block: USB block to target
468 * @enable: set 1 to enable a block, 0 to disable
469 */
470int alchemy_usb_control(int block, int enable)
471{
472 unsigned long flags;
473 int ret;
474
475 spin_lock_irqsave(&alchemy_usb_lock, flags);
476 switch (alchemy_get_cputype()) {
477 case ALCHEMY_CPU_AU1000:
478 case ALCHEMY_CPU_AU1500:
479 case ALCHEMY_CPU_AU1100:
480 ret = au1000_usb_control(block, enable,
481 AU1000_USB_OHCI_PHYS_ADDR, AU1000_OHCICFG);
482 break;
483 case ALCHEMY_CPU_AU1550:
484 ret = au1000_usb_control(block, enable,
485 AU1550_USB_OHCI_PHYS_ADDR, AU1550_OHCICFG);
486 break;
487 case ALCHEMY_CPU_AU1200:
488 ret = au1200_usb_control(block, enable);
489 break;
490 case ALCHEMY_CPU_AU1300:
491 ret = au1300_usb_control(block, enable);
492 break;
493 default:
494 ret = -ENODEV;
495 }
496 spin_unlock_irqrestore(&alchemy_usb_lock, flags);
497 return ret;
498}
499EXPORT_SYMBOL_GPL(alchemy_usb_control);
500
501
502static unsigned long alchemy_usb_pmdata[2];
503
504static void au1000_usb_pm(unsigned long br, int creg, int susp)
505{
506 void __iomem *base = (void __iomem *)KSEG1ADDR(br);
507
508 if (susp) {
509 alchemy_usb_pmdata[0] = __raw_readl(base + creg);
510 /* There appears to be some undocumented reset register.... */
511 __raw_writel(0, base + 0x04);
512 wmb();
513 __raw_writel(0, base + creg);
514 wmb();
515 } else {
516 __raw_writel(alchemy_usb_pmdata[0], base + creg);
517 wmb();
518 }
519}
520
521static void au1200_usb_pm(int susp)
522{
523 void __iomem *base =
524 (void __iomem *)KSEG1ADDR(AU1200_USB_OTG_PHYS_ADDR);
525 if (susp) {
526 /* save OTG_CAP/MUX registers which indicate port routing */
527 /* FIXME: write an OTG driver to do that */
528 alchemy_usb_pmdata[0] = __raw_readl(base + 0x00);
529 alchemy_usb_pmdata[1] = __raw_readl(base + 0x04);
530 } else {
531 /* restore access to all MMIO areas */
532 au1200_usb_init();
533
534 /* restore OTG_CAP/MUX registers */
535 __raw_writel(alchemy_usb_pmdata[0], base + 0x00);
536 __raw_writel(alchemy_usb_pmdata[1], base + 0x04);
537 wmb();
538 }
539}
540
541static void au1300_usb_pm(int susp)
542{
543 void __iomem *base =
544 (void __iomem *)KSEG1ADDR(AU1300_USB_CTL_PHYS_ADDR);
545 /* remember Port2 routing */
546 if (susp) {
547 alchemy_usb_pmdata[0] = __raw_readl(base + USB_DWC_CTRL4);
548 } else {
549 au1300_usb_init();
550 __raw_writel(alchemy_usb_pmdata[0], base + USB_DWC_CTRL4);
551 wmb();
552 }
553}
554
555static void alchemy_usb_pm(int susp)
556{
557 switch (alchemy_get_cputype()) {
558 case ALCHEMY_CPU_AU1000:
559 case ALCHEMY_CPU_AU1500:
560 case ALCHEMY_CPU_AU1100:
561 au1000_usb_pm(AU1000_USB_OHCI_PHYS_ADDR, AU1000_OHCICFG, susp);
562 break;
563 case ALCHEMY_CPU_AU1550:
564 au1000_usb_pm(AU1550_USB_OHCI_PHYS_ADDR, AU1550_OHCICFG, susp);
565 break;
566 case ALCHEMY_CPU_AU1200:
567 au1200_usb_pm(susp);
568 break;
569 case ALCHEMY_CPU_AU1300:
570 au1300_usb_pm(susp);
571 break;
572 }
573}
574
575static int alchemy_usb_suspend(void)
576{
577 alchemy_usb_pm(1);
578 return 0;
579}
580
581static void alchemy_usb_resume(void)
582{
583 alchemy_usb_pm(0);
584}
585
586static struct syscore_ops alchemy_usb_pm_ops = {
587 .suspend = alchemy_usb_suspend,
588 .resume = alchemy_usb_resume,
589};
590
591static int __init alchemy_usb_init(void)
592{
593 switch (alchemy_get_cputype()) {
594 case ALCHEMY_CPU_AU1000:
595 case ALCHEMY_CPU_AU1500:
596 case ALCHEMY_CPU_AU1100:
597 au1000_usb_init(AU1000_USB_OHCI_PHYS_ADDR, AU1000_OHCICFG);
598 break;
599 case ALCHEMY_CPU_AU1550:
600 au1000_usb_init(AU1550_USB_OHCI_PHYS_ADDR, AU1550_OHCICFG);
601 break;
602 case ALCHEMY_CPU_AU1200:
603 au1200_usb_init();
604 break;
605 case ALCHEMY_CPU_AU1300:
606 au1300_usb_init();
607 break;
608 }
609
610 register_syscore_ops(&alchemy_usb_pm_ops);
611
612 return 0;
613}
614arch_initcall(alchemy_usb_init);
diff --git a/arch/mips/ath79/dev-usb.c b/arch/mips/ath79/dev-usb.c
index 072bb9be2304..bd2bc108e1b5 100644
--- a/arch/mips/ath79/dev-usb.c
+++ b/arch/mips/ath79/dev-usb.c
@@ -50,13 +50,11 @@ static u64 ath79_ehci_dmamask = DMA_BIT_MASK(32);
50 50
51static struct usb_ehci_pdata ath79_ehci_pdata_v1 = { 51static struct usb_ehci_pdata ath79_ehci_pdata_v1 = {
52 .has_synopsys_hc_bug = 1, 52 .has_synopsys_hc_bug = 1,
53 .port_power_off = 1,
54}; 53};
55 54
56static struct usb_ehci_pdata ath79_ehci_pdata_v2 = { 55static struct usb_ehci_pdata ath79_ehci_pdata_v2 = {
57 .caps_offset = 0x100, 56 .caps_offset = 0x100,
58 .has_tt = 1, 57 .has_tt = 1,
59 .port_power_off = 1,
60}; 58};
61 59
62static struct platform_device ath79_ehci_device = { 60static struct platform_device ath79_ehci_device = {
diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile
index bc96e2908f14..6e927cf20df2 100644
--- a/arch/mips/cavium-octeon/Makefile
+++ b/arch/mips/cavium-octeon/Makefile
@@ -24,9 +24,6 @@ DTB_FILES = $(patsubst %.dts, %.dtb, $(DTS_FILES))
24 24
25obj-y += $(patsubst %.dts, %.dtb.o, $(DTS_FILES)) 25obj-y += $(patsubst %.dts, %.dtb.o, $(DTS_FILES))
26 26
27$(obj)/%.dtb: $(src)/%.dts FORCE
28 $(call if_changed_dep,dtc)
29
30# Let's keep the .dtb files around in case we want to look at them. 27# Let's keep the .dtb files around in case we want to look at them.
31.SECONDARY: $(addprefix $(obj)/, $(DTB_FILES)) 28.SECONDARY: $(addprefix $(obj)/, $(DTB_FILES))
32 29
diff --git a/arch/mips/cavium-octeon/executive/cvmx-l2c.c b/arch/mips/cavium-octeon/executive/cvmx-l2c.c
index d38246e33ddb..9f883bf76953 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-l2c.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-l2c.c
@@ -30,6 +30,7 @@
30 * measurement, and debugging facilities. 30 * measurement, and debugging facilities.
31 */ 31 */
32 32
33#include <linux/irqflags.h>
33#include <asm/octeon/cvmx.h> 34#include <asm/octeon/cvmx.h>
34#include <asm/octeon/cvmx-l2c.h> 35#include <asm/octeon/cvmx-l2c.h>
35#include <asm/octeon/cvmx-spinlock.h> 36#include <asm/octeon/cvmx-spinlock.h>
diff --git a/arch/mips/configs/bcm47xx_defconfig b/arch/mips/configs/bcm47xx_defconfig
index b6fde2bb51b6..4ca8e5c99225 100644
--- a/arch/mips/configs/bcm47xx_defconfig
+++ b/arch/mips/configs/bcm47xx_defconfig
@@ -473,7 +473,7 @@ CONFIG_USB_GADGET_NET2280=y
473CONFIG_USB_ZERO=m 473CONFIG_USB_ZERO=m
474CONFIG_USB_ETH=m 474CONFIG_USB_ETH=m
475CONFIG_USB_GADGETFS=m 475CONFIG_USB_GADGETFS=m
476CONFIG_USB_FILE_STORAGE=m 476CONFIG_USB_MASS_STORAGE=m
477CONFIG_USB_G_SERIAL=m 477CONFIG_USB_G_SERIAL=m
478CONFIG_USB_MIDI_GADGET=m 478CONFIG_USB_MIDI_GADGET=m
479CONFIG_LEDS_CLASS=y 479CONFIG_LEDS_CLASS=y
diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig
index 17a36c125172..face9d26e6d5 100644
--- a/arch/mips/configs/db1000_defconfig
+++ b/arch/mips/configs/db1000_defconfig
@@ -233,6 +233,7 @@ CONFIG_USB_EHCI_HCD=y
233CONFIG_USB_EHCI_ROOT_HUB_TT=y 233CONFIG_USB_EHCI_ROOT_HUB_TT=y
234CONFIG_USB_EHCI_TT_NEWSCHED=y 234CONFIG_USB_EHCI_TT_NEWSCHED=y
235CONFIG_USB_OHCI_HCD=y 235CONFIG_USB_OHCI_HCD=y
236CONFIG_USB_OHCI_HCD_PLATFORM=y
236CONFIG_USB_UHCI_HCD=y 237CONFIG_USB_UHCI_HCD=y
237CONFIG_USB_STORAGE=y 238CONFIG_USB_STORAGE=y
238CONFIG_NEW_LEDS=y 239CONFIG_NEW_LEDS=y
diff --git a/arch/mips/configs/db1235_defconfig b/arch/mips/configs/db1235_defconfig
index c48998ffd198..14752dde7540 100644
--- a/arch/mips/configs/db1235_defconfig
+++ b/arch/mips/configs/db1235_defconfig
@@ -346,8 +346,10 @@ CONFIG_USB=y
346CONFIG_USB_DYNAMIC_MINORS=y 346CONFIG_USB_DYNAMIC_MINORS=y
347CONFIG_USB_SUSPEND=y 347CONFIG_USB_SUSPEND=y
348CONFIG_USB_EHCI_HCD=y 348CONFIG_USB_EHCI_HCD=y
349CONFIG_USB_EHCI_HCD_PLATFORM=y
349CONFIG_USB_EHCI_ROOT_HUB_TT=y 350CONFIG_USB_EHCI_ROOT_HUB_TT=y
350CONFIG_USB_OHCI_HCD=y 351CONFIG_USB_OHCI_HCD=y
352CONFIG_USB_OHCI_HCD_PLATFORM=y
351CONFIG_USB_STORAGE=y 353CONFIG_USB_STORAGE=y
352CONFIG_MMC=y 354CONFIG_MMC=y
353CONFIG_MMC_CLKGATE=y 355CONFIG_MMC_CLKGATE=y
diff --git a/arch/mips/configs/gpr_defconfig b/arch/mips/configs/gpr_defconfig
index 48a40aefaf58..fb64589015fc 100644
--- a/arch/mips/configs/gpr_defconfig
+++ b/arch/mips/configs/gpr_defconfig
@@ -291,6 +291,7 @@ CONFIG_USB_MON=y
291CONFIG_USB_EHCI_HCD=y 291CONFIG_USB_EHCI_HCD=y
292CONFIG_USB_EHCI_ROOT_HUB_TT=y 292CONFIG_USB_EHCI_ROOT_HUB_TT=y
293CONFIG_USB_OHCI_HCD=y 293CONFIG_USB_OHCI_HCD=y
294CONFIG_USB_OHCI_HCD_PLATFORM=y
294CONFIG_USB_STORAGE=m 295CONFIG_USB_STORAGE=m
295CONFIG_USB_LIBUSUAL=y 296CONFIG_USB_LIBUSUAL=y
296CONFIG_USB_SERIAL=y 297CONFIG_USB_SERIAL=y
diff --git a/arch/mips/configs/ls1b_defconfig b/arch/mips/configs/ls1b_defconfig
index 80cff8bea8e8..7eb75543ca1a 100644
--- a/arch/mips/configs/ls1b_defconfig
+++ b/arch/mips/configs/ls1b_defconfig
@@ -76,6 +76,7 @@ CONFIG_HID_GENERIC=m
76CONFIG_USB=y 76CONFIG_USB=y
77CONFIG_USB_ANNOUNCE_NEW_DEVICES=y 77CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
78CONFIG_USB_EHCI_HCD=y 78CONFIG_USB_EHCI_HCD=y
79CONFIG_USB_EHCI_HCD_PLATFORM=y
79# CONFIG_USB_EHCI_TT_NEWSCHED is not set 80# CONFIG_USB_EHCI_TT_NEWSCHED is not set
80CONFIG_USB_STORAGE=m 81CONFIG_USB_STORAGE=m
81CONFIG_USB_SERIAL=m 82CONFIG_USB_SERIAL=m
diff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig
index 46c61edcdf7b..9fa8f16068d8 100644
--- a/arch/mips/configs/mtx1_defconfig
+++ b/arch/mips/configs/mtx1_defconfig
@@ -581,6 +581,7 @@ CONFIG_USB_MON=m
581CONFIG_USB_EHCI_HCD=m 581CONFIG_USB_EHCI_HCD=m
582CONFIG_USB_EHCI_ROOT_HUB_TT=y 582CONFIG_USB_EHCI_ROOT_HUB_TT=y
583CONFIG_USB_OHCI_HCD=m 583CONFIG_USB_OHCI_HCD=m
584CONFIG_USB_OHCI_HCD_PLATFORM=y
584CONFIG_USB_UHCI_HCD=m 585CONFIG_USB_UHCI_HCD=m
585CONFIG_USB_U132_HCD=m 586CONFIG_USB_U132_HCD=m
586CONFIG_USB_SL811_HCD=m 587CONFIG_USB_SL811_HCD=m
@@ -661,7 +662,7 @@ CONFIG_USB_GADGET_NET2280=y
661CONFIG_USB_ZERO=m 662CONFIG_USB_ZERO=m
662CONFIG_USB_ETH=m 663CONFIG_USB_ETH=m
663CONFIG_USB_GADGETFS=m 664CONFIG_USB_GADGETFS=m
664CONFIG_USB_FILE_STORAGE=m 665CONFIG_USB_MASS_STORAGE=m
665CONFIG_USB_G_SERIAL=m 666CONFIG_USB_G_SERIAL=m
666CONFIG_USB_MIDI_GADGET=m 667CONFIG_USB_MIDI_GADGET=m
667CONFIG_MMC=m 668CONFIG_MMC=m
diff --git a/arch/mips/fw/arc/misc.c b/arch/mips/fw/arc/misc.c
index 7cf80ca2c1d2..f9f5307434c2 100644
--- a/arch/mips/fw/arc/misc.c
+++ b/arch/mips/fw/arc/misc.c
@@ -11,6 +11,7 @@
11 */ 11 */
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/irqflags.h>
14 15
15#include <asm/bcache.h> 16#include <asm/bcache.h>
16 17
diff --git a/arch/mips/include/asm/Kbuild b/arch/mips/include/asm/Kbuild
index 533053d12ced..9b54b7a403d4 100644
--- a/arch/mips/include/asm/Kbuild
+++ b/arch/mips/include/asm/Kbuild
@@ -1 +1,2 @@
1# MIPS headers 1# MIPS headers
2generic-y += trace_clock.h
diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h
index 82ad35ce2b45..46ac73abd5ee 100644
--- a/arch/mips/include/asm/bitops.h
+++ b/arch/mips/include/asm/bitops.h
@@ -14,7 +14,6 @@
14#endif 14#endif
15 15
16#include <linux/compiler.h> 16#include <linux/compiler.h>
17#include <linux/irqflags.h>
18#include <linux/types.h> 17#include <linux/types.h>
19#include <asm/barrier.h> 18#include <asm/barrier.h>
20#include <asm/byteorder.h> /* sigh ... */ 19#include <asm/byteorder.h> /* sigh ... */
@@ -44,6 +43,24 @@
44#define smp_mb__before_clear_bit() smp_mb__before_llsc() 43#define smp_mb__before_clear_bit() smp_mb__before_llsc()
45#define smp_mb__after_clear_bit() smp_llsc_mb() 44#define smp_mb__after_clear_bit() smp_llsc_mb()
46 45
46
47/*
48 * These are the "slower" versions of the functions and are in bitops.c.
49 * These functions call raw_local_irq_{save,restore}().
50 */
51void __mips_set_bit(unsigned long nr, volatile unsigned long *addr);
52void __mips_clear_bit(unsigned long nr, volatile unsigned long *addr);
53void __mips_change_bit(unsigned long nr, volatile unsigned long *addr);
54int __mips_test_and_set_bit(unsigned long nr,
55 volatile unsigned long *addr);
56int __mips_test_and_set_bit_lock(unsigned long nr,
57 volatile unsigned long *addr);
58int __mips_test_and_clear_bit(unsigned long nr,
59 volatile unsigned long *addr);
60int __mips_test_and_change_bit(unsigned long nr,
61 volatile unsigned long *addr);
62
63
47/* 64/*
48 * set_bit - Atomically set a bit in memory 65 * set_bit - Atomically set a bit in memory
49 * @nr: the bit to set 66 * @nr: the bit to set
@@ -57,7 +74,7 @@
57static inline void set_bit(unsigned long nr, volatile unsigned long *addr) 74static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
58{ 75{
59 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); 76 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
60 unsigned short bit = nr & SZLONG_MASK; 77 int bit = nr & SZLONG_MASK;
61 unsigned long temp; 78 unsigned long temp;
62 79
63 if (kernel_uses_llsc && R10000_LLSC_WAR) { 80 if (kernel_uses_llsc && R10000_LLSC_WAR) {
@@ -92,17 +109,8 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
92 : "=&r" (temp), "+m" (*m) 109 : "=&r" (temp), "+m" (*m)
93 : "ir" (1UL << bit)); 110 : "ir" (1UL << bit));
94 } while (unlikely(!temp)); 111 } while (unlikely(!temp));
95 } else { 112 } else
96 volatile unsigned long *a = addr; 113 __mips_set_bit(nr, addr);
97 unsigned long mask;
98 unsigned long flags;
99
100 a += nr >> SZLONG_LOG;
101 mask = 1UL << bit;
102 raw_local_irq_save(flags);
103 *a |= mask;
104 raw_local_irq_restore(flags);
105 }
106} 114}
107 115
108/* 116/*
@@ -118,7 +126,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
118static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) 126static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
119{ 127{
120 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); 128 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
121 unsigned short bit = nr & SZLONG_MASK; 129 int bit = nr & SZLONG_MASK;
122 unsigned long temp; 130 unsigned long temp;
123 131
124 if (kernel_uses_llsc && R10000_LLSC_WAR) { 132 if (kernel_uses_llsc && R10000_LLSC_WAR) {
@@ -153,17 +161,8 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
153 : "=&r" (temp), "+m" (*m) 161 : "=&r" (temp), "+m" (*m)
154 : "ir" (~(1UL << bit))); 162 : "ir" (~(1UL << bit)));
155 } while (unlikely(!temp)); 163 } while (unlikely(!temp));
156 } else { 164 } else
157 volatile unsigned long *a = addr; 165 __mips_clear_bit(nr, addr);
158 unsigned long mask;
159 unsigned long flags;
160
161 a += nr >> SZLONG_LOG;
162 mask = 1UL << bit;
163 raw_local_irq_save(flags);
164 *a &= ~mask;
165 raw_local_irq_restore(flags);
166 }
167} 166}
168 167
169/* 168/*
@@ -191,7 +190,7 @@ static inline void clear_bit_unlock(unsigned long nr, volatile unsigned long *ad
191 */ 190 */
192static inline void change_bit(unsigned long nr, volatile unsigned long *addr) 191static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
193{ 192{
194 unsigned short bit = nr & SZLONG_MASK; 193 int bit = nr & SZLONG_MASK;
195 194
196 if (kernel_uses_llsc && R10000_LLSC_WAR) { 195 if (kernel_uses_llsc && R10000_LLSC_WAR) {
197 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); 196 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
@@ -220,17 +219,8 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
220 : "=&r" (temp), "+m" (*m) 219 : "=&r" (temp), "+m" (*m)
221 : "ir" (1UL << bit)); 220 : "ir" (1UL << bit));
222 } while (unlikely(!temp)); 221 } while (unlikely(!temp));
223 } else { 222 } else
224 volatile unsigned long *a = addr; 223 __mips_change_bit(nr, addr);
225 unsigned long mask;
226 unsigned long flags;
227
228 a += nr >> SZLONG_LOG;
229 mask = 1UL << bit;
230 raw_local_irq_save(flags);
231 *a ^= mask;
232 raw_local_irq_restore(flags);
233 }
234} 224}
235 225
236/* 226/*
@@ -244,7 +234,7 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
244static inline int test_and_set_bit(unsigned long nr, 234static inline int test_and_set_bit(unsigned long nr,
245 volatile unsigned long *addr) 235 volatile unsigned long *addr)
246{ 236{
247 unsigned short bit = nr & SZLONG_MASK; 237 int bit = nr & SZLONG_MASK;
248 unsigned long res; 238 unsigned long res;
249 239
250 smp_mb__before_llsc(); 240 smp_mb__before_llsc();
@@ -281,18 +271,8 @@ static inline int test_and_set_bit(unsigned long nr,
281 } while (unlikely(!res)); 271 } while (unlikely(!res));
282 272
283 res = temp & (1UL << bit); 273 res = temp & (1UL << bit);
284 } else { 274 } else
285 volatile unsigned long *a = addr; 275 res = __mips_test_and_set_bit(nr, addr);
286 unsigned long mask;
287 unsigned long flags;
288
289 a += nr >> SZLONG_LOG;
290 mask = 1UL << bit;
291 raw_local_irq_save(flags);
292 res = (mask & *a);
293 *a |= mask;
294 raw_local_irq_restore(flags);
295 }
296 276
297 smp_llsc_mb(); 277 smp_llsc_mb();
298 278
@@ -310,7 +290,7 @@ static inline int test_and_set_bit(unsigned long nr,
310static inline int test_and_set_bit_lock(unsigned long nr, 290static inline int test_and_set_bit_lock(unsigned long nr,
311 volatile unsigned long *addr) 291 volatile unsigned long *addr)
312{ 292{
313 unsigned short bit = nr & SZLONG_MASK; 293 int bit = nr & SZLONG_MASK;
314 unsigned long res; 294 unsigned long res;
315 295
316 if (kernel_uses_llsc && R10000_LLSC_WAR) { 296 if (kernel_uses_llsc && R10000_LLSC_WAR) {
@@ -345,18 +325,8 @@ static inline int test_and_set_bit_lock(unsigned long nr,
345 } while (unlikely(!res)); 325 } while (unlikely(!res));
346 326
347 res = temp & (1UL << bit); 327 res = temp & (1UL << bit);
348 } else { 328 } else
349 volatile unsigned long *a = addr; 329 res = __mips_test_and_set_bit_lock(nr, addr);
350 unsigned long mask;
351 unsigned long flags;
352
353 a += nr >> SZLONG_LOG;
354 mask = 1UL << bit;
355 raw_local_irq_save(flags);
356 res = (mask & *a);
357 *a |= mask;
358 raw_local_irq_restore(flags);
359 }
360 330
361 smp_llsc_mb(); 331 smp_llsc_mb();
362 332
@@ -373,7 +343,7 @@ static inline int test_and_set_bit_lock(unsigned long nr,
373static inline int test_and_clear_bit(unsigned long nr, 343static inline int test_and_clear_bit(unsigned long nr,
374 volatile unsigned long *addr) 344 volatile unsigned long *addr)
375{ 345{
376 unsigned short bit = nr & SZLONG_MASK; 346 int bit = nr & SZLONG_MASK;
377 unsigned long res; 347 unsigned long res;
378 348
379 smp_mb__before_llsc(); 349 smp_mb__before_llsc();
@@ -428,18 +398,8 @@ static inline int test_and_clear_bit(unsigned long nr,
428 } while (unlikely(!res)); 398 } while (unlikely(!res));
429 399
430 res = temp & (1UL << bit); 400 res = temp & (1UL << bit);
431 } else { 401 } else
432 volatile unsigned long *a = addr; 402 res = __mips_test_and_clear_bit(nr, addr);
433 unsigned long mask;
434 unsigned long flags;
435
436 a += nr >> SZLONG_LOG;
437 mask = 1UL << bit;
438 raw_local_irq_save(flags);
439 res = (mask & *a);
440 *a &= ~mask;
441 raw_local_irq_restore(flags);
442 }
443 403
444 smp_llsc_mb(); 404 smp_llsc_mb();
445 405
@@ -457,7 +417,7 @@ static inline int test_and_clear_bit(unsigned long nr,
457static inline int test_and_change_bit(unsigned long nr, 417static inline int test_and_change_bit(unsigned long nr,
458 volatile unsigned long *addr) 418 volatile unsigned long *addr)
459{ 419{
460 unsigned short bit = nr & SZLONG_MASK; 420 int bit = nr & SZLONG_MASK;
461 unsigned long res; 421 unsigned long res;
462 422
463 smp_mb__before_llsc(); 423 smp_mb__before_llsc();
@@ -494,18 +454,8 @@ static inline int test_and_change_bit(unsigned long nr,
494 } while (unlikely(!res)); 454 } while (unlikely(!res));
495 455
496 res = temp & (1UL << bit); 456 res = temp & (1UL << bit);
497 } else { 457 } else
498 volatile unsigned long *a = addr; 458 res = __mips_test_and_change_bit(nr, addr);
499 unsigned long mask;
500 unsigned long flags;
501
502 a += nr >> SZLONG_LOG;
503 mask = 1UL << bit;
504 raw_local_irq_save(flags);
505 res = (mask & *a);
506 *a ^= mask;
507 raw_local_irq_restore(flags);
508 }
509 459
510 smp_llsc_mb(); 460 smp_llsc_mb();
511 461
diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h
index 58277e0e9cd4..3c5d1464b7bd 100644
--- a/arch/mips/include/asm/compat.h
+++ b/arch/mips/include/asm/compat.h
@@ -290,7 +290,7 @@ struct compat_shmid64_ds {
290 290
291static inline int is_compat_task(void) 291static inline int is_compat_task(void)
292{ 292{
293 return test_thread_flag(TIF_32BIT); 293 return test_thread_flag(TIF_32BIT_ADDR);
294} 294}
295 295
296#endif /* _ASM_COMPAT_H */ 296#endif /* _ASM_COMPAT_H */
diff --git a/arch/mips/include/asm/hugetlb.h b/arch/mips/include/asm/hugetlb.h
index bd94946a18f3..ef99db994c2f 100644
--- a/arch/mips/include/asm/hugetlb.h
+++ b/arch/mips/include/asm/hugetlb.h
@@ -95,7 +95,17 @@ static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma,
95 pte_t *ptep, pte_t pte, 95 pte_t *ptep, pte_t pte,
96 int dirty) 96 int dirty)
97{ 97{
98 return ptep_set_access_flags(vma, addr, ptep, pte, dirty); 98 int changed = !pte_same(*ptep, pte);
99
100 if (changed) {
101 set_pte_at(vma->vm_mm, addr, ptep, pte);
102 /*
103 * There could be some standard sized pages in there,
104 * get them all.
105 */
106 flush_tlb_range(vma, addr, addr + HPAGE_SIZE);
107 }
108 return changed;
99} 109}
100 110
101static inline pte_t huge_ptep_get(pte_t *ptep) 111static inline pte_t huge_ptep_get(pte_t *ptep)
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 29d9c23c20c7..ff2e0345e013 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -15,6 +15,7 @@
15#include <linux/compiler.h> 15#include <linux/compiler.h>
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/types.h> 17#include <linux/types.h>
18#include <linux/irqflags.h>
18 19
19#include <asm/addrspace.h> 20#include <asm/addrspace.h>
20#include <asm/bug.h> 21#include <asm/bug.h>
diff --git a/arch/mips/include/asm/irqflags.h b/arch/mips/include/asm/irqflags.h
index 309cbcd6909c..9f3384c789d7 100644
--- a/arch/mips/include/asm/irqflags.h
+++ b/arch/mips/include/asm/irqflags.h
@@ -16,83 +16,13 @@
16#include <linux/compiler.h> 16#include <linux/compiler.h>
17#include <asm/hazards.h> 17#include <asm/hazards.h>
18 18
19__asm__( 19#if defined(CONFIG_CPU_MIPSR2) && !defined(CONFIG_MIPS_MT_SMTC)
20 " .macro arch_local_irq_enable \n"
21 " .set push \n"
22 " .set reorder \n"
23 " .set noat \n"
24#ifdef CONFIG_MIPS_MT_SMTC
25 " mfc0 $1, $2, 1 # SMTC - clear TCStatus.IXMT \n"
26 " ori $1, 0x400 \n"
27 " xori $1, 0x400 \n"
28 " mtc0 $1, $2, 1 \n"
29#elif defined(CONFIG_CPU_MIPSR2)
30 " ei \n"
31#else
32 " mfc0 $1,$12 \n"
33 " ori $1,0x1f \n"
34 " xori $1,0x1e \n"
35 " mtc0 $1,$12 \n"
36#endif
37 " irq_enable_hazard \n"
38 " .set pop \n"
39 " .endm");
40 20
41extern void smtc_ipi_replay(void);
42
43static inline void arch_local_irq_enable(void)
44{
45#ifdef CONFIG_MIPS_MT_SMTC
46 /*
47 * SMTC kernel needs to do a software replay of queued
48 * IPIs, at the cost of call overhead on each local_irq_enable()
49 */
50 smtc_ipi_replay();
51#endif
52 __asm__ __volatile__(
53 "arch_local_irq_enable"
54 : /* no outputs */
55 : /* no inputs */
56 : "memory");
57}
58
59
60/*
61 * For cli() we have to insert nops to make sure that the new value
62 * has actually arrived in the status register before the end of this
63 * macro.
64 * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
65 * no nops at all.
66 */
67/*
68 * For TX49, operating only IE bit is not enough.
69 *
70 * If mfc0 $12 follows store and the mfc0 is last instruction of a
71 * page and fetching the next instruction causes TLB miss, the result
72 * of the mfc0 might wrongly contain EXL bit.
73 *
74 * ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008
75 *
76 * Workaround: mask EXL bit of the result or place a nop before mfc0.
77 */
78__asm__( 21__asm__(
79 " .macro arch_local_irq_disable\n" 22 " .macro arch_local_irq_disable\n"
80 " .set push \n" 23 " .set push \n"
81 " .set noat \n" 24 " .set noat \n"
82#ifdef CONFIG_MIPS_MT_SMTC
83 " mfc0 $1, $2, 1 \n"
84 " ori $1, 0x400 \n"
85 " .set noreorder \n"
86 " mtc0 $1, $2, 1 \n"
87#elif defined(CONFIG_CPU_MIPSR2)
88 " di \n" 25 " di \n"
89#else
90 " mfc0 $1,$12 \n"
91 " ori $1,0x1f \n"
92 " xori $1,0x1f \n"
93 " .set noreorder \n"
94 " mtc0 $1,$12 \n"
95#endif
96 " irq_disable_hazard \n" 26 " irq_disable_hazard \n"
97 " .set pop \n" 27 " .set pop \n"
98 " .endm \n"); 28 " .endm \n");
@@ -106,46 +36,14 @@ static inline void arch_local_irq_disable(void)
106 : "memory"); 36 : "memory");
107} 37}
108 38
109__asm__(
110 " .macro arch_local_save_flags flags \n"
111 " .set push \n"
112 " .set reorder \n"
113#ifdef CONFIG_MIPS_MT_SMTC
114 " mfc0 \\flags, $2, 1 \n"
115#else
116 " mfc0 \\flags, $12 \n"
117#endif
118 " .set pop \n"
119 " .endm \n");
120
121static inline unsigned long arch_local_save_flags(void)
122{
123 unsigned long flags;
124 asm volatile("arch_local_save_flags %0" : "=r" (flags));
125 return flags;
126}
127 39
128__asm__( 40__asm__(
129 " .macro arch_local_irq_save result \n" 41 " .macro arch_local_irq_save result \n"
130 " .set push \n" 42 " .set push \n"
131 " .set reorder \n" 43 " .set reorder \n"
132 " .set noat \n" 44 " .set noat \n"
133#ifdef CONFIG_MIPS_MT_SMTC
134 " mfc0 \\result, $2, 1 \n"
135 " ori $1, \\result, 0x400 \n"
136 " .set noreorder \n"
137 " mtc0 $1, $2, 1 \n"
138 " andi \\result, \\result, 0x400 \n"
139#elif defined(CONFIG_CPU_MIPSR2)
140 " di \\result \n" 45 " di \\result \n"
141 " andi \\result, 1 \n" 46 " andi \\result, 1 \n"
142#else
143 " mfc0 \\result, $12 \n"
144 " ori $1, \\result, 0x1f \n"
145 " xori $1, 0x1f \n"
146 " .set noreorder \n"
147 " mtc0 $1, $12 \n"
148#endif
149 " irq_disable_hazard \n" 47 " irq_disable_hazard \n"
150 " .set pop \n" 48 " .set pop \n"
151 " .endm \n"); 49 " .endm \n");
@@ -160,61 +58,37 @@ static inline unsigned long arch_local_irq_save(void)
160 return flags; 58 return flags;
161} 59}
162 60
61
163__asm__( 62__asm__(
164 " .macro arch_local_irq_restore flags \n" 63 " .macro arch_local_irq_restore flags \n"
165 " .set push \n" 64 " .set push \n"
166 " .set noreorder \n" 65 " .set noreorder \n"
167 " .set noat \n" 66 " .set noat \n"
168#ifdef CONFIG_MIPS_MT_SMTC 67#if defined(CONFIG_IRQ_CPU)
169 "mfc0 $1, $2, 1 \n"
170 "andi \\flags, 0x400 \n"
171 "ori $1, 0x400 \n"
172 "xori $1, 0x400 \n"
173 "or \\flags, $1 \n"
174 "mtc0 \\flags, $2, 1 \n"
175#elif defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU)
176 /* 68 /*
177 * Slow, but doesn't suffer from a relatively unlikely race 69 * Slow, but doesn't suffer from a relatively unlikely race
178 * condition we're having since days 1. 70 * condition we're having since days 1.
179 */ 71 */
180 " beqz \\flags, 1f \n" 72 " beqz \\flags, 1f \n"
181 " di \n" 73 " di \n"
182 " ei \n" 74 " ei \n"
183 "1: \n" 75 "1: \n"
184#elif defined(CONFIG_CPU_MIPSR2) 76#else
185 /* 77 /*
186 * Fast, dangerous. Life is fun, life is good. 78 * Fast, dangerous. Life is fun, life is good.
187 */ 79 */
188 " mfc0 $1, $12 \n" 80 " mfc0 $1, $12 \n"
189 " ins $1, \\flags, 0, 1 \n" 81 " ins $1, \\flags, 0, 1 \n"
190 " mtc0 $1, $12 \n" 82 " mtc0 $1, $12 \n"
191#else
192 " mfc0 $1, $12 \n"
193 " andi \\flags, 1 \n"
194 " ori $1, 0x1f \n"
195 " xori $1, 0x1f \n"
196 " or \\flags, $1 \n"
197 " mtc0 \\flags, $12 \n"
198#endif 83#endif
199 " irq_disable_hazard \n" 84 " irq_disable_hazard \n"
200 " .set pop \n" 85 " .set pop \n"
201 " .endm \n"); 86 " .endm \n");
202 87
203
204static inline void arch_local_irq_restore(unsigned long flags) 88static inline void arch_local_irq_restore(unsigned long flags)
205{ 89{
206 unsigned long __tmp1; 90 unsigned long __tmp1;
207 91
208#ifdef CONFIG_MIPS_MT_SMTC
209 /*
210 * SMTC kernel needs to do a software replay of queued
211 * IPIs, at the cost of branch and call overhead on each
212 * local_irq_restore()
213 */
214 if (unlikely(!(flags & 0x0400)))
215 smtc_ipi_replay();
216#endif
217
218 __asm__ __volatile__( 92 __asm__ __volatile__(
219 "arch_local_irq_restore\t%0" 93 "arch_local_irq_restore\t%0"
220 : "=r" (__tmp1) 94 : "=r" (__tmp1)
@@ -232,6 +106,75 @@ static inline void __arch_local_irq_restore(unsigned long flags)
232 : "0" (flags) 106 : "0" (flags)
233 : "memory"); 107 : "memory");
234} 108}
109#else
110/* Functions that require preempt_{dis,en}able() are in mips-atomic.c */
111void arch_local_irq_disable(void);
112unsigned long arch_local_irq_save(void);
113void arch_local_irq_restore(unsigned long flags);
114void __arch_local_irq_restore(unsigned long flags);
115#endif /* if defined(CONFIG_CPU_MIPSR2) && !defined(CONFIG_MIPS_MT_SMTC) */
116
117
118__asm__(
119 " .macro arch_local_irq_enable \n"
120 " .set push \n"
121 " .set reorder \n"
122 " .set noat \n"
123#ifdef CONFIG_MIPS_MT_SMTC
124 " mfc0 $1, $2, 1 # SMTC - clear TCStatus.IXMT \n"
125 " ori $1, 0x400 \n"
126 " xori $1, 0x400 \n"
127 " mtc0 $1, $2, 1 \n"
128#elif defined(CONFIG_CPU_MIPSR2)
129 " ei \n"
130#else
131 " mfc0 $1,$12 \n"
132 " ori $1,0x1f \n"
133 " xori $1,0x1e \n"
134 " mtc0 $1,$12 \n"
135#endif
136 " irq_enable_hazard \n"
137 " .set pop \n"
138 " .endm");
139
140extern void smtc_ipi_replay(void);
141
142static inline void arch_local_irq_enable(void)
143{
144#ifdef CONFIG_MIPS_MT_SMTC
145 /*
146 * SMTC kernel needs to do a software replay of queued
147 * IPIs, at the cost of call overhead on each local_irq_enable()
148 */
149 smtc_ipi_replay();
150#endif
151 __asm__ __volatile__(
152 "arch_local_irq_enable"
153 : /* no outputs */
154 : /* no inputs */
155 : "memory");
156}
157
158
159__asm__(
160 " .macro arch_local_save_flags flags \n"
161 " .set push \n"
162 " .set reorder \n"
163#ifdef CONFIG_MIPS_MT_SMTC
164 " mfc0 \\flags, $2, 1 \n"
165#else
166 " mfc0 \\flags, $12 \n"
167#endif
168 " .set pop \n"
169 " .endm \n");
170
171static inline unsigned long arch_local_save_flags(void)
172{
173 unsigned long flags;
174 asm volatile("arch_local_save_flags %0" : "=r" (flags));
175 return flags;
176}
177
235 178
236static inline int arch_irqs_disabled_flags(unsigned long flags) 179static inline int arch_irqs_disabled_flags(unsigned long flags)
237{ 180{
@@ -245,7 +188,7 @@ static inline int arch_irqs_disabled_flags(unsigned long flags)
245#endif 188#endif
246} 189}
247 190
248#endif 191#endif /* #ifndef __ASSEMBLY__ */
249 192
250/* 193/*
251 * Do the CPU's IRQ-state tracing from assembly code. 194 * Do the CPU's IRQ-state tracing from assembly code.
diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h
index 8debe9e91754..18806a52061c 100644
--- a/arch/mips/include/asm/thread_info.h
+++ b/arch/mips/include/asm/thread_info.h
@@ -112,12 +112,6 @@ register struct thread_info *__current_thread_info __asm__("$28");
112#define TIF_LOAD_WATCH 25 /* If set, load watch registers */ 112#define TIF_LOAD_WATCH 25 /* If set, load watch registers */
113#define TIF_SYSCALL_TRACE 31 /* syscall trace active */ 113#define TIF_SYSCALL_TRACE 31 /* syscall trace active */
114 114
115#ifdef CONFIG_MIPS32_O32
116#define TIF_32BIT TIF_32BIT_REGS
117#elif defined(CONFIG_MIPS32_N32)
118#define TIF_32BIT _TIF_32BIT_ADDR
119#endif /* CONFIG_MIPS32_O32 */
120
121#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 115#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
122#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) 116#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
123#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 117#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
diff --git a/arch/mips/include/uapi/asm/ioctls.h b/arch/mips/include/uapi/asm/ioctls.h
index 92403c3d6007..addd56b60694 100644
--- a/arch/mips/include/uapi/asm/ioctls.h
+++ b/arch/mips/include/uapi/asm/ioctls.h
@@ -86,6 +86,9 @@
86#define TIOCGDEV _IOR('T', 0x32, unsigned int) /* Get primary device node of /dev/console */ 86#define TIOCGDEV _IOR('T', 0x32, unsigned int) /* Get primary device node of /dev/console */
87#define TIOCSIG _IOW('T', 0x36, int) /* Generate signal on Pty slave */ 87#define TIOCSIG _IOW('T', 0x36, int) /* Generate signal on Pty slave */
88#define TIOCVHANGUP 0x5437 88#define TIOCVHANGUP 0x5437
89#define TIOCGPKT _IOR('T', 0x38, int) /* Get packet mode state */
90#define TIOCGPTLCK _IOR('T', 0x39, int) /* Get Pty lock state */
91#define TIOCGEXCL _IOR('T', 0x40, int) /* Get exclusive mode state */
89 92
90/* I hope the range from 0x5480 on is free ... */ 93/* I hope the range from 0x5480 on is free ... */
91#define TIOCSCTTY 0x5480 /* become controlling tty */ 94#define TIOCSCTTY 0x5480 /* become controlling tty */
diff --git a/arch/mips/include/uapi/asm/mman.h b/arch/mips/include/uapi/asm/mman.h
index 46d3da0d4b92..9a936ac9a942 100644
--- a/arch/mips/include/uapi/asm/mman.h
+++ b/arch/mips/include/uapi/asm/mman.h
@@ -87,4 +87,15 @@
87/* compatibility flags */ 87/* compatibility flags */
88#define MAP_FILE 0 88#define MAP_FILE 0
89 89
90/*
91 * When MAP_HUGETLB is set bits [26:31] encode the log2 of the huge page size.
92 * This gives us 6 bits, which is enough until someone invents 128 bit address
93 * spaces.
94 *
95 * Assume these are all power of twos.
96 * When 0 use the default page size.
97 */
98#define MAP_HUGE_SHIFT 26
99#define MAP_HUGE_MASK 0x3f
100
90#endif /* _ASM_MMAN_H */ 101#endif /* _ASM_MMAN_H */
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index b1fb7af3c350..cce3782c96c9 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -510,7 +510,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
510 c->cputype = CPU_R3000A; 510 c->cputype = CPU_R3000A;
511 __cpu_name[cpu] = "R3000A"; 511 __cpu_name[cpu] = "R3000A";
512 } 512 }
513 break;
514 } else { 513 } else {
515 c->cputype = CPU_R3000; 514 c->cputype = CPU_R3000;
516 __cpu_name[cpu] = "R3000"; 515 __cpu_name[cpu] = "R3000";
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index a6c133212003..9b00362f32f6 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -36,6 +36,11 @@ FEXPORT(ret_from_exception)
36FEXPORT(ret_from_irq) 36FEXPORT(ret_from_irq)
37 LONG_S s0, TI_REGS($28) 37 LONG_S s0, TI_REGS($28)
38FEXPORT(__ret_from_irq) 38FEXPORT(__ret_from_irq)
39/*
40 * We can be coming here from a syscall done in the kernel space,
41 * e.g. a failed kernel_execve().
42 */
43resume_userspace_check:
39 LONG_L t0, PT_STATUS(sp) # returning to kernel mode? 44 LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
40 andi t0, t0, KU_USER 45 andi t0, t0, KU_USER
41 beqz t0, resume_kernel 46 beqz t0, resume_kernel
@@ -162,7 +167,7 @@ work_notifysig: # deal with pending signals and
162 move a0, sp 167 move a0, sp
163 li a1, 0 168 li a1, 0
164 jal do_notify_resume # a2 already loaded 169 jal do_notify_resume # a2 already loaded
165 j resume_userspace 170 j resume_userspace_check
166 171
167FEXPORT(syscall_exit_partial) 172FEXPORT(syscall_exit_partial)
168 local_irq_disable # make sure need_resched doesn't 173 local_irq_disable # make sure need_resched doesn't
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index f6ba8381ee01..86ec03f0e00c 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -397,14 +397,14 @@ EXPORT(sysn32_call_table)
397 PTR sys_timerfd_create 397 PTR sys_timerfd_create
398 PTR compat_sys_timerfd_gettime /* 6285 */ 398 PTR compat_sys_timerfd_gettime /* 6285 */
399 PTR compat_sys_timerfd_settime 399 PTR compat_sys_timerfd_settime
400 PTR sys_signalfd4 400 PTR compat_sys_signalfd4
401 PTR sys_eventfd2 401 PTR sys_eventfd2
402 PTR sys_epoll_create1 402 PTR sys_epoll_create1
403 PTR sys_dup3 /* 6290 */ 403 PTR sys_dup3 /* 6290 */
404 PTR sys_pipe2 404 PTR sys_pipe2
405 PTR sys_inotify_init1 405 PTR sys_inotify_init1
406 PTR sys_preadv 406 PTR compat_sys_preadv
407 PTR sys_pwritev 407 PTR compat_sys_pwritev
408 PTR compat_sys_rt_tgsigqueueinfo /* 6295 */ 408 PTR compat_sys_rt_tgsigqueueinfo /* 6295 */
409 PTR sys_perf_event_open 409 PTR sys_perf_event_open
410 PTR sys_accept4 410 PTR sys_accept4
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index a53f8ec37aac..290dc6a1d7a3 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -79,7 +79,7 @@ static struct resource data_resource = { .name = "Kernel data", };
79void __init add_memory_region(phys_t start, phys_t size, long type) 79void __init add_memory_region(phys_t start, phys_t size, long type)
80{ 80{
81 int x = boot_mem_map.nr_map; 81 int x = boot_mem_map.nr_map;
82 struct boot_mem_map_entry *prev = boot_mem_map.map + x - 1; 82 int i;
83 83
84 /* Sanity check */ 84 /* Sanity check */
85 if (start + size < start) { 85 if (start + size < start) {
@@ -88,15 +88,29 @@ void __init add_memory_region(phys_t start, phys_t size, long type)
88 } 88 }
89 89
90 /* 90 /*
91 * Try to merge with previous entry if any. This is far less than 91 * Try to merge with existing entry, if any.
92 * perfect but is sufficient for most real world cases.
93 */ 92 */
94 if (x && prev->addr + prev->size == start && prev->type == type) { 93 for (i = 0; i < boot_mem_map.nr_map; i++) {
95 prev->size += size; 94 struct boot_mem_map_entry *entry = boot_mem_map.map + i;
95 unsigned long top;
96
97 if (entry->type != type)
98 continue;
99
100 if (start + size < entry->addr)
101 continue; /* no overlap */
102
103 if (entry->addr + entry->size < start)
104 continue; /* no overlap */
105
106 top = max(entry->addr + entry->size, start + size);
107 entry->addr = min(entry->addr, start);
108 entry->size = top - entry->addr;
109
96 return; 110 return;
97 } 111 }
98 112
99 if (x == BOOT_MEM_MAP_MAX) { 113 if (boot_mem_map.nr_map == BOOT_MEM_MAP_MAX) {
100 pr_err("Ooops! Too many entries in the memory map!\n"); 114 pr_err("Ooops! Too many entries in the memory map!\n");
101 return; 115 return;
102 } 116 }
diff --git a/arch/mips/lantiq/dts/Makefile b/arch/mips/lantiq/dts/Makefile
index 674fca45f72d..6fa72dd641b2 100644
--- a/arch/mips/lantiq/dts/Makefile
+++ b/arch/mips/lantiq/dts/Makefile
@@ -1,4 +1 @@
1obj-$(CONFIG_DT_EASY50712) := easy50712.dtb.o obj-$(CONFIG_DT_EASY50712) := easy50712.dtb.o
2
3$(obj)/%.dtb: $(obj)/%.dts
4 $(call if_changed,dtc)
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index c4a82e841c73..eeddc58802e1 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -2,8 +2,9 @@
2# Makefile for MIPS-specific library files.. 2# Makefile for MIPS-specific library files..
3# 3#
4 4
5lib-y += csum_partial.o delay.o memcpy.o memset.o \ 5lib-y += bitops.o csum_partial.o delay.o memcpy.o memset.o \
6 strlen_user.o strncpy_user.o strnlen_user.o uncached.o 6 mips-atomic.o strlen_user.o strncpy_user.o \
7 strnlen_user.o uncached.o
7 8
8obj-y += iomap.o 9obj-y += iomap.o
9obj-$(CONFIG_PCI) += iomap-pci.o 10obj-$(CONFIG_PCI) += iomap-pci.o
diff --git a/arch/mips/lib/bitops.c b/arch/mips/lib/bitops.c
new file mode 100644
index 000000000000..239a9c957b02
--- /dev/null
+++ b/arch/mips/lib/bitops.c
@@ -0,0 +1,179 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (c) 1994-1997, 99, 2000, 06, 07 Ralf Baechle (ralf@linux-mips.org)
7 * Copyright (c) 1999, 2000 Silicon Graphics, Inc.
8 */
9#include <linux/bitops.h>
10#include <linux/irqflags.h>
11#include <linux/export.h>
12
13
14/**
15 * __mips_set_bit - Atomically set a bit in memory. This is called by
16 * set_bit() if it cannot find a faster solution.
17 * @nr: the bit to set
18 * @addr: the address to start counting from
19 */
20void __mips_set_bit(unsigned long nr, volatile unsigned long *addr)
21{
22 volatile unsigned long *a = addr;
23 unsigned bit = nr & SZLONG_MASK;
24 unsigned long mask;
25 unsigned long flags;
26
27 a += nr >> SZLONG_LOG;
28 mask = 1UL << bit;
29 raw_local_irq_save(flags);
30 *a |= mask;
31 raw_local_irq_restore(flags);
32}
33EXPORT_SYMBOL(__mips_set_bit);
34
35
36/**
37 * __mips_clear_bit - Clears a bit in memory. This is called by clear_bit() if
38 * it cannot find a faster solution.
39 * @nr: Bit to clear
40 * @addr: Address to start counting from
41 */
42void __mips_clear_bit(unsigned long nr, volatile unsigned long *addr)
43{
44 volatile unsigned long *a = addr;
45 unsigned bit = nr & SZLONG_MASK;
46 unsigned long mask;
47 unsigned long flags;
48
49 a += nr >> SZLONG_LOG;
50 mask = 1UL << bit;
51 raw_local_irq_save(flags);
52 *a &= ~mask;
53 raw_local_irq_restore(flags);
54}
55EXPORT_SYMBOL(__mips_clear_bit);
56
57
58/**
59 * __mips_change_bit - Toggle a bit in memory. This is called by change_bit()
60 * if it cannot find a faster solution.
61 * @nr: Bit to change
62 * @addr: Address to start counting from
63 */
64void __mips_change_bit(unsigned long nr, volatile unsigned long *addr)
65{
66 volatile unsigned long *a = addr;
67 unsigned bit = nr & SZLONG_MASK;
68 unsigned long mask;
69 unsigned long flags;
70
71 a += nr >> SZLONG_LOG;
72 mask = 1UL << bit;
73 raw_local_irq_save(flags);
74 *a ^= mask;
75 raw_local_irq_restore(flags);
76}
77EXPORT_SYMBOL(__mips_change_bit);
78
79
80/**
81 * __mips_test_and_set_bit - Set a bit and return its old value. This is
82 * called by test_and_set_bit() if it cannot find a faster solution.
83 * @nr: Bit to set
84 * @addr: Address to count from
85 */
86int __mips_test_and_set_bit(unsigned long nr,
87 volatile unsigned long *addr)
88{
89 volatile unsigned long *a = addr;
90 unsigned bit = nr & SZLONG_MASK;
91 unsigned long mask;
92 unsigned long flags;
93 unsigned long res;
94
95 a += nr >> SZLONG_LOG;
96 mask = 1UL << bit;
97 raw_local_irq_save(flags);
98 res = (mask & *a);
99 *a |= mask;
100 raw_local_irq_restore(flags);
101 return res;
102}
103EXPORT_SYMBOL(__mips_test_and_set_bit);
104
105
106/**
107 * __mips_test_and_set_bit_lock - Set a bit and return its old value. This is
108 * called by test_and_set_bit_lock() if it cannot find a faster solution.
109 * @nr: Bit to set
110 * @addr: Address to count from
111 */
112int __mips_test_and_set_bit_lock(unsigned long nr,
113 volatile unsigned long *addr)
114{
115 volatile unsigned long *a = addr;
116 unsigned bit = nr & SZLONG_MASK;
117 unsigned long mask;
118 unsigned long flags;
119 unsigned long res;
120
121 a += nr >> SZLONG_LOG;
122 mask = 1UL << bit;
123 raw_local_irq_save(flags);
124 res = (mask & *a);
125 *a |= mask;
126 raw_local_irq_restore(flags);
127 return res;
128}
129EXPORT_SYMBOL(__mips_test_and_set_bit_lock);
130
131
132/**
133 * __mips_test_and_clear_bit - Clear a bit and return its old value. This is
134 * called by test_and_clear_bit() if it cannot find a faster solution.
135 * @nr: Bit to clear
136 * @addr: Address to count from
137 */
138int __mips_test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
139{
140 volatile unsigned long *a = addr;
141 unsigned bit = nr & SZLONG_MASK;
142 unsigned long mask;
143 unsigned long flags;
144 unsigned long res;
145
146 a += nr >> SZLONG_LOG;
147 mask = 1UL << bit;
148 raw_local_irq_save(flags);
149 res = (mask & *a);
150 *a &= ~mask;
151 raw_local_irq_restore(flags);
152 return res;
153}
154EXPORT_SYMBOL(__mips_test_and_clear_bit);
155
156
157/**
158 * __mips_test_and_change_bit - Change a bit and return its old value. This is
159 * called by test_and_change_bit() if it cannot find a faster solution.
160 * @nr: Bit to change
161 * @addr: Address to count from
162 */
163int __mips_test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
164{
165 volatile unsigned long *a = addr;
166 unsigned bit = nr & SZLONG_MASK;
167 unsigned long mask;
168 unsigned long flags;
169 unsigned long res;
170
171 a += nr >> SZLONG_LOG;
172 mask = 1UL << bit;
173 raw_local_irq_save(flags);
174 res = (mask & *a);
175 *a ^= mask;
176 raw_local_irq_restore(flags);
177 return res;
178}
179EXPORT_SYMBOL(__mips_test_and_change_bit);
diff --git a/arch/mips/lib/mips-atomic.c b/arch/mips/lib/mips-atomic.c
new file mode 100644
index 000000000000..cd160be3ce4d
--- /dev/null
+++ b/arch/mips/lib/mips-atomic.c
@@ -0,0 +1,176 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 by Ralf Baechle
7 * Copyright (C) 1996 by Paul M. Antoine
8 * Copyright (C) 1999 Silicon Graphics
9 * Copyright (C) 2000 MIPS Technologies, Inc.
10 */
11#include <asm/irqflags.h>
12#include <asm/hazards.h>
13#include <linux/compiler.h>
14#include <linux/preempt.h>
15#include <linux/export.h>
16
17#if !defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT_SMTC)
18
19/*
20 * For cli() we have to insert nops to make sure that the new value
21 * has actually arrived in the status register before the end of this
22 * macro.
23 * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
24 * no nops at all.
25 */
26/*
27 * For TX49, operating only IE bit is not enough.
28 *
29 * If mfc0 $12 follows store and the mfc0 is last instruction of a
30 * page and fetching the next instruction causes TLB miss, the result
31 * of the mfc0 might wrongly contain EXL bit.
32 *
33 * ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008
34 *
35 * Workaround: mask EXL bit of the result or place a nop before mfc0.
36 */
37__asm__(
38 " .macro arch_local_irq_disable\n"
39 " .set push \n"
40 " .set noat \n"
41#ifdef CONFIG_MIPS_MT_SMTC
42 " mfc0 $1, $2, 1 \n"
43 " ori $1, 0x400 \n"
44 " .set noreorder \n"
45 " mtc0 $1, $2, 1 \n"
46#elif defined(CONFIG_CPU_MIPSR2)
47 /* see irqflags.h for inline function */
48#else
49 " mfc0 $1,$12 \n"
50 " ori $1,0x1f \n"
51 " xori $1,0x1f \n"
52 " .set noreorder \n"
53 " mtc0 $1,$12 \n"
54#endif
55 " irq_disable_hazard \n"
56 " .set pop \n"
57 " .endm \n");
58
59notrace void arch_local_irq_disable(void)
60{
61 preempt_disable();
62 __asm__ __volatile__(
63 "arch_local_irq_disable"
64 : /* no outputs */
65 : /* no inputs */
66 : "memory");
67 preempt_enable();
68}
69EXPORT_SYMBOL(arch_local_irq_disable);
70
71
72__asm__(
73 " .macro arch_local_irq_save result \n"
74 " .set push \n"
75 " .set reorder \n"
76 " .set noat \n"
77#ifdef CONFIG_MIPS_MT_SMTC
78 " mfc0 \\result, $2, 1 \n"
79 " ori $1, \\result, 0x400 \n"
80 " .set noreorder \n"
81 " mtc0 $1, $2, 1 \n"
82 " andi \\result, \\result, 0x400 \n"
83#elif defined(CONFIG_CPU_MIPSR2)
84 /* see irqflags.h for inline function */
85#else
86 " mfc0 \\result, $12 \n"
87 " ori $1, \\result, 0x1f \n"
88 " xori $1, 0x1f \n"
89 " .set noreorder \n"
90 " mtc0 $1, $12 \n"
91#endif
92 " irq_disable_hazard \n"
93 " .set pop \n"
94 " .endm \n");
95
96notrace unsigned long arch_local_irq_save(void)
97{
98 unsigned long flags;
99 preempt_disable();
100 asm volatile("arch_local_irq_save\t%0"
101 : "=r" (flags)
102 : /* no inputs */
103 : "memory");
104 preempt_enable();
105 return flags;
106}
107EXPORT_SYMBOL(arch_local_irq_save);
108
109
110__asm__(
111 " .macro arch_local_irq_restore flags \n"
112 " .set push \n"
113 " .set noreorder \n"
114 " .set noat \n"
115#ifdef CONFIG_MIPS_MT_SMTC
116 "mfc0 $1, $2, 1 \n"
117 "andi \\flags, 0x400 \n"
118 "ori $1, 0x400 \n"
119 "xori $1, 0x400 \n"
120 "or \\flags, $1 \n"
121 "mtc0 \\flags, $2, 1 \n"
122#elif defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU)
123 /* see irqflags.h for inline function */
124#elif defined(CONFIG_CPU_MIPSR2)
125 /* see irqflags.h for inline function */
126#else
127 " mfc0 $1, $12 \n"
128 " andi \\flags, 1 \n"
129 " ori $1, 0x1f \n"
130 " xori $1, 0x1f \n"
131 " or \\flags, $1 \n"
132 " mtc0 \\flags, $12 \n"
133#endif
134 " irq_disable_hazard \n"
135 " .set pop \n"
136 " .endm \n");
137
138notrace void arch_local_irq_restore(unsigned long flags)
139{
140 unsigned long __tmp1;
141
142#ifdef CONFIG_MIPS_MT_SMTC
143 /*
144 * SMTC kernel needs to do a software replay of queued
145 * IPIs, at the cost of branch and call overhead on each
146 * local_irq_restore()
147 */
148 if (unlikely(!(flags & 0x0400)))
149 smtc_ipi_replay();
150#endif
151 preempt_disable();
152 __asm__ __volatile__(
153 "arch_local_irq_restore\t%0"
154 : "=r" (__tmp1)
155 : "0" (flags)
156 : "memory");
157 preempt_enable();
158}
159EXPORT_SYMBOL(arch_local_irq_restore);
160
161
162notrace void __arch_local_irq_restore(unsigned long flags)
163{
164 unsigned long __tmp1;
165
166 preempt_disable();
167 __asm__ __volatile__(
168 "arch_local_irq_restore\t%0"
169 : "=r" (__tmp1)
170 : "0" (flags)
171 : "memory");
172 preempt_enable();
173}
174EXPORT_SYMBOL(__arch_local_irq_restore);
175
176#endif /* !defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT_SMTC) */
diff --git a/arch/mips/loongson1/common/platform.c b/arch/mips/loongson1/common/platform.c
index e92d59c4bd78..0412ad61e290 100644
--- a/arch/mips/loongson1/common/platform.c
+++ b/arch/mips/loongson1/common/platform.c
@@ -13,6 +13,7 @@
13#include <linux/phy.h> 13#include <linux/phy.h>
14#include <linux/serial_8250.h> 14#include <linux/serial_8250.h>
15#include <linux/stmmac.h> 15#include <linux/stmmac.h>
16#include <linux/usb/ehci_pdriver.h>
16#include <asm-generic/sizes.h> 17#include <asm-generic/sizes.h>
17 18
18#include <loongson1.h> 19#include <loongson1.h>
@@ -107,13 +108,17 @@ static struct resource ls1x_ehci_resources[] = {
107 }, 108 },
108}; 109};
109 110
111static struct usb_ehci_pdata ls1x_ehci_pdata = {
112};
113
110struct platform_device ls1x_ehci_device = { 114struct platform_device ls1x_ehci_device = {
111 .name = "ls1x-ehci", 115 .name = "ehci-platform",
112 .id = -1, 116 .id = -1,
113 .num_resources = ARRAY_SIZE(ls1x_ehci_resources), 117 .num_resources = ARRAY_SIZE(ls1x_ehci_resources),
114 .resource = ls1x_ehci_resources, 118 .resource = ls1x_ehci_resources,
115 .dev = { 119 .dev = {
116 .dma_mask = &ls1x_ehci_dmamask, 120 .dma_mask = &ls1x_ehci_dmamask,
121 .platform_data = &ls1x_ehci_pdata,
117 }, 122 },
118}; 123};
119 124
diff --git a/arch/mips/mm/mmap.c b/arch/mips/mm/mmap.c
index 302d779d5b0d..d9be7540a6be 100644
--- a/arch/mips/mm/mmap.c
+++ b/arch/mips/mm/mmap.c
@@ -45,18 +45,6 @@ static unsigned long mmap_base(unsigned long rnd)
45 return PAGE_ALIGN(TASK_SIZE - gap - rnd); 45 return PAGE_ALIGN(TASK_SIZE - gap - rnd);
46} 46}
47 47
48static inline unsigned long COLOUR_ALIGN_DOWN(unsigned long addr,
49 unsigned long pgoff)
50{
51 unsigned long base = addr & ~shm_align_mask;
52 unsigned long off = (pgoff << PAGE_SHIFT) & shm_align_mask;
53
54 if (base + off <= addr)
55 return base + off;
56
57 return base - off;
58}
59
60#define COLOUR_ALIGN(addr, pgoff) \ 48#define COLOUR_ALIGN(addr, pgoff) \
61 ((((addr) + shm_align_mask) & ~shm_align_mask) + \ 49 ((((addr) + shm_align_mask) & ~shm_align_mask) + \
62 (((pgoff) << PAGE_SHIFT) & shm_align_mask)) 50 (((pgoff) << PAGE_SHIFT) & shm_align_mask))
@@ -71,6 +59,7 @@ static unsigned long arch_get_unmapped_area_common(struct file *filp,
71 struct vm_area_struct *vma; 59 struct vm_area_struct *vma;
72 unsigned long addr = addr0; 60 unsigned long addr = addr0;
73 int do_color_align; 61 int do_color_align;
62 struct vm_unmapped_area_info info;
74 63
75 if (unlikely(len > TASK_SIZE)) 64 if (unlikely(len > TASK_SIZE))
76 return -ENOMEM; 65 return -ENOMEM;
@@ -107,97 +96,31 @@ static unsigned long arch_get_unmapped_area_common(struct file *filp,
107 return addr; 96 return addr;
108 } 97 }
109 98
110 if (dir == UP) { 99 info.length = len;
111 addr = mm->mmap_base; 100 info.align_mask = do_color_align ? (PAGE_MASK & shm_align_mask) : 0;
112 if (do_color_align) 101 info.align_offset = pgoff << PAGE_SHIFT;
113 addr = COLOUR_ALIGN(addr, pgoff);
114 else
115 addr = PAGE_ALIGN(addr);
116 102
117 for (vma = find_vma(current->mm, addr); ; vma = vma->vm_next) { 103 if (dir == DOWN) {
118 /* At this point: (!vma || addr < vma->vm_end). */ 104 info.flags = VM_UNMAPPED_AREA_TOPDOWN;
119 if (TASK_SIZE - len < addr) 105 info.low_limit = PAGE_SIZE;
120 return -ENOMEM; 106 info.high_limit = mm->mmap_base;
121 if (!vma || addr + len <= vma->vm_start) 107 addr = vm_unmapped_area(&info);
122 return addr; 108
123 addr = vma->vm_end; 109 if (!(addr & ~PAGE_MASK))
124 if (do_color_align) 110 return addr;
125 addr = COLOUR_ALIGN(addr, pgoff);
126 }
127 } else {
128 /* check if free_area_cache is useful for us */
129 if (len <= mm->cached_hole_size) {
130 mm->cached_hole_size = 0;
131 mm->free_area_cache = mm->mmap_base;
132 }
133 111
134 /*
135 * either no address requested, or the mapping can't fit into
136 * the requested address hole
137 */
138 addr = mm->free_area_cache;
139 if (do_color_align) {
140 unsigned long base =
141 COLOUR_ALIGN_DOWN(addr - len, pgoff);
142 addr = base + len;
143 }
144
145 /* make sure it can fit in the remaining address space */
146 if (likely(addr > len)) {
147 vma = find_vma(mm, addr - len);
148 if (!vma || addr <= vma->vm_start) {
149 /* cache the address as a hint for next time */
150 return mm->free_area_cache = addr - len;
151 }
152 }
153
154 if (unlikely(mm->mmap_base < len))
155 goto bottomup;
156
157 addr = mm->mmap_base - len;
158 if (do_color_align)
159 addr = COLOUR_ALIGN_DOWN(addr, pgoff);
160
161 do {
162 /*
163 * Lookup failure means no vma is above this address,
164 * else if new region fits below vma->vm_start,
165 * return with success:
166 */
167 vma = find_vma(mm, addr);
168 if (likely(!vma || addr + len <= vma->vm_start)) {
169 /* cache the address as a hint for next time */
170 return mm->free_area_cache = addr;
171 }
172
173 /* remember the largest hole we saw so far */
174 if (addr + mm->cached_hole_size < vma->vm_start)
175 mm->cached_hole_size = vma->vm_start - addr;
176
177 /* try just below the current vma->vm_start */
178 addr = vma->vm_start - len;
179 if (do_color_align)
180 addr = COLOUR_ALIGN_DOWN(addr, pgoff);
181 } while (likely(len < vma->vm_start));
182
183bottomup:
184 /* 112 /*
185 * A failed mmap() very likely causes application failure, 113 * A failed mmap() very likely causes application failure,
186 * so fall back to the bottom-up function here. This scenario 114 * so fall back to the bottom-up function here. This scenario
187 * can happen with large stack limits and large mmap() 115 * can happen with large stack limits and large mmap()
188 * allocations. 116 * allocations.
189 */ 117 */
190 mm->cached_hole_size = ~0UL;
191 mm->free_area_cache = TASK_UNMAPPED_BASE;
192 addr = arch_get_unmapped_area(filp, addr0, len, pgoff, flags);
193 /*
194 * Restore the topdown base:
195 */
196 mm->free_area_cache = mm->mmap_base;
197 mm->cached_hole_size = ~0UL;
198
199 return addr;
200 } 118 }
119
120 info.flags = 0;
121 info.low_limit = mm->mmap_base;
122 info.high_limit = TASK_SIZE;
123 return vm_unmapped_area(&info);
201} 124}
202 125
203unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr0, 126unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr0,
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index 4b9b935a070e..88e79ad6f811 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -120,18 +120,11 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
120 120
121 if (cpu_context(cpu, mm) != 0) { 121 if (cpu_context(cpu, mm) != 0) {
122 unsigned long size, flags; 122 unsigned long size, flags;
123 int huge = is_vm_hugetlb_page(vma);
124 123
125 ENTER_CRITICAL(flags); 124 ENTER_CRITICAL(flags);
126 if (huge) { 125 start = round_down(start, PAGE_SIZE << 1);
127 start = round_down(start, HPAGE_SIZE); 126 end = round_up(end, PAGE_SIZE << 1);
128 end = round_up(end, HPAGE_SIZE); 127 size = (end - start) >> (PAGE_SHIFT + 1);
129 size = (end - start) >> HPAGE_SHIFT;
130 } else {
131 start = round_down(start, PAGE_SIZE << 1);
132 end = round_up(end, PAGE_SIZE << 1);
133 size = (end - start) >> (PAGE_SHIFT + 1);
134 }
135 if (size <= current_cpu_data.tlbsize/2) { 128 if (size <= current_cpu_data.tlbsize/2) {
136 int oldpid = read_c0_entryhi(); 129 int oldpid = read_c0_entryhi();
137 int newpid = cpu_asid(cpu, mm); 130 int newpid = cpu_asid(cpu, mm);
@@ -140,10 +133,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
140 int idx; 133 int idx;
141 134
142 write_c0_entryhi(start | newpid); 135 write_c0_entryhi(start | newpid);
143 if (huge) 136 start += (PAGE_SIZE << 1);
144 start += HPAGE_SIZE;
145 else
146 start += (PAGE_SIZE << 1);
147 mtc0_tlbw_hazard(); 137 mtc0_tlbw_hazard();
148 tlb_probe(); 138 tlb_probe();
149 tlb_probe_hazard(); 139 tlb_probe_hazard();
diff --git a/arch/mips/mti-malta/malta-platform.c b/arch/mips/mti-malta/malta-platform.c
index 80562b81f0f2..74732177851c 100644
--- a/arch/mips/mti-malta/malta-platform.c
+++ b/arch/mips/mti-malta/malta-platform.c
@@ -29,6 +29,7 @@
29#include <linux/mtd/partitions.h> 29#include <linux/mtd/partitions.h>
30#include <linux/mtd/physmap.h> 30#include <linux/mtd/physmap.h>
31#include <linux/platform_device.h> 31#include <linux/platform_device.h>
32#include <asm/mips-boards/maltaint.h>
32#include <mtd/mtd-abi.h> 33#include <mtd/mtd-abi.h>
33 34
34#define SMC_PORT(base, int) \ 35#define SMC_PORT(base, int) \
@@ -48,7 +49,7 @@ static struct plat_serial8250_port uart8250_data[] = {
48 SMC_PORT(0x2F8, 3), 49 SMC_PORT(0x2F8, 3),
49 { 50 {
50 .mapbase = 0x1f000900, /* The CBUS UART */ 51 .mapbase = 0x1f000900, /* The CBUS UART */
51 .irq = MIPS_CPU_IRQ_BASE + 2, 52 .irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_MB2,
52 .uartclk = 3686400, /* Twice the usual clk! */ 53 .uartclk = 3686400, /* Twice the usual clk! */
53 .iotype = UPIO_MEM32, 54 .iotype = UPIO_MEM32,
54 .flags = CBUS_UART_FLAGS, 55 .flags = CBUS_UART_FLAGS,
diff --git a/arch/mips/netlogic/dts/Makefile b/arch/mips/netlogic/dts/Makefile
index 67ae3fe296f0..d117d46413aa 100644
--- a/arch/mips/netlogic/dts/Makefile
+++ b/arch/mips/netlogic/dts/Makefile
@@ -1,4 +1 @@
1obj-$(CONFIG_DT_XLP_EVP) := xlp_evp.dtb.o obj-$(CONFIG_DT_XLP_EVP) := xlp_evp.dtb.o
2
3$(obj)/%.dtb: $(obj)/%.dts
4 $(call if_changed,dtc)
diff --git a/arch/mips/netlogic/xlr/platform.c b/arch/mips/netlogic/xlr/platform.c
index 71b44d82621d..507230eeb768 100644
--- a/arch/mips/netlogic/xlr/platform.c
+++ b/arch/mips/netlogic/xlr/platform.c
@@ -15,6 +15,8 @@
15#include <linux/serial_8250.h> 15#include <linux/serial_8250.h>
16#include <linux/serial_reg.h> 16#include <linux/serial_reg.h>
17#include <linux/i2c.h> 17#include <linux/i2c.h>
18#include <linux/usb/ehci_pdriver.h>
19#include <linux/usb/ohci_pdriver.h>
18 20
19#include <asm/netlogic/haldefs.h> 21#include <asm/netlogic/haldefs.h>
20#include <asm/netlogic/xlr/iomap.h> 22#include <asm/netlogic/xlr/iomap.h>
@@ -123,12 +125,18 @@ static u64 xls_usb_dmamask = ~(u32)0;
123 }, \ 125 }, \
124 } 126 }
125 127
128static struct usb_ehci_pdata xls_usb_ehci_pdata = {
129 .caps_offset = 0,
130};
131
132static struct usb_ohci_pdata xls_usb_ohci_pdata;
133
126static struct platform_device xls_usb_ehci_device = 134static struct platform_device xls_usb_ehci_device =
127 USB_PLATFORM_DEV("ehci-xls", 0, PIC_USB_IRQ); 135 USB_PLATFORM_DEV("ehci-platform", 0, PIC_USB_IRQ);
128static struct platform_device xls_usb_ohci_device_0 = 136static struct platform_device xls_usb_ohci_device_0 =
129 USB_PLATFORM_DEV("ohci-xls-0", 1, PIC_USB_IRQ); 137 USB_PLATFORM_DEV("ohci-platform", 1, PIC_USB_IRQ);
130static struct platform_device xls_usb_ohci_device_1 = 138static struct platform_device xls_usb_ohci_device_1 =
131 USB_PLATFORM_DEV("ohci-xls-1", 2, PIC_USB_IRQ); 139 USB_PLATFORM_DEV("ohci-platform", 2, PIC_USB_IRQ);
132 140
133static struct platform_device *xls_platform_devices[] = { 141static struct platform_device *xls_platform_devices[] = {
134 &xls_usb_ehci_device, 142 &xls_usb_ehci_device,
@@ -172,14 +180,17 @@ int xls_platform_usb_init(void)
172 memres = CPHYSADDR((unsigned long)usb_mmio); 180 memres = CPHYSADDR((unsigned long)usb_mmio);
173 xls_usb_ehci_device.resource[0].start = memres; 181 xls_usb_ehci_device.resource[0].start = memres;
174 xls_usb_ehci_device.resource[0].end = memres + 0x400 - 1; 182 xls_usb_ehci_device.resource[0].end = memres + 0x400 - 1;
183 xls_usb_ehci_device.dev.platform_data = &xls_usb_ehci_pdata;
175 184
176 memres += 0x400; 185 memres += 0x400;
177 xls_usb_ohci_device_0.resource[0].start = memres; 186 xls_usb_ohci_device_0.resource[0].start = memres;
178 xls_usb_ohci_device_0.resource[0].end = memres + 0x400 - 1; 187 xls_usb_ohci_device_0.resource[0].end = memres + 0x400 - 1;
188 xls_usb_ohci_device_0.dev.platform_data = &xls_usb_ohci_pdata;
179 189
180 memres += 0x400; 190 memres += 0x400;
181 xls_usb_ohci_device_1.resource[0].start = memres; 191 xls_usb_ohci_device_1.resource[0].start = memres;
182 xls_usb_ohci_device_1.resource[0].end = memres + 0x400 - 1; 192 xls_usb_ohci_device_1.resource[0].end = memres + 0x400 - 1;
193 xls_usb_ohci_device_1.dev.platform_data = &xls_usb_ohci_pdata;
183 194
184 return platform_add_devices(xls_platform_devices, 195 return platform_add_devices(xls_platform_devices,
185 ARRAY_SIZE(xls_platform_devices)); 196 ARRAY_SIZE(xls_platform_devices));
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 04e35bcde07c..4040416e0603 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -313,10 +313,8 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
313 } 313 }
314} 314}
315 315
316#ifdef CONFIG_HOTPLUG
317EXPORT_SYMBOL(PCIBIOS_MIN_IO); 316EXPORT_SYMBOL(PCIBIOS_MIN_IO);
318EXPORT_SYMBOL(PCIBIOS_MIN_MEM); 317EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
319#endif
320 318
321int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 319int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
322 enum pci_mmap_state mmap_state, int write_combine) 320 enum pci_mmap_state mmap_state, int write_combine)
diff --git a/arch/mips/pnx8550/common/platform.c b/arch/mips/pnx8550/common/platform.c
index 5264cc09a27b..0a8faeaa7b70 100644
--- a/arch/mips/pnx8550/common/platform.c
+++ b/arch/mips/pnx8550/common/platform.c
@@ -20,6 +20,7 @@
20#include <linux/serial.h> 20#include <linux/serial.h>
21#include <linux/serial_pnx8xxx.h> 21#include <linux/serial_pnx8xxx.h>
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/usb/ohci_pdriver.h>
23 24
24#include <int.h> 25#include <int.h>
25#include <usb.h> 26#include <usb.h>
@@ -96,12 +97,40 @@ static u64 ohci_dmamask = DMA_BIT_MASK(32);
96 97
97static u64 uart_dmamask = DMA_BIT_MASK(32); 98static u64 uart_dmamask = DMA_BIT_MASK(32);
98 99
100static int pnx8550_usb_ohci_power_on(struct platform_device *pdev)
101{
102 /*
103 * Set register CLK48CTL to enable and 48MHz
104 */
105 outl(0x00000003, PCI_BASE | 0x0004770c);
106
107 /*
108 * Set register CLK12CTL to enable and 48MHz
109 */
110 outl(0x00000003, PCI_BASE | 0x00047710);
111
112 udelay(100);
113
114 return 0;
115}
116
117static void pnx8550_usb_ohci_power_off(struct platform_device *pdev)
118{
119 udelay(10);
120}
121
122static struct usb_ohci_pdata pnx8550_usb_ohci_pdata = {
123 .power_on = pnx8550_usb_ohci_power_on,
124 .power_off = pnx8550_usb_ohci_power_off,
125};
126
99static struct platform_device pnx8550_usb_ohci_device = { 127static struct platform_device pnx8550_usb_ohci_device = {
100 .name = "pnx8550-ohci", 128 .name = "ohci-platform",
101 .id = -1, 129 .id = -1,
102 .dev = { 130 .dev = {
103 .dma_mask = &ohci_dmamask, 131 .dma_mask = &ohci_dmamask,
104 .coherent_dma_mask = DMA_BIT_MASK(32), 132 .coherent_dma_mask = DMA_BIT_MASK(32),
133 .platform_data = &pnx8550_usb_ohci_pdata,
105 }, 134 },
106 .num_resources = ARRAY_SIZE(pnx8550_usb_ohci_resources), 135 .num_resources = ARRAY_SIZE(pnx8550_usb_ohci_resources),
107 .resource = pnx8550_usb_ohci_resources, 136 .resource = pnx8550_usb_ohci_resources,
diff --git a/arch/mn10300/include/asm/Kbuild b/arch/mn10300/include/asm/Kbuild
index 4a159da23633..c5d767028306 100644
--- a/arch/mn10300/include/asm/Kbuild
+++ b/arch/mn10300/include/asm/Kbuild
@@ -1,3 +1,4 @@
1 1
2generic-y += clkdev.h 2generic-y += clkdev.h
3generic-y += exec.h 3generic-y += exec.h
4generic-y += trace_clock.h
diff --git a/arch/openrisc/Makefile b/arch/openrisc/Makefile
index 966886c8daf5..4739b8302a58 100644
--- a/arch/openrisc/Makefile
+++ b/arch/openrisc/Makefile
@@ -50,6 +50,6 @@ BUILTIN_DTB := y
50else 50else
51BUILTIN_DTB := n 51BUILTIN_DTB := n
52endif 52endif
53core-$(BUILTIN_DTB) += arch/openrisc/boot/ 53core-$(BUILTIN_DTB) += arch/openrisc/boot/dts/
54 54
55all: vmlinux 55all: vmlinux
diff --git a/arch/openrisc/boot/Makefile b/arch/openrisc/boot/dts/Makefile
index 09958358601a..b092d30d6c23 100644
--- a/arch/openrisc/boot/Makefile
+++ b/arch/openrisc/boot/dts/Makefile
@@ -1,5 +1,3 @@
1
2
3ifneq '$(CONFIG_OPENRISC_BUILTIN_DTB)' '""' 1ifneq '$(CONFIG_OPENRISC_BUILTIN_DTB)' '""'
4BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_OPENRISC_BUILTIN_DTB)).dtb.o 2BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_OPENRISC_BUILTIN_DTB)).dtb.o
5else 3else
@@ -10,6 +8,3 @@ obj-y += $(BUILTIN_DTB)
10clean-files := *.dtb.S 8clean-files := *.dtb.S
11 9
12#DTC_FLAGS ?= -p 1024 10#DTC_FLAGS ?= -p 1024
13
14$(obj)/%.dtb: $(src)/dts/%.dts FORCE
15 $(call if_changed_dep,dtc)
diff --git a/arch/openrisc/include/asm/Kbuild b/arch/openrisc/include/asm/Kbuild
index 78de6805268d..8971026e1c63 100644
--- a/arch/openrisc/include/asm/Kbuild
+++ b/arch/openrisc/include/asm/Kbuild
@@ -60,6 +60,7 @@ generic-y += swab.h
60generic-y += termbits.h 60generic-y += termbits.h
61generic-y += termios.h 61generic-y += termios.h
62generic-y += topology.h 62generic-y += topology.h
63generic-y += trace_clock.h
63generic-y += types.h 64generic-y += types.h
64generic-y += ucontext.h 65generic-y += ucontext.h
65generic-y += user.h 66generic-y += user.h
diff --git a/arch/openrisc/kernel/signal.c b/arch/openrisc/kernel/signal.c
index 30110297f4f9..ddedc8a77861 100644
--- a/arch/openrisc/kernel/signal.c
+++ b/arch/openrisc/kernel/signal.c
@@ -84,7 +84,6 @@ asmlinkage long _sys_rt_sigreturn(struct pt_regs *regs)
84{ 84{
85 struct rt_sigframe *frame = (struct rt_sigframe __user *)regs->sp; 85 struct rt_sigframe *frame = (struct rt_sigframe __user *)regs->sp;
86 sigset_t set; 86 sigset_t set;
87 stack_t st;
88 87
89 /* 88 /*
90 * Since we stacked the signal on a dword boundary, 89 * Since we stacked the signal on a dword boundary,
@@ -104,11 +103,10 @@ asmlinkage long _sys_rt_sigreturn(struct pt_regs *regs)
104 if (restore_sigcontext(regs, &frame->uc.uc_mcontext)) 103 if (restore_sigcontext(regs, &frame->uc.uc_mcontext))
105 goto badframe; 104 goto badframe;
106 105
107 if (__copy_from_user(&st, &frame->uc.uc_stack, sizeof(st)))
108 goto badframe;
109 /* It is more difficult to avoid calling this function than to 106 /* It is more difficult to avoid calling this function than to
110 call it and ignore errors. */ 107 call it and ignore errors. */
111 do_sigaltstack(&st, NULL, regs->sp); 108 if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->sp) == -EFAULT)
109 goto badframe;
112 110
113 return regs->gpr[11]; 111 return regs->gpr[11];
114 112
diff --git a/arch/parisc/include/asm/Kbuild b/arch/parisc/include/asm/Kbuild
index bac8debecffb..ff4c9faed546 100644
--- a/arch/parisc/include/asm/Kbuild
+++ b/arch/parisc/include/asm/Kbuild
@@ -3,3 +3,4 @@ generic-y += word-at-a-time.h auxvec.h user.h cputime.h emergency-restart.h \
3 segment.h topology.h vga.h device.h percpu.h hw_irq.h mutex.h \ 3 segment.h topology.h vga.h device.h percpu.h hw_irq.h mutex.h \
4 div64.h irq_regs.h kdebug.h kvm_para.h local64.h local.h param.h \ 4 div64.h irq_regs.h kdebug.h kvm_para.h local64.h local.h param.h \
5 poll.h xor.h clkdev.h exec.h 5 poll.h xor.h clkdev.h exec.h
6generic-y += trace_clock.h
diff --git a/arch/parisc/include/uapi/asm/ioctls.h b/arch/parisc/include/uapi/asm/ioctls.h
index 054ec06f9e23..66719c38a36b 100644
--- a/arch/parisc/include/uapi/asm/ioctls.h
+++ b/arch/parisc/include/uapi/asm/ioctls.h
@@ -55,6 +55,9 @@
55#define TIOCGDEV _IOR('T',0x32, int) /* Get primary device node of /dev/console */ 55#define TIOCGDEV _IOR('T',0x32, int) /* Get primary device node of /dev/console */
56#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */ 56#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */
57#define TIOCVHANGUP 0x5437 57#define TIOCVHANGUP 0x5437
58#define TIOCGPKT _IOR('T', 0x38, int) /* Get packet mode state */
59#define TIOCGPTLCK _IOR('T', 0x39, int) /* Get Pty lock state */
60#define TIOCGEXCL _IOR('T', 0x40, int) /* Get exclusive mode state */
58 61
59#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */ 62#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
60#define FIOCLEX 0x5451 63#define FIOCLEX 0x5451
diff --git a/arch/parisc/include/uapi/asm/mman.h b/arch/parisc/include/uapi/asm/mman.h
index 12219ebce869..294d251ca7b2 100644
--- a/arch/parisc/include/uapi/asm/mman.h
+++ b/arch/parisc/include/uapi/asm/mman.h
@@ -70,4 +70,15 @@
70#define MAP_FILE 0 70#define MAP_FILE 0
71#define MAP_VARIABLE 0 71#define MAP_VARIABLE 0
72 72
73/*
74 * When MAP_HUGETLB is set bits [26:31] encode the log2 of the huge page size.
75 * This gives us 6 bits, which is enough until someone invents 128 bit address
76 * spaces.
77 *
78 * Assume these are all power of twos.
79 * When 0 use the default page size.
80 */
81#define MAP_HUGE_SHIFT 26
82#define MAP_HUGE_MASK 0x3f
83
73#endif /* __PARISC_MMAN_H__ */ 84#endif /* __PARISC_MMAN_H__ */
diff --git a/arch/parisc/kernel/pdc_cons.c b/arch/parisc/kernel/pdc_cons.c
index 88238638aee6..efc5e7d30530 100644
--- a/arch/parisc/kernel/pdc_cons.c
+++ b/arch/parisc/kernel/pdc_cons.c
@@ -186,13 +186,13 @@ static int __init pdc_console_tty_driver_init(void)
186 printk(KERN_INFO "The PDC console driver is still registered, removing CON_BOOT flag\n"); 186 printk(KERN_INFO "The PDC console driver is still registered, removing CON_BOOT flag\n");
187 pdc_cons.flags &= ~CON_BOOT; 187 pdc_cons.flags &= ~CON_BOOT;
188 188
189 tty_port_init(&tty_port);
190
191 pdc_console_tty_driver = alloc_tty_driver(1); 189 pdc_console_tty_driver = alloc_tty_driver(1);
192 190
193 if (!pdc_console_tty_driver) 191 if (!pdc_console_tty_driver)
194 return -ENOMEM; 192 return -ENOMEM;
195 193
194 tty_port_init(&tty_port);
195
196 pdc_console_tty_driver->driver_name = "pdc_cons"; 196 pdc_console_tty_driver->driver_name = "pdc_cons";
197 pdc_console_tty_driver->name = "ttyB"; 197 pdc_console_tty_driver->name = "ttyB";
198 pdc_console_tty_driver->major = MUX_MAJOR; 198 pdc_console_tty_driver->major = MUX_MAJOR;
@@ -207,6 +207,7 @@ static int __init pdc_console_tty_driver_init(void)
207 err = tty_register_driver(pdc_console_tty_driver); 207 err = tty_register_driver(pdc_console_tty_driver);
208 if (err) { 208 if (err) {
209 printk(KERN_ERR "Unable to register the PDC console TTY driver\n"); 209 printk(KERN_ERR "Unable to register the PDC console TTY driver\n");
210 tty_port_destroy(&tty_port);
210 return err; 211 return err;
211 } 212 }
212 213
diff --git a/arch/parisc/kernel/signal32.c b/arch/parisc/kernel/signal32.c
index fd49aeda9eb8..5dede04f2f3e 100644
--- a/arch/parisc/kernel/signal32.c
+++ b/arch/parisc/kernel/signal32.c
@@ -65,7 +65,8 @@ put_sigset32(compat_sigset_t __user *up, sigset_t *set, size_t sz)
65{ 65{
66 compat_sigset_t s; 66 compat_sigset_t s;
67 67
68 if (sz != sizeof *set) panic("put_sigset32()"); 68 if (sz != sizeof *set)
69 return -EINVAL;
69 sigset_64to32(&s, set); 70 sigset_64to32(&s, set);
70 71
71 return copy_to_user(up, &s, sizeof s); 72 return copy_to_user(up, &s, sizeof s);
@@ -77,7 +78,8 @@ get_sigset32(compat_sigset_t __user *up, sigset_t *set, size_t sz)
77 compat_sigset_t s; 78 compat_sigset_t s;
78 int r; 79 int r;
79 80
80 if (sz != sizeof *set) panic("put_sigset32()"); 81 if (sz != sizeof *set)
82 return -EINVAL;
81 83
82 if ((r = copy_from_user(&s, up, sz)) == 0) { 84 if ((r = copy_from_user(&s, up, sz)) == 0) {
83 sigset_32to64(set, &s); 85 sigset_32to64(set, &s);
diff --git a/arch/parisc/kernel/sys_parisc.c b/arch/parisc/kernel/sys_parisc.c
index 7426e40699bd..f76c10863c62 100644
--- a/arch/parisc/kernel/sys_parisc.c
+++ b/arch/parisc/kernel/sys_parisc.c
@@ -73,6 +73,8 @@ static unsigned long get_shared_area(struct address_space *mapping,
73 struct vm_area_struct *vma; 73 struct vm_area_struct *vma;
74 int offset = mapping ? get_offset(mapping) : 0; 74 int offset = mapping ? get_offset(mapping) : 0;
75 75
76 offset = (offset + (pgoff << PAGE_SHIFT)) & 0x3FF000;
77
76 addr = DCACHE_ALIGN(addr - offset) + offset; 78 addr = DCACHE_ALIGN(addr - offset) + offset;
77 79
78 for (vma = find_vma(current->mm, addr); ; vma = vma->vm_next) { 80 for (vma = find_vma(current->mm, addr); ; vma = vma->vm_next) {
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index 3735abd7f8f6..cbf5d59d5d6a 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -60,7 +60,7 @@
60 ENTRY_SAME(fork_wrapper) 60 ENTRY_SAME(fork_wrapper)
61 ENTRY_SAME(read) 61 ENTRY_SAME(read)
62 ENTRY_SAME(write) 62 ENTRY_SAME(write)
63 ENTRY_SAME(open) /* 5 */ 63 ENTRY_COMP(open) /* 5 */
64 ENTRY_SAME(close) 64 ENTRY_SAME(close)
65 ENTRY_SAME(waitpid) 65 ENTRY_SAME(waitpid)
66 ENTRY_SAME(creat) 66 ENTRY_SAME(creat)
diff --git a/arch/powerpc/boot/dts/mpc5200b.dtsi b/arch/powerpc/boot/dts/mpc5200b.dtsi
index 7ab286ab5300..39ed65a44c5f 100644
--- a/arch/powerpc/boot/dts/mpc5200b.dtsi
+++ b/arch/powerpc/boot/dts/mpc5200b.dtsi
@@ -231,6 +231,12 @@
231 interrupts = <2 7 0>; 231 interrupts = <2 7 0>;
232 }; 232 };
233 233
234 sclpc@3c00 {
235 compatible = "fsl,mpc5200-lpbfifo";
236 reg = <0x3c00 0x60>;
237 interrupts = <2 23 0>;
238 };
239
234 i2c@3d00 { 240 i2c@3d00 {
235 #address-cells = <1>; 241 #address-cells = <1>;
236 #size-cells = <0>; 242 #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/o2d.dtsi b/arch/powerpc/boot/dts/o2d.dtsi
index 3444eb8f0ade..24f668039295 100644
--- a/arch/powerpc/boot/dts/o2d.dtsi
+++ b/arch/powerpc/boot/dts/o2d.dtsi
@@ -86,12 +86,6 @@
86 reg = <0>; 86 reg = <0>;
87 }; 87 };
88 }; 88 };
89
90 sclpc@3c00 {
91 compatible = "fsl,mpc5200-lpbfifo";
92 reg = <0x3c00 0x60>;
93 interrupts = <3 23 0>;
94 };
95 }; 89 };
96 90
97 localbus { 91 localbus {
diff --git a/arch/powerpc/boot/dts/pcm030.dts b/arch/powerpc/boot/dts/pcm030.dts
index 9e354997eb7e..96512c058033 100644
--- a/arch/powerpc/boot/dts/pcm030.dts
+++ b/arch/powerpc/boot/dts/pcm030.dts
@@ -59,7 +59,7 @@
59 #gpio-cells = <2>; 59 #gpio-cells = <2>;
60 }; 60 };
61 61
62 psc@2000 { /* PSC1 in ac97 mode */ 62 audioplatform: psc@2000 { /* PSC1 in ac97 mode */
63 compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97"; 63 compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97";
64 cell-index = <0>; 64 cell-index = <0>;
65 }; 65 };
@@ -134,4 +134,9 @@
134 localbus { 134 localbus {
135 status = "disabled"; 135 status = "disabled";
136 }; 136 };
137
138 sound {
139 compatible = "phytec,pcm030-audio-fabric";
140 asoc-platform = <&audioplatform>;
141 };
137}; 142};
diff --git a/arch/powerpc/include/asm/Kbuild b/arch/powerpc/include/asm/Kbuild
index a4fe15e33c6f..2d62b484b3fc 100644
--- a/arch/powerpc/include/asm/Kbuild
+++ b/arch/powerpc/include/asm/Kbuild
@@ -2,3 +2,4 @@
2 2
3generic-y += clkdev.h 3generic-y += clkdev.h
4generic-y += rwsem.h 4generic-y += rwsem.h
5generic-y += trace_clock.h
diff --git a/arch/powerpc/include/asm/cputime.h b/arch/powerpc/include/asm/cputime.h
index 487d46ff68a1..483733bd06d4 100644
--- a/arch/powerpc/include/asm/cputime.h
+++ b/arch/powerpc/include/asm/cputime.h
@@ -228,6 +228,8 @@ static inline cputime_t clock_t_to_cputime(const unsigned long clk)
228 228
229#define cputime64_to_clock_t(ct) cputime_to_clock_t((cputime_t)(ct)) 229#define cputime64_to_clock_t(ct) cputime_to_clock_t((cputime_t)(ct))
230 230
231static inline void arch_vtime_task_switch(struct task_struct *tsk) { }
232
231#endif /* __KERNEL__ */ 233#endif /* __KERNEL__ */
232#endif /* CONFIG_VIRT_CPU_ACCOUNTING */ 234#endif /* CONFIG_VIRT_CPU_ACCOUNTING */
233#endif /* __POWERPC_CPUTIME_H */ 235#endif /* __POWERPC_CPUTIME_H */
diff --git a/arch/powerpc/include/uapi/asm/ioctls.h b/arch/powerpc/include/uapi/asm/ioctls.h
index e9b78870aaab..49a25796a61a 100644
--- a/arch/powerpc/include/uapi/asm/ioctls.h
+++ b/arch/powerpc/include/uapi/asm/ioctls.h
@@ -97,6 +97,9 @@
97#define TIOCGDEV _IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */ 97#define TIOCGDEV _IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */
98#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */ 98#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */
99#define TIOCVHANGUP 0x5437 99#define TIOCVHANGUP 0x5437
100#define TIOCGPKT _IOR('T', 0x38, int) /* Get packet mode state */
101#define TIOCGPTLCK _IOR('T', 0x39, int) /* Get Pty lock state */
102#define TIOCGEXCL _IOR('T', 0x40, int) /* Get exclusive mode state */
100 103
101#define TIOCSERCONFIG 0x5453 104#define TIOCSERCONFIG 0x5453
102#define TIOCSERGWILD 0x5454 105#define TIOCSERGWILD 0x5454
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 7f94f760dd0c..abc0d0856994 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1428,8 +1428,6 @@ void __init pcibios_resource_survey(void)
1428 ppc_md.pcibios_fixup(); 1428 ppc_md.pcibios_fixup();
1429} 1429}
1430 1430
1431#ifdef CONFIG_HOTPLUG
1432
1433/* This is used by the PCI hotplug driver to allocate resource 1431/* This is used by the PCI hotplug driver to allocate resource
1434 * of newly plugged busses. We can try to consolidate with the 1432 * of newly plugged busses. We can try to consolidate with the
1435 * rest of the code later, for now, keep it as-is as our main 1433 * rest of the code later, for now, keep it as-is as our main
@@ -1488,8 +1486,6 @@ void pcibios_finish_adding_to_bus(struct pci_bus *bus)
1488} 1486}
1489EXPORT_SYMBOL_GPL(pcibios_finish_adding_to_bus); 1487EXPORT_SYMBOL_GPL(pcibios_finish_adding_to_bus);
1490 1488
1491#endif /* CONFIG_HOTPLUG */
1492
1493int pcibios_enable_device(struct pci_dev *dev, int mask) 1489int pcibios_enable_device(struct pci_dev *dev, int mask)
1494{ 1490{
1495 if (ppc_md.pcibios_enable_device_hook) 1491 if (ppc_md.pcibios_enable_device_hook)
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 4ff190ff24a0..2cbe6768fddd 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -74,8 +74,6 @@ static int __init pcibios_init(void)
74 74
75subsys_initcall(pcibios_init); 75subsys_initcall(pcibios_init);
76 76
77#ifdef CONFIG_HOTPLUG
78
79int pcibios_unmap_io_space(struct pci_bus *bus) 77int pcibios_unmap_io_space(struct pci_bus *bus)
80{ 78{
81 struct pci_controller *hose; 79 struct pci_controller *hose;
@@ -124,8 +122,6 @@ int pcibios_unmap_io_space(struct pci_bus *bus)
124} 122}
125EXPORT_SYMBOL_GPL(pcibios_unmap_io_space); 123EXPORT_SYMBOL_GPL(pcibios_unmap_io_space);
126 124
127#endif /* CONFIG_HOTPLUG */
128
129static int __devinit pcibios_map_phb_io_space(struct pci_controller *hose) 125static int __devinit pcibios_map_phb_io_space(struct pci_controller *hose)
130{ 126{
131 struct vm_struct *area; 127 struct vm_struct *area;
diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c
index a2dc75793bd5..3b997118df50 100644
--- a/arch/powerpc/kernel/signal.c
+++ b/arch/powerpc/kernel/signal.c
@@ -158,10 +158,8 @@ static int do_signal(struct pt_regs *regs)
158 158
159void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags) 159void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags)
160{ 160{
161 if (thread_info_flags & _TIF_UPROBE) { 161 if (thread_info_flags & _TIF_UPROBE)
162 clear_thread_flag(TIF_UPROBE);
163 uprobe_notify_resume(regs); 162 uprobe_notify_resume(regs);
164 }
165 163
166 if (thread_info_flags & _TIF_SIGPENDING) 164 if (thread_info_flags & _TIF_SIGPENDING)
167 do_signal(regs); 165 do_signal(regs);
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index cf357a059ddb..3ce1f864c2d3 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -607,7 +607,7 @@ static void register_nodes(void)
607 607
608int sysfs_add_device_to_node(struct device *dev, int nid) 608int sysfs_add_device_to_node(struct device *dev, int nid)
609{ 609{
610 struct node *node = &node_devices[nid]; 610 struct node *node = node_devices[nid];
611 return sysfs_create_link(&node->dev.kobj, &dev->kobj, 611 return sysfs_create_link(&node->dev.kobj, &dev->kobj,
612 kobject_name(&dev->kobj)); 612 kobject_name(&dev->kobj));
613} 613}
@@ -615,7 +615,7 @@ EXPORT_SYMBOL_GPL(sysfs_add_device_to_node);
615 615
616void sysfs_remove_device_from_node(struct device *dev, int nid) 616void sysfs_remove_device_from_node(struct device *dev, int nid)
617{ 617{
618 struct node *node = &node_devices[nid]; 618 struct node *node = node_devices[nid];
619 sysfs_remove_link(&node->dev.kobj, kobject_name(&dev->kobj)); 619 sysfs_remove_link(&node->dev.kobj, kobject_name(&dev->kobj));
620} 620}
621EXPORT_SYMBOL_GPL(sysfs_remove_device_from_node); 621EXPORT_SYMBOL_GPL(sysfs_remove_device_from_node);
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index ce4cb772dc78..b3b14352b05e 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -297,6 +297,8 @@ static u64 vtime_delta(struct task_struct *tsk,
297 u64 now, nowscaled, deltascaled; 297 u64 now, nowscaled, deltascaled;
298 u64 udelta, delta, user_scaled; 298 u64 udelta, delta, user_scaled;
299 299
300 WARN_ON_ONCE(!irqs_disabled());
301
300 now = mftb(); 302 now = mftb();
301 nowscaled = read_spurr(now); 303 nowscaled = read_spurr(now);
302 get_paca()->system_time += now - get_paca()->starttime; 304 get_paca()->system_time += now - get_paca()->starttime;
@@ -355,15 +357,15 @@ void vtime_account_idle(struct task_struct *tsk)
355} 357}
356 358
357/* 359/*
358 * Transfer the user and system times accumulated in the paca 360 * Transfer the user time accumulated in the paca
359 * by the exception entry and exit code to the generic process 361 * by the exception entry and exit code to the generic
360 * user and system time records. 362 * process user time records.
361 * Must be called with interrupts disabled. 363 * Must be called with interrupts disabled.
362 * Assumes that vtime_account() has been called recently 364 * Assumes that vtime_account_system/idle() has been called
363 * (i.e. since the last entry from usermode) so that 365 * recently (i.e. since the last entry from usermode) so that
364 * get_paca()->user_time_scaled is up to date. 366 * get_paca()->user_time_scaled is up to date.
365 */ 367 */
366void account_process_tick(struct task_struct *tsk, int user_tick) 368void vtime_account_user(struct task_struct *tsk)
367{ 369{
368 cputime_t utime, utimescaled; 370 cputime_t utime, utimescaled;
369 371
@@ -375,12 +377,6 @@ void account_process_tick(struct task_struct *tsk, int user_tick)
375 account_user_time(tsk, utime, utimescaled); 377 account_user_time(tsk, utime, utimescaled);
376} 378}
377 379
378void vtime_task_switch(struct task_struct *prev)
379{
380 vtime_account(prev);
381 account_process_tick(prev, 0);
382}
383
384#else /* ! CONFIG_VIRT_CPU_ACCOUNTING */ 380#else /* ! CONFIG_VIRT_CPU_ACCOUNTING */
385#define calc_cputime_factors() 381#define calc_cputime_factors()
386#endif 382#endif
diff --git a/arch/powerpc/kernel/uprobes.c b/arch/powerpc/kernel/uprobes.c
index d2d46d1014f8..bc77834dbf43 100644
--- a/arch/powerpc/kernel/uprobes.c
+++ b/arch/powerpc/kernel/uprobes.c
@@ -64,6 +64,8 @@ int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
64 autask->saved_trap_nr = current->thread.trap_nr; 64 autask->saved_trap_nr = current->thread.trap_nr;
65 current->thread.trap_nr = UPROBE_TRAP_NR; 65 current->thread.trap_nr = UPROBE_TRAP_NR;
66 regs->nip = current->utask->xol_vaddr; 66 regs->nip = current->utask->xol_vaddr;
67
68 user_enable_single_step(current);
67 return 0; 69 return 0;
68} 70}
69 71
@@ -119,6 +121,8 @@ int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
119 * to be executed. 121 * to be executed.
120 */ 122 */
121 regs->nip = utask->vaddr + MAX_UINSN_BYTES; 123 regs->nip = utask->vaddr + MAX_UINSN_BYTES;
124
125 user_disable_single_step(current);
122 return 0; 126 return 0;
123} 127}
124 128
@@ -162,6 +166,8 @@ void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
162 166
163 current->thread.trap_nr = utask->autask.saved_trap_nr; 167 current->thread.trap_nr = utask->autask.saved_trap_nr;
164 instruction_pointer_set(regs, utask->vaddr); 168 instruction_pointer_set(regs, utask->vaddr);
169
170 user_disable_single_step(current);
165} 171}
166 172
167/* 173/*
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index 8520b58a5e9a..b89ef65392dc 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -372,10 +372,11 @@ static int mpc52xx_irqhost_map(struct irq_domain *h, unsigned int virq,
372 case MPC52xx_IRQ_L1_MAIN: irqchip = &mpc52xx_main_irqchip; break; 372 case MPC52xx_IRQ_L1_MAIN: irqchip = &mpc52xx_main_irqchip; break;
373 case MPC52xx_IRQ_L1_PERP: irqchip = &mpc52xx_periph_irqchip; break; 373 case MPC52xx_IRQ_L1_PERP: irqchip = &mpc52xx_periph_irqchip; break;
374 case MPC52xx_IRQ_L1_SDMA: irqchip = &mpc52xx_sdma_irqchip; break; 374 case MPC52xx_IRQ_L1_SDMA: irqchip = &mpc52xx_sdma_irqchip; break;
375 default: 375 case MPC52xx_IRQ_L1_CRIT:
376 pr_err("%s: invalid irq: virq=%i, l1=%i, l2=%i\n", 376 pr_warn("%s: Critical IRQ #%d is unsupported! Nopping it.\n",
377 __func__, virq, l1irq, l2irq); 377 __func__, l2irq);
378 return -EINVAL; 378 irq_set_chip(virq, &no_irq_chip);
379 return 0;
379 } 380 }
380 381
381 irq_set_chip_and_handler(virq, irqchip, handle_level_irq); 382 irq_set_chip_and_handler(virq, irqchip, handle_level_irq);
diff --git a/arch/powerpc/platforms/cell/celleb_pci.c b/arch/powerpc/platforms/cell/celleb_pci.c
index abc8af43ea7c..173568140a32 100644
--- a/arch/powerpc/platforms/cell/celleb_pci.c
+++ b/arch/powerpc/platforms/cell/celleb_pci.c
@@ -401,11 +401,11 @@ error:
401 } else { 401 } else {
402 if (config && *config) { 402 if (config && *config) {
403 size = 256; 403 size = 256;
404 free_bootmem((unsigned long)(*config), size); 404 free_bootmem(__pa(*config), size);
405 } 405 }
406 if (res && *res) { 406 if (res && *res) {
407 size = sizeof(struct celleb_pci_resource); 407 size = sizeof(struct celleb_pci_resource);
408 free_bootmem((unsigned long)(*res), size); 408 free_bootmem(__pa(*res), size);
409 } 409 }
410 } 410 }
411 411
diff --git a/arch/powerpc/platforms/powermac/pfunc_core.c b/arch/powerpc/platforms/powermac/pfunc_core.c
index b0c3777528a1..d588e48dff74 100644
--- a/arch/powerpc/platforms/powermac/pfunc_core.c
+++ b/arch/powerpc/platforms/powermac/pfunc_core.c
@@ -686,7 +686,7 @@ static int pmf_add_functions(struct pmf_device *dev, void *driverdata)
686 int count = 0; 686 int count = 0;
687 687
688 for (pp = dev->node->properties; pp != 0; pp = pp->next) { 688 for (pp = dev->node->properties; pp != 0; pp = pp->next) {
689 char *name; 689 const char *name;
690 if (strncmp(pp->name, PP_PREFIX, plen) != 0) 690 if (strncmp(pp->name, PP_PREFIX, plen) != 0)
691 continue; 691 continue;
692 name = pp->name + plen; 692 name = pp->name + plen;
diff --git a/arch/powerpc/platforms/pseries/eeh_pe.c b/arch/powerpc/platforms/pseries/eeh_pe.c
index 797cd181dc3f..d16c8ded1084 100644
--- a/arch/powerpc/platforms/pseries/eeh_pe.c
+++ b/arch/powerpc/platforms/pseries/eeh_pe.c
@@ -449,7 +449,7 @@ int eeh_rmv_from_parent_pe(struct eeh_dev *edev, int purge_pe)
449 if (list_empty(&pe->edevs)) { 449 if (list_empty(&pe->edevs)) {
450 cnt = 0; 450 cnt = 0;
451 list_for_each_entry(child, &pe->child_list, child) { 451 list_for_each_entry(child, &pe->child_list, child) {
452 if (!(pe->type & EEH_PE_INVALID)) { 452 if (!(child->type & EEH_PE_INVALID)) {
453 cnt++; 453 cnt++;
454 break; 454 break;
455 } 455 }
diff --git a/arch/powerpc/platforms/pseries/msi.c b/arch/powerpc/platforms/pseries/msi.c
index d19f4977c834..e5b084723131 100644
--- a/arch/powerpc/platforms/pseries/msi.c
+++ b/arch/powerpc/platforms/pseries/msi.c
@@ -220,7 +220,8 @@ static struct device_node *find_pe_dn(struct pci_dev *dev, int *total)
220 220
221 /* Get the top level device in the PE */ 221 /* Get the top level device in the PE */
222 edev = of_node_to_eeh_dev(dn); 222 edev = of_node_to_eeh_dev(dn);
223 edev = list_first_entry(&edev->pe->edevs, struct eeh_dev, list); 223 if (edev->pe)
224 edev = list_first_entry(&edev->pe->edevs, struct eeh_dev, list);
224 dn = eeh_dev_to_of_node(edev); 225 dn = eeh_dev_to_of_node(edev);
225 if (!dn) 226 if (!dn)
226 return NULL; 227 return NULL;
diff --git a/arch/powerpc/platforms/pseries/processor_idle.c b/arch/powerpc/platforms/pseries/processor_idle.c
index 45d00e5fe14d..4d806b419606 100644
--- a/arch/powerpc/platforms/pseries/processor_idle.c
+++ b/arch/powerpc/platforms/pseries/processor_idle.c
@@ -36,7 +36,7 @@ static struct cpuidle_state *cpuidle_state_table;
36static inline void idle_loop_prolog(unsigned long *in_purr, ktime_t *kt_before) 36static inline void idle_loop_prolog(unsigned long *in_purr, ktime_t *kt_before)
37{ 37{
38 38
39 *kt_before = ktime_get_real(); 39 *kt_before = ktime_get();
40 *in_purr = mfspr(SPRN_PURR); 40 *in_purr = mfspr(SPRN_PURR);
41 /* 41 /*
42 * Indicate to the HV that we are idle. Now would be 42 * Indicate to the HV that we are idle. Now would be
@@ -50,7 +50,7 @@ static inline s64 idle_loop_epilog(unsigned long in_purr, ktime_t kt_before)
50 get_lppaca()->wait_state_cycles += mfspr(SPRN_PURR) - in_purr; 50 get_lppaca()->wait_state_cycles += mfspr(SPRN_PURR) - in_purr;
51 get_lppaca()->idle = 0; 51 get_lppaca()->idle = 0;
52 52
53 return ktime_to_us(ktime_sub(ktime_get_real(), kt_before)); 53 return ktime_to_us(ktime_sub(ktime_get(), kt_before));
54} 54}
55 55
56static int snooze_loop(struct cpuidle_device *dev, 56static int snooze_loop(struct cpuidle_device *dev,
diff --git a/arch/powerpc/platforms/pseries/reconfig.c b/arch/powerpc/platforms/pseries/reconfig.c
index 39f71fba9b38..2f4668136b20 100644
--- a/arch/powerpc/platforms/pseries/reconfig.c
+++ b/arch/powerpc/platforms/pseries/reconfig.c
@@ -281,12 +281,11 @@ static struct property *new_property(const char *name, const int length,
281 if (!new) 281 if (!new)
282 return NULL; 282 return NULL;
283 283
284 if (!(new->name = kmalloc(strlen(name) + 1, GFP_KERNEL))) 284 if (!(new->name = kstrdup(name, GFP_KERNEL)))
285 goto cleanup; 285 goto cleanup;
286 if (!(new->value = kmalloc(length + 1, GFP_KERNEL))) 286 if (!(new->value = kmalloc(length + 1, GFP_KERNEL)))
287 goto cleanup; 287 goto cleanup;
288 288
289 strcpy(new->name, name);
290 memcpy(new->value, value, length); 289 memcpy(new->value, value, length);
291 *(((char *)new->value) + length) = 0; 290 *(((char *)new->value) + length) = 0;
292 new->length = length; 291 new->length = length;
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index ffb93ae9379b..01b62a62c635 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -136,7 +136,7 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
136 u32 pcicsrbar = 0, pcicsrbar_sz; 136 u32 pcicsrbar = 0, pcicsrbar_sz;
137 u32 piwar = PIWAR_EN | PIWAR_PF | PIWAR_TGI_LOCAL | 137 u32 piwar = PIWAR_EN | PIWAR_PF | PIWAR_TGI_LOCAL |
138 PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP; 138 PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP;
139 char *name = hose->dn->full_name; 139 const char *name = hose->dn->full_name;
140 const u64 *reg; 140 const u64 *reg;
141 int len; 141 int len;
142 142
diff --git a/arch/powerpc/sysdev/scom.c b/arch/powerpc/sysdev/scom.c
index 702256a1ca11..9193e12df695 100644
--- a/arch/powerpc/sysdev/scom.c
+++ b/arch/powerpc/sysdev/scom.c
@@ -157,7 +157,7 @@ static int scom_debug_init_one(struct dentry *root, struct device_node *dn,
157 ent->map = SCOM_MAP_INVALID; 157 ent->map = SCOM_MAP_INVALID;
158 spin_lock_init(&ent->lock); 158 spin_lock_init(&ent->lock);
159 snprintf(ent->name, 8, "scom%d", i); 159 snprintf(ent->name, 8, "scom%d", i);
160 ent->blob.data = dn->full_name; 160 ent->blob.data = (void*) dn->full_name;
161 ent->blob.size = strlen(dn->full_name); 161 ent->blob.size = strlen(dn->full_name);
162 162
163 dir = debugfs_create_dir(ent->name, root); 163 dir = debugfs_create_dir(ent->name, root);
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 5dba755a43e6..d385f396dfee 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -96,6 +96,7 @@ config S390
96 select HAVE_MEMBLOCK_NODE_MAP 96 select HAVE_MEMBLOCK_NODE_MAP
97 select HAVE_CMPXCHG_LOCAL 97 select HAVE_CMPXCHG_LOCAL
98 select HAVE_CMPXCHG_DOUBLE 98 select HAVE_CMPXCHG_DOUBLE
99 select HAVE_ALIGNED_STRUCT_PAGE if SLUB
99 select HAVE_VIRT_CPU_ACCOUNTING 100 select HAVE_VIRT_CPU_ACCOUNTING
100 select VIRT_CPU_ACCOUNTING 101 select VIRT_CPU_ACCOUNTING
101 select ARCH_DISCARD_MEMBLOCK 102 select ARCH_DISCARD_MEMBLOCK
diff --git a/arch/s390/include/asm/Kbuild b/arch/s390/include/asm/Kbuild
index 0633dc6d254d..f313f9cbcf44 100644
--- a/arch/s390/include/asm/Kbuild
+++ b/arch/s390/include/asm/Kbuild
@@ -1,3 +1,4 @@
1 1
2 2
3generic-y += clkdev.h 3generic-y += clkdev.h
4generic-y += trace_clock.h
diff --git a/arch/s390/include/asm/compat.h b/arch/s390/include/asm/compat.h
index a34a9d612fc0..18cd6b592650 100644
--- a/arch/s390/include/asm/compat.h
+++ b/arch/s390/include/asm/compat.h
@@ -20,7 +20,7 @@
20#define PSW32_MASK_CC 0x00003000UL 20#define PSW32_MASK_CC 0x00003000UL
21#define PSW32_MASK_PM 0x00000f00UL 21#define PSW32_MASK_PM 0x00000f00UL
22 22
23#define PSW32_MASK_USER 0x00003F00UL 23#define PSW32_MASK_USER 0x0000FF00UL
24 24
25#define PSW32_ADDR_AMODE 0x80000000UL 25#define PSW32_ADDR_AMODE 0x80000000UL
26#define PSW32_ADDR_INSN 0x7FFFFFFFUL 26#define PSW32_ADDR_INSN 0x7FFFFFFFUL
diff --git a/arch/s390/include/asm/cputime.h b/arch/s390/include/asm/cputime.h
index 023d5ae24482..d2ff41370c0c 100644
--- a/arch/s390/include/asm/cputime.h
+++ b/arch/s390/include/asm/cputime.h
@@ -14,6 +14,7 @@
14 14
15 15
16#define __ARCH_HAS_VTIME_ACCOUNT 16#define __ARCH_HAS_VTIME_ACCOUNT
17#define __ARCH_HAS_VTIME_TASK_SWITCH
17 18
18/* We want to use full resolution of the CPU timer: 2**-12 micro-seconds. */ 19/* We want to use full resolution of the CPU timer: 2**-12 micro-seconds. */
19 20
diff --git a/arch/s390/include/asm/page.h b/arch/s390/include/asm/page.h
index 6d5367060a56..39faa4ac9660 100644
--- a/arch/s390/include/asm/page.h
+++ b/arch/s390/include/asm/page.h
@@ -158,6 +158,9 @@ static inline int page_reset_referenced(unsigned long addr)
158 * race against modification of the referenced bit. This function 158 * race against modification of the referenced bit. This function
159 * should therefore only be called if it is not mapped in any 159 * should therefore only be called if it is not mapped in any
160 * address space. 160 * address space.
161 *
162 * Note that the bit gets set whenever page content is changed. That means
163 * also when the page is modified by DMA or from inside the kernel.
161 */ 164 */
162#define __HAVE_ARCH_PAGE_TEST_AND_CLEAR_DIRTY 165#define __HAVE_ARCH_PAGE_TEST_AND_CLEAR_DIRTY
163static inline int page_test_and_clear_dirty(unsigned long pfn, int mapped) 166static inline int page_test_and_clear_dirty(unsigned long pfn, int mapped)
diff --git a/arch/s390/include/asm/topology.h b/arch/s390/include/asm/topology.h
index 9ca305383760..9935cbd6a46f 100644
--- a/arch/s390/include/asm/topology.h
+++ b/arch/s390/include/asm/topology.h
@@ -8,6 +8,9 @@ struct cpu;
8 8
9#ifdef CONFIG_SCHED_BOOK 9#ifdef CONFIG_SCHED_BOOK
10 10
11extern unsigned char cpu_socket_id[NR_CPUS];
12#define topology_physical_package_id(cpu) (cpu_socket_id[cpu])
13
11extern unsigned char cpu_core_id[NR_CPUS]; 14extern unsigned char cpu_core_id[NR_CPUS];
12extern cpumask_t cpu_core_map[NR_CPUS]; 15extern cpumask_t cpu_core_map[NR_CPUS];
13 16
diff --git a/arch/s390/include/uapi/asm/ptrace.h b/arch/s390/include/uapi/asm/ptrace.h
index 705588a16d70..a5ca214b34fd 100644
--- a/arch/s390/include/uapi/asm/ptrace.h
+++ b/arch/s390/include/uapi/asm/ptrace.h
@@ -239,7 +239,7 @@ typedef struct
239#define PSW_MASK_EA 0x00000000UL 239#define PSW_MASK_EA 0x00000000UL
240#define PSW_MASK_BA 0x00000000UL 240#define PSW_MASK_BA 0x00000000UL
241 241
242#define PSW_MASK_USER 0x00003F00UL 242#define PSW_MASK_USER 0x0000FF00UL
243 243
244#define PSW_ADDR_AMODE 0x80000000UL 244#define PSW_ADDR_AMODE 0x80000000UL
245#define PSW_ADDR_INSN 0x7FFFFFFFUL 245#define PSW_ADDR_INSN 0x7FFFFFFFUL
@@ -269,7 +269,7 @@ typedef struct
269#define PSW_MASK_EA 0x0000000100000000UL 269#define PSW_MASK_EA 0x0000000100000000UL
270#define PSW_MASK_BA 0x0000000080000000UL 270#define PSW_MASK_BA 0x0000000080000000UL
271 271
272#define PSW_MASK_USER 0x00003F8180000000UL 272#define PSW_MASK_USER 0x0000FF8180000000UL
273 273
274#define PSW_ADDR_AMODE 0x0000000000000000UL 274#define PSW_ADDR_AMODE 0x0000000000000000UL
275#define PSW_ADDR_INSN 0xFFFFFFFFFFFFFFFFUL 275#define PSW_ADDR_INSN 0xFFFFFFFFFFFFFFFFUL
diff --git a/arch/s390/kernel/compat_signal.c b/arch/s390/kernel/compat_signal.c
index a1e8a8694bb7..593fcc9253fc 100644
--- a/arch/s390/kernel/compat_signal.c
+++ b/arch/s390/kernel/compat_signal.c
@@ -309,6 +309,10 @@ static int restore_sigregs32(struct pt_regs *regs,_sigregs32 __user *sregs)
309 regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) | 309 regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) |
310 (__u64)(regs32.psw.mask & PSW32_MASK_USER) << 32 | 310 (__u64)(regs32.psw.mask & PSW32_MASK_USER) << 32 |
311 (__u64)(regs32.psw.addr & PSW32_ADDR_AMODE); 311 (__u64)(regs32.psw.addr & PSW32_ADDR_AMODE);
312 /* Check for invalid user address space control. */
313 if ((regs->psw.mask & PSW_MASK_ASC) >= (psw_kernel_bits & PSW_MASK_ASC))
314 regs->psw.mask = (psw_user_bits & PSW_MASK_ASC) |
315 (regs->psw.mask & ~PSW_MASK_ASC);
312 regs->psw.addr = (__u64)(regs32.psw.addr & PSW32_ADDR_INSN); 316 regs->psw.addr = (__u64)(regs32.psw.addr & PSW32_ADDR_INSN);
313 for (i = 0; i < NUM_GPRS; i++) 317 for (i = 0; i < NUM_GPRS; i++)
314 regs->gprs[i] = (__u64) regs32.gprs[i]; 318 regs->gprs[i] = (__u64) regs32.gprs[i];
@@ -481,7 +485,10 @@ static int setup_frame32(int sig, struct k_sigaction *ka,
481 485
482 /* Set up registers for signal handler */ 486 /* Set up registers for signal handler */
483 regs->gprs[15] = (__force __u64) frame; 487 regs->gprs[15] = (__force __u64) frame;
484 regs->psw.mask |= PSW_MASK_BA; /* force amode 31 */ 488 /* Force 31 bit amode and default user address space control. */
489 regs->psw.mask = PSW_MASK_BA |
490 (psw_user_bits & PSW_MASK_ASC) |
491 (regs->psw.mask & ~PSW_MASK_ASC);
485 regs->psw.addr = (__force __u64) ka->sa.sa_handler; 492 regs->psw.addr = (__force __u64) ka->sa.sa_handler;
486 493
487 regs->gprs[2] = map_signal(sig); 494 regs->gprs[2] = map_signal(sig);
@@ -549,7 +556,10 @@ static int setup_rt_frame32(int sig, struct k_sigaction *ka, siginfo_t *info,
549 556
550 /* Set up registers for signal handler */ 557 /* Set up registers for signal handler */
551 regs->gprs[15] = (__force __u64) frame; 558 regs->gprs[15] = (__force __u64) frame;
552 regs->psw.mask |= PSW_MASK_BA; /* force amode 31 */ 559 /* Force 31 bit amode and default user address space control. */
560 regs->psw.mask = PSW_MASK_BA |
561 (psw_user_bits & PSW_MASK_ASC) |
562 (regs->psw.mask & ~PSW_MASK_ASC);
553 regs->psw.addr = (__u64) ka->sa.sa_handler; 563 regs->psw.addr = (__u64) ka->sa.sa_handler;
554 564
555 regs->gprs[2] = map_signal(sig); 565 regs->gprs[2] = map_signal(sig);
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index ad79b846535c..827e094a2f49 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -28,7 +28,7 @@ ENTRY(sys32_open_wrapper)
28 llgtr %r2,%r2 # const char * 28 llgtr %r2,%r2 # const char *
29 lgfr %r3,%r3 # int 29 lgfr %r3,%r3 # int
30 lgfr %r4,%r4 # int 30 lgfr %r4,%r4 # int
31 jg sys_open # branch to system call 31 jg compat_sys_open # branch to system call
32 32
33ENTRY(sys32_close_wrapper) 33ENTRY(sys32_close_wrapper)
34 llgfr %r2,%r2 # unsigned int 34 llgfr %r2,%r2 # unsigned int
diff --git a/arch/s390/kernel/signal.c b/arch/s390/kernel/signal.c
index c13a2a37ef00..d1259d875074 100644
--- a/arch/s390/kernel/signal.c
+++ b/arch/s390/kernel/signal.c
@@ -136,6 +136,10 @@ static int restore_sigregs(struct pt_regs *regs, _sigregs __user *sregs)
136 /* Use regs->psw.mask instead of psw_user_bits to preserve PER bit. */ 136 /* Use regs->psw.mask instead of psw_user_bits to preserve PER bit. */
137 regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) | 137 regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) |
138 (user_sregs.regs.psw.mask & PSW_MASK_USER); 138 (user_sregs.regs.psw.mask & PSW_MASK_USER);
139 /* Check for invalid user address space control. */
140 if ((regs->psw.mask & PSW_MASK_ASC) >= (psw_kernel_bits & PSW_MASK_ASC))
141 regs->psw.mask = (psw_user_bits & PSW_MASK_ASC) |
142 (regs->psw.mask & ~PSW_MASK_ASC);
139 /* Check for invalid amode */ 143 /* Check for invalid amode */
140 if (regs->psw.mask & PSW_MASK_EA) 144 if (regs->psw.mask & PSW_MASK_EA)
141 regs->psw.mask |= PSW_MASK_BA; 145 regs->psw.mask |= PSW_MASK_BA;
@@ -273,7 +277,10 @@ static int setup_frame(int sig, struct k_sigaction *ka,
273 277
274 /* Set up registers for signal handler */ 278 /* Set up registers for signal handler */
275 regs->gprs[15] = (unsigned long) frame; 279 regs->gprs[15] = (unsigned long) frame;
276 regs->psw.mask |= PSW_MASK_EA | PSW_MASK_BA; /* 64 bit amode */ 280 /* Force default amode and default user address space control. */
281 regs->psw.mask = PSW_MASK_EA | PSW_MASK_BA |
282 (psw_user_bits & PSW_MASK_ASC) |
283 (regs->psw.mask & ~PSW_MASK_ASC);
277 regs->psw.addr = (unsigned long) ka->sa.sa_handler | PSW_ADDR_AMODE; 284 regs->psw.addr = (unsigned long) ka->sa.sa_handler | PSW_ADDR_AMODE;
278 285
279 regs->gprs[2] = map_signal(sig); 286 regs->gprs[2] = map_signal(sig);
@@ -346,7 +353,10 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
346 353
347 /* Set up registers for signal handler */ 354 /* Set up registers for signal handler */
348 regs->gprs[15] = (unsigned long) frame; 355 regs->gprs[15] = (unsigned long) frame;
349 regs->psw.mask |= PSW_MASK_EA | PSW_MASK_BA; /* 64 bit amode */ 356 /* Force default amode and default user address space control. */
357 regs->psw.mask = PSW_MASK_EA | PSW_MASK_BA |
358 (psw_user_bits & PSW_MASK_ASC) |
359 (regs->psw.mask & ~PSW_MASK_ASC);
350 regs->psw.addr = (unsigned long) ka->sa.sa_handler | PSW_ADDR_AMODE; 360 regs->psw.addr = (unsigned long) ka->sa.sa_handler | PSW_ADDR_AMODE;
351 361
352 regs->gprs[2] = map_signal(sig); 362 regs->gprs[2] = map_signal(sig);
diff --git a/arch/s390/kernel/topology.c b/arch/s390/kernel/topology.c
index 54d93f4b6818..dd55f7c20104 100644
--- a/arch/s390/kernel/topology.c
+++ b/arch/s390/kernel/topology.c
@@ -40,6 +40,7 @@ static DEFINE_SPINLOCK(topology_lock);
40static struct mask_info core_info; 40static struct mask_info core_info;
41cpumask_t cpu_core_map[NR_CPUS]; 41cpumask_t cpu_core_map[NR_CPUS];
42unsigned char cpu_core_id[NR_CPUS]; 42unsigned char cpu_core_id[NR_CPUS];
43unsigned char cpu_socket_id[NR_CPUS];
43 44
44static struct mask_info book_info; 45static struct mask_info book_info;
45cpumask_t cpu_book_map[NR_CPUS]; 46cpumask_t cpu_book_map[NR_CPUS];
@@ -83,11 +84,12 @@ static struct mask_info *add_cpus_to_mask(struct topology_cpu *tl_cpu,
83 cpumask_set_cpu(lcpu, &book->mask); 84 cpumask_set_cpu(lcpu, &book->mask);
84 cpu_book_id[lcpu] = book->id; 85 cpu_book_id[lcpu] = book->id;
85 cpumask_set_cpu(lcpu, &core->mask); 86 cpumask_set_cpu(lcpu, &core->mask);
87 cpu_core_id[lcpu] = rcpu;
86 if (one_core_per_cpu) { 88 if (one_core_per_cpu) {
87 cpu_core_id[lcpu] = rcpu; 89 cpu_socket_id[lcpu] = rcpu;
88 core = core->next; 90 core = core->next;
89 } else { 91 } else {
90 cpu_core_id[lcpu] = core->id; 92 cpu_socket_id[lcpu] = core->id;
91 } 93 }
92 smp_cpu_set_polarization(lcpu, tl_cpu->pp); 94 smp_cpu_set_polarization(lcpu, tl_cpu->pp);
93 } 95 }
diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c
index 790334427895..e84b8b68444a 100644
--- a/arch/s390/kernel/vtime.c
+++ b/arch/s390/kernel/vtime.c
@@ -112,7 +112,12 @@ void vtime_task_switch(struct task_struct *prev)
112 S390_lowcore.system_timer = ti->system_timer; 112 S390_lowcore.system_timer = ti->system_timer;
113} 113}
114 114
115void account_process_tick(struct task_struct *tsk, int user_tick) 115/*
116 * In s390, accounting pending user time also implies
117 * accounting system time in order to correctly compute
118 * the stolen time accounting.
119 */
120void vtime_account_user(struct task_struct *tsk)
116{ 121{
117 if (do_account_vtime(tsk, HARDIRQ_OFFSET)) 122 if (do_account_vtime(tsk, HARDIRQ_OFFSET))
118 virt_timer_expire(); 123 virt_timer_expire();
@@ -127,6 +132,8 @@ void vtime_account(struct task_struct *tsk)
127 struct thread_info *ti = task_thread_info(tsk); 132 struct thread_info *ti = task_thread_info(tsk);
128 u64 timer, system; 133 u64 timer, system;
129 134
135 WARN_ON_ONCE(!irqs_disabled());
136
130 timer = S390_lowcore.last_update_timer; 137 timer = S390_lowcore.last_update_timer;
131 S390_lowcore.last_update_timer = get_vtimer(); 138 S390_lowcore.last_update_timer = get_vtimer();
132 S390_lowcore.system_timer += timer - S390_lowcore.last_update_timer; 139 S390_lowcore.system_timer += timer - S390_lowcore.last_update_timer;
@@ -140,6 +147,10 @@ void vtime_account(struct task_struct *tsk)
140} 147}
141EXPORT_SYMBOL_GPL(vtime_account); 148EXPORT_SYMBOL_GPL(vtime_account);
142 149
150void vtime_account_system(struct task_struct *tsk)
151__attribute__((alias("vtime_account")));
152EXPORT_SYMBOL_GPL(vtime_account_system);
153
143void __kprobes vtime_stop_cpu(void) 154void __kprobes vtime_stop_cpu(void)
144{ 155{
145 struct s390_idle_data *idle = &__get_cpu_var(s390_idle); 156 struct s390_idle_data *idle = &__get_cpu_var(s390_idle);
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
index ecced9d18986..d91a95568002 100644
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@ -608,9 +608,7 @@ static int __vcpu_run(struct kvm_vcpu *vcpu)
608 kvm_s390_deliver_pending_interrupts(vcpu); 608 kvm_s390_deliver_pending_interrupts(vcpu);
609 609
610 vcpu->arch.sie_block->icptcode = 0; 610 vcpu->arch.sie_block->icptcode = 0;
611 local_irq_disable();
612 kvm_guest_enter(); 611 kvm_guest_enter();
613 local_irq_enable();
614 VCPU_EVENT(vcpu, 6, "entering sie flags %x", 612 VCPU_EVENT(vcpu, 6, "entering sie flags %x",
615 atomic_read(&vcpu->arch.sie_block->cpuflags)); 613 atomic_read(&vcpu->arch.sie_block->cpuflags));
616 trace_kvm_s390_sie_enter(vcpu, 614 trace_kvm_s390_sie_enter(vcpu,
@@ -629,9 +627,7 @@ static int __vcpu_run(struct kvm_vcpu *vcpu)
629 VCPU_EVENT(vcpu, 6, "exit sie icptcode %d", 627 VCPU_EVENT(vcpu, 6, "exit sie icptcode %d",
630 vcpu->arch.sie_block->icptcode); 628 vcpu->arch.sie_block->icptcode);
631 trace_kvm_s390_sie_exit(vcpu, vcpu->arch.sie_block->icptcode); 629 trace_kvm_s390_sie_exit(vcpu, vcpu->arch.sie_block->icptcode);
632 local_irq_disable();
633 kvm_guest_exit(); 630 kvm_guest_exit();
634 local_irq_enable();
635 631
636 memcpy(&vcpu->run->s.regs.gprs[14], &vcpu->arch.sie_block->gg14, 16); 632 memcpy(&vcpu->run->s.regs.gprs[14], &vcpu->arch.sie_block->gg14, 16);
637 return rc; 633 return rc;
diff --git a/arch/s390/mm/gup.c b/arch/s390/mm/gup.c
index 8b8285310b5a..1f5315d1215c 100644
--- a/arch/s390/mm/gup.c
+++ b/arch/s390/mm/gup.c
@@ -180,8 +180,7 @@ int __get_user_pages_fast(unsigned long start, int nr_pages, int write,
180 addr = start; 180 addr = start;
181 len = (unsigned long) nr_pages << PAGE_SHIFT; 181 len = (unsigned long) nr_pages << PAGE_SHIFT;
182 end = start + len; 182 end = start + len;
183 if (unlikely(!access_ok(write ? VERIFY_WRITE : VERIFY_READ, 183 if ((end < start) || (end > TASK_SIZE))
184 (void __user *)start, len)))
185 return 0; 184 return 0;
186 185
187 local_irq_save(flags); 186 local_irq_save(flags);
@@ -229,7 +228,7 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
229 addr = start; 228 addr = start;
230 len = (unsigned long) nr_pages << PAGE_SHIFT; 229 len = (unsigned long) nr_pages << PAGE_SHIFT;
231 end = start + len; 230 end = start + len;
232 if (end < start) 231 if ((end < start) || (end > TASK_SIZE))
233 goto slow_irqon; 232 goto slow_irqon;
234 233
235 /* 234 /*
diff --git a/arch/score/include/asm/Kbuild b/arch/score/include/asm/Kbuild
index ec697aeefd05..16e41fe1a419 100644
--- a/arch/score/include/asm/Kbuild
+++ b/arch/score/include/asm/Kbuild
@@ -3,3 +3,4 @@ include include/asm-generic/Kbuild.asm
3header-y += 3header-y +=
4 4
5generic-y += clkdev.h 5generic-y += clkdev.h
6generic-y += trace_clock.h
diff --git a/arch/score/kernel/signal.c b/arch/score/kernel/signal.c
index c268bbf8b410..02353bde92d8 100644
--- a/arch/score/kernel/signal.c
+++ b/arch/score/kernel/signal.c
@@ -148,7 +148,6 @@ score_rt_sigreturn(struct pt_regs *regs)
148{ 148{
149 struct rt_sigframe __user *frame; 149 struct rt_sigframe __user *frame;
150 sigset_t set; 150 sigset_t set;
151 stack_t st;
152 int sig; 151 int sig;
153 152
154 /* Always make any pending restarted system calls return -EINTR */ 153 /* Always make any pending restarted system calls return -EINTR */
@@ -168,12 +167,10 @@ score_rt_sigreturn(struct pt_regs *regs)
168 else if (sig) 167 else if (sig)
169 force_sig(sig, current); 168 force_sig(sig, current);
170 169
171 if (__copy_from_user(&st, &frame->rs_uc.uc_stack, sizeof(st)))
172 goto badframe;
173
174 /* It is more difficult to avoid calling this function than to 170 /* It is more difficult to avoid calling this function than to
175 call it and ignore errors. */ 171 call it and ignore errors. */
176 do_sigaltstack((stack_t __user *)&st, NULL, regs->regs[0]); 172 if (do_sigaltstack(&frame->rs_uc.uc_stack, NULL, regs->regs[0]) == -EFAULT)
173 goto badframe;
177 regs->is_syscall = 0; 174 regs->is_syscall = 0;
178 175
179 __asm__ __volatile__( 176 __asm__ __volatile__(
diff --git a/arch/sh/configs/ecovec24_defconfig b/arch/sh/configs/ecovec24_defconfig
index 911e30c9abfd..c6c2becdc8ab 100644
--- a/arch/sh/configs/ecovec24_defconfig
+++ b/arch/sh/configs/ecovec24_defconfig
@@ -112,7 +112,7 @@ CONFIG_USB_MON=y
112CONFIG_USB_R8A66597_HCD=y 112CONFIG_USB_R8A66597_HCD=y
113CONFIG_USB_STORAGE=y 113CONFIG_USB_STORAGE=y
114CONFIG_USB_GADGET=y 114CONFIG_USB_GADGET=y
115CONFIG_USB_FILE_STORAGE=m 115CONFIG_USB_MASS_STORAGE=m
116CONFIG_MMC=y 116CONFIG_MMC=y
117CONFIG_MMC_SPI=y 117CONFIG_MMC_SPI=y
118CONFIG_MMC_SDHI=y 118CONFIG_MMC_SDHI=y
diff --git a/arch/sh/configs/se7724_defconfig b/arch/sh/configs/se7724_defconfig
index ed35093e3758..1faa788aecae 100644
--- a/arch/sh/configs/se7724_defconfig
+++ b/arch/sh/configs/se7724_defconfig
@@ -109,7 +109,7 @@ CONFIG_USB_STORAGE=y
109CONFIG_USB_GADGET=y 109CONFIG_USB_GADGET=y
110CONFIG_USB_ETH=m 110CONFIG_USB_ETH=m
111CONFIG_USB_GADGETFS=m 111CONFIG_USB_GADGETFS=m
112CONFIG_USB_FILE_STORAGE=m 112CONFIG_USB_MASS_STORAGE=m
113CONFIG_USB_G_SERIAL=m 113CONFIG_USB_G_SERIAL=m
114CONFIG_MMC=y 114CONFIG_MMC=y
115CONFIG_MMC_SPI=y 115CONFIG_MMC_SPI=y
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index a7e078f2e2e4..81e5dafed3e4 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -319,7 +319,5 @@ EXPORT_SYMBOL(pci_iounmap);
319 319
320#endif /* CONFIG_GENERIC_IOMAP */ 320#endif /* CONFIG_GENERIC_IOMAP */
321 321
322#ifdef CONFIG_HOTPLUG
323EXPORT_SYMBOL(PCIBIOS_MIN_IO); 322EXPORT_SYMBOL(PCIBIOS_MIN_IO);
324EXPORT_SYMBOL(PCIBIOS_MIN_MEM); 323EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
325#endif
diff --git a/arch/sh/include/asm/Kbuild b/arch/sh/include/asm/Kbuild
index 29f83beeef7a..280bea9e5e2b 100644
--- a/arch/sh/include/asm/Kbuild
+++ b/arch/sh/include/asm/Kbuild
@@ -31,5 +31,6 @@ generic-y += socket.h
31generic-y += statfs.h 31generic-y += statfs.h
32generic-y += termbits.h 32generic-y += termbits.h
33generic-y += termios.h 33generic-y += termios.h
34generic-y += trace_clock.h
34generic-y += ucontext.h 35generic-y += ucontext.h
35generic-y += xor.h 36generic-y += xor.h
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 73a23f4617a3..629db2ad7916 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -382,7 +382,7 @@ static inline int iounmap_fixed(void __iomem *addr) { return -EINVAL; }
382#define xlate_dev_kmem_ptr(p) p 382#define xlate_dev_kmem_ptr(p) p
383 383
384#define ARCH_HAS_VALID_PHYS_ADDR_RANGE 384#define ARCH_HAS_VALID_PHYS_ADDR_RANGE
385int valid_phys_addr_range(unsigned long addr, size_t size); 385int valid_phys_addr_range(phys_addr_t addr, size_t size);
386int valid_mmap_phys_addr_range(unsigned long pfn, size_t size); 386int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
387 387
388#endif /* __KERNEL__ */ 388#endif /* __KERNEL__ */
diff --git a/arch/sh/include/uapi/asm/ioctls.h b/arch/sh/include/uapi/asm/ioctls.h
index a6769f352bf6..342241079760 100644
--- a/arch/sh/include/uapi/asm/ioctls.h
+++ b/arch/sh/include/uapi/asm/ioctls.h
@@ -88,6 +88,9 @@
88#define TIOCGDEV _IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */ 88#define TIOCGDEV _IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */
89#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */ 89#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */
90#define TIOCVHANGUP _IO('T', 0x37) 90#define TIOCVHANGUP _IO('T', 0x37)
91#define TIOCGPKT _IOR('T', 0x38, int) /* Get packet mode state */
92#define TIOCGPTLCK _IOR('T', 0x39, int) /* Get Pty lock state */
93#define TIOCGEXCL _IOR('T', 0x40, int) /* Get exclusive mode state */
91 94
92#define TIOCSERCONFIG _IO('T', 83) /* 0x5453 */ 95#define TIOCSERCONFIG _IO('T', 83) /* 0x5453 */
93#define TIOCSERGWILD _IOR('T', 84, int) /* 0x5454 */ 96#define TIOCSERGWILD _IOR('T', 84, int) /* 0x5454 */
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index 0c2f1b2c2e19..42d991f632b1 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -20,6 +20,7 @@
20#include <linux/serial_sci.h> 20#include <linux/serial_sci.h>
21#include <linux/sh_timer.h> 21#include <linux/sh_timer.h>
22#include <linux/sh_intc.h> 22#include <linux/sh_intc.h>
23#include <linux/usb/ohci_pdriver.h>
23#include <asm/rtc.h> 24#include <asm/rtc.h>
24#include <cpu/serial.h> 25#include <cpu/serial.h>
25 26
@@ -103,12 +104,15 @@ static struct resource usb_ohci_resources[] = {
103 104
104static u64 usb_ohci_dma_mask = 0xffffffffUL; 105static u64 usb_ohci_dma_mask = 0xffffffffUL;
105 106
107static struct usb_ohci_pdata usb_ohci_pdata;
108
106static struct platform_device usb_ohci_device = { 109static struct platform_device usb_ohci_device = {
107 .name = "sh_ohci", 110 .name = "ohci-platform",
108 .id = -1, 111 .id = -1,
109 .dev = { 112 .dev = {
110 .dma_mask = &usb_ohci_dma_mask, 113 .dma_mask = &usb_ohci_dma_mask,
111 .coherent_dma_mask = 0xffffffff, 114 .coherent_dma_mask = 0xffffffff,
115 .platform_data = &usb_ohci_pdata,
112 }, 116 },
113 .num_resources = ARRAY_SIZE(usb_ohci_resources), 117 .num_resources = ARRAY_SIZE(usb_ohci_resources),
114 .resource = usb_ohci_resources, 118 .resource = usb_ohci_resources,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index 4a2f357f4df8..9079a0f9ea9b 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -19,6 +19,7 @@
19#include <linux/sh_timer.h> 19#include <linux/sh_timer.h>
20#include <linux/sh_dma.h> 20#include <linux/sh_dma.h>
21#include <linux/sh_intc.h> 21#include <linux/sh_intc.h>
22#include <linux/usb/ohci_pdriver.h>
22#include <cpu/dma-register.h> 23#include <cpu/dma-register.h>
23#include <cpu/sh7757.h> 24#include <cpu/sh7757.h>
24 25
@@ -750,12 +751,15 @@ static struct resource usb_ohci_resources[] = {
750 }, 751 },
751}; 752};
752 753
754static struct usb_ohci_pdata usb_ohci_pdata;
755
753static struct platform_device usb_ohci_device = { 756static struct platform_device usb_ohci_device = {
754 .name = "sh_ohci", 757 .name = "ohci-platform",
755 .id = -1, 758 .id = -1,
756 .dev = { 759 .dev = {
757 .dma_mask = &usb_ohci_device.dev.coherent_dma_mask, 760 .dma_mask = &usb_ohci_device.dev.coherent_dma_mask,
758 .coherent_dma_mask = DMA_BIT_MASK(32), 761 .coherent_dma_mask = DMA_BIT_MASK(32),
762 .platform_data = &usb_ohci_pdata,
759 }, 763 },
760 .num_resources = ARRAY_SIZE(usb_ohci_resources), 764 .num_resources = ARRAY_SIZE(usb_ohci_resources),
761 .resource = usb_ohci_resources, 765 .resource = usb_ohci_resources,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index bd0a8fbe610f..1686acaaf45a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -16,6 +16,7 @@
16#include <linux/sh_intc.h> 16#include <linux/sh_intc.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/serial_sci.h> 18#include <linux/serial_sci.h>
19#include <linux/usb/ohci_pdriver.h>
19 20
20static struct plat_sci_port scif0_platform_data = { 21static struct plat_sci_port scif0_platform_data = {
21 .mapbase = 0xffe00000, 22 .mapbase = 0xffe00000,
@@ -106,12 +107,15 @@ static struct resource usb_ohci_resources[] = {
106 107
107static u64 usb_ohci_dma_mask = 0xffffffffUL; 108static u64 usb_ohci_dma_mask = 0xffffffffUL;
108 109
110static struct usb_ohci_pdata usb_ohci_pdata;
111
109static struct platform_device usb_ohci_device = { 112static struct platform_device usb_ohci_device = {
110 .name = "sh_ohci", 113 .name = "ohci-platform",
111 .id = -1, 114 .id = -1,
112 .dev = { 115 .dev = {
113 .dma_mask = &usb_ohci_dma_mask, 116 .dma_mask = &usb_ohci_dma_mask,
114 .coherent_dma_mask = 0xffffffff, 117 .coherent_dma_mask = 0xffffffff,
118 .platform_data = &usb_ohci_pdata,
115 }, 119 },
116 .num_resources = ARRAY_SIZE(usb_ohci_resources), 120 .num_resources = ARRAY_SIZE(usb_ohci_resources),
117 .resource = usb_ohci_resources, 121 .resource = usb_ohci_resources,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index 2e6952f87848..ab52d4d4484d 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -23,6 +23,7 @@
23#include <linux/sh_timer.h> 23#include <linux/sh_timer.h>
24#include <linux/sh_dma.h> 24#include <linux/sh_dma.h>
25#include <linux/sh_intc.h> 25#include <linux/sh_intc.h>
26#include <linux/usb/ohci_pdriver.h>
26#include <cpu/dma-register.h> 27#include <cpu/dma-register.h>
27#include <asm/mmzone.h> 28#include <asm/mmzone.h>
28 29
@@ -583,12 +584,15 @@ static struct resource usb_ohci_resources[] = {
583 }, 584 },
584}; 585};
585 586
587static struct usb_ohci_pdata usb_ohci_pdata;
588
586static struct platform_device usb_ohci_device = { 589static struct platform_device usb_ohci_device = {
587 .name = "sh_ohci", 590 .name = "ohci-platform",
588 .id = -1, 591 .id = -1,
589 .dev = { 592 .dev = {
590 .dma_mask = &usb_ohci_device.dev.coherent_dma_mask, 593 .dma_mask = &usb_ohci_device.dev.coherent_dma_mask,
591 .coherent_dma_mask = DMA_BIT_MASK(32), 594 .coherent_dma_mask = DMA_BIT_MASK(32),
595 .platform_data = &usb_ohci_pdata,
592 }, 596 },
593 .num_resources = ARRAY_SIZE(usb_ohci_resources), 597 .num_resources = ARRAY_SIZE(usb_ohci_resources),
594 .resource = usb_ohci_resources, 598 .resource = usb_ohci_resources,
diff --git a/arch/sh/kernel/signal_64.c b/arch/sh/kernel/signal_64.c
index 23853814bd17..d867cd95a622 100644
--- a/arch/sh/kernel/signal_64.c
+++ b/arch/sh/kernel/signal_64.c
@@ -347,7 +347,6 @@ asmlinkage int sys_rt_sigreturn(unsigned long r2, unsigned long r3,
347{ 347{
348 struct rt_sigframe __user *frame = (struct rt_sigframe __user *) (long) REF_REG_SP; 348 struct rt_sigframe __user *frame = (struct rt_sigframe __user *) (long) REF_REG_SP;
349 sigset_t set; 349 sigset_t set;
350 stack_t __user st;
351 long long ret; 350 long long ret;
352 351
353 /* Always make any pending restarted system calls return -EINTR */ 352 /* Always make any pending restarted system calls return -EINTR */
@@ -365,11 +364,10 @@ asmlinkage int sys_rt_sigreturn(unsigned long r2, unsigned long r3,
365 goto badframe; 364 goto badframe;
366 regs->pc -= 4; 365 regs->pc -= 4;
367 366
368 if (__copy_from_user(&st, &frame->uc.uc_stack, sizeof(st)))
369 goto badframe;
370 /* It is more difficult to avoid calling this function than to 367 /* It is more difficult to avoid calling this function than to
371 call it and ignore errors. */ 368 call it and ignore errors. */
372 do_sigaltstack(&st, NULL, REF_REG_SP); 369 if (do_sigaltstack(&frame->uc.uc_stack, NULL, REF_REG_SP) == -EFAULT)
370 goto badframe;
373 371
374 return (int) ret; 372 return (int) ret;
375 373
diff --git a/arch/sh/mm/mmap.c b/arch/sh/mm/mmap.c
index afeb710ec5c3..6777177807c2 100644
--- a/arch/sh/mm/mmap.c
+++ b/arch/sh/mm/mmap.c
@@ -30,25 +30,13 @@ static inline unsigned long COLOUR_ALIGN(unsigned long addr,
30 return base + off; 30 return base + off;
31} 31}
32 32
33static inline unsigned long COLOUR_ALIGN_DOWN(unsigned long addr,
34 unsigned long pgoff)
35{
36 unsigned long base = addr & ~shm_align_mask;
37 unsigned long off = (pgoff << PAGE_SHIFT) & shm_align_mask;
38
39 if (base + off <= addr)
40 return base + off;
41
42 return base - off;
43}
44
45unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, 33unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
46 unsigned long len, unsigned long pgoff, unsigned long flags) 34 unsigned long len, unsigned long pgoff, unsigned long flags)
47{ 35{
48 struct mm_struct *mm = current->mm; 36 struct mm_struct *mm = current->mm;
49 struct vm_area_struct *vma; 37 struct vm_area_struct *vma;
50 unsigned long start_addr;
51 int do_colour_align; 38 int do_colour_align;
39 struct vm_unmapped_area_info info;
52 40
53 if (flags & MAP_FIXED) { 41 if (flags & MAP_FIXED) {
54 /* We do not accept a shared mapping if it would violate 42 /* We do not accept a shared mapping if it would violate
@@ -79,47 +67,13 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
79 return addr; 67 return addr;
80 } 68 }
81 69
82 if (len > mm->cached_hole_size) { 70 info.flags = 0;
83 start_addr = addr = mm->free_area_cache; 71 info.length = len;
84 } else { 72 info.low_limit = TASK_UNMAPPED_BASE;
85 mm->cached_hole_size = 0; 73 info.high_limit = TASK_SIZE;
86 start_addr = addr = TASK_UNMAPPED_BASE; 74 info.align_mask = do_colour_align ? (PAGE_MASK & shm_align_mask) : 0;
87 } 75 info.align_offset = pgoff << PAGE_SHIFT;
88 76 return vm_unmapped_area(&info);
89full_search:
90 if (do_colour_align)
91 addr = COLOUR_ALIGN(addr, pgoff);
92 else
93 addr = PAGE_ALIGN(mm->free_area_cache);
94
95 for (vma = find_vma(mm, addr); ; vma = vma->vm_next) {
96 /* At this point: (!vma || addr < vma->vm_end). */
97 if (unlikely(TASK_SIZE - len < addr)) {
98 /*
99 * Start a new search - just in case we missed
100 * some holes.
101 */
102 if (start_addr != TASK_UNMAPPED_BASE) {
103 start_addr = addr = TASK_UNMAPPED_BASE;
104 mm->cached_hole_size = 0;
105 goto full_search;
106 }
107 return -ENOMEM;
108 }
109 if (likely(!vma || addr + len <= vma->vm_start)) {
110 /*
111 * Remember the place where we stopped the search:
112 */
113 mm->free_area_cache = addr + len;
114 return addr;
115 }
116 if (addr + mm->cached_hole_size < vma->vm_start)
117 mm->cached_hole_size = vma->vm_start - addr;
118
119 addr = vma->vm_end;
120 if (do_colour_align)
121 addr = COLOUR_ALIGN(addr, pgoff);
122 }
123} 77}
124 78
125unsigned long 79unsigned long
@@ -131,6 +85,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
131 struct mm_struct *mm = current->mm; 85 struct mm_struct *mm = current->mm;
132 unsigned long addr = addr0; 86 unsigned long addr = addr0;
133 int do_colour_align; 87 int do_colour_align;
88 struct vm_unmapped_area_info info;
134 89
135 if (flags & MAP_FIXED) { 90 if (flags & MAP_FIXED) {
136 /* We do not accept a shared mapping if it would violate 91 /* We do not accept a shared mapping if it would violate
@@ -162,73 +117,27 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
162 return addr; 117 return addr;
163 } 118 }
164 119
165 /* check if free_area_cache is useful for us */ 120 info.flags = VM_UNMAPPED_AREA_TOPDOWN;
166 if (len <= mm->cached_hole_size) { 121 info.length = len;
167 mm->cached_hole_size = 0; 122 info.low_limit = PAGE_SIZE;
168 mm->free_area_cache = mm->mmap_base; 123 info.high_limit = mm->mmap_base;
169 } 124 info.align_mask = do_colour_align ? (PAGE_MASK & shm_align_mask) : 0;
170 125 info.align_offset = pgoff << PAGE_SHIFT;
171 /* either no address requested or can't fit in requested address hole */ 126 addr = vm_unmapped_area(&info);
172 addr = mm->free_area_cache;
173 if (do_colour_align) {
174 unsigned long base = COLOUR_ALIGN_DOWN(addr-len, pgoff);
175 127
176 addr = base + len;
177 }
178
179 /* make sure it can fit in the remaining address space */
180 if (likely(addr > len)) {
181 vma = find_vma(mm, addr-len);
182 if (!vma || addr <= vma->vm_start) {
183 /* remember the address as a hint for next time */
184 return (mm->free_area_cache = addr-len);
185 }
186 }
187
188 if (unlikely(mm->mmap_base < len))
189 goto bottomup;
190
191 addr = mm->mmap_base-len;
192 if (do_colour_align)
193 addr = COLOUR_ALIGN_DOWN(addr, pgoff);
194
195 do {
196 /*
197 * Lookup failure means no vma is above this address,
198 * else if new region fits below vma->vm_start,
199 * return with success:
200 */
201 vma = find_vma(mm, addr);
202 if (likely(!vma || addr+len <= vma->vm_start)) {
203 /* remember the address as a hint for next time */
204 return (mm->free_area_cache = addr);
205 }
206
207 /* remember the largest hole we saw so far */
208 if (addr + mm->cached_hole_size < vma->vm_start)
209 mm->cached_hole_size = vma->vm_start - addr;
210
211 /* try just below the current vma->vm_start */
212 addr = vma->vm_start-len;
213 if (do_colour_align)
214 addr = COLOUR_ALIGN_DOWN(addr, pgoff);
215 } while (likely(len < vma->vm_start));
216
217bottomup:
218 /* 128 /*
219 * A failed mmap() very likely causes application failure, 129 * A failed mmap() very likely causes application failure,
220 * so fall back to the bottom-up function here. This scenario 130 * so fall back to the bottom-up function here. This scenario
221 * can happen with large stack limits and large mmap() 131 * can happen with large stack limits and large mmap()
222 * allocations. 132 * allocations.
223 */ 133 */
224 mm->cached_hole_size = ~0UL; 134 if (addr & ~PAGE_MASK) {
225 mm->free_area_cache = TASK_UNMAPPED_BASE; 135 VM_BUG_ON(addr != -ENOMEM);
226 addr = arch_get_unmapped_area(filp, addr0, len, pgoff, flags); 136 info.flags = 0;
227 /* 137 info.low_limit = TASK_UNMAPPED_BASE;
228 * Restore the topdown base: 138 info.high_limit = TASK_SIZE;
229 */ 139 addr = vm_unmapped_area(&info);
230 mm->free_area_cache = mm->mmap_base; 140 }
231 mm->cached_hole_size = ~0UL;
232 141
233 return addr; 142 return addr;
234} 143}
@@ -238,7 +147,7 @@ bottomup:
238 * You really shouldn't be using read() or write() on /dev/mem. This 147 * You really shouldn't be using read() or write() on /dev/mem. This
239 * might go away in the future. 148 * might go away in the future.
240 */ 149 */
241int valid_phys_addr_range(unsigned long addr, size_t count) 150int valid_phys_addr_range(phys_addr_t addr, size_t count)
242{ 151{
243 if (addr < __MEMORY_START) 152 if (addr < __MEMORY_START)
244 return 0; 153 return 0;
diff --git a/arch/sparc/boot/piggyback.c b/arch/sparc/boot/piggyback.c
index c0a798fcf030..bb7c95161d71 100644
--- a/arch/sparc/boot/piggyback.c
+++ b/arch/sparc/boot/piggyback.c
@@ -81,18 +81,18 @@ static void usage(void)
81 81
82static int start_line(const char *line) 82static int start_line(const char *line)
83{ 83{
84 if (strcmp(line + 8, " T _start\n") == 0) 84 if (strcmp(line + 10, " _start\n") == 0)
85 return 1; 85 return 1;
86 else if (strcmp(line + 16, " T _start\n") == 0) 86 else if (strcmp(line + 18, " _start\n") == 0)
87 return 1; 87 return 1;
88 return 0; 88 return 0;
89} 89}
90 90
91static int end_line(const char *line) 91static int end_line(const char *line)
92{ 92{
93 if (strcmp(line + 8, " A _end\n") == 0) 93 if (strcmp(line + 10, " _end\n") == 0)
94 return 1; 94 return 1;
95 else if (strcmp (line + 16, " A _end\n") == 0) 95 else if (strcmp (line + 18, " _end\n") == 0)
96 return 1; 96 return 1;
97 return 0; 97 return 0;
98} 98}
@@ -100,8 +100,8 @@ static int end_line(const char *line)
100/* 100/*
101 * Find address for start and end in System.map. 101 * Find address for start and end in System.map.
102 * The file looks like this: 102 * The file looks like this:
103 * f0004000 T _start 103 * f0004000 ... _start
104 * f0379f79 A _end 104 * f0379f79 ... _end
105 * 1234567890123456 105 * 1234567890123456
106 * ^coloumn 1 106 * ^coloumn 1
107 * There is support for 64 bit addresses too. 107 * There is support for 64 bit addresses too.
diff --git a/arch/sparc/include/asm/Kbuild b/arch/sparc/include/asm/Kbuild
index 645a58da0e86..e26d430ce2fd 100644
--- a/arch/sparc/include/asm/Kbuild
+++ b/arch/sparc/include/asm/Kbuild
@@ -8,4 +8,5 @@ generic-y += local64.h
8generic-y += irq_regs.h 8generic-y += irq_regs.h
9generic-y += local.h 9generic-y += local.h
10generic-y += module.h 10generic-y += module.h
11generic-y += trace_clock.h
11generic-y += word-at-a-time.h 12generic-y += word-at-a-time.h
diff --git a/arch/sparc/include/asm/prom.h b/arch/sparc/include/asm/prom.h
index f93003123bce..67c62578d170 100644
--- a/arch/sparc/include/asm/prom.h
+++ b/arch/sparc/include/asm/prom.h
@@ -63,10 +63,13 @@ extern char *of_console_options;
63extern void irq_trans_init(struct device_node *dp); 63extern void irq_trans_init(struct device_node *dp);
64extern char *build_path_component(struct device_node *dp); 64extern char *build_path_component(struct device_node *dp);
65 65
66/* SPARC has a local implementation */ 66/* SPARC has local implementations */
67extern int of_address_to_resource(struct device_node *dev, int index, 67extern int of_address_to_resource(struct device_node *dev, int index,
68 struct resource *r); 68 struct resource *r);
69#define of_address_to_resource of_address_to_resource 69#define of_address_to_resource of_address_to_resource
70 70
71void __iomem *of_iomap(struct device_node *node, int index);
72#define of_iomap of_iomap
73
71#endif /* __KERNEL__ */ 74#endif /* __KERNEL__ */
72#endif /* _SPARC_PROM_H */ 75#endif /* _SPARC_PROM_H */
diff --git a/arch/sparc/include/uapi/asm/ioctls.h b/arch/sparc/include/uapi/asm/ioctls.h
index 9155f7041d44..897d1723fa14 100644
--- a/arch/sparc/include/uapi/asm/ioctls.h
+++ b/arch/sparc/include/uapi/asm/ioctls.h
@@ -21,6 +21,9 @@
21#define TCSETSF2 _IOW('T', 15, struct termios2) 21#define TCSETSF2 _IOW('T', 15, struct termios2)
22#define TIOCGDEV _IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */ 22#define TIOCGDEV _IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */
23#define TIOCVHANGUP _IO('T', 0x37) 23#define TIOCVHANGUP _IO('T', 0x37)
24#define TIOCGPKT _IOR('T', 0x38, int) /* Get packet mode state */
25#define TIOCGPTLCK _IOR('T', 0x39, int) /* Get Pty lock state */
26#define TIOCGEXCL _IOR('T', 0x40, int) /* Get exclusive mode state */
24 27
25/* Note that all the ioctls that are not available in Linux have a 28/* Note that all the ioctls that are not available in Linux have a
26 * double underscore on the front to: a) avoid some programs to 29 * double underscore on the front to: a) avoid some programs to
diff --git a/arch/sparc/kernel/pci_impl.h b/arch/sparc/kernel/pci_impl.h
index 918a2031c8bb..5f688531f48c 100644
--- a/arch/sparc/kernel/pci_impl.h
+++ b/arch/sparc/kernel/pci_impl.h
@@ -88,7 +88,7 @@ struct pci_pbm_info {
88 int chip_revision; 88 int chip_revision;
89 89
90 /* Name used for top-level resources. */ 90 /* Name used for top-level resources. */
91 char *name; 91 const char *name;
92 92
93 /* OBP specific information. */ 93 /* OBP specific information. */
94 struct platform_device *op; 94 struct platform_device *op;
diff --git a/arch/sparc/kernel/signal_64.c b/arch/sparc/kernel/signal_64.c
index 867de2f8189c..689e1ba62809 100644
--- a/arch/sparc/kernel/signal_64.c
+++ b/arch/sparc/kernel/signal_64.c
@@ -295,9 +295,7 @@ void do_rt_sigreturn(struct pt_regs *regs)
295 err |= restore_fpu_state(regs, fpu_save); 295 err |= restore_fpu_state(regs, fpu_save);
296 296
297 err |= __copy_from_user(&set, &sf->mask, sizeof(sigset_t)); 297 err |= __copy_from_user(&set, &sf->mask, sizeof(sigset_t));
298 err |= do_sigaltstack(&sf->stack, NULL, (unsigned long)sf); 298 if (err || do_sigaltstack(&sf->stack, NULL, (unsigned long)sf) == -EFAULT)
299
300 if (err)
301 goto segv; 299 goto segv;
302 300
303 err |= __get_user(rwin_save, &sf->rwin_save); 301 err |= __get_user(rwin_save, &sf->rwin_save);
diff --git a/arch/sparc/kernel/sys32.S b/arch/sparc/kernel/sys32.S
index 44025f4ba41f..8475a474273a 100644
--- a/arch/sparc/kernel/sys32.S
+++ b/arch/sparc/kernel/sys32.S
@@ -47,7 +47,7 @@ STUB: sra REG1, 0, REG1; \
47 sra REG4, 0, REG4 47 sra REG4, 0, REG4
48 48
49SIGN1(sys32_exit, sparc_exit, %o0) 49SIGN1(sys32_exit, sparc_exit, %o0)
50SIGN1(sys32_exit_group, sys_exit_group, %o0) 50SIGN1(sys32_exit_group, sparc_exit_group, %o0)
51SIGN1(sys32_wait4, compat_sys_wait4, %o2) 51SIGN1(sys32_wait4, compat_sys_wait4, %o2)
52SIGN1(sys32_creat, sys_creat, %o1) 52SIGN1(sys32_creat, sys_creat, %o1)
53SIGN1(sys32_mknod, sys_mknod, %o1) 53SIGN1(sys32_mknod, sys_mknod, %o1)
diff --git a/arch/sparc/kernel/sys_sparc_32.c b/arch/sparc/kernel/sys_sparc_32.c
index 0c9b31b22e07..57277c830151 100644
--- a/arch/sparc/kernel/sys_sparc_32.c
+++ b/arch/sparc/kernel/sys_sparc_32.c
@@ -34,11 +34,9 @@ asmlinkage unsigned long sys_getpagesize(void)
34 return PAGE_SIZE; /* Possibly older binaries want 8192 on sun4's? */ 34 return PAGE_SIZE; /* Possibly older binaries want 8192 on sun4's? */
35} 35}
36 36
37#define COLOUR_ALIGN(addr) (((addr)+SHMLBA-1)&~(SHMLBA-1))
38
39unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, unsigned long len, unsigned long pgoff, unsigned long flags) 37unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, unsigned long len, unsigned long pgoff, unsigned long flags)
40{ 38{
41 struct vm_area_struct * vmm; 39 struct vm_unmapped_area_info info;
42 40
43 if (flags & MAP_FIXED) { 41 if (flags & MAP_FIXED) {
44 /* We do not accept a shared mapping if it would violate 42 /* We do not accept a shared mapping if it would violate
@@ -56,21 +54,14 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, unsi
56 if (!addr) 54 if (!addr)
57 addr = TASK_UNMAPPED_BASE; 55 addr = TASK_UNMAPPED_BASE;
58 56
59 if (flags & MAP_SHARED) 57 info.flags = 0;
60 addr = COLOUR_ALIGN(addr); 58 info.length = len;
61 else 59 info.low_limit = addr;
62 addr = PAGE_ALIGN(addr); 60 info.high_limit = TASK_SIZE;
63 61 info.align_mask = (flags & MAP_SHARED) ?
64 for (vmm = find_vma(current->mm, addr); ; vmm = vmm->vm_next) { 62 (PAGE_MASK & (SHMLBA - 1)) : 0;
65 /* At this point: (!vmm || addr < vmm->vm_end). */ 63 info.align_offset = pgoff << PAGE_SHIFT;
66 if (TASK_SIZE - PAGE_SIZE - len < addr) 64 return vm_unmapped_area(&info);
67 return -ENOMEM;
68 if (!vmm || addr + len <= vmm->vm_start)
69 return addr;
70 addr = vmm->vm_end;
71 if (flags & MAP_SHARED)
72 addr = COLOUR_ALIGN(addr);
73 }
74} 65}
75 66
76/* 67/*
diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c
index 878ef3d5fec5..97309c0ec533 100644
--- a/arch/sparc/kernel/sys_sparc_64.c
+++ b/arch/sparc/kernel/sys_sparc_64.c
@@ -75,7 +75,7 @@ static inline int invalid_64bit_range(unsigned long addr, unsigned long len)
75 * the spitfire/niagara VA-hole. 75 * the spitfire/niagara VA-hole.
76 */ 76 */
77 77
78static inline unsigned long COLOUR_ALIGN(unsigned long addr, 78static inline unsigned long COLOR_ALIGN(unsigned long addr,
79 unsigned long pgoff) 79 unsigned long pgoff)
80{ 80{
81 unsigned long base = (addr+SHMLBA-1)&~(SHMLBA-1); 81 unsigned long base = (addr+SHMLBA-1)&~(SHMLBA-1);
@@ -84,24 +84,13 @@ static inline unsigned long COLOUR_ALIGN(unsigned long addr,
84 return base + off; 84 return base + off;
85} 85}
86 86
87static inline unsigned long COLOUR_ALIGN_DOWN(unsigned long addr,
88 unsigned long pgoff)
89{
90 unsigned long base = addr & ~(SHMLBA-1);
91 unsigned long off = (pgoff<<PAGE_SHIFT) & (SHMLBA-1);
92
93 if (base + off <= addr)
94 return base + off;
95 return base - off;
96}
97
98unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, unsigned long len, unsigned long pgoff, unsigned long flags) 87unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, unsigned long len, unsigned long pgoff, unsigned long flags)
99{ 88{
100 struct mm_struct *mm = current->mm; 89 struct mm_struct *mm = current->mm;
101 struct vm_area_struct * vma; 90 struct vm_area_struct * vma;
102 unsigned long task_size = TASK_SIZE; 91 unsigned long task_size = TASK_SIZE;
103 unsigned long start_addr;
104 int do_color_align; 92 int do_color_align;
93 struct vm_unmapped_area_info info;
105 94
106 if (flags & MAP_FIXED) { 95 if (flags & MAP_FIXED) {
107 /* We do not accept a shared mapping if it would violate 96 /* We do not accept a shared mapping if it would violate
@@ -124,7 +113,7 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, unsi
124 113
125 if (addr) { 114 if (addr) {
126 if (do_color_align) 115 if (do_color_align)
127 addr = COLOUR_ALIGN(addr, pgoff); 116 addr = COLOR_ALIGN(addr, pgoff);
128 else 117 else
129 addr = PAGE_ALIGN(addr); 118 addr = PAGE_ALIGN(addr);
130 119
@@ -134,50 +123,22 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, unsi
134 return addr; 123 return addr;
135 } 124 }
136 125
137 if (len > mm->cached_hole_size) { 126 info.flags = 0;
138 start_addr = addr = mm->free_area_cache; 127 info.length = len;
139 } else { 128 info.low_limit = TASK_UNMAPPED_BASE;
140 start_addr = addr = TASK_UNMAPPED_BASE; 129 info.high_limit = min(task_size, VA_EXCLUDE_START);
141 mm->cached_hole_size = 0; 130 info.align_mask = do_color_align ? (PAGE_MASK & (SHMLBA - 1)) : 0;
131 info.align_offset = pgoff << PAGE_SHIFT;
132 addr = vm_unmapped_area(&info);
133
134 if ((addr & ~PAGE_MASK) && task_size > VA_EXCLUDE_END) {
135 VM_BUG_ON(addr != -ENOMEM);
136 info.low_limit = VA_EXCLUDE_END;
137 info.high_limit = task_size;
138 addr = vm_unmapped_area(&info);
142 } 139 }
143 140
144 task_size -= len; 141 return addr;
145
146full_search:
147 if (do_color_align)
148 addr = COLOUR_ALIGN(addr, pgoff);
149 else
150 addr = PAGE_ALIGN(addr);
151
152 for (vma = find_vma(mm, addr); ; vma = vma->vm_next) {
153 /* At this point: (!vma || addr < vma->vm_end). */
154 if (addr < VA_EXCLUDE_START &&
155 (addr + len) >= VA_EXCLUDE_START) {
156 addr = VA_EXCLUDE_END;
157 vma = find_vma(mm, VA_EXCLUDE_END);
158 }
159 if (unlikely(task_size < addr)) {
160 if (start_addr != TASK_UNMAPPED_BASE) {
161 start_addr = addr = TASK_UNMAPPED_BASE;
162 mm->cached_hole_size = 0;
163 goto full_search;
164 }
165 return -ENOMEM;
166 }
167 if (likely(!vma || addr + len <= vma->vm_start)) {
168 /*
169 * Remember the place where we stopped the search:
170 */
171 mm->free_area_cache = addr + len;
172 return addr;
173 }
174 if (addr + mm->cached_hole_size < vma->vm_start)
175 mm->cached_hole_size = vma->vm_start - addr;
176
177 addr = vma->vm_end;
178 if (do_color_align)
179 addr = COLOUR_ALIGN(addr, pgoff);
180 }
181} 142}
182 143
183unsigned long 144unsigned long
@@ -190,6 +151,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
190 unsigned long task_size = STACK_TOP32; 151 unsigned long task_size = STACK_TOP32;
191 unsigned long addr = addr0; 152 unsigned long addr = addr0;
192 int do_color_align; 153 int do_color_align;
154 struct vm_unmapped_area_info info;
193 155
194 /* This should only ever run for 32-bit processes. */ 156 /* This should only ever run for 32-bit processes. */
195 BUG_ON(!test_thread_flag(TIF_32BIT)); 157 BUG_ON(!test_thread_flag(TIF_32BIT));
@@ -214,7 +176,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
214 /* requesting a specific address */ 176 /* requesting a specific address */
215 if (addr) { 177 if (addr) {
216 if (do_color_align) 178 if (do_color_align)
217 addr = COLOUR_ALIGN(addr, pgoff); 179 addr = COLOR_ALIGN(addr, pgoff);
218 else 180 else
219 addr = PAGE_ALIGN(addr); 181 addr = PAGE_ALIGN(addr);
220 182
@@ -224,73 +186,27 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
224 return addr; 186 return addr;
225 } 187 }
226 188
227 /* check if free_area_cache is useful for us */ 189 info.flags = VM_UNMAPPED_AREA_TOPDOWN;
228 if (len <= mm->cached_hole_size) { 190 info.length = len;
229 mm->cached_hole_size = 0; 191 info.low_limit = PAGE_SIZE;
230 mm->free_area_cache = mm->mmap_base; 192 info.high_limit = mm->mmap_base;
231 } 193 info.align_mask = do_color_align ? (PAGE_MASK & (SHMLBA - 1)) : 0;
232 194 info.align_offset = pgoff << PAGE_SHIFT;
233 /* either no address requested or can't fit in requested address hole */ 195 addr = vm_unmapped_area(&info);
234 addr = mm->free_area_cache;
235 if (do_color_align) {
236 unsigned long base = COLOUR_ALIGN_DOWN(addr-len, pgoff);
237 196
238 addr = base + len;
239 }
240
241 /* make sure it can fit in the remaining address space */
242 if (likely(addr > len)) {
243 vma = find_vma(mm, addr-len);
244 if (!vma || addr <= vma->vm_start) {
245 /* remember the address as a hint for next time */
246 return (mm->free_area_cache = addr-len);
247 }
248 }
249
250 if (unlikely(mm->mmap_base < len))
251 goto bottomup;
252
253 addr = mm->mmap_base-len;
254 if (do_color_align)
255 addr = COLOUR_ALIGN_DOWN(addr, pgoff);
256
257 do {
258 /*
259 * Lookup failure means no vma is above this address,
260 * else if new region fits below vma->vm_start,
261 * return with success:
262 */
263 vma = find_vma(mm, addr);
264 if (likely(!vma || addr+len <= vma->vm_start)) {
265 /* remember the address as a hint for next time */
266 return (mm->free_area_cache = addr);
267 }
268
269 /* remember the largest hole we saw so far */
270 if (addr + mm->cached_hole_size < vma->vm_start)
271 mm->cached_hole_size = vma->vm_start - addr;
272
273 /* try just below the current vma->vm_start */
274 addr = vma->vm_start-len;
275 if (do_color_align)
276 addr = COLOUR_ALIGN_DOWN(addr, pgoff);
277 } while (likely(len < vma->vm_start));
278
279bottomup:
280 /* 197 /*
281 * A failed mmap() very likely causes application failure, 198 * A failed mmap() very likely causes application failure,
282 * so fall back to the bottom-up function here. This scenario 199 * so fall back to the bottom-up function here. This scenario
283 * can happen with large stack limits and large mmap() 200 * can happen with large stack limits and large mmap()
284 * allocations. 201 * allocations.
285 */ 202 */
286 mm->cached_hole_size = ~0UL; 203 if (addr & ~PAGE_MASK) {
287 mm->free_area_cache = TASK_UNMAPPED_BASE; 204 VM_BUG_ON(addr != -ENOMEM);
288 addr = arch_get_unmapped_area(filp, addr0, len, pgoff, flags); 205 info.flags = 0;
289 /* 206 info.low_limit = TASK_UNMAPPED_BASE;
290 * Restore the topdown base: 207 info.high_limit = STACK_TOP32;
291 */ 208 addr = vm_unmapped_area(&info);
292 mm->free_area_cache = mm->mmap_base; 209 }
293 mm->cached_hole_size = ~0UL;
294 210
295 return addr; 211 return addr;
296} 212}
diff --git a/arch/sparc/kernel/syscalls.S b/arch/sparc/kernel/syscalls.S
index 7f5f65d0b3fd..bf2347794e33 100644
--- a/arch/sparc/kernel/syscalls.S
+++ b/arch/sparc/kernel/syscalls.S
@@ -118,10 +118,20 @@ ret_from_syscall:
118 ba,pt %xcc, ret_sys_call 118 ba,pt %xcc, ret_sys_call
119 ldx [%sp + PTREGS_OFF + PT_V9_I0], %o0 119 ldx [%sp + PTREGS_OFF + PT_V9_I0], %o0
120 120
121 .globl sparc_exit_group
122 .type sparc_exit_group,#function
123sparc_exit_group:
124 sethi %hi(sys_exit_group), %g7
125 ba,pt %xcc, 1f
126 or %g7, %lo(sys_exit_group), %g7
127 .size sparc_exit_group,.-sparc_exit_group
128
121 .globl sparc_exit 129 .globl sparc_exit
122 .type sparc_exit,#function 130 .type sparc_exit,#function
123sparc_exit: 131sparc_exit:
124 rdpr %pstate, %g2 132 sethi %hi(sys_exit), %g7
133 or %g7, %lo(sys_exit), %g7
1341: rdpr %pstate, %g2
125 wrpr %g2, PSTATE_IE, %pstate 135 wrpr %g2, PSTATE_IE, %pstate
126 rdpr %otherwin, %g1 136 rdpr %otherwin, %g1
127 rdpr %cansave, %g3 137 rdpr %cansave, %g3
@@ -129,7 +139,7 @@ sparc_exit:
129 wrpr %g3, 0x0, %cansave 139 wrpr %g3, 0x0, %cansave
130 wrpr %g0, 0x0, %otherwin 140 wrpr %g0, 0x0, %otherwin
131 wrpr %g2, 0x0, %pstate 141 wrpr %g2, 0x0, %pstate
132 ba,pt %xcc, sys_exit 142 jmpl %g7, %g0
133 stb %g0, [%g6 + TI_WSAVED] 143 stb %g0, [%g6 + TI_WSAVED]
134 .size sparc_exit,.-sparc_exit 144 .size sparc_exit,.-sparc_exit
135 145
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S
index 1c9af9fa38e9..017b74a63dcb 100644
--- a/arch/sparc/kernel/systbls_64.S
+++ b/arch/sparc/kernel/systbls_64.S
@@ -133,7 +133,7 @@ sys_call_table:
133/*170*/ .word sys_lsetxattr, sys_fsetxattr, sys_getxattr, sys_lgetxattr, sys_getdents 133/*170*/ .word sys_lsetxattr, sys_fsetxattr, sys_getxattr, sys_lgetxattr, sys_getdents
134 .word sys_setsid, sys_fchdir, sys_fgetxattr, sys_listxattr, sys_llistxattr 134 .word sys_setsid, sys_fchdir, sys_fgetxattr, sys_listxattr, sys_llistxattr
135/*180*/ .word sys_flistxattr, sys_removexattr, sys_lremovexattr, sys_nis_syscall, sys_ni_syscall 135/*180*/ .word sys_flistxattr, sys_removexattr, sys_lremovexattr, sys_nis_syscall, sys_ni_syscall
136 .word sys_setpgid, sys_fremovexattr, sys_tkill, sys_exit_group, sys_newuname 136 .word sys_setpgid, sys_fremovexattr, sys_tkill, sparc_exit_group, sys_newuname
137/*190*/ .word sys_init_module, sys_sparc64_personality, sys_remap_file_pages, sys_epoll_create, sys_epoll_ctl 137/*190*/ .word sys_init_module, sys_sparc64_personality, sys_remap_file_pages, sys_epoll_create, sys_epoll_ctl
138 .word sys_epoll_wait, sys_ioprio_set, sys_getppid, sys_nis_syscall, sys_sgetmask 138 .word sys_epoll_wait, sys_ioprio_set, sys_getppid, sys_nis_syscall, sys_sgetmask
139/*200*/ .word sys_ssetmask, sys_nis_syscall, sys_newlstat, sys_uselib, sys_nis_syscall 139/*200*/ .word sys_ssetmask, sys_nis_syscall, sys_newlstat, sys_uselib, sys_nis_syscall
diff --git a/arch/sparc/mm/hugetlbpage.c b/arch/sparc/mm/hugetlbpage.c
index f76f83d5ac63..d2b59441ebdd 100644
--- a/arch/sparc/mm/hugetlbpage.c
+++ b/arch/sparc/mm/hugetlbpage.c
@@ -30,55 +30,28 @@ static unsigned long hugetlb_get_unmapped_area_bottomup(struct file *filp,
30 unsigned long pgoff, 30 unsigned long pgoff,
31 unsigned long flags) 31 unsigned long flags)
32{ 32{
33 struct mm_struct *mm = current->mm;
34 struct vm_area_struct * vma;
35 unsigned long task_size = TASK_SIZE; 33 unsigned long task_size = TASK_SIZE;
36 unsigned long start_addr; 34 struct vm_unmapped_area_info info;
37 35
38 if (test_thread_flag(TIF_32BIT)) 36 if (test_thread_flag(TIF_32BIT))
39 task_size = STACK_TOP32; 37 task_size = STACK_TOP32;
40 if (unlikely(len >= VA_EXCLUDE_START))
41 return -ENOMEM;
42 38
43 if (len > mm->cached_hole_size) { 39 info.flags = 0;
44 start_addr = addr = mm->free_area_cache; 40 info.length = len;
45 } else { 41 info.low_limit = TASK_UNMAPPED_BASE;
46 start_addr = addr = TASK_UNMAPPED_BASE; 42 info.high_limit = min(task_size, VA_EXCLUDE_START);
47 mm->cached_hole_size = 0; 43 info.align_mask = PAGE_MASK & ~HPAGE_MASK;
44 info.align_offset = 0;
45 addr = vm_unmapped_area(&info);
46
47 if ((addr & ~PAGE_MASK) && task_size > VA_EXCLUDE_END) {
48 VM_BUG_ON(addr != -ENOMEM);
49 info.low_limit = VA_EXCLUDE_END;
50 info.high_limit = task_size;
51 addr = vm_unmapped_area(&info);
48 } 52 }
49 53
50 task_size -= len; 54 return addr;
51
52full_search:
53 addr = ALIGN(addr, HPAGE_SIZE);
54
55 for (vma = find_vma(mm, addr); ; vma = vma->vm_next) {
56 /* At this point: (!vma || addr < vma->vm_end). */
57 if (addr < VA_EXCLUDE_START &&
58 (addr + len) >= VA_EXCLUDE_START) {
59 addr = VA_EXCLUDE_END;
60 vma = find_vma(mm, VA_EXCLUDE_END);
61 }
62 if (unlikely(task_size < addr)) {
63 if (start_addr != TASK_UNMAPPED_BASE) {
64 start_addr = addr = TASK_UNMAPPED_BASE;
65 mm->cached_hole_size = 0;
66 goto full_search;
67 }
68 return -ENOMEM;
69 }
70 if (likely(!vma || addr + len <= vma->vm_start)) {
71 /*
72 * Remember the place where we stopped the search:
73 */
74 mm->free_area_cache = addr + len;
75 return addr;
76 }
77 if (addr + mm->cached_hole_size < vma->vm_start)
78 mm->cached_hole_size = vma->vm_start - addr;
79
80 addr = ALIGN(vma->vm_end, HPAGE_SIZE);
81 }
82} 55}
83 56
84static unsigned long 57static unsigned long
@@ -87,71 +60,34 @@ hugetlb_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
87 const unsigned long pgoff, 60 const unsigned long pgoff,
88 const unsigned long flags) 61 const unsigned long flags)
89{ 62{
90 struct vm_area_struct *vma;
91 struct mm_struct *mm = current->mm; 63 struct mm_struct *mm = current->mm;
92 unsigned long addr = addr0; 64 unsigned long addr = addr0;
65 struct vm_unmapped_area_info info;
93 66
94 /* This should only ever run for 32-bit processes. */ 67 /* This should only ever run for 32-bit processes. */
95 BUG_ON(!test_thread_flag(TIF_32BIT)); 68 BUG_ON(!test_thread_flag(TIF_32BIT));
96 69
97 /* check if free_area_cache is useful for us */ 70 info.flags = VM_UNMAPPED_AREA_TOPDOWN;
98 if (len <= mm->cached_hole_size) { 71 info.length = len;
99 mm->cached_hole_size = 0; 72 info.low_limit = PAGE_SIZE;
100 mm->free_area_cache = mm->mmap_base; 73 info.high_limit = mm->mmap_base;
101 } 74 info.align_mask = PAGE_MASK & ~HPAGE_MASK;
102 75 info.align_offset = 0;
103 /* either no address requested or can't fit in requested address hole */ 76 addr = vm_unmapped_area(&info);
104 addr = mm->free_area_cache & HPAGE_MASK;
105
106 /* make sure it can fit in the remaining address space */
107 if (likely(addr > len)) {
108 vma = find_vma(mm, addr-len);
109 if (!vma || addr <= vma->vm_start) {
110 /* remember the address as a hint for next time */
111 return (mm->free_area_cache = addr-len);
112 }
113 }
114
115 if (unlikely(mm->mmap_base < len))
116 goto bottomup;
117
118 addr = (mm->mmap_base-len) & HPAGE_MASK;
119
120 do {
121 /*
122 * Lookup failure means no vma is above this address,
123 * else if new region fits below vma->vm_start,
124 * return with success:
125 */
126 vma = find_vma(mm, addr);
127 if (likely(!vma || addr+len <= vma->vm_start)) {
128 /* remember the address as a hint for next time */
129 return (mm->free_area_cache = addr);
130 }
131
132 /* remember the largest hole we saw so far */
133 if (addr + mm->cached_hole_size < vma->vm_start)
134 mm->cached_hole_size = vma->vm_start - addr;
135
136 /* try just below the current vma->vm_start */
137 addr = (vma->vm_start-len) & HPAGE_MASK;
138 } while (likely(len < vma->vm_start));
139 77
140bottomup:
141 /* 78 /*
142 * A failed mmap() very likely causes application failure, 79 * A failed mmap() very likely causes application failure,
143 * so fall back to the bottom-up function here. This scenario 80 * so fall back to the bottom-up function here. This scenario
144 * can happen with large stack limits and large mmap() 81 * can happen with large stack limits and large mmap()
145 * allocations. 82 * allocations.
146 */ 83 */
147 mm->cached_hole_size = ~0UL; 84 if (addr & ~PAGE_MASK) {
148 mm->free_area_cache = TASK_UNMAPPED_BASE; 85 VM_BUG_ON(addr != -ENOMEM);
149 addr = arch_get_unmapped_area(filp, addr0, len, pgoff, flags); 86 info.flags = 0;
150 /* 87 info.low_limit = TASK_UNMAPPED_BASE;
151 * Restore the topdown base: 88 info.high_limit = STACK_TOP32;
152 */ 89 addr = vm_unmapped_area(&info);
153 mm->free_area_cache = mm->mmap_base; 90 }
154 mm->cached_hole_size = ~0UL;
155 91
156 return addr; 92 return addr;
157} 93}
diff --git a/arch/tile/include/asm/Kbuild b/arch/tile/include/asm/Kbuild
index 6948015e08a2..b17b9b8e53cd 100644
--- a/arch/tile/include/asm/Kbuild
+++ b/arch/tile/include/asm/Kbuild
@@ -34,5 +34,6 @@ generic-y += sockios.h
34generic-y += statfs.h 34generic-y += statfs.h
35generic-y += termbits.h 35generic-y += termbits.h
36generic-y += termios.h 36generic-y += termios.h
37generic-y += trace_clock.h
37generic-y += types.h 38generic-y += types.h
38generic-y += xor.h 39generic-y += xor.h
diff --git a/arch/tile/mm/hugetlbpage.c b/arch/tile/mm/hugetlbpage.c
index 812e2d037972..650ccff8378c 100644
--- a/arch/tile/mm/hugetlbpage.c
+++ b/arch/tile/mm/hugetlbpage.c
@@ -231,42 +231,15 @@ static unsigned long hugetlb_get_unmapped_area_bottomup(struct file *file,
231 unsigned long pgoff, unsigned long flags) 231 unsigned long pgoff, unsigned long flags)
232{ 232{
233 struct hstate *h = hstate_file(file); 233 struct hstate *h = hstate_file(file);
234 struct mm_struct *mm = current->mm; 234 struct vm_unmapped_area_info info;
235 struct vm_area_struct *vma; 235
236 unsigned long start_addr; 236 info.flags = 0;
237 237 info.length = len;
238 if (len > mm->cached_hole_size) { 238 info.low_limit = TASK_UNMAPPED_BASE;
239 start_addr = mm->free_area_cache; 239 info.high_limit = TASK_SIZE;
240 } else { 240 info.align_mask = PAGE_MASK & ~huge_page_mask(h);
241 start_addr = TASK_UNMAPPED_BASE; 241 info.align_offset = 0;
242 mm->cached_hole_size = 0; 242 return vm_unmapped_area(&info);
243 }
244
245full_search:
246 addr = ALIGN(start_addr, huge_page_size(h));
247
248 for (vma = find_vma(mm, addr); ; vma = vma->vm_next) {
249 /* At this point: (!vma || addr < vma->vm_end). */
250 if (TASK_SIZE - len < addr) {
251 /*
252 * Start a new search - just in case we missed
253 * some holes.
254 */
255 if (start_addr != TASK_UNMAPPED_BASE) {
256 start_addr = TASK_UNMAPPED_BASE;
257 mm->cached_hole_size = 0;
258 goto full_search;
259 }
260 return -ENOMEM;
261 }
262 if (!vma || addr + len <= vma->vm_start) {
263 mm->free_area_cache = addr + len;
264 return addr;
265 }
266 if (addr + mm->cached_hole_size < vma->vm_start)
267 mm->cached_hole_size = vma->vm_start - addr;
268 addr = ALIGN(vma->vm_end, huge_page_size(h));
269 }
270} 243}
271 244
272static unsigned long hugetlb_get_unmapped_area_topdown(struct file *file, 245static unsigned long hugetlb_get_unmapped_area_topdown(struct file *file,
@@ -274,92 +247,30 @@ static unsigned long hugetlb_get_unmapped_area_topdown(struct file *file,
274 unsigned long pgoff, unsigned long flags) 247 unsigned long pgoff, unsigned long flags)
275{ 248{
276 struct hstate *h = hstate_file(file); 249 struct hstate *h = hstate_file(file);
277 struct mm_struct *mm = current->mm; 250 struct vm_unmapped_area_info info;
278 struct vm_area_struct *vma, *prev_vma; 251 unsigned long addr;
279 unsigned long base = mm->mmap_base, addr = addr0;
280 unsigned long largest_hole = mm->cached_hole_size;
281 int first_time = 1;
282
283 /* don't allow allocations above current base */
284 if (mm->free_area_cache > base)
285 mm->free_area_cache = base;
286
287 if (len <= largest_hole) {
288 largest_hole = 0;
289 mm->free_area_cache = base;
290 }
291try_again:
292 /* make sure it can fit in the remaining address space */
293 if (mm->free_area_cache < len)
294 goto fail;
295
296 /* either no address requested or can't fit in requested address hole */
297 addr = (mm->free_area_cache - len) & huge_page_mask(h);
298 do {
299 /*
300 * Lookup failure means no vma is above this address,
301 * i.e. return with success:
302 */
303 vma = find_vma_prev(mm, addr, &prev_vma);
304 if (!vma) {
305 return addr;
306 break;
307 }
308
309 /*
310 * new region fits between prev_vma->vm_end and
311 * vma->vm_start, use it:
312 */
313 if (addr + len <= vma->vm_start &&
314 (!prev_vma || (addr >= prev_vma->vm_end))) {
315 /* remember the address as a hint for next time */
316 mm->cached_hole_size = largest_hole;
317 mm->free_area_cache = addr;
318 return addr;
319 } else {
320 /* pull free_area_cache down to the first hole */
321 if (mm->free_area_cache == vma->vm_end) {
322 mm->free_area_cache = vma->vm_start;
323 mm->cached_hole_size = largest_hole;
324 }
325 }
326 252
327 /* remember the largest hole we saw so far */ 253 info.flags = VM_UNMAPPED_AREA_TOPDOWN;
328 if (addr + largest_hole < vma->vm_start) 254 info.length = len;
329 largest_hole = vma->vm_start - addr; 255 info.low_limit = PAGE_SIZE;
256 info.high_limit = current->mm->mmap_base;
257 info.align_mask = PAGE_MASK & ~huge_page_mask(h);
258 info.align_offset = 0;
259 addr = vm_unmapped_area(&info);
330 260
331 /* try just below the current vma->vm_start */
332 addr = (vma->vm_start - len) & huge_page_mask(h);
333
334 } while (len <= vma->vm_start);
335
336fail:
337 /*
338 * if hint left us with no space for the requested
339 * mapping then try again:
340 */
341 if (first_time) {
342 mm->free_area_cache = base;
343 largest_hole = 0;
344 first_time = 0;
345 goto try_again;
346 }
347 /* 261 /*
348 * A failed mmap() very likely causes application failure, 262 * A failed mmap() very likely causes application failure,
349 * so fall back to the bottom-up function here. This scenario 263 * so fall back to the bottom-up function here. This scenario
350 * can happen with large stack limits and large mmap() 264 * can happen with large stack limits and large mmap()
351 * allocations. 265 * allocations.
352 */ 266 */
353 mm->free_area_cache = TASK_UNMAPPED_BASE; 267 if (addr & ~PAGE_MASK) {
354 mm->cached_hole_size = ~0UL; 268 VM_BUG_ON(addr != -ENOMEM);
355 addr = hugetlb_get_unmapped_area_bottomup(file, addr0, 269 info.flags = 0;
356 len, pgoff, flags); 270 info.low_limit = TASK_UNMAPPED_BASE;
357 271 info.high_limit = TASK_SIZE;
358 /* 272 addr = vm_unmapped_area(&info);
359 * Restore the topdown base: 273 }
360 */
361 mm->free_area_cache = base;
362 mm->cached_hole_size = ~0UL;
363 274
364 return addr; 275 return addr;
365} 276}
diff --git a/arch/um/drivers/chan_kern.c b/arch/um/drivers/chan_kern.c
index c3bba73e4be6..e9a0abc6a32f 100644
--- a/arch/um/drivers/chan_kern.c
+++ b/arch/um/drivers/chan_kern.c
@@ -83,21 +83,8 @@ static const struct chan_ops not_configged_ops = {
83 83
84static void tty_receive_char(struct tty_struct *tty, char ch) 84static void tty_receive_char(struct tty_struct *tty, char ch)
85{ 85{
86 if (tty == NULL) 86 if (tty)
87 return; 87 tty_insert_flip_char(tty, ch, TTY_NORMAL);
88
89 if (I_IXON(tty) && !I_IXOFF(tty) && !tty->raw) {
90 if (ch == STOP_CHAR(tty)) {
91 stop_tty(tty);
92 return;
93 }
94 else if (ch == START_CHAR(tty)) {
95 start_tty(tty);
96 return;
97 }
98 }
99
100 tty_insert_flip_char(tty, ch, TTY_NORMAL);
101} 88}
102 89
103static int open_one_chan(struct chan *chan) 90static int open_one_chan(struct chan *chan)
diff --git a/arch/um/drivers/line.c b/arch/um/drivers/line.c
index fd9a15b318af..9ffc28bd4b7a 100644
--- a/arch/um/drivers/line.c
+++ b/arch/um/drivers/line.c
@@ -584,6 +584,8 @@ int register_lines(struct line_driver *line_driver,
584 printk(KERN_ERR "register_lines : can't register %s driver\n", 584 printk(KERN_ERR "register_lines : can't register %s driver\n",
585 line_driver->name); 585 line_driver->name);
586 put_tty_driver(driver); 586 put_tty_driver(driver);
587 for (i = 0; i < nlines; i++)
588 tty_port_destroy(&lines[i].port);
587 return err; 589 return err;
588 } 590 }
589 591
diff --git a/arch/um/drivers/mconsole_kern.c b/arch/um/drivers/mconsole_kern.c
index 79ccfe6c7078..49e3b49e552f 100644
--- a/arch/um/drivers/mconsole_kern.c
+++ b/arch/um/drivers/mconsole_kern.c
@@ -648,7 +648,7 @@ static void stack_proc(void *arg)
648 struct task_struct *from = current, *to = arg; 648 struct task_struct *from = current, *to = arg;
649 649
650 to->thread.saved_task = from; 650 to->thread.saved_task = from;
651 rcu_switch(from, to); 651 rcu_user_hooks_switch(from, to);
652 switch_to(from, to, from); 652 switch_to(from, to, from);
653} 653}
654 654
diff --git a/arch/um/include/asm/Kbuild b/arch/um/include/asm/Kbuild
index 0f6e7b328265..b30f34a79882 100644
--- a/arch/um/include/asm/Kbuild
+++ b/arch/um/include/asm/Kbuild
@@ -2,3 +2,4 @@ generic-y += bug.h cputime.h device.h emergency-restart.h futex.h hardirq.h
2generic-y += hw_irq.h irq_regs.h kdebug.h percpu.h sections.h topology.h xor.h 2generic-y += hw_irq.h irq_regs.h kdebug.h percpu.h sections.h topology.h xor.h
3generic-y += ftrace.h pci.h io.h param.h delay.h mutex.h current.h exec.h 3generic-y += ftrace.h pci.h io.h param.h delay.h mutex.h current.h exec.h
4generic-y += switch_to.h clkdev.h 4generic-y += switch_to.h clkdev.h
5generic-y += trace_clock.h
diff --git a/arch/um/kernel/exec.c b/arch/um/kernel/exec.c
index 3a8ece7d09ca..0d7103c9eff3 100644
--- a/arch/um/kernel/exec.c
+++ b/arch/um/kernel/exec.c
@@ -32,13 +32,14 @@ void flush_thread(void)
32 "err = %d\n", ret); 32 "err = %d\n", ret);
33 force_sig(SIGKILL, current); 33 force_sig(SIGKILL, current);
34 } 34 }
35 get_safe_registers(current_pt_regs()->regs.gp,
36 current_pt_regs()->regs.fp);
35 37
36 __switch_mm(&current->mm->context.id); 38 __switch_mm(&current->mm->context.id);
37} 39}
38 40
39void start_thread(struct pt_regs *regs, unsigned long eip, unsigned long esp) 41void start_thread(struct pt_regs *regs, unsigned long eip, unsigned long esp)
40{ 42{
41 get_safe_registers(regs->regs.gp, regs->regs.fp);
42 PT_REGS_IP(regs) = eip; 43 PT_REGS_IP(regs) = eip;
43 PT_REGS_SP(regs) = esp; 44 PT_REGS_SP(regs) = esp;
44 current->ptrace &= ~PT_DTRACE; 45 current->ptrace &= ~PT_DTRACE;
diff --git a/arch/unicore32/Kconfig b/arch/unicore32/Kconfig
index e5c5473e69ce..c4fbb21e802b 100644
--- a/arch/unicore32/Kconfig
+++ b/arch/unicore32/Kconfig
@@ -16,6 +16,8 @@ config UNICORE32
16 select ARCH_WANT_FRAME_POINTERS 16 select ARCH_WANT_FRAME_POINTERS
17 select GENERIC_IOMAP 17 select GENERIC_IOMAP
18 select MODULES_USE_ELF_REL 18 select MODULES_USE_ELF_REL
19 select GENERIC_KERNEL_THREAD
20 select GENERIC_KERNEL_EXECVE
19 help 21 help
20 UniCore-32 is 32-bit Instruction Set Architecture, 22 UniCore-32 is 32-bit Instruction Set Architecture,
21 including a series of low-power-consumption RISC chip 23 including a series of low-power-consumption RISC chip
@@ -64,6 +66,9 @@ config GENERIC_CALIBRATE_DELAY
64config ARCH_MAY_HAVE_PC_FDC 66config ARCH_MAY_HAVE_PC_FDC
65 bool 67 bool
66 68
69config ZONE_DMA
70 def_bool y
71
67config NEED_DMA_MAP_STATE 72config NEED_DMA_MAP_STATE
68 def_bool y 73 def_bool y
69 74
@@ -216,7 +221,7 @@ config PUV3_GPIO
216 bool 221 bool
217 depends on !ARCH_FPGA 222 depends on !ARCH_FPGA
218 select GENERIC_GPIO 223 select GENERIC_GPIO
219 select GPIO_SYSFS if EXPERIMENTAL 224 select GPIO_SYSFS
220 default y 225 default y
221 226
222if PUV3_NB0916 227if PUV3_NB0916
diff --git a/arch/unicore32/include/asm/Kbuild b/arch/unicore32/include/asm/Kbuild
index c910c9857e11..89d8b6c4e39a 100644
--- a/arch/unicore32/include/asm/Kbuild
+++ b/arch/unicore32/include/asm/Kbuild
@@ -1,4 +1,3 @@
1include include/asm-generic/Kbuild.asm
2 1
3generic-y += atomic.h 2generic-y += atomic.h
4generic-y += auxvec.h 3generic-y += auxvec.h
@@ -54,6 +53,7 @@ generic-y += syscalls.h
54generic-y += termbits.h 53generic-y += termbits.h
55generic-y += termios.h 54generic-y += termios.h
56generic-y += topology.h 55generic-y += topology.h
56generic-y += trace_clock.h
57generic-y += types.h 57generic-y += types.h
58generic-y += ucontext.h 58generic-y += ucontext.h
59generic-y += unaligned.h 59generic-y += unaligned.h
diff --git a/arch/unicore32/include/asm/bug.h b/arch/unicore32/include/asm/bug.h
index b1ff8cadb086..93a56f3e2344 100644
--- a/arch/unicore32/include/asm/bug.h
+++ b/arch/unicore32/include/asm/bug.h
@@ -19,9 +19,4 @@ extern void die(const char *msg, struct pt_regs *regs, int err);
19extern void uc32_notify_die(const char *str, struct pt_regs *regs, 19extern void uc32_notify_die(const char *str, struct pt_regs *regs,
20 struct siginfo *info, unsigned long err, unsigned long trap); 20 struct siginfo *info, unsigned long err, unsigned long trap);
21 21
22extern asmlinkage void __backtrace(void);
23extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
24
25extern void __show_regs(struct pt_regs *);
26
27#endif /* __UNICORE_BUG_H__ */ 22#endif /* __UNICORE_BUG_H__ */
diff --git a/arch/unicore32/include/asm/cmpxchg.h b/arch/unicore32/include/asm/cmpxchg.h
index df4d5acfd19f..8e797ad4fa24 100644
--- a/arch/unicore32/include/asm/cmpxchg.h
+++ b/arch/unicore32/include/asm/cmpxchg.h
@@ -35,7 +35,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
35 : "memory", "cc"); 35 : "memory", "cc");
36 break; 36 break;
37 default: 37 default:
38 ret = __xchg_bad_pointer(); 38 __xchg_bad_pointer();
39 } 39 }
40 40
41 return ret; 41 return ret;
diff --git a/arch/unicore32/include/asm/kvm_para.h b/arch/unicore32/include/asm/kvm_para.h
deleted file mode 100644
index 14fab8f0b957..000000000000
--- a/arch/unicore32/include/asm/kvm_para.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/kvm_para.h>
diff --git a/arch/unicore32/include/asm/processor.h b/arch/unicore32/include/asm/processor.h
index 14382cb09657..4eaa42167667 100644
--- a/arch/unicore32/include/asm/processor.h
+++ b/arch/unicore32/include/asm/processor.h
@@ -72,11 +72,6 @@ unsigned long get_wchan(struct task_struct *p);
72 72
73#define cpu_relax() barrier() 73#define cpu_relax() barrier()
74 74
75/*
76 * Create a new kernel thread
77 */
78extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
79
80#define task_pt_regs(p) \ 75#define task_pt_regs(p) \
81 ((struct pt_regs *)(THREAD_START_SP + task_stack_page(p)) - 1) 76 ((struct pt_regs *)(THREAD_START_SP + task_stack_page(p)) - 1)
82 77
diff --git a/arch/unicore32/include/asm/ptrace.h b/arch/unicore32/include/asm/ptrace.h
index b9caf9b0997b..726749dab52f 100644
--- a/arch/unicore32/include/asm/ptrace.h
+++ b/arch/unicore32/include/asm/ptrace.h
@@ -12,80 +12,10 @@
12#ifndef __UNICORE_PTRACE_H__ 12#ifndef __UNICORE_PTRACE_H__
13#define __UNICORE_PTRACE_H__ 13#define __UNICORE_PTRACE_H__
14 14
15#define PTRACE_GET_THREAD_AREA 22 15#include <uapi/asm/ptrace.h>
16
17/*
18 * PSR bits
19 */
20#define USER_MODE 0x00000010
21#define REAL_MODE 0x00000011
22#define INTR_MODE 0x00000012
23#define PRIV_MODE 0x00000013
24#define ABRT_MODE 0x00000017
25#define EXTN_MODE 0x0000001b
26#define SUSR_MODE 0x0000001f
27#define MODE_MASK 0x0000001f
28#define PSR_R_BIT 0x00000040
29#define PSR_I_BIT 0x00000080
30#define PSR_V_BIT 0x10000000
31#define PSR_C_BIT 0x20000000
32#define PSR_Z_BIT 0x40000000
33#define PSR_S_BIT 0x80000000
34
35/*
36 * Groups of PSR bits
37 */
38#define PSR_f 0xff000000 /* Flags */
39#define PSR_c 0x000000ff /* Control */
40 16
41#ifndef __ASSEMBLY__ 17#ifndef __ASSEMBLY__
42 18
43/*
44 * This struct defines the way the registers are stored on the
45 * stack during a system call. Note that sizeof(struct pt_regs)
46 * has to be a multiple of 8.
47 */
48struct pt_regs {
49 unsigned long uregs[34];
50};
51
52#define UCreg_asr uregs[32]
53#define UCreg_pc uregs[31]
54#define UCreg_lr uregs[30]
55#define UCreg_sp uregs[29]
56#define UCreg_ip uregs[28]
57#define UCreg_fp uregs[27]
58#define UCreg_26 uregs[26]
59#define UCreg_25 uregs[25]
60#define UCreg_24 uregs[24]
61#define UCreg_23 uregs[23]
62#define UCreg_22 uregs[22]
63#define UCreg_21 uregs[21]
64#define UCreg_20 uregs[20]
65#define UCreg_19 uregs[19]
66#define UCreg_18 uregs[18]
67#define UCreg_17 uregs[17]
68#define UCreg_16 uregs[16]
69#define UCreg_15 uregs[15]
70#define UCreg_14 uregs[14]
71#define UCreg_13 uregs[13]
72#define UCreg_12 uregs[12]
73#define UCreg_11 uregs[11]
74#define UCreg_10 uregs[10]
75#define UCreg_09 uregs[9]
76#define UCreg_08 uregs[8]
77#define UCreg_07 uregs[7]
78#define UCreg_06 uregs[6]
79#define UCreg_05 uregs[5]
80#define UCreg_04 uregs[4]
81#define UCreg_03 uregs[3]
82#define UCreg_02 uregs[2]
83#define UCreg_01 uregs[1]
84#define UCreg_00 uregs[0]
85#define UCreg_ORIG_00 uregs[33]
86
87#ifdef __KERNEL__
88
89#define user_mode(regs) \ 19#define user_mode(regs) \
90 (processor_mode(regs) == USER_MODE) 20 (processor_mode(regs) == USER_MODE)
91 21
@@ -125,9 +55,5 @@ static inline int valid_user_regs(struct pt_regs *regs)
125 55
126#define instruction_pointer(regs) ((regs)->UCreg_pc) 56#define instruction_pointer(regs) ((regs)->UCreg_pc)
127 57
128#endif /* __KERNEL__ */
129
130#endif /* __ASSEMBLY__ */ 58#endif /* __ASSEMBLY__ */
131
132#endif 59#endif
133
diff --git a/arch/unicore32/include/uapi/asm/Kbuild b/arch/unicore32/include/uapi/asm/Kbuild
index baebb3da1d44..0514d7ad6855 100644
--- a/arch/unicore32/include/uapi/asm/Kbuild
+++ b/arch/unicore32/include/uapi/asm/Kbuild
@@ -1,3 +1,10 @@
1# UAPI Header export list 1# UAPI Header export list
2include include/uapi/asm-generic/Kbuild.asm 2include include/uapi/asm-generic/Kbuild.asm
3 3
4header-y += byteorder.h
5header-y += kvm_para.h
6header-y += ptrace.h
7header-y += sigcontext.h
8header-y += unistd.h
9
10generic-y += kvm_para.h
diff --git a/arch/unicore32/include/asm/byteorder.h b/arch/unicore32/include/uapi/asm/byteorder.h
index ebe1b3fef3e3..ebe1b3fef3e3 100644
--- a/arch/unicore32/include/asm/byteorder.h
+++ b/arch/unicore32/include/uapi/asm/byteorder.h
diff --git a/arch/unicore32/include/uapi/asm/ptrace.h b/arch/unicore32/include/uapi/asm/ptrace.h
new file mode 100644
index 000000000000..187aa2e98a53
--- /dev/null
+++ b/arch/unicore32/include/uapi/asm/ptrace.h
@@ -0,0 +1,90 @@
1/*
2 * linux/arch/unicore32/include/asm/ptrace.h
3 *
4 * Code specific to PKUnity SoC and UniCore ISA
5 *
6 * Copyright (C) 2001-2010 GUAN Xue-tao
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#ifndef _UAPI__UNICORE_PTRACE_H__
13#define _UAPI__UNICORE_PTRACE_H__
14
15#define PTRACE_GET_THREAD_AREA 22
16
17/*
18 * PSR bits
19 */
20#define USER_MODE 0x00000010
21#define REAL_MODE 0x00000011
22#define INTR_MODE 0x00000012
23#define PRIV_MODE 0x00000013
24#define ABRT_MODE 0x00000017
25#define EXTN_MODE 0x0000001b
26#define SUSR_MODE 0x0000001f
27#define MODE_MASK 0x0000001f
28#define PSR_R_BIT 0x00000040
29#define PSR_I_BIT 0x00000080
30#define PSR_V_BIT 0x10000000
31#define PSR_C_BIT 0x20000000
32#define PSR_Z_BIT 0x40000000
33#define PSR_S_BIT 0x80000000
34
35/*
36 * Groups of PSR bits
37 */
38#define PSR_f 0xff000000 /* Flags */
39#define PSR_c 0x000000ff /* Control */
40
41#ifndef __ASSEMBLY__
42
43/*
44 * This struct defines the way the registers are stored on the
45 * stack during a system call. Note that sizeof(struct pt_regs)
46 * has to be a multiple of 8.
47 */
48struct pt_regs {
49 unsigned long uregs[34];
50};
51
52#define UCreg_asr uregs[32]
53#define UCreg_pc uregs[31]
54#define UCreg_lr uregs[30]
55#define UCreg_sp uregs[29]
56#define UCreg_ip uregs[28]
57#define UCreg_fp uregs[27]
58#define UCreg_26 uregs[26]
59#define UCreg_25 uregs[25]
60#define UCreg_24 uregs[24]
61#define UCreg_23 uregs[23]
62#define UCreg_22 uregs[22]
63#define UCreg_21 uregs[21]
64#define UCreg_20 uregs[20]
65#define UCreg_19 uregs[19]
66#define UCreg_18 uregs[18]
67#define UCreg_17 uregs[17]
68#define UCreg_16 uregs[16]
69#define UCreg_15 uregs[15]
70#define UCreg_14 uregs[14]
71#define UCreg_13 uregs[13]
72#define UCreg_12 uregs[12]
73#define UCreg_11 uregs[11]
74#define UCreg_10 uregs[10]
75#define UCreg_09 uregs[9]
76#define UCreg_08 uregs[8]
77#define UCreg_07 uregs[7]
78#define UCreg_06 uregs[6]
79#define UCreg_05 uregs[5]
80#define UCreg_04 uregs[4]
81#define UCreg_03 uregs[3]
82#define UCreg_02 uregs[2]
83#define UCreg_01 uregs[1]
84#define UCreg_00 uregs[0]
85#define UCreg_ORIG_00 uregs[33]
86
87
88#endif /* __ASSEMBLY__ */
89
90#endif /* _UAPI__UNICORE_PTRACE_H__ */
diff --git a/arch/unicore32/include/asm/sigcontext.h b/arch/unicore32/include/uapi/asm/sigcontext.h
index 6a2d7671c052..6a2d7671c052 100644
--- a/arch/unicore32/include/asm/sigcontext.h
+++ b/arch/unicore32/include/uapi/asm/sigcontext.h
diff --git a/arch/unicore32/include/asm/unistd.h b/arch/unicore32/include/uapi/asm/unistd.h
index 2abcf61c615d..d18a3be89b38 100644
--- a/arch/unicore32/include/asm/unistd.h
+++ b/arch/unicore32/include/uapi/asm/unistd.h
@@ -12,3 +12,4 @@
12 12
13/* Use the standard ABI for syscalls. */ 13/* Use the standard ABI for syscalls. */
14#include <asm-generic/unistd.h> 14#include <asm-generic/unistd.h>
15#define __ARCH_WANT_SYS_EXECVE
diff --git a/arch/unicore32/kernel/entry.S b/arch/unicore32/kernel/entry.S
index dcb87ab19ddd..7049350c790f 100644
--- a/arch/unicore32/kernel/entry.S
+++ b/arch/unicore32/kernel/entry.S
@@ -573,17 +573,16 @@ ENDPROC(ret_to_user)
573 */ 573 */
574ENTRY(ret_from_fork) 574ENTRY(ret_from_fork)
575 b.l schedule_tail 575 b.l schedule_tail
576 get_thread_info tsk
577 ldw r1, [tsk+], #TI_FLAGS @ check for syscall tracing
578 mov why, #1
579 cand.a r1, #_TIF_SYSCALL_TRACE @ are we tracing syscalls?
580 beq ret_slow_syscall
581 mov r1, sp
582 mov r0, #1 @ trace exit [IP = 1]
583 b.l syscall_trace
584 b ret_slow_syscall 576 b ret_slow_syscall
585ENDPROC(ret_from_fork) 577ENDPROC(ret_from_fork)
586 578
579ENTRY(ret_from_kernel_thread)
580 b.l schedule_tail
581 mov r0, r5
582 adr lr, ret_slow_syscall
583 mov pc, r4
584ENDPROC(ret_from_kernel_thread)
585
587/*============================================================================= 586/*=============================================================================
588 * SWI handler 587 * SWI handler
589 *----------------------------------------------------------------------------- 588 *-----------------------------------------------------------------------------
@@ -669,11 +668,6 @@ __cr_alignment:
669#endif 668#endif
670 .ltorg 669 .ltorg
671 670
672ENTRY(sys_execve)
673 add r3, sp, #S_OFF
674 b __sys_execve
675ENDPROC(sys_execve)
676
677ENTRY(sys_clone) 671ENTRY(sys_clone)
678 add ip, sp, #S_OFF 672 add ip, sp, #S_OFF
679 stw ip, [sp+], #4 673 stw ip, [sp+], #4
diff --git a/arch/unicore32/kernel/pci.c b/arch/unicore32/kernel/pci.c
index b0056f68d321..7c4359240b81 100644
--- a/arch/unicore32/kernel/pci.c
+++ b/arch/unicore32/kernel/pci.c
@@ -250,9 +250,7 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
250 printk(KERN_INFO "PCI: bus%d: Fast back to back transfers %sabled\n", 250 printk(KERN_INFO "PCI: bus%d: Fast back to back transfers %sabled\n",
251 bus->number, (features & PCI_COMMAND_FAST_BACK) ? "en" : "dis"); 251 bus->number, (features & PCI_COMMAND_FAST_BACK) ? "en" : "dis");
252} 252}
253#ifdef CONFIG_HOTPLUG
254EXPORT_SYMBOL(pcibios_fixup_bus); 253EXPORT_SYMBOL(pcibios_fixup_bus);
255#endif
256 254
257static int __init pci_common_init(void) 255static int __init pci_common_init(void)
258{ 256{
diff --git a/arch/unicore32/kernel/process.c b/arch/unicore32/kernel/process.c
index b008586dad75..a8fe265ce2c0 100644
--- a/arch/unicore32/kernel/process.c
+++ b/arch/unicore32/kernel/process.c
@@ -258,6 +258,7 @@ void release_thread(struct task_struct *dead_task)
258} 258}
259 259
260asmlinkage void ret_from_fork(void) __asm__("ret_from_fork"); 260asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
261asmlinkage void ret_from_kernel_thread(void) __asm__("ret_from_kernel_thread");
261 262
262int 263int
263copy_thread(unsigned long clone_flags, unsigned long stack_start, 264copy_thread(unsigned long clone_flags, unsigned long stack_start,
@@ -266,17 +267,22 @@ copy_thread(unsigned long clone_flags, unsigned long stack_start,
266 struct thread_info *thread = task_thread_info(p); 267 struct thread_info *thread = task_thread_info(p);
267 struct pt_regs *childregs = task_pt_regs(p); 268 struct pt_regs *childregs = task_pt_regs(p);
268 269
269 *childregs = *regs;
270 childregs->UCreg_00 = 0;
271 childregs->UCreg_sp = stack_start;
272
273 memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save)); 270 memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save));
274 thread->cpu_context.sp = (unsigned long)childregs; 271 thread->cpu_context.sp = (unsigned long)childregs;
275 thread->cpu_context.pc = (unsigned long)ret_from_fork; 272 if (unlikely(!regs)) {
276 273 thread->cpu_context.pc = (unsigned long)ret_from_kernel_thread;
277 if (clone_flags & CLONE_SETTLS) 274 thread->cpu_context.r4 = stack_start;
278 childregs->UCreg_16 = regs->UCreg_03; 275 thread->cpu_context.r5 = stk_sz;
276 memset(childregs, 0, sizeof(struct pt_regs));
277 } else {
278 thread->cpu_context.pc = (unsigned long)ret_from_fork;
279 *childregs = *regs;
280 childregs->UCreg_00 = 0;
281 childregs->UCreg_sp = stack_start;
279 282
283 if (clone_flags & CLONE_SETTLS)
284 childregs->UCreg_16 = regs->UCreg_03;
285 }
280 return 0; 286 return 0;
281} 287}
282 288
@@ -305,42 +311,6 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fp)
305} 311}
306EXPORT_SYMBOL(dump_fpu); 312EXPORT_SYMBOL(dump_fpu);
307 313
308/*
309 * Shuffle the argument into the correct register before calling the
310 * thread function. r1 is the thread argument, r2 is the pointer to
311 * the thread function, and r3 points to the exit function.
312 */
313asm(".pushsection .text\n"
314" .align\n"
315" .type kernel_thread_helper, #function\n"
316"kernel_thread_helper:\n"
317" mov.a asr, r7\n"
318" mov r0, r4\n"
319" mov lr, r6\n"
320" mov pc, r5\n"
321" .size kernel_thread_helper, . - kernel_thread_helper\n"
322" .popsection");
323
324/*
325 * Create a kernel thread.
326 */
327pid_t kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
328{
329 struct pt_regs regs;
330
331 memset(&regs, 0, sizeof(regs));
332
333 regs.UCreg_04 = (unsigned long)arg;
334 regs.UCreg_05 = (unsigned long)fn;
335 regs.UCreg_06 = (unsigned long)do_exit;
336 regs.UCreg_07 = PRIV_MODE;
337 regs.UCreg_pc = (unsigned long)kernel_thread_helper;
338 regs.UCreg_asr = regs.UCreg_07 | PSR_I_BIT;
339
340 return do_fork(flags|CLONE_VM|CLONE_UNTRACED, 0, &regs, 0, NULL, NULL);
341}
342EXPORT_SYMBOL(kernel_thread);
343
344unsigned long get_wchan(struct task_struct *p) 314unsigned long get_wchan(struct task_struct *p)
345{ 315{
346 struct stackframe frame; 316 struct stackframe frame;
diff --git a/arch/unicore32/kernel/setup.h b/arch/unicore32/kernel/setup.h
index f23955028a18..30f749da8f73 100644
--- a/arch/unicore32/kernel/setup.h
+++ b/arch/unicore32/kernel/setup.h
@@ -30,4 +30,10 @@ extern char __vectors_start[], __vectors_end[];
30extern void kernel_thread_helper(void); 30extern void kernel_thread_helper(void);
31 31
32extern void __init early_signal_init(void); 32extern void __init early_signal_init(void);
33
34extern asmlinkage void __backtrace(void);
35extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
36
37extern void __show_regs(struct pt_regs *);
38
33#endif 39#endif
diff --git a/arch/unicore32/kernel/sys.c b/arch/unicore32/kernel/sys.c
index fabdee96110b..9680134b31f0 100644
--- a/arch/unicore32/kernel/sys.c
+++ b/arch/unicore32/kernel/sys.c
@@ -42,69 +42,6 @@ asmlinkage long __sys_clone(unsigned long clone_flags, unsigned long newsp,
42 parent_tid, child_tid); 42 parent_tid, child_tid);
43} 43}
44 44
45/* sys_execve() executes a new program.
46 * This is called indirectly via a small wrapper
47 */
48asmlinkage long __sys_execve(const char __user *filename,
49 const char __user *const __user *argv,
50 const char __user *const __user *envp,
51 struct pt_regs *regs)
52{
53 int error;
54 struct filename *fn;
55
56 fn = getname(filename);
57 error = PTR_ERR(fn);
58 if (IS_ERR(fn))
59 goto out;
60 error = do_execve(fn->name, argv, envp, regs);
61 putname(fn);
62out:
63 return error;
64}
65
66int kernel_execve(const char *filename,
67 const char *const argv[],
68 const char *const envp[])
69{
70 struct pt_regs regs;
71 int ret;
72
73 memset(&regs, 0, sizeof(struct pt_regs));
74 ret = do_execve(filename,
75 (const char __user *const __user *)argv,
76 (const char __user *const __user *)envp, &regs);
77 if (ret < 0)
78 goto out;
79
80 /*
81 * Save argc to the register structure for userspace.
82 */
83 regs.UCreg_00 = ret;
84
85 /*
86 * We were successful. We won't be returning to our caller, but
87 * instead to user space by manipulating the kernel stack.
88 */
89 asm("add r0, %0, %1\n\t"
90 "mov r1, %2\n\t"
91 "mov r2, %3\n\t"
92 "mov r22, #0\n\t" /* not a syscall */
93 "mov r23, %0\n\t" /* thread structure */
94 "b.l memmove\n\t" /* copy regs to top of stack */
95 "mov sp, r0\n\t" /* reposition stack pointer */
96 "b ret_to_user"
97 :
98 : "r" (current_thread_info()),
99 "Ir" (THREAD_START_SP - sizeof(regs)),
100 "r" (&regs),
101 "Ir" (sizeof(regs))
102 : "r0", "r1", "r2", "r3", "ip", "lr", "memory");
103
104 out:
105 return ret;
106}
107
108/* Note: used by the compat code even in 64-bit Linux. */ 45/* Note: used by the compat code even in 64-bit Linux. */
109SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, len, 46SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, len,
110 unsigned long, prot, unsigned long, flags, 47 unsigned long, prot, unsigned long, flags,
diff --git a/arch/unicore32/mm/fault.c b/arch/unicore32/mm/fault.c
index 2eeb9c04cab0..f9b5c10bccee 100644
--- a/arch/unicore32/mm/fault.c
+++ b/arch/unicore32/mm/fault.c
@@ -168,7 +168,7 @@ static inline bool access_error(unsigned int fsr, struct vm_area_struct *vma)
168} 168}
169 169
170static int __do_pf(struct mm_struct *mm, unsigned long addr, unsigned int fsr, 170static int __do_pf(struct mm_struct *mm, unsigned long addr, unsigned int fsr,
171 struct task_struct *tsk) 171 unsigned int flags, struct task_struct *tsk)
172{ 172{
173 struct vm_area_struct *vma; 173 struct vm_area_struct *vma;
174 int fault; 174 int fault;
@@ -194,14 +194,7 @@ good_area:
194 * If for any reason at all we couldn't handle the fault, make 194 * If for any reason at all we couldn't handle the fault, make
195 * sure we exit gracefully rather than endlessly redo the fault. 195 * sure we exit gracefully rather than endlessly redo the fault.
196 */ 196 */
197 fault = handle_mm_fault(mm, vma, addr & PAGE_MASK, 197 fault = handle_mm_fault(mm, vma, addr & PAGE_MASK, flags);
198 (!(fsr ^ 0x12)) ? FAULT_FLAG_WRITE : 0);
199 if (unlikely(fault & VM_FAULT_ERROR))
200 return fault;
201 if (fault & VM_FAULT_MAJOR)
202 tsk->maj_flt++;
203 else
204 tsk->min_flt++;
205 return fault; 198 return fault;
206 199
207check_stack: 200check_stack:
@@ -216,6 +209,8 @@ static int do_pf(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
216 struct task_struct *tsk; 209 struct task_struct *tsk;
217 struct mm_struct *mm; 210 struct mm_struct *mm;
218 int fault, sig, code; 211 int fault, sig, code;
212 unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
213 ((!(fsr ^ 0x12)) ? FAULT_FLAG_WRITE : 0);
219 214
220 tsk = current; 215 tsk = current;
221 mm = tsk->mm; 216 mm = tsk->mm;
@@ -236,6 +231,7 @@ static int do_pf(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
236 if (!user_mode(regs) 231 if (!user_mode(regs)
237 && !search_exception_tables(regs->UCreg_pc)) 232 && !search_exception_tables(regs->UCreg_pc))
238 goto no_context; 233 goto no_context;
234retry:
239 down_read(&mm->mmap_sem); 235 down_read(&mm->mmap_sem);
240 } else { 236 } else {
241 /* 237 /*
@@ -251,7 +247,28 @@ static int do_pf(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
251#endif 247#endif
252 } 248 }
253 249
254 fault = __do_pf(mm, addr, fsr, tsk); 250 fault = __do_pf(mm, addr, fsr, flags, tsk);
251
252 /* If we need to retry but a fatal signal is pending, handle the
253 * signal first. We do not need to release the mmap_sem because
254 * it would already be released in __lock_page_or_retry in
255 * mm/filemap.c. */
256 if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
257 return 0;
258
259 if (!(fault & VM_FAULT_ERROR) && (flags & FAULT_FLAG_ALLOW_RETRY)) {
260 if (fault & VM_FAULT_MAJOR)
261 tsk->maj_flt++;
262 else
263 tsk->min_flt++;
264 if (fault & VM_FAULT_RETRY) {
265 /* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk
266 * of starvation. */
267 flags &= ~FAULT_FLAG_ALLOW_RETRY;
268 goto retry;
269 }
270 }
271
255 up_read(&mm->mmap_sem); 272 up_read(&mm->mmap_sem);
256 273
257 /* 274 /*
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 46c3bff3ced2..037c4e30c271 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -69,8 +69,8 @@ config X86
69 select HAVE_PERF_USER_STACK_DUMP 69 select HAVE_PERF_USER_STACK_DUMP
70 select HAVE_DEBUG_KMEMLEAK 70 select HAVE_DEBUG_KMEMLEAK
71 select ANON_INODES 71 select ANON_INODES
72 select HAVE_ALIGNED_STRUCT_PAGE if SLUB && !M386 72 select HAVE_ALIGNED_STRUCT_PAGE if SLUB
73 select HAVE_CMPXCHG_LOCAL if !M386 73 select HAVE_CMPXCHG_LOCAL
74 select HAVE_CMPXCHG_DOUBLE 74 select HAVE_CMPXCHG_DOUBLE
75 select HAVE_ARCH_KMEMCHECK 75 select HAVE_ARCH_KMEMCHECK
76 select HAVE_USER_RETURN_NOTIFIER 76 select HAVE_USER_RETURN_NOTIFIER
@@ -106,7 +106,7 @@ config X86
106 select KTIME_SCALAR if X86_32 106 select KTIME_SCALAR if X86_32
107 select GENERIC_STRNCPY_FROM_USER 107 select GENERIC_STRNCPY_FROM_USER
108 select GENERIC_STRNLEN_USER 108 select GENERIC_STRNLEN_USER
109 select HAVE_RCU_USER_QS if X86_64 109 select HAVE_CONTEXT_TRACKING if X86_64
110 select HAVE_IRQ_TIME_ACCOUNTING 110 select HAVE_IRQ_TIME_ACCOUNTING
111 select GENERIC_KERNEL_THREAD 111 select GENERIC_KERNEL_THREAD
112 select GENERIC_KERNEL_EXECVE 112 select GENERIC_KERNEL_EXECVE
@@ -171,13 +171,8 @@ config ARCH_MAY_HAVE_PC_FDC
171 def_bool y 171 def_bool y
172 depends on ISA_DMA_API 172 depends on ISA_DMA_API
173 173
174config RWSEM_GENERIC_SPINLOCK
175 def_bool y
176 depends on !X86_XADD
177
178config RWSEM_XCHGADD_ALGORITHM 174config RWSEM_XCHGADD_ALGORITHM
179 def_bool y 175 def_bool y
180 depends on X86_XADD
181 176
182config GENERIC_CALIBRATE_DELAY 177config GENERIC_CALIBRATE_DELAY
183 def_bool y 178 def_bool y
@@ -310,7 +305,7 @@ config X86_X2APIC
310 If you don't know what to do here, say N. 305 If you don't know what to do here, say N.
311 306
312config X86_MPPARSE 307config X86_MPPARSE
313 bool "Enable MPS table" if ACPI 308 bool "Enable MPS table" if ACPI || SFI
314 default y 309 default y
315 depends on X86_LOCAL_APIC 310 depends on X86_LOCAL_APIC
316 ---help--- 311 ---help---
@@ -1100,7 +1095,7 @@ config HIGHMEM4G
1100 1095
1101config HIGHMEM64G 1096config HIGHMEM64G
1102 bool "64GB" 1097 bool "64GB"
1103 depends on !M386 && !M486 1098 depends on !M486
1104 select X86_PAE 1099 select X86_PAE
1105 ---help--- 1100 ---help---
1106 Select this if you have a 32-bit processor and more than 4 1101 Select this if you have a 32-bit processor and more than 4
@@ -1698,6 +1693,50 @@ config HOTPLUG_CPU
1698 automatically on SMP systems. ) 1693 automatically on SMP systems. )
1699 Say N if you want to disable CPU hotplug. 1694 Say N if you want to disable CPU hotplug.
1700 1695
1696config BOOTPARAM_HOTPLUG_CPU0
1697 bool "Set default setting of cpu0_hotpluggable"
1698 default n
1699 depends on HOTPLUG_CPU && EXPERIMENTAL
1700 ---help---
1701 Set whether default state of cpu0_hotpluggable is on or off.
1702
1703 Say Y here to enable CPU0 hotplug by default. If this switch
1704 is turned on, there is no need to give cpu0_hotplug kernel
1705 parameter and the CPU0 hotplug feature is enabled by default.
1706
1707 Please note: there are two known CPU0 dependencies if you want
1708 to enable the CPU0 hotplug feature either by this switch or by
1709 cpu0_hotplug kernel parameter.
1710
1711 First, resume from hibernate or suspend always starts from CPU0.
1712 So hibernate and suspend are prevented if CPU0 is offline.
1713
1714 Second dependency is PIC interrupts always go to CPU0. CPU0 can not
1715 offline if any interrupt can not migrate out of CPU0. There may
1716 be other CPU0 dependencies.
1717
1718 Please make sure the dependencies are under your control before
1719 you enable this feature.
1720
1721 Say N if you don't want to enable CPU0 hotplug feature by default.
1722 You still can enable the CPU0 hotplug feature at boot by kernel
1723 parameter cpu0_hotplug.
1724
1725config DEBUG_HOTPLUG_CPU0
1726 def_bool n
1727 prompt "Debug CPU0 hotplug"
1728 depends on HOTPLUG_CPU && EXPERIMENTAL
1729 ---help---
1730 Enabling this option offlines CPU0 (if CPU0 can be offlined) as
1731 soon as possible and boots up userspace with CPU0 offlined. User
1732 can online CPU0 back after boot time.
1733
1734 To debug CPU0 hotplug, you need to enable CPU0 offline/online
1735 feature by either turning on CONFIG_BOOTPARAM_HOTPLUG_CPU0 during
1736 compilation or giving cpu0_hotplug kernel parameter at boot.
1737
1738 If unsure, say N.
1739
1701config COMPAT_VDSO 1740config COMPAT_VDSO
1702 def_bool y 1741 def_bool y
1703 prompt "Compat VDSO support" 1742 prompt "Compat VDSO support"
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index f3b86d0df44e..c026cca5602c 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -4,23 +4,24 @@ choice
4 default M686 if X86_32 4 default M686 if X86_32
5 default GENERIC_CPU if X86_64 5 default GENERIC_CPU if X86_64
6 6
7config M386 7config M486
8 bool "386" 8 bool "486"
9 depends on X86_32 && !UML 9 depends on X86_32
10 ---help--- 10 ---help---
11 This is the processor type of your CPU. This information is used for 11 This is the processor type of your CPU. This information is
12 optimizing purposes. In order to compile a kernel that can run on 12 used for optimizing purposes. In order to compile a kernel
13 all x86 CPU types (albeit not optimally fast), you can specify 13 that can run on all supported x86 CPU types (albeit not
14 "386" here. 14 optimally fast), you can specify "486" here.
15
16 Note that the 386 is no longer supported, this includes
17 AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI 486DLC/DLC2,
18 UMC 486SX-S and the NexGen Nx586.
15 19
16 The kernel will not necessarily run on earlier architectures than 20 The kernel will not necessarily run on earlier architectures than
17 the one you have chosen, e.g. a Pentium optimized kernel will run on 21 the one you have chosen, e.g. a Pentium optimized kernel will run on
18 a PPro, but not necessarily on a i486. 22 a PPro, but not necessarily on a i486.
19 23
20 Here are the settings recommended for greatest speed: 24 Here are the settings recommended for greatest speed:
21 - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
22 486DLC/DLC2, and UMC 486SX-S. Only "386" kernels will run on a 386
23 class machine.
24 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or 25 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
25 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S. 26 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
26 - "586" for generic Pentium CPUs lacking the TSC 27 - "586" for generic Pentium CPUs lacking the TSC
@@ -43,16 +44,7 @@ config M386
43 - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above). 44 - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
44 - "VIA C7" for VIA C7. 45 - "VIA C7" for VIA C7.
45 46
46 If you don't know what to do, choose "386". 47 If you don't know what to do, choose "486".
47
48config M486
49 bool "486"
50 depends on X86_32
51 ---help---
52 Select this for a 486 series processor, either Intel or one of the
53 compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,
54 DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
55 U5S.
56 48
57config M586 49config M586
58 bool "586/K5/5x86/6x86/6x86MX" 50 bool "586/K5/5x86/6x86/6x86MX"
@@ -305,24 +297,16 @@ config X86_INTERNODE_CACHE_SHIFT
305 default "12" if X86_VSMP 297 default "12" if X86_VSMP
306 default X86_L1_CACHE_SHIFT 298 default X86_L1_CACHE_SHIFT
307 299
308config X86_CMPXCHG
309 def_bool y
310 depends on X86_64 || (X86_32 && !M386)
311
312config X86_L1_CACHE_SHIFT 300config X86_L1_CACHE_SHIFT
313 int 301 int
314 default "7" if MPENTIUM4 || MPSC 302 default "7" if MPENTIUM4 || MPSC
315 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU 303 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
316 default "4" if MELAN || M486 || M386 || MGEODEGX1 304 default "4" if MELAN || M486 || MGEODEGX1
317 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX 305 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
318 306
319config X86_XADD
320 def_bool y
321 depends on !M386
322
323config X86_PPRO_FENCE 307config X86_PPRO_FENCE
324 bool "PentiumPro memory ordering errata workaround" 308 bool "PentiumPro memory ordering errata workaround"
325 depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1 309 depends on M686 || M586MMX || M586TSC || M586 || M486 || MGEODEGX1
326 ---help--- 310 ---help---
327 Old PentiumPro multiprocessor systems had errata that could cause 311 Old PentiumPro multiprocessor systems had errata that could cause
328 memory operations to violate the x86 ordering standard in rare cases. 312 memory operations to violate the x86 ordering standard in rare cases.
@@ -335,27 +319,11 @@ config X86_PPRO_FENCE
335 319
336config X86_F00F_BUG 320config X86_F00F_BUG
337 def_bool y 321 def_bool y
338 depends on M586MMX || M586TSC || M586 || M486 || M386 322 depends on M586MMX || M586TSC || M586 || M486
339 323
340config X86_INVD_BUG 324config X86_INVD_BUG
341 def_bool y 325 def_bool y
342 depends on M486 || M386 326 depends on M486
343
344config X86_WP_WORKS_OK
345 def_bool y
346 depends on !M386
347
348config X86_INVLPG
349 def_bool y
350 depends on X86_32 && !M386
351
352config X86_BSWAP
353 def_bool y
354 depends on X86_32 && !M386
355
356config X86_POPAD_OK
357 def_bool y
358 depends on X86_32 && !M386
359 327
360config X86_ALIGNMENT_16 328config X86_ALIGNMENT_16
361 def_bool y 329 def_bool y
@@ -412,12 +380,11 @@ config X86_MINIMUM_CPU_FAMILY
412 default "64" if X86_64 380 default "64" if X86_64
413 default "6" if X86_32 && X86_P6_NOP 381 default "6" if X86_32 && X86_P6_NOP
414 default "5" if X86_32 && X86_CMPXCHG64 382 default "5" if X86_32 && X86_CMPXCHG64
415 default "4" if X86_32 && (X86_XADD || X86_CMPXCHG || X86_BSWAP || X86_WP_WORKS_OK) 383 default "4"
416 default "3"
417 384
418config X86_DEBUGCTLMSR 385config X86_DEBUGCTLMSR
419 def_bool y 386 def_bool y
420 depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486 || M386) && !UML 387 depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486) && !UML
421 388
422menuconfig PROCESSOR_SELECT 389menuconfig PROCESSOR_SELECT
423 bool "Supported processor vendors" if EXPERT 390 bool "Supported processor vendors" if EXPERT
@@ -441,7 +408,7 @@ config CPU_SUP_INTEL
441config CPU_SUP_CYRIX_32 408config CPU_SUP_CYRIX_32
442 default y 409 default y
443 bool "Support Cyrix processors" if PROCESSOR_SELECT 410 bool "Support Cyrix processors" if PROCESSOR_SELECT
444 depends on M386 || M486 || M586 || M586TSC || M586MMX || (EXPERT && !64BIT) 411 depends on M486 || M586 || M586TSC || M586MMX || (EXPERT && !64BIT)
445 ---help--- 412 ---help---
446 This enables detection, tunings and quirks for Cyrix processors 413 This enables detection, tunings and quirks for Cyrix processors
447 414
@@ -495,7 +462,7 @@ config CPU_SUP_TRANSMETA_32
495config CPU_SUP_UMC_32 462config CPU_SUP_UMC_32
496 default y 463 default y
497 bool "Support UMC processors" if PROCESSOR_SELECT 464 bool "Support UMC processors" if PROCESSOR_SELECT
498 depends on M386 || M486 || (EXPERT && !64BIT) 465 depends on M486 || (EXPERT && !64BIT)
499 ---help--- 466 ---help---
500 This enables detection, tunings and quirks for UMC processors 467 This enables detection, tunings and quirks for UMC processors
501 468
diff --git a/arch/x86/Makefile_32.cpu b/arch/x86/Makefile_32.cpu
index 86cee7b749e1..6647ed49c66c 100644
--- a/arch/x86/Makefile_32.cpu
+++ b/arch/x86/Makefile_32.cpu
@@ -10,7 +10,6 @@ tune = $(call cc-option,-mcpu=$(1),$(2))
10endif 10endif
11 11
12align := $(cc-option-align) 12align := $(cc-option-align)
13cflags-$(CONFIG_M386) += -march=i386
14cflags-$(CONFIG_M486) += -march=i486 13cflags-$(CONFIG_M486) += -march=i486
15cflags-$(CONFIG_M586) += -march=i586 14cflags-$(CONFIG_M586) += -march=i586
16cflags-$(CONFIG_M586TSC) += -march=i586 15cflags-$(CONFIG_M586TSC) += -march=i586
diff --git a/arch/x86/boot/compressed/eboot.c b/arch/x86/boot/compressed/eboot.c
index c760e073963e..e87b0cac14b5 100644
--- a/arch/x86/boot/compressed/eboot.c
+++ b/arch/x86/boot/compressed/eboot.c
@@ -12,6 +12,8 @@
12#include <asm/setup.h> 12#include <asm/setup.h>
13#include <asm/desc.h> 13#include <asm/desc.h>
14 14
15#undef memcpy /* Use memcpy from misc.c */
16
15#include "eboot.h" 17#include "eboot.h"
16 18
17static efi_system_table_t *sys_table; 19static efi_system_table_t *sys_table;
diff --git a/arch/x86/boot/header.S b/arch/x86/boot/header.S
index 2a017441b8b2..8c132a625b94 100644
--- a/arch/x86/boot/header.S
+++ b/arch/x86/boot/header.S
@@ -476,6 +476,3 @@ die:
476setup_corrupt: 476setup_corrupt:
477 .byte 7 477 .byte 7
478 .string "No setup signature found...\n" 478 .string "No setup signature found...\n"
479
480 .data
481dummy: .long 0
diff --git a/arch/x86/include/asm/Kbuild b/arch/x86/include/asm/Kbuild
index 66e5f0ef0523..79fd8a3418f9 100644
--- a/arch/x86/include/asm/Kbuild
+++ b/arch/x86/include/asm/Kbuild
@@ -12,6 +12,7 @@ header-y += mce.h
12header-y += msr-index.h 12header-y += msr-index.h
13header-y += msr.h 13header-y += msr.h
14header-y += mtrr.h 14header-y += mtrr.h
15header-y += perf_regs.h
15header-y += posix_types_32.h 16header-y += posix_types_32.h
16header-y += posix_types_64.h 17header-y += posix_types_64.h
17header-y += posix_types_x32.h 18header-y += posix_types_x32.h
@@ -19,8 +20,10 @@ header-y += prctl.h
19header-y += processor-flags.h 20header-y += processor-flags.h
20header-y += ptrace-abi.h 21header-y += ptrace-abi.h
21header-y += sigcontext32.h 22header-y += sigcontext32.h
23header-y += svm.h
22header-y += ucontext.h 24header-y += ucontext.h
23header-y += vm86.h 25header-y += vm86.h
26header-y += vmx.h
24header-y += vsyscall.h 27header-y += vsyscall.h
25 28
26genhdr-y += unistd_32.h 29genhdr-y += unistd_32.h
diff --git a/arch/x86/include/asm/atomic.h b/arch/x86/include/asm/atomic.h
index b6c3b821acf6..722aa3b04624 100644
--- a/arch/x86/include/asm/atomic.h
+++ b/arch/x86/include/asm/atomic.h
@@ -172,23 +172,7 @@ static inline int atomic_add_negative(int i, atomic_t *v)
172 */ 172 */
173static inline int atomic_add_return(int i, atomic_t *v) 173static inline int atomic_add_return(int i, atomic_t *v)
174{ 174{
175#ifdef CONFIG_M386
176 int __i;
177 unsigned long flags;
178 if (unlikely(boot_cpu_data.x86 <= 3))
179 goto no_xadd;
180#endif
181 /* Modern 486+ processor */
182 return i + xadd(&v->counter, i); 175 return i + xadd(&v->counter, i);
183
184#ifdef CONFIG_M386
185no_xadd: /* Legacy 386 processor */
186 raw_local_irq_save(flags);
187 __i = atomic_read(v);
188 atomic_set(v, i + __i);
189 raw_local_irq_restore(flags);
190 return i + __i;
191#endif
192} 176}
193 177
194/** 178/**
diff --git a/arch/x86/include/asm/cmpxchg_32.h b/arch/x86/include/asm/cmpxchg_32.h
index 53f4b219336b..f8bf2eecab86 100644
--- a/arch/x86/include/asm/cmpxchg_32.h
+++ b/arch/x86/include/asm/cmpxchg_32.h
@@ -34,9 +34,7 @@ static inline void set_64bit(volatile u64 *ptr, u64 value)
34 : "memory"); 34 : "memory");
35} 35}
36 36
37#ifdef CONFIG_X86_CMPXCHG
38#define __HAVE_ARCH_CMPXCHG 1 37#define __HAVE_ARCH_CMPXCHG 1
39#endif
40 38
41#ifdef CONFIG_X86_CMPXCHG64 39#ifdef CONFIG_X86_CMPXCHG64
42#define cmpxchg64(ptr, o, n) \ 40#define cmpxchg64(ptr, o, n) \
@@ -73,59 +71,6 @@ static inline u64 __cmpxchg64_local(volatile u64 *ptr, u64 old, u64 new)
73 return prev; 71 return prev;
74} 72}
75 73
76#ifndef CONFIG_X86_CMPXCHG
77/*
78 * Building a kernel capable running on 80386. It may be necessary to
79 * simulate the cmpxchg on the 80386 CPU. For that purpose we define
80 * a function for each of the sizes we support.
81 */
82
83extern unsigned long cmpxchg_386_u8(volatile void *, u8, u8);
84extern unsigned long cmpxchg_386_u16(volatile void *, u16, u16);
85extern unsigned long cmpxchg_386_u32(volatile void *, u32, u32);
86
87static inline unsigned long cmpxchg_386(volatile void *ptr, unsigned long old,
88 unsigned long new, int size)
89{
90 switch (size) {
91 case 1:
92 return cmpxchg_386_u8(ptr, old, new);
93 case 2:
94 return cmpxchg_386_u16(ptr, old, new);
95 case 4:
96 return cmpxchg_386_u32(ptr, old, new);
97 }
98 return old;
99}
100
101#define cmpxchg(ptr, o, n) \
102({ \
103 __typeof__(*(ptr)) __ret; \
104 if (likely(boot_cpu_data.x86 > 3)) \
105 __ret = (__typeof__(*(ptr)))__cmpxchg((ptr), \
106 (unsigned long)(o), (unsigned long)(n), \
107 sizeof(*(ptr))); \
108 else \
109 __ret = (__typeof__(*(ptr)))cmpxchg_386((ptr), \
110 (unsigned long)(o), (unsigned long)(n), \
111 sizeof(*(ptr))); \
112 __ret; \
113})
114#define cmpxchg_local(ptr, o, n) \
115({ \
116 __typeof__(*(ptr)) __ret; \
117 if (likely(boot_cpu_data.x86 > 3)) \
118 __ret = (__typeof__(*(ptr)))__cmpxchg_local((ptr), \
119 (unsigned long)(o), (unsigned long)(n), \
120 sizeof(*(ptr))); \
121 else \
122 __ret = (__typeof__(*(ptr)))cmpxchg_386((ptr), \
123 (unsigned long)(o), (unsigned long)(n), \
124 sizeof(*(ptr))); \
125 __ret; \
126})
127#endif
128
129#ifndef CONFIG_X86_CMPXCHG64 74#ifndef CONFIG_X86_CMPXCHG64
130/* 75/*
131 * Building a kernel capable running on 80386 and 80486. It may be necessary 76 * Building a kernel capable running on 80386 and 80486. It may be necessary
diff --git a/arch/x86/include/asm/rcu.h b/arch/x86/include/asm/context_tracking.h
index d1ac07a23979..1616562683e9 100644
--- a/arch/x86/include/asm/rcu.h
+++ b/arch/x86/include/asm/context_tracking.h
@@ -1,27 +1,26 @@
1#ifndef _ASM_X86_RCU_H 1#ifndef _ASM_X86_CONTEXT_TRACKING_H
2#define _ASM_X86_RCU_H 2#define _ASM_X86_CONTEXT_TRACKING_H
3 3
4#ifndef __ASSEMBLY__ 4#ifndef __ASSEMBLY__
5 5#include <linux/context_tracking.h>
6#include <linux/rcupdate.h>
7#include <asm/ptrace.h> 6#include <asm/ptrace.h>
8 7
9static inline void exception_enter(struct pt_regs *regs) 8static inline void exception_enter(struct pt_regs *regs)
10{ 9{
11 rcu_user_exit(); 10 user_exit();
12} 11}
13 12
14static inline void exception_exit(struct pt_regs *regs) 13static inline void exception_exit(struct pt_regs *regs)
15{ 14{
16#ifdef CONFIG_RCU_USER_QS 15#ifdef CONFIG_CONTEXT_TRACKING
17 if (user_mode(regs)) 16 if (user_mode(regs))
18 rcu_user_enter(); 17 user_enter();
19#endif 18#endif
20} 19}
21 20
22#else /* __ASSEMBLY__ */ 21#else /* __ASSEMBLY__ */
23 22
24#ifdef CONFIG_RCU_USER_QS 23#ifdef CONFIG_CONTEXT_TRACKING
25# define SCHEDULE_USER call schedule_user 24# define SCHEDULE_USER call schedule_user
26#else 25#else
27# define SCHEDULE_USER call schedule 26# define SCHEDULE_USER call schedule
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index 4564c8e28a33..5f9a1243190e 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -28,6 +28,10 @@ struct x86_cpu {
28#ifdef CONFIG_HOTPLUG_CPU 28#ifdef CONFIG_HOTPLUG_CPU
29extern int arch_register_cpu(int num); 29extern int arch_register_cpu(int num);
30extern void arch_unregister_cpu(int); 30extern void arch_unregister_cpu(int);
31extern void __cpuinit start_cpu0(void);
32#ifdef CONFIG_DEBUG_HOTPLUG_CPU0
33extern int _debug_hotplug_cpu(int cpu, int action);
34#endif
31#endif 35#endif
32 36
33DECLARE_PER_CPU(int, cpu_state); 37DECLARE_PER_CPU(int, cpu_state);
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 8c297aa53eef..da40b1e2228e 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -311,12 +311,7 @@ extern const char * const x86_power_flags[32];
311#define cpu_has_cx8 boot_cpu_has(X86_FEATURE_CX8) 311#define cpu_has_cx8 boot_cpu_has(X86_FEATURE_CX8)
312#define cpu_has_cx16 boot_cpu_has(X86_FEATURE_CX16) 312#define cpu_has_cx16 boot_cpu_has(X86_FEATURE_CX16)
313#define cpu_has_eager_fpu boot_cpu_has(X86_FEATURE_EAGER_FPU) 313#define cpu_has_eager_fpu boot_cpu_has(X86_FEATURE_EAGER_FPU)
314 314#define cpu_has_topoext boot_cpu_has(X86_FEATURE_TOPOEXT)
315#if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64)
316# define cpu_has_invlpg 1
317#else
318# define cpu_has_invlpg (boot_cpu_data.x86 > 3)
319#endif
320 315
321#ifdef CONFIG_X86_64 316#ifdef CONFIG_X86_64
322 317
diff --git a/arch/x86/include/asm/device.h b/arch/x86/include/asm/device.h
index 93e1c55f14ab..03dd72957d2f 100644
--- a/arch/x86/include/asm/device.h
+++ b/arch/x86/include/asm/device.h
@@ -2,9 +2,6 @@
2#define _ASM_X86_DEVICE_H 2#define _ASM_X86_DEVICE_H
3 3
4struct dev_archdata { 4struct dev_archdata {
5#ifdef CONFIG_ACPI
6 void *acpi_handle;
7#endif
8#ifdef CONFIG_X86_DEV_DMA_OPS 5#ifdef CONFIG_X86_DEV_DMA_OPS
9 struct dma_map_ops *dma_ops; 6 struct dma_map_ops *dma_ops;
10#endif 7#endif
diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h
index 5939f44fe0c0..9c999c1674fa 100644
--- a/arch/x86/include/asm/elf.h
+++ b/arch/x86/include/asm/elf.h
@@ -354,12 +354,10 @@ static inline int mmap_is_ia32(void)
354 return 0; 354 return 0;
355} 355}
356 356
357/* The first two values are special, do not change. See align_addr() */ 357/* Do not change the values. See get_align_mask() */
358enum align_flags { 358enum align_flags {
359 ALIGN_VA_32 = BIT(0), 359 ALIGN_VA_32 = BIT(0),
360 ALIGN_VA_64 = BIT(1), 360 ALIGN_VA_64 = BIT(1),
361 ALIGN_VDSO = BIT(2),
362 ALIGN_TOPDOWN = BIT(3),
363}; 361};
364 362
365struct va_alignment { 363struct va_alignment {
@@ -368,5 +366,5 @@ struct va_alignment {
368} ____cacheline_aligned; 366} ____cacheline_aligned;
369 367
370extern struct va_alignment va_align; 368extern struct va_alignment va_align;
371extern unsigned long align_addr(unsigned long, struct file *, enum align_flags); 369extern unsigned long align_vdso_addr(unsigned long);
372#endif /* _ASM_X86_ELF_H */ 370#endif /* _ASM_X86_ELF_H */
diff --git a/arch/x86/include/asm/fpu-internal.h b/arch/x86/include/asm/fpu-internal.h
index 831dbb9c6c02..41ab26ea6564 100644
--- a/arch/x86/include/asm/fpu-internal.h
+++ b/arch/x86/include/asm/fpu-internal.h
@@ -399,14 +399,17 @@ static inline void drop_init_fpu(struct task_struct *tsk)
399typedef struct { int preload; } fpu_switch_t; 399typedef struct { int preload; } fpu_switch_t;
400 400
401/* 401/*
402 * FIXME! We could do a totally lazy restore, but we need to 402 * Must be run with preemption disabled: this clears the fpu_owner_task,
403 * add a per-cpu "this was the task that last touched the FPU 403 * on this CPU.
404 * on this CPU" variable, and the task needs to have a "I last
405 * touched the FPU on this CPU" and check them.
406 * 404 *
407 * We don't do that yet, so "fpu_lazy_restore()" always returns 405 * This will disable any lazy FPU state restore of the current FPU state,
408 * false, but some day.. 406 * but if the current thread owns the FPU, it will still be saved by.
409 */ 407 */
408static inline void __cpu_disable_lazy_restore(unsigned int cpu)
409{
410 per_cpu(fpu_owner_task, cpu) = NULL;
411}
412
410static inline int fpu_lazy_restore(struct task_struct *new, unsigned int cpu) 413static inline int fpu_lazy_restore(struct task_struct *new, unsigned int cpu)
411{ 414{
412 return new == this_cpu_read_stable(fpu_owner_task) && 415 return new == this_cpu_read_stable(fpu_owner_task) &&
diff --git a/arch/x86/include/asm/futex.h b/arch/x86/include/asm/futex.h
index f373046e63ec..be27ba1e947a 100644
--- a/arch/x86/include/asm/futex.h
+++ b/arch/x86/include/asm/futex.h
@@ -55,12 +55,6 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
55 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) 55 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
56 return -EFAULT; 56 return -EFAULT;
57 57
58#if defined(CONFIG_X86_32) && !defined(CONFIG_X86_BSWAP)
59 /* Real i386 machines can only support FUTEX_OP_SET */
60 if (op != FUTEX_OP_SET && boot_cpu_data.x86 == 3)
61 return -ENOSYS;
62#endif
63
64 pagefault_disable(); 58 pagefault_disable();
65 59
66 switch (op) { 60 switch (op) {
@@ -118,12 +112,6 @@ static inline int futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
118{ 112{
119 int ret = 0; 113 int ret = 0;
120 114
121#if defined(CONFIG_X86_32) && !defined(CONFIG_X86_BSWAP)
122 /* Real i386 machines have no cmpxchg instruction */
123 if (boot_cpu_data.x86 == 3)
124 return -ENOSYS;
125#endif
126
127 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) 115 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
128 return -EFAULT; 116 return -EFAULT;
129 117
diff --git a/arch/x86/include/asm/local.h b/arch/x86/include/asm/local.h
index c8bed0da434a..2d89e3980cbd 100644
--- a/arch/x86/include/asm/local.h
+++ b/arch/x86/include/asm/local.h
@@ -124,27 +124,11 @@ static inline int local_add_negative(long i, local_t *l)
124 */ 124 */
125static inline long local_add_return(long i, local_t *l) 125static inline long local_add_return(long i, local_t *l)
126{ 126{
127 long __i; 127 long __i = i;
128#ifdef CONFIG_M386
129 unsigned long flags;
130 if (unlikely(boot_cpu_data.x86 <= 3))
131 goto no_xadd;
132#endif
133 /* Modern 486+ processor */
134 __i = i;
135 asm volatile(_ASM_XADD "%0, %1;" 128 asm volatile(_ASM_XADD "%0, %1;"
136 : "+r" (i), "+m" (l->a.counter) 129 : "+r" (i), "+m" (l->a.counter)
137 : : "memory"); 130 : : "memory");
138 return i + __i; 131 return i + __i;
139
140#ifdef CONFIG_M386
141no_xadd: /* Legacy 386 processor */
142 local_irq_save(flags);
143 __i = local_read(l);
144 local_set(l, i + __i);
145 local_irq_restore(flags);
146 return i + __i;
147#endif
148} 132}
149 133
150static inline long local_sub_return(long i, local_t *l) 134static inline long local_sub_return(long i, local_t *l)
diff --git a/arch/x86/include/asm/mman.h b/arch/x86/include/asm/mman.h
index 593e51d4643f..513b05f15bb4 100644
--- a/arch/x86/include/asm/mman.h
+++ b/arch/x86/include/asm/mman.h
@@ -3,6 +3,9 @@
3 3
4#define MAP_32BIT 0x40 /* only give out 32bit addresses */ 4#define MAP_32BIT 0x40 /* only give out 32bit addresses */
5 5
6#define MAP_HUGE_2MB (21 << MAP_HUGE_SHIFT)
7#define MAP_HUGE_1GB (30 << MAP_HUGE_SHIFT)
8
6#include <asm-generic/mman.h> 9#include <asm-generic/mman.h>
7 10
8#endif /* _ASM_X86_MMAN_H */ 11#endif /* _ASM_X86_MMAN_H */
diff --git a/arch/x86/include/asm/module.h b/arch/x86/include/asm/module.h
index 9eae7752ae9b..e3b7819caeef 100644
--- a/arch/x86/include/asm/module.h
+++ b/arch/x86/include/asm/module.h
@@ -5,8 +5,6 @@
5 5
6#ifdef CONFIG_X86_64 6#ifdef CONFIG_X86_64
7/* X86_64 does not define MODULE_PROC_FAMILY */ 7/* X86_64 does not define MODULE_PROC_FAMILY */
8#elif defined CONFIG_M386
9#define MODULE_PROC_FAMILY "386 "
10#elif defined CONFIG_M486 8#elif defined CONFIG_M486
11#define MODULE_PROC_FAMILY "486 " 9#define MODULE_PROC_FAMILY "486 "
12#elif defined CONFIG_M586 10#elif defined CONFIG_M586
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 7f0edceb7563..e400cdb2dd65 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -337,6 +337,8 @@
337#define MSR_IA32_MISC_ENABLE_TURBO_DISABLE (1ULL << 38) 337#define MSR_IA32_MISC_ENABLE_TURBO_DISABLE (1ULL << 38)
338#define MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE (1ULL << 39) 338#define MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE (1ULL << 39)
339 339
340#define MSR_IA32_TSC_DEADLINE 0x000006E0
341
340/* P4/Xeon+ specific */ 342/* P4/Xeon+ specific */
341#define MSR_IA32_MCG_EAX 0x00000180 343#define MSR_IA32_MCG_EAX 0x00000180
342#define MSR_IA32_MCG_EBX 0x00000181 344#define MSR_IA32_MCG_EBX 0x00000181
diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h
index 1104afaba52b..0da5200ee79d 100644
--- a/arch/x86/include/asm/percpu.h
+++ b/arch/x86/include/asm/percpu.h
@@ -406,7 +406,6 @@ do { \
406#define this_cpu_xchg_2(pcp, nval) percpu_xchg_op(pcp, nval) 406#define this_cpu_xchg_2(pcp, nval) percpu_xchg_op(pcp, nval)
407#define this_cpu_xchg_4(pcp, nval) percpu_xchg_op(pcp, nval) 407#define this_cpu_xchg_4(pcp, nval) percpu_xchg_op(pcp, nval)
408 408
409#ifndef CONFIG_M386
410#define __this_cpu_add_return_1(pcp, val) percpu_add_return_op(pcp, val) 409#define __this_cpu_add_return_1(pcp, val) percpu_add_return_op(pcp, val)
411#define __this_cpu_add_return_2(pcp, val) percpu_add_return_op(pcp, val) 410#define __this_cpu_add_return_2(pcp, val) percpu_add_return_op(pcp, val)
412#define __this_cpu_add_return_4(pcp, val) percpu_add_return_op(pcp, val) 411#define __this_cpu_add_return_4(pcp, val) percpu_add_return_op(pcp, val)
@@ -421,8 +420,6 @@ do { \
421#define this_cpu_cmpxchg_2(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval) 420#define this_cpu_cmpxchg_2(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval)
422#define this_cpu_cmpxchg_4(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval) 421#define this_cpu_cmpxchg_4(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval)
423 422
424#endif /* !CONFIG_M386 */
425
426#ifdef CONFIG_X86_CMPXCHG64 423#ifdef CONFIG_X86_CMPXCHG64
427#define percpu_cmpxchg8b_double(pcp1, pcp2, o1, o2, n1, n2) \ 424#define percpu_cmpxchg8b_double(pcp1, pcp2, o1, o2, n1, n2) \
428({ \ 425({ \
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index ad1fc8511674..e101b38912de 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -187,7 +187,7 @@ extern void print_cpu_info(struct cpuinfo_x86 *);
187void print_cpu_msr(struct cpuinfo_x86 *); 187void print_cpu_msr(struct cpuinfo_x86 *);
188extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c); 188extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c);
189extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c); 189extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
190extern unsigned short num_cache_leaves; 190extern void init_amd_cacheinfo(struct cpuinfo_x86 *c);
191 191
192extern void detect_extended_topology(struct cpuinfo_x86 *c); 192extern void detect_extended_topology(struct cpuinfo_x86 *c);
193extern void detect_ht(struct cpuinfo_x86 *c); 193extern void detect_ht(struct cpuinfo_x86 *c);
@@ -672,18 +672,29 @@ static inline void sync_core(void)
672{ 672{
673 int tmp; 673 int tmp;
674 674
675#if defined(CONFIG_M386) || defined(CONFIG_M486) 675#ifdef CONFIG_M486
676 if (boot_cpu_data.x86 < 5) 676 /*
677 /* There is no speculative execution. 677 * Do a CPUID if available, otherwise do a jump. The jump
678 * jmp is a barrier to prefetching. */ 678 * can conveniently enough be the jump around CPUID.
679 asm volatile("jmp 1f\n1:\n" ::: "memory"); 679 */
680 else 680 asm volatile("cmpl %2,%1\n\t"
681 "jl 1f\n\t"
682 "cpuid\n"
683 "1:"
684 : "=a" (tmp)
685 : "rm" (boot_cpu_data.cpuid_level), "ri" (0), "0" (1)
686 : "ebx", "ecx", "edx", "memory");
687#else
688 /*
689 * CPUID is a barrier to speculative execution.
690 * Prefetched instructions are automatically
691 * invalidated when modified.
692 */
693 asm volatile("cpuid"
694 : "=a" (tmp)
695 : "0" (1)
696 : "ebx", "ecx", "edx", "memory");
681#endif 697#endif
682 /* cpuid is a barrier to speculative execution.
683 * Prefetched instructions are automatically
684 * invalidated when modified. */
685 asm volatile("cpuid" : "=a" (tmp) : "0" (1)
686 : "ebx", "ecx", "edx", "memory");
687} 698}
688 699
689static inline void __monitor(const void *eax, unsigned long ecx, 700static inline void __monitor(const void *eax, unsigned long ecx,
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
index dcfde52979c3..54d80fddb739 100644
--- a/arch/x86/include/asm/ptrace.h
+++ b/arch/x86/include/asm/ptrace.h
@@ -205,21 +205,14 @@ static inline bool user_64bit_mode(struct pt_regs *regs)
205} 205}
206#endif 206#endif
207 207
208/*
209 * X86_32 CPUs don't save ss and esp if the CPU is already in kernel mode
210 * when it traps. The previous stack will be directly underneath the saved
211 * registers, and 'sp/ss' won't even have been saved. Thus the '&regs->sp'.
212 *
213 * This is valid only for kernel mode traps.
214 */
215static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
216{
217#ifdef CONFIG_X86_32 208#ifdef CONFIG_X86_32
218 return (unsigned long)(&regs->sp); 209extern unsigned long kernel_stack_pointer(struct pt_regs *regs);
219#else 210#else
211static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
212{
220 return regs->sp; 213 return regs->sp;
221#endif
222} 214}
215#endif
223 216
224#define GET_IP(regs) ((regs)->ip) 217#define GET_IP(regs) ((regs)->ip)
225#define GET_FP(regs) ((regs)->bp) 218#define GET_FP(regs) ((regs)->bp)
@@ -246,6 +239,15 @@ static inline unsigned long regs_get_register(struct pt_regs *regs,
246{ 239{
247 if (unlikely(offset > MAX_REG_OFFSET)) 240 if (unlikely(offset > MAX_REG_OFFSET))
248 return 0; 241 return 0;
242#ifdef CONFIG_X86_32
243 /*
244 * Traps from the kernel do not save sp and ss.
245 * Use the helper function to retrieve sp.
246 */
247 if (offset == offsetof(struct pt_regs, sp) &&
248 regs->cs == __KERNEL_CS)
249 return kernel_stack_pointer(regs);
250#endif
249 return *(unsigned long *)((unsigned long)regs + offset); 251 return *(unsigned long *)((unsigned long)regs + offset);
250} 252}
251 253
diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h
index 4f19a1526037..b073aaea747c 100644
--- a/arch/x86/include/asm/smp.h
+++ b/arch/x86/include/asm/smp.h
@@ -166,6 +166,7 @@ void native_send_call_func_ipi(const struct cpumask *mask);
166void native_send_call_func_single_ipi(int cpu); 166void native_send_call_func_single_ipi(int cpu);
167void x86_idle_thread_init(unsigned int cpu, struct task_struct *idle); 167void x86_idle_thread_init(unsigned int cpu, struct task_struct *idle);
168 168
169void smp_store_boot_cpu_info(void);
169void smp_store_cpu_info(int id); 170void smp_store_cpu_info(int id);
170#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu) 171#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
171 172
diff --git a/arch/x86/include/asm/swab.h b/arch/x86/include/asm/swab.h
index 557cd9f00661..7f235c7105c1 100644
--- a/arch/x86/include/asm/swab.h
+++ b/arch/x86/include/asm/swab.h
@@ -6,22 +6,7 @@
6 6
7static inline __attribute_const__ __u32 __arch_swab32(__u32 val) 7static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
8{ 8{
9#ifdef __i386__ 9 asm("bswapl %0" : "=r" (val) : "0" (val));
10# ifdef CONFIG_X86_BSWAP
11 asm("bswap %0" : "=r" (val) : "0" (val));
12# else
13 asm("xchgb %b0,%h0\n\t" /* swap lower bytes */
14 "rorl $16,%0\n\t" /* swap words */
15 "xchgb %b0,%h0" /* swap higher bytes */
16 : "=q" (val)
17 : "0" (val));
18# endif
19
20#else /* __i386__ */
21 asm("bswapl %0"
22 : "=r" (val)
23 : "0" (val));
24#endif
25 return val; 10 return val;
26} 11}
27#define __arch_swab32 __arch_swab32 12#define __arch_swab32 __arch_swab32
@@ -37,22 +22,12 @@ static inline __attribute_const__ __u64 __arch_swab64(__u64 val)
37 __u64 u; 22 __u64 u;
38 } v; 23 } v;
39 v.u = val; 24 v.u = val;
40# ifdef CONFIG_X86_BSWAP
41 asm("bswapl %0 ; bswapl %1 ; xchgl %0,%1" 25 asm("bswapl %0 ; bswapl %1 ; xchgl %0,%1"
42 : "=r" (v.s.a), "=r" (v.s.b) 26 : "=r" (v.s.a), "=r" (v.s.b)
43 : "0" (v.s.a), "1" (v.s.b)); 27 : "0" (v.s.a), "1" (v.s.b));
44# else
45 v.s.a = __arch_swab32(v.s.a);
46 v.s.b = __arch_swab32(v.s.b);
47 asm("xchgl %0,%1"
48 : "=r" (v.s.a), "=r" (v.s.b)
49 : "0" (v.s.a), "1" (v.s.b));
50# endif
51 return v.u; 28 return v.u;
52#else /* __i386__ */ 29#else /* __i386__ */
53 asm("bswapq %0" 30 asm("bswapq %0" : "=r" (val) : "0" (val));
54 : "=r" (val)
55 : "0" (val));
56 return val; 31 return val;
57#endif 32#endif
58} 33}
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index 74a44333545a..0fee48e279cc 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -56,10 +56,7 @@ static inline void __flush_tlb_all(void)
56 56
57static inline void __flush_tlb_one(unsigned long addr) 57static inline void __flush_tlb_one(unsigned long addr)
58{ 58{
59 if (cpu_has_invlpg)
60 __flush_tlb_single(addr); 59 __flush_tlb_single(addr);
61 else
62 __flush_tlb();
63} 60}
64 61
65#define TLB_FLUSH_ALL -1UL 62#define TLB_FLUSH_ALL -1UL
diff --git a/arch/x86/include/asm/trace_clock.h b/arch/x86/include/asm/trace_clock.h
new file mode 100644
index 000000000000..beab86cc282d
--- /dev/null
+++ b/arch/x86/include/asm/trace_clock.h
@@ -0,0 +1,20 @@
1#ifndef _ASM_X86_TRACE_CLOCK_H
2#define _ASM_X86_TRACE_CLOCK_H
3
4#include <linux/compiler.h>
5#include <linux/types.h>
6
7#ifdef CONFIG_X86_TSC
8
9extern u64 notrace trace_clock_x86_tsc(void);
10
11# define ARCH_TRACE_CLOCKS \
12 { trace_clock_x86_tsc, "x86-tsc", .in_ns = 0 },
13
14#else /* !CONFIG_X86_TSC */
15
16#define ARCH_TRACE_CLOCKS
17
18#endif
19
20#endif /* _ASM_X86_TRACE_CLOCK_H */
diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h
index 7ccf8d131535..1709801d18ec 100644
--- a/arch/x86/include/asm/uaccess.h
+++ b/arch/x86/include/asm/uaccess.h
@@ -237,8 +237,6 @@ extern void __put_user_2(void);
237extern void __put_user_4(void); 237extern void __put_user_4(void);
238extern void __put_user_8(void); 238extern void __put_user_8(void);
239 239
240#ifdef CONFIG_X86_WP_WORKS_OK
241
242/** 240/**
243 * put_user: - Write a simple value into user space. 241 * put_user: - Write a simple value into user space.
244 * @x: Value to copy to user space. 242 * @x: Value to copy to user space.
@@ -326,29 +324,6 @@ do { \
326 } \ 324 } \
327} while (0) 325} while (0)
328 326
329#else
330
331#define __put_user_size(x, ptr, size, retval, errret) \
332do { \
333 __typeof__(*(ptr))__pus_tmp = x; \
334 retval = 0; \
335 \
336 if (unlikely(__copy_to_user_ll(ptr, &__pus_tmp, size) != 0)) \
337 retval = errret; \
338} while (0)
339
340#define put_user(x, ptr) \
341({ \
342 int __ret_pu; \
343 __typeof__(*(ptr))__pus_tmp = x; \
344 __ret_pu = 0; \
345 if (unlikely(__copy_to_user_ll(ptr, &__pus_tmp, \
346 sizeof(*(ptr))) != 0)) \
347 __ret_pu = -EFAULT; \
348 __ret_pu; \
349})
350#endif
351
352#ifdef CONFIG_X86_32 327#ifdef CONFIG_X86_32
353#define __get_user_asm_u64(x, ptr, retval, errret) (x) = __get_user_bad() 328#define __get_user_asm_u64(x, ptr, retval, errret) (x) = __get_user_bad()
354#define __get_user_asm_ex_u64(x, ptr) (x) = __get_user_bad() 329#define __get_user_asm_ex_u64(x, ptr) (x) = __get_user_bad()
@@ -543,29 +518,12 @@ struct __large_struct { unsigned long buf[100]; };
543 (x) = (__force __typeof__(*(ptr)))__gue_val; \ 518 (x) = (__force __typeof__(*(ptr)))__gue_val; \
544} while (0) 519} while (0)
545 520
546#ifdef CONFIG_X86_WP_WORKS_OK
547
548#define put_user_try uaccess_try 521#define put_user_try uaccess_try
549#define put_user_catch(err) uaccess_catch(err) 522#define put_user_catch(err) uaccess_catch(err)
550 523
551#define put_user_ex(x, ptr) \ 524#define put_user_ex(x, ptr) \
552 __put_user_size_ex((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) 525 __put_user_size_ex((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr)))
553 526
554#else /* !CONFIG_X86_WP_WORKS_OK */
555
556#define put_user_try do { \
557 int __uaccess_err = 0;
558
559#define put_user_catch(err) \
560 (err) |= __uaccess_err; \
561} while (0)
562
563#define put_user_ex(x, ptr) do { \
564 __uaccess_err |= __put_user(x, ptr); \
565} while (0)
566
567#endif /* CONFIG_X86_WP_WORKS_OK */
568
569extern unsigned long 527extern unsigned long
570copy_from_user_nmi(void *to, const void __user *from, unsigned long n); 528copy_from_user_nmi(void *to, const void __user *from, unsigned long n);
571extern __must_check long 529extern __must_check long
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 91ce48f05f9f..34e923a53762 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -9,7 +9,6 @@ CPPFLAGS_vmlinux.lds += -U$(UTS_MACHINE)
9ifdef CONFIG_FUNCTION_TRACER 9ifdef CONFIG_FUNCTION_TRACER
10# Do not profile debug and lowlevel utilities 10# Do not profile debug and lowlevel utilities
11CFLAGS_REMOVE_tsc.o = -pg 11CFLAGS_REMOVE_tsc.o = -pg
12CFLAGS_REMOVE_rtc.o = -pg
13CFLAGS_REMOVE_paravirt-spinlocks.o = -pg 12CFLAGS_REMOVE_paravirt-spinlocks.o = -pg
14CFLAGS_REMOVE_pvclock.o = -pg 13CFLAGS_REMOVE_pvclock.o = -pg
15CFLAGS_REMOVE_kvmclock.o = -pg 14CFLAGS_REMOVE_kvmclock.o = -pg
@@ -62,6 +61,7 @@ obj-$(CONFIG_X86_REBOOTFIXUPS) += reboot_fixups_32.o
62obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o 61obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
63obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o 62obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
64obj-$(CONFIG_FTRACE_SYSCALLS) += ftrace.o 63obj-$(CONFIG_FTRACE_SYSCALLS) += ftrace.o
64obj-$(CONFIG_X86_TSC) += trace_clock.o
65obj-$(CONFIG_KEXEC) += machine_kexec_$(BITS).o 65obj-$(CONFIG_KEXEC) += machine_kexec_$(BITS).o
66obj-$(CONFIG_KEXEC) += relocate_kernel_$(BITS).o crash.o 66obj-$(CONFIG_KEXEC) += relocate_kernel_$(BITS).o crash.o
67obj-$(CONFIG_CRASH_DUMP) += crash_dump_$(BITS).o 67obj-$(CONFIG_CRASH_DUMP) += crash_dump_$(BITS).o
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index e651f7a589ac..e48cafcf92ae 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -574,6 +574,12 @@ int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
574 574
575 return irq; 575 return irq;
576} 576}
577EXPORT_SYMBOL_GPL(acpi_register_gsi);
578
579void acpi_unregister_gsi(u32 gsi)
580{
581}
582EXPORT_SYMBOL_GPL(acpi_unregister_gsi);
577 583
578void __init acpi_set_irq_model_pic(void) 584void __init acpi_set_irq_model_pic(void)
579{ 585{
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 11676cf65aee..d5e0d717005a 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -101,6 +101,8 @@ static int __init acpi_sleep_setup(char *str)
101#endif 101#endif
102 if (strncmp(str, "nonvs", 5) == 0) 102 if (strncmp(str, "nonvs", 5) == 0)
103 acpi_nvs_nosave(); 103 acpi_nvs_nosave();
104 if (strncmp(str, "nonvs_s3", 8) == 0)
105 acpi_nvs_nosave_s3();
104 if (strncmp(str, "old_ordering", 12) == 0) 106 if (strncmp(str, "old_ordering", 12) == 0)
105 acpi_old_suspend_ordering(); 107 acpi_old_suspend_ordering();
106 str = strchr(str, ','); 108 str = strchr(str, ',');
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index b17416e72fbd..b994cc84aa7e 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -90,21 +90,6 @@ EXPORT_EARLY_PER_CPU_SYMBOL(x86_bios_cpu_apicid);
90 */ 90 */
91DEFINE_EARLY_PER_CPU_READ_MOSTLY(int, x86_cpu_to_logical_apicid, BAD_APICID); 91DEFINE_EARLY_PER_CPU_READ_MOSTLY(int, x86_cpu_to_logical_apicid, BAD_APICID);
92 92
93/*
94 * Knob to control our willingness to enable the local APIC.
95 *
96 * +1=force-enable
97 */
98static int force_enable_local_apic __initdata;
99/*
100 * APIC command line parameters
101 */
102static int __init parse_lapic(char *arg)
103{
104 force_enable_local_apic = 1;
105 return 0;
106}
107early_param("lapic", parse_lapic);
108/* Local APIC was disabled by the BIOS and enabled by the kernel */ 93/* Local APIC was disabled by the BIOS and enabled by the kernel */
109static int enabled_via_apicbase; 94static int enabled_via_apicbase;
110 95
@@ -133,6 +118,25 @@ static inline void imcr_apic_to_pic(void)
133} 118}
134#endif 119#endif
135 120
121/*
122 * Knob to control our willingness to enable the local APIC.
123 *
124 * +1=force-enable
125 */
126static int force_enable_local_apic __initdata;
127/*
128 * APIC command line parameters
129 */
130static int __init parse_lapic(char *arg)
131{
132 if (config_enabled(CONFIG_X86_32) && !arg)
133 force_enable_local_apic = 1;
134 else if (!strncmp(arg, "notscdeadline", 13))
135 setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER);
136 return 0;
137}
138early_param("lapic", parse_lapic);
139
136#ifdef CONFIG_X86_64 140#ifdef CONFIG_X86_64
137static int apic_calibrate_pmtmr __initdata; 141static int apic_calibrate_pmtmr __initdata;
138static __init int setup_apicpmtimer(char *s) 142static __init int setup_apicpmtimer(char *s)
@@ -315,6 +319,7 @@ int lapic_get_maxlvt(void)
315 319
316/* Clock divisor */ 320/* Clock divisor */
317#define APIC_DIVISOR 16 321#define APIC_DIVISOR 16
322#define TSC_DIVISOR 32
318 323
319/* 324/*
320 * This function sets up the local APIC timer, with a timeout of 325 * This function sets up the local APIC timer, with a timeout of
@@ -333,6 +338,9 @@ static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen)
333 lvtt_value = LOCAL_TIMER_VECTOR; 338 lvtt_value = LOCAL_TIMER_VECTOR;
334 if (!oneshot) 339 if (!oneshot)
335 lvtt_value |= APIC_LVT_TIMER_PERIODIC; 340 lvtt_value |= APIC_LVT_TIMER_PERIODIC;
341 else if (boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER))
342 lvtt_value |= APIC_LVT_TIMER_TSCDEADLINE;
343
336 if (!lapic_is_integrated()) 344 if (!lapic_is_integrated())
337 lvtt_value |= SET_APIC_TIMER_BASE(APIC_TIMER_BASE_DIV); 345 lvtt_value |= SET_APIC_TIMER_BASE(APIC_TIMER_BASE_DIV);
338 346
@@ -341,6 +349,11 @@ static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen)
341 349
342 apic_write(APIC_LVTT, lvtt_value); 350 apic_write(APIC_LVTT, lvtt_value);
343 351
352 if (lvtt_value & APIC_LVT_TIMER_TSCDEADLINE) {
353 printk_once(KERN_DEBUG "TSC deadline timer enabled\n");
354 return;
355 }
356
344 /* 357 /*
345 * Divide PICLK by 16 358 * Divide PICLK by 16
346 */ 359 */
@@ -453,6 +466,16 @@ static int lapic_next_event(unsigned long delta,
453 return 0; 466 return 0;
454} 467}
455 468
469static int lapic_next_deadline(unsigned long delta,
470 struct clock_event_device *evt)
471{
472 u64 tsc;
473
474 rdtscll(tsc);
475 wrmsrl(MSR_IA32_TSC_DEADLINE, tsc + (((u64) delta) * TSC_DIVISOR));
476 return 0;
477}
478
456/* 479/*
457 * Setup the lapic timer in periodic or oneshot mode 480 * Setup the lapic timer in periodic or oneshot mode
458 */ 481 */
@@ -533,7 +556,15 @@ static void __cpuinit setup_APIC_timer(void)
533 memcpy(levt, &lapic_clockevent, sizeof(*levt)); 556 memcpy(levt, &lapic_clockevent, sizeof(*levt));
534 levt->cpumask = cpumask_of(smp_processor_id()); 557 levt->cpumask = cpumask_of(smp_processor_id());
535 558
536 clockevents_register_device(levt); 559 if (this_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER)) {
560 levt->features &= ~(CLOCK_EVT_FEAT_PERIODIC |
561 CLOCK_EVT_FEAT_DUMMY);
562 levt->set_next_event = lapic_next_deadline;
563 clockevents_config_and_register(levt,
564 (tsc_khz / TSC_DIVISOR) * 1000,
565 0xF, ~0UL);
566 } else
567 clockevents_register_device(levt);
537} 568}
538 569
539/* 570/*
@@ -661,7 +692,9 @@ static int __init calibrate_APIC_clock(void)
661 * in the clockevent structure and return. 692 * in the clockevent structure and return.
662 */ 693 */
663 694
664 if (lapic_timer_frequency) { 695 if (boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER)) {
696 return 0;
697 } else if (lapic_timer_frequency) {
665 apic_printk(APIC_VERBOSE, "lapic timer already calibrated %d\n", 698 apic_printk(APIC_VERBOSE, "lapic timer already calibrated %d\n",
666 lapic_timer_frequency); 699 lapic_timer_frequency);
667 lapic_clockevent.mult = div_sc(lapic_timer_frequency/APIC_DIVISOR, 700 lapic_clockevent.mult = div_sc(lapic_timer_frequency/APIC_DIVISOR,
@@ -674,6 +707,9 @@ static int __init calibrate_APIC_clock(void)
674 return 0; 707 return 0;
675 } 708 }
676 709
710 apic_printk(APIC_VERBOSE, "Using local APIC timer interrupts.\n"
711 "calibrating APIC timer ...\n");
712
677 local_irq_disable(); 713 local_irq_disable();
678 714
679 /* Replace the global interrupt handler */ 715 /* Replace the global interrupt handler */
@@ -811,9 +847,6 @@ void __init setup_boot_APIC_clock(void)
811 return; 847 return;
812 } 848 }
813 849
814 apic_printk(APIC_VERBOSE, "Using local APIC timer interrupts.\n"
815 "calibrating APIC timer ...\n");
816
817 if (calibrate_APIC_clock()) { 850 if (calibrate_APIC_clock()) {
818 /* No broadcast on UP ! */ 851 /* No broadcast on UP ! */
819 if (num_possible_cpus() > 1) 852 if (num_possible_cpus() > 1)
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 1817fa911024..b739d398bb29 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -234,11 +234,11 @@ int __init arch_early_irq_init(void)
234 zalloc_cpumask_var_node(&cfg[i].old_domain, GFP_KERNEL, node); 234 zalloc_cpumask_var_node(&cfg[i].old_domain, GFP_KERNEL, node);
235 /* 235 /*
236 * For legacy IRQ's, start with assigning irq0 to irq15 to 236 * For legacy IRQ's, start with assigning irq0 to irq15 to
237 * IRQ0_VECTOR to IRQ15_VECTOR on cpu 0. 237 * IRQ0_VECTOR to IRQ15_VECTOR for all cpu's.
238 */ 238 */
239 if (i < legacy_pic->nr_legacy_irqs) { 239 if (i < legacy_pic->nr_legacy_irqs) {
240 cfg[i].vector = IRQ0_VECTOR + i; 240 cfg[i].vector = IRQ0_VECTOR + i;
241 cpumask_set_cpu(0, cfg[i].domain); 241 cpumask_setall(cfg[i].domain);
242 } 242 }
243 } 243 }
244 244
@@ -1141,7 +1141,8 @@ __assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask)
1141 * allocation for the members that are not used anymore. 1141 * allocation for the members that are not used anymore.
1142 */ 1142 */
1143 cpumask_andnot(cfg->old_domain, cfg->domain, tmp_mask); 1143 cpumask_andnot(cfg->old_domain, cfg->domain, tmp_mask);
1144 cfg->move_in_progress = 1; 1144 cfg->move_in_progress =
1145 cpumask_intersects(cfg->old_domain, cpu_online_mask);
1145 cpumask_and(cfg->domain, cfg->domain, tmp_mask); 1146 cpumask_and(cfg->domain, cfg->domain, tmp_mask);
1146 break; 1147 break;
1147 } 1148 }
@@ -1172,8 +1173,9 @@ next:
1172 current_vector = vector; 1173 current_vector = vector;
1173 current_offset = offset; 1174 current_offset = offset;
1174 if (cfg->vector) { 1175 if (cfg->vector) {
1175 cfg->move_in_progress = 1;
1176 cpumask_copy(cfg->old_domain, cfg->domain); 1176 cpumask_copy(cfg->old_domain, cfg->domain);
1177 cfg->move_in_progress =
1178 cpumask_intersects(cfg->old_domain, cpu_online_mask);
1177 } 1179 }
1178 for_each_cpu_and(new_cpu, tmp_mask, cpu_online_mask) 1180 for_each_cpu_and(new_cpu, tmp_mask, cpu_online_mask)
1179 per_cpu(vector_irq, new_cpu)[vector] = irq; 1181 per_cpu(vector_irq, new_cpu)[vector] = irq;
@@ -1241,12 +1243,6 @@ void __setup_vector_irq(int cpu)
1241 cfg = irq_get_chip_data(irq); 1243 cfg = irq_get_chip_data(irq);
1242 if (!cfg) 1244 if (!cfg)
1243 continue; 1245 continue;
1244 /*
1245 * If it is a legacy IRQ handled by the legacy PIC, this cpu
1246 * will be part of the irq_cfg's domain.
1247 */
1248 if (irq < legacy_pic->nr_legacy_irqs && !IO_APIC_IRQ(irq))
1249 cpumask_set_cpu(cpu, cfg->domain);
1250 1246
1251 if (!cpumask_test_cpu(cpu, cfg->domain)) 1247 if (!cpumask_test_cpu(cpu, cfg->domain))
1252 continue; 1248 continue;
@@ -1356,16 +1352,6 @@ static void setup_ioapic_irq(unsigned int irq, struct irq_cfg *cfg,
1356 if (!IO_APIC_IRQ(irq)) 1352 if (!IO_APIC_IRQ(irq))
1357 return; 1353 return;
1358 1354
1359 /*
1360 * For legacy irqs, cfg->domain starts with cpu 0. Now that IO-APIC
1361 * can handle this irq and the apic driver is finialized at this point,
1362 * update the cfg->domain.
1363 */
1364 if (irq < legacy_pic->nr_legacy_irqs &&
1365 cpumask_equal(cfg->domain, cpumask_of(0)))
1366 apic->vector_allocation_domain(0, cfg->domain,
1367 apic->target_cpus());
1368
1369 if (assign_irq_vector(irq, cfg, apic->target_cpus())) 1355 if (assign_irq_vector(irq, cfg, apic->target_cpus()))
1370 return; 1356 return;
1371 1357
@@ -2199,9 +2185,11 @@ static int ioapic_retrigger_irq(struct irq_data *data)
2199{ 2185{
2200 struct irq_cfg *cfg = data->chip_data; 2186 struct irq_cfg *cfg = data->chip_data;
2201 unsigned long flags; 2187 unsigned long flags;
2188 int cpu;
2202 2189
2203 raw_spin_lock_irqsave(&vector_lock, flags); 2190 raw_spin_lock_irqsave(&vector_lock, flags);
2204 apic->send_IPI_mask(cpumask_of(cpumask_first(cfg->domain)), cfg->vector); 2191 cpu = cpumask_first_and(cfg->domain, cpu_online_mask);
2192 apic->send_IPI_mask(cpumask_of(cpu), cfg->vector);
2205 raw_spin_unlock_irqrestore(&vector_lock, flags); 2193 raw_spin_unlock_irqrestore(&vector_lock, flags);
2206 2194
2207 return 1; 2195 return 1;
@@ -3317,8 +3305,9 @@ int arch_setup_hpet_msi(unsigned int irq, unsigned int id)
3317 int ret; 3305 int ret;
3318 3306
3319 if (irq_remapping_enabled) { 3307 if (irq_remapping_enabled) {
3320 if (!setup_hpet_msi_remapped(irq, id)) 3308 ret = setup_hpet_msi_remapped(irq, id);
3321 return -1; 3309 if (ret)
3310 return ret;
3322 } 3311 }
3323 3312
3324 ret = msi_compose_msg(NULL, irq, &msg, id); 3313 ret = msi_compose_msg(NULL, irq, &msg, id);
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index f7e98a2c0d12..15239fffd6fe 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -304,7 +304,7 @@ static void __cpuinit amd_get_topology(struct cpuinfo_x86 *c)
304 int cpu = smp_processor_id(); 304 int cpu = smp_processor_id();
305 305
306 /* get information required for multi-node processors */ 306 /* get information required for multi-node processors */
307 if (cpu_has(c, X86_FEATURE_TOPOEXT)) { 307 if (cpu_has_topoext) {
308 u32 eax, ebx, ecx, edx; 308 u32 eax, ebx, ecx, edx;
309 309
310 cpuid(0x8000001e, &eax, &ebx, &ecx, &edx); 310 cpuid(0x8000001e, &eax, &ebx, &ecx, &edx);
@@ -631,6 +631,20 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
631 } 631 }
632 } 632 }
633 633
634 /*
635 * The way access filter has a performance penalty on some workloads.
636 * Disable it on the affected CPUs.
637 */
638 if ((c->x86 == 0x15) &&
639 (c->x86_model >= 0x02) && (c->x86_model < 0x20)) {
640 u64 val;
641
642 if (!rdmsrl_safe(0xc0011021, &val) && !(val & 0x1E)) {
643 val |= 0x1E;
644 wrmsrl_safe(0xc0011021, val);
645 }
646 }
647
634 cpu_detect_cache_sizes(c); 648 cpu_detect_cache_sizes(c);
635 649
636 /* Multi core CPU? */ 650 /* Multi core CPU? */
@@ -643,12 +657,7 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
643 detect_ht(c); 657 detect_ht(c);
644#endif 658#endif
645 659
646 if (c->extended_cpuid_level >= 0x80000006) { 660 init_amd_cacheinfo(c);
647 if (cpuid_edx(0x80000006) & 0xf000)
648 num_cache_leaves = 4;
649 else
650 num_cache_leaves = 3;
651 }
652 661
653 if (c->x86 >= 0xf) 662 if (c->x86 >= 0xf)
654 set_cpu_cap(c, X86_FEATURE_K8); 663 set_cpu_cap(c, X86_FEATURE_K8);
@@ -739,9 +748,6 @@ static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 *c,
739 748
740static void __cpuinit cpu_set_tlb_flushall_shift(struct cpuinfo_x86 *c) 749static void __cpuinit cpu_set_tlb_flushall_shift(struct cpuinfo_x86 *c)
741{ 750{
742 if (!cpu_has_invlpg)
743 return;
744
745 tlb_flushall_shift = 5; 751 tlb_flushall_shift = 5;
746 752
747 if (c->x86 <= 0x11) 753 if (c->x86 <= 0x11)
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index d0e910da16c5..92dfec986a48 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -107,53 +107,17 @@ static void __init check_hlt(void)
107} 107}
108 108
109/* 109/*
110 * Most 386 processors have a bug where a POPAD can lock the
111 * machine even from user space.
112 */
113
114static void __init check_popad(void)
115{
116#ifndef CONFIG_X86_POPAD_OK
117 int res, inp = (int) &res;
118
119 pr_info("Checking for popad bug... ");
120 __asm__ __volatile__(
121 "movl $12345678,%%eax; movl $0,%%edi; pusha; popa; movl (%%edx,%%edi),%%ecx "
122 : "=&a" (res)
123 : "d" (inp)
124 : "ecx", "edi");
125 /*
126 * If this fails, it means that any user program may lock the
127 * CPU hard. Too bad.
128 */
129 if (res != 12345678)
130 pr_cont("Buggy\n");
131 else
132 pr_cont("OK\n");
133#endif
134}
135
136/*
137 * Check whether we are able to run this kernel safely on SMP. 110 * Check whether we are able to run this kernel safely on SMP.
138 * 111 *
139 * - In order to run on a i386, we need to be compiled for i386 112 * - i386 is no longer supported.
140 * (for due to lack of "invlpg" and working WP on a i386)
141 * - In order to run on anything without a TSC, we need to be 113 * - In order to run on anything without a TSC, we need to be
142 * compiled for a i486. 114 * compiled for a i486.
143 */ 115 */
144 116
145static void __init check_config(void) 117static void __init check_config(void)
146{ 118{
147/* 119 if (boot_cpu_data.x86 < 4)
148 * We'd better not be a i386 if we're configured to use some
149 * i486+ only features! (WP works in supervisor mode and the
150 * new "invlpg" and "bswap" instructions)
151 */
152#if defined(CONFIG_X86_WP_WORKS_OK) || defined(CONFIG_X86_INVLPG) || \
153 defined(CONFIG_X86_BSWAP)
154 if (boot_cpu_data.x86 == 3)
155 panic("Kernel requires i486+ for 'invlpg' and other features"); 120 panic("Kernel requires i486+ for 'invlpg' and other features");
156#endif
157} 121}
158 122
159 123
@@ -166,7 +130,6 @@ void __init check_bugs(void)
166#endif 130#endif
167 check_config(); 131 check_config();
168 check_hlt(); 132 check_hlt();
169 check_popad();
170 init_utsname()->machine[1] = 133 init_utsname()->machine[1] =
171 '0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86); 134 '0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86);
172 alternative_instructions(); 135 alternative_instructions();
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 7505f7b13e71..ca165ac6793b 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1237,7 +1237,7 @@ void __cpuinit cpu_init(void)
1237 oist = &per_cpu(orig_ist, cpu); 1237 oist = &per_cpu(orig_ist, cpu);
1238 1238
1239#ifdef CONFIG_NUMA 1239#ifdef CONFIG_NUMA
1240 if (cpu != 0 && this_cpu_read(numa_node) == 0 && 1240 if (this_cpu_read(numa_node) == 0 &&
1241 early_cpu_to_node(cpu) != NUMA_NO_NODE) 1241 early_cpu_to_node(cpu) != NUMA_NO_NODE)
1242 set_numa_node(early_cpu_to_node(cpu)); 1242 set_numa_node(early_cpu_to_node(cpu));
1243#endif 1243#endif
@@ -1269,8 +1269,7 @@ void __cpuinit cpu_init(void)
1269 barrier(); 1269 barrier();
1270 1270
1271 x86_configure_nx(); 1271 x86_configure_nx();
1272 if (cpu != 0) 1272 enable_x2apic();
1273 enable_x2apic();
1274 1273
1275 /* 1274 /*
1276 * set up and load the per-CPU TSS 1275 * set up and load the per-CPU TSS
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 198e019a531a..fcaabd0432c5 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -612,10 +612,6 @@ static void __cpuinit intel_tlb_lookup(const unsigned char desc)
612 612
613static void __cpuinit intel_tlb_flushall_shift_set(struct cpuinfo_x86 *c) 613static void __cpuinit intel_tlb_flushall_shift_set(struct cpuinfo_x86 *c)
614{ 614{
615 if (!cpu_has_invlpg) {
616 tlb_flushall_shift = -1;
617 return;
618 }
619 switch ((c->x86 << 8) + c->x86_model) { 615 switch ((c->x86 << 8) + c->x86_model) {
620 case 0x60f: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */ 616 case 0x60f: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */
621 case 0x616: /* single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L" */ 617 case 0x616: /* single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L" */
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 93c5451bdd52..fe9edec6698a 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -538,7 +538,11 @@ __cpuinit cpuid4_cache_lookup_regs(int index,
538 unsigned edx; 538 unsigned edx;
539 539
540 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) { 540 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
541 amd_cpuid4(index, &eax, &ebx, &ecx); 541 if (cpu_has_topoext)
542 cpuid_count(0x8000001d, index, &eax.full,
543 &ebx.full, &ecx.full, &edx);
544 else
545 amd_cpuid4(index, &eax, &ebx, &ecx);
542 amd_init_l3_cache(this_leaf, index); 546 amd_init_l3_cache(this_leaf, index);
543 } else { 547 } else {
544 cpuid_count(4, index, &eax.full, &ebx.full, &ecx.full, &edx); 548 cpuid_count(4, index, &eax.full, &ebx.full, &ecx.full, &edx);
@@ -557,21 +561,39 @@ __cpuinit cpuid4_cache_lookup_regs(int index,
557 return 0; 561 return 0;
558} 562}
559 563
560static int __cpuinit find_num_cache_leaves(void) 564static int __cpuinit find_num_cache_leaves(struct cpuinfo_x86 *c)
561{ 565{
562 unsigned int eax, ebx, ecx, edx; 566 unsigned int eax, ebx, ecx, edx, op;
563 union _cpuid4_leaf_eax cache_eax; 567 union _cpuid4_leaf_eax cache_eax;
564 int i = -1; 568 int i = -1;
565 569
570 if (c->x86_vendor == X86_VENDOR_AMD)
571 op = 0x8000001d;
572 else
573 op = 4;
574
566 do { 575 do {
567 ++i; 576 ++i;
568 /* Do cpuid(4) loop to find out num_cache_leaves */ 577 /* Do cpuid(op) loop to find out num_cache_leaves */
569 cpuid_count(4, i, &eax, &ebx, &ecx, &edx); 578 cpuid_count(op, i, &eax, &ebx, &ecx, &edx);
570 cache_eax.full = eax; 579 cache_eax.full = eax;
571 } while (cache_eax.split.type != CACHE_TYPE_NULL); 580 } while (cache_eax.split.type != CACHE_TYPE_NULL);
572 return i; 581 return i;
573} 582}
574 583
584void __cpuinit init_amd_cacheinfo(struct cpuinfo_x86 *c)
585{
586
587 if (cpu_has_topoext) {
588 num_cache_leaves = find_num_cache_leaves(c);
589 } else if (c->extended_cpuid_level >= 0x80000006) {
590 if (cpuid_edx(0x80000006) & 0xf000)
591 num_cache_leaves = 4;
592 else
593 num_cache_leaves = 3;
594 }
595}
596
575unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c) 597unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
576{ 598{
577 /* Cache sizes */ 599 /* Cache sizes */
@@ -588,7 +610,7 @@ unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
588 610
589 if (is_initialized == 0) { 611 if (is_initialized == 0) {
590 /* Init num_cache_leaves from boot CPU */ 612 /* Init num_cache_leaves from boot CPU */
591 num_cache_leaves = find_num_cache_leaves(); 613 num_cache_leaves = find_num_cache_leaves(c);
592 is_initialized++; 614 is_initialized++;
593 } 615 }
594 616
@@ -728,37 +750,50 @@ static DEFINE_PER_CPU(struct _cpuid4_info *, ici_cpuid4_info);
728static int __cpuinit cache_shared_amd_cpu_map_setup(unsigned int cpu, int index) 750static int __cpuinit cache_shared_amd_cpu_map_setup(unsigned int cpu, int index)
729{ 751{
730 struct _cpuid4_info *this_leaf; 752 struct _cpuid4_info *this_leaf;
731 int ret, i, sibling; 753 int i, sibling;
732 struct cpuinfo_x86 *c = &cpu_data(cpu);
733 754
734 ret = 0; 755 if (cpu_has_topoext) {
735 if (index == 3) { 756 unsigned int apicid, nshared, first, last;
736 ret = 1; 757
737 for_each_cpu(i, cpu_llc_shared_mask(cpu)) { 758 if (!per_cpu(ici_cpuid4_info, cpu))
759 return 0;
760
761 this_leaf = CPUID4_INFO_IDX(cpu, index);
762 nshared = this_leaf->base.eax.split.num_threads_sharing + 1;
763 apicid = cpu_data(cpu).apicid;
764 first = apicid - (apicid % nshared);
765 last = first + nshared - 1;
766
767 for_each_online_cpu(i) {
768 apicid = cpu_data(i).apicid;
769 if ((apicid < first) || (apicid > last))
770 continue;
738 if (!per_cpu(ici_cpuid4_info, i)) 771 if (!per_cpu(ici_cpuid4_info, i))
739 continue; 772 continue;
740 this_leaf = CPUID4_INFO_IDX(i, index); 773 this_leaf = CPUID4_INFO_IDX(i, index);
741 for_each_cpu(sibling, cpu_llc_shared_mask(cpu)) { 774
742 if (!cpu_online(sibling)) 775 for_each_online_cpu(sibling) {
776 apicid = cpu_data(sibling).apicid;
777 if ((apicid < first) || (apicid > last))
743 continue; 778 continue;
744 set_bit(sibling, this_leaf->shared_cpu_map); 779 set_bit(sibling, this_leaf->shared_cpu_map);
745 } 780 }
746 } 781 }
747 } else if ((c->x86 == 0x15) && ((index == 1) || (index == 2))) { 782 } else if (index == 3) {
748 ret = 1; 783 for_each_cpu(i, cpu_llc_shared_mask(cpu)) {
749 for_each_cpu(i, cpu_sibling_mask(cpu)) {
750 if (!per_cpu(ici_cpuid4_info, i)) 784 if (!per_cpu(ici_cpuid4_info, i))
751 continue; 785 continue;
752 this_leaf = CPUID4_INFO_IDX(i, index); 786 this_leaf = CPUID4_INFO_IDX(i, index);
753 for_each_cpu(sibling, cpu_sibling_mask(cpu)) { 787 for_each_cpu(sibling, cpu_llc_shared_mask(cpu)) {
754 if (!cpu_online(sibling)) 788 if (!cpu_online(sibling))
755 continue; 789 continue;
756 set_bit(sibling, this_leaf->shared_cpu_map); 790 set_bit(sibling, this_leaf->shared_cpu_map);
757 } 791 }
758 } 792 }
759 } 793 } else
794 return 0;
760 795
761 return ret; 796 return 1;
762} 797}
763 798
764static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index) 799static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 698b6ec12e0f..1ac581f38dfa 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -6,7 +6,7 @@
6 * 6 *
7 * Written by Jacob Shin - AMD, Inc. 7 * Written by Jacob Shin - AMD, Inc.
8 * 8 *
9 * Support: borislav.petkov@amd.com 9 * Maintained by: Borislav Petkov <bp@alien8.de>
10 * 10 *
11 * April 2006 11 * April 2006
12 * - added support for AMD Family 0x10 processors 12 * - added support for AMD Family 0x10 processors
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c
index 5f88abf07e9c..4f9a3cbfc4a3 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel.c
@@ -285,34 +285,39 @@ void cmci_clear(void)
285 raw_spin_unlock_irqrestore(&cmci_discover_lock, flags); 285 raw_spin_unlock_irqrestore(&cmci_discover_lock, flags);
286} 286}
287 287
288static long cmci_rediscover_work_func(void *arg)
289{
290 int banks;
291
292 /* Recheck banks in case CPUs don't all have the same */
293 if (cmci_supported(&banks))
294 cmci_discover(banks);
295
296 return 0;
297}
298
288/* 299/*
289 * After a CPU went down cycle through all the others and rediscover 300 * After a CPU went down cycle through all the others and rediscover
290 * Must run in process context. 301 * Must run in process context.
291 */ 302 */
292void cmci_rediscover(int dying) 303void cmci_rediscover(int dying)
293{ 304{
294 int banks; 305 int cpu, banks;
295 int cpu;
296 cpumask_var_t old;
297 306
298 if (!cmci_supported(&banks)) 307 if (!cmci_supported(&banks))
299 return; 308 return;
300 if (!alloc_cpumask_var(&old, GFP_KERNEL))
301 return;
302 cpumask_copy(old, &current->cpus_allowed);
303 309
304 for_each_online_cpu(cpu) { 310 for_each_online_cpu(cpu) {
305 if (cpu == dying) 311 if (cpu == dying)
306 continue; 312 continue;
307 if (set_cpus_allowed_ptr(current, cpumask_of(cpu))) 313
314 if (cpu == smp_processor_id()) {
315 cmci_rediscover_work_func(NULL);
308 continue; 316 continue;
309 /* Recheck banks in case CPUs don't all have the same */ 317 }
310 if (cmci_supported(&banks))
311 cmci_discover(banks);
312 }
313 318
314 set_cpus_allowed_ptr(current, old); 319 work_on_cpu(cpu, cmci_rediscover_work_func, NULL);
315 free_cpumask_var(old); 320 }
316} 321}
317 322
318/* 323/*
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index 6b96110bb0c3..e4c1a4184531 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -695,11 +695,16 @@ void mtrr_ap_init(void)
695} 695}
696 696
697/** 697/**
698 * Save current fixed-range MTRR state of the BSP 698 * Save current fixed-range MTRR state of the first cpu in cpu_online_mask.
699 */ 699 */
700void mtrr_save_state(void) 700void mtrr_save_state(void)
701{ 701{
702 smp_call_function_single(0, mtrr_save_fixed_ranges, NULL, 1); 702 int first_cpu;
703
704 get_online_cpus();
705 first_cpu = cpumask_first(cpu_online_mask);
706 smp_call_function_single(first_cpu, mtrr_save_fixed_ranges, NULL, 1);
707 put_online_cpus();
703} 708}
704 709
705void set_mtrr_aps_delayed_init(void) 710void set_mtrr_aps_delayed_init(void)
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 4a3374e61a93..4428fd178bce 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1316,6 +1316,121 @@ static struct attribute_group x86_pmu_format_group = {
1316 .attrs = NULL, 1316 .attrs = NULL,
1317}; 1317};
1318 1318
1319struct perf_pmu_events_attr {
1320 struct device_attribute attr;
1321 u64 id;
1322};
1323
1324/*
1325 * Remove all undefined events (x86_pmu.event_map(id) == 0)
1326 * out of events_attr attributes.
1327 */
1328static void __init filter_events(struct attribute **attrs)
1329{
1330 int i, j;
1331
1332 for (i = 0; attrs[i]; i++) {
1333 if (x86_pmu.event_map(i))
1334 continue;
1335
1336 for (j = i; attrs[j]; j++)
1337 attrs[j] = attrs[j + 1];
1338
1339 /* Check the shifted attr. */
1340 i--;
1341 }
1342}
1343
1344static ssize_t events_sysfs_show(struct device *dev, struct device_attribute *attr,
1345 char *page)
1346{
1347 struct perf_pmu_events_attr *pmu_attr = \
1348 container_of(attr, struct perf_pmu_events_attr, attr);
1349
1350 u64 config = x86_pmu.event_map(pmu_attr->id);
1351 return x86_pmu.events_sysfs_show(page, config);
1352}
1353
1354#define EVENT_VAR(_id) event_attr_##_id
1355#define EVENT_PTR(_id) &event_attr_##_id.attr.attr
1356
1357#define EVENT_ATTR(_name, _id) \
1358static struct perf_pmu_events_attr EVENT_VAR(_id) = { \
1359 .attr = __ATTR(_name, 0444, events_sysfs_show, NULL), \
1360 .id = PERF_COUNT_HW_##_id, \
1361};
1362
1363EVENT_ATTR(cpu-cycles, CPU_CYCLES );
1364EVENT_ATTR(instructions, INSTRUCTIONS );
1365EVENT_ATTR(cache-references, CACHE_REFERENCES );
1366EVENT_ATTR(cache-misses, CACHE_MISSES );
1367EVENT_ATTR(branch-instructions, BRANCH_INSTRUCTIONS );
1368EVENT_ATTR(branch-misses, BRANCH_MISSES );
1369EVENT_ATTR(bus-cycles, BUS_CYCLES );
1370EVENT_ATTR(stalled-cycles-frontend, STALLED_CYCLES_FRONTEND );
1371EVENT_ATTR(stalled-cycles-backend, STALLED_CYCLES_BACKEND );
1372EVENT_ATTR(ref-cycles, REF_CPU_CYCLES );
1373
1374static struct attribute *empty_attrs;
1375
1376static struct attribute *events_attr[] = {
1377 EVENT_PTR(CPU_CYCLES),
1378 EVENT_PTR(INSTRUCTIONS),
1379 EVENT_PTR(CACHE_REFERENCES),
1380 EVENT_PTR(CACHE_MISSES),
1381 EVENT_PTR(BRANCH_INSTRUCTIONS),
1382 EVENT_PTR(BRANCH_MISSES),
1383 EVENT_PTR(BUS_CYCLES),
1384 EVENT_PTR(STALLED_CYCLES_FRONTEND),
1385 EVENT_PTR(STALLED_CYCLES_BACKEND),
1386 EVENT_PTR(REF_CPU_CYCLES),
1387 NULL,
1388};
1389
1390static struct attribute_group x86_pmu_events_group = {
1391 .name = "events",
1392 .attrs = events_attr,
1393};
1394
1395ssize_t x86_event_sysfs_show(char *page, u64 config, u64 event)
1396{
1397 u64 umask = (config & ARCH_PERFMON_EVENTSEL_UMASK) >> 8;
1398 u64 cmask = (config & ARCH_PERFMON_EVENTSEL_CMASK) >> 24;
1399 bool edge = (config & ARCH_PERFMON_EVENTSEL_EDGE);
1400 bool pc = (config & ARCH_PERFMON_EVENTSEL_PIN_CONTROL);
1401 bool any = (config & ARCH_PERFMON_EVENTSEL_ANY);
1402 bool inv = (config & ARCH_PERFMON_EVENTSEL_INV);
1403 ssize_t ret;
1404
1405 /*
1406 * We have whole page size to spend and just little data
1407 * to write, so we can safely use sprintf.
1408 */
1409 ret = sprintf(page, "event=0x%02llx", event);
1410
1411 if (umask)
1412 ret += sprintf(page + ret, ",umask=0x%02llx", umask);
1413
1414 if (edge)
1415 ret += sprintf(page + ret, ",edge");
1416
1417 if (pc)
1418 ret += sprintf(page + ret, ",pc");
1419
1420 if (any)
1421 ret += sprintf(page + ret, ",any");
1422
1423 if (inv)
1424 ret += sprintf(page + ret, ",inv");
1425
1426 if (cmask)
1427 ret += sprintf(page + ret, ",cmask=0x%02llx", cmask);
1428
1429 ret += sprintf(page + ret, "\n");
1430
1431 return ret;
1432}
1433
1319static int __init init_hw_perf_events(void) 1434static int __init init_hw_perf_events(void)
1320{ 1435{
1321 struct x86_pmu_quirk *quirk; 1436 struct x86_pmu_quirk *quirk;
@@ -1362,6 +1477,11 @@ static int __init init_hw_perf_events(void)
1362 x86_pmu.attr_rdpmc = 1; /* enable userspace RDPMC usage by default */ 1477 x86_pmu.attr_rdpmc = 1; /* enable userspace RDPMC usage by default */
1363 x86_pmu_format_group.attrs = x86_pmu.format_attrs; 1478 x86_pmu_format_group.attrs = x86_pmu.format_attrs;
1364 1479
1480 if (!x86_pmu.events_sysfs_show)
1481 x86_pmu_events_group.attrs = &empty_attrs;
1482 else
1483 filter_events(x86_pmu_events_group.attrs);
1484
1365 pr_info("... version: %d\n", x86_pmu.version); 1485 pr_info("... version: %d\n", x86_pmu.version);
1366 pr_info("... bit width: %d\n", x86_pmu.cntval_bits); 1486 pr_info("... bit width: %d\n", x86_pmu.cntval_bits);
1367 pr_info("... generic registers: %d\n", x86_pmu.num_counters); 1487 pr_info("... generic registers: %d\n", x86_pmu.num_counters);
@@ -1651,6 +1771,7 @@ static struct attribute_group x86_pmu_attr_group = {
1651static const struct attribute_group *x86_pmu_attr_groups[] = { 1771static const struct attribute_group *x86_pmu_attr_groups[] = {
1652 &x86_pmu_attr_group, 1772 &x86_pmu_attr_group,
1653 &x86_pmu_format_group, 1773 &x86_pmu_format_group,
1774 &x86_pmu_events_group,
1654 NULL, 1775 NULL,
1655}; 1776};
1656 1777
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index 271d25700297..115c1ea97746 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -354,6 +354,8 @@ struct x86_pmu {
354 int attr_rdpmc; 354 int attr_rdpmc;
355 struct attribute **format_attrs; 355 struct attribute **format_attrs;
356 356
357 ssize_t (*events_sysfs_show)(char *page, u64 config);
358
357 /* 359 /*
358 * CPU Hotplug hooks 360 * CPU Hotplug hooks
359 */ 361 */
@@ -536,6 +538,9 @@ static inline void set_linear_ip(struct pt_regs *regs, unsigned long ip)
536 regs->ip = ip; 538 regs->ip = ip;
537} 539}
538 540
541ssize_t x86_event_sysfs_show(char *page, u64 config, u64 event);
542ssize_t intel_event_sysfs_show(char *page, u64 config);
543
539#ifdef CONFIG_CPU_SUP_AMD 544#ifdef CONFIG_CPU_SUP_AMD
540 545
541int amd_pmu_init(void); 546int amd_pmu_init(void);
diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
index 4528ae7b6ec4..c93bc4e813a0 100644
--- a/arch/x86/kernel/cpu/perf_event_amd.c
+++ b/arch/x86/kernel/cpu/perf_event_amd.c
@@ -568,6 +568,14 @@ amd_get_event_constraints_f15h(struct cpu_hw_events *cpuc, struct perf_event *ev
568 } 568 }
569} 569}
570 570
571static ssize_t amd_event_sysfs_show(char *page, u64 config)
572{
573 u64 event = (config & ARCH_PERFMON_EVENTSEL_EVENT) |
574 (config & AMD64_EVENTSEL_EVENT) >> 24;
575
576 return x86_event_sysfs_show(page, config, event);
577}
578
571static __initconst const struct x86_pmu amd_pmu = { 579static __initconst const struct x86_pmu amd_pmu = {
572 .name = "AMD", 580 .name = "AMD",
573 .handle_irq = x86_pmu_handle_irq, 581 .handle_irq = x86_pmu_handle_irq,
@@ -591,6 +599,7 @@ static __initconst const struct x86_pmu amd_pmu = {
591 .put_event_constraints = amd_put_event_constraints, 599 .put_event_constraints = amd_put_event_constraints,
592 600
593 .format_attrs = amd_format_attr, 601 .format_attrs = amd_format_attr,
602 .events_sysfs_show = amd_event_sysfs_show,
594 603
595 .cpu_prepare = amd_pmu_cpu_prepare, 604 .cpu_prepare = amd_pmu_cpu_prepare,
596 .cpu_starting = amd_pmu_cpu_starting, 605 .cpu_starting = amd_pmu_cpu_starting,
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 324bb523d9d9..93b9e1181f83 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1603,6 +1603,13 @@ static struct attribute *intel_arch_formats_attr[] = {
1603 NULL, 1603 NULL,
1604}; 1604};
1605 1605
1606ssize_t intel_event_sysfs_show(char *page, u64 config)
1607{
1608 u64 event = (config & ARCH_PERFMON_EVENTSEL_EVENT);
1609
1610 return x86_event_sysfs_show(page, config, event);
1611}
1612
1606static __initconst const struct x86_pmu core_pmu = { 1613static __initconst const struct x86_pmu core_pmu = {
1607 .name = "core", 1614 .name = "core",
1608 .handle_irq = x86_pmu_handle_irq, 1615 .handle_irq = x86_pmu_handle_irq,
@@ -1628,6 +1635,7 @@ static __initconst const struct x86_pmu core_pmu = {
1628 .event_constraints = intel_core_event_constraints, 1635 .event_constraints = intel_core_event_constraints,
1629 .guest_get_msrs = core_guest_get_msrs, 1636 .guest_get_msrs = core_guest_get_msrs,
1630 .format_attrs = intel_arch_formats_attr, 1637 .format_attrs = intel_arch_formats_attr,
1638 .events_sysfs_show = intel_event_sysfs_show,
1631}; 1639};
1632 1640
1633struct intel_shared_regs *allocate_shared_regs(int cpu) 1641struct intel_shared_regs *allocate_shared_regs(int cpu)
@@ -1766,6 +1774,7 @@ static __initconst const struct x86_pmu intel_pmu = {
1766 .pebs_aliases = intel_pebs_aliases_core2, 1774 .pebs_aliases = intel_pebs_aliases_core2,
1767 1775
1768 .format_attrs = intel_arch3_formats_attr, 1776 .format_attrs = intel_arch3_formats_attr,
1777 .events_sysfs_show = intel_event_sysfs_show,
1769 1778
1770 .cpu_prepare = intel_pmu_cpu_prepare, 1779 .cpu_prepare = intel_pmu_cpu_prepare,
1771 .cpu_starting = intel_pmu_cpu_starting, 1780 .cpu_starting = intel_pmu_cpu_starting,
diff --git a/arch/x86/kernel/cpu/perf_event_p6.c b/arch/x86/kernel/cpu/perf_event_p6.c
index 7d0270bd793e..f2af39f5dc3d 100644
--- a/arch/x86/kernel/cpu/perf_event_p6.c
+++ b/arch/x86/kernel/cpu/perf_event_p6.c
@@ -227,6 +227,8 @@ static __initconst const struct x86_pmu p6_pmu = {
227 .event_constraints = p6_event_constraints, 227 .event_constraints = p6_event_constraints,
228 228
229 .format_attrs = intel_p6_formats_attr, 229 .format_attrs = intel_p6_formats_attr,
230 .events_sysfs_show = intel_event_sysfs_show,
231
230}; 232};
231 233
232__init int p6_pmu_init(void) 234__init int p6_pmu_init(void)
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index b51b2c7ee51f..31b46128a63d 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -56,7 +56,7 @@
56#include <asm/ftrace.h> 56#include <asm/ftrace.h>
57#include <asm/percpu.h> 57#include <asm/percpu.h>
58#include <asm/asm.h> 58#include <asm/asm.h>
59#include <asm/rcu.h> 59#include <asm/context_tracking.h>
60#include <asm/smap.h> 60#include <asm/smap.h>
61#include <linux/err.h> 61#include <linux/err.h>
62 62
@@ -995,8 +995,8 @@ END(interrupt)
995 */ 995 */
996 .p2align CONFIG_X86_L1_CACHE_SHIFT 996 .p2align CONFIG_X86_L1_CACHE_SHIFT
997common_interrupt: 997common_interrupt:
998 ASM_CLAC
999 XCPT_FRAME 998 XCPT_FRAME
999 ASM_CLAC
1000 addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */ 1000 addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */
1001 interrupt do_IRQ 1001 interrupt do_IRQ
1002 /* 0(%rsp): old_rsp-ARGOFFSET */ 1002 /* 0(%rsp): old_rsp-ARGOFFSET */
@@ -1135,8 +1135,8 @@ END(common_interrupt)
1135 */ 1135 */
1136.macro apicinterrupt num sym do_sym 1136.macro apicinterrupt num sym do_sym
1137ENTRY(\sym) 1137ENTRY(\sym)
1138 ASM_CLAC
1139 INTR_FRAME 1138 INTR_FRAME
1139 ASM_CLAC
1140 pushq_cfi $~(\num) 1140 pushq_cfi $~(\num)
1141.Lcommon_\sym: 1141.Lcommon_\sym:
1142 interrupt \do_sym 1142 interrupt \do_sym
@@ -1190,8 +1190,8 @@ apicinterrupt IRQ_WORK_VECTOR \
1190 */ 1190 */
1191.macro zeroentry sym do_sym 1191.macro zeroentry sym do_sym
1192ENTRY(\sym) 1192ENTRY(\sym)
1193 ASM_CLAC
1194 INTR_FRAME 1193 INTR_FRAME
1194 ASM_CLAC
1195 PARAVIRT_ADJUST_EXCEPTION_FRAME 1195 PARAVIRT_ADJUST_EXCEPTION_FRAME
1196 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ 1196 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
1197 subq $ORIG_RAX-R15, %rsp 1197 subq $ORIG_RAX-R15, %rsp
@@ -1208,8 +1208,8 @@ END(\sym)
1208 1208
1209.macro paranoidzeroentry sym do_sym 1209.macro paranoidzeroentry sym do_sym
1210ENTRY(\sym) 1210ENTRY(\sym)
1211 ASM_CLAC
1212 INTR_FRAME 1211 INTR_FRAME
1212 ASM_CLAC
1213 PARAVIRT_ADJUST_EXCEPTION_FRAME 1213 PARAVIRT_ADJUST_EXCEPTION_FRAME
1214 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ 1214 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
1215 subq $ORIG_RAX-R15, %rsp 1215 subq $ORIG_RAX-R15, %rsp
@@ -1227,8 +1227,8 @@ END(\sym)
1227#define INIT_TSS_IST(x) PER_CPU_VAR(init_tss) + (TSS_ist + ((x) - 1) * 8) 1227#define INIT_TSS_IST(x) PER_CPU_VAR(init_tss) + (TSS_ist + ((x) - 1) * 8)
1228.macro paranoidzeroentry_ist sym do_sym ist 1228.macro paranoidzeroentry_ist sym do_sym ist
1229ENTRY(\sym) 1229ENTRY(\sym)
1230 ASM_CLAC
1231 INTR_FRAME 1230 INTR_FRAME
1231 ASM_CLAC
1232 PARAVIRT_ADJUST_EXCEPTION_FRAME 1232 PARAVIRT_ADJUST_EXCEPTION_FRAME
1233 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ 1233 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
1234 subq $ORIG_RAX-R15, %rsp 1234 subq $ORIG_RAX-R15, %rsp
@@ -1247,8 +1247,8 @@ END(\sym)
1247 1247
1248.macro errorentry sym do_sym 1248.macro errorentry sym do_sym
1249ENTRY(\sym) 1249ENTRY(\sym)
1250 ASM_CLAC
1251 XCPT_FRAME 1250 XCPT_FRAME
1251 ASM_CLAC
1252 PARAVIRT_ADJUST_EXCEPTION_FRAME 1252 PARAVIRT_ADJUST_EXCEPTION_FRAME
1253 subq $ORIG_RAX-R15, %rsp 1253 subq $ORIG_RAX-R15, %rsp
1254 CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 1254 CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15
@@ -1266,8 +1266,8 @@ END(\sym)
1266 /* error code is on the stack already */ 1266 /* error code is on the stack already */
1267.macro paranoiderrorentry sym do_sym 1267.macro paranoiderrorentry sym do_sym
1268ENTRY(\sym) 1268ENTRY(\sym)
1269 ASM_CLAC
1270 XCPT_FRAME 1269 XCPT_FRAME
1270 ASM_CLAC
1271 PARAVIRT_ADJUST_EXCEPTION_FRAME 1271 PARAVIRT_ADJUST_EXCEPTION_FRAME
1272 subq $ORIG_RAX-R15, %rsp 1272 subq $ORIG_RAX-R15, %rsp
1273 CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 1273 CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15
@@ -1699,9 +1699,10 @@ nested_nmi:
1699 1699
17001: 17001:
1701 /* Set up the interrupted NMIs stack to jump to repeat_nmi */ 1701 /* Set up the interrupted NMIs stack to jump to repeat_nmi */
1702 leaq -6*8(%rsp), %rdx 1702 leaq -1*8(%rsp), %rdx
1703 movq %rdx, %rsp 1703 movq %rdx, %rsp
1704 CFI_ADJUST_CFA_OFFSET 6*8 1704 CFI_ADJUST_CFA_OFFSET 1*8
1705 leaq -10*8(%rsp), %rdx
1705 pushq_cfi $__KERNEL_DS 1706 pushq_cfi $__KERNEL_DS
1706 pushq_cfi %rdx 1707 pushq_cfi %rdx
1707 pushfq_cfi 1708 pushfq_cfi
@@ -1709,8 +1710,8 @@ nested_nmi:
1709 pushq_cfi $repeat_nmi 1710 pushq_cfi $repeat_nmi
1710 1711
1711 /* Put stack back */ 1712 /* Put stack back */
1712 addq $(11*8), %rsp 1713 addq $(6*8), %rsp
1713 CFI_ADJUST_CFA_OFFSET -11*8 1714 CFI_ADJUST_CFA_OFFSET -6*8
1714 1715
1715nested_nmi_out: 1716nested_nmi_out:
1716 popq_cfi %rdx 1717 popq_cfi %rdx
@@ -1736,18 +1737,18 @@ first_nmi:
1736 * +-------------------------+ 1737 * +-------------------------+
1737 * | NMI executing variable | 1738 * | NMI executing variable |
1738 * +-------------------------+ 1739 * +-------------------------+
1739 * | Saved SS |
1740 * | Saved Return RSP |
1741 * | Saved RFLAGS |
1742 * | Saved CS |
1743 * | Saved RIP |
1744 * +-------------------------+
1745 * | copied SS | 1740 * | copied SS |
1746 * | copied Return RSP | 1741 * | copied Return RSP |
1747 * | copied RFLAGS | 1742 * | copied RFLAGS |
1748 * | copied CS | 1743 * | copied CS |
1749 * | copied RIP | 1744 * | copied RIP |
1750 * +-------------------------+ 1745 * +-------------------------+
1746 * | Saved SS |
1747 * | Saved Return RSP |
1748 * | Saved RFLAGS |
1749 * | Saved CS |
1750 * | Saved RIP |
1751 * +-------------------------+
1751 * | pt_regs | 1752 * | pt_regs |
1752 * +-------------------------+ 1753 * +-------------------------+
1753 * 1754 *
@@ -1763,9 +1764,14 @@ first_nmi:
1763 /* Set the NMI executing variable on the stack. */ 1764 /* Set the NMI executing variable on the stack. */
1764 pushq_cfi $1 1765 pushq_cfi $1
1765 1766
1767 /*
1768 * Leave room for the "copied" frame
1769 */
1770 subq $(5*8), %rsp
1771
1766 /* Copy the stack frame to the Saved frame */ 1772 /* Copy the stack frame to the Saved frame */
1767 .rept 5 1773 .rept 5
1768 pushq_cfi 6*8(%rsp) 1774 pushq_cfi 11*8(%rsp)
1769 .endr 1775 .endr
1770 CFI_DEF_CFA_OFFSET SS+8-RIP 1776 CFI_DEF_CFA_OFFSET SS+8-RIP
1771 1777
@@ -1786,12 +1792,15 @@ repeat_nmi:
1786 * is benign for the non-repeat case, where 1 was pushed just above 1792 * is benign for the non-repeat case, where 1 was pushed just above
1787 * to this very stack slot). 1793 * to this very stack slot).
1788 */ 1794 */
1789 movq $1, 5*8(%rsp) 1795 movq $1, 10*8(%rsp)
1790 1796
1791 /* Make another copy, this one may be modified by nested NMIs */ 1797 /* Make another copy, this one may be modified by nested NMIs */
1798 addq $(10*8), %rsp
1799 CFI_ADJUST_CFA_OFFSET -10*8
1792 .rept 5 1800 .rept 5
1793 pushq_cfi 4*8(%rsp) 1801 pushq_cfi -6*8(%rsp)
1794 .endr 1802 .endr
1803 subq $(5*8), %rsp
1795 CFI_DEF_CFA_OFFSET SS+8-RIP 1804 CFI_DEF_CFA_OFFSET SS+8-RIP
1796end_repeat_nmi: 1805end_repeat_nmi:
1797 1806
@@ -1842,8 +1851,12 @@ nmi_swapgs:
1842 SWAPGS_UNSAFE_STACK 1851 SWAPGS_UNSAFE_STACK
1843nmi_restore: 1852nmi_restore:
1844 RESTORE_ALL 8 1853 RESTORE_ALL 8
1854
1855 /* Pop the extra iret frame */
1856 addq $(5*8), %rsp
1857
1845 /* Clear the NMI executing stack variable */ 1858 /* Clear the NMI executing stack variable */
1846 movq $0, 10*8(%rsp) 1859 movq $0, 5*8(%rsp)
1847 jmp irq_return 1860 jmp irq_return
1848 CFI_ENDPROC 1861 CFI_ENDPROC
1849END(nmi) 1862END(nmi)
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index 957a47aec64e..8e7f6556028f 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -266,6 +266,19 @@ num_subarch_entries = (. - subarch_entries) / 4
266 jmp default_entry 266 jmp default_entry
267#endif /* CONFIG_PARAVIRT */ 267#endif /* CONFIG_PARAVIRT */
268 268
269#ifdef CONFIG_HOTPLUG_CPU
270/*
271 * Boot CPU0 entry point. It's called from play_dead(). Everything has been set
272 * up already except stack. We just set up stack here. Then call
273 * start_secondary().
274 */
275ENTRY(start_cpu0)
276 movl stack_start, %ecx
277 movl %ecx, %esp
278 jmp *(initial_code)
279ENDPROC(start_cpu0)
280#endif
281
269/* 282/*
270 * Non-boot CPU entry point; entered from trampoline.S 283 * Non-boot CPU entry point; entered from trampoline.S
271 * We can't lgdt here, because lgdt itself uses a data segment, but 284 * We can't lgdt here, because lgdt itself uses a data segment, but
@@ -292,8 +305,8 @@ default_entry:
292 * be using the global pages. 305 * be using the global pages.
293 * 306 *
294 * NOTE! If we are on a 486 we may have no cr4 at all! 307 * NOTE! If we are on a 486 we may have no cr4 at all!
295 * Specifically, cr4 exists if and only if CPUID exists, 308 * Specifically, cr4 exists if and only if CPUID exists
296 * which in turn exists if and only if EFLAGS.ID exists. 309 * and has flags other than the FPU flag set.
297 */ 310 */
298 movl $X86_EFLAGS_ID,%ecx 311 movl $X86_EFLAGS_ID,%ecx
299 pushl %ecx 312 pushl %ecx
@@ -308,6 +321,11 @@ default_entry:
308 testl %ecx,%eax 321 testl %ecx,%eax
309 jz 6f # No ID flag = no CPUID = no CR4 322 jz 6f # No ID flag = no CPUID = no CR4
310 323
324 movl $1,%eax
325 cpuid
326 andl $~1,%edx # Ignore CPUID.FPU
327 jz 6f # No flags or only CPUID.FPU = no CR4
328
311 movl pa(mmu_cr4_features),%eax 329 movl pa(mmu_cr4_features),%eax
312 movl %eax,%cr4 330 movl %eax,%cr4
313 331
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 94bf9cc2c7ee..980053c4b9cc 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -252,6 +252,22 @@ ENTRY(secondary_startup_64)
252 pushq %rax # target address in negative space 252 pushq %rax # target address in negative space
253 lretq 253 lretq
254 254
255#ifdef CONFIG_HOTPLUG_CPU
256/*
257 * Boot CPU0 entry point. It's called from play_dead(). Everything has been set
258 * up already except stack. We just set up stack here. Then call
259 * start_secondary().
260 */
261ENTRY(start_cpu0)
262 movq stack_start(%rip),%rsp
263 movq initial_code(%rip),%rax
264 pushq $0 # fake return address to stop unwinder
265 pushq $__KERNEL_CS # set correct cs
266 pushq %rax # target address in negative space
267 lretq
268ENDPROC(start_cpu0)
269#endif
270
255 /* SMP bootup changes these two */ 271 /* SMP bootup changes these two */
256 __REFDATA 272 __REFDATA
257 .align 8 273 .align 8
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index 1460a5df92f7..e28670f9a589 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -434,7 +434,7 @@ void hpet_msi_unmask(struct irq_data *data)
434 434
435 /* unmask it */ 435 /* unmask it */
436 cfg = hpet_readl(HPET_Tn_CFG(hdev->num)); 436 cfg = hpet_readl(HPET_Tn_CFG(hdev->num));
437 cfg |= HPET_TN_FSB; 437 cfg |= HPET_TN_ENABLE | HPET_TN_FSB;
438 hpet_writel(cfg, HPET_Tn_CFG(hdev->num)); 438 hpet_writel(cfg, HPET_Tn_CFG(hdev->num));
439} 439}
440 440
@@ -445,7 +445,7 @@ void hpet_msi_mask(struct irq_data *data)
445 445
446 /* mask it */ 446 /* mask it */
447 cfg = hpet_readl(HPET_Tn_CFG(hdev->num)); 447 cfg = hpet_readl(HPET_Tn_CFG(hdev->num));
448 cfg &= ~HPET_TN_FSB; 448 cfg &= ~(HPET_TN_ENABLE | HPET_TN_FSB);
449 hpet_writel(cfg, HPET_Tn_CFG(hdev->num)); 449 hpet_writel(cfg, HPET_Tn_CFG(hdev->num));
450} 450}
451 451
diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c
index 675a05012449..245a71db401a 100644
--- a/arch/x86/kernel/i387.c
+++ b/arch/x86/kernel/i387.c
@@ -175,7 +175,11 @@ void __cpuinit fpu_init(void)
175 cr0 |= X86_CR0_EM; 175 cr0 |= X86_CR0_EM;
176 write_cr0(cr0); 176 write_cr0(cr0);
177 177
178 if (!smp_processor_id()) 178 /*
179 * init_thread_xstate is only called once to avoid overriding
180 * xstate_size during boot time or during CPU hotplug.
181 */
182 if (xstate_size == 0)
179 init_thread_xstate(); 183 init_thread_xstate();
180 184
181 mxcsr_feature_mask_init(); 185 mxcsr_feature_mask_init();
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c
index 7720ff5a9ee2..efdec7cd8e01 100644
--- a/arch/x86/kernel/microcode_amd.c
+++ b/arch/x86/kernel/microcode_amd.c
@@ -8,8 +8,8 @@
8 * Tigran Aivazian <tigran@aivazian.fsnet.co.uk> 8 * Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
9 * 9 *
10 * Maintainers: 10 * Maintainers:
11 * Andreas Herrmann <andreas.herrmann3@amd.com> 11 * Andreas Herrmann <herrmann.der.user@googlemail.com>
12 * Borislav Petkov <borislav.petkov@amd.com> 12 * Borislav Petkov <bp@alien8.de>
13 * 13 *
14 * This driver allows to upgrade microcode on F10h AMD 14 * This driver allows to upgrade microcode on F10h AMD
15 * CPUs and later. 15 * CPUs and later.
@@ -190,6 +190,7 @@ static unsigned int verify_patch_size(int cpu, u32 patch_size,
190#define F1XH_MPB_MAX_SIZE 2048 190#define F1XH_MPB_MAX_SIZE 2048
191#define F14H_MPB_MAX_SIZE 1824 191#define F14H_MPB_MAX_SIZE 1824
192#define F15H_MPB_MAX_SIZE 4096 192#define F15H_MPB_MAX_SIZE 4096
193#define F16H_MPB_MAX_SIZE 3458
193 194
194 switch (c->x86) { 195 switch (c->x86) {
195 case 0x14: 196 case 0x14:
@@ -198,6 +199,9 @@ static unsigned int verify_patch_size(int cpu, u32 patch_size,
198 case 0x15: 199 case 0x15:
199 max_size = F15H_MPB_MAX_SIZE; 200 max_size = F15H_MPB_MAX_SIZE;
200 break; 201 break;
202 case 0x16:
203 max_size = F16H_MPB_MAX_SIZE;
204 break;
201 default: 205 default:
202 max_size = F1XH_MPB_MAX_SIZE; 206 max_size = F1XH_MPB_MAX_SIZE;
203 break; 207 break;
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index b644e1c765dc..2f99e3121875 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -306,11 +306,6 @@ void (*pm_idle)(void);
306EXPORT_SYMBOL(pm_idle); 306EXPORT_SYMBOL(pm_idle);
307#endif 307#endif
308 308
309static inline int hlt_use_halt(void)
310{
311 return 1;
312}
313
314#ifndef CONFIG_SMP 309#ifndef CONFIG_SMP
315static inline void play_dead(void) 310static inline void play_dead(void)
316{ 311{
@@ -410,28 +405,22 @@ void cpu_idle(void)
410 */ 405 */
411void default_idle(void) 406void default_idle(void)
412{ 407{
413 if (hlt_use_halt()) { 408 trace_power_start_rcuidle(POWER_CSTATE, 1, smp_processor_id());
414 trace_power_start_rcuidle(POWER_CSTATE, 1, smp_processor_id()); 409 trace_cpu_idle_rcuidle(1, smp_processor_id());
415 trace_cpu_idle_rcuidle(1, smp_processor_id()); 410 current_thread_info()->status &= ~TS_POLLING;
416 current_thread_info()->status &= ~TS_POLLING; 411 /*
417 /* 412 * TS_POLLING-cleared state must be visible before we
418 * TS_POLLING-cleared state must be visible before we 413 * test NEED_RESCHED:
419 * test NEED_RESCHED: 414 */
420 */ 415 smp_mb();
421 smp_mb();
422 416
423 if (!need_resched()) 417 if (!need_resched())
424 safe_halt(); /* enables interrupts racelessly */ 418 safe_halt(); /* enables interrupts racelessly */
425 else 419 else
426 local_irq_enable();
427 current_thread_info()->status |= TS_POLLING;
428 trace_power_end_rcuidle(smp_processor_id());
429 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
430 } else {
431 local_irq_enable(); 420 local_irq_enable();
432 /* loop is done by the caller */ 421 current_thread_info()->status |= TS_POLLING;
433 cpu_relax(); 422 trace_power_end_rcuidle(smp_processor_id());
434 } 423 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
435} 424}
436#ifdef CONFIG_APM_MODULE 425#ifdef CONFIG_APM_MODULE
437EXPORT_SYMBOL(default_idle); 426EXPORT_SYMBOL(default_idle);
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index b00b33a18390..b629bbe0d9bd 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -22,6 +22,8 @@
22#include <linux/perf_event.h> 22#include <linux/perf_event.h>
23#include <linux/hw_breakpoint.h> 23#include <linux/hw_breakpoint.h>
24#include <linux/rcupdate.h> 24#include <linux/rcupdate.h>
25#include <linux/module.h>
26#include <linux/context_tracking.h>
25 27
26#include <asm/uaccess.h> 28#include <asm/uaccess.h>
27#include <asm/pgtable.h> 29#include <asm/pgtable.h>
@@ -166,6 +168,35 @@ static inline bool invalid_selector(u16 value)
166 168
167#define FLAG_MASK FLAG_MASK_32 169#define FLAG_MASK FLAG_MASK_32
168 170
171/*
172 * X86_32 CPUs don't save ss and esp if the CPU is already in kernel mode
173 * when it traps. The previous stack will be directly underneath the saved
174 * registers, and 'sp/ss' won't even have been saved. Thus the '&regs->sp'.
175 *
176 * Now, if the stack is empty, '&regs->sp' is out of range. In this
177 * case we try to take the previous stack. To always return a non-null
178 * stack pointer we fall back to regs as stack if no previous stack
179 * exists.
180 *
181 * This is valid only for kernel mode traps.
182 */
183unsigned long kernel_stack_pointer(struct pt_regs *regs)
184{
185 unsigned long context = (unsigned long)regs & ~(THREAD_SIZE - 1);
186 unsigned long sp = (unsigned long)&regs->sp;
187 struct thread_info *tinfo;
188
189 if (context == (sp & ~(THREAD_SIZE - 1)))
190 return sp;
191
192 tinfo = (struct thread_info *)context;
193 if (tinfo->previous_esp)
194 return tinfo->previous_esp;
195
196 return (unsigned long)regs;
197}
198EXPORT_SYMBOL_GPL(kernel_stack_pointer);
199
169static unsigned long *pt_regs_access(struct pt_regs *regs, unsigned long regno) 200static unsigned long *pt_regs_access(struct pt_regs *regs, unsigned long regno)
170{ 201{
171 BUILD_BUG_ON(offsetof(struct pt_regs, bx) != 0); 202 BUILD_BUG_ON(offsetof(struct pt_regs, bx) != 0);
@@ -1461,7 +1492,7 @@ long syscall_trace_enter(struct pt_regs *regs)
1461{ 1492{
1462 long ret = 0; 1493 long ret = 0;
1463 1494
1464 rcu_user_exit(); 1495 user_exit();
1465 1496
1466 /* 1497 /*
1467 * If we stepped into a sysenter/syscall insn, it trapped in 1498 * If we stepped into a sysenter/syscall insn, it trapped in
@@ -1511,6 +1542,13 @@ void syscall_trace_leave(struct pt_regs *regs)
1511{ 1542{
1512 bool step; 1543 bool step;
1513 1544
1545 /*
1546 * We may come here right after calling schedule_user()
1547 * or do_notify_resume(), in which case we can be in RCU
1548 * user mode.
1549 */
1550 user_exit();
1551
1514 audit_syscall_exit(regs); 1552 audit_syscall_exit(regs);
1515 1553
1516 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) 1554 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
@@ -1527,5 +1565,5 @@ void syscall_trace_leave(struct pt_regs *regs)
1527 if (step || test_thread_flag(TIF_SYSCALL_TRACE)) 1565 if (step || test_thread_flag(TIF_SYSCALL_TRACE))
1528 tracehook_report_syscall_exit(regs, step); 1566 tracehook_report_syscall_exit(regs, step);
1529 1567
1530 rcu_user_enter(); 1568 user_enter();
1531} 1569}
diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
index 4929c1be0ac0..801602b5d745 100644
--- a/arch/x86/kernel/rtc.c
+++ b/arch/x86/kernel/rtc.c
@@ -195,12 +195,6 @@ void read_persistent_clock(struct timespec *ts)
195 ts->tv_nsec = 0; 195 ts->tv_nsec = 0;
196} 196}
197 197
198unsigned long long native_read_tsc(void)
199{
200 return __native_read_tsc();
201}
202EXPORT_SYMBOL(native_read_tsc);
203
204 198
205static struct resource rtc_resources[] = { 199static struct resource rtc_resources[] = {
206 [0] = { 200 [0] = {
diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c
index 70b27ee6118e..fbbb604313a2 100644
--- a/arch/x86/kernel/signal.c
+++ b/arch/x86/kernel/signal.c
@@ -22,6 +22,7 @@
22#include <linux/uaccess.h> 22#include <linux/uaccess.h>
23#include <linux/user-return-notifier.h> 23#include <linux/user-return-notifier.h>
24#include <linux/uprobes.h> 24#include <linux/uprobes.h>
25#include <linux/context_tracking.h>
25 26
26#include <asm/processor.h> 27#include <asm/processor.h>
27#include <asm/ucontext.h> 28#include <asm/ucontext.h>
@@ -816,7 +817,7 @@ static void do_signal(struct pt_regs *regs)
816void 817void
817do_notify_resume(struct pt_regs *regs, void *unused, __u32 thread_info_flags) 818do_notify_resume(struct pt_regs *regs, void *unused, __u32 thread_info_flags)
818{ 819{
819 rcu_user_exit(); 820 user_exit();
820 821
821#ifdef CONFIG_X86_MCE 822#ifdef CONFIG_X86_MCE
822 /* notify userspace of pending MCEs */ 823 /* notify userspace of pending MCEs */
@@ -838,7 +839,7 @@ do_notify_resume(struct pt_regs *regs, void *unused, __u32 thread_info_flags)
838 if (thread_info_flags & _TIF_USER_RETURN_NOTIFY) 839 if (thread_info_flags & _TIF_USER_RETURN_NOTIFY)
839 fire_user_return_notifiers(); 840 fire_user_return_notifiers();
840 841
841 rcu_user_enter(); 842 user_enter();
842} 843}
843 844
844void signal_fault(struct pt_regs *regs, void __user *frame, char *where) 845void signal_fault(struct pt_regs *regs, void __user *frame, char *where)
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index c80a33bc528b..ed0fe385289d 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -68,6 +68,8 @@
68#include <asm/mwait.h> 68#include <asm/mwait.h>
69#include <asm/apic.h> 69#include <asm/apic.h>
70#include <asm/io_apic.h> 70#include <asm/io_apic.h>
71#include <asm/i387.h>
72#include <asm/fpu-internal.h>
71#include <asm/setup.h> 73#include <asm/setup.h>
72#include <asm/uv/uv.h> 74#include <asm/uv/uv.h>
73#include <linux/mc146818rtc.h> 75#include <linux/mc146818rtc.h>
@@ -125,8 +127,8 @@ EXPORT_PER_CPU_SYMBOL(cpu_info);
125atomic_t init_deasserted; 127atomic_t init_deasserted;
126 128
127/* 129/*
128 * Report back to the Boot Processor. 130 * Report back to the Boot Processor during boot time or to the caller processor
129 * Running on AP. 131 * during CPU online.
130 */ 132 */
131static void __cpuinit smp_callin(void) 133static void __cpuinit smp_callin(void)
132{ 134{
@@ -138,15 +140,17 @@ static void __cpuinit smp_callin(void)
138 * we may get here before an INIT-deassert IPI reaches 140 * we may get here before an INIT-deassert IPI reaches
139 * our local APIC. We have to wait for the IPI or we'll 141 * our local APIC. We have to wait for the IPI or we'll
140 * lock up on an APIC access. 142 * lock up on an APIC access.
143 *
144 * Since CPU0 is not wakened up by INIT, it doesn't wait for the IPI.
141 */ 145 */
142 if (apic->wait_for_init_deassert) 146 cpuid = smp_processor_id();
147 if (apic->wait_for_init_deassert && cpuid != 0)
143 apic->wait_for_init_deassert(&init_deasserted); 148 apic->wait_for_init_deassert(&init_deasserted);
144 149
145 /* 150 /*
146 * (This works even if the APIC is not enabled.) 151 * (This works even if the APIC is not enabled.)
147 */ 152 */
148 phys_id = read_apic_id(); 153 phys_id = read_apic_id();
149 cpuid = smp_processor_id();
150 if (cpumask_test_cpu(cpuid, cpu_callin_mask)) { 154 if (cpumask_test_cpu(cpuid, cpu_callin_mask)) {
151 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__, 155 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__,
152 phys_id, cpuid); 156 phys_id, cpuid);
@@ -228,6 +232,8 @@ static void __cpuinit smp_callin(void)
228 cpumask_set_cpu(cpuid, cpu_callin_mask); 232 cpumask_set_cpu(cpuid, cpu_callin_mask);
229} 233}
230 234
235static int cpu0_logical_apicid;
236static int enable_start_cpu0;
231/* 237/*
232 * Activate a secondary processor. 238 * Activate a secondary processor.
233 */ 239 */
@@ -243,6 +249,8 @@ notrace static void __cpuinit start_secondary(void *unused)
243 preempt_disable(); 249 preempt_disable();
244 smp_callin(); 250 smp_callin();
245 251
252 enable_start_cpu0 = 0;
253
246#ifdef CONFIG_X86_32 254#ifdef CONFIG_X86_32
247 /* switch away from the initial page table */ 255 /* switch away from the initial page table */
248 load_cr3(swapper_pg_dir); 256 load_cr3(swapper_pg_dir);
@@ -279,19 +287,30 @@ notrace static void __cpuinit start_secondary(void *unused)
279 cpu_idle(); 287 cpu_idle();
280} 288}
281 289
290void __init smp_store_boot_cpu_info(void)
291{
292 int id = 0; /* CPU 0 */
293 struct cpuinfo_x86 *c = &cpu_data(id);
294
295 *c = boot_cpu_data;
296 c->cpu_index = id;
297}
298
282/* 299/*
283 * The bootstrap kernel entry code has set these up. Save them for 300 * The bootstrap kernel entry code has set these up. Save them for
284 * a given CPU 301 * a given CPU
285 */ 302 */
286
287void __cpuinit smp_store_cpu_info(int id) 303void __cpuinit smp_store_cpu_info(int id)
288{ 304{
289 struct cpuinfo_x86 *c = &cpu_data(id); 305 struct cpuinfo_x86 *c = &cpu_data(id);
290 306
291 *c = boot_cpu_data; 307 *c = boot_cpu_data;
292 c->cpu_index = id; 308 c->cpu_index = id;
293 if (id != 0) 309 /*
294 identify_secondary_cpu(c); 310 * During boot time, CPU0 has this setup already. Save the info when
311 * bringing up AP or offlined CPU0.
312 */
313 identify_secondary_cpu(c);
295} 314}
296 315
297static bool __cpuinit 316static bool __cpuinit
@@ -313,7 +332,7 @@ do { \
313 332
314static bool __cpuinit match_smt(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) 333static bool __cpuinit match_smt(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
315{ 334{
316 if (cpu_has(c, X86_FEATURE_TOPOEXT)) { 335 if (cpu_has_topoext) {
317 int cpu1 = c->cpu_index, cpu2 = o->cpu_index; 336 int cpu1 = c->cpu_index, cpu2 = o->cpu_index;
318 337
319 if (c->phys_proc_id == o->phys_proc_id && 338 if (c->phys_proc_id == o->phys_proc_id &&
@@ -481,7 +500,7 @@ void __inquire_remote_apic(int apicid)
481 * won't ... remember to clear down the APIC, etc later. 500 * won't ... remember to clear down the APIC, etc later.
482 */ 501 */
483int __cpuinit 502int __cpuinit
484wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip) 503wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip)
485{ 504{
486 unsigned long send_status, accept_status = 0; 505 unsigned long send_status, accept_status = 0;
487 int maxlvt; 506 int maxlvt;
@@ -489,7 +508,7 @@ wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip)
489 /* Target chip */ 508 /* Target chip */
490 /* Boot on the stack */ 509 /* Boot on the stack */
491 /* Kick the second */ 510 /* Kick the second */
492 apic_icr_write(APIC_DM_NMI | apic->dest_logical, logical_apicid); 511 apic_icr_write(APIC_DM_NMI | apic->dest_logical, apicid);
493 512
494 pr_debug("Waiting for send to finish...\n"); 513 pr_debug("Waiting for send to finish...\n");
495 send_status = safe_apic_wait_icr_idle(); 514 send_status = safe_apic_wait_icr_idle();
@@ -649,6 +668,63 @@ static void __cpuinit announce_cpu(int cpu, int apicid)
649 node, cpu, apicid); 668 node, cpu, apicid);
650} 669}
651 670
671static int wakeup_cpu0_nmi(unsigned int cmd, struct pt_regs *regs)
672{
673 int cpu;
674
675 cpu = smp_processor_id();
676 if (cpu == 0 && !cpu_online(cpu) && enable_start_cpu0)
677 return NMI_HANDLED;
678
679 return NMI_DONE;
680}
681
682/*
683 * Wake up AP by INIT, INIT, STARTUP sequence.
684 *
685 * Instead of waiting for STARTUP after INITs, BSP will execute the BIOS
686 * boot-strap code which is not a desired behavior for waking up BSP. To
687 * void the boot-strap code, wake up CPU0 by NMI instead.
688 *
689 * This works to wake up soft offlined CPU0 only. If CPU0 is hard offlined
690 * (i.e. physically hot removed and then hot added), NMI won't wake it up.
691 * We'll change this code in the future to wake up hard offlined CPU0 if
692 * real platform and request are available.
693 */
694static int __cpuinit
695wakeup_cpu_via_init_nmi(int cpu, unsigned long start_ip, int apicid,
696 int *cpu0_nmi_registered)
697{
698 int id;
699 int boot_error;
700
701 /*
702 * Wake up AP by INIT, INIT, STARTUP sequence.
703 */
704 if (cpu)
705 return wakeup_secondary_cpu_via_init(apicid, start_ip);
706
707 /*
708 * Wake up BSP by nmi.
709 *
710 * Register a NMI handler to help wake up CPU0.
711 */
712 boot_error = register_nmi_handler(NMI_LOCAL,
713 wakeup_cpu0_nmi, 0, "wake_cpu0");
714
715 if (!boot_error) {
716 enable_start_cpu0 = 1;
717 *cpu0_nmi_registered = 1;
718 if (apic->dest_logical == APIC_DEST_LOGICAL)
719 id = cpu0_logical_apicid;
720 else
721 id = apicid;
722 boot_error = wakeup_secondary_cpu_via_nmi(id, start_ip);
723 }
724
725 return boot_error;
726}
727
652/* 728/*
653 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad 729 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
654 * (ie clustered apic addressing mode), this is a LOGICAL apic ID. 730 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
@@ -664,6 +740,7 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu, struct task_struct *idle)
664 740
665 unsigned long boot_error = 0; 741 unsigned long boot_error = 0;
666 int timeout; 742 int timeout;
743 int cpu0_nmi_registered = 0;
667 744
668 /* Just in case we booted with a single CPU. */ 745 /* Just in case we booted with a single CPU. */
669 alternatives_enable_smp(); 746 alternatives_enable_smp();
@@ -711,13 +788,16 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu, struct task_struct *idle)
711 } 788 }
712 789
713 /* 790 /*
714 * Kick the secondary CPU. Use the method in the APIC driver 791 * Wake up a CPU in difference cases:
715 * if it's defined - or use an INIT boot APIC message otherwise: 792 * - Use the method in the APIC driver if it's defined
793 * Otherwise,
794 * - Use an INIT boot APIC message for APs or NMI for BSP.
716 */ 795 */
717 if (apic->wakeup_secondary_cpu) 796 if (apic->wakeup_secondary_cpu)
718 boot_error = apic->wakeup_secondary_cpu(apicid, start_ip); 797 boot_error = apic->wakeup_secondary_cpu(apicid, start_ip);
719 else 798 else
720 boot_error = wakeup_secondary_cpu_via_init(apicid, start_ip); 799 boot_error = wakeup_cpu_via_init_nmi(cpu, start_ip, apicid,
800 &cpu0_nmi_registered);
721 801
722 if (!boot_error) { 802 if (!boot_error) {
723 /* 803 /*
@@ -782,6 +862,13 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu, struct task_struct *idle)
782 */ 862 */
783 smpboot_restore_warm_reset_vector(); 863 smpboot_restore_warm_reset_vector();
784 } 864 }
865 /*
866 * Clean up the nmi handler. Do this after the callin and callout sync
867 * to avoid impact of possible long unregister time.
868 */
869 if (cpu0_nmi_registered)
870 unregister_nmi_handler(NMI_LOCAL, "wake_cpu0");
871
785 return boot_error; 872 return boot_error;
786} 873}
787 874
@@ -795,7 +882,7 @@ int __cpuinit native_cpu_up(unsigned int cpu, struct task_struct *tidle)
795 882
796 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu); 883 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu);
797 884
798 if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid || 885 if (apicid == BAD_APICID ||
799 !physid_isset(apicid, phys_cpu_present_map) || 886 !physid_isset(apicid, phys_cpu_present_map) ||
800 !apic->apic_id_valid(apicid)) { 887 !apic->apic_id_valid(apicid)) {
801 pr_err("%s: bad cpu %d\n", __func__, cpu); 888 pr_err("%s: bad cpu %d\n", __func__, cpu);
@@ -818,6 +905,9 @@ int __cpuinit native_cpu_up(unsigned int cpu, struct task_struct *tidle)
818 905
819 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE; 906 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
820 907
908 /* the FPU context is blank, nobody can own it */
909 __cpu_disable_lazy_restore(cpu);
910
821 err = do_boot_cpu(apicid, cpu, tidle); 911 err = do_boot_cpu(apicid, cpu, tidle);
822 if (err) { 912 if (err) {
823 pr_debug("do_boot_cpu failed %d\n", err); 913 pr_debug("do_boot_cpu failed %d\n", err);
@@ -990,7 +1080,7 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
990 /* 1080 /*
991 * Setup boot CPU information 1081 * Setup boot CPU information
992 */ 1082 */
993 smp_store_cpu_info(0); /* Final full version of the data */ 1083 smp_store_boot_cpu_info(); /* Final full version of the data */
994 cpumask_copy(cpu_callin_mask, cpumask_of(0)); 1084 cpumask_copy(cpu_callin_mask, cpumask_of(0));
995 mb(); 1085 mb();
996 1086
@@ -1026,6 +1116,11 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
1026 */ 1116 */
1027 setup_local_APIC(); 1117 setup_local_APIC();
1028 1118
1119 if (x2apic_mode)
1120 cpu0_logical_apicid = apic_read(APIC_LDR);
1121 else
1122 cpu0_logical_apicid = GET_APIC_LOGICAL_ID(apic_read(APIC_LDR));
1123
1029 /* 1124 /*
1030 * Enable IO APIC before setting up error vector 1125 * Enable IO APIC before setting up error vector
1031 */ 1126 */
@@ -1214,19 +1309,6 @@ void cpu_disable_common(void)
1214 1309
1215int native_cpu_disable(void) 1310int native_cpu_disable(void)
1216{ 1311{
1217 int cpu = smp_processor_id();
1218
1219 /*
1220 * Perhaps use cpufreq to drop frequency, but that could go
1221 * into generic code.
1222 *
1223 * We won't take down the boot processor on i386 due to some
1224 * interrupts only being able to be serviced by the BSP.
1225 * Especially so if we're not using an IOAPIC -zwane
1226 */
1227 if (cpu == 0)
1228 return -EBUSY;
1229
1230 clear_local_APIC(); 1312 clear_local_APIC();
1231 1313
1232 cpu_disable_common(); 1314 cpu_disable_common();
@@ -1266,6 +1348,14 @@ void play_dead_common(void)
1266 local_irq_disable(); 1348 local_irq_disable();
1267} 1349}
1268 1350
1351static bool wakeup_cpu0(void)
1352{
1353 if (smp_processor_id() == 0 && enable_start_cpu0)
1354 return true;
1355
1356 return false;
1357}
1358
1269/* 1359/*
1270 * We need to flush the caches before going to sleep, lest we have 1360 * We need to flush the caches before going to sleep, lest we have
1271 * dirty data in our caches when we come back up. 1361 * dirty data in our caches when we come back up.
@@ -1329,6 +1419,11 @@ static inline void mwait_play_dead(void)
1329 __monitor(mwait_ptr, 0, 0); 1419 __monitor(mwait_ptr, 0, 0);
1330 mb(); 1420 mb();
1331 __mwait(eax, 0); 1421 __mwait(eax, 0);
1422 /*
1423 * If NMI wants to wake up CPU0, start CPU0.
1424 */
1425 if (wakeup_cpu0())
1426 start_cpu0();
1332 } 1427 }
1333} 1428}
1334 1429
@@ -1339,6 +1434,11 @@ static inline void hlt_play_dead(void)
1339 1434
1340 while (1) { 1435 while (1) {
1341 native_halt(); 1436 native_halt();
1437 /*
1438 * If NMI wants to wake up CPU0, start CPU0.
1439 */
1440 if (wakeup_cpu0())
1441 start_cpu0();
1342 } 1442 }
1343} 1443}
1344 1444
diff --git a/arch/x86/kernel/sys_x86_64.c b/arch/x86/kernel/sys_x86_64.c
index b4d3c3927dd8..97ef74b88e0f 100644
--- a/arch/x86/kernel/sys_x86_64.c
+++ b/arch/x86/kernel/sys_x86_64.c
@@ -21,37 +21,23 @@
21 21
22/* 22/*
23 * Align a virtual address to avoid aliasing in the I$ on AMD F15h. 23 * Align a virtual address to avoid aliasing in the I$ on AMD F15h.
24 *
25 * @flags denotes the allocation direction - bottomup or topdown -
26 * or vDSO; see call sites below.
27 */ 24 */
28unsigned long align_addr(unsigned long addr, struct file *filp, 25static unsigned long get_align_mask(void)
29 enum align_flags flags)
30{ 26{
31 unsigned long tmp_addr;
32
33 /* handle 32- and 64-bit case with a single conditional */ 27 /* handle 32- and 64-bit case with a single conditional */
34 if (va_align.flags < 0 || !(va_align.flags & (2 - mmap_is_ia32()))) 28 if (va_align.flags < 0 || !(va_align.flags & (2 - mmap_is_ia32())))
35 return addr; 29 return 0;
36 30
37 if (!(current->flags & PF_RANDOMIZE)) 31 if (!(current->flags & PF_RANDOMIZE))
38 return addr; 32 return 0;
39
40 if (!((flags & ALIGN_VDSO) || filp))
41 return addr;
42
43 tmp_addr = addr;
44
45 /*
46 * We need an address which is <= than the original
47 * one only when in topdown direction.
48 */
49 if (!(flags & ALIGN_TOPDOWN))
50 tmp_addr += va_align.mask;
51 33
52 tmp_addr &= ~va_align.mask; 34 return va_align.mask;
35}
53 36
54 return tmp_addr; 37unsigned long align_vdso_addr(unsigned long addr)
38{
39 unsigned long align_mask = get_align_mask();
40 return (addr + align_mask) & ~align_mask;
55} 41}
56 42
57static int __init control_va_addr_alignment(char *str) 43static int __init control_va_addr_alignment(char *str)
@@ -126,7 +112,7 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
126{ 112{
127 struct mm_struct *mm = current->mm; 113 struct mm_struct *mm = current->mm;
128 struct vm_area_struct *vma; 114 struct vm_area_struct *vma;
129 unsigned long start_addr; 115 struct vm_unmapped_area_info info;
130 unsigned long begin, end; 116 unsigned long begin, end;
131 117
132 if (flags & MAP_FIXED) 118 if (flags & MAP_FIXED)
@@ -144,50 +130,16 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
144 (!vma || addr + len <= vma->vm_start)) 130 (!vma || addr + len <= vma->vm_start))
145 return addr; 131 return addr;
146 } 132 }
147 if (((flags & MAP_32BIT) || test_thread_flag(TIF_ADDR32))
148 && len <= mm->cached_hole_size) {
149 mm->cached_hole_size = 0;
150 mm->free_area_cache = begin;
151 }
152 addr = mm->free_area_cache;
153 if (addr < begin)
154 addr = begin;
155 start_addr = addr;
156
157full_search:
158
159 addr = align_addr(addr, filp, 0);
160
161 for (vma = find_vma(mm, addr); ; vma = vma->vm_next) {
162 /* At this point: (!vma || addr < vma->vm_end). */
163 if (end - len < addr) {
164 /*
165 * Start a new search - just in case we missed
166 * some holes.
167 */
168 if (start_addr != begin) {
169 start_addr = addr = begin;
170 mm->cached_hole_size = 0;
171 goto full_search;
172 }
173 return -ENOMEM;
174 }
175 if (!vma || addr + len <= vma->vm_start) {
176 /*
177 * Remember the place where we stopped the search:
178 */
179 mm->free_area_cache = addr + len;
180 return addr;
181 }
182 if (addr + mm->cached_hole_size < vma->vm_start)
183 mm->cached_hole_size = vma->vm_start - addr;
184 133
185 addr = vma->vm_end; 134 info.flags = 0;
186 addr = align_addr(addr, filp, 0); 135 info.length = len;
187 } 136 info.low_limit = begin;
137 info.high_limit = end;
138 info.align_mask = filp ? get_align_mask() : 0;
139 info.align_offset = pgoff << PAGE_SHIFT;
140 return vm_unmapped_area(&info);
188} 141}
189 142
190
191unsigned long 143unsigned long
192arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0, 144arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
193 const unsigned long len, const unsigned long pgoff, 145 const unsigned long len, const unsigned long pgoff,
@@ -195,7 +147,8 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
195{ 147{
196 struct vm_area_struct *vma; 148 struct vm_area_struct *vma;
197 struct mm_struct *mm = current->mm; 149 struct mm_struct *mm = current->mm;
198 unsigned long addr = addr0, start_addr; 150 unsigned long addr = addr0;
151 struct vm_unmapped_area_info info;
199 152
200 /* requested length too big for entire address space */ 153 /* requested length too big for entire address space */
201 if (len > TASK_SIZE) 154 if (len > TASK_SIZE)
@@ -217,51 +170,16 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
217 return addr; 170 return addr;
218 } 171 }
219 172
220 /* check if free_area_cache is useful for us */ 173 info.flags = VM_UNMAPPED_AREA_TOPDOWN;
221 if (len <= mm->cached_hole_size) { 174 info.length = len;
222 mm->cached_hole_size = 0; 175 info.low_limit = PAGE_SIZE;
223 mm->free_area_cache = mm->mmap_base; 176 info.high_limit = mm->mmap_base;
224 } 177 info.align_mask = filp ? get_align_mask() : 0;
225 178 info.align_offset = pgoff << PAGE_SHIFT;
226try_again: 179 addr = vm_unmapped_area(&info);
227 /* either no address requested or can't fit in requested address hole */ 180 if (!(addr & ~PAGE_MASK))
228 start_addr = addr = mm->free_area_cache; 181 return addr;
229 182 VM_BUG_ON(addr != -ENOMEM);
230 if (addr < len)
231 goto fail;
232
233 addr -= len;
234 do {
235 addr = align_addr(addr, filp, ALIGN_TOPDOWN);
236
237 /*
238 * Lookup failure means no vma is above this address,
239 * else if new region fits below vma->vm_start,
240 * return with success:
241 */
242 vma = find_vma(mm, addr);
243 if (!vma || addr+len <= vma->vm_start)
244 /* remember the address as a hint for next time */
245 return mm->free_area_cache = addr;
246
247 /* remember the largest hole we saw so far */
248 if (addr + mm->cached_hole_size < vma->vm_start)
249 mm->cached_hole_size = vma->vm_start - addr;
250
251 /* try just below the current vma->vm_start */
252 addr = vma->vm_start-len;
253 } while (len < vma->vm_start);
254
255fail:
256 /*
257 * if hint left us with no space for the requested
258 * mapping then try again:
259 */
260 if (start_addr != mm->mmap_base) {
261 mm->free_area_cache = mm->mmap_base;
262 mm->cached_hole_size = 0;
263 goto try_again;
264 }
265 183
266bottomup: 184bottomup:
267 /* 185 /*
@@ -270,14 +188,5 @@ bottomup:
270 * can happen with large stack limits and large mmap() 188 * can happen with large stack limits and large mmap()
271 * allocations. 189 * allocations.
272 */ 190 */
273 mm->cached_hole_size = ~0UL; 191 return arch_get_unmapped_area(filp, addr0, len, pgoff, flags);
274 mm->free_area_cache = TASK_UNMAPPED_BASE;
275 addr = arch_get_unmapped_area(filp, addr0, len, pgoff, flags);
276 /*
277 * Restore the topdown base:
278 */
279 mm->free_area_cache = mm->mmap_base;
280 mm->cached_hole_size = ~0UL;
281
282 return addr;
283} 192}
diff --git a/arch/x86/kernel/topology.c b/arch/x86/kernel/topology.c
index 76ee97709a00..6e60b5fe2244 100644
--- a/arch/x86/kernel/topology.c
+++ b/arch/x86/kernel/topology.c
@@ -30,23 +30,110 @@
30#include <linux/mmzone.h> 30#include <linux/mmzone.h>
31#include <linux/init.h> 31#include <linux/init.h>
32#include <linux/smp.h> 32#include <linux/smp.h>
33#include <linux/irq.h>
33#include <asm/cpu.h> 34#include <asm/cpu.h>
34 35
35static DEFINE_PER_CPU(struct x86_cpu, cpu_devices); 36static DEFINE_PER_CPU(struct x86_cpu, cpu_devices);
36 37
37#ifdef CONFIG_HOTPLUG_CPU 38#ifdef CONFIG_HOTPLUG_CPU
39
40#ifdef CONFIG_BOOTPARAM_HOTPLUG_CPU0
41static int cpu0_hotpluggable = 1;
42#else
43static int cpu0_hotpluggable;
44static int __init enable_cpu0_hotplug(char *str)
45{
46 cpu0_hotpluggable = 1;
47 return 1;
48}
49
50__setup("cpu0_hotplug", enable_cpu0_hotplug);
51#endif
52
53#ifdef CONFIG_DEBUG_HOTPLUG_CPU0
54/*
55 * This function offlines a CPU as early as possible and allows userspace to
56 * boot up without the CPU. The CPU can be onlined back by user after boot.
57 *
58 * This is only called for debugging CPU offline/online feature.
59 */
60int __ref _debug_hotplug_cpu(int cpu, int action)
61{
62 struct device *dev = get_cpu_device(cpu);
63 int ret;
64
65 if (!cpu_is_hotpluggable(cpu))
66 return -EINVAL;
67
68 cpu_hotplug_driver_lock();
69
70 switch (action) {
71 case 0:
72 ret = cpu_down(cpu);
73 if (!ret) {
74 pr_info("CPU %u is now offline\n", cpu);
75 kobject_uevent(&dev->kobj, KOBJ_OFFLINE);
76 } else
77 pr_debug("Can't offline CPU%d.\n", cpu);
78 break;
79 case 1:
80 ret = cpu_up(cpu);
81 if (!ret)
82 kobject_uevent(&dev->kobj, KOBJ_ONLINE);
83 else
84 pr_debug("Can't online CPU%d.\n", cpu);
85 break;
86 default:
87 ret = -EINVAL;
88 }
89
90 cpu_hotplug_driver_unlock();
91
92 return ret;
93}
94
95static int __init debug_hotplug_cpu(void)
96{
97 _debug_hotplug_cpu(0, 0);
98 return 0;
99}
100
101late_initcall_sync(debug_hotplug_cpu);
102#endif /* CONFIG_DEBUG_HOTPLUG_CPU0 */
103
38int __ref arch_register_cpu(int num) 104int __ref arch_register_cpu(int num)
39{ 105{
106 struct cpuinfo_x86 *c = &cpu_data(num);
107
108 /*
109 * Currently CPU0 is only hotpluggable on Intel platforms. Other
110 * vendors can add hotplug support later.
111 */
112 if (c->x86_vendor != X86_VENDOR_INTEL)
113 cpu0_hotpluggable = 0;
114
40 /* 115 /*
41 * CPU0 cannot be offlined due to several 116 * Two known BSP/CPU0 dependencies: Resume from suspend/hibernate
42 * restrictions and assumptions in kernel. This basically 117 * depends on BSP. PIC interrupts depend on BSP.
43 * doesn't add a control file, one cannot attempt to offline
44 * BSP.
45 * 118 *
46 * Also certain PCI quirks require not to enable hotplug control 119 * If the BSP depencies are under control, one can tell kernel to
47 * for all CPU's. 120 * enable BSP hotplug. This basically adds a control file and
121 * one can attempt to offline BSP.
48 */ 122 */
49 if (num) 123 if (num == 0 && cpu0_hotpluggable) {
124 unsigned int irq;
125 /*
126 * We won't take down the boot processor on i386 if some
127 * interrupts only are able to be serviced by the BSP in PIC.
128 */
129 for_each_active_irq(irq) {
130 if (!IO_APIC_IRQ(irq) && irq_has_action(irq)) {
131 cpu0_hotpluggable = 0;
132 break;
133 }
134 }
135 }
136 if (num || cpu0_hotpluggable)
50 per_cpu(cpu_devices, num).cpu.hotpluggable = 1; 137 per_cpu(cpu_devices, num).cpu.hotpluggable = 1;
51 138
52 return register_cpu(&per_cpu(cpu_devices, num).cpu, num); 139 return register_cpu(&per_cpu(cpu_devices, num).cpu, num);
diff --git a/arch/x86/kernel/trace_clock.c b/arch/x86/kernel/trace_clock.c
new file mode 100644
index 000000000000..25b993729f9b
--- /dev/null
+++ b/arch/x86/kernel/trace_clock.c
@@ -0,0 +1,21 @@
1/*
2 * X86 trace clocks
3 */
4#include <asm/trace_clock.h>
5#include <asm/barrier.h>
6#include <asm/msr.h>
7
8/*
9 * trace_clock_x86_tsc(): A clock that is just the cycle counter.
10 *
11 * Unlike the other clocks, this is not in nanoseconds.
12 */
13u64 notrace trace_clock_x86_tsc(void)
14{
15 u64 ret;
16
17 rdtsc_barrier();
18 rdtscll(ret);
19
20 return ret;
21}
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 8276dc6794cc..eb8586693e0b 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -55,7 +55,7 @@
55#include <asm/i387.h> 55#include <asm/i387.h>
56#include <asm/fpu-internal.h> 56#include <asm/fpu-internal.h>
57#include <asm/mce.h> 57#include <asm/mce.h>
58#include <asm/rcu.h> 58#include <asm/context_tracking.h>
59 59
60#include <asm/mach_traps.h> 60#include <asm/mach_traps.h>
61 61
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index cfa5d4f7ca56..06ccb5073a3f 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -77,6 +77,12 @@ unsigned long long
77sched_clock(void) __attribute__((alias("native_sched_clock"))); 77sched_clock(void) __attribute__((alias("native_sched_clock")));
78#endif 78#endif
79 79
80unsigned long long native_read_tsc(void)
81{
82 return __native_read_tsc();
83}
84EXPORT_SYMBOL(native_read_tsc);
85
80int check_tsc_unstable(void) 86int check_tsc_unstable(void)
81{ 87{
82 return tsc_unstable; 88 return tsc_unstable;
diff --git a/arch/x86/kernel/uprobes.c b/arch/x86/kernel/uprobes.c
index aafa5557b396..c71025b67462 100644
--- a/arch/x86/kernel/uprobes.c
+++ b/arch/x86/kernel/uprobes.c
@@ -478,6 +478,11 @@ int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
478 regs->ip = current->utask->xol_vaddr; 478 regs->ip = current->utask->xol_vaddr;
479 pre_xol_rip_insn(auprobe, regs, autask); 479 pre_xol_rip_insn(auprobe, regs, autask);
480 480
481 autask->saved_tf = !!(regs->flags & X86_EFLAGS_TF);
482 regs->flags |= X86_EFLAGS_TF;
483 if (test_tsk_thread_flag(current, TIF_BLOCKSTEP))
484 set_task_blockstep(current, false);
485
481 return 0; 486 return 0;
482} 487}
483 488
@@ -603,6 +608,16 @@ int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
603 if (auprobe->fixups & UPROBE_FIX_CALL) 608 if (auprobe->fixups & UPROBE_FIX_CALL)
604 result = adjust_ret_addr(regs->sp, correction); 609 result = adjust_ret_addr(regs->sp, correction);
605 610
611 /*
612 * arch_uprobe_pre_xol() doesn't save the state of TIF_BLOCKSTEP
613 * so we can get an extra SIGTRAP if we do not clear TF. We need
614 * to examine the opcode to make it right.
615 */
616 if (utask->autask.saved_tf)
617 send_sig(SIGTRAP, current, 0);
618 else if (!(auprobe->fixups & UPROBE_FIX_SETF))
619 regs->flags &= ~X86_EFLAGS_TF;
620
606 return result; 621 return result;
607} 622}
608 623
@@ -647,6 +662,10 @@ void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
647 current->thread.trap_nr = utask->autask.saved_trap_nr; 662 current->thread.trap_nr = utask->autask.saved_trap_nr;
648 handle_riprel_post_xol(auprobe, regs, NULL); 663 handle_riprel_post_xol(auprobe, regs, NULL);
649 instruction_pointer_set(regs, utask->vaddr); 664 instruction_pointer_set(regs, utask->vaddr);
665
666 /* clear TF if it was set by us in arch_uprobe_pre_xol() */
667 if (!utask->autask.saved_tf)
668 regs->flags &= ~X86_EFLAGS_TF;
650} 669}
651 670
652/* 671/*
@@ -676,38 +695,3 @@ bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)
676 send_sig(SIGTRAP, current, 0); 695 send_sig(SIGTRAP, current, 0);
677 return ret; 696 return ret;
678} 697}
679
680void arch_uprobe_enable_step(struct arch_uprobe *auprobe)
681{
682 struct task_struct *task = current;
683 struct arch_uprobe_task *autask = &task->utask->autask;
684 struct pt_regs *regs = task_pt_regs(task);
685
686 autask->saved_tf = !!(regs->flags & X86_EFLAGS_TF);
687
688 regs->flags |= X86_EFLAGS_TF;
689 if (test_tsk_thread_flag(task, TIF_BLOCKSTEP))
690 set_task_blockstep(task, false);
691}
692
693void arch_uprobe_disable_step(struct arch_uprobe *auprobe)
694{
695 struct task_struct *task = current;
696 struct arch_uprobe_task *autask = &task->utask->autask;
697 bool trapped = (task->utask->state == UTASK_SSTEP_TRAPPED);
698 struct pt_regs *regs = task_pt_regs(task);
699 /*
700 * The state of TIF_BLOCKSTEP was not saved so we can get an extra
701 * SIGTRAP if we do not clear TF. We need to examine the opcode to
702 * make it right.
703 */
704 if (unlikely(trapped)) {
705 if (!autask->saved_tf)
706 regs->flags &= ~X86_EFLAGS_TF;
707 } else {
708 if (autask->saved_tf)
709 send_sig(SIGTRAP, task, 0);
710 else if (!(auprobe->fixups & UPROBE_FIX_SETF))
711 regs->flags &= ~X86_EFLAGS_TF;
712 }
713}
diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h
index a10e46016851..58fc51488828 100644
--- a/arch/x86/kvm/cpuid.h
+++ b/arch/x86/kvm/cpuid.h
@@ -24,6 +24,9 @@ static inline bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
24{ 24{
25 struct kvm_cpuid_entry2 *best; 25 struct kvm_cpuid_entry2 *best;
26 26
27 if (!static_cpu_has(X86_FEATURE_XSAVE))
28 return 0;
29
27 best = kvm_find_cpuid_entry(vcpu, 1, 0); 30 best = kvm_find_cpuid_entry(vcpu, 1, 0);
28 return best && (best->ecx & bit(X86_FEATURE_XSAVE)); 31 return best && (best->ecx & bit(X86_FEATURE_XSAVE));
29} 32}
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 39171cb307ea..bba39bfa1c4b 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -426,8 +426,7 @@ static void invalidate_registers(struct x86_emulate_ctxt *ctxt)
426 _ASM_EXTABLE(1b, 3b) \ 426 _ASM_EXTABLE(1b, 3b) \
427 : "=m" ((ctxt)->eflags), "=&r" (_tmp), \ 427 : "=m" ((ctxt)->eflags), "=&r" (_tmp), \
428 "+a" (*rax), "+d" (*rdx), "+qm"(_ex) \ 428 "+a" (*rax), "+d" (*rdx), "+qm"(_ex) \
429 : "i" (EFLAGS_MASK), "m" ((ctxt)->src.val), \ 429 : "i" (EFLAGS_MASK), "m" ((ctxt)->src.val)); \
430 "a" (*rax), "d" (*rdx)); \
431 } while (0) 430 } while (0)
432 431
433/* instruction has only one source operand, destination is implicit (e.g. mul, div, imul, idiv) */ 432/* instruction has only one source operand, destination is implicit (e.g. mul, div, imul, idiv) */
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index ad6b1dd06f8b..f85815945fc6 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -6549,19 +6549,22 @@ static void vmx_cpuid_update(struct kvm_vcpu *vcpu)
6549 } 6549 }
6550 } 6550 }
6551 6551
6552 exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
6553 /* Exposing INVPCID only when PCID is exposed */ 6552 /* Exposing INVPCID only when PCID is exposed */
6554 best = kvm_find_cpuid_entry(vcpu, 0x7, 0); 6553 best = kvm_find_cpuid_entry(vcpu, 0x7, 0);
6555 if (vmx_invpcid_supported() && 6554 if (vmx_invpcid_supported() &&
6556 best && (best->ebx & bit(X86_FEATURE_INVPCID)) && 6555 best && (best->ebx & bit(X86_FEATURE_INVPCID)) &&
6557 guest_cpuid_has_pcid(vcpu)) { 6556 guest_cpuid_has_pcid(vcpu)) {
6557 exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
6558 exec_control |= SECONDARY_EXEC_ENABLE_INVPCID; 6558 exec_control |= SECONDARY_EXEC_ENABLE_INVPCID;
6559 vmcs_write32(SECONDARY_VM_EXEC_CONTROL, 6559 vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
6560 exec_control); 6560 exec_control);
6561 } else { 6561 } else {
6562 exec_control &= ~SECONDARY_EXEC_ENABLE_INVPCID; 6562 if (cpu_has_secondary_exec_ctrls()) {
6563 vmcs_write32(SECONDARY_VM_EXEC_CONTROL, 6563 exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
6564 exec_control); 6564 exec_control &= ~SECONDARY_EXEC_ENABLE_INVPCID;
6565 vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
6566 exec_control);
6567 }
6565 if (best) 6568 if (best)
6566 best->ebx &= ~bit(X86_FEATURE_INVPCID); 6569 best->ebx &= ~bit(X86_FEATURE_INVPCID);
6567 } 6570 }
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 224a7e78cb6c..4f7641756be2 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -5781,6 +5781,9 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5781 int pending_vec, max_bits, idx; 5781 int pending_vec, max_bits, idx;
5782 struct desc_ptr dt; 5782 struct desc_ptr dt;
5783 5783
5784 if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
5785 return -EINVAL;
5786
5784 dt.size = sregs->idt.limit; 5787 dt.size = sregs->idt.limit;
5785 dt.address = sregs->idt.base; 5788 dt.address = sregs->idt.base;
5786 kvm_x86_ops->set_idt(vcpu, &dt); 5789 kvm_x86_ops->set_idt(vcpu, &dt);
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index b00f6785da74..96b2c6697c9d 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -32,7 +32,6 @@ ifeq ($(CONFIG_X86_32),y)
32 lib-y += checksum_32.o 32 lib-y += checksum_32.o
33 lib-y += strstr_32.o 33 lib-y += strstr_32.o
34 lib-y += string_32.o 34 lib-y += string_32.o
35 lib-y += cmpxchg.o
36ifneq ($(CONFIG_X86_CMPXCHG64),y) 35ifneq ($(CONFIG_X86_CMPXCHG64),y)
37 lib-y += cmpxchg8b_emu.o atomic64_386_32.o 36 lib-y += cmpxchg8b_emu.o atomic64_386_32.o
38endif 37endif
diff --git a/arch/x86/lib/cmpxchg.c b/arch/x86/lib/cmpxchg.c
deleted file mode 100644
index 5d619f6df3ee..000000000000
--- a/arch/x86/lib/cmpxchg.c
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * cmpxchg*() fallbacks for CPU not supporting these instructions
3 */
4
5#include <linux/kernel.h>
6#include <linux/smp.h>
7#include <linux/module.h>
8
9#ifndef CONFIG_X86_CMPXCHG
10unsigned long cmpxchg_386_u8(volatile void *ptr, u8 old, u8 new)
11{
12 u8 prev;
13 unsigned long flags;
14
15 /* Poor man's cmpxchg for 386. Unsuitable for SMP */
16 local_irq_save(flags);
17 prev = *(u8 *)ptr;
18 if (prev == old)
19 *(u8 *)ptr = new;
20 local_irq_restore(flags);
21 return prev;
22}
23EXPORT_SYMBOL(cmpxchg_386_u8);
24
25unsigned long cmpxchg_386_u16(volatile void *ptr, u16 old, u16 new)
26{
27 u16 prev;
28 unsigned long flags;
29
30 /* Poor man's cmpxchg for 386. Unsuitable for SMP */
31 local_irq_save(flags);
32 prev = *(u16 *)ptr;
33 if (prev == old)
34 *(u16 *)ptr = new;
35 local_irq_restore(flags);
36 return prev;
37}
38EXPORT_SYMBOL(cmpxchg_386_u16);
39
40unsigned long cmpxchg_386_u32(volatile void *ptr, u32 old, u32 new)
41{
42 u32 prev;
43 unsigned long flags;
44
45 /* Poor man's cmpxchg for 386. Unsuitable for SMP */
46 local_irq_save(flags);
47 prev = *(u32 *)ptr;
48 if (prev == old)
49 *(u32 *)ptr = new;
50 local_irq_restore(flags);
51 return prev;
52}
53EXPORT_SYMBOL(cmpxchg_386_u32);
54#endif
diff --git a/arch/x86/lib/copy_page_64.S b/arch/x86/lib/copy_page_64.S
index 6b34d04d096a..176cca67212b 100644
--- a/arch/x86/lib/copy_page_64.S
+++ b/arch/x86/lib/copy_page_64.S
@@ -5,91 +5,89 @@
5#include <asm/alternative-asm.h> 5#include <asm/alternative-asm.h>
6 6
7 ALIGN 7 ALIGN
8copy_page_c: 8copy_page_rep:
9 CFI_STARTPROC 9 CFI_STARTPROC
10 movl $4096/8,%ecx 10 movl $4096/8, %ecx
11 rep movsq 11 rep movsq
12 ret 12 ret
13 CFI_ENDPROC 13 CFI_ENDPROC
14ENDPROC(copy_page_c) 14ENDPROC(copy_page_rep)
15 15
16/* Don't use streaming store because it's better when the target 16/*
17 ends up in cache. */ 17 * Don't use streaming copy unless the CPU indicates X86_FEATURE_REP_GOOD.
18 18 * Could vary the prefetch distance based on SMP/UP.
19/* Could vary the prefetch distance based on SMP/UP */ 19*/
20 20
21ENTRY(copy_page) 21ENTRY(copy_page)
22 CFI_STARTPROC 22 CFI_STARTPROC
23 subq $2*8,%rsp 23 subq $2*8, %rsp
24 CFI_ADJUST_CFA_OFFSET 2*8 24 CFI_ADJUST_CFA_OFFSET 2*8
25 movq %rbx,(%rsp) 25 movq %rbx, (%rsp)
26 CFI_REL_OFFSET rbx, 0 26 CFI_REL_OFFSET rbx, 0
27 movq %r12,1*8(%rsp) 27 movq %r12, 1*8(%rsp)
28 CFI_REL_OFFSET r12, 1*8 28 CFI_REL_OFFSET r12, 1*8
29 29
30 movl $(4096/64)-5,%ecx 30 movl $(4096/64)-5, %ecx
31 .p2align 4 31 .p2align 4
32.Loop64: 32.Loop64:
33 dec %rcx 33 dec %rcx
34 34 movq 0x8*0(%rsi), %rax
35 movq (%rsi), %rax 35 movq 0x8*1(%rsi), %rbx
36 movq 8 (%rsi), %rbx 36 movq 0x8*2(%rsi), %rdx
37 movq 16 (%rsi), %rdx 37 movq 0x8*3(%rsi), %r8
38 movq 24 (%rsi), %r8 38 movq 0x8*4(%rsi), %r9
39 movq 32 (%rsi), %r9 39 movq 0x8*5(%rsi), %r10
40 movq 40 (%rsi), %r10 40 movq 0x8*6(%rsi), %r11
41 movq 48 (%rsi), %r11 41 movq 0x8*7(%rsi), %r12
42 movq 56 (%rsi), %r12
43 42
44 prefetcht0 5*64(%rsi) 43 prefetcht0 5*64(%rsi)
45 44
46 movq %rax, (%rdi) 45 movq %rax, 0x8*0(%rdi)
47 movq %rbx, 8 (%rdi) 46 movq %rbx, 0x8*1(%rdi)
48 movq %rdx, 16 (%rdi) 47 movq %rdx, 0x8*2(%rdi)
49 movq %r8, 24 (%rdi) 48 movq %r8, 0x8*3(%rdi)
50 movq %r9, 32 (%rdi) 49 movq %r9, 0x8*4(%rdi)
51 movq %r10, 40 (%rdi) 50 movq %r10, 0x8*5(%rdi)
52 movq %r11, 48 (%rdi) 51 movq %r11, 0x8*6(%rdi)
53 movq %r12, 56 (%rdi) 52 movq %r12, 0x8*7(%rdi)
54 53
55 leaq 64 (%rsi), %rsi 54 leaq 64 (%rsi), %rsi
56 leaq 64 (%rdi), %rdi 55 leaq 64 (%rdi), %rdi
57 56
58 jnz .Loop64 57 jnz .Loop64
59 58
60 movl $5,%ecx 59 movl $5, %ecx
61 .p2align 4 60 .p2align 4
62.Loop2: 61.Loop2:
63 decl %ecx 62 decl %ecx
64 63
65 movq (%rsi), %rax 64 movq 0x8*0(%rsi), %rax
66 movq 8 (%rsi), %rbx 65 movq 0x8*1(%rsi), %rbx
67 movq 16 (%rsi), %rdx 66 movq 0x8*2(%rsi), %rdx
68 movq 24 (%rsi), %r8 67 movq 0x8*3(%rsi), %r8
69 movq 32 (%rsi), %r9 68 movq 0x8*4(%rsi), %r9
70 movq 40 (%rsi), %r10 69 movq 0x8*5(%rsi), %r10
71 movq 48 (%rsi), %r11 70 movq 0x8*6(%rsi), %r11
72 movq 56 (%rsi), %r12 71 movq 0x8*7(%rsi), %r12
73 72
74 movq %rax, (%rdi) 73 movq %rax, 0x8*0(%rdi)
75 movq %rbx, 8 (%rdi) 74 movq %rbx, 0x8*1(%rdi)
76 movq %rdx, 16 (%rdi) 75 movq %rdx, 0x8*2(%rdi)
77 movq %r8, 24 (%rdi) 76 movq %r8, 0x8*3(%rdi)
78 movq %r9, 32 (%rdi) 77 movq %r9, 0x8*4(%rdi)
79 movq %r10, 40 (%rdi) 78 movq %r10, 0x8*5(%rdi)
80 movq %r11, 48 (%rdi) 79 movq %r11, 0x8*6(%rdi)
81 movq %r12, 56 (%rdi) 80 movq %r12, 0x8*7(%rdi)
82 81
83 leaq 64(%rdi),%rdi 82 leaq 64(%rdi), %rdi
84 leaq 64(%rsi),%rsi 83 leaq 64(%rsi), %rsi
85
86 jnz .Loop2 84 jnz .Loop2
87 85
88 movq (%rsp),%rbx 86 movq (%rsp), %rbx
89 CFI_RESTORE rbx 87 CFI_RESTORE rbx
90 movq 1*8(%rsp),%r12 88 movq 1*8(%rsp), %r12
91 CFI_RESTORE r12 89 CFI_RESTORE r12
92 addq $2*8,%rsp 90 addq $2*8, %rsp
93 CFI_ADJUST_CFA_OFFSET -2*8 91 CFI_ADJUST_CFA_OFFSET -2*8
94 ret 92 ret
95.Lcopy_page_end: 93.Lcopy_page_end:
@@ -103,7 +101,7 @@ ENDPROC(copy_page)
103 101
104 .section .altinstr_replacement,"ax" 102 .section .altinstr_replacement,"ax"
1051: .byte 0xeb /* jmp <disp8> */ 1031: .byte 0xeb /* jmp <disp8> */
106 .byte (copy_page_c - copy_page) - (2f - 1b) /* offset */ 104 .byte (copy_page_rep - copy_page) - (2f - 1b) /* offset */
1072: 1052:
108 .previous 106 .previous
109 .section .altinstructions,"a" 107 .section .altinstructions,"a"
diff --git a/arch/x86/lib/usercopy_32.c b/arch/x86/lib/usercopy_32.c
index 98f6d6b68f5a..f0312d746402 100644
--- a/arch/x86/lib/usercopy_32.c
+++ b/arch/x86/lib/usercopy_32.c
@@ -570,63 +570,6 @@ do { \
570unsigned long __copy_to_user_ll(void __user *to, const void *from, 570unsigned long __copy_to_user_ll(void __user *to, const void *from,
571 unsigned long n) 571 unsigned long n)
572{ 572{
573#ifndef CONFIG_X86_WP_WORKS_OK
574 if (unlikely(boot_cpu_data.wp_works_ok == 0) &&
575 ((unsigned long)to) < TASK_SIZE) {
576 /*
577 * When we are in an atomic section (see
578 * mm/filemap.c:file_read_actor), return the full
579 * length to take the slow path.
580 */
581 if (in_atomic())
582 return n;
583
584 /*
585 * CPU does not honor the WP bit when writing
586 * from supervisory mode, and due to preemption or SMP,
587 * the page tables can change at any time.
588 * Do it manually. Manfred <manfred@colorfullife.com>
589 */
590 while (n) {
591 unsigned long offset = ((unsigned long)to)%PAGE_SIZE;
592 unsigned long len = PAGE_SIZE - offset;
593 int retval;
594 struct page *pg;
595 void *maddr;
596
597 if (len > n)
598 len = n;
599
600survive:
601 down_read(&current->mm->mmap_sem);
602 retval = get_user_pages(current, current->mm,
603 (unsigned long)to, 1, 1, 0, &pg, NULL);
604
605 if (retval == -ENOMEM && is_global_init(current)) {
606 up_read(&current->mm->mmap_sem);
607 congestion_wait(BLK_RW_ASYNC, HZ/50);
608 goto survive;
609 }
610
611 if (retval != 1) {
612 up_read(&current->mm->mmap_sem);
613 break;
614 }
615
616 maddr = kmap_atomic(pg);
617 memcpy(maddr + offset, from, len);
618 kunmap_atomic(maddr);
619 set_page_dirty_lock(pg);
620 put_page(pg);
621 up_read(&current->mm->mmap_sem);
622
623 from += len;
624 to += len;
625 n -= len;
626 }
627 return n;
628 }
629#endif
630 stac(); 573 stac();
631 if (movsl_is_ok(to, from, n)) 574 if (movsl_is_ok(to, from, n))
632 __copy_user(to, from, n); 575 __copy_user(to, from, n);
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index 8e13ecb41bee..7a529cbab7ad 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -18,7 +18,7 @@
18#include <asm/pgalloc.h> /* pgd_*(), ... */ 18#include <asm/pgalloc.h> /* pgd_*(), ... */
19#include <asm/kmemcheck.h> /* kmemcheck_*(), ... */ 19#include <asm/kmemcheck.h> /* kmemcheck_*(), ... */
20#include <asm/fixmap.h> /* VSYSCALL_START */ 20#include <asm/fixmap.h> /* VSYSCALL_START */
21#include <asm/rcu.h> /* exception_enter(), ... */ 21#include <asm/context_tracking.h> /* exception_enter(), ... */
22 22
23/* 23/*
24 * Page fault error code bits: 24 * Page fault error code bits:
diff --git a/arch/x86/mm/hugetlbpage.c b/arch/x86/mm/hugetlbpage.c
index 937bff5cdaa7..ae1aa71d0115 100644
--- a/arch/x86/mm/hugetlbpage.c
+++ b/arch/x86/mm/hugetlbpage.c
@@ -274,42 +274,15 @@ static unsigned long hugetlb_get_unmapped_area_bottomup(struct file *file,
274 unsigned long pgoff, unsigned long flags) 274 unsigned long pgoff, unsigned long flags)
275{ 275{
276 struct hstate *h = hstate_file(file); 276 struct hstate *h = hstate_file(file);
277 struct mm_struct *mm = current->mm; 277 struct vm_unmapped_area_info info;
278 struct vm_area_struct *vma; 278
279 unsigned long start_addr; 279 info.flags = 0;
280 280 info.length = len;
281 if (len > mm->cached_hole_size) { 281 info.low_limit = TASK_UNMAPPED_BASE;
282 start_addr = mm->free_area_cache; 282 info.high_limit = TASK_SIZE;
283 } else { 283 info.align_mask = PAGE_MASK & ~huge_page_mask(h);
284 start_addr = TASK_UNMAPPED_BASE; 284 info.align_offset = 0;
285 mm->cached_hole_size = 0; 285 return vm_unmapped_area(&info);
286 }
287
288full_search:
289 addr = ALIGN(start_addr, huge_page_size(h));
290
291 for (vma = find_vma(mm, addr); ; vma = vma->vm_next) {
292 /* At this point: (!vma || addr < vma->vm_end). */
293 if (TASK_SIZE - len < addr) {
294 /*
295 * Start a new search - just in case we missed
296 * some holes.
297 */
298 if (start_addr != TASK_UNMAPPED_BASE) {
299 start_addr = TASK_UNMAPPED_BASE;
300 mm->cached_hole_size = 0;
301 goto full_search;
302 }
303 return -ENOMEM;
304 }
305 if (!vma || addr + len <= vma->vm_start) {
306 mm->free_area_cache = addr + len;
307 return addr;
308 }
309 if (addr + mm->cached_hole_size < vma->vm_start)
310 mm->cached_hole_size = vma->vm_start - addr;
311 addr = ALIGN(vma->vm_end, huge_page_size(h));
312 }
313} 286}
314 287
315static unsigned long hugetlb_get_unmapped_area_topdown(struct file *file, 288static unsigned long hugetlb_get_unmapped_area_topdown(struct file *file,
@@ -317,83 +290,30 @@ static unsigned long hugetlb_get_unmapped_area_topdown(struct file *file,
317 unsigned long pgoff, unsigned long flags) 290 unsigned long pgoff, unsigned long flags)
318{ 291{
319 struct hstate *h = hstate_file(file); 292 struct hstate *h = hstate_file(file);
320 struct mm_struct *mm = current->mm; 293 struct vm_unmapped_area_info info;
321 struct vm_area_struct *vma; 294 unsigned long addr;
322 unsigned long base = mm->mmap_base;
323 unsigned long addr = addr0;
324 unsigned long largest_hole = mm->cached_hole_size;
325 unsigned long start_addr;
326
327 /* don't allow allocations above current base */
328 if (mm->free_area_cache > base)
329 mm->free_area_cache = base;
330
331 if (len <= largest_hole) {
332 largest_hole = 0;
333 mm->free_area_cache = base;
334 }
335try_again:
336 start_addr = mm->free_area_cache;
337
338 /* make sure it can fit in the remaining address space */
339 if (mm->free_area_cache < len)
340 goto fail;
341
342 /* either no address requested or can't fit in requested address hole */
343 addr = (mm->free_area_cache - len) & huge_page_mask(h);
344 do {
345 /*
346 * Lookup failure means no vma is above this address,
347 * i.e. return with success:
348 */
349 vma = find_vma(mm, addr);
350 if (!vma)
351 return addr;
352 295
353 if (addr + len <= vma->vm_start) { 296 info.flags = VM_UNMAPPED_AREA_TOPDOWN;
354 /* remember the address as a hint for next time */ 297 info.length = len;
355 mm->cached_hole_size = largest_hole; 298 info.low_limit = PAGE_SIZE;
356 return (mm->free_area_cache = addr); 299 info.high_limit = current->mm->mmap_base;
357 } else if (mm->free_area_cache == vma->vm_end) { 300 info.align_mask = PAGE_MASK & ~huge_page_mask(h);
358 /* pull free_area_cache down to the first hole */ 301 info.align_offset = 0;
359 mm->free_area_cache = vma->vm_start; 302 addr = vm_unmapped_area(&info);
360 mm->cached_hole_size = largest_hole;
361 }
362 303
363 /* remember the largest hole we saw so far */
364 if (addr + largest_hole < vma->vm_start)
365 largest_hole = vma->vm_start - addr;
366
367 /* try just below the current vma->vm_start */
368 addr = (vma->vm_start - len) & huge_page_mask(h);
369 } while (len <= vma->vm_start);
370
371fail:
372 /*
373 * if hint left us with no space for the requested
374 * mapping then try again:
375 */
376 if (start_addr != base) {
377 mm->free_area_cache = base;
378 largest_hole = 0;
379 goto try_again;
380 }
381 /* 304 /*
382 * A failed mmap() very likely causes application failure, 305 * A failed mmap() very likely causes application failure,
383 * so fall back to the bottom-up function here. This scenario 306 * so fall back to the bottom-up function here. This scenario
384 * can happen with large stack limits and large mmap() 307 * can happen with large stack limits and large mmap()
385 * allocations. 308 * allocations.
386 */ 309 */
387 mm->free_area_cache = TASK_UNMAPPED_BASE; 310 if (addr & ~PAGE_MASK) {
388 mm->cached_hole_size = ~0UL; 311 VM_BUG_ON(addr != -ENOMEM);
389 addr = hugetlb_get_unmapped_area_bottomup(file, addr0, 312 info.flags = 0;
390 len, pgoff, flags); 313 info.low_limit = TASK_UNMAPPED_BASE;
391 314 info.high_limit = TASK_SIZE;
392 /* 315 addr = vm_unmapped_area(&info);
393 * Restore the topdown base: 316 }
394 */
395 mm->free_area_cache = base;
396 mm->cached_hole_size = ~0UL;
397 317
398 return addr; 318 return addr;
399} 319}
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index 11a58001b4ce..745d66b843c8 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -715,10 +715,7 @@ static void __init test_wp_bit(void)
715 715
716 if (!boot_cpu_data.wp_works_ok) { 716 if (!boot_cpu_data.wp_works_ok) {
717 printk(KERN_CONT "No.\n"); 717 printk(KERN_CONT "No.\n");
718#ifdef CONFIG_X86_WP_WORKS_OK 718 panic("Linux doesn't support CPUs with broken WP.");
719 panic(
720 "This kernel doesn't support CPU's with broken WP. Recompile it for a 386!");
721#endif
722 } else { 719 } else {
723 printk(KERN_CONT "Ok.\n"); 720 printk(KERN_CONT "Ok.\n");
724 } 721 }
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 0777f042e400..13a6b29e2e5d 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -104,7 +104,7 @@ static void flush_tlb_func(void *info)
104 return; 104 return;
105 105
106 if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_OK) { 106 if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_OK) {
107 if (f->flush_end == TLB_FLUSH_ALL || !cpu_has_invlpg) 107 if (f->flush_end == TLB_FLUSH_ALL)
108 local_flush_tlb(); 108 local_flush_tlb();
109 else if (!f->flush_end) 109 else if (!f->flush_end)
110 __flush_tlb_single(f->flush_start); 110 __flush_tlb_single(f->flush_start);
@@ -197,7 +197,7 @@ void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
197 } 197 }
198 198
199 if (end == TLB_FLUSH_ALL || tlb_flushall_shift == -1 199 if (end == TLB_FLUSH_ALL || tlb_flushall_shift == -1
200 || vmflag == VM_HUGETLB) { 200 || vmflag & VM_HUGETLB) {
201 local_flush_tlb(); 201 local_flush_tlb();
202 goto flush_all; 202 goto flush_all;
203 } 203 }
@@ -337,10 +337,8 @@ static const struct file_operations fops_tlbflush = {
337 337
338static int __cpuinit create_tlb_flushall_shift(void) 338static int __cpuinit create_tlb_flushall_shift(void)
339{ 339{
340 if (cpu_has_invlpg) { 340 debugfs_create_file("tlb_flushall_shift", S_IRUSR | S_IWUSR,
341 debugfs_create_file("tlb_flushall_shift", S_IRUSR | S_IWUSR, 341 arch_debugfs_dir, NULL, &fops_tlbflush);
342 arch_debugfs_dir, NULL, &fops_tlbflush);
343 }
344 return 0; 342 return 0;
345} 343}
346late_initcall(create_tlb_flushall_shift); 344late_initcall(create_tlb_flushall_shift);
diff --git a/arch/x86/pci/ce4100.c b/arch/x86/pci/ce4100.c
index 41bd2a2d2c50..b914e20b5a00 100644
--- a/arch/x86/pci/ce4100.c
+++ b/arch/x86/pci/ce4100.c
@@ -115,6 +115,16 @@ static void sata_revid_read(struct sim_dev_reg *reg, u32 *value)
115 reg_read(reg, value); 115 reg_read(reg, value);
116} 116}
117 117
118static void reg_noirq_read(struct sim_dev_reg *reg, u32 *value)
119{
120 unsigned long flags;
121
122 raw_spin_lock_irqsave(&pci_config_lock, flags);
123 /* force interrupt pin value to 0 */
124 *value = reg->sim_reg.value & 0xfff00ff;
125 raw_spin_unlock_irqrestore(&pci_config_lock, flags);
126}
127
118static struct sim_dev_reg bus1_fixups[] = { 128static struct sim_dev_reg bus1_fixups[] = {
119 DEFINE_REG(2, 0, 0x10, (16*MB), reg_init, reg_read, reg_write) 129 DEFINE_REG(2, 0, 0x10, (16*MB), reg_init, reg_read, reg_write)
120 DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write) 130 DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write)
@@ -144,6 +154,7 @@ static struct sim_dev_reg bus1_fixups[] = {
144 DEFINE_REG(11, 5, 0x10, (64*KB), reg_init, reg_read, reg_write) 154 DEFINE_REG(11, 5, 0x10, (64*KB), reg_init, reg_read, reg_write)
145 DEFINE_REG(11, 6, 0x10, (256), reg_init, reg_read, reg_write) 155 DEFINE_REG(11, 6, 0x10, (256), reg_init, reg_read, reg_write)
146 DEFINE_REG(11, 7, 0x10, (64*KB), reg_init, reg_read, reg_write) 156 DEFINE_REG(11, 7, 0x10, (64*KB), reg_init, reg_read, reg_write)
157 DEFINE_REG(11, 7, 0x3c, 256, reg_init, reg_noirq_read, reg_write)
147 DEFINE_REG(12, 0, 0x10, (128*KB), reg_init, reg_read, reg_write) 158 DEFINE_REG(12, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
148 DEFINE_REG(12, 0, 0x14, (256), reg_init, reg_read, reg_write) 159 DEFINE_REG(12, 0, 0x14, (256), reg_init, reg_read, reg_write)
149 DEFINE_REG(12, 1, 0x10, (1024), reg_init, reg_read, reg_write) 160 DEFINE_REG(12, 1, 0x10, (1024), reg_init, reg_read, reg_write)
@@ -161,8 +172,10 @@ static struct sim_dev_reg bus1_fixups[] = {
161 DEFINE_REG(16, 0, 0x10, (64*KB), reg_init, reg_read, reg_write) 172 DEFINE_REG(16, 0, 0x10, (64*KB), reg_init, reg_read, reg_write)
162 DEFINE_REG(16, 0, 0x14, (64*MB), reg_init, reg_read, reg_write) 173 DEFINE_REG(16, 0, 0x14, (64*MB), reg_init, reg_read, reg_write)
163 DEFINE_REG(16, 0, 0x18, (64*MB), reg_init, reg_read, reg_write) 174 DEFINE_REG(16, 0, 0x18, (64*MB), reg_init, reg_read, reg_write)
175 DEFINE_REG(16, 0, 0x3c, 256, reg_init, reg_noirq_read, reg_write)
164 DEFINE_REG(17, 0, 0x10, (128*KB), reg_init, reg_read, reg_write) 176 DEFINE_REG(17, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
165 DEFINE_REG(18, 0, 0x10, (1*KB), reg_init, reg_read, reg_write) 177 DEFINE_REG(18, 0, 0x10, (1*KB), reg_init, reg_read, reg_write)
178 DEFINE_REG(18, 0, 0x3c, 256, reg_init, reg_noirq_read, reg_write)
166}; 179};
167 180
168static void __init init_sim_regs(void) 181static void __init init_sim_regs(void)
diff --git a/arch/x86/platform/ce4100/ce4100.c b/arch/x86/platform/ce4100/ce4100.c
index 4c61b52191eb..f8ab4945892e 100644
--- a/arch/x86/platform/ce4100/ce4100.c
+++ b/arch/x86/platform/ce4100/ce4100.c
@@ -21,12 +21,25 @@
21#include <asm/i8259.h> 21#include <asm/i8259.h>
22#include <asm/io.h> 22#include <asm/io.h>
23#include <asm/io_apic.h> 23#include <asm/io_apic.h>
24#include <asm/emergency-restart.h>
24 25
25static int ce4100_i8042_detect(void) 26static int ce4100_i8042_detect(void)
26{ 27{
27 return 0; 28 return 0;
28} 29}
29 30
31/*
32 * The CE4100 platform has an internal 8051 Microcontroller which is
33 * responsible for signaling to the external Power Management Unit the
34 * intention to reset, reboot or power off the system. This 8051 device has
35 * its command register mapped at I/O port 0xcf9 and the value 0x4 is used
36 * to power off the system.
37 */
38static void ce4100_power_off(void)
39{
40 outb(0x4, 0xcf9);
41}
42
30#ifdef CONFIG_SERIAL_8250 43#ifdef CONFIG_SERIAL_8250
31 44
32static unsigned int mem_serial_in(struct uart_port *p, int offset) 45static unsigned int mem_serial_in(struct uart_port *p, int offset)
@@ -92,8 +105,11 @@ static void ce4100_serial_fixup(int port, struct uart_port *up,
92 up->membase = 105 up->membase =
93 (void __iomem *)__fix_to_virt(FIX_EARLYCON_MEM_BASE); 106 (void __iomem *)__fix_to_virt(FIX_EARLYCON_MEM_BASE);
94 up->membase += up->mapbase & ~PAGE_MASK; 107 up->membase += up->mapbase & ~PAGE_MASK;
108 up->mapbase += port * 0x100;
109 up->membase += port * 0x100;
95 up->iotype = UPIO_MEM32; 110 up->iotype = UPIO_MEM32;
96 up->regshift = 2; 111 up->regshift = 2;
112 up->irq = 4;
97 } 113 }
98#endif 114#endif
99 up->iobase = 0; 115 up->iobase = 0;
@@ -139,8 +155,19 @@ void __init x86_ce4100_early_setup(void)
139 x86_init.mpparse.find_smp_config = x86_init_noop; 155 x86_init.mpparse.find_smp_config = x86_init_noop;
140 x86_init.pci.init = ce4100_pci_init; 156 x86_init.pci.init = ce4100_pci_init;
141 157
158 /*
159 * By default, the reboot method is ACPI which is supported by the
160 * CE4100 bootloader CEFDK using FADT.ResetReg Address and ResetValue
161 * the bootloader will however issue a system power off instead of
162 * reboot. By using BOOT_KBD we ensure proper system reboot as
163 * expected.
164 */
165 reboot_type = BOOT_KBD;
166
142#ifdef CONFIG_X86_IO_APIC 167#ifdef CONFIG_X86_IO_APIC
143 x86_init.pci.init_irq = sdv_pci_init; 168 x86_init.pci.init_irq = sdv_pci_init;
144 x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc_nocheck; 169 x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc_nocheck;
145#endif 170#endif
171
172 pm_power_off = ce4100_power_off;
146} 173}
diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c
index 218cdb16163c..120cee1c3f8d 100644
--- a/arch/x86/power/cpu.c
+++ b/arch/x86/power/cpu.c
@@ -21,6 +21,7 @@
21#include <asm/suspend.h> 21#include <asm/suspend.h>
22#include <asm/debugreg.h> 22#include <asm/debugreg.h>
23#include <asm/fpu-internal.h> /* pcntxt_mask */ 23#include <asm/fpu-internal.h> /* pcntxt_mask */
24#include <asm/cpu.h>
24 25
25#ifdef CONFIG_X86_32 26#ifdef CONFIG_X86_32
26static struct saved_context saved_context; 27static struct saved_context saved_context;
@@ -237,3 +238,84 @@ void restore_processor_state(void)
237#ifdef CONFIG_X86_32 238#ifdef CONFIG_X86_32
238EXPORT_SYMBOL(restore_processor_state); 239EXPORT_SYMBOL(restore_processor_state);
239#endif 240#endif
241
242/*
243 * When bsp_check() is called in hibernate and suspend, cpu hotplug
244 * is disabled already. So it's unnessary to handle race condition between
245 * cpumask query and cpu hotplug.
246 */
247static int bsp_check(void)
248{
249 if (cpumask_first(cpu_online_mask) != 0) {
250 pr_warn("CPU0 is offline.\n");
251 return -ENODEV;
252 }
253
254 return 0;
255}
256
257static int bsp_pm_callback(struct notifier_block *nb, unsigned long action,
258 void *ptr)
259{
260 int ret = 0;
261
262 switch (action) {
263 case PM_SUSPEND_PREPARE:
264 case PM_HIBERNATION_PREPARE:
265 ret = bsp_check();
266 break;
267#ifdef CONFIG_DEBUG_HOTPLUG_CPU0
268 case PM_RESTORE_PREPARE:
269 /*
270 * When system resumes from hibernation, online CPU0 because
271 * 1. it's required for resume and
272 * 2. the CPU was online before hibernation
273 */
274 if (!cpu_online(0))
275 _debug_hotplug_cpu(0, 1);
276 break;
277 case PM_POST_RESTORE:
278 /*
279 * When a resume really happens, this code won't be called.
280 *
281 * This code is called only when user space hibernation software
282 * prepares for snapshot device during boot time. So we just
283 * call _debug_hotplug_cpu() to restore to CPU0's state prior to
284 * preparing the snapshot device.
285 *
286 * This works for normal boot case in our CPU0 hotplug debug
287 * mode, i.e. CPU0 is offline and user mode hibernation
288 * software initializes during boot time.
289 *
290 * If CPU0 is online and user application accesses snapshot
291 * device after boot time, this will offline CPU0 and user may
292 * see different CPU0 state before and after accessing
293 * the snapshot device. But hopefully this is not a case when
294 * user debugging CPU0 hotplug. Even if users hit this case,
295 * they can easily online CPU0 back.
296 *
297 * To simplify this debug code, we only consider normal boot
298 * case. Otherwise we need to remember CPU0's state and restore
299 * to that state and resolve racy conditions etc.
300 */
301 _debug_hotplug_cpu(0, 0);
302 break;
303#endif
304 default:
305 break;
306 }
307 return notifier_from_errno(ret);
308}
309
310static int __init bsp_pm_check_init(void)
311{
312 /*
313 * Set this bsp_pm_callback as lower priority than
314 * cpu_hotplug_pm_callback. So cpu_hotplug_pm_callback will be called
315 * earlier to disable cpu hotplug before bsp online check.
316 */
317 pm_notifier(bsp_pm_callback, -INT_MAX);
318 return 0;
319}
320
321core_initcall(bsp_pm_check_init);
diff --git a/arch/x86/tools/gen-insn-attr-x86.awk b/arch/x86/tools/gen-insn-attr-x86.awk
index ddcf39b1a18d..e6773dc8ac41 100644
--- a/arch/x86/tools/gen-insn-attr-x86.awk
+++ b/arch/x86/tools/gen-insn-attr-x86.awk
@@ -356,7 +356,7 @@ END {
356 exit 1 356 exit 1
357 # print escape opcode map's array 357 # print escape opcode map's array
358 print "/* Escape opcode map array */" 358 print "/* Escape opcode map array */"
359 print "const insn_attr_t const *inat_escape_tables[INAT_ESC_MAX + 1]" \ 359 print "const insn_attr_t * const inat_escape_tables[INAT_ESC_MAX + 1]" \
360 "[INAT_LSTPFX_MAX + 1] = {" 360 "[INAT_LSTPFX_MAX + 1] = {"
361 for (i = 0; i < geid; i++) 361 for (i = 0; i < geid; i++)
362 for (j = 0; j < max_lprefix; j++) 362 for (j = 0; j < max_lprefix; j++)
@@ -365,7 +365,7 @@ END {
365 print "};\n" 365 print "};\n"
366 # print group opcode map's array 366 # print group opcode map's array
367 print "/* Group opcode map array */" 367 print "/* Group opcode map array */"
368 print "const insn_attr_t const *inat_group_tables[INAT_GRP_MAX + 1]"\ 368 print "const insn_attr_t * const inat_group_tables[INAT_GRP_MAX + 1]"\
369 "[INAT_LSTPFX_MAX + 1] = {" 369 "[INAT_LSTPFX_MAX + 1] = {"
370 for (i = 0; i < ggid; i++) 370 for (i = 0; i < ggid; i++)
371 for (j = 0; j < max_lprefix; j++) 371 for (j = 0; j < max_lprefix; j++)
@@ -374,7 +374,7 @@ END {
374 print "};\n" 374 print "};\n"
375 # print AVX opcode map's array 375 # print AVX opcode map's array
376 print "/* AVX opcode map array */" 376 print "/* AVX opcode map array */"
377 print "const insn_attr_t const *inat_avx_tables[X86_VEX_M_MAX + 1]"\ 377 print "const insn_attr_t * const inat_avx_tables[X86_VEX_M_MAX + 1]"\
378 "[INAT_LSTPFX_MAX + 1] = {" 378 "[INAT_LSTPFX_MAX + 1] = {"
379 for (i = 0; i < gaid; i++) 379 for (i = 0; i < gaid; i++)
380 for (j = 0; j < max_lprefix; j++) 380 for (j = 0; j < max_lprefix; j++)
diff --git a/arch/x86/um/Kconfig b/arch/x86/um/Kconfig
index 07611759ce35..b0c30dae9f55 100644
--- a/arch/x86/um/Kconfig
+++ b/arch/x86/um/Kconfig
@@ -31,7 +31,7 @@ config X86_64
31 select MODULES_USE_ELF_RELA 31 select MODULES_USE_ELF_RELA
32 32
33config RWSEM_XCHGADD_ALGORITHM 33config RWSEM_XCHGADD_ALGORITHM
34 def_bool X86_XADD && 64BIT 34 def_bool 64BIT
35 35
36config RWSEM_GENERIC_SPINLOCK 36config RWSEM_GENERIC_SPINLOCK
37 def_bool !RWSEM_XCHGADD_ALGORITHM 37 def_bool !RWSEM_XCHGADD_ALGORITHM
diff --git a/arch/x86/vdso/vma.c b/arch/x86/vdso/vma.c
index 00aaf047b39f..431e87544411 100644
--- a/arch/x86/vdso/vma.c
+++ b/arch/x86/vdso/vma.c
@@ -141,7 +141,7 @@ static unsigned long vdso_addr(unsigned long start, unsigned len)
141 * unaligned here as a result of stack start randomization. 141 * unaligned here as a result of stack start randomization.
142 */ 142 */
143 addr = PAGE_ALIGN(addr); 143 addr = PAGE_ALIGN(addr);
144 addr = align_addr(addr, NULL, ALIGN_VDSO); 144 addr = align_vdso_addr(addr);
145 145
146 return addr; 146 return addr;
147} 147}
diff --git a/arch/x86/xen/Kconfig b/arch/x86/xen/Kconfig
index fdce49c7aff6..9a6775c9ddca 100644
--- a/arch/x86/xen/Kconfig
+++ b/arch/x86/xen/Kconfig
@@ -7,7 +7,7 @@ config XEN
7 select PARAVIRT 7 select PARAVIRT
8 select PARAVIRT_CLOCK 8 select PARAVIRT_CLOCK
9 depends on X86_64 || (X86_32 && X86_PAE && !X86_VISWS) 9 depends on X86_64 || (X86_32 && X86_PAE && !X86_VISWS)
10 depends on X86_CMPXCHG && X86_TSC 10 depends on X86_TSC
11 help 11 help
12 This is the Linux Xen port. Enabling this will allow the 12 This is the Linux Xen port. Enabling this will allow the
13 kernel to boot in a paravirtualized environment under the 13 kernel to boot in a paravirtualized environment under the
diff --git a/arch/xtensa/include/asm/Kbuild b/arch/xtensa/include/asm/Kbuild
index 6d1302789995..095f0a2244f7 100644
--- a/arch/xtensa/include/asm/Kbuild
+++ b/arch/xtensa/include/asm/Kbuild
@@ -25,4 +25,5 @@ generic-y += siginfo.h
25generic-y += statfs.h 25generic-y += statfs.h
26generic-y += termios.h 26generic-y += termios.h
27generic-y += topology.h 27generic-y += topology.h
28generic-y += trace_clock.h
28generic-y += xor.h 29generic-y += xor.h
diff --git a/arch/xtensa/include/uapi/asm/ioctls.h b/arch/xtensa/include/uapi/asm/ioctls.h
index 2aa4cd9f0cec..b4cb1100c0fb 100644
--- a/arch/xtensa/include/uapi/asm/ioctls.h
+++ b/arch/xtensa/include/uapi/asm/ioctls.h
@@ -101,6 +101,9 @@
101#define TIOCGDEV _IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */ 101#define TIOCGDEV _IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */
102#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */ 102#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */
103#define TIOCVHANGUP _IO('T', 0x37) 103#define TIOCVHANGUP _IO('T', 0x37)
104#define TIOCGPKT _IOR('T', 0x38, int) /* Get packet mode state */
105#define TIOCGPTLCK _IOR('T', 0x39, int) /* Get Pty lock state */
106#define TIOCGEXCL _IOR('T', 0x40, int) /* Get exclusive mode state */
104 107
105#define TIOCSERCONFIG _IO('T', 83) 108#define TIOCSERCONFIG _IO('T', 83)
106#define TIOCSERGWILD _IOR('T', 84, int) 109#define TIOCSERGWILD _IOR('T', 84, int)
diff --git a/arch/xtensa/include/uapi/asm/mman.h b/arch/xtensa/include/uapi/asm/mman.h
index 25bc6c1309c3..00eed6786d7e 100644
--- a/arch/xtensa/include/uapi/asm/mman.h
+++ b/arch/xtensa/include/uapi/asm/mman.h
@@ -93,4 +93,15 @@
93/* compatibility flags */ 93/* compatibility flags */
94#define MAP_FILE 0 94#define MAP_FILE 0
95 95
96/*
97 * When MAP_HUGETLB is set bits [26:31] encode the log2 of the huge page size.
98 * This gives us 6 bits, which is enough until someone invents 128 bit address
99 * spaces.
100 *
101 * Assume these are all power of twos.
102 * When 0 use the default page size.
103 */
104#define MAP_HUGE_SHIFT 26
105#define MAP_HUGE_MASK 0x3f
106
96#endif /* _XTENSA_MMAN_H */ 107#endif /* _XTENSA_MMAN_H */
diff --git a/arch/xtensa/platforms/iss/console.c b/arch/xtensa/platforms/iss/console.c
index 7e74895eee04..8207a119eee9 100644
--- a/arch/xtensa/platforms/iss/console.c
+++ b/arch/xtensa/platforms/iss/console.c
@@ -221,6 +221,7 @@ static __exit void rs_exit(void)
221 printk("ISS_SERIAL: failed to unregister serial driver (%d)\n", 221 printk("ISS_SERIAL: failed to unregister serial driver (%d)\n",
222 error); 222 error);
223 put_tty_driver(serial_driver); 223 put_tty_driver(serial_driver);
224 tty_port_destroy(&serial_port);
224} 225}
225 226
226 227