364 files changed, 9442 insertions, 14031 deletions

diff --git a/arch/alpha/include/asm/unistd.h b/arch/alpha/include/asm/unistd.h
index 058937bf5a77..b1834166922d 100644
--- a/arch/alpha/include/asm/unistd.h
+++ b/arch/alpha/include/asm/unistd.h
@@ -452,10 +452,14 @@
 #define __NR_fanotify_init              494
 #define __NR_fanotify_mark              495
 #define __NR_prlimit64                  496
+#define __NR_name_to_handle_at          497
+#define __NR_open_by_handle_at          498
+#define __NR_clock_adjtime              499
+#define __NR_syncfs                     500
 
 #ifdef __KERNEL__
 
-#define NR_SYSCALLS                     497
+#define NR_SYSCALLS                     501
 
 #define __ARCH_WANT_IPC_PARSE_VERSION
 #define __ARCH_WANT_OLD_READDIR
diff --git a/arch/alpha/kernel/systbls.S b/arch/alpha/kernel/systbls.S
index a6a1de9db16f..15f999d41c75 100644
--- a/arch/alpha/kernel/systbls.S
+++ b/arch/alpha/kernel/systbls.S
@@ -498,23 +498,27 @@ sys_call_table:
         .quad sys_ni_syscall                    /* sys_timerfd */
         .quad sys_eventfd
         .quad sys_recvmmsg
-        .quad sys_fallocate                             /* 480 */
+        .quad sys_fallocate                     /* 480 */
         .quad sys_timerfd_create
         .quad sys_timerfd_settime
         .quad sys_timerfd_gettime
         .quad sys_signalfd4
-        .quad sys_eventfd2                              /* 485 */
+        .quad sys_eventfd2                      /* 485 */
         .quad sys_epoll_create1
         .quad sys_dup3
         .quad sys_pipe2
         .quad sys_inotify_init1
-        .quad sys_preadv                                /* 490 */
+        .quad sys_preadv                        /* 490 */
         .quad sys_pwritev
         .quad sys_rt_tgsigqueueinfo
         .quad sys_perf_event_open
         .quad sys_fanotify_init
-        .quad sys_fanotify_mark                         /* 495 */
+        .quad sys_fanotify_mark                 /* 495 */
         .quad sys_prlimit64
+        .quad sys_name_to_handle_at
+        .quad sys_open_by_handle_at
+        .quad sys_clock_adjtime
+        .quad sys_syncfs                        /* 500 */
 
         .size sys_call_table, . - sys_call_table
         .type sys_call_table, @object
diff --git a/arch/alpha/kernel/time.c b/arch/alpha/kernel/time.c
index 918e8e0b72ff..818e74ed45dc 100644
--- a/arch/alpha/kernel/time.c
+++ b/arch/alpha/kernel/time.c
@@ -375,8 +375,7 @@ static struct clocksource clocksource_rpcc = {
 
 static inline void register_rpcc_clocksource(long cycle_freq)
 {
-        clocksource_calc_mult_shift(&clocksource_rpcc, cycle_freq, 4);
-        clocksource_register(&clocksource_rpcc);
+        clocksource_register_hz(&clocksource_rpcc, cycle_freq);
 }
 #else /* !CONFIG_SMP */
 static inline void register_rpcc_clocksource(long cycle_freq)
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 8ebbb511c783..0c6852d93506 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -74,7 +74,7 @@ ZTEXTADDR	:= $(CONFIG_ZBOOT_ROM_TEXT)
 ZBSSADDR        := $(CONFIG_ZBOOT_ROM_BSS)
 else
 ZTEXTADDR       := 0
-ZBSSADDR        := ALIGN(4)
+ZBSSADDR        := ALIGN(8)
 endif
 
 SEDFLAGS        = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index adf583cd0c35..49f5b2eaaa87 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -179,15 +179,14 @@ not_angel:
                 bl      cache_on
 
 restart:        adr     r0, LC0
-                ldmia   r0, {r1, r2, r3, r5, r6, r9, r11, r12}
-                ldr     sp, [r0, #32]
+                ldmia   r0, {r1, r2, r3, r6, r9, r11, r12}
+                ldr     sp, [r0, #28]
 
                 /*
                  * We might be running at a different address.  We need
                  * to fix up various pointers.
                  */
                 sub     r0, r0, r1              @ calculate the delta offset
-                add     r5, r5, r0              @ _start
                 add     r6, r6, r0              @ _edata
 
 #ifndef CONFIG_ZBOOT_ROM
@@ -206,31 +205,40 @@ restart:	adr	r0, LC0
 /*
  * Check to see if we will overwrite ourselves.
  *   r4  = final kernel address
- *   r5  = start of this image
  *   r9  = size of decompressed image
  *   r10 = end of this image, including  bss/stack/malloc space if non XIP
  * We basically want:
- *   r4 >= r10 -> OK
- *   r4 + image length <= r5 -> OK
+ *   r4 - 16k page directory >= r10 -> OK
+ *   r4 + image length <= current position (pc) -> OK
  */
+                add     r10, r10, #16384
                 cmp     r4, r10
                 bhs     wont_overwrite
                 add     r10, r4, r9
-                cmp     r10, r5
+   ARM(         cmp     r10, pc         )
+ THUMB(         mov     lr, pc          )
+ THUMB(         cmp     r10, lr         )
                 bls     wont_overwrite
 
 /*
  * Relocate ourselves past the end of the decompressed kernel.
- *   r5  = start of this image
  *   r6  = _edata
  *   r10 = end of the decompressed kernel
  * Because we always copy ahead, we need to do it from the end and go
  * backward in case the source and destination overlap.
  */
-                /* Round up to next 256-byte boundary. */
-                add     r10, r10, #256
+                /*
+                 * Bump to the next 256-byte boundary with the size of
+                 * the relocation code added. This avoids overwriting
+                 * ourself when the offset is small.
+                 */
+                add     r10, r10, #((reloc_code_end - restart + 256) & ~255)
                 bic     r10, r10, #255
 
+                /* Get start of code we want to copy and align it down. */
+                adr     r5, restart
+                bic     r5, r5, #31
+
                 sub     r9, r6, r5              @ size to copy
                 add     r9, r9, #31             @ rounded up to a multiple
                 bic     r9, r9, #31             @ ... of 32 bytes
@@ -245,6 +253,11 @@ restart:	adr	r0, LC0
                 /* Preserve offset to relocated code. */
                 sub     r6, r9, r6
 
+#ifndef CONFIG_ZBOOT_ROM
+                /* cache_clean_flush may use the stack, so relocate it */
+                add     sp, sp, r6
+#endif
+
                 bl      cache_clean_flush
 
                 adr     r0, BSYM(restart)
@@ -333,7 +346,6 @@ not_relocated:	mov	r0, #0
 LC0:            .word   LC0                     @ r1
                 .word   __bss_start             @ r2
                 .word   _end                    @ r3
-                .word   _start                  @ r5
                 .word   _edata                  @ r6
                 .word   _image_size             @ r9
                 .word   _got_start              @ r11
@@ -1062,6 +1074,7 @@ memdump:	mov	r12, r0
 #endif
 
                 .ltorg
+reloc_code_end:
 
                 .align
                 .section ".stack", "aw", %nobits
diff --git a/arch/arm/boot/compressed/vmlinux.lds.in b/arch/arm/boot/compressed/vmlinux.lds.in
index 5309909d7282..ea80abe78844 100644
--- a/arch/arm/boot/compressed/vmlinux.lds.in
+++ b/arch/arm/boot/compressed/vmlinux.lds.in
@@ -54,6 +54,7 @@ SECTIONS
   .bss                  : { *(.bss) }
   _end = .;
 
+  . = ALIGN(8);         /* the stack must be 64-bit aligned */
   .stack                : { *(.stack) }
 
   .stab 0               : { *(.stab) }
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 113085a77123..7aa4262ada7a 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -22,17 +22,16 @@
 #include <linux/init.h>
 #include <linux/list.h>
 #include <linux/io.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/device.h>
 #include <linux/amba/bus.h>
 
 #include <asm/mach/irq.h>
 #include <asm/hardware/vic.h>
 
-#if defined(CONFIG_PM)
+#ifdef CONFIG_PM
 /**
  * struct vic_device - VIC PM device
- * @sysdev: The system device which is registered.
  * @irq: The IRQ number for the base of the VIC.
  * @base: The register base for the VIC.
  * @resume_sources: A bitmask of interrupts for resume.
@@ -43,8 +42,6 @@
  * @protect: Save for VIC_PROTECT.
  */
 struct vic_device {
-        struct sys_device sysdev;
-
         void __iomem    *base;
         int             irq;
         u32             resume_sources;
@@ -59,11 +56,6 @@ struct vic_device {
 static struct vic_device vic_devices[CONFIG_ARM_VIC_NR];
 
 static int vic_id;
-
-static inline struct vic_device *to_vic(struct sys_device *sys)
-{
-        return container_of(sys, struct vic_device, sysdev);
-}
 #endif /* CONFIG_PM */
 
 /**
@@ -85,10 +77,9 @@ static void vic_init2(void __iomem *base)
         writel(32, base + VIC_PL190_DEF_VECT_ADDR);
 }
 
-#if defined(CONFIG_PM)
-static int vic_class_resume(struct sys_device *dev)
+#ifdef CONFIG_PM
+static void resume_one_vic(struct vic_device *vic)
 {
-        struct vic_device *vic = to_vic(dev);
         void __iomem *base = vic->base;
 
         printk(KERN_DEBUG "%s: resuming vic at %p\n", __func__, base);
@@ -107,13 +98,18 @@ static int vic_class_resume(struct sys_device *dev)
 
         writel(vic->soft_int, base + VIC_INT_SOFT);
         writel(~vic->soft_int, base + VIC_INT_SOFT_CLEAR);
+}
 
-        return 0;
+static void vic_resume(void)
+{
+        int id;
+
+        for (id = vic_id - 1; id >= 0; id--)
+                resume_one_vic(vic_devices + id);
 }
 
-static int vic_class_suspend(struct sys_device *dev, pm_message_t state)
+static void suspend_one_vic(struct vic_device *vic)
 {
-        struct vic_device *vic = to_vic(dev);
         void __iomem *base = vic->base;
 
         printk(KERN_DEBUG "%s: suspending vic at %p\n", __func__, base);
@@ -128,14 +124,21 @@ static int vic_class_suspend(struct sys_device *dev, pm_message_t state)
 
         writel(vic->resume_irqs, base + VIC_INT_ENABLE);
         writel(~vic->resume_irqs, base + VIC_INT_ENABLE_CLEAR);
+}
+
+static int vic_suspend(void)
+{
+        int id;
+
+        for (id = 0; id < vic_id; id++)
+                suspend_one_vic(vic_devices + id);
 
         return 0;
 }
 
-struct sysdev_class vic_class = {
-        .name           = "vic",
-        .suspend        = vic_class_suspend,
-        .resume         = vic_class_resume,
+struct syscore_ops vic_syscore_ops = {
+        .suspend        = vic_suspend,
+        .resume         = vic_resume,
 };
 
 /**
@@ -147,30 +150,8 @@ struct sysdev_class vic_class = {
 */
 static int __init vic_pm_init(void)
 {
-        struct vic_device *dev = vic_devices;
-        int err;
-        int id;
-
-        if (vic_id == 0)
-                return 0;
-
-        err = sysdev_class_register(&vic_class);
-        if (err) {
-                printk(KERN_ERR "%s: cannot register class\n", __func__);
-                return err;
-        }
-
-        for (id = 0; id < vic_id; id++, dev++) {
-                dev->sysdev.id = id;
-                dev->sysdev.cls = &vic_class;
-
-                err = sysdev_register(&dev->sysdev);
-                if (err) {
-                        printk(KERN_ERR "%s: failed to register device\n",
-                               __func__);
-                        return err;
-                }
-        }
+        if (vic_id > 0)
+                register_syscore_ops(&vic_syscore_ops);
 
         return 0;
 }
diff --git a/arch/arm/include/asm/mach/time.h b/arch/arm/include/asm/mach/time.h
index 883f6be5117a..d5adaae5ee2c 100644
--- a/arch/arm/include/asm/mach/time.h
+++ b/arch/arm/include/asm/mach/time.h
@@ -34,7 +34,6 @@
  *   timer interrupt which may be pending.
  */
 struct sys_timer {
-        struct sys_device       dev;
         void                    (*init)(void);
         void                    (*suspend)(void);
         void                    (*resume)(void);
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 885be097769d..832888d0c20c 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -159,7 +159,7 @@ extern unsigned int user_debug;
 #include <mach/barriers.h>
 #elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)
 #define mb()            do { dsb(); outer_sync(); } while (0)
-#define rmb()           dmb()
+#define rmb()           dsb()
 #define wmb()           mb()
 #else
 #include <asm/memory.h>
diff --git a/arch/arm/kernel/leds.c b/arch/arm/kernel/leds.c
index 31a316c1777b..0f107dcb0347 100644
--- a/arch/arm/kernel/leds.c
+++ b/arch/arm/kernel/leds.c
@@ -10,6 +10,7 @@
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 
 #include <asm/leds.h>
 
@@ -69,36 +70,37 @@ static ssize_t leds_store(struct sys_device *dev,
 
 static SYSDEV_ATTR(event, 0200, NULL, leds_store);
 
-static int leds_suspend(struct sys_device *dev, pm_message_t state)
+static struct sysdev_class leds_sysclass = {
+        .name           = "leds",
+};
+
+static struct sys_device leds_device = {
+        .id             = 0,
+        .cls            = &leds_sysclass,
+};
+
+static int leds_suspend(void)
 {
         leds_event(led_stop);
         return 0;
 }
 
-static int leds_resume(struct sys_device *dev)
+static void leds_resume(void)
 {
         leds_event(led_start);
-        return 0;
 }
 
-static int leds_shutdown(struct sys_device *dev)
+static void leds_shutdown(void)
 {
         leds_event(led_halted);
-        return 0;
 }
 
-static struct sysdev_class leds_sysclass = {
-        .name           = "leds",
+static struct syscore_ops leds_syscore_ops = {
         .shutdown       = leds_shutdown,
         .suspend        = leds_suspend,
         .resume         = leds_resume,
 };
 
-static struct sys_device leds_device = {
-        .id             = 0,
-        .cls            = &leds_sysclass,
-};
-
 static int __init leds_init(void)
 {
         int ret;
@@ -107,6 +109,8 @@ static int __init leds_init(void)
                 ret = sysdev_register(&leds_device);
         if (ret == 0)
                 ret = sysdev_create_file(&leds_device, &attr_event);
+        if (ret == 0)
+                register_syscore_ops(&leds_syscore_ops);
         return ret;
 }
 
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index cb8398317644..0340224cf73c 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -597,19 +597,13 @@ setup_rt_frame(int usig, struct k_sigaction *ka, siginfo_t *info,
         return err;
 }
 
-static inline void setup_syscall_restart(struct pt_regs *regs)
-{
-        regs->ARM_r0 = regs->ARM_ORIG_r0;
-        regs->ARM_pc -= thumb_mode(regs) ? 2 : 4;
-}
-
 /*
  * OK, we're invoking a handler
  */     
 static int
 handle_signal(unsigned long sig, struct k_sigaction *ka,
               siginfo_t *info, sigset_t *oldset,
-              struct pt_regs * regs, int syscall)
+              struct pt_regs * regs)
 {
         struct thread_info *thread = current_thread_info();
         struct task_struct *tsk = current;
@@ -617,26 +611,6 @@ handle_signal(unsigned long sig, struct k_sigaction *ka,
         int ret;
 
         /*
-         * If we were from a system call, check for system call restarting...
-         */
-        if (syscall) {
-                switch (regs->ARM_r0) {
-                case -ERESTART_RESTARTBLOCK:
-                case -ERESTARTNOHAND:
-                        regs->ARM_r0 = -EINTR;
-                        break;
-                case -ERESTARTSYS:
-                        if (!(ka->sa.sa_flags & SA_RESTART)) {
-                                regs->ARM_r0 = -EINTR;
-                                break;
-                        }
-                        /* fallthrough */
-                case -ERESTARTNOINTR:
-                        setup_syscall_restart(regs);
-                }
-        }
-
-        /*
          * translate the signal
          */
         if (usig < 32 && thread->exec_domain && thread->exec_domain->signal_invmap)
@@ -685,6 +659,7 @@ handle_signal(unsigned long sig, struct k_sigaction *ka,
  */
 static void do_signal(struct pt_regs *regs, int syscall)
 {
+        unsigned int retval = 0, continue_addr = 0, restart_addr = 0;
         struct k_sigaction ka;
         siginfo_t info;
         int signr;
@@ -698,18 +673,61 @@ static void do_signal(struct pt_regs *regs, int syscall)
         if (!user_mode(regs))
                 return;
 
+        /*
+         * If we were from a system call, check for system call restarting...
+         */
+        if (syscall) {
+                continue_addr = regs->ARM_pc;
+                restart_addr = continue_addr - (thumb_mode(regs) ? 2 : 4);
+                retval = regs->ARM_r0;
+
+                /*
+                 * Prepare for system call restart.  We do this here so that a
+                 * debugger will see the already changed PSW.
+                 */
+                switch (retval) {
+                case -ERESTARTNOHAND:
+                case -ERESTARTSYS:
+                case -ERESTARTNOINTR:
+                        regs->ARM_r0 = regs->ARM_ORIG_r0;
+                        regs->ARM_pc = restart_addr;
+                        break;
+                case -ERESTART_RESTARTBLOCK:
+                        regs->ARM_r0 = -EINTR;
+                        break;
+                }
+        }
+
         if (try_to_freeze())
                 goto no_signal;
 
+        /*
+         * Get the signal to deliver.  When running under ptrace, at this
+         * point the debugger may change all our registers ...
+         */
         signr = get_signal_to_deliver(&info, &ka, regs, NULL);
         if (signr > 0) {
                 sigset_t *oldset;
 
+                /*
+                 * Depending on the signal settings we may need to revert the
+                 * decision to restart the system call.  But skip this if a
+                 * debugger has chosen to restart at a different PC.
+                 */
+                if (regs->ARM_pc == restart_addr) {
+                        if (retval == -ERESTARTNOHAND
+                            || (retval == -ERESTARTSYS
+                                && !(ka.sa.sa_flags & SA_RESTART))) {
+                                regs->ARM_r0 = -EINTR;
+                                regs->ARM_pc = continue_addr;
+                        }
+                }
+
                 if (test_thread_flag(TIF_RESTORE_SIGMASK))
                         oldset = &current->saved_sigmask;
                 else
                         oldset = &current->blocked;
-                if (handle_signal(signr, &ka, &info, oldset, regs, syscall) == 0) {
+                if (handle_signal(signr, &ka, &info, oldset, regs) == 0) {
                         /*
                          * A signal was successfully delivered; the saved
                          * sigmask will have been stored in the signal frame,
@@ -723,11 +741,14 @@ static void do_signal(struct pt_regs *regs, int syscall)
         }
 
  no_signal:
-        /*
-         * No signal to deliver to the process - restart the syscall.
-         */
         if (syscall) {
-                if (regs->ARM_r0 == -ERESTART_RESTARTBLOCK) {
+                /*
+                 * Handle restarting a different system call.  As above,
+                 * if a debugger has chosen to restart at a different PC,
+                 * ignore the restart.
+                 */
+                if (retval == -ERESTART_RESTARTBLOCK
+                    && regs->ARM_pc == continue_addr) {
                         if (thumb_mode(regs)) {
                                 regs->ARM_r7 = __NR_restart_syscall - __NR_SYSCALL_BASE;
                                 regs->ARM_pc -= 2;
@@ -750,11 +771,6 @@ static void do_signal(struct pt_regs *regs, int syscall)
 #endif
                         }
                 }
-                if (regs->ARM_r0 == -ERESTARTNOHAND ||
-                    regs->ARM_r0 == -ERESTARTSYS ||
-                    regs->ARM_r0 == -ERESTARTNOINTR) {
-                        setup_syscall_restart(regs);
-                }
 
                 /* If there's no signal to deliver, we just put the saved sigmask
                  * back.
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index 1ff46cabc7ef..cb634c3e28e9 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -21,7 +21,7 @@
 #include <linux/timex.h>
 #include <linux/errno.h>
 #include <linux/profile.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/timer.h>
 #include <linux/irq.h>
 
@@ -115,48 +115,37 @@ void timer_tick(void)
 #endif
 
 #if defined(CONFIG_PM) && !defined(CONFIG_GENERIC_CLOCKEVENTS)
-static int timer_suspend(struct sys_device *dev, pm_message_t state)
+static int timer_suspend(void)
 {
-        struct sys_timer *timer = container_of(dev, struct sys_timer, dev);
-
-        if (timer->suspend != NULL)
-                timer->suspend();
+        if (system_timer->suspend)
+                system_timer->suspend();
 
         return 0;
 }
 
-static int timer_resume(struct sys_device *dev)
+static void timer_resume(void)
 {
-        struct sys_timer *timer = container_of(dev, struct sys_timer, dev);
-
-        if (timer->resume != NULL)
-                timer->resume();
-
-        return 0;
+        if (system_timer->resume)
+                system_timer->resume();
 }
 #else
 #define timer_suspend NULL
 #define timer_resume NULL
 #endif
 
-static struct sysdev_class timer_sysclass = {
-        .name           = "timer",
+static struct syscore_ops timer_syscore_ops = {
         .suspend        = timer_suspend,
         .resume         = timer_resume,
 };
 
-static int __init timer_init_sysfs(void)
+static int __init timer_init_syscore_ops(void)
 {
-        int ret = sysdev_class_register(&timer_sysclass);
-        if (ret == 0) {
-                system_timer->dev.cls = &timer_sysclass;
-                ret = sysdev_register(&system_timer->dev);
-        }
+        register_syscore_ops(&timer_syscore_ops);
 
-        return ret;
+        return 0;
 }
 
-device_initcall(timer_init_sysfs);
+device_initcall(timer_init_syscore_ops);
 
 void __init time_init(void)
 {
diff --git a/arch/arm/mach-davinci/cpufreq.c b/arch/arm/mach-davinci/cpufreq.c
index 0a95be1512bb..41669ecc1f91 100644
--- a/arch/arm/mach-davinci/cpufreq.c
+++ b/arch/arm/mach-davinci/cpufreq.c
@@ -94,9 +94,7 @@ static int davinci_target(struct cpufreq_policy *policy,
         if (freqs.old == freqs.new)
                 return ret;
 
-        cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER,
-                        dev_driver_string(cpufreq.dev),
-                        "transition: %u --> %u\n", freqs.old, freqs.new);
+        dev_dbg(&cpufreq.dev, "transition: %u --> %u\n", freqs.old, freqs.new);
 
         ret = cpufreq_frequency_table_target(policy, pdata->freq_table,
                                                 freqs.new, relation, &idx);
diff --git a/arch/arm/mach-exynos4/pm.c b/arch/arm/mach-exynos4/pm.c
index 10d917d9e3ad..8755ca8dd48d 100644
--- a/arch/arm/mach-exynos4/pm.c
+++ b/arch/arm/mach-exynos4/pm.c
@@ -16,6 +16,7 @@
 
 #include <linux/init.h>
 #include <linux/suspend.h>
+#include <linux/syscore_ops.h>
 #include <linux/io.h>
 
 #include <asm/cacheflush.h>
@@ -372,7 +373,27 @@ void exynos4_scu_enable(void __iomem *scu_base)
         flush_cache_all();
 }
 
-static int exynos4_pm_resume(struct sys_device *dev)
+static struct sysdev_driver exynos4_pm_driver = {
+        .add            = exynos4_pm_add,
+};
+
+static __init int exynos4_pm_drvinit(void)
+{
+        unsigned int tmp;
+
+        s3c_pm_init();
+
+        /* All wakeup disable */
+
+        tmp = __raw_readl(S5P_WAKEUP_MASK);
+        tmp |= ((0xFF << 8) | (0x1F << 1));
+        __raw_writel(tmp, S5P_WAKEUP_MASK);
+
+        return sysdev_driver_register(&exynos4_sysclass, &exynos4_pm_driver);
+}
+arch_initcall(exynos4_pm_drvinit);
+
+static void exynos4_pm_resume(void)
 {
         /* For release retention */
 
@@ -394,27 +415,15 @@ static int exynos4_pm_resume(struct sys_device *dev)
         /* enable L2X0*/
         writel_relaxed(1, S5P_VA_L2CC + L2X0_CTRL);
 #endif
-
-        return 0;
 }
 
-static struct sysdev_driver exynos4_pm_driver = {
-        .add            = exynos4_pm_add,
+static struct syscore_ops exynos4_pm_syscore_ops = {
         .resume         = exynos4_pm_resume,
 };
 
-static __init int exynos4_pm_drvinit(void)
+static __init int exynos4_pm_syscore_init(void)
 {
-        unsigned int tmp;
-
-        s3c_pm_init();
-
-        /* All wakeup disable */
-
-        tmp = __raw_readl(S5P_WAKEUP_MASK);
-        tmp |= ((0xFF << 8) | (0x1F << 1));
-        __raw_writel(tmp, S5P_WAKEUP_MASK);
-
-        return sysdev_driver_register(&exynos4_sysclass, &exynos4_pm_driver);
+        register_syscore_ops(&exynos4_pm_syscore_ops);
+        return 0;
 }
-arch_initcall(exynos4_pm_drvinit);
+arch_initcall(exynos4_pm_syscore_init);
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 980803ff348c..d3e96451529c 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -24,7 +24,7 @@
 #include <linux/platform_device.h>
 #include <linux/slab.h>
 #include <linux/string.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/kmi.h>
 #include <linux/clocksource.h>
@@ -180,13 +180,13 @@ static void __init ap_init_irq(void)
 #ifdef CONFIG_PM
 static unsigned long ic_irq_enable;
 
-static int irq_suspend(struct sys_device *dev, pm_message_t state)
+static int irq_suspend(void)
 {
         ic_irq_enable = readl(VA_IC_BASE + IRQ_ENABLE);
         return 0;
 }
 
-static int irq_resume(struct sys_device *dev)
+static void irq_resume(void)
 {
         /* disable all irq sources */
         writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
@@ -194,33 +194,25 @@ static int irq_resume(struct sys_device *dev)
         writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);
 
         writel(ic_irq_enable, VA_IC_BASE + IRQ_ENABLE_SET);
-        return 0;
 }
 #else
 #define irq_suspend NULL
 #define irq_resume NULL
 #endif
 
-static struct sysdev_class irq_class = {
-        .name           = "irq",
+static struct syscore_ops irq_syscore_ops = {
         .suspend        = irq_suspend,
         .resume         = irq_resume,
 };
 
-static struct sys_device irq_device = {
-        .id     = 0,
-        .cls    = &irq_class,
-};
-
-static int __init irq_init_sysfs(void)
+static int __init irq_syscore_init(void)
 {
-        int ret = sysdev_class_register(&irq_class);
-        if (ret == 0)
-                ret = sysdev_register(&irq_device);
-        return ret;
+        register_syscore_ops(&irq_syscore_ops);
+
+        return 0;
 }
 
-device_initcall(irq_init_sysfs);
+device_initcall(irq_syscore_init);
 
 /*
  * Flash handling.
diff --git a/arch/arm/mach-omap1/pm_bus.c b/arch/arm/mach-omap1/pm_bus.c
index 6588c22b8a64..fe31d933f0ed 100644
--- a/arch/arm/mach-omap1/pm_bus.c
+++ b/arch/arm/mach-omap1/pm_bus.c
@@ -24,75 +24,50 @@
 #ifdef CONFIG_PM_RUNTIME
 static int omap1_pm_runtime_suspend(struct device *dev)
 {
-        struct clk *iclk, *fclk;
-        int ret = 0;
+        int ret;
 
         dev_dbg(dev, "%s\n", __func__);
 
         ret = pm_generic_runtime_suspend(dev);
+        if (ret)
+                return ret;
 
-        fclk = clk_get(dev, "fck");
-        if (!IS_ERR(fclk)) {
-                clk_disable(fclk);
-                clk_put(fclk);
-        }
-
-        iclk = clk_get(dev, "ick");
-        if (!IS_ERR(iclk)) {
-                clk_disable(iclk);
-                clk_put(iclk);
+        ret = pm_runtime_clk_suspend(dev);
+        if (ret) {
+                pm_generic_runtime_resume(dev);
+                return ret;
         }
 
         return 0;
-};
+}
 
 static int omap1_pm_runtime_resume(struct device *dev)
 {
-        struct clk *iclk, *fclk;
-
         dev_dbg(dev, "%s\n", __func__);
 
-        iclk = clk_get(dev, "ick");
-        if (!IS_ERR(iclk)) {
-                clk_enable(iclk);
-                clk_put(iclk);
-        }
+        pm_runtime_clk_resume(dev);
+        return pm_generic_runtime_resume(dev);
+}
 
-        fclk = clk_get(dev, "fck");
-        if (!IS_ERR(fclk)) {
-                clk_enable(fclk);
-                clk_put(fclk);
-        }
+static struct dev_power_domain default_power_domain = {
+        .ops = {
+                .runtime_suspend = omap1_pm_runtime_suspend,
+                .runtime_resume = omap1_pm_runtime_resume,
+                USE_PLATFORM_PM_SLEEP_OPS
+        },
+};
 
-        return pm_generic_runtime_resume(dev);
+static struct pm_clk_notifier_block platform_bus_notifier = {
+        .pwr_domain = &default_power_domain,
+        .con_ids = { "ick", "fck", NULL, },
 };
 
 static int __init omap1_pm_runtime_init(void)
 {
-        const struct dev_pm_ops *pm;
-        struct dev_pm_ops *omap_pm;
-
         if (!cpu_class_is_omap1())
                 return -ENODEV;
 
-        pm = platform_bus_get_pm_ops();
-        if (!pm) {
-                pr_err("%s: unable to get dev_pm_ops from platform_bus\n",
-                        __func__);
-                return -ENODEV;
-        }
-
-        omap_pm = kmemdup(pm, sizeof(struct dev_pm_ops), GFP_KERNEL);
-        if (!omap_pm) {
-                pr_err("%s: unable to alloc memory for new dev_pm_ops\n",
-                        __func__);
-                return -ENOMEM;
-        }
-
-        omap_pm->runtime_suspend = omap1_pm_runtime_suspend;
-        omap_pm->runtime_resume = omap1_pm_runtime_resume;
-
-        platform_bus_set_pm_ops(omap_pm);
+        pm_runtime_clk_add_notifier(&platform_bus_type, &platform_bus_notifier);
 
         return 0;
 }
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 512b15204450..66dfbccacd25 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -59,10 +59,10 @@ endif
 # Power Management
 ifeq ($(CONFIG_PM),y)
 obj-$(CONFIG_ARCH_OMAP2)                += pm24xx.o
-obj-$(CONFIG_ARCH_OMAP2)                += sleep24xx.o pm_bus.o
+obj-$(CONFIG_ARCH_OMAP2)                += sleep24xx.o
 obj-$(CONFIG_ARCH_OMAP3)                += pm34xx.o sleep34xx.o \
-                                           cpuidle34xx.o pm_bus.o
-obj-$(CONFIG_ARCH_OMAP4)                += pm44xx.o pm_bus.o
+                                           cpuidle34xx.o
+obj-$(CONFIG_ARCH_OMAP4)                += pm44xx.o
 obj-$(CONFIG_PM_DEBUG)                  += pm-debug.o
 obj-$(CONFIG_OMAP_SMARTREFLEX)          += sr_device.o smartreflex.o
 obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3)   += smartreflex-class3.o
diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index b2b1e37bb6bb..d6e34dd9e7e7 100644
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -115,6 +115,7 @@ int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
                                   sdrc_cs0->rfr_ctrl, sdrc_cs0->actim_ctrla,
                                   sdrc_cs0->actim_ctrlb, sdrc_cs0->mr,
                                   0, 0, 0, 0);
+        clk->rate = rate;
 
         return 0;
 }
diff --git a/arch/arm/mach-omap2/pm_bus.c b/arch/arm/mach-omap2/pm_bus.c
deleted file mode 100644
index 5acd2ab298b1..000000000000
--- a/arch/arm/mach-omap2/pm_bus.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * Runtime PM support code for OMAP
- *
- * Author: Kevin Hilman, Deep Root Systems, LLC
- *
- * Copyright (C) 2010 Texas Instruments, Inc.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/pm_runtime.h>
-#include <linux/platform_device.h>
-#include <linux/mutex.h>
-
-#include <plat/omap_device.h>
-#include <plat/omap-pm.h>
-
-#ifdef CONFIG_PM_RUNTIME
-static int omap_pm_runtime_suspend(struct device *dev)
-{
-        struct platform_device *pdev = to_platform_device(dev);
-        int r, ret = 0;
-
-        dev_dbg(dev, "%s\n", __func__);
-
-        ret = pm_generic_runtime_suspend(dev);
-
-        if (!ret && dev->parent == &omap_device_parent) {
-                r = omap_device_idle(pdev);
-                WARN_ON(r);
-        }
-
-        return ret;
-};
-
-static int omap_pm_runtime_resume(struct device *dev)
-{
-        struct platform_device *pdev = to_platform_device(dev);
-        int r;
-
-        dev_dbg(dev, "%s\n", __func__);
-
-        if (dev->parent == &omap_device_parent) {
-                r = omap_device_enable(pdev);
-                WARN_ON(r);
-        }
-
-        return pm_generic_runtime_resume(dev);
-};
-#else
-#define omap_pm_runtime_suspend NULL
-#define omap_pm_runtime_resume NULL
-#endif /* CONFIG_PM_RUNTIME */
-
-static int __init omap_pm_runtime_init(void)
-{
-        const struct dev_pm_ops *pm;
-        struct dev_pm_ops *omap_pm;
-
-        pm = platform_bus_get_pm_ops();
-        if (!pm) {
-                pr_err("%s: unable to get dev_pm_ops from platform_bus\n",
-                        __func__);
-                return -ENODEV;
-        }
-
-        omap_pm = kmemdup(pm, sizeof(struct dev_pm_ops), GFP_KERNEL);
-        if (!omap_pm) {
-                pr_err("%s: unable to alloc memory for new dev_pm_ops\n",
-                        __func__);
-                return -ENOMEM;
-        }
-
-        omap_pm->runtime_suspend = omap_pm_runtime_suspend;
-        omap_pm->runtime_resume = omap_pm_runtime_resume;
-
-        platform_bus_set_pm_ops(omap_pm);
-
-        return 0;
-}
-core_initcall(omap_pm_runtime_init);
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index bfbecec6d05f..810a982a66f8 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -15,7 +15,6 @@
 
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
 #include <linux/interrupt.h>
 #include <linux/sched.h>
 #include <linux/bitops.h>
diff --git a/arch/arm/mach-pxa/clock-pxa2xx.c b/arch/arm/mach-pxa/clock-pxa2xx.c
index 1ce090448493..1d5859d9a0e3 100644
--- a/arch/arm/mach-pxa/clock-pxa2xx.c
+++ b/arch/arm/mach-pxa/clock-pxa2xx.c
@@ -9,7 +9,7 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 
 #include <mach/pxa2xx-regs.h>
 
@@ -33,32 +33,22 @@ const struct clkops clk_pxa2xx_cken_ops = {
 #ifdef CONFIG_PM
 static uint32_t saved_cken;
 
-static int pxa2xx_clock_suspend(struct sys_device *d, pm_message_t state)
+static int pxa2xx_clock_suspend(void)
 {
         saved_cken = CKEN;
         return 0;
 }
 
-static int pxa2xx_clock_resume(struct sys_device *d)
+static void pxa2xx_clock_resume(void)
 {
         CKEN = saved_cken;
-        return 0;
 }
 #else
 #define pxa2xx_clock_suspend    NULL
 #define pxa2xx_clock_resume     NULL
 #endif
 
-struct sysdev_class pxa2xx_clock_sysclass = {
-        .name           = "pxa2xx-clock",
+struct syscore_ops pxa2xx_clock_syscore_ops = {
         .suspend        = pxa2xx_clock_suspend,
         .resume         = pxa2xx_clock_resume,
 };
-
-static int __init pxa2xx_clock_init(void)
-{
-        if (cpu_is_pxa2xx())
-                return sysdev_class_register(&pxa2xx_clock_sysclass);
-        return 0;
-}
-postcore_initcall(pxa2xx_clock_init);
diff --git a/arch/arm/mach-pxa/clock-pxa3xx.c b/arch/arm/mach-pxa/clock-pxa3xx.c
index 3f864cd0bd28..2a37a9a8f621 100644
--- a/arch/arm/mach-pxa/clock-pxa3xx.c
+++ b/arch/arm/mach-pxa/clock-pxa3xx.c
@@ -10,6 +10,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/syscore_ops.h>
 
 #include <mach/smemc.h>
 #include <mach/pxa3xx-regs.h>
@@ -182,7 +183,7 @@ const struct clkops clk_pxa3xx_pout_ops = {
 static uint32_t cken[2];
 static uint32_t accr;
 
-static int pxa3xx_clock_suspend(struct sys_device *d, pm_message_t state)
+static int pxa3xx_clock_suspend(void)
 {
         cken[0] = CKENA;
         cken[1] = CKENB;
@@ -190,28 +191,18 @@ static int pxa3xx_clock_suspend(struct sys_device *d, pm_message_t state)
         return 0;
 }
 
-static int pxa3xx_clock_resume(struct sys_device *d)
+static void pxa3xx_clock_resume(void)
 {
         ACCR = accr;
         CKENA = cken[0];
         CKENB = cken[1];
-        return 0;
 }
 #else
 #define pxa3xx_clock_suspend    NULL
 #define pxa3xx_clock_resume     NULL
 #endif
 
-struct sysdev_class pxa3xx_clock_sysclass = {
-        .name           = "pxa3xx-clock",
+struct syscore_ops pxa3xx_clock_syscore_ops = {
         .suspend        = pxa3xx_clock_suspend,
         .resume         = pxa3xx_clock_resume,
 };
-
-static int __init pxa3xx_clock_init(void)
-{
-        if (cpu_is_pxa3xx() || cpu_is_pxa95x())
-                return sysdev_class_register(&pxa3xx_clock_sysclass);
-        return 0;
-}
-postcore_initcall(pxa3xx_clock_init);
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h
index f9f349a21b54..1f2fb9c43f06 100644
--- a/arch/arm/mach-pxa/clock.h
+++ b/arch/arm/mach-pxa/clock.h
@@ -1,5 +1,5 @@
 #include <linux/clkdev.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 
 struct clkops {
         void                    (*enable)(struct clk *);
@@ -54,7 +54,7 @@ extern const struct clkops clk_pxa2xx_cken_ops;
 void clk_pxa2xx_cken_enable(struct clk *clk);
 void clk_pxa2xx_cken_disable(struct clk *clk);
 
-extern struct sysdev_class pxa2xx_clock_sysclass;
+extern struct syscore_ops pxa2xx_clock_syscore_ops;
 
 #if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
 #define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay)   \
@@ -74,5 +74,6 @@ extern const struct clkops clk_pxa3xx_smemc_ops;
 extern void clk_pxa3xx_cken_enable(struct clk *);
 extern void clk_pxa3xx_cken_disable(struct clk *);
 
-extern struct sysdev_class pxa3xx_clock_sysclass;
+extern struct syscore_ops pxa3xx_clock_syscore_ops;
+
 #endif
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index b88d601a8090..13518a705399 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -10,7 +10,6 @@
  */
 
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
 #include <linux/irq.h>
 #include <linux/gpio.h>
 #include <linux/delay.h>
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index 8225e2e58c6e..a10996782476 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -10,7 +10,7 @@
  */
 
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/irq.h>
 #include <linux/gpio.h>
 
@@ -388,7 +388,7 @@ static inline void cmx2xx_init_display(void) {}
 #ifdef CONFIG_PM
 static unsigned long sleep_save_msc[10];
 
-static int cmx2xx_suspend(struct sys_device *dev, pm_message_t state)
+static int cmx2xx_suspend(void)
 {
         cmx2xx_pci_suspend();
 
@@ -412,7 +412,7 @@ static int cmx2xx_suspend(struct sys_device *dev, pm_message_t state)
         return 0;
 }
 
-static int cmx2xx_resume(struct sys_device *dev)
+static void cmx2xx_resume(void)
 {
         cmx2xx_pci_resume();
 
@@ -420,27 +420,18 @@ static int cmx2xx_resume(struct sys_device *dev)
         __raw_writel(sleep_save_msc[0], MSC0);
         __raw_writel(sleep_save_msc[1], MSC1);
         __raw_writel(sleep_save_msc[2], MSC2);
-
-        return 0;
 }
 
-static struct sysdev_class cmx2xx_pm_sysclass = {
-        .name = "pm",
+static struct syscore_ops cmx2xx_pm_syscore_ops = {
         .resume = cmx2xx_resume,
         .suspend = cmx2xx_suspend,
 };
 
-static struct sys_device cmx2xx_pm_device = {
-        .cls = &cmx2xx_pm_sysclass,
-};
-
 static int __init cmx2xx_pm_init(void)
 {
-        int error;
-        error = sysdev_class_register(&cmx2xx_pm_sysclass);
-        if (error == 0)
-                error = sysdev_register(&cmx2xx_pm_device);
-        return error;
+        register_syscore_ops(&cmx2xx_pm_syscore_ops);
+
+        return 0;
 }
 #else
 static int __init cmx2xx_pm_init(void) { return 0; }
diff --git a/arch/arm/mach-pxa/colibri-evalboard.c b/arch/arm/mach-pxa/colibri-evalboard.c
index 81c3c433e2d6..d28e802e2448 100644
--- a/arch/arm/mach-pxa/colibri-evalboard.c
+++ b/arch/arm/mach-pxa/colibri-evalboard.c
@@ -13,7 +13,6 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
 #include <linux/interrupt.h>
 #include <linux/gpio.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-pxa/colibri-pxa270-income.c b/arch/arm/mach-pxa/colibri-pxa270-income.c
index 44c1b77ece67..80538b8806ed 100644
--- a/arch/arm/mach-pxa/colibri-pxa270-income.c
+++ b/arch/arm/mach-pxa/colibri-pxa270-income.c
@@ -22,7 +22,6 @@
 #include <linux/platform_device.h>
 #include <linux/pwm_backlight.h>
 #include <linux/i2c/pxa-i2c.h>
-#include <linux/sysdev.h>
 
 #include <asm/irq.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c
index 6fc5d328ba7f..7545a48ed88b 100644
--- a/arch/arm/mach-pxa/colibri-pxa270.c
+++ b/arch/arm/mach-pxa/colibri-pxa270.c
@@ -17,7 +17,6 @@
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
 #include <linux/ucb1400.h>
 
 #include <asm/mach/arch.h>
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index a079d8baa45a..e6c9344a95ae 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -61,10 +61,10 @@ extern unsigned pxa3xx_get_clk_frequency_khz(int);
 #define pxa3xx_get_clk_frequency_khz(x)         (0)
 #endif
 
-extern struct sysdev_class pxa_irq_sysclass;
-extern struct sysdev_class pxa_gpio_sysclass;
-extern struct sysdev_class pxa2xx_mfp_sysclass;
-extern struct sysdev_class pxa3xx_mfp_sysclass;
+extern struct syscore_ops pxa_irq_syscore_ops;
+extern struct syscore_ops pxa_gpio_syscore_ops;
+extern struct syscore_ops pxa2xx_mfp_syscore_ops;
+extern struct syscore_ops pxa3xx_mfp_syscore_ops;
 
 void __init pxa_set_ffuart_info(void *info);
 void __init pxa_set_btuart_info(void *info);
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 6251e3f5c62c..32ed551bf9c5 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -15,7 +15,7 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/interrupt.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/io.h>
 #include <linux/irq.h>
 
@@ -183,7 +183,7 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
 static unsigned long saved_icmr[MAX_INTERNAL_IRQS/32];
 static unsigned long saved_ipr[MAX_INTERNAL_IRQS];
 
-static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state)
+static int pxa_irq_suspend(void)
 {
         int i;
 
@@ -202,7 +202,7 @@ static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state)
         return 0;
 }
 
-static int pxa_irq_resume(struct sys_device *dev)
+static void pxa_irq_resume(void)
 {
         int i;
 
@@ -218,22 +218,13 @@ static int pxa_irq_resume(struct sys_device *dev)
                         __raw_writel(saved_ipr[i], IRQ_BASE + IPR(i));
 
         __raw_writel(1, IRQ_BASE + ICCR);
-        return 0;
 }
 #else
 #define pxa_irq_suspend         NULL
 #define pxa_irq_resume          NULL
 #endif
 
-struct sysdev_class pxa_irq_sysclass = {
-        .name           = "irq",
+struct syscore_ops pxa_irq_syscore_ops = {
         .suspend        = pxa_irq_suspend,
         .resume         = pxa_irq_resume,
 };
-
-static int __init pxa_irq_init(void)
-{
-        return sysdev_class_register(&pxa_irq_sysclass);
-}
-
-core_initcall(pxa_irq_init);
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index f5de541725b1..6cf8180bf5bd 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -15,7 +15,7 @@
 
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/interrupt.h>
 #include <linux/sched.h>
 #include <linux/bitops.h>
@@ -159,30 +159,22 @@ static void __init lpd270_init_irq(void)
 
 
 #ifdef CONFIG_PM
-static int lpd270_irq_resume(struct sys_device *dev)
+static void lpd270_irq_resume(void)
 {
         __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
-        return 0;
 }
 
-static struct sysdev_class lpd270_irq_sysclass = {
-        .name = "cpld_irq",
+static struct syscore_ops lpd270_irq_syscore_ops = {
         .resume = lpd270_irq_resume,
 };
 
-static struct sys_device lpd270_irq_device = {
-        .cls = &lpd270_irq_sysclass,
-};
-
 static int __init lpd270_irq_device_init(void)
 {
-        int ret = -ENODEV;
         if (machine_is_logicpd_pxa270()) {
-                ret = sysdev_class_register(&lpd270_irq_sysclass);
-                if (ret == 0)
-                        ret = sysdev_register(&lpd270_irq_device);
+                register_syscore_ops(&lpd270_irq_syscore_ops);
+                return 0;
         }
-        return ret;
+        return -ENODEV;
 }
 
 device_initcall(lpd270_irq_device_init);
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 3ede978c83d9..e10ddb827147 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -15,7 +15,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/major.h>
 #include <linux/fb.h>
 #include <linux/interrupt.h>
@@ -176,31 +176,22 @@ static void __init lubbock_init_irq(void)
 
 #ifdef CONFIG_PM
 
-static int lubbock_irq_resume(struct sys_device *dev)
+static void lubbock_irq_resume(void)
 {
         LUB_IRQ_MASK_EN = lubbock_irq_enabled;
-        return 0;
 }
 
-static struct sysdev_class lubbock_irq_sysclass = {
-        .name = "cpld_irq",
+static struct syscore_ops lubbock_irq_syscore_ops = {
         .resume = lubbock_irq_resume,
 };
 
-static struct sys_device lubbock_irq_device = {
-        .cls = &lubbock_irq_sysclass,
-};
-
 static int __init lubbock_irq_device_init(void)
 {
-        int ret = -ENODEV;
-
         if (machine_is_lubbock()) {
-                ret = sysdev_class_register(&lubbock_irq_sysclass);
-                if (ret == 0)
-                        ret = sysdev_register(&lubbock_irq_device);
+                register_syscore_ops(&lubbock_irq_syscore_ops);
+                return 0;
         }
-        return ret;
+        return -ENODEV;
 }
 
 device_initcall(lubbock_irq_device_init);
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 95163baca29e..3479e2b3b511 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -15,7 +15,7 @@
 
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/interrupt.h>
 #include <linux/sched.h>
 #include <linux/bitops.h>
@@ -185,31 +185,21 @@ static void __init mainstone_init_irq(void)
 
 #ifdef CONFIG_PM
 
-static int mainstone_irq_resume(struct sys_device *dev)
+static void mainstone_irq_resume(void)
 {
         MST_INTMSKENA = mainstone_irq_enabled;
-        return 0;
 }
 
-static struct sysdev_class mainstone_irq_sysclass = {
-        .name = "cpld_irq",
+static struct syscore_ops mainstone_irq_syscore_ops = {
         .resume = mainstone_irq_resume,
 };
 
-static struct sys_device mainstone_irq_device = {
-        .cls = &mainstone_irq_sysclass,
-};
-
 static int __init mainstone_irq_device_init(void)
 {
-        int ret = -ENODEV;
+        if (machine_is_mainstone())
+                register_syscore_ops(&mainstone_irq_syscore_ops);
 
-        if (machine_is_mainstone()) {
-                ret = sysdev_class_register(&mainstone_irq_sysclass);
-                if (ret == 0)
-                        ret = sysdev_register(&mainstone_irq_device);
-        }
-        return ret;
+        return 0;
 }
 
 device_initcall(mainstone_irq_device_init);
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 1d1419b73457..87ae3129f4f7 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -16,7 +16,7 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 
 #include <mach/gpio.h>
 #include <mach/pxa2xx-regs.h>
@@ -338,7 +338,7 @@ static unsigned long saved_gafr[2][4];
 static unsigned long saved_gpdr[4];
 static unsigned long saved_pgsr[4];
 
-static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
+static int pxa2xx_mfp_suspend(void)
 {
         int i;
 
@@ -365,7 +365,7 @@ static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
         return 0;
 }
 
-static int pxa2xx_mfp_resume(struct sys_device *d)
+static void pxa2xx_mfp_resume(void)
 {
         int i;
 
@@ -376,15 +376,13 @@ static int pxa2xx_mfp_resume(struct sys_device *d)
                 PGSR(i) = saved_pgsr[i];
         }
         PSSR = PSSR_RDH | PSSR_PH;
-        return 0;
 }
 #else
 #define pxa2xx_mfp_suspend      NULL
 #define pxa2xx_mfp_resume       NULL
 #endif
 
-struct sysdev_class pxa2xx_mfp_sysclass = {
-        .name           = "mfp",
+struct syscore_ops pxa2xx_mfp_syscore_ops = {
         .suspend        = pxa2xx_mfp_suspend,
         .resume         = pxa2xx_mfp_resume,
 };
@@ -409,6 +407,6 @@ static int __init pxa2xx_mfp_init(void)
         for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
                 gpdr_lpm[i] = GPDR(i * 32);
 
-        return sysdev_class_register(&pxa2xx_mfp_sysclass);
+        return 0;
 }
 postcore_initcall(pxa2xx_mfp_init);
diff --git a/arch/arm/mach-pxa/mfp-pxa3xx.c b/arch/arm/mach-pxa/mfp-pxa3xx.c
index 7a270eecd480..89863a01ecd7 100644
--- a/arch/arm/mach-pxa/mfp-pxa3xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa3xx.c
@@ -17,7 +17,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/io.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 
 #include <mach/hardware.h>
 #include <mach/mfp-pxa3xx.h>
@@ -31,13 +31,13 @@
  * a pull-down mode if they're an active low chip select, and we're
  * just entering standby.
  */
-static int pxa3xx_mfp_suspend(struct sys_device *d, pm_message_t state)
+static int pxa3xx_mfp_suspend(void)
 {
         mfp_config_lpm();
         return 0;
 }
 
-static int pxa3xx_mfp_resume(struct sys_device *d)
+static void pxa3xx_mfp_resume(void)
 {
         mfp_config_run();
 
@@ -47,24 +47,13 @@ static int pxa3xx_mfp_resume(struct sys_device *d)
          * preserve them here in case they will be referenced later
          */
         ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
-        return 0;
 }
 #else
 #define pxa3xx_mfp_suspend      NULL
 #define pxa3xx_mfp_resume       NULL
 #endif
 
-struct sysdev_class pxa3xx_mfp_sysclass = {
-        .name           = "mfp",
+struct syscore_ops pxa3xx_mfp_syscore_ops = {
         .suspend        = pxa3xx_mfp_suspend,
-        .resume         = pxa3xx_mfp_resume,
+        .resume         = pxa3xx_mfp_resume,
 };
-
-static int __init mfp_init_devicefs(void)
-{
-        if (cpu_is_pxa3xx())
-                return sysdev_class_register(&pxa3xx_mfp_sysclass);
-
-        return 0;
-}
-postcore_initcall(mfp_init_devicefs);
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 23925db8ff74..e3470137c934 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -22,7 +22,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/input.h>
 #include <linux/delay.h>
 #include <linux/gpio_keys.h>
@@ -488,7 +488,7 @@ static void install_bootstrap(void)
 }
 
 
-static int mioa701_sys_suspend(struct sys_device *sysdev, pm_message_t state)
+static int mioa701_sys_suspend(void)
 {
         int i = 0, is_bt_on;
         u32 *mem_resume_vector  = phys_to_virt(RESUME_VECTOR_ADDR);
@@ -514,7 +514,7 @@ static int mioa701_sys_suspend(struct sys_device *sysdev, pm_message_t state)
         return 0;
 }
 
-static int mioa701_sys_resume(struct sys_device *sysdev)
+static void mioa701_sys_resume(void)
 {
         int i = 0;
         u32 *mem_resume_vector  = phys_to_virt(RESUME_VECTOR_ADDR);
@@ -527,43 +527,18 @@ static int mioa701_sys_resume(struct sys_device *sysdev)
         *mem_resume_enabler = save_buffer[i++];
         *mem_resume_bt      = save_buffer[i++];
         *mem_resume_unknown = save_buffer[i++];
-
-        return 0;
 }
 
-static struct sysdev_class mioa701_sysclass = {
-        .name = "mioa701",
-};
-
-static struct sys_device sysdev_bootstrap = {
-        .cls            = &mioa701_sysclass,
-};
-
-static struct sysdev_driver driver_bootstrap = {
-        .suspend        = &mioa701_sys_suspend,
-        .resume         = &mioa701_sys_resume,
+static struct syscore_ops mioa701_syscore_ops = {
+        .suspend        = mioa701_sys_suspend,
+        .resume         = mioa701_sys_resume,
 };
 
 static int __init bootstrap_init(void)
 {
-        int rc;
         int save_size = mioa701_bootstrap_lg + (sizeof(u32) * 3);
 
-        rc = sysdev_class_register(&mioa701_sysclass);
-        if (rc) {
-                printk(KERN_ERR "Failed registering mioa701 sys class\n");
-                return -ENODEV;
-        }
-        rc = sysdev_register(&sysdev_bootstrap);
-        if (rc) {
-                printk(KERN_ERR "Failed registering mioa701 sys device\n");
-                return -ENODEV;
-        }
-        rc = sysdev_driver_register(&mioa701_sysclass, &driver_bootstrap);
-        if (rc) {
-                printk(KERN_ERR "Failed registering PMU sys driver\n");
-                return -ENODEV;
-        }
+        register_syscore_ops(&mioa701_syscore_ops);
 
         save_buffer = kmalloc(save_size, GFP_KERNEL);
         if (!save_buffer)
@@ -576,9 +551,7 @@ static int __init bootstrap_init(void)
 static void bootstrap_exit(void)
 {
         kfree(save_buffer);
-        sysdev_driver_unregister(&mioa701_sysclass, &driver_bootstrap);
-        sysdev_unregister(&sysdev_bootstrap);
-        sysdev_class_unregister(&mioa701_sysclass);
+        unregister_syscore_ops(&mioa701_syscore_ops);
 
         printk(KERN_CRIT "Unregistering mioa701 suspend will hang next"
                "resume !!!\n");
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index a6f898cbfac9..4061ecddee70 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -24,7 +24,6 @@
 #include <linux/gpio.h>
 #include <linux/wm97xx.h>
 #include <linux/power_supply.h>
-#include <linux/sysdev.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c
index 8aadad55fbe4..20d1b18b1733 100644
--- a/arch/arm/mach-pxa/palmtreo.c
+++ b/arch/arm/mach-pxa/palmtreo.c
@@ -25,7 +25,6 @@
 #include <linux/pwm_backlight.h>
 #include <linux/gpio.h>
 #include <linux/power_supply.h>
-#include <linux/sysdev.h>
 #include <linux/w1-gpio.h>
 
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index 3b8a4f37dbbe..65f24f0b77e8 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -19,7 +19,7 @@
  */
 
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/delay.h>
 #include <linux/irq.h>
 #include <linux/gpio_keys.h>
@@ -233,9 +233,9 @@ static struct palmz72_resume_info palmz72_resume_info = {
 
 static unsigned long store_ptr;
 
-/* sys_device for Palm Zire 72 PM */
+/* syscore_ops for Palm Zire 72 PM */
 
-static int palmz72_pm_suspend(struct sys_device *dev, pm_message_t msg)
+static int palmz72_pm_suspend(void)
 {
         /* setup the resume_info struct for the original bootloader */
         palmz72_resume_info.resume_addr = (u32) cpu_resume;
@@ -249,31 +249,23 @@ static int palmz72_pm_suspend(struct sys_device *dev, pm_message_t msg)
         return 0;
 }
 
-static int palmz72_pm_resume(struct sys_device *dev)
+static void palmz72_pm_resume(void)
 {
         *PALMZ72_SAVE_DWORD = store_ptr;
-        return 0;
 }
 
-static struct sysdev_class palmz72_pm_sysclass = {
-        .name = "palmz72_pm",
+static struct syscore_ops palmz72_pm_syscore_ops = {
         .suspend = palmz72_pm_suspend,
         .resume = palmz72_pm_resume,
 };
 
-static struct sys_device palmz72_pm_device = {
-        .cls = &palmz72_pm_sysclass,
-};
-
 static int __init palmz72_pm_init(void)
 {
-        int ret = -ENODEV;
         if (machine_is_palmz72()) {
-                ret = sysdev_class_register(&palmz72_pm_sysclass);
-                if (ret == 0)
-                        ret = sysdev_register(&palmz72_pm_device);
+                register_syscore_ops(&palmz72_pm_syscore_ops);
+                return 0;
         }
-        return ret;
+        return -ENODEV;
 }
 
 device_initcall(palmz72_pm_init);
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index a4af8c52d7ee..fed363cec9c6 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -21,7 +21,7 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/suspend.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/irq.h>
 
 #include <asm/mach/map.h>
@@ -350,21 +350,9 @@ static struct platform_device *pxa25x_devices[] __initdata = {
         &pxa_device_asoc_platform,
 };
 
-static struct sys_device pxa25x_sysdev[] = {
-        {
-                .cls    = &pxa_irq_sysclass,
-        }, {
-                .cls    = &pxa2xx_mfp_sysclass,
-        }, {
-                .cls    = &pxa_gpio_sysclass,
-        }, {
-                .cls    = &pxa2xx_clock_sysclass,
-        }
-};
-
 static int __init pxa25x_init(void)
 {
-        int i, ret = 0;
+        int ret = 0;
 
         if (cpu_is_pxa25x()) {
 
@@ -377,11 +365,10 @@ static int __init pxa25x_init(void)
 
                 pxa25x_init_pm();
 
-                for (i = 0; i < ARRAY_SIZE(pxa25x_sysdev); i++) {
-                        ret = sysdev_register(&pxa25x_sysdev[i]);
-                        if (ret)
-                                pr_err("failed to register sysdev[%d]\n", i);
-                }
+                register_syscore_ops(&pxa_irq_syscore_ops);
+                register_syscore_ops(&pxa2xx_mfp_syscore_ops);
+                register_syscore_ops(&pxa_gpio_syscore_ops);
+                register_syscore_ops(&pxa2xx_clock_syscore_ops);
 
                 ret = platform_add_devices(pxa25x_devices,
                                            ARRAY_SIZE(pxa25x_devices));
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 909756eaf4b7..2fecbec58d88 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -16,7 +16,7 @@
 #include <linux/init.h>
 #include <linux/suspend.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/i2c/pxa-i2c.h>
@@ -428,21 +428,9 @@ static struct platform_device *devices[] __initdata = {
         &pxa27x_device_pwm1,
 };
 
-static struct sys_device pxa27x_sysdev[] = {
-        {
-                .cls    = &pxa_irq_sysclass,
-        }, {
-                .cls    = &pxa2xx_mfp_sysclass,
-        }, {
-                .cls    = &pxa_gpio_sysclass,
-        }, {
-                .cls    = &pxa2xx_clock_sysclass,
-        }
-};
-
 static int __init pxa27x_init(void)
 {
-        int i, ret = 0;
+        int ret = 0;
 
         if (cpu_is_pxa27x()) {
 
@@ -455,11 +443,10 @@ static int __init pxa27x_init(void)
 
                 pxa27x_init_pm();
 
-                for (i = 0; i < ARRAY_SIZE(pxa27x_sysdev); i++) {
-                        ret = sysdev_register(&pxa27x_sysdev[i]);
-                        if (ret)
-                                pr_err("failed to register sysdev[%d]\n", i);
-                }
+                register_syscore_ops(&pxa_irq_syscore_ops);
+                register_syscore_ops(&pxa2xx_mfp_syscore_ops);
+                register_syscore_ops(&pxa_gpio_syscore_ops);
+                register_syscore_ops(&pxa2xx_clock_syscore_ops);
 
                 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
         }
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 8dd107391157..8521d7d6f1da 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -20,7 +20,7 @@
 #include <linux/platform_device.h>
 #include <linux/irq.h>
 #include <linux/io.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/i2c/pxa-i2c.h>
 
 #include <asm/mach/map.h>
@@ -427,21 +427,9 @@ static struct platform_device *devices[] __initdata = {
         &pxa27x_device_pwm1,
 };
 
-static struct sys_device pxa3xx_sysdev[] = {
-        {
-                .cls    = &pxa_irq_sysclass,
-        }, {
-                .cls    = &pxa3xx_mfp_sysclass,
-        }, {
-                .cls    = &pxa_gpio_sysclass,
-        }, {
-                .cls    = &pxa3xx_clock_sysclass,
-        }
-};
-
 static int __init pxa3xx_init(void)
 {
-        int i, ret = 0;
+        int ret = 0;
 
         if (cpu_is_pxa3xx()) {
 
@@ -462,11 +450,10 @@ static int __init pxa3xx_init(void)
 
                 pxa3xx_init_pm();
 
-                for (i = 0; i < ARRAY_SIZE(pxa3xx_sysdev); i++) {
-                        ret = sysdev_register(&pxa3xx_sysdev[i]);
-                        if (ret)
-                                pr_err("failed to register sysdev[%d]\n", i);
-                }
+                register_syscore_ops(&pxa_irq_syscore_ops);
+                register_syscore_ops(&pxa3xx_mfp_syscore_ops);
+                register_syscore_ops(&pxa_gpio_syscore_ops);
+                register_syscore_ops(&pxa3xx_clock_syscore_ops);
 
                 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
         }
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index 23b229bd06e9..ecc82a330fad 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -18,7 +18,7 @@
 #include <linux/i2c/pxa-i2c.h>
 #include <linux/irq.h>
 #include <linux/io.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 
 #include <mach/hardware.h>
 #include <mach/gpio.h>
@@ -260,16 +260,6 @@ static struct platform_device *devices[] __initdata = {
         &pxa27x_device_pwm1,
 };
 
-static struct sys_device pxa95x_sysdev[] = {
-        {
-                .cls    = &pxa_irq_sysclass,
-        }, {
-                .cls    = &pxa_gpio_sysclass,
-        }, {
-                .cls    = &pxa3xx_clock_sysclass,
-        }
-};
-
 static int __init pxa95x_init(void)
 {
         int ret = 0, i;
@@ -293,11 +283,9 @@ static int __init pxa95x_init(void)
                 if ((ret = pxa_init_dma(IRQ_DMA, 32)))
                         return ret;
 
-                for (i = 0; i < ARRAY_SIZE(pxa95x_sysdev); i++) {
-                        ret = sysdev_register(&pxa95x_sysdev[i]);
-                        if (ret)
-                                pr_err("failed to register sysdev[%d]\n", i);
-                }
+                register_syscore_ops(&pxa_irq_syscore_ops);
+                register_syscore_ops(&pxa_gpio_syscore_ops);
+                register_syscore_ops(&pxa3xx_clock_syscore_ops);
 
                 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
         }
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index cd1861351f75..d130f77b6d11 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -18,7 +18,6 @@
 
 #include <linux/init.h>
 #include <linux/kernel.h>
-#include <linux/sysdev.h>
 #include <linux/platform_device.h>
 #include <linux/interrupt.h>
 #include <linux/gpio.h>
diff --git a/arch/arm/mach-pxa/smemc.c b/arch/arm/mach-pxa/smemc.c
index 232b7316ec08..79923058d10f 100644
--- a/arch/arm/mach-pxa/smemc.c
+++ b/arch/arm/mach-pxa/smemc.c
@@ -6,7 +6,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/io.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 
 #include <mach/hardware.h>
 #include <mach/smemc.h>
@@ -16,7 +16,7 @@ static unsigned long msc[2];
 static unsigned long sxcnfg, memclkcfg;
 static unsigned long csadrcfg[4];
 
-static int pxa3xx_smemc_suspend(struct sys_device *dev, pm_message_t state)
+static int pxa3xx_smemc_suspend(void)
 {
         msc[0] = __raw_readl(MSC0);
         msc[1] = __raw_readl(MSC1);
@@ -30,7 +30,7 @@ static int pxa3xx_smemc_suspend(struct sys_device *dev, pm_message_t state)
         return 0;
 }
 
-static int pxa3xx_smemc_resume(struct sys_device *dev)
+static void pxa3xx_smemc_resume(void)
 {
         __raw_writel(msc[0], MSC0);
         __raw_writel(msc[1], MSC1);
@@ -40,34 +40,19 @@ static int pxa3xx_smemc_resume(struct sys_device *dev)
         __raw_writel(csadrcfg[1], CSADRCFG1);
         __raw_writel(csadrcfg[2], CSADRCFG2);
         __raw_writel(csadrcfg[3], CSADRCFG3);
-
-        return 0;
 }
 
-static struct sysdev_class smemc_sysclass = {
-        .name           = "smemc",
+static struct syscore_ops smemc_syscore_ops = {
         .suspend        = pxa3xx_smemc_suspend,
         .resume         = pxa3xx_smemc_resume,
 };
 
-static struct sys_device smemc_sysdev = {
-        .id             = 0,
-        .cls            = &smemc_sysclass,
-};
-
 static int __init smemc_init(void)
 {
-        int ret = 0;
+        if (cpu_is_pxa3xx())
+                register_syscore_ops(&smemc_syscore_ops);
 
-        if (cpu_is_pxa3xx()) {
-                ret = sysdev_class_register(&smemc_sysclass);
-                if (ret)
-                        return ret;
-
-                ret = sysdev_register(&smemc_sysdev);
-        }
-
-        return ret;
+        return 0;
 }
 subsys_initcall(smemc_init);
 #endif
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index b9cfbebdfe9c..687417a93698 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -15,7 +15,6 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
 #include <linux/interrupt.h>
 #include <linux/sched.h>
 #include <linux/bitops.h>
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index b523f119e0f0..903218eab56d 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -44,6 +44,7 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
+#include <linux/syscore_ops.h>
 
 #include <mach/pxa25x.h>
 #include <mach/audio.h>
@@ -130,20 +131,19 @@ static u8 viper_hw_version(void)
         return v1;
 }
 
-/* CPU sysdev */
-static int viper_cpu_suspend(struct sys_device *sysdev, pm_message_t state)
+/* CPU system core operations. */
+static int viper_cpu_suspend(void)
 {
         viper_icr_set_bit(VIPER_ICR_R_DIS);
         return 0;
 }
 
-static int viper_cpu_resume(struct sys_device *sysdev)
+static void viper_cpu_resume(void)
 {
         viper_icr_clear_bit(VIPER_ICR_R_DIS);
-        return 0;
 }
 
-static struct sysdev_driver viper_cpu_sysdev_driver = {
+static struct syscore_ops viper_cpu_syscore_ops = {
         .suspend        = viper_cpu_suspend,
         .resume         = viper_cpu_resume,
 };
@@ -945,7 +945,7 @@ static void __init viper_init(void)
         viper_init_vcore_gpios();
         viper_init_cpufreq();
 
-        sysdev_driver_register(&cpu_sysdev_class, &viper_cpu_sysdev_driver);
+        register_syscore_ops(&viper_cpu_syscore_ops);
 
         if (version) {
                 pr_info("viper: hardware v%di%d detected. "
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index f71d377c8640..67bd41488bf8 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -16,7 +16,6 @@
 #include <linux/gpio_keys.h>
 #include <linux/input.h>
 #include <linux/gpio.h>
-#include <linux/sysdev.h>
 #include <linux/usb/gpio_vbus.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
diff --git a/arch/arm/mach-realview/include/mach/barriers.h b/arch/arm/mach-realview/include/mach/barriers.h
index 0c5d749d7b5f..9a732195aa1c 100644
--- a/arch/arm/mach-realview/include/mach/barriers.h
+++ b/arch/arm/mach-realview/include/mach/barriers.h
@@ -4,5 +4,5 @@
  * operation to deadlock the system.
  */
 #define mb()            dsb()
-#define rmb()           dmb()
+#define rmb()           dsb()
 #define wmb()           mb()
diff --git a/arch/arm/mach-s3c2410/irq.c b/arch/arm/mach-s3c2410/irq.c
index 5e2f35332056..2854129f8cc7 100644
--- a/arch/arm/mach-s3c2410/irq.c
+++ b/arch/arm/mach-s3c2410/irq.c
@@ -23,38 +23,12 @@
 #include <linux/module.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 
 #include <plat/cpu.h>
 #include <plat/pm.h>
 
-static int s3c2410_irq_add(struct sys_device *sysdev)
-{
-        return 0;
-}
-
-static struct sysdev_driver s3c2410_irq_driver = {
-        .add            = s3c2410_irq_add,
+struct syscore_ops s3c24xx_irq_syscore_ops = {
         .suspend        = s3c24xx_irq_suspend,
         .resume         = s3c24xx_irq_resume,
 };
-
-static int __init s3c2410_irq_init(void)
-{
-        return sysdev_driver_register(&s3c2410_sysclass, &s3c2410_irq_driver);
-}
-
-arch_initcall(s3c2410_irq_init);
-
-static struct sysdev_driver s3c2410a_irq_driver = {
-        .add            = s3c2410_irq_add,
-        .suspend        = s3c24xx_irq_suspend,
-        .resume         = s3c24xx_irq_resume,
-};
-
-static int __init s3c2410a_irq_init(void)
-{
-        return sysdev_driver_register(&s3c2410a_sysclass, &s3c2410a_irq_driver);
-}
-
-arch_initcall(s3c2410a_irq_init);
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 2970ea9f7c2b..1e2d536adda9 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -17,7 +17,7 @@
 #include <linux/timer.h>
 #include <linux/init.h>
 #include <linux/gpio.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 #include <linux/dm9000.h>
@@ -214,17 +214,16 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
 /* NAND Flash on BAST board */
 
 #ifdef CONFIG_PM
-static int bast_pm_suspend(struct sys_device *sd, pm_message_t state)
+static int bast_pm_suspend(void)
 {
         /* ensure that an nRESET is not generated on resume. */
         gpio_direction_output(S3C2410_GPA(21), 1);
         return 0;
 }
 
-static int bast_pm_resume(struct sys_device *sd)
+static void bast_pm_resume(void)
 {
         s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT);
-        return 0;
 }
 
 #else
@@ -232,16 +231,11 @@ static int bast_pm_resume(struct sys_device *sd)
 #define bast_pm_resume NULL
 #endif
 
-static struct sysdev_class bast_pm_sysclass = {
-        .name           = "mach-bast",
+static struct syscore_ops bast_pm_syscore_ops = {
         .suspend        = bast_pm_suspend,
         .resume         = bast_pm_resume,
 };
 
-static struct sys_device bast_pm_sysdev = {
-        .cls            = &bast_pm_sysclass,
-};
-
 static int smartmedia_map[] = { 0 };
 static int chip0_map[] = { 1 };
 static int chip1_map[] = { 2 };
@@ -642,8 +636,7 @@ static void __init bast_map_io(void)
 
 static void __init bast_init(void)
 {
-        sysdev_class_register(&bast_pm_sysclass);
-        sysdev_register(&bast_pm_sysdev);
+        register_syscore_ops(&bast_pm_syscore_ops);
 
         s3c_i2c0_set_platdata(&bast_i2c_info);
         s3c_nand_set_platdata(&bast_nand_info);
diff --git a/arch/arm/mach-s3c2410/pm.c b/arch/arm/mach-s3c2410/pm.c
index 725636fc4dc3..4728f9aa7df1 100644
--- a/arch/arm/mach-s3c2410/pm.c
+++ b/arch/arm/mach-s3c2410/pm.c
@@ -25,6 +25,7 @@
 #include <linux/errno.h>
 #include <linux/time.h>
 #include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/gpio.h>
 #include <linux/io.h>
 
@@ -92,7 +93,7 @@ static void s3c2410_pm_prepare(void)
         }
 }
 
-static int s3c2410_pm_resume(struct sys_device *dev)
+static void s3c2410_pm_resume(void)
 {
         unsigned long tmp;
 
@@ -104,10 +105,12 @@ static int s3c2410_pm_resume(struct sys_device *dev)
 
         if ( machine_is_aml_m5900() )
                 s3c2410_gpio_setpin(S3C2410_GPF(2), 0);
-
-        return 0;
 }
 
+struct syscore_ops s3c2410_pm_syscore_ops = {
+        .resume         = s3c2410_pm_resume,
+};
+
 static int s3c2410_pm_add(struct sys_device *dev)
 {
         pm_cpu_prep = s3c2410_pm_prepare;
@@ -119,7 +122,6 @@ static int s3c2410_pm_add(struct sys_device *dev)
 #if defined(CONFIG_CPU_S3C2410)
 static struct sysdev_driver s3c2410_pm_driver = {
         .add            = s3c2410_pm_add,
-        .resume         = s3c2410_pm_resume,
 };
 
 /* register ourselves */
@@ -133,7 +135,6 @@ arch_initcall(s3c2410_pm_drvinit);
 
 static struct sysdev_driver s3c2410a_pm_driver = {
         .add            = s3c2410_pm_add,
-        .resume         = s3c2410_pm_resume,
 };
 
 static int __init s3c2410a_pm_drvinit(void)
@@ -147,7 +148,6 @@ arch_initcall(s3c2410a_pm_drvinit);
 #if defined(CONFIG_CPU_S3C2440)
 static struct sysdev_driver s3c2440_pm_driver = {
         .add            = s3c2410_pm_add,
-        .resume         = s3c2410_pm_resume,
 };
 
 static int __init s3c2440_pm_drvinit(void)
@@ -161,7 +161,6 @@ arch_initcall(s3c2440_pm_drvinit);
 #if defined(CONFIG_CPU_S3C2442)
 static struct sysdev_driver s3c2442_pm_driver = {
         .add            = s3c2410_pm_add,
-        .resume         = s3c2410_pm_resume,
 };
 
 static int __init s3c2442_pm_drvinit(void)
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index adc90a3c5890..f1d3bd8f6f17 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -19,6 +19,7 @@
 #include <linux/gpio.h>
 #include <linux/clk.h>
 #include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
@@ -40,6 +41,7 @@
 #include <plat/devs.h>
 #include <plat/clock.h>
 #include <plat/pll.h>
+#include <plat/pm.h>
 
 #include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
@@ -168,6 +170,9 @@ int __init s3c2410_init(void)
 {
         printk("S3C2410: Initialising architecture\n");
 
+        register_syscore_ops(&s3c2410_pm_syscore_ops);
+        register_syscore_ops(&s3c24xx_irq_syscore_ops);
+
         return sysdev_register(&s3c2410_sysdev);
 }
 
diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c
index f3355d2ec634..1a1aa220972b 100644
--- a/arch/arm/mach-s3c2412/irq.c
+++ b/arch/arm/mach-s3c2412/irq.c
@@ -202,8 +202,6 @@ static int s3c2412_irq_add(struct sys_device *sysdev)
 
 static struct sysdev_driver s3c2412_irq_driver = {
         .add            = s3c2412_irq_add,
-        .suspend        = s3c24xx_irq_suspend,
-        .resume         = s3c24xx_irq_resume,
 };
 
 static int s3c2412_irq_init(void)
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c
index 923e01bdf017..85dcaeb9e62f 100644
--- a/arch/arm/mach-s3c2412/mach-jive.c
+++ b/arch/arm/mach-s3c2412/mach-jive.c
@@ -17,7 +17,7 @@
 #include <linux/timer.h>
 #include <linux/init.h>
 #include <linux/gpio.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 #include <linux/i2c.h>
@@ -486,7 +486,7 @@ static struct s3c2410_udc_mach_info jive_udc_cfg __initdata = {
 /* Jive power management device */
 
 #ifdef CONFIG_PM
-static int jive_pm_suspend(struct sys_device *sd, pm_message_t state)
+static int jive_pm_suspend(void)
 {
         /* Write the magic value u-boot uses to check for resume into
          * the INFORM0 register, and ensure INFORM1 is set to the
@@ -498,10 +498,9 @@ static int jive_pm_suspend(struct sys_device *sd, pm_message_t state)
         return 0;
 }
 
-static int jive_pm_resume(struct sys_device *sd)
+static void jive_pm_resume(void)
 {
         __raw_writel(0x0, S3C2412_INFORM0);
-        return 0;
 }
 
 #else
@@ -509,16 +508,11 @@ static int jive_pm_resume(struct sys_device *sd)
 #define jive_pm_resume NULL
 #endif
 
-static struct sysdev_class jive_pm_sysclass = {
-        .name           = "jive-pm",
+static struct syscore_ops jive_pm_syscore_ops = {
         .suspend        = jive_pm_suspend,
         .resume         = jive_pm_resume,
 };
 
-static struct sys_device jive_pm_sysdev = {
-        .cls            = &jive_pm_sysclass,
-};
-
 static void __init jive_map_io(void)
 {
         s3c24xx_init_io(jive_iodesc, ARRAY_SIZE(jive_iodesc));
@@ -536,10 +530,9 @@ static void jive_power_off(void)
 
 static void __init jive_machine_init(void)
 {
-        /* register system devices for managing low level suspend */
+        /* register system core operations for managing low level suspend */
 
-        sysdev_class_register(&jive_pm_sysclass);
-        sysdev_register(&jive_pm_sysdev);
+        register_syscore_ops(&jive_pm_syscore_ops);
 
         /* write our sleep configurations for the IO. Pull down all unused
          * IO, ensure that we have turned off all peripherals we do not
diff --git a/arch/arm/mach-s3c2412/pm.c b/arch/arm/mach-s3c2412/pm.c
index a7417c479ffe..752b13a7b3db 100644
--- a/arch/arm/mach-s3c2412/pm.c
+++ b/arch/arm/mach-s3c2412/pm.c
@@ -17,6 +17,7 @@
 #include <linux/timer.h>
 #include <linux/init.h>
 #include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
 
@@ -86,13 +87,24 @@ static struct sleep_save s3c2412_sleep[] = {
         SAVE_ITEM(S3C2413_GPJSLPCON),
 };
 
-static int s3c2412_pm_suspend(struct sys_device *dev, pm_message_t state)
+static struct sysdev_driver s3c2412_pm_driver = {
+        .add            = s3c2412_pm_add,
+};
+
+static __init int s3c2412_pm_init(void)
+{
+        return sysdev_driver_register(&s3c2412_sysclass, &s3c2412_pm_driver);
+}
+
+arch_initcall(s3c2412_pm_init);
+
+static int s3c2412_pm_suspend(void)
 {
         s3c_pm_do_save(s3c2412_sleep, ARRAY_SIZE(s3c2412_sleep));
         return 0;
 }
 
-static int s3c2412_pm_resume(struct sys_device *dev)
+static void s3c2412_pm_resume(void)
 {
         unsigned long tmp;
 
@@ -102,18 +114,9 @@ static int s3c2412_pm_resume(struct sys_device *dev)
         __raw_writel(tmp, S3C2412_PWRCFG);
 
         s3c_pm_do_restore(s3c2412_sleep, ARRAY_SIZE(s3c2412_sleep));
-        return 0;
 }
 
-static struct sysdev_driver s3c2412_pm_driver = {
-        .add            = s3c2412_pm_add,
+struct syscore_ops s3c2412_pm_syscore_ops = {
         .suspend        = s3c2412_pm_suspend,
         .resume         = s3c2412_pm_resume,
 };
-
-static __init int s3c2412_pm_init(void)
-{
-        return sysdev_driver_register(&s3c2412_sysclass, &s3c2412_pm_driver);
-}
-
-arch_initcall(s3c2412_pm_init);
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index 4c6df51ddf33..ef0958d3e5c6 100644
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -19,6 +19,7 @@
 #include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
@@ -244,5 +245,8 @@ int __init s3c2412_init(void)
 {
         printk("S3C2412: Initialising architecture\n");
 
+        register_syscore_ops(&s3c2412_pm_syscore_ops);
+        register_syscore_ops(&s3c24xx_irq_syscore_ops);
+
         return sysdev_register(&s3c2412_sysdev);
 }
diff --git a/arch/arm/mach-s3c2416/irq.c b/arch/arm/mach-s3c2416/irq.c
index 77b38f2381c1..28ad20d42445 100644
--- a/arch/arm/mach-s3c2416/irq.c
+++ b/arch/arm/mach-s3c2416/irq.c
@@ -236,8 +236,6 @@ static int __init s3c2416_irq_add(struct sys_device *sysdev)
 
 static struct sysdev_driver s3c2416_irq_driver = {
         .add            = s3c2416_irq_add,
-        .suspend        = s3c24xx_irq_suspend,
-        .resume         = s3c24xx_irq_resume,
 };
 
 static int __init s3c2416_irq_init(void)
diff --git a/arch/arm/mach-s3c2416/pm.c b/arch/arm/mach-s3c2416/pm.c
index 4a04205b04d5..41db2b21e213 100644
--- a/arch/arm/mach-s3c2416/pm.c
+++ b/arch/arm/mach-s3c2416/pm.c
@@ -11,6 +11,7 @@
 */
 
 #include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/io.h>
 
 #include <asm/cacheflush.h>
@@ -55,30 +56,26 @@ static int s3c2416_pm_add(struct sys_device *sysdev)
         return 0;
 }
 
-static int s3c2416_pm_suspend(struct sys_device *dev, pm_message_t state)
+static struct sysdev_driver s3c2416_pm_driver = {
+        .add            = s3c2416_pm_add,
+};
+
+static __init int s3c2416_pm_init(void)
 {
-        return 0;
+        return sysdev_driver_register(&s3c2416_sysclass, &s3c2416_pm_driver);
 }
 
-static int s3c2416_pm_resume(struct sys_device *dev)
+arch_initcall(s3c2416_pm_init);
+
+
+static void s3c2416_pm_resume(void)
 {
         /* unset the return-from-sleep amd inform flags */
         __raw_writel(0x0, S3C2443_PWRMODE);
         __raw_writel(0x0, S3C2412_INFORM0);
         __raw_writel(0x0, S3C2412_INFORM1);
-
-        return 0;
 }
 
-static struct sysdev_driver s3c2416_pm_driver = {
-        .add            = s3c2416_pm_add,
-        .suspend        = s3c2416_pm_suspend,
+struct syscore_ops s3c2416_pm_syscore_ops = {
         .resume         = s3c2416_pm_resume,
 };
-
-static __init int s3c2416_pm_init(void)
-{
-        return sysdev_driver_register(&s3c2416_sysclass, &s3c2416_pm_driver);
-}
-
-arch_initcall(s3c2416_pm_init);
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c
index ba7fd8737434..494ce913dc95 100644
--- a/arch/arm/mach-s3c2416/s3c2416.c
+++ b/arch/arm/mach-s3c2416/s3c2416.c
@@ -32,6 +32,7 @@
 #include <linux/platform_device.h>
 #include <linux/serial_core.h>
 #include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/clk.h>
 #include <linux/io.h>
 
@@ -54,6 +55,7 @@
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/sdhci.h>
+#include <plat/pm.h>
 
 #include <plat/iic-core.h>
 #include <plat/fb-core.h>
@@ -95,6 +97,9 @@ int __init s3c2416_init(void)
 
         s3c_fb_setname("s3c2443-fb");
 
+        register_syscore_ops(&s3c2416_pm_syscore_ops);
+        register_syscore_ops(&s3c24xx_irq_syscore_ops);
+
         return sysdev_register(&s3c2416_sysdev);
 }
 
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index 14dc67897757..d88536393310 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -17,7 +17,7 @@
 #include <linux/init.h>
 #include <linux/gpio.h>
 #include <linux/device.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/serial_core.h>
 #include <linux/clk.h>
 #include <linux/i2c.h>
@@ -284,7 +284,7 @@ static struct platform_device osiris_pcmcia = {
 #ifdef CONFIG_PM
 static unsigned char pm_osiris_ctrl0;
 
-static int osiris_pm_suspend(struct sys_device *sd, pm_message_t state)
+static int osiris_pm_suspend(void)
 {
         unsigned int tmp;
 
@@ -304,7 +304,7 @@ static int osiris_pm_suspend(struct sys_device *sd, pm_message_t state)
         return 0;
 }
 
-static int osiris_pm_resume(struct sys_device *sd)
+static void osiris_pm_resume(void)
 {
         if (pm_osiris_ctrl0 & OSIRIS_CTRL0_FIX8)
                 __raw_writeb(OSIRIS_CTRL1_FIX8, OSIRIS_VA_CTRL1);
@@ -312,8 +312,6 @@ static int osiris_pm_resume(struct sys_device *sd)
         __raw_writeb(pm_osiris_ctrl0, OSIRIS_VA_CTRL0);
 
         s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT);
-
-        return 0;
 }
 
 #else
@@ -321,16 +319,11 @@ static int osiris_pm_resume(struct sys_device *sd)
 #define osiris_pm_resume NULL
 #endif
 
-static struct sysdev_class osiris_pm_sysclass = {
-        .name           = "mach-osiris",
+static struct syscore_ops osiris_pm_syscore_ops = {
         .suspend        = osiris_pm_suspend,
         .resume         = osiris_pm_resume,
 };
 
-static struct sys_device osiris_pm_sysdev = {
-        .cls            = &osiris_pm_sysclass,
-};
-
 /* Link for DVS driver to TPS65011 */
 
 static void osiris_tps_release(struct device *dev)
@@ -439,8 +432,7 @@ static void __init osiris_map_io(void)
 
 static void __init osiris_init(void)
 {
-        sysdev_class_register(&osiris_pm_sysclass);
-        sysdev_register(&osiris_pm_sysdev);
+        register_syscore_ops(&osiris_pm_syscore_ops);
 
         s3c_i2c0_set_platdata(NULL);
         s3c_nand_set_platdata(&osiris_nand_info);
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index f7663f731ea0..ce99ff72838d 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -19,6 +19,7 @@
 #include <linux/platform_device.h>
 #include <linux/serial_core.h>
 #include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/gpio.h>
 #include <linux/clk.h>
 #include <linux/io.h>
@@ -33,6 +34,7 @@
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/s3c244x.h>
+#include <plat/pm.h>
 
 #include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
@@ -51,6 +53,12 @@ int __init s3c2440_init(void)
         s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT;
         s3c_device_wdt.resource[1].end   = IRQ_S3C2440_WDT;
 
+        /* register suspend/resume handlers */
+
+        register_syscore_ops(&s3c2410_pm_syscore_ops);
+        register_syscore_ops(&s3c244x_pm_syscore_ops);
+        register_syscore_ops(&s3c24xx_irq_syscore_ops);
+
         /* register our system device for everything else */
 
         return sysdev_register(&s3c2440_sysdev);
diff --git a/arch/arm/mach-s3c2440/s3c2442.c b/arch/arm/mach-s3c2440/s3c2442.c
index ecf813546554..6224bad4d604 100644
--- a/arch/arm/mach-s3c2440/s3c2442.c
+++ b/arch/arm/mach-s3c2440/s3c2442.c
@@ -29,6 +29,7 @@
 #include <linux/err.h>
 #include <linux/device.h>
 #include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
 #include <linux/mutex.h>
@@ -45,6 +46,7 @@
 #include <plat/clock.h>
 #include <plat/cpu.h>
 #include <plat/s3c244x.h>
+#include <plat/pm.h>
 
 #include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
@@ -167,6 +169,10 @@ int __init s3c2442_init(void)
 {
         printk("S3C2442: Initialising architecture\n");
 
+        register_syscore_ops(&s3c2410_pm_syscore_ops);
+        register_syscore_ops(&s3c244x_pm_syscore_ops);
+        register_syscore_ops(&s3c24xx_irq_syscore_ops);
+
         return sysdev_register(&s3c2442_sysdev);
 }
 
diff --git a/arch/arm/mach-s3c2440/s3c244x-irq.c b/arch/arm/mach-s3c2440/s3c244x-irq.c
index de07c2feaa32..c63e8f26d901 100644
--- a/arch/arm/mach-s3c2440/s3c244x-irq.c
+++ b/arch/arm/mach-s3c2440/s3c244x-irq.c
@@ -116,8 +116,6 @@ static int s3c244x_irq_add(struct sys_device *sysdev)
 
 static struct sysdev_driver s3c2440_irq_driver = {
         .add            = s3c244x_irq_add,
-        .suspend        = s3c24xx_irq_suspend,
-        .resume         = s3c24xx_irq_resume,
 };
 
 static int s3c2440_irq_init(void)
@@ -129,8 +127,6 @@ arch_initcall(s3c2440_irq_init);
 
 static struct sysdev_driver s3c2442_irq_driver = {
         .add            = s3c244x_irq_add,
-        .suspend        = s3c24xx_irq_suspend,
-        .resume         = s3c24xx_irq_resume,
 };
 
 
diff --git a/arch/arm/mach-s3c2440/s3c244x.c b/arch/arm/mach-s3c2440/s3c244x.c
index 90c1707b9c95..7e8a23d2098a 100644
--- a/arch/arm/mach-s3c2440/s3c244x.c
+++ b/arch/arm/mach-s3c2440/s3c244x.c
@@ -19,6 +19,7 @@
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 #include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/clk.h>
 #include <linux/io.h>
 
@@ -134,45 +135,14 @@ void __init s3c244x_init_clocks(int xtal)
         s3c2410_baseclk_add();
 }
 
-#ifdef CONFIG_PM
-
-static struct sleep_save s3c244x_sleep[] = {
-        SAVE_ITEM(S3C2440_DSC0),
-        SAVE_ITEM(S3C2440_DSC1),
-        SAVE_ITEM(S3C2440_GPJDAT),
-        SAVE_ITEM(S3C2440_GPJCON),
-        SAVE_ITEM(S3C2440_GPJUP)
-};
-
-static int s3c244x_suspend(struct sys_device *dev, pm_message_t state)
-{
-        s3c_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
-        return 0;
-}
-
-static int s3c244x_resume(struct sys_device *dev)
-{
-        s3c_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
-        return 0;
-}
-
-#else
-#define s3c244x_suspend NULL
-#define s3c244x_resume  NULL
-#endif
-
 /* Since the S3C2442 and S3C2440 share  items, put both sysclasses here */
 
 struct sysdev_class s3c2440_sysclass = {
         .name           = "s3c2440-core",
-        .suspend        = s3c244x_suspend,
-        .resume         = s3c244x_resume
 };
 
 struct sysdev_class s3c2442_sysclass = {
         .name           = "s3c2442-core",
-        .suspend        = s3c244x_suspend,
-        .resume         = s3c244x_resume
 };
 
 /* need to register class before we actually register the device, and
@@ -194,3 +164,33 @@ static int __init s3c2442_core_init(void)
 }
 
 core_initcall(s3c2442_core_init);
+
+
+#ifdef CONFIG_PM
+static struct sleep_save s3c244x_sleep[] = {
+        SAVE_ITEM(S3C2440_DSC0),
+        SAVE_ITEM(S3C2440_DSC1),
+        SAVE_ITEM(S3C2440_GPJDAT),
+        SAVE_ITEM(S3C2440_GPJCON),
+        SAVE_ITEM(S3C2440_GPJUP)
+};
+
+static int s3c244x_suspend(void)
+{
+        s3c_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
+        return 0;
+}
+
+static void s3c244x_resume(void)
+{
+        s3c_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
+}
+#else
+#define s3c244x_suspend NULL
+#define s3c244x_resume  NULL
+#endif
+
+struct syscore_ops s3c244x_pm_syscore_ops = {
+        .suspend        = s3c244x_suspend,
+        .resume         = s3c244x_resume,
+};
diff --git a/arch/arm/mach-s3c64xx/irq-pm.c b/arch/arm/mach-s3c64xx/irq-pm.c
index da1bec64b9da..8bec61e242c7 100644
--- a/arch/arm/mach-s3c64xx/irq-pm.c
+++ b/arch/arm/mach-s3c64xx/irq-pm.c
@@ -13,7 +13,7 @@
  */
 
 #include <linux/kernel.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/interrupt.h>
 #include <linux/serial_core.h>
 #include <linux/irq.h>
@@ -54,7 +54,7 @@ static struct irq_grp_save {
 
 static u32 irq_uart_mask[CONFIG_SERIAL_SAMSUNG_UARTS];
 
-static int s3c64xx_irq_pm_suspend(struct sys_device *dev, pm_message_t state)
+static int s3c64xx_irq_pm_suspend(void)
 {
         struct irq_grp_save *grp = eint_grp_save;
         int i;
@@ -75,7 +75,7 @@ static int s3c64xx_irq_pm_suspend(struct sys_device *dev, pm_message_t state)
         return 0;
 }
 
-static int s3c64xx_irq_pm_resume(struct sys_device *dev)
+static void s3c64xx_irq_pm_resume(void)
 {
         struct irq_grp_save *grp = eint_grp_save;
         int i;
@@ -94,18 +94,18 @@ static int s3c64xx_irq_pm_resume(struct sys_device *dev)
         }
 
         S3C_PMDBG("%s: IRQ configuration restored\n", __func__);
-        return 0;
 }
 
-static struct sysdev_driver s3c64xx_irq_driver = {
+struct syscore_ops s3c64xx_irq_syscore_ops = {
         .suspend = s3c64xx_irq_pm_suspend,
         .resume  = s3c64xx_irq_pm_resume,
 };
 
-static int __init s3c64xx_irq_pm_init(void)
+static __init int s3c64xx_syscore_init(void)
 {
-        return sysdev_driver_register(&s3c64xx_sysclass, &s3c64xx_irq_driver);
-}
+        register_syscore_ops(&s3c64xx_irq_syscore_ops);
 
-arch_initcall(s3c64xx_irq_pm_init);
+        return 0;
+}
 
+core_initcall(s3c64xx_syscore_init);
diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c
index 549d7924fd4c..24febae3d4c0 100644
--- a/arch/arm/mach-s5pv210/pm.c
+++ b/arch/arm/mach-s5pv210/pm.c
@@ -16,6 +16,7 @@
 
 #include <linux/init.h>
 #include <linux/suspend.h>
+#include <linux/syscore_ops.h>
 #include <linux/io.h>
 
 #include <plat/cpu.h>
@@ -140,7 +141,17 @@ static int s5pv210_pm_add(struct sys_device *sysdev)
         return 0;
 }
 
-static int s5pv210_pm_resume(struct sys_device *dev)
+static struct sysdev_driver s5pv210_pm_driver = {
+        .add            = s5pv210_pm_add,
+};
+
+static __init int s5pv210_pm_drvinit(void)
+{
+        return sysdev_driver_register(&s5pv210_sysclass, &s5pv210_pm_driver);
+}
+arch_initcall(s5pv210_pm_drvinit);
+
+static void s5pv210_pm_resume(void)
 {
         u32 tmp;
 
@@ -150,17 +161,15 @@ static int s5pv210_pm_resume(struct sys_device *dev)
         __raw_writel(tmp , S5P_OTHERS);
 
         s3c_pm_do_restore_core(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
-
-        return 0;
 }
 
-static struct sysdev_driver s5pv210_pm_driver = {
-        .add            = s5pv210_pm_add,
+static struct syscore_ops s5pv210_pm_syscore_ops = {
         .resume         = s5pv210_pm_resume,
 };
 
-static __init int s5pv210_pm_drvinit(void)
+static __init int s5pv210_pm_syscore_init(void)
 {
-        return sysdev_driver_register(&s5pv210_sysclass, &s5pv210_pm_driver);
+        register_syscore_ops(&s5pv210_pm_syscore_ops);
+        return 0;
 }
-arch_initcall(s5pv210_pm_drvinit);
+arch_initcall(s5pv210_pm_syscore_init);
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c
index 423ddb3d65e9..dfbf824a69fa 100644
--- a/arch/arm/mach-sa1100/irq.c
+++ b/arch/arm/mach-sa1100/irq.c
@@ -14,7 +14,7 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/ioport.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 
 #include <mach/hardware.h>
 #include <asm/mach/irq.h>
@@ -234,7 +234,7 @@ static struct sa1100irq_state {
         unsigned int    iccr;
 } sa1100irq_state;
 
-static int sa1100irq_suspend(struct sys_device *dev, pm_message_t state)
+static int sa1100irq_suspend(void)
 {
         struct sa1100irq_state *st = &sa1100irq_state;
 
@@ -264,7 +264,7 @@ static int sa1100irq_suspend(struct sys_device *dev, pm_message_t state)
         return 0;
 }
 
-static int sa1100irq_resume(struct sys_device *dev)
+static void sa1100irq_resume(void)
 {
         struct sa1100irq_state *st = &sa1100irq_state;
 
@@ -277,24 +277,17 @@ static int sa1100irq_resume(struct sys_device *dev)
 
                 ICMR = st->icmr;
         }
-        return 0;
 }
 
-static struct sysdev_class sa1100irq_sysclass = {
-        .name           = "sa11x0-irq",
+static struct syscore_ops sa1100irq_syscore_ops = {
         .suspend        = sa1100irq_suspend,
         .resume         = sa1100irq_resume,
 };
 
-static struct sys_device sa1100irq_device = {
-        .id             = 0,
-        .cls            = &sa1100irq_sysclass,
-};
-
 static int __init sa1100irq_init_devicefs(void)
 {
-        sysdev_class_register(&sa1100irq_sysclass);
-        return sysdev_register(&sa1100irq_device);
+        register_syscore_ops(&sa1100irq_syscore_ops);
+        return 0;
 }
 
 device_initcall(sa1100irq_init_devicefs);
diff --git a/arch/arm/mach-shmobile/pm_runtime.c b/arch/arm/mach-shmobile/pm_runtime.c
index 94912d3944d3..2d1b67a59e4a 100644
--- a/arch/arm/mach-shmobile/pm_runtime.c
+++ b/arch/arm/mach-shmobile/pm_runtime.c
@@ -18,152 +18,41 @@
 #include <linux/clk.h>
 #include <linux/sh_clk.h>
 #include <linux/bitmap.h>
+#include <linux/slab.h>
 
 #ifdef CONFIG_PM_RUNTIME
-#define BIT_ONCE 0
-#define BIT_ACTIVE 1
-#define BIT_CLK_ENABLED 2
 
-struct pm_runtime_data {
-        unsigned long flags;
-        struct clk *clk;
-};
-
-static void __devres_release(struct device *dev, void *res)
-{
-        struct pm_runtime_data *prd = res;
-
-        dev_dbg(dev, "__devres_release()\n");
-
-        if (test_bit(BIT_CLK_ENABLED, &prd->flags))
-                clk_disable(prd->clk);
-
-        if (test_bit(BIT_ACTIVE, &prd->flags))
-                clk_put(prd->clk);
-}
-
-static struct pm_runtime_data *__to_prd(struct device *dev)
-{
-        return devres_find(dev, __devres_release, NULL, NULL);
-}
-
-static void platform_pm_runtime_init(struct device *dev,
-                                     struct pm_runtime_data *prd)
-{
-        if (prd && !test_and_set_bit(BIT_ONCE, &prd->flags)) {
-                prd->clk = clk_get(dev, NULL);
-                if (!IS_ERR(prd->clk)) {
-                        set_bit(BIT_ACTIVE, &prd->flags);
-                        dev_info(dev, "clocks managed by runtime pm\n");
-                }
-        }
-}
-
-static void platform_pm_runtime_bug(struct device *dev,
-                                    struct pm_runtime_data *prd)
-{
-        if (prd && !test_and_set_bit(BIT_ONCE, &prd->flags))
-                dev_err(dev, "runtime pm suspend before resume\n");
-}
-
-int platform_pm_runtime_suspend(struct device *dev)
-{
-        struct pm_runtime_data *prd = __to_prd(dev);
-
-        dev_dbg(dev, "platform_pm_runtime_suspend()\n");
-
-        platform_pm_runtime_bug(dev, prd);
-
-        if (prd && test_bit(BIT_ACTIVE, &prd->flags)) {
-                clk_disable(prd->clk);
-                clear_bit(BIT_CLK_ENABLED, &prd->flags);
-        }
-
-        return 0;
-}
-
-int platform_pm_runtime_resume(struct device *dev)
-{
-        struct pm_runtime_data *prd = __to_prd(dev);
-
-        dev_dbg(dev, "platform_pm_runtime_resume()\n");
-
-        platform_pm_runtime_init(dev, prd);
-
-        if (prd && test_bit(BIT_ACTIVE, &prd->flags)) {
-                clk_enable(prd->clk);
-                set_bit(BIT_CLK_ENABLED, &prd->flags);
-        }
-
-        return 0;
-}
-
-int platform_pm_runtime_idle(struct device *dev)
+static int default_platform_runtime_idle(struct device *dev)
 {
         /* suspend synchronously to disable clocks immediately */
         return pm_runtime_suspend(dev);
 }
 
-static int platform_bus_notify(struct notifier_block *nb,
-                               unsigned long action, void *data)
-{
-        struct device *dev = data;
-        struct pm_runtime_data *prd;
-
-        dev_dbg(dev, "platform_bus_notify() %ld !\n", action);
-
-        if (action == BUS_NOTIFY_BIND_DRIVER) {
-                prd = devres_alloc(__devres_release, sizeof(*prd), GFP_KERNEL);
-                if (prd)
-                        devres_add(dev, prd);
-                else
-                        dev_err(dev, "unable to alloc memory for runtime pm\n");
-        }
-
-        return 0;
-}
-
-#else /* CONFIG_PM_RUNTIME */
-
-static int platform_bus_notify(struct notifier_block *nb,
-                               unsigned long action, void *data)
-{
-        struct device *dev = data;
-        struct clk *clk;
+static struct dev_power_domain default_power_domain = {
+        .ops = {
+                .runtime_suspend = pm_runtime_clk_suspend,
+                .runtime_resume = pm_runtime_clk_resume,
+                .runtime_idle = default_platform_runtime_idle,
+                USE_PLATFORM_PM_SLEEP_OPS
+        },
+};
 
-        dev_dbg(dev, "platform_bus_notify() %ld !\n", action);
+#define DEFAULT_PWR_DOMAIN_PTR  (&default_power_domain)
 
-        switch (action) {
-        case BUS_NOTIFY_BIND_DRIVER:
-                clk = clk_get(dev, NULL);
-                if (!IS_ERR(clk)) {
-                        clk_enable(clk);
-                        clk_put(clk);
-                        dev_info(dev, "runtime pm disabled, clock forced on\n");
-                }
-                break;
-        case BUS_NOTIFY_UNBOUND_DRIVER:
-                clk = clk_get(dev, NULL);
-                if (!IS_ERR(clk)) {
-                        clk_disable(clk);
-                        clk_put(clk);
-                        dev_info(dev, "runtime pm disabled, clock forced off\n");
-                }
-                break;
-        }
+#else
 
-        return 0;
-}
+#define DEFAULT_PWR_DOMAIN_PTR  NULL
 
 #endif /* CONFIG_PM_RUNTIME */
 
-static struct notifier_block platform_bus_notifier = {
-        .notifier_call = platform_bus_notify
+static struct pm_clk_notifier_block platform_bus_notifier = {
+        .pwr_domain = DEFAULT_PWR_DOMAIN_PTR,
+        .con_ids = { NULL, },
 };
 
 static int __init sh_pm_runtime_init(void)
 {
-        bus_register_notifier(&platform_bus_type, &platform_bus_notifier);
+        pm_runtime_clk_add_notifier(&platform_bus_type, &platform_bus_notifier);
         return 0;
 }
 core_initcall(sh_pm_runtime_init);
diff --git a/arch/arm/mach-tegra/include/mach/barriers.h b/arch/arm/mach-tegra/include/mach/barriers.h
index cc115174899b..425b42e91ef6 100644
--- a/arch/arm/mach-tegra/include/mach/barriers.h
+++ b/arch/arm/mach-tegra/include/mach/barriers.h
@@ -23,7 +23,7 @@
 
 #include <asm/outercache.h>
 
-#define rmb()           dmb()
+#define rmb()           dsb()
 #define wmb()           do { dsb(); outer_sync(); } while (0)
 #define mb()            wmb()
 
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index e5f6fc428348..e591513bb53e 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -392,7 +392,7 @@ free_memmap(unsigned long start_pfn, unsigned long end_pfn)
          * Convert start_pfn/end_pfn to a struct page pointer.
          */
         start_pg = pfn_to_page(start_pfn - 1) + 1;
-        end_pg = pfn_to_page(end_pfn);
+        end_pg = pfn_to_page(end_pfn - 1) + 1;
 
         /*
          * Convert to physical addresses, and
@@ -426,6 +426,14 @@ static void __init free_unused_memmap(struct meminfo *mi)
 
                 bank_start = bank_pfn_start(bank);
 
+#ifdef CONFIG_SPARSEMEM
+                /*
+                 * Take care not to free memmap entries that don't exist
+                 * due to SPARSEMEM sections which aren't present.
+                 */
+                bank_start = min(bank_start,
+                                 ALIGN(prev_bank_end, PAGES_PER_SECTION));
+#endif
                 /*
                  * If we had a previous bank, and there is a space
                  * between the current bank and the previous, free it.
@@ -440,6 +448,12 @@ static void __init free_unused_memmap(struct meminfo *mi)
                  */
                 prev_bank_end = ALIGN(bank_pfn_end(bank), MAX_ORDER_NR_PAGES);
         }
+
+#ifdef CONFIG_SPARSEMEM
+        if (!IS_ALIGNED(prev_bank_end, PAGES_PER_SECTION))
+                free_memmap(prev_bank_end,
+                            ALIGN(prev_bank_end, PAGES_PER_SECTION));
+#endif
 }
 
 static void __init free_highpages(void)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index d2adcdda23cf..bd9e32187eab 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -17,7 +17,7 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/interrupt.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/err.h>
 #include <linux/clk.h>
 #include <linux/io.h>
@@ -1372,9 +1372,7 @@ static const struct dev_pm_ops omap_mpuio_dev_pm_ops = {
         .resume_noirq = omap_mpuio_resume_noirq,
 };
 
-/* use platform_driver for this, now that there's no longer any
- * point to sys_device (other than not disturbing old code).
- */
+/* use platform_driver for this. */
 static struct platform_driver omap_mpuio_driver = {
         .driver         = {
                 .name   = "mpuio",
@@ -1745,7 +1743,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
 }
 
 #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
-static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
+static int omap_gpio_suspend(void)
 {
         int i;
 
@@ -1795,12 +1793,12 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
         return 0;
 }
 
-static int omap_gpio_resume(struct sys_device *dev)
+static void omap_gpio_resume(void)
 {
         int i;
 
         if (!cpu_class_is_omap2() && !cpu_is_omap16xx())
-                return 0;
+                return;
 
         for (i = 0; i < gpio_bank_count; i++) {
                 struct gpio_bank *bank = &gpio_bank[i];
@@ -1836,21 +1834,13 @@ static int omap_gpio_resume(struct sys_device *dev)
                 __raw_writel(bank->saved_wakeup, wake_set);
                 spin_unlock_irqrestore(&bank->lock, flags);
         }
-
-        return 0;
 }
 
-static struct sysdev_class omap_gpio_sysclass = {
-        .name           = "gpio",
+static struct syscore_ops omap_gpio_syscore_ops = {
         .suspend        = omap_gpio_suspend,
         .resume         = omap_gpio_resume,
 };
 
-static struct sys_device omap_gpio_device = {
-        .id             = 0,
-        .cls            = &omap_gpio_sysclass,
-};
-
 #endif
 
 #ifdef CONFIG_ARCH_OMAP2PLUS
@@ -2108,21 +2098,14 @@ postcore_initcall(omap_gpio_drv_reg);
 
 static int __init omap_gpio_sysinit(void)
 {
-        int ret = 0;
-
         mpuio_init();
 
 #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
-        if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
-                if (ret == 0) {
-                        ret = sysdev_class_register(&omap_gpio_sysclass);
-                        if (ret == 0)
-                                ret = sysdev_register(&omap_gpio_device);
-                }
-        }
+        if (cpu_is_omap16xx() || cpu_class_is_omap2())
+                register_syscore_ops(&omap_gpio_syscore_ops);
 #endif
 
-        return ret;
+        return 0;
 }
 
 arch_initcall(omap_gpio_sysinit);
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index 8a51fd58f656..34fc31ee9081 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -793,6 +793,8 @@ static irqreturn_t iommu_fault_handler(int irq, void *data)
         clk_enable(obj->clk);
         errs = iommu_report_fault(obj, &da);
         clk_disable(obj->clk);
+        if (errs == 0)
+                return IRQ_HANDLED;
 
         /* Fault callback or TLB/PTE Dynamic loading */
         if (obj->isr && !obj->isr(obj, da, errs, obj->isr_priv))
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index 9bbda9acb73b..a37b8eb65b76 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -536,6 +536,28 @@ int omap_early_device_register(struct omap_device *od)
         return 0;
 }
 
+static int _od_runtime_suspend(struct device *dev)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+
+        return omap_device_idle(pdev);
+}
+
+static int _od_runtime_resume(struct device *dev)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+
+        return omap_device_enable(pdev);
+}
+
+static struct dev_power_domain omap_device_power_domain = {
+        .ops = {
+                .runtime_suspend = _od_runtime_suspend,
+                .runtime_resume = _od_runtime_resume,
+                USE_PLATFORM_PM_SLEEP_OPS
+        }
+};
+
 /**
  * omap_device_register - register an omap_device with one omap_hwmod
  * @od: struct omap_device * to register
@@ -549,6 +571,7 @@ int omap_device_register(struct omap_device *od)
         pr_debug("omap_device: %s: registering\n", od->pdev.name);
 
         od->pdev.dev.parent = &omap_device_parent;
+        od->pdev.dev.pwr_domain = &omap_device_power_domain;
         return platform_device_register(&od->pdev);
 }
 
diff --git a/arch/arm/plat-pxa/gpio.c b/arch/arm/plat-pxa/gpio.c
index dce088f45678..48ebb9479b61 100644
--- a/arch/arm/plat-pxa/gpio.c
+++ b/arch/arm/plat-pxa/gpio.c
@@ -15,7 +15,7 @@
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/io.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/slab.h>
 
 #include <mach/gpio.h>
@@ -295,7 +295,7 @@ void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
 }
 
 #ifdef CONFIG_PM
-static int pxa_gpio_suspend(struct sys_device *dev, pm_message_t state)
+static int pxa_gpio_suspend(void)
 {
         struct pxa_gpio_chip *c;
         int gpio;
@@ -312,7 +312,7 @@ static int pxa_gpio_suspend(struct sys_device *dev, pm_message_t state)
         return 0;
 }
 
-static int pxa_gpio_resume(struct sys_device *dev)
+static void pxa_gpio_resume(void)
 {
         struct pxa_gpio_chip *c;
         int gpio;
@@ -326,22 +326,13 @@ static int pxa_gpio_resume(struct sys_device *dev)
                 __raw_writel(c->saved_gfer, c->regbase + GFER_OFFSET);
                 __raw_writel(c->saved_gpdr, c->regbase + GPDR_OFFSET);
         }
-        return 0;
 }
 #else
 #define pxa_gpio_suspend        NULL
 #define pxa_gpio_resume         NULL
 #endif
 
-struct sysdev_class pxa_gpio_sysclass = {
-        .name           = "gpio",
+struct syscore_ops pxa_gpio_syscore_ops = {
         .suspend        = pxa_gpio_suspend,
         .resume         = pxa_gpio_resume,
 };
-
-static int __init pxa_gpio_init(void)
-{
-        return sysdev_class_register(&pxa_gpio_sysclass);
-}
-
-core_initcall(pxa_gpio_init);
diff --git a/arch/arm/plat-pxa/mfp.c b/arch/arm/plat-pxa/mfp.c
index a9aa5ad3f4eb..be12eadcce20 100644
--- a/arch/arm/plat-pxa/mfp.c
+++ b/arch/arm/plat-pxa/mfp.c
@@ -17,7 +17,6 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/io.h>
-#include <linux/sysdev.h>
 
 #include <plat/mfp.h>
 
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 27ea852e3370..c10d10c56e2e 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -22,7 +22,7 @@
 #include <linux/sched.h>
 #include <linux/spinlock.h>
 #include <linux/interrupt.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/slab.h>
 #include <linux/errno.h>
 #include <linux/io.h>
@@ -1195,19 +1195,12 @@ int s3c2410_dma_getposition(unsigned int channel, dma_addr_t *src, dma_addr_t *d
 
 EXPORT_SYMBOL(s3c2410_dma_getposition);
 
-static inline struct s3c2410_dma_chan *to_dma_chan(struct sys_device *dev)
-{
-        return container_of(dev, struct s3c2410_dma_chan, dev);
-}
-
-/* system device class */
+/* system core operations */
 
 #ifdef CONFIG_PM
 
-static int s3c2410_dma_suspend(struct sys_device *dev, pm_message_t state)
+static void s3c2410_dma_suspend_chan(s3c2410_dma_chan *cp)
 {
-        struct s3c2410_dma_chan *cp = to_dma_chan(dev);
-
         printk(KERN_DEBUG "suspending dma channel %d\n", cp->number);
 
         if (dma_rdreg(cp, S3C2410_DMA_DMASKTRIG) & S3C2410_DMASKTRIG_ON) {
@@ -1222,13 +1215,21 @@ static int s3c2410_dma_suspend(struct sys_device *dev, pm_message_t state)
 
                 s3c2410_dma_dostop(cp);
         }
+}
+
+static int s3c2410_dma_suspend(void)
+{
+        struct s3c2410_dma_chan *cp = s3c2410_chans;
+        int channel;
+
+        for (channel = 0; channel < dma_channels; cp++, channel++)
+                s3c2410_dma_suspend_chan(cp);
 
         return 0;
 }
 
-static int s3c2410_dma_resume(struct sys_device *dev)
+static void s3c2410_dma_resume_chan(struct s3c2410_dma_chan *cp)
 {
-        struct s3c2410_dma_chan *cp = to_dma_chan(dev);
         unsigned int no = cp->number | DMACH_LOW_LEVEL;
 
         /* restore channel's hardware configuration */
@@ -1249,13 +1250,21 @@ static int s3c2410_dma_resume(struct sys_device *dev)
         return 0;
 }
 
+static void s3c2410_dma_resume(void)
+{
+        struct s3c2410_dma_chan *cp = s3c2410_chans + dma_channels - 1;
+        int channel;
+
+        for (channel = dma_channels - 1; channel >= 0; cp++, channel--)
+                s3c2410_dma_resume_chan(cp);
+}
+
 #else
 #define s3c2410_dma_suspend NULL
 #define s3c2410_dma_resume  NULL
 #endif /* CONFIG_PM */
 
-struct sysdev_class dma_sysclass = {
-        .name           = "s3c24xx-dma",
+struct syscore_ops dma_syscore_ops = {
         .suspend        = s3c2410_dma_suspend,
         .resume         = s3c2410_dma_resume,
 };
@@ -1269,39 +1278,14 @@ static void s3c2410_dma_cache_ctor(void *p)
 
 /* initialisation code */
 
-static int __init s3c24xx_dma_sysclass_init(void)
+static int __init s3c24xx_dma_syscore_init(void)
 {
-        int ret = sysdev_class_register(&dma_sysclass);
-
-        if (ret != 0)
-                printk(KERN_ERR "dma sysclass registration failed\n");
-
-        return ret;
-}
-
-core_initcall(s3c24xx_dma_sysclass_init);
-
-static int __init s3c24xx_dma_sysdev_register(void)
-{
-        struct s3c2410_dma_chan *cp = s3c2410_chans;
-        int channel, ret;
-
-        for (channel = 0; channel < dma_channels; cp++, channel++) {
-                cp->dev.cls = &dma_sysclass;
-                cp->dev.id  = channel;
-                ret = sysdev_register(&cp->dev);
-
-                if (ret) {
-                        printk(KERN_ERR "error registering dev for dma %d\n",
-                               channel);
-                        return ret;
-                }
-        }
+        register_syscore_ops(&dma_syscore_ops);
 
         return 0;
 }
 
-late_initcall(s3c24xx_dma_sysdev_register);
+late_initcall(s3c24xx_dma_syscore_init);
 
 int __init s3c24xx_dma_init(unsigned int channels, unsigned int irq,
                             unsigned int stride)
diff --git a/arch/arm/plat-s3c24xx/irq-pm.c b/arch/arm/plat-s3c24xx/irq-pm.c
index c3624d898630..0efb2e2848c8 100644
--- a/arch/arm/plat-s3c24xx/irq-pm.c
+++ b/arch/arm/plat-s3c24xx/irq-pm.c
@@ -14,7 +14,6 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/interrupt.h>
-#include <linux/sysdev.h>
 #include <linux/irq.h>
 
 #include <plat/cpu.h>
@@ -65,7 +64,7 @@ static unsigned long save_extint[3];
 static unsigned long save_eintflt[4];
 static unsigned long save_eintmask;
 
-int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state)
+int s3c24xx_irq_suspend(void)
 {
         unsigned int i;
 
@@ -81,7 +80,7 @@ int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state)
         return 0;
 }
 
-int s3c24xx_irq_resume(struct sys_device *dev)
+void s3c24xx_irq_resume(void)
 {
         unsigned int i;
 
@@ -93,6 +92,4 @@ int s3c24xx_irq_resume(struct sys_device *dev)
 
         s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
         __raw_writel(save_eintmask, S3C24XX_EINTMASK);
-
-        return 0;
 }
diff --git a/arch/arm/plat-s5p/irq-pm.c b/arch/arm/plat-s5p/irq-pm.c
index 5259ad458bc8..327acb3a4464 100644
--- a/arch/arm/plat-s5p/irq-pm.c
+++ b/arch/arm/plat-s5p/irq-pm.c
@@ -16,7 +16,6 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/interrupt.h>
-#include <linux/sysdev.h>
 
 #include <plat/cpu.h>
 #include <plat/irqs.h>
@@ -77,17 +76,15 @@ static struct sleep_save eint_save[] = {
         SAVE_ITEM(S5P_EINT_MASK(3)),
 };
 
-int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state)
+int s3c24xx_irq_suspend(void)
 {
         s3c_pm_do_save(eint_save, ARRAY_SIZE(eint_save));
 
         return 0;
 }
 
-int s3c24xx_irq_resume(struct sys_device *dev)
+void s3c24xx_irq_resume(void)
 {
         s3c_pm_do_restore(eint_save, ARRAY_SIZE(eint_save));
-
-        return 0;
 }
 
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index cedfff51c82b..3aedac0034ba 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -68,6 +68,12 @@ extern void s3c24xx_init_uartdevs(char *name,
 struct sys_timer;
 extern struct sys_timer s3c24xx_timer;
 
+extern struct syscore_ops s3c2410_pm_syscore_ops;
+extern struct syscore_ops s3c2412_pm_syscore_ops;
+extern struct syscore_ops s3c2416_pm_syscore_ops;
+extern struct syscore_ops s3c244x_pm_syscore_ops;
+extern struct syscore_ops s3c64xx_irq_syscore_ops;
+
 /* system device classes */
 
 extern struct sysdev_class s3c2410_sysclass;
diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h
index 937cc2ace517..7fb6f6be8c81 100644
--- a/arch/arm/plat-samsung/include/plat/pm.h
+++ b/arch/arm/plat-samsung/include/plat/pm.h
@@ -103,14 +103,16 @@ extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count);
 
 #ifdef CONFIG_PM
 extern int s3c_irqext_wake(struct irq_data *data, unsigned int state);
-extern int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state);
-extern int s3c24xx_irq_resume(struct sys_device *dev);
+extern int s3c24xx_irq_suspend(void);
+extern void s3c24xx_irq_resume(void);
 #else
 #define s3c_irqext_wake NULL
 #define s3c24xx_irq_suspend NULL
 #define s3c24xx_irq_resume  NULL
 #endif
 
+extern struct syscore_ops s3c24xx_irq_syscore_ops;
+
 /* PM debug functions */
 
 #ifdef CONFIG_SAMSUNG_PM_DEBUG
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index f74695075e64..f25e7ec89416 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -398,9 +398,9 @@ static void vfp_enable(void *unused)
 }
 
 #ifdef CONFIG_PM
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 
-static int vfp_pm_suspend(struct sys_device *dev, pm_message_t state)
+static int vfp_pm_suspend(void)
 {
         struct thread_info *ti = current_thread_info();
         u32 fpexc = fmrx(FPEXC);
@@ -420,34 +420,25 @@ static int vfp_pm_suspend(struct sys_device *dev, pm_message_t state)
         return 0;
 }
 
-static int vfp_pm_resume(struct sys_device *dev)
+static void vfp_pm_resume(void)
 {
         /* ensure we have access to the vfp */
         vfp_enable(NULL);
 
         /* and disable it to ensure the next usage restores the state */
         fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
-
-        return 0;
 }
 
-static struct sysdev_class vfp_pm_sysclass = {
-        .name           = "vfp",
+static struct syscore_ops vfp_pm_syscore_ops = {
         .suspend        = vfp_pm_suspend,
         .resume         = vfp_pm_resume,
 };
 
-static struct sys_device vfp_pm_sysdev = {
-        .cls    = &vfp_pm_sysclass,
-};
-
 static void vfp_pm_init(void)
 {
-        sysdev_class_register(&vfp_pm_sysclass);
-        sysdev_register(&vfp_pm_sysdev);
+        register_syscore_ops(&vfp_pm_syscore_ops);
 }
 
-
 #else
 static inline void vfp_pm_init(void) { }
 #endif /* CONFIG_PM */
diff --git a/arch/avr32/mach-at32ap/intc.c b/arch/avr32/mach-at32ap/intc.c
index 21ce35f33aa5..3e3646186c9f 100644
--- a/arch/avr32/mach-at32ap/intc.c
+++ b/arch/avr32/mach-at32ap/intc.c
@@ -12,7 +12,7 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 
 #include <asm/io.h>
 
@@ -21,7 +21,6 @@
 struct intc {
         void __iomem            *regs;
         struct irq_chip         chip;
-        struct sys_device       sysdev;
 #ifdef CONFIG_PM
         unsigned long           suspend_ipr;
         unsigned long           saved_ipr[64];
@@ -146,9 +145,8 @@ void intc_set_suspend_handler(unsigned long offset)
         intc0.suspend_ipr = offset;
 }
 
-static int intc_suspend(struct sys_device *sdev, pm_message_t state)
+static int intc_suspend(void)
 {
-        struct intc *intc = container_of(sdev, struct intc, sysdev);
         int i;
 
         if (unlikely(!irqs_disabled())) {
@@ -156,28 +154,25 @@ static int intc_suspend(struct sys_device *sdev, pm_message_t state)
                 return -EINVAL;
         }
 
-        if (unlikely(!intc->suspend_ipr)) {
+        if (unlikely(!intc0.suspend_ipr)) {
                 pr_err("intc_suspend: suspend_ipr not initialized\n");
                 return -EINVAL;
         }
 
         for (i = 0; i < 64; i++) {
-                intc->saved_ipr[i] = intc_readl(intc, INTPR0 + 4 * i);
-                intc_writel(intc, INTPR0 + 4 * i, intc->suspend_ipr);
+                intc0.saved_ipr[i] = intc_readl(&intc0, INTPR0 + 4 * i);
+                intc_writel(&intc0, INTPR0 + 4 * i, intc0.suspend_ipr);
         }
 
         return 0;
 }
 
-static int intc_resume(struct sys_device *sdev)
+static int intc_resume(void)
 {
-        struct intc *intc = container_of(sdev, struct intc, sysdev);
         int i;
 
-        WARN_ON(!irqs_disabled());
-
         for (i = 0; i < 64; i++)
-                intc_writel(intc, INTPR0 + 4 * i, intc->saved_ipr[i]);
+                intc_writel(&intc0, INTPR0 + 4 * i, intc0.saved_ipr[i]);
 
         return 0;
 }
@@ -186,27 +181,18 @@ static int intc_resume(struct sys_device *sdev)
 #define intc_resume     NULL
 #endif
 
-static struct sysdev_class intc_class = {
-        .name           = "intc",
+static struct syscore_ops intc_syscore_ops = {
         .suspend        = intc_suspend,
         .resume         = intc_resume,
 };
 
-static int __init intc_init_sysdev(void)
+static int __init intc_init_syscore(void)
 {
-        int ret;
-
-        ret = sysdev_class_register(&intc_class);
-        if (ret)
-                return ret;
+        register_syscore_ops(&intc_syscore_ops);
 
-        intc0.sysdev.id = 0;
-        intc0.sysdev.cls = &intc_class;
-        ret = sysdev_register(&intc0.sysdev);
-
-        return ret;
+        return 0;
 }
-device_initcall(intc_init_sysdev);
+device_initcall(intc_init_syscore);
 
 unsigned long intc_get_pending(unsigned int group)
 {
diff --git a/arch/blackfin/kernel/nmi.c b/arch/blackfin/kernel/nmi.c
index 0b5f72f17fd0..401eb1d8e3b4 100644
--- a/arch/blackfin/kernel/nmi.c
+++ b/arch/blackfin/kernel/nmi.c
@@ -12,7 +12,7 @@
 
 #include <linux/bitops.h>
 #include <linux/hardirq.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/pm.h>
 #include <linux/nmi.h>
 #include <linux/smp.h>
@@ -196,43 +196,31 @@ void touch_nmi_watchdog(void)
 
 /* Suspend/resume support */
 #ifdef CONFIG_PM
-static int nmi_wdt_suspend(struct sys_device *dev, pm_message_t state)
+static int nmi_wdt_suspend(void)
 {
         nmi_wdt_stop();
         return 0;
 }
 
-static int nmi_wdt_resume(struct sys_device *dev)
+static void nmi_wdt_resume(void)
 {
         if (nmi_active)
                 nmi_wdt_start();
-        return 0;
 }
 
-static struct sysdev_class nmi_sysclass = {
-        .name           = DRV_NAME,
+static struct syscore_ops nmi_syscore_ops = {
         .resume         = nmi_wdt_resume,
         .suspend        = nmi_wdt_suspend,
 };
 
-static struct sys_device device_nmi_wdt = {
-        .id     = 0,
-        .cls    = &nmi_sysclass,
-};
-
-static int __init init_nmi_wdt_sysfs(void)
+static int __init init_nmi_wdt_syscore(void)
 {
-        int error;
-
-        if (!nmi_active)
-                return 0;
+        if (nmi_active)
+                register_syscore_ops(&nmi_syscore_ops);
 
-        error = sysdev_class_register(&nmi_sysclass);
-        if (!error)
-                error = sysdev_register(&device_nmi_wdt);
-        return error;
+        return 0;
 }
-late_initcall(init_nmi_wdt_sysfs);
+late_initcall(init_nmi_wdt_syscore);
 
 #endif  /* CONFIG_PM */
 
diff --git a/arch/blackfin/mach-common/dpmc.c b/arch/blackfin/mach-common/dpmc.c
index 382099fd5561..5e4112e518a9 100644
--- a/arch/blackfin/mach-common/dpmc.c
+++ b/arch/blackfin/mach-common/dpmc.c
@@ -19,9 +19,6 @@
 
 #define DRIVER_NAME "bfin dpmc"
 
-#define dprintk(msg...) \
-        cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, DRIVER_NAME, msg)
-
 struct bfin_dpmc_platform_data *pdata;
 
 /**
diff --git a/arch/ia64/kernel/cpufreq/acpi-cpufreq.c b/arch/ia64/kernel/cpufreq/acpi-cpufreq.c
index 22f61526a8e1..f09b174244d5 100644
--- a/arch/ia64/kernel/cpufreq/acpi-cpufreq.c
+++ b/arch/ia64/kernel/cpufreq/acpi-cpufreq.c
@@ -23,8 +23,6 @@
 #include <linux/acpi.h>
 #include <acpi/processor.h>
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg)
-
 MODULE_AUTHOR("Venkatesh Pallipadi");
 MODULE_DESCRIPTION("ACPI Processor P-States Driver");
 MODULE_LICENSE("GPL");
@@ -47,12 +45,12 @@ processor_set_pstate (
 {
         s64 retval;
 
-        dprintk("processor_set_pstate\n");
+        pr_debug("processor_set_pstate\n");
 
         retval = ia64_pal_set_pstate((u64)value);
 
         if (retval) {
-                dprintk("Failed to set freq to 0x%x, with error 0x%lx\n",
+                pr_debug("Failed to set freq to 0x%x, with error 0x%lx\n",
                         value, retval);
                 return -ENODEV;
         }
@@ -67,14 +65,14 @@ processor_get_pstate (
         u64     pstate_index = 0;
         s64     retval;
 
-        dprintk("processor_get_pstate\n");
+        pr_debug("processor_get_pstate\n");
 
         retval = ia64_pal_get_pstate(&pstate_index,
                                      PAL_GET_PSTATE_TYPE_INSTANT);
         *value = (u32) pstate_index;
 
         if (retval)
-                dprintk("Failed to get current freq with "
+                pr_debug("Failed to get current freq with "
                         "error 0x%lx, idx 0x%x\n", retval, *value);
 
         return (int)retval;
@@ -90,7 +88,7 @@ extract_clock (
 {
         unsigned long i;
 
-        dprintk("extract_clock\n");
+        pr_debug("extract_clock\n");
 
         for (i = 0; i < data->acpi_data.state_count; i++) {
                 if (value == data->acpi_data.states[i].status)
@@ -110,7 +108,7 @@ processor_get_freq (
         cpumask_t               saved_mask;
         unsigned long           clock_freq;
 
-        dprintk("processor_get_freq\n");
+        pr_debug("processor_get_freq\n");
 
         saved_mask = current->cpus_allowed;
         set_cpus_allowed_ptr(current, cpumask_of(cpu));
@@ -148,7 +146,7 @@ processor_set_freq (
         cpumask_t               saved_mask;
         int                     retval;
 
-        dprintk("processor_set_freq\n");
+        pr_debug("processor_set_freq\n");
 
         saved_mask = current->cpus_allowed;
         set_cpus_allowed_ptr(current, cpumask_of(cpu));
@@ -159,16 +157,16 @@ processor_set_freq (
 
         if (state == data->acpi_data.state) {
                 if (unlikely(data->resume)) {
-                        dprintk("Called after resume, resetting to P%d\n", state);
+                        pr_debug("Called after resume, resetting to P%d\n", state);
                         data->resume = 0;
                 } else {
-                        dprintk("Already at target state (P%d)\n", state);
+                        pr_debug("Already at target state (P%d)\n", state);
                         retval = 0;
                         goto migrate_end;
                 }
         }
 
-        dprintk("Transitioning from P%d to P%d\n",
+        pr_debug("Transitioning from P%d to P%d\n",
                 data->acpi_data.state, state);
 
         /* cpufreq frequency struct */
@@ -186,7 +184,7 @@ processor_set_freq (
 
         value = (u32) data->acpi_data.states[state].control;
 
-        dprintk("Transitioning to state: 0x%08x\n", value);
+        pr_debug("Transitioning to state: 0x%08x\n", value);
 
         ret = processor_set_pstate(value);
         if (ret) {
@@ -219,7 +217,7 @@ acpi_cpufreq_get (
 {
         struct cpufreq_acpi_io *data = acpi_io_data[cpu];
 
-        dprintk("acpi_cpufreq_get\n");
+        pr_debug("acpi_cpufreq_get\n");
 
         return processor_get_freq(data, cpu);
 }
@@ -235,7 +233,7 @@ acpi_cpufreq_target (
         unsigned int next_state = 0;
         unsigned int result = 0;
 
-        dprintk("acpi_cpufreq_setpolicy\n");
+        pr_debug("acpi_cpufreq_setpolicy\n");
 
         result = cpufreq_frequency_table_target(policy,
                         data->freq_table, target_freq, relation, &next_state);
@@ -255,7 +253,7 @@ acpi_cpufreq_verify (
         unsigned int result = 0;
         struct cpufreq_acpi_io *data = acpi_io_data[policy->cpu];
 
-        dprintk("acpi_cpufreq_verify\n");
+        pr_debug("acpi_cpufreq_verify\n");
 
         result = cpufreq_frequency_table_verify(policy,
                         data->freq_table);
@@ -273,7 +271,7 @@ acpi_cpufreq_cpu_init (
         struct cpufreq_acpi_io  *data;
         unsigned int            result = 0;
 
-        dprintk("acpi_cpufreq_cpu_init\n");
+        pr_debug("acpi_cpufreq_cpu_init\n");
 
         data = kzalloc(sizeof(struct cpufreq_acpi_io), GFP_KERNEL);
         if (!data)
@@ -288,7 +286,7 @@ acpi_cpufreq_cpu_init (
 
         /* capability check */
         if (data->acpi_data.state_count <= 1) {
-                dprintk("No P-States\n");
+                pr_debug("No P-States\n");
                 result = -ENODEV;
                 goto err_unreg;
         }
@@ -297,7 +295,7 @@ acpi_cpufreq_cpu_init (
                                         ACPI_ADR_SPACE_FIXED_HARDWARE) ||
             (data->acpi_data.status_register.space_id !=
                                         ACPI_ADR_SPACE_FIXED_HARDWARE)) {
-                dprintk("Unsupported address space [%d, %d]\n",
+                pr_debug("Unsupported address space [%d, %d]\n",
                         (u32) (data->acpi_data.control_register.space_id),
                         (u32) (data->acpi_data.status_register.space_id));
                 result = -ENODEV;
@@ -348,7 +346,7 @@ acpi_cpufreq_cpu_init (
                "activated.\n", cpu);
 
         for (i = 0; i < data->acpi_data.state_count; i++)
-                dprintk("     %cP%d: %d MHz, %d mW, %d uS, %d uS, 0x%x 0x%x\n",
+                pr_debug("     %cP%d: %d MHz, %d mW, %d uS, %d uS, 0x%x 0x%x\n",
                         (i == data->acpi_data.state?'*':' '), i,
                         (u32) data->acpi_data.states[i].core_frequency,
                         (u32) data->acpi_data.states[i].power,
@@ -383,7 +381,7 @@ acpi_cpufreq_cpu_exit (
 {
         struct cpufreq_acpi_io *data = acpi_io_data[policy->cpu];
 
-        dprintk("acpi_cpufreq_cpu_exit\n");
+        pr_debug("acpi_cpufreq_cpu_exit\n");
 
         if (data) {
                 cpufreq_frequency_table_put_attr(policy->cpu);
@@ -418,7 +416,7 @@ static struct cpufreq_driver acpi_cpufreq_driver = {
 static int __init
 acpi_cpufreq_init (void)
 {
-        dprintk("acpi_cpufreq_init\n");
+        pr_debug("acpi_cpufreq_init\n");
 
         return cpufreq_register_driver(&acpi_cpufreq_driver);
 }
@@ -427,7 +425,7 @@ acpi_cpufreq_init (void)
 static void __exit
 acpi_cpufreq_exit (void)
 {
-        dprintk("acpi_cpufreq_exit\n");
+        pr_debug("acpi_cpufreq_exit\n");
 
         cpufreq_unregister_driver(&acpi_cpufreq_driver);
         return;
diff --git a/arch/m68k/atari/atakeyb.c b/arch/m68k/atari/atakeyb.c
index b995513d527f..95022b04b62d 100644
--- a/arch/m68k/atari/atakeyb.c
+++ b/arch/m68k/atari/atakeyb.c
@@ -36,13 +36,10 @@
 
 /* Hook for MIDI serial driver */
 void (*atari_MIDI_interrupt_hook) (void);
-/* Hook for mouse driver */
-void (*atari_mouse_interrupt_hook) (char *);
 /* Hook for keyboard inputdev  driver */
 void (*atari_input_keyboard_interrupt_hook) (unsigned char, char);
 /* Hook for mouse inputdev  driver */
 void (*atari_input_mouse_interrupt_hook) (char *);
-EXPORT_SYMBOL(atari_mouse_interrupt_hook);
 EXPORT_SYMBOL(atari_input_keyboard_interrupt_hook);
 EXPORT_SYMBOL(atari_input_mouse_interrupt_hook);
 
@@ -263,8 +260,8 @@ repeat:
                         kb_state.buf[kb_state.len++] = scancode;
                         if (kb_state.len == 3) {
                                 kb_state.state = KEYBOARD;
-                                if (atari_mouse_interrupt_hook)
-                                        atari_mouse_interrupt_hook(kb_state.buf);
+                                if (atari_input_mouse_interrupt_hook)
+                                        atari_input_mouse_interrupt_hook(kb_state.buf);
                         }
                         break;
 
@@ -575,7 +572,7 @@ int atari_keyb_init(void)
         kb_state.len = 0;
 
         error = request_irq(IRQ_MFP_ACIA, atari_keyboard_interrupt,
-                            IRQ_TYPE_SLOW, "keyboard/mouse/MIDI",
+                            IRQ_TYPE_SLOW, "keyboard,mouse,MIDI",
                             atari_keyboard_interrupt);
         if (error)
                 return error;
diff --git a/arch/m68k/atari/stdma.c b/arch/m68k/atari/stdma.c
index 604329fafbb8..ddbf43ca8858 100644
--- a/arch/m68k/atari/stdma.c
+++ b/arch/m68k/atari/stdma.c
@@ -180,7 +180,7 @@ void __init stdma_init(void)
 {
         stdma_isr = NULL;
         if (request_irq(IRQ_MFP_FDC, stdma_int, IRQ_TYPE_SLOW | IRQF_SHARED,
-                        "ST-DMA: floppy/ACSI/IDE/Falcon-SCSI", stdma_int))
+                        "ST-DMA floppy,ACSI,IDE,Falcon-SCSI", stdma_int))
                 pr_err("Couldn't register ST-DMA interrupt\n");
 }
 
diff --git a/arch/m68k/include/asm/atarikb.h b/arch/m68k/include/asm/atarikb.h
index 546e7da5804f..68f3622bf591 100644
--- a/arch/m68k/include/asm/atarikb.h
+++ b/arch/m68k/include/asm/atarikb.h
@@ -34,8 +34,6 @@ void ikbd_joystick_disable(void);
 
 /* Hook for MIDI serial driver */
 extern void (*atari_MIDI_interrupt_hook) (void);
-/* Hook for mouse driver */
-extern void (*atari_mouse_interrupt_hook) (char *);
 /* Hook for keyboard inputdev  driver */
 extern void (*atari_input_keyboard_interrupt_hook) (unsigned char, char);
 /* Hook for mouse inputdev  driver */
diff --git a/arch/m68k/include/asm/bitops_mm.h b/arch/m68k/include/asm/bitops_mm.h
index 9d69f6e62365..e9020f88a748 100644
--- a/arch/m68k/include/asm/bitops_mm.h
+++ b/arch/m68k/include/asm/bitops_mm.h
@@ -181,14 +181,15 @@ static inline int find_first_zero_bit(const unsigned long *vaddr,
 {
         const unsigned long *p = vaddr;
         int res = 32;
+        unsigned int words;
         unsigned long num;
 
         if (!size)
                 return 0;
 
-        size = (size + 31) >> 5;
+        words = (size + 31) >> 5;
         while (!(num = ~*p++)) {
-                if (!--size)
+                if (!--words)
                         goto out;
         }
 
@@ -196,7 +197,8 @@ static inline int find_first_zero_bit(const unsigned long *vaddr,
                               : "=d" (res) : "d" (num & -num));
         res ^= 31;
 out:
-        return ((long)p - (long)vaddr - 4) * 8 + res;
+        res += ((long)p - (long)vaddr - 4) * 8;
+        return res < size ? res : size;
 }
 
 static inline int find_next_zero_bit(const unsigned long *vaddr, int size,
@@ -215,27 +217,32 @@ static inline int find_next_zero_bit(const unsigned long *vaddr, int size,
                 /* Look for zero in first longword */
                 __asm__ __volatile__ ("bfffo %1{#0,#0},%0"
                                       : "=d" (res) : "d" (num & -num));
-                if (res < 32)
-                        return offset + (res ^ 31);
+                if (res < 32) {
+                        offset += res ^ 31;
+                        return offset < size ? offset : size;
+                }
                 offset += 32;
+
+                if (offset >= size)
+                        return size;
         }
         /* No zero yet, search remaining full bytes for a zero */
-        res = find_first_zero_bit(p, size - ((long)p - (long)vaddr) * 8);
-        return offset + res;
+        return offset + find_first_zero_bit(p, size - offset);
 }
 
 static inline int find_first_bit(const unsigned long *vaddr, unsigned size)
 {
         const unsigned long *p = vaddr;
         int res = 32;
+        unsigned int words;
         unsigned long num;
 
         if (!size)
                 return 0;
 
-        size = (size + 31) >> 5;
+        words = (size + 31) >> 5;
         while (!(num = *p++)) {
-                if (!--size)
+                if (!--words)
                         goto out;
         }
 
@@ -243,7 +250,8 @@ static inline int find_first_bit(const unsigned long *vaddr, unsigned size)
                               : "=d" (res) : "d" (num & -num));
         res ^= 31;
 out:
-        return ((long)p - (long)vaddr - 4) * 8 + res;
+        res += ((long)p - (long)vaddr - 4) * 8;
+        return res < size ? res : size;
 }
 
 static inline int find_next_bit(const unsigned long *vaddr, int size,
@@ -262,13 +270,17 @@ static inline int find_next_bit(const unsigned long *vaddr, int size,
                 /* Look for one in first longword */
                 __asm__ __volatile__ ("bfffo %1{#0,#0},%0"
                                       : "=d" (res) : "d" (num & -num));
-                if (res < 32)
-                        return offset + (res ^ 31);
+                if (res < 32) {
+                        offset += res ^ 31;
+                        return offset < size ? offset : size;
+                }
                 offset += 32;
+
+                if (offset >= size)
+                        return size;
         }
         /* No one yet, search remaining full bytes for a one */
-        res = find_first_bit(p, size - ((long)p - (long)vaddr) * 8);
-        return offset + res;
+        return offset + find_first_bit(p, size - offset);
 }
 
 /*
@@ -366,23 +378,25 @@ static inline int test_bit_le(int nr, const void *vaddr)
 static inline int find_first_zero_bit_le(const void *vaddr, unsigned size)
 {
         const unsigned long *p = vaddr, *addr = vaddr;
-        int res;
+        int res = 0;
+        unsigned int words;
 
         if (!size)
                 return 0;
 
-        size = (size >> 5) + ((size & 31) > 0);
-        while (*p++ == ~0UL)
-        {
-                if (--size == 0)
-                        return (p - addr) << 5;
+        words = (size >> 5) + ((size & 31) > 0);
+        while (*p++ == ~0UL) {
+                if (--words == 0)
+                        goto out;
         }
 
         --p;
         for (res = 0; res < 32; res++)
                 if (!test_bit_le(res, p))
                         break;
-        return (p - addr) * 32 + res;
+out:
+        res += (p - addr) * 32;
+        return res < size ? res : size;
 }
 
 static inline unsigned long find_next_zero_bit_le(const void *addr,
@@ -400,10 +414,15 @@ static inline unsigned long find_next_zero_bit_le(const void *addr,
                 offset -= bit;
                 /* Look for zero in first longword */
                 for (res = bit; res < 32; res++)
-                        if (!test_bit_le(res, p))
-                                return offset + res;
+                        if (!test_bit_le(res, p)) {
+                                offset += res;
+                                return offset < size ? offset : size;
+                        }
                 p++;
                 offset += 32;
+
+                if (offset >= size)
+                        return size;
         }
         /* No zero yet, search remaining full bytes for a zero */
         return offset + find_first_zero_bit_le(p, size - offset);
@@ -412,22 +431,25 @@ static inline unsigned long find_next_zero_bit_le(const void *addr,
 static inline int find_first_bit_le(const void *vaddr, unsigned size)
 {
         const unsigned long *p = vaddr, *addr = vaddr;
-        int res;
+        int res = 0;
+        unsigned int words;
 
         if (!size)
                 return 0;
 
-        size = (size >> 5) + ((size & 31) > 0);
+        words = (size >> 5) + ((size & 31) > 0);
         while (*p++ == 0UL) {
-                if (--size == 0)
-                        return (p - addr) << 5;
+                if (--words == 0)
+                        goto out;
         }
 
         --p;
         for (res = 0; res < 32; res++)
                 if (test_bit_le(res, p))
                         break;
-        return (p - addr) * 32 + res;
+out:
+        res += (p - addr) * 32;
+        return res < size ? res : size;
 }
 
 static inline unsigned long find_next_bit_le(const void *addr,
@@ -445,10 +467,15 @@ static inline unsigned long find_next_bit_le(const void *addr,
                 offset -= bit;
                 /* Look for one in first longword */
                 for (res = bit; res < 32; res++)
-                        if (test_bit_le(res, p))
-                                return offset + res;
+                        if (test_bit_le(res, p)) {
+                                offset += res;
+                                return offset < size ? offset : size;
+                        }
                 p++;
                 offset += 32;
+
+                if (offset >= size)
+                        return size;
         }
         /* No set bit yet, search remaining full bytes for a set bit */
         return offset + find_first_bit_le(p, size - offset);
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index 29e17907d9f2..f3b649de2a1b 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -22,7 +22,7 @@
 #define __NR_mknod               14
 #define __NR_chmod               15
 #define __NR_chown               16
-#define __NR_break               17
+/*#define __NR_break             17*/
 #define __NR_oldstat             18
 #define __NR_lseek               19
 #define __NR_getpid              20
@@ -36,11 +36,11 @@
 #define __NR_oldfstat            28
 #define __NR_pause               29
 #define __NR_utime               30
-#define __NR_stty                31
-#define __NR_gtty                32
+/*#define __NR_stty              31*/
+/*#define __NR_gtty              32*/
 #define __NR_access              33
 #define __NR_nice                34
-#define __NR_ftime               35
+/*#define __NR_ftime             35*/
 #define __NR_sync                36
 #define __NR_kill                37
 #define __NR_rename              38
@@ -49,7 +49,7 @@
 #define __NR_dup                 41
 #define __NR_pipe                42
 #define __NR_times               43
-#define __NR_prof                44
+/*#define __NR_prof              44*/
 #define __NR_brk                 45
 #define __NR_setgid              46
 #define __NR_getgid              47
@@ -58,13 +58,13 @@
 #define __NR_getegid             50
 #define __NR_acct                51
 #define __NR_umount2             52
-#define __NR_lock                53
+/*#define __NR_lock              53*/
 #define __NR_ioctl               54
 #define __NR_fcntl               55
-#define __NR_mpx                 56
+/*#define __NR_mpx               56*/
 #define __NR_setpgid             57
-#define __NR_ulimit              58
-#define __NR_oldolduname         59
+/*#define __NR_ulimit            58*/
+/*#define __NR_oldolduname       59*/
 #define __NR_umask               60
 #define __NR_chroot              61
 #define __NR_ustat               62
@@ -103,10 +103,10 @@
 #define __NR_fchown              95
 #define __NR_getpriority         96
 #define __NR_setpriority         97
-#define __NR_profil              98
+/*#define __NR_profil            98*/
 #define __NR_statfs              99
 #define __NR_fstatfs            100
-#define __NR_ioperm             101
+/*#define __NR_ioperm           101*/
 #define __NR_socketcall         102
 #define __NR_syslog             103
 #define __NR_setitimer          104
@@ -114,11 +114,11 @@
 #define __NR_stat               106
 #define __NR_lstat              107
 #define __NR_fstat              108
-#define __NR_olduname           109
-#define __NR_iopl               /* 110 */ not supported
+/*#define __NR_olduname         109*/
+/*#define __NR_iopl             110*/ /* not supported */
 #define __NR_vhangup            111
-#define __NR_idle               /* 112 */ Obsolete
-#define __NR_vm86               /* 113 */ not supported
+/*#define __NR_idle             112*/ /* Obsolete */
+/*#define __NR_vm86             113*/ /* not supported */
 #define __NR_wait4              114
 #define __NR_swapoff            115
 #define __NR_sysinfo            116
@@ -132,17 +132,17 @@
 #define __NR_adjtimex           124
 #define __NR_mprotect           125
 #define __NR_sigprocmask        126
-#define __NR_create_module      127
+/*#define __NR_create_module    127*/
 #define __NR_init_module        128
 #define __NR_delete_module      129
-#define __NR_get_kernel_syms    130
+/*#define __NR_get_kernel_syms  130*/
 #define __NR_quotactl           131
 #define __NR_getpgid            132
 #define __NR_fchdir             133
 #define __NR_bdflush            134
 #define __NR_sysfs              135
 #define __NR_personality        136
-#define __NR_afs_syscall        137 /* Syscall for Andrew File System */
+/*#define __NR_afs_syscall      137*/ /* Syscall for Andrew File System */
 #define __NR_setfsuid           138
 #define __NR_setfsgid           139
 #define __NR__llseek            140
@@ -172,7 +172,7 @@
 #define __NR_setresuid          164
 #define __NR_getresuid          165
 #define __NR_getpagesize        166
-#define __NR_query_module       167
+/*#define __NR_query_module     167*/
 #define __NR_poll               168
 #define __NR_nfsservctl         169
 #define __NR_setresgid          170
@@ -193,8 +193,8 @@
 #define __NR_capset             185
 #define __NR_sigaltstack        186
 #define __NR_sendfile           187
-#define __NR_getpmsg            188     /* some people actually want streams */
-#define __NR_putpmsg            189     /* some people actually want streams */
+/*#define __NR_getpmsg          188*/   /* some people actually want streams */
+/*#define __NR_putpmsg          189*/   /* some people actually want streams */
 #define __NR_vfork              190
 #define __NR_ugetrlimit         191
 #define __NR_mmap2              192
@@ -223,6 +223,8 @@
 #define __NR_setfsuid32         215
 #define __NR_setfsgid32         216
 #define __NR_pivot_root         217
+/* 218*/
+/* 219*/
 #define __NR_getdents64         220
 #define __NR_gettid             221
 #define __NR_tkill              222
@@ -281,7 +283,7 @@
 #define __NR_mq_notify          275
 #define __NR_mq_getsetattr      276
 #define __NR_waitid             277
-#define __NR_vserver            278
+/*#define __NR_vserver          278*/
 #define __NR_add_key            279
 #define __NR_request_key        280
 #define __NR_keyctl             281
diff --git a/arch/m68k/kernel/Makefile_mm b/arch/m68k/kernel/Makefile_mm
index 55d5d6b680a2..aced67804579 100644
--- a/arch/m68k/kernel/Makefile_mm
+++ b/arch/m68k/kernel/Makefile_mm
@@ -10,7 +10,7 @@ endif
 extra-y += vmlinux.lds
 
 obj-y   := entry.o process.o traps.o ints.o signal.o ptrace.o module.o \
-           sys_m68k.o time.o setup.o m68k_ksyms.o devres.o
+           sys_m68k.o time.o setup.o m68k_ksyms.o devres.o syscalltable.o
 
 devres-y = ../../../kernel/irq/devres.o
 
diff --git a/arch/m68k/kernel/entry_mm.S b/arch/m68k/kernel/entry_mm.S
index 1359ee659574..bd0ec05263b2 100644
--- a/arch/m68k/kernel/entry_mm.S
+++ b/arch/m68k/kernel/entry_mm.S
@@ -407,351 +407,3 @@ resume:
 
         rts
 
-.data
-ALIGN
-sys_call_table:
-        .long sys_restart_syscall       /* 0 - old "setup()" system call, used for restarting */
-        .long sys_exit
-        .long sys_fork
-        .long sys_read
-        .long sys_write
-        .long sys_open          /* 5 */
-        .long sys_close
-        .long sys_waitpid
-        .long sys_creat
-        .long sys_link
-        .long sys_unlink        /* 10 */
-        .long sys_execve
-        .long sys_chdir
-        .long sys_time
-        .long sys_mknod
-        .long sys_chmod         /* 15 */
-        .long sys_chown16
-        .long sys_ni_syscall                            /* old break syscall holder */
-        .long sys_stat
-        .long sys_lseek
-        .long sys_getpid        /* 20 */
-        .long sys_mount
-        .long sys_oldumount
-        .long sys_setuid16
-        .long sys_getuid16
-        .long sys_stime         /* 25 */
-        .long sys_ptrace
-        .long sys_alarm
-        .long sys_fstat
-        .long sys_pause
-        .long sys_utime         /* 30 */
-        .long sys_ni_syscall                            /* old stty syscall holder */
-        .long sys_ni_syscall                            /* old gtty syscall holder */
-        .long sys_access
-        .long sys_nice
-        .long sys_ni_syscall    /* 35 */        /* old ftime syscall holder */
-        .long sys_sync
-        .long sys_kill
-        .long sys_rename
-        .long sys_mkdir
-        .long sys_rmdir         /* 40 */
-        .long sys_dup
-        .long sys_pipe
-        .long sys_times
-        .long sys_ni_syscall                            /* old prof syscall holder */
-        .long sys_brk           /* 45 */
-        .long sys_setgid16
-        .long sys_getgid16
-        .long sys_signal
-        .long sys_geteuid16
-        .long sys_getegid16     /* 50 */
-        .long sys_acct
-        .long sys_umount                                /* recycled never used phys() */
-        .long sys_ni_syscall                            /* old lock syscall holder */
-        .long sys_ioctl
-        .long sys_fcntl         /* 55 */
-        .long sys_ni_syscall                            /* old mpx syscall holder */
-        .long sys_setpgid
-        .long sys_ni_syscall                            /* old ulimit syscall holder */
-        .long sys_ni_syscall
-        .long sys_umask         /* 60 */
-        .long sys_chroot
-        .long sys_ustat
-        .long sys_dup2
-        .long sys_getppid
-        .long sys_getpgrp       /* 65 */
-        .long sys_setsid
-        .long sys_sigaction
-        .long sys_sgetmask
-        .long sys_ssetmask
-        .long sys_setreuid16    /* 70 */
-        .long sys_setregid16
-        .long sys_sigsuspend
-        .long sys_sigpending
-        .long sys_sethostname
-        .long sys_setrlimit     /* 75 */
-        .long sys_old_getrlimit
-        .long sys_getrusage
-        .long sys_gettimeofday
-        .long sys_settimeofday
-        .long sys_getgroups16   /* 80 */
-        .long sys_setgroups16
-        .long sys_old_select
-        .long sys_symlink
-        .long sys_lstat
-        .long sys_readlink      /* 85 */
-        .long sys_uselib
-        .long sys_swapon
-        .long sys_reboot
-        .long sys_old_readdir
-        .long sys_old_mmap      /* 90 */
-        .long sys_munmap
-        .long sys_truncate
-        .long sys_ftruncate
-        .long sys_fchmod
-        .long sys_fchown16      /* 95 */
-        .long sys_getpriority
-        .long sys_setpriority
-        .long sys_ni_syscall                            /* old profil syscall holder */
-        .long sys_statfs
-        .long sys_fstatfs       /* 100 */
-        .long sys_ni_syscall                            /* ioperm for i386 */
-        .long sys_socketcall
-        .long sys_syslog
-        .long sys_setitimer
-        .long sys_getitimer     /* 105 */
-        .long sys_newstat
-        .long sys_newlstat
-        .long sys_newfstat
-        .long sys_ni_syscall
-        .long sys_ni_syscall    /* 110 */       /* iopl for i386 */
-        .long sys_vhangup
-        .long sys_ni_syscall                            /* obsolete idle() syscall */
-        .long sys_ni_syscall                            /* vm86old for i386 */
-        .long sys_wait4
-        .long sys_swapoff       /* 115 */
-        .long sys_sysinfo
-        .long sys_ipc
-        .long sys_fsync
-        .long sys_sigreturn
-        .long sys_clone         /* 120 */
-        .long sys_setdomainname
-        .long sys_newuname
-        .long sys_cacheflush                            /* modify_ldt for i386 */
-        .long sys_adjtimex
-        .long sys_mprotect      /* 125 */
-        .long sys_sigprocmask
-        .long sys_ni_syscall            /* old "create_module" */
-        .long sys_init_module
-        .long sys_delete_module
-        .long sys_ni_syscall    /* 130 - old "get_kernel_syms" */
-        .long sys_quotactl
-        .long sys_getpgid
-        .long sys_fchdir
-        .long sys_bdflush
-        .long sys_sysfs         /* 135 */
-        .long sys_personality
-        .long sys_ni_syscall                            /* for afs_syscall */
-        .long sys_setfsuid16
-        .long sys_setfsgid16
-        .long sys_llseek        /* 140 */
-        .long sys_getdents
-        .long sys_select
-        .long sys_flock
-        .long sys_msync
-        .long sys_readv         /* 145 */
-        .long sys_writev
-        .long sys_getsid
-        .long sys_fdatasync
-        .long sys_sysctl
-        .long sys_mlock         /* 150 */
-        .long sys_munlock
-        .long sys_mlockall
-        .long sys_munlockall
-        .long sys_sched_setparam
-        .long sys_sched_getparam        /* 155 */
-        .long sys_sched_setscheduler
-        .long sys_sched_getscheduler
-        .long sys_sched_yield
-        .long sys_sched_get_priority_max
-        .long sys_sched_get_priority_min  /* 160 */
-        .long sys_sched_rr_get_interval
-        .long sys_nanosleep
-        .long sys_mremap
-        .long sys_setresuid16
-        .long sys_getresuid16   /* 165 */
-        .long sys_getpagesize
-        .long sys_ni_syscall            /* old sys_query_module */
-        .long sys_poll
-        .long sys_nfsservctl
-        .long sys_setresgid16   /* 170 */
-        .long sys_getresgid16
-        .long sys_prctl
-        .long sys_rt_sigreturn
-        .long sys_rt_sigaction
-        .long sys_rt_sigprocmask        /* 175 */
-        .long sys_rt_sigpending
-        .long sys_rt_sigtimedwait
-        .long sys_rt_sigqueueinfo
-        .long sys_rt_sigsuspend
-        .long sys_pread64       /* 180 */
-        .long sys_pwrite64
-        .long sys_lchown16;
-        .long sys_getcwd
-        .long sys_capget
-        .long sys_capset        /* 185 */
-        .long sys_sigaltstack
-        .long sys_sendfile
-        .long sys_ni_syscall                            /* streams1 */
-        .long sys_ni_syscall                            /* streams2 */
-        .long sys_vfork         /* 190 */
-        .long sys_getrlimit
-        .long sys_mmap2
-        .long sys_truncate64
-        .long sys_ftruncate64
-        .long sys_stat64        /* 195 */
-        .long sys_lstat64
-        .long sys_fstat64
-        .long sys_chown
-        .long sys_getuid
-        .long sys_getgid        /* 200 */
-        .long sys_geteuid
-        .long sys_getegid
-        .long sys_setreuid
-        .long sys_setregid
-        .long sys_getgroups     /* 205 */
-        .long sys_setgroups
-        .long sys_fchown
-        .long sys_setresuid
-        .long sys_getresuid
-        .long sys_setresgid     /* 210 */
-        .long sys_getresgid
-        .long sys_lchown
-        .long sys_setuid
-        .long sys_setgid
-        .long sys_setfsuid      /* 215 */
-        .long sys_setfsgid
-        .long sys_pivot_root
-        .long sys_ni_syscall
-        .long sys_ni_syscall
-        .long sys_getdents64    /* 220 */
-        .long sys_gettid
-        .long sys_tkill
-        .long sys_setxattr
-        .long sys_lsetxattr
-        .long sys_fsetxattr     /* 225 */
-        .long sys_getxattr
-        .long sys_lgetxattr
-        .long sys_fgetxattr
-        .long sys_listxattr
-        .long sys_llistxattr    /* 230 */
-        .long sys_flistxattr
-        .long sys_removexattr
-        .long sys_lremovexattr
-        .long sys_fremovexattr
-        .long sys_futex         /* 235 */
-        .long sys_sendfile64
-        .long sys_mincore
-        .long sys_madvise
-        .long sys_fcntl64
-        .long sys_readahead     /* 240 */
-        .long sys_io_setup
-        .long sys_io_destroy
-        .long sys_io_getevents
-        .long sys_io_submit
-        .long sys_io_cancel     /* 245 */
-        .long sys_fadvise64
-        .long sys_exit_group
-        .long sys_lookup_dcookie
-        .long sys_epoll_create
-        .long sys_epoll_ctl     /* 250 */
-        .long sys_epoll_wait
-        .long sys_remap_file_pages
-        .long sys_set_tid_address
-        .long sys_timer_create
-        .long sys_timer_settime /* 255 */
-        .long sys_timer_gettime
-        .long sys_timer_getoverrun
-        .long sys_timer_delete
-        .long sys_clock_settime
-        .long sys_clock_gettime /* 260 */
-        .long sys_clock_getres
-        .long sys_clock_nanosleep
-        .long sys_statfs64
-        .long sys_fstatfs64
-        .long sys_tgkill        /* 265 */
-        .long sys_utimes
-        .long sys_fadvise64_64
-        .long sys_mbind
-        .long sys_get_mempolicy
-        .long sys_set_mempolicy /* 270 */
-        .long sys_mq_open
-        .long sys_mq_unlink
-        .long sys_mq_timedsend
-        .long sys_mq_timedreceive
-        .long sys_mq_notify     /* 275 */
-        .long sys_mq_getsetattr
-        .long sys_waitid
-        .long sys_ni_syscall    /* for sys_vserver */
-        .long sys_add_key
-        .long sys_request_key   /* 280 */
-        .long sys_keyctl
-        .long sys_ioprio_set
-        .long sys_ioprio_get
-        .long sys_inotify_init
-        .long sys_inotify_add_watch     /* 285 */
-        .long sys_inotify_rm_watch
-        .long sys_migrate_pages
-        .long sys_openat
-        .long sys_mkdirat
-        .long sys_mknodat               /* 290 */
-        .long sys_fchownat
-        .long sys_futimesat
-        .long sys_fstatat64
-        .long sys_unlinkat
-        .long sys_renameat              /* 295 */
-        .long sys_linkat
-        .long sys_symlinkat
-        .long sys_readlinkat
-        .long sys_fchmodat
-        .long sys_faccessat             /* 300 */
-        .long sys_ni_syscall            /* Reserved for pselect6 */
-        .long sys_ni_syscall            /* Reserved for ppoll */
-        .long sys_unshare
-        .long sys_set_robust_list
-        .long sys_get_robust_list       /* 305 */
-        .long sys_splice
-        .long sys_sync_file_range
-        .long sys_tee
-        .long sys_vmsplice
-        .long sys_move_pages            /* 310 */
-        .long sys_sched_setaffinity
-        .long sys_sched_getaffinity
-        .long sys_kexec_load
-        .long sys_getcpu
-        .long sys_epoll_pwait           /* 315 */
-        .long sys_utimensat
-        .long sys_signalfd
-        .long sys_timerfd_create
-        .long sys_eventfd
-        .long sys_fallocate             /* 320 */
-        .long sys_timerfd_settime
-        .long sys_timerfd_gettime
-        .long sys_signalfd4
-        .long sys_eventfd2
-        .long sys_epoll_create1         /* 325 */
-        .long sys_dup3
-        .long sys_pipe2
-        .long sys_inotify_init1
-        .long sys_preadv
-        .long sys_pwritev               /* 330 */
-        .long sys_rt_tgsigqueueinfo
-        .long sys_perf_event_open
-        .long sys_get_thread_area
-        .long sys_set_thread_area
-        .long sys_atomic_cmpxchg_32     /* 335 */
-        .long sys_atomic_barrier
-        .long sys_fanotify_init
-        .long sys_fanotify_mark
-        .long sys_prlimit64
-        .long sys_name_to_handle_at     /* 340 */
-        .long sys_open_by_handle_at
-        .long sys_clock_adjtime
-        .long sys_syncfs
-
diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S
index 9b8393d8adb8..5909e392cb1e 100644
--- a/arch/m68k/kernel/syscalltable.S
+++ b/arch/m68k/kernel/syscalltable.S
@@ -1,6 +1,4 @@
 /*
- *  linux/arch/m68knommu/kernel/syscalltable.S
- *
  *  Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com)
  *
  *  Based on older entry.S files, the following copyrights apply:
@@ -9,171 +7,176 @@
  *                      Kenneth Albanowski <kjahds@kjahds.com>,
  *  Copyright (C) 2000  Lineo Inc. (www.lineo.com) 
  *  Copyright (C) 1991, 1992  Linus Torvalds
+ *
+ *  Linux/m68k support by Hamish Macdonald
  */
 
 #include <linux/sys.h>
 #include <linux/linkage.h>
-#include <asm/unistd.h>
 
-.text
+#ifndef CONFIG_MMU
+#define sys_mmap2               sys_mmap_pgoff
+#endif
+
+.section .rodata
 ALIGN
 ENTRY(sys_call_table)
-        .long sys_restart_syscall       /* 0  -  old "setup()" system call */
+        .long sys_restart_syscall       /* 0 - old "setup()" system call, used for restarting */
         .long sys_exit
         .long sys_fork
         .long sys_read
         .long sys_write
-        .long sys_open          /* 5 */
+        .long sys_open                  /* 5 */
         .long sys_close
         .long sys_waitpid
         .long sys_creat
         .long sys_link
-        .long sys_unlink        /* 10 */
+        .long sys_unlink                /* 10 */
         .long sys_execve
         .long sys_chdir
         .long sys_time
         .long sys_mknod
-        .long sys_chmod         /* 15 */
+        .long sys_chmod                 /* 15 */
         .long sys_chown16
-        .long sys_ni_syscall    /* old break syscall holder */
+        .long sys_ni_syscall            /* old break syscall holder */
         .long sys_stat
         .long sys_lseek
-        .long sys_getpid        /* 20 */
+        .long sys_getpid                /* 20 */
         .long sys_mount
         .long sys_oldumount
         .long sys_setuid16
         .long sys_getuid16
-        .long sys_stime         /* 25 */
+        .long sys_stime                 /* 25 */
         .long sys_ptrace
         .long sys_alarm
         .long sys_fstat
         .long sys_pause
-        .long sys_utime         /* 30 */
-        .long sys_ni_syscall    /* old stty syscall holder */
-        .long sys_ni_syscall    /* old gtty syscall holder */
+        .long sys_utime                 /* 30 */
+        .long sys_ni_syscall            /* old stty syscall holder */
+        .long sys_ni_syscall            /* old gtty syscall holder */
         .long sys_access
         .long sys_nice
-        .long sys_ni_syscall    /* 35 */ /* old ftime syscall holder */
+        .long sys_ni_syscall            /* 35 - old ftime syscall holder */
         .long sys_sync
         .long sys_kill
         .long sys_rename
         .long sys_mkdir
-        .long sys_rmdir         /* 40 */
+        .long sys_rmdir                 /* 40 */
         .long sys_dup
         .long sys_pipe
         .long sys_times
-        .long sys_ni_syscall    /* old prof syscall holder */
-        .long sys_brk           /* 45 */
+        .long sys_ni_syscall            /* old prof syscall holder */
+        .long sys_brk                   /* 45 */
         .long sys_setgid16
         .long sys_getgid16
         .long sys_signal
         .long sys_geteuid16
-        .long sys_getegid16     /* 50 */
+        .long sys_getegid16             /* 50 */
         .long sys_acct
-        .long sys_umount        /* recycled never used phys() */
-        .long sys_ni_syscall    /* old lock syscall holder */
+        .long sys_umount                /* recycled never used phys() */
+        .long sys_ni_syscall            /* old lock syscall holder */
         .long sys_ioctl
-        .long sys_fcntl         /* 55 */
-        .long sys_ni_syscall    /* old mpx syscall holder */
+        .long sys_fcntl                 /* 55 */
+        .long sys_ni_syscall            /* old mpx syscall holder */
         .long sys_setpgid
-        .long sys_ni_syscall    /* old ulimit syscall holder */
+        .long sys_ni_syscall            /* old ulimit syscall holder */
         .long sys_ni_syscall
-        .long sys_umask         /* 60 */
+        .long sys_umask                 /* 60 */
         .long sys_chroot
         .long sys_ustat
         .long sys_dup2
         .long sys_getppid
-        .long sys_getpgrp       /* 65 */
+        .long sys_getpgrp               /* 65 */
         .long sys_setsid
         .long sys_sigaction
         .long sys_sgetmask
         .long sys_ssetmask
-        .long sys_setreuid16    /* 70 */
+        .long sys_setreuid16            /* 70 */
         .long sys_setregid16
         .long sys_sigsuspend
         .long sys_sigpending
         .long sys_sethostname
-        .long sys_setrlimit     /* 75 */
+        .long sys_setrlimit             /* 75 */
         .long sys_old_getrlimit
         .long sys_getrusage
         .long sys_gettimeofday
         .long sys_settimeofday
-        .long sys_getgroups16   /* 80 */
+        .long sys_getgroups16           /* 80 */
         .long sys_setgroups16
         .long sys_old_select
         .long sys_symlink
         .long sys_lstat
-        .long sys_readlink      /* 85 */
+        .long sys_readlink              /* 85 */
         .long sys_uselib
-        .long sys_ni_syscall    /* sys_swapon */
+        .long sys_swapon
         .long sys_reboot
         .long sys_old_readdir
-        .long sys_old_mmap      /* 90 */
+        .long sys_old_mmap              /* 90 */
         .long sys_munmap
         .long sys_truncate
         .long sys_ftruncate
         .long sys_fchmod
-        .long sys_fchown16      /* 95 */
+        .long sys_fchown16              /* 95 */
         .long sys_getpriority
         .long sys_setpriority
-        .long sys_ni_syscall    /* old profil syscall holder */
+        .long sys_ni_syscall            /* old profil syscall holder */
         .long sys_statfs
-        .long sys_fstatfs       /* 100 */
-        .long sys_ni_syscall    /* ioperm for i386 */
+        .long sys_fstatfs               /* 100 */
+        .long sys_ni_syscall            /* ioperm for i386 */
         .long sys_socketcall
         .long sys_syslog
         .long sys_setitimer
-        .long sys_getitimer     /* 105 */
+        .long sys_getitimer             /* 105 */
         .long sys_newstat
         .long sys_newlstat
         .long sys_newfstat
         .long sys_ni_syscall
-        .long sys_ni_syscall    /* iopl for i386 */ /* 110 */
+        .long sys_ni_syscall            /* 110 - iopl for i386 */
         .long sys_vhangup
-        .long sys_ni_syscall    /* obsolete idle() syscall */
-        .long sys_ni_syscall    /* vm86old for i386 */
+        .long sys_ni_syscall            /* obsolete idle() syscall */
+        .long sys_ni_syscall            /* vm86old for i386 */
         .long sys_wait4
-        .long sys_ni_syscall    /* 115 */ /* sys_swapoff */
+        .long sys_swapoff               /* 115 */
         .long sys_sysinfo
         .long sys_ipc
         .long sys_fsync
         .long sys_sigreturn
-        .long sys_clone         /* 120 */
+        .long sys_clone                 /* 120 */
         .long sys_setdomainname
         .long sys_newuname
-        .long sys_cacheflush    /* modify_ldt for i386 */
+        .long sys_cacheflush            /* modify_ldt for i386 */
         .long sys_adjtimex
-        .long sys_ni_syscall    /* 125 */ /* sys_mprotect */
+        .long sys_mprotect              /* 125 */
         .long sys_sigprocmask
-        .long sys_ni_syscall    /* old "creat_module" */
+        .long sys_ni_syscall            /* old "create_module" */
         .long sys_init_module
         .long sys_delete_module
-        .long sys_ni_syscall    /* 130: old "get_kernel_syms" */
+        .long sys_ni_syscall            /* 130 - old "get_kernel_syms" */
         .long sys_quotactl
         .long sys_getpgid
         .long sys_fchdir
         .long sys_bdflush
-        .long sys_sysfs         /* 135 */
+        .long sys_sysfs                 /* 135 */
         .long sys_personality
-        .long sys_ni_syscall    /* for afs_syscall */
+        .long sys_ni_syscall            /* for afs_syscall */
         .long sys_setfsuid16
         .long sys_setfsgid16
-        .long sys_llseek        /* 140 */
+        .long sys_llseek                /* 140 */
         .long sys_getdents
         .long sys_select
         .long sys_flock
-        .long sys_ni_syscall    /* sys_msync */
-        .long sys_readv         /* 145 */
+        .long sys_msync
+        .long sys_readv                 /* 145 */
         .long sys_writev
         .long sys_getsid
         .long sys_fdatasync
         .long sys_sysctl
-        .long sys_ni_syscall    /* 150 */ /* sys_mlock */
-        .long sys_ni_syscall    /* sys_munlock */
-        .long sys_ni_syscall    /* sys_mlockall */
-        .long sys_ni_syscall    /* sys_munlockall */
+        .long sys_mlock                 /* 150 */
+        .long sys_munlock
+        .long sys_mlockall
+        .long sys_munlockall
         .long sys_sched_setparam
-        .long sys_sched_getparam /* 155 */
+        .long sys_sched_getparam        /* 155 */
         .long sys_sched_setscheduler
         .long sys_sched_getscheduler
         .long sys_sched_yield
@@ -181,124 +184,124 @@ ENTRY(sys_call_table)
         .long sys_sched_get_priority_min  /* 160 */
         .long sys_sched_rr_get_interval
         .long sys_nanosleep
-        .long sys_ni_syscall    /* sys_mremap */
+        .long sys_mremap
         .long sys_setresuid16
-        .long sys_getresuid16   /* 165 */
-        .long sys_getpagesize   /* sys_getpagesize */
-        .long sys_ni_syscall    /* old "query_module" */
+        .long sys_getresuid16           /* 165 */
+        .long sys_getpagesize
+        .long sys_ni_syscall            /* old "query_module" */
         .long sys_poll
-        .long sys_ni_syscall    /* sys_nfsservctl */
-        .long sys_setresgid16   /* 170 */
+        .long sys_nfsservctl
+        .long sys_setresgid16           /* 170 */
         .long sys_getresgid16
         .long sys_prctl
         .long sys_rt_sigreturn
         .long sys_rt_sigaction
-        .long sys_rt_sigprocmask /* 175 */
+        .long sys_rt_sigprocmask        /* 175 */
         .long sys_rt_sigpending
         .long sys_rt_sigtimedwait
         .long sys_rt_sigqueueinfo
         .long sys_rt_sigsuspend
-        .long sys_pread64       /* 180 */
+        .long sys_pread64               /* 180 */
         .long sys_pwrite64
         .long sys_lchown16
         .long sys_getcwd
         .long sys_capget
-        .long sys_capset        /* 185 */
+        .long sys_capset                /* 185 */
         .long sys_sigaltstack
         .long sys_sendfile
-        .long sys_ni_syscall    /* streams1 */
-        .long sys_ni_syscall    /* streams2 */
-        .long sys_vfork         /* 190 */
+        .long sys_ni_syscall            /* streams1 */
+        .long sys_ni_syscall            /* streams2 */
+        .long sys_vfork                 /* 190 */
         .long sys_getrlimit
-        .long sys_mmap_pgoff
+        .long sys_mmap2
         .long sys_truncate64
         .long sys_ftruncate64
-        .long sys_stat64        /* 195 */
+        .long sys_stat64                /* 195 */
         .long sys_lstat64
         .long sys_fstat64
         .long sys_chown
         .long sys_getuid
-        .long sys_getgid        /* 200 */
+        .long sys_getgid                /* 200 */
         .long sys_geteuid
         .long sys_getegid
         .long sys_setreuid
         .long sys_setregid
-        .long sys_getgroups     /* 205 */
+        .long sys_getgroups             /* 205 */
         .long sys_setgroups
         .long sys_fchown
         .long sys_setresuid
         .long sys_getresuid
-        .long sys_setresgid     /* 210 */
+        .long sys_setresgid             /* 210 */
         .long sys_getresgid
         .long sys_lchown
         .long sys_setuid
         .long sys_setgid
-        .long sys_setfsuid      /* 215 */
+        .long sys_setfsuid              /* 215 */
         .long sys_setfsgid
         .long sys_pivot_root
         .long sys_ni_syscall
         .long sys_ni_syscall
-        .long sys_getdents64    /* 220 */
+        .long sys_getdents64            /* 220 */
         .long sys_gettid
         .long sys_tkill
         .long sys_setxattr
         .long sys_lsetxattr
-        .long sys_fsetxattr     /* 225 */
+        .long sys_fsetxattr             /* 225 */
         .long sys_getxattr
         .long sys_lgetxattr
         .long sys_fgetxattr
         .long sys_listxattr
-        .long sys_llistxattr    /* 230 */
+        .long sys_llistxattr            /* 230 */
         .long sys_flistxattr
         .long sys_removexattr
         .long sys_lremovexattr
         .long sys_fremovexattr
-        .long sys_futex         /* 235 */
+        .long sys_futex                 /* 235 */
         .long sys_sendfile64
-        .long sys_ni_syscall    /* sys_mincore */
-        .long sys_ni_syscall    /* sys_madvise */
+        .long sys_mincore
+        .long sys_madvise
         .long sys_fcntl64
-        .long sys_readahead     /* 240 */
+        .long sys_readahead             /* 240 */
         .long sys_io_setup
         .long sys_io_destroy
         .long sys_io_getevents
         .long sys_io_submit
-        .long sys_io_cancel     /* 245 */
+        .long sys_io_cancel             /* 245 */
         .long sys_fadvise64
         .long sys_exit_group
         .long sys_lookup_dcookie
         .long sys_epoll_create
-        .long sys_epoll_ctl     /* 250 */
+        .long sys_epoll_ctl             /* 250 */
         .long sys_epoll_wait
-        .long sys_ni_syscall    /* sys_remap_file_pages */
+        .long sys_remap_file_pages
         .long sys_set_tid_address
         .long sys_timer_create
-        .long sys_timer_settime /* 255 */
+        .long sys_timer_settime         /* 255 */
         .long sys_timer_gettime
         .long sys_timer_getoverrun
         .long sys_timer_delete
         .long sys_clock_settime
-        .long sys_clock_gettime /* 260 */
+        .long sys_clock_gettime         /* 260 */
         .long sys_clock_getres
         .long sys_clock_nanosleep
         .long sys_statfs64
         .long sys_fstatfs64
-        .long sys_tgkill        /* 265 */
+        .long sys_tgkill                /* 265 */
         .long sys_utimes
         .long sys_fadvise64_64
-        .long sys_mbind 
+        .long sys_mbind
         .long sys_get_mempolicy
-        .long sys_set_mempolicy /* 270 */
+        .long sys_set_mempolicy         /* 270 */
         .long sys_mq_open
         .long sys_mq_unlink
         .long sys_mq_timedsend
         .long sys_mq_timedreceive
-        .long sys_mq_notify     /* 275 */
+        .long sys_mq_notify             /* 275 */
         .long sys_mq_getsetattr
         .long sys_waitid
-        .long sys_ni_syscall    /* for sys_vserver */
+        .long sys_ni_syscall            /* for sys_vserver */
         .long sys_add_key
-        .long sys_request_key   /* 280 */
+        .long sys_request_key           /* 280 */
         .long sys_keyctl
         .long sys_ioprio_set
         .long sys_ioprio_get
@@ -319,8 +322,8 @@ ENTRY(sys_call_table)
         .long sys_readlinkat
         .long sys_fchmodat
         .long sys_faccessat             /* 300 */
-        .long sys_ni_syscall            /* Reserved for pselect6 */
-        .long sys_ni_syscall            /* Reserved for ppoll */
+        .long sys_pselect6
+        .long sys_ppoll
         .long sys_unshare
         .long sys_set_robust_list
         .long sys_get_robust_list       /* 305 */
@@ -363,7 +366,3 @@ ENTRY(sys_call_table)
         .long sys_clock_adjtime
         .long sys_syncfs
 
-        .rept NR_syscalls-(.-sys_call_table)/4
-                .long sys_ni_syscall
-        .endr
-
diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
index 7ff9b5492041..aef6c917b45a 100644
--- a/arch/mips/Kbuild.platforms
+++ b/arch/mips/Kbuild.platforms
@@ -11,6 +11,7 @@ platforms += dec
 platforms += emma
 platforms += jazz
 platforms += jz4740
+platforms += lantiq
 platforms += lasat
 platforms += loongson
 platforms += mipssim
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 8e256cc5dcd9..2d1cf9740953 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -212,6 +212,24 @@ config MACH_JZ4740
         select HAVE_PWM
         select HAVE_CLK
 
+config LANTIQ
+        bool "Lantiq based platforms"
+        select DMA_NONCOHERENT
+        select IRQ_CPU
+        select CEVT_R4K
+        select CSRC_R4K
+        select SYS_HAS_CPU_MIPS32_R1
+        select SYS_HAS_CPU_MIPS32_R2
+        select SYS_SUPPORTS_BIG_ENDIAN
+        select SYS_SUPPORTS_32BIT_KERNEL
+        select SYS_SUPPORTS_MULTITHREADING
+        select SYS_HAS_EARLY_PRINTK
+        select ARCH_REQUIRE_GPIOLIB
+        select SWAP_IO_SPACE
+        select BOOT_RAW
+        select HAVE_CLK
+        select MIPS_MACHINE
+
 config LASAT
         bool "LASAT Networks platforms"
         select CEVT_R4K
@@ -736,6 +754,33 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
                 Hikari
           Say Y here for most Octeon reference boards.
 
+config NLM_XLR_BOARD
+        bool "Netlogic XLR/XLS based systems"
+        depends on EXPERIMENTAL
+        select BOOT_ELF32
+        select NLM_COMMON
+        select NLM_XLR
+        select SYS_HAS_CPU_XLR
+        select SYS_SUPPORTS_SMP
+        select HW_HAS_PCI
+        select SWAP_IO_SPACE
+        select SYS_SUPPORTS_32BIT_KERNEL
+        select SYS_SUPPORTS_64BIT_KERNEL
+        select 64BIT_PHYS_ADDR
+        select SYS_SUPPORTS_BIG_ENDIAN
+        select SYS_SUPPORTS_HIGHMEM
+        select DMA_COHERENT
+        select NR_CPUS_DEFAULT_32
+        select CEVT_R4K
+        select CSRC_R4K
+        select IRQ_CPU
+        select ZONE_DMA if 64BIT
+        select SYNC_R4K
+        select SYS_HAS_EARLY_PRINTK
+        help
+          Support for systems based on Netlogic XLR and XLS processors.
+          Say Y here if you have a XLR or XLS based board.
+
 endchoice
 
 source "arch/mips/alchemy/Kconfig"
@@ -743,6 +788,7 @@ source "arch/mips/ath79/Kconfig"
 source "arch/mips/bcm63xx/Kconfig"
 source "arch/mips/jazz/Kconfig"
 source "arch/mips/jz4740/Kconfig"
+source "arch/mips/lantiq/Kconfig"
 source "arch/mips/lasat/Kconfig"
 source "arch/mips/pmc-sierra/Kconfig"
 source "arch/mips/powertv/Kconfig"
@@ -752,6 +798,7 @@ source "arch/mips/txx9/Kconfig"
 source "arch/mips/vr41xx/Kconfig"
 source "arch/mips/cavium-octeon/Kconfig"
 source "arch/mips/loongson/Kconfig"
+source "arch/mips/netlogic/Kconfig"
 
 endmenu
 
@@ -997,9 +1044,6 @@ config IRQ_GT641XX
 config IRQ_GIC
         bool
 
-config IRQ_CPU_OCTEON
-        bool
-
 config MIPS_BOARDS_GEN
         bool
 
@@ -1359,8 +1403,6 @@ config CPU_SB1
 config CPU_CAVIUM_OCTEON
         bool "Cavium Octeon processor"
         depends on SYS_HAS_CPU_CAVIUM_OCTEON
-        select IRQ_CPU
-        select IRQ_CPU_OCTEON
         select CPU_HAS_PREFETCH
         select CPU_SUPPORTS_64BIT_KERNEL
         select SYS_SUPPORTS_SMP
@@ -1425,6 +1467,17 @@ config CPU_BMIPS5000
         help
           Broadcom BMIPS5000 processors.
 
+config CPU_XLR
+        bool "Netlogic XLR SoC"
+        depends on SYS_HAS_CPU_XLR
+        select CPU_SUPPORTS_32BIT_KERNEL
+        select CPU_SUPPORTS_64BIT_KERNEL
+        select CPU_SUPPORTS_HIGHMEM
+        select WEAK_ORDERING
+        select WEAK_REORDERING_BEYOND_LLSC
+        select CPU_SUPPORTS_HUGEPAGES
+        help
+          Netlogic Microsystems XLR/XLS processors.
 endchoice
 
 if CPU_LOONGSON2F
@@ -1555,6 +1608,9 @@ config SYS_HAS_CPU_BMIPS4380
 config SYS_HAS_CPU_BMIPS5000
         bool
 
+config SYS_HAS_CPU_XLR
+        bool
+
 #
 # CPU may reorder R->R, R->W, W->R, W->W
 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 53e3514ba10e..884819cd0607 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -191,6 +191,18 @@ endif
 #
 include $(srctree)/arch/mips/Kbuild.platforms
 
+#
+# NETLOGIC SOC Common (common)
+#
+cflags-$(CONFIG_NLM_COMMON)             += -I$(srctree)/arch/mips/include/asm/mach-netlogic
+cflags-$(CONFIG_NLM_COMMON)             += -I$(srctree)/arch/mips/include/asm/netlogic
+
+#
+# NETLOGIC XLR/XLS SoC, Simulator and boards
+#
+core-$(CONFIG_NLM_XLR)                  += arch/mips/netlogic/xlr/
+load-$(CONFIG_NLM_XLR_BOARD)            += 0xffffffff84000000
+
 cflags-y                        += -I$(srctree)/arch/mips/include/asm/mach-generic
 drivers-$(CONFIG_PCI)           += arch/mips/pci/
 
diff --git a/arch/mips/alchemy/common/dbdma.c b/arch/mips/alchemy/common/dbdma.c
index ca0506a8585a..3a5abb54d505 100644
--- a/arch/mips/alchemy/common/dbdma.c
+++ b/arch/mips/alchemy/common/dbdma.c
@@ -36,7 +36,7 @@
 #include <linux/spinlock.h>
 #include <linux/interrupt.h>
 #include <linux/module.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-au1x00/au1xxx_dbdma.h>
 
@@ -58,7 +58,8 @@ static DEFINE_SPINLOCK(au1xxx_dbdma_spin_lock);
 /* I couldn't find a macro that did this... */
 #define ALIGN_ADDR(x, a)        ((((u32)(x)) + (a-1)) & ~(a-1))
 
-static dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE;
+static dbdma_global_t *dbdma_gptr =
+                        (dbdma_global_t *)KSEG1ADDR(AU1550_DBDMA_CONF_PHYS_ADDR);
 static int dbdma_initialized;
 
 static dbdev_tab_t dbdev_tab[] = {
@@ -299,7 +300,7 @@ u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
         if (ctp != NULL) {
                 memset(ctp, 0, sizeof(chan_tab_t));
                 ctp->chan_index = chan = i;
-                dcp = DDMA_CHANNEL_BASE;
+                dcp = KSEG1ADDR(AU1550_DBDMA_PHYS_ADDR);
                 dcp += (0x0100 * chan);
                 ctp->chan_ptr = (au1x_dma_chan_t *)dcp;
                 cp = (au1x_dma_chan_t *)dcp;
@@ -958,105 +959,75 @@ u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr)
 }
 
 
-struct alchemy_dbdma_sysdev {
-        struct sys_device sysdev;
-        u32 pm_regs[NUM_DBDMA_CHANS + 1][6];
-};
+static unsigned long alchemy_dbdma_pm_data[NUM_DBDMA_CHANS + 1][6];
 
-static int alchemy_dbdma_suspend(struct sys_device *dev,
-                                 pm_message_t state)
+static int alchemy_dbdma_suspend(void)
 {
-        struct alchemy_dbdma_sysdev *sdev =
-                container_of(dev, struct alchemy_dbdma_sysdev, sysdev);
         int i;
-        u32 addr;
+        void __iomem *addr;
 
-        addr = DDMA_GLOBAL_BASE;
-        sdev->pm_regs[0][0] = au_readl(addr + 0x00);
-        sdev->pm_regs[0][1] = au_readl(addr + 0x04);
-        sdev->pm_regs[0][2] = au_readl(addr + 0x08);
-        sdev->pm_regs[0][3] = au_readl(addr + 0x0c);
+        addr = (void __iomem *)KSEG1ADDR(AU1550_DBDMA_CONF_PHYS_ADDR);
+        alchemy_dbdma_pm_data[0][0] = __raw_readl(addr + 0x00);
+        alchemy_dbdma_pm_data[0][1] = __raw_readl(addr + 0x04);
+        alchemy_dbdma_pm_data[0][2] = __raw_readl(addr + 0x08);
+        alchemy_dbdma_pm_data[0][3] = __raw_readl(addr + 0x0c);
 
         /* save channel configurations */
-        for (i = 1, addr = DDMA_CHANNEL_BASE; i <= NUM_DBDMA_CHANS; i++) {
-                sdev->pm_regs[i][0] = au_readl(addr + 0x00);
-                sdev->pm_regs[i][1] = au_readl(addr + 0x04);
-                sdev->pm_regs[i][2] = au_readl(addr + 0x08);
-                sdev->pm_regs[i][3] = au_readl(addr + 0x0c);
-                sdev->pm_regs[i][4] = au_readl(addr + 0x10);
-                sdev->pm_regs[i][5] = au_readl(addr + 0x14);
+        addr = (void __iomem *)KSEG1ADDR(AU1550_DBDMA_PHYS_ADDR);
+        for (i = 1; i <= NUM_DBDMA_CHANS; i++) {
+                alchemy_dbdma_pm_data[i][0] = __raw_readl(addr + 0x00);
+                alchemy_dbdma_pm_data[i][1] = __raw_readl(addr + 0x04);
+                alchemy_dbdma_pm_data[i][2] = __raw_readl(addr + 0x08);
+                alchemy_dbdma_pm_data[i][3] = __raw_readl(addr + 0x0c);
+                alchemy_dbdma_pm_data[i][4] = __raw_readl(addr + 0x10);
+                alchemy_dbdma_pm_data[i][5] = __raw_readl(addr + 0x14);
 
                 /* halt channel */
-                au_writel(sdev->pm_regs[i][0] & ~1, addr + 0x00);
-                au_sync();
-                while (!(au_readl(addr + 0x14) & 1))
-                        au_sync();
+                __raw_writel(alchemy_dbdma_pm_data[i][0] & ~1, addr + 0x00);
+                wmb();
+                while (!(__raw_readl(addr + 0x14) & 1))
+                        wmb();
 
                 addr += 0x100;  /* next channel base */
         }
         /* disable channel interrupts */
-        au_writel(0, DDMA_GLOBAL_BASE + 0x0c);
-        au_sync();
+        addr = (void __iomem *)KSEG1ADDR(AU1550_DBDMA_CONF_PHYS_ADDR);
+        __raw_writel(0, addr + 0x0c);
+        wmb();
 
         return 0;
 }
 
-static int alchemy_dbdma_resume(struct sys_device *dev)
+static void alchemy_dbdma_resume(void)
 {
-        struct alchemy_dbdma_sysdev *sdev =
-                container_of(dev, struct alchemy_dbdma_sysdev, sysdev);
         int i;
-        u32 addr;
+        void __iomem *addr;
 
-        addr = DDMA_GLOBAL_BASE;
-        au_writel(sdev->pm_regs[0][0], addr + 0x00);
-        au_writel(sdev->pm_regs[0][1], addr + 0x04);
-        au_writel(sdev->pm_regs[0][2], addr + 0x08);
-        au_writel(sdev->pm_regs[0][3], addr + 0x0c);
+        addr = (void __iomem *)KSEG1ADDR(AU1550_DBDMA_CONF_PHYS_ADDR);
+        __raw_writel(alchemy_dbdma_pm_data[0][0], addr + 0x00);
+        __raw_writel(alchemy_dbdma_pm_data[0][1], addr + 0x04);
+        __raw_writel(alchemy_dbdma_pm_data[0][2], addr + 0x08);
+        __raw_writel(alchemy_dbdma_pm_data[0][3], addr + 0x0c);
 
         /* restore channel configurations */
-        for (i = 1, addr = DDMA_CHANNEL_BASE; i <= NUM_DBDMA_CHANS; i++) {
-                au_writel(sdev->pm_regs[i][0], addr + 0x00);
-                au_writel(sdev->pm_regs[i][1], addr + 0x04);
-                au_writel(sdev->pm_regs[i][2], addr + 0x08);
-                au_writel(sdev->pm_regs[i][3], addr + 0x0c);
-                au_writel(sdev->pm_regs[i][4], addr + 0x10);
-                au_writel(sdev->pm_regs[i][5], addr + 0x14);
-                au_sync();
+        addr = (void __iomem *)KSEG1ADDR(AU1550_DBDMA_PHYS_ADDR);
+        for (i = 1; i <= NUM_DBDMA_CHANS; i++) {
+                __raw_writel(alchemy_dbdma_pm_data[i][0], addr + 0x00);
+                __raw_writel(alchemy_dbdma_pm_data[i][1], addr + 0x04);
+                __raw_writel(alchemy_dbdma_pm_data[i][2], addr + 0x08);
+                __raw_writel(alchemy_dbdma_pm_data[i][3], addr + 0x0c);
+                __raw_writel(alchemy_dbdma_pm_data[i][4], addr + 0x10);
+                __raw_writel(alchemy_dbdma_pm_data[i][5], addr + 0x14);
+                wmb();
                 addr += 0x100;  /* next channel base */
         }
-
-        return 0;
 }
 
-static struct sysdev_class alchemy_dbdma_sysdev_class = {
-        .name           = "dbdma",
+static struct syscore_ops alchemy_dbdma_syscore_ops = {
         .suspend        = alchemy_dbdma_suspend,
         .resume         = alchemy_dbdma_resume,
 };
 
-static int __init alchemy_dbdma_sysdev_init(void)
-{
-        struct alchemy_dbdma_sysdev *sdev;
-        int ret;
-
-        ret = sysdev_class_register(&alchemy_dbdma_sysdev_class);
-        if (ret)
-                return ret;
-
-        sdev = kzalloc(sizeof(struct alchemy_dbdma_sysdev), GFP_KERNEL);
-        if (!sdev)
-                return -ENOMEM;
-
-        sdev->sysdev.id = -1;
-        sdev->sysdev.cls = &alchemy_dbdma_sysdev_class;
-        ret = sysdev_register(&sdev->sysdev);
-        if (ret)
-                kfree(sdev);
-
-        return ret;
-}
-
 static int __init au1xxx_dbdma_init(void)
 {
         int irq_nr, ret;
@@ -1084,11 +1055,7 @@ static int __init au1xxx_dbdma_init(void)
         else {
                 dbdma_initialized = 1;
                 printk(KERN_INFO "Alchemy DBDMA initialized\n");
-                ret = alchemy_dbdma_sysdev_init();
-                if (ret) {
-                        printk(KERN_ERR "DBDMA PM init failed\n");
-                        ret = 0;
-                }
+                register_syscore_ops(&alchemy_dbdma_syscore_ops);
         }
 
         return ret;
diff --git a/arch/mips/alchemy/common/dma.c b/arch/mips/alchemy/common/dma.c
index d5278877891d..347980e79a89 100644
--- a/arch/mips/alchemy/common/dma.c
+++ b/arch/mips/alchemy/common/dma.c
@@ -58,6 +58,9 @@
  * returned from request_dma.
  */
 
+/* DMA Channel register block spacing */
+#define DMA_CHANNEL_LEN         0x00000100
+
 DEFINE_SPINLOCK(au1000_dma_spin_lock);
 
 struct dma_chan au1000_dma_table[NUM_AU1000_DMA_CHANNELS] = {
@@ -77,22 +80,23 @@ static const struct dma_dev {
         unsigned int fifo_addr;
         unsigned int dma_mode;
 } dma_dev_table[DMA_NUM_DEV] = {
-        {UART0_ADDR + UART_TX, 0},
-        {UART0_ADDR + UART_RX, 0},
-        {0, 0},
-        {0, 0},
-        {AC97C_DATA, DMA_DW16 },          /* coherent */
-        {AC97C_DATA, DMA_DR | DMA_DW16 }, /* coherent */
-        {UART3_ADDR + UART_TX, DMA_DW8 | DMA_NC},
-        {UART3_ADDR + UART_RX, DMA_DR | DMA_DW8 | DMA_NC},
-        {USBD_EP0RD, DMA_DR | DMA_DW8 | DMA_NC},
-        {USBD_EP0WR, DMA_DW8 | DMA_NC},
-        {USBD_EP2WR, DMA_DW8 | DMA_NC},
-        {USBD_EP3WR, DMA_DW8 | DMA_NC},
-        {USBD_EP4RD, DMA_DR | DMA_DW8 | DMA_NC},
-        {USBD_EP5RD, DMA_DR | DMA_DW8 | DMA_NC},
-        {I2S_DATA, DMA_DW32 | DMA_NC},
-        {I2S_DATA, DMA_DR | DMA_DW32 | DMA_NC}
+        { AU1000_UART0_PHYS_ADDR + 0x04, DMA_DW8 },             /* UART0_TX */
+        { AU1000_UART0_PHYS_ADDR + 0x00, DMA_DW8 | DMA_DR },    /* UART0_RX */
+        { 0, 0 },       /* DMA_REQ0 */
+        { 0, 0 },       /* DMA_REQ1 */
+        { AU1000_AC97_PHYS_ADDR + 0x08, DMA_DW16 },             /* AC97 TX c */
+        { AU1000_AC97_PHYS_ADDR + 0x08, DMA_DW16 | DMA_DR },    /* AC97 RX c */
+        { AU1000_UART3_PHYS_ADDR + 0x04, DMA_DW8 | DMA_NC },    /* UART3_TX */
+        { AU1000_UART3_PHYS_ADDR + 0x00, DMA_DW8 | DMA_NC | DMA_DR }, /* UART3_RX */
+        { AU1000_USBD_PHYS_ADDR + 0x00, DMA_DW8 | DMA_NC | DMA_DR }, /* EP0RD */
+        { AU1000_USBD_PHYS_ADDR + 0x04, DMA_DW8 | DMA_NC }, /* EP0WR */
+        { AU1000_USBD_PHYS_ADDR + 0x08, DMA_DW8 | DMA_NC }, /* EP2WR */
+        { AU1000_USBD_PHYS_ADDR + 0x0c, DMA_DW8 | DMA_NC }, /* EP3WR */
+        { AU1000_USBD_PHYS_ADDR + 0x10, DMA_DW8 | DMA_NC | DMA_DR }, /* EP4RD */
+        { AU1000_USBD_PHYS_ADDR + 0x14, DMA_DW8 | DMA_NC | DMA_DR }, /* EP5RD */
+        /* on Au1500, these 2 are DMA_REQ2/3 (GPIO208/209) instead! */
+        { AU1000_I2S_PHYS_ADDR + 0x00, DMA_DW32 | DMA_NC},      /* I2S TX */
+        { AU1000_I2S_PHYS_ADDR + 0x00, DMA_DW32 | DMA_NC | DMA_DR}, /* I2S RX */
 };
 
 int au1000_dma_read_proc(char *buf, char **start, off_t fpos,
@@ -123,10 +127,10 @@ int au1000_dma_read_proc(char *buf, char **start, off_t fpos,
 
 /* Device FIFO addresses and default DMA modes - 2nd bank */
 static const struct dma_dev dma_dev_table_bank2[DMA_NUM_DEV_BANK2] = {
-        { SD0_XMIT_FIFO, DMA_DS | DMA_DW8 },            /* coherent */
-        { SD0_RECV_FIFO, DMA_DS | DMA_DR | DMA_DW8 },   /* coherent */
-        { SD1_XMIT_FIFO, DMA_DS | DMA_DW8 },            /* coherent */
-        { SD1_RECV_FIFO, DMA_DS | DMA_DR | DMA_DW8 }    /* coherent */
+        { AU1100_SD0_PHYS_ADDR + 0x00, DMA_DS | DMA_DW8 },              /* coherent */
+        { AU1100_SD0_PHYS_ADDR + 0x04, DMA_DS | DMA_DW8 | DMA_DR },     /* coherent */
+        { AU1100_SD1_PHYS_ADDR + 0x00, DMA_DS | DMA_DW8 },              /* coherent */
+        { AU1100_SD1_PHYS_ADDR + 0x04, DMA_DS | DMA_DW8 | DMA_DR }      /* coherent */
 };
 
 void dump_au1000_dma_channel(unsigned int dmanr)
@@ -202,7 +206,7 @@ int request_au1000_dma(int dev_id, const char *dev_str,
         }
 
         /* fill it in */
-        chan->io = DMA_CHANNEL_BASE + i * DMA_CHANNEL_LEN;
+        chan->io = KSEG1ADDR(AU1000_DMA_PHYS_ADDR) + i * DMA_CHANNEL_LEN;
         chan->dev_id = dev_id;
         chan->dev_str = dev_str;
         chan->fifo_addr = dev->fifo_addr;
diff --git a/arch/mips/alchemy/common/irq.c b/arch/mips/alchemy/common/irq.c
index 55dd7c888517..8b60ba0675e2 100644
--- a/arch/mips/alchemy/common/irq.c
+++ b/arch/mips/alchemy/common/irq.c
@@ -30,7 +30,7 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/slab.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 
 #include <asm/irq_cpu.h>
 #include <asm/mipsregs.h>
@@ -39,6 +39,36 @@
 #include <asm/mach-pb1x00/pb1000.h>
 #endif
 
+/* Interrupt Controller register offsets */
+#define IC_CFG0RD       0x40
+#define IC_CFG0SET      0x40
+#define IC_CFG0CLR      0x44
+#define IC_CFG1RD       0x48
+#define IC_CFG1SET      0x48
+#define IC_CFG1CLR      0x4C
+#define IC_CFG2RD       0x50
+#define IC_CFG2SET      0x50
+#define IC_CFG2CLR      0x54
+#define IC_REQ0INT      0x54
+#define IC_SRCRD        0x58
+#define IC_SRCSET       0x58
+#define IC_SRCCLR       0x5C
+#define IC_REQ1INT      0x5C
+#define IC_ASSIGNRD     0x60
+#define IC_ASSIGNSET    0x60
+#define IC_ASSIGNCLR    0x64
+#define IC_WAKERD       0x68
+#define IC_WAKESET      0x68
+#define IC_WAKECLR      0x6C
+#define IC_MASKRD       0x70
+#define IC_MASKSET      0x70
+#define IC_MASKCLR      0x74
+#define IC_RISINGRD     0x78
+#define IC_RISINGCLR    0x78
+#define IC_FALLINGRD    0x7C
+#define IC_FALLINGCLR   0x7C
+#define IC_TESTBIT      0x80
+
 static int au1x_ic_settype(struct irq_data *d, unsigned int flow_type);
 
 /* NOTE on interrupt priorities: The original writers of this code said:
@@ -221,89 +251,101 @@ struct au1xxx_irqmap au1200_irqmap[] __initdata = {
 static void au1x_ic0_unmask(struct irq_data *d)
 {
         unsigned int bit = d->irq - AU1000_INTC0_INT_BASE;
-        au_writel(1 << bit, IC0_MASKSET);
-        au_writel(1 << bit, IC0_WAKESET);
-        au_sync();
+        void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR);
+
+        __raw_writel(1 << bit, base + IC_MASKSET);
+        __raw_writel(1 << bit, base + IC_WAKESET);
+        wmb();
 }
 
 static void au1x_ic1_unmask(struct irq_data *d)
 {
         unsigned int bit = d->irq - AU1000_INTC1_INT_BASE;
-        au_writel(1 << bit, IC1_MASKSET);
-        au_writel(1 << bit, IC1_WAKESET);
+        void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR);
+
+        __raw_writel(1 << bit, base + IC_MASKSET);
+        __raw_writel(1 << bit, base + IC_WAKESET);
 
 /* very hacky. does the pb1000 cpld auto-disable this int?
  * nowhere in the current kernel sources is it disabled.        --mlau
  */
 #if defined(CONFIG_MIPS_PB1000)
         if (d->irq == AU1000_GPIO15_INT)
-                au_writel(0x4000, PB1000_MDR); /* enable int */
+                __raw_writel(0x4000, (void __iomem *)PB1000_MDR); /* enable int */
 #endif
-        au_sync();
+        wmb();
 }
 
 static void au1x_ic0_mask(struct irq_data *d)
 {
         unsigned int bit = d->irq - AU1000_INTC0_INT_BASE;
-        au_writel(1 << bit, IC0_MASKCLR);
-        au_writel(1 << bit, IC0_WAKECLR);
-        au_sync();
+        void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR);
+
+        __raw_writel(1 << bit, base + IC_MASKCLR);
+        __raw_writel(1 << bit, base + IC_WAKECLR);
+        wmb();
 }
 
 static void au1x_ic1_mask(struct irq_data *d)
 {
         unsigned int bit = d->irq - AU1000_INTC1_INT_BASE;
-        au_writel(1 << bit, IC1_MASKCLR);
-        au_writel(1 << bit, IC1_WAKECLR);
-        au_sync();
+        void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR);
+
+        __raw_writel(1 << bit, base + IC_MASKCLR);
+        __raw_writel(1 << bit, base + IC_WAKECLR);
+        wmb();
 }
 
 static void au1x_ic0_ack(struct irq_data *d)
 {
         unsigned int bit = d->irq - AU1000_INTC0_INT_BASE;
+        void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR);
 
         /*
          * This may assume that we don't get interrupts from
          * both edges at once, or if we do, that we don't care.
          */
-        au_writel(1 << bit, IC0_FALLINGCLR);
-        au_writel(1 << bit, IC0_RISINGCLR);
-        au_sync();
+        __raw_writel(1 << bit, base + IC_FALLINGCLR);
+        __raw_writel(1 << bit, base + IC_RISINGCLR);
+        wmb();
 }
 
 static void au1x_ic1_ack(struct irq_data *d)
 {
         unsigned int bit = d->irq - AU1000_INTC1_INT_BASE;
+        void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR);
 
         /*
          * This may assume that we don't get interrupts from
          * both edges at once, or if we do, that we don't care.
          */
-        au_writel(1 << bit, IC1_FALLINGCLR);
-        au_writel(1 << bit, IC1_RISINGCLR);
-        au_sync();
+        __raw_writel(1 << bit, base + IC_FALLINGCLR);
+        __raw_writel(1 << bit, base + IC_RISINGCLR);
+        wmb();
 }
 
 static void au1x_ic0_maskack(struct irq_data *d)
 {
         unsigned int bit = d->irq - AU1000_INTC0_INT_BASE;
+        void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR);
 
-        au_writel(1 << bit, IC0_WAKECLR);
-        au_writel(1 << bit, IC0_MASKCLR);
-        au_writel(1 << bit, IC0_RISINGCLR);
-        au_writel(1 << bit, IC0_FALLINGCLR);
-        au_sync();
+        __raw_writel(1 << bit, base + IC_WAKECLR);
+        __raw_writel(1 << bit, base + IC_MASKCLR);
+        __raw_writel(1 << bit, base + IC_RISINGCLR);
+        __raw_writel(1 << bit, base + IC_FALLINGCLR);
+        wmb();
 }
 
 static void au1x_ic1_maskack(struct irq_data *d)
 {
         unsigned int bit = d->irq - AU1000_INTC1_INT_BASE;
+        void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR);
 
-        au_writel(1 << bit, IC1_WAKECLR);
-        au_writel(1 << bit, IC1_MASKCLR);
-        au_writel(1 << bit, IC1_RISINGCLR);
-        au_writel(1 << bit, IC1_FALLINGCLR);
-        au_sync();
+        __raw_writel(1 << bit, base + IC_WAKECLR);
+        __raw_writel(1 << bit, base + IC_MASKCLR);
+        __raw_writel(1 << bit, base + IC_RISINGCLR);
+        __raw_writel(1 << bit, base + IC_FALLINGCLR);
+        wmb();
 }
 
 static int au1x_ic1_setwake(struct irq_data *d, unsigned int on)
@@ -318,13 +360,13 @@ static int au1x_ic1_setwake(struct irq_data *d, unsigned int on)
                 return -EINVAL;
 
         local_irq_save(flags);
-        wakemsk = au_readl(SYS_WAKEMSK);
+        wakemsk = __raw_readl((void __iomem *)SYS_WAKEMSK);
         if (on)
                 wakemsk |= 1 << bit;
         else
                 wakemsk &= ~(1 << bit);
-        au_writel(wakemsk, SYS_WAKEMSK);
-        au_sync();
+        __raw_writel(wakemsk, (void __iomem *)SYS_WAKEMSK);
+        wmb();
         local_irq_restore(flags);
 
         return 0;
@@ -356,81 +398,74 @@ static struct irq_chip au1x_ic1_chip = {
 static int au1x_ic_settype(struct irq_data *d, unsigned int flow_type)
 {
         struct irq_chip *chip;
-        unsigned long icr[6];
-        unsigned int bit, ic, irq = d->irq;
+        unsigned int bit, irq = d->irq;
         irq_flow_handler_t handler = NULL;
         unsigned char *name = NULL;
+        void __iomem *base;
         int ret;
 
         if (irq >= AU1000_INTC1_INT_BASE) {
                 bit = irq - AU1000_INTC1_INT_BASE;
                 chip = &au1x_ic1_chip;
-                ic = 1;
+                base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR);
         } else {
                 bit = irq - AU1000_INTC0_INT_BASE;
                 chip = &au1x_ic0_chip;
-                ic = 0;
+                base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR);
         }
 
         if (bit > 31)
                 return -EINVAL;
 
-        icr[0] = ic ? IC1_CFG0SET : IC0_CFG0SET;
-        icr[1] = ic ? IC1_CFG1SET : IC0_CFG1SET;
-        icr[2] = ic ? IC1_CFG2SET : IC0_CFG2SET;
-        icr[3] = ic ? IC1_CFG0CLR : IC0_CFG0CLR;
-        icr[4] = ic ? IC1_CFG1CLR : IC0_CFG1CLR;
-        icr[5] = ic ? IC1_CFG2CLR : IC0_CFG2CLR;
-
         ret = 0;
 
         switch (flow_type) {    /* cfgregs 2:1:0 */
         case IRQ_TYPE_EDGE_RISING:      /* 0:0:1 */
-                au_writel(1 << bit, icr[5]);
-                au_writel(1 << bit, icr[4]);
-                au_writel(1 << bit, icr[0]);
+                __raw_writel(1 << bit, base + IC_CFG2CLR);
+                __raw_writel(1 << bit, base + IC_CFG1CLR);
+                __raw_writel(1 << bit, base + IC_CFG0SET);
                 handler = handle_edge_irq;
                 name = "riseedge";
                 break;
         case IRQ_TYPE_EDGE_FALLING:     /* 0:1:0 */
-                au_writel(1 << bit, icr[5]);
-                au_writel(1 << bit, icr[1]);
-                au_writel(1 << bit, icr[3]);
+                __raw_writel(1 << bit, base + IC_CFG2CLR);
+                __raw_writel(1 << bit, base + IC_CFG1SET);
+                __raw_writel(1 << bit, base + IC_CFG0CLR);
                 handler = handle_edge_irq;
                 name = "falledge";
                 break;
         case IRQ_TYPE_EDGE_BOTH:        /* 0:1:1 */
-                au_writel(1 << bit, icr[5]);
-                au_writel(1 << bit, icr[1]);
-                au_writel(1 << bit, icr[0]);
+                __raw_writel(1 << bit, base + IC_CFG2CLR);
+                __raw_writel(1 << bit, base + IC_CFG1SET);
+                __raw_writel(1 << bit, base + IC_CFG0SET);
                 handler = handle_edge_irq;
                 name = "bothedge";
                 break;
         case IRQ_TYPE_LEVEL_HIGH:       /* 1:0:1 */
-                au_writel(1 << bit, icr[2]);
-                au_writel(1 << bit, icr[4]);
-                au_writel(1 << bit, icr[0]);
+                __raw_writel(1 << bit, base + IC_CFG2SET);
+                __raw_writel(1 << bit, base + IC_CFG1CLR);
+                __raw_writel(1 << bit, base + IC_CFG0SET);
                 handler = handle_level_irq;
                 name = "hilevel";
                 break;
         case IRQ_TYPE_LEVEL_LOW:        /* 1:1:0 */
-                au_writel(1 << bit, icr[2]);
-                au_writel(1 << bit, icr[1]);
-                au_writel(1 << bit, icr[3]);
+                __raw_writel(1 << bit, base + IC_CFG2SET);
+                __raw_writel(1 << bit, base + IC_CFG1SET);
+                __raw_writel(1 << bit, base + IC_CFG0CLR);
                 handler = handle_level_irq;
                 name = "lowlevel";
                 break;
         case IRQ_TYPE_NONE:             /* 0:0:0 */
-                au_writel(1 << bit, icr[5]);
-                au_writel(1 << bit, icr[4]);
-                au_writel(1 << bit, icr[3]);
+                __raw_writel(1 << bit, base + IC_CFG2CLR);
+                __raw_writel(1 << bit, base + IC_CFG1CLR);
+                __raw_writel(1 << bit, base + IC_CFG0CLR);
                 break;
         default:
                 ret = -EINVAL;
         }
         __irq_set_chip_handler_name_locked(d->irq, chip, handler, name);
 
-        au_sync();
+        wmb();
 
         return ret;
 }
@@ -444,21 +479,21 @@ asmlinkage void plat_irq_dispatch(void)
                 off = MIPS_CPU_IRQ_BASE + 7;
                 goto handle;
         } else if (pending & CAUSEF_IP2) {
-                s = IC0_REQ0INT;
+                s = KSEG1ADDR(AU1000_IC0_PHYS_ADDR) + IC_REQ0INT;
                 off = AU1000_INTC0_INT_BASE;
         } else if (pending & CAUSEF_IP3) {
-                s = IC0_REQ1INT;
+                s = KSEG1ADDR(AU1000_IC0_PHYS_ADDR) + IC_REQ1INT;
                 off = AU1000_INTC0_INT_BASE;
         } else if (pending & CAUSEF_IP4) {
-                s = IC1_REQ0INT;
+                s = KSEG1ADDR(AU1000_IC1_PHYS_ADDR) + IC_REQ0INT;
                 off = AU1000_INTC1_INT_BASE;
         } else if (pending & CAUSEF_IP5) {
-                s = IC1_REQ1INT;
+                s = KSEG1ADDR(AU1000_IC1_PHYS_ADDR) + IC_REQ1INT;
                 off = AU1000_INTC1_INT_BASE;
         } else
                 goto spurious;
 
-        s = au_readl(s);
+        s = __raw_readl((void __iomem *)s);
         if (unlikely(!s)) {
 spurious:
                 spurious_interrupt();
@@ -469,48 +504,42 @@ handle:
         do_IRQ(off);
 }
 
+
+static inline void ic_init(void __iomem *base)
+{
+        /* initialize interrupt controller to a safe state */
+        __raw_writel(0xffffffff, base + IC_CFG0CLR);
+        __raw_writel(0xffffffff, base + IC_CFG1CLR);
+        __raw_writel(0xffffffff, base + IC_CFG2CLR);
+        __raw_writel(0xffffffff, base + IC_MASKCLR);
+        __raw_writel(0xffffffff, base + IC_ASSIGNCLR);
+        __raw_writel(0xffffffff, base + IC_WAKECLR);
+        __raw_writel(0xffffffff, base + IC_SRCSET);
+        __raw_writel(0xffffffff, base + IC_FALLINGCLR);
+        __raw_writel(0xffffffff, base + IC_RISINGCLR);
+        __raw_writel(0x00000000, base + IC_TESTBIT);
+        wmb();
+}
+
 static void __init au1000_init_irq(struct au1xxx_irqmap *map)
 {
         unsigned int bit, irq_nr;
-        int i;
-
-        /*
-         * Initialize interrupt controllers to a safe state.
-         */
-        au_writel(0xffffffff, IC0_CFG0CLR);
-        au_writel(0xffffffff, IC0_CFG1CLR);
-        au_writel(0xffffffff, IC0_CFG2CLR);
-        au_writel(0xffffffff, IC0_MASKCLR);
-        au_writel(0xffffffff, IC0_ASSIGNCLR);
-        au_writel(0xffffffff, IC0_WAKECLR);
-        au_writel(0xffffffff, IC0_SRCSET);
-        au_writel(0xffffffff, IC0_FALLINGCLR);
-        au_writel(0xffffffff, IC0_RISINGCLR);
-        au_writel(0x00000000, IC0_TESTBIT);
-
-        au_writel(0xffffffff, IC1_CFG0CLR);
-        au_writel(0xffffffff, IC1_CFG1CLR);
-        au_writel(0xffffffff, IC1_CFG2CLR);
-        au_writel(0xffffffff, IC1_MASKCLR);
-        au_writel(0xffffffff, IC1_ASSIGNCLR);
-        au_writel(0xffffffff, IC1_WAKECLR);
-        au_writel(0xffffffff, IC1_SRCSET);
-        au_writel(0xffffffff, IC1_FALLINGCLR);
-        au_writel(0xffffffff, IC1_RISINGCLR);
-        au_writel(0x00000000, IC1_TESTBIT);
+        void __iomem *base;
 
+        ic_init((void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR));
+        ic_init((void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR));
         mips_cpu_irq_init();
 
         /* register all 64 possible IC0+IC1 irq sources as type "none".
          * Use set_irq_type() to set edge/level behaviour at runtime.
          */
-        for (i = AU1000_INTC0_INT_BASE;
-             (i < AU1000_INTC0_INT_BASE + 32); i++)
-                au1x_ic_settype(irq_get_irq_data(i), IRQ_TYPE_NONE);
+        for (irq_nr = AU1000_INTC0_INT_BASE;
+             (irq_nr < AU1000_INTC0_INT_BASE + 32); irq_nr++)
+                au1x_ic_settype(irq_get_irq_data(irq_nr), IRQ_TYPE_NONE);
 
-        for (i = AU1000_INTC1_INT_BASE;
-             (i < AU1000_INTC1_INT_BASE + 32); i++)
-                au1x_ic_settype(irq_get_irq_data(i), IRQ_TYPE_NONE);
+        for (irq_nr = AU1000_INTC1_INT_BASE;
+             (irq_nr < AU1000_INTC1_INT_BASE + 32); irq_nr++)
+                au1x_ic_settype(irq_get_irq_data(irq_nr), IRQ_TYPE_NONE);
 
         /*
          * Initialize IC0, which is fixed per processor.
@@ -520,13 +549,13 @@ static void __init au1000_init_irq(struct au1xxx_irqmap *map)
 
                 if (irq_nr >= AU1000_INTC1_INT_BASE) {
                         bit = irq_nr - AU1000_INTC1_INT_BASE;
-                        if (map->im_request)
-                                au_writel(1 << bit, IC1_ASSIGNSET);
+                        base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR);
                 } else {
                         bit = irq_nr - AU1000_INTC0_INT_BASE;
-                        if (map->im_request)
-                                au_writel(1 << bit, IC0_ASSIGNSET);
+                        base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR);
                 }
+                if (map->im_request)
+                        __raw_writel(1 << bit, base + IC_ASSIGNSET);
 
                 au1x_ic_settype(irq_get_irq_data(irq_nr), map->im_type);
                 ++map;
@@ -556,90 +585,62 @@ void __init arch_init_irq(void)
         }
 }
 
-struct alchemy_ic_sysdev {
-        struct sys_device sysdev;
-        void __iomem *base;
-        unsigned long pmdata[7];
-};
 
-static int alchemy_ic_suspend(struct sys_device *dev, pm_message_t state)
-{
-        struct alchemy_ic_sysdev *icdev =
-                        container_of(dev, struct alchemy_ic_sysdev, sysdev);
+static unsigned long alchemy_ic_pmdata[7 * 2];
 
-        icdev->pmdata[0] = __raw_readl(icdev->base + IC_CFG0RD);
-        icdev->pmdata[1] = __raw_readl(icdev->base + IC_CFG1RD);
-        icdev->pmdata[2] = __raw_readl(icdev->base + IC_CFG2RD);
-        icdev->pmdata[3] = __raw_readl(icdev->base + IC_SRCRD);
-        icdev->pmdata[4] = __raw_readl(icdev->base + IC_ASSIGNRD);
-        icdev->pmdata[5] = __raw_readl(icdev->base + IC_WAKERD);
-        icdev->pmdata[6] = __raw_readl(icdev->base + IC_MASKRD);
-
-        return 0;
+static inline void alchemy_ic_suspend_one(void __iomem *base, unsigned long *d)
+{
+        d[0] = __raw_readl(base + IC_CFG0RD);
+        d[1] = __raw_readl(base + IC_CFG1RD);
+        d[2] = __raw_readl(base + IC_CFG2RD);
+        d[3] = __raw_readl(base + IC_SRCRD);
+        d[4] = __raw_readl(base + IC_ASSIGNRD);
+        d[5] = __raw_readl(base + IC_WAKERD);
+        d[6] = __raw_readl(base + IC_MASKRD);
+        ic_init(base);          /* shut it up too while at it */
 }
 
-static int alchemy_ic_resume(struct sys_device *dev)
+static inline void alchemy_ic_resume_one(void __iomem *base, unsigned long *d)
 {
-        struct alchemy_ic_sysdev *icdev =
-                        container_of(dev, struct alchemy_ic_sysdev, sysdev);
-
-        __raw_writel(0xffffffff, icdev->base + IC_MASKCLR);
-        __raw_writel(0xffffffff, icdev->base + IC_CFG0CLR);
-        __raw_writel(0xffffffff, icdev->base + IC_CFG1CLR);
-        __raw_writel(0xffffffff, icdev->base + IC_CFG2CLR);
-        __raw_writel(0xffffffff, icdev->base + IC_SRCCLR);
-        __raw_writel(0xffffffff, icdev->base + IC_ASSIGNCLR);
-        __raw_writel(0xffffffff, icdev->base + IC_WAKECLR);
-        __raw_writel(0xffffffff, icdev->base + IC_RISINGCLR);
-        __raw_writel(0xffffffff, icdev->base + IC_FALLINGCLR);
-        __raw_writel(0x00000000, icdev->base + IC_TESTBIT);
-        wmb();
-        __raw_writel(icdev->pmdata[0], icdev->base + IC_CFG0SET);
-        __raw_writel(icdev->pmdata[1], icdev->base + IC_CFG1SET);
-        __raw_writel(icdev->pmdata[2], icdev->base + IC_CFG2SET);
-        __raw_writel(icdev->pmdata[3], icdev->base + IC_SRCSET);
-        __raw_writel(icdev->pmdata[4], icdev->base + IC_ASSIGNSET);
-        __raw_writel(icdev->pmdata[5], icdev->base + IC_WAKESET);
+        ic_init(base);
+
+        __raw_writel(d[0], base + IC_CFG0SET);
+        __raw_writel(d[1], base + IC_CFG1SET);
+        __raw_writel(d[2], base + IC_CFG2SET);
+        __raw_writel(d[3], base + IC_SRCSET);
+        __raw_writel(d[4], base + IC_ASSIGNSET);
+        __raw_writel(d[5], base + IC_WAKESET);
         wmb();
 
-        __raw_writel(icdev->pmdata[6], icdev->base + IC_MASKSET);
+        __raw_writel(d[6], base + IC_MASKSET);
         wmb();
+}
 
+static int alchemy_ic_suspend(void)
+{
+        alchemy_ic_suspend_one((void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR),
+                               alchemy_ic_pmdata);
+        alchemy_ic_suspend_one((void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR),
+                               &alchemy_ic_pmdata[7]);
         return 0;
 }
 
-static struct sysdev_class alchemy_ic_sysdev_class = {
-        .name           = "ic",
+static void alchemy_ic_resume(void)
+{
+        alchemy_ic_resume_one((void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR),
+                              &alchemy_ic_pmdata[7]);
+        alchemy_ic_resume_one((void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR),
+                              alchemy_ic_pmdata);
+}
+
+static struct syscore_ops alchemy_ic_syscore_ops = {
         .suspend        = alchemy_ic_suspend,
         .resume         = alchemy_ic_resume,
 };
 
-static int __init alchemy_ic_sysdev_init(void)
+static int __init alchemy_ic_pm_init(void)
 {
-        struct alchemy_ic_sysdev *icdev;
-        unsigned long icbase[2] = { IC0_PHYS_ADDR, IC1_PHYS_ADDR };
-        int err, i;
-
-        err = sysdev_class_register(&alchemy_ic_sysdev_class);
-        if (err)
-                return err;
-
-        for (i = 0; i < 2; i++) {
-                icdev = kzalloc(sizeof(struct alchemy_ic_sysdev), GFP_KERNEL);
-                if (!icdev)
-                        return -ENOMEM;
-
-                icdev->base = ioremap(icbase[i], 0x1000);
-
-                icdev->sysdev.id = i;
-                icdev->sysdev.cls = &alchemy_ic_sysdev_class;
-                err = sysdev_register(&icdev->sysdev);
-                if (err) {
-                        kfree(icdev);
-                        return err;
-                }
-        }
-
+        register_syscore_ops(&alchemy_ic_syscore_ops);
         return 0;
 }
-device_initcall(alchemy_ic_sysdev_init);
+device_initcall(alchemy_ic_pm_init);
diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c
index 9e7814db3d03..3b2c18b14341 100644
--- a/arch/mips/alchemy/common/platform.c
+++ b/arch/mips/alchemy/common/platform.c
@@ -13,9 +13,10 @@
 
 #include <linux/dma-mapping.h>
 #include <linux/etherdevice.h>
+#include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/serial_8250.h>
-#include <linux/init.h>
+#include <linux/slab.h>
 
 #include <asm/mach-au1x00/au1xxx.h>
 #include <asm/mach-au1x00/au1xxx_dbdma.h>
@@ -30,21 +31,12 @@ static void alchemy_8250_pm(struct uart_port *port, unsigned int state,
 #ifdef CONFIG_SERIAL_8250
         switch (state) {
         case 0:
-                if ((__raw_readl(port->membase + UART_MOD_CNTRL) & 3) != 3) {
-                        /* power-on sequence as suggested in the databooks */
-                        __raw_writel(0, port->membase + UART_MOD_CNTRL);
-                        wmb();
-                        __raw_writel(1, port->membase + UART_MOD_CNTRL);
-                        wmb();
-                }
-                __raw_writel(3, port->membase + UART_MOD_CNTRL); /* full on */
-                wmb();
+                alchemy_uart_enable(CPHYSADDR(port->membase));
                 serial8250_do_pm(port, state, old_state);
                 break;
         case 3:         /* power off */
                 serial8250_do_pm(port, state, old_state);
-                __raw_writel(0, port->membase + UART_MOD_CNTRL);
-                wmb();
+                alchemy_uart_disable(CPHYSADDR(port->membase));
                 break;
         default:
                 serial8250_do_pm(port, state, old_state);
@@ -65,38 +57,60 @@ static void alchemy_8250_pm(struct uart_port *port, unsigned int state,
                 .pm             = alchemy_8250_pm,              \
         }
 
-static struct plat_serial8250_port au1x00_uart_data[] = {
-#if defined(CONFIG_SOC_AU1000)
-        PORT(UART0_PHYS_ADDR, AU1000_UART0_INT),
-        PORT(UART1_PHYS_ADDR, AU1000_UART1_INT),
-        PORT(UART2_PHYS_ADDR, AU1000_UART2_INT),
-        PORT(UART3_PHYS_ADDR, AU1000_UART3_INT),
-#elif defined(CONFIG_SOC_AU1500)
-        PORT(UART0_PHYS_ADDR, AU1500_UART0_INT),
-        PORT(UART3_PHYS_ADDR, AU1500_UART3_INT),
-#elif defined(CONFIG_SOC_AU1100)
-        PORT(UART0_PHYS_ADDR, AU1100_UART0_INT),
-        PORT(UART1_PHYS_ADDR, AU1100_UART1_INT),
-        PORT(UART3_PHYS_ADDR, AU1100_UART3_INT),
-#elif defined(CONFIG_SOC_AU1550)
-        PORT(UART0_PHYS_ADDR, AU1550_UART0_INT),
-        PORT(UART1_PHYS_ADDR, AU1550_UART1_INT),
-        PORT(UART3_PHYS_ADDR, AU1550_UART3_INT),
-#elif defined(CONFIG_SOC_AU1200)
-        PORT(UART0_PHYS_ADDR, AU1200_UART0_INT),
-        PORT(UART1_PHYS_ADDR, AU1200_UART1_INT),
-#endif
-        { },
+static struct plat_serial8250_port au1x00_uart_data[][4] __initdata = {
+        [ALCHEMY_CPU_AU1000] = {
+                PORT(AU1000_UART0_PHYS_ADDR, AU1000_UART0_INT),
+                PORT(AU1000_UART1_PHYS_ADDR, AU1000_UART1_INT),
+                PORT(AU1000_UART2_PHYS_ADDR, AU1000_UART2_INT),
+                PORT(AU1000_UART3_PHYS_ADDR, AU1000_UART3_INT),
+        },
+        [ALCHEMY_CPU_AU1500] = {
+                PORT(AU1000_UART0_PHYS_ADDR, AU1500_UART0_INT),
+                PORT(AU1000_UART3_PHYS_ADDR, AU1500_UART3_INT),
+        },
+        [ALCHEMY_CPU_AU1100] = {
+                PORT(AU1000_UART0_PHYS_ADDR, AU1100_UART0_INT),
+                PORT(AU1000_UART1_PHYS_ADDR, AU1100_UART1_INT),
+                PORT(AU1000_UART3_PHYS_ADDR, AU1100_UART3_INT),
+        },
+        [ALCHEMY_CPU_AU1550] = {
+                PORT(AU1000_UART0_PHYS_ADDR, AU1550_UART0_INT),
+                PORT(AU1000_UART1_PHYS_ADDR, AU1550_UART1_INT),
+                PORT(AU1000_UART3_PHYS_ADDR, AU1550_UART3_INT),
+        },
+        [ALCHEMY_CPU_AU1200] = {
+                PORT(AU1000_UART0_PHYS_ADDR, AU1200_UART0_INT),
+                PORT(AU1000_UART1_PHYS_ADDR, AU1200_UART1_INT),
+        },
 };
 
 static struct platform_device au1xx0_uart_device = {
         .name                   = "serial8250",
         .id                     = PLAT8250_DEV_AU1X00,
-        .dev                    = {
-                .platform_data  = au1x00_uart_data,
-        },
 };
 
+static void __init alchemy_setup_uarts(int ctype)
+{
+        unsigned int uartclk = get_au1x00_uart_baud_base() * 16;
+        int s = sizeof(struct plat_serial8250_port);
+        int c = alchemy_get_uarts(ctype);
+        struct plat_serial8250_port *ports;
+
+        ports = kzalloc(s * (c + 1), GFP_KERNEL);
+        if (!ports) {
+                printk(KERN_INFO "Alchemy: no memory for UART data\n");
+                return;
+        }
+        memcpy(ports, au1x00_uart_data[ctype], s * c);
+        au1xx0_uart_device.dev.platform_data = ports;
+
+        /* Fill up uartclk. */
+        for (s = 0; s < c; s++)
+                ports[s].uartclk = uartclk;
+        if (platform_device_register(&au1xx0_uart_device))
+                printk(KERN_INFO "Alchemy: failed to register UARTs\n");
+}
+
 /* OHCI (USB full speed host controller) */
 static struct resource au1xxx_usb_ohci_resources[] = {
         [0] = {
@@ -269,8 +283,8 @@ extern struct au1xmmc_platform_data au1xmmc_platdata[2];
 
 static struct resource au1200_mmc0_resources[] = {
         [0] = {
-                .start          = SD0_PHYS_ADDR,
-                .end            = SD0_PHYS_ADDR + 0x7ffff,
+                .start          = AU1100_SD0_PHYS_ADDR,
+                .end            = AU1100_SD0_PHYS_ADDR + 0xfff,
                 .flags          = IORESOURCE_MEM,
         },
         [1] = {
@@ -305,8 +319,8 @@ static struct platform_device au1200_mmc0_device = {
 #ifndef CONFIG_MIPS_DB1200
 static struct resource au1200_mmc1_resources[] = {
         [0] = {
-                .start          = SD1_PHYS_ADDR,
-                .end            = SD1_PHYS_ADDR + 0x7ffff,
+                .start          = AU1100_SD1_PHYS_ADDR,
+                .end            = AU1100_SD1_PHYS_ADDR + 0xfff,
                 .flags          = IORESOURCE_MEM,
         },
         [1] = {
@@ -359,15 +373,16 @@ static struct platform_device pbdb_smbus_device = {
 #endif
 
 /* Macro to help defining the Ethernet MAC resources */
+#define MAC_RES_COUNT   3       /* MAC regs base, MAC enable reg, MAC INT */
 #define MAC_RES(_base, _enable, _irq)                   \
         {                                               \
-                .start  = CPHYSADDR(_base),             \
-                .end    = CPHYSADDR(_base + 0xffff),    \
+                .start  = _base,                        \
+                .end    = _base + 0xffff,               \
                 .flags  = IORESOURCE_MEM,               \
         },                                              \
         {                                               \
-                .start  = CPHYSADDR(_enable),           \
-                .end    = CPHYSADDR(_enable + 0x3),     \
+                .start  = _enable,                      \
+                .end    = _enable + 0x3,                \
                 .flags  = IORESOURCE_MEM,               \
         },                                              \
         {                                               \
@@ -376,19 +391,29 @@ static struct platform_device pbdb_smbus_device = {
                 .flags  = IORESOURCE_IRQ                \
         }
 
-static struct resource au1xxx_eth0_resources[] = {
-#if defined(CONFIG_SOC_AU1000)
-        MAC_RES(AU1000_ETH0_BASE, AU1000_MAC0_ENABLE, AU1000_MAC0_DMA_INT),
-#elif defined(CONFIG_SOC_AU1100)
-        MAC_RES(AU1100_ETH0_BASE, AU1100_MAC0_ENABLE, AU1100_MAC0_DMA_INT),
-#elif defined(CONFIG_SOC_AU1550)
-        MAC_RES(AU1550_ETH0_BASE, AU1550_MAC0_ENABLE, AU1550_MAC0_DMA_INT),
-#elif defined(CONFIG_SOC_AU1500)
-        MAC_RES(AU1500_ETH0_BASE, AU1500_MAC0_ENABLE, AU1500_MAC0_DMA_INT),
-#endif
+static struct resource au1xxx_eth0_resources[][MAC_RES_COUNT] __initdata = {
+        [ALCHEMY_CPU_AU1000] = {
+                MAC_RES(AU1000_MAC0_PHYS_ADDR,
+                        AU1000_MACEN_PHYS_ADDR,
+                        AU1000_MAC0_DMA_INT)
+        },
+        [ALCHEMY_CPU_AU1500] = {
+                MAC_RES(AU1500_MAC0_PHYS_ADDR,
+                        AU1500_MACEN_PHYS_ADDR,
+                        AU1500_MAC0_DMA_INT)
+        },
+        [ALCHEMY_CPU_AU1100] = {
+                MAC_RES(AU1000_MAC0_PHYS_ADDR,
+                        AU1000_MACEN_PHYS_ADDR,
+                        AU1100_MAC0_DMA_INT)
+        },
+        [ALCHEMY_CPU_AU1550] = {
+                MAC_RES(AU1000_MAC0_PHYS_ADDR,
+                        AU1000_MACEN_PHYS_ADDR,
+                        AU1550_MAC0_DMA_INT)
+        },
 };
 
-
 static struct au1000_eth_platform_data au1xxx_eth0_platform_data = {
         .phy1_search_mac0 = 1,
 };
@@ -396,20 +421,26 @@ static struct au1000_eth_platform_data au1xxx_eth0_platform_data = {
 static struct platform_device au1xxx_eth0_device = {
         .name           = "au1000-eth",
         .id             = 0,
-        .num_resources  = ARRAY_SIZE(au1xxx_eth0_resources),
-        .resource       = au1xxx_eth0_resources,
+        .num_resources  = MAC_RES_COUNT,
         .dev.platform_data = &au1xxx_eth0_platform_data,
 };
 
-#ifndef CONFIG_SOC_AU1100
-static struct resource au1xxx_eth1_resources[] = {
-#if defined(CONFIG_SOC_AU1000)
-        MAC_RES(AU1000_ETH1_BASE, AU1000_MAC1_ENABLE, AU1000_MAC1_DMA_INT),
-#elif defined(CONFIG_SOC_AU1550)
-        MAC_RES(AU1550_ETH1_BASE, AU1550_MAC1_ENABLE, AU1550_MAC1_DMA_INT),
-#elif defined(CONFIG_SOC_AU1500)
-        MAC_RES(AU1500_ETH1_BASE, AU1500_MAC1_ENABLE, AU1500_MAC1_DMA_INT),
-#endif
+static struct resource au1xxx_eth1_resources[][MAC_RES_COUNT] __initdata = {
+        [ALCHEMY_CPU_AU1000] = {
+                MAC_RES(AU1000_MAC1_PHYS_ADDR,
+                        AU1000_MACEN_PHYS_ADDR + 4,
+                        AU1000_MAC1_DMA_INT)
+        },
+        [ALCHEMY_CPU_AU1500] = {
+                MAC_RES(AU1500_MAC1_PHYS_ADDR,
+                        AU1500_MACEN_PHYS_ADDR + 4,
+                        AU1500_MAC1_DMA_INT)
+        },
+        [ALCHEMY_CPU_AU1550] = {
+                MAC_RES(AU1000_MAC1_PHYS_ADDR,
+                        AU1000_MACEN_PHYS_ADDR + 4,
+                        AU1550_MAC1_DMA_INT)
+        },
 };
 
 static struct au1000_eth_platform_data au1xxx_eth1_platform_data = {
@@ -419,11 +450,9 @@ static struct au1000_eth_platform_data au1xxx_eth1_platform_data = {
 static struct platform_device au1xxx_eth1_device = {
         .name           = "au1000-eth",
         .id             = 1,
-        .num_resources  = ARRAY_SIZE(au1xxx_eth1_resources),
-        .resource       = au1xxx_eth1_resources,
+        .num_resources  = MAC_RES_COUNT,
         .dev.platform_data = &au1xxx_eth1_platform_data,
 };
-#endif
 
 void __init au1xxx_override_eth_cfg(unsigned int port,
                         struct au1000_eth_platform_data *eth_data)
@@ -434,15 +463,65 @@ void __init au1xxx_override_eth_cfg(unsigned int port,
         if (port == 0)
                 memcpy(&au1xxx_eth0_platform_data, eth_data,
                         sizeof(struct au1000_eth_platform_data));
-#ifndef CONFIG_SOC_AU1100
         else
                 memcpy(&au1xxx_eth1_platform_data, eth_data,
                         sizeof(struct au1000_eth_platform_data));
-#endif
+}
+
+static void __init alchemy_setup_macs(int ctype)
+{
+        int ret, i;
+        unsigned char ethaddr[6];
+        struct resource *macres;
+
+        /* Handle 1st MAC */
+        if (alchemy_get_macs(ctype) < 1)
+                return;
+
+        macres = kmalloc(sizeof(struct resource) * MAC_RES_COUNT, GFP_KERNEL);
+        if (!macres) {
+                printk(KERN_INFO "Alchemy: no memory for MAC0 resources\n");
+                return;
+        }
+        memcpy(macres, au1xxx_eth0_resources[ctype],
+               sizeof(struct resource) * MAC_RES_COUNT);
+        au1xxx_eth0_device.resource = macres;
+
+        i = prom_get_ethernet_addr(ethaddr);
+        if (!i && !is_valid_ether_addr(au1xxx_eth0_platform_data.mac))
+                memcpy(au1xxx_eth0_platform_data.mac, ethaddr, 6);
+
+        ret = platform_device_register(&au1xxx_eth0_device);
+        if (!ret)
+                printk(KERN_INFO "Alchemy: failed to register MAC0\n");
+
+
+        /* Handle 2nd MAC */
+        if (alchemy_get_macs(ctype) < 2)
+                return;
+
+        macres = kmalloc(sizeof(struct resource) * MAC_RES_COUNT, GFP_KERNEL);
+        if (!macres) {
+                printk(KERN_INFO "Alchemy: no memory for MAC1 resources\n");
+                return;
+        }
+        memcpy(macres, au1xxx_eth1_resources[ctype],
+               sizeof(struct resource) * MAC_RES_COUNT);
+        au1xxx_eth1_device.resource = macres;
+
+        ethaddr[5] += 1;        /* next addr for 2nd MAC */
+        if (!i && !is_valid_ether_addr(au1xxx_eth1_platform_data.mac))
+                memcpy(au1xxx_eth1_platform_data.mac, ethaddr, 6);
+
+        /* Register second MAC if enabled in pinfunc */
+        if (!(au_readl(SYS_PINFUNC) & (u32)SYS_PF_NI2)) {
+                ret = platform_device_register(&au1xxx_eth1_device);
+                if (ret)
+                        printk(KERN_INFO "Alchemy: failed to register MAC1\n");
+        }
 }
 
 static struct platform_device *au1xxx_platform_devices[] __initdata = {
-        &au1xx0_uart_device,
         &au1xxx_usb_ohci_device,
 #ifdef CONFIG_FB_AU1100
         &au1100_lcd_device,
@@ -460,36 +539,17 @@ static struct platform_device *au1xxx_platform_devices[] __initdata = {
 #ifdef SMBUS_PSC_BASE
         &pbdb_smbus_device,
 #endif
-        &au1xxx_eth0_device,
 };
 
 static int __init au1xxx_platform_init(void)
 {
-        unsigned int uartclk = get_au1x00_uart_baud_base() * 16;
-        int err, i;
-        unsigned char ethaddr[6];
+        int err, ctype = alchemy_get_cputype();
 
-        /* Fill up uartclk. */
-        for (i = 0; au1x00_uart_data[i].flags; i++)
-                au1x00_uart_data[i].uartclk = uartclk;
-
-        /* use firmware-provided mac addr if available and necessary */
-        i = prom_get_ethernet_addr(ethaddr);
-        if (!i && !is_valid_ether_addr(au1xxx_eth0_platform_data.mac))
-                memcpy(au1xxx_eth0_platform_data.mac, ethaddr, 6);
+        alchemy_setup_uarts(ctype);
+        alchemy_setup_macs(ctype);
 
         err = platform_add_devices(au1xxx_platform_devices,
                                    ARRAY_SIZE(au1xxx_platform_devices));
-#ifndef CONFIG_SOC_AU1100
-        ethaddr[5] += 1;        /* next addr for 2nd MAC */
-        if (!i && !is_valid_ether_addr(au1xxx_eth1_platform_data.mac))
-                memcpy(au1xxx_eth1_platform_data.mac, ethaddr, 6);
-
-        /* Register second MAC if enabled in pinfunc */
-        if (!err && !(au_readl(SYS_PINFUNC) & (u32)SYS_PF_NI2))
-                err = platform_device_register(&au1xxx_eth1_device);
-#endif
-
         return err;
 }
 
diff --git a/arch/mips/alchemy/common/setup.c b/arch/mips/alchemy/common/setup.c
index 561e5da2658b..1b887c868417 100644
--- a/arch/mips/alchemy/common/setup.c
+++ b/arch/mips/alchemy/common/setup.c
@@ -52,8 +52,6 @@ void __init plat_mem_setup(void)
         /* this is faster than wasting cycles trying to approximate it */
         preset_lpj = (est_freq >> 1) / HZ;
 
-        board_setup();  /* board specific setup */
-
         if (au1xxx_cpu_needs_config_od())
                 /* Various early Au1xx0 errata corrected by this */
                 set_c0_config(1 << 19); /* Set Config[OD] */
@@ -61,6 +59,8 @@ void __init plat_mem_setup(void)
                 /* Clear to obtain best system bus performance */
                 clear_c0_config(1 << 19); /* Clear Config[OD] */
 
+        board_setup();  /* board specific setup */
+
         /* IO/MEM resources. */
         set_io_port_base(0);
         ioport_resource.start = IOPORT_RESOURCE_START;
diff --git a/arch/mips/alchemy/devboards/db1200/setup.c b/arch/mips/alchemy/devboards/db1200/setup.c
index 4a8980027ecf..1dac4f27d334 100644
--- a/arch/mips/alchemy/devboards/db1200/setup.c
+++ b/arch/mips/alchemy/devboards/db1200/setup.c
@@ -23,6 +23,13 @@ void __init board_setup(void)
         unsigned long freq0, clksrc, div, pfc;
         unsigned short whoami;
 
+        /* Set Config[OD] (disable overlapping bus transaction):
+         * This gets rid of a _lot_ of spurious interrupts (especially
+         * wrt. IDE); but incurs ~10% performance hit in some
+         * cpu-bound applications.
+         */
+        set_c0_config(1 << 19);
+
         bcsr_init(DB1200_BCSR_PHYS_ADDR,
                   DB1200_BCSR_PHYS_ADDR + DB1200_BCSR_HEXLED_OFS);
 
diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c
index 05f120ff90f9..5c956fe8760f 100644
--- a/arch/mips/alchemy/devboards/db1x00/board_setup.c
+++ b/arch/mips/alchemy/devboards/db1x00/board_setup.c
@@ -127,13 +127,10 @@ const char *get_system_type(void)
 void __init board_setup(void)
 {
         unsigned long bcsr1, bcsr2;
-        u32 pin_func;
 
         bcsr1 = DB1000_BCSR_PHYS_ADDR;
         bcsr2 = DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS;
 
-        pin_func = 0;
-
 #ifdef CONFIG_MIPS_DB1000
         printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n");
 #endif
@@ -164,12 +161,16 @@ void __init board_setup(void)
         /* Not valid for Au1550 */
 #if defined(CONFIG_IRDA) && \
    (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100))
-        /* Set IRFIRSEL instead of GPIO15 */
-        pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF;
-        au_writel(pin_func, SYS_PINFUNC);
-        /* Power off until the driver is in use */
-        bcsr_mod(BCSR_RESETS, BCSR_RESETS_IRDA_MODE_MASK,
-                                BCSR_RESETS_IRDA_MODE_OFF);
+        {
+                u32 pin_func;
+
+                /* Set IRFIRSEL instead of GPIO15 */
+                pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF;
+                au_writel(pin_func, SYS_PINFUNC);
+                /* Power off until the driver is in use */
+                bcsr_mod(BCSR_RESETS, BCSR_RESETS_IRDA_MODE_MASK,
+                         BCSR_RESETS_IRDA_MODE_OFF);
+        }
 #endif
         bcsr_write(BCSR_PCMCIA, 0);     /* turn off PCMCIA power */
 
@@ -177,31 +178,35 @@ void __init board_setup(void)
         alchemy_gpio1_input_enable();
 
 #ifdef CONFIG_MIPS_MIRAGE
-        /* GPIO[20] is output */
-        alchemy_gpio_direction_output(20, 0);
+        {
+                u32 pin_func;
 
-        /* Set GPIO[210:208] instead of SSI_0 */
-        pin_func = au_readl(SYS_PINFUNC) | SYS_PF_S0;
+                /* GPIO[20] is output */
+                alchemy_gpio_direction_output(20, 0);
 
-        /* Set GPIO[215:211] for LEDs */
-        pin_func |= 5 << 2;
+                /* Set GPIO[210:208] instead of SSI_0 */
+                pin_func = au_readl(SYS_PINFUNC) | SYS_PF_S0;
 
-        /* Set GPIO[214:213] for more LEDs */
-        pin_func |= 5 << 12;
+                /* Set GPIO[215:211] for LEDs */
+                pin_func |= 5 << 2;
 
-        /* Set GPIO[207:200] instead of PCMCIA/LCD */
-        pin_func |= SYS_PF_LCD | SYS_PF_PC;
-        au_writel(pin_func, SYS_PINFUNC);
+                /* Set GPIO[214:213] for more LEDs */
+                pin_func |= 5 << 12;
 
-        /*
-         * Enable speaker amplifier.  This should
-         * be part of the audio driver.
-         */
-        alchemy_gpio_direction_output(209, 1);
+                /* Set GPIO[207:200] instead of PCMCIA/LCD */
+                pin_func |= SYS_PF_LCD | SYS_PF_PC;
+                au_writel(pin_func, SYS_PINFUNC);
 
-        pm_power_off = mirage_power_off;
-        _machine_halt = mirage_power_off;
-        _machine_restart = (void(*)(char *))mips_softreset;
+                /*
+                 * Enable speaker amplifier.  This should
+                 * be part of the audio driver.
+                 */
+                alchemy_gpio_direction_output(209, 1);
+
+                pm_power_off = mirage_power_off;
+                _machine_halt = mirage_power_off;
+                _machine_restart = (void(*)(char *))mips_softreset;
+        }
 #endif
 
 #ifdef CONFIG_MIPS_BOSPORUS
diff --git a/arch/mips/alchemy/devboards/pb1000/board_setup.c b/arch/mips/alchemy/devboards/pb1000/board_setup.c
index 2d85c4b5be09..e64fdcbf75d0 100644
--- a/arch/mips/alchemy/devboards/pb1000/board_setup.c
+++ b/arch/mips/alchemy/devboards/pb1000/board_setup.c
@@ -65,7 +65,7 @@ void __init board_setup(void)
 
         /* Set AUX clock to 12 MHz * 8 = 96 MHz */
         au_writel(8, SYS_AUXPLL);
-        au_writel(0, SYS_PINSTATERD);
+        alchemy_gpio1_input_enable();
         udelay(100);
 
 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
diff --git a/arch/mips/alchemy/devboards/pb1500/board_setup.c b/arch/mips/alchemy/devboards/pb1500/board_setup.c
index 83f46215eb0c..3b4fa3206969 100644
--- a/arch/mips/alchemy/devboards/pb1500/board_setup.c
+++ b/arch/mips/alchemy/devboards/pb1500/board_setup.c
@@ -56,7 +56,7 @@ void __init board_setup(void)
         sys_clksrc = sys_freqctrl = pin_func = 0;
         /* Set AUX clock to 12 MHz * 8 = 96 MHz */
         au_writel(8, SYS_AUXPLL);
-        au_writel(0, SYS_PINSTATERD);
+        alchemy_gpio1_input_enable();
         udelay(100);
 
         /* GPIO201 is input for PCMCIA card detect */
diff --git a/arch/mips/alchemy/devboards/prom.c b/arch/mips/alchemy/devboards/prom.c
index baeb21385058..e5306b56da6d 100644
--- a/arch/mips/alchemy/devboards/prom.c
+++ b/arch/mips/alchemy/devboards/prom.c
@@ -62,5 +62,5 @@ void __init prom_init(void)
 
 void prom_putchar(unsigned char c)
 {
-    alchemy_uart_putchar(UART0_PHYS_ADDR, c);
+        alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
 }
diff --git a/arch/mips/alchemy/gpr/board_setup.c b/arch/mips/alchemy/gpr/board_setup.c
index ad2e3f137933..5f8f0691ed2d 100644
--- a/arch/mips/alchemy/gpr/board_setup.c
+++ b/arch/mips/alchemy/gpr/board_setup.c
@@ -36,9 +36,6 @@
 
 #include <prom.h>
 
-#define UART1_ADDR      KSEG1ADDR(UART1_PHYS_ADDR)
-#define UART3_ADDR      KSEG1ADDR(UART3_PHYS_ADDR)
-
 char irq_tab_alchemy[][5] __initdata = {
         [0] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff },
 };
@@ -67,18 +64,15 @@ static void gpr_power_off(void)
 
 void __init board_setup(void)
 {
-        printk(KERN_INFO "Tarpeze ITS GPR board\n");
+        printk(KERN_INFO "Trapeze ITS GPR board\n");
 
         pm_power_off = gpr_power_off;
         _machine_halt = gpr_power_off;
         _machine_restart = gpr_reset;
 
-        /* Enable UART3 */
-        au_writel(0x1, UART3_ADDR + UART_MOD_CNTRL);/* clock enable (CE) */
-        au_writel(0x3, UART3_ADDR + UART_MOD_CNTRL); /* CE and "enable" */
-        /* Enable UART1 */
-        au_writel(0x1, UART1_ADDR + UART_MOD_CNTRL); /* clock enable (CE) */
-        au_writel(0x3, UART1_ADDR + UART_MOD_CNTRL); /* CE and "enable" */
+        /* Enable UART1/3 */
+        alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);
+        alchemy_uart_enable(AU1000_UART1_PHYS_ADDR);
 
         /* Take away Reset of UMTS-card */
         alchemy_gpio_direction_output(215, 1);
diff --git a/arch/mips/alchemy/gpr/init.c b/arch/mips/alchemy/gpr/init.c
index f044f4c541d7..229aafae680c 100644
--- a/arch/mips/alchemy/gpr/init.c
+++ b/arch/mips/alchemy/gpr/init.c
@@ -59,5 +59,5 @@ void __init prom_init(void)
 
 void prom_putchar(unsigned char c)
 {
-        alchemy_uart_putchar(UART0_PHYS_ADDR, c);
+        alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
 }
diff --git a/arch/mips/alchemy/mtx-1/board_setup.c b/arch/mips/alchemy/mtx-1/board_setup.c
index cf436ab679ae..3ae984cf98cf 100644
--- a/arch/mips/alchemy/mtx-1/board_setup.c
+++ b/arch/mips/alchemy/mtx-1/board_setup.c
@@ -87,7 +87,7 @@ void __init board_setup(void)
         au_writel(SYS_PF_NI2, SYS_PINFUNC);
 
         /* Initialize GPIO */
-        au_writel(0xFFFFFFFF, SYS_TRIOUTCLR);
+        au_writel(~0, KSEG1ADDR(AU1000_SYS_PHYS_ADDR) + SYS_TRIOUTCLR);
         alchemy_gpio_direction_output(0, 0);    /* Disable M66EN (PCI 66MHz) */
         alchemy_gpio_direction_output(3, 1);    /* Disable PCI CLKRUN# */
         alchemy_gpio_direction_output(1, 1);    /* Enable EXT_IO3 */
diff --git a/arch/mips/alchemy/mtx-1/init.c b/arch/mips/alchemy/mtx-1/init.c
index f8d25575fa05..2e81cc7f3422 100644
--- a/arch/mips/alchemy/mtx-1/init.c
+++ b/arch/mips/alchemy/mtx-1/init.c
@@ -62,5 +62,5 @@ void __init prom_init(void)
 
 void prom_putchar(unsigned char c)
 {
-        alchemy_uart_putchar(UART0_PHYS_ADDR, c);
+        alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
 }
diff --git a/arch/mips/alchemy/mtx-1/platform.c b/arch/mips/alchemy/mtx-1/platform.c
index 956f946218c5..55628e390fd7 100644
--- a/arch/mips/alchemy/mtx-1/platform.c
+++ b/arch/mips/alchemy/mtx-1/platform.c
@@ -53,8 +53,8 @@ static struct platform_device mtx1_button = {
 
 static struct resource mtx1_wdt_res[] = {
         [0] = {
-                .start  = 15,
-                .end    = 15,
+                .start  = 215,
+                .end    = 215,
                 .name   = "mtx1-wdt-gpio",
                 .flags  = IORESOURCE_IRQ,
         }
diff --git a/arch/mips/alchemy/xxs1500/board_setup.c b/arch/mips/alchemy/xxs1500/board_setup.c
index febfb0fb0896..81e57fad07ab 100644
--- a/arch/mips/alchemy/xxs1500/board_setup.c
+++ b/arch/mips/alchemy/xxs1500/board_setup.c
@@ -66,13 +66,10 @@ void __init board_setup(void)
         au_writel(pin_func, SYS_PINFUNC);
 
         /* Enable UART */
-        au_writel(0x01, UART3_ADDR + UART_MOD_CNTRL); /* clock enable (CE) */
-        mdelay(10);
-        au_writel(0x03, UART3_ADDR + UART_MOD_CNTRL); /* CE and "enable" */
-        mdelay(10);
-
-        /* Enable DTR = USB power up */
-        au_writel(0x01, UART3_ADDR + UART_MCR); /* UART_MCR_DTR is 0x01??? */
+        alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);
+        /* Enable DTR (MCR bit 0) = USB power up */
+        __raw_writel(1, (void __iomem *)KSEG1ADDR(AU1000_UART3_PHYS_ADDR + 0x18));
+        wmb();
 
 #ifdef CONFIG_PCI
 #if defined(__MIPSEB__)
diff --git a/arch/mips/alchemy/xxs1500/init.c b/arch/mips/alchemy/xxs1500/init.c
index 15125c2fda7d..0ee02cfa989d 100644
--- a/arch/mips/alchemy/xxs1500/init.c
+++ b/arch/mips/alchemy/xxs1500/init.c
@@ -51,14 +51,13 @@ void __init prom_init(void)
         prom_init_cmdline();
 
         memsize_str = prom_getenv("memsize");
-        if (!memsize_str)
+        if (!memsize_str || strict_strtoul(memsize_str, 0, &memsize))
                 memsize = 0x04000000;
-        else
-                strict_strtoul(memsize_str, 0, &memsize);
+
         add_memory_region(0, memsize, BOOT_MEM_RAM);
 }
 
 void prom_putchar(unsigned char c)
 {
-        alchemy_uart_putchar(UART0_PHYS_ADDR, c);
+        alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
 }
diff --git a/arch/mips/ar7/gpio.c b/arch/mips/ar7/gpio.c
index 425dfa5d6e12..bb571bcdb8f2 100644
--- a/arch/mips/ar7/gpio.c
+++ b/arch/mips/ar7/gpio.c
@@ -325,9 +325,7 @@ int __init ar7_gpio_init(void)
                 size = 0x1f;
         }
 
-        gpch->regs = ioremap_nocache(AR7_REGS_GPIO,
-                                        AR7_REGS_GPIO + 0x10);
-
+        gpch->regs = ioremap_nocache(AR7_REGS_GPIO, size);
         if (!gpch->regs) {
                 printk(KERN_ERR "%s: failed to ioremap regs\n",
                                         gpch->chip.label);
diff --git a/arch/mips/bcm47xx/nvram.c b/arch/mips/bcm47xx/nvram.c
index e5b6615731e5..54db815bc86c 100644
--- a/arch/mips/bcm47xx/nvram.c
+++ b/arch/mips/bcm47xx/nvram.c
@@ -3,6 +3,7 @@
  *
  * Copyright (C) 2005 Broadcom Corporation
  * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
+ * Copyright (C) 2010-2011 Hauke Mehrtens <hauke@hauke-m.de>
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -23,7 +24,7 @@
 static char nvram_buf[NVRAM_SPACE];
 
 /* Probe for NVRAM header */
-static void __init early_nvram_init(void)
+static void early_nvram_init(void)
 {
         struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore;
         struct nvram_header *header;
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index c95f90bf734c..73b529b57433 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -3,6 +3,7 @@
  *  Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
  *  Copyright (C) 2006 Michael Buesch <mb@bu3sch.de>
  *  Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
+ *  Copyright (C) 2010-2011 Hauke Mehrtens <hauke@hauke-m.de>
  *
  *  This program is free software; you can redistribute  it and/or modify it
  *  under  the terms of  the GNU General  Public License as published by the
@@ -57,10 +58,49 @@ static void bcm47xx_machine_halt(void)
 }
 
 #define READ_FROM_NVRAM(_outvar, name, buf) \
-        if (nvram_getenv(name, buf, sizeof(buf)) >= 0)\
+        if (nvram_getprefix(prefix, name, buf, sizeof(buf)) >= 0)\
                 sprom->_outvar = simple_strtoul(buf, NULL, 0);
 
-static void bcm47xx_fill_sprom(struct ssb_sprom *sprom)
+#define READ_FROM_NVRAM2(_outvar, name1, name2, buf) \
+        if (nvram_getprefix(prefix, name1, buf, sizeof(buf)) >= 0 || \
+            nvram_getprefix(prefix, name2, buf, sizeof(buf)) >= 0)\
+                sprom->_outvar = simple_strtoul(buf, NULL, 0);
+
+static inline int nvram_getprefix(const char *prefix, char *name,
+                                  char *buf, int len)
+{
+        if (prefix) {
+                char key[100];
+
+                snprintf(key, sizeof(key), "%s%s", prefix, name);
+                return nvram_getenv(key, buf, len);
+        }
+
+        return nvram_getenv(name, buf, len);
+}
+
+static u32 nvram_getu32(const char *name, char *buf, int len)
+{
+        int rv;
+        char key[100];
+        u16 var0, var1;
+
+        snprintf(key, sizeof(key), "%s0", name);
+        rv = nvram_getenv(key, buf, len);
+        /* return 0 here so this looks like unset */
+        if (rv < 0)
+                return 0;
+        var0 = simple_strtoul(buf, NULL, 0);
+
+        snprintf(key, sizeof(key), "%s1", name);
+        rv = nvram_getenv(key, buf, len);
+        if (rv < 0)
+                return 0;
+        var1 = simple_strtoul(buf, NULL, 0);
+        return var1 << 16 | var0;
+}
+
+static void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix)
 {
         char buf[100];
         u32 boardflags;
@@ -69,11 +109,12 @@ static void bcm47xx_fill_sprom(struct ssb_sprom *sprom)
 
         sprom->revision = 1; /* Fallback: Old hardware does not define this. */
         READ_FROM_NVRAM(revision, "sromrev", buf);
-        if (nvram_getenv("il0macaddr", buf, sizeof(buf)) >= 0)
+        if (nvram_getprefix(prefix, "il0macaddr", buf, sizeof(buf)) >= 0 ||
+            nvram_getprefix(prefix, "macaddr", buf, sizeof(buf)) >= 0)
                 nvram_parse_macaddr(buf, sprom->il0mac);
-        if (nvram_getenv("et0macaddr", buf, sizeof(buf)) >= 0)
+        if (nvram_getprefix(prefix, "et0macaddr", buf, sizeof(buf)) >= 0)
                 nvram_parse_macaddr(buf, sprom->et0mac);
-        if (nvram_getenv("et1macaddr", buf, sizeof(buf)) >= 0)
+        if (nvram_getprefix(prefix, "et1macaddr", buf, sizeof(buf)) >= 0)
                 nvram_parse_macaddr(buf, sprom->et1mac);
         READ_FROM_NVRAM(et0phyaddr, "et0phyaddr", buf);
         READ_FROM_NVRAM(et1phyaddr, "et1phyaddr", buf);
@@ -95,20 +136,36 @@ static void bcm47xx_fill_sprom(struct ssb_sprom *sprom)
         READ_FROM_NVRAM(pa1hib0, "pa1hib0", buf);
         READ_FROM_NVRAM(pa1hib2, "pa1hib1", buf);
         READ_FROM_NVRAM(pa1hib1, "pa1hib2", buf);
-        READ_FROM_NVRAM(gpio0, "wl0gpio0", buf);
-        READ_FROM_NVRAM(gpio1, "wl0gpio1", buf);
-        READ_FROM_NVRAM(gpio2, "wl0gpio2", buf);
-        READ_FROM_NVRAM(gpio3, "wl0gpio3", buf);
-        READ_FROM_NVRAM(maxpwr_bg, "pa0maxpwr", buf);
-        READ_FROM_NVRAM(maxpwr_al, "pa1lomaxpwr", buf);
-        READ_FROM_NVRAM(maxpwr_a, "pa1maxpwr", buf);
-        READ_FROM_NVRAM(maxpwr_ah, "pa1himaxpwr", buf);
-        READ_FROM_NVRAM(itssi_a, "pa1itssit", buf);
-        READ_FROM_NVRAM(itssi_bg, "pa0itssit", buf);
+        READ_FROM_NVRAM2(gpio0, "ledbh0", "wl0gpio0", buf);
+        READ_FROM_NVRAM2(gpio1, "ledbh1", "wl0gpio1", buf);
+        READ_FROM_NVRAM2(gpio2, "ledbh2", "wl0gpio2", buf);
+        READ_FROM_NVRAM2(gpio3, "ledbh3", "wl0gpio3", buf);
+        READ_FROM_NVRAM2(maxpwr_bg, "maxp2ga0", "pa0maxpwr", buf);
+        READ_FROM_NVRAM2(maxpwr_al, "maxp5gla0", "pa1lomaxpwr", buf);
+        READ_FROM_NVRAM2(maxpwr_a, "maxp5ga0", "pa1maxpwr", buf);
+        READ_FROM_NVRAM2(maxpwr_ah, "maxp5gha0", "pa1himaxpwr", buf);
+        READ_FROM_NVRAM2(itssi_bg, "itt5ga0", "pa0itssit", buf);
+        READ_FROM_NVRAM2(itssi_a, "itt2ga0", "pa1itssit", buf);
         READ_FROM_NVRAM(tri2g, "tri2g", buf);
         READ_FROM_NVRAM(tri5gl, "tri5gl", buf);
         READ_FROM_NVRAM(tri5g, "tri5g", buf);
         READ_FROM_NVRAM(tri5gh, "tri5gh", buf);
+        READ_FROM_NVRAM(txpid2g[0], "txpid2ga0", buf);
+        READ_FROM_NVRAM(txpid2g[1], "txpid2ga1", buf);
+        READ_FROM_NVRAM(txpid2g[2], "txpid2ga2", buf);
+        READ_FROM_NVRAM(txpid2g[3], "txpid2ga3", buf);
+        READ_FROM_NVRAM(txpid5g[0], "txpid5ga0", buf);
+        READ_FROM_NVRAM(txpid5g[1], "txpid5ga1", buf);
+        READ_FROM_NVRAM(txpid5g[2], "txpid5ga2", buf);
+        READ_FROM_NVRAM(txpid5g[3], "txpid5ga3", buf);
+        READ_FROM_NVRAM(txpid5gl[0], "txpid5gla0", buf);
+        READ_FROM_NVRAM(txpid5gl[1], "txpid5gla1", buf);
+        READ_FROM_NVRAM(txpid5gl[2], "txpid5gla2", buf);
+        READ_FROM_NVRAM(txpid5gl[3], "txpid5gla3", buf);
+        READ_FROM_NVRAM(txpid5gh[0], "txpid5gha0", buf);
+        READ_FROM_NVRAM(txpid5gh[1], "txpid5gha1", buf);
+        READ_FROM_NVRAM(txpid5gh[2], "txpid5gha2", buf);
+        READ_FROM_NVRAM(txpid5gh[3], "txpid5gha3", buf);
         READ_FROM_NVRAM(rxpo2g, "rxpo2g", buf);
         READ_FROM_NVRAM(rxpo5g, "rxpo5g", buf);
         READ_FROM_NVRAM(rssisav2g, "rssisav2g", buf);
@@ -120,19 +177,27 @@ static void bcm47xx_fill_sprom(struct ssb_sprom *sprom)
         READ_FROM_NVRAM(rssismf5g, "rssismf5g", buf);
         READ_FROM_NVRAM(bxa5g, "bxa5g", buf);
         READ_FROM_NVRAM(cck2gpo, "cck2gpo", buf);
-        READ_FROM_NVRAM(ofdm2gpo, "ofdm2gpo", buf);
-        READ_FROM_NVRAM(ofdm5glpo, "ofdm5glpo", buf);
-        READ_FROM_NVRAM(ofdm5gpo, "ofdm5gpo", buf);
-        READ_FROM_NVRAM(ofdm5ghpo, "ofdm5ghpo", buf);
 
-        if (nvram_getenv("boardflags", buf, sizeof(buf)) >= 0) {
+        sprom->ofdm2gpo = nvram_getu32("ofdm2gpo", buf, sizeof(buf));
+        sprom->ofdm5glpo = nvram_getu32("ofdm5glpo", buf, sizeof(buf));
+        sprom->ofdm5gpo = nvram_getu32("ofdm5gpo", buf, sizeof(buf));
+        sprom->ofdm5ghpo = nvram_getu32("ofdm5ghpo", buf, sizeof(buf));
+
+        READ_FROM_NVRAM(antenna_gain.ghz24.a0, "ag0", buf);
+        READ_FROM_NVRAM(antenna_gain.ghz24.a1, "ag1", buf);
+        READ_FROM_NVRAM(antenna_gain.ghz24.a2, "ag2", buf);
+        READ_FROM_NVRAM(antenna_gain.ghz24.a3, "ag3", buf);
+        memcpy(&sprom->antenna_gain.ghz5, &sprom->antenna_gain.ghz24,
+               sizeof(sprom->antenna_gain.ghz5));
+
+        if (nvram_getprefix(prefix, "boardflags", buf, sizeof(buf)) >= 0) {
                 boardflags = simple_strtoul(buf, NULL, 0);
                 if (boardflags) {
                         sprom->boardflags_lo = (boardflags & 0x0000FFFFU);
                         sprom->boardflags_hi = (boardflags & 0xFFFF0000U) >> 16;
                 }
         }
-        if (nvram_getenv("boardflags2", buf, sizeof(buf)) >= 0) {
+        if (nvram_getprefix(prefix, "boardflags2", buf, sizeof(buf)) >= 0) {
                 boardflags = simple_strtoul(buf, NULL, 0);
                 if (boardflags) {
                         sprom->boardflags2_lo = (boardflags & 0x0000FFFFU);
@@ -141,6 +206,22 @@ static void bcm47xx_fill_sprom(struct ssb_sprom *sprom)
         }
 }
 
+int bcm47xx_get_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+{
+        char prefix[10];
+
+        if (bus->bustype == SSB_BUSTYPE_PCI) {
+                snprintf(prefix, sizeof(prefix), "pci/%u/%u/",
+                         bus->host_pci->bus->number + 1,
+                         PCI_SLOT(bus->host_pci->devfn));
+                bcm47xx_fill_sprom(out, prefix);
+                return 0;
+        } else {
+                printk(KERN_WARNING "bcm47xx: unable to fill SPROM for given bustype.\n");
+                return -EINVAL;
+        }
+}
+
 static int bcm47xx_get_invariants(struct ssb_bus *bus,
                                    struct ssb_init_invariants *iv)
 {
@@ -158,7 +239,7 @@ static int bcm47xx_get_invariants(struct ssb_bus *bus,
         if (nvram_getenv("boardrev", buf, sizeof(buf)) >= 0)
                 iv->boardinfo.rev = (u16)simple_strtoul(buf, NULL, 0);
 
-        bcm47xx_fill_sprom(&iv->sprom);
+        bcm47xx_fill_sprom(&iv->sprom, NULL);
 
         if (nvram_getenv("cardbus", buf, sizeof(buf)) >= 0)
                 iv->has_cardbus_slot = !!simple_strtoul(buf, NULL, 10);
@@ -172,6 +253,11 @@ void __init plat_mem_setup(void)
         char buf[100];
         struct ssb_mipscore *mcore;
 
+        err = ssb_arch_register_fallback_sprom(&bcm47xx_get_sprom);
+        if (err)
+                printk(KERN_WARNING "bcm47xx: someone else already registered"
+                        " a ssb SPROM callback handler (err %d)\n", err);
+
         err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE,
                                       bcm47xx_get_invariants);
         if (err)
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index 8dba8cfb752f..40b223b603be 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -643,6 +643,17 @@ static struct ssb_sprom bcm63xx_sprom = {
         .boardflags_lo          = 0x2848,
         .boardflags_hi          = 0x0000,
 };
+
+int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+{
+        if (bus->bustype == SSB_BUSTYPE_PCI) {
+                memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
+                return 0;
+        } else {
+                printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
+                return -EINVAL;
+        }
+}
 #endif
 
 /*
@@ -793,8 +804,9 @@ void __init board_prom_init(void)
         if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
                 memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
                 memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-                if (ssb_arch_set_fallback_sprom(&bcm63xx_sprom) < 0)
-                        printk(KERN_ERR "failed to register fallback SPROM\n");
+                if (ssb_arch_register_fallback_sprom(
+                                &bcm63xx_get_fallback_sprom) < 0)
+                        printk(KERN_ERR PFX "failed to register fallback SPROM\n");
         }
 #endif
 }
diff --git a/arch/mips/boot/compressed/calc_vmlinuz_load_addr.c b/arch/mips/boot/compressed/calc_vmlinuz_load_addr.c
index 88c9d963be88..9a6243676e22 100644
--- a/arch/mips/boot/compressed/calc_vmlinuz_load_addr.c
+++ b/arch/mips/boot/compressed/calc_vmlinuz_load_addr.c
@@ -16,8 +16,8 @@
 
 int main(int argc, char *argv[])
 {
+        unsigned long long vmlinux_size, vmlinux_load_addr, vmlinuz_load_addr;
         struct stat sb;
-        uint64_t vmlinux_size, vmlinux_load_addr, vmlinuz_load_addr;
 
         if (argc != 3) {
                 fprintf(stderr, "Usage: %s <pathname> <vmlinux_load_addr>\n",
diff --git a/arch/mips/boot/compressed/uart-alchemy.c b/arch/mips/boot/compressed/uart-alchemy.c
index 1bff22fa089b..eb063e6dead9 100644
--- a/arch/mips/boot/compressed/uart-alchemy.c
+++ b/arch/mips/boot/compressed/uart-alchemy.c
@@ -3,5 +3,5 @@
 void putc(char c)
 {
         /* all current (Jan. 2010) in-kernel boards */
-        alchemy_uart_putchar(UART0_PHYS_ADDR, c);
+        alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
 }
diff --git a/arch/mips/cavium-octeon/Kconfig b/arch/mips/cavium-octeon/Kconfig
index caae22858163..cad555ebeca3 100644
--- a/arch/mips/cavium-octeon/Kconfig
+++ b/arch/mips/cavium-octeon/Kconfig
@@ -1,11 +1,7 @@
-config CAVIUM_OCTEON_SPECIFIC_OPTIONS
-        bool "Enable Octeon specific options"
-        depends on CPU_CAVIUM_OCTEON
-        default "y"
+if CPU_CAVIUM_OCTEON
 
 config CAVIUM_CN63XXP1
         bool "Enable CN63XXP1 errata worarounds"
-        depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS
         default "n"
         help
           The CN63XXP1 chip requires build time workarounds to
@@ -16,7 +12,6 @@ config CAVIUM_CN63XXP1
 
 config CAVIUM_OCTEON_2ND_KERNEL
         bool "Build the kernel to be used as a 2nd kernel on the same chip"
-        depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS
         default "n"
         help
           This option configures this kernel to be linked at a different
@@ -26,7 +21,6 @@ config CAVIUM_OCTEON_2ND_KERNEL
 
 config CAVIUM_OCTEON_HW_FIX_UNALIGNED
         bool "Enable hardware fixups of unaligned loads and stores"
-        depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS
         default "y"
         help
           Configure the Octeon hardware to automatically fix unaligned loads
@@ -38,7 +32,6 @@ config CAVIUM_OCTEON_HW_FIX_UNALIGNED
 
 config CAVIUM_OCTEON_CVMSEG_SIZE
         int "Number of L1 cache lines reserved for CVMSEG memory"
-        depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS
         range 0 54
         default 1
         help
@@ -50,7 +43,6 @@ config CAVIUM_OCTEON_CVMSEG_SIZE
 
 config CAVIUM_OCTEON_LOCK_L2
         bool "Lock often used kernel code in the L2"
-        depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS
         default "y"
         help
           Enable locking parts of the kernel into the L2 cache.
@@ -93,7 +85,6 @@ config CAVIUM_OCTEON_LOCK_L2_MEMCPY
 config ARCH_SPARSEMEM_ENABLE
         def_bool y
         select SPARSEMEM_STATIC
-        depends on CPU_CAVIUM_OCTEON
 
 config CAVIUM_OCTEON_HELPER
         def_bool y
@@ -107,6 +98,8 @@ config NEED_SG_DMA_LENGTH
 
 config SWIOTLB
         def_bool y
-        depends on CPU_CAVIUM_OCTEON
         select IOMMU_HELPER
         select NEED_SG_DMA_LENGTH
+
+
+endif # CPU_CAVIUM_OCTEON
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 0707fae3f0ee..2d9028f1474c 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -288,7 +288,6 @@ void octeon_user_io_init(void)
         union octeon_cvmemctl cvmmemctl;
         union cvmx_iob_fau_timeout fau_timeout;
         union cvmx_pow_nw_tim nm_tim;
-        uint64_t cvmctl;
 
         /* Get the current settings for CP0_CVMMEMCTL_REG */
         cvmmemctl.u64 = read_c0_cvmmemctl();
@@ -392,12 +391,6 @@ void octeon_user_io_init(void)
                           CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE,
                           CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE * 128);
 
-        /* Move the performance counter interrupts to IRQ 6 */
-        cvmctl = read_c0_cvmctl();
-        cvmctl &= ~(7 << 7);
-        cvmctl |= 6 << 7;
-        write_c0_cvmctl(cvmctl);
-
         /* Set a default for the hardware timeouts */
         fau_timeout.u64 = 0;
         fau_timeout.s.tout_val = 0xfff;
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c
index 76923eeb58b9..8b606423bbd7 100644
--- a/arch/mips/cavium-octeon/smp.c
+++ b/arch/mips/cavium-octeon/smp.c
@@ -37,7 +37,7 @@ static irqreturn_t mailbox_interrupt(int irq, void *dev_id)
         uint64_t action;
 
         /* Load the mailbox register to figure out what we're supposed to do */
-        action = cvmx_read_csr(CVMX_CIU_MBOX_CLRX(coreid));
+        action = cvmx_read_csr(CVMX_CIU_MBOX_CLRX(coreid)) & 0xffff;
 
         /* Clear the mailbox to clear the interrupt */
         cvmx_write_csr(CVMX_CIU_MBOX_CLRX(coreid), action);
@@ -202,16 +202,15 @@ void octeon_prepare_cpus(unsigned int max_cpus)
         if (labi->labi_signature != LABI_SIGNATURE)
                 panic("The bootloader version on this board is incorrect.");
 #endif
-
-        cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffffffff);
+        /*
+         * Only the low order mailbox bits are used for IPIs, leave
+         * the other bits alone.
+         */
+        cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffff);
         if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_DISABLED,
-                        "mailbox0", mailbox_interrupt)) {
+                        "SMP-IPI", mailbox_interrupt)) {
                 panic("Cannot request_irq(OCTEON_IRQ_MBOX0)\n");
         }
-        if (request_irq(OCTEON_IRQ_MBOX1, mailbox_interrupt, IRQF_DISABLED,
-                        "mailbox1", mailbox_interrupt)) {
-                panic("Cannot request_irq(OCTEON_IRQ_MBOX1)\n");
-        }
 }
 
 /**
diff --git a/arch/mips/configs/lemote2f_defconfig b/arch/mips/configs/lemote2f_defconfig
index 167c1d07b809..b6acd2f256b6 100644
--- a/arch/mips/configs/lemote2f_defconfig
+++ b/arch/mips/configs/lemote2f_defconfig
@@ -86,8 +86,8 @@ CONFIG_NET_SCHED=y
 CONFIG_NET_EMATCH=y
 CONFIG_NET_CLS_ACT=y
 CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_SCO=m
+CONFIG_BT_L2CAP=y
+CONFIG_BT_SCO=y
 CONFIG_BT_RFCOMM=m
 CONFIG_BT_RFCOMM_TTY=y
 CONFIG_BT_BNEP=m
@@ -329,7 +329,7 @@ CONFIG_USB_LED=m
 CONFIG_USB_GADGET=m
 CONFIG_USB_GADGET_M66592=y
 CONFIG_MMC=m
-CONFIG_LEDS_CLASS=m
+CONFIG_LEDS_CLASS=y
 CONFIG_STAGING=y
 # CONFIG_STAGING_EXCLUDE_BUILD is not set
 CONFIG_FB_SM7XX=y
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig
index 7270f3183bda..5527abbb7dea 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -374,7 +374,7 @@ CONFIG_FB_CIRRUS=y
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_HID=m
-CONFIG_LEDS_CLASS=m
+CONFIG_LEDS_CLASS=y
 CONFIG_LEDS_TRIGGER_TIMER=m
 CONFIG_LEDS_TRIGGER_IDE_DISK=y
 CONFIG_LEDS_TRIGGER_HEARTBEAT=m
diff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig
index a97a42c6b2c8..37862b2ce363 100644
--- a/arch/mips/configs/mtx1_defconfig
+++ b/arch/mips/configs/mtx1_defconfig
@@ -225,8 +225,8 @@ CONFIG_TOSHIBA_FIR=m
 CONFIG_VLSI_FIR=m
 CONFIG_MCS_FIR=m
 CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_SCO=m
+CONFIG_BT_L2CAP=y
+CONFIG_BT_SCO=y
 CONFIG_BT_RFCOMM=m
 CONFIG_BT_RFCOMM_TTY=y
 CONFIG_BT_BNEP=m
diff --git a/arch/mips/configs/nlm_xlr_defconfig b/arch/mips/configs/nlm_xlr_defconfig
new file mode 100644
index 000000000000..e4b399fdaa61
--- /dev/null
+++ b/arch/mips/configs/nlm_xlr_defconfig
@@ -0,0 +1,574 @@
+CONFIG_NLM_XLR_BOARD=y
+CONFIG_HIGHMEM=y
+CONFIG_KSM=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_SMP=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_KEXEC=y
+CONFIG_EXPERIMENTAL=y
+CONFIG_CROSS_COMPILE="mips64-unknown-linux-gnu-"
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_AUDIT=y
+CONFIG_NAMESPACES=y
+CONFIG_SCHED_AUTOGROUP=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE="usr/dev_file_list usr/rootfs"
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_INITRAMFS_COMPRESSION_GZIP=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_EXPERT=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_ELF_CORE is not set
+# CONFIG_PCSPKR_PLATFORM is not set
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_COMPAT_BRK is not set
+CONFIG_PROFILING=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+CONFIG_BLK_DEV_INTEGRITY=y
+CONFIG_BINFMT_MISC=m
+CONFIG_PM_RUNTIME=y
+CONFIG_PM_DEBUG=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM_USER=m
+CONFIG_NET_KEY=m
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_NET_IPIP=m
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+CONFIG_SYN_COOKIES=y
+CONFIG_INET_AH=m
+CONFIG_INET_ESP=m
+CONFIG_INET_IPCOMP=m
+CONFIG_INET_XFRM_MODE_TRANSPORT=m
+CONFIG_INET_XFRM_MODE_TUNNEL=m
+CONFIG_INET_XFRM_MODE_BEET=m
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_HSTCP=m
+CONFIG_TCP_CONG_HYBLA=m
+CONFIG_TCP_CONG_SCALABLE=m
+CONFIG_TCP_CONG_LP=m
+CONFIG_TCP_CONG_VENO=m
+CONFIG_TCP_CONG_YEAH=m
+CONFIG_TCP_CONG_ILLINOIS=m
+CONFIG_TCP_MD5SIG=y
+CONFIG_IPV6=y
+CONFIG_IPV6_PRIVACY=y
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
+CONFIG_IPV6_SIT=m
+CONFIG_IPV6_TUNNEL=m
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_NETLABEL=y
+CONFIG_NETFILTER=y
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CONNTRACK_SECMARK=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CT_PROTO_UDPLITE=m
+CONFIG_NF_CONNTRACK_AMANDA=m
+CONFIG_NF_CONNTRACK_FTP=m
+CONFIG_NF_CONNTRACK_H323=m
+CONFIG_NF_CONNTRACK_IRC=m
+CONFIG_NF_CONNTRACK_NETBIOS_NS=m
+CONFIG_NF_CONNTRACK_PPTP=m
+CONFIG_NF_CONNTRACK_SANE=m
+CONFIG_NF_CONNTRACK_SIP=m
+CONFIG_NF_CONNTRACK_TFTP=m
+CONFIG_NF_CT_NETLINK=m
+CONFIG_NETFILTER_TPROXY=m
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
+CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
+CONFIG_NETFILTER_XT_TARGET_DSCP=m
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
+CONFIG_NETFILTER_XT_TARGET_TPROXY=m
+CONFIG_NETFILTER_XT_TARGET_TRACE=m
+CONFIG_NETFILTER_XT_TARGET_SECMARK=m
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_DSCP=m
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+CONFIG_NETFILTER_XT_MATCH_OSF=m
+CONFIG_NETFILTER_XT_MATCH_OWNER=m
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+CONFIG_NETFILTER_XT_MATCH_RATEEST=m
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+CONFIG_NETFILTER_XT_MATCH_RECENT=m
+CONFIG_NETFILTER_XT_MATCH_SOCKET=m
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_TIME=m
+CONFIG_NETFILTER_XT_MATCH_U32=m
+CONFIG_IP_VS=m
+CONFIG_IP_VS_IPV6=y
+CONFIG_IP_VS_PROTO_TCP=y
+CONFIG_IP_VS_PROTO_UDP=y
+CONFIG_IP_VS_PROTO_ESP=y
+CONFIG_IP_VS_PROTO_AH=y
+CONFIG_IP_VS_RR=m
+CONFIG_IP_VS_WRR=m
+CONFIG_IP_VS_LC=m
+CONFIG_IP_VS_WLC=m
+CONFIG_IP_VS_LBLC=m
+CONFIG_IP_VS_LBLCR=m
+CONFIG_IP_VS_DH=m
+CONFIG_IP_VS_SH=m
+CONFIG_IP_VS_SED=m
+CONFIG_IP_VS_NQ=m
+CONFIG_IP_VS_FTP=m
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_NF_NAT=m
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_SECURITY=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+CONFIG_NF_CONNTRACK_IPV6=m
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_AH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_MH=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_TARGET_HL=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_RAW=m
+CONFIG_IP6_NF_SECURITY=m
+CONFIG_DECNET_NF_GRABULATOR=m
+CONFIG_BRIDGE_NF_EBTABLES=m
+CONFIG_BRIDGE_EBT_BROUTE=m
+CONFIG_BRIDGE_EBT_T_FILTER=m
+CONFIG_BRIDGE_EBT_T_NAT=m
+CONFIG_BRIDGE_EBT_802_3=m
+CONFIG_BRIDGE_EBT_AMONG=m
+CONFIG_BRIDGE_EBT_ARP=m
+CONFIG_BRIDGE_EBT_IP=m
+CONFIG_BRIDGE_EBT_IP6=m
+CONFIG_BRIDGE_EBT_LIMIT=m
+CONFIG_BRIDGE_EBT_MARK=m
+CONFIG_BRIDGE_EBT_PKTTYPE=m
+CONFIG_BRIDGE_EBT_STP=m
+CONFIG_BRIDGE_EBT_VLAN=m
+CONFIG_BRIDGE_EBT_ARPREPLY=m
+CONFIG_BRIDGE_EBT_DNAT=m
+CONFIG_BRIDGE_EBT_MARK_T=m
+CONFIG_BRIDGE_EBT_REDIRECT=m
+CONFIG_BRIDGE_EBT_SNAT=m
+CONFIG_BRIDGE_EBT_LOG=m
+CONFIG_BRIDGE_EBT_ULOG=m
+CONFIG_BRIDGE_EBT_NFLOG=m
+CONFIG_IP_DCCP=m
+CONFIG_RDS=m
+CONFIG_RDS_TCP=m
+CONFIG_TIPC=m
+CONFIG_ATM=m
+CONFIG_ATM_CLIP=m
+CONFIG_ATM_LANE=m
+CONFIG_ATM_MPOA=m
+CONFIG_ATM_BR2684=m
+CONFIG_BRIDGE=m
+CONFIG_VLAN_8021Q=m
+CONFIG_VLAN_8021Q_GVRP=y
+CONFIG_DECNET=m
+CONFIG_LLC2=m
+CONFIG_IPX=m
+CONFIG_ATALK=m
+CONFIG_DEV_APPLETALK=m
+CONFIG_IPDDP=m
+CONFIG_IPDDP_ENCAP=y
+CONFIG_IPDDP_DECAP=y
+CONFIG_X25=m
+CONFIG_LAPB=m
+CONFIG_ECONET=m
+CONFIG_ECONET_AUNUDP=y
+CONFIG_ECONET_NATIVE=y
+CONFIG_WAN_ROUTER=m
+CONFIG_PHONET=m
+CONFIG_IEEE802154=m
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_CBQ=m
+CONFIG_NET_SCH_HTB=m
+CONFIG_NET_SCH_HFSC=m
+CONFIG_NET_SCH_ATM=m
+CONFIG_NET_SCH_PRIO=m
+CONFIG_NET_SCH_MULTIQ=m
+CONFIG_NET_SCH_RED=m
+CONFIG_NET_SCH_SFQ=m
+CONFIG_NET_SCH_TEQL=m
+CONFIG_NET_SCH_TBF=m
+CONFIG_NET_SCH_GRED=m
+CONFIG_NET_SCH_DSMARK=m
+CONFIG_NET_SCH_NETEM=m
+CONFIG_NET_SCH_DRR=m
+CONFIG_NET_SCH_INGRESS=m
+CONFIG_NET_CLS_BASIC=m
+CONFIG_NET_CLS_TCINDEX=m
+CONFIG_NET_CLS_ROUTE4=m
+CONFIG_NET_CLS_FW=m
+CONFIG_NET_CLS_U32=m
+CONFIG_CLS_U32_MARK=y
+CONFIG_NET_CLS_RSVP=m
+CONFIG_NET_CLS_RSVP6=m
+CONFIG_NET_CLS_FLOW=m
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_CMP=m
+CONFIG_NET_EMATCH_NBYTE=m
+CONFIG_NET_EMATCH_U32=m
+CONFIG_NET_EMATCH_META=m
+CONFIG_NET_EMATCH_TEXT=m
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_ACT_POLICE=m
+CONFIG_NET_ACT_GACT=m
+CONFIG_GACT_PROB=y
+CONFIG_NET_ACT_MIRRED=m
+CONFIG_NET_ACT_IPT=m
+CONFIG_NET_ACT_NAT=m
+CONFIG_NET_ACT_PEDIT=m
+CONFIG_NET_ACT_SIMP=m
+CONFIG_NET_ACT_SKBEDIT=m
+CONFIG_DCB=y
+CONFIG_NET_PKTGEN=m
+# CONFIG_WIRELESS is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+CONFIG_CONNECTOR=y
+CONFIG_MTD=m
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_OSD=m
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=65536
+CONFIG_CDROM_PKTCDVD=y
+CONFIG_MISC_DEVICES=y
+CONFIG_RAID_ATTRS=m
+CONFIG_SCSI=y
+CONFIG_SCSI_TGT=m
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=m
+CONFIG_CHR_DEV_OSST=m
+CONFIG_BLK_DEV_SR=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_CHR_DEV_SCH=m
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_SCSI_SPI_ATTRS=m
+CONFIG_SCSI_FC_TGT_ATTRS=y
+CONFIG_SCSI_SAS_LIBSAS=m
+CONFIG_SCSI_SRP_ATTRS=m
+CONFIG_SCSI_SRP_TGT_ATTRS=y
+CONFIG_ISCSI_TCP=m
+CONFIG_LIBFCOE=m
+CONFIG_SCSI_DEBUG=m
+CONFIG_SCSI_DH=y
+CONFIG_SCSI_DH_RDAC=m
+CONFIG_SCSI_DH_HP_SW=m
+CONFIG_SCSI_DH_EMC=m
+CONFIG_SCSI_DH_ALUA=m
+CONFIG_SCSI_OSD_INITIATOR=m
+CONFIG_SCSI_OSD_ULD=m
+# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=m
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=m
+CONFIG_SERIO_LIBPS2=y
+CONFIG_SERIO_RAW=m
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
+CONFIG_LEGACY_PTY_COUNT=0
+CONFIG_SERIAL_NONSTANDARD=y
+CONFIG_N_HDLC=m
+# CONFIG_DEVKMEM is not set
+CONFIG_STALDRV=y
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=48
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_8250_RSA=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_TIMERIOMEM=m
+CONFIG_RAW_DRIVER=m
+# CONFIG_HWMON is not set
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_UIO=y
+CONFIG_UIO_PDRV=m
+CONFIG_UIO_PDRV_GENIRQ=m
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+CONFIG_GFS2_FS=m
+CONFIG_GFS2_FS_LOCKING_DLM=y
+CONFIG_OCFS2_FS=m
+CONFIG_BTRFS_FS=m
+CONFIG_BTRFS_FS_POSIX_ACL=y
+CONFIG_NILFS2_FS=m
+CONFIG_QUOTA_NETLINK_INTERFACE=y
+# CONFIG_PRINT_QUOTA_WARNING is not set
+CONFIG_QFMT_V1=m
+CONFIG_QFMT_V2=m
+CONFIG_AUTOFS4_FS=m
+CONFIG_FUSE_FS=y
+CONFIG_CUSE=m
+CONFIG_FSCACHE=m
+CONFIG_FSCACHE_STATS=y
+CONFIG_FSCACHE_HISTOGRAM=y
+CONFIG_CACHEFILES=m
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_NTFS_FS=m
+CONFIG_PROC_KCORE=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_CONFIGFS_FS=y
+CONFIG_ADFS_FS=m
+CONFIG_AFFS_FS=m
+CONFIG_ECRYPT_FS=y
+CONFIG_HFS_FS=m
+CONFIG_HFSPLUS_FS=m
+CONFIG_BEFS_FS=m
+CONFIG_BFS_FS=m
+CONFIG_EFS_FS=m
+CONFIG_CRAMFS=m
+CONFIG_SQUASHFS=m
+CONFIG_VXFS_FS=m
+CONFIG_MINIX_FS=m
+CONFIG_OMFS_FS=m
+CONFIG_HPFS_FS=m
+CONFIG_QNX4FS_FS=m
+CONFIG_ROMFS_FS=m
+CONFIG_SYSV_FS=m
+CONFIG_UFS_FS=m
+CONFIG_EXOFS_FS=m
+CONFIG_NFS_FS=m
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_FSCACHE=y
+CONFIG_NFSD=m
+CONFIG_NFSD_V3_ACL=y
+CONFIG_NFSD_V4=y
+CONFIG_CIFS=m
+CONFIG_CIFS_WEAK_PW_HASH=y
+CONFIG_CIFS_UPCALL=y
+CONFIG_CIFS_XATTR=y
+CONFIG_CIFS_POSIX=y
+CONFIG_CIFS_DFS_UPCALL=y
+CONFIG_CIFS_EXPERIMENTAL=y
+CONFIG_NCP_FS=m
+CONFIG_NCPFS_PACKET_SIGNING=y
+CONFIG_NCPFS_IOCTL_LOCKING=y
+CONFIG_NCPFS_STRONG=y
+CONFIG_NCPFS_NFS_NS=y
+CONFIG_NCPFS_OS2_NS=y
+CONFIG_NCPFS_NLS=y
+CONFIG_NCPFS_EXTRAS=y
+CONFIG_CODA_FS=m
+CONFIG_AFS_FS=m
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_ACORN_PARTITION=y
+CONFIG_ACORN_PARTITION_ICS=y
+CONFIG_ACORN_PARTITION_RISCIX=y
+CONFIG_OSF_PARTITION=y
+CONFIG_AMIGA_PARTITION=y
+CONFIG_ATARI_PARTITION=y
+CONFIG_MAC_PARTITION=y
+CONFIG_BSD_DISKLABEL=y
+CONFIG_MINIX_SUBPARTITION=y
+CONFIG_SOLARIS_X86_PARTITION=y
+CONFIG_UNIXWARE_DISKLABEL=y
+CONFIG_LDM_PARTITION=y
+CONFIG_SGI_PARTITION=y
+CONFIG_ULTRIX_PARTITION=y
+CONFIG_SUN_PARTITION=y
+CONFIG_KARMA_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_SYSV68_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="cp437"
+CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_PRINTK_TIME=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_UNUSED_SYMBOLS=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_SCHEDSTATS=y
+CONFIG_TIMER_STATS=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_SCHED_TRACER=y
+CONFIG_BLK_DEV_IO_TRACE=y
+CONFIG_KGDB=y
+CONFIG_SECURITY=y
+CONFIG_SECURITY_NETWORK=y
+CONFIG_LSM_MMAP_MIN_ADDR=0
+CONFIG_SECURITY_SELINUX=y
+CONFIG_SECURITY_SELINUX_BOOTPARAM=y
+CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0
+CONFIG_SECURITY_SELINUX_DISABLE=y
+CONFIG_SECURITY_SMACK=y
+CONFIG_SECURITY_TOMOYO=y
+CONFIG_CRYPTO_NULL=m
+CONFIG_CRYPTO_CRYPTD=m
+CONFIG_CRYPTO_TEST=m
+CONFIG_CRYPTO_CCM=m
+CONFIG_CRYPTO_GCM=m
+CONFIG_CRYPTO_CTS=m
+CONFIG_CRYPTO_LRW=m
+CONFIG_CRYPTO_PCBC=m
+CONFIG_CRYPTO_XTS=m
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_XCBC=m
+CONFIG_CRYPTO_VMAC=m
+CONFIG_CRYPTO_MICHAEL_MIC=m
+CONFIG_CRYPTO_RMD128=m
+CONFIG_CRYPTO_RMD160=m
+CONFIG_CRYPTO_RMD256=m
+CONFIG_CRYPTO_RMD320=m
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_TGR192=m
+CONFIG_CRYPTO_WP512=m
+CONFIG_CRYPTO_ANUBIS=m
+CONFIG_CRYPTO_BLOWFISH=m
+CONFIG_CRYPTO_CAMELLIA=m
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_FCRYPT=m
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_SALSA20=m
+CONFIG_CRYPTO_SEED=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_ZLIB=m
+CONFIG_CRYPTO_LZO=m
+CONFIG_CRC_CCITT=m
+CONFIG_CRC7=m
diff --git a/arch/mips/include/asm/cache.h b/arch/mips/include/asm/cache.h
index 650ac9ba734c..b4db69fbc40c 100644
--- a/arch/mips/include/asm/cache.h
+++ b/arch/mips/include/asm/cache.h
@@ -17,6 +17,6 @@
 #define SMP_CACHE_SHIFT         L1_CACHE_SHIFT
 #define SMP_CACHE_BYTES         L1_CACHE_BYTES
 
-#define __read_mostly __attribute__((__section__(".data.read_mostly")))
+#define __read_mostly __attribute__((__section__(".data..read_mostly")))
 
 #endif /* _ASM_CACHE_H */
diff --git a/arch/mips/include/asm/cevt-r4k.h b/arch/mips/include/asm/cevt-r4k.h
index fa4328f9124f..65f9bdd02f1f 100644
--- a/arch/mips/include/asm/cevt-r4k.h
+++ b/arch/mips/include/asm/cevt-r4k.h
@@ -14,6 +14,9 @@
 #ifndef __ASM_CEVT_R4K_H
 #define __ASM_CEVT_R4K_H
 
+#include <linux/clockchips.h>
+#include <asm/time.h>
+
 DECLARE_PER_CPU(struct clock_event_device, mips_clockevent_device);
 
 void mips_event_handler(struct clock_event_device *dev);
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 86877539c6e8..34c0d3cb116f 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -33,6 +33,7 @@
 #define PRID_COMP_TOSHIBA       0x070000
 #define PRID_COMP_LSI           0x080000
 #define PRID_COMP_LEXRA         0x0b0000
+#define PRID_COMP_NETLOGIC      0x0c0000
 #define PRID_COMP_CAVIUM        0x0d0000
 #define PRID_COMP_INGENIC       0xd00000
 
@@ -142,6 +143,31 @@
 #define PRID_IMP_JZRISC        0x0200
 
 /*
+ * These are the PRID's for when 23:16 == PRID_COMP_NETLOGIC
+ */
+#define PRID_IMP_NETLOGIC_XLR732        0x0000
+#define PRID_IMP_NETLOGIC_XLR716        0x0200
+#define PRID_IMP_NETLOGIC_XLR532        0x0900
+#define PRID_IMP_NETLOGIC_XLR308        0x0600
+#define PRID_IMP_NETLOGIC_XLR532C       0x0800
+#define PRID_IMP_NETLOGIC_XLR516C       0x0a00
+#define PRID_IMP_NETLOGIC_XLR508C       0x0b00
+#define PRID_IMP_NETLOGIC_XLR308C       0x0f00
+#define PRID_IMP_NETLOGIC_XLS608        0x8000
+#define PRID_IMP_NETLOGIC_XLS408        0x8800
+#define PRID_IMP_NETLOGIC_XLS404        0x8c00
+#define PRID_IMP_NETLOGIC_XLS208        0x8e00
+#define PRID_IMP_NETLOGIC_XLS204        0x8f00
+#define PRID_IMP_NETLOGIC_XLS108        0xce00
+#define PRID_IMP_NETLOGIC_XLS104        0xcf00
+#define PRID_IMP_NETLOGIC_XLS616B       0x4000
+#define PRID_IMP_NETLOGIC_XLS608B       0x4a00
+#define PRID_IMP_NETLOGIC_XLS416B       0x4400
+#define PRID_IMP_NETLOGIC_XLS412B       0x4c00
+#define PRID_IMP_NETLOGIC_XLS408B       0x4e00
+#define PRID_IMP_NETLOGIC_XLS404B       0x4f00
+
+/*
  * Definitions for 7:0 on legacy processors
  */
 
@@ -234,6 +260,7 @@ enum cpu_type_enum {
          */
         CPU_5KC, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2,
         CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS, CPU_CAVIUM_OCTEON2,
+        CPU_XLR,
 
         CPU_LAST
 };
diff --git a/arch/mips/include/asm/dma-mapping.h b/arch/mips/include/asm/dma-mapping.h
index 655f849bd08d..7aa37ddfca4b 100644
--- a/arch/mips/include/asm/dma-mapping.h
+++ b/arch/mips/include/asm/dma-mapping.h
@@ -5,7 +5,9 @@
 #include <asm/cache.h>
 #include <asm-generic/dma-coherent.h>
 
+#ifndef CONFIG_SGI_IP27 /* Kludge to fix 2.6.39 build for IP27 */
 #include <dma-coherence.h>
+#endif
 
 extern struct dma_map_ops *mips_dma_map_ops;
 
diff --git a/arch/mips/include/asm/hugetlb.h b/arch/mips/include/asm/hugetlb.h
index f5e856015329..c565b7c3f0b5 100644
--- a/arch/mips/include/asm/hugetlb.h
+++ b/arch/mips/include/asm/hugetlb.h
@@ -70,6 +70,7 @@ static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
 static inline void huge_ptep_clear_flush(struct vm_area_struct *vma,
                                          unsigned long addr, pte_t *ptep)
 {
+        flush_tlb_mm(vma->vm_mm);
 }
 
 static inline int huge_pte_none(pte_t pte)
diff --git a/arch/mips/include/asm/jump_label.h b/arch/mips/include/asm/jump_label.h
index 7622ccf75076..1881b316ca45 100644
--- a/arch/mips/include/asm/jump_label.h
+++ b/arch/mips/include/asm/jump_label.h
@@ -20,16 +20,18 @@
 #define WORD_INSN ".word"
 #endif
 
-#define JUMP_LABEL(key, label)                                          \
-        do {                                                            \
-                asm goto("1:\tnop\n\t"                                  \
-                        "nop\n\t"                                       \
-                        ".pushsection __jump_table,  \"a\"\n\t"         \
-                        WORD_INSN " 1b, %l[" #label "], %0\n\t"         \
-                        ".popsection\n\t"                               \
-                        : :  "i" (key) :  : label);                     \
-        } while (0)
-
+static __always_inline bool arch_static_branch(struct jump_label_key *key)
+{
+        asm goto("1:\tnop\n\t"
+                "nop\n\t"
+                ".pushsection __jump_table,  \"aw\"\n\t"
+                WORD_INSN " 1b, %l[l_yes], %0\n\t"
+                ".popsection\n\t"
+                : :  "i" (key) : : l_yes);
+        return false;
+l_yes:
+        return true;
+}
 
 #endif /* __KERNEL__ */
 
diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h
index a6976619160a..f260ebed713b 100644
--- a/arch/mips/include/asm/mach-au1x00/au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/au1000.h
@@ -161,6 +161,45 @@ static inline int alchemy_get_cputype(void)
         return ALCHEMY_CPU_UNKNOWN;
 }
 
+/* return number of uarts on a given cputype */
+static inline int alchemy_get_uarts(int type)
+{
+        switch (type) {
+        case ALCHEMY_CPU_AU1000:
+                return 4;
+        case ALCHEMY_CPU_AU1500:
+        case ALCHEMY_CPU_AU1200:
+                return 2;
+        case ALCHEMY_CPU_AU1100:
+        case ALCHEMY_CPU_AU1550:
+                return 3;
+        }
+        return 0;
+}
+
+/* enable an UART block if it isn't already */
+static inline void alchemy_uart_enable(u32 uart_phys)
+{
+        void __iomem *addr = (void __iomem *)KSEG1ADDR(uart_phys);
+
+        /* reset, enable clock, deassert reset */
+        if ((__raw_readl(addr + 0x100) & 3) != 3) {
+                __raw_writel(0, addr + 0x100);
+                wmb();
+                __raw_writel(1, addr + 0x100);
+                wmb();
+        }
+        __raw_writel(3, addr + 0x100);
+        wmb();
+}
+
+static inline void alchemy_uart_disable(u32 uart_phys)
+{
+        void __iomem *addr = (void __iomem *)KSEG1ADDR(uart_phys);
+        __raw_writel(0, addr + 0x100);  /* UART_MOD_CNTRL */
+        wmb();
+}
+
 static inline void alchemy_uart_putchar(u32 uart_phys, u8 c)
 {
         void __iomem *base = (void __iomem *)KSEG1ADDR(uart_phys);
@@ -180,6 +219,20 @@ static inline void alchemy_uart_putchar(u32 uart_phys, u8 c)
         wmb();
 }
 
+/* return number of ethernet MACs on a given cputype */
+static inline int alchemy_get_macs(int type)
+{
+        switch (type) {
+        case ALCHEMY_CPU_AU1000:
+        case ALCHEMY_CPU_AU1500:
+        case ALCHEMY_CPU_AU1550:
+                return 2;
+        case ALCHEMY_CPU_AU1100:
+                return 1;
+        }
+        return 0;
+}
+
 /* arch/mips/au1000/common/clocks.c */
 extern void set_au1x00_speed(unsigned int new_freq);
 extern unsigned int get_au1x00_speed(void);
@@ -630,38 +683,42 @@ enum soc_au1200_ints {
 
 /*
  * Physical base addresses for integrated peripherals
+ * 0..au1000 1..au1500 2..au1100 3..au1550 4..au1200
  */
 
+#define AU1000_AC97_PHYS_ADDR           0x10000000 /* 012 */
+#define AU1000_USBD_PHYS_ADDR           0x10200000 /* 0123 */
+#define AU1000_IC0_PHYS_ADDR            0x10400000 /* 01234 */
+#define AU1000_MAC0_PHYS_ADDR           0x10500000 /* 023 */
+#define AU1000_MAC1_PHYS_ADDR           0x10510000 /* 023 */
+#define AU1000_MACEN_PHYS_ADDR          0x10520000 /* 023 */
+#define AU1100_SD0_PHYS_ADDR            0x10600000 /* 24 */
+#define AU1100_SD1_PHYS_ADDR            0x10680000 /* 24 */
+#define AU1000_I2S_PHYS_ADDR            0x11000000 /* 02 */
+#define AU1500_MAC0_PHYS_ADDR           0x11500000 /* 1 */
+#define AU1500_MAC1_PHYS_ADDR           0x11510000 /* 1 */
+#define AU1500_MACEN_PHYS_ADDR          0x11520000 /* 1 */
+#define AU1000_UART0_PHYS_ADDR          0x11100000 /* 01234 */
+#define AU1000_UART1_PHYS_ADDR          0x11200000 /* 0234 */
+#define AU1000_UART2_PHYS_ADDR          0x11300000 /* 0 */
+#define AU1000_UART3_PHYS_ADDR          0x11400000 /* 0123 */
+#define AU1500_GPIO2_PHYS_ADDR          0x11700000 /* 1234 */
+#define AU1000_IC1_PHYS_ADDR            0x11800000 /* 01234 */
+#define AU1000_SYS_PHYS_ADDR            0x11900000 /* 01234 */
+#define AU1000_DMA_PHYS_ADDR            0x14002000 /* 012 */
+#define AU1550_DBDMA_PHYS_ADDR          0x14002000 /* 34 */
+#define AU1550_DBDMA_CONF_PHYS_ADDR     0x14003000 /* 34 */
+#define AU1000_MACDMA0_PHYS_ADDR        0x14004000 /* 0123 */
+#define AU1000_MACDMA1_PHYS_ADDR        0x14004200 /* 0123 */
+
+
 #ifdef CONFIG_SOC_AU1000
 #define MEM_PHYS_ADDR           0x14000000
 #define STATIC_MEM_PHYS_ADDR    0x14001000
-#define DMA0_PHYS_ADDR          0x14002000
-#define DMA1_PHYS_ADDR          0x14002100
-#define DMA2_PHYS_ADDR          0x14002200
-#define DMA3_PHYS_ADDR          0x14002300
-#define DMA4_PHYS_ADDR          0x14002400
-#define DMA5_PHYS_ADDR          0x14002500
-#define DMA6_PHYS_ADDR          0x14002600
-#define DMA7_PHYS_ADDR          0x14002700
-#define IC0_PHYS_ADDR           0x10400000
-#define IC1_PHYS_ADDR           0x11800000
-#define AC97_PHYS_ADDR          0x10000000
 #define USBH_PHYS_ADDR          0x10100000
-#define USBD_PHYS_ADDR          0x10200000
 #define IRDA_PHYS_ADDR          0x10300000
-#define MAC0_PHYS_ADDR          0x10500000
-#define MAC1_PHYS_ADDR          0x10510000
-#define MACEN_PHYS_ADDR         0x10520000
-#define MACDMA0_PHYS_ADDR       0x14004000
-#define MACDMA1_PHYS_ADDR       0x14004200
-#define I2S_PHYS_ADDR           0x11000000
-#define UART0_PHYS_ADDR         0x11100000
-#define UART1_PHYS_ADDR         0x11200000
-#define UART2_PHYS_ADDR         0x11300000
-#define UART3_PHYS_ADDR         0x11400000
 #define SSI0_PHYS_ADDR          0x11600000
 #define SSI1_PHYS_ADDR          0x11680000
-#define SYS_PHYS_ADDR           0x11900000
 #define PCMCIA_IO_PHYS_ADDR     0xF00000000ULL
 #define PCMCIA_ATTR_PHYS_ADDR   0xF40000000ULL
 #define PCMCIA_MEM_PHYS_ADDR    0xF80000000ULL
@@ -672,30 +729,8 @@ enum soc_au1200_ints {
 #ifdef CONFIG_SOC_AU1500
 #define MEM_PHYS_ADDR           0x14000000
 #define STATIC_MEM_PHYS_ADDR    0x14001000
-#define DMA0_PHYS_ADDR          0x14002000
-#define DMA1_PHYS_ADDR          0x14002100
-#define DMA2_PHYS_ADDR          0x14002200
-#define DMA3_PHYS_ADDR          0x14002300
-#define DMA4_PHYS_ADDR          0x14002400
-#define DMA5_PHYS_ADDR          0x14002500
-#define DMA6_PHYS_ADDR          0x14002600
-#define DMA7_PHYS_ADDR          0x14002700
-#define IC0_PHYS_ADDR           0x10400000
-#define IC1_PHYS_ADDR           0x11800000
-#define AC97_PHYS_ADDR          0x10000000
 #define USBH_PHYS_ADDR          0x10100000
-#define USBD_PHYS_ADDR          0x10200000
 #define PCI_PHYS_ADDR           0x14005000
-#define MAC0_PHYS_ADDR          0x11500000
-#define MAC1_PHYS_ADDR          0x11510000
-#define MACEN_PHYS_ADDR         0x11520000
-#define MACDMA0_PHYS_ADDR       0x14004000
-#define MACDMA1_PHYS_ADDR       0x14004200
-#define I2S_PHYS_ADDR           0x11000000
-#define UART0_PHYS_ADDR         0x11100000
-#define UART3_PHYS_ADDR         0x11400000
-#define GPIO2_PHYS_ADDR         0x11700000
-#define SYS_PHYS_ADDR           0x11900000
 #define PCI_MEM_PHYS_ADDR       0x400000000ULL
 #define PCI_IO_PHYS_ADDR        0x500000000ULL
 #define PCI_CONFIG0_PHYS_ADDR   0x600000000ULL
@@ -710,34 +745,10 @@ enum soc_au1200_ints {
 #ifdef CONFIG_SOC_AU1100
 #define MEM_PHYS_ADDR           0x14000000
 #define STATIC_MEM_PHYS_ADDR    0x14001000
-#define DMA0_PHYS_ADDR          0x14002000
-#define DMA1_PHYS_ADDR          0x14002100
-#define DMA2_PHYS_ADDR          0x14002200
-#define DMA3_PHYS_ADDR          0x14002300
-#define DMA4_PHYS_ADDR          0x14002400
-#define DMA5_PHYS_ADDR          0x14002500
-#define DMA6_PHYS_ADDR          0x14002600
-#define DMA7_PHYS_ADDR          0x14002700
-#define IC0_PHYS_ADDR           0x10400000
-#define SD0_PHYS_ADDR           0x10600000
-#define SD1_PHYS_ADDR           0x10680000
-#define IC1_PHYS_ADDR           0x11800000
-#define AC97_PHYS_ADDR          0x10000000
 #define USBH_PHYS_ADDR          0x10100000
-#define USBD_PHYS_ADDR          0x10200000
 #define IRDA_PHYS_ADDR          0x10300000
-#define MAC0_PHYS_ADDR          0x10500000
-#define MACEN_PHYS_ADDR         0x10520000
-#define MACDMA0_PHYS_ADDR       0x14004000
-#define MACDMA1_PHYS_ADDR       0x14004200
-#define I2S_PHYS_ADDR           0x11000000
-#define UART0_PHYS_ADDR         0x11100000
-#define UART1_PHYS_ADDR         0x11200000
-#define UART3_PHYS_ADDR         0x11400000
 #define SSI0_PHYS_ADDR          0x11600000
 #define SSI1_PHYS_ADDR          0x11680000
-#define GPIO2_PHYS_ADDR         0x11700000
-#define SYS_PHYS_ADDR           0x11900000
 #define LCD_PHYS_ADDR           0x15000000
 #define PCMCIA_IO_PHYS_ADDR     0xF00000000ULL
 #define PCMCIA_ATTR_PHYS_ADDR   0xF40000000ULL
@@ -749,22 +760,8 @@ enum soc_au1200_ints {
 #ifdef CONFIG_SOC_AU1550
 #define MEM_PHYS_ADDR           0x14000000
 #define STATIC_MEM_PHYS_ADDR    0x14001000
-#define IC0_PHYS_ADDR           0x10400000
-#define IC1_PHYS_ADDR           0x11800000
 #define USBH_PHYS_ADDR          0x14020000
-#define USBD_PHYS_ADDR          0x10200000
 #define PCI_PHYS_ADDR           0x14005000
-#define MAC0_PHYS_ADDR          0x10500000
-#define MAC1_PHYS_ADDR          0x10510000
-#define MACEN_PHYS_ADDR         0x10520000
-#define MACDMA0_PHYS_ADDR       0x14004000
-#define MACDMA1_PHYS_ADDR       0x14004200
-#define UART0_PHYS_ADDR         0x11100000
-#define UART1_PHYS_ADDR         0x11200000
-#define UART3_PHYS_ADDR         0x11400000
-#define GPIO2_PHYS_ADDR         0x11700000
-#define SYS_PHYS_ADDR           0x11900000
-#define DDMA_PHYS_ADDR          0x14002000
 #define PE_PHYS_ADDR            0x14008000
 #define PSC0_PHYS_ADDR          0x11A00000
 #define PSC1_PHYS_ADDR          0x11B00000
@@ -786,19 +783,10 @@ enum soc_au1200_ints {
 #define STATIC_MEM_PHYS_ADDR    0x14001000
 #define AES_PHYS_ADDR           0x10300000
 #define CIM_PHYS_ADDR           0x14004000
-#define IC0_PHYS_ADDR           0x10400000
-#define IC1_PHYS_ADDR           0x11800000
 #define USBM_PHYS_ADDR          0x14020000
 #define USBH_PHYS_ADDR          0x14020100
-#define UART0_PHYS_ADDR         0x11100000
-#define UART1_PHYS_ADDR         0x11200000
-#define GPIO2_PHYS_ADDR         0x11700000
-#define SYS_PHYS_ADDR           0x11900000
-#define DDMA_PHYS_ADDR          0x14002000
 #define PSC0_PHYS_ADDR          0x11A00000
 #define PSC1_PHYS_ADDR          0x11B00000
-#define SD0_PHYS_ADDR           0x10600000
-#define SD1_PHYS_ADDR           0x10680000
 #define LCD_PHYS_ADDR           0x15000000
 #define SWCNT_PHYS_ADDR         0x1110010C
 #define MAEFE_PHYS_ADDR         0x14012000
@@ -835,183 +823,43 @@ enum soc_au1200_ints {
 #endif
 
 
-/* Interrupt Controller register offsets */
-#define IC_CFG0RD               0x40
-#define IC_CFG0SET              0x40
-#define IC_CFG0CLR              0x44
-#define IC_CFG1RD               0x48
-#define IC_CFG1SET              0x48
-#define IC_CFG1CLR              0x4C
-#define IC_CFG2RD               0x50
-#define IC_CFG2SET              0x50
-#define IC_CFG2CLR              0x54
-#define IC_REQ0INT              0x54
-#define IC_SRCRD                0x58
-#define IC_SRCSET               0x58
-#define IC_SRCCLR               0x5C
-#define IC_REQ1INT              0x5C
-#define IC_ASSIGNRD             0x60
-#define IC_ASSIGNSET            0x60
-#define IC_ASSIGNCLR            0x64
-#define IC_WAKERD               0x68
-#define IC_WAKESET              0x68
-#define IC_WAKECLR              0x6C
-#define IC_MASKRD               0x70
-#define IC_MASKSET              0x70
-#define IC_MASKCLR              0x74
-#define IC_RISINGRD             0x78
-#define IC_RISINGCLR            0x78
-#define IC_FALLINGRD            0x7C
-#define IC_FALLINGCLR           0x7C
-#define IC_TESTBIT              0x80
-
-
-/* Interrupt Controller 0 */
-#define IC0_CFG0RD              0xB0400040
-#define IC0_CFG0SET             0xB0400040
-#define IC0_CFG0CLR             0xB0400044
-
-#define IC0_CFG1RD              0xB0400048
-#define IC0_CFG1SET             0xB0400048
-#define IC0_CFG1CLR             0xB040004C
-
-#define IC0_CFG2RD              0xB0400050
-#define IC0_CFG2SET             0xB0400050
-#define IC0_CFG2CLR             0xB0400054
-
-#define IC0_REQ0INT             0xB0400054
-#define IC0_SRCRD               0xB0400058
-#define IC0_SRCSET              0xB0400058
-#define IC0_SRCCLR              0xB040005C
-#define IC0_REQ1INT             0xB040005C
-
-#define IC0_ASSIGNRD            0xB0400060
-#define IC0_ASSIGNSET           0xB0400060
-#define IC0_ASSIGNCLR           0xB0400064
-
-#define IC0_WAKERD              0xB0400068
-#define IC0_WAKESET             0xB0400068
-#define IC0_WAKECLR             0xB040006C
-
-#define IC0_MASKRD              0xB0400070
-#define IC0_MASKSET             0xB0400070
-#define IC0_MASKCLR             0xB0400074
-
-#define IC0_RISINGRD            0xB0400078
-#define IC0_RISINGCLR           0xB0400078
-#define IC0_FALLINGRD           0xB040007C
-#define IC0_FALLINGCLR          0xB040007C
-
-#define IC0_TESTBIT             0xB0400080
-
-/* Interrupt Controller 1 */
-#define IC1_CFG0RD              0xB1800040
-#define IC1_CFG0SET             0xB1800040
-#define IC1_CFG0CLR             0xB1800044
-
-#define IC1_CFG1RD              0xB1800048
-#define IC1_CFG1SET             0xB1800048
-#define IC1_CFG1CLR             0xB180004C
-
-#define IC1_CFG2RD              0xB1800050
-#define IC1_CFG2SET             0xB1800050
-#define IC1_CFG2CLR             0xB1800054
-
-#define IC1_REQ0INT             0xB1800054
-#define IC1_SRCRD               0xB1800058
-#define IC1_SRCSET              0xB1800058
-#define IC1_SRCCLR              0xB180005C
-#define IC1_REQ1INT             0xB180005C
-
-#define IC1_ASSIGNRD            0xB1800060
-#define IC1_ASSIGNSET           0xB1800060
-#define IC1_ASSIGNCLR           0xB1800064
-
-#define IC1_WAKERD              0xB1800068
-#define IC1_WAKESET             0xB1800068
-#define IC1_WAKECLR             0xB180006C
-
-#define IC1_MASKRD              0xB1800070
-#define IC1_MASKSET             0xB1800070
-#define IC1_MASKCLR             0xB1800074
-
-#define IC1_RISINGRD            0xB1800078
-#define IC1_RISINGCLR           0xB1800078
-#define IC1_FALLINGRD           0xB180007C
-#define IC1_FALLINGCLR          0xB180007C
-
-#define IC1_TESTBIT             0xB1800080
 
 
 /* Au1000 */
 #ifdef CONFIG_SOC_AU1000
 
-#define UART0_ADDR              0xB1100000
-#define UART3_ADDR              0xB1400000
-
 #define USB_OHCI_BASE           0x10100000      /* phys addr for ioremap */
 #define USB_HOST_CONFIG         0xB017FFFC
 #define FOR_PLATFORM_C_USB_HOST_INT AU1000_USB_HOST_INT
-
-#define AU1000_ETH0_BASE        0xB0500000
-#define AU1000_ETH1_BASE        0xB0510000
-#define AU1000_MAC0_ENABLE      0xB0520000
-#define AU1000_MAC1_ENABLE      0xB0520004
-#define NUM_ETH_INTERFACES 2
 #endif /* CONFIG_SOC_AU1000 */
 
 /* Au1500 */
 #ifdef CONFIG_SOC_AU1500
 
-#define UART0_ADDR              0xB1100000
-#define UART3_ADDR              0xB1400000
-
 #define USB_OHCI_BASE           0x10100000      /* phys addr for ioremap */
 #define USB_HOST_CONFIG         0xB017fffc
 #define FOR_PLATFORM_C_USB_HOST_INT AU1500_USB_HOST_INT
-
-#define AU1500_ETH0_BASE        0xB1500000
-#define AU1500_ETH1_BASE        0xB1510000
-#define AU1500_MAC0_ENABLE      0xB1520000
-#define AU1500_MAC1_ENABLE      0xB1520004
-#define NUM_ETH_INTERFACES 2
 #endif /* CONFIG_SOC_AU1500 */
 
 /* Au1100 */
 #ifdef CONFIG_SOC_AU1100
 
-#define UART0_ADDR              0xB1100000
-#define UART3_ADDR              0xB1400000
-
 #define USB_OHCI_BASE           0x10100000      /* phys addr for ioremap */
 #define USB_HOST_CONFIG         0xB017FFFC
 #define FOR_PLATFORM_C_USB_HOST_INT AU1100_USB_HOST_INT
-
-#define AU1100_ETH0_BASE        0xB0500000
-#define AU1100_MAC0_ENABLE      0xB0520000
-#define NUM_ETH_INTERFACES 1
 #endif /* CONFIG_SOC_AU1100 */
 
 #ifdef CONFIG_SOC_AU1550
-#define UART0_ADDR              0xB1100000
 
 #define USB_OHCI_BASE           0x14020000      /* phys addr for ioremap */
 #define USB_OHCI_LEN            0x00060000
 #define USB_HOST_CONFIG         0xB4027ffc
 #define FOR_PLATFORM_C_USB_HOST_INT AU1550_USB_HOST_INT
-
-#define AU1550_ETH0_BASE        0xB0500000
-#define AU1550_ETH1_BASE        0xB0510000
-#define AU1550_MAC0_ENABLE      0xB0520000
-#define AU1550_MAC1_ENABLE      0xB0520004
-#define NUM_ETH_INTERFACES 2
 #endif /* CONFIG_SOC_AU1550 */
 
 
 #ifdef CONFIG_SOC_AU1200
 
-#define UART0_ADDR              0xB1100000
-
 #define USB_UOC_BASE            0x14020020
 #define USB_UOC_LEN             0x20
 #define USB_OHCI_BASE           0x14020100
@@ -1504,22 +1352,6 @@ enum soc_au1200_ints {
 #define SYS_PINFUNC_S1B         (1 << 2)
 #endif
 
-#define SYS_TRIOUTRD            0xB1900100
-#define SYS_TRIOUTCLR           0xB1900100
-#define SYS_OUTPUTRD            0xB1900108
-#define SYS_OUTPUTSET           0xB1900108
-#define SYS_OUTPUTCLR           0xB190010C
-#define SYS_PINSTATERD          0xB1900110
-#define SYS_PININPUTEN          0xB1900110
-
-/* GPIO2, Au1500, Au1550 only */
-#define GPIO2_BASE              0xB1700000
-#define GPIO2_DIR               (GPIO2_BASE + 0)
-#define GPIO2_OUTPUT            (GPIO2_BASE + 8)
-#define GPIO2_PINSTATE          (GPIO2_BASE + 0xC)
-#define GPIO2_INTENABLE         (GPIO2_BASE + 0x10)
-#define GPIO2_ENABLE            (GPIO2_BASE + 0x14)
-
 /* Power Management */
 #define SYS_SCRATCH0            0xB1900018
 #define SYS_SCRATCH1            0xB190001C
@@ -1635,12 +1467,6 @@ enum soc_au1200_ints {
 #  define AC97C_RS              (1 << 1)
 #  define AC97C_CE              (1 << 0)
 
-/* Secure Digital (SD) Controller */
-#define SD0_XMIT_FIFO   0xB0600000
-#define SD0_RECV_FIFO   0xB0600004
-#define SD1_XMIT_FIFO   0xB0680000
-#define SD1_RECV_FIFO   0xB0680004
-
 #if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
 /* Au1500 PCI Controller */
 #define Au1500_CFG_BASE         0xB4005000      /* virtual, KSEG1 addr */
diff --git a/arch/mips/include/asm/mach-au1x00/au1000_dma.h b/arch/mips/include/asm/mach-au1x00/au1000_dma.h
index c333b4e1cd44..59f5b55b2200 100644
--- a/arch/mips/include/asm/mach-au1x00/au1000_dma.h
+++ b/arch/mips/include/asm/mach-au1x00/au1000_dma.h
@@ -37,10 +37,6 @@
 
 #define NUM_AU1000_DMA_CHANNELS 8
 
-/* DMA Channel Base Addresses */
-#define DMA_CHANNEL_BASE        0xB4002000
-#define DMA_CHANNEL_LEN         0x00000100
-
 /* DMA Channel Register Offsets */
 #define DMA_MODE_SET            0x00000000
 #define DMA_MODE_READ           DMA_MODE_SET
diff --git a/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h b/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h
index c8a553a36ba4..2fdacfe85e23 100644
--- a/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h
+++ b/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h
@@ -37,14 +37,6 @@
 
 #ifndef _LANGUAGE_ASSEMBLY
 
-/*
- * The DMA base addresses.
- * The channels are every 256 bytes (0x0100) from the channel 0 base.
- * Interrupt status/enable is bits 15:0 for channels 15 to zero.
- */
-#define DDMA_GLOBAL_BASE        0xb4003000
-#define DDMA_CHANNEL_BASE       0xb4002000
-
 typedef volatile struct dbdma_global {
         u32     ddma_config;
         u32     ddma_intstat;
diff --git a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h
index 62d2f136d941..1f41a522906d 100644
--- a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h
@@ -24,6 +24,23 @@
 
 #define MAKE_IRQ(intc, off)     (AU1000_INTC##intc##_INT_BASE + (off))
 
+/* GPIO1 registers within SYS_ area */
+#define SYS_TRIOUTRD            0x100
+#define SYS_TRIOUTCLR           0x100
+#define SYS_OUTPUTRD            0x108
+#define SYS_OUTPUTSET           0x108
+#define SYS_OUTPUTCLR           0x10C
+#define SYS_PINSTATERD          0x110
+#define SYS_PININPUTEN          0x110
+
+/* register offsets within GPIO2 block */
+#define GPIO2_DIR               0x00
+#define GPIO2_OUTPUT            0x08
+#define GPIO2_PINSTATE          0x0C
+#define GPIO2_INTENABLE         0x10
+#define GPIO2_ENABLE            0x14
+
+struct gpio;
 
 static inline int au1000_gpio1_to_irq(int gpio)
 {
@@ -200,23 +217,26 @@ static inline int au1200_irq_to_gpio(int irq)
  */
 static inline void alchemy_gpio1_set_value(int gpio, int v)
 {
+        void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR);
         unsigned long mask = 1 << (gpio - ALCHEMY_GPIO1_BASE);
         unsigned long r = v ? SYS_OUTPUTSET : SYS_OUTPUTCLR;
-        au_writel(mask, r);
-        au_sync();
+        __raw_writel(mask, base + r);
+        wmb();
 }
 
 static inline int alchemy_gpio1_get_value(int gpio)
 {
+        void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR);
         unsigned long mask = 1 << (gpio - ALCHEMY_GPIO1_BASE);
-        return au_readl(SYS_PINSTATERD) & mask;
+        return __raw_readl(base + SYS_PINSTATERD) & mask;
 }
 
 static inline int alchemy_gpio1_direction_input(int gpio)
 {
+        void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR);
         unsigned long mask = 1 << (gpio - ALCHEMY_GPIO1_BASE);
-        au_writel(mask, SYS_TRIOUTCLR);
-        au_sync();
+        __raw_writel(mask, base + SYS_TRIOUTCLR);
+        wmb();
         return 0;
 }
 
@@ -257,27 +277,31 @@ static inline int alchemy_gpio1_to_irq(int gpio)
  */
 static inline void __alchemy_gpio2_mod_dir(int gpio, int to_out)
 {
+        void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR);
         unsigned long mask = 1 << (gpio - ALCHEMY_GPIO2_BASE);
-        unsigned long d = au_readl(GPIO2_DIR);
+        unsigned long d = __raw_readl(base + GPIO2_DIR);
+
         if (to_out)
                 d |= mask;
         else
                 d &= ~mask;
-        au_writel(d, GPIO2_DIR);
-        au_sync();
+        __raw_writel(d, base + GPIO2_DIR);
+        wmb();
 }
 
 static inline void alchemy_gpio2_set_value(int gpio, int v)
 {
+        void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR);
         unsigned long mask;
         mask = ((v) ? 0x00010001 : 0x00010000) << (gpio - ALCHEMY_GPIO2_BASE);
-        au_writel(mask, GPIO2_OUTPUT);
-        au_sync();
+        __raw_writel(mask, base + GPIO2_OUTPUT);
+        wmb();
 }
 
 static inline int alchemy_gpio2_get_value(int gpio)
 {
-        return au_readl(GPIO2_PINSTATE) & (1 << (gpio - ALCHEMY_GPIO2_BASE));
+        void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR);
+        return __raw_readl(base + GPIO2_PINSTATE) & (1 << (gpio - ALCHEMY_GPIO2_BASE));
 }
 
 static inline int alchemy_gpio2_direction_input(int gpio)
@@ -329,21 +353,23 @@ static inline int alchemy_gpio2_to_irq(int gpio)
  */
 static inline void alchemy_gpio1_input_enable(void)
 {
-        au_writel(0, SYS_PININPUTEN);   /* the write op is key */
-        au_sync();
+        void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR);
+        __raw_writel(0, base + SYS_PININPUTEN); /* the write op is key */
+        wmb();
 }
 
 /* GPIO2 shared interrupts and control */
 
 static inline void __alchemy_gpio2_mod_int(int gpio2, int en)
 {
-        unsigned long r = au_readl(GPIO2_INTENABLE);
+        void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR);
+        unsigned long r = __raw_readl(base + GPIO2_INTENABLE);
         if (en)
                 r |= 1 << gpio2;
         else
                 r &= ~(1 << gpio2);
-        au_writel(r, GPIO2_INTENABLE);
-        au_sync();
+        __raw_writel(r, base + GPIO2_INTENABLE);
+        wmb();
 }
 
 /**
@@ -418,10 +444,11 @@ static inline void alchemy_gpio2_disable_int(int gpio2)
  */
 static inline void alchemy_gpio2_enable(void)
 {
-        au_writel(3, GPIO2_ENABLE);     /* reset, clock enabled */
-        au_sync();
-        au_writel(1, GPIO2_ENABLE);     /* clock enabled */
-        au_sync();
+        void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR);
+        __raw_writel(3, base + GPIO2_ENABLE);   /* reset, clock enabled */
+        wmb();
+        __raw_writel(1, base + GPIO2_ENABLE);   /* clock enabled */
+        wmb();
 }
 
 /**
@@ -431,8 +458,9 @@ static inline void alchemy_gpio2_enable(void)
  */
 static inline void alchemy_gpio2_disable(void)
 {
-        au_writel(2, GPIO2_ENABLE);     /* reset, clock disabled */
-        au_sync();
+        void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR);
+        __raw_writel(2, base + GPIO2_ENABLE);   /* reset, clock disabled */
+        wmb();
 }
 
 /**********************************************************************/
@@ -556,6 +584,16 @@ static inline void gpio_set_value(int gpio, int v)
         alchemy_gpio_set_value(gpio, v);
 }
 
+static inline int gpio_get_value_cansleep(unsigned gpio)
+{
+        return gpio_get_value(gpio);
+}
+
+static inline void gpio_set_value_cansleep(unsigned gpio, int value)
+{
+        gpio_set_value(gpio, value);
+}
+
 static inline int gpio_is_valid(int gpio)
 {
         return alchemy_gpio_is_valid(gpio);
@@ -581,10 +619,50 @@ static inline int gpio_request(unsigned gpio, const char *label)
         return 0;
 }
 
+static inline int gpio_request_one(unsigned gpio,
+                                        unsigned long flags, const char *label)
+{
+        return 0;
+}
+
+static inline int gpio_request_array(struct gpio *array, size_t num)
+{
+        return 0;
+}
+
 static inline void gpio_free(unsigned gpio)
 {
 }
 
+static inline void gpio_free_array(struct gpio *array, size_t num)
+{
+}
+
+static inline int gpio_set_debounce(unsigned gpio, unsigned debounce)
+{
+        return -ENOSYS;
+}
+
+static inline int gpio_export(unsigned gpio, bool direction_may_change)
+{
+        return -ENOSYS;
+}
+
+static inline int gpio_export_link(struct device *dev, const char *name,
+                                   unsigned gpio)
+{
+        return -ENOSYS;
+}
+
+static inline int gpio_sysfs_set_active_low(unsigned gpio, int value)
+{
+        return -ENOSYS;
+}
+
+static inline void gpio_unexport(unsigned gpio)
+{
+}
+
 #endif  /* !CONFIG_ALCHEMY_GPIO_INDIRECT */
 
 
diff --git a/arch/mips/include/asm/mach-bcm47xx/nvram.h b/arch/mips/include/asm/mach-bcm47xx/nvram.h
index 9759588ba3cf..184d5ecb5f51 100644
--- a/arch/mips/include/asm/mach-bcm47xx/nvram.h
+++ b/arch/mips/include/asm/mach-bcm47xx/nvram.h
@@ -39,8 +39,16 @@ extern int nvram_getenv(char *name, char *val, size_t val_len);
 
 static inline void nvram_parse_macaddr(char *buf, u8 *macaddr)
 {
-        sscanf(buf, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &macaddr[0], &macaddr[1],
-               &macaddr[2], &macaddr[3], &macaddr[4], &macaddr[5]);
+        if (strchr(buf, ':'))
+                sscanf(buf, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &macaddr[0],
+                        &macaddr[1], &macaddr[2], &macaddr[3], &macaddr[4],
+                        &macaddr[5]);
+        else if (strchr(buf, '-'))
+                sscanf(buf, "%hhx-%hhx-%hhx-%hhx-%hhx-%hhx", &macaddr[0],
+                        &macaddr[1], &macaddr[2], &macaddr[3], &macaddr[4],
+                        &macaddr[5]);
+        else
+                printk(KERN_WARNING "Can not parse mac address: %s\n", buf);
 }
 
 #endif
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h b/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h
index 32978d32561a..ed72e6a26b73 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h
@@ -88,7 +88,7 @@ struct bcm_tag {
         char kernel_crc[CRC_LEN];
         /* 228-235: Unused at present */
         char reserved1[8];
-        /* 236-239: CRC32 of header excluding tagVersion */
+        /* 236-239: CRC32 of header excluding last 20 bytes */
         char header_crc[CRC_LEN];
         /* 240-255: Unused at present */
         char reserved2[16];
diff --git a/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h b/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
index 0b2b5eb22e9b..dedef7d2b01f 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
@@ -63,6 +63,11 @@
         # CN30XX Disable instruction prefetching
         or  v0, v0, 0x2000
 skip:
+        # First clear off CvmCtl[IPPCI] bit and move the performance
+        # counters interrupt to IRQ 6
+        li      v1, ~(7 << 7)
+        and     v0, v0, v1
+        ori     v0, v0, (6 << 7)
         # Write the cavium control register
         dmtc0   v0, CP0_CVMCTL_REG
         sync
diff --git a/arch/mips/include/asm/mach-lantiq/lantiq.h b/arch/mips/include/asm/mach-lantiq/lantiq.h
new file mode 100644
index 000000000000..ce2f02929d22
--- /dev/null
+++ b/arch/mips/include/asm/mach-lantiq/lantiq.h
@@ -0,0 +1,63 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+#ifndef _LANTIQ_H__
+#define _LANTIQ_H__
+
+#include <linux/irq.h>
+
+/* generic reg access functions */
+#define ltq_r32(reg)            __raw_readl(reg)
+#define ltq_w32(val, reg)       __raw_writel(val, reg)
+#define ltq_w32_mask(clear, set, reg)   \
+        ltq_w32((ltq_r32(reg) & ~(clear)) | (set), reg)
+#define ltq_r8(reg)             __raw_readb(reg)
+#define ltq_w8(val, reg)        __raw_writeb(val, reg)
+
+/* register access macros for EBU and CGU */
+#define ltq_ebu_w32(x, y)       ltq_w32((x), ltq_ebu_membase + (y))
+#define ltq_ebu_r32(x)          ltq_r32(ltq_ebu_membase + (x))
+#define ltq_cgu_w32(x, y)       ltq_w32((x), ltq_cgu_membase + (y))
+#define ltq_cgu_r32(x)          ltq_r32(ltq_cgu_membase + (x))
+
+extern __iomem void *ltq_ebu_membase;
+extern __iomem void *ltq_cgu_membase;
+
+extern unsigned int ltq_get_cpu_ver(void);
+extern unsigned int ltq_get_soc_type(void);
+
+/* clock speeds */
+#define CLOCK_60M       60000000
+#define CLOCK_83M       83333333
+#define CLOCK_111M      111111111
+#define CLOCK_133M      133333333
+#define CLOCK_167M      166666667
+#define CLOCK_200M      200000000
+#define CLOCK_266M      266666666
+#define CLOCK_333M      333333333
+#define CLOCK_400M      400000000
+
+/* spinlock all ebu i/o */
+extern spinlock_t ebu_lock;
+
+/* some irq helpers */
+extern void ltq_disable_irq(struct irq_data *data);
+extern void ltq_mask_and_ack_irq(struct irq_data *data);
+extern void ltq_enable_irq(struct irq_data *data);
+
+/* find out what caused the last cpu reset */
+extern int ltq_reset_cause(void);
+#define LTQ_RST_CAUSE_WDTRST    0x20
+
+#define IOPORT_RESOURCE_START   0x10000000
+#define IOPORT_RESOURCE_END     0xffffffff
+#define IOMEM_RESOURCE_START    0x10000000
+#define IOMEM_RESOURCE_END      0xffffffff
+#define LTQ_FLASH_START         0x10000000
+#define LTQ_FLASH_MAX           0x04000000
+
+#endif
diff --git a/arch/mips/include/asm/mach-lantiq/lantiq_platform.h b/arch/mips/include/asm/mach-lantiq/lantiq_platform.h
new file mode 100644
index 000000000000..a305f1d0259e
--- /dev/null
+++ b/arch/mips/include/asm/mach-lantiq/lantiq_platform.h
@@ -0,0 +1,53 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#ifndef _LANTIQ_PLATFORM_H__
+#define _LANTIQ_PLATFORM_H__
+
+#include <linux/mtd/partitions.h>
+#include <linux/socket.h>
+
+/* struct used to pass info to the pci core */
+enum {
+        PCI_CLOCK_INT = 0,
+        PCI_CLOCK_EXT
+};
+
+#define PCI_EXIN0       0x0001
+#define PCI_EXIN1       0x0002
+#define PCI_EXIN2       0x0004
+#define PCI_EXIN3       0x0008
+#define PCI_EXIN4       0x0010
+#define PCI_EXIN5       0x0020
+#define PCI_EXIN_MAX    6
+
+#define PCI_GNT1        0x0040
+#define PCI_GNT2        0x0080
+#define PCI_GNT3        0x0100
+#define PCI_GNT4        0x0200
+
+#define PCI_REQ1        0x0400
+#define PCI_REQ2        0x0800
+#define PCI_REQ3        0x1000
+#define PCI_REQ4        0x2000
+#define PCI_REQ_SHIFT   10
+#define PCI_REQ_MASK    0xf
+
+struct ltq_pci_data {
+        int clock;
+        int gpio;
+        int irq[16];
+};
+
+/* struct used to pass info to network drivers */
+struct ltq_eth_data {
+        struct sockaddr mac;
+        int mii_mode;
+};
+
+#endif
diff --git a/arch/mips/include/asm/mach-lantiq/war.h b/arch/mips/include/asm/mach-lantiq/war.h
new file mode 100644
index 000000000000..01b08ef368d1
--- /dev/null
+++ b/arch/mips/include/asm/mach-lantiq/war.h
@@ -0,0 +1,24 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ */
+#ifndef __ASM_MIPS_MACH_LANTIQ_WAR_H
+#define __ASM_MIPS_MACH_LANTIQ_WAR_H
+
+#define R4600_V1_INDEX_ICACHEOP_WAR     0
+#define R4600_V1_HIT_CACHEOP_WAR        0
+#define R4600_V2_HIT_CACHEOP_WAR        0
+#define R5432_CP0_INTERRUPT_WAR         0
+#define BCM1250_M3_WAR                  0
+#define SIBYTE_1956_WAR                 0
+#define MIPS4K_ICACHE_REFILL_WAR        0
+#define MIPS_CACHE_SYNC_WAR             0
+#define TX49XX_ICACHE_INDEX_INV_WAR     0
+#define RM9000_CDEX_SMP_WAR             0
+#define ICACHE_REFILLS_WORKAROUND_WAR   0
+#define R10000_LLSC_WAR                 0
+#define MIPS34K_MISSED_ITLB_WAR         0
+
+#endif
diff --git a/arch/mips/include/asm/mach-lantiq/xway/irq.h b/arch/mips/include/asm/mach-lantiq/xway/irq.h
new file mode 100644
index 000000000000..a1471d2dd0d2
--- /dev/null
+++ b/arch/mips/include/asm/mach-lantiq/xway/irq.h
@@ -0,0 +1,18 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#ifndef __LANTIQ_IRQ_H
+#define __LANTIQ_IRQ_H
+
+#include <lantiq_irq.h>
+
+#define NR_IRQS 256
+
+#include_next <irq.h>
+
+#endif
diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h
new file mode 100644
index 000000000000..b4465a888e20
--- /dev/null
+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h
@@ -0,0 +1,66 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#ifndef _LANTIQ_XWAY_IRQ_H__
+#define _LANTIQ_XWAY_IRQ_H__
+
+#define INT_NUM_IRQ0            8
+#define INT_NUM_IM0_IRL0        (INT_NUM_IRQ0 + 0)
+#define INT_NUM_IM1_IRL0        (INT_NUM_IRQ0 + 32)
+#define INT_NUM_IM2_IRL0        (INT_NUM_IRQ0 + 64)
+#define INT_NUM_IM3_IRL0        (INT_NUM_IRQ0 + 96)
+#define INT_NUM_IM4_IRL0        (INT_NUM_IRQ0 + 128)
+#define INT_NUM_IM_OFFSET       (INT_NUM_IM1_IRL0 - INT_NUM_IM0_IRL0)
+
+#define LTQ_ASC_TIR(x)          (INT_NUM_IM3_IRL0 + (x * 8))
+#define LTQ_ASC_RIR(x)          (INT_NUM_IM3_IRL0 + (x * 8) + 1)
+#define LTQ_ASC_EIR(x)          (INT_NUM_IM3_IRL0 + (x * 8) + 2)
+
+#define LTQ_ASC_ASE_TIR         INT_NUM_IM2_IRL0
+#define LTQ_ASC_ASE_RIR         (INT_NUM_IM2_IRL0 + 2)
+#define LTQ_ASC_ASE_EIR         (INT_NUM_IM2_IRL0 + 3)
+
+#define LTQ_SSC_TIR             (INT_NUM_IM0_IRL0 + 15)
+#define LTQ_SSC_RIR             (INT_NUM_IM0_IRL0 + 14)
+#define LTQ_SSC_EIR             (INT_NUM_IM0_IRL0 + 16)
+
+#define LTQ_MEI_DYING_GASP_INT  (INT_NUM_IM1_IRL0 + 21)
+#define LTQ_MEI_INT             (INT_NUM_IM1_IRL0 + 23)
+
+#define LTQ_TIMER6_INT          (INT_NUM_IM1_IRL0 + 23)
+#define LTQ_USB_INT             (INT_NUM_IM1_IRL0 + 22)
+#define LTQ_USB_OC_INT          (INT_NUM_IM4_IRL0 + 23)
+
+#define MIPS_CPU_TIMER_IRQ              7
+
+#define LTQ_DMA_CH0_INT         (INT_NUM_IM2_IRL0)
+#define LTQ_DMA_CH1_INT         (INT_NUM_IM2_IRL0 + 1)
+#define LTQ_DMA_CH2_INT         (INT_NUM_IM2_IRL0 + 2)
+#define LTQ_DMA_CH3_INT         (INT_NUM_IM2_IRL0 + 3)
+#define LTQ_DMA_CH4_INT         (INT_NUM_IM2_IRL0 + 4)
+#define LTQ_DMA_CH5_INT         (INT_NUM_IM2_IRL0 + 5)
+#define LTQ_DMA_CH6_INT         (INT_NUM_IM2_IRL0 + 6)
+#define LTQ_DMA_CH7_INT         (INT_NUM_IM2_IRL0 + 7)
+#define LTQ_DMA_CH8_INT         (INT_NUM_IM2_IRL0 + 8)
+#define LTQ_DMA_CH9_INT         (INT_NUM_IM2_IRL0 + 9)
+#define LTQ_DMA_CH10_INT        (INT_NUM_IM2_IRL0 + 10)
+#define LTQ_DMA_CH11_INT        (INT_NUM_IM2_IRL0 + 11)
+#define LTQ_DMA_CH12_INT        (INT_NUM_IM2_IRL0 + 25)
+#define LTQ_DMA_CH13_INT        (INT_NUM_IM2_IRL0 + 26)
+#define LTQ_DMA_CH14_INT        (INT_NUM_IM2_IRL0 + 27)
+#define LTQ_DMA_CH15_INT        (INT_NUM_IM2_IRL0 + 28)
+#define LTQ_DMA_CH16_INT        (INT_NUM_IM2_IRL0 + 29)
+#define LTQ_DMA_CH17_INT        (INT_NUM_IM2_IRL0 + 30)
+#define LTQ_DMA_CH18_INT        (INT_NUM_IM2_IRL0 + 16)
+#define LTQ_DMA_CH19_INT        (INT_NUM_IM2_IRL0 + 21)
+
+#define LTQ_PPE_MBOX_INT        (INT_NUM_IM2_IRL0 + 24)
+
+#define INT_NUM_IM4_IRL14       (INT_NUM_IM4_IRL0 + 14)
+
+#endif
diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
new file mode 100644
index 000000000000..8a3c6be669d2
--- /dev/null
+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
@@ -0,0 +1,141 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#ifndef _LTQ_XWAY_H__
+#define _LTQ_XWAY_H__
+
+#ifdef CONFIG_SOC_TYPE_XWAY
+
+#include <lantiq.h>
+
+/* Chip IDs */
+#define SOC_ID_DANUBE1          0x129
+#define SOC_ID_DANUBE2          0x12B
+#define SOC_ID_TWINPASS         0x12D
+#define SOC_ID_AMAZON_SE        0x152
+#define SOC_ID_ARX188           0x16C
+#define SOC_ID_ARX168           0x16D
+#define SOC_ID_ARX182           0x16F
+
+/* SoC Types */
+#define SOC_TYPE_DANUBE         0x01
+#define SOC_TYPE_TWINPASS       0x02
+#define SOC_TYPE_AR9            0x03
+#define SOC_TYPE_VR9            0x04
+#define SOC_TYPE_AMAZON_SE      0x05
+
+/* ASC0/1 - serial port */
+#define LTQ_ASC0_BASE_ADDR      0x1E100400
+#define LTQ_ASC1_BASE_ADDR      0x1E100C00
+#define LTQ_ASC_SIZE            0x400
+
+/* RCU - reset control unit */
+#define LTQ_RCU_BASE_ADDR       0x1F203000
+#define LTQ_RCU_SIZE            0x1000
+
+/* GPTU - general purpose timer unit */
+#define LTQ_GPTU_BASE_ADDR      0x18000300
+#define LTQ_GPTU_SIZE           0x100
+
+/* EBU - external bus unit */
+#define LTQ_EBU_GPIO_START      0x14000000
+#define LTQ_EBU_GPIO_SIZE       0x1000
+
+#define LTQ_EBU_BASE_ADDR       0x1E105300
+#define LTQ_EBU_SIZE            0x100
+
+#define LTQ_EBU_BUSCON0         0x0060
+#define LTQ_EBU_PCC_CON         0x0090
+#define LTQ_EBU_PCC_IEN         0x00A4
+#define LTQ_EBU_PCC_ISTAT       0x00A0
+#define LTQ_EBU_BUSCON1         0x0064
+#define LTQ_EBU_ADDRSEL1        0x0024
+#define EBU_WRDIS               0x80000000
+
+/* CGU - clock generation unit */
+#define LTQ_CGU_BASE_ADDR       0x1F103000
+#define LTQ_CGU_SIZE            0x1000
+
+/* ICU - interrupt control unit */
+#define LTQ_ICU_BASE_ADDR       0x1F880200
+#define LTQ_ICU_SIZE            0x100
+
+/* EIU - external interrupt unit */
+#define LTQ_EIU_BASE_ADDR       0x1F101000
+#define LTQ_EIU_SIZE            0x1000
+
+/* PMU - power management unit */
+#define LTQ_PMU_BASE_ADDR       0x1F102000
+#define LTQ_PMU_SIZE            0x1000
+
+#define PMU_DMA                 0x0020
+#define PMU_USB                 0x8041
+#define PMU_LED                 0x0800
+#define PMU_GPT                 0x1000
+#define PMU_PPE                 0x2000
+#define PMU_FPI                 0x4000
+#define PMU_SWITCH              0x10000000
+
+/* ETOP - ethernet */
+#define LTQ_ETOP_BASE_ADDR      0x1E180000
+#define LTQ_ETOP_SIZE           0x40000
+
+/* DMA */
+#define LTQ_DMA_BASE_ADDR       0x1E104100
+#define LTQ_DMA_SIZE            0x800
+
+/* PCI */
+#define PCI_CR_BASE_ADDR        0x1E105400
+#define PCI_CR_SIZE             0x400
+
+/* WDT */
+#define LTQ_WDT_BASE_ADDR       0x1F8803F0
+#define LTQ_WDT_SIZE            0x10
+
+/* STP - serial to parallel conversion unit */
+#define LTQ_STP_BASE_ADDR       0x1E100BB0
+#define LTQ_STP_SIZE            0x40
+
+/* GPIO */
+#define LTQ_GPIO0_BASE_ADDR     0x1E100B10
+#define LTQ_GPIO1_BASE_ADDR     0x1E100B40
+#define LTQ_GPIO2_BASE_ADDR     0x1E100B70
+#define LTQ_GPIO_SIZE           0x30
+
+/* SSC */
+#define LTQ_SSC_BASE_ADDR       0x1e100800
+#define LTQ_SSC_SIZE            0x100
+
+/* MEI - dsl core */
+#define LTQ_MEI_BASE_ADDR       0x1E116000
+
+/* DEU - data encryption unit */
+#define LTQ_DEU_BASE_ADDR       0x1E103100
+
+/* MPS - multi processor unit (voice) */
+#define LTQ_MPS_BASE_ADDR       (KSEG1 + 0x1F107000)
+#define LTQ_MPS_CHIPID          ((u32 *)(LTQ_MPS_BASE_ADDR + 0x0344))
+
+/* request a non-gpio and set the PIO config */
+extern int  ltq_gpio_request(unsigned int pin, unsigned int alt0,
+        unsigned int alt1, unsigned int dir, const char *name);
+extern void ltq_pmu_enable(unsigned int module);
+extern void ltq_pmu_disable(unsigned int module);
+
+static inline int ltq_is_ar9(void)
+{
+        return (ltq_get_soc_type() == SOC_TYPE_AR9);
+}
+
+static inline int ltq_is_vr9(void)
+{
+        return (ltq_get_soc_type() == SOC_TYPE_VR9);
+}
+
+#endif /* CONFIG_SOC_TYPE_XWAY */
+#endif /* _LTQ_XWAY_H__ */
diff --git a/arch/mips/include/asm/mach-lantiq/xway/xway_dma.h b/arch/mips/include/asm/mach-lantiq/xway/xway_dma.h
new file mode 100644
index 000000000000..872943a4b90e
--- /dev/null
+++ b/arch/mips/include/asm/mach-lantiq/xway/xway_dma.h
@@ -0,0 +1,60 @@
+/*
+ *   This program is free software; you can redistribute it and/or modify it
+ *   under the terms of the GNU General Public License version 2 as published
+ *   by the Free Software Foundation.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
+ *
+ *   Copyright (C) 2011 John Crispin <blogic@openwrt.org>
+ */
+
+#ifndef LTQ_DMA_H__
+#define LTQ_DMA_H__
+
+#define LTQ_DESC_SIZE           0x08    /* each descriptor is 64bit */
+#define LTQ_DESC_NUM            0x40    /* 64 descriptors / channel */
+
+#define LTQ_DMA_OWN             BIT(31) /* owner bit */
+#define LTQ_DMA_C               BIT(30) /* complete bit */
+#define LTQ_DMA_SOP             BIT(29) /* start of packet */
+#define LTQ_DMA_EOP             BIT(28) /* end of packet */
+#define LTQ_DMA_TX_OFFSET(x)    ((x & 0x1f) << 23) /* data bytes offset */
+#define LTQ_DMA_RX_OFFSET(x)    ((x & 0x7) << 23) /* data bytes offset */
+#define LTQ_DMA_SIZE_MASK       (0xffff) /* the size field is 16 bit */
+
+struct ltq_dma_desc {
+        u32 ctl;
+        u32 addr;
+};
+
+struct ltq_dma_channel {
+        int nr;                         /* the channel number */
+        int irq;                        /* the mapped irq */
+        int desc;                       /* the current descriptor */
+        struct ltq_dma_desc *desc_base; /* the descriptor base */
+        int phys;                       /* physical addr */
+};
+
+enum {
+        DMA_PORT_ETOP = 0,
+        DMA_PORT_DEU,
+};
+
+extern void ltq_dma_enable_irq(struct ltq_dma_channel *ch);
+extern void ltq_dma_disable_irq(struct ltq_dma_channel *ch);
+extern void ltq_dma_ack_irq(struct ltq_dma_channel *ch);
+extern void ltq_dma_open(struct ltq_dma_channel *ch);
+extern void ltq_dma_close(struct ltq_dma_channel *ch);
+extern void ltq_dma_alloc_tx(struct ltq_dma_channel *ch);
+extern void ltq_dma_alloc_rx(struct ltq_dma_channel *ch);
+extern void ltq_dma_free(struct ltq_dma_channel *ch);
+extern void ltq_dma_init_port(int p);
+
+#endif
diff --git a/arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h b/arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h
new file mode 100644
index 000000000000..3b728275b9b0
--- /dev/null
+++ b/arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h
@@ -0,0 +1,47 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2011 Netlogic Microsystems
+ * Copyright (C) 2003 Ralf Baechle
+ */
+#ifndef __ASM_MACH_NETLOGIC_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_NETLOGIC_CPU_FEATURE_OVERRIDES_H
+
+#define cpu_has_4kex            1
+#define cpu_has_4k_cache        1
+#define cpu_has_watch           1
+#define cpu_has_mips16          0
+#define cpu_has_counter         1
+#define cpu_has_divec           1
+#define cpu_has_vce             0
+#define cpu_has_cache_cdex_p    0
+#define cpu_has_cache_cdex_s    0
+#define cpu_has_prefetch        1
+#define cpu_has_mcheck          1
+#define cpu_has_ejtag           1
+
+#define cpu_has_llsc            1
+#define cpu_has_vtag_icache     0
+#define cpu_has_dc_aliases      0
+#define cpu_has_ic_fills_f_dc   0
+#define cpu_has_dsp             0
+#define cpu_has_mipsmt          0
+#define cpu_has_userlocal       0
+#define cpu_icache_snoops_remote_store  0
+
+#define cpu_has_nofpuex         0
+#define cpu_has_64bits          1
+
+#define cpu_has_mips32r1        1
+#define cpu_has_mips32r2        0
+#define cpu_has_mips64r1        1
+#define cpu_has_mips64r2        0
+
+#define cpu_has_inclusive_pcaches       0
+
+#define cpu_dcache_line_size()  32
+#define cpu_icache_line_size()  32
+
+#endif /* __ASM_MACH_NETLOGIC_CPU_FEATURE_OVERRIDES_H */
diff --git a/arch/mips/include/asm/mach-netlogic/irq.h b/arch/mips/include/asm/mach-netlogic/irq.h
new file mode 100644
index 000000000000..b5902458e7c1
--- /dev/null
+++ b/arch/mips/include/asm/mach-netlogic/irq.h
@@ -0,0 +1,14 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2011 Netlogic Microsystems.
+ */
+#ifndef __ASM_NETLOGIC_IRQ_H
+#define __ASM_NETLOGIC_IRQ_H
+
+#define NR_IRQS                 64
+#define MIPS_CPU_IRQ_BASE       0
+
+#endif /* __ASM_NETLOGIC_IRQ_H */
diff --git a/arch/mips/include/asm/mach-netlogic/war.h b/arch/mips/include/asm/mach-netlogic/war.h
new file mode 100644
index 000000000000..22da89327352
--- /dev/null
+++ b/arch/mips/include/asm/mach-netlogic/war.h
@@ -0,0 +1,26 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2011 Netlogic Microsystems.
+ * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
+ */
+#ifndef __ASM_MIPS_MACH_NLM_WAR_H
+#define __ASM_MIPS_MACH_NLM_WAR_H
+
+#define R4600_V1_INDEX_ICACHEOP_WAR     0
+#define R4600_V1_HIT_CACHEOP_WAR        0
+#define R4600_V2_HIT_CACHEOP_WAR        0
+#define R5432_CP0_INTERRUPT_WAR         0
+#define BCM1250_M3_WAR                  0
+#define SIBYTE_1956_WAR                 0
+#define MIPS4K_ICACHE_REFILL_WAR        0
+#define MIPS_CACHE_SYNC_WAR             0
+#define TX49XX_ICACHE_INDEX_INV_WAR     0
+#define RM9000_CDEX_SMP_WAR             0
+#define ICACHE_REFILLS_WORKAROUND_WAR   0
+#define R10000_LLSC_WAR                 0
+#define MIPS34K_MISSED_ITLB_WAR         0
+
+#endif /* __ASM_MIPS_MACH_NLM_WAR_H */
diff --git a/arch/mips/include/asm/module.h b/arch/mips/include/asm/module.h
index d94085a3eafb..bc01a02cacd8 100644
--- a/arch/mips/include/asm/module.h
+++ b/arch/mips/include/asm/module.h
@@ -118,6 +118,8 @@ search_module_dbetables(unsigned long addr)
 #define MODULE_PROC_FAMILY "LOONGSON2 "
 #elif defined CONFIG_CPU_CAVIUM_OCTEON
 #define MODULE_PROC_FAMILY "OCTEON "
+#elif defined CONFIG_CPU_XLR
+#define MODULE_PROC_FAMILY "XLR "
 #else
 #error MODULE_PROC_FAMILY undefined for your processor configuration
 #endif
diff --git a/arch/mips/include/asm/netlogic/interrupt.h b/arch/mips/include/asm/netlogic/interrupt.h
new file mode 100644
index 000000000000..a85aadb6cfd7
--- /dev/null
+++ b/arch/mips/include/asm/netlogic/interrupt.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
+ * reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the NetLogic
+ * license below:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _ASM_NLM_INTERRUPT_H
+#define _ASM_NLM_INTERRUPT_H
+
+/* Defines for the IRQ numbers */
+
+#define IRQ_IPI_SMP_FUNCTION    3
+#define IRQ_IPI_SMP_RESCHEDULE  4
+#define IRQ_MSGRING             6
+#define IRQ_TIMER               7
+
+#endif
diff --git a/arch/mips/include/asm/netlogic/mips-extns.h b/arch/mips/include/asm/netlogic/mips-extns.h
new file mode 100644
index 000000000000..8c53d0ba4bf2
--- /dev/null
+++ b/arch/mips/include/asm/netlogic/mips-extns.h
@@ -0,0 +1,76 @@
+/*
+ * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
+ * reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the NetLogic
+ * license below:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _ASM_NLM_MIPS_EXTS_H
+#define _ASM_NLM_MIPS_EXTS_H
+
+/*
+ * XLR and XLP interrupt request and interrupt mask registers
+ */
+#define read_c0_eirr()          __read_64bit_c0_register($9, 6)
+#define read_c0_eimr()          __read_64bit_c0_register($9, 7)
+#define write_c0_eirr(val)      __write_64bit_c0_register($9, 6, val)
+
+/*
+ * Writing EIMR in 32 bit is a special case, the lower 8 bit of the
+ * EIMR is shadowed in the status register, so we cannot save and
+ * restore status register for split read.
+ */
+#define write_c0_eimr(val)                                              \
+do {                                                                    \
+        if (sizeof(unsigned long) == 4) {                               \
+                unsigned long __flags;                                  \
+                                                                        \
+                local_irq_save(__flags);                                \
+                __asm__ __volatile__(                                   \
+                        ".set\tmips64\n\t"                              \
+                        "dsll\t%L0, %L0, 32\n\t"                        \
+                        "dsrl\t%L0, %L0, 32\n\t"                        \
+                        "dsll\t%M0, %M0, 32\n\t"                        \
+                        "or\t%L0, %L0, %M0\n\t"                         \
+                        "dmtc0\t%L0, $9, 7\n\t"                         \
+                        ".set\tmips0"                                   \
+                        : : "r" (val));                                 \
+                __flags = (__flags & 0xffff00ff) | (((val) & 0xff) << 8);\
+                local_irq_restore(__flags);                             \
+        } else                                                          \
+                __write_64bit_c0_register($9, 7, (val));                \
+} while (0)
+
+static inline int hard_smp_processor_id(void)
+{
+        return __read_32bit_c0_register($15, 1) & 0x3ff;
+}
+
+#endif /*_ASM_NLM_MIPS_EXTS_H */
diff --git a/arch/mips/include/asm/netlogic/psb-bootinfo.h b/arch/mips/include/asm/netlogic/psb-bootinfo.h
new file mode 100644
index 000000000000..6878307f0ee6
--- /dev/null
+++ b/arch/mips/include/asm/netlogic/psb-bootinfo.h
@@ -0,0 +1,109 @@
+/*
+ * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
+ * reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the NetLogic
+ * license below:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _ASM_NETLOGIC_BOOTINFO_H
+#define _ASM_NETLOGIC_BOOTINFO_H
+
+struct psb_info {
+        uint64_t boot_level;
+        uint64_t io_base;
+        uint64_t output_device;
+        uint64_t uart_print;
+        uint64_t led_output;
+        uint64_t init;
+        uint64_t exit;
+        uint64_t warm_reset;
+        uint64_t wakeup;
+        uint64_t online_cpu_map;
+        uint64_t master_reentry_sp;
+        uint64_t master_reentry_gp;
+        uint64_t master_reentry_fn;
+        uint64_t slave_reentry_fn;
+        uint64_t magic_dword;
+        uint64_t uart_putchar;
+        uint64_t size;
+        uint64_t uart_getchar;
+        uint64_t nmi_handler;
+        uint64_t psb_version;
+        uint64_t mac_addr;
+        uint64_t cpu_frequency;
+        uint64_t board_version;
+        uint64_t malloc;
+        uint64_t free;
+        uint64_t global_shmem_addr;
+        uint64_t global_shmem_size;
+        uint64_t psb_os_cpu_map;
+        uint64_t userapp_cpu_map;
+        uint64_t wakeup_os;
+        uint64_t psb_mem_map;
+        uint64_t board_major_version;
+        uint64_t board_minor_version;
+        uint64_t board_manf_revision;
+        uint64_t board_serial_number;
+        uint64_t psb_physaddr_map;
+        uint64_t xlr_loaderip_config;
+        uint64_t bldr_envp;
+        uint64_t avail_mem_map;
+};
+
+enum {
+        NETLOGIC_IO_SPACE = 0x10,
+        PCIX_IO_SPACE,
+        PCIX_CFG_SPACE,
+        PCIX_MEMORY_SPACE,
+        HT_IO_SPACE,
+        HT_CFG_SPACE,
+        HT_MEMORY_SPACE,
+        SRAM_SPACE,
+        FLASH_CONTROLLER_SPACE
+};
+
+#define NLM_MAX_ARGS    64
+#define NLM_MAX_ENVS    32
+
+/* This is what netlboot passes and linux boot_mem_map is subtly different */
+#define NLM_BOOT_MEM_MAP_MAX    32
+struct nlm_boot_mem_map {
+        int nr_map;
+        struct nlm_boot_mem_map_entry {
+                uint64_t addr;          /* start of memory segment */
+                uint64_t size;          /* size of memory segment */
+                uint32_t type;          /* type of memory segment */
+        } map[NLM_BOOT_MEM_MAP_MAX];
+};
+
+/* Pointer to saved boot loader info */
+extern struct psb_info nlm_prom_info;
+
+#endif
diff --git a/arch/mips/include/asm/netlogic/xlr/gpio.h b/arch/mips/include/asm/netlogic/xlr/gpio.h
new file mode 100644
index 000000000000..51f6ad4aeb14
--- /dev/null
+++ b/arch/mips/include/asm/netlogic/xlr/gpio.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
+ * reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the NetLogic
+ * license below:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _ASM_NLM_GPIO_H
+#define _ASM_NLM_GPIO_H
+
+#define NETLOGIC_GPIO_INT_EN_REG                0
+#define NETLOGIC_GPIO_INPUT_INVERSION_REG       1
+#define NETLOGIC_GPIO_IO_DIR_REG                2
+#define NETLOGIC_GPIO_IO_DATA_WR_REG            3
+#define NETLOGIC_GPIO_IO_DATA_RD_REG            4
+
+#define NETLOGIC_GPIO_SWRESET_REG               8
+#define NETLOGIC_GPIO_DRAM1_CNTRL_REG           9
+#define NETLOGIC_GPIO_DRAM1_RATIO_REG           10
+#define NETLOGIC_GPIO_DRAM1_RESET_REG           11
+#define NETLOGIC_GPIO_DRAM1_STATUS_REG          12
+#define NETLOGIC_GPIO_DRAM2_CNTRL_REG           13
+#define NETLOGIC_GPIO_DRAM2_RATIO_REG           14
+#define NETLOGIC_GPIO_DRAM2_RESET_REG           15
+#define NETLOGIC_GPIO_DRAM2_STATUS_REG          16
+
+#define NETLOGIC_GPIO_PWRON_RESET_CFG_REG       21
+#define NETLOGIC_GPIO_BIST_ALL_GO_STATUS_REG    24
+#define NETLOGIC_GPIO_BIST_CPU_GO_STATUS_REG    25
+#define NETLOGIC_GPIO_BIST_DEV_GO_STATUS_REG    26
+
+#define NETLOGIC_GPIO_FUSE_BANK_REG             35
+#define NETLOGIC_GPIO_CPU_RESET_REG             40
+#define NETLOGIC_GPIO_RNG_REG                   43
+
+#define NETLOGIC_PWRON_RESET_PCMCIA_BOOT        17
+#define NETLOGIC_GPIO_LED_BITMAP        0x1700000
+#define NETLOGIC_GPIO_LED_0_SHIFT               20
+#define NETLOGIC_GPIO_LED_1_SHIFT               24
+
+#define NETLOGIC_GPIO_LED_OUTPUT_CODE_RESET     0x01
+#define NETLOGIC_GPIO_LED_OUTPUT_CODE_HARD_RESET 0x02
+#define NETLOGIC_GPIO_LED_OUTPUT_CODE_SOFT_RESET 0x03
+#define NETLOGIC_GPIO_LED_OUTPUT_CODE_MAIN      0x04
+
+#endif
diff --git a/arch/mips/include/asm/netlogic/xlr/iomap.h b/arch/mips/include/asm/netlogic/xlr/iomap.h
new file mode 100644
index 000000000000..2e3a4dd53045
--- /dev/null
+++ b/arch/mips/include/asm/netlogic/xlr/iomap.h
@@ -0,0 +1,131 @@
+/*
+ * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
+ * reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the NetLogic
+ * license below:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _ASM_NLM_IOMAP_H
+#define _ASM_NLM_IOMAP_H
+
+#define DEFAULT_NETLOGIC_IO_BASE           CKSEG1ADDR(0x1ef00000)
+#define NETLOGIC_IO_DDR2_CHN0_OFFSET       0x01000
+#define NETLOGIC_IO_DDR2_CHN1_OFFSET       0x02000
+#define NETLOGIC_IO_DDR2_CHN2_OFFSET       0x03000
+#define NETLOGIC_IO_DDR2_CHN3_OFFSET       0x04000
+#define NETLOGIC_IO_PIC_OFFSET             0x08000
+#define NETLOGIC_IO_UART_0_OFFSET          0x14000
+#define NETLOGIC_IO_UART_1_OFFSET          0x15100
+
+#define NETLOGIC_IO_SIZE                   0x1000
+
+#define NETLOGIC_IO_BRIDGE_OFFSET          0x00000
+
+#define NETLOGIC_IO_RLD2_CHN0_OFFSET       0x05000
+#define NETLOGIC_IO_RLD2_CHN1_OFFSET       0x06000
+
+#define NETLOGIC_IO_SRAM_OFFSET            0x07000
+
+#define NETLOGIC_IO_PCIX_OFFSET            0x09000
+#define NETLOGIC_IO_HT_OFFSET              0x0A000
+
+#define NETLOGIC_IO_SECURITY_OFFSET        0x0B000
+
+#define NETLOGIC_IO_GMAC_0_OFFSET          0x0C000
+#define NETLOGIC_IO_GMAC_1_OFFSET          0x0D000
+#define NETLOGIC_IO_GMAC_2_OFFSET          0x0E000
+#define NETLOGIC_IO_GMAC_3_OFFSET          0x0F000
+
+/* XLS devices */
+#define NETLOGIC_IO_GMAC_4_OFFSET          0x20000
+#define NETLOGIC_IO_GMAC_5_OFFSET          0x21000
+#define NETLOGIC_IO_GMAC_6_OFFSET          0x22000
+#define NETLOGIC_IO_GMAC_7_OFFSET          0x23000
+
+#define NETLOGIC_IO_PCIE_0_OFFSET          0x1E000
+#define NETLOGIC_IO_PCIE_1_OFFSET          0x1F000
+#define NETLOGIC_IO_SRIO_0_OFFSET          0x1E000
+#define NETLOGIC_IO_SRIO_1_OFFSET          0x1F000
+
+#define NETLOGIC_IO_USB_0_OFFSET           0x24000
+#define NETLOGIC_IO_USB_1_OFFSET           0x25000
+
+#define NETLOGIC_IO_COMP_OFFSET            0x1D000
+/* end XLS devices */
+
+/* XLR devices */
+#define NETLOGIC_IO_SPI4_0_OFFSET          0x10000
+#define NETLOGIC_IO_XGMAC_0_OFFSET         0x11000
+#define NETLOGIC_IO_SPI4_1_OFFSET          0x12000
+#define NETLOGIC_IO_XGMAC_1_OFFSET         0x13000
+/* end XLR devices */
+
+#define NETLOGIC_IO_I2C_0_OFFSET           0x16000
+#define NETLOGIC_IO_I2C_1_OFFSET           0x17000
+
+#define NETLOGIC_IO_GPIO_OFFSET            0x18000
+#define NETLOGIC_IO_FLASH_OFFSET           0x19000
+#define NETLOGIC_IO_TB_OFFSET              0x1C000
+
+#define NETLOGIC_CPLD_OFFSET               KSEG1ADDR(0x1d840000)
+
+/*
+ * Base Address (Virtual) of the PCI Config address space
+ * For now, choose 256M phys in kseg1 = 0xA0000000 + (1<<28)
+ * Config space spans 256 (num of buses) * 256 (num functions) * 256 bytes
+ * ie 1<<24 = 16M
+ */
+#define DEFAULT_PCI_CONFIG_BASE         0x18000000
+#define DEFAULT_HT_TYPE0_CFG_BASE       0x16000000
+#define DEFAULT_HT_TYPE1_CFG_BASE       0x17000000
+
+#ifndef __ASSEMBLY__
+#include <linux/types.h>
+#include <asm/byteorder.h>
+
+typedef volatile __u32 nlm_reg_t;
+extern unsigned long netlogic_io_base;
+
+/* FIXME read once in write_reg */
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
+#define netlogic_read_reg(base, offset)         ((base)[(offset)])
+#define netlogic_write_reg(base, offset, value) ((base)[(offset)] = (value))
+#else
+#define netlogic_read_reg(base, offset)         (be32_to_cpu((base)[(offset)]))
+#define netlogic_write_reg(base, offset, value) \
+                                ((base)[(offset)] = cpu_to_be32((value)))
+#endif
+
+#define netlogic_read_reg_le32(base, offset) (le32_to_cpu((base)[(offset)]))
+#define netlogic_write_reg_le32(base, offset, value) \
+                                ((base)[(offset)] = cpu_to_le32((value)))
+#define netlogic_io_mmio(offset) ((nlm_reg_t *)(netlogic_io_base+(offset)))
+#endif /* __ASSEMBLY__ */
+#endif
diff --git a/arch/mips/include/asm/netlogic/xlr/pic.h b/arch/mips/include/asm/netlogic/xlr/pic.h
new file mode 100644
index 000000000000..5cceb746f080
--- /dev/null
+++ b/arch/mips/include/asm/netlogic/xlr/pic.h
@@ -0,0 +1,231 @@
+/*
+ * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
+ * reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the NetLogic
+ * license below:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _ASM_NLM_XLR_PIC_H
+#define _ASM_NLM_XLR_PIC_H
+
+#define PIC_CLKS_PER_SEC                66666666ULL
+/* PIC hardware interrupt numbers */
+#define PIC_IRT_WD_INDEX                0
+#define PIC_IRT_TIMER_0_INDEX           1
+#define PIC_IRT_TIMER_1_INDEX           2
+#define PIC_IRT_TIMER_2_INDEX           3
+#define PIC_IRT_TIMER_3_INDEX           4
+#define PIC_IRT_TIMER_4_INDEX           5
+#define PIC_IRT_TIMER_5_INDEX           6
+#define PIC_IRT_TIMER_6_INDEX           7
+#define PIC_IRT_TIMER_7_INDEX           8
+#define PIC_IRT_CLOCK_INDEX             PIC_IRT_TIMER_7_INDEX
+#define PIC_IRT_UART_0_INDEX            9
+#define PIC_IRT_UART_1_INDEX            10
+#define PIC_IRT_I2C_0_INDEX             11
+#define PIC_IRT_I2C_1_INDEX             12
+#define PIC_IRT_PCMCIA_INDEX            13
+#define PIC_IRT_GPIO_INDEX              14
+#define PIC_IRT_HYPER_INDEX             15
+#define PIC_IRT_PCIX_INDEX              16
+/* XLS */
+#define PIC_IRT_CDE_INDEX               15
+#define PIC_IRT_BRIDGE_TB_XLS_INDEX     16
+/* XLS */
+#define PIC_IRT_GMAC0_INDEX             17
+#define PIC_IRT_GMAC1_INDEX             18
+#define PIC_IRT_GMAC2_INDEX             19
+#define PIC_IRT_GMAC3_INDEX             20
+#define PIC_IRT_XGS0_INDEX              21
+#define PIC_IRT_XGS1_INDEX              22
+#define PIC_IRT_HYPER_FATAL_INDEX       23
+#define PIC_IRT_PCIX_FATAL_INDEX        24
+#define PIC_IRT_BRIDGE_AERR_INDEX       25
+#define PIC_IRT_BRIDGE_BERR_INDEX       26
+#define PIC_IRT_BRIDGE_TB_XLR_INDEX     27
+#define PIC_IRT_BRIDGE_AERR_NMI_INDEX   28
+/* XLS */
+#define PIC_IRT_GMAC4_INDEX             21
+#define PIC_IRT_GMAC5_INDEX             22
+#define PIC_IRT_GMAC6_INDEX             23
+#define PIC_IRT_GMAC7_INDEX             24
+#define PIC_IRT_BRIDGE_ERR_INDEX        25
+#define PIC_IRT_PCIE_LINK0_INDEX        26
+#define PIC_IRT_PCIE_LINK1_INDEX        27
+#define PIC_IRT_PCIE_LINK2_INDEX        23
+#define PIC_IRT_PCIE_LINK3_INDEX        24
+#define PIC_IRT_PCIE_XLSB0_LINK2_INDEX  28
+#define PIC_IRT_PCIE_XLSB0_LINK3_INDEX  29
+#define PIC_IRT_SRIO_LINK0_INDEX        26
+#define PIC_IRT_SRIO_LINK1_INDEX        27
+#define PIC_IRT_SRIO_LINK2_INDEX        28
+#define PIC_IRT_SRIO_LINK3_INDEX        29
+#define PIC_IRT_PCIE_INT_INDEX          28
+#define PIC_IRT_PCIE_FATAL_INDEX        29
+#define PIC_IRT_GPIO_B_INDEX            30
+#define PIC_IRT_USB_INDEX               31
+/* XLS */
+#define PIC_NUM_IRTS                    32
+
+
+#define PIC_CLOCK_TIMER                 7
+
+/* PIC Registers */
+#define PIC_CTRL                        0x00
+#define PIC_IPI                         0x04
+#define PIC_INT_ACK                     0x06
+
+#define WD_MAX_VAL_0                    0x08
+#define WD_MAX_VAL_1                    0x09
+#define WD_MASK_0                       0x0a
+#define WD_MASK_1                       0x0b
+#define WD_HEARBEAT_0                   0x0c
+#define WD_HEARBEAT_1                   0x0d
+
+#define PIC_IRT_0_BASE                  0x40
+#define PIC_IRT_1_BASE                  0x80
+#define PIC_TIMER_MAXVAL_0_BASE         0x100
+#define PIC_TIMER_MAXVAL_1_BASE         0x110
+#define PIC_TIMER_COUNT_0_BASE          0x120
+#define PIC_TIMER_COUNT_1_BASE          0x130
+
+#define PIC_IRT_0(picintr)      (PIC_IRT_0_BASE + (picintr))
+#define PIC_IRT_1(picintr)      (PIC_IRT_1_BASE + (picintr))
+
+#define PIC_TIMER_MAXVAL_0(i)   (PIC_TIMER_MAXVAL_0_BASE + (i))
+#define PIC_TIMER_MAXVAL_1(i)   (PIC_TIMER_MAXVAL_1_BASE + (i))
+#define PIC_TIMER_COUNT_0(i)    (PIC_TIMER_COUNT_0_BASE + (i))
+#define PIC_TIMER_COUNT_1(i)    (PIC_TIMER_COUNT_0_BASE + (i))
+
+/*
+ * Mapping between hardware interrupt numbers and IRQs on CPU
+ * we use a simple scheme to map PIC interrupts 0-31 to IRQs
+ * 8-39. This leaves the IRQ 0-7 for cpu interrupts like
+ * count/compare and FMN
+ */
+#define PIC_IRQ_BASE            8
+#define PIC_INTR_TO_IRQ(i)      (PIC_IRQ_BASE + (i))
+#define PIC_IRQ_TO_INTR(i)      ((i) - PIC_IRQ_BASE)
+
+#define PIC_IRT_FIRST_IRQ       PIC_IRQ_BASE
+#define PIC_WD_IRQ              PIC_INTR_TO_IRQ(PIC_IRT_WD_INDEX)
+#define PIC_TIMER_0_IRQ         PIC_INTR_TO_IRQ(PIC_IRT_TIMER_0_INDEX)
+#define PIC_TIMER_1_IRQ         PIC_INTR_TO_IRQ(PIC_IRT_TIMER_1_INDEX)
+#define PIC_TIMER_2_IRQ         PIC_INTR_TO_IRQ(PIC_IRT_TIMER_2_INDEX)
+#define PIC_TIMER_3_IRQ         PIC_INTR_TO_IRQ(PIC_IRT_TIMER_3_INDEX)
+#define PIC_TIMER_4_IRQ         PIC_INTR_TO_IRQ(PIC_IRT_TIMER_4_INDEX)
+#define PIC_TIMER_5_IRQ         PIC_INTR_TO_IRQ(PIC_IRT_TIMER_5_INDEX)
+#define PIC_TIMER_6_IRQ         PIC_INTR_TO_IRQ(PIC_IRT_TIMER_6_INDEX)
+#define PIC_TIMER_7_IRQ         PIC_INTR_TO_IRQ(PIC_IRT_TIMER_7_INDEX)
+#define PIC_CLOCK_IRQ           (PIC_TIMER_7_IRQ)
+#define PIC_UART_0_IRQ          PIC_INTR_TO_IRQ(PIC_IRT_UART_0_INDEX)
+#define PIC_UART_1_IRQ          PIC_INTR_TO_IRQ(PIC_IRT_UART_1_INDEX)
+#define PIC_I2C_0_IRQ           PIC_INTR_TO_IRQ(PIC_IRT_I2C_0_INDEX)
+#define PIC_I2C_1_IRQ           PIC_INTR_TO_IRQ(PIC_IRT_I2C_1_INDEX)
+#define PIC_PCMCIA_IRQ          PIC_INTR_TO_IRQ(PIC_IRT_PCMCIA_INDEX)
+#define PIC_GPIO_IRQ            PIC_INTR_TO_IRQ(PIC_IRT_GPIO_INDEX)
+#define PIC_HYPER_IRQ           PIC_INTR_TO_IRQ(PIC_IRT_HYPER_INDEX)
+#define PIC_PCIX_IRQ            PIC_INTR_TO_IRQ(PIC_IRT_PCIX_INDEX)
+/* XLS */
+#define PIC_CDE_IRQ             PIC_INTR_TO_IRQ(PIC_IRT_CDE_INDEX)
+#define PIC_BRIDGE_TB_XLS_IRQ   PIC_INTR_TO_IRQ(PIC_IRT_BRIDGE_TB_XLS_INDEX)
+/* end XLS */
+#define PIC_GMAC_0_IRQ          PIC_INTR_TO_IRQ(PIC_IRT_GMAC0_INDEX)
+#define PIC_GMAC_1_IRQ          PIC_INTR_TO_IRQ(PIC_IRT_GMAC1_INDEX)
+#define PIC_GMAC_2_IRQ          PIC_INTR_TO_IRQ(PIC_IRT_GMAC2_INDEX)
+#define PIC_GMAC_3_IRQ          PIC_INTR_TO_IRQ(PIC_IRT_GMAC3_INDEX)
+#define PIC_XGS_0_IRQ           PIC_INTR_TO_IRQ(PIC_IRT_XGS0_INDEX)
+#define PIC_XGS_1_IRQ           PIC_INTR_TO_IRQ(PIC_IRT_XGS1_INDEX)
+#define PIC_HYPER_FATAL_IRQ     PIC_INTR_TO_IRQ(PIC_IRT_HYPER_FATAL_INDEX)
+#define PIC_PCIX_FATAL_IRQ      PIC_INTR_TO_IRQ(PIC_IRT_PCIX_FATAL_INDEX)
+#define PIC_BRIDGE_AERR_IRQ     PIC_INTR_TO_IRQ(PIC_IRT_BRIDGE_AERR_INDEX)
+#define PIC_BRIDGE_BERR_IRQ     PIC_INTR_TO_IRQ(PIC_IRT_BRIDGE_BERR_INDEX)
+#define PIC_BRIDGE_TB_XLR_IRQ   PIC_INTR_TO_IRQ(PIC_IRT_BRIDGE_TB_XLR_INDEX)
+#define PIC_BRIDGE_AERR_NMI_IRQ PIC_INTR_TO_IRQ(PIC_IRT_BRIDGE_AERR_NMI_INDEX)
+/* XLS defines */
+#define PIC_GMAC_4_IRQ          PIC_INTR_TO_IRQ(PIC_IRT_GMAC4_INDEX)
+#define PIC_GMAC_5_IRQ          PIC_INTR_TO_IRQ(PIC_IRT_GMAC5_INDEX)
+#define PIC_GMAC_6_IRQ          PIC_INTR_TO_IRQ(PIC_IRT_GMAC6_INDEX)
+#define PIC_GMAC_7_IRQ          PIC_INTR_TO_IRQ(PIC_IRT_GMAC7_INDEX)
+#define PIC_BRIDGE_ERR_IRQ      PIC_INTR_TO_IRQ(PIC_IRT_BRIDGE_ERR_INDEX)
+#define PIC_PCIE_LINK0_IRQ      PIC_INTR_TO_IRQ(PIC_IRT_PCIE_LINK0_INDEX)
+#define PIC_PCIE_LINK1_IRQ      PIC_INTR_TO_IRQ(PIC_IRT_PCIE_LINK1_INDEX)
+#define PIC_PCIE_LINK2_IRQ      PIC_INTR_TO_IRQ(PIC_IRT_PCIE_LINK2_INDEX)
+#define PIC_PCIE_LINK3_IRQ      PIC_INTR_TO_IRQ(PIC_IRT_PCIE_LINK3_INDEX)
+#define PIC_PCIE_XLSB0_LINK2_IRQ PIC_INTR_TO_IRQ(PIC_IRT_PCIE_XLSB0_LINK2_INDEX)
+#define PIC_PCIE_XLSB0_LINK3_IRQ PIC_INTR_TO_IRQ(PIC_IRT_PCIE_XLSB0_LINK3_INDEX)
+#define PIC_SRIO_LINK0_IRQ      PIC_INTR_TO_IRQ(PIC_IRT_SRIO_LINK0_INDEX)
+#define PIC_SRIO_LINK1_IRQ      PIC_INTR_TO_IRQ(PIC_IRT_SRIO_LINK1_INDEX)
+#define PIC_SRIO_LINK2_IRQ      PIC_INTR_TO_IRQ(PIC_IRT_SRIO_LINK2_INDEX)
+#define PIC_SRIO_LINK3_IRQ      PIC_INTR_TO_IRQ(PIC_IRT_SRIO_LINK3_INDEX)
+#define PIC_PCIE_INT_IRQ        PIC_INTR_TO_IRQ(PIC_IRT_PCIE_INT__INDEX)
+#define PIC_PCIE_FATAL_IRQ      PIC_INTR_TO_IRQ(PIC_IRT_PCIE_FATAL_INDEX)
+#define PIC_GPIO_B_IRQ          PIC_INTR_TO_IRQ(PIC_IRT_GPIO_B_INDEX)
+#define PIC_USB_IRQ             PIC_INTR_TO_IRQ(PIC_IRT_USB_INDEX)
+#define PIC_IRT_LAST_IRQ        PIC_USB_IRQ
+/* end XLS */
+
+#ifndef __ASSEMBLY__
+static inline void pic_send_ipi(u32 ipi)
+{
+        nlm_reg_t *mmio = netlogic_io_mmio(NETLOGIC_IO_PIC_OFFSET);
+
+        netlogic_write_reg(mmio, PIC_IPI, ipi);
+}
+
+static inline u32 pic_read_control(void)
+{
+        nlm_reg_t *mmio = netlogic_io_mmio(NETLOGIC_IO_PIC_OFFSET);
+
+        return netlogic_read_reg(mmio, PIC_CTRL);
+}
+
+static inline void pic_write_control(u32 control)
+{
+        nlm_reg_t *mmio = netlogic_io_mmio(NETLOGIC_IO_PIC_OFFSET);
+
+        netlogic_write_reg(mmio, PIC_CTRL, control);
+}
+
+static inline void pic_update_control(u32 control)
+{
+        nlm_reg_t *mmio = netlogic_io_mmio(NETLOGIC_IO_PIC_OFFSET);
+
+        netlogic_write_reg(mmio, PIC_CTRL,
+                (control | netlogic_read_reg(mmio, PIC_CTRL)));
+}
+
+#define PIC_IRQ_IS_EDGE_TRIGGERED(irq)  (((irq) >= PIC_TIMER_0_IRQ) && \
+                                        ((irq) <= PIC_TIMER_7_IRQ))
+#define PIC_IRQ_IS_IRT(irq)             (((irq) >= PIC_IRT_FIRST_IRQ) && \
+                                        ((irq) <= PIC_IRT_LAST_IRQ))
+#endif
+
+#endif /* _ASM_NLM_XLR_PIC_H */
diff --git a/arch/mips/include/asm/netlogic/xlr/xlr.h b/arch/mips/include/asm/netlogic/xlr/xlr.h
new file mode 100644
index 000000000000..3e6372692a04
--- /dev/null
+++ b/arch/mips/include/asm/netlogic/xlr/xlr.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
+ * reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the NetLogic
+ * license below:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _ASM_NLM_XLR_H
+#define _ASM_NLM_XLR_H
+
+/* Platform UART functions */
+struct uart_port;
+unsigned int nlm_xlr_uart_in(struct uart_port *, int);
+void nlm_xlr_uart_out(struct uart_port *, int, int);
+
+/* SMP support functions */
+struct irq_desc;
+void nlm_smp_function_ipi_handler(unsigned int irq, struct irq_desc *desc);
+void nlm_smp_resched_ipi_handler(unsigned int irq, struct irq_desc *desc);
+int nlm_wakeup_secondary_cpus(u32 wakeup_mask);
+void nlm_smp_irq_init(void);
+void nlm_boot_smp_nmi(void);
+void prom_pre_boot_secondary_cpus(void);
+
+extern struct plat_smp_ops nlm_smp_ops;
+extern unsigned long nlm_common_ebase;
+
+/* XLS B silicon "Rook" */
+static inline unsigned int nlm_chip_is_xls_b(void)
+{
+        uint32_t prid = read_c0_prid();
+
+        return ((prid & 0xf000) == 0x4000);
+}
+
+/*
+ *  XLR chip types
+ */
+ /* The XLS product line has chip versions 0x[48c]? */
+static inline unsigned int nlm_chip_is_xls(void)
+{
+        uint32_t prid = read_c0_prid();
+
+        return ((prid & 0xf000) == 0x8000 || (prid & 0xf000) == 0x4000 ||
+                (prid & 0xf000) == 0xc000);
+}
+
+#endif /* _ASM_NLM_XLR_H */
diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h
index 9f1b8dba2c81..de39b1f343ea 100644
--- a/arch/mips/include/asm/ptrace.h
+++ b/arch/mips/include/asm/ptrace.h
@@ -141,7 +141,8 @@ extern int ptrace_set_watch_regs(struct task_struct *child,
 #define instruction_pointer(regs) ((regs)->cp0_epc)
 #define profile_pc(regs) instruction_pointer(regs)
 
-extern asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit);
+extern asmlinkage void syscall_trace_enter(struct pt_regs *regs);
+extern asmlinkage void syscall_trace_leave(struct pt_regs *regs);
 
 extern NORET_TYPE void die(const char *, struct pt_regs *) ATTRIB_NORET;
 
diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h
index d71160de4d10..97f8bf6639e7 100644
--- a/arch/mips/include/asm/thread_info.h
+++ b/arch/mips/include/asm/thread_info.h
@@ -149,6 +149,9 @@ register struct thread_info *__current_thread_info __asm__("$28");
 #define _TIF_FPUBOUND           (1<<TIF_FPUBOUND)
 #define _TIF_LOAD_WATCH         (1<<TIF_LOAD_WATCH)
 
+/* work to do in syscall_trace_leave() */
+#define _TIF_WORK_SYSCALL_EXIT  (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT)
+
 /* work to do on interrupt/exception return */
 #define _TIF_WORK_MASK          (0x0000ffef &                           \
                                         ~(_TIF_SECCOMP | _TIF_SYSCALL_AUDIT))
diff --git a/arch/mips/jazz/jazzdma.c b/arch/mips/jazz/jazzdma.c
index 9ce9f64cb76f..2d8e447cb828 100644
--- a/arch/mips/jazz/jazzdma.c
+++ b/arch/mips/jazz/jazzdma.c
@@ -211,7 +211,7 @@ EXPORT_SYMBOL(vdma_free);
  */
 int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size)
 {
-        int first, pages, npages;
+        int first, pages;
 
         if (laddr > 0xffffff) {
                 if (vdma_debug)
@@ -228,8 +228,7 @@ int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size)
                 return -EINVAL; /* invalid physical address */
         }
 
-        npages = pages =
-            (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
+        pages = (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
         first = laddr >> 12;
         if (vdma_debug)
                 printk("vdma_remap: first=%x, pages=%x\n", first, pages);
diff --git a/arch/mips/jz4740/dma.c b/arch/mips/jz4740/dma.c
index 5ebe75a68350..d7feb898692c 100644
--- a/arch/mips/jz4740/dma.c
+++ b/arch/mips/jz4740/dma.c
@@ -242,9 +242,7 @@ EXPORT_SYMBOL_GPL(jz4740_dma_get_residue);
 
 static void jz4740_dma_chan_irq(struct jz4740_dma_chan *dma)
 {
-        uint32_t status;
-
-        status = jz4740_dma_read(JZ_REG_DMA_STATUS_CTRL(dma->id));
+        (void) jz4740_dma_read(JZ_REG_DMA_STATUS_CTRL(dma->id));
 
         jz4740_dma_write_mask(JZ_REG_DMA_STATUS_CTRL(dma->id), 0,
                 JZ_DMA_STATUS_CTRL_ENABLE | JZ_DMA_STATUS_CTRL_TRANSFER_DONE);
diff --git a/arch/mips/jz4740/setup.c b/arch/mips/jz4740/setup.c
index 6a9e14dab91e..d97cfbf882f5 100644
--- a/arch/mips/jz4740/setup.c
+++ b/arch/mips/jz4740/setup.c
@@ -1,5 +1,6 @@
 /*
  *  Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
+ *  Copyright (C) 2011, Maarten ter Huurne <maarten@treewalker.org>
  *  JZ4740 setup code
  *
  *  This program is free software; you can redistribute it and/or modify it
@@ -14,13 +15,44 @@
  */
 
 #include <linux/init.h>
+#include <linux/io.h>
 #include <linux/kernel.h>
 
+#include <asm/bootinfo.h>
+
+#include <asm/mach-jz4740/base.h>
+
 #include "reset.h"
 
+
+#define JZ4740_EMC_SDRAM_CTRL 0x80
+
+
+static void __init jz4740_detect_mem(void)
+{
+        void __iomem *jz_emc_base;
+        u32 ctrl, bus, bank, rows, cols;
+        phys_t size;
+
+        jz_emc_base = ioremap(JZ4740_EMC_BASE_ADDR, 0x100);
+        ctrl = readl(jz_emc_base + JZ4740_EMC_SDRAM_CTRL);
+        bus = 2 - ((ctrl >> 31) & 1);
+        bank = 1 + ((ctrl >> 19) & 1);
+        cols = 8 + ((ctrl >> 26) & 7);
+        rows = 11 + ((ctrl >> 20) & 3);
+        printk(KERN_DEBUG
+                "SDRAM preconfigured: bus:%u bank:%u rows:%u cols:%u\n",
+                bus, bank, rows, cols);
+        iounmap(jz_emc_base);
+
+        size = 1 << (bus + bank + cols + rows);
+        add_memory_region(0, size, BOOT_MEM_RAM);
+}
+
 void __init plat_mem_setup(void)
 {
         jz4740_reset_init();
+        jz4740_detect_mem();
 }
 
 const char *get_system_type(void)
diff --git a/arch/mips/jz4740/time.c b/arch/mips/jz4740/time.c
index fe01678d94fd..eaa853a54af6 100644
--- a/arch/mips/jz4740/time.c
+++ b/arch/mips/jz4740/time.c
@@ -89,7 +89,7 @@ static int jz4740_clockevent_set_next(unsigned long evt,
 
 static struct clock_event_device jz4740_clockevent = {
         .name = "jz4740-timer",
-        .features = CLOCK_EVT_FEAT_PERIODIC,
+        .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
         .set_next_event = jz4740_clockevent_set_next,
         .set_mode = jz4740_clockevent_set_mode,
         .rating = 200,
diff --git a/arch/mips/jz4740/timer.c b/arch/mips/jz4740/timer.c
index b2c015129055..654d5c3900b6 100644
--- a/arch/mips/jz4740/timer.c
+++ b/arch/mips/jz4740/timer.c
@@ -27,11 +27,13 @@ void jz4740_timer_enable_watchdog(void)
 {
         writel(BIT(16), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR);
 }
+EXPORT_SYMBOL_GPL(jz4740_timer_enable_watchdog);
 
 void jz4740_timer_disable_watchdog(void)
 {
         writel(BIT(16), jz4740_timer_base + JZ_REG_TIMER_STOP_SET);
 }
+EXPORT_SYMBOL_GPL(jz4740_timer_disable_watchdog);
 
 void __init jz4740_timer_init(void)
 {
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index cedee2bcbd18..83bba332bbfc 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_CPU_TX39XX)	+= r2300_fpu.o r2300_switch.o
 obj-$(CONFIG_CPU_TX49XX)        += r4k_fpu.o r4k_switch.o
 obj-$(CONFIG_CPU_VR41XX)        += r4k_fpu.o r4k_switch.o
 obj-$(CONFIG_CPU_CAVIUM_OCTEON) += octeon_switch.o
+obj-$(CONFIG_CPU_XLR)           += r4k_fpu.o r4k_switch.o
 
 obj-$(CONFIG_SMP)               += smp.o
 obj-$(CONFIG_SMP_UP)            += smp-up.o
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index f65d4c8c65a6..bb133d10b145 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -291,6 +291,12 @@ static inline int cpu_has_confreg(void)
 #endif
 }
 
+static inline void set_elf_platform(int cpu, const char *plat)
+{
+        if (cpu == 0)
+                __elf_platform = plat;
+}
+
 /*
  * Get the FPU Implementation/Revision.
  */
@@ -614,6 +620,16 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
         case PRID_IMP_LOONGSON2:
                 c->cputype = CPU_LOONGSON2;
                 __cpu_name[cpu] = "ICT Loongson-2";
+
+                switch (c->processor_id & PRID_REV_MASK) {
+                case PRID_REV_LOONGSON2E:
+                        set_elf_platform(cpu, "loongson2e");
+                        break;
+                case PRID_REV_LOONGSON2F:
+                        set_elf_platform(cpu, "loongson2f");
+                        break;
+                }
+
                 c->isa_level = MIPS_CPU_ISA_III;
                 c->options = R4K_OPTS |
                              MIPS_CPU_FPU | MIPS_CPU_LLSC |
@@ -911,12 +927,14 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
         case PRID_IMP_BMIPS32_REV8:
                 c->cputype = CPU_BMIPS32;
                 __cpu_name[cpu] = "Broadcom BMIPS32";
+                set_elf_platform(cpu, "bmips32");
                 break;
         case PRID_IMP_BMIPS3300:
         case PRID_IMP_BMIPS3300_ALT:
         case PRID_IMP_BMIPS3300_BUG:
                 c->cputype = CPU_BMIPS3300;
                 __cpu_name[cpu] = "Broadcom BMIPS3300";
+                set_elf_platform(cpu, "bmips3300");
                 break;
         case PRID_IMP_BMIPS43XX: {
                 int rev = c->processor_id & 0xff;
@@ -925,15 +943,18 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
                                 rev <= PRID_REV_BMIPS4380_HI) {
                         c->cputype = CPU_BMIPS4380;
                         __cpu_name[cpu] = "Broadcom BMIPS4380";
+                        set_elf_platform(cpu, "bmips4380");
                 } else {
                         c->cputype = CPU_BMIPS4350;
                         __cpu_name[cpu] = "Broadcom BMIPS4350";
+                        set_elf_platform(cpu, "bmips4350");
                 }
                 break;
         }
         case PRID_IMP_BMIPS5000:
                 c->cputype = CPU_BMIPS5000;
                 __cpu_name[cpu] = "Broadcom BMIPS5000";
+                set_elf_platform(cpu, "bmips5000");
                 c->options |= MIPS_CPU_ULRI;
                 break;
         }
@@ -956,14 +977,12 @@ static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu)
                 c->cputype = CPU_CAVIUM_OCTEON_PLUS;
                 __cpu_name[cpu] = "Cavium Octeon+";
 platform:
-                if (cpu == 0)
-                        __elf_platform = "octeon";
+                set_elf_platform(cpu, "octeon");
                 break;
         case PRID_IMP_CAVIUM_CN63XX:
                 c->cputype = CPU_CAVIUM_OCTEON2;
                 __cpu_name[cpu] = "Cavium Octeon II";
-                if (cpu == 0)
-                        __elf_platform = "octeon2";
+                set_elf_platform(cpu, "octeon2");
                 break;
         default:
                 printk(KERN_INFO "Unknown Octeon chip!\n");
@@ -988,6 +1007,59 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu)
         }
 }
 
+static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu)
+{
+        decode_configs(c);
+
+        c->options = (MIPS_CPU_TLB       |
+                        MIPS_CPU_4KEX    |
+                        MIPS_CPU_COUNTER |
+                        MIPS_CPU_DIVEC   |
+                        MIPS_CPU_WATCH   |
+                        MIPS_CPU_EJTAG   |
+                        MIPS_CPU_LLSC);
+
+        switch (c->processor_id & 0xff00) {
+        case PRID_IMP_NETLOGIC_XLR732:
+        case PRID_IMP_NETLOGIC_XLR716:
+        case PRID_IMP_NETLOGIC_XLR532:
+        case PRID_IMP_NETLOGIC_XLR308:
+        case PRID_IMP_NETLOGIC_XLR532C:
+        case PRID_IMP_NETLOGIC_XLR516C:
+        case PRID_IMP_NETLOGIC_XLR508C:
+        case PRID_IMP_NETLOGIC_XLR308C:
+                c->cputype = CPU_XLR;
+                __cpu_name[cpu] = "Netlogic XLR";
+                break;
+
+        case PRID_IMP_NETLOGIC_XLS608:
+        case PRID_IMP_NETLOGIC_XLS408:
+        case PRID_IMP_NETLOGIC_XLS404:
+        case PRID_IMP_NETLOGIC_XLS208:
+        case PRID_IMP_NETLOGIC_XLS204:
+        case PRID_IMP_NETLOGIC_XLS108:
+        case PRID_IMP_NETLOGIC_XLS104:
+        case PRID_IMP_NETLOGIC_XLS616B:
+        case PRID_IMP_NETLOGIC_XLS608B:
+        case PRID_IMP_NETLOGIC_XLS416B:
+        case PRID_IMP_NETLOGIC_XLS412B:
+        case PRID_IMP_NETLOGIC_XLS408B:
+        case PRID_IMP_NETLOGIC_XLS404B:
+                c->cputype = CPU_XLR;
+                __cpu_name[cpu] = "Netlogic XLS";
+                break;
+
+        default:
+                printk(KERN_INFO "Unknown Netlogic chip id [%02x]!\n",
+                       c->processor_id);
+                c->cputype = CPU_XLR;
+                break;
+        }
+
+        c->isa_level = MIPS_CPU_ISA_M64R1;
+        c->tlbsize = ((read_c0_config1() >> 25) & 0x3f) + 1;
+}
+
 #ifdef CONFIG_64BIT
 /* For use by uaccess.h */
 u64 __ua_limit;
@@ -1035,6 +1107,9 @@ __cpuinit void cpu_probe(void)
         case PRID_COMP_INGENIC:
                 cpu_probe_ingenic(c, cpu);
                 break;
+        case PRID_COMP_NETLOGIC:
+                cpu_probe_netlogic(c, cpu);
+                break;
         }
 
         BUG_ON(!__cpu_name[cpu]);
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index ffa331029e08..37acfa036d44 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -167,14 +167,13 @@ work_notifysig:				# deal with pending signals and
 FEXPORT(syscall_exit_work_partial)
         SAVE_STATIC
 syscall_exit_work:
-        li      t0, _TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT
+        li      t0, _TIF_WORK_SYSCALL_EXIT
         and     t0, a2                  # a2 is preloaded with TI_FLAGS
         beqz    t0, work_pending        # trace bit set?
-        local_irq_enable                # could let do_syscall_trace()
+        local_irq_enable                # could let syscall_trace_leave()
                                         # call schedule() instead
         move    a0, sp
-        li      a1, 1
-        jal     do_syscall_trace
+        jal     syscall_trace_leave
         b       resume_userspace
 
 #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT)
diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c
index 94ca2b018af7..feb8021a305f 100644
--- a/arch/mips/kernel/ftrace.c
+++ b/arch/mips/kernel/ftrace.c
@@ -23,6 +23,7 @@
 
 #define JAL 0x0c000000          /* jump & link: ip --> ra, jump to target */
 #define ADDR_MASK 0x03ffffff    /*  op_code|addr : 31...26|25 ....0 */
+#define JUMP_RANGE_MASK ((1UL << 28) - 1)
 
 #define INSN_NOP 0x00000000     /* nop */
 #define INSN_JAL(addr)  \
@@ -44,12 +45,12 @@ static inline void ftrace_dyn_arch_init_insns(void)
 
         /* jal (ftrace_caller + 8), jump over the first two instruction */
         buf = (u32 *)&insn_jal_ftrace_caller;
-        uasm_i_jal(&buf, (FTRACE_ADDR + 8));
+        uasm_i_jal(&buf, (FTRACE_ADDR + 8) & JUMP_RANGE_MASK);
 
 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
         /* j ftrace_graph_caller */
         buf = (u32 *)&insn_j_ftrace_graph_caller;
-        uasm_i_j(&buf, (unsigned long)ftrace_graph_caller);
+        uasm_i_j(&buf, (unsigned long)ftrace_graph_caller & JUMP_RANGE_MASK);
 #endif
 }
 
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index d21c388c0116..4e6ea1ffad46 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -533,15 +533,10 @@ static inline int audit_arch(void)
  * Notification of system call entry/exit
  * - triggered by current->work.syscall_trace
  */
-asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
+asmlinkage void syscall_trace_enter(struct pt_regs *regs)
 {
         /* do the secure computing check first */
-        if (!entryexit)
-                secure_computing(regs->regs[2]);
-
-        if (unlikely(current->audit_context) && entryexit)
-                audit_syscall_exit(AUDITSC_RESULT(regs->regs[2]),
-                                   regs->regs[2]);
+        secure_computing(regs->regs[2]);
 
         if (!(current->ptrace & PT_PTRACED))
                 goto out;
@@ -565,8 +560,40 @@ asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
         }
 
 out:
-        if (unlikely(current->audit_context) && !entryexit)
+        if (unlikely(current->audit_context))
                 audit_syscall_entry(audit_arch(), regs->regs[2],
                                     regs->regs[4], regs->regs[5],
                                     regs->regs[6], regs->regs[7]);
 }
+
+/*
+ * Notification of system call entry/exit
+ * - triggered by current->work.syscall_trace
+ */
+asmlinkage void syscall_trace_leave(struct pt_regs *regs)
+{
+        if (unlikely(current->audit_context))
+                audit_syscall_exit(AUDITSC_RESULT(regs->regs[7]),
+                                   -regs->regs[2]);
+
+        if (!(current->ptrace & PT_PTRACED))
+                return;
+
+        if (!test_thread_flag(TIF_SYSCALL_TRACE))
+                return;
+
+        /* The 0x80 provides a way for the tracing parent to distinguish
+           between a syscall stop and SIGTRAP delivery */
+        ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ?
+                                 0x80 : 0));
+
+        /*
+         * this isn't the same as continuing with a signal, but it will do
+         * for normal use.  strace only continues with a signal if the
+         * stopping signal is not SIGTRAP.  -brl
+         */
+        if (current->exit_code) {
+                send_sig(current->exit_code, current, 1);
+                current->exit_code = 0;
+        }
+}
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 7f5468b38d4c..7a8e1dd7f6f2 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -88,8 +88,7 @@ syscall_trace_entry:
         SAVE_STATIC
         move    s0, t2
         move    a0, sp
-        li      a1, 0
-        jal     do_syscall_trace
+        jal     syscall_trace_enter
 
         move    t0, s0
         RESTORE_STATIC
@@ -565,7 +564,7 @@ einval:	li	v0, -ENOSYS
         sys     sys_ioprio_get          2       /* 4315 */
         sys     sys_utimensat           4
         sys     sys_signalfd            3
-        sys     sys_ni_syscall          0
+        sys     sys_ni_syscall          0       /* was timerfd */
         sys     sys_eventfd             1
         sys     sys_fallocate           6       /* 4320 */
         sys     sys_timerfd_create      2
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index a2e1fcbc41dc..2d31c83224f9 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -91,8 +91,7 @@ syscall_trace_entry:
         SAVE_STATIC
         move    s0, t2
         move    a0, sp
-        li      a1, 0
-        jal     do_syscall_trace
+        jal     syscall_trace_enter
 
         move    t0, s0
         RESTORE_STATIC
@@ -404,7 +403,7 @@ sys_call_table:
         PTR     sys_ioprio_get
         PTR     sys_utimensat                   /* 5275 */
         PTR     sys_signalfd
-        PTR     sys_ni_syscall
+        PTR     sys_ni_syscall                  /* was timerfd */
         PTR     sys_eventfd
         PTR     sys_fallocate
         PTR     sys_timerfd_create              /* 5280 */
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index b2c7624995b8..38a0503b9a4a 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -89,8 +89,7 @@ n32_syscall_trace_entry:
         SAVE_STATIC
         move    s0, t2
         move    a0, sp
-        li      a1, 0
-        jal     do_syscall_trace
+        jal     syscall_trace_enter
 
         move    t0, s0
         RESTORE_STATIC
@@ -403,7 +402,7 @@ EXPORT(sysn32_call_table)
         PTR     sys_ioprio_get
         PTR     compat_sys_utimensat
         PTR     compat_sys_signalfd             /* 6280 */
-        PTR     sys_ni_syscall
+        PTR     sys_ni_syscall                  /* was timerfd */
         PTR     sys_eventfd
         PTR     sys_fallocate
         PTR     sys_timerfd_create
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 049a9c8c49a0..91ea5e4041dd 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -123,8 +123,7 @@ trace_a_syscall:
 
         move    s0, t2                  # Save syscall pointer
         move    a0, sp
-        li      a1, 0
-        jal     do_syscall_trace
+        jal     syscall_trace_enter
 
         move    t0, s0
         RESTORE_STATIC
@@ -522,7 +521,7 @@ sys_call_table:
         PTR     sys_ioprio_get                  /* 4315 */
         PTR     compat_sys_utimensat
         PTR     compat_sys_signalfd
-        PTR     sys_ni_syscall
+        PTR     sys_ni_syscall                  /* was timerfd */
         PTR     sys_eventfd
         PTR     sys32_fallocate                 /* 4320 */
         PTR     sys_timerfd_create
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 58beabf50b3c..d02765708ddb 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -10,12 +10,9 @@
 #include <linux/capability.h>
 #include <linux/errno.h>
 #include <linux/linkage.h>
-#include <linux/mm.h>
 #include <linux/fs.h>
 #include <linux/smp.h>
-#include <linux/mman.h>
 #include <linux/ptrace.h>
-#include <linux/sched.h>
 #include <linux/string.h>
 #include <linux/syscalls.h>
 #include <linux/file.h>
@@ -25,11 +22,9 @@
 #include <linux/msg.h>
 #include <linux/shm.h>
 #include <linux/compiler.h>
-#include <linux/module.h>
 #include <linux/ipc.h>
 #include <linux/uaccess.h>
 #include <linux/slab.h>
-#include <linux/random.h>
 #include <linux/elf.h>
 
 #include <asm/asm.h>
@@ -66,121 +61,6 @@ out:
         return res;
 }
 
-unsigned long shm_align_mask = PAGE_SIZE - 1;   /* Sane caches */
-
-EXPORT_SYMBOL(shm_align_mask);
-
-#define COLOUR_ALIGN(addr,pgoff)                                \
-        ((((addr) + shm_align_mask) & ~shm_align_mask) +        \
-         (((pgoff) << PAGE_SHIFT) & shm_align_mask))
-
-unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
-        unsigned long len, unsigned long pgoff, unsigned long flags)
-{
-        struct vm_area_struct * vmm;
-        int do_color_align;
-        unsigned long task_size;
-
-#ifdef CONFIG_32BIT
-        task_size = TASK_SIZE;
-#else /* Must be CONFIG_64BIT*/
-        task_size = test_thread_flag(TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE;
-#endif
-
-        if (len > task_size)
-                return -ENOMEM;
-
-        if (flags & MAP_FIXED) {
-                /* Even MAP_FIXED mappings must reside within task_size.  */
-                if (task_size - len < addr)
-                        return -EINVAL;
-
-                /*
-                 * We do not accept a shared mapping if it would violate
-                 * cache aliasing constraints.
-                 */
-                if ((flags & MAP_SHARED) &&
-                    ((addr - (pgoff << PAGE_SHIFT)) & shm_align_mask))
-                        return -EINVAL;
-                return addr;
-        }
-
-        do_color_align = 0;
-        if (filp || (flags & MAP_SHARED))
-                do_color_align = 1;
-        if (addr) {
-                if (do_color_align)
-                        addr = COLOUR_ALIGN(addr, pgoff);
-                else
-                        addr = PAGE_ALIGN(addr);
-                vmm = find_vma(current->mm, addr);
-                if (task_size - len >= addr &&
-                    (!vmm || addr + len <= vmm->vm_start))
-                        return addr;
-        }
-        addr = current->mm->mmap_base;
-        if (do_color_align)
-                addr = COLOUR_ALIGN(addr, pgoff);
-        else
-                addr = PAGE_ALIGN(addr);
-
-        for (vmm = find_vma(current->mm, addr); ; vmm = vmm->vm_next) {
-                /* At this point:  (!vmm || addr < vmm->vm_end). */
-                if (task_size - len < addr)
-                        return -ENOMEM;
-                if (!vmm || addr + len <= vmm->vm_start)
-                        return addr;
-                addr = vmm->vm_end;
-                if (do_color_align)
-                        addr = COLOUR_ALIGN(addr, pgoff);
-        }
-}
-
-void arch_pick_mmap_layout(struct mm_struct *mm)
-{
-        unsigned long random_factor = 0UL;
-
-        if (current->flags & PF_RANDOMIZE) {
-                random_factor = get_random_int();
-                random_factor = random_factor << PAGE_SHIFT;
-                if (TASK_IS_32BIT_ADDR)
-                        random_factor &= 0xfffffful;
-                else
-                        random_factor &= 0xffffffful;
-        }
-
-        mm->mmap_base = TASK_UNMAPPED_BASE + random_factor;
-        mm->get_unmapped_area = arch_get_unmapped_area;
-        mm->unmap_area = arch_unmap_area;
-}
-
-static inline unsigned long brk_rnd(void)
-{
-        unsigned long rnd = get_random_int();
-
-        rnd = rnd << PAGE_SHIFT;
-        /* 8MB for 32bit, 256MB for 64bit */
-        if (TASK_IS_32BIT_ADDR)
-                rnd = rnd & 0x7ffffful;
-        else
-                rnd = rnd & 0xffffffful;
-
-        return rnd;
-}
-
-unsigned long arch_randomize_brk(struct mm_struct *mm)
-{
-        unsigned long base = mm->brk;
-        unsigned long ret;
-
-        ret = PAGE_ALIGN(base + brk_rnd());
-
-        if (ret < mm->brk)
-                return mm->brk;
-
-        return ret;
-}
-
 SYSCALL_DEFINE6(mips_mmap, unsigned long, addr, unsigned long, len,
         unsigned long, prot, unsigned long, flags, unsigned long,
         fd, off_t, offset)
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 71350f7f2d88..e9b3af27d844 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -374,7 +374,8 @@ void __noreturn die(const char *str, struct pt_regs *regs)
         unsigned long dvpret = dvpe();
 #endif /* CONFIG_MIPS_MT_SMTC */
 
-        notify_die(DIE_OOPS, str, regs, 0, regs_to_trapnr(regs), SIGSEGV);
+        if (notify_die(DIE_OOPS, str, regs, 0, regs_to_trapnr(regs), SIGSEGV) == NOTIFY_STOP)
+                sig = 0;
 
         console_verbose();
         spin_lock_irq(&die_lock);
@@ -383,9 +384,6 @@ void __noreturn die(const char *str, struct pt_regs *regs)
         mips_mt_regdump(dvpret);
 #endif /* CONFIG_MIPS_MT_SMTC */
 
-        if (notify_die(DIE_OOPS, str, regs, 0, regs_to_trapnr(regs), SIGSEGV) == NOTIFY_STOP)
-                sig = 0;
-
         printk("%s[#%d]:\n", str, ++die_counter);
         show_registers(regs);
         add_taint(TAINT_DIE);
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index 832afbb87588..cd2ca544454b 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -68,12 +68,14 @@ SECTIONS
         RODATA
 
         /* writeable */
+        _sdata = .;                             /* Start of data section */
         .data : {       /* Data */
                 . = . + DATAOFFSET;             /* for CONFIG_MAPPED_KERNEL */
 
                 INIT_TASK_DATA(PAGE_SIZE)
                 NOSAVE_DATA
                 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
+                READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
                 DATA_DATA
                 CONSTRUCTORS
         }
diff --git a/arch/mips/lantiq/Kconfig b/arch/mips/lantiq/Kconfig
new file mode 100644
index 000000000000..3fccf2104513
--- /dev/null
+++ b/arch/mips/lantiq/Kconfig
@@ -0,0 +1,23 @@
+if LANTIQ
+
+config SOC_TYPE_XWAY
+        bool
+        default n
+
+choice
+        prompt "SoC Type"
+        default SOC_XWAY
+
+config SOC_AMAZON_SE
+        bool "Amazon SE"
+        select SOC_TYPE_XWAY
+
+config SOC_XWAY
+        bool "XWAY"
+        select SOC_TYPE_XWAY
+        select HW_HAS_PCI
+endchoice
+
+source "arch/mips/lantiq/xway/Kconfig"
+
+endif
diff --git a/arch/mips/lantiq/Makefile b/arch/mips/lantiq/Makefile
new file mode 100644
index 000000000000..e5dae0e24b00
--- /dev/null
+++ b/arch/mips/lantiq/Makefile
@@ -0,0 +1,11 @@
+# Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License version 2 as published
+# by the Free Software Foundation.
+
+obj-y := irq.o setup.o clk.o prom.o devices.o
+
+obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+
+obj-$(CONFIG_SOC_TYPE_XWAY) += xway/
diff --git a/arch/mips/lantiq/Platform b/arch/mips/lantiq/Platform
new file mode 100644
index 000000000000..f3dff05722de
--- /dev/null
+++ b/arch/mips/lantiq/Platform
@@ -0,0 +1,8 @@
+#
+# Lantiq
+#
+
+platform-$(CONFIG_LANTIQ)       += lantiq/
+cflags-$(CONFIG_LANTIQ)         += -I$(srctree)/arch/mips/include/asm/mach-lantiq
+load-$(CONFIG_LANTIQ)           = 0xffffffff80002000
+cflags-$(CONFIG_SOC_TYPE_XWAY)  += -I$(srctree)/arch/mips/include/asm/mach-lantiq/xway
diff --git a/arch/mips/lantiq/clk.c b/arch/mips/lantiq/clk.c
new file mode 100644
index 000000000000..94560899d13e
--- /dev/null
+++ b/arch/mips/lantiq/clk.c
@@ -0,0 +1,140 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ * Copyright (C) 2010 Thomas Langer <thomas.langer@lantiq.com>
+ * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/list.h>
+
+#include <asm/time.h>
+#include <asm/irq.h>
+#include <asm/div64.h>
+
+#include <lantiq_soc.h>
+
+#include "clk.h"
+
+struct clk {
+        const char *name;
+        unsigned long rate;
+        unsigned long (*get_rate) (void);
+};
+
+static struct clk *cpu_clk;
+static int cpu_clk_cnt;
+
+/* lantiq socs have 3 static clocks */
+static struct clk cpu_clk_generic[] = {
+        {
+                .name = "cpu",
+                .get_rate = ltq_get_cpu_hz,
+        }, {
+                .name = "fpi",
+                .get_rate = ltq_get_fpi_hz,
+        }, {
+                .name = "io",
+                .get_rate = ltq_get_io_region_clock,
+        },
+};
+
+static struct resource ltq_cgu_resource = {
+        .name   = "cgu",
+        .start  = LTQ_CGU_BASE_ADDR,
+        .end    = LTQ_CGU_BASE_ADDR + LTQ_CGU_SIZE - 1,
+        .flags  = IORESOURCE_MEM,
+};
+
+/* remapped clock register range */
+void __iomem *ltq_cgu_membase;
+
+void clk_init(void)
+{
+        cpu_clk = cpu_clk_generic;
+        cpu_clk_cnt = ARRAY_SIZE(cpu_clk_generic);
+}
+
+static inline int clk_good(struct clk *clk)
+{
+        return clk && !IS_ERR(clk);
+}
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+        if (unlikely(!clk_good(clk)))
+                return 0;
+
+        if (clk->rate != 0)
+                return clk->rate;
+
+        if (clk->get_rate != NULL)
+                return clk->get_rate();
+
+        return 0;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+        int i;
+
+        for (i = 0; i < cpu_clk_cnt; i++)
+                if (!strcmp(id, cpu_clk[i].name))
+                        return &cpu_clk[i];
+        BUG();
+        return ERR_PTR(-ENOENT);
+}
+EXPORT_SYMBOL(clk_get);
+
+void clk_put(struct clk *clk)
+{
+        /* not used */
+}
+EXPORT_SYMBOL(clk_put);
+
+static inline u32 ltq_get_counter_resolution(void)
+{
+        u32 res;
+
+        __asm__ __volatile__(
+                ".set   push\n"
+                ".set   mips32r2\n"
+                "rdhwr  %0, $3\n"
+                ".set pop\n"
+                : "=&r" (res)
+                : /* no input */
+                : "memory");
+
+        return res;
+}
+
+void __init plat_time_init(void)
+{
+        struct clk *clk;
+
+        if (insert_resource(&iomem_resource, &ltq_cgu_resource) < 0)
+                panic("Failed to insert cgu memory\n");
+
+        if (request_mem_region(ltq_cgu_resource.start,
+                        resource_size(&ltq_cgu_resource), "cgu") < 0)
+                panic("Failed to request cgu memory\n");
+
+        ltq_cgu_membase = ioremap_nocache(ltq_cgu_resource.start,
+                                resource_size(&ltq_cgu_resource));
+        if (!ltq_cgu_membase) {
+                pr_err("Failed to remap cgu memory\n");
+                unreachable();
+        }
+        clk = clk_get(0, "cpu");
+        mips_hpt_frequency = clk_get_rate(clk) / ltq_get_counter_resolution();
+        write_c0_compare(read_c0_count());
+        clk_put(clk);
+}
diff --git a/arch/mips/lantiq/clk.h b/arch/mips/lantiq/clk.h
new file mode 100644
index 000000000000..3328925f2c3f
--- /dev/null
+++ b/arch/mips/lantiq/clk.h
@@ -0,0 +1,18 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#ifndef _LTQ_CLK_H__
+#define _LTQ_CLK_H__
+
+extern void clk_init(void);
+
+extern unsigned long ltq_get_cpu_hz(void);
+extern unsigned long ltq_get_fpi_hz(void);
+extern unsigned long ltq_get_io_region_clock(void);
+
+#endif
diff --git a/arch/mips/lantiq/devices.c b/arch/mips/lantiq/devices.c
new file mode 100644
index 000000000000..7b82c34cb169
--- /dev/null
+++ b/arch/mips/lantiq/devices.c
@@ -0,0 +1,122 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/reboot.h>
+#include <linux/platform_device.h>
+#include <linux/leds.h>
+#include <linux/etherdevice.h>
+#include <linux/reboot.h>
+#include <linux/time.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/leds.h>
+
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+
+#include <lantiq_soc.h>
+
+#include "devices.h"
+
+/* nor flash */
+static struct resource ltq_nor_resource = {
+        .name   = "nor",
+        .start  = LTQ_FLASH_START,
+        .end    = LTQ_FLASH_START + LTQ_FLASH_MAX - 1,
+        .flags  = IORESOURCE_MEM,
+};
+
+static struct platform_device ltq_nor = {
+        .name           = "ltq_nor",
+        .resource       = &ltq_nor_resource,
+        .num_resources  = 1,
+};
+
+void __init ltq_register_nor(struct physmap_flash_data *data)
+{
+        ltq_nor.dev.platform_data = data;
+        platform_device_register(&ltq_nor);
+}
+
+/* watchdog */
+static struct resource ltq_wdt_resource = {
+        .name   = "watchdog",
+        .start  = LTQ_WDT_BASE_ADDR,
+        .end    = LTQ_WDT_BASE_ADDR + LTQ_WDT_SIZE - 1,
+        .flags  = IORESOURCE_MEM,
+};
+
+void __init ltq_register_wdt(void)
+{
+        platform_device_register_simple("ltq_wdt", 0, &ltq_wdt_resource, 1);
+}
+
+/* asc ports */
+static struct resource ltq_asc0_resources[] = {
+        {
+                .name   = "asc0",
+                .start  = LTQ_ASC0_BASE_ADDR,
+                .end    = LTQ_ASC0_BASE_ADDR + LTQ_ASC_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        IRQ_RES(tx, LTQ_ASC_TIR(0)),
+        IRQ_RES(rx, LTQ_ASC_RIR(0)),
+        IRQ_RES(err, LTQ_ASC_EIR(0)),
+};
+
+static struct resource ltq_asc1_resources[] = {
+        {
+                .name   = "asc1",
+                .start  = LTQ_ASC1_BASE_ADDR,
+                .end    = LTQ_ASC1_BASE_ADDR + LTQ_ASC_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        IRQ_RES(tx, LTQ_ASC_TIR(1)),
+        IRQ_RES(rx, LTQ_ASC_RIR(1)),
+        IRQ_RES(err, LTQ_ASC_EIR(1)),
+};
+
+void __init ltq_register_asc(int port)
+{
+        switch (port) {
+        case 0:
+                platform_device_register_simple("ltq_asc", 0,
+                        ltq_asc0_resources, ARRAY_SIZE(ltq_asc0_resources));
+                break;
+        case 1:
+                platform_device_register_simple("ltq_asc", 1,
+                        ltq_asc1_resources, ARRAY_SIZE(ltq_asc1_resources));
+                break;
+        default:
+                break;
+        }
+}
+
+#ifdef CONFIG_PCI
+/* pci */
+static struct platform_device ltq_pci = {
+        .name           = "ltq_pci",
+        .num_resources  = 0,
+};
+
+void __init ltq_register_pci(struct ltq_pci_data *data)
+{
+        ltq_pci.dev.platform_data = data;
+        platform_device_register(&ltq_pci);
+}
+#else
+void __init ltq_register_pci(struct ltq_pci_data *data)
+{
+        pr_err("kernel is compiled without PCI support\n");
+}
+#endif
diff --git a/arch/mips/lantiq/devices.h b/arch/mips/lantiq/devices.h
new file mode 100644
index 000000000000..2947bb19a528
--- /dev/null
+++ b/arch/mips/lantiq/devices.h
@@ -0,0 +1,23 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#ifndef _LTQ_DEVICES_H__
+#define _LTQ_DEVICES_H__
+
+#include <lantiq_platform.h>
+#include <linux/mtd/physmap.h>
+
+#define IRQ_RES(resname, irq) \
+        {.name = #resname, .start = (irq), .flags = IORESOURCE_IRQ}
+
+extern void ltq_register_nor(struct physmap_flash_data *data);
+extern void ltq_register_wdt(void);
+extern void ltq_register_asc(int port);
+extern void ltq_register_pci(struct ltq_pci_data *data);
+
+#endif
diff --git a/arch/mips/lantiq/early_printk.c b/arch/mips/lantiq/early_printk.c
new file mode 100644
index 000000000000..972e05f87631
--- /dev/null
+++ b/arch/mips/lantiq/early_printk.c
@@ -0,0 +1,33 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/init.h>
+#include <linux/cpu.h>
+
+#include <lantiq.h>
+#include <lantiq_soc.h>
+
+/* no ioremap possible at this early stage, lets use KSEG1 instead  */
+#define LTQ_ASC_BASE    KSEG1ADDR(LTQ_ASC1_BASE_ADDR)
+#define ASC_BUF         1024
+#define LTQ_ASC_FSTAT   ((u32 *)(LTQ_ASC_BASE + 0x0048))
+#define LTQ_ASC_TBUF    ((u32 *)(LTQ_ASC_BASE + 0x0020))
+#define TXMASK          0x3F00
+#define TXOFFSET        8
+
+void prom_putchar(char c)
+{
+        unsigned long flags;
+
+        local_irq_save(flags);
+        do { } while ((ltq_r32(LTQ_ASC_FSTAT) & TXMASK) >> TXOFFSET);
+        if (c == '\n')
+                ltq_w32('\r', LTQ_ASC_TBUF);
+        ltq_w32(c, LTQ_ASC_TBUF);
+        local_irq_restore(flags);
+}
diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c
new file mode 100644
index 000000000000..fc89795cafdb
--- /dev/null
+++ b/arch/mips/lantiq/irq.c
@@ -0,0 +1,326 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ * Copyright (C) 2010 Thomas Langer <thomas.langer@lantiq.com>
+ */
+
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+
+#include <asm/bootinfo.h>
+#include <asm/irq_cpu.h>
+
+#include <lantiq_soc.h>
+#include <irq.h>
+
+/* register definitions */
+#define LTQ_ICU_IM0_ISR         0x0000
+#define LTQ_ICU_IM0_IER         0x0008
+#define LTQ_ICU_IM0_IOSR        0x0010
+#define LTQ_ICU_IM0_IRSR        0x0018
+#define LTQ_ICU_IM0_IMR         0x0020
+#define LTQ_ICU_IM1_ISR         0x0028
+#define LTQ_ICU_OFFSET          (LTQ_ICU_IM1_ISR - LTQ_ICU_IM0_ISR)
+
+#define LTQ_EIU_EXIN_C          0x0000
+#define LTQ_EIU_EXIN_INIC       0x0004
+#define LTQ_EIU_EXIN_INEN       0x000C
+
+/* irq numbers used by the external interrupt unit (EIU) */
+#define LTQ_EIU_IR0             (INT_NUM_IM4_IRL0 + 30)
+#define LTQ_EIU_IR1             (INT_NUM_IM3_IRL0 + 31)
+#define LTQ_EIU_IR2             (INT_NUM_IM1_IRL0 + 26)
+#define LTQ_EIU_IR3             INT_NUM_IM1_IRL0
+#define LTQ_EIU_IR4             (INT_NUM_IM1_IRL0 + 1)
+#define LTQ_EIU_IR5             (INT_NUM_IM1_IRL0 + 2)
+#define LTQ_EIU_IR6             (INT_NUM_IM2_IRL0 + 30)
+
+#define MAX_EIU                 6
+
+/* irqs generated by device attached to the EBU need to be acked in
+ * a special manner
+ */
+#define LTQ_ICU_EBU_IRQ         22
+
+#define ltq_icu_w32(x, y)       ltq_w32((x), ltq_icu_membase + (y))
+#define ltq_icu_r32(x)          ltq_r32(ltq_icu_membase + (x))
+
+#define ltq_eiu_w32(x, y)       ltq_w32((x), ltq_eiu_membase + (y))
+#define ltq_eiu_r32(x)          ltq_r32(ltq_eiu_membase + (x))
+
+static unsigned short ltq_eiu_irq[MAX_EIU] = {
+        LTQ_EIU_IR0,
+        LTQ_EIU_IR1,
+        LTQ_EIU_IR2,
+        LTQ_EIU_IR3,
+        LTQ_EIU_IR4,
+        LTQ_EIU_IR5,
+};
+
+static struct resource ltq_icu_resource = {
+        .name   = "icu",
+        .start  = LTQ_ICU_BASE_ADDR,
+        .end    = LTQ_ICU_BASE_ADDR + LTQ_ICU_SIZE - 1,
+        .flags  = IORESOURCE_MEM,
+};
+
+static struct resource ltq_eiu_resource = {
+        .name   = "eiu",
+        .start  = LTQ_EIU_BASE_ADDR,
+        .end    = LTQ_EIU_BASE_ADDR + LTQ_ICU_SIZE - 1,
+        .flags  = IORESOURCE_MEM,
+};
+
+static void __iomem *ltq_icu_membase;
+static void __iomem *ltq_eiu_membase;
+
+void ltq_disable_irq(struct irq_data *d)
+{
+        u32 ier = LTQ_ICU_IM0_IER;
+        int irq_nr = d->irq - INT_NUM_IRQ0;
+
+        ier += LTQ_ICU_OFFSET * (irq_nr / INT_NUM_IM_OFFSET);
+        irq_nr %= INT_NUM_IM_OFFSET;
+        ltq_icu_w32(ltq_icu_r32(ier) & ~(1 << irq_nr), ier);
+}
+
+void ltq_mask_and_ack_irq(struct irq_data *d)
+{
+        u32 ier = LTQ_ICU_IM0_IER;
+        u32 isr = LTQ_ICU_IM0_ISR;
+        int irq_nr = d->irq - INT_NUM_IRQ0;
+
+        ier += LTQ_ICU_OFFSET * (irq_nr / INT_NUM_IM_OFFSET);
+        isr += LTQ_ICU_OFFSET * (irq_nr / INT_NUM_IM_OFFSET);
+        irq_nr %= INT_NUM_IM_OFFSET;
+        ltq_icu_w32(ltq_icu_r32(ier) & ~(1 << irq_nr), ier);
+        ltq_icu_w32((1 << irq_nr), isr);
+}
+
+static void ltq_ack_irq(struct irq_data *d)
+{
+        u32 isr = LTQ_ICU_IM0_ISR;
+        int irq_nr = d->irq - INT_NUM_IRQ0;
+
+        isr += LTQ_ICU_OFFSET * (irq_nr / INT_NUM_IM_OFFSET);
+        irq_nr %= INT_NUM_IM_OFFSET;
+        ltq_icu_w32((1 << irq_nr), isr);
+}
+
+void ltq_enable_irq(struct irq_data *d)
+{
+        u32 ier = LTQ_ICU_IM0_IER;
+        int irq_nr = d->irq - INT_NUM_IRQ0;
+
+        ier += LTQ_ICU_OFFSET  * (irq_nr / INT_NUM_IM_OFFSET);
+        irq_nr %= INT_NUM_IM_OFFSET;
+        ltq_icu_w32(ltq_icu_r32(ier) | (1 << irq_nr), ier);
+}
+
+static unsigned int ltq_startup_eiu_irq(struct irq_data *d)
+{
+        int i;
+        int irq_nr = d->irq - INT_NUM_IRQ0;
+
+        ltq_enable_irq(d);
+        for (i = 0; i < MAX_EIU; i++) {
+                if (irq_nr == ltq_eiu_irq[i]) {
+                        /* low level - we should really handle set_type */
+                        ltq_eiu_w32(ltq_eiu_r32(LTQ_EIU_EXIN_C) |
+                                (0x6 << (i * 4)), LTQ_EIU_EXIN_C);
+                        /* clear all pending */
+                        ltq_eiu_w32(ltq_eiu_r32(LTQ_EIU_EXIN_INIC) & ~(1 << i),
+                                LTQ_EIU_EXIN_INIC);
+                        /* enable */
+                        ltq_eiu_w32(ltq_eiu_r32(LTQ_EIU_EXIN_INEN) | (1 << i),
+                                LTQ_EIU_EXIN_INEN);
+                        break;
+                }
+        }
+
+        return 0;
+}
+
+static void ltq_shutdown_eiu_irq(struct irq_data *d)
+{
+        int i;
+        int irq_nr = d->irq - INT_NUM_IRQ0;
+
+        ltq_disable_irq(d);
+        for (i = 0; i < MAX_EIU; i++) {
+                if (irq_nr == ltq_eiu_irq[i]) {
+                        /* disable */
+                        ltq_eiu_w32(ltq_eiu_r32(LTQ_EIU_EXIN_INEN) & ~(1 << i),
+                                LTQ_EIU_EXIN_INEN);
+                        break;
+                }
+        }
+}
+
+static struct irq_chip ltq_irq_type = {
+        "icu",
+        .irq_enable = ltq_enable_irq,
+        .irq_disable = ltq_disable_irq,
+        .irq_unmask = ltq_enable_irq,
+        .irq_ack = ltq_ack_irq,
+        .irq_mask = ltq_disable_irq,
+        .irq_mask_ack = ltq_mask_and_ack_irq,
+};
+
+static struct irq_chip ltq_eiu_type = {
+        "eiu",
+        .irq_startup = ltq_startup_eiu_irq,
+        .irq_shutdown = ltq_shutdown_eiu_irq,
+        .irq_enable = ltq_enable_irq,
+        .irq_disable = ltq_disable_irq,
+        .irq_unmask = ltq_enable_irq,
+        .irq_ack = ltq_ack_irq,
+        .irq_mask = ltq_disable_irq,
+        .irq_mask_ack = ltq_mask_and_ack_irq,
+};
+
+static void ltq_hw_irqdispatch(int module)
+{
+        u32 irq;
+
+        irq = ltq_icu_r32(LTQ_ICU_IM0_IOSR + (module * LTQ_ICU_OFFSET));
+        if (irq == 0)
+                return;
+
+        /* silicon bug causes only the msb set to 1 to be valid. all
+         * other bits might be bogus
+         */
+        irq = __fls(irq);
+        do_IRQ((int)irq + INT_NUM_IM0_IRL0 + (INT_NUM_IM_OFFSET * module));
+
+        /* if this is a EBU irq, we need to ack it or get a deadlock */
+        if ((irq == LTQ_ICU_EBU_IRQ) && (module == 0))
+                ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_PCC_ISTAT) | 0x10,
+                        LTQ_EBU_PCC_ISTAT);
+}
+
+#define DEFINE_HWx_IRQDISPATCH(x)                                       \
+        static void ltq_hw ## x ## _irqdispatch(void)                   \
+        {                                                               \
+                ltq_hw_irqdispatch(x);                                  \
+        }
+DEFINE_HWx_IRQDISPATCH(0)
+DEFINE_HWx_IRQDISPATCH(1)
+DEFINE_HWx_IRQDISPATCH(2)
+DEFINE_HWx_IRQDISPATCH(3)
+DEFINE_HWx_IRQDISPATCH(4)
+
+static void ltq_hw5_irqdispatch(void)
+{
+        do_IRQ(MIPS_CPU_TIMER_IRQ);
+}
+
+asmlinkage void plat_irq_dispatch(void)
+{
+        unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
+        unsigned int i;
+
+        if (pending & CAUSEF_IP7) {
+                do_IRQ(MIPS_CPU_TIMER_IRQ);
+                goto out;
+        } else {
+                for (i = 0; i < 5; i++) {
+                        if (pending & (CAUSEF_IP2 << i)) {
+                                ltq_hw_irqdispatch(i);
+                                goto out;
+                        }
+                }
+        }
+        pr_alert("Spurious IRQ: CAUSE=0x%08x\n", read_c0_status());
+
+out:
+        return;
+}
+
+static struct irqaction cascade = {
+        .handler = no_action,
+        .flags = IRQF_DISABLED,
+        .name = "cascade",
+};
+
+void __init arch_init_irq(void)
+{
+        int i;
+
+        if (insert_resource(&iomem_resource, &ltq_icu_resource) < 0)
+                panic("Failed to insert icu memory\n");
+
+        if (request_mem_region(ltq_icu_resource.start,
+                        resource_size(&ltq_icu_resource), "icu") < 0)
+                panic("Failed to request icu memory\n");
+
+        ltq_icu_membase = ioremap_nocache(ltq_icu_resource.start,
+                                resource_size(&ltq_icu_resource));
+        if (!ltq_icu_membase)
+                panic("Failed to remap icu memory\n");
+
+        if (insert_resource(&iomem_resource, &ltq_eiu_resource) < 0)
+                panic("Failed to insert eiu memory\n");
+
+        if (request_mem_region(ltq_eiu_resource.start,
+                        resource_size(&ltq_eiu_resource), "eiu") < 0)
+                panic("Failed to request eiu memory\n");
+
+        ltq_eiu_membase = ioremap_nocache(ltq_eiu_resource.start,
+                                resource_size(&ltq_eiu_resource));
+        if (!ltq_eiu_membase)
+                panic("Failed to remap eiu memory\n");
+
+        /* make sure all irqs are turned off by default */
+        for (i = 0; i < 5; i++)
+                ltq_icu_w32(0, LTQ_ICU_IM0_IER + (i * LTQ_ICU_OFFSET));
+
+        /* clear all possibly pending interrupts */
+        ltq_icu_w32(~0, LTQ_ICU_IM0_ISR + (i * LTQ_ICU_OFFSET));
+
+        mips_cpu_irq_init();
+
+        for (i = 2; i <= 6; i++)
+                setup_irq(i, &cascade);
+
+        if (cpu_has_vint) {
+                pr_info("Setting up vectored interrupts\n");
+                set_vi_handler(2, ltq_hw0_irqdispatch);
+                set_vi_handler(3, ltq_hw1_irqdispatch);
+                set_vi_handler(4, ltq_hw2_irqdispatch);
+                set_vi_handler(5, ltq_hw3_irqdispatch);
+                set_vi_handler(6, ltq_hw4_irqdispatch);
+                set_vi_handler(7, ltq_hw5_irqdispatch);
+        }
+
+        for (i = INT_NUM_IRQ0;
+                i <= (INT_NUM_IRQ0 + (5 * INT_NUM_IM_OFFSET)); i++)
+                if ((i == LTQ_EIU_IR0) || (i == LTQ_EIU_IR1) ||
+                        (i == LTQ_EIU_IR2))
+                        irq_set_chip_and_handler(i, &ltq_eiu_type,
+                                handle_level_irq);
+                /* EIU3-5 only exist on ar9 and vr9 */
+                else if (((i == LTQ_EIU_IR3) || (i == LTQ_EIU_IR4) ||
+                        (i == LTQ_EIU_IR5)) && (ltq_is_ar9() || ltq_is_vr9()))
+                        irq_set_chip_and_handler(i, &ltq_eiu_type,
+                                handle_level_irq);
+                else
+                        irq_set_chip_and_handler(i, &ltq_irq_type,
+                                handle_level_irq);
+
+#if !defined(CONFIG_MIPS_MT_SMP) && !defined(CONFIG_MIPS_MT_SMTC)
+        set_c0_status(IE_IRQ0 | IE_IRQ1 | IE_IRQ2 |
+                IE_IRQ3 | IE_IRQ4 | IE_IRQ5);
+#else
+        set_c0_status(IE_SW0 | IE_SW1 | IE_IRQ0 | IE_IRQ1 |
+                IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5);
+#endif
+}
+
+unsigned int __cpuinit get_c0_compare_int(void)
+{
+        return CP0_LEGACY_COMPARE_IRQ;
+}
diff --git a/arch/mips/lantiq/machtypes.h b/arch/mips/lantiq/machtypes.h
new file mode 100644
index 000000000000..7e01b8c484eb
--- /dev/null
+++ b/arch/mips/lantiq/machtypes.h
@@ -0,0 +1,20 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#ifndef _LANTIQ_MACH_H__
+#define _LANTIQ_MACH_H__
+
+#include <asm/mips_machine.h>
+
+enum lantiq_mach_type {
+        LTQ_MACH_GENERIC = 0,
+        LTQ_MACH_EASY50712,     /* Danube evaluation board */
+        LTQ_MACH_EASY50601,     /* Amazon SE evaluation board */
+};
+
+#endif
diff --git a/arch/mips/lantiq/prom.c b/arch/mips/lantiq/prom.c
new file mode 100644
index 000000000000..56ba007bf1e5
--- /dev/null
+++ b/arch/mips/lantiq/prom.c
@@ -0,0 +1,71 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/module.h>
+#include <linux/clk.h>
+#include <asm/bootinfo.h>
+#include <asm/time.h>
+
+#include <lantiq.h>
+
+#include "prom.h"
+#include "clk.h"
+
+static struct ltq_soc_info soc_info;
+
+unsigned int ltq_get_cpu_ver(void)
+{
+        return soc_info.rev;
+}
+EXPORT_SYMBOL(ltq_get_cpu_ver);
+
+unsigned int ltq_get_soc_type(void)
+{
+        return soc_info.type;
+}
+EXPORT_SYMBOL(ltq_get_soc_type);
+
+const char *get_system_type(void)
+{
+        return soc_info.sys_type;
+}
+
+void prom_free_prom_memory(void)
+{
+}
+
+static void __init prom_init_cmdline(void)
+{
+        int argc = fw_arg0;
+        char **argv = (char **) KSEG1ADDR(fw_arg1);
+        int i;
+
+        for (i = 0; i < argc; i++) {
+                char *p = (char *)  KSEG1ADDR(argv[i]);
+
+                if (p && *p) {
+                        strlcat(arcs_cmdline, p, sizeof(arcs_cmdline));
+                        strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline));
+                }
+        }
+}
+
+void __init prom_init(void)
+{
+        struct clk *clk;
+
+        ltq_soc_detect(&soc_info);
+        clk_init();
+        clk = clk_get(0, "cpu");
+        snprintf(soc_info.sys_type, LTQ_SYS_TYPE_LEN - 1, "%s rev1.%d",
+                soc_info.name, soc_info.rev);
+        clk_put(clk);
+        soc_info.sys_type[LTQ_SYS_TYPE_LEN - 1] = '\0';
+        pr_info("SoC: %s\n", soc_info.sys_type);
+        prom_init_cmdline();
+}
diff --git a/arch/mips/lantiq/prom.h b/arch/mips/lantiq/prom.h
new file mode 100644
index 000000000000..b4229d94280f
--- /dev/null
+++ b/arch/mips/lantiq/prom.h
@@ -0,0 +1,25 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#ifndef _LTQ_PROM_H__
+#define _LTQ_PROM_H__
+
+#define LTQ_SYS_TYPE_LEN        0x100
+
+struct ltq_soc_info {
+        unsigned char *name;
+        unsigned int rev;
+        unsigned int partnum;
+        unsigned int type;
+        unsigned char sys_type[LTQ_SYS_TYPE_LEN];
+};
+
+extern void ltq_soc_detect(struct ltq_soc_info *i);
+extern void ltq_soc_setup(void);
+
+#endif
diff --git a/arch/mips/lantiq/setup.c b/arch/mips/lantiq/setup.c
new file mode 100644
index 000000000000..9b8af77ed0f9
--- /dev/null
+++ b/arch/mips/lantiq/setup.c
@@ -0,0 +1,66 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <asm/bootinfo.h>
+
+#include <lantiq_soc.h>
+
+#include "machtypes.h"
+#include "devices.h"
+#include "prom.h"
+
+void __init plat_mem_setup(void)
+{
+        /* assume 16M as default incase uboot fails to pass proper ramsize */
+        unsigned long memsize = 16;
+        char **envp = (char **) KSEG1ADDR(fw_arg2);
+
+        ioport_resource.start = IOPORT_RESOURCE_START;
+        ioport_resource.end = IOPORT_RESOURCE_END;
+        iomem_resource.start = IOMEM_RESOURCE_START;
+        iomem_resource.end = IOMEM_RESOURCE_END;
+
+        set_io_port_base((unsigned long) KSEG1);
+
+        while (*envp) {
+                char *e = (char *)KSEG1ADDR(*envp);
+                if (!strncmp(e, "memsize=", 8)) {
+                        e += 8;
+                        if (strict_strtoul(e, 0, &memsize))
+                                pr_warn("bad memsize specified\n");
+                }
+                envp++;
+        }
+        memsize *= 1024 * 1024;
+        add_memory_region(0x00000000, memsize, BOOT_MEM_RAM);
+}
+
+static int __init
+lantiq_setup(void)
+{
+        ltq_soc_setup();
+        mips_machine_setup();
+        return 0;
+}
+
+arch_initcall(lantiq_setup);
+
+static void __init
+lantiq_generic_init(void)
+{
+        /* Nothing to do */
+}
+
+MIPS_MACHINE(LTQ_MACH_GENERIC,
+             "Generic",
+             "Generic Lantiq based board",
+             lantiq_generic_init);
diff --git a/arch/mips/lantiq/xway/Kconfig b/arch/mips/lantiq/xway/Kconfig
new file mode 100644
index 000000000000..2b857de36620
--- /dev/null
+++ b/arch/mips/lantiq/xway/Kconfig
@@ -0,0 +1,23 @@
+if SOC_XWAY
+
+menu "MIPS Machine"
+
+config LANTIQ_MACH_EASY50712
+        bool "Easy50712 - Danube"
+        default y
+
+endmenu
+
+endif
+
+if SOC_AMAZON_SE
+
+menu "MIPS Machine"
+
+config LANTIQ_MACH_EASY50601
+        bool "Easy50601 - Amazon SE"
+        default y
+
+endmenu
+
+endif
diff --git a/arch/mips/lantiq/xway/Makefile b/arch/mips/lantiq/xway/Makefile
new file mode 100644
index 000000000000..c517f2e77563
--- /dev/null
+++ b/arch/mips/lantiq/xway/Makefile
@@ -0,0 +1,7 @@
+obj-y := pmu.o ebu.o reset.o gpio.o gpio_stp.o gpio_ebu.o devices.o dma.o
+
+obj-$(CONFIG_SOC_XWAY) += clk-xway.o prom-xway.o setup-xway.o
+obj-$(CONFIG_SOC_AMAZON_SE) += clk-ase.o prom-ase.o setup-ase.o
+
+obj-$(CONFIG_LANTIQ_MACH_EASY50712) += mach-easy50712.o
+obj-$(CONFIG_LANTIQ_MACH_EASY50601) += mach-easy50601.o
diff --git a/arch/mips/lantiq/xway/clk-ase.c b/arch/mips/lantiq/xway/clk-ase.c
new file mode 100644
index 000000000000..22d823acd536
--- /dev/null
+++ b/arch/mips/lantiq/xway/clk-ase.c
@@ -0,0 +1,48 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+
+#include <asm/time.h>
+#include <asm/irq.h>
+#include <asm/div64.h>
+
+#include <lantiq_soc.h>
+
+/* cgu registers */
+#define LTQ_CGU_SYS     0x0010
+
+unsigned int ltq_get_io_region_clock(void)
+{
+        return CLOCK_133M;
+}
+EXPORT_SYMBOL(ltq_get_io_region_clock);
+
+unsigned int ltq_get_fpi_bus_clock(int fpi)
+{
+        return CLOCK_133M;
+}
+EXPORT_SYMBOL(ltq_get_fpi_bus_clock);
+
+unsigned int ltq_get_cpu_hz(void)
+{
+        if (ltq_cgu_r32(LTQ_CGU_SYS) & (1 << 5))
+                return CLOCK_266M;
+        else
+                return CLOCK_133M;
+}
+EXPORT_SYMBOL(ltq_get_cpu_hz);
+
+unsigned int ltq_get_fpi_hz(void)
+{
+        return CLOCK_133M;
+}
+EXPORT_SYMBOL(ltq_get_fpi_hz);
diff --git a/arch/mips/lantiq/xway/clk-xway.c b/arch/mips/lantiq/xway/clk-xway.c
new file mode 100644
index 000000000000..ddd39593c581
--- /dev/null
+++ b/arch/mips/lantiq/xway/clk-xway.c
@@ -0,0 +1,223 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+
+#include <asm/time.h>
+#include <asm/irq.h>
+#include <asm/div64.h>
+
+#include <lantiq_soc.h>
+
+static unsigned int ltq_ram_clocks[] = {
+        CLOCK_167M, CLOCK_133M, CLOCK_111M, CLOCK_83M };
+#define DDR_HZ ltq_ram_clocks[ltq_cgu_r32(LTQ_CGU_SYS) & 0x3]
+
+#define BASIC_FREQUENCY_1       35328000
+#define BASIC_FREQUENCY_2       36000000
+#define BASIS_REQUENCY_USB      12000000
+
+#define GET_BITS(x, msb, lsb) \
+        (((x) & ((1 << ((msb) + 1)) - 1)) >> (lsb))
+
+#define LTQ_CGU_PLL0_CFG        0x0004
+#define LTQ_CGU_PLL1_CFG        0x0008
+#define LTQ_CGU_PLL2_CFG        0x000C
+#define LTQ_CGU_SYS             0x0010
+#define LTQ_CGU_UPDATE          0x0014
+#define LTQ_CGU_IF_CLK          0x0018
+#define LTQ_CGU_OSC_CON         0x001C
+#define LTQ_CGU_SMD             0x0020
+#define LTQ_CGU_CT1SR           0x0028
+#define LTQ_CGU_CT2SR           0x002C
+#define LTQ_CGU_PCMCR           0x0030
+#define LTQ_CGU_PCI_CR          0x0034
+#define LTQ_CGU_PD_PC           0x0038
+#define LTQ_CGU_FMR             0x003C
+
+#define CGU_PLL0_PHASE_DIVIDER_ENABLE   \
+        (ltq_cgu_r32(LTQ_CGU_PLL0_CFG) & (1 << 31))
+#define CGU_PLL0_BYPASS                 \
+        (ltq_cgu_r32(LTQ_CGU_PLL0_CFG) & (1 << 30))
+#define CGU_PLL0_CFG_DSMSEL             \
+        (ltq_cgu_r32(LTQ_CGU_PLL0_CFG) & (1 << 28))
+#define CGU_PLL0_CFG_FRAC_EN            \
+        (ltq_cgu_r32(LTQ_CGU_PLL0_CFG) & (1 << 27))
+#define CGU_PLL1_SRC                    \
+        (ltq_cgu_r32(LTQ_CGU_PLL1_CFG) & (1 << 31))
+#define CGU_PLL2_PHASE_DIVIDER_ENABLE   \
+        (ltq_cgu_r32(LTQ_CGU_PLL2_CFG) & (1 << 20))
+#define CGU_SYS_FPI_SEL                 (1 << 6)
+#define CGU_SYS_DDR_SEL                 0x3
+#define CGU_PLL0_SRC                    (1 << 29)
+
+#define CGU_PLL0_CFG_PLLK       GET_BITS(ltq_cgu_r32(LTQ_CGU_PLL0_CFG), 26, 17)
+#define CGU_PLL0_CFG_PLLN       GET_BITS(ltq_cgu_r32(LTQ_CGU_PLL0_CFG), 12, 6)
+#define CGU_PLL0_CFG_PLLM       GET_BITS(ltq_cgu_r32(LTQ_CGU_PLL0_CFG), 5, 2)
+#define CGU_PLL2_SRC            GET_BITS(ltq_cgu_r32(LTQ_CGU_PLL2_CFG), 18, 17)
+#define CGU_PLL2_CFG_INPUT_DIV  GET_BITS(ltq_cgu_r32(LTQ_CGU_PLL2_CFG), 16, 13)
+
+static unsigned int ltq_get_pll0_fdiv(void);
+
+static inline unsigned int get_input_clock(int pll)
+{
+        switch (pll) {
+        case 0:
+                if (ltq_cgu_r32(LTQ_CGU_PLL0_CFG) & CGU_PLL0_SRC)
+                        return BASIS_REQUENCY_USB;
+                else if (CGU_PLL0_PHASE_DIVIDER_ENABLE)
+                        return BASIC_FREQUENCY_1;
+                else
+                        return BASIC_FREQUENCY_2;
+        case 1:
+                if (CGU_PLL1_SRC)
+                        return BASIS_REQUENCY_USB;
+                else if (CGU_PLL0_PHASE_DIVIDER_ENABLE)
+                        return BASIC_FREQUENCY_1;
+                else
+                        return BASIC_FREQUENCY_2;
+        case 2:
+                switch (CGU_PLL2_SRC) {
+                case 0:
+                        return ltq_get_pll0_fdiv();
+                case 1:
+                        return CGU_PLL2_PHASE_DIVIDER_ENABLE ?
+                                BASIC_FREQUENCY_1 :
+                                BASIC_FREQUENCY_2;
+                case 2:
+                        return BASIS_REQUENCY_USB;
+                }
+        default:
+                return 0;
+        }
+}
+
+static inline unsigned int cal_dsm(int pll, unsigned int num, unsigned int den)
+{
+        u64 res, clock = get_input_clock(pll);
+
+        res = num * clock;
+        do_div(res, den);
+        return res;
+}
+
+static inline unsigned int mash_dsm(int pll, unsigned int M, unsigned int N,
+        unsigned int K)
+{
+        unsigned int num = ((N + 1) << 10) + K;
+        unsigned int den = (M + 1) << 10;
+
+        return cal_dsm(pll, num, den);
+}
+
+static inline unsigned int ssff_dsm_1(int pll, unsigned int M, unsigned int N,
+        unsigned int K)
+{
+        unsigned int num = ((N + 1) << 11) + K + 512;
+        unsigned int den = (M + 1) << 11;
+
+        return cal_dsm(pll, num, den);
+}
+
+static inline unsigned int ssff_dsm_2(int pll, unsigned int M, unsigned int N,
+        unsigned int K)
+{
+        unsigned int num = K >= 512 ?
+                ((N + 1) << 12) + K - 512 : ((N + 1) << 12) + K + 3584;
+        unsigned int den = (M + 1) << 12;
+
+        return cal_dsm(pll, num, den);
+}
+
+static inline unsigned int dsm(int pll, unsigned int M, unsigned int N,
+        unsigned int K, unsigned int dsmsel, unsigned int phase_div_en)
+{
+        if (!dsmsel)
+                return mash_dsm(pll, M, N, K);
+        else if (!phase_div_en)
+                return mash_dsm(pll, M, N, K);
+        else
+                return ssff_dsm_2(pll, M, N, K);
+}
+
+static inline unsigned int ltq_get_pll0_fosc(void)
+{
+        if (CGU_PLL0_BYPASS)
+                return get_input_clock(0);
+        else
+                return !CGU_PLL0_CFG_FRAC_EN
+                        ? dsm(0, CGU_PLL0_CFG_PLLM, CGU_PLL0_CFG_PLLN, 0,
+                                CGU_PLL0_CFG_DSMSEL,
+                                CGU_PLL0_PHASE_DIVIDER_ENABLE)
+                        : dsm(0, CGU_PLL0_CFG_PLLM, CGU_PLL0_CFG_PLLN,
+                                CGU_PLL0_CFG_PLLK, CGU_PLL0_CFG_DSMSEL,
+                                CGU_PLL0_PHASE_DIVIDER_ENABLE);
+}
+
+static unsigned int ltq_get_pll0_fdiv(void)
+{
+        unsigned int div = CGU_PLL2_CFG_INPUT_DIV + 1;
+
+        return (ltq_get_pll0_fosc() + (div >> 1)) / div;
+}
+
+unsigned int ltq_get_io_region_clock(void)
+{
+        unsigned int ret = ltq_get_pll0_fosc();
+
+        switch (ltq_cgu_r32(LTQ_CGU_PLL2_CFG) & CGU_SYS_DDR_SEL) {
+        default:
+        case 0:
+                return (ret + 1) / 2;
+        case 1:
+                return (ret * 2 + 2) / 5;
+        case 2:
+                return (ret + 1) / 3;
+        case 3:
+                return (ret + 2) / 4;
+        }
+}
+EXPORT_SYMBOL(ltq_get_io_region_clock);
+
+unsigned int ltq_get_fpi_bus_clock(int fpi)
+{
+        unsigned int ret = ltq_get_io_region_clock();
+
+        if ((fpi == 2) && (ltq_cgu_r32(LTQ_CGU_SYS) & CGU_SYS_FPI_SEL))
+                ret >>= 1;
+        return ret;
+}
+EXPORT_SYMBOL(ltq_get_fpi_bus_clock);
+
+unsigned int ltq_get_cpu_hz(void)
+{
+        switch (ltq_cgu_r32(LTQ_CGU_SYS) & 0xc) {
+        case 0:
+                return CLOCK_333M;
+        case 4:
+                return DDR_HZ;
+        case 8:
+                return DDR_HZ << 1;
+        default:
+                return DDR_HZ >> 1;
+        }
+}
+EXPORT_SYMBOL(ltq_get_cpu_hz);
+
+unsigned int ltq_get_fpi_hz(void)
+{
+        unsigned int ddr_clock = DDR_HZ;
+
+        if (ltq_cgu_r32(LTQ_CGU_SYS) & 0x40)
+                return ddr_clock >> 1;
+        return ddr_clock;
+}
+EXPORT_SYMBOL(ltq_get_fpi_hz);
diff --git a/arch/mips/lantiq/xway/devices.c b/arch/mips/lantiq/xway/devices.c
new file mode 100644
index 000000000000..e09e789dfc27
--- /dev/null
+++ b/arch/mips/lantiq/xway/devices.c
@@ -0,0 +1,121 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/mtd/physmap.h>
+#include <linux/kernel.h>
+#include <linux/reboot.h>
+#include <linux/platform_device.h>
+#include <linux/leds.h>
+#include <linux/etherdevice.h>
+#include <linux/reboot.h>
+#include <linux/time.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/leds.h>
+
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+
+#include <lantiq_soc.h>
+#include <lantiq_irq.h>
+#include <lantiq_platform.h>
+
+#include "devices.h"
+
+/* gpio */
+static struct resource ltq_gpio_resource[] = {
+        {
+                .name   = "gpio0",
+                .start  = LTQ_GPIO0_BASE_ADDR,
+                .end    = LTQ_GPIO0_BASE_ADDR + LTQ_GPIO_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .name   = "gpio1",
+                .start  = LTQ_GPIO1_BASE_ADDR,
+                .end    = LTQ_GPIO1_BASE_ADDR + LTQ_GPIO_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .name   = "gpio2",
+                .start  = LTQ_GPIO2_BASE_ADDR,
+                .end    = LTQ_GPIO2_BASE_ADDR + LTQ_GPIO_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+void __init ltq_register_gpio(void)
+{
+        platform_device_register_simple("ltq_gpio", 0,
+                &ltq_gpio_resource[0], 1);
+        platform_device_register_simple("ltq_gpio", 1,
+                &ltq_gpio_resource[1], 1);
+
+        /* AR9 and VR9 have an extra gpio block */
+        if (ltq_is_ar9() || ltq_is_vr9()) {
+                platform_device_register_simple("ltq_gpio", 2,
+                        &ltq_gpio_resource[2], 1);
+        }
+}
+
+/* serial to parallel conversion */
+static struct resource ltq_stp_resource = {
+        .name   = "stp",
+        .start  = LTQ_STP_BASE_ADDR,
+        .end    = LTQ_STP_BASE_ADDR + LTQ_STP_SIZE - 1,
+        .flags  = IORESOURCE_MEM,
+};
+
+void __init ltq_register_gpio_stp(void)
+{
+        platform_device_register_simple("ltq_stp", 0, &ltq_stp_resource, 1);
+}
+
+/* asc ports - amazon se has its own serial mapping */
+static struct resource ltq_ase_asc_resources[] = {
+        {
+                .name   = "asc0",
+                .start  = LTQ_ASC1_BASE_ADDR,
+                .end    = LTQ_ASC1_BASE_ADDR + LTQ_ASC_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        IRQ_RES(tx, LTQ_ASC_ASE_TIR),
+        IRQ_RES(rx, LTQ_ASC_ASE_RIR),
+        IRQ_RES(err, LTQ_ASC_ASE_EIR),
+};
+
+void __init ltq_register_ase_asc(void)
+{
+        platform_device_register_simple("ltq_asc", 0,
+                ltq_ase_asc_resources, ARRAY_SIZE(ltq_ase_asc_resources));
+}
+
+/* ethernet */
+static struct resource ltq_etop_resources = {
+        .name   = "etop",
+        .start  = LTQ_ETOP_BASE_ADDR,
+        .end    = LTQ_ETOP_BASE_ADDR + LTQ_ETOP_SIZE - 1,
+        .flags  = IORESOURCE_MEM,
+};
+
+static struct platform_device ltq_etop = {
+        .name           = "ltq_etop",
+        .resource       = &ltq_etop_resources,
+        .num_resources  = 1,
+};
+
+void __init
+ltq_register_etop(struct ltq_eth_data *eth)
+{
+        if (eth) {
+                ltq_etop.dev.platform_data = eth;
+                platform_device_register(&ltq_etop);
+        }
+}
diff --git a/arch/mips/lantiq/xway/devices.h b/arch/mips/lantiq/xway/devices.h
new file mode 100644
index 000000000000..e90493471bc1
--- /dev/null
+++ b/arch/mips/lantiq/xway/devices.h
@@ -0,0 +1,20 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#ifndef _LTQ_DEVICES_XWAY_H__
+#define _LTQ_DEVICES_XWAY_H__
+
+#include "../devices.h"
+#include <linux/phy.h>
+
+extern void ltq_register_gpio(void);
+extern void ltq_register_gpio_stp(void);
+extern void ltq_register_ase_asc(void);
+extern void ltq_register_etop(struct ltq_eth_data *eth);
+
+#endif
diff --git a/arch/mips/lantiq/xway/dma.c b/arch/mips/lantiq/xway/dma.c
new file mode 100644
index 000000000000..4278a459d6c4
--- /dev/null
+++ b/arch/mips/lantiq/xway/dma.c
@@ -0,0 +1,253 @@
+/*
+ *   This program is free software; you can redistribute it and/or modify it
+ *   under the terms of the GNU General Public License version 2 as published
+ *   by the Free Software Foundation.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
+ *
+ *   Copyright (C) 2011 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/dma-mapping.h>
+
+#include <lantiq_soc.h>
+#include <xway_dma.h>
+
+#define LTQ_DMA_CTRL            0x10
+#define LTQ_DMA_CPOLL           0x14
+#define LTQ_DMA_CS              0x18
+#define LTQ_DMA_CCTRL           0x1C
+#define LTQ_DMA_CDBA            0x20
+#define LTQ_DMA_CDLEN           0x24
+#define LTQ_DMA_CIS             0x28
+#define LTQ_DMA_CIE             0x2C
+#define LTQ_DMA_PS              0x40
+#define LTQ_DMA_PCTRL           0x44
+#define LTQ_DMA_IRNEN           0xf4
+
+#define DMA_DESCPT              BIT(3)          /* descriptor complete irq */
+#define DMA_TX                  BIT(8)          /* TX channel direction */
+#define DMA_CHAN_ON             BIT(0)          /* channel on / off bit */
+#define DMA_PDEN                BIT(6)          /* enable packet drop */
+#define DMA_CHAN_RST            BIT(1)          /* channel on / off bit */
+#define DMA_RESET               BIT(0)          /* channel on / off bit */
+#define DMA_IRQ_ACK             0x7e            /* IRQ status register */
+#define DMA_POLL                BIT(31)         /* turn on channel polling */
+#define DMA_CLK_DIV4            BIT(6)          /* polling clock divider */
+#define DMA_2W_BURST            BIT(1)          /* 2 word burst length */
+#define DMA_MAX_CHANNEL         20              /* the soc has 20 channels */
+#define DMA_ETOP_ENDIANESS      (0xf << 8) /* endianess swap etop channels */
+#define DMA_WEIGHT      (BIT(17) | BIT(16))     /* default channel wheight */
+
+#define ltq_dma_r32(x)                  ltq_r32(ltq_dma_membase + (x))
+#define ltq_dma_w32(x, y)               ltq_w32(x, ltq_dma_membase + (y))
+#define ltq_dma_w32_mask(x, y, z)       ltq_w32_mask(x, y, \
+                                                ltq_dma_membase + (z))
+
+static struct resource ltq_dma_resource = {
+        .name   = "dma",
+        .start  = LTQ_DMA_BASE_ADDR,
+        .end    = LTQ_DMA_BASE_ADDR + LTQ_DMA_SIZE - 1,
+        .flags  = IORESOURCE_MEM,
+};
+
+static void __iomem *ltq_dma_membase;
+
+void
+ltq_dma_enable_irq(struct ltq_dma_channel *ch)
+{
+        unsigned long flags;
+
+        local_irq_save(flags);
+        ltq_dma_w32(ch->nr, LTQ_DMA_CS);
+        ltq_dma_w32_mask(0, 1 << ch->nr, LTQ_DMA_IRNEN);
+        local_irq_restore(flags);
+}
+EXPORT_SYMBOL_GPL(ltq_dma_enable_irq);
+
+void
+ltq_dma_disable_irq(struct ltq_dma_channel *ch)
+{
+        unsigned long flags;
+
+        local_irq_save(flags);
+        ltq_dma_w32(ch->nr, LTQ_DMA_CS);
+        ltq_dma_w32_mask(1 << ch->nr, 0, LTQ_DMA_IRNEN);
+        local_irq_restore(flags);
+}
+EXPORT_SYMBOL_GPL(ltq_dma_disable_irq);
+
+void
+ltq_dma_ack_irq(struct ltq_dma_channel *ch)
+{
+        unsigned long flags;
+
+        local_irq_save(flags);
+        ltq_dma_w32(ch->nr, LTQ_DMA_CS);
+        ltq_dma_w32(DMA_IRQ_ACK, LTQ_DMA_CIS);
+        local_irq_restore(flags);
+}
+EXPORT_SYMBOL_GPL(ltq_dma_ack_irq);
+
+void
+ltq_dma_open(struct ltq_dma_channel *ch)
+{
+        unsigned long flag;
+
+        local_irq_save(flag);
+        ltq_dma_w32(ch->nr, LTQ_DMA_CS);
+        ltq_dma_w32_mask(0, DMA_CHAN_ON, LTQ_DMA_CCTRL);
+        ltq_dma_enable_irq(ch);
+        local_irq_restore(flag);
+}
+EXPORT_SYMBOL_GPL(ltq_dma_open);
+
+void
+ltq_dma_close(struct ltq_dma_channel *ch)
+{
+        unsigned long flag;
+
+        local_irq_save(flag);
+        ltq_dma_w32(ch->nr, LTQ_DMA_CS);
+        ltq_dma_w32_mask(DMA_CHAN_ON, 0, LTQ_DMA_CCTRL);
+        ltq_dma_disable_irq(ch);
+        local_irq_restore(flag);
+}
+EXPORT_SYMBOL_GPL(ltq_dma_close);
+
+static void
+ltq_dma_alloc(struct ltq_dma_channel *ch)
+{
+        unsigned long flags;
+
+        ch->desc = 0;
+        ch->desc_base = dma_alloc_coherent(NULL,
+                                LTQ_DESC_NUM * LTQ_DESC_SIZE,
+                                &ch->phys, GFP_ATOMIC);
+        memset(ch->desc_base, 0, LTQ_DESC_NUM * LTQ_DESC_SIZE);
+
+        local_irq_save(flags);
+        ltq_dma_w32(ch->nr, LTQ_DMA_CS);
+        ltq_dma_w32(ch->phys, LTQ_DMA_CDBA);
+        ltq_dma_w32(LTQ_DESC_NUM, LTQ_DMA_CDLEN);
+        ltq_dma_w32_mask(DMA_CHAN_ON, 0, LTQ_DMA_CCTRL);
+        wmb();
+        ltq_dma_w32_mask(0, DMA_CHAN_RST, LTQ_DMA_CCTRL);
+        while (ltq_dma_r32(LTQ_DMA_CCTRL) & DMA_CHAN_RST)
+                ;
+        local_irq_restore(flags);
+}
+
+void
+ltq_dma_alloc_tx(struct ltq_dma_channel *ch)
+{
+        unsigned long flags;
+
+        ltq_dma_alloc(ch);
+
+        local_irq_save(flags);
+        ltq_dma_w32(DMA_DESCPT, LTQ_DMA_CIE);
+        ltq_dma_w32_mask(0, 1 << ch->nr, LTQ_DMA_IRNEN);
+        ltq_dma_w32(DMA_WEIGHT | DMA_TX, LTQ_DMA_CCTRL);
+        local_irq_restore(flags);
+}
+EXPORT_SYMBOL_GPL(ltq_dma_alloc_tx);
+
+void
+ltq_dma_alloc_rx(struct ltq_dma_channel *ch)
+{
+        unsigned long flags;
+
+        ltq_dma_alloc(ch);
+
+        local_irq_save(flags);
+        ltq_dma_w32(DMA_DESCPT, LTQ_DMA_CIE);
+        ltq_dma_w32_mask(0, 1 << ch->nr, LTQ_DMA_IRNEN);
+        ltq_dma_w32(DMA_WEIGHT, LTQ_DMA_CCTRL);
+        local_irq_restore(flags);
+}
+EXPORT_SYMBOL_GPL(ltq_dma_alloc_rx);
+
+void
+ltq_dma_free(struct ltq_dma_channel *ch)
+{
+        if (!ch->desc_base)
+                return;
+        ltq_dma_close(ch);
+        dma_free_coherent(NULL, LTQ_DESC_NUM * LTQ_DESC_SIZE,
+                ch->desc_base, ch->phys);
+}
+EXPORT_SYMBOL_GPL(ltq_dma_free);
+
+void
+ltq_dma_init_port(int p)
+{
+        ltq_dma_w32(p, LTQ_DMA_PS);
+        switch (p) {
+        case DMA_PORT_ETOP:
+                /*
+                 * Tell the DMA engine to swap the endianess of data frames and
+                 * drop packets if the channel arbitration fails.
+                 */
+                ltq_dma_w32_mask(0, DMA_ETOP_ENDIANESS | DMA_PDEN,
+                        LTQ_DMA_PCTRL);
+                break;
+
+        case DMA_PORT_DEU:
+                ltq_dma_w32((DMA_2W_BURST << 4) | (DMA_2W_BURST << 2),
+                        LTQ_DMA_PCTRL);
+                break;
+
+        default:
+                break;
+        }
+}
+EXPORT_SYMBOL_GPL(ltq_dma_init_port);
+
+int __init
+ltq_dma_init(void)
+{
+        int i;
+
+        /* insert and request the memory region */
+        if (insert_resource(&iomem_resource, &ltq_dma_resource) < 0)
+                panic("Failed to insert dma memory\n");
+
+        if (request_mem_region(ltq_dma_resource.start,
+                        resource_size(&ltq_dma_resource), "dma") < 0)
+                panic("Failed to request dma memory\n");
+
+        /* remap dma register range */
+        ltq_dma_membase = ioremap_nocache(ltq_dma_resource.start,
+                                resource_size(&ltq_dma_resource));
+        if (!ltq_dma_membase)
+                panic("Failed to remap dma memory\n");
+
+        /* power up and reset the dma engine */
+        ltq_pmu_enable(PMU_DMA);
+        ltq_dma_w32_mask(0, DMA_RESET, LTQ_DMA_CTRL);
+
+        /* disable all interrupts */
+        ltq_dma_w32(0, LTQ_DMA_IRNEN);
+
+        /* reset/configure each channel */
+        for (i = 0; i < DMA_MAX_CHANNEL; i++) {
+                ltq_dma_w32(i, LTQ_DMA_CS);
+                ltq_dma_w32(DMA_CHAN_RST, LTQ_DMA_CCTRL);
+                ltq_dma_w32(DMA_POLL | DMA_CLK_DIV4, LTQ_DMA_CPOLL);
+                ltq_dma_w32_mask(DMA_CHAN_ON, 0, LTQ_DMA_CCTRL);
+        }
+        return 0;
+}
+
+postcore_initcall(ltq_dma_init);
diff --git a/arch/mips/lantiq/xway/ebu.c b/arch/mips/lantiq/xway/ebu.c
new file mode 100644
index 000000000000..66eb52fa50a1
--- /dev/null
+++ b/arch/mips/lantiq/xway/ebu.c
@@ -0,0 +1,53 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  EBU - the external bus unit attaches PCI, NOR and NAND
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/ioport.h>
+
+#include <lantiq_soc.h>
+
+/* all access to the ebu must be locked */
+DEFINE_SPINLOCK(ebu_lock);
+EXPORT_SYMBOL_GPL(ebu_lock);
+
+static struct resource ltq_ebu_resource = {
+        .name   = "ebu",
+        .start  = LTQ_EBU_BASE_ADDR,
+        .end    = LTQ_EBU_BASE_ADDR + LTQ_EBU_SIZE - 1,
+        .flags  = IORESOURCE_MEM,
+};
+
+/* remapped base addr of the clock unit and external bus unit */
+void __iomem *ltq_ebu_membase;
+
+static int __init lantiq_ebu_init(void)
+{
+        /* insert and request the memory region */
+        if (insert_resource(&iomem_resource, &ltq_ebu_resource) < 0)
+                panic("Failed to insert ebu memory\n");
+
+        if (request_mem_region(ltq_ebu_resource.start,
+                        resource_size(&ltq_ebu_resource), "ebu") < 0)
+                panic("Failed to request ebu memory\n");
+
+        /* remap ebu register range */
+        ltq_ebu_membase = ioremap_nocache(ltq_ebu_resource.start,
+                                resource_size(&ltq_ebu_resource));
+        if (!ltq_ebu_membase)
+                panic("Failed to remap ebu memory\n");
+
+        /* make sure to unprotect the memory region where flash is located */
+        ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_BUSCON0) & ~EBU_WRDIS, LTQ_EBU_BUSCON0);
+        return 0;
+}
+
+postcore_initcall(lantiq_ebu_init);
diff --git a/arch/mips/lantiq/xway/gpio.c b/arch/mips/lantiq/xway/gpio.c
new file mode 100644
index 000000000000..a321451a5455
--- /dev/null
+++ b/arch/mips/lantiq/xway/gpio.c
@@ -0,0 +1,195 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/ioport.h>
+#include <linux/io.h>
+
+#include <lantiq_soc.h>
+
+#define LTQ_GPIO_OUT            0x00
+#define LTQ_GPIO_IN             0x04
+#define LTQ_GPIO_DIR            0x08
+#define LTQ_GPIO_ALTSEL0        0x0C
+#define LTQ_GPIO_ALTSEL1        0x10
+#define LTQ_GPIO_OD             0x14
+
+#define PINS_PER_PORT           16
+#define MAX_PORTS               3
+
+#define ltq_gpio_getbit(m, r, p)        (!!(ltq_r32(m + r) & (1 << p)))
+#define ltq_gpio_setbit(m, r, p)        ltq_w32_mask(0, (1 << p), m + r)
+#define ltq_gpio_clearbit(m, r, p)      ltq_w32_mask((1 << p), 0, m + r)
+
+struct ltq_gpio {
+        void __iomem *membase;
+        struct gpio_chip chip;
+};
+
+static struct ltq_gpio ltq_gpio_port[MAX_PORTS];
+
+int gpio_to_irq(unsigned int gpio)
+{
+        return -EINVAL;
+}
+EXPORT_SYMBOL(gpio_to_irq);
+
+int irq_to_gpio(unsigned int gpio)
+{
+        return -EINVAL;
+}
+EXPORT_SYMBOL(irq_to_gpio);
+
+int ltq_gpio_request(unsigned int pin, unsigned int alt0,
+        unsigned int alt1, unsigned int dir, const char *name)
+{
+        int id = 0;
+
+        if (pin >= (MAX_PORTS * PINS_PER_PORT))
+                return -EINVAL;
+        if (gpio_request(pin, name)) {
+                pr_err("failed to setup lantiq gpio: %s\n", name);
+                return -EBUSY;
+        }
+        if (dir)
+                gpio_direction_output(pin, 1);
+        else
+                gpio_direction_input(pin);
+        while (pin >= PINS_PER_PORT) {
+                pin -= PINS_PER_PORT;
+                id++;
+        }
+        if (alt0)
+                ltq_gpio_setbit(ltq_gpio_port[id].membase,
+                        LTQ_GPIO_ALTSEL0, pin);
+        else
+                ltq_gpio_clearbit(ltq_gpio_port[id].membase,
+                        LTQ_GPIO_ALTSEL0, pin);
+        if (alt1)
+                ltq_gpio_setbit(ltq_gpio_port[id].membase,
+                        LTQ_GPIO_ALTSEL1, pin);
+        else
+                ltq_gpio_clearbit(ltq_gpio_port[id].membase,
+                        LTQ_GPIO_ALTSEL1, pin);
+        return 0;
+}
+EXPORT_SYMBOL(ltq_gpio_request);
+
+static void ltq_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)
+{
+        struct ltq_gpio *ltq_gpio = container_of(chip, struct ltq_gpio, chip);
+
+        if (value)
+                ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_OUT, offset);
+        else
+                ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_OUT, offset);
+}
+
+static int ltq_gpio_get(struct gpio_chip *chip, unsigned int offset)
+{
+        struct ltq_gpio *ltq_gpio = container_of(chip, struct ltq_gpio, chip);
+
+        return ltq_gpio_getbit(ltq_gpio->membase, LTQ_GPIO_IN, offset);
+}
+
+static int ltq_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
+{
+        struct ltq_gpio *ltq_gpio = container_of(chip, struct ltq_gpio, chip);
+
+        ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_OD, offset);
+        ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_DIR, offset);
+
+        return 0;
+}
+
+static int ltq_gpio_direction_output(struct gpio_chip *chip,
+        unsigned int offset, int value)
+{
+        struct ltq_gpio *ltq_gpio = container_of(chip, struct ltq_gpio, chip);
+
+        ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_OD, offset);
+        ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_DIR, offset);
+        ltq_gpio_set(chip, offset, value);
+
+        return 0;
+}
+
+static int ltq_gpio_req(struct gpio_chip *chip, unsigned offset)
+{
+        struct ltq_gpio *ltq_gpio = container_of(chip, struct ltq_gpio, chip);
+
+        ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_ALTSEL0, offset);
+        ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_ALTSEL1, offset);
+        return 0;
+}
+
+static int ltq_gpio_probe(struct platform_device *pdev)
+{
+        struct resource *res;
+
+        if (pdev->id >= MAX_PORTS) {
+                dev_err(&pdev->dev, "invalid gpio port %d\n",
+                        pdev->id);
+                return -EINVAL;
+        }
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!res) {
+                dev_err(&pdev->dev, "failed to get memory for gpio port %d\n",
+                        pdev->id);
+                return -ENOENT;
+        }
+        res = devm_request_mem_region(&pdev->dev, res->start,
+                resource_size(res), dev_name(&pdev->dev));
+        if (!res) {
+                dev_err(&pdev->dev,
+                        "failed to request memory for gpio port %d\n",
+                        pdev->id);
+                return -EBUSY;
+        }
+        ltq_gpio_port[pdev->id].membase = devm_ioremap_nocache(&pdev->dev,
+                res->start, resource_size(res));
+        if (!ltq_gpio_port[pdev->id].membase) {
+                dev_err(&pdev->dev, "failed to remap memory for gpio port %d\n",
+                        pdev->id);
+                return -ENOMEM;
+        }
+        ltq_gpio_port[pdev->id].chip.label = "ltq_gpio";
+        ltq_gpio_port[pdev->id].chip.direction_input = ltq_gpio_direction_input;
+        ltq_gpio_port[pdev->id].chip.direction_output =
+                ltq_gpio_direction_output;
+        ltq_gpio_port[pdev->id].chip.get = ltq_gpio_get;
+        ltq_gpio_port[pdev->id].chip.set = ltq_gpio_set;
+        ltq_gpio_port[pdev->id].chip.request = ltq_gpio_req;
+        ltq_gpio_port[pdev->id].chip.base = PINS_PER_PORT * pdev->id;
+        ltq_gpio_port[pdev->id].chip.ngpio = PINS_PER_PORT;
+        platform_set_drvdata(pdev, &ltq_gpio_port[pdev->id]);
+        return gpiochip_add(&ltq_gpio_port[pdev->id].chip);
+}
+
+static struct platform_driver
+ltq_gpio_driver = {
+        .probe = ltq_gpio_probe,
+        .driver = {
+                .name = "ltq_gpio",
+                .owner = THIS_MODULE,
+        },
+};
+
+int __init ltq_gpio_init(void)
+{
+        int ret = platform_driver_register(&ltq_gpio_driver);
+
+        if (ret)
+                pr_info("ltq_gpio : Error registering platfom driver!");
+        return ret;
+}
+
+postcore_initcall(ltq_gpio_init);
diff --git a/arch/mips/lantiq/xway/gpio_ebu.c b/arch/mips/lantiq/xway/gpio_ebu.c
new file mode 100644
index 000000000000..a479355abdb9
--- /dev/null
+++ b/arch/mips/lantiq/xway/gpio_ebu.c
@@ -0,0 +1,126 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/platform_device.h>
+#include <linux/mutex.h>
+#include <linux/gpio.h>
+#include <linux/io.h>
+
+#include <lantiq_soc.h>
+
+/*
+ * By attaching hardware latches to the EBU it is possible to create output
+ * only gpios. This driver configures a special memory address, which when
+ * written to outputs 16 bit to the latches.
+ */
+
+#define LTQ_EBU_BUSCON  0x1e7ff         /* 16 bit access, slowest timing */
+#define LTQ_EBU_WP      0x80000000      /* write protect bit */
+
+/* we keep a shadow value of the last value written to the ebu */
+static int ltq_ebu_gpio_shadow = 0x0;
+static void __iomem *ltq_ebu_gpio_membase;
+
+static void ltq_ebu_apply(void)
+{
+        unsigned long flags;
+
+        spin_lock_irqsave(&ebu_lock, flags);
+        ltq_ebu_w32(LTQ_EBU_BUSCON, LTQ_EBU_BUSCON1);
+        *((__u16 *)ltq_ebu_gpio_membase) = ltq_ebu_gpio_shadow;
+        ltq_ebu_w32(LTQ_EBU_BUSCON | LTQ_EBU_WP, LTQ_EBU_BUSCON1);
+        spin_unlock_irqrestore(&ebu_lock, flags);
+}
+
+static void ltq_ebu_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+        if (value)
+                ltq_ebu_gpio_shadow |= (1 << offset);
+        else
+                ltq_ebu_gpio_shadow &= ~(1 << offset);
+        ltq_ebu_apply();
+}
+
+static int ltq_ebu_direction_output(struct gpio_chip *chip, unsigned offset,
+        int value)
+{
+        ltq_ebu_set(chip, offset, value);
+
+        return 0;
+}
+
+static struct gpio_chip ltq_ebu_chip = {
+        .label = "ltq_ebu",
+        .direction_output = ltq_ebu_direction_output,
+        .set = ltq_ebu_set,
+        .base = 72,
+        .ngpio = 16,
+        .can_sleep = 1,
+        .owner = THIS_MODULE,
+};
+
+static int ltq_ebu_probe(struct platform_device *pdev)
+{
+        int ret = 0;
+        struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+
+        if (!res) {
+                dev_err(&pdev->dev, "failed to get memory resource\n");
+                return -ENOENT;
+        }
+
+        res = devm_request_mem_region(&pdev->dev, res->start,
+                resource_size(res), dev_name(&pdev->dev));
+        if (!res) {
+                dev_err(&pdev->dev, "failed to request memory resource\n");
+                return -EBUSY;
+        }
+
+        ltq_ebu_gpio_membase = devm_ioremap_nocache(&pdev->dev, res->start,
+                resource_size(res));
+        if (!ltq_ebu_gpio_membase) {
+                dev_err(&pdev->dev, "Failed to ioremap mem region\n");
+                return -ENOMEM;
+        }
+
+        /* grab the default shadow value passed form the platform code */
+        ltq_ebu_gpio_shadow = (unsigned int) pdev->dev.platform_data;
+
+        /* tell the ebu controller which memory address we will be using */
+        ltq_ebu_w32(pdev->resource->start | 0x1, LTQ_EBU_ADDRSEL1);
+
+        /* write protect the region */
+        ltq_ebu_w32(LTQ_EBU_BUSCON | LTQ_EBU_WP, LTQ_EBU_BUSCON1);
+
+        ret = gpiochip_add(&ltq_ebu_chip);
+        if (!ret)
+                ltq_ebu_apply();
+        return ret;
+}
+
+static struct platform_driver ltq_ebu_driver = {
+        .probe = ltq_ebu_probe,
+        .driver = {
+                .name = "ltq_ebu",
+                .owner = THIS_MODULE,
+        },
+};
+
+static int __init ltq_ebu_init(void)
+{
+        int ret = platform_driver_register(&ltq_ebu_driver);
+
+        if (ret)
+                pr_info("ltq_ebu : Error registering platfom driver!");
+        return ret;
+}
+
+postcore_initcall(ltq_ebu_init);
diff --git a/arch/mips/lantiq/xway/gpio_stp.c b/arch/mips/lantiq/xway/gpio_stp.c
new file mode 100644
index 000000000000..67d59d690340
--- /dev/null
+++ b/arch/mips/lantiq/xway/gpio_stp.c
@@ -0,0 +1,157 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2007 John Crispin <blogic@openwrt.org>
+ *
+ */
+
+#include <linux/slab.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/platform_device.h>
+#include <linux/mutex.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+
+#include <lantiq_soc.h>
+
+#define LTQ_STP_CON0            0x00
+#define LTQ_STP_CON1            0x04
+#define LTQ_STP_CPU0            0x08
+#define LTQ_STP_CPU1            0x0C
+#define LTQ_STP_AR              0x10
+
+#define LTQ_STP_CON_SWU         (1 << 31)
+#define LTQ_STP_2HZ             0
+#define LTQ_STP_4HZ             (1 << 23)
+#define LTQ_STP_8HZ             (2 << 23)
+#define LTQ_STP_10HZ            (3 << 23)
+#define LTQ_STP_SPEED_MASK      (0xf << 23)
+#define LTQ_STP_UPD_FPI         (1 << 31)
+#define LTQ_STP_UPD_MASK        (3 << 30)
+#define LTQ_STP_ADSL_SRC        (3 << 24)
+
+#define LTQ_STP_GROUP0          (1 << 0)
+
+#define LTQ_STP_RISING          0
+#define LTQ_STP_FALLING         (1 << 26)
+#define LTQ_STP_EDGE_MASK       (1 << 26)
+
+#define ltq_stp_r32(reg)        __raw_readl(ltq_stp_membase + reg)
+#define ltq_stp_w32(val, reg)   __raw_writel(val, ltq_stp_membase + reg)
+#define ltq_stp_w32_mask(clear, set, reg) \
+                ltq_w32((ltq_r32(ltq_stp_membase + reg) & ~(clear)) | (set), \
+                ltq_stp_membase + (reg))
+
+static int ltq_stp_shadow = 0xffff;
+static void __iomem *ltq_stp_membase;
+
+static void ltq_stp_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+        if (value)
+                ltq_stp_shadow |= (1 << offset);
+        else
+                ltq_stp_shadow &= ~(1 << offset);
+        ltq_stp_w32(ltq_stp_shadow, LTQ_STP_CPU0);
+}
+
+static int ltq_stp_direction_output(struct gpio_chip *chip, unsigned offset,
+        int value)
+{
+        ltq_stp_set(chip, offset, value);
+
+        return 0;
+}
+
+static struct gpio_chip ltq_stp_chip = {
+        .label = "ltq_stp",
+        .direction_output = ltq_stp_direction_output,
+        .set = ltq_stp_set,
+        .base = 48,
+        .ngpio = 24,
+        .can_sleep = 1,
+        .owner = THIS_MODULE,
+};
+
+static int ltq_stp_hw_init(void)
+{
+        /* the 3 pins used to control the external stp */
+        ltq_gpio_request(4, 1, 0, 1, "stp-st");
+        ltq_gpio_request(5, 1, 0, 1, "stp-d");
+        ltq_gpio_request(6, 1, 0, 1, "stp-sh");
+
+        /* sane defaults */
+        ltq_stp_w32(0, LTQ_STP_AR);
+        ltq_stp_w32(0, LTQ_STP_CPU0);
+        ltq_stp_w32(0, LTQ_STP_CPU1);
+        ltq_stp_w32(LTQ_STP_CON_SWU, LTQ_STP_CON0);
+        ltq_stp_w32(0, LTQ_STP_CON1);
+
+        /* rising or falling edge */
+        ltq_stp_w32_mask(LTQ_STP_EDGE_MASK, LTQ_STP_FALLING, LTQ_STP_CON0);
+
+        /* per default stp 15-0 are set */
+        ltq_stp_w32_mask(0, LTQ_STP_GROUP0, LTQ_STP_CON1);
+
+        /* stp are update periodically by the FPI bus */
+        ltq_stp_w32_mask(LTQ_STP_UPD_MASK, LTQ_STP_UPD_FPI, LTQ_STP_CON1);
+
+        /* set stp update speed */
+        ltq_stp_w32_mask(LTQ_STP_SPEED_MASK, LTQ_STP_8HZ, LTQ_STP_CON1);
+
+        /* tell the hardware that pin (led) 0 and 1 are controlled
+         *  by the dsl arc
+         */
+        ltq_stp_w32_mask(0, LTQ_STP_ADSL_SRC, LTQ_STP_CON0);
+
+        ltq_pmu_enable(PMU_LED);
+        return 0;
+}
+
+static int __devinit ltq_stp_probe(struct platform_device *pdev)
+{
+        struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        int ret = 0;
+
+        if (!res)
+                return -ENOENT;
+        res = devm_request_mem_region(&pdev->dev, res->start,
+                resource_size(res), dev_name(&pdev->dev));
+        if (!res) {
+                dev_err(&pdev->dev, "failed to request STP memory\n");
+                return -EBUSY;
+        }
+        ltq_stp_membase = devm_ioremap_nocache(&pdev->dev, res->start,
+                resource_size(res));
+        if (!ltq_stp_membase) {
+                dev_err(&pdev->dev, "failed to remap STP memory\n");
+                return -ENOMEM;
+        }
+        ret = gpiochip_add(&ltq_stp_chip);
+        if (!ret)
+                ret = ltq_stp_hw_init();
+
+        return ret;
+}
+
+static struct platform_driver ltq_stp_driver = {
+        .probe = ltq_stp_probe,
+        .driver = {
+                .name = "ltq_stp",
+                .owner = THIS_MODULE,
+        },
+};
+
+int __init ltq_stp_init(void)
+{
+        int ret = platform_driver_register(&ltq_stp_driver);
+
+        if (ret)
+                pr_info("ltq_stp: error registering platfom driver");
+        return ret;
+}
+
+postcore_initcall(ltq_stp_init);
diff --git a/arch/mips/lantiq/xway/mach-easy50601.c b/arch/mips/lantiq/xway/mach-easy50601.c
new file mode 100644
index 000000000000..d5aaf637ab19
--- /dev/null
+++ b/arch/mips/lantiq/xway/mach-easy50601.c
@@ -0,0 +1,57 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/input.h>
+
+#include <lantiq.h>
+
+#include "../machtypes.h"
+#include "devices.h"
+
+static struct mtd_partition easy50601_partitions[] = {
+        {
+                .name   = "uboot",
+                .offset = 0x0,
+                .size   = 0x10000,
+        },
+        {
+                .name   = "uboot_env",
+                .offset = 0x10000,
+                .size   = 0x10000,
+        },
+        {
+                .name   = "linux",
+                .offset = 0x20000,
+                .size   = 0xE0000,
+        },
+        {
+                .name   = "rootfs",
+                .offset = 0x100000,
+                .size   = 0x300000,
+        },
+};
+
+static struct physmap_flash_data easy50601_flash_data = {
+        .nr_parts       = ARRAY_SIZE(easy50601_partitions),
+        .parts          = easy50601_partitions,
+};
+
+static void __init easy50601_init(void)
+{
+        ltq_register_nor(&easy50601_flash_data);
+}
+
+MIPS_MACHINE(LTQ_MACH_EASY50601,
+                        "EASY50601",
+                        "EASY50601 Eval Board",
+                        easy50601_init);
diff --git a/arch/mips/lantiq/xway/mach-easy50712.c b/arch/mips/lantiq/xway/mach-easy50712.c
new file mode 100644
index 000000000000..ea5027b3239d
--- /dev/null
+++ b/arch/mips/lantiq/xway/mach-easy50712.c
@@ -0,0 +1,74 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/input.h>
+#include <linux/phy.h>
+
+#include <lantiq_soc.h>
+#include <irq.h>
+
+#include "../machtypes.h"
+#include "devices.h"
+
+static struct mtd_partition easy50712_partitions[] = {
+        {
+                .name   = "uboot",
+                .offset = 0x0,
+                .size   = 0x10000,
+        },
+        {
+                .name   = "uboot_env",
+                .offset = 0x10000,
+                .size   = 0x10000,
+        },
+        {
+                .name   = "linux",
+                .offset = 0x20000,
+                .size   = 0xe0000,
+        },
+        {
+                .name   = "rootfs",
+                .offset = 0x100000,
+                .size   = 0x300000,
+        },
+};
+
+static struct physmap_flash_data easy50712_flash_data = {
+        .nr_parts       = ARRAY_SIZE(easy50712_partitions),
+        .parts          = easy50712_partitions,
+};
+
+static struct ltq_pci_data ltq_pci_data = {
+        .clock  = PCI_CLOCK_INT,
+        .gpio   = PCI_GNT1 | PCI_REQ1,
+        .irq    = {
+                [14] = INT_NUM_IM0_IRL0 + 22,
+        },
+};
+
+static struct ltq_eth_data ltq_eth_data = {
+        .mii_mode = PHY_INTERFACE_MODE_MII,
+};
+
+static void __init easy50712_init(void)
+{
+        ltq_register_gpio_stp();
+        ltq_register_nor(&easy50712_flash_data);
+        ltq_register_pci(&ltq_pci_data);
+        ltq_register_etop(&ltq_eth_data);
+}
+
+MIPS_MACHINE(LTQ_MACH_EASY50712,
+             "EASY50712",
+             "EASY50712 Eval Board",
+              easy50712_init);
diff --git a/arch/mips/lantiq/xway/pmu.c b/arch/mips/lantiq/xway/pmu.c
new file mode 100644
index 000000000000..9d69f01e352b
--- /dev/null
+++ b/arch/mips/lantiq/xway/pmu.c
@@ -0,0 +1,70 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/ioport.h>
+
+#include <lantiq_soc.h>
+
+/* PMU - the power management unit allows us to turn part of the core
+ * on and off
+ */
+
+/* the enable / disable registers */
+#define LTQ_PMU_PWDCR   0x1C
+#define LTQ_PMU_PWDSR   0x20
+
+#define ltq_pmu_w32(x, y)       ltq_w32((x), ltq_pmu_membase + (y))
+#define ltq_pmu_r32(x)          ltq_r32(ltq_pmu_membase + (x))
+
+static struct resource ltq_pmu_resource = {
+        .name   = "pmu",
+        .start  = LTQ_PMU_BASE_ADDR,
+        .end    = LTQ_PMU_BASE_ADDR + LTQ_PMU_SIZE - 1,
+        .flags  = IORESOURCE_MEM,
+};
+
+static void __iomem *ltq_pmu_membase;
+
+void ltq_pmu_enable(unsigned int module)
+{
+        int err = 1000000;
+
+        ltq_pmu_w32(ltq_pmu_r32(LTQ_PMU_PWDCR) & ~module, LTQ_PMU_PWDCR);
+        do {} while (--err && (ltq_pmu_r32(LTQ_PMU_PWDSR) & module));
+
+        if (!err)
+                panic("activating PMU module failed!\n");
+}
+EXPORT_SYMBOL(ltq_pmu_enable);
+
+void ltq_pmu_disable(unsigned int module)
+{
+        ltq_pmu_w32(ltq_pmu_r32(LTQ_PMU_PWDCR) | module, LTQ_PMU_PWDCR);
+}
+EXPORT_SYMBOL(ltq_pmu_disable);
+
+int __init ltq_pmu_init(void)
+{
+        if (insert_resource(&iomem_resource, &ltq_pmu_resource) < 0)
+                panic("Failed to insert pmu memory\n");
+
+        if (request_mem_region(ltq_pmu_resource.start,
+                        resource_size(&ltq_pmu_resource), "pmu") < 0)
+                panic("Failed to request pmu memory\n");
+
+        ltq_pmu_membase = ioremap_nocache(ltq_pmu_resource.start,
+                                resource_size(&ltq_pmu_resource));
+        if (!ltq_pmu_membase)
+                panic("Failed to remap pmu memory\n");
+        return 0;
+}
+
+core_initcall(ltq_pmu_init);
diff --git a/arch/mips/lantiq/xway/prom-ase.c b/arch/mips/lantiq/xway/prom-ase.c
new file mode 100644
index 000000000000..abe49f4db57f
--- /dev/null
+++ b/arch/mips/lantiq/xway/prom-ase.c
@@ -0,0 +1,39 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/module.h>
+#include <linux/clk.h>
+#include <asm/bootinfo.h>
+#include <asm/time.h>
+
+#include <lantiq_soc.h>
+
+#include "../prom.h"
+
+#define SOC_AMAZON_SE   "Amazon_SE"
+
+#define PART_SHIFT      12
+#define PART_MASK       0x0FFFFFFF
+#define REV_SHIFT       28
+#define REV_MASK        0xF0000000
+
+void __init ltq_soc_detect(struct ltq_soc_info *i)
+{
+        i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT;
+        i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT;
+        switch (i->partnum) {
+        case SOC_ID_AMAZON_SE:
+                i->name = SOC_AMAZON_SE;
+                i->type = SOC_TYPE_AMAZON_SE;
+                break;
+
+        default:
+                unreachable();
+                break;
+        }
+}
diff --git a/arch/mips/lantiq/xway/prom-xway.c b/arch/mips/lantiq/xway/prom-xway.c
new file mode 100644
index 000000000000..1686692ac24d
--- /dev/null
+++ b/arch/mips/lantiq/xway/prom-xway.c
@@ -0,0 +1,54 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/module.h>
+#include <linux/clk.h>
+#include <asm/bootinfo.h>
+#include <asm/time.h>
+
+#include <lantiq_soc.h>
+
+#include "../prom.h"
+
+#define SOC_DANUBE      "Danube"
+#define SOC_TWINPASS    "Twinpass"
+#define SOC_AR9         "AR9"
+
+#define PART_SHIFT      12
+#define PART_MASK       0x0FFFFFFF
+#define REV_SHIFT       28
+#define REV_MASK        0xF0000000
+
+void __init ltq_soc_detect(struct ltq_soc_info *i)
+{
+        i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT;
+        i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT;
+        switch (i->partnum) {
+        case SOC_ID_DANUBE1:
+        case SOC_ID_DANUBE2:
+                i->name = SOC_DANUBE;
+                i->type = SOC_TYPE_DANUBE;
+                break;
+
+        case SOC_ID_TWINPASS:
+                i->name = SOC_TWINPASS;
+                i->type = SOC_TYPE_DANUBE;
+                break;
+
+        case SOC_ID_ARX188:
+        case SOC_ID_ARX168:
+        case SOC_ID_ARX182:
+                i->name = SOC_AR9;
+                i->type = SOC_TYPE_AR9;
+                break;
+
+        default:
+                unreachable();
+                break;
+        }
+}
diff --git a/arch/mips/lantiq/xway/reset.c b/arch/mips/lantiq/xway/reset.c
new file mode 100644
index 000000000000..a1be36d0e490
--- /dev/null
+++ b/arch/mips/lantiq/xway/reset.c
@@ -0,0 +1,91 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/pm.h>
+#include <linux/module.h>
+#include <asm/reboot.h>
+
+#include <lantiq_soc.h>
+
+#define ltq_rcu_w32(x, y)       ltq_w32((x), ltq_rcu_membase + (y))
+#define ltq_rcu_r32(x)          ltq_r32(ltq_rcu_membase + (x))
+
+/* register definitions */
+#define LTQ_RCU_RST             0x0010
+#define LTQ_RCU_RST_ALL         0x40000000
+
+#define LTQ_RCU_RST_STAT        0x0014
+#define LTQ_RCU_STAT_SHIFT      26
+
+static struct resource ltq_rcu_resource = {
+        .name   = "rcu",
+        .start  = LTQ_RCU_BASE_ADDR,
+        .end    = LTQ_RCU_BASE_ADDR + LTQ_RCU_SIZE - 1,
+        .flags  = IORESOURCE_MEM,
+};
+
+/* remapped base addr of the reset control unit */
+static void __iomem *ltq_rcu_membase;
+
+/* This function is used by the watchdog driver */
+int ltq_reset_cause(void)
+{
+        u32 val = ltq_rcu_r32(LTQ_RCU_RST_STAT);
+        return val >> LTQ_RCU_STAT_SHIFT;
+}
+EXPORT_SYMBOL_GPL(ltq_reset_cause);
+
+static void ltq_machine_restart(char *command)
+{
+        pr_notice("System restart\n");
+        local_irq_disable();
+        ltq_rcu_w32(ltq_rcu_r32(LTQ_RCU_RST) | LTQ_RCU_RST_ALL, LTQ_RCU_RST);
+        unreachable();
+}
+
+static void ltq_machine_halt(void)
+{
+        pr_notice("System halted.\n");
+        local_irq_disable();
+        unreachable();
+}
+
+static void ltq_machine_power_off(void)
+{
+        pr_notice("Please turn off the power now.\n");
+        local_irq_disable();
+        unreachable();
+}
+
+static int __init mips_reboot_setup(void)
+{
+        /* insert and request the memory region */
+        if (insert_resource(&iomem_resource, &ltq_rcu_resource) < 0)
+                panic("Failed to insert rcu memory\n");
+
+        if (request_mem_region(ltq_rcu_resource.start,
+                        resource_size(&ltq_rcu_resource), "rcu") < 0)
+                panic("Failed to request rcu memory\n");
+
+        /* remap rcu register range */
+        ltq_rcu_membase = ioremap_nocache(ltq_rcu_resource.start,
+                                resource_size(&ltq_rcu_resource));
+        if (!ltq_rcu_membase)
+                panic("Failed to remap rcu memory\n");
+
+        _machine_restart = ltq_machine_restart;
+        _machine_halt = ltq_machine_halt;
+        pm_power_off = ltq_machine_power_off;
+
+        return 0;
+}
+
+arch_initcall(mips_reboot_setup);
diff --git a/arch/mips/lantiq/xway/setup-ase.c b/arch/mips/lantiq/xway/setup-ase.c
new file mode 100644
index 000000000000..f6f326798a39
--- /dev/null
+++ b/arch/mips/lantiq/xway/setup-ase.c
@@ -0,0 +1,19 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
+ */
+
+#include <lantiq_soc.h>
+
+#include "../prom.h"
+#include "devices.h"
+
+void __init ltq_soc_setup(void)
+{
+        ltq_register_ase_asc();
+        ltq_register_gpio();
+        ltq_register_wdt();
+}
diff --git a/arch/mips/lantiq/xway/setup-xway.c b/arch/mips/lantiq/xway/setup-xway.c
new file mode 100644
index 000000000000..c292f643a858
--- /dev/null
+++ b/arch/mips/lantiq/xway/setup-xway.c
@@ -0,0 +1,20 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
+ */
+
+#include <lantiq_soc.h>
+
+#include "../prom.h"
+#include "devices.h"
+
+void __init ltq_soc_setup(void)
+{
+        ltq_register_asc(0);
+        ltq_register_asc(1);
+        ltq_register_gpio();
+        ltq_register_wdt();
+}
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index 2adead5a8a37..b2cad4fd5fc4 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_CPU_TX39XX)	+= r3k_dump_tlb.o
 obj-$(CONFIG_CPU_TX49XX)        += dump_tlb.o
 obj-$(CONFIG_CPU_VR41XX)        += dump_tlb.o
 obj-$(CONFIG_CPU_CAVIUM_OCTEON) += dump_tlb.o
+obj-$(CONFIG_CPU_XLR)           += dump_tlb.o
 
 # libgcc-style stuff needed in the kernel
 obj-y += ashldi3.o ashrdi3.o cmpdi2.o lshrdi3.o ucmpdi2.o
diff --git a/arch/mips/loongson/common/env.c b/arch/mips/loongson/common/env.c
index 11b193f848f8..d93830ad6113 100644
--- a/arch/mips/loongson/common/env.c
+++ b/arch/mips/loongson/common/env.c
@@ -29,9 +29,10 @@ unsigned long memsize, highmemsize;
 
 #define parse_even_earlier(res, option, p)                              \
 do {                                                                    \
-        int ret;                                                        \
+        unsigned int tmp __maybe_unused;                                \
+                                                                        \
         if (strncmp(option, (char *)p, strlen(option)) == 0)            \
-                ret = strict_strtol((char *)p + strlen(option"="), 10, &res); \
+                tmp = strict_strtol((char *)p + strlen(option"="), 10, &res); \
 } while (0)
 
 void __init prom_init_env(void)
diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile
index d679c772d082..4d8c1623eee2 100644
--- a/arch/mips/mm/Makefile
+++ b/arch/mips/mm/Makefile
@@ -3,7 +3,8 @@
 #
 
 obj-y                           += cache.o dma-default.o extable.o fault.o \
-                                   init.o tlbex.o tlbex-fault.o uasm.o page.o
+                                   init.o mmap.o tlbex.o tlbex-fault.o uasm.o \
+                                   page.o
 
 obj-$(CONFIG_32BIT)             += ioremap.o pgtable-32.o
 obj-$(CONFIG_64BIT)             += pgtable-64.o
@@ -29,6 +30,7 @@ obj-$(CONFIG_CPU_TX39XX)	+= c-tx39.o tlb-r3k.o
 obj-$(CONFIG_CPU_TX49XX)        += c-r4k.o cex-gen.o tlb-r4k.o
 obj-$(CONFIG_CPU_VR41XX)        += c-r4k.o cex-gen.o tlb-r4k.o
 obj-$(CONFIG_CPU_CAVIUM_OCTEON) += c-octeon.o cex-oct.o tlb-r4k.o
+obj-$(CONFIG_CPU_XLR)           += c-r4k.o tlb-r4k.o cex-gen.o
 
 obj-$(CONFIG_IP22_CPU_SCACHE)   += sc-ip22.o
 obj-$(CONFIG_R5000_CPU_SCACHE)  += sc-r5k.o
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index b4923a75cb4b..d9bc5d3593b6 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1006,6 +1006,7 @@ static void __cpuinit probe_pcache(void)
         case CPU_25KF:
         case CPU_SB1:
         case CPU_SB1A:
+        case CPU_XLR:
                 c->dcache.flags |= MIPS_CACHE_PINDEX;
                 break;
 
@@ -1075,7 +1076,6 @@ static int __cpuinit probe_scache(void)
         unsigned long flags, addr, begin, end, pow2;
         unsigned int config = read_c0_config();
         struct cpuinfo_mips *c = &current_cpu_data;
-        int tmp;
 
         if (config & CONF_SC)
                 return 0;
@@ -1108,7 +1108,6 @@ static int __cpuinit probe_scache(void)
 
         /* Now search for the wrap around point. */
         pow2 = (128 * 1024);
-        tmp = 0;
         for (addr = begin + (128 * 1024); addr < end; addr = begin + pow2) {
                 cache_op(Index_Load_Tag_SD, addr);
                 __asm__ __volatile__("nop; nop; nop; nop;"); /* hazard... */
diff --git a/arch/mips/mm/mmap.c b/arch/mips/mm/mmap.c
new file mode 100644
index 000000000000..ae3c20a9556e
--- /dev/null
+++ b/arch/mips/mm/mmap.c
@@ -0,0 +1,122 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2011 Wind River Systems,
+ *   written by Ralf Baechle <ralf@linux-mips.org>
+ */
+#include <linux/errno.h>
+#include <linux/mm.h>
+#include <linux/mman.h>
+#include <linux/module.h>
+#include <linux/random.h>
+#include <linux/sched.h>
+
+unsigned long shm_align_mask = PAGE_SIZE - 1;   /* Sane caches */
+
+EXPORT_SYMBOL(shm_align_mask);
+
+#define COLOUR_ALIGN(addr,pgoff)                                \
+        ((((addr) + shm_align_mask) & ~shm_align_mask) +        \
+         (((pgoff) << PAGE_SHIFT) & shm_align_mask))
+
+unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
+        unsigned long len, unsigned long pgoff, unsigned long flags)
+{
+        struct vm_area_struct * vmm;
+        int do_color_align;
+
+        if (len > TASK_SIZE)
+                return -ENOMEM;
+
+        if (flags & MAP_FIXED) {
+                /* Even MAP_FIXED mappings must reside within TASK_SIZE.  */
+                if (TASK_SIZE - len < addr)
+                        return -EINVAL;
+
+                /*
+                 * We do not accept a shared mapping if it would violate
+                 * cache aliasing constraints.
+                 */
+                if ((flags & MAP_SHARED) &&
+                    ((addr - (pgoff << PAGE_SHIFT)) & shm_align_mask))
+                        return -EINVAL;
+                return addr;
+        }
+
+        do_color_align = 0;
+        if (filp || (flags & MAP_SHARED))
+                do_color_align = 1;
+        if (addr) {
+                if (do_color_align)
+                        addr = COLOUR_ALIGN(addr, pgoff);
+                else
+                        addr = PAGE_ALIGN(addr);
+                vmm = find_vma(current->mm, addr);
+                if (TASK_SIZE - len >= addr &&
+                    (!vmm || addr + len <= vmm->vm_start))
+                        return addr;
+        }
+        addr = current->mm->mmap_base;
+        if (do_color_align)
+                addr = COLOUR_ALIGN(addr, pgoff);
+        else
+                addr = PAGE_ALIGN(addr);
+
+        for (vmm = find_vma(current->mm, addr); ; vmm = vmm->vm_next) {
+                /* At this point:  (!vmm || addr < vmm->vm_end). */
+                if (TASK_SIZE - len < addr)
+                        return -ENOMEM;
+                if (!vmm || addr + len <= vmm->vm_start)
+                        return addr;
+                addr = vmm->vm_end;
+                if (do_color_align)
+                        addr = COLOUR_ALIGN(addr, pgoff);
+        }
+}
+
+void arch_pick_mmap_layout(struct mm_struct *mm)
+{
+        unsigned long random_factor = 0UL;
+
+        if (current->flags & PF_RANDOMIZE) {
+                random_factor = get_random_int();
+                random_factor = random_factor << PAGE_SHIFT;
+                if (TASK_IS_32BIT_ADDR)
+                        random_factor &= 0xfffffful;
+                else
+                        random_factor &= 0xffffffful;
+        }
+
+        mm->mmap_base = TASK_UNMAPPED_BASE + random_factor;
+        mm->get_unmapped_area = arch_get_unmapped_area;
+        mm->unmap_area = arch_unmap_area;
+}
+
+static inline unsigned long brk_rnd(void)
+{
+        unsigned long rnd = get_random_int();
+
+        rnd = rnd << PAGE_SHIFT;
+        /* 8MB for 32bit, 256MB for 64bit */
+        if (TASK_IS_32BIT_ADDR)
+                rnd = rnd & 0x7ffffful;
+        else
+                rnd = rnd & 0xffffffful;
+
+        return rnd;
+}
+
+unsigned long arch_randomize_brk(struct mm_struct *mm)
+{
+        unsigned long base = mm->brk;
+        unsigned long ret;
+
+        ret = PAGE_ALIGN(base + brk_rnd());
+
+        if (ret < mm->brk)
+                return mm->brk;
+
+        return ret;
+}
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 5ef294fbb6e7..424ed4b92e6d 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -404,6 +404,7 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,
         case CPU_5KC:
         case CPU_TX49XX:
         case CPU_PR4450:
+        case CPU_XLR:
                 uasm_i_nop(p);
                 tlbw(p);
                 break;
@@ -1151,8 +1152,8 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
         struct uasm_reloc *r = relocs;
         u32 *f;
         unsigned int final_len;
-        struct mips_huge_tlb_info htlb_info;
-        enum vmalloc64_mode vmalloc_mode;
+        struct mips_huge_tlb_info htlb_info __maybe_unused;
+        enum vmalloc64_mode vmalloc_mode __maybe_unused;
 
         memset(tlb_handler, 0, sizeof(tlb_handler));
         memset(labels, 0, sizeof(labels));
diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c
index 414f0c99b196..31180c321a1a 100644
--- a/arch/mips/mti-malta/malta-init.c
+++ b/arch/mips/mti-malta/malta-init.c
@@ -193,8 +193,6 @@ extern struct plat_smp_ops msmtc_smp_ops;
 
 void __init prom_init(void)
 {
-        int result;
-
         prom_argc = fw_arg0;
         _prom_argv = (int *) fw_arg1;
         _prom_envp = (int *) fw_arg2;
@@ -360,20 +358,14 @@ void __init prom_init(void)
 #ifdef CONFIG_SERIAL_8250_CONSOLE
         console_config();
 #endif
-        /* Early detection of CMP support */
-        result = gcmp_probe(GCMP_BASE_ADDR, GCMP_ADDRSPACE_SZ);
-
 #ifdef CONFIG_MIPS_CMP
-        if (result)
+        /* Early detection of CMP support */
+        if (gcmp_probe(GCMP_BASE_ADDR, GCMP_ADDRSPACE_SZ))
                 register_smp_ops(&cmp_smp_ops);
+        else
 #endif
 #ifdef CONFIG_MIPS_MT_SMP
-#ifdef CONFIG_MIPS_CMP
-        if (!result)
                 register_smp_ops(&vsmp_smp_ops);
-#else
-        register_smp_ops(&vsmp_smp_ops);
-#endif
 #endif
 #ifdef CONFIG_MIPS_MT_SMTC
         register_smp_ops(&msmtc_smp_ops);
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c
index 7d93e6fbfa5a..1d36c511a7a5 100644
--- a/arch/mips/mti-malta/malta-int.c
+++ b/arch/mips/mti-malta/malta-int.c
@@ -56,7 +56,6 @@ static DEFINE_RAW_SPINLOCK(mips_irq_lock);
 static inline int mips_pcibios_iack(void)
 {
         int irq;
-        u32 dummy;
 
         /*
          * Determine highest priority pending interrupt by performing
@@ -83,7 +82,7 @@ static inline int mips_pcibios_iack(void)
                 BONITO_PCIMAP_CFG = 0x20000;
 
                 /* Flush Bonito register block */
-                dummy = BONITO_PCIMAP_CFG;
+                (void) BONITO_PCIMAP_CFG;
                 iob();    /* sync */
 
                 irq = __raw_readl((u32 *)_pcictrl_bonito_pcicfg);
diff --git a/arch/mips/netlogic/Kconfig b/arch/mips/netlogic/Kconfig
new file mode 100644
index 000000000000..a5ca743613f2
--- /dev/null
+++ b/arch/mips/netlogic/Kconfig
@@ -0,0 +1,5 @@
+config NLM_COMMON
+        bool
+
+config NLM_XLR
+        bool
diff --git a/arch/mips/netlogic/xlr/Makefile b/arch/mips/netlogic/xlr/Makefile
new file mode 100644
index 000000000000..9bd3f731f62e
--- /dev/null
+++ b/arch/mips/netlogic/xlr/Makefile
@@ -0,0 +1,5 @@
+obj-y                           += setup.o platform.o irq.o setup.o time.o
+obj-$(CONFIG_SMP)               += smp.o smpboot.o
+obj-$(CONFIG_EARLY_PRINTK)      += xlr_console.o
+
+EXTRA_CFLAGS                    += -Werror
diff --git a/arch/mips/netlogic/xlr/irq.c b/arch/mips/netlogic/xlr/irq.c
new file mode 100644
index 000000000000..1446d58e364c
--- /dev/null
+++ b/arch/mips/netlogic/xlr/irq.c
@@ -0,0 +1,300 @@
+/*
+ * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
+ * reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the NetLogic
+ * license below:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/linkage.h>
+#include <linux/interrupt.h>
+#include <linux/spinlock.h>
+#include <linux/mm.h>
+
+#include <asm/mipsregs.h>
+
+#include <asm/netlogic/xlr/iomap.h>
+#include <asm/netlogic/xlr/pic.h>
+#include <asm/netlogic/xlr/xlr.h>
+
+#include <asm/netlogic/interrupt.h>
+#include <asm/netlogic/mips-extns.h>
+
+static u64 nlm_irq_mask;
+static DEFINE_SPINLOCK(nlm_pic_lock);
+
+static void xlr_pic_enable(struct irq_data *d)
+{
+        nlm_reg_t *mmio = netlogic_io_mmio(NETLOGIC_IO_PIC_OFFSET);
+        unsigned long flags;
+        nlm_reg_t reg;
+        int irq = d->irq;
+
+        WARN(!PIC_IRQ_IS_IRT(irq), "Bad irq %d", irq);
+
+        spin_lock_irqsave(&nlm_pic_lock, flags);
+        reg = netlogic_read_reg(mmio, PIC_IRT_1_BASE + irq - PIC_IRQ_BASE);
+        netlogic_write_reg(mmio, PIC_IRT_1_BASE + irq - PIC_IRQ_BASE,
+                          reg | (1 << 6) | (1 << 30) | (1 << 31));
+        spin_unlock_irqrestore(&nlm_pic_lock, flags);
+}
+
+static void xlr_pic_mask(struct irq_data *d)
+{
+        nlm_reg_t *mmio = netlogic_io_mmio(NETLOGIC_IO_PIC_OFFSET);
+        unsigned long flags;
+        nlm_reg_t reg;
+        int irq = d->irq;
+
+        WARN(!PIC_IRQ_IS_IRT(irq), "Bad irq %d", irq);
+
+        spin_lock_irqsave(&nlm_pic_lock, flags);
+        reg = netlogic_read_reg(mmio, PIC_IRT_1_BASE + irq - PIC_IRQ_BASE);
+        netlogic_write_reg(mmio, PIC_IRT_1_BASE + irq - PIC_IRQ_BASE,
+                          reg | (1 << 6) | (1 << 30) | (0 << 31));
+        spin_unlock_irqrestore(&nlm_pic_lock, flags);
+}
+
+#ifdef CONFIG_PCI
+/* Extra ACK needed for XLR on chip PCI controller */
+static void xlr_pci_ack(struct irq_data *d)
+{
+        nlm_reg_t *pci_mmio = netlogic_io_mmio(NETLOGIC_IO_PCIX_OFFSET);
+
+        netlogic_read_reg(pci_mmio, (0x140 >> 2));
+}
+
+/* Extra ACK needed for XLS on chip PCIe controller */
+static void xls_pcie_ack(struct irq_data *d)
+{
+        nlm_reg_t *pcie_mmio_le = netlogic_io_mmio(NETLOGIC_IO_PCIE_1_OFFSET);
+
+        switch (d->irq) {
+        case PIC_PCIE_LINK0_IRQ:
+                netlogic_write_reg(pcie_mmio_le, (0x90 >> 2), 0xffffffff);
+                break;
+        case PIC_PCIE_LINK1_IRQ:
+                netlogic_write_reg(pcie_mmio_le, (0x94 >> 2), 0xffffffff);
+                break;
+        case PIC_PCIE_LINK2_IRQ:
+                netlogic_write_reg(pcie_mmio_le, (0x190 >> 2), 0xffffffff);
+                break;
+        case PIC_PCIE_LINK3_IRQ:
+                netlogic_write_reg(pcie_mmio_le, (0x194 >> 2), 0xffffffff);
+                break;
+        }
+}
+
+/* For XLS B silicon, the 3,4 PCI interrupts are different */
+static void xls_pcie_ack_b(struct irq_data *d)
+{
+        nlm_reg_t *pcie_mmio_le = netlogic_io_mmio(NETLOGIC_IO_PCIE_1_OFFSET);
+
+        switch (d->irq) {
+        case PIC_PCIE_LINK0_IRQ:
+                netlogic_write_reg(pcie_mmio_le, (0x90 >> 2), 0xffffffff);
+                break;
+        case PIC_PCIE_LINK1_IRQ:
+                netlogic_write_reg(pcie_mmio_le, (0x94 >> 2), 0xffffffff);
+                break;
+        case PIC_PCIE_XLSB0_LINK2_IRQ:
+                netlogic_write_reg(pcie_mmio_le, (0x190 >> 2), 0xffffffff);
+                break;
+        case PIC_PCIE_XLSB0_LINK3_IRQ:
+                netlogic_write_reg(pcie_mmio_le, (0x194 >> 2), 0xffffffff);
+                break;
+        }
+}
+#endif
+
+static void xlr_pic_ack(struct irq_data *d)
+{
+        unsigned long flags;
+        nlm_reg_t *mmio;
+        int irq = d->irq;
+        void *hd = irq_data_get_irq_handler_data(d);
+
+        WARN(!PIC_IRQ_IS_IRT(irq), "Bad irq %d", irq);
+
+        if (hd) {
+                void (*extra_ack)(void *) = hd;
+                extra_ack(d);
+        }
+        mmio = netlogic_io_mmio(NETLOGIC_IO_PIC_OFFSET);
+        spin_lock_irqsave(&nlm_pic_lock, flags);
+        netlogic_write_reg(mmio, PIC_INT_ACK, (1 << (irq - PIC_IRQ_BASE)));
+        spin_unlock_irqrestore(&nlm_pic_lock, flags);
+}
+
+/*
+ * This chip definition handles interrupts routed thru the XLR
+ * hardware PIC, currently IRQs 8-39 are mapped to hardware intr
+ * 0-31 wired the XLR PIC
+ */
+static struct irq_chip xlr_pic = {
+        .name           = "XLR-PIC",
+        .irq_enable     = xlr_pic_enable,
+        .irq_mask       = xlr_pic_mask,
+        .irq_ack        = xlr_pic_ack,
+};
+
+static void rsvd_irq_handler(struct irq_data *d)
+{
+        WARN(d->irq >= PIC_IRQ_BASE, "Bad irq %d", d->irq);
+}
+
+/*
+ * Chip definition for CPU originated interrupts(timer, msg) and
+ * IPIs
+ */
+struct irq_chip nlm_cpu_intr = {
+        .name           = "XLR-CPU-INTR",
+        .irq_enable     = rsvd_irq_handler,
+        .irq_mask       = rsvd_irq_handler,
+        .irq_ack        = rsvd_irq_handler,
+};
+
+void __init init_xlr_irqs(void)
+{
+        nlm_reg_t *mmio = netlogic_io_mmio(NETLOGIC_IO_PIC_OFFSET);
+        uint32_t thread_mask = 1;
+        int level, i;
+
+        pr_info("Interrupt thread mask [%x]\n", thread_mask);
+        for (i = 0; i < PIC_NUM_IRTS; i++) {
+                level = PIC_IRQ_IS_EDGE_TRIGGERED(i);
+
+                /* Bind all PIC irqs to boot cpu */
+                netlogic_write_reg(mmio, PIC_IRT_0_BASE + i, thread_mask);
+
+                /*
+                 * Use local scheduling and high polarity for all IRTs
+                 * Invalidate all IRTs, by default
+                 */
+                netlogic_write_reg(mmio, PIC_IRT_1_BASE + i,
+                                (level << 30) | (1 << 6) | (PIC_IRQ_BASE + i));
+        }
+
+        /* Make all IRQs as level triggered by default */
+        for (i = 0; i < NR_IRQS; i++) {
+                if (PIC_IRQ_IS_IRT(i))
+                        irq_set_chip_and_handler(i, &xlr_pic, handle_level_irq);
+                else
+                        irq_set_chip_and_handler(i, &nlm_cpu_intr,
+                                                handle_level_irq);
+        }
+#ifdef CONFIG_SMP
+        irq_set_chip_and_handler(IRQ_IPI_SMP_FUNCTION, &nlm_cpu_intr,
+                         nlm_smp_function_ipi_handler);
+        irq_set_chip_and_handler(IRQ_IPI_SMP_RESCHEDULE, &nlm_cpu_intr,
+                         nlm_smp_resched_ipi_handler);
+        nlm_irq_mask |=
+            ((1ULL << IRQ_IPI_SMP_FUNCTION) | (1ULL << IRQ_IPI_SMP_RESCHEDULE));
+#endif
+
+#ifdef CONFIG_PCI
+        /*
+         * For PCI interrupts, we need to ack the PIC controller too, overload
+         * irq handler data to do this
+         */
+        if (nlm_chip_is_xls()) {
+                if (nlm_chip_is_xls_b()) {
+                        irq_set_handler_data(PIC_PCIE_LINK0_IRQ,
+                                                        xls_pcie_ack_b);
+                        irq_set_handler_data(PIC_PCIE_LINK1_IRQ,
+                                                        xls_pcie_ack_b);
+                        irq_set_handler_data(PIC_PCIE_XLSB0_LINK2_IRQ,
+                                                        xls_pcie_ack_b);
+                        irq_set_handler_data(PIC_PCIE_XLSB0_LINK3_IRQ,
+                                                        xls_pcie_ack_b);
+                } else {
+                        irq_set_handler_data(PIC_PCIE_LINK0_IRQ, xls_pcie_ack);
+                        irq_set_handler_data(PIC_PCIE_LINK1_IRQ, xls_pcie_ack);
+                        irq_set_handler_data(PIC_PCIE_LINK2_IRQ, xls_pcie_ack);
+                        irq_set_handler_data(PIC_PCIE_LINK3_IRQ, xls_pcie_ack);
+                }
+        } else {
+                /* XLR PCI controller ACK */
+                irq_set_handler_data(PIC_PCIE_XLSB0_LINK3_IRQ, xlr_pci_ack);
+        }
+#endif
+        /* unmask all PIC related interrupts. If no handler is installed by the
+         * drivers, it'll just ack the interrupt and return
+         */
+        for (i = PIC_IRT_FIRST_IRQ; i <= PIC_IRT_LAST_IRQ; i++)
+                nlm_irq_mask |= (1ULL << i);
+
+        nlm_irq_mask |= (1ULL << IRQ_TIMER);
+}
+
+void __init arch_init_irq(void)
+{
+        /* Initialize the irq descriptors */
+        init_xlr_irqs();
+        write_c0_eimr(nlm_irq_mask);
+}
+
+void __cpuinit nlm_smp_irq_init(void)
+{
+        /* set interrupt mask for non-zero cpus */
+        write_c0_eimr(nlm_irq_mask);
+}
+
+asmlinkage void plat_irq_dispatch(void)
+{
+        uint64_t eirr;
+        int i;
+
+        eirr = read_c0_eirr() & read_c0_eimr();
+        if (!eirr)
+                return;
+
+        /* no need of EIRR here, writing compare clears interrupt */
+        if (eirr & (1 << IRQ_TIMER)) {
+                do_IRQ(IRQ_TIMER);
+                return;
+        }
+
+        /* use dcltz: optimize below code */
+        for (i = 63; i != -1; i--) {
+                if (eirr & (1ULL << i))
+                        break;
+        }
+        if (i == -1) {
+                pr_err("no interrupt !!\n");
+                return;
+        }
+
+        /* Ack eirr */
+        write_c0_eirr(1ULL << i);
+
+        do_IRQ(i);
+}
diff --git a/arch/mips/netlogic/xlr/platform.c b/arch/mips/netlogic/xlr/platform.c
new file mode 100644
index 000000000000..609ec2534642
--- /dev/null
+++ b/arch/mips/netlogic/xlr/platform.c
@@ -0,0 +1,98 @@
+/*
+ * Copyright 2011, Netlogic Microsystems.
+ * Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/resource.h>
+#include <linux/serial_8250.h>
+#include <linux/serial_reg.h>
+
+#include <asm/netlogic/xlr/iomap.h>
+#include <asm/netlogic/xlr/pic.h>
+#include <asm/netlogic/xlr/xlr.h>
+
+unsigned int nlm_xlr_uart_in(struct uart_port *p, int offset)
+{
+        nlm_reg_t *mmio;
+        unsigned int value;
+
+        /* XLR uart does not need any mapping of regs */
+        mmio = (nlm_reg_t *)(p->membase + (offset << p->regshift));
+        value = netlogic_read_reg(mmio, 0);
+
+        /* See XLR/XLS errata */
+        if (offset == UART_MSR)
+                value ^= 0xF0;
+        else if (offset == UART_MCR)
+                value ^= 0x3;
+
+        return value;
+}
+
+void nlm_xlr_uart_out(struct uart_port *p, int offset, int value)
+{
+        nlm_reg_t *mmio;
+
+        /* XLR uart does not need any mapping of regs */
+        mmio = (nlm_reg_t *)(p->membase + (offset << p->regshift));
+
+        /* See XLR/XLS errata */
+        if (offset == UART_MSR)
+                value ^= 0xF0;
+        else if (offset == UART_MCR)
+                value ^= 0x3;
+
+        netlogic_write_reg(mmio, 0, value);
+}
+
+#define PORT(_irq)                                      \
+        {                                               \
+                .irq            = _irq,                 \
+                .regshift       = 2,                    \
+                .iotype         = UPIO_MEM32,           \
+                .flags          = (UPF_SKIP_TEST |      \
+                         UPF_FIXED_TYPE | UPF_BOOT_AUTOCONF),\
+                .uartclk        = PIC_CLKS_PER_SEC,     \
+                .type           = PORT_16550A,          \
+                .serial_in      = nlm_xlr_uart_in,      \
+                .serial_out     = nlm_xlr_uart_out,     \
+        }
+
+static struct plat_serial8250_port xlr_uart_data[] = {
+        PORT(PIC_UART_0_IRQ),
+        PORT(PIC_UART_1_IRQ),
+        {},
+};
+
+static struct platform_device uart_device = {
+        .name           = "serial8250",
+        .id             = PLAT8250_DEV_PLATFORM,
+        .dev = {
+                .platform_data = xlr_uart_data,
+        },
+};
+
+static int __init nlm_uart_init(void)
+{
+        nlm_reg_t *mmio;
+
+        mmio = netlogic_io_mmio(NETLOGIC_IO_UART_0_OFFSET);
+        xlr_uart_data[0].membase = (void __iomem *)mmio;
+        xlr_uart_data[0].mapbase = CPHYSADDR((unsigned long)mmio);
+
+        mmio = netlogic_io_mmio(NETLOGIC_IO_UART_1_OFFSET);
+        xlr_uart_data[1].membase = (void __iomem *)mmio;
+        xlr_uart_data[1].mapbase = CPHYSADDR((unsigned long)mmio);
+
+        return platform_device_register(&uart_device);
+}
+
+arch_initcall(nlm_uart_init);
diff --git a/arch/mips/netlogic/xlr/setup.c b/arch/mips/netlogic/xlr/setup.c
new file mode 100644
index 000000000000..482802569e74
--- /dev/null
+++ b/arch/mips/netlogic/xlr/setup.c
@@ -0,0 +1,188 @@
+/*
+ * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
+ * reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the NetLogic
+ * license below:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/serial_8250.h>
+#include <linux/pm.h>
+
+#include <asm/reboot.h>
+#include <asm/time.h>
+#include <asm/bootinfo.h>
+#include <asm/smp-ops.h>
+
+#include <asm/netlogic/interrupt.h>
+#include <asm/netlogic/psb-bootinfo.h>
+
+#include <asm/netlogic/xlr/xlr.h>
+#include <asm/netlogic/xlr/iomap.h>
+#include <asm/netlogic/xlr/pic.h>
+#include <asm/netlogic/xlr/gpio.h>
+
+unsigned long netlogic_io_base = (unsigned long)(DEFAULT_NETLOGIC_IO_BASE);
+unsigned long nlm_common_ebase = 0x0;
+struct psb_info nlm_prom_info;
+
+static void nlm_early_serial_setup(void)
+{
+        struct uart_port s;
+        nlm_reg_t *uart_base;
+
+        uart_base = netlogic_io_mmio(NETLOGIC_IO_UART_0_OFFSET);
+        memset(&s, 0, sizeof(s));
+        s.flags         = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
+        s.iotype        = UPIO_MEM32;
+        s.regshift      = 2;
+        s.irq           = PIC_UART_0_IRQ;
+        s.uartclk       = PIC_CLKS_PER_SEC;
+        s.serial_in     = nlm_xlr_uart_in;
+        s.serial_out    = nlm_xlr_uart_out;
+        s.mapbase       = (unsigned long)uart_base;
+        s.membase       = (unsigned char __iomem *)uart_base;
+        early_serial_setup(&s);
+}
+
+static void nlm_linux_exit(void)
+{
+        nlm_reg_t *mmio;
+
+        mmio = netlogic_io_mmio(NETLOGIC_IO_GPIO_OFFSET);
+        /* trigger a chip reset by writing 1 to GPIO_SWRESET_REG */
+        netlogic_write_reg(mmio, NETLOGIC_GPIO_SWRESET_REG, 1);
+        for ( ; ; )
+                cpu_wait();
+}
+
+void __init plat_mem_setup(void)
+{
+        panic_timeout   = 5;
+        _machine_restart = (void (*)(char *))nlm_linux_exit;
+        _machine_halt   = nlm_linux_exit;
+        pm_power_off    = nlm_linux_exit;
+}
+
+const char *get_system_type(void)
+{
+        return "Netlogic XLR/XLS Series";
+}
+
+void __init prom_free_prom_memory(void)
+{
+        /* Nothing yet */
+}
+
+static void build_arcs_cmdline(int *argv)
+{
+        int i, remain, len;
+        char *arg;
+
+        remain = sizeof(arcs_cmdline) - 1;
+        arcs_cmdline[0] = '\0';
+        for (i = 0; argv[i] != 0; i++) {
+                arg = (char *)(long)argv[i];
+                len = strlen(arg);
+                if (len + 1 > remain)
+                        break;
+                strcat(arcs_cmdline, arg);
+                strcat(arcs_cmdline, " ");
+                remain -=  len + 1;
+        }
+
+        /* Add the default options here */
+        if ((strstr(arcs_cmdline, "console=")) == NULL) {
+                arg = "console=ttyS0,38400 ";
+                len = strlen(arg);
+                if (len > remain)
+                        goto fail;
+                strcat(arcs_cmdline, arg);
+                remain -= len;
+        }
+#ifdef CONFIG_BLK_DEV_INITRD
+        if ((strstr(arcs_cmdline, "rdinit=")) == NULL) {
+                arg = "rdinit=/sbin/init ";
+                len = strlen(arg);
+                if (len > remain)
+                        goto fail;
+                strcat(arcs_cmdline, arg);
+                remain -= len;
+        }
+#endif
+        return;
+fail:
+        panic("Cannot add %s, command line too big!", arg);
+}
+
+static void prom_add_memory(void)
+{
+        struct nlm_boot_mem_map *bootm;
+        u64 start, size;
+        u64 pref_backup = 512;  /* avoid pref walking beyond end */
+        int i;
+
+        bootm = (void *)(long)nlm_prom_info.psb_mem_map;
+        for (i = 0; i < bootm->nr_map; i++) {
+                if (bootm->map[i].type != BOOT_MEM_RAM)
+                        continue;
+                start = bootm->map[i].addr;
+                size   = bootm->map[i].size;
+
+                /* Work around for using bootloader mem */
+                if (i == 0 && start == 0 && size == 0x0c000000)
+                        size = 0x0ff00000;
+
+                add_memory_region(start, size - pref_backup, BOOT_MEM_RAM);
+        }
+}
+
+void __init prom_init(void)
+{
+        int *argv, *envp;               /* passed as 32 bit ptrs */
+        struct psb_info *prom_infop;
+
+        /* truncate to 32 bit and sign extend all args */
+        argv = (int *)(long)(int)fw_arg1;
+        envp = (int *)(long)(int)fw_arg2;
+        prom_infop = (struct psb_info *)(long)(int)fw_arg3;
+
+        nlm_prom_info = *prom_infop;
+
+        nlm_early_serial_setup();
+        build_arcs_cmdline(argv);
+        nlm_common_ebase = read_c0_ebase() & (~((1 << 12) - 1));
+        prom_add_memory();
+
+#ifdef CONFIG_SMP
+        nlm_wakeup_secondary_cpus(nlm_prom_info.online_cpu_map);
+        register_smp_ops(&nlm_smp_ops);
+#endif
+}
diff --git a/arch/mips/netlogic/xlr/smp.c b/arch/mips/netlogic/xlr/smp.c
new file mode 100644
index 000000000000..b495a7f1433b
--- /dev/null
+++ b/arch/mips/netlogic/xlr/smp.c
@@ -0,0 +1,225 @@
+/*
+ * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
+ * reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the NetLogic
+ * license below:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/smp.h>
+#include <linux/irq.h>
+
+#include <asm/mmu_context.h>
+
+#include <asm/netlogic/interrupt.h>
+#include <asm/netlogic/mips-extns.h>
+
+#include <asm/netlogic/xlr/iomap.h>
+#include <asm/netlogic/xlr/pic.h>
+#include <asm/netlogic/xlr/xlr.h>
+
+void core_send_ipi(int logical_cpu, unsigned int action)
+{
+        int cpu = cpu_logical_map(logical_cpu);
+        u32 tid = cpu & 0x3;
+        u32 pid = (cpu >> 2) & 0x07;
+        u32 ipi = (tid << 16) | (pid << 20);
+
+        if (action & SMP_CALL_FUNCTION)
+                ipi |= IRQ_IPI_SMP_FUNCTION;
+        else if (action & SMP_RESCHEDULE_YOURSELF)
+                ipi |= IRQ_IPI_SMP_RESCHEDULE;
+        else
+                return;
+
+        pic_send_ipi(ipi);
+}
+
+void nlm_send_ipi_single(int cpu, unsigned int action)
+{
+        core_send_ipi(cpu, action);
+}
+
+void nlm_send_ipi_mask(const struct cpumask *mask, unsigned int action)
+{
+        int cpu;
+
+        for_each_cpu(cpu, mask) {
+                core_send_ipi(cpu, action);
+        }
+}
+
+/* IRQ_IPI_SMP_FUNCTION Handler */
+void nlm_smp_function_ipi_handler(unsigned int irq, struct irq_desc *desc)
+{
+        smp_call_function_interrupt();
+}
+
+/* IRQ_IPI_SMP_RESCHEDULE  handler */
+void nlm_smp_resched_ipi_handler(unsigned int irq, struct irq_desc *desc)
+{
+        set_need_resched();
+}
+
+void nlm_common_ipi_handler(int irq, struct pt_regs *regs)
+{
+        if (irq == IRQ_IPI_SMP_FUNCTION) {
+                smp_call_function_interrupt();
+        } else {
+                /* Announce that we are for reschduling */
+                set_need_resched();
+        }
+}
+
+/*
+ * Called before going into mips code, early cpu init
+ */
+void nlm_early_init_secondary(void)
+{
+        write_c0_ebase((uint32_t)nlm_common_ebase);
+        /* TLB partition here later */
+}
+
+/*
+ * Code to run on secondary just after probing the CPU
+ */
+static void __cpuinit nlm_init_secondary(void)
+{
+        nlm_smp_irq_init();
+}
+
+void nlm_smp_finish(void)
+{
+#ifdef notyet
+        nlm_common_msgring_cpu_init();
+#endif
+}
+
+void nlm_cpus_done(void)
+{
+}
+
+/*
+ * Boot all other cpus in the system, initialize them, and bring them into
+ * the boot function
+ */
+int nlm_cpu_unblock[NR_CPUS];
+int nlm_cpu_ready[NR_CPUS];
+unsigned long nlm_next_gp;
+unsigned long nlm_next_sp;
+cpumask_t phys_cpu_present_map;
+
+void nlm_boot_secondary(int logical_cpu, struct task_struct *idle)
+{
+        unsigned long gp = (unsigned long)task_thread_info(idle);
+        unsigned long sp = (unsigned long)__KSTK_TOS(idle);
+        int cpu = cpu_logical_map(logical_cpu);
+
+        nlm_next_sp = sp;
+        nlm_next_gp = gp;
+
+        /* barrier */
+        __sync();
+        nlm_cpu_unblock[cpu] = 1;
+}
+
+void __init nlm_smp_setup(void)
+{
+        unsigned int boot_cpu;
+        int num_cpus, i;
+
+        boot_cpu = hard_smp_processor_id();
+        cpus_clear(phys_cpu_present_map);
+
+        cpu_set(boot_cpu, phys_cpu_present_map);
+        __cpu_number_map[boot_cpu] = 0;
+        __cpu_logical_map[0] = boot_cpu;
+        cpu_set(0, cpu_possible_map);
+
+        num_cpus = 1;
+        for (i = 0; i < NR_CPUS; i++) {
+                if (nlm_cpu_ready[i]) {
+                        cpu_set(i, phys_cpu_present_map);
+                        __cpu_number_map[i] = num_cpus;
+                        __cpu_logical_map[num_cpus] = i;
+                        cpu_set(num_cpus, cpu_possible_map);
+                        ++num_cpus;
+                }
+        }
+
+        pr_info("Phys CPU present map: %lx, possible map %lx\n",
+                (unsigned long)phys_cpu_present_map.bits[0],
+                (unsigned long)cpu_possible_map.bits[0]);
+
+        pr_info("Detected %i Slave CPU(s)\n", num_cpus);
+}
+
+void nlm_prepare_cpus(unsigned int max_cpus)
+{
+}
+
+struct plat_smp_ops nlm_smp_ops = {
+        .send_ipi_single        = nlm_send_ipi_single,
+        .send_ipi_mask          = nlm_send_ipi_mask,
+        .init_secondary         = nlm_init_secondary,
+        .smp_finish             = nlm_smp_finish,
+        .cpus_done              = nlm_cpus_done,
+        .boot_secondary         = nlm_boot_secondary,
+        .smp_setup              = nlm_smp_setup,
+        .prepare_cpus           = nlm_prepare_cpus,
+};
+
+unsigned long secondary_entry_point;
+
+int nlm_wakeup_secondary_cpus(u32 wakeup_mask)
+{
+        unsigned int tid, pid, ipi, i, boot_cpu;
+        void *reset_vec;
+
+        secondary_entry_point = (unsigned long)prom_pre_boot_secondary_cpus;
+        reset_vec = (void *)CKSEG1ADDR(0x1fc00000);
+        memcpy(reset_vec, nlm_boot_smp_nmi, 0x80);
+        boot_cpu = hard_smp_processor_id();
+
+        for (i = 0; i < NR_CPUS; i++) {
+                if (i == boot_cpu)
+                        continue;
+                if (wakeup_mask & (1u << i)) {
+                        tid = i & 0x3;
+                        pid = (i >> 2) & 0x7;
+                        ipi = (tid << 16) | (pid << 20) | (1 << 8);
+                        pic_send_ipi(ipi);
+                }
+        }
+
+        return 0;
+}
diff --git a/arch/mips/netlogic/xlr/smpboot.S b/arch/mips/netlogic/xlr/smpboot.S
new file mode 100644
index 000000000000..b8e074402c99
--- /dev/null
+++ b/arch/mips/netlogic/xlr/smpboot.S
@@ -0,0 +1,94 @@
+/*
+ * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
+ * reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the NetLogic
+ * license below:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <asm/asm.h>
+#include <asm/asm-offsets.h>
+#include <asm/regdef.h>
+#include <asm/mipsregs.h>
+
+
+/* Don't jump to linux function from Bootloader stack. Change it
+ * here. Kernel might allocate bootloader memory before all the CPUs are
+ * brought up (eg: Inode cache region) and we better don't overwrite this
+ * memory
+ */
+NESTED(prom_pre_boot_secondary_cpus, 16, sp)
+        .set    mips64
+        mfc0    t0, $15, 1      # read ebase
+        andi    t0, 0x1f        # t0 has the processor_id()
+        sll     t0, 2           # offset in cpu array
+
+        PTR_LA  t1, nlm_cpu_ready # mark CPU ready
+        PTR_ADDU t1, t0
+        li      t2, 1
+        sw      t2, 0(t1)
+
+        PTR_LA  t1, nlm_cpu_unblock
+        PTR_ADDU t1, t0
+1:      lw      t2, 0(t1)       # wait till unblocked
+        beqz    t2, 1b
+        nop
+
+        PTR_LA  t1, nlm_next_sp
+        PTR_L   sp, 0(t1)
+        PTR_LA  t1, nlm_next_gp
+        PTR_L   gp, 0(t1)
+
+        PTR_LA  t0, nlm_early_init_secondary
+        jalr    t0
+        nop
+
+        PTR_LA  t0, smp_bootstrap
+        jr      t0
+        nop
+END(prom_pre_boot_secondary_cpus)
+
+NESTED(nlm_boot_smp_nmi, 0, sp)
+        .set push
+        .set noat
+        .set mips64
+        .set noreorder
+
+        /* Clear the  NMI and BEV bits */
+        MFC0    k0, CP0_STATUS
+        li      k1, 0xffb7ffff
+        and     k0, k0, k1
+        MTC0    k0, CP0_STATUS
+
+        PTR_LA  k1, secondary_entry_point
+        PTR_L   k0, 0(k1)
+        jr      k0
+        nop
+        .set pop
+END(nlm_boot_smp_nmi)
diff --git a/arch/mips/netlogic/xlr/time.c b/arch/mips/netlogic/xlr/time.c
new file mode 100644
index 000000000000..0d81b262593c
--- /dev/null
+++ b/arch/mips/netlogic/xlr/time.c
@@ -0,0 +1,51 @@
+/*
+ * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
+ * reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the NetLogic
+ * license below:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/init.h>
+
+#include <asm/time.h>
+#include <asm/netlogic/interrupt.h>
+#include <asm/netlogic/psb-bootinfo.h>
+
+unsigned int __cpuinit get_c0_compare_int(void)
+{
+        return IRQ_TIMER;
+}
+
+void __init plat_time_init(void)
+{
+        mips_hpt_frequency = nlm_prom_info.cpu_frequency;
+        pr_info("MIPS counter frequency [%ld]\n",
+                (unsigned long)mips_hpt_frequency);
+}
diff --git a/arch/mips/netlogic/xlr/xlr_console.c b/arch/mips/netlogic/xlr/xlr_console.c
new file mode 100644
index 000000000000..759df0692201
--- /dev/null
+++ b/arch/mips/netlogic/xlr/xlr_console.c
@@ -0,0 +1,46 @@
+/*
+ * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
+ * reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the NetLogic
+ * license below:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/types.h>
+#include <asm/netlogic/xlr/iomap.h>
+
+void prom_putchar(char c)
+{
+        nlm_reg_t *mmio;
+
+        mmio = netlogic_io_mmio(NETLOGIC_IO_UART_0_OFFSET);
+        while (netlogic_read_reg(mmio, 0x5) == 0)
+                ;
+        netlogic_write_reg(mmio, 0x0, c);
+}
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index c9209ca6c8e7..4df879937446 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_SIBYTE_SB1250)	+= fixup-sb1250.o pci-sb1250.o
 obj-$(CONFIG_SIBYTE_BCM112X)    += fixup-sb1250.o pci-sb1250.o
 obj-$(CONFIG_SIBYTE_BCM1x80)    += pci-bcm1480.o pci-bcm1480ht.o
 obj-$(CONFIG_SNI_RM)            += fixup-sni.o ops-sni.o
+obj-$(CONFIG_SOC_XWAY)          += pci-lantiq.o ops-lantiq.o
 obj-$(CONFIG_TANBAC_TB0219)     += fixup-tb0219.o
 obj-$(CONFIG_TANBAC_TB0226)     += fixup-tb0226.o
 obj-$(CONFIG_TANBAC_TB0287)     += fixup-tb0287.o
@@ -55,6 +56,7 @@ obj-$(CONFIG_ZAO_CAPCELLA)	+= fixup-capcella.o
 obj-$(CONFIG_WR_PPMC)           += fixup-wrppmc.o
 obj-$(CONFIG_MIKROTIK_RB532)    += pci-rc32434.o ops-rc32434.o fixup-rc32434.o
 obj-$(CONFIG_CPU_CAVIUM_OCTEON) += pci-octeon.o pcie-octeon.o
+obj-$(CONFIG_NLM_XLR)           += pci-xlr.o
 
 ifdef CONFIG_PCI_MSI
 obj-$(CONFIG_CPU_CAVIUM_OCTEON) += msi-octeon.o
diff --git a/arch/mips/pci/ops-lantiq.c b/arch/mips/pci/ops-lantiq.c
new file mode 100644
index 000000000000..1f2afb55cc71
--- /dev/null
+++ b/arch/mips/pci/ops-lantiq.c
@@ -0,0 +1,116 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/mm.h>
+#include <asm/addrspace.h>
+#include <linux/vmalloc.h>
+
+#include <lantiq_soc.h>
+
+#include "pci-lantiq.h"
+
+#define LTQ_PCI_CFG_BUSNUM_SHF 16
+#define LTQ_PCI_CFG_DEVNUM_SHF 11
+#define LTQ_PCI_CFG_FUNNUM_SHF 8
+
+#define PCI_ACCESS_READ  0
+#define PCI_ACCESS_WRITE 1
+
+static int ltq_pci_config_access(unsigned char access_type, struct pci_bus *bus,
+        unsigned int devfn, unsigned int where, u32 *data)
+{
+        unsigned long cfg_base;
+        unsigned long flags;
+        u32 temp;
+
+        /* we support slot from 0 to 15 dev_fn & 0x68 (AD29) is the
+           SoC itself */
+        if ((bus->number != 0) || ((devfn & 0xf8) > 0x78)
+                || ((devfn & 0xf8) == 0) || ((devfn & 0xf8) == 0x68))
+                return 1;
+
+        spin_lock_irqsave(&ebu_lock, flags);
+
+        cfg_base = (unsigned long) ltq_pci_mapped_cfg;
+        cfg_base |= (bus->number << LTQ_PCI_CFG_BUSNUM_SHF) | (devfn <<
+                        LTQ_PCI_CFG_FUNNUM_SHF) | (where & ~0x3);
+
+        /* Perform access */
+        if (access_type == PCI_ACCESS_WRITE) {
+                ltq_w32(swab32(*data), ((u32 *)cfg_base));
+        } else {
+                *data = ltq_r32(((u32 *)(cfg_base)));
+                *data = swab32(*data);
+        }
+        wmb();
+
+        /* clean possible Master abort */
+        cfg_base = (unsigned long) ltq_pci_mapped_cfg;
+        cfg_base |= (0x0 << LTQ_PCI_CFG_FUNNUM_SHF) + 4;
+        temp = ltq_r32(((u32 *)(cfg_base)));
+        temp = swab32(temp);
+        cfg_base = (unsigned long) ltq_pci_mapped_cfg;
+        cfg_base |= (0x68 << LTQ_PCI_CFG_FUNNUM_SHF) + 4;
+        ltq_w32(temp, ((u32 *)cfg_base));
+
+        spin_unlock_irqrestore(&ebu_lock, flags);
+
+        if (((*data) == 0xffffffff) && (access_type == PCI_ACCESS_READ))
+                return 1;
+
+        return 0;
+}
+
+int ltq_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn,
+        int where, int size, u32 *val)
+{
+        u32 data = 0;
+
+        if (ltq_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
+                return PCIBIOS_DEVICE_NOT_FOUND;
+
+        if (size == 1)
+                *val = (data >> ((where & 3) << 3)) & 0xff;
+        else if (size == 2)
+                *val = (data >> ((where & 3) << 3)) & 0xffff;
+        else
+                *val = data;
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+int ltq_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn,
+        int where, int size, u32 val)
+{
+        u32 data = 0;
+
+        if (size == 4) {
+                data = val;
+        } else {
+                if (ltq_pci_config_access(PCI_ACCESS_READ, bus,
+                                devfn, where, &data))
+                        return PCIBIOS_DEVICE_NOT_FOUND;
+
+                if (size == 1)
+                        data = (data & ~(0xff << ((where & 3) << 3))) |
+                                (val << ((where & 3) << 3));
+                else if (size == 2)
+                        data = (data & ~(0xffff << ((where & 3) << 3))) |
+                                (val << ((where & 3) << 3));
+        }
+
+        if (ltq_pci_config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
+                return PCIBIOS_DEVICE_NOT_FOUND;
+
+        return PCIBIOS_SUCCESSFUL;
+}
diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c
new file mode 100644
index 000000000000..603d7493e966
--- /dev/null
+++ b/arch/mips/pci/pci-lantiq.c
@@ -0,0 +1,297 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/mm.h>
+#include <linux/vmalloc.h>
+#include <linux/platform_device.h>
+
+#include <asm/pci.h>
+#include <asm/gpio.h>
+#include <asm/addrspace.h>
+
+#include <lantiq_soc.h>
+#include <lantiq_irq.h>
+#include <lantiq_platform.h>
+
+#include "pci-lantiq.h"
+
+#define LTQ_PCI_CFG_BASE                0x17000000
+#define LTQ_PCI_CFG_SIZE                0x00008000
+#define LTQ_PCI_MEM_BASE                0x18000000
+#define LTQ_PCI_MEM_SIZE                0x02000000
+#define LTQ_PCI_IO_BASE                 0x1AE00000
+#define LTQ_PCI_IO_SIZE                 0x00200000
+
+#define PCI_CR_FCI_ADDR_MAP0            0x00C0
+#define PCI_CR_FCI_ADDR_MAP1            0x00C4
+#define PCI_CR_FCI_ADDR_MAP2            0x00C8
+#define PCI_CR_FCI_ADDR_MAP3            0x00CC
+#define PCI_CR_FCI_ADDR_MAP4            0x00D0
+#define PCI_CR_FCI_ADDR_MAP5            0x00D4
+#define PCI_CR_FCI_ADDR_MAP6            0x00D8
+#define PCI_CR_FCI_ADDR_MAP7            0x00DC
+#define PCI_CR_CLK_CTRL                 0x0000
+#define PCI_CR_PCI_MOD                  0x0030
+#define PCI_CR_PC_ARB                   0x0080
+#define PCI_CR_FCI_ADDR_MAP11hg         0x00E4
+#define PCI_CR_BAR11MASK                0x0044
+#define PCI_CR_BAR12MASK                0x0048
+#define PCI_CR_BAR13MASK                0x004C
+#define PCI_CS_BASE_ADDR1               0x0010
+#define PCI_CR_PCI_ADDR_MAP11           0x0064
+#define PCI_CR_FCI_BURST_LENGTH         0x00E8
+#define PCI_CR_PCI_EOI                  0x002C
+#define PCI_CS_STS_CMD                  0x0004
+
+#define PCI_MASTER0_REQ_MASK_2BITS      8
+#define PCI_MASTER1_REQ_MASK_2BITS      10
+#define PCI_MASTER2_REQ_MASK_2BITS      12
+#define INTERNAL_ARB_ENABLE_BIT         0
+
+#define LTQ_CGU_IFCCR           0x0018
+#define LTQ_CGU_PCICR           0x0034
+
+#define ltq_pci_w32(x, y)       ltq_w32((x), ltq_pci_membase + (y))
+#define ltq_pci_r32(x)          ltq_r32(ltq_pci_membase + (x))
+
+#define ltq_pci_cfg_w32(x, y)   ltq_w32((x), ltq_pci_mapped_cfg + (y))
+#define ltq_pci_cfg_r32(x)      ltq_r32(ltq_pci_mapped_cfg + (x))
+
+struct ltq_pci_gpio_map {
+        int pin;
+        int alt0;
+        int alt1;
+        int dir;
+        char *name;
+};
+
+/* the pci core can make use of the following gpios */
+static struct ltq_pci_gpio_map ltq_pci_gpio_map[] = {
+        { 0, 1, 0, 0, "pci-exin0" },
+        { 1, 1, 0, 0, "pci-exin1" },
+        { 2, 1, 0, 0, "pci-exin2" },
+        { 39, 1, 0, 0, "pci-exin3" },
+        { 10, 1, 0, 0, "pci-exin4" },
+        { 9, 1, 0, 0, "pci-exin5" },
+        { 30, 1, 0, 1, "pci-gnt1" },
+        { 23, 1, 0, 1, "pci-gnt2" },
+        { 19, 1, 0, 1, "pci-gnt3" },
+        { 38, 1, 0, 1, "pci-gnt4" },
+        { 29, 1, 0, 0, "pci-req1" },
+        { 31, 1, 0, 0, "pci-req2" },
+        { 3, 1, 0, 0, "pci-req3" },
+        { 37, 1, 0, 0, "pci-req4" },
+};
+
+__iomem void *ltq_pci_mapped_cfg;
+static __iomem void *ltq_pci_membase;
+
+int (*ltqpci_plat_dev_init)(struct pci_dev *dev) = NULL;
+
+/* Since the PCI REQ pins can be reused for other functionality, make it
+   possible to exclude those from interpretation by the PCI controller */
+static int ltq_pci_req_mask = 0xf;
+
+static int *ltq_pci_irq_map;
+
+struct pci_ops ltq_pci_ops = {
+        .read   = ltq_pci_read_config_dword,
+        .write  = ltq_pci_write_config_dword
+};
+
+static struct resource pci_io_resource = {
+        .name   = "pci io space",
+        .start  = LTQ_PCI_IO_BASE,
+        .end    = LTQ_PCI_IO_BASE + LTQ_PCI_IO_SIZE - 1,
+        .flags  = IORESOURCE_IO
+};
+
+static struct resource pci_mem_resource = {
+        .name   = "pci memory space",
+        .start  = LTQ_PCI_MEM_BASE,
+        .end    = LTQ_PCI_MEM_BASE + LTQ_PCI_MEM_SIZE - 1,
+        .flags  = IORESOURCE_MEM
+};
+
+static struct pci_controller ltq_pci_controller = {
+        .pci_ops        = &ltq_pci_ops,
+        .mem_resource   = &pci_mem_resource,
+        .mem_offset     = 0x00000000UL,
+        .io_resource    = &pci_io_resource,
+        .io_offset      = 0x00000000UL,
+};
+
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+        if (ltqpci_plat_dev_init)
+                return ltqpci_plat_dev_init(dev);
+
+        return 0;
+}
+
+static u32 ltq_calc_bar11mask(void)
+{
+        u32 mem, bar11mask;
+
+        /* BAR11MASK value depends on available memory on system. */
+        mem = num_physpages * PAGE_SIZE;
+        bar11mask = (0x0ffffff0 & ~((1 << (fls(mem) - 1)) - 1)) | 8;
+
+        return bar11mask;
+}
+
+static void ltq_pci_setup_gpio(int gpio)
+{
+        int i;
+        for (i = 0; i < ARRAY_SIZE(ltq_pci_gpio_map); i++) {
+                if (gpio & (1 << i)) {
+                        ltq_gpio_request(ltq_pci_gpio_map[i].pin,
+                                ltq_pci_gpio_map[i].alt0,
+                                ltq_pci_gpio_map[i].alt1,
+                                ltq_pci_gpio_map[i].dir,
+                                ltq_pci_gpio_map[i].name);
+                }
+        }
+        ltq_gpio_request(21, 0, 0, 1, "pci-reset");
+        ltq_pci_req_mask = (gpio >> PCI_REQ_SHIFT) & PCI_REQ_MASK;
+}
+
+static int __devinit ltq_pci_startup(struct ltq_pci_data *conf)
+{
+        u32 temp_buffer;
+
+        /* set clock to 33Mhz */
+        ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) & ~0xf00000, LTQ_CGU_IFCCR);
+        ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | 0x800000, LTQ_CGU_IFCCR);
+
+        /* external or internal clock ? */
+        if (conf->clock) {
+                ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) & ~(1 << 16),
+                        LTQ_CGU_IFCCR);
+                ltq_cgu_w32((1 << 30), LTQ_CGU_PCICR);
+        } else {
+                ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | (1 << 16),
+                        LTQ_CGU_IFCCR);
+                ltq_cgu_w32((1 << 31) | (1 << 30), LTQ_CGU_PCICR);
+        }
+
+        /* setup pci clock and gpis used by pci */
+        ltq_pci_setup_gpio(conf->gpio);
+
+        /* enable auto-switching between PCI and EBU */
+        ltq_pci_w32(0xa, PCI_CR_CLK_CTRL);
+
+        /* busy, i.e. configuration is not done, PCI access has to be retried */
+        ltq_pci_w32(ltq_pci_r32(PCI_CR_PCI_MOD) & ~(1 << 24), PCI_CR_PCI_MOD);
+        wmb();
+        /* BUS Master/IO/MEM access */
+        ltq_pci_cfg_w32(ltq_pci_cfg_r32(PCI_CS_STS_CMD) | 7, PCI_CS_STS_CMD);
+
+        /* enable external 2 PCI masters */
+        temp_buffer = ltq_pci_r32(PCI_CR_PC_ARB);
+        temp_buffer &= (~(ltq_pci_req_mask << 16));
+        /* enable internal arbiter */
+        temp_buffer |= (1 << INTERNAL_ARB_ENABLE_BIT);
+        /* enable internal PCI master reqest */
+        temp_buffer &= (~(3 << PCI_MASTER0_REQ_MASK_2BITS));
+
+        /* enable EBU request */
+        temp_buffer &= (~(3 << PCI_MASTER1_REQ_MASK_2BITS));
+
+        /* enable all external masters request */
+        temp_buffer &= (~(3 << PCI_MASTER2_REQ_MASK_2BITS));
+        ltq_pci_w32(temp_buffer, PCI_CR_PC_ARB);
+        wmb();
+
+        /* setup BAR memory regions */
+        ltq_pci_w32(0x18000000, PCI_CR_FCI_ADDR_MAP0);
+        ltq_pci_w32(0x18400000, PCI_CR_FCI_ADDR_MAP1);
+        ltq_pci_w32(0x18800000, PCI_CR_FCI_ADDR_MAP2);
+        ltq_pci_w32(0x18c00000, PCI_CR_FCI_ADDR_MAP3);
+        ltq_pci_w32(0x19000000, PCI_CR_FCI_ADDR_MAP4);
+        ltq_pci_w32(0x19400000, PCI_CR_FCI_ADDR_MAP5);
+        ltq_pci_w32(0x19800000, PCI_CR_FCI_ADDR_MAP6);
+        ltq_pci_w32(0x19c00000, PCI_CR_FCI_ADDR_MAP7);
+        ltq_pci_w32(0x1ae00000, PCI_CR_FCI_ADDR_MAP11hg);
+        ltq_pci_w32(ltq_calc_bar11mask(), PCI_CR_BAR11MASK);
+        ltq_pci_w32(0, PCI_CR_PCI_ADDR_MAP11);
+        ltq_pci_w32(0, PCI_CS_BASE_ADDR1);
+        /* both TX and RX endian swap are enabled */
+        ltq_pci_w32(ltq_pci_r32(PCI_CR_PCI_EOI) | 3, PCI_CR_PCI_EOI);
+        wmb();
+        ltq_pci_w32(ltq_pci_r32(PCI_CR_BAR12MASK) | 0x80000000,
+                PCI_CR_BAR12MASK);
+        ltq_pci_w32(ltq_pci_r32(PCI_CR_BAR13MASK) | 0x80000000,
+                PCI_CR_BAR13MASK);
+        /*use 8 dw burst length */
+        ltq_pci_w32(0x303, PCI_CR_FCI_BURST_LENGTH);
+        ltq_pci_w32(ltq_pci_r32(PCI_CR_PCI_MOD) | (1 << 24), PCI_CR_PCI_MOD);
+        wmb();
+
+        /* setup irq line */
+        ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_PCC_CON) | 0xc, LTQ_EBU_PCC_CON);
+        ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_PCC_IEN) | 0x10, LTQ_EBU_PCC_IEN);
+
+        /* toggle reset pin */
+        __gpio_set_value(21, 0);
+        wmb();
+        mdelay(1);
+        __gpio_set_value(21, 1);
+        return 0;
+}
+
+int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+        if (ltq_pci_irq_map[slot])
+                return ltq_pci_irq_map[slot];
+        printk(KERN_ERR "lq_pci: trying to map irq for unknown slot %d\n",
+                slot);
+
+        return 0;
+}
+
+static int __devinit ltq_pci_probe(struct platform_device *pdev)
+{
+        struct ltq_pci_data *ltq_pci_data =
+                (struct ltq_pci_data *) pdev->dev.platform_data;
+        pci_probe_only = 0;
+        ltq_pci_irq_map = ltq_pci_data->irq;
+        ltq_pci_membase = ioremap_nocache(PCI_CR_BASE_ADDR, PCI_CR_SIZE);
+        ltq_pci_mapped_cfg =
+                ioremap_nocache(LTQ_PCI_CFG_BASE, LTQ_PCI_CFG_BASE);
+        ltq_pci_controller.io_map_base =
+                (unsigned long)ioremap(LTQ_PCI_IO_BASE, LTQ_PCI_IO_SIZE - 1);
+        ltq_pci_startup(ltq_pci_data);
+        register_pci_controller(&ltq_pci_controller);
+
+        return 0;
+}
+
+static struct platform_driver
+ltq_pci_driver = {
+        .probe = ltq_pci_probe,
+        .driver = {
+                .name = "ltq_pci",
+                .owner = THIS_MODULE,
+        },
+};
+
+int __init pcibios_init(void)
+{
+        int ret = platform_driver_register(&ltq_pci_driver);
+        if (ret)
+                printk(KERN_INFO "ltq_pci: Error registering platfom driver!");
+        return ret;
+}
+
+arch_initcall(pcibios_init);
diff --git a/arch/mips/pci/pci-lantiq.h b/arch/mips/pci/pci-lantiq.h
new file mode 100644
index 000000000000..66bf6cd6be3c
--- /dev/null
+++ b/arch/mips/pci/pci-lantiq.h
@@ -0,0 +1,18 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#ifndef _LTQ_PCI_H__
+#define _LTQ_PCI_H__
+
+extern __iomem void *ltq_pci_mapped_cfg;
+extern int ltq_pci_read_config_dword(struct pci_bus *bus,
+        unsigned int devfn, int where, int size, u32 *val);
+extern int ltq_pci_write_config_dword(struct pci_bus *bus,
+        unsigned int devfn, int where, int size, u32 val);
+
+#endif
diff --git a/arch/mips/pci/pci-xlr.c b/arch/mips/pci/pci-xlr.c
new file mode 100644
index 000000000000..38fece16c435
--- /dev/null
+++ b/arch/mips/pci/pci-xlr.c
@@ -0,0 +1,214 @@
+/*
+ * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
+ * reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the NetLogic
+ * license below:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+
+#include <asm/io.h>
+
+#include <asm/netlogic/interrupt.h>
+#include <asm/netlogic/xlr/iomap.h>
+#include <asm/netlogic/xlr/pic.h>
+#include <asm/netlogic/xlr/xlr.h>
+
+static void *pci_config_base;
+
+#define pci_cfg_addr(bus, devfn, off) (((bus) << 16) | ((devfn) << 8) | (off))
+
+/* PCI ops */
+static inline u32 pci_cfg_read_32bit(struct pci_bus *bus, unsigned int devfn,
+        int where)
+{
+        u32 data;
+        u32 *cfgaddr;
+
+        cfgaddr = (u32 *)(pci_config_base +
+                        pci_cfg_addr(bus->number, devfn, where & ~3));
+        data = *cfgaddr;
+        return cpu_to_le32(data);
+}
+
+static inline void pci_cfg_write_32bit(struct pci_bus *bus, unsigned int devfn,
+        int where, u32 data)
+{
+        u32 *cfgaddr;
+
+        cfgaddr = (u32 *)(pci_config_base +
+                        pci_cfg_addr(bus->number, devfn, where & ~3));
+        *cfgaddr = cpu_to_le32(data);
+}
+
+static int nlm_pcibios_read(struct pci_bus *bus, unsigned int devfn,
+        int where, int size, u32 *val)
+{
+        u32 data;
+
+        if ((size == 2) && (where & 1))
+                return PCIBIOS_BAD_REGISTER_NUMBER;
+        else if ((size == 4) && (where & 3))
+                return PCIBIOS_BAD_REGISTER_NUMBER;
+
+        data = pci_cfg_read_32bit(bus, devfn, where);
+
+        if (size == 1)
+                *val = (data >> ((where & 3) << 3)) & 0xff;
+        else if (size == 2)
+                *val = (data >> ((where & 3) << 3)) & 0xffff;
+        else
+                *val = data;
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+
+static int nlm_pcibios_write(struct pci_bus *bus, unsigned int devfn,
+                int where, int size, u32 val)
+{
+        u32 data;
+
+        if ((size == 2) && (where & 1))
+                return PCIBIOS_BAD_REGISTER_NUMBER;
+        else if ((size == 4) && (where & 3))
+                return PCIBIOS_BAD_REGISTER_NUMBER;
+
+        data = pci_cfg_read_32bit(bus, devfn, where);
+
+        if (size == 1)
+                data = (data & ~(0xff << ((where & 3) << 3))) |
+                        (val << ((where & 3) << 3));
+        else if (size == 2)
+                data = (data & ~(0xffff << ((where & 3) << 3))) |
+                        (val << ((where & 3) << 3));
+        else
+                data = val;
+
+        pci_cfg_write_32bit(bus, devfn, where, data);
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+struct pci_ops nlm_pci_ops = {
+        .read  = nlm_pcibios_read,
+        .write = nlm_pcibios_write
+};
+
+static struct resource nlm_pci_mem_resource = {
+        .name           = "XLR PCI MEM",
+        .start          = 0xd0000000UL, /* 256MB PCI mem @ 0xd000_0000 */
+        .end            = 0xdfffffffUL,
+        .flags          = IORESOURCE_MEM,
+};
+
+static struct resource nlm_pci_io_resource = {
+        .name           = "XLR IO MEM",
+        .start          = 0x10000000UL, /* 16MB PCI IO @ 0x1000_0000 */
+        .end            = 0x100fffffUL,
+        .flags          = IORESOURCE_IO,
+};
+
+struct pci_controller nlm_pci_controller = {
+        .index          = 0,
+        .pci_ops        = &nlm_pci_ops,
+        .mem_resource   = &nlm_pci_mem_resource,
+        .mem_offset     = 0x00000000UL,
+        .io_resource    = &nlm_pci_io_resource,
+        .io_offset      = 0x00000000UL,
+};
+
+int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+        if (!nlm_chip_is_xls())
+                return  PIC_PCIX_IRQ;   /* for XLR just one IRQ*/
+
+        /*
+         * For XLS PCIe, there is an IRQ per Link, find out which
+         * link the device is on to assign interrupts
+        */
+        if (dev->bus->self == NULL)
+                return 0;
+
+        switch  (dev->bus->self->devfn) {
+        case 0x0:
+                return PIC_PCIE_LINK0_IRQ;
+        case 0x8:
+                return PIC_PCIE_LINK1_IRQ;
+        case 0x10:
+                if (nlm_chip_is_xls_b())
+                        return PIC_PCIE_XLSB0_LINK2_IRQ;
+                else
+                        return PIC_PCIE_LINK2_IRQ;
+        case 0x18:
+                if (nlm_chip_is_xls_b())
+                        return PIC_PCIE_XLSB0_LINK3_IRQ;
+                else
+                        return PIC_PCIE_LINK3_IRQ;
+        }
+        WARN(1, "Unexpected devfn %d\n", dev->bus->self->devfn);
+        return 0;
+}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+        return 0;
+}
+
+static int __init pcibios_init(void)
+{
+        /* PSB assigns PCI resources */
+        pci_probe_only = 1;
+        pci_config_base = ioremap(DEFAULT_PCI_CONFIG_BASE, 16 << 20);
+
+        /* Extend IO port for memory mapped io */
+        ioport_resource.start =  0;
+        ioport_resource.end   = ~0;
+
+        set_io_port_base(CKSEG1);
+        nlm_pci_controller.io_map_base = CKSEG1;
+
+        pr_info("Registering XLR/XLS PCIX/PCIE Controller.\n");
+        register_pci_controller(&nlm_pci_controller);
+
+        return 0;
+}
+
+arch_initcall(pcibios_init);
+
+struct pci_fixup pcibios_fixups[] = {
+        {0}
+};
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c b/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c
index f9b9dcdfa9dd..98fd0099d964 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c
@@ -97,7 +97,7 @@ static int msp_per_irq_set_affinity(struct irq_data *d,
 
 static struct irq_chip msp_per_irq_controller = {
         .name = "MSP_PER",
-        .irq_enable = unmask_per_irq.
+        .irq_enable = unmask_per_irq,
         .irq_disable = mask_per_irq,
         .irq_ack = msp_per_irq_ack,
 #ifdef CONFIG_SMP
diff --git a/arch/mips/power/hibernate.S b/arch/mips/power/hibernate.S
index dbb5c7b4b70f..f8a751c03282 100644
--- a/arch/mips/power/hibernate.S
+++ b/arch/mips/power/hibernate.S
@@ -35,7 +35,7 @@ LEAF(swsusp_arch_resume)
 0:
         PTR_L t1, PBE_ADDRESS(t0)   /* source */
         PTR_L t2, PBE_ORIG_ADDRESS(t0) /* destination */
-        PTR_ADDIU t3, t1, PAGE_SIZE
+        PTR_ADDU t3, t1, PAGE_SIZE
 1:
         REG_L t8, (t1)
         REG_S t8, (t2)
diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c
index 37de05d595e7..6c47dfeb7be3 100644
--- a/arch/mips/rb532/gpio.c
+++ b/arch/mips/rb532/gpio.c
@@ -185,7 +185,7 @@ int __init rb532_gpio_init(void)
         struct resource *r;
 
         r = rb532_gpio_reg0_res;
-        rb532_gpio_chip->regbase = ioremap_nocache(r->start, r->end - r->start);
+        rb532_gpio_chip->regbase = ioremap_nocache(r->start, resource_size(r));
 
         if (!rb532_gpio_chip->regbase) {
                 printk(KERN_ERR "rb532: cannot remap GPIO register 0\n");
diff --git a/arch/mips/sgi-ip22/ip22-platform.c b/arch/mips/sgi-ip22/ip22-platform.c
index deddbf0ebe5c..698904daf901 100644
--- a/arch/mips/sgi-ip22/ip22-platform.c
+++ b/arch/mips/sgi-ip22/ip22-platform.c
@@ -132,7 +132,7 @@ static struct platform_device eth1_device = {
  */
 static int __init sgiseeq_devinit(void)
 {
-        unsigned int tmp;
+        unsigned int pbdma __maybe_unused;
         int res, i;
 
         eth0_pd.hpc = hpc3c0;
@@ -151,7 +151,7 @@ static int __init sgiseeq_devinit(void)
 
         /* Second HPC is missing? */
         if (ip22_is_fullhouse() ||
-            get_dbe(tmp, (unsigned int *)&hpc3c1->pbdma[1]))
+            get_dbe(pbdma, (unsigned int *)&hpc3c1->pbdma[1]))
                 return 0;
 
         sgimc->giopar |= SGIMC_GIOPAR_MASTEREXP1 | SGIMC_GIOPAR_EXP164 |
diff --git a/arch/mips/sgi-ip22/ip22-time.c b/arch/mips/sgi-ip22/ip22-time.c
index 603fc91c1030..1a94c9894188 100644
--- a/arch/mips/sgi-ip22/ip22-time.c
+++ b/arch/mips/sgi-ip22/ip22-time.c
@@ -32,7 +32,7 @@
 static unsigned long dosample(void)
 {
         u32 ct0, ct1;
-        u8 msb, lsb;
+        u8 msb;
 
         /* Start the counter. */
         sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
@@ -46,7 +46,7 @@ static unsigned long dosample(void)
         /* Latch and spin until top byte of counter2 is zero */
         do {
                 writeb(SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT, &sgint->tcword);
-                lsb = readb(&sgint->tcnt2);
+                (void) readb(&sgint->tcnt2);
                 msb = readb(&sgint->tcnt2);
                 ct1 = read_c0_count();
         } while (msb);
diff --git a/arch/mips/sgi-ip27/ip27-hubio.c b/arch/mips/sgi-ip27/ip27-hubio.c
index a1fa4abb3f6a..cd0d5b06cd83 100644
--- a/arch/mips/sgi-ip27/ip27-hubio.c
+++ b/arch/mips/sgi-ip27/ip27-hubio.c
@@ -29,7 +29,6 @@ unsigned long hub_pio_map(cnodeid_t cnode, xwidgetnum_t widget,
                           unsigned long xtalk_addr, size_t size)
 {
         nasid_t nasid = COMPACT_TO_NASID_NODEID(cnode);
-        volatile hubreg_t junk;
         unsigned i;
 
         /* use small-window mapping if possible */
@@ -64,7 +63,7 @@ unsigned long hub_pio_map(cnodeid_t cnode, xwidgetnum_t widget,
                  * after we write it.
                  */
                 IIO_ITTE_PUT(nasid, i, HUB_PIO_MAP_TO_MEM, widget, xtalk_addr);
-                junk = HUB_L(IIO_ITTE_GET(nasid, i));
+                (void) HUB_L(IIO_ITTE_GET(nasid, i));
 
                 return NODE_BWIN_BASE(nasid, widget) + (xtalk_addr % BWIN_SIZE);
         }
diff --git a/arch/mips/sgi-ip27/ip27-klnuma.c b/arch/mips/sgi-ip27/ip27-klnuma.c
index c3d30a88daf3..1d1919a44e88 100644
--- a/arch/mips/sgi-ip27/ip27-klnuma.c
+++ b/arch/mips/sgi-ip27/ip27-klnuma.c
@@ -54,11 +54,8 @@ void __init setup_replication_mask(void)
 
 static __init void set_ktext_source(nasid_t client_nasid, nasid_t server_nasid)
 {
-        cnodeid_t client_cnode;
         kern_vars_t *kvp;
 
-        client_cnode = NASID_TO_COMPACT_NODEID(client_nasid);
-
         kvp = &hub_data(client_nasid)->kern_vars;
 
         KERN_VARS_ADDR(client_nasid) = (unsigned long)kvp;
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index a152538d3c97..3f810c9cbf83 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -66,18 +66,7 @@ static int rt_next_event(unsigned long delta, struct clock_event_device *evt)
 static void rt_set_mode(enum clock_event_mode mode,
                 struct clock_event_device *evt)
 {
-        switch (mode) {
-        case CLOCK_EVT_MODE_ONESHOT:
-                /* The only mode supported */
-                break;
-
-        case CLOCK_EVT_MODE_PERIODIC:
-        case CLOCK_EVT_MODE_UNUSED:
-        case CLOCK_EVT_MODE_SHUTDOWN:
-        case CLOCK_EVT_MODE_RESUME:
-                /* Nothing to do  */
-                break;
-        }
+        /* Nothing to do ...  */
 }
 
 int rt_timer_irq;
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c
index c76151b56568..0904d4d30cb3 100644
--- a/arch/mips/sni/time.c
+++ b/arch/mips/sni/time.c
@@ -95,7 +95,7 @@ static void __init sni_a20r_timer_setup(void)
 static __init unsigned long dosample(void)
 {
         u32 ct0, ct1;
-        volatile u8 msb, lsb;
+        volatile u8 msb;
 
         /* Start the counter. */
         outb_p(0x34, 0x43);
@@ -108,7 +108,7 @@ static __init unsigned long dosample(void)
         /* Latch and spin until top byte of counter0 is zero */
         do {
                 outb(0x00, 0x43);
-                lsb = inb(0x40);
+                (void) inb(0x40);
                 msb = inb(0x40);
                 ct1 = read_c0_count();
         } while (msb);
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index 7005ee0b074d..49baddcdd14e 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -3,7 +3,6 @@
 #ifdef __KERNEL__
 
 #include <linux/irq.h>
-#include <linux/sysdev.h>
 #include <asm/dcr.h>
 #include <asm/msi_bitmap.h>
 
@@ -320,8 +319,6 @@ struct mpic
         /* link */
         struct mpic             *next;
 
-        struct sys_device       sysdev;
-
 #ifdef CONFIG_PM
         struct mpic_irq_save    *save_data;
 #endif
diff --git a/arch/powerpc/platforms/83xx/suspend.c b/arch/powerpc/platforms/83xx/suspend.c
index 188272934cfb..104faa8aa23c 100644
--- a/arch/powerpc/platforms/83xx/suspend.c
+++ b/arch/powerpc/platforms/83xx/suspend.c
@@ -318,17 +318,20 @@ static const struct platform_suspend_ops mpc83xx_suspend_ops = {
         .end = mpc83xx_suspend_end,
 };
 
+static struct of_device_id pmc_match[];
 static int pmc_probe(struct platform_device *ofdev)
 {
+        const struct of_device_id *match;
         struct device_node *np = ofdev->dev.of_node;
         struct resource res;
         struct pmc_type *type;
         int ret = 0;
 
-        if (!ofdev->dev.of_match)
+        match = of_match_device(pmc_match, &ofdev->dev);
+        if (!match)
                 return -EINVAL;
 
-        type = ofdev->dev.of_match->data;
+        type = match->data;
 
         if (!of_device_is_available(np))
                 return -ENODEV;
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index acfaccea5f4f..3675da73623f 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -32,6 +32,7 @@
 #include <linux/io.h>
 #include <linux/mutex.h>
 #include <linux/linux_logo.h>
+#include <linux/syscore_ops.h>
 #include <asm/spu.h>
 #include <asm/spu_priv1.h>
 #include <asm/spu_csa.h>
@@ -521,18 +522,8 @@ void spu_init_channels(struct spu *spu)
 }
 EXPORT_SYMBOL_GPL(spu_init_channels);
 
-static int spu_shutdown(struct sys_device *sysdev)
-{
-        struct spu *spu = container_of(sysdev, struct spu, sysdev);
-
-        spu_free_irqs(spu);
-        spu_destroy_spu(spu);
-        return 0;
-}
-
 static struct sysdev_class spu_sysdev_class = {
         .name = "spu",
-        .shutdown = spu_shutdown,
 };
 
 int spu_add_sysdev_attr(struct sysdev_attribute *attr)
@@ -797,6 +788,22 @@ static inline void crash_register_spus(struct list_head *list)
 }
 #endif
 
+static void spu_shutdown(void)
+{
+        struct spu *spu;
+
+        mutex_lock(&spu_full_list_mutex);
+        list_for_each_entry(spu, &spu_full_list, full_list) {
+                spu_free_irqs(spu);
+                spu_destroy_spu(spu);
+        }
+        mutex_unlock(&spu_full_list_mutex);
+}
+
+static struct syscore_ops spu_syscore_ops = {
+        .shutdown = spu_shutdown,
+};
+
 static int __init init_spu_base(void)
 {
         int i, ret = 0;
@@ -830,6 +837,7 @@ static int __init init_spu_base(void)
         crash_register_spus(&spu_full_list);
         mutex_unlock(&spu_full_list_mutex);
         spu_add_sysdev_attr(&attr_stat);
+        register_syscore_ops(&spu_syscore_ops);
 
         spu_init_affinity();
 
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 023f24086a0a..7c18a1607d1c 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -21,7 +21,7 @@
 #include <linux/signal.h>
 #include <linux/pci.h>
 #include <linux/interrupt.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/adb.h>
 #include <linux/pmu.h>
 #include <linux/module.h>
@@ -677,7 +677,7 @@ not_found:
         return viaint;
 }
 
-static int pmacpic_suspend(struct sys_device *sysdev, pm_message_t state)
+static int pmacpic_suspend(void)
 {
         int viaint = pmacpic_find_viaint();
 
@@ -698,7 +698,7 @@ static int pmacpic_suspend(struct sys_device *sysdev, pm_message_t state)
         return 0;
 }
 
-static int pmacpic_resume(struct sys_device *sysdev)
+static void pmacpic_resume(void)
 {
         int i;
 
@@ -709,39 +709,19 @@ static int pmacpic_resume(struct sys_device *sysdev)
         for (i = 0; i < max_real_irqs; ++i)
                 if (test_bit(i, sleep_save_mask))
                         pmac_unmask_irq(irq_get_irq_data(i));
-
-        return 0;
 }
 
-#endif /* CONFIG_PM && CONFIG_PPC32 */
-
-static struct sysdev_class pmacpic_sysclass = {
-        .name = "pmac_pic",
+static struct syscore_ops pmacpic_syscore_ops = {
+        .suspend        = pmacpic_suspend,
+        .resume         = pmacpic_resume,
 };
 
-static struct sys_device device_pmacpic = {
-        .id             = 0,
-        .cls            = &pmacpic_sysclass,
-};
-
-static struct sysdev_driver driver_pmacpic = {
-#if defined(CONFIG_PM) && defined(CONFIG_PPC32)
-        .suspend        = &pmacpic_suspend,
-        .resume         = &pmacpic_resume,
-#endif /* CONFIG_PM && CONFIG_PPC32 */
-};
-
-static int __init init_pmacpic_sysfs(void)
+static int __init init_pmacpic_syscore(void)
 {
-#ifdef CONFIG_PPC32
-        if (max_irqs == 0)
-                return -ENODEV;
-#endif
-        printk(KERN_DEBUG "Registering pmac pic with sysfs...\n");
-        sysdev_class_register(&pmacpic_sysclass);
-        sysdev_register(&device_pmacpic);
-        sysdev_driver_register(&pmacpic_sysclass, &driver_pmacpic);
+        register_syscore_ops(&pmacpic_syscore_ops);
         return 0;
 }
-machine_subsys_initcall(powermac, init_pmacpic_sysfs);
 
+machine_subsys_initcall(powermac, init_pmacpic_syscore);
+
+#endif /* CONFIG_PM && CONFIG_PPC32 */
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index d5679dc1e20f..01cd2f089512 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -304,8 +304,10 @@ static int __devinit fsl_msi_setup_hwirq(struct fsl_msi *msi,
         return 0;
 }
 
+static const struct of_device_id fsl_of_msi_ids[];
 static int __devinit fsl_of_msi_probe(struct platform_device *dev)
 {
+        const struct of_device_id *match;
         struct fsl_msi *msi;
         struct resource res;
         int err, i, j, irq_index, count;
@@ -316,9 +318,10 @@ static int __devinit fsl_of_msi_probe(struct platform_device *dev)
         u32 offset;
         static const u32 all_avail[] = { 0, NR_MSI_IRQS };
 
-        if (!dev->dev.of_match)
+        match = of_match_device(fsl_of_msi_ids, &dev->dev);
+        if (!match)
                 return -EINVAL;
-        features = dev->dev.of_match->data;
+        features = match->data;
 
         printk(KERN_DEBUG "Setting up Freescale MSI support\n");
 
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index fa438be962b7..596554a8725e 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -18,7 +18,7 @@
 #include <linux/stddef.h>
 #include <linux/sched.h>
 #include <linux/signal.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/device.h>
 #include <linux/bootmem.h>
 #include <linux/spinlock.h>
@@ -902,7 +902,7 @@ static struct {
         u32 sercr;
 } ipic_saved_state;
 
-static int ipic_suspend(struct sys_device *sdev, pm_message_t state)
+static int ipic_suspend(void)
 {
         struct ipic *ipic = primary_ipic;
 
@@ -933,7 +933,7 @@ static int ipic_suspend(struct sys_device *sdev, pm_message_t state)
         return 0;
 }
 
-static int ipic_resume(struct sys_device *sdev)
+static void ipic_resume(void)
 {
         struct ipic *ipic = primary_ipic;
 
@@ -949,44 +949,26 @@ static int ipic_resume(struct sys_device *sdev)
         ipic_write(ipic->regs, IPIC_SECNR, ipic_saved_state.secnr);
         ipic_write(ipic->regs, IPIC_SERMR, ipic_saved_state.sermr);
         ipic_write(ipic->regs, IPIC_SERCR, ipic_saved_state.sercr);
-
-        return 0;
 }
 #else
 #define ipic_suspend NULL
 #define ipic_resume NULL
 #endif
 
-static struct sysdev_class ipic_sysclass = {
-        .name = "ipic",
+static struct syscore_ops ipic_syscore_ops = {
         .suspend = ipic_suspend,
         .resume = ipic_resume,
 };
 
-static struct sys_device device_ipic = {
-        .id             = 0,
-        .cls            = &ipic_sysclass,
-};
-
-static int __init init_ipic_sysfs(void)
+static int __init init_ipic_syscore(void)
 {
-        int rc;
-
         if (!primary_ipic || !primary_ipic->regs)
                 return -ENODEV;
-        printk(KERN_DEBUG "Registering ipic with sysfs...\n");
 
-        rc = sysdev_class_register(&ipic_sysclass);
-        if (rc) {
-                printk(KERN_ERR "Failed registering ipic sys class\n");
-                return -ENODEV;
-        }
-        rc = sysdev_register(&device_ipic);
-        if (rc) {
-                printk(KERN_ERR "Failed registering ipic sys device\n");
-                return -ENODEV;
-        }
+        printk(KERN_DEBUG "Registering ipic system core operations\n");
+        register_syscore_ops(&ipic_syscore_ops);
+
         return 0;
 }
 
-subsys_initcall(init_ipic_sysfs);
+subsys_initcall(init_ipic_syscore);
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index f91c065bed5a..7e5dc8f4984a 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -27,6 +27,7 @@
 #include <linux/spinlock.h>
 #include <linux/pci.h>
 #include <linux/slab.h>
+#include <linux/syscore_ops.h>
 
 #include <asm/ptrace.h>
 #include <asm/signal.h>
@@ -1702,9 +1703,8 @@ void mpic_reset_core(int cpu)
 #endif /* CONFIG_SMP */
 
 #ifdef CONFIG_PM
-static int mpic_suspend(struct sys_device *dev, pm_message_t state)
+static void mpic_suspend_one(struct mpic *mpic)
 {
-        struct mpic *mpic = container_of(dev, struct mpic, sysdev);
         int i;
 
         for (i = 0; i < mpic->num_sources; i++) {
@@ -1713,13 +1713,22 @@ static int mpic_suspend(struct sys_device *dev, pm_message_t state)
                 mpic->save_data[i].dest =
                         mpic_irq_read(i, MPIC_INFO(IRQ_DESTINATION));
         }
+}
+
+static int mpic_suspend(void)
+{
+        struct mpic *mpic = mpics;
+
+        while (mpic) {
+                mpic_suspend_one(mpic);
+                mpic = mpic->next;
+        }
 
         return 0;
 }
 
-static int mpic_resume(struct sys_device *dev)
+static void mpic_resume_one(struct mpic *mpic)
 {
-        struct mpic *mpic = container_of(dev, struct mpic, sysdev);
         int i;
 
         for (i = 0; i < mpic->num_sources; i++) {
@@ -1746,33 +1755,28 @@ static int mpic_resume(struct sys_device *dev)
         }
 #endif
         } /* end for loop */
+}
 
-        return 0;
+static void mpic_resume(void)
+{
+        struct mpic *mpic = mpics;
+
+        while (mpic) {
+                mpic_resume_one(mpic);
+                mpic = mpic->next;
+        }
 }
-#endif
 
-static struct sysdev_class mpic_sysclass = {
-#ifdef CONFIG_PM
+static struct syscore_ops mpic_syscore_ops = {
         .resume = mpic_resume,
         .suspend = mpic_suspend,
-#endif
-        .name = "mpic",
 };
 
 static int mpic_init_sys(void)
 {
-        struct mpic *mpic = mpics;
-        int error, id = 0;
-
-        error = sysdev_class_register(&mpic_sysclass);
-
-        while (mpic && !error) {
-                mpic->sysdev.cls = &mpic_sysclass;
-                mpic->sysdev.id = id++;
-                error = sysdev_register(&mpic->sysdev);
-                mpic = mpic->next;
-        }
-        return error;
+        register_syscore_ops(&mpic_syscore_ops);
+        return 0;
 }
 
 device_initcall(mpic_init_sys);
+#endif
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 2508a6f31588..4a7f14079e03 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -88,6 +88,7 @@ config S390
         select HAVE_KERNEL_XZ
         select HAVE_GET_USER_PAGES_FAST
         select HAVE_ARCH_MUTEX_CPU_RELAX
+        select HAVE_ARCH_JUMP_LABEL if !MARCH_G5
         select ARCH_INLINE_SPIN_TRYLOCK
         select ARCH_INLINE_SPIN_TRYLOCK_BH
         select ARCH_INLINE_SPIN_LOCK
diff --git a/arch/s390/include/asm/cacheflush.h b/arch/s390/include/asm/cacheflush.h
index 43a5c78046db..3e20383d0921 100644
--- a/arch/s390/include/asm/cacheflush.h
+++ b/arch/s390/include/asm/cacheflush.h
@@ -11,5 +11,6 @@ void kernel_map_pages(struct page *page, int numpages, int enable);
 int set_memory_ro(unsigned long addr, int numpages);
 int set_memory_rw(unsigned long addr, int numpages);
 int set_memory_nx(unsigned long addr, int numpages);
+int set_memory_x(unsigned long addr, int numpages);
 
 #endif /* _S390_CACHEFLUSH_H */
diff --git a/arch/s390/include/asm/diag.h b/arch/s390/include/asm/diag.h
index 72b2e2f2d32d..7e91c58072e2 100644
--- a/arch/s390/include/asm/diag.h
+++ b/arch/s390/include/asm/diag.h
@@ -9,9 +9,22 @@
 #define _ASM_S390_DIAG_H
 
 /*
- * Diagnose 10: Release pages
+ * Diagnose 10: Release page range
  */
-extern void diag10(unsigned long addr);
+static inline void diag10_range(unsigned long start_pfn, unsigned long num_pfn)
+{
+        unsigned long start_addr, end_addr;
+
+        start_addr = start_pfn << PAGE_SHIFT;
+        end_addr = (start_pfn + num_pfn - 1) << PAGE_SHIFT;
+
+        asm volatile(
+                "0:     diag    %0,%1,0x10\n"
+                "1:\n"
+                EX_TABLE(0b, 1b)
+                EX_TABLE(1b, 1b)
+                : : "a" (start_addr), "a" (end_addr));
+}
 
 /*
  * Diagnose 14: Input spool file manipulation
diff --git a/arch/s390/include/asm/ftrace.h b/arch/s390/include/asm/ftrace.h
index 3c29be4836ed..b7931faaef6d 100644
--- a/arch/s390/include/asm/ftrace.h
+++ b/arch/s390/include/asm/ftrace.h
@@ -11,15 +11,13 @@ struct dyn_arch_ftrace { };
 
 #ifdef CONFIG_64BIT
 #define MCOUNT_INSN_SIZE  12
-#define MCOUNT_OFFSET      8
 #else
 #define MCOUNT_INSN_SIZE  20
-#define MCOUNT_OFFSET      4
 #endif
 
 static inline unsigned long ftrace_call_adjust(unsigned long addr)
 {
-        return addr - MCOUNT_OFFSET;
+        return addr;
 }
 
 #endif /* __ASSEMBLY__ */
diff --git a/arch/s390/include/asm/jump_label.h b/arch/s390/include/asm/jump_label.h
new file mode 100644
index 000000000000..95a6cf2b5b67
--- /dev/null
+++ b/arch/s390/include/asm/jump_label.h
@@ -0,0 +1,37 @@
+#ifndef _ASM_S390_JUMP_LABEL_H
+#define _ASM_S390_JUMP_LABEL_H
+
+#include <linux/types.h>
+
+#define JUMP_LABEL_NOP_SIZE 6
+
+#ifdef CONFIG_64BIT
+#define ASM_PTR ".quad"
+#define ASM_ALIGN ".balign 8"
+#else
+#define ASM_PTR ".long"
+#define ASM_ALIGN ".balign 4"
+#endif
+
+static __always_inline bool arch_static_branch(struct jump_label_key *key)
+{
+        asm goto("0:    brcl 0,0\n"
+                ".pushsection __jump_table, \"aw\"\n"
+                ASM_ALIGN "\n"
+                ASM_PTR " 0b, %l[label], %0\n"
+                ".popsection\n"
+                : : "X" (key) : : label);
+        return false;
+label:
+        return true;
+}
+
+typedef unsigned long jump_label_t;
+
+struct jump_entry {
+        jump_label_t code;
+        jump_label_t target;
+        jump_label_t key;
+};
+
+#endif
diff --git a/arch/s390/include/asm/mmu_context.h b/arch/s390/include/asm/mmu_context.h
index a6f0e7cc9cde..8c277caa8d3a 100644
--- a/arch/s390/include/asm/mmu_context.h
+++ b/arch/s390/include/asm/mmu_context.h
@@ -23,7 +23,7 @@ static inline int init_new_context(struct task_struct *tsk,
 #ifdef CONFIG_64BIT
         mm->context.asce_bits |= _ASCE_TYPE_REGION3;
 #endif
-        if (current->mm->context.alloc_pgste) {
+        if (current->mm && current->mm->context.alloc_pgste) {
                 /*
                  * alloc_pgste indicates, that any NEW context will be created
                  * with extended page tables. The old context is unchanged. The
diff --git a/arch/s390/kernel/Makefile b/arch/s390/kernel/Makefile
index 64230bc392fa..5ff15dacb571 100644
--- a/arch/s390/kernel/Makefile
+++ b/arch/s390/kernel/Makefile
@@ -23,7 +23,7 @@ CFLAGS_sysinfo.o += -Iinclude/math-emu -Iarch/s390/math-emu -w
 obj-y   :=  bitmap.o traps.o time.o process.o base.o early.o setup.o \
             processor.o sys_s390.o ptrace.o signal.o cpcmd.o ebcdic.o \
             s390_ext.o debug.o irq.o ipl.o dis.o diag.o mem_detect.o \
-            vdso.o vtime.o sysinfo.o nmi.o sclp.o
+            vdso.o vtime.o sysinfo.o nmi.o sclp.o jump_label.o
 
 obj-y   += $(if $(CONFIG_64BIT),entry64.o,entry.o)
 obj-y   += $(if $(CONFIG_64BIT),reipl64.o,reipl.o)
diff --git a/arch/s390/kernel/diag.c b/arch/s390/kernel/diag.c
index c032d11da8a1..8237fc07ac79 100644
--- a/arch/s390/kernel/diag.c
+++ b/arch/s390/kernel/diag.c
@@ -9,27 +9,6 @@
 #include <asm/diag.h>
 
 /*
- * Diagnose 10: Release pages
- */
-void diag10(unsigned long addr)
-{
-        if (addr >= 0x7ff00000)
-                return;
-        asm volatile(
-#ifdef CONFIG_64BIT
-                "       sam31\n"
-                "       diag    %0,%0,0x10\n"
-                "0:     sam64\n"
-#else
-                "       diag    %0,%0,0x10\n"
-                "0:\n"
-#endif
-                EX_TABLE(0b, 0b)
-                : : "a" (addr));
-}
-EXPORT_SYMBOL(diag10);
-
-/*
  * Diagnose 14: Input spool file manipulation
  */
 int diag14(unsigned long rx, unsigned long ry1, unsigned long subcode)
diff --git a/arch/s390/kernel/dis.c b/arch/s390/kernel/dis.c
index c83726c9fe03..3d4a78fc1adc 100644
--- a/arch/s390/kernel/dis.c
+++ b/arch/s390/kernel/dis.c
@@ -672,6 +672,7 @@ static struct insn opcode_b2[] = {
         { "rp", 0x77, INSTR_S_RD },
         { "stcke", 0x78, INSTR_S_RD },
         { "sacf", 0x79, INSTR_S_RD },
+        { "spp", 0x80, INSTR_S_RD },
         { "stsi", 0x7d, INSTR_S_RD },
         { "srnm", 0x99, INSTR_S_RD },
         { "stfpc", 0x9c, INSTR_S_RD },
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index 648f64239a9d..1b67fc6ebdc2 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -836,7 +836,7 @@ restart_base:
         stosm   __SF_EMPTY(%r15),0x04   # now we can turn dat on
         basr    %r14,0
         l       %r14,restart_addr-.(%r14)
-        br      %r14                    # branch to start_secondary
+        basr    %r14,%r14               # branch to start_secondary
 restart_addr:
         .long   start_secondary
         .align  8
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index 9d3603d6c511..9fd864563499 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -841,7 +841,7 @@ restart_base:
         mvc     __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
         xc      __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
         stosm   __SF_EMPTY(%r15),0x04   # now we can turn dat on
-        jg      start_secondary
+        brasl   %r14,start_secondary
         .align  8
 restart_vtime:
         .long   0x7fffffff,0xffffffff
diff --git a/arch/s390/kernel/jump_label.c b/arch/s390/kernel/jump_label.c
new file mode 100644
index 000000000000..44cc06bedf77
--- /dev/null
+++ b/arch/s390/kernel/jump_label.c
@@ -0,0 +1,59 @@
+/*
+ * Jump label s390 support
+ *
+ * Copyright IBM Corp. 2011
+ * Author(s): Jan Glauber <jang@linux.vnet.ibm.com>
+ */
+#include <linux/module.h>
+#include <linux/uaccess.h>
+#include <linux/stop_machine.h>
+#include <linux/jump_label.h>
+#include <asm/ipl.h>
+
+#ifdef HAVE_JUMP_LABEL
+
+struct insn {
+        u16 opcode;
+        s32 offset;
+} __packed;
+
+struct insn_args {
+        unsigned long *target;
+        struct insn *insn;
+        ssize_t size;
+};
+
+static int __arch_jump_label_transform(void *data)
+{
+        struct insn_args *args = data;
+        int rc;
+
+        rc = probe_kernel_write(args->target, args->insn, args->size);
+        WARN_ON_ONCE(rc < 0);
+        return 0;
+}
+
+void arch_jump_label_transform(struct jump_entry *entry,
+                               enum jump_label_type type)
+{
+        struct insn_args args;
+        struct insn insn;
+
+        if (type == JUMP_LABEL_ENABLE) {
+                /* brcl 15,offset */
+                insn.opcode = 0xc0f4;
+                insn.offset = (entry->target - entry->code) >> 1;
+        } else {
+                /* brcl 0,0 */
+                insn.opcode = 0xc004;
+                insn.offset = 0;
+        }
+
+        args.target = (void *) entry->code;
+        args.insn = &insn;
+        args.size = JUMP_LABEL_NOP_SIZE;
+
+        stop_machine(__arch_jump_label_transform, &args, NULL);
+}
+
+#endif
diff --git a/arch/s390/mm/cmm.c b/arch/s390/mm/cmm.c
index c66ffd8dbbb7..1f1dba9dcf58 100644
--- a/arch/s390/mm/cmm.c
+++ b/arch/s390/mm/cmm.c
@@ -91,7 +91,7 @@ static long cmm_alloc_pages(long nr, long *counter,
                         } else
                                 free_page((unsigned long) npa);
                 }
-                diag10(addr);
+                diag10_range(addr >> PAGE_SHIFT, 1);
                 pa->pages[pa->index++] = addr;
                 (*counter)++;
                 spin_unlock(&cmm_lock);
diff --git a/arch/s390/mm/pageattr.c b/arch/s390/mm/pageattr.c
index 0607e4b14b27..f05edcc3beff 100644
--- a/arch/s390/mm/pageattr.c
+++ b/arch/s390/mm/pageattr.c
@@ -54,3 +54,8 @@ int set_memory_nx(unsigned long addr, int numpages)
         return 0;
 }
 EXPORT_SYMBOL_GPL(set_memory_nx);
+
+int set_memory_x(unsigned long addr, int numpages)
+{
+        return 0;
+}
diff --git a/arch/s390/oprofile/hwsampler.c b/arch/s390/oprofile/hwsampler.c
index 4952872d6f0a..33cbd373cce4 100644
--- a/arch/s390/oprofile/hwsampler.c
+++ b/arch/s390/oprofile/hwsampler.c
@@ -1021,20 +1021,14 @@ deallocate_exit:
         return rc;
 }
 
-long hwsampler_query_min_interval(void)
+unsigned long hwsampler_query_min_interval(void)
 {
-        if (min_sampler_rate)
-                return min_sampler_rate;
-        else
-                return -EINVAL;
+        return min_sampler_rate;
 }
 
-long hwsampler_query_max_interval(void)
+unsigned long hwsampler_query_max_interval(void)
 {
-        if (max_sampler_rate)
-                return max_sampler_rate;
-        else
-                return -EINVAL;
+        return max_sampler_rate;
 }
 
 unsigned long hwsampler_get_sample_overflow_count(unsigned int cpu)
diff --git a/arch/s390/oprofile/hwsampler.h b/arch/s390/oprofile/hwsampler.h
index 8c72b59316b5..1912f3bb190c 100644
--- a/arch/s390/oprofile/hwsampler.h
+++ b/arch/s390/oprofile/hwsampler.h
@@ -102,8 +102,8 @@ int hwsampler_setup(void);
 int hwsampler_shutdown(void);
 int hwsampler_allocate(unsigned long sdbt, unsigned long sdb);
 int hwsampler_deallocate(void);
-long hwsampler_query_min_interval(void);
-long hwsampler_query_max_interval(void);
+unsigned long hwsampler_query_min_interval(void);
+unsigned long hwsampler_query_max_interval(void);
 int hwsampler_start_all(unsigned long interval);
 int hwsampler_stop_all(void);
 int hwsampler_deactivate(unsigned int cpu);
diff --git a/arch/s390/oprofile/init.c b/arch/s390/oprofile/init.c
index c63d7e58352b..5995e9bc72d9 100644
--- a/arch/s390/oprofile/init.c
+++ b/arch/s390/oprofile/init.c
@@ -145,15 +145,11 @@ static int oprofile_hwsampler_init(struct oprofile_operations *ops)
          * create hwsampler files only if hwsampler_setup() succeeds.
          */
         oprofile_min_interval = hwsampler_query_min_interval();
-        if (oprofile_min_interval < 0) {
-                oprofile_min_interval = 0;
+        if (oprofile_min_interval == 0)
                 return -ENODEV;
-        }
         oprofile_max_interval = hwsampler_query_max_interval();
-        if (oprofile_max_interval < 0) {
-                oprofile_max_interval = 0;
+        if (oprofile_max_interval == 0)
                 return -ENODEV;
-        }
 
         if (oprofile_timer_init(ops))
                 return -ENODEV;
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 4b89da248d17..bc439de48cd1 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -24,7 +24,6 @@ config SUPERH
         select RTC_LIB
         select GENERIC_ATOMIC64
         select GENERIC_IRQ_SHOW
-        select ARCH_NO_SYSDEV_OPS
         help
           The SuperH is a RISC processor targeted for use in embedded systems
           and consumer electronics; it was also used in the Sega Dreamcast
diff --git a/arch/sh/configs/apsh4ad0a_defconfig b/arch/sh/configs/apsh4ad0a_defconfig
index e71a531f1e31..77ec0e7b8ddf 100644
--- a/arch/sh/configs/apsh4ad0a_defconfig
+++ b/arch/sh/configs/apsh4ad0a_defconfig
@@ -48,7 +48,6 @@ CONFIG_PREEMPT=y
 CONFIG_BINFMT_MISC=y
 CONFIG_PM=y
 CONFIG_PM_DEBUG=y
-CONFIG_PM_VERBOSE=y
 CONFIG_PM_RUNTIME=y
 CONFIG_CPU_IDLE=y
 CONFIG_NET=y
diff --git a/arch/sh/configs/sdk7786_defconfig b/arch/sh/configs/sdk7786_defconfig
index dc4a2eb6a616..c41650572d79 100644
--- a/arch/sh/configs/sdk7786_defconfig
+++ b/arch/sh/configs/sdk7786_defconfig
@@ -83,7 +83,6 @@ CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
 CONFIG_BINFMT_MISC=y
 CONFIG_PM=y
 CONFIG_PM_DEBUG=y
-CONFIG_PM_VERBOSE=y
 CONFIG_PM_RUNTIME=y
 CONFIG_CPU_IDLE=y
 CONFIG_NET=y
diff --git a/arch/sh/kernel/cpu/shmobile/pm_runtime.c b/arch/sh/kernel/cpu/shmobile/pm_runtime.c
index 6dcb8166a64d..22db127afa7b 100644
--- a/arch/sh/kernel/cpu/shmobile/pm_runtime.c
+++ b/arch/sh/kernel/cpu/shmobile/pm_runtime.c
@@ -139,7 +139,7 @@ void platform_pm_runtime_suspend_idle(void)
         queue_work(pm_wq, &hwblk_work);
 }
 
-int platform_pm_runtime_suspend(struct device *dev)
+static int default_platform_runtime_suspend(struct device *dev)
 {
         struct platform_device *pdev = to_platform_device(dev);
         struct pdev_archdata *ad = &pdev->archdata;
@@ -147,7 +147,7 @@ int platform_pm_runtime_suspend(struct device *dev)
         int hwblk = ad->hwblk_id;
         int ret = 0;
 
-        dev_dbg(dev, "platform_pm_runtime_suspend() [%d]\n", hwblk);
+        dev_dbg(dev, "%s() [%d]\n", __func__, hwblk);
 
         /* ignore off-chip platform devices */
         if (!hwblk)
@@ -183,20 +183,20 @@ int platform_pm_runtime_suspend(struct device *dev)
         mutex_unlock(&ad->mutex);
 
 out:
-        dev_dbg(dev, "platform_pm_runtime_suspend() [%d] returns %d\n",
-                hwblk, ret);
+        dev_dbg(dev, "%s() [%d] returns %d\n",
+                 __func__, hwblk, ret);
 
         return ret;
 }
 
-int platform_pm_runtime_resume(struct device *dev)
+static int default_platform_runtime_resume(struct device *dev)
 {
         struct platform_device *pdev = to_platform_device(dev);
         struct pdev_archdata *ad = &pdev->archdata;
         int hwblk = ad->hwblk_id;
         int ret = 0;
 
-        dev_dbg(dev, "platform_pm_runtime_resume() [%d]\n", hwblk);
+        dev_dbg(dev, "%s() [%d]\n", __func__, hwblk);
 
         /* ignore off-chip platform devices */
         if (!hwblk)
@@ -228,19 +228,19 @@ int platform_pm_runtime_resume(struct device *dev)
          */
         mutex_unlock(&ad->mutex);
 out:
-        dev_dbg(dev, "platform_pm_runtime_resume() [%d] returns %d\n",
-                hwblk, ret);
+        dev_dbg(dev, "%s() [%d] returns %d\n",
+                __func__, hwblk, ret);
 
         return ret;
 }
 
-int platform_pm_runtime_idle(struct device *dev)
+static int default_platform_runtime_idle(struct device *dev)
 {
         struct platform_device *pdev = to_platform_device(dev);
         int hwblk = pdev->archdata.hwblk_id;
         int ret = 0;
 
-        dev_dbg(dev, "platform_pm_runtime_idle() [%d]\n", hwblk);
+        dev_dbg(dev, "%s() [%d]\n", __func__, hwblk);
 
         /* ignore off-chip platform devices */
         if (!hwblk)
@@ -252,10 +252,19 @@ int platform_pm_runtime_idle(struct device *dev)
         /* suspend synchronously to disable clocks immediately */
         ret = pm_runtime_suspend(dev);
 out:
-        dev_dbg(dev, "platform_pm_runtime_idle() [%d] done!\n", hwblk);
+        dev_dbg(dev, "%s() [%d] done!\n", __func__, hwblk);
         return ret;
 }
 
+static struct dev_power_domain default_power_domain = {
+        .ops = {
+                .runtime_suspend = default_platform_runtime_suspend,
+                .runtime_resume = default_platform_runtime_resume,
+                .runtime_idle = default_platform_runtime_idle,
+                USE_PLATFORM_PM_SLEEP_OPS
+        },
+};
+
 static int platform_bus_notify(struct notifier_block *nb,
                                unsigned long action, void *data)
 {
@@ -276,6 +285,7 @@ static int platform_bus_notify(struct notifier_block *nb,
                 hwblk_disable(hwblk_info, hwblk);
                 /* make sure driver re-inits itself once */
                 __set_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags);
+                dev->pwr_domain = &default_power_domain;
                 break;
         /* TODO: add BUS_NOTIFY_BIND_DRIVER and increase idle count */
         case BUS_NOTIFY_BOUND_DRIVER:
@@ -289,6 +299,7 @@ static int platform_bus_notify(struct notifier_block *nb,
                 __set_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags);
                 break;
         case BUS_NOTIFY_DEL_DEVICE:
+                dev->pwr_domain = NULL;
                 break;
         }
         return 0;
diff --git a/arch/sparc/include/asm/jump_label.h b/arch/sparc/include/asm/jump_label.h
index 427d4684e0d2..fc73a82366f8 100644
--- a/arch/sparc/include/asm/jump_label.h
+++ b/arch/sparc/include/asm/jump_label.h
@@ -7,17 +7,20 @@
 
 #define JUMP_LABEL_NOP_SIZE 4
 
-#define JUMP_LABEL(key, label)                                  \
-        do {                                                    \
-                asm goto("1:\n\t"                               \
-                         "nop\n\t"                              \
-                         "nop\n\t"                              \
-                         ".pushsection __jump_table,  \"a\"\n\t"\
-                         ".align 4\n\t"                         \
-                         ".word 1b, %l[" #label "], %c0\n\t"    \
-                         ".popsection \n\t"                     \
-                         : :  "i" (key) :  : label);\
-        } while (0)
+static __always_inline bool arch_static_branch(struct jump_label_key *key)
+{
+                asm goto("1:\n\t"
+                         "nop\n\t"
+                         "nop\n\t"
+                         ".pushsection __jump_table,  \"aw\"\n\t"
+                         ".align 4\n\t"
+                         ".word 1b, %l[l_yes], %c0\n\t"
+                         ".popsection \n\t"
+                         : :  "i" (key) : : l_yes);
+        return false;
+l_yes:
+        return true;
+}
 
 #endif /* __KERNEL__ */
 
diff --git a/arch/sparc/kernel/apc.c b/arch/sparc/kernel/apc.c
index f679c57644d5..1e34f29e58bb 100644
--- a/arch/sparc/kernel/apc.c
+++ b/arch/sparc/kernel/apc.c
@@ -165,7 +165,7 @@ static int __devinit apc_probe(struct platform_device *op)
         return 0;
 }
 
-static struct of_device_id __initdata apc_match[] = {
+static struct of_device_id apc_match[] = {
         {
                 .name = APC_OBPNAME,
         },
diff --git a/arch/sparc/kernel/pci_sabre.c b/arch/sparc/kernel/pci_sabre.c
index 948068a083fc..d1840dbdaa2f 100644
--- a/arch/sparc/kernel/pci_sabre.c
+++ b/arch/sparc/kernel/pci_sabre.c
@@ -452,8 +452,10 @@ static void __devinit sabre_pbm_init(struct pci_pbm_info *pbm,
         sabre_scan_bus(pbm, &op->dev);
 }
 
+static const struct of_device_id sabre_match[];
 static int __devinit sabre_probe(struct platform_device *op)
 {
+        const struct of_device_id *match;
         const struct linux_prom64_registers *pr_regs;
         struct device_node *dp = op->dev.of_node;
         struct pci_pbm_info *pbm;
@@ -463,7 +465,8 @@ static int __devinit sabre_probe(struct platform_device *op)
         const u32 *vdma;
         u64 clear_irq;
 
-        hummingbird_p = op->dev.of_match && (op->dev.of_match->data != NULL);
+        match = of_match_device(sabre_match, &op->dev);
+        hummingbird_p = match && (match->data != NULL);
         if (!hummingbird_p) {
                 struct device_node *cpu_dp;
 
diff --git a/arch/sparc/kernel/pci_schizo.c b/arch/sparc/kernel/pci_schizo.c
index fecfcb2063c8..283fbc329a43 100644
--- a/arch/sparc/kernel/pci_schizo.c
+++ b/arch/sparc/kernel/pci_schizo.c
@@ -1458,11 +1458,15 @@ out_err:
         return err;
 }
 
+static const struct of_device_id schizo_match[];
 static int __devinit schizo_probe(struct platform_device *op)
 {
-        if (!op->dev.of_match)
+        const struct of_device_id *match;
+
+        match = of_match_device(schizo_match, &op->dev);
+        if (!match)
                 return -EINVAL;
-        return __schizo_init(op, (unsigned long) op->dev.of_match->data);
+        return __schizo_init(op, (unsigned long)match->data);
 }
 
 /* The ordering of this table is very important.  Some Tomatillo
diff --git a/arch/sparc/kernel/pmc.c b/arch/sparc/kernel/pmc.c
index 93d7b4465f8d..6a585d393580 100644
--- a/arch/sparc/kernel/pmc.c
+++ b/arch/sparc/kernel/pmc.c
@@ -69,7 +69,7 @@ static int __devinit pmc_probe(struct platform_device *op)
         return 0;
 }
 
-static struct of_device_id __initdata pmc_match[] = {
+static struct of_device_id pmc_match[] = {
         {
                 .name = PMC_OBPNAME,
         },
diff --git a/arch/sparc/kernel/smp_32.c b/arch/sparc/kernel/smp_32.c
index f95690c167b6..442286d83435 100644
--- a/arch/sparc/kernel/smp_32.c
+++ b/arch/sparc/kernel/smp_32.c
@@ -53,6 +53,7 @@ cpumask_t smp_commenced_mask = CPU_MASK_NONE;
 void __cpuinit smp_store_cpu_info(int id)
 {
         int cpu_node;
+        int mid;
 
         cpu_data(id).udelay_val = loops_per_jiffy;
 
@@ -60,10 +61,13 @@ void __cpuinit smp_store_cpu_info(int id)
         cpu_data(id).clock_tick = prom_getintdefault(cpu_node,
                                                      "clock-frequency", 0);
         cpu_data(id).prom_node = cpu_node;
-        cpu_data(id).mid = cpu_get_hwmid(cpu_node);
+        mid = cpu_get_hwmid(cpu_node);
 
-        if (cpu_data(id).mid < 0)
-                panic("No MID found for CPU%d at node 0x%08d", id, cpu_node);
+        if (mid < 0) {
+                printk(KERN_NOTICE "No MID found for CPU%d at node 0x%08d", id, cpu_node);
+                mid = 0;
+        }
+        cpu_data(id).mid = mid;
 }
 
 void __init smp_cpus_done(unsigned int max_cpus)
diff --git a/arch/sparc/kernel/time_32.c b/arch/sparc/kernel/time_32.c
index 4e236391b635..96046a4024c2 100644
--- a/arch/sparc/kernel/time_32.c
+++ b/arch/sparc/kernel/time_32.c
@@ -168,7 +168,7 @@ static int __devinit clock_probe(struct platform_device *op)
         return 0;
 }
 
-static struct of_device_id __initdata clock_match[] = {
+static struct of_device_id clock_match[] = {
         {
                 .name = "eeprom",
         },
diff --git a/arch/sparc/lib/checksum_32.S b/arch/sparc/lib/checksum_32.S
index 3632cb34e914..0084c3361e15 100644
--- a/arch/sparc/lib/checksum_32.S
+++ b/arch/sparc/lib/checksum_32.S
@@ -289,10 +289,16 @@ cc_end_cruft:
 
         /* Also, handle the alignment code out of band. */
 cc_dword_align:
-        cmp     %g1, 6
-        bl,a    ccte
+        cmp     %g1, 16
+        bge     1f
+         srl    %g1, 1, %o3
+2:      cmp     %o3, 0
+        be,a    ccte
          andcc  %g1, 0xf, %o3
-        andcc   %o0, 0x1, %g0
+        andcc   %o3, %o0, %g0   ! Check %o0 only (%o1 has the same last 2 bits)
+        be,a    2b
+         srl    %o3, 1, %o3
+1:      andcc   %o0, 0x1, %g0
         bne     ccslow
          andcc  %o0, 0x2, %g0
         be      1f
diff --git a/arch/um/os-Linux/util.c b/arch/um/os-Linux/util.c
index 6ea77979531c..42827cafa6af 100644
--- a/arch/um/os-Linux/util.c
+++ b/arch/um/os-Linux/util.c
@@ -5,6 +5,7 @@
 
 #include <stdio.h>
 #include <stdlib.h>
+#include <unistd.h>
 #include <errno.h>
 #include <signal.h>
 #include <string.h>
@@ -75,6 +76,26 @@ void setup_hostinfo(char *buf, int len)
                  host.release, host.version, host.machine);
 }
 
+/*
+ * We cannot use glibc's abort(). It makes use of tgkill() which
+ * has no effect within UML's kernel threads.
+ * After that glibc would execute an invalid instruction to kill
+ * the calling process and UML crashes with SIGSEGV.
+ */
+static inline void __attribute__ ((noreturn)) uml_abort(void)
+{
+        sigset_t sig;
+
+        fflush(NULL);
+
+        if (!sigemptyset(&sig) && !sigaddset(&sig, SIGABRT))
+                sigprocmask(SIG_UNBLOCK, &sig, 0);
+
+        for (;;)
+                if (kill(getpid(), SIGABRT) < 0)
+                        exit(127);
+}
+
 void os_dump_core(void)
 {
         int pid;
@@ -116,5 +137,5 @@ void os_dump_core(void)
         while ((pid = waitpid(-1, NULL, WNOHANG | __WALL)) > 0)
                 os_kill_ptraced_process(pid, 0);
 
-        abort();
+        uml_abort();
 }
diff --git a/arch/unicore32/kernel/irq.c b/arch/unicore32/kernel/irq.c
index 2aa30a364bbe..d4efa7d679ff 100644
--- a/arch/unicore32/kernel/irq.c
+++ b/arch/unicore32/kernel/irq.c
@@ -23,7 +23,7 @@
 #include <linux/list.h>
 #include <linux/kallsyms.h>
 #include <linux/proc_fs.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/gpio.h>
 
 #include <asm/system.h>
@@ -237,7 +237,7 @@ static struct puv3_irq_state {
         unsigned int    iccr;
 } puv3_irq_state;
 
-static int puv3_irq_suspend(struct sys_device *dev, pm_message_t state)
+static int puv3_irq_suspend(void)
 {
         struct puv3_irq_state *st = &puv3_irq_state;
 
@@ -265,7 +265,7 @@ static int puv3_irq_suspend(struct sys_device *dev, pm_message_t state)
         return 0;
 }
 
-static int puv3_irq_resume(struct sys_device *dev)
+static void puv3_irq_resume(void)
 {
         struct puv3_irq_state *st = &puv3_irq_state;
 
@@ -278,27 +278,20 @@ static int puv3_irq_resume(struct sys_device *dev)
 
                 writel(st->icmr, INTC_ICMR);
         }
-        return 0;
 }
 
-static struct sysdev_class puv3_irq_sysclass = {
-        .name           = "pkunity-irq",
+static struct syscore_ops puv3_irq_syscore_ops = {
         .suspend        = puv3_irq_suspend,
         .resume         = puv3_irq_resume,
 };
 
-static struct sys_device puv3_irq_device = {
-        .id             = 0,
-        .cls            = &puv3_irq_sysclass,
-};
-
-static int __init puv3_irq_init_devicefs(void)
+static int __init puv3_irq_init_syscore(void)
 {
-        sysdev_class_register(&puv3_irq_sysclass);
-        return sysdev_register(&puv3_irq_device);
+        register_syscore_ops(&puv3_irq_syscore_ops);
+        return 0;
 }
 
-device_initcall(puv3_irq_init_devicefs);
+device_initcall(puv3_irq_init_syscore);
 
 void __init init_IRQ(void)
 {
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index cc6c53a95bfd..650bb8c47eca 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -71,7 +71,6 @@ config X86
         select GENERIC_IRQ_SHOW
         select IRQ_FORCED_THREADING
         select USE_GENERIC_SMP_HELPERS if SMP
-        select ARCH_NO_SYSDEV_OPS
 
 config INSTRUCTION_DECODER
         def_bool (KPROBES || PERF_EVENTS)
@@ -690,6 +689,7 @@ config AMD_IOMMU
         bool "AMD IOMMU support"
         select SWIOTLB
         select PCI_MSI
+        select PCI_IOV
         depends on X86_64 && PCI && ACPI
         ---help---
           With this option you can enable support for AMD IOMMU hardware in
@@ -1848,7 +1848,7 @@ config APM_ALLOW_INTS
 
 endif # APM
 
-source "arch/x86/kernel/cpu/cpufreq/Kconfig"
+source "drivers/cpufreq/Kconfig"
 
 source "drivers/cpuidle/Kconfig"
 
diff --git a/arch/x86/include/asm/alternative-asm.h b/arch/x86/include/asm/alternative-asm.h
index a63a68be1cce..94d420b360d1 100644
--- a/arch/x86/include/asm/alternative-asm.h
+++ b/arch/x86/include/asm/alternative-asm.h
@@ -15,4 +15,13 @@
         .endm
 #endif
 
+.macro altinstruction_entry orig alt feature orig_len alt_len
+        .align 8
+        .quad \orig
+        .quad \alt
+        .word \feature
+        .byte \orig_len
+        .byte \alt_len
+.endm
+
 #endif  /*  __ASSEMBLY__  */
diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alternative.h
index 13009d1af99a..8cdd1e247975 100644
--- a/arch/x86/include/asm/alternative.h
+++ b/arch/x86/include/asm/alternative.h
@@ -4,7 +4,6 @@
 #include <linux/types.h>
 #include <linux/stddef.h>
 #include <linux/stringify.h>
-#include <linux/jump_label.h>
 #include <asm/asm.h>
 
 /*
@@ -191,7 +190,7 @@ extern void *text_poke(void *addr, const void *opcode, size_t len);
 extern void *text_poke_smp(void *addr, const void *opcode, size_t len);
 extern void text_poke_smp_batch(struct text_poke_param *params, int n);
 
-#if defined(CONFIG_DYNAMIC_FTRACE) || defined(HAVE_JUMP_LABEL)
+#if defined(CONFIG_DYNAMIC_FTRACE) || defined(CONFIG_JUMP_LABEL)
 #define IDEAL_NOP_SIZE_5 5
 extern unsigned char ideal_nop5[IDEAL_NOP_SIZE_5];
 extern void arch_init_ideal_nop5(void);
diff --git a/arch/x86/include/asm/amd_iommu_proto.h b/arch/x86/include/asm/amd_iommu_proto.h
index 916bc8111a01..55d95eb789b3 100644
--- a/arch/x86/include/asm/amd_iommu_proto.h
+++ b/arch/x86/include/asm/amd_iommu_proto.h
@@ -19,13 +19,12 @@
 #ifndef _ASM_X86_AMD_IOMMU_PROTO_H
 #define _ASM_X86_AMD_IOMMU_PROTO_H
 
-struct amd_iommu;
+#include <asm/amd_iommu_types.h>
 
 extern int amd_iommu_init_dma_ops(void);
 extern int amd_iommu_init_passthrough(void);
+extern irqreturn_t amd_iommu_int_thread(int irq, void *data);
 extern irqreturn_t amd_iommu_int_handler(int irq, void *data);
-extern void amd_iommu_flush_all_domains(void);
-extern void amd_iommu_flush_all_devices(void);
 extern void amd_iommu_apply_erratum_63(u16 devid);
 extern void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu);
 extern int amd_iommu_init_devices(void);
@@ -44,4 +43,12 @@ static inline bool is_rd890_iommu(struct pci_dev *pdev)
                (pdev->device == PCI_DEVICE_ID_RD890_IOMMU);
 }
 
+static inline bool iommu_feature(struct amd_iommu *iommu, u64 f)
+{
+        if (!(iommu->cap & (1 << IOMMU_CAP_EFR)))
+                return false;
+
+        return !!(iommu->features & f);
+}
+
 #endif /* _ASM_X86_AMD_IOMMU_PROTO_H  */
diff --git a/arch/x86/include/asm/amd_iommu_types.h b/arch/x86/include/asm/amd_iommu_types.h
index e3509fc303bf..4c9982995414 100644
--- a/arch/x86/include/asm/amd_iommu_types.h
+++ b/arch/x86/include/asm/amd_iommu_types.h
@@ -68,12 +68,25 @@
 #define MMIO_CONTROL_OFFSET     0x0018
 #define MMIO_EXCL_BASE_OFFSET   0x0020
 #define MMIO_EXCL_LIMIT_OFFSET  0x0028
+#define MMIO_EXT_FEATURES       0x0030
 #define MMIO_CMD_HEAD_OFFSET    0x2000
 #define MMIO_CMD_TAIL_OFFSET    0x2008
 #define MMIO_EVT_HEAD_OFFSET    0x2010
 #define MMIO_EVT_TAIL_OFFSET    0x2018
 #define MMIO_STATUS_OFFSET      0x2020
 
+
+/* Extended Feature Bits */
+#define FEATURE_PREFETCH        (1ULL<<0)
+#define FEATURE_PPR             (1ULL<<1)
+#define FEATURE_X2APIC          (1ULL<<2)
+#define FEATURE_NX              (1ULL<<3)
+#define FEATURE_GT              (1ULL<<4)
+#define FEATURE_IA              (1ULL<<6)
+#define FEATURE_GA              (1ULL<<7)
+#define FEATURE_HE              (1ULL<<8)
+#define FEATURE_PC              (1ULL<<9)
+
 /* MMIO status bits */
 #define MMIO_STATUS_COM_WAIT_INT_MASK   0x04
 
@@ -113,7 +126,9 @@
 /* command specific defines */
 #define CMD_COMPL_WAIT          0x01
 #define CMD_INV_DEV_ENTRY       0x02
-#define CMD_INV_IOMMU_PAGES     0x03
+#define CMD_INV_IOMMU_PAGES     0x03
+#define CMD_INV_IOTLB_PAGES     0x04
+#define CMD_INV_ALL             0x08
 
 #define CMD_COMPL_WAIT_STORE_MASK       0x01
 #define CMD_COMPL_WAIT_INT_MASK         0x02
@@ -215,6 +230,8 @@
 #define IOMMU_PTE_IR (1ULL << 61)
 #define IOMMU_PTE_IW (1ULL << 62)
 
+#define DTE_FLAG_IOTLB  0x01
+
 #define IOMMU_PAGE_MASK (((1ULL << 52) - 1) & ~0xfffULL)
 #define IOMMU_PTE_PRESENT(pte) ((pte) & IOMMU_PTE_P)
 #define IOMMU_PTE_PAGE(pte) (phys_to_virt((pte) & IOMMU_PAGE_MASK))
@@ -227,6 +244,7 @@
 /* IOMMU capabilities */
 #define IOMMU_CAP_IOTLB   24
 #define IOMMU_CAP_NPCACHE 26
+#define IOMMU_CAP_EFR     27
 
 #define MAX_DOMAIN_ID 65536
 
@@ -249,6 +267,8 @@ extern bool amd_iommu_dump;
 
 /* global flag if IOMMUs cache non-present entries */
 extern bool amd_iommu_np_cache;
+/* Only true if all IOMMUs support device IOTLBs */
+extern bool amd_iommu_iotlb_sup;
 
 /*
  * Make iterating over all IOMMUs easier
@@ -371,6 +391,9 @@ struct amd_iommu {
         /* flags read from acpi table */
         u8 acpi_flags;
 
+        /* Extended features */
+        u64 features;
+
         /*
          * Capability pointer. There could be more than one IOMMU per PCI
          * device function if there are more than one AMD IOMMU capability
@@ -409,9 +432,6 @@ struct amd_iommu {
         /* if one, we need to send a completion wait command */
         bool need_sync;
 
-        /* becomes true if a command buffer reset is running */
-        bool reset_in_progress;
-
         /* default dma_ops domain for that IOMMU */
         struct dma_ops_domain *default_dom;
 
diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h
index d87988bacf3e..34595d5e1038 100644
--- a/arch/x86/include/asm/apicdef.h
+++ b/arch/x86/include/asm/apicdef.h
@@ -78,6 +78,7 @@
 #define         APIC_DEST_LOGICAL       0x00800
 #define         APIC_DEST_PHYSICAL      0x00000
 #define         APIC_DM_FIXED           0x00000
+#define         APIC_DM_FIXED_MASK      0x00700
 #define         APIC_DM_LOWEST          0x00100
 #define         APIC_DM_SMI             0x00200
 #define         APIC_DM_REMRD           0x00300
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 91f3e087cf21..7f2f7b123293 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -195,6 +195,7 @@
 
 /* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 9 */
 #define X86_FEATURE_FSGSBASE    (9*32+ 0) /* {RD/WR}{FS/GS}BASE instructions*/
+#define X86_FEATURE_ERMS        (9*32+ 9) /* Enhanced REP MOVSB/STOSB */
 
 #if defined(__KERNEL__) && !defined(__ASSEMBLY__)
 
diff --git a/arch/x86/include/asm/ftrace.h b/arch/x86/include/asm/ftrace.h
index db24c2278be0..268c783ab1c0 100644
--- a/arch/x86/include/asm/ftrace.h
+++ b/arch/x86/include/asm/ftrace.h
@@ -38,11 +38,10 @@ extern void mcount(void);
 static inline unsigned long ftrace_call_adjust(unsigned long addr)
 {
         /*
-         * call mcount is "e8 <4 byte offset>"
-         * The addr points to the 4 byte offset and the caller of this
-         * function wants the pointer to e8. Simply subtract one.
+         * addr is the address of the mcount call instruction.
+         * recordmcount does the necessary offset calculation.
          */
-        return addr - 1;
+        return addr;
 }
 
 #ifdef CONFIG_DYNAMIC_FTRACE
diff --git a/arch/x86/include/asm/jump_label.h b/arch/x86/include/asm/jump_label.h
index 574dbc22893a..a32b18ce6ead 100644
--- a/arch/x86/include/asm/jump_label.h
+++ b/arch/x86/include/asm/jump_label.h
@@ -5,20 +5,25 @@
 
 #include <linux/types.h>
 #include <asm/nops.h>
+#include <asm/asm.h>
 
 #define JUMP_LABEL_NOP_SIZE 5
 
-# define JUMP_LABEL_INITIAL_NOP ".byte 0xe9 \n\t .long 0\n\t"
-
-# define JUMP_LABEL(key, label)                                 \
-        do {                                                    \
-                asm goto("1:"                                   \
-                        JUMP_LABEL_INITIAL_NOP                  \
-                        ".pushsection __jump_table,  \"aw\" \n\t"\
-                        _ASM_PTR "1b, %l[" #label "], %c0 \n\t" \
-                        ".popsection \n\t"                      \
-                        : :  "i" (key) :  : label);             \
-        } while (0)
+#define JUMP_LABEL_INITIAL_NOP ".byte 0xe9 \n\t .long 0\n\t"
+
+static __always_inline bool arch_static_branch(struct jump_label_key *key)
+{
+        asm goto("1:"
+                JUMP_LABEL_INITIAL_NOP
+                ".pushsection __jump_table,  \"aw\" \n\t"
+                _ASM_ALIGN "\n\t"
+                _ASM_PTR "1b, %l[l_yes], %c0 \n\t"
+                ".popsection \n\t"
+                : :  "i" (key) : : l_yes);
+        return false;
+l_yes:
+        return true;
+}
 
 #endif /* __KERNEL__ */
 
diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h
index 7db7723d1f32..d56187c6b838 100644
--- a/arch/x86/include/asm/pgtable_types.h
+++ b/arch/x86/include/asm/pgtable_types.h
@@ -299,6 +299,7 @@ int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
 /* Install a pte for a particular vaddr in kernel space. */
 void set_pte_vaddr(unsigned long vaddr, pte_t pte);
 
+extern void native_pagetable_reserve(u64 start, u64 end);
 #ifdef CONFIG_X86_32
 extern void native_pagetable_setup_start(pgd_t *base);
 extern void native_pagetable_setup_done(pgd_t *base);
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index db8aa19a08a2..647d8a06ce4f 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -88,7 +88,7 @@ void *extend_brk(size_t size, size_t align);
  * executable.)
  */
 #define RESERVE_BRK(name,sz)                                            \
-        static void __section(.discard.text) __used                     \
+        static void __section(.discard.text) __used notrace             \
         __brk_reservation_fn_##name##__(void) {                         \
                 asm volatile (                                          \
                         ".pushsection .brk_reservation,\"aw\",@nobits;" \
diff --git a/arch/x86/include/asm/stacktrace.h b/arch/x86/include/asm/stacktrace.h
index d7e89c83645d..70bbe39043a9 100644
--- a/arch/x86/include/asm/stacktrace.h
+++ b/arch/x86/include/asm/stacktrace.h
@@ -37,9 +37,6 @@ print_context_stack_bp(struct thread_info *tinfo,
 /* Generic stack tracer with callbacks */
 
 struct stacktrace_ops {
-        void (*warning)(void *data, char *msg);
-        /* msg must contain %s for the symbol */
-        void (*warning_symbol)(void *data, char *msg, unsigned long symbol);
         void (*address)(void *data, unsigned long address, int reliable);
         /* On negative return stop dumping */
         int (*stack)(void *data, char *name);
diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h
index abd3e0ea762a..99f0ad753f32 100644
--- a/arch/x86/include/asm/uaccess.h
+++ b/arch/x86/include/asm/uaccess.h
@@ -42,7 +42,7 @@
  * Returns 0 if the range is valid, nonzero otherwise.
  *
  * This is equivalent to the following test:
- * (u33)addr + (u33)size >= (u33)current->addr_limit.seg (u65 for x86_64)
+ * (u33)addr + (u33)size > (u33)current->addr_limit.seg (u65 for x86_64)
  *
  * This needs 33-bit (65-bit for x86_64) arithmetic. We have a carry...
  */
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h
index 3e094af443c3..130f1eeee5fe 100644
--- a/arch/x86/include/asm/uv/uv_bau.h
+++ b/arch/x86/include/asm/uv/uv_bau.h
@@ -94,6 +94,8 @@
 /* after this # consecutive successes, bump up the throttle if it was lowered */
 #define COMPLETE_THRESHOLD 5
 
+#define UV_LB_SUBNODEID 0x10
+
 /*
  * number of entries in the destination side payload queue
  */
@@ -124,7 +126,7 @@
  * The distribution specification (32 bytes) is interpreted as a 256-bit
  * distribution vector. Adjacent bits correspond to consecutive even numbered
  * nodeIDs. The result of adding the index of a given bit to the 15-bit
- * 'base_dest_nodeid' field of the header corresponds to the
+ * 'base_dest_nasid' field of the header corresponds to the
  * destination nodeID associated with that specified bit.
  */
 struct bau_target_uvhubmask {
@@ -176,7 +178,7 @@ struct bau_msg_payload {
 struct bau_msg_header {
         unsigned int dest_subnodeid:6;  /* must be 0x10, for the LB */
         /* bits 5:0 */
-        unsigned int base_dest_nodeid:15; /* nasid of the */
+        unsigned int base_dest_nasid:15; /* nasid of the */
         /* bits 20:6 */                   /* first bit in uvhub map */
         unsigned int command:8; /* message type */
         /* bits 28:21 */
@@ -378,6 +380,10 @@ struct ptc_stats {
         unsigned long d_rcanceled; /* number of messages canceled by resets */
 };
 
+struct hub_and_pnode {
+        short uvhub;
+        short pnode;
+};
 /*
  * one per-cpu; to locate the software tables
  */
@@ -399,10 +405,12 @@ struct bau_control {
         int baudisabled;
         int set_bau_off;
         short cpu;
+        short osnode;
         short uvhub_cpu;
         short uvhub;
         short cpus_in_socket;
         short cpus_in_uvhub;
+        short partition_base_pnode;
         unsigned short message_number;
         unsigned short uvhub_quiesce;
         short socket_acknowledge_count[DEST_Q_SIZE];
@@ -422,15 +430,16 @@ struct bau_control {
         int congested_period;
         cycles_t period_time;
         long period_requests;
+        struct hub_and_pnode *target_hub_and_pnode;
 };
 
 static inline int bau_uvhub_isset(int uvhub, struct bau_target_uvhubmask *dstp)
 {
         return constant_test_bit(uvhub, &dstp->bits[0]);
 }
-static inline void bau_uvhub_set(int uvhub, struct bau_target_uvhubmask *dstp)
+static inline void bau_uvhub_set(int pnode, struct bau_target_uvhubmask *dstp)
 {
-        __set_bit(uvhub, &dstp->bits[0]);
+        __set_bit(pnode, &dstp->bits[0]);
 }
 static inline void bau_uvhubs_clear(struct bau_target_uvhubmask *dstp,
                                     int nbits)
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index a501741c2335..4298002d0c83 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -398,6 +398,8 @@ struct uv_blade_info {
         unsigned short  nr_online_cpus;
         unsigned short  pnode;
         short           memory_nid;
+        spinlock_t      nmi_lock;
+        unsigned long   nmi_count;
 };
 extern struct uv_blade_info *uv_blade_info;
 extern short *uv_node_to_blade;
diff --git a/arch/x86/include/asm/uv/uv_mmrs.h b/arch/x86/include/asm/uv/uv_mmrs.h
index 20cafeac7455..f5bb64a823d7 100644
--- a/arch/x86/include/asm/uv/uv_mmrs.h
+++ b/arch/x86/include/asm/uv/uv_mmrs.h
@@ -5,7 +5,7 @@
  *
  * SGI UV MMR definitions
  *
- * Copyright (C) 2007-2010 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (C) 2007-2011 Silicon Graphics, Inc. All rights reserved.
  */
 
 #ifndef _ASM_X86_UV_UV_MMRS_H
@@ -1099,5 +1099,19 @@ union uvh_rtc1_int_config_u {
     } s;
 };
 
+/* ========================================================================= */
+/*                               UVH_SCRATCH5                                */
+/* ========================================================================= */
+#define UVH_SCRATCH5 0x2d0200UL
+#define UVH_SCRATCH5_32 0x00778
+
+#define UVH_SCRATCH5_SCRATCH5_SHFT 0
+#define UVH_SCRATCH5_SCRATCH5_MASK 0xffffffffffffffffUL
+union uvh_scratch5_u {
+    unsigned long       v;
+    struct uvh_scratch5_s {
+        unsigned long   scratch5 : 64;  /* RW, W1CS */
+    } s;
+};
 
 #endif /* __ASM_UV_MMRS_X86_H__ */
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 643ebf2e2ad8..d3d859035af9 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -68,6 +68,17 @@ struct x86_init_oem {
 };
 
 /**
+ * struct x86_init_mapping - platform specific initial kernel pagetable setup
+ * @pagetable_reserve:  reserve a range of addresses for kernel pagetable usage
+ *
+ * For more details on the purpose of this hook, look in
+ * init_memory_mapping and the commit that added it.
+ */
+struct x86_init_mapping {
+        void (*pagetable_reserve)(u64 start, u64 end);
+};
+
+/**
  * struct x86_init_paging - platform specific paging functions
  * @pagetable_setup_start:      platform specific pre paging_init() call
  * @pagetable_setup_done:       platform specific post paging_init() call
@@ -123,6 +134,7 @@ struct x86_init_ops {
         struct x86_init_mpparse         mpparse;
         struct x86_init_irqs            irqs;
         struct x86_init_oem             oem;
+        struct x86_init_mapping         mapping;
         struct x86_init_paging          paging;
         struct x86_init_timers          timers;
         struct x86_init_iommu           iommu;
diff --git a/arch/x86/include/asm/xen/page.h b/arch/x86/include/asm/xen/page.h
index c61934fbf22a..64a619d47d34 100644
--- a/arch/x86/include/asm/xen/page.h
+++ b/arch/x86/include/asm/xen/page.h
@@ -47,8 +47,9 @@ extern bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn);
 extern unsigned long set_phys_range_identity(unsigned long pfn_s,
                                              unsigned long pfn_e);
 
-extern int m2p_add_override(unsigned long mfn, struct page *page);
-extern int m2p_remove_override(struct page *page);
+extern int m2p_add_override(unsigned long mfn, struct page *page,
+                            bool clear_pte);
+extern int m2p_remove_override(struct page *page, bool clear_pte);
 extern struct page *m2p_find_override(unsigned long mfn);
 extern unsigned long m2p_find_override_pfn(unsigned long mfn, unsigned long pfn);
 
diff --git a/arch/x86/include/asm/xen/pci.h b/arch/x86/include/asm/xen/pci.h
index aa8620989162..4fbda9a3f339 100644
--- a/arch/x86/include/asm/xen/pci.h
+++ b/arch/x86/include/asm/xen/pci.h
@@ -15,10 +15,26 @@ static inline int pci_xen_hvm_init(void)
 #endif
 #if defined(CONFIG_XEN_DOM0)
 void __init xen_setup_pirqs(void);
+int xen_find_device_domain_owner(struct pci_dev *dev);
+int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain);
+int xen_unregister_device_domain_owner(struct pci_dev *dev);
 #else
 static inline void __init xen_setup_pirqs(void)
 {
 }
+static inline int xen_find_device_domain_owner(struct pci_dev *dev)
+{
+        return -1;
+}
+static inline int xen_register_device_domain_owner(struct pci_dev *dev,
+                                                   uint16_t domain)
+{
+        return -1;
+}
+static inline int xen_unregister_device_domain_owner(struct pci_dev *dev)
+{
+        return -1;
+}
 #endif
 
 #if defined(CONFIG_PCI_MSI)
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 7338ef2218bc..97ebf82e0b7f 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -117,7 +117,7 @@ obj-$(CONFIG_OF)			+= devicetree.o
 ifeq ($(CONFIG_X86_64),y)
         obj-$(CONFIG_AUDIT)             += audit_64.o
 
-        obj-$(CONFIG_GART_IOMMU)        += pci-gart_64.o aperture_64.o
+        obj-$(CONFIG_GART_IOMMU)        += amd_gart_64.o aperture_64.o
         obj-$(CONFIG_CALGARY_IOMMU)     += pci-calgary_64.o tce_64.o
         obj-$(CONFIG_AMD_IOMMU)         += amd_iommu_init.o amd_iommu.o
 
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index ff93bc1b09c3..18a857ba7a25 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -112,11 +112,6 @@ static int __init acpi_sleep_setup(char *str)
 #ifdef CONFIG_HIBERNATION
                 if (strncmp(str, "s4_nohwsig", 10) == 0)
                         acpi_no_s4_hw_signature();
-                if (strncmp(str, "s4_nonvs", 8) == 0) {
-                        pr_warning("ACPI: acpi_sleep=s4_nonvs is deprecated, "
-                                        "please use acpi_sleep=nonvs instead");
-                        acpi_nvs_nosave();
-                }
 #endif
                 if (strncmp(str, "nonvs", 5) == 0)
                         acpi_nvs_nosave();
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index 4a234677e213..1eeeafcb4410 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -210,6 +210,15 @@ void __init_or_module apply_alternatives(struct alt_instr *start,
         u8 insnbuf[MAX_PATCH_LEN];
 
         DPRINTK("%s: alt table %p -> %p\n", __func__, start, end);
+        /*
+         * The scan order should be from start to end. A later scanned
+         * alternative code can overwrite a previous scanned alternative code.
+         * Some kernel functions (e.g. memcpy, memset, etc) use this order to
+         * patch code.
+         *
+         * So be careful if you want to change the scan order to any other
+         * order.
+         */
         for (a = start; a < end; a++) {
                 u8 *instr = a->instr;
                 BUG_ON(a->replacementlen > a->instrlen);
@@ -679,7 +688,7 @@ void __kprobes text_poke_smp_batch(struct text_poke_param *params, int n)
         __stop_machine(stop_machine_text_poke, (void *)&tpp, NULL);
 }
 
-#if defined(CONFIG_DYNAMIC_FTRACE) || defined(HAVE_JUMP_LABEL)
+#if defined(CONFIG_DYNAMIC_FTRACE) || defined(CONFIG_JUMP_LABEL)
 
 #ifdef CONFIG_X86_64
 unsigned char ideal_nop5[5] = { 0x66, 0x66, 0x66, 0x66, 0x90 };
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/amd_gart_64.c
index b117efd24f71..b117efd24f71 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/amd_gart_64.c
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index 57ca77787220..873e7e1ead7b 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -18,6 +18,7 @@
  */
 
 #include <linux/pci.h>
+#include <linux/pci-ats.h>
 #include <linux/bitmap.h>
 #include <linux/slab.h>
 #include <linux/debugfs.h>
@@ -25,6 +26,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/iommu-helper.h>
 #include <linux/iommu.h>
+#include <linux/delay.h>
 #include <asm/proto.h>
 #include <asm/iommu.h>
 #include <asm/gart.h>
@@ -34,7 +36,7 @@
 
 #define CMD_SET_TYPE(cmd, t) ((cmd)->data[1] |= ((t) << 28))
 
-#define EXIT_LOOP_COUNT 10000000
+#define LOOP_TIMEOUT    100000
 
 static DEFINE_RWLOCK(amd_iommu_devtable_lock);
 
@@ -57,7 +59,6 @@ struct iommu_cmd {
         u32 data[4];
 };
 
-static void reset_iommu_command_buffer(struct amd_iommu *iommu);
 static void update_domain(struct protection_domain *domain);
 
 /****************************************************************************
@@ -322,8 +323,6 @@ static void iommu_print_event(struct amd_iommu *iommu, void *__evt)
                 break;
         case EVENT_TYPE_ILL_CMD:
                 printk("ILLEGAL_COMMAND_ERROR address=0x%016llx]\n", address);
-                iommu->reset_in_progress = true;
-                reset_iommu_command_buffer(iommu);
                 dump_command(address);
                 break;
         case EVENT_TYPE_CMD_HARD_ERR:
@@ -367,7 +366,7 @@ static void iommu_poll_events(struct amd_iommu *iommu)
         spin_unlock_irqrestore(&iommu->lock, flags);
 }
 
-irqreturn_t amd_iommu_int_handler(int irq, void *data)
+irqreturn_t amd_iommu_int_thread(int irq, void *data)
 {
         struct amd_iommu *iommu;
 
@@ -377,192 +376,300 @@ irqreturn_t amd_iommu_int_handler(int irq, void *data)
         return IRQ_HANDLED;
 }
 
+irqreturn_t amd_iommu_int_handler(int irq, void *data)
+{
+        return IRQ_WAKE_THREAD;
+}
+
 /****************************************************************************
  *
  * IOMMU command queuing functions
  *
  ****************************************************************************/
 
-/*
- * Writes the command to the IOMMUs command buffer and informs the
- * hardware about the new command. Must be called with iommu->lock held.
- */
-static int __iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd)
+static int wait_on_sem(volatile u64 *sem)
+{
+        int i = 0;
+
+        while (*sem == 0 && i < LOOP_TIMEOUT) {
+                udelay(1);
+                i += 1;
+        }
+
+        if (i == LOOP_TIMEOUT) {
+                pr_alert("AMD-Vi: Completion-Wait loop timed out\n");
+                return -EIO;
+        }
+
+        return 0;
+}
+
+static void copy_cmd_to_buffer(struct amd_iommu *iommu,
+                               struct iommu_cmd *cmd,
+                               u32 tail)
 {
-        u32 tail, head;
         u8 *target;
 
-        WARN_ON(iommu->cmd_buf_size & CMD_BUFFER_UNINITIALIZED);
-        tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
         target = iommu->cmd_buf + tail;
-        memcpy_toio(target, cmd, sizeof(*cmd));
-        tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size;
-        head = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET);
-        if (tail == head)
-                return -ENOMEM;
+        tail   = (tail + sizeof(*cmd)) % iommu->cmd_buf_size;
+
+        /* Copy command to buffer */
+        memcpy(target, cmd, sizeof(*cmd));
+
+        /* Tell the IOMMU about it */
         writel(tail, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
+}
 
-        return 0;
+static void build_completion_wait(struct iommu_cmd *cmd, u64 address)
+{
+        WARN_ON(address & 0x7ULL);
+
+        memset(cmd, 0, sizeof(*cmd));
+        cmd->data[0] = lower_32_bits(__pa(address)) | CMD_COMPL_WAIT_STORE_MASK;
+        cmd->data[1] = upper_32_bits(__pa(address));
+        cmd->data[2] = 1;
+        CMD_SET_TYPE(cmd, CMD_COMPL_WAIT);
+}
+
+static void build_inv_dte(struct iommu_cmd *cmd, u16 devid)
+{
+        memset(cmd, 0, sizeof(*cmd));
+        cmd->data[0] = devid;
+        CMD_SET_TYPE(cmd, CMD_INV_DEV_ENTRY);
+}
+
+static void build_inv_iommu_pages(struct iommu_cmd *cmd, u64 address,
+                                  size_t size, u16 domid, int pde)
+{
+        u64 pages;
+        int s;
+
+        pages = iommu_num_pages(address, size, PAGE_SIZE);
+        s     = 0;
+
+        if (pages > 1) {
+                /*
+                 * If we have to flush more than one page, flush all
+                 * TLB entries for this domain
+                 */
+                address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS;
+                s = 1;
+        }
+
+        address &= PAGE_MASK;
+
+        memset(cmd, 0, sizeof(*cmd));
+        cmd->data[1] |= domid;
+        cmd->data[2]  = lower_32_bits(address);
+        cmd->data[3]  = upper_32_bits(address);
+        CMD_SET_TYPE(cmd, CMD_INV_IOMMU_PAGES);
+        if (s) /* size bit - we flush more than one 4kb page */
+                cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK;
+        if (pde) /* PDE bit - we wan't flush everything not only the PTEs */
+                cmd->data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK;
+}
+
+static void build_inv_iotlb_pages(struct iommu_cmd *cmd, u16 devid, int qdep,
+                                  u64 address, size_t size)
+{
+        u64 pages;
+        int s;
+
+        pages = iommu_num_pages(address, size, PAGE_SIZE);
+        s     = 0;
+
+        if (pages > 1) {
+                /*
+                 * If we have to flush more than one page, flush all
+                 * TLB entries for this domain
+                 */
+                address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS;
+                s = 1;
+        }
+
+        address &= PAGE_MASK;
+
+        memset(cmd, 0, sizeof(*cmd));
+        cmd->data[0]  = devid;
+        cmd->data[0] |= (qdep & 0xff) << 24;
+        cmd->data[1]  = devid;
+        cmd->data[2]  = lower_32_bits(address);
+        cmd->data[3]  = upper_32_bits(address);
+        CMD_SET_TYPE(cmd, CMD_INV_IOTLB_PAGES);
+        if (s)
+                cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK;
+}
+
+static void build_inv_all(struct iommu_cmd *cmd)
+{
+        memset(cmd, 0, sizeof(*cmd));
+        CMD_SET_TYPE(cmd, CMD_INV_ALL);
 }
 
 /*
- * General queuing function for commands. Takes iommu->lock and calls
- * __iommu_queue_command().
+ * Writes the command to the IOMMUs command buffer and informs the
+ * hardware about the new command.
  */
 static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd)
 {
+        u32 left, tail, head, next_tail;
         unsigned long flags;
-        int ret;
 
+        WARN_ON(iommu->cmd_buf_size & CMD_BUFFER_UNINITIALIZED);
+
+again:
         spin_lock_irqsave(&iommu->lock, flags);
-        ret = __iommu_queue_command(iommu, cmd);
-        if (!ret)
-                iommu->need_sync = true;
-        spin_unlock_irqrestore(&iommu->lock, flags);
 
-        return ret;
-}
+        head      = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET);
+        tail      = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
+        next_tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size;
+        left      = (head - next_tail) % iommu->cmd_buf_size;
 
-/*
- * This function waits until an IOMMU has completed a completion
- * wait command
- */
-static void __iommu_wait_for_completion(struct amd_iommu *iommu)
-{
-        int ready = 0;
-        unsigned status = 0;
-        unsigned long i = 0;
+        if (left <= 2) {
+                struct iommu_cmd sync_cmd;
+                volatile u64 sem = 0;
+                int ret;
 
-        INC_STATS_COUNTER(compl_wait);
+                build_completion_wait(&sync_cmd, (u64)&sem);
+                copy_cmd_to_buffer(iommu, &sync_cmd, tail);
 
-        while (!ready && (i < EXIT_LOOP_COUNT)) {
-                ++i;
-                /* wait for the bit to become one */
-                status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET);
-                ready = status & MMIO_STATUS_COM_WAIT_INT_MASK;
+                spin_unlock_irqrestore(&iommu->lock, flags);
+
+                if ((ret = wait_on_sem(&sem)) != 0)
+                        return ret;
+
+                goto again;
         }
 
-        /* set bit back to zero */
-        status &= ~MMIO_STATUS_COM_WAIT_INT_MASK;
-        writel(status, iommu->mmio_base + MMIO_STATUS_OFFSET);
+        copy_cmd_to_buffer(iommu, cmd, tail);
+
+        /* We need to sync now to make sure all commands are processed */
+        iommu->need_sync = true;
+
+        spin_unlock_irqrestore(&iommu->lock, flags);
 
-        if (unlikely(i == EXIT_LOOP_COUNT))
-                iommu->reset_in_progress = true;
+        return 0;
 }
 
 /*
  * This function queues a completion wait command into the command
  * buffer of an IOMMU
  */
-static int __iommu_completion_wait(struct amd_iommu *iommu)
+static int iommu_completion_wait(struct amd_iommu *iommu)
 {
         struct iommu_cmd cmd;
+        volatile u64 sem = 0;
+        int ret;
 
-         memset(&cmd, 0, sizeof(cmd));
-         cmd.data[0] = CMD_COMPL_WAIT_INT_MASK;
-         CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT);
+        if (!iommu->need_sync)
+                return 0;
 
-         return __iommu_queue_command(iommu, &cmd);
+        build_completion_wait(&cmd, (u64)&sem);
+
+        ret = iommu_queue_command(iommu, &cmd);
+        if (ret)
+                return ret;
+
+        return wait_on_sem(&sem);
 }
 
-/*
- * This function is called whenever we need to ensure that the IOMMU has
- * completed execution of all commands we sent. It sends a
- * COMPLETION_WAIT command and waits for it to finish. The IOMMU informs
- * us about that by writing a value to a physical address we pass with
- * the command.
- */
-static int iommu_completion_wait(struct amd_iommu *iommu)
+static int iommu_flush_dte(struct amd_iommu *iommu, u16 devid)
 {
-        int ret = 0;
-        unsigned long flags;
+        struct iommu_cmd cmd;
 
-        spin_lock_irqsave(&iommu->lock, flags);
+        build_inv_dte(&cmd, devid);
 
-        if (!iommu->need_sync)
-                goto out;
+        return iommu_queue_command(iommu, &cmd);
+}
 
-        ret = __iommu_completion_wait(iommu);
+static void iommu_flush_dte_all(struct amd_iommu *iommu)
+{
+        u32 devid;
 
-        iommu->need_sync = false;
+        for (devid = 0; devid <= 0xffff; ++devid)
+                iommu_flush_dte(iommu, devid);
 
-        if (ret)
-                goto out;
-
-        __iommu_wait_for_completion(iommu);
+        iommu_completion_wait(iommu);
+}
 
-out:
-        spin_unlock_irqrestore(&iommu->lock, flags);
+/*
+ * This function uses heavy locking and may disable irqs for some time. But
+ * this is no issue because it is only called during resume.
+ */
+static void iommu_flush_tlb_all(struct amd_iommu *iommu)
+{
+        u32 dom_id;
 
-        if (iommu->reset_in_progress)
-                reset_iommu_command_buffer(iommu);
+        for (dom_id = 0; dom_id <= 0xffff; ++dom_id) {
+                struct iommu_cmd cmd;
+                build_inv_iommu_pages(&cmd, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS,
+                                      dom_id, 1);
+                iommu_queue_command(iommu, &cmd);
+        }
 
-        return 0;
+        iommu_completion_wait(iommu);
 }
 
-static void iommu_flush_complete(struct protection_domain *domain)
+static void iommu_flush_all(struct amd_iommu *iommu)
 {
-        int i;
+        struct iommu_cmd cmd;
 
-        for (i = 0; i < amd_iommus_present; ++i) {
-                if (!domain->dev_iommu[i])
-                        continue;
+        build_inv_all(&cmd);
 
-                /*
-                 * Devices of this domain are behind this IOMMU
-                 * We need to wait for completion of all commands.
-                 */
-                iommu_completion_wait(amd_iommus[i]);
+        iommu_queue_command(iommu, &cmd);
+        iommu_completion_wait(iommu);
+}
+
+void iommu_flush_all_caches(struct amd_iommu *iommu)
+{
+        if (iommu_feature(iommu, FEATURE_IA)) {
+                iommu_flush_all(iommu);
+        } else {
+                iommu_flush_dte_all(iommu);
+                iommu_flush_tlb_all(iommu);
         }
 }
 
 /*
- * Command send function for invalidating a device table entry
+ * Command send function for flushing on-device TLB
  */
-static int iommu_flush_device(struct device *dev)
+static int device_flush_iotlb(struct device *dev, u64 address, size_t size)
 {
+        struct pci_dev *pdev = to_pci_dev(dev);
         struct amd_iommu *iommu;
         struct iommu_cmd cmd;
         u16 devid;
+        int qdep;
 
+        qdep  = pci_ats_queue_depth(pdev);
         devid = get_device_id(dev);
         iommu = amd_iommu_rlookup_table[devid];
 
-        /* Build command */
-        memset(&cmd, 0, sizeof(cmd));
-        CMD_SET_TYPE(&cmd, CMD_INV_DEV_ENTRY);
-        cmd.data[0] = devid;
+        build_inv_iotlb_pages(&cmd, devid, qdep, address, size);
 
         return iommu_queue_command(iommu, &cmd);
 }
 
-static void __iommu_build_inv_iommu_pages(struct iommu_cmd *cmd, u64 address,
-                                          u16 domid, int pde, int s)
-{
-        memset(cmd, 0, sizeof(*cmd));
-        address &= PAGE_MASK;
-        CMD_SET_TYPE(cmd, CMD_INV_IOMMU_PAGES);
-        cmd->data[1] |= domid;
-        cmd->data[2] = lower_32_bits(address);
-        cmd->data[3] = upper_32_bits(address);
-        if (s) /* size bit - we flush more than one 4kb page */
-                cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK;
-        if (pde) /* PDE bit - we wan't flush everything not only the PTEs */
-                cmd->data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK;
-}
-
 /*
- * Generic command send function for invalidaing TLB entries
+ * Command send function for invalidating a device table entry
  */
-static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu,
-                u64 address, u16 domid, int pde, int s)
+static int device_flush_dte(struct device *dev)
 {
-        struct iommu_cmd cmd;
+        struct amd_iommu *iommu;
+        struct pci_dev *pdev;
+        u16 devid;
         int ret;
 
-        __iommu_build_inv_iommu_pages(&cmd, address, domid, pde, s);
+        pdev  = to_pci_dev(dev);
+        devid = get_device_id(dev);
+        iommu = amd_iommu_rlookup_table[devid];
 
-        ret = iommu_queue_command(iommu, &cmd);
+        ret = iommu_flush_dte(iommu, devid);
+        if (ret)
+                return ret;
+
+        if (pci_ats_enabled(pdev))
+                ret = device_flush_iotlb(dev, 0, ~0UL);
 
         return ret;
 }
@@ -572,23 +679,14 @@ static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu,
  * It invalidates a single PTE if the range to flush is within a single
  * page. Otherwise it flushes the whole TLB of the IOMMU.
  */
-static void __iommu_flush_pages(struct protection_domain *domain,
-                                u64 address, size_t size, int pde)
+static void __domain_flush_pages(struct protection_domain *domain,
+                                 u64 address, size_t size, int pde)
 {
-        int s = 0, i;
-        unsigned long pages = iommu_num_pages(address, size, PAGE_SIZE);
-
-        address &= PAGE_MASK;
-
-        if (pages > 1) {
-                /*
-                 * If we have to flush more than one page, flush all
-                 * TLB entries for this domain
-                 */
-                address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS;
-                s = 1;
-        }
+        struct iommu_dev_data *dev_data;
+        struct iommu_cmd cmd;
+        int ret = 0, i;
 
+        build_inv_iommu_pages(&cmd, address, size, domain->id, pde);
 
         for (i = 0; i < amd_iommus_present; ++i) {
                 if (!domain->dev_iommu[i])
@@ -598,101 +696,70 @@ static void __iommu_flush_pages(struct protection_domain *domain,
                  * Devices of this domain are behind this IOMMU
                  * We need a TLB flush
                  */
-                iommu_queue_inv_iommu_pages(amd_iommus[i], address,
-                                            domain->id, pde, s);
+                ret |= iommu_queue_command(amd_iommus[i], &cmd);
+        }
+
+        list_for_each_entry(dev_data, &domain->dev_list, list) {
+                struct pci_dev *pdev = to_pci_dev(dev_data->dev);
+
+                if (!pci_ats_enabled(pdev))
+                        continue;
+
+                ret |= device_flush_iotlb(dev_data->dev, address, size);
         }
 
-        return;
+        WARN_ON(ret);
 }
 
-static void iommu_flush_pages(struct protection_domain *domain,
-                             u64 address, size_t size)
+static void domain_flush_pages(struct protection_domain *domain,
+                               u64 address, size_t size)
 {
-        __iommu_flush_pages(domain, address, size, 0);
+        __domain_flush_pages(domain, address, size, 0);
 }
 
 /* Flush the whole IO/TLB for a given protection domain */
-static void iommu_flush_tlb(struct protection_domain *domain)
+static void domain_flush_tlb(struct protection_domain *domain)
 {
-        __iommu_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 0);
+        __domain_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 0);
 }
 
 /* Flush the whole IO/TLB for a given protection domain - including PDE */
-static void iommu_flush_tlb_pde(struct protection_domain *domain)
+static void domain_flush_tlb_pde(struct protection_domain *domain)
 {
-        __iommu_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 1);
-}
-
-
-/*
- * This function flushes the DTEs for all devices in domain
- */
-static void iommu_flush_domain_devices(struct protection_domain *domain)
-{
-        struct iommu_dev_data *dev_data;
-        unsigned long flags;
-
-        spin_lock_irqsave(&domain->lock, flags);
-
-        list_for_each_entry(dev_data, &domain->dev_list, list)
-                iommu_flush_device(dev_data->dev);
-
-        spin_unlock_irqrestore(&domain->lock, flags);
+        __domain_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 1);
 }
 
-static void iommu_flush_all_domain_devices(void)
+static void domain_flush_complete(struct protection_domain *domain)
 {
-        struct protection_domain *domain;
-        unsigned long flags;
+        int i;
 
-        spin_lock_irqsave(&amd_iommu_pd_lock, flags);
+        for (i = 0; i < amd_iommus_present; ++i) {
+                if (!domain->dev_iommu[i])
+                        continue;
 
-        list_for_each_entry(domain, &amd_iommu_pd_list, list) {
-                iommu_flush_domain_devices(domain);
-                iommu_flush_complete(domain);
+                /*
+                 * Devices of this domain are behind this IOMMU
+                 * We need to wait for completion of all commands.
+                 */
+                iommu_completion_wait(amd_iommus[i]);
         }
-
-        spin_unlock_irqrestore(&amd_iommu_pd_lock, flags);
 }
 
-void amd_iommu_flush_all_devices(void)
-{
-        iommu_flush_all_domain_devices();
-}
 
 /*
- * This function uses heavy locking and may disable irqs for some time. But
- * this is no issue because it is only called during resume.
+ * This function flushes the DTEs for all devices in domain
  */
-void amd_iommu_flush_all_domains(void)
+static void domain_flush_devices(struct protection_domain *domain)
 {
-        struct protection_domain *domain;
+        struct iommu_dev_data *dev_data;
         unsigned long flags;
 
-        spin_lock_irqsave(&amd_iommu_pd_lock, flags);
-
-        list_for_each_entry(domain, &amd_iommu_pd_list, list) {
-                spin_lock(&domain->lock);
-                iommu_flush_tlb_pde(domain);
-                iommu_flush_complete(domain);
-                spin_unlock(&domain->lock);
-        }
-
-        spin_unlock_irqrestore(&amd_iommu_pd_lock, flags);
-}
-
-static void reset_iommu_command_buffer(struct amd_iommu *iommu)
-{
-        pr_err("AMD-Vi: Resetting IOMMU command buffer\n");
-
-        if (iommu->reset_in_progress)
-                panic("AMD-Vi: ILLEGAL_COMMAND_ERROR while resetting command buffer\n");
+        spin_lock_irqsave(&domain->lock, flags);
 
-        amd_iommu_reset_cmd_buffer(iommu);
-        amd_iommu_flush_all_devices();
-        amd_iommu_flush_all_domains();
+        list_for_each_entry(dev_data, &domain->dev_list, list)
+                device_flush_dte(dev_data->dev);
 
-        iommu->reset_in_progress = false;
+        spin_unlock_irqrestore(&domain->lock, flags);
 }
 
 /****************************************************************************
@@ -1410,17 +1477,22 @@ static bool dma_ops_domain(struct protection_domain *domain)
         return domain->flags & PD_DMA_OPS_MASK;
 }
 
-static void set_dte_entry(u16 devid, struct protection_domain *domain)
+static void set_dte_entry(u16 devid, struct protection_domain *domain, bool ats)
 {
         u64 pte_root = virt_to_phys(domain->pt_root);
+        u32 flags = 0;
 
         pte_root |= (domain->mode & DEV_ENTRY_MODE_MASK)
                     << DEV_ENTRY_MODE_SHIFT;
         pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | IOMMU_PTE_TV;
 
-        amd_iommu_dev_table[devid].data[2] = domain->id;
-        amd_iommu_dev_table[devid].data[1] = upper_32_bits(pte_root);
-        amd_iommu_dev_table[devid].data[0] = lower_32_bits(pte_root);
+        if (ats)
+                flags |= DTE_FLAG_IOTLB;
+
+        amd_iommu_dev_table[devid].data[3] |= flags;
+        amd_iommu_dev_table[devid].data[2]  = domain->id;
+        amd_iommu_dev_table[devid].data[1]  = upper_32_bits(pte_root);
+        amd_iommu_dev_table[devid].data[0]  = lower_32_bits(pte_root);
 }
 
 static void clear_dte_entry(u16 devid)
@@ -1437,34 +1509,42 @@ static void do_attach(struct device *dev, struct protection_domain *domain)
 {
         struct iommu_dev_data *dev_data;
         struct amd_iommu *iommu;
+        struct pci_dev *pdev;
+        bool ats = false;
         u16 devid;
 
         devid    = get_device_id(dev);
         iommu    = amd_iommu_rlookup_table[devid];
         dev_data = get_dev_data(dev);
+        pdev     = to_pci_dev(dev);
+
+        if (amd_iommu_iotlb_sup)
+                ats = pci_ats_enabled(pdev);
 
         /* Update data structures */
         dev_data->domain = domain;
         list_add(&dev_data->list, &domain->dev_list);
-        set_dte_entry(devid, domain);
+        set_dte_entry(devid, domain, ats);
 
         /* Do reference counting */
         domain->dev_iommu[iommu->index] += 1;
         domain->dev_cnt                 += 1;
 
         /* Flush the DTE entry */
-        iommu_flush_device(dev);
+        device_flush_dte(dev);
 }
 
 static void do_detach(struct device *dev)
 {
         struct iommu_dev_data *dev_data;
         struct amd_iommu *iommu;
+        struct pci_dev *pdev;
         u16 devid;
 
         devid    = get_device_id(dev);
         iommu    = amd_iommu_rlookup_table[devid];
         dev_data = get_dev_data(dev);
+        pdev     = to_pci_dev(dev);
 
         /* decrease reference counters */
         dev_data->domain->dev_iommu[iommu->index] -= 1;
@@ -1476,7 +1556,7 @@ static void do_detach(struct device *dev)
         clear_dte_entry(devid);
 
         /* Flush the DTE entry */
-        iommu_flush_device(dev);
+        device_flush_dte(dev);
 }
 
 /*
@@ -1539,9 +1619,13 @@ out_unlock:
 static int attach_device(struct device *dev,
                          struct protection_domain *domain)
 {
+        struct pci_dev *pdev = to_pci_dev(dev);
         unsigned long flags;
         int ret;
 
+        if (amd_iommu_iotlb_sup)
+                pci_enable_ats(pdev, PAGE_SHIFT);
+
         write_lock_irqsave(&amd_iommu_devtable_lock, flags);
         ret = __attach_device(dev, domain);
         write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
@@ -1551,7 +1635,7 @@ static int attach_device(struct device *dev,
          * left the caches in the IOMMU dirty. So we have to flush
          * here to evict all dirty stuff.
          */
-        iommu_flush_tlb_pde(domain);
+        domain_flush_tlb_pde(domain);
 
         return ret;
 }
@@ -1598,12 +1682,16 @@ static void __detach_device(struct device *dev)
  */
 static void detach_device(struct device *dev)
 {
+        struct pci_dev *pdev = to_pci_dev(dev);
         unsigned long flags;
 
         /* lock device table */
         write_lock_irqsave(&amd_iommu_devtable_lock, flags);
         __detach_device(dev);
         write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
+
+        if (amd_iommu_iotlb_sup && pci_ats_enabled(pdev))
+                pci_disable_ats(pdev);
 }
 
 /*
@@ -1692,7 +1780,7 @@ static int device_change_notifier(struct notifier_block *nb,
                 goto out;
         }
 
-        iommu_flush_device(dev);
+        device_flush_dte(dev);
         iommu_completion_wait(iommu);
 
 out:
@@ -1753,8 +1841,9 @@ static void update_device_table(struct protection_domain *domain)
         struct iommu_dev_data *dev_data;
 
         list_for_each_entry(dev_data, &domain->dev_list, list) {
+                struct pci_dev *pdev = to_pci_dev(dev_data->dev);
                 u16 devid = get_device_id(dev_data->dev);
-                set_dte_entry(devid, domain);
+                set_dte_entry(devid, domain, pci_ats_enabled(pdev));
         }
 }
 
@@ -1764,8 +1853,9 @@ static void update_domain(struct protection_domain *domain)
                 return;
 
         update_device_table(domain);
-        iommu_flush_domain_devices(domain);
-        iommu_flush_tlb_pde(domain);
+
+        domain_flush_devices(domain);
+        domain_flush_tlb_pde(domain);
 
         domain->updated = false;
 }
@@ -1924,10 +2014,10 @@ retry:
         ADD_STATS_COUNTER(alloced_io_mem, size);
 
         if (unlikely(dma_dom->need_flush && !amd_iommu_unmap_flush)) {
-                iommu_flush_tlb(&dma_dom->domain);
+                domain_flush_tlb(&dma_dom->domain);
                 dma_dom->need_flush = false;
         } else if (unlikely(amd_iommu_np_cache))
-                iommu_flush_pages(&dma_dom->domain, address, size);
+                domain_flush_pages(&dma_dom->domain, address, size);
 
 out:
         return address;
@@ -1976,7 +2066,7 @@ static void __unmap_single(struct dma_ops_domain *dma_dom,
         dma_ops_free_addresses(dma_dom, dma_addr, pages);
 
         if (amd_iommu_unmap_flush || dma_dom->need_flush) {
-                iommu_flush_pages(&dma_dom->domain, flush_addr, size);
+                domain_flush_pages(&dma_dom->domain, flush_addr, size);
                 dma_dom->need_flush = false;
         }
 }
@@ -2012,7 +2102,7 @@ static dma_addr_t map_page(struct device *dev, struct page *page,
         if (addr == DMA_ERROR_CODE)
                 goto out;
 
-        iommu_flush_complete(domain);
+        domain_flush_complete(domain);
 
 out:
         spin_unlock_irqrestore(&domain->lock, flags);
@@ -2039,7 +2129,7 @@ static void unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size,
 
         __unmap_single(domain->priv, dma_addr, size, dir);
 
-        iommu_flush_complete(domain);
+        domain_flush_complete(domain);
 
         spin_unlock_irqrestore(&domain->lock, flags);
 }
@@ -2104,7 +2194,7 @@ static int map_sg(struct device *dev, struct scatterlist *sglist,
                         goto unmap;
         }
 
-        iommu_flush_complete(domain);
+        domain_flush_complete(domain);
 
 out:
         spin_unlock_irqrestore(&domain->lock, flags);
@@ -2150,7 +2240,7 @@ static void unmap_sg(struct device *dev, struct scatterlist *sglist,
                 s->dma_address = s->dma_length = 0;
         }
 
-        iommu_flush_complete(domain);
+        domain_flush_complete(domain);
 
         spin_unlock_irqrestore(&domain->lock, flags);
 }
@@ -2200,7 +2290,7 @@ static void *alloc_coherent(struct device *dev, size_t size,
                 goto out_free;
         }
 
-        iommu_flush_complete(domain);
+        domain_flush_complete(domain);
 
         spin_unlock_irqrestore(&domain->lock, flags);
 
@@ -2232,7 +2322,7 @@ static void free_coherent(struct device *dev, size_t size,
 
         __unmap_single(domain->priv, dma_addr, size, DMA_BIDIRECTIONAL);
 
-        iommu_flush_complete(domain);
+        domain_flush_complete(domain);
 
         spin_unlock_irqrestore(&domain->lock, flags);
 
@@ -2476,7 +2566,7 @@ static void amd_iommu_detach_device(struct iommu_domain *dom,
         if (!iommu)
                 return;
 
-        iommu_flush_device(dev);
+        device_flush_dte(dev);
         iommu_completion_wait(iommu);
 }
 
@@ -2542,7 +2632,7 @@ static int amd_iommu_unmap(struct iommu_domain *dom, unsigned long iova,
         unmap_size = iommu_unmap_page(domain, iova, page_size);
         mutex_unlock(&domain->api_lock);
 
-        iommu_flush_tlb_pde(domain);
+        domain_flush_tlb_pde(domain);
 
         return get_order(unmap_size);
 }
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index 246d727b65b7..9179c21120a8 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -137,6 +137,7 @@ int amd_iommus_present;
 
 /* IOMMUs have a non-present cache? */
 bool amd_iommu_np_cache __read_mostly;
+bool amd_iommu_iotlb_sup __read_mostly = true;
 
 /*
  * The ACPI table parsing functions set this variable on an error
@@ -180,6 +181,12 @@ static u32 dev_table_size;	/* size of the device table */
 static u32 alias_table_size;    /* size of the alias table */
 static u32 rlookup_table_size;  /* size if the rlookup table */
 
+/*
+ * This function flushes all internal caches of
+ * the IOMMU used by this driver.
+ */
+extern void iommu_flush_all_caches(struct amd_iommu *iommu);
+
 static inline void update_last_devid(u16 devid)
 {
         if (devid > amd_iommu_last_bdf)
@@ -293,9 +300,23 @@ static void iommu_feature_disable(struct amd_iommu *iommu, u8 bit)
 /* Function to enable the hardware */
 static void iommu_enable(struct amd_iommu *iommu)
 {
-        printk(KERN_INFO "AMD-Vi: Enabling IOMMU at %s cap 0x%hx\n",
+        static const char * const feat_str[] = {
+                "PreF", "PPR", "X2APIC", "NX", "GT", "[5]",
+                "IA", "GA", "HE", "PC", NULL
+        };
+        int i;
+
+        printk(KERN_INFO "AMD-Vi: Enabling IOMMU at %s cap 0x%hx",
                dev_name(&iommu->dev->dev), iommu->cap_ptr);
 
+        if (iommu->cap & (1 << IOMMU_CAP_EFR)) {
+                printk(KERN_CONT " extended features: ");
+                for (i = 0; feat_str[i]; ++i)
+                        if (iommu_feature(iommu, (1ULL << i)))
+                                printk(KERN_CONT " %s", feat_str[i]);
+        }
+        printk(KERN_CONT "\n");
+
         iommu_feature_enable(iommu, CONTROL_IOMMU_EN);
 }
 
@@ -651,7 +672,7 @@ static void __init set_device_exclusion_range(u16 devid, struct ivmd_header *m)
 static void __init init_iommu_from_pci(struct amd_iommu *iommu)
 {
         int cap_ptr = iommu->cap_ptr;
-        u32 range, misc;
+        u32 range, misc, low, high;
         int i, j;
 
         pci_read_config_dword(iommu->dev, cap_ptr + MMIO_CAP_HDR_OFFSET,
@@ -667,6 +688,15 @@ static void __init init_iommu_from_pci(struct amd_iommu *iommu)
                                         MMIO_GET_LD(range));
         iommu->evt_msi_num = MMIO_MSI_NUM(misc);
 
+        if (!(iommu->cap & (1 << IOMMU_CAP_IOTLB)))
+                amd_iommu_iotlb_sup = false;
+
+        /* read extended feature bits */
+        low  = readl(iommu->mmio_base + MMIO_EXT_FEATURES);
+        high = readl(iommu->mmio_base + MMIO_EXT_FEATURES + 4);
+
+        iommu->features = ((u64)high << 32) | low;
+
         if (!is_rd890_iommu(iommu->dev))
                 return;
 
@@ -1004,10 +1034,11 @@ static int iommu_setup_msi(struct amd_iommu *iommu)
         if (pci_enable_msi(iommu->dev))
                 return 1;
 
-        r = request_irq(iommu->dev->irq, amd_iommu_int_handler,
-                        IRQF_SAMPLE_RANDOM,
-                        "AMD-Vi",
-                        NULL);
+        r = request_threaded_irq(iommu->dev->irq,
+                                 amd_iommu_int_handler,
+                                 amd_iommu_int_thread,
+                                 0, "AMD-Vi",
+                                 iommu->dev);
 
         if (r) {
                 pci_disable_msi(iommu->dev);
@@ -1244,6 +1275,7 @@ static void enable_iommus(void)
                 iommu_set_exclusion_range(iommu);
                 iommu_init_msi(iommu);
                 iommu_enable(iommu);
+                iommu_flush_all_caches(iommu);
         }
 }
 
@@ -1274,8 +1306,8 @@ static void amd_iommu_resume(void)
          * we have to flush after the IOMMUs are enabled because a
          * disabled IOMMU will never execute the commands we send
          */
-        amd_iommu_flush_all_devices();
-        amd_iommu_flush_all_domains();
+        for_each_iommu(iommu)
+                iommu_flush_all_caches(iommu);
 }
 
 static int amd_iommu_suspend(void)
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 33b10a0fc095..7acd2d2ac965 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -37,6 +37,13 @@
 #include <asm/smp.h>
 #include <asm/x86_init.h>
 #include <asm/emergency-restart.h>
+#include <asm/nmi.h>
+
+/* BMC sets a bit this MMR non-zero before sending an NMI */
+#define UVH_NMI_MMR                             UVH_SCRATCH5
+#define UVH_NMI_MMR_CLEAR                       (UVH_NMI_MMR + 8)
+#define UV_NMI_PENDING_MASK                     (1UL << 63)
+DEFINE_PER_CPU(unsigned long, cpu_last_nmi_count);
 
 DEFINE_PER_CPU(int, x2apic_extra_bits);
 
@@ -642,18 +649,46 @@ void __cpuinit uv_cpu_init(void)
  */
 int uv_handle_nmi(struct notifier_block *self, unsigned long reason, void *data)
 {
+        unsigned long real_uv_nmi;
+        int bid;
+
         if (reason != DIE_NMIUNKNOWN)
                 return NOTIFY_OK;
 
         if (in_crash_kexec)
                 /* do nothing if entering the crash kernel */
                 return NOTIFY_OK;
+
         /*
-         * Use a lock so only one cpu prints at a time
-         * to prevent intermixed output.
+         * Each blade has an MMR that indicates when an NMI has been sent
+         * to cpus on the blade. If an NMI is detected, atomically
+         * clear the MMR and update a per-blade NMI count used to
+         * cause each cpu on the blade to notice a new NMI.
+         */
+        bid = uv_numa_blade_id();
+        real_uv_nmi = (uv_read_local_mmr(UVH_NMI_MMR) & UV_NMI_PENDING_MASK);
+
+        if (unlikely(real_uv_nmi)) {
+                spin_lock(&uv_blade_info[bid].nmi_lock);
+                real_uv_nmi = (uv_read_local_mmr(UVH_NMI_MMR) & UV_NMI_PENDING_MASK);
+                if (real_uv_nmi) {
+                        uv_blade_info[bid].nmi_count++;
+                        uv_write_local_mmr(UVH_NMI_MMR_CLEAR, UV_NMI_PENDING_MASK);
+                }
+                spin_unlock(&uv_blade_info[bid].nmi_lock);
+        }
+
+        if (likely(__get_cpu_var(cpu_last_nmi_count) == uv_blade_info[bid].nmi_count))
+                return NOTIFY_DONE;
+
+        __get_cpu_var(cpu_last_nmi_count) = uv_blade_info[bid].nmi_count;
+
+        /*
+         * Use a lock so only one cpu prints at a time.
+         * This prevents intermixed output.
          */
         spin_lock(&uv_nmi_lock);
-        pr_info("NMI stack dump cpu %u:\n", smp_processor_id());
+        pr_info("UV NMI stack dump cpu %u:\n", smp_processor_id());
         dump_stack();
         spin_unlock(&uv_nmi_lock);
 
@@ -661,7 +696,8 @@ int uv_handle_nmi(struct notifier_block *self, unsigned long reason, void *data)
 }
 
 static struct notifier_block uv_dump_stack_nmi_nb = {
-        .notifier_call  = uv_handle_nmi
+        .notifier_call  = uv_handle_nmi,
+        .priority = NMI_LOCAL_LOW_PRIOR - 1,
 };
 
 void uv_register_nmi_notifier(void)
@@ -720,8 +756,9 @@ void __init uv_system_init(void)
         printk(KERN_DEBUG "UV: Found %d blades\n", uv_num_possible_blades());
 
         bytes = sizeof(struct uv_blade_info) * uv_num_possible_blades();
-        uv_blade_info = kmalloc(bytes, GFP_KERNEL);
+        uv_blade_info = kzalloc(bytes, GFP_KERNEL);
         BUG_ON(!uv_blade_info);
+
         for (blade = 0; blade < uv_num_possible_blades(); blade++)
                 uv_blade_info[blade].memory_nid = -1;
 
@@ -747,6 +784,7 @@ void __init uv_system_init(void)
                         uv_blade_info[blade].pnode = pnode;
                         uv_blade_info[blade].nr_possible_cpus = 0;
                         uv_blade_info[blade].nr_online_cpus = 0;
+                        spin_lock_init(&uv_blade_info[blade].nmi_lock);
                         max_pnode = max(pnode, max_pnode);
                         blade++;
                 }
diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c
index adee12e0da1f..3bfa02235965 100644
--- a/arch/x86/kernel/apm_32.c
+++ b/arch/x86/kernel/apm_32.c
@@ -1238,7 +1238,6 @@ static int suspend(int vetoable)
         dpm_suspend_noirq(PMSG_SUSPEND);
 
         local_irq_disable();
-        sysdev_suspend(PMSG_SUSPEND);
         syscore_suspend();
 
         local_irq_enable();
@@ -1258,7 +1257,6 @@ static int suspend(int vetoable)
         err = (err == APM_SUCCESS) ? 0 : -EIO;
 
         syscore_resume();
-        sysdev_resume();
         local_irq_enable();
 
         dpm_resume_noirq(PMSG_RESUME);
@@ -1282,7 +1280,6 @@ static void standby(void)
         dpm_suspend_noirq(PMSG_SUSPEND);
 
         local_irq_disable();
-        sysdev_suspend(PMSG_SUSPEND);
         syscore_suspend();
         local_irq_enable();
 
@@ -1292,7 +1289,6 @@ static void standby(void)
 
         local_irq_disable();
         syscore_resume();
-        sysdev_resume();
         local_irq_enable();
 
         dpm_resume_noirq(PMSG_RESUME);
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 3f0ebe429a01..6042981d0309 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -30,7 +30,6 @@ obj-$(CONFIG_PERF_EVENTS)		+= perf_event.o
 
 obj-$(CONFIG_X86_MCE)                   += mcheck/
 obj-$(CONFIG_MTRR)                      += mtrr/
-obj-$(CONFIG_CPU_FREQ)                  += cpufreq/
 
 obj-$(CONFIG_X86_LOCAL_APIC)            += perfctr-watchdog.o
 
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index bb9eb29a52dd..6f9d1f6063e9 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -613,7 +613,7 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
 #endif
 
         /* As a rule processors have APIC timer running in deep C states */
-        if (c->x86 >= 0xf && !cpu_has_amd_erratum(amd_erratum_400))
+        if (c->x86 > 0xf && !cpu_has_amd_erratum(amd_erratum_400))
                 set_cpu_cap(c, X86_FEATURE_ARAT);
 
         /*
@@ -698,7 +698,7 @@ cpu_dev_register(amd_cpu_dev);
  */
 
 const int amd_erratum_400[] =
-        AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0x0f, 0x4, 0x2, 0xff, 0xf),
+        AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf),
                             AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf));
 EXPORT_SYMBOL_GPL(amd_erratum_400);
 
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index e2ced0074a45..173f3a3fa1a6 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -565,8 +565,7 @@ void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c)
 
                 cpuid_count(0x00000007, 0, &eax, &ebx, &ecx, &edx);
 
-                if (eax > 0)
-                        c->x86_capability[9] = ebx;
+                c->x86_capability[9] = ebx;
         }
 
         /* AMD-defined flags: level 0x80000001 */
diff --git a/arch/x86/kernel/cpu/cpufreq/Kconfig b/arch/x86/kernel/cpu/cpufreq/Kconfig
deleted file mode 100644
index 870e6cc6ad28..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/Kconfig
+++ /dev/null
@@ -1,266 +0,0 @@
-#
-# CPU Frequency scaling
-#
-
-menu "CPU Frequency scaling"
-
-source "drivers/cpufreq/Kconfig"
-
-if CPU_FREQ
-
-comment "CPUFreq processor drivers"
-
-config X86_PCC_CPUFREQ
-        tristate "Processor Clocking Control interface driver"
-        depends on ACPI && ACPI_PROCESSOR
-        help
-          This driver adds support for the PCC interface.
-
-          For details, take a look at:
-          <file:Documentation/cpu-freq/pcc-cpufreq.txt>.
-
-          To compile this driver as a module, choose M here: the
-          module will be called pcc-cpufreq.
-
-          If in doubt, say N.
-
-config X86_ACPI_CPUFREQ
-        tristate "ACPI Processor P-States driver"
-        select CPU_FREQ_TABLE
-        depends on ACPI_PROCESSOR
-        help
-          This driver adds a CPUFreq driver which utilizes the ACPI
-          Processor Performance States.
-          This driver also supports Intel Enhanced Speedstep.
-
-          To compile this driver as a module, choose M here: the
-          module will be called acpi-cpufreq.
-
-          For details, take a look at <file:Documentation/cpu-freq/>.
-
-          If in doubt, say N.
-
-config ELAN_CPUFREQ
-        tristate "AMD Elan SC400 and SC410"
-        select CPU_FREQ_TABLE
-        depends on X86_ELAN
-        ---help---
-          This adds the CPUFreq driver for AMD Elan SC400 and SC410
-          processors.
-
-          You need to specify the processor maximum speed as boot
-          parameter: elanfreq=maxspeed (in kHz) or as module
-          parameter "max_freq".
-
-          For details, take a look at <file:Documentation/cpu-freq/>.
-
-          If in doubt, say N.
-
-config SC520_CPUFREQ
-        tristate "AMD Elan SC520"
-        select CPU_FREQ_TABLE
-        depends on X86_ELAN
-        ---help---
-          This adds the CPUFreq driver for AMD Elan SC520 processor.
-
-          For details, take a look at <file:Documentation/cpu-freq/>.
-
-          If in doubt, say N.
-
-
-config X86_POWERNOW_K6
-        tristate "AMD Mobile K6-2/K6-3 PowerNow!"
-        select CPU_FREQ_TABLE
-        depends on X86_32
-        help
-          This adds the CPUFreq driver for mobile AMD K6-2+ and mobile
-          AMD K6-3+ processors.
-
-          For details, take a look at <file:Documentation/cpu-freq/>.
-
-          If in doubt, say N.
-
-config X86_POWERNOW_K7
-        tristate "AMD Mobile Athlon/Duron PowerNow!"
-        select CPU_FREQ_TABLE
-        depends on X86_32
-        help
-          This adds the CPUFreq driver for mobile AMD K7 mobile processors.
-
-          For details, take a look at <file:Documentation/cpu-freq/>.
-
-          If in doubt, say N.
-
-config X86_POWERNOW_K7_ACPI
-        bool
-        depends on X86_POWERNOW_K7 && ACPI_PROCESSOR
-        depends on !(X86_POWERNOW_K7 = y && ACPI_PROCESSOR = m)
-        depends on X86_32
-        default y
-
-config X86_POWERNOW_K8
-        tristate "AMD Opteron/Athlon64 PowerNow!"
-        select CPU_FREQ_TABLE
-        depends on ACPI && ACPI_PROCESSOR
-        help
-          This adds the CPUFreq driver for K8/K10 Opteron/Athlon64 processors.
-
-          To compile this driver as a module, choose M here: the
-          module will be called powernow-k8.
-
-          For details, take a look at <file:Documentation/cpu-freq/>.
-
-config X86_GX_SUSPMOD
-        tristate "Cyrix MediaGX/NatSemi Geode Suspend Modulation"
-        depends on X86_32 && PCI
-        help
-         This add the CPUFreq driver for NatSemi Geode processors which
-         support suspend modulation.
-
-         For details, take a look at <file:Documentation/cpu-freq/>.
-
-         If in doubt, say N.
-
-config X86_SPEEDSTEP_CENTRINO
-        tristate "Intel Enhanced SpeedStep (deprecated)"
-        select CPU_FREQ_TABLE
-        select X86_SPEEDSTEP_CENTRINO_TABLE if X86_32
-        depends on X86_32 || (X86_64 && ACPI_PROCESSOR)
-        help
-          This is deprecated and this functionality is now merged into
-          acpi_cpufreq (X86_ACPI_CPUFREQ). Use that driver instead of
-          speedstep_centrino.
-          This adds the CPUFreq driver for Enhanced SpeedStep enabled
-          mobile CPUs.  This means Intel Pentium M (Centrino) CPUs
-          or 64bit enabled Intel Xeons.
-
-          To compile this driver as a module, choose M here: the
-          module will be called speedstep-centrino.
-
-          For details, take a look at <file:Documentation/cpu-freq/>.
-
-          If in doubt, say N.
-
-config X86_SPEEDSTEP_CENTRINO_TABLE
-        bool "Built-in tables for Banias CPUs"
-        depends on X86_32 && X86_SPEEDSTEP_CENTRINO
-        default y
-        help
-          Use built-in tables for Banias CPUs if ACPI encoding
-          is not available.
-
-          If in doubt, say N.
-
-config X86_SPEEDSTEP_ICH
-        tristate "Intel Speedstep on ICH-M chipsets (ioport interface)"
-        select CPU_FREQ_TABLE
-        depends on X86_32
-        help
-          This adds the CPUFreq driver for certain mobile Intel Pentium III
-          (Coppermine), all mobile Intel Pentium III-M (Tualatin) and all
-          mobile Intel Pentium 4 P4-M on systems which have an Intel ICH2,
-          ICH3 or ICH4 southbridge.
-
-          For details, take a look at <file:Documentation/cpu-freq/>.
-
-          If in doubt, say N.
-
-config X86_SPEEDSTEP_SMI
-        tristate "Intel SpeedStep on 440BX/ZX/MX chipsets (SMI interface)"
-        select CPU_FREQ_TABLE
-        depends on X86_32 && EXPERIMENTAL
-        help
-          This adds the CPUFreq driver for certain mobile Intel Pentium III
-          (Coppermine), all mobile Intel Pentium III-M (Tualatin)
-          on systems which have an Intel 440BX/ZX/MX southbridge.
-
-          For details, take a look at <file:Documentation/cpu-freq/>.
-
-          If in doubt, say N.
-
-config X86_P4_CLOCKMOD
-        tristate "Intel Pentium 4 clock modulation"
-        select CPU_FREQ_TABLE
-        help
-          This adds the CPUFreq driver for Intel Pentium 4 / XEON
-          processors.  When enabled it will lower CPU temperature by skipping
-          clocks.
-
-          This driver should be only used in exceptional
-          circumstances when very low power is needed because it causes severe
-          slowdowns and noticeable latencies.  Normally Speedstep should be used
-          instead.
-
-          To compile this driver as a module, choose M here: the
-          module will be called p4-clockmod.
-
-          For details, take a look at <file:Documentation/cpu-freq/>.
-
-          Unless you are absolutely sure say N.
-
-config X86_CPUFREQ_NFORCE2
-        tristate "nVidia nForce2 FSB changing"
-        depends on X86_32 && EXPERIMENTAL
-        help
-          This adds the CPUFreq driver for FSB changing on nVidia nForce2
-          platforms.
-
-          For details, take a look at <file:Documentation/cpu-freq/>.
-
-          If in doubt, say N.
-
-config X86_LONGRUN
-        tristate "Transmeta LongRun"
-        depends on X86_32
-        help
-          This adds the CPUFreq driver for Transmeta Crusoe and Efficeon processors
-          which support LongRun.
-
-          For details, take a look at <file:Documentation/cpu-freq/>.
-
-          If in doubt, say N.
-
-config X86_LONGHAUL
-        tristate "VIA Cyrix III Longhaul"
-        select CPU_FREQ_TABLE
-        depends on X86_32 && ACPI_PROCESSOR
-        help
-          This adds the CPUFreq driver for VIA Samuel/CyrixIII,
-          VIA Cyrix Samuel/C3, VIA Cyrix Ezra and VIA Cyrix Ezra-T
-          processors.
-
-          For details, take a look at <file:Documentation/cpu-freq/>.
-
-          If in doubt, say N.
-
-config X86_E_POWERSAVER
-        tristate "VIA C7 Enhanced PowerSaver (DANGEROUS)"
-        select CPU_FREQ_TABLE
-        depends on X86_32 && EXPERIMENTAL
-        help
-          This adds the CPUFreq driver for VIA C7 processors.  However, this driver
-          does not have any safeguards to prevent operating the CPU out of spec
-          and is thus considered dangerous.  Please use the regular ACPI cpufreq
-          driver, enabled by CONFIG_X86_ACPI_CPUFREQ.
-
-          If in doubt, say N.
-
-comment "shared options"
-
-config X86_SPEEDSTEP_LIB
-        tristate
-        default (X86_SPEEDSTEP_ICH || X86_SPEEDSTEP_SMI || X86_P4_CLOCKMOD)
-
-config X86_SPEEDSTEP_RELAXED_CAP_CHECK
-        bool "Relaxed speedstep capability checks"
-        depends on X86_32 && (X86_SPEEDSTEP_SMI || X86_SPEEDSTEP_ICH)
-        help
-          Don't perform all checks for a speedstep capable system which would
-          normally be done. Some ancient or strange systems, though speedstep
-          capable, don't always indicate that they are speedstep capable. This
-          option lets the probing code bypass some of those checks if the
-          parameter "relaxed_check=1" is passed to the module.
-
-endif   # CPU_FREQ
-
-endmenu
diff --git a/arch/x86/kernel/cpu/cpufreq/Makefile b/arch/x86/kernel/cpu/cpufreq/Makefile
deleted file mode 100644
index bd54bf67e6fb..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/Makefile
+++ /dev/null
@@ -1,21 +0,0 @@
-# Link order matters. K8 is preferred to ACPI because of firmware bugs in early
-# K8 systems. ACPI is preferred to all other hardware-specific drivers.
-# speedstep-* is preferred over p4-clockmod.
-
-obj-$(CONFIG_X86_POWERNOW_K8)           += powernow-k8.o mperf.o
-obj-$(CONFIG_X86_ACPI_CPUFREQ)          += acpi-cpufreq.o mperf.o
-obj-$(CONFIG_X86_PCC_CPUFREQ)           += pcc-cpufreq.o
-obj-$(CONFIG_X86_POWERNOW_K6)           += powernow-k6.o
-obj-$(CONFIG_X86_POWERNOW_K7)           += powernow-k7.o
-obj-$(CONFIG_X86_LONGHAUL)              += longhaul.o
-obj-$(CONFIG_X86_E_POWERSAVER)          += e_powersaver.o
-obj-$(CONFIG_ELAN_CPUFREQ)              += elanfreq.o
-obj-$(CONFIG_SC520_CPUFREQ)             += sc520_freq.o
-obj-$(CONFIG_X86_LONGRUN)               += longrun.o  
-obj-$(CONFIG_X86_GX_SUSPMOD)            += gx-suspmod.o
-obj-$(CONFIG_X86_SPEEDSTEP_ICH)         += speedstep-ich.o
-obj-$(CONFIG_X86_SPEEDSTEP_LIB)         += speedstep-lib.o
-obj-$(CONFIG_X86_SPEEDSTEP_SMI)         += speedstep-smi.o
-obj-$(CONFIG_X86_SPEEDSTEP_CENTRINO)    += speedstep-centrino.o
-obj-$(CONFIG_X86_P4_CLOCKMOD)           += p4-clockmod.o
-obj-$(CONFIG_X86_CPUFREQ_NFORCE2)       += cpufreq-nforce2.o
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
deleted file mode 100644
index a2baafb2fe6d..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ /dev/null
@@ -1,776 +0,0 @@
-/*
- * acpi-cpufreq.c - ACPI Processor P-States Driver
- *
- *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
- *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
- *  Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
- *  Copyright (C) 2006       Denis Sadykov <denis.m.sadykov@intel.com>
- *
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or (at
- *  your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful, but
- *  WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- *  General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
- *
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <linux/sched.h>
-#include <linux/cpufreq.h>
-#include <linux/compiler.h>
-#include <linux/dmi.h>
-#include <linux/slab.h>
-
-#include <linux/acpi.h>
-#include <linux/io.h>
-#include <linux/delay.h>
-#include <linux/uaccess.h>
-
-#include <acpi/processor.h>
-
-#include <asm/msr.h>
-#include <asm/processor.h>
-#include <asm/cpufeature.h>
-#include "mperf.h"
-
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
-                "acpi-cpufreq", msg)
-
-MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
-MODULE_DESCRIPTION("ACPI Processor P-States Driver");
-MODULE_LICENSE("GPL");
-
-enum {
-        UNDEFINED_CAPABLE = 0,
-        SYSTEM_INTEL_MSR_CAPABLE,
-        SYSTEM_IO_CAPABLE,
-};
-
-#define INTEL_MSR_RANGE         (0xffff)
-
-struct acpi_cpufreq_data {
-        struct acpi_processor_performance *acpi_data;
-        struct cpufreq_frequency_table *freq_table;
-        unsigned int resume;
-        unsigned int cpu_feature;
-};
-
-static DEFINE_PER_CPU(struct acpi_cpufreq_data *, acfreq_data);
-
-/* acpi_perf_data is a pointer to percpu data. */
-static struct acpi_processor_performance __percpu *acpi_perf_data;
-
-static struct cpufreq_driver acpi_cpufreq_driver;
-
-static unsigned int acpi_pstate_strict;
-
-static int check_est_cpu(unsigned int cpuid)
-{
-        struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
-
-        return cpu_has(cpu, X86_FEATURE_EST);
-}
-
-static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
-{
-        struct acpi_processor_performance *perf;
-        int i;
-
-        perf = data->acpi_data;
-
-        for (i = 0; i < perf->state_count; i++) {
-                if (value == perf->states[i].status)
-                        return data->freq_table[i].frequency;
-        }
-        return 0;
-}
-
-static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
-{
-        int i;
-        struct acpi_processor_performance *perf;
-
-        msr &= INTEL_MSR_RANGE;
-        perf = data->acpi_data;
-
-        for (i = 0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
-                if (msr == perf->states[data->freq_table[i].index].status)
-                        return data->freq_table[i].frequency;
-        }
-        return data->freq_table[0].frequency;
-}
-
-static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data)
-{
-        switch (data->cpu_feature) {
-        case SYSTEM_INTEL_MSR_CAPABLE:
-                return extract_msr(val, data);
-        case SYSTEM_IO_CAPABLE:
-                return extract_io(val, data);
-        default:
-                return 0;
-        }
-}
-
-struct msr_addr {
-        u32 reg;
-};
-
-struct io_addr {
-        u16 port;
-        u8 bit_width;
-};
-
-struct drv_cmd {
-        unsigned int type;
-        const struct cpumask *mask;
-        union {
-                struct msr_addr msr;
-                struct io_addr io;
-        } addr;
-        u32 val;
-};
-
-/* Called via smp_call_function_single(), on the target CPU */
-static void do_drv_read(void *_cmd)
-{
-        struct drv_cmd *cmd = _cmd;
-        u32 h;
-
-        switch (cmd->type) {
-        case SYSTEM_INTEL_MSR_CAPABLE:
-                rdmsr(cmd->addr.msr.reg, cmd->val, h);
-                break;
-        case SYSTEM_IO_CAPABLE:
-                acpi_os_read_port((acpi_io_address)cmd->addr.io.port,
-                                &cmd->val,
-                                (u32)cmd->addr.io.bit_width);
-                break;
-        default:
-                break;
-        }
-}
-
-/* Called via smp_call_function_many(), on the target CPUs */
-static void do_drv_write(void *_cmd)
-{
-        struct drv_cmd *cmd = _cmd;
-        u32 lo, hi;
-
-        switch (cmd->type) {
-        case SYSTEM_INTEL_MSR_CAPABLE:
-                rdmsr(cmd->addr.msr.reg, lo, hi);
-                lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE);
-                wrmsr(cmd->addr.msr.reg, lo, hi);
-                break;
-        case SYSTEM_IO_CAPABLE:
-                acpi_os_write_port((acpi_io_address)cmd->addr.io.port,
-                                cmd->val,
-                                (u32)cmd->addr.io.bit_width);
-                break;
-        default:
-                break;
-        }
-}
-
-static void drv_read(struct drv_cmd *cmd)
-{
-        int err;
-        cmd->val = 0;
-
-        err = smp_call_function_any(cmd->mask, do_drv_read, cmd, 1);
-        WARN_ON_ONCE(err);      /* smp_call_function_any() was buggy? */
-}
-
-static void drv_write(struct drv_cmd *cmd)
-{
-        int this_cpu;
-
-        this_cpu = get_cpu();
-        if (cpumask_test_cpu(this_cpu, cmd->mask))
-                do_drv_write(cmd);
-        smp_call_function_many(cmd->mask, do_drv_write, cmd, 1);
-        put_cpu();
-}
-
-static u32 get_cur_val(const struct cpumask *mask)
-{
-        struct acpi_processor_performance *perf;
-        struct drv_cmd cmd;
-
-        if (unlikely(cpumask_empty(mask)))
-                return 0;
-
-        switch (per_cpu(acfreq_data, cpumask_first(mask))->cpu_feature) {
-        case SYSTEM_INTEL_MSR_CAPABLE:
-                cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
-                cmd.addr.msr.reg = MSR_IA32_PERF_STATUS;
-                break;
-        case SYSTEM_IO_CAPABLE:
-                cmd.type = SYSTEM_IO_CAPABLE;
-                perf = per_cpu(acfreq_data, cpumask_first(mask))->acpi_data;
-                cmd.addr.io.port = perf->control_register.address;
-                cmd.addr.io.bit_width = perf->control_register.bit_width;
-                break;
-        default:
-                return 0;
-        }
-
-        cmd.mask = mask;
-        drv_read(&cmd);
-
-        dprintk("get_cur_val = %u\n", cmd.val);
-
-        return cmd.val;
-}
-
-static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
-{
-        struct acpi_cpufreq_data *data = per_cpu(acfreq_data, cpu);
-        unsigned int freq;
-        unsigned int cached_freq;
-
-        dprintk("get_cur_freq_on_cpu (%d)\n", cpu);
-
-        if (unlikely(data == NULL ||
-                     data->acpi_data == NULL || data->freq_table == NULL)) {
-                return 0;
-        }
-
-        cached_freq = data->freq_table[data->acpi_data->state].frequency;
-        freq = extract_freq(get_cur_val(cpumask_of(cpu)), data);
-        if (freq != cached_freq) {
-                /*
-                 * The dreaded BIOS frequency change behind our back.
-                 * Force set the frequency on next target call.
-                 */
-                data->resume = 1;
-        }
-
-        dprintk("cur freq = %u\n", freq);
-
-        return freq;
-}
-
-static unsigned int check_freqs(const struct cpumask *mask, unsigned int freq,
-                                struct acpi_cpufreq_data *data)
-{
-        unsigned int cur_freq;
-        unsigned int i;
-
-        for (i = 0; i < 100; i++) {
-                cur_freq = extract_freq(get_cur_val(mask), data);
-                if (cur_freq == freq)
-                        return 1;
-                udelay(10);
-        }
-        return 0;
-}
-
-static int acpi_cpufreq_target(struct cpufreq_policy *policy,
-                               unsigned int target_freq, unsigned int relation)
-{
-        struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
-        struct acpi_processor_performance *perf;
-        struct cpufreq_freqs freqs;
-        struct drv_cmd cmd;
-        unsigned int next_state = 0; /* Index into freq_table */
-        unsigned int next_perf_state = 0; /* Index into perf table */
-        unsigned int i;
-        int result = 0;
-
-        dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu);
-
-        if (unlikely(data == NULL ||
-             data->acpi_data == NULL || data->freq_table == NULL)) {
-                return -ENODEV;
-        }
-
-        perf = data->acpi_data;
-        result = cpufreq_frequency_table_target(policy,
-                                                data->freq_table,
-                                                target_freq,
-                                                relation, &next_state);
-        if (unlikely(result)) {
-                result = -ENODEV;
-                goto out;
-        }
-
-        next_perf_state = data->freq_table[next_state].index;
-        if (perf->state == next_perf_state) {
-                if (unlikely(data->resume)) {
-                        dprintk("Called after resume, resetting to P%d\n",
-                                next_perf_state);
-                        data->resume = 0;
-                } else {
-                        dprintk("Already at target state (P%d)\n",
-                                next_perf_state);
-                        goto out;
-                }
-        }
-
-        switch (data->cpu_feature) {
-        case SYSTEM_INTEL_MSR_CAPABLE:
-                cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
-                cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
-                cmd.val = (u32) perf->states[next_perf_state].control;
-                break;
-        case SYSTEM_IO_CAPABLE:
-                cmd.type = SYSTEM_IO_CAPABLE;
-                cmd.addr.io.port = perf->control_register.address;
-                cmd.addr.io.bit_width = perf->control_register.bit_width;
-                cmd.val = (u32) perf->states[next_perf_state].control;
-                break;
-        default:
-                result = -ENODEV;
-                goto out;
-        }
-
-        /* cpufreq holds the hotplug lock, so we are safe from here on */
-        if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY)
-                cmd.mask = policy->cpus;
-        else
-                cmd.mask = cpumask_of(policy->cpu);
-
-        freqs.old = perf->states[perf->state].core_frequency * 1000;
-        freqs.new = data->freq_table[next_state].frequency;
-        for_each_cpu(i, policy->cpus) {
-                freqs.cpu = i;
-                cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-        }
-
-        drv_write(&cmd);
-
-        if (acpi_pstate_strict) {
-                if (!check_freqs(cmd.mask, freqs.new, data)) {
-                        dprintk("acpi_cpufreq_target failed (%d)\n",
-                                policy->cpu);
-                        result = -EAGAIN;
-                        goto out;
-                }
-        }
-
-        for_each_cpu(i, policy->cpus) {
-                freqs.cpu = i;
-                cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-        }
-        perf->state = next_perf_state;
-
-out:
-        return result;
-}
-
-static int acpi_cpufreq_verify(struct cpufreq_policy *policy)
-{
-        struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
-
-        dprintk("acpi_cpufreq_verify\n");
-
-        return cpufreq_frequency_table_verify(policy, data->freq_table);
-}
-
-static unsigned long
-acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
-{
-        struct acpi_processor_performance *perf = data->acpi_data;
-
-        if (cpu_khz) {
-                /* search the closest match to cpu_khz */
-                unsigned int i;
-                unsigned long freq;
-                unsigned long freqn = perf->states[0].core_frequency * 1000;
-
-                for (i = 0; i < (perf->state_count-1); i++) {
-                        freq = freqn;
-                        freqn = perf->states[i+1].core_frequency * 1000;
-                        if ((2 * cpu_khz) > (freqn + freq)) {
-                                perf->state = i;
-                                return freq;
-                        }
-                }
-                perf->state = perf->state_count-1;
-                return freqn;
-        } else {
-                /* assume CPU is at P0... */
-                perf->state = 0;
-                return perf->states[0].core_frequency * 1000;
-        }
-}
-
-static void free_acpi_perf_data(void)
-{
-        unsigned int i;
-
-        /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
-        for_each_possible_cpu(i)
-                free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
-                                 ->shared_cpu_map);
-        free_percpu(acpi_perf_data);
-}
-
-/*
- * acpi_cpufreq_early_init - initialize ACPI P-States library
- *
- * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
- * in order to determine correct frequency and voltage pairings. We can
- * do _PDC and _PSD and find out the processor dependency for the
- * actual init that will happen later...
- */
-static int __init acpi_cpufreq_early_init(void)
-{
-        unsigned int i;
-        dprintk("acpi_cpufreq_early_init\n");
-
-        acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
-        if (!acpi_perf_data) {
-                dprintk("Memory allocation error for acpi_perf_data.\n");
-                return -ENOMEM;
-        }
-        for_each_possible_cpu(i) {
-                if (!zalloc_cpumask_var_node(
-                        &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
-                        GFP_KERNEL, cpu_to_node(i))) {
-
-                        /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
-                        free_acpi_perf_data();
-                        return -ENOMEM;
-                }
-        }
-
-        /* Do initialization in ACPI core */
-        acpi_processor_preregister_performance(acpi_perf_data);
-        return 0;
-}
-
-#ifdef CONFIG_SMP
-/*
- * Some BIOSes do SW_ANY coordination internally, either set it up in hw
- * or do it in BIOS firmware and won't inform about it to OS. If not
- * detected, this has a side effect of making CPU run at a different speed
- * than OS intended it to run at. Detect it and handle it cleanly.
- */
-static int bios_with_sw_any_bug;
-
-static int sw_any_bug_found(const struct dmi_system_id *d)
-{
-        bios_with_sw_any_bug = 1;
-        return 0;
-}
-
-static const struct dmi_system_id sw_any_bug_dmi_table[] = {
-        {
-                .callback = sw_any_bug_found,
-                .ident = "Supermicro Server X6DLP",
-                .matches = {
-                        DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
-                        DMI_MATCH(DMI_BIOS_VERSION, "080010"),
-                        DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
-                },
-        },
-        { }
-};
-
-static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
-{
-        /* Intel Xeon Processor 7100 Series Specification Update
-         * http://www.intel.com/Assets/PDF/specupdate/314554.pdf
-         * AL30: A Machine Check Exception (MCE) Occurring during an
-         * Enhanced Intel SpeedStep Technology Ratio Change May Cause
-         * Both Processor Cores to Lock Up. */
-        if (c->x86_vendor == X86_VENDOR_INTEL) {
-                if ((c->x86 == 15) &&
-                    (c->x86_model == 6) &&
-                    (c->x86_mask == 8)) {
-                        printk(KERN_INFO "acpi-cpufreq: Intel(R) "
-                            "Xeon(R) 7100 Errata AL30, processors may "
-                            "lock up on frequency changes: disabling "
-                            "acpi-cpufreq.\n");
-                        return -ENODEV;
-                    }
-                }
-        return 0;
-}
-#endif
-
-static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
-{
-        unsigned int i;
-        unsigned int valid_states = 0;
-        unsigned int cpu = policy->cpu;
-        struct acpi_cpufreq_data *data;
-        unsigned int result = 0;
-        struct cpuinfo_x86 *c = &cpu_data(policy->cpu);
-        struct acpi_processor_performance *perf;
-#ifdef CONFIG_SMP
-        static int blacklisted;
-#endif
-
-        dprintk("acpi_cpufreq_cpu_init\n");
-
-#ifdef CONFIG_SMP
-        if (blacklisted)
-                return blacklisted;
-        blacklisted = acpi_cpufreq_blacklist(c);
-        if (blacklisted)
-                return blacklisted;
-#endif
-
-        data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL);
-        if (!data)
-                return -ENOMEM;
-
-        data->acpi_data = per_cpu_ptr(acpi_perf_data, cpu);
-        per_cpu(acfreq_data, cpu) = data;
-
-        if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
-                acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
-
-        result = acpi_processor_register_performance(data->acpi_data, cpu);
-        if (result)
-                goto err_free;
-
-        perf = data->acpi_data;
-        policy->shared_type = perf->shared_type;
-
-        /*
-         * Will let policy->cpus know about dependency only when software
-         * coordination is required.
-         */
-        if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
-            policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
-                cpumask_copy(policy->cpus, perf->shared_cpu_map);
-        }
-        cpumask_copy(policy->related_cpus, perf->shared_cpu_map);
-
-#ifdef CONFIG_SMP
-        dmi_check_system(sw_any_bug_dmi_table);
-        if (bios_with_sw_any_bug && cpumask_weight(policy->cpus) == 1) {
-                policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
-                cpumask_copy(policy->cpus, cpu_core_mask(cpu));
-        }
-#endif
-
-        /* capability check */
-        if (perf->state_count <= 1) {
-                dprintk("No P-States\n");
-                result = -ENODEV;
-                goto err_unreg;
-        }
-
-        if (perf->control_register.space_id != perf->status_register.space_id) {
-                result = -ENODEV;
-                goto err_unreg;
-        }
-
-        switch (perf->control_register.space_id) {
-        case ACPI_ADR_SPACE_SYSTEM_IO:
-                dprintk("SYSTEM IO addr space\n");
-                data->cpu_feature = SYSTEM_IO_CAPABLE;
-                break;
-        case ACPI_ADR_SPACE_FIXED_HARDWARE:
-                dprintk("HARDWARE addr space\n");
-                if (!check_est_cpu(cpu)) {
-                        result = -ENODEV;
-                        goto err_unreg;
-                }
-                data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
-                break;
-        default:
-                dprintk("Unknown addr space %d\n",
-                        (u32) (perf->control_register.space_id));
-                result = -ENODEV;
-                goto err_unreg;
-        }
-
-        data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) *
-                    (perf->state_count+1), GFP_KERNEL);
-        if (!data->freq_table) {
-                result = -ENOMEM;
-                goto err_unreg;
-        }
-
-        /* detect transition latency */
-        policy->cpuinfo.transition_latency = 0;
-        for (i = 0; i < perf->state_count; i++) {
-                if ((perf->states[i].transition_latency * 1000) >
-                    policy->cpuinfo.transition_latency)
-                        policy->cpuinfo.transition_latency =
-                            perf->states[i].transition_latency * 1000;
-        }
-
-        /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
-        if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
-            policy->cpuinfo.transition_latency > 20 * 1000) {
-                policy->cpuinfo.transition_latency = 20 * 1000;
-                printk_once(KERN_INFO
-                            "P-state transition latency capped at 20 uS\n");
-        }
-
-        /* table init */
-        for (i = 0; i < perf->state_count; i++) {
-                if (i > 0 && perf->states[i].core_frequency >=
-                    data->freq_table[valid_states-1].frequency / 1000)
-                        continue;
-
-                data->freq_table[valid_states].index = i;
-                data->freq_table[valid_states].frequency =
-                    perf->states[i].core_frequency * 1000;
-                valid_states++;
-        }
-        data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
-        perf->state = 0;
-
-        result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table);
-        if (result)
-                goto err_freqfree;
-
-        if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq)
-                printk(KERN_WARNING FW_WARN "P-state 0 is not max freq\n");
-
-        switch (perf->control_register.space_id) {
-        case ACPI_ADR_SPACE_SYSTEM_IO:
-                /* Current speed is unknown and not detectable by IO port */
-                policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
-                break;
-        case ACPI_ADR_SPACE_FIXED_HARDWARE:
-                acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
-                policy->cur = get_cur_freq_on_cpu(cpu);
-                break;
-        default:
-                break;
-        }
-
-        /* notify BIOS that we exist */
-        acpi_processor_notify_smm(THIS_MODULE);
-
-        /* Check for APERF/MPERF support in hardware */
-        if (cpu_has(c, X86_FEATURE_APERFMPERF))
-                acpi_cpufreq_driver.getavg = cpufreq_get_measured_perf;
-
-        dprintk("CPU%u - ACPI performance management activated.\n", cpu);
-        for (i = 0; i < perf->state_count; i++)
-                dprintk("     %cP%d: %d MHz, %d mW, %d uS\n",
-                        (i == perf->state ? '*' : ' '), i,
-                        (u32) perf->states[i].core_frequency,
-                        (u32) perf->states[i].power,
-                        (u32) perf->states[i].transition_latency);
-
-        cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu);
-
-        /*
-         * the first call to ->target() should result in us actually
-         * writing something to the appropriate registers.
-         */
-        data->resume = 1;
-
-        return result;
-
-err_freqfree:
-        kfree(data->freq_table);
-err_unreg:
-        acpi_processor_unregister_performance(perf, cpu);
-err_free:
-        kfree(data);
-        per_cpu(acfreq_data, cpu) = NULL;
-
-        return result;
-}
-
-static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
-{
-        struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
-
-        dprintk("acpi_cpufreq_cpu_exit\n");
-
-        if (data) {
-                cpufreq_frequency_table_put_attr(policy->cpu);
-                per_cpu(acfreq_data, policy->cpu) = NULL;
-                acpi_processor_unregister_performance(data->acpi_data,
-                                                      policy->cpu);
-                kfree(data->freq_table);
-                kfree(data);
-        }
-
-        return 0;
-}
-
-static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
-{
-        struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
-
-        dprintk("acpi_cpufreq_resume\n");
-
-        data->resume = 1;
-
-        return 0;
-}
-
-static struct freq_attr *acpi_cpufreq_attr[] = {
-        &cpufreq_freq_attr_scaling_available_freqs,
-        NULL,
-};
-
-static struct cpufreq_driver acpi_cpufreq_driver = {
-        .verify         = acpi_cpufreq_verify,
-        .target         = acpi_cpufreq_target,
-        .bios_limit     = acpi_processor_get_bios_limit,
-        .init           = acpi_cpufreq_cpu_init,
-        .exit           = acpi_cpufreq_cpu_exit,
-        .resume         = acpi_cpufreq_resume,
-        .name           = "acpi-cpufreq",
-        .owner          = THIS_MODULE,
-        .attr           = acpi_cpufreq_attr,
-};
-
-static int __init acpi_cpufreq_init(void)
-{
-        int ret;
-
-        if (acpi_disabled)
-                return 0;
-
-        dprintk("acpi_cpufreq_init\n");
-
-        ret = acpi_cpufreq_early_init();
-        if (ret)
-                return ret;
-
-        ret = cpufreq_register_driver(&acpi_cpufreq_driver);
-        if (ret)
-                free_acpi_perf_data();
-
-        return ret;
-}
-
-static void __exit acpi_cpufreq_exit(void)
-{
-        dprintk("acpi_cpufreq_exit\n");
-
-        cpufreq_unregister_driver(&acpi_cpufreq_driver);
-
-        free_percpu(acpi_perf_data);
-}
-
-module_param(acpi_pstate_strict, uint, 0644);
-MODULE_PARM_DESC(acpi_pstate_strict,
-        "value 0 or non-zero. non-zero -> strict ACPI checks are "
-        "performed during frequency changes.");
-
-late_initcall(acpi_cpufreq_init);
-module_exit(acpi_cpufreq_exit);
-
-MODULE_ALIAS("acpi");
diff --git a/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c b/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c
deleted file mode 100644
index 141abebc4516..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c
+++ /dev/null
@@ -1,446 +0,0 @@
-/*
- * (C) 2004-2006  Sebastian Witt <se.witt@gmx.net>
- *
- *  Licensed under the terms of the GNU GPL License version 2.
- *  Based upon reverse engineered information
- *
- *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/init.h>
-#include <linux/cpufreq.h>
-#include <linux/pci.h>
-#include <linux/delay.h>
-
-#define NFORCE2_XTAL 25
-#define NFORCE2_BOOTFSB 0x48
-#define NFORCE2_PLLENABLE 0xa8
-#define NFORCE2_PLLREG 0xa4
-#define NFORCE2_PLLADR 0xa0
-#define NFORCE2_PLL(mul, div) (0x100000 | (mul << 8) | div)
-
-#define NFORCE2_MIN_FSB 50
-#define NFORCE2_SAFE_DISTANCE 50
-
-/* Delay in ms between FSB changes */
-/* #define NFORCE2_DELAY 10 */
-
-/*
- * nforce2_chipset:
- * FSB is changed using the chipset
- */
-static struct pci_dev *nforce2_dev;
-
-/* fid:
- * multiplier * 10
- */
-static int fid;
-
-/* min_fsb, max_fsb:
- * minimum and maximum FSB (= FSB at boot time)
- */
-static int min_fsb;
-static int max_fsb;
-
-MODULE_AUTHOR("Sebastian Witt <se.witt@gmx.net>");
-MODULE_DESCRIPTION("nForce2 FSB changing cpufreq driver");
-MODULE_LICENSE("GPL");
-
-module_param(fid, int, 0444);
-module_param(min_fsb, int, 0444);
-
-MODULE_PARM_DESC(fid, "CPU multiplier to use (11.5 = 115)");
-MODULE_PARM_DESC(min_fsb,
-                "Minimum FSB to use, if not defined: current FSB - 50");
-
-#define PFX "cpufreq-nforce2: "
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
-                "cpufreq-nforce2", msg)
-
-/**
- * nforce2_calc_fsb - calculate FSB
- * @pll: PLL value
- *
- *   Calculates FSB from PLL value
- */
-static int nforce2_calc_fsb(int pll)
-{
-        unsigned char mul, div;
-
-        mul = (pll >> 8) & 0xff;
-        div = pll & 0xff;
-
-        if (div > 0)
-                return NFORCE2_XTAL * mul / div;
-
-        return 0;
-}
-
-/**
- * nforce2_calc_pll - calculate PLL value
- * @fsb: FSB
- *
- *   Calculate PLL value for given FSB
- */
-static int nforce2_calc_pll(unsigned int fsb)
-{
-        unsigned char xmul, xdiv;
-        unsigned char mul = 0, div = 0;
-        int tried = 0;
-
-        /* Try to calculate multiplier and divider up to 4 times */
-        while (((mul == 0) || (div == 0)) && (tried <= 3)) {
-                for (xdiv = 2; xdiv <= 0x80; xdiv++)
-                        for (xmul = 1; xmul <= 0xfe; xmul++)
-                                if (nforce2_calc_fsb(NFORCE2_PLL(xmul, xdiv)) ==
-                                    fsb + tried) {
-                                        mul = xmul;
-                                        div = xdiv;
-                                }
-                tried++;
-        }
-
-        if ((mul == 0) || (div == 0))
-                return -1;
-
-        return NFORCE2_PLL(mul, div);
-}
-
-/**
- * nforce2_write_pll - write PLL value to chipset
- * @pll: PLL value
- *
- *   Writes new FSB PLL value to chipset
- */
-static void nforce2_write_pll(int pll)
-{
-        int temp;
-
-        /* Set the pll addr. to 0x00 */
-        pci_write_config_dword(nforce2_dev, NFORCE2_PLLADR, 0);
-
-        /* Now write the value in all 64 registers */
-        for (temp = 0; temp <= 0x3f; temp++)
-                pci_write_config_dword(nforce2_dev, NFORCE2_PLLREG, pll);
-
-        return;
-}
-
-/**
- * nforce2_fsb_read - Read FSB
- *
- *   Read FSB from chipset
- *   If bootfsb != 0, return FSB at boot-time
- */
-static unsigned int nforce2_fsb_read(int bootfsb)
-{
-        struct pci_dev *nforce2_sub5;
-        u32 fsb, temp = 0;
-
-        /* Get chipset boot FSB from subdevice 5 (FSB at boot-time) */
-        nforce2_sub5 = pci_get_subsys(PCI_VENDOR_ID_NVIDIA, 0x01EF,
-                                PCI_ANY_ID, PCI_ANY_ID, NULL);
-        if (!nforce2_sub5)
-                return 0;
-
-        pci_read_config_dword(nforce2_sub5, NFORCE2_BOOTFSB, &fsb);
-        fsb /= 1000000;
-
-        /* Check if PLL register is already set */
-        pci_read_config_byte(nforce2_dev, NFORCE2_PLLENABLE, (u8 *)&temp);
-
-        if (bootfsb || !temp)
-                return fsb;
-
-        /* Use PLL register FSB value */
-        pci_read_config_dword(nforce2_dev, NFORCE2_PLLREG, &temp);
-        fsb = nforce2_calc_fsb(temp);
-
-        return fsb;
-}
-
-/**
- * nforce2_set_fsb - set new FSB
- * @fsb: New FSB
- *
- *   Sets new FSB
- */
-static int nforce2_set_fsb(unsigned int fsb)
-{
-        u32 temp = 0;
-        unsigned int tfsb;
-        int diff;
-        int pll = 0;
-
-        if ((fsb > max_fsb) || (fsb < NFORCE2_MIN_FSB)) {
-                printk(KERN_ERR PFX "FSB %d is out of range!\n", fsb);
-                return -EINVAL;
-        }
-
-        tfsb = nforce2_fsb_read(0);
-        if (!tfsb) {
-                printk(KERN_ERR PFX "Error while reading the FSB\n");
-                return -EINVAL;
-        }
-
-        /* First write? Then set actual value */
-        pci_read_config_byte(nforce2_dev, NFORCE2_PLLENABLE, (u8 *)&temp);
-        if (!temp) {
-                pll = nforce2_calc_pll(tfsb);
-
-                if (pll < 0)
-                        return -EINVAL;
-
-                nforce2_write_pll(pll);
-        }
-
-        /* Enable write access */
-        temp = 0x01;
-        pci_write_config_byte(nforce2_dev, NFORCE2_PLLENABLE, (u8)temp);
-
-        diff = tfsb - fsb;
-
-        if (!diff)
-                return 0;
-
-        while ((tfsb != fsb) && (tfsb <= max_fsb) && (tfsb >= min_fsb)) {
-                if (diff < 0)
-                        tfsb++;
-                else
-                        tfsb--;
-
-                /* Calculate the PLL reg. value */
-                pll = nforce2_calc_pll(tfsb);
-                if (pll == -1)
-                        return -EINVAL;
-
-                nforce2_write_pll(pll);
-#ifdef NFORCE2_DELAY
-                mdelay(NFORCE2_DELAY);
-#endif
-        }
-
-        temp = 0x40;
-        pci_write_config_byte(nforce2_dev, NFORCE2_PLLADR, (u8)temp);
-
-        return 0;
-}
-
-/**
- * nforce2_get - get the CPU frequency
- * @cpu: CPU number
- *
- * Returns the CPU frequency
- */
-static unsigned int nforce2_get(unsigned int cpu)
-{
-        if (cpu)
-                return 0;
-        return nforce2_fsb_read(0) * fid * 100;
-}
-
-/**
- * nforce2_target - set a new CPUFreq policy
- * @policy: new policy
- * @target_freq: the target frequency
- * @relation: how that frequency relates to achieved frequency
- *  (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
- *
- * Sets a new CPUFreq policy.
- */
-static int nforce2_target(struct cpufreq_policy *policy,
-                          unsigned int target_freq, unsigned int relation)
-{
-/*        unsigned long         flags; */
-        struct cpufreq_freqs freqs;
-        unsigned int target_fsb;
-
-        if ((target_freq > policy->max) || (target_freq < policy->min))
-                return -EINVAL;
-
-        target_fsb = target_freq / (fid * 100);
-
-        freqs.old = nforce2_get(policy->cpu);
-        freqs.new = target_fsb * fid * 100;
-        freqs.cpu = 0;          /* Only one CPU on nForce2 platforms */
-
-        if (freqs.old == freqs.new)
-                return 0;
-
-        dprintk("Old CPU frequency %d kHz, new %d kHz\n",
-               freqs.old, freqs.new);
-
-        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-
-        /* Disable IRQs */
-        /* local_irq_save(flags); */
-
-        if (nforce2_set_fsb(target_fsb) < 0)
-                printk(KERN_ERR PFX "Changing FSB to %d failed\n",
-                        target_fsb);
-        else
-                dprintk("Changed FSB successfully to %d\n",
-                        target_fsb);
-
-        /* Enable IRQs */
-        /* local_irq_restore(flags); */
-
-        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-
-        return 0;
-}
-
-/**
- * nforce2_verify - verifies a new CPUFreq policy
- * @policy: new policy
- */
-static int nforce2_verify(struct cpufreq_policy *policy)
-{
-        unsigned int fsb_pol_max;
-
-        fsb_pol_max = policy->max / (fid * 100);
-
-        if (policy->min < (fsb_pol_max * fid * 100))
-                policy->max = (fsb_pol_max + 1) * fid * 100;
-
-        cpufreq_verify_within_limits(policy,
-                                     policy->cpuinfo.min_freq,
-                                     policy->cpuinfo.max_freq);
-        return 0;
-}
-
-static int nforce2_cpu_init(struct cpufreq_policy *policy)
-{
-        unsigned int fsb;
-        unsigned int rfid;
-
-        /* capability check */
-        if (policy->cpu != 0)
-                return -ENODEV;
-
-        /* Get current FSB */
-        fsb = nforce2_fsb_read(0);
-
-        if (!fsb)
-                return -EIO;
-
-        /* FIX: Get FID from CPU */
-        if (!fid) {
-                if (!cpu_khz) {
-                        printk(KERN_WARNING PFX
-                        "cpu_khz not set, can't calculate multiplier!\n");
-                        return -ENODEV;
-                }
-
-                fid = cpu_khz / (fsb * 100);
-                rfid = fid % 5;
-
-                if (rfid) {
-                        if (rfid > 2)
-                                fid += 5 - rfid;
-                        else
-                                fid -= rfid;
-                }
-        }
-
-        printk(KERN_INFO PFX "FSB currently at %i MHz, FID %d.%d\n", fsb,
-               fid / 10, fid % 10);
-
-        /* Set maximum FSB to FSB at boot time */
-        max_fsb = nforce2_fsb_read(1);
-
-        if (!max_fsb)
-                return -EIO;
-
-        if (!min_fsb)
-                min_fsb = max_fsb - NFORCE2_SAFE_DISTANCE;
-
-        if (min_fsb < NFORCE2_MIN_FSB)
-                min_fsb = NFORCE2_MIN_FSB;
-
-        /* cpuinfo and default policy values */
-        policy->cpuinfo.min_freq = min_fsb * fid * 100;
-        policy->cpuinfo.max_freq = max_fsb * fid * 100;
-        policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
-        policy->cur = nforce2_get(policy->cpu);
-        policy->min = policy->cpuinfo.min_freq;
-        policy->max = policy->cpuinfo.max_freq;
-
-        return 0;
-}
-
-static int nforce2_cpu_exit(struct cpufreq_policy *policy)
-{
-        return 0;
-}
-
-static struct cpufreq_driver nforce2_driver = {
-        .name = "nforce2",
-        .verify = nforce2_verify,
-        .target = nforce2_target,
-        .get = nforce2_get,
-        .init = nforce2_cpu_init,
-        .exit = nforce2_cpu_exit,
-        .owner = THIS_MODULE,
-};
-
-/**
- * nforce2_detect_chipset - detect the Southbridge which contains FSB PLL logic
- *
- * Detects nForce2 A2 and C1 stepping
- *
- */
-static int nforce2_detect_chipset(void)
-{
-        nforce2_dev = pci_get_subsys(PCI_VENDOR_ID_NVIDIA,
-                                        PCI_DEVICE_ID_NVIDIA_NFORCE2,
-                                        PCI_ANY_ID, PCI_ANY_ID, NULL);
-
-        if (nforce2_dev == NULL)
-                return -ENODEV;
-
-        printk(KERN_INFO PFX "Detected nForce2 chipset revision %X\n",
-               nforce2_dev->revision);
-        printk(KERN_INFO PFX
-               "FSB changing is maybe unstable and can lead to "
-               "crashes and data loss.\n");
-
-        return 0;
-}
-
-/**
- * nforce2_init - initializes the nForce2 CPUFreq driver
- *
- * Initializes the nForce2 FSB support. Returns -ENODEV on unsupported
- * devices, -EINVAL on problems during initiatization, and zero on
- * success.
- */
-static int __init nforce2_init(void)
-{
-        /* TODO: do we need to detect the processor? */
-
-        /* detect chipset */
-        if (nforce2_detect_chipset()) {
-                printk(KERN_INFO PFX "No nForce2 chipset.\n");
-                return -ENODEV;
-        }
-
-        return cpufreq_register_driver(&nforce2_driver);
-}
-
-/**
- * nforce2_exit - unregisters cpufreq module
- *
- *   Unregisters nForce2 FSB change support.
- */
-static void __exit nforce2_exit(void)
-{
-        cpufreq_unregister_driver(&nforce2_driver);
-}
-
-module_init(nforce2_init);
-module_exit(nforce2_exit);
-
diff --git a/arch/x86/kernel/cpu/cpufreq/e_powersaver.c b/arch/x86/kernel/cpu/cpufreq/e_powersaver.c
deleted file mode 100644
index 35a257dd4bb7..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/e_powersaver.c
+++ /dev/null
@@ -1,367 +0,0 @@
-/*
- *  Based on documentation provided by Dave Jones. Thanks!
- *
- *  Licensed under the terms of the GNU GPL License version 2.
- *
- *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/cpufreq.h>
-#include <linux/ioport.h>
-#include <linux/slab.h>
-#include <linux/timex.h>
-#include <linux/io.h>
-#include <linux/delay.h>
-
-#include <asm/msr.h>
-#include <asm/tsc.h>
-
-#define EPS_BRAND_C7M   0
-#define EPS_BRAND_C7    1
-#define EPS_BRAND_EDEN  2
-#define EPS_BRAND_C3    3
-#define EPS_BRAND_C7D   4
-
-struct eps_cpu_data {
-        u32 fsb;
-        struct cpufreq_frequency_table freq_table[];
-};
-
-static struct eps_cpu_data *eps_cpu[NR_CPUS];
-
-
-static unsigned int eps_get(unsigned int cpu)
-{
-        struct eps_cpu_data *centaur;
-        u32 lo, hi;
-
-        if (cpu)
-                return 0;
-        centaur = eps_cpu[cpu];
-        if (centaur == NULL)
-                return 0;
-
-        /* Return current frequency */
-        rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
-        return centaur->fsb * ((lo >> 8) & 0xff);
-}
-
-static int eps_set_state(struct eps_cpu_data *centaur,
-                         unsigned int cpu,
-                         u32 dest_state)
-{
-        struct cpufreq_freqs freqs;
-        u32 lo, hi;
-        int err = 0;
-        int i;
-
-        freqs.old = eps_get(cpu);
-        freqs.new = centaur->fsb * ((dest_state >> 8) & 0xff);
-        freqs.cpu = cpu;
-        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-
-        /* Wait while CPU is busy */
-        rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
-        i = 0;
-        while (lo & ((1 << 16) | (1 << 17))) {
-                udelay(16);
-                rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
-                i++;
-                if (unlikely(i > 64)) {
-                        err = -ENODEV;
-                        goto postchange;
-                }
-        }
-        /* Set new multiplier and voltage */
-        wrmsr(MSR_IA32_PERF_CTL, dest_state & 0xffff, 0);
-        /* Wait until transition end */
-        i = 0;
-        do {
-                udelay(16);
-                rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
-                i++;
-                if (unlikely(i > 64)) {
-                        err = -ENODEV;
-                        goto postchange;
-                }
-        } while (lo & ((1 << 16) | (1 << 17)));
-
-        /* Return current frequency */
-postchange:
-        rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
-        freqs.new = centaur->fsb * ((lo >> 8) & 0xff);
-
-#ifdef DEBUG
-        {
-        u8 current_multiplier, current_voltage;
-
-        /* Print voltage and multiplier */
-        rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
-        current_voltage = lo & 0xff;
-        printk(KERN_INFO "eps: Current voltage = %dmV\n",
-                current_voltage * 16 + 700);
-        current_multiplier = (lo >> 8) & 0xff;
-        printk(KERN_INFO "eps: Current multiplier = %d\n",
-                current_multiplier);
-        }
-#endif
-        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-        return err;
-}
-
-static int eps_target(struct cpufreq_policy *policy,
-                               unsigned int target_freq,
-                               unsigned int relation)
-{
-        struct eps_cpu_data *centaur;
-        unsigned int newstate = 0;
-        unsigned int cpu = policy->cpu;
-        unsigned int dest_state;
-        int ret;
-
-        if (unlikely(eps_cpu[cpu] == NULL))
-                return -ENODEV;
-        centaur = eps_cpu[cpu];
-
-        if (unlikely(cpufreq_frequency_table_target(policy,
-                        &eps_cpu[cpu]->freq_table[0],
-                        target_freq,
-                        relation,
-                        &newstate))) {
-                return -EINVAL;
-        }
-
-        /* Make frequency transition */
-        dest_state = centaur->freq_table[newstate].index & 0xffff;
-        ret = eps_set_state(centaur, cpu, dest_state);
-        if (ret)
-                printk(KERN_ERR "eps: Timeout!\n");
-        return ret;
-}
-
-static int eps_verify(struct cpufreq_policy *policy)
-{
-        return cpufreq_frequency_table_verify(policy,
-                        &eps_cpu[policy->cpu]->freq_table[0]);
-}
-
-static int eps_cpu_init(struct cpufreq_policy *policy)
-{
-        unsigned int i;
-        u32 lo, hi;
-        u64 val;
-        u8 current_multiplier, current_voltage;
-        u8 max_multiplier, max_voltage;
-        u8 min_multiplier, min_voltage;
-        u8 brand = 0;
-        u32 fsb;
-        struct eps_cpu_data *centaur;
-        struct cpuinfo_x86 *c = &cpu_data(0);
-        struct cpufreq_frequency_table *f_table;
-        int k, step, voltage;
-        int ret;
-        int states;
-
-        if (policy->cpu != 0)
-                return -ENODEV;
-
-        /* Check brand */
-        printk(KERN_INFO "eps: Detected VIA ");
-
-        switch (c->x86_model) {
-        case 10:
-                rdmsr(0x1153, lo, hi);
-                brand = (((lo >> 2) ^ lo) >> 18) & 3;
-                printk(KERN_CONT "Model A ");
-                break;
-        case 13:
-                rdmsr(0x1154, lo, hi);
-                brand = (((lo >> 4) ^ (lo >> 2))) & 0x000000ff;
-                printk(KERN_CONT "Model D ");
-                break;
-        }
-
-        switch (brand) {
-        case EPS_BRAND_C7M:
-                printk(KERN_CONT "C7-M\n");
-                break;
-        case EPS_BRAND_C7:
-                printk(KERN_CONT "C7\n");
-                break;
-        case EPS_BRAND_EDEN:
-                printk(KERN_CONT "Eden\n");
-                break;
-        case EPS_BRAND_C7D:
-                printk(KERN_CONT "C7-D\n");
-                break;
-        case EPS_BRAND_C3:
-                printk(KERN_CONT "C3\n");
-                return -ENODEV;
-                break;
-        }
-        /* Enable Enhanced PowerSaver */
-        rdmsrl(MSR_IA32_MISC_ENABLE, val);
-        if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
-                val |= MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP;
-                wrmsrl(MSR_IA32_MISC_ENABLE, val);
-                /* Can be locked at 0 */
-                rdmsrl(MSR_IA32_MISC_ENABLE, val);
-                if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
-                        printk(KERN_INFO "eps: Can't enable Enhanced PowerSaver\n");
-                        return -ENODEV;
-                }
-        }
-
-        /* Print voltage and multiplier */
-        rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
-        current_voltage = lo & 0xff;
-        printk(KERN_INFO "eps: Current voltage = %dmV\n",
-                        current_voltage * 16 + 700);
-        current_multiplier = (lo >> 8) & 0xff;
-        printk(KERN_INFO "eps: Current multiplier = %d\n", current_multiplier);
-
-        /* Print limits */
-        max_voltage = hi & 0xff;
-        printk(KERN_INFO "eps: Highest voltage = %dmV\n",
-                        max_voltage * 16 + 700);
-        max_multiplier = (hi >> 8) & 0xff;
-        printk(KERN_INFO "eps: Highest multiplier = %d\n", max_multiplier);
-        min_voltage = (hi >> 16) & 0xff;
-        printk(KERN_INFO "eps: Lowest voltage = %dmV\n",
-                        min_voltage * 16 + 700);
-        min_multiplier = (hi >> 24) & 0xff;
-        printk(KERN_INFO "eps: Lowest multiplier = %d\n", min_multiplier);
-
-        /* Sanity checks */
-        if (current_multiplier == 0 || max_multiplier == 0
-            || min_multiplier == 0)
-                return -EINVAL;
-        if (current_multiplier > max_multiplier
-            || max_multiplier <= min_multiplier)
-                return -EINVAL;
-        if (current_voltage > 0x1f || max_voltage > 0x1f)
-                return -EINVAL;
-        if (max_voltage < min_voltage)
-                return -EINVAL;
-
-        /* Calc FSB speed */
-        fsb = cpu_khz / current_multiplier;
-        /* Calc number of p-states supported */
-        if (brand == EPS_BRAND_C7M)
-                states = max_multiplier - min_multiplier + 1;
-        else
-                states = 2;
-
-        /* Allocate private data and frequency table for current cpu */
-        centaur = kzalloc(sizeof(struct eps_cpu_data)
-                    + (states + 1) * sizeof(struct cpufreq_frequency_table),
-                    GFP_KERNEL);
-        if (!centaur)
-                return -ENOMEM;
-        eps_cpu[0] = centaur;
-
-        /* Copy basic values */
-        centaur->fsb = fsb;
-
-        /* Fill frequency and MSR value table */
-        f_table = &centaur->freq_table[0];
-        if (brand != EPS_BRAND_C7M) {
-                f_table[0].frequency = fsb * min_multiplier;
-                f_table[0].index = (min_multiplier << 8) | min_voltage;
-                f_table[1].frequency = fsb * max_multiplier;
-                f_table[1].index = (max_multiplier << 8) | max_voltage;
-                f_table[2].frequency = CPUFREQ_TABLE_END;
-        } else {
-                k = 0;
-                step = ((max_voltage - min_voltage) * 256)
-                        / (max_multiplier - min_multiplier);
-                for (i = min_multiplier; i <= max_multiplier; i++) {
-                        voltage = (k * step) / 256 + min_voltage;
-                        f_table[k].frequency = fsb * i;
-                        f_table[k].index = (i << 8) | voltage;
-                        k++;
-                }
-                f_table[k].frequency = CPUFREQ_TABLE_END;
-        }
-
-        policy->cpuinfo.transition_latency = 140000; /* 844mV -> 700mV in ns */
-        policy->cur = fsb * current_multiplier;
-
-        ret = cpufreq_frequency_table_cpuinfo(policy, &centaur->freq_table[0]);
-        if (ret) {
-                kfree(centaur);
-                return ret;
-        }
-
-        cpufreq_frequency_table_get_attr(&centaur->freq_table[0], policy->cpu);
-        return 0;
-}
-
-static int eps_cpu_exit(struct cpufreq_policy *policy)
-{
-        unsigned int cpu = policy->cpu;
-        struct eps_cpu_data *centaur;
-        u32 lo, hi;
-
-        if (eps_cpu[cpu] == NULL)
-                return -ENODEV;
-        centaur = eps_cpu[cpu];
-
-        /* Get max frequency */
-        rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
-        /* Set max frequency */
-        eps_set_state(centaur, cpu, hi & 0xffff);
-        /* Bye */
-        cpufreq_frequency_table_put_attr(policy->cpu);
-        kfree(eps_cpu[cpu]);
-        eps_cpu[cpu] = NULL;
-        return 0;
-}
-
-static struct freq_attr *eps_attr[] = {
-        &cpufreq_freq_attr_scaling_available_freqs,
-        NULL,
-};
-
-static struct cpufreq_driver eps_driver = {
-        .verify         = eps_verify,
-        .target         = eps_target,
-        .init           = eps_cpu_init,
-        .exit           = eps_cpu_exit,
-        .get            = eps_get,
-        .name           = "e_powersaver",
-        .owner          = THIS_MODULE,
-        .attr           = eps_attr,
-};
-
-static int __init eps_init(void)
-{
-        struct cpuinfo_x86 *c = &cpu_data(0);
-
-        /* This driver will work only on Centaur C7 processors with
-         * Enhanced SpeedStep/PowerSaver registers */
-        if (c->x86_vendor != X86_VENDOR_CENTAUR
-            || c->x86 != 6 || c->x86_model < 10)
-                return -ENODEV;
-        if (!cpu_has(c, X86_FEATURE_EST))
-                return -ENODEV;
-
-        if (cpufreq_register_driver(&eps_driver))
-                return -EINVAL;
-        return 0;
-}
-
-static void __exit eps_exit(void)
-{
-        cpufreq_unregister_driver(&eps_driver);
-}
-
-MODULE_AUTHOR("Rafal Bilski <rafalbilski@interia.pl>");
-MODULE_DESCRIPTION("Enhanced PowerSaver driver for VIA C7 CPU's.");
-MODULE_LICENSE("GPL");
-
-module_init(eps_init);
-module_exit(eps_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/elanfreq.c b/arch/x86/kernel/cpu/cpufreq/elanfreq.c
deleted file mode 100644
index c587db472a75..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/elanfreq.c
+++ /dev/null
@@ -1,309 +0,0 @@
-/*
- *      elanfreq:       cpufreq driver for the AMD ELAN family
- *
- *      (c) Copyright 2002 Robert Schwebel <r.schwebel@pengutronix.de>
- *
- *      Parts of this code are (c) Sven Geggus <sven@geggus.net>
- *
- *      All Rights Reserved.
- *
- *      This program is free software; you can redistribute it and/or
- *      modify it under the terms of the GNU General Public License
- *      as published by the Free Software Foundation; either version
- *      2 of the License, or (at your option) any later version.
- *
- *      2002-02-13: - initial revision for 2.4.18-pre9 by Robert Schwebel
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-
-#include <linux/delay.h>
-#include <linux/cpufreq.h>
-
-#include <asm/msr.h>
-#include <linux/timex.h>
-#include <linux/io.h>
-
-#define REG_CSCIR 0x22          /* Chip Setup and Control Index Register    */
-#define REG_CSCDR 0x23          /* Chip Setup and Control Data  Register    */
-
-/* Module parameter */
-static int max_freq;
-
-struct s_elan_multiplier {
-        int clock;              /* frequency in kHz                         */
-        int val40h;             /* PMU Force Mode register                  */
-        int val80h;             /* CPU Clock Speed Register                 */
-};
-
-/*
- * It is important that the frequencies
- * are listed in ascending order here!
- */
-static struct s_elan_multiplier elan_multiplier[] = {
-        {1000,  0x02,   0x18},
-        {2000,  0x02,   0x10},
-        {4000,  0x02,   0x08},
-        {8000,  0x00,   0x00},
-        {16000, 0x00,   0x02},
-        {33000, 0x00,   0x04},
-        {66000, 0x01,   0x04},
-        {99000, 0x01,   0x05}
-};
-
-static struct cpufreq_frequency_table elanfreq_table[] = {
-        {0,     1000},
-        {1,     2000},
-        {2,     4000},
-        {3,     8000},
-        {4,     16000},
-        {5,     33000},
-        {6,     66000},
-        {7,     99000},
-        {0,     CPUFREQ_TABLE_END},
-};
-
-
-/**
- *      elanfreq_get_cpu_frequency: determine current cpu speed
- *
- *      Finds out at which frequency the CPU of the Elan SOC runs
- *      at the moment. Frequencies from 1 to 33 MHz are generated
- *      the normal way, 66 and 99 MHz are called "Hyperspeed Mode"
- *      and have the rest of the chip running with 33 MHz.
- */
-
-static unsigned int elanfreq_get_cpu_frequency(unsigned int cpu)
-{
-        u8 clockspeed_reg;    /* Clock Speed Register */
-
-        local_irq_disable();
-        outb_p(0x80, REG_CSCIR);
-        clockspeed_reg = inb_p(REG_CSCDR);
-        local_irq_enable();
-
-        if ((clockspeed_reg & 0xE0) == 0xE0)
-                return 0;
-
-        /* Are we in CPU clock multiplied mode (66/99 MHz)? */
-        if ((clockspeed_reg & 0xE0) == 0xC0) {
-                if ((clockspeed_reg & 0x01) == 0)
-                        return 66000;
-                else
-                        return 99000;
-        }
-
-        /* 33 MHz is not 32 MHz... */
-        if ((clockspeed_reg & 0xE0) == 0xA0)
-                return 33000;
-
-        return (1<<((clockspeed_reg & 0xE0) >> 5)) * 1000;
-}
-
-
-/**
- *      elanfreq_set_cpu_frequency: Change the CPU core frequency
- *      @cpu: cpu number
- *      @freq: frequency in kHz
- *
- *      This function takes a frequency value and changes the CPU frequency
- *      according to this. Note that the frequency has to be checked by
- *      elanfreq_validatespeed() for correctness!
- *
- *      There is no return value.
- */
-
-static void elanfreq_set_cpu_state(unsigned int state)
-{
-        struct cpufreq_freqs    freqs;
-
-        freqs.old = elanfreq_get_cpu_frequency(0);
-        freqs.new = elan_multiplier[state].clock;
-        freqs.cpu = 0; /* elanfreq.c is UP only driver */
-
-        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-
-        printk(KERN_INFO "elanfreq: attempting to set frequency to %i kHz\n",
-                        elan_multiplier[state].clock);
-
-
-        /*
-         * Access to the Elan's internal registers is indexed via
-         * 0x22: Chip Setup & Control Register Index Register (CSCI)
-         * 0x23: Chip Setup & Control Register Data  Register (CSCD)
-         *
-         */
-
-        /*
-         * 0x40 is the Power Management Unit's Force Mode Register.
-         * Bit 6 enables Hyperspeed Mode (66/100 MHz core frequency)
-         */
-
-        local_irq_disable();
-        outb_p(0x40, REG_CSCIR);                /* Disable hyperspeed mode */
-        outb_p(0x00, REG_CSCDR);
-        local_irq_enable();             /* wait till internal pipelines and */
-        udelay(1000);                   /* buffers have cleaned up          */
-
-        local_irq_disable();
-
-        /* now, set the CPU clock speed register (0x80) */
-        outb_p(0x80, REG_CSCIR);
-        outb_p(elan_multiplier[state].val80h, REG_CSCDR);
-
-        /* now, the hyperspeed bit in PMU Force Mode Register (0x40) */
-        outb_p(0x40, REG_CSCIR);
-        outb_p(elan_multiplier[state].val40h, REG_CSCDR);
-        udelay(10000);
-        local_irq_enable();
-
-        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-};
-
-
-/**
- *      elanfreq_validatespeed: test if frequency range is valid
- *      @policy: the policy to validate
- *
- *      This function checks if a given frequency range in kHz is valid
- *      for the hardware supported by the driver.
- */
-
-static int elanfreq_verify(struct cpufreq_policy *policy)
-{
-        return cpufreq_frequency_table_verify(policy, &elanfreq_table[0]);
-}
-
-static int elanfreq_target(struct cpufreq_policy *policy,
-                            unsigned int target_freq,
-                            unsigned int relation)
-{
-        unsigned int newstate = 0;
-
-        if (cpufreq_frequency_table_target(policy, &elanfreq_table[0],
-                                target_freq, relation, &newstate))
-                return -EINVAL;
-
-        elanfreq_set_cpu_state(newstate);
-
-        return 0;
-}
-
-
-/*
- *      Module init and exit code
- */
-
-static int elanfreq_cpu_init(struct cpufreq_policy *policy)
-{
-        struct cpuinfo_x86 *c = &cpu_data(0);
-        unsigned int i;
-        int result;
-
-        /* capability check */
-        if ((c->x86_vendor != X86_VENDOR_AMD) ||
-            (c->x86 != 4) || (c->x86_model != 10))
-                return -ENODEV;
-
-        /* max freq */
-        if (!max_freq)
-                max_freq = elanfreq_get_cpu_frequency(0);
-
-        /* table init */
-        for (i = 0; (elanfreq_table[i].frequency != CPUFREQ_TABLE_END); i++) {
-                if (elanfreq_table[i].frequency > max_freq)
-                        elanfreq_table[i].frequency = CPUFREQ_ENTRY_INVALID;
-        }
-
-        /* cpuinfo and default policy values */
-        policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
-        policy->cur = elanfreq_get_cpu_frequency(0);
-
-        result = cpufreq_frequency_table_cpuinfo(policy, elanfreq_table);
-        if (result)
-                return result;
-
-        cpufreq_frequency_table_get_attr(elanfreq_table, policy->cpu);
-        return 0;
-}
-
-
-static int elanfreq_cpu_exit(struct cpufreq_policy *policy)
-{
-        cpufreq_frequency_table_put_attr(policy->cpu);
-        return 0;
-}
-
-
-#ifndef MODULE
-/**
- * elanfreq_setup - elanfreq command line parameter parsing
- *
- * elanfreq command line parameter.  Use:
- *  elanfreq=66000
- * to set the maximum CPU frequency to 66 MHz. Note that in
- * case you do not give this boot parameter, the maximum
- * frequency will fall back to _current_ CPU frequency which
- * might be lower. If you build this as a module, use the
- * max_freq module parameter instead.
- */
-static int __init elanfreq_setup(char *str)
-{
-        max_freq = simple_strtoul(str, &str, 0);
-        printk(KERN_WARNING "You're using the deprecated elanfreq command line option. Use elanfreq.max_freq instead, please!\n");
-        return 1;
-}
-__setup("elanfreq=", elanfreq_setup);
-#endif
-
-
-static struct freq_attr *elanfreq_attr[] = {
-        &cpufreq_freq_attr_scaling_available_freqs,
-        NULL,
-};
-
-
-static struct cpufreq_driver elanfreq_driver = {
-        .get            = elanfreq_get_cpu_frequency,
-        .verify         = elanfreq_verify,
-        .target         = elanfreq_target,
-        .init           = elanfreq_cpu_init,
-        .exit           = elanfreq_cpu_exit,
-        .name           = "elanfreq",
-        .owner          = THIS_MODULE,
-        .attr           = elanfreq_attr,
-};
-
-
-static int __init elanfreq_init(void)
-{
-        struct cpuinfo_x86 *c = &cpu_data(0);
-
-        /* Test if we have the right hardware */
-        if ((c->x86_vendor != X86_VENDOR_AMD) ||
-                (c->x86 != 4) || (c->x86_model != 10)) {
-                printk(KERN_INFO "elanfreq: error: no Elan processor found!\n");
-                return -ENODEV;
-        }
-        return cpufreq_register_driver(&elanfreq_driver);
-}
-
-
-static void __exit elanfreq_exit(void)
-{
-        cpufreq_unregister_driver(&elanfreq_driver);
-}
-
-
-module_param(max_freq, int, 0444);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Robert Schwebel <r.schwebel@pengutronix.de>, "
-                "Sven Geggus <sven@geggus.net>");
-MODULE_DESCRIPTION("cpufreq driver for AMD's Elan CPUs");
-
-module_init(elanfreq_init);
-module_exit(elanfreq_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c b/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c
deleted file mode 100644
index 32974cf84232..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c
+++ /dev/null
@@ -1,517 +0,0 @@
-/*
- *      Cyrix MediaGX and NatSemi Geode Suspend Modulation
- *      (C) 2002 Zwane Mwaikambo <zwane@commfireservices.com>
- *      (C) 2002 Hiroshi Miura   <miura@da-cha.org>
- *      All Rights Reserved
- *
- *      This program is free software; you can redistribute it and/or
- *      modify it under the terms of the GNU General Public License
- *      version 2 as published by the Free Software Foundation
- *
- *      The author(s) of this software shall not be held liable for damages
- *      of any nature resulting due to the use of this software. This
- *      software is provided AS-IS with no warranties.
- *
- * Theoretical note:
- *
- *      (see Geode(tm) CS5530 manual (rev.4.1) page.56)
- *
- *      CPU frequency control on NatSemi Geode GX1/GXLV processor and CS55x0
- *      are based on Suspend Modulation.
- *
- *      Suspend Modulation works by asserting and de-asserting the SUSP# pin
- *      to CPU(GX1/GXLV) for configurable durations. When asserting SUSP#
- *      the CPU enters an idle state. GX1 stops its core clock when SUSP# is
- *      asserted then power consumption is reduced.
- *
- *      Suspend Modulation's OFF/ON duration are configurable
- *      with 'Suspend Modulation OFF Count Register'
- *      and 'Suspend Modulation ON Count Register'.
- *      These registers are 8bit counters that represent the number of
- *      32us intervals which the SUSP# pin is asserted(ON)/de-asserted(OFF)
- *      to the processor.
- *
- *      These counters define a ratio which is the effective frequency
- *      of operation of the system.
- *
- *                             OFF Count
- *      F_eff = Fgx * ----------------------
- *                      OFF Count + ON Count
- *
- *      0 <= On Count, Off Count <= 255
- *
- *      From these limits, we can get register values
- *
- *      off_duration + on_duration <= MAX_DURATION
- *      on_duration = off_duration * (stock_freq - freq) / freq
- *
- *      off_duration  =  (freq * DURATION) / stock_freq
- *      on_duration = DURATION - off_duration
- *
- *
- *---------------------------------------------------------------------------
- *
- * ChangeLog:
- *      Dec. 12, 2003   Hiroshi Miura <miura@da-cha.org>
- *              - fix on/off register mistake
- *              - fix cpu_khz calc when it stops cpu modulation.
- *
- *      Dec. 11, 2002   Hiroshi Miura <miura@da-cha.org>
- *              - rewrite for Cyrix MediaGX Cx5510/5520 and
- *                NatSemi Geode Cs5530(A).
- *
- *      Jul. ??, 2002  Zwane Mwaikambo <zwane@commfireservices.com>
- *              - cs5530_mod patch for 2.4.19-rc1.
- *
- *---------------------------------------------------------------------------
- *
- * Todo
- *      Test on machines with 5510, 5530, 5530A
- */
-
-/************************************************************************
- *                      Suspend Modulation - Definitions                *
- ************************************************************************/
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <linux/cpufreq.h>
-#include <linux/pci.h>
-#include <linux/errno.h>
-#include <linux/slab.h>
-
-#include <asm/processor-cyrix.h>
-
-/* PCI config registers, all at F0 */
-#define PCI_PMER1       0x80    /* power management enable register 1 */
-#define PCI_PMER2       0x81    /* power management enable register 2 */
-#define PCI_PMER3       0x82    /* power management enable register 3 */
-#define PCI_IRQTC       0x8c    /* irq speedup timer counter register:typical 2 to 4ms */
-#define PCI_VIDTC       0x8d    /* video speedup timer counter register: typical 50 to 100ms */
-#define PCI_MODOFF      0x94    /* suspend modulation OFF counter register, 1 = 32us */
-#define PCI_MODON       0x95    /* suspend modulation ON counter register */
-#define PCI_SUSCFG      0x96    /* suspend configuration register */
-
-/* PMER1 bits */
-#define GPM             (1<<0)  /* global power management */
-#define GIT             (1<<1)  /* globally enable PM device idle timers */
-#define GTR             (1<<2)  /* globally enable IO traps */
-#define IRQ_SPDUP       (1<<3)  /* disable clock throttle during interrupt handling */
-#define VID_SPDUP       (1<<4)  /* disable clock throttle during vga video handling */
-
-/* SUSCFG bits */
-#define SUSMOD          (1<<0)  /* enable/disable suspend modulation */
-/* the below is supported only with cs5530 (after rev.1.2)/cs5530A */
-#define SMISPDUP        (1<<1)  /* select how SMI re-enable suspend modulation: */
-                                /* IRQTC timer or read SMI speedup disable reg.(F1BAR[08-09h]) */
-#define SUSCFG          (1<<2)  /* enable powering down a GXLV processor. "Special 3Volt Suspend" mode */
-/* the below is supported only with cs5530A */
-#define PWRSVE_ISA      (1<<3)  /* stop ISA clock  */
-#define PWRSVE          (1<<4)  /* active idle */
-
-struct gxfreq_params {
-        u8 on_duration;
-        u8 off_duration;
-        u8 pci_suscfg;
-        u8 pci_pmer1;
-        u8 pci_pmer2;
-        struct pci_dev *cs55x0;
-};
-
-static struct gxfreq_params *gx_params;
-static int stock_freq;
-
-/* PCI bus clock - defaults to 30.000 if cpu_khz is not available */
-static int pci_busclk;
-module_param(pci_busclk, int, 0444);
-
-/* maximum duration for which the cpu may be suspended
- * (32us * MAX_DURATION). If no parameter is given, this defaults
- * to 255.
- * Note that this leads to a maximum of 8 ms(!) where the CPU clock
- * is suspended -- processing power is just 0.39% of what it used to be,
- * though. 781.25 kHz(!) for a 200 MHz processor -- wow. */
-static int max_duration = 255;
-module_param(max_duration, int, 0444);
-
-/* For the default policy, we want at least some processing power
- * - let's say 5%. (min = maxfreq / POLICY_MIN_DIV)
- */
-#define POLICY_MIN_DIV 20
-
-
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
-                "gx-suspmod", msg)
-
-/**
- * we can detect a core multipiler from dir0_lsb
- * from GX1 datasheet p.56,
- *      MULT[3:0]:
- *      0000 = SYSCLK multiplied by 4 (test only)
- *      0001 = SYSCLK multiplied by 10
- *      0010 = SYSCLK multiplied by 4
- *      0011 = SYSCLK multiplied by 6
- *      0100 = SYSCLK multiplied by 9
- *      0101 = SYSCLK multiplied by 5
- *      0110 = SYSCLK multiplied by 7
- *      0111 = SYSCLK multiplied by 8
- *              of 33.3MHz
- **/
-static int gx_freq_mult[16] = {
-                4, 10, 4, 6, 9, 5, 7, 8,
-                0, 0, 0, 0, 0, 0, 0, 0
-};
-
-
-/****************************************************************
- *      Low Level chipset interface                             *
- ****************************************************************/
-static struct pci_device_id gx_chipset_tbl[] __initdata = {
-        { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY), },
-        { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), },
-        { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), },
-        { 0, },
-};
-
-static void gx_write_byte(int reg, int value)
-{
-        pci_write_config_byte(gx_params->cs55x0, reg, value);
-}
-
-/**
- * gx_detect_chipset:
- *
- **/
-static __init struct pci_dev *gx_detect_chipset(void)
-{
-        struct pci_dev *gx_pci = NULL;
-
-        /* check if CPU is a MediaGX or a Geode. */
-        if ((boot_cpu_data.x86_vendor != X86_VENDOR_NSC) &&
-            (boot_cpu_data.x86_vendor != X86_VENDOR_CYRIX)) {
-                dprintk("error: no MediaGX/Geode processor found!\n");
-                return NULL;
-        }
-
-        /* detect which companion chip is used */
-        for_each_pci_dev(gx_pci) {
-                if ((pci_match_id(gx_chipset_tbl, gx_pci)) != NULL)
-                        return gx_pci;
-        }
-
-        dprintk("error: no supported chipset found!\n");
-        return NULL;
-}
-
-/**
- * gx_get_cpuspeed:
- *
- * Finds out at which efficient frequency the Cyrix MediaGX/NatSemi
- * Geode CPU runs.
- */
-static unsigned int gx_get_cpuspeed(unsigned int cpu)
-{
-        if ((gx_params->pci_suscfg & SUSMOD) == 0)
-                return stock_freq;
-
-        return (stock_freq * gx_params->off_duration)
-                / (gx_params->on_duration + gx_params->off_duration);
-}
-
-/**
- *      gx_validate_speed:
- *      determine current cpu speed
- *
- **/
-
-static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration,
-                u8 *off_duration)
-{
-        unsigned int i;
-        u8 tmp_on, tmp_off;
-        int old_tmp_freq = stock_freq;
-        int tmp_freq;
-
-        *off_duration = 1;
-        *on_duration = 0;
-
-        for (i = max_duration; i > 0; i--) {
-                tmp_off = ((khz * i) / stock_freq) & 0xff;
-                tmp_on = i - tmp_off;
-                tmp_freq = (stock_freq * tmp_off) / i;
-                /* if this relation is closer to khz, use this. If it's equal,
-                 * prefer it, too - lower latency */
-                if (abs(tmp_freq - khz) <= abs(old_tmp_freq - khz)) {
-                        *on_duration = tmp_on;
-                        *off_duration = tmp_off;
-                        old_tmp_freq = tmp_freq;
-                }
-        }
-
-        return old_tmp_freq;
-}
-
-
-/**
- * gx_set_cpuspeed:
- * set cpu speed in khz.
- **/
-
-static void gx_set_cpuspeed(unsigned int khz)
-{
-        u8 suscfg, pmer1;
-        unsigned int new_khz;
-        unsigned long flags;
-        struct cpufreq_freqs freqs;
-
-        freqs.cpu = 0;
-        freqs.old = gx_get_cpuspeed(0);
-
-        new_khz = gx_validate_speed(khz, &gx_params->on_duration,
-                        &gx_params->off_duration);
-
-        freqs.new = new_khz;
-
-        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-        local_irq_save(flags);
-
-
-
-        if (new_khz != stock_freq) {
-                /* if new khz == 100% of CPU speed, it is special case */
-                switch (gx_params->cs55x0->device) {
-                case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
-                        pmer1 = gx_params->pci_pmer1 | IRQ_SPDUP | VID_SPDUP;
-                        /* FIXME: need to test other values -- Zwane,Miura */
-                        /* typical 2 to 4ms */
-                        gx_write_byte(PCI_IRQTC, 4);
-                        /* typical 50 to 100ms */
-                        gx_write_byte(PCI_VIDTC, 100);
-                        gx_write_byte(PCI_PMER1, pmer1);
-
-                        if (gx_params->cs55x0->revision < 0x10) {
-                                /* CS5530(rev 1.2, 1.3) */
-                                suscfg = gx_params->pci_suscfg|SUSMOD;
-                        } else {
-                                /* CS5530A,B.. */
-                                suscfg = gx_params->pci_suscfg|SUSMOD|PWRSVE;
-                        }
-                        break;
-                case PCI_DEVICE_ID_CYRIX_5520:
-                case PCI_DEVICE_ID_CYRIX_5510:
-                        suscfg = gx_params->pci_suscfg | SUSMOD;
-                        break;
-                default:
-                        local_irq_restore(flags);
-                        dprintk("fatal: try to set unknown chipset.\n");
-                        return;
-                }
-        } else {
-                suscfg = gx_params->pci_suscfg & ~(SUSMOD);
-                gx_params->off_duration = 0;
-                gx_params->on_duration = 0;
-                dprintk("suspend modulation disabled: cpu runs 100%% speed.\n");
-        }
-
-        gx_write_byte(PCI_MODOFF, gx_params->off_duration);
-        gx_write_byte(PCI_MODON, gx_params->on_duration);
-
-        gx_write_byte(PCI_SUSCFG, suscfg);
-        pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &suscfg);
-
-        local_irq_restore(flags);
-
-        gx_params->pci_suscfg = suscfg;
-
-        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-
-        dprintk("suspend modulation w/ duration of ON:%d us, OFF:%d us\n",
-                gx_params->on_duration * 32, gx_params->off_duration * 32);
-        dprintk("suspend modulation w/ clock speed: %d kHz.\n", freqs.new);
-}
-
-/****************************************************************
- *             High level functions                             *
- ****************************************************************/
-
-/*
- *      cpufreq_gx_verify: test if frequency range is valid
- *
- *      This function checks if a given frequency range in kHz is valid
- *      for the hardware supported by the driver.
- */
-
-static int cpufreq_gx_verify(struct cpufreq_policy *policy)
-{
-        unsigned int tmp_freq = 0;
-        u8 tmp1, tmp2;
-
-        if (!stock_freq || !policy)
-                return -EINVAL;
-
-        policy->cpu = 0;
-        cpufreq_verify_within_limits(policy, (stock_freq / max_duration),
-                        stock_freq);
-
-        /* it needs to be assured that at least one supported frequency is
-         * within policy->min and policy->max. If it is not, policy->max
-         * needs to be increased until one freuqency is supported.
-         * policy->min may not be decreased, though. This way we guarantee a
-         * specific processing capacity.
-         */
-        tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2);
-        if (tmp_freq < policy->min)
-                tmp_freq += stock_freq / max_duration;
-        policy->min = tmp_freq;
-        if (policy->min > policy->max)
-                policy->max = tmp_freq;
-        tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2);
-        if (tmp_freq > policy->max)
-                tmp_freq -= stock_freq / max_duration;
-        policy->max = tmp_freq;
-        if (policy->max < policy->min)
-                policy->max = policy->min;
-        cpufreq_verify_within_limits(policy, (stock_freq / max_duration),
-                        stock_freq);
-
-        return 0;
-}
-
-/*
- *      cpufreq_gx_target:
- *
- */
-static int cpufreq_gx_target(struct cpufreq_policy *policy,
-                             unsigned int target_freq,
-                             unsigned int relation)
-{
-        u8 tmp1, tmp2;
-        unsigned int tmp_freq;
-
-        if (!stock_freq || !policy)
-                return -EINVAL;
-
-        policy->cpu = 0;
-
-        tmp_freq = gx_validate_speed(target_freq, &tmp1, &tmp2);
-        while (tmp_freq < policy->min) {
-                tmp_freq += stock_freq / max_duration;
-                tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2);
-        }
-        while (tmp_freq > policy->max) {
-                tmp_freq -= stock_freq / max_duration;
-                tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2);
-        }
-
-        gx_set_cpuspeed(tmp_freq);
-
-        return 0;
-}
-
-static int cpufreq_gx_cpu_init(struct cpufreq_policy *policy)
-{
-        unsigned int maxfreq, curfreq;
-
-        if (!policy || policy->cpu != 0)
-                return -ENODEV;
-
-        /* determine maximum frequency */
-        if (pci_busclk)
-                maxfreq = pci_busclk * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
-        else if (cpu_khz)
-                maxfreq = cpu_khz;
-        else
-                maxfreq = 30000 * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
-
-        stock_freq = maxfreq;
-        curfreq = gx_get_cpuspeed(0);
-
-        dprintk("cpu max frequency is %d.\n", maxfreq);
-        dprintk("cpu current frequency is %dkHz.\n", curfreq);
-
-        /* setup basic struct for cpufreq API */
-        policy->cpu = 0;
-
-        if (max_duration < POLICY_MIN_DIV)
-                policy->min = maxfreq / max_duration;
-        else
-                policy->min = maxfreq / POLICY_MIN_DIV;
-        policy->max = maxfreq;
-        policy->cur = curfreq;
-        policy->cpuinfo.min_freq = maxfreq / max_duration;
-        policy->cpuinfo.max_freq = maxfreq;
-        policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
-
-        return 0;
-}
-
-/*
- * cpufreq_gx_init:
- *   MediaGX/Geode GX initialize cpufreq driver
- */
-static struct cpufreq_driver gx_suspmod_driver = {
-        .get            = gx_get_cpuspeed,
-        .verify         = cpufreq_gx_verify,
-        .target         = cpufreq_gx_target,
-        .init           = cpufreq_gx_cpu_init,
-        .name           = "gx-suspmod",
-        .owner          = THIS_MODULE,
-};
-
-static int __init cpufreq_gx_init(void)
-{
-        int ret;
-        struct gxfreq_params *params;
-        struct pci_dev *gx_pci;
-
-        /* Test if we have the right hardware */
-        gx_pci = gx_detect_chipset();
-        if (gx_pci == NULL)
-                return -ENODEV;
-
-        /* check whether module parameters are sane */
-        if (max_duration > 0xff)
-                max_duration = 0xff;
-
-        dprintk("geode suspend modulation available.\n");
-
-        params = kzalloc(sizeof(struct gxfreq_params), GFP_KERNEL);
-        if (params == NULL)
-                return -ENOMEM;
-
-        params->cs55x0 = gx_pci;
-        gx_params = params;
-
-        /* keep cs55x0 configurations */
-        pci_read_config_byte(params->cs55x0, PCI_SUSCFG, &(params->pci_suscfg));
-        pci_read_config_byte(params->cs55x0, PCI_PMER1, &(params->pci_pmer1));
-        pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2));
-        pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration));
-        pci_read_config_byte(params->cs55x0, PCI_MODOFF,
-                        &(params->off_duration));
-
-        ret = cpufreq_register_driver(&gx_suspmod_driver);
-        if (ret) {
-                kfree(params);
-                return ret;                   /* register error! */
-        }
-
-        return 0;
-}
-
-static void __exit cpufreq_gx_exit(void)
-{
-        cpufreq_unregister_driver(&gx_suspmod_driver);
-        pci_dev_put(gx_params->cs55x0);
-        kfree(gx_params);
-}
-
-MODULE_AUTHOR("Hiroshi Miura <miura@da-cha.org>");
-MODULE_DESCRIPTION("Cpufreq driver for Cyrix MediaGX and NatSemi Geode");
-MODULE_LICENSE("GPL");
-
-module_init(cpufreq_gx_init);
-module_exit(cpufreq_gx_exit);
-
diff --git a/arch/x86/kernel/cpu/cpufreq/longhaul.c b/arch/x86/kernel/cpu/cpufreq/longhaul.c
deleted file mode 100644
index cf48cdd6907d..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/longhaul.c
+++ /dev/null
@@ -1,1029 +0,0 @@
-/*
- *  (C) 2001-2004  Dave Jones. <davej@redhat.com>
- *  (C) 2002  Padraig Brady. <padraig@antefacto.com>
- *
- *  Licensed under the terms of the GNU GPL License version 2.
- *  Based upon datasheets & sample CPUs kindly provided by VIA.
- *
- *  VIA have currently 3 different versions of Longhaul.
- *  Version 1 (Longhaul) uses the BCR2 MSR at 0x1147.
- *   It is present only in Samuel 1 (C5A), Samuel 2 (C5B) stepping 0.
- *  Version 2 of longhaul is backward compatible with v1, but adds
- *   LONGHAUL MSR for purpose of both frequency and voltage scaling.
- *   Present in Samuel 2 (steppings 1-7 only) (C5B), and Ezra (C5C).
- *  Version 3 of longhaul got renamed to Powersaver and redesigned
- *   to use only the POWERSAVER MSR at 0x110a.
- *   It is present in Ezra-T (C5M), Nehemiah (C5X) and above.
- *   It's pretty much the same feature wise to longhaul v2, though
- *   there is provision for scaling FSB too, but this doesn't work
- *   too well in practice so we don't even try to use this.
- *
- *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/init.h>
-#include <linux/cpufreq.h>
-#include <linux/pci.h>
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <linux/delay.h>
-#include <linux/timex.h>
-#include <linux/io.h>
-#include <linux/acpi.h>
-
-#include <asm/msr.h>
-#include <acpi/processor.h>
-
-#include "longhaul.h"
-
-#define PFX "longhaul: "
-
-#define TYPE_LONGHAUL_V1        1
-#define TYPE_LONGHAUL_V2        2
-#define TYPE_POWERSAVER         3
-
-#define CPU_SAMUEL      1
-#define CPU_SAMUEL2     2
-#define CPU_EZRA        3
-#define CPU_EZRA_T      4
-#define CPU_NEHEMIAH    5
-#define CPU_NEHEMIAH_C  6
-
-/* Flags */
-#define USE_ACPI_C3             (1 << 1)
-#define USE_NORTHBRIDGE         (1 << 2)
-
-static int cpu_model;
-static unsigned int numscales = 16;
-static unsigned int fsb;
-
-static const struct mV_pos *vrm_mV_table;
-static const unsigned char *mV_vrm_table;
-
-static unsigned int highest_speed, lowest_speed; /* kHz */
-static unsigned int minmult, maxmult;
-static int can_scale_voltage;
-static struct acpi_processor *pr;
-static struct acpi_processor_cx *cx;
-static u32 acpi_regs_addr;
-static u8 longhaul_flags;
-static unsigned int longhaul_index;
-
-/* Module parameters */
-static int scale_voltage;
-static int disable_acpi_c3;
-static int revid_errata;
-
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
-                "longhaul", msg)
-
-
-/* Clock ratios multiplied by 10 */
-static int mults[32];
-static int eblcr[32];
-static int longhaul_version;
-static struct cpufreq_frequency_table *longhaul_table;
-
-#ifdef CONFIG_CPU_FREQ_DEBUG
-static char speedbuffer[8];
-
-static char *print_speed(int speed)
-{
-        if (speed < 1000) {
-                snprintf(speedbuffer, sizeof(speedbuffer), "%dMHz", speed);
-                return speedbuffer;
-        }
-
-        if (speed%1000 == 0)
-                snprintf(speedbuffer, sizeof(speedbuffer),
-                        "%dGHz", speed/1000);
-        else
-                snprintf(speedbuffer, sizeof(speedbuffer),
-                        "%d.%dGHz", speed/1000, (speed%1000)/100);
-
-        return speedbuffer;
-}
-#endif
-
-
-static unsigned int calc_speed(int mult)
-{
-        int khz;
-        khz = (mult/10)*fsb;
-        if (mult%10)
-                khz += fsb/2;
-        khz *= 1000;
-        return khz;
-}
-
-
-static int longhaul_get_cpu_mult(void)
-{
-        unsigned long invalue = 0, lo, hi;
-
-        rdmsr(MSR_IA32_EBL_CR_POWERON, lo, hi);
-        invalue = (lo & (1<<22|1<<23|1<<24|1<<25))>>22;
-        if (longhaul_version == TYPE_LONGHAUL_V2 ||
-            longhaul_version == TYPE_POWERSAVER) {
-                if (lo & (1<<27))
-                        invalue += 16;
-        }
-        return eblcr[invalue];
-}
-
-/* For processor with BCR2 MSR */
-
-static void do_longhaul1(unsigned int mults_index)
-{
-        union msr_bcr2 bcr2;
-
-        rdmsrl(MSR_VIA_BCR2, bcr2.val);
-        /* Enable software clock multiplier */
-        bcr2.bits.ESOFTBF = 1;
-        bcr2.bits.CLOCKMUL = mults_index & 0xff;
-
-        /* Sync to timer tick */
-        safe_halt();
-        /* Change frequency on next halt or sleep */
-        wrmsrl(MSR_VIA_BCR2, bcr2.val);
-        /* Invoke transition */
-        ACPI_FLUSH_CPU_CACHE();
-        halt();
-
-        /* Disable software clock multiplier */
-        local_irq_disable();
-        rdmsrl(MSR_VIA_BCR2, bcr2.val);
-        bcr2.bits.ESOFTBF = 0;
-        wrmsrl(MSR_VIA_BCR2, bcr2.val);
-}
-
-/* For processor with Longhaul MSR */
-
-static void do_powersaver(int cx_address, unsigned int mults_index,
-                          unsigned int dir)
-{
-        union msr_longhaul longhaul;
-        u32 t;
-
-        rdmsrl(MSR_VIA_LONGHAUL, longhaul.val);
-        /* Setup new frequency */
-        if (!revid_errata)
-                longhaul.bits.RevisionKey = longhaul.bits.RevisionID;
-        else
-                longhaul.bits.RevisionKey = 0;
-        longhaul.bits.SoftBusRatio = mults_index & 0xf;
-        longhaul.bits.SoftBusRatio4 = (mults_index & 0x10) >> 4;
-        /* Setup new voltage */
-        if (can_scale_voltage)
-                longhaul.bits.SoftVID = (mults_index >> 8) & 0x1f;
-        /* Sync to timer tick */
-        safe_halt();
-        /* Raise voltage if necessary */
-        if (can_scale_voltage && dir) {
-                longhaul.bits.EnableSoftVID = 1;
-                wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
-                /* Change voltage */
-                if (!cx_address) {
-                        ACPI_FLUSH_CPU_CACHE();
-                        halt();
-                } else {
-                        ACPI_FLUSH_CPU_CACHE();
-                        /* Invoke C3 */
-                        inb(cx_address);
-                        /* Dummy op - must do something useless after P_LVL3
-                         * read */
-                        t = inl(acpi_gbl_FADT.xpm_timer_block.address);
-                }
-                longhaul.bits.EnableSoftVID = 0;
-                wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
-        }
-
-        /* Change frequency on next halt or sleep */
-        longhaul.bits.EnableSoftBusRatio = 1;
-        wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
-        if (!cx_address) {
-                ACPI_FLUSH_CPU_CACHE();
-                halt();
-        } else {
-                ACPI_FLUSH_CPU_CACHE();
-                /* Invoke C3 */
-                inb(cx_address);
-                /* Dummy op - must do something useless after P_LVL3 read */
-                t = inl(acpi_gbl_FADT.xpm_timer_block.address);
-        }
-        /* Disable bus ratio bit */
-        longhaul.bits.EnableSoftBusRatio = 0;
-        wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
-
-        /* Reduce voltage if necessary */
-        if (can_scale_voltage && !dir) {
-                longhaul.bits.EnableSoftVID = 1;
-                wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
-                /* Change voltage */
-                if (!cx_address) {
-                        ACPI_FLUSH_CPU_CACHE();
-                        halt();
-                } else {
-                        ACPI_FLUSH_CPU_CACHE();
-                        /* Invoke C3 */
-                        inb(cx_address);
-                        /* Dummy op - must do something useless after P_LVL3
-                         * read */
-                        t = inl(acpi_gbl_FADT.xpm_timer_block.address);
-                }
-                longhaul.bits.EnableSoftVID = 0;
-                wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
-        }
-}
-
-/**
- * longhaul_set_cpu_frequency()
- * @mults_index : bitpattern of the new multiplier.
- *
- * Sets a new clock ratio.
- */
-
-static void longhaul_setstate(unsigned int table_index)
-{
-        unsigned int mults_index;
-        int speed, mult;
-        struct cpufreq_freqs freqs;
-        unsigned long flags;
-        unsigned int pic1_mask, pic2_mask;
-        u16 bm_status = 0;
-        u32 bm_timeout = 1000;
-        unsigned int dir = 0;
-
-        mults_index = longhaul_table[table_index].index;
-        /* Safety precautions */
-        mult = mults[mults_index & 0x1f];
-        if (mult == -1)
-                return;
-        speed = calc_speed(mult);
-        if ((speed > highest_speed) || (speed < lowest_speed))
-                return;
-        /* Voltage transition before frequency transition? */
-        if (can_scale_voltage && longhaul_index < table_index)
-                dir = 1;
-
-        freqs.old = calc_speed(longhaul_get_cpu_mult());
-        freqs.new = speed;
-        freqs.cpu = 0; /* longhaul.c is UP only driver */
-
-        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-
-        dprintk("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n",
-                        fsb, mult/10, mult%10, print_speed(speed/1000));
-retry_loop:
-        preempt_disable();
-        local_irq_save(flags);
-
-        pic2_mask = inb(0xA1);
-        pic1_mask = inb(0x21);  /* works on C3. save mask. */
-        outb(0xFF, 0xA1);       /* Overkill */
-        outb(0xFE, 0x21);       /* TMR0 only */
-
-        /* Wait while PCI bus is busy. */
-        if (acpi_regs_addr && (longhaul_flags & USE_NORTHBRIDGE
-            || ((pr != NULL) && pr->flags.bm_control))) {
-                bm_status = inw(acpi_regs_addr);
-                bm_status &= 1 << 4;
-                while (bm_status && bm_timeout) {
-                        outw(1 << 4, acpi_regs_addr);
-                        bm_timeout--;
-                        bm_status = inw(acpi_regs_addr);
-                        bm_status &= 1 << 4;
-                }
-        }
-
-        if (longhaul_flags & USE_NORTHBRIDGE) {
-                /* Disable AGP and PCI arbiters */
-                outb(3, 0x22);
-        } else if ((pr != NULL) && pr->flags.bm_control) {
-                /* Disable bus master arbitration */
-                acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
-        }
-        switch (longhaul_version) {
-
-        /*
-         * Longhaul v1. (Samuel[C5A] and Samuel2 stepping 0[C5B])
-         * Software controlled multipliers only.
-         */
-        case TYPE_LONGHAUL_V1:
-                do_longhaul1(mults_index);
-                break;
-
-        /*
-         * Longhaul v2 appears in Samuel2 Steppings 1->7 [C5B] and Ezra [C5C]
-         *
-         * Longhaul v3 (aka Powersaver). (Ezra-T [C5M] & Nehemiah [C5N])
-         * Nehemiah can do FSB scaling too, but this has never been proven
-         * to work in practice.
-         */
-        case TYPE_LONGHAUL_V2:
-        case TYPE_POWERSAVER:
-                if (longhaul_flags & USE_ACPI_C3) {
-                        /* Don't allow wakeup */
-                        acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
-                        do_powersaver(cx->address, mults_index, dir);
-                } else {
-                        do_powersaver(0, mults_index, dir);
-                }
-                break;
-        }
-
-        if (longhaul_flags & USE_NORTHBRIDGE) {
-                /* Enable arbiters */
-                outb(0, 0x22);
-        } else if ((pr != NULL) && pr->flags.bm_control) {
-                /* Enable bus master arbitration */
-                acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
-        }
-        outb(pic2_mask, 0xA1);  /* restore mask */
-        outb(pic1_mask, 0x21);
-
-        local_irq_restore(flags);
-        preempt_enable();
-
-        freqs.new = calc_speed(longhaul_get_cpu_mult());
-        /* Check if requested frequency is set. */
-        if (unlikely(freqs.new != speed)) {
-                printk(KERN_INFO PFX "Failed to set requested frequency!\n");
-                /* Revision ID = 1 but processor is expecting revision key
-                 * equal to 0. Jumpers at the bottom of processor will change
-                 * multiplier and FSB, but will not change bits in Longhaul
-                 * MSR nor enable voltage scaling. */
-                if (!revid_errata) {
-                        printk(KERN_INFO PFX "Enabling \"Ignore Revision ID\" "
-                                                "option.\n");
-                        revid_errata = 1;
-                        msleep(200);
-                        goto retry_loop;
-                }
-                /* Why ACPI C3 sometimes doesn't work is a mystery for me.
-                 * But it does happen. Processor is entering ACPI C3 state,
-                 * but it doesn't change frequency. I tried poking various
-                 * bits in northbridge registers, but without success. */
-                if (longhaul_flags & USE_ACPI_C3) {
-                        printk(KERN_INFO PFX "Disabling ACPI C3 support.\n");
-                        longhaul_flags &= ~USE_ACPI_C3;
-                        if (revid_errata) {
-                                printk(KERN_INFO PFX "Disabling \"Ignore "
-                                                "Revision ID\" option.\n");
-                                revid_errata = 0;
-                        }
-                        msleep(200);
-                        goto retry_loop;
-                }
-                /* This shouldn't happen. Longhaul ver. 2 was reported not
-                 * working on processors without voltage scaling, but with
-                 * RevID = 1. RevID errata will make things right. Just
-                 * to be 100% sure. */
-                if (longhaul_version == TYPE_LONGHAUL_V2) {
-                        printk(KERN_INFO PFX "Switching to Longhaul ver. 1\n");
-                        longhaul_version = TYPE_LONGHAUL_V1;
-                        msleep(200);
-                        goto retry_loop;
-                }
-        }
-        /* Report true CPU frequency */
-        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-
-        if (!bm_timeout)
-                printk(KERN_INFO PFX "Warning: Timeout while waiting for "
-                                "idle PCI bus.\n");
-}
-
-/*
- * Centaur decided to make life a little more tricky.
- * Only longhaul v1 is allowed to read EBLCR BSEL[0:1].
- * Samuel2 and above have to try and guess what the FSB is.
- * We do this by assuming we booted at maximum multiplier, and interpolate
- * between that value multiplied by possible FSBs and cpu_mhz which
- * was calculated at boot time. Really ugly, but no other way to do this.
- */
-
-#define ROUNDING        0xf
-
-static int guess_fsb(int mult)
-{
-        int speed = cpu_khz / 1000;
-        int i;
-        int speeds[] = { 666, 1000, 1333, 2000 };
-        int f_max, f_min;
-
-        for (i = 0; i < 4; i++) {
-                f_max = ((speeds[i] * mult) + 50) / 100;
-                f_max += (ROUNDING / 2);
-                f_min = f_max - ROUNDING;
-                if ((speed <= f_max) && (speed >= f_min))
-                        return speeds[i] / 10;
-        }
-        return 0;
-}
-
-
-static int __cpuinit longhaul_get_ranges(void)
-{
-        unsigned int i, j, k = 0;
-        unsigned int ratio;
-        int mult;
-
-        /* Get current frequency */
-        mult = longhaul_get_cpu_mult();
-        if (mult == -1) {
-                printk(KERN_INFO PFX "Invalid (reserved) multiplier!\n");
-                return -EINVAL;
-        }
-        fsb = guess_fsb(mult);
-        if (fsb == 0) {
-                printk(KERN_INFO PFX "Invalid (reserved) FSB!\n");
-                return -EINVAL;
-        }
-        /* Get max multiplier - as we always did.
-         * Longhaul MSR is useful only when voltage scaling is enabled.
-         * C3 is booting at max anyway. */
-        maxmult = mult;
-        /* Get min multiplier */
-        switch (cpu_model) {
-        case CPU_NEHEMIAH:
-                minmult = 50;
-                break;
-        case CPU_NEHEMIAH_C:
-                minmult = 40;
-                break;
-        default:
-                minmult = 30;
-                break;
-        }
-
-        dprintk("MinMult:%d.%dx MaxMult:%d.%dx\n",
-                 minmult/10, minmult%10, maxmult/10, maxmult%10);
-
-        highest_speed = calc_speed(maxmult);
-        lowest_speed = calc_speed(minmult);
-        dprintk("FSB:%dMHz  Lowest speed: %s   Highest speed:%s\n", fsb,
-                 print_speed(lowest_speed/1000),
-                 print_speed(highest_speed/1000));
-
-        if (lowest_speed == highest_speed) {
-                printk(KERN_INFO PFX "highestspeed == lowest, aborting.\n");
-                return -EINVAL;
-        }
-        if (lowest_speed > highest_speed) {
-                printk(KERN_INFO PFX "nonsense! lowest (%d > %d) !\n",
-                        lowest_speed, highest_speed);
-                return -EINVAL;
-        }
-
-        longhaul_table = kmalloc((numscales + 1) * sizeof(*longhaul_table),
-                        GFP_KERNEL);
-        if (!longhaul_table)
-                return -ENOMEM;
-
-        for (j = 0; j < numscales; j++) {
-                ratio = mults[j];
-                if (ratio == -1)
-                        continue;
-                if (ratio > maxmult || ratio < minmult)
-                        continue;
-                longhaul_table[k].frequency = calc_speed(ratio);
-                longhaul_table[k].index = j;
-                k++;
-        }
-        if (k <= 1) {
-                kfree(longhaul_table);
-                return -ENODEV;
-        }
-        /* Sort */
-        for (j = 0; j < k - 1; j++) {
-                unsigned int min_f, min_i;
-                min_f = longhaul_table[j].frequency;
-                min_i = j;
-                for (i = j + 1; i < k; i++) {
-                        if (longhaul_table[i].frequency < min_f) {
-                                min_f = longhaul_table[i].frequency;
-                                min_i = i;
-                        }
-                }
-                if (min_i != j) {
-                        swap(longhaul_table[j].frequency,
-                             longhaul_table[min_i].frequency);
-                        swap(longhaul_table[j].index,
-                             longhaul_table[min_i].index);
-                }
-        }
-
-        longhaul_table[k].frequency = CPUFREQ_TABLE_END;
-
-        /* Find index we are running on */
-        for (j = 0; j < k; j++) {
-                if (mults[longhaul_table[j].index & 0x1f] == mult) {
-                        longhaul_index = j;
-                        break;
-                }
-        }
-        return 0;
-}
-
-
-static void __cpuinit longhaul_setup_voltagescaling(void)
-{
-        union msr_longhaul longhaul;
-        struct mV_pos minvid, maxvid, vid;
-        unsigned int j, speed, pos, kHz_step, numvscales;
-        int min_vid_speed;
-
-        rdmsrl(MSR_VIA_LONGHAUL, longhaul.val);
-        if (!(longhaul.bits.RevisionID & 1)) {
-                printk(KERN_INFO PFX "Voltage scaling not supported by CPU.\n");
-                return;
-        }
-
-        if (!longhaul.bits.VRMRev) {
-                printk(KERN_INFO PFX "VRM 8.5\n");
-                vrm_mV_table = &vrm85_mV[0];
-                mV_vrm_table = &mV_vrm85[0];
-        } else {
-                printk(KERN_INFO PFX "Mobile VRM\n");
-                if (cpu_model < CPU_NEHEMIAH)
-                        return;
-                vrm_mV_table = &mobilevrm_mV[0];
-                mV_vrm_table = &mV_mobilevrm[0];
-        }
-
-        minvid = vrm_mV_table[longhaul.bits.MinimumVID];
-        maxvid = vrm_mV_table[longhaul.bits.MaximumVID];
-
-        if (minvid.mV == 0 || maxvid.mV == 0 || minvid.mV > maxvid.mV) {
-                printk(KERN_INFO PFX "Bogus values Min:%d.%03d Max:%d.%03d. "
-                                        "Voltage scaling disabled.\n",
-                                        minvid.mV/1000, minvid.mV%1000,
-                                        maxvid.mV/1000, maxvid.mV%1000);
-                return;
-        }
-
-        if (minvid.mV == maxvid.mV) {
-                printk(KERN_INFO PFX "Claims to support voltage scaling but "
-                                "min & max are both %d.%03d. "
-                                "Voltage scaling disabled\n",
-                                maxvid.mV/1000, maxvid.mV%1000);
-                return;
-        }
-
-        /* How many voltage steps*/
-        numvscales = maxvid.pos - minvid.pos + 1;
-        printk(KERN_INFO PFX
-                "Max VID=%d.%03d  "
-                "Min VID=%d.%03d, "
-                "%d possible voltage scales\n",
-                maxvid.mV/1000, maxvid.mV%1000,
-                minvid.mV/1000, minvid.mV%1000,
-                numvscales);
-
-        /* Calculate max frequency at min voltage */
-        j = longhaul.bits.MinMHzBR;
-        if (longhaul.bits.MinMHzBR4)
-                j += 16;
-        min_vid_speed = eblcr[j];
-        if (min_vid_speed == -1)
-                return;
-        switch (longhaul.bits.MinMHzFSB) {
-        case 0:
-                min_vid_speed *= 13333;
-                break;
-        case 1:
-                min_vid_speed *= 10000;
-                break;
-        case 3:
-                min_vid_speed *= 6666;
-                break;
-        default:
-                return;
-                break;
-        }
-        if (min_vid_speed >= highest_speed)
-                return;
-        /* Calculate kHz for one voltage step */
-        kHz_step = (highest_speed - min_vid_speed) / numvscales;
-
-        j = 0;
-        while (longhaul_table[j].frequency != CPUFREQ_TABLE_END) {
-                speed = longhaul_table[j].frequency;
-                if (speed > min_vid_speed)
-                        pos = (speed - min_vid_speed) / kHz_step + minvid.pos;
-                else
-                        pos = minvid.pos;
-                longhaul_table[j].index |= mV_vrm_table[pos] << 8;
-                vid = vrm_mV_table[mV_vrm_table[pos]];
-                printk(KERN_INFO PFX "f: %d kHz, index: %d, vid: %d mV\n",
-                                speed, j, vid.mV);
-                j++;
-        }
-
-        can_scale_voltage = 1;
-        printk(KERN_INFO PFX "Voltage scaling enabled.\n");
-}
-
-
-static int longhaul_verify(struct cpufreq_policy *policy)
-{
-        return cpufreq_frequency_table_verify(policy, longhaul_table);
-}
-
-
-static int longhaul_target(struct cpufreq_policy *policy,
-                            unsigned int target_freq, unsigned int relation)
-{
-        unsigned int table_index = 0;
-        unsigned int i;
-        unsigned int dir = 0;
-        u8 vid, current_vid;
-
-        if (cpufreq_frequency_table_target(policy, longhaul_table, target_freq,
-                                relation, &table_index))
-                return -EINVAL;
-
-        /* Don't set same frequency again */
-        if (longhaul_index == table_index)
-                return 0;
-
-        if (!can_scale_voltage)
-                longhaul_setstate(table_index);
-        else {
-                /* On test system voltage transitions exceeding single
-                 * step up or down were turning motherboard off. Both
-                 * "ondemand" and "userspace" are unsafe. C7 is doing
-                 * this in hardware, C3 is old and we need to do this
-                 * in software. */
-                i = longhaul_index;
-                current_vid = (longhaul_table[longhaul_index].index >> 8);
-                current_vid &= 0x1f;
-                if (table_index > longhaul_index)
-                        dir = 1;
-                while (i != table_index) {
-                        vid = (longhaul_table[i].index >> 8) & 0x1f;
-                        if (vid != current_vid) {
-                                longhaul_setstate(i);
-                                current_vid = vid;
-                                msleep(200);
-                        }
-                        if (dir)
-                                i++;
-                        else
-                                i--;
-                }
-                longhaul_setstate(table_index);
-        }
-        longhaul_index = table_index;
-        return 0;
-}
-
-
-static unsigned int longhaul_get(unsigned int cpu)
-{
-        if (cpu)
-                return 0;
-        return calc_speed(longhaul_get_cpu_mult());
-}
-
-static acpi_status longhaul_walk_callback(acpi_handle obj_handle,
-                                          u32 nesting_level,
-                                          void *context, void **return_value)
-{
-        struct acpi_device *d;
-
-        if (acpi_bus_get_device(obj_handle, &d))
-                return 0;
-
-        *return_value = acpi_driver_data(d);
-        return 1;
-}
-
-/* VIA don't support PM2 reg, but have something similar */
-static int enable_arbiter_disable(void)
-{
-        struct pci_dev *dev;
-        int status = 1;
-        int reg;
-        u8 pci_cmd;
-
-        /* Find PLE133 host bridge */
-        reg = 0x78;
-        dev = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8601_0,
-                             NULL);
-        /* Find PM133/VT8605 host bridge */
-        if (dev == NULL)
-                dev = pci_get_device(PCI_VENDOR_ID_VIA,
-                                     PCI_DEVICE_ID_VIA_8605_0, NULL);
-        /* Find CLE266 host bridge */
-        if (dev == NULL) {
-                reg = 0x76;
-                dev = pci_get_device(PCI_VENDOR_ID_VIA,
-                                     PCI_DEVICE_ID_VIA_862X_0, NULL);
-                /* Find CN400 V-Link host bridge */
-                if (dev == NULL)
-                        dev = pci_get_device(PCI_VENDOR_ID_VIA, 0x7259, NULL);
-        }
-        if (dev != NULL) {
-                /* Enable access to port 0x22 */
-                pci_read_config_byte(dev, reg, &pci_cmd);
-                if (!(pci_cmd & 1<<7)) {
-                        pci_cmd |= 1<<7;
-                        pci_write_config_byte(dev, reg, pci_cmd);
-                        pci_read_config_byte(dev, reg, &pci_cmd);
-                        if (!(pci_cmd & 1<<7)) {
-                                printk(KERN_ERR PFX
-                                        "Can't enable access to port 0x22.\n");
-                                status = 0;
-                        }
-                }
-                pci_dev_put(dev);
-                return status;
-        }
-        return 0;
-}
-
-static int longhaul_setup_southbridge(void)
-{
-        struct pci_dev *dev;
-        u8 pci_cmd;
-
-        /* Find VT8235 southbridge */
-        dev = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, NULL);
-        if (dev == NULL)
-                /* Find VT8237 southbridge */
-                dev = pci_get_device(PCI_VENDOR_ID_VIA,
-                                     PCI_DEVICE_ID_VIA_8237, NULL);
-        if (dev != NULL) {
-                /* Set transition time to max */
-                pci_read_config_byte(dev, 0xec, &pci_cmd);
-                pci_cmd &= ~(1 << 2);
-                pci_write_config_byte(dev, 0xec, pci_cmd);
-                pci_read_config_byte(dev, 0xe4, &pci_cmd);
-                pci_cmd &= ~(1 << 7);
-                pci_write_config_byte(dev, 0xe4, pci_cmd);
-                pci_read_config_byte(dev, 0xe5, &pci_cmd);
-                pci_cmd |= 1 << 7;
-                pci_write_config_byte(dev, 0xe5, pci_cmd);
-                /* Get address of ACPI registers block*/
-                pci_read_config_byte(dev, 0x81, &pci_cmd);
-                if (pci_cmd & 1 << 7) {
-                        pci_read_config_dword(dev, 0x88, &acpi_regs_addr);
-                        acpi_regs_addr &= 0xff00;
-                        printk(KERN_INFO PFX "ACPI I/O at 0x%x\n",
-                                        acpi_regs_addr);
-                }
-
-                pci_dev_put(dev);
-                return 1;
-        }
-        return 0;
-}
-
-static int __cpuinit longhaul_cpu_init(struct cpufreq_policy *policy)
-{
-        struct cpuinfo_x86 *c = &cpu_data(0);
-        char *cpuname = NULL;
-        int ret;
-        u32 lo, hi;
-
-        /* Check what we have on this motherboard */
-        switch (c->x86_model) {
-        case 6:
-                cpu_model = CPU_SAMUEL;
-                cpuname = "C3 'Samuel' [C5A]";
-                longhaul_version = TYPE_LONGHAUL_V1;
-                memcpy(mults, samuel1_mults, sizeof(samuel1_mults));
-                memcpy(eblcr, samuel1_eblcr, sizeof(samuel1_eblcr));
-                break;
-
-        case 7:
-                switch (c->x86_mask) {
-                case 0:
-                        longhaul_version = TYPE_LONGHAUL_V1;
-                        cpu_model = CPU_SAMUEL2;
-                        cpuname = "C3 'Samuel 2' [C5B]";
-                        /* Note, this is not a typo, early Samuel2's had
-                         * Samuel1 ratios. */
-                        memcpy(mults, samuel1_mults, sizeof(samuel1_mults));
-                        memcpy(eblcr, samuel2_eblcr, sizeof(samuel2_eblcr));
-                        break;
-                case 1 ... 15:
-                        longhaul_version = TYPE_LONGHAUL_V2;
-                        if (c->x86_mask < 8) {
-                                cpu_model = CPU_SAMUEL2;
-                                cpuname = "C3 'Samuel 2' [C5B]";
-                        } else {
-                                cpu_model = CPU_EZRA;
-                                cpuname = "C3 'Ezra' [C5C]";
-                        }
-                        memcpy(mults, ezra_mults, sizeof(ezra_mults));
-                        memcpy(eblcr, ezra_eblcr, sizeof(ezra_eblcr));
-                        break;
-                }
-                break;
-
-        case 8:
-                cpu_model = CPU_EZRA_T;
-                cpuname = "C3 'Ezra-T' [C5M]";
-                longhaul_version = TYPE_POWERSAVER;
-                numscales = 32;
-                memcpy(mults, ezrat_mults, sizeof(ezrat_mults));
-                memcpy(eblcr, ezrat_eblcr, sizeof(ezrat_eblcr));
-                break;
-
-        case 9:
-                longhaul_version = TYPE_POWERSAVER;
-                numscales = 32;
-                memcpy(mults, nehemiah_mults, sizeof(nehemiah_mults));
-                memcpy(eblcr, nehemiah_eblcr, sizeof(nehemiah_eblcr));
-                switch (c->x86_mask) {
-                case 0 ... 1:
-                        cpu_model = CPU_NEHEMIAH;
-                        cpuname = "C3 'Nehemiah A' [C5XLOE]";
-                        break;
-                case 2 ... 4:
-                        cpu_model = CPU_NEHEMIAH;
-                        cpuname = "C3 'Nehemiah B' [C5XLOH]";
-                        break;
-                case 5 ... 15:
-                        cpu_model = CPU_NEHEMIAH_C;
-                        cpuname = "C3 'Nehemiah C' [C5P]";
-                        break;
-                }
-                break;
-
-        default:
-                cpuname = "Unknown";
-                break;
-        }
-        /* Check Longhaul ver. 2 */
-        if (longhaul_version == TYPE_LONGHAUL_V2) {
-                rdmsr(MSR_VIA_LONGHAUL, lo, hi);
-                if (lo == 0 && hi == 0)
-                        /* Looks like MSR isn't present */
-                        longhaul_version = TYPE_LONGHAUL_V1;
-        }
-
-        printk(KERN_INFO PFX "VIA %s CPU detected.  ", cpuname);
-        switch (longhaul_version) {
-        case TYPE_LONGHAUL_V1:
-        case TYPE_LONGHAUL_V2:
-                printk(KERN_CONT "Longhaul v%d supported.\n", longhaul_version);
-                break;
-        case TYPE_POWERSAVER:
-                printk(KERN_CONT "Powersaver supported.\n");
-                break;
-        };
-
-        /* Doesn't hurt */
-        longhaul_setup_southbridge();
-
-        /* Find ACPI data for processor */
-        acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT,
-                                ACPI_UINT32_MAX, &longhaul_walk_callback, NULL,
-                                NULL, (void *)&pr);
-
-        /* Check ACPI support for C3 state */
-        if (pr != NULL && longhaul_version == TYPE_POWERSAVER) {
-                cx = &pr->power.states[ACPI_STATE_C3];
-                if (cx->address > 0 && cx->latency <= 1000)
-                        longhaul_flags |= USE_ACPI_C3;
-        }
-        /* Disable if it isn't working */
-        if (disable_acpi_c3)
-                longhaul_flags &= ~USE_ACPI_C3;
-        /* Check if northbridge is friendly */
-        if (enable_arbiter_disable())
-                longhaul_flags |= USE_NORTHBRIDGE;
-
-        /* Check ACPI support for bus master arbiter disable */
-        if (!(longhaul_flags & USE_ACPI_C3
-             || longhaul_flags & USE_NORTHBRIDGE)
-            && ((pr == NULL) || !(pr->flags.bm_control))) {
-                printk(KERN_ERR PFX
-                        "No ACPI support. Unsupported northbridge.\n");
-                return -ENODEV;
-        }
-
-        if (longhaul_flags & USE_NORTHBRIDGE)
-                printk(KERN_INFO PFX "Using northbridge support.\n");
-        if (longhaul_flags & USE_ACPI_C3)
-                printk(KERN_INFO PFX "Using ACPI support.\n");
-
-        ret = longhaul_get_ranges();
-        if (ret != 0)
-                return ret;
-
-        if ((longhaul_version != TYPE_LONGHAUL_V1) && (scale_voltage != 0))
-                longhaul_setup_voltagescaling();
-
-        policy->cpuinfo.transition_latency = 200000;    /* nsec */
-        policy->cur = calc_speed(longhaul_get_cpu_mult());
-
-        ret = cpufreq_frequency_table_cpuinfo(policy, longhaul_table);
-        if (ret)
-                return ret;
-
-        cpufreq_frequency_table_get_attr(longhaul_table, policy->cpu);
-
-        return 0;
-}
-
-static int __devexit longhaul_cpu_exit(struct cpufreq_policy *policy)
-{
-        cpufreq_frequency_table_put_attr(policy->cpu);
-        return 0;
-}
-
-static struct freq_attr *longhaul_attr[] = {
-        &cpufreq_freq_attr_scaling_available_freqs,
-        NULL,
-};
-
-static struct cpufreq_driver longhaul_driver = {
-        .verify = longhaul_verify,
-        .target = longhaul_target,
-        .get    = longhaul_get,
-        .init   = longhaul_cpu_init,
-        .exit   = __devexit_p(longhaul_cpu_exit),
-        .name   = "longhaul",
-        .owner  = THIS_MODULE,
-        .attr   = longhaul_attr,
-};
-
-
-static int __init longhaul_init(void)
-{
-        struct cpuinfo_x86 *c = &cpu_data(0);
-
-        if (c->x86_vendor != X86_VENDOR_CENTAUR || c->x86 != 6)
-                return -ENODEV;
-
-#ifdef CONFIG_SMP
-        if (num_online_cpus() > 1) {
-                printk(KERN_ERR PFX "More than 1 CPU detected, "
-                                "longhaul disabled.\n");
-                return -ENODEV;
-        }
-#endif
-#ifdef CONFIG_X86_IO_APIC
-        if (cpu_has_apic) {
-                printk(KERN_ERR PFX "APIC detected. Longhaul is currently "
-                                "broken in this configuration.\n");
-                return -ENODEV;
-        }
-#endif
-        switch (c->x86_model) {
-        case 6 ... 9:
-                return cpufreq_register_driver(&longhaul_driver);
-        case 10:
-                printk(KERN_ERR PFX "Use acpi-cpufreq driver for VIA C7\n");
-        default:
-                ;
-        }
-
-        return -ENODEV;
-}
-
-
-static void __exit longhaul_exit(void)
-{
-        int i;
-
-        for (i = 0; i < numscales; i++) {
-                if (mults[i] == maxmult) {
-                        longhaul_setstate(i);
-                        break;
-                }
-        }
-
-        cpufreq_unregister_driver(&longhaul_driver);
-        kfree(longhaul_table);
-}
-
-/* Even if BIOS is exporting ACPI C3 state, and it is used
- * with success when CPU is idle, this state doesn't
- * trigger frequency transition in some cases. */
-module_param(disable_acpi_c3, int, 0644);
-MODULE_PARM_DESC(disable_acpi_c3, "Don't use ACPI C3 support");
-/* Change CPU voltage with frequency. Very useful to save
- * power, but most VIA C3 processors aren't supporting it. */
-module_param(scale_voltage, int, 0644);
-MODULE_PARM_DESC(scale_voltage, "Scale voltage of processor");
-/* Force revision key to 0 for processors which doesn't
- * support voltage scaling, but are introducing itself as
- * such. */
-module_param(revid_errata, int, 0644);
-MODULE_PARM_DESC(revid_errata, "Ignore CPU Revision ID");
-
-MODULE_AUTHOR("Dave Jones <davej@redhat.com>");
-MODULE_DESCRIPTION("Longhaul driver for VIA Cyrix processors.");
-MODULE_LICENSE("GPL");
-
-late_initcall(longhaul_init);
-module_exit(longhaul_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/longhaul.h b/arch/x86/kernel/cpu/cpufreq/longhaul.h
deleted file mode 100644
index cbf48fbca881..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/longhaul.h
+++ /dev/null
@@ -1,353 +0,0 @@
-/*
- *  longhaul.h
- *  (C) 2003 Dave Jones.
- *
- *  Licensed under the terms of the GNU GPL License version 2.
- *
- *  VIA-specific information
- */
-
-union msr_bcr2 {
-        struct {
-                unsigned Reseved:19,    // 18:0
-                ESOFTBF:1,              // 19
-                Reserved2:3,            // 22:20
-                CLOCKMUL:4,             // 26:23
-                Reserved3:5;            // 31:27
-        } bits;
-        unsigned long val;
-};
-
-union msr_longhaul {
-        struct {
-                unsigned RevisionID:4,  // 3:0
-                RevisionKey:4,          // 7:4
-                EnableSoftBusRatio:1,   // 8
-                EnableSoftVID:1,        // 9
-                EnableSoftBSEL:1,       // 10
-                Reserved:3,             // 11:13
-                SoftBusRatio4:1,        // 14
-                VRMRev:1,               // 15
-                SoftBusRatio:4,         // 19:16
-                SoftVID:5,              // 24:20
-                Reserved2:3,            // 27:25
-                SoftBSEL:2,             // 29:28
-                Reserved3:2,            // 31:30
-                MaxMHzBR:4,             // 35:32
-                MaximumVID:5,           // 40:36
-                MaxMHzFSB:2,            // 42:41
-                MaxMHzBR4:1,            // 43
-                Reserved4:4,            // 47:44
-                MinMHzBR:4,             // 51:48
-                MinimumVID:5,           // 56:52
-                MinMHzFSB:2,            // 58:57
-                MinMHzBR4:1,            // 59
-                Reserved5:4;            // 63:60
-        } bits;
-        unsigned long long val;
-};
-
-/*
- * Clock ratio tables. Div/Mod by 10 to get ratio.
- * The eblcr values specify the ratio read from the CPU.
- * The mults values specify what to write to the CPU.
- */
-
-/*
- * VIA C3 Samuel 1  & Samuel 2 (stepping 0)
- */
-static const int __cpuinitdata samuel1_mults[16] = {
-        -1, /* 0000 -> RESERVED */
-        30, /* 0001 ->  3.0x */
-        40, /* 0010 ->  4.0x */
-        -1, /* 0011 -> RESERVED */
-        -1, /* 0100 -> RESERVED */
-        35, /* 0101 ->  3.5x */
-        45, /* 0110 ->  4.5x */
-        55, /* 0111 ->  5.5x */
-        60, /* 1000 ->  6.0x */
-        70, /* 1001 ->  7.0x */
-        80, /* 1010 ->  8.0x */
-        50, /* 1011 ->  5.0x */
-        65, /* 1100 ->  6.5x */
-        75, /* 1101 ->  7.5x */
-        -1, /* 1110 -> RESERVED */
-        -1, /* 1111 -> RESERVED */
-};
-
-static const int __cpuinitdata samuel1_eblcr[16] = {
-        50, /* 0000 -> RESERVED */
-        30, /* 0001 ->  3.0x */
-        40, /* 0010 ->  4.0x */
-        -1, /* 0011 -> RESERVED */
-        55, /* 0100 ->  5.5x */
-        35, /* 0101 ->  3.5x */
-        45, /* 0110 ->  4.5x */
-        -1, /* 0111 -> RESERVED */
-        -1, /* 1000 -> RESERVED */
-        70, /* 1001 ->  7.0x */
-        80, /* 1010 ->  8.0x */
-        60, /* 1011 ->  6.0x */
-        -1, /* 1100 -> RESERVED */
-        75, /* 1101 ->  7.5x */
-        -1, /* 1110 -> RESERVED */
-        65, /* 1111 ->  6.5x */
-};
-
-/*
- * VIA C3 Samuel2 Stepping 1->15
- */
-static const int __cpuinitdata samuel2_eblcr[16] = {
-        50,  /* 0000 ->  5.0x */
-        30,  /* 0001 ->  3.0x */
-        40,  /* 0010 ->  4.0x */
-        100, /* 0011 -> 10.0x */
-        55,  /* 0100 ->  5.5x */
-        35,  /* 0101 ->  3.5x */
-        45,  /* 0110 ->  4.5x */
-        110, /* 0111 -> 11.0x */
-        90,  /* 1000 ->  9.0x */
-        70,  /* 1001 ->  7.0x */
-        80,  /* 1010 ->  8.0x */
-        60,  /* 1011 ->  6.0x */
-        120, /* 1100 -> 12.0x */
-        75,  /* 1101 ->  7.5x */
-        130, /* 1110 -> 13.0x */
-        65,  /* 1111 ->  6.5x */
-};
-
-/*
- * VIA C3 Ezra
- */
-static const int __cpuinitdata ezra_mults[16] = {
-        100, /* 0000 -> 10.0x */
-        30,  /* 0001 ->  3.0x */
-        40,  /* 0010 ->  4.0x */
-        90,  /* 0011 ->  9.0x */
-        95,  /* 0100 ->  9.5x */
-        35,  /* 0101 ->  3.5x */
-        45,  /* 0110 ->  4.5x */
-        55,  /* 0111 ->  5.5x */
-        60,  /* 1000 ->  6.0x */
-        70,  /* 1001 ->  7.0x */
-        80,  /* 1010 ->  8.0x */
-        50,  /* 1011 ->  5.0x */
-        65,  /* 1100 ->  6.5x */
-        75,  /* 1101 ->  7.5x */
-        85,  /* 1110 ->  8.5x */
-        120, /* 1111 -> 12.0x */
-};
-
-static const int __cpuinitdata ezra_eblcr[16] = {
-        50,  /* 0000 ->  5.0x */
-        30,  /* 0001 ->  3.0x */
-        40,  /* 0010 ->  4.0x */
-        100, /* 0011 -> 10.0x */
-        55,  /* 0100 ->  5.5x */
-        35,  /* 0101 ->  3.5x */
-        45,  /* 0110 ->  4.5x */
-        95,  /* 0111 ->  9.5x */
-        90,  /* 1000 ->  9.0x */
-        70,  /* 1001 ->  7.0x */
-        80,  /* 1010 ->  8.0x */
-        60,  /* 1011 ->  6.0x */
-        120, /* 1100 -> 12.0x */
-        75,  /* 1101 ->  7.5x */
-        85,  /* 1110 ->  8.5x */
-        65,  /* 1111 ->  6.5x */
-};
-
-/*
- * VIA C3 (Ezra-T) [C5M].
- */
-static const int __cpuinitdata ezrat_mults[32] = {
-        100, /* 0000 -> 10.0x */
-        30,  /* 0001 ->  3.0x */
-        40,  /* 0010 ->  4.0x */
-        90,  /* 0011 ->  9.0x */
-        95,  /* 0100 ->  9.5x */
-        35,  /* 0101 ->  3.5x */
-        45,  /* 0110 ->  4.5x */
-        55,  /* 0111 ->  5.5x */
-        60,  /* 1000 ->  6.0x */
-        70,  /* 1001 ->  7.0x */
-        80,  /* 1010 ->  8.0x */
-        50,  /* 1011 ->  5.0x */
-        65,  /* 1100 ->  6.5x */
-        75,  /* 1101 ->  7.5x */
-        85,  /* 1110 ->  8.5x */
-        120, /* 1111 ->  12.0x */
-
-        -1,  /* 0000 -> RESERVED (10.0x) */
-        110, /* 0001 -> 11.0x */
-        -1, /* 0010 -> 12.0x */
-        -1,  /* 0011 -> RESERVED (9.0x)*/
-        105, /* 0100 -> 10.5x */
-        115, /* 0101 -> 11.5x */
-        125, /* 0110 -> 12.5x */
-        135, /* 0111 -> 13.5x */
-        140, /* 1000 -> 14.0x */
-        150, /* 1001 -> 15.0x */
-        160, /* 1010 -> 16.0x */
-        130, /* 1011 -> 13.0x */
-        145, /* 1100 -> 14.5x */
-        155, /* 1101 -> 15.5x */
-        -1,  /* 1110 -> RESERVED (13.0x) */
-        -1,  /* 1111 -> RESERVED (12.0x) */
-};
-
-static const int __cpuinitdata ezrat_eblcr[32] = {
-        50,  /* 0000 ->  5.0x */
-        30,  /* 0001 ->  3.0x */
-        40,  /* 0010 ->  4.0x */
-        100, /* 0011 -> 10.0x */
-        55,  /* 0100 ->  5.5x */
-        35,  /* 0101 ->  3.5x */
-        45,  /* 0110 ->  4.5x */
-        95,  /* 0111 ->  9.5x */
-        90,  /* 1000 ->  9.0x */
-        70,  /* 1001 ->  7.0x */
-        80,  /* 1010 ->  8.0x */
-        60,  /* 1011 ->  6.0x */
-        120, /* 1100 -> 12.0x */
-        75,  /* 1101 ->  7.5x */
-        85,  /* 1110 ->  8.5x */
-        65,  /* 1111 ->  6.5x */
-
-        -1,  /* 0000 -> RESERVED (9.0x) */
-        110, /* 0001 -> 11.0x */
-        120, /* 0010 -> 12.0x */
-        -1,  /* 0011 -> RESERVED (10.0x)*/
-        135, /* 0100 -> 13.5x */
-        115, /* 0101 -> 11.5x */
-        125, /* 0110 -> 12.5x */
-        105, /* 0111 -> 10.5x */
-        130, /* 1000 -> 13.0x */
-        150, /* 1001 -> 15.0x */
-        160, /* 1010 -> 16.0x */
-        140, /* 1011 -> 14.0x */
-        -1,  /* 1100 -> RESERVED (12.0x) */
-        155, /* 1101 -> 15.5x */
-        -1,  /* 1110 -> RESERVED (13.0x) */
-        145, /* 1111 -> 14.5x */
-};
-
-/*
- * VIA C3 Nehemiah */
-
-static const int __cpuinitdata nehemiah_mults[32] = {
-        100, /* 0000 -> 10.0x */
-        -1, /* 0001 -> 16.0x */
-        40,  /* 0010 ->  4.0x */
-        90,  /* 0011 ->  9.0x */
-        95,  /* 0100 ->  9.5x */
-        -1,  /* 0101 ->  RESERVED */
-        45,  /* 0110 ->  4.5x */
-        55,  /* 0111 ->  5.5x */
-        60,  /* 1000 ->  6.0x */
-        70,  /* 1001 ->  7.0x */
-        80,  /* 1010 ->  8.0x */
-        50,  /* 1011 ->  5.0x */
-        65,  /* 1100 ->  6.5x */
-        75,  /* 1101 ->  7.5x */
-        85,  /* 1110 ->  8.5x */
-        120, /* 1111 -> 12.0x */
-        -1, /* 0000 -> 10.0x */
-        110, /* 0001 -> 11.0x */
-        -1, /* 0010 -> 12.0x */
-        -1,  /* 0011 ->  9.0x */
-        105, /* 0100 -> 10.5x */
-        115, /* 0101 -> 11.5x */
-        125, /* 0110 -> 12.5x */
-        135, /* 0111 -> 13.5x */
-        140, /* 1000 -> 14.0x */
-        150, /* 1001 -> 15.0x */
-        160, /* 1010 -> 16.0x */
-        130, /* 1011 -> 13.0x */
-        145, /* 1100 -> 14.5x */
-        155, /* 1101 -> 15.5x */
-        -1,  /* 1110 -> RESERVED (13.0x) */
-        -1, /* 1111 -> 12.0x */
-};
-
-static const int __cpuinitdata nehemiah_eblcr[32] = {
-        50,  /* 0000 ->  5.0x */
-        160, /* 0001 -> 16.0x */
-        40,  /* 0010 ->  4.0x */
-        100, /* 0011 -> 10.0x */
-        55,  /* 0100 ->  5.5x */
-        -1,  /* 0101 ->  RESERVED */
-        45,  /* 0110 ->  4.5x */
-        95,  /* 0111 ->  9.5x */
-        90,  /* 1000 ->  9.0x */
-        70,  /* 1001 ->  7.0x */
-        80,  /* 1010 ->  8.0x */
-        60,  /* 1011 ->  6.0x */
-        120, /* 1100 -> 12.0x */
-        75,  /* 1101 ->  7.5x */
-        85,  /* 1110 ->  8.5x */
-        65,  /* 1111 ->  6.5x */
-        90,  /* 0000 ->  9.0x */
-        110, /* 0001 -> 11.0x */
-        120, /* 0010 -> 12.0x */
-        100, /* 0011 -> 10.0x */
-        135, /* 0100 -> 13.5x */
-        115, /* 0101 -> 11.5x */
-        125, /* 0110 -> 12.5x */
-        105, /* 0111 -> 10.5x */
-        130, /* 1000 -> 13.0x */
-        150, /* 1001 -> 15.0x */
-        160, /* 1010 -> 16.0x */
-        140, /* 1011 -> 14.0x */
-        120, /* 1100 -> 12.0x */
-        155, /* 1101 -> 15.5x */
-        -1,  /* 1110 -> RESERVED (13.0x) */
-        145 /* 1111 -> 14.5x */
-};
-
-/*
- * Voltage scales. Div/Mod by 1000 to get actual voltage.
- * Which scale to use depends on the VRM type in use.
- */
-
-struct mV_pos {
-        unsigned short mV;
-        unsigned short pos;
-};
-
-static const struct mV_pos __cpuinitdata vrm85_mV[32] = {
-        {1250, 8},      {1200, 6},      {1150, 4},      {1100, 2},
-        {1050, 0},      {1800, 30},     {1750, 28},     {1700, 26},
-        {1650, 24},     {1600, 22},     {1550, 20},     {1500, 18},
-        {1450, 16},     {1400, 14},     {1350, 12},     {1300, 10},
-        {1275, 9},      {1225, 7},      {1175, 5},      {1125, 3},
-        {1075, 1},      {1825, 31},     {1775, 29},     {1725, 27},
-        {1675, 25},     {1625, 23},     {1575, 21},     {1525, 19},
-        {1475, 17},     {1425, 15},     {1375, 13},     {1325, 11}
-};
-
-static const unsigned char __cpuinitdata mV_vrm85[32] = {
-        0x04,   0x14,   0x03,   0x13,   0x02,   0x12,   0x01,   0x11,
-        0x00,   0x10,   0x0f,   0x1f,   0x0e,   0x1e,   0x0d,   0x1d,
-        0x0c,   0x1c,   0x0b,   0x1b,   0x0a,   0x1a,   0x09,   0x19,
-        0x08,   0x18,   0x07,   0x17,   0x06,   0x16,   0x05,   0x15
-};
-
-static const struct mV_pos __cpuinitdata mobilevrm_mV[32] = {
-        {1750, 31},     {1700, 30},     {1650, 29},     {1600, 28},
-        {1550, 27},     {1500, 26},     {1450, 25},     {1400, 24},
-        {1350, 23},     {1300, 22},     {1250, 21},     {1200, 20},
-        {1150, 19},     {1100, 18},     {1050, 17},     {1000, 16},
-        {975, 15},      {950, 14},      {925, 13},      {900, 12},
-        {875, 11},      {850, 10},      {825, 9},       {800, 8},
-        {775, 7},       {750, 6},       {725, 5},       {700, 4},
-        {675, 3},       {650, 2},       {625, 1},       {600, 0}
-};
-
-static const unsigned char __cpuinitdata mV_mobilevrm[32] = {
-        0x1f,   0x1e,   0x1d,   0x1c,   0x1b,   0x1a,   0x19,   0x18,
-        0x17,   0x16,   0x15,   0x14,   0x13,   0x12,   0x11,   0x10,
-        0x0f,   0x0e,   0x0d,   0x0c,   0x0b,   0x0a,   0x09,   0x08,
-        0x07,   0x06,   0x05,   0x04,   0x03,   0x02,   0x01,   0x00
-};
-
diff --git a/arch/x86/kernel/cpu/cpufreq/longrun.c b/arch/x86/kernel/cpu/cpufreq/longrun.c
deleted file mode 100644
index d9f51367666b..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/longrun.c
+++ /dev/null
@@ -1,327 +0,0 @@
-/*
- * (C) 2002 - 2003  Dominik Brodowski <linux@brodo.de>
- *
- *  Licensed under the terms of the GNU GPL License version 2.
- *
- *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/cpufreq.h>
-#include <linux/timex.h>
-
-#include <asm/msr.h>
-#include <asm/processor.h>
-
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
-                "longrun", msg)
-
-static struct cpufreq_driver    longrun_driver;
-
-/**
- * longrun_{low,high}_freq is needed for the conversion of cpufreq kHz
- * values into per cent values. In TMTA microcode, the following is valid:
- * performance_pctg = (current_freq - low_freq)/(high_freq - low_freq)
- */
-static unsigned int longrun_low_freq, longrun_high_freq;
-
-
-/**
- * longrun_get_policy - get the current LongRun policy
- * @policy: struct cpufreq_policy where current policy is written into
- *
- * Reads the current LongRun policy by access to MSR_TMTA_LONGRUN_FLAGS
- * and MSR_TMTA_LONGRUN_CTRL
- */
-static void __cpuinit longrun_get_policy(struct cpufreq_policy *policy)
-{
-        u32 msr_lo, msr_hi;
-
-        rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
-        dprintk("longrun flags are %x - %x\n", msr_lo, msr_hi);
-        if (msr_lo & 0x01)
-                policy->policy = CPUFREQ_POLICY_PERFORMANCE;
-        else
-                policy->policy = CPUFREQ_POLICY_POWERSAVE;
-
-        rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
-        dprintk("longrun ctrl is %x - %x\n", msr_lo, msr_hi);
-        msr_lo &= 0x0000007F;
-        msr_hi &= 0x0000007F;
-
-        if (longrun_high_freq <= longrun_low_freq) {
-                /* Assume degenerate Longrun table */
-                policy->min = policy->max = longrun_high_freq;
-        } else {
-                policy->min = longrun_low_freq + msr_lo *
-                        ((longrun_high_freq - longrun_low_freq) / 100);
-                policy->max = longrun_low_freq + msr_hi *
-                        ((longrun_high_freq - longrun_low_freq) / 100);
-        }
-        policy->cpu = 0;
-}
-
-
-/**
- * longrun_set_policy - sets a new CPUFreq policy
- * @policy: new policy
- *
- * Sets a new CPUFreq policy on LongRun-capable processors. This function
- * has to be called with cpufreq_driver locked.
- */
-static int longrun_set_policy(struct cpufreq_policy *policy)
-{
-        u32 msr_lo, msr_hi;
-        u32 pctg_lo, pctg_hi;
-
-        if (!policy)
-                return -EINVAL;
-
-        if (longrun_high_freq <= longrun_low_freq) {
-                /* Assume degenerate Longrun table */
-                pctg_lo = pctg_hi = 100;
-        } else {
-                pctg_lo = (policy->min - longrun_low_freq) /
-                        ((longrun_high_freq - longrun_low_freq) / 100);
-                pctg_hi = (policy->max - longrun_low_freq) /
-                        ((longrun_high_freq - longrun_low_freq) / 100);
-        }
-
-        if (pctg_hi > 100)
-                pctg_hi = 100;
-        if (pctg_lo > pctg_hi)
-                pctg_lo = pctg_hi;
-
-        /* performance or economy mode */
-        rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
-        msr_lo &= 0xFFFFFFFE;
-        switch (policy->policy) {
-        case CPUFREQ_POLICY_PERFORMANCE:
-                msr_lo |= 0x00000001;
-                break;
-        case CPUFREQ_POLICY_POWERSAVE:
-                break;
-        }
-        wrmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
-
-        /* lower and upper boundary */
-        rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
-        msr_lo &= 0xFFFFFF80;
-        msr_hi &= 0xFFFFFF80;
-        msr_lo |= pctg_lo;
-        msr_hi |= pctg_hi;
-        wrmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
-
-        return 0;
-}
-
-
-/**
- * longrun_verify_poliy - verifies a new CPUFreq policy
- * @policy: the policy to verify
- *
- * Validates a new CPUFreq policy. This function has to be called with
- * cpufreq_driver locked.
- */
-static int longrun_verify_policy(struct cpufreq_policy *policy)
-{
-        if (!policy)
-                return -EINVAL;
-
-        policy->cpu = 0;
-        cpufreq_verify_within_limits(policy,
-                policy->cpuinfo.min_freq,
-                policy->cpuinfo.max_freq);
-
-        if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
-            (policy->policy != CPUFREQ_POLICY_PERFORMANCE))
-                return -EINVAL;
-
-        return 0;
-}
-
-static unsigned int longrun_get(unsigned int cpu)
-{
-        u32 eax, ebx, ecx, edx;
-
-        if (cpu)
-                return 0;
-
-        cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
-        dprintk("cpuid eax is %u\n", eax);
-
-        return eax * 1000;
-}
-
-/**
- * longrun_determine_freqs - determines the lowest and highest possible core frequency
- * @low_freq: an int to put the lowest frequency into
- * @high_freq: an int to put the highest frequency into
- *
- * Determines the lowest and highest possible core frequencies on this CPU.
- * This is necessary to calculate the performance percentage according to
- * TMTA rules:
- * performance_pctg = (target_freq - low_freq)/(high_freq - low_freq)
- */
-static int __cpuinit longrun_determine_freqs(unsigned int *low_freq,
-                                                      unsigned int *high_freq)
-{
-        u32 msr_lo, msr_hi;
-        u32 save_lo, save_hi;
-        u32 eax, ebx, ecx, edx;
-        u32 try_hi;
-        struct cpuinfo_x86 *c = &cpu_data(0);
-
-        if (!low_freq || !high_freq)
-                return -EINVAL;
-
-        if (cpu_has(c, X86_FEATURE_LRTI)) {
-                /* if the LongRun Table Interface is present, the
-                 * detection is a bit easier:
-                 * For minimum frequency, read out the maximum
-                 * level (msr_hi), write that into "currently
-                 * selected level", and read out the frequency.
-                 * For maximum frequency, read out level zero.
-                 */
-                /* minimum */
-                rdmsr(MSR_TMTA_LRTI_READOUT, msr_lo, msr_hi);
-                wrmsr(MSR_TMTA_LRTI_READOUT, msr_hi, msr_hi);
-                rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi);
-                *low_freq = msr_lo * 1000; /* to kHz */
-
-                /* maximum */
-                wrmsr(MSR_TMTA_LRTI_READOUT, 0, msr_hi);
-                rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi);
-                *high_freq = msr_lo * 1000; /* to kHz */
-
-                dprintk("longrun table interface told %u - %u kHz\n",
-                                *low_freq, *high_freq);
-
-                if (*low_freq > *high_freq)
-                        *low_freq = *high_freq;
-                return 0;
-        }
-
-        /* set the upper border to the value determined during TSC init */
-        *high_freq = (cpu_khz / 1000);
-        *high_freq = *high_freq * 1000;
-        dprintk("high frequency is %u kHz\n", *high_freq);
-
-        /* get current borders */
-        rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
-        save_lo = msr_lo & 0x0000007F;
-        save_hi = msr_hi & 0x0000007F;
-
-        /* if current perf_pctg is larger than 90%, we need to decrease the
-         * upper limit to make the calculation more accurate.
-         */
-        cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
-        /* try decreasing in 10% steps, some processors react only
-         * on some barrier values */
-        for (try_hi = 80; try_hi > 0 && ecx > 90; try_hi -= 10) {
-                /* set to 0 to try_hi perf_pctg */
-                msr_lo &= 0xFFFFFF80;
-                msr_hi &= 0xFFFFFF80;
-                msr_hi |= try_hi;
-                wrmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
-
-                /* read out current core MHz and current perf_pctg */
-                cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
-
-                /* restore values */
-                wrmsr(MSR_TMTA_LONGRUN_CTRL, save_lo, save_hi);
-        }
-        dprintk("percentage is %u %%, freq is %u MHz\n", ecx, eax);
-
-        /* performance_pctg = (current_freq - low_freq)/(high_freq - low_freq)
-         * eqals
-         * low_freq * (1 - perf_pctg) = (cur_freq - high_freq * perf_pctg)
-         *
-         * high_freq * perf_pctg is stored tempoarily into "ebx".
-         */
-        ebx = (((cpu_khz / 1000) * ecx) / 100); /* to MHz */
-
-        if ((ecx > 95) || (ecx == 0) || (eax < ebx))
-                return -EIO;
-
-        edx = ((eax - ebx) * 100) / (100 - ecx);
-        *low_freq = edx * 1000; /* back to kHz */
-
-        dprintk("low frequency is %u kHz\n", *low_freq);
-
-        if (*low_freq > *high_freq)
-                *low_freq = *high_freq;
-
-        return 0;
-}
-
-
-static int __cpuinit longrun_cpu_init(struct cpufreq_policy *policy)
-{
-        int result = 0;
-
-        /* capability check */
-        if (policy->cpu != 0)
-                return -ENODEV;
-
-        /* detect low and high frequency */
-        result = longrun_determine_freqs(&longrun_low_freq, &longrun_high_freq);
-        if (result)
-                return result;
-
-        /* cpuinfo and default policy values */
-        policy->cpuinfo.min_freq = longrun_low_freq;
-        policy->cpuinfo.max_freq = longrun_high_freq;
-        policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
-        longrun_get_policy(policy);
-
-        return 0;
-}
-
-
-static struct cpufreq_driver longrun_driver = {
-        .flags          = CPUFREQ_CONST_LOOPS,
-        .verify         = longrun_verify_policy,
-        .setpolicy      = longrun_set_policy,
-        .get            = longrun_get,
-        .init           = longrun_cpu_init,
-        .name           = "longrun",
-        .owner          = THIS_MODULE,
-};
-
-
-/**
- * longrun_init - initializes the Transmeta Crusoe LongRun CPUFreq driver
- *
- * Initializes the LongRun support.
- */
-static int __init longrun_init(void)
-{
-        struct cpuinfo_x86 *c = &cpu_data(0);
-
-        if (c->x86_vendor != X86_VENDOR_TRANSMETA ||
-            !cpu_has(c, X86_FEATURE_LONGRUN))
-                return -ENODEV;
-
-        return cpufreq_register_driver(&longrun_driver);
-}
-
-
-/**
- * longrun_exit - unregisters LongRun support
- */
-static void __exit longrun_exit(void)
-{
-        cpufreq_unregister_driver(&longrun_driver);
-}
-
-
-MODULE_AUTHOR("Dominik Brodowski <linux@brodo.de>");
-MODULE_DESCRIPTION("LongRun driver for Transmeta Crusoe and "
-                "Efficeon processors.");
-MODULE_LICENSE("GPL");
-
-module_init(longrun_init);
-module_exit(longrun_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/mperf.c b/arch/x86/kernel/cpu/cpufreq/mperf.c
deleted file mode 100644
index 911e193018ae..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/mperf.c
+++ /dev/null
@@ -1,51 +0,0 @@
-#include <linux/kernel.h>
-#include <linux/smp.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/cpufreq.h>
-#include <linux/slab.h>
-
-#include "mperf.h"
-
-static DEFINE_PER_CPU(struct aperfmperf, acfreq_old_perf);
-
-/* Called via smp_call_function_single(), on the target CPU */
-static void read_measured_perf_ctrs(void *_cur)
-{
-        struct aperfmperf *am = _cur;
-
-        get_aperfmperf(am);
-}
-
-/*
- * Return the measured active (C0) frequency on this CPU since last call
- * to this function.
- * Input: cpu number
- * Return: Average CPU frequency in terms of max frequency (zero on error)
- *
- * We use IA32_MPERF and IA32_APERF MSRs to get the measured performance
- * over a period of time, while CPU is in C0 state.
- * IA32_MPERF counts at the rate of max advertised frequency
- * IA32_APERF counts at the rate of actual CPU frequency
- * Only IA32_APERF/IA32_MPERF ratio is architecturally defined and
- * no meaning should be associated with absolute values of these MSRs.
- */
-unsigned int cpufreq_get_measured_perf(struct cpufreq_policy *policy,
-                                        unsigned int cpu)
-{
-        struct aperfmperf perf;
-        unsigned long ratio;
-        unsigned int retval;
-
-        if (smp_call_function_single(cpu, read_measured_perf_ctrs, &perf, 1))
-                return 0;
-
-        ratio = calc_aperfmperf_ratio(&per_cpu(acfreq_old_perf, cpu), &perf);
-        per_cpu(acfreq_old_perf, cpu) = perf;
-
-        retval = (policy->cpuinfo.max_freq * ratio) >> APERFMPERF_SHIFT;
-
-        return retval;
-}
-EXPORT_SYMBOL_GPL(cpufreq_get_measured_perf);
-MODULE_LICENSE("GPL");
diff --git a/arch/x86/kernel/cpu/cpufreq/mperf.h b/arch/x86/kernel/cpu/cpufreq/mperf.h
deleted file mode 100644
index 5dbf2950dc22..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/mperf.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/*
- *  (c) 2010 Advanced Micro Devices, Inc.
- *  Your use of this code is subject to the terms and conditions of the
- *  GNU general public license version 2. See "COPYING" or
- *  http://www.gnu.org/licenses/gpl.html
- */
-
-unsigned int cpufreq_get_measured_perf(struct cpufreq_policy *policy,
-                                        unsigned int cpu);
diff --git a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
deleted file mode 100644
index 52c93648e492..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
+++ /dev/null
@@ -1,331 +0,0 @@
-/*
- *      Pentium 4/Xeon CPU on demand clock modulation/speed scaling
- *      (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
- *      (C) 2002 Zwane Mwaikambo <zwane@commfireservices.com>
- *      (C) 2002 Arjan van de Ven <arjanv@redhat.com>
- *      (C) 2002 Tora T. Engstad
- *      All Rights Reserved
- *
- *      This program is free software; you can redistribute it and/or
- *      modify it under the terms of the GNU General Public License
- *      as published by the Free Software Foundation; either version
- *      2 of the License, or (at your option) any later version.
- *
- *      The author(s) of this software shall not be held liable for damages
- *      of any nature resulting due to the use of this software. This
- *      software is provided AS-IS with no warranties.
- *
- *      Date            Errata                  Description
- *      20020525        N44, O17        12.5% or 25% DC causes lockup
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <linux/cpufreq.h>
-#include <linux/cpumask.h>
-#include <linux/timex.h>
-
-#include <asm/processor.h>
-#include <asm/msr.h>
-#include <asm/timer.h>
-
-#include "speedstep-lib.h"
-
-#define PFX     "p4-clockmod: "
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
-                "p4-clockmod", msg)
-
-/*
- * Duty Cycle (3bits), note DC_DISABLE is not specified in
- * intel docs i just use it to mean disable
- */
-enum {
-        DC_RESV, DC_DFLT, DC_25PT, DC_38PT, DC_50PT,
-        DC_64PT, DC_75PT, DC_88PT, DC_DISABLE
-};
-
-#define DC_ENTRIES      8
-
-
-static int has_N44_O17_errata[NR_CPUS];
-static unsigned int stock_freq;
-static struct cpufreq_driver p4clockmod_driver;
-static unsigned int cpufreq_p4_get(unsigned int cpu);
-
-static int cpufreq_p4_setdc(unsigned int cpu, unsigned int newstate)
-{
-        u32 l, h;
-
-        if (!cpu_online(cpu) ||
-            (newstate > DC_DISABLE) || (newstate == DC_RESV))
-                return -EINVAL;
-
-        rdmsr_on_cpu(cpu, MSR_IA32_THERM_STATUS, &l, &h);
-
-        if (l & 0x01)
-                dprintk("CPU#%d currently thermal throttled\n", cpu);
-
-        if (has_N44_O17_errata[cpu] &&
-            (newstate == DC_25PT || newstate == DC_DFLT))
-                newstate = DC_38PT;
-
-        rdmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, &l, &h);
-        if (newstate == DC_DISABLE) {
-                dprintk("CPU#%d disabling modulation\n", cpu);
-                wrmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, l & ~(1<<4), h);
-        } else {
-                dprintk("CPU#%d setting duty cycle to %d%%\n",
-                        cpu, ((125 * newstate) / 10));
-                /* bits 63 - 5  : reserved
-                 * bit  4       : enable/disable
-                 * bits 3-1     : duty cycle
-                 * bit  0       : reserved
-                 */
-                l = (l & ~14);
-                l = l | (1<<4) | ((newstate & 0x7)<<1);
-                wrmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, l, h);
-        }
-
-        return 0;
-}
-
-
-static struct cpufreq_frequency_table p4clockmod_table[] = {
-        {DC_RESV, CPUFREQ_ENTRY_INVALID},
-        {DC_DFLT, 0},
-        {DC_25PT, 0},
-        {DC_38PT, 0},
-        {DC_50PT, 0},
-        {DC_64PT, 0},
-        {DC_75PT, 0},
-        {DC_88PT, 0},
-        {DC_DISABLE, 0},
-        {DC_RESV, CPUFREQ_TABLE_END},
-};
-
-
-static int cpufreq_p4_target(struct cpufreq_policy *policy,
-                             unsigned int target_freq,
-                             unsigned int relation)
-{
-        unsigned int    newstate = DC_RESV;
-        struct cpufreq_freqs freqs;
-        int i;
-
-        if (cpufreq_frequency_table_target(policy, &p4clockmod_table[0],
-                                target_freq, relation, &newstate))
-                return -EINVAL;
-
-        freqs.old = cpufreq_p4_get(policy->cpu);
-        freqs.new = stock_freq * p4clockmod_table[newstate].index / 8;
-
-        if (freqs.new == freqs.old)
-                return 0;
-
-        /* notifiers */
-        for_each_cpu(i, policy->cpus) {
-                freqs.cpu = i;
-                cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-        }
-
-        /* run on each logical CPU,
-         * see section 13.15.3 of IA32 Intel Architecture Software
-         * Developer's Manual, Volume 3
-         */
-        for_each_cpu(i, policy->cpus)
-                cpufreq_p4_setdc(i, p4clockmod_table[newstate].index);
-
-        /* notifiers */
-        for_each_cpu(i, policy->cpus) {
-                freqs.cpu = i;
-                cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-        }
-
-        return 0;
-}
-
-
-static int cpufreq_p4_verify(struct cpufreq_policy *policy)
-{
-        return cpufreq_frequency_table_verify(policy, &p4clockmod_table[0]);
-}
-
-
-static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c)
-{
-        if (c->x86 == 0x06) {
-                if (cpu_has(c, X86_FEATURE_EST))
-                        printk_once(KERN_WARNING PFX "Warning: EST-capable "
-                               "CPU detected. The acpi-cpufreq module offers "
-                               "voltage scaling in addition to frequency "
-                               "scaling. You should use that instead of "
-                               "p4-clockmod, if possible.\n");
-                switch (c->x86_model) {
-                case 0x0E: /* Core */
-                case 0x0F: /* Core Duo */
-                case 0x16: /* Celeron Core */
-                case 0x1C: /* Atom */
-                        p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
-                        return speedstep_get_frequency(SPEEDSTEP_CPU_PCORE);
-                case 0x0D: /* Pentium M (Dothan) */
-                        p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
-                        /* fall through */
-                case 0x09: /* Pentium M (Banias) */
-                        return speedstep_get_frequency(SPEEDSTEP_CPU_PM);
-                }
-        }
-
-        if (c->x86 != 0xF)
-                return 0;
-
-        /* on P-4s, the TSC runs with constant frequency independent whether
-         * throttling is active or not. */
-        p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
-
-        if (speedstep_detect_processor() == SPEEDSTEP_CPU_P4M) {
-                printk(KERN_WARNING PFX "Warning: Pentium 4-M detected. "
-                       "The speedstep-ich or acpi cpufreq modules offer "
-                       "voltage scaling in addition of frequency scaling. "
-                       "You should use either one instead of p4-clockmod, "
-                       "if possible.\n");
-                return speedstep_get_frequency(SPEEDSTEP_CPU_P4M);
-        }
-
-        return speedstep_get_frequency(SPEEDSTEP_CPU_P4D);
-}
-
-
-
-static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
-{
-        struct cpuinfo_x86 *c = &cpu_data(policy->cpu);
-        int cpuid = 0;
-        unsigned int i;
-
-#ifdef CONFIG_SMP
-        cpumask_copy(policy->cpus, cpu_sibling_mask(policy->cpu));
-#endif
-
-        /* Errata workaround */
-        cpuid = (c->x86 << 8) | (c->x86_model << 4) | c->x86_mask;
-        switch (cpuid) {
-        case 0x0f07:
-        case 0x0f0a:
-        case 0x0f11:
-        case 0x0f12:
-                has_N44_O17_errata[policy->cpu] = 1;
-                dprintk("has errata -- disabling low frequencies\n");
-        }
-
-        if (speedstep_detect_processor() == SPEEDSTEP_CPU_P4D &&
-            c->x86_model < 2) {
-                /* switch to maximum frequency and measure result */
-                cpufreq_p4_setdc(policy->cpu, DC_DISABLE);
-                recalibrate_cpu_khz();
-        }
-        /* get max frequency */
-        stock_freq = cpufreq_p4_get_frequency(c);
-        if (!stock_freq)
-                return -EINVAL;
-
-        /* table init */
-        for (i = 1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) {
-                if ((i < 2) && (has_N44_O17_errata[policy->cpu]))
-                        p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID;
-                else
-                        p4clockmod_table[i].frequency = (stock_freq * i)/8;
-        }
-        cpufreq_frequency_table_get_attr(p4clockmod_table, policy->cpu);
-
-        /* cpuinfo and default policy values */
-
-        /* the transition latency is set to be 1 higher than the maximum
-         * transition latency of the ondemand governor */
-        policy->cpuinfo.transition_latency = 10000001;
-        policy->cur = stock_freq;
-
-        return cpufreq_frequency_table_cpuinfo(policy, &p4clockmod_table[0]);
-}
-
-
-static int cpufreq_p4_cpu_exit(struct cpufreq_policy *policy)
-{
-        cpufreq_frequency_table_put_attr(policy->cpu);
-        return 0;
-}
-
-static unsigned int cpufreq_p4_get(unsigned int cpu)
-{
-        u32 l, h;
-
-        rdmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, &l, &h);
-
-        if (l & 0x10) {
-                l = l >> 1;
-                l &= 0x7;
-        } else
-                l = DC_DISABLE;
-
-        if (l != DC_DISABLE)
-                return stock_freq * l / 8;
-
-        return stock_freq;
-}
-
-static struct freq_attr *p4clockmod_attr[] = {
-        &cpufreq_freq_attr_scaling_available_freqs,
-        NULL,
-};
-
-static struct cpufreq_driver p4clockmod_driver = {
-        .verify         = cpufreq_p4_verify,
-        .target         = cpufreq_p4_target,
-        .init           = cpufreq_p4_cpu_init,
-        .exit           = cpufreq_p4_cpu_exit,
-        .get            = cpufreq_p4_get,
-        .name           = "p4-clockmod",
-        .owner          = THIS_MODULE,
-        .attr           = p4clockmod_attr,
-};
-
-
-static int __init cpufreq_p4_init(void)
-{
-        struct cpuinfo_x86 *c = &cpu_data(0);
-        int ret;
-
-        /*
-         * THERM_CONTROL is architectural for IA32 now, so
-         * we can rely on the capability checks
-         */
-        if (c->x86_vendor != X86_VENDOR_INTEL)
-                return -ENODEV;
-
-        if (!test_cpu_cap(c, X86_FEATURE_ACPI) ||
-                                !test_cpu_cap(c, X86_FEATURE_ACC))
-                return -ENODEV;
-
-        ret = cpufreq_register_driver(&p4clockmod_driver);
-        if (!ret)
-                printk(KERN_INFO PFX "P4/Xeon(TM) CPU On-Demand Clock "
-                                "Modulation available\n");
-
-        return ret;
-}
-
-
-static void __exit cpufreq_p4_exit(void)
-{
-        cpufreq_unregister_driver(&p4clockmod_driver);
-}
-
-
-MODULE_AUTHOR("Zwane Mwaikambo <zwane@commfireservices.com>");
-MODULE_DESCRIPTION("cpufreq driver for Pentium(TM) 4/Xeon(TM)");
-MODULE_LICENSE("GPL");
-
-late_initcall(cpufreq_p4_init);
-module_exit(cpufreq_p4_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
deleted file mode 100644
index 755a31e0f5b0..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
+++ /dev/null
@@ -1,624 +0,0 @@
-/*
- *  pcc-cpufreq.c - Processor Clocking Control firmware cpufreq interface
- *
- *  Copyright (C) 2009 Red Hat, Matthew Garrett <mjg@redhat.com>
- *  Copyright (C) 2009 Hewlett-Packard Development Company, L.P.
- *      Nagananda Chumbalkar <nagananda.chumbalkar@hp.com>
- *
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; version 2 of the License.
- *
- *  This program is distributed in the hope that it will be useful, but
- *  WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or NON
- *  INFRINGEMENT. See the GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <linux/sched.h>
-#include <linux/cpufreq.h>
-#include <linux/compiler.h>
-#include <linux/slab.h>
-
-#include <linux/acpi.h>
-#include <linux/io.h>
-#include <linux/spinlock.h>
-#include <linux/uaccess.h>
-
-#include <acpi/processor.h>
-
-#define PCC_VERSION     "1.00.00"
-#define POLL_LOOPS      300
-
-#define CMD_COMPLETE    0x1
-#define CMD_GET_FREQ    0x0
-#define CMD_SET_FREQ    0x1
-
-#define BUF_SZ          4
-
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER,      \
-                                             "pcc-cpufreq", msg)
-
-struct pcc_register_resource {
-        u8 descriptor;
-        u16 length;
-        u8 space_id;
-        u8 bit_width;
-        u8 bit_offset;
-        u8 access_size;
-        u64 address;
-} __attribute__ ((packed));
-
-struct pcc_memory_resource {
-        u8 descriptor;
-        u16 length;
-        u8 space_id;
-        u8 resource_usage;
-        u8 type_specific;
-        u64 granularity;
-        u64 minimum;
-        u64 maximum;
-        u64 translation_offset;
-        u64 address_length;
-} __attribute__ ((packed));
-
-static struct cpufreq_driver pcc_cpufreq_driver;
-
-struct pcc_header {
-        u32 signature;
-        u16 length;
-        u8 major;
-        u8 minor;
-        u32 features;
-        u16 command;
-        u16 status;
-        u32 latency;
-        u32 minimum_time;
-        u32 maximum_time;
-        u32 nominal;
-        u32 throttled_frequency;
-        u32 minimum_frequency;
-};
-
-static void __iomem *pcch_virt_addr;
-static struct pcc_header __iomem *pcch_hdr;
-
-static DEFINE_SPINLOCK(pcc_lock);
-
-static struct acpi_generic_address doorbell;
-
-static u64 doorbell_preserve;
-static u64 doorbell_write;
-
-static u8 OSC_UUID[16] = {0x63, 0x9B, 0x2C, 0x9F, 0x70, 0x91, 0x49, 0x1f,
-                          0xBB, 0x4F, 0xA5, 0x98, 0x2F, 0xA1, 0xB5, 0x46};
-
-struct pcc_cpu {
-        u32 input_offset;
-        u32 output_offset;
-};
-
-static struct pcc_cpu __percpu *pcc_cpu_info;
-
-static int pcc_cpufreq_verify(struct cpufreq_policy *policy)
-{
-        cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
-                                     policy->cpuinfo.max_freq);
-        return 0;
-}
-
-static inline void pcc_cmd(void)
-{
-        u64 doorbell_value;
-        int i;
-
-        acpi_read(&doorbell_value, &doorbell);
-        acpi_write((doorbell_value & doorbell_preserve) | doorbell_write,
-                   &doorbell);
-
-        for (i = 0; i < POLL_LOOPS; i++) {
-                if (ioread16(&pcch_hdr->status) & CMD_COMPLETE)
-                        break;
-        }
-}
-
-static inline void pcc_clear_mapping(void)
-{
-        if (pcch_virt_addr)
-                iounmap(pcch_virt_addr);
-        pcch_virt_addr = NULL;
-}
-
-static unsigned int pcc_get_freq(unsigned int cpu)
-{
-        struct pcc_cpu *pcc_cpu_data;
-        unsigned int curr_freq;
-        unsigned int freq_limit;
-        u16 status;
-        u32 input_buffer;
-        u32 output_buffer;
-
-        spin_lock(&pcc_lock);
-
-        dprintk("get: get_freq for CPU %d\n", cpu);
-        pcc_cpu_data = per_cpu_ptr(pcc_cpu_info, cpu);
-
-        input_buffer = 0x1;
-        iowrite32(input_buffer,
-                        (pcch_virt_addr + pcc_cpu_data->input_offset));
-        iowrite16(CMD_GET_FREQ, &pcch_hdr->command);
-
-        pcc_cmd();
-
-        output_buffer =
-                ioread32(pcch_virt_addr + pcc_cpu_data->output_offset);
-
-        /* Clear the input buffer - we are done with the current command */
-        memset_io((pcch_virt_addr + pcc_cpu_data->input_offset), 0, BUF_SZ);
-
-        status = ioread16(&pcch_hdr->status);
-        if (status != CMD_COMPLETE) {
-                dprintk("get: FAILED: for CPU %d, status is %d\n",
-                        cpu, status);
-                goto cmd_incomplete;
-        }
-        iowrite16(0, &pcch_hdr->status);
-        curr_freq = (((ioread32(&pcch_hdr->nominal) * (output_buffer & 0xff))
-                        / 100) * 1000);
-
-        dprintk("get: SUCCESS: (virtual) output_offset for cpu %d is "
-                "0x%x, contains a value of: 0x%x. Speed is: %d MHz\n",
-                cpu, (pcch_virt_addr + pcc_cpu_data->output_offset),
-                output_buffer, curr_freq);
-
-        freq_limit = (output_buffer >> 8) & 0xff;
-        if (freq_limit != 0xff) {
-                dprintk("get: frequency for cpu %d is being temporarily"
-                        " capped at %d\n", cpu, curr_freq);
-        }
-
-        spin_unlock(&pcc_lock);
-        return curr_freq;
-
-cmd_incomplete:
-        iowrite16(0, &pcch_hdr->status);
-        spin_unlock(&pcc_lock);
-        return 0;
-}
-
-static int pcc_cpufreq_target(struct cpufreq_policy *policy,
-                              unsigned int target_freq,
-                              unsigned int relation)
-{
-        struct pcc_cpu *pcc_cpu_data;
-        struct cpufreq_freqs freqs;
-        u16 status;
-        u32 input_buffer;
-        int cpu;
-
-        spin_lock(&pcc_lock);
-        cpu = policy->cpu;
-        pcc_cpu_data = per_cpu_ptr(pcc_cpu_info, cpu);
-
-        dprintk("target: CPU %d should go to target freq: %d "
-                "(virtual) input_offset is 0x%x\n",
-                cpu, target_freq,
-                (pcch_virt_addr + pcc_cpu_data->input_offset));
-
-        freqs.new = target_freq;
-        freqs.cpu = cpu;
-        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-
-        input_buffer = 0x1 | (((target_freq * 100)
-                               / (ioread32(&pcch_hdr->nominal) * 1000)) << 8);
-        iowrite32(input_buffer,
-                        (pcch_virt_addr + pcc_cpu_data->input_offset));
-        iowrite16(CMD_SET_FREQ, &pcch_hdr->command);
-
-        pcc_cmd();
-
-        /* Clear the input buffer - we are done with the current command */
-        memset_io((pcch_virt_addr + pcc_cpu_data->input_offset), 0, BUF_SZ);
-
-        status = ioread16(&pcch_hdr->status);
-        if (status != CMD_COMPLETE) {
-                dprintk("target: FAILED for cpu %d, with status: 0x%x\n",
-                        cpu, status);
-                goto cmd_incomplete;
-        }
-        iowrite16(0, &pcch_hdr->status);
-
-        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-        dprintk("target: was SUCCESSFUL for cpu %d\n", cpu);
-        spin_unlock(&pcc_lock);
-
-        return 0;
-
-cmd_incomplete:
-        iowrite16(0, &pcch_hdr->status);
-        spin_unlock(&pcc_lock);
-        return -EINVAL;
-}
-
-static int pcc_get_offset(int cpu)
-{
-        acpi_status status;
-        struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
-        union acpi_object *pccp, *offset;
-        struct pcc_cpu *pcc_cpu_data;
-        struct acpi_processor *pr;
-        int ret = 0;
-
-        pr = per_cpu(processors, cpu);
-        pcc_cpu_data = per_cpu_ptr(pcc_cpu_info, cpu);
-
-        status = acpi_evaluate_object(pr->handle, "PCCP", NULL, &buffer);
-        if (ACPI_FAILURE(status))
-                return -ENODEV;
-
-        pccp = buffer.pointer;
-        if (!pccp || pccp->type != ACPI_TYPE_PACKAGE) {
-                ret = -ENODEV;
-                goto out_free;
-        };
-
-        offset = &(pccp->package.elements[0]);
-        if (!offset || offset->type != ACPI_TYPE_INTEGER) {
-                ret = -ENODEV;
-                goto out_free;
-        }
-
-        pcc_cpu_data->input_offset = offset->integer.value;
-
-        offset = &(pccp->package.elements[1]);
-        if (!offset || offset->type != ACPI_TYPE_INTEGER) {
-                ret = -ENODEV;
-                goto out_free;
-        }
-
-        pcc_cpu_data->output_offset = offset->integer.value;
-
-        memset_io((pcch_virt_addr + pcc_cpu_data->input_offset), 0, BUF_SZ);
-        memset_io((pcch_virt_addr + pcc_cpu_data->output_offset), 0, BUF_SZ);
-
-        dprintk("pcc_get_offset: for CPU %d: pcc_cpu_data "
-                "input_offset: 0x%x, pcc_cpu_data output_offset: 0x%x\n",
-                cpu, pcc_cpu_data->input_offset, pcc_cpu_data->output_offset);
-out_free:
-        kfree(buffer.pointer);
-        return ret;
-}
-
-static int __init pcc_cpufreq_do_osc(acpi_handle *handle)
-{
-        acpi_status status;
-        struct acpi_object_list input;
-        struct acpi_buffer output = {ACPI_ALLOCATE_BUFFER, NULL};
-        union acpi_object in_params[4];
-        union acpi_object *out_obj;
-        u32 capabilities[2];
-        u32 errors;
-        u32 supported;
-        int ret = 0;
-
-        input.count = 4;
-        input.pointer = in_params;
-        in_params[0].type               = ACPI_TYPE_BUFFER;
-        in_params[0].buffer.length      = 16;
-        in_params[0].buffer.pointer     = OSC_UUID;
-        in_params[1].type               = ACPI_TYPE_INTEGER;
-        in_params[1].integer.value      = 1;
-        in_params[2].type               = ACPI_TYPE_INTEGER;
-        in_params[2].integer.value      = 2;
-        in_params[3].type               = ACPI_TYPE_BUFFER;
-        in_params[3].buffer.length      = 8;
-        in_params[3].buffer.pointer     = (u8 *)&capabilities;
-
-        capabilities[0] = OSC_QUERY_ENABLE;
-        capabilities[1] = 0x1;
-
-        status = acpi_evaluate_object(*handle, "_OSC", &input, &output);
-        if (ACPI_FAILURE(status))
-                return -ENODEV;
-
-        if (!output.length)
-                return -ENODEV;
-
-        out_obj = output.pointer;
-        if (out_obj->type != ACPI_TYPE_BUFFER) {
-                ret = -ENODEV;
-                goto out_free;
-        }
-
-        errors = *((u32 *)out_obj->buffer.pointer) & ~(1 << 0);
-        if (errors) {
-                ret = -ENODEV;
-                goto out_free;
-        }
-
-        supported = *((u32 *)(out_obj->buffer.pointer + 4));
-        if (!(supported & 0x1)) {
-                ret = -ENODEV;
-                goto out_free;
-        }
-
-        kfree(output.pointer);
-        capabilities[0] = 0x0;
-        capabilities[1] = 0x1;
-
-        status = acpi_evaluate_object(*handle, "_OSC", &input, &output);
-        if (ACPI_FAILURE(status))
-                return -ENODEV;
-
-        if (!output.length)
-                return -ENODEV;
-
-        out_obj = output.pointer;
-        if (out_obj->type != ACPI_TYPE_BUFFER) {
-                ret = -ENODEV;
-                goto out_free;
-        }
-
-        errors = *((u32 *)out_obj->buffer.pointer) & ~(1 << 0);
-        if (errors) {
-                ret = -ENODEV;
-                goto out_free;
-        }
-
-        supported = *((u32 *)(out_obj->buffer.pointer + 4));
-        if (!(supported & 0x1)) {
-                ret = -ENODEV;
-                goto out_free;
-        }
-
-out_free:
-        kfree(output.pointer);
-        return ret;
-}
-
-static int __init pcc_cpufreq_probe(void)
-{
-        acpi_status status;
-        struct acpi_buffer output = {ACPI_ALLOCATE_BUFFER, NULL};
-        struct pcc_memory_resource *mem_resource;
-        struct pcc_register_resource *reg_resource;
-        union acpi_object *out_obj, *member;
-        acpi_handle handle, osc_handle, pcch_handle;
-        int ret = 0;
-
-        status = acpi_get_handle(NULL, "\\_SB", &handle);
-        if (ACPI_FAILURE(status))
-                return -ENODEV;
-
-        status = acpi_get_handle(handle, "PCCH", &pcch_handle);
-        if (ACPI_FAILURE(status))
-                return -ENODEV;
-
-        status = acpi_get_handle(handle, "_OSC", &osc_handle);
-        if (ACPI_SUCCESS(status)) {
-                ret = pcc_cpufreq_do_osc(&osc_handle);
-                if (ret)
-                        dprintk("probe: _OSC evaluation did not succeed\n");
-                /* Firmware's use of _OSC is optional */
-                ret = 0;
-        }
-
-        status = acpi_evaluate_object(handle, "PCCH", NULL, &output);
-        if (ACPI_FAILURE(status))
-                return -ENODEV;
-
-        out_obj = output.pointer;
-        if (out_obj->type != ACPI_TYPE_PACKAGE) {
-                ret = -ENODEV;
-                goto out_free;
-        }
-
-        member = &out_obj->package.elements[0];
-        if (member->type != ACPI_TYPE_BUFFER) {
-                ret = -ENODEV;
-                goto out_free;
-        }
-
-        mem_resource = (struct pcc_memory_resource *)member->buffer.pointer;
-
-        dprintk("probe: mem_resource descriptor: 0x%x,"
-                " length: %d, space_id: %d, resource_usage: %d,"
-                " type_specific: %d, granularity: 0x%llx,"
-                " minimum: 0x%llx, maximum: 0x%llx,"
-                " translation_offset: 0x%llx, address_length: 0x%llx\n",
-                mem_resource->descriptor, mem_resource->length,
-                mem_resource->space_id, mem_resource->resource_usage,
-                mem_resource->type_specific, mem_resource->granularity,
-                mem_resource->minimum, mem_resource->maximum,
-                mem_resource->translation_offset,
-                mem_resource->address_length);
-
-        if (mem_resource->space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY) {
-                ret = -ENODEV;
-                goto out_free;
-        }
-
-        pcch_virt_addr = ioremap_nocache(mem_resource->minimum,
-                                        mem_resource->address_length);
-        if (pcch_virt_addr == NULL) {
-                dprintk("probe: could not map shared mem region\n");
-                goto out_free;
-        }
-        pcch_hdr = pcch_virt_addr;
-
-        dprintk("probe: PCCH header (virtual) addr: 0x%p\n", pcch_hdr);
-        dprintk("probe: PCCH header is at physical address: 0x%llx,"
-                " signature: 0x%x, length: %d bytes, major: %d, minor: %d,"
-                " supported features: 0x%x, command field: 0x%x,"
-                " status field: 0x%x, nominal latency: %d us\n",
-                mem_resource->minimum, ioread32(&pcch_hdr->signature),
-                ioread16(&pcch_hdr->length), ioread8(&pcch_hdr->major),
-                ioread8(&pcch_hdr->minor), ioread32(&pcch_hdr->features),
-                ioread16(&pcch_hdr->command), ioread16(&pcch_hdr->status),
-                ioread32(&pcch_hdr->latency));
-
-        dprintk("probe: min time between commands: %d us,"
-                " max time between commands: %d us,"
-                " nominal CPU frequency: %d MHz,"
-                " minimum CPU frequency: %d MHz,"
-                " minimum CPU frequency without throttling: %d MHz\n",
-                ioread32(&pcch_hdr->minimum_time),
-                ioread32(&pcch_hdr->maximum_time),
-                ioread32(&pcch_hdr->nominal),
-                ioread32(&pcch_hdr->throttled_frequency),
-                ioread32(&pcch_hdr->minimum_frequency));
-
-        member = &out_obj->package.elements[1];
-        if (member->type != ACPI_TYPE_BUFFER) {
-                ret = -ENODEV;
-                goto pcch_free;
-        }
-
-        reg_resource = (struct pcc_register_resource *)member->buffer.pointer;
-
-        doorbell.space_id = reg_resource->space_id;
-        doorbell.bit_width = reg_resource->bit_width;
-        doorbell.bit_offset = reg_resource->bit_offset;
-        doorbell.access_width = 64;
-        doorbell.address = reg_resource->address;
-
-        dprintk("probe: doorbell: space_id is %d, bit_width is %d, "
-                "bit_offset is %d, access_width is %d, address is 0x%llx\n",
-                doorbell.space_id, doorbell.bit_width, doorbell.bit_offset,
-                doorbell.access_width, reg_resource->address);
-
-        member = &out_obj->package.elements[2];
-        if (member->type != ACPI_TYPE_INTEGER) {
-                ret = -ENODEV;
-                goto pcch_free;
-        }
-
-        doorbell_preserve = member->integer.value;
-
-        member = &out_obj->package.elements[3];
-        if (member->type != ACPI_TYPE_INTEGER) {
-                ret = -ENODEV;
-                goto pcch_free;
-        }
-
-        doorbell_write = member->integer.value;
-
-        dprintk("probe: doorbell_preserve: 0x%llx,"
-                " doorbell_write: 0x%llx\n",
-                doorbell_preserve, doorbell_write);
-
-        pcc_cpu_info = alloc_percpu(struct pcc_cpu);
-        if (!pcc_cpu_info) {
-                ret = -ENOMEM;
-                goto pcch_free;
-        }
-
-        printk(KERN_DEBUG "pcc-cpufreq: (v%s) driver loaded with frequency"
-               " limits: %d MHz, %d MHz\n", PCC_VERSION,
-               ioread32(&pcch_hdr->minimum_frequency),
-               ioread32(&pcch_hdr->nominal));
-        kfree(output.pointer);
-        return ret;
-pcch_free:
-        pcc_clear_mapping();
-out_free:
-        kfree(output.pointer);
-        return ret;
-}
-
-static int pcc_cpufreq_cpu_init(struct cpufreq_policy *policy)
-{
-        unsigned int cpu = policy->cpu;
-        unsigned int result = 0;
-
-        if (!pcch_virt_addr) {
-                result = -1;
-                goto out;
-        }
-
-        result = pcc_get_offset(cpu);
-        if (result) {
-                dprintk("init: PCCP evaluation failed\n");
-                goto out;
-        }
-
-        policy->max = policy->cpuinfo.max_freq =
-                ioread32(&pcch_hdr->nominal) * 1000;
-        policy->min = policy->cpuinfo.min_freq =
-                ioread32(&pcch_hdr->minimum_frequency) * 1000;
-        policy->cur = pcc_get_freq(cpu);
-
-        if (!policy->cur) {
-                dprintk("init: Unable to get current CPU frequency\n");
-                result = -EINVAL;
-                goto out;
-        }
-
-        dprintk("init: policy->max is %d, policy->min is %d\n",
-                policy->max, policy->min);
-out:
-        return result;
-}
-
-static int pcc_cpufreq_cpu_exit(struct cpufreq_policy *policy)
-{
-        return 0;
-}
-
-static struct cpufreq_driver pcc_cpufreq_driver = {
-        .flags = CPUFREQ_CONST_LOOPS,
-        .get = pcc_get_freq,
-        .verify = pcc_cpufreq_verify,
-        .target = pcc_cpufreq_target,
-        .init = pcc_cpufreq_cpu_init,
-        .exit = pcc_cpufreq_cpu_exit,
-        .name = "pcc-cpufreq",
-        .owner = THIS_MODULE,
-};
-
-static int __init pcc_cpufreq_init(void)
-{
-        int ret;
-
-        if (acpi_disabled)
-                return 0;
-
-        ret = pcc_cpufreq_probe();
-        if (ret) {
-                dprintk("pcc_cpufreq_init: PCCH evaluation failed\n");
-                return ret;
-        }
-
-        ret = cpufreq_register_driver(&pcc_cpufreq_driver);
-
-        return ret;
-}
-
-static void __exit pcc_cpufreq_exit(void)
-{
-        cpufreq_unregister_driver(&pcc_cpufreq_driver);
-
-        pcc_clear_mapping();
-
-        free_percpu(pcc_cpu_info);
-}
-
-MODULE_AUTHOR("Matthew Garrett, Naga Chumbalkar");
-MODULE_VERSION(PCC_VERSION);
-MODULE_DESCRIPTION("Processor Clocking Control interface driver");
-MODULE_LICENSE("GPL");
-
-late_initcall(pcc_cpufreq_init);
-module_exit(pcc_cpufreq_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k6.c b/arch/x86/kernel/cpu/cpufreq/powernow-k6.c
deleted file mode 100644
index b3379d6a5c57..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k6.c
+++ /dev/null
@@ -1,261 +0,0 @@
-/*
- *  This file was based upon code in Powertweak Linux (http://powertweak.sf.net)
- *  (C) 2000-2003  Dave Jones, Arjan van de Ven, Janne Pänkälä,
- *                 Dominik Brodowski.
- *
- *  Licensed under the terms of the GNU GPL License version 2.
- *
- *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/cpufreq.h>
-#include <linux/ioport.h>
-#include <linux/timex.h>
-#include <linux/io.h>
-
-#include <asm/msr.h>
-
-#define POWERNOW_IOPORT 0xfff0          /* it doesn't matter where, as long
-                                           as it is unused */
-
-#define PFX "powernow-k6: "
-static unsigned int                     busfreq;   /* FSB, in 10 kHz */
-static unsigned int                     max_multiplier;
-
-
-/* Clock ratio multiplied by 10 - see table 27 in AMD#23446 */
-static struct cpufreq_frequency_table clock_ratio[] = {
-        {45,  /* 000 -> 4.5x */ 0},
-        {50,  /* 001 -> 5.0x */ 0},
-        {40,  /* 010 -> 4.0x */ 0},
-        {55,  /* 011 -> 5.5x */ 0},
-        {20,  /* 100 -> 2.0x */ 0},
-        {30,  /* 101 -> 3.0x */ 0},
-        {60,  /* 110 -> 6.0x */ 0},
-        {35,  /* 111 -> 3.5x */ 0},
-        {0, CPUFREQ_TABLE_END}
-};
-
-
-/**
- * powernow_k6_get_cpu_multiplier - returns the current FSB multiplier
- *
- *   Returns the current setting of the frequency multiplier. Core clock
- * speed is frequency of the Front-Side Bus multiplied with this value.
- */
-static int powernow_k6_get_cpu_multiplier(void)
-{
-        u64 invalue = 0;
-        u32 msrval;
-
-        msrval = POWERNOW_IOPORT + 0x1;
-        wrmsr(MSR_K6_EPMR, msrval, 0); /* enable the PowerNow port */
-        invalue = inl(POWERNOW_IOPORT + 0x8);
-        msrval = POWERNOW_IOPORT + 0x0;
-        wrmsr(MSR_K6_EPMR, msrval, 0); /* disable it again */
-
-        return clock_ratio[(invalue >> 5)&7].index;
-}
-
-
-/**
- * powernow_k6_set_state - set the PowerNow! multiplier
- * @best_i: clock_ratio[best_i] is the target multiplier
- *
- *   Tries to change the PowerNow! multiplier
- */
-static void powernow_k6_set_state(unsigned int best_i)
-{
-        unsigned long outvalue = 0, invalue = 0;
-        unsigned long msrval;
-        struct cpufreq_freqs freqs;
-
-        if (clock_ratio[best_i].index > max_multiplier) {
-                printk(KERN_ERR PFX "invalid target frequency\n");
-                return;
-        }
-
-        freqs.old = busfreq * powernow_k6_get_cpu_multiplier();
-        freqs.new = busfreq * clock_ratio[best_i].index;
-        freqs.cpu = 0; /* powernow-k6.c is UP only driver */
-
-        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-
-        /* we now need to transform best_i to the BVC format, see AMD#23446 */
-
-        outvalue = (1<<12) | (1<<10) | (1<<9) | (best_i<<5);
-
-        msrval = POWERNOW_IOPORT + 0x1;
-        wrmsr(MSR_K6_EPMR, msrval, 0); /* enable the PowerNow port */
-        invalue = inl(POWERNOW_IOPORT + 0x8);
-        invalue = invalue & 0xf;
-        outvalue = outvalue | invalue;
-        outl(outvalue , (POWERNOW_IOPORT + 0x8));
-        msrval = POWERNOW_IOPORT + 0x0;
-        wrmsr(MSR_K6_EPMR, msrval, 0); /* disable it again */
-
-        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-
-        return;
-}
-
-
-/**
- * powernow_k6_verify - verifies a new CPUfreq policy
- * @policy: new policy
- *
- * Policy must be within lowest and highest possible CPU Frequency,
- * and at least one possible state must be within min and max.
- */
-static int powernow_k6_verify(struct cpufreq_policy *policy)
-{
-        return cpufreq_frequency_table_verify(policy, &clock_ratio[0]);
-}
-
-
-/**
- * powernow_k6_setpolicy - sets a new CPUFreq policy
- * @policy: new policy
- * @target_freq: the target frequency
- * @relation: how that frequency relates to achieved frequency
- *  (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
- *
- * sets a new CPUFreq policy
- */
-static int powernow_k6_target(struct cpufreq_policy *policy,
-                               unsigned int target_freq,
-                               unsigned int relation)
-{
-        unsigned int newstate = 0;
-
-        if (cpufreq_frequency_table_target(policy, &clock_ratio[0],
-                                target_freq, relation, &newstate))
-                return -EINVAL;
-
-        powernow_k6_set_state(newstate);
-
-        return 0;
-}
-
-
-static int powernow_k6_cpu_init(struct cpufreq_policy *policy)
-{
-        unsigned int i, f;
-        int result;
-
-        if (policy->cpu != 0)
-                return -ENODEV;
-
-        /* get frequencies */
-        max_multiplier = powernow_k6_get_cpu_multiplier();
-        busfreq = cpu_khz / max_multiplier;
-
-        /* table init */
-        for (i = 0; (clock_ratio[i].frequency != CPUFREQ_TABLE_END); i++) {
-                f = clock_ratio[i].index;
-                if (f > max_multiplier)
-                        clock_ratio[i].frequency = CPUFREQ_ENTRY_INVALID;
-                else
-                        clock_ratio[i].frequency = busfreq * f;
-        }
-
-        /* cpuinfo and default policy values */
-        policy->cpuinfo.transition_latency = 200000;
-        policy->cur = busfreq * max_multiplier;
-
-        result = cpufreq_frequency_table_cpuinfo(policy, clock_ratio);
-        if (result)
-                return result;
-
-        cpufreq_frequency_table_get_attr(clock_ratio, policy->cpu);
-
-        return 0;
-}
-
-
-static int powernow_k6_cpu_exit(struct cpufreq_policy *policy)
-{
-        unsigned int i;
-        for (i = 0; i < 8; i++) {
-                if (i == max_multiplier)
-                        powernow_k6_set_state(i);
-        }
-        cpufreq_frequency_table_put_attr(policy->cpu);
-        return 0;
-}
-
-static unsigned int powernow_k6_get(unsigned int cpu)
-{
-        unsigned int ret;
-        ret = (busfreq * powernow_k6_get_cpu_multiplier());
-        return ret;
-}
-
-static struct freq_attr *powernow_k6_attr[] = {
-        &cpufreq_freq_attr_scaling_available_freqs,
-        NULL,
-};
-
-static struct cpufreq_driver powernow_k6_driver = {
-        .verify         = powernow_k6_verify,
-        .target         = powernow_k6_target,
-        .init           = powernow_k6_cpu_init,
-        .exit           = powernow_k6_cpu_exit,
-        .get            = powernow_k6_get,
-        .name           = "powernow-k6",
-        .owner          = THIS_MODULE,
-        .attr           = powernow_k6_attr,
-};
-
-
-/**
- * powernow_k6_init - initializes the k6 PowerNow! CPUFreq driver
- *
- *   Initializes the K6 PowerNow! support. Returns -ENODEV on unsupported
- * devices, -EINVAL or -ENOMEM on problems during initiatization, and zero
- * on success.
- */
-static int __init powernow_k6_init(void)
-{
-        struct cpuinfo_x86 *c = &cpu_data(0);
-
-        if ((c->x86_vendor != X86_VENDOR_AMD) || (c->x86 != 5) ||
-                ((c->x86_model != 12) && (c->x86_model != 13)))
-                return -ENODEV;
-
-        if (!request_region(POWERNOW_IOPORT, 16, "PowerNow!")) {
-                printk(KERN_INFO PFX "PowerNow IOPORT region already used.\n");
-                return -EIO;
-        }
-
-        if (cpufreq_register_driver(&powernow_k6_driver)) {
-                release_region(POWERNOW_IOPORT, 16);
-                return -EINVAL;
-        }
-
-        return 0;
-}
-
-
-/**
- * powernow_k6_exit - unregisters AMD K6-2+/3+ PowerNow! support
- *
- *   Unregisters AMD K6-2+ / K6-3+ PowerNow! support.
- */
-static void __exit powernow_k6_exit(void)
-{
-        cpufreq_unregister_driver(&powernow_k6_driver);
-        release_region(POWERNOW_IOPORT, 16);
-}
-
-
-MODULE_AUTHOR("Arjan van de Ven, Dave Jones <davej@redhat.com>, "
-                "Dominik Brodowski <linux@brodo.de>");
-MODULE_DESCRIPTION("PowerNow! driver for AMD K6-2+ / K6-3+ processors.");
-MODULE_LICENSE("GPL");
-
-module_init(powernow_k6_init);
-module_exit(powernow_k6_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k7.c b/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
deleted file mode 100644
index 4a45fd6e41ba..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
+++ /dev/null
@@ -1,752 +0,0 @@
-/*
- *  AMD K7 Powernow driver.
- *  (C) 2003 Dave Jones on behalf of SuSE Labs.
- *  (C) 2003-2004 Dave Jones <davej@redhat.com>
- *
- *  Licensed under the terms of the GNU GPL License version 2.
- *  Based upon datasheets & sample CPUs kindly provided by AMD.
- *
- * Errata 5:
- *  CPU may fail to execute a FID/VID change in presence of interrupt.
- *  - We cli/sti on stepping A0 CPUs around the FID/VID transition.
- * Errata 15:
- *  CPU with half frequency multipliers may hang upon wakeup from disconnect.
- *  - We disable half multipliers if ACPI is used on A0 stepping CPUs.
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/init.h>
-#include <linux/cpufreq.h>
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <linux/dmi.h>
-#include <linux/timex.h>
-#include <linux/io.h>
-
-#include <asm/timer.h>          /* Needed for recalibrate_cpu_khz() */
-#include <asm/msr.h>
-#include <asm/system.h>
-
-#ifdef CONFIG_X86_POWERNOW_K7_ACPI
-#include <linux/acpi.h>
-#include <acpi/processor.h>
-#endif
-
-#include "powernow-k7.h"
-
-#define PFX "powernow: "
-
-
-struct psb_s {
-        u8 signature[10];
-        u8 tableversion;
-        u8 flags;
-        u16 settlingtime;
-        u8 reserved1;
-        u8 numpst;
-};
-
-struct pst_s {
-        u32 cpuid;
-        u8 fsbspeed;
-        u8 maxfid;
-        u8 startvid;
-        u8 numpstates;
-};
-
-#ifdef CONFIG_X86_POWERNOW_K7_ACPI
-union powernow_acpi_control_t {
-        struct {
-                unsigned long fid:5,
-                        vid:5,
-                        sgtc:20,
-                        res1:2;
-        } bits;
-        unsigned long val;
-};
-#endif
-
-#ifdef CONFIG_CPU_FREQ_DEBUG
-/* divide by 1000 to get VCore voltage in V. */
-static const int mobile_vid_table[32] = {
-    2000, 1950, 1900, 1850, 1800, 1750, 1700, 1650,
-    1600, 1550, 1500, 1450, 1400, 1350, 1300, 0,
-    1275, 1250, 1225, 1200, 1175, 1150, 1125, 1100,
-    1075, 1050, 1025, 1000, 975, 950, 925, 0,
-};
-#endif
-
-/* divide by 10 to get FID. */
-static const int fid_codes[32] = {
-    110, 115, 120, 125, 50, 55, 60, 65,
-    70, 75, 80, 85, 90, 95, 100, 105,
-    30, 190, 40, 200, 130, 135, 140, 210,
-    150, 225, 160, 165, 170, 180, -1, -1,
-};
-
-/* This parameter is used in order to force ACPI instead of legacy method for
- * configuration purpose.
- */
-
-static int acpi_force;
-
-static struct cpufreq_frequency_table *powernow_table;
-
-static unsigned int can_scale_bus;
-static unsigned int can_scale_vid;
-static unsigned int minimum_speed = -1;
-static unsigned int maximum_speed;
-static unsigned int number_scales;
-static unsigned int fsb;
-static unsigned int latency;
-static char have_a0;
-
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
-                "powernow-k7", msg)
-
-static int check_fsb(unsigned int fsbspeed)
-{
-        int delta;
-        unsigned int f = fsb / 1000;
-
-        delta = (fsbspeed > f) ? fsbspeed - f : f - fsbspeed;
-        return delta < 5;
-}
-
-static int check_powernow(void)
-{
-        struct cpuinfo_x86 *c = &cpu_data(0);
-        unsigned int maxei, eax, ebx, ecx, edx;
-
-        if ((c->x86_vendor != X86_VENDOR_AMD) || (c->x86 != 6)) {
-#ifdef MODULE
-                printk(KERN_INFO PFX "This module only works with "
-                                "AMD K7 CPUs\n");
-#endif
-                return 0;
-        }
-
-        /* Get maximum capabilities */
-        maxei = cpuid_eax(0x80000000);
-        if (maxei < 0x80000007) {       /* Any powernow info ? */
-#ifdef MODULE
-                printk(KERN_INFO PFX "No powernow capabilities detected\n");
-#endif
-                return 0;
-        }
-
-        if ((c->x86_model == 6) && (c->x86_mask == 0)) {
-                printk(KERN_INFO PFX "K7 660[A0] core detected, "
-                                "enabling errata workarounds\n");
-                have_a0 = 1;
-        }
-
-        cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
-
-        /* Check we can actually do something before we say anything.*/
-        if (!(edx & (1 << 1 | 1 << 2)))
-                return 0;
-
-        printk(KERN_INFO PFX "PowerNOW! Technology present. Can scale: ");
-
-        if (edx & 1 << 1) {
-                printk("frequency");
-                can_scale_bus = 1;
-        }
-
-        if ((edx & (1 << 1 | 1 << 2)) == 0x6)
-                printk(" and ");
-
-        if (edx & 1 << 2) {
-                printk("voltage");
-                can_scale_vid = 1;
-        }
-
-        printk(".\n");
-        return 1;
-}
-
-#ifdef CONFIG_X86_POWERNOW_K7_ACPI
-static void invalidate_entry(unsigned int entry)
-{
-        powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
-}
-#endif
-
-static int get_ranges(unsigned char *pst)
-{
-        unsigned int j;
-        unsigned int speed;
-        u8 fid, vid;
-
-        powernow_table = kzalloc((sizeof(struct cpufreq_frequency_table) *
-                                (number_scales + 1)), GFP_KERNEL);
-        if (!powernow_table)
-                return -ENOMEM;
-
-        for (j = 0 ; j < number_scales; j++) {
-                fid = *pst++;
-
-                powernow_table[j].frequency = (fsb * fid_codes[fid]) / 10;
-                powernow_table[j].index = fid; /* lower 8 bits */
-
-                speed = powernow_table[j].frequency;
-
-                if ((fid_codes[fid] % 10) == 5) {
-#ifdef CONFIG_X86_POWERNOW_K7_ACPI
-                        if (have_a0 == 1)
-                                invalidate_entry(j);
-#endif
-                }
-
-                if (speed < minimum_speed)
-                        minimum_speed = speed;
-                if (speed > maximum_speed)
-                        maximum_speed = speed;
-
-                vid = *pst++;
-                powernow_table[j].index |= (vid << 8); /* upper 8 bits */
-
-                dprintk("   FID: 0x%x (%d.%dx [%dMHz])  "
-                         "VID: 0x%x (%d.%03dV)\n", fid, fid_codes[fid] / 10,
-                         fid_codes[fid] % 10, speed/1000, vid,
-                         mobile_vid_table[vid]/1000,
-                         mobile_vid_table[vid]%1000);
-        }
-        powernow_table[number_scales].frequency = CPUFREQ_TABLE_END;
-        powernow_table[number_scales].index = 0;
-
-        return 0;
-}
-
-
-static void change_FID(int fid)
-{
-        union msr_fidvidctl fidvidctl;
-
-        rdmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val);
-        if (fidvidctl.bits.FID != fid) {
-                fidvidctl.bits.SGTC = latency;
-                fidvidctl.bits.FID = fid;
-                fidvidctl.bits.VIDC = 0;
-                fidvidctl.bits.FIDC = 1;
-                wrmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val);
-        }
-}
-
-
-static void change_VID(int vid)
-{
-        union msr_fidvidctl fidvidctl;
-
-        rdmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val);
-        if (fidvidctl.bits.VID != vid) {
-                fidvidctl.bits.SGTC = latency;
-                fidvidctl.bits.VID = vid;
-                fidvidctl.bits.FIDC = 0;
-                fidvidctl.bits.VIDC = 1;
-                wrmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val);
-        }
-}
-
-
-static void change_speed(unsigned int index)
-{
-        u8 fid, vid;
-        struct cpufreq_freqs freqs;
-        union msr_fidvidstatus fidvidstatus;
-        int cfid;
-
-        /* fid are the lower 8 bits of the index we stored into
-         * the cpufreq frequency table in powernow_decode_bios,
-         * vid are the upper 8 bits.
-         */
-
-        fid = powernow_table[index].index & 0xFF;
-        vid = (powernow_table[index].index & 0xFF00) >> 8;
-
-        freqs.cpu = 0;
-
-        rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val);
-        cfid = fidvidstatus.bits.CFID;
-        freqs.old = fsb * fid_codes[cfid] / 10;
-
-        freqs.new = powernow_table[index].frequency;
-
-        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-
-        /* Now do the magic poking into the MSRs.  */
-
-        if (have_a0 == 1)       /* A0 errata 5 */
-                local_irq_disable();
-
-        if (freqs.old > freqs.new) {
-                /* Going down, so change FID first */
-                change_FID(fid);
-                change_VID(vid);
-        } else {
-                /* Going up, so change VID first */
-                change_VID(vid);
-                change_FID(fid);
-        }
-
-
-        if (have_a0 == 1)
-                local_irq_enable();
-
-        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-}
-
-
-#ifdef CONFIG_X86_POWERNOW_K7_ACPI
-
-static struct acpi_processor_performance *acpi_processor_perf;
-
-static int powernow_acpi_init(void)
-{
-        int i;
-        int retval = 0;
-        union powernow_acpi_control_t pc;
-
-        if (acpi_processor_perf != NULL && powernow_table != NULL) {
-                retval = -EINVAL;
-                goto err0;
-        }
-
-        acpi_processor_perf = kzalloc(sizeof(struct acpi_processor_performance),
-                                      GFP_KERNEL);
-        if (!acpi_processor_perf) {
-                retval = -ENOMEM;
-                goto err0;
-        }
-
-        if (!zalloc_cpumask_var(&acpi_processor_perf->shared_cpu_map,
-                                                                GFP_KERNEL)) {
-                retval = -ENOMEM;
-                goto err05;
-        }
-
-        if (acpi_processor_register_performance(acpi_processor_perf, 0)) {
-                retval = -EIO;
-                goto err1;
-        }
-
-        if (acpi_processor_perf->control_register.space_id !=
-                        ACPI_ADR_SPACE_FIXED_HARDWARE) {
-                retval = -ENODEV;
-                goto err2;
-        }
-
-        if (acpi_processor_perf->status_register.space_id !=
-                        ACPI_ADR_SPACE_FIXED_HARDWARE) {
-                retval = -ENODEV;
-                goto err2;
-        }
-
-        number_scales = acpi_processor_perf->state_count;
-
-        if (number_scales < 2) {
-                retval = -ENODEV;
-                goto err2;
-        }
-
-        powernow_table = kzalloc((sizeof(struct cpufreq_frequency_table) *
-                                (number_scales + 1)), GFP_KERNEL);
-        if (!powernow_table) {
-                retval = -ENOMEM;
-                goto err2;
-        }
-
-        pc.val = (unsigned long) acpi_processor_perf->states[0].control;
-        for (i = 0; i < number_scales; i++) {
-                u8 fid, vid;
-                struct acpi_processor_px *state =
-                        &acpi_processor_perf->states[i];
-                unsigned int speed, speed_mhz;
-
-                pc.val = (unsigned long) state->control;
-                dprintk("acpi:  P%d: %d MHz %d mW %d uS control %08x SGTC %d\n",
-                         i,
-                         (u32) state->core_frequency,
-                         (u32) state->power,
-                         (u32) state->transition_latency,
-                         (u32) state->control,
-                         pc.bits.sgtc);
-
-                vid = pc.bits.vid;
-                fid = pc.bits.fid;
-
-                powernow_table[i].frequency = fsb * fid_codes[fid] / 10;
-                powernow_table[i].index = fid; /* lower 8 bits */
-                powernow_table[i].index |= (vid << 8); /* upper 8 bits */
-
-                speed = powernow_table[i].frequency;
-                speed_mhz = speed / 1000;
-
-                /* processor_perflib will multiply the MHz value by 1000 to
-                 * get a KHz value (e.g. 1266000). However, powernow-k7 works
-                 * with true KHz values (e.g. 1266768). To ensure that all
-                 * powernow frequencies are available, we must ensure that
-                 * ACPI doesn't restrict them, so we round up the MHz value
-                 * to ensure that perflib's computed KHz value is greater than
-                 * or equal to powernow's KHz value.
-                 */
-                if (speed % 1000 > 0)
-                        speed_mhz++;
-
-                if ((fid_codes[fid] % 10) == 5) {
-                        if (have_a0 == 1)
-                                invalidate_entry(i);
-                }
-
-                dprintk("   FID: 0x%x (%d.%dx [%dMHz])  "
-                         "VID: 0x%x (%d.%03dV)\n", fid, fid_codes[fid] / 10,
-                         fid_codes[fid] % 10, speed_mhz, vid,
-                         mobile_vid_table[vid]/1000,
-                         mobile_vid_table[vid]%1000);
-
-                if (state->core_frequency != speed_mhz) {
-                        state->core_frequency = speed_mhz;
-                        dprintk("   Corrected ACPI frequency to %d\n",
-                                speed_mhz);
-                }
-
-                if (latency < pc.bits.sgtc)
-                        latency = pc.bits.sgtc;
-
-                if (speed < minimum_speed)
-                        minimum_speed = speed;
-                if (speed > maximum_speed)
-                        maximum_speed = speed;
-        }
-
-        powernow_table[i].frequency = CPUFREQ_TABLE_END;
-        powernow_table[i].index = 0;
-
-        /* notify BIOS that we exist */
-        acpi_processor_notify_smm(THIS_MODULE);
-
-        return 0;
-
-err2:
-        acpi_processor_unregister_performance(acpi_processor_perf, 0);
-err1:
-        free_cpumask_var(acpi_processor_perf->shared_cpu_map);
-err05:
-        kfree(acpi_processor_perf);
-err0:
-        printk(KERN_WARNING PFX "ACPI perflib can not be used on "
-                        "this platform\n");
-        acpi_processor_perf = NULL;
-        return retval;
-}
-#else
-static int powernow_acpi_init(void)
-{
-        printk(KERN_INFO PFX "no support for ACPI processor found."
-               "  Please recompile your kernel with ACPI processor\n");
-        return -EINVAL;
-}
-#endif
-
-static void print_pst_entry(struct pst_s *pst, unsigned int j)
-{
-        dprintk("PST:%d (@%p)\n", j, pst);
-        dprintk(" cpuid: 0x%x  fsb: %d  maxFID: 0x%x  startvid: 0x%x\n",
-                pst->cpuid, pst->fsbspeed, pst->maxfid, pst->startvid);
-}
-
-static int powernow_decode_bios(int maxfid, int startvid)
-{
-        struct psb_s *psb;
-        struct pst_s *pst;
-        unsigned int i, j;
-        unsigned char *p;
-        unsigned int etuple;
-        unsigned int ret;
-
-        etuple = cpuid_eax(0x80000001);
-
-        for (i = 0xC0000; i < 0xffff0 ; i += 16) {
-
-                p = phys_to_virt(i);
-
-                if (memcmp(p, "AMDK7PNOW!",  10) == 0) {
-                        dprintk("Found PSB header at %p\n", p);
-                        psb = (struct psb_s *) p;
-                        dprintk("Table version: 0x%x\n", psb->tableversion);
-                        if (psb->tableversion != 0x12) {
-                                printk(KERN_INFO PFX "Sorry, only v1.2 tables"
-                                                " supported right now\n");
-                                return -ENODEV;
-                        }
-
-                        dprintk("Flags: 0x%x\n", psb->flags);
-                        if ((psb->flags & 1) == 0)
-                                dprintk("Mobile voltage regulator\n");
-                        else
-                                dprintk("Desktop voltage regulator\n");
-
-                        latency = psb->settlingtime;
-                        if (latency < 100) {
-                                printk(KERN_INFO PFX "BIOS set settling time "
-                                                "to %d microseconds. "
-                                                "Should be at least 100. "
-                                                "Correcting.\n", latency);
-                                latency = 100;
-                        }
-                        dprintk("Settling Time: %d microseconds.\n",
-                                        psb->settlingtime);
-                        dprintk("Has %d PST tables. (Only dumping ones "
-                                        "relevant to this CPU).\n",
-                                        psb->numpst);
-
-                        p += sizeof(struct psb_s);
-
-                        pst = (struct pst_s *) p;
-
-                        for (j = 0; j < psb->numpst; j++) {
-                                pst = (struct pst_s *) p;
-                                number_scales = pst->numpstates;
-
-                                if ((etuple == pst->cpuid) &&
-                                    check_fsb(pst->fsbspeed) &&
-                                    (maxfid == pst->maxfid) &&
-                                    (startvid == pst->startvid)) {
-                                        print_pst_entry(pst, j);
-                                        p = (char *)pst + sizeof(struct pst_s);
-                                        ret = get_ranges(p);
-                                        return ret;
-                                } else {
-                                        unsigned int k;
-                                        p = (char *)pst + sizeof(struct pst_s);
-                                        for (k = 0; k < number_scales; k++)
-                                                p += 2;
-                                }
-                        }
-                        printk(KERN_INFO PFX "No PST tables match this cpuid "
-                                        "(0x%x)\n", etuple);
-                        printk(KERN_INFO PFX "This is indicative of a broken "
-                                        "BIOS.\n");
-
-                        return -EINVAL;
-                }
-                p++;
-        }
-
-        return -ENODEV;
-}
-
-
-static int powernow_target(struct cpufreq_policy *policy,
-                            unsigned int target_freq,
-                            unsigned int relation)
-{
-        unsigned int newstate;
-
-        if (cpufreq_frequency_table_target(policy, powernow_table, target_freq,
-                                relation, &newstate))
-                return -EINVAL;
-
-        change_speed(newstate);
-
-        return 0;
-}
-
-
-static int powernow_verify(struct cpufreq_policy *policy)
-{
-        return cpufreq_frequency_table_verify(policy, powernow_table);
-}
-
-/*
- * We use the fact that the bus frequency is somehow
- * a multiple of 100000/3 khz, then we compute sgtc according
- * to this multiple.
- * That way, we match more how AMD thinks all of that work.
- * We will then get the same kind of behaviour already tested under
- * the "well-known" other OS.
- */
-static int __cpuinit fixup_sgtc(void)
-{
-        unsigned int sgtc;
-        unsigned int m;
-
-        m = fsb / 3333;
-        if ((m % 10) >= 5)
-                m += 5;
-
-        m /= 10;
-
-        sgtc = 100 * m * latency;
-        sgtc = sgtc / 3;
-        if (sgtc > 0xfffff) {
-                printk(KERN_WARNING PFX "SGTC too large %d\n", sgtc);
-                sgtc = 0xfffff;
-        }
-        return sgtc;
-}
-
-static unsigned int powernow_get(unsigned int cpu)
-{
-        union msr_fidvidstatus fidvidstatus;
-        unsigned int cfid;
-
-        if (cpu)
-                return 0;
-        rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val);
-        cfid = fidvidstatus.bits.CFID;
-
-        return fsb * fid_codes[cfid] / 10;
-}
-
-
-static int __cpuinit acer_cpufreq_pst(const struct dmi_system_id *d)
-{
-        printk(KERN_WARNING PFX
-                "%s laptop with broken PST tables in BIOS detected.\n",
-                d->ident);
-        printk(KERN_WARNING PFX
-                "You need to downgrade to 3A21 (09/09/2002), or try a newer "
-                "BIOS than 3A71 (01/20/2003)\n");
-        printk(KERN_WARNING PFX
-                "cpufreq scaling has been disabled as a result of this.\n");
-        return 0;
-}
-
-/*
- * Some Athlon laptops have really fucked PST tables.
- * A BIOS update is all that can save them.
- * Mention this, and disable cpufreq.
- */
-static struct dmi_system_id __cpuinitdata powernow_dmi_table[] = {
-        {
-                .callback = acer_cpufreq_pst,
-                .ident = "Acer Aspire",
-                .matches = {
-                        DMI_MATCH(DMI_SYS_VENDOR, "Insyde Software"),
-                        DMI_MATCH(DMI_BIOS_VERSION, "3A71"),
-                },
-        },
-        { }
-};
-
-static int __cpuinit powernow_cpu_init(struct cpufreq_policy *policy)
-{
-        union msr_fidvidstatus fidvidstatus;
-        int result;
-
-        if (policy->cpu != 0)
-                return -ENODEV;
-
-        rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val);
-
-        recalibrate_cpu_khz();
-
-        fsb = (10 * cpu_khz) / fid_codes[fidvidstatus.bits.CFID];
-        if (!fsb) {
-                printk(KERN_WARNING PFX "can not determine bus frequency\n");
-                return -EINVAL;
-        }
-        dprintk("FSB: %3dMHz\n", fsb/1000);
-
-        if (dmi_check_system(powernow_dmi_table) || acpi_force) {
-                printk(KERN_INFO PFX "PSB/PST known to be broken.  "
-                                "Trying ACPI instead\n");
-                result = powernow_acpi_init();
-        } else {
-                result = powernow_decode_bios(fidvidstatus.bits.MFID,
-                                fidvidstatus.bits.SVID);
-                if (result) {
-                        printk(KERN_INFO PFX "Trying ACPI perflib\n");
-                        maximum_speed = 0;
-                        minimum_speed = -1;
-                        latency = 0;
-                        result = powernow_acpi_init();
-                        if (result) {
-                                printk(KERN_INFO PFX
-                                        "ACPI and legacy methods failed\n");
-                        }
-                } else {
-                        /* SGTC use the bus clock as timer */
-                        latency = fixup_sgtc();
-                        printk(KERN_INFO PFX "SGTC: %d\n", latency);
-                }
-        }
-
-        if (result)
-                return result;
-
-        printk(KERN_INFO PFX "Minimum speed %d MHz. Maximum speed %d MHz.\n",
-                                minimum_speed/1000, maximum_speed/1000);
-
-        policy->cpuinfo.transition_latency =
-                cpufreq_scale(2000000UL, fsb, latency);
-
-        policy->cur = powernow_get(0);
-
-        cpufreq_frequency_table_get_attr(powernow_table, policy->cpu);
-
-        return cpufreq_frequency_table_cpuinfo(policy, powernow_table);
-}
-
-static int powernow_cpu_exit(struct cpufreq_policy *policy)
-{
-        cpufreq_frequency_table_put_attr(policy->cpu);
-
-#ifdef CONFIG_X86_POWERNOW_K7_ACPI
-        if (acpi_processor_perf) {
-                acpi_processor_unregister_performance(acpi_processor_perf, 0);
-                free_cpumask_var(acpi_processor_perf->shared_cpu_map);
-                kfree(acpi_processor_perf);
-        }
-#endif
-
-        kfree(powernow_table);
-        return 0;
-}
-
-static struct freq_attr *powernow_table_attr[] = {
-        &cpufreq_freq_attr_scaling_available_freqs,
-        NULL,
-};
-
-static struct cpufreq_driver powernow_driver = {
-        .verify         = powernow_verify,
-        .target         = powernow_target,
-        .get            = powernow_get,
-#ifdef CONFIG_X86_POWERNOW_K7_ACPI
-        .bios_limit     = acpi_processor_get_bios_limit,
-#endif
-        .init           = powernow_cpu_init,
-        .exit           = powernow_cpu_exit,
-        .name           = "powernow-k7",
-        .owner          = THIS_MODULE,
-        .attr           = powernow_table_attr,
-};
-
-static int __init powernow_init(void)
-{
-        if (check_powernow() == 0)
-                return -ENODEV;
-        return cpufreq_register_driver(&powernow_driver);
-}
-
-
-static void __exit powernow_exit(void)
-{
-        cpufreq_unregister_driver(&powernow_driver);
-}
-
-module_param(acpi_force,  int, 0444);
-MODULE_PARM_DESC(acpi_force, "Force ACPI to be used.");
-
-MODULE_AUTHOR("Dave Jones <davej@redhat.com>");
-MODULE_DESCRIPTION("Powernow driver for AMD K7 processors.");
-MODULE_LICENSE("GPL");
-
-late_initcall(powernow_init);
-module_exit(powernow_exit);
-
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k7.h b/arch/x86/kernel/cpu/cpufreq/powernow-k7.h
deleted file mode 100644
index 35fb4eaf6e1c..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k7.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- *  (C) 2003 Dave Jones.
- *
- *  Licensed under the terms of the GNU GPL License version 2.
- *
- *  AMD-specific information
- *
- */
-
-union msr_fidvidctl {
-        struct {
-                unsigned FID:5,                 // 4:0
-                reserved1:3,    // 7:5
-                VID:5,                  // 12:8
-                reserved2:3,    // 15:13
-                FIDC:1,                 // 16
-                VIDC:1,                 // 17
-                reserved3:2,    // 19:18
-                FIDCHGRATIO:1,  // 20
-                reserved4:11,   // 31-21
-                SGTC:20,                // 32:51
-                reserved5:12;   // 63:52
-        } bits;
-        unsigned long long val;
-};
-
-union msr_fidvidstatus {
-        struct {
-                unsigned CFID:5,                        // 4:0
-                reserved1:3,    // 7:5
-                SFID:5,                 // 12:8
-                reserved2:3,    // 15:13
-                MFID:5,                 // 20:16
-                reserved3:11,   // 31:21
-                CVID:5,                 // 36:32
-                reserved4:3,    // 39:37
-                SVID:5,                 // 44:40
-                reserved5:3,    // 47:45
-                MVID:5,                 // 52:48
-                reserved6:11;   // 63:53
-        } bits;
-        unsigned long long val;
-};
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
deleted file mode 100644
index 2368e38327b3..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
+++ /dev/null
@@ -1,1607 +0,0 @@
-/*
- *   (c) 2003-2010 Advanced Micro Devices, Inc.
- *  Your use of this code is subject to the terms and conditions of the
- *  GNU general public license version 2. See "COPYING" or
- *  http://www.gnu.org/licenses/gpl.html
- *
- *  Support : mark.langsdorf@amd.com
- *
- *  Based on the powernow-k7.c module written by Dave Jones.
- *  (C) 2003 Dave Jones on behalf of SuSE Labs
- *  (C) 2004 Dominik Brodowski <linux@brodo.de>
- *  (C) 2004 Pavel Machek <pavel@ucw.cz>
- *  Licensed under the terms of the GNU GPL License version 2.
- *  Based upon datasheets & sample CPUs kindly provided by AMD.
- *
- *  Valuable input gratefully received from Dave Jones, Pavel Machek,
- *  Dominik Brodowski, Jacob Shin, and others.
- *  Originally developed by Paul Devriendt.
- *  Processor information obtained from Chapter 9 (Power and Thermal Management)
- *  of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD
- *  Opteron Processors" available for download from www.amd.com
- *
- *  Tables for specific CPUs can be inferred from
- *     http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf
- */
-
-#include <linux/kernel.h>
-#include <linux/smp.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/cpufreq.h>
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <linux/cpumask.h>
-#include <linux/sched.h>        /* for current / set_cpus_allowed() */
-#include <linux/io.h>
-#include <linux/delay.h>
-
-#include <asm/msr.h>
-
-#include <linux/acpi.h>
-#include <linux/mutex.h>
-#include <acpi/processor.h>
-
-#define PFX "powernow-k8: "
-#define VERSION "version 2.20.00"
-#include "powernow-k8.h"
-#include "mperf.h"
-
-/* serialize freq changes  */
-static DEFINE_MUTEX(fidvid_mutex);
-
-static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data);
-
-static int cpu_family = CPU_OPTERON;
-
-/* core performance boost */
-static bool cpb_capable, cpb_enabled;
-static struct msr __percpu *msrs;
-
-static struct cpufreq_driver cpufreq_amd64_driver;
-
-#ifndef CONFIG_SMP
-static inline const struct cpumask *cpu_core_mask(int cpu)
-{
-        return cpumask_of(0);
-}
-#endif
-
-/* Return a frequency in MHz, given an input fid */
-static u32 find_freq_from_fid(u32 fid)
-{
-        return 800 + (fid * 100);
-}
-
-/* Return a frequency in KHz, given an input fid */
-static u32 find_khz_freq_from_fid(u32 fid)
-{
-        return 1000 * find_freq_from_fid(fid);
-}
-
-static u32 find_khz_freq_from_pstate(struct cpufreq_frequency_table *data,
-                u32 pstate)
-{
-        return data[pstate].frequency;
-}
-
-/* Return the vco fid for an input fid
- *
- * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
- * only from corresponding high fids. This returns "high" fid corresponding to
- * "low" one.
- */
-static u32 convert_fid_to_vco_fid(u32 fid)
-{
-        if (fid < HI_FID_TABLE_BOTTOM)
-                return 8 + (2 * fid);
-        else
-                return fid;
-}
-
-/*
- * Return 1 if the pending bit is set. Unless we just instructed the processor
- * to transition to a new state, seeing this bit set is really bad news.
- */
-static int pending_bit_stuck(void)
-{
-        u32 lo, hi;
-
-        if (cpu_family == CPU_HW_PSTATE)
-                return 0;
-
-        rdmsr(MSR_FIDVID_STATUS, lo, hi);
-        return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
-}
-
-/*
- * Update the global current fid / vid values from the status msr.
- * Returns 1 on error.
- */
-static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
-{
-        u32 lo, hi;
-        u32 i = 0;
-
-        if (cpu_family == CPU_HW_PSTATE) {
-                rdmsr(MSR_PSTATE_STATUS, lo, hi);
-                i = lo & HW_PSTATE_MASK;
-                data->currpstate = i;
-
-                /*
-                 * a workaround for family 11h erratum 311 might cause
-                 * an "out-of-range Pstate if the core is in Pstate-0
-                 */
-                if ((boot_cpu_data.x86 == 0x11) && (i >= data->numps))
-                        data->currpstate = HW_PSTATE_0;
-
-                return 0;
-        }
-        do {
-                if (i++ > 10000) {
-                        dprintk("detected change pending stuck\n");
-                        return 1;
-                }
-                rdmsr(MSR_FIDVID_STATUS, lo, hi);
-        } while (lo & MSR_S_LO_CHANGE_PENDING);
-
-        data->currvid = hi & MSR_S_HI_CURRENT_VID;
-        data->currfid = lo & MSR_S_LO_CURRENT_FID;
-
-        return 0;
-}
-
-/* the isochronous relief time */
-static void count_off_irt(struct powernow_k8_data *data)
-{
-        udelay((1 << data->irt) * 10);
-        return;
-}
-
-/* the voltage stabilization time */
-static void count_off_vst(struct powernow_k8_data *data)
-{
-        udelay(data->vstable * VST_UNITS_20US);
-        return;
-}
-
-/* need to init the control msr to a safe value (for each cpu) */
-static void fidvid_msr_init(void)
-{
-        u32 lo, hi;
-        u8 fid, vid;
-
-        rdmsr(MSR_FIDVID_STATUS, lo, hi);
-        vid = hi & MSR_S_HI_CURRENT_VID;
-        fid = lo & MSR_S_LO_CURRENT_FID;
-        lo = fid | (vid << MSR_C_LO_VID_SHIFT);
-        hi = MSR_C_HI_STP_GNT_BENIGN;
-        dprintk("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi);
-        wrmsr(MSR_FIDVID_CTL, lo, hi);
-}
-
-/* write the new fid value along with the other control fields to the msr */
-static int write_new_fid(struct powernow_k8_data *data, u32 fid)
-{
-        u32 lo;
-        u32 savevid = data->currvid;
-        u32 i = 0;
-
-        if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) {
-                printk(KERN_ERR PFX "internal error - overflow on fid write\n");
-                return 1;
-        }
-
-        lo = fid;
-        lo |= (data->currvid << MSR_C_LO_VID_SHIFT);
-        lo |= MSR_C_LO_INIT_FID_VID;
-
-        dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
-                fid, lo, data->plllock * PLL_LOCK_CONVERSION);
-
-        do {
-                wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
-                if (i++ > 100) {
-                        printk(KERN_ERR PFX
-                                "Hardware error - pending bit very stuck - "
-                                "no further pstate changes possible\n");
-                        return 1;
-                }
-        } while (query_current_values_with_pending_wait(data));
-
-        count_off_irt(data);
-
-        if (savevid != data->currvid) {
-                printk(KERN_ERR PFX
-                        "vid change on fid trans, old 0x%x, new 0x%x\n",
-                        savevid, data->currvid);
-                return 1;
-        }
-
-        if (fid != data->currfid) {
-                printk(KERN_ERR PFX
-                        "fid trans failed, fid 0x%x, curr 0x%x\n", fid,
-                        data->currfid);
-                return 1;
-        }
-
-        return 0;
-}
-
-/* Write a new vid to the hardware */
-static int write_new_vid(struct powernow_k8_data *data, u32 vid)
-{
-        u32 lo;
-        u32 savefid = data->currfid;
-        int i = 0;
-
-        if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
-                printk(KERN_ERR PFX "internal error - overflow on vid write\n");
-                return 1;
-        }
-
-        lo = data->currfid;
-        lo |= (vid << MSR_C_LO_VID_SHIFT);
-        lo |= MSR_C_LO_INIT_FID_VID;
-
-        dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
-                vid, lo, STOP_GRANT_5NS);
-
-        do {
-                wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
-                if (i++ > 100) {
-                        printk(KERN_ERR PFX "internal error - pending bit "
-                                        "very stuck - no further pstate "
-                                        "changes possible\n");
-                        return 1;
-                }
-        } while (query_current_values_with_pending_wait(data));
-
-        if (savefid != data->currfid) {
-                printk(KERN_ERR PFX "fid changed on vid trans, old "
-                        "0x%x new 0x%x\n",
-                       savefid, data->currfid);
-                return 1;
-        }
-
-        if (vid != data->currvid) {
-                printk(KERN_ERR PFX "vid trans failed, vid 0x%x, "
-                                "curr 0x%x\n",
-                                vid, data->currvid);
-                return 1;
-        }
-
-        return 0;
-}
-
-/*
- * Reduce the vid by the max of step or reqvid.
- * Decreasing vid codes represent increasing voltages:
- * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
- */
-static int decrease_vid_code_by_step(struct powernow_k8_data *data,
-                u32 reqvid, u32 step)
-{
-        if ((data->currvid - reqvid) > step)
-                reqvid = data->currvid - step;
-
-        if (write_new_vid(data, reqvid))
-                return 1;
-
-        count_off_vst(data);
-
-        return 0;
-}
-
-/* Change hardware pstate by single MSR write */
-static int transition_pstate(struct powernow_k8_data *data, u32 pstate)
-{
-        wrmsr(MSR_PSTATE_CTRL, pstate, 0);
-        data->currpstate = pstate;
-        return 0;
-}
-
-/* Change Opteron/Athlon64 fid and vid, by the 3 phases. */
-static int transition_fid_vid(struct powernow_k8_data *data,
-                u32 reqfid, u32 reqvid)
-{
-        if (core_voltage_pre_transition(data, reqvid, reqfid))
-                return 1;
-
-        if (core_frequency_transition(data, reqfid))
-                return 1;
-
-        if (core_voltage_post_transition(data, reqvid))
-                return 1;
-
-        if (query_current_values_with_pending_wait(data))
-                return 1;
-
-        if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
-                printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, "
-                                "curr 0x%x 0x%x\n",
-                                smp_processor_id(),
-                                reqfid, reqvid, data->currfid, data->currvid);
-                return 1;
-        }
-
-        dprintk("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
-                smp_processor_id(), data->currfid, data->currvid);
-
-        return 0;
-}
-
-/* Phase 1 - core voltage transition ... setup voltage */
-static int core_voltage_pre_transition(struct powernow_k8_data *data,
-                u32 reqvid, u32 reqfid)
-{
-        u32 rvosteps = data->rvo;
-        u32 savefid = data->currfid;
-        u32 maxvid, lo, rvomult = 1;
-
-        dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, "
-                "reqvid 0x%x, rvo 0x%x\n",
-                smp_processor_id(),
-                data->currfid, data->currvid, reqvid, data->rvo);
-
-        if ((savefid < LO_FID_TABLE_TOP) && (reqfid < LO_FID_TABLE_TOP))
-                rvomult = 2;
-        rvosteps *= rvomult;
-        rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
-        maxvid = 0x1f & (maxvid >> 16);
-        dprintk("ph1 maxvid=0x%x\n", maxvid);
-        if (reqvid < maxvid) /* lower numbers are higher voltages */
-                reqvid = maxvid;
-
-        while (data->currvid > reqvid) {
-                dprintk("ph1: curr 0x%x, req vid 0x%x\n",
-                        data->currvid, reqvid);
-                if (decrease_vid_code_by_step(data, reqvid, data->vidmvs))
-                        return 1;
-        }
-
-        while ((rvosteps > 0) &&
-                        ((rvomult * data->rvo + data->currvid) > reqvid)) {
-                if (data->currvid == maxvid) {
-                        rvosteps = 0;
-                } else {
-                        dprintk("ph1: changing vid for rvo, req 0x%x\n",
-                                data->currvid - 1);
-                        if (decrease_vid_code_by_step(data, data->currvid-1, 1))
-                                return 1;
-                        rvosteps--;
-                }
-        }
-
-        if (query_current_values_with_pending_wait(data))
-                return 1;
-
-        if (savefid != data->currfid) {
-                printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n",
-                                data->currfid);
-                return 1;
-        }
-
-        dprintk("ph1 complete, currfid 0x%x, currvid 0x%x\n",
-                data->currfid, data->currvid);
-
-        return 0;
-}
-
-/* Phase 2 - core frequency transition */
-static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
-{
-        u32 vcoreqfid, vcocurrfid, vcofiddiff;
-        u32 fid_interval, savevid = data->currvid;
-
-        if (data->currfid == reqfid) {
-                printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n",
-                                data->currfid);
-                return 0;
-        }
-
-        dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, "
-                "reqfid 0x%x\n",
-                smp_processor_id(),
-                data->currfid, data->currvid, reqfid);
-
-        vcoreqfid = convert_fid_to_vco_fid(reqfid);
-        vcocurrfid = convert_fid_to_vco_fid(data->currfid);
-        vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
-            : vcoreqfid - vcocurrfid;
-
-        if ((reqfid <= LO_FID_TABLE_TOP) && (data->currfid <= LO_FID_TABLE_TOP))
-                vcofiddiff = 0;
-
-        while (vcofiddiff > 2) {
-                (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2);
-
-                if (reqfid > data->currfid) {
-                        if (data->currfid > LO_FID_TABLE_TOP) {
-                                if (write_new_fid(data,
-                                                data->currfid + fid_interval))
-                                        return 1;
-                        } else {
-                                if (write_new_fid
-                                    (data,
-                                     2 + convert_fid_to_vco_fid(data->currfid)))
-                                        return 1;
-                        }
-                } else {
-                        if (write_new_fid(data, data->currfid - fid_interval))
-                                return 1;
-                }
-
-                vcocurrfid = convert_fid_to_vco_fid(data->currfid);
-                vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
-                    : vcoreqfid - vcocurrfid;
-        }
-
-        if (write_new_fid(data, reqfid))
-                return 1;
-
-        if (query_current_values_with_pending_wait(data))
-                return 1;
-
-        if (data->currfid != reqfid) {
-                printk(KERN_ERR PFX
-                        "ph2: mismatch, failed fid transition, "
-                        "curr 0x%x, req 0x%x\n",
-                        data->currfid, reqfid);
-                return 1;
-        }
-
-        if (savevid != data->currvid) {
-                printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n",
-                        savevid, data->currvid);
-                return 1;
-        }
-
-        dprintk("ph2 complete, currfid 0x%x, currvid 0x%x\n",
-                data->currfid, data->currvid);
-
-        return 0;
-}
-
-/* Phase 3 - core voltage transition flow ... jump to the final vid. */
-static int core_voltage_post_transition(struct powernow_k8_data *data,
-                u32 reqvid)
-{
-        u32 savefid = data->currfid;
-        u32 savereqvid = reqvid;
-
-        dprintk("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n",
-                smp_processor_id(),
-                data->currfid, data->currvid);
-
-        if (reqvid != data->currvid) {
-                if (write_new_vid(data, reqvid))
-                        return 1;
-
-                if (savefid != data->currfid) {
-                        printk(KERN_ERR PFX
-                               "ph3: bad fid change, save 0x%x, curr 0x%x\n",
-                               savefid, data->currfid);
-                        return 1;
-                }
-
-                if (data->currvid != reqvid) {
-                        printk(KERN_ERR PFX
-                               "ph3: failed vid transition\n, "
-                               "req 0x%x, curr 0x%x",
-                               reqvid, data->currvid);
-                        return 1;
-                }
-        }
-
-        if (query_current_values_with_pending_wait(data))
-                return 1;
-
-        if (savereqvid != data->currvid) {
-                dprintk("ph3 failed, currvid 0x%x\n", data->currvid);
-                return 1;
-        }
-
-        if (savefid != data->currfid) {
-                dprintk("ph3 failed, currfid changed 0x%x\n",
-                        data->currfid);
-                return 1;
-        }
-
-        dprintk("ph3 complete, currfid 0x%x, currvid 0x%x\n",
-                data->currfid, data->currvid);
-
-        return 0;
-}
-
-static void check_supported_cpu(void *_rc)
-{
-        u32 eax, ebx, ecx, edx;
-        int *rc = _rc;
-
-        *rc = -ENODEV;
-
-        if (__this_cpu_read(cpu_info.x86_vendor) != X86_VENDOR_AMD)
-                return;
-
-        eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
-        if (((eax & CPUID_XFAM) != CPUID_XFAM_K8) &&
-            ((eax & CPUID_XFAM) < CPUID_XFAM_10H))
-                return;
-
-        if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) {
-                if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
-                    ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) {
-                        printk(KERN_INFO PFX
-                                "Processor cpuid %x not supported\n", eax);
-                        return;
-                }
-
-                eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
-                if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
-                        printk(KERN_INFO PFX
-                               "No frequency change capabilities detected\n");
-                        return;
-                }
-
-                cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
-                if ((edx & P_STATE_TRANSITION_CAPABLE)
-                        != P_STATE_TRANSITION_CAPABLE) {
-                        printk(KERN_INFO PFX
-                                "Power state transitions not supported\n");
-                        return;
-                }
-        } else { /* must be a HW Pstate capable processor */
-                cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
-                if ((edx & USE_HW_PSTATE) == USE_HW_PSTATE)
-                        cpu_family = CPU_HW_PSTATE;
-                else
-                        return;
-        }
-
-        *rc = 0;
-}
-
-static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst,
-                u8 maxvid)
-{
-        unsigned int j;
-        u8 lastfid = 0xff;
-
-        for (j = 0; j < data->numps; j++) {
-                if (pst[j].vid > LEAST_VID) {
-                        printk(KERN_ERR FW_BUG PFX "vid %d invalid : 0x%x\n",
-                               j, pst[j].vid);
-                        return -EINVAL;
-                }
-                if (pst[j].vid < data->rvo) {
-                        /* vid + rvo >= 0 */
-                        printk(KERN_ERR FW_BUG PFX "0 vid exceeded with pstate"
-                               " %d\n", j);
-                        return -ENODEV;
-                }
-                if (pst[j].vid < maxvid + data->rvo) {
-                        /* vid + rvo >= maxvid */
-                        printk(KERN_ERR FW_BUG PFX "maxvid exceeded with pstate"
-                               " %d\n", j);
-                        return -ENODEV;
-                }
-                if (pst[j].fid > MAX_FID) {
-                        printk(KERN_ERR FW_BUG PFX "maxfid exceeded with pstate"
-                               " %d\n", j);
-                        return -ENODEV;
-                }
-                if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) {
-                        /* Only first fid is allowed to be in "low" range */
-                        printk(KERN_ERR FW_BUG PFX "two low fids - %d : "
-                               "0x%x\n", j, pst[j].fid);
-                        return -EINVAL;
-                }
-                if (pst[j].fid < lastfid)
-                        lastfid = pst[j].fid;
-        }
-        if (lastfid & 1) {
-                printk(KERN_ERR FW_BUG PFX "lastfid invalid\n");
-                return -EINVAL;
-        }
-        if (lastfid > LO_FID_TABLE_TOP)
-                printk(KERN_INFO FW_BUG PFX
-                        "first fid not from lo freq table\n");
-
-        return 0;
-}
-
-static void invalidate_entry(struct cpufreq_frequency_table *powernow_table,
-                unsigned int entry)
-{
-        powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
-}
-
-static void print_basics(struct powernow_k8_data *data)
-{
-        int j;
-        for (j = 0; j < data->numps; j++) {
-                if (data->powernow_table[j].frequency !=
-                                CPUFREQ_ENTRY_INVALID) {
-                        if (cpu_family == CPU_HW_PSTATE) {
-                                printk(KERN_INFO PFX
-                                        "   %d : pstate %d (%d MHz)\n", j,
-                                        data->powernow_table[j].index,
-                                        data->powernow_table[j].frequency/1000);
-                        } else {
-                                printk(KERN_INFO PFX
-                                        "fid 0x%x (%d MHz), vid 0x%x\n",
-                                        data->powernow_table[j].index & 0xff,
-                                        data->powernow_table[j].frequency/1000,
-                                        data->powernow_table[j].index >> 8);
-                        }
-                }
-        }
-        if (data->batps)
-                printk(KERN_INFO PFX "Only %d pstates on battery\n",
-                                data->batps);
-}
-
-static u32 freq_from_fid_did(u32 fid, u32 did)
-{
-        u32 mhz = 0;
-
-        if (boot_cpu_data.x86 == 0x10)
-                mhz = (100 * (fid + 0x10)) >> did;
-        else if (boot_cpu_data.x86 == 0x11)
-                mhz = (100 * (fid + 8)) >> did;
-        else
-                BUG();
-
-        return mhz * 1000;
-}
-
-static int fill_powernow_table(struct powernow_k8_data *data,
-                struct pst_s *pst, u8 maxvid)
-{
-        struct cpufreq_frequency_table *powernow_table;
-        unsigned int j;
-
-        if (data->batps) {
-                /* use ACPI support to get full speed on mains power */
-                printk(KERN_WARNING PFX
-                        "Only %d pstates usable (use ACPI driver for full "
-                        "range\n", data->batps);
-                data->numps = data->batps;
-        }
-
-        for (j = 1; j < data->numps; j++) {
-                if (pst[j-1].fid >= pst[j].fid) {
-                        printk(KERN_ERR PFX "PST out of sequence\n");
-                        return -EINVAL;
-                }
-        }
-
-        if (data->numps < 2) {
-                printk(KERN_ERR PFX "no p states to transition\n");
-                return -ENODEV;
-        }
-
-        if (check_pst_table(data, pst, maxvid))
-                return -EINVAL;
-
-        powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
-                * (data->numps + 1)), GFP_KERNEL);
-        if (!powernow_table) {
-                printk(KERN_ERR PFX "powernow_table memory alloc failure\n");
-                return -ENOMEM;
-        }
-
-        for (j = 0; j < data->numps; j++) {
-                int freq;
-                powernow_table[j].index = pst[j].fid; /* lower 8 bits */
-                powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */
-                freq = find_khz_freq_from_fid(pst[j].fid);
-                powernow_table[j].frequency = freq;
-        }
-        powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
-        powernow_table[data->numps].index = 0;
-
-        if (query_current_values_with_pending_wait(data)) {
-                kfree(powernow_table);
-                return -EIO;
-        }
-
-        dprintk("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid);
-        data->powernow_table = powernow_table;
-        if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu)
-                print_basics(data);
-
-        for (j = 0; j < data->numps; j++)
-                if ((pst[j].fid == data->currfid) &&
-                    (pst[j].vid == data->currvid))
-                        return 0;
-
-        dprintk("currfid/vid do not match PST, ignoring\n");
-        return 0;
-}
-
-/* Find and validate the PSB/PST table in BIOS. */
-static int find_psb_table(struct powernow_k8_data *data)
-{
-        struct psb_s *psb;
-        unsigned int i;
-        u32 mvs;
-        u8 maxvid;
-        u32 cpst = 0;
-        u32 thiscpuid;
-
-        for (i = 0xc0000; i < 0xffff0; i += 0x10) {
-                /* Scan BIOS looking for the signature. */
-                /* It can not be at ffff0 - it is too big. */
-
-                psb = phys_to_virt(i);
-                if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0)
-                        continue;
-
-                dprintk("found PSB header at 0x%p\n", psb);
-
-                dprintk("table vers: 0x%x\n", psb->tableversion);
-                if (psb->tableversion != PSB_VERSION_1_4) {
-                        printk(KERN_ERR FW_BUG PFX "PSB table is not v1.4\n");
-                        return -ENODEV;
-                }
-
-                dprintk("flags: 0x%x\n", psb->flags1);
-                if (psb->flags1) {
-                        printk(KERN_ERR FW_BUG PFX "unknown flags\n");
-                        return -ENODEV;
-                }
-
-                data->vstable = psb->vstable;
-                dprintk("voltage stabilization time: %d(*20us)\n",
-                                data->vstable);
-
-                dprintk("flags2: 0x%x\n", psb->flags2);
-                data->rvo = psb->flags2 & 3;
-                data->irt = ((psb->flags2) >> 2) & 3;
-                mvs = ((psb->flags2) >> 4) & 3;
-                data->vidmvs = 1 << mvs;
-                data->batps = ((psb->flags2) >> 6) & 3;
-
-                dprintk("ramp voltage offset: %d\n", data->rvo);
-                dprintk("isochronous relief time: %d\n", data->irt);
-                dprintk("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs);
-
-                dprintk("numpst: 0x%x\n", psb->num_tables);
-                cpst = psb->num_tables;
-                if ((psb->cpuid == 0x00000fc0) ||
-                    (psb->cpuid == 0x00000fe0)) {
-                        thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
-                        if ((thiscpuid == 0x00000fc0) ||
-                            (thiscpuid == 0x00000fe0))
-                                cpst = 1;
-                }
-                if (cpst != 1) {
-                        printk(KERN_ERR FW_BUG PFX "numpst must be 1\n");
-                        return -ENODEV;
-                }
-
-                data->plllock = psb->plllocktime;
-                dprintk("plllocktime: 0x%x (units 1us)\n", psb->plllocktime);
-                dprintk("maxfid: 0x%x\n", psb->maxfid);
-                dprintk("maxvid: 0x%x\n", psb->maxvid);
-                maxvid = psb->maxvid;
-
-                data->numps = psb->numps;
-                dprintk("numpstates: 0x%x\n", data->numps);
-                return fill_powernow_table(data,
-                                (struct pst_s *)(psb+1), maxvid);
-        }
-        /*
-         * If you see this message, complain to BIOS manufacturer. If
-         * he tells you "we do not support Linux" or some similar
-         * nonsense, remember that Windows 2000 uses the same legacy
-         * mechanism that the old Linux PSB driver uses. Tell them it
-         * is broken with Windows 2000.
-         *
-         * The reference to the AMD documentation is chapter 9 in the
-         * BIOS and Kernel Developer's Guide, which is available on
-         * www.amd.com
-         */
-        printk(KERN_ERR FW_BUG PFX "No PSB or ACPI _PSS objects\n");
-        printk(KERN_ERR PFX "Make sure that your BIOS is up to date"
-                " and Cool'N'Quiet support is enabled in BIOS setup\n");
-        return -ENODEV;
-}
-
-static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data,
-                unsigned int index)
-{
-        u64 control;
-
-        if (!data->acpi_data.state_count || (cpu_family == CPU_HW_PSTATE))
-                return;
-
-        control = data->acpi_data.states[index].control;
-        data->irt = (control >> IRT_SHIFT) & IRT_MASK;
-        data->rvo = (control >> RVO_SHIFT) & RVO_MASK;
-        data->exttype = (control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
-        data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK;
-        data->vidmvs = 1 << ((control >> MVS_SHIFT) & MVS_MASK);
-        data->vstable = (control >> VST_SHIFT) & VST_MASK;
-}
-
-static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
-{
-        struct cpufreq_frequency_table *powernow_table;
-        int ret_val = -ENODEV;
-        u64 control, status;
-
-        if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
-                dprintk("register performance failed: bad ACPI data\n");
-                return -EIO;
-        }
-
-        /* verify the data contained in the ACPI structures */
-        if (data->acpi_data.state_count <= 1) {
-                dprintk("No ACPI P-States\n");
-                goto err_out;
-        }
-
-        control = data->acpi_data.control_register.space_id;
-        status = data->acpi_data.status_register.space_id;
-
-        if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
-            (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
-                dprintk("Invalid control/status registers (%x - %x)\n",
-                        control, status);
-                goto err_out;
-        }
-
-        /* fill in data->powernow_table */
-        powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
-                * (data->acpi_data.state_count + 1)), GFP_KERNEL);
-        if (!powernow_table) {
-                dprintk("powernow_table memory alloc failure\n");
-                goto err_out;
-        }
-
-        /* fill in data */
-        data->numps = data->acpi_data.state_count;
-        powernow_k8_acpi_pst_values(data, 0);
-
-        if (cpu_family == CPU_HW_PSTATE)
-                ret_val = fill_powernow_table_pstate(data, powernow_table);
-        else
-                ret_val = fill_powernow_table_fidvid(data, powernow_table);
-        if (ret_val)
-                goto err_out_mem;
-
-        powernow_table[data->acpi_data.state_count].frequency =
-                CPUFREQ_TABLE_END;
-        powernow_table[data->acpi_data.state_count].index = 0;
-        data->powernow_table = powernow_table;
-
-        if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu)
-                print_basics(data);
-
-        /* notify BIOS that we exist */
-        acpi_processor_notify_smm(THIS_MODULE);
-
-        if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) {
-                printk(KERN_ERR PFX
-                                "unable to alloc powernow_k8_data cpumask\n");
-                ret_val = -ENOMEM;
-                goto err_out_mem;
-        }
-
-        return 0;
-
-err_out_mem:
-        kfree(powernow_table);
-
-err_out:
-        acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
-
-        /* data->acpi_data.state_count informs us at ->exit()
-         * whether ACPI was used */
-        data->acpi_data.state_count = 0;
-
-        return ret_val;
-}
-
-static int fill_powernow_table_pstate(struct powernow_k8_data *data,
-                struct cpufreq_frequency_table *powernow_table)
-{
-        int i;
-        u32 hi = 0, lo = 0;
-        rdmsr(MSR_PSTATE_CUR_LIMIT, lo, hi);
-        data->max_hw_pstate = (lo & HW_PSTATE_MAX_MASK) >> HW_PSTATE_MAX_SHIFT;
-
-        for (i = 0; i < data->acpi_data.state_count; i++) {
-                u32 index;
-
-                index = data->acpi_data.states[i].control & HW_PSTATE_MASK;
-                if (index > data->max_hw_pstate) {
-                        printk(KERN_ERR PFX "invalid pstate %d - "
-                                        "bad value %d.\n", i, index);
-                        printk(KERN_ERR PFX "Please report to BIOS "
-                                        "manufacturer\n");
-                        invalidate_entry(powernow_table, i);
-                        continue;
-                }
-                rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi);
-                if (!(hi & HW_PSTATE_VALID_MASK)) {
-                        dprintk("invalid pstate %d, ignoring\n", index);
-                        invalidate_entry(powernow_table, i);
-                        continue;
-                }
-
-                powernow_table[i].index = index;
-
-                /* Frequency may be rounded for these */
-                if ((boot_cpu_data.x86 == 0x10 && boot_cpu_data.x86_model < 10)
-                                 || boot_cpu_data.x86 == 0x11) {
-                        powernow_table[i].frequency =
-                                freq_from_fid_did(lo & 0x3f, (lo >> 6) & 7);
-                } else
-                        powernow_table[i].frequency =
-                                data->acpi_data.states[i].core_frequency * 1000;
-        }
-        return 0;
-}
-
-static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
-                struct cpufreq_frequency_table *powernow_table)
-{
-        int i;
-
-        for (i = 0; i < data->acpi_data.state_count; i++) {
-                u32 fid;
-                u32 vid;
-                u32 freq, index;
-                u64 status, control;
-
-                if (data->exttype) {
-                        status =  data->acpi_data.states[i].status;
-                        fid = status & EXT_FID_MASK;
-                        vid = (status >> VID_SHIFT) & EXT_VID_MASK;
-                } else {
-                        control =  data->acpi_data.states[i].control;
-                        fid = control & FID_MASK;
-                        vid = (control >> VID_SHIFT) & VID_MASK;
-                }
-
-                dprintk("   %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
-
-                index = fid | (vid<<8);
-                powernow_table[i].index = index;
-
-                freq = find_khz_freq_from_fid(fid);
-                powernow_table[i].frequency = freq;
-
-                /* verify frequency is OK */
-                if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) {
-                        dprintk("invalid freq %u kHz, ignoring\n", freq);
-                        invalidate_entry(powernow_table, i);
-                        continue;
-                }
-
-                /* verify voltage is OK -
-                 * BIOSs are using "off" to indicate invalid */
-                if (vid == VID_OFF) {
-                        dprintk("invalid vid %u, ignoring\n", vid);
-                        invalidate_entry(powernow_table, i);
-                        continue;
-                }
-
-                if (freq != (data->acpi_data.states[i].core_frequency * 1000)) {
-                        printk(KERN_INFO PFX "invalid freq entries "
-                                "%u kHz vs. %u kHz\n", freq,
-                                (unsigned int)
-                                (data->acpi_data.states[i].core_frequency
-                                 * 1000));
-                        invalidate_entry(powernow_table, i);
-                        continue;
-                }
-        }
-        return 0;
-}
-
-static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
-{
-        if (data->acpi_data.state_count)
-                acpi_processor_unregister_performance(&data->acpi_data,
-                                data->cpu);
-        free_cpumask_var(data->acpi_data.shared_cpu_map);
-}
-
-static int get_transition_latency(struct powernow_k8_data *data)
-{
-        int max_latency = 0;
-        int i;
-        for (i = 0; i < data->acpi_data.state_count; i++) {
-                int cur_latency = data->acpi_data.states[i].transition_latency
-                        + data->acpi_data.states[i].bus_master_latency;
-                if (cur_latency > max_latency)
-                        max_latency = cur_latency;
-        }
-        if (max_latency == 0) {
-                /*
-                 * Fam 11h and later may return 0 as transition latency. This
-                 * is intended and means "very fast". While cpufreq core and
-                 * governors currently can handle that gracefully, better set it
-                 * to 1 to avoid problems in the future.
-                 */
-                if (boot_cpu_data.x86 < 0x11)
-                        printk(KERN_ERR FW_WARN PFX "Invalid zero transition "
-                                "latency\n");
-                max_latency = 1;
-        }
-        /* value in usecs, needs to be in nanoseconds */
-        return 1000 * max_latency;
-}
-
-/* Take a frequency, and issue the fid/vid transition command */
-static int transition_frequency_fidvid(struct powernow_k8_data *data,
-                unsigned int index)
-{
-        u32 fid = 0;
-        u32 vid = 0;
-        int res, i;
-        struct cpufreq_freqs freqs;
-
-        dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
-
-        /* fid/vid correctness check for k8 */
-        /* fid are the lower 8 bits of the index we stored into
-         * the cpufreq frequency table in find_psb_table, vid
-         * are the upper 8 bits.
-         */
-        fid = data->powernow_table[index].index & 0xFF;
-        vid = (data->powernow_table[index].index & 0xFF00) >> 8;
-
-        dprintk("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
-
-        if (query_current_values_with_pending_wait(data))
-                return 1;
-
-        if ((data->currvid == vid) && (data->currfid == fid)) {
-                dprintk("target matches current values (fid 0x%x, vid 0x%x)\n",
-                        fid, vid);
-                return 0;
-        }
-
-        dprintk("cpu %d, changing to fid 0x%x, vid 0x%x\n",
-                smp_processor_id(), fid, vid);
-        freqs.old = find_khz_freq_from_fid(data->currfid);
-        freqs.new = find_khz_freq_from_fid(fid);
-
-        for_each_cpu(i, data->available_cores) {
-                freqs.cpu = i;
-                cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-        }
-
-        res = transition_fid_vid(data, fid, vid);
-        freqs.new = find_khz_freq_from_fid(data->currfid);
-
-        for_each_cpu(i, data->available_cores) {
-                freqs.cpu = i;
-                cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-        }
-        return res;
-}
-
-/* Take a frequency, and issue the hardware pstate transition command */
-static int transition_frequency_pstate(struct powernow_k8_data *data,
-                unsigned int index)
-{
-        u32 pstate = 0;
-        int res, i;
-        struct cpufreq_freqs freqs;
-
-        dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
-
-        /* get MSR index for hardware pstate transition */
-        pstate = index & HW_PSTATE_MASK;
-        if (pstate > data->max_hw_pstate)
-                return 0;
-        freqs.old = find_khz_freq_from_pstate(data->powernow_table,
-                        data->currpstate);
-        freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
-
-        for_each_cpu(i, data->available_cores) {
-                freqs.cpu = i;
-                cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-        }
-
-        res = transition_pstate(data, pstate);
-        freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
-
-        for_each_cpu(i, data->available_cores) {
-                freqs.cpu = i;
-                cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-        }
-        return res;
-}
-
-/* Driver entry point to switch to the target frequency */
-static int powernowk8_target(struct cpufreq_policy *pol,
-                unsigned targfreq, unsigned relation)
-{
-        cpumask_var_t oldmask;
-        struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
-        u32 checkfid;
-        u32 checkvid;
-        unsigned int newstate;
-        int ret = -EIO;
-
-        if (!data)
-                return -EINVAL;
-
-        checkfid = data->currfid;
-        checkvid = data->currvid;
-
-        /* only run on specific CPU from here on. */
-        /* This is poor form: use a workqueue or smp_call_function_single */
-        if (!alloc_cpumask_var(&oldmask, GFP_KERNEL))
-                return -ENOMEM;
-
-        cpumask_copy(oldmask, tsk_cpus_allowed(current));
-        set_cpus_allowed_ptr(current, cpumask_of(pol->cpu));
-
-        if (smp_processor_id() != pol->cpu) {
-                printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu);
-                goto err_out;
-        }
-
-        if (pending_bit_stuck()) {
-                printk(KERN_ERR PFX "failing targ, change pending bit set\n");
-                goto err_out;
-        }
-
-        dprintk("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n",
-                pol->cpu, targfreq, pol->min, pol->max, relation);
-
-        if (query_current_values_with_pending_wait(data))
-                goto err_out;
-
-        if (cpu_family != CPU_HW_PSTATE) {
-                dprintk("targ: curr fid 0x%x, vid 0x%x\n",
-                data->currfid, data->currvid);
-
-                if ((checkvid != data->currvid) ||
-                    (checkfid != data->currfid)) {
-                        printk(KERN_INFO PFX
-                                "error - out of sync, fix 0x%x 0x%x, "
-                                "vid 0x%x 0x%x\n",
-                                checkfid, data->currfid,
-                                checkvid, data->currvid);
-                }
-        }
-
-        if (cpufreq_frequency_table_target(pol, data->powernow_table,
-                                targfreq, relation, &newstate))
-                goto err_out;
-
-        mutex_lock(&fidvid_mutex);
-
-        powernow_k8_acpi_pst_values(data, newstate);
-
-        if (cpu_family == CPU_HW_PSTATE)
-                ret = transition_frequency_pstate(data, newstate);
-        else
-                ret = transition_frequency_fidvid(data, newstate);
-        if (ret) {
-                printk(KERN_ERR PFX "transition frequency failed\n");
-                ret = 1;
-                mutex_unlock(&fidvid_mutex);
-                goto err_out;
-        }
-        mutex_unlock(&fidvid_mutex);
-
-        if (cpu_family == CPU_HW_PSTATE)
-                pol->cur = find_khz_freq_from_pstate(data->powernow_table,
-                                newstate);
-        else
-                pol->cur = find_khz_freq_from_fid(data->currfid);
-        ret = 0;
-
-err_out:
-        set_cpus_allowed_ptr(current, oldmask);
-        free_cpumask_var(oldmask);
-        return ret;
-}
-
-/* Driver entry point to verify the policy and range of frequencies */
-static int powernowk8_verify(struct cpufreq_policy *pol)
-{
-        struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
-
-        if (!data)
-                return -EINVAL;
-
-        return cpufreq_frequency_table_verify(pol, data->powernow_table);
-}
-
-struct init_on_cpu {
-        struct powernow_k8_data *data;
-        int rc;
-};
-
-static void __cpuinit powernowk8_cpu_init_on_cpu(void *_init_on_cpu)
-{
-        struct init_on_cpu *init_on_cpu = _init_on_cpu;
-
-        if (pending_bit_stuck()) {
-                printk(KERN_ERR PFX "failing init, change pending bit set\n");
-                init_on_cpu->rc = -ENODEV;
-                return;
-        }
-
-        if (query_current_values_with_pending_wait(init_on_cpu->data)) {
-                init_on_cpu->rc = -ENODEV;
-                return;
-        }
-
-        if (cpu_family == CPU_OPTERON)
-                fidvid_msr_init();
-
-        init_on_cpu->rc = 0;
-}
-
-/* per CPU init entry point to the driver */
-static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
-{
-        static const char ACPI_PSS_BIOS_BUG_MSG[] =
-                KERN_ERR FW_BUG PFX "No compatible ACPI _PSS objects found.\n"
-                FW_BUG PFX "Try again with latest BIOS.\n";
-        struct powernow_k8_data *data;
-        struct init_on_cpu init_on_cpu;
-        int rc;
-        struct cpuinfo_x86 *c = &cpu_data(pol->cpu);
-
-        if (!cpu_online(pol->cpu))
-                return -ENODEV;
-
-        smp_call_function_single(pol->cpu, check_supported_cpu, &rc, 1);
-        if (rc)
-                return -ENODEV;
-
-        data = kzalloc(sizeof(struct powernow_k8_data), GFP_KERNEL);
-        if (!data) {
-                printk(KERN_ERR PFX "unable to alloc powernow_k8_data");
-                return -ENOMEM;
-        }
-
-        data->cpu = pol->cpu;
-        data->currpstate = HW_PSTATE_INVALID;
-
-        if (powernow_k8_cpu_init_acpi(data)) {
-                /*
-                 * Use the PSB BIOS structure. This is only available on
-                 * an UP version, and is deprecated by AMD.
-                 */
-                if (num_online_cpus() != 1) {
-                        printk_once(ACPI_PSS_BIOS_BUG_MSG);
-                        goto err_out;
-                }
-                if (pol->cpu != 0) {
-                        printk(KERN_ERR FW_BUG PFX "No ACPI _PSS objects for "
-                               "CPU other than CPU0. Complain to your BIOS "
-                               "vendor.\n");
-                        goto err_out;
-                }
-                rc = find_psb_table(data);
-                if (rc)
-                        goto err_out;
-
-                /* Take a crude guess here.
-                 * That guess was in microseconds, so multiply with 1000 */
-                pol->cpuinfo.transition_latency = (
-                         ((data->rvo + 8) * data->vstable * VST_UNITS_20US) +
-                         ((1 << data->irt) * 30)) * 1000;
-        } else /* ACPI _PSS objects available */
-                pol->cpuinfo.transition_latency = get_transition_latency(data);
-
-        /* only run on specific CPU from here on */
-        init_on_cpu.data = data;
-        smp_call_function_single(data->cpu, powernowk8_cpu_init_on_cpu,
-                                 &init_on_cpu, 1);
-        rc = init_on_cpu.rc;
-        if (rc != 0)
-                goto err_out_exit_acpi;
-
-        if (cpu_family == CPU_HW_PSTATE)
-                cpumask_copy(pol->cpus, cpumask_of(pol->cpu));
-        else
-                cpumask_copy(pol->cpus, cpu_core_mask(pol->cpu));
-        data->available_cores = pol->cpus;
-
-        if (cpu_family == CPU_HW_PSTATE)
-                pol->cur = find_khz_freq_from_pstate(data->powernow_table,
-                                data->currpstate);
-        else
-                pol->cur = find_khz_freq_from_fid(data->currfid);
-        dprintk("policy current frequency %d kHz\n", pol->cur);
-
-        /* min/max the cpu is capable of */
-        if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) {
-                printk(KERN_ERR FW_BUG PFX "invalid powernow_table\n");
-                powernow_k8_cpu_exit_acpi(data);
-                kfree(data->powernow_table);
-                kfree(data);
-                return -EINVAL;
-        }
-
-        /* Check for APERF/MPERF support in hardware */
-        if (cpu_has(c, X86_FEATURE_APERFMPERF))
-                cpufreq_amd64_driver.getavg = cpufreq_get_measured_perf;
-
-        cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
-
-        if (cpu_family == CPU_HW_PSTATE)
-                dprintk("cpu_init done, current pstate 0x%x\n",
-                                data->currpstate);
-        else
-                dprintk("cpu_init done, current fid 0x%x, vid 0x%x\n",
-                        data->currfid, data->currvid);
-
-        per_cpu(powernow_data, pol->cpu) = data;
-
-        return 0;
-
-err_out_exit_acpi:
-        powernow_k8_cpu_exit_acpi(data);
-
-err_out:
-        kfree(data);
-        return -ENODEV;
-}
-
-static int __devexit powernowk8_cpu_exit(struct cpufreq_policy *pol)
-{
-        struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
-
-        if (!data)
-                return -EINVAL;
-
-        powernow_k8_cpu_exit_acpi(data);
-
-        cpufreq_frequency_table_put_attr(pol->cpu);
-
-        kfree(data->powernow_table);
-        kfree(data);
-        per_cpu(powernow_data, pol->cpu) = NULL;
-
-        return 0;
-}
-
-static void query_values_on_cpu(void *_err)
-{
-        int *err = _err;
-        struct powernow_k8_data *data = __this_cpu_read(powernow_data);
-
-        *err = query_current_values_with_pending_wait(data);
-}
-
-static unsigned int powernowk8_get(unsigned int cpu)
-{
-        struct powernow_k8_data *data = per_cpu(powernow_data, cpu);
-        unsigned int khz = 0;
-        int err;
-
-        if (!data)
-                return 0;
-
-        smp_call_function_single(cpu, query_values_on_cpu, &err, true);
-        if (err)
-                goto out;
-
-        if (cpu_family == CPU_HW_PSTATE)
-                khz = find_khz_freq_from_pstate(data->powernow_table,
-                                                data->currpstate);
-        else
-                khz = find_khz_freq_from_fid(data->currfid);
-
-
-out:
-        return khz;
-}
-
-static void _cpb_toggle_msrs(bool t)
-{
-        int cpu;
-
-        get_online_cpus();
-
-        rdmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs);
-
-        for_each_cpu(cpu, cpu_online_mask) {
-                struct msr *reg = per_cpu_ptr(msrs, cpu);
-                if (t)
-                        reg->l &= ~BIT(25);
-                else
-                        reg->l |= BIT(25);
-        }
-        wrmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs);
-
-        put_online_cpus();
-}
-
-/*
- * Switch on/off core performance boosting.
- *
- * 0=disable
- * 1=enable.
- */
-static void cpb_toggle(bool t)
-{
-        if (!cpb_capable)
-                return;
-
-        if (t && !cpb_enabled) {
-                cpb_enabled = true;
-                _cpb_toggle_msrs(t);
-                printk(KERN_INFO PFX "Core Boosting enabled.\n");
-        } else if (!t && cpb_enabled) {
-                cpb_enabled = false;
-                _cpb_toggle_msrs(t);
-                printk(KERN_INFO PFX "Core Boosting disabled.\n");
-        }
-}
-
-static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
-                                 size_t count)
-{
-        int ret = -EINVAL;
-        unsigned long val = 0;
-
-        ret = strict_strtoul(buf, 10, &val);
-        if (!ret && (val == 0 || val == 1) && cpb_capable)
-                cpb_toggle(val);
-        else
-                return -EINVAL;
-
-        return count;
-}
-
-static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
-{
-        return sprintf(buf, "%u\n", cpb_enabled);
-}
-
-#define define_one_rw(_name) \
-static struct freq_attr _name = \
-__ATTR(_name, 0644, show_##_name, store_##_name)
-
-define_one_rw(cpb);
-
-static struct freq_attr *powernow_k8_attr[] = {
-        &cpufreq_freq_attr_scaling_available_freqs,
-        &cpb,
-        NULL,
-};
-
-static struct cpufreq_driver cpufreq_amd64_driver = {
-        .verify         = powernowk8_verify,
-        .target         = powernowk8_target,
-        .bios_limit     = acpi_processor_get_bios_limit,
-        .init           = powernowk8_cpu_init,
-        .exit           = __devexit_p(powernowk8_cpu_exit),
-        .get            = powernowk8_get,
-        .name           = "powernow-k8",
-        .owner          = THIS_MODULE,
-        .attr           = powernow_k8_attr,
-};
-
-/*
- * Clear the boost-disable flag on the CPU_DOWN path so that this cpu
- * cannot block the remaining ones from boosting. On the CPU_UP path we
- * simply keep the boost-disable flag in sync with the current global
- * state.
- */
-static int cpb_notify(struct notifier_block *nb, unsigned long action,
-                      void *hcpu)
-{
-        unsigned cpu = (long)hcpu;
-        u32 lo, hi;
-
-        switch (action) {
-        case CPU_UP_PREPARE:
-        case CPU_UP_PREPARE_FROZEN:
-
-                if (!cpb_enabled) {
-                        rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
-                        lo |= BIT(25);
-                        wrmsr_on_cpu(cpu, MSR_K7_HWCR, lo, hi);
-                }
-                break;
-
-        case CPU_DOWN_PREPARE:
-        case CPU_DOWN_PREPARE_FROZEN:
-                rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
-                lo &= ~BIT(25);
-                wrmsr_on_cpu(cpu, MSR_K7_HWCR, lo, hi);
-                break;
-
-        default:
-                break;
-        }
-
-        return NOTIFY_OK;
-}
-
-static struct notifier_block cpb_nb = {
-        .notifier_call          = cpb_notify,
-};
-
-/* driver entry point for init */
-static int __cpuinit powernowk8_init(void)
-{
-        unsigned int i, supported_cpus = 0, cpu;
-        int rv;
-
-        for_each_online_cpu(i) {
-                int rc;
-                smp_call_function_single(i, check_supported_cpu, &rc, 1);
-                if (rc == 0)
-                        supported_cpus++;
-        }
-
-        if (supported_cpus != num_online_cpus())
-                return -ENODEV;
-
-        printk(KERN_INFO PFX "Found %d %s (%d cpu cores) (" VERSION ")\n",
-                num_online_nodes(), boot_cpu_data.x86_model_id, supported_cpus);
-
-        if (boot_cpu_has(X86_FEATURE_CPB)) {
-
-                cpb_capable = true;
-
-                msrs = msrs_alloc();
-                if (!msrs) {
-                        printk(KERN_ERR "%s: Error allocating msrs!\n", __func__);
-                        return -ENOMEM;
-                }
-
-                register_cpu_notifier(&cpb_nb);
-
-                rdmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs);
-
-                for_each_cpu(cpu, cpu_online_mask) {
-                        struct msr *reg = per_cpu_ptr(msrs, cpu);
-                        cpb_enabled |= !(!!(reg->l & BIT(25)));
-                }
-
-                printk(KERN_INFO PFX "Core Performance Boosting: %s.\n",
-                        (cpb_enabled ? "on" : "off"));
-        }
-
-        rv = cpufreq_register_driver(&cpufreq_amd64_driver);
-        if (rv < 0 && boot_cpu_has(X86_FEATURE_CPB)) {
-                unregister_cpu_notifier(&cpb_nb);
-                msrs_free(msrs);
-                msrs = NULL;
-        }
-        return rv;
-}
-
-/* driver entry point for term */
-static void __exit powernowk8_exit(void)
-{
-        dprintk("exit\n");
-
-        if (boot_cpu_has(X86_FEATURE_CPB)) {
-                msrs_free(msrs);
-                msrs = NULL;
-
-                unregister_cpu_notifier(&cpb_nb);
-        }
-
-        cpufreq_unregister_driver(&cpufreq_amd64_driver);
-}
-
-MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and "
-                "Mark Langsdorf <mark.langsdorf@amd.com>");
-MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
-MODULE_LICENSE("GPL");
-
-late_initcall(powernowk8_init);
-module_exit(powernowk8_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.h b/arch/x86/kernel/cpu/cpufreq/powernow-k8.h
deleted file mode 100644
index df3529b1c02d..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.h
+++ /dev/null
@@ -1,224 +0,0 @@
-/*
- *  (c) 2003-2006 Advanced Micro Devices, Inc.
- *  Your use of this code is subject to the terms and conditions of the
- *  GNU general public license version 2. See "COPYING" or
- *  http://www.gnu.org/licenses/gpl.html
- */
-
-enum pstate {
-        HW_PSTATE_INVALID = 0xff,
-        HW_PSTATE_0 = 0,
-        HW_PSTATE_1 = 1,
-        HW_PSTATE_2 = 2,
-        HW_PSTATE_3 = 3,
-        HW_PSTATE_4 = 4,
-        HW_PSTATE_5 = 5,
-        HW_PSTATE_6 = 6,
-        HW_PSTATE_7 = 7,
-};
-
-struct powernow_k8_data {
-        unsigned int cpu;
-
-        u32 numps;  /* number of p-states */
-        u32 batps;  /* number of p-states supported on battery */
-        u32 max_hw_pstate; /* maximum legal hardware pstate */
-
-        /* these values are constant when the PSB is used to determine
-         * vid/fid pairings, but are modified during the ->target() call
-         * when ACPI is used */
-        u32 rvo;     /* ramp voltage offset */
-        u32 irt;     /* isochronous relief time */
-        u32 vidmvs;  /* usable value calculated from mvs */
-        u32 vstable; /* voltage stabilization time, units 20 us */
-        u32 plllock; /* pll lock time, units 1 us */
-        u32 exttype; /* extended interface = 1 */
-
-        /* keep track of the current fid / vid or pstate */
-        u32 currvid;
-        u32 currfid;
-        enum pstate currpstate;
-
-        /* the powernow_table includes all frequency and vid/fid pairings:
-         * fid are the lower 8 bits of the index, vid are the upper 8 bits.
-         * frequency is in kHz */
-        struct cpufreq_frequency_table  *powernow_table;
-
-        /* the acpi table needs to be kept. it's only available if ACPI was
-         * used to determine valid frequency/vid/fid states */
-        struct acpi_processor_performance acpi_data;
-
-        /* we need to keep track of associated cores, but let cpufreq
-         * handle hotplug events - so just point at cpufreq pol->cpus
-         * structure */
-        struct cpumask *available_cores;
-};
-
-/* processor's cpuid instruction support */
-#define CPUID_PROCESSOR_SIGNATURE       1       /* function 1 */
-#define CPUID_XFAM                      0x0ff00000      /* extended family */
-#define CPUID_XFAM_K8                   0
-#define CPUID_XMOD                      0x000f0000      /* extended model */
-#define CPUID_XMOD_REV_MASK             0x000c0000
-#define CPUID_XFAM_10H                  0x00100000      /* family 0x10 */
-#define CPUID_USE_XFAM_XMOD             0x00000f00
-#define CPUID_GET_MAX_CAPABILITIES      0x80000000
-#define CPUID_FREQ_VOLT_CAPABILITIES    0x80000007
-#define P_STATE_TRANSITION_CAPABLE      6
-
-/* Model Specific Registers for p-state transitions. MSRs are 64-bit. For     */
-/* writes (wrmsr - opcode 0f 30), the register number is placed in ecx, and   */
-/* the value to write is placed in edx:eax. For reads (rdmsr - opcode 0f 32), */
-/* the register number is placed in ecx, and the data is returned in edx:eax. */
-
-#define MSR_FIDVID_CTL      0xc0010041
-#define MSR_FIDVID_STATUS   0xc0010042
-
-/* Field definitions within the FID VID Low Control MSR : */
-#define MSR_C_LO_INIT_FID_VID     0x00010000
-#define MSR_C_LO_NEW_VID          0x00003f00
-#define MSR_C_LO_NEW_FID          0x0000003f
-#define MSR_C_LO_VID_SHIFT        8
-
-/* Field definitions within the FID VID High Control MSR : */
-#define MSR_C_HI_STP_GNT_TO       0x000fffff
-
-/* Field definitions within the FID VID Low Status MSR : */
-#define MSR_S_LO_CHANGE_PENDING   0x80000000   /* cleared when completed */
-#define MSR_S_LO_MAX_RAMP_VID     0x3f000000
-#define MSR_S_LO_MAX_FID          0x003f0000
-#define MSR_S_LO_START_FID        0x00003f00
-#define MSR_S_LO_CURRENT_FID      0x0000003f
-
-/* Field definitions within the FID VID High Status MSR : */
-#define MSR_S_HI_MIN_WORKING_VID  0x3f000000
-#define MSR_S_HI_MAX_WORKING_VID  0x003f0000
-#define MSR_S_HI_START_VID        0x00003f00
-#define MSR_S_HI_CURRENT_VID      0x0000003f
-#define MSR_C_HI_STP_GNT_BENIGN   0x00000001
-
-
-/* Hardware Pstate _PSS and MSR definitions */
-#define USE_HW_PSTATE           0x00000080
-#define HW_PSTATE_MASK          0x00000007
-#define HW_PSTATE_VALID_MASK    0x80000000
-#define HW_PSTATE_MAX_MASK      0x000000f0
-#define HW_PSTATE_MAX_SHIFT     4
-#define MSR_PSTATE_DEF_BASE     0xc0010064 /* base of Pstate MSRs */
-#define MSR_PSTATE_STATUS       0xc0010063 /* Pstate Status MSR */
-#define MSR_PSTATE_CTRL         0xc0010062 /* Pstate control MSR */
-#define MSR_PSTATE_CUR_LIMIT    0xc0010061 /* pstate current limit MSR */
-
-/* define the two driver architectures */
-#define CPU_OPTERON 0
-#define CPU_HW_PSTATE 1
-
-
-/*
- * There are restrictions frequencies have to follow:
- * - only 1 entry in the low fid table ( <=1.4GHz )
- * - lowest entry in the high fid table must be >= 2 * the entry in the
- *   low fid table
- * - lowest entry in the high fid table must be a <= 200MHz + 2 * the entry
- *   in the low fid table
- * - the parts can only step at <= 200 MHz intervals, odd fid values are
- *   supported in revision G and later revisions.
- * - lowest frequency must be >= interprocessor hypertransport link speed
- *   (only applies to MP systems obviously)
- */
-
-/* fids (frequency identifiers) are arranged in 2 tables - lo and hi */
-#define LO_FID_TABLE_TOP     7  /* fid values marking the boundary    */
-#define HI_FID_TABLE_BOTTOM  8  /* between the low and high tables    */
-
-#define LO_VCOFREQ_TABLE_TOP    1400    /* corresponding vco frequency values */
-#define HI_VCOFREQ_TABLE_BOTTOM 1600
-
-#define MIN_FREQ_RESOLUTION  200 /* fids jump by 2 matching freq jumps by 200 */
-
-#define MAX_FID 0x2a    /* Spec only gives FID values as far as 5 GHz */
-#define LEAST_VID 0x3e  /* Lowest (numerically highest) useful vid value */
-
-#define MIN_FREQ 800    /* Min and max freqs, per spec */
-#define MAX_FREQ 5000
-
-#define INVALID_FID_MASK 0xffffffc0  /* not a valid fid if these bits are set */
-#define INVALID_VID_MASK 0xffffffc0  /* not a valid vid if these bits are set */
-
-#define VID_OFF 0x3f
-
-#define STOP_GRANT_5NS 1 /* min poss memory access latency for voltage change */
-
-#define PLL_LOCK_CONVERSION (1000/5) /* ms to ns, then divide by clock period */
-
-#define MAXIMUM_VID_STEPS 1  /* Current cpus only allow a single step of 25mV */
-#define VST_UNITS_20US 20   /* Voltage Stabilization Time is in units of 20us */
-
-/*
- * Most values of interest are encoded in a single field of the _PSS
- * entries: the "control" value.
- */
-
-#define IRT_SHIFT      30
-#define RVO_SHIFT      28
-#define EXT_TYPE_SHIFT 27
-#define PLL_L_SHIFT    20
-#define MVS_SHIFT      18
-#define VST_SHIFT      11
-#define VID_SHIFT       6
-#define IRT_MASK        3
-#define RVO_MASK        3
-#define EXT_TYPE_MASK   1
-#define PLL_L_MASK   0x7f
-#define MVS_MASK        3
-#define VST_MASK     0x7f
-#define VID_MASK     0x1f
-#define FID_MASK     0x1f
-#define EXT_VID_MASK 0x3f
-#define EXT_FID_MASK 0x3f
-
-
-/*
- * Version 1.4 of the PSB table. This table is constructed by BIOS and is
- * to tell the OS's power management driver which VIDs and FIDs are
- * supported by this particular processor.
- * If the data in the PSB / PST is wrong, then this driver will program the
- * wrong values into hardware, which is very likely to lead to a crash.
- */
-
-#define PSB_ID_STRING      "AMDK7PNOW!"
-#define PSB_ID_STRING_LEN  10
-
-#define PSB_VERSION_1_4  0x14
-
-struct psb_s {
-        u8 signature[10];
-        u8 tableversion;
-        u8 flags1;
-        u16 vstable;
-        u8 flags2;
-        u8 num_tables;
-        u32 cpuid;
-        u8 plllocktime;
-        u8 maxfid;
-        u8 maxvid;
-        u8 numps;
-};
-
-/* Pairs of fid/vid values are appended to the version 1.4 PSB table. */
-struct pst_s {
-        u8 fid;
-        u8 vid;
-};
-
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "powernow-k8", msg)
-
-static int core_voltage_pre_transition(struct powernow_k8_data *data,
-        u32 reqvid, u32 regfid);
-static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvid);
-static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid);
-
-static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index);
-
-static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table);
-static int fill_powernow_table_fidvid(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table);
diff --git a/arch/x86/kernel/cpu/cpufreq/sc520_freq.c b/arch/x86/kernel/cpu/cpufreq/sc520_freq.c
deleted file mode 100644
index 435a996a613a..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/sc520_freq.c
+++ /dev/null
@@ -1,194 +0,0 @@
-/*
- *      sc520_freq.c: cpufreq driver for the AMD Elan sc520
- *
- *      Copyright (C) 2005 Sean Young <sean@mess.org>
- *
- *      This program is free software; you can redistribute it and/or
- *      modify it under the terms of the GNU General Public License
- *      as published by the Free Software Foundation; either version
- *      2 of the License, or (at your option) any later version.
- *
- *      Based on elanfreq.c
- *
- *      2005-03-30: - initial revision
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-
-#include <linux/delay.h>
-#include <linux/cpufreq.h>
-#include <linux/timex.h>
-#include <linux/io.h>
-
-#include <asm/msr.h>
-
-#define MMCR_BASE       0xfffef000      /* The default base address */
-#define OFFS_CPUCTL     0x2   /* CPU Control Register */
-
-static __u8 __iomem *cpuctl;
-
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
-                "sc520_freq", msg)
-#define PFX "sc520_freq: "
-
-static struct cpufreq_frequency_table sc520_freq_table[] = {
-        {0x01,  100000},
-        {0x02,  133000},
-        {0,     CPUFREQ_TABLE_END},
-};
-
-static unsigned int sc520_freq_get_cpu_frequency(unsigned int cpu)
-{
-        u8 clockspeed_reg = *cpuctl;
-
-        switch (clockspeed_reg & 0x03) {
-        default:
-                printk(KERN_ERR PFX "error: cpuctl register has unexpected "
-                                "value %02x\n", clockspeed_reg);
-        case 0x01:
-                return 100000;
-        case 0x02:
-                return 133000;
-        }
-}
-
-static void sc520_freq_set_cpu_state(unsigned int state)
-{
-
-        struct cpufreq_freqs    freqs;
-        u8 clockspeed_reg;
-
-        freqs.old = sc520_freq_get_cpu_frequency(0);
-        freqs.new = sc520_freq_table[state].frequency;
-        freqs.cpu = 0; /* AMD Elan is UP */
-
-        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-
-        dprintk("attempting to set frequency to %i kHz\n",
-                        sc520_freq_table[state].frequency);
-
-        local_irq_disable();
-
-        clockspeed_reg = *cpuctl & ~0x03;
-        *cpuctl = clockspeed_reg | sc520_freq_table[state].index;
-
-        local_irq_enable();
-
-        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-};
-
-static int sc520_freq_verify(struct cpufreq_policy *policy)
-{
-        return cpufreq_frequency_table_verify(policy, &sc520_freq_table[0]);
-}
-
-static int sc520_freq_target(struct cpufreq_policy *policy,
-                            unsigned int target_freq,
-                            unsigned int relation)
-{
-        unsigned int newstate = 0;
-
-        if (cpufreq_frequency_table_target(policy, sc520_freq_table,
-                                target_freq, relation, &newstate))
-                return -EINVAL;
-
-        sc520_freq_set_cpu_state(newstate);
-
-        return 0;
-}
-
-
-/*
- *      Module init and exit code
- */
-
-static int sc520_freq_cpu_init(struct cpufreq_policy *policy)
-{
-        struct cpuinfo_x86 *c = &cpu_data(0);
-        int result;
-
-        /* capability check */
-        if (c->x86_vendor != X86_VENDOR_AMD ||
-            c->x86 != 4 || c->x86_model != 9)
-                return -ENODEV;
-
-        /* cpuinfo and default policy values */
-        policy->cpuinfo.transition_latency = 1000000; /* 1ms */
-        policy->cur = sc520_freq_get_cpu_frequency(0);
-
-        result = cpufreq_frequency_table_cpuinfo(policy, sc520_freq_table);
-        if (result)
-                return result;
-
-        cpufreq_frequency_table_get_attr(sc520_freq_table, policy->cpu);
-
-        return 0;
-}
-
-
-static int sc520_freq_cpu_exit(struct cpufreq_policy *policy)
-{
-        cpufreq_frequency_table_put_attr(policy->cpu);
-        return 0;
-}
-
-
-static struct freq_attr *sc520_freq_attr[] = {
-        &cpufreq_freq_attr_scaling_available_freqs,
-        NULL,
-};
-
-
-static struct cpufreq_driver sc520_freq_driver = {
-        .get    = sc520_freq_get_cpu_frequency,
-        .verify = sc520_freq_verify,
-        .target = sc520_freq_target,
-        .init   = sc520_freq_cpu_init,
-        .exit   = sc520_freq_cpu_exit,
-        .name   = "sc520_freq",
-        .owner  = THIS_MODULE,
-        .attr   = sc520_freq_attr,
-};
-
-
-static int __init sc520_freq_init(void)
-{
-        struct cpuinfo_x86 *c = &cpu_data(0);
-        int err;
-
-        /* Test if we have the right hardware */
-        if (c->x86_vendor != X86_VENDOR_AMD ||
-            c->x86 != 4 || c->x86_model != 9) {
-                dprintk("no Elan SC520 processor found!\n");
-                return -ENODEV;
-        }
-        cpuctl = ioremap((unsigned long)(MMCR_BASE + OFFS_CPUCTL), 1);
-        if (!cpuctl) {
-                printk(KERN_ERR "sc520_freq: error: failed to remap memory\n");
-                return -ENOMEM;
-        }
-
-        err = cpufreq_register_driver(&sc520_freq_driver);
-        if (err)
-                iounmap(cpuctl);
-
-        return err;
-}
-
-
-static void __exit sc520_freq_exit(void)
-{
-        cpufreq_unregister_driver(&sc520_freq_driver);
-        iounmap(cpuctl);
-}
-
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Sean Young <sean@mess.org>");
-MODULE_DESCRIPTION("cpufreq driver for AMD's Elan sc520 CPU");
-
-module_init(sc520_freq_init);
-module_exit(sc520_freq_exit);
-
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
deleted file mode 100644
index 9b1ff37de46a..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
+++ /dev/null
@@ -1,636 +0,0 @@
-/*
- * cpufreq driver for Enhanced SpeedStep, as found in Intel's Pentium
- * M (part of the Centrino chipset).
- *
- * Since the original Pentium M, most new Intel CPUs support Enhanced
- * SpeedStep.
- *
- * Despite the "SpeedStep" in the name, this is almost entirely unlike
- * traditional SpeedStep.
- *
- * Modelled on speedstep.c
- *
- * Copyright (C) 2003 Jeremy Fitzhardinge <jeremy@goop.org>
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/cpufreq.h>
-#include <linux/sched.h>        /* current */
-#include <linux/delay.h>
-#include <linux/compiler.h>
-#include <linux/gfp.h>
-
-#include <asm/msr.h>
-#include <asm/processor.h>
-#include <asm/cpufeature.h>
-
-#define PFX             "speedstep-centrino: "
-#define MAINTAINER      "cpufreq@vger.kernel.org"
-
-#define dprintk(msg...) \
-        cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-centrino", msg)
-
-#define INTEL_MSR_RANGE (0xffff)
-
-struct cpu_id
-{
-        __u8    x86;            /* CPU family */
-        __u8    x86_model;      /* model */
-        __u8    x86_mask;       /* stepping */
-};
-
-enum {
-        CPU_BANIAS,
-        CPU_DOTHAN_A1,
-        CPU_DOTHAN_A2,
-        CPU_DOTHAN_B0,
-        CPU_MP4HT_D0,
-        CPU_MP4HT_E0,
-};
-
-static const struct cpu_id cpu_ids[] = {
-        [CPU_BANIAS]    = { 6,  9, 5 },
-        [CPU_DOTHAN_A1] = { 6, 13, 1 },
-        [CPU_DOTHAN_A2] = { 6, 13, 2 },
-        [CPU_DOTHAN_B0] = { 6, 13, 6 },
-        [CPU_MP4HT_D0]  = {15,  3, 4 },
-        [CPU_MP4HT_E0]  = {15,  4, 1 },
-};
-#define N_IDS   ARRAY_SIZE(cpu_ids)
-
-struct cpu_model
-{
-        const struct cpu_id *cpu_id;
-        const char      *model_name;
-        unsigned        max_freq; /* max clock in kHz */
-
-        struct cpufreq_frequency_table *op_points; /* clock/voltage pairs */
-};
-static int centrino_verify_cpu_id(const struct cpuinfo_x86 *c,
-                                  const struct cpu_id *x);
-
-/* Operating points for current CPU */
-static DEFINE_PER_CPU(struct cpu_model *, centrino_model);
-static DEFINE_PER_CPU(const struct cpu_id *, centrino_cpu);
-
-static struct cpufreq_driver centrino_driver;
-
-#ifdef CONFIG_X86_SPEEDSTEP_CENTRINO_TABLE
-
-/* Computes the correct form for IA32_PERF_CTL MSR for a particular
-   frequency/voltage operating point; frequency in MHz, volts in mV.
-   This is stored as "index" in the structure. */
-#define OP(mhz, mv)                                                     \
-        {                                                               \
-                .frequency = (mhz) * 1000,                              \
-                .index = (((mhz)/100) << 8) | ((mv - 700) / 16)         \
-        }
-
-/*
- * These voltage tables were derived from the Intel Pentium M
- * datasheet, document 25261202.pdf, Table 5.  I have verified they
- * are consistent with my IBM ThinkPad X31, which has a 1.3GHz Pentium
- * M.
- */
-
-/* Ultra Low Voltage Intel Pentium M processor 900MHz (Banias) */
-static struct cpufreq_frequency_table banias_900[] =
-{
-        OP(600,  844),
-        OP(800,  988),
-        OP(900, 1004),
-        { .frequency = CPUFREQ_TABLE_END }
-};
-
-/* Ultra Low Voltage Intel Pentium M processor 1000MHz (Banias) */
-static struct cpufreq_frequency_table banias_1000[] =
-{
-        OP(600,   844),
-        OP(800,   972),
-        OP(900,   988),
-        OP(1000, 1004),
-        { .frequency = CPUFREQ_TABLE_END }
-};
-
-/* Low Voltage Intel Pentium M processor 1.10GHz (Banias) */
-static struct cpufreq_frequency_table banias_1100[] =
-{
-        OP( 600,  956),
-        OP( 800, 1020),
-        OP( 900, 1100),
-        OP(1000, 1164),
-        OP(1100, 1180),
-        { .frequency = CPUFREQ_TABLE_END }
-};
-
-
-/* Low Voltage Intel Pentium M processor 1.20GHz (Banias) */
-static struct cpufreq_frequency_table banias_1200[] =
-{
-        OP( 600,  956),
-        OP( 800, 1004),
-        OP( 900, 1020),
-        OP(1000, 1100),
-        OP(1100, 1164),
-        OP(1200, 1180),
-        { .frequency = CPUFREQ_TABLE_END }
-};
-
-/* Intel Pentium M processor 1.30GHz (Banias) */
-static struct cpufreq_frequency_table banias_1300[] =
-{
-        OP( 600,  956),
-        OP( 800, 1260),
-        OP(1000, 1292),
-        OP(1200, 1356),
-        OP(1300, 1388),
-        { .frequency = CPUFREQ_TABLE_END }
-};
-
-/* Intel Pentium M processor 1.40GHz (Banias) */
-static struct cpufreq_frequency_table banias_1400[] =
-{
-        OP( 600,  956),
-        OP( 800, 1180),
-        OP(1000, 1308),
-        OP(1200, 1436),
-        OP(1400, 1484),
-        { .frequency = CPUFREQ_TABLE_END }
-};
-
-/* Intel Pentium M processor 1.50GHz (Banias) */
-static struct cpufreq_frequency_table banias_1500[] =
-{
-        OP( 600,  956),
-        OP( 800, 1116),
-        OP(1000, 1228),
-        OP(1200, 1356),
-        OP(1400, 1452),
-        OP(1500, 1484),
-        { .frequency = CPUFREQ_TABLE_END }
-};
-
-/* Intel Pentium M processor 1.60GHz (Banias) */
-static struct cpufreq_frequency_table banias_1600[] =
-{
-        OP( 600,  956),
-        OP( 800, 1036),
-        OP(1000, 1164),
-        OP(1200, 1276),
-        OP(1400, 1420),
-        OP(1600, 1484),
-        { .frequency = CPUFREQ_TABLE_END }
-};
-
-/* Intel Pentium M processor 1.70GHz (Banias) */
-static struct cpufreq_frequency_table banias_1700[] =
-{
-        OP( 600,  956),
-        OP( 800, 1004),
-        OP(1000, 1116),
-        OP(1200, 1228),
-        OP(1400, 1308),
-        OP(1700, 1484),
-        { .frequency = CPUFREQ_TABLE_END }
-};
-#undef OP
-
-#define _BANIAS(cpuid, max, name)       \
-{       .cpu_id         = cpuid,        \
-        .model_name     = "Intel(R) Pentium(R) M processor " name "MHz", \
-        .max_freq       = (max)*1000,   \
-        .op_points      = banias_##max, \
-}
-#define BANIAS(max)     _BANIAS(&cpu_ids[CPU_BANIAS], max, #max)
-
-/* CPU models, their operating frequency range, and freq/voltage
-   operating points */
-static struct cpu_model models[] =
-{
-        _BANIAS(&cpu_ids[CPU_BANIAS], 900, " 900"),
-        BANIAS(1000),
-        BANIAS(1100),
-        BANIAS(1200),
-        BANIAS(1300),
-        BANIAS(1400),
-        BANIAS(1500),
-        BANIAS(1600),
-        BANIAS(1700),
-
-        /* NULL model_name is a wildcard */
-        { &cpu_ids[CPU_DOTHAN_A1], NULL, 0, NULL },
-        { &cpu_ids[CPU_DOTHAN_A2], NULL, 0, NULL },
-        { &cpu_ids[CPU_DOTHAN_B0], NULL, 0, NULL },
-        { &cpu_ids[CPU_MP4HT_D0], NULL, 0, NULL },
-        { &cpu_ids[CPU_MP4HT_E0], NULL, 0, NULL },
-
-        { NULL, }
-};
-#undef _BANIAS
-#undef BANIAS
-
-static int centrino_cpu_init_table(struct cpufreq_policy *policy)
-{
-        struct cpuinfo_x86 *cpu = &cpu_data(policy->cpu);
-        struct cpu_model *model;
-
-        for(model = models; model->cpu_id != NULL; model++)
-                if (centrino_verify_cpu_id(cpu, model->cpu_id) &&
-                    (model->model_name == NULL ||
-                     strcmp(cpu->x86_model_id, model->model_name) == 0))
-                        break;
-
-        if (model->cpu_id == NULL) {
-                /* No match at all */
-                dprintk("no support for CPU model \"%s\": "
-                       "send /proc/cpuinfo to " MAINTAINER "\n",
-                       cpu->x86_model_id);
-                return -ENOENT;
-        }
-
-        if (model->op_points == NULL) {
-                /* Matched a non-match */
-                dprintk("no table support for CPU model \"%s\"\n",
-                       cpu->x86_model_id);
-                dprintk("try using the acpi-cpufreq driver\n");
-                return -ENOENT;
-        }
-
-        per_cpu(centrino_model, policy->cpu) = model;
-
-        dprintk("found \"%s\": max frequency: %dkHz\n",
-               model->model_name, model->max_freq);
-
-        return 0;
-}
-
-#else
-static inline int centrino_cpu_init_table(struct cpufreq_policy *policy)
-{
-        return -ENODEV;
-}
-#endif /* CONFIG_X86_SPEEDSTEP_CENTRINO_TABLE */
-
-static int centrino_verify_cpu_id(const struct cpuinfo_x86 *c,
-                                  const struct cpu_id *x)
-{
-        if ((c->x86 == x->x86) &&
-            (c->x86_model == x->x86_model) &&
-            (c->x86_mask == x->x86_mask))
-                return 1;
-        return 0;
-}
-
-/* To be called only after centrino_model is initialized */
-static unsigned extract_clock(unsigned msr, unsigned int cpu, int failsafe)
-{
-        int i;
-
-        /*
-         * Extract clock in kHz from PERF_CTL value
-         * for centrino, as some DSDTs are buggy.
-         * Ideally, this can be done using the acpi_data structure.
-         */
-        if ((per_cpu(centrino_cpu, cpu) == &cpu_ids[CPU_BANIAS]) ||
-            (per_cpu(centrino_cpu, cpu) == &cpu_ids[CPU_DOTHAN_A1]) ||
-            (per_cpu(centrino_cpu, cpu) == &cpu_ids[CPU_DOTHAN_B0])) {
-                msr = (msr >> 8) & 0xff;
-                return msr * 100000;
-        }
-
-        if ((!per_cpu(centrino_model, cpu)) ||
-            (!per_cpu(centrino_model, cpu)->op_points))
-                return 0;
-
-        msr &= 0xffff;
-        for (i = 0;
-                per_cpu(centrino_model, cpu)->op_points[i].frequency
-                                                        != CPUFREQ_TABLE_END;
-             i++) {
-                if (msr == per_cpu(centrino_model, cpu)->op_points[i].index)
-                        return per_cpu(centrino_model, cpu)->
-                                                        op_points[i].frequency;
-        }
-        if (failsafe)
-                return per_cpu(centrino_model, cpu)->op_points[i-1].frequency;
-        else
-                return 0;
-}
-
-/* Return the current CPU frequency in kHz */
-static unsigned int get_cur_freq(unsigned int cpu)
-{
-        unsigned l, h;
-        unsigned clock_freq;
-
-        rdmsr_on_cpu(cpu, MSR_IA32_PERF_STATUS, &l, &h);
-        clock_freq = extract_clock(l, cpu, 0);
-
-        if (unlikely(clock_freq == 0)) {
-                /*
-                 * On some CPUs, we can see transient MSR values (which are
-                 * not present in _PSS), while CPU is doing some automatic
-                 * P-state transition (like TM2). Get the last freq set 
-                 * in PERF_CTL.
-                 */
-                rdmsr_on_cpu(cpu, MSR_IA32_PERF_CTL, &l, &h);
-                clock_freq = extract_clock(l, cpu, 1);
-        }
-        return clock_freq;
-}
-
-
-static int centrino_cpu_init(struct cpufreq_policy *policy)
-{
-        struct cpuinfo_x86 *cpu = &cpu_data(policy->cpu);
-        unsigned freq;
-        unsigned l, h;
-        int ret;
-        int i;
-
-        /* Only Intel makes Enhanced Speedstep-capable CPUs */
-        if (cpu->x86_vendor != X86_VENDOR_INTEL ||
-            !cpu_has(cpu, X86_FEATURE_EST))
-                return -ENODEV;
-
-        if (cpu_has(cpu, X86_FEATURE_CONSTANT_TSC))
-                centrino_driver.flags |= CPUFREQ_CONST_LOOPS;
-
-        if (policy->cpu != 0)
-                return -ENODEV;
-
-        for (i = 0; i < N_IDS; i++)
-                if (centrino_verify_cpu_id(cpu, &cpu_ids[i]))
-                        break;
-
-        if (i != N_IDS)
-                per_cpu(centrino_cpu, policy->cpu) = &cpu_ids[i];
-
-        if (!per_cpu(centrino_cpu, policy->cpu)) {
-                dprintk("found unsupported CPU with "
-                "Enhanced SpeedStep: send /proc/cpuinfo to "
-                MAINTAINER "\n");
-                return -ENODEV;
-        }
-
-        if (centrino_cpu_init_table(policy)) {
-                return -ENODEV;
-        }
-
-        /* Check to see if Enhanced SpeedStep is enabled, and try to
-           enable it if not. */
-        rdmsr(MSR_IA32_MISC_ENABLE, l, h);
-
-        if (!(l & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
-                l |= MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP;
-                dprintk("trying to enable Enhanced SpeedStep (%x)\n", l);
-                wrmsr(MSR_IA32_MISC_ENABLE, l, h);
-
-                /* check to see if it stuck */
-                rdmsr(MSR_IA32_MISC_ENABLE, l, h);
-                if (!(l & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
-                        printk(KERN_INFO PFX
-                                "couldn't enable Enhanced SpeedStep\n");
-                        return -ENODEV;
-                }
-        }
-
-        freq = get_cur_freq(policy->cpu);
-        policy->cpuinfo.transition_latency = 10000;
-                                                /* 10uS transition latency */
-        policy->cur = freq;
-
-        dprintk("centrino_cpu_init: cur=%dkHz\n", policy->cur);
-
-        ret = cpufreq_frequency_table_cpuinfo(policy,
-                per_cpu(centrino_model, policy->cpu)->op_points);
-        if (ret)
-                return (ret);
-
-        cpufreq_frequency_table_get_attr(
-                per_cpu(centrino_model, policy->cpu)->op_points, policy->cpu);
-
-        return 0;
-}
-
-static int centrino_cpu_exit(struct cpufreq_policy *policy)
-{
-        unsigned int cpu = policy->cpu;
-
-        if (!per_cpu(centrino_model, cpu))
-                return -ENODEV;
-
-        cpufreq_frequency_table_put_attr(cpu);
-
-        per_cpu(centrino_model, cpu) = NULL;
-
-        return 0;
-}
-
-/**
- * centrino_verify - verifies a new CPUFreq policy
- * @policy: new policy
- *
- * Limit must be within this model's frequency range at least one
- * border included.
- */
-static int centrino_verify (struct cpufreq_policy *policy)
-{
-        return cpufreq_frequency_table_verify(policy,
-                        per_cpu(centrino_model, policy->cpu)->op_points);
-}
-
-/**
- * centrino_setpolicy - set a new CPUFreq policy
- * @policy: new policy
- * @target_freq: the target frequency
- * @relation: how that frequency relates to achieved frequency
- *      (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
- *
- * Sets a new CPUFreq policy.
- */
-static int centrino_target (struct cpufreq_policy *policy,
-                            unsigned int target_freq,
-                            unsigned int relation)
-{
-        unsigned int    newstate = 0;
-        unsigned int    msr, oldmsr = 0, h = 0, cpu = policy->cpu;
-        struct cpufreq_freqs    freqs;
-        int                     retval = 0;
-        unsigned int            j, k, first_cpu, tmp;
-        cpumask_var_t covered_cpus;
-
-        if (unlikely(!zalloc_cpumask_var(&covered_cpus, GFP_KERNEL)))
-                return -ENOMEM;
-
-        if (unlikely(per_cpu(centrino_model, cpu) == NULL)) {
-                retval = -ENODEV;
-                goto out;
-        }
-
-        if (unlikely(cpufreq_frequency_table_target(policy,
-                        per_cpu(centrino_model, cpu)->op_points,
-                        target_freq,
-                        relation,
-                        &newstate))) {
-                retval = -EINVAL;
-                goto out;
-        }
-
-        first_cpu = 1;
-        for_each_cpu(j, policy->cpus) {
-                int good_cpu;
-
-                /* cpufreq holds the hotplug lock, so we are safe here */
-                if (!cpu_online(j))
-                        continue;
-
-                /*
-                 * Support for SMP systems.
-                 * Make sure we are running on CPU that wants to change freq
-                 */
-                if (policy->shared_type == CPUFREQ_SHARED_TYPE_ANY)
-                        good_cpu = cpumask_any_and(policy->cpus,
-                                                   cpu_online_mask);
-                else
-                        good_cpu = j;
-
-                if (good_cpu >= nr_cpu_ids) {
-                        dprintk("couldn't limit to CPUs in this domain\n");
-                        retval = -EAGAIN;
-                        if (first_cpu) {
-                                /* We haven't started the transition yet. */
-                                goto out;
-                        }
-                        break;
-                }
-
-                msr = per_cpu(centrino_model, cpu)->op_points[newstate].index;
-
-                if (first_cpu) {
-                        rdmsr_on_cpu(good_cpu, MSR_IA32_PERF_CTL, &oldmsr, &h);
-                        if (msr == (oldmsr & 0xffff)) {
-                                dprintk("no change needed - msr was and needs "
-                                        "to be %x\n", oldmsr);
-                                retval = 0;
-                                goto out;
-                        }
-
-                        freqs.old = extract_clock(oldmsr, cpu, 0);
-                        freqs.new = extract_clock(msr, cpu, 0);
-
-                        dprintk("target=%dkHz old=%d new=%d msr=%04x\n",
-                                target_freq, freqs.old, freqs.new, msr);
-
-                        for_each_cpu(k, policy->cpus) {
-                                if (!cpu_online(k))
-                                        continue;
-                                freqs.cpu = k;
-                                cpufreq_notify_transition(&freqs,
-                                        CPUFREQ_PRECHANGE);
-                        }
-
-                        first_cpu = 0;
-                        /* all but 16 LSB are reserved, treat them with care */
-                        oldmsr &= ~0xffff;
-                        msr &= 0xffff;
-                        oldmsr |= msr;
-                }
-
-                wrmsr_on_cpu(good_cpu, MSR_IA32_PERF_CTL, oldmsr, h);
-                if (policy->shared_type == CPUFREQ_SHARED_TYPE_ANY)
-                        break;
-
-                cpumask_set_cpu(j, covered_cpus);
-        }
-
-        for_each_cpu(k, policy->cpus) {
-                if (!cpu_online(k))
-                        continue;
-                freqs.cpu = k;
-                cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-        }
-
-        if (unlikely(retval)) {
-                /*
-                 * We have failed halfway through the frequency change.
-                 * We have sent callbacks to policy->cpus and
-                 * MSRs have already been written on coverd_cpus.
-                 * Best effort undo..
-                 */
-
-                for_each_cpu(j, covered_cpus)
-                        wrmsr_on_cpu(j, MSR_IA32_PERF_CTL, oldmsr, h);
-
-                tmp = freqs.new;
-                freqs.new = freqs.old;
-                freqs.old = tmp;
-                for_each_cpu(j, policy->cpus) {
-                        if (!cpu_online(j))
-                                continue;
-                        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-                        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-                }
-        }
-        retval = 0;
-
-out:
-        free_cpumask_var(covered_cpus);
-        return retval;
-}
-
-static struct freq_attr* centrino_attr[] = {
-        &cpufreq_freq_attr_scaling_available_freqs,
-        NULL,
-};
-
-static struct cpufreq_driver centrino_driver = {
-        .name           = "centrino", /* should be speedstep-centrino,
-                                         but there's a 16 char limit */
-        .init           = centrino_cpu_init,
-        .exit           = centrino_cpu_exit,
-        .verify         = centrino_verify,
-        .target         = centrino_target,
-        .get            = get_cur_freq,
-        .attr           = centrino_attr,
-        .owner          = THIS_MODULE,
-};
-
-
-/**
- * centrino_init - initializes the Enhanced SpeedStep CPUFreq driver
- *
- * Initializes the Enhanced SpeedStep support. Returns -ENODEV on
- * unsupported devices, -ENOENT if there's no voltage table for this
- * particular CPU model, -EINVAL on problems during initiatization,
- * and zero on success.
- *
- * This is quite picky.  Not only does the CPU have to advertise the
- * "est" flag in the cpuid capability flags, we look for a specific
- * CPU model and stepping, and we need to have the exact model name in
- * our voltage tables.  That is, be paranoid about not releasing
- * someone's valuable magic smoke.
- */
-static int __init centrino_init(void)
-{
-        struct cpuinfo_x86 *cpu = &cpu_data(0);
-
-        if (!cpu_has(cpu, X86_FEATURE_EST))
-                return -ENODEV;
-
-        return cpufreq_register_driver(&centrino_driver);
-}
-
-static void __exit centrino_exit(void)
-{
-        cpufreq_unregister_driver(&centrino_driver);
-}
-
-MODULE_AUTHOR ("Jeremy Fitzhardinge <jeremy@goop.org>");
-MODULE_DESCRIPTION ("Enhanced SpeedStep driver for Intel Pentium M processors.");
-MODULE_LICENSE ("GPL");
-
-late_initcall(centrino_init);
-module_exit(centrino_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c b/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
deleted file mode 100644
index 561758e95180..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
+++ /dev/null
@@ -1,452 +0,0 @@
-/*
- * (C) 2001  Dave Jones, Arjan van de ven.
- * (C) 2002 - 2003  Dominik Brodowski <linux@brodo.de>
- *
- *  Licensed under the terms of the GNU GPL License version 2.
- *  Based upon reverse engineered information, and on Intel documentation
- *  for chipsets ICH2-M and ICH3-M.
- *
- *  Many thanks to Ducrot Bruno for finding and fixing the last
- *  "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler
- *  for extensive testing.
- *
- *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
- */
-
-
-/*********************************************************************
- *                        SPEEDSTEP - DEFINITIONS                    *
- *********************************************************************/
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/cpufreq.h>
-#include <linux/pci.h>
-#include <linux/sched.h>
-
-#include "speedstep-lib.h"
-
-
-/* speedstep_chipset:
- *   It is necessary to know which chipset is used. As accesses to
- * this device occur at various places in this module, we need a
- * static struct pci_dev * pointing to that device.
- */
-static struct pci_dev *speedstep_chipset_dev;
-
-
-/* speedstep_processor
- */
-static enum speedstep_processor speedstep_processor;
-
-static u32 pmbase;
-
-/*
- *   There are only two frequency states for each processor. Values
- * are in kHz for the time being.
- */
-static struct cpufreq_frequency_table speedstep_freqs[] = {
-        {SPEEDSTEP_HIGH,        0},
-        {SPEEDSTEP_LOW,         0},
-        {0,                     CPUFREQ_TABLE_END},
-};
-
-
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
-                "speedstep-ich", msg)
-
-
-/**
- * speedstep_find_register - read the PMBASE address
- *
- * Returns: -ENODEV if no register could be found
- */
-static int speedstep_find_register(void)
-{
-        if (!speedstep_chipset_dev)
-                return -ENODEV;
-
-        /* get PMBASE */
-        pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
-        if (!(pmbase & 0x01)) {
-                printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
-                return -ENODEV;
-        }
-
-        pmbase &= 0xFFFFFFFE;
-        if (!pmbase) {
-                printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
-                return -ENODEV;
-        }
-
-        dprintk("pmbase is 0x%x\n", pmbase);
-        return 0;
-}
-
-/**
- * speedstep_set_state - set the SpeedStep state
- * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
- *
- *   Tries to change the SpeedStep state.  Can be called from
- *   smp_call_function_single.
- */
-static void speedstep_set_state(unsigned int state)
-{
-        u8 pm2_blk;
-        u8 value;
-        unsigned long flags;
-
-        if (state > 0x1)
-                return;
-
-        /* Disable IRQs */
-        local_irq_save(flags);
-
-        /* read state */
-        value = inb(pmbase + 0x50);
-
-        dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
-
-        /* write new state */
-        value &= 0xFE;
-        value |= state;
-
-        dprintk("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);
-
-        /* Disable bus master arbitration */
-        pm2_blk = inb(pmbase + 0x20);
-        pm2_blk |= 0x01;
-        outb(pm2_blk, (pmbase + 0x20));
-
-        /* Actual transition */
-        outb(value, (pmbase + 0x50));
-
-        /* Restore bus master arbitration */
-        pm2_blk &= 0xfe;
-        outb(pm2_blk, (pmbase + 0x20));
-
-        /* check if transition was successful */
-        value = inb(pmbase + 0x50);
-
-        /* Enable IRQs */
-        local_irq_restore(flags);
-
-        dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
-
-        if (state == (value & 0x1))
-                dprintk("change to %u MHz succeeded\n",
-                        speedstep_get_frequency(speedstep_processor) / 1000);
-        else
-                printk(KERN_ERR "cpufreq: change failed - I/O error\n");
-
-        return;
-}
-
-/* Wrapper for smp_call_function_single. */
-static void _speedstep_set_state(void *_state)
-{
-        speedstep_set_state(*(unsigned int *)_state);
-}
-
-/**
- * speedstep_activate - activate SpeedStep control in the chipset
- *
- *   Tries to activate the SpeedStep status and control registers.
- * Returns -EINVAL on an unsupported chipset, and zero on success.
- */
-static int speedstep_activate(void)
-{
-        u16 value = 0;
-
-        if (!speedstep_chipset_dev)
-                return -EINVAL;
-
-        pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value);
-        if (!(value & 0x08)) {
-                value |= 0x08;
-                dprintk("activating SpeedStep (TM) registers\n");
-                pci_write_config_word(speedstep_chipset_dev, 0x00A0, value);
-        }
-
-        return 0;
-}
-
-
-/**
- * speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic
- *
- *   Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to
- * the LPC bridge / PM module which contains all power-management
- * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
- * chipset, or zero on failure.
- */
-static unsigned int speedstep_detect_chipset(void)
-{
-        speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
-                              PCI_DEVICE_ID_INTEL_82801DB_12,
-                              PCI_ANY_ID, PCI_ANY_ID,
-                              NULL);
-        if (speedstep_chipset_dev)
-                return 4; /* 4-M */
-
-        speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
-                              PCI_DEVICE_ID_INTEL_82801CA_12,
-                              PCI_ANY_ID, PCI_ANY_ID,
-                              NULL);
-        if (speedstep_chipset_dev)
-                return 3; /* 3-M */
-
-
-        speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
-                              PCI_DEVICE_ID_INTEL_82801BA_10,
-                              PCI_ANY_ID, PCI_ANY_ID,
-                              NULL);
-        if (speedstep_chipset_dev) {
-                /* speedstep.c causes lockups on Dell Inspirons 8000 and
-                 * 8100 which use a pretty old revision of the 82815
-                 * host brige. Abort on these systems.
-                 */
-                static struct pci_dev *hostbridge;
-
-                hostbridge  = pci_get_subsys(PCI_VENDOR_ID_INTEL,
-                              PCI_DEVICE_ID_INTEL_82815_MC,
-                              PCI_ANY_ID, PCI_ANY_ID,
-                              NULL);
-
-                if (!hostbridge)
-                        return 2; /* 2-M */
-
-                if (hostbridge->revision < 5) {
-                        dprintk("hostbridge does not support speedstep\n");
-                        speedstep_chipset_dev = NULL;
-                        pci_dev_put(hostbridge);
-                        return 0;
-                }
-
-                pci_dev_put(hostbridge);
-                return 2; /* 2-M */
-        }
-
-        return 0;
-}
-
-static void get_freq_data(void *_speed)
-{
-        unsigned int *speed = _speed;
-
-        *speed = speedstep_get_frequency(speedstep_processor);
-}
-
-static unsigned int speedstep_get(unsigned int cpu)
-{
-        unsigned int speed;
-
-        /* You're supposed to ensure CPU is online. */
-        if (smp_call_function_single(cpu, get_freq_data, &speed, 1) != 0)
-                BUG();
-
-        dprintk("detected %u kHz as current frequency\n", speed);
-        return speed;
-}
-
-/**
- * speedstep_target - set a new CPUFreq policy
- * @policy: new policy
- * @target_freq: the target frequency
- * @relation: how that frequency relates to achieved frequency
- *      (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
- *
- * Sets a new CPUFreq policy.
- */
-static int speedstep_target(struct cpufreq_policy *policy,
-                             unsigned int target_freq,
-                             unsigned int relation)
-{
-        unsigned int newstate = 0, policy_cpu;
-        struct cpufreq_freqs freqs;
-        int i;
-
-        if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0],
-                                target_freq, relation, &newstate))
-                return -EINVAL;
-
-        policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);
-        freqs.old = speedstep_get(policy_cpu);
-        freqs.new = speedstep_freqs[newstate].frequency;
-        freqs.cpu = policy->cpu;
-
-        dprintk("transiting from %u to %u kHz\n", freqs.old, freqs.new);
-
-        /* no transition necessary */
-        if (freqs.old == freqs.new)
-                return 0;
-
-        for_each_cpu(i, policy->cpus) {
-                freqs.cpu = i;
-                cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-        }
-
-        smp_call_function_single(policy_cpu, _speedstep_set_state, &newstate,
-                                 true);
-
-        for_each_cpu(i, policy->cpus) {
-                freqs.cpu = i;
-                cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-        }
-
-        return 0;
-}
-
-
-/**
- * speedstep_verify - verifies a new CPUFreq policy
- * @policy: new policy
- *
- * Limit must be within speedstep_low_freq and speedstep_high_freq, with
- * at least one border included.
- */
-static int speedstep_verify(struct cpufreq_policy *policy)
-{
-        return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
-}
-
-struct get_freqs {
-        struct cpufreq_policy *policy;
-        int ret;
-};
-
-static void get_freqs_on_cpu(void *_get_freqs)
-{
-        struct get_freqs *get_freqs = _get_freqs;
-
-        get_freqs->ret =
-                speedstep_get_freqs(speedstep_processor,
-                            &speedstep_freqs[SPEEDSTEP_LOW].frequency,
-                            &speedstep_freqs[SPEEDSTEP_HIGH].frequency,
-                            &get_freqs->policy->cpuinfo.transition_latency,
-                            &speedstep_set_state);
-}
-
-static int speedstep_cpu_init(struct cpufreq_policy *policy)
-{
-        int result;
-        unsigned int policy_cpu, speed;
-        struct get_freqs gf;
-
-        /* only run on CPU to be set, or on its sibling */
-#ifdef CONFIG_SMP
-        cpumask_copy(policy->cpus, cpu_sibling_mask(policy->cpu));
-#endif
-        policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);
-
-        /* detect low and high frequency and transition latency */
-        gf.policy = policy;
-        smp_call_function_single(policy_cpu, get_freqs_on_cpu, &gf, 1);
-        if (gf.ret)
-                return gf.ret;
-
-        /* get current speed setting */
-        speed = speedstep_get(policy_cpu);
-        if (!speed)
-                return -EIO;
-
-        dprintk("currently at %s speed setting - %i MHz\n",
-                (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency)
-                ? "low" : "high",
-                (speed / 1000));
-
-        /* cpuinfo and default policy values */
-        policy->cur = speed;
-
-        result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
-        if (result)
-                return result;
-
-        cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
-
-        return 0;
-}
-
-
-static int speedstep_cpu_exit(struct cpufreq_policy *policy)
-{
-        cpufreq_frequency_table_put_attr(policy->cpu);
-        return 0;
-}
-
-static struct freq_attr *speedstep_attr[] = {
-        &cpufreq_freq_attr_scaling_available_freqs,
-        NULL,
-};
-
-
-static struct cpufreq_driver speedstep_driver = {
-        .name   = "speedstep-ich",
-        .verify = speedstep_verify,
-        .target = speedstep_target,
-        .init   = speedstep_cpu_init,
-        .exit   = speedstep_cpu_exit,
-        .get    = speedstep_get,
-        .owner  = THIS_MODULE,
-        .attr   = speedstep_attr,
-};
-
-
-/**
- * speedstep_init - initializes the SpeedStep CPUFreq driver
- *
- *   Initializes the SpeedStep support. Returns -ENODEV on unsupported
- * devices, -EINVAL on problems during initiatization, and zero on
- * success.
- */
-static int __init speedstep_init(void)
-{
-        /* detect processor */
-        speedstep_processor = speedstep_detect_processor();
-        if (!speedstep_processor) {
-                dprintk("Intel(R) SpeedStep(TM) capable processor "
-                                "not found\n");
-                return -ENODEV;
-        }
-
-        /* detect chipset */
-        if (!speedstep_detect_chipset()) {
-                dprintk("Intel(R) SpeedStep(TM) for this chipset not "
-                                "(yet) available.\n");
-                return -ENODEV;
-        }
-
-        /* activate speedstep support */
-        if (speedstep_activate()) {
-                pci_dev_put(speedstep_chipset_dev);
-                return -EINVAL;
-        }
-
-        if (speedstep_find_register())
-                return -ENODEV;
-
-        return cpufreq_register_driver(&speedstep_driver);
-}
-
-
-/**
- * speedstep_exit - unregisters SpeedStep support
- *
- *   Unregisters SpeedStep support.
- */
-static void __exit speedstep_exit(void)
-{
-        pci_dev_put(speedstep_chipset_dev);
-        cpufreq_unregister_driver(&speedstep_driver);
-}
-
-
-MODULE_AUTHOR("Dave Jones <davej@redhat.com>, "
-                "Dominik Brodowski <linux@brodo.de>");
-MODULE_DESCRIPTION("Speedstep driver for Intel mobile processors on chipsets "
-                "with ICH-M southbridges.");
-MODULE_LICENSE("GPL");
-
-module_init(speedstep_init);
-module_exit(speedstep_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
deleted file mode 100644
index a94ec6be69fa..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
+++ /dev/null
@@ -1,481 +0,0 @@
-/*
- * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
- *
- *  Licensed under the terms of the GNU GPL License version 2.
- *
- *  Library for common functions for Intel SpeedStep v.1 and v.2 support
- *
- *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/init.h>
-#include <linux/cpufreq.h>
-
-#include <asm/msr.h>
-#include <asm/tsc.h>
-#include "speedstep-lib.h"
-
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
-                "speedstep-lib", msg)
-
-#define PFX "speedstep-lib: "
-
-#ifdef CONFIG_X86_SPEEDSTEP_RELAXED_CAP_CHECK
-static int relaxed_check;
-#else
-#define relaxed_check 0
-#endif
-
-/*********************************************************************
- *                   GET PROCESSOR CORE SPEED IN KHZ                 *
- *********************************************************************/
-
-static unsigned int pentium3_get_frequency(enum speedstep_processor processor)
-{
-        /* See table 14 of p3_ds.pdf and table 22 of 29834003.pdf */
-        struct {
-                unsigned int ratio;     /* Frequency Multiplier (x10) */
-                u8 bitmap;              /* power on configuration bits
-                                        [27, 25:22] (in MSR 0x2a) */
-        } msr_decode_mult[] = {
-                { 30, 0x01 },
-                { 35, 0x05 },
-                { 40, 0x02 },
-                { 45, 0x06 },
-                { 50, 0x00 },
-                { 55, 0x04 },
-                { 60, 0x0b },
-                { 65, 0x0f },
-                { 70, 0x09 },
-                { 75, 0x0d },
-                { 80, 0x0a },
-                { 85, 0x26 },
-                { 90, 0x20 },
-                { 100, 0x2b },
-                { 0, 0xff }     /* error or unknown value */
-        };
-
-        /* PIII(-M) FSB settings: see table b1-b of 24547206.pdf */
-        struct {
-                unsigned int value;     /* Front Side Bus speed in MHz */
-                u8 bitmap;              /* power on configuration bits [18: 19]
-                                        (in MSR 0x2a) */
-        } msr_decode_fsb[] = {
-                {  66, 0x0 },
-                { 100, 0x2 },
-                { 133, 0x1 },
-                {   0, 0xff}
-        };
-
-        u32 msr_lo, msr_tmp;
-        int i = 0, j = 0;
-
-        /* read MSR 0x2a - we only need the low 32 bits */
-        rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
-        dprintk("P3 - MSR_IA32_EBL_CR_POWERON: 0x%x 0x%x\n", msr_lo, msr_tmp);
-        msr_tmp = msr_lo;
-
-        /* decode the FSB */
-        msr_tmp &= 0x00c0000;
-        msr_tmp >>= 18;
-        while (msr_tmp != msr_decode_fsb[i].bitmap) {
-                if (msr_decode_fsb[i].bitmap == 0xff)
-                        return 0;
-                i++;
-        }
-
-        /* decode the multiplier */
-        if (processor == SPEEDSTEP_CPU_PIII_C_EARLY) {
-                dprintk("workaround for early PIIIs\n");
-                msr_lo &= 0x03c00000;
-        } else
-                msr_lo &= 0x0bc00000;
-        msr_lo >>= 22;
-        while (msr_lo != msr_decode_mult[j].bitmap) {
-                if (msr_decode_mult[j].bitmap == 0xff)
-                        return 0;
-                j++;
-        }
-
-        dprintk("speed is %u\n",
-                (msr_decode_mult[j].ratio * msr_decode_fsb[i].value * 100));
-
-        return msr_decode_mult[j].ratio * msr_decode_fsb[i].value * 100;
-}
-
-
-static unsigned int pentiumM_get_frequency(void)
-{
-        u32 msr_lo, msr_tmp;
-
-        rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
-        dprintk("PM - MSR_IA32_EBL_CR_POWERON: 0x%x 0x%x\n", msr_lo, msr_tmp);
-
-        /* see table B-2 of 24547212.pdf */
-        if (msr_lo & 0x00040000) {
-                printk(KERN_DEBUG PFX "PM - invalid FSB: 0x%x 0x%x\n",
-                                msr_lo, msr_tmp);
-                return 0;
-        }
-
-        msr_tmp = (msr_lo >> 22) & 0x1f;
-        dprintk("bits 22-26 are 0x%x, speed is %u\n",
-                        msr_tmp, (msr_tmp * 100 * 1000));
-
-        return msr_tmp * 100 * 1000;
-}
-
-static unsigned int pentium_core_get_frequency(void)
-{
-        u32 fsb = 0;
-        u32 msr_lo, msr_tmp;
-        int ret;
-
-        rdmsr(MSR_FSB_FREQ, msr_lo, msr_tmp);
-        /* see table B-2 of 25366920.pdf */
-        switch (msr_lo & 0x07) {
-        case 5:
-                fsb = 100000;
-                break;
-        case 1:
-                fsb = 133333;
-                break;
-        case 3:
-                fsb = 166667;
-                break;
-        case 2:
-                fsb = 200000;
-                break;
-        case 0:
-                fsb = 266667;
-                break;
-        case 4:
-                fsb = 333333;
-                break;
-        default:
-                printk(KERN_ERR "PCORE - MSR_FSB_FREQ undefined value");
-        }
-
-        rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
-        dprintk("PCORE - MSR_IA32_EBL_CR_POWERON: 0x%x 0x%x\n",
-                        msr_lo, msr_tmp);
-
-        msr_tmp = (msr_lo >> 22) & 0x1f;
-        dprintk("bits 22-26 are 0x%x, speed is %u\n",
-                        msr_tmp, (msr_tmp * fsb));
-
-        ret = (msr_tmp * fsb);
-        return ret;
-}
-
-
-static unsigned int pentium4_get_frequency(void)
-{
-        struct cpuinfo_x86 *c = &boot_cpu_data;
-        u32 msr_lo, msr_hi, mult;
-        unsigned int fsb = 0;
-        unsigned int ret;
-        u8 fsb_code;
-
-        /* Pentium 4 Model 0 and 1 do not have the Core Clock Frequency
-         * to System Bus Frequency Ratio Field in the Processor Frequency
-         * Configuration Register of the MSR. Therefore the current
-         * frequency cannot be calculated and has to be measured.
-         */
-        if (c->x86_model < 2)
-                return cpu_khz;
-
-        rdmsr(0x2c, msr_lo, msr_hi);
-
-        dprintk("P4 - MSR_EBC_FREQUENCY_ID: 0x%x 0x%x\n", msr_lo, msr_hi);
-
-        /* decode the FSB: see IA-32 Intel (C) Architecture Software
-         * Developer's Manual, Volume 3: System Prgramming Guide,
-         * revision #12 in Table B-1: MSRs in the Pentium 4 and
-         * Intel Xeon Processors, on page B-4 and B-5.
-         */
-        fsb_code = (msr_lo >> 16) & 0x7;
-        switch (fsb_code) {
-        case 0:
-                fsb = 100 * 1000;
-                break;
-        case 1:
-                fsb = 13333 * 10;
-                break;
-        case 2:
-                fsb = 200 * 1000;
-                break;
-        }
-
-        if (!fsb)
-                printk(KERN_DEBUG PFX "couldn't detect FSB speed. "
-                                "Please send an e-mail to <linux@brodo.de>\n");
-
-        /* Multiplier. */
-        mult = msr_lo >> 24;
-
-        dprintk("P4 - FSB %u kHz; Multiplier %u; Speed %u kHz\n",
-                        fsb, mult, (fsb * mult));
-
-        ret = (fsb * mult);
-        return ret;
-}
-
-
-/* Warning: may get called from smp_call_function_single. */
-unsigned int speedstep_get_frequency(enum speedstep_processor processor)
-{
-        switch (processor) {
-        case SPEEDSTEP_CPU_PCORE:
-                return pentium_core_get_frequency();
-        case SPEEDSTEP_CPU_PM:
-                return pentiumM_get_frequency();
-        case SPEEDSTEP_CPU_P4D:
-        case SPEEDSTEP_CPU_P4M:
-                return pentium4_get_frequency();
-        case SPEEDSTEP_CPU_PIII_T:
-        case SPEEDSTEP_CPU_PIII_C:
-        case SPEEDSTEP_CPU_PIII_C_EARLY:
-                return pentium3_get_frequency(processor);
-        default:
-                return 0;
-        };
-        return 0;
-}
-EXPORT_SYMBOL_GPL(speedstep_get_frequency);
-
-
-/*********************************************************************
- *                 DETECT SPEEDSTEP-CAPABLE PROCESSOR                *
- *********************************************************************/
-
-unsigned int speedstep_detect_processor(void)
-{
-        struct cpuinfo_x86 *c = &cpu_data(0);
-        u32 ebx, msr_lo, msr_hi;
-
-        dprintk("x86: %x, model: %x\n", c->x86, c->x86_model);
-
-        if ((c->x86_vendor != X86_VENDOR_INTEL) ||
-            ((c->x86 != 6) && (c->x86 != 0xF)))
-                return 0;
-
-        if (c->x86 == 0xF) {
-                /* Intel Mobile Pentium 4-M
-                 * or Intel Mobile Pentium 4 with 533 MHz FSB */
-                if (c->x86_model != 2)
-                        return 0;
-
-                ebx = cpuid_ebx(0x00000001);
-                ebx &= 0x000000FF;
-
-                dprintk("ebx value is %x, x86_mask is %x\n", ebx, c->x86_mask);
-
-                switch (c->x86_mask) {
-                case 4:
-                        /*
-                         * B-stepping [M-P4-M]
-                         * sample has ebx = 0x0f, production has 0x0e.
-                         */
-                        if ((ebx == 0x0e) || (ebx == 0x0f))
-                                return SPEEDSTEP_CPU_P4M;
-                        break;
-                case 7:
-                        /*
-                         * C-stepping [M-P4-M]
-                         * needs to have ebx=0x0e, else it's a celeron:
-                         * cf. 25130917.pdf / page 7, footnote 5 even
-                         * though 25072120.pdf / page 7 doesn't say
-                         * samples are only of B-stepping...
-                         */
-                        if (ebx == 0x0e)
-                                return SPEEDSTEP_CPU_P4M;
-                        break;
-                case 9:
-                        /*
-                         * D-stepping [M-P4-M or M-P4/533]
-                         *
-                         * this is totally strange: CPUID 0x0F29 is
-                         * used by M-P4-M, M-P4/533 and(!) Celeron CPUs.
-                         * The latter need to be sorted out as they don't
-                         * support speedstep.
-                         * Celerons with CPUID 0x0F29 may have either
-                         * ebx=0x8 or 0xf -- 25130917.pdf doesn't say anything
-                         * specific.
-                         * M-P4-Ms may have either ebx=0xe or 0xf [see above]
-                         * M-P4/533 have either ebx=0xe or 0xf. [25317607.pdf]
-                         * also, M-P4M HTs have ebx=0x8, too
-                         * For now, they are distinguished by the model_id
-                         * string
-                         */
-                        if ((ebx == 0x0e) ||
-                                (strstr(c->x86_model_id,
-                                    "Mobile Intel(R) Pentium(R) 4") != NULL))
-                                return SPEEDSTEP_CPU_P4M;
-                        break;
-                default:
-                        break;
-                }
-                return 0;
-        }
-
-        switch (c->x86_model) {
-        case 0x0B: /* Intel PIII [Tualatin] */
-                /* cpuid_ebx(1) is 0x04 for desktop PIII,
-                 * 0x06 for mobile PIII-M */
-                ebx = cpuid_ebx(0x00000001);
-                dprintk("ebx is %x\n", ebx);
-
-                ebx &= 0x000000FF;
-
-                if (ebx != 0x06)
-                        return 0;
-
-                /* So far all PIII-M processors support SpeedStep. See
-                 * Intel's 24540640.pdf of June 2003
-                 */
-                return SPEEDSTEP_CPU_PIII_T;
-
-        case 0x08: /* Intel PIII [Coppermine] */
-
-                /* all mobile PIII Coppermines have FSB 100 MHz
-                 * ==> sort out a few desktop PIIIs. */
-                rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_hi);
-                dprintk("Coppermine: MSR_IA32_EBL_CR_POWERON is 0x%x, 0x%x\n",
-                                msr_lo, msr_hi);
-                msr_lo &= 0x00c0000;
-                if (msr_lo != 0x0080000)
-                        return 0;
-
-                /*
-                 * If the processor is a mobile version,
-                 * platform ID has bit 50 set
-                 * it has SpeedStep technology if either
-                 * bit 56 or 57 is set
-                 */
-                rdmsr(MSR_IA32_PLATFORM_ID, msr_lo, msr_hi);
-                dprintk("Coppermine: MSR_IA32_PLATFORM ID is 0x%x, 0x%x\n",
-                                msr_lo, msr_hi);
-                if ((msr_hi & (1<<18)) &&
-                    (relaxed_check ? 1 : (msr_hi & (3<<24)))) {
-                        if (c->x86_mask == 0x01) {
-                                dprintk("early PIII version\n");
-                                return SPEEDSTEP_CPU_PIII_C_EARLY;
-                        } else
-                                return SPEEDSTEP_CPU_PIII_C;
-                }
-
-        default:
-                return 0;
-        }
-}
-EXPORT_SYMBOL_GPL(speedstep_detect_processor);
-
-
-/*********************************************************************
- *                     DETECT SPEEDSTEP SPEEDS                       *
- *********************************************************************/
-
-unsigned int speedstep_get_freqs(enum speedstep_processor processor,
-                                  unsigned int *low_speed,
-                                  unsigned int *high_speed,
-                                  unsigned int *transition_latency,
-                                  void (*set_state) (unsigned int state))
-{
-        unsigned int prev_speed;
-        unsigned int ret = 0;
-        unsigned long flags;
-        struct timeval tv1, tv2;
-
-        if ((!processor) || (!low_speed) || (!high_speed) || (!set_state))
-                return -EINVAL;
-
-        dprintk("trying to determine both speeds\n");
-
-        /* get current speed */
-        prev_speed = speedstep_get_frequency(processor);
-        if (!prev_speed)
-                return -EIO;
-
-        dprintk("previous speed is %u\n", prev_speed);
-
-        local_irq_save(flags);
-
-        /* switch to low state */
-        set_state(SPEEDSTEP_LOW);
-        *low_speed = speedstep_get_frequency(processor);
-        if (!*low_speed) {
-                ret = -EIO;
-                goto out;
-        }
-
-        dprintk("low speed is %u\n", *low_speed);
-
-        /* start latency measurement */
-        if (transition_latency)
-                do_gettimeofday(&tv1);
-
-        /* switch to high state */
-        set_state(SPEEDSTEP_HIGH);
-
-        /* end latency measurement */
-        if (transition_latency)
-                do_gettimeofday(&tv2);
-
-        *high_speed = speedstep_get_frequency(processor);
-        if (!*high_speed) {
-                ret = -EIO;
-                goto out;
-        }
-
-        dprintk("high speed is %u\n", *high_speed);
-
-        if (*low_speed == *high_speed) {
-                ret = -ENODEV;
-                goto out;
-        }
-
-        /* switch to previous state, if necessary */
-        if (*high_speed != prev_speed)
-                set_state(SPEEDSTEP_LOW);
-
-        if (transition_latency) {
-                *transition_latency = (tv2.tv_sec - tv1.tv_sec) * USEC_PER_SEC +
-                        tv2.tv_usec - tv1.tv_usec;
-                dprintk("transition latency is %u uSec\n", *transition_latency);
-
-                /* convert uSec to nSec and add 20% for safety reasons */
-                *transition_latency *= 1200;
-
-                /* check if the latency measurement is too high or too low
-                 * and set it to a safe value (500uSec) in that case
-                 */
-                if (*transition_latency > 10000000 ||
-                    *transition_latency < 50000) {
-                        printk(KERN_WARNING PFX "frequency transition "
-                                        "measured seems out of range (%u "
-                                        "nSec), falling back to a safe one of"
-                                        "%u nSec.\n",
-                                        *transition_latency, 500000);
-                        *transition_latency = 500000;
-                }
-        }
-
-out:
-        local_irq_restore(flags);
-        return ret;
-}
-EXPORT_SYMBOL_GPL(speedstep_get_freqs);
-
-#ifdef CONFIG_X86_SPEEDSTEP_RELAXED_CAP_CHECK
-module_param(relaxed_check, int, 0444);
-MODULE_PARM_DESC(relaxed_check,
-                "Don't do all checks for speedstep capability.");
-#endif
-
-MODULE_AUTHOR("Dominik Brodowski <linux@brodo.de>");
-MODULE_DESCRIPTION("Library for Intel SpeedStep 1 or 2 cpufreq drivers.");
-MODULE_LICENSE("GPL");
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.h b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.h
deleted file mode 100644
index 70d9cea1219d..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
- *
- *  Licensed under the terms of the GNU GPL License version 2.
- *
- *  Library for common functions for Intel SpeedStep v.1 and v.2 support
- *
- *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
- */
-
-
-
-/* processors */
-enum speedstep_processor {
-        SPEEDSTEP_CPU_PIII_C_EARLY = 0x00000001,  /* Coppermine core */
-        SPEEDSTEP_CPU_PIII_C       = 0x00000002,  /* Coppermine core */
-        SPEEDSTEP_CPU_PIII_T       = 0x00000003,  /* Tualatin core */
-        SPEEDSTEP_CPU_P4M          = 0x00000004,  /* P4-M  */
-/* the following processors are not speedstep-capable and are not auto-detected
- * in speedstep_detect_processor(). However, their speed can be detected using
- * the speedstep_get_frequency() call. */
-        SPEEDSTEP_CPU_PM           = 0xFFFFFF03,  /* Pentium M  */
-        SPEEDSTEP_CPU_P4D          = 0xFFFFFF04,  /* desktop P4  */
-        SPEEDSTEP_CPU_PCORE        = 0xFFFFFF05,  /* Core */
-};
-
-/* speedstep states -- only two of them */
-
-#define SPEEDSTEP_HIGH  0x00000000
-#define SPEEDSTEP_LOW   0x00000001
-
-
-/* detect a speedstep-capable processor */
-extern enum speedstep_processor speedstep_detect_processor(void);
-
-/* detect the current speed (in khz) of the processor */
-extern unsigned int speedstep_get_frequency(enum speedstep_processor processor);
-
-
-/* detect the low and high speeds of the processor. The callback
- * set_state"'s first argument is either SPEEDSTEP_HIGH or
- * SPEEDSTEP_LOW; the second argument is zero so that no
- * cpufreq_notify_transition calls are initiated.
- */
-extern unsigned int speedstep_get_freqs(enum speedstep_processor processor,
-        unsigned int *low_speed,
-        unsigned int *high_speed,
-        unsigned int *transition_latency,
-        void (*set_state) (unsigned int state));
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c b/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c
deleted file mode 100644
index 91bc25b67bc1..000000000000
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c
+++ /dev/null
@@ -1,467 +0,0 @@
-/*
- * Intel SpeedStep SMI driver.
- *
- * (C) 2003  Hiroshi Miura <miura@da-cha.org>
- *
- *  Licensed under the terms of the GNU GPL License version 2.
- *
- */
-
-
-/*********************************************************************
- *                        SPEEDSTEP - DEFINITIONS                    *
- *********************************************************************/
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/init.h>
-#include <linux/cpufreq.h>
-#include <linux/delay.h>
-#include <linux/io.h>
-#include <asm/ist.h>
-
-#include "speedstep-lib.h"
-
-/* speedstep system management interface port/command.
- *
- * These parameters are got from IST-SMI BIOS call.
- * If user gives it, these are used.
- *
- */
-static int smi_port;
-static int smi_cmd;
-static unsigned int smi_sig;
-
-/* info about the processor */
-static enum speedstep_processor speedstep_processor;
-
-/*
- * There are only two frequency states for each processor. Values
- * are in kHz for the time being.
- */
-static struct cpufreq_frequency_table speedstep_freqs[] = {
-        {SPEEDSTEP_HIGH,        0},
-        {SPEEDSTEP_LOW,         0},
-        {0,                     CPUFREQ_TABLE_END},
-};
-
-#define GET_SPEEDSTEP_OWNER 0
-#define GET_SPEEDSTEP_STATE 1
-#define SET_SPEEDSTEP_STATE 2
-#define GET_SPEEDSTEP_FREQS 4
-
-/* how often shall the SMI call be tried if it failed, e.g. because
- * of DMA activity going on? */
-#define SMI_TRIES 5
-
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
-                "speedstep-smi", msg)
-
-/**
- * speedstep_smi_ownership
- */
-static int speedstep_smi_ownership(void)
-{
-        u32 command, result, magic, dummy;
-        u32 function = GET_SPEEDSTEP_OWNER;
-        unsigned char magic_data[] = "Copyright (c) 1999 Intel Corporation";
-
-        command = (smi_sig & 0xffffff00) | (smi_cmd & 0xff);
-        magic = virt_to_phys(magic_data);
-
-        dprintk("trying to obtain ownership with command %x at port %x\n",
-                        command, smi_port);
-
-        __asm__ __volatile__(
-                "push %%ebp\n"
-                "out %%al, (%%dx)\n"
-                "pop %%ebp\n"
-                : "=D" (result),
-                  "=a" (dummy), "=b" (dummy), "=c" (dummy), "=d" (dummy),
-                  "=S" (dummy)
-                : "a" (command), "b" (function), "c" (0), "d" (smi_port),
-                  "D" (0), "S" (magic)
-                : "memory"
-        );
-
-        dprintk("result is %x\n", result);
-
-        return result;
-}
-
-/**
- * speedstep_smi_get_freqs - get SpeedStep preferred & current freq.
- * @low: the low frequency value is placed here
- * @high: the high frequency value is placed here
- *
- * Only available on later SpeedStep-enabled systems, returns false results or
- * even hangs [cf. bugme.osdl.org # 1422] on earlier systems. Empirical testing
- * shows that the latter occurs if !(ist_info.event & 0xFFFF).
- */
-static int speedstep_smi_get_freqs(unsigned int *low, unsigned int *high)
-{
-        u32 command, result = 0, edi, high_mhz, low_mhz, dummy;
-        u32 state = 0;
-        u32 function = GET_SPEEDSTEP_FREQS;
-
-        if (!(ist_info.event & 0xFFFF)) {
-                dprintk("bug #1422 -- can't read freqs from BIOS\n");
-                return -ENODEV;
-        }
-
-        command = (smi_sig & 0xffffff00) | (smi_cmd & 0xff);
-
-        dprintk("trying to determine frequencies with command %x at port %x\n",
-                        command, smi_port);
-
-        __asm__ __volatile__(
-                "push %%ebp\n"
-                "out %%al, (%%dx)\n"
-                "pop %%ebp"
-                : "=a" (result),
-                  "=b" (high_mhz),
-                  "=c" (low_mhz),
-                  "=d" (state), "=D" (edi), "=S" (dummy)
-                : "a" (command),
-                  "b" (function),
-                  "c" (state),
-                  "d" (smi_port), "S" (0), "D" (0)
-        );
-
-        dprintk("result %x, low_freq %u, high_freq %u\n",
-                        result, low_mhz, high_mhz);
-
-        /* abort if results are obviously incorrect... */
-        if ((high_mhz + low_mhz) < 600)
-                return -EINVAL;
-
-        *high = high_mhz * 1000;
-        *low  = low_mhz  * 1000;
-
-        return result;
-}
-
-/**
- * speedstep_get_state - set the SpeedStep state
- * @state: processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
- *
- */
-static int speedstep_get_state(void)
-{
-        u32 function = GET_SPEEDSTEP_STATE;
-        u32 result, state, edi, command, dummy;
-
-        command = (smi_sig & 0xffffff00) | (smi_cmd & 0xff);
-
-        dprintk("trying to determine current setting with command %x "
-                "at port %x\n", command, smi_port);
-
-        __asm__ __volatile__(
-                "push %%ebp\n"
-                "out %%al, (%%dx)\n"
-                "pop %%ebp\n"
-                : "=a" (result),
-                  "=b" (state), "=D" (edi),
-                  "=c" (dummy), "=d" (dummy), "=S" (dummy)
-                : "a" (command), "b" (function), "c" (0),
-                  "d" (smi_port), "S" (0), "D" (0)
-        );
-
-        dprintk("state is %x, result is %x\n", state, result);
-
-        return state & 1;
-}
-
-
-/**
- * speedstep_set_state - set the SpeedStep state
- * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
- *
- */
-static void speedstep_set_state(unsigned int state)
-{
-        unsigned int result = 0, command, new_state, dummy;
-        unsigned long flags;
-        unsigned int function = SET_SPEEDSTEP_STATE;
-        unsigned int retry = 0;
-
-        if (state > 0x1)
-                return;
-
-        /* Disable IRQs */
-        local_irq_save(flags);
-
-        command = (smi_sig & 0xffffff00) | (smi_cmd & 0xff);
-
-        dprintk("trying to set frequency to state %u "
-                "with command %x at port %x\n",
-                state, command, smi_port);
-
-        do {
-                if (retry) {
-                        dprintk("retry %u, previous result %u, waiting...\n",
-                                        retry, result);
-                        mdelay(retry * 50);
-                }
-                retry++;
-                __asm__ __volatile__(
-                        "push %%ebp\n"
-                        "out %%al, (%%dx)\n"
-                        "pop %%ebp"
-                        : "=b" (new_state), "=D" (result),
-                          "=c" (dummy), "=a" (dummy),
-                          "=d" (dummy), "=S" (dummy)
-                        : "a" (command), "b" (function), "c" (state),
-                          "d" (smi_port), "S" (0), "D" (0)
-                        );
-        } while ((new_state != state) && (retry <= SMI_TRIES));
-
-        /* enable IRQs */
-        local_irq_restore(flags);
-
-        if (new_state == state)
-                dprintk("change to %u MHz succeeded after %u tries "
-                        "with result %u\n",
-                        (speedstep_freqs[new_state].frequency / 1000),
-                        retry, result);
-        else
-                printk(KERN_ERR "cpufreq: change to state %u "
-                        "failed with new_state %u and result %u\n",
-                        state, new_state, result);
-
-        return;
-}
-
-
-/**
- * speedstep_target - set a new CPUFreq policy
- * @policy: new policy
- * @target_freq: new freq
- * @relation:
- *
- * Sets a new CPUFreq policy/freq.
- */
-static int speedstep_target(struct cpufreq_policy *policy,
-                        unsigned int target_freq, unsigned int relation)
-{
-        unsigned int newstate = 0;
-        struct cpufreq_freqs freqs;
-
-        if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0],
-                                target_freq, relation, &newstate))
-                return -EINVAL;
-
-        freqs.old = speedstep_freqs[speedstep_get_state()].frequency;
-        freqs.new = speedstep_freqs[newstate].frequency;
-        freqs.cpu = 0; /* speedstep.c is UP only driver */
-
-        if (freqs.old == freqs.new)
-                return 0;
-
-        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-        speedstep_set_state(newstate);
-        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-
-        return 0;
-}
-
-
-/**
- * speedstep_verify - verifies a new CPUFreq policy
- * @policy: new policy
- *
- * Limit must be within speedstep_low_freq and speedstep_high_freq, with
- * at least one border included.
- */
-static int speedstep_verify(struct cpufreq_policy *policy)
-{
-        return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
-}
-
-
-static int speedstep_cpu_init(struct cpufreq_policy *policy)
-{
-        int result;
-        unsigned int speed, state;
-        unsigned int *low, *high;
-
-        /* capability check */
-        if (policy->cpu != 0)
-                return -ENODEV;
-
-        result = speedstep_smi_ownership();
-        if (result) {
-                dprintk("fails in acquiring ownership of a SMI interface.\n");
-                return -EINVAL;
-        }
-
-        /* detect low and high frequency */
-        low = &speedstep_freqs[SPEEDSTEP_LOW].frequency;
-        high = &speedstep_freqs[SPEEDSTEP_HIGH].frequency;
-
-        result = speedstep_smi_get_freqs(low, high);
-        if (result) {
-                /* fall back to speedstep_lib.c dection mechanism:
-                 * try both states out */
-                dprintk("could not detect low and high frequencies "
-                                "by SMI call.\n");
-                result = speedstep_get_freqs(speedstep_processor,
-                                low, high,
-                                NULL,
-                                &speedstep_set_state);
-
-                if (result) {
-                        dprintk("could not detect two different speeds"
-                                        " -- aborting.\n");
-                        return result;
-                } else
-                        dprintk("workaround worked.\n");
-        }
-
-        /* get current speed setting */
-        state = speedstep_get_state();
-        speed = speedstep_freqs[state].frequency;
-
-        dprintk("currently at %s speed setting - %i MHz\n",
-                (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency)
-                ? "low" : "high",
-                (speed / 1000));
-
-        /* cpuinfo and default policy values */
-        policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
-        policy->cur = speed;
-
-        result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
-        if (result)
-                return result;
-
-        cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
-
-        return 0;
-}
-
-static int speedstep_cpu_exit(struct cpufreq_policy *policy)
-{
-        cpufreq_frequency_table_put_attr(policy->cpu);
-        return 0;
-}
-
-static unsigned int speedstep_get(unsigned int cpu)
-{
-        if (cpu)
-                return -ENODEV;
-        return speedstep_get_frequency(speedstep_processor);
-}
-
-
-static int speedstep_resume(struct cpufreq_policy *policy)
-{
-        int result = speedstep_smi_ownership();
-
-        if (result)
-                dprintk("fails in re-acquiring ownership of a SMI interface.\n");
-
-        return result;
-}
-
-static struct freq_attr *speedstep_attr[] = {
-        &cpufreq_freq_attr_scaling_available_freqs,
-        NULL,
-};
-
-static struct cpufreq_driver speedstep_driver = {
-        .name           = "speedstep-smi",
-        .verify         = speedstep_verify,
-        .target         = speedstep_target,
-        .init           = speedstep_cpu_init,
-        .exit           = speedstep_cpu_exit,
-        .get            = speedstep_get,
-        .resume         = speedstep_resume,
-        .owner          = THIS_MODULE,
-        .attr           = speedstep_attr,
-};
-
-/**
- * speedstep_init - initializes the SpeedStep CPUFreq driver
- *
- *   Initializes the SpeedStep support. Returns -ENODEV on unsupported
- * BIOS, -EINVAL on problems during initiatization, and zero on
- * success.
- */
-static int __init speedstep_init(void)
-{
-        speedstep_processor = speedstep_detect_processor();
-
-        switch (speedstep_processor) {
-        case SPEEDSTEP_CPU_PIII_T:
-        case SPEEDSTEP_CPU_PIII_C:
-        case SPEEDSTEP_CPU_PIII_C_EARLY:
-                break;
-        default:
-                speedstep_processor = 0;
-        }
-
-        if (!speedstep_processor) {
-                dprintk("No supported Intel CPU detected.\n");
-                return -ENODEV;
-        }
-
-        dprintk("signature:0x%.8lx, command:0x%.8lx, "
-                "event:0x%.8lx, perf_level:0x%.8lx.\n",
-                ist_info.signature, ist_info.command,
-                ist_info.event, ist_info.perf_level);
-
-        /* Error if no IST-SMI BIOS or no PARM
-                 sig= 'ISGE' aka 'Intel Speedstep Gate E' */
-        if ((ist_info.signature !=  0x47534943) && (
-            (smi_port == 0) || (smi_cmd == 0)))
-                return -ENODEV;
-
-        if (smi_sig == 1)
-                smi_sig = 0x47534943;
-        else
-                smi_sig = ist_info.signature;
-
-        /* setup smi_port from MODLULE_PARM or BIOS */
-        if ((smi_port > 0xff) || (smi_port < 0))
-                return -EINVAL;
-        else if (smi_port == 0)
-                smi_port = ist_info.command & 0xff;
-
-        if ((smi_cmd > 0xff) || (smi_cmd < 0))
-                return -EINVAL;
-        else if (smi_cmd == 0)
-                smi_cmd = (ist_info.command >> 16) & 0xff;
-
-        return cpufreq_register_driver(&speedstep_driver);
-}
-
-
-/**
- * speedstep_exit - unregisters SpeedStep support
- *
- *   Unregisters SpeedStep support.
- */
-static void __exit speedstep_exit(void)
-{
-        cpufreq_unregister_driver(&speedstep_driver);
-}
-
-module_param(smi_port, int, 0444);
-module_param(smi_cmd,  int, 0444);
-module_param(smi_sig, uint, 0444);
-
-MODULE_PARM_DESC(smi_port, "Override the BIOS-given IST port with this value "
-                "-- Intel's default setting is 0xb2");
-MODULE_PARM_DESC(smi_cmd, "Override the BIOS-given IST command with this value "
-                "-- Intel's default setting is 0x82");
-MODULE_PARM_DESC(smi_sig, "Set to 1 to fake the IST signature when using the "
-                "SMI interface.");
-
-MODULE_AUTHOR("Hiroshi Miura");
-MODULE_DESCRIPTION("Speedstep driver for IST applet SMI interface.");
-MODULE_LICENSE("GPL");
-
-module_init(speedstep_init);
-module_exit(speedstep_exit);
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index df86bc8c859d..fc73a34ba8c9 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -29,10 +29,10 @@
 
 static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
 {
+        u64 misc_enable;
+
         /* Unmask CPUID levels if masked: */
         if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) {
-                u64 misc_enable;
-
                 rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
 
                 if (misc_enable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID) {
@@ -118,8 +118,6 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
          * (model 2) with the same problem.
          */
         if (c->x86 == 15) {
-                u64 misc_enable;
-
                 rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
 
                 if (misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING) {
@@ -130,6 +128,19 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
                 }
         }
 #endif
+
+        /*
+         * If fast string is not enabled in IA32_MISC_ENABLE for any reason,
+         * clear the fast string and enhanced fast string CPU capabilities.
+         */
+        if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) {
+                rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
+                if (!(misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING)) {
+                        printk(KERN_INFO "Disabled fast string operations\n");
+                        setup_clear_cpu_cap(X86_FEATURE_REP_GOOD);
+                        setup_clear_cpu_cap(X86_FEATURE_ERMS);
+                }
+        }
 }
 
 #ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 167f97b5596e..bb0adad35143 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -509,6 +509,7 @@ recurse:
 out_free:
         if (b) {
                 kobject_put(&b->kobj);
+                list_del(&b->miscj);
                 kfree(b);
         }
         return err;
diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c
index 6f8c5e9da97f..0f034460260d 100644
--- a/arch/x86/kernel/cpu/mcheck/therm_throt.c
+++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c
@@ -446,18 +446,20 @@ void intel_init_thermal(struct cpuinfo_x86 *c)
          */
         rdmsr(MSR_IA32_MISC_ENABLE, l, h);
 
+        h = lvtthmr_init;
         /*
          * The initial value of thermal LVT entries on all APs always reads
          * 0x10000 because APs are woken up by BSP issuing INIT-SIPI-SIPI
          * sequence to them and LVT registers are reset to 0s except for
          * the mask bits which are set to 1s when APs receive INIT IPI.
-         * Always restore the value that BIOS has programmed on AP based on
-         * BSP's info we saved since BIOS is always setting the same value
-         * for all threads/cores
+         * If BIOS takes over the thermal interrupt and sets its interrupt
+         * delivery mode to SMI (not fixed), it restores the value that the
+         * BIOS has programmed on AP based on BSP's info we saved since BIOS
+         * is always setting the same value for all threads/cores.
          */
-        apic_write(APIC_LVTTHMR, lvtthmr_init);
+        if ((h & APIC_DM_FIXED_MASK) != APIC_DM_FIXED)
+                apic_write(APIC_LVTTHMR, lvtthmr_init);
 
-        h = lvtthmr_init;
 
         if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
                 printk(KERN_DEBUG
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index e638689279d3..3a0338b4b179 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -31,6 +31,7 @@
 #include <asm/nmi.h>
 #include <asm/compat.h>
 #include <asm/smp.h>
+#include <asm/alternative.h>
 
 #if 0
 #undef wrmsrl
@@ -363,12 +364,18 @@ again:
         return new_raw_count;
 }
 
-/* using X86_FEATURE_PERFCTR_CORE to later implement ALTERNATIVE() here */
 static inline int x86_pmu_addr_offset(int index)
 {
-        if (boot_cpu_has(X86_FEATURE_PERFCTR_CORE))
-                return index << 1;
-        return index;
+        int offset;
+
+        /* offset = X86_FEATURE_PERFCTR_CORE ? index << 1 : index */
+        alternative_io(ASM_NOP2,
+                       "shll $1, %%eax",
+                       X86_FEATURE_PERFCTR_CORE,
+                       "=a" (offset),
+                       "a"  (index));
+
+        return offset;
 }
 
 static inline unsigned int x86_pmu_config_addr(int index)
@@ -1766,17 +1773,6 @@ static struct pmu pmu = {
  * callchain support
  */
 
-static void
-backtrace_warning_symbol(void *data, char *msg, unsigned long symbol)
-{
-        /* Ignore warnings */
-}
-
-static void backtrace_warning(void *data, char *msg)
-{
-        /* Ignore warnings */
-}
-
 static int backtrace_stack(void *data, char *name)
 {
         return 0;
@@ -1790,8 +1786,6 @@ static void backtrace_address(void *data, unsigned long addr, int reliable)
 }
 
 static const struct stacktrace_ops backtrace_ops = {
-        .warning                = backtrace_warning,
-        .warning_symbol         = backtrace_warning_symbol,
         .stack                  = backtrace_stack,
         .address                = backtrace_address,
         .walk_stack             = print_context_stack_bp,
diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
index cf4e369cea67..fe29c1d2219e 100644
--- a/arch/x86/kernel/cpu/perf_event_amd.c
+++ b/arch/x86/kernel/cpu/perf_event_amd.c
@@ -96,12 +96,14 @@ static __initconst const u64 amd_hw_cache_event_ids
  */
 static const u64 amd_perfmon_event_map[] =
 {
-  [PERF_COUNT_HW_CPU_CYCLES]            = 0x0076,
-  [PERF_COUNT_HW_INSTRUCTIONS]          = 0x00c0,
-  [PERF_COUNT_HW_CACHE_REFERENCES]      = 0x0080,
-  [PERF_COUNT_HW_CACHE_MISSES]          = 0x0081,
-  [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]   = 0x00c2,
-  [PERF_COUNT_HW_BRANCH_MISSES]         = 0x00c3,
+  [PERF_COUNT_HW_CPU_CYCLES]                    = 0x0076,
+  [PERF_COUNT_HW_INSTRUCTIONS]                  = 0x00c0,
+  [PERF_COUNT_HW_CACHE_REFERENCES]              = 0x0080,
+  [PERF_COUNT_HW_CACHE_MISSES]                  = 0x0081,
+  [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]           = 0x00c2,
+  [PERF_COUNT_HW_BRANCH_MISSES]                 = 0x00c3,
+  [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND]       = 0x00d0, /* "Decoder empty" event */
+  [PERF_COUNT_HW_STALLED_CYCLES_BACKEND]        = 0x00d1, /* "Dispatch stalls" event */
 };
 
 static u64 amd_pmu_event_map(int hw_event)
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 447a28de6f09..41178c826c48 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -36,7 +36,7 @@ static u64 intel_perfmon_event_map[PERF_COUNT_HW_MAX] __read_mostly =
   [PERF_COUNT_HW_BUS_CYCLES]            = 0x013c,
 };
 
-static struct event_constraint intel_core_event_constraints[] =
+static struct event_constraint intel_core_event_constraints[] __read_mostly =
 {
         INTEL_EVENT_CONSTRAINT(0x11, 0x2), /* FP_ASSIST */
         INTEL_EVENT_CONSTRAINT(0x12, 0x2), /* MUL */
@@ -47,7 +47,7 @@ static struct event_constraint intel_core_event_constraints[] =
         EVENT_CONSTRAINT_END
 };
 
-static struct event_constraint intel_core2_event_constraints[] =
+static struct event_constraint intel_core2_event_constraints[] __read_mostly =
 {
         FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
         FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
@@ -70,7 +70,7 @@ static struct event_constraint intel_core2_event_constraints[] =
         EVENT_CONSTRAINT_END
 };
 
-static struct event_constraint intel_nehalem_event_constraints[] =
+static struct event_constraint intel_nehalem_event_constraints[] __read_mostly =
 {
         FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
         FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
@@ -86,19 +86,19 @@ static struct event_constraint intel_nehalem_event_constraints[] =
         EVENT_CONSTRAINT_END
 };
 
-static struct extra_reg intel_nehalem_extra_regs[] =
+static struct extra_reg intel_nehalem_extra_regs[] __read_mostly =
 {
         INTEL_EVENT_EXTRA_REG(0xb7, MSR_OFFCORE_RSP_0, 0xffff),
         EVENT_EXTRA_END
 };
 
-static struct event_constraint intel_nehalem_percore_constraints[] =
+static struct event_constraint intel_nehalem_percore_constraints[] __read_mostly =
 {
         INTEL_EVENT_CONSTRAINT(0xb7, 0),
         EVENT_CONSTRAINT_END
 };
 
-static struct event_constraint intel_westmere_event_constraints[] =
+static struct event_constraint intel_westmere_event_constraints[] __read_mostly =
 {
         FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
         FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
@@ -110,7 +110,7 @@ static struct event_constraint intel_westmere_event_constraints[] =
         EVENT_CONSTRAINT_END
 };
 
-static struct event_constraint intel_snb_event_constraints[] =
+static struct event_constraint intel_snb_event_constraints[] __read_mostly =
 {
         FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
         FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
@@ -123,21 +123,21 @@ static struct event_constraint intel_snb_event_constraints[] =
         EVENT_CONSTRAINT_END
 };
 
-static struct extra_reg intel_westmere_extra_regs[] =
+static struct extra_reg intel_westmere_extra_regs[] __read_mostly =
 {
         INTEL_EVENT_EXTRA_REG(0xb7, MSR_OFFCORE_RSP_0, 0xffff),
         INTEL_EVENT_EXTRA_REG(0xbb, MSR_OFFCORE_RSP_1, 0xffff),
         EVENT_EXTRA_END
 };
 
-static struct event_constraint intel_westmere_percore_constraints[] =
+static struct event_constraint intel_westmere_percore_constraints[] __read_mostly =
 {
         INTEL_EVENT_CONSTRAINT(0xb7, 0),
         INTEL_EVENT_CONSTRAINT(0xbb, 0),
         EVENT_CONSTRAINT_END
 };
 
-static struct event_constraint intel_gen_event_constraints[] =
+static struct event_constraint intel_gen_event_constraints[] __read_mostly =
 {
         FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
         FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
@@ -1440,6 +1440,11 @@ static __init int intel_pmu_init(void)
                 x86_pmu.enable_all = intel_pmu_nhm_enable_all;
                 x86_pmu.extra_regs = intel_nehalem_extra_regs;
 
+                /* UOPS_ISSUED.STALLED_CYCLES */
+                intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x180010e;
+                /* UOPS_EXECUTED.CORE_ACTIVE_CYCLES,c=1,i=1 */
+                intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x1803fb1;
+
                 if (ebx & 0x40) {
                         /*
                          * Erratum AAJ80 detected, we work it around by using
@@ -1480,6 +1485,12 @@ static __init int intel_pmu_init(void)
                 x86_pmu.enable_all = intel_pmu_nhm_enable_all;
                 x86_pmu.pebs_constraints = intel_westmere_pebs_event_constraints;
                 x86_pmu.extra_regs = intel_westmere_extra_regs;
+
+                /* UOPS_ISSUED.STALLED_CYCLES */
+                intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x180010e;
+                /* UOPS_EXECUTED.CORE_ACTIVE_CYCLES,c=1,i=1 */
+                intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x1803fb1;
+
                 pr_cont("Westmere events, ");
                 break;
 
@@ -1491,6 +1502,12 @@ static __init int intel_pmu_init(void)
 
                 x86_pmu.event_constraints = intel_snb_event_constraints;
                 x86_pmu.pebs_constraints = intel_snb_pebs_events;
+
+                /* UOPS_ISSUED.ANY,c=1,i=1 to count stall cycles */
+                intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x180010e;
+                /* UOPS_DISPATCHED.THREAD,c=1,i=1 to count stall cycles*/
+                intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x18001b1;
+
                 pr_cont("SandyBridge events, ");
                 break;
 
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index e93fcd55fae1..ead584fb6a7d 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -468,7 +468,7 @@ static struct p4_event_bind p4_event_bind_map[] = {
                 .opcode         = P4_OPCODE(P4_EVENT_MISPRED_BRANCH_RETIRED),
                 .escr_msr       = { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
                 .escr_emask     =
-                P4_ESCR_EMASK_BIT(P4_EVENT_MISPRED_BRANCH_RETIRED, NBOGUS),
+                        P4_ESCR_EMASK_BIT(P4_EVENT_MISPRED_BRANCH_RETIRED, NBOGUS),
                 .cntr           = { {12, 13, 16}, {14, 15, 17} },
         },
         [P4_EVENT_X87_ASSIST] = {
@@ -912,8 +912,7 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)
         int idx, handled = 0;
         u64 val;
 
-        data.addr = 0;
-        data.raw = NULL;
+        perf_sample_data_init(&data, 0);
 
         cpuc = &__get_cpu_var(cpu_hw_events);
 
@@ -1197,7 +1196,7 @@ static __init int p4_pmu_init(void)
 {
         unsigned int low, high;
 
-        /* If we get stripped -- indexig fails */
+        /* If we get stripped -- indexing fails */
         BUILD_BUG_ON(ARCH_P4_MAX_CCCR > X86_PMC_MAX_GENERIC);
 
         rdmsr(MSR_IA32_MISC_ENABLE, low, high);
diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c
index e2a3f0606da4..f478ff6877ef 100644
--- a/arch/x86/kernel/dumpstack.c
+++ b/arch/x86/kernel/dumpstack.c
@@ -135,20 +135,6 @@ print_context_stack_bp(struct thread_info *tinfo,
 }
 EXPORT_SYMBOL_GPL(print_context_stack_bp);
 
-
-static void
-print_trace_warning_symbol(void *data, char *msg, unsigned long symbol)
-{
-        printk(data);
-        print_symbol(msg, symbol);
-        printk("\n");
-}
-
-static void print_trace_warning(void *data, char *msg)
-{
-        printk("%s%s\n", (char *)data, msg);
-}
-
 static int print_trace_stack(void *data, char *name)
 {
         printk("%s <%s> ", (char *)data, name);
@@ -166,8 +152,6 @@ static void print_trace_address(void *data, unsigned long addr, int reliable)
 }
 
 static const struct stacktrace_ops print_trace_ops = {
-        .warning                = print_trace_warning,
-        .warning_symbol         = print_trace_warning_symbol,
         .stack                  = print_trace_stack,
         .address                = print_trace_address,
         .walk_stack             = print_context_stack,
diff --git a/arch/x86/kernel/kprobes.c b/arch/x86/kernel/kprobes.c
index c969fd9d1566..f1a6244d7d93 100644
--- a/arch/x86/kernel/kprobes.c
+++ b/arch/x86/kernel/kprobes.c
@@ -1183,12 +1183,13 @@ static void __kprobes optimized_callback(struct optimized_kprobe *op,
                                          struct pt_regs *regs)
 {
         struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+        unsigned long flags;
 
         /* This is possible if op is under delayed unoptimizing */
         if (kprobe_disabled(&op->kp))
                 return;
 
-        preempt_disable();
+        local_irq_save(flags);
         if (kprobe_running()) {
                 kprobes_inc_nmissed_count(&op->kp);
         } else {
@@ -1207,7 +1208,7 @@ static void __kprobes optimized_callback(struct optimized_kprobe *op,
                 opt_pre_handler(&op->kp, regs);
                 __this_cpu_write(current_kprobe, NULL);
         }
-        preempt_enable_no_resched();
+        local_irq_restore(flags);
 }
 
 static int __kprobes copy_optimized_instructions(u8 *dest, u8 *src)
diff --git a/arch/x86/kernel/module.c b/arch/x86/kernel/module.c
index ab23f1ad4bf1..52f256f2cc81 100644
--- a/arch/x86/kernel/module.c
+++ b/arch/x86/kernel/module.c
@@ -24,6 +24,7 @@
 #include <linux/bug.h>
 #include <linux/mm.h>
 #include <linux/gfp.h>
+#include <linux/jump_label.h>
 
 #include <asm/system.h>
 #include <asm/page.h>
diff --git a/arch/x86/kernel/pci-iommu_table.c b/arch/x86/kernel/pci-iommu_table.c
index 55d745ec1181..35ccf75696eb 100644
--- a/arch/x86/kernel/pci-iommu_table.c
+++ b/arch/x86/kernel/pci-iommu_table.c
@@ -50,20 +50,14 @@ void __init check_iommu_entries(struct iommu_table_entry *start,
                                 struct iommu_table_entry *finish)
 {
         struct iommu_table_entry *p, *q, *x;
-        char sym_p[KSYM_SYMBOL_LEN];
-        char sym_q[KSYM_SYMBOL_LEN];
 
         /* Simple cyclic dependency checker. */
         for (p = start; p < finish; p++) {
                 q = find_dependents_of(start, finish, p);
                 x = find_dependents_of(start, finish, q);
                 if (p == x) {
-                        sprint_symbol(sym_p, (unsigned long)p->detect);
-                        sprint_symbol(sym_q, (unsigned long)q->detect);
-
-                        printk(KERN_ERR "CYCLIC DEPENDENCY FOUND! %s depends" \
-                                        " on %s and vice-versa. BREAKING IT.\n",
-                                        sym_p, sym_q);
+                        printk(KERN_ERR "CYCLIC DEPENDENCY FOUND! %pS depends on %pS and vice-versa. BREAKING IT.\n",
+                               p->detect, q->detect);
                         /* Heavy handed way..*/
                         x->depend = 0;
                 }
@@ -72,12 +66,8 @@ void __init check_iommu_entries(struct iommu_table_entry *start,
         for (p = start; p < finish; p++) {
                 q = find_dependents_of(p, finish, p);
                 if (q && q > p) {
-                        sprint_symbol(sym_p, (unsigned long)p->detect);
-                        sprint_symbol(sym_q, (unsigned long)q->detect);
-
-                        printk(KERN_ERR "EXECUTION ORDER INVALID! %s "\
-                                        "should be called before %s!\n",
-                                        sym_p, sym_q);
+                        printk(KERN_ERR "EXECUTION ORDER INVALID! %pS should be called before %pS!\n",
+                               p->detect, q->detect);
                 }
         }
 }
diff --git a/arch/x86/kernel/stacktrace.c b/arch/x86/kernel/stacktrace.c
index 6515733a289d..55d9bc03f696 100644
--- a/arch/x86/kernel/stacktrace.c
+++ b/arch/x86/kernel/stacktrace.c
@@ -9,15 +9,6 @@
 #include <linux/uaccess.h>
 #include <asm/stacktrace.h>
 
-static void save_stack_warning(void *data, char *msg)
-{
-}
-
-static void
-save_stack_warning_symbol(void *data, char *msg, unsigned long symbol)
-{
-}
-
 static int save_stack_stack(void *data, char *name)
 {
         return 0;
@@ -53,16 +44,12 @@ save_stack_address_nosched(void *data, unsigned long addr, int reliable)
 }
 
 static const struct stacktrace_ops save_stack_ops = {
-        .warning        = save_stack_warning,
-        .warning_symbol = save_stack_warning_symbol,
         .stack          = save_stack_stack,
         .address        = save_stack_address,
         .walk_stack     = print_context_stack,
 };
 
 static const struct stacktrace_ops save_stack_ops_nosched = {
-        .warning        = save_stack_warning,
-        .warning_symbol = save_stack_warning_symbol,
         .stack          = save_stack_stack,
         .address        = save_stack_address_nosched,
         .walk_stack     = print_context_stack,
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index c11514e9128b..75ef4b18e9b7 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -61,6 +61,10 @@ struct x86_init_ops x86_init __initdata = {
                 .banner                 = default_banner,
         },
 
+        .mapping = {
+                .pagetable_reserve              = native_pagetable_reserve,
+        },
+
         .paging = {
                 .pagetable_setup_start  = native_pagetable_setup_start,
                 .pagetable_setup_done   = native_pagetable_setup_done,
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 1cd608973ce5..395bf0114aad 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -7,7 +7,7 @@
  * kernel and insert a module (lg.ko) which allows us to run other Linux
  * kernels the same way we'd run processes.  We call the first kernel the Host,
  * and the others the Guests.  The program which sets up and configures Guests
- * (such as the example in Documentation/lguest/lguest.c) is called the
+ * (such as the example in Documentation/virtual/lguest/lguest.c) is called the
  * Launcher.
  *
  * Secondly, we only run specially modified Guests, not normal kernels: setting
diff --git a/arch/x86/lib/clear_page_64.S b/arch/x86/lib/clear_page_64.S
index aa4326bfb24a..f2145cfa12a6 100644
--- a/arch/x86/lib/clear_page_64.S
+++ b/arch/x86/lib/clear_page_64.S
@@ -1,5 +1,6 @@
 #include <linux/linkage.h>
 #include <asm/dwarf2.h>
+#include <asm/alternative-asm.h>
 
 /*
  * Zero a page.         
@@ -14,6 +15,15 @@ ENTRY(clear_page_c)
         CFI_ENDPROC
 ENDPROC(clear_page_c)
 
+ENTRY(clear_page_c_e)
+        CFI_STARTPROC
+        movl $4096,%ecx
+        xorl %eax,%eax
+        rep stosb
+        ret
+        CFI_ENDPROC
+ENDPROC(clear_page_c_e)
+
 ENTRY(clear_page)
         CFI_STARTPROC
         xorl   %eax,%eax
@@ -38,21 +48,26 @@ ENTRY(clear_page)
 .Lclear_page_end:
 ENDPROC(clear_page)
 
-        /* Some CPUs run faster using the string instructions.
-           It is also a lot simpler. Use this when possible */
+        /*
+         * Some CPUs support enhanced REP MOVSB/STOSB instructions.
+         * It is recommended to use this when possible.
+         * If enhanced REP MOVSB/STOSB is not available, try to use fast string.
+         * Otherwise, use original function.
+         *
+         */
 
 #include <asm/cpufeature.h>
 
         .section .altinstr_replacement,"ax"
 1:      .byte 0xeb                                      /* jmp <disp8> */
         .byte (clear_page_c - clear_page) - (2f - 1b)   /* offset */
-2:
+2:      .byte 0xeb                                      /* jmp <disp8> */
+        .byte (clear_page_c_e - clear_page) - (3f - 2b) /* offset */
+3:
         .previous
         .section .altinstructions,"a"
-        .align 8
-        .quad clear_page
-        .quad 1b
-        .word X86_FEATURE_REP_GOOD
-        .byte .Lclear_page_end - clear_page
-        .byte 2b - 1b
+        altinstruction_entry clear_page,1b,X86_FEATURE_REP_GOOD,\
+                             .Lclear_page_end-clear_page, 2b-1b
+        altinstruction_entry clear_page,2b,X86_FEATURE_ERMS,   \
+                             .Lclear_page_end-clear_page,3b-2b
         .previous
diff --git a/arch/x86/lib/copy_user_64.S b/arch/x86/lib/copy_user_64.S
index 99e482615195..024840266ba0 100644
--- a/arch/x86/lib/copy_user_64.S
+++ b/arch/x86/lib/copy_user_64.S
@@ -15,23 +15,30 @@
 #include <asm/asm-offsets.h>
 #include <asm/thread_info.h>
 #include <asm/cpufeature.h>
+#include <asm/alternative-asm.h>
 
-        .macro ALTERNATIVE_JUMP feature,orig,alt
+/*
+ * By placing feature2 after feature1 in altinstructions section, we logically
+ * implement:
+ * If CPU has feature2, jmp to alt2 is used
+ * else if CPU has feature1, jmp to alt1 is used
+ * else jmp to orig is used.
+ */
+        .macro ALTERNATIVE_JUMP feature1,feature2,orig,alt1,alt2
 0:
         .byte 0xe9      /* 32bit jump */
         .long \orig-1f  /* by default jump to orig */
 1:
         .section .altinstr_replacement,"ax"
 2:      .byte 0xe9                      /* near jump with 32bit immediate */
-        .long \alt-1b /* offset */   /* or alternatively to alt */
+        .long \alt1-1b /* offset */   /* or alternatively to alt1 */
+3:      .byte 0xe9                      /* near jump with 32bit immediate */
+        .long \alt2-1b /* offset */   /* or alternatively to alt2 */
         .previous
+
         .section .altinstructions,"a"
-        .align 8
-        .quad  0b
-        .quad  2b
-        .word  \feature                 /* when feature is set */
-        .byte  5
-        .byte  5
+        altinstruction_entry 0b,2b,\feature1,5,5
+        altinstruction_entry 0b,3b,\feature2,5,5
         .previous
         .endm
 
@@ -72,8 +79,10 @@ ENTRY(_copy_to_user)
         addq %rdx,%rcx
         jc bad_to_user
         cmpq TI_addr_limit(%rax),%rcx
-        jae bad_to_user
-        ALTERNATIVE_JUMP X86_FEATURE_REP_GOOD,copy_user_generic_unrolled,copy_user_generic_string
+        ja bad_to_user
+        ALTERNATIVE_JUMP X86_FEATURE_REP_GOOD,X86_FEATURE_ERMS, \
+                copy_user_generic_unrolled,copy_user_generic_string,    \
+                copy_user_enhanced_fast_string
         CFI_ENDPROC
 ENDPROC(_copy_to_user)
 
@@ -85,8 +94,10 @@ ENTRY(_copy_from_user)
         addq %rdx,%rcx
         jc bad_from_user
         cmpq TI_addr_limit(%rax),%rcx
-        jae bad_from_user
-        ALTERNATIVE_JUMP X86_FEATURE_REP_GOOD,copy_user_generic_unrolled,copy_user_generic_string
+        ja bad_from_user
+        ALTERNATIVE_JUMP X86_FEATURE_REP_GOOD,X86_FEATURE_ERMS, \
+                copy_user_generic_unrolled,copy_user_generic_string,    \
+                copy_user_enhanced_fast_string
         CFI_ENDPROC
 ENDPROC(_copy_from_user)
 
@@ -255,3 +266,37 @@ ENTRY(copy_user_generic_string)
         .previous
         CFI_ENDPROC
 ENDPROC(copy_user_generic_string)
+
+/*
+ * Some CPUs are adding enhanced REP MOVSB/STOSB instructions.
+ * It's recommended to use enhanced REP MOVSB/STOSB if it's enabled.
+ *
+ * Input:
+ * rdi destination
+ * rsi source
+ * rdx count
+ *
+ * Output:
+ * eax uncopied bytes or 0 if successful.
+ */
+ENTRY(copy_user_enhanced_fast_string)
+        CFI_STARTPROC
+        andl %edx,%edx
+        jz 2f
+        movl %edx,%ecx
+1:      rep
+        movsb
+2:      xorl %eax,%eax
+        ret
+
+        .section .fixup,"ax"
+12:     movl %ecx,%edx          /* ecx is zerorest also */
+        jmp copy_user_handle_tail
+        .previous
+
+        .section __ex_table,"a"
+        .align 8
+        .quad 1b,12b
+        .previous
+        CFI_ENDPROC
+ENDPROC(copy_user_enhanced_fast_string)
diff --git a/arch/x86/lib/memcpy_64.S b/arch/x86/lib/memcpy_64.S
index 75ef61e35e38..daab21dae2d1 100644
--- a/arch/x86/lib/memcpy_64.S
+++ b/arch/x86/lib/memcpy_64.S
@@ -4,6 +4,7 @@
 
 #include <asm/cpufeature.h>
 #include <asm/dwarf2.h>
+#include <asm/alternative-asm.h>
 
 /*
  * memcpy - Copy a memory block.
@@ -37,6 +38,23 @@
 .Lmemcpy_e:
         .previous
 
+/*
+ * memcpy_c_e() - enhanced fast string memcpy. This is faster and simpler than
+ * memcpy_c. Use memcpy_c_e when possible.
+ *
+ * This gets patched over the unrolled variant (below) via the
+ * alternative instructions framework:
+ */
+        .section .altinstr_replacement, "ax", @progbits
+.Lmemcpy_c_e:
+        movq %rdi, %rax
+
+        movl %edx, %ecx
+        rep movsb
+        ret
+.Lmemcpy_e_e:
+        .previous
+
 ENTRY(__memcpy)
 ENTRY(memcpy)
         CFI_STARTPROC
@@ -171,21 +189,22 @@ ENDPROC(memcpy)
 ENDPROC(__memcpy)
 
         /*
-         * Some CPUs run faster using the string copy instructions.
-         * It is also a lot simpler. Use this when possible:
-         */
-
-        .section .altinstructions, "a"
-        .align 8
-        .quad memcpy
-        .quad .Lmemcpy_c
-        .word X86_FEATURE_REP_GOOD
-
-        /*
+         * Some CPUs are adding enhanced REP MOVSB/STOSB feature
+         * If the feature is supported, memcpy_c_e() is the first choice.
+         * If enhanced rep movsb copy is not available, use fast string copy
+         * memcpy_c() when possible. This is faster and code is simpler than
+         * original memcpy().
+         * Otherwise, original memcpy() is used.
+         * In .altinstructions section, ERMS feature is placed after REG_GOOD
+         * feature to implement the right patch order.
+         *
          * Replace only beginning, memcpy is used to apply alternatives,
          * so it is silly to overwrite itself with nops - reboot is the
          * only outcome...
          */
-        .byte .Lmemcpy_e - .Lmemcpy_c
-        .byte .Lmemcpy_e - .Lmemcpy_c
+        .section .altinstructions, "a"
+        altinstruction_entry memcpy,.Lmemcpy_c,X86_FEATURE_REP_GOOD,\
+                             .Lmemcpy_e-.Lmemcpy_c,.Lmemcpy_e-.Lmemcpy_c
+        altinstruction_entry memcpy,.Lmemcpy_c_e,X86_FEATURE_ERMS, \
+                             .Lmemcpy_e_e-.Lmemcpy_c_e,.Lmemcpy_e_e-.Lmemcpy_c_e
         .previous
diff --git a/arch/x86/lib/memmove_64.S b/arch/x86/lib/memmove_64.S
index 0ecb8433e5a8..d0ec9c2936d7 100644
--- a/arch/x86/lib/memmove_64.S
+++ b/arch/x86/lib/memmove_64.S
@@ -8,6 +8,7 @@
 #define _STRING_C
 #include <linux/linkage.h>
 #include <asm/dwarf2.h>
+#include <asm/cpufeature.h>
 
 #undef memmove
 
@@ -24,6 +25,7 @@
  */
 ENTRY(memmove)
         CFI_STARTPROC
+
         /* Handle more 32bytes in loop */
         mov %rdi, %rax
         cmp $0x20, %rdx
@@ -31,8 +33,13 @@ ENTRY(memmove)
 
         /* Decide forward/backward copy mode */
         cmp %rdi, %rsi
-        jb      2f
+        jge .Lmemmove_begin_forward
+        mov %rsi, %r8
+        add %rdx, %r8
+        cmp %rdi, %r8
+        jg 2f
 
+.Lmemmove_begin_forward:
         /*
          * movsq instruction have many startup latency
          * so we handle small size by general register.
@@ -78,6 +85,8 @@ ENTRY(memmove)
         rep movsq
         movq %r11, (%r10)
         jmp 13f
+.Lmemmove_end_forward:
+
         /*
          * Handle data backward by movsq.
          */
@@ -194,4 +203,22 @@ ENTRY(memmove)
 13:
         retq
         CFI_ENDPROC
+
+        .section .altinstr_replacement,"ax"
+.Lmemmove_begin_forward_efs:
+        /* Forward moving data. */
+        movq %rdx, %rcx
+        rep movsb
+        retq
+.Lmemmove_end_forward_efs:
+        .previous
+
+        .section .altinstructions,"a"
+        .align 8
+        .quad .Lmemmove_begin_forward
+        .quad .Lmemmove_begin_forward_efs
+        .word X86_FEATURE_ERMS
+        .byte .Lmemmove_end_forward-.Lmemmove_begin_forward
+        .byte .Lmemmove_end_forward_efs-.Lmemmove_begin_forward_efs
+        .previous
 ENDPROC(memmove)
diff --git a/arch/x86/lib/memset_64.S b/arch/x86/lib/memset_64.S
index 09d344269652..79bd454b78a3 100644
--- a/arch/x86/lib/memset_64.S
+++ b/arch/x86/lib/memset_64.S
@@ -2,9 +2,13 @@
 
 #include <linux/linkage.h>
 #include <asm/dwarf2.h>
+#include <asm/cpufeature.h>
+#include <asm/alternative-asm.h>
 
 /*
- * ISO C memset - set a memory block to a byte value.
+ * ISO C memset - set a memory block to a byte value. This function uses fast
+ * string to get better performance than the original function. The code is
+ * simpler and shorter than the orignal function as well.
  *      
  * rdi   destination
  * rsi   value (char) 
@@ -31,6 +35,28 @@
 .Lmemset_e:
         .previous
 
+/*
+ * ISO C memset - set a memory block to a byte value. This function uses
+ * enhanced rep stosb to override the fast string function.
+ * The code is simpler and shorter than the fast string function as well.
+ *
+ * rdi   destination
+ * rsi   value (char)
+ * rdx   count (bytes)
+ *
+ * rax   original destination
+ */
+        .section .altinstr_replacement, "ax", @progbits
+.Lmemset_c_e:
+        movq %rdi,%r9
+        movb %sil,%al
+        movl %edx,%ecx
+        rep stosb
+        movq %r9,%rax
+        ret
+.Lmemset_e_e:
+        .previous
+
 ENTRY(memset)
 ENTRY(__memset)
         CFI_STARTPROC
@@ -112,16 +138,20 @@ ENTRY(__memset)
 ENDPROC(memset)
 ENDPROC(__memset)
 
-        /* Some CPUs run faster using the string instructions.
-           It is also a lot simpler. Use this when possible */
-
-#include <asm/cpufeature.h>
-
+        /* Some CPUs support enhanced REP MOVSB/STOSB feature.
+         * It is recommended to use this when possible.
+         *
+         * If enhanced REP MOVSB/STOSB feature is not available, use fast string
+         * instructions.
+         *
+         * Otherwise, use original memset function.
+         *
+         * In .altinstructions section, ERMS feature is placed after REG_GOOD
+         * feature to implement the right patch order.
+         */
         .section .altinstructions,"a"
-        .align 8
-        .quad memset
-        .quad .Lmemset_c
-        .word X86_FEATURE_REP_GOOD
-        .byte .Lfinal - memset
-        .byte .Lmemset_e - .Lmemset_c
+        altinstruction_entry memset,.Lmemset_c,X86_FEATURE_REP_GOOD,\
+                             .Lfinal-memset,.Lmemset_e-.Lmemset_c
+        altinstruction_entry memset,.Lmemset_c_e,X86_FEATURE_ERMS, \
+                             .Lfinal-memset,.Lmemset_e_e-.Lmemset_c_e
         .previous
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 286d289b039b..37b8b0fe8320 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -81,6 +81,11 @@ static void __init find_early_table_space(unsigned long end, int use_pse,
                 end, pgt_buf_start << PAGE_SHIFT, pgt_buf_top << PAGE_SHIFT);
 }
 
+void __init native_pagetable_reserve(u64 start, u64 end)
+{
+        memblock_x86_reserve_range(start, end, "PGTABLE");
+}
+
 struct map_range {
         unsigned long start;
         unsigned long end;
@@ -272,9 +277,24 @@ unsigned long __init_refok init_memory_mapping(unsigned long start,
 
         __flush_tlb_all();
 
+        /*
+         * Reserve the kernel pagetable pages we used (pgt_buf_start -
+         * pgt_buf_end) and free the other ones (pgt_buf_end - pgt_buf_top)
+         * so that they can be reused for other purposes.
+         *
+         * On native it just means calling memblock_x86_reserve_range, on Xen it
+         * also means marking RW the pagetable pages that we allocated before
+         * but that haven't been used.
+         *
+         * In fact on xen we mark RO the whole range pgt_buf_start -
+         * pgt_buf_top, because we have to make sure that when
+         * init_memory_mapping reaches the pagetable pages area, it maps
+         * RO all the pagetable pages, including the ones that are beyond
+         * pgt_buf_end at that time.
+         */
         if (!after_bootmem && pgt_buf_end > pgt_buf_start)
-                memblock_x86_reserve_range(pgt_buf_start << PAGE_SHIFT,
-                                 pgt_buf_end << PAGE_SHIFT, "PGTABLE");
+                x86_init.mapping.pagetable_reserve(PFN_PHYS(pgt_buf_start),
+                                PFN_PHYS(pgt_buf_end));
 
         if (!after_bootmem)
                 early_memtest(start, end);
diff --git a/arch/x86/oprofile/backtrace.c b/arch/x86/oprofile/backtrace.c
index 2d49d4e19a36..a5b64ab4cd6e 100644
--- a/arch/x86/oprofile/backtrace.c
+++ b/arch/x86/oprofile/backtrace.c
@@ -16,17 +16,6 @@
 #include <asm/stacktrace.h>
 #include <linux/compat.h>
 
-static void backtrace_warning_symbol(void *data, char *msg,
-                                     unsigned long symbol)
-{
-        /* Ignore warnings */
-}
-
-static void backtrace_warning(void *data, char *msg)
-{
-        /* Ignore warnings */
-}
-
 static int backtrace_stack(void *data, char *name)
 {
         /* Yes, we want all stacks */
@@ -42,8 +31,6 @@ static void backtrace_address(void *data, unsigned long addr, int reliable)
 }
 
 static struct stacktrace_ops backtrace_ops = {
-        .warning        = backtrace_warning,
-        .warning_symbol = backtrace_warning_symbol,
         .stack          = backtrace_stack,
         .address        = backtrace_address,
         .walk_stack     = print_context_stack,
diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c
index e37b407a0ee8..8214724ce54d 100644
--- a/arch/x86/pci/xen.c
+++ b/arch/x86/pci/xen.c
@@ -108,7 +108,8 @@ static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
                 }
                 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq, 0,
                                                (type == PCI_CAP_ID_MSIX) ?
-                                               "msi-x" : "msi");
+                                               "msi-x" : "msi",
+                                               DOMID_SELF);
                 if (irq < 0)
                         goto error;
                 dev_dbg(&dev->dev,
@@ -148,7 +149,8 @@ static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
                 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i], 0,
                                                (type == PCI_CAP_ID_MSIX) ?
                                                "pcifront-msi-x" :
-                                               "pcifront-msi");
+                                               "pcifront-msi",
+                                                DOMID_SELF);
                 if (irq < 0)
                         goto free;
                 i++;
@@ -190,9 +192,16 @@ static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
 
         list_for_each_entry(msidesc, &dev->msi_list, list) {
                 struct physdev_map_pirq map_irq;
+                domid_t domid;
+
+                domid = ret = xen_find_device_domain_owner(dev);
+                /* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
+                 * hence check ret value for < 0. */
+                if (ret < 0)
+                        domid = DOMID_SELF;
 
                 memset(&map_irq, 0, sizeof(map_irq));
-                map_irq.domid = DOMID_SELF;
+                map_irq.domid = domid;
                 map_irq.type = MAP_PIRQ_TYPE_MSI;
                 map_irq.index = -1;
                 map_irq.pirq = -1;
@@ -215,14 +224,16 @@ static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
 
                 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
                 if (ret) {
-                        dev_warn(&dev->dev, "xen map irq failed %d\n", ret);
+                        dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
+                                 ret, domid);
                         goto out;
                 }
 
                 ret = xen_bind_pirq_msi_to_irq(dev, msidesc,
                                                map_irq.pirq, map_irq.index,
                                                (type == PCI_CAP_ID_MSIX) ?
-                                               "msi-x" : "msi");
+                                               "msi-x" : "msi",
+                                                domid);
                 if (ret < 0)
                         goto out;
         }
@@ -461,3 +472,78 @@ void __init xen_setup_pirqs(void)
         }
 }
 #endif
+
+#ifdef CONFIG_XEN_DOM0
+struct xen_device_domain_owner {
+        domid_t domain;
+        struct pci_dev *dev;
+        struct list_head list;
+};
+
+static DEFINE_SPINLOCK(dev_domain_list_spinlock);
+static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);
+
+static struct xen_device_domain_owner *find_device(struct pci_dev *dev)
+{
+        struct xen_device_domain_owner *owner;
+
+        list_for_each_entry(owner, &dev_domain_list, list) {
+                if (owner->dev == dev)
+                        return owner;
+        }
+        return NULL;
+}
+
+int xen_find_device_domain_owner(struct pci_dev *dev)
+{
+        struct xen_device_domain_owner *owner;
+        int domain = -ENODEV;
+
+        spin_lock(&dev_domain_list_spinlock);
+        owner = find_device(dev);
+        if (owner)
+                domain = owner->domain;
+        spin_unlock(&dev_domain_list_spinlock);
+        return domain;
+}
+EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);
+
+int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
+{
+        struct xen_device_domain_owner *owner;
+
+        owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
+        if (!owner)
+                return -ENODEV;
+
+        spin_lock(&dev_domain_list_spinlock);
+        if (find_device(dev)) {
+                spin_unlock(&dev_domain_list_spinlock);
+                kfree(owner);
+                return -EEXIST;
+        }
+        owner->domain = domain;
+        owner->dev = dev;
+        list_add_tail(&owner->list, &dev_domain_list);
+        spin_unlock(&dev_domain_list_spinlock);
+        return 0;
+}
+EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);
+
+int xen_unregister_device_domain_owner(struct pci_dev *dev)
+{
+        struct xen_device_domain_owner *owner;
+
+        spin_lock(&dev_domain_list_spinlock);
+        owner = find_device(dev);
+        if (!owner) {
+                spin_unlock(&dev_domain_list_spinlock);
+                return -ENODEV;
+        }
+        list_del(&owner->list);
+        spin_unlock(&dev_domain_list_spinlock);
+        kfree(owner);
+        return 0;
+}
+EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);
+#endif
diff --git a/arch/x86/platform/uv/tlb_uv.c b/arch/x86/platform/uv/tlb_uv.c
index 7cb6424317f6..c58e0ea39ef5 100644
--- a/arch/x86/platform/uv/tlb_uv.c
+++ b/arch/x86/platform/uv/tlb_uv.c
@@ -699,16 +699,17 @@ const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
                                           struct mm_struct *mm,
                                           unsigned long va, unsigned int cpu)
 {
-        int tcpu;
-        int uvhub;
         int locals = 0;
         int remotes = 0;
         int hubs = 0;
+        int tcpu;
+        int tpnode;
         struct bau_desc *bau_desc;
         struct cpumask *flush_mask;
         struct ptc_stats *stat;
         struct bau_control *bcp;
         struct bau_control *tbcp;
+        struct hub_and_pnode *hpp;
 
         /* kernel was booted 'nobau' */
         if (nobau)
@@ -750,11 +751,18 @@ const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
         bau_desc += UV_ITEMS_PER_DESCRIPTOR * bcp->uvhub_cpu;
         bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
 
-        /* cpu statistics */
         for_each_cpu(tcpu, flush_mask) {
-                uvhub = uv_cpu_to_blade_id(tcpu);
-                bau_uvhub_set(uvhub, &bau_desc->distribution);
-                if (uvhub == bcp->uvhub)
+                /*
+                 * The distribution vector is a bit map of pnodes, relative
+                 * to the partition base pnode (and the partition base nasid
+                 * in the header).
+                 * Translate cpu to pnode and hub using an array stored
+                 * in local memory.
+                 */
+                hpp = &bcp->socket_master->target_hub_and_pnode[tcpu];
+                tpnode = hpp->pnode - bcp->partition_base_pnode;
+                bau_uvhub_set(tpnode, &bau_desc->distribution);
+                if (hpp->uvhub == bcp->uvhub)
                         locals++;
                 else
                         remotes++;
@@ -855,7 +863,7 @@ void uv_bau_message_interrupt(struct pt_regs *regs)
  * an interrupt, but causes an error message to be returned to
  * the sender.
  */
-static void uv_enable_timeouts(void)
+static void __init uv_enable_timeouts(void)
 {
         int uvhub;
         int nuvhubs;
@@ -1326,10 +1334,10 @@ static int __init uv_ptc_init(void)
 }
 
 /*
- * initialize the sending side's sending buffers
+ * Initialize the sending side's sending buffers.
  */
 static void
-uv_activation_descriptor_init(int node, int pnode)
+uv_activation_descriptor_init(int node, int pnode, int base_pnode)
 {
         int i;
         int cpu;
@@ -1352,11 +1360,11 @@ uv_activation_descriptor_init(int node, int pnode)
         n = pa >> uv_nshift;
         m = pa & uv_mmask;
 
+        /* the 14-bit pnode */
         uv_write_global_mmr64(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE,
                               (n << UV_DESC_BASE_PNODE_SHIFT | m));
-
         /*
-         * initializing all 8 (UV_ITEMS_PER_DESCRIPTOR) descriptors for each
+         * Initializing all 8 (UV_ITEMS_PER_DESCRIPTOR) descriptors for each
          * cpu even though we only use the first one; one descriptor can
          * describe a broadcast to 256 uv hubs.
          */
@@ -1365,12 +1373,13 @@ uv_activation_descriptor_init(int node, int pnode)
                 memset(bd2, 0, sizeof(struct bau_desc));
                 bd2->header.sw_ack_flag = 1;
                 /*
-                 * base_dest_nodeid is the nasid of the first uvhub
-                 * in the partition. The bit map will indicate uvhub numbers,
-                 * which are 0-N in a partition. Pnodes are unique system-wide.
+                 * The base_dest_nasid set in the message header is the nasid
+                 * of the first uvhub in the partition. The bit map will
+                 * indicate destination pnode numbers relative to that base.
+                 * They may not be consecutive if nasid striding is being used.
                  */
-                bd2->header.base_dest_nodeid = UV_PNODE_TO_NASID(uv_partition_base_pnode);
-                bd2->header.dest_subnodeid = 0x10; /* the LB */
+                bd2->header.base_dest_nasid = UV_PNODE_TO_NASID(base_pnode);
+                bd2->header.dest_subnodeid = UV_LB_SUBNODEID;
                 bd2->header.command = UV_NET_ENDPOINT_INTD;
                 bd2->header.int_both = 1;
                 /*
@@ -1442,7 +1451,7 @@ uv_payload_queue_init(int node, int pnode)
 /*
  * Initialization of each UV hub's structures
  */
-static void __init uv_init_uvhub(int uvhub, int vector)
+static void __init uv_init_uvhub(int uvhub, int vector, int base_pnode)
 {
         int node;
         int pnode;
@@ -1450,11 +1459,11 @@ static void __init uv_init_uvhub(int uvhub, int vector)
 
         node = uvhub_to_first_node(uvhub);
         pnode = uv_blade_to_pnode(uvhub);
-        uv_activation_descriptor_init(node, pnode);
+        uv_activation_descriptor_init(node, pnode, base_pnode);
         uv_payload_queue_init(node, pnode);
         /*
-         * the below initialization can't be in firmware because the
-         * messaging IRQ will be determined by the OS
+         * The below initialization can't be in firmware because the
+         * messaging IRQ will be determined by the OS.
          */
         apicid = uvhub_to_first_apicid(uvhub) | uv_apicid_hibits;
         uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG,
@@ -1491,10 +1500,11 @@ calculate_destination_timeout(void)
 /*
  * initialize the bau_control structure for each cpu
  */
-static int __init uv_init_per_cpu(int nuvhubs)
+static int __init uv_init_per_cpu(int nuvhubs, int base_part_pnode)
 {
         int i;
         int cpu;
+        int tcpu;
         int pnode;
         int uvhub;
         int have_hmaster;
@@ -1528,6 +1538,15 @@ static int __init uv_init_per_cpu(int nuvhubs)
                 bcp = &per_cpu(bau_control, cpu);
                 memset(bcp, 0, sizeof(struct bau_control));
                 pnode = uv_cpu_hub_info(cpu)->pnode;
+                if ((pnode - base_part_pnode) >= UV_DISTRIBUTION_SIZE) {
+                        printk(KERN_EMERG
+                                "cpu %d pnode %d-%d beyond %d; BAU disabled\n",
+                                cpu, pnode, base_part_pnode,
+                                UV_DISTRIBUTION_SIZE);
+                        return 1;
+                }
+                bcp->osnode = cpu_to_node(cpu);
+                bcp->partition_base_pnode = uv_partition_base_pnode;
                 uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
                 *(uvhub_mask + (uvhub/8)) |= (1 << (uvhub%8));
                 bdp = &uvhub_descs[uvhub];
@@ -1536,7 +1555,7 @@ static int __init uv_init_per_cpu(int nuvhubs)
                 bdp->pnode = pnode;
                 /* kludge: 'assuming' one node per socket, and assuming that
                    disabling a socket just leaves a gap in node numbers */
-                socket = (cpu_to_node(cpu) & 1);
+                socket = bcp->osnode & 1;
                 bdp->socket_mask |= (1 << socket);
                 sdp = &bdp->socket[socket];
                 sdp->cpu_number[sdp->num_cpus] = cpu;
@@ -1585,6 +1604,20 @@ static int __init uv_init_per_cpu(int nuvhubs)
 nextsocket:
                         socket++;
                         socket_mask = (socket_mask >> 1);
+                        /* each socket gets a local array of pnodes/hubs */
+                        bcp = smaster;
+                        bcp->target_hub_and_pnode = kmalloc_node(
+                                sizeof(struct hub_and_pnode) *
+                                num_possible_cpus(), GFP_KERNEL, bcp->osnode);
+                        memset(bcp->target_hub_and_pnode, 0,
+                                sizeof(struct hub_and_pnode) *
+                                num_possible_cpus());
+                        for_each_present_cpu(tcpu) {
+                                bcp->target_hub_and_pnode[tcpu].pnode =
+                                        uv_cpu_hub_info(tcpu)->pnode;
+                                bcp->target_hub_and_pnode[tcpu].uvhub =
+                                        uv_cpu_hub_info(tcpu)->numa_blade_id;
+                        }
                 }
         }
         kfree(uvhub_descs);
@@ -1637,21 +1670,22 @@ static int __init uv_bau_init(void)
         spin_lock_init(&disable_lock);
         congested_cycles = microsec_2_cycles(congested_response_us);
 
-        if (uv_init_per_cpu(nuvhubs)) {
-                nobau = 1;
-                return 0;
-        }
-
         uv_partition_base_pnode = 0x7fffffff;
-        for (uvhub = 0; uvhub < nuvhubs; uvhub++)
+        for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
                 if (uv_blade_nr_possible_cpus(uvhub) &&
                         (uv_blade_to_pnode(uvhub) < uv_partition_base_pnode))
                         uv_partition_base_pnode = uv_blade_to_pnode(uvhub);
+        }
+
+        if (uv_init_per_cpu(nuvhubs, uv_partition_base_pnode)) {
+                nobau = 1;
+                return 0;
+        }
 
         vector = UV_BAU_MESSAGE;
         for_each_possible_blade(uvhub)
                 if (uv_blade_nr_possible_cpus(uvhub))
-                        uv_init_uvhub(uvhub, vector);
+                        uv_init_uvhub(uvhub, vector, uv_partition_base_pnode);
 
         uv_enable_timeouts();
         alloc_intr_gate(vector, uv_bau_message_intr1);
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index e3c6a06cf725..dd7b88f2ec7a 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -235,7 +235,7 @@ static void xen_cpuid(unsigned int *ax, unsigned int *bx,
         *dx &= maskedx;
 }
 
-static __init void xen_init_cpuid_mask(void)
+static void __init xen_init_cpuid_mask(void)
 {
         unsigned int ax, bx, cx, dx;
         unsigned int xsave_mask;
@@ -400,7 +400,7 @@ static void xen_load_gdt(const struct desc_ptr *dtr)
 /*
  * load_gdt for early boot, when the gdt is only mapped once
  */
-static __init void xen_load_gdt_boot(const struct desc_ptr *dtr)
+static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
 {
         unsigned long va = dtr->address;
         unsigned int size = dtr->size + 1;
@@ -662,7 +662,7 @@ static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
  * Version of write_gdt_entry for use at early boot-time needed to
  * update an entry as simply as possible.
  */
-static __init void xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
+static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
                                             const void *desc, int type)
 {
         switch (type) {
@@ -933,18 +933,18 @@ static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
         return ret;
 }
 
-static const struct pv_info xen_info __initdata = {
+static const struct pv_info xen_info __initconst = {
         .paravirt_enabled = 1,
         .shared_kernel_pmd = 0,
 
         .name = "Xen",
 };
 
-static const struct pv_init_ops xen_init_ops __initdata = {
+static const struct pv_init_ops xen_init_ops __initconst = {
         .patch = xen_patch,
 };
 
-static const struct pv_cpu_ops xen_cpu_ops __initdata = {
+static const struct pv_cpu_ops xen_cpu_ops __initconst = {
         .cpuid = xen_cpuid,
 
         .set_debugreg = xen_set_debugreg,
@@ -1004,7 +1004,7 @@ static const struct pv_cpu_ops xen_cpu_ops __initdata = {
         .end_context_switch = xen_end_context_switch,
 };
 
-static const struct pv_apic_ops xen_apic_ops __initdata = {
+static const struct pv_apic_ops xen_apic_ops __initconst = {
 #ifdef CONFIG_X86_LOCAL_APIC
         .startup_ipi_hook = paravirt_nop,
 #endif
@@ -1055,7 +1055,7 @@ int xen_panic_handler_init(void)
         return 0;
 }
 
-static const struct machine_ops __initdata xen_machine_ops = {
+static const struct machine_ops xen_machine_ops __initconst = {
         .restart = xen_restart,
         .halt = xen_machine_halt,
         .power_off = xen_machine_halt,
@@ -1332,7 +1332,7 @@ static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self,
         return NOTIFY_OK;
 }
 
-static struct notifier_block __cpuinitdata xen_hvm_cpu_notifier = {
+static struct notifier_block xen_hvm_cpu_notifier __cpuinitdata = {
         .notifier_call  = xen_hvm_cpu_notify,
 };
 
@@ -1381,7 +1381,7 @@ bool xen_hvm_need_lapic(void)
 }
 EXPORT_SYMBOL_GPL(xen_hvm_need_lapic);
 
-const __refconst struct hypervisor_x86 x86_hyper_xen_hvm = {
+const struct hypervisor_x86 x86_hyper_xen_hvm __refconst = {
         .name                   = "Xen HVM",
         .detect                 = xen_hvm_platform,
         .init_platform          = xen_hvm_guest_init,
diff --git a/arch/x86/xen/irq.c b/arch/x86/xen/irq.c
index 6a6fe8939645..8bbb465b6f0a 100644
--- a/arch/x86/xen/irq.c
+++ b/arch/x86/xen/irq.c
@@ -113,7 +113,7 @@ static void xen_halt(void)
                 xen_safe_halt();
 }
 
-static const struct pv_irq_ops xen_irq_ops __initdata = {
+static const struct pv_irq_ops xen_irq_ops __initconst = {
         .save_fl = PV_CALLEE_SAVE(xen_save_fl),
         .restore_fl = PV_CALLEE_SAVE(xen_restore_fl),
         .irq_disable = PV_CALLEE_SAVE(xen_irq_disable),
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 55c965b38c27..02d752460371 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -1054,7 +1054,7 @@ void xen_mm_pin_all(void)
  * that's before we have page structures to store the bits.  So do all
  * the book-keeping now.
  */
-static __init int xen_mark_pinned(struct mm_struct *mm, struct page *page,
+static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
                                   enum pt_level level)
 {
         SetPagePinned(page);
@@ -1187,7 +1187,7 @@ static void drop_other_mm_ref(void *info)
 
         active_mm = percpu_read(cpu_tlbstate.active_mm);
 
-        if (active_mm == mm)
+        if (active_mm == mm && percpu_read(cpu_tlbstate.state) != TLBSTATE_OK)
                 leave_mm(smp_processor_id());
 
         /* If this cpu still has a stale cr3 reference, then make sure
@@ -1271,13 +1271,27 @@ void xen_exit_mmap(struct mm_struct *mm)
         spin_unlock(&mm->page_table_lock);
 }
 
-static __init void xen_pagetable_setup_start(pgd_t *base)
+static void __init xen_pagetable_setup_start(pgd_t *base)
 {
 }
 
+static __init void xen_mapping_pagetable_reserve(u64 start, u64 end)
+{
+        /* reserve the range used */
+        native_pagetable_reserve(start, end);
+
+        /* set as RW the rest */
+        printk(KERN_DEBUG "xen: setting RW the range %llx - %llx\n", end,
+                        PFN_PHYS(pgt_buf_top));
+        while (end < PFN_PHYS(pgt_buf_top)) {
+                make_lowmem_page_readwrite(__va(end));
+                end += PAGE_SIZE;
+        }
+}
+
 static void xen_post_allocator_init(void);
 
-static __init void xen_pagetable_setup_done(pgd_t *base)
+static void __init xen_pagetable_setup_done(pgd_t *base)
 {
         xen_setup_shared_info();
         xen_post_allocator_init();
@@ -1463,119 +1477,6 @@ static int xen_pgd_alloc(struct mm_struct *mm)
         return ret;
 }
 
-#ifdef CONFIG_X86_64
-static __initdata u64 __last_pgt_set_rw = 0;
-static __initdata u64 __pgt_buf_start = 0;
-static __initdata u64 __pgt_buf_end = 0;
-static __initdata u64 __pgt_buf_top = 0;
-/*
- * As a consequence of the commit:
- * 
- * commit 4b239f458c229de044d6905c2b0f9fe16ed9e01e
- * Author: Yinghai Lu <yinghai@kernel.org>
- * Date:   Fri Dec 17 16:58:28 2010 -0800
- * 
- *     x86-64, mm: Put early page table high
- * 
- * at some point init_memory_mapping is going to reach the pagetable pages
- * area and map those pages too (mapping them as normal memory that falls
- * in the range of addresses passed to init_memory_mapping as argument).
- * Some of those pages are already pagetable pages (they are in the range
- * pgt_buf_start-pgt_buf_end) therefore they are going to be mapped RO and
- * everything is fine.
- * Some of these pages are not pagetable pages yet (they fall in the range
- * pgt_buf_end-pgt_buf_top; for example the page at pgt_buf_end) so they
- * are going to be mapped RW.  When these pages become pagetable pages and
- * are hooked into the pagetable, xen will find that the guest has already
- * a RW mapping of them somewhere and fail the operation.
- * The reason Xen requires pagetables to be RO is that the hypervisor needs
- * to verify that the pagetables are valid before using them. The validation
- * operations are called "pinning".
- * 
- * In order to fix the issue we mark all the pages in the entire range
- * pgt_buf_start-pgt_buf_top as RO, however when the pagetable allocation
- * is completed only the range pgt_buf_start-pgt_buf_end is reserved by
- * init_memory_mapping. Hence the kernel is going to crash as soon as one
- * of the pages in the range pgt_buf_end-pgt_buf_top is reused (b/c those
- * ranges are RO).
- * 
- * For this reason, 'mark_rw_past_pgt' is introduced which is called _after_
- * the init_memory_mapping has completed (in a perfect world we would
- * call this function from init_memory_mapping, but lets ignore that).
- * 
- * Because we are called _after_ init_memory_mapping the pgt_buf_[start,
- * end,top] have all changed to new values (b/c init_memory_mapping
- * is called and setting up another new page-table). Hence, the first time
- * we enter this function, we save away the pgt_buf_start value and update
- * the pgt_buf_[end,top].
- * 
- * When we detect that the "old" pgt_buf_start through pgt_buf_end
- * PFNs have been reserved (so memblock_x86_reserve_range has been called),
- * we immediately set out to RW the "old" pgt_buf_end through pgt_buf_top.
- * 
- * And then we update those "old" pgt_buf_[end|top] with the new ones
- * so that we can redo this on the next pagetable.
- */
-static __init void mark_rw_past_pgt(void) {
-
-        if (pgt_buf_end > pgt_buf_start) {
-                u64 addr, size;
-
-                /* Save it away. */
-                if (!__pgt_buf_start) {
-                        __pgt_buf_start = pgt_buf_start;
-                        __pgt_buf_end = pgt_buf_end;
-                        __pgt_buf_top = pgt_buf_top;
-                        return;
-                }
-                /* If we get the range that starts at __pgt_buf_end that means
-                 * the range is reserved, and that in 'init_memory_mapping'
-                 * the 'memblock_x86_reserve_range' has been called with the
-                 * outdated __pgt_buf_start, __pgt_buf_end (the "new"
-                 * pgt_buf_[start|end|top] refer now to a new pagetable.
-                 * Note: we are called _after_ the pgt_buf_[..] have been
-                 * updated.*/
-
-                addr = memblock_x86_find_in_range_size(PFN_PHYS(__pgt_buf_start),
-                                                       &size, PAGE_SIZE);
-
-                /* Still not reserved, meaning 'memblock_x86_reserve_range'
-                 * hasn't been called yet. Update the _end and _top.*/
-                if (addr == PFN_PHYS(__pgt_buf_start)) {
-                        __pgt_buf_end = pgt_buf_end;
-                        __pgt_buf_top = pgt_buf_top;
-                        return;
-                }
-
-                /* OK, the area is reserved, meaning it is time for us to
-                 * set RW for the old end->top PFNs. */
-
-                /* ..unless we had already done this. */
-                if (__pgt_buf_end == __last_pgt_set_rw)
-                        return;
-
-                addr = PFN_PHYS(__pgt_buf_end);
-                
-                /* set as RW the rest */
-                printk(KERN_DEBUG "xen: setting RW the range %llx - %llx\n",
-                        PFN_PHYS(__pgt_buf_end), PFN_PHYS(__pgt_buf_top));
-                
-                while (addr < PFN_PHYS(__pgt_buf_top)) {
-                        make_lowmem_page_readwrite(__va(addr));
-                        addr += PAGE_SIZE;
-                }
-                /* And update everything so that we are ready for the next
-                 * pagetable (the one created for regions past 4GB) */
-                __last_pgt_set_rw = __pgt_buf_end;
-                __pgt_buf_start = pgt_buf_start;
-                __pgt_buf_end = pgt_buf_end;
-                __pgt_buf_top = pgt_buf_top;
-        }
-        return;
-}
-#else
-static __init void mark_rw_past_pgt(void) { }
-#endif
 static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
 {
 #ifdef CONFIG_X86_64
@@ -1587,7 +1488,7 @@ static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
 }
 
 #ifdef CONFIG_X86_32
-static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
+static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
 {
         /* If there's an existing pte, then don't allow _PAGE_RW to be set */
         if (pte_val_ma(*ptep) & _PAGE_PRESENT)
@@ -1597,19 +1498,11 @@ static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
         return pte;
 }
 #else /* CONFIG_X86_64 */
-static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
+static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
 {
         unsigned long pfn = pte_pfn(pte);
 
         /*
-         * A bit of optimization. We do not need to call the workaround
-         * when xen_set_pte_init is called with a PTE with 0 as PFN.
-         * That is b/c the pagetable at that point are just being populated
-         * with empty values and we can save some cycles by not calling
-         * the 'memblock' code.*/
-        if (pfn)
-                mark_rw_past_pgt();
-        /*
          * If the new pfn is within the range of the newly allocated
          * kernel pagetable, and it isn't being mapped into an
          * early_ioremap fixmap slot as a freshly allocated page, make sure
@@ -1626,7 +1519,7 @@ static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
 
 /* Init-time set_pte while constructing initial pagetables, which
    doesn't allow RO pagetable pages to be remapped RW */
-static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
+static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
 {
         pte = mask_rw_pte(ptep, pte);
 
@@ -1644,7 +1537,7 @@ static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
 
 /* Early in boot, while setting up the initial pagetable, assume
    everything is pinned. */
-static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
+static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
 {
 #ifdef CONFIG_FLATMEM
         BUG_ON(mem_map);        /* should only be used early */
@@ -1654,7 +1547,7 @@ static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
 }
 
 /* Used for pmd and pud */
-static __init void xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
+static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
 {
 #ifdef CONFIG_FLATMEM
         BUG_ON(mem_map);        /* should only be used early */
@@ -1664,13 +1557,13 @@ static __init void xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
 
 /* Early release_pte assumes that all pts are pinned, since there's
    only init_mm and anything attached to that is pinned. */
-static __init void xen_release_pte_init(unsigned long pfn)
+static void __init xen_release_pte_init(unsigned long pfn)
 {
         pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
         make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
 }
 
-static __init void xen_release_pmd_init(unsigned long pfn)
+static void __init xen_release_pmd_init(unsigned long pfn)
 {
         make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
 }
@@ -1796,7 +1689,7 @@ static void set_page_prot(void *addr, pgprot_t prot)
                 BUG();
 }
 
-static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
+static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
 {
         unsigned pmdidx, pteidx;
         unsigned ident_pte;
@@ -1879,7 +1772,7 @@ static void convert_pfn_mfn(void *v)
  * of the physical mapping once some sort of allocator has been set
  * up.
  */
-__init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
+pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd,
                                          unsigned long max_pfn)
 {
         pud_t *l3;
@@ -1950,7 +1843,7 @@ __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
 static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD);
 static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD);
 
-static __init void xen_write_cr3_init(unsigned long cr3)
+static void __init xen_write_cr3_init(unsigned long cr3)
 {
         unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
 
@@ -1987,7 +1880,7 @@ static __init void xen_write_cr3_init(unsigned long cr3)
         pv_mmu_ops.write_cr3 = &xen_write_cr3;
 }
 
-__init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
+pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd,
                                          unsigned long max_pfn)
 {
         pmd_t *kernel_pmd;
@@ -2093,7 +1986,7 @@ static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
 #endif
 }
 
-__init void xen_ident_map_ISA(void)
+void __init xen_ident_map_ISA(void)
 {
         unsigned long pa;
 
@@ -2116,10 +2009,8 @@ __init void xen_ident_map_ISA(void)
         xen_flush_tlb();
 }
 
-static __init void xen_post_allocator_init(void)
+static void __init xen_post_allocator_init(void)
 {
-        mark_rw_past_pgt();
-
 #ifdef CONFIG_XEN_DEBUG
         pv_mmu_ops.make_pte = PV_CALLEE_SAVE(xen_make_pte_debug);
 #endif
@@ -2155,7 +2046,7 @@ static void xen_leave_lazy_mmu(void)
         preempt_enable();
 }
 
-static const struct pv_mmu_ops xen_mmu_ops __initdata = {
+static const struct pv_mmu_ops xen_mmu_ops __initconst = {
         .read_cr2 = xen_read_cr2,
         .write_cr2 = xen_write_cr2,
 
@@ -2228,6 +2119,7 @@ static const struct pv_mmu_ops xen_mmu_ops __initdata = {
 
 void __init xen_init_mmu_ops(void)
 {
+        x86_init.mapping.pagetable_reserve = xen_mapping_pagetable_reserve;
         x86_init.paging.pagetable_setup_start = xen_pagetable_setup_start;
         x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done;
         pv_mmu_ops = xen_mmu_ops;
diff --git a/arch/x86/xen/p2m.c b/arch/x86/xen/p2m.c
index 141eb0de8b06..58efeb9d5440 100644
--- a/arch/x86/xen/p2m.c
+++ b/arch/x86/xen/p2m.c
@@ -522,11 +522,20 @@ static bool __init __early_alloc_p2m(unsigned long pfn)
         /* Boundary cross-over for the edges: */
         if (idx) {
                 unsigned long *p2m = extend_brk(PAGE_SIZE, PAGE_SIZE);
+                unsigned long *mid_mfn_p;
 
                 p2m_init(p2m);
 
                 p2m_top[topidx][mididx] = p2m;
 
+                /* For save/restore we need to MFN of the P2M saved */
+                
+                mid_mfn_p = p2m_top_mfn_p[topidx];
+                WARN(mid_mfn_p[mididx] != virt_to_mfn(p2m_missing),
+                        "P2M_TOP_P[%d][%d] != MFN of p2m_missing!\n",
+                        topidx, mididx);
+                mid_mfn_p[mididx] = virt_to_mfn(p2m);
+
         }
         return idx != 0;
 }
@@ -549,12 +558,29 @@ unsigned long __init set_phys_range_identity(unsigned long pfn_s,
                 pfn += P2M_MID_PER_PAGE * P2M_PER_PAGE)
         {
                 unsigned topidx = p2m_top_index(pfn);
-                if (p2m_top[topidx] == p2m_mid_missing) {
-                        unsigned long **mid = extend_brk(PAGE_SIZE, PAGE_SIZE);
+                unsigned long *mid_mfn_p;
+                unsigned long **mid;
+
+                mid = p2m_top[topidx];
+                mid_mfn_p = p2m_top_mfn_p[topidx];
+                if (mid == p2m_mid_missing) {
+                        mid = extend_brk(PAGE_SIZE, PAGE_SIZE);
 
                         p2m_mid_init(mid);
 
                         p2m_top[topidx] = mid;
+
+                        BUG_ON(mid_mfn_p != p2m_mid_missing_mfn);
+                }
+                /* And the save/restore P2M tables.. */
+                if (mid_mfn_p == p2m_mid_missing_mfn) {
+                        mid_mfn_p = extend_brk(PAGE_SIZE, PAGE_SIZE);
+                        p2m_mid_mfn_init(mid_mfn_p);
+
+                        p2m_top_mfn_p[topidx] = mid_mfn_p;
+                        p2m_top_mfn[topidx] = virt_to_mfn(mid_mfn_p);
+                        /* Note: we don't set mid_mfn_p[midix] here,
+                         * look in __early_alloc_p2m */
                 }
         }
 
@@ -650,7 +676,7 @@ static unsigned long mfn_hash(unsigned long mfn)
 }
 
 /* Add an MFN override for a particular page */
-int m2p_add_override(unsigned long mfn, struct page *page)
+int m2p_add_override(unsigned long mfn, struct page *page, bool clear_pte)
 {
         unsigned long flags;
         unsigned long pfn;
@@ -662,7 +688,6 @@ int m2p_add_override(unsigned long mfn, struct page *page)
         if (!PageHighMem(page)) {
                 address = (unsigned long)__va(pfn << PAGE_SHIFT);
                 ptep = lookup_address(address, &level);
-
                 if (WARN(ptep == NULL || level != PG_LEVEL_4K,
                                         "m2p_add_override: pfn %lx not mapped", pfn))
                         return -EINVAL;
@@ -674,18 +699,17 @@ int m2p_add_override(unsigned long mfn, struct page *page)
         if (unlikely(!set_phys_to_machine(pfn, FOREIGN_FRAME(mfn))))
                 return -ENOMEM;
 
-        if (!PageHighMem(page))
+        if (clear_pte && !PageHighMem(page))
                 /* Just zap old mapping for now */
                 pte_clear(&init_mm, address, ptep);
-
         spin_lock_irqsave(&m2p_override_lock, flags);
         list_add(&page->lru,  &m2p_overrides[mfn_hash(mfn)]);
         spin_unlock_irqrestore(&m2p_override_lock, flags);
 
         return 0;
 }
-
-int m2p_remove_override(struct page *page)
+EXPORT_SYMBOL_GPL(m2p_add_override);
+int m2p_remove_override(struct page *page, bool clear_pte)
 {
         unsigned long flags;
         unsigned long mfn;
@@ -713,7 +737,7 @@ int m2p_remove_override(struct page *page)
         spin_unlock_irqrestore(&m2p_override_lock, flags);
         set_phys_to_machine(pfn, page->index);
 
-        if (!PageHighMem(page))
+        if (clear_pte && !PageHighMem(page))
                 set_pte_at(&init_mm, address, ptep,
                                 pfn_pte(pfn, PAGE_KERNEL));
                 /* No tlb flush necessary because the caller already
@@ -721,6 +745,7 @@ int m2p_remove_override(struct page *page)
 
         return 0;
 }
+EXPORT_SYMBOL_GPL(m2p_remove_override);
 
 struct page *m2p_find_override(unsigned long mfn)
 {
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
index 90bac0aac3a5..be1a464f6d66 100644
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@ -50,7 +50,7 @@ phys_addr_t xen_extra_mem_start, xen_extra_mem_size;
  */
 #define EXTRA_MEM_RATIO         (10)
 
-static __init void xen_add_extra_mem(unsigned long pages)
+static void __init xen_add_extra_mem(unsigned long pages)
 {
         unsigned long pfn;
 
@@ -166,7 +166,7 @@ static unsigned long __init xen_set_identity(const struct e820entry *list,
                 if (last > end)
                         continue;
 
-                if (entry->type == E820_RAM) {
+                if ((entry->type == E820_RAM) || (entry->type == E820_UNUSABLE)) {
                         if (start > start_pci)
                                 identity += set_phys_range_identity(
                                                 PFN_UP(start_pci), PFN_DOWN(start));
@@ -227,7 +227,11 @@ char * __init xen_memory_setup(void)
 
         memcpy(map_raw, map, sizeof(map));
         e820.nr_map = 0;
+#ifdef CONFIG_X86_32
+        xen_extra_mem_start = mem_end;
+#else
         xen_extra_mem_start = max((1ULL << 32), mem_end);
+#endif
         for (i = 0; i < memmap.nr_entries; i++) {
                 unsigned long long end;
 
@@ -336,7 +340,7 @@ static void __init fiddle_vdso(void)
 #endif
 }
 
-static __cpuinit int register_callback(unsigned type, const void *func)
+static int __cpuinit register_callback(unsigned type, const void *func)
 {
         struct callback_register callback = {
                 .type = type,
diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
index 762b46ab14d5..41038c01de40 100644
--- a/arch/x86/xen/smp.c
+++ b/arch/x86/xen/smp.c
@@ -56,7 +56,7 @@ static irqreturn_t xen_reschedule_interrupt(int irq, void *dev_id)
         return IRQ_HANDLED;
 }
 
-static __cpuinit void cpu_bringup(void)
+static void __cpuinit cpu_bringup(void)
 {
         int cpu = smp_processor_id();
 
@@ -84,7 +84,7 @@ static __cpuinit void cpu_bringup(void)
         wmb();                  /* make sure everything is out */
 }
 
-static __cpuinit void cpu_bringup_and_idle(void)
+static void __cpuinit cpu_bringup_and_idle(void)
 {
         cpu_bringup();
         cpu_idle();
@@ -241,7 +241,7 @@ static void __init xen_smp_prepare_cpus(unsigned int max_cpus)
         }
 }
 
-static __cpuinit int
+static int __cpuinit
 cpu_initialize_context(unsigned int cpu, struct task_struct *idle)
 {
         struct vcpu_guest_context *ctxt;
@@ -485,7 +485,7 @@ static irqreturn_t xen_call_function_single_interrupt(int irq, void *dev_id)
         return IRQ_HANDLED;
 }
 
-static const struct smp_ops xen_smp_ops __initdata = {
+static const struct smp_ops xen_smp_ops __initconst = {
         .smp_prepare_boot_cpu = xen_smp_prepare_boot_cpu,
         .smp_prepare_cpus = xen_smp_prepare_cpus,
         .smp_cpus_done = xen_smp_cpus_done,
diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c
index 2e2d370a47b1..bd4ffd7d9589 100644
--- a/arch/x86/xen/time.c
+++ b/arch/x86/xen/time.c
@@ -439,11 +439,11 @@ void xen_timer_resume(void)
         }
 }
 
-static const struct pv_time_ops xen_time_ops __initdata = {
+static const struct pv_time_ops xen_time_ops __initconst = {
         .sched_clock = xen_clocksource_read,
 };
 
-static __init void xen_time_init(void)
+static void __init xen_time_init(void)
 {
         int cpu = smp_processor_id();
         struct timespec tp;
@@ -468,7 +468,7 @@ static __init void xen_time_init(void)
         xen_setup_cpu_clockevents();
 }
 
-__init void xen_init_time_ops(void)
+void __init xen_init_time_ops(void)
 {
         pv_time_ops = xen_time_ops;
 
@@ -490,7 +490,7 @@ static void xen_hvm_setup_cpu_clockevents(void)
         xen_setup_cpu_clockevents();
 }
 
-__init void xen_hvm_init_time_ops(void)
+void __init xen_hvm_init_time_ops(void)
 {
         /* vector callback is needed otherwise we cannot receive interrupts
          * on cpu > 0 and at this point we don't know how many cpus are
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index 3112f55638c4..97dfdc8757b3 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -74,7 +74,7 @@ static inline void xen_hvm_smp_init(void) {}
 
 #ifdef CONFIG_PARAVIRT_SPINLOCKS
 void __init xen_init_spinlocks(void);
-__cpuinit void xen_init_lock_cpu(int cpu);
+void __cpuinit xen_init_lock_cpu(int cpu);
 void xen_uninit_lock_cpu(int cpu);
 #else
 static inline void xen_init_spinlocks(void)