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-rw-r--r--arch/sh/boards/se/7206/irq.c16
-rw-r--r--arch/sh/kernel/cpu/sh2/setup-sh7619.c41
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7206.c62
3 files changed, 111 insertions, 8 deletions
diff --git a/arch/sh/boards/se/7206/irq.c b/arch/sh/boards/se/7206/irq.c
index 3fb0c5f5b23a..27da88486f73 100644
--- a/arch/sh/boards/se/7206/irq.c
+++ b/arch/sh/boards/se/7206/irq.c
@@ -10,6 +10,7 @@
10#include <linux/irq.h> 10#include <linux/irq.h>
11#include <linux/io.h> 11#include <linux/io.h>
12#include <linux/irq.h> 12#include <linux/irq.h>
13#include <linux/interrupt.h>
13#include <asm/se7206.h> 14#include <asm/se7206.h>
14 15
15#define INTSTS0 0x31800000 16#define INTSTS0 0x31800000
@@ -18,6 +19,13 @@
18#define INTMSK1 0x31800006 19#define INTMSK1 0x31800006
19#define INTSEL 0x31800008 20#define INTSEL 0x31800008
20 21
22#define IRQ0_IRQ 64
23#define IRQ1_IRQ 65
24#define IRQ3_IRQ 67
25
26#define INTC_IPR01 0xfffe0818
27#define INTC_ICR1 0xfffe0802
28
21static void disable_se7206_irq(unsigned int irq) 29static void disable_se7206_irq(unsigned int irq)
22{ 30{
23 unsigned short val; 31 unsigned short val;
@@ -39,7 +47,7 @@ static void disable_se7206_irq(unsigned int irq)
39 case IRQ1_IRQ: 47 case IRQ1_IRQ:
40 msk0 |= 0x000f; 48 msk0 |= 0x000f;
41 break; 49 break;
42 case IRQ2_IRQ: 50 case IRQ3_IRQ:
43 msk0 |= 0x0f00; 51 msk0 |= 0x0f00;
44 msk1 |= 0x00ff; 52 msk1 |= 0x00ff;
45 break; 53 break;
@@ -70,7 +78,7 @@ static void enable_se7206_irq(unsigned int irq)
70 case IRQ1_IRQ: 78 case IRQ1_IRQ:
71 msk0 &= ~0x000f; 79 msk0 &= ~0x000f;
72 break; 80 break;
73 case IRQ2_IRQ: 81 case IRQ3_IRQ:
74 msk0 &= ~0x0f00; 82 msk0 &= ~0x0f00;
75 msk1 &= ~0x00ff; 83 msk1 &= ~0x00ff;
76 break; 84 break;
@@ -96,7 +104,7 @@ static void eoi_se7206_irq(unsigned int irq)
96 case IRQ1_IRQ: 104 case IRQ1_IRQ:
97 sts0 &= ~0x000f; 105 sts0 &= ~0x000f;
98 break; 106 break;
99 case IRQ2_IRQ: 107 case IRQ3_IRQ:
100 sts0 &= ~0x0f00; 108 sts0 &= ~0x0f00;
101 sts1 &= ~0x00ff; 109 sts1 &= ~0x00ff;
102 break; 110 break;
@@ -106,7 +114,7 @@ static void eoi_se7206_irq(unsigned int irq)
106} 114}
107 115
108static struct irq_chip se7206_irq_chip __read_mostly = { 116static struct irq_chip se7206_irq_chip __read_mostly = {
109 .name = "SE7206-FPGA-IRQ", 117 .name = "SE7206-FPGA",
110 .mask = disable_se7206_irq, 118 .mask = disable_se7206_irq,
111 .unmask = enable_se7206_irq, 119 .unmask = enable_se7206_irq,
112 .mask_ack = disable_se7206_irq, 120 .mask_ack = disable_se7206_irq,
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index 82c2d905152f..79283e6c1d8f 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -51,3 +51,44 @@ static int __init sh7619_devices_setup(void)
51 ARRAY_SIZE(sh7619_devices)); 51 ARRAY_SIZE(sh7619_devices));
52} 52}
53__initcall(sh7619_devices_setup); 53__initcall(sh7619_devices_setup);
54
55#define INTC_IPRC 0xf8080000UL
56#define INTC_IPRD 0xf8080002UL
57
58#define CMI0_IRQ 86
59
60#define SCIF0_ERI_IRQ 88
61#define SCIF0_RXI_IRQ 89
62#define SCIF0_BRI_IRQ 90
63#define SCIF0_TXI_IRQ 91
64
65#define SCIF1_ERI_IRQ 92
66#define SCIF1_RXI_IRQ 93
67#define SCIF1_BRI_IRQ 94
68#define SCIF1_TXI_IRQ 95
69
70#define SCIF2_BRI_IRQ 96
71#define SCIF2_ERI_IRQ 97
72#define SCIF2_RXI_IRQ 98
73#define SCIF2_TXI_IRQ 99
74
75static struct ipr_data sh7619_ipr_map[] = {
76 { CMI0_IRQ, INTC_IPRC, 1, 2 },
77 { SCIF0_ERI_IRQ, INTC_IPRD, 3, 3 },
78 { SCIF0_RXI_IRQ, INTC_IPRD, 3, 3 },
79 { SCIF0_BRI_IRQ, INTC_IPRD, 3, 3 },
80 { SCIF0_TXI_IRQ, INTC_IPRD, 3, 3 },
81 { SCIF1_ERI_IRQ, INTC_IPRD, 2, 3 },
82 { SCIF1_RXI_IRQ, INTC_IPRD, 2, 3 },
83 { SCIF1_BRI_IRQ, INTC_IPRD, 2, 3 },
84 { SCIF1_TXI_IRQ, INTC_IPRD, 2, 3 },
85 { SCIF2_ERI_IRQ, INTC_IPRD, 1, 3 },
86 { SCIF2_RXI_IRQ, INTC_IPRD, 1, 3 },
87 { SCIF2_BRI_IRQ, INTC_IPRD, 1, 3 },
88 { SCIF2_TXI_IRQ, INTC_IPRD, 1, 3 },
89};
90
91void __init init_IRQ_ipr(void)
92{
93 make_ipr_irq(sh7619_ipr_map, ARRAY_SIZE(sh7619_ipr_map));
94}
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index cdfeef49e62e..4b60fcc7d667 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -17,22 +17,22 @@ static struct plat_sci_port sci_platform_data[] = {
17 .mapbase = 0xfffe8000, 17 .mapbase = 0xfffe8000,
18 .flags = UPF_BOOT_AUTOCONF, 18 .flags = UPF_BOOT_AUTOCONF,
19 .type = PORT_SCIF, 19 .type = PORT_SCIF,
20 .irqs = { 240, 241, 242, 243}, 20 .irqs = { 241, 242, 243, 240},
21 }, { 21 }, {
22 .mapbase = 0xfffe8800, 22 .mapbase = 0xfffe8800,
23 .flags = UPF_BOOT_AUTOCONF, 23 .flags = UPF_BOOT_AUTOCONF,
24 .type = PORT_SCIF, 24 .type = PORT_SCIF,
25 .irqs = { 244, 245, 246, 247}, 25 .irqs = { 247, 244, 245, 246},
26 }, { 26 }, {
27 .mapbase = 0xfffe9000, 27 .mapbase = 0xfffe9000,
28 .flags = UPF_BOOT_AUTOCONF, 28 .flags = UPF_BOOT_AUTOCONF,
29 .type = PORT_SCIF, 29 .type = PORT_SCIF,
30 .irqs = { 248, 249, 250, 251}, 30 .irqs = { 249, 250, 251, 248},
31 }, { 31 }, {
32 .mapbase = 0xfffe9800, 32 .mapbase = 0xfffe9800,
33 .flags = UPF_BOOT_AUTOCONF, 33 .flags = UPF_BOOT_AUTOCONF,
34 .type = PORT_SCIF, 34 .type = PORT_SCIF,
35 .irqs = { 252, 253, 254, 255}, 35 .irqs = { 253, 254, 255, 252},
36 }, { 36 }, {
37 .flags = 0, 37 .flags = 0,
38 } 38 }
@@ -56,3 +56,57 @@ static int __init sh7206_devices_setup(void)
56 ARRAY_SIZE(sh7206_devices)); 56 ARRAY_SIZE(sh7206_devices));
57} 57}
58__initcall(sh7206_devices_setup); 58__initcall(sh7206_devices_setup);
59
60#define INTC_IPR08 0xfffe0c04UL
61#define INTC_IPR09 0xfffe0c06UL
62#define INTC_IPR14 0xfffe0c10UL
63
64#define CMI0_IRQ 140
65
66#define MTU1_TGI1A 164
67
68#define SCIF0_BRI_IRQ 240
69#define SCIF0_ERI_IRQ 241
70#define SCIF0_RXI_IRQ 242
71#define SCIF0_TXI_IRQ 243
72
73#define SCIF1_BRI_IRQ 244
74#define SCIF1_ERI_IRQ 245
75#define SCIF1_RXI_IRQ 246
76#define SCIF1_TXI_IRQ 247
77
78#define SCIF2_BRI_IRQ 248
79#define SCIF2_ERI_IRQ 249
80#define SCIF2_RXI_IRQ 250
81#define SCIF2_TXI_IRQ 251
82
83#define SCIF3_BRI_IRQ 252
84#define SCIF3_ERI_IRQ 253
85#define SCIF3_RXI_IRQ 254
86#define SCIF3_TXI_IRQ 255
87
88static struct ipr_data sh7206_ipr_map[] = {
89 { CMI0_IRQ, INTC_IPR08, 3, 2 },
90 { MTU2_TGI1A, INTC_IPR09, 1, 2 },
91 { SCIF0_ERI_IRQ, INTC_IPR14, 3, 3 },
92 { SCIF0_RXI_IRQ, INTC_IPR14, 3, 3 },
93 { SCIF0_BRI_IRQ, INTC_IPR14, 3, 3 },
94 { SCIF0_TXI_IRQ, INTC_IPR14, 3, 3 },
95 { SCIF1_ERI_IRQ, INTC_IPR14, 2, 3 },
96 { SCIF1_RXI_IRQ, INTC_IPR14, 2, 3 },
97 { SCIF1_BRI_IRQ, INTC_IPR14, 2, 3 },
98 { SCIF1_TXI_IRQ, INTC_IPR14, 2, 3 },
99 { SCIF2_ERI_IRQ, INTC_IPR14, 1, 3 },
100 { SCIF2_RXI_IRQ, INTC_IPR14, 1, 3 },
101 { SCIF2_BRI_IRQ, INTC_IPR14, 1, 3 },
102 { SCIF2_TXI_IRQ, INTC_IPR14, 1, 3 },
103 { SCIF3_ERI_IRQ, INTC_IPR14, 0, 3 },
104 { SCIF3_RXI_IRQ, INTC_IPR14, 0, 3 },
105 { SCIF3_BRI_IRQ, INTC_IPR14, 0, 3 },
106 { SCIF3_TXI_IRQ, INTC_IPR14, 0, 3 },
107};
108
109void __init init_IRQ_ipr(void)
110{
111 make_ipr_irq(sh7206_ipr_map, ARRAY_SIZE(sh7206_ipr_map));
112}