701 files changed, 9592 insertions, 12791 deletions
diff --git a/arch/alpha/include/asm/pci.h b/arch/alpha/include/asm/pci.h
index d01afb78919c..f7f680f7457d 100644
--- a/arch/alpha/include/asm/pci.h
+++ b/arch/alpha/include/asm/pci.h
@@ -59,11 +59,6 @@ struct pci_controller {
 extern void pcibios_set_master(struct pci_dev *dev);
-extern inline void pcibios_penalize_isa_irq(int irq, int active)
-{
-        /* We don't do dynamic PCI IRQ allocation */
-}
 /* IOMMU controls.  */
 /* The PCI address space does not equal the physical memory address space.
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 2bb6bcee025c..201f5e105484 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -314,6 +314,7 @@ config ARCH_MULTIPLATFORM
        select CLKSRC_OF
        select COMMON_CLK
        select GENERIC_CLOCKEVENTS
+        select MIGHT_HAVE_PCI
        select MULTI_IRQ_HANDLER
        select SPARSE_IRQ
        select USE_OF
@@ -754,7 +755,7 @@ config ARCH_S3C64XX
        select ATAGS
        select CLKDEV_LOOKUP
        select CLKSRC_SAMSUNG_PWM
-        select COMMON_CLK
+        select COMMON_CLK_SAMSUNG
        select CPU_V6K
        select GENERIC_CLOCKEVENTS
        select GPIO_SAMSUNG
@@ -828,26 +829,6 @@ config ARCH_S5PV210
        help
          Samsung S5PV210/S5PC110 series based systems
-config ARCH_EXYNOS
-        bool "Samsung EXYNOS"
-        select ARCH_HAS_CPUFREQ
-        select ARCH_HAS_HOLES_MEMORYMODEL
-        select ARCH_REQUIRE_GPIOLIB
-        select ARCH_SPARSEMEM_ENABLE
-        select ARM_GIC
-        select COMMON_CLK
-        select CPU_V7
-        select GENERIC_CLOCKEVENTS
-        select HAVE_S3C2410_I2C if I2C
-        select HAVE_S3C2410_WATCHDOG if WATCHDOG
-        select HAVE_S3C_RTC if RTC_CLASS
-        select NEED_MACH_MEMORY_H
-        select SPARSE_IRQ
-        select SRAM
-        select USE_OF
-        help
-          Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 config ARCH_DAVINCI
        bool "TI DaVinci"
        select ARCH_HAS_HOLES_MEMORYMODEL
@@ -951,6 +932,8 @@ source "arch/arm/mach-mvebu/Kconfig"
 source "arch/arm/mach-at91/Kconfig"
+source "arch/arm/mach-axxia/Kconfig"
 source "arch/arm/mach-bcm/Kconfig"
 source "arch/arm/mach-berlin/Kconfig"
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index eab8ecbe69c1..8f90595069a1 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -317,6 +317,13 @@ choice
                  Say Y here if you want kernel low-level debugging support
                  on i.MX6SL.
+        config DEBUG_IMX6SX_UART
+                bool "i.MX6SX Debug UART"
+                depends on SOC_IMX6SX
+                help
+                  Say Y here if you want kernel low-level debugging support
+                  on i.MX6SX.
        config DEBUG_KEYSTONE_UART0
                bool "Kernel low-level debugging on KEYSTONE2 using UART0"
                depends on ARCH_KEYSTONE
@@ -349,56 +356,40 @@ choice
                  Say Y here if you want kernel low-level debugging support
                  on MMP UART3.
-        config DEBUG_MSM_UART1
+        config DEBUG_MSM_UART
-                bool "Kernel low-level debugging messages via MSM UART1"
+                bool "Kernel low-level debugging messages via MSM UART"
-                depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+                depends on ARCH_MSM
-                select DEBUG_MSM_UART
                help
                  Say Y here if you want the debug print routines to direct
-                  their output to the first serial port on MSM devices.
+                  their output to the serial port on MSM devices.
-        config DEBUG_MSM_UART2
+                  ARCH                DEBUG_UART_PHYS   DEBUG_UART_BASE   #
-                bool "Kernel low-level debugging messages via MSM UART2"
+                  MSM7X00A, QSD8X50   0xa9a00000        0xe1000000        UART1
-                depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+                  MSM7X00A, QSD8X50   0xa9b00000        0xe1000000        UART2
-                select DEBUG_MSM_UART
+                  MSM7X00A, QSD8X50   0xa9c00000        0xe1000000        UART3
-                help
-                  Say Y here if you want the debug print routines to direct
-                  their output to the second serial port on MSM devices.
-        config DEBUG_MSM_UART3
+                  MSM7X30             0xaca00000        0xe1000000        UART1
-                bool "Kernel low-level debugging messages via MSM UART3"
+                  MSM7X30             0xacb00000        0xe1000000        UART2
-                depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+                  MSM7X30             0xacc00000        0xe1000000        UART3
-                select DEBUG_MSM_UART
-                help
-                  Say Y here if you want the debug print routines to direct
-                  their output to the third serial port on MSM devices.
-        config DEBUG_MSM8660_UART
+                  Please adjust DEBUG_UART_PHYS and DEBUG_UART_BASE configuration
-                bool "Kernel low-level debugging messages via MSM 8660 UART"
+                  options based on your needs.
-                depends on ARCH_MSM8X60
-                select MSM_HAS_DEBUG_UART_HS
-                select DEBUG_MSM_UART
-                help
-                  Say Y here if you want the debug print routines to direct
-                  their output to the serial port on MSM 8660 devices.
-        config DEBUG_MSM8960_UART
+        config DEBUG_QCOM_UARTDM
-                bool "Kernel low-level debugging messages via MSM 8960 UART"
+                bool "Kernel low-level debugging messages via QCOM UARTDM"
-                depends on ARCH_MSM8960
+                depends on ARCH_QCOM
-                select MSM_HAS_DEBUG_UART_HS
-                select DEBUG_MSM_UART
                help
                  Say Y here if you want the debug print routines to direct
-                  their output to the serial port on MSM 8960 devices.
+                  their output to the serial port on Qualcomm devices.
-        config DEBUG_MSM8974_UART
+                  ARCH      DEBUG_UART_PHYS   DEBUG_UART_BASE
-                bool "Kernel low-level debugging messages via MSM 8974 UART"
+                  APQ8084   0xf995e000        0xfa75e000
-                depends on ARCH_MSM8974
+                  MSM8X60   0x19c40000        0xf0040000
-                select MSM_HAS_DEBUG_UART_HS
+                  MSM8960   0x16440000        0xf0040000
-                select DEBUG_MSM_UART
+                  MSM8974   0xf991e000        0xfa71e000
-                help
-                  Say Y here if you want the debug print routines to direct
+                  Please adjust DEBUG_UART_PHYS and DEBUG_UART_BASE configuration
-                  their output to the serial port on MSM 8974 devices.
+                  options based on your needs.
        config DEBUG_MVEBU_UART
                bool "Kernel low-level debugging messages via MVEBU UART (old bootloaders)"
@@ -625,6 +616,7 @@ choice
        config DEBUG_S3C_UART0
                depends on PLAT_SAMSUNG
                select DEBUG_EXYNOS_UART if ARCH_EXYNOS
+                select DEBUG_S3C24XX_UART if ARCH_S3C24XX
                bool "Use S3C UART 0 for low-level debug"
                help
                  Say Y here if you want the debug print routines to direct
@@ -637,6 +629,7 @@ choice
        config DEBUG_S3C_UART1
                depends on PLAT_SAMSUNG
                select DEBUG_EXYNOS_UART if ARCH_EXYNOS
+                select DEBUG_S3C24XX_UART if ARCH_S3C24XX
                bool "Use S3C UART 1 for low-level debug"
                help
                  Say Y here if you want the debug print routines to direct
@@ -649,6 +642,7 @@ choice
        config DEBUG_S3C_UART2
                depends on PLAT_SAMSUNG
                select DEBUG_EXYNOS_UART if ARCH_EXYNOS
+                select DEBUG_S3C24XX_UART if ARCH_S3C24XX
                bool "Use S3C UART 2 for low-level debug"
                help
                  Say Y here if you want the debug print routines to direct
@@ -670,6 +664,33 @@ choice
                  The uncompressor code port configuration is now handled
                  by CONFIG_S3C_LOWLEVEL_UART_PORT.
+        config DEBUG_S3C2410_UART0
+                depends on ARCH_S3C24XX
+                select DEBUG_S3C2410_UART
+                bool "Use S3C2410/S3C2412 UART 0 for low-level debug"
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to UART 0. The port must have been initialised
+                  by the boot-loader before use.
+        config DEBUG_S3C2410_UART1
+                depends on ARCH_S3C24XX
+                select DEBUG_S3C2410_UART
+                bool "Use S3C2410/S3C2412 UART 1 for low-level debug"
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to UART 1. The port must have been initialised
+                  by the boot-loader before use.
+        config DEBUG_S3C2410_UART2
+                depends on ARCH_S3C24XX
+                select DEBUG_S3C2410_UART
+                bool "Use S3C2410/S3C2412 UART 2 for low-level debug"
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to UART 2. The port must have been initialised
+                  by the boot-loader before use.
        config DEBUG_SOCFPGA_UART
                depends on ARCH_SOCFPGA
                bool "Use SOCFPGA UART for low-level debug"
@@ -921,6 +942,13 @@ endchoice
 config DEBUG_EXYNOS_UART
        bool
+config DEBUG_S3C2410_UART
+        bool
+        select DEBUG_S3C24XX_UART
+config DEBUG_S3C24XX_UART
+        bool
 config DEBUG_OMAP2PLUS_UART
        bool
        depends on ARCH_OMAP2PLUS
@@ -935,13 +963,23 @@ config DEBUG_IMX_UART_PORT
                                                DEBUG_IMX51_UART || \
                                                DEBUG_IMX53_UART || \
                                                DEBUG_IMX6Q_UART || \
-                                                DEBUG_IMX6SL_UART
+                                                DEBUG_IMX6SL_UART || \
+                                                DEBUG_IMX6SX_UART
        default 1
        depends on ARCH_MXC
        help
          Choose UART port on which kernel low-level debug messages
          should be output.
+config DEBUG_VF_UART_PORT
+        int "Vybrid Debug UART Port Selection" if DEBUG_VF_UART
+        default 1
+        range 0 3
+        depends on SOC_VF610
+        help
+          Choose UART port on which kernel low-level debug messages
+          should be output.
 config DEBUG_TEGRA_UART
        bool
        depends on ARCH_TEGRA
@@ -950,10 +988,6 @@ config DEBUG_STI_UART
        bool
        depends on ARCH_STI
-config DEBUG_MSM_UART
-        bool
-        depends on ARCH_MSM || ARCH_QCOM
 config DEBUG_LL_INCLUDE
        string
        default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250
@@ -970,9 +1004,11 @@ config DEBUG_LL_INCLUDE
                                 DEBUG_IMX51_UART || \
                                 DEBUG_IMX53_UART ||\
                                 DEBUG_IMX6Q_UART || \
-                                 DEBUG_IMX6SL_UART
+                                 DEBUG_IMX6SL_UART || \
-        default "debug/msm.S" if DEBUG_MSM_UART
+                                 DEBUG_IMX6SX_UART
+        default "debug/msm.S" if DEBUG_MSM_UART || DEBUG_QCOM_UARTDM
        default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART
+        default "debug/s3c24xx.S" if DEBUG_S3C24XX_UART
        default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1
        default "debug/sti.S" if DEBUG_STI_UART
        default "debug/tegra.S" if DEBUG_TEGRA_UART
@@ -1029,12 +1065,19 @@ config DEBUG_UART_PHYS
        default 0x40090000 if ARCH_LPC32XX
        default 0x40100000 if DEBUG_PXA_UART1
        default 0x42000000 if ARCH_GEMINI
+        default 0x50000000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART0 || \
+                                DEBUG_S3C2410_UART0)
+        default 0x50004000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART1 || \
+                                DEBUG_S3C2410_UART1)
+        default 0x50008000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART2 || \
+                                DEBUG_S3C2410_UART2)
        default 0x7c0003f8 if FOOTBRIDGE
        default 0x80070000 if DEBUG_IMX23_UART
        default 0x80074000 if DEBUG_IMX28_UART
        default 0x80230000 if DEBUG_PICOXCELL_UART
        default 0x808c0000 if ARCH_EP93XX
        default 0x90020000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART
+        default 0xa9a00000 if DEBUG_MSM_UART
        default 0xb0090000 if DEBUG_VEXPRESS_UART0_CRX
        default 0xc0013000 if DEBUG_U300_UART
        default 0xc8000000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN
@@ -1050,6 +1093,7 @@ config DEBUG_UART_PHYS
                                ARCH_ORION5X
        default 0xf7fc9000 if DEBUG_BERLIN_UART
        default 0xf8b00000 if DEBUG_HI3716_UART
+        default 0xf991e000 if DEBUG_QCOM_UARTDM
        default 0xfcb00000 if DEBUG_HI3620_UART
        default 0xfe800000 if ARCH_IOP32X
        default 0xffc02000 if DEBUG_SOCFPGA_UART
@@ -1058,11 +1102,13 @@ config DEBUG_UART_PHYS
        default 0xfffff700 if ARCH_IOP33X
        depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
                DEBUG_LL_UART_EFM32 || \
-                DEBUG_UART_8250 || DEBUG_UART_PL01X
+                DEBUG_UART_8250 || DEBUG_UART_PL01X || \
+                DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART
 config DEBUG_UART_VIRT
        hex "Virtual base address of debug UART"
        default 0xe0010fe0 if ARCH_RPC
+        default 0xe1000000 if DEBUG_MSM_UART
        default 0xf0000be0 if ARCH_EBSA110
        default 0xf0009000 if DEBUG_CNS3XXX
        default 0xf01fb000 if DEBUG_NOMADIK_UART
@@ -1075,9 +1121,16 @@ config DEBUG_UART_VIRT
        default 0xf2100000 if DEBUG_PXA_UART1
        default 0xf4090000 if ARCH_LPC32XX
        default 0xf4200000 if ARCH_GEMINI
+        default 0xf7000000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART0 || \
+                                DEBUG_S3C2410_UART0)
+        default 0xf7004000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART1 || \
+                                DEBUG_S3C2410_UART1)
+        default 0xf7008000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART2 || \
+                                DEBUG_S3C2410_UART2)
        default 0xf7fc9000 if DEBUG_BERLIN_UART
        default 0xf8009000 if DEBUG_VEXPRESS_UART0_CA9
        default 0xf8090000 if DEBUG_VEXPRESS_UART0_RS1
+        default 0xfa71e000 if DEBUG_QCOM_UARTDM
        default 0xfb009000 if DEBUG_REALVIEW_STD_PORT
        default 0xfb10c000 if DEBUG_REALVIEW_PB1176_PORT
        default 0xfd000000 if ARCH_SPEAR3XX || ARCH_SPEAR6XX
@@ -1116,7 +1169,8 @@ config DEBUG_UART_VIRT
        default 0xff003000 if DEBUG_U300_UART
        default DEBUG_UART_PHYS if !MMU
        depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
-                DEBUG_UART_8250 || DEBUG_UART_PL01X
+                DEBUG_UART_8250 || DEBUG_UART_PL01X || \
+                DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART
 config DEBUG_UART_8250_SHIFT
        int "Register offset shift for the 8250 debug UART"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 41c1931f0155..6721fab13734 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -138,10 +138,12 @@ endif
 textofs-$(CONFIG_ARCH_MSM7X30) := 0x00208000
 textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000
 textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
+textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000
 # Machine directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
 machine-$(CONFIG_ARCH_AT91)             += at91
+machine-$(CONFIG_ARCH_AXXIA)            += axxia
 machine-$(CONFIG_ARCH_BCM)              += bcm
 machine-$(CONFIG_ARCH_BERLIN)           += berlin
 machine-$(CONFIG_ARCH_CLPS711X)         += clps711x
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 066b03480b63..3a8b32df6b31 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -60,11 +60,6 @@
                add     \rb, \rb, #0x00010000   @ Ser1
 #endif
                .endm
-#elif defined(CONFIG_ARCH_S3C24XX)
-                .macro loadsp, rb, tmp
-                mov     \rb, #0x50000000
-                add     \rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT
-                .endm
 #else
                .macro  loadsp, rb, tmp
                addruart \rb, \tmp
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index cbe223c882d9..5986ff63b901 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -50,6 +50,7 @@ dtb-$(CONFIG_ARCH_AT91)	+= sama5d35ek.dtb
 dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb
 dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
+dtb-$(CONFIG_ARCH_AXXIA) += axm5516-amarillo.dtb
 dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
 dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
 dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb \
@@ -320,9 +321,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
 dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
 dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \
        s3c6410-smdk6410.dtb
-dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
+dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += r7s72100-genmai.dtb \
-        r7s72100-genmai.dtb \
-        r7s72100-genmai-reference.dtb \
        r8a7740-armadillo800eva.dtb \
        r8a7778-bockw.dtb \
        r8a7778-bockw-reference.dtb \
@@ -337,7 +336,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
        r8a73a4-ape6evm-reference.dtb \
        sh7372-mackerel.dtb
 dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
-        r7s72100-genmai-reference.dtb \
+        r7s72100-genmai.dtb \
        r8a7791-henninger.dtb \
        r8a7791-koelsch.dtb \
        r8a7790-lager.dtb
diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
index 6b71ad95a5cf..305975d3f531 100644
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/am335x-boneblack.dts
@@ -26,7 +26,6 @@
        pinctrl-0 = <&emmc_pins>;
        bus-width = <8>;
        status = "okay";
-        ti,vcc-aux-disable-is-sleep;
 };
 &am33xx_pinmux {
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 0fb5df4ad498..586397cf6e9c 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -144,7 +144,7 @@
                        compatible = "ti,edma3";
                        ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
                        reg =   <0x49000000 0x10000>,
-                                <0x44e10f90 0x10>;
+                                <0x44e10f90 0x40>;
                        interrupts = <12 13 14>;
                        #dma-cells = <1>;
                        dma-channels = <64>;
diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi
index 788391f91684..5a452fdd7c5d 100644
--- a/arch/arm/boot/dts/am3517.dtsi
+++ b/arch/arm/boot/dts/am3517.dtsi
@@ -62,5 +62,21 @@
        };
 };
+&iva {
+        status = "disabled";
+};
+&mailbox {
+        status = "disabled";
+};
+&mmu_isp {
+        status = "disabled";
+};
+&smartreflex_mpu_iva {
+        status = "disabled";
+};
 /include/ "am35xx-clocks.dtsi"
 /include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 1f852086d9b5..1704e853f163 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -67,11 +67,15 @@
        };
        ocp {
-                compatible = "simple-bus";
+                compatible = "ti,am4372-l3-noc", "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
                ranges;
                ti,hwmods = "l3_main";
+                reg = <0x44000000 0x400000
+                       0x44800000 0x400000>;
+                interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
                prcm: prcm@44df0000 {
                        compatible = "ti,am4-prcm";
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index f432685957b8..c25d15837ce9 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -221,6 +221,11 @@
        status = "okay";
 };
+&gpio5 {
+        status = "okay";
+        ti,no-reset-on-init;
+};
 &mmc1 {
        status = "okay";
        vmmc-supply = <&vmmcsd_fixed>;
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index ba1a43118f8f..416f4e5a69c1 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -66,6 +66,7 @@
                        i2c@11000 {
                                pinctrl-0 = <&i2c0_pins>;
                                pinctrl-names = "default";
+                                clock-frequency = <100000>;
                                status = "okay";
                                audio_codec: audio-codec@4a {
                                        compatible = "cirrus,cs42l51";
diff --git a/arch/arm/boot/dts/armada-375-db.dts b/arch/arm/boot/dts/armada-375-db.dts
index eb90b83d7d38..772fec2d26ce 100644
--- a/arch/arm/boot/dts/armada-375-db.dts
+++ b/arch/arm/boot/dts/armada-375-db.dts
@@ -78,6 +78,11 @@
                                };
                        };
+                        sata@a0000 {
+                                status = "okay";
+                                nr-ports = <2>;
+                        };
                        nand: nand@d0000 {
                                pinctrl-0 = <&nand_pins>;
                                pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi
index aa71718b549d..e69bc6759c39 100644
--- a/arch/arm/boot/dts/armada-380.dtsi
+++ b/arch/arm/boot/dts/armada-380.dtsi
@@ -101,7 +101,7 @@
                        pcie@3,0 {
                                device_type = "pci";
                                assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
-                                reg = <0x1000 0 0 0 0>;
+                                reg = <0x1800 0 0 0 0>;
                                #address-cells = <3>;
                                #size-cells = <2>;
                                #interrupt-cells = <1>;
diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi
index 2c7990d6efa2..f011009bf4cf 100644
--- a/arch/arm/boot/dts/armada-385.dtsi
+++ b/arch/arm/boot/dts/armada-385.dtsi
@@ -112,7 +112,7 @@
                        pcie@3,0 {
                                device_type = "pci";
                                assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
-                                reg = <0x1000 0 0 0 0>;
+                                reg = <0x1800 0 0 0 0>;
                                #address-cells = <3>;
                                #size-cells = <2>;
                                #interrupt-cells = <1>;
@@ -133,7 +133,7 @@
                        pcie@4,0 {
                                device_type = "pci";
                                assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
-                                reg = <0x1000 0 0 0 0>;
+                                reg = <0x2000 0 0 0 0>;
                                #address-cells = <3>;
                                #size-cells = <2>;
                                #interrupt-cells = <1>;
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index 2b598ef32285..42ddb2864365 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -49,7 +49,7 @@
                        /* Device Bus parameters are required */
                        /* Read parameters */
-                        devbus,bus-width    = <8>;
+                        devbus,bus-width    = <16>;
                        devbus,turn-off-ps  = <60000>;
                        devbus,badr-skew-ps = <0>;
                        devbus,acc-first-ps = <124000>;
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index eb0013f000b0..0478c55ca656 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -59,7 +59,7 @@
                        /* Device Bus parameters are required */
                        /* Read parameters */
-                        devbus,bus-width    = <8>;
+                        devbus,bus-width    = <16>;
                        devbus,turn-off-ps  = <60000>;
                        devbus,badr-skew-ps = <0>;
                        devbus,acc-first-ps = <124000>;
@@ -142,22 +142,22 @@
                        ethernet@70000 {
                                status = "okay";
                                phy = <&phy0>;
-                                phy-mode = "rgmii-id";
+                                phy-mode = "qsgmii";
                        };
                        ethernet@74000 {
                                status = "okay";
                                phy = <&phy1>;
-                                phy-mode = "rgmii-id";
+                                phy-mode = "qsgmii";
                        };
                        ethernet@30000 {
                                status = "okay";
                                phy = <&phy2>;
-                                phy-mode = "rgmii-id";
+                                phy-mode = "qsgmii";
                        };
                        ethernet@34000 {
                                status = "okay";
                                phy = <&phy3>;
-                                phy-mode = "rgmii-id";
+                                phy-mode = "qsgmii";
                        };
                        /* Front-side USB slot */
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
index cf26d1313d5f..e5c6a0492ca0 100644
--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -39,7 +39,7 @@
                        /* Device Bus parameters are required */
                        /* Read parameters */
-                        devbus,bus-width    = <8>;
+                        devbus,bus-width    = <16>;
                        devbus,turn-off-ps  = <60000>;
                        devbus,badr-skew-ps = <0>;
                        devbus,acc-first-ps = <124000>;
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 366fc2cbcd64..c0e0eae16a27 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -641,7 +641,7 @@
                                trigger@3 {
                                        reg = <3>;
                                        trigger-name = "external";
-                                        trigger-value = <0x13>;
+                                        trigger-value = <0xd>;
                                        trigger-external;
                                };
                        };
diff --git a/arch/arm/boot/dts/atlas6.dtsi b/arch/arm/boot/dts/atlas6.dtsi
index 6684d557daad..bb22842a0826 100644
--- a/arch/arm/boot/dts/atlas6.dtsi
+++ b/arch/arm/boot/dts/atlas6.dtsi
@@ -203,6 +203,7 @@
                                compatible = "sirf,prima2-tick";
                                reg = <0xb0020000 0x1000>;
                                interrupts = <0>;
+                                clocks = <&clks 11>;
                        };
                        nand@b0030000 {
diff --git a/arch/arm/boot/dts/axm5516-amarillo.dts b/arch/arm/boot/dts/axm5516-amarillo.dts
new file mode 100644
index 000000000000..a9d60471d9ff
--- /dev/null
+++ b/arch/arm/boot/dts/axm5516-amarillo.dts
@@ -0,0 +1,51 @@
+/*
+ * arch/arm/boot/dts/axm5516-amarillo.dts
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+/dts-v1/;
+/memreserve/ 0x00000000 0x00400000;
+#include "axm55xx.dtsi"
+#include "axm5516-cpus.dtsi"
+/ {
+        model = "Amarillo AXM5516";
+        compatible = "lsi,axm5516-amarillo", "lsi,axm5516";
+        memory {
+                device_type = "memory";
+                reg = <0 0x00000000 0x02 0x00000000>;
+        };
+};
+&serial0 {
+        status = "okay";
+};
+&serial1 {
+        status = "okay";
+};
+&serial2 {
+        status = "okay";
+};
+&serial3 {
+        status = "okay";
+};
+&gpio0 {
+        status = "okay";
+};
+&gpio1 {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/axm5516-cpus.dtsi b/arch/arm/boot/dts/axm5516-cpus.dtsi
new file mode 100644
index 000000000000..b85f360cb125
--- /dev/null
+++ b/arch/arm/boot/dts/axm5516-cpus.dtsi
@@ -0,0 +1,204 @@
+/*
+ * arch/arm/boot/dts/axm5516-cpus.dtsi
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+/ {
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                cpu-map {
+                        cluster0 {
+                                core0 {
+                                        cpu = <&CPU0>;
+                                };
+                                core1 {
+                                        cpu = <&CPU1>;
+                                };
+                                core2 {
+                                        cpu = <&CPU2>;
+                                };
+                                core3 {
+                                        cpu = <&CPU3>;
+                                };
+                        };
+                        cluster1 {
+                                core0 {
+                                        cpu = <&CPU4>;
+                                };
+                                core1 {
+                                        cpu = <&CPU5>;
+                                };
+                                core2 {
+                                        cpu = <&CPU6>;
+                                };
+                                core3 {
+                                        cpu = <&CPU7>;
+                                };
+                        };
+                        cluster2 {
+                                core0 {
+                                        cpu = <&CPU8>;
+                                };
+                                core1 {
+                                        cpu = <&CPU9>;
+                                };
+                                core2 {
+                                        cpu = <&CPU10>;
+                                };
+                                core3 {
+                                        cpu = <&CPU11>;
+                                };
+                        };
+                        cluster3 {
+                                core0 {
+                                        cpu = <&CPU12>;
+                                };
+                                core1 {
+                                        cpu = <&CPU13>;
+                                };
+                                core2 {
+                                        cpu = <&CPU14>;
+                                };
+                                core3 {
+                                        cpu = <&CPU15>;
+                                };
+                        };
+                };
+                CPU0: cpu@0 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <0x00>;
+                        clock-frequency= <1400000000>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+                };
+                CPU1: cpu@1 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <0x01>;
+                        clock-frequency= <1400000000>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+                };
+                CPU2: cpu@2 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <0x02>;
+                        clock-frequency= <1400000000>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+                };
+                CPU3: cpu@3 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <0x03>;
+                        clock-frequency= <1400000000>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+                };
+                CPU4: cpu@100 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <0x100>;
+                        clock-frequency= <1400000000>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+                };
+                CPU5: cpu@101 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <0x101>;
+                        clock-frequency= <1400000000>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+                };
+                CPU6: cpu@102 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <0x102>;
+                        clock-frequency= <1400000000>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+                };
+                CPU7: cpu@103 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <0x103>;
+                        clock-frequency= <1400000000>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+                };
+                CPU8: cpu@200 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <0x200>;
+                        clock-frequency= <1400000000>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+                };
+                CPU9: cpu@201 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <0x201>;
+                        clock-frequency= <1400000000>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+                };
+                CPU10: cpu@202 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <0x202>;
+                        clock-frequency= <1400000000>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+                };
+                CPU11: cpu@203 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <0x203>;
+                        clock-frequency= <1400000000>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+                };
+                CPU12: cpu@300 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <0x300>;
+                        clock-frequency= <1400000000>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+                };
+                CPU13: cpu@301 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <0x301>;
+                        clock-frequency= <1400000000>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+                };
+                CPU14: cpu@302 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <0x302>;
+                        clock-frequency= <1400000000>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+                };
+                CPU15: cpu@303 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <0x303>;
+                        clock-frequency= <1400000000>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/axm55xx.dtsi b/arch/arm/boot/dts/axm55xx.dtsi
new file mode 100644
index 000000000000..ea288f0a1d39
--- /dev/null
+++ b/arch/arm/boot/dts/axm55xx.dtsi
@@ -0,0 +1,204 @@
+/*
+ * arch/arm/boot/dts/axm55xx.dtsi
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/lsi,axm5516-clks.h>
+#include "skeleton64.dtsi"
+/ {
+        interrupt-parent = <&gic>;
+        aliases {
+                serial0   = &serial0;
+                serial1   = &serial1;
+                serial2   = &serial2;
+                serial3   = &serial3;
+                timer     = &timer0;
+        };
+        clocks {
+                compatible = "simple-bus";
+                #address-cells = <2>;
+                #size-cells = <2>;
+                ranges;
+                clk_ref0: clk_ref0 {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <125000000>;
+                };
+                clk_ref1: clk_ref1 {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <125000000>;
+                };
+                clk_ref2: clk_ref2 {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <125000000>;
+                };
+                clks: clock-controller@2010020000 {
+                        compatible = "lsi,axm5516-clks";
+                        #clock-cells = <1>;
+                        reg = <0x20 0x10020000 0 0x20000>;
+                };
+        };
+        gic: interrupt-controller@2001001000 {
+                compatible = "arm,cortex-a15-gic";
+                #interrupt-cells = <3>;
+                #address-cells = <0>;
+                interrupt-controller;
+                reg = <0x20 0x01001000 0 0x1000>,
+                      <0x20 0x01002000 0 0x1000>,
+                      <0x20 0x01004000 0 0x2000>,
+                      <0x20 0x01006000 0 0x2000>;
+                interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
+                                IRQ_TYPE_LEVEL_HIGH)>;
+        };
+        timer {
+                compatible = "arm,armv7-timer";
+                interrupts =
+                        <GIC_PPI 13
+                                (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                        <GIC_PPI 14
+                                (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                        <GIC_PPI 11
+                                (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                        <GIC_PPI 10
+                                (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+        };
+        pmu {
+                compatible = "arm,cortex-a15-pmu";
+                interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+        };
+        soc {
+                compatible = "simple-bus";
+                device_type = "soc";
+                #address-cells = <2>;
+                #size-cells = <2>;
+                interrupt-parent = <&gic>;
+                ranges;
+                syscon: syscon@2010030000 {
+                        compatible = "lsi,axxia-syscon", "syscon";
+                        reg = <0x20 0x10030000 0 0x2000>;
+                };
+                reset: reset@2010031000 {
+                        compatible = "lsi,axm55xx-reset";
+                        syscon = <&syscon>;
+                };
+                amba {
+                        compatible = "arm,amba-bus";
+                        #address-cells = <2>;
+                        #size-cells = <2>;
+                        ranges;
+                        serial0: uart@2010080000 {
+                                compatible = "arm,pl011", "arm,primecell";
+                                reg = <0x20 0x10080000 0 0x1000>;
+                                interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+                                clocks = <&clks AXXIA_CLK_PER>;
+                                clock-names = "apb_pclk";
+                                status = "disabled";
+                        };
+                        serial1: uart@2010081000 {
+                                compatible = "arm,pl011", "arm,primecell";
+                                reg = <0x20 0x10081000 0 0x1000>;
+                                interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+                                clocks = <&clks AXXIA_CLK_PER>;
+                                clock-names = "apb_pclk";
+                                status = "disabled";
+                        };
+                        serial2: uart@2010082000 {
+                                compatible = "arm,pl011", "arm,primecell";
+                                reg = <0x20 0x10082000 0 0x1000>;
+                                interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+                                clocks = <&clks AXXIA_CLK_PER>;
+                                clock-names = "apb_pclk";
+                                status = "disabled";
+                        };
+                        serial3: uart@2010083000 {
+                                compatible = "arm,pl011", "arm,primecell";
+                                reg = <0x20 0x10083000 0 0x1000>;
+                                interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+                                clocks = <&clks AXXIA_CLK_PER>;
+                                clock-names = "apb_pclk";
+                                status = "disabled";
+                        };
+                        timer0: timer@2010091000 {
+                                compatible = "arm,sp804", "arm,primecell";
+                                reg = <0x20 0x10091000 0 0x1000>;
+                                interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+                                clocks = <&clks AXXIA_CLK_PER>;
+                                clock-names = "apb_pclk";
+                                status = "okay";
+                        };
+                        gpio0: gpio@2010092000 {
+                                #gpio-cells = <2>;
+                                compatible = "arm,pl061", "arm,primecell";
+                                gpio-controller;
+                                reg = <0x20 0x10092000 0x00 0x1000>;
+                                interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+                                clocks = <&clks AXXIA_CLK_PER>;
+                                clock-names = "apb_pclk";
+                                status = "disabled";
+                        };
+                        gpio1: gpio@2010093000 {
+                                #gpio-cells = <2>;
+                                compatible = "arm,pl061", "arm,primecell";
+                                gpio-controller;
+                                reg = <0x20 0x10093000 0x00 0x1000>;
+                                interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+                                clocks = <&clks AXXIA_CLK_PER>;
+                                clock-names = "apb_pclk";
+                                status = "disabled";
+                        };
+                };
+        };
+};
+/*
+  Local Variables:
+  mode: C
+  End:
+*/
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index a8a0ceec6775..c29945e07c5a 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -72,13 +72,13 @@
         * hierarchy.
         */
        ocp {
-                compatible = "ti,omap4-l3-noc", "simple-bus";
+                compatible = "ti,dra7-l3-noc", "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
                ranges;
                ti,hwmods = "l3_main_1", "l3_main_2";
-                reg = <0x44000000 0x2000>,
+                reg = <0x44000000 0x1000000>,
-                      <0x44800000 0x3000>;
+                      <0x45000000 0x1000>;
                interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index 106a7057bcaf..77878447b312 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -564,7 +564,7 @@
                status = "okay";
                ak8975@0c {
-                        compatible = "ak,ak8975";
+                        compatible = "asahi-kasei,ak8975";
                        reg = <0x0c>;
                        gpios = <&gpj0 7 0>;
                };
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index 1f5afb39355f..d0de1f50d15b 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -108,6 +108,7 @@
                                        regulator-name = "VDD_IOPERI_1.8V";
                                        regulator-min-microvolt = <1800000>;
                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
                                        op_mode = <1>;
                                };
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 3a89cfbd6a87..e38532271ef9 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -60,6 +60,7 @@
                        compatible = "arm,cortex-a15";
                        reg = <0x0>;
                        clock-frequency = <1800000000>;
+                        cci-control-port = <&cci_control1>;
                };
                cpu1: cpu@1 {
@@ -67,6 +68,7 @@
                        compatible = "arm,cortex-a15";
                        reg = <0x1>;
                        clock-frequency = <1800000000>;
+                        cci-control-port = <&cci_control1>;
                };
                cpu2: cpu@2 {
@@ -74,6 +76,7 @@
                        compatible = "arm,cortex-a15";
                        reg = <0x2>;
                        clock-frequency = <1800000000>;
+                        cci-control-port = <&cci_control1>;
                };
                cpu3: cpu@3 {
@@ -81,6 +84,7 @@
                        compatible = "arm,cortex-a15";
                        reg = <0x3>;
                        clock-frequency = <1800000000>;
+                        cci-control-port = <&cci_control1>;
                };
                cpu4: cpu@100 {
@@ -88,6 +92,7 @@
                        compatible = "arm,cortex-a7";
                        reg = <0x100>;
                        clock-frequency = <1000000000>;
+                        cci-control-port = <&cci_control0>;
                };
                cpu5: cpu@101 {
@@ -95,6 +100,7 @@
                        compatible = "arm,cortex-a7";
                        reg = <0x101>;
                        clock-frequency = <1000000000>;
+                        cci-control-port = <&cci_control0>;
                };
                cpu6: cpu@102 {
@@ -102,6 +108,7 @@
                        compatible = "arm,cortex-a7";
                        reg = <0x102>;
                        clock-frequency = <1000000000>;
+                        cci-control-port = <&cci_control0>;
                };
                cpu7: cpu@103 {
@@ -109,6 +116,26 @@
                        compatible = "arm,cortex-a7";
                        reg = <0x103>;
                        clock-frequency = <1000000000>;
+                        cci-control-port = <&cci_control0>;
+                };
+        };
+        cci@10d20000 {
+                compatible = "arm,cci-400";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0x10d20000 0x1000>;
+                ranges = <0x0 0x10d20000 0x6000>;
+                cci_control0: slave-if@4000 {
+                        compatible = "arm,cci-400-ctrl-if";
+                        interface-type = "ace";
+                        reg = <0x4000 0x1000>;
+                };
+                cci_control1: slave-if@5000 {
+                        compatible = "arm,cci-400-ctrl-if";
+                        interface-type = "ace";
+                        reg = <0x5000 0x1000>;
                };
        };
@@ -403,7 +430,7 @@
        spi_0: spi@12d20000 {
                compatible = "samsung,exynos4210-spi";
                reg = <0x12d20000 0x100>;
-                interrupts = <0 66 0>;
+                interrupts = <0 68 0>;
                dmas = <&pdma0 5
                        &pdma0 4>;
                dma-names = "tx", "rx";
@@ -419,7 +446,7 @@
        spi_1: spi@12d30000 {
                compatible = "samsung,exynos4210-spi";
                reg = <0x12d30000 0x100>;
-                interrupts = <0 67 0>;
+                interrupts = <0 69 0>;
                dmas = <&pdma1 5
                        &pdma1 4>;
                dma-names = "tx", "rx";
@@ -435,7 +462,7 @@
        spi_2: spi@12d40000 {
                compatible = "samsung,exynos4210-spi";
                reg = <0x12d40000 0x100>;
-                interrupts = <0 68 0>;
+                interrupts = <0 70 0>;
                dmas = <&pdma0 7
                        &pdma0 6>;
                dma-names = "tx", "rx";
@@ -567,7 +594,7 @@
                #size-cells = <0>;
                pinctrl-names = "default";
                pinctrl-0 = <&i2c4_hs_bus>;
-                clocks = <&clock CLK_I2C4>;
+                clocks = <&clock CLK_USI0>;
                clock-names = "hsi2c";
                status = "disabled";
        };
@@ -580,7 +607,7 @@
                #size-cells = <0>;
                pinctrl-names = "default";
                pinctrl-0 = <&i2c5_hs_bus>;
-                clocks = <&clock CLK_I2C5>;
+                clocks = <&clock CLK_USI1>;
                clock-names = "hsi2c";
                status = "disabled";
        };
@@ -593,7 +620,7 @@
                #size-cells = <0>;
                pinctrl-names = "default";
                pinctrl-0 = <&i2c6_hs_bus>;
-                clocks = <&clock CLK_I2C6>;
+                clocks = <&clock CLK_USI2>;
                clock-names = "hsi2c";
                status = "disabled";
        };
@@ -606,7 +633,7 @@
                #size-cells = <0>;
                pinctrl-names = "default";
                pinctrl-0 = <&i2c7_hs_bus>;
-                clocks = <&clock CLK_I2C7>;
+                clocks = <&clock CLK_USI3>;
                clock-names = "hsi2c";
                status = "disabled";
        };
@@ -619,7 +646,7 @@
                #size-cells = <0>;
                pinctrl-names = "default";
                pinctrl-0 = <&i2c8_hs_bus>;
-                clocks = <&clock CLK_I2C8>;
+                clocks = <&clock CLK_USI4>;
                clock-names = "hsi2c";
                status = "disabled";
        };
@@ -632,7 +659,7 @@
                #size-cells = <0>;
                pinctrl-names = "default";
                pinctrl-0 = <&i2c9_hs_bus>;
-                clocks = <&clock CLK_I2C9>;
+                clocks = <&clock CLK_USI5>;
                clock-names = "hsi2c";
                status = "disabled";
        };
@@ -645,7 +672,7 @@
                #size-cells = <0>;
                pinctrl-names = "default";
                pinctrl-0 = <&i2c10_hs_bus>;
-                clocks = <&clock CLK_I2C10>;
+                clocks = <&clock CLK_USI6>;
                clock-names = "hsi2c";
                status = "disabled";
        };
diff --git a/arch/arm/boot/dts/imx53-mba53.dts b/arch/arm/boot/dts/imx53-mba53.dts
index 3f2400b8560b..3e3f17aa93a1 100644
--- a/arch/arm/boot/dts/imx53-mba53.dts
+++ b/arch/arm/boot/dts/imx53-mba53.dts
@@ -248,7 +248,7 @@
 &tve {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_vga_sync_1>;
-        i2c-ddc-bus = <&i2c3>;
+        ddc-i2c-bus = <&i2c3>;
        fsl,tve-mode = "vga";
        fsl,hsync-pin = <4>;
        fsl,vsync-pin = <6>;
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 375e66fad578..6456a0084388 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -116,7 +116,7 @@
                        #address-cells = <1>;
                        #size-cells = <0>;
                        compatible = "fsl,imx53-ipu";
-                        reg = <0x18000000 0x080000000>;
+                        reg = <0x18000000 0x08000000>;
                        interrupts = <11 10>;
                        clocks = <&clks IMX5_CLK_IPU_GATE>,
                                 <&clks IMX5_CLK_IPU_DI0_GATE>,
diff --git a/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts b/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
index 49f9295c7bac..8f76d28759a3 100644
--- a/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
+++ b/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
@@ -31,6 +31,16 @@
                stdout-path = &uart0;
        };
+        mbus {
+                pcie-controller {
+                        status = "okay";
+                        pcie@1,0 {
+                                status = "okay";
+                        };
+                };
+        };
        ocp@f1000000 {
                pin-controller@10000 {
                        pmx_usb_led: pmx-usb-led {
@@ -69,14 +79,6 @@
                ehci@50000 {
                        status = "okay";
                };
-                pcie-controller {
-                        status = "okay";
-                        pcie@1,0 {
-                                status = "okay";
-                        };
-                };
        };
        gpio-leds {
diff --git a/arch/arm/boot/dts/kirkwood-nsa3x0-common.dtsi b/arch/arm/boot/dts/kirkwood-nsa3x0-common.dtsi
index 9cb083b72404..2075a2e828f1 100644
--- a/arch/arm/boot/dts/kirkwood-nsa3x0-common.dtsi
+++ b/arch/arm/boot/dts/kirkwood-nsa3x0-common.dtsi
@@ -4,6 +4,16 @@
 / {
        model = "ZyXEL NSA310";
+        mbus {
+                pcie-controller {
+                        status = "okay";
+                        pcie@1,0 {
+                                status = "okay";
+                        };
+                };
+        };
        ocp@f1000000 {
                pinctrl: pin-controller@10000 {
@@ -51,14 +61,6 @@
                        status = "okay";
                        nr-ports = <2>;
                };
-                pcie-controller {
-                        status = "okay";
-                        pcie@1,0 {
-                                status = "okay";
-                        };
-                };
        };
        gpio_poweroff {
diff --git a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
index f577b7df9a29..521c587acaee 100644
--- a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
+++ b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
@@ -24,11 +24,10 @@
                compatible = "smsc,lan9221", "smsc,lan9115";
                bank-width = <2>;
                gpmc,mux-add-data;
-                gpmc,cs-on-ns = <0>;
+                gpmc,cs-on-ns = <1>;
-                gpmc,cs-rd-off-ns = <186>;
+                gpmc,cs-rd-off-ns = <180>;
-                gpmc,cs-wr-off-ns = <186>;
+                gpmc,cs-wr-off-ns = <180>;
-                gpmc,adv-on-ns = <12>;
+                gpmc,adv-rd-off-ns = <18>;
-                gpmc,adv-rd-off-ns = <48>;
                gpmc,adv-wr-off-ns = <48>;
                gpmc,oe-on-ns = <54>;
                gpmc,oe-off-ns = <168>;
@@ -36,12 +35,10 @@
                gpmc,we-off-ns = <168>;
                gpmc,rd-cycle-ns = <186>;
                gpmc,wr-cycle-ns = <186>;
-                gpmc,access-ns = <114>;
+                gpmc,access-ns = <144>;
-                gpmc,page-burst-access-ns = <6>;
+                gpmc,page-burst-access-ns = <24>;
-                gpmc,bus-turnaround-ns = <12>;
+                gpmc,bus-turnaround-ns = <90>;
-                gpmc,cycle2cycle-delay-ns = <18>;
+                gpmc,cycle2cycle-delay-ns = <90>;
-                gpmc,wr-data-mux-bus-ns = <90>;
-                gpmc,wr-access-ns = <186>;
                gpmc,cycle2cycle-samecsen;
                gpmc,cycle2cycle-diffcsen;
                vddvario-supply = <&vddvario>;
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index 22f35ea142c1..8f8c07da4ac1 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -71,13 +71,6 @@
                        interrupts = <58>;
                };
-                mailbox: mailbox@48094000 {
-                        compatible = "ti,omap2-mailbox";
-                        ti,hwmods = "mailbox";
-                        reg = <0x48094000 0x200>;
-                        interrupts = <26>;
-                };
                intc: interrupt-controller@1 {
                        compatible = "ti,omap2-intc";
                        interrupt-controller;
diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi
index db0f1293579c..e83b0468080c 100644
--- a/arch/arm/boot/dts/omap2420.dtsi
+++ b/arch/arm/boot/dts/omap2420.dtsi
@@ -151,6 +151,14 @@
                        dma-names = "tx", "rx";
                };
+                mailbox: mailbox@48094000 {
+                        compatible = "ti,omap2-mailbox";
+                        reg = <0x48094000 0x200>;
+                        interrupts = <26>, <34>;
+                        interrupt-names = "dsp", "iva";
+                        ti,hwmods = "mailbox";
+                };
                timer1: timer@48028000 {
                        compatible = "ti,omap2420-timer";
                        reg = <0x48028000 0x400>;
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi
index 8ff8d15184ad..c4e8013801ee 100644
--- a/arch/arm/boot/dts/omap2430.dtsi
+++ b/arch/arm/boot/dts/omap2430.dtsi
@@ -242,6 +242,13 @@
                        dma-names = "tx", "rx";
                };
+                mailbox: mailbox@48094000 {
+                        compatible = "ti,omap2-mailbox";
+                        reg = <0x48094000 0x200>;
+                        interrupts = <26>;
+                        ti,hwmods = "mailbox";
+                };
                timer1: timer@49018000 {
                        compatible = "ti,omap2420-timer";
                        reg = <0x49018000 0x400>;
diff --git a/arch/arm/boot/dts/omap3-cm-t3x30.dtsi b/arch/arm/boot/dts/omap3-cm-t3x30.dtsi
index d00055809e31..25ba08331d88 100644
--- a/arch/arm/boot/dts/omap3-cm-t3x30.dtsi
+++ b/arch/arm/boot/dts/omap3-cm-t3x30.dtsi
@@ -10,18 +10,6 @@
                        cpu0-supply = <&vcc>;
                };
        };
-        vddvario: regulator-vddvario {
-                compatible = "regulator-fixed";
-                regulator-name = "vddvario";
-                regulator-always-on;
-        };
-        vdd33a: regulator-vdd33a {
-                compatible = "regulator-fixed";
-                regulator-name = "vdd33a";
-                regulator-always-on;
-        };
 };
 &omap3_pmx_core {
@@ -35,58 +23,34 @@
        hsusb0_pins: pinmux_hsusb0_pins {
                pinctrl-single,pins = <
-                        OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)               /* hsusb0_clk.hsusb0_clk */
+                        OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0)               /* hsusb0_clk.hsusb0_clk */
-                        OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0)               /* hsusb0_stp.hsusb0_stp */
+                        OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)               /* hsusb0_stp.hsusb0_stp */
-                        OMAP3_CORE1_IOPAD(0x21a4, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_dir.hsusb0_dir */
+                        OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_dir.hsusb0_dir */
-                        OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_nxt.hsusb0_nxt */
+                        OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_nxt.hsusb0_nxt */
-                        OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data0.hsusb2_data0 */
+                        OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data0.hsusb2_data0 */
-                        OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data1.hsusb0_data1 */
+                        OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data1.hsusb0_data1 */
-                        OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data2.hsusb0_data2 */
+                        OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data2.hsusb0_data2 */
-                        OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data7.hsusb0_data3 */
+                        OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data7.hsusb0_data3 */
-                        OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data7.hsusb0_data4 */
+                        OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data7.hsusb0_data4 */
-                        OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data7.hsusb0_data5 */
+                        OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data7.hsusb0_data5 */
-                        OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data7.hsusb0_data6 */
+                        OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data7.hsusb0_data6 */
-                        OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data7.hsusb0_data7 */
+                        OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data7.hsusb0_data7 */
                >;
        };
 };
+#include "omap-gpmc-smsc911x.dtsi"
 &gpmc {
        ranges = <5 0 0x2c000000 0x01000000>;
-        smsc1: ethernet@5,0 {
+        smsc1: ethernet@gpmc {
                compatible = "smsc,lan9221", "smsc,lan9115";
                pinctrl-names = "default";
                pinctrl-0 = <&smsc1_pins>;
                interrupt-parent = <&gpio6>;
                interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
                reg = <5 0 0xff>;
-                bank-width = <2>;
-                gpmc,mux-add-data;
-                gpmc,cs-on-ns = <0>;
-                gpmc,cs-rd-off-ns = <186>;
-                gpmc,cs-wr-off-ns = <186>;
-                gpmc,adv-on-ns = <12>;
-                gpmc,adv-rd-off-ns = <48>;
-                gpmc,adv-wr-off-ns = <48>;
-                gpmc,oe-on-ns = <54>;
-                gpmc,oe-off-ns = <168>;
-                gpmc,we-on-ns = <54>;
-                gpmc,we-off-ns = <168>;
-                gpmc,rd-cycle-ns = <186>;
-                gpmc,wr-cycle-ns = <186>;
-                gpmc,access-ns = <114>;
-                gpmc,page-burst-access-ns = <6>;
-                gpmc,bus-turnaround-ns = <12>;
-                gpmc,cycle2cycle-delay-ns = <18>;
-                gpmc,wr-data-mux-bus-ns = <90>;
-                gpmc,wr-access-ns = <186>;
-                gpmc,cycle2cycle-samecsen;
-                gpmc,cycle2cycle-diffcsen;
-                vddvario-supply = <&vddvario>;
-                vdd33a-supply = <&vdd33a>;
-                reg-io-width = <4>;
-                smsc,save-mac-address;
        };
 };
diff --git a/arch/arm/boot/dts/omap3-evm-37xx.dts b/arch/arm/boot/dts/omap3-evm-37xx.dts
index 4df68ad3736a..9cba94bed7ad 100644
--- a/arch/arm/boot/dts/omap3-evm-37xx.dts
+++ b/arch/arm/boot/dts/omap3-evm-37xx.dts
@@ -89,7 +89,16 @@
        status = "disabled";
 };
+&uart1 {
+        interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
+};
+&uart2 {
+        interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
+};
 &uart3 {
+        interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
        pinctrl-names = "default";
        pinctrl-0 = <&uart3_pins>;
 };
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi
index b97736d98a64..e2d163bf0619 100644
--- a/arch/arm/boot/dts/omap3-igep.dtsi
+++ b/arch/arm/boot/dts/omap3-igep.dtsi
@@ -107,7 +107,7 @@
                >;
        };
-        smsc911x_pins: pinmux_smsc911x_pins {
+        smsc9221_pins: pinmux_smsc9221_pins {
                pinctrl-single,pins = <
                        0x1a2 (PIN_INPUT | MUX_MODE4)           /* mcspi1_cs2.gpio_176 */
                >;
diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts
index 7abd64f6ae21..b22caaaf774b 100644
--- a/arch/arm/boot/dts/omap3-igep0020.dts
+++ b/arch/arm/boot/dts/omap3-igep0020.dts
@@ -10,7 +10,7 @@
 */
 #include "omap3-igep.dtsi"
-#include "omap-gpmc-smsc911x.dtsi"
+#include "omap-gpmc-smsc9221.dtsi"
 / {
        model = "IGEPv2 (TI OMAP AM/DM37x)";
@@ -248,7 +248,7 @@
        ethernet@gpmc {
                pinctrl-names = "default";
-                pinctrl-0 = <&smsc911x_pins>;
+                pinctrl-0 = <&smsc9221_pins>;
                reg = <5 0 0xff>;
                interrupt-parent = <&gpio6>;
                interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
diff --git a/arch/arm/boot/dts/omap3-ldp.dts b/arch/arm/boot/dts/omap3-ldp.dts
index 0abe986a4ecc..476ff158ddb3 100644
--- a/arch/arm/boot/dts/omap3-ldp.dts
+++ b/arch/arm/boot/dts/omap3-ldp.dts
@@ -234,6 +234,10 @@
        };
 };
+&uart3 {
+        interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
+};
 &usb_otg_hs {
        pinctrl-names = "default";
        pinctrl-0 = <&musb_pins>;
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index a289910ec362..059a8ff1e6ac 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -22,6 +22,17 @@
                };
        };
+        leds {
+                compatible = "gpio-leds";
+                heartbeat {
+                        label = "debug::sleep";
+                        gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;  /* gpio162 */
+                        linux,default-trigger = "default-on";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&debug_leds>;
+                };
+        };
        memory {
                device_type = "memory";
                reg = <0x80000000 0x10000000>; /* 256 MB */
@@ -144,6 +155,12 @@
                >;
        };
+        debug_leds: pinmux_debug_led_pins {
+                pinctrl-single,pins = <
+                        OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* mcbsp1_clkx.gpio_162 */
+                >;
+        };
        mcspi4_pins: pinmux_mcspi4_pins {
                pinctrl-single,pins = <
                        0x15c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
@@ -696,11 +713,13 @@
 };
 &uart2 {
+        interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
        pinctrl-names = "default";
        pinctrl-0 = <&uart2_pins>;
 };
 &uart3 {
+        interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
        pinctrl-names = "default";
        pinctrl-0 = <&uart3_pins>;
 };
diff --git a/arch/arm/boot/dts/omap3-sb-t35.dtsi b/arch/arm/boot/dts/omap3-sb-t35.dtsi
index 7909c51b05a5..d59e3de1441e 100644
--- a/arch/arm/boot/dts/omap3-sb-t35.dtsi
+++ b/arch/arm/boot/dts/omap3-sb-t35.dtsi
@@ -2,20 +2,6 @@
 * Common support for CompuLab SB-T35 used on SBC-T3530, SBC-T3517 and SBC-T3730
 */
-/ {
-        vddvario_sb_t35: regulator-vddvario-sb-t35 {
-                compatible = "regulator-fixed";
-                regulator-name = "vddvario";
-                regulator-always-on;
-        };
-        vdd33a_sb_t35: regulator-vdd33a-sb-t35 {
-                compatible = "regulator-fixed";
-                regulator-name = "vdd33a";
-                regulator-always-on;
-        };
-};
 &omap3_pmx_core {
        smsc2_pins: pinmux_smsc2_pins {
                pinctrl-single,pins = <
@@ -37,11 +23,10 @@
                reg = <4 0 0xff>;
                bank-width = <2>;
                gpmc,mux-add-data;
-                gpmc,cs-on-ns = <0>;
+                gpmc,cs-on-ns = <1>;
-                gpmc,cs-rd-off-ns = <186>;
+                gpmc,cs-rd-off-ns = <180>;
-                gpmc,cs-wr-off-ns = <186>;
+                gpmc,cs-wr-off-ns = <180>;
-                gpmc,adv-on-ns = <12>;
+                gpmc,adv-rd-off-ns = <18>;
-                gpmc,adv-rd-off-ns = <48>;
                gpmc,adv-wr-off-ns = <48>;
                gpmc,oe-on-ns = <54>;
                gpmc,oe-off-ns = <168>;
@@ -49,16 +34,14 @@
                gpmc,we-off-ns = <168>;
                gpmc,rd-cycle-ns = <186>;
                gpmc,wr-cycle-ns = <186>;
-                gpmc,access-ns = <114>;
+                gpmc,access-ns = <144>;
-                gpmc,page-burst-access-ns = <6>;
+                gpmc,page-burst-access-ns = <24>;
-                gpmc,bus-turnaround-ns = <12>;
+                gpmc,bus-turnaround-ns = <90>;
-                gpmc,cycle2cycle-delay-ns = <18>;
+                gpmc,cycle2cycle-delay-ns = <90>;
-                gpmc,wr-data-mux-bus-ns = <90>;
-                gpmc,wr-access-ns = <186>;
                gpmc,cycle2cycle-samecsen;
                gpmc,cycle2cycle-diffcsen;
-                vddvario-supply = <&vddvario_sb_t35>;
+                vddvario-supply = <&vddvario>;
-                vdd33a-supply = <&vdd33a_sb_t35>;
+                vdd33a-supply = <&vdd33a>;
                reg-io-width = <4>;
                smsc,save-mac-address;
        };
diff --git a/arch/arm/boot/dts/omap3-sbc-t3517.dts b/arch/arm/boot/dts/omap3-sbc-t3517.dts
index 024c9c6c682d..42189b65d393 100644
--- a/arch/arm/boot/dts/omap3-sbc-t3517.dts
+++ b/arch/arm/boot/dts/omap3-sbc-t3517.dts
@@ -8,6 +8,19 @@
 / {
        model = "CompuLab SBC-T3517 with CM-T3517";
        compatible = "compulab,omap3-sbc-t3517", "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
+        /* Only one GPMC smsc9220 on SBC-T3517, CM-T3517 uses am35x Ethernet */
+        vddvario: regulator-vddvario-sb-t35 {
+                compatible = "regulator-fixed";
+                regulator-name = "vddvario";
+                regulator-always-on;
+        };
+        vdd33a: regulator-vdd33a-sb-t35 {
+                compatible = "regulator-fixed";
+                regulator-name = "vdd33a";
+                regulator-always-on;
+        };
 };
 &omap3_pmx_core {
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index b8cd2d78347b..b2891a9a6975 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -61,7 +61,7 @@
                        ti,hwmods = "mpu";
                };
-                iva {
+                iva: iva {
                        compatible = "ti,iva2.2";
                        ti,hwmods = "iva";
@@ -267,7 +267,7 @@
                uart1: serial@4806a000 {
                        compatible = "ti,omap3-uart";
                        reg = <0x4806a000 0x2000>;
-                        interrupts = <72>;
+                        interrupts-extended = <&intc 72>;
                        dmas = <&sdma 49 &sdma 50>;
                        dma-names = "tx", "rx";
                        ti,hwmods = "uart1";
@@ -277,7 +277,7 @@
                uart2: serial@4806c000 {
                        compatible = "ti,omap3-uart";
                        reg = <0x4806c000 0x400>;
-                        interrupts = <73>;
+                        interrupts-extended = <&intc 73>;
                        dmas = <&sdma 51 &sdma 52>;
                        dma-names = "tx", "rx";
                        ti,hwmods = "uart2";
@@ -287,7 +287,7 @@
                uart3: serial@49020000 {
                        compatible = "ti,omap3-uart";
                        reg = <0x49020000 0x400>;
-                        interrupts = <74>;
+                        interrupts-extended = <&intc 74>;
                        dmas = <&sdma 53 &sdma 54>;
                        dma-names = "tx", "rx";
                        ti,hwmods = "uart3";
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
index d2c45bfaaa2c..8cfa3c8a72b0 100644
--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
@@ -481,6 +481,21 @@
        usb-supply = <&vusb>;
 };
+&uart2 {
+        interrupts-extended = <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH
+                               &omap4_pmx_core OMAP4_UART2_RX>;
+};
+&uart3 {
+        interrupts-extended = <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
+                               &omap4_pmx_core OMAP4_UART3_RX>;
+};
+&uart4 {
+        interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
+                               &omap4_pmx_core OMAP4_UART4_RX>;
+};
 &usb_otg_hs {
        interface-type = <1>;
        mode = <3>;
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index 48983c8d56c2..3e1da43068f6 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -570,16 +570,22 @@
 };
 &uart2 {
+        interrupts-extended = <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH
+                               &omap4_pmx_core OMAP4_UART2_RX>;
        pinctrl-names = "default";
        pinctrl-0 = <&uart2_pins>;
 };
 &uart3 {
+        interrupts-extended = <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
+                               &omap4_pmx_core OMAP4_UART3_RX>;
        pinctrl-names = "default";
        pinctrl-0 = <&uart3_pins>;
 };
 &uart4 {
+        interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
+                               &omap4_pmx_core OMAP4_UART4_RX>;
        pinctrl-names = "default";
        pinctrl-0 = <&uart4_pins>;
 };
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 203131ebb581..43a587e097d4 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -312,7 +312,7 @@
                uart2: serial@4806c000 {
                        compatible = "ti,omap4-uart";
                        reg = <0x4806c000 0x100>;
-                        interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts-extended = <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "uart2";
                        clock-frequency = <48000000>;
                };
@@ -320,7 +320,7 @@
                uart3: serial@48020000 {
                        compatible = "ti,omap4-uart";
                        reg = <0x48020000 0x100>;
-                        interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts-extended = <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "uart3";
                        clock-frequency = <48000000>;
                };
@@ -328,7 +328,7 @@
                uart4: serial@4806e000 {
                        compatible = "ti,omap4-uart";
                        reg = <0x4806e000 0x100>;
-                        interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "uart4";
                        clock-frequency = <48000000>;
                };
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index fc9299ed1074..e58be57984ab 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -636,6 +636,13 @@
                        status = "disabled";
                };
+                mailbox: mailbox@4a0f4000 {
+                        compatible = "ti,omap4-mailbox";
+                        reg = <0x4a0f4000 0x200>;
+                        interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+                        ti,hwmods = "mailbox";
+                };
                timer1: timer@4ae18000 {
                        compatible = "ti,omap5430-timer";
                        reg = <0x4ae18000 0x80>;
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi
index 65d7d151cdc7..3df7ba860282 100644
--- a/arch/arm/boot/dts/prima2.dtsi
+++ b/arch/arm/boot/dts/prima2.dtsi
@@ -201,6 +201,7 @@
                                compatible = "sirf,prima2-tick";
                                reg = <0xb0020000 0x1000>;
                                interrupts = <0>;
+                                clocks = <&clks 11>;
                        };
                        nand@b0030000 {
diff --git a/arch/arm/boot/dts/r7s72100-genmai-reference.dts b/arch/arm/boot/dts/r7s72100-genmai-reference.dts
deleted file mode 100644
index e664611a47c8..000000000000
--- a/arch/arm/boot/dts/r7s72100-genmai-reference.dts
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * Device Tree Source for the Genmai board
- *
- * Copyright (C) 2013 Renesas Solutions Corp.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2.  This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-/dts-v1/;
-#include "r7s72100.dtsi"
-/ {
-        model = "Genmai";
-        compatible = "renesas,genmai-reference", "renesas,r7s72100";
-        chosen {
-                bootargs = "console=ttySC2,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
-        };
-        memory {
-                device_type = "memory";
-                reg = <0x08000000 0x08000000>;
-        };
-        lbsc {
-                #address-cells = <1>;
-                #size-cells = <1>;
-        };
-};
-&i2c2 {
-        status = "okay";
-        clock-frequency = <400000>;
-        eeprom@50 {
-                compatible = "renesas,24c128";
-                reg = <0x50>;
-                pagesize = <64>;
-        };
-};
diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts b/arch/arm/boot/dts/r7s72100-genmai.dts
index b1deaf7e2e06..56849b55e1c2 100644
--- a/arch/arm/boot/dts/r7s72100-genmai.dts
+++ b/arch/arm/boot/dts/r7s72100-genmai.dts
@@ -1,7 +1,8 @@
 /*
 * Device Tree Source for the Genmai board
 *
- * Copyright (C) 2013 Renesas Solutions Corp.
+ * Copyright (C) 2013-14 Renesas Solutions Corp.
+ * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
@@ -15,6 +16,10 @@
        model = "Genmai";
        compatible = "renesas,genmai", "renesas,r7s72100";
+        aliases {
+                serial2 = &scif2;
+        };
        chosen {
                bootargs = "console=ttySC2,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
        };
@@ -29,3 +34,26 @@
                #size-cells = <1>;
        };
 };
+&extal_clk {
+        clock-frequency = <13330000>;
+};
+&usb_x1_clk {
+        clock-frequency = <48000000>;
+};
+&i2c2 {
+        status = "okay";
+        clock-frequency = <400000>;
+        eeprom@50 {
+                compatible = "renesas,24c128";
+                reg = <0x50>;
+                pagesize = <64>;
+        };
+};
+&scif2 {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index ee700717a34b..f50fbc8f3bd9 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -1,13 +1,15 @@
 /*
 * Device Tree Source for the r7s72100 SoC
 *
- * Copyright (C) 2013 Renesas Solutions Corp.
+ * Copyright (C) 2013-14 Renesas Solutions Corp.
+ * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */
+#include <dt-bindings/clock/r7s72100-clock.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 / {
@@ -28,6 +30,112 @@
                spi4 = &spi4;
        };
+        clocks {
+                ranges;
+                #address-cells = <1>;
+                #size-cells = <1>;
+                /* External clocks */
+                extal_clk: extal_clk {
+                        #clock-cells = <0>;
+                        compatible = "fixed-clock";
+                        /* If clk present, value must be set by board */
+                        clock-frequency = <0>;
+                        clock-output-names = "extal";
+                };
+                usb_x1_clk: usb_x1_clk {
+                        #clock-cells = <0>;
+                        compatible = "fixed-clock";
+                        /* If clk present, value must be set by board */
+                        clock-frequency = <0>;
+                        clock-output-names = "usb_x1";
+                };
+                /* Special CPG clocks */
+                cpg_clocks: cpg_clocks@fcfe0000 {
+                        #clock-cells = <1>;
+                        compatible = "renesas,r7s72100-cpg-clocks",
+                                     "renesas,rz-cpg-clocks";
+                        reg = <0xfcfe0000 0x18>;
+                        clocks = <&extal_clk>, <&usb_x1_clk>;
+                        clock-output-names = "pll", "i", "g";
+                };
+                /* Fixed factor clocks */
+                b_clk: b_clk {
+                        #clock-cells = <0>;
+                        compatible = "fixed-factor-clock";
+                        clocks = <&cpg_clocks R7S72100_CLK_PLL>;
+                        clock-mult = <1>;
+                        clock-div = <3>;
+                        clock-output-names = "b";
+                };
+                p1_clk: p1_clk {
+                        #clock-cells = <0>;
+                        compatible = "fixed-factor-clock";
+                        clocks = <&cpg_clocks R7S72100_CLK_PLL>;
+                        clock-mult = <1>;
+                        clock-div = <6>;
+                        clock-output-names = "p1";
+                };
+                p0_clk: p0_clk {
+                        #clock-cells = <0>;
+                        compatible = "fixed-factor-clock";
+                        clocks = <&cpg_clocks R7S72100_CLK_PLL>;
+                        clock-mult = <1>;
+                        clock-div = <12>;
+                        clock-output-names = "p0";
+                };
+                /* MSTP clocks */
+                mstp3_clks: mstp3_clks@fcfe0420 {
+                        #clock-cells = <1>;
+                        compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+                        reg = <0xfcfe0420 4>;
+                        clocks = <&p0_clk>;
+                        clock-indices = <R7S72100_CLK_MTU2>;
+                        clock-output-names = "mtu2";
+                };
+                mstp4_clks: mstp4_clks@fcfe0424 {
+                        #clock-cells = <1>;
+                        compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+                        reg = <0xfcfe0424 4>;
+                        clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
+                                 <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>;
+                        clock-indices = <
+                                R7S72100_CLK_SCIF0 R7S72100_CLK_SCIF1 R7S72100_CLK_SCIF2 R7S72100_CLK_SCIF3
+                                R7S72100_CLK_SCIF4 R7S72100_CLK_SCIF5 R7S72100_CLK_SCIF6 R7S72100_CLK_SCIF7
+                        >;
+                        clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
+                };
+                mstp9_clks: mstp9_clks@fcfe0438 {
+                        #clock-cells = <1>;
+                        compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+                        reg = <0xfcfe0438 4>;
+                        clocks = <&p0_clk>, <&p0_clk>, <&p0_clk>, <&p0_clk>;
+                        clock-indices = <
+                                R7S72100_CLK_I2C0 R7S72100_CLK_I2C1 R7S72100_CLK_I2C2 R7S72100_CLK_I2C3
+                        >;
+                        clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3";
+                };
+                mstp10_clks: mstp10_clks@fcfe043c {
+                        #clock-cells = <1>;
+                        compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+                        reg = <0xfcfe043c 4>;
+                        clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
+                                 <&p1_clk>;
+                        clock-indices = <
+                                R7S72100_CLK_SPI0 R7S72100_CLK_SPI1 R7S72100_CLK_SPI2 R7S72100_CLK_SPI3
+                                R7S72100_CLK_SPI4
+                        >;
+                        clock-output-names = "spi0", "spi1", "spi2", "spi3", "spi4";
+                };
+        };
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
@@ -61,6 +169,7 @@
                             <0 162 IRQ_TYPE_LEVEL_HIGH>,
                             <0 163 IRQ_TYPE_LEVEL_HIGH>,
                             <0 164 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
                clock-frequency = <100000>;
                status = "disabled";
        };
@@ -78,6 +187,7 @@
                             <0 170 IRQ_TYPE_LEVEL_HIGH>,
                             <0 171 IRQ_TYPE_LEVEL_HIGH>,
                             <0 172 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp9_clks R7S72100_CLK_I2C1>;
                clock-frequency = <100000>;
                status = "disabled";
        };
@@ -95,6 +205,7 @@
                             <0 178 IRQ_TYPE_LEVEL_HIGH>,
                             <0 179 IRQ_TYPE_LEVEL_HIGH>,
                             <0 180 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp9_clks R7S72100_CLK_I2C2>;
                clock-frequency = <100000>;
                status = "disabled";
        };
@@ -112,10 +223,107 @@
                             <0 186 IRQ_TYPE_LEVEL_HIGH>,
                             <0 187 IRQ_TYPE_LEVEL_HIGH>,
                             <0 188 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp9_clks R7S72100_CLK_I2C3>;
                clock-frequency = <100000>;
                status = "disabled";
        };
+        scif0: serial@e8007000 {
+                compatible = "renesas,scif-r7s72100", "renesas,scif";
+                reg = <0xe8007000 64>;
+                interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 191 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 192 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 189 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
+                clock-names = "sci_ick";
+                status = "disabled";
+        };
+        scif1: serial@e8007800 {
+                compatible = "renesas,scif-r7s72100", "renesas,scif";
+                reg = <0xe8007800 64>;
+                interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 195 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 196 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 193 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
+                clock-names = "sci_ick";
+                status = "disabled";
+        };
+        scif2: serial@e8008000 {
+                compatible = "renesas,scif-r7s72100", "renesas,scif";
+                reg = <0xe8008000 64>;
+                interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 199 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 200 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 197 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
+                clock-names = "sci_ick";
+                status = "disabled";
+        };
+        scif3: serial@e8008800 {
+                compatible = "renesas,scif-r7s72100", "renesas,scif";
+                reg = <0xe8008800 64>;
+                interrupts = <0 202 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 203 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 204 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 201 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
+                clock-names = "sci_ick";
+                status = "disabled";
+        };
+        scif4: serial@e8009000 {
+                compatible = "renesas,scif-r7s72100", "renesas,scif";
+                reg = <0xe8009000 64>;
+                interrupts = <0 206 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 207 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 208 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 205 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp4_clks R7S72100_CLK_SCIF4>;
+                clock-names = "sci_ick";
+                status = "disabled";
+        };
+        scif5: serial@e8009800 {
+                compatible = "renesas,scif-r7s72100", "renesas,scif";
+                reg = <0xe8009800 64>;
+                interrupts = <0 210 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 211 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 212 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 209 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp4_clks R7S72100_CLK_SCIF5>;
+                clock-names = "sci_ick";
+                status = "disabled";
+        };
+        scif6: serial@e800a000 {
+                compatible = "renesas,scif-r7s72100", "renesas,scif";
+                reg = <0xe800a000 64>;
+                interrupts = <0 214 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 215 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 216 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 213 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp4_clks R7S72100_CLK_SCIF6>;
+                clock-names = "sci_ick";
+                status = "disabled";
+        };
+        scif7: serial@e800a800 {
+                compatible = "renesas,scif-r7s72100", "renesas,scif";
+                reg = <0xe800a800 64>;
+                interrupts = <0 218 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 219 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 220 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 217 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp4_clks R7S72100_CLK_SCIF7>;
+                clock-names = "sci_ick";
+                status = "disabled";
+        };
        spi0: spi@e800c800 {
                compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
                reg = <0xe800c800 0x24>;
@@ -123,6 +331,7 @@
                             <0 239 IRQ_TYPE_LEVEL_HIGH>,
                             <0 240 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "error", "rx", "tx";
+                clocks = <&mstp10_clks R7S72100_CLK_SPI0>;
                num-cs = <1>;
                #address-cells = <1>;
                #size-cells = <0>;
@@ -136,6 +345,7 @@
                             <0 242 IRQ_TYPE_LEVEL_HIGH>,
                             <0 243 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "error", "rx", "tx";
+                clocks = <&mstp10_clks R7S72100_CLK_SPI1>;
                num-cs = <1>;
                #address-cells = <1>;
                #size-cells = <0>;
@@ -149,6 +359,7 @@
                             <0 245 IRQ_TYPE_LEVEL_HIGH>,
                             <0 246 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "error", "rx", "tx";
+                clocks = <&mstp10_clks R7S72100_CLK_SPI2>;
                num-cs = <1>;
                #address-cells = <1>;
                #size-cells = <0>;
@@ -162,6 +373,7 @@
                             <0 248 IRQ_TYPE_LEVEL_HIGH>,
                             <0 249 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "error", "rx", "tx";
+                clocks = <&mstp10_clks R7S72100_CLK_SPI3>;
                num-cs = <1>;
                #address-cells = <1>;
                #size-cells = <0>;
@@ -175,6 +387,7 @@
                             <0 251 IRQ_TYPE_LEVEL_HIGH>,
                             <0 252 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "error", "rx", "tx";
+                clocks = <&mstp10_clks R7S72100_CLK_SPI4>;
                num-cs = <1>;
                #address-cells = <1>;
                #size-cells = <0>;
diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index 636251b2afb3..55d29f4d2ed6 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -23,6 +23,7 @@
                        compatible = "arm,cortex-a9";
                        device_type = "cpu";
                        reg = <0x0>;
+                        clock-frequency = <800000000>;
                };
        };
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 86d676f62942..dd2fe46073f2 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -18,6 +18,11 @@
        model = "Lager";
        compatible = "renesas,lager", "renesas,r8a7790";
+        aliases {
+                serial6 = &scif0;
+                serial7 = &scif1;
+        };
        chosen {
                bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
        };
@@ -146,7 +151,7 @@
 };
 &pfc {
-        pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
+        pinctrl-0 = <&du_pins>;
        pinctrl-names = "default";
        du_pins: du {
@@ -264,6 +269,20 @@
        };
 };
+&scif0 {
+        pinctrl-0 = <&scif0_pins>;
+        pinctrl-names = "default";
+        status = "okay";
+};
+&scif1 {
+        pinctrl-0 = <&scif1_pins>;
+        pinctrl-names = "default";
+        status = "okay";
+};
 &msiof1 {
        pinctrl-0 = <&msiof1_pins>;
        pinctrl-names = "default";
@@ -277,7 +296,6 @@
                spi-cpol;
                spi-cpha;
        };
 };
 &sdhi0 {
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index e6130d6ff28e..7ff29601f962 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -728,7 +728,7 @@
                        renesas,clock-indices = <
                                R8A7790_CLK_TMU1 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2
                                R8A7790_CLK_CMT0 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1
-                                R8A7790_CLK_VSP1_DU0 R8A7790_CLK_VSP1_RT R8A7790_CLK_VSP1_SY
+                                R8A7790_CLK_VSP1_DU0 R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S
                        >;
                        clock-output-names =
                                "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 0d69813def85..05d44f9b202f 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -19,6 +19,11 @@
        model = "Koelsch";
        compatible = "renesas,koelsch", "renesas,r8a7791";
+        aliases {
+                serial6 = &scif0;
+                serial7 = &scif1;
+        };
        chosen {
                bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
        };
@@ -230,7 +235,7 @@
 };
 &pfc {
-        pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
+        pinctrl-0 = <&du_pins>;
        pinctrl-names = "default";
        i2c2_pins: i2c2 {
@@ -310,6 +315,20 @@
        status = "okay";
 };
+&scif0 {
+        pinctrl-0 = <&scif0_pins>;
+        pinctrl-names = "default";
+        status = "okay";
+};
+&scif1 {
+        pinctrl-0 = <&scif1_pins>;
+        pinctrl-names = "default";
+        status = "okay";
+};
 &sdhi0 {
        pinctrl-0 = <&sdhi0_pins>;
        pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 5eea08fb3722..8d7ffaeff6e0 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -733,7 +733,7 @@
                        renesas,clock-indices = <
                                R8A7791_CLK_TMU1 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2
                                R8A7791_CLK_CMT0 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1
-                                R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_SY
+                                R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_S
                        >;
                        clock-output-names =
                                "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 048c5de00551..4387cfd420ba 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -24,6 +24,7 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
+                enable-method = "rockchip,rk3066-smp";
                cpu@0 {
                        device_type = "cpu";
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index a494fb0cff64..238c996d4a7f 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -24,6 +24,7 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
+                enable-method = "rockchip,rk3066-smp";
                cpu@0 {
                        device_type = "cpu";
diff --git a/arch/arm/boot/dts/s3c2416-smdk2416.dts b/arch/arm/boot/dts/s3c2416-smdk2416.dts
index 59594cf15998..ea92fd69529a 100644
--- a/arch/arm/boot/dts/s3c2416-smdk2416.dts
+++ b/arch/arm/boot/dts/s3c2416-smdk2416.dts
@@ -19,6 +19,19 @@
                reg =  <0x30000000 0x4000000>;
        };
+        clocks {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                xti: xti {
+                        compatible = "fixed-clock";
+                        clock-frequency = <12000000>;
+                        clock-output-names = "xti";
+                        #clock-cells = <0>;
+                };
+        };
        serial@50000000 {
                status = "okay";
                pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/s3c2416.dtsi b/arch/arm/boot/dts/s3c2416.dtsi
index e6555bdd81b8..955e4a4f8c31 100644
--- a/arch/arm/boot/dts/s3c2416.dtsi
+++ b/arch/arm/boot/dts/s3c2416.dtsi
@@ -8,6 +8,7 @@
 * published by the Free Software Foundation.
 */
+#include <dt-bindings/clock/s3c2443.h>
 #include "s3c24xx.dtsi"
 #include "s3c2416-pinctrl.dtsi"
@@ -28,26 +29,53 @@
                compatible = "samsung,s3c2416-irq";
        };
+        clocks: clock-controller@0x4c000000 {
+                compatible = "samsung,s3c2416-clock";
+                reg = <0x4c000000 0x40>;
+                #clock-cells = <1>;
+        };
        pinctrl@56000000 {
                compatible = "samsung,s3c2416-pinctrl";
        };
+        timer@51000000 {
+                clocks = <&clocks PCLK_PWM>;
+                clock-names = "timers";
+        };
        serial@50000000 {
                compatible = "samsung,s3c2440-uart";
+                clock-names = "uart", "clk_uart_baud2",
+                                "clk_uart_baud3";
+                clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
+                                <&clocks SCLK_UART>;
        };
        serial@50004000 {
                compatible = "samsung,s3c2440-uart";
+                clock-names = "uart", "clk_uart_baud2",
+                                "clk_uart_baud3";
+                clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
+                                <&clocks SCLK_UART>;
        };
        serial@50008000 {
                compatible = "samsung,s3c2440-uart";
+                clock-names = "uart", "clk_uart_baud2",
+                                "clk_uart_baud3";
+                clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
+                                <&clocks SCLK_UART>;
        };
        serial@5000C000 {
                compatible = "samsung,s3c2440-uart";
                reg = <0x5000C000 0x4000>;
                interrupts = <1 18 24 4>, <1 18 25 4>;
+                clock-names = "uart", "clk_uart_baud2",
+                                "clk_uart_baud3";
+                clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>,
+                                <&clocks SCLK_UART>;
                status = "disabled";
        };
@@ -55,6 +83,10 @@
                compatible = "samsung,s3c6410-sdhci";
                reg = <0x4AC00000 0x100>;
                interrupts = <0 0 21 3>;
+                clock-names = "hsmmc", "mmc_busclk.0",
+                                "mmc_busclk.2";
+                clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>,
+                                <&clocks MUX_HSMMC0>;
                status = "disabled";
        };
@@ -62,18 +94,28 @@
                compatible = "samsung,s3c6410-sdhci";
                reg = <0x4A800000 0x100>;
                interrupts = <0 0 20 3>;
+                clock-names = "hsmmc", "mmc_busclk.0",
+                                "mmc_busclk.2";
+                clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>,
+                                <&clocks MUX_HSMMC1>;
                status = "disabled";
        };
        watchdog@53000000 {
                interrupts = <1 9 27 3>;
+                clocks = <&clocks PCLK_WDT>;
+                clock-names = "watchdog";
        };
        rtc@57000000 {
                compatible = "samsung,s3c2416-rtc";
+                clocks = <&clocks PCLK_RTC>;
+                clock-names = "rtc";
        };
        i2c@54000000 {
                compatible = "samsung,s3c2440-i2c";
+                clocks = <&clocks PCLK_I2C0>;
+                clock-names = "i2c";
        };
 };
diff --git a/arch/arm/boot/dts/ste-ccu8540.dts b/arch/arm/boot/dts/ste-ccu8540.dts
index 7f3baf51a3a9..32dd55e5f4e6 100644
--- a/arch/arm/boot/dts/ste-ccu8540.dts
+++ b/arch/arm/boot/dts/ste-ccu8540.dts
@@ -18,6 +18,7 @@
        compatible = "st-ericsson,ccu8540", "st-ericsson,u8540";
        memory@0 {
+                device_type = "memory";
                reg = <0x20000000 0x1f000000>, <0xc0000000 0x3f000000>;
        };
diff --git a/arch/arm/boot/dts/ste-ccu9540.dts b/arch/arm/boot/dts/ste-ccu9540.dts
index 229508750890..651c56d400a4 100644
--- a/arch/arm/boot/dts/ste-ccu9540.dts
+++ b/arch/arm/boot/dts/ste-ccu9540.dts
@@ -38,8 +38,8 @@
                        arm,primecell-periphid = <0x10480180>;
                        max-frequency = <100000000>;
                        bus-width = <4>;
-                        mmc-cap-sd-highspeed;
+                        cap-sd-highspeed;
-                        mmc-cap-mmc-highspeed;
+                        cap-mmc-highspeed;
                        vmmc-supply = <&ab8500_ldo_aux3_reg>;
                        cd-gpios  = <&gpio7 6 0x4>; // 230
@@ -63,7 +63,7 @@
                        arm,primecell-periphid = <0x10480180>;
                        max-frequency = <100000000>;
                        bus-width = <8>;
-                        mmc-cap-mmc-highspeed;
+                        cap-mmc-highspeed;
                        vmmc-supply = <&ab8500_ldo_aux2_reg>;
                        status = "okay";
diff --git a/arch/arm/boot/dts/ste-href.dtsi b/arch/arm/boot/dts/ste-href.dtsi
index 6cb9b68e2188..bf8f0eddc2c0 100644
--- a/arch/arm/boot/dts/ste-href.dtsi
+++ b/arch/arm/boot/dts/ste-href.dtsi
@@ -116,8 +116,15 @@
                        arm,primecell-periphid = <0x10480180>;
                        max-frequency = <100000000>;
                        bus-width = <4>;
-                        mmc-cap-sd-highspeed;
+                        cap-sd-highspeed;
-                        mmc-cap-mmc-highspeed;
+                        cap-mmc-highspeed;
+                        sd-uhs-sdr12;
+                        sd-uhs-sdr25;
+                        full-pwr-cycle;
+                        st,sig-dir-dat0;
+                        st,sig-dir-dat2;
+                        st,sig-dir-cmd;
+                        st,sig-pin-fbclk;
                        vmmc-supply = <&ab8500_ldo_aux3_reg>;
                        vqmmc-supply = <&vmmci>;
                        pinctrl-names = "default", "sleep";
@@ -132,6 +139,7 @@
                        arm,primecell-periphid = <0x10480180>;
                        max-frequency = <100000000>;
                        bus-width = <4>;
+                        non-removable;
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&sdi1_default_mode>;
                        pinctrl-1 = <&sdi1_sleep_mode>;
@@ -144,7 +152,9 @@
                        arm,primecell-periphid = <0x10480180>;
                        max-frequency = <100000000>;
                        bus-width = <8>;
-                        mmc-cap-mmc-highspeed;
+                        cap-mmc-highspeed;
+                        non-removable;
+                        vmmc-supply = <&db8500_vsmps2_reg>;
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&sdi2_default_mode>;
                        pinctrl-1 = <&sdi2_sleep_mode>;
@@ -157,7 +167,8 @@
                        arm,primecell-periphid = <0x10480180>;
                        max-frequency = <100000000>;
                        bus-width = <8>;
-                        mmc-cap-mmc-highspeed;
+                        cap-mmc-highspeed;
+                        non-removable;
                        vmmc-supply = <&ab8500_ldo_aux2_reg>;
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&sdi4_default_mode>;
diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
index 5acc0449676a..d316c955bd5f 100644
--- a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
+++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
@@ -840,8 +840,8 @@
                        interrupts = <22>;
                        max-frequency = <48000000>;
                        bus-width = <4>;
-                        mmc-cap-mmc-highspeed;
+                        cap-mmc-highspeed;
-                        mmc-cap-sd-highspeed;
+                        cap-sd-highspeed;
                        cd-gpios = <&gpio3 15 0x1>;
                        cd-inverted;
                        pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts
index a2f632d0be2a..474ef83229cd 100644
--- a/arch/arm/boot/dts/ste-snowball.dts
+++ b/arch/arm/boot/dts/ste-snowball.dts
@@ -156,7 +156,7 @@
                        arm,primecell-periphid = <0x10480180>;
                        max-frequency = <100000000>;
                        bus-width = <4>;
-                        mmc-cap-mmc-highspeed;
+                        cap-mmc-highspeed;
                        vmmc-supply = <&ab8500_ldo_aux3_reg>;
                        vqmmc-supply = <&vmmci>;
                        pinctrl-names = "default", "sleep";
@@ -195,7 +195,7 @@
                        arm,primecell-periphid = <0x10480180>;
                        max-frequency = <100000000>;
                        bus-width = <8>;
-                        mmc-cap-mmc-highspeed;
+                        cap-mmc-highspeed;
                        vmmc-supply = <&ab8500_ldo_aux2_reg>;
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&sdi4_default_mode>;
diff --git a/arch/arm/boot/dts/ste-u300.dts b/arch/arm/boot/dts/ste-u300.dts
index 6fe688e9e4da..82a661677e97 100644
--- a/arch/arm/boot/dts/ste-u300.dts
+++ b/arch/arm/boot/dts/ste-u300.dts
@@ -442,8 +442,8 @@
                        clock-names = "apb_pclk", "mclk";
                        max-frequency = <24000000>;
                        bus-width = <4>; // SD-card slot
-                        mmc-cap-mmc-highspeed;
+                        cap-mmc-highspeed;
-                        mmc-cap-sd-highspeed;
+                        cap-sd-highspeed;
                        cd-gpios = <&gpio 12 0x4>;
                        cd-inverted;
                        vmmc-supply = <&ab3100_ldo_g_reg>;
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 56df970ffe25..385933bac114 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -93,7 +93,7 @@
                pll4: clk@01c20018 {
                        #clock-cells = <0>;
-                        compatible = "allwinner,sun4i-a10-pll1-clk";
+                        compatible = "allwinner,sun7i-a20-pll4-clk";
                        reg = <0x01c20018 0x4>;
                        clocks = <&osc24M>;
                        clock-output-names = "pll4";
@@ -115,6 +115,14 @@
                        clock-output-names = "pll6_sata", "pll6_other", "pll6";
                };
+                pll8: clk@01c20040 {
+                        #clock-cells = <0>;
+                        compatible = "allwinner,sun7i-a20-pll4-clk";
+                        reg = <0x01c20040 0x4>;
+                        clocks = <&osc24M>;
+                        clock-output-names = "pll8";
+                };
                cpu: cpu@01c20054 {
                        #clock-cells = <0>;
                        compatible = "allwinner,sun4i-a10-cpu-clk";
@@ -898,9 +906,9 @@
                        #size-cells = <0>;
                };
-                i2c4: i2c@01c2bc00 {
+                i2c4: i2c@01c2c000 {
                        compatible = "allwinner,sun4i-i2c";
-                        reg = <0x01c2bc00 0x400>;
+                        reg = <0x01c2c000 0x400>;
                        interrupts = <0 89 4>;
                        clocks = <&apb1_gates 15>;
                        clock-frequency = <100000>;
diff --git a/arch/arm/boot/dts/twl4030_omap3.dtsi b/arch/arm/boot/dts/twl4030_omap3.dtsi
index c353ef0a6ac7..3537ae5b2146 100644
--- a/arch/arm/boot/dts/twl4030_omap3.dtsi
+++ b/arch/arm/boot/dts/twl4030_omap3.dtsi
@@ -8,7 +8,7 @@
 &twl {
        pinctrl-names = "default";
-        pinctrl-0 = <&twl4030_pins>;
+        pinctrl-0 = <&twl4030_pins &twl4030_vpins>;
 };
 &omap3_pmx_core {
@@ -23,3 +23,20 @@
                >;
        };
 };
+/*
+ * If your board is not using the I2C4 pins with twl4030, then don't include
+ * this file. For proper idle mode signaling with sys_clkreq and sys_off_mode
+ * pins we need to configure I2C4, or else use the legacy sys_nvmode1 and
+ * sys_nvmode2 signaling.
+ */
+&omap3_pmx_wkup {
+        twl4030_vpins: pinmux_twl4030_vpins {
+                pinctrl-single,pins = <
+                        OMAP3_WKUP_IOPAD(0x2a00, PIN_INPUT | MUX_MODE0)         /* i2c4_scl.i2c4_scl */
+                        OMAP3_WKUP_IOPAD(0x2a02, PIN_INPUT | MUX_MODE0)         /* i2c4_sda.i2c4_sda */
+                        OMAP3_WKUP_IOPAD(0x2a06, PIN_OUTPUT | MUX_MODE0)        /* sys_clkreq.sys_clkreq */
+                        OMAP3_WKUP_IOPAD(0x2a18, PIN_OUTPUT | MUX_MODE0)        /* sys_off_mode.sys_off_mode */
+                >;
+        };
+};
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index ac870fb3fa0d..756c986995a3 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -74,8 +74,24 @@
                        v2m_sysreg: sysreg@010000 {
                                compatible = "arm,vexpress-sysreg";
                                reg = <0x010000 0x1000>;
-                                gpio-controller;
-                                #gpio-cells = <2>;
+                                v2m_led_gpios: sys_led@08 {
+                                        compatible = "arm,vexpress-sysreg,sys_led";
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                };
+                                v2m_mmc_gpios: sys_mci@48 {
+                                        compatible = "arm,vexpress-sysreg,sys_mci";
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                };
+                                v2m_flash_gpios: sys_flash@4c {
+                                        compatible = "arm,vexpress-sysreg,sys_flash";
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                };
                        };
                        v2m_sysctl: sysctl@020000 {
@@ -113,8 +129,8 @@
                                compatible = "arm,pl180", "arm,primecell";
                                reg = <0x050000 0x1000>;
                                interrupts = <9 10>;
-                                cd-gpios = <&v2m_sysreg 0 0>;
+                                cd-gpios = <&v2m_mmc_gpios 0 0>;
-                                wp-gpios = <&v2m_sysreg 1 0>;
+                                wp-gpios = <&v2m_mmc_gpios 1 0>;
                                max-frequency = <12000000>;
                                vmmc-supply = <&v2m_fixed_3v3>;
                                clocks = <&v2m_clk24mhz>, <&smbclk>;
@@ -265,6 +281,58 @@
                        clock-output-names = "v2m:refclk32khz";
                };
+                leds {
+                        compatible = "gpio-leds";
+                        user@1 {
+                                label = "v2m:green:user1";
+                                gpios = <&v2m_led_gpios 0 0>;
+                                linux,default-trigger = "heartbeat";
+                        };
+                        user@2 {
+                                label = "v2m:green:user2";
+                                gpios = <&v2m_led_gpios 1 0>;
+                                linux,default-trigger = "mmc0";
+                        };
+                        user@3 {
+                                label = "v2m:green:user3";
+                                gpios = <&v2m_led_gpios 2 0>;
+                                linux,default-trigger = "cpu0";
+                        };
+                        user@4 {
+                                label = "v2m:green:user4";
+                                gpios = <&v2m_led_gpios 3 0>;
+                                linux,default-trigger = "cpu1";
+                        };
+                        user@5 {
+                                label = "v2m:green:user5";
+                                gpios = <&v2m_led_gpios 4 0>;
+                                linux,default-trigger = "cpu2";
+                        };
+                        user@6 {
+                                label = "v2m:green:user6";
+                                gpios = <&v2m_led_gpios 5 0>;
+                                linux,default-trigger = "cpu3";
+                        };
+                        user@7 {
+                                label = "v2m:green:user7";
+                                gpios = <&v2m_led_gpios 6 0>;
+                                linux,default-trigger = "cpu4";
+                        };
+                        user@8 {
+                                label = "v2m:green:user8";
+                                gpios = <&v2m_led_gpios 7 0>;
+                                linux,default-trigger = "cpu5";
+                        };
+                };
                mcc {
                        compatible = "arm,vexpress,config-bus";
                        arm,vexpress,config-bridge = <&v2m_sysreg>;
diff --git a/arch/arm/boot/dts/vexpress-v2m.dtsi b/arch/arm/boot/dts/vexpress-v2m.dtsi
index f1420368355b..ba856d604fb7 100644
--- a/arch/arm/boot/dts/vexpress-v2m.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m.dtsi
@@ -73,8 +73,24 @@
                        v2m_sysreg: sysreg@00000 {
                                compatible = "arm,vexpress-sysreg";
                                reg = <0x00000 0x1000>;
-                                gpio-controller;
-                                #gpio-cells = <2>;
+                                v2m_led_gpios: sys_led@08 {
+                                        compatible = "arm,vexpress-sysreg,sys_led";
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                };
+                                v2m_mmc_gpios: sys_mci@48 {
+                                        compatible = "arm,vexpress-sysreg,sys_mci";
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                };
+                                v2m_flash_gpios: sys_flash@4c {
+                                        compatible = "arm,vexpress-sysreg,sys_flash";
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                };
                        };
                        v2m_sysctl: sysctl@01000 {
@@ -112,8 +128,8 @@
                                compatible = "arm,pl180", "arm,primecell";
                                reg = <0x05000 0x1000>;
                                interrupts = <9 10>;
-                                cd-gpios = <&v2m_sysreg 0 0>;
+                                cd-gpios = <&v2m_mmc_gpios 0 0>;
-                                wp-gpios = <&v2m_sysreg 1 0>;
+                                wp-gpios = <&v2m_mmc_gpios 1 0>;
                                max-frequency = <12000000>;
                                vmmc-supply = <&v2m_fixed_3v3>;
                                clocks = <&v2m_clk24mhz>, <&smbclk>;
@@ -264,6 +280,58 @@
                        clock-output-names = "v2m:refclk32khz";
                };
+                leds {
+                        compatible = "gpio-leds";
+                        user@1 {
+                                label = "v2m:green:user1";
+                                gpios = <&v2m_led_gpios 0 0>;
+                                linux,default-trigger = "heartbeat";
+                        };
+                        user@2 {
+                                label = "v2m:green:user2";
+                                gpios = <&v2m_led_gpios 1 0>;
+                                linux,default-trigger = "mmc0";
+                        };
+                        user@3 {
+                                label = "v2m:green:user3";
+                                gpios = <&v2m_led_gpios 2 0>;
+                                linux,default-trigger = "cpu0";
+                        };
+                        user@4 {
+                                label = "v2m:green:user4";
+                                gpios = <&v2m_led_gpios 3 0>;
+                                linux,default-trigger = "cpu1";
+                        };
+                        user@5 {
+                                label = "v2m:green:user5";
+                                gpios = <&v2m_led_gpios 4 0>;
+                                linux,default-trigger = "cpu2";
+                        };
+                        user@6 {
+                                label = "v2m:green:user6";
+                                gpios = <&v2m_led_gpios 5 0>;
+                                linux,default-trigger = "cpu3";
+                        };
+                        user@7 {
+                                label = "v2m:green:user7";
+                                gpios = <&v2m_led_gpios 6 0>;
+                                linux,default-trigger = "cpu4";
+                        };
+                        user@8 {
+                                label = "v2m:green:user8";
+                                gpios = <&v2m_led_gpios 7 0>;
+                                linux,default-trigger = "cpu5";
+                        };
+                };
                mcc {
                        compatible = "arm,vexpress,config-bus";
                        arm,vexpress,config-bridge = <&v2m_sysreg>;
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index 15f98cbcb75a..a25c262326dc 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -312,6 +312,7 @@
                        arm,vexpress-sysreg,func = <12 0>;
                        label = "A15 Pcore";
                };
                power@1 {
                        /* Total power for the three A7 cores */
                        compatible = "arm,vexpress-power";
@@ -322,14 +323,14 @@
                energy@0 {
                        /* Total energy for the two A15 cores */
                        compatible = "arm,vexpress-energy";
-                        arm,vexpress-sysreg,func = <13 0>;
+                        arm,vexpress-sysreg,func = <13 0>, <13 1>;
                        label = "A15 Jcore";
                };
                energy@2 {
                        /* Total energy for the three A7 cores */
                        compatible = "arm,vexpress-energy";
-                        arm,vexpress-sysreg,func = <13 2>;
+                        arm,vexpress-sysreg,func = <13 2>, <13 3>;
                        label = "A7 Jcore";
                };
        };
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index d13cdc322e17..760bbc463c5b 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -186,6 +186,11 @@
                        };
                };
+                devcfg: devcfg@f8007000 {
+                        compatible = "xlnx,zynq-devcfg-1.0";
+                        reg = <0xf8007000 0x100>;
+                } ;
                global_timer: timer@f8f00200 {
                        compatible = "arm,cortex-a9-global-timer";
                        reg = <0xf8f00200 0x20>;
diff --git a/arch/arm/common/bL_switcher.c b/arch/arm/common/bL_switcher.c
index f01c0ee0c87e..490f3dced749 100644
--- a/arch/arm/common/bL_switcher.c
+++ b/arch/arm/common/bL_switcher.c
@@ -433,8 +433,12 @@ static void bL_switcher_restore_cpus(void)
 {
        int i;
-        for_each_cpu(i, &bL_switcher_removed_logical_cpus)
+        for_each_cpu(i, &bL_switcher_removed_logical_cpus) {
-                cpu_up(i);
+                struct device *cpu_dev = get_cpu_device(i);
+                int ret = device_online(cpu_dev);
+                if (ret)
+                        dev_err(cpu_dev, "switcher: unable to restore CPU\n");
+        }
 }
 static int bL_switcher_halve_cpus(void)
@@ -521,7 +525,7 @@ static int bL_switcher_halve_cpus(void)
                        continue;
                }
-                ret = cpu_down(i);
+                ret = device_offline(get_cpu_device(i));
                if (ret) {
                        bL_switcher_restore_cpus();
                        return ret;
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index 41bca32409fc..5339009b3c0c 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -1423,55 +1423,38 @@ EXPORT_SYMBOL(edma_clear_event);
 #if IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_DMADEVICES)
-static int edma_of_read_u32_to_s16_array(const struct device_node *np,
+static int edma_xbar_event_map(struct device *dev, struct device_node *node,
-                                         const char *propname, s16 *out_values,
+                               struct edma_soc_info *pdata, size_t sz)
-                                         size_t sz)
 {
-        int ret;
+        const char pname[] = "ti,edma-xbar-event-map";
-        ret = of_property_read_u16_array(np, propname, out_values, sz);
-        if (ret)
-                return ret;
-        /* Terminate it */
-        *out_values++ = -1;
-        *out_values++ = -1;
-        return 0;
-}
-static int edma_xbar_event_map(struct device *dev,
-                               struct device_node *node,
-                               struct edma_soc_info *pdata, int len)
-{
-        int ret, i;
        struct resource res;
        void __iomem *xbar;
-        const s16 (*xbar_chans)[2];
+        s16 (*xbar_chans)[2];
+        size_t nelm = sz / sizeof(s16);
        u32 shift, offset, mux;
+        int ret, i;
-        xbar_chans = devm_kzalloc(dev,
+        xbar_chans = devm_kzalloc(dev, (nelm + 2) * sizeof(s16), GFP_KERNEL);
-                                  len/sizeof(s16) + 2*sizeof(s16),
-                                  GFP_KERNEL);
        if (!xbar_chans)
                return -ENOMEM;
        ret = of_address_to_resource(node, 1, &res);
        if (ret)
-                return -EIO;
+                return -ENOMEM;
        xbar = devm_ioremap(dev, res.start, resource_size(&res));
        if (!xbar)
                return -ENOMEM;
-        ret = edma_of_read_u32_to_s16_array(node,
+        ret = of_property_read_u16_array(node, pname, (u16 *)xbar_chans, nelm);
-                                            "ti,edma-xbar-event-map",
-                                            (s16 *)xbar_chans,
-                                            len/sizeof(u32));
        if (ret)
                return -EIO;
-        for (i = 0; xbar_chans[i][0] != -1; i++) {
+        /* Invalidate last entry for the other user of this mess */
+        nelm >>= 1;
+        xbar_chans[nelm][0] = xbar_chans[nelm][1] = -1;
+        for (i = 0; i < nelm; i++) {
                shift = (xbar_chans[i][1] & 0x03) << 3;
                offset = xbar_chans[i][1] & 0xfffffffc;
                mux = readl(xbar + offset);
@@ -1480,8 +1463,7 @@ static int edma_xbar_event_map(struct device *dev,
                writel(mux, (xbar + offset));
        }
-        pdata->xbar_chans = xbar_chans;
+        pdata->xbar_chans = (const s16 (*)[2]) xbar_chans;
        return 0;
 }
diff --git a/arch/arm/configs/axm55xx_defconfig b/arch/arm/configs/axm55xx_defconfig
new file mode 100644
index 000000000000..d3260d7d5af1
--- /dev/null
+++ b/arch/arm/configs/axm55xx_defconfig
@@ -0,0 +1,248 @@
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_FHANDLE=y
+CONFIG_AUDIT=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+CONFIG_SCHED_AUTOGROUP=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_PROFILING=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_ARCH_AXXIA=y
+CONFIG_GPIO_PCA953X=y
+CONFIG_ARM_LPAE=y
+CONFIG_ARM_THUMBEE=y
+CONFIG_ARM_ERRATA_430973=y
+CONFIG_ARM_ERRATA_643719=y
+CONFIG_ARM_ERRATA_720789=y
+CONFIG_ARM_ERRATA_754322=y
+CONFIG_ARM_ERRATA_754327=y
+CONFIG_ARM_ERRATA_764369=y
+CONFIG_ARM_ERRATA_775420=y
+CONFIG_ARM_ERRATA_798181=y
+CONFIG_PCI=y
+CONFIG_PCI_MSI=y
+CONFIG_PCIE_AXXIA=y
+CONFIG_SMP=y
+CONFIG_NR_CPUS=16
+CONFIG_HOTPLUG_CPU=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+CONFIG_HIGHMEM=y
+CONFIG_KSM=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_BINFMT_MISC=y
+# CONFIG_SUSPEND is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM_USER=y
+CONFIG_XFRM_SUB_POLICY=y
+CONFIG_XFRM_MIGRATE=y
+CONFIG_XFRM_STATISTICS=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+CONFIG_INET_IPCOMP=y
+# CONFIG_INET_LRO is not set
+# CONFIG_IPV6 is not set
+CONFIG_NETWORK_PHY_TIMESTAMPING=y
+CONFIG_BRIDGE=y
+# CONFIG_WIRELESS is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_AFS_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_M25P80=y
+CONFIG_PROC_DEVICETREE=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_ATA=y
+CONFIG_PATA_PLATFORM=y
+CONFIG_PATA_OF_PLATFORM=y
+CONFIG_MD=y
+CONFIG_BLK_DEV_DM=y
+CONFIG_DM_UEVENT=y
+CONFIG_NETDEVICES=y
+CONFIG_TUN=y
+CONFIG_VETH=y
+CONFIG_VIRTIO_NET=y
+# CONFIG_NET_CADENCE is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+CONFIG_BROADCOM_PHY=y
+# CONFIG_WLAN is not set
+# CONFIG_MOUSE_PS2_ALPS is not set
+# CONFIG_MOUSE_PS2_LOGIPS2PP is not set
+# CONFIG_MOUSE_PS2_SYNAPTICS is not set
+# CONFIG_MOUSE_PS2_TRACKPOINT is not set
+# CONFIG_SERIO_SERPORT is not set
+CONFIG_SERIO_AMBAKMI=y
+CONFIG_LEGACY_PTY_COUNT=16
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_VIRTIO_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_AXXIA=y
+CONFIG_SPI=y
+CONFIG_SPI_PL022=y
+CONFIG_DP83640_PHY=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_PL061=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_AXXIA=y
+CONFIG_SENSORS_ADT7475=y
+CONFIG_SENSORS_JC42=y
+CONFIG_SENSORS_LM75=y
+CONFIG_PMBUS=y
+CONFIG_SENSORS_LTC2978=y
+CONFIG_WATCHDOG=y
+CONFIG_ARM_SP805_WATCHDOG=y
+CONFIG_FB=y
+CONFIG_FB_ARMCLCD=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_HID_A4TECH=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_DRAGONRISE=y
+CONFIG_HID_EZKEY=y
+CONFIG_HID_KYE=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_TWINHAN=y
+CONFIG_HID_KENSINGTON=y
+CONFIG_HID_LOGITECH=y
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+CONFIG_HID_NTRIG=y
+CONFIG_HID_ORTEK=y
+CONFIG_HID_PANTHERLORD=y
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SUNPLUS=y
+CONFIG_HID_GREENASIA=y
+CONFIG_HID_SMARTJOYPLUS=y
+CONFIG_HID_TOPSEED=y
+CONFIG_HID_THRUSTMASTER=y
+CONFIG_HID_ZEROPLUS=y
+CONFIG_USB=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+CONFIG_USB_EHCI_HCD_AXXIA=y
+CONFIG_USB_STORAGE=y
+CONFIG_MMC=y
+CONFIG_MMC_ARMMMCI=y
+CONFIG_DMADEVICES=y
+CONFIG_PL330_DMA=y
+CONFIG_VIRT_DRIVERS=y
+CONFIG_VIRTIO_MMIO=y
+CONFIG_MAILBOX=y
+CONFIG_PL320_MBOX=y
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT4_FS=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=y
+CONFIG_CUSE=y
+CONFIG_FSCACHE=y
+CONFIG_FSCACHE_STATS=y
+CONFIG_FSCACHE_HISTOGRAM=y
+CONFIG_FSCACHE_DEBUG=y
+CONFIG_FSCACHE_OBJECT_LIST=y
+CONFIG_CACHEFILES=y
+CONFIG_CACHEFILES_HISTOGRAM=y
+CONFIG_ISO9660_FS=y
+CONFIG_UDF_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_NTFS_FS=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_CRAMFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NFS_FSCACHE=y
+CONFIG_SUNRPC_DEBUG=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_FS=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_RCU_CPU_STALL_TIMEOUT=60
+# CONFIG_FTRACE is not set
+CONFIG_DEBUG_USER=y
+CONFIG_CRYPTO_GCM=y
+CONFIG_CRYPTO_XCBC=y
+CONFIG_CRYPTO_SHA256=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_VIRTUALIZATION=y
+CONFIG_KVM=y
diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs/bcm_defconfig
index 3df3f3a79ef4..9d13dae99125 100644
--- a/arch/arm/configs/bcm_defconfig
+++ b/arch/arm/configs/bcm_defconfig
@@ -91,6 +91,7 @@ CONFIG_FB=y
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 CONFIG_LCD_CLASS_DEVICE=y
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_PWM=y
 # CONFIG_USB_SUPPORT is not set
 CONFIG_MMC=y
 CONFIG_MMC_UNSAFE_RESUME=y
@@ -104,6 +105,8 @@ CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_TIMER=y
 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_PWM=y
+CONFIG_PWM_BCM_KONA=y
 CONFIG_EXT4_FS=y
 CONFIG_EXT4_FS_POSIX_ACL=y
 CONFIG_EXT4_FS_SECURITY=y
diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig
index 2a282c051cfd..2f8ff65e3ef1 100644
--- a/arch/arm/configs/davinci_all_defconfig
+++ b/arch/arm/configs/davinci_all_defconfig
@@ -160,7 +160,6 @@ CONFIG_USB=m
 CONFIG_USB_DEVICEFS=y
 CONFIG_USB_MON=m
 CONFIG_USB_MUSB_HDRC=m
-CONFIG_USB_MUSB_PERIPHERAL=y
 CONFIG_USB_GADGET_MUSB_HDRC=y
 CONFIG_MUSB_PIO_ONLY=y
 CONFIG_USB_STORAGE=m
diff --git a/arch/arm/configs/dove_defconfig b/arch/arm/configs/dove_defconfig
index f15955144175..701677f9248c 100644
--- a/arch/arm/configs/dove_defconfig
+++ b/arch/arm/configs/dove_defconfig
@@ -37,7 +37,6 @@ CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_MTD=y
 CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_CFI=y
 CONFIG_MTD_JEDECPROBE=y
@@ -48,6 +47,7 @@ CONFIG_MTD_CFI_INTELEXT=y
 CONFIG_MTD_CFI_STAA=y
 CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_M25P80=y
+CONFIG_MTD_SPI_NOR=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=1
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index f1aeb7d72712..bada59d93b67 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -80,6 +80,7 @@ CONFIG_MTD_UBI=y
 CONFIG_EEPROM_AT24=y
 CONFIG_EEPROM_AT25=y
 CONFIG_ATA=y
+CONFIG_BLK_DEV_SD=y
 CONFIG_PATA_IMX=y
 CONFIG_NETDEVICES=y
 CONFIG_CS89x0=y
@@ -153,8 +154,12 @@ CONFIG_USB_HID=m
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_MXC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_NOP_USB_XCEIV=y
 CONFIG_MMC=y
-CONFIG_MMC_UNSAFE_RESUME=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_PLTFM=y
 CONFIG_MMC_SDHCI_ESDHC_IMX=y
@@ -177,7 +182,6 @@ CONFIG_RTC_DRV_MXC=y
 CONFIG_DMADEVICES=y
 CONFIG_IMX_SDMA=y
 CONFIG_IMX_DMA=y
-CONFIG_COMMON_CLK_DEBUG=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index 09e974392fa1..ef8815327e5b 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -1,4 +1,3 @@
-# CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_KERNEL_LZO=y
 CONFIG_SYSVIPC=y
 CONFIG_NO_HZ=y
@@ -33,7 +32,6 @@ CONFIG_MACH_PCM043=y
 CONFIG_MACH_MX35_3DS=y
 CONFIG_MACH_VPR200=y
 CONFIG_MACH_IMX51_DT=y
-CONFIG_MACH_EUKREA_CPUIMX51SD=y
 CONFIG_SOC_IMX50=y
 CONFIG_SOC_IMX53=y
 CONFIG_SOC_IMX6Q=y
@@ -46,7 +44,11 @@ CONFIG_VMSPLIT_2G=y
 CONFIG_PREEMPT_VOLUNTARY=y
 CONFIG_AEABI=y
 CONFIG_HIGHMEM=y
+CONFIG_CMA=y
 CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+CONFIG_ARM_IMX6Q_CPUFREQ=y
 CONFIG_VFP=y
 CONFIG_NEON=y
 CONFIG_BINFMT_MISC=m
@@ -72,6 +74,7 @@ CONFIG_RFKILL_INPUT=y
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
 # CONFIG_STANDALONE is not set
+CONFIG_DMA_CMA=y
 CONFIG_IMX_WEIM=y
 CONFIG_CONNECTOR=y
 CONFIG_MTD=y
@@ -89,6 +92,7 @@ CONFIG_MTD_SST25L=y
 CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_GPMI_NAND=y
 CONFIG_MTD_NAND_MXC=y
+CONFIG_MTD_SPI_NOR=y
 CONFIG_MTD_UBI=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
@@ -183,6 +187,7 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y
 CONFIG_VIDEO_CODA=y
 CONFIG_SOC_CAMERA_OV2640=y
 CONFIG_DRM=y
+CONFIG_DRM_PANEL_SIMPLE=y
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 CONFIG_LCD_CLASS_DEVICE=y
 CONFIG_LCD_L4F00242T03=y
@@ -215,7 +220,6 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_ETH=m
 CONFIG_USB_MASS_STORAGE=m
 CONFIG_MMC=y
-CONFIG_MMC_UNSAFE_RESUME=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_PLTFM=y
 CONFIG_MMC_SDHCI_ESDHC_IMX=y
@@ -245,7 +249,7 @@ CONFIG_DRM_IMX_TVE=y
 CONFIG_DRM_IMX_LDB=y
 CONFIG_DRM_IMX_IPUV3_CORE=y
 CONFIG_DRM_IMX_IPUV3=y
-CONFIG_COMMON_CLK_DEBUG=y
+CONFIG_DRM_IMX_HDMI=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_PWM=y
 CONFIG_PWM_IMX=y
diff --git a/arch/arm/configs/kirkwood_defconfig b/arch/arm/configs/kirkwood_defconfig
index 2e762d94e94b..b9e480c10b10 100644
--- a/arch/arm/configs/kirkwood_defconfig
+++ b/arch/arm/configs/kirkwood_defconfig
@@ -61,6 +61,7 @@ CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_M25P80=y
 CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_ORION=y
+CONFIG_MTD_SPI_NOR=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_EEPROM_AT24=y
 # CONFIG_SCSI_PROC_FS is not set
diff --git a/arch/arm/configs/msm_defconfig b/arch/arm/configs/msm_defconfig
index c5858b9eb516..7f52dad97f51 100644
--- a/arch/arm/configs/msm_defconfig
+++ b/arch/arm/configs/msm_defconfig
@@ -17,21 +17,14 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_MODULE_FORCE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 CONFIG_PARTITION_ADVANCED=y
-CONFIG_ARCH_MSM_DT=y
+CONFIG_ARCH_MSM=y
-CONFIG_ARCH_MSM8X60=y
-CONFIG_ARCH_MSM8960=y
-CONFIG_ARCH_MSM8974=y
-CONFIG_SMP=y
 CONFIG_PREEMPT=y
 CONFIG_AEABI=y
 CONFIG_HIGHMEM=y
 CONFIG_HIGHPTE=y
 CONFIG_CLEANCACHE=y
-CONFIG_CC_STACKPROTECTOR=y
+CONFIG_AUTO_ZRELADDR=y
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
 CONFIG_VFP=y
-CONFIG_NEON=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 CONFIG_NET=y
 CONFIG_PACKET=y
@@ -79,16 +72,12 @@ CONFIG_SERIO_LIBPS2=y
 # CONFIG_LEGACY_PTYS is not set
 CONFIG_SERIAL_MSM=y
 CONFIG_SERIAL_MSM_CONSOLE=y
-CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM is not set
-CONFIG_HW_RANDOM_MSM=y
 CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_SPI=y
 CONFIG_DEBUG_GPIO=y
 CONFIG_GPIO_SYSFS=y
-CONFIG_POWER_SUPPLY=y
-CONFIG_POWER_RESET=y
-CONFIG_POWER_RESET_MSM=y
 CONFIG_THERMAL=y
 CONFIG_REGULATOR=y
 CONFIG_MEDIA_SUPPORT=y
@@ -100,25 +89,17 @@ CONFIG_SND_DYNAMIC_MINORS=y
 # CONFIG_SND_SPI is not set
 # CONFIG_SND_USB is not set
 CONFIG_SND_SOC=y
-CONFIG_HID_BATTERY_STRENGTH=y
 CONFIG_USB=y
 CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
 CONFIG_USB_MON=y
 CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_MSM=y
 CONFIG_USB_ACM=y
 CONFIG_USB_SERIAL=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DEBUG_FILES=y
 CONFIG_USB_GADGET_VBUS_DRAW=500
-CONFIG_NEW_LEDS=y
 CONFIG_RTC_CLASS=y
 CONFIG_STAGING=y
-CONFIG_COMMON_CLK_QCOM=y
-CONFIG_MSM_GCC_8660=y
-CONFIG_MSM_MMCC_8960=y
-CONFIG_MSM_MMCC_8974=y
-CONFIG_MSM_IOMMU=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
 CONFIG_EXT3_FS=y
diff --git a/arch/arm/configs/multi_v5_defconfig b/arch/arm/configs/multi_v5_defconfig
index aa3dfb084fed..5ebfa8bf8509 100644
--- a/arch/arm/configs/multi_v5_defconfig
+++ b/arch/arm/configs/multi_v5_defconfig
@@ -11,7 +11,6 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_ARCH_MULTI_V7 is not set
 CONFIG_ARCH_MVEBU=y
 CONFIG_MACH_KIRKWOOD=y
-CONFIG_MACH_T5325=y
 CONFIG_ARCH_MXC=y
 CONFIG_MACH_IMX25_DT=y
 CONFIG_MACH_IMX27_DT=y
@@ -108,6 +107,8 @@ CONFIG_SND=y
 CONFIG_SND_SOC=y
 CONFIG_SND_KIRKWOOD_SOC=y
 CONFIG_SND_KIRKWOOD_SOC_T5325=y
+CONFIG_SND_SOC_ALC5623=y
+CONFIG_SND_SIMPLE_CARD=y
 # CONFIG_ABX500_CORE is not set
 CONFIG_REGULATOR=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index d4e8a47a2f7c..e2d62048e198 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -5,9 +5,11 @@ CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_EMBEDDED=y
+CONFIG_PERF_EVENTS=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_PARTITION_ADVANCED=y
+CONFIG_ARCH_VIRT=y
 CONFIG_ARCH_MVEBU=y
 CONFIG_MACH_ARMADA_370=y
 CONFIG_MACH_ARMADA_375=y
@@ -15,12 +17,12 @@ CONFIG_MACH_ARMADA_38X=y
 CONFIG_MACH_ARMADA_XP=y
 CONFIG_MACH_DOVE=y
 CONFIG_ARCH_BCM=y
-CONFIG_ARCH_BCM_5301X=y
 CONFIG_ARCH_BCM_MOBILE=y
+CONFIG_ARCH_BCM_5301X=y
 CONFIG_ARCH_BERLIN=y
 CONFIG_MACH_BERLIN_BG2=y
 CONFIG_MACH_BERLIN_BG2CD=y
-CONFIG_GPIO_PCA953X=y
+CONFIG_MACH_BERLIN_BG2Q=y
 CONFIG_ARCH_HIGHBANK=y
 CONFIG_ARCH_HI3xxx=y
 CONFIG_ARCH_KEYSTONE=y
@@ -34,8 +36,8 @@ CONFIG_ARCH_OMAP3=y
 CONFIG_ARCH_OMAP4=y
 CONFIG_SOC_OMAP5=y
 CONFIG_SOC_AM33XX=y
-CONFIG_SOC_DRA7XX=y
 CONFIG_SOC_AM43XX=y
+CONFIG_SOC_DRA7XX=y
 CONFIG_ARCH_QCOM=y
 CONFIG_ARCH_MSM8X60=y
 CONFIG_ARCH_MSM8960=y
@@ -47,6 +49,7 @@ CONFIG_ARCH_SPEAR13XX=y
 CONFIG_MACH_SPEAR1310=y
 CONFIG_MACH_SPEAR1340=y
 CONFIG_ARCH_STI=y
+CONFIG_ARCH_EXYNOS=y
 CONFIG_ARCH_SUNXI=y
 CONFIG_ARCH_SIRF=y
 CONFIG_ARCH_TEGRA=y
@@ -61,7 +64,6 @@ CONFIG_MACH_SNOWBALL=y
 CONFIG_MACH_UX500_DT=y
 CONFIG_ARCH_VEXPRESS=y
 CONFIG_ARCH_VEXPRESS_CA9X4=y
-CONFIG_ARCH_VIRT=y
 CONFIG_ARCH_WM8850=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_NEON=y
@@ -71,6 +73,7 @@ CONFIG_PCI_MSI=y
 CONFIG_PCI_MVEBU=y
 CONFIG_PCI_TEGRA=y
 CONFIG_SMP=y
+CONFIG_NR_CPUS=8
 CONFIG_HIGHPTE=y
 CONFIG_CMA=y
 CONFIG_ARM_APPENDED_DTB=y
@@ -96,6 +99,11 @@ CONFIG_INET6_IPCOMP=m
 CONFIG_IPV6_MIP6=m
 CONFIG_IPV6_TUNNEL=m
 CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_CAN=y
+CONFIG_CAN_RAW=y
+CONFIG_CAN_BCM=y
+CONFIG_CAN_DEV=y
+CONFIG_CAN_MCP251X=y
 CONFIG_CFG80211=m
 CONFIG_MAC80211=m
 CONFIG_RFKILL=y
@@ -112,15 +120,19 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_ICS932S401=y
 CONFIG_APDS9802ALS=y
 CONFIG_ISL29003=y
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_SUNXI_SID=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_BLK_DEV_SR=y
 CONFIG_SCSI_MULTI_LUN=y
 CONFIG_ATA=y
 CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_AHCI_SUNXI=y
 CONFIG_SATA_HIGHBANK=y
 CONFIG_SATA_MV=y
 CONFIG_NETDEVICES=y
 CONFIG_SUN4I_EMAC=y
+CONFIG_MACB=y
 CONFIG_NET_CALXEDA_XGMAC=y
 CONFIG_MV643XX_ETH=y
 CONFIG_MVNETA=y
@@ -153,6 +165,8 @@ CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_DW=y
 CONFIG_SERIAL_AMBA_PL011=y
 CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_SAMSUNG=y
+CONFIG_SERIAL_SAMSUNG_CONSOLE=y
 CONFIG_SERIAL_SIRFSOC=y
 CONFIG_SERIAL_SIRFSOC_CONSOLE=y
 CONFIG_SERIAL_TEGRA=y
@@ -175,7 +189,9 @@ CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_MUX=y
 CONFIG_I2C_MUX_PCA954x=y
 CONFIG_I2C_MUX_PINCTRL=y
+CONFIG_I2C_CADENCE=y
 CONFIG_I2C_DESIGNWARE_PLATFORM=y
+CONFIG_I2C_EXYNOS5=y
 CONFIG_I2C_MV64XXX=y
 CONFIG_I2C_SIRF=y
 CONFIG_I2C_TEGRA=y
@@ -184,6 +200,8 @@ CONFIG_SPI_OMAP24XX=y
 CONFIG_SPI_ORION=y
 CONFIG_SPI_PL022=y
 CONFIG_SPI_SIRF=y
+CONFIG_SPI_SUN4I=y
+CONFIG_SPI_SUN6I=y
 CONFIG_SPI_TEGRA114=y
 CONFIG_SPI_TEGRA20_SFLASH=y
 CONFIG_SPI_TEGRA20_SLINK=y
@@ -191,6 +209,8 @@ CONFIG_PINCTRL_AS3722=y
 CONFIG_PINCTRL_PALMAS=y
 CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_GENERIC_PLATFORM=y
+CONFIG_GPIO_DWAPB=y
+CONFIG_GPIO_PCA953X=y
 CONFIG_GPIO_PCA953X_IRQ=y
 CONFIG_GPIO_TWL4030=y
 CONFIG_GPIO_PALMAS=y
@@ -200,16 +220,19 @@ CONFIG_BATTERY_SBS=y
 CONFIG_CHARGER_TPS65090=y
 CONFIG_POWER_RESET_AS3722=y
 CONFIG_POWER_RESET_GPIO=y
+CONFIG_POWER_RESET_SUN6I=y
 CONFIG_SENSORS_LM90=y
 CONFIG_THERMAL=y
 CONFIG_DOVE_THERMAL=y
 CONFIG_ARMADA_THERMAL=y
 CONFIG_WATCHDOG=y
 CONFIG_ORION_WATCHDOG=y
+CONFIG_SUNXI_WATCHDOG=y
 CONFIG_MFD_AS3722=y
 CONFIG_MFD_CROS_EC=y
 CONFIG_MFD_CROS_EC_SPI=y
 CONFIG_MFD_MAX8907=y
+CONFIG_MFD_SEC_CORE=y
 CONFIG_MFD_PALMAS=y
 CONFIG_MFD_TPS65090=y
 CONFIG_MFD_TPS6586X=y
@@ -220,6 +243,8 @@ CONFIG_REGULATOR_AS3722=y
 CONFIG_REGULATOR_GPIO=y
 CONFIG_REGULATOR_MAX8907=y
 CONFIG_REGULATOR_PALMAS=y
+CONFIG_REGULATOR_S2MPS11=y
+CONFIG_REGULATOR_S5M8767=y
 CONFIG_REGULATOR_TPS51632=y
 CONFIG_REGULATOR_TPS62360=y
 CONFIG_REGULATOR_TPS65090=y
@@ -254,10 +279,13 @@ CONFIG_SND_SOC_TEGRA_ALC5632=y
 CONFIG_SND_SOC_TEGRA_MAX98090=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_MVEBU=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_TEGRA=y
 CONFIG_USB_EHCI_HCD_PLATFORM=y
 CONFIG_USB_ISP1760_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PLATFORM=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_CHIPIDEA=y
 CONFIG_USB_CHIPIDEA_HOST=y
@@ -272,20 +300,28 @@ CONFIG_MMC=y
 CONFIG_MMC_BLOCK_MINORS=16
 CONFIG_MMC_ARMMMCI=y
 CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_OF_ARASAN=y
 CONFIG_MMC_SDHCI_ESDHC_IMX=y
-CONFIG_MMC_SDHCI_TEGRA=y
 CONFIG_MMC_SDHCI_DOVE=y
+CONFIG_MMC_SDHCI_TEGRA=y
+CONFIG_MMC_SDHCI_PXAV3=y
 CONFIG_MMC_SDHCI_SPEAR=y
+CONFIG_MMC_SDHCI_S3C=y
+CONFIG_MMC_SDHCI_S3C_DMA=y
 CONFIG_MMC_SDHCI_BCM_KONA=y
 CONFIG_MMC_OMAP=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MMC_MVSDIO=y
+CONFIG_MMC_SUNXI=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_EXYNOS=y
 CONFIG_EDAC=y
 CONFIG_EDAC_MM_EDAC=y
 CONFIG_EDAC_HIGHBANK_MC=y
 CONFIG_EDAC_HIGHBANK_L2=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AS3722=y
+CONFIG_RTC_DRV_DS1307=y
 CONFIG_RTC_DRV_MAX8907=y
 CONFIG_RTC_DRV_PALMAS=y
 CONFIG_RTC_DRV_TWL4030=y
@@ -294,6 +330,7 @@ CONFIG_RTC_DRV_TPS65910=y
 CONFIG_RTC_DRV_EM3027=y
 CONFIG_RTC_DRV_PL031=y
 CONFIG_RTC_DRV_VT8500=y
+CONFIG_RTC_DRV_SUNXI=y
 CONFIG_RTC_DRV_MV=y
 CONFIG_RTC_DRV_TEGRA=y
 CONFIG_DMADEVICES=y
@@ -328,6 +365,7 @@ CONFIG_PWM=y
 CONFIG_PWM_TEGRA=y
 CONFIG_PWM_VT8500=y
 CONFIG_OMAP_USB2=y
+CONFIG_PHY_SUN4I_USB=y
 CONFIG_EXT4_FS=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
diff --git a/arch/arm/configs/mvebu_v5_defconfig b/arch/arm/configs/mvebu_v5_defconfig
index 36484a37a1ca..27c732fdf21e 100644
--- a/arch/arm/configs/mvebu_v5_defconfig
+++ b/arch/arm/configs/mvebu_v5_defconfig
@@ -1,4 +1,5 @@
 CONFIG_SYSVIPC=y
+CONFIG_FHANDLE=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_LOG_BUF_SHIFT=19
@@ -11,7 +12,6 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_ARCH_MULTI_V7 is not set
 CONFIG_ARCH_MVEBU=y
 CONFIG_MACH_KIRKWOOD=y
-CONFIG_MACH_T5325=y
 # CONFIG_CPU_FEROCEON_OLD_ID is not set
 CONFIG_PCI_MVEBU=y
 CONFIG_PREEMPT=y
@@ -50,6 +50,7 @@ CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_M25P80=y
 CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_ORION=y
+CONFIG_MTD_SPI_NOR=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_EEPROM_AT24=y
 # CONFIG_SCSI_PROC_FS is not set
@@ -100,6 +101,8 @@ CONFIG_SND=y
 CONFIG_SND_SOC=y
 CONFIG_SND_KIRKWOOD_SOC=y
 CONFIG_SND_KIRKWOOD_SOC_T5325=y
+CONFIG_SND_SOC_ALC5623=y
+CONFIG_SND_SIMPLE_CARD=y
 CONFIG_REGULATOR=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_HID_DRAGONRISE=y
diff --git a/arch/arm/configs/mvebu_v7_defconfig b/arch/arm/configs/mvebu_v7_defconfig
index a34713d8db9f..e11170e37442 100644
--- a/arch/arm/configs/mvebu_v7_defconfig
+++ b/arch/arm/configs/mvebu_v7_defconfig
@@ -1,5 +1,6 @@
 CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
+CONFIG_FHANDLE=y
 CONFIG_IRQ_DOMAIN_DEBUG=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -17,6 +18,7 @@ CONFIG_NEON=y
 # CONFIG_CACHE_L2X0 is not set
 # CONFIG_SWP_EMULATE is not set
 CONFIG_PCI=y
+CONFIG_PCI_MSI=y
 CONFIG_PCI_MVEBU=y
 CONFIG_SMP=y
 CONFIG_AEABI=y
@@ -29,6 +31,9 @@ CONFIG_ARM_ATAG_DTB_COMPAT=y
 CONFIG_VFP=y
 CONFIG_NET=y
 CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
 CONFIG_BT=y
 CONFIG_BT_MRVL=y
 CONFIG_BT_MRVL_SDIO=y
@@ -36,6 +41,7 @@ CONFIG_CFG80211=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_BLK_DEV_SD=y
 CONFIG_ATA=y
+CONFIG_AHCI_MVEBU=y
 CONFIG_SATA_MV=y
 CONFIG_NETDEVICES=y
 CONFIG_MVNETA=y
@@ -53,6 +59,7 @@ CONFIG_I2C_MV64XXX=y
 CONFIG_MTD=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_M25P80=y
+CONFIG_MTD_SPI_NOR=y
 CONFIG_MTD_CFI=y
 CONFIG_MTD_CFI_INTELEXT=y
 CONFIG_MTD_CFI_AMDSTD=y
@@ -78,7 +85,9 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_ROOT_HUB_TT=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_MVEBU=y
 CONFIG_MMC=y
+CONFIG_MMC_SDHCI_PXAV3=y
 CONFIG_MMC_MVSDIO=y
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_GPIO=y
@@ -103,6 +112,8 @@ CONFIG_UDF_FS=m
 CONFIG_MSDOS_FS=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
+CONFIG_NFS_FS=y
+CONFIG_ROOT_NFS=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_CODEPAGE_850=y
 CONFIG_NLS_ISO8859_1=y
diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig
index 6150108e15de..a9f992335eb2 100644
--- a/arch/arm/configs/mxs_defconfig
+++ b/arch/arm/configs/mxs_defconfig
@@ -26,7 +26,6 @@ CONFIG_ARCH_MXS=y
 # CONFIG_ARM_THUMB is not set
 CONFIG_PREEMPT_VOLUNTARY=y
 CONFIG_AEABI=y
-CONFIG_FPE_NWFPE=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -51,10 +50,10 @@ CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_DATAFLASH=y
 CONFIG_MTD_M25P80=y
-# CONFIG_M25PXX_USE_FAST_READ is not set
 CONFIG_MTD_SST25L=y
 CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_GPMI_NAND=y
+CONFIG_MTD_SPI_NOR=y
 CONFIG_MTD_UBI=y
 # CONFIG_BLK_DEV is not set
 CONFIG_EEPROM_AT24=y
@@ -120,7 +119,6 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_ETH=m
 CONFIG_USB_MASS_STORAGE=m
 CONFIG_MMC=y
-CONFIG_MMC_UNSAFE_RESUME=y
 CONFIG_MMC_MXS=y
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
@@ -138,7 +136,6 @@ CONFIG_DMADEVICES=y
 CONFIG_MXS_DMA=y
 CONFIG_STAGING=y
 CONFIG_MXS_LRADC=y
-CONFIG_COMMON_CLK_DEBUG=y
 CONFIG_IIO=y
 CONFIG_IIO_SYSFS_TRIGGER=y
 CONFIG_PWM=y
@@ -180,7 +177,7 @@ CONFIG_BLK_DEV_IO_TRACE=y
 CONFIG_STRICT_DEVMEM=y
 CONFIG_DEBUG_USER=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
+CONFIG_CRYPTO_DEV_MXS_DCP=y
 CONFIG_CRC_ITU_T=m
 CONFIG_CRC7=m
 CONFIG_FONTS=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index a4e8d017f25b..28f3b6e3b589 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -21,6 +21,8 @@ CONFIG_MODULE_SRCVERSION_ALL=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_ARCH_MULTI_V6=y
+CONFIG_POWER_AVS_OMAP=y
+CONFIG_POWER_AVS_OMAP_CLASS3=y
 CONFIG_OMAP_RESET_CLOCKS=y
 CONFIG_OMAP_MUX_DEBUG=y
 CONFIG_ARCH_OMAP2=y
@@ -42,6 +44,7 @@ CONFIG_ARM_ATAG_DTB_COMPAT=y
 CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO2,115200"
 CONFIG_KEXEC=y
 CONFIG_FPE_NWFPE=y
+CONFIG_CPU_IDLE=y
 CONFIG_BINFMT_MISC=y
 CONFIG_PM_DEBUG=y
 CONFIG_NET=y
@@ -159,11 +162,14 @@ CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_TWL4030=y
 CONFIG_W1=y
 CONFIG_POWER_SUPPLY=y
+CONFIG_POWER_AVS=y
 CONFIG_SENSORS_LM75=m
 CONFIG_THERMAL=y
 CONFIG_THERMAL_GOV_FAIR_SHARE=y
 CONFIG_THERMAL_GOV_USER_SPACE=y
+CONFIG_CPU_THERMAL=y
 CONFIG_TI_SOC_THERMAL=y
+CONFIG_TI_THERMAL=y
 CONFIG_OMAP4_THERMAL=y
 CONFIG_OMAP5_THERMAL=y
 CONFIG_DRA752_THERMAL=y
@@ -177,6 +183,7 @@ CONFIG_MFD_TPS65910=y
 CONFIG_TWL6040_CORE=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_REGULATOR_PALMAS=y
+CONFIG_REGULATOR_TI_ABB=y
 CONFIG_REGULATOR_TPS65023=y
 CONFIG_REGULATOR_TPS6507X=y
 CONFIG_REGULATOR_TPS65217=y
@@ -239,6 +246,7 @@ CONFIG_SDIO_UART=y
 CONFIG_MMC_OMAP=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
 CONFIG_LEDS_GPIO=y
 CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_TIMER=y
diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig
new file mode 100644
index 000000000000..42ebd72799e6
--- /dev/null
+++ b/arch/arm/configs/qcom_defconfig
@@ -0,0 +1,165 @@
+CONFIG_SYSVIPC=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_EMBEDDED=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_COMPAT_BRK is not set
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_KPROBES=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_ARCH_QCOM=y
+CONFIG_ARCH_MSM8X60=y
+CONFIG_ARCH_MSM8960=y
+CONFIG_ARCH_MSM8974=y
+CONFIG_SMP=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+CONFIG_HIGHMEM=y
+CONFIG_HIGHPTE=y
+CONFIG_CLEANCACHE=y
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_IPV6 is not set
+CONFIG_CFG80211=y
+CONFIG_RFKILL=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_MTD=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_M25P80=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_SCSI=y
+CONFIG_SCSI_TGT=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_CHR_DEV_SCH=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=y
+CONFIG_MDIO_BITBANG=y
+CONFIG_MDIO_GPIO=y
+CONFIG_SLIP=y
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLIP_MODE_SLIP6=y
+CONFIG_USB_USBNET=y
+# CONFIG_USB_NET_AX8817X is not set
+# CONFIG_USB_NET_ZAURUS is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_MOUSE_PS2 is not set
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_MSM=y
+CONFIG_SERIAL_MSM_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_MSM=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_QUP=y
+CONFIG_SPI=y
+CONFIG_SPI_QUP=y
+CONFIG_SPMI=y
+CONFIG_PINCTRL_APQ8064=y
+CONFIG_PINCTRL_IPQ8064=y
+CONFIG_PINCTRL_MSM8X74=y
+CONFIG_DEBUG_GPIO=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_MSM=y
+CONFIG_THERMAL=y
+CONFIG_REGULATOR=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_FB=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_DYNAMIC_MINORS=y
+# CONFIG_SND_ARM is not set
+# CONFIG_SND_SPI is not set
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=y
+CONFIG_HID_BATTERY_STRENGTH=y
+CONFIG_USB=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_MON=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_ACM=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DEBUG_FILES=y
+CONFIG_USB_GADGET_VBUS_DRAW=500
+CONFIG_MMC=y
+CONFIG_MMC_BLOCK_MINORS=16
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_MSM=y
+CONFIG_RTC_CLASS=y
+CONFIG_DMADEVICES=y
+CONFIG_QCOM_BAM_DMA=y
+CONFIG_STAGING=y
+CONFIG_QCOM_GSBI=y
+CONFIG_COMMON_CLK_QCOM=y
+CONFIG_MSM_GCC_8660=y
+CONFIG_MSM_MMCC_8960=y
+CONFIG_MSM_MMCC_8974=y
+CONFIG_MSM_IOMMU=y
+CONFIG_GENERIC_PHY=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT4_FS=y
+CONFIG_FUSE_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_CIFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_UTF8=y
+CONFIG_PRINTK_TIME=y
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_DEBUG_INFO=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_LOCKUP_DETECTOR=y
+# CONFIG_DETECT_HUNG_TASK is not set
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_TIMER_STATS=y
diff --git a/arch/arm/configs/realview-smp_defconfig b/arch/arm/configs/realview-smp_defconfig
index abe61bf379d2..1da5d9e48224 100644
--- a/arch/arm/configs/realview-smp_defconfig
+++ b/arch/arm/configs/realview-smp_defconfig
@@ -76,8 +76,10 @@ CONFIG_MMC=y
 CONFIG_MMC_ARMMMCI=y
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_VERSATILE=y
 CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_CPU=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_DS1307=y
 CONFIG_RTC_DRV_PL031=y
diff --git a/arch/arm/configs/realview_defconfig b/arch/arm/configs/realview_defconfig
index 7079cbe898a8..d02e9d911bb7 100644
--- a/arch/arm/configs/realview_defconfig
+++ b/arch/arm/configs/realview_defconfig
@@ -75,8 +75,10 @@ CONFIG_MMC=y
 CONFIG_MMC_ARMMMCI=y
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_VERSATILE=y
 CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_CPU=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_DS1307=y
 CONFIG_RTC_DRV_PL031=y
diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
index 869fa18ebeb2..4414990521d3 100644
--- a/arch/arm/configs/sama5_defconfig
+++ b/arch/arm/configs/sama5_defconfig
@@ -137,6 +137,8 @@ CONFIG_SPI_GPIO=y
 CONFIG_GPIO_SYSFS=y
 # CONFIG_HWMON is not set
 CONFIG_SSB=m
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_ACT8865=y
 CONFIG_FB=y
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 # CONFIG_LCD_CLASS_DEVICE is not set
diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig
index 83b07258a385..6d6437cbbc52 100644
--- a/arch/arm/configs/shmobile_defconfig
+++ b/arch/arm/configs/shmobile_defconfig
@@ -25,6 +25,7 @@ CONFIG_SCHED_MC=y
 CONFIG_HAVE_ARM_ARCH_TIMER=y
 CONFIG_NR_CPUS=8
 CONFIG_AEABI=y
+CONFIG_HIGHMEM=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_ARM_APPENDED_DTB=y
@@ -43,6 +44,7 @@ CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_MTD=y
 CONFIG_MTD_M25P80=y
+CONFIG_EEPROM_AT24=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_ATA=y
 CONFIG_SATA_RCAR=y
@@ -75,9 +77,11 @@ CONFIG_SERIAL_SH_SCI=y
 CONFIG_SERIAL_SH_SCI_NR_UARTS=20
 CONFIG_SERIAL_SH_SCI_CONSOLE=y
 CONFIG_I2C_GPIO=y
+CONFIG_I2C_SH_MOBILE=y
 CONFIG_I2C_RCAR=y
 CONFIG_SPI=y
 CONFIG_SPI_RSPI=y
+CONFIG_SPI_SH_MSIOF=y
 CONFIG_GPIO_EM=y
 CONFIG_GPIO_RCAR=y
 # CONFIG_HWMON is not set
@@ -88,10 +92,14 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_REGULATOR_GPIO=y
 CONFIG_MEDIA_SUPPORT=y
 CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_CONTROLLER=y
+CONFIG_VIDEO_V4L2_SUBDEV_API=y
 CONFIG_V4L_PLATFORM_DRIVERS=y
 CONFIG_SOC_CAMERA=y
 CONFIG_SOC_CAMERA_PLATFORM=y
 CONFIG_VIDEO_RCAR_VIN=y
+CONFIG_V4L_MEM2MEM_DRIVERS=y
+CONFIG_VIDEO_RENESAS_VSP1=y
 # CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
 CONFIG_VIDEO_ADV7180=y
 CONFIG_DRM=y
@@ -100,7 +108,13 @@ CONFIG_SOUND=y
 CONFIG_SND=y
 CONFIG_SND_SOC=y
 CONFIG_SND_SOC_RCAR=y
+CONFIG_USB=y
 CONFIG_USB_RCAR_GEN2_PHY=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_RENESAS_USBHS=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_RENESAS_USBHS_UDC=y
 CONFIG_MMC=y
 CONFIG_MMC_SDHI=y
 CONFIG_MMC_SH_MMCIF=y
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index b5df4a511b0a..7209bfd62074 100644
--- a/arch/arm/configs/sunxi_defconfig
+++ b/arch/arm/configs/sunxi_defconfig
@@ -1,13 +1,17 @@
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_BLK_DEV_INITRD=y
+CONFIG_PERF_EVENTS=y
 CONFIG_ARCH_SUNXI=y
 CONFIG_SMP=y
 CONFIG_AEABI=y
 CONFIG_HIGHMEM=y
 CONFIG_HIGHPTE=y
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
 CONFIG_VFP=y
 CONFIG_NEON=y
+CONFIG_PM_RUNTIME=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -25,8 +29,12 @@ CONFIG_IP_PNP_BOOTP=y
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_EEPROM_SUNXI_SID=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_ATA=y
+CONFIG_AHCI_SUNXI=y
 CONFIG_NETDEVICES=y
 CONFIG_SUN4I_EMAC=y
+# CONFIG_NET_VENDOR_ARC is not set
 # CONFIG_NET_CADENCE is not set
 # CONFIG_NET_VENDOR_BROADCOM is not set
 # CONFIG_NET_VENDOR_CIRRUS is not set
@@ -34,38 +42,66 @@ CONFIG_SUN4I_EMAC=y
 # CONFIG_NET_VENDOR_INTEL is not set
 # CONFIG_NET_VENDOR_MARVELL is not set
 # CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
 # CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
 # CONFIG_NET_VENDOR_SEEQ is not set
 # CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
+CONFIG_STMMAC_ETH=y
+# CONFIG_NET_VENDOR_VIA is not set
 # CONFIG_NET_VENDOR_WIZNET is not set
 # CONFIG_WLAN is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=8
 CONFIG_SERIAL_8250_RUNTIME_UARTS=8
 CONFIG_SERIAL_8250_DW=y
+CONFIG_SERIAL_OF_PLATFORM=y
+# CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
-# CONFIG_I2C_COMPAT is not set
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_MV64XXX=y
 CONFIG_SPI=y
+CONFIG_SPI_SUN4I=y
 CONFIG_SPI_SUN6I=y
 CONFIG_GPIO_SYSFS=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_SUN6I=y
 # CONFIG_HWMON is not set
 CONFIG_WATCHDOG=y
 CONFIG_SUNXI_WATCHDOG=y
-# CONFIG_USB_SUPPORT is not set
+CONFIG_MFD_AXP20X=y
+CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
+CONFIG_REGULATOR_GPIO=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_HCD_PLATFORM=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PLATFORM=y
+CONFIG_MMC=y
+CONFIG_MMC_SUNXI=y
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
 CONFIG_LEDS_GPIO=y
 CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_COMMON_CLK_DEBUG=y
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_INTF_SYSFS is not set
+# CONFIG_RTC_INTF_PROC is not set
+CONFIG_RTC_DRV_SUNXI=y
 # CONFIG_IOMMU_SUPPORT is not set
+CONFIG_PHY_SUN4I_USB=y
+CONFIG_EXT4_FS=y
+CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
 CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
 CONFIG_ROOT_NFS=y
-CONFIG_NLS=y
 CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_FS=y
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig
index 2926281368ab..fb25e2982f64 100644
--- a/arch/arm/configs/tegra_defconfig
+++ b/arch/arm/configs/tegra_defconfig
@@ -73,6 +73,11 @@ CONFIG_INET6_IPCOMP=y
 CONFIG_IPV6_MIP6=y
 CONFIG_IPV6_TUNNEL=y
 CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_CAN=y
+CONFIG_CAN_RAW=y
+CONFIG_CAN_BCM=y
+CONFIG_CAN_DEV=y
+CONFIG_CAN_MCP251X=y
 CONFIG_BT=y
 CONFIG_BT_RFCOMM=y
 CONFIG_BT_BNEP=y
@@ -90,6 +95,7 @@ CONFIG_DMA_CMA=y
 CONFIG_CMA_SIZE_MBYTES=64
 CONFIG_MTD=y
 CONFIG_MTD_M25P80=y
+CONFIG_MTD_SPI_NOR=y
 CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_AD525X_DPOT=y
@@ -97,6 +103,7 @@ CONFIG_AD525X_DPOT_I2C=y
 CONFIG_ICS932S401=y
 CONFIG_APDS9802ALS=y
 CONFIG_ISL29003=y
+CONFIG_EEPROM_AT24=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_BLK_DEV_SR=y
@@ -112,6 +119,7 @@ CONFIG_USB_NET_SMSC95XX=y
 CONFIG_BRCMFMAC=m
 CONFIG_RT2X00=y
 CONFIG_RT2800USB=m
+CONFIG_INPUT_JOYDEV=y
 CONFIG_INPUT_EVDEV=y
 CONFIG_KEYBOARD_GPIO=y
 CONFIG_KEYBOARD_TEGRA=y
@@ -181,6 +189,7 @@ CONFIG_BACKLIGHT_CLASS_DEVICE=y
 # CONFIG_BACKLIGHT_GENERIC is not set
 CONFIG_BACKLIGHT_PWM=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
 CONFIG_LOGO=y
 CONFIG_SOUND=y
 CONFIG_SND=y
@@ -222,6 +231,7 @@ CONFIG_LEDS_TRIGGER_TRANSIENT=y
 CONFIG_LEDS_TRIGGER_CAMERA=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AS3722=y
+CONFIG_RTC_DRV_DS1307=y
 CONFIG_RTC_DRV_MAX8907=y
 CONFIG_RTC_DRV_PALMAS=y
 CONFIG_RTC_DRV_TPS6586X=y
diff --git a/arch/arm/configs/versatile_defconfig b/arch/arm/configs/versatile_defconfig
index 073541a50e23..d52b4ffe2012 100644
--- a/arch/arm/configs/versatile_defconfig
+++ b/arch/arm/configs/versatile_defconfig
@@ -61,6 +61,9 @@ CONFIG_SND_ARMAACI=m
 CONFIG_MMC=y
 CONFIG_MMC_ARMMMCI=m
 CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_VERSATILE=y
+CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_LEDS_TRIGGER_CPU=y
 CONFIG_EXT2_FS=y
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h
index 680a83e94467..7e95d8535e24 100644
--- a/arch/arm/include/asm/pci.h
+++ b/arch/arm/include/asm/pci.h
@@ -31,11 +31,6 @@ static inline int pci_proc_domain(struct pci_bus *bus)
 }
 #endif /* CONFIG_PCI_DOMAINS */
-static inline void pcibios_penalize_isa_irq(int irq, int active)
-{
-        /* We don't do dynamic PCI IRQ allocation */
-}
 /*
 * The PCI address space does equal the physical memory address space.
 * The networking and block device layers use this boolean for bounce
diff --git a/arch/arm/include/asm/trusted_foundations.h b/arch/arm/include/asm/trusted_foundations.h
index b5f7705abcb0..624e1d436c6c 100644
--- a/arch/arm/include/asm/trusted_foundations.h
+++ b/arch/arm/include/asm/trusted_foundations.h
@@ -54,7 +54,9 @@ static inline void register_trusted_foundations(
         */
        pr_err("No support for Trusted Foundations, continuing in degraded mode.\n");
        pr_err("Secondary processors as well as CPU PM will be disabled.\n");
+#if IS_ENABLED(CONFIG_SMP)
        setup_max_cpus = 0;
+#endif
        cpu_idle_poll_ctrl(true);
 }
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index 12c3a5decc60..75d95799b6e6 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -171,8 +171,9 @@ extern int __put_user_8(void *, unsigned long long);
 #define __put_user_check(x,p)                                                   \
        ({                                                              \
                unsigned long __limit = current_thread_info()->addr_limit - 1; \
+                const typeof(*(p)) __user *__tmp_p = (p);               \
                register const typeof(*(p)) __r2 asm("r2") = (x);       \
-                register const typeof(*(p)) __user *__p asm("r0") = (p);\
+                register const typeof(*(p)) __user *__p asm("r0") = __tmp_p; \
                register unsigned long __l asm("r1") = __limit;         \
                register int __e asm("r0");                             \
                switch (sizeof(*(__p))) {                               \
diff --git a/arch/arm/include/asm/xen/hypercall.h b/arch/arm/include/asm/xen/hypercall.h
index 7704e28c3483..712b50e0a6dc 100644
--- a/arch/arm/include/asm/xen/hypercall.h
+++ b/arch/arm/include/asm/xen/hypercall.h
@@ -34,6 +34,7 @@
 #define _ASM_ARM_XEN_HYPERCALL_H
 #include <xen/interface/xen.h>
+#include <xen/interface/sched.h>
 long privcmd_call(unsigned call, unsigned long a1,
                unsigned long a2, unsigned long a3,
@@ -48,6 +49,16 @@ int HYPERVISOR_memory_op(unsigned int cmd, void *arg);
 int HYPERVISOR_physdev_op(int cmd, void *arg);
 int HYPERVISOR_vcpu_op(int cmd, int vcpuid, void *extra_args);
 int HYPERVISOR_tmem_op(void *arg);
+int HYPERVISOR_multicall(struct multicall_entry *calls, uint32_t nr);
+static inline int
+HYPERVISOR_suspend(unsigned long start_info_mfn)
+{
+        struct sched_shutdown r = { .reason = SHUTDOWN_suspend };
+        /* start_info_mfn is unused on ARM */
+        return HYPERVISOR_sched_op(SCHEDOP_shutdown, &r);
+}
 static inline void
 MULTI_update_va_mapping(struct multicall_entry *mcl, unsigned long va,
@@ -63,9 +74,4 @@ MULTI_mmu_update(struct multicall_entry *mcl, struct mmu_update *req,
        BUG();
 }
-static inline int
-HYPERVISOR_multicall(void *call_list, int nr_calls)
-{
-        BUG();
-}
 #endif /* _ASM_ARM_XEN_HYPERCALL_H */
diff --git a/arch/arm/include/asm/xen/interface.h b/arch/arm/include/asm/xen/interface.h
index 1151188bcd83..50066006e6bd 100644
--- a/arch/arm/include/asm/xen/interface.h
+++ b/arch/arm/include/asm/xen/interface.h
@@ -40,6 +40,8 @@ typedef uint64_t xen_pfn_t;
 #define PRI_xen_pfn "llx"
 typedef uint64_t xen_ulong_t;
 #define PRI_xen_ulong "llx"
+typedef int64_t xen_long_t;
+#define PRI_xen_long "llx"
 /* Guest handles for primitive C types. */
 __DEFINE_GUEST_HANDLE(uchar, unsigned char);
 __DEFINE_GUEST_HANDLE(uint,  unsigned int);
diff --git a/arch/arm/include/asm/xen/page.h b/arch/arm/include/asm/xen/page.h
index cf4f3e867395..ded062f9b358 100644
--- a/arch/arm/include/asm/xen/page.h
+++ b/arch/arm/include/asm/xen/page.h
@@ -77,7 +77,6 @@ static inline xpaddr_t machine_to_phys(xmaddr_t machine)
 }
 /* VIRT <-> MACHINE conversion */
 #define virt_to_machine(v)      (phys_to_machine(XPADDR(__pa(v))))
-#define virt_to_pfn(v)          (PFN_DOWN(__pa(v)))
 #define virt_to_mfn(v)          (pfn_to_mfn(virt_to_pfn(v)))
 #define mfn_to_virt(m)          (__va(mfn_to_pfn(m) << PAGE_SHIFT))
diff --git a/arch/arm/include/debug/imx-uart.h b/arch/arm/include/debug/imx-uart.h
index 42b823cd2d22..032a316eb802 100644
--- a/arch/arm/include/debug/imx-uart.h
+++ b/arch/arm/include/debug/imx-uart.h
@@ -81,6 +81,15 @@
 #define IMX6SL_UART_BASE_ADDR(n) IMX6SL_UART##n##_BASE_ADDR
 #define IMX6SL_UART_BASE(n)     IMX6SL_UART_BASE_ADDR(n)
+#define IMX6SX_UART1_BASE_ADDR  0x02020000
+#define IMX6SX_UART2_BASE_ADDR  0x021e8000
+#define IMX6SX_UART3_BASE_ADDR  0x021ec000
+#define IMX6SX_UART4_BASE_ADDR  0x021f0000
+#define IMX6SX_UART5_BASE_ADDR  0x021f4000
+#define IMX6SX_UART6_BASE_ADDR  0x022a0000
+#define IMX6SX_UART_BASE_ADDR(n) IMX6SX_UART##n##_BASE_ADDR
+#define IMX6SX_UART_BASE(n)     IMX6SX_UART_BASE_ADDR(n)
 #define IMX_DEBUG_UART_BASE(soc) soc##_UART_BASE(CONFIG_DEBUG_IMX_UART_PORT)
 #ifdef CONFIG_DEBUG_IMX1_UART
@@ -103,6 +112,8 @@
 #define UART_PADDR      IMX_DEBUG_UART_BASE(IMX6Q)
 #elif defined(CONFIG_DEBUG_IMX6SL_UART)
 #define UART_PADDR      IMX_DEBUG_UART_BASE(IMX6SL)
+#elif defined(CONFIG_DEBUG_IMX6SX_UART)
+#define UART_PADDR      IMX_DEBUG_UART_BASE(IMX6SX)
 #endif
 #endif /* __DEBUG_IMX_UART_H */
diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S
index 9d653d475903..9ef57612811d 100644
--- a/arch/arm/include/debug/msm.S
+++ b/arch/arm/include/debug/msm.S
@@ -15,51 +15,15 @@
 *
 */
-#if defined(CONFIG_ARCH_MSM7X00A) || defined(CONFIG_ARCH_QSD8X50)
-#define MSM_UART1_PHYS        0xA9A00000
-#define MSM_UART2_PHYS        0xA9B00000
-#define MSM_UART3_PHYS        0xA9C00000
-#elif defined(CONFIG_ARCH_MSM7X30)
-#define MSM_UART1_PHYS        0xACA00000
-#define MSM_UART2_PHYS        0xACB00000
-#define MSM_UART3_PHYS        0xACC00000
-#endif
-#if defined(CONFIG_DEBUG_MSM_UART1)
-#define MSM_DEBUG_UART_BASE     0xE1000000
-#define MSM_DEBUG_UART_PHYS     MSM_UART1_PHYS
-#elif defined(CONFIG_DEBUG_MSM_UART2)
-#define MSM_DEBUG_UART_BASE     0xE1000000
-#define MSM_DEBUG_UART_PHYS     MSM_UART2_PHYS
-#elif defined(CONFIG_DEBUG_MSM_UART3)
-#define MSM_DEBUG_UART_BASE     0xE1000000
-#define MSM_DEBUG_UART_PHYS     MSM_UART3_PHYS
-#endif
-#ifdef CONFIG_DEBUG_MSM8660_UART
-#define MSM_DEBUG_UART_BASE     0xF0040000
-#define MSM_DEBUG_UART_PHYS     0x19C40000
-#endif
-#ifdef CONFIG_DEBUG_MSM8960_UART
-#define MSM_DEBUG_UART_BASE     0xF0040000
-#define MSM_DEBUG_UART_PHYS     0x16440000
-#endif
-#ifdef CONFIG_DEBUG_MSM8974_UART
-#define MSM_DEBUG_UART_BASE     0xFA71E000
-#define MSM_DEBUG_UART_PHYS     0xF991E000
-#endif
        .macro  addruart, rp, rv, tmp
-#ifdef MSM_DEBUG_UART_PHYS
+#ifdef CONFIG_DEBUG_UART_PHYS
-        ldr     \rp, =MSM_DEBUG_UART_PHYS
+        ldr     \rp, =CONFIG_DEBUG_UART_PHYS
-        ldr     \rv, =MSM_DEBUG_UART_BASE
+        ldr     \rv, =CONFIG_DEBUG_UART_VIRT
 #endif
        .endm
        .macro  senduart, rd, rx
-#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
+#ifdef CONFIG_DEBUG_QCOM_UARTDM
        @ Write the 1 character to UARTDM_TF
        str     \rd, [\rx, #0x70]
 #else
@@ -68,7 +32,7 @@
        .endm
        .macro  waituart, rd, rx
-#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
+#ifdef CONFIG_DEBUG_QCOM_UARTDM
        @ check for TX_EMT in UARTDM_SR
        ldr     \rd, [\rx, #0x08]
        tst     \rd, #0x08
diff --git a/arch/arm/include/debug/s3c24xx.S b/arch/arm/include/debug/s3c24xx.S
new file mode 100644
index 000000000000..b1f54dc4888c
--- /dev/null
+++ b/arch/arm/include/debug/s3c24xx.S
@@ -0,0 +1,46 @@
+/* arch/arm/mach-s3c2410/include/mach/debug-macro.S
+ *
+ * Debugging macro include header
+ *
+ *  Copyright (C) 1994-1999 Russell King
+ *  Copyright (C) 2005 Simtec Electronics
+ *
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#include <linux/serial_s3c.h>
+#define S3C2410_UART1_OFF (0x4000)
+        .macro addruart, rp, rv, tmp
+                ldr     \rp, = CONFIG_DEBUG_UART_PHYS
+                ldr     \rv, = CONFIG_DEBUG_UART_VIRT
+        .endm
+        .macro  fifo_full_s3c2410 rd, rx
+                ldr     \rd, [\rx, # S3C2410_UFSTAT]
+                tst     \rd, #S3C2410_UFSTAT_TXFULL
+        .endm
+        .macro fifo_level_s3c2410 rd, rx
+                ldr     \rd, [\rx, # S3C2410_UFSTAT]
+                and     \rd, \rd, #S3C2410_UFSTAT_TXMASK
+        .endm
+/* Select the correct implementation depending on the configuration. The
+ * S3C2440 will get selected by default, as these are the most widely
+ * used variants of these
+*/
+#if defined(CONFIG_DEBUG_S3C2410_UART)
+#define fifo_full  fifo_full_s3c2410
+#define fifo_level fifo_level_s3c2410
+#endif
+/* include the reset of the code which will do the work */
+#include <debug/samsung.S>
diff --git a/arch/arm/include/debug/vf.S b/arch/arm/include/debug/vf.S
index ba12cc44b2cb..b88933849a17 100644
--- a/arch/arm/include/debug/vf.S
+++ b/arch/arm/include/debug/vf.S
@@ -7,9 +7,20 @@
 *
 */
+#define VF_UART0_BASE_ADDR      0x40027000
+#define VF_UART1_BASE_ADDR      0x40028000
+#define VF_UART2_BASE_ADDR      0x40029000
+#define VF_UART3_BASE_ADDR      0x4002a000
+#define VF_UART_BASE_ADDR(n)    VF_UART##n##_BASE_ADDR
+#define VF_UART_BASE(n)         VF_UART_BASE_ADDR(n)
+#define VF_UART_PHYSICAL_BASE   VF_UART_BASE(CONFIG_DEBUG_VF_UART_PORT)
+#define VF_UART_VIRTUAL_BASE    0xfe000000
        .macro  addruart, rp, rv, tmp
-        ldr     \rp, =0x40028000        @ physical
+        ldr     \rp, =VF_UART_PHYSICAL_BASE     @ physical
-        ldr     \rv, =0xfe028000        @ virtual
+        and     \rv, \rp, #0xffffff             @ offset within 16MB section
+        add     \rv, \rv, #VF_UART_VIRTUAL_BASE
        .endm
        .macro  senduart, rd, rx
diff --git a/arch/arm/include/debug/zynq.S b/arch/arm/include/debug/zynq.S
index 0b762fafa758..bd13dedbdeff 100644
--- a/arch/arm/include/debug/zynq.S
+++ b/arch/arm/include/debug/zynq.S
@@ -20,18 +20,18 @@
 #define UART_SR_TXEMPTY         0x00000008      /* TX FIFO empty */
 #define UART0_PHYS              0xE0000000
+#define UART0_VIRT              0xF0000000
 #define UART1_PHYS              0xE0001000
-#define UART_SIZE               SZ_4K
+#define UART1_VIRT              0xF0001000
-#define UART_VIRT               0xF0001000
 #if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1)
 # define LL_UART_PADDR          UART1_PHYS
+# define LL_UART_VADDR          UART1_VIRT
 #else
 # define LL_UART_PADDR          UART0_PHYS
+# define LL_UART_VADDR          UART0_VIRT
 #endif
-#define LL_UART_VADDR           UART_VIRT
                .macro  addruart, rp, rv, tmp
                ldr     \rp, =LL_UART_PADDR     @ physical
                ldr     \rv, =LL_UART_VADDR     @ virtual
@@ -43,12 +43,14 @@
                .macro  waituart,rd,rx
 1001:           ldr     \rd, [\rx, #UART_SR_OFFSET]
+ARM_BE8(        rev     \rd, \rd )
                tst     \rd, #UART_SR_TXEMPTY
                beq     1001b
                .endm
                .macro  busyuart,rd,rx
 1002:           ldr     \rd, [\rx, #UART_SR_OFFSET]     @ get status register
+ARM_BE8(        rev     \rd, \rd )
                tst     \rd, #UART_SR_TXFULL            @
                bne     1002b                   @ wait if FIFO is full
                .endm
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index 16d43cd45619..17a26c17f7f5 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -545,6 +545,18 @@ void pci_common_init_dev(struct device *parent, struct hw_pci *hw)
                 */
                pci_bus_add_devices(bus);
        }
+        list_for_each_entry(sys, &head, node) {
+                struct pci_bus *bus = sys->bus;
+                /* Configure PCI Express settings */
+                if (bus && !pci_has_flag(PCI_PROBE_ONLY)) {
+                        struct pci_bus *child;
+                        list_for_each_entry(child, &bus->children, node)
+                                pcie_bus_configure_settings(child);
+                }
+        }
 }
 #ifndef CONFIG_PCI_HOST_ITE8152
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
index 1420725142ca..efb208de75ec 100644
--- a/arch/arm/kernel/entry-header.S
+++ b/arch/arm/kernel/entry-header.S
@@ -132,6 +132,10 @@
        orrne   r5, V7M_xPSR_FRAMEPTRALIGN
        biceq   r5, V7M_xPSR_FRAMEPTRALIGN
+        @ ensure bit 0 is cleared in the PC, otherwise behaviour is
+        @ unpredictable
+        bic     r4, #1
        @ write basic exception frame
        stmdb   r2!, {r1, r3-r5}
        ldmia   sp, {r1, r3-r5}
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c
index 3c217694ebec..cb791ac6a003 100644
--- a/arch/arm/kernel/unwind.c
+++ b/arch/arm/kernel/unwind.c
@@ -285,7 +285,7 @@ static int unwind_exec_pop_r4_to_rN(struct unwind_ctrl_block *ctrl,
                if (unwind_pop_register(ctrl, &vsp, reg))
                                return -URC_FAILURE;
-        if (insn & 0x80)
+        if (insn & 0x8)
                if (unwind_pop_register(ctrl, &vsp, 14))
                                return -URC_FAILURE;
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 14a6e35801ff..adcfb88a5d7d 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -1307,19 +1307,19 @@ static struct platform_device at91_adc_device = {
 static struct at91_adc_trigger at91_adc_triggers[] = {
        [0] = {
                .name = "timer-counter-0",
-                .value = AT91_ADC_TRGSEL_TC0 | AT91_ADC_TRGEN,
+                .value = 0x1,
        },
        [1] = {
                .name = "timer-counter-1",
-                .value = AT91_ADC_TRGSEL_TC1 | AT91_ADC_TRGEN,
+                .value = 0x3,
        },
        [2] = {
                .name = "timer-counter-2",
-                .value = AT91_ADC_TRGSEL_TC2 | AT91_ADC_TRGEN,
+                .value = 0x5,
        },
        [3] = {
                .name = "external",
-                .value = AT91_ADC_TRGSEL_EXTERNAL | AT91_ADC_TRGEN,
+                .value = 0xd,
                .is_external = true,
        },
 };
diff --git a/arch/arm/mach-axxia/Kconfig b/arch/arm/mach-axxia/Kconfig
new file mode 100644
index 000000000000..8be7e0ae1922
--- /dev/null
+++ b/arch/arm/mach-axxia/Kconfig
@@ -0,0 +1,16 @@
+config ARCH_AXXIA
+        bool "LSI Axxia platforms" if (ARCH_MULTI_V7 && ARM_LPAE)
+        select ARCH_DMA_ADDR_T_64BIT
+        select ARM_AMBA
+        select ARM_GIC
+        select ARM_TIMER_SP804
+        select HAVE_ARM_ARCH_TIMER
+        select MFD_SYSCON
+        select MIGHT_HAVE_PCI
+        select PCI_DOMAINS if PCI
+        select ZONE_DMA
+        help
+          This enables support for the LSI Axxia devices.
+          The LSI Axxia platforms require a Flattened Device Tree to be passed
+          to the kernel.
diff --git a/arch/arm/mach-axxia/Makefile b/arch/arm/mach-axxia/Makefile
new file mode 100644
index 000000000000..ec4f68b460c6
--- /dev/null
+++ b/arch/arm/mach-axxia/Makefile
@@ -0,0 +1,2 @@
+obj-y                           += axxia.o
+obj-$(CONFIG_SMP)               += platsmp.o
diff --git a/arch/arm/mach-axxia/axxia.c b/arch/arm/mach-axxia/axxia.c
new file mode 100644
index 000000000000..19e5a1d95397
--- /dev/null
+++ b/arch/arm/mach-axxia/axxia.c
@@ -0,0 +1,28 @@
+/*
+ * Support for the LSI Axxia SoC devices based on ARM cores.
+ *
+ * Copyright (C) 2012 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/init.h>
+#include <asm/mach/arch.h>
+static const char *axxia_dt_match[] __initconst = {
+        "lsi,axm5516",
+        "lsi,axm5516-sim",
+        "lsi,axm5516-emu",
+        NULL
+};
+DT_MACHINE_START(AXXIA_DT, "LSI Axxia AXM55XX")
+        .dt_compat = axxia_dt_match,
+MACHINE_END
diff --git a/arch/arm/mach-axxia/platsmp.c b/arch/arm/mach-axxia/platsmp.c
new file mode 100644
index 000000000000..959d4df3d2b6
--- /dev/null
+++ b/arch/arm/mach-axxia/platsmp.c
@@ -0,0 +1,89 @@
+/*
+ * linux/arch/arm/mach-axxia/platsmp.c
+ *
+ * Copyright (C) 2012 LSI Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/smp.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <asm/cacheflush.h>
+/* Syscon register offsets for releasing cores from reset */
+#define SC_CRIT_WRITE_KEY       0x1000
+#define SC_RST_CPU_HOLD         0x1010
+/*
+ * Write the kernel entry point for secondary CPUs to the specified address
+ */
+static void write_release_addr(u32 release_phys)
+{
+        u32 *virt = (u32 *) phys_to_virt(release_phys);
+        writel_relaxed(virt_to_phys(secondary_startup), virt);
+        /* Make sure this store is visible to other CPUs */
+        smp_wmb();
+        __cpuc_flush_dcache_area(virt, sizeof(u32));
+}
+static int axxia_boot_secondary(unsigned int cpu, struct task_struct *idle)
+{
+        struct device_node *syscon_np;
+        void __iomem *syscon;
+        u32 tmp;
+        syscon_np = of_find_compatible_node(NULL, NULL, "lsi,axxia-syscon");
+        if (!syscon_np)
+                return -ENOENT;
+        syscon = of_iomap(syscon_np, 0);
+        if (!syscon)
+                return -ENOMEM;
+        tmp = readl(syscon + SC_RST_CPU_HOLD);
+        writel(0xab, syscon + SC_CRIT_WRITE_KEY);
+        tmp &= ~(1 << cpu);
+        writel(tmp, syscon + SC_RST_CPU_HOLD);
+        return 0;
+}
+static void __init axxia_smp_prepare_cpus(unsigned int max_cpus)
+{
+        int cpu_count = 0;
+        int cpu;
+        /*
+         * Initialise the present map, which describes the set of CPUs actually
+         * populated at the present time.
+         */
+        for_each_possible_cpu(cpu) {
+                struct device_node *np;
+                u32 release_phys;
+                np = of_get_cpu_node(cpu, NULL);
+                if (!np)
+                        continue;
+                if (of_property_read_u32(np, "cpu-release-addr", &release_phys))
+                        continue;
+                if (cpu_count < max_cpus) {
+                        set_cpu_present(cpu, true);
+                        cpu_count++;
+                }
+                if (release_phys != 0)
+                        write_release_addr(release_phys);
+        }
+}
+static struct smp_operations axxia_smp_ops __initdata = {
+        .smp_prepare_cpus       = axxia_smp_prepare_cpus,
+        .smp_boot_secondary     = axxia_boot_secondary,
+};
+CPU_METHOD_OF_DECLARE(axxia_smp, "lsi,syscon-release", &axxia_smp_ops);
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index 49c914cd9c7a..9bc6db1c1348 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -1,31 +1,58 @@
 config ARCH_BCM
-        bool "Broadcom SoC Support"
+        bool "Broadcom SoC Support" if ARCH_MULTI_V6_V7
-        depends on ARCH_MULTIPLATFORM
        help
-          This enables support for Broadcom ARM based SoC
+          This enables support for Broadcom ARM based SoC chips
-          chips
-if ARCH_BCM
 menu "Broadcom SoC Selection"
+        depends on ARCH_BCM
 config ARCH_BCM_MOBILE
-        bool "Broadcom Mobile SoC" if ARCH_MULTI_V7
+        bool "Broadcom Mobile SoC Support" if ARCH_MULTI_V7
-        depends on MMU
        select ARCH_REQUIRE_GPIOLIB
        select ARM_ERRATA_754322
        select ARM_ERRATA_764369 if SMP
+        select ARM_ERRATA_775420
        select ARM_GIC
        select GPIO_BCM_KONA
        select TICK_ONESHOT
-        select CACHE_L2X0
        select HAVE_ARM_ARCH_TIMER
        select PINCTRL
        help
          This enables support for systems based on Broadcom mobile SoCs.
-          It currently supports the 'BCM281XX' family, which includes
-          BCM11130, BCM11140, BCM11351, BCM28145 and
+if ARCH_BCM_MOBILE
-          BCM28155 variants.
+menu "Broadcom Mobile SoC Selection"
+config ARCH_BCM_281XX
+        bool "Broadcom BCM281XX SoC family"
+        default y
+        help
+          Enable support for the the BCM281XX family, which includes
+          BCM11130, BCM11140, BCM11351, BCM28145 and BCM28155
+          variants.
+config ARCH_BCM_21664
+        bool "Broadcom BCM21664 SoC family"
+        default y
+        help
+          Enable support for the the BCM21664 family, which includes
+          BCM21663 and BCM21664 variants.
+config ARCH_BCM_MOBILE_L2_CACHE
+        bool "Broadcom mobile SoC level 2 cache support"
+        depends on (ARCH_BCM_281XX || ARCH_BCM_21664)
+        default y
+        select CACHE_L2X0
+        select ARCH_BCM_MOBILE_SMC
+config ARCH_BCM_MOBILE_SMC
+        bool
+        depends on ARCH_BCM_281XX || ARCH_BCM_21664
+endmenu
+endif
 config ARCH_BCM2835
        bool "Broadcom BCM2835 family" if ARCH_MULTI_V6
@@ -33,10 +60,7 @@ config ARCH_BCM2835
        select ARM_AMBA
        select ARM_ERRATA_411920
        select ARM_TIMER_SP804
-        select CLKDEV_LOOKUP
        select CLKSRC_OF
-        select CPU_V6
-        select GENERIC_CLOCKEVENTS
        select PINCTRL
        select PINCTRL_BCM2835
        help
@@ -45,17 +69,12 @@ config ARCH_BCM2835
 config ARCH_BCM_5301X
        bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7
-        depends on MMU
        select ARM_GIC
        select CACHE_L2X0
        select HAVE_ARM_SCU if SMP
        select HAVE_ARM_TWD if SMP
-        select HAVE_SMP
-        select COMMON_CLK
-        select GENERIC_CLOCKEVENTS
        select ARM_GLOBAL_TIMER
        select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
-        select MIGHT_HAVE_PCI
        help
          Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores.
@@ -70,5 +89,3 @@ config ARCH_BCM_5301X
          network SoC using a MIPS CPU, they are supported by arch/mips/bcm47xx
 endmenu
-endif
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index a326b28c4406..731292114975 100644
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -10,10 +10,23 @@
 # of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU General Public License for more details.
-obj-$(CONFIG_ARCH_BCM_MOBILE)   := board_bcm281xx.o board_bcm21664.o \
+# BCM281XX
-                                bcm_kona_smc.o bcm_kona_smc_asm.o kona.o
+obj-$(CONFIG_ARCH_BCM_281XX)    += board_bcm281xx.o
+# BCM21664
+obj-$(CONFIG_ARCH_BCM_21664)    += board_bcm21664.o
+# BCM281XX and BCM21664 L2 cache control
+obj-$(CONFIG_ARCH_BCM_MOBILE_L2_CACHE) += kona_l2_cache.o
+# Support for secure monitor traps
+obj-$(CONFIG_ARCH_BCM_MOBILE_SMC) += bcm_kona_smc.o
+ifeq ($(call as-instr,.arch_extension sec,as_has_sec),as_has_sec)
+CFLAGS_bcm_kona_smc.o           += -Wa,-march=armv7-a+sec -DREQUIRES_SEC
+endif
+# BCM2835
 obj-$(CONFIG_ARCH_BCM2835)      += board_bcm2835.o
-plus_sec := $(call as-instr,.arch_extension sec,+sec)
+# BCM5301X
-AFLAGS_bcm_kona_smc_asm.o       :=-Wa,-march=armv7-a$(plus_sec)
 obj-$(CONFIG_ARCH_BCM_5301X)    += bcm_5301x.o
diff --git a/arch/arm/mach-bcm/bcm_kona_smc.c b/arch/arm/mach-bcm/bcm_kona_smc.c
index 5e31e918f325..a55a7ecf146a 100644
--- a/arch/arm/mach-bcm/bcm_kona_smc.c
+++ b/arch/arm/mach-bcm/bcm_kona_smc.c
@@ -21,11 +21,8 @@
 #include "bcm_kona_smc.h"
-struct secure_bridge_data {
+static u32              bcm_smc_buffer_phys;    /* physical address */
-        void __iomem *bounce;           /* virtual address */
+static void __iomem     *bcm_smc_buffer;        /* virtual address */
-        u32 __iomem buffer_addr;        /* physical address */
-        int initialized;
-} bridge_data;
 struct bcm_kona_smc_data {
        unsigned service_id;
@@ -33,6 +30,7 @@ struct bcm_kona_smc_data {
        unsigned arg1;
        unsigned arg2;
        unsigned arg3;
+        unsigned result;
 };
 static const struct of_device_id bcm_kona_smc_ids[] __initconst = {
@@ -41,59 +39,125 @@ static const struct of_device_id bcm_kona_smc_ids[] __initconst = {
        {},
 };
-/* Map in the bounce area */
+/* Map in the args buffer area */
 int __init bcm_kona_smc_init(void)
 {
        struct device_node *node;
+        const __be32 *prop_val;
+        u64 prop_size = 0;
+        unsigned long buffer_size;
+        u32 buffer_phys;
        /* Read buffer addr and size from the device tree node */
        node = of_find_matching_node(NULL, bcm_kona_smc_ids);
        if (!node)
                return -ENODEV;
-        /* Don't care about size or flags of the DT node */
+        prop_val = of_get_address(node, 0, &prop_size, NULL);
-        bridge_data.buffer_addr =
+        if (!prop_val)
-                be32_to_cpu(*of_get_address(node, 0, NULL, NULL));
+                return -EINVAL;
-        BUG_ON(!bridge_data.buffer_addr);
-        bridge_data.bounce = of_iomap(node, 0);
+        /* We assume space for four 32-bit arguments */
-        BUG_ON(!bridge_data.bounce);
+        if (prop_size < 4 * sizeof(u32) || prop_size > (u64)ULONG_MAX)
+                return -EINVAL;
+        buffer_size = (unsigned long)prop_size;
-        bridge_data.initialized = 1;
+        buffer_phys = be32_to_cpup(prop_val);
+        if (!buffer_phys)
+                return -EINVAL;
+        bcm_smc_buffer = ioremap(buffer_phys, buffer_size);
+        if (!bcm_smc_buffer)
+                return -ENOMEM;
+        bcm_smc_buffer_phys = buffer_phys;
        pr_info("Kona Secure API initialized\n");
        return 0;
 }
+/*
+ * int bcm_kona_do_smc(u32 service_id, u32 buffer_addr)
+ *
+ * Only core 0 can run the secure monitor code.  If an "smc" request
+ * is initiated on a different core it must be redirected to core 0
+ * for execution.  We rely on the caller to handle this.
+ *
+ * Each "smc" request supplies a service id and the address of a
+ * buffer containing parameters related to the service to be
+ * performed.  A flags value defines the behavior of the level 2
+ * cache and interrupt handling while the secure monitor executes.
+ *
+ * Parameters to the "smc" request are passed in r4-r6 as follows:
+ *     r4       service id
+ *     r5       flags (SEC_ROM_*)
+ *     r6       physical address of buffer with other parameters
+ *
+ * Execution of an "smc" request produces two distinct results.
+ *
+ * First, the secure monitor call itself (regardless of the specific
+ * service request) can succeed, or can produce an error.  When an
+ * "smc" request completes this value is found in r12; it should
+ * always be SEC_EXIT_NORMAL.
+ *
+ * In addition, the particular service performed produces a result.
+ * The values that should be expected depend on the service.  We
+ * therefore return this value to the caller, so it can handle the
+ * request result appropriately.  This result value is found in r0
+ * when the "smc" request completes.
+ */
+static int bcm_kona_do_smc(u32 service_id, u32 buffer_phys)
+{
+        register u32 ip asm("ip");      /* Also called r12 */
+        register u32 r0 asm("r0");
+        register u32 r4 asm("r4");
+        register u32 r5 asm("r5");
+        register u32 r6 asm("r6");
+        r4 = service_id;
+        r5 = 0x3;               /* Keep IRQ and FIQ off in SM */
+        r6 = buffer_phys;
+        asm volatile (
+                /* Make sure we got the registers we want */
+                __asmeq("%0", "ip")
+                __asmeq("%1", "r0")
+                __asmeq("%2", "r4")
+                __asmeq("%3", "r5")
+                __asmeq("%4", "r6")
+#ifdef REQUIRES_SEC
+                ".arch_extension sec\n"
+#endif
+                "       smc    #0\n"
+                : "=r" (ip), "=r" (r0)
+                : "r" (r4), "r" (r5), "r" (r6)
+                : "r1", "r2", "r3", "r7", "lr");
+        BUG_ON(ip != SEC_EXIT_NORMAL);
+        return r0;
+}
 /* __bcm_kona_smc() should only run on CPU 0, with pre-emption disabled */
 static void __bcm_kona_smc(void *info)
 {
        struct bcm_kona_smc_data *data = info;
-        u32 *args = bridge_data.bounce;
+        u32 *args = bcm_smc_buffer;
-        int rc = 0;
-        /* Must run on CPU 0 */
        BUG_ON(smp_processor_id() != 0);
+        BUG_ON(!args);
-        /* Check map in the bounce area */
+        /* Copy the four 32 bit argument values into the bounce area */
-        BUG_ON(!bridge_data.initialized);
+        writel_relaxed(data->arg0, args++);
+        writel_relaxed(data->arg1, args++);
-        /* Copy one 32 bit word into the bounce area */
+        writel_relaxed(data->arg2, args++);
-        args[0] = data->arg0;
+        writel(data->arg3, args);
-        args[1] = data->arg1;
-        args[2] = data->arg2;
-        args[3] = data->arg3;
        /* Flush caches for input data passed to Secure Monitor */
-        if (data->service_id != SSAPI_BRCM_START_VC_CORE)
+        flush_cache_all();
-                flush_cache_all();
-        /* Trap into Secure Monitor */
-        rc = bcm_kona_smc_asm(data->service_id, bridge_data.buffer_addr);
-        if (rc != SEC_ROM_RET_OK)
+        /* Trap into Secure Monitor and record the request result */
-                pr_err("Secure Monitor call failed (0x%x)!\n", rc);
+        data->result = bcm_kona_do_smc(data->service_id, bcm_smc_buffer_phys);
 }
 unsigned bcm_kona_smc(unsigned service_id, unsigned arg0, unsigned arg1,
@@ -106,17 +170,13 @@ unsigned bcm_kona_smc(unsigned service_id, unsigned arg0, unsigned arg1,
        data.arg1 = arg1;
        data.arg2 = arg2;
        data.arg3 = arg3;
+        data.result = 0;
        /*
         * Due to a limitation of the secure monitor, we must use the SMP
         * infrastructure to forward all secure monitor calls to Core 0.
         */
-        if (get_cpu() != 0)
+        smp_call_function_single(0, __bcm_kona_smc, &data, 1);
-                smp_call_function_single(0, __bcm_kona_smc, (void *)&data, 1);
-        else
-                __bcm_kona_smc(&data);
-        put_cpu();
+        return data.result;
-        return 0;
 }
diff --git a/arch/arm/mach-bcm/bcm_kona_smc.h b/arch/arm/mach-bcm/bcm_kona_smc.h
index d098a7e76744..2e29ec67e414 100644
--- a/arch/arm/mach-bcm/bcm_kona_smc.h
+++ b/arch/arm/mach-bcm/bcm_kona_smc.h
@@ -15,55 +15,12 @@
 #define BCM_KONA_SMC_H
 #include <linux/types.h>
-#define FLAGS   (SEC_ROM_ICACHE_ENABLE_MASK | SEC_ROM_DCACHE_ENABLE_MASK | \
-                        SEC_ROM_IRQ_ENABLE_MASK | SEC_ROM_FIQ_ENABLE_MASK)
-/*!
+/* Broadcom Secure Service API service IDs, return codes, and exit codes */
- * Definitions for IRQ & FIQ Mask for ARM
+#define SSAPI_ENABLE_L2_CACHE           0x01000002
- */
-#define FIQ_IRQ_MASK                                            0xC0
-#define FIQ_MASK                                                0x40
-#define IRQ_MASK                                                0x80
-/*!
- * Secure Mode FLAGs
- */
-/* When set, enables ICache within the secure mode */
-#define SEC_ROM_ICACHE_ENABLE_MASK                        0x00000001
-/* When set, enables DCache within the secure mode */
-#define SEC_ROM_DCACHE_ENABLE_MASK                        0x00000002
-/* When set, enables IRQ within the secure mode */
-#define SEC_ROM_IRQ_ENABLE_MASK                           0x00000004
-/* When set, enables FIQ within the secure mode */
-#define SEC_ROM_FIQ_ENABLE_MASK                           0x00000008
-/* When set, enables Unified L2 cache within the secure mode */
-#define SEC_ROM_UL2_CACHE_ENABLE_MASK                     0x00000010
-/* Broadcom Secure Service API Service IDs */
-#define SSAPI_DORMANT_ENTRY_SERV                          0x01000000
-#define SSAPI_PUBLIC_OTP_SERV                             0x01000001
-#define SSAPI_ENABLE_L2_CACHE                             0x01000002
-#define SSAPI_DISABLE_L2_CACHE                            0x01000003
-#define SSAPI_WRITE_SCU_STATUS                            0x01000004
-#define SSAPI_WRITE_PWR_GATE                              0x01000005
-/* Broadcom Secure Service API Return Codes */
 #define SEC_ROM_RET_OK                  0x00000001
-#define SEC_ROM_RET_FAIL                0x00000009
-#define SSAPI_RET_FROM_INT_SERV         0x4
 #define SEC_EXIT_NORMAL                 0x1
-#define SSAPI_ROW_AES                   0x0E000006
-#define SSAPI_BRCM_START_VC_CORE        0x0E000008
-#ifndef __ASSEMBLY__
 extern int __init bcm_kona_smc_init(void);
 extern unsigned bcm_kona_smc(unsigned service_id,
@@ -72,9 +29,4 @@ extern unsigned bcm_kona_smc(unsigned service_id,
                             unsigned arg2,
                             unsigned arg3);
-extern int bcm_kona_smc_asm(u32 service_id,
-                            u32 buffer_addr);
-#endif  /* __ASSEMBLY__ */
 #endif /* BCM_KONA_SMC_H */
diff --git a/arch/arm/mach-bcm/bcm_kona_smc_asm.S b/arch/arm/mach-bcm/bcm_kona_smc_asm.S
deleted file mode 100644
index a1608480d60d..000000000000
--- a/arch/arm/mach-bcm/bcm_kona_smc_asm.S
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * Copyright (C) 2013 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#include <linux/linkage.h>
-#include "bcm_kona_smc.h"
-/*
- * int bcm_kona_smc_asm(u32 service_id, u32 buffer_addr)
- */
-ENTRY(bcm_kona_smc_asm)
-        stmfd   sp!, {r4-r12, lr}
-        mov     r4, r0          @ service_id
-        mov     r5, #3          @ Keep IRQ and FIQ off in SM
-        /*
-         * Since interrupts are disabled in the open mode, we must keep
-         * interrupts disabled in secure mode by setting R5=0x3. If interrupts
-         * are enabled in open mode, we can set R5=0x0 to allow interrupts in
-         * secure mode.  If we did this, the secure monitor would return back
-         * control to the open mode to handle the interrupt prior to completing
-         * the secure service. If this happened, R12 would not be
-         * SEC_EXIT_NORMAL and we would need to call SMC again after resetting
-         * R5 (it gets clobbered by the secure monitor) and setting R4 to
-         * SSAPI_RET_FROM_INT_SERV to indicate that we want the secure monitor
-         * to finish up the previous uncompleted secure service.
-         */
-        mov     r6, r1          @ buffer_addr
-        smc     #0
-        /* Check r12 for SEC_EXIT_NORMAL here if interrupts are enabled */
-        ldmfd   sp!, {r4-r12, pc}
-ENDPROC(bcm_kona_smc_asm)
diff --git a/arch/arm/mach-bcm/board_bcm21664.c b/arch/arm/mach-bcm/board_bcm21664.c
index acc1573fd005..f0521cc0640d 100644
--- a/arch/arm/mach-bcm/board_bcm21664.c
+++ b/arch/arm/mach-bcm/board_bcm21664.c
@@ -11,14 +11,13 @@
 * GNU General Public License for more details.
 */
-#include <linux/clocksource.h>
 #include <linux/of_address.h>
 #include <linux/of_platform.h>
+#include <linux/io.h>
 #include <asm/mach/arch.h>
-#include "bcm_kona_smc.h"
+#include "kona_l2_cache.h"
-#include "kona.h"
 #define RSTMGR_DT_STRING                "brcm,bcm21664-resetmgr"
diff --git a/arch/arm/mach-bcm/board_bcm281xx.c b/arch/arm/mach-bcm/board_bcm281xx.c
index 6be54c10f8cb..1ac59fc0cb15 100644
--- a/arch/arm/mach-bcm/board_bcm281xx.c
+++ b/arch/arm/mach-bcm/board_bcm281xx.c
@@ -17,7 +17,7 @@
 #include <asm/mach/arch.h>
-#include "kona.h"
+#include "kona_l2_cache.h"
 #define SECWDOG_OFFSET                  0x00000000
 #define SECWDOG_RESERVED_MASK           0xe2000000
diff --git a/arch/arm/mach-bcm/kona.c b/arch/arm/mach-bcm/kona_l2_cache.c
index 768bc2837bf5..b31970377c20 100644
--- a/arch/arm/mach-bcm/kona.c
+++ b/arch/arm/mach-bcm/kona_l2_cache.c
@@ -11,19 +11,18 @@
 * GNU General Public License for more details.
 */
-#include <linux/of_platform.h>
+#include <linux/init.h>
+#include <linux/printk.h>
 #include <asm/hardware/cache-l2x0.h>
 #include "bcm_kona_smc.h"
-#include "kona.h"
 void __init kona_l2_cache_init(void)
 {
+        unsigned int result;
        int ret;
-        if (!IS_ENABLED(CONFIG_CACHE_L2X0))
-                return;
        ret = bcm_kona_smc_init();
        if (ret) {
                pr_info("Secure API not available (%d). Skipping L2 init.\n",
@@ -31,7 +30,12 @@ void __init kona_l2_cache_init(void)
                return;
        }
-        bcm_kona_smc(SSAPI_ENABLE_L2_CACHE, 0, 0, 0, 0);
+        result = bcm_kona_smc(SSAPI_ENABLE_L2_CACHE, 0, 0, 0, 0);
+        if (result != SEC_ROM_RET_OK) {
+                pr_err("Secure Monitor call failed (%u)! Skipping L2 init.\n",
+                        result);
+                return;
+        }
        /*
         * The aux_val and aux_mask have no effect since L2 cache is already
diff --git a/arch/arm/mach-bcm/kona.h b/arch/arm/mach-bcm/kona_l2_cache.h
index 3a7a017c29cd..46f84a95ab1c 100644
--- a/arch/arm/mach-bcm/kona.h
+++ b/arch/arm/mach-bcm/kona_l2_cache.h
@@ -11,4 +11,8 @@
 * GNU General Public License for more details.
 */
-void __init kona_l2_cache_init(void);
+#ifdef CONFIG_ARCH_BCM_MOBILE_L2_CACHE
+void    kona_l2_cache_init(void);
+#else
+#define kona_l2_cache_init() ((void)0)
+#endif
diff --git a/arch/arm/mach-berlin/Kconfig b/arch/arm/mach-berlin/Kconfig
index b0cb0722acd2..101e0f356730 100644
--- a/arch/arm/mach-berlin/Kconfig
+++ b/arch/arm/mach-berlin/Kconfig
@@ -1,9 +1,11 @@
 config ARCH_BERLIN
        bool "Marvell Berlin SoCs" if ARCH_MULTI_V7
+        select ARCH_REQUIRE_GPIOLIB
        select ARM_GIC
        select GENERIC_IRQ_CHIP
        select DW_APB_ICTL
        select DW_APB_TIMER_OF
+        select PINCTRL
 if ARCH_BERLIN
@@ -14,11 +16,19 @@ config MACH_BERLIN_BG2
        select CACHE_L2X0
        select CPU_PJ4B
        select HAVE_ARM_TWD if SMP
+        select PINCTRL_BERLIN_BG2
 config MACH_BERLIN_BG2CD
        bool "Marvell Armada 1500-mini (BG2CD)"
        select CACHE_L2X0
        select HAVE_ARM_TWD if SMP
+        select PINCTRL_BERLIN_BG2CD
+config MACH_BERLIN_BG2Q
+        bool "Marvell Armada 1500 Pro (BG2-Q)"
+        select CACHE_L2X0
+        select HAVE_ARM_TWD if SMP
+        select PINCTRL_BERLIN_BG2Q
 endmenu
diff --git a/arch/arm/mach-cns3xxx/Kconfig b/arch/arm/mach-cns3xxx/Kconfig
index dce8decd5d46..66838f42037f 100644
--- a/arch/arm/mach-cns3xxx/Kconfig
+++ b/arch/arm/mach-cns3xxx/Kconfig
@@ -1,7 +1,6 @@
 config ARCH_CNS3XXX
        bool "Cavium Networks CNS3XXX family" if ARCH_MULTI_V6
        select ARM_GIC
-        select MIGHT_HAVE_PCI
        select PCI_DOMAINS if PCI
        help
          Support for Cavium Networks CNS3XXX platform.
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index ecdc7d44fa70..06d63d5651f3 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -350,11 +350,7 @@ static struct davinci_mmc_config dm355evm_mmc_config = {
 * you have proper Mini-B or Mini-A cables (or Mini-A adapters)
 * the ID pin won't need any help.
 */
-#ifdef CONFIG_USB_MUSB_PERIPHERAL
-#define USB_ID_VALUE    0       /* ID pulled high; *should* float */
-#else
 #define USB_ID_VALUE    1       /* ID pulled low */
-#endif
 static struct spi_eeprom at25640a = {
        .byte_len       = SZ_64K / 8,
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index 43bacbf15314..680a7a2d9102 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -208,11 +208,7 @@ static struct davinci_mmc_config dm355leopard_mmc_config = {
 * you have proper Mini-B or Mini-A cables (or Mini-A adapters)
 * the ID pin won't need any help.
 */
-#ifdef CONFIG_USB_MUSB_PERIPHERAL
-#define USB_ID_VALUE    0       /* ID pulled high; *should* float */
-#else
 #define USB_ID_VALUE    1       /* ID pulled low */
-#endif
 static struct spi_eeprom at25640a = {
        .byte_len       = SZ_64K / 8,
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index fc8bf18e222d..d58995c9a95a 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -7,97 +7,102 @@
 # Configuration options for the EXYNOS4
+config ARCH_EXYNOS
+        bool "Samsung EXYNOS" if ARCH_MULTI_V7
+        select ARCH_HAS_BANDGAP
+        select ARCH_HAS_CPUFREQ
+        select ARCH_HAS_HOLES_MEMORYMODEL
+        select ARCH_REQUIRE_GPIOLIB
+        select ARM_AMBA
+        select ARM_GIC
+        select COMMON_CLK_SAMSUNG
+        select HAVE_ARM_SCU if SMP
+        select HAVE_S3C2410_I2C if I2C
+        select HAVE_S3C2410_WATCHDOG if WATCHDOG
+        select HAVE_S3C_RTC if RTC_CLASS
+        select PINCTRL
+        select PINCTRL_EXYNOS
+        select PM_GENERIC_DOMAINS if PM_RUNTIME
+        select S5P_DEV_MFC
+        select SRAM
+        help
+          Support for SAMSUNG EXYNOS SoCs (EXYNOS4/5)
 if ARCH_EXYNOS
 menu "SAMSUNG EXYNOS SoCs Support"
+config ARCH_EXYNOS3
+        bool "SAMSUNG EXYNOS3"
+        select ARM_CPU_SUSPEND if PM
+        help
+          Samsung EXYNOS3 (Crotex-A7) SoC based systems
 config ARCH_EXYNOS4
        bool "SAMSUNG EXYNOS4"
        default y
-        select ARM_AMBA
+        select ARM_CPU_SUSPEND if PM_SLEEP
-        select CLKSRC_OF
        select CLKSRC_SAMSUNG_PWM if CPU_EXYNOS4210
        select CPU_EXYNOS4210
        select GIC_NON_BANKED
        select KEYBOARD_SAMSUNG if INPUT_KEYBOARD
-        select HAVE_ARM_SCU if SMP
-        select HAVE_SMP
        select MIGHT_HAVE_CACHE_L2X0
-        select PINCTRL
-        select PM_GENERIC_DOMAINS if PM_RUNTIME
-        select S5P_DEV_MFC
        help
-          Samsung EXYNOS4 SoCs based systems
+          Samsung EXYNOS4 (Cortex-A9) SoC based systems
 config ARCH_EXYNOS5
        bool "SAMSUNG EXYNOS5"
-        select ARM_AMBA
+        default y
-        select CLKSRC_OF
-        select HAVE_ARM_SCU if SMP
-        select HAVE_SMP
-        select PINCTRL
        help
-          Samsung EXYNOS5 (Cortex-A15) SoC based systems
+          Samsung EXYNOS5 (Cortex-A15/A7) SoC based systems
 comment "EXYNOS SoCs"
+config SOC_EXYNOS3250
+        bool "SAMSUNG EXYNOS3250"
+        default y
+        depends on ARCH_EXYNOS3
 config CPU_EXYNOS4210
        bool "SAMSUNG EXYNOS4210"
        default y
        depends on ARCH_EXYNOS4
-        select ARCH_HAS_BANDGAP
-        select ARM_CPU_SUSPEND if PM_SLEEP
-        select PINCTRL_EXYNOS
-        select SAMSUNG_DMADEV
-        help
-          Enable EXYNOS4210 CPU support
 config SOC_EXYNOS4212
        bool "SAMSUNG EXYNOS4212"
        default y
        depends on ARCH_EXYNOS4
-        select ARCH_HAS_BANDGAP
-        select PINCTRL_EXYNOS
-        select SAMSUNG_DMADEV
-        help
-          Enable EXYNOS4212 SoC support
 config SOC_EXYNOS4412
        bool "SAMSUNG EXYNOS4412"
        default y
        depends on ARCH_EXYNOS4
-        select ARCH_HAS_BANDGAP
-        select PINCTRL_EXYNOS
-        select SAMSUNG_DMADEV
-        help
-          Enable EXYNOS4412 SoC support
 config SOC_EXYNOS5250
        bool "SAMSUNG EXYNOS5250"
        default y
        depends on ARCH_EXYNOS5
-        select ARCH_HAS_BANDGAP
-        select PINCTRL_EXYNOS
+config SOC_EXYNOS5260
-        select PM_GENERIC_DOMAINS if PM_RUNTIME
+        bool "SAMSUNG EXYNOS5260"
-        select S5P_DEV_MFC
+        default y
-        select SAMSUNG_DMADEV
+        depends on ARCH_EXYNOS5
-        help
-          Enable EXYNOS5250 SoC support
+config SOC_EXYNOS5410
+        bool "SAMSUNG EXYNOS5410"
+        default y
+        depends on ARCH_EXYNOS5
 config SOC_EXYNOS5420
        bool "SAMSUNG EXYNOS5420"
        default y
        depends on ARCH_EXYNOS5
-        select PM_GENERIC_DOMAINS if PM_RUNTIME
-        help
-          Enable EXYNOS5420 SoC support
 config SOC_EXYNOS5440
        bool "SAMSUNG EXYNOS5440"
        default y
        depends on ARCH_EXYNOS5
        select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
-        select ARCH_HAS_BANDGAP
        select ARCH_HAS_OPP
        select HAVE_ARM_ARCH_TIMER
        select AUTO_ZRELADDR
@@ -108,6 +113,19 @@ config SOC_EXYNOS5440
        help
          Enable EXYNOS5440 SoC support
+config SOC_EXYNOS5800
+        bool "SAMSUNG EXYNOS5800"
+        default y
+        depends on SOC_EXYNOS5420
 endmenu
+config EXYNOS5420_MCPM
+        bool "Exynos5420 Multi-Cluster PM support"
+        depends on MCPM && SOC_EXYNOS5420
+        select ARM_CCI
+        help
+          This is needed to provide CPU and cluster power management
+          on Exynos5420 implementing big.LITTLE.
 endif
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index a656dbe3b78c..9f3258880949 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -5,6 +5,8 @@
 #
 # Licensed under GPLv2
+ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/$(src)/include -I$(srctree)/arch/arm/plat-samsung/include
 obj-y                           :=
 obj-m                           :=
 obj-n                           :=
@@ -12,20 +14,19 @@ obj-				:=
 # Core
-obj-$(CONFIG_ARCH_EXYNOS)       += exynos.o
+obj-$(CONFIG_ARCH_EXYNOS)       += exynos.o pmu.o exynos-smc.o firmware.o
 obj-$(CONFIG_PM_SLEEP)          += pm.o sleep.o
 obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
 obj-$(CONFIG_CPU_IDLE)          += cpuidle.o
-obj-$(CONFIG_ARCH_EXYNOS)       += pmu.o
 obj-$(CONFIG_SMP)               += platsmp.o headsmp.o
 obj-$(CONFIG_HOTPLUG_CPU)       += hotplug.o
+CFLAGS_hotplug.o                += -march=armv7-a
-obj-$(CONFIG_ARCH_EXYNOS)       += exynos-smc.o
-obj-$(CONFIG_ARCH_EXYNOS)       += firmware.o
 plus_sec := $(call as-instr,.arch_extension sec,+sec)
 AFLAGS_exynos-smc.o             :=-Wa,-march=armv7-a$(plus_sec)
+obj-$(CONFIG_EXYNOS5420_MCPM)   += mcpm-exynos.o
+CFLAGS_mcpm-exynos.o            += -march=armv7-a
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 963c51fb606c..5dba5a1ee6c2 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -15,6 +15,102 @@
 #include <linux/reboot.h>
 #include <linux/of.h>
+#define EXYNOS3250_SOC_ID       0xE3472000
+#define EXYNOS3_SOC_MASK        0xFFFFF000
+#define EXYNOS4210_CPU_ID       0x43210000
+#define EXYNOS4212_CPU_ID       0x43220000
+#define EXYNOS4412_CPU_ID       0xE4412200
+#define EXYNOS4_CPU_MASK        0xFFFE0000
+#define EXYNOS5250_SOC_ID       0x43520000
+#define EXYNOS5410_SOC_ID       0xE5410000
+#define EXYNOS5420_SOC_ID       0xE5420000
+#define EXYNOS5440_SOC_ID       0xE5440000
+#define EXYNOS5800_SOC_ID       0xE5422000
+#define EXYNOS5_SOC_MASK        0xFFFFF000
+extern unsigned long samsung_cpu_id;
+#define IS_SAMSUNG_CPU(name, id, mask)          \
+static inline int is_samsung_##name(void)       \
+{                                               \
+        return ((samsung_cpu_id & mask) == (id & mask));        \
+}
+IS_SAMSUNG_CPU(exynos3250, EXYNOS3250_SOC_ID, EXYNOS3_SOC_MASK)
+IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
+IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
+IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
+IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
+IS_SAMSUNG_CPU(exynos5410, EXYNOS5410_SOC_ID, EXYNOS5_SOC_MASK)
+IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK)
+IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
+IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK)
+#if defined(CONFIG_SOC_EXYNOS3250)
+# define soc_is_exynos3250()    is_samsung_exynos3250()
+#else
+# define soc_is_exynos3250()    0
+#endif
+#if defined(CONFIG_CPU_EXYNOS4210)
+# define soc_is_exynos4210()    is_samsung_exynos4210()
+#else
+# define soc_is_exynos4210()    0
+#endif
+#if defined(CONFIG_SOC_EXYNOS4212)
+# define soc_is_exynos4212()    is_samsung_exynos4212()
+#else
+# define soc_is_exynos4212()    0
+#endif
+#if defined(CONFIG_SOC_EXYNOS4412)
+# define soc_is_exynos4412()    is_samsung_exynos4412()
+#else
+# define soc_is_exynos4412()    0
+#endif
+#define EXYNOS4210_REV_0        (0x0)
+#define EXYNOS4210_REV_1_0      (0x10)
+#define EXYNOS4210_REV_1_1      (0x11)
+#if defined(CONFIG_SOC_EXYNOS5250)
+# define soc_is_exynos5250()    is_samsung_exynos5250()
+#else
+# define soc_is_exynos5250()    0
+#endif
+#if defined(CONFIG_SOC_EXYNOS5410)
+# define soc_is_exynos5410()    is_samsung_exynos5410()
+#else
+# define soc_is_exynos5410()    0
+#endif
+#if defined(CONFIG_SOC_EXYNOS5420)
+# define soc_is_exynos5420()    is_samsung_exynos5420()
+#else
+# define soc_is_exynos5420()    0
+#endif
+#if defined(CONFIG_SOC_EXYNOS5440)
+# define soc_is_exynos5440()    is_samsung_exynos5440()
+#else
+# define soc_is_exynos5440()    0
+#endif
+#if defined(CONFIG_SOC_EXYNOS5800)
+# define soc_is_exynos5800()    is_samsung_exynos5800()
+#else
+# define soc_is_exynos5800()    0
+#endif
+#define soc_is_exynos4() (soc_is_exynos4210() || soc_is_exynos4212() || \
+                          soc_is_exynos4412())
+#define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5410() || \
+                          soc_is_exynos5420() || soc_is_exynos5800())
 void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
 struct map_desc;
@@ -63,5 +159,14 @@ struct exynos_pmu_conf {
 };
 extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
+extern void exynos_cpu_power_down(int cpu);
+extern void exynos_cpu_power_up(int cpu);
+extern int  exynos_cpu_power_state(int cpu);
+extern void exynos_cluster_power_down(int cluster);
+extern void exynos_cluster_power_up(int cluster);
+extern int  exynos_cluster_power_state(int cluster);
+extern void s5p_init_cpu(void __iomem *cpuid_addr);
+extern unsigned int samsung_rev(void);
 #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index c57cae0e8779..3dd385ebf195 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -24,7 +24,6 @@
 #include <asm/unified.h>
 #include <asm/cpuidle.h>
-#include <plat/cpu.h>
 #include <plat/pm.h>
 #include <mach/map.h>
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index e973ff5de7b3..4800b1ce3d71 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -26,8 +26,6 @@
 #include <asm/mach/map.h>
 #include <asm/memory.h>
-#include <plat/cpu.h>
 #include "common.h"
 #include "mfc.h"
 #include "regs-pmu.h"
@@ -244,21 +242,13 @@ void __init exynos_init_io(void)
        exynos_map_io();
 }
-struct bus_type exynos_subsys = {
-        .name           = "exynos-core",
-        .dev_name       = "exynos-core",
-};
-static int __init exynos_core_init(void)
-{
-        return subsys_system_register(&exynos_subsys, NULL);
-}
-core_initcall(exynos_core_init);
 static int __init exynos4_l2x0_cache_init(void)
 {
        int ret;
+        if (!soc_is_exynos4())
+                return 0;
        ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK);
        if (ret)
                return ret;
@@ -306,12 +296,15 @@ static void __init exynos_dt_machine_init(void)
 }
 static char const *exynos_dt_compat[] __initconst = {
+        "samsung,exynos3",
+        "samsung,exynos3250",
        "samsung,exynos4",
        "samsung,exynos4210",
        "samsung,exynos4212",
        "samsung,exynos4412",
        "samsung,exynos5",
        "samsung,exynos5250",
+        "samsung,exynos5260",
        "samsung,exynos5420",
        "samsung,exynos5440",
        NULL
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index 4135edbc0270..eb91d2350f8c 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -18,8 +18,6 @@
 #include <mach/map.h>
-#include <plat/cpu.h>
 #include "common.h"
 #include "smc.h"
@@ -32,6 +30,13 @@ static int exynos_do_idle(void)
 static int exynos_cpu_boot(int cpu)
 {
        /*
+         * Exynos3250 doesn't need to send smc command for secondary CPU boot
+         * because Exynos3250 removes WFE in secure mode.
+         */
+        if (soc_is_exynos3250())
+                return 0;
+        /*
         * The second parameter of SMC_CMD_CPU1BOOT command means CPU id.
         * But, Exynos4212 has only one secondary CPU so second parameter
         * isn't used for informing secure firmware about CPU id.
@@ -52,7 +57,7 @@ static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
        boot_reg = sysram_ns_base_addr + 0x1c;
-        if (!soc_is_exynos4212())
+        if (!soc_is_exynos4212() && !soc_is_exynos3250())
                boot_reg += 4*cpu;
        __raw_writel(boot_addr, boot_reg);
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index 5eead530c6f8..69fa48397394 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -19,61 +19,9 @@
 #include <asm/cp15.h>
 #include <asm/smp_plat.h>
-#include <plat/cpu.h>
 #include "common.h"
 #include "regs-pmu.h"
-static inline void cpu_enter_lowpower_a9(void)
-{
-        unsigned int v;
-        asm volatile(
-        "       mcr     p15, 0, %1, c7, c5, 0\n"
-        "       mcr     p15, 0, %1, c7, c10, 4\n"
-        /*
-         * Turn off coherency
-         */
-        "       mrc     p15, 0, %0, c1, c0, 1\n"
-        "       bic     %0, %0, %3\n"
-        "       mcr     p15, 0, %0, c1, c0, 1\n"
-        "       mrc     p15, 0, %0, c1, c0, 0\n"
-        "       bic     %0, %0, %2\n"
-        "       mcr     p15, 0, %0, c1, c0, 0\n"
-          : "=&r" (v)
-          : "r" (0), "Ir" (CR_C), "Ir" (0x40)
-          : "cc");
-}
-static inline void cpu_enter_lowpower_a15(void)
-{
-        unsigned int v;
-        asm volatile(
-        "       mrc     p15, 0, %0, c1, c0, 0\n"
-        "       bic     %0, %0, %1\n"
-        "       mcr     p15, 0, %0, c1, c0, 0\n"
-          : "=&r" (v)
-          : "Ir" (CR_C)
-          : "cc");
-        flush_cache_louis();
-        asm volatile(
-        /*
-        * Turn off coherency
-        */
-        "       mrc     p15, 0, %0, c1, c0, 1\n"
-        "       bic     %0, %0, %1\n"
-        "       mcr     p15, 0, %0, c1, c0, 1\n"
-        : "=&r" (v)
-        : "Ir" (0x40)
-        : "cc");
-        isb();
-        dsb();
-}
 static inline void cpu_leave_lowpower(void)
 {
        unsigned int v;
@@ -96,7 +44,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
                /* make cpu1 to be turned off at next WFI command */
                if (cpu == 1)
-                        __raw_writel(0, S5P_ARM_CORE1_CONFIGURATION);
+                        exynos_cpu_power_down(cpu);
                /*
                 * here's the WFI
@@ -132,19 +80,8 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
 void __ref exynos_cpu_die(unsigned int cpu)
 {
        int spurious = 0;
-        int primary_part = 0;
-        /*
+        v7_exit_coherency_flush(louis);
-         * we're ready for shutdown now, so do it.
-         * Exynos4 is A9 based while Exynos5 is A15; check the CPU part
-         * number by reading the Main ID register and then perform the
-         * appropriate sequence for entering low power.
-         */
-        asm("mrc p15, 0, %0, c0, c0, 0" : "=r"(primary_part) : : "cc");
-        if ((primary_part & 0xfff0) == 0xc0f0)
-                cpu_enter_lowpower_a15();
-        else
-                cpu_enter_lowpower_a9();
        platform_do_lowpower(cpu, &spurious);
diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c
new file mode 100644
index 000000000000..0498d0b887ef
--- /dev/null
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -0,0 +1,357 @@
+/*
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * arch/arm/mach-exynos/mcpm-exynos.c
+ *
+ * Based on arch/arm/mach-vexpress/dcscb.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/arm-cci.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/of_address.h>
+#include <asm/cputype.h>
+#include <asm/cp15.h>
+#include <asm/mcpm.h>
+#include "regs-pmu.h"
+#include "common.h"
+#define EXYNOS5420_CPUS_PER_CLUSTER     4
+#define EXYNOS5420_NR_CLUSTERS          2
+#define MCPM_BOOT_ADDR_OFFSET           0x1c
+/*
+ * The common v7_exit_coherency_flush API could not be used because of the
+ * Erratum 799270 workaround. This macro is the same as the common one (in
+ * arch/arm/include/asm/cacheflush.h) except for the erratum handling.
+ */
+#define exynos_v7_exit_coherency_flush(level) \
+        asm volatile( \
+        "stmfd  sp!, {fp, ip}\n\t"\
+        "mrc    p15, 0, r0, c1, c0, 0   @ get SCTLR\n\t" \
+        "bic    r0, r0, #"__stringify(CR_C)"\n\t" \
+        "mcr    p15, 0, r0, c1, c0, 0   @ set SCTLR\n\t" \
+        "isb\n\t"\
+        "bl     v7_flush_dcache_"__stringify(level)"\n\t" \
+        "clrex\n\t"\
+        "mrc    p15, 0, r0, c1, c0, 1   @ get ACTLR\n\t" \
+        "bic    r0, r0, #(1 << 6)       @ disable local coherency\n\t" \
+        /* Dummy Load of a device register to avoid Erratum 799270 */ \
+        "ldr    r4, [%0]\n\t" \
+        "and    r4, r4, #0\n\t" \
+        "orr    r0, r0, r4\n\t" \
+        "mcr    p15, 0, r0, c1, c0, 1   @ set ACTLR\n\t" \
+        "isb\n\t" \
+        "dsb\n\t" \
+        "ldmfd  sp!, {fp, ip}" \
+        : \
+        : "Ir" (S5P_INFORM0) \
+        : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
+          "r9", "r10", "lr", "memory")
+/*
+ * We can't use regular spinlocks. In the switcher case, it is possible
+ * for an outbound CPU to call power_down() after its inbound counterpart
+ * is already live using the same logical CPU number which trips lockdep
+ * debugging.
+ */
+static arch_spinlock_t exynos_mcpm_lock = __ARCH_SPIN_LOCK_UNLOCKED;
+static int
+cpu_use_count[EXYNOS5420_CPUS_PER_CLUSTER][EXYNOS5420_NR_CLUSTERS];
+#define exynos_cluster_usecnt(cluster) \
+        (cpu_use_count[0][cluster] +   \
+         cpu_use_count[1][cluster] +   \
+         cpu_use_count[2][cluster] +   \
+         cpu_use_count[3][cluster])
+#define exynos_cluster_unused(cluster) !exynos_cluster_usecnt(cluster)
+static int exynos_cluster_power_control(unsigned int cluster, int enable)
+{
+        unsigned int tries = 100;
+        unsigned int val;
+        if (enable) {
+                exynos_cluster_power_up(cluster);
+                val = S5P_CORE_LOCAL_PWR_EN;
+        } else {
+                exynos_cluster_power_down(cluster);
+                val = 0;
+        }
+        /* Wait until cluster power control is applied */
+        while (tries--) {
+                if (exynos_cluster_power_state(cluster) == val)
+                        return 0;
+                cpu_relax();
+        }
+        pr_debug("timed out waiting for cluster %u to power %s\n", cluster,
+                enable ? "on" : "off");
+        return -ETIMEDOUT;
+}
+static int exynos_power_up(unsigned int cpu, unsigned int cluster)
+{
+        unsigned int cpunr = cpu + (cluster * EXYNOS5420_CPUS_PER_CLUSTER);
+        int err = 0;
+        pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
+        if (cpu >= EXYNOS5420_CPUS_PER_CLUSTER ||
+                cluster >= EXYNOS5420_NR_CLUSTERS)
+                return -EINVAL;
+        /*
+         * Since this is called with IRQs enabled, and no arch_spin_lock_irq
+         * variant exists, we need to disable IRQs manually here.
+         */
+        local_irq_disable();
+        arch_spin_lock(&exynos_mcpm_lock);
+        cpu_use_count[cpu][cluster]++;
+        if (cpu_use_count[cpu][cluster] == 1) {
+                bool was_cluster_down =
+                        (exynos_cluster_usecnt(cluster) == 1);
+                /*
+                 * Turn on the cluster (L2/COMMON) and then power on the
+                 * cores.
+                 */
+                if (was_cluster_down)
+                        err = exynos_cluster_power_control(cluster, 1);
+                if (!err)
+                        exynos_cpu_power_up(cpunr);
+                else
+                        exynos_cluster_power_control(cluster, 0);
+        } else if (cpu_use_count[cpu][cluster] != 2) {
+                /*
+                 * The only possible values are:
+                 * 0 = CPU down
+                 * 1 = CPU (still) up
+                 * 2 = CPU requested to be up before it had a chance
+                 *     to actually make itself down.
+                 * Any other value is a bug.
+                 */
+                BUG();
+        }
+        arch_spin_unlock(&exynos_mcpm_lock);
+        local_irq_enable();
+        return err;
+}
+/*
+ * NOTE: This function requires the stack data to be visible through power down
+ * and can only be executed on processors like A15 and A7 that hit the cache
+ * with the C bit clear in the SCTLR register.
+ */
+static void exynos_power_down(void)
+{
+        unsigned int mpidr, cpu, cluster;
+        bool last_man = false, skip_wfi = false;
+        unsigned int cpunr;
+        mpidr = read_cpuid_mpidr();
+        cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
+        cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
+        cpunr =  cpu + (cluster * EXYNOS5420_CPUS_PER_CLUSTER);
+        pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
+        BUG_ON(cpu >= EXYNOS5420_CPUS_PER_CLUSTER ||
+                        cluster >= EXYNOS5420_NR_CLUSTERS);
+        __mcpm_cpu_going_down(cpu, cluster);
+        arch_spin_lock(&exynos_mcpm_lock);
+        BUG_ON(__mcpm_cluster_state(cluster) != CLUSTER_UP);
+        cpu_use_count[cpu][cluster]--;
+        if (cpu_use_count[cpu][cluster] == 0) {
+                exynos_cpu_power_down(cpunr);
+                if (exynos_cluster_unused(cluster))
+                        /* TODO: Turn off the cluster here to save power. */
+                        last_man = true;
+        } else if (cpu_use_count[cpu][cluster] == 1) {
+                /*
+                 * A power_up request went ahead of us.
+                 * Even if we do not want to shut this CPU down,
+                 * the caller expects a certain state as if the WFI
+                 * was aborted.  So let's continue with cache cleaning.
+                 */
+                skip_wfi = true;
+        } else {
+                BUG();
+        }
+        if (last_man && __mcpm_outbound_enter_critical(cpu, cluster)) {
+                arch_spin_unlock(&exynos_mcpm_lock);
+                if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A15) {
+                        /*
+                         * On the Cortex-A15 we need to disable
+                         * L2 prefetching before flushing the cache.
+                         */
+                        asm volatile(
+                        "mcr    p15, 1, %0, c15, c0, 3\n\t"
+                        "isb\n\t"
+                        "dsb"
+                        : : "r" (0x400));
+                }
+                /* Flush all cache levels for this cluster. */
+                exynos_v7_exit_coherency_flush(all);
+                /*
+                 * Disable cluster-level coherency by masking
+                 * incoming snoops and DVM messages:
+                 */
+                cci_disable_port_by_cpu(mpidr);
+                __mcpm_outbound_leave_critical(cluster, CLUSTER_DOWN);
+        } else {
+                arch_spin_unlock(&exynos_mcpm_lock);
+                /* Disable and flush the local CPU cache. */
+                exynos_v7_exit_coherency_flush(louis);
+        }
+        __mcpm_cpu_down(cpu, cluster);
+        /* Now we are prepared for power-down, do it: */
+        if (!skip_wfi)
+                wfi();
+        /* Not dead at this point?  Let our caller cope. */
+}
+static int exynos_wait_for_powerdown(unsigned int cpu, unsigned int cluster)
+{
+        unsigned int tries = 100;
+        unsigned int cpunr = cpu + (cluster * EXYNOS5420_CPUS_PER_CLUSTER);
+        pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
+        BUG_ON(cpu >= EXYNOS5420_CPUS_PER_CLUSTER ||
+                        cluster >= EXYNOS5420_NR_CLUSTERS);
+        /* Wait for the core state to be OFF */
+        while (tries--) {
+                if (ACCESS_ONCE(cpu_use_count[cpu][cluster]) == 0) {
+                        if ((exynos_cpu_power_state(cpunr) == 0))
+                                return 0; /* success: the CPU is halted */
+                }
+                /* Otherwise, wait and retry: */
+                msleep(1);
+        }
+        return -ETIMEDOUT; /* timeout */
+}
+static const struct mcpm_platform_ops exynos_power_ops = {
+        .power_up               = exynos_power_up,
+        .power_down             = exynos_power_down,
+        .wait_for_powerdown     = exynos_wait_for_powerdown,
+};
+static void __init exynos_mcpm_usage_count_init(void)
+{
+        unsigned int mpidr, cpu, cluster;
+        mpidr = read_cpuid_mpidr();
+        cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
+        cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
+        pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
+        BUG_ON(cpu >= EXYNOS5420_CPUS_PER_CLUSTER  ||
+                        cluster >= EXYNOS5420_NR_CLUSTERS);
+        cpu_use_count[cpu][cluster] = 1;
+}
+/*
+ * Enable cluster-level coherency, in preparation for turning on the MMU.
+ */
+static void __naked exynos_pm_power_up_setup(unsigned int affinity_level)
+{
+        asm volatile ("\n"
+        "cmp    r0, #1\n"
+        "bxne   lr\n"
+        "b      cci_enable_port_for_self");
+}
+static const struct of_device_id exynos_dt_mcpm_match[] = {
+        { .compatible = "samsung,exynos5420" },
+        { .compatible = "samsung,exynos5800" },
+        {},
+};
+static int __init exynos_mcpm_init(void)
+{
+        struct device_node *node;
+        void __iomem *ns_sram_base_addr;
+        int ret;
+        node = of_find_matching_node(NULL, exynos_dt_mcpm_match);
+        if (!node)
+                return -ENODEV;
+        of_node_put(node);
+        if (!cci_probed())
+                return -ENODEV;
+        node = of_find_compatible_node(NULL, NULL,
+                        "samsung,exynos4210-sysram-ns");
+        if (!node)
+                return -ENODEV;
+        ns_sram_base_addr = of_iomap(node, 0);
+        of_node_put(node);
+        if (!ns_sram_base_addr) {
+                pr_err("failed to map non-secure iRAM base address\n");
+                return -ENOMEM;
+        }
+        /*
+         * To increase the stability of KFC reset we need to program
+         * the PMU SPARE3 register
+         */
+        __raw_writel(EXYNOS5420_SWRESET_KFC_SEL, S5P_PMU_SPARE3);
+        exynos_mcpm_usage_count_init();
+        ret = mcpm_platform_register(&exynos_power_ops);
+        if (!ret)
+                ret = mcpm_sync_init(exynos_pm_power_up_setup);
+        if (ret) {
+                iounmap(ns_sram_base_addr);
+                return ret;
+        }
+        mcpm_smp_set_ops();
+        pr_info("Exynos MCPM support installed\n");
+        /*
+         * Future entries into the kernel can now go
+         * through the cluster entry vectors.
+         */
+        __raw_writel(virt_to_phys(mcpm_entry_point),
+                        ns_sram_base_addr + MCPM_BOOT_ADDR_OFFSET);
+        iounmap(ns_sram_base_addr);
+        return ret;
+}
+early_initcall(exynos_mcpm_init);
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index c11c5418e0fc..112bc66927a1 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -27,8 +27,6 @@
 #include <asm/smp_scu.h>
 #include <asm/firmware.h>
-#include <plat/cpu.h>
 #include "common.h"
 #include "regs-pmu.h"
@@ -72,7 +70,7 @@ static inline void __iomem *cpu_boot_reg(int cpu)
                return ERR_PTR(-ENODEV);
        if (soc_is_exynos4412())
                boot_reg += 4*cpu;
-        else if (soc_is_exynos5420())
+        else if (soc_is_exynos5420() || soc_is_exynos5800())
                boot_reg += 4;
        return boot_reg;
 }
@@ -133,15 +131,12 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
         */
        write_pen_release(phys_cpu);
-        if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) {
+        if (!exynos_cpu_power_state(cpu)) {
-                __raw_writel(S5P_CORE_LOCAL_PWR_EN,
+                exynos_cpu_power_up(cpu);
-                             S5P_ARM_CORE1_CONFIGURATION);
                timeout = 10;
                /* wait max 10 ms until cpu1 is on */
-                while ((__raw_readl(S5P_ARM_CORE1_STATUS)
+                while (exynos_cpu_power_state(cpu) != S5P_CORE_LOCAL_PWR_EN) {
-                        & S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN) {
                        if (timeout-- == 0)
                                break;
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 15af0ceb0a66..aba2ff6e443d 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -26,7 +26,6 @@
 #include <asm/smp_scu.h>
 #include <asm/suspend.h>
-#include <plat/cpu.h>
 #include <plat/pm-common.h>
 #include <plat/pll.h>
 #include <plat/regs-srom.h>
@@ -100,6 +99,72 @@ static int exynos_irq_set_wake(struct irq_data *data, unsigned int state)
        return -ENOENT;
 }
+/**
+ * exynos_core_power_down : power down the specified cpu
+ * @cpu : the cpu to power down
+ *
+ * Power down the specified cpu. The sequence must be finished by a
+ * call to cpu_do_idle()
+ *
+ */
+void exynos_cpu_power_down(int cpu)
+{
+        __raw_writel(0, EXYNOS_ARM_CORE_CONFIGURATION(cpu));
+}
+/**
+ * exynos_cpu_power_up : power up the specified cpu
+ * @cpu : the cpu to power up
+ *
+ * Power up the specified cpu
+ */
+void exynos_cpu_power_up(int cpu)
+{
+        __raw_writel(S5P_CORE_LOCAL_PWR_EN,
+                     EXYNOS_ARM_CORE_CONFIGURATION(cpu));
+}
+/**
+ * exynos_cpu_power_state : returns the power state of the cpu
+ * @cpu : the cpu to retrieve the power state from
+ *
+ */
+int exynos_cpu_power_state(int cpu)
+{
+        return (__raw_readl(EXYNOS_ARM_CORE_STATUS(cpu)) &
+                        S5P_CORE_LOCAL_PWR_EN);
+}
+/**
+ * exynos_cluster_power_down : power down the specified cluster
+ * @cluster : the cluster to power down
+ */
+void exynos_cluster_power_down(int cluster)
+{
+        __raw_writel(0, EXYNOS_COMMON_CONFIGURATION(cluster));
+}
+/**
+ * exynos_cluster_power_up : power up the specified cluster
+ * @cluster : the cluster to power up
+ */
+void exynos_cluster_power_up(int cluster)
+{
+        __raw_writel(S5P_CORE_LOCAL_PWR_EN,
+                     EXYNOS_COMMON_CONFIGURATION(cluster));
+}
+/**
+ * exynos_cluster_power_state : returns the power state of the cluster
+ * @cluster : the cluster to retrieve the power state from
+ *
+ */
+int exynos_cluster_power_state(int cluster)
+{
+        return (__raw_readl(EXYNOS_COMMON_STATUS(cluster)) &
+                        S5P_CORE_LOCAL_PWR_EN);
+}
 /* For Cortex-A9 Diagnostic and Power control register */
 static unsigned int save_arm_register[2];
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 05c7ce15322a..fb0deda3b3a4 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -13,8 +13,6 @@
 #include <linux/kernel.h>
 #include <linux/bug.h>
-#include <plat/cpu.h>
 #include "common.h"
 #include "regs-pmu.h"
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index 4f6a2560d022..4179f6a6d595 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -38,6 +38,7 @@
 #define S5P_INFORM5                             S5P_PMUREG(0x0814)
 #define S5P_INFORM6                             S5P_PMUREG(0x0818)
 #define S5P_INFORM7                             S5P_PMUREG(0x081C)
+#define S5P_PMU_SPARE3                          S5P_PMUREG(0x090C)
 #define S5P_ARM_CORE0_LOWPWR                    S5P_PMUREG(0x1000)
 #define S5P_DIS_IRQ_CORE0                       S5P_PMUREG(0x1004)
@@ -105,8 +106,17 @@
 #define S5P_GPS_LOWPWR                          S5P_PMUREG(0x139C)
 #define S5P_GPS_ALIVE_LOWPWR                    S5P_PMUREG(0x13A0)
-#define S5P_ARM_CORE1_CONFIGURATION             S5P_PMUREG(0x2080)
+#define EXYNOS_ARM_CORE0_CONFIGURATION          S5P_PMUREG(0x2000)
-#define S5P_ARM_CORE1_STATUS                    S5P_PMUREG(0x2084)
+#define EXYNOS_ARM_CORE_CONFIGURATION(_nr)      \
+                        (EXYNOS_ARM_CORE0_CONFIGURATION + (0x80 * (_nr)))
+#define EXYNOS_ARM_CORE_STATUS(_nr)             \
+                        (EXYNOS_ARM_CORE_CONFIGURATION(_nr) + 0x4)
+#define EXYNOS_ARM_COMMON_CONFIGURATION         S5P_PMUREG(0x2500)
+#define EXYNOS_COMMON_CONFIGURATION(_nr)        \
+                        (EXYNOS_ARM_COMMON_CONFIGURATION + (0x80 * (_nr)))
+#define EXYNOS_COMMON_STATUS(_nr)               \
+                        (EXYNOS_COMMON_CONFIGURATION(_nr) + 0x4)
 #define S5P_PAD_RET_MAUDIO_OPTION               S5P_PMUREG(0x3028)
 #define S5P_PAD_RET_GPIO_OPTION                 S5P_PMUREG(0x3108)
@@ -313,4 +323,6 @@
 #define EXYNOS5_OPTION_USE_RETENTION                            (1 << 4)
+#define EXYNOS5420_SWRESET_KFC_SEL                              0x3
 #endif /* __ASM_ARCH_REGS_PMU_H */
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5740296dc429..8d42eab76d53 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -702,61 +702,6 @@ endif
 if ARCH_MULTI_V7
-comment "i.MX51 machines:"
-config MACH_IMX51_DT
-        bool "Support i.MX51 platforms from device tree"
-        select SOC_IMX51
-        help
-          Include support for Freescale i.MX51 based platforms
-          using the device tree for discovery
-config MACH_MX51_BABBAGE
-        bool "Support MX51 BABBAGE platforms"
-        select IMX_HAVE_PLATFORM_FSL_USB2_UDC
-        select IMX_HAVE_PLATFORM_IMX2_WDT
-        select IMX_HAVE_PLATFORM_IMX_I2C
-        select IMX_HAVE_PLATFORM_IMX_UART
-        select IMX_HAVE_PLATFORM_MXC_EHCI
-        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
-        select IMX_HAVE_PLATFORM_SPI_IMX
-        select SOC_IMX51
-        help
-          Include support for MX51 Babbage platform, also known as MX51EVK in
-          u-boot. This includes specific configurations for the board and its
-          peripherals.
-config MACH_EUKREA_CPUIMX51SD
-        bool "Support Eukrea CPUIMX51SD module"
-        select IMX_HAVE_PLATFORM_FSL_USB2_UDC
-        select IMX_HAVE_PLATFORM_IMX2_WDT
-        select IMX_HAVE_PLATFORM_IMX_I2C
-        select IMX_HAVE_PLATFORM_IMX_UART
-        select IMX_HAVE_PLATFORM_MXC_EHCI
-        select IMX_HAVE_PLATFORM_MXC_NAND
-        select IMX_HAVE_PLATFORM_SPI_IMX
-        select SOC_IMX51
-        help
-          Include support for Eukrea CPUIMX51SD platform. This includes
-          specific configurations for the module and its peripherals.
-choice
-        prompt "Baseboard"
-        depends on MACH_EUKREA_CPUIMX51SD
-        default MACH_EUKREA_MBIMXSD51_BASEBOARD
-config MACH_EUKREA_MBIMXSD51_BASEBOARD
-        prompt "Eukrea MBIMXSD development board"
-        bool
-        select IMX_HAVE_PLATFORM_IMX_SSI
-        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
-        select LEDS_GPIO_REGISTER
-        help
-          This adds board specific devices that can be found on Eukrea's
-          MBIMXSD evaluation board.
-endchoice
 comment "Device tree only"
 config  SOC_IMX50
@@ -768,6 +713,12 @@ config	SOC_IMX50
        help
          This enables support for Freescale i.MX50 processor.
+config MACH_IMX51_DT
+        bool "i.MX51 support"
+        select SOC_IMX51
+        help
+          This enables support for Freescale i.MX51 processor
 config  SOC_IMX53
        bool "i.MX53 support"
        select HAVE_IMX_SRC
@@ -796,7 +747,6 @@ config SOC_IMX6Q
        select ARM_ERRATA_764369 if SMP
        select HAVE_ARM_SCU if SMP
        select HAVE_ARM_TWD if SMP
-        select MIGHT_HAVE_PCI
        select PCI_DOMAINS if PCI
        select PINCTRL_IMX6Q
        select SOC_IMX6
@@ -812,6 +762,14 @@ config SOC_IMX6SL
        help
          This enables support for Freescale i.MX6 SoloLite processor.
+config SOC_IMX6SX
+        bool "i.MX6 SoloX support"
+        select PINCTRL_IMX6SX
+        select SOC_IMX6
+        help
+          This enables support for Freescale i.MX6 SoloX processor.
 config SOC_VF610
        bool "Vybrid Family VF610 support"
        select ARM_GIC
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index f4ed83032dd0..bbe93bbfd003 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -101,6 +101,7 @@ obj-$(CONFIG_SMP) += headsmp.o platsmp.o
 obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
 obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o
 obj-$(CONFIG_SOC_IMX6SL) += clk-imx6sl.o mach-imx6sl.o
+obj-$(CONFIG_SOC_IMX6SX) += clk-imx6sx.o mach-imx6sx.o
 ifeq ($(CONFIG_SUSPEND),y)
 AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a
@@ -108,11 +109,6 @@ obj-$(CONFIG_SOC_IMX6) += suspend-imx6.o
 endif
 obj-$(CONFIG_SOC_IMX6) += pm-imx6.o
-# i.MX5 based machines
-obj-$(CONFIG_MACH_MX51_BABBAGE) += mach-mx51_babbage.o
-obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += mach-cpuimx51sd.o
-obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd51-baseboard.o
 obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
 obj-$(CONFIG_SOC_IMX50) += mach-imx50.o
 obj-$(CONFIG_SOC_IMX53) += mach-imx53.o
diff --git a/arch/arm/mach-imx/avic.c b/arch/arm/mach-imx/avic.c
index 8d1df2e4b7ac..24b103c67f82 100644
--- a/arch/arm/mach-imx/avic.c
+++ b/arch/arm/mach-imx/avic.c
@@ -135,7 +135,7 @@ static __init void avic_init_gc(int idx, unsigned int irq_start)
        irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0);
 }
-asmlinkage void __exception_irq_entry avic_handle_irq(struct pt_regs *regs)
+static void __exception_irq_entry avic_handle_irq(struct pt_regs *regs)
 {
        u32 nivector;
@@ -190,6 +190,8 @@ void __init mxc_init_irq(void __iomem *irqbase)
        for (i = 0; i < 8; i++)
                __raw_writel(0, avic_base + AVIC_NIPRIORITY(i));
+        set_handle_irq(avic_handle_irq);
 #ifdef CONFIG_FIQ
        /* Initialize FIQ */
        init_FIQ(FIQ_START);
diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c
index a2ecc006b322..4ba587da89d2 100644
--- a/arch/arm/mach-imx/clk-gate2.c
+++ b/arch/arm/mach-imx/clk-gate2.c
@@ -27,48 +27,61 @@
 * parent - fixed parent.  No clk_set_parent support
 */
-#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
+struct clk_gate2 {
+        struct clk_hw hw;
+        void __iomem    *reg;
+        u8              bit_idx;
+        u8              flags;
+        spinlock_t      *lock;
+        unsigned int    *share_count;
+};
+#define to_clk_gate2(_hw) container_of(_hw, struct clk_gate2, hw)
 static int clk_gate2_enable(struct clk_hw *hw)
 {
-        struct clk_gate *gate = to_clk_gate(hw);
+        struct clk_gate2 *gate = to_clk_gate2(hw);
        u32 reg;
        unsigned long flags = 0;
-        if (gate->lock)
+        spin_lock_irqsave(gate->lock, flags);
-                spin_lock_irqsave(gate->lock, flags);
+        if (gate->share_count && (*gate->share_count)++ > 0)
+                goto out;
        reg = readl(gate->reg);
        reg |= 3 << gate->bit_idx;
        writel(reg, gate->reg);
-        if (gate->lock)
+out:
-                spin_unlock_irqrestore(gate->lock, flags);
+        spin_unlock_irqrestore(gate->lock, flags);
        return 0;
 }
 static void clk_gate2_disable(struct clk_hw *hw)
 {
-        struct clk_gate *gate = to_clk_gate(hw);
+        struct clk_gate2 *gate = to_clk_gate2(hw);
        u32 reg;
        unsigned long flags = 0;
-        if (gate->lock)
+        spin_lock_irqsave(gate->lock, flags);
-                spin_lock_irqsave(gate->lock, flags);
+        if (gate->share_count && --(*gate->share_count) > 0)
+                goto out;
        reg = readl(gate->reg);
        reg &= ~(3 << gate->bit_idx);
        writel(reg, gate->reg);
-        if (gate->lock)
+out:
-                spin_unlock_irqrestore(gate->lock, flags);
+        spin_unlock_irqrestore(gate->lock, flags);
 }
 static int clk_gate2_is_enabled(struct clk_hw *hw)
 {
        u32 reg;
-        struct clk_gate *gate = to_clk_gate(hw);
+        struct clk_gate2 *gate = to_clk_gate2(hw);
        reg = readl(gate->reg);
@@ -87,21 +100,23 @@ static struct clk_ops clk_gate2_ops = {
 struct clk *clk_register_gate2(struct device *dev, const char *name,
                const char *parent_name, unsigned long flags,
                void __iomem *reg, u8 bit_idx,
-                u8 clk_gate2_flags, spinlock_t *lock)
+                u8 clk_gate2_flags, spinlock_t *lock,
+                unsigned int *share_count)
 {
-        struct clk_gate *gate;
+        struct clk_gate2 *gate;
        struct clk *clk;
        struct clk_init_data init;
-        gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL);
+        gate = kzalloc(sizeof(struct clk_gate2), GFP_KERNEL);
        if (!gate)
                return ERR_PTR(-ENOMEM);
-        /* struct clk_gate assignments */
+        /* struct clk_gate2 assignments */
        gate->reg = reg;
        gate->bit_idx = bit_idx;
        gate->flags = clk_gate2_flags;
        gate->lock = lock;
+        gate->share_count = share_count;
        init.name = name;
        init.ops = &clk_gate2_ops;
diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c
index 15f9d223cf0b..7f739be3de2c 100644
--- a/arch/arm/mach-imx/clk-imx1.c
+++ b/arch/arm/mach-imx/clk-imx1.c
@@ -40,12 +40,14 @@
 #define SCM_GCCR        IO_ADDR_SCM(0xc)
 static const char *prem_sel_clks[] = { "clk32_premult", "clk16m", };
-static const char *clko_sel_clks[] = { "per1", "hclk", "clk48m", "clk16m", "prem",
+static const char *clko_sel_clks[] = { "per1", "hclk", "clk48m", "clk16m",
-                                "fclk", };
+                                       "prem", "fclk", };
 enum imx1_clks {
-        dummy, clk32, clk16m_ext, clk16m, clk32_premult, prem, mpll, spll, mcu,
+        dummy, clk32, clk16m_ext, clk16m, clk32_premult, prem, mpll, mpll_gate,
-        fclk, hclk, clk48m, per1, per2, per3, clko, dma_gate, csi_gate,
+        spll, spll_gate, mcu, fclk, hclk, clk48m, per1, per2, per3, clko,
-        mma_gate, usbd_gate, clk_max
+        uart3_gate, ssi2_gate, brom_gate, dma_gate, csi_gate, mma_gate,
+        usbd_gate, clk_max
 };
 static struct clk *clk[clk_max];
@@ -62,17 +64,22 @@ int __init mx1_clocks_init(unsigned long fref)
        clk[prem] = imx_clk_mux("prem", CCM_CSCR, 16, 1, prem_sel_clks,
                        ARRAY_SIZE(prem_sel_clks));
        clk[mpll] = imx_clk_pllv1("mpll", "clk32_premult", CCM_MPCTL0);
+        clk[mpll_gate] = imx_clk_gate("mpll_gate", "mpll", CCM_CSCR, 0);
        clk[spll] = imx_clk_pllv1("spll", "prem", CCM_SPCTL0);
+        clk[spll_gate] = imx_clk_gate("spll_gate", "spll", CCM_CSCR, 1);
        clk[mcu] = imx_clk_divider("mcu", "clk32_premult", CCM_CSCR, 15, 1);
-        clk[fclk] = imx_clk_divider("fclk", "mpll", CCM_CSCR, 15, 1);
+        clk[fclk] = imx_clk_divider("fclk", "mpll_gate", CCM_CSCR, 15, 1);
-        clk[hclk] = imx_clk_divider("hclk", "spll", CCM_CSCR, 10, 4);
+        clk[hclk] = imx_clk_divider("hclk", "spll_gate", CCM_CSCR, 10, 4);
-        clk[clk48m] = imx_clk_divider("clk48m", "spll", CCM_CSCR, 26, 3);
+        clk[clk48m] = imx_clk_divider("clk48m", "spll_gate", CCM_CSCR, 26, 3);
-        clk[per1] = imx_clk_divider("per1", "spll", CCM_PCDR, 0, 4);
+        clk[per1] = imx_clk_divider("per1", "spll_gate", CCM_PCDR, 0, 4);
-        clk[per2] = imx_clk_divider("per2", "spll", CCM_PCDR, 4, 4);
+        clk[per2] = imx_clk_divider("per2", "spll_gate", CCM_PCDR, 4, 4);
-        clk[per3] = imx_clk_divider("per3", "spll", CCM_PCDR, 16, 7);
+        clk[per3] = imx_clk_divider("per3", "spll_gate", CCM_PCDR, 16, 7);
        clk[clko] = imx_clk_mux("clko", CCM_CSCR, 29, 3, clko_sel_clks,
                        ARRAY_SIZE(clko_sel_clks));
-        clk[dma_gate] = imx_clk_gate("dma_gate", "hclk", SCM_GCCR, 4);
+        clk[uart3_gate] = imx_clk_gate("uart3_gate", "hclk", SCM_GCCR, 6);
+        clk[ssi2_gate] = imx_clk_gate("ssi2_gate", "hclk", SCM_GCCR, 5);
+        clk[brom_gate] = imx_clk_gate("brom_gate", "hclk", SCM_GCCR, 4);
+        clk[dma_gate] = imx_clk_gate("dma_gate", "hclk", SCM_GCCR, 3);
        clk[csi_gate] = imx_clk_gate("csi_gate", "hclk", SCM_GCCR, 2);
        clk[mma_gate] = imx_clk_gate("mma_gate", "hclk", SCM_GCCR, 1);
        clk[usbd_gate] = imx_clk_gate("usbd_gate", "clk48m", SCM_GCCR, 0);
@@ -84,9 +91,6 @@ int __init mx1_clocks_init(unsigned long fref)
        clk_register_clkdev(clk[dma_gate], "ahb", "imx1-dma");
        clk_register_clkdev(clk[hclk], "ipg", "imx1-dma");
-        clk_register_clkdev(clk[csi_gate], NULL, "mx1-camera.0");
-        clk_register_clkdev(clk[mma_gate], "mma", NULL);
-        clk_register_clkdev(clk[usbd_gate], NULL, "imx_udc.0");
        clk_register_clkdev(clk[per1], "per", "imx-gpt.0");
        clk_register_clkdev(clk[hclk], "ipg", "imx-gpt.0");
        clk_register_clkdev(clk[per1], "per", "imx1-uart.0");
@@ -94,20 +98,15 @@ int __init mx1_clocks_init(unsigned long fref)
        clk_register_clkdev(clk[per1], "per", "imx1-uart.1");
        clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.1");
        clk_register_clkdev(clk[per1], "per", "imx1-uart.2");
-        clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.2");
+        clk_register_clkdev(clk[uart3_gate], "ipg", "imx1-uart.2");
        clk_register_clkdev(clk[hclk], NULL, "imx1-i2c.0");
        clk_register_clkdev(clk[per2], "per", "imx1-cspi.0");
        clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.0");
        clk_register_clkdev(clk[per2], "per", "imx1-cspi.1");
        clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.1");
-        clk_register_clkdev(clk[per2], NULL, "imx-mmc.0");
        clk_register_clkdev(clk[per2], "per", "imx1-fb.0");
        clk_register_clkdev(clk[dummy], "ipg", "imx1-fb.0");
        clk_register_clkdev(clk[dummy], "ahb", "imx1-fb.0");
-        clk_register_clkdev(clk[hclk], "mshc", NULL);
-        clk_register_clkdev(clk[per3], "ssi", NULL);
-        clk_register_clkdev(clk[clk32], NULL, "imx1-rtc.0");
-        clk_register_clkdev(clk[clko], "clko", NULL);
        mxc_timer_init(MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), MX1_TIM1_INT);
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index dc36e6c2f1da..ae578c096ad8 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -62,6 +62,10 @@ static struct clk_onecell_data clk_data;
 static const char *cpu_sel_clks[] = { "mpll", "mpll_cpu_3_4", };
 static const char *per_sel_clks[] = { "ahb", "upll", };
+static const char *cko_sel_clks[] = { "dummy", "osc", "cpu", "ahb",
+                                      "ipg", "dummy", "dummy", "dummy",
+                                      "dummy", "dummy", "per0", "per2",
+                                      "per13", "per14", "usbotg_ahb", "dummy",};
 enum mx25_clks {
        dummy, osc, mpll, upll, mpll_cpu_3_4, cpu_sel, cpu, ahb, usb_div, ipg,
@@ -82,7 +86,7 @@ enum mx25_clks {
        pwm2_ipg, pwm3_ipg, pwm4_ipg, rngb_ipg, reserved16, scc_ipg, sdma_ipg,
        sim1_ipg, sim2_ipg, slcdc_ipg, spba_ipg, ssi1_ipg, ssi2_ipg, tsc_ipg,
        uart1_ipg, uart2_ipg, uart3_ipg, uart4_ipg, uart5_ipg, reserved17,
-        wdt_ipg, clk_max
+        wdt_ipg, cko_div, cko_sel, cko, clk_max
 };
 static struct clk *clk[clk_max];
@@ -117,6 +121,9 @@ static int __init __mx25_clocks_init(unsigned long osc_rate)
        clk[per13_sel] = imx_clk_mux("per13_sel", ccm(CCM_MCR), 13, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));
        clk[per14_sel] = imx_clk_mux("per14_sel", ccm(CCM_MCR), 14, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));
        clk[per15_sel] = imx_clk_mux("per15_sel", ccm(CCM_MCR), 15, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));
+        clk[cko_div] = imx_clk_divider("cko_div", "cko_sel", ccm(CCM_MCR), 24, 6);
+        clk[cko_sel] = imx_clk_mux("cko_sel", ccm(CCM_MCR), 20, 4, cko_sel_clks, ARRAY_SIZE(cko_sel_clks));
+        clk[cko] = imx_clk_gate("cko", "cko_div", ccm(CCM_MCR),  30);
        clk[per0] = imx_clk_divider("per0", "per0_sel", ccm(CCM_PCDR0), 0, 6);
        clk[per1] = imx_clk_divider("per1", "per1_sel", ccm(CCM_PCDR0), 8, 6);
        clk[per2] = imx_clk_divider("per2", "per2_sel", ccm(CCM_PCDR0), 16, 6);
@@ -230,6 +237,12 @@ static int __init __mx25_clocks_init(unsigned long osc_rate)
        clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");
        clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
+        /*
+         * Let's initially set up CLKO parent as ipg, since this configuration
+         * is used on some imx25 board designs to clock the audio codec.
+         */
+        clk_set_parent(clk[cko_sel], clk[ipg]);
        return 0;
 }
@@ -304,8 +317,6 @@ int __init mx25_clocks_init(void)
 int __init mx25_clocks_init_dt(void)
 {
        struct device_node *np;
-        void __iomem *base;
-        int irq;
        unsigned long osc_rate = 24000000;
        /* retrieve the freqency of fixed clocks from device tree */
@@ -325,12 +336,7 @@ int __init mx25_clocks_init_dt(void)
        __mx25_clocks_init(osc_rate);
-        np = of_find_compatible_node(NULL, NULL, "fsl,imx25-gpt");
+        mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx25-gpt"));
-        base = of_iomap(np, 0);
-        WARN_ON(!base);
-        irq = irq_of_parse_and_map(np, 0);
-        mxc_timer_init(base, irq);
        return 0;
 }
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index d2da8908b268..317a662626d6 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -82,7 +82,8 @@ enum mx27_clks {
        csi_ahb_gate, brom_ahb_gate, ata_ahb_gate, wdog_ipg_gate, usb_ipg_gate,
        uart6_ipg_gate, uart5_ipg_gate, uart4_ipg_gate, uart3_ipg_gate,
        uart2_ipg_gate, uart1_ipg_gate, ckih_div1p5, fpm, mpll_osc_sel,
-        mpll_sel, spll_gate, clk_max
+        mpll_sel, spll_gate, mshc_div, rtic_ipg_gate, mshc_ipg_gate,
+        rtic_ahb_gate, mshc_baud_gate, clk_max
 };
 static struct clk *clk[clk_max];
@@ -117,6 +118,7 @@ int __init mx27_clocks_init(unsigned long fref)
                clk[ipg] = imx_clk_divider("ipg", "ahb", CCM_CSCR, 8, 1);
        }
+        clk[mshc_div] = imx_clk_divider("mshc_div", "ahb", CCM_PCDR0, 0, 6);
        clk[nfc_div] = imx_clk_divider("nfc_div", "ahb", CCM_PCDR0, 6, 4);
        clk[per1_div] = imx_clk_divider("per1_div", "mpll_main2", CCM_PCDR1, 0, 6);
        clk[per2_div] = imx_clk_divider("per2_div", "mpll_main2", CCM_PCDR1, 8, 6);
@@ -145,9 +147,11 @@ int __init mx27_clocks_init(unsigned long fref)
        clk[sdhc1_ipg_gate] = imx_clk_gate("sdhc1_ipg_gate", "ipg", CCM_PCCR0, 5);
        clk[scc_ipg_gate] = imx_clk_gate("scc_ipg_gate", "ipg", CCM_PCCR0, 6);
        clk[sahara_ipg_gate] = imx_clk_gate("sahara_ipg_gate", "ipg", CCM_PCCR0, 7);
+        clk[rtic_ipg_gate] = imx_clk_gate("rtic_ipg_gate", "ipg", CCM_PCCR0, 8);
        clk[rtc_ipg_gate] = imx_clk_gate("rtc_ipg_gate", "ipg", CCM_PCCR0, 9);
        clk[pwm_ipg_gate] = imx_clk_gate("pwm_ipg_gate", "ipg", CCM_PCCR0, 11);
        clk[owire_ipg_gate] = imx_clk_gate("owire_ipg_gate", "ipg", CCM_PCCR0, 12);
+        clk[mshc_ipg_gate] = imx_clk_gate("mshc_ipg_gate", "ipg", CCM_PCCR0, 13);
        clk[lcdc_ipg_gate] = imx_clk_gate("lcdc_ipg_gate", "ipg", CCM_PCCR0, 14);
        clk[kpp_ipg_gate] = imx_clk_gate("kpp_ipg_gate", "ipg", CCM_PCCR0, 15);
        clk[iim_ipg_gate] = imx_clk_gate("iim_ipg_gate", "ipg", CCM_PCCR0, 16);
@@ -166,6 +170,7 @@ int __init mx27_clocks_init(unsigned long fref)
        clk[cspi3_ipg_gate] = imx_clk_gate("cspi3_ipg_gate", "ipg", CCM_PCCR0, 29);
        clk[cspi2_ipg_gate] = imx_clk_gate("cspi2_ipg_gate", "ipg", CCM_PCCR0, 30);
        clk[cspi1_ipg_gate] = imx_clk_gate("cspi1_ipg_gate", "ipg", CCM_PCCR0, 31);
+        clk[mshc_baud_gate] = imx_clk_gate("mshc_baud_gate", "mshc_div", CCM_PCCR1, 2);
        clk[nfc_baud_gate] = imx_clk_gate("nfc_baud_gate", "nfc_div", CCM_PCCR1,  3);
        clk[ssi2_baud_gate] = imx_clk_gate("ssi2_baud_gate", "ssi2_div", CCM_PCCR1,  4);
        clk[ssi1_baud_gate] = imx_clk_gate("ssi1_baud_gate", "ssi1_div", CCM_PCCR1,  5);
@@ -177,6 +182,7 @@ int __init mx27_clocks_init(unsigned long fref)
        clk[usb_ahb_gate] = imx_clk_gate("usb_ahb_gate", "ahb", CCM_PCCR1, 11);
        clk[slcdc_ahb_gate] = imx_clk_gate("slcdc_ahb_gate", "ahb", CCM_PCCR1, 12);
        clk[sahara_ahb_gate] = imx_clk_gate("sahara_ahb_gate", "ahb", CCM_PCCR1, 13);
+        clk[rtic_ahb_gate] = imx_clk_gate("rtic_ahb_gate", "ahb", CCM_PCCR1, 14);
        clk[lcdc_ahb_gate] = imx_clk_gate("lcdc_ahb_gate", "ahb", CCM_PCCR1, 15);
        clk[vpu_ahb_gate] = imx_clk_gate("vpu_ahb_gate", "ahb", CCM_PCCR1, 16);
        clk[fec_ahb_gate] = imx_clk_gate("fec_ahb_gate", "ahb", CCM_PCCR1, 17);
@@ -221,16 +227,6 @@ int __init mx27_clocks_init(unsigned long fref)
        clk_register_clkdev(clk[per1_gate], "per", "imx21-uart.5");
        clk_register_clkdev(clk[gpt1_ipg_gate], "ipg", "imx-gpt.0");
        clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.0");
-        clk_register_clkdev(clk[gpt2_ipg_gate], "ipg", "imx-gpt.1");
-        clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.1");
-        clk_register_clkdev(clk[gpt3_ipg_gate], "ipg", "imx-gpt.2");
-        clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.2");
-        clk_register_clkdev(clk[gpt4_ipg_gate], "ipg", "imx-gpt.3");
-        clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.3");
-        clk_register_clkdev(clk[gpt5_ipg_gate], "ipg", "imx-gpt.4");
-        clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.4");
-        clk_register_clkdev(clk[gpt6_ipg_gate], "ipg", "imx-gpt.5");
-        clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.5");
        clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.0");
        clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "imx21-mmc.0");
        clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.1");
@@ -278,14 +274,7 @@ int __init mx27_clocks_init(unsigned long fref)
        clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "imx27-camera.0");
        clk_register_clkdev(clk[emma_ahb_gate], "ahb", "m2m-emmaprp.0");
        clk_register_clkdev(clk[emma_ipg_gate], "ipg", "m2m-emmaprp.0");
-        clk_register_clkdev(clk[iim_ipg_gate], "iim", NULL);
-        clk_register_clkdev(clk[gpio_ipg_gate], "gpio", NULL);
-        clk_register_clkdev(clk[brom_ahb_gate], "brom", NULL);
-        clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL);
-        clk_register_clkdev(clk[rtc_ipg_gate], NULL, "imx21-rtc");
-        clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL);
        clk_register_clkdev(clk[cpu_div], NULL, "cpu0");
-        clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL);
        mxc_timer_init(MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), MX27_INT_GPT1);
@@ -296,7 +285,6 @@ int __init mx27_clocks_init(unsigned long fref)
        return 0;
 }
-#ifdef CONFIG_OF
 int __init mx27_clocks_init_dt(void)
 {
        struct device_node *np;
@@ -312,4 +300,3 @@ int __init mx27_clocks_init_dt(void)
        return mx27_clocks_init(fref);
 }
-#endif
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c
index b5b65f3efaf1..4a9de0835eb1 100644
--- a/arch/arm/mach-imx/clk-imx31.c
+++ b/arch/arm/mach-imx/clk-imx31.c
@@ -191,7 +191,6 @@ int __init mx31_clocks_init(unsigned long fref)
        return 0;
 }
-#ifdef CONFIG_OF
 int __init mx31_clocks_init_dt(void)
 {
        struct device_node *np;
@@ -207,4 +206,3 @@ int __init mx31_clocks_init_dt(void)
        return mx31_clocks_init(fref);
 }
-#endif
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index 568ef0a4de84..21d2b111c83d 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -322,9 +322,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
 static void __init mx50_clocks_init(struct device_node *np)
 {
-        void __iomem *base;
        unsigned long r;
-        int i, irq;
+        int i;
        clk[IMX5_CLK_PLL1_SW]           = imx_clk_pllv2("pll1_sw", "osc", MX53_DPLL1_BASE);
        clk[IMX5_CLK_PLL2_SW]           = imx_clk_pllv2("pll2_sw", "osc", MX53_DPLL2_BASE);
@@ -372,11 +371,7 @@ static void __init mx50_clocks_init(struct device_node *np)
        r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
        clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
-        np = of_find_compatible_node(NULL, NULL, "fsl,imx50-gpt");
+        mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx50-gpt"));
-        base = of_iomap(np, 0);
-        WARN_ON(!base);
-        irq = irq_of_parse_and_map(np, 0);
-        mxc_timer_init(base, irq);
 }
 CLK_OF_DECLARE(imx50_ccm, "fsl,imx50-ccm", mx50_clocks_init);
@@ -436,7 +431,6 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
        clk_register_clkdev(clk[IMX5_CLK_HSI2C_GATE], NULL, "imx21-i2c.2");
        clk_register_clkdev(clk[IMX5_CLK_MX51_MIPI], "mipi_hsp", NULL);
-        clk_register_clkdev(clk[IMX5_CLK_VPU_GATE], NULL, "imx51-vpu.0");
        clk_register_clkdev(clk[IMX5_CLK_FEC_GATE], NULL, "imx27-fec.0");
        clk_register_clkdev(clk[IMX5_CLK_USB_PHY_GATE], "phy", "mxc-ehci.0");
        clk_register_clkdev(clk[IMX5_CLK_ESDHC1_IPG_GATE], "ipg", "sdhci-esdhc-imx51.0");
@@ -492,9 +486,8 @@ CLK_OF_DECLARE(imx51_ccm, "fsl,imx51-ccm", mx51_clocks_init_dt);
 static void __init mx53_clocks_init(struct device_node *np)
 {
-        int i, irq;
+        int i;
        unsigned long r;
-        void __iomem *base;
        clk[IMX5_CLK_PLL1_SW]           = imx_clk_pllv2("pll1_sw", "osc", MX53_DPLL1_BASE);
        clk[IMX5_CLK_PLL2_SW]           = imx_clk_pllv2("pll2_sw", "osc", MX53_DPLL2_BASE);
@@ -561,7 +554,6 @@ static void __init mx53_clocks_init(struct device_node *np)
        mx5_clocks_common_init(0, 0, 0, 0);
-        clk_register_clkdev(clk[IMX5_CLK_VPU_GATE], NULL, "imx53-vpu.0");
        clk_register_clkdev(clk[IMX5_CLK_I2C3_GATE], NULL, "imx21-i2c.2");
        clk_register_clkdev(clk[IMX5_CLK_FEC_GATE], NULL, "imx25-fec.0");
        clk_register_clkdev(clk[IMX5_CLK_USB_PHY1_GATE], "usb_phy1", "mxc-ehci.0");
@@ -592,10 +584,6 @@ static void __init mx53_clocks_init(struct device_node *np)
        r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
        clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
-        np = of_find_compatible_node(NULL, NULL, "fsl,imx53-gpt");
+        mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx53-gpt"));
-        base = of_iomap(np, 0);
-        WARN_ON(!base);
-        irq = irq_of_parse_and_map(np, 0);
-        mxc_timer_init(base, irq);
 }
 CLK_OF_DECLARE(imx53_ccm, "fsl,imx53-ccm", mx53_clocks_init);
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 2b4d6acfa34a..8e795dea02ec 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -107,7 +107,7 @@ enum mx6q_clks {
        sata_ref, sata_ref_100m, pcie_ref, pcie_ref_125m, enet_ref, usbphy1_gate,
        usbphy2_gate, pll4_post_div, pll5_post_div, pll5_video_div, eim_slow,
        spdif, cko2_sel, cko2_podf, cko2, cko, vdoa, pll4_audio_div,
-        lvds1_sel, lvds2_sel, lvds1_gate, lvds2_gate, clk_max
+        lvds1_sel, lvds2_sel, lvds1_gate, lvds2_gate, esai_ahb, clk_max
 };
 static struct clk *clk[clk_max];
@@ -140,11 +140,13 @@ static struct clk_div_table video_div_table[] = {
        { /* sentinel */ }
 };
+static unsigned int share_count_esai;
 static void __init imx6q_clocks_init(struct device_node *ccm_node)
 {
        struct device_node *np;
        void __iomem *base;
-        int i, irq;
+        int i;
        int ret;
        clk[dummy] = imx_clk_fixed("dummy", 0);
@@ -352,9 +354,14 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
        clk[ecspi2]       = imx_clk_gate2("ecspi2",        "ecspi_root",        base + 0x6c, 2);
        clk[ecspi3]       = imx_clk_gate2("ecspi3",        "ecspi_root",        base + 0x6c, 4);
        clk[ecspi4]       = imx_clk_gate2("ecspi4",        "ecspi_root",        base + 0x6c, 6);
-        clk[ecspi5]       = imx_clk_gate2("ecspi5",        "ecspi_root",        base + 0x6c, 8);
+        if (cpu_is_imx6dl())
+                /* ecspi5 is replaced with i2c4 on imx6dl & imx6s */
+                clk[ecspi5] = imx_clk_gate2("i2c4",        "ipg_per",           base + 0x6c, 8);
+        else
+                clk[ecspi5] = imx_clk_gate2("ecspi5",      "ecspi_root",        base + 0x6c, 8);
        clk[enet]         = imx_clk_gate2("enet",          "ipg",               base + 0x6c, 10);
-        clk[esai]         = imx_clk_gate2("esai",          "esai_podf",         base + 0x6c, 16);
+        clk[esai]         = imx_clk_gate2_shared("esai",   "esai_podf",         base + 0x6c, 16, &share_count_esai);
+        clk[esai_ahb]     = imx_clk_gate2_shared("esai_ahb", "ahb",             base + 0x6c, 16, &share_count_esai);
        clk[gpt_ipg]      = imx_clk_gate2("gpt_ipg",       "ipg",               base + 0x6c, 20);
        clk[gpt_ipg_per]  = imx_clk_gate2("gpt_ipg_per",   "ipg_per",           base + 0x6c, 22);
        if (cpu_is_imx6dl())
@@ -489,10 +496,6 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
        /* Set initial power mode */
        imx6q_set_lpm(WAIT_CLOCKED);
-        np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
+        mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt"));
-        base = of_iomap(np, 0);
-        WARN_ON(!base);
-        irq = irq_of_parse_and_map(np, 0);
-        mxc_timer_init(base, irq);
 }
 CLK_OF_DECLARE(imx6q, "fsl,imx6q-ccm", imx6q_clocks_init);
diff --git a/arch/arm/mach-imx/clk-imx6sl.c b/arch/arm/mach-imx/clk-imx6sl.c
index f7073c0782fb..21cf06cebade 100644
--- a/arch/arm/mach-imx/clk-imx6sl.c
+++ b/arch/arm/mach-imx/clk-imx6sl.c
@@ -169,7 +169,6 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
 {
        struct device_node *np;
        void __iomem *base;
-        int irq;
        int i;
        int ret;
@@ -385,9 +384,6 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
        imx6q_set_lpm(WAIT_CLOCKED);
        np = of_find_compatible_node(NULL, NULL, "fsl,imx6sl-gpt");
-        base = of_iomap(np, 0);
+        mxc_timer_init_dt(np);
-        WARN_ON(!base);
-        irq = irq_of_parse_and_map(np, 0);
-        mxc_timer_init(base, irq);
 }
 CLK_OF_DECLARE(imx6sl, "fsl,imx6sl-ccm", imx6sl_clocks_init);
diff --git a/arch/arm/mach-imx/clk-imx6sx.c b/arch/arm/mach-imx/clk-imx6sx.c
new file mode 100644
index 000000000000..72f8902235d1
--- /dev/null
+++ b/arch/arm/mach-imx/clk-imx6sx.c
@@ -0,0 +1,524 @@
+/*
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+#include <dt-bindings/clock/imx6sx-clock.h>
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/types.h>
+#include "clk.h"
+#include "common.h"
+#define CCDR    0x4
+#define BM_CCM_CCDR_MMDC_CH0_MASK       (0x2 << 16)
+static const char *step_sels[]          = { "osc", "pll2_pfd2_396m", };
+static const char *pll1_sw_sels[]       = { "pll1_sys", "step", };
+static const char *periph_pre_sels[]    = { "pll2_bus", "pll2_pfd2_396m", "pll2_pfd0_352m", "pll2_198m", };
+static const char *periph2_pre_sels[]   = { "pll2_bus", "pll2_pfd2_396m", "pll2_pfd0_352m", "pll4_audio_div", };
+static const char *periph_clk2_sels[]   = { "pll3_usb_otg", "osc", "osc", };
+static const char *periph2_clk2_sels[]  = { "pll3_usb_otg", "osc", };
+static const char *periph_sels[]        = { "periph_pre", "periph_clk2", };
+static const char *periph2_sels[]       = { "periph2_pre", "periph2_clk2", };
+static const char *ocram_sels[]         = { "periph", "pll2_pfd2_396m", "periph", "pll3_pfd1_540m", };
+static const char *audio_sels[]         = { "pll4_audio_div", "pll3_pfd2_508m", "pll5_video_div", "pll3_usb_otg", };
+static const char *gpu_axi_sels[]       = { "pll2_pfd2_396m", "pll3_pfd0_720m", "pll3_pfd1_540m", "pll2_bus", };
+static const char *gpu_core_sels[]      = { "pll3_pfd1_540m", "pll3_pfd0_720m", "pll2_bus", "pll2_pfd2_396m", };
+static const char *ldb_di0_div_sels[]   = { "ldb_di0_div_3_5", "ldb_di0_div_7", };
+static const char *ldb_di1_div_sels[]   = { "ldb_di1_div_3_5", "ldb_di1_div_7", };
+static const char *ldb_di0_sels[]       = { "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll2_pfd3_594m", "pll2_pfd1_594m", "pll3_pfd3_454m", };
+static const char *ldb_di1_sels[]       = { "pll3_usb_otg", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll2_bus", "pll3_pfd3_454m", "pll3_pfd2_508m", };
+static const char *pcie_axi_sels[]      = { "axi", "ahb", };
+static const char *ssi_sels[]           = { "pll3_pfd2_508m", "pll5_video_div", "pll4_audio_div", };
+static const char *qspi1_sels[]         = { "pll3_usb_otg", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll2_bus", "pll3_pfd3_454m", "pll3_pfd2_508m", };
+static const char *perclk_sels[]        = { "ipg", "osc", };
+static const char *usdhc_sels[]         = { "pll2_pfd2_396m", "pll2_pfd0_352m", };
+static const char *vid_sels[]           = { "pll3_pfd1_540m", "pll3_usb_otg", "pll3_pfd3_454m", "pll4_audio_div", "pll5_video_div", };
+static const char *can_sels[]           = { "pll3_60m", "osc", "pll3_80m", "dummy", };
+static const char *uart_sels[]          = { "pll3_80m", "osc", };
+static const char *qspi2_sels[]         = { "pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", "pll3_pfd3_454m", "dummy", "dummy", "dummy", };
+static const char *enet_pre_sels[]      = { "pll2_bus", "pll3_usb_otg", "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd2_508m", };
+static const char *enet_sels[]          = { "enet_podf", "ipp_di0", "ipp_di1", "ldb_di0", "ldb_di1", };
+static const char *m4_pre_sels[]        = { "pll2_bus", "pll3_usb_otg", "osc", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd3_454m", };
+static const char *m4_sels[]            = { "m4_pre_sel", "ipp_di0", "ipp_di1", "ldb_di0", "ldb_di1", };
+static const char *eim_slow_sels[]      = { "ocram", "pll3_usb_otg", "pll2_pfd2_396m", "pll2_pfd0_352m", };
+static const char *ecspi_sels[]         = { "pll3_60m", "osc", };
+static const char *lcdif1_pre_sels[]    = { "pll2_bus", "pll3_pfd3_454m", "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd1_594m", "pll3_pfd1_540m", };
+static const char *lcdif1_sels[]        = { "lcdif1_podf", "ipp_di0", "ipp_di1", "ldb_di0", "ldb_di1", };
+static const char *lcdif2_pre_sels[]    = { "pll2_bus", "pll3_pfd3_454m", "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd3_594m", "pll3_pfd1_540m", };
+static const char *lcdif2_sels[]        = { "lcdif2_podf", "ipp_di0", "ipp_di1", "ldb_di0", "ldb_di1", };
+static const char *display_sels[]       = { "pll2_bus", "pll2_pfd2_396m", "pll3_usb_otg", "pll3_pfd1_540m", };
+static const char *csi_sels[]           = { "osc", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", };
+static const char *cko1_sels[]          = {
+        "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5_video_div",
+        "dummy", "ocram", "dummy", "pxp_axi", "epdc_axi", "lcdif_pix",
+        "epdc_pix", "ahb", "ipg", "perclk", "ckil", "pll4_audio_div",
+};
+static const char *cko2_sels[]          = {
+        "dummy", "mmdc_p0_fast", "usdhc4", "usdhc1", "dummy", "wrck",
+        "ecspi_root", "dummy", "usdhc3", "pcie", "arm", "csi_core",
+        "lcdif_axi", "dummy", "osc", "dummy", "gpu2d_ovg_core",
+        "usdhc2", "ssi1", "ssi2", "ssi3", "gpu2d_core", "dummy",
+        "dummy", "dummy", "dummy", "esai_extal", "eim_slow", "uart_serial",
+        "spdif", "asrc", "dummy",
+};
+static const char *cko_sels[] = { "cko1", "cko2", };
+static const char *lvds_sels[]  = {
+        "arm", "pll1_sys", "dummy", "dummy", "dummy", "dummy", "dummy", "pll5_video_div",
+        "dummy", "dummy", "pcie_ref_125m", "dummy", "usbphy1", "usbphy2",
+};
+static struct clk *clks[IMX6SX_CLK_CLK_END];
+static struct clk_onecell_data clk_data;
+static int const clks_init_on[] __initconst = {
+        IMX6SX_CLK_AIPS_TZ1, IMX6SX_CLK_AIPS_TZ2, IMX6SX_CLK_AIPS_TZ3,
+        IMX6SX_CLK_IPMUX1, IMX6SX_CLK_IPMUX2, IMX6SX_CLK_IPMUX3,
+        IMX6SX_CLK_WAKEUP, IMX6SX_CLK_MMDC_P0_FAST, IMX6SX_CLK_MMDC_P0_IPG,
+        IMX6SX_CLK_ROM, IMX6SX_CLK_ARM, IMX6SX_CLK_IPG, IMX6SX_CLK_OCRAM,
+        IMX6SX_CLK_PER2_MAIN, IMX6SX_CLK_PERCLK, IMX6SX_CLK_M4,
+        IMX6SX_CLK_QSPI1, IMX6SX_CLK_QSPI2, IMX6SX_CLK_UART_IPG,
+        IMX6SX_CLK_UART_SERIAL, IMX6SX_CLK_I2C3, IMX6SX_CLK_ECSPI5,
+        IMX6SX_CLK_CAN1_IPG, IMX6SX_CLK_CAN1_SERIAL, IMX6SX_CLK_CAN2_IPG,
+        IMX6SX_CLK_CAN2_SERIAL, IMX6SX_CLK_CANFD, IMX6SX_CLK_EPIT1,
+        IMX6SX_CLK_EPIT2,
+};
+static struct clk_div_table clk_enet_ref_table[] = {
+        { .val = 0, .div = 20, },
+        { .val = 1, .div = 10, },
+        { .val = 2, .div = 5, },
+        { .val = 3, .div = 4, },
+        { }
+};
+static struct clk_div_table post_div_table[] = {
+        { .val = 2, .div = 1, },
+        { .val = 1, .div = 2, },
+        { .val = 0, .div = 4, },
+        { }
+};
+static struct clk_div_table video_div_table[] = {
+        { .val = 0, .div = 1, },
+        { .val = 1, .div = 2, },
+        { .val = 2, .div = 1, },
+        { .val = 3, .div = 4, },
+        { }
+};
+static u32 share_count_asrc;
+static u32 share_count_audio;
+static u32 share_count_esai;
+static void __init imx6sx_clocks_init(struct device_node *ccm_node)
+{
+        struct device_node *np;
+        void __iomem *base;
+        int i;
+        clks[IMX6SX_CLK_DUMMY] = imx_clk_fixed("dummy", 0);
+        clks[IMX6SX_CLK_CKIL] = of_clk_get_by_name(ccm_node, "ckil");
+        clks[IMX6SX_CLK_OSC] = of_clk_get_by_name(ccm_node, "osc");
+        /* ipp_di clock is external input */
+        clks[IMX6SX_CLK_IPP_DI0] = of_clk_get_by_name(ccm_node, "ipp_di0");
+        clks[IMX6SX_CLK_IPP_DI1] = of_clk_get_by_name(ccm_node, "ipp_di1");
+        np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-anatop");
+        base = of_iomap(np, 0);
+        WARN_ON(!base);
+        /*                                              type               name             parent_name   base         div_mask */
+        clks[IMX6SX_CLK_PLL1_SYS]       = imx_clk_pllv3(IMX_PLLV3_SYS,     "pll1_sys",      "osc",        base,        0x7f);
+        clks[IMX6SX_CLK_PLL2_BUS]       = imx_clk_pllv3(IMX_PLLV3_GENERIC, "pll2_bus",      "osc",        base + 0x30, 0x1);
+        clks[IMX6SX_CLK_PLL3_USB_OTG]   = imx_clk_pllv3(IMX_PLLV3_USB,     "pll3_usb_otg",  "osc",        base + 0x10, 0x3);
+        clks[IMX6SX_CLK_PLL4_AUDIO]     = imx_clk_pllv3(IMX_PLLV3_AV,      "pll4_audio",    "osc",        base + 0x70, 0x7f);
+        clks[IMX6SX_CLK_PLL5_VIDEO]     = imx_clk_pllv3(IMX_PLLV3_AV,      "pll5_video",    "osc",        base + 0xa0, 0x7f);
+        clks[IMX6SX_CLK_PLL6_ENET]      = imx_clk_pllv3(IMX_PLLV3_ENET,    "pll6_enet",     "osc",        base + 0xe0, 0x3);
+        clks[IMX6SX_CLK_PLL7_USB_HOST]  = imx_clk_pllv3(IMX_PLLV3_USB,     "pll7_usb_host", "osc",        base + 0x20, 0x3);
+        /*
+         * Bit 20 is the reserved and read-only bit, we do this only for:
+         * - Do nothing for usbphy clk_enable/disable
+         * - Keep refcount when do usbphy clk_enable/disable, in that case,
+         * the clk framework may need to enable/disable usbphy's parent
+         */
+        clks[IMX6SX_CLK_USBPHY1] = imx_clk_gate("usbphy1", "pll3_usb_otg",  base + 0x10, 20);
+        clks[IMX6SX_CLK_USBPHY2] = imx_clk_gate("usbphy2", "pll7_usb_host", base + 0x20, 20);
+        /*
+         * usbphy*_gate needs to be on after system boots up, and software
+         * never needs to control it anymore.
+         */
+        clks[IMX6SX_CLK_USBPHY1_GATE] = imx_clk_gate("usbphy1_gate", "dummy", base + 0x10, 6);
+        clks[IMX6SX_CLK_USBPHY2_GATE] = imx_clk_gate("usbphy2_gate", "dummy", base + 0x20, 6);
+        /* FIXME 100Mhz is used for pcie ref for all imx6 pcie, excepted imx6q */
+        clks[IMX6SX_CLK_PCIE_REF] = imx_clk_fixed_factor("pcie_ref", "pll6_enet", 1, 5);
+        clks[IMX6SX_CLK_PCIE_REF_125M] = imx_clk_gate("pcie_ref_125m", "pcie_ref", base + 0xe0, 19);
+        clks[IMX6SX_CLK_LVDS1_OUT] = imx_clk_gate("lvds1_out", "lvds1_sel", base + 0x160, 10);
+        clks[IMX6SX_CLK_ENET_REF] = clk_register_divider_table(NULL, "enet_ref", "pll6_enet", 0,
+                        base + 0xe0, 0, 2, 0, clk_enet_ref_table,
+                        &imx_ccm_lock);
+        clks[IMX6SX_CLK_ENET2_REF] = clk_register_divider_table(NULL, "enet2_ref", "pll6_enet", 0,
+                        base + 0xe0, 2, 2, 0, clk_enet_ref_table,
+                        &imx_ccm_lock);
+        clks[IMX6SX_CLK_ENET2_REF_125M] = imx_clk_gate("enet2_ref_125m", "enet2_ref", base + 0xe0, 20);
+        clks[IMX6SX_CLK_ENET_PTP_REF] = imx_clk_fixed_factor("enet_ptp_ref", "pll6_enet", 1, 20);
+        clks[IMX6SX_CLK_ENET_PTP] = imx_clk_gate("enet_ptp_25m", "enet_ptp_ref", base + 0xe0, 21);
+        /*                                       name              parent_name     reg           idx */
+        clks[IMX6SX_CLK_PLL2_PFD0] = imx_clk_pfd("pll2_pfd0_352m", "pll2_bus",     base + 0x100, 0);
+        clks[IMX6SX_CLK_PLL2_PFD1] = imx_clk_pfd("pll2_pfd1_594m", "pll2_bus",     base + 0x100, 1);
+        clks[IMX6SX_CLK_PLL2_PFD2] = imx_clk_pfd("pll2_pfd2_396m", "pll2_bus",     base + 0x100, 2);
+        clks[IMX6SX_CLK_PLL2_PFD3] = imx_clk_pfd("pll2_pfd3_594m", "pll2_bus",     base + 0x100, 3);
+        clks[IMX6SX_CLK_PLL3_PFD0] = imx_clk_pfd("pll3_pfd0_720m", "pll3_usb_otg", base + 0xf0,  0);
+        clks[IMX6SX_CLK_PLL3_PFD1] = imx_clk_pfd("pll3_pfd1_540m", "pll3_usb_otg", base + 0xf0,  1);
+        clks[IMX6SX_CLK_PLL3_PFD2] = imx_clk_pfd("pll3_pfd2_508m", "pll3_usb_otg", base + 0xf0,  2);
+        clks[IMX6SX_CLK_PLL3_PFD3] = imx_clk_pfd("pll3_pfd3_454m", "pll3_usb_otg", base + 0xf0,  3);
+        /*                                                name         parent_name       mult div */
+        clks[IMX6SX_CLK_PLL2_198M] = imx_clk_fixed_factor("pll2_198m", "pll2_pfd2_396m", 1,   2);
+        clks[IMX6SX_CLK_PLL3_120M] = imx_clk_fixed_factor("pll3_120m", "pll3_usb_otg",   1,   4);
+        clks[IMX6SX_CLK_PLL3_80M]  = imx_clk_fixed_factor("pll3_80m",  "pll3_usb_otg",   1,   6);
+        clks[IMX6SX_CLK_PLL3_60M]  = imx_clk_fixed_factor("pll3_60m",  "pll3_usb_otg",   1,   8);
+        clks[IMX6SX_CLK_TWD]       = imx_clk_fixed_factor("twd",       "arm",            1,   2);
+        clks[IMX6SX_CLK_GPT_3M]    = imx_clk_fixed_factor("gpt_3m",    "osc",            1,   8);
+        clks[IMX6SX_CLK_PLL4_POST_DIV]  = clk_register_divider_table(NULL, "pll4_post_div", "pll4_audio",
+                                CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock);
+        clks[IMX6SX_CLK_PLL4_AUDIO_DIV] = clk_register_divider(NULL, "pll4_audio_div", "pll4_post_div",
+                                CLK_SET_RATE_PARENT, base + 0x170, 15, 1, 0, &imx_ccm_lock);
+        clks[IMX6SX_CLK_PLL5_POST_DIV]  = clk_register_divider_table(NULL, "pll5_post_div", "pll5_video",
+                                CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock);
+        clks[IMX6SX_CLK_PLL5_VIDEO_DIV] = clk_register_divider_table(NULL, "pll5_video_div", "pll5_post_div",
+                                CLK_SET_RATE_PARENT, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock);
+        /*                                                name                reg           shift   width   parent_names       num_parents */
+        clks[IMX6SX_CLK_LVDS1_SEL]          = imx_clk_mux("lvds1_sel",        base + 0x160, 0,      5,      lvds_sels,         ARRAY_SIZE(lvds_sels));
+        np = ccm_node;
+        base = of_iomap(np, 0);
+        WARN_ON(!base);
+        imx6q_pm_set_ccm_base(base);
+        /*                                                name                reg           shift   width   parent_names       num_parents */
+        clks[IMX6SX_CLK_STEP]               = imx_clk_mux("step",             base + 0xc,   8,      1,      step_sels,         ARRAY_SIZE(step_sels));
+        clks[IMX6SX_CLK_PLL1_SW]            = imx_clk_mux("pll1_sw",          base + 0xc,   2,      1,      pll1_sw_sels,      ARRAY_SIZE(pll1_sw_sels));
+        clks[IMX6SX_CLK_OCRAM_SEL]          = imx_clk_mux("ocram_sel",        base + 0x14,  6,      2,      ocram_sels,        ARRAY_SIZE(ocram_sels));
+        clks[IMX6SX_CLK_PERIPH_PRE]         = imx_clk_mux("periph_pre",       base + 0x18,  18,     2,      periph_pre_sels,   ARRAY_SIZE(periph_pre_sels));
+        clks[IMX6SX_CLK_PERIPH2_PRE]        = imx_clk_mux("periph2_pre",      base + 0x18,  21,     2,      periph2_pre_sels,   ARRAY_SIZE(periph2_pre_sels));
+        clks[IMX6SX_CLK_PERIPH_CLK2_SEL]    = imx_clk_mux("periph_clk2_sel",  base + 0x18,  12,     2,      periph_clk2_sels,  ARRAY_SIZE(periph_clk2_sels));
+        clks[IMX6SX_CLK_PERIPH2_CLK2_SEL]   = imx_clk_mux("periph2_clk2_sel", base + 0x18,  20,     1,      periph2_clk2_sels, ARRAY_SIZE(periph2_clk2_sels));
+        clks[IMX6SX_CLK_PCIE_AXI_SEL]       = imx_clk_mux("pcie_axi_sel",     base + 0x18,  10,     1,      pcie_axi_sels,     ARRAY_SIZE(pcie_axi_sels));
+        clks[IMX6SX_CLK_GPU_AXI_SEL]        = imx_clk_mux("gpu_axi_sel",      base + 0x18,  8,      2,      gpu_axi_sels,      ARRAY_SIZE(gpu_axi_sels));
+        clks[IMX6SX_CLK_GPU_CORE_SEL]       = imx_clk_mux("gpu_core_sel",     base + 0x18,  4,      2,      gpu_core_sels,     ARRAY_SIZE(gpu_core_sels));
+        clks[IMX6SX_CLK_EIM_SLOW_SEL]       = imx_clk_mux("eim_slow_sel",     base + 0x1c,  29,     2,      eim_slow_sels,     ARRAY_SIZE(eim_slow_sels));
+        clks[IMX6SX_CLK_USDHC1_SEL]         = imx_clk_mux("usdhc1_sel",       base + 0x1c,  16,     1,      usdhc_sels,        ARRAY_SIZE(usdhc_sels));
+        clks[IMX6SX_CLK_USDHC2_SEL]         = imx_clk_mux("usdhc2_sel",       base + 0x1c,  17,     1,      usdhc_sels,        ARRAY_SIZE(usdhc_sels));
+        clks[IMX6SX_CLK_USDHC3_SEL]         = imx_clk_mux("usdhc3_sel",       base + 0x1c,  18,     1,      usdhc_sels,        ARRAY_SIZE(usdhc_sels));
+        clks[IMX6SX_CLK_USDHC4_SEL]         = imx_clk_mux("usdhc4_sel",       base + 0x1c,  19,     1,      usdhc_sels,        ARRAY_SIZE(usdhc_sels));
+        clks[IMX6SX_CLK_SSI3_SEL]           = imx_clk_mux("ssi3_sel",         base + 0x1c,  14,     2,      ssi_sels,          ARRAY_SIZE(ssi_sels));
+        clks[IMX6SX_CLK_SSI2_SEL]           = imx_clk_mux("ssi2_sel",         base + 0x1c,  12,     2,      ssi_sels,          ARRAY_SIZE(ssi_sels));
+        clks[IMX6SX_CLK_SSI1_SEL]           = imx_clk_mux("ssi1_sel",         base + 0x1c,  10,     2,      ssi_sels,          ARRAY_SIZE(ssi_sels));
+        clks[IMX6SX_CLK_QSPI1_SEL]          = imx_clk_mux_flags("qspi1_sel", base + 0x1c,  7, 3, qspi1_sels, ARRAY_SIZE(qspi1_sels), CLK_SET_RATE_PARENT);
+        clks[IMX6SX_CLK_PERCLK_SEL]         = imx_clk_mux("perclk_sel",       base + 0x1c,  6,      1,      perclk_sels,       ARRAY_SIZE(perclk_sels));
+        clks[IMX6SX_CLK_VID_SEL]            = imx_clk_mux("vid_sel",          base + 0x20,  21,     3,      vid_sels,          ARRAY_SIZE(vid_sels));
+        clks[IMX6SX_CLK_ESAI_SEL]           = imx_clk_mux("esai_sel",         base + 0x20,  19,     2,      audio_sels,        ARRAY_SIZE(audio_sels));
+        clks[IMX6SX_CLK_CAN_SEL]            = imx_clk_mux("can_sel",          base + 0x20,  8,      2,      can_sels,          ARRAY_SIZE(can_sels));
+        clks[IMX6SX_CLK_UART_SEL]           = imx_clk_mux("uart_sel",         base + 0x24,  6,      1,      uart_sels,         ARRAY_SIZE(uart_sels));
+        clks[IMX6SX_CLK_QSPI2_SEL]          = imx_clk_mux_flags("qspi2_sel", base + 0x2c, 15, 3, qspi2_sels, ARRAY_SIZE(qspi2_sels), CLK_SET_RATE_PARENT);
+        clks[IMX6SX_CLK_SPDIF_SEL]          = imx_clk_mux("spdif_sel",        base + 0x30,  20,     2,      audio_sels,        ARRAY_SIZE(audio_sels));
+        clks[IMX6SX_CLK_AUDIO_SEL]          = imx_clk_mux("audio_sel",        base + 0x30,  7,      2,      audio_sels,        ARRAY_SIZE(audio_sels));
+        clks[IMX6SX_CLK_ENET_PRE_SEL]       = imx_clk_mux("enet_pre_sel",     base + 0x34,  15,     3,      enet_pre_sels,     ARRAY_SIZE(enet_pre_sels));
+        clks[IMX6SX_CLK_ENET_SEL]           = imx_clk_mux("enet_sel",         base + 0x34,  9,      3,      enet_sels,         ARRAY_SIZE(enet_sels));
+        clks[IMX6SX_CLK_M4_PRE_SEL]         = imx_clk_mux("m4_pre_sel",       base + 0x34,  6,      3,      m4_pre_sels,       ARRAY_SIZE(m4_pre_sels));
+        clks[IMX6SX_CLK_M4_SEL]             = imx_clk_mux("m4_sel",           base + 0x34,  0,      3,      m4_sels,           ARRAY_SIZE(m4_sels));
+        clks[IMX6SX_CLK_ECSPI_SEL]          = imx_clk_mux("ecspi_sel",        base + 0x38,  18,     1,      ecspi_sels,        ARRAY_SIZE(ecspi_sels));
+        clks[IMX6SX_CLK_LCDIF2_PRE_SEL]     = imx_clk_mux("lcdif2_pre_sel",   base + 0x38,  6,      3,      lcdif2_pre_sels,   ARRAY_SIZE(lcdif2_pre_sels));
+        clks[IMX6SX_CLK_LCDIF2_SEL]         = imx_clk_mux("lcdif2_sel",       base + 0x38,  0,      3,      lcdif2_sels,       ARRAY_SIZE(lcdif2_sels));
+        clks[IMX6SX_CLK_DISPLAY_SEL]        = imx_clk_mux("display_sel",      base + 0x3c,  14,     2,      display_sels,      ARRAY_SIZE(display_sels));
+        clks[IMX6SX_CLK_CSI_SEL]            = imx_clk_mux("csi_sel",          base + 0x3c,  9,      2,      csi_sels,          ARRAY_SIZE(csi_sels));
+        clks[IMX6SX_CLK_CKO1_SEL]           = imx_clk_mux("cko1_sel",         base + 0x60,  0,      4,      cko1_sels,         ARRAY_SIZE(cko1_sels));
+        clks[IMX6SX_CLK_CKO2_SEL]           = imx_clk_mux("cko2_sel",         base + 0x60,  16,     5,      cko2_sels,         ARRAY_SIZE(cko2_sels));
+        clks[IMX6SX_CLK_CKO]                = imx_clk_mux("cko",              base + 0x60,  8,      1,      cko_sels,          ARRAY_SIZE(cko_sels));
+        clks[IMX6SX_CLK_LDB_DI1_DIV_SEL]    = imx_clk_mux_flags("ldb_di1_div_sel", base + 0x20, 11, 1, ldb_di1_div_sels, ARRAY_SIZE(ldb_di1_div_sels), CLK_SET_RATE_PARENT);
+        clks[IMX6SX_CLK_LDB_DI0_DIV_SEL]    = imx_clk_mux_flags("ldb_di0_div_sel", base + 0x20, 10, 1, ldb_di0_div_sels, ARRAY_SIZE(ldb_di0_div_sels), CLK_SET_RATE_PARENT);
+        clks[IMX6SX_CLK_LDB_DI1_SEL]        = imx_clk_mux_flags("ldb_di1_sel",     base + 0x2c, 12, 3, ldb_di1_sels,      ARRAY_SIZE(ldb_di1_sels),    CLK_SET_RATE_PARENT);
+        clks[IMX6SX_CLK_LDB_DI0_SEL]        = imx_clk_mux_flags("ldb_di0_sel",     base + 0x2c, 9,  3, ldb_di0_sels,      ARRAY_SIZE(ldb_di0_sels),    CLK_SET_RATE_PARENT);
+        clks[IMX6SX_CLK_LCDIF1_PRE_SEL]     = imx_clk_mux_flags("lcdif1_pre_sel",  base + 0x38, 15, 3, lcdif1_pre_sels,   ARRAY_SIZE(lcdif1_pre_sels), CLK_SET_RATE_PARENT);
+        clks[IMX6SX_CLK_LCDIF1_SEL]         = imx_clk_mux_flags("lcdif1_sel",      base + 0x38, 9,  3, lcdif1_sels,       ARRAY_SIZE(lcdif1_sels),     CLK_SET_RATE_PARENT);
+        /*                                                    name              parent_name          reg          shift width */
+        clks[IMX6SX_CLK_PERIPH_CLK2]        = imx_clk_divider("periph_clk2",    "periph_clk2_sel",   base + 0x14, 27,   3);
+        clks[IMX6SX_CLK_PERIPH2_CLK2]       = imx_clk_divider("periph2_clk2",   "periph2_clk2_sel",  base + 0x14, 0,    3);
+        clks[IMX6SX_CLK_IPG]                = imx_clk_divider("ipg",            "ahb",               base + 0x14, 8,    2);
+        clks[IMX6SX_CLK_GPU_CORE_PODF]      = imx_clk_divider("gpu_core_podf",  "gpu_core_sel",      base + 0x18, 29,   3);
+        clks[IMX6SX_CLK_GPU_AXI_PODF]       = imx_clk_divider("gpu_axi_podf",   "gpu_axi_sel",       base + 0x18, 26,   3);
+        clks[IMX6SX_CLK_LCDIF1_PODF]        = imx_clk_divider("lcdif1_podf",    "lcdif1_pred",       base + 0x18, 23,   3);
+        clks[IMX6SX_CLK_QSPI1_PODF]         = imx_clk_divider("qspi1_podf",     "qspi1_sel",         base + 0x1c, 26,   3);
+        clks[IMX6SX_CLK_EIM_SLOW_PODF]      = imx_clk_divider("eim_slow_podf",  "eim_slow_sel",      base + 0x1c, 23,   3);
+        clks[IMX6SX_CLK_LCDIF2_PODF]        = imx_clk_divider("lcdif2_podf",    "lcdif2_pred",       base + 0x1c, 20,   3);
+        clks[IMX6SX_CLK_PERCLK]             = imx_clk_divider("perclk",         "perclk_sel",        base + 0x1c, 0,    6);
+        clks[IMX6SX_CLK_VID_PODF]           = imx_clk_divider("vid_podf",       "vid_sel",           base + 0x20, 24,   2);
+        clks[IMX6SX_CLK_CAN_PODF]           = imx_clk_divider("can_podf",       "can_sel",           base + 0x20, 2,    6);
+        clks[IMX6SX_CLK_USDHC4_PODF]        = imx_clk_divider("usdhc4_podf",    "usdhc4_sel",        base + 0x24, 22,   3);
+        clks[IMX6SX_CLK_USDHC3_PODF]        = imx_clk_divider("usdhc3_podf",    "usdhc3_sel",        base + 0x24, 19,   3);
+        clks[IMX6SX_CLK_USDHC2_PODF]        = imx_clk_divider("usdhc2_podf",    "usdhc2_sel",        base + 0x24, 16,   3);
+        clks[IMX6SX_CLK_USDHC1_PODF]        = imx_clk_divider("usdhc1_podf",    "usdhc1_sel",        base + 0x24, 11,   3);
+        clks[IMX6SX_CLK_UART_PODF]          = imx_clk_divider("uart_podf",      "uart_sel",          base + 0x24, 0,    6);
+        clks[IMX6SX_CLK_ESAI_PRED]          = imx_clk_divider("esai_pred",      "esai_sel",          base + 0x28, 9,    3);
+        clks[IMX6SX_CLK_ESAI_PODF]          = imx_clk_divider("esai_podf",      "esai_pred",         base + 0x28, 25,   3);
+        clks[IMX6SX_CLK_SSI3_PRED]          = imx_clk_divider("ssi3_pred",      "ssi3_sel",          base + 0x28, 22,   3);
+        clks[IMX6SX_CLK_SSI3_PODF]          = imx_clk_divider("ssi3_podf",      "ssi3_pred",         base + 0x28, 16,   6);
+        clks[IMX6SX_CLK_SSI1_PRED]          = imx_clk_divider("ssi1_pred",      "ssi1_sel",          base + 0x28, 6,    3);
+        clks[IMX6SX_CLK_SSI1_PODF]          = imx_clk_divider("ssi1_podf",      "ssi1_pred",         base + 0x28, 0,    6);
+        clks[IMX6SX_CLK_QSPI2_PRED]         = imx_clk_divider("qspi2_pred",     "qspi2_sel",         base + 0x2c, 18,   3);
+        clks[IMX6SX_CLK_QSPI2_PODF]         = imx_clk_divider("qspi2_podf",     "qspi2_pred",        base + 0x2c, 21,   6);
+        clks[IMX6SX_CLK_SSI2_PRED]          = imx_clk_divider("ssi2_pred",      "ssi2_sel",          base + 0x2c, 6,    3);
+        clks[IMX6SX_CLK_SSI2_PODF]          = imx_clk_divider("ssi2_podf",      "ssi2_pred",         base + 0x2c, 0,    6);
+        clks[IMX6SX_CLK_SPDIF_PRED]         = imx_clk_divider("spdif_pred",     "spdif_sel",         base + 0x30, 25,   3);
+        clks[IMX6SX_CLK_SPDIF_PODF]         = imx_clk_divider("spdif_podf",     "spdif_pred",        base + 0x30, 22,   3);
+        clks[IMX6SX_CLK_AUDIO_PRED]         = imx_clk_divider("audio_pred",     "audio_sel",         base + 0x30, 12,   3);
+        clks[IMX6SX_CLK_AUDIO_PODF]         = imx_clk_divider("audio_podf",     "audio_pred",        base + 0x30, 9,    3);
+        clks[IMX6SX_CLK_ENET_PODF]          = imx_clk_divider("enet_podf",      "enet_pre_sel",      base + 0x34, 12,   3);
+        clks[IMX6SX_CLK_M4_PODF]            = imx_clk_divider("m4_podf",        "m4_sel",            base + 0x34, 3,    3);
+        clks[IMX6SX_CLK_ECSPI_PODF]         = imx_clk_divider("ecspi_podf",     "ecspi_sel",         base + 0x38, 19,   6);
+        clks[IMX6SX_CLK_LCDIF1_PRED]        = imx_clk_divider("lcdif1_pred",    "lcdif1_pre_sel",    base + 0x38, 12,   3);
+        clks[IMX6SX_CLK_LCDIF2_PRED]        = imx_clk_divider("lcdif2_pred",    "lcdif2_pre_sel",    base + 0x38, 3,    3);
+        clks[IMX6SX_CLK_DISPLAY_PODF]       = imx_clk_divider("display_podf",   "display_sel",       base + 0x3c, 16,   3);
+        clks[IMX6SX_CLK_CSI_PODF]           = imx_clk_divider("csi_podf",       "csi_sel",           base + 0x3c, 11,   3);
+        clks[IMX6SX_CLK_CKO1_PODF]          = imx_clk_divider("cko1_podf",      "cko1_sel",          base + 0x60, 4,    3);
+        clks[IMX6SX_CLK_CKO2_PODF]          = imx_clk_divider("cko2_podf",      "cko2_sel",          base + 0x60, 21,   3);
+        clks[IMX6SX_CLK_LDB_DI0_DIV_3_5]    = imx_clk_fixed_factor("ldb_di0_div_3_5", "ldb_di0_sel", 2, 7);
+        clks[IMX6SX_CLK_LDB_DI0_DIV_7]      = imx_clk_fixed_factor("ldb_di0_div_7",   "ldb_di0_sel", 1, 7);
+        clks[IMX6SX_CLK_LDB_DI1_DIV_3_5]    = imx_clk_fixed_factor("ldb_di1_div_3_5", "ldb_di1_sel", 2, 7);
+        clks[IMX6SX_CLK_LDB_DI1_DIV_7]      = imx_clk_fixed_factor("ldb_di1_div_7",   "ldb_di1_sel", 1, 7);
+        /*                                               name        reg          shift width busy: reg,   shift parent_names       num_parents */
+        clks[IMX6SX_CLK_PERIPH]       = imx_clk_busy_mux("periph",   base + 0x14, 25,   1,    base + 0x48, 5,    periph_sels,       ARRAY_SIZE(periph_sels));
+        clks[IMX6SX_CLK_PERIPH2]      = imx_clk_busy_mux("periph2",  base + 0x14, 26,   1,    base + 0x48, 3,    periph2_sels,      ARRAY_SIZE(periph2_sels));
+        /*                                                   name             parent_name    reg          shift width busy: reg,   shift */
+        clks[IMX6SX_CLK_OCRAM_PODF]   = imx_clk_busy_divider("ocram_podf",    "ocram_sel",   base + 0x14, 16,   3,    base + 0x48, 0);
+        clks[IMX6SX_CLK_AHB]          = imx_clk_busy_divider("ahb",           "periph",      base + 0x14, 10,   3,    base + 0x48, 1);
+        clks[IMX6SX_CLK_MMDC_PODF]    = imx_clk_busy_divider("mmdc_podf",     "periph2",     base + 0x14, 3,    3,    base + 0x48, 2);
+        clks[IMX6SX_CLK_ARM]          = imx_clk_busy_divider("arm",           "pll1_sw",     base + 0x10, 0,    3,    base + 0x48, 16);
+        /*                                            name             parent_name          reg         shift */
+        /* CCGR0 */
+        clks[IMX6SX_CLK_AIPS_TZ1]     = imx_clk_gate2("aips_tz1",      "ahb",               base + 0x68, 0);
+        clks[IMX6SX_CLK_AIPS_TZ2]     = imx_clk_gate2("aips_tz2",      "ahb",               base + 0x68, 2);
+        clks[IMX6SX_CLK_APBH_DMA]     = imx_clk_gate2("apbh_dma",      "usdhc3",            base + 0x68, 4);
+        clks[IMX6SX_CLK_ASRC_MEM]     = imx_clk_gate2_shared("asrc_mem", "ahb",             base + 0x68, 6, &share_count_asrc);
+        clks[IMX6SX_CLK_ASRC_IPG]     = imx_clk_gate2_shared("asrc_ipg", "ahb",             base + 0x68, 6, &share_count_asrc);
+        clks[IMX6SX_CLK_CAAM_MEM]     = imx_clk_gate2("caam_mem",      "ahb",               base + 0x68, 8);
+        clks[IMX6SX_CLK_CAAM_ACLK]    = imx_clk_gate2("caam_aclk",     "ahb",               base + 0x68, 10);
+        clks[IMX6SX_CLK_CAAM_IPG]     = imx_clk_gate2("caam_ipg",      "ipg",               base + 0x68, 12);
+        clks[IMX6SX_CLK_CAN1_IPG]     = imx_clk_gate2("can1_ipg",      "ipg",               base + 0x68, 14);
+        clks[IMX6SX_CLK_CAN1_SERIAL]  = imx_clk_gate2("can1_serial",   "can_podf",          base + 0x68, 16);
+        clks[IMX6SX_CLK_CAN2_IPG]     = imx_clk_gate2("can2_ipg",      "ipg",               base + 0x68, 18);
+        clks[IMX6SX_CLK_CAN2_SERIAL]  = imx_clk_gate2("can2_serial",   "can_podf",          base + 0x68, 20);
+        clks[IMX6SX_CLK_DCIC1]        = imx_clk_gate2("dcic1",         "display_podf",      base + 0x68, 24);
+        clks[IMX6SX_CLK_DCIC2]        = imx_clk_gate2("dcic2",         "display_podf",      base + 0x68, 26);
+        clks[IMX6SX_CLK_AIPS_TZ3]     = imx_clk_gate2("aips_tz3",      "ahb",               base + 0x68, 30);
+        /* CCGR1 */
+        clks[IMX6SX_CLK_ECSPI1]       = imx_clk_gate2("ecspi1",        "ecspi_podf",        base + 0x6c, 0);
+        clks[IMX6SX_CLK_ECSPI2]       = imx_clk_gate2("ecspi2",        "ecspi_podf",        base + 0x6c, 2);
+        clks[IMX6SX_CLK_ECSPI3]       = imx_clk_gate2("ecspi3",        "ecspi_podf",        base + 0x6c, 4);
+        clks[IMX6SX_CLK_ECSPI4]       = imx_clk_gate2("ecspi4",        "ecspi_podf",        base + 0x6c, 6);
+        clks[IMX6SX_CLK_ECSPI5]       = imx_clk_gate2("ecspi5",        "ecspi_podf",        base + 0x6c, 8);
+        clks[IMX6SX_CLK_EPIT1]        = imx_clk_gate2("epit1",         "perclk",            base + 0x6c, 12);
+        clks[IMX6SX_CLK_EPIT2]        = imx_clk_gate2("epit2",         "perclk",            base + 0x6c, 14);
+        clks[IMX6SX_CLK_ESAI_EXTAL]   = imx_clk_gate2_shared("esai_extal", "esai_podf",     base + 0x6c, 16, &share_count_esai);
+        clks[IMX6SX_CLK_ESAI_IPG]     = imx_clk_gate2_shared("esai_ipg",   "ahb",           base + 0x6c, 16, &share_count_esai);
+        clks[IMX6SX_CLK_ESAI_MEM]     = imx_clk_gate2_shared("esai_mem",   "ahb",           base + 0x6c, 16, &share_count_esai);
+        clks[IMX6SX_CLK_WAKEUP]       = imx_clk_gate2("wakeup",        "ipg",               base + 0x6c, 18);
+        clks[IMX6SX_CLK_GPT_BUS]      = imx_clk_gate2("gpt_bus",       "perclk",            base + 0x6c, 20);
+        clks[IMX6SX_CLK_GPT_SERIAL]   = imx_clk_gate2("gpt_serial",    "perclk",            base + 0x6c, 22);
+        clks[IMX6SX_CLK_GPU]          = imx_clk_gate2("gpu",           "gpu_core_podf",     base + 0x6c, 26);
+        clks[IMX6SX_CLK_CANFD]        = imx_clk_gate2("canfd",         "can_podf",          base + 0x6c, 30);
+        /* CCGR2 */
+        clks[IMX6SX_CLK_CSI]          = imx_clk_gate2("csi",           "csi_podf",          base + 0x70, 2);
+        clks[IMX6SX_CLK_I2C1]         = imx_clk_gate2("i2c1",          "perclk",            base + 0x70, 6);
+        clks[IMX6SX_CLK_I2C2]         = imx_clk_gate2("i2c2",          "perclk",            base + 0x70, 8);
+        clks[IMX6SX_CLK_I2C3]         = imx_clk_gate2("i2c3",          "perclk",            base + 0x70, 10);
+        clks[IMX6SX_CLK_OCOTP]        = imx_clk_gate2("ocotp",         "ipg",               base + 0x70, 12);
+        clks[IMX6SX_CLK_IOMUXC]       = imx_clk_gate2("iomuxc",        "lcdif1_podf",       base + 0x70, 14);
+        clks[IMX6SX_CLK_IPMUX1]       = imx_clk_gate2("ipmux1",        "ahb",               base + 0x70, 16);
+        clks[IMX6SX_CLK_IPMUX2]       = imx_clk_gate2("ipmux2",        "ahb",               base + 0x70, 18);
+        clks[IMX6SX_CLK_IPMUX3]       = imx_clk_gate2("ipmux3",        "ahb",               base + 0x70, 20);
+        clks[IMX6SX_CLK_TZASC1]       = imx_clk_gate2("tzasc1",        "mmdc_podf",         base + 0x70, 22);
+        clks[IMX6SX_CLK_LCDIF_APB]    = imx_clk_gate2("lcdif_apb",     "display_podf",      base + 0x70, 28);
+        clks[IMX6SX_CLK_PXP_AXI]      = imx_clk_gate2("pxp_axi",       "display_podf",      base + 0x70, 30);
+        /* CCGR3 */
+        clks[IMX6SX_CLK_M4]           = imx_clk_gate2("m4",            "m4_podf",           base + 0x74, 2);
+        clks[IMX6SX_CLK_ENET]         = imx_clk_gate2("enet",          "ipg",               base + 0x74, 4);
+        clks[IMX6SX_CLK_ENET_AHB]     = imx_clk_gate2("enet_ahb",      "enet_sel",          base + 0x74, 4);
+        clks[IMX6SX_CLK_DISPLAY_AXI]  = imx_clk_gate2("display_axi",   "display_podf",      base + 0x74, 6);
+        clks[IMX6SX_CLK_LCDIF2_PIX]   = imx_clk_gate2("lcdif2_pix",    "lcdif2_sel",        base + 0x74, 8);
+        clks[IMX6SX_CLK_LCDIF1_PIX]   = imx_clk_gate2("lcdif1_pix",    "lcdif1_sel",        base + 0x74, 10);
+        clks[IMX6SX_CLK_LDB_DI0]      = imx_clk_gate2("ldb_di0",       "ldb_di0_div_sel",   base + 0x74, 12);
+        clks[IMX6SX_CLK_QSPI1]        = imx_clk_gate2("qspi1",         "qspi1_podf",        base + 0x74, 14);
+        clks[IMX6SX_CLK_MLB]          = imx_clk_gate2("mlb",           "ahb",               base + 0x74, 18);
+        clks[IMX6SX_CLK_MMDC_P0_FAST] = imx_clk_gate2("mmdc_p0_fast",  "mmdc_podf",         base + 0x74, 20);
+        clks[IMX6SX_CLK_MMDC_P0_IPG]  = imx_clk_gate2("mmdc_p0_ipg",   "ipg",               base + 0x74, 24);
+        clks[IMX6SX_CLK_OCRAM]        = imx_clk_gate2("ocram",         "ocram_podf",        base + 0x74, 28);
+        /* CCGR4 */
+        clks[IMX6SX_CLK_PCIE_AXI]     = imx_clk_gate2("pcie_axi",      "display_podf",      base + 0x78, 0);
+        clks[IMX6SX_CLK_QSPI2]        = imx_clk_gate2("qspi2",         "qspi2_podf",        base + 0x78, 10);
+        clks[IMX6SX_CLK_PER1_BCH]     = imx_clk_gate2("per1_bch",      "usdhc3",            base + 0x78, 12);
+        clks[IMX6SX_CLK_PER2_MAIN]    = imx_clk_gate2("per2_main",     "ahb",               base + 0x78, 14);
+        clks[IMX6SX_CLK_PWM1]         = imx_clk_gate2("pwm1",          "perclk",            base + 0x78, 16);
+        clks[IMX6SX_CLK_PWM2]         = imx_clk_gate2("pwm2",          "perclk",            base + 0x78, 18);
+        clks[IMX6SX_CLK_PWM3]         = imx_clk_gate2("pwm3",          "perclk",            base + 0x78, 20);
+        clks[IMX6SX_CLK_PWM4]         = imx_clk_gate2("pwm4",          "perclk",            base + 0x78, 22);
+        clks[IMX6SX_CLK_GPMI_BCH_APB] = imx_clk_gate2("gpmi_bch_apb",  "usdhc3",            base + 0x78, 24);
+        clks[IMX6SX_CLK_GPMI_BCH]     = imx_clk_gate2("gpmi_bch",      "usdhc4",            base + 0x78, 26);
+        clks[IMX6SX_CLK_GPMI_IO]      = imx_clk_gate2("gpmi_io",       "qspi2_podf",        base + 0x78, 28);
+        clks[IMX6SX_CLK_GPMI_APB]     = imx_clk_gate2("gpmi_apb",      "usdhc3",            base + 0x78, 30);
+        /* CCGR5 */
+        clks[IMX6SX_CLK_ROM]          = imx_clk_gate2("rom",           "ahb",               base + 0x7c, 0);
+        clks[IMX6SX_CLK_SDMA]         = imx_clk_gate2("sdma",          "ahb",               base + 0x7c, 6);
+        clks[IMX6SX_CLK_SPBA]         = imx_clk_gate2("spba",          "ipg",               base + 0x7c, 12);
+        clks[IMX6SX_CLK_AUDIO]        = imx_clk_gate2_shared("audio",  "audio_podf",        base + 0x7c, 14, &share_count_audio);
+        clks[IMX6SX_CLK_SPDIF]        = imx_clk_gate2_shared("spdif",  "spdif_podf",        base + 0x7c, 14, &share_count_audio);
+        clks[IMX6SX_CLK_SSI1_IPG]     = imx_clk_gate2("ssi1_ipg",      "ipg",               base + 0x7c, 18);
+        clks[IMX6SX_CLK_SSI2_IPG]     = imx_clk_gate2("ssi2_ipg",      "ipg",               base + 0x7c, 20);
+        clks[IMX6SX_CLK_SSI3_IPG]     = imx_clk_gate2("ssi3_ipg",      "ipg",               base + 0x7c, 22);
+        clks[IMX6SX_CLK_SSI1]         = imx_clk_gate2("ssi1",          "ssi1_podf",         base + 0x7c, 18);
+        clks[IMX6SX_CLK_SSI2]         = imx_clk_gate2("ssi2",          "ssi2_podf",         base + 0x7c, 20);
+        clks[IMX6SX_CLK_SSI3]         = imx_clk_gate2("ssi3",          "ssi3_podf",         base + 0x7c, 22);
+        clks[IMX6SX_CLK_UART_IPG]     = imx_clk_gate2("uart_ipg",      "ipg",               base + 0x7c, 24);
+        clks[IMX6SX_CLK_UART_SERIAL]  = imx_clk_gate2("uart_serial",   "uart_podf",         base + 0x7c, 26);
+        clks[IMX6SX_CLK_SAI1_IPG]     = imx_clk_gate2("sai1_ipg",      "ipg",               base + 0x7c, 28);
+        clks[IMX6SX_CLK_SAI2_IPG]     = imx_clk_gate2("sai2_ipg",      "ipg",               base + 0x7c, 30);
+        clks[IMX6SX_CLK_SAI1]         = imx_clk_gate2("sai1",          "ssi1_podf",         base + 0x7c, 28);
+        clks[IMX6SX_CLK_SAI2]         = imx_clk_gate2("sai2",          "ssi2_podf",         base + 0x7c, 30);
+        /* CCGR6 */
+        clks[IMX6SX_CLK_USBOH3]       = imx_clk_gate2("usboh3",        "ipg",               base + 0x80, 0);
+        clks[IMX6SX_CLK_USDHC1]       = imx_clk_gate2("usdhc1",        "usdhc1_podf",       base + 0x80, 2);
+        clks[IMX6SX_CLK_USDHC2]       = imx_clk_gate2("usdhc2",        "usdhc2_podf",       base + 0x80, 4);
+        clks[IMX6SX_CLK_USDHC3]       = imx_clk_gate2("usdhc3",        "usdhc3_podf",       base + 0x80, 6);
+        clks[IMX6SX_CLK_USDHC4]       = imx_clk_gate2("usdhc4",        "usdhc4_podf",       base + 0x80, 8);
+        clks[IMX6SX_CLK_EIM_SLOW]     = imx_clk_gate2("eim_slow",      "eim_slow_podf",     base + 0x80, 10);
+        clks[IMX6SX_CLK_PWM8]         = imx_clk_gate2("pwm8",          "perclk",            base + 0x80, 16);
+        clks[IMX6SX_CLK_VADC]         = imx_clk_gate2("vadc",          "vid_podf",          base + 0x80, 20);
+        clks[IMX6SX_CLK_GIS]          = imx_clk_gate2("gis",           "display_podf",      base + 0x80, 22);
+        clks[IMX6SX_CLK_I2C4]         = imx_clk_gate2("i2c4",          "perclk",            base + 0x80, 24);
+        clks[IMX6SX_CLK_PWM5]         = imx_clk_gate2("pwm5",          "perclk",            base + 0x80, 26);
+        clks[IMX6SX_CLK_PWM6]         = imx_clk_gate2("pwm6",          "perclk",            base + 0x80, 28);
+        clks[IMX6SX_CLK_PWM7]         = imx_clk_gate2("pwm7",          "perclk",            base + 0x80, 30);
+        clks[IMX6SX_CLK_CKO1]         = imx_clk_gate("cko1",           "cko1_podf",         base + 0x60, 7);
+        clks[IMX6SX_CLK_CKO2]         = imx_clk_gate("cko2",           "cko2_podf",         base + 0x60, 24);
+        /* mask handshake of mmdc */
+        writel_relaxed(BM_CCM_CCDR_MMDC_CH0_MASK, base + CCDR);
+        for (i = 0; i < ARRAY_SIZE(clks); i++)
+                if (IS_ERR(clks[i]))
+                        pr_err("i.MX6sx clk %d: register failed with %ld\n", i, PTR_ERR(clks[i]));
+        clk_data.clks = clks;
+        clk_data.clk_num = ARRAY_SIZE(clks);
+        of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
+        clk_register_clkdev(clks[IMX6SX_CLK_GPT_BUS], "ipg", "imx-gpt.0");
+        clk_register_clkdev(clks[IMX6SX_CLK_GPT_SERIAL], "per", "imx-gpt.0");
+        for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
+                clk_prepare_enable(clks[clks_init_on[i]]);
+        if (IS_ENABLED(CONFIG_USB_MXS_PHY)) {
+                clk_prepare_enable(clks[IMX6SX_CLK_USBPHY1_GATE]);
+                clk_prepare_enable(clks[IMX6SX_CLK_USBPHY2_GATE]);
+        }
+        /* Set the default 132MHz for EIM module */
+        clk_set_parent(clks[IMX6SX_CLK_EIM_SLOW_SEL], clks[IMX6SX_CLK_PLL2_PFD2]);
+        clk_set_rate(clks[IMX6SX_CLK_EIM_SLOW], 132000000);
+        /* set parent clock for LCDIF1 pixel clock */
+        clk_set_parent(clks[IMX6SX_CLK_LCDIF1_PRE_SEL], clks[IMX6SX_CLK_PLL5_VIDEO_DIV]);
+        clk_set_parent(clks[IMX6SX_CLK_LCDIF1_SEL], clks[IMX6SX_CLK_LCDIF1_PODF]);
+        /* Set the parent clks of PCIe lvds1 and pcie_axi to be pcie ref, axi */
+        if (clk_set_parent(clks[IMX6SX_CLK_LVDS1_SEL], clks[IMX6SX_CLK_PCIE_REF_125M]))
+                pr_err("Failed to set pcie bus parent clk.\n");
+        if (clk_set_parent(clks[IMX6SX_CLK_PCIE_AXI_SEL], clks[IMX6SX_CLK_AXI]))
+                pr_err("Failed to set pcie parent clk.\n");
+        /*
+         * Init enet system AHB clock, set to 200Mhz
+         * pll2_pfd2_396m-> ENET_PODF-> ENET_AHB
+         */
+        clk_set_parent(clks[IMX6SX_CLK_ENET_PRE_SEL], clks[IMX6SX_CLK_PLL2_PFD2]);
+        clk_set_parent(clks[IMX6SX_CLK_ENET_SEL], clks[IMX6SX_CLK_ENET_PODF]);
+        clk_set_rate(clks[IMX6SX_CLK_ENET_PODF], 200000000);
+        clk_set_rate(clks[IMX6SX_CLK_ENET_REF], 125000000);
+        clk_set_rate(clks[IMX6SX_CLK_ENET2_REF], 125000000);
+        /* Audio clocks */
+        clk_set_rate(clks[IMX6SX_CLK_PLL4_AUDIO_DIV], 393216000);
+        clk_set_parent(clks[IMX6SX_CLK_SPDIF_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+        clk_set_rate(clks[IMX6SX_CLK_SPDIF_PODF], 98304000);
+        clk_set_parent(clks[IMX6SX_CLK_AUDIO_SEL], clks[IMX6SX_CLK_PLL3_USB_OTG]);
+        clk_set_rate(clks[IMX6SX_CLK_AUDIO_PODF], 24000000);
+        clk_set_parent(clks[IMX6SX_CLK_SSI1_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+        clk_set_parent(clks[IMX6SX_CLK_SSI2_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+        clk_set_parent(clks[IMX6SX_CLK_SSI3_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+        clk_set_rate(clks[IMX6SX_CLK_SSI1_PODF], 24576000);
+        clk_set_rate(clks[IMX6SX_CLK_SSI2_PODF], 24576000);
+        clk_set_rate(clks[IMX6SX_CLK_SSI3_PODF], 24576000);
+        clk_set_parent(clks[IMX6SX_CLK_ESAI_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+        clk_set_rate(clks[IMX6SX_CLK_ESAI_PODF], 24576000);
+        /* Set parent clock for vadc */
+        clk_set_parent(clks[IMX6SX_CLK_VID_SEL], clks[IMX6SX_CLK_PLL3_USB_OTG]);
+        /* default parent of can_sel clock is invalid, manually set it here */
+        clk_set_parent(clks[IMX6SX_CLK_CAN_SEL], clks[IMX6SX_CLK_PLL3_60M]);
+        /* Update gpu clock from default 528M to 720M */
+        clk_set_parent(clks[IMX6SX_CLK_GPU_CORE_SEL], clks[IMX6SX_CLK_PLL3_PFD0]);
+        clk_set_parent(clks[IMX6SX_CLK_GPU_AXI_SEL], clks[IMX6SX_CLK_PLL3_PFD0]);
+        /* Set initial power mode */
+        imx6q_set_lpm(WAIT_CLOCKED);
+        np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-gpt");
+        mxc_timer_init_dt(np);
+}
+CLK_OF_DECLARE(imx6sx, "fsl,imx6sx-ccm", imx6sx_clocks_init);
diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h
index 048c5ad8a80b..e29f6ebe9f39 100644
--- a/arch/arm/mach-imx/clk.h
+++ b/arch/arm/mach-imx/clk.h
@@ -28,7 +28,8 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
 struct clk *clk_register_gate2(struct device *dev, const char *name,
                const char *parent_name, unsigned long flags,
                void __iomem *reg, u8 bit_idx,
-                u8 clk_gate_flags, spinlock_t *lock);
+                u8 clk_gate_flags, spinlock_t *lock,
+                unsigned int *share_count);
 struct clk * imx_obtain_fixed_clock(
                        const char *name, unsigned long rate);
@@ -37,7 +38,15 @@ static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
                void __iomem *reg, u8 shift)
 {
        return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
-                        shift, 0, &imx_ccm_lock);
+                        shift, 0, &imx_ccm_lock, NULL);
+}
+static inline struct clk *imx_clk_gate2_shared(const char *name,
+                const char *parent, void __iomem *reg, u8 shift,
+                unsigned int *share_count)
+{
+        return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
+                        shift, 0, &imx_ccm_lock, share_count);
 }
 struct clk *imx_clk_pfd(const char *name, const char *parent_name,
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index b5241ea76706..9ab785ce13e8 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -17,6 +17,7 @@ struct irq_data;
 struct platform_device;
 struct pt_regs;
 struct clk;
+struct device_node;
 enum mxc_cpu_pwr_mode;
 void mx1_map_io(void);
@@ -56,6 +57,7 @@ void imx51_init_late(void);
 void imx53_init_late(void);
 void epit_timer_init(void __iomem *base, int irq);
 void mxc_timer_init(void __iomem *, int);
+void mxc_timer_init_dt(struct device_node *);
 int mx1_clocks_init(unsigned long fref);
 int mx21_clocks_init(unsigned long lref, unsigned long fref);
 int mx25_clocks_init(void);
@@ -99,19 +101,6 @@ enum mx3_cpu_pwr_mode {
 void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
 void imx_print_silicon_rev(const char *cpu, int srev);
-void avic_handle_irq(struct pt_regs *);
-void tzic_handle_irq(struct pt_regs *);
-#define imx1_handle_irq avic_handle_irq
-#define imx21_handle_irq avic_handle_irq
-#define imx25_handle_irq avic_handle_irq
-#define imx27_handle_irq avic_handle_irq
-#define imx31_handle_irq avic_handle_irq
-#define imx35_handle_irq avic_handle_irq
-#define imx50_handle_irq tzic_handle_irq
-#define imx51_handle_irq tzic_handle_irq
-#define imx53_handle_irq tzic_handle_irq
 void imx_enable_cpu(int cpu, bool enable);
 void imx_set_cpu_jump(int cpu, void *jump_addr);
 u32 imx_get_cpu_arg(int cpu);
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index ba3b498a67ec..bbe8ff1f0412 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -111,6 +111,9 @@ struct device * __init imx_soc_device_init(void)
        case MXC_CPU_IMX6DL:
                soc_id = "i.MX6DL";
                break;
+        case MXC_CPU_IMX6SX:
+                soc_id = "i.MX6SX";
+                break;
        case MXC_CPU_IMX6Q:
                soc_id = "i.MX6Q";
                break;
diff --git a/arch/arm/mach-imx/devices/platform-ipu-core.c b/arch/arm/mach-imx/devices/platform-ipu-core.c
index fc4dd7cedc11..6bd7c3f37ac0 100644
--- a/arch/arm/mach-imx/devices/platform-ipu-core.c
+++ b/arch/arm/mach-imx/devices/platform-ipu-core.c
@@ -77,7 +77,7 @@ struct platform_device *__init imx_alloc_mx3_camera(
        pdev = platform_device_alloc("mx3-camera", 0);
        if (!pdev)
-                goto err;
+                return ERR_PTR(-ENOMEM);
        pdev->dev.dma_mask = kmalloc(sizeof(*pdev->dev.dma_mask), GFP_KERNEL);
        if (!pdev->dev.dma_mask)
diff --git a/arch/arm/mach-imx/devices/platform-mx2-emma.c b/arch/arm/mach-imx/devices/platform-mx2-emma.c
index 11bd01d402f2..0dc0651825b1 100644
--- a/arch/arm/mach-imx/devices/platform-mx2-emma.c
+++ b/arch/arm/mach-imx/devices/platform-mx2-emma.c
@@ -12,7 +12,7 @@
 #define imx_mx2_emmaprp_data_entry_single(soc)                          \
        {                                                               \
                .iobase = soc ## _EMMAPRP_BASE_ADDR,                    \
-                .iosize = SZ_32,                                        \
+                .iosize = SZ_256,                                       \
                .irq = soc ## _INT_EMMAPRP,                             \
        }
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c
deleted file mode 100644
index 9be6c1e69d68..000000000000
--- a/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c
+++ /dev/null
@@ -1,231 +0,0 @@
-/*
- * Copyright (C) 2010 Eric Benard - eric@eukrea.com
- *
- * Based on pcm970-baseboard.c which is :
- * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301, USA.
- */
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/gpio.h>
-#include <linux/interrupt.h>
-#include <linux/leds.h>
-#include <linux/platform_device.h>
-#include <linux/input.h>
-#include <linux/i2c.h>
-#include <video/platform_lcd.h>
-#include <linux/backlight.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/time.h>
-#include <asm/mach/map.h>
-#include "common.h"
-#include "devices-imx51.h"
-#include "hardware.h"
-#include "iomux-mx51.h"
-static iomux_v3_cfg_t eukrea_mbimxsd51_pads[] = {
-        /* LED */
-        MX51_PAD_NANDF_D10__GPIO3_30,
-        /* SWITCH */
-        NEW_PAD_CTRL(MX51_PAD_NANDF_D9__GPIO3_31, PAD_CTL_PUS_22K_UP |
-                        PAD_CTL_PKE | PAD_CTL_SRE_FAST |
-                        PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
-        /* UART2 */
-        MX51_PAD_UART2_RXD__UART2_RXD,
-        MX51_PAD_UART2_TXD__UART2_TXD,
-        /* UART 3 */
-        MX51_PAD_UART3_RXD__UART3_RXD,
-        MX51_PAD_UART3_TXD__UART3_TXD,
-        MX51_PAD_KEY_COL4__UART3_RTS,
-        MX51_PAD_KEY_COL5__UART3_CTS,
-        /* SD */
-        MX51_PAD_SD1_CMD__SD1_CMD,
-        MX51_PAD_SD1_CLK__SD1_CLK,
-        MX51_PAD_SD1_DATA0__SD1_DATA0,
-        MX51_PAD_SD1_DATA1__SD1_DATA1,
-        MX51_PAD_SD1_DATA2__SD1_DATA2,
-        MX51_PAD_SD1_DATA3__SD1_DATA3,
-        /* SD1 CD */
-        NEW_PAD_CTRL(MX51_PAD_GPIO1_0__SD1_CD, PAD_CTL_PUS_22K_UP |
-                        PAD_CTL_PKE | PAD_CTL_SRE_FAST |
-                        PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
-        /* SSI */
-        MX51_PAD_AUD3_BB_TXD__AUD3_TXD,
-        MX51_PAD_AUD3_BB_RXD__AUD3_RXD,
-        MX51_PAD_AUD3_BB_CK__AUD3_TXC,
-        MX51_PAD_AUD3_BB_FS__AUD3_TXFS,
-        /* LCD Backlight */
-        MX51_PAD_DI1_D1_CS__GPIO3_4,
-        /* LCD RST */
-        MX51_PAD_CSI1_D9__GPIO3_13,
-};
-#define GPIO_LED1       IMX_GPIO_NR(3, 30)
-#define GPIO_SWITCH1    IMX_GPIO_NR(3, 31)
-#define GPIO_LCDRST     IMX_GPIO_NR(3, 13)
-#define GPIO_LCDBL      IMX_GPIO_NR(3, 4)
-static void eukrea_mbimxsd51_lcd_power_set(struct plat_lcd_data *pd,
-                                   unsigned int power)
-{
-        if (power)
-                gpio_direction_output(GPIO_LCDRST, 1);
-        else
-                gpio_direction_output(GPIO_LCDRST, 0);
-}
-static struct plat_lcd_data eukrea_mbimxsd51_lcd_power_data = {
-        .set_power              = eukrea_mbimxsd51_lcd_power_set,
-};
-static struct platform_device eukrea_mbimxsd51_lcd_powerdev = {
-        .name                   = "platform-lcd",
-        .dev.platform_data      = &eukrea_mbimxsd51_lcd_power_data,
-};
-static void eukrea_mbimxsd51_bl_set_intensity(int intensity)
-{
-        if (intensity)
-                gpio_direction_output(GPIO_LCDBL, 1);
-        else
-                gpio_direction_output(GPIO_LCDBL, 0);
-}
-static struct generic_bl_info eukrea_mbimxsd51_bl_info = {
-        .name                   = "eukrea_mbimxsd51-bl",
-        .max_intensity          = 0xff,
-        .default_intensity      = 0xff,
-        .set_bl_intensity       = eukrea_mbimxsd51_bl_set_intensity,
-};
-static struct platform_device eukrea_mbimxsd51_bl_dev = {
-        .name                   = "generic-bl",
-        .id                     = 1,
-        .dev = {
-                .platform_data  = &eukrea_mbimxsd51_bl_info,
-        },
-};
-static const struct gpio_led eukrea_mbimxsd51_leds[] __initconst = {
-        {
-                .name                   = "led1",
-                .default_trigger        = "heartbeat",
-                .active_low             = 1,
-                .gpio                   = GPIO_LED1,
-        },
-};
-static const struct gpio_led_platform_data
-                eukrea_mbimxsd51_led_info __initconst = {
-        .leds           = eukrea_mbimxsd51_leds,
-        .num_leds       = ARRAY_SIZE(eukrea_mbimxsd51_leds),
-};
-static struct gpio_keys_button eukrea_mbimxsd51_gpio_buttons[] = {
-        {
-                .gpio           = GPIO_SWITCH1,
-                .code           = BTN_0,
-                .desc           = "BP1",
-                .active_low     = 1,
-                .wakeup         = 1,
-        },
-};
-static const struct gpio_keys_platform_data
-                eukrea_mbimxsd51_button_data __initconst = {
-        .buttons        = eukrea_mbimxsd51_gpio_buttons,
-        .nbuttons       = ARRAY_SIZE(eukrea_mbimxsd51_gpio_buttons),
-};
-static const struct imxuart_platform_data uart_pdata __initconst = {
-        .flags = IMXUART_HAVE_RTSCTS,
-};
-static struct i2c_board_info eukrea_mbimxsd51_i2c_devices[] = {
-        {
-                I2C_BOARD_INFO("tlv320aic23", 0x1a),
-        },
-};
-static const
-struct imx_ssi_platform_data eukrea_mbimxsd51_ssi_pdata __initconst = {
-        .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,
-};
-static int screen_type;
-static int __init eukrea_mbimxsd51_screen_type(char *options)
-{
-        if (!strcmp(options, "dvi"))
-                screen_type = 1;
-        else if (!strcmp(options, "tft"))
-                screen_type = 0;
-        return 0;
-}
-__setup("screen_type=", eukrea_mbimxsd51_screen_type);
-/*
- * system init for baseboard usage. Will be called by cpuimx51sd init.
- *
- * Add platform devices present on this baseboard and init
- * them from CPU side as far as required to use them later on
- */
-void __init eukrea_mbimxsd51_baseboard_init(void)
-{
-        if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd51_pads,
-                        ARRAY_SIZE(eukrea_mbimxsd51_pads)))
-                printk(KERN_ERR "error setting mbimxsd pads !\n");
-        imx51_add_imx_uart(1, NULL);
-        imx51_add_imx_uart(2, &uart_pdata);
-        imx51_add_sdhci_esdhc_imx(0, NULL);
-        imx51_add_imx_ssi(0, &eukrea_mbimxsd51_ssi_pdata);
-        gpio_request(GPIO_LED1, "LED1");
-        gpio_direction_output(GPIO_LED1, 1);
-        gpio_free(GPIO_LED1);
-        gpio_request(GPIO_SWITCH1, "SWITCH1");
-        gpio_direction_input(GPIO_SWITCH1);
-        gpio_free(GPIO_SWITCH1);
-        gpio_request(GPIO_LCDRST, "LCDRST");
-        gpio_direction_output(GPIO_LCDRST, 0);
-        gpio_request(GPIO_LCDBL, "LCDBL");
-        gpio_direction_output(GPIO_LCDBL, 0);
-        if (!screen_type) {
-                platform_device_register(&eukrea_mbimxsd51_bl_dev);
-                platform_device_register(&eukrea_mbimxsd51_lcd_powerdev);
-        } else {
-                gpio_free(GPIO_LCDRST);
-                gpio_free(GPIO_LCDBL);
-        }
-        i2c_register_board_info(0, eukrea_mbimxsd51_i2c_devices,
-                                ARRAY_SIZE(eukrea_mbimxsd51_i2c_devices));
-        gpio_led_register_device(-1, &eukrea_mbimxsd51_led_info);
-        imx_add_gpio_keys(&eukrea_mbimxsd51_button_data);
-        imx_add_platform_device("eukrea_tlv320", 0, NULL, 0, NULL, 0);
-}
diff --git a/arch/arm/mach-imx/imx25-dt.c b/arch/arm/mach-imx/imx25-dt.c
index 3e1ec5ffe630..42a65e067443 100644
--- a/arch/arm/mach-imx/imx25-dt.c
+++ b/arch/arm/mach-imx/imx25-dt.c
@@ -38,7 +38,6 @@ DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)")
        .map_io         = mx25_map_io,
        .init_early     = imx25_init_early,
        .init_irq       = mx25_init_irq,
-        .handle_irq     = imx25_handle_irq,
        .init_time      = imx25_timer_init,
        .init_machine   = imx25_dt_init,
        .dt_compat      = imx25_dt_board_compat,
diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c
index 4e235ecb4021..17bd4058133d 100644
--- a/arch/arm/mach-imx/imx27-dt.c
+++ b/arch/arm/mach-imx/imx27-dt.c
@@ -43,7 +43,6 @@ DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)")
        .map_io         = mx27_map_io,
        .init_early     = imx27_init_early,
        .init_irq       = mx27_init_irq,
-        .handle_irq     = imx27_handle_irq,
        .init_time      = imx27_timer_init,
        .init_machine   = imx27_dt_init,
        .dt_compat      = imx27_dt_board_compat,
diff --git a/arch/arm/mach-imx/imx31-dt.c b/arch/arm/mach-imx/imx31-dt.c
index e1e70ef7bc2d..581f4d6c9b8a 100644
--- a/arch/arm/mach-imx/imx31-dt.c
+++ b/arch/arm/mach-imx/imx31-dt.c
@@ -39,7 +39,6 @@ DT_MACHINE_START(IMX31_DT, "Freescale i.MX31 (Device Tree Support)")
        .map_io         = mx31_map_io,
        .init_early     = imx31_init_early,
        .init_irq       = mx31_init_irq,
-        .handle_irq     = imx31_handle_irq,
        .init_time      = imx31_dt_timer_init,
        .init_machine   = imx31_dt_init,
        .dt_compat      = imx31_dt_board_compat,
diff --git a/arch/arm/mach-imx/imx35-dt.c b/arch/arm/mach-imx/imx35-dt.c
index 9d48e0065a63..a62854c59240 100644
--- a/arch/arm/mach-imx/imx35-dt.c
+++ b/arch/arm/mach-imx/imx35-dt.c
@@ -43,7 +43,6 @@ DT_MACHINE_START(IMX35_DT, "Freescale i.MX35 (Device Tree Support)")
        .map_io         = mx35_map_io,
        .init_early     = imx35_init_early,
        .init_irq       = imx35_irq_init,
-        .handle_irq     = imx35_handle_irq,
        .init_machine   = imx35_dt_init,
        .dt_compat      = imx35_dt_board_compat,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c
index 0230d78d1413..b8cd968faa52 100644
--- a/arch/arm/mach-imx/imx51-dt.c
+++ b/arch/arm/mach-imx/imx51-dt.c
@@ -38,7 +38,6 @@ DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
        .map_io         = mx51_map_io,
        .init_early     = imx51_init_early,
        .init_irq       = mx51_init_irq,
-        .handle_irq     = imx51_handle_irq,
        .init_machine   = imx51_dt_init,
        .init_late      = imx51_init_late,
        .dt_compat      = imx51_dt_board_compat,
diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c
index 067580b2969b..ebbb5ab63529 100644
--- a/arch/arm/mach-imx/mach-apf9328.c
+++ b/arch/arm/mach-imx/mach-apf9328.c
@@ -142,7 +142,6 @@ MACHINE_START(APF9328, "Armadeus APF9328")
        .map_io       = mx1_map_io,
        .init_early   = imx1_init_early,
        .init_irq     = mx1_init_irq,
-        .handle_irq   = imx1_handle_irq,
        .init_time      = apf9328_timer_init,
        .init_machine = apf9328_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index 58b864a3fc20..39406b7e3228 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -562,7 +562,6 @@ MACHINE_START(ARMADILLO5X0, "Armadillo-500")
        .map_io = mx31_map_io,
        .init_early = imx31_init_early,
        .init_irq = mx31_init_irq,
-        .handle_irq = imx31_handle_irq,
        .init_time      = armadillo5x0_timer_init,
        .init_machine = armadillo5x0_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-bug.c b/arch/arm/mach-imx/mach-bug.c
index 2d00476f7d2c..c97d7cb39135 100644
--- a/arch/arm/mach-imx/mach-bug.c
+++ b/arch/arm/mach-imx/mach-bug.c
@@ -57,7 +57,6 @@ MACHINE_START(BUG, "BugLabs BUGBase")
        .map_io = mx31_map_io,
        .init_early = imx31_init_early,
        .init_irq = mx31_init_irq,
-        .handle_irq = imx31_handle_irq,
        .init_time      = bug_timer_init,
        .init_machine = bug_board_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
index ea50870bda80..75b7b6aa2720 100644
--- a/arch/arm/mach-imx/mach-cpuimx27.c
+++ b/arch/arm/mach-imx/mach-cpuimx27.c
@@ -314,7 +314,6 @@ MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
        .map_io = mx27_map_io,
        .init_early = imx27_init_early,
        .init_irq = mx27_init_irq,
-        .handle_irq = imx27_handle_irq,
        .init_time      = eukrea_cpuimx27_timer_init,
        .init_machine = eukrea_cpuimx27_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c
index 65e4c53e1554..1ffa27169045 100644
--- a/arch/arm/mach-imx/mach-cpuimx35.c
+++ b/arch/arm/mach-imx/mach-cpuimx35.c
@@ -199,7 +199,6 @@ MACHINE_START(EUKREA_CPUIMX35SD, "Eukrea CPUIMX35")
        .map_io = mx35_map_io,
        .init_early = imx35_init_early,
        .init_irq = mx35_init_irq,
-        .handle_irq = imx35_handle_irq,
        .init_time      = eukrea_cpuimx35_timer_init,
        .init_machine = eukrea_cpuimx35_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-cpuimx51sd.c b/arch/arm/mach-imx/mach-cpuimx51sd.c
deleted file mode 100644
index 1fba2b8e983f..000000000000
--- a/arch/arm/mach-imx/mach-cpuimx51sd.c
+++ /dev/null
@@ -1,364 +0,0 @@
-/*
- *
- * Copyright (C) 2010 Eric Bénard <eric@eukrea.com>
- *
- * based on board-mx51_babbage.c which is
- * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
- * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/i2c.h>
-#include <linux/i2c/tsc2007.h>
-#include <linux/gpio.h>
-#include <linux/delay.h>
-#include <linux/io.h>
-#include <linux/interrupt.h>
-#include <linux/i2c-gpio.h>
-#include <linux/spi/spi.h>
-#include <linux/can/platform/mcp251x.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/time.h>
-#include "common.h"
-#include "devices-imx51.h"
-#include "eukrea-baseboards.h"
-#include "hardware.h"
-#include "iomux-mx51.h"
-#define USBH1_RST               IMX_GPIO_NR(2, 28)
-#define ETH_RST                 IMX_GPIO_NR(2, 31)
-#define TSC2007_IRQGPIO_REV2    IMX_GPIO_NR(3, 12)
-#define TSC2007_IRQGPIO_REV3    IMX_GPIO_NR(4, 0)
-#define CAN_IRQGPIO             IMX_GPIO_NR(1, 1)
-#define CAN_RST                 IMX_GPIO_NR(4, 15)
-#define CAN_NCS                 IMX_GPIO_NR(4, 24)
-#define CAN_RXOBF_REV2          IMX_GPIO_NR(1, 4)
-#define CAN_RXOBF_REV3          IMX_GPIO_NR(3, 12)
-#define CAN_RX1BF               IMX_GPIO_NR(1, 6)
-#define CAN_TXORTS              IMX_GPIO_NR(1, 7)
-#define CAN_TX1RTS              IMX_GPIO_NR(1, 8)
-#define CAN_TX2RTS              IMX_GPIO_NR(1, 9)
-#define I2C_SCL                 IMX_GPIO_NR(4, 16)
-#define I2C_SDA                 IMX_GPIO_NR(4, 17)
-/* USB_CTRL_1 */
-#define MX51_USB_CTRL_1_OFFSET          0x10
-#define MX51_USB_CTRL_UH1_EXT_CLK_EN    (1 << 25)
-#define MX51_USB_PLLDIV_12_MHZ          0x00
-#define MX51_USB_PLL_DIV_19_2_MHZ       0x01
-#define MX51_USB_PLL_DIV_24_MHZ         0x02
-static iomux_v3_cfg_t eukrea_cpuimx51sd_pads[] = {
-        /* UART1 */
-        MX51_PAD_UART1_RXD__UART1_RXD,
-        MX51_PAD_UART1_TXD__UART1_TXD,
-        MX51_PAD_UART1_RTS__UART1_RTS,
-        MX51_PAD_UART1_CTS__UART1_CTS,
-        /* USB HOST1 */
-        MX51_PAD_USBH1_CLK__USBH1_CLK,
-        MX51_PAD_USBH1_DIR__USBH1_DIR,
-        MX51_PAD_USBH1_NXT__USBH1_NXT,
-        MX51_PAD_USBH1_DATA0__USBH1_DATA0,
-        MX51_PAD_USBH1_DATA1__USBH1_DATA1,
-        MX51_PAD_USBH1_DATA2__USBH1_DATA2,
-        MX51_PAD_USBH1_DATA3__USBH1_DATA3,
-        MX51_PAD_USBH1_DATA4__USBH1_DATA4,
-        MX51_PAD_USBH1_DATA5__USBH1_DATA5,
-        MX51_PAD_USBH1_DATA6__USBH1_DATA6,
-        MX51_PAD_USBH1_DATA7__USBH1_DATA7,
-        MX51_PAD_USBH1_STP__USBH1_STP,
-        MX51_PAD_EIM_CS3__GPIO2_28,             /* PHY nRESET */
-        /* FEC */
-        MX51_PAD_EIM_DTACK__GPIO2_31,           /* PHY nRESET */
-        /* HSI2C */
-        MX51_PAD_I2C1_CLK__GPIO4_16,
-        MX51_PAD_I2C1_DAT__GPIO4_17,
-        /* I2C1 */
-        MX51_PAD_SD2_CMD__I2C1_SCL,
-        MX51_PAD_SD2_CLK__I2C1_SDA,
-        /* CAN */
-        MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
-        MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
-        MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
-        MX51_PAD_CSPI1_SS0__GPIO4_24,           /* nCS */
-        MX51_PAD_CSI2_PIXCLK__GPIO4_15,         /* nReset */
-        MX51_PAD_GPIO1_1__GPIO1_1,              /* IRQ */
-        MX51_PAD_GPIO1_4__GPIO1_4,              /* Control signals */
-        MX51_PAD_GPIO1_6__GPIO1_6,
-        MX51_PAD_GPIO1_7__GPIO1_7,
-        MX51_PAD_GPIO1_8__GPIO1_8,
-        MX51_PAD_GPIO1_9__GPIO1_9,
-        /* Touchscreen */
-        /* IRQ */
-        NEW_PAD_CTRL(MX51_PAD_GPIO_NAND__GPIO_NAND, PAD_CTL_PUS_22K_UP |
-                        PAD_CTL_PKE | PAD_CTL_SRE_FAST |
-                        PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
-        NEW_PAD_CTRL(MX51_PAD_NANDF_D8__GPIO4_0, PAD_CTL_PUS_22K_UP |
-                        PAD_CTL_PKE | PAD_CTL_SRE_FAST |
-                        PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
-};
-static const struct imxuart_platform_data uart_pdata __initconst = {
-        .flags = IMXUART_HAVE_RTSCTS,
-};
-static int tsc2007_get_pendown_state(struct device *dev)
-{
-        if (mx51_revision() < IMX_CHIP_REVISION_3_0)
-                return !gpio_get_value(TSC2007_IRQGPIO_REV2);
-        else
-                return !gpio_get_value(TSC2007_IRQGPIO_REV3);
-}
-static struct tsc2007_platform_data tsc2007_info = {
-        .model                  = 2007,
-        .x_plate_ohms           = 180,
-        .get_pendown_state      = tsc2007_get_pendown_state,
-};
-static struct i2c_board_info eukrea_cpuimx51sd_i2c_devices[] = {
-        {
-                I2C_BOARD_INFO("pcf8563", 0x51),
-        }, {
-                I2C_BOARD_INFO("tsc2007", 0x49),
-                .platform_data  = &tsc2007_info,
-        },
-};
-static const struct mxc_nand_platform_data
-                eukrea_cpuimx51sd_nand_board_info __initconst = {
-        .width          = 1,
-        .hw_ecc         = 1,
-        .flash_bbt      = 1,
-};
-/* This function is board specific as the bit mask for the plldiv will also
-be different for other Freescale SoCs, thus a common bitmask is not
-possible and cannot get place in /plat-mxc/ehci.c.*/
-static int initialize_otg_port(struct platform_device *pdev)
-{
-        u32 v;
-        void __iomem *usb_base;
-        void __iomem *usbother_base;
-        usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
-        if (!usb_base)
-                return -ENOMEM;
-        usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
-        /* Set the PHY clock to 19.2MHz */
-        v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
-        v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
-        v |= MX51_USB_PLL_DIV_19_2_MHZ;
-        __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
-        iounmap(usb_base);
-        mdelay(10);
-        return mx51_initialize_usb_hw(0, MXC_EHCI_INTERNAL_PHY);
-}
-static int initialize_usbh1_port(struct platform_device *pdev)
-{
-        u32 v;
-        void __iomem *usb_base;
-        void __iomem *usbother_base;
-        usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
-        if (!usb_base)
-                return -ENOMEM;
-        usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
-        /* The clock for the USBH1 ULPI port will come from the PHY. */
-        v = __raw_readl(usbother_base + MX51_USB_CTRL_1_OFFSET);
-        __raw_writel(v | MX51_USB_CTRL_UH1_EXT_CLK_EN,
-                        usbother_base + MX51_USB_CTRL_1_OFFSET);
-        iounmap(usb_base);
-        mdelay(10);
-        return mx51_initialize_usb_hw(1, MXC_EHCI_POWER_PINS_ENABLED |
-                        MXC_EHCI_ITC_NO_THRESHOLD);
-}
-static const struct mxc_usbh_platform_data dr_utmi_config __initconst = {
-        .init           = initialize_otg_port,
-        .portsc = MXC_EHCI_UTMI_16BIT,
-};
-static const struct fsl_usb2_platform_data usb_pdata __initconst = {
-        .operating_mode = FSL_USB2_DR_DEVICE,
-        .phy_mode       = FSL_USB2_PHY_UTMI_WIDE,
-};
-static const struct mxc_usbh_platform_data usbh1_config __initconst = {
-        .init           = initialize_usbh1_port,
-        .portsc = MXC_EHCI_MODE_ULPI,
-};
-static bool otg_mode_host __initdata;
-static int __init eukrea_cpuimx51sd_otg_mode(char *options)
-{
-        if (!strcmp(options, "host"))
-                otg_mode_host = true;
-        else if (!strcmp(options, "device"))
-                otg_mode_host = false;
-        else
-                pr_info("otg_mode neither \"host\" nor \"device\". "
-                        "Defaulting to device\n");
-        return 1;
-}
-__setup("otg_mode=", eukrea_cpuimx51sd_otg_mode);
-static struct i2c_gpio_platform_data pdata = {
-        .sda_pin                = I2C_SDA,
-        .sda_is_open_drain      = 0,
-        .scl_pin                = I2C_SCL,
-        .scl_is_open_drain      = 0,
-        .udelay                 = 2,
-};
-static struct platform_device hsi2c_gpio_device = {
-        .name                   = "i2c-gpio",
-        .id                     = 0,
-        .dev.platform_data      = &pdata,
-};
-static struct mcp251x_platform_data mcp251x_info = {
-        .oscillator_frequency = 24E6,
-};
-static struct spi_board_info cpuimx51sd_spi_device[] = {
-        {
-                .modalias        = "mcp2515",
-                .max_speed_hz    = 10000000,
-                .bus_num         = 0,
-                .mode           = SPI_MODE_0,
-                .chip_select     = 0,
-                .platform_data   = &mcp251x_info,
-                /* irq number is run-time assigned */
-        },
-};
-static int cpuimx51sd_spi1_cs[] = {
-        CAN_NCS,
-};
-static const struct spi_imx_master cpuimx51sd_ecspi1_pdata __initconst = {
-        .chipselect     = cpuimx51sd_spi1_cs,
-        .num_chipselect = ARRAY_SIZE(cpuimx51sd_spi1_cs),
-};
-static struct platform_device *rev2_platform_devices[] __initdata = {
-        &hsi2c_gpio_device,
-};
-static const struct imxi2c_platform_data cpuimx51sd_i2c_data __initconst = {
-        .bitrate = 100000,
-};
-static void __init eukrea_cpuimx51sd_init(void)
-{
-        imx51_soc_init();
-        mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx51sd_pads,
-                                        ARRAY_SIZE(eukrea_cpuimx51sd_pads));
-        imx51_add_imx_uart(0, &uart_pdata);
-        imx51_add_mxc_nand(&eukrea_cpuimx51sd_nand_board_info);
-        imx51_add_imx2_wdt(0);
-        gpio_request(ETH_RST, "eth_rst");
-        gpio_set_value(ETH_RST, 1);
-        imx51_add_fec(NULL);
-        gpio_request(CAN_IRQGPIO, "can_irq");
-        gpio_direction_input(CAN_IRQGPIO);
-        gpio_free(CAN_IRQGPIO);
-        gpio_request(CAN_NCS, "can_ncs");
-        gpio_direction_output(CAN_NCS, 1);
-        gpio_free(CAN_NCS);
-        gpio_request(CAN_RST, "can_rst");
-        gpio_direction_output(CAN_RST, 0);
-        msleep(20);
-        gpio_set_value(CAN_RST, 1);
-        imx51_add_ecspi(0, &cpuimx51sd_ecspi1_pdata);
-        cpuimx51sd_spi_device[0].irq = gpio_to_irq(CAN_IRQGPIO);
-        spi_register_board_info(cpuimx51sd_spi_device,
-                                ARRAY_SIZE(cpuimx51sd_spi_device));
-        if (mx51_revision() < IMX_CHIP_REVISION_3_0) {
-                eukrea_cpuimx51sd_i2c_devices[1].irq =
-                        gpio_to_irq(TSC2007_IRQGPIO_REV2),
-                platform_add_devices(rev2_platform_devices,
-                        ARRAY_SIZE(rev2_platform_devices));
-                gpio_request(TSC2007_IRQGPIO_REV2, "tsc2007_irq");
-                gpio_direction_input(TSC2007_IRQGPIO_REV2);
-                gpio_free(TSC2007_IRQGPIO_REV2);
-        } else {
-                eukrea_cpuimx51sd_i2c_devices[1].irq =
-                        gpio_to_irq(TSC2007_IRQGPIO_REV3),
-                imx51_add_imx_i2c(0, &cpuimx51sd_i2c_data);
-                gpio_request(TSC2007_IRQGPIO_REV3, "tsc2007_irq");
-                gpio_direction_input(TSC2007_IRQGPIO_REV3);
-                gpio_free(TSC2007_IRQGPIO_REV3);
-        }
-        i2c_register_board_info(0, eukrea_cpuimx51sd_i2c_devices,
-                        ARRAY_SIZE(eukrea_cpuimx51sd_i2c_devices));
-        if (otg_mode_host)
-                imx51_add_mxc_ehci_otg(&dr_utmi_config);
-        else {
-                initialize_otg_port(NULL);
-                imx51_add_fsl_usb2_udc(&usb_pdata);
-        }
-        gpio_request(USBH1_RST, "usb_rst");
-        gpio_direction_output(USBH1_RST, 0);
-        msleep(20);
-        gpio_set_value(USBH1_RST, 1);
-        imx51_add_mxc_ehci_hs(1, &usbh1_config);
-#ifdef CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD
-        eukrea_mbimxsd51_baseboard_init();
-#endif
-}
-static void __init eukrea_cpuimx51sd_timer_init(void)
-{
-        mx51_clocks_init(32768, 24000000, 22579200, 0);
-}
-MACHINE_START(EUKREA_CPUIMX51SD, "Eukrea CPUIMX51SD")
-        /* Maintainer: Eric Bénard <eric@eukrea.com> */
-        .atag_offset = 0x100,
-        .map_io = mx51_map_io,
-        .init_early = imx51_init_early,
-        .init_irq = mx51_init_irq,
-        .handle_irq = imx51_handle_irq,
-        .init_time      = eukrea_cpuimx51sd_timer_init,
-        .init_machine = eukrea_cpuimx51sd_init,
-        .init_late      = imx51_init_late,
-        .restart        = mxc_restart,
-MACHINE_END
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
index 4bf454424249..e978dda1434c 100644
--- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
+++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
@@ -165,7 +165,6 @@ MACHINE_START(EUKREA_CPUIMX25SD, "Eukrea CPUIMX25")
        .map_io = mx25_map_io,
        .init_early = imx25_init_early,
        .init_irq = mx25_init_irq,
-        .handle_irq = imx25_handle_irq,
        .init_time = eukrea_cpuimx25_timer_init,
        .init_machine = eukrea_cpuimx25_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index 97f9c6297fcf..b61bd8ed5568 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -604,7 +604,6 @@ MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
        .map_io = mx27_map_io,
        .init_early = imx27_init_early,
        .init_irq = mx27_init_irq,
-        .handle_irq = imx27_handle_irq,
        .init_time      = visstrim_m10_timer_init,
        .init_machine = visstrim_m10_board_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-imx27ipcam.c b/arch/arm/mach-imx/mach-imx27ipcam.c
index 1a851aea6832..bb3ca0429680 100644
--- a/arch/arm/mach-imx/mach-imx27ipcam.c
+++ b/arch/arm/mach-imx/mach-imx27ipcam.c
@@ -71,7 +71,6 @@ MACHINE_START(IMX27IPCAM, "Freescale IMX27IPCAM")
        .map_io = mx27_map_io,
        .init_early = imx27_init_early,
        .init_irq = mx27_init_irq,
-        .handle_irq = imx27_handle_irq,
        .init_time      = mx27ipcam_timer_init,
        .init_machine = mx27ipcam_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c
index 3da2e3e44ce9..9992089d3ad1 100644
--- a/arch/arm/mach-imx/mach-imx27lite.c
+++ b/arch/arm/mach-imx/mach-imx27lite.c
@@ -77,7 +77,6 @@ MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE")
        .map_io = mx27_map_io,
        .init_early = imx27_init_early,
        .init_irq = mx27_init_irq,
-        .handle_irq = imx27_handle_irq,
        .init_time      = mx27lite_timer_init,
        .init_machine = mx27lite_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-imx50.c b/arch/arm/mach-imx/mach-imx50.c
index 77b77a92bb5d..b899c0b59afd 100644
--- a/arch/arm/mach-imx/mach-imx50.c
+++ b/arch/arm/mach-imx/mach-imx50.c
@@ -31,7 +31,6 @@ static const char *imx50_dt_board_compat[] __initconst = {
 DT_MACHINE_START(IMX50_DT, "Freescale i.MX50 (Device Tree Support)")
        .map_io         = mx53_map_io,
        .init_irq       = mx53_init_irq,
-        .handle_irq     = imx50_handle_irq,
        .init_machine   = imx50_dt_init,
        .dt_compat      = imx50_dt_board_compat,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-imx53.c b/arch/arm/mach-imx/mach-imx53.c
index 65850908a4b4..2bad387956c0 100644
--- a/arch/arm/mach-imx/mach-imx53.c
+++ b/arch/arm/mach-imx/mach-imx53.c
@@ -40,7 +40,6 @@ DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)")
        .map_io         = mx53_map_io,
        .init_early     = imx53_init_early,
        .init_irq       = mx53_init_irq,
-        .handle_irq     = imx53_handle_irq,
        .init_machine   = imx53_dt_init,
        .init_late      = imx53_init_late,
        .dt_compat      = imx53_dt_board_compat,
diff --git a/arch/arm/mach-imx/mach-imx6sx.c b/arch/arm/mach-imx/mach-imx6sx.c
new file mode 100644
index 000000000000..02fccf6033ac
--- /dev/null
+++ b/arch/arm/mach-imx/mach-imx6sx.c
@@ -0,0 +1,51 @@
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/irqchip.h>
+#include <linux/of_platform.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include "common.h"
+static void __init imx6sx_init_machine(void)
+{
+        struct device *parent;
+        mxc_arch_reset_init_dt();
+        parent = imx_soc_device_init();
+        if (parent == NULL)
+                pr_warn("failed to initialize soc device\n");
+        of_platform_populate(NULL, of_default_bus_match_table, NULL, parent);
+        imx_anatop_init();
+}
+static void __init imx6sx_init_irq(void)
+{
+        imx_init_revision_from_anatop();
+        imx_init_l2cache();
+        imx_src_init();
+        imx_gpc_init();
+        irqchip_init();
+}
+static const char *imx6sx_dt_compat[] __initconst = {
+        "fsl,imx6sx",
+        NULL,
+};
+DT_MACHINE_START(IMX6SX, "Freescale i.MX6 SoloX (Device Tree)")
+        .map_io         = debug_ll_io_init,
+        .init_irq       = imx6sx_init_irq,
+        .init_machine   = imx6sx_init_machine,
+        .dt_compat      = imx6sx_dt_compat,
+        .restart        = mxc_restart,
+MACHINE_END
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c
index c7bc41d6b468..31df4361996f 100644
--- a/arch/arm/mach-imx/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c
@@ -289,7 +289,6 @@ MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
        .map_io = kzm_map_io,
        .init_early = imx31_init_early,
        .init_irq = mx31_init_irq,
-        .handle_irq = imx31_handle_irq,
        .init_time      = kzm_timer_init,
        .init_machine = kzm_board_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c
index 9f883e4d6fc9..77fda3de4290 100644
--- a/arch/arm/mach-imx/mach-mx1ads.c
+++ b/arch/arm/mach-imx/mach-mx1ads.c
@@ -138,7 +138,6 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS")
        .map_io = mx1_map_io,
        .init_early = imx1_init_early,
        .init_irq = mx1_init_irq,
-        .handle_irq = imx1_handle_irq,
        .init_time      = mx1ads_timer_init,
        .init_machine = mx1ads_init,
        .restart        = mxc_restart,
@@ -149,7 +148,6 @@ MACHINE_START(MXLADS, "Freescale MXLADS")
        .map_io = mx1_map_io,
        .init_early = imx1_init_early,
        .init_irq = mx1_init_irq,
-        .handle_irq = imx1_handle_irq,
        .init_time      = mx1ads_timer_init,
        .init_machine = mx1ads_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c
index a06aa4dc37fc..703ce31d7379 100644
--- a/arch/arm/mach-imx/mach-mx21ads.c
+++ b/arch/arm/mach-imx/mach-mx21ads.c
@@ -17,51 +17,46 @@
 #include <linux/platform_device.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/physmap.h>
+#include <linux/basic_mmio_gpio.h>
 #include <linux/gpio.h>
+#include <linux/regulator/fixed.h>
+#include <linux/regulator/machine.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <asm/mach/time.h>
-#include <asm/mach/map.h>
 #include "common.h"
 #include "devices-imx21.h"
 #include "hardware.h"
 #include "iomux-mx21.h"
-/*
+#define MX21ADS_CS8900A_REG             (MX21_CS1_BASE_ADDR + 0x000000)
- * Memory-mapped I/O on MX21ADS base board
+#define MX21ADS_ST16C255_IOBASE_REG     (MX21_CS1_BASE_ADDR + 0x200000)
- */
+#define MX21ADS_VERSION_REG             (MX21_CS1_BASE_ADDR + 0x400000)
-#define MX21ADS_MMIO_BASE_ADDR   0xf5000000
+#define MX21ADS_IO_REG                  (MX21_CS1_BASE_ADDR + 0x800000)
-#define MX21ADS_MMIO_SIZE        0xc00000
-#define MX21ADS_REG_ADDR(offset)    (void __force __iomem *) \
-                (MX21ADS_MMIO_BASE_ADDR + (offset))
-#define MX21ADS_CS8900A_MMIO_SIZE   0x200000
+#define MX21ADS_MMC_CD                  IMX_GPIO_NR(4, 25)
-#define MX21ADS_CS8900A_IRQ_GPIO    IMX_GPIO_NR(5, 11)
+#define MX21ADS_CS8900A_IRQ_GPIO        IMX_GPIO_NR(5, 11)
-#define MX21ADS_ST16C255_IOBASE_REG MX21ADS_REG_ADDR(0x200000)
+#define MX21ADS_MMGPIO_BASE             (6 * 32)
-#define MX21ADS_VERSION_REG         MX21ADS_REG_ADDR(0x400000)
-#define MX21ADS_IO_REG              MX21ADS_REG_ADDR(0x800000)
 /* MX21ADS_IO_REG bit definitions */
-#define MX21ADS_IO_SD_WP        0x0001 /* read */
+#define MX21ADS_IO_SD_WP                (MX21ADS_MMGPIO_BASE + 0)
-#define MX21ADS_IO_TP6          0x0001 /* write */
+#define MX21ADS_IO_TP6                  (MX21ADS_IO_SD_WP)
-#define MX21ADS_IO_SW_SEL       0x0002 /* read */
+#define MX21ADS_IO_SW_SEL               (MX21ADS_MMGPIO_BASE + 1)
-#define MX21ADS_IO_TP7          0x0002 /* write */
+#define MX21ADS_IO_TP7                  (MX21ADS_IO_SW_SEL)
-#define MX21ADS_IO_RESET_E_UART 0x0004
+#define MX21ADS_IO_RESET_E_UART         (MX21ADS_MMGPIO_BASE + 2)
-#define MX21ADS_IO_RESET_BASE   0x0008
+#define MX21ADS_IO_RESET_BASE           (MX21ADS_MMGPIO_BASE + 3)
-#define MX21ADS_IO_CSI_CTL2     0x0010
+#define MX21ADS_IO_CSI_CTL2             (MX21ADS_MMGPIO_BASE + 4)
-#define MX21ADS_IO_CSI_CTL1     0x0020
+#define MX21ADS_IO_CSI_CTL1             (MX21ADS_MMGPIO_BASE + 5)
-#define MX21ADS_IO_CSI_CTL0     0x0040
+#define MX21ADS_IO_CSI_CTL0             (MX21ADS_MMGPIO_BASE + 6)
-#define MX21ADS_IO_UART1_EN     0x0080
+#define MX21ADS_IO_UART1_EN             (MX21ADS_MMGPIO_BASE + 7)
-#define MX21ADS_IO_UART4_EN     0x0100
+#define MX21ADS_IO_UART4_EN             (MX21ADS_MMGPIO_BASE + 8)
-#define MX21ADS_IO_LCDON        0x0200
+#define MX21ADS_IO_LCDON                (MX21ADS_MMGPIO_BASE + 9)
-#define MX21ADS_IO_IRDA_EN      0x0400
+#define MX21ADS_IO_IRDA_EN              (MX21ADS_MMGPIO_BASE + 10)
-#define MX21ADS_IO_IRDA_FIR_SEL 0x0800
+#define MX21ADS_IO_IRDA_FIR_SEL         (MX21ADS_MMGPIO_BASE + 11)
-#define MX21ADS_IO_IRDA_MD0_B   0x1000
+#define MX21ADS_IO_IRDA_MD0_B           (MX21ADS_MMGPIO_BASE + 12)
-#define MX21ADS_IO_IRDA_MD1     0x2000
+#define MX21ADS_IO_IRDA_MD1             (MX21ADS_MMGPIO_BASE + 13)
-#define MX21ADS_IO_LED4_ON      0x4000
+#define MX21ADS_IO_LED4_ON              (MX21ADS_MMGPIO_BASE + 14)
-#define MX21ADS_IO_LED3_ON      0x8000
+#define MX21ADS_IO_LED3_ON              (MX21ADS_MMGPIO_BASE + 15)
 static const int mx21ads_pins[] __initconst = {
@@ -143,11 +138,8 @@ static struct physmap_flash_data mx21ads_flash_data = {
        .width = 4,
 };
-static struct resource mx21ads_flash_resource = {
+static struct resource mx21ads_flash_resource =
-        .start = MX21_CS0_BASE_ADDR,
+        DEFINE_RES_MEM(MX21_CS0_BASE_ADDR, SZ_32M);
-        .end = MX21_CS0_BASE_ADDR + 0x02000000 - 1,
-        .flags = IORESOURCE_MEM,
-};
 static struct platform_device mx21ads_nor_mtd_device = {
        .name = "physmap-flash",
@@ -160,7 +152,7 @@ static struct platform_device mx21ads_nor_mtd_device = {
 };
 static struct resource mx21ads_cs8900_resources[] __initdata = {
-        DEFINE_RES_MEM(MX21_CS1_BASE_ADDR, MX21ADS_CS8900A_MMIO_SIZE),
+        DEFINE_RES_MEM(MX21ADS_CS8900A_REG, SZ_1K),
        /* irq number is run-time assigned */
        DEFINE_RES_IRQ(-1),
 };
@@ -179,24 +171,50 @@ static const struct imxuart_platform_data uart_pdata_rts __initconst = {
 static const struct imxuart_platform_data uart_pdata_norts __initconst = {
 };
-static int mx21ads_fb_init(struct platform_device *pdev)
+static struct resource mx21ads_mmgpio_resource =
-{
+        DEFINE_RES_MEM_NAMED(MX21ADS_IO_REG, SZ_2, "dat");
-        u16 tmp;
-        tmp = __raw_readw(MX21ADS_IO_REG);
+static struct bgpio_pdata mx21ads_mmgpio_pdata = {
-        tmp |= MX21ADS_IO_LCDON;
+        .base   = MX21ADS_MMGPIO_BASE,
-        __raw_writew(tmp, MX21ADS_IO_REG);
+        .ngpio  = 16,
-        return 0;
+};
-}
-static void mx21ads_fb_exit(struct platform_device *pdev)
+static struct platform_device mx21ads_mmgpio = {
-{
+        .name = "basic-mmio-gpio",
-        u16 tmp;
+        .id = PLATFORM_DEVID_AUTO,
+        .resource = &mx21ads_mmgpio_resource,
+        .num_resources = 1,
+        .dev = {
+                .platform_data = &mx21ads_mmgpio_pdata,
+        },
+};
-        tmp = __raw_readw(MX21ADS_IO_REG);
+static struct regulator_consumer_supply mx21ads_lcd_regulator_consumer =
-        tmp &= ~MX21ADS_IO_LCDON;
+        REGULATOR_SUPPLY("lcd", "imx-fb.0");
-        __raw_writew(tmp, MX21ADS_IO_REG);
-}
+static struct regulator_init_data mx21ads_lcd_regulator_init_data = {
+        .constraints = {
+                .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+        },
+        .consumer_supplies      = &mx21ads_lcd_regulator_consumer,
+        .num_consumer_supplies  = 1,
+};
+static struct fixed_voltage_config mx21ads_lcd_regulator_pdata = {
+        .supply_name    = "LCD",
+        .microvolts     = 3300000,
+        .gpio           = MX21ADS_IO_LCDON,
+        .enable_high    = 1,
+        .init_data      = &mx21ads_lcd_regulator_init_data,
+};
+static struct platform_device mx21ads_lcd_regulator = {
+        .name = "reg-fixed-voltage",
+        .id = PLATFORM_DEVID_AUTO,
+        .dev = {
+                .platform_data = &mx21ads_lcd_regulator_pdata,
+        },
+};
 /*
 * Connected is a portrait Sharp-QVGA display
@@ -229,26 +247,30 @@ static const struct imx_fb_platform_data mx21ads_fb_data __initconst = {
        .pwmr           = 0x00a903ff,
        .lscr1          = 0x00120300,
        .dmacr          = 0x00020008,
-        .init = mx21ads_fb_init,
-        .exit = mx21ads_fb_exit,
 };
 static int mx21ads_sdhc_get_ro(struct device *dev)
 {
-        return (__raw_readw(MX21ADS_IO_REG) & MX21ADS_IO_SD_WP) ? 1 : 0;
+        return gpio_get_value(MX21ADS_IO_SD_WP);
 }
 static int mx21ads_sdhc_init(struct device *dev, irq_handler_t detect_irq,
        void *data)
 {
-        return request_irq(gpio_to_irq(IMX_GPIO_NR(4, 25)), detect_irq,
+        int ret;
-                IRQF_TRIGGER_FALLING, "mmc-detect", data);
+        ret = gpio_request(MX21ADS_IO_SD_WP, "mmc-ro");
+        if (ret)
+                return ret;
+        return request_irq(gpio_to_irq(MX21ADS_MMC_CD), detect_irq,
+                           IRQF_TRIGGER_FALLING, "mmc-detect", data);
 }
 static void mx21ads_sdhc_exit(struct device *dev, void *data)
 {
-        free_irq(gpio_to_irq(IMX_GPIO_NR(4, 25)), data);
+        free_irq(gpio_to_irq(MX21ADS_MMC_CD), data);
+        gpio_free(MX21ADS_IO_SD_WP);
 }
 static const struct imxmmc_platform_data mx21ads_sdhc_pdata __initconst = {
@@ -264,29 +286,9 @@ mx21ads_nand_board_info __initconst = {
        .hw_ecc = 1,
 };
-static struct map_desc mx21ads_io_desc[] __initdata = {
-        /*
-         * Memory-mapped I/O on MX21ADS Base board:
-         *   - CS8900A Ethernet controller
-         *   - ST16C2552CJ UART
-         *   - CPU and Base board version
-         *   - Base board I/O register
-         */
-        {
-                .virtual = MX21ADS_MMIO_BASE_ADDR,
-                .pfn = __phys_to_pfn(MX21_CS1_BASE_ADDR),
-                .length = MX21ADS_MMIO_SIZE,
-                .type = MT_DEVICE,
-        },
-};
-static void __init mx21ads_map_io(void)
-{
-        mx21_map_io();
-        iotable_init(mx21ads_io_desc, ARRAY_SIZE(mx21ads_io_desc));
-}
 static struct platform_device *platform_devices[] __initdata = {
+        &mx21ads_mmgpio,
+        &mx21ads_lcd_regulator,
        &mx21ads_nor_mtd_device,
 };
@@ -300,12 +302,13 @@ static void __init mx21ads_board_init(void)
        imx21_add_imx_uart0(&uart_pdata_rts);
        imx21_add_imx_uart2(&uart_pdata_norts);
        imx21_add_imx_uart3(&uart_pdata_rts);
-        imx21_add_imx_fb(&mx21ads_fb_data);
        imx21_add_mxc_mmc(0, &mx21ads_sdhc_pdata);
        imx21_add_mxc_nand(&mx21ads_nand_board_info);
        platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
+        imx21_add_imx_fb(&mx21ads_fb_data);
        mx21ads_cs8900_resources[1].start =
                        gpio_to_irq(MX21ADS_CS8900A_IRQ_GPIO);
        mx21ads_cs8900_resources[1].end =
@@ -321,10 +324,9 @@ static void __init mx21ads_timer_init(void)
 MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
        /* maintainer: Freescale Semiconductor, Inc. */
        .atag_offset = 0x100,
-        .map_io = mx21ads_map_io,
+        .map_io         = mx21_map_io,
        .init_early = imx21_init_early,
        .init_irq = mx21_init_irq,
-        .handle_irq = imx21_handle_irq,
        .init_time      = mx21ads_timer_init,
        .init_machine = mx21ads_board_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c
index 13490c203050..ea1fa199c148 100644
--- a/arch/arm/mach-imx/mach-mx25_3ds.c
+++ b/arch/arm/mach-imx/mach-mx25_3ds.c
@@ -263,7 +263,6 @@ MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)")
        .map_io = mx25_map_io,
        .init_early = imx25_init_early,
        .init_irq = mx25_init_irq,
-        .handle_irq = imx25_handle_irq,
        .init_time      = mx25pdk_timer_init,
        .init_machine = mx25pdk_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index 25b3e4c9bc0a..435a5428a678 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -544,7 +544,6 @@ MACHINE_START(MX27_3DS, "Freescale MX27PDK")
        .map_io = mx27_map_io,
        .init_early = imx27_init_early,
        .init_irq = mx27_init_irq,
-        .handle_irq = imx27_handle_irq,
        .init_time      = mx27pdk_timer_init,
        .init_machine = mx27pdk_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c
index a7a4a9c67615..2f834ce8f39c 100644
--- a/arch/arm/mach-imx/mach-mx27ads.c
+++ b/arch/arm/mach-imx/mach-mx27ads.c
@@ -391,7 +391,6 @@ MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
        .map_io = mx27ads_map_io,
        .init_early = imx27_init_early,
        .init_irq = mx27_init_irq,
-        .handle_irq = imx27_handle_irq,
        .init_time      = mx27ads_timer_init,
        .init_machine = mx27ads_board_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c
index 50044a21b388..4217871a9653 100644
--- a/arch/arm/mach-imx/mach-mx31_3ds.c
+++ b/arch/arm/mach-imx/mach-mx31_3ds.c
@@ -775,7 +775,6 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
        .map_io = mx31_map_io,
        .init_early = imx31_init_early,
        .init_irq = mx31_init_irq,
-        .handle_irq = imx31_handle_irq,
        .init_time      = mx31_3ds_timer_init,
        .init_machine = mx31_3ds_init,
        .reserve = mx31_3ds_reserve,
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c
index daf8889125cc..d08c37c696f6 100644
--- a/arch/arm/mach-imx/mach-mx31ads.c
+++ b/arch/arm/mach-imx/mach-mx31ads.c
@@ -582,7 +582,6 @@ MACHINE_START(MX31ADS, "Freescale MX31ADS")
        .map_io = mx31ads_map_io,
        .init_early = imx31_init_early,
        .init_irq = mx31ads_init_irq,
-        .handle_irq = imx31_handle_irq,
        .init_time      = mx31ads_timer_init,
        .init_machine = mx31ads_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c
index 832b1e2f964e..eee042fa2768 100644
--- a/arch/arm/mach-imx/mach-mx31lilly.c
+++ b/arch/arm/mach-imx/mach-mx31lilly.c
@@ -308,7 +308,6 @@ MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
        .map_io = mx31_map_io,
        .init_early = imx31_init_early,
        .init_irq = mx31_init_irq,
-        .handle_irq = imx31_handle_irq,
        .init_time      = mx31lilly_timer_init,
        .init_machine = mx31lilly_board_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c
index bea07299b61a..fa15d0b6118d 100644
--- a/arch/arm/mach-imx/mach-mx31lite.c
+++ b/arch/arm/mach-imx/mach-mx31lite.c
@@ -291,7 +291,6 @@ MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
        .map_io = mx31lite_map_io,
        .init_early = imx31_init_early,
        .init_irq = mx31_init_irq,
-        .handle_irq = imx31_handle_irq,
        .init_time      = mx31lite_timer_init,
        .init_machine = mx31lite_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c
index 8f45afe785f8..08730f238449 100644
--- a/arch/arm/mach-imx/mach-mx31moboard.c
+++ b/arch/arm/mach-imx/mach-mx31moboard.c
@@ -600,7 +600,6 @@ MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
        .map_io = mx31_map_io,
        .init_early = imx31_init_early,
        .init_irq = mx31_init_irq,
-        .handle_irq = imx31_handle_irq,
        .init_time      = mx31moboard_timer_init,
        .init_machine = mx31moboard_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c
index a42f4f07051f..4e8b184d773b 100644
--- a/arch/arm/mach-imx/mach-mx35_3ds.c
+++ b/arch/arm/mach-imx/mach-mx35_3ds.c
@@ -615,7 +615,6 @@ MACHINE_START(MX35_3DS, "Freescale MX35PDK")
        .map_io = mx35_map_io,
        .init_early = imx35_init_early,
        .init_irq = mx35_init_irq,
-        .handle_irq = imx35_handle_irq,
        .init_time      = mx35pdk_timer_init,
        .init_machine = mx35_3ds_init,
        .reserve = mx35_3ds_reserve,
diff --git a/arch/arm/mach-imx/mach-mx51_babbage.c b/arch/arm/mach-imx/mach-mx51_babbage.c
deleted file mode 100644
index f3d264a636fa..000000000000
--- a/arch/arm/mach-imx/mach-mx51_babbage.c
+++ /dev/null
@@ -1,428 +0,0 @@
-/*
- * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
- * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/i2c.h>
-#include <linux/gpio.h>
-#include <linux/delay.h>
-#include <linux/io.h>
-#include <linux/input.h>
-#include <linux/spi/flash.h>
-#include <linux/spi/spi.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/time.h>
-#include "common.h"
-#include "devices-imx51.h"
-#include "hardware.h"
-#include "iomux-mx51.h"
-#define BABBAGE_USB_HUB_RESET   IMX_GPIO_NR(1, 7)
-#define BABBAGE_USBH1_STP       IMX_GPIO_NR(1, 27)
-#define BABBAGE_USB_PHY_RESET   IMX_GPIO_NR(2, 5)
-#define BABBAGE_FEC_PHY_RESET   IMX_GPIO_NR(2, 14)
-#define BABBAGE_POWER_KEY       IMX_GPIO_NR(2, 21)
-#define BABBAGE_ECSPI1_CS0      IMX_GPIO_NR(4, 24)
-#define BABBAGE_ECSPI1_CS1      IMX_GPIO_NR(4, 25)
-#define BABBAGE_SD2_CD          IMX_GPIO_NR(1, 6)
-#define BABBAGE_SD2_WP          IMX_GPIO_NR(1, 5)
-/* USB_CTRL_1 */
-#define MX51_USB_CTRL_1_OFFSET                  0x10
-#define MX51_USB_CTRL_UH1_EXT_CLK_EN            (1 << 25)
-#define MX51_USB_PLLDIV_12_MHZ          0x00
-#define MX51_USB_PLL_DIV_19_2_MHZ       0x01
-#define MX51_USB_PLL_DIV_24_MHZ 0x02
-static struct gpio_keys_button babbage_buttons[] = {
-        {
-                .gpio           = BABBAGE_POWER_KEY,
-                .code           = BTN_0,
-                .desc           = "PWR",
-                .active_low     = 1,
-                .wakeup         = 1,
-        },
-};
-static const struct gpio_keys_platform_data imx_button_data __initconst = {
-        .buttons        = babbage_buttons,
-        .nbuttons       = ARRAY_SIZE(babbage_buttons),
-};
-static iomux_v3_cfg_t mx51babbage_pads[] = {
-        /* UART1 */
-        MX51_PAD_UART1_RXD__UART1_RXD,
-        MX51_PAD_UART1_TXD__UART1_TXD,
-        MX51_PAD_UART1_RTS__UART1_RTS,
-        MX51_PAD_UART1_CTS__UART1_CTS,
-        /* UART2 */
-        MX51_PAD_UART2_RXD__UART2_RXD,
-        MX51_PAD_UART2_TXD__UART2_TXD,
-        /* UART3 */
-        MX51_PAD_EIM_D25__UART3_RXD,
-        MX51_PAD_EIM_D26__UART3_TXD,
-        MX51_PAD_EIM_D27__UART3_RTS,
-        MX51_PAD_EIM_D24__UART3_CTS,
-        /* I2C1 */
-        MX51_PAD_EIM_D16__I2C1_SDA,
-        MX51_PAD_EIM_D19__I2C1_SCL,
-        /* I2C2 */
-        MX51_PAD_KEY_COL4__I2C2_SCL,
-        MX51_PAD_KEY_COL5__I2C2_SDA,
-        /* HSI2C */
-        MX51_PAD_I2C1_CLK__I2C1_CLK,
-        MX51_PAD_I2C1_DAT__I2C1_DAT,
-        /* USB HOST1 */
-        MX51_PAD_USBH1_CLK__USBH1_CLK,
-        MX51_PAD_USBH1_DIR__USBH1_DIR,
-        MX51_PAD_USBH1_NXT__USBH1_NXT,
-        MX51_PAD_USBH1_DATA0__USBH1_DATA0,
-        MX51_PAD_USBH1_DATA1__USBH1_DATA1,
-        MX51_PAD_USBH1_DATA2__USBH1_DATA2,
-        MX51_PAD_USBH1_DATA3__USBH1_DATA3,
-        MX51_PAD_USBH1_DATA4__USBH1_DATA4,
-        MX51_PAD_USBH1_DATA5__USBH1_DATA5,
-        MX51_PAD_USBH1_DATA6__USBH1_DATA6,
-        MX51_PAD_USBH1_DATA7__USBH1_DATA7,
-        /* USB HUB reset line*/
-        MX51_PAD_GPIO1_7__GPIO1_7,
-        /* USB PHY reset line */
-        MX51_PAD_EIM_D21__GPIO2_5,
-        /* FEC */
-        MX51_PAD_EIM_EB2__FEC_MDIO,
-        MX51_PAD_EIM_EB3__FEC_RDATA1,
-        MX51_PAD_EIM_CS2__FEC_RDATA2,
-        MX51_PAD_EIM_CS3__FEC_RDATA3,
-        MX51_PAD_EIM_CS4__FEC_RX_ER,
-        MX51_PAD_EIM_CS5__FEC_CRS,
-        MX51_PAD_NANDF_RB2__FEC_COL,
-        MX51_PAD_NANDF_RB3__FEC_RX_CLK,
-        MX51_PAD_NANDF_D9__FEC_RDATA0,
-        MX51_PAD_NANDF_D8__FEC_TDATA0,
-        MX51_PAD_NANDF_CS2__FEC_TX_ER,
-        MX51_PAD_NANDF_CS3__FEC_MDC,
-        MX51_PAD_NANDF_CS4__FEC_TDATA1,
-        MX51_PAD_NANDF_CS5__FEC_TDATA2,
-        MX51_PAD_NANDF_CS6__FEC_TDATA3,
-        MX51_PAD_NANDF_CS7__FEC_TX_EN,
-        MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK,
-        /* FEC PHY reset line */
-        MX51_PAD_EIM_A20__GPIO2_14,
-        /* SD 1 */
-        MX51_PAD_SD1_CMD__SD1_CMD,
-        MX51_PAD_SD1_CLK__SD1_CLK,
-        MX51_PAD_SD1_DATA0__SD1_DATA0,
-        MX51_PAD_SD1_DATA1__SD1_DATA1,
-        MX51_PAD_SD1_DATA2__SD1_DATA2,
-        MX51_PAD_SD1_DATA3__SD1_DATA3,
-        /* CD/WP from controller */
-        MX51_PAD_GPIO1_0__SD1_CD,
-        MX51_PAD_GPIO1_1__SD1_WP,
-        /* SD 2 */
-        MX51_PAD_SD2_CMD__SD2_CMD,
-        MX51_PAD_SD2_CLK__SD2_CLK,
-        MX51_PAD_SD2_DATA0__SD2_DATA0,
-        MX51_PAD_SD2_DATA1__SD2_DATA1,
-        MX51_PAD_SD2_DATA2__SD2_DATA2,
-        MX51_PAD_SD2_DATA3__SD2_DATA3,
-        /* CD/WP gpio */
-        MX51_PAD_GPIO1_6__GPIO1_6,
-        MX51_PAD_GPIO1_5__GPIO1_5,
-        /* eCSPI1 */
-        MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
-        MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
-        MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
-        MX51_PAD_CSPI1_SS0__GPIO4_24,
-        MX51_PAD_CSPI1_SS1__GPIO4_25,
-        /* Audio */
-        MX51_PAD_AUD3_BB_TXD__AUD3_TXD,
-        MX51_PAD_AUD3_BB_RXD__AUD3_RXD,
-        MX51_PAD_AUD3_BB_CK__AUD3_TXC,
-        MX51_PAD_AUD3_BB_FS__AUD3_TXFS,
-};
-/* Serial ports */
-static const struct imxuart_platform_data uart_pdata __initconst = {
-        .flags = IMXUART_HAVE_RTSCTS,
-};
-static const struct imxi2c_platform_data babbage_i2c_data __initconst = {
-        .bitrate = 100000,
-};
-static const struct imxi2c_platform_data babbage_hsi2c_data __initconst = {
-        .bitrate = 400000,
-};
-static struct gpio mx51_babbage_usbh1_gpios[] = {
-        { BABBAGE_USBH1_STP, GPIOF_OUT_INIT_LOW, "usbh1_stp" },
-        { BABBAGE_USB_PHY_RESET, GPIOF_OUT_INIT_LOW, "usbh1_phy_reset" },
-};
-static int gpio_usbh1_active(void)
-{
-        iomux_v3_cfg_t usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO1_27;
-        int ret;
-        /* Set USBH1_STP to GPIO and toggle it */
-        mxc_iomux_v3_setup_pad(usbh1stp_gpio);
-        ret = gpio_request_array(mx51_babbage_usbh1_gpios,
-                                        ARRAY_SIZE(mx51_babbage_usbh1_gpios));
-        if (ret) {
-                pr_debug("failed to get USBH1 pins: %d\n", ret);
-                return ret;
-        }
-        msleep(100);
-        gpio_set_value(BABBAGE_USBH1_STP, 1);
-        gpio_set_value(BABBAGE_USB_PHY_RESET, 1);
-        gpio_free_array(mx51_babbage_usbh1_gpios,
-                                        ARRAY_SIZE(mx51_babbage_usbh1_gpios));
-        return 0;
-}
-static inline void babbage_usbhub_reset(void)
-{
-        int ret;
-        /* Reset USB hub */
-        ret = gpio_request_one(BABBAGE_USB_HUB_RESET,
-                                        GPIOF_OUT_INIT_LOW, "GPIO1_7");
-        if (ret) {
-                printk(KERN_ERR"failed to get GPIO_USB_HUB_RESET: %d\n", ret);
-                return;
-        }
-        msleep(2);
-        /* Deassert reset */
-        gpio_set_value(BABBAGE_USB_HUB_RESET, 1);
-}
-static inline void babbage_fec_reset(void)
-{
-        int ret;
-        /* reset FEC PHY */
-        ret = gpio_request_one(BABBAGE_FEC_PHY_RESET,
-                                        GPIOF_OUT_INIT_LOW, "fec-phy-reset");
-        if (ret) {
-                printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret);
-                return;
-        }
-        msleep(1);
-        gpio_set_value(BABBAGE_FEC_PHY_RESET, 1);
-}
-/* This function is board specific as the bit mask for the plldiv will also
-be different for other Freescale SoCs, thus a common bitmask is not
-possible and cannot get place in /plat-mxc/ehci.c.*/
-static int initialize_otg_port(struct platform_device *pdev)
-{
-        u32 v;
-        void __iomem *usb_base;
-        void __iomem *usbother_base;
-        usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
-        if (!usb_base)
-                return -ENOMEM;
-        usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
-        /* Set the PHY clock to 19.2MHz */
-        v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
-        v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
-        v |= MX51_USB_PLL_DIV_19_2_MHZ;
-        __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
-        iounmap(usb_base);
-        mdelay(10);
-        return mx51_initialize_usb_hw(0, MXC_EHCI_INTERNAL_PHY);
-}
-static int initialize_usbh1_port(struct platform_device *pdev)
-{
-        u32 v;
-        void __iomem *usb_base;
-        void __iomem *usbother_base;
-        usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
-        if (!usb_base)
-                return -ENOMEM;
-        usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
-        /* The clock for the USBH1 ULPI port will come externally from the PHY. */
-        v = __raw_readl(usbother_base + MX51_USB_CTRL_1_OFFSET);
-        __raw_writel(v | MX51_USB_CTRL_UH1_EXT_CLK_EN, usbother_base + MX51_USB_CTRL_1_OFFSET);
-        iounmap(usb_base);
-        mdelay(10);
-        return mx51_initialize_usb_hw(1, MXC_EHCI_POWER_PINS_ENABLED |
-                        MXC_EHCI_ITC_NO_THRESHOLD);
-}
-static const struct mxc_usbh_platform_data dr_utmi_config __initconst = {
-        .init           = initialize_otg_port,
-        .portsc = MXC_EHCI_UTMI_16BIT,
-};
-static const struct fsl_usb2_platform_data usb_pdata __initconst = {
-        .operating_mode = FSL_USB2_DR_DEVICE,
-        .phy_mode       = FSL_USB2_PHY_UTMI_WIDE,
-};
-static const struct mxc_usbh_platform_data usbh1_config __initconst = {
-        .init           = initialize_usbh1_port,
-        .portsc = MXC_EHCI_MODE_ULPI,
-};
-static bool otg_mode_host __initdata;
-static int __init babbage_otg_mode(char *options)
-{
-        if (!strcmp(options, "host"))
-                otg_mode_host = true;
-        else if (!strcmp(options, "device"))
-                otg_mode_host = false;
-        else
-                pr_info("otg_mode neither \"host\" nor \"device\". "
-                        "Defaulting to device\n");
-        return 1;
-}
-__setup("otg_mode=", babbage_otg_mode);
-static struct spi_board_info mx51_babbage_spi_board_info[] __initdata = {
-        {
-                .modalias = "mtd_dataflash",
-                .max_speed_hz = 25000000,
-                .bus_num = 0,
-                .chip_select = 1,
-                .mode = SPI_MODE_0,
-                .platform_data = NULL,
-        },
-};
-static int mx51_babbage_spi_cs[] = {
-        BABBAGE_ECSPI1_CS0,
-        BABBAGE_ECSPI1_CS1,
-};
-static const struct spi_imx_master mx51_babbage_spi_pdata __initconst = {
-        .chipselect     = mx51_babbage_spi_cs,
-        .num_chipselect = ARRAY_SIZE(mx51_babbage_spi_cs),
-};
-static const struct esdhc_platform_data mx51_babbage_sd1_data __initconst = {
-        .cd_type = ESDHC_CD_CONTROLLER,
-        .wp_type = ESDHC_WP_CONTROLLER,
-};
-static const struct esdhc_platform_data mx51_babbage_sd2_data __initconst = {
-        .cd_gpio = BABBAGE_SD2_CD,
-        .wp_gpio = BABBAGE_SD2_WP,
-        .cd_type = ESDHC_CD_GPIO,
-        .wp_type = ESDHC_WP_GPIO,
-};
-void __init imx51_babbage_common_init(void)
-{
-        mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads,
-                                         ARRAY_SIZE(mx51babbage_pads));
-}
-/*
- * Board specific initialization.
- */
-static void __init mx51_babbage_init(void)
-{
-        iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP;
-        iomux_v3_cfg_t power_key = NEW_PAD_CTRL(MX51_PAD_EIM_A27__GPIO2_21,
-                PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH);
-        imx51_soc_init();
-        imx51_babbage_common_init();
-        imx51_add_imx_uart(0, &uart_pdata);
-        imx51_add_imx_uart(1, NULL);
-        imx51_add_imx_uart(2, &uart_pdata);
-        babbage_fec_reset();
-        imx51_add_fec(NULL);
-        /* Set the PAD settings for the pwr key. */
-        mxc_iomux_v3_setup_pad(power_key);
-        imx_add_gpio_keys(&imx_button_data);
-        imx51_add_imx_i2c(0, &babbage_i2c_data);
-        imx51_add_imx_i2c(1, &babbage_i2c_data);
-        imx51_add_hsi2c(&babbage_hsi2c_data);
-        if (otg_mode_host)
-                imx51_add_mxc_ehci_otg(&dr_utmi_config);
-        else {
-                initialize_otg_port(NULL);
-                imx51_add_fsl_usb2_udc(&usb_pdata);
-        }
-        gpio_usbh1_active();
-        imx51_add_mxc_ehci_hs(1, &usbh1_config);
-        /* setback USBH1_STP to be function */
-        mxc_iomux_v3_setup_pad(usbh1stp);
-        babbage_usbhub_reset();
-        imx51_add_sdhci_esdhc_imx(0, &mx51_babbage_sd1_data);
-        imx51_add_sdhci_esdhc_imx(1, &mx51_babbage_sd2_data);
-        spi_register_board_info(mx51_babbage_spi_board_info,
-                ARRAY_SIZE(mx51_babbage_spi_board_info));
-        imx51_add_ecspi(0, &mx51_babbage_spi_pdata);
-        imx51_add_imx2_wdt(0);
-}
-static void __init mx51_babbage_timer_init(void)
-{
-        mx51_clocks_init(32768, 24000000, 22579200, 0);
-}
-MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board")
-        /* Maintainer: Amit Kucheria <amit.kucheria@canonical.com> */
-        .atag_offset = 0x100,
-        .map_io = mx51_map_io,
-        .init_early = imx51_init_early,
-        .init_irq = mx51_init_irq,
-        .handle_irq = imx51_handle_irq,
-        .init_time      = mx51_babbage_timer_init,
-        .init_machine = mx51_babbage_init,
-        .init_late      = imx51_init_late,
-        .restart        = mxc_restart,
-MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c
index c91894003da9..0b5d1ca31b9f 100644
--- a/arch/arm/mach-imx/mach-mxt_td60.c
+++ b/arch/arm/mach-imx/mach-mxt_td60.c
@@ -267,7 +267,6 @@ MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
        .map_io = mx27_map_io,
        .init_early = imx27_init_early,
        .init_irq = mx27_init_irq,
-        .handle_irq = imx27_handle_irq,
        .init_time      = mxt_td60_timer_init,
        .init_machine = mxt_td60_board_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c
index bf3ac51d5aca..12212378c672 100644
--- a/arch/arm/mach-imx/mach-pca100.c
+++ b/arch/arm/mach-imx/mach-pca100.c
@@ -245,8 +245,7 @@ static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
        int ret;
        ret = request_irq(gpio_to_irq(IMX_GPIO_NR(3, 29)), detect_irq,
-                          IRQF_DISABLED | IRQF_TRIGGER_FALLING,
+                          IRQF_TRIGGER_FALLING, "imx-mmc-detect", data);
-                          "imx-mmc-detect", data);
        if (ret)
                printk(KERN_ERR
                        "pca100: Failed to request irq for sd/mmc detection\n");
@@ -421,7 +420,6 @@ MACHINE_START(PCA100, "phyCARD-i.MX27")
        .map_io = mx27_map_io,
        .init_early = imx27_init_early,
        .init_irq = mx27_init_irq,
-        .handle_irq = imx27_handle_irq,
        .init_machine = pca100_init,
        .init_time      = pca100_timer_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c
index 639a3dfb0092..81b8affb9448 100644
--- a/arch/arm/mach-imx/mach-pcm037.c
+++ b/arch/arm/mach-imx/mach-pcm037.c
@@ -703,7 +703,6 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037")
        .map_io = mx31_map_io,
        .init_early = imx31_init_early,
        .init_irq = mx31_init_irq,
-        .handle_irq = imx31_handle_irq,
        .init_time      = pcm037_timer_init,
        .init_machine = pcm037_init,
        .init_late = pcm037_init_late,
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
index 592ddbe031ac..6c56fb5553c7 100644
--- a/arch/arm/mach-imx/mach-pcm038.c
+++ b/arch/arm/mach-imx/mach-pcm038.c
@@ -351,7 +351,6 @@ MACHINE_START(PCM038, "phyCORE-i.MX27")
        .map_io = mx27_map_io,
        .init_early = imx27_init_early,
        .init_irq = mx27_init_irq,
-        .handle_irq = imx27_handle_irq,
        .init_time      = pcm038_timer_init,
        .init_machine = pcm038_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c
index ac504b67326b..c62b5d261345 100644
--- a/arch/arm/mach-imx/mach-pcm043.c
+++ b/arch/arm/mach-imx/mach-pcm043.c
@@ -400,7 +400,6 @@ MACHINE_START(PCM043, "Phytec Phycore pcm043")
        .map_io = mx35_map_io,
        .init_early = imx35_init_early,
        .init_irq = mx35_init_irq,
-        .handle_irq = imx35_handle_irq,
        .init_time = pcm043_timer_init,
        .init_machine = pcm043_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c
index 22af27ed457e..a213e7b9cb1c 100644
--- a/arch/arm/mach-imx/mach-qong.c
+++ b/arch/arm/mach-imx/mach-qong.c
@@ -266,7 +266,6 @@ MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
        .map_io = mx31_map_io,
        .init_early = imx31_init_early,
        .init_irq = mx31_init_irq,
-        .handle_irq = imx31_handle_irq,
        .init_time      = qong_timer_init,
        .init_machine = qong_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c
index b0fa10dd79fe..1f6bc3f7ae14 100644
--- a/arch/arm/mach-imx/mach-scb9328.c
+++ b/arch/arm/mach-imx/mach-scb9328.c
@@ -137,7 +137,6 @@ MACHINE_START(SCB9328, "Synertronixx scb9328")
        .map_io = mx1_map_io,
        .init_early = imx1_init_early,
        .init_irq = mx1_init_irq,
-        .handle_irq = imx1_handle_irq,
        .init_time      = scb9328_timer_init,
        .init_machine = scb9328_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c
index 8825d1217d18..872b3c6ba408 100644
--- a/arch/arm/mach-imx/mach-vpr200.c
+++ b/arch/arm/mach-imx/mach-vpr200.c
@@ -310,7 +310,6 @@ MACHINE_START(VPR200, "VPR200")
        .map_io = mx35_map_io,
        .init_early = imx35_init_early,
        .init_irq = mx35_init_irq,
-        .handle_irq = imx35_handle_irq,
        .init_time = vpr200_timer_init,
        .init_machine = vpr200_board_init,
        .restart        = mxc_restart,
diff --git a/arch/arm/mach-imx/mxc.h b/arch/arm/mach-imx/mxc.h
index b08ab3ad4a6d..75d6a37e1ae4 100644
--- a/arch/arm/mach-imx/mxc.h
+++ b/arch/arm/mach-imx/mxc.h
@@ -36,6 +36,7 @@
 #define MXC_CPU_MX53            53
 #define MXC_CPU_IMX6SL          0x60
 #define MXC_CPU_IMX6DL          0x61
+#define MXC_CPU_IMX6SX          0x62
 #define MXC_CPU_IMX6Q           0x63
 #define IMX_CHIP_REVISION_1_0           0x10
@@ -163,6 +164,11 @@ static inline bool cpu_is_imx6dl(void)
        return __mxc_cpu_type == MXC_CPU_IMX6DL;
 }
+static inline bool cpu_is_imx6sx(void)
+{
+        return __mxc_cpu_type == MXC_CPU_IMX6SX;
+}
 static inline bool cpu_is_imx6q(void)
 {
        return __mxc_cpu_type == MXC_CPU_IMX6Q;
diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c
index 65222ea0df6d..bed081e58262 100644
--- a/arch/arm/mach-imx/time.c
+++ b/arch/arm/mach-imx/time.c
@@ -28,6 +28,9 @@
 #include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/sched_clock.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
 #include <asm/mach/time.h>
@@ -328,3 +331,15 @@ void __init mxc_timer_init(void __iomem *base, int irq)
        /* Make irqs happen */
        setup_irq(irq, &mxc_timer_irq);
 }
+void __init mxc_timer_init_dt(struct device_node *np)
+{
+        void __iomem *base;
+        int irq;
+        base = of_iomap(np, 0);
+        WARN_ON(!base);
+        irq = irq_of_parse_and_map(np, 0);
+        mxc_timer_init(base, irq);
+}
diff --git a/arch/arm/mach-imx/tzic.c b/arch/arm/mach-imx/tzic.c
index 8183178d5aa3..7828af4b2022 100644
--- a/arch/arm/mach-imx/tzic.c
+++ b/arch/arm/mach-imx/tzic.c
@@ -125,7 +125,7 @@ static __init void tzic_init_gc(int idx, unsigned int irq_start)
        irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0);
 }
-asmlinkage void __exception_irq_entry tzic_handle_irq(struct pt_regs *regs)
+static void __exception_irq_entry tzic_handle_irq(struct pt_regs *regs)
 {
        u32 stat;
        int i, irqofs, handled;
@@ -189,6 +189,8 @@ void __init tzic_init_irq(void __iomem *irqbase)
        for (i = 0; i < 4; i++, irq_base += 32)
                tzic_init_gc(i, irq_base);
+        set_handle_irq(tzic_handle_irq);
 #ifdef CONFIG_FIQ
        /* Initialize FIQ */
        init_FIQ(FIQ_START);
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index 2801da49e2a3..ff18ff20f71f 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -195,7 +195,7 @@ static void __init kirkwood_dt_init(void)
 {
        kirkwood_disable_mbus_error_propagation();
-        BUG_ON(mvebu_mbus_dt_init());
+        BUG_ON(mvebu_mbus_dt_init(false));
 #ifdef CONFIG_CACHE_FEROCEON_L2
        feroceon_of_init();
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index 34932e0e31fa..7858d5b6f6ce 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -202,9 +202,6 @@ static struct mmci_platform_data lpc32xx_mmci_data = {
        .ocr_mask       = MMC_VDD_30_31 | MMC_VDD_31_32 |
                          MMC_VDD_32_33 | MMC_VDD_33_34,
        .ios_handler    = mmc_handle_ios,
-        .dma_filter     = NULL,
-        /* No DMA for now since AMBA PL080 dmaengine driver only does scatter
-         * gather, and the MMCI driver doesn't do it this way */
 };
 static struct lpc32xx_slc_platform_data lpc32xx_slc_data = {
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index a7f959e58c3d..9b26976fb084 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -42,9 +42,6 @@ config ARCH_QSD8X50
 endchoice
-config MSM_HAS_DEBUG_UART_HS
-        bool
 config MSM_SOC_REV_A
        bool
diff --git a/arch/arm/mach-msm/board-trout-gpio.c b/arch/arm/mach-msm/board-trout-gpio.c
index 87e1d01edecc..2c25050209ce 100644
--- a/arch/arm/mach-msm/board-trout-gpio.c
+++ b/arch/arm/mach-msm/board-trout-gpio.c
@@ -89,7 +89,7 @@ static int trout_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
                        .base             = base_gpio,                  \
                        .ngpio            = 8,                          \
                },                                                      \
-                .reg = (void *) reg_num + TROUT_CPLD_BASE,              \
+                .reg = reg_num + TROUT_CPLD_BASE,                       \
                .shadow = shadow_val,                                   \
        }
diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c
index 015d544aa017..5edfbd904d06 100644
--- a/arch/arm/mach-msm/board-trout.c
+++ b/arch/arm/mach-msm/board-trout.c
@@ -78,7 +78,7 @@ static void __init trout_init(void)
 static struct map_desc trout_io_desc[] __initdata = {
        {
-                .virtual = TROUT_CPLD_BASE,
+                .virtual = (unsigned long)TROUT_CPLD_BASE,
                .pfn     = __phys_to_pfn(TROUT_CPLD_START),
                .length  = TROUT_CPLD_SIZE,
                .type    = MT_DEVICE_NONSHARED
diff --git a/arch/arm/mach-msm/board-trout.h b/arch/arm/mach-msm/board-trout.h
index b2379ede43bc..adb757abbb92 100644
--- a/arch/arm/mach-msm/board-trout.h
+++ b/arch/arm/mach-msm/board-trout.h
@@ -58,7 +58,7 @@
 #define TROUT_4_TP_LS_EN    19
 #define TROUT_5_TP_LS_EN    1
-#define TROUT_CPLD_BASE   0xE8100000
+#define TROUT_CPLD_BASE   IOMEM(0xE8100000)
 #define TROUT_CPLD_START  0x98000000
 #define TROUT_CPLD_SIZE   SZ_4K
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 3f73eecbcfb0..6090b9eb00c8 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -3,15 +3,13 @@ config ARCH_MVEBU
        select ARCH_SUPPORTS_BIG_ENDIAN
        select CLKSRC_MMIO
        select GENERIC_IRQ_CHIP
-        select IRQ_DOMAIN
        select PINCTRL
        select PLAT_ORION
+        select SOC_BUS
        select MVEBU_MBUS
        select ZONE_DMA if ARM_LPAE
        select ARCH_REQUIRE_GPIOLIB
-        select MIGHT_HAVE_PCI
        select PCI_QUIRKS if PCI
-        select OF_ADDRESS_PCI
 if ARCH_MVEBU
@@ -38,7 +36,9 @@ config MACH_ARMADA_375
        select ARM_ERRATA_753970
        select ARM_GIC
        select ARMADA_375_CLK
-        select CPU_V7
+        select HAVE_ARM_SCU
+        select HAVE_ARM_TWD if SMP
+        select HAVE_SMP
        select MACH_MVEBU_V7
        select PINCTRL_ARMADA_375
        help
@@ -51,7 +51,9 @@ config MACH_ARMADA_38X
        select ARM_ERRATA_753970
        select ARM_GIC
        select ARMADA_38X_CLK
-        select CPU_V7
+        select HAVE_ARM_SCU
+        select HAVE_ARM_TWD if SMP
+        select HAVE_SMP
        select MACH_MVEBU_V7
        select PINCTRL_ARMADA_38X
        help
@@ -86,24 +88,15 @@ config MACH_KIRKWOOD
        select ARCH_REQUIRE_GPIOLIB
        select CPU_FEROCEON
        select KIRKWOOD_CLK
-        select OF_IRQ
        select ORION_IRQCHIP
        select ORION_TIMER
        select PCI
        select PCI_QUIRKS
        select PINCTRL_KIRKWOOD
-        select USE_OF
        help
          Say 'Y' here if you want your kernel to support boards based
          on the Marvell Kirkwood device tree.
-config MACH_T5325
-        bool "HP T5325 thin client"
-        depends on MACH_KIRKWOOD
-        help
-          Say 'Y' here if you want your kernel to support the
-          HP T5325 Thin client
 endmenu
 endif
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index a63e43b6b451..2ecb828e4a8b 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -2,12 +2,15 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \
        -I$(srctree)/arch/arm/plat-orion/include
 AFLAGS_coherency_ll.o           := -Wa,-march=armv7-a
+CFLAGS_pmsu.o                   := -march=armv7-a
 obj-y                            += system-controller.o mvebu-soc-id.o
-obj-$(CONFIG_MACH_MVEBU_V7)      += board-v7.o
+ifeq ($(CONFIG_MACH_MVEBU_V7),y)
+obj-y                            += cpu-reset.o board-v7.o coherency.o coherency_ll.o pmsu.o
+obj-$(CONFIG_SMP)                += platsmp.o headsmp.o platsmp-a9.o headsmp-a9.o
+obj-$(CONFIG_HOTPLUG_CPU)        += hotplug.o
+endif
 obj-$(CONFIG_MACH_DOVE)          += dove.o
-obj-$(CONFIG_ARCH_MVEBU)         += coherency.o coherency_ll.o pmsu.o
-obj-$(CONFIG_SMP)                += platsmp.o headsmp.o
-obj-$(CONFIG_HOTPLUG_CPU)        += hotplug.o
 obj-$(CONFIG_MACH_KIRKWOOD)      += kirkwood.o kirkwood-pm.o
-obj-$(CONFIG_MACH_T5325)         += board-t5325.o
diff --git a/arch/arm/mach-mvebu/armada-370-xp.h b/arch/arm/mach-mvebu/armada-370-xp.h
index 237c86b83390..c3465f5b1250 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.h
+++ b/arch/arm/mach-mvebu/armada-370-xp.h
@@ -20,8 +20,6 @@
 #define ARMADA_XP_MAX_CPUS 4
-void armada_mpic_send_doorbell(const struct cpumask *mask, unsigned int irq);
-void armada_xp_mpic_smp_cpu_init(void);
 void armada_xp_secondary_startup(void);
 extern struct smp_operations armada_xp_smp_ops;
 #endif
diff --git a/arch/arm/mach-mvebu/board-t5325.c b/arch/arm/mach-mvebu/board-t5325.c
deleted file mode 100644
index 65ace6db9f28..000000000000
--- a/arch/arm/mach-mvebu/board-t5325.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * HP T5325 Board Setup
- *
- * Copyright (C) 2014
- *
- * Andrew Lunn <andrew@lunn.ch>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#include <linux/kernel.h>
-#include <linux/i2c.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <sound/alc5623.h>
-#include "board.h"
-static struct platform_device hp_t5325_audio_device = {
-        .name           = "t5325-audio",
-        .id             = -1,
-};
-static struct alc5623_platform_data alc5621_data = {
-        .add_ctrl = 0x3700,
-        .jack_det_ctrl = 0x4810,
-};
-static struct i2c_board_info i2c_board_info[] __initdata = {
-        {
-                I2C_BOARD_INFO("alc5621", 0x1a),
-                .platform_data = &alc5621_data,
-        },
-};
-void __init t5325_init(void)
-{
-        i2c_register_board_info(0, i2c_board_info, ARRAY_SIZE(i2c_board_info));
-        platform_device_register(&hp_t5325_audio_device);
-}
diff --git a/arch/arm/mach-mvebu/board-v7.c b/arch/arm/mach-mvebu/board-v7.c
index 333fca8fdc41..01cfce6ac20b 100644
--- a/arch/arm/mach-mvebu/board-v7.c
+++ b/arch/arm/mach-mvebu/board-v7.c
@@ -27,12 +27,30 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
+#include <asm/smp_scu.h>
 #include "armada-370-xp.h"
 #include "common.h"
 #include "coherency.h"
 #include "mvebu-soc-id.h"
 /*
+ * Enables the SCU when available. Obviously, this is only useful on
+ * Cortex-A based SOCs, not on PJ4B based ones.
+ */
+static void __init mvebu_scu_enable(void)
+{
+        void __iomem *scu_base;
+        struct device_node *np =
+                of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
+        if (np) {
+                scu_base = of_iomap(np, 0);
+                scu_enable(scu_base);
+                of_node_put(np);
+        }
+}
+/*
 * Early versions of Armada 375 SoC have a bug where the BootROM
 * leaves an external data abort pending. The kernel is hit by this
 * data abort as soon as it enters userspace, because it unmasks the
@@ -57,11 +75,10 @@ static void __init mvebu_timer_and_clk_init(void)
 {
        of_clk_init(NULL);
        clocksource_of_init();
+        mvebu_scu_enable();
        coherency_init();
-        BUG_ON(mvebu_mbus_dt_init());
+        BUG_ON(mvebu_mbus_dt_init(coherency_available()));
-#ifdef CONFIG_CACHE_L2X0
        l2x0_of_init(0, ~0UL);
-#endif
        if (of_machine_is_compatible("marvell,armada375"))
                hook_fault_code(16 + 6, armada_375_external_abort_wa, SIGBUS, 0,
@@ -78,7 +95,7 @@ static void __init i2c_quirk(void)
         * mechanism. We can exit only if we are sure that we can
         * get the SoC revision and it is more recent than A0.
         */
-        if (mvebu_get_soc_id(&rev, &dev) == 0 && dev > MV78XX0_A0_REV)
+        if (mvebu_get_soc_id(&dev, &rev) == 0 && rev > MV78XX0_A0_REV)
                return;
        for_each_compatible_node(np, NULL, "marvell,mv78230-i2c") {
@@ -96,10 +113,66 @@ static void __init i2c_quirk(void)
        return;
 }
+#define A375_Z1_THERMAL_FIXUP_OFFSET 0xc
+static void __init thermal_quirk(void)
+{
+        struct device_node *np;
+        u32 dev, rev;
+        if (mvebu_get_soc_id(&dev, &rev) == 0 && rev > ARMADA_375_Z1_REV)
+                return;
+        for_each_compatible_node(np, NULL, "marvell,armada375-thermal") {
+                struct property *prop;
+                __be32 newval, *newprop, *oldprop;
+                int len;
+                /*
+                 * The register offset is at a wrong location. This quirk
+                 * creates a new reg property as a clone of the previous
+                 * one and corrects the offset.
+                 */
+                oldprop = (__be32 *)of_get_property(np, "reg", &len);
+                if (!oldprop)
+                        continue;
+                /* Create a duplicate of the 'reg' property */
+                prop = kzalloc(sizeof(*prop), GFP_KERNEL);
+                prop->length = len;
+                prop->name = kstrdup("reg", GFP_KERNEL);
+                prop->value = kzalloc(len, GFP_KERNEL);
+                memcpy(prop->value, oldprop, len);
+                /* Fixup the register offset of the second entry */
+                oldprop += 2;
+                newprop = (__be32 *)prop->value + 2;
+                newval = cpu_to_be32(be32_to_cpu(*oldprop) -
+                                     A375_Z1_THERMAL_FIXUP_OFFSET);
+                *newprop = newval;
+                of_update_property(np, prop);
+                /*
+                 * The thermal controller needs some quirk too, so let's change
+                 * the compatible string to reflect this.
+                 */
+                prop = kzalloc(sizeof(*prop), GFP_KERNEL);
+                prop->name = kstrdup("compatible", GFP_KERNEL);
+                prop->length = sizeof("marvell,armada375-z1-thermal");
+                prop->value = kstrdup("marvell,armada375-z1-thermal",
+                                                GFP_KERNEL);
+                of_update_property(np, prop);
+        }
+        return;
+}
 static void __init mvebu_dt_init(void)
 {
        if (of_machine_is_compatible("plathome,openblocks-ax3-4"))
                i2c_quirk();
+        if (of_machine_is_compatible("marvell,a375-db"))
+                thermal_quirk();
        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 }
@@ -123,6 +196,7 @@ static const char * const armada_375_dt_compat[] = {
 DT_MACHINE_START(ARMADA_375_DT, "Marvell Armada 375 (Device Tree)")
        .init_time      = mvebu_timer_and_clk_init,
+        .init_machine   = mvebu_dt_init,
        .restart        = mvebu_restart,
        .dt_compat      = armada_375_dt_compat,
 MACHINE_END
diff --git a/arch/arm/mach-mvebu/board.h b/arch/arm/mach-mvebu/board.h
index de7f0a191394..9c7bb4386f8b 100644
--- a/arch/arm/mach-mvebu/board.h
+++ b/arch/arm/mach-mvebu/board.h
@@ -13,10 +13,4 @@
 #ifndef __ARCH_MVEBU_BOARD_H
 #define __ARCH_MVEBU_BOARD_H
-#ifdef CONFIG_MACH_T5325
-void t5325_init(void);
-#else
-static inline void t5325_init(void) {};
-#endif
 #endif
diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c
index 4e9d58148ca7..477202fd39cc 100644
--- a/arch/arm/mach-mvebu/coherency.c
+++ b/arch/arm/mach-mvebu/coherency.c
@@ -17,6 +17,8 @@
 * supplies basic routines for configuring and controlling hardware coherency
 */
+#define pr_fmt(fmt) "mvebu-coherency: " fmt
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/of_address.h>
@@ -24,13 +26,19 @@
 #include <linux/smp.h>
 #include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/mbus.h>
+#include <linux/clk.h>
+#include <linux/pci.h>
 #include <asm/smp_plat.h>
 #include <asm/cacheflush.h>
+#include <asm/mach/map.h>
 #include "armada-370-xp.h"
 #include "coherency.h"
+#include "mvebu-soc-id.h"
 unsigned long coherency_phys_base;
-static void __iomem *coherency_base;
+void __iomem *coherency_base;
 static void __iomem *coherency_cpu_base;
 /* Coherency fabric registers */
@@ -38,27 +46,190 @@ static void __iomem *coherency_cpu_base;
 #define IO_SYNC_BARRIER_CTL_OFFSET                 0x0
+enum {
+        COHERENCY_FABRIC_TYPE_NONE,
+        COHERENCY_FABRIC_TYPE_ARMADA_370_XP,
+        COHERENCY_FABRIC_TYPE_ARMADA_375,
+        COHERENCY_FABRIC_TYPE_ARMADA_380,
+};
 static struct of_device_id of_coherency_table[] = {
-        {.compatible = "marvell,coherency-fabric"},
+        {.compatible = "marvell,coherency-fabric",
+         .data = (void *) COHERENCY_FABRIC_TYPE_ARMADA_370_XP },
+        {.compatible = "marvell,armada-375-coherency-fabric",
+         .data = (void *) COHERENCY_FABRIC_TYPE_ARMADA_375 },
+        {.compatible = "marvell,armada-380-coherency-fabric",
+         .data = (void *) COHERENCY_FABRIC_TYPE_ARMADA_380 },
        { /* end of list */ },
 };
-/* Function defined in coherency_ll.S */
+/* Functions defined in coherency_ll.S */
-int ll_set_cpu_coherent(void __iomem *base_addr, unsigned int hw_cpu_id);
+int ll_enable_coherency(void);
+void ll_add_cpu_to_smp_group(void);
-int set_cpu_coherent(unsigned int hw_cpu_id, int smp_group_id)
+int set_cpu_coherent(void)
 {
        if (!coherency_base) {
-                pr_warn("Can't make CPU %d cache coherent.\n", hw_cpu_id);
+                pr_warn("Can't make current CPU cache coherent.\n");
                pr_warn("Coherency fabric is not initialized\n");
                return 1;
        }
-        return ll_set_cpu_coherent(coherency_base, hw_cpu_id);
+        ll_add_cpu_to_smp_group();
+        return ll_enable_coherency();
+}
+/*
+ * The below code implements the I/O coherency workaround on Armada
+ * 375. This workaround consists in using the two channels of the
+ * first XOR engine to trigger a XOR transaction that serves as the
+ * I/O coherency barrier.
+ */
+static void __iomem *xor_base, *xor_high_base;
+static dma_addr_t coherency_wa_buf_phys[CONFIG_NR_CPUS];
+static void *coherency_wa_buf[CONFIG_NR_CPUS];
+static bool coherency_wa_enabled;
+#define XOR_CONFIG(chan)            (0x10 + (chan * 4))
+#define XOR_ACTIVATION(chan)        (0x20 + (chan * 4))
+#define WINDOW_BAR_ENABLE(chan)     (0x240 + ((chan) << 2))
+#define WINDOW_BASE(w)              (0x250 + ((w) << 2))
+#define WINDOW_SIZE(w)              (0x270 + ((w) << 2))
+#define WINDOW_REMAP_HIGH(w)        (0x290 + ((w) << 2))
+#define WINDOW_OVERRIDE_CTRL(chan)  (0x2A0 + ((chan) << 2))
+#define XOR_DEST_POINTER(chan)      (0x2B0 + (chan * 4))
+#define XOR_BLOCK_SIZE(chan)        (0x2C0 + (chan * 4))
+#define XOR_INIT_VALUE_LOW           0x2E0
+#define XOR_INIT_VALUE_HIGH          0x2E4
+static inline void mvebu_hwcc_armada375_sync_io_barrier_wa(void)
+{
+        int idx = smp_processor_id();
+        /* Write '1' to the first word of the buffer */
+        writel(0x1, coherency_wa_buf[idx]);
+        /* Wait until the engine is idle */
+        while ((readl(xor_base + XOR_ACTIVATION(idx)) >> 4) & 0x3)
+                ;
+        dmb();
+        /* Trigger channel */
+        writel(0x1, xor_base + XOR_ACTIVATION(idx));
+        /* Poll the data until it is cleared by the XOR transaction */
+        while (readl(coherency_wa_buf[idx]))
+                ;
+}
+static void __init armada_375_coherency_init_wa(void)
+{
+        const struct mbus_dram_target_info *dram;
+        struct device_node *xor_node;
+        struct property *xor_status;
+        struct clk *xor_clk;
+        u32 win_enable = 0;
+        int i;
+        pr_warn("enabling coherency workaround for Armada 375 Z1, one XOR engine disabled\n");
+        /*
+         * Since the workaround uses one XOR engine, we grab a
+         * reference to its Device Tree node first.
+         */
+        xor_node = of_find_compatible_node(NULL, NULL, "marvell,orion-xor");
+        BUG_ON(!xor_node);
+        /*
+         * Then we mark it as disabled so that the real XOR driver
+         * will not use it.
+         */
+        xor_status = kzalloc(sizeof(struct property), GFP_KERNEL);
+        BUG_ON(!xor_status);
+        xor_status->value = kstrdup("disabled", GFP_KERNEL);
+        BUG_ON(!xor_status->value);
+        xor_status->length = 8;
+        xor_status->name = kstrdup("status", GFP_KERNEL);
+        BUG_ON(!xor_status->name);
+        of_update_property(xor_node, xor_status);
+        /*
+         * And we remap the registers, get the clock, and do the
+         * initial configuration of the XOR engine.
+         */
+        xor_base = of_iomap(xor_node, 0);
+        xor_high_base = of_iomap(xor_node, 1);
+        xor_clk = of_clk_get_by_name(xor_node, NULL);
+        BUG_ON(!xor_clk);
+        clk_prepare_enable(xor_clk);
+        dram = mv_mbus_dram_info();
+        for (i = 0; i < 8; i++) {
+                writel(0, xor_base + WINDOW_BASE(i));
+                writel(0, xor_base + WINDOW_SIZE(i));
+                if (i < 4)
+                        writel(0, xor_base + WINDOW_REMAP_HIGH(i));
+        }
+        for (i = 0; i < dram->num_cs; i++) {
+                const struct mbus_dram_window *cs = dram->cs + i;
+                writel((cs->base & 0xffff0000) |
+                       (cs->mbus_attr << 8) |
+                       dram->mbus_dram_target_id, xor_base + WINDOW_BASE(i));
+                writel((cs->size - 1) & 0xffff0000, xor_base + WINDOW_SIZE(i));
+                win_enable |= (1 << i);
+                win_enable |= 3 << (16 + (2 * i));
+        }
+        writel(win_enable, xor_base + WINDOW_BAR_ENABLE(0));
+        writel(win_enable, xor_base + WINDOW_BAR_ENABLE(1));
+        writel(0, xor_base + WINDOW_OVERRIDE_CTRL(0));
+        writel(0, xor_base + WINDOW_OVERRIDE_CTRL(1));
+        for (i = 0; i < CONFIG_NR_CPUS; i++) {
+                coherency_wa_buf[i] = kzalloc(PAGE_SIZE, GFP_KERNEL);
+                BUG_ON(!coherency_wa_buf[i]);
+                /*
+                 * We can't use the DMA mapping API, since we don't
+                 * have a valid 'struct device' pointer
+                 */
+                coherency_wa_buf_phys[i] =
+                        virt_to_phys(coherency_wa_buf[i]);
+                BUG_ON(!coherency_wa_buf_phys[i]);
+                /*
+                 * Configure the XOR engine for memset operation, with
+                 * a 128 bytes block size
+                 */
+                writel(0x444, xor_base + XOR_CONFIG(i));
+                writel(128, xor_base + XOR_BLOCK_SIZE(i));
+                writel(coherency_wa_buf_phys[i],
+                       xor_base + XOR_DEST_POINTER(i));
+        }
+        writel(0x0, xor_base + XOR_INIT_VALUE_LOW);
+        writel(0x0, xor_base + XOR_INIT_VALUE_HIGH);
+        coherency_wa_enabled = true;
 }
 static inline void mvebu_hwcc_sync_io_barrier(void)
 {
+        if (coherency_wa_enabled) {
+                mvebu_hwcc_armada375_sync_io_barrier_wa();
+                return;
+        }
        writel(0x1, coherency_cpu_base + IO_SYNC_BARRIER_CTL_OFFSET);
        while (readl(coherency_cpu_base + IO_SYNC_BARRIER_CTL_OFFSET) & 0x1);
 }
@@ -105,8 +276,8 @@ static struct dma_map_ops mvebu_hwcc_dma_ops = {
        .set_dma_mask           = arm_dma_set_mask,
 };
-static int mvebu_hwcc_platform_notifier(struct notifier_block *nb,
+static int mvebu_hwcc_notifier(struct notifier_block *nb,
-                                       unsigned long event, void *__dev)
+                               unsigned long event, void *__dev)
 {
        struct device *dev = __dev;
@@ -117,47 +288,148 @@ static int mvebu_hwcc_platform_notifier(struct notifier_block *nb,
        return NOTIFY_OK;
 }
-static struct notifier_block mvebu_hwcc_platform_nb = {
+static struct notifier_block mvebu_hwcc_nb = {
-        .notifier_call = mvebu_hwcc_platform_notifier,
+        .notifier_call = mvebu_hwcc_notifier,
 };
-int __init coherency_init(void)
+static void __init armada_370_coherency_init(struct device_node *np)
+{
+        struct resource res;
+        of_address_to_resource(np, 0, &res);
+        coherency_phys_base = res.start;
+        /*
+         * Ensure secondary CPUs will see the updated value,
+         * which they read before they join the coherency
+         * fabric, and therefore before they are coherent with
+         * the boot CPU cache.
+         */
+        sync_cache_w(&coherency_phys_base);
+        coherency_base = of_iomap(np, 0);
+        coherency_cpu_base = of_iomap(np, 1);
+        set_cpu_coherent();
+}
+/*
+ * This ioremap hook is used on Armada 375/38x to ensure that PCIe
+ * memory areas are mapped as MT_UNCACHED instead of MT_DEVICE. This
+ * is needed as a workaround for a deadlock issue between the PCIe
+ * interface and the cache controller.
+ */
+static void __iomem *
+armada_pcie_wa_ioremap_caller(phys_addr_t phys_addr, size_t size,
+                              unsigned int mtype, void *caller)
+{
+        struct resource pcie_mem;
+        mvebu_mbus_get_pcie_mem_aperture(&pcie_mem);
+        if (pcie_mem.start <= phys_addr && (phys_addr + size) <= pcie_mem.end)
+                mtype = MT_UNCACHED;
+        return __arm_ioremap_caller(phys_addr, size, mtype, caller);
+}
+static void __init armada_375_380_coherency_init(struct device_node *np)
+{
+        struct device_node *cache_dn;
+        coherency_cpu_base = of_iomap(np, 0);
+        arch_ioremap_caller = armada_pcie_wa_ioremap_caller;
+        /*
+         * Add the PL310 property "arm,io-coherent". This makes sure the
+         * outer sync operation is not used, which allows to
+         * workaround the system erratum that causes deadlocks when
+         * doing PCIe in an SMP situation on Armada 375 and Armada
+         * 38x.
+         */
+        for_each_compatible_node(cache_dn, NULL, "arm,pl310-cache") {
+                struct property *p;
+                p = kzalloc(sizeof(*p), GFP_KERNEL);
+                p->name = kstrdup("arm,io-coherent", GFP_KERNEL);
+                of_add_property(cache_dn, p);
+        }
+}
+static int coherency_type(void)
 {
        struct device_node *np;
+        const struct of_device_id *match;
-        np = of_find_matching_node(NULL, of_coherency_table);
+        np = of_find_matching_node_and_match(NULL, of_coherency_table, &match);
        if (np) {
-                struct resource res;
+                int type = (int) match->data;
-                pr_info("Initializing Coherency fabric\n");
-                of_address_to_resource(np, 0, &res);
+                /* Armada 370/XP coherency works in both UP and SMP */
-                coherency_phys_base = res.start;
+                if (type == COHERENCY_FABRIC_TYPE_ARMADA_370_XP)
-                /*
+                        return type;
-                 * Ensure secondary CPUs will see the updated value,
-                 * which they read before they join the coherency
+                /* Armada 375 coherency works only on SMP */
-                 * fabric, and therefore before they are coherent with
+                else if (type == COHERENCY_FABRIC_TYPE_ARMADA_375 && is_smp())
-                 * the boot CPU cache.
+                        return type;
-                 */
-                sync_cache_w(&coherency_phys_base);
+                /* Armada 380 coherency works only on SMP */
-                coherency_base = of_iomap(np, 0);
+                else if (type == COHERENCY_FABRIC_TYPE_ARMADA_380 && is_smp())
-                coherency_cpu_base = of_iomap(np, 1);
+                        return type;
-                set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0);
-                of_node_put(np);
        }
-        return 0;
+        return COHERENCY_FABRIC_TYPE_NONE;
 }
-static int __init coherency_late_init(void)
+int coherency_available(void)
+{
+        return coherency_type() != COHERENCY_FABRIC_TYPE_NONE;
+}
+int __init coherency_init(void)
 {
+        int type = coherency_type();
        struct device_node *np;
        np = of_find_matching_node(NULL, of_coherency_table);
-        if (np) {
-                bus_register_notifier(&platform_bus_type,
+        if (type == COHERENCY_FABRIC_TYPE_ARMADA_370_XP)
-                                      &mvebu_hwcc_platform_nb);
+                armada_370_coherency_init(np);
-                of_node_put(np);
+        else if (type == COHERENCY_FABRIC_TYPE_ARMADA_375 ||
+                 type == COHERENCY_FABRIC_TYPE_ARMADA_380)
+                armada_375_380_coherency_init(np);
+        return 0;
+}
+static int __init coherency_late_init(void)
+{
+        int type = coherency_type();
+        if (type == COHERENCY_FABRIC_TYPE_NONE)
+                return 0;
+        if (type == COHERENCY_FABRIC_TYPE_ARMADA_375) {
+                u32 dev, rev;
+                if (mvebu_get_soc_id(&dev, &rev) == 0 &&
+                    rev == ARMADA_375_Z1_REV)
+                        armada_375_coherency_init_wa();
        }
+        bus_register_notifier(&platform_bus_type,
+                              &mvebu_hwcc_nb);
        return 0;
 }
 postcore_initcall(coherency_late_init);
+#if IS_ENABLED(CONFIG_PCI)
+static int __init coherency_pci_init(void)
+{
+        if (coherency_available())
+                bus_register_notifier(&pci_bus_type,
+                                       &mvebu_hwcc_nb);
+        return 0;
+}
+arch_initcall(coherency_pci_init);
+#endif
diff --git a/arch/arm/mach-mvebu/coherency.h b/arch/arm/mach-mvebu/coherency.h
index 760226c41353..54cb7607b526 100644
--- a/arch/arm/mach-mvebu/coherency.h
+++ b/arch/arm/mach-mvebu/coherency.h
@@ -15,8 +15,9 @@
 #define __MACH_370_XP_COHERENCY_H
 extern unsigned long coherency_phys_base;
+int set_cpu_coherent(void);
-int set_cpu_coherent(unsigned int cpu_id, int smp_group_id);
 int coherency_init(void);
+int coherency_available(void);
 #endif  /* __MACH_370_XP_COHERENCY_H */
diff --git a/arch/arm/mach-mvebu/coherency_ll.S b/arch/arm/mach-mvebu/coherency_ll.S
index ee7598fe75db..510c29e079ca 100644
--- a/arch/arm/mach-mvebu/coherency_ll.S
+++ b/arch/arm/mach-mvebu/coherency_ll.S
@@ -21,38 +21,129 @@
 #define ARMADA_XP_CFB_CFG_REG_OFFSET 0x4
 #include <asm/assembler.h>
+#include <asm/cp15.h>
        .text
+/* Returns the coherency base address in r1 (r0 is untouched) */
+ENTRY(ll_get_coherency_base)
+        mrc     p15, 0, r1, c1, c0, 0
+        tst     r1, #CR_M @ Check MMU bit enabled
+        bne     1f
+        /*
+         * MMU is disabled, use the physical address of the coherency
+         * base address.
+         */
+        adr     r1, 3f
+        ldr     r3, [r1]
+        ldr     r1, [r1, r3]
+        b       2f
+1:
+        /*
+         * MMU is enabled, use the virtual address of the coherency
+         * base address.
+         */
+        ldr     r1, =coherency_base
+        ldr     r1, [r1]
+2:
+        mov     pc, lr
+ENDPROC(ll_get_coherency_base)
 /*
- * r0: Coherency fabric base register address
+ * Returns the coherency CPU mask in r3 (r0 is untouched). This
- * r1: HW CPU id
+ * coherency CPU mask can be used with the coherency fabric
+ * configuration and control registers. Note that the mask is already
+ * endian-swapped as appropriate so that the calling functions do not
+ * have to care about endianness issues while accessing the coherency
+ * fabric registers
 */
-ENTRY(ll_set_cpu_coherent)
+ENTRY(ll_get_coherency_cpumask)
-        /* Create bit by cpu index */
+        mrc     15, 0, r3, cr0, cr0, 5
-        mov     r3, #(1 << 24)
+        and     r3, r3, #15
-        lsl     r1, r3, r1
+        mov     r2, #(1 << 24)
-ARM_BE8(rev     r1, r1)
+        lsl     r3, r2, r3
+ARM_BE8(rev     r3, r3)
-        /* Add CPU to SMP group - Atomic */
+        mov     pc, lr
-        add     r3, r0, #ARMADA_XP_CFB_CTL_REG_OFFSET
+ENDPROC(ll_get_coherency_cpumask)
-1:
-        ldrex   r2, [r3]
+/*
-        orr     r2, r2, r1
+ * ll_add_cpu_to_smp_group(), ll_enable_coherency() and
-        strex   r0, r2, [r3]
+ * ll_disable_coherency() use the strex/ldrex instructions while the
-        cmp     r0, #0
+ * MMU can be disabled. The Armada XP SoC has an exclusive monitor
-        bne 1b
+ * that tracks transactions to Device and/or SO memory and thanks to
+ * that, exclusive transactions are functional even when the MMU is
-        /* Enable coherency on CPU - Atomic */
+ * disabled.
-        add     r3, r3, #ARMADA_XP_CFB_CFG_REG_OFFSET
+ */
+ENTRY(ll_add_cpu_to_smp_group)
+        /*
+         * As r0 is not modified by ll_get_coherency_base() and
+         * ll_get_coherency_cpumask(), we use it to temporarly save lr
+         * and avoid it being modified by the branch and link
+         * calls. This function is used very early in the secondary
+         * CPU boot, and no stack is available at this point.
+         */
+        mov     r0, lr
+        bl      ll_get_coherency_base
+        bl      ll_get_coherency_cpumask
+        mov     lr, r0
+        add     r0, r1, #ARMADA_XP_CFB_CFG_REG_OFFSET
 1:
-        ldrex   r2, [r3]
+        ldrex   r2, [r0]
-        orr     r2, r2, r1
+        orr     r2, r2, r3
-        strex   r0, r2, [r3]
+        strex   r1, r2, [r0]
-        cmp     r0, #0
+        cmp     r1, #0
-        bne 1b
+        bne     1b
+        mov     pc, lr
+ENDPROC(ll_add_cpu_to_smp_group)
+ENTRY(ll_enable_coherency)
+        /*
+         * As r0 is not modified by ll_get_coherency_base() and
+         * ll_get_coherency_cpumask(), we use it to temporarly save lr
+         * and avoid it being modified by the branch and link
+         * calls. This function is used very early in the secondary
+         * CPU boot, and no stack is available at this point.
+         */
+        mov r0, lr
+        bl      ll_get_coherency_base
+        bl      ll_get_coherency_cpumask
+        mov lr, r0
+        add     r0, r1, #ARMADA_XP_CFB_CTL_REG_OFFSET
+1:
+        ldrex   r2, [r0]
+        orr     r2, r2, r3
+        strex   r1, r2, [r0]
+        cmp     r1, #0
+        bne     1b
        dsb
        mov     r0, #0
        mov     pc, lr
-ENDPROC(ll_set_cpu_coherent)
+ENDPROC(ll_enable_coherency)
+ENTRY(ll_disable_coherency)
+        /*
+         * As r0 is not modified by ll_get_coherency_base() and
+         * ll_get_coherency_cpumask(), we use it to temporarly save lr
+         * and avoid it being modified by the branch and link
+         * calls. This function is used very early in the secondary
+         * CPU boot, and no stack is available at this point.
+         */
+        mov     r0, lr
+        bl      ll_get_coherency_base
+        bl      ll_get_coherency_cpumask
+        mov     lr, r0
+        add     r0, r1, #ARMADA_XP_CFB_CTL_REG_OFFSET
+1:
+        ldrex   r2, [r0]
+        bic     r2, r2, r3
+        strex   r1, r2, [r0]
+        cmp     r1, #0
+        bne     1b
+        dsb
+        mov     pc, lr
+ENDPROC(ll_disable_coherency)
+        .align 2
+3:
+        .long   coherency_phys_base - .
diff --git a/arch/arm/mach-mvebu/common.h b/arch/arm/mach-mvebu/common.h
index 55449c487c9e..b67fb7a10d8b 100644
--- a/arch/arm/mach-mvebu/common.h
+++ b/arch/arm/mach-mvebu/common.h
@@ -18,6 +18,9 @@
 #include <linux/reboot.h>
 void mvebu_restart(enum reboot_mode mode, const char *cmd);
+int mvebu_cpu_reset_deassert(int cpu);
+void mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr);
+void mvebu_system_controller_set_cpu_boot_addr(void *boot_addr);
 void armada_xp_cpu_die(unsigned int cpu);
diff --git a/arch/arm/mach-mvebu/cpu-reset.c b/arch/arm/mach-mvebu/cpu-reset.c
new file mode 100644
index 000000000000..4a8f9eebebea
--- /dev/null
+++ b/arch/arm/mach-mvebu/cpu-reset.c
@@ -0,0 +1,103 @@
+/*
+ * Copyright (C) 2014 Marvell
+ *
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#define pr_fmt(fmt) "mvebu-cpureset: " fmt
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+#include <linux/resource.h>
+#include "armada-370-xp.h"
+static void __iomem *cpu_reset_base;
+static size_t cpu_reset_size;
+#define CPU_RESET_OFFSET(cpu) (cpu * 0x8)
+#define CPU_RESET_ASSERT      BIT(0)
+int mvebu_cpu_reset_deassert(int cpu)
+{
+        u32 reg;
+        if (!cpu_reset_base)
+                return -ENODEV;
+        if (CPU_RESET_OFFSET(cpu) >= cpu_reset_size)
+                return -EINVAL;
+        reg = readl(cpu_reset_base + CPU_RESET_OFFSET(cpu));
+        reg &= ~CPU_RESET_ASSERT;
+        writel(reg, cpu_reset_base + CPU_RESET_OFFSET(cpu));
+        return 0;
+}
+static int mvebu_cpu_reset_map(struct device_node *np, int res_idx)
+{
+        struct resource res;
+        if (of_address_to_resource(np, res_idx, &res)) {
+                pr_err("unable to get resource\n");
+                return -ENOENT;
+        }
+        if (!request_mem_region(res.start, resource_size(&res),
+                                np->full_name)) {
+                pr_err("unable to request region\n");
+                return -EBUSY;
+        }
+        cpu_reset_base = ioremap(res.start, resource_size(&res));
+        if (!cpu_reset_base) {
+                pr_err("unable to map registers\n");
+                release_mem_region(res.start, resource_size(&res));
+                return -ENOMEM;
+        }
+        cpu_reset_size = resource_size(&res);
+        return 0;
+}
+int __init mvebu_cpu_reset_init(void)
+{
+        struct device_node *np;
+        int res_idx;
+        int ret;
+        np = of_find_compatible_node(NULL, NULL,
+                                     "marvell,armada-370-cpu-reset");
+        if (np) {
+                res_idx = 0;
+        } else {
+                /*
+                 * This code is kept for backward compatibility with
+                 * old Device Trees.
+                 */
+                np = of_find_compatible_node(NULL, NULL,
+                                             "marvell,armada-370-xp-pmsu");
+                if (np) {
+                        pr_warn(FW_WARN "deprecated pmsu binding\n");
+                        res_idx = 1;
+                }
+        }
+        /* No reset node found */
+        if (!np)
+                return -ENODEV;
+        ret = mvebu_cpu_reset_map(np, res_idx);
+        of_node_put(np);
+        return ret;
+}
+early_initcall(mvebu_cpu_reset_init);
diff --git a/arch/arm/mach-mvebu/dove.c b/arch/arm/mach-mvebu/dove.c
index 5e5a43624237..b50464ec1130 100644
--- a/arch/arm/mach-mvebu/dove.c
+++ b/arch/arm/mach-mvebu/dove.c
@@ -23,7 +23,7 @@ static void __init dove_init(void)
 #ifdef CONFIG_CACHE_TAUROS2
        tauros2_init(0);
 #endif
-        BUG_ON(mvebu_mbus_dt_init());
+        BUG_ON(mvebu_mbus_dt_init(false));
        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 }
diff --git a/arch/arm/mach-mvebu/headsmp-a9.S b/arch/arm/mach-mvebu/headsmp-a9.S
new file mode 100644
index 000000000000..5925366bc03c
--- /dev/null
+++ b/arch/arm/mach-mvebu/headsmp-a9.S
@@ -0,0 +1,34 @@
+/*
+ * SMP support: Entry point for secondary CPUs of Marvell EBU
+ * Cortex-A9 based SOCs (Armada 375 and Armada 38x).
+ *
+ * Copyright (C) 2014 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <linux/linkage.h>
+#include <linux/init.h>
+        __CPUINIT
+#define CPU_RESUME_ADDR_REG 0xf10182d4
+.global armada_375_smp_cpu1_enable_code_start
+.global armada_375_smp_cpu1_enable_code_end
+armada_375_smp_cpu1_enable_code_start:
+        ldr     r0, [pc, #4]
+        ldr     r1, [r0]
+        mov     pc, r1
+        .word   CPU_RESUME_ADDR_REG
+armada_375_smp_cpu1_enable_code_end:
+ENTRY(mvebu_cortex_a9_secondary_startup)
+        bl      v7_invalidate_l1
+        b       secondary_startup
+ENDPROC(mvebu_cortex_a9_secondary_startup)
diff --git a/arch/arm/mach-mvebu/headsmp.S b/arch/arm/mach-mvebu/headsmp.S
index 3dd80df428f7..2c4032e368ba 100644
--- a/arch/arm/mach-mvebu/headsmp.S
+++ b/arch/arm/mach-mvebu/headsmp.S
@@ -31,21 +31,10 @@
 ENTRY(armada_xp_secondary_startup)
 ARM_BE8(setend be )                    @ go BE8 if entered LE
-        /* Get coherency fabric base physical address */
+        bl      ll_add_cpu_to_smp_group
-        adr     r0, 1f
-        ldr     r1, [r0]
-        ldr     r0, [r0, r1]
-        /* Read CPU id */
+        bl      ll_enable_coherency
-        mrc     p15, 0, r1, c0, c0, 5
-        and     r1, r1, #0xF
-        /* Add CPU to coherency fabric */
-        bl      ll_set_cpu_coherent
        b       secondary_startup
 ENDPROC(armada_xp_secondary_startup)
-        .align 2
-1:
-        .long   coherency_phys_base - .
diff --git a/arch/arm/mach-mvebu/kirkwood.c b/arch/arm/mach-mvebu/kirkwood.c
index 120207fc36f1..46f105913c84 100644
--- a/arch/arm/mach-mvebu/kirkwood.c
+++ b/arch/arm/mach-mvebu/kirkwood.c
@@ -169,7 +169,7 @@ static void __init kirkwood_dt_init(void)
 {
        kirkwood_disable_mbus_error_propagation();
-        BUG_ON(mvebu_mbus_dt_init());
+        BUG_ON(mvebu_mbus_dt_init(false));
 #ifdef CONFIG_CACHE_FEROCEON_L2
        feroceon_of_init();
@@ -180,9 +180,6 @@ static void __init kirkwood_dt_init(void)
        kirkwood_pm_init();
        kirkwood_dt_eth_fixup();
-        if (of_machine_is_compatible("hp,t5325"))
-                t5325_init();
        of_platform_populate(NULL, of_default_bus_match_table, auxdata, NULL);
 }
diff --git a/arch/arm/mach-mvebu/mvebu-soc-id.c b/arch/arm/mach-mvebu/mvebu-soc-id.c
index f3d4cf53f746..d0f35b4d4a23 100644
--- a/arch/arm/mach-mvebu/mvebu-soc-id.c
+++ b/arch/arm/mach-mvebu/mvebu-soc-id.c
@@ -23,6 +23,8 @@
 #include <linux/kernel.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>
 #include "mvebu-soc-id.h"
 #define PCIE_DEV_ID_OFF         0x0
@@ -108,7 +110,18 @@ static int __init mvebu_soc_id_init(void)
        iounmap(pci_base);
 res_ioremap:
-        clk_disable_unprepare(clk);
+        /*
+         * If the PCIe unit is actually enabled and we have PCI
+         * support in the kernel, we intentionally do not release the
+         * reference to the clock. We want to keep it running since
+         * the bootloader does some PCIe link configuration that the
+         * kernel is for now unable to do, and gating the clock would
+         * make us loose this precious configuration.
+         */
+        if (!of_device_is_available(child) || !IS_ENABLED(CONFIG_PCI_MVEBU)) {
+                clk_disable_unprepare(clk);
+                clk_put(clk);
+        }
 clk_err:
        of_node_put(child);
@@ -116,5 +129,33 @@ clk_err:
        return ret;
 }
-core_initcall(mvebu_soc_id_init);
+early_initcall(mvebu_soc_id_init);
+static int __init mvebu_soc_device(void)
+{
+        struct soc_device_attribute *soc_dev_attr;
+        struct soc_device *soc_dev;
+        /* Also protects against running on non-mvebu systems */
+        if (!is_id_valid)
+                return 0;
+        soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+        if (!soc_dev_attr)
+                return -ENOMEM;
+        soc_dev_attr->family = kasprintf(GFP_KERNEL, "Marvell");
+        soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%X", soc_rev);
+        soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%X", soc_dev_id);
+        soc_dev = soc_device_register(soc_dev_attr);
+        if (IS_ERR(soc_dev)) {
+                kfree(soc_dev_attr->family);
+                kfree(soc_dev_attr->revision);
+                kfree(soc_dev_attr->soc_id);
+                kfree(soc_dev_attr);
+        }
+        return 0;
+}
+postcore_initcall(mvebu_soc_device);
diff --git a/arch/arm/mach-mvebu/mvebu-soc-id.h b/arch/arm/mach-mvebu/mvebu-soc-id.h
index 31654252fe35..c16bb68ca81f 100644
--- a/arch/arm/mach-mvebu/mvebu-soc-id.h
+++ b/arch/arm/mach-mvebu/mvebu-soc-id.h
@@ -20,6 +20,10 @@
 #define MV78XX0_A0_REV      0x1
 #define MV78XX0_B0_REV      0x2
+/* Armada 375 */
+#define ARMADA_375_Z1_REV   0x0
+#define ARMADA_375_A0_REV   0x3
 #ifdef CONFIG_ARCH_MVEBU
 int mvebu_get_soc_id(u32 *dev, u32 *rev);
 #else
diff --git a/arch/arm/mach-mvebu/platsmp-a9.c b/arch/arm/mach-mvebu/platsmp-a9.c
new file mode 100644
index 000000000000..96c2c59e34b6
--- /dev/null
+++ b/arch/arm/mach-mvebu/platsmp-a9.c
@@ -0,0 +1,102 @@
+/*
+ * Symmetric Multi Processing (SMP) support for Marvell EBU Cortex-A9
+ * based SOCs (Armada 375/38x).
+ *
+ * Copyright (C) 2014 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/smp.h>
+#include <linux/mbus.h>
+#include <asm/smp_scu.h>
+#include <asm/smp_plat.h>
+#include "common.h"
+#include "mvebu-soc-id.h"
+#include "pmsu.h"
+#define CRYPT0_ENG_ID   41
+#define CRYPT0_ENG_ATTR 0x1
+#define SRAM_PHYS_BASE  0xFFFF0000
+#define BOOTROM_BASE    0xFFF00000
+#define BOOTROM_SIZE    0x100000
+extern unsigned char armada_375_smp_cpu1_enable_code_end;
+extern unsigned char armada_375_smp_cpu1_enable_code_start;
+void armada_375_smp_cpu1_enable_wa(void)
+{
+        void __iomem *sram_virt_base;
+        mvebu_mbus_del_window(BOOTROM_BASE, BOOTROM_SIZE);
+        mvebu_mbus_add_window_by_id(CRYPT0_ENG_ID, CRYPT0_ENG_ATTR,
+                                SRAM_PHYS_BASE, SZ_64K);
+        sram_virt_base = ioremap(SRAM_PHYS_BASE, SZ_64K);
+        memcpy(sram_virt_base, &armada_375_smp_cpu1_enable_code_start,
+               &armada_375_smp_cpu1_enable_code_end
+               - &armada_375_smp_cpu1_enable_code_start);
+}
+extern void mvebu_cortex_a9_secondary_startup(void);
+static int __cpuinit mvebu_cortex_a9_boot_secondary(unsigned int cpu,
+                                                    struct task_struct *idle)
+{
+        int ret, hw_cpu;
+        pr_info("Booting CPU %d\n", cpu);
+        /*
+         * Write the address of secondary startup into the system-wide
+         * flags register. The boot monitor waits until it receives a
+         * soft interrupt, and then the secondary CPU branches to this
+         * address.
+         */
+        hw_cpu = cpu_logical_map(cpu);
+        if (of_machine_is_compatible("marvell,armada375")) {
+                u32 dev, rev;
+                if (mvebu_get_soc_id(&dev, &rev) == 0 &&
+                    rev == ARMADA_375_Z1_REV)
+                        armada_375_smp_cpu1_enable_wa();
+                mvebu_system_controller_set_cpu_boot_addr(mvebu_cortex_a9_secondary_startup);
+        }
+        else {
+                mvebu_pmsu_set_cpu_boot_addr(hw_cpu,
+                                             mvebu_cortex_a9_secondary_startup);
+        }
+        smp_wmb();
+        ret = mvebu_cpu_reset_deassert(hw_cpu);
+        if (ret) {
+                pr_err("Could not start the secondary CPU: %d\n", ret);
+                return ret;
+        }
+        arch_send_wakeup_ipi_mask(cpumask_of(cpu));
+        return 0;
+}
+static struct smp_operations mvebu_cortex_a9_smp_ops __initdata = {
+        .smp_boot_secondary     = mvebu_cortex_a9_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+        .cpu_die                = armada_xp_cpu_die,
+#endif
+};
+CPU_METHOD_OF_DECLARE(mvebu_armada_375_smp, "marvell,armada-375-smp",
+                      &mvebu_cortex_a9_smp_ops);
+CPU_METHOD_OF_DECLARE(mvebu_armada_380_smp, "marvell,armada-380-smp",
+                      &mvebu_cortex_a9_smp_ops);
diff --git a/arch/arm/mach-mvebu/platsmp.c b/arch/arm/mach-mvebu/platsmp.c
index a6da03f5b24e..88b976b31719 100644
--- a/arch/arm/mach-mvebu/platsmp.c
+++ b/arch/arm/mach-mvebu/platsmp.c
@@ -70,16 +70,19 @@ static void __init set_secondary_cpus_clock(void)
        }
 }
-static void armada_xp_secondary_init(unsigned int cpu)
-{
-        armada_xp_mpic_smp_cpu_init();
-}
 static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
+        int ret, hw_cpu;
        pr_info("Booting CPU %d\n", cpu);
-        armada_xp_boot_cpu(cpu, armada_xp_secondary_startup);
+        hw_cpu = cpu_logical_map(cpu);
+        mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_xp_secondary_startup);
+        ret = mvebu_cpu_reset_deassert(hw_cpu);
+        if (ret) {
+                pr_warn("unable to boot CPU: %d\n", ret);
+                return ret;
+        }
        return 0;
 }
@@ -90,8 +93,6 @@ static void __init armada_xp_smp_init_cpus(void)
        if (ncores == 0 || ncores > ARMADA_XP_MAX_CPUS)
                panic("Invalid number of CPUs in DT\n");
-        set_smp_cross_call(armada_mpic_send_doorbell);
 }
 static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)
@@ -102,7 +103,7 @@ static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)
        set_secondary_cpus_clock();
        flush_cache_all();
-        set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0);
+        set_cpu_coherent();
        /*
         * In order to boot the secondary CPUs we need to ensure
@@ -124,9 +125,11 @@ static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)
 struct smp_operations armada_xp_smp_ops __initdata = {
        .smp_init_cpus          = armada_xp_smp_init_cpus,
        .smp_prepare_cpus       = armada_xp_smp_prepare_cpus,
-        .smp_secondary_init     = armada_xp_secondary_init,
        .smp_boot_secondary     = armada_xp_boot_secondary,
 #ifdef CONFIG_HOTPLUG_CPU
        .cpu_die                = armada_xp_cpu_die,
 #endif
 };
+CPU_METHOD_OF_DECLARE(armada_xp_smp, "marvell,armada-xp-smp",
+                      &armada_xp_smp_ops);
diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c
index d71ef53107c4..53a55c8520bf 100644
--- a/arch/arm/mach-mvebu/pmsu.c
+++ b/arch/arm/mach-mvebu/pmsu.c
@@ -16,62 +16,283 @@
 * other SOC units
 */
+#define pr_fmt(fmt) "mvebu-pmsu: " fmt
+#include <linux/cpu_pm.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/of_address.h>
 #include <linux/io.h>
+#include <linux/platform_device.h>
 #include <linux/smp.h>
+#include <linux/resource.h>
+#include <asm/cacheflush.h>
+#include <asm/cp15.h>
 #include <asm/smp_plat.h>
-#include "pmsu.h"
+#include <asm/suspend.h>
+#include <asm/tlbflush.h>
+#include "common.h"
 static void __iomem *pmsu_mp_base;
-static void __iomem *pmsu_reset_base;
-#define PMSU_BOOT_ADDR_REDIRECT_OFFSET(cpu)     ((cpu * 0x100) + 0x24)
+#define PMSU_BASE_OFFSET    0x100
-#define PMSU_RESET_CTL_OFFSET(cpu)              (cpu * 0x8)
+#define PMSU_REG_SIZE       0x1000
+/* PMSU MP registers */
+#define PMSU_CONTROL_AND_CONFIG(cpu)        ((cpu * 0x100) + 0x104)
+#define PMSU_CONTROL_AND_CONFIG_DFS_REQ         BIT(18)
+#define PMSU_CONTROL_AND_CONFIG_PWDDN_REQ       BIT(16)
+#define PMSU_CONTROL_AND_CONFIG_L2_PWDDN        BIT(20)
+#define PMSU_CPU_POWER_DOWN_CONTROL(cpu)    ((cpu * 0x100) + 0x108)
+#define PMSU_CPU_POWER_DOWN_DIS_SNP_Q_SKIP      BIT(0)
+#define PMSU_STATUS_AND_MASK(cpu)           ((cpu * 0x100) + 0x10c)
+#define PMSU_STATUS_AND_MASK_CPU_IDLE_WAIT      BIT(16)
+#define PMSU_STATUS_AND_MASK_SNP_Q_EMPTY_WAIT   BIT(17)
+#define PMSU_STATUS_AND_MASK_IRQ_WAKEUP         BIT(20)
+#define PMSU_STATUS_AND_MASK_FIQ_WAKEUP         BIT(21)
+#define PMSU_STATUS_AND_MASK_DBG_WAKEUP         BIT(22)
+#define PMSU_STATUS_AND_MASK_IRQ_MASK           BIT(24)
+#define PMSU_STATUS_AND_MASK_FIQ_MASK           BIT(25)
+#define PMSU_BOOT_ADDR_REDIRECT_OFFSET(cpu) ((cpu * 0x100) + 0x124)
+/* PMSU fabric registers */
+#define L2C_NFABRIC_PM_CTL                  0x4
+#define L2C_NFABRIC_PM_CTL_PWR_DOWN             BIT(20)
+extern void ll_disable_coherency(void);
+extern void ll_enable_coherency(void);
+static struct platform_device armada_xp_cpuidle_device = {
+        .name = "cpuidle-armada-370-xp",
+};
 static struct of_device_id of_pmsu_table[] = {
-        {.compatible = "marvell,armada-370-xp-pmsu"},
+        { .compatible = "marvell,armada-370-pmsu", },
+        { .compatible = "marvell,armada-370-xp-pmsu", },
+        { .compatible = "marvell,armada-380-pmsu", },
        { /* end of list */ },
 };
-#ifdef CONFIG_SMP
+void mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr)
-int armada_xp_boot_cpu(unsigned int cpu_id, void *boot_addr)
 {
-        int reg, hw_cpu;
+        writel(virt_to_phys(boot_addr), pmsu_mp_base +
+                PMSU_BOOT_ADDR_REDIRECT_OFFSET(hw_cpu));
+}
+static int __init armada_370_xp_pmsu_init(void)
+{
+        struct device_node *np;
+        struct resource res;
+        int ret = 0;
+        np = of_find_matching_node(NULL, of_pmsu_table);
+        if (!np)
+                return 0;
+        pr_info("Initializing Power Management Service Unit\n");
-        if (!pmsu_mp_base || !pmsu_reset_base) {
+        if (of_address_to_resource(np, 0, &res)) {
-                pr_warn("Can't boot CPU. PMSU is uninitialized\n");
+                pr_err("unable to get resource\n");
-                return 1;
+                ret = -ENOENT;
+                goto out;
        }
-        hw_cpu = cpu_logical_map(cpu_id);
+        if (of_device_is_compatible(np, "marvell,armada-370-xp-pmsu")) {
+                pr_warn(FW_WARN "deprecated pmsu binding\n");
+                res.start = res.start - PMSU_BASE_OFFSET;
+                res.end = res.start + PMSU_REG_SIZE - 1;
+        }
-        writel(virt_to_phys(boot_addr), pmsu_mp_base +
+        if (!request_mem_region(res.start, resource_size(&res),
-                        PMSU_BOOT_ADDR_REDIRECT_OFFSET(hw_cpu));
+                                np->full_name)) {
+                pr_err("unable to request region\n");
+                ret = -EBUSY;
+                goto out;
+        }
+        pmsu_mp_base = ioremap(res.start, resource_size(&res));
+        if (!pmsu_mp_base) {
+                pr_err("unable to map registers\n");
+                release_mem_region(res.start, resource_size(&res));
+                ret = -ENOMEM;
+                goto out;
+        }
+ out:
+        of_node_put(np);
+        return ret;
+}
+static void armada_370_xp_pmsu_enable_l2_powerdown_onidle(void)
+{
+        u32 reg;
+        if (pmsu_mp_base == NULL)
+                return;
+        /* Enable L2 & Fabric powerdown in Deep-Idle mode - Fabric */
+        reg = readl(pmsu_mp_base + L2C_NFABRIC_PM_CTL);
+        reg |= L2C_NFABRIC_PM_CTL_PWR_DOWN;
+        writel(reg, pmsu_mp_base + L2C_NFABRIC_PM_CTL);
+}
+static void armada_370_xp_cpu_resume(void)
+{
+        asm volatile("bl    ll_add_cpu_to_smp_group\n\t"
+                     "bl    ll_enable_coherency\n\t"
+                     "b     cpu_resume\n\t");
+}
+/* No locking is needed because we only access per-CPU registers */
+void armada_370_xp_pmsu_idle_prepare(bool deepidle)
+{
+        unsigned int hw_cpu = cpu_logical_map(smp_processor_id());
+        u32 reg;
+        if (pmsu_mp_base == NULL)
+                return;
-        /* Release CPU from reset by clearing reset bit*/
+        /*
-        reg = readl(pmsu_reset_base + PMSU_RESET_CTL_OFFSET(hw_cpu));
+         * Adjust the PMSU configuration to wait for WFI signal, enable
-        reg &= (~0x1);
+         * IRQ and FIQ as wakeup events, set wait for snoop queue empty
-        writel(reg, pmsu_reset_base + PMSU_RESET_CTL_OFFSET(hw_cpu));
+         * indication and mask IRQ and FIQ from CPU
+         */
+        reg = readl(pmsu_mp_base + PMSU_STATUS_AND_MASK(hw_cpu));
+        reg |= PMSU_STATUS_AND_MASK_CPU_IDLE_WAIT    |
+               PMSU_STATUS_AND_MASK_IRQ_WAKEUP       |
+               PMSU_STATUS_AND_MASK_FIQ_WAKEUP       |
+               PMSU_STATUS_AND_MASK_SNP_Q_EMPTY_WAIT |
+               PMSU_STATUS_AND_MASK_IRQ_MASK         |
+               PMSU_STATUS_AND_MASK_FIQ_MASK;
+        writel(reg, pmsu_mp_base + PMSU_STATUS_AND_MASK(hw_cpu));
+        reg = readl(pmsu_mp_base + PMSU_CONTROL_AND_CONFIG(hw_cpu));
+        /* ask HW to power down the L2 Cache if needed */
+        if (deepidle)
+                reg |= PMSU_CONTROL_AND_CONFIG_L2_PWDDN;
+        /* request power down */
+        reg |= PMSU_CONTROL_AND_CONFIG_PWDDN_REQ;
+        writel(reg, pmsu_mp_base + PMSU_CONTROL_AND_CONFIG(hw_cpu));
+        /* Disable snoop disable by HW - SW is taking care of it */
+        reg = readl(pmsu_mp_base + PMSU_CPU_POWER_DOWN_CONTROL(hw_cpu));
+        reg |= PMSU_CPU_POWER_DOWN_DIS_SNP_Q_SKIP;
+        writel(reg, pmsu_mp_base + PMSU_CPU_POWER_DOWN_CONTROL(hw_cpu));
+}
+static noinline int do_armada_370_xp_cpu_suspend(unsigned long deepidle)
+{
+        armada_370_xp_pmsu_idle_prepare(deepidle);
+        v7_exit_coherency_flush(all);
+        ll_disable_coherency();
+        dsb();
+        wfi();
+        /* If we are here, wfi failed. As processors run out of
+         * coherency for some time, tlbs might be stale, so flush them
+         */
+        local_flush_tlb_all();
+        ll_enable_coherency();
+        /* Test the CR_C bit and set it if it was cleared */
+        asm volatile(
+        "mrc    p15, 0, %0, c1, c0, 0 \n\t"
+        "tst    %0, #(1 << 2) \n\t"
+        "orreq  %0, %0, #(1 << 2) \n\t"
+        "mcreq  p15, 0, %0, c1, c0, 0 \n\t"
+        "isb    "
+        : : "r" (0));
+        pr_warn("Failed to suspend the system\n");
        return 0;
 }
-#endif
-static int __init armada_370_xp_pmsu_init(void)
+static int armada_370_xp_cpu_suspend(unsigned long deepidle)
+{
+        return cpu_suspend(deepidle, do_armada_370_xp_cpu_suspend);
+}
+/* No locking is needed because we only access per-CPU registers */
+static noinline void armada_370_xp_pmsu_idle_restore(void)
+{
+        unsigned int hw_cpu = cpu_logical_map(smp_processor_id());
+        u32 reg;
+        if (pmsu_mp_base == NULL)
+                return;
+        /* cancel ask HW to power down the L2 Cache if possible */
+        reg = readl(pmsu_mp_base + PMSU_CONTROL_AND_CONFIG(hw_cpu));
+        reg &= ~PMSU_CONTROL_AND_CONFIG_L2_PWDDN;
+        writel(reg, pmsu_mp_base + PMSU_CONTROL_AND_CONFIG(hw_cpu));
+        /* cancel Enable wakeup events and mask interrupts */
+        reg = readl(pmsu_mp_base + PMSU_STATUS_AND_MASK(hw_cpu));
+        reg &= ~(PMSU_STATUS_AND_MASK_IRQ_WAKEUP | PMSU_STATUS_AND_MASK_FIQ_WAKEUP);
+        reg &= ~PMSU_STATUS_AND_MASK_CPU_IDLE_WAIT;
+        reg &= ~PMSU_STATUS_AND_MASK_SNP_Q_EMPTY_WAIT;
+        reg &= ~(PMSU_STATUS_AND_MASK_IRQ_MASK | PMSU_STATUS_AND_MASK_FIQ_MASK);
+        writel(reg, pmsu_mp_base + PMSU_STATUS_AND_MASK(hw_cpu));
+}
+static int armada_370_xp_cpu_pm_notify(struct notifier_block *self,
+                                    unsigned long action, void *hcpu)
+{
+        if (action == CPU_PM_ENTER) {
+                unsigned int hw_cpu = cpu_logical_map(smp_processor_id());
+                mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_370_xp_cpu_resume);
+        } else if (action == CPU_PM_EXIT) {
+                armada_370_xp_pmsu_idle_restore();
+        }
+        return NOTIFY_OK;
+}
+static struct notifier_block armada_370_xp_cpu_pm_notifier = {
+        .notifier_call = armada_370_xp_cpu_pm_notify,
+};
+int __init armada_370_xp_cpu_pm_init(void)
 {
        struct device_node *np;
+        /*
+         * Check that all the requirements are available to enable
+         * cpuidle. So far, it is only supported on Armada XP, cpuidle
+         * needs the coherency fabric and the PMSU enabled
+         */
+        if (!of_machine_is_compatible("marvell,armadaxp"))
+                return 0;
+        np = of_find_compatible_node(NULL, NULL, "marvell,coherency-fabric");
+        if (!np)
+                return 0;
+        of_node_put(np);
        np = of_find_matching_node(NULL, of_pmsu_table);
-        if (np) {
+        if (!np)
-                pr_info("Initializing Power Management Service Unit\n");
+                return 0;
-                pmsu_mp_base = of_iomap(np, 0);
+        of_node_put(np);
-                pmsu_reset_base = of_iomap(np, 1);
-                of_node_put(np);
+        armada_370_xp_pmsu_enable_l2_powerdown_onidle();
-        }
+        armada_xp_cpuidle_device.dev.platform_data = armada_370_xp_cpu_suspend;
+        platform_device_register(&armada_xp_cpuidle_device);
+        cpu_pm_register_notifier(&armada_370_xp_cpu_pm_notifier);
        return 0;
 }
+arch_initcall(armada_370_xp_cpu_pm_init);
 early_initcall(armada_370_xp_pmsu_init);
diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c
index 614ba6832ff3..0c5524ac75b7 100644
--- a/arch/arm/mach-mvebu/system-controller.c
+++ b/arch/arm/mach-mvebu/system-controller.c
@@ -37,6 +37,8 @@ struct mvebu_system_controller {
        u32 rstoutn_mask_reset_out_en;
        u32 system_soft_reset;
+        u32 resume_boot_addr;
 };
 static struct mvebu_system_controller *mvebu_sc;
@@ -52,6 +54,7 @@ static const struct mvebu_system_controller armada_375_system_controller = {
        .system_soft_reset_offset = 0x58,
        .rstoutn_mask_reset_out_en = 0x1,
        .system_soft_reset = 0x1,
+        .resume_boot_addr = 0xd4,
 };
 static const struct mvebu_system_controller orion_system_controller = {
@@ -98,6 +101,16 @@ void mvebu_restart(enum reboot_mode mode, const char *cmd)
                ;
 }
+#ifdef CONFIG_SMP
+void mvebu_system_controller_set_cpu_boot_addr(void *boot_addr)
+{
+        BUG_ON(system_controller_base == NULL);
+        BUG_ON(mvebu_sc->resume_boot_addr == 0);
+        writel(virt_to_phys(boot_addr), system_controller_base +
+               mvebu_sc->resume_boot_addr);
+}
+#endif
 static int __init mvebu_system_controller_init(void)
 {
        const struct of_device_id *match;
@@ -114,4 +127,4 @@ static int __init mvebu_system_controller_init(void)
        return 0;
 }
-arch_initcall(mvebu_system_controller_init);
+early_initcall(mvebu_system_controller_init);
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 65d2acb31498..5b45d266d83e 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -346,7 +346,7 @@ static struct omap_usb_config h2_usb_config __initdata = {
        /* usb1 has a Mini-AB port and external isp1301 transceiver */
        .otg            = 2,
-#ifdef  CONFIG_USB_GADGET_OMAP
+#if IS_ENABLED(CONFIG_USB_OMAP)
        .hmc_mode       = 19,   /* 0:host(off) 1:dev|otg 2:disabled */
        /* .hmc_mode    = 21,*/ /* 0:host(off) 1:dev(loopback) 2:host(loopback) */
 #elif   defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index 816ecd13f81e..bfed4f928663 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -366,7 +366,7 @@ static struct omap_usb_config h3_usb_config __initdata = {
        /* usb1 has a Mini-AB port and external isp1301 transceiver */
        .otg        = 2,
-#ifdef CONFIG_USB_GADGET_OMAP
+#if IS_ENABLED(CONFIG_USB_OMAP)
        .hmc_mode       = 19,   /* 0:host(off) 1:dev|otg 2:disabled */
 #elif  defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
        /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index bd5f02e9c354..c49ce83cc1eb 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -312,7 +312,7 @@ static struct omap_usb_config h2_usb_config __initdata = {
        /* usb1 has a Mini-AB port and external isp1301 transceiver */
        .otg            = 2,
-#ifdef  CONFIG_USB_GADGET_OMAP
+#if IS_ENABLED(CONFIG_USB_OMAP)
        .hmc_mode       = 19,   /* 0:host(off) 1:dev|otg 2:disabled */
        /* .hmc_mode    = 21,*/ /* 0:host(off) 1:dev(loopback) 2:host(loopback) */
 #elif   defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 3a0262156e93..7436d4cf6596 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -283,7 +283,7 @@ static struct omap_usb_config osk_usb_config __initdata = {
         * be used, with a NONSTANDARD gender-bending cable/dongle, as
         * a peripheral.
         */
-#ifdef  CONFIG_USB_GADGET_OMAP
+#if IS_ENABLED(CONFIG_USB_OMAP)
        .register_dev   = 1,
        .hmc_mode       = 0,
 #else
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 0a8d3349149c..29e526235dc2 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -266,31 +266,6 @@ static struct physmap_flash_data sx1_flash_data = {
        .nr_parts       = ARRAY_SIZE(sx1_partitions),
 };
-#ifdef CONFIG_SX1_OLD_FLASH
-/* MTD Intel StrataFlash - old flashes */
-static struct resource sx1_old_flash_resource[] = {
-        [0] = {
-                .start  = OMAP_CS0_PHYS,        /* Physical */
-                .end    = OMAP_CS0_PHYS + SZ_16M - 1,,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = OMAP_CS1_PHYS,
-                .end    = OMAP_CS1_PHYS + SZ_8M - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-};
-static struct platform_device sx1_flash_device = {
-        .name           = "physmap-flash",
-        .id             = 0,
-        .dev            = {
-                .platform_data  = &sx1_flash_data,
-        },
-        .num_resources  = 2,
-        .resource       = &sx1_old_flash_resource,
-};
-#else
 /* MTD Intel 4000 flash - new flashes */
 static struct resource sx1_new_flash_resource = {
        .start          = OMAP_CS0_PHYS,
@@ -307,7 +282,6 @@ static struct platform_device sx1_flash_device = {
        .num_resources  = 1,
        .resource       = &sx1_new_flash_resource,
 };
-#endif
 /*----------- USB -------------------------*/
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index dbee729e3b6d..34b4c0044961 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -123,19 +123,8 @@ void omap1_pm_idle(void)
 #warning Enable 32kHz OS timer in order to allow sleep states in idle
        use_idlect1 = use_idlect1 & ~(1 << 9);
 #else
+        if (enable_dyn_sleep)
-        while (enable_dyn_sleep) {
-#ifdef CONFIG_CBUS_TAHVO_USB
-                extern int vbus_active;
-                /* Clock requirements? */
-                if (vbus_active)
-                        break;
-#endif
                do_sleep = 1;
-                break;
-        }
 #endif
 #ifdef CONFIG_OMAP_DM_TIMER
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 543d9a882de3..4f9383cecf76 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -262,12 +262,7 @@ static struct usbhs_phy_data phy_data[] __initdata = {
 static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
        .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
-#if defined(CONFIG_PANEL_SHARP_LQ043T1DG01) || \
-                defined(CONFIG_PANEL_SHARP_LQ043T1DG01_MODULE)
-        .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
-#else
        .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
-#endif
 };
 #ifdef CONFIG_OMAP_MUX
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index ac82512b9c8c..e87f2a83d6bf 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -142,7 +142,7 @@ __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs,
        board_nand_data.nr_parts        = nr_parts;
        board_nand_data.devsize         = nand_type;
-        board_nand_data.ecc_opt = OMAP_ECC_BCH8_CODE_HW;
+        board_nand_data.ecc_opt = OMAP_ECC_HAM1_CODE_HW;
        gpmc_nand_init(&board_nand_data, gpmc_t);
 }
 #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
@@ -160,13 +160,13 @@ static u8 get_gpmc0_type(void)
        if (!fpga_map_addr)
                return -ENOMEM;
-        if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV)))
+        if (!(readw_relaxed(fpga_map_addr + REG_FPGA_REV)))
                /* we dont have an DEBUG FPGA??? */
                /* Depend on #defines!! default to strata boot return param */
                goto unmap;
        /* S8-DIP-OFF = 1, S8-DIP-ON = 0 */
-        cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;
+        cs = readw_relaxed(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;
        /* ES2.0 SDP's onwards 4 dip switches are provided for CS */
        if (omap_rev() >= OMAP3430_REV_ES1_0)
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 119efaf5808a..a2e035e0792a 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -121,11 +121,7 @@ static struct platform_device omap3stalker_tfp410_device = {
 static struct connector_atv_platform_data omap3stalker_tv_pdata = {
        .name = "tv",
        .source = "venc.0",
-#if defined(CONFIG_OMAP2_VENC_OUT_TYPE_SVIDEO)
-        .connector_type = OMAP_DSS_VENC_TYPE_SVIDEO,
-#elif defined(CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE)
        .connector_type = OMAP_DSS_VENC_TYPE_COMPOSITE,
-#endif
        .invert_polarity = false,
 };
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
index 8f5121b89688..eb8c75ec3b1a 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -456,7 +456,8 @@ static struct clk_hw_omap dpll4_m5x2_ck_hw = {
        .clkdm_name     = "dpll4_clkdm",
 };
-DEFINE_STRUCT_CLK(dpll4_m5x2_ck, dpll4_m5x2_ck_parent_names, dpll4_m5x2_ck_ops);
+DEFINE_STRUCT_CLK_FLAGS(dpll4_m5x2_ck, dpll4_m5x2_ck_parent_names,
+                        dpll4_m5x2_ck_ops, CLK_SET_RATE_PARENT);
 static struct clk dpll4_m5x2_ck_3630 = {
        .name           = "dpll4_m5x2_ck",
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
index 3ff32543493c..59cf310bc1e9 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
@@ -138,7 +138,7 @@ int omap2_reprogram_dpllcore(struct clk_hw *hw, unsigned long rate,
                if (!dd)
                        return -EINVAL;
-                tmpset.cm_clksel1_pll = __raw_readl(dd->mult_div1_reg);
+                tmpset.cm_clksel1_pll = readl_relaxed(dd->mult_div1_reg);
                tmpset.cm_clksel1_pll &= ~(dd->mult_mask |
                                           dd->div1_mask);
                div = ((curr_prcm_set->xtal_speed / 1000000) - 1);
diff --git a/arch/arm/mach-omap2/clkt2xxx_osc.c b/arch/arm/mach-omap2/clkt2xxx_osc.c
index 19f54d433490..0717dff1bc04 100644
--- a/arch/arm/mach-omap2/clkt2xxx_osc.c
+++ b/arch/arm/mach-omap2/clkt2xxx_osc.c
@@ -39,9 +39,9 @@ int omap2_enable_osc_ck(struct clk_hw *clk)
 {
        u32 pcc;
-        pcc = __raw_readl(prcm_clksrc_ctrl);
+        pcc = readl_relaxed(prcm_clksrc_ctrl);
-        __raw_writel(pcc & ~OMAP_AUTOEXTCLKMODE_MASK, prcm_clksrc_ctrl);
+        writel_relaxed(pcc & ~OMAP_AUTOEXTCLKMODE_MASK, prcm_clksrc_ctrl);
        return 0;
 }
@@ -57,9 +57,9 @@ void omap2_disable_osc_ck(struct clk_hw *clk)
 {
        u32 pcc;
-        pcc = __raw_readl(prcm_clksrc_ctrl);
+        pcc = readl_relaxed(prcm_clksrc_ctrl);
-        __raw_writel(pcc | OMAP_AUTOEXTCLKMODE_MASK, prcm_clksrc_ctrl);
+        writel_relaxed(pcc | OMAP_AUTOEXTCLKMODE_MASK, prcm_clksrc_ctrl);
 }
 unsigned long omap2_osc_clk_recalc(struct clk_hw *clk,
diff --git a/arch/arm/mach-omap2/clkt2xxx_sys.c b/arch/arm/mach-omap2/clkt2xxx_sys.c
index f467d072cd02..58dd3a9b726c 100644
--- a/arch/arm/mach-omap2/clkt2xxx_sys.c
+++ b/arch/arm/mach-omap2/clkt2xxx_sys.c
@@ -33,7 +33,7 @@ u32 omap2xxx_get_sysclkdiv(void)
 {
        u32 div;
-        div = __raw_readl(prcm_clksrc_ctrl);
+        div = readl_relaxed(prcm_clksrc_ctrl);
        div &= OMAP_SYSCLKDIV_MASK;
        div >>= OMAP_SYSCLKDIV_SHIFT;
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index f17f00697cc0..82c37b1becc4 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -18,7 +18,6 @@
 #include "powerdomain.h"
 #include "clock.h"
-#include "omap_hwmod.h"
 /*
 * Clockdomain flags
@@ -98,6 +97,8 @@ struct clkdm_dep {
 /* Possible flags for struct clockdomain._flags */
 #define _CLKDM_FLAG_HWSUP_ENABLED               BIT(0)
+struct omap_hwmod;
 /**
 * struct clockdomain - OMAP clockdomain
 * @name: clockdomain name
diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index ce25abbcffae..8be6ea50c092 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -18,9 +18,6 @@
 #include <linux/err.h>
 #include <linux/io.h>
-#include "soc.h"
-#include "iomap.h"
-#include "common.h"
 #include "prm2xxx.h"
 #include "cm.h"
 #include "cm2xxx.h"
@@ -390,7 +387,7 @@ void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core, u32 mdm)
        tmp = omap2_cm_read_mod_reg(CORE_MOD, CM_CLKSEL1) &
                OMAP24XX_CLKSEL_DSS2_MASK;
        omap2_cm_write_mod_reg(core | tmp, CORE_MOD, CM_CLKSEL1);
-        if (cpu_is_omap2430())
+        if (mdm)
                omap2_cm_write_mod_reg(mdm, OMAP2430_MDM_MOD, CM_CLKSEL);
 }
@@ -405,19 +402,11 @@ static struct cm_ll_data omap2xxx_cm_ll_data = {
 int __init omap2xxx_cm_init(void)
 {
-        if (!cpu_is_omap24xx())
-                return 0;
        return cm_register(&omap2xxx_cm_ll_data);
 }
 static void __exit omap2xxx_cm_exit(void)
 {
-        if (!cpu_is_omap24xx())
+        cm_unregister(&omap2xxx_cm_ll_data);
-                return;
-        /* Should never happen */
-        WARN(cm_unregister(&omap2xxx_cm_ll_data),
-             "%s: cm_ll_data function pointer mismatch\n", __func__);
 }
 __exitcall(omap2xxx_cm_exit);
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.h b/arch/arm/mach-omap2/cm2xxx_3xxx.h
index bfbd16fe9151..72928a3ce2aa 100644
--- a/arch/arm/mach-omap2/cm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx_3xxx.h
@@ -52,12 +52,12 @@
 static inline u32 omap2_cm_read_mod_reg(s16 module, u16 idx)
 {
-        return __raw_readl(cm_base + module + idx);
+        return readl_relaxed(cm_base + module + idx);
 }
 static inline void omap2_cm_write_mod_reg(u32 val, s16 module, u16 idx)
 {
-        __raw_writel(val, cm_base + module + idx);
+        writel_relaxed(val, cm_base + module + idx);
 }
 /* Read-modify-write a register in a CM module. Caller must lock */
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index 40a22e5649ae..b3f99e93def0 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -50,13 +50,13 @@
 /* Read a register in a CM instance */
 static inline u32 am33xx_cm_read_reg(u16 inst, u16 idx)
 {
-        return __raw_readl(cm_base + inst + idx);
+        return readl_relaxed(cm_base + inst + idx);
 }
 /* Write into a register in a CM */
 static inline void am33xx_cm_write_reg(u32 val, u16 inst, u16 idx)
 {
-        __raw_writel(val, cm_base + inst + idx);
+        writel_relaxed(val, cm_base + inst + idx);
 }
 /* Read-modify-write a register in CM */
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index cfb8891b0c0e..15a778ce7707 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -17,11 +17,8 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM_33XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM_33XX_H
-#include "common.h"
 #include "cm.h"
 #include "cm-regbits-33xx.h"
-#include "iomap.h"
 /* CM base address */
 #define AM33XX_CM_BASE          0x44e00000
diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c
index f6f028867bfe..129a4e7f6ef5 100644
--- a/arch/arm/mach-omap2/cm3xxx.c
+++ b/arch/arm/mach-omap2/cm3xxx.c
@@ -18,9 +18,6 @@
 #include <linux/err.h>
 #include <linux/io.h>
-#include "soc.h"
-#include "iomap.h"
-#include "common.h"
 #include "prm2xxx_3xxx.h"
 #include "cm.h"
 #include "cm3xxx.h"
@@ -388,7 +385,8 @@ void omap3_cm_save_context(void)
                omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL1);
        cm_context.iva2_cm_clksel2 =
                omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL2);
-        cm_context.cm_sysconfig = __raw_readl(OMAP3430_CM_SYSCONFIG);
+        cm_context.cm_sysconfig =
+                omap2_cm_read_mod_reg(OCP_MOD, OMAP3430_CM_SYSCONFIG);
        cm_context.sgx_cm_clksel =
                omap2_cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL);
        cm_context.dss_cm_clksel =
@@ -418,7 +416,8 @@ void omap3_cm_save_context(void)
                omap2_cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5);
        cm_context.pll_cm_clken2 =
                omap2_cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKEN2);
-        cm_context.cm_polctrl = __raw_readl(OMAP3430_CM_POLCTRL);
+        cm_context.cm_polctrl =
+                omap2_cm_read_mod_reg(OCP_MOD, OMAP3430_CM_POLCTRL);
        cm_context.iva2_cm_fclken =
                omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_FCLKEN);
        cm_context.iva2_cm_clken_pll =
@@ -519,7 +518,8 @@ void omap3_cm_restore_context(void)
                               CM_CLKSEL1);
        omap2_cm_write_mod_reg(cm_context.iva2_cm_clksel2, OMAP3430_IVA2_MOD,
                               CM_CLKSEL2);
-        __raw_writel(cm_context.cm_sysconfig, OMAP3430_CM_SYSCONFIG);
+        omap2_cm_write_mod_reg(cm_context.cm_sysconfig, OCP_MOD,
+                               OMAP3430_CM_SYSCONFIG);
        omap2_cm_write_mod_reg(cm_context.sgx_cm_clksel, OMAP3430ES2_SGX_MOD,
                               CM_CLKSEL);
        omap2_cm_write_mod_reg(cm_context.dss_cm_clksel, OMAP3430_DSS_MOD,
@@ -547,7 +547,8 @@ void omap3_cm_restore_context(void)
                               OMAP3430ES2_CM_CLKSEL5);
        omap2_cm_write_mod_reg(cm_context.pll_cm_clken2, PLL_MOD,
                               OMAP3430ES2_CM_CLKEN2);
-        __raw_writel(cm_context.cm_polctrl, OMAP3430_CM_POLCTRL);
+        omap2_cm_write_mod_reg(cm_context.cm_polctrl, OCP_MOD,
+                               OMAP3430_CM_POLCTRL);
        omap2_cm_write_mod_reg(cm_context.iva2_cm_fclken, OMAP3430_IVA2_MOD,
                               CM_FCLKEN);
        omap2_cm_write_mod_reg(cm_context.iva2_cm_clken_pll, OMAP3430_IVA2_MOD,
@@ -669,19 +670,11 @@ static struct cm_ll_data omap3xxx_cm_ll_data = {
 int __init omap3xxx_cm_init(void)
 {
-        if (!cpu_is_omap34xx())
-                return 0;
        return cm_register(&omap3xxx_cm_ll_data);
 }
 static void __exit omap3xxx_cm_exit(void)
 {
-        if (!cpu_is_omap34xx())
+        cm_unregister(&omap3xxx_cm_ll_data);
-                return;
-        /* Should never happen */
-        WARN(cm_unregister(&omap3xxx_cm_ll_data),
-             "%s: cm_ll_data function pointer mismatch\n", __func__);
 }
 __exitcall(omap3xxx_cm_exit);
diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h
index 8224c91b4d7a..7a16b5598127 100644
--- a/arch/arm/mach-omap2/cm3xxx.h
+++ b/arch/arm/mach-omap2/cm3xxx.h
@@ -29,9 +29,8 @@
 * These registers appear once per CM module.
 */
-#define OMAP3430_CM_REVISION            OMAP34XX_CM_REGADDR(OCP_MOD, 0x0000)
+#define OMAP3430_CM_SYSCONFIG           0x0010
-#define OMAP3430_CM_SYSCONFIG           OMAP34XX_CM_REGADDR(OCP_MOD, 0x0010)
+#define OMAP3430_CM_POLCTRL             0x009c
-#define OMAP3430_CM_POLCTRL             OMAP34XX_CM_REGADDR(OCP_MOD, 0x009c)
 #define OMAP3_CM_CLKOUT_CTRL_OFFSET     0x0070
 #define OMAP3430_CM_CLKOUT_CTRL         OMAP_CM_REGADDR(OMAP3430_CCR_MOD, 0x0070)
diff --git a/arch/arm/mach-omap2/cm44xx.c b/arch/arm/mach-omap2/cm44xx.c
index 535d66e2822c..fe5cc7bae489 100644
--- a/arch/arm/mach-omap2/cm44xx.c
+++ b/arch/arm/mach-omap2/cm44xx.c
@@ -18,35 +18,32 @@
 #include <linux/err.h>
 #include <linux/io.h>
-#include "iomap.h"
-#include "common.h"
 #include "cm.h"
 #include "cm1_44xx.h"
 #include "cm2_44xx.h"
-#include "cm-regbits-44xx.h"
 /* CM1 hardware module low-level functions */
 /* Read a register in CM1 */
 u32 omap4_cm1_read_inst_reg(s16 inst, u16 reg)
 {
-        return __raw_readl(OMAP44XX_CM1_REGADDR(inst, reg));
+        return readl_relaxed(cm_base + inst + reg);
 }
 /* Write into a register in CM1 */
 void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 reg)
 {
-        __raw_writel(val, OMAP44XX_CM1_REGADDR(inst, reg));
+        writel_relaxed(val, cm_base + inst + reg);
 }
 /* Read a register in CM2 */
 u32 omap4_cm2_read_inst_reg(s16 inst, u16 reg)
 {
-        return __raw_readl(OMAP44XX_CM2_REGADDR(inst, reg));
+        return readl_relaxed(cm2_base + inst + reg);
 }
 /* Write into a register in CM2 */
 void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 reg)
 {
-        __raw_writel(val, OMAP44XX_CM2_REGADDR(inst, reg));
+        writel_relaxed(val, cm2_base + inst + reg);
 }
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index 40b3b5a84458..8f6c4710877e 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -14,11 +14,11 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/errno.h>
+#include <linux/bug.h>
 #include "cm2xxx.h"
 #include "cm3xxx.h"
 #include "cm44xx.h"
-#include "common.h"
 /*
 * cm_ll_data: function pointers to SoC-specific implementations of
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index f5c4731b6f06..12aca56942c0 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -21,8 +21,6 @@
 #include <linux/err.h>
 #include <linux/io.h>
-#include "iomap.h"
-#include "common.h"
 #include "clockdomain.h"
 #include "cm.h"
 #include "cm1_44xx.h"
@@ -30,12 +28,18 @@
 #include "cm44xx.h"
 #include "cminst44xx.h"
 #include "cm-regbits-34xx.h"
-#include "cm-regbits-44xx.h"
 #include "prcm44xx.h"
 #include "prm44xx.h"
 #include "prcm_mpu44xx.h"
 #include "prcm-common.h"
+#define OMAP4430_IDLEST_SHIFT           16
+#define OMAP4430_IDLEST_MASK            (0x3 << 16)
+#define OMAP4430_CLKTRCTRL_SHIFT        0
+#define OMAP4430_CLKTRCTRL_MASK         (0x3 << 0)
+#define OMAP4430_MODULEMODE_SHIFT       0
+#define OMAP4430_MODULEMODE_MASK        (0x3 << 0)
 /*
 * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:
 *
@@ -116,7 +120,7 @@ u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx)
        BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
               part == OMAP4430_INVALID_PRCM_PARTITION ||
               !_cm_bases[part]);
-        return __raw_readl(_cm_bases[part] + inst + idx);
+        return readl_relaxed(_cm_bases[part] + inst + idx);
 }
 /* Write into a register in a CM instance */
@@ -125,7 +129,7 @@ void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx)
        BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
               part == OMAP4430_INVALID_PRCM_PARTITION ||
               !_cm_bases[part]);
-        __raw_writel(val, _cm_bases[part] + inst + idx);
+        writel_relaxed(val, _cm_bases[part] + inst + idx);
 }
 /* Read-modify-write a register in CM1. Caller must lock */
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 44bb4d544dcf..751f3549bf6f 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -151,32 +151,32 @@ void __iomem *omap_ctrl_base_get(void)
 u8 omap_ctrl_readb(u16 offset)
 {
-        return __raw_readb(OMAP_CTRL_REGADDR(offset));
+        return readb_relaxed(OMAP_CTRL_REGADDR(offset));
 }
 u16 omap_ctrl_readw(u16 offset)
 {
-        return __raw_readw(OMAP_CTRL_REGADDR(offset));
+        return readw_relaxed(OMAP_CTRL_REGADDR(offset));
 }
 u32 omap_ctrl_readl(u16 offset)
 {
-        return __raw_readl(OMAP_CTRL_REGADDR(offset));
+        return readl_relaxed(OMAP_CTRL_REGADDR(offset));
 }
 void omap_ctrl_writeb(u8 val, u16 offset)
 {
-        __raw_writeb(val, OMAP_CTRL_REGADDR(offset));
+        writeb_relaxed(val, OMAP_CTRL_REGADDR(offset));
 }
 void omap_ctrl_writew(u16 val, u16 offset)
 {
-        __raw_writew(val, OMAP_CTRL_REGADDR(offset));
+        writew_relaxed(val, OMAP_CTRL_REGADDR(offset));
 }
 void omap_ctrl_writel(u32 val, u16 offset)
 {
-        __raw_writel(val, OMAP_CTRL_REGADDR(offset));
+        writel_relaxed(val, OMAP_CTRL_REGADDR(offset));
 }
 /*
@@ -188,12 +188,12 @@ void omap_ctrl_writel(u32 val, u16 offset)
 u32 omap4_ctrl_pad_readl(u16 offset)
 {
-        return __raw_readl(OMAP4_CTRL_PAD_REGADDR(offset));
+        return readl_relaxed(OMAP4_CTRL_PAD_REGADDR(offset));
 }
 void omap4_ctrl_pad_writel(u32 val, u16 offset)
 {
-        __raw_writel(val, OMAP4_CTRL_PAD_REGADDR(offset));
+        writel_relaxed(val, OMAP4_CTRL_PAD_REGADDR(offset));
 }
 #ifdef CONFIG_ARCH_OMAP3
@@ -222,7 +222,7 @@ void omap3_ctrl_write_boot_mode(u8 bootmode)
         *
         * XXX This should use some omap_ctrl_writel()-type function
         */
-        __raw_writel(l, OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD + 4));
+        writel_relaxed(l, OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD + 4));
 }
 #endif
@@ -285,7 +285,7 @@ void omap3_clear_scratchpad_contents(void)
        if (omap2_prm_read_mod_reg(OMAP3430_GR_MOD, OMAP3_PRM_RSTST_OFFSET) &
            OMAP3430_GLOBAL_COLD_RST_MASK) {
                for ( ; offset <= max_offset; offset += 0x4)
-                        __raw_writel(0x0, (v_addr + offset));
+                        writel_relaxed(0x0, (v_addr + offset));
                omap2_prm_set_mod_reg_bits(OMAP3430_GLOBAL_COLD_RST_MASK,
                                           OMAP3430_GR_MOD,
                                           OMAP3_PRM_RSTST_OFFSET);
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index 01fc710c8181..2498ab025fa2 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -14,6 +14,7 @@
 #include <linux/cpuidle.h>
 #include <linux/cpu_pm.h>
 #include <linux/export.h>
+#include <linux/clockchips.h>
 #include <asm/cpuidle.h>
 #include <asm/proc-fns.h>
@@ -83,6 +84,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
 {
        struct idle_statedata *cx = state_ptr + index;
        u32 mpuss_can_lose_context = 0;
+        int cpu_id = smp_processor_id();
        /*
         * CPU0 has to wait and stay ON until CPU1 is OFF state.
@@ -110,6 +112,8 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
        mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) &&
                                 (cx->mpu_logic_state == PWRDM_POWER_OFF);
+        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu_id);
        /*
         * Call idle CPU PM enter notifier chain so that
         * VFP and per CPU interrupt context is saved.
@@ -165,6 +169,8 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
        if (dev->cpu == 0 && mpuss_can_lose_context)
                cpu_cluster_pm_exit();
+        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu_id);
 fail:
        cpuidle_coupled_parallel_barrier(dev, &abort_barrier);
        cpu_done[dev->cpu] = false;
@@ -172,6 +178,16 @@ fail:
        return index;
 }
+/*
+ * For each cpu, setup the broadcast timer because local timers
+ * stops for the states above C1.
+ */
+static void omap_setup_broadcast_timer(void *arg)
+{
+        int cpu = smp_processor_id();
+        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ON, &cpu);
+}
 static struct cpuidle_driver omap4_idle_driver = {
        .name                           = "omap4_idle",
        .owner                          = THIS_MODULE,
@@ -189,8 +205,7 @@ static struct cpuidle_driver omap4_idle_driver = {
                        /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
                        .exit_latency = 328 + 440,
                        .target_residency = 960,
-                        .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED |
+                        .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED,
-                                 CPUIDLE_FLAG_TIMER_STOP,
                        .enter = omap_enter_idle_coupled,
                        .name = "C2",
                        .desc = "CPUx OFF, MPUSS CSWR",
@@ -199,8 +214,7 @@ static struct cpuidle_driver omap4_idle_driver = {
                        /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
                        .exit_latency = 460 + 518,
                        .target_residency = 1100,
-                        .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED |
+                        .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED,
-                                 CPUIDLE_FLAG_TIMER_STOP,
                        .enter = omap_enter_idle_coupled,
                        .name = "C3",
                        .desc = "CPUx OFF, MPUSS OSWR",
@@ -231,5 +245,8 @@ int __init omap4_idle_init(void)
        if (!cpu_clkdm[0] || !cpu_clkdm[1])
                return -ENODEV;
+        /* Configure the broadcast timer on each cpu */
+        on_each_cpu(omap_setup_broadcast_timer, NULL, 1);
        return cpuidle_register(&omap4_idle_driver, cpu_online_mask);
 }
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index 5689c88d986d..a6d2cf1f8d02 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -91,7 +91,7 @@ static inline void dma_write(u32 val, int reg, int lch)
        addr += reg_map[reg].offset;
        addr += reg_map[reg].stride * lch;
-        __raw_writel(val, addr);
+        writel_relaxed(val, addr);
 }
 static inline u32 dma_read(int reg, int lch)
@@ -101,7 +101,7 @@ static inline u32 dma_read(int reg, int lch)
        addr += reg_map[reg].offset;
        addr += reg_map[reg].stride * lch;
-        return __raw_readl(addr);
+        return readl_relaxed(addr);
 }
 static void omap2_clear_dma(int lch)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 9fe8c949305c..852b19a367f0 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -170,12 +170,12 @@ static irqreturn_t gpmc_handle_irq(int irq, void *dev);
 static void gpmc_write_reg(int idx, u32 val)
 {
-        __raw_writel(val, gpmc_base + idx);
+        writel_relaxed(val, gpmc_base + idx);
 }
 static u32 gpmc_read_reg(int idx)
 {
-        return __raw_readl(gpmc_base + idx);
+        return readl_relaxed(gpmc_base + idx);
 }
 void gpmc_cs_write_reg(int cs, int idx, u32 val)
@@ -183,7 +183,7 @@ void gpmc_cs_write_reg(int cs, int idx, u32 val)
        void __iomem *reg_addr;
        reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx;
-        __raw_writel(val, reg_addr);
+        writel_relaxed(val, reg_addr);
 }
 static u32 gpmc_cs_read_reg(int cs, int idx)
@@ -191,7 +191,7 @@ static u32 gpmc_cs_read_reg(int cs, int idx)
        void __iomem *reg_addr;
        reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx;
-        return __raw_readl(reg_addr);
+        return readl_relaxed(reg_addr);
 }
 /* TODO: Add support for gpmc_fck to clock framework and use it */
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 157412e4273a..43969da5d50b 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -94,7 +94,7 @@ EXPORT_SYMBOL(omap_type);
 #define OMAP_TAP_DIE_ID_44XX_2  0x020c
 #define OMAP_TAP_DIE_ID_44XX_3  0x0210
-#define read_tap_reg(reg)       __raw_readl(tap_base  + (reg))
+#define read_tap_reg(reg)       readl_relaxed(tap_base  + (reg))
 struct omap_id {
        u16     hawkeye;        /* Silicon type (Hawkeye id) */
@@ -628,6 +628,41 @@ void __init omap5xxx_check_revision(void)
        pr_info("%s %s\n", soc_name, soc_rev);
 }
+void __init dra7xxx_check_revision(void)
+{
+        u32 idcode;
+        u16 hawkeye;
+        u8 rev;
+        idcode = read_tap_reg(OMAP_TAP_IDCODE);
+        hawkeye = (idcode >> 12) & 0xffff;
+        rev = (idcode >> 28) & 0xff;
+        switch (hawkeye) {
+        case 0xb990:
+                switch (rev) {
+                case 0:
+                        omap_revision = DRA752_REV_ES1_0;
+                        break;
+                case 1:
+                default:
+                        omap_revision = DRA752_REV_ES1_1;
+                }
+                break;
+        default:
+                /* Unknown default to latest silicon rev as default*/
+                pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%d)\n",
+                        __func__, idcode, hawkeye, rev);
+                omap_revision = DRA752_REV_ES1_1;
+        }
+        sprintf(soc_name, "DRA%03x", omap_rev() >> 16);
+        sprintf(soc_rev, "ES%d.%d", (omap_rev() >> 12) & 0xf,
+                (omap_rev() >> 8) & 0xf);
+        pr_info("%s %s\n", soc_name, soc_rev);
+}
 /*
 * Set up things for map_io and processor detection later on. Gets called
 * pretty much first thing from board init. For multi-omap, this gets
@@ -669,6 +704,8 @@ static const char * __init omap_get_family(void)
                return kasprintf(GFP_KERNEL, "OMAP5");
        else if (soc_is_am43xx())
                return kasprintf(GFP_KERNEL, "AM43xx");
+        else if (soc_is_dra7xx())
+                return kasprintf(GFP_KERNEL, "DRA7");
        else
                return kasprintf(GFP_KERNEL, "Unknown");
 }
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index f14f9ac2dca1..4ec3b4a93843 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -693,6 +693,7 @@ void __init dra7xx_init_early(void)
        omap_prm_base_init();
        omap_cm_base_init();
        omap44xx_prm_init();
+        dra7xxx_check_revision();
        dra7xx_powerdomains_init();
        dra7xx_clockdomains_init();
        dra7xx_hwmod_init();
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 6037a9a01ed5..35b8590c322e 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -83,12 +83,12 @@ struct omap3_intc_regs {
 static void intc_bank_write_reg(u32 val, struct omap_irq_bank *bank, u16 reg)
 {
-        __raw_writel(val, bank->base_reg + reg);
+        writel_relaxed(val, bank->base_reg + reg);
 }
 static u32 intc_bank_read_reg(struct omap_irq_bank *bank, u16 reg)
 {
-        return __raw_readl(bank->base_reg + reg);
+        return readl_relaxed(bank->base_reg + reg);
 }
 /* XXX: FIQ and additional INTC support (only MPU at the moment) */
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 48094b58c88f..fd88edeb027f 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -70,18 +70,18 @@ struct omap_mux_partition *omap_mux_get(const char *name)
 u16 omap_mux_read(struct omap_mux_partition *partition, u16 reg)
 {
        if (partition->flags & OMAP_MUX_REG_8BIT)
-                return __raw_readb(partition->base + reg);
+                return readb_relaxed(partition->base + reg);
        else
-                return __raw_readw(partition->base + reg);
+                return readw_relaxed(partition->base + reg);
 }
 void omap_mux_write(struct omap_mux_partition *partition, u16 val,
                           u16 reg)
 {
        if (partition->flags & OMAP_MUX_REG_8BIT)
-                __raw_writeb(val, partition->base + reg);
+                writeb_relaxed(val, partition->base + reg);
        else
-                __raw_writew(val, partition->base + reg);
+                writew_relaxed(val, partition->base + reg);
 }
 void omap_mux_write_array(struct omap_mux_partition *partition,
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index 75e92952c18e..4993d4bfe9b2 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -1,7 +1,7 @@
 /*
 * Secondary CPU startup routine source file.
 *
- * Copyright (C) 2009 Texas Instruments, Inc.
+ * Copyright (C) 2009-2014 Texas Instruments, Inc.
 *
 * Author:
 *      Santosh Shilimkar <santosh.shilimkar@ti.com>
@@ -28,7 +28,7 @@
 * code.  This routine also provides a holding flag into which
 * secondary core is held until we're ready for it to initialise.
 * The primary core will update this flag using a hardware
-+ * register AuxCoreBoot0.
+ * register AuxCoreBoot0.
 */
 ENTRY(omap5_secondary_startup)
 wait:   ldr     r2, =AUX_CORE_BOOT0_PA  @ read from AuxCoreBoot0
@@ -39,7 +39,7 @@ wait:	ldr	r2, =AUX_CORE_BOOT0_PA	@ read from AuxCoreBoot0
        cmp     r0, r4
        bne     wait
        b       secondary_startup
-END(omap5_secondary_startup)
+ENDPROC(omap5_secondary_startup)
 /*
 * OMAP4 specific entry point for secondary CPU to jump from ROM
 * code.  This routine also provides a holding flag into which
diff --git a/arch/arm/mach-omap2/omap-hotplug.c b/arch/arm/mach-omap2/omap-hotplug.c
index 458f72f9dc8f..971791fe9a3f 100644
--- a/arch/arm/mach-omap2/omap-hotplug.c
+++ b/arch/arm/mach-omap2/omap-hotplug.c
@@ -39,7 +39,7 @@ void __ref omap4_cpu_die(unsigned int cpu)
                if (omap_modify_auxcoreboot0(0x0, 0x200) != 0x0)
                        pr_err("Secure clear status failed\n");
        } else {
-                __raw_writel(0, base + OMAP_AUX_CORE_BOOT_0);
+                writel_relaxed(0, base + OMAP_AUX_CORE_BOOT_0);
        }
@@ -53,7 +53,7 @@ void __ref omap4_cpu_die(unsigned int cpu)
                        boot_cpu = omap_read_auxcoreboot0();
                else
                        boot_cpu =
-                                __raw_readl(base + OMAP_AUX_CORE_BOOT_0) >> 5;
+                                readl_relaxed(base + OMAP_AUX_CORE_BOOT_0) >> 5;
                if (boot_cpu == smp_processor_id()) {
                        /*
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 667915d236f3..eb76e47091ad 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -116,7 +116,7 @@ static inline void set_cpu_wakeup_addr(unsigned int cpu_id, u32 addr)
 {
        struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id);
-        __raw_writel(addr, pm_info->wkup_sar_addr);
+        writel_relaxed(addr, pm_info->wkup_sar_addr);
 }
 /*
@@ -141,7 +141,7 @@ static void scu_pwrst_prepare(unsigned int cpu_id, unsigned int cpu_state)
                break;
        }
-        __raw_writel(scu_pwr_st, pm_info->scu_sar_addr);
+        writel_relaxed(scu_pwr_st, pm_info->scu_sar_addr);
 }
 /* Helper functions for MPUSS OSWR */
@@ -179,7 +179,7 @@ static void l2x0_pwrst_prepare(unsigned int cpu_id, unsigned int save_state)
 {
        struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id);
-        __raw_writel(save_state, pm_info->l2x0_sar_addr);
+        writel_relaxed(save_state, pm_info->l2x0_sar_addr);
 }
 /*
@@ -192,10 +192,10 @@ static void save_l2x0_context(void)
        u32 val;
        void __iomem *l2x0_base = omap4_get_l2cache_base();
        if (l2x0_base) {
-                val = __raw_readl(l2x0_base + L2X0_AUX_CTRL);
+                val = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
-                __raw_writel(val, sar_base + L2X0_AUXCTRL_OFFSET);
+                writel_relaxed(val, sar_base + L2X0_AUXCTRL_OFFSET);
-                val = __raw_readl(l2x0_base + L2X0_PREFETCH_CTRL);
+                val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL);
-                __raw_writel(val, sar_base + L2X0_PREFETCH_CTRL_OFFSET);
+                writel_relaxed(val, sar_base + L2X0_PREFETCH_CTRL_OFFSET);
        }
 }
 #else
@@ -386,9 +386,9 @@ int __init omap4_mpuss_init(void)
        /* Save device type on scratchpad for low level code to use */
        if (omap_type() != OMAP2_DEVICE_TYPE_GP)
-                __raw_writel(1, sar_base + OMAP_TYPE_OFFSET);
+                writel_relaxed(1, sar_base + OMAP_TYPE_OFFSET);
        else
-                __raw_writel(0, sar_base + OMAP_TYPE_OFFSET);
+                writel_relaxed(0, sar_base + OMAP_TYPE_OFFSET);
        save_l2x0_context();
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 17550aa39d0f..256e84ef0f67 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -99,7 +99,7 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
        if (omap_secure_apis_support())
                omap_modify_auxcoreboot0(0x200, 0xfffffdff);
        else
-                __raw_writel(0x20, base + OMAP_AUX_CORE_BOOT_0);
+                writel_relaxed(0x20, base + OMAP_AUX_CORE_BOOT_0);
        if (!cpu1_clkdm && !cpu1_pwrdm) {
                cpu1_clkdm = clkdm_lookup("mpu1_clkdm");
@@ -227,8 +227,8 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
        if (omap_secure_apis_support())
                omap_auxcoreboot_addr(virt_to_phys(startup_addr));
        else
-                __raw_writel(virt_to_phys(omap5_secondary_startup),
+                writel_relaxed(virt_to_phys(omap5_secondary_startup),
-                                                base + OMAP_AUX_CORE_BOOT_1);
+                               base + OMAP_AUX_CORE_BOOT_1);
 }
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index 693fe486e917..37843a7d3639 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -60,19 +60,19 @@ static unsigned int omap_secure_apis;
 */
 static inline u32 wakeupgen_readl(u8 idx, u32 cpu)
 {
-        return __raw_readl(wakeupgen_base + OMAP_WKG_ENB_A_0 +
+        return readl_relaxed(wakeupgen_base + OMAP_WKG_ENB_A_0 +
                                (cpu * CPU_ENA_OFFSET) + (idx * 4));
 }
 static inline void wakeupgen_writel(u32 val, u8 idx, u32 cpu)
 {
-        __raw_writel(val, wakeupgen_base + OMAP_WKG_ENB_A_0 +
+        writel_relaxed(val, wakeupgen_base + OMAP_WKG_ENB_A_0 +
                                (cpu * CPU_ENA_OFFSET) + (idx * 4));
 }
 static inline void sar_writel(u32 val, u32 offset, u8 idx)
 {
-        __raw_writel(val, sar_base + offset + (idx * 4));
+        writel_relaxed(val, sar_base + offset + (idx * 4));
 }
 static inline int _wakeupgen_get_irq_info(u32 irq, u32 *bit_posn, u8 *reg_index)
@@ -231,21 +231,21 @@ static inline void omap4_irq_save_context(void)
        }
        /* Save AuxBoot* registers */
-        val = __raw_readl(wakeupgen_base + OMAP_AUX_CORE_BOOT_0);
+        val = readl_relaxed(wakeupgen_base + OMAP_AUX_CORE_BOOT_0);
-        __raw_writel(val, sar_base + AUXCOREBOOT0_OFFSET);
+        writel_relaxed(val, sar_base + AUXCOREBOOT0_OFFSET);
-        val = __raw_readl(wakeupgen_base + OMAP_AUX_CORE_BOOT_1);
+        val = readl_relaxed(wakeupgen_base + OMAP_AUX_CORE_BOOT_1);
-        __raw_writel(val, sar_base + AUXCOREBOOT1_OFFSET);
+        writel_relaxed(val, sar_base + AUXCOREBOOT1_OFFSET);
        /* Save SyncReq generation logic */
-        val = __raw_readl(wakeupgen_base + OMAP_PTMSYNCREQ_MASK);
+        val = readl_relaxed(wakeupgen_base + OMAP_PTMSYNCREQ_MASK);
-        __raw_writel(val, sar_base + PTMSYNCREQ_MASK_OFFSET);
+        writel_relaxed(val, sar_base + PTMSYNCREQ_MASK_OFFSET);
-        val = __raw_readl(wakeupgen_base + OMAP_PTMSYNCREQ_EN);
+        val = readl_relaxed(wakeupgen_base + OMAP_PTMSYNCREQ_EN);
-        __raw_writel(val, sar_base + PTMSYNCREQ_EN_OFFSET);
+        writel_relaxed(val, sar_base + PTMSYNCREQ_EN_OFFSET);
        /* Set the Backup Bit Mask status */
-        val = __raw_readl(sar_base + SAR_BACKUP_STATUS_OFFSET);
+        val = readl_relaxed(sar_base + SAR_BACKUP_STATUS_OFFSET);
        val |= SAR_BACKUP_STATUS_WAKEUPGEN;
-        __raw_writel(val, sar_base + SAR_BACKUP_STATUS_OFFSET);
+        writel_relaxed(val, sar_base + SAR_BACKUP_STATUS_OFFSET);
 }
@@ -264,15 +264,15 @@ static inline void omap5_irq_save_context(void)
        }
        /* Save AuxBoot* registers */
-        val = __raw_readl(wakeupgen_base + OMAP_AUX_CORE_BOOT_0);
+        val = readl_relaxed(wakeupgen_base + OMAP_AUX_CORE_BOOT_0);
-        __raw_writel(val, sar_base + OMAP5_AUXCOREBOOT0_OFFSET);
+        writel_relaxed(val, sar_base + OMAP5_AUXCOREBOOT0_OFFSET);
-        val = __raw_readl(wakeupgen_base + OMAP_AUX_CORE_BOOT_0);
+        val = readl_relaxed(wakeupgen_base + OMAP_AUX_CORE_BOOT_0);
-        __raw_writel(val, sar_base + OMAP5_AUXCOREBOOT1_OFFSET);
+        writel_relaxed(val, sar_base + OMAP5_AUXCOREBOOT1_OFFSET);
        /* Set the Backup Bit Mask status */
-        val = __raw_readl(sar_base + OMAP5_SAR_BACKUP_STATUS_OFFSET);
+        val = readl_relaxed(sar_base + OMAP5_SAR_BACKUP_STATUS_OFFSET);
        val |= SAR_BACKUP_STATUS_WAKEUPGEN;
-        __raw_writel(val, sar_base + OMAP5_SAR_BACKUP_STATUS_OFFSET);
+        writel_relaxed(val, sar_base + OMAP5_SAR_BACKUP_STATUS_OFFSET);
 }
@@ -306,9 +306,9 @@ static void irq_sar_clear(void)
        if (soc_is_omap54xx())
                offset = OMAP5_SAR_BACKUP_STATUS_OFFSET;
-        val = __raw_readl(sar_base + offset);
+        val = readl_relaxed(sar_base + offset);
        val &= ~SAR_BACKUP_STATUS_WAKEUPGEN;
-        __raw_writel(val, sar_base + offset);
+        writel_relaxed(val, sar_base + offset);
 }
 /*
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 95e171a055f3..99b0154493a4 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -125,25 +125,25 @@ void __init gic_init_irq(void)
 void gic_dist_disable(void)
 {
        if (gic_dist_base_addr)
-                __raw_writel(0x0, gic_dist_base_addr + GIC_DIST_CTRL);
+                writel_relaxed(0x0, gic_dist_base_addr + GIC_DIST_CTRL);
 }
 void gic_dist_enable(void)
 {
        if (gic_dist_base_addr)
-                __raw_writel(0x1, gic_dist_base_addr + GIC_DIST_CTRL);
+                writel_relaxed(0x1, gic_dist_base_addr + GIC_DIST_CTRL);
 }
 bool gic_dist_disabled(void)
 {
-        return !(__raw_readl(gic_dist_base_addr + GIC_DIST_CTRL) & 0x1);
+        return !(readl_relaxed(gic_dist_base_addr + GIC_DIST_CTRL) & 0x1);
 }
 void gic_timer_retrigger(void)
 {
-        u32 twd_int = __raw_readl(twd_base + TWD_TIMER_INTSTAT);
+        u32 twd_int = readl_relaxed(twd_base + TWD_TIMER_INTSTAT);
-        u32 gic_int = __raw_readl(gic_dist_base_addr + GIC_DIST_PENDING_SET);
+        u32 gic_int = readl_relaxed(gic_dist_base_addr + GIC_DIST_PENDING_SET);
-        u32 twd_ctrl = __raw_readl(twd_base + TWD_TIMER_CONTROL);
+        u32 twd_ctrl = readl_relaxed(twd_base + TWD_TIMER_CONTROL);
        if (twd_int && !(gic_int & BIT(IRQ_LOCALTIMER))) {
                /*
@@ -151,11 +151,11 @@ void gic_timer_retrigger(void)
                 * disabled.  Ack the pending interrupt, and retrigger it.
                 */
                pr_warn("%s: lost localtimer interrupt\n", __func__);
-                __raw_writel(1, twd_base + TWD_TIMER_INTSTAT);
+                writel_relaxed(1, twd_base + TWD_TIMER_INTSTAT);
                if (!(twd_ctrl & TWD_TIMER_CONTROL_PERIODIC)) {
-                        __raw_writel(1, twd_base + TWD_TIMER_COUNTER);
+                        writel_relaxed(1, twd_base + TWD_TIMER_COUNTER);
                        twd_ctrl |= TWD_TIMER_CONTROL_ENABLE;
-                        __raw_writel(twd_ctrl, twd_base + TWD_TIMER_CONTROL);
+                        writel_relaxed(twd_ctrl, twd_base + TWD_TIMER_CONTROL);
                }
        }
 }
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 66c60fe1104c..f7bb435bb543 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -72,7 +72,7 @@
 *            | (../mach-omap2/omap_hwmod*)   |
 *            +-------------------------------+
 *            | OMAP clock/PRCM/register fns  |
- *            | (__raw_{read,write}l, clk*)   |
+ *            | ({read,write}l_relaxed, clk*) |
 *            +-------------------------------+
 *
 * Device drivers should not contain any OMAP-specific code or data in
@@ -3230,17 +3230,17 @@ static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
 {
        if (oh->flags & HWMOD_16BIT_REG)
-                return __raw_readw(oh->_mpu_rt_va + reg_offs);
+                return readw_relaxed(oh->_mpu_rt_va + reg_offs);
        else
-                return __raw_readl(oh->_mpu_rt_va + reg_offs);
+                return readl_relaxed(oh->_mpu_rt_va + reg_offs);
 }
 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
 {
        if (oh->flags & HWMOD_16BIT_REG)
-                __raw_writew(v, oh->_mpu_rt_va + reg_offs);
+                writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
        else
-                __raw_writel(v, oh->_mpu_rt_va + reg_offs);
+                writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
 }
 /**
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
index 0f178623e7da..a579b89ce9b7 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
@@ -24,6 +24,7 @@
 #include "prm33xx.h"
 #include "omap_hwmod_33xx_43xx_common_data.h"
 #include "prcm43xx.h"
+#include "common.h"
 #define CLKCTRL(oh, clkctrl) ((oh).prcm.omap4.clkctrl_offs = (clkctrl))
 #define RSTCTRL(oh, rstctrl) ((oh).prcm.omap4.rstctrl_offs = (rstctrl))
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 1219280bb976..41e54f759934 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -3635,15 +3635,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = {
        .master         = &omap44xx_l4_abe_hwmod,
        .slave          = &omap44xx_dmic_hwmod,
        .clk            = "ocp_abe_iclk",
-        .user           = OCP_USER_MPU,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-/* l4_abe -> dmic (dma) */
-static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic_dma = {
-        .master         = &omap44xx_l4_abe_hwmod,
-        .slave          = &omap44xx_dmic_hwmod,
-        .clk            = "ocp_abe_iclk",
-        .user           = OCP_USER_SDMA,
 };
 /* dsp -> iva */
@@ -4209,15 +4201,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = {
        .master         = &omap44xx_l4_abe_hwmod,
        .slave          = &omap44xx_mcbsp1_hwmod,
        .clk            = "ocp_abe_iclk",
-        .user           = OCP_USER_MPU,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-/* l4_abe -> mcbsp1 (dma) */
-static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1_dma = {
-        .master         = &omap44xx_l4_abe_hwmod,
-        .slave          = &omap44xx_mcbsp1_hwmod,
-        .clk            = "ocp_abe_iclk",
-        .user           = OCP_USER_SDMA,
 };
 /* l4_abe -> mcbsp2 */
@@ -4225,15 +4209,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = {
        .master         = &omap44xx_l4_abe_hwmod,
        .slave          = &omap44xx_mcbsp2_hwmod,
        .clk            = "ocp_abe_iclk",
-        .user           = OCP_USER_MPU,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-/* l4_abe -> mcbsp2 (dma) */
-static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2_dma = {
-        .master         = &omap44xx_l4_abe_hwmod,
-        .slave          = &omap44xx_mcbsp2_hwmod,
-        .clk            = "ocp_abe_iclk",
-        .user           = OCP_USER_SDMA,
 };
 /* l4_abe -> mcbsp3 */
@@ -4241,15 +4217,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = {
        .master         = &omap44xx_l4_abe_hwmod,
        .slave          = &omap44xx_mcbsp3_hwmod,
        .clk            = "ocp_abe_iclk",
-        .user           = OCP_USER_MPU,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-/* l4_abe -> mcbsp3 (dma) */
-static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3_dma = {
-        .master         = &omap44xx_l4_abe_hwmod,
-        .slave          = &omap44xx_mcbsp3_hwmod,
-        .clk            = "ocp_abe_iclk",
-        .user           = OCP_USER_SDMA,
 };
 /* l4_per -> mcbsp4 */
@@ -4265,15 +4233,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm = {
        .master         = &omap44xx_l4_abe_hwmod,
        .slave          = &omap44xx_mcpdm_hwmod,
        .clk            = "ocp_abe_iclk",
-        .user           = OCP_USER_MPU,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-/* l4_abe -> mcpdm (dma) */
-static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm_dma = {
-        .master         = &omap44xx_l4_abe_hwmod,
-        .slave          = &omap44xx_mcpdm_hwmod,
-        .clk            = "ocp_abe_iclk",
-        .user           = OCP_USER_SDMA,
 };
 /* l4_per -> mcspi1 */
@@ -4575,15 +4535,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5 = {
        .master         = &omap44xx_l4_abe_hwmod,
        .slave          = &omap44xx_timer5_hwmod,
        .clk            = "ocp_abe_iclk",
-        .user           = OCP_USER_MPU,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-/* l4_abe -> timer5 (dma) */
-static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5_dma = {
-        .master         = &omap44xx_l4_abe_hwmod,
-        .slave          = &omap44xx_timer5_hwmod,
-        .clk            = "ocp_abe_iclk",
-        .user           = OCP_USER_SDMA,
 };
 /* l4_abe -> timer6 */
@@ -4591,15 +4543,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6 = {
        .master         = &omap44xx_l4_abe_hwmod,
        .slave          = &omap44xx_timer6_hwmod,
        .clk            = "ocp_abe_iclk",
-        .user           = OCP_USER_MPU,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-/* l4_abe -> timer6 (dma) */
-static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6_dma = {
-        .master         = &omap44xx_l4_abe_hwmod,
-        .slave          = &omap44xx_timer6_hwmod,
-        .clk            = "ocp_abe_iclk",
-        .user           = OCP_USER_SDMA,
 };
 /* l4_abe -> timer7 */
@@ -4607,15 +4551,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7 = {
        .master         = &omap44xx_l4_abe_hwmod,
        .slave          = &omap44xx_timer7_hwmod,
        .clk            = "ocp_abe_iclk",
-        .user           = OCP_USER_MPU,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-/* l4_abe -> timer7 (dma) */
-static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7_dma = {
-        .master         = &omap44xx_l4_abe_hwmod,
-        .slave          = &omap44xx_timer7_hwmod,
-        .clk            = "ocp_abe_iclk",
-        .user           = OCP_USER_SDMA,
 };
 /* l4_abe -> timer8 */
@@ -4623,15 +4559,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8 = {
        .master         = &omap44xx_l4_abe_hwmod,
        .slave          = &omap44xx_timer8_hwmod,
        .clk            = "ocp_abe_iclk",
-        .user           = OCP_USER_MPU,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-/* l4_abe -> timer8 (dma) */
-static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8_dma = {
-        .master         = &omap44xx_l4_abe_hwmod,
-        .slave          = &omap44xx_timer8_hwmod,
-        .clk            = "ocp_abe_iclk",
-        .user           = OCP_USER_SDMA,
 };
 /* l4_per -> timer9 */
@@ -4831,7 +4759,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
        &omap44xx_l3_instr__debugss,
        &omap44xx_l4_cfg__dma_system,
        &omap44xx_l4_abe__dmic,
-        &omap44xx_l4_abe__dmic_dma,
        &omap44xx_dsp__iva,
        /* &omap44xx_dsp__sl2if, */
        &omap44xx_l4_cfg__dsp,
@@ -4874,14 +4801,10 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
        &omap44xx_l4_abe__mcasp,
        &omap44xx_l4_abe__mcasp_dma,
        &omap44xx_l4_abe__mcbsp1,
-        &omap44xx_l4_abe__mcbsp1_dma,
        &omap44xx_l4_abe__mcbsp2,
-        &omap44xx_l4_abe__mcbsp2_dma,
        &omap44xx_l4_abe__mcbsp3,
-        &omap44xx_l4_abe__mcbsp3_dma,
        &omap44xx_l4_per__mcbsp4,
        &omap44xx_l4_abe__mcpdm,
-        &omap44xx_l4_abe__mcpdm_dma,
        &omap44xx_l4_per__mcspi1,
        &omap44xx_l4_per__mcspi2,
        &omap44xx_l4_per__mcspi3,
@@ -4913,13 +4836,9 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
        &omap44xx_l4_per__timer3,
        &omap44xx_l4_per__timer4,
        &omap44xx_l4_abe__timer5,
-        &omap44xx_l4_abe__timer5_dma,
        &omap44xx_l4_abe__timer6,
-        &omap44xx_l4_abe__timer6_dma,
        &omap44xx_l4_abe__timer7,
-        &omap44xx_l4_abe__timer7_dma,
        &omap44xx_l4_abe__timer8,
-        &omap44xx_l4_abe__timer8_dma,
        &omap44xx_l4_per__timer9,
        &omap44xx_l4_per__timer10,
        &omap44xx_l4_per__timer11,
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index 892317294fdc..290213f2cbe3 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -334,6 +334,235 @@ static struct omap_hwmod omap54xx_dmic_hwmod = {
 };
 /*
+ * 'dss' class
+ * display sub-system
+ */
+static struct omap_hwmod_class_sysconfig omap54xx_dss_sysc = {
+        .rev_offs       = 0x0000,
+        .syss_offs      = 0x0014,
+        .sysc_flags     = SYSS_HAS_RESET_STATUS,
+};
+static struct omap_hwmod_class omap54xx_dss_hwmod_class = {
+        .name   = "dss",
+        .sysc   = &omap54xx_dss_sysc,
+        .reset  = omap_dss_reset,
+};
+/* dss */
+static struct omap_hwmod_opt_clk dss_opt_clks[] = {
+        { .role = "32khz_clk", .clk = "dss_32khz_clk" },
+        { .role = "sys_clk", .clk = "dss_sys_clk" },
+        { .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
+};
+static struct omap_hwmod omap54xx_dss_hwmod = {
+        .name           = "dss_core",
+        .class          = &omap54xx_dss_hwmod_class,
+        .clkdm_name     = "dss_clkdm",
+        .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
+        .main_clk       = "dss_dss_clk",
+        .prcm = {
+                .omap4 = {
+                        .clkctrl_offs = OMAP54XX_CM_DSS_DSS_CLKCTRL_OFFSET,
+                        .context_offs = OMAP54XX_RM_DSS_DSS_CONTEXT_OFFSET,
+                        .modulemode   = MODULEMODE_SWCTRL,
+                },
+        },
+        .opt_clks       = dss_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_opt_clks),
+};
+/*
+ * 'dispc' class
+ * display controller
+ */
+static struct omap_hwmod_class_sysconfig omap54xx_dispc_sysc = {
+        .rev_offs       = 0x0000,
+        .sysc_offs      = 0x0010,
+        .syss_offs      = 0x0014,
+        .sysc_flags     = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
+                           SYSC_HAS_ENAWAKEUP | SYSC_HAS_MIDLEMODE |
+                           SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
+                           SYSS_HAS_RESET_STATUS),
+        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+                           MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
+        .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+static struct omap_hwmod_class omap54xx_dispc_hwmod_class = {
+        .name   = "dispc",
+        .sysc   = &omap54xx_dispc_sysc,
+};
+/* dss_dispc */
+static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = {
+        { .role = "sys_clk", .clk = "dss_sys_clk" },
+};
+/* dss_dispc dev_attr */
+static struct omap_dss_dispc_dev_attr dss_dispc_dev_attr = {
+        .has_framedonetv_irq    = 1,
+        .manager_count          = 4,
+};
+static struct omap_hwmod omap54xx_dss_dispc_hwmod = {
+        .name           = "dss_dispc",
+        .class          = &omap54xx_dispc_hwmod_class,
+        .clkdm_name     = "dss_clkdm",
+        .main_clk       = "dss_dss_clk",
+        .prcm = {
+                .omap4 = {
+                        .clkctrl_offs = OMAP54XX_CM_DSS_DSS_CLKCTRL_OFFSET,
+                        .flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT,
+                },
+        },
+        .opt_clks       = dss_dispc_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_dispc_opt_clks),
+        .dev_attr       = &dss_dispc_dev_attr,
+};
+/*
+ * 'dsi1' class
+ * display serial interface controller
+ */
+static struct omap_hwmod_class_sysconfig omap54xx_dsi1_sysc = {
+        .rev_offs       = 0x0000,
+        .sysc_offs      = 0x0010,
+        .syss_offs      = 0x0014,
+        .sysc_flags     = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
+                           SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
+                           SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
+        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+        .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+static struct omap_hwmod_class omap54xx_dsi1_hwmod_class = {
+        .name   = "dsi1",
+        .sysc   = &omap54xx_dsi1_sysc,
+};
+/* dss_dsi1_a */
+static struct omap_hwmod_opt_clk dss_dsi1_a_opt_clks[] = {
+        { .role = "sys_clk", .clk = "dss_sys_clk" },
+};
+static struct omap_hwmod omap54xx_dss_dsi1_a_hwmod = {
+        .name           = "dss_dsi1",
+        .class          = &omap54xx_dsi1_hwmod_class,
+        .clkdm_name     = "dss_clkdm",
+        .main_clk       = "dss_dss_clk",
+        .prcm = {
+                .omap4 = {
+                        .clkctrl_offs = OMAP54XX_CM_DSS_DSS_CLKCTRL_OFFSET,
+                        .flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT,
+                },
+        },
+        .opt_clks       = dss_dsi1_a_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_dsi1_a_opt_clks),
+};
+/* dss_dsi1_c */
+static struct omap_hwmod_opt_clk dss_dsi1_c_opt_clks[] = {
+        { .role = "sys_clk", .clk = "dss_sys_clk" },
+};
+static struct omap_hwmod omap54xx_dss_dsi1_c_hwmod = {
+        .name           = "dss_dsi2",
+        .class          = &omap54xx_dsi1_hwmod_class,
+        .clkdm_name     = "dss_clkdm",
+        .main_clk       = "dss_dss_clk",
+        .prcm = {
+                .omap4 = {
+                        .clkctrl_offs = OMAP54XX_CM_DSS_DSS_CLKCTRL_OFFSET,
+                        .flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT,
+                },
+        },
+        .opt_clks       = dss_dsi1_c_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_dsi1_c_opt_clks),
+};
+/*
+ * 'hdmi' class
+ * hdmi controller
+ */
+static struct omap_hwmod_class_sysconfig omap54xx_hdmi_sysc = {
+        .rev_offs       = 0x0000,
+        .sysc_offs      = 0x0010,
+        .sysc_flags     = (SYSC_HAS_RESET_STATUS | SYSC_HAS_SIDLEMODE |
+                           SYSC_HAS_SOFTRESET),
+        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+                           SIDLE_SMART_WKUP),
+        .sysc_fields    = &omap_hwmod_sysc_type2,
+};
+static struct omap_hwmod_class omap54xx_hdmi_hwmod_class = {
+        .name   = "hdmi",
+        .sysc   = &omap54xx_hdmi_sysc,
+};
+static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = {
+        { .role = "sys_clk", .clk = "dss_sys_clk" },
+};
+static struct omap_hwmod omap54xx_dss_hdmi_hwmod = {
+        .name           = "dss_hdmi",
+        .class          = &omap54xx_hdmi_hwmod_class,
+        .clkdm_name     = "dss_clkdm",
+        .main_clk       = "dss_48mhz_clk",
+        .prcm = {
+                .omap4 = {
+                        .clkctrl_offs = OMAP54XX_CM_DSS_DSS_CLKCTRL_OFFSET,
+                        .flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT,
+                },
+        },
+        .opt_clks       = dss_hdmi_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_hdmi_opt_clks),
+};
+/*
+ * 'rfbi' class
+ * remote frame buffer interface
+ */
+static struct omap_hwmod_class_sysconfig omap54xx_rfbi_sysc = {
+        .rev_offs       = 0x0000,
+        .sysc_offs      = 0x0010,
+        .syss_offs      = 0x0014,
+        .sysc_flags     = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |
+                           SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
+        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+        .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+static struct omap_hwmod_class omap54xx_rfbi_hwmod_class = {
+        .name   = "rfbi",
+        .sysc   = &omap54xx_rfbi_sysc,
+};
+/* dss_rfbi */
+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
+        { .role = "ick", .clk = "l3_iclk_div" },
+};
+static struct omap_hwmod omap54xx_dss_rfbi_hwmod = {
+        .name           = "dss_rfbi",
+        .class          = &omap54xx_rfbi_hwmod_class,
+        .clkdm_name     = "dss_clkdm",
+        .prcm = {
+                .omap4 = {
+                        .clkctrl_offs = OMAP54XX_CM_DSS_DSS_CLKCTRL_OFFSET,
+                        .flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT,
+                },
+        },
+        .opt_clks       = dss_rfbi_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_rfbi_opt_clks),
+};
+/*
 * 'emif' class
 * external memory interface no1 (wrapper)
 */
@@ -895,7 +1124,7 @@ static struct omap_hwmod omap54xx_mcpdm_hwmod = {
         * current exception.
         */
-        .flags          = HWMOD_EXT_OPT_MAIN_CLK,
+        .flags          = HWMOD_EXT_OPT_MAIN_CLK | HWMOD_SWSUP_SIDLE,
        .main_clk       = "pad_clks_ck",
        .prcm = {
                .omap4 = {
@@ -1974,6 +2203,54 @@ static struct omap_hwmod_ocp_if omap54xx_l4_abe__dmic = {
        .user           = OCP_USER_MPU,
 };
+/* l3_main_2 -> dss */
+static struct omap_hwmod_ocp_if omap54xx_l3_main_2__dss = {
+        .master         = &omap54xx_l3_main_2_hwmod,
+        .slave          = &omap54xx_dss_hwmod,
+        .clk            = "l3_iclk_div",
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+/* l3_main_2 -> dss_dispc */
+static struct omap_hwmod_ocp_if omap54xx_l3_main_2__dss_dispc = {
+        .master         = &omap54xx_l3_main_2_hwmod,
+        .slave          = &omap54xx_dss_dispc_hwmod,
+        .clk            = "l3_iclk_div",
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+/* l3_main_2 -> dss_dsi1_a */
+static struct omap_hwmod_ocp_if omap54xx_l3_main_2__dss_dsi1_a = {
+        .master         = &omap54xx_l3_main_2_hwmod,
+        .slave          = &omap54xx_dss_dsi1_a_hwmod,
+        .clk            = "l3_iclk_div",
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+/* l3_main_2 -> dss_dsi1_c */
+static struct omap_hwmod_ocp_if omap54xx_l3_main_2__dss_dsi1_c = {
+        .master         = &omap54xx_l3_main_2_hwmod,
+        .slave          = &omap54xx_dss_dsi1_c_hwmod,
+        .clk            = "l3_iclk_div",
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+/* l3_main_2 -> dss_hdmi */
+static struct omap_hwmod_ocp_if omap54xx_l3_main_2__dss_hdmi = {
+        .master         = &omap54xx_l3_main_2_hwmod,
+        .slave          = &omap54xx_dss_hdmi_hwmod,
+        .clk            = "l3_iclk_div",
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+/* l3_main_2 -> dss_rfbi */
+static struct omap_hwmod_ocp_if omap54xx_l3_main_2__dss_rfbi = {
+        .master         = &omap54xx_l3_main_2_hwmod,
+        .slave          = &omap54xx_dss_rfbi_hwmod,
+        .clk            = "l3_iclk_div",
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
 /* mpu -> emif1 */
 static struct omap_hwmod_ocp_if omap54xx_mpu__emif1 = {
        .master         = &omap54xx_mpu_hwmod,
@@ -2427,6 +2704,12 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
        &omap54xx_l4_cfg__dma_system,
        &omap54xx_l4_abe__dmic,
        &omap54xx_l4_cfg__mmu_dsp,
+        &omap54xx_l3_main_2__dss,
+        &omap54xx_l3_main_2__dss_dispc,
+        &omap54xx_l3_main_2__dss_dsi1_a,
+        &omap54xx_l3_main_2__dss_dsi1_c,
+        &omap54xx_l3_main_2__dss_hdmi,
+        &omap54xx_l3_main_2__dss_rfbi,
        &omap54xx_mpu__emif1,
        &omap54xx_mpu__emif2,
        &omap54xx_l4_wkup__gpio1,
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index eb8a25de67ed..50640b38f0bf 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -57,7 +57,7 @@ static int __init omap4430_phy_power_down(void)
        }
        /* Power down the phy */
-        __raw_writel(PHY_PD, ctrl_base + CONTROL_DEV_CONF);
+        writel_relaxed(PHY_PD, ctrl_base + CONTROL_DEV_CONF);
        iounmap(ctrl_base);
@@ -162,7 +162,7 @@ void ti81xx_musb_phy_power(u8 on)
                return;
        }
-        usbphycfg = __raw_readl(scm_base + USBCTRL0);
+        usbphycfg = readl_relaxed(scm_base + USBCTRL0);
        if (on) {
                if (cpu_is_ti816x()) {
@@ -181,7 +181,7 @@ void ti81xx_musb_phy_power(u8 on)
                        usbphycfg |= USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN;
        }
-        __raw_writel(usbphycfg, scm_base + USBCTRL0);
+        writel_relaxed(usbphycfg, scm_base + USBCTRL0);
        iounmap(scm_base);
 }
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index 615e5b1fb025..6bf626700557 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -46,15 +46,8 @@
 static bool is_offset_valid;
 static u8 smps_offset;
-/*
- * Flag to ensure Smartreflex bit in TWL
- * being cleared in board file is not overwritten.
- */
-static bool __initdata twl_sr_enable_autoinit;
-#define TWL4030_DCDC_GLOBAL_CFG        0x06
 #define REG_SMPS_OFFSET         0xE0
-#define SMARTREFLEX_ENABLE     BIT(3)
 static unsigned long twl4030_vsel_to_uv(const u8 vsel)
 {
@@ -251,18 +244,6 @@ int __init omap3_twl_init(void)
        if (!cpu_is_omap34xx())
                return -ENODEV;
-        /*
-         * The smartreflex bit on twl4030 specifies if the setting of voltage
-         * is done over the I2C_SR path. Since this setting is independent of
-         * the actual usage of smartreflex AVS module, we enable TWL SR bit
-         * by default irrespective of whether smartreflex AVS module is enabled
-         * on the OMAP side or not. This is because without this bit enabled,
-         * the voltage scaling through vp forceupdate/bypass mechanism of
-         * voltage scaling will not function on TWL over I2C_SR.
-         */
-        if (!twl_sr_enable_autoinit)
-                omap3_twl_set_sr_bit(true);
        voltdm = voltdm_lookup("mpu_iva");
        omap_voltage_register_pmic(voltdm, &omap3_mpu_pmic);
@@ -271,44 +252,3 @@ int __init omap3_twl_init(void)
        return 0;
 }
-/**
- * omap3_twl_set_sr_bit() - Set/Clear SR bit on TWL
- * @enable: enable SR mode in twl or not
- *
- * If 'enable' is true, enables Smartreflex bit on TWL 4030 to make sure
- * voltage scaling through OMAP SR works. Else, the smartreflex bit
- * on twl4030 is cleared as there are platforms which use OMAP3 and T2 but
- * use Synchronized Scaling Hardware Strategy (ENABLE_VMODE=1) and Direct
- * Strategy Software Scaling Mode (ENABLE_VMODE=0), for setting the voltages,
- * in those scenarios this bit is to be cleared (enable = false).
- *
- * Returns 0 on success, error is returned if I2C read/write fails.
- */
-int __init omap3_twl_set_sr_bit(bool enable)
-{
-        u8 temp;
-        int ret;
-        if (twl_sr_enable_autoinit)
-                pr_warning("%s: unexpected multiple calls\n", __func__);
-        ret = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &temp,
-                              TWL4030_DCDC_GLOBAL_CFG);
-        if (ret)
-                goto err;
-        if (enable)
-                temp |= SMARTREFLEX_ENABLE;
-        else
-                temp &= ~SMARTREFLEX_ENABLE;
-        ret = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, temp,
-                               TWL4030_DCDC_GLOBAL_CFG);
-        if (!ret) {
-                twl_sr_enable_autoinit = true;
-                return 0;
-        }
-err:
-        pr_err("%s: Error access to TWL4030 (%d)\n", __func__, ret);
-        return ret;
-}
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index ab94f3a87c32..90c88d498485 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -226,6 +226,14 @@ static void __init am3517_evm_legacy_init(void)
        am35xx_emac_reset();
 }
+static struct platform_device omap3_rom_rng_device = {
+        .name           = "omap3-rom-rng",
+        .id             = -1,
+        .dev    = {
+                .platform_data  = rx51_secure_rng_call,
+        },
+};
 static void __init nokia_n900_legacy_init(void)
 {
        hsmmc2_internal_input_clk();
@@ -239,6 +247,10 @@ static void __init nokia_n900_legacy_init(void)
                        pr_warning("RX-51: Not enabling ARM errata 430973 workaround\n");
                        pr_warning("Thumb binaries may crash randomly without this workaround\n");
                }
+                pr_info("RX-51: Registring OMAP3 HWRNG device\n");
+                platform_device_register(&omap3_rom_rng_device);
        }
 }
 #endif /* CONFIG_ARCH_OMAP3 */
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index e1b41416fbf1..828aee9ea6a8 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -32,11 +32,13 @@
 #include "pm.h"
 #include "twl-common.h"
+#ifdef CONFIG_SUSPEND
 /*
 * omap_pm_suspend: points to a function that does the SoC-specific
 * suspend work
 */
-int (*omap_pm_suspend)(void);
+static int (*omap_pm_suspend)(void);
+#endif
 #ifdef CONFIG_PM
 /**
@@ -243,6 +245,15 @@ static const struct platform_suspend_ops omap_pm_ops = {
        .valid          = suspend_valid_only_mem,
 };
+/**
+ * omap_common_suspend_init - Set common suspend routines for OMAP SoCs
+ * @pm_suspend: function pointer to SoC specific suspend function
+ */
+void omap_common_suspend_init(void *pm_suspend)
+{
+        omap_pm_suspend = pm_suspend;
+        suspend_set_ops(&omap_pm_ops);
+}
 #endif /* CONFIG_SUSPEND */
 static void __init omap3_init_voltages(void)
@@ -287,32 +298,24 @@ omap_postcore_initcall(omap2_common_pm_init);
 int __init omap2_common_pm_late_init(void)
 {
-        /*
+        if (of_have_populated_dt()) {
-         * In the case of DT, the PMIC and SR initialization will be done using
+                omap3_twl_init();
-         * a completely different mechanism.
+                omap4_twl_init();
-         * Disable this part if a DT blob is available.
+        }
-         */
-        if (!of_have_populated_dt()) {
-                /* Init the voltage layer */
-                omap_pmic_late_init();
-                omap_voltage_late_init();
-                /* Initialize the voltages */
+        /* Init the voltage layer */
-                omap3_init_voltages();
+        omap_pmic_late_init();
-                omap4_init_voltages();
+        omap_voltage_late_init();
-                /* Smartreflex device init */
+        /* Initialize the voltages */
-                omap_devinit_smartreflex();
+        omap3_init_voltages();
+        omap4_init_voltages();
-        }
+        /* Smartreflex device init */
+        omap_devinit_smartreflex();
        /* cpufreq dummy device instantiation */
        omap_init_cpufreq();
-#ifdef CONFIG_SUSPEND
-        suspend_set_ops(&omap_pm_ops);
-#endif
        return 0;
 }
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index d4d0fce325c7..e150102d6c06 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -34,7 +34,6 @@ extern void *omap3_secure_ram_storage;
 extern void omap3_pm_off_mode_enable(int);
 extern void omap_sram_idle(void);
 extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
-extern int (*omap_pm_suspend)(void);
 #if defined(CONFIG_PM_OPP)
 extern int omap3_opp_init(void);
@@ -147,4 +146,11 @@ static inline void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { *tstart = *
 static inline void omap_pm_setup_sr_i2c_pcb_length(u32 mm) { }
 #endif
+#ifdef CONFIG_SUSPEND
+void omap_common_suspend_init(void *pm_suspend);
+#else
+static inline void omap_common_suspend_init(void *pm_suspend)
+{
+}
+#endif /* CONFIG_SUSPEND */
 #endif
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 8c0759496c8d..a5ea988ff340 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -229,9 +229,7 @@ static void __init prcm_setup_regs(void)
        clkdm_for_each(omap_pm_clkdms_setup, NULL);
        clkdm_add_wkdep(mpu_clkdm, wkup_clkdm);
-#ifdef CONFIG_SUSPEND
+        omap_common_suspend_init(omap2_enter_full_retention);
-        omap_pm_suspend = omap2_enter_full_retention;
-#endif
        /* REVISIT: Configure number of 32 kHz clock cycles for sys_clk
         * stabilisation */
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 87099bb6de69..507d8eeaab95 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -50,6 +50,7 @@
 #include "sdrc.h"
 #include "sram.h"
 #include "control.h"
+#include "vc.h"
 /* pm34xx errata defined in pm.h */
 u16 pm34xx_errata;
@@ -288,6 +289,9 @@ void omap_sram_idle(void)
                }
        }
+        /* Configure PMIC signaling for I2C4 or sys_off_mode */
+        omap3_vc_set_pmic_signaling(core_next_state);
        omap3_intc_prepare_idle();
        /*
@@ -391,7 +395,8 @@ restore:
        return ret;
 }
+#else
+#define omap3_pm_suspend NULL
 #endif /* CONFIG_SUSPEND */
@@ -705,9 +710,7 @@ int __init omap3_pm_init(void)
        per_clkdm = clkdm_lookup("per_clkdm");
        wkup_clkdm = clkdm_lookup("wkup_clkdm");
-#ifdef CONFIG_SUSPEND
+        omap_common_suspend_init(omap3_pm_suspend);
-        omap_pm_suspend = omap3_pm_suspend;
-#endif
        arm_pm_idle = omap3_pm_idle;
        omap3_idle_init();
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index eefb30cfcabd..0dda6cf8b855 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -96,6 +96,8 @@ static int omap4_pm_suspend(void)
        return 0;
 }
+#else
+#define omap4_pm_suspend NULL
 #endif /* CONFIG_SUSPEND */
 static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
@@ -251,9 +253,7 @@ int __init omap4_pm_init(void)
        (void) clkdm_for_each(omap_pm_clkdms_setup, NULL);
-#ifdef CONFIG_SUSPEND
+        omap_common_suspend_init(omap4_pm_suspend);
-        omap_pm_suspend = omap4_pm_suspend;
-#endif
        /* Overwrite the default cpu_do_idle() */
        arm_pm_idle = omap_default_idle;
diff --git a/arch/arm/mach-omap2/powerdomain-common.c b/arch/arm/mach-omap2/powerdomain-common.c
index c0aeabfcf009..c40e5f009826 100644
--- a/arch/arm/mach-omap2/powerdomain-common.c
+++ b/arch/arm/mach-omap2/powerdomain-common.c
@@ -17,7 +17,6 @@
 #include "pm.h"
 #include "cm.h"
 #include "cm-regbits-34xx.h"
-#include "cm-regbits-44xx.h"
 #include "prm-regbits-34xx.h"
 #include "prm-regbits-44xx.h"
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 93a2a6e4260f..faebd5f076af 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -32,6 +32,7 @@
 #include "powerdomain.h"
 #include "clockdomain.h"
+#include "voltage.h"
 #include "soc.h"
 #include "pm.h"
diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h
index da5a59ae77b6..f4727117f6cc 100644
--- a/arch/arm/mach-omap2/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -21,8 +21,6 @@
 #include <linux/list.h>
 #include <linux/spinlock.h>
-#include "voltage.h"
 /* Powerdomain basic power states */
 #define PWRDM_POWER_OFF         0x0
 #define PWRDM_POWER_RET         0x1
@@ -75,6 +73,7 @@
 struct clockdomain;
 struct powerdomain;
+struct voltagedomain;
 /**
 * struct powerdomain - OMAP powerdomain
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
index 0e841fd9498a..a8e4b582c527 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -428,6 +428,28 @@
 #define MAX_IOPAD_LATCH_TIME                    100
 # ifndef __ASSEMBLER__
+#include <linux/delay.h>
+/**
+ * omap_test_timeout - busy-loop, testing a condition
+ * @cond: condition to test until it evaluates to true
+ * @timeout: maximum number of microseconds in the timeout
+ * @index: loop index (integer)
+ *
+ * Loop waiting for @cond to become true or until at least @timeout
+ * microseconds have passed.  To use, define some integer @index in the
+ * calling code.  After running, if @index == @timeout, then the loop has
+ * timed out.
+ */
+#define omap_test_timeout(cond, timeout, index)                 \
+({                                                              \
+        for (index = 0; index < timeout; index++) {             \
+                if (cond)                                       \
+                        break;                                  \
+                udelay(1);                                      \
+        }                                                       \
+})
 /**
 * struct omap_prcm_irq - describes a PRCM interrupt bit
 * @name: a short name describing the interrupt type, e.g. "wkup" or "io"
@@ -458,6 +480,7 @@ struct omap_prcm_irq {
 * @ocp_barrier: fn ptr to force buffered PRM writes to complete
 * @save_and_clear_irqen: fn ptr to save and clear IRQENABLE regs
 * @restore_irqen: fn ptr to save and clear IRQENABLE regs
+ * @reconfigure_io_chain: fn ptr to reconfigure IO chain
 * @saved_mask: IRQENABLE regs are saved here during suspend
 * @priority_mask: 1 bit per IRQ, set to 1 if omap_prcm_irq.priority = true
 * @base_irq: base dynamic IRQ number, returned from irq_alloc_descs() in init
@@ -479,6 +502,7 @@ struct omap_prcm_irq_setup {
        void (*ocp_barrier)(void);
        void (*save_and_clear_irqen)(u32 *saved_mask);
        void (*restore_irqen)(u32 *saved_mask);
+        void (*reconfigure_io_chain)(void);
        u32 *saved_mask;
        u32 *priority_mask;
        int base_irq;
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c b/arch/arm/mach-omap2/prcm_mpu44xx.c
index c30e44a7fab0..cdbee6326d29 100644
--- a/arch/arm/mach-omap2/prcm_mpu44xx.c
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.c
@@ -30,12 +30,12 @@ void __iomem *prcm_mpu_base;
 u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 reg)
 {
-        return __raw_readl(OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
+        return readl_relaxed(OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
 }
 void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 reg)
 {
-        __raw_writel(val, OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
+        writel_relaxed(val, OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
 }
 u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h
index 059bd4f49035..ac9cb4550239 100644
--- a/arch/arm/mach-omap2/prcm_mpu44xx.h
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.h
@@ -26,7 +26,6 @@
 #define __ARCH_ARM_MACH_OMAP2_PRCM_MPU44XX_H
 #include "prcm_mpu_44xx_54xx.h"
-#include "common.h"
 #define OMAP4430_PRCM_MPU_BASE                  0x48243000
diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
index cebad565ed37..106132db532b 100644
--- a/arch/arm/mach-omap2/prm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
@@ -123,8 +123,15 @@
 #define OMAP3430_GLOBAL_SW_RST_SHIFT                    1
 #define OMAP3430_GLOBAL_COLD_RST_SHIFT                  0
 #define OMAP3430_GLOBAL_COLD_RST_MASK                   (1 << 0)
-#define OMAP3430_SEL_OFF_MASK                           (1 << 3)
+#define OMAP3430_PRM_VOLTCTRL_SEL_VMODE                 (1 << 4)
-#define OMAP3430_AUTO_OFF_MASK                          (1 << 2)
+#define OMAP3430_PRM_VOLTCTRL_SEL_OFF                   (1 << 3)
+#define OMAP3430_PRM_VOLTCTRL_AUTO_OFF                  (1 << 2)
+#define OMAP3430_PRM_VOLTCTRL_AUTO_RET                  (1 << 1)
+#define OMAP3430_PRM_VOLTCTRL_AUTO_SLEEP                (1 << 0)
 #define OMAP3430_SETUP_TIME2_MASK                       (0xffff << 16)
 #define OMAP3430_SETUP_TIME1_MASK                       (0xffff << 0)
+#define OMAP3430_PRM_POLCTRL_OFFMODE_POL                (1 << 3)
+#define OMAP3430_PRM_POLCTRL_CLKOUT_POL                 (1 << 2)
+#define OMAP3430_PRM_POLCTRL_CLKREQ_POL                 (1 << 1)
+#define OMAP3430_PRM_POLCTRL_EXTVOL_POL                 (1 << 0)
 #endif
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 623db40fdbbd..48480d557b61 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -17,10 +17,18 @@
 # ifndef __ASSEMBLER__
 extern void __iomem *prm_base;
+extern u16 prm_features;
 extern void omap2_set_globals_prm(void __iomem *prm);
 int of_prcm_init(void);
 # endif
+/*
+ * prm_features flag values
+ *
+ * PRM_HAS_IO_WAKEUP: has IO wakeup capability
+ * PRM_HAS_VOLTAGE: has voltage domains
+ */
+#define PRM_HAS_IO_WAKEUP       (1 << 0)
 /*
 * MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP
@@ -118,6 +126,7 @@ struct prm_reset_src_map {
 * @read_reset_sources: ptr to the SoC PRM-specific get_reset_source impl
 * @was_any_context_lost_old: ptr to the SoC PRM context loss test fn
 * @clear_context_loss_flags_old: ptr to the SoC PRM context loss flag clear fn
+ * @late_init: ptr to the late init function
 *
 * XXX @was_any_context_lost_old and @clear_context_loss_flags_old are
 * deprecated.
@@ -126,6 +135,7 @@ struct prm_ll_data {
        u32 (*read_reset_sources)(void);
        bool (*was_any_context_lost_old)(u8 part, s16 inst, u16 idx);
        void (*clear_context_loss_flags_old)(u8 part, s16 inst, u16 idx);
+        int (*late_init)(void);
 };
 extern int prm_register(struct prm_ll_data *pld);
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index 418de9c3b319..a3a3cca2bcc4 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -18,9 +18,6 @@
 #include <linux/io.h>
 #include <linux/irq.h>
-#include "soc.h"
-#include "common.h"
-#include "vp.h"
 #include "powerdomain.h"
 #include "clockdomain.h"
 #include "prm2xxx.h"
@@ -201,19 +198,11 @@ static struct prm_ll_data omap2xxx_prm_ll_data = {
 int __init omap2xxx_prm_init(void)
 {
-        if (!cpu_is_omap24xx())
-                return 0;
        return prm_register(&omap2xxx_prm_ll_data);
 }
 static void __exit omap2xxx_prm_exit(void)
 {
-        if (!cpu_is_omap24xx())
+        prm_unregister(&omap2xxx_prm_ll_data);
-                return;
-        /* Should never happen */
-        WARN(prm_unregister(&omap2xxx_prm_ll_data),
-             "%s: prm_ll_data function pointer mismatch\n", __func__);
 }
 __exitcall(omap2xxx_prm_exit);
diff --git a/arch/arm/mach-omap2/prm2xxx.h b/arch/arm/mach-omap2/prm2xxx.h
index 3194dd87e0e4..d2cb6365716f 100644
--- a/arch/arm/mach-omap2/prm2xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx.h
@@ -27,7 +27,7 @@
 /*
 * OMAP2-specific global PRM registers
- * Use __raw_{read,write}l() with these registers.
+ * Use {read,write}l_relaxed() with these registers.
 *
 * With a few exceptions, these are the register names beginning with
 * PRCM_* on 24xx.  (The exceptions are the IRQSTATUS and IRQENABLE
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 947f6adfed0c..c13b4e293ffa 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -16,7 +16,6 @@
 #include <linux/err.h>
 #include <linux/io.h>
-#include "common.h"
 #include "powerdomain.h"
 #include "prm2xxx_3xxx.h"
 #include "prm-regbits-24xx.h"
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index 9624b40836d4..1a3a96392b97 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -55,12 +55,12 @@
 /* Power/reset management domain register get/set */
 static inline u32 omap2_prm_read_mod_reg(s16 module, u16 idx)
 {
-        return __raw_readl(prm_base + module + idx);
+        return readl_relaxed(prm_base + module + idx);
 }
 static inline void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx)
 {
-        __raw_writel(val, prm_base + module + idx);
+        writel_relaxed(val, prm_base + module + idx);
 }
 /* Read-modify-write a register in a PRM module. Caller must lock */
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 720440737744..62709cd2f9c5 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -19,7 +19,6 @@
 #include <linux/err.h>
 #include <linux/io.h>
-#include "common.h"
 #include "powerdomain.h"
 #include "prm33xx.h"
 #include "prm-regbits-33xx.h"
@@ -27,13 +26,13 @@
 /* Read a register in a PRM instance */
 u32 am33xx_prm_read_reg(s16 inst, u16 idx)
 {
-        return __raw_readl(prm_base + inst + idx);
+        return readl_relaxed(prm_base + inst + idx);
 }
 /* Write into a register in a PRM instance */
 void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx)
 {
-        __raw_writel(val, prm_base + inst + idx);
+        writel_relaxed(val, prm_base + inst + idx);
 }
 /* Read-modify-write a register in PRM. Caller must lock */
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index 7721990d2006..4bd7a2dca8af 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -43,6 +43,7 @@ static struct omap_prcm_irq_setup omap3_prcm_irq_setup = {
        .ocp_barrier            = &omap3xxx_prm_ocp_barrier,
        .save_and_clear_irqen   = &omap3xxx_prm_save_and_clear_irqen,
        .restore_irqen          = &omap3xxx_prm_restore_irqen,
+        .reconfigure_io_chain   = &omap3xxx_prm_reconfigure_io_chain,
 };
 /*
@@ -246,7 +247,7 @@ void omap3xxx_prm_reconfigure_io_chain(void)
 */
 static void __init omap3xxx_prm_enable_io_wakeup(void)
 {
-        if (omap3_has_io_wakeup())
+        if (prm_features & PRM_HAS_IO_WAKEUP)
                omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD,
                                           PM_WKEN);
 }
@@ -400,23 +401,26 @@ struct pwrdm_ops omap3_pwrdm_operations = {
 *
 */
+static int omap3xxx_prm_late_init(void);
 static struct prm_ll_data omap3xxx_prm_ll_data = {
        .read_reset_sources = &omap3xxx_prm_read_reset_sources,
+        .late_init = &omap3xxx_prm_late_init,
 };
 int __init omap3xxx_prm_init(void)
 {
-        if (!cpu_is_omap34xx())
+        if (omap3_has_io_wakeup())
-                return 0;
+                prm_features |= PRM_HAS_IO_WAKEUP;
        return prm_register(&omap3xxx_prm_ll_data);
 }
-static int __init omap3xxx_prm_late_init(void)
+static int omap3xxx_prm_late_init(void)
 {
        int ret;
-        if (!cpu_is_omap34xx())
+        if (!(prm_features & PRM_HAS_IO_WAKEUP))
                return 0;
        omap3xxx_prm_enable_io_wakeup();
@@ -427,15 +431,9 @@ static int __init omap3xxx_prm_late_init(void)
        return ret;
 }
-omap_subsys_initcall(omap3xxx_prm_late_init);
 static void __exit omap3xxx_prm_exit(void)
 {
-        if (!cpu_is_omap34xx())
+        prm_unregister(&omap3xxx_prm_ll_data);
-                return;
-        /* Should never happen */
-        WARN(prm_unregister(&omap3xxx_prm_ll_data),
-             "%s: prm_ll_data function pointer mismatch\n", __func__);
 }
 __exitcall(omap3xxx_prm_exit);
diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h
index f8eb83323b1a..1dacfc5b1959 100644
--- a/arch/arm/mach-omap2/prm3xxx.h
+++ b/arch/arm/mach-omap2/prm3xxx.h
@@ -26,7 +26,7 @@
 /*
 * OMAP3-specific global PRM registers
- * Use __raw_{read,write}l() with these registers.
+ * Use {read,write}l_relaxed() with these registers.
 *
 * With a few exceptions, these are the register names beginning with
 * PRM_* on 34xx.  (The exceptions are the IRQSTATUS and IRQENABLE
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 03a603476cfc..a7f6ea27180a 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -47,6 +47,7 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
        .ocp_barrier            = &omap44xx_prm_ocp_barrier,
        .save_and_clear_irqen   = &omap44xx_prm_save_and_clear_irqen,
        .restore_irqen          = &omap44xx_prm_restore_irqen,
+        .reconfigure_io_chain   = &omap44xx_prm_reconfigure_io_chain,
 };
 /*
@@ -81,13 +82,13 @@ static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = {
 /* Read a register in a CM/PRM instance in the PRM module */
 u32 omap4_prm_read_inst_reg(s16 inst, u16 reg)
 {
-        return __raw_readl(prm_base + inst + reg);
+        return readl_relaxed(prm_base + inst + reg);
 }
 /* Write into a register in a CM/PRM instance in the PRM module */
 void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg)
 {
-        __raw_writel(val, prm_base + inst + reg);
+        writel_relaxed(val, prm_base + inst + reg);
 }
 /* Read-modify-write a register in a PRM module. Caller must lock */
@@ -649,6 +650,8 @@ struct pwrdm_ops omap4_pwrdm_operations = {
        .pwrdm_has_voltdm       = omap4_check_vcvp,
 };
+static int omap44xx_prm_late_init(void);
 /*
 * XXX document
 */
@@ -656,34 +659,29 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
        .read_reset_sources = &omap44xx_prm_read_reset_sources,
        .was_any_context_lost_old = &omap44xx_prm_was_any_context_lost_old,
        .clear_context_loss_flags_old = &omap44xx_prm_clear_context_loss_flags_old,
+        .late_init = &omap44xx_prm_late_init,
 };
 int __init omap44xx_prm_init(void)
 {
-        if (!cpu_is_omap44xx() && !soc_is_omap54xx() && !soc_is_dra7xx())
+        if (cpu_is_omap44xx())
-                return 0;
+                prm_features |= PRM_HAS_IO_WAKEUP;
        return prm_register(&omap44xx_prm_ll_data);
 }
-static int __init omap44xx_prm_late_init(void)
+static int omap44xx_prm_late_init(void)
 {
-        if (!cpu_is_omap44xx())
+        if (!(prm_features & PRM_HAS_IO_WAKEUP))
                return 0;
        omap44xx_prm_enable_io_wakeup();
        return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup);
 }
-omap_subsys_initcall(omap44xx_prm_late_init);
 static void __exit omap44xx_prm_exit(void)
 {
-        if (!cpu_is_omap44xx())
+        prm_unregister(&omap44xx_prm_ll_data);
-                return;
-        /* Should never happen */
-        WARN(prm_unregister(&omap44xx_prm_ll_data),
-             "%s: prm_ll_data function pointer mismatch\n", __func__);
 }
 __exitcall(omap44xx_prm_exit);
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index b4c4ab9c8044..25e8b8232115 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -62,6 +62,8 @@ static struct omap_prcm_irq_setup *prcm_irq_setup;
 /* prm_base: base virtual address of the PRM IP block */
 void __iomem *prm_base;
+u16 prm_features;
 /*
 * prm_ll_data: function pointers to SoC-specific implementations of
 * common PRM functions
@@ -330,12 +332,7 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
        if (of_have_populated_dt()) {
                int irq = omap_prcm_event_to_irq("io");
-                if (cpu_is_omap34xx())
+                omap_pcs_legacy_init(irq, irq_setup->reconfigure_io_chain);
-                        omap_pcs_legacy_init(irq,
-                                omap3xxx_prm_reconfigure_io_chain);
-                else
-                        omap_pcs_legacy_init(irq,
-                                omap44xx_prm_reconfigure_io_chain);
        }
        return 0;
@@ -530,3 +527,11 @@ int __init of_prcm_init(void)
        return 0;
 }
+static int __init prm_late_init(void)
+{
+        if (prm_ll_data->late_init)
+                return prm_ll_data->late_init();
+        return 0;
+}
+subsys_initcall(prm_late_init);
diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c
index 05fcf6de44ee..69f0dd08629c 100644
--- a/arch/arm/mach-omap2/prminst44xx.c
+++ b/arch/arm/mach-omap2/prminst44xx.c
@@ -49,7 +49,7 @@ u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx)
        BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
               part == OMAP4430_INVALID_PRCM_PARTITION ||
               !_prm_bases[part]);
-        return __raw_readl(_prm_bases[part] + inst + idx);
+        return readl_relaxed(_prm_bases[part] + inst + idx);
 }
 /* Write into a register in a PRM instance */
@@ -58,7 +58,7 @@ void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx)
        BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
               part == OMAP4430_INVALID_PRCM_PARTITION ||
               !_prm_bases[part]);
-        __raw_writel(val, _prm_bases[part] + inst + idx);
+        writel_relaxed(val, _prm_bases[part] + inst + idx);
 }
 /* Read-modify-write a register in PRM. Caller must lock */
diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h
index 446aa13511fd..645a2a46b213 100644
--- a/arch/arm/mach-omap2/sdrc.h
+++ b/arch/arm/mach-omap2/sdrc.h
@@ -31,24 +31,24 @@ extern void __iomem *omap2_sms_base;
 static inline void sdrc_write_reg(u32 val, u16 reg)
 {
-        __raw_writel(val, OMAP_SDRC_REGADDR(reg));
+        writel_relaxed(val, OMAP_SDRC_REGADDR(reg));
 }
 static inline u32 sdrc_read_reg(u16 reg)
 {
-        return __raw_readl(OMAP_SDRC_REGADDR(reg));
+        return readl_relaxed(OMAP_SDRC_REGADDR(reg));
 }
 /* SMS global register get/set */
 static inline void sms_write_reg(u32 val, u16 reg)
 {
-        __raw_writel(val, OMAP_SMS_REGADDR(reg));
+        writel_relaxed(val, OMAP_SMS_REGADDR(reg));
 }
 static inline u32 sms_read_reg(u16 reg)
 {
-        return __raw_readl(OMAP_SMS_REGADDR(reg));
+        return readl_relaxed(OMAP_SMS_REGADDR(reg));
 }
 extern void omap2_set_globals_sdrc(void __iomem *sdrc, void __iomem *sms);
diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c
index 907291714643..ae3f1553158d 100644
--- a/arch/arm/mach-omap2/sdrc2xxx.c
+++ b/arch/arm/mach-omap2/sdrc2xxx.c
@@ -103,9 +103,9 @@ u32 omap2xxx_sdrc_reprogram(u32 level, u32 force)
         * prm2xxx.c function
         */
        if (cpu_is_omap2420())
-                __raw_writel(0xffff, OMAP2420_PRCM_VOLTSETUP);
+                writel_relaxed(0xffff, OMAP2420_PRCM_VOLTSETUP);
        else
-                __raw_writel(0xffff, OMAP2430_PRCM_VOLTSETUP);
+                writel_relaxed(0xffff, OMAP2430_PRCM_VOLTSETUP);
        omap2_sram_reprogram_sdrc(level, dll_ctrl, m_type);
        curr_perf_level = level;
        local_irq_restore(flags);
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index 30abcc8b20e0..de2a34c423a7 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -459,10 +459,15 @@ IS_OMAP_TYPE(3430, 0x3430)
 #define OMAP5430_REV_ES2_0      (OMAP54XX_CLASS | (0x30 << 16) | (0x20 << 8))
 #define OMAP5432_REV_ES2_0      (OMAP54XX_CLASS | (0x32 << 16) | (0x20 << 8))
+#define DRA7XX_CLASS            0x07000000
+#define DRA752_REV_ES1_0        (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8))
+#define DRA752_REV_ES1_1        (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
 void omap2xxx_check_revision(void);
 void omap3xxx_check_revision(void);
 void omap4xxx_check_revision(void);
 void omap5xxx_check_revision(void);
+void dra7xxx_check_revision(void);
 void omap3xxx_check_features(void);
 void ti81xx_check_features(void);
 void am33xx_check_features(void);
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index d7bc33f15344..1b91ef0c182a 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -57,7 +57,7 @@ static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
                /*
                 * In OMAP4 the efuse registers are 24 bit aligned.
-                 * A __raw_readl will fail for non-32 bit aligned address
+                 * A readl_relaxed will fail for non-32 bit aligned address
                 * and hence the 8-bit read and shift.
                 */
                if (cpu_is_omap44xx()) {
diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c
index 4bd096836235..ddf1818af228 100644
--- a/arch/arm/mach-omap2/sram.c
+++ b/arch/arm/mach-omap2/sram.c
@@ -70,16 +70,16 @@ static int is_sram_locked(void)
        if (OMAP2_DEVICE_TYPE_GP == omap_type()) {
                /* RAMFW: R/W access to all initiators for all qualifier sets */
                if (cpu_is_omap242x()) {
-                        __raw_writel(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */
+                        writel_relaxed(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */
-                        __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0);  /* all i-read */
+                        writel_relaxed(0xCFDE, OMAP24XX_VA_READPERM0);  /* all i-read */
-                        __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
+                        writel_relaxed(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
                }
                if (cpu_is_omap34xx()) {
-                        __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
+                        writel_relaxed(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
-                        __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0);  /* all i-read */
+                        writel_relaxed(0xFFFF, OMAP34XX_VA_READPERM0);  /* all i-read */
-                        __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
+                        writel_relaxed(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
-                        __raw_writel(0x0, OMAP34XX_VA_ADDR_MATCH2);
+                        writel_relaxed(0x0, OMAP34XX_VA_ADDR_MATCH2);
-                        __raw_writel(0xFFFFFFFF, OMAP34XX_VA_SMS_RG_ATT0);
+                        writel_relaxed(0xFFFFFFFF, OMAP34XX_VA_SMS_RG_ATT0);
                }
                return 0;
        } else
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index b62de9f9d05c..43d03fbf4c0b 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -361,7 +361,7 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
 /* Clocksource code */
 static struct omap_dm_timer clksrc;
-static bool use_gptimer_clksrc;
+static bool use_gptimer_clksrc __initdata;
 /*
 * clocksource
@@ -546,15 +546,15 @@ static void __init realtime_counter_init(void)
        }
        /* Program numerator and denumerator registers */
-        reg = __raw_readl(base + INCREMENTER_NUMERATOR_OFFSET) &
+        reg = readl_relaxed(base + INCREMENTER_NUMERATOR_OFFSET) &
                        NUMERATOR_DENUMERATOR_MASK;
        reg |= num;
-        __raw_writel(reg, base + INCREMENTER_NUMERATOR_OFFSET);
+        writel_relaxed(reg, base + INCREMENTER_NUMERATOR_OFFSET);
-        reg = __raw_readl(base + INCREMENTER_DENUMERATOR_RELOAD_OFFSET) &
+        reg = readl_relaxed(base + INCREMENTER_DENUMERATOR_RELOAD_OFFSET) &
                        NUMERATOR_DENUMERATOR_MASK;
        reg |= den;
-        __raw_writel(reg, base + INCREMENTER_DENUMERATOR_RELOAD_OFFSET);
+        writel_relaxed(reg, base + INCREMENTER_DENUMERATOR_RELOAD_OFFSET);
        arch_timer_freq = (rate / den) * num;
        set_cntfreq();
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 49ac7977e03e..a4628a9e760c 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -220,10 +220,126 @@ static inline u32 omap_usec_to_32k(u32 usec)
        return DIV_ROUND_UP_ULL(32768ULL * (u64)usec, 1000000ULL);
 }
-/* Set oscillator setup time for omap3 */
+struct omap3_vc_timings {
-static void omap3_set_clksetup(u32 usec, struct voltagedomain *voltdm)
+        u32 voltsetup1;
+        u32 voltsetup2;
+};
+struct omap3_vc {
+        struct voltagedomain *vd;
+        u32 voltctrl;
+        u32 voltsetup1;
+        u32 voltsetup2;
+        struct omap3_vc_timings timings[2];
+};
+static struct omap3_vc vc;
+void omap3_vc_set_pmic_signaling(int core_next_state)
+{
+        struct voltagedomain *vd = vc.vd;
+        struct omap3_vc_timings *c = vc.timings;
+        u32 voltctrl, voltsetup1, voltsetup2;
+        voltctrl = vc.voltctrl;
+        voltsetup1 = vc.voltsetup1;
+        voltsetup2 = vc.voltsetup2;
+        switch (core_next_state) {
+        case PWRDM_POWER_OFF:
+                voltctrl &= ~(OMAP3430_PRM_VOLTCTRL_AUTO_RET |
+                              OMAP3430_PRM_VOLTCTRL_AUTO_SLEEP);
+                voltctrl |= OMAP3430_PRM_VOLTCTRL_AUTO_OFF;
+                if (voltctrl & OMAP3430_PRM_VOLTCTRL_SEL_OFF)
+                        voltsetup2 = c->voltsetup2;
+                else
+                        voltsetup1 = c->voltsetup1;
+                break;
+        case PWRDM_POWER_RET:
+        default:
+                c++;
+                voltctrl &= ~(OMAP3430_PRM_VOLTCTRL_AUTO_OFF |
+                              OMAP3430_PRM_VOLTCTRL_AUTO_SLEEP);
+                voltctrl |= OMAP3430_PRM_VOLTCTRL_AUTO_RET;
+                voltsetup1 = c->voltsetup1;
+                break;
+        }
+        if (voltctrl != vc.voltctrl) {
+                vd->write(voltctrl, OMAP3_PRM_VOLTCTRL_OFFSET);
+                vc.voltctrl = voltctrl;
+        }
+        if (voltsetup1 != vc.voltsetup1) {
+                vd->write(c->voltsetup1,
+                          OMAP3_PRM_VOLTSETUP1_OFFSET);
+                vc.voltsetup1 = voltsetup1;
+        }
+        if (voltsetup2 != vc.voltsetup2) {
+                vd->write(c->voltsetup2,
+                          OMAP3_PRM_VOLTSETUP2_OFFSET);
+                vc.voltsetup2 = voltsetup2;
+        }
+}
+#define PRM_POLCTRL_TWL_MASK    (OMAP3430_PRM_POLCTRL_CLKREQ_POL | \
+                                        OMAP3430_PRM_POLCTRL_CLKREQ_POL)
+#define PRM_POLCTRL_TWL_VAL     OMAP3430_PRM_POLCTRL_CLKREQ_POL
+/*
+ * Configure signal polarity for sys_clkreq and sys_off_mode pins
+ * as the default values are wrong and can cause the system to hang
+ * if any twl4030 scripts are loaded.
+ */
+static void __init omap3_vc_init_pmic_signaling(struct voltagedomain *voltdm)
+{
+        u32 val;
+        if (vc.vd)
+                return;
+        vc.vd = voltdm;
+        val = voltdm->read(OMAP3_PRM_POLCTRL_OFFSET);
+        if (!(val & OMAP3430_PRM_POLCTRL_CLKREQ_POL) ||
+            (val & OMAP3430_PRM_POLCTRL_CLKREQ_POL)) {
+                val |= OMAP3430_PRM_POLCTRL_CLKREQ_POL;
+                val &= ~OMAP3430_PRM_POLCTRL_OFFMODE_POL;
+                pr_debug("PM: fixing sys_clkreq and sys_off_mode polarity to 0x%x\n",
+                         val);
+                voltdm->write(val, OMAP3_PRM_POLCTRL_OFFSET);
+        }
+        /*
+         * By default let's use I2C4 signaling for retention idle
+         * and sys_off_mode pin signaling for off idle. This way we
+         * have sys_clk_req pin go down for retention and both
+         * sys_clk_req and sys_off_mode pins will go down for off
+         * idle. And we can also scale voltages to zero for off-idle.
+         * Note that no actual voltage scaling during off-idle will
+         * happen unless the board specific twl4030 PMIC scripts are
+         * loaded.
+         */
+        val = voltdm->read(OMAP3_PRM_VOLTCTRL_OFFSET);
+        if (!(val & OMAP3430_PRM_VOLTCTRL_SEL_OFF)) {
+                val |= OMAP3430_PRM_VOLTCTRL_SEL_OFF;
+                pr_debug("PM: setting voltctrl sys_off_mode signaling to 0x%x\n",
+                         val);
+                voltdm->write(val, OMAP3_PRM_VOLTCTRL_OFFSET);
+        }
+        vc.voltctrl = val;
+        omap3_vc_set_pmic_signaling(PWRDM_POWER_ON);
+}
+static void omap3_init_voltsetup1(struct voltagedomain *voltdm,
+                                  struct omap3_vc_timings *c, u32 idle)
 {
-        voltdm->write(omap_usec_to_32k(usec), OMAP3_PRM_CLKSETUP_OFFSET);
+        unsigned long val;
+        val = (voltdm->vc_param->on - idle) / voltdm->pmic->slew_rate;
+        val *= voltdm->sys_clk.rate / 8 / 1000000 + 1;
+        val <<= __ffs(voltdm->vfsm->voltsetup_mask);
+        c->voltsetup1 &= ~voltdm->vfsm->voltsetup_mask;
+        c->voltsetup1 |= val;
 }
 /**
@@ -236,37 +352,21 @@ static void omap3_set_clksetup(u32 usec, struct voltagedomain *voltdm)
 * or retention. Off mode has additionally an option to use sys_off_mode
 * pad, which uses a global signal to program the whole power IC to
 * off-mode.
+ *
+ * Note that pmic is not controlling the voltage scaling during
+ * retention signaled over I2C4, so we can keep voltsetup2 as 0.
+ * And the oscillator is not shut off over I2C4, so no need to
+ * set clksetup.
 */
-static void omap3_set_i2c_timings(struct voltagedomain *voltdm, bool off_mode)
+static void omap3_set_i2c_timings(struct voltagedomain *voltdm)
 {
-        unsigned long voltsetup1;
+        struct omap3_vc_timings *c = vc.timings;
-        u32 tgt_volt;
-        /*
-         * Oscillator is shut down only if we are using sys_off_mode pad,
-         * thus we set a minimal setup time here
-         */
-        omap3_set_clksetup(1, voltdm);
-        if (off_mode)
+        /* Configure PRWDM_POWER_OFF over I2C4 */
-                tgt_volt = voltdm->vc_param->off;
+        omap3_init_voltsetup1(voltdm, c, voltdm->vc_param->off);
-        else
+        c++;
-                tgt_volt = voltdm->vc_param->ret;
+        /* Configure PRWDM_POWER_RET over I2C4 */
+        omap3_init_voltsetup1(voltdm, c, voltdm->vc_param->ret);
-        voltsetup1 = (voltdm->vc_param->on - tgt_volt) /
-                        voltdm->pmic->slew_rate;
-        voltsetup1 = voltsetup1 * voltdm->sys_clk.rate / 8 / 1000000 + 1;
-        voltdm->rmw(voltdm->vfsm->voltsetup_mask,
-                voltsetup1 << __ffs(voltdm->vfsm->voltsetup_mask),
-                voltdm->vfsm->voltsetup_reg);
-        /*
-         * pmic is not controlling the voltage scaling during retention,
-         * thus set voltsetup2 to 0
-         */
-        voltdm->write(0, OMAP3_PRM_VOLTSETUP2_OFFSET);
 }
 /**
@@ -275,69 +375,49 @@ static void omap3_set_i2c_timings(struct voltagedomain *voltdm, bool off_mode)
 *
 * Calculates and sets up off-mode timings for a channel. Off-mode
 * can use either I2C based voltage scaling, or alternatively
- * sys_off_mode pad can be used to send a global command to power IC.
+ * sys_off_mode pad can be used to send a global command to power IC.n,
- * This function first checks which mode is being used, and calls
- * omap3_set_i2c_timings() if the system is using I2C control mode.
 * sys_off_mode has the additional benefit that voltages can be
 * scaled to zero volt level with TWL4030 / TWL5030, I2C can only
 * scale to 600mV.
+ *
+ * Note that omap is not controlling the voltage scaling during
+ * off idle signaled by sys_off_mode, so we can keep voltsetup1
+ * as 0.
 */
 static void omap3_set_off_timings(struct voltagedomain *voltdm)
 {
-        unsigned long clksetup;
+        struct omap3_vc_timings *c = vc.timings;
-        unsigned long voltsetup2;
+        u32 tstart, tshut, clksetup, voltoffset;
-        unsigned long voltsetup2_old;
-        u32 val;
-        u32 tstart, tshut;
-        /* check if sys_off_mode is used to control off-mode voltages */
+        if (c->voltsetup2)
-        val = voltdm->read(OMAP3_PRM_VOLTCTRL_OFFSET);
-        if (!(val & OMAP3430_SEL_OFF_MASK)) {
-                /* No, omap is controlling them over I2C */
-                omap3_set_i2c_timings(voltdm, true);
                return;
-        }
        omap_pm_get_oscillator(&tstart, &tshut);
-        omap3_set_clksetup(tstart, voltdm);
+        if (tstart == ULONG_MAX) {
+                pr_debug("PM: oscillator start-up time not initialized, using 10ms\n");
-        clksetup = voltdm->read(OMAP3_PRM_CLKSETUP_OFFSET);
+                clksetup = omap_usec_to_32k(10000);
+        } else {
-        /* voltsetup 2 in us */
+                clksetup = omap_usec_to_32k(tstart);
-        voltsetup2 = voltdm->vc_param->on / voltdm->pmic->slew_rate;
+        }
-        /* convert to 32k clk cycles */
-        voltsetup2 = DIV_ROUND_UP(voltsetup2 * 32768, 1000000);
-        voltsetup2_old = voltdm->read(OMAP3_PRM_VOLTSETUP2_OFFSET);
-        /*
-         * Update voltsetup2 if higher than current value (needed because
-         * we have multiple channels with different ramp times), also
-         * update voltoffset always to value recommended by TRM
-         */
-        if (voltsetup2 > voltsetup2_old) {
-                voltdm->write(voltsetup2, OMAP3_PRM_VOLTSETUP2_OFFSET);
-                voltdm->write(clksetup - voltsetup2,
-                        OMAP3_PRM_VOLTOFFSET_OFFSET);
-        } else
-                voltdm->write(clksetup - voltsetup2_old,
-                        OMAP3_PRM_VOLTOFFSET_OFFSET);
        /*
-         * omap is not controlling voltage scaling during off-mode,
+         * For twl4030 errata 27, we need to allow minimum ~488.32 us wait to
-         * thus set voltsetup1 to 0
+         * switch from HFCLKIN to internal oscillator. That means timings
+         * have voltoffset fixed to 0xa in rounded up 32 KiHz cycles. And
+         * that means we can calculate the value based on the oscillator
+         * start-up time since voltoffset2 = clksetup - voltoffset.
         */
-        voltdm->rmw(voltdm->vfsm->voltsetup_mask, 0,
+        voltoffset = omap_usec_to_32k(488);
-                voltdm->vfsm->voltsetup_reg);
+        c->voltsetup2 = clksetup - voltoffset;
+        voltdm->write(clksetup, OMAP3_PRM_CLKSETUP_OFFSET);
-        /* voltoffset must be clksetup minus voltsetup2 according to TRM */
+        voltdm->write(voltoffset, OMAP3_PRM_VOLTOFFSET_OFFSET);
-        voltdm->write(clksetup - voltsetup2, OMAP3_PRM_VOLTOFFSET_OFFSET);
 }
 static void __init omap3_vc_init_channel(struct voltagedomain *voltdm)
 {
+        omap3_vc_init_pmic_signaling(voltdm);
        omap3_set_off_timings(voltdm);
+        omap3_set_i2c_timings(voltdm);
 }
 /**
@@ -462,7 +542,7 @@ static void omap4_set_timings(struct voltagedomain *voltdm, bool off_mode)
        val |= omap4_usec_to_val_scrm(tshut, OMAP4_DOWNTIME_SHIFT,
                OMAP4_DOWNTIME_MASK);
-        __raw_writel(val, OMAP4_SCRM_CLKSETUPTIME);
+        writel_relaxed(val, OMAP4_SCRM_CLKSETUPTIME);
 }
 /* OMAP4 specific voltage init functions */
@@ -584,7 +664,7 @@ static void __init omap4_vc_i2c_timing_init(struct voltagedomain *voltdm)
        val = i2c_data->loadbits << 25 | i2c_data->loadbits << 29;
        /* Write to SYSCTRL_PADCONF_WKUP_CTRL_I2C_2 to setup I2C pull */
-        __raw_writel(val, OMAP2_L4_IO_ADDRESS(OMAP4_CTRL_MODULE_PAD_WKUP +
+        writel_relaxed(val, OMAP2_L4_IO_ADDRESS(OMAP4_CTRL_MODULE_PAD_WKUP +
                                OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_I2C_2));
        /* HSSCLH can always be zero */
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index 91c8d75bf2ea..cdbdd78e755e 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -117,6 +117,9 @@ extern struct omap_vc_param omap4_mpu_vc_data;
 extern struct omap_vc_param omap4_iva_vc_data;
 extern struct omap_vc_param omap4_core_vc_data;
+void omap3_vc_set_pmic_signaling(int core_next_state);
 void omap_vc_init_channel(struct voltagedomain *voltdm);
 int omap_vc_pre_scale(struct voltagedomain *voltdm,
                      unsigned long target_volt,
diff --git a/arch/arm/mach-omap2/wd_timer.c b/arch/arm/mach-omap2/wd_timer.c
index d15c7bbab8e2..97d6607d447a 100644
--- a/arch/arm/mach-omap2/wd_timer.c
+++ b/arch/arm/mach-omap2/wd_timer.c
@@ -49,12 +49,12 @@ int omap2_wd_timer_disable(struct omap_hwmod *oh)
        }
        /* sequence required to disable watchdog */
-        __raw_writel(0xAAAA, base + OMAP_WDT_SPR);
+        writel_relaxed(0xAAAA, base + OMAP_WDT_SPR);
-        while (__raw_readl(base + OMAP_WDT_WPS) & 0x10)
+        while (readl_relaxed(base + OMAP_WDT_WPS) & 0x10)
                cpu_relax();
-        __raw_writel(0x5555, base + OMAP_WDT_SPR);
+        writel_relaxed(0x5555, base + OMAP_WDT_SPR);
-        while (__raw_readl(base + OMAP_WDT_WPS) & 0x10)
+        while (readl_relaxed(base + OMAP_WDT_WPS) & 0x10)
                cpu_relax();
        return 0;
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index db7e056493a0..26d6f34b6027 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -21,7 +21,7 @@ struct mv_sata_platform_data;
 #define ORION_MBUS_DEVBUS_BOOT_ATTR   0x0f
 #define ORION_MBUS_DEVBUS_TARGET(cs)  0x01
 #define ORION_MBUS_DEVBUS_ATTR(cs)    (~(1 << cs))
-#define ORION_MBUS_SRAM_TARGET        0x00
+#define ORION_MBUS_SRAM_TARGET        0x09
 #define ORION_MBUS_SRAM_ATTR          0x00
 /*
diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c
index 4887a2a4c698..3dffcb2d714e 100644
--- a/arch/arm/mach-prima2/rstc.c
+++ b/arch/arm/mach-prima2/rstc.c
@@ -36,27 +36,33 @@ static int sirfsoc_reset_module(struct reset_controller_dev *rcdev,
        if (of_device_is_compatible(rcdev->of_node, "sirf,prima2-rstc")) {
                /*
-                 * Writing 1 to this bit resets corresponding block. Writing 0 to this
+                 * Writing 1 to this bit resets corresponding block.
-                 * bit de-asserts reset signal of the corresponding block.
+                 * Writing 0 to this bit de-asserts reset signal of the
-                 * datasheet doesn't require explicit delay between the set and clear
+                 * corresponding block. datasheet doesn't require explicit
-                 * of reset bit. it could be shorter if tests pass.
+                 * delay between the set and clear of reset bit. it could
+                 * be shorter if tests pass.
                 */
-                writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) | (1 << reset_bit),
+                writel(readl(sirfsoc_rstc_base +
+                        (reset_bit / 32) * 4) | (1 << reset_bit),
                        sirfsoc_rstc_base + (reset_bit / 32) * 4);
-                msleep(10);
+                msleep(20);
-                writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) & ~(1 << reset_bit),
+                writel(readl(sirfsoc_rstc_base +
+                        (reset_bit / 32) * 4) & ~(1 << reset_bit),
                        sirfsoc_rstc_base + (reset_bit / 32) * 4);
        } else {
                /*
                 * For MARCO and POLO
-                 * Writing 1 to SET register resets corresponding block. Writing 1 to CLEAR
+                 * Writing 1 to SET register resets corresponding block.
-                 * register de-asserts reset signal of the corresponding block.
+                 * Writing 1 to CLEAR register de-asserts reset signal of the
-                 * datasheet doesn't require explicit delay between the set and clear
+                 * corresponding block.
-                 * of reset bit. it could be shorter if tests pass.
+                 * datasheet doesn't require explicit delay between the set and
+                 * clear of reset bit. it could be shorter if tests pass.
                 */
-                writel(1 << reset_bit, sirfsoc_rstc_base + (reset_bit / 32) * 8);
+                writel(1 << reset_bit,
-                msleep(10);
+                        sirfsoc_rstc_base + (reset_bit / 32) * 8);
-                writel(1 << reset_bit, sirfsoc_rstc_base + (reset_bit / 32) * 8 + 4);
+                msleep(20);
+                writel(1 << reset_bit,
+                        sirfsoc_rstc_base + (reset_bit / 32) * 8 + 4);
        }
        mutex_unlock(&rstc_lock);
diff --git a/arch/arm/mach-qcom/Kconfig b/arch/arm/mach-qcom/Kconfig
index a028be234334..fd2b99dceb89 100644
--- a/arch/arm/mach-qcom/Kconfig
+++ b/arch/arm/mach-qcom/Kconfig
@@ -2,9 +2,9 @@ config ARCH_QCOM
        bool "Qualcomm Support" if ARCH_MULTI_V7
        select ARCH_REQUIRE_GPIOLIB
        select ARM_GIC
+        select ARM_AMBA
        select CLKSRC_OF
-        select GENERIC_CLOCKEVENTS
+        select PINCTRL
-        select HAVE_SMP
        select QCOM_SCM if SMP
        help
          Support for Qualcomm's devicetree based systems.
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 1d5ee5c9a1dc..960b8dd78c44 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -148,6 +148,21 @@ struct platform_device realview_cf_device = {
        },
 };
+static struct resource realview_leds_resources[] = {
+        {
+                .start  = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET,
+                .end    = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET + 4,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+struct platform_device realview_leds_device = {
+        .name           = "versatile-leds",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(realview_leds_resources),
+        .resource       = realview_leds_resources,
+};
 static struct resource realview_i2c_resource = {
        .start          = REALVIEW_I2C_BASE,
        .end            = REALVIEW_I2C_BASE + SZ_4K - 1,
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 602ca5ec52c5..13dc830ef469 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -37,6 +37,7 @@ struct machine_desc;
 extern struct platform_device realview_flash_device;
 extern struct platform_device realview_cf_device;
+extern struct platform_device realview_leds_device;
 extern struct platform_device realview_i2c_device;
 extern struct mmci_platform_data realview_mmc0_plat_data;
 extern struct mmci_platform_data realview_mmc1_plat_data;
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index c85ddb2a0ad0..6bb070e80128 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -452,6 +452,7 @@ static void __init realview_eb_init(void)
        realview_flash_register(&realview_eb_flash_resource, 1);
        platform_device_register(&realview_i2c_device);
        platform_device_register(&char_lcd_device);
+        platform_device_register(&realview_leds_device);
        eth_device_register();
        realview_usb_register(realview_eb_isp1761_resources);
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index c5eade76461b..173f2c15de49 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -367,6 +367,7 @@ static void __init realview_pb1176_init(void)
        realview_usb_register(realview_pb1176_isp1761_resources);
        platform_device_register(&pmu_device);
        platform_device_register(&char_lcd_device);
+        platform_device_register(&realview_leds_device);
        for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
                struct amba_device *d = amba_devs[i];
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index f4b0962578fe..bde7e6b1fd44 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -347,6 +347,7 @@ static void __init realview_pb11mp_init(void)
        realview_eth_register(NULL, realview_pb11mp_smsc911x_resources);
        platform_device_register(&realview_i2c_device);
        platform_device_register(&realview_cf_device);
+        platform_device_register(&realview_leds_device);
        realview_usb_register(realview_pb11mp_isp1761_resources);
        platform_device_register(&pmu_device);
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index 10a3e1d76891..4e57a8599265 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -289,6 +289,7 @@ static void __init realview_pba8_init(void)
        realview_eth_register(NULL, realview_pba8_smsc911x_resources);
        platform_device_register(&realview_i2c_device);
        platform_device_register(&realview_cf_device);
+        platform_device_register(&realview_leds_device);
        realview_usb_register(realview_pba8_isp1761_resources);
        platform_device_register(&pmu_device);
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index 9d75493e3f0c..72c96caebefa 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -385,6 +385,7 @@ static void __init realview_pbx_init(void)
        realview_eth_register(NULL, realview_pbx_smsc911x_resources);
        platform_device_register(&realview_i2c_device);
        platform_device_register(&realview_cf_device);
+        platform_device_register(&realview_leds_device);
        realview_usb_register(realview_pbx_isp1761_resources);
        for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
diff --git a/arch/arm/mach-rockchip/core.h b/arch/arm/mach-rockchip/core.h
index e2e7c9dbb200..39bca96b555a 100644
--- a/arch/arm/mach-rockchip/core.h
+++ b/arch/arm/mach-rockchip/core.h
@@ -18,5 +18,3 @@ extern char rockchip_secondary_trampoline_end;
 extern unsigned long rockchip_boot_fn;
 extern void rockchip_secondary_startup(void);
-extern struct smp_operations rockchip_smp_ops;
diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
index 072842f6491b..910835d4ccf4 100644
--- a/arch/arm/mach-rockchip/platsmp.c
+++ b/arch/arm/mach-rockchip/platsmp.c
@@ -178,7 +178,8 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus)
                pmu_set_power_domain(0 + i, false);
 }
-struct smp_operations rockchip_smp_ops __initdata = {
+static struct smp_operations rockchip_smp_ops __initdata = {
        .smp_prepare_cpus       = rockchip_smp_prepare_cpus,
        .smp_boot_secondary     = rockchip_boot_secondary,
 };
+CPU_METHOD_OF_DECLARE(rk3066_smp, "rockchip,rk3066-smp", &rockchip_smp_ops);
diff --git a/arch/arm/mach-rockchip/rockchip.c b/arch/arm/mach-rockchip/rockchip.c
index d211d6fa0d98..4499b0a31a27 100644
--- a/arch/arm/mach-rockchip/rockchip.c
+++ b/arch/arm/mach-rockchip/rockchip.c
@@ -39,7 +39,6 @@ static const char * const rockchip_board_dt_compat[] = {
 };
 DT_MACHINE_START(ROCKCHIP_DT, "Rockchip Cortex-A9 (Device Tree)")
-        .smp            = smp_ops(rockchip_smp_ops),
        .init_machine   = rockchip_dt_init,
        .dt_compat      = rockchip_board_dt_compat,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 40cf50b9940c..04284de7aca5 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -18,6 +18,8 @@ config PLAT_S3C24XX
        help
          Base platform code for any Samsung S3C24XX device
 menu "SAMSUNG S3C24XX SoCs Support"
 comment "S3C24XX SoCs"
@@ -26,8 +28,7 @@ config CPU_S3C2410
        bool "SAMSUNG S3C2410"
        default y
        select CPU_ARM920T
-        select CPU_LLSERIAL_S3C2410
+        select S3C2410_COMMON_CLK
-        select S3C2410_CLOCK
        select S3C2410_DMA if S3C24XX_DMA
        select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ
        select S3C2410_PM if PM
@@ -39,7 +40,7 @@ config CPU_S3C2410
 config CPU_S3C2412
        bool "SAMSUNG S3C2412"
        select CPU_ARM926T
-        select CPU_LLSERIAL_S3C2440
+        select S3C2412_COMMON_CLK
        select S3C2412_DMA if S3C24XX_DMA
        select S3C2412_PM if PM
        help
@@ -48,19 +49,16 @@ config CPU_S3C2412
 config CPU_S3C2416
        bool "SAMSUNG S3C2416/S3C2450"
        select CPU_ARM926T
-        select CPU_LLSERIAL_S3C2440
        select S3C2416_PM if PM
-        select S3C2443_COMMON
+        select S3C2443_COMMON_CLK
        select S3C2443_DMA if S3C24XX_DMA
-        select SAMSUNG_CLKSRC
        help
          Support for the S3C2416 SoC from the S3C24XX line
 config CPU_S3C2440
        bool "SAMSUNG S3C2440"
        select CPU_ARM920T
-        select CPU_LLSERIAL_S3C2440
+        select S3C2410_COMMON_CLK
-        select S3C2410_CLOCK
        select S3C2410_PM if PM
        select S3C2440_DMA if S3C24XX_DMA
        help
@@ -69,8 +67,7 @@ config CPU_S3C2440
 config CPU_S3C2442
        bool "SAMSUNG S3C2442"
        select CPU_ARM920T
-        select CPU_LLSERIAL_S3C2440
+        select S3C2410_COMMON_CLK
-        select S3C2410_CLOCK
        select S3C2410_DMA if S3C24XX_DMA
        select S3C2410_PM if PM
        help
@@ -84,26 +81,13 @@ config CPU_S3C244X
 config CPU_S3C2443
        bool "SAMSUNG S3C2443"
        select CPU_ARM920T
-        select CPU_LLSERIAL_S3C2440
+        select S3C2443_COMMON_CLK
-        select S3C2443_COMMON
        select S3C2443_DMA if S3C24XX_DMA
-        select SAMSUNG_CLKSRC
        help
          Support for the S3C2443 SoC from the S3C24XX line
 # common code
-config S3C2410_CLOCK
-        bool
-        help
-          Clock code for the S3C2410, and similar processors which
-          is currently includes the S3C2410, S3C2440, S3C2442.
-config S3C24XX_DCLK
-        bool
-        help
-          Clock code for supporting DCLK/CLKOUT on S3C24XX architectures
 config S3C24XX_SMDK
        bool
        help
@@ -158,28 +142,6 @@ config S3C2410_PM
        help
          Power Management code common to S3C2410 and better
-# low-level serial option nodes
-config CPU_LLSERIAL_S3C2410_ONLY
-        bool
-        default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440
-config CPU_LLSERIAL_S3C2440_ONLY
-        bool
-        default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410
-config CPU_LLSERIAL_S3C2410
-        bool
-        help
-          Selected if there is an S3C2410 (or register compatible) serial
-          low-level implementation needed
-config CPU_LLSERIAL_S3C2440
-        bool
-        help
-          Selected if there is an S3C2440 (or register compatible) serial
-          low-level implementation needed
 config S3C24XX_PLL
        bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
        depends on ARM_S3C24XX_CPUFREQ
@@ -258,8 +220,8 @@ config ARCH_BAST
        bool "Simtec Electronics BAST (EB2410ITX)"
        select ISA
        select MACH_BAST_IDE
+        select S3C2410_COMMON_DCLK
        select S3C2410_IOTIMING if ARM_S3C2410_CPUFREQ
-        select S3C24XX_DCLK
        select S3C24XX_SIMTEC_NOR
        select S3C24XX_SIMTEC_PM if PM
        select S3C24XX_SIMTEC_USB
@@ -340,7 +302,7 @@ config MACH_TCT_HAMMER
 config MACH_VR1000
        bool "Thorcom VR1000"
        select MACH_BAST_IDE
-        select S3C24XX_DCLK
+        select S3C2410_COMMON_DCLK
        select S3C24XX_SIMTEC_NOR
        select S3C24XX_SIMTEC_PM if PM
        select S3C24XX_SIMTEC_USB
@@ -519,8 +481,8 @@ comment "S3C2440 Boards"
 config MACH_ANUBIS
        bool "Simtec Electronics ANUBIS"
        select HAVE_PATA_PLATFORM
+        select S3C2410_COMMON_DCLK
        select S3C2440_XTAL_12000000
-        select S3C24XX_DCLK
        select S3C24XX_SIMTEC_PM if PM
        select S3C_DEV_USB_HOST
        help
@@ -558,9 +520,9 @@ config MACH_NEXCODER_2440
 config MACH_OSIRIS
        bool "Simtec IM2440D20 (OSIRIS) module"
+        select S3C2410_COMMON_DCLK
        select S3C2410_IOTIMING if ARM_S3C2440_CPUFREQ
        select S3C2440_XTAL_12000000
-        select S3C24XX_DCLK
        select S3C24XX_SIMTEC_PM if PM
        select S3C_DEV_NAND
        select S3C_DEV_USB_HOST
@@ -629,9 +591,9 @@ config MACH_RX1950
        bool "HP iPAQ rx1950"
        select I2C
        select PM_H1940 if PM
+        select S3C2410_COMMON_DCLK
        select S3C2410_IOTIMING if ARM_S3C2440_CPUFREQ
        select S3C2440_XTAL_16934400
-        select S3C24XX_DCLK
        select S3C24XX_PWM
        select S3C_DEV_NAND
        help
@@ -641,12 +603,6 @@ endif	# CPU_S3C2442
 if CPU_S3C2443 || CPU_S3C2416
-config S3C2443_COMMON
-        bool
-        help
-          Common code for the S3C2443 and similar processors, which includes
-          the S3C2416 and S3C2450.
 config S3C2443_DMA
        bool
        help
diff --git a/arch/arm/mach-s3c24xx/Makefile b/arch/arm/mach-s3c24xx/Makefile
index 7f54e5b954ca..2235d0d3b38d 100644
--- a/arch/arm/mach-s3c24xx/Makefile
+++ b/arch/arm/mach-s3c24xx/Makefile
@@ -21,22 +21,22 @@ obj-$(CONFIG_S3C2410_DMA)	+= dma-s3c2410.o
 obj-$(CONFIG_S3C2410_PLL)       += pll-s3c2410.o
 obj-$(CONFIG_S3C2410_PM)        += pm-s3c2410.o sleep-s3c2410.o
-obj-$(CONFIG_CPU_S3C2412)       += s3c2412.o clock-s3c2412.o
+obj-$(CONFIG_CPU_S3C2412)       += s3c2412.o
 obj-$(CONFIG_S3C2412_DMA)       += dma-s3c2412.o
 obj-$(CONFIG_S3C2412_PM)        += pm-s3c2412.o
 obj-$(CONFIG_S3C2412_PM_SLEEP)  += sleep-s3c2412.o
-obj-$(CONFIG_CPU_S3C2416)       += s3c2416.o clock-s3c2416.o
+obj-$(CONFIG_CPU_S3C2416)       += s3c2416.o
 obj-$(CONFIG_S3C2416_PM)        += pm-s3c2416.o
-obj-$(CONFIG_CPU_S3C2440)       += s3c2440.o clock-s3c2440.o
+obj-$(CONFIG_CPU_S3C2440)       += s3c2440.o
 obj-$(CONFIG_CPU_S3C2442)       += s3c2442.o
-obj-$(CONFIG_CPU_S3C244X)       += s3c244x.o clock-s3c244x.o
+obj-$(CONFIG_CPU_S3C244X)       += s3c244x.o
 obj-$(CONFIG_S3C2440_DMA)       += dma-s3c2440.o
 obj-$(CONFIG_S3C2440_PLL_12000000) += pll-s3c2440-12000000.o
 obj-$(CONFIG_S3C2440_PLL_16934400) += pll-s3c2440-16934400.o
-obj-$(CONFIG_CPU_S3C2443)       += s3c2443.o clock-s3c2443.o
+obj-$(CONFIG_CPU_S3C2443)       += s3c2443.o
 # PM
@@ -44,16 +44,13 @@ obj-$(CONFIG_PM)		+= pm.o irq-pm.o sleep.o
 # common code
-obj-$(CONFIG_S3C24XX_DCLK)      += clock-dclk.o
 obj-$(CONFIG_S3C24XX_DMA)       += dma.o
-obj-$(CONFIG_S3C2410_CLOCK)     += clock-s3c2410.o
 obj-$(CONFIG_S3C2410_CPUFREQ_UTILS) += cpufreq-utils.o
 obj-$(CONFIG_S3C2410_IOTIMING)  += iotiming-s3c2410.o
 obj-$(CONFIG_S3C2412_IOTIMING)  += iotiming-s3c2412.o
-obj-$(CONFIG_S3C2443_COMMON)    += common-s3c2443.o
 obj-$(CONFIG_S3C2443_DMA)       += dma-s3c2443.o
 #
diff --git a/arch/arm/mach-s3c24xx/clock-dclk.c b/arch/arm/mach-s3c24xx/clock-dclk.c
deleted file mode 100644
index 1edd9b2369c5..000000000000
--- a/arch/arm/mach-s3c24xx/clock-dclk.c
+++ /dev/null
@@ -1,195 +0,0 @@
-/*
- * Copyright (c) 2004-2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C24XX - definitions for DCLK and CLKOUT registers
- */
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <mach/regs-clock.h>
-#include <mach/regs-gpio.h>
-#include <plat/clock.h>
-#include <plat/cpu.h>
-/* clocks that could be registered by external code */
-static int s3c24xx_dclk_enable(struct clk *clk, int enable)
-{
-        unsigned long dclkcon = __raw_readl(S3C24XX_DCLKCON);
-        if (enable)
-                dclkcon |= clk->ctrlbit;
-        else
-                dclkcon &= ~clk->ctrlbit;
-        __raw_writel(dclkcon, S3C24XX_DCLKCON);
-        return 0;
-}
-static int s3c24xx_dclk_setparent(struct clk *clk, struct clk *parent)
-{
-        unsigned long dclkcon;
-        unsigned int uclk;
-        if (parent == &clk_upll)
-                uclk = 1;
-        else if (parent == &clk_p)
-                uclk = 0;
-        else
-                return -EINVAL;
-        clk->parent = parent;
-        dclkcon = __raw_readl(S3C24XX_DCLKCON);
-        if (clk->ctrlbit == S3C2410_DCLKCON_DCLK0EN) {
-                if (uclk)
-                        dclkcon |= S3C2410_DCLKCON_DCLK0_UCLK;
-                else
-                        dclkcon &= ~S3C2410_DCLKCON_DCLK0_UCLK;
-        } else {
-                if (uclk)
-                        dclkcon |= S3C2410_DCLKCON_DCLK1_UCLK;
-                else
-                        dclkcon &= ~S3C2410_DCLKCON_DCLK1_UCLK;
-        }
-        __raw_writel(dclkcon, S3C24XX_DCLKCON);
-        return 0;
-}
-static unsigned long s3c24xx_calc_div(struct clk *clk, unsigned long rate)
-{
-        unsigned long div;
-        if ((rate == 0) || !clk->parent)
-                return 0;
-        div = clk_get_rate(clk->parent) / rate;
-        if (div < 2)
-                div = 2;
-        else if (div > 16)
-                div = 16;
-        return div;
-}
-static unsigned long s3c24xx_round_dclk_rate(struct clk *clk,
-        unsigned long rate)
-{
-        unsigned long div = s3c24xx_calc_div(clk, rate);
-        if (div == 0)
-                return 0;
-        return clk_get_rate(clk->parent) / div;
-}
-static int s3c24xx_set_dclk_rate(struct clk *clk, unsigned long rate)
-{
-        unsigned long mask, data, div = s3c24xx_calc_div(clk, rate);
-        if (div == 0)
-                return -EINVAL;
-        if (clk == &s3c24xx_dclk0) {
-                mask = S3C2410_DCLKCON_DCLK0_DIV_MASK |
-                        S3C2410_DCLKCON_DCLK0_CMP_MASK;
-                data = S3C2410_DCLKCON_DCLK0_DIV(div) |
-                        S3C2410_DCLKCON_DCLK0_CMP((div + 1) / 2);
-        } else if (clk == &s3c24xx_dclk1) {
-                mask = S3C2410_DCLKCON_DCLK1_DIV_MASK |
-                        S3C2410_DCLKCON_DCLK1_CMP_MASK;
-                data = S3C2410_DCLKCON_DCLK1_DIV(div) |
-                        S3C2410_DCLKCON_DCLK1_CMP((div + 1) / 2);
-        } else
-                return -EINVAL;
-        clk->rate = clk_get_rate(clk->parent) / div;
-        __raw_writel(((__raw_readl(S3C24XX_DCLKCON) & ~mask) | data),
-                S3C24XX_DCLKCON);
-        return clk->rate;
-}
-static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent)
-{
-        unsigned long mask;
-        unsigned long source;
-        /* calculate the MISCCR setting for the clock */
-        if (parent == &clk_mpll)
-                source = S3C2410_MISCCR_CLK0_MPLL;
-        else if (parent == &clk_upll)
-                source = S3C2410_MISCCR_CLK0_UPLL;
-        else if (parent == &clk_f)
-                source = S3C2410_MISCCR_CLK0_FCLK;
-        else if (parent == &clk_h)
-                source = S3C2410_MISCCR_CLK0_HCLK;
-        else if (parent == &clk_p)
-                source = S3C2410_MISCCR_CLK0_PCLK;
-        else if (clk == &s3c24xx_clkout0 && parent == &s3c24xx_dclk0)
-                source = S3C2410_MISCCR_CLK0_DCLK0;
-        else if (clk == &s3c24xx_clkout1 && parent == &s3c24xx_dclk1)
-                source = S3C2410_MISCCR_CLK0_DCLK0;
-        else
-                return -EINVAL;
-        clk->parent = parent;
-        if (clk == &s3c24xx_clkout0)
-                mask = S3C2410_MISCCR_CLK0_MASK;
-        else {
-                source <<= 4;
-                mask = S3C2410_MISCCR_CLK1_MASK;
-        }
-        s3c2410_modify_misccr(mask, source);
-        return 0;
-}
-/* external clock definitions */
-static struct clk_ops dclk_ops = {
-        .set_parent     = s3c24xx_dclk_setparent,
-        .set_rate       = s3c24xx_set_dclk_rate,
-        .round_rate     = s3c24xx_round_dclk_rate,
-};
-struct clk s3c24xx_dclk0 = {
-        .name           = "dclk0",
-        .ctrlbit        = S3C2410_DCLKCON_DCLK0EN,
-        .enable         = s3c24xx_dclk_enable,
-        .ops            = &dclk_ops,
-};
-struct clk s3c24xx_dclk1 = {
-        .name           = "dclk1",
-        .ctrlbit        = S3C2410_DCLKCON_DCLK1EN,
-        .enable         = s3c24xx_dclk_enable,
-        .ops            = &dclk_ops,
-};
-static struct clk_ops clkout_ops = {
-        .set_parent     = s3c24xx_clkout_setparent,
-};
-struct clk s3c24xx_clkout0 = {
-        .name           = "clkout0",
-        .ops            = &clkout_ops,
-};
-struct clk s3c24xx_clkout1 = {
-        .name           = "clkout1",
-        .ops            = &clkout_ops,
-};
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2410.c b/arch/arm/mach-s3c24xx/clock-s3c2410.c
deleted file mode 100644
index d1afcf9252d1..000000000000
--- a/arch/arm/mach-s3c24xx/clock-s3c2410.c
+++ /dev/null
@@ -1,284 +0,0 @@
-/*
- * Copyright (c) 2006 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * S3C2410,S3C2440,S3C2442 Clock control support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-*/
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/device.h>
-#include <linux/clk.h>
-#include <linux/mutex.h>
-#include <linux/delay.h>
-#include <linux/serial_core.h>
-#include <linux/serial_s3c.h>
-#include <linux/io.h>
-#include <asm/mach/map.h>
-#include <mach/hardware.h>
-#include <mach/regs-clock.h>
-#include <mach/regs-gpio.h>
-#include <plat/clock.h>
-#include <plat/cpu.h>
-int s3c2410_clkcon_enable(struct clk *clk, int enable)
-{
-        unsigned int clocks = clk->ctrlbit;
-        unsigned long clkcon;
-        clkcon = __raw_readl(S3C2410_CLKCON);
-        if (enable)
-                clkcon |= clocks;
-        else
-                clkcon &= ~clocks;
-        /* ensure none of the special function bits set */
-        clkcon &= ~(S3C2410_CLKCON_IDLE|S3C2410_CLKCON_POWER);
-        __raw_writel(clkcon, S3C2410_CLKCON);
-        return 0;
-}
-static int s3c2410_upll_enable(struct clk *clk, int enable)
-{
-        unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW);
-        unsigned long orig = clkslow;
-        if (enable)
-                clkslow &= ~S3C2410_CLKSLOW_UCLK_OFF;
-        else
-                clkslow |= S3C2410_CLKSLOW_UCLK_OFF;
-        __raw_writel(clkslow, S3C2410_CLKSLOW);
-        /* if we started the UPLL, then allow to settle */
-        if (enable && (orig & S3C2410_CLKSLOW_UCLK_OFF))
-                udelay(200);
-        return 0;
-}
-/* standard clock definitions */
-static struct clk init_clocks_off[] = {
-        {
-                .name           = "nand",
-                .parent         = &clk_h,
-                .enable         = s3c2410_clkcon_enable,
-                .ctrlbit        = S3C2410_CLKCON_NAND,
-        }, {
-                .name           = "sdi",
-                .parent         = &clk_p,
-                .enable         = s3c2410_clkcon_enable,
-                .ctrlbit        = S3C2410_CLKCON_SDI,
-        }, {
-                .name           = "adc",
-                .parent         = &clk_p,
-                .enable         = s3c2410_clkcon_enable,
-                .ctrlbit        = S3C2410_CLKCON_ADC,
-        }, {
-                .name           = "i2c",
-                .parent         = &clk_p,
-                .enable         = s3c2410_clkcon_enable,
-                .ctrlbit        = S3C2410_CLKCON_IIC,
-        }, {
-                .name           = "iis",
-                .parent         = &clk_p,
-                .enable         = s3c2410_clkcon_enable,
-                .ctrlbit        = S3C2410_CLKCON_IIS,
-        }, {
-                .name           = "spi",
-                .parent         = &clk_p,
-                .enable         = s3c2410_clkcon_enable,
-                .ctrlbit        = S3C2410_CLKCON_SPI,
-        }
-};
-static struct clk clk_lcd = {
-        .name           = "lcd",
-        .parent         = &clk_h,
-        .enable         = s3c2410_clkcon_enable,
-        .ctrlbit        = S3C2410_CLKCON_LCDC,
-};
-static struct clk clk_gpio = {
-        .name           = "gpio",
-        .parent         = &clk_p,
-        .enable         = s3c2410_clkcon_enable,
-        .ctrlbit        = S3C2410_CLKCON_GPIO,
-};
-static struct clk clk_usb_host = {
-        .name           = "usb-host",
-        .parent         = &clk_h,
-        .enable         = s3c2410_clkcon_enable,
-        .ctrlbit        = S3C2410_CLKCON_USBH,
-};
-static struct clk clk_usb_device = {
-        .name           = "usb-device",
-        .parent         = &clk_h,
-        .enable         = s3c2410_clkcon_enable,
-        .ctrlbit        = S3C2410_CLKCON_USBD,
-};
-static struct clk clk_timers = {
-        .name           = "timers",
-        .parent         = &clk_p,
-        .enable         = s3c2410_clkcon_enable,
-        .ctrlbit        = S3C2410_CLKCON_PWMT,
-};
-struct clk s3c24xx_clk_uart0 = {
-        .name           = "uart",
-        .devname        = "s3c2410-uart.0",
-        .parent         = &clk_p,
-        .enable         = s3c2410_clkcon_enable,
-        .ctrlbit        = S3C2410_CLKCON_UART0,
-};
-struct clk s3c24xx_clk_uart1 = {
-        .name           = "uart",
-        .devname        = "s3c2410-uart.1",
-        .parent         = &clk_p,
-        .enable         = s3c2410_clkcon_enable,
-        .ctrlbit        = S3C2410_CLKCON_UART1,
-};
-struct clk s3c24xx_clk_uart2 = {
-        .name           = "uart",
-        .devname        = "s3c2410-uart.2",
-        .parent         = &clk_p,
-        .enable         = s3c2410_clkcon_enable,
-        .ctrlbit        = S3C2410_CLKCON_UART2,
-};
-static struct clk clk_rtc = {
-        .name           = "rtc",
-        .parent         = &clk_p,
-        .enable         = s3c2410_clkcon_enable,
-        .ctrlbit        = S3C2410_CLKCON_RTC,
-};
-static struct clk clk_watchdog = {
-        .name           = "watchdog",
-        .parent         = &clk_p,
-        .ctrlbit        = 0,
-};
-static struct clk clk_usb_bus_host = {
-        .name           = "usb-bus-host",
-        .parent         = &clk_usb_bus,
-};
-static struct clk clk_usb_bus_gadget = {
-        .name           = "usb-bus-gadget",
-        .parent         = &clk_usb_bus,
-};
-static struct clk *init_clocks[] = {
-        &clk_lcd,
-        &clk_gpio,
-        &clk_usb_host,
-        &clk_usb_device,
-        &clk_timers,
-        &s3c24xx_clk_uart0,
-        &s3c24xx_clk_uart1,
-        &s3c24xx_clk_uart2,
-        &clk_rtc,
-        &clk_watchdog,
-        &clk_usb_bus_host,
-        &clk_usb_bus_gadget,
-};
-/* s3c2410_baseclk_add()
- *
- * Add all the clocks used by the s3c2410 or compatible CPUs
- * such as the S3C2440 and S3C2442.
- *
- * We cannot use a system device as we are needed before any
- * of the init-calls that initialise the devices are actually
- * done.
-*/
-int __init s3c2410_baseclk_add(void)
-{
-        unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW);
-        unsigned long clkcon  = __raw_readl(S3C2410_CLKCON);
-        struct clk *xtal;
-        int ret;
-        int ptr;
-        clk_upll.enable = s3c2410_upll_enable;
-        if (s3c24xx_register_clock(&clk_usb_bus) < 0)
-                printk(KERN_ERR "failed to register usb bus clock\n");
-        /* register clocks from clock array */
-        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++) {
-                struct clk *clkp = init_clocks[ptr];
-                /* ensure that we note the clock state */
-                clkp->usage = clkcon & clkp->ctrlbit ? 1 : 0;
-                ret = s3c24xx_register_clock(clkp);
-                if (ret < 0) {
-                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
-                               clkp->name, ret);
-                }
-        }
-        /* We must be careful disabling the clocks we are not intending to
-         * be using at boot time, as subsystems such as the LCD which do
-         * their own DMA requests to the bus can cause the system to lockup
-         * if they where in the middle of requesting bus access.
-         *
-         * Disabling the LCD clock if the LCD is active is very dangerous,
-         * and therefore the bootloader should be careful to not enable
-         * the LCD clock if it is not needed.
-        */
-        /* install (and disable) the clocks we do not need immediately */
-        s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
-        s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
-        /* show the clock-slow value */
-        xtal = clk_get(NULL, "xtal");
-        printk("CLOCK: Slow mode (%ld.%ld MHz), %s, MPLL %s, UPLL %s\n",
-               print_mhz(clk_get_rate(xtal) /
-                         ( 2 * S3C2410_CLKSLOW_GET_SLOWVAL(clkslow))),
-               (clkslow & S3C2410_CLKSLOW_SLOW) ? "slow" : "fast",
-               (clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on",
-               (clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on");
-        return 0;
-}
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2412.c b/arch/arm/mach-s3c24xx/clock-s3c2412.c
deleted file mode 100644
index 192a5b2550b0..000000000000
--- a/arch/arm/mach-s3c24xx/clock-s3c2412.c
+++ /dev/null
@@ -1,760 +0,0 @@
-/* linux/arch/arm/mach-s3c2412/clock.c
- *
- * Copyright (c) 2006 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * S3C2412,S3C2413 Clock control support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-*/
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/device.h>
-#include <linux/clk.h>
-#include <linux/mutex.h>
-#include <linux/delay.h>
-#include <linux/serial_core.h>
-#include <linux/serial_s3c.h>
-#include <linux/io.h>
-#include <asm/mach/map.h>
-#include <mach/hardware.h>
-#include <mach/regs-clock.h>
-#include <mach/regs-gpio.h>
-#include <plat/clock.h>
-#include <plat/cpu.h>
-/* We currently have to assume that the system is running
- * from the XTPll input, and that all ***REFCLKs are being
- * fed from it, as we cannot read the state of OM[4] from
- * software.
- *
- * It would be possible for each board initialisation to
- * set the correct muxing at initialisation
-*/
-static int s3c2412_clkcon_enable(struct clk *clk, int enable)
-{
-        unsigned int clocks = clk->ctrlbit;
-        unsigned long clkcon;
-        clkcon = __raw_readl(S3C2410_CLKCON);
-        if (enable)
-                clkcon |= clocks;
-        else
-                clkcon &= ~clocks;
-        __raw_writel(clkcon, S3C2410_CLKCON);
-        return 0;
-}
-static int s3c2412_upll_enable(struct clk *clk, int enable)
-{
-        unsigned long upllcon = __raw_readl(S3C2410_UPLLCON);
-        unsigned long orig = upllcon;
-        if (!enable)
-                upllcon |= S3C2412_PLLCON_OFF;
-        else
-                upllcon &= ~S3C2412_PLLCON_OFF;
-        __raw_writel(upllcon, S3C2410_UPLLCON);
-        /* allow ~150uS for the PLL to settle and lock */
-        if (enable && (orig & S3C2412_PLLCON_OFF))
-                udelay(150);
-        return 0;
-}
-/* clock selections */
-static struct clk clk_erefclk = {
-        .name           = "erefclk",
-};
-static struct clk clk_urefclk = {
-        .name           = "urefclk",
-};
-static int s3c2412_setparent_usysclk(struct clk *clk, struct clk *parent)
-{
-        unsigned long clksrc = __raw_readl(S3C2412_CLKSRC);
-        if (parent == &clk_urefclk)
-                clksrc &= ~S3C2412_CLKSRC_USYSCLK_UPLL;
-        else if (parent == &clk_upll)
-                clksrc |= S3C2412_CLKSRC_USYSCLK_UPLL;
-        else
-                return -EINVAL;
-        clk->parent = parent;
-        __raw_writel(clksrc, S3C2412_CLKSRC);
-        return 0;
-}
-static struct clk clk_usysclk = {
-        .name           = "usysclk",
-        .parent         = &clk_xtal,
-        .ops            = &(struct clk_ops) {
-                .set_parent     = s3c2412_setparent_usysclk,
-        },
-};
-static struct clk clk_mrefclk = {
-        .name           = "mrefclk",
-        .parent         = &clk_xtal,
-};
-static struct clk clk_mdivclk = {
-        .name           = "mdivclk",
-        .parent         = &clk_xtal,
-};
-static int s3c2412_setparent_usbsrc(struct clk *clk, struct clk *parent)
-{
-        unsigned long clksrc = __raw_readl(S3C2412_CLKSRC);
-        if (parent == &clk_usysclk)
-                clksrc &= ~S3C2412_CLKSRC_USBCLK_HCLK;
-        else if (parent == &clk_h)
-                clksrc |= S3C2412_CLKSRC_USBCLK_HCLK;
-        else
-                return -EINVAL;
-        clk->parent = parent;
-        __raw_writel(clksrc, S3C2412_CLKSRC);
-        return 0;
-}
-static unsigned long s3c2412_roundrate_usbsrc(struct clk *clk,
-                                              unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        int div;
-        if (rate > parent_rate)
-                return parent_rate;
-        div = parent_rate / rate;
-        if (div > 2)
-                div = 2;
-        return parent_rate / div;
-}
-static unsigned long s3c2412_getrate_usbsrc(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long div = __raw_readl(S3C2410_CLKDIVN);
-        return parent_rate / ((div & S3C2412_CLKDIVN_USB48DIV) ? 2 : 1);
-}
-static int s3c2412_setrate_usbsrc(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long clkdivn = __raw_readl(S3C2410_CLKDIVN);
-        rate = s3c2412_roundrate_usbsrc(clk, rate);
-        if ((parent_rate / rate) == 2)
-                clkdivn |= S3C2412_CLKDIVN_USB48DIV;
-        else
-                clkdivn &= ~S3C2412_CLKDIVN_USB48DIV;
-        __raw_writel(clkdivn, S3C2410_CLKDIVN);
-        return 0;
-}
-static struct clk clk_usbsrc = {
-        .name           = "usbsrc",
-        .ops            = &(struct clk_ops) {
-                .get_rate       = s3c2412_getrate_usbsrc,
-                .set_rate       = s3c2412_setrate_usbsrc,
-                .round_rate     = s3c2412_roundrate_usbsrc,
-                .set_parent     = s3c2412_setparent_usbsrc,
-        },
-};
-static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent)
-{
-        unsigned long clksrc = __raw_readl(S3C2412_CLKSRC);
-        if (parent == &clk_mdivclk)
-                clksrc &= ~S3C2412_CLKSRC_MSYSCLK_MPLL;
-        else if (parent == &clk_mpll)
-                clksrc |= S3C2412_CLKSRC_MSYSCLK_MPLL;
-        else
-                return -EINVAL;
-        clk->parent = parent;
-        __raw_writel(clksrc, S3C2412_CLKSRC);
-        return 0;
-}
-static struct clk clk_msysclk = {
-        .name           = "msysclk",
-        .ops            = &(struct clk_ops) {
-                .set_parent     = s3c2412_setparent_msysclk,
-        },
-};
-static int s3c2412_setparent_armclk(struct clk *clk, struct clk *parent)
-{
-        unsigned long flags;
-        unsigned long clkdiv;
-        unsigned long dvs;
-        /* Note, we current equate fclk andf msysclk for S3C2412 */
-        if (parent == &clk_msysclk || parent == &clk_f)
-                dvs = 0;
-        else if (parent == &clk_h)
-                dvs = S3C2412_CLKDIVN_DVSEN;
-        else
-                return -EINVAL;
-        clk->parent = parent;
-        /* update this under irq lockdown, clkdivn is not protected
-         * by the clock system. */
-        local_irq_save(flags);
-        clkdiv  = __raw_readl(S3C2410_CLKDIVN);
-        clkdiv &= ~S3C2412_CLKDIVN_DVSEN;
-        clkdiv |= dvs;
-        __raw_writel(clkdiv, S3C2410_CLKDIVN);
-        local_irq_restore(flags);
-        return 0;
-}
-static struct clk clk_armclk = {
-        .name           = "armclk",
-        .parent         = &clk_msysclk,
-        .ops            = &(struct clk_ops) {
-                .set_parent     = s3c2412_setparent_armclk,
-        },
-};
-/* these next clocks have an divider immediately after them,
- * so we can register them with their divider and leave out the
- * intermediate clock stage
-*/
-static unsigned long s3c2412_roundrate_clksrc(struct clk *clk,
-                                              unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        int div;
-        if (rate > parent_rate)
-                return parent_rate;
-        /* note, we remove the +/- 1 calculations as they cancel out */
-        div = (rate / parent_rate);
-        if (div < 1)
-                div = 1;
-        else if (div > 16)
-                div = 16;
-        return parent_rate / div;
-}
-static int s3c2412_setparent_uart(struct clk *clk, struct clk *parent)
-{
-        unsigned long clksrc = __raw_readl(S3C2412_CLKSRC);
-        if (parent == &clk_erefclk)
-                clksrc &= ~S3C2412_CLKSRC_UARTCLK_MPLL;
-        else if (parent == &clk_mpll)
-                clksrc |= S3C2412_CLKSRC_UARTCLK_MPLL;
-        else
-                return -EINVAL;
-        clk->parent = parent;
-        __raw_writel(clksrc, S3C2412_CLKSRC);
-        return 0;
-}
-static unsigned long s3c2412_getrate_uart(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long div = __raw_readl(S3C2410_CLKDIVN);
-        div &= S3C2412_CLKDIVN_UARTDIV_MASK;
-        div >>= S3C2412_CLKDIVN_UARTDIV_SHIFT;
-        return parent_rate / (div + 1);
-}
-static int s3c2412_setrate_uart(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long clkdivn = __raw_readl(S3C2410_CLKDIVN);
-        rate = s3c2412_roundrate_clksrc(clk, rate);
-        clkdivn &= ~S3C2412_CLKDIVN_UARTDIV_MASK;
-        clkdivn |= ((parent_rate / rate) - 1) << S3C2412_CLKDIVN_UARTDIV_SHIFT;
-        __raw_writel(clkdivn, S3C2410_CLKDIVN);
-        return 0;
-}
-static struct clk clk_uart = {
-        .name           = "uartclk",
-        .ops            = &(struct clk_ops) {
-                .get_rate       = s3c2412_getrate_uart,
-                .set_rate       = s3c2412_setrate_uart,
-                .set_parent     = s3c2412_setparent_uart,
-                .round_rate     = s3c2412_roundrate_clksrc,
-        },
-};
-static int s3c2412_setparent_i2s(struct clk *clk, struct clk *parent)
-{
-        unsigned long clksrc = __raw_readl(S3C2412_CLKSRC);
-        if (parent == &clk_erefclk)
-                clksrc &= ~S3C2412_CLKSRC_I2SCLK_MPLL;
-        else if (parent == &clk_mpll)
-                clksrc |= S3C2412_CLKSRC_I2SCLK_MPLL;
-        else
-                return -EINVAL;
-        clk->parent = parent;
-        __raw_writel(clksrc, S3C2412_CLKSRC);
-        return 0;
-}
-static unsigned long s3c2412_getrate_i2s(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long div = __raw_readl(S3C2410_CLKDIVN);
-        div &= S3C2412_CLKDIVN_I2SDIV_MASK;
-        div >>= S3C2412_CLKDIVN_I2SDIV_SHIFT;
-        return parent_rate / (div + 1);
-}
-static int s3c2412_setrate_i2s(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long clkdivn = __raw_readl(S3C2410_CLKDIVN);
-        rate = s3c2412_roundrate_clksrc(clk, rate);
-        clkdivn &= ~S3C2412_CLKDIVN_I2SDIV_MASK;
-        clkdivn |= ((parent_rate / rate) - 1) << S3C2412_CLKDIVN_I2SDIV_SHIFT;
-        __raw_writel(clkdivn, S3C2410_CLKDIVN);
-        return 0;
-}
-static struct clk clk_i2s = {
-        .name           = "i2sclk",
-        .ops            = &(struct clk_ops) {
-                .get_rate       = s3c2412_getrate_i2s,
-                .set_rate       = s3c2412_setrate_i2s,
-                .set_parent     = s3c2412_setparent_i2s,
-                .round_rate     = s3c2412_roundrate_clksrc,
-        },
-};
-static int s3c2412_setparent_cam(struct clk *clk, struct clk *parent)
-{
-        unsigned long clksrc = __raw_readl(S3C2412_CLKSRC);
-        if (parent == &clk_usysclk)
-                clksrc &= ~S3C2412_CLKSRC_CAMCLK_HCLK;
-        else if (parent == &clk_h)
-                clksrc |= S3C2412_CLKSRC_CAMCLK_HCLK;
-        else
-                return -EINVAL;
-        clk->parent = parent;
-        __raw_writel(clksrc, S3C2412_CLKSRC);
-        return 0;
-}
-static unsigned long s3c2412_getrate_cam(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long div = __raw_readl(S3C2410_CLKDIVN);
-        div &= S3C2412_CLKDIVN_CAMDIV_MASK;
-        div >>= S3C2412_CLKDIVN_CAMDIV_SHIFT;
-        return parent_rate / (div + 1);
-}
-static int s3c2412_setrate_cam(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long clkdivn = __raw_readl(S3C2410_CLKDIVN);
-        rate = s3c2412_roundrate_clksrc(clk, rate);
-        clkdivn &= ~S3C2412_CLKDIVN_CAMDIV_MASK;
-        clkdivn |= ((parent_rate / rate) - 1) << S3C2412_CLKDIVN_CAMDIV_SHIFT;
-        __raw_writel(clkdivn, S3C2410_CLKDIVN);
-        return 0;
-}
-static struct clk clk_cam = {
-        .name           = "camif-upll", /* same as 2440 name */
-        .ops            = &(struct clk_ops) {
-                .get_rate       = s3c2412_getrate_cam,
-                .set_rate       = s3c2412_setrate_cam,
-                .set_parent     = s3c2412_setparent_cam,
-                .round_rate     = s3c2412_roundrate_clksrc,
-        },
-};
-/* standard clock definitions */
-static struct clk init_clocks_disable[] = {
-        {
-                .name           = "nand",
-                .parent         = &clk_h,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_NAND,
-        }, {
-                .name           = "sdi",
-                .parent         = &clk_p,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_SDI,
-        }, {
-                .name           = "adc",
-                .parent         = &clk_p,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_ADC,
-        }, {
-                .name           = "i2c",
-                .parent         = &clk_p,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_IIC,
-        }, {
-                .name           = "iis",
-                .parent         = &clk_p,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_IIS,
-        }, {
-                .name           = "spi",
-                .parent         = &clk_p,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_SPI,
-        }
-};
-static struct clk init_clocks[] = {
-        {
-                .name           = "dma.0",
-                .parent         = &clk_h,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_DMA0,
-        }, {
-                .name           = "dma.1",
-                .parent         = &clk_h,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_DMA1,
-        }, {
-                .name           = "dma.2",
-                .parent         = &clk_h,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_DMA2,
-        }, {
-                .name           = "dma.3",
-                .parent         = &clk_h,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_DMA3,
-        }, {
-                .name           = "lcd",
-                .parent         = &clk_h,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_LCDC,
-        }, {
-                .name           = "gpio",
-                .parent         = &clk_p,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_GPIO,
-        }, {
-                .name           = "usb-host",
-                .parent         = &clk_h,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_USBH,
-        }, {
-                .name           = "usb-device",
-                .parent         = &clk_h,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_USBD,
-        }, {
-                .name           = "timers",
-                .parent         = &clk_p,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_PWMT,
-        }, {
-                .name           = "uart",
-                .devname        = "s3c2412-uart.0",
-                .parent         = &clk_p,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_UART0,
-        }, {
-                .name           = "uart",
-                .devname        = "s3c2412-uart.1",
-                .parent         = &clk_p,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_UART1,
-        }, {
-                .name           = "uart",
-                .devname        = "s3c2412-uart.2",
-                .parent         = &clk_p,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_UART2,
-        }, {
-                .name           = "rtc",
-                .parent         = &clk_p,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_RTC,
-        }, {
-                .name           = "watchdog",
-                .parent         = &clk_p,
-                .ctrlbit        = 0,
-        }, {
-                .name           = "usb-bus-gadget",
-                .parent         = &clk_usb_bus,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_USB_DEV48,
-        }, {
-                .name           = "usb-bus-host",
-                .parent         = &clk_usb_bus,
-                .enable         = s3c2412_clkcon_enable,
-                .ctrlbit        = S3C2412_CLKCON_USB_HOST48,
-        }
-};
-/* clocks to add where we need to check their parentage */
-struct clk_init {
-        struct clk      *clk;
-        unsigned int     bit;
-        struct clk      *src_0;
-        struct clk      *src_1;
-};
-static struct clk_init clks_src[] __initdata = {
-        {
-                .clk    = &clk_usysclk,
-                .bit    = S3C2412_CLKSRC_USBCLK_HCLK,
-                .src_0  = &clk_urefclk,
-                .src_1  = &clk_upll,
-        }, {
-                .clk    = &clk_i2s,
-                .bit    = S3C2412_CLKSRC_I2SCLK_MPLL,
-                .src_0  = &clk_erefclk,
-                .src_1  = &clk_mpll,
-        }, {
-                .clk    = &clk_cam,
-                .bit    = S3C2412_CLKSRC_CAMCLK_HCLK,
-                .src_0  = &clk_usysclk,
-                .src_1  = &clk_h,
-        }, {
-                .clk    = &clk_msysclk,
-                .bit    = S3C2412_CLKSRC_MSYSCLK_MPLL,
-                .src_0  = &clk_mdivclk,
-                .src_1  = &clk_mpll,
-        }, {
-                .clk    = &clk_uart,
-                .bit    = S3C2412_CLKSRC_UARTCLK_MPLL,
-                .src_0  = &clk_erefclk,
-                .src_1  = &clk_mpll,
-        }, {
-                .clk    = &clk_usbsrc,
-                .bit    = S3C2412_CLKSRC_USBCLK_HCLK,
-                .src_0  = &clk_usysclk,
-                .src_1  = &clk_h,
-        /* here we assume  OM[4] select xtal */
-        }, {
-                .clk    = &clk_erefclk,
-                .bit    = S3C2412_CLKSRC_EREFCLK_EXTCLK,
-                .src_0  = &clk_xtal,
-                .src_1  = &clk_ext,
-        }, {
-                .clk    = &clk_urefclk,
-                .bit    = S3C2412_CLKSRC_UREFCLK_EXTCLK,
-                .src_0  = &clk_xtal,
-                .src_1  = &clk_ext,
-        },
-};
-/* s3c2412_clk_initparents
- *
- * Initialise the parents for the clocks that we get at start-time
-*/
-static void __init s3c2412_clk_initparents(void)
-{
-        unsigned long clksrc = __raw_readl(S3C2412_CLKSRC);
-        struct clk_init *cip = clks_src;
-        struct clk *src;
-        int ptr;
-        int ret;
-        for (ptr = 0; ptr < ARRAY_SIZE(clks_src); ptr++, cip++) {
-                ret = s3c24xx_register_clock(cip->clk);
-                if (ret < 0) {
-                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
-                               cip->clk->name, ret);
-                }
-                src = (clksrc & cip->bit) ? cip->src_1 : cip->src_0;
-                printk(KERN_INFO "%s: parent %s\n", cip->clk->name, src->name);
-                clk_set_parent(cip->clk, src);
-        }
-}
-/* clocks to add straight away */
-static struct clk *clks[] __initdata = {
-        &clk_ext,
-        &clk_usb_bus,
-        &clk_mrefclk,
-        &clk_armclk,
-};
-static struct clk_lookup s3c2412_clk_lookup[] = {
-        CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
-        CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
-        CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_usysclk),
-};
-int __init s3c2412_baseclk_add(void)
-{
-        unsigned long clkcon  = __raw_readl(S3C2410_CLKCON);
-        unsigned int dvs;
-        struct clk *clkp;
-        int ret;
-        int ptr;
-        clk_upll.enable = s3c2412_upll_enable;
-        clk_usb_bus.parent = &clk_usbsrc;
-        clk_usb_bus.rate = 0x0;
-        clk_f.parent = &clk_msysclk;
-        s3c2412_clk_initparents();
-        for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) {
-                clkp = clks[ptr];
-                ret = s3c24xx_register_clock(clkp);
-                if (ret < 0) {
-                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
-                               clkp->name, ret);
-                }
-        }
-        /* set the dvs state according to what we got at boot time */
-        dvs = __raw_readl(S3C2410_CLKDIVN) & S3C2412_CLKDIVN_DVSEN;
-        if (dvs)
-                clk_armclk.parent = &clk_h;
-        printk(KERN_INFO "S3C2412: DVS is %s\n", dvs ? "on" : "off");
-        /* ensure usb bus clock is within correct rate of 48MHz */
-        if (clk_get_rate(&clk_usb_bus) != (48 * 1000 * 1000)) {
-                printk(KERN_INFO "Warning: USB bus clock not at 48MHz\n");
-                /* for the moment, let's use the UPLL, and see if we can
-                 * get 48MHz */
-                clk_set_parent(&clk_usysclk, &clk_upll);
-                clk_set_parent(&clk_usbsrc, &clk_usysclk);
-                clk_set_rate(&clk_usbsrc, 48*1000*1000);
-        }
-        printk("S3C2412: upll %s, %ld.%03ld MHz, usb-bus %ld.%03ld MHz\n",
-               (__raw_readl(S3C2410_UPLLCON) & S3C2412_PLLCON_OFF) ? "off":"on",
-               print_mhz(clk_get_rate(&clk_upll)),
-               print_mhz(clk_get_rate(&clk_usb_bus)));
-        /* register clocks from clock array */
-        clkp = init_clocks;
-        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) {
-                /* ensure that we note the clock state */
-                clkp->usage = clkcon & clkp->ctrlbit ? 1 : 0;
-                ret = s3c24xx_register_clock(clkp);
-                if (ret < 0) {
-                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
-                               clkp->name, ret);
-                }
-        }
-        /* We must be careful disabling the clocks we are not intending to
-         * be using at boot time, as subsystems such as the LCD which do
-         * their own DMA requests to the bus can cause the system to lockup
-         * if they where in the middle of requesting bus access.
-         *
-         * Disabling the LCD clock if the LCD is active is very dangerous,
-         * and therefore the bootloader should be careful to not enable
-         * the LCD clock if it is not needed.
-        */
-        /* install (and disable) the clocks we do not need immediately */
-        clkp = init_clocks_disable;
-        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
-                ret = s3c24xx_register_clock(clkp);
-                if (ret < 0) {
-                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
-                               clkp->name, ret);
-                }
-                s3c2412_clkcon_enable(clkp, 0);
-        }
-        clkdev_add_table(s3c2412_clk_lookup, ARRAY_SIZE(s3c2412_clk_lookup));
-        return 0;
-}
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2416.c b/arch/arm/mach-s3c24xx/clock-s3c2416.c
deleted file mode 100644
index d421a72920a5..000000000000
--- a/arch/arm/mach-s3c24xx/clock-s3c2416.c
+++ /dev/null
@@ -1,171 +0,0 @@
-/* linux/arch/arm/mach-s3c2416/clock.c
- *
- * Copyright (c) 2010 Simtec Electronics
- * Copyright (c) 2010 Ben Dooks <ben-linux@fluff.org>
- *
- * S3C2416 Clock control support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <plat/clock.h>
-#include <plat/clock-clksrc.h>
-#include <plat/cpu.h>
-#include <plat/cpu-freq.h>
-#include <plat/pll.h>
-#include <asm/mach/map.h>
-#include <mach/regs-clock.h>
-#include <mach/regs-s3c2443-clock.h>
-/* armdiv
- *
- * this clock is sourced from msysclk and can have a number of
- * divider values applied to it to then be fed into armclk.
- * The real clock definition is done in s3c2443-clock.c,
- * only the armdiv divisor table must be defined here.
-*/
-static unsigned int armdiv[8] = {
-        [0] = 1,
-        [1] = 2,
-        [2] = 3,
-        [3] = 4,
-        [5] = 6,
-        [7] = 8,
-};
-static struct clksrc_clk hsspi_eplldiv = {
-        .clk = {
-                .name   = "hsspi-eplldiv",
-                .parent = &clk_esysclk.clk,
-                .ctrlbit = (1 << 14),
-                .enable = s3c2443_clkcon_enable_s,
-        },
-        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 24 },
-};
-static struct clk *hsspi_sources[] = {
-        [0] = &hsspi_eplldiv.clk,
-        [1] = NULL, /* to fix */
-};
-static struct clksrc_clk hsspi_mux = {
-        .clk    = {
-                .name   = "hsspi-if",
-        },
-        .sources = &(struct clksrc_sources) {
-                .sources = hsspi_sources,
-                .nr_sources = ARRAY_SIZE(hsspi_sources),
-        },
-        .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 18 },
-};
-static struct clksrc_clk hsmmc_div[] = {
-        [0] = {
-                .clk = {
-                        .name   = "hsmmc-div",
-                        .devname        = "s3c-sdhci.0",
-                        .parent = &clk_esysclk.clk,
-                },
-                .reg_div = { .reg = S3C2416_CLKDIV2, .size = 2, .shift = 6 },
-        },
-        [1] = {
-                .clk = {
-                        .name   = "hsmmc-div",
-                        .devname        = "s3c-sdhci.1",
-                        .parent = &clk_esysclk.clk,
-                },
-                .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 },
-        },
-};
-static struct clksrc_clk hsmmc_mux0 = {
-        .clk    = {
-                .name           = "hsmmc-if",
-                .devname        = "s3c-sdhci.0",
-                .ctrlbit        = (1 << 6),
-                .enable         = s3c2443_clkcon_enable_s,
-        },
-        .sources        = &(struct clksrc_sources) {
-                .nr_sources     = 2,
-                .sources        = (struct clk * []) {
-                        [0]     = &hsmmc_div[0].clk,
-                        [1]     = NULL, /* to fix */
-                },
-        },
-        .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 16 },
-};
-static struct clksrc_clk hsmmc_mux1 = {
-        .clk    = {
-                .name           = "hsmmc-if",
-                .devname        = "s3c-sdhci.1",
-                .ctrlbit        = (1 << 12),
-                .enable         = s3c2443_clkcon_enable_s,
-        },
-        .sources        = &(struct clksrc_sources) {
-                .nr_sources     = 2,
-                .sources        = (struct clk * []) {
-                        [0]     = &hsmmc_div[1].clk,
-                        [1]     = NULL, /* to fix */
-                },
-        },
-        .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 17 },
-};
-static struct clk hsmmc0_clk = {
-        .name           = "hsmmc",
-        .devname        = "s3c-sdhci.0",
-        .parent         = &clk_h,
-        .enable         = s3c2443_clkcon_enable_h,
-        .ctrlbit        = S3C2416_HCLKCON_HSMMC0,
-};
-static struct clksrc_clk *clksrcs[] __initdata = {
-        &hsspi_eplldiv,
-        &hsspi_mux,
-        &hsmmc_div[0],
-        &hsmmc_div[1],
-        &hsmmc_mux0,
-        &hsmmc_mux1,
-};
-static struct clk_lookup s3c2416_clk_lookup[] = {
-        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &hsmmc0_clk),
-        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &hsmmc_mux0.clk),
-        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &hsmmc_mux1.clk),
-        /* s3c2443-spi.0 is used on s3c2416 and s3c2450 as well */
-        CLKDEV_INIT("s3c2443-spi.0", "spi_busclk2", &hsspi_mux.clk),
-};
-void __init s3c2416_init_clocks(int xtal)
-{
-        u32 epllcon = __raw_readl(S3C2443_EPLLCON);
-        u32 epllcon1 = __raw_readl(S3C2443_EPLLCON+4);
-        int ptr;
-        /* s3c2416 EPLL compatible with s3c64xx */
-        clk_epll.rate = s3c_get_pll6553x(xtal, epllcon, epllcon1);
-        clk_epll.parent = &clk_epllref.clk;
-        s3c2443_common_init_clocks(xtal, s3c2416_get_pll,
-                                   armdiv, ARRAY_SIZE(armdiv),
-                                   S3C2416_CLKDIV0_ARMDIV_MASK);
-        for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
-                s3c_register_clksrc(clksrcs[ptr], 1);
-        s3c24xx_register_clock(&hsmmc0_clk);
-        clkdev_add_table(s3c2416_clk_lookup, ARRAY_SIZE(s3c2416_clk_lookup));
-}
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2440.c b/arch/arm/mach-s3c24xx/clock-s3c2440.c
deleted file mode 100644
index 5527226fd61f..000000000000
--- a/arch/arm/mach-s3c24xx/clock-s3c2440.c
+++ /dev/null
@@ -1,217 +0,0 @@
-/* linux/arch/arm/mach-s3c2440/clock.c
- *
- * Copyright (c) 2004-2005 Simtec Electronics
- *      http://armlinux.simtec.co.uk/
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * S3C2440 Clock support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-*/
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/device.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/mutex.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/serial_core.h>
-#include <linux/serial_s3c.h>
-#include <mach/hardware.h>
-#include <linux/atomic.h>
-#include <asm/irq.h>
-#include <mach/regs-clock.h>
-#include <plat/clock.h>
-#include <plat/cpu.h>
-/* S3C2440 extended clock support */
-static unsigned long s3c2440_camif_upll_round(struct clk *clk,
-                                              unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        int div;
-        if (rate > parent_rate)
-                return parent_rate;
-        /* note, we remove the +/- 1 calculations for the divisor */
-        div = (parent_rate / rate) / 2;
-        if (div < 1)
-                div = 1;
-        else if (div > 16)
-                div = 16;
-        return parent_rate / (div * 2);
-}
-static int s3c2440_camif_upll_setrate(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long camdivn =  __raw_readl(S3C2440_CAMDIVN);
-        rate = s3c2440_camif_upll_round(clk, rate);
-        camdivn &= ~(S3C2440_CAMDIVN_CAMCLK_SEL | S3C2440_CAMDIVN_CAMCLK_MASK);
-        if (rate != parent_rate) {
-                camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL;
-                camdivn |= (((parent_rate / rate) / 2) - 1);
-        }
-        __raw_writel(camdivn, S3C2440_CAMDIVN);
-        return 0;
-}
-static unsigned long s3c2440_camif_upll_getrate(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long camdivn =  __raw_readl(S3C2440_CAMDIVN);
-        if (!(camdivn & S3C2440_CAMDIVN_CAMCLK_SEL))
-                return parent_rate;
-        camdivn &= S3C2440_CAMDIVN_CAMCLK_MASK;
-        return parent_rate / (camdivn + 1) / 2;
-}
-/* Extra S3C2440 clocks */
-static struct clk s3c2440_clk_cam = {
-        .name           = "camif",
-        .enable         = s3c2410_clkcon_enable,
-        .ctrlbit        = S3C2440_CLKCON_CAMERA,
-};
-static struct clk s3c2440_clk_cam_upll = {
-        .name           = "camif-upll",
-        .ops            = &(struct clk_ops) {
-                .set_rate       = s3c2440_camif_upll_setrate,
-                .get_rate       = s3c2440_camif_upll_getrate,
-                .round_rate     = s3c2440_camif_upll_round,
-        },
-};
-static struct clk s3c2440_clk_ac97 = {
-        .name           = "ac97",
-        .enable         = s3c2410_clkcon_enable,
-        .ctrlbit        = S3C2440_CLKCON_AC97,
-};
-#define S3C24XX_VA_UART0      (S3C_VA_UART)
-#define S3C24XX_VA_UART1      (S3C_VA_UART + 0x4000 )
-#define S3C24XX_VA_UART2      (S3C_VA_UART + 0x8000 )
-#define S3C24XX_VA_UART3      (S3C_VA_UART + 0xC000 )
-static unsigned long  s3c2440_fclk_n_getrate(struct clk *clk)
-{
-        unsigned long ucon0, ucon1, ucon2, divisor;
-        /* the fun of calculating the uart divisors on the s3c2440 */
-        ucon0 = __raw_readl(S3C24XX_VA_UART0 + S3C2410_UCON);
-        ucon1 = __raw_readl(S3C24XX_VA_UART1 + S3C2410_UCON);
-        ucon2 = __raw_readl(S3C24XX_VA_UART2 + S3C2410_UCON);
-        ucon0 &= S3C2440_UCON0_DIVMASK;
-        ucon1 &= S3C2440_UCON1_DIVMASK;
-        ucon2 &= S3C2440_UCON2_DIVMASK;
-        if (ucon0 != 0)
-                divisor = (ucon0 >> S3C2440_UCON_DIVSHIFT) + 6;
-        else if (ucon1 != 0)
-                divisor = (ucon1 >> S3C2440_UCON_DIVSHIFT) + 21;
-        else if (ucon2 != 0)
-                divisor = (ucon2 >> S3C2440_UCON_DIVSHIFT) + 36;
-        else
-                /* manual calims 44, seems to be 9 */
-                divisor = 9;
-        return clk_get_rate(clk->parent) / divisor;
-}
-static struct clk s3c2440_clk_fclk_n = {
-        .name           = "fclk_n",
-        .parent         = &clk_f,
-        .ops            = &(struct clk_ops) {
-                .get_rate       = s3c2440_fclk_n_getrate,
-        },
-};
-static struct clk_lookup s3c2440_clk_lookup[] = {
-        CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
-        CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
-        CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n),
-        CLKDEV_INIT("s3c2440-uart.0", "uart", &s3c24xx_clk_uart0),
-        CLKDEV_INIT("s3c2440-uart.1", "uart", &s3c24xx_clk_uart1),
-        CLKDEV_INIT("s3c2440-uart.2", "uart", &s3c24xx_clk_uart2),
-        CLKDEV_INIT("s3c2440-camif", "camera", &s3c2440_clk_cam_upll),
-};
-static int __init_refok s3c2440_clk_add(struct device *dev, struct subsys_interface *sif)
-{
-        struct clk *clock_upll;
-        struct clk *clock_h;
-        struct clk *clock_p;
-        clock_p = clk_get(NULL, "pclk");
-        clock_h = clk_get(NULL, "hclk");
-        clock_upll = clk_get(NULL, "upll");
-        if (IS_ERR(clock_p) || IS_ERR(clock_h) || IS_ERR(clock_upll)) {
-                printk(KERN_ERR "S3C2440: Failed to get parent clocks\n");
-                return -EINVAL;
-        }
-        s3c2440_clk_cam.parent = clock_h;
-        s3c2440_clk_ac97.parent = clock_p;
-        s3c2440_clk_cam_upll.parent = clock_upll;
-        s3c24xx_register_clock(&s3c2440_clk_fclk_n);
-        s3c24xx_register_clock(&s3c2440_clk_ac97);
-        s3c24xx_register_clock(&s3c2440_clk_cam);
-        s3c24xx_register_clock(&s3c2440_clk_cam_upll);
-        clkdev_add_table(s3c2440_clk_lookup, ARRAY_SIZE(s3c2440_clk_lookup));
-        clk_disable(&s3c2440_clk_ac97);
-        clk_disable(&s3c2440_clk_cam);
-        return 0;
-}
-static struct subsys_interface s3c2440_clk_interface = {
-        .name           = "s3c2440_clk",
-        .subsys         = &s3c2440_subsys,
-        .add_dev        = s3c2440_clk_add,
-};
-static __init int s3c24xx_clk_init(void)
-{
-        return subsys_interface_register(&s3c2440_clk_interface);
-}
-arch_initcall(s3c24xx_clk_init);
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2443.c b/arch/arm/mach-s3c24xx/clock-s3c2443.c
deleted file mode 100644
index 76cd31f7804e..000000000000
--- a/arch/arm/mach-s3c24xx/clock-s3c2443.c
+++ /dev/null
@@ -1,212 +0,0 @@
-/* linux/arch/arm/mach-s3c2443/clock.c
- *
- * Copyright (c) 2007, 2010 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * S3C2443 Clock control support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-*/
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/device.h>
-#include <linux/clk.h>
-#include <linux/mutex.h>
-#include <linux/serial_core.h>
-#include <linux/io.h>
-#include <asm/mach/map.h>
-#include <mach/hardware.h>
-#include <mach/regs-s3c2443-clock.h>
-#include <plat/cpu-freq.h>
-#include <plat/clock.h>
-#include <plat/clock-clksrc.h>
-#include <plat/cpu.h>
-/* We currently have to assume that the system is running
- * from the XTPll input, and that all ***REFCLKs are being
- * fed from it, as we cannot read the state of OM[4] from
- * software.
- *
- * It would be possible for each board initialisation to
- * set the correct muxing at initialisation
-*/
-/* clock selections */
-/* armdiv
- *
- * this clock is sourced from msysclk and can have a number of
- * divider values applied to it to then be fed into armclk.
- * The real clock definition is done in s3c2443-clock.c,
- * only the armdiv divisor table must be defined here.
-*/
-static unsigned int armdiv[16] = {
-        [S3C2443_CLKDIV0_ARMDIV_1 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 1,
-        [S3C2443_CLKDIV0_ARMDIV_2 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 2,
-        [S3C2443_CLKDIV0_ARMDIV_3 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 3,
-        [S3C2443_CLKDIV0_ARMDIV_4 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 4,
-        [S3C2443_CLKDIV0_ARMDIV_6 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 6,
-        [S3C2443_CLKDIV0_ARMDIV_8 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 8,
-        [S3C2443_CLKDIV0_ARMDIV_12 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]     = 12,
-        [S3C2443_CLKDIV0_ARMDIV_16 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]     = 16,
-};
-/* hsspi
- *
- * high-speed spi clock, sourced from esysclk
-*/
-static struct clksrc_clk clk_hsspi = {
-        .clk    = {
-                .name           = "hsspi-if",
-                .parent         = &clk_esysclk.clk,
-                .ctrlbit        = S3C2443_SCLKCON_HSSPICLK,
-                .enable         = s3c2443_clkcon_enable_s,
-        },
-        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 4 },
-};
-/* clk_hsmcc_div
- *
- * this clock is sourced from epll, and is fed through a divider,
- * to a mux controlled by sclkcon where either it or a extclk can
- * be fed to the hsmmc block
-*/
-static struct clksrc_clk clk_hsmmc_div = {
-        .clk    = {
-                .name           = "hsmmc-div",
-                .devname        = "s3c-sdhci.1",
-                .parent         = &clk_esysclk.clk,
-        },
-        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 },
-};
-static int s3c2443_setparent_hsmmc(struct clk *clk, struct clk *parent)
-{
-        unsigned long clksrc = __raw_readl(S3C2443_SCLKCON);
-        clksrc &= ~(S3C2443_SCLKCON_HSMMCCLK_EXT |
-                    S3C2443_SCLKCON_HSMMCCLK_EPLL);
-        if (parent == &clk_epll)
-                clksrc |= S3C2443_SCLKCON_HSMMCCLK_EPLL;
-        else if (parent == &clk_ext)
-                clksrc |= S3C2443_SCLKCON_HSMMCCLK_EXT;
-        else
-                return -EINVAL;
-        if (clk->usage > 0) {
-                __raw_writel(clksrc, S3C2443_SCLKCON);
-        }
-        clk->parent = parent;
-        return 0;
-}
-static int s3c2443_enable_hsmmc(struct clk *clk, int enable)
-{
-        return s3c2443_setparent_hsmmc(clk, clk->parent);
-}
-static struct clk clk_hsmmc = {
-        .name           = "hsmmc-if",
-        .devname        = "s3c-sdhci.1",
-        .parent         = &clk_hsmmc_div.clk,
-        .enable         = s3c2443_enable_hsmmc,
-        .ops            = &(struct clk_ops) {
-                .set_parent     = s3c2443_setparent_hsmmc,
-        },
-};
-/* standard clock definitions */
-static struct clk init_clocks_off[] = {
-        {
-                .name           = "sdi",
-                .parent         = &clk_p,
-                .enable         = s3c2443_clkcon_enable_p,
-                .ctrlbit        = S3C2443_PCLKCON_SDI,
-        }, {
-                .name           = "spi",
-                .devname        = "s3c2410-spi.0",
-                .parent         = &clk_p,
-                .enable         = s3c2443_clkcon_enable_p,
-                .ctrlbit        = S3C2443_PCLKCON_SPI1,
-        }
-};
-/* clocks to add straight away */
-static struct clksrc_clk *clksrcs[] __initdata = {
-        &clk_hsspi,
-        &clk_hsmmc_div,
-};
-static struct clk *clks[] __initdata = {
-        &clk_hsmmc,
-};
-static struct clk_lookup s3c2443_clk_lookup[] = {
-        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_hsmmc),
-        CLKDEV_INIT("s3c2443-spi.0", "spi_busclk2", &clk_hsspi.clk),
-};
-void __init s3c2443_init_clocks(int xtal)
-{
-        unsigned long epllcon = __raw_readl(S3C2443_EPLLCON);
-        int ptr;
-        clk_epll.rate = s3c2443_get_epll(epllcon, xtal);
-        clk_epll.parent = &clk_epllref.clk;
-        s3c2443_common_init_clocks(xtal, s3c2443_get_mpll,
-                                   armdiv, ARRAY_SIZE(armdiv),
-                                   S3C2443_CLKDIV0_ARMDIV_MASK);
-        s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
-        for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
-                s3c_register_clksrc(clksrcs[ptr], 1);
-        /* We must be careful disabling the clocks we are not intending to
-         * be using at boot time, as subsystems such as the LCD which do
-         * their own DMA requests to the bus can cause the system to lockup
-         * if they where in the middle of requesting bus access.
-         *
-         * Disabling the LCD clock if the LCD is active is very dangerous,
-         * and therefore the bootloader should be careful to not enable
-         * the LCD clock if it is not needed.
-        */
-        /* install (and disable) the clocks we do not need immediately */
-        s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
-        s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
-        clkdev_add_table(s3c2443_clk_lookup, ARRAY_SIZE(s3c2443_clk_lookup));
-}
diff --git a/arch/arm/mach-s3c24xx/clock-s3c244x.c b/arch/arm/mach-s3c24xx/clock-s3c244x.c
deleted file mode 100644
index 6d9b688c442b..000000000000
--- a/arch/arm/mach-s3c24xx/clock-s3c244x.c
+++ /dev/null
@@ -1,141 +0,0 @@
-/* linux/arch/arm/plat-s3c24xx/s3c24xx-clock.c
- *
- * Copyright (c) 2004-2008 Simtec Electronics
- *      http://armlinux.simtec.co.uk/
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * S3C2440/S3C2442 Common clock support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-*/
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/device.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include <linux/atomic.h>
-#include <asm/irq.h>
-#include <mach/regs-clock.h>
-#include <plat/clock.h>
-#include <plat/cpu.h>
-static int s3c2440_setparent_armclk(struct clk *clk, struct clk *parent)
-{
-        unsigned long camdivn;
-        unsigned long dvs;
-        if (parent == &clk_f)
-                dvs = 0;
-        else if (parent == &clk_h)
-                dvs = S3C2440_CAMDIVN_DVSEN;
-        else
-                return -EINVAL;
-        clk->parent = parent;
-        camdivn  = __raw_readl(S3C2440_CAMDIVN);
-        camdivn &= ~S3C2440_CAMDIVN_DVSEN;
-        camdivn |= dvs;
-        __raw_writel(camdivn, S3C2440_CAMDIVN);
-        return 0;
-}
-static struct clk clk_arm = {
-        .name           = "armclk",
-        .id             = -1,
-        .ops            = &(struct clk_ops) {
-                .set_parent     = s3c2440_setparent_armclk,
-        },
-};
-static int s3c244x_clk_add(struct device *dev, struct subsys_interface *sif)
-{
-        unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
-        unsigned long clkdivn;
-        struct clk *clock_upll;
-        int ret;
-        printk("S3C244X: Clock Support, DVS %s\n",
-               (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off");
-        clk_arm.parent = (camdivn & S3C2440_CAMDIVN_DVSEN) ? &clk_h : &clk_f;
-        ret = s3c24xx_register_clock(&clk_arm);
-        if (ret < 0) {
-                printk(KERN_ERR "S3C24XX: Failed to add armclk (%d)\n", ret);
-                return ret;
-        }
-        clock_upll = clk_get(NULL, "upll");
-        if (IS_ERR(clock_upll)) {
-                printk(KERN_ERR "S3C244X: Failed to get upll clock\n");
-                return -ENOENT;
-        }
-        /* check rate of UPLL, and if it is near 96MHz, then change
-         * to using half the UPLL rate for the system */
-        if (clk_get_rate(clock_upll) > (94 * MHZ)) {
-                clk_usb_bus.rate = clk_get_rate(clock_upll) / 2;
-                spin_lock(&clocks_lock);
-                clkdivn = __raw_readl(S3C2410_CLKDIVN);
-                clkdivn |= S3C2440_CLKDIVN_UCLK;
-                __raw_writel(clkdivn, S3C2410_CLKDIVN);
-                spin_unlock(&clocks_lock);
-        }
-        return 0;
-}
-static struct subsys_interface s3c2440_clk_interface = {
-        .name           = "s3c2440_clk",
-        .subsys         = &s3c2440_subsys,
-        .add_dev        = s3c244x_clk_add,
-};
-static int s3c2440_clk_init(void)
-{
-        return subsys_interface_register(&s3c2440_clk_interface);
-}
-arch_initcall(s3c2440_clk_init);
-static struct subsys_interface s3c2442_clk_interface = {
-        .name           = "s3c2442_clk",
-        .subsys         = &s3c2442_subsys,
-        .add_dev        = s3c244x_clk_add,
-};
-static int s3c2442_clk_init(void)
-{
-        return subsys_interface_register(&s3c2442_clk_interface);
-}
-arch_initcall(s3c2442_clk_init);
diff --git a/arch/arm/mach-s3c24xx/common-s3c2443.c b/arch/arm/mach-s3c24xx/common-s3c2443.c
deleted file mode 100644
index 65d3eef73090..000000000000
--- a/arch/arm/mach-s3c24xx/common-s3c2443.c
+++ /dev/null
@@ -1,675 +0,0 @@
-/*
- * Common code for SoCs starting with the S3C2443
- *
- * Copyright (c) 2007, 2010 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <mach/regs-s3c2443-clock.h>
-#include <plat/clock.h>
-#include <plat/clock-clksrc.h>
-#include <plat/cpu.h>
-#include <plat/cpu-freq.h>
-static int s3c2443_gate(void __iomem *reg, struct clk *clk, int enable)
-{
-        u32 ctrlbit = clk->ctrlbit;
-        u32 con = __raw_readl(reg);
-        if (enable)
-                con |= ctrlbit;
-        else
-                con &= ~ctrlbit;
-        __raw_writel(con, reg);
-        return 0;
-}
-int s3c2443_clkcon_enable_h(struct clk *clk, int enable)
-{
-        return s3c2443_gate(S3C2443_HCLKCON, clk, enable);
-}
-int s3c2443_clkcon_enable_p(struct clk *clk, int enable)
-{
-        return s3c2443_gate(S3C2443_PCLKCON, clk, enable);
-}
-int s3c2443_clkcon_enable_s(struct clk *clk, int enable)
-{
-        return s3c2443_gate(S3C2443_SCLKCON, clk, enable);
-}
-/* mpllref is a direct descendant of clk_xtal by default, but it is not
- * elided as the EPLL can be either sourced by the XTAL or EXTCLK and as
- * such directly equating the two source clocks is impossible.
- */
-static struct clk clk_mpllref = {
-        .name           = "mpllref",
-        .parent         = &clk_xtal,
-};
-static struct clk *clk_epllref_sources[] = {
-        [0] = &clk_mpllref,
-        [1] = &clk_mpllref,
-        [2] = &clk_xtal,
-        [3] = &clk_ext,
-};
-struct clksrc_clk clk_epllref = {
-        .clk    = {
-                .name           = "epllref",
-        },
-        .sources = &(struct clksrc_sources) {
-                .sources = clk_epllref_sources,
-                .nr_sources = ARRAY_SIZE(clk_epllref_sources),
-        },
-        .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 7 },
-};
-/* esysclk
- *
- * this is sourced from either the EPLL or the EPLLref clock
-*/
-static struct clk *clk_sysclk_sources[] = {
-        [0] = &clk_epllref.clk,
-        [1] = &clk_epll,
-};
-struct clksrc_clk clk_esysclk = {
-        .clk    = {
-                .name           = "esysclk",
-                .parent         = &clk_epll,
-        },
-        .sources = &(struct clksrc_sources) {
-                .sources = clk_sysclk_sources,
-                .nr_sources = ARRAY_SIZE(clk_sysclk_sources),
-        },
-        .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 6 },
-};
-static unsigned long s3c2443_getrate_mdivclk(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long div = __raw_readl(S3C2443_CLKDIV0);
-        div  &= S3C2443_CLKDIV0_EXTDIV_MASK;
-        div >>= (S3C2443_CLKDIV0_EXTDIV_SHIFT-1);       /* x2 */
-        return parent_rate / (div + 1);
-}
-static struct clk clk_mdivclk = {
-        .name           = "mdivclk",
-        .parent         = &clk_mpllref,
-        .ops            = &(struct clk_ops) {
-                .get_rate       = s3c2443_getrate_mdivclk,
-        },
-};
-static struct clk *clk_msysclk_sources[] = {
-        [0] = &clk_mpllref,
-        [1] = &clk_mpll,
-        [2] = &clk_mdivclk,
-        [3] = &clk_mpllref,
-};
-static struct clksrc_clk clk_msysclk = {
-        .clk    = {
-                .name           = "msysclk",
-                .parent         = &clk_xtal,
-        },
-        .sources = &(struct clksrc_sources) {
-                .sources = clk_msysclk_sources,
-                .nr_sources = ARRAY_SIZE(clk_msysclk_sources),
-        },
-        .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 3 },
-};
-/* prediv
- *
- * this divides the msysclk down to pass to h/p/etc.
- */
-static unsigned long s3c2443_prediv_getrate(struct clk *clk)
-{
-        unsigned long rate = clk_get_rate(clk->parent);
-        unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0);
-        clkdiv0 &= S3C2443_CLKDIV0_PREDIV_MASK;
-        clkdiv0 >>= S3C2443_CLKDIV0_PREDIV_SHIFT;
-        return rate / (clkdiv0 + 1);
-}
-static struct clk clk_prediv = {
-        .name           = "prediv",
-        .parent         = &clk_msysclk.clk,
-        .ops            = &(struct clk_ops) {
-                .get_rate       = s3c2443_prediv_getrate,
-        },
-};
-/* hclk divider
- *
- * divides the prediv and provides the hclk.
- */
-static unsigned long s3c2443_hclkdiv_getrate(struct clk *clk)
-{
-        unsigned long rate = clk_get_rate(clk->parent);
-        unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0);
-        clkdiv0 &= S3C2443_CLKDIV0_HCLKDIV_MASK;
-        return rate / (clkdiv0 + 1);
-}
-static struct clk_ops clk_h_ops = {
-        .get_rate       = s3c2443_hclkdiv_getrate,
-};
-/* pclk divider
- *
- * divides the hclk and provides the pclk.
- */
-static unsigned long s3c2443_pclkdiv_getrate(struct clk *clk)
-{
-        unsigned long rate = clk_get_rate(clk->parent);
-        unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0);
-        clkdiv0 = ((clkdiv0 & S3C2443_CLKDIV0_HALF_PCLK) ? 1 : 0);
-        return rate / (clkdiv0 + 1);
-}
-static struct clk_ops clk_p_ops = {
-        .get_rate       = s3c2443_pclkdiv_getrate,
-};
-/* armdiv
- *
- * this clock is sourced from msysclk and can have a number of
- * divider values applied to it to then be fed into armclk.
-*/
-static unsigned int *armdiv;
-static int nr_armdiv;
-static int armdivmask;
-static unsigned long s3c2443_armclk_roundrate(struct clk *clk,
-                                              unsigned long rate)
-{
-        unsigned long parent = clk_get_rate(clk->parent);
-        unsigned long calc;
-        unsigned best = 256; /* bigger than any value */
-        unsigned div;
-        int ptr;
-        if (!nr_armdiv)
-                return -EINVAL;
-        for (ptr = 0; ptr < nr_armdiv; ptr++) {
-                div = armdiv[ptr];
-                if (div) {
-                        /* cpufreq provides 266mhz as 266666000 not 266666666 */
-                        calc = (parent / div / 1000) * 1000;
-                        if (calc <= rate && div < best)
-                                best = div;
-                }
-        }
-        return parent / best;
-}
-static unsigned long s3c2443_armclk_getrate(struct clk *clk)
-{
-        unsigned long rate = clk_get_rate(clk->parent);
-        unsigned long clkcon0;
-        int val;
-        if (!nr_armdiv || !armdivmask)
-                return -EINVAL;
-        clkcon0 = __raw_readl(S3C2443_CLKDIV0);
-        clkcon0 &= armdivmask;
-        val = clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT;
-        return rate / armdiv[val];
-}
-static int s3c2443_armclk_setrate(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent = clk_get_rate(clk->parent);
-        unsigned long calc;
-        unsigned div;
-        unsigned best = 256; /* bigger than any value */
-        int ptr;
-        int val = -1;
-        if (!nr_armdiv || !armdivmask)
-                return -EINVAL;
-        for (ptr = 0; ptr < nr_armdiv; ptr++) {
-                div = armdiv[ptr];
-                if (div) {
-                        /* cpufreq provides 266mhz as 266666000 not 266666666 */
-                        calc = (parent / div / 1000) * 1000;
-                        if (calc <= rate && div < best) {
-                                best = div;
-                                val = ptr;
-                        }
-                }
-        }
-        if (val >= 0) {
-                unsigned long clkcon0;
-                clkcon0 = __raw_readl(S3C2443_CLKDIV0);
-                clkcon0 &= ~armdivmask;
-                clkcon0 |= val << S3C2443_CLKDIV0_ARMDIV_SHIFT;
-                __raw_writel(clkcon0, S3C2443_CLKDIV0);
-        }
-        return (val == -1) ? -EINVAL : 0;
-}
-static struct clk clk_armdiv = {
-        .name           = "armdiv",
-        .parent         = &clk_msysclk.clk,
-        .ops            = &(struct clk_ops) {
-                .round_rate = s3c2443_armclk_roundrate,
-                .get_rate = s3c2443_armclk_getrate,
-                .set_rate = s3c2443_armclk_setrate,
-        },
-};
-/* armclk
- *
- * this is the clock fed into the ARM core itself, from armdiv or from hclk.
- */
-static struct clk *clk_arm_sources[] = {
-        [0] = &clk_armdiv,
-        [1] = &clk_h,
-};
-static struct clksrc_clk clk_arm = {
-        .clk    = {
-                .name           = "armclk",
-        },
-        .sources = &(struct clksrc_sources) {
-                .sources = clk_arm_sources,
-                .nr_sources = ARRAY_SIZE(clk_arm_sources),
-        },
-        .reg_src = { .reg = S3C2443_CLKDIV0, .size = 1, .shift = 13 },
-};
-/* usbhost
- *
- * usb host bus-clock, usually 48MHz to provide USB bus clock timing
-*/
-static struct clksrc_clk clk_usb_bus_host = {
-        .clk    = {
-                .name           = "usb-bus-host-parent",
-                .parent         = &clk_esysclk.clk,
-                .ctrlbit        = S3C2443_SCLKCON_USBHOST,
-                .enable         = s3c2443_clkcon_enable_s,
-        },
-        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 4 },
-};
-/* common clksrc clocks */
-static struct clksrc_clk clksrc_clks[] = {
-        {
-                /* camera interface bus-clock, divided down from esysclk */
-                .clk    = {
-                        .name           = "camif-upll", /* same as 2440 name */
-                        .parent         = &clk_esysclk.clk,
-                        .ctrlbit        = S3C2443_SCLKCON_CAMCLK,
-                        .enable         = s3c2443_clkcon_enable_s,
-                },
-                .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 26 },
-        }, {
-                .clk    = {
-                        .name           = "display-if",
-                        .parent         = &clk_esysclk.clk,
-                        .ctrlbit        = S3C2443_SCLKCON_DISPCLK,
-                        .enable         = s3c2443_clkcon_enable_s,
-                },
-                .reg_div = { .reg = S3C2443_CLKDIV1, .size = 8, .shift = 16 },
-        },
-};
-static struct clksrc_clk clk_esys_uart = {
-        /* ART baud-rate clock sourced from esysclk via a divisor */
-        .clk    = {
-                .name           = "uartclk",
-                .parent         = &clk_esysclk.clk,
-        },
-        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 8 },
-};
-static struct clk clk_i2s_ext = {
-        .name           = "i2s-ext",
-};
-/* i2s_eplldiv
- *
- * This clock is the output from the I2S divisor of ESYSCLK, and is separate
- * from the mux that comes after it (cannot merge into one single clock)
-*/
-static struct clksrc_clk clk_i2s_eplldiv = {
-        .clk    = {
-                .name           = "i2s-eplldiv",
-                .parent         = &clk_esysclk.clk,
-        },
-        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 12, },
-};
-/* i2s-ref
- *
- * i2s bus reference clock, selectable from external, esysclk or epllref
- *
- * Note, this used to be two clocks, but was compressed into one.
-*/
-static struct clk *clk_i2s_srclist[] = {
-        [0] = &clk_i2s_eplldiv.clk,
-        [1] = &clk_i2s_ext,
-        [2] = &clk_epllref.clk,
-        [3] = &clk_epllref.clk,
-};
-static struct clksrc_clk clk_i2s = {
-        .clk    = {
-                .name           = "i2s-if",
-                .ctrlbit        = S3C2443_SCLKCON_I2SCLK,
-                .enable         = s3c2443_clkcon_enable_s,
-        },
-        .sources = &(struct clksrc_sources) {
-                .sources = clk_i2s_srclist,
-                .nr_sources = ARRAY_SIZE(clk_i2s_srclist),
-        },
-        .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 14 },
-};
-static struct clk init_clocks_off[] = {
-        {
-                .name           = "iis",
-                .parent         = &clk_p,
-                .enable         = s3c2443_clkcon_enable_p,
-                .ctrlbit        = S3C2443_PCLKCON_IIS,
-        }, {
-                .name           = "adc",
-                .parent         = &clk_p,
-                .enable         = s3c2443_clkcon_enable_p,
-                .ctrlbit        = S3C2443_PCLKCON_ADC,
-        }, {
-                .name           = "i2c",
-                .parent         = &clk_p,
-                .enable         = s3c2443_clkcon_enable_p,
-                .ctrlbit        = S3C2443_PCLKCON_IIC,
-        }
-};
-static struct clk init_clocks[] = {
-        {
-                .name           = "dma.0",
-                .parent         = &clk_h,
-                .enable         = s3c2443_clkcon_enable_h,
-                .ctrlbit        = S3C2443_HCLKCON_DMA0,
-        }, {
-                .name           = "dma.1",
-                .parent         = &clk_h,
-                .enable         = s3c2443_clkcon_enable_h,
-                .ctrlbit        = S3C2443_HCLKCON_DMA1,
-        }, {
-                .name           = "dma.2",
-                .parent         = &clk_h,
-                .enable         = s3c2443_clkcon_enable_h,
-                .ctrlbit        = S3C2443_HCLKCON_DMA2,
-        }, {
-                .name           = "dma.3",
-                .parent         = &clk_h,
-                .enable         = s3c2443_clkcon_enable_h,
-                .ctrlbit        = S3C2443_HCLKCON_DMA3,
-        }, {
-                .name           = "dma.4",
-                .parent         = &clk_h,
-                .enable         = s3c2443_clkcon_enable_h,
-                .ctrlbit        = S3C2443_HCLKCON_DMA4,
-        }, {
-                .name           = "dma.5",
-                .parent         = &clk_h,
-                .enable         = s3c2443_clkcon_enable_h,
-                .ctrlbit        = S3C2443_HCLKCON_DMA5,
-        }, {
-                .name           = "gpio",
-                .parent         = &clk_p,
-                .enable         = s3c2443_clkcon_enable_p,
-                .ctrlbit        = S3C2443_PCLKCON_GPIO,
-        }, {
-                .name           = "usb-host",
-                .parent         = &clk_h,
-                .enable         = s3c2443_clkcon_enable_h,
-                .ctrlbit        = S3C2443_HCLKCON_USBH,
-        }, {
-                .name           = "usb-device",
-                .parent         = &clk_h,
-                .enable         = s3c2443_clkcon_enable_h,
-                .ctrlbit        = S3C2443_HCLKCON_USBD,
-        }, {
-                .name           = "lcd",
-                .parent         = &clk_h,
-                .enable         = s3c2443_clkcon_enable_h,
-                .ctrlbit        = S3C2443_HCLKCON_LCDC,
-        }, {
-                .name           = "timers",
-                .parent         = &clk_p,
-                .enable         = s3c2443_clkcon_enable_p,
-                .ctrlbit        = S3C2443_PCLKCON_PWMT,
-        }, {
-                .name           = "cfc",
-                .parent         = &clk_h,
-                .enable         = s3c2443_clkcon_enable_h,
-                .ctrlbit        = S3C2443_HCLKCON_CFC,
-        }, {
-                .name           = "ssmc",
-                .parent         = &clk_h,
-                .enable         = s3c2443_clkcon_enable_h,
-                .ctrlbit        = S3C2443_HCLKCON_SSMC,
-        }, {
-                .name           = "uart",
-                .devname        = "s3c2440-uart.0",
-                .parent         = &clk_p,
-                .enable         = s3c2443_clkcon_enable_p,
-                .ctrlbit        = S3C2443_PCLKCON_UART0,
-        }, {
-                .name           = "uart",
-                .devname        = "s3c2440-uart.1",
-                .parent         = &clk_p,
-                .enable         = s3c2443_clkcon_enable_p,
-                .ctrlbit        = S3C2443_PCLKCON_UART1,
-        }, {
-                .name           = "uart",
-                .devname        = "s3c2440-uart.2",
-                .parent         = &clk_p,
-                .enable         = s3c2443_clkcon_enable_p,
-                .ctrlbit        = S3C2443_PCLKCON_UART2,
-        }, {
-                .name           = "uart",
-                .devname        = "s3c2440-uart.3",
-                .parent         = &clk_p,
-                .enable         = s3c2443_clkcon_enable_p,
-                .ctrlbit        = S3C2443_PCLKCON_UART3,
-        }, {
-                .name           = "rtc",
-                .parent         = &clk_p,
-                .enable         = s3c2443_clkcon_enable_p,
-                .ctrlbit        = S3C2443_PCLKCON_RTC,
-        }, {
-                .name           = "watchdog",
-                .parent         = &clk_p,
-                .ctrlbit        = S3C2443_PCLKCON_WDT,
-        }, {
-                .name           = "ac97",
-                .parent         = &clk_p,
-                .ctrlbit        = S3C2443_PCLKCON_AC97,
-        }, {
-                .name           = "nand",
-                .parent         = &clk_h,
-        }, {
-                .name           = "usb-bus-host",
-                .parent         = &clk_usb_bus_host.clk,
-        }
-};
-static struct clk hsmmc1_clk = {
-        .name           = "hsmmc",
-        .devname        = "s3c-sdhci.1",
-        .parent         = &clk_h,
-        .enable         = s3c2443_clkcon_enable_h,
-        .ctrlbit        = S3C2443_HCLKCON_HSMMC,
-};
-static struct clk hsspi_clk = {
-        .name           = "spi",
-        .devname        = "s3c2443-spi.0",
-        .parent         = &clk_p,
-        .enable         = s3c2443_clkcon_enable_p,
-        .ctrlbit        = S3C2443_PCLKCON_HSSPI,
-};
-/* EPLLCON compatible enough to get on/off information */
-void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll)
-{
-        unsigned long epllcon = __raw_readl(S3C2443_EPLLCON);
-        unsigned long mpllcon = __raw_readl(S3C2443_MPLLCON);
-        struct clk *xtal_clk;
-        unsigned long xtal;
-        unsigned long pll;
-        int ptr;
-        xtal_clk = clk_get(NULL, "xtal");
-        xtal = clk_get_rate(xtal_clk);
-        clk_put(xtal_clk);
-        pll = get_mpll(mpllcon, xtal);
-        clk_msysclk.clk.rate = pll;
-        clk_mpll.rate = pll;
-        printk("CPU: MPLL %s %ld.%03ld MHz, cpu %ld.%03ld MHz, mem %ld.%03ld MHz, pclk %ld.%03ld MHz\n",
-               (mpllcon & S3C2443_PLLCON_OFF) ? "off" : "on",
-               print_mhz(pll), print_mhz(clk_get_rate(&clk_armdiv)),
-               print_mhz(clk_get_rate(&clk_h)),
-               print_mhz(clk_get_rate(&clk_p)));
-        for (ptr = 0; ptr < ARRAY_SIZE(clksrc_clks); ptr++)
-                s3c_set_clksrc(&clksrc_clks[ptr], true);
-        /* ensure usb bus clock is within correct rate of 48MHz */
-        if (clk_get_rate(&clk_usb_bus_host.clk) != (48 * 1000 * 1000)) {
-                printk(KERN_INFO "Warning: USB host bus not at 48MHz\n");
-                clk_set_rate(&clk_usb_bus_host.clk, 48*1000*1000);
-        }
-        printk("CPU: EPLL %s %ld.%03ld MHz, usb-bus %ld.%03ld MHz\n",
-               (epllcon & S3C2443_PLLCON_OFF) ? "off" : "on",
-               print_mhz(clk_get_rate(&clk_epll)),
-               print_mhz(clk_get_rate(&clk_usb_bus)));
-}
-static struct clk *clks[] __initdata = {
-        &clk_prediv,
-        &clk_mpllref,
-        &clk_mdivclk,
-        &clk_ext,
-        &clk_epll,
-        &clk_usb_bus,
-        &clk_armdiv,
-        &hsmmc1_clk,
-        &hsspi_clk,
-};
-static struct clksrc_clk *clksrcs[] __initdata = {
-        &clk_i2s_eplldiv,
-        &clk_i2s,
-        &clk_usb_bus_host,
-        &clk_epllref,
-        &clk_esysclk,
-        &clk_msysclk,
-        &clk_arm,
-};
-static struct clk_lookup s3c2443_clk_lookup[] = {
-        CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
-        CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
-        CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_esys_uart.clk),
-        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &hsmmc1_clk),
-        CLKDEV_INIT("s3c2443-spi.0", "spi_busclk0", &hsspi_clk),
-};
-void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll,
-                                       unsigned int *divs, int nr_divs,
-                                       int divmask)
-{
-        int ptr;
-        armdiv = divs;
-        nr_armdiv = nr_divs;
-        armdivmask = divmask;
-        /* s3c2443 parents h clock from prediv */
-        clk_h.parent = &clk_prediv;
-        clk_h.ops = &clk_h_ops;
-        /* and p clock from h clock */
-        clk_p.parent = &clk_h;
-        clk_p.ops = &clk_p_ops;
-        clk_usb_bus.parent = &clk_usb_bus_host.clk;
-        clk_epll.parent = &clk_epllref.clk;
-        s3c24xx_register_baseclocks(xtal);
-        s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
-        for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
-                s3c_register_clksrc(clksrcs[ptr], 1);
-        s3c_register_clksrc(clksrc_clks, ARRAY_SIZE(clksrc_clks));
-        s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
-        /* See s3c2443/etc notes on disabling clocks at init time */
-        s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
-        s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
-        clkdev_add_table(s3c2443_clk_lookup, ARRAY_SIZE(s3c2443_clk_lookup));
-        s3c2443_common_setup_clocks(get_mpll);
-}
diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c
index 1bc8e73c94f9..c0763b837745 100644
--- a/arch/arm/mach-s3c24xx/common.c
+++ b/arch/arm/mach-s3c24xx/common.c
@@ -53,6 +53,7 @@
 #include <plat/cpu-freq.h>
 #include <plat/pll.h>
 #include <plat/pwm-core.h>
+#include <plat/watchdog-reset.h>
 #include "common.h"
@@ -73,7 +74,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idcode         = 0x32410000,
                .idmask         = 0xffffffff,
                .map_io         = s3c2410_map_io,
-                .init_clocks    = s3c2410_init_clocks,
                .init_uarts     = s3c2410_init_uarts,
                .init           = s3c2410_init,
                .name           = name_s3c2410
@@ -82,7 +82,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idcode         = 0x32410002,
                .idmask         = 0xffffffff,
                .map_io         = s3c2410_map_io,
-                .init_clocks    = s3c2410_init_clocks,
                .init_uarts     = s3c2410_init_uarts,
                .init           = s3c2410a_init,
                .name           = name_s3c2410a
@@ -91,7 +90,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idcode         = 0x32440000,
                .idmask         = 0xffffffff,
                .map_io         = s3c2440_map_io,
-                .init_clocks    = s3c244x_init_clocks,
                .init_uarts     = s3c244x_init_uarts,
                .init           = s3c2440_init,
                .name           = name_s3c2440
@@ -100,7 +98,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idcode         = 0x32440001,
                .idmask         = 0xffffffff,
                .map_io         = s3c2440_map_io,
-                .init_clocks    = s3c244x_init_clocks,
                .init_uarts     = s3c244x_init_uarts,
                .init           = s3c2440_init,
                .name           = name_s3c2440a
@@ -109,7 +106,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idcode         = 0x32440aaa,
                .idmask         = 0xffffffff,
                .map_io         = s3c2442_map_io,
-                .init_clocks    = s3c244x_init_clocks,
                .init_uarts     = s3c244x_init_uarts,
                .init           = s3c2442_init,
                .name           = name_s3c2442
@@ -118,7 +114,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idcode         = 0x32440aab,
                .idmask         = 0xffffffff,
                .map_io         = s3c2442_map_io,
-                .init_clocks    = s3c244x_init_clocks,
                .init_uarts     = s3c244x_init_uarts,
                .init           = s3c2442_init,
                .name           = name_s3c2442b
@@ -127,7 +122,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idcode         = 0x32412001,
                .idmask         = 0xffffffff,
                .map_io         = s3c2412_map_io,
-                .init_clocks    = s3c2412_init_clocks,
                .init_uarts     = s3c2412_init_uarts,
                .init           = s3c2412_init,
                .name           = name_s3c2412,
@@ -136,7 +130,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idcode         = 0x32412003,
                .idmask         = 0xffffffff,
                .map_io         = s3c2412_map_io,
-                .init_clocks    = s3c2412_init_clocks,
                .init_uarts     = s3c2412_init_uarts,
                .init           = s3c2412_init,
                .name           = name_s3c2412,
@@ -145,7 +138,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idcode         = 0x32450003,
                .idmask         = 0xffffffff,
                .map_io         = s3c2416_map_io,
-                .init_clocks    = s3c2416_init_clocks,
                .init_uarts     = s3c2416_init_uarts,
                .init           = s3c2416_init,
                .name           = name_s3c2416,
@@ -154,7 +146,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idcode         = 0x32443001,
                .idmask         = 0xffffffff,
                .map_io         = s3c2443_map_io,
-                .init_clocks    = s3c2443_init_clocks,
                .init_uarts     = s3c2443_init_uarts,
                .init           = s3c2443_init,
                .name           = name_s3c2443,
@@ -316,21 +307,6 @@ struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
        },
 };
-/* initialise all the clocks */
-void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk,
-                                           unsigned long hclk,
-                                           unsigned long pclk)
-{
-        clk_upll.rate = s3c24xx_get_pll(__raw_readl(S3C2410_UPLLCON),
-                                        clk_xtal.rate);
-        clk_mpll.rate = fclk;
-        clk_h.rate = hclk;
-        clk_p.rate = pclk;
-        clk_f.rate = fclk;
-}
 #if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \
        defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442)
 static struct resource s3c2410_dma_resource[] = {
@@ -534,3 +510,62 @@ struct platform_device s3c2443_device_dma = {
        },
 };
 #endif
+#if defined(CONFIG_COMMON_CLK) && defined(CONFIG_CPU_S3C2410)
+void __init s3c2410_init_clocks(int xtal)
+{
+        s3c2410_common_clk_init(NULL, xtal, 0, S3C24XX_VA_CLKPWR);
+        samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG);
+}
+#endif
+#ifdef CONFIG_CPU_S3C2412
+void __init s3c2412_init_clocks(int xtal)
+{
+        s3c2412_common_clk_init(NULL, xtal, 0, S3C24XX_VA_CLKPWR);
+}
+#endif
+#ifdef CONFIG_CPU_S3C2416
+void __init s3c2416_init_clocks(int xtal)
+{
+        s3c2443_common_clk_init(NULL, xtal, 0, S3C24XX_VA_CLKPWR);
+}
+#endif
+#if defined(CONFIG_COMMON_CLK) && defined(CONFIG_CPU_S3C2440)
+void __init s3c2440_init_clocks(int xtal)
+{
+        s3c2410_common_clk_init(NULL, xtal, 1, S3C24XX_VA_CLKPWR);
+        samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG);
+}
+#endif
+#if defined(CONFIG_COMMON_CLK) && defined(CONFIG_CPU_S3C2442)
+void __init s3c2442_init_clocks(int xtal)
+{
+        s3c2410_common_clk_init(NULL, xtal, 2, S3C24XX_VA_CLKPWR);
+        samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG);
+}
+#endif
+#ifdef CONFIG_CPU_S3C2443
+void __init s3c2443_init_clocks(int xtal)
+{
+        s3c2443_common_clk_init(NULL, xtal, 1, S3C24XX_VA_CLKPWR);
+}
+#endif
+#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2440) || \
+        defined(CONFIG_CPU_S3C2442)
+static struct resource s3c2410_dclk_resource[] = {
+        [0] = DEFINE_RES_MEM(0x56000084, 0x4),
+};
+struct platform_device s3c2410_device_dclk = {
+        .name           = "s3c2410-dclk",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(s3c2410_dclk_resource),
+        .resource       = s3c2410_dclk_resource,
+};
+#endif
diff --git a/arch/arm/mach-s3c24xx/common.h b/arch/arm/mach-s3c24xx/common.h
index e46c10417216..ac3ff12a0601 100644
--- a/arch/arm/mach-s3c24xx/common.h
+++ b/arch/arm/mach-s3c24xx/common.h
@@ -67,16 +67,15 @@ extern struct syscore_ops s3c2416_irq_syscore_ops;
 #if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442)
 extern void s3c244x_map_io(void);
 extern void s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-extern void s3c244x_init_clocks(int xtal);
 extern void s3c244x_restart(enum reboot_mode mode, const char *cmd);
 #else
-#define s3c244x_init_clocks NULL
 #define s3c244x_init_uarts NULL
 #endif
 #ifdef CONFIG_CPU_S3C2440
 extern  int s3c2440_init(void);
 extern void s3c2440_map_io(void);
+extern void s3c2440_init_clocks(int xtal);
 extern void s3c2440_init_irq(void);
 #else
 #define s3c2440_init NULL
@@ -86,6 +85,7 @@ extern void s3c2440_init_irq(void);
 #ifdef CONFIG_CPU_S3C2442
 extern  int s3c2442_init(void);
 extern void s3c2442_map_io(void);
+extern void s3c2442_init_clocks(int xtal);
 extern void s3c2442_init_irq(void);
 #else
 #define s3c2442_init NULL
@@ -114,4 +114,21 @@ extern struct platform_device s3c2412_device_dma;
 extern struct platform_device s3c2440_device_dma;
 extern struct platform_device s3c2443_device_dma;
+extern struct platform_device s3c2410_device_dclk;
+#ifdef CONFIG_S3C2410_COMMON_CLK
+void __init s3c2410_common_clk_init(struct device_node *np, unsigned long xti_f,
+                                    int current_soc,
+                                    void __iomem *reg_base);
+#endif
+#ifdef CONFIG_S3C2412_COMMON_CLK
+void __init s3c2412_common_clk_init(struct device_node *np, unsigned long xti_f,
+                                unsigned long ext_f, void __iomem *reg_base);
+#endif
+#ifdef CONFIG_S3C2443_COMMON_CLK
+void __init s3c2443_common_clk_init(struct device_node *np, unsigned long xti_f,
+                                    int current_soc,
+                                    void __iomem *reg_base);
+#endif
 #endif /* __ARCH_ARM_MACH_S3C24XX_COMMON_H */
diff --git a/arch/arm/mach-s3c24xx/cpufreq-utils.c b/arch/arm/mach-s3c24xx/cpufreq-utils.c
index 2a0aa5684e72..d4d9514335f4 100644
--- a/arch/arm/mach-s3c24xx/cpufreq-utils.c
+++ b/arch/arm/mach-s3c24xx/cpufreq-utils.c
@@ -14,6 +14,7 @@
 #include <linux/errno.h>
 #include <linux/cpufreq.h>
 #include <linux/io.h>
+#include <linux/clk.h>
 #include <mach/map.h>
 #include <mach/regs-clock.h>
@@ -60,5 +61,6 @@ void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg)
 */
 void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg)
 {
-        __raw_writel(cfg->pll.driver_data, S3C2410_MPLLCON);
+        if (!IS_ERR(cfg->mpll))
+                clk_set_rate(cfg->mpll, cfg->pll.frequency);
 }
diff --git a/arch/arm/mach-s3c24xx/include/mach/debug-macro.S b/arch/arm/mach-s3c24xx/include/mach/debug-macro.S
deleted file mode 100644
index 2f39737544c0..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/debug-macro.S
+++ /dev/null
@@ -1,101 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/debug-macro.S
- *
- * Debugging macro include header
- *
- *  Copyright (C) 1994-1999 Russell King
- *  Copyright (C) 2005 Simtec Electronics
- *
- *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#include <mach/map.h>
-#include <mach/regs-gpio.h>
-#include <linux/serial_s3c.h>
-#define S3C2410_UART1_OFF (0x4000)
-#define SHIFT_2440TXF (14-9)
-        .macro addruart, rp, rv, tmp
-                ldr     \rp, = S3C24XX_PA_UART
-                ldr     \rv, = S3C24XX_VA_UART
-#if CONFIG_DEBUG_S3C_UART != 0
-                add     \rp, \rp, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART)
-                add     \rv, \rv, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART)
-#endif
-        .endm
-        .macro fifo_full_s3c24xx rd, rx
-                @ check for arm920 vs arm926. currently assume all arm926
-                @ devices have an 64 byte FIFO identical to the s3c2440
-                mrc     p15, 0, \rd, c0, c0
-                and     \rd, \rd, #0xff0
-                teq     \rd, #0x260
-                beq     1004f
-                mrc     p15, 0, \rd, c1, c0
-                tst     \rd, #1
-                addeq   \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
-                addne   \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
-                bic     \rd, \rd, #0xff000
-                ldr     \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
-                and     \rd, \rd, #0x00ff0000
-                teq     \rd, #0x00440000                @ is it 2440?
-1004:
-                ldr     \rd, [\rx, # S3C2410_UFSTAT]
-                moveq   \rd, \rd, lsr #SHIFT_2440TXF
-                tst     \rd, #S3C2410_UFSTAT_TXFULL
-        .endm
-        .macro  fifo_full_s3c2410 rd, rx
-                ldr     \rd, [\rx, # S3C2410_UFSTAT]
-                tst     \rd, #S3C2410_UFSTAT_TXFULL
-        .endm
-/* fifo level reading */
-        .macro fifo_level_s3c24xx rd, rx
-                @ check for arm920 vs arm926. currently assume all arm926
-                @ devices have an 64 byte FIFO identical to the s3c2440
-                mrc     p15, 0, \rd, c0, c0
-                and     \rd, \rd, #0xff0
-                teq     \rd, #0x260
-                beq     10000f
-                mrc     p15, 0, \rd, c1, c0
-                tst     \rd, #1
-                addeq   \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
-                addne   \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
-                bic     \rd, \rd, #0xff000
-                ldr     \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
-                and     \rd, \rd, #0x00ff0000
-                teq     \rd, #0x00440000                @ is it 2440?
-10000:
-                ldr     \rd, [\rx, # S3C2410_UFSTAT]
-                andne   \rd, \rd, #S3C2410_UFSTAT_TXMASK
-                andeq   \rd, \rd, #S3C2440_UFSTAT_TXMASK
-        .endm
-        .macro fifo_level_s3c2410 rd, rx
-                ldr     \rd, [\rx, # S3C2410_UFSTAT]
-                and     \rd, \rd, #S3C2410_UFSTAT_TXMASK
-        .endm
-/* Select the correct implementation depending on the configuration. The
- * S3C2440 will get selected by default, as these are the most widely
- * used variants of these
-*/
-#if defined(CONFIG_CPU_LLSERIAL_S3C2410_ONLY)
-#define fifo_full  fifo_full_s3c2410
-#define fifo_level fifo_level_s3c2410
-#elif !defined(CONFIG_CPU_LLSERIAL_S3C2440_ONLY)
-#define fifo_full  fifo_full_s3c24xx
-#define fifo_level fifo_level_s3c24xx
-#endif
-/* include the reset of the code which will do the work */
-#include <debug/samsung.S>
diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-clock.h b/arch/arm/mach-s3c24xx/include/mach/regs-clock.h
index 3415b60082d7..3db6c10de023 100644
--- a/arch/arm/mach-s3c24xx/include/mach/regs-clock.h
+++ b/arch/arm/mach-s3c24xx/include/mach/regs-clock.h
@@ -42,24 +42,6 @@
 #define S3C2410_CLKCON_IIS           (1<<17)
 #define S3C2410_CLKCON_SPI           (1<<18)
-/* DCLKCON register addresses in gpio.h */
-#define S3C2410_DCLKCON_DCLK0EN      (1<<0)
-#define S3C2410_DCLKCON_DCLK0_PCLK   (0<<1)
-#define S3C2410_DCLKCON_DCLK0_UCLK   (1<<1)
-#define S3C2410_DCLKCON_DCLK0_DIV(x) (((x) - 1 )<<4)
-#define S3C2410_DCLKCON_DCLK0_CMP(x) (((x) - 1 )<<8)
-#define S3C2410_DCLKCON_DCLK0_DIV_MASK ((0xf)<<4)
-#define S3C2410_DCLKCON_DCLK0_CMP_MASK ((0xf)<<8)
-#define S3C2410_DCLKCON_DCLK1EN      (1<<16)
-#define S3C2410_DCLKCON_DCLK1_PCLK   (0<<17)
-#define S3C2410_DCLKCON_DCLK1_UCLK   (1<<17)
-#define S3C2410_DCLKCON_DCLK1_DIV(x) (((x) - 1) <<20)
-#define S3C2410_DCLKCON_DCLK1_CMP(x) (((x) - 1) <<24)
-#define S3C2410_DCLKCON_DCLK1_DIV_MASK ((0xf) <<20)
-#define S3C2410_DCLKCON_DCLK1_CMP_MASK ((0xf) <<24)
 #define S3C2410_CLKDIVN_PDIVN        (1<<0)
 #define S3C2410_CLKDIVN_HDIVN        (1<<1)
diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h b/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h
index c2ef016032ab..c6583cfa5835 100644
--- a/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h
@@ -457,9 +457,6 @@
 /* miscellaneous control */
 #define S3C2410_MISCCR     S3C2410_GPIOREG(0x80)
-#define S3C2410_DCLKCON    S3C2410_GPIOREG(0x84)
-#define S3C24XX_DCLKCON    S3C24XX_GPIOREG2(0x84)
 /* see clock.h for dclk definitions */
diff --git a/arch/arm/mach-s3c24xx/mach-amlm5900.c b/arch/arm/mach-s3c24xx/mach-amlm5900.c
index 8ac9554aa996..5157e250dd13 100644
--- a/arch/arm/mach-s3c24xx/mach-amlm5900.c
+++ b/arch/arm/mach-s3c24xx/mach-amlm5900.c
@@ -161,11 +161,16 @@ static struct platform_device *amlm5900_devices[] __initdata = {
 static void __init amlm5900_map_io(void)
 {
        s3c24xx_init_io(amlm5900_iodesc, ARRAY_SIZE(amlm5900_iodesc));
-        s3c24xx_init_clocks(0);
        s3c24xx_init_uarts(amlm5900_uartcfgs, ARRAY_SIZE(amlm5900_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
+static void __init amlm5900_init_time(void)
+{
+        s3c2410_init_clocks(12000000);
+        samsung_timer_init();
+}
 #ifdef CONFIG_FB_S3C2410
 static struct s3c2410fb_display __initdata amlm5900_lcd_info = {
        .width          = 160,
@@ -241,6 +246,6 @@ MACHINE_START(AML_M5900, "AML_M5900")
        .map_io         = amlm5900_map_io,
        .init_irq       = s3c2410_init_irq,
        .init_machine   = amlm5900_init,
-        .init_time      = samsung_timer_init,
+        .init_time      = amlm5900_init_time,
        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-anubis.c b/arch/arm/mach-s3c24xx/mach-anubis.c
index 81a270af2336..e053581cab0b 100644
--- a/arch/arm/mach-s3c24xx/mach-anubis.c
+++ b/arch/arm/mach-s3c24xx/mach-anubis.c
@@ -46,7 +46,6 @@
 #include <net/ax88796.h>
-#include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <linux/platform_data/asoc-s3c24xx_simtec.h>
@@ -352,6 +351,7 @@ static struct platform_device anubis_device_sm501 = {
 /* Standard Anubis devices */
 static struct platform_device *anubis_devices[] __initdata = {
+        &s3c2410_device_dclk,
        &s3c_device_ohci,
        &s3c_device_wdt,
        &s3c_device_adc,
@@ -364,14 +364,6 @@ static struct platform_device *anubis_devices[] __initdata = {
        &anubis_device_sm501,
 };
-static struct clk *anubis_clocks[] __initdata = {
-        &s3c24xx_dclk0,
-        &s3c24xx_dclk1,
-        &s3c24xx_clkout0,
-        &s3c24xx_clkout1,
-        &s3c24xx_uclk,
-};
 /* I2C devices. */
 static struct i2c_board_info anubis_i2c_devs[] __initdata = {
@@ -394,23 +386,7 @@ static struct s3c24xx_audio_simtec_pdata __initdata anubis_audio = {
 static void __init anubis_map_io(void)
 {
-        /* initialise the clocks */
-        s3c24xx_dclk0.parent = &clk_upll;
-        s3c24xx_dclk0.rate   = 12*1000*1000;
-        s3c24xx_dclk1.parent = &clk_upll;
-        s3c24xx_dclk1.rate   = 24*1000*1000;
-        s3c24xx_clkout0.parent  = &s3c24xx_dclk0;
-        s3c24xx_clkout1.parent  = &s3c24xx_dclk1;
-        s3c24xx_uclk.parent  = &s3c24xx_clkout1;
-        s3c24xx_register_clocks(anubis_clocks, ARRAY_SIZE(anubis_clocks));
        s3c24xx_init_io(anubis_iodesc, ARRAY_SIZE(anubis_iodesc));
-        s3c24xx_init_clocks(0);
        s3c24xx_init_uarts(anubis_uartcfgs, ARRAY_SIZE(anubis_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
@@ -428,6 +404,12 @@ static void __init anubis_map_io(void)
        }
 }
+static void __init anubis_init_time(void)
+{
+        s3c2440_init_clocks(12000000);
+        samsung_timer_init();
+}
 static void __init anubis_init(void)
 {
        s3c_i2c0_set_platdata(NULL);
@@ -447,6 +429,6 @@ MACHINE_START(ANUBIS, "Simtec-Anubis")
        .map_io         = anubis_map_io,
        .init_machine   = anubis_init,
        .init_irq       = s3c2440_init_irq,
-        .init_time      = samsung_timer_init,
+        .init_time      = anubis_init_time,
        .restart        = s3c244x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-at2440evb.c b/arch/arm/mach-s3c24xx/mach-at2440evb.c
index d8f6bb1096cb..9db768f448a5 100644
--- a/arch/arm/mach-s3c24xx/mach-at2440evb.c
+++ b/arch/arm/mach-s3c24xx/mach-at2440evb.c
@@ -45,7 +45,6 @@
 #include <linux/mtd/nand_ecc.h>
 #include <linux/mtd/partitions.h>
-#include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <linux/platform_data/mmc-s3cmci.h>
@@ -192,11 +191,16 @@ static struct platform_device *at2440evb_devices[] __initdata = {
 static void __init at2440evb_map_io(void)
 {
        s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc));
-        s3c24xx_init_clocks(16934400);
        s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
+static void __init at2440evb_init_time(void)
+{
+        s3c2440_init_clocks(16934400);
+        samsung_timer_init();
+}
 static void __init at2440evb_init(void)
 {
        s3c24xx_fb_set_platdata(&at2440evb_fb_info);
@@ -213,6 +217,6 @@ MACHINE_START(AT2440EVB, "AT2440EVB")
        .map_io         = at2440evb_map_io,
        .init_machine   = at2440evb_init,
        .init_irq       = s3c2440_init_irq,
-        .init_time      = samsung_timer_init,
+        .init_time      = at2440evb_init_time,
        .restart        = s3c244x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-bast.c b/arch/arm/mach-s3c24xx/mach-bast.c
index e371ff53a408..f9112b801a33 100644
--- a/arch/arm/mach-s3c24xx/mach-bast.c
+++ b/arch/arm/mach-s3c24xx/mach-bast.c
@@ -51,7 +51,6 @@
 #include <mach/regs-lcd.h>
 #include <mach/gpio-samsung.h>
-#include <plat/clock.h>
 #include <plat/cpu.h>
 #include <plat/cpu-freq.h>
 #include <plat/devs.h>
@@ -523,6 +522,7 @@ static struct s3c_hwmon_pdata bast_hwmon_info = {
 // cat /sys/devices/platform/s3c24xx-adc/s3c-hwmon/in_0
 static struct platform_device *bast_devices[] __initdata = {
+        &s3c2410_device_dclk,
        &s3c_device_ohci,
        &s3c_device_lcd,
        &s3c_device_wdt,
@@ -537,14 +537,6 @@ static struct platform_device *bast_devices[] __initdata = {
        &bast_sio,
 };
-static struct clk *bast_clocks[] __initdata = {
-        &s3c24xx_dclk0,
-        &s3c24xx_dclk1,
-        &s3c24xx_clkout0,
-        &s3c24xx_clkout1,
-        &s3c24xx_uclk,
-};
 static struct s3c_cpufreq_board __initdata bast_cpufreq = {
        .refresh        = 7800, /* 7.8usec */
        .auto_io        = 1,
@@ -558,29 +550,19 @@ static struct s3c24xx_audio_simtec_pdata __initdata bast_audio = {
 static void __init bast_map_io(void)
 {
-        /* initialise the clocks */
-        s3c24xx_dclk0.parent = &clk_upll;
-        s3c24xx_dclk0.rate   = 12*1000*1000;
-        s3c24xx_dclk1.parent = &clk_upll;
-        s3c24xx_dclk1.rate   = 24*1000*1000;
-        s3c24xx_clkout0.parent  = &s3c24xx_dclk0;
-        s3c24xx_clkout1.parent  = &s3c24xx_dclk1;
-        s3c24xx_uclk.parent  = &s3c24xx_clkout1;
-        s3c24xx_register_clocks(bast_clocks, ARRAY_SIZE(bast_clocks));
        s3c_hwmon_set_platdata(&bast_hwmon_info);
        s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc));
-        s3c24xx_init_clocks(0);
        s3c24xx_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
+static void __init bast_init_time(void)
+{
+        s3c2410_init_clocks(12000000);
+        samsung_timer_init();
+}
 static void __init bast_init(void)
 {
        register_syscore_ops(&bast_pm_syscore_ops);
@@ -608,6 +590,6 @@ MACHINE_START(BAST, "Simtec-BAST")
        .map_io         = bast_map_io,
        .init_irq       = s3c2410_init_irq,
        .init_machine   = bast_init,
-        .init_time      = samsung_timer_init,
+        .init_time      = bast_init_time,
        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c
index dc4db849f0fd..fc3a08d0cb3f 100644
--- a/arch/arm/mach-s3c24xx/mach-gta02.c
+++ b/arch/arm/mach-s3c24xx/mach-gta02.c
@@ -501,7 +501,6 @@ static struct platform_device gta02_buttons_device = {
 static void __init gta02_map_io(void)
 {
        s3c24xx_init_io(gta02_iodesc, ARRAY_SIZE(gta02_iodesc));
-        s3c24xx_init_clocks(12000000);
        s3c24xx_init_uarts(gta02_uartcfgs, ARRAY_SIZE(gta02_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
@@ -585,6 +584,11 @@ static void __init gta02_machine_init(void)
        regulator_has_full_constraints();
 }
+static void __init gta02_init_time(void)
+{
+        s3c2442_init_clocks(12000000);
+        samsung_timer_init();
+}
 MACHINE_START(NEO1973_GTA02, "GTA02")
        /* Maintainer: Nelson Castillo <arhuaco@freaks-unidos.net> */
@@ -592,6 +596,6 @@ MACHINE_START(NEO1973_GTA02, "GTA02")
        .map_io         = gta02_map_io,
        .init_irq       = s3c2442_init_irq,
        .init_machine   = gta02_machine_init,
-        .init_time      = samsung_timer_init,
+        .init_time      = gta02_init_time,
        .restart        = s3c244x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-h1940.c b/arch/arm/mach-s3c24xx/mach-h1940.c
index e453acd92cbf..fbf5487ae5d1 100644
--- a/arch/arm/mach-s3c24xx/mach-h1940.c
+++ b/arch/arm/mach-s3c24xx/mach-h1940.c
@@ -57,7 +57,6 @@
 #include <mach/regs-lcd.h>
 #include <mach/gpio-samsung.h>
-#include <plat/clock.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/gpio-cfg.h>
@@ -646,7 +645,6 @@ static struct platform_device *h1940_devices[] __initdata = {
 static void __init h1940_map_io(void)
 {
        s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc));
-        s3c24xx_init_clocks(0);
        s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
@@ -662,6 +660,12 @@ static void __init h1940_map_io(void)
        WARN_ON(gpiochip_add(&h1940_latch_gpiochip));
 }
+static void __init h1940_init_time(void)
+{
+        s3c2410_init_clocks(12000000);
+        samsung_timer_init();
+}
 /* H1940 and RX3715 need to reserve this for suspend */
 static void __init h1940_reserve(void)
 {
@@ -739,6 +743,6 @@ MACHINE_START(H1940, "IPAQ-H1940")
        .reserve        = h1940_reserve,
        .init_irq       = s3c2410_init_irq,
        .init_machine   = h1940_init,
-        .init_time      = samsung_timer_init,
+        .init_time      = h1940_init_time,
        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-jive.c b/arch/arm/mach-s3c24xx/mach-jive.c
index 5faa7239e7d6..e81ea82c55f9 100644
--- a/arch/arm/mach-s3c24xx/mach-jive.c
+++ b/arch/arm/mach-s3c24xx/mach-jive.c
@@ -507,11 +507,16 @@ static struct syscore_ops jive_pm_syscore_ops = {
 static void __init jive_map_io(void)
 {
        s3c24xx_init_io(jive_iodesc, ARRAY_SIZE(jive_iodesc));
-        s3c24xx_init_clocks(12000000);
        s3c24xx_init_uarts(jive_uartcfgs, ARRAY_SIZE(jive_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
+static void __init jive_init_time(void)
+{
+        s3c2412_init_clocks(12000000);
+        samsung_timer_init();
+}
 static void jive_power_off(void)
 {
        printk(KERN_INFO "powering system down...\n");
@@ -665,6 +670,6 @@ MACHINE_START(JIVE, "JIVE")
        .init_irq       = s3c2412_init_irq,
        .map_io         = jive_map_io,
        .init_machine   = jive_machine_init,
-        .init_time      = samsung_timer_init,
+        .init_time      = jive_init_time,
        .restart        = s3c2412_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-mini2440.c b/arch/arm/mach-s3c24xx/mach-mini2440.c
index 9e57fd9f4f3b..5cc40ec1d254 100644
--- a/arch/arm/mach-s3c24xx/mach-mini2440.c
+++ b/arch/arm/mach-s3c24xx/mach-mini2440.c
@@ -54,7 +54,6 @@
 #include <linux/mtd/partitions.h>
 #include <plat/gpio-cfg.h>
-#include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/samsung-time.h>
@@ -525,11 +524,16 @@ static struct platform_device *mini2440_devices[] __initdata = {
 static void __init mini2440_map_io(void)
 {
        s3c24xx_init_io(mini2440_iodesc, ARRAY_SIZE(mini2440_iodesc));
-        s3c24xx_init_clocks(12000000);
        s3c24xx_init_uarts(mini2440_uartcfgs, ARRAY_SIZE(mini2440_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
+static void __init mini2440_init_time(void)
+{
+        s3c2440_init_clocks(12000000);
+        samsung_timer_init();
+}
 /*
 * mini2440_features string
 *
@@ -690,6 +694,6 @@ MACHINE_START(MINI2440, "MINI2440")
        .map_io         = mini2440_map_io,
        .init_machine   = mini2440_init,
        .init_irq       = s3c2440_init_irq,
-        .init_time      = samsung_timer_init,
+        .init_time      = mini2440_init_time,
        .restart        = s3c244x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-n30.c b/arch/arm/mach-s3c24xx/mach-n30.c
index 4cccaad34847..3ac2a54348d6 100644
--- a/arch/arm/mach-s3c24xx/mach-n30.c
+++ b/arch/arm/mach-s3c24xx/mach-n30.c
@@ -45,7 +45,6 @@
 #include <linux/platform_data/i2c-s3c2410.h>
-#include <plat/clock.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <linux/platform_data/mmc-s3cmci.h>
@@ -535,11 +534,16 @@ static void __init n30_map_io(void)
 {
        s3c24xx_init_io(n30_iodesc, ARRAY_SIZE(n30_iodesc));
        n30_hwinit();
-        s3c24xx_init_clocks(0);
        s3c24xx_init_uarts(n30_uartcfgs, ARRAY_SIZE(n30_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
+static void __init n30_init_time(void)
+{
+        s3c2410_init_clocks(12000000);
+        samsung_timer_init();
+}
 /* GPB3 is the line that controls the pull-up for the USB D+ line */
 static void __init n30_init(void)
@@ -591,7 +595,7 @@ MACHINE_START(N30, "Acer-N30")
                                Ben Dooks <ben-linux@fluff.org>
        */
        .atag_offset    = 0x100,
-        .init_time      = samsung_timer_init,
+        .init_time      = n30_init_time,
        .init_machine   = n30_init,
        .init_irq       = s3c2410_init_irq,
        .map_io         = n30_map_io,
@@ -602,7 +606,7 @@ MACHINE_START(N35, "Acer-N35")
        /* Maintainer: Christer Weinigel <christer@weinigel.se>
        */
        .atag_offset    = 0x100,
-        .init_time      = samsung_timer_init,
+        .init_time      = n30_init_time,
        .init_machine   = n30_init,
        .init_irq       = s3c2410_init_irq,
        .map_io         = n30_map_io,
diff --git a/arch/arm/mach-s3c24xx/mach-nexcoder.c b/arch/arm/mach-s3c24xx/mach-nexcoder.c
index 3066851f584d..c82c281ce351 100644
--- a/arch/arm/mach-s3c24xx/mach-nexcoder.c
+++ b/arch/arm/mach-s3c24xx/mach-nexcoder.c
@@ -42,7 +42,6 @@
 #include <linux/platform_data/i2c-s3c2410.h>
 #include <plat/gpio-cfg.h>
-#include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/samsung-time.h>
@@ -135,13 +134,18 @@ static void __init nexcoder_sensorboard_init(void)
 static void __init nexcoder_map_io(void)
 {
        s3c24xx_init_io(nexcoder_iodesc, ARRAY_SIZE(nexcoder_iodesc));
-        s3c24xx_init_clocks(0);
        s3c24xx_init_uarts(nexcoder_uartcfgs, ARRAY_SIZE(nexcoder_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
        nexcoder_sensorboard_init();
 }
+static void __init nexcoder_init_time(void)
+{
+        s3c2440_init_clocks(12000000);
+        samsung_timer_init();
+}
 static void __init nexcoder_init(void)
 {
        s3c_i2c0_set_platdata(NULL);
@@ -154,6 +158,6 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440")
        .map_io         = nexcoder_map_io,
        .init_machine   = nexcoder_init,
        .init_irq       = s3c2440_init_irq,
-        .init_time      = samsung_timer_init,
+        .init_time      = nexcoder_init_time,
        .restart        = s3c244x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-osiris.c b/arch/arm/mach-s3c24xx/mach-osiris.c
index a4ae4bb3666d..189147b80eca 100644
--- a/arch/arm/mach-s3c24xx/mach-osiris.c
+++ b/arch/arm/mach-s3c24xx/mach-osiris.c
@@ -40,7 +40,6 @@
 #include <linux/mtd/nand_ecc.h>
 #include <linux/mtd/partitions.h>
-#include <plat/clock.h>
 #include <plat/cpu.h>
 #include <plat/cpu-freq.h>
 #include <plat/devs.h>
@@ -344,20 +343,13 @@ static struct i2c_board_info osiris_i2c_devs[] __initdata = {
 /* Standard Osiris devices */
 static struct platform_device *osiris_devices[] __initdata = {
+        &s3c2410_device_dclk,
        &s3c_device_i2c0,
        &s3c_device_wdt,
        &s3c_device_nand,
        &osiris_pcmcia,
 };
-static struct clk *osiris_clocks[] __initdata = {
-        &s3c24xx_dclk0,
-        &s3c24xx_dclk1,
-        &s3c24xx_clkout0,
-        &s3c24xx_clkout1,
-        &s3c24xx_uclk,
-};
 static struct s3c_cpufreq_board __initdata osiris_cpufreq = {
        .refresh        = 7800, /* refresh period is 7.8usec */
        .auto_io        = 1,
@@ -368,23 +360,7 @@ static void __init osiris_map_io(void)
 {
        unsigned long flags;
-        /* initialise the clocks */
-        s3c24xx_dclk0.parent = &clk_upll;
-        s3c24xx_dclk0.rate   = 12*1000*1000;
-        s3c24xx_dclk1.parent = &clk_upll;
-        s3c24xx_dclk1.rate   = 24*1000*1000;
-        s3c24xx_clkout0.parent  = &s3c24xx_dclk0;
-        s3c24xx_clkout1.parent  = &s3c24xx_dclk1;
-        s3c24xx_uclk.parent  = &s3c24xx_clkout1;
-        s3c24xx_register_clocks(osiris_clocks, ARRAY_SIZE(osiris_clocks));
        s3c24xx_init_io(osiris_iodesc, ARRAY_SIZE(osiris_iodesc));
-        s3c24xx_init_clocks(0);
        s3c24xx_init_uarts(osiris_uartcfgs, ARRAY_SIZE(osiris_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
@@ -408,6 +384,12 @@ static void __init osiris_map_io(void)
        local_irq_restore(flags);
 }
+static void __init osiris_init_time(void)
+{
+        s3c2440_init_clocks(12000000);
+        samsung_timer_init();
+}
 static void __init osiris_init(void)
 {
        register_syscore_ops(&osiris_pm_syscore_ops);
@@ -429,6 +411,6 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS")
        .map_io         = osiris_map_io,
        .init_irq       = s3c2440_init_irq,
        .init_machine   = osiris_init,
-        .init_time      = samsung_timer_init,
+        .init_time      = osiris_init_time,
        .restart        = s3c244x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-otom.c b/arch/arm/mach-s3c24xx/mach-otom.c
index bdb3faac2d9b..45833001186d 100644
--- a/arch/arm/mach-s3c24xx/mach-otom.c
+++ b/arch/arm/mach-s3c24xx/mach-otom.c
@@ -30,7 +30,6 @@
 #include <mach/hardware.h>
 #include <mach/regs-gpio.h>
-#include <plat/clock.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/samsung-time.h>
@@ -100,11 +99,16 @@ static struct platform_device *otom11_devices[] __initdata = {
 static void __init otom11_map_io(void)
 {
        s3c24xx_init_io(otom11_iodesc, ARRAY_SIZE(otom11_iodesc));
-        s3c24xx_init_clocks(0);
        s3c24xx_init_uarts(otom11_uartcfgs, ARRAY_SIZE(otom11_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
+static void __init otom11_init_time(void)
+{
+        s3c2410_init_clocks(12000000);
+        samsung_timer_init();
+}
 static void __init otom11_init(void)
 {
        s3c_i2c0_set_platdata(NULL);
@@ -117,6 +121,6 @@ MACHINE_START(OTOM, "Nex Vision - Otom 1.1")
        .map_io         = otom11_map_io,
        .init_machine   = otom11_init,
        .init_irq       = s3c2410_init_irq,
-        .init_time      = samsung_timer_init,
+        .init_time      = otom11_init_time,
        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-qt2410.c b/arch/arm/mach-s3c24xx/mach-qt2410.c
index 8c12787a8fd3..228c9094519d 100644
--- a/arch/arm/mach-s3c24xx/mach-qt2410.c
+++ b/arch/arm/mach-s3c24xx/mach-qt2410.c
@@ -304,11 +304,16 @@ __setup("tft=", qt2410_tft_setup);
 static void __init qt2410_map_io(void)
 {
        s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc));
-        s3c24xx_init_clocks(12*1000*1000);
        s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
+static void __init qt2410_init_time(void)
+{
+        s3c2410_init_clocks(12000000);
+        samsung_timer_init();
+}
 static void __init qt2410_machine_init(void)
 {
        s3c_nand_set_platdata(&qt2410_nand_info);
@@ -346,6 +351,6 @@ MACHINE_START(QT2410, "QT2410")
        .map_io         = qt2410_map_io,
        .init_irq       = s3c2410_init_irq,
        .init_machine   = qt2410_machine_init,
-        .init_time      = samsung_timer_init,
+        .init_time      = qt2410_init_time,
        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c
index afb784e934c8..e2c6541909c1 100644
--- a/arch/arm/mach-s3c24xx/mach-rx1950.c
+++ b/arch/arm/mach-s3c24xx/mach-rx1950.c
@@ -54,7 +54,6 @@
 #include <mach/regs-lcd.h>
 #include <mach/gpio-samsung.h>
-#include <plat/clock.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/pm.h>
@@ -710,6 +709,7 @@ static struct i2c_board_info rx1950_i2c_devices[] = {
 };
 static struct platform_device *rx1950_devices[] __initdata = {
+        &s3c2410_device_dclk,
        &s3c_device_lcd,
        &s3c_device_wdt,
        &s3c_device_i2c0,
@@ -728,20 +728,9 @@ static struct platform_device *rx1950_devices[] __initdata = {
        &rx1950_leds,
 };
-static struct clk *rx1950_clocks[] __initdata = {
-        &s3c24xx_clkout0,
-        &s3c24xx_clkout1,
-};
 static void __init rx1950_map_io(void)
 {
-        s3c24xx_clkout0.parent  = &clk_h;
-        s3c24xx_clkout1.parent  = &clk_f;
-        s3c24xx_register_clocks(rx1950_clocks, ARRAY_SIZE(rx1950_clocks));
        s3c24xx_init_io(rx1950_iodesc, ARRAY_SIZE(rx1950_iodesc));
-        s3c24xx_init_clocks(16934000);
        s3c24xx_init_uarts(rx1950_uartcfgs, ARRAY_SIZE(rx1950_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
@@ -754,6 +743,12 @@ static void __init rx1950_map_io(void)
        s3c_pm_init();
 }
+static void __init rx1950_init_time(void)
+{
+        s3c2442_init_clocks(16934000);
+        samsung_timer_init();
+}
 static void __init rx1950_init_machine(void)
 {
        int i;
@@ -816,6 +811,6 @@ MACHINE_START(RX1950, "HP iPAQ RX1950")
        .reserve        = rx1950_reserve,
        .init_irq       = s3c2442_init_irq,
        .init_machine = rx1950_init_machine,
-        .init_time      = samsung_timer_init,
+        .init_time      = rx1950_init_time,
        .restart        = s3c244x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-rx3715.c b/arch/arm/mach-s3c24xx/mach-rx3715.c
index e6535ce1bc5c..6e749ec3a2ea 100644
--- a/arch/arm/mach-s3c24xx/mach-rx3715.c
+++ b/arch/arm/mach-s3c24xx/mach-rx3715.c
@@ -46,7 +46,6 @@
 #include <mach/regs-lcd.h>
 #include <mach/gpio-samsung.h>
-#include <plat/clock.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/pm.h>
@@ -179,11 +178,16 @@ static struct platform_device *rx3715_devices[] __initdata = {
 static void __init rx3715_map_io(void)
 {
        s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc));
-        s3c24xx_init_clocks(16934000);
        s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
+static void __init rx3715_init_time(void)
+{
+        s3c2440_init_clocks(16934000);
+        samsung_timer_init();
+}
 /* H1940 and RX3715 need to reserve this for suspend */
 static void __init rx3715_reserve(void)
 {
@@ -210,6 +214,6 @@ MACHINE_START(RX3715, "IPAQ-RX3715")
        .reserve        = rx3715_reserve,
        .init_irq       = s3c2440_init_irq,
        .init_machine   = rx3715_init_machine,
-        .init_time      = samsung_timer_init,
+        .init_time      = rx3715_init_time,
        .restart        = s3c244x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c b/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c
index 70f0900d4bca..e4dcb9aa2ca2 100644
--- a/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c
+++ b/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c
@@ -18,7 +18,6 @@
 #include <linux/clocksource.h>
 #include <linux/irqchip.h>
 #include <linux/of_platform.h>
-#include <linux/serial_core.h>
 #include <linux/serial_s3c.h>
 #include <asm/mach/arch.h>
@@ -29,48 +28,14 @@
 #include "common.h"
-/*
- * The following lookup table is used to override device names when devices
- * are registered from device tree. This is temporarily added to enable
- * device tree support addition for the S3C2416 architecture.
- *
- * For drivers that require platform data to be provided from the machine
- * file, a platform data pointer can also be supplied along with the
- * devices names. Usually, the platform data elements that cannot be parsed
- * from the device tree by the drivers (example: function pointers) are
- * supplied. But it should be noted that this is a temporary mechanism and
- * at some point, the drivers should be capable of parsing all the platform
- * data from the device tree.
- */
-static const struct of_dev_auxdata s3c2416_auxdata_lookup[] __initconst = {
-        OF_DEV_AUXDATA("samsung,s3c2440-uart", S3C24XX_PA_UART,
-                                "s3c2440-uart.0", NULL),
-        OF_DEV_AUXDATA("samsung,s3c2440-uart", S3C24XX_PA_UART + 0x4000,
-                                "s3c2440-uart.1", NULL),
-        OF_DEV_AUXDATA("samsung,s3c2440-uart", S3C24XX_PA_UART + 0x8000,
-                                "s3c2440-uart.2", NULL),
-        OF_DEV_AUXDATA("samsung,s3c2440-uart", S3C24XX_PA_UART + 0xC000,
-                                "s3c2440-uart.3", NULL),
-        OF_DEV_AUXDATA("samsung,s3c6410-sdhci", S3C_PA_HSMMC0,
-                                "s3c-sdhci.0", NULL),
-        OF_DEV_AUXDATA("samsung,s3c6410-sdhci", S3C_PA_HSMMC1,
-                                "s3c-sdhci.1", NULL),
-        OF_DEV_AUXDATA("samsung,s3c2440-i2c", S3C_PA_IIC,
-                                "s3c2440-i2c.0", NULL),
-        {},
-};
 static void __init s3c2416_dt_map_io(void)
 {
        s3c24xx_init_io(NULL, 0);
-        s3c24xx_init_clocks(12000000);
 }
 static void __init s3c2416_dt_machine_init(void)
 {
-        of_platform_populate(NULL, of_default_bus_match_table,
+        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-                                s3c2416_auxdata_lookup, NULL);
        s3c_pm_init();
 }
@@ -86,6 +51,5 @@ DT_MACHINE_START(S3C2416_DT, "Samsung S3C2416 (Flattened Device Tree)")
        .map_io         = s3c2416_dt_map_io,
        .init_irq       = irqchip_init,
        .init_machine   = s3c2416_dt_machine_init,
-         .init_time     = clocksource_of_init,
        .restart        = s3c2416_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2410.c b/arch/arm/mach-s3c24xx/mach-smdk2410.c
index f32924ee0e9f..419fadd6e446 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2410.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2410.c
@@ -99,11 +99,16 @@ static struct platform_device *smdk2410_devices[] __initdata = {
 static void __init smdk2410_map_io(void)
 {
        s3c24xx_init_io(smdk2410_iodesc, ARRAY_SIZE(smdk2410_iodesc));
-        s3c24xx_init_clocks(0);
        s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
+static void __init smdk2410_init_time(void)
+{
+        s3c2410_init_clocks(12000000);
+        samsung_timer_init();
+}
 static void __init smdk2410_init(void)
 {
        s3c_i2c0_set_platdata(NULL);
@@ -118,6 +123,6 @@ MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switc
        .map_io         = smdk2410_map_io,
        .init_irq       = s3c2410_init_irq,
        .init_machine   = smdk2410_init,
-        .init_time      = samsung_timer_init,
+        .init_time      = smdk2410_init_time,
        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2413.c b/arch/arm/mach-s3c24xx/mach-smdk2413.c
index 233fe52d2015..a38f8a049e22 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2413.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2413.c
@@ -106,11 +106,16 @@ static void __init smdk2413_fixup(struct tag *tags, char **cmdline,
 static void __init smdk2413_map_io(void)
 {
        s3c24xx_init_io(smdk2413_iodesc, ARRAY_SIZE(smdk2413_iodesc));
-        s3c24xx_init_clocks(12000000);
        s3c24xx_init_uarts(smdk2413_uartcfgs, ARRAY_SIZE(smdk2413_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
+static void __init smdk2413_init_time(void)
+{
+        s3c2412_init_clocks(12000000);
+        samsung_timer_init();
+}
 static void __init smdk2413_machine_init(void)
 {       /* Turn off suspend on both USB ports, and switch the
         * selectable USB port to USB device mode. */
@@ -159,6 +164,6 @@ MACHINE_START(SMDK2413, "SMDK2413")
        .init_irq       = s3c2412_init_irq,
        .map_io         = smdk2413_map_io,
        .init_machine   = smdk2413_machine_init,
-        .init_time      = samsung_timer_init,
+        .init_time      = smdk2413_init_time,
        .restart        = s3c2412_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2416.c b/arch/arm/mach-s3c24xx/mach-smdk2416.c
index b3b54d8e1410..fa6f30d23601 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2416.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2416.c
@@ -219,10 +219,15 @@ static struct platform_device *smdk2416_devices[] __initdata = {
        &s3c2443_device_dma,
 };
+static void __init smdk2416_init_time(void)
+{
+        s3c2416_init_clocks(12000000);
+        samsung_timer_init();
+}
 static void __init smdk2416_map_io(void)
 {
        s3c24xx_init_io(smdk2416_iodesc, ARRAY_SIZE(smdk2416_iodesc));
-        s3c24xx_init_clocks(12000000);
        s3c24xx_init_uarts(smdk2416_uartcfgs, ARRAY_SIZE(smdk2416_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
@@ -257,6 +262,6 @@ MACHINE_START(SMDK2416, "SMDK2416")
        .init_irq       = s3c2416_init_irq,
        .map_io         = smdk2416_map_io,
        .init_machine   = smdk2416_machine_init,
-        .init_time      = samsung_timer_init,
+        .init_time      = smdk2416_init_time,
        .restart        = s3c2416_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2440.c b/arch/arm/mach-s3c24xx/mach-smdk2440.c
index d071dcfea548..5fb89c0ae17a 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2440.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2440.c
@@ -38,7 +38,6 @@
 #include <mach/fb.h>
 #include <linux/platform_data/i2c-s3c2410.h>
-#include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/samsung-time.h>
@@ -159,11 +158,16 @@ static struct platform_device *smdk2440_devices[] __initdata = {
 static void __init smdk2440_map_io(void)
 {
        s3c24xx_init_io(smdk2440_iodesc, ARRAY_SIZE(smdk2440_iodesc));
-        s3c24xx_init_clocks(16934400);
        s3c24xx_init_uarts(smdk2440_uartcfgs, ARRAY_SIZE(smdk2440_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
+static void __init smdk2440_init_time(void)
+{
+        s3c2440_init_clocks(16934400);
+        samsung_timer_init();
+}
 static void __init smdk2440_machine_init(void)
 {
        s3c24xx_fb_set_platdata(&smdk2440_fb_info);
@@ -180,6 +184,6 @@ MACHINE_START(S3C2440, "SMDK2440")
        .init_irq       = s3c2440_init_irq,
        .map_io         = smdk2440_map_io,
        .init_machine   = smdk2440_machine_init,
-        .init_time      = samsung_timer_init,
+        .init_time      = smdk2440_init_time,
        .restart        = s3c244x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2443.c b/arch/arm/mach-s3c24xx/mach-smdk2443.c
index 06c4d77de3a5..ef5d5ea33182 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2443.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2443.c
@@ -121,11 +121,16 @@ static struct platform_device *smdk2443_devices[] __initdata = {
 static void __init smdk2443_map_io(void)
 {
        s3c24xx_init_io(smdk2443_iodesc, ARRAY_SIZE(smdk2443_iodesc));
-        s3c24xx_init_clocks(12000000);
        s3c24xx_init_uarts(smdk2443_uartcfgs, ARRAY_SIZE(smdk2443_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
+static void __init smdk2443_init_time(void)
+{
+        s3c2443_init_clocks(12000000);
+        samsung_timer_init();
+}
 static void __init smdk2443_machine_init(void)
 {
        s3c_i2c0_set_platdata(NULL);
@@ -145,6 +150,6 @@ MACHINE_START(SMDK2443, "SMDK2443")
        .init_irq       = s3c2443_init_irq,
        .map_io         = smdk2443_map_io,
        .init_machine   = smdk2443_machine_init,
-        .init_time      = samsung_timer_init,
+        .init_time      = smdk2443_init_time,
        .restart        = s3c2443_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-tct_hammer.c b/arch/arm/mach-s3c24xx/mach-tct_hammer.c
index 4108b2f0cede..c616ca2d409e 100644
--- a/arch/arm/mach-s3c24xx/mach-tct_hammer.c
+++ b/arch/arm/mach-s3c24xx/mach-tct_hammer.c
@@ -135,11 +135,16 @@ static struct platform_device *tct_hammer_devices[] __initdata = {
 static void __init tct_hammer_map_io(void)
 {
        s3c24xx_init_io(tct_hammer_iodesc, ARRAY_SIZE(tct_hammer_iodesc));
-        s3c24xx_init_clocks(0);
        s3c24xx_init_uarts(tct_hammer_uartcfgs, ARRAY_SIZE(tct_hammer_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
+static void __init tct_hammer_init_time(void)
+{
+        s3c2410_init_clocks(12000000);
+        samsung_timer_init();
+}
 static void __init tct_hammer_init(void)
 {
        s3c_i2c0_set_platdata(NULL);
@@ -151,6 +156,6 @@ MACHINE_START(TCT_HAMMER, "TCT_HAMMER")
        .map_io         = tct_hammer_map_io,
        .init_irq       = s3c2410_init_irq,
        .init_machine   = tct_hammer_init,
-        .init_time      = samsung_timer_init,
+        .init_time      = tct_hammer_init_time,
        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-vr1000.c b/arch/arm/mach-s3c24xx/mach-vr1000.c
index 1cc5b1bd51cd..f88c584c3001 100644
--- a/arch/arm/mach-s3c24xx/mach-vr1000.c
+++ b/arch/arm/mach-s3c24xx/mach-vr1000.c
@@ -43,7 +43,6 @@
 #include <mach/regs-gpio.h>
 #include <mach/gpio-samsung.h>
-#include <plat/clock.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/samsung-time.h>
@@ -286,6 +285,7 @@ static struct i2c_board_info vr1000_i2c_devs[] __initdata = {
 /* devices for this board */
 static struct platform_device *vr1000_devices[] __initdata = {
+        &s3c2410_device_dclk,
        &s3c_device_ohci,
        &s3c_device_lcd,
        &s3c_device_wdt,
@@ -299,14 +299,6 @@ static struct platform_device *vr1000_devices[] __initdata = {
        &vr1000_led3,
 };
-static struct clk *vr1000_clocks[] __initdata = {
-        &s3c24xx_dclk0,
-        &s3c24xx_dclk1,
-        &s3c24xx_clkout0,
-        &s3c24xx_clkout1,
-        &s3c24xx_uclk,
-};
 static void vr1000_power_off(void)
 {
        gpio_direction_output(S3C2410_GPB(9), 1);
@@ -314,29 +306,19 @@ static void vr1000_power_off(void)
 static void __init vr1000_map_io(void)
 {
-        /* initialise clock sources */
-        s3c24xx_dclk0.parent = &clk_upll;
-        s3c24xx_dclk0.rate   = 12*1000*1000;
-        s3c24xx_dclk1.parent = NULL;
-        s3c24xx_dclk1.rate   = 3692307;
-        s3c24xx_clkout0.parent  = &s3c24xx_dclk0;
-        s3c24xx_clkout1.parent  = &s3c24xx_dclk1;
-        s3c24xx_uclk.parent  = &s3c24xx_clkout1;
-        s3c24xx_register_clocks(vr1000_clocks, ARRAY_SIZE(vr1000_clocks));
        pm_power_off = vr1000_power_off;
        s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
-        s3c24xx_init_clocks(0);
        s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
+static void __init vr1000_init_time(void)
+{
+        s3c2410_init_clocks(12000000);
+        samsung_timer_init();
+}
 static void __init vr1000_init(void)
 {
        s3c_i2c0_set_platdata(NULL);
@@ -357,6 +339,6 @@ MACHINE_START(VR1000, "Thorcom-VR1000")
        .map_io         = vr1000_map_io,
        .init_machine   = vr1000_init,
        .init_irq       = s3c2410_init_irq,
-        .init_time      = samsung_timer_init,
+        .init_time      = vr1000_init_time,
        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-vstms.c b/arch/arm/mach-s3c24xx/mach-vstms.c
index 40868c0e0a68..6b706c915387 100644
--- a/arch/arm/mach-s3c24xx/mach-vstms.c
+++ b/arch/arm/mach-s3c24xx/mach-vstms.c
@@ -142,11 +142,16 @@ static void __init vstms_fixup(struct tag *tags, char **cmdline,
 static void __init vstms_map_io(void)
 {
        s3c24xx_init_io(vstms_iodesc, ARRAY_SIZE(vstms_iodesc));
-        s3c24xx_init_clocks(12000000);
        s3c24xx_init_uarts(vstms_uartcfgs, ARRAY_SIZE(vstms_uartcfgs));
        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 }
+static void __init vstms_init_time(void)
+{
+        s3c2412_init_clocks(12000000);
+        samsung_timer_init();
+}
 static void __init vstms_init(void)
 {
        s3c_i2c0_set_platdata(NULL);
@@ -162,6 +167,6 @@ MACHINE_START(VSTMS, "VSTMS")
        .init_irq       = s3c2412_init_irq,
        .init_machine   = vstms_init,
        .map_io         = vstms_map_io,
-        .init_time      = samsung_timer_init,
+        .init_time      = vstms_init_time,
        .restart        = s3c2412_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/pm.c b/arch/arm/mach-s3c24xx/pm.c
index 68ea5b7e5dc7..b19256ec8d40 100644
--- a/arch/arm/mach-s3c24xx/pm.c
+++ b/arch/arm/mach-s3c24xx/pm.c
@@ -51,9 +51,6 @@
 #define PFX "s3c24xx-pm: "
 static struct sleep_save core_save[] = {
-        SAVE_ITEM(S3C2410_LOCKTIME),
-        SAVE_ITEM(S3C2410_CLKCON),
        /* we restore the timings here, with the proviso that the board
         * brings the system up in an slower, or equal frequency setting
         * to the original system.
@@ -69,18 +66,6 @@ static struct sleep_save core_save[] = {
        SAVE_ITEM(S3C2410_BANKCON3),
        SAVE_ITEM(S3C2410_BANKCON4),
        SAVE_ITEM(S3C2410_BANKCON5),
-#ifndef CONFIG_CPU_FREQ
-        SAVE_ITEM(S3C2410_CLKDIVN),
-        SAVE_ITEM(S3C2410_MPLLCON),
-        SAVE_ITEM(S3C2410_REFRESH),
-#endif
-        SAVE_ITEM(S3C2410_UPLLCON),
-        SAVE_ITEM(S3C2410_CLKSLOW),
-};
-static struct sleep_save misc_save[] = {
-        SAVE_ITEM(S3C2410_DCLKCON),
 };
 /* s3c_pm_check_resume_pin
@@ -140,12 +125,10 @@ void s3c_pm_configure_extint(void)
 void s3c_pm_restore_core(void)
 {
        s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save));
-        s3c_pm_do_restore(misc_save, ARRAY_SIZE(misc_save));
 }
 void s3c_pm_save_core(void)
 {
-        s3c_pm_do_save(misc_save, ARRAY_SIZE(misc_save));
        s3c_pm_do_save(core_save, ARRAY_SIZE(core_save));
 }
diff --git a/arch/arm/mach-s3c24xx/s3c2410.c b/arch/arm/mach-s3c24xx/s3c2410.c
index 04b58cb49888..7eab88829883 100644
--- a/arch/arm/mach-s3c24xx/s3c2410.c
+++ b/arch/arm/mach-s3c24xx/s3c2410.c
@@ -85,62 +85,6 @@ void __init s3c2410_map_io(void)
 void __init_or_cpufreq s3c2410_setup_clocks(void)
 {
-        struct clk *xtal_clk;
-        unsigned long tmp;
-        unsigned long xtal;
-        unsigned long fclk;
-        unsigned long hclk;
-        unsigned long pclk;
-        xtal_clk = clk_get(NULL, "xtal");
-        xtal = clk_get_rate(xtal_clk);
-        clk_put(xtal_clk);
-        /* now we've got our machine bits initialised, work out what
-         * clocks we've got */
-        fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal);
-        tmp = __raw_readl(S3C2410_CLKDIVN);
-        /* work out clock scalings */
-        hclk = fclk / ((tmp & S3C2410_CLKDIVN_HDIVN) ? 2 : 1);
-        pclk = hclk / ((tmp & S3C2410_CLKDIVN_PDIVN) ? 2 : 1);
-        /* print brieft summary of clocks, etc */
-        printk("S3C2410: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
-               print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
-        /* initialise the clocks here, to allow other things like the
-         * console to use them
-         */
-        s3c24xx_setup_clocks(fclk, hclk, pclk);
-}
-/* fake ARMCLK for use with cpufreq, etc. */
-static struct clk s3c2410_armclk = {
-        .name   = "armclk",
-        .parent = &clk_f,
-        .id     = -1,
-};
-static struct clk_lookup s3c2410_clk_lookup[] = {
-        CLKDEV_INIT(NULL, "clk_uart_baud0", &clk_p),
-        CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
-};
-void __init s3c2410_init_clocks(int xtal)
-{
-        s3c24xx_register_baseclocks(xtal);
-        s3c2410_setup_clocks();
-        s3c2410_baseclk_add();
-        s3c24xx_register_clock(&s3c2410_armclk);
-        clkdev_add_table(s3c2410_clk_lookup, ARRAY_SIZE(s3c2410_clk_lookup));
-        samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG);
 }
 struct bus_type s3c2410_subsys = {
diff --git a/arch/arm/mach-s3c24xx/s3c2412.c b/arch/arm/mach-s3c24xx/s3c2412.c
index 657cbaca80ac..d49f52fbc842 100644
--- a/arch/arm/mach-s3c24xx/s3c2412.c
+++ b/arch/arm/mach-s3c24xx/s3c2412.c
@@ -173,49 +173,6 @@ void __init s3c2412_map_io(void)
 void __init_or_cpufreq s3c2412_setup_clocks(void)
 {
-        struct clk *xtal_clk;
-        unsigned long tmp;
-        unsigned long xtal;
-        unsigned long fclk;
-        unsigned long hclk;
-        unsigned long pclk;
-        xtal_clk = clk_get(NULL, "xtal");
-        xtal = clk_get_rate(xtal_clk);
-        clk_put(xtal_clk);
-        /* now we've got our machine bits initialised, work out what
-         * clocks we've got */
-        fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal * 2);
-        clk_mpll.rate = fclk;
-        tmp = __raw_readl(S3C2410_CLKDIVN);
-        /* work out clock scalings */
-        hclk = fclk / ((tmp & S3C2412_CLKDIVN_HDIVN_MASK) + 1);
-        hclk /= ((tmp & S3C2412_CLKDIVN_ARMDIVN) ? 2 : 1);
-        pclk = hclk / ((tmp & S3C2412_CLKDIVN_PDIVN) ? 2 : 1);
-        /* print brieft summary of clocks, etc */
-        printk("S3C2412: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
-               print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
-        s3c24xx_setup_clocks(fclk, hclk, pclk);
-}
-void __init s3c2412_init_clocks(int xtal)
-{
-        /* initialise the clocks here, to allow other things like the
-         * console to use them
-         */
-        s3c24xx_register_baseclocks(xtal);
-        s3c2412_setup_clocks();
-        s3c2412_baseclk_add();
 }
 /* need to register the subsystem before we actually register the device, and
diff --git a/arch/arm/mach-s3c24xx/s3c2442.c b/arch/arm/mach-s3c24xx/s3c2442.c
index 2c8adc028538..fb9da2b603a2 100644
--- a/arch/arm/mach-s3c24xx/s3c2442.c
+++ b/arch/arm/mach-s3c24xx/s3c2442.c
@@ -53,117 +53,6 @@
 #include "common.h"
-/* S3C2442 extended clock support */
-static unsigned long s3c2442_camif_upll_round(struct clk *clk,
-                                              unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        int div;
-        if (rate > parent_rate)
-                return parent_rate;
-        div = parent_rate / rate;
-        if (div == 3)
-                return parent_rate / 3;
-        /* note, we remove the +/- 1 calculations for the divisor */
-        div /= 2;
-        if (div < 1)
-                div = 1;
-        else if (div > 16)
-                div = 16;
-        return parent_rate / (div * 2);
-}
-static int s3c2442_camif_upll_setrate(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long camdivn =  __raw_readl(S3C2440_CAMDIVN);
-        rate = s3c2442_camif_upll_round(clk, rate);
-        camdivn &= ~S3C2442_CAMDIVN_CAMCLK_DIV3;
-        if (rate == parent_rate) {
-                camdivn &= ~S3C2440_CAMDIVN_CAMCLK_SEL;
-        } else if ((parent_rate / rate) == 3) {
-                camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL;
-                camdivn |= S3C2442_CAMDIVN_CAMCLK_DIV3;
-        } else {
-                camdivn &= ~S3C2440_CAMDIVN_CAMCLK_MASK;
-                camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL;
-                camdivn |= (((parent_rate / rate) / 2) - 1);
-        }
-        __raw_writel(camdivn, S3C2440_CAMDIVN);
-        return 0;
-}
-/* Extra S3C2442 clocks */
-static struct clk s3c2442_clk_cam = {
-        .name           = "camif",
-        .id             = -1,
-        .enable         = s3c2410_clkcon_enable,
-        .ctrlbit        = S3C2440_CLKCON_CAMERA,
-};
-static struct clk s3c2442_clk_cam_upll = {
-        .name           = "camif-upll",
-        .id             = -1,
-        .ops            = &(struct clk_ops) {
-                .set_rate       = s3c2442_camif_upll_setrate,
-                .round_rate     = s3c2442_camif_upll_round,
-        },
-};
-static int s3c2442_clk_add(struct device *dev, struct subsys_interface *sif)
-{
-        struct clk *clock_upll;
-        struct clk *clock_h;
-        struct clk *clock_p;
-        clock_p = clk_get(NULL, "pclk");
-        clock_h = clk_get(NULL, "hclk");
-        clock_upll = clk_get(NULL, "upll");
-        if (IS_ERR(clock_p) || IS_ERR(clock_h) || IS_ERR(clock_upll)) {
-                printk(KERN_ERR "S3C2442: Failed to get parent clocks\n");
-                return -EINVAL;
-        }
-        s3c2442_clk_cam.parent = clock_h;
-        s3c2442_clk_cam_upll.parent = clock_upll;
-        s3c24xx_register_clock(&s3c2442_clk_cam);
-        s3c24xx_register_clock(&s3c2442_clk_cam_upll);
-        clk_disable(&s3c2442_clk_cam);
-        return 0;
-}
-static struct subsys_interface s3c2442_clk_interface = {
-        .name           = "s3c2442_clk",
-        .subsys         = &s3c2442_subsys,
-        .add_dev        = s3c2442_clk_add,
-};
-static __init int s3c2442_clk_init(void)
-{
-        return subsys_interface_register(&s3c2442_clk_interface);
-}
-arch_initcall(s3c2442_clk_init);
 static struct device s3c2442_dev = {
        .bus            = &s3c2442_subsys,
 };
diff --git a/arch/arm/mach-s3c24xx/s3c244x.c b/arch/arm/mach-s3c24xx/s3c244x.c
index fe30ebb234d2..4a64bcc9eb51 100644
--- a/arch/arm/mach-s3c24xx/s3c244x.c
+++ b/arch/arm/mach-s3c24xx/s3c244x.c
@@ -46,6 +46,7 @@
 #include <plat/nand-core.h>
 #include <plat/watchdog-reset.h>
+#include "common.h"
 #include "regs-dsc.h"
 static struct map_desc s3c244x_iodesc[] __initdata = {
@@ -74,67 +75,11 @@ void __init s3c244x_map_io(void)
        s3c_nand_setname("s3c2440-nand");
        s3c_device_ts.name = "s3c2440-ts";
        s3c_device_usbgadget.name = "s3c2440-usbgadget";
+        s3c2410_device_dclk.name = "s3c2440-dclk";
 }
 void __init_or_cpufreq s3c244x_setup_clocks(void)
 {
-        struct clk *xtal_clk;
-        unsigned long clkdiv;
-        unsigned long camdiv;
-        unsigned long xtal;
-        unsigned long hclk, fclk, pclk;
-        int hdiv = 1;
-        xtal_clk = clk_get(NULL, "xtal");
-        xtal = clk_get_rate(xtal_clk);
-        clk_put(xtal_clk);
-        fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
-        clkdiv = __raw_readl(S3C2410_CLKDIVN);
-        camdiv = __raw_readl(S3C2440_CAMDIVN);
-        /* work out clock scalings */
-        switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
-        case S3C2440_CLKDIVN_HDIVN_1:
-                hdiv = 1;
-                break;
-        case S3C2440_CLKDIVN_HDIVN_2:
-                hdiv = 2;
-                break;
-        case S3C2440_CLKDIVN_HDIVN_4_8:
-                hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
-                break;
-        case S3C2440_CLKDIVN_HDIVN_3_6:
-                hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
-                break;
-        }
-        hclk = fclk / hdiv;
-        pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN) ? 2 : 1);
-        /* print brief summary of clocks, etc */
-        printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
-               print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
-        s3c24xx_setup_clocks(fclk, hclk, pclk);
-}
-void __init s3c244x_init_clocks(int xtal)
-{
-        /* initialise the clocks here, to allow other things like the
-         * console to use them, and to add new ones after the initialisation
-         */
-        s3c24xx_register_baseclocks(xtal);
-        s3c244x_setup_clocks();
-        s3c2410_baseclk_add();
-        samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG);
 }
 /* Since the S3C2442 and S3C2440 share items, put both subsystems here */
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 0f92ba8e7884..dbd954e61aa7 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -8,7 +8,6 @@ config ARCH_SHMOBILE_MULTI
        select HAVE_ARM_SCU if SMP
        select HAVE_ARM_TWD if SMP
        select ARM_GIC
-        select MIGHT_HAVE_PCI
        select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
        select NO_IOPORT_MAP
        select PINCTRL
@@ -108,6 +107,7 @@ config ARCH_R8A7778
        select SH_CLK_CPG
        select ARM_GIC
        select SYS_SUPPORTS_SH_TMU
+        select RENESAS_INTC_IRQPIN
 config ARCH_R8A7779
        bool "R-Car H1 (R8A77790)"
@@ -140,16 +140,6 @@ config ARCH_R8A7791
        select SYS_SUPPORTS_SH_CMT
        select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
-config ARCH_EMEV2
-        bool "Emma Mobile EV2"
-        select ARCH_WANT_OPTIONAL_GPIOLIB
-        select ARM_GIC
-        select CPU_V7
-        select MIGHT_HAVE_PCI
-        select USE_OF
-        select AUTO_ZRELADDR
-        select SYS_SUPPORTS_EM_STI
 config ARCH_R7S72100
        bool "RZ/A1H (R7S72100)"
        select ARCH_WANT_OPTIONAL_GPIOLIB
@@ -205,8 +195,8 @@ config MACH_ARMADILLO800EVA_REFERENCE
        select SND_SOC_WM8978 if SND_SIMPLE_CARD
        select USE_OF
        ---help---
-           Use reference implementation of Aramdillo800 EVA board support
+           Use reference implementation of Armadillo800 EVA board support
-           which makes a greater use of device tree at the expense
+           which makes greater use of device tree at the expense
           of not supporting a number of devices.
           This is intended to aid developers
@@ -216,7 +206,6 @@ config MACH_BOCKW
        depends on ARCH_R8A7778
        select ARCH_REQUIRE_GPIOLIB
        select REGULATOR_FIXED_VOLTAGE if REGULATOR
-        select RENESAS_INTC_IRQPIN
        select SND_SOC_AK4554 if SND_SIMPLE_CARD
        select SND_SOC_AK4642 if SND_SIMPLE_CARD
        select USE_OF
@@ -225,7 +214,6 @@ config MACH_BOCKW_REFERENCE
        bool "BOCK-W  - Reference Device Tree Implementation"
        depends on ARCH_R8A7778
        select ARCH_REQUIRE_GPIOLIB
-        select RENESAS_INTC_IRQPIN
        select REGULATOR_FIXED_VOLTAGE if REGULATOR
        select USE_OF
        ---help---
@@ -240,17 +228,6 @@ config MACH_GENMAI
        depends on ARCH_R7S72100
        select USE_OF
-config MACH_GENMAI_REFERENCE
-        bool "Genmai board - Reference Device Tree Implementation"
-        depends on ARCH_R7S72100
-        select USE_OF
-        ---help---
-           Use reference implementation of Genmai board support
-           which makes use of device tree at the expense
-           of not supporting a number of devices.
-           This is intended to aid developers
 config MACH_MARZEN
        bool "MARZEN board"
        depends on ARCH_R8A7779
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 4caffc912a81..38d5fe825e93 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -21,8 +21,8 @@ obj-$(CONFIG_ARCH_EMEV2)	+= setup-emev2.o
 obj-$(CONFIG_ARCH_R7S72100)     += setup-r7s72100.o
 # Clock objects
-ifndef CONFIG_COMMON_CLK
 obj-y                           += clock.o
+ifndef CONFIG_COMMON_CLK
 obj-$(CONFIG_ARCH_SH7372)       += clock-sh7372.o
 obj-$(CONFIG_ARCH_SH73A0)       += clock-sh73a0.o
 obj-$(CONFIG_ARCH_R8A73A4)      += clock-r8a73a4.o
@@ -31,7 +31,6 @@ obj-$(CONFIG_ARCH_R8A7778)	+= clock-r8a7778.o
 obj-$(CONFIG_ARCH_R8A7779)      += clock-r8a7779.o
 obj-$(CONFIG_ARCH_R8A7790)      += clock-r8a7790.o
 obj-$(CONFIG_ARCH_R8A7791)      += clock-r8a7791.o
-obj-$(CONFIG_ARCH_EMEV2)        += clock-emev2.o
 obj-$(CONFIG_ARCH_R7S72100)     += clock-r7s72100.o
 endif
@@ -67,7 +66,6 @@ obj-$(CONFIG_MACH_MACKEREL)	+= board-mackerel.o
 obj-$(CONFIG_MACH_BOCKW)        += board-bockw.o
 obj-$(CONFIG_MACH_BOCKW_REFERENCE)      += board-bockw-reference.o
 obj-$(CONFIG_MACH_GENMAI)       += board-genmai.o
-obj-$(CONFIG_MACH_GENMAI_REFERENCE)     += board-genmai-reference.o
 obj-$(CONFIG_MACH_MARZEN)       += board-marzen.o
 obj-$(CONFIG_MACH_MARZEN_REFERENCE)     += board-marzen-reference.o
 obj-$(CONFIG_MACH_LAGER)        += board-lager.o
diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
index 99455ecafa05..918fccffa1b6 100644
--- a/arch/arm/mach-shmobile/Makefile.boot
+++ b/arch/arm/mach-shmobile/Makefile.boot
@@ -7,7 +7,6 @@ loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
 loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
 loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
 loadaddr-$(CONFIG_MACH_GENMAI) += 0x08008000
-loadaddr-$(CONFIG_MACH_GENMAI_REFERENCE) += 0x08008000
 loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
 loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
 loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
index 57d1a78367b6..57d246eb8813 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
@@ -187,7 +187,7 @@ static const char *eva_boards_compat_dt[] __initdata = {
 DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva-reference")
        .map_io         = r8a7740_map_io,
-        .init_early     = r8a7740_init_delay,
+        .init_early     = shmobile_init_delay,
        .init_irq       = r8a7740_init_irq_of,
        .init_machine   = eva_init,
        .init_late      = shmobile_init_late,
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index 486063db2a2f..bc2cf7a89534 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -1017,7 +1017,7 @@ static struct asoc_simple_card_info fsi2_hdmi_info = {
        .platform       = "sh_fsi2",
        .cpu_dai = {
                .name   = "fsib-dai",
-                .fmt    = SND_SOC_DAIFMT_CBM_CFM,
+                .fmt    = SND_SOC_DAIFMT_CBS_CFS,
        },
        .codec_dai = {
                .name = "sh_mobile_hdmi-hifi",
@@ -1300,11 +1300,6 @@ static void __init eva_earlytimer_init(void)
        eva_clock_init();
 }
-static void __init eva_add_early_devices(void)
-{
-        r8a7740_add_early_devices();
-}
 #define RESCNT2 IOMEM(0xe6188020)
 static void eva_restart(enum reboot_mode mode, const char *cmd)
 {
@@ -1319,7 +1314,7 @@ static const char *eva_boards_compat_dt[] __initdata = {
 DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")
        .map_io         = r8a7740_map_io,
-        .init_early     = eva_add_early_devices,
+        .init_early     = r8a7740_add_early_devices,
        .init_irq       = r8a7740_init_irq_of,
        .init_machine   = eva_init,
        .init_late      = shmobile_init_late,
diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
index b4122f8cb8d9..f444be2f241e 100644
--- a/arch/arm/mach-shmobile/board-bockw.c
+++ b/arch/arm/mach-shmobile/board-bockw.c
@@ -345,24 +345,39 @@ static struct rsnd_ssi_platform_info rsnd_ssi[] = {
        RSND_SSI_UNUSED, /* SSI 0 */
        RSND_SSI_UNUSED, /* SSI 1 */
        RSND_SSI_UNUSED, /* SSI 2 */
-        RSND_SSI_SET(1, HPBDMA_SLAVE_HPBIF3_TX, gic_iid(0x85), RSND_SSI_PLAY),
+        RSND_SSI(HPBDMA_SLAVE_HPBIF3_TX, gic_iid(0x85), 0),
-        RSND_SSI_SET(2, HPBDMA_SLAVE_HPBIF4_RX, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE),
+        RSND_SSI(HPBDMA_SLAVE_HPBIF4_RX, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE),
-        RSND_SSI_SET(0, HPBDMA_SLAVE_HPBIF5_TX, gic_iid(0x86), RSND_SSI_PLAY),
+        RSND_SSI(HPBDMA_SLAVE_HPBIF5_TX, gic_iid(0x86), 0),
-        RSND_SSI_SET(0, HPBDMA_SLAVE_HPBIF6_RX, gic_iid(0x86), 0),
+        RSND_SSI(HPBDMA_SLAVE_HPBIF6_RX, gic_iid(0x86), 0),
-        RSND_SSI_SET(3, HPBDMA_SLAVE_HPBIF7_TX, gic_iid(0x86), RSND_SSI_PLAY),
+        RSND_SSI(HPBDMA_SLAVE_HPBIF7_TX, gic_iid(0x86), 0),
-        RSND_SSI_SET(4, HPBDMA_SLAVE_HPBIF8_RX, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE),
+        RSND_SSI(HPBDMA_SLAVE_HPBIF8_RX, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE),
 };
-static struct rsnd_scu_platform_info rsnd_scu[9] = {
+static struct rsnd_src_platform_info rsnd_src[9] = {
-        { .flags = 0, }, /* SRU 0 */
+        RSND_SRC_UNUSED, /* SRU 0 */
-        { .flags = 0, }, /* SRU 1 */
+        RSND_SRC_UNUSED, /* SRU 1 */
-        { .flags = 0, }, /* SRU 2 */
+        RSND_SRC_UNUSED, /* SRU 2 */
-        { .flags = RSND_SCU_USE_HPBIF, },
+        RSND_SRC(0, 0),
-        { .flags = RSND_SCU_USE_HPBIF, },
+        RSND_SRC(0, 0),
-        { .flags = RSND_SCU_USE_HPBIF, },
+        RSND_SRC(0, 0),
-        { .flags = RSND_SCU_USE_HPBIF, },
+        RSND_SRC(0, 0),
-        { .flags = RSND_SCU_USE_HPBIF, },
+        RSND_SRC(0, 0),
-        { .flags = RSND_SCU_USE_HPBIF, },
+        RSND_SRC(0, 0),
+};
+static struct rsnd_dai_platform_info rsnd_dai[] = {
+        {
+                .playback = { .ssi = &rsnd_ssi[5], .src = &rsnd_src[5] },
+                .capture  = { .ssi = &rsnd_ssi[6], .src = &rsnd_src[6] },
+        }, {
+                .playback = { .ssi = &rsnd_ssi[3], .src = &rsnd_src[3] },
+        }, {
+                .capture  = { .ssi = &rsnd_ssi[4], .src = &rsnd_src[4] },
+        }, {
+                .playback = { .ssi = &rsnd_ssi[7], .src = &rsnd_src[7] },
+        }, {
+                .capture  = { .ssi = &rsnd_ssi[8], .src = &rsnd_src[8] },
+        },
 };
 enum {
@@ -437,8 +452,10 @@ static struct rcar_snd_info rsnd_info = {
        .flags          = RSND_GEN1,
        .ssi_info       = rsnd_ssi,
        .ssi_info_nr    = ARRAY_SIZE(rsnd_ssi),
-        .scu_info       = rsnd_scu,
+        .src_info       = rsnd_src,
-        .scu_info_nr    = ARRAY_SIZE(rsnd_scu),
+        .src_info_nr    = ARRAY_SIZE(rsnd_src),
+        .dai_info       = rsnd_dai,
+        .dai_info_nr    = ARRAY_SIZE(rsnd_dai),
        .start          = rsnd_start,
        .stop           = rsnd_stop,
 };
@@ -591,6 +608,7 @@ static void __init bockw_init(void)
 {
        void __iomem *base;
        struct clk *clk;
+        struct platform_device *pdev;
        int i;
        r8a7778_clock_init();
@@ -673,9 +691,6 @@ static void __init bockw_init(void)
        }
        /* for Audio */
-        clk = clk_get(NULL, "audio_clk_b");
-        clk_set_rate(clk, 24576000);
-        clk_put(clk);
        rsnd_codec_power(5, 1); /* enable ak4642 */
        platform_device_register_simple(
@@ -684,11 +699,15 @@ static void __init bockw_init(void)
        platform_device_register_simple(
                "ak4554-adc-dac", 1, NULL, 0);
-        platform_device_register_resndata(
+        pdev = platform_device_register_resndata(
                &platform_bus, "rcar_sound", -1,
                rsnd_resources, ARRAY_SIZE(rsnd_resources),
                &rsnd_info, sizeof(rsnd_info));
+        clk = clk_get(&pdev->dev, "clk_b");
+        clk_set_rate(clk, 24576000);
+        clk_put(clk);
        for (i = 0; i < ARRAY_SIZE(rsnd_card_info); i++) {
                struct platform_device_info cardinfo = {
                        .parent         = &platform_bus,
diff --git a/arch/arm/mach-shmobile/board-genmai-reference.c b/arch/arm/mach-shmobile/board-genmai-reference.c
index 7630c1053e32..2ff6ad6e608e 100644
--- a/arch/arm/mach-shmobile/board-genmai-reference.c
+++ b/arch/arm/mach-shmobile/board-genmai-reference.c
@@ -18,27 +18,31 @@
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */
-#include <linux/clk-provider.h>
 #include <linux/kernel.h>
 #include <linux/of_platform.h>
+#include <mach/clock.h>
 #include <mach/common.h>
 #include <mach/r7s72100.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+/*
+ * This is a really crude hack to provide clkdev support to platform
+ * devices until they get moved to DT.
+ */
+static const struct clk_name clk_names[] = {
+        { "mtu2", "fck", "sh-mtu2" },
+};
 static void __init genmai_add_standard_devices(void)
 {
-#ifdef CONFIG_COMMON_CLK
+        shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), true);
-        of_clk_init(NULL);
-#else
-        r7s72100_clock_init();
-#endif
        r7s72100_add_dt_devices();
        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 }
 static const char * const genmai_boards_compat_dt[] __initconst = {
-        "renesas,genmai-reference",
+        "renesas,genmai",
        NULL,
 };
diff --git a/arch/arm/mach-shmobile/board-genmai.c b/arch/arm/mach-shmobile/board-genmai.c
index 6c328d63b819..c94201ee8596 100644
--- a/arch/arm/mach-shmobile/board-genmai.c
+++ b/arch/arm/mach-shmobile/board-genmai.c
@@ -21,6 +21,7 @@
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
+#include <linux/serial_sci.h>
 #include <linux/sh_eth.h>
 #include <linux/spi/rspi.h>
 #include <linux/spi/spi.h>
@@ -89,6 +90,40 @@ static const struct spi_board_info spi_info[] __initconst = {
        },
 };
+/* SCIF */
+#define R7S72100_SCIF(index, baseaddr, irq)                             \
+static const struct plat_sci_port scif##index##_platform_data = {       \
+        .type           = PORT_SCIF,                                    \
+        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,               \
+        .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,              \
+        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \
+                          SCSCR_REIE,                                   \
+};                                                                      \
+                                                                        \
+static struct resource scif##index##_resources[] = {                    \
+        DEFINE_RES_MEM(baseaddr, 0x100),                                \
+        DEFINE_RES_IRQ(irq + 1),                                        \
+        DEFINE_RES_IRQ(irq + 2),                                        \
+        DEFINE_RES_IRQ(irq + 3),                                        \
+        DEFINE_RES_IRQ(irq),                                            \
+}                                                                       \
+R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
+R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
+R7S72100_SCIF(2, 0xe8008000, gic_iid(229));
+R7S72100_SCIF(3, 0xe8008800, gic_iid(233));
+R7S72100_SCIF(4, 0xe8009000, gic_iid(237));
+R7S72100_SCIF(5, 0xe8009800, gic_iid(241));
+R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
+R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
+#define r7s72100_register_scif(index)                                          \
+        platform_device_register_resndata(&platform_bus, "sh-sci", index,      \
+                                          scif##index##_resources,             \
+                                          ARRAY_SIZE(scif##index##_resources), \
+                                          &scif##index##_platform_data,        \
+                                          sizeof(scif##index##_platform_data))
 static void __init genmai_add_standard_devices(void)
 {
        r7s72100_clock_init();
@@ -102,6 +137,15 @@ static void __init genmai_add_standard_devices(void)
        r7s72100_register_rspi(3);
        r7s72100_register_rspi(4);
        spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
+        r7s72100_register_scif(0);
+        r7s72100_register_scif(1);
+        r7s72100_register_scif(2);
+        r7s72100_register_scif(3);
+        r7s72100_register_scif(4);
+        r7s72100_register_scif(5);
+        r7s72100_register_scif(6);
+        r7s72100_register_scif(7);
 }
 static const char * const genmai_boards_compat_dt[] __initconst = {
diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
index a3fd30242bd8..d322a162b4b0 100644
--- a/arch/arm/mach-shmobile/board-koelsch-reference.c
+++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
@@ -19,12 +19,11 @@
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */
-#include <linux/clk.h>
-#include <linux/clkdev.h>
 #include <linux/dma-mapping.h>
 #include <linux/kernel.h>
 #include <linux/of_platform.h>
 #include <linux/platform_data/rcar-du.h>
+#include <mach/clock.h>
 #include <mach/common.h>
 #include <mach/irqs.h>
 #include <mach/rcar-gen2.h>
@@ -82,49 +81,35 @@ static void __init koelsch_add_du_device(void)
        platform_device_register_full(&info);
 }
-static void __init koelsch_add_standard_devices(void)
+/*
-{
+ * This is a really crude hack to provide clkdev support to platform
-        /*
+ * devices until they get moved to DT.
-         * This is a really crude hack to provide clkdev support to the CMT and
+ */
-         * DU devices until they get moved to DT.
+static const struct clk_name clk_names[] __initconst = {
-         */
+        { "cmt0", "fck", "sh-cmt-48-gen2.0" },
-        static const struct clk_name {
+        { "du0", "du.0", "rcar-du-r8a7791" },
-                const char *clk;
+        { "du1", "du.1", "rcar-du-r8a7791" },
-                const char *con_id;
+        { "lvds0", "lvds.0", "rcar-du-r8a7791" },
-                const char *dev_id;
+};
-        } clk_names[] = {
-                { "cmt0", NULL, "sh_cmt.0" },
-                { "scifa0", NULL, "sh-sci.0" },
-                { "scifa1", NULL, "sh-sci.1" },
-                { "scifb0", NULL, "sh-sci.2" },
-                { "scifb1", NULL, "sh-sci.3" },
-                { "scifb2", NULL, "sh-sci.4" },
-                { "scifa2", NULL, "sh-sci.5" },
-                { "scif0", NULL, "sh-sci.6" },
-                { "scif1", NULL, "sh-sci.7" },
-                { "scif2", NULL, "sh-sci.8" },
-                { "scif3", NULL, "sh-sci.9" },
-                { "scif4", NULL, "sh-sci.10" },
-                { "scif5", NULL, "sh-sci.11" },
-                { "scifa3", NULL, "sh-sci.12" },
-                { "scifa4", NULL, "sh-sci.13" },
-                { "scifa5", NULL, "sh-sci.14" },
-                { "du0", "du.0", "rcar-du-r8a7791" },
-                { "du1", "du.1", "rcar-du-r8a7791" },
-                { "lvds0", "lvds.0", "rcar-du-r8a7791" },
-        };
-        struct clk *clk;
-        unsigned int i;
-        for (i = 0; i < ARRAY_SIZE(clk_names); ++i) {
+/*
-                clk = clk_get(NULL, clk_names[i].clk);
+ * This is a really crude hack to work around core platform clock issues
-                if (!IS_ERR(clk)) {
+ */
-                        clk_register_clkdev(clk, clk_names[i].con_id,
+static const struct clk_name clk_enables[] __initconst = {
-                                            clk_names[i].dev_id);
+        { "ether", NULL, "ee700000.ethernet" },
-                        clk_put(clk);
+        { "i2c2", NULL, "e6530000.i2c" },
-                }
+        { "msiof0", NULL, "e6e20000.spi" },
-        }
+        { "qspi_mod", NULL, "e6b10000.spi" },
+        { "sdhi0", NULL, "ee100000.sd" },
+        { "sdhi1", NULL, "ee140000.sd" },
+        { "sdhi2", NULL, "ee160000.sd" },
+        { "thermal", NULL, "e61f0000.thermal" },
+};
+static void __init koelsch_add_standard_devices(void)
+{
+        shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), false);
+        shmobile_clk_workaround(clk_enables, ARRAY_SIZE(clk_enables), true);
        r8a7791_add_dt_devices();
        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
@@ -139,7 +124,7 @@ static const char * const koelsch_boards_compat_dt[] __initconst = {
 DT_MACHINE_START(KOELSCH_DT, "koelsch")
        .smp            = smp_ops(r8a7791_smp_ops),
-        .init_early     = r8a7791_init_early,
+        .init_early     = shmobile_init_delay,
        .init_time      = rcar_gen2_timer_init,
        .init_machine   = koelsch_add_standard_devices,
        .init_late      = shmobile_init_late,
diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
index 5a034ff405d0..c6c68892caa3 100644
--- a/arch/arm/mach-shmobile/board-koelsch.c
+++ b/arch/arm/mach-shmobile/board-koelsch.c
@@ -216,7 +216,7 @@ static const struct spi_board_info spi_info[] __initconst = {
        {
                .modalias       = "m25p80",
                .platform_data  = &spi_flash_data,
-                .mode           = SPI_MODE_0,
+                .mode           = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD,
                .max_speed_hz   = 30000000,
                .bus_num        = 0,
                .chip_select    = 0,
@@ -522,7 +522,7 @@ static const char * const koelsch_boards_compat_dt[] __initconst = {
 DT_MACHINE_START(KOELSCH_DT, "koelsch")
        .smp            = smp_ops(r8a7791_smp_ops),
-        .init_early     = r8a7791_init_early,
+        .init_early     = shmobile_init_delay,
        .init_time      = rcar_gen2_timer_init,
        .init_machine   = koelsch_init,
        .init_late      = shmobile_init_late,
diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
index 440aac36d693..749832e3f33c 100644
--- a/arch/arm/mach-shmobile/board-lager-reference.c
+++ b/arch/arm/mach-shmobile/board-lager-reference.c
@@ -18,12 +18,11 @@
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */
-#include <linux/clk.h>
-#include <linux/clkdev.h>
 #include <linux/dma-mapping.h>
 #include <linux/init.h>
 #include <linux/of_platform.h>
 #include <linux/platform_data/rcar-du.h>
+#include <mach/clock.h>
 #include <mach/common.h>
 #include <mach/irqs.h>
 #include <mach/rcar-gen2.h>
@@ -86,46 +85,36 @@ static void __init lager_add_du_device(void)
        platform_device_register_full(&info);
 }
-static void __init lager_add_standard_devices(void)
+/*
-{
+ * This is a really crude hack to provide clkdev support to platform
-        /*
+ * devices until they get moved to DT.
-         * This is a really crude hack to provide clkdev support to platform
+ */
-         * devices until they get moved to DT.
+static const struct clk_name clk_names[] __initconst = {
-         */
+        { "cmt0", "fck", "sh-cmt-48-gen2.0" },
-        static const struct clk_name {
+        { "du0", "du.0", "rcar-du-r8a7790" },
-                const char *clk;
+        { "du1", "du.1", "rcar-du-r8a7790" },
-                const char *con_id;
+        { "du2", "du.2", "rcar-du-r8a7790" },
-                const char *dev_id;
+        { "lvds0", "lvds.0", "rcar-du-r8a7790" },
-        } clk_names[] = {
+        { "lvds1", "lvds.1", "rcar-du-r8a7790" },
-                { "cmt0", NULL, "sh_cmt.0" },
+};
-                { "scifa0", NULL, "sh-sci.0" },
-                { "scifa1", NULL, "sh-sci.1" },
-                { "scifb0", NULL, "sh-sci.2" },
-                { "scifb1", NULL, "sh-sci.3" },
-                { "scifb2", NULL, "sh-sci.4" },
-                { "scifa2", NULL, "sh-sci.5" },
-                { "scif0", NULL, "sh-sci.6" },
-                { "scif1", NULL, "sh-sci.7" },
-                { "hscif0", NULL, "sh-sci.8" },
-                { "hscif1", NULL, "sh-sci.9" },
-                { "du0", "du.0", "rcar-du-r8a7790" },
-                { "du1", "du.1", "rcar-du-r8a7790" },
-                { "du2", "du.2", "rcar-du-r8a7790" },
-                { "lvds0", "lvds.0", "rcar-du-r8a7790" },
-                { "lvds1", "lvds.1", "rcar-du-r8a7790" },
-        };
-        struct clk *clk;
-        unsigned int i;
-        for (i = 0; i < ARRAY_SIZE(clk_names); ++i) {
+/*
-                clk = clk_get(NULL, clk_names[i].clk);
+ * This is a really crude hack to work around core platform clock issues
-                if (!IS_ERR(clk)) {
+ */
-                        clk_register_clkdev(clk, clk_names[i].con_id,
+static const struct clk_name clk_enables[] __initconst = {
-                                            clk_names[i].dev_id);
+        { "ether", NULL, "ee700000.ethernet" },
-                        clk_put(clk);
+        { "msiof1", NULL, "e6e10000.spi" },
-                }
+        { "mmcif1", NULL, "ee220000.mmc" },
-        }
+        { "qspi_mod", NULL, "e6b10000.spi" },
+        { "sdhi0", NULL, "ee100000.sd" },
+        { "sdhi2", NULL, "ee140000.sd" },
+        { "thermal", NULL, "e61f0000.thermal" },
+};
+static void __init lager_add_standard_devices(void)
+{
+        shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), false);
+        shmobile_clk_workaround(clk_enables, ARRAY_SIZE(clk_enables), true);
        r8a7790_add_dt_devices();
        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index 18c7e0311aa6..f8b1e05463cc 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -325,12 +325,12 @@ static const struct rspi_plat_data qspi_pdata __initconst = {
 static const struct spi_board_info spi_info[] __initconst = {
        {
-                .modalias               = "m25p80",
+                .modalias       = "m25p80",
-                .platform_data          = &spi_flash_data,
+                .platform_data  = &spi_flash_data,
-                .mode                   = SPI_MODE_0,
+                .mode           = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD,
-                .max_speed_hz           = 30000000,
+                .max_speed_hz   = 30000000,
-                .bus_num                = 0,
+                .bus_num        = 0,
-                .chip_select            = 0,
+                .chip_select    = 0,
        },
 };
@@ -567,20 +567,27 @@ static struct resource rsnd_resources[] __initdata = {
 };
 static struct rsnd_ssi_platform_info rsnd_ssi[] = {
-        RSND_SSI_SET(0, 0, gic_spi(370), RSND_SSI_PLAY),
+        RSND_SSI(0, gic_spi(370), 0),
-        RSND_SSI_SET(0, 0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
+        RSND_SSI(0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
 };
-static struct rsnd_scu_platform_info rsnd_scu[2] = {
+static struct rsnd_src_platform_info rsnd_src[2] = {
        /* no member at this point */
 };
+static struct rsnd_dai_platform_info rsnd_dai = {
+        .playback = { .ssi = &rsnd_ssi[0], },
+        .capture  = { .ssi = &rsnd_ssi[1], },
+};
 static struct rcar_snd_info rsnd_info = {
        .flags          = RSND_GEN2,
        .ssi_info       = rsnd_ssi,
        .ssi_info_nr    = ARRAY_SIZE(rsnd_ssi),
-        .scu_info       = rsnd_scu,
+        .src_info       = rsnd_src,
-        .scu_info_nr    = ARRAY_SIZE(rsnd_scu),
+        .src_info_nr    = ARRAY_SIZE(rsnd_src),
+        .dai_info       = &rsnd_dai,
+        .dai_info_nr    = 1,
 };
 static struct asoc_simple_card_info rsnd_card_info = {
diff --git a/arch/arm/mach-shmobile/clock-emev2.c b/arch/arm/mach-shmobile/clock-emev2.c
deleted file mode 100644
index 5ac13ba71d54..000000000000
--- a/arch/arm/mach-shmobile/clock-emev2.c
+++ /dev/null
@@ -1,231 +0,0 @@
-/*
- * Emma Mobile EV2 clock framework support
- *
- * Copyright (C) 2012  Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/sh_clk.h>
-#include <linux/clkdev.h>
-#include <mach/common.h>
-#define EMEV2_SMU_BASE 0xe0110000
-/* EMEV2 SMU registers */
-#define USIAU0_RSTCTRL 0x094
-#define USIBU1_RSTCTRL 0x0ac
-#define USIBU2_RSTCTRL 0x0b0
-#define USIBU3_RSTCTRL 0x0b4
-#define STI_RSTCTRL 0x124
-#define USIAU0GCLKCTRL 0x4a0
-#define USIBU1GCLKCTRL 0x4b8
-#define USIBU2GCLKCTRL 0x4bc
-#define USIBU3GCLKCTRL 0x04c0
-#define STIGCLKCTRL 0x528
-#define USIAU0SCLKDIV 0x61c
-#define USIB2SCLKDIV 0x65c
-#define USIB3SCLKDIV 0x660
-#define STI_CLKSEL 0x688
-/* not pretty, but hey */
-static void __iomem *smu_base;
-static void emev2_smu_write(unsigned long value, int offs)
-{
-        BUG_ON(!smu_base || (offs >= PAGE_SIZE));
-        iowrite32(value, smu_base + offs);
-}
-static struct clk_mapping smu_mapping = {
-        .phys   = EMEV2_SMU_BASE,
-        .len    = PAGE_SIZE,
-};
-/* Fixed 32 KHz root clock from C32K pin */
-static struct clk c32k_clk = {
-        .rate           = 32768,
-        .mapping        = &smu_mapping,
-};
-/* PLL3 multiplies C32K with 7000 */
-static unsigned long pll3_recalc(struct clk *clk)
-{
-        return clk->parent->rate * 7000;
-}
-static struct sh_clk_ops pll3_clk_ops = {
-        .recalc         = pll3_recalc,
-};
-static struct clk pll3_clk = {
-        .ops            = &pll3_clk_ops,
-        .parent         = &c32k_clk,
-};
-static struct clk *main_clks[] = {
-        &c32k_clk,
-        &pll3_clk,
-};
-enum { SCLKDIV_USIAU0, SCLKDIV_USIBU2, SCLKDIV_USIBU1, SCLKDIV_USIBU3,
-        SCLKDIV_NR };
-#define SCLKDIV(_reg, _shift)                   \
-{                                                               \
-        .parent         = &pll3_clk,                            \
-        .enable_reg     = IOMEM(EMEV2_SMU_BASE + (_reg)),       \
-        .enable_bit     = _shift,                               \
-}
-static struct clk sclkdiv_clks[SCLKDIV_NR] = {
-        [SCLKDIV_USIAU0] = SCLKDIV(USIAU0SCLKDIV, 0),
-        [SCLKDIV_USIBU2] = SCLKDIV(USIB2SCLKDIV, 16),
-        [SCLKDIV_USIBU1] = SCLKDIV(USIB2SCLKDIV, 0),
-        [SCLKDIV_USIBU3] = SCLKDIV(USIB3SCLKDIV, 0),
-};
-enum { GCLK_USIAU0_SCLK, GCLK_USIBU1_SCLK, GCLK_USIBU2_SCLK, GCLK_USIBU3_SCLK,
-        GCLK_STI_SCLK,
-        GCLK_NR };
-#define GCLK_SCLK(_parent, _reg) \
-{                                                               \
-        .parent         = _parent,                              \
-        .enable_reg     = IOMEM(EMEV2_SMU_BASE + (_reg)),       \
-        .enable_bit     = 1, /* SCLK_GCC */                     \
-}
-static struct clk gclk_clks[GCLK_NR] = {
-        [GCLK_USIAU0_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIAU0],
-                                       USIAU0GCLKCTRL),
-        [GCLK_USIBU1_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIBU1],
-                                       USIBU1GCLKCTRL),
-        [GCLK_USIBU2_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIBU2],
-                                       USIBU2GCLKCTRL),
-        [GCLK_USIBU3_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIBU3],
-                                       USIBU3GCLKCTRL),
-        [GCLK_STI_SCLK] = GCLK_SCLK(&c32k_clk, STIGCLKCTRL),
-};
-static int emev2_gclk_enable(struct clk *clk)
-{
-        iowrite32(ioread32(clk->mapped_reg) | (1 << clk->enable_bit),
-                  clk->mapped_reg);
-        return 0;
-}
-static void emev2_gclk_disable(struct clk *clk)
-{
-        iowrite32(ioread32(clk->mapped_reg) & ~(1 << clk->enable_bit),
-                  clk->mapped_reg);
-}
-static struct sh_clk_ops emev2_gclk_clk_ops = {
-        .enable         = emev2_gclk_enable,
-        .disable        = emev2_gclk_disable,
-        .recalc         = followparent_recalc,
-};
-static int __init emev2_gclk_register(struct clk *clks, int nr)
-{
-        struct clk *clkp;
-        int ret = 0;
-        int k;
-        for (k = 0; !ret && (k < nr); k++) {
-                clkp = clks + k;
-                clkp->ops = &emev2_gclk_clk_ops;
-                ret |= clk_register(clkp);
-        }
-        return ret;
-}
-static unsigned long emev2_sclkdiv_recalc(struct clk *clk)
-{
-        unsigned int sclk_div;
-        sclk_div = (ioread32(clk->mapped_reg) >> clk->enable_bit) & 0xff;
-        return clk->parent->rate / (sclk_div + 1);
-}
-static struct sh_clk_ops emev2_sclkdiv_clk_ops = {
-        .recalc         = emev2_sclkdiv_recalc,
-};
-static int __init emev2_sclkdiv_register(struct clk *clks, int nr)
-{
-        struct clk *clkp;
-        int ret = 0;
-        int k;
-        for (k = 0; !ret && (k < nr); k++) {
-                clkp = clks + k;
-                clkp->ops = &emev2_sclkdiv_clk_ops;
-                ret |= clk_register(clkp);
-        }
-        return ret;
-}
-static struct clk_lookup lookups[] = {
-        CLKDEV_DEV_ID("serial8250-em.0", &gclk_clks[GCLK_USIAU0_SCLK]),
-        CLKDEV_DEV_ID("e1020000.uart", &gclk_clks[GCLK_USIAU0_SCLK]),
-        CLKDEV_DEV_ID("serial8250-em.1", &gclk_clks[GCLK_USIBU1_SCLK]),
-        CLKDEV_DEV_ID("e1030000.uart", &gclk_clks[GCLK_USIBU1_SCLK]),
-        CLKDEV_DEV_ID("serial8250-em.2", &gclk_clks[GCLK_USIBU2_SCLK]),
-        CLKDEV_DEV_ID("e1040000.uart", &gclk_clks[GCLK_USIBU2_SCLK]),
-        CLKDEV_DEV_ID("serial8250-em.3", &gclk_clks[GCLK_USIBU3_SCLK]),
-        CLKDEV_DEV_ID("e1050000.uart", &gclk_clks[GCLK_USIBU3_SCLK]),
-        CLKDEV_DEV_ID("em_sti.0", &gclk_clks[GCLK_STI_SCLK]),
-        CLKDEV_DEV_ID("e0180000.sti", &gclk_clks[GCLK_STI_SCLK]),
-};
-void __init emev2_clock_init(void)
-{
-        int k, ret = 0;
-        smu_base = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);
-        BUG_ON(!smu_base);
-        /* setup STI timer to run on 32.768 kHz and deassert reset */
-        emev2_smu_write(0, STI_CLKSEL);
-        emev2_smu_write(1, STI_RSTCTRL);
-        /* deassert reset for UART0->UART3 */
-        emev2_smu_write(2, USIAU0_RSTCTRL);
-        emev2_smu_write(2, USIBU1_RSTCTRL);
-        emev2_smu_write(2, USIBU2_RSTCTRL);
-        emev2_smu_write(2, USIBU3_RSTCTRL);
-        for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
-                ret = clk_register(main_clks[k]);
-        if (!ret)
-                ret = emev2_sclkdiv_register(sclkdiv_clks, SCLKDIV_NR);
-        if (!ret)
-                ret = emev2_gclk_register(gclk_clks, GCLK_NR);
-        clkdev_add_table(lookups, ARRAY_SIZE(lookups));
-        if (!ret)
-                shmobile_clk_init();
-        else
-                panic("failed to setup emev2 clocks\n");
-}
diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
index bee0073c9b64..df187484de5d 100644
--- a/arch/arm/mach-shmobile/clock-r7s72100.c
+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
@@ -194,17 +194,7 @@ static struct clk_lookup lookups[] = {
        CLKDEV_DEV_ID("rspi-rz.2", &mstp_clks[MSTP105]),
        CLKDEV_DEV_ID("rspi-rz.3", &mstp_clks[MSTP104]),
        CLKDEV_DEV_ID("rspi-rz.4", &mstp_clks[MSTP103]),
-        CLKDEV_DEV_ID("e800c800.spi", &mstp_clks[MSTP107]),
-        CLKDEV_DEV_ID("e800d000.spi", &mstp_clks[MSTP106]),
-        CLKDEV_DEV_ID("e800d800.spi", &mstp_clks[MSTP105]),
-        CLKDEV_DEV_ID("e800e000.spi", &mstp_clks[MSTP104]),
-        CLKDEV_DEV_ID("e800e800.spi", &mstp_clks[MSTP103]),
-        CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
-        CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
-        CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
-        CLKDEV_DEV_ID("fcfeec00.i2c", &mstp_clks[MSTP94]),
        CLKDEV_DEV_ID("r7s72100-ether", &mstp_clks[MSTP74]),
-        CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
        /* ICK */
        CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP47]),
@@ -215,6 +205,7 @@ static struct clk_lookup lookups[] = {
        CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]),
        CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]),
        CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]),
+        CLKDEV_ICK_ID("fck", "sh-mtu2", &mstp_clks[MSTP33]),
 };
 void __init r7s72100_clock_init(void)
diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
index 7348d58f500e..b5bc22c6a858 100644
--- a/arch/arm/mach-shmobile/clock-r8a73a4.c
+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
@@ -597,7 +597,7 @@ static struct clk_lookup lookups[] = {
        CLKDEV_DEV_ID("e6560000.i2c", &mstp_clks[MSTP317]),
        CLKDEV_DEV_ID("e6500000.i2c", &mstp_clks[MSTP318]),
        CLKDEV_DEV_ID("e6510000.i2c", &mstp_clks[MSTP323]),
-        CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]),
+        CLKDEV_ICK_ID("fck", "sh-cmt-48-gen2.1", &mstp_clks[MSTP329]),
        CLKDEV_DEV_ID("e60b0000.i2c", &mstp_clks[MSTP409]),
        CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP410]),
        CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP411]),
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index dd989f93498f..50931e3c97c7 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -548,15 +548,9 @@ static struct clk_lookup lookups[] = {
        /* MSTP32 clocks */
        CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0",    &mstp_clks[MSTP100]),
-        CLKDEV_DEV_ID("sh_tmu.3",               &mstp_clks[MSTP111]),
-        CLKDEV_DEV_ID("sh_tmu.4",               &mstp_clks[MSTP111]),
-        CLKDEV_DEV_ID("sh_tmu.5",               &mstp_clks[MSTP111]),
        CLKDEV_DEV_ID("i2c-sh_mobile.0",        &mstp_clks[MSTP116]),
        CLKDEV_DEV_ID("fff20000.i2c",           &mstp_clks[MSTP116]),
        CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1",    &mstp_clks[MSTP117]),
-        CLKDEV_DEV_ID("sh_tmu.0",               &mstp_clks[MSTP125]),
-        CLKDEV_DEV_ID("sh_tmu.1",               &mstp_clks[MSTP125]),
-        CLKDEV_DEV_ID("sh_tmu.2",               &mstp_clks[MSTP125]),
        CLKDEV_DEV_ID("sh_mobile_ceu.0",        &mstp_clks[MSTP127]),
        CLKDEV_DEV_ID("sh_mobile_ceu.1",        &mstp_clks[MSTP128]),
@@ -583,7 +577,6 @@ static struct clk_lookup lookups[] = {
        CLKDEV_DEV_ID("sh-sci.6",               &mstp_clks[MSTP230]),
        CLKDEV_DEV_ID("e6cc0000.sci",           &mstp_clks[MSTP230]),
-        CLKDEV_DEV_ID("sh_cmt.10",              &mstp_clks[MSTP329]),
        CLKDEV_DEV_ID("sh_fsi2",                &mstp_clks[MSTP328]),
        CLKDEV_DEV_ID("fe1f0000.sound",         &mstp_clks[MSTP328]),
        CLKDEV_DEV_ID("i2c-sh_mobile.1",        &mstp_clks[MSTP323]),
@@ -596,7 +589,7 @@ static struct clk_lookup lookups[] = {
        CLKDEV_DEV_ID("sh_mmcif",               &mstp_clks[MSTP312]),
        CLKDEV_DEV_ID("e6bd0000.mmc",           &mstp_clks[MSTP312]),
        CLKDEV_DEV_ID("r8a7740-gether",         &mstp_clks[MSTP309]),
-        CLKDEV_DEV_ID("e9a00000.sh-eth",        &mstp_clks[MSTP309]),
+        CLKDEV_DEV_ID("e9a00000.ethernet",      &mstp_clks[MSTP309]),
        CLKDEV_DEV_ID("renesas-tpu-pwm",        &mstp_clks[MSTP304]),
        CLKDEV_DEV_ID("e6600000.pwm",           &mstp_clks[MSTP304]),
@@ -604,6 +597,9 @@ static struct clk_lookup lookups[] = {
        CLKDEV_DEV_ID("e6870000.sd",            &mstp_clks[MSTP415]),
        /* ICK */
+        CLKDEV_ICK_ID("fck",    "sh-tmu.1",             &mstp_clks[MSTP111]),
+        CLKDEV_ICK_ID("fck",    "sh-tmu.0",             &mstp_clks[MSTP125]),
+        CLKDEV_ICK_ID("fck",    "sh-cmt-48.1",          &mstp_clks[MSTP329]),
        CLKDEV_ICK_ID("host",   "renesas_usbhs",        &mstp_clks[MSTP416]),
        CLKDEV_ICK_ID("func",   "renesas_usbhs",        &mstp_clks[MSTP407]),
        CLKDEV_ICK_ID("phy",    "renesas_usbhs",        &mstp_clks[MSTP406]),
diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
index 9989b1b06ffd..13f8f3ab8840 100644
--- a/arch/arm/mach-shmobile/clock-r8a7778.c
+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
@@ -175,10 +175,6 @@ static struct clk mstp_clks[MSTP_NR] = {
 static struct clk_lookup lookups[] = {
        /* main */
-        CLKDEV_CON_ID("audio_clk_a",    &audio_clk_a),
-        CLKDEV_CON_ID("audio_clk_b",    &audio_clk_b),
-        CLKDEV_CON_ID("audio_clk_c",    &audio_clk_c),
-        CLKDEV_CON_ID("audio_clk_internal",     &s1_clk),
        CLKDEV_CON_ID("shyway_clk",     &s_clk),
        CLKDEV_CON_ID("peripheral_clk", &p_clk),
@@ -211,8 +207,6 @@ static struct clk_lookup lookups[] = {
        CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */
        CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */
        CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
-        CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
-        CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */
        CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
        CLKDEV_DEV_ID("fffc7000.spi", &mstp_clks[MSTP007]), /* HSPI0 */
        CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
@@ -234,15 +228,17 @@ static struct clk_lookup lookups[] = {
        CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP309]),
        CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP308]),
        CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP307]),
-        CLKDEV_ICK_ID("scu.0", "rcar_sound", &mstp_clks[MSTP531]),
+        CLKDEV_ICK_ID("src.0", "rcar_sound", &mstp_clks[MSTP531]),
-        CLKDEV_ICK_ID("scu.1", "rcar_sound", &mstp_clks[MSTP530]),
+        CLKDEV_ICK_ID("src.1", "rcar_sound", &mstp_clks[MSTP530]),
-        CLKDEV_ICK_ID("scu.2", "rcar_sound", &mstp_clks[MSTP529]),
+        CLKDEV_ICK_ID("src.2", "rcar_sound", &mstp_clks[MSTP529]),
-        CLKDEV_ICK_ID("scu.3", "rcar_sound", &mstp_clks[MSTP528]),
+        CLKDEV_ICK_ID("src.3", "rcar_sound", &mstp_clks[MSTP528]),
-        CLKDEV_ICK_ID("scu.4", "rcar_sound", &mstp_clks[MSTP527]),
+        CLKDEV_ICK_ID("src.4", "rcar_sound", &mstp_clks[MSTP527]),
-        CLKDEV_ICK_ID("scu.5", "rcar_sound", &mstp_clks[MSTP526]),
+        CLKDEV_ICK_ID("src.5", "rcar_sound", &mstp_clks[MSTP526]),
-        CLKDEV_ICK_ID("scu.6", "rcar_sound", &mstp_clks[MSTP525]),
+        CLKDEV_ICK_ID("src.6", "rcar_sound", &mstp_clks[MSTP525]),
-        CLKDEV_ICK_ID("scu.7", "rcar_sound", &mstp_clks[MSTP524]),
+        CLKDEV_ICK_ID("src.7", "rcar_sound", &mstp_clks[MSTP524]),
-        CLKDEV_ICK_ID("scu.8", "rcar_sound", &mstp_clks[MSTP523]),
+        CLKDEV_ICK_ID("src.8", "rcar_sound", &mstp_clks[MSTP523]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP016]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP015]),
 };
 void __init r8a7778_clock_init(void)
diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
index 8e403ae0c7b2..a13298bd37a8 100644
--- a/arch/arm/mach-shmobile/clock-r8a7779.c
+++ b/arch/arm/mach-shmobile/clock-r8a7779.c
@@ -173,9 +173,7 @@ static struct clk_lookup lookups[] = {
        CLKDEV_DEV_ID("ohci-platform.1", &mstp_clks[MSTP101]), /* USB OHCI port2 */
        CLKDEV_DEV_ID("ehci-platform.0", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */
        CLKDEV_DEV_ID("ohci-platform.0", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */
-        CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
+        CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP016]), /* TMU0 */
-        CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */
-        CLKDEV_DEV_ID("sh_tmu.2", &mstp_clks[MSTP016]), /* TMU02 */
        CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
        CLKDEV_DEV_ID("ffc70000.i2c", &mstp_clks[MSTP030]), /* I2C0 */
        CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index 3f93503f5b96..296a057109e4 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -249,10 +249,10 @@ static struct clk mstp_clks[MSTP_NR] = {
        [MSTP1007] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 7, MSTPSR10, 0), /* SSI8 */
        [MSTP1006] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 6, MSTPSR10, 0), /* SSI9 */
        [MSTP1005] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 5, MSTPSR10, 0), /* SSI ALL */
-        [MSTP931] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */
+        [MSTP931] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */
-        [MSTP930] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */
+        [MSTP930] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */
-        [MSTP929] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */
+        [MSTP929] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */
-        [MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
+        [MSTP928] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
        [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */
        [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */
        [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */
@@ -294,10 +294,6 @@ static struct clk mstp_clks[MSTP_NR] = {
 static struct clk_lookup lookups[] = {
        /* main clocks */
-        CLKDEV_CON_ID("audio_clk_a",    &audio_clk_a),
-        CLKDEV_CON_ID("audio_clk_b",    &audio_clk_b),
-        CLKDEV_CON_ID("audio_clk_c",    &audio_clk_c),
-        CLKDEV_CON_ID("audio_clk_internal",     &m2_clk),
        CLKDEV_CON_ID("extal",          &extal_clk),
        CLKDEV_CON_ID("extal_div2",     &extal_div2_clk),
        CLKDEV_CON_ID("main",           &main_clk),
@@ -361,7 +357,6 @@ static struct clk_lookup lookups[] = {
        CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
        CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP311]),
        CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
-        CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
        CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
        CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
        CLKDEV_DEV_ID("pci-rcar-gen2.0", &mstp_clks[MSTP703]),
@@ -371,6 +366,7 @@ static struct clk_lookup lookups[] = {
        CLKDEV_DEV_ID("sata-r8a7790.1", &mstp_clks[MSTP814]),
        /* ICK */
+        CLKDEV_ICK_ID("fck", "sh-cmt-48-gen2.0", &mstp_clks[MSTP124]),
        CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]),
        CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7790", &mstp_clks[MSTP726]),
        CLKDEV_ICK_ID("lvds.1", "rcar-du-r8a7790", &mstp_clks[MSTP725]),
@@ -381,16 +377,16 @@ static struct clk_lookup lookups[] = {
        CLKDEV_ICK_ID("clk_b", "rcar_sound", &audio_clk_b),
        CLKDEV_ICK_ID("clk_c", "rcar_sound", &audio_clk_c),
        CLKDEV_ICK_ID("clk_i", "rcar_sound", &m2_clk),
-        CLKDEV_ICK_ID("scu.0", "rcar_sound", &mstp_clks[MSTP1031]),
+        CLKDEV_ICK_ID("src.0", "rcar_sound", &mstp_clks[MSTP1031]),
-        CLKDEV_ICK_ID("scu.1", "rcar_sound", &mstp_clks[MSTP1030]),
+        CLKDEV_ICK_ID("src.1", "rcar_sound", &mstp_clks[MSTP1030]),
-        CLKDEV_ICK_ID("scu.2", "rcar_sound", &mstp_clks[MSTP1029]),
+        CLKDEV_ICK_ID("src.2", "rcar_sound", &mstp_clks[MSTP1029]),
-        CLKDEV_ICK_ID("scu.3", "rcar_sound", &mstp_clks[MSTP1028]),
+        CLKDEV_ICK_ID("src.3", "rcar_sound", &mstp_clks[MSTP1028]),
-        CLKDEV_ICK_ID("scu.4", "rcar_sound", &mstp_clks[MSTP1027]),
+        CLKDEV_ICK_ID("src.4", "rcar_sound", &mstp_clks[MSTP1027]),
-        CLKDEV_ICK_ID("scu.5", "rcar_sound", &mstp_clks[MSTP1026]),
+        CLKDEV_ICK_ID("src.5", "rcar_sound", &mstp_clks[MSTP1026]),
-        CLKDEV_ICK_ID("scu.6", "rcar_sound", &mstp_clks[MSTP1025]),
+        CLKDEV_ICK_ID("src.6", "rcar_sound", &mstp_clks[MSTP1025]),
-        CLKDEV_ICK_ID("scu.7", "rcar_sound", &mstp_clks[MSTP1024]),
+        CLKDEV_ICK_ID("src.7", "rcar_sound", &mstp_clks[MSTP1024]),
-        CLKDEV_ICK_ID("scu.8", "rcar_sound", &mstp_clks[MSTP1023]),
+        CLKDEV_ICK_ID("src.8", "rcar_sound", &mstp_clks[MSTP1023]),
-        CLKDEV_ICK_ID("scu.9", "rcar_sound", &mstp_clks[MSTP1022]),
+        CLKDEV_ICK_ID("src.9", "rcar_sound", &mstp_clks[MSTP1022]),
        CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP1015]),
        CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP1014]),
        CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP1013]),
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index 701383fe3267..e2fdfcc14436 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -25,6 +25,7 @@
 #include <linux/clkdev.h>
 #include <mach/clock.h>
 #include <mach/common.h>
+#include <mach/rcar-gen2.h>
 /*
 *   MD         EXTAL           PLL0    PLL1    PLL3
@@ -43,8 +44,6 @@
 *      see "p1 / 2" on R8A7791_CLOCK_ROOT() below
 */
-#define MD(nr)  (1 << nr)
 #define CPG_BASE 0xe6150000
 #define CPG_LEN 0x1000
@@ -68,7 +67,6 @@
 #define MSTPSR9         IOMEM(0xe61509a4)
 #define MSTPSR11        IOMEM(0xe61509ac)
-#define MODEMR          0xE6160060
 #define SDCKCR          0xE6150074
 #define SD1CKCR         0xE6150078
 #define SD2CKCR         0xE615026c
@@ -190,12 +188,12 @@ static struct clk mstp_clks[MSTP_NR] = {
        [MSTP1108] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 8, MSTPSR11, 0), /* SCIFA5 */
        [MSTP1107] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 7, MSTPSR11, 0), /* SCIFA4 */
        [MSTP1106] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 6, MSTPSR11, 0), /* SCIFA3 */
-        [MSTP931] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */
+        [MSTP931] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */
-        [MSTP930] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */
+        [MSTP930] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */
-        [MSTP929] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */
+        [MSTP929] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */
-        [MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
+        [MSTP928] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
-        [MSTP927] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 27, MSTPSR9, 0), /* I2C4 */
+        [MSTP927] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 27, MSTPSR9, 0), /* I2C4 */
-        [MSTP925] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 25, MSTPSR9, 0), /* I2C5 */
+        [MSTP925] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 25, MSTPSR9, 0), /* I2C5 */
        [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */
        [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */
        [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */
@@ -266,7 +264,7 @@ static struct clk_lookup lookups[] = {
        CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
        CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP312]),
        CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]),
-        CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
+        CLKDEV_ICK_ID("fck", "sh-cmt-48-gen2.0", &mstp_clks[MSTP124]),
        CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
        CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
        CLKDEV_DEV_ID("i2c-rcar_gen2.0", &mstp_clks[MSTP931]),
@@ -295,14 +293,9 @@ static struct clk_lookup lookups[] = {
 void __init r8a7791_clock_init(void)
 {
-        void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE);
+        u32 mode = rcar_gen2_read_mode_pins();
-        u32 mode;
        int k, ret = 0;
-        BUG_ON(!modemr);
-        mode = ioread32(modemr);
-        iounmap(modemr);
        switch (mode & (MD(14) | MD(13))) {
        case 0:
                R8A7791_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88);
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 28489978b09c..d16d9ca7f79e 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -515,8 +515,6 @@ static struct clk_lookup lookups[] = {
        CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */
        CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU */
        CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2 */
-        CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
-        CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
        CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX0 */
        CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */
        CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */
@@ -565,10 +563,7 @@ static struct clk_lookup lookups[] = {
        CLKDEV_DEV_ID("r8a66597_hcd.1", &mstp_clks[MSTP406]), /* USB1 */
        CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */
        CLKDEV_DEV_ID("renesas_usbhs.1", &mstp_clks[MSTP406]), /* USB1 */
-        CLKDEV_DEV_ID("sh_cmt.4", &mstp_clks[MSTP405]), /* CMT4 */
-        CLKDEV_DEV_ID("sh_cmt.3", &mstp_clks[MSTP404]), /* CMT3 */
        CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
-        CLKDEV_DEV_ID("sh_cmt.2", &mstp_clks[MSTP400]), /* CMT2 */
        /* ICK */
        CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
@@ -580,7 +575,11 @@ static struct clk_lookup lookups[] = {
        CLKDEV_ICK_ID("ick", "sh-mobile-hdmi", &div6_reparent_clks[DIV6_HDMI]),
        CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]),
        CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP125]), /* TMU0 */
        CLKDEV_ICK_ID("spu2", "sh_fsi2", &mstp_clks[MSTP223]),
+        CLKDEV_ICK_ID("fck", "sh-cmt-32-fast.4", &mstp_clks[MSTP405]), /* CMT4 */
+        CLKDEV_ICK_ID("fck", "sh-cmt-32-fast.3", &mstp_clks[MSTP404]), /* CMT3 */
+        CLKDEV_ICK_ID("fck", "sh-cmt-32-fast.2", &mstp_clks[MSTP400]), /* CMT2 */
        CLKDEV_ICK_ID("diva", "sh_fsi2", &fsidivs[FSIDIV_A]),
        CLKDEV_ICK_ID("divb", "sh_fsi2", &fsidivs[FSIDIV_B]),
        CLKDEV_ICK_ID("xcka", "sh_fsi2", &fsiack_clk),
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 23edf8360c27..0d9cd1fe0212 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -633,8 +633,6 @@ static struct clk_lookup lookups[] = {
        CLKDEV_DEV_ID("sh-mobile-csi2.1", &mstp_clks[MSTP128]), /* CSI2-RX1 */
        CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU0 */
        CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2-RX0 */
-        CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
-        CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
        CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
        CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
        CLKDEV_DEV_ID("e6820000.i2c", &mstp_clks[MSTP116]), /* I2C0 */
@@ -650,7 +648,6 @@ static struct clk_lookup lookups[] = {
        CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */
        CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
        CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
-        CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
        CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */
        CLKDEV_DEV_ID("ec230000.sound", &mstp_clks[MSTP328]), /* FSI */
        CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
@@ -683,6 +680,8 @@ static struct clk_lookup lookups[] = {
        CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
        CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.0", &dsi0phy_clk),
        CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.1", &dsi1phy_clk),
+        CLKDEV_ICK_ID("fck", "sh-cmt-48.1", &mstp_clks[MSTP329]), /* CMT1 */
+        CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP125]), /* TMU0 */
 };
 void __init sh73a0_clock_init(void)
diff --git a/arch/arm/mach-shmobile/clock.c b/arch/arm/mach-shmobile/clock.c
index ad7df629d995..e7232a0373b9 100644
--- a/arch/arm/mach-shmobile/clock.c
+++ b/arch/arm/mach-shmobile/clock.c
@@ -21,6 +21,32 @@
 */
 #include <linux/kernel.h>
 #include <linux/init.h>
+#ifdef CONFIG_COMMON_CLK
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <mach/clock.h>
+void __init shmobile_clk_workaround(const struct clk_name *clks,
+                                    int nr_clks, bool enable)
+{
+        const struct clk_name *clkn;
+        struct clk *clk;
+        unsigned int i;
+        for (i = 0; i < nr_clks; ++i) {
+                clkn = clks + i;
+                clk = clk_get(NULL, clkn->clk);
+                if (!IS_ERR(clk)) {
+                        clk_register_clkdev(clk, clkn->con_id, clkn->dev_id);
+                        if (enable)
+                                clk_prepare_enable(clk);
+                        clk_put(clk);
+                }
+        }
+}
+#else /* CONFIG_COMMON_CLK */
 #include <linux/sh_clk.h>
 #include <linux/export.h>
 #include <mach/clock.h>
@@ -58,3 +84,5 @@ void __clk_put(struct clk *clk)
 {
 }
 EXPORT_SYMBOL(__clk_put);
+#endif /* CONFIG_COMMON_CLK */
diff --git a/arch/arm/mach-shmobile/include/mach/clock.h b/arch/arm/mach-shmobile/include/mach/clock.h
index 03e56074928c..31b6417463e6 100644
--- a/arch/arm/mach-shmobile/include/mach/clock.h
+++ b/arch/arm/mach-shmobile/include/mach/clock.h
@@ -1,6 +1,22 @@
 #ifndef CLOCK_H
 #define CLOCK_H
+#ifdef CONFIG_COMMON_CLK
+/* temporary clock configuration helper for platform devices */
+struct clk_name {
+        const char *clk;
+        const char *con_id;
+        const char *dev_id;
+};
+void shmobile_clk_workaround(const struct clk_name *clks, int nr_clks,
+                             bool enable);
+#else /* CONFIG_COMMON_CLK */
+/* legacy clock implementation */
+struct clk;
 unsigned long shmobile_fixed_ratio_clk_recalc(struct clk *clk);
 extern struct sh_clk_ops shmobile_fixed_ratio_clk_ops;
@@ -36,4 +52,5 @@ do {			\
        (p)->div = d;   \
 } while (0)
+#endif /* CONFIG_COMMON_CLK */
 #endif
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index cb8e32deb2a3..f7a360edcc35 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -4,6 +4,7 @@
 extern void shmobile_earlytimer_init(void);
 extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz,
                         unsigned int mult, unsigned int div);
+extern void shmobile_init_delay(void);
 struct twd_local_timer;
 extern void shmobile_setup_console(void);
 extern void shmobile_boot_vector(void);
diff --git a/arch/arm/mach-shmobile/include/mach/emev2.h b/arch/arm/mach-shmobile/include/mach/emev2.h
deleted file mode 100644
index fcb142a14e07..000000000000
--- a/arch/arm/mach-shmobile/include/mach/emev2.h
+++ /dev/null
@@ -1,9 +0,0 @@
-#ifndef __ASM_EMEV2_H__
-#define __ASM_EMEV2_H__
-extern void emev2_map_io(void);
-extern void emev2_init_delay(void);
-extern void emev2_clock_init(void);
-extern struct smp_operations emev2_smp_ops;
-#endif /* __ASM_EMEV2_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
index d07932f872b6..5e3c9ec06303 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
@@ -47,7 +47,6 @@ enum {
 };
 extern void r8a7740_meram_workaround(void);
-extern void r8a7740_init_delay(void);
 extern void r8a7740_init_irq_of(void);
 extern void r8a7740_map_io(void);
 extern void r8a7740_add_early_devices(void);
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7791.h b/arch/arm/mach-shmobile/include/mach/r8a7791.h
index 200fa699f730..664274cc4b64 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7791.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7791.h
@@ -5,7 +5,6 @@ void r8a7791_add_standard_devices(void);
 void r8a7791_add_dt_devices(void);
 void r8a7791_clock_init(void);
 void r8a7791_pinmux_init(void);
-void r8a7791_init_early(void);
 extern struct smp_operations r8a7791_smp_ops;
 #endif /* __ASM_R8A7791_H__ */
diff --git a/arch/arm/mach-shmobile/pm-rmobile.c b/arch/arm/mach-shmobile/pm-rmobile.c
index 1fc05d9453d0..f710235aff2f 100644
--- a/arch/arm/mach-shmobile/pm-rmobile.c
+++ b/arch/arm/mach-shmobile/pm-rmobile.c
@@ -99,39 +99,7 @@ static int rmobile_pd_power_up(struct generic_pm_domain *genpd)
 static bool rmobile_pd_active_wakeup(struct device *dev)
 {
-        bool (*active_wakeup)(struct device *dev);
+        return true;
-        active_wakeup = dev_gpd_data(dev)->ops.active_wakeup;
-        return active_wakeup ? active_wakeup(dev) : true;
-}
-static int rmobile_pd_stop_dev(struct device *dev)
-{
-        int (*stop)(struct device *dev);
-        stop = dev_gpd_data(dev)->ops.stop;
-        if (stop) {
-                int ret = stop(dev);
-                if (ret)
-                        return ret;
-        }
-        return pm_clk_suspend(dev);
-}
-static int rmobile_pd_start_dev(struct device *dev)
-{
-        int (*start)(struct device *dev);
-        int ret;
-        ret = pm_clk_resume(dev);
-        if (ret)
-                return ret;
-        start = dev_gpd_data(dev)->ops.start;
-        if (start)
-                ret = start(dev);
-        return ret;
 }
 static void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd)
@@ -140,8 +108,8 @@ static void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd)
        struct dev_power_governor *gov = rmobile_pd->gov;
        pm_genpd_init(genpd, gov ? : &simple_qos_governor, false);
-        genpd->dev_ops.stop             = rmobile_pd_stop_dev;
+        genpd->dev_ops.stop             = pm_clk_suspend;
-        genpd->dev_ops.start            = rmobile_pd_start_dev;
+        genpd->dev_ops.start            = pm_clk_resume;
        genpd->dev_ops.active_wakeup    = rmobile_pd_active_wakeup;
        genpd->dev_irq_safe             = true;
        genpd->power_off                = rmobile_pd_power_down;
diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
index c71d667007b8..d953ff6e78a2 100644
--- a/arch/arm/mach-shmobile/setup-emev2.c
+++ b/arch/arm/mach-shmobile/setup-emev2.c
@@ -21,7 +21,6 @@
 #include <linux/init.h>
 #include <linux/of_platform.h>
 #include <mach/common.h>
-#include <mach/emev2.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -38,23 +37,19 @@ static struct map_desc emev2_io_desc[] __initdata = {
 #endif
 };
-void __init emev2_map_io(void)
+static void __init emev2_map_io(void)
 {
        iotable_init(emev2_io_desc, ARRAY_SIZE(emev2_io_desc));
 }
-void __init emev2_init_delay(void)
+static void __init emev2_init_delay(void)
 {
        shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */
 }
 static void __init emev2_add_standard_devices_dt(void)
 {
-#ifdef CONFIG_COMMON_CLK
        of_clk_init(NULL);
-#else
-        emev2_clock_init();
-#endif
        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 }
@@ -63,6 +58,8 @@ static const char *emev2_boards_compat_dt[] __initconst = {
        NULL,
 };
+extern struct smp_operations emev2_smp_ops;
 DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
        .smp            = smp_ops(emev2_smp_ops),
        .map_io         = emev2_map_io,
diff --git a/arch/arm/mach-shmobile/setup-r7s72100.c b/arch/arm/mach-shmobile/setup-r7s72100.c
index 9c0b3a9d5f7a..412e179429cd 100644
--- a/arch/arm/mach-shmobile/setup-r7s72100.c
+++ b/arch/arm/mach-shmobile/setup-r7s72100.c
@@ -21,77 +21,26 @@
 #include <linux/irq.h>
 #include <linux/kernel.h>
 #include <linux/of_platform.h>
-#include <linux/serial_sci.h>
 #include <linux/sh_timer.h>
 #include <mach/common.h>
 #include <mach/irqs.h>
 #include <mach/r7s72100.h>
 #include <asm/mach/arch.h>
-#define R7S72100_SCIF(index, baseaddr, irq)                             \
+static struct resource mtu2_resources[] __initdata = {
-static const struct plat_sci_port scif##index##_platform_data = {       \
+        DEFINE_RES_MEM(0xfcff0000, 0x400),
-        .type           = PORT_SCIF,                                    \
+        DEFINE_RES_IRQ_NAMED(gic_iid(139), "tgi0a"),
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,               \
-        .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,              \
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \
-                          SCSCR_REIE,                                   \
-};                                                                      \
-                                                                        \
-static struct resource scif##index##_resources[] = {                    \
-        DEFINE_RES_MEM(baseaddr, 0x100),                                \
-        DEFINE_RES_IRQ(irq + 1),                                        \
-        DEFINE_RES_IRQ(irq + 2),                                        \
-        DEFINE_RES_IRQ(irq + 3),                                        \
-        DEFINE_RES_IRQ(irq),                                            \
-}                                                                       \
-R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
-R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
-R7S72100_SCIF(2, 0xe8008000, gic_iid(229));
-R7S72100_SCIF(3, 0xe8008800, gic_iid(233));
-R7S72100_SCIF(4, 0xe8009000, gic_iid(237));
-R7S72100_SCIF(5, 0xe8009800, gic_iid(241));
-R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
-R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
-#define r7s72100_register_scif(index)                                          \
-        platform_device_register_resndata(&platform_bus, "sh-sci", index,      \
-                                          scif##index##_resources,             \
-                                          ARRAY_SIZE(scif##index##_resources), \
-                                          &scif##index##_platform_data,        \
-                                          sizeof(scif##index##_platform_data))
-static struct sh_timer_config mtu2_0_platform_data __initdata = {
-        .name = "MTU2_0",
-        .timer_bit = 0,
-        .channel_offset = -0x80,
-        .clockevent_rating = 200,
-};
-static struct resource mtu2_0_resources[] __initdata = {
-        DEFINE_RES_MEM(0xfcff0300, 0x27),
-        DEFINE_RES_IRQ(gic_iid(139)), /* MTU2 TGI0A */
 };
-#define r7s72100_register_mtu2(idx)                                     \
+#define r7s72100_register_mtu2()                                        \
-        platform_device_register_resndata(&platform_bus, "sh_mtu2",     \
+        platform_device_register_resndata(&platform_bus, "sh-mtu2",     \
-                                          idx, mtu2_##idx##_resources,  \
+                                          -1, mtu2_resources,           \
-                                          ARRAY_SIZE(mtu2_##idx##_resources), \
+                                          ARRAY_SIZE(mtu2_resources),   \
-                                          &mtu2_##idx##_platform_data,  \
+                                          NULL, 0)
-                                          sizeof(struct sh_timer_config))
 void __init r7s72100_add_dt_devices(void)
 {
-        r7s72100_register_scif(0);
+        r7s72100_register_mtu2();
-        r7s72100_register_scif(1);
-        r7s72100_register_scif(2);
-        r7s72100_register_scif(3);
-        r7s72100_register_scif(4);
-        r7s72100_register_scif(5);
-        r7s72100_register_scif(6);
-        r7s72100_register_scif(7);
-        r7s72100_register_mtu2(0);
 }
 void __init r7s72100_init_early(void)
diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
index cd36f8078325..9333770cfac2 100644
--- a/arch/arm/mach-shmobile/setup-r8a73a4.c
+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
@@ -169,20 +169,17 @@ static const struct resource thermal0_resources[] = {
                                        thermal0_resources,             \
                                        ARRAY_SIZE(thermal0_resources))
-static struct sh_timer_config cmt10_platform_data = {
+static struct sh_timer_config cmt1_platform_data = {
-        .name = "CMT10",
+        .channels_mask = 0xff,
-        .timer_bit = 0,
-        .clockevent_rating = 80,
 };
-static struct resource cmt10_resources[] = {
+static struct resource cmt1_resources[] = {
-        DEFINE_RES_MEM(0xe6130010, 0x0c),
+        DEFINE_RES_MEM(0xe6130000, 0x1004),
-        DEFINE_RES_MEM(0xe6130000, 0x04),
+        DEFINE_RES_IRQ(gic_spi(120)),
-        DEFINE_RES_IRQ(gic_spi(120)), /* CMT1_0 */
 };
 #define r8a7790_register_cmt(idx)                                       \
-        platform_device_register_resndata(&platform_bus, "sh_cmt",      \
+        platform_device_register_resndata(&platform_bus, "sh-cmt-48-gen2", \
                                          idx, cmt##idx##_resources,    \
                                          ARRAY_SIZE(cmt##idx##_resources), \
                                          &cmt##idx##_platform_data,    \
@@ -196,7 +193,7 @@ void __init r8a73a4_add_dt_devices(void)
        r8a73a4_register_scif(3);
        r8a73a4_register_scif(4);
        r8a73a4_register_scif(5);
-        r8a7790_register_cmt(10);
+        r8a7790_register_cmt(1);
 }
 /* DMA */
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 8f3c68101d59..35dec233301e 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -237,126 +237,45 @@ R8A7740_SCIF(PORT_SCIFA, 7, 0xe6cd0000, gic_spi(107));
 R8A7740_SCIF(PORT_SCIFB, 8, 0xe6c30000, gic_spi(108));
 /* CMT */
-static struct sh_timer_config cmt10_platform_data = {
+static struct sh_timer_config cmt1_platform_data = {
-        .name = "CMT10",
+        .channels_mask = 0x3f,
-        .channel_offset = 0x10,
-        .timer_bit = 0,
-        .clockevent_rating = 125,
-        .clocksource_rating = 125,
 };
-static struct resource cmt10_resources[] = {
+static struct resource cmt1_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xe6138000, 0x170),
-                .name   = "CMT10",
+        DEFINE_RES_IRQ(gic_spi(58)),
-                .start  = 0xe6138010,
-                .end    = 0xe613801b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = gic_spi(58),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
-static struct platform_device cmt10_device = {
+static struct platform_device cmt1_device = {
-        .name           = "sh_cmt",
+        .name           = "sh-cmt-48",
-        .id             = 10,
+        .id             = 1,
        .dev = {
-                .platform_data  = &cmt10_platform_data,
+                .platform_data  = &cmt1_platform_data,
        },
-        .resource       = cmt10_resources,
+        .resource       = cmt1_resources,
-        .num_resources  = ARRAY_SIZE(cmt10_resources),
+        .num_resources  = ARRAY_SIZE(cmt1_resources),
 };
 /* TMU */
-static struct sh_timer_config tmu00_platform_data = {
+static struct sh_timer_config tmu0_platform_data = {
-        .name = "TMU00",
+        .channels_mask = 7,
-        .channel_offset = 0x4,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
-static struct resource tmu00_resources[] = {
+static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xfff80000, 0x2c),
-                .name   = "TMU00",
+        DEFINE_RES_IRQ(gic_spi(198)),
-                .start  = 0xfff80008,
+        DEFINE_RES_IRQ(gic_spi(199)),
-                .end    = 0xfff80014 - 1,
+        DEFINE_RES_IRQ(gic_spi(200)),
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = gic_spi(198),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
-static struct platform_device tmu00_device = {
+static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
-                .platform_data  = &tmu00_platform_data,
+                .platform_data  = &tmu0_platform_data,
-        },
-        .resource       = tmu00_resources,
-        .num_resources  = ARRAY_SIZE(tmu00_resources),
-};
-static struct sh_timer_config tmu01_platform_data = {
-        .name = "TMU01",
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
-};
-static struct resource tmu01_resources[] = {
-        [0] = {
-                .name   = "TMU01",
-                .start  = 0xfff80014,
-                .end    = 0xfff80020 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = gic_spi(199),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu01_device = {
-        .name           = "sh_tmu",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &tmu01_platform_data,
        },
-        .resource       = tmu01_resources,
+        .resource       = tmu0_resources,
-        .num_resources  = ARRAY_SIZE(tmu01_resources),
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
-};
-static struct sh_timer_config tmu02_platform_data = {
-        .name = "TMU02",
-        .channel_offset = 0x1C,
-        .timer_bit = 2,
-        .clocksource_rating = 200,
-};
-static struct resource tmu02_resources[] = {
-        [0] = {
-                .name   = "TMU02",
-                .start  = 0xfff80020,
-                .end    = 0xfff8002C - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = gic_spi(200),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu02_device = {
-        .name           = "sh_tmu",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &tmu02_platform_data,
-        },
-        .resource       = tmu02_resources,
-        .num_resources  = ARRAY_SIZE(tmu02_resources),
 };
 /* IPMMUI (an IPMMU module for ICB/LMB) */
@@ -400,7 +319,7 @@ static struct platform_device *r8a7740_devices_dt[] __initdata = {
        &scif6_device,
        &scif7_device,
        &scif8_device,
-        &cmt10_device,
+        &cmt1_device,
 };
 static struct platform_device *r8a7740_early_devices[] __initdata = {
@@ -408,9 +327,7 @@ static struct platform_device *r8a7740_early_devices[] __initdata = {
        &irqpin1_device,
        &irqpin2_device,
        &irqpin3_device,
-        &tmu00_device,
+        &tmu0_device,
-        &tmu01_device,
-        &tmu02_device,
        &ipmmu_device,
 };
@@ -765,7 +682,7 @@ static struct platform_device *r8a7740_late_devices[] __initdata = {
 *      "Media RAM (MERAM)" on r8a7740 documentation
 */
 #define MEBUFCNTR       0xFE950098
-void r8a7740_meram_workaround(void)
+void __init r8a7740_meram_workaround(void)
 {
        void __iomem *reg;
@@ -869,17 +786,6 @@ void __init r8a7740_add_early_devices(void)
 #ifdef CONFIG_USE_OF
-void __init r8a7740_add_early_devices_dt(void)
-{
-        shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
-        early_platform_add_devices(r8a7740_early_devices,
-                                   ARRAY_SIZE(r8a7740_early_devices));
-        /* setup early console here as well */
-        shmobile_setup_console();
-}
 void __init r8a7740_add_standard_devices_dt(void)
 {
        platform_add_devices(r8a7740_devices_dt,
@@ -887,11 +793,6 @@ void __init r8a7740_add_standard_devices_dt(void)
        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 }
-void __init r8a7740_init_delay(void)
-{
-        shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
-};
 void __init r8a7740_init_irq_of(void)
 {
        void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);
@@ -935,9 +836,10 @@ static const char *r8a7740_boards_compat_dt[] __initdata = {
 DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)")
        .map_io         = r8a7740_map_io,
-        .init_early     = r8a7740_init_delay,
+        .init_early     = shmobile_init_delay,
        .init_irq       = r8a7740_init_irq_of,
        .init_machine   = r8a7740_generic_init,
+        .init_late      = shmobile_init_late,
        .dt_compat      = r8a7740_boards_compat_dt,
 MACHINE_END
diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
index 6d694526e4ca..8c02e24f2483 100644
--- a/arch/arm/mach-shmobile/setup-r8a7778.c
+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
@@ -71,33 +71,20 @@ R8A7778_SCIF(5, 0xffe45000, gic_iid(0x6b));
                                          sizeof(scif##index##_platform_data))
 /* TMU */
-static struct resource sh_tmu0_resources[] __initdata = {
+static struct sh_timer_config sh_tmu0_platform_data = {
-        DEFINE_RES_MEM(0xffd80008, 12),
+        .channels_mask = 7,
-        DEFINE_RES_IRQ(gic_iid(0x40)),
-};
-static struct sh_timer_config sh_tmu0_platform_data __initdata = {
-        .name                   = "TMU00",
-        .channel_offset         = 0x4,
-        .timer_bit              = 0,
-        .clockevent_rating      = 200,
 };
-static struct resource sh_tmu1_resources[] __initdata = {
+static struct resource sh_tmu0_resources[] = {
-        DEFINE_RES_MEM(0xffd80014, 12),
+        DEFINE_RES_MEM(0xffd80000, 0x30),
+        DEFINE_RES_IRQ(gic_iid(0x40)),
        DEFINE_RES_IRQ(gic_iid(0x41)),
-};
+        DEFINE_RES_IRQ(gic_iid(0x42)),
-static struct sh_timer_config sh_tmu1_platform_data __initdata = {
-        .name                   = "TMU01",
-        .channel_offset         = 0x10,
-        .timer_bit              = 1,
-        .clocksource_rating     = 200,
 };
 #define r8a7778_register_tmu(idx)                       \
        platform_device_register_resndata(              \
-                &platform_bus, "sh_tmu", idx,           \
+                &platform_bus, "sh-tmu", idx,           \
                sh_tmu##idx##_resources,                \
                ARRAY_SIZE(sh_tmu##idx##_resources),    \
                &sh_tmu##idx##_platform_data,           \
@@ -312,7 +299,6 @@ void __init r8a7778_add_dt_devices(void)
        r8a7778_register_scif(4);
        r8a7778_register_scif(5);
        r8a7778_register_tmu(0);
-        r8a7778_register_tmu(1);
 }
 /* HPB-DMA */
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index 8e860b36997a..d197b5adc886 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -219,64 +219,25 @@ R8A7779_SCIF(4, 0xffe44000, gic_iid(0x7c));
 R8A7779_SCIF(5, 0xffe45000, gic_iid(0x7d));
 /* TMU */
-static struct sh_timer_config tmu00_platform_data = {
+static struct sh_timer_config tmu0_platform_data = {
-        .name = "TMU00",
+        .channels_mask = 7,
-        .channel_offset = 0x4,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
-static struct resource tmu00_resources[] = {
+static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd80000, 0x30),
-                .name   = "TMU00",
+        DEFINE_RES_IRQ(gic_iid(0x40)),
-                .start  = 0xffd80008,
+        DEFINE_RES_IRQ(gic_iid(0x41)),
-                .end    = 0xffd80013,
+        DEFINE_RES_IRQ(gic_iid(0x42)),
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = gic_iid(0x40),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
-static struct platform_device tmu00_device = {
+static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
-                .platform_data  = &tmu00_platform_data,
+                .platform_data  = &tmu0_platform_data,
-        },
-        .resource       = tmu00_resources,
-        .num_resources  = ARRAY_SIZE(tmu00_resources),
-};
-static struct sh_timer_config tmu01_platform_data = {
-        .name = "TMU01",
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
-};
-static struct resource tmu01_resources[] = {
-        [0] = {
-                .name   = "TMU01",
-                .start  = 0xffd80014,
-                .end    = 0xffd8001f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = gic_iid(0x41),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu01_device = {
-        .name           = "sh_tmu",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &tmu01_platform_data,
        },
-        .resource       = tmu01_resources,
+        .resource       = tmu0_resources,
-        .num_resources  = ARRAY_SIZE(tmu01_resources),
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
 };
 /* I2C */
@@ -685,8 +646,7 @@ static struct platform_device *r8a7779_devices_dt[] __initdata = {
        &scif3_device,
        &scif4_device,
        &scif5_device,
-        &tmu00_device,
+        &tmu0_device,
-        &tmu01_device,
 };
 static struct platform_device *r8a7779_standard_devices[] __initdata = {
diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
index c4616f0698c6..6bd08b127fa4 100644
--- a/arch/arm/mach-shmobile/setup-r8a7790.c
+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
@@ -185,12 +185,6 @@ void __init r8a7790_pinmux_init(void)
        r8a7790_register_gpio(3);
        r8a7790_register_gpio(4);
        r8a7790_register_gpio(5);
-        r8a7790_register_i2c(0);
-        r8a7790_register_i2c(1);
-        r8a7790_register_i2c(2);
-        r8a7790_register_i2c(3);
-        r8a7790_register_audio_dmac(0);
-        r8a7790_register_audio_dmac(1);
 }
 #define __R8A7790_SCIF(scif_type, _scscr, index, baseaddr, irq)         \
@@ -269,20 +263,17 @@ static const struct resource thermal_resources[] __initconst = {
                                        thermal_resources,              \
                                        ARRAY_SIZE(thermal_resources))
-static const struct sh_timer_config cmt00_platform_data __initconst = {
+static struct sh_timer_config cmt0_platform_data = {
-        .name = "CMT00",
+        .channels_mask = 0x60,
-        .timer_bit = 0,
-        .clockevent_rating = 80,
 };
-static const struct resource cmt00_resources[] __initconst = {
+static struct resource cmt0_resources[] = {
-        DEFINE_RES_MEM(0xffca0510, 0x0c),
+        DEFINE_RES_MEM(0xffca0000, 0x1004),
-        DEFINE_RES_MEM(0xffca0500, 0x04),
+        DEFINE_RES_IRQ(gic_spi(142)),
-        DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
 };
 #define r8a7790_register_cmt(idx)                                       \
-        platform_device_register_resndata(&platform_bus, "sh_cmt",      \
+        platform_device_register_resndata(&platform_bus, "sh-cmt-48-gen2", \
                                          idx, cmt##idx##_resources,    \
                                          ARRAY_SIZE(cmt##idx##_resources), \
                                          &cmt##idx##_platform_data,    \
@@ -290,6 +281,11 @@ static const struct resource cmt00_resources[] __initconst = {
 void __init r8a7790_add_dt_devices(void)
 {
+        r8a7790_register_cmt(0);
+}
+void __init r8a7790_add_standard_devices(void)
+{
        r8a7790_register_scif(0);
        r8a7790_register_scif(1);
        r8a7790_register_scif(2);
@@ -300,14 +296,15 @@ void __init r8a7790_add_dt_devices(void)
        r8a7790_register_scif(7);
        r8a7790_register_scif(8);
        r8a7790_register_scif(9);
-        r8a7790_register_cmt(00);
-}
-void __init r8a7790_add_standard_devices(void)
-{
        r8a7790_add_dt_devices();
        r8a7790_register_irqc(0);
        r8a7790_register_thermal();
+        r8a7790_register_i2c(0);
+        r8a7790_register_i2c(1);
+        r8a7790_register_i2c(2);
+        r8a7790_register_i2c(3);
+        r8a7790_register_audio_dmac(0);
+        r8a7790_register_audio_dmac(1);
 }
 void __init r8a7790_init_early(void)
diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
index e28404e43860..04a96ddb3224 100644
--- a/arch/arm/mach-shmobile/setup-r8a7791.c
+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
@@ -128,20 +128,17 @@ R8A7791_SCIFA(14, 0xe6c80000, gic_spi(31)); /* SCIFA5 */
                                          &scif##index##_platform_data,        \
                                          sizeof(scif##index##_platform_data))
-static const struct sh_timer_config cmt00_platform_data __initconst = {
+static struct sh_timer_config cmt0_platform_data = {
-        .name = "CMT00",
+        .channels_mask = 0x60,
-        .timer_bit = 0,
-        .clockevent_rating = 80,
 };
-static const struct resource cmt00_resources[] __initconst = {
+static struct resource cmt0_resources[] = {
-        DEFINE_RES_MEM(0xffca0510, 0x0c),
+        DEFINE_RES_MEM(0xffca0000, 0x1004),
-        DEFINE_RES_MEM(0xffca0500, 0x04),
+        DEFINE_RES_IRQ(gic_spi(142)),
-        DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
 };
 #define r8a7791_register_cmt(idx)                                       \
-        platform_device_register_resndata(&platform_bus, "sh_cmt",      \
+        platform_device_register_resndata(&platform_bus, "sh-cmt-48-gen2", \
                                          idx, cmt##idx##_resources,    \
                                          ARRAY_SIZE(cmt##idx##_resources), \
                                          &cmt##idx##_platform_data,    \
@@ -185,6 +182,11 @@ static const struct resource thermal_resources[] __initconst = {
 void __init r8a7791_add_dt_devices(void)
 {
+        r8a7791_register_cmt(0);
+}
+void __init r8a7791_add_standard_devices(void)
+{
        r8a7791_register_scif(0);
        r8a7791_register_scif(1);
        r8a7791_register_scif(2);
@@ -200,23 +202,11 @@ void __init r8a7791_add_dt_devices(void)
        r8a7791_register_scif(12);
        r8a7791_register_scif(13);
        r8a7791_register_scif(14);
-        r8a7791_register_cmt(00);
-}
-void __init r8a7791_add_standard_devices(void)
-{
        r8a7791_add_dt_devices();
        r8a7791_register_irqc(0);
        r8a7791_register_thermal();
 }
-void __init r8a7791_init_early(void)
-{
-#ifndef CONFIG_ARM_ARCH_TIMER
-        shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */
-#endif
-}
 #ifdef CONFIG_USE_OF
 static const char *r8a7791_boards_compat_dt[] __initdata = {
        "renesas,r8a7791",
@@ -225,7 +215,7 @@ static const char *r8a7791_boards_compat_dt[] __initdata = {
 DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)")
        .smp            = smp_ops(r8a7791_smp_ops),
-        .init_early     = r8a7791_init_early,
+        .init_early     = shmobile_init_delay,
        .init_time      = rcar_gen2_timer_init,
        .dt_compat      = r8a7791_boards_compat_dt,
 MACHINE_END
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
index 10604480f325..542c5a47173f 100644
--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -30,12 +30,16 @@
 u32 rcar_gen2_read_mode_pins(void)
 {
-        void __iomem *modemr = ioremap_nocache(MODEMR, 4);
+        static u32 mode;
-        u32 mode;
+        static bool mode_valid;
-        BUG_ON(!modemr);
+        if (!mode_valid) {
-        mode = ioread32(modemr);
+                void __iomem *modemr = ioremap_nocache(MODEMR, 4);
-        iounmap(modemr);
+                BUG_ON(!modemr);
+                mode = ioread32(modemr);
+                iounmap(modemr);
+                mode_valid = true;
+        }
        return mode;
 }
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 27301278c208..2a8b9f2a2f54 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -119,28 +119,16 @@ SH7372_SCIF(PORT_SCIFB, 6, 0xe6c30000, evt2irq(0x0d60));
 /* CMT */
 static struct sh_timer_config cmt2_platform_data = {
-        .name = "CMT2",
+        .channels_mask = 0x20,
-        .channel_offset = 0x40,
-        .timer_bit = 5,
-        .clockevent_rating = 125,
-        .clocksource_rating = 125,
 };
 static struct resource cmt2_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xe6130000, 0x50),
-                .name   = "CMT2",
+        DEFINE_RES_IRQ(evt2irq(0x0b80)),
-                .start  = 0xe6130040,
-                .end    = 0xe613004b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x0b80), /* CMT2 */
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device cmt2_device = {
-        .name           = "sh_cmt",
+        .name           = "sh-cmt-32-fast",
        .id             = 2,
        .dev = {
                .platform_data  = &cmt2_platform_data,
@@ -150,64 +138,25 @@ static struct platform_device cmt2_device = {
 };
 /* TMU */
-static struct sh_timer_config tmu00_platform_data = {
+static struct sh_timer_config tmu0_platform_data = {
-        .name = "TMU00",
+        .channels_mask = 7,
-        .channel_offset = 0x4,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
-static struct resource tmu00_resources[] = {
+static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xfff60000, 0x2c),
-                .name   = "TMU00",
+        DEFINE_RES_IRQ(intcs_evt2irq(0xe80)),
-                .start  = 0xfff60008,
+        DEFINE_RES_IRQ(intcs_evt2irq(0xea0)),
-                .end    = 0xfff60013,
+        DEFINE_RES_IRQ(intcs_evt2irq(0xec0)),
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = intcs_evt2irq(0xe80), /* TMU_TUNI0 */
-                .flags  = IORESOURCE_IRQ,
-        },
 };
-static struct platform_device tmu00_device = {
+static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
-                .platform_data  = &tmu00_platform_data,
+                .platform_data  = &tmu0_platform_data,
-        },
-        .resource       = tmu00_resources,
-        .num_resources  = ARRAY_SIZE(tmu00_resources),
-};
-static struct sh_timer_config tmu01_platform_data = {
-        .name = "TMU01",
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
-};
-static struct resource tmu01_resources[] = {
-        [0] = {
-                .name   = "TMU01",
-                .start  = 0xfff60014,
-                .end    = 0xfff6001f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = intcs_evt2irq(0xea0), /* TMU_TUNI1 */
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu01_device = {
-        .name           = "sh_tmu",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &tmu01_platform_data,
        },
-        .resource       = tmu01_resources,
+        .resource       = tmu0_resources,
-        .num_resources  = ARRAY_SIZE(tmu01_resources),
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
 };
 /* I2C */
@@ -952,8 +901,7 @@ static struct platform_device *sh7372_early_devices[] __initdata = {
        &scif5_device,
        &scif6_device,
        &cmt2_device,
-        &tmu00_device,
+        &tmu0_device,
-        &tmu01_device,
        &ipmmu_device,
 };
@@ -1000,8 +948,7 @@ void __init sh7372_add_standard_devices(void)
                { "A4R", &veu2_device, },
                { "A4R", &veu3_device, },
                { "A4R", &jpu_device, },
-                { "A4R", &tmu00_device, },
+                { "A4R", &tmu0_device, },
-                { "A4R", &tmu01_device, },
        };
        sh7372_init_pm_domains();
@@ -1037,11 +984,7 @@ void __init sh7372_add_early_devices_dt(void)
 {
        shmobile_setup_delay(800, 1, 3); /* Cortex-A8 @ 800MHz */
-        early_platform_add_devices(sh7372_early_devices,
+        sh7372_add_early_devices();
-                                   ARRAY_SIZE(sh7372_early_devices));
-        /* setup early console here as well */
-        shmobile_setup_console();
 }
 void __init sh7372_add_standard_devices_dt(void)
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index f74ab530c71d..ad00724a2269 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -104,86 +104,45 @@ SH73A0_SCIF(PORT_SCIFA, 6, 0xe6cc0000, gic_spi(156));
 SH73A0_SCIF(PORT_SCIFA, 7, 0xe6cd0000, gic_spi(143));
 SH73A0_SCIF(PORT_SCIFB, 8, 0xe6c30000, gic_spi(80));
-static struct sh_timer_config cmt10_platform_data = {
+static struct sh_timer_config cmt1_platform_data = {
-        .name = "CMT10",
+        .channels_mask = 0x3f,
-        .channel_offset = 0x10,
-        .timer_bit = 0,
-        .clockevent_rating = 80,
-        .clocksource_rating = 125,
 };
-static struct resource cmt10_resources[] = {
+static struct resource cmt1_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xe6138000, 0x200),
-                .name   = "CMT10",
+        DEFINE_RES_IRQ(gic_spi(65)),
-                .start  = 0xe6138010,
-                .end    = 0xe613801b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = gic_spi(65),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
-static struct platform_device cmt10_device = {
+static struct platform_device cmt1_device = {
-        .name           = "sh_cmt",
+        .name           = "sh-cmt-48",
-        .id             = 10,
+        .id             = 1,
        .dev = {
-                .platform_data  = &cmt10_platform_data,
+                .platform_data  = &cmt1_platform_data,
        },
-        .resource       = cmt10_resources,
+        .resource       = cmt1_resources,
-        .num_resources  = ARRAY_SIZE(cmt10_resources),
+        .num_resources  = ARRAY_SIZE(cmt1_resources),
 };
 /* TMU */
-static struct sh_timer_config tmu00_platform_data = {
+static struct sh_timer_config tmu0_platform_data = {
-        .name = "TMU00",
+        .channels_mask = 7,
-        .channel_offset = 0x4,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
-static struct resource tmu00_resources[] = {
+static struct resource tmu0_resources[] = {
-        [0] = DEFINE_RES_MEM(0xfff60008, 0xc),
+        DEFINE_RES_MEM(0xfff60000, 0x2c),
-        [1] = {
+        DEFINE_RES_IRQ(intcs_evt2irq(0xe80)),
-                .start  = intcs_evt2irq(0x0e80), /* TMU0_TUNI00 */
+        DEFINE_RES_IRQ(intcs_evt2irq(0xea0)),
-                .flags  = IORESOURCE_IRQ,
+        DEFINE_RES_IRQ(intcs_evt2irq(0xec0)),
-        },
 };
-static struct platform_device tmu00_device = {
+static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
-                .platform_data  = &tmu00_platform_data,
+                .platform_data  = &tmu0_platform_data,
-        },
-        .resource       = tmu00_resources,
-        .num_resources  = ARRAY_SIZE(tmu00_resources),
-};
-static struct sh_timer_config tmu01_platform_data = {
-        .name = "TMU01",
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
-};
-static struct resource tmu01_resources[] = {
-        [0] = DEFINE_RES_MEM(0xfff60014, 0xc),
-        [1] = {
-                .start  = intcs_evt2irq(0x0ea0), /* TMU0_TUNI01 */
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu01_device = {
-        .name           = "sh_tmu",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &tmu01_platform_data,
        },
-        .resource       = tmu01_resources,
+        .resource       = tmu0_resources,
-        .num_resources  = ARRAY_SIZE(tmu01_resources),
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
 };
 static struct resource i2c0_resources[] = {
@@ -746,12 +705,11 @@ static struct platform_device *sh73a0_devices_dt[] __initdata = {
        &scif6_device,
        &scif7_device,
        &scif8_device,
-        &cmt10_device,
+        &cmt1_device,
 };
 static struct platform_device *sh73a0_early_devices[] __initdata = {
-        &tmu00_device,
+        &tmu0_device,
-        &tmu01_device,
        &ipmmu_device,
 };
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
index f2ca92308f75..2dfd748da7f3 100644
--- a/arch/arm/mach-shmobile/smp-emev2.c
+++ b/arch/arm/mach-shmobile/smp-emev2.c
@@ -24,7 +24,6 @@
 #include <linux/io.h>
 #include <linux/delay.h>
 #include <mach/common.h>
-#include <mach/emev2.h>
 #include <asm/smp_plat.h>
 #include <asm/smp_scu.h>
diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c
index 2df5bd190fe4..ec979529f30f 100644
--- a/arch/arm/mach-shmobile/smp-r8a7791.c
+++ b/arch/arm/mach-shmobile/smp-r8a7791.c
@@ -20,6 +20,7 @@
 #include <asm/smp_plat.h>
 #include <mach/common.h>
 #include <mach/r8a7791.h>
+#include <mach/rcar-gen2.h>
 #define RST             0xe6160000
 #define CA15BAR         0x0020
@@ -51,9 +52,21 @@ static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus)
        iounmap(p);
 }
+static int r8a7791_smp_boot_secondary(unsigned int cpu,
+                                      struct task_struct *idle)
+{
+        /* Error out when hardware debug mode is enabled */
+        if (rcar_gen2_read_mode_pins() & BIT(21)) {
+                pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
+                return -ENOTSUPP;
+        }
+        return shmobile_smp_apmu_boot_secondary(cpu, idle);
+}
 struct smp_operations r8a7791_smp_ops __initdata = {
        .smp_prepare_cpus       = r8a7791_smp_prepare_cpus,
-        .smp_boot_secondary     = shmobile_smp_apmu_boot_secondary,
+        .smp_boot_secondary     = r8a7791_smp_boot_secondary,
 #ifdef CONFIG_HOTPLUG_CPU
        .cpu_disable            = shmobile_smp_cpu_disable,
        .cpu_die                = shmobile_smp_apmu_cpu_die,
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
index 62d7052d6f21..68bc0b82226d 100644
--- a/arch/arm/mach-shmobile/timer.c
+++ b/arch/arm/mach-shmobile/timer.c
@@ -21,6 +21,24 @@
 #include <linux/platform_device.h>
 #include <linux/clocksource.h>
 #include <linux/delay.h>
+#include <linux/of_address.h>
+void __init shmobile_setup_delay_hz(unsigned int max_cpu_core_hz,
+                                    unsigned int mult, unsigned int div)
+{
+        /* calculate a worst-case loops-per-jiffy value
+         * based on maximum cpu core hz setting and the
+         * __delay() implementation in arch/arm/lib/delay.S
+         *
+         * this will result in a longer delay than expected
+         * when the cpu core runs on lower frequencies.
+         */
+        unsigned int value = HZ * div / mult;
+        if (!preset_lpj)
+                preset_lpj = max_cpu_core_hz / value;
+}
 void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz,
                                 unsigned int mult, unsigned int div)
@@ -39,6 +57,33 @@ void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz,
                preset_lpj = max_cpu_core_mhz * value;
 }
+void __init shmobile_init_delay(void)
+{
+        struct device_node *np, *parent;
+        u32 max_freq, freq;
+        max_freq = 0;
+        parent = of_find_node_by_path("/cpus");
+        if (parent) {
+                for_each_child_of_node(parent, np) {
+                        if (!of_property_read_u32(np, "clock-frequency", &freq))
+                                max_freq = max(max_freq, freq);
+                }
+                of_node_put(parent);
+        }
+        if (max_freq) {
+                if (of_find_compatible_node(NULL, NULL, "arm,cortex-a8"))
+                        shmobile_setup_delay_hz(max_freq, 1, 3);
+                else if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
+                        shmobile_setup_delay_hz(max_freq, 1, 3);
+                else if (of_find_compatible_node(NULL, NULL, "arm,cortex-a15"))
+                        if (!IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
+                                shmobile_setup_delay_hz(max_freq, 2, 4);
+        }
+}
 static void __init shmobile_late_time_init(void)
 {
        /*
diff --git a/arch/arm/mach-sti/board-dt.c b/arch/arm/mach-sti/board-dt.c
index 1217fb598cfd..df731f2322fa 100644
--- a/arch/arm/mach-sti/board-dt.c
+++ b/arch/arm/mach-sti/board-dt.c
@@ -36,6 +36,7 @@ static void __init stih41x_machine_init(void)
 static const char *stih41x_dt_match[] __initdata = {
        "st,stih415",
        "st,stih416",
+        "st,stih407",
        NULL
 };
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index b57d7d53b9d3..0fbd4f156bfa 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -1,14 +1,38 @@
-config ARCH_SUNXI
+menuconfig ARCH_SUNXI
-        bool "Allwinner A1X SOCs" if ARCH_MULTI_V7
+        bool "Allwinner SoCs" if ARCH_MULTI_V7
-        select ARCH_HAS_RESET_CONTROLLER
        select ARCH_REQUIRE_GPIOLIB
-        select ARM_GIC
-        select ARM_PSCI
        select CLKSRC_MMIO
        select GENERIC_IRQ_CHIP
-        select HAVE_ARM_ARCH_TIMER
        select PINCTRL
        select PINCTRL_SUNXI
-        select RESET_CONTROLLER
        select SUN4I_TIMER
+if ARCH_SUNXI
+config MACH_SUN4I
+        bool "Allwinner A10 (sun4i) SoCs support"
+        default ARCH_SUNXI
+config MACH_SUN5I
+        bool "Allwinner A10s / A13 (sun5i) SoCs support"
+        default ARCH_SUNXI
+        select SUN5I_HSTIMER
+config MACH_SUN6I
+        bool "Allwinner A31 (sun6i) SoCs support"
+        default ARCH_SUNXI
+        select ARCH_HAS_RESET_CONTROLLER
+        select ARM_GIC
+        select MFD_SUN6I_PRCM
+        select RESET_CONTROLLER
+        select SUN5I_HSTIMER
+config MACH_SUN7I
+        bool "Allwinner A20 (sun7i) SoCs support"
+        default ARCH_SUNXI
+        select ARM_GIC
+        select ARM_PSCI
+        select HAVE_ARM_ARCH_TIMER
        select SUN5I_HSTIMER
+endif
diff --git a/arch/arm/mach-sunxi/common.h b/arch/arm/mach-sunxi/common.h
deleted file mode 100644
index 9e5ac4756cbb..000000000000
--- a/arch/arm/mach-sunxi/common.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * Core functions for Allwinner SoCs
- *
- * Copyright (C) 2013 Maxime Ripard
- *
- * Maxime Ripard <maxime.ripard@free-electrons.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#ifndef __ARCH_SUNXI_COMMON_H_
-#define __ARCH_SUNXI_COMMON_H_
-void sun6i_secondary_startup(void);
-extern struct smp_operations sun6i_smp_ops;
-#endif /* __ARCH_SUNXI_COMMON_H_ */
diff --git a/arch/arm/mach-sunxi/platsmp.c b/arch/arm/mach-sunxi/platsmp.c
index 0c7dbce033cc..c53077bb8c3f 100644
--- a/arch/arm/mach-sunxi/platsmp.c
+++ b/arch/arm/mach-sunxi/platsmp.c
@@ -21,8 +21,6 @@
 #include <linux/of_address.h>
 #include <linux/smp.h>
-#include "common.h"
 #define CPUCFG_CPU_PWR_CLAMP_STATUS_REG(cpu)    ((cpu) * 0x40 + 0x64)
 #define CPUCFG_CPU_RST_CTRL_REG(cpu)            (((cpu) + 1) * 0x40)
 #define CPUCFG_CPU_CTRL_REG(cpu)                (((cpu) + 1) * 0x40 + 0x04)
@@ -122,3 +120,4 @@ struct smp_operations sun6i_smp_ops __initdata = {
        .smp_prepare_cpus       = sun6i_smp_prepare_cpus,
        .smp_boot_secondary     = sun6i_smp_boot_secondary,
 };
+CPU_METHOD_OF_DECLARE(sun6i_smp, "allwinner,sun6i-a31", &sun6i_smp_ops);
diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c
index 460b5a4962ef..3f9587bb51f6 100644
--- a/arch/arm/mach-sunxi/sunxi.c
+++ b/arch/arm/mach-sunxi/sunxi.c
@@ -12,111 +12,8 @@
 #include <linux/clk-provider.h>
 #include <linux/clocksource.h>
-#include <linux/delay.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
-#include <linux/of_platform.h>
-#include <linux/io.h>
-#include <linux/reboot.h>
 #include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/system_misc.h>
-#include "common.h"
-#define SUN4I_WATCHDOG_CTRL_REG         0x00
-#define SUN4I_WATCHDOG_CTRL_RESTART             BIT(0)
-#define SUN4I_WATCHDOG_MODE_REG         0x04
-#define SUN4I_WATCHDOG_MODE_ENABLE              BIT(0)
-#define SUN4I_WATCHDOG_MODE_RESET_ENABLE        BIT(1)
-#define SUN6I_WATCHDOG1_IRQ_REG         0x00
-#define SUN6I_WATCHDOG1_CTRL_REG        0x10
-#define SUN6I_WATCHDOG1_CTRL_RESTART            BIT(0)
-#define SUN6I_WATCHDOG1_CONFIG_REG      0x14
-#define SUN6I_WATCHDOG1_CONFIG_RESTART          BIT(0)
-#define SUN6I_WATCHDOG1_CONFIG_IRQ              BIT(1)
-#define SUN6I_WATCHDOG1_MODE_REG        0x18
-#define SUN6I_WATCHDOG1_MODE_ENABLE             BIT(0)
-static void __iomem *wdt_base;
-static void sun4i_restart(enum reboot_mode mode, const char *cmd)
-{
-        if (!wdt_base)
-                return;
-        /* Enable timer and set reset bit in the watchdog */
-        writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
-               wdt_base + SUN4I_WATCHDOG_MODE_REG);
-        /*
-         * Restart the watchdog. The default (and lowest) interval
-         * value for the watchdog is 0.5s.
-         */
-        writel(SUN4I_WATCHDOG_CTRL_RESTART, wdt_base + SUN4I_WATCHDOG_CTRL_REG);
-        while (1) {
-                mdelay(5);
-                writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
-                       wdt_base + SUN4I_WATCHDOG_MODE_REG);
-        }
-}
-static void sun6i_restart(enum reboot_mode mode, const char *cmd)
-{
-        if (!wdt_base)
-                return;
-        /* Disable interrupts */
-        writel(0, wdt_base + SUN6I_WATCHDOG1_IRQ_REG);
-        /* We want to disable the IRQ and just reset the whole system */
-        writel(SUN6I_WATCHDOG1_CONFIG_RESTART,
-                wdt_base + SUN6I_WATCHDOG1_CONFIG_REG);
-        /* Enable timer. The default and lowest interval value is 0.5s */
-        writel(SUN6I_WATCHDOG1_MODE_ENABLE,
-                wdt_base + SUN6I_WATCHDOG1_MODE_REG);
-        /* Restart the watchdog. */
-        writel(SUN6I_WATCHDOG1_CTRL_RESTART,
-                wdt_base + SUN6I_WATCHDOG1_CTRL_REG);
-        while (1) {
-                mdelay(5);
-                writel(SUN6I_WATCHDOG1_MODE_ENABLE,
-                        wdt_base + SUN6I_WATCHDOG1_MODE_REG);
-        }
-}
-static struct of_device_id sunxi_restart_ids[] = {
-        { .compatible = "allwinner,sun4i-a10-wdt" },
-        { .compatible = "allwinner,sun6i-a31-wdt" },
-        { /*sentinel*/ }
-};
-static void sunxi_setup_restart(void)
-{
-        struct device_node *np;
-        np = of_find_matching_node(NULL, sunxi_restart_ids);
-        if (WARN(!np, "unable to setup watchdog restart"))
-                return;
-        wdt_base = of_iomap(np, 0);
-        WARN(!wdt_base, "failed to map watchdog base address");
-}
-static void __init sunxi_dt_init(void)
-{
-        sunxi_setup_restart();
-        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-}
 static const char * const sunxi_board_dt_compat[] = {
        "allwinner,sun4i-a10",
@@ -126,9 +23,7 @@ static const char * const sunxi_board_dt_compat[] = {
 };
 DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
-        .init_machine   = sunxi_dt_init,
        .dt_compat      = sunxi_board_dt_compat,
-        .restart        = sun4i_restart,
 MACHINE_END
 static const char * const sun6i_board_dt_compat[] = {
@@ -140,16 +35,14 @@ extern void __init sun6i_reset_init(void);
 static void __init sun6i_timer_init(void)
 {
        of_clk_init(NULL);
-        sun6i_reset_init();
+        if (IS_ENABLED(CONFIG_RESET_CONTROLLER))
+                sun6i_reset_init();
        clocksource_of_init();
 }
 DT_MACHINE_START(SUN6I_DT, "Allwinner sun6i (A31) Family")
-        .init_machine   = sunxi_dt_init,
        .init_time      = sun6i_timer_init,
        .dt_compat      = sun6i_board_dt_compat,
-        .restart        = sun6i_restart,
-        .smp            = smp_ops(sun6i_smp_ops),
 MACHINE_END
 static const char * const sun7i_board_dt_compat[] = {
@@ -158,7 +51,5 @@ static const char * const sun7i_board_dt_compat[] = {
 };
 DT_MACHINE_START(SUN7I_DT, "Allwinner sun7i (A20) Family")
-        .init_machine   = sunxi_dt_init,
        .dt_compat      = sun7i_board_dt_compat,
-        .restart        = sun4i_restart,
 MACHINE_END
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 55b305d51669..e16999e5b735 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -7,7 +7,6 @@ config ARCH_TEGRA
        select CLKSRC_MMIO
        select HAVE_ARM_SCU if SMP
        select HAVE_ARM_TWD if SMP
-        select MIGHT_HAVE_PCI
        select PINCTRL
        select ARCH_HAS_RESET_CONTROLLER
        select RESET_CONTROLLER
diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c
index fb7920201ab4..7c7123e7557b 100644
--- a/arch/arm/mach-tegra/pmc.c
+++ b/arch/arm/mach-tegra/pmc.c
@@ -41,6 +41,14 @@
 #define PMC_REMOVE_CLAMPING             0x34
 #define PMC_PWRGATE_STATUS              0x38
+#define PMC_SCRATCH0                    0x50
+#define PMC_SCRATCH0_MODE_RECOVERY      (1 << 31)
+#define PMC_SCRATCH0_MODE_BOOTLOADER    (1 << 30)
+#define PMC_SCRATCH0_MODE_RCM           (1 << 1)
+#define PMC_SCRATCH0_MODE_MASK          (PMC_SCRATCH0_MODE_RECOVERY | \
+                                         PMC_SCRATCH0_MODE_BOOTLOADER | \
+                                         PMC_SCRATCH0_MODE_RCM)
 #define PMC_CPUPWRGOOD_TIMER    0xc8
 #define PMC_CPUPWROFF_TIMER     0xcc
@@ -165,6 +173,22 @@ void tegra_pmc_restart(enum reboot_mode mode, const char *cmd)
 {
        u32 val;
+        val = tegra_pmc_readl(PMC_SCRATCH0);
+        val &= ~PMC_SCRATCH0_MODE_MASK;
+        if (cmd) {
+                if (strcmp(cmd, "recovery") == 0)
+                        val |= PMC_SCRATCH0_MODE_RECOVERY;
+                if (strcmp(cmd, "bootloader") == 0)
+                        val |= PMC_SCRATCH0_MODE_BOOTLOADER;
+                if (strcmp(cmd, "forced-recovery") == 0)
+                        val |= PMC_SCRATCH0_MODE_RCM;
+        }
+        tegra_pmc_writel(val, PMC_SCRATCH0);
        val = tegra_pmc_readl(0);
        val |= 0x10;
        tegra_pmc_writel(val, 0);
diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile
index de544aabf292..9741de956b3e 100644
--- a/arch/arm/mach-ux500/Makefile
+++ b/arch/arm/mach-ux500/Makefile
@@ -5,8 +5,7 @@
 obj-y                           := cpu.o id.o timer.o pm.o
 obj-$(CONFIG_CACHE_L2X0)        += cache-l2x0.o
 obj-$(CONFIG_UX500_SOC_DB8500)  += cpu-db8500.o
-obj-$(CONFIG_MACH_MOP500)       += board-mop500-sdi.o \
+obj-$(CONFIG_MACH_MOP500)       += board-mop500-regulators.o \
-                                board-mop500-regulators.o \
                                board-mop500-audio.o
 obj-$(CONFIG_SMP)               += platsmp.o headsmp.o
 obj-$(CONFIG_HOTPLUG_CPU)       += hotplug.o
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c
deleted file mode 100644
index fcbf3a13a539..000000000000
--- a/arch/arm/mach-ux500/board-mop500-sdi.c
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2010
- *
- * Author: Hanumath Prasad <hanumath.prasad@stericsson.com>
- * License terms: GNU General Public License (GPL) version 2
- */
-#include <linux/kernel.h>
-#include <linux/gpio.h>
-#include <linux/amba/bus.h>
-#include <linux/amba/mmci.h>
-#include <linux/mmc/host.h>
-#include <linux/platform_device.h>
-#include <linux/platform_data/dma-ste-dma40.h>
-#include <asm/mach-types.h>
-#include "db8500-regs.h"
-#include "board-mop500.h"
-#include "ste-dma40-db8500.h"
-/*
- * v2 has a new version of this block that need to be forced, the number found
- * in hardware is incorrect
- */
-#define U8500_SDI_V2_PERIPHID 0x10480180
-/*
- * SDI 0 (MicroSD slot)
- */
-#ifdef CONFIG_STE_DMA40
-struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx = {
-        .mode = STEDMA40_MODE_LOGICAL,
-        .dir = DMA_DEV_TO_MEM,
-        .dev_type = DB8500_DMA_DEV29_SD_MM0,
-};
-static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = {
-        .mode = STEDMA40_MODE_LOGICAL,
-        .dir = DMA_MEM_TO_DEV,
-        .dev_type = DB8500_DMA_DEV29_SD_MM0,
-};
-#endif
-struct mmci_platform_data mop500_sdi0_data = {
-        .f_max          = 100000000,
-        .capabilities   = MMC_CAP_4_BIT_DATA |
-                                MMC_CAP_SD_HIGHSPEED |
-                                MMC_CAP_MMC_HIGHSPEED |
-                                MMC_CAP_ERASE |
-                                MMC_CAP_UHS_SDR12 |
-                                MMC_CAP_UHS_SDR25,
-        .gpio_wp        = -1,
-        .sigdir         = MCI_ST_FBCLKEN |
-                                MCI_ST_CMDDIREN |
-                                MCI_ST_DATA0DIREN |
-                                MCI_ST_DATA2DIREN,
-#ifdef CONFIG_STE_DMA40
-        .dma_filter     = stedma40_filter,
-        .dma_rx_param   = &mop500_sdi0_dma_cfg_rx,
-        .dma_tx_param   = &mop500_sdi0_dma_cfg_tx,
-#endif
-};
-/*
- * SDI1 (SDIO WLAN)
- */
-#ifdef CONFIG_STE_DMA40
-static struct stedma40_chan_cfg sdi1_dma_cfg_rx = {
-        .mode = STEDMA40_MODE_LOGICAL,
-        .dir = DMA_DEV_TO_MEM,
-        .dev_type = DB8500_DMA_DEV32_SD_MM1,
-};
-static struct stedma40_chan_cfg sdi1_dma_cfg_tx = {
-        .mode = STEDMA40_MODE_LOGICAL,
-        .dir = DMA_MEM_TO_DEV,
-        .dev_type = DB8500_DMA_DEV32_SD_MM1,
-};
-#endif
-struct mmci_platform_data mop500_sdi1_data = {
-        .ocr_mask       = MMC_VDD_29_30,
-        .f_max          = 100000000,
-        .capabilities   = MMC_CAP_4_BIT_DATA |
-                                MMC_CAP_NONREMOVABLE,
-        .gpio_cd        = -1,
-        .gpio_wp        = -1,
-#ifdef CONFIG_STE_DMA40
-        .dma_filter     = stedma40_filter,
-        .dma_rx_param   = &sdi1_dma_cfg_rx,
-        .dma_tx_param   = &sdi1_dma_cfg_tx,
-#endif
-};
-/*
- * SDI 2 (POP eMMC, not on DB8500ed)
- */
-#ifdef CONFIG_STE_DMA40
-struct stedma40_chan_cfg mop500_sdi2_dma_cfg_rx = {
-        .mode = STEDMA40_MODE_LOGICAL,
-        .dir = DMA_DEV_TO_MEM,
-        .dev_type =  DB8500_DMA_DEV28_SD_MM2,
-};
-static struct stedma40_chan_cfg mop500_sdi2_dma_cfg_tx = {
-        .mode = STEDMA40_MODE_LOGICAL,
-        .dir = DMA_MEM_TO_DEV,
-        .dev_type = DB8500_DMA_DEV28_SD_MM2,
-};
-#endif
-struct mmci_platform_data mop500_sdi2_data = {
-        .ocr_mask       = MMC_VDD_165_195,
-        .f_max          = 100000000,
-        .capabilities   = MMC_CAP_4_BIT_DATA |
-                                MMC_CAP_8_BIT_DATA |
-                                MMC_CAP_NONREMOVABLE |
-                                MMC_CAP_MMC_HIGHSPEED |
-                                MMC_CAP_ERASE |
-                                MMC_CAP_CMD23,
-        .gpio_cd        = -1,
-        .gpio_wp        = -1,
-#ifdef CONFIG_STE_DMA40
-        .dma_filter     = stedma40_filter,
-        .dma_rx_param   = &mop500_sdi2_dma_cfg_rx,
-        .dma_tx_param   = &mop500_sdi2_dma_cfg_tx,
-#endif
-};
-/*
- * SDI 4 (on-board eMMC)
- */
-#ifdef CONFIG_STE_DMA40
-struct stedma40_chan_cfg mop500_sdi4_dma_cfg_rx = {
-        .mode = STEDMA40_MODE_LOGICAL,
-        .dir = DMA_DEV_TO_MEM,
-        .dev_type =  DB8500_DMA_DEV42_SD_MM4,
-};
-static struct stedma40_chan_cfg mop500_sdi4_dma_cfg_tx = {
-        .mode = STEDMA40_MODE_LOGICAL,
-        .dir = DMA_MEM_TO_DEV,
-        .dev_type = DB8500_DMA_DEV42_SD_MM4,
-};
-#endif
-struct mmci_platform_data mop500_sdi4_data = {
-        .f_max          = 100000000,
-        .capabilities   = MMC_CAP_4_BIT_DATA |
-                                MMC_CAP_8_BIT_DATA |
-                                MMC_CAP_NONREMOVABLE |
-                                MMC_CAP_MMC_HIGHSPEED |
-                                MMC_CAP_ERASE |
-                                MMC_CAP_CMD23,
-        .gpio_cd        = -1,
-        .gpio_wp        = -1,
-#ifdef CONFIG_STE_DMA40
-        .dma_filter     = stedma40_filter,
-        .dma_rx_param   = &mop500_sdi4_dma_cfg_rx,
-        .dma_tx_param   = &mop500_sdi4_dma_cfg_tx,
-#endif
-};
diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h
index 32cc0d8d8a0e..7c7b0adca582 100644
--- a/arch/arm/mach-ux500/board-mop500.h
+++ b/arch/arm/mach-ux500/board-mop500.h
@@ -8,12 +8,7 @@
 #define __BOARD_MOP500_H
 #include <linux/platform_data/asoc-ux500-msp.h>
-#include <linux/amba/mmci.h>
-extern struct mmci_platform_data mop500_sdi0_data;
-extern struct mmci_platform_data mop500_sdi1_data;
-extern struct mmci_platform_data mop500_sdi2_data;
-extern struct mmci_platform_data mop500_sdi4_data;
 extern struct msp_i2s_platform_data msp0_platform_data;
 extern struct msp_i2s_platform_data msp1_platform_data;
 extern struct msp_i2s_platform_data msp2_platform_data;
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 8820f602fcd2..fa308f07fae5 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -146,10 +146,6 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
        /* Requires call-back bindings. */
        OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
        /* Requires DMA bindings. */
-        OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0",  &mop500_sdi0_data),
-        OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1",  &mop500_sdi1_data),
-        OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2",  &mop500_sdi2_data),
-        OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4",  &mop500_sdi4_data),
        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
                       "ux500-msp-i2s.0", &msp0_platform_data),
        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index f2c89fb8fca9..be83ba25f81b 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -310,6 +310,21 @@ static struct platform_device char_lcd_device = {
        .resource       =       char_lcd_resources,
 };
+static struct resource leds_resources[] = {
+        {
+                .start  = VERSATILE_SYS_BASE + VERSATILE_SYS_LED_OFFSET,
+                .end    = VERSATILE_SYS_BASE + VERSATILE_SYS_LED_OFFSET + 4,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+static struct platform_device leds_device = {
+        .name           = "versatile-leds",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(leds_resources),
+        .resource       = leds_resources,
+};
 /*
 * Clock handling
 */
@@ -795,6 +810,7 @@ void __init versatile_init(void)
        platform_device_register(&versatile_i2c_device);
        platform_device_register(&smc91x_device);
        platform_device_register(&char_lcd_device);
+        platform_device_register(&leds_device);
        for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
                struct amba_device *d = amba_devs[i];
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 657d52d0391f..b8ac752fd24b 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -18,6 +18,8 @@ config ARCH_VEXPRESS
        select POWER_SUPPLY
        select REGULATOR_FIXED_VOLTAGE if REGULATOR
        select VEXPRESS_CONFIG
+        select VEXPRESS_SYSCFG
+        select MFD_VEXPRESS_SYSREG
        help
          This option enables support for systems using Cortex processor based
          ARM core and logic (FPGA) tiles on the Versatile Express motherboard,
diff --git a/arch/arm/mach-vexpress/core.h b/arch/arm/mach-vexpress/core.h
index bde4374ab6d5..152fad91b3ae 100644
--- a/arch/arm/mach-vexpress/core.h
+++ b/arch/arm/mach-vexpress/core.h
@@ -4,10 +4,9 @@
 /* Tile's peripherals static mappings should start here */
 #define V2T_PERIPH 0xf8200000
-void vexpress_dt_smp_map_io(void);
 bool vexpress_smp_init_ops(void);
 extern struct smp_operations    vexpress_smp_ops;
+extern struct smp_operations    vexpress_smp_dt_ops;
 extern void vexpress_cpu_die(unsigned int cpu);
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index 6f34497a4245..494d70bfddad 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -128,6 +128,10 @@ static struct platform_device pmu_device = {
        .resource       = pmu_resources,
 };
+static struct clk_lookup osc1_lookup = {
+        .dev_id         = "ct:clcd",
+};
 static struct platform_device osc1_device = {
        .name           = "vexpress-osc",
        .id             = 1,
@@ -135,6 +139,7 @@ static struct platform_device osc1_device = {
        .resource       = (struct resource []) {
                VEXPRESS_RES_FUNC(0xf, 1),
        },
+        .dev.platform_data = &osc1_lookup,
 };
 static void __init ct_ca9x4_init(void)
@@ -155,10 +160,7 @@ static void __init ct_ca9x4_init(void)
                amba_device_register(ct_ca9x4_amba_devs[i], &iomem_resource);
        platform_device_register(&pmu_device);
-        platform_device_register(&osc1_device);
+        vexpress_syscfg_device_register(&osc1_device);
-        WARN_ON(clk_register_clkdev(vexpress_osc_setup(&osc1_device.dev),
-                        NULL, "ct:clcd"));
 }
 #ifdef CONFIG_SMP
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
index 993c9ae5dc5e..a1f3804fd5a5 100644
--- a/arch/arm/mach-vexpress/platsmp.c
+++ b/arch/arm/mach-vexpress/platsmp.c
@@ -12,8 +12,7 @@
 #include <linux/errno.h>
 #include <linux/smp.h>
 #include <linux/io.h>
-#include <linux/of.h>
+#include <linux/of_address.h>
-#include <linux/of_fdt.h>
 #include <linux/vexpress.h>
 #include <asm/mcpm.h>
@@ -26,154 +25,13 @@
 #include "core.h"
-#if defined(CONFIG_OF)
-static enum {
-        GENERIC_SCU,
-        CORTEX_A9_SCU,
-} vexpress_dt_scu __initdata = GENERIC_SCU;
-static struct map_desc vexpress_dt_cortex_a9_scu_map __initdata = {
-        .virtual        = V2T_PERIPH,
-        /* .pfn set in vexpress_dt_init_cortex_a9_scu() */
-        .length         = SZ_128,
-        .type           = MT_DEVICE,
-};
-static void *vexpress_dt_cortex_a9_scu_base __initdata;
-const static char *vexpress_dt_cortex_a9_match[] __initconst = {
-        "arm,cortex-a5-scu",
-        "arm,cortex-a9-scu",
-        NULL
-};
-static int __init vexpress_dt_find_scu(unsigned long node,
-                const char *uname, int depth, void *data)
-{
-        if (of_flat_dt_match(node, vexpress_dt_cortex_a9_match)) {
-                phys_addr_t phys_addr;
-                __be32 *reg = of_get_flat_dt_prop(node, "reg", NULL);
-                if (WARN_ON(!reg))
-                        return -EINVAL;
-                phys_addr = be32_to_cpup(reg);
-                vexpress_dt_scu = CORTEX_A9_SCU;
-                vexpress_dt_cortex_a9_scu_map.pfn = __phys_to_pfn(phys_addr);
-                iotable_init(&vexpress_dt_cortex_a9_scu_map, 1);
-                vexpress_dt_cortex_a9_scu_base = ioremap(phys_addr, SZ_256);
-                if (WARN_ON(!vexpress_dt_cortex_a9_scu_base))
-                        return -EFAULT;
-        }
-        return 0;
-}
-void __init vexpress_dt_smp_map_io(void)
-{
-        if (initial_boot_params)
-                WARN_ON(of_scan_flat_dt(vexpress_dt_find_scu, NULL));
-}
-static int __init vexpress_dt_cpus_num(unsigned long node, const char *uname,
-                int depth, void *data)
-{
-        static int prev_depth = -1;
-        static int nr_cpus = -1;
-        if (prev_depth > depth && nr_cpus > 0)
-                return nr_cpus;
-        if (nr_cpus < 0 && strcmp(uname, "cpus") == 0)
-                nr_cpus = 0;
-        if (nr_cpus >= 0) {
-                const char *device_type = of_get_flat_dt_prop(node,
-                                "device_type", NULL);
-                if (device_type && strcmp(device_type, "cpu") == 0)
-                        nr_cpus++;
-        }
-        prev_depth = depth;
-        return 0;
-}
-static void __init vexpress_dt_smp_init_cpus(void)
-{
-        int ncores = 0, i;
-        switch (vexpress_dt_scu) {
-        case GENERIC_SCU:
-                ncores = of_scan_flat_dt(vexpress_dt_cpus_num, NULL);
-                break;
-        case CORTEX_A9_SCU:
-                ncores = scu_get_core_count(vexpress_dt_cortex_a9_scu_base);
-                break;
-        default:
-                WARN_ON(1);
-                break;
-        }
-        if (ncores < 2)
-                return;
-        if (ncores > nr_cpu_ids) {
-                pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
-                                ncores, nr_cpu_ids);
-                ncores = nr_cpu_ids;
-        }
-        for (i = 0; i < ncores; ++i)
-                set_cpu_possible(i, true);
-}
-static void __init vexpress_dt_smp_prepare_cpus(unsigned int max_cpus)
-{
-        int i;
-        switch (vexpress_dt_scu) {
-        case GENERIC_SCU:
-                for (i = 0; i < max_cpus; i++)
-                        set_cpu_present(i, true);
-                break;
-        case CORTEX_A9_SCU:
-                scu_enable(vexpress_dt_cortex_a9_scu_base);
-                break;
-        default:
-                WARN_ON(1);
-                break;
-        }
-}
-#else
-static void __init vexpress_dt_smp_init_cpus(void)
-{
-        WARN_ON(1);
-}
-void __init vexpress_dt_smp_prepare_cpus(unsigned int max_cpus)
-{
-        WARN_ON(1);
-}
-#endif
 /*
 * Initialise the CPU possible map early - this describes the CPUs
 * which may be present or become present in the system.
 */
 static void __init vexpress_smp_init_cpus(void)
 {
-        if (ct_desc)
+        ct_desc->init_cpu_map();
-                ct_desc->init_cpu_map();
-        else
-                vexpress_dt_smp_init_cpus();
 }
 static void __init vexpress_smp_prepare_cpus(unsigned int max_cpus)
@@ -182,10 +40,7 @@ static void __init vexpress_smp_prepare_cpus(unsigned int max_cpus)
         * Initialise the present map, which describes the set of CPUs
         * actually populated at the present time.
         */
-        if (ct_desc)
+        ct_desc->smp_enable(max_cpus);
-                ct_desc->smp_enable(max_cpus);
-        else
-                vexpress_dt_smp_prepare_cpus(max_cpus);
        /*
         * Write the address of secondary startup into the
@@ -223,3 +78,39 @@ bool __init vexpress_smp_init_ops(void)
 #endif
        return false;
 }
+#if defined(CONFIG_OF)
+static const struct of_device_id vexpress_smp_dt_scu_match[] __initconst = {
+        { .compatible = "arm,cortex-a5-scu", },
+        { .compatible = "arm,cortex-a9-scu", },
+        {}
+};
+static void __init vexpress_smp_dt_prepare_cpus(unsigned int max_cpus)
+{
+        struct device_node *scu = of_find_matching_node(NULL,
+                        vexpress_smp_dt_scu_match);
+        if (scu)
+                scu_enable(of_iomap(scu, 0));
+        /*
+         * Write the address of secondary startup into the
+         * system-wide flags register. The boot monitor waits
+         * until it receives a soft interrupt, and then the
+         * secondary CPU branches to this address.
+         */
+        vexpress_flags_set(virt_to_phys(versatile_secondary_startup));
+}
+struct smp_operations __initdata vexpress_smp_dt_ops = {
+        .smp_prepare_cpus       = vexpress_smp_dt_prepare_cpus,
+        .smp_secondary_init     = versatile_secondary_init,
+        .smp_boot_secondary     = versatile_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+        .cpu_die                = vexpress_cpu_die,
+#endif
+};
+#endif
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 4f8b8cb17ff5..38f4f6f37770 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -201,8 +201,9 @@ static struct platform_device v2m_cf_device = {
 static struct mmci_platform_data v2m_mmci_data = {
        .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
-        .gpio_wp        = VEXPRESS_GPIO_MMC_WPROT,
+        .status         = vexpress_get_mci_cardin,
-        .gpio_cd        = VEXPRESS_GPIO_MMC_CARDIN,
+        .gpio_cd        = -1,
+        .gpio_wp        = -1,
 };
 static struct resource v2m_sysreg_resources[] = {
@@ -340,11 +341,6 @@ static void __init v2m_init(void)
        regulator_register_fixed(0, v2m_eth_supplies,
                        ARRAY_SIZE(v2m_eth_supplies));
-        platform_device_register(&v2m_muxfpga_device);
-        platform_device_register(&v2m_shutdown_device);
-        platform_device_register(&v2m_reboot_device);
-        platform_device_register(&v2m_dvimode_device);
        platform_device_register(&v2m_sysreg_device);
        platform_device_register(&v2m_pcie_i2c_device);
        platform_device_register(&v2m_ddc_i2c_device);
@@ -356,6 +352,11 @@ static void __init v2m_init(void)
        for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++)
                amba_device_register(v2m_amba_devs[i], &iomem_resource);
+        vexpress_syscfg_device_register(&v2m_muxfpga_device);
+        vexpress_syscfg_device_register(&v2m_shutdown_device);
+        vexpress_syscfg_device_register(&v2m_reboot_device);
+        vexpress_syscfg_device_register(&v2m_dvimode_device);
        ct_desc->init_tile();
 }
@@ -369,71 +370,10 @@ MACHINE_START(VEXPRESS, "ARM-Versatile Express")
        .init_machine   = v2m_init,
 MACHINE_END
-static struct map_desc v2m_rs1_io_desc __initdata = {
-        .virtual        = V2M_PERIPH,
-        .pfn            = __phys_to_pfn(0x1c000000),
-        .length         = SZ_2M,
-        .type           = MT_DEVICE,
-};
-static int __init v2m_dt_scan_memory_map(unsigned long node, const char *uname,
-                int depth, void *data)
-{
-        const char **map = data;
-        if (strcmp(uname, "motherboard") != 0)
-                return 0;
-        *map = of_get_flat_dt_prop(node, "arm,v2m-memory-map", NULL);
-        return 1;
-}
-void __init v2m_dt_map_io(void)
-{
-        const char *map = NULL;
-        of_scan_flat_dt(v2m_dt_scan_memory_map, &map);
-        if (map && strcmp(map, "rs1") == 0)
-                iotable_init(&v2m_rs1_io_desc, 1);
-        else
-                iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
-#if defined(CONFIG_SMP)
-        vexpress_dt_smp_map_io();
-#endif
-}
-void __init v2m_dt_init_early(void)
-{
-        u32 dt_hbi;
-        vexpress_sysreg_of_early_init();
-        /* Confirm board type against DT property, if available */
-        if (of_property_read_u32(of_allnodes, "arm,hbi", &dt_hbi) == 0) {
-                u32 hbi = vexpress_get_hbi(VEXPRESS_SITE_MASTER);
-                if (WARN_ON(dt_hbi != hbi))
-                        pr_warning("vexpress: DT HBI (%x) is not matching "
-                                        "hardware (%x)!\n", dt_hbi, hbi);
-        }
-        versatile_sched_clock_init(vexpress_get_24mhz_clock_base(), 24000000);
-}
-static const struct of_device_id v2m_dt_bus_match[] __initconst = {
-        { .compatible = "simple-bus", },
-        { .compatible = "arm,amba-bus", },
-        { .compatible = "arm,vexpress,config-bus", },
-        {}
-};
 static void __init v2m_dt_init(void)
 {
        l2x0_of_init(0x00400000, 0xfe0fffff);
-        of_platform_populate(NULL, v2m_dt_bus_match, NULL, NULL);
+        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 }
 static const char * const v2m_dt_match[] __initconst = {
@@ -443,9 +383,7 @@ static const char * const v2m_dt_match[] __initconst = {
 DT_MACHINE_START(VEXPRESS_DT, "ARM-Versatile Express")
        .dt_compat      = v2m_dt_match,
-        .smp            = smp_ops(vexpress_smp_ops),
+        .smp            = smp_ops(vexpress_smp_dt_ops),
        .smp_init       = smp_init_ops(vexpress_smp_init_ops),
-        .map_io         = v2m_dt_map_io,
-        .init_early     = v2m_dt_init_early,
        .init_machine   = v2m_dt_init,
 MACHINE_END
diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
index 58c2b844e0a3..573e0db1d0f0 100644
--- a/arch/arm/mach-zynq/Kconfig
+++ b/arch/arm/mach-zynq/Kconfig
@@ -1,14 +1,16 @@
 config ARCH_ZYNQ
        bool "Xilinx Zynq ARM Cortex A9 Platform" if ARCH_MULTI_V7
-        select ARM_AMBA
-        select ARM_GIC
        select ARCH_HAS_CPUFREQ
        select ARCH_HAS_OPP
+        select ARCH_SUPPORTS_BIG_ENDIAN
+        select ARM_AMBA
+        select ARM_GIC
+        select ARM_GLOBAL_TIMER if !CPU_FREQ
+        select CADENCE_TTC_TIMER
        select HAVE_ARM_SCU if SMP
        select HAVE_ARM_TWD if SMP
        select ICST
-        select CADENCE_TTC_TIMER
-        select ARM_GLOBAL_TIMER if !CPU_FREQ
        select MFD_SYSCON
+        select SOC_BUS
        help
          Support for Xilinx Zynq ARM Cortex A9 Platform
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index 6fcc584c1a11..edbd9d83f407 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -29,6 +29,8 @@
 #include <linux/memblock.h>
 #include <linux/irqchip.h>
 #include <linux/irqchip/arm-gic.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -37,10 +39,15 @@
 #include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/smp_scu.h>
+#include <asm/system_info.h>
 #include <asm/hardware/cache-l2x0.h>
 #include "common.h"
+#define ZYNQ_DEVCFG_MCTRL               0x80
+#define ZYNQ_DEVCFG_PS_VERSION_SHIFT    28
+#define ZYNQ_DEVCFG_PS_VERSION_MASK     0xF
 void __iomem *zynq_scu_base;
 /**
@@ -60,19 +67,81 @@ static struct platform_device zynq_cpuidle_device = {
 };
 /**
+ * zynq_get_revision - Get Zynq silicon revision
+ *
+ * Return: Silicon version or -1 otherwise
+ */
+static int __init zynq_get_revision(void)
+{
+        struct device_node *np;
+        void __iomem *zynq_devcfg_base;
+        u32 revision;
+        np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-devcfg-1.0");
+        if (!np) {
+                pr_err("%s: no devcfg node found\n", __func__);
+                return -1;
+        }
+        zynq_devcfg_base = of_iomap(np, 0);
+        if (!zynq_devcfg_base) {
+                pr_err("%s: Unable to map I/O memory\n", __func__);
+                return -1;
+        }
+        revision = readl(zynq_devcfg_base + ZYNQ_DEVCFG_MCTRL);
+        revision >>= ZYNQ_DEVCFG_PS_VERSION_SHIFT;
+        revision &= ZYNQ_DEVCFG_PS_VERSION_MASK;
+        iounmap(zynq_devcfg_base);
+        return revision;
+}
+/**
 * zynq_init_machine - System specific initialization, intended to be
 *                     called from board specific initialization.
 */
 static void __init zynq_init_machine(void)
 {
        struct platform_device_info devinfo = { .name = "cpufreq-cpu0", };
+        struct soc_device_attribute *soc_dev_attr;
+        struct soc_device *soc_dev;
+        struct device *parent = NULL;
        /*
         * 64KB way size, 8-way associativity, parity disabled
         */
        l2x0_of_init(0x02060000, 0xF0F0FFFF);
-        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+        soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+        if (!soc_dev_attr)
+                goto out;
+        system_rev = zynq_get_revision();
+        soc_dev_attr->family = kasprintf(GFP_KERNEL, "Xilinx Zynq");
+        soc_dev_attr->revision = kasprintf(GFP_KERNEL, "0x%x", system_rev);
+        soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "0x%x",
+                                         zynq_slcr_get_device_id());
+        soc_dev = soc_device_register(soc_dev_attr);
+        if (IS_ERR(soc_dev)) {
+                kfree(soc_dev_attr->family);
+                kfree(soc_dev_attr->revision);
+                kfree(soc_dev_attr->soc_id);
+                kfree(soc_dev_attr);
+                goto out;
+        }
+        parent = soc_device_to_device(soc_dev);
+out:
+        /*
+         * Finished with the static registrations now; fill in the missing
+         * devices
+         */
+        of_platform_populate(NULL, of_default_bus_match_table, NULL, parent);
        platform_device_register(&zynq_cpuidle_device);
        platform_device_register_full(&devinfo);
diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h
index b097844d3175..f652f0a884a6 100644
--- a/arch/arm/mach-zynq/common.h
+++ b/arch/arm/mach-zynq/common.h
@@ -24,6 +24,7 @@ extern int zynq_early_slcr_init(void);
 extern void zynq_slcr_system_reset(void);
 extern void zynq_slcr_cpu_stop(int cpu);
 extern void zynq_slcr_cpu_start(int cpu);
+extern u32 zynq_slcr_get_device_id(void);
 #ifdef CONFIG_SMP
 extern void secondary_startup(void);
diff --git a/arch/arm/mach-zynq/headsmp.S b/arch/arm/mach-zynq/headsmp.S
index 57a32869f0aa..dd8c071941e7 100644
--- a/arch/arm/mach-zynq/headsmp.S
+++ b/arch/arm/mach-zynq/headsmp.S
@@ -8,9 +8,12 @@
 */
 #include <linux/linkage.h>
 #include <linux/init.h>
+#include <asm/assembler.h>
 ENTRY(zynq_secondary_trampoline)
-        ldr     r0, [pc]
+ARM_BE8(setend  be)                             @ ensure we are in BE8 mode
+        ldr     r0, zynq_secondary_trampoline_jump
+ARM_BE8(rev     r0, r0)
        bx      r0
 .globl zynq_secondary_trampoline_jump
 zynq_secondary_trampoline_jump:
diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c
index a37d49a6e657..c43a2d16e223 100644
--- a/arch/arm/mach-zynq/slcr.c
+++ b/arch/arm/mach-zynq/slcr.c
@@ -26,10 +26,13 @@
 #define SLCR_PS_RST_CTRL_OFFSET         0x200 /* PS Software Reset Control */
 #define SLCR_A9_CPU_RST_CTRL_OFFSET     0x244 /* CPU Software Reset Control */
 #define SLCR_REBOOT_STATUS_OFFSET       0x258 /* PS Reboot Status */
+#define SLCR_PSS_IDCODE                 0x530 /* PS IDCODE */
 #define SLCR_UNLOCK_MAGIC               0xDF0D
 #define SLCR_A9_CPU_CLKSTOP             0x10
 #define SLCR_A9_CPU_RST                 0x1
+#define SLCR_PSS_IDCODE_DEVICE_SHIFT    12
+#define SLCR_PSS_IDCODE_DEVICE_MASK     0x1F
 static void __iomem *zynq_slcr_base;
 static struct regmap *zynq_slcr_regmap;
@@ -83,6 +86,22 @@ static inline int zynq_slcr_unlock(void)
 }
 /**
+ * zynq_slcr_get_device_id - Read device code id
+ *
+ * Return:      Device code id
+ */
+u32 zynq_slcr_get_device_id(void)
+{
+        u32 val;
+        zynq_slcr_read(&val, SLCR_PSS_IDCODE);
+        val >>= SLCR_PSS_IDCODE_DEVICE_SHIFT;
+        val &= SLCR_PSS_IDCODE_DEVICE_MASK;
+        return val;
+}
+/**
 * zynq_slcr_system_reset - Reset the entire system.
 */
 void zynq_slcr_system_reset(void)
diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
index 0c93588fcb91..1ca37c72f12f 100644
--- a/arch/arm/mm/proc-v7m.S
+++ b/arch/arm/mm/proc-v7m.S
@@ -123,6 +123,11 @@ __v7m_setup:
        mov     pc, lr
 ENDPROC(__v7m_setup)
+        .align 2
+__v7m_setup_stack:
+        .space  4 * 8                           @ 8 registers
+__v7m_setup_stack_top:
        define_processor_functions v7m, dabort=nommu_early_abort, pabort=legacy_pabort, nommu=1
        .section ".rodata"
@@ -152,6 +157,3 @@ __v7m_proc_info:
        .long   nop_cache_fns           @ proc_info_list.cache
        .size   __v7m_proc_info, . - __v7m_proc_info
-__v7m_setup_stack:
-        .space  4 * 8                           @ 8 registers
-__v7m_setup_stack_top:
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index 384a776d8eb2..61b4d705c267 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -40,7 +40,7 @@ static void __iomem *sync32k_cnt_reg;
 static u64 notrace omap_32k_read_sched_clock(void)
 {
-        return sync32k_cnt_reg ? __raw_readl(sync32k_cnt_reg) : 0;
+        return sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;
 }
 /**
@@ -64,7 +64,7 @@ static void omap_read_persistent_clock(struct timespec *ts)
        spin_lock_irqsave(&read_persistent_clock_lock, flags);
        last_cycles = cycles;
-        cycles = sync32k_cnt_reg ? __raw_readl(sync32k_cnt_reg) : 0;
+        cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;
        nsecs = clocksource_cyc2ns(cycles - last_cycles,
                                        persistent_mult, persistent_shift);
@@ -95,7 +95,7 @@ int __init omap_init_clocksource_32k(void __iomem *vbase)
         * The 'SCHEME' bits(30-31) of the revision register is used
         * to identify the version.
         */
-        if (__raw_readl(vbase + OMAP2_32KSYNCNT_REV_OFF) &
+        if (readl_relaxed(vbase + OMAP2_32KSYNCNT_REV_OFF) &
                                                OMAP2_32KSYNCNT_REV_SCHEME)
                sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF_HIGH;
        else
diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c
index aa7ebc6bcd65..48b69de89a5d 100644
--- a/arch/arm/plat-omap/debug-leds.c
+++ b/arch/arm/plat-omap/debug-leds.c
@@ -85,12 +85,12 @@ static void dbg_led_set(struct led_classdev *cdev,
        struct dbg_led *led = container_of(cdev, struct dbg_led, cdev);
        u16 reg;
-        reg = __raw_readw(&fpga->leds);
+        reg = readw_relaxed(&fpga->leds);
        if (b != LED_OFF)
                reg |= led->mask;
        else
                reg &= ~led->mask;
-        __raw_writew(reg, &fpga->leds);
+        writew_relaxed(reg, &fpga->leds);
 }
 static enum led_brightness dbg_led_get(struct led_classdev *cdev)
@@ -98,7 +98,7 @@ static enum led_brightness dbg_led_get(struct led_classdev *cdev)
        struct dbg_led *led = container_of(cdev, struct dbg_led, cdev);
        u16 reg;
-        reg = __raw_readw(&fpga->leds);
+        reg = readw_relaxed(&fpga->leds);
        return (reg & led->mask) ? LED_FULL : LED_OFF;
 }
@@ -112,7 +112,7 @@ static int fpga_probe(struct platform_device *pdev)
                return -ENODEV;
        fpga = ioremap(iomem->start, resource_size(iomem));
-        __raw_writew(0xff, &fpga->leds);
+        writew_relaxed(0xff, &fpga->leds);
        for (i = 0; i < ARRAY_SIZE(dbg_leds); i++) {
                struct dbg_led *led;
@@ -138,15 +138,15 @@ static int fpga_probe(struct platform_device *pdev)
 static int fpga_suspend_noirq(struct device *dev)
 {
-        fpga_led_state = __raw_readw(&fpga->leds);
+        fpga_led_state = readw_relaxed(&fpga->leds);
-        __raw_writew(0xff, &fpga->leds);
+        writew_relaxed(0xff, &fpga->leds);
        return 0;
 }
 static int fpga_resume_noirq(struct device *dev)
 {
-        __raw_writew(~fpga_led_state, &fpga->leds);
+        writew_relaxed(~fpga_led_state, &fpga->leds);
        return 0;
 }
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 5f5b975887fc..b5608b1f9fbd 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -70,6 +70,7 @@ static u32 errata;
 static struct omap_dma_global_context_registers {
        u32 dma_irqenable_l0;
+        u32 dma_irqenable_l1;
        u32 dma_ocp_sysconfig;
        u32 dma_gcr;
 } omap_dma_global_context;
@@ -1973,10 +1974,17 @@ static struct irqaction omap24xx_dma_irq;
 /*----------------------------------------------------------------------------*/
+/*
+ * Note that we are currently using only IRQENABLE_L0 and L1.
+ * As the DSP may be using IRQENABLE_L2 and L3, let's not
+ * touch those for now.
+ */
 void omap_dma_global_context_save(void)
 {
        omap_dma_global_context.dma_irqenable_l0 =
                p->dma_read(IRQENABLE_L0, 0);
+        omap_dma_global_context.dma_irqenable_l1 =
+                p->dma_read(IRQENABLE_L1, 0);
        omap_dma_global_context.dma_ocp_sysconfig =
                p->dma_read(OCP_SYSCONFIG, 0);
        omap_dma_global_context.dma_gcr = p->dma_read(GCR, 0);
@@ -1991,6 +1999,8 @@ void omap_dma_global_context_restore(void)
                OCP_SYSCONFIG, 0);
        p->dma_write(omap_dma_global_context.dma_irqenable_l0,
                IRQENABLE_L0, 0);
+        p->dma_write(omap_dma_global_context.dma_irqenable_l1,
+                IRQENABLE_L1, 0);
        if (IS_DMA_ERRATA(DMA_ROMCODE_BUG))
                p->dma_write(0x3 , IRQSTATUS_L0, 0);
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 869254cebf84..db10169a08de 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -103,7 +103,7 @@ static void omap_timer_restore_context(struct omap_dm_timer *timer)
                                timer->context.tmar);
        omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG,
                                timer->context.tsicr);
-        __raw_writel(timer->context.tier, timer->irq_ena);
+        writel_relaxed(timer->context.tier, timer->irq_ena);
        omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG,
                                timer->context.tclr);
 }
@@ -699,9 +699,9 @@ int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask)
        omap_dm_timer_enable(timer);
        if (timer->revision == 1)
-                l = __raw_readl(timer->irq_ena) & ~mask;
+                l = readl_relaxed(timer->irq_ena) & ~mask;
-        __raw_writel(l, timer->irq_dis);
+        writel_relaxed(l, timer->irq_dis);
        l = omap_dm_timer_read_reg(timer, OMAP_TIMER_WAKEUP_EN_REG) & ~mask;
        omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, l);
@@ -722,7 +722,7 @@ unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
                return 0;
        }
-        l = __raw_readl(timer->irq_stat);
+        l = readl_relaxed(timer->irq_stat);
        return l;
 }
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index 2861b155485a..dd79f3005cdf 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -280,20 +280,20 @@ static inline u32 __omap_dm_timer_read(struct omap_dm_timer *timer, u32 reg,
                                                int posted)
 {
        if (posted)
-                while (__raw_readl(timer->pend) & (reg >> WPSHIFT))
+                while (readl_relaxed(timer->pend) & (reg >> WPSHIFT))
                        cpu_relax();
-        return __raw_readl(timer->func_base + (reg & 0xff));
+        return readl_relaxed(timer->func_base + (reg & 0xff));
 }
 static inline void __omap_dm_timer_write(struct omap_dm_timer *timer,
                                        u32 reg, u32 val, int posted)
 {
        if (posted)
-                while (__raw_readl(timer->pend) & (reg >> WPSHIFT))
+                while (readl_relaxed(timer->pend) & (reg >> WPSHIFT))
                        cpu_relax();
-        __raw_writel(val, timer->func_base + (reg & 0xff));
+        writel_relaxed(val, timer->func_base + (reg & 0xff));
 }
 static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer)
@@ -301,7 +301,7 @@ static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer)
        u32 tidr;
        /* Assume v1 ip if bits [31:16] are zero */
-        tidr = __raw_readl(timer->io_base);
+        tidr = readl_relaxed(timer->io_base);
        if (!(tidr >> 16)) {
                timer->revision = 1;
                timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET;
@@ -385,7 +385,7 @@ static inline void __omap_dm_timer_stop(struct omap_dm_timer *timer,
        }
        /* Ack possibly pending interrupt */
-        __raw_writel(OMAP_TIMER_INT_OVERFLOW, timer->irq_stat);
+        writel_relaxed(OMAP_TIMER_INT_OVERFLOW, timer->irq_stat);
 }
 static inline void __omap_dm_timer_load_start(struct omap_dm_timer *timer,
@@ -399,7 +399,7 @@ static inline void __omap_dm_timer_load_start(struct omap_dm_timer *timer,
 static inline void __omap_dm_timer_int_enable(struct omap_dm_timer *timer,
                                                unsigned int value)
 {
-        __raw_writel(value, timer->irq_ena);
+        writel_relaxed(value, timer->irq_ena);
        __omap_dm_timer_write(timer, OMAP_TIMER_WAKEUP_EN_REG, value, 0);
 }
@@ -412,7 +412,7 @@ __omap_dm_timer_read_counter(struct omap_dm_timer *timer, int posted)
 static inline void __omap_dm_timer_write_status(struct omap_dm_timer *timer,
                                                unsigned int value)
 {
-        __raw_writel(value, timer->irq_stat);
+        writel_relaxed(value, timer->irq_stat);
 }
 #endif /* __ASM_ARCH_DMTIMER_H */
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 25c826ed3b65..5e5beaa9ae15 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -4,6 +4,9 @@
 #
 # Licensed under GPLv2
+ccflags-$(CONFIG_ARCH_MULTI_V7) += -I$(srctree)/$(src)/include
+ccflags-$(CONFIG_ARCH_EXYNOS)   += -I$(srctree)/arch/arm/mach-exynos/include
 obj-y                           :=
 obj-m                           :=
 obj-n                           := dummy.o
diff --git a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
index 7231c8e4975e..72d4178ad23b 100644
--- a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
+++ b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
@@ -119,6 +119,7 @@ struct s3c_plltab {
 struct s3c_cpufreq_config {
        struct s3c_freq         freq;
        struct s3c_freq         max;
+        struct clk              *mpll;
        struct cpufreq_frequency_table pll;
        struct s3c_clkdivs      divs;
        struct s3c_cpufreq_info *info;  /* for core, not drivers */
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index 5992b8dd9b89..5a237db9f9eb 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -43,16 +43,6 @@ extern unsigned long samsung_cpu_id;
 #define S5PV210_CPU_ID          0x43110000
 #define S5PV210_CPU_MASK        0xFFFFF000
-#define EXYNOS4210_CPU_ID       0x43210000
-#define EXYNOS4212_CPU_ID       0x43220000
-#define EXYNOS4412_CPU_ID       0xE4412200
-#define EXYNOS4_CPU_MASK        0xFFFE0000
-#define EXYNOS5250_SOC_ID       0x43520000
-#define EXYNOS5420_SOC_ID       0xE5420000
-#define EXYNOS5440_SOC_ID       0xE5440000
-#define EXYNOS5_SOC_MASK        0xFFFFF000
 #define IS_SAMSUNG_CPU(name, id, mask)          \
 static inline int is_samsung_##name(void)       \
 {                                               \
@@ -68,12 +58,6 @@ IS_SAMSUNG_CPU(s5p6440, S5P6440_CPU_ID, S5P64XX_CPU_MASK)
 IS_SAMSUNG_CPU(s5p6450, S5P6450_CPU_ID, S5P64XX_CPU_MASK)
 IS_SAMSUNG_CPU(s5pc100, S5PC100_CPU_ID, S5PC100_CPU_MASK)
 IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK)
-IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
-IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
-IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
-IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
-IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK)
-IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
 #if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \
    defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \
@@ -126,50 +110,6 @@ IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
 # define soc_is_s5pv210()       0
 #endif
-#if defined(CONFIG_CPU_EXYNOS4210)
-# define soc_is_exynos4210()    is_samsung_exynos4210()
-#else
-# define soc_is_exynos4210()    0
-#endif
-#if defined(CONFIG_SOC_EXYNOS4212)
-# define soc_is_exynos4212()    is_samsung_exynos4212()
-#else
-# define soc_is_exynos4212()    0
-#endif
-#if defined(CONFIG_SOC_EXYNOS4412)
-# define soc_is_exynos4412()    is_samsung_exynos4412()
-#else
-# define soc_is_exynos4412()    0
-#endif
-#define EXYNOS4210_REV_0        (0x0)
-#define EXYNOS4210_REV_1_0      (0x10)
-#define EXYNOS4210_REV_1_1      (0x11)
-#if defined(CONFIG_SOC_EXYNOS5250)
-# define soc_is_exynos5250()    is_samsung_exynos5250()
-#else
-# define soc_is_exynos5250()    0
-#endif
-#if defined(CONFIG_SOC_EXYNOS5420)
-# define soc_is_exynos5420()    is_samsung_exynos5420()
-#else
-# define soc_is_exynos5420()    0
-#endif
-#if defined(CONFIG_SOC_EXYNOS5440)
-# define soc_is_exynos5440()    is_samsung_exynos5440()
-#else
-# define soc_is_exynos5440()    0
-#endif
-#define soc_is_exynos4() (soc_is_exynos4210() || soc_is_exynos4212() || \
-                          soc_is_exynos4412())
-#define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5420())
 #define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
 #ifndef KHZ
@@ -239,7 +179,6 @@ extern struct bus_type s3c2443_subsys;
 extern struct bus_type s3c6410_subsys;
 extern struct bus_type s5p64x0_subsys;
 extern struct bus_type s5pv210_subsys;
-extern struct bus_type exynos_subsys;
 extern void (*s5pc1xx_idle)(void);
diff --git a/arch/arm/plat-versatile/Kconfig b/arch/arm/plat-versatile/Kconfig
index 2c4332b9f948..fce41e93b6a4 100644
--- a/arch/arm/plat-versatile/Kconfig
+++ b/arch/arm/plat-versatile/Kconfig
@@ -6,12 +6,6 @@ config PLAT_VERSATILE_CLOCK
 config PLAT_VERSATILE_CLCD
        bool
-config PLAT_VERSATILE_LEDS
-        def_bool y if NEW_LEDS
-        depends on ARCH_REALVIEW || ARCH_VERSATILE
-        select LEDS_CLASS
-        select LEDS_TRIGGERS
 config PLAT_VERSATILE_SCHED_CLOCK
        def_bool y
diff --git a/arch/arm/plat-versatile/Makefile b/arch/arm/plat-versatile/Makefile
index f88d448b629c..2e0c472958ae 100644
--- a/arch/arm/plat-versatile/Makefile
+++ b/arch/arm/plat-versatile/Makefile
@@ -2,6 +2,5 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
 obj-$(CONFIG_PLAT_VERSATILE_CLOCK) += clock.o
 obj-$(CONFIG_PLAT_VERSATILE_CLCD) += clcd.o
-obj-$(CONFIG_PLAT_VERSATILE_LEDS) += leds.o
 obj-$(CONFIG_PLAT_VERSATILE_SCHED_CLOCK) += sched-clock.o
 obj-$(CONFIG_SMP) += headsmp.o platsmp.o
diff --git a/arch/arm/plat-versatile/leds.c b/arch/arm/plat-versatile/leds.c
deleted file mode 100644
index d2490d00b46c..000000000000
--- a/arch/arm/plat-versatile/leds.c
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- * Driver for the 8 user LEDs found on the RealViews and Versatiles
- * Based on DaVinci's DM365 board code
- *
- * License terms: GNU General Public License (GPL) version 2
- * Author: Linus Walleij <triad@df.lth.se>
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/slab.h>
-#include <linux/leds.h>
-#include <mach/hardware.h>
-#include <mach/platform.h>
-#ifdef VERSATILE_SYS_BASE
-#define LEDREG  (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_LED_OFFSET)
-#endif
-#ifdef REALVIEW_SYS_BASE
-#define LEDREG  (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LED_OFFSET)
-#endif
-struct versatile_led {
-        struct led_classdev     cdev;
-        u8                      mask;
-};
-/*
- * The triggers lines up below will only be used if the
- * LED triggers are compiled in.
- */
-static const struct {
-        const char *name;
-        const char *trigger;
-} versatile_leds[] = {
-        { "versatile:0", "heartbeat", },
-        { "versatile:1", "mmc0", },
-        { "versatile:2", "cpu0" },
-        { "versatile:3", "cpu1" },
-        { "versatile:4", "cpu2" },
-        { "versatile:5", "cpu3" },
-        { "versatile:6", },
-        { "versatile:7", },
-};
-static void versatile_led_set(struct led_classdev *cdev,
-                              enum led_brightness b)
-{
-        struct versatile_led *led = container_of(cdev,
-                                                 struct versatile_led, cdev);
-        u32 reg = readl(LEDREG);
-        if (b != LED_OFF)
-                reg |= led->mask;
-        else
-                reg &= ~led->mask;
-        writel(reg, LEDREG);
-}
-static enum led_brightness versatile_led_get(struct led_classdev *cdev)
-{
-        struct versatile_led *led = container_of(cdev,
-                                                 struct versatile_led, cdev);
-        u32 reg = readl(LEDREG);
-        return (reg & led->mask) ? LED_FULL : LED_OFF;
-}
-static int __init versatile_leds_init(void)
-{
-        int i;
-        /* All ON */
-        writel(0xff, LEDREG);
-        for (i = 0; i < ARRAY_SIZE(versatile_leds); i++) {
-                struct versatile_led *led;
-                led = kzalloc(sizeof(*led), GFP_KERNEL);
-                if (!led)
-                        break;
-                led->cdev.name = versatile_leds[i].name;
-                led->cdev.brightness_set = versatile_led_set;
-                led->cdev.brightness_get = versatile_led_get;
-                led->cdev.default_trigger = versatile_leds[i].trigger;
-                led->mask = BIT(i);
-                if (led_classdev_register(NULL, &led->cdev) < 0) {
-                        kfree(led);
-                        break;
-                }
-        }
-        return 0;
-}
-/*
- * Since we may have triggers on any subsystem, defer registration
- * until after subsystem_init.
- */
-fs_initcall(versatile_leds_init);
diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c
index b96723e258a0..1e632430570b 100644
--- a/arch/arm/xen/enlighten.c
+++ b/arch/arm/xen/enlighten.c
@@ -339,6 +339,14 @@ static int __init xen_pm_init(void)
 }
 late_initcall(xen_pm_init);
+/* empty stubs */
+void xen_arch_pre_suspend(void) { }
+void xen_arch_post_suspend(int suspend_cancelled) { }
+void xen_timer_resume(void) { }
+void xen_arch_resume(void) { }
 /* In the hypervisor.S file. */
 EXPORT_SYMBOL_GPL(HYPERVISOR_event_channel_op);
 EXPORT_SYMBOL_GPL(HYPERVISOR_grant_table_op);
@@ -350,4 +358,5 @@ EXPORT_SYMBOL_GPL(HYPERVISOR_memory_op);
 EXPORT_SYMBOL_GPL(HYPERVISOR_physdev_op);
 EXPORT_SYMBOL_GPL(HYPERVISOR_vcpu_op);
 EXPORT_SYMBOL_GPL(HYPERVISOR_tmem_op);
+EXPORT_SYMBOL_GPL(HYPERVISOR_multicall);
 EXPORT_SYMBOL_GPL(privcmd_call);
diff --git a/arch/arm/xen/hypercall.S b/arch/arm/xen/hypercall.S
index d1cf7b7c2200..44e3a5f10c4c 100644
--- a/arch/arm/xen/hypercall.S
+++ b/arch/arm/xen/hypercall.S
@@ -89,6 +89,7 @@ HYPERCALL2(memory_op);
 HYPERCALL2(physdev_op);
 HYPERCALL3(vcpu_op);
 HYPERCALL1(tmem_op);
+HYPERCALL2(multicall);
 ENTRY(privcmd_call)
        stmdb sp!, {r4}
diff --git a/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi
index 2f2ecd217363..ac2cb2418025 100644
--- a/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi
+++ b/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi
@@ -200,7 +200,7 @@
                };
                mcc {
-                        compatible = "arm,vexpress,config-bus", "simple-bus";
+                        compatible = "arm,vexpress,config-bus";
                        arm,vexpress,config-bridge = <&v2m_sysreg>;
                        v2m_oscclk1: osc@1 {
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index e94f9458aa6f..993bce527b85 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -138,6 +138,7 @@ static inline void *phys_to_virt(phys_addr_t x)
 #define __pa(x)                 __virt_to_phys((unsigned long)(x))
 #define __va(x)                 ((void *)__phys_to_virt((phys_addr_t)(x)))
 #define pfn_to_kaddr(pfn)       __va((pfn) << PAGE_SHIFT)
+#define virt_to_pfn(x)      __phys_to_pfn(__virt_to_phys(x))
 /*
 *  virt_to_page(k)     convert a _valid_ virtual address to struct page *
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index 90c811f05a2e..7b1c67a0b485 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -266,7 +266,7 @@ static inline pmd_t pte_pmd(pte_t pte)
 #define pmd_page(pmd)           pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
-#define set_pmd_at(mm, addr, pmdp, pmd) set_pmd(pmdp, pmd)
+#define set_pmd_at(mm, addr, pmdp, pmd) set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd))
 static inline int has_transparent_hugepage(void)
 {
diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c
index 473e5dbf8f39..0f08dfd69ebc 100644
--- a/arch/arm64/kernel/irq.c
+++ b/arch/arm64/kernel/irq.c
@@ -97,11 +97,15 @@ static bool migrate_one_irq(struct irq_desc *desc)
        if (irqd_is_per_cpu(d) || !cpumask_test_cpu(smp_processor_id(), affinity))
                return false;
-        if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
+        if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids)
-                affinity = cpu_online_mask;
                ret = true;
-        }
+        /*
+         * when using forced irq_set_affinity we must ensure that the cpu
+         * being offlined is not present in the affinity mask, it may be
+         * selected as the target CPU otherwise
+         */
+        affinity = cpu_online_mask;
        c = irq_data_get_irq_chip(d);
        if (!c->irq_set_affinity)
                pr_debug("IRQ%u: unable to set affinity\n", d->irq);
diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c
index 5e9aec358306..31eb959e9aa8 100644
--- a/arch/arm64/mm/hugetlbpage.c
+++ b/arch/arm64/mm/hugetlbpage.c
@@ -51,7 +51,11 @@ int pmd_huge(pmd_t pmd)
 int pud_huge(pud_t pud)
 {
+#ifndef __PAGETABLE_PMD_FOLDED
        return !(pud_val(pud) & PUD_TABLE_BIT);
+#else
+        return 0;
+#endif
 }
 int pmd_huge_support(void)
diff --git a/arch/arm64/xen/hypercall.S b/arch/arm64/xen/hypercall.S
index 531342ec4bcf..8bbe9401f4f0 100644
--- a/arch/arm64/xen/hypercall.S
+++ b/arch/arm64/xen/hypercall.S
@@ -80,6 +80,7 @@ HYPERCALL2(memory_op);
 HYPERCALL2(physdev_op);
 HYPERCALL3(vcpu_op);
 HYPERCALL1(tmem_op);
+HYPERCALL2(multicall);
 ENTRY(privcmd_call)
        mov x16, x0
diff --git a/arch/blackfin/include/asm/pci.h b/arch/blackfin/include/asm/pci.h
index 74352c4597d9..c737909fba47 100644
--- a/arch/blackfin/include/asm/pci.h
+++ b/arch/blackfin/include/asm/pci.h
@@ -10,9 +10,4 @@
 #define PCIBIOS_MIN_IO 0x00001000
 #define PCIBIOS_MIN_MEM 0x10000000
-static inline void pcibios_penalize_isa_irq(int irq)
-{
-        /* We don't do dynamic PCI IRQ allocation */
-}
 #endif                          /* _ASM_BFIN_PCI_H */
diff --git a/arch/cris/include/asm/pci.h b/arch/cris/include/asm/pci.h
index f666734926d5..cc2399c175e9 100644
--- a/arch/cris/include/asm/pci.h
+++ b/arch/cris/include/asm/pci.h
@@ -20,7 +20,6 @@ void pcibios_config_init(void);
 struct pci_bus * pcibios_scan_root(int bus);
 void pcibios_set_master(struct pci_dev *dev);
-void pcibios_penalize_isa_irq(int irq);
 struct irq_routing_table *pcibios_get_irq_routing_table(void);
 int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq);
diff --git a/arch/frv/include/asm/pci.h b/arch/frv/include/asm/pci.h
index ef03baf5d89d..2035a4d3f9b9 100644
--- a/arch/frv/include/asm/pci.h
+++ b/arch/frv/include/asm/pci.h
@@ -24,8 +24,6 @@ struct pci_dev;
 extern void pcibios_set_master(struct pci_dev *dev);
-extern void pcibios_penalize_isa_irq(int irq);
 #ifdef CONFIG_MMU
 extern void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle);
 extern void consistent_free(void *vaddr);
diff --git a/arch/frv/mb93090-mb00/pci-irq.c b/arch/frv/mb93090-mb00/pci-irq.c
index c677b9d81d30..1c35c93f942b 100644
--- a/arch/frv/mb93090-mb00/pci-irq.c
+++ b/arch/frv/mb93090-mb00/pci-irq.c
@@ -55,10 +55,6 @@ void __init pcibios_fixup_irqs(void)
        }
 }
-void __init pcibios_penalize_isa_irq(int irq)
-{
-}
 void pcibios_enable_irq(struct pci_dev *dev)
 {
        pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
diff --git a/arch/ia64/include/asm/pci.h b/arch/ia64/include/asm/pci.h
index 7d41cc089822..52af5ed9f60b 100644
--- a/arch/ia64/include/asm/pci.h
+++ b/arch/ia64/include/asm/pci.h
@@ -50,12 +50,6 @@ struct pci_dev;
 extern unsigned long ia64_max_iommu_merge_mask;
 #define PCI_DMA_BUS_IS_PHYS     (ia64_max_iommu_merge_mask == ~0UL)
-static inline void
-pcibios_penalize_isa_irq (int irq, int active)
-{
-        /* We don't do dynamic PCI IRQ allocation */
-}
 #include <asm-generic/pci-dma-compat.h>
 #ifdef CONFIG_PCI
diff --git a/arch/ia64/include/asm/unistd.h b/arch/ia64/include/asm/unistd.h
index ae763d8bf55a..fb13dc5e8f8c 100644
--- a/arch/ia64/include/asm/unistd.h
+++ b/arch/ia64/include/asm/unistd.h
@@ -11,7 +11,7 @@
-#define NR_syscalls                     314 /* length of syscall table */
+#define NR_syscalls                     315 /* length of syscall table */
 /*
 * The following defines stop scripts/checksyscalls.sh from complaining about
diff --git a/arch/ia64/include/uapi/asm/unistd.h b/arch/ia64/include/uapi/asm/unistd.h
index 715e85f858de..7de0a2d65da4 100644
--- a/arch/ia64/include/uapi/asm/unistd.h
+++ b/arch/ia64/include/uapi/asm/unistd.h
@@ -327,5 +327,6 @@
 #define __NR_finit_module               1335
 #define __NR_sched_setattr              1336
 #define __NR_sched_getattr              1337
+#define __NR_renameat2                  1338
 #endif /* _UAPI_ASM_IA64_UNISTD_H */
diff --git a/arch/ia64/kernel/entry.S b/arch/ia64/kernel/entry.S
index fa8d61a312a7..ba3d03503e84 100644
--- a/arch/ia64/kernel/entry.S
+++ b/arch/ia64/kernel/entry.S
@@ -1775,6 +1775,7 @@ sys_call_table:
        data8 sys_finit_module                  // 1335
        data8 sys_sched_setattr
        data8 sys_sched_getattr
+        data8 sys_renameat2
        .org sys_call_table + 8*NR_syscalls     // guard against failures to increase NR_syscalls
 #endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
diff --git a/arch/ia64/pci/fixup.c b/arch/ia64/pci/fixup.c
index eee069a0b539..1fe9aa5068ea 100644
--- a/arch/ia64/pci/fixup.c
+++ b/arch/ia64/pci/fixup.c
@@ -49,9 +49,7 @@ static void pci_fixup_video(struct pci_dev *pdev)
                 * type BRIDGE, or CARDBUS. Host to PCI controllers use
                 * PCI header type NORMAL.
                 */
-                if (bridge
+                if (bridge && (pci_is_bridge(bridge))) {
-                    &&((bridge->hdr_type == PCI_HEADER_TYPE_BRIDGE)
-                       ||(bridge->hdr_type == PCI_HEADER_TYPE_CARDBUS))) {
                        pci_read_config_word(bridge, PCI_BRIDGE_CONTROL,
                                                &config);
                        if (!(config & PCI_BRIDGE_CTL_VGA))
diff --git a/arch/m68k/Kconfig.debug b/arch/m68k/Kconfig.debug
index 229682721240..64776d7ac199 100644
--- a/arch/m68k/Kconfig.debug
+++ b/arch/m68k/Kconfig.debug
@@ -12,12 +12,17 @@ config BOOTPARAM_STRING
 config EARLY_PRINTK
        bool "Early printk"
-        depends on MVME16x || MAC
+        depends on !(SUN3 || M68360 || M68000 || COLDFIRE)
        help
          Write kernel log output directly to a serial port.
+          Where implemented, output goes to the framebuffer as well.
+          PROM console functionality on Sun 3x is not affected by this option.
+          Pass "earlyprintk" on the kernel command line to get a
+          boot console.
          This is useful for kernel debugging when your machine crashes very
-          early before the console code is initialized.
+          early, i.e. before the normal console driver is loaded.
          You should normally say N here, unless you want to debug such a crash.
 if !MMU
diff --git a/arch/m68k/amiga/amisound.c b/arch/m68k/amiga/amisound.c
index 2559eefc6aff..90a60d758f8b 100644
--- a/arch/m68k/amiga/amisound.c
+++ b/arch/m68k/amiga/amisound.c
@@ -51,7 +51,7 @@ void __init amiga_init_sound(void)
        snd_data = amiga_chip_alloc_res(sizeof(sine_data), &beep_res);
        if (!snd_data) {
-                printk (KERN_CRIT "amiga init_sound: failed to allocate chipmem\n");
+                pr_crit("amiga init_sound: failed to allocate chipmem\n");
                return;
        }
        memcpy (snd_data, sine_data, sizeof(sine_data));
diff --git a/arch/m68k/amiga/config.c b/arch/m68k/amiga/config.c
index 9625b7132227..01693df7f2f6 100644
--- a/arch/m68k/amiga/config.c
+++ b/arch/m68k/amiga/config.c
@@ -183,7 +183,7 @@ int __init amiga_parse_bootinfo(const struct bi_record *record)
                        dev->boardaddr = be32_to_cpu(cd->cd_BoardAddr);
                        dev->boardsize = be32_to_cpu(cd->cd_BoardSize);
                } else
-                        printk("amiga_parse_bootinfo: too many AutoConfig devices\n");
+                        pr_warn("amiga_parse_bootinfo: too many AutoConfig devices\n");
 #endif /* CONFIG_ZORRO */
                break;
@@ -209,9 +209,9 @@ static void __init amiga_identify(void)
        memset(&amiga_hw_present, 0, sizeof(amiga_hw_present));
-        printk("Amiga hardware found: ");
+        pr_info("Amiga hardware found: ");
        if (amiga_model >= AMI_500 && amiga_model <= AMI_DRACO) {
-                printk("[%s] ", amiga_models[amiga_model-AMI_500]);
+                pr_cont("[%s] ", amiga_models[amiga_model-AMI_500]);
                strcat(amiga_model_name, amiga_models[amiga_model-AMI_500]);
        }
@@ -322,7 +322,7 @@ static void __init amiga_identify(void)
 #define AMIGAHW_ANNOUNCE(name, str)             \
        if (AMIGAHW_PRESENT(name))              \
-                printk(str)
+                pr_cont(str)
        AMIGAHW_ANNOUNCE(AMI_VIDEO, "VIDEO ");
        AMIGAHW_ANNOUNCE(AMI_BLITTER, "BLITTER ");
@@ -354,8 +354,8 @@ static void __init amiga_identify(void)
        AMIGAHW_ANNOUNCE(MAGIC_REKICK, "MAGIC_REKICK ");
        AMIGAHW_ANNOUNCE(PCMCIA, "PCMCIA ");
        if (AMIGAHW_PRESENT(ZORRO))
-                printk("ZORRO%s ", AMIGAHW_PRESENT(ZORRO3) ? "3" : "");
+                pr_cont("ZORRO%s ", AMIGAHW_PRESENT(ZORRO3) ? "3" : "");
-        printk("\n");
+        pr_cont("\n");
 #undef AMIGAHW_ANNOUNCE
 }
@@ -424,7 +424,7 @@ void __init config_amiga(void)
                        if (m68k_memory[i].addr < 16*1024*1024) {
                                if (i == 0) {
                                        /* don't cut off the branch we're sitting on */
-                                        printk("Warning: kernel runs in Zorro II memory\n");
+                                        pr_warn("Warning: kernel runs in Zorro II memory\n");
                                        continue;
                                }
                                disabled_z2mem += m68k_memory[i].size;
@@ -435,8 +435,8 @@ void __init config_amiga(void)
                        }
                }
                if (disabled_z2mem)
-                printk("%dK of Zorro II memory will not be used as system memory\n",
+                        pr_info("%dK of Zorro II memory will not be used as system memory\n",
-                disabled_z2mem>>10);
+                                disabled_z2mem>>10);
        }
        /* request all RAM */
@@ -475,7 +475,7 @@ static void __init amiga_sched_init(irq_handler_t timer_routine)
        jiffy_ticks = DIV_ROUND_CLOSEST(amiga_eclock, HZ);
        if (request_resource(&mb_resources._ciab, &sched_res))
-                printk("Cannot allocate ciab.ta{lo,hi}\n");
+                pr_warn("Cannot allocate ciab.ta{lo,hi}\n");
        ciab.cra &= 0xC0;   /* turn off timer A, continuous mode, from Eclk */
        ciab.talo = jiffy_ticks % 256;
        ciab.tahi = jiffy_ticks / 256;
diff --git a/arch/m68k/apollo/config.c b/arch/m68k/apollo/config.c
index 9268c0f96376..6e62d66c396e 100644
--- a/arch/m68k/apollo/config.c
+++ b/arch/m68k/apollo/config.c
@@ -65,8 +65,8 @@ int __init apollo_parse_bootinfo(const struct bi_record *record)
 static void __init dn_setup_model(void)
 {
-        printk("Apollo hardware found: ");
+        pr_info("Apollo hardware found: [%s]\n",
-        printk("[%s]\n", apollo_models[apollo_model - APOLLO_DN3000]);
+                apollo_models[apollo_model - APOLLO_DN3000]);
        switch(apollo_model) {
                case APOLLO_UNKNOWN:
@@ -197,8 +197,10 @@ void dn_sched_init(irq_handler_t timer_routine)
        *(volatile unsigned char *)(pica+1)&=(~8);
 #if 0
-        printk("*(0x10803) %02x\n",*(volatile unsigned char *)(apollo_timer + 0x3));
+        pr_info("*(0x10803) %02x\n",
-        printk("*(0x10803) %02x\n",*(volatile unsigned char *)(apollo_timer + 0x3));
+                *(volatile unsigned char *)(apollo_timer + 0x3));
+        pr_info("*(0x10803) %02x\n",
+                *(volatile unsigned char *)(apollo_timer + 0x3));
 #endif
        if (request_irq(IRQ_APOLLO, dn_timer_int, 0, "time", timer_routine))
@@ -236,12 +238,10 @@ int dn_dummy_hwclk(int op, struct rtc_time *t) {
 }
-int dn_dummy_set_clock_mmss(unsigned long nowtime) {
+int dn_dummy_set_clock_mmss(unsigned long nowtime)
+{
-  printk("set_clock_mmss\n");
+        pr_info("set_clock_mmss\n");
+        return 0;
-  return 0;
 }
 void dn_dummy_reset(void) {
diff --git a/arch/m68k/atari/stram.c b/arch/m68k/atari/stram.c
index 0810c8d56e59..5f8cb5a234d9 100644
--- a/arch/m68k/atari/stram.c
+++ b/arch/m68k/atari/stram.c
@@ -47,6 +47,7 @@ static struct resource stram_pool = {
 static unsigned long pool_size = 1024*1024;
+static unsigned long stram_virt_offset;
 static int __init atari_stram_setup(char *arg)
 {
@@ -67,14 +68,12 @@ early_param("stram_pool", atari_stram_setup);
 void __init atari_stram_init(void)
 {
        int i;
-        void *stram_start;
        /*
         * determine whether kernel code resides in ST-RAM
         * (then ST-RAM is the first memory block at virtual 0x0)
         */
-        stram_start = phys_to_virt(0);
+        kernel_in_stram = (m68k_memory[0].addr == 0);
-        kernel_in_stram = (stram_start == 0);
        for (i = 0; i < m68k_num_memory; ++i) {
                if (m68k_memory[i].addr == 0) {
@@ -89,24 +88,62 @@ void __init atari_stram_init(void)
 /*
 * This function is called from setup_arch() to reserve the pages needed for
- * ST-RAM management.
+ * ST-RAM management, if the kernel resides in ST-RAM.
 */
 void __init atari_stram_reserve_pages(void *start_mem)
 {
-        /*
+        if (kernel_in_stram) {
-         * always reserve first page of ST-RAM, the first 2 KiB are
+                pr_debug("atari_stram pool: kernel in ST-RAM, using alloc_bootmem!\n");
-         * supervisor-only!
+                stram_pool.start = (resource_size_t)alloc_bootmem_low_pages(pool_size);
-         */
+                stram_pool.end = stram_pool.start + pool_size - 1;
-        if (!kernel_in_stram)
+                request_resource(&iomem_resource, &stram_pool);
-                reserve_bootmem(0, PAGE_SIZE, BOOTMEM_DEFAULT);
+                stram_virt_offset = 0;
+                pr_debug("atari_stram pool: size = %lu bytes, resource = %pR\n",
+                        pool_size, &stram_pool);
+                pr_debug("atari_stram pool: stram_virt_offset = %lx\n",
+                        stram_virt_offset);
+        }
+}
-        stram_pool.start = (resource_size_t)alloc_bootmem_low_pages(pool_size);
-        stram_pool.end = stram_pool.start + pool_size - 1;
-        request_resource(&iomem_resource, &stram_pool);
-        pr_debug("atari_stram pool: size = %lu bytes, resource = %pR\n",
+/*
-                 pool_size, &stram_pool);
+ * This function is called as arch initcall to reserve the pages needed for
+ * ST-RAM management, if the kernel does not reside in ST-RAM.
+ */
+int __init atari_stram_map_pages(void)
+{
+        if (!kernel_in_stram) {
+                /*
+                 * Skip page 0, as the fhe first 2 KiB are supervisor-only!
+                 */
+                pr_debug("atari_stram pool: kernel not in ST-RAM, using ioremap!\n");
+                stram_pool.start = PAGE_SIZE;
+                stram_pool.end = stram_pool.start + pool_size - 1;
+                request_resource(&iomem_resource, &stram_pool);
+                stram_virt_offset = (unsigned long) ioremap(stram_pool.start,
+                                resource_size(&stram_pool)) - stram_pool.start;
+                pr_debug("atari_stram pool: size = %lu bytes, resource = %pR\n",
+                        pool_size, &stram_pool);
+                pr_debug("atari_stram pool: stram_virt_offset = %lx\n",
+                        stram_virt_offset);
+        }
+        return 0;
+}
+arch_initcall(atari_stram_map_pages);
+void *atari_stram_to_virt(unsigned long phys)
+{
+        return (void *)(phys + stram_virt_offset);
+}
+EXPORT_SYMBOL(atari_stram_to_virt);
+unsigned long atari_stram_to_phys(void *virt)
+{
+        return (unsigned long)(virt - stram_virt_offset);
 }
+EXPORT_SYMBOL(atari_stram_to_phys);
 void *atari_stram_alloc(unsigned long size, const char *owner)
@@ -134,14 +171,14 @@ void *atari_stram_alloc(unsigned long size, const char *owner)
        }
        pr_debug("atari_stram_alloc: returning %pR\n", res);
-        return (void *)res->start;
+        return atari_stram_to_virt(res->start);
 }
 EXPORT_SYMBOL(atari_stram_alloc);
 void atari_stram_free(void *addr)
 {
-        unsigned long start = (unsigned long)addr;
+        unsigned long start = atari_stram_to_phys(addr);
        struct resource *res;
        unsigned long size;
diff --git a/arch/m68k/configs/amiga_defconfig b/arch/m68k/configs/amiga_defconfig
index 96da4963d14b..d7eac833a94f 100644
--- a/arch/m68k/configs/amiga_defconfig
+++ b/arch/m68k/configs/amiga_defconfig
@@ -159,6 +159,7 @@ CONFIG_IP_SET_BITMAP_IP=m
 CONFIG_IP_SET_BITMAP_IPMAC=m
 CONFIG_IP_SET_BITMAP_PORT=m
 CONFIG_IP_SET_HASH_IP=m
+CONFIG_IP_SET_HASH_IPMARK=m
 CONFIG_IP_SET_HASH_IPPORT=m
 CONFIG_IP_SET_HASH_IPPORTIP=m
 CONFIG_IP_SET_HASH_IPPORTNET=m
@@ -227,6 +228,7 @@ CONFIG_DNS_RESOLVER=y
 CONFIG_BATMAN_ADV=m
 CONFIG_BATMAN_ADV_DAT=y
 CONFIG_BATMAN_ADV_NC=y
+CONFIG_BATMAN_ADV_MCAST=y
 CONFIG_NETLINK_DIAG=m
 CONFIG_NET_MPLS_GSO=m
 # CONFIG_WIRELESS is not set
@@ -279,6 +281,7 @@ CONFIG_DM_CRYPT=m
 CONFIG_DM_SNAPSHOT=m
 CONFIG_DM_THIN_PROVISIONING=m
 CONFIG_DM_CACHE=m
+CONFIG_DM_ERA=m
 CONFIG_DM_MIRROR=m
 CONFIG_DM_RAID=m
 CONFIG_DM_ZERO=m
@@ -305,7 +308,6 @@ CONFIG_VETH=m
 CONFIG_A2065=y
 CONFIG_ARIADNE=y
 # CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_CADENCE is not set
 # CONFIG_NET_VENDOR_BROADCOM is not set
 # CONFIG_NET_VENDOR_CIRRUS is not set
 # CONFIG_NET_VENDOR_HP is not set
@@ -315,6 +317,7 @@ CONFIG_ARIADNE=y
 CONFIG_HYDRA=y
 CONFIG_APNE=y
 CONFIG_ZORRO8390=y
+# CONFIG_NET_VENDOR_SAMSUNG is not set
 # CONFIG_NET_VENDOR_SEEQ is not set
 # CONFIG_NET_VENDOR_SMSC is not set
 # CONFIG_NET_VENDOR_STMICRO is not set
diff --git a/arch/m68k/configs/apollo_defconfig b/arch/m68k/configs/apollo_defconfig
index 1b8739f50cbf..650ee75de6cd 100644
--- a/arch/m68k/configs/apollo_defconfig
+++ b/arch/m68k/configs/apollo_defconfig
@@ -157,6 +157,7 @@ CONFIG_IP_SET_BITMAP_IP=m
 CONFIG_IP_SET_BITMAP_IPMAC=m
 CONFIG_IP_SET_BITMAP_PORT=m
 CONFIG_IP_SET_HASH_IP=m
+CONFIG_IP_SET_HASH_IPMARK=m
 CONFIG_IP_SET_HASH_IPPORT=m
 CONFIG_IP_SET_HASH_IPPORTIP=m
 CONFIG_IP_SET_HASH_IPPORTNET=m
@@ -225,6 +226,7 @@ CONFIG_DNS_RESOLVER=y
 CONFIG_BATMAN_ADV=m
 CONFIG_BATMAN_ADV_DAT=y
 CONFIG_BATMAN_ADV_NC=y
+CONFIG_BATMAN_ADV_MCAST=y
 CONFIG_NETLINK_DIAG=m
 CONFIG_NET_MPLS_GSO=m
 # CONFIG_WIRELESS is not set
@@ -261,6 +263,7 @@ CONFIG_DM_CRYPT=m
 CONFIG_DM_SNAPSHOT=m
 CONFIG_DM_THIN_PROVISIONING=m
 CONFIG_DM_CACHE=m
+CONFIG_DM_ERA=m
 CONFIG_DM_MIRROR=m
 CONFIG_DM_RAID=m
 CONFIG_DM_ZERO=m
@@ -284,12 +287,12 @@ CONFIG_NETCONSOLE=m
 CONFIG_NETCONSOLE_DYNAMIC=y
 CONFIG_VETH=m
 # CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_CADENCE is not set
 # CONFIG_NET_VENDOR_BROADCOM is not set
 # CONFIG_NET_VENDOR_INTEL is not set
 # CONFIG_NET_VENDOR_MARVELL is not set
 # CONFIG_NET_VENDOR_MICREL is not set
 # CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
 # CONFIG_NET_VENDOR_SEEQ is not set
 # CONFIG_NET_VENDOR_STMICRO is not set
 # CONFIG_NET_VENDOR_VIA is not set
diff --git a/arch/m68k/configs/atari_defconfig b/arch/m68k/configs/atari_defconfig
index 6ea4e91f0caa..3142e69342fa 100644
--- a/arch/m68k/configs/atari_defconfig
+++ b/arch/m68k/configs/atari_defconfig
@@ -156,6 +156,7 @@ CONFIG_IP_SET_BITMAP_IP=m
 CONFIG_IP_SET_BITMAP_IPMAC=m
 CONFIG_IP_SET_BITMAP_PORT=m
 CONFIG_IP_SET_HASH_IP=m
+CONFIG_IP_SET_HASH_IPMARK=m
 CONFIG_IP_SET_HASH_IPPORT=m
 CONFIG_IP_SET_HASH_IPPORTIP=m
 CONFIG_IP_SET_HASH_IPPORTNET=m
@@ -224,6 +225,7 @@ CONFIG_DNS_RESOLVER=y
 CONFIG_BATMAN_ADV=m
 CONFIG_BATMAN_ADV_DAT=y
 CONFIG_BATMAN_ADV_NC=y
+CONFIG_BATMAN_ADV_MCAST=y
 CONFIG_NETLINK_DIAG=m
 CONFIG_NET_MPLS_GSO=m
 # CONFIG_WIRELESS is not set
@@ -269,6 +271,7 @@ CONFIG_DM_CRYPT=m
 CONFIG_DM_SNAPSHOT=m
 CONFIG_DM_THIN_PROVISIONING=m
 CONFIG_DM_CACHE=m
+CONFIG_DM_ERA=m
 CONFIG_DM_MIRROR=m
 CONFIG_DM_RAID=m
 CONFIG_DM_ZERO=m
@@ -293,11 +296,11 @@ CONFIG_NETCONSOLE_DYNAMIC=y
 CONFIG_VETH=m
 CONFIG_ATARILANCE=y
 # CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_CADENCE is not set
 # CONFIG_NET_VENDOR_BROADCOM is not set
 # CONFIG_NET_VENDOR_INTEL is not set
 # CONFIG_NET_VENDOR_MARVELL is not set
 # CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
 # CONFIG_NET_VENDOR_SEEQ is not set
 # CONFIG_NET_VENDOR_STMICRO is not set
 # CONFIG_NET_VENDOR_VIA is not set
diff --git a/arch/m68k/configs/bvme6000_defconfig b/arch/m68k/configs/bvme6000_defconfig
index e5a12739ff2d..0daa8a172f30 100644
--- a/arch/m68k/configs/bvme6000_defconfig
+++ b/arch/m68k/configs/bvme6000_defconfig
@@ -155,6 +155,7 @@ CONFIG_IP_SET_BITMAP_IP=m
 CONFIG_IP_SET_BITMAP_IPMAC=m
 CONFIG_IP_SET_BITMAP_PORT=m
 CONFIG_IP_SET_HASH_IP=m
+CONFIG_IP_SET_HASH_IPMARK=m
 CONFIG_IP_SET_HASH_IPPORT=m
 CONFIG_IP_SET_HASH_IPPORTIP=m
 CONFIG_IP_SET_HASH_IPPORTNET=m
@@ -223,6 +224,7 @@ CONFIG_DNS_RESOLVER=y
 CONFIG_BATMAN_ADV=m
 CONFIG_BATMAN_ADV_DAT=y
 CONFIG_BATMAN_ADV_NC=y
+CONFIG_BATMAN_ADV_MCAST=y
 CONFIG_NETLINK_DIAG=m
 CONFIG_NET_MPLS_GSO=m
 # CONFIG_WIRELESS is not set
@@ -260,6 +262,7 @@ CONFIG_DM_CRYPT=m
 CONFIG_DM_SNAPSHOT=m
 CONFIG_DM_THIN_PROVISIONING=m
 CONFIG_DM_CACHE=m
+CONFIG_DM_ERA=m
 CONFIG_DM_MIRROR=m
 CONFIG_DM_RAID=m
 CONFIG_DM_ZERO=m
@@ -283,12 +286,12 @@ CONFIG_NETCONSOLE=m
 CONFIG_NETCONSOLE_DYNAMIC=y
 CONFIG_VETH=m
 # CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_CADENCE is not set
 # CONFIG_NET_VENDOR_BROADCOM is not set
 CONFIG_BVME6000_NET=y
 # CONFIG_NET_VENDOR_MARVELL is not set
 # CONFIG_NET_VENDOR_MICREL is not set
 # CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
 # CONFIG_NET_VENDOR_SEEQ is not set
 # CONFIG_NET_VENDOR_STMICRO is not set
 # CONFIG_NET_VENDOR_VIA is not set
diff --git a/arch/m68k/configs/hp300_defconfig b/arch/m68k/configs/hp300_defconfig
index 8936d7fb0f0f..88af78f7bad9 100644
--- a/arch/m68k/configs/hp300_defconfig
+++ b/arch/m68k/configs/hp300_defconfig
@@ -157,6 +157,7 @@ CONFIG_IP_SET_BITMAP_IP=m
 CONFIG_IP_SET_BITMAP_IPMAC=m
 CONFIG_IP_SET_BITMAP_PORT=m
 CONFIG_IP_SET_HASH_IP=m
+CONFIG_IP_SET_HASH_IPMARK=m
 CONFIG_IP_SET_HASH_IPPORT=m
 CONFIG_IP_SET_HASH_IPPORTIP=m
 CONFIG_IP_SET_HASH_IPPORTNET=m
@@ -225,6 +226,7 @@ CONFIG_DNS_RESOLVER=y
 CONFIG_BATMAN_ADV=m
 CONFIG_BATMAN_ADV_DAT=y
 CONFIG_BATMAN_ADV_NC=y
+CONFIG_BATMAN_ADV_MCAST=y
 CONFIG_NETLINK_DIAG=m
 CONFIG_NET_MPLS_GSO=m
 # CONFIG_WIRELESS is not set
@@ -261,6 +263,7 @@ CONFIG_DM_CRYPT=m
 CONFIG_DM_SNAPSHOT=m
 CONFIG_DM_THIN_PROVISIONING=m
 CONFIG_DM_CACHE=m
+CONFIG_DM_ERA=m
 CONFIG_DM_MIRROR=m
 CONFIG_DM_RAID=m
 CONFIG_DM_ZERO=m
@@ -285,12 +288,12 @@ CONFIG_NETCONSOLE_DYNAMIC=y
 CONFIG_VETH=m
 CONFIG_HPLANCE=y
 # CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_CADENCE is not set
 # CONFIG_NET_VENDOR_BROADCOM is not set
 # CONFIG_NET_VENDOR_INTEL is not set
 # CONFIG_NET_VENDOR_MARVELL is not set
 # CONFIG_NET_VENDOR_MICREL is not set
 # CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
 # CONFIG_NET_VENDOR_SEEQ is not set
 # CONFIG_NET_VENDOR_STMICRO is not set
 # CONFIG_NET_VENDOR_VIA is not set
diff --git a/arch/m68k/configs/mac_defconfig b/arch/m68k/configs/mac_defconfig
index be5342cca25b..66f915574a85 100644
--- a/arch/m68k/configs/mac_defconfig
+++ b/arch/m68k/configs/mac_defconfig
@@ -156,6 +156,7 @@ CONFIG_IP_SET_BITMAP_IP=m
 CONFIG_IP_SET_BITMAP_IPMAC=m
 CONFIG_IP_SET_BITMAP_PORT=m
 CONFIG_IP_SET_HASH_IP=m
+CONFIG_IP_SET_HASH_IPMARK=m
 CONFIG_IP_SET_HASH_IPPORT=m
 CONFIG_IP_SET_HASH_IPPORTIP=m
 CONFIG_IP_SET_HASH_IPPORTNET=m
@@ -227,6 +228,7 @@ CONFIG_DNS_RESOLVER=y
 CONFIG_BATMAN_ADV=m
 CONFIG_BATMAN_ADV_DAT=y
 CONFIG_BATMAN_ADV_NC=y
+CONFIG_BATMAN_ADV_MCAST=y
 CONFIG_NETLINK_DIAG=m
 CONFIG_NET_MPLS_GSO=m
 # CONFIG_WIRELESS is not set
@@ -270,6 +272,7 @@ CONFIG_DM_CRYPT=m
 CONFIG_DM_SNAPSHOT=m
 CONFIG_DM_THIN_PROVISIONING=m
 CONFIG_DM_CACHE=m
+CONFIG_DM_ERA=m
 CONFIG_DM_MIRROR=m
 CONFIG_DM_RAID=m
 CONFIG_DM_ZERO=m
@@ -301,7 +304,6 @@ CONFIG_NETCONSOLE_DYNAMIC=y
 CONFIG_VETH=m
 CONFIG_MACMACE=y
 # CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_CADENCE is not set
 # CONFIG_NET_VENDOR_BROADCOM is not set
 CONFIG_MAC89x0=y
 # CONFIG_NET_VENDOR_INTEL is not set
@@ -309,6 +311,7 @@ CONFIG_MAC89x0=y
 # CONFIG_NET_VENDOR_MICREL is not set
 CONFIG_MACSONIC=y
 CONFIG_MAC8390=y
+# CONFIG_NET_VENDOR_SAMSUNG is not set
 # CONFIG_NET_VENDOR_SEEQ is not set
 # CONFIG_NET_VENDOR_SMSC is not set
 # CONFIG_NET_VENDOR_STMICRO is not set
diff --git a/arch/m68k/configs/multi_defconfig b/arch/m68k/configs/multi_defconfig
index f27194ade167..5eaa49924fa6 100644
--- a/arch/m68k/configs/multi_defconfig
+++ b/arch/m68k/configs/multi_defconfig
@@ -165,6 +165,7 @@ CONFIG_IP_SET_BITMAP_IP=m
 CONFIG_IP_SET_BITMAP_IPMAC=m
 CONFIG_IP_SET_BITMAP_PORT=m
 CONFIG_IP_SET_HASH_IP=m
+CONFIG_IP_SET_HASH_IPMARK=m
 CONFIG_IP_SET_HASH_IPPORT=m
 CONFIG_IP_SET_HASH_IPPORTIP=m
 CONFIG_IP_SET_HASH_IPPORTNET=m
@@ -236,6 +237,7 @@ CONFIG_DNS_RESOLVER=y
 CONFIG_BATMAN_ADV=m
 CONFIG_BATMAN_ADV_DAT=y
 CONFIG_BATMAN_ADV_NC=y
+CONFIG_BATMAN_ADV_MCAST=y
 CONFIG_NETLINK_DIAG=m
 CONFIG_NET_MPLS_GSO=m
 # CONFIG_WIRELESS is not set
@@ -302,6 +304,7 @@ CONFIG_DM_CRYPT=m
 CONFIG_DM_SNAPSHOT=m
 CONFIG_DM_THIN_PROVISIONING=m
 CONFIG_DM_CACHE=m
+CONFIG_DM_ERA=m
 CONFIG_DM_MIRROR=m
 CONFIG_DM_RAID=m
 CONFIG_DM_ZERO=m
@@ -340,7 +343,6 @@ CONFIG_MVME147_NET=y
 CONFIG_SUN3LANCE=y
 CONFIG_MACMACE=y
 # CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_CADENCE is not set
 # CONFIG_NET_VENDOR_BROADCOM is not set
 CONFIG_MAC89x0=y
 # CONFIG_NET_VENDOR_HP is not set
@@ -354,6 +356,7 @@ CONFIG_MAC8390=y
 CONFIG_NE2000=m
 CONFIG_APNE=y
 CONFIG_ZORRO8390=y
+# CONFIG_NET_VENDOR_SAMSUNG is not set
 # CONFIG_NET_VENDOR_SEEQ is not set
 # CONFIG_NET_VENDOR_STMICRO is not set
 # CONFIG_NET_VENDOR_VIA is not set
diff --git a/arch/m68k/configs/mvme147_defconfig b/arch/m68k/configs/mvme147_defconfig
index c3887603c1db..324d0b4d8351 100644
--- a/arch/m68k/configs/mvme147_defconfig
+++ b/arch/m68k/configs/mvme147_defconfig
@@ -154,6 +154,7 @@ CONFIG_IP_SET_BITMAP_IP=m
 CONFIG_IP_SET_BITMAP_IPMAC=m
 CONFIG_IP_SET_BITMAP_PORT=m
 CONFIG_IP_SET_HASH_IP=m
+CONFIG_IP_SET_HASH_IPMARK=m
 CONFIG_IP_SET_HASH_IPPORT=m
 CONFIG_IP_SET_HASH_IPPORTIP=m
 CONFIG_IP_SET_HASH_IPPORTNET=m
@@ -222,6 +223,7 @@ CONFIG_DNS_RESOLVER=y
 CONFIG_BATMAN_ADV=m
 CONFIG_BATMAN_ADV_DAT=y
 CONFIG_BATMAN_ADV_NC=y
+CONFIG_BATMAN_ADV_MCAST=y
 CONFIG_NETLINK_DIAG=m
 CONFIG_NET_MPLS_GSO=m
 # CONFIG_WIRELESS is not set
@@ -259,6 +261,7 @@ CONFIG_DM_CRYPT=m
 CONFIG_DM_SNAPSHOT=m
 CONFIG_DM_THIN_PROVISIONING=m
 CONFIG_DM_CACHE=m
+CONFIG_DM_ERA=m
 CONFIG_DM_MIRROR=m
 CONFIG_DM_RAID=m
 CONFIG_DM_ZERO=m
@@ -283,12 +286,12 @@ CONFIG_NETCONSOLE_DYNAMIC=y
 CONFIG_VETH=m
 CONFIG_MVME147_NET=y
 # CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_CADENCE is not set
 # CONFIG_NET_VENDOR_BROADCOM is not set
 # CONFIG_NET_VENDOR_INTEL is not set
 # CONFIG_NET_VENDOR_MARVELL is not set
 # CONFIG_NET_VENDOR_MICREL is not set
 # CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
 # CONFIG_NET_VENDOR_SEEQ is not set
 # CONFIG_NET_VENDOR_STMICRO is not set
 # CONFIG_NET_VENDOR_VIA is not set
diff --git a/arch/m68k/configs/mvme16x_defconfig b/arch/m68k/configs/mvme16x_defconfig
index f7ff784d05ac..f0cb4338952e 100644
--- a/arch/m68k/configs/mvme16x_defconfig
+++ b/arch/m68k/configs/mvme16x_defconfig
@@ -155,6 +155,7 @@ CONFIG_IP_SET_BITMAP_IP=m
 CONFIG_IP_SET_BITMAP_IPMAC=m
 CONFIG_IP_SET_BITMAP_PORT=m
 CONFIG_IP_SET_HASH_IP=m
+CONFIG_IP_SET_HASH_IPMARK=m
 CONFIG_IP_SET_HASH_IPPORT=m
 CONFIG_IP_SET_HASH_IPPORTIP=m
 CONFIG_IP_SET_HASH_IPPORTNET=m
@@ -223,6 +224,7 @@ CONFIG_DNS_RESOLVER=y
 CONFIG_BATMAN_ADV=m
 CONFIG_BATMAN_ADV_DAT=y
 CONFIG_BATMAN_ADV_NC=y
+CONFIG_BATMAN_ADV_MCAST=y
 CONFIG_NETLINK_DIAG=m
 CONFIG_NET_MPLS_GSO=m
 # CONFIG_WIRELESS is not set
@@ -260,6 +262,7 @@ CONFIG_DM_CRYPT=m
 CONFIG_DM_SNAPSHOT=m
 CONFIG_DM_THIN_PROVISIONING=m
 CONFIG_DM_CACHE=m
+CONFIG_DM_ERA=m
 CONFIG_DM_MIRROR=m
 CONFIG_DM_RAID=m
 CONFIG_DM_ZERO=m
@@ -283,12 +286,12 @@ CONFIG_NETCONSOLE=m
 CONFIG_NETCONSOLE_DYNAMIC=y
 CONFIG_VETH=m
 # CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_CADENCE is not set
 # CONFIG_NET_VENDOR_BROADCOM is not set
 CONFIG_MVME16x_NET=y
 # CONFIG_NET_VENDOR_MARVELL is not set
 # CONFIG_NET_VENDOR_MICREL is not set
 # CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
 # CONFIG_NET_VENDOR_SEEQ is not set
 # CONFIG_NET_VENDOR_STMICRO is not set
 # CONFIG_NET_VENDOR_VIA is not set
diff --git a/arch/m68k/configs/q40_defconfig b/arch/m68k/configs/q40_defconfig
index f0c72ab037be..d6cf0880c463 100644
--- a/arch/m68k/configs/q40_defconfig
+++ b/arch/m68k/configs/q40_defconfig
@@ -155,6 +155,7 @@ CONFIG_IP_SET_BITMAP_IP=m
 CONFIG_IP_SET_BITMAP_IPMAC=m
 CONFIG_IP_SET_BITMAP_PORT=m
 CONFIG_IP_SET_HASH_IP=m
+CONFIG_IP_SET_HASH_IPMARK=m
 CONFIG_IP_SET_HASH_IPPORT=m
 CONFIG_IP_SET_HASH_IPPORTIP=m
 CONFIG_IP_SET_HASH_IPPORTNET=m
@@ -223,6 +224,7 @@ CONFIG_DNS_RESOLVER=y
 CONFIG_BATMAN_ADV=m
 CONFIG_BATMAN_ADV_DAT=y
 CONFIG_BATMAN_ADV_NC=y
+CONFIG_BATMAN_ADV_MCAST=y
 CONFIG_NETLINK_DIAG=m
 CONFIG_NET_MPLS_GSO=m
 # CONFIG_WIRELESS is not set
@@ -266,6 +268,7 @@ CONFIG_DM_CRYPT=m
 CONFIG_DM_SNAPSHOT=m
 CONFIG_DM_THIN_PROVISIONING=m
 CONFIG_DM_CACHE=m
+CONFIG_DM_ERA=m
 CONFIG_DM_MIRROR=m
 CONFIG_DM_RAID=m
 CONFIG_DM_ZERO=m
@@ -291,7 +294,6 @@ CONFIG_VETH=m
 # CONFIG_NET_VENDOR_3COM is not set
 # CONFIG_NET_VENDOR_AMD is not set
 # CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_CADENCE is not set
 # CONFIG_NET_VENDOR_BROADCOM is not set
 # CONFIG_NET_VENDOR_CIRRUS is not set
 # CONFIG_NET_VENDOR_HP is not set
@@ -299,6 +301,7 @@ CONFIG_VETH=m
 # CONFIG_NET_VENDOR_MARVELL is not set
 # CONFIG_NET_VENDOR_MICREL is not set
 CONFIG_NE2000=m
+# CONFIG_NET_VENDOR_SAMSUNG is not set
 # CONFIG_NET_VENDOR_SEEQ is not set
 # CONFIG_NET_VENDOR_SMSC is not set
 # CONFIG_NET_VENDOR_STMICRO is not set
diff --git a/arch/m68k/configs/sun3_defconfig b/arch/m68k/configs/sun3_defconfig
index 7bca0f464521..f4e88d1c7472 100644
--- a/arch/m68k/configs/sun3_defconfig
+++ b/arch/m68k/configs/sun3_defconfig
@@ -152,6 +152,7 @@ CONFIG_IP_SET_BITMAP_IP=m
 CONFIG_IP_SET_BITMAP_IPMAC=m
 CONFIG_IP_SET_BITMAP_PORT=m
 CONFIG_IP_SET_HASH_IP=m
+CONFIG_IP_SET_HASH_IPMARK=m
 CONFIG_IP_SET_HASH_IPPORT=m
 CONFIG_IP_SET_HASH_IPPORTIP=m
 CONFIG_IP_SET_HASH_IPPORTNET=m
@@ -220,6 +221,7 @@ CONFIG_DNS_RESOLVER=y
 CONFIG_BATMAN_ADV=m
 CONFIG_BATMAN_ADV_DAT=y
 CONFIG_BATMAN_ADV_NC=y
+CONFIG_BATMAN_ADV_MCAST=y
 CONFIG_NETLINK_DIAG=m
 CONFIG_NET_MPLS_GSO=m
 # CONFIG_WIRELESS is not set
@@ -257,6 +259,7 @@ CONFIG_DM_CRYPT=m
 CONFIG_DM_SNAPSHOT=m
 CONFIG_DM_THIN_PROVISIONING=m
 CONFIG_DM_CACHE=m
+CONFIG_DM_ERA=m
 CONFIG_DM_MIRROR=m
 CONFIG_DM_RAID=m
 CONFIG_DM_ZERO=m
@@ -281,11 +284,11 @@ CONFIG_NETCONSOLE_DYNAMIC=y
 CONFIG_VETH=m
 CONFIG_SUN3LANCE=y
 # CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_CADENCE is not set
 CONFIG_SUN3_82586=y
 # CONFIG_NET_VENDOR_MARVELL is not set
 # CONFIG_NET_VENDOR_MICREL is not set
 # CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
 # CONFIG_NET_VENDOR_SEEQ is not set
 # CONFIG_NET_VENDOR_STMICRO is not set
 # CONFIG_NET_VENDOR_SUN is not set
diff --git a/arch/m68k/configs/sun3x_defconfig b/arch/m68k/configs/sun3x_defconfig
index 317f3e1fec95..49f4032c1ad6 100644
--- a/arch/m68k/configs/sun3x_defconfig
+++ b/arch/m68k/configs/sun3x_defconfig
@@ -152,6 +152,7 @@ CONFIG_IP_SET_BITMAP_IP=m
 CONFIG_IP_SET_BITMAP_IPMAC=m
 CONFIG_IP_SET_BITMAP_PORT=m
 CONFIG_IP_SET_HASH_IP=m
+CONFIG_IP_SET_HASH_IPMARK=m
 CONFIG_IP_SET_HASH_IPPORT=m
 CONFIG_IP_SET_HASH_IPPORTIP=m
 CONFIG_IP_SET_HASH_IPPORTNET=m
@@ -220,6 +221,7 @@ CONFIG_DNS_RESOLVER=y
 CONFIG_BATMAN_ADV=m
 CONFIG_BATMAN_ADV_DAT=y
 CONFIG_BATMAN_ADV_NC=y
+CONFIG_BATMAN_ADV_MCAST=y
 CONFIG_NETLINK_DIAG=m
 CONFIG_NET_MPLS_GSO=m
 # CONFIG_WIRELESS is not set
@@ -257,6 +259,7 @@ CONFIG_DM_CRYPT=m
 CONFIG_DM_SNAPSHOT=m
 CONFIG_DM_THIN_PROVISIONING=m
 CONFIG_DM_CACHE=m
+CONFIG_DM_ERA=m
 CONFIG_DM_MIRROR=m
 CONFIG_DM_RAID=m
 CONFIG_DM_ZERO=m
@@ -281,12 +284,12 @@ CONFIG_NETCONSOLE_DYNAMIC=y
 CONFIG_VETH=m
 CONFIG_SUN3LANCE=y
 # CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_CADENCE is not set
 # CONFIG_NET_VENDOR_BROADCOM is not set
 # CONFIG_NET_VENDOR_INTEL is not set
 # CONFIG_NET_VENDOR_MARVELL is not set
 # CONFIG_NET_VENDOR_MICREL is not set
 # CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
 # CONFIG_NET_VENDOR_SEEQ is not set
 # CONFIG_NET_VENDOR_STMICRO is not set
 # CONFIG_NET_VENDOR_VIA is not set
diff --git a/arch/m68k/hp300/config.c b/arch/m68k/hp300/config.c
index 2e5a787ea11b..a9befe65adc4 100644
--- a/arch/m68k/hp300/config.c
+++ b/arch/m68k/hp300/config.c
@@ -87,7 +87,7 @@ int __init hp300_parse_bootinfo(const struct bi_record *record)
                /* serial port address: ignored here */
                break;
-        default:
+        default:
                unknown = 1;
        }
@@ -262,11 +262,12 @@ void __init config_hp300(void)
 #endif
        mach_max_dma_address = 0xffffffff;
-        if (hp300_model >= HP_330 && hp300_model <= HP_433S && hp300_model != HP_350) {
+        if (hp300_model >= HP_330 && hp300_model <= HP_433S &&
-                printk(KERN_INFO "Detected HP9000 model %s\n", hp300_models[hp300_model-HP_320]);
+            hp300_model != HP_350) {
+                pr_info("Detected HP9000 model %s\n",
+                        hp300_models[hp300_model-HP_320]);
                strcat(hp300_model_name, hp300_models[hp300_model-HP_320]);
-        }
+        } else {
-        else {
                panic("Unknown HP9000 Model");
        }
 #ifdef CONFIG_SERIAL_8250_CONSOLE
diff --git a/arch/m68k/include/asm/atari_stram.h b/arch/m68k/include/asm/atari_stram.h
index 62e27598af91..4e771c22d6a9 100644
--- a/arch/m68k/include/asm/atari_stram.h
+++ b/arch/m68k/include/asm/atari_stram.h
@@ -8,6 +8,8 @@
 /* public interface */
 void *atari_stram_alloc(unsigned long size, const char *owner);
 void atari_stram_free(void *);
+void *atari_stram_to_virt(unsigned long phys);
+unsigned long atari_stram_to_phys(void *);
 /* functions called internally by other parts of the kernel */
 void atari_stram_init(void);
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index 9d38b73989eb..33afa56ad47a 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -4,7 +4,7 @@
 #include <uapi/asm/unistd.h>
-#define NR_syscalls             351
+#define NR_syscalls             352
 #define __ARCH_WANT_OLD_READDIR
 #define __ARCH_WANT_OLD_STAT
diff --git a/arch/m68k/include/uapi/asm/unistd.h b/arch/m68k/include/uapi/asm/unistd.h
index b932dd470041..9cd82fbc7817 100644
--- a/arch/m68k/include/uapi/asm/unistd.h
+++ b/arch/m68k/include/uapi/asm/unistd.h
@@ -356,5 +356,6 @@
 #define __NR_finit_module       348
 #define __NR_sched_setattr      349
 #define __NR_sched_getattr      350
+#define __NR_renameat2          351
 #endif /* _UAPI_ASM_M68K_UNISTD_H_ */
diff --git a/arch/m68k/kernel/Makefile b/arch/m68k/kernel/Makefile
index 2d5d9be16273..e47778f8588d 100644
--- a/arch/m68k/kernel/Makefile
+++ b/arch/m68k/kernel/Makefile
@@ -25,3 +25,5 @@ obj-$(CONFIG_HAS_DMA)	+= dma.o
 obj-$(CONFIG_KEXEC)             += machine_kexec.o relocate_kernel.o
 obj-$(CONFIG_BOOTINFO_PROC)     += bootinfo_proc.o
+obj-$(CONFIG_EARLY_PRINTK)      += early_printk.o
diff --git a/arch/m68k/kernel/early_printk.c b/arch/m68k/kernel/early_printk.c
new file mode 100644
index 000000000000..ff9708d71921
--- /dev/null
+++ b/arch/m68k/kernel/early_printk.c
@@ -0,0 +1,67 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 2014 Finn Thain
+ */
+#include <linux/kernel.h>
+#include <linux/console.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <asm/setup.h>
+extern void mvme16x_cons_write(struct console *co,
+                               const char *str, unsigned count);
+asmlinkage void __init debug_cons_nputs(const char *s, unsigned n);
+static void __ref debug_cons_write(struct console *c,
+                                   const char *s, unsigned n)
+{
+#if !(defined(CONFIG_SUN3)   || defined(CONFIG_M68360) || \
+      defined(CONFIG_M68000) || defined(CONFIG_COLDFIRE))
+        if (MACH_IS_MVME16x)
+                mvme16x_cons_write(c, s, n);
+        else
+                debug_cons_nputs(s, n);
+#endif
+}
+static struct console early_console_instance = {
+        .name  = "debug",
+        .write = debug_cons_write,
+        .flags = CON_PRINTBUFFER | CON_BOOT,
+        .index = -1
+};
+static int __init setup_early_printk(char *buf)
+{
+        if (early_console || buf)
+                return 0;
+        early_console = &early_console_instance;
+        register_console(early_console);
+        return 0;
+}
+early_param("earlyprintk", setup_early_printk);
+/*
+ * debug_cons_nputs() defined in arch/m68k/kernel/head.S cannot be called
+ * after init sections are discarded (for platforms that use it).
+ */
+#if !(defined(CONFIG_SUN3)   || defined(CONFIG_M68360) || \
+      defined(CONFIG_M68000) || defined(CONFIG_COLDFIRE))
+static int __init unregister_early_console(void)
+{
+        if (!early_console || MACH_IS_MVME16x)
+                return 0;
+        return unregister_console(early_console);
+}
+late_initcall(unregister_early_console);
+#endif
diff --git a/arch/m68k/kernel/head.S b/arch/m68k/kernel/head.S
index 3ab329b88521..dbb118e1a4e0 100644
--- a/arch/m68k/kernel/head.S
+++ b/arch/m68k/kernel/head.S
@@ -153,7 +153,7 @@
 * ------------
 *      The console is also able to be turned off.  The console in head.S
 * is specifically for debugging and can be very useful.  It is surrounded by
- * #ifdef CONSOLE/#endif clauses so it doesn't have to ship in known-good
+ * #ifdef / #endif clauses so it doesn't have to ship in known-good
 * kernels.  It's basic algorithm is to determine the size of the screen
 * (in height/width and bit depth) and then use that information for
 * displaying an 8x8 font or an 8x16 (widthxheight).  I prefer the 8x8 for
@@ -198,9 +198,8 @@
 * CONFIG_xxx:  These are the obvious machine configuration defines created
 * during configuration.  These are defined in autoconf.h.
 *
- * CONSOLE:     There is support for head.S console in this file.  This
+ * CONSOLE_DEBUG:  Only supports a Mac frame buffer but could easily be
- * console can talk to a Mac frame buffer, but could easily be extrapolated
+ * extended to support other platforms.
- * to extend it to support other platforms.
 *
 * TEST_MMU:    This is a test harness for running on any given machine but
 * getting an MMU dump for another class of machine.  The classes of machines
@@ -222,7 +221,7 @@
 * MMU_PRINT:   There is a routine built into head.S that can display the
 * MMU data structures.  It outputs its result through the serial_putc
 * interface.  So where ever that winds up driving data, that's where the
- * mmu struct will appear.  On the Macintosh that's typically the console.
+ * mmu struct will appear.
 *
 * SERIAL_DEBUG:        There are a series of putc() macro statements
 * scattered through out the code to give progress of status to the
@@ -250,8 +249,8 @@
 * USE_MFP:     Use the ST-MFP port (Modem1) for serial debug.
 *
 * Macintosh constants:
- * MAC_USE_SCC_A: Use SCC port A (modem) for serial debug and early console.
+ * MAC_USE_SCC_A: Use SCC port A (modem) for serial debug.
- * MAC_USE_SCC_B: Use SCC port B (printer) for serial debug and early console.
+ * MAC_USE_SCC_B: Use SCC port B (printer) for serial debug.
 */
 #include <linux/linkage.h>
@@ -268,27 +267,17 @@
 #include <asm/pgtable.h>
 #include <asm/page.h>
 #include <asm/asm-offsets.h>
 #ifdef CONFIG_MAC
+#  include <asm/machw.h>
-#include <asm/machw.h>
-#ifdef CONFIG_FRAMEBUFFER_CONSOLE
-#define CONSOLE
 #endif
 #ifdef CONFIG_EARLY_PRINTK
-#define SERIAL_DEBUG
+#  define SERIAL_DEBUG
-#else
+#  if defined(CONFIG_MAC) && defined(CONFIG_FONT_SUPPORT)
-#undef SERIAL_DEBUG
+#    define CONSOLE_DEBUG
+#  endif
 #endif
-#else /* !CONFIG_MAC */
-#define SERIAL_DEBUG
-#endif /* !CONFIG_MAC */
 #undef MMU_PRINT
 #undef MMU_NOCACHE_KERNEL
 #undef DEBUG
@@ -303,6 +292,7 @@
 .globl kernel_pg_dir
 .globl availmem
+.globl m68k_init_mapped_size
 .globl m68k_pgtable_cachemode
 .globl m68k_supervisor_cachemode
 #ifdef CONFIG_MVME16x
@@ -480,22 +470,21 @@ func_define	serial_putc,1
 func_define     console_putc,1
 func_define     console_init
-func_define     console_put_stats
 func_define     console_put_penguin
 func_define     console_plot_pixel,3
 func_define     console_scroll
 .macro  putc    ch
-#if defined(CONSOLE) || defined(SERIAL_DEBUG)
+#if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG)
        pea     \ch
 #endif
-#ifdef CONSOLE
+#ifdef CONSOLE_DEBUG
        func_call       console_putc
 #endif
 #ifdef SERIAL_DEBUG
        func_call       serial_putc
 #endif
-#if defined(CONSOLE) || defined(SERIAL_DEBUG)
+#if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG)
        addql   #4,%sp
 #endif
 .endm
@@ -515,7 +504,7 @@ func_define	putn,1
 .endm
 .macro  puts            string
-#if defined(CONSOLE) || defined(SERIAL_DEBUG)
+#if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG)
        __INITDATA
 .Lstr\@:
        .string "\string"
@@ -651,11 +640,9 @@ ENTRY(__start)
        lea     %pc@(L(mac_rowbytes)),%a1
        movel   %a0@,%a1@
-#ifdef SERIAL_DEBUG
        get_bi_record   BI_MAC_SCCBASE
        lea     %pc@(L(mac_sccbase)),%a1
        movel   %a0@,%a1@
-#endif
 L(test_notmac):
 #endif /* CONFIG_MAC */
@@ -885,13 +872,12 @@ L(nothp):
 */
 #ifdef CONFIG_MAC
        is_not_mac(L(nocon))
-#  ifdef CONSOLE
+#  ifdef CONSOLE_DEBUG
        console_init
 #    ifdef CONFIG_LOGO
        console_put_penguin
 #    endif /* CONFIG_LOGO */
-        console_put_stats
+#  endif /* CONSOLE_DEBUG */
-#  endif /* CONSOLE */
 L(nocon):
 #endif /* CONFIG_MAC */
@@ -922,10 +908,21 @@ L(nocon):
 *
 *      This block of code does what's necessary to map in the various kinds
 *      of machines for execution of Linux.
- *      First map the first 4 MB of kernel code & data
+ *      First map the first 4, 8, or 16 MB of kernel code & data
 */
-        mmu_map #PAGE_OFFSET,%pc@(L(phys_kernel_start)),#4*1024*1024,\
+        get_bi_record BI_MEMCHUNK
+        movel   %a0@(4),%d0
+        movel   #16*1024*1024,%d1
+        cmpl    %d0,%d1
+        jls     1f
+        lsrl    #1,%d1
+        cmpl    %d0,%d1
+        jls     1f
+        lsrl    #1,%d1
+1:
+        movel   %d1,m68k_init_mapped_size
+        mmu_map #PAGE_OFFSET,%pc@(L(phys_kernel_start)),%d1,\
                %pc@(m68k_supervisor_cachemode)
        putc    'C'
@@ -1396,15 +1393,13 @@ L(mmu_fixup_done):
        andl    L(mac_videobase),%d0
        addl    #VIDEOMEMBASE,%d0
        movel   %d0,L(mac_videobase)
-#if defined(CONSOLE)
+#ifdef CONSOLE_DEBUG
        movel   %pc@(L(phys_kernel_start)),%d0
        subl    #PAGE_OFFSET,%d0
        subl    %d0,L(console_font)
        subl    %d0,L(console_font_data)
 #endif
-#ifdef SERIAL_DEBUG
        orl     #0x50000000,L(mac_sccbase)
-#endif
 1:
 #endif
@@ -2734,7 +2729,12 @@ func_return	get_new_page
 */
 #ifdef CONFIG_MAC
+/* You may define either or both of these. */
+#define MAC_USE_SCC_A /* Modem port */
+#define MAC_USE_SCC_B /* Printer port */
+#if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
+/* Initialisation table for SCC with 3.6864 MHz PCLK */
 L(scc_initable_mac):
        .byte   4,0x44          /* x16, 1 stopbit, no parity */
        .byte   3,0xc0          /* receiver: 8 bpc */
@@ -2748,6 +2748,7 @@ L(scc_initable_mac):
        .byte   -1
        .even
 #endif
+#endif /* CONFIG_MAC */
 #ifdef CONFIG_ATARI
 /* #define USE_PRINTER */
@@ -2756,14 +2757,12 @@ L(scc_initable_mac):
 #define USE_MFP
 #if defined(USE_SCC_A) || defined(USE_SCC_B)
-#define USE_SCC
+/* Initialisation table for SCC with 7.9872 MHz PCLK */
-/* Initialisation table for SCC */
+/* PCLK == 8.0539 gives baud == 9680.1 */
-L(scc_initable):
+L(scc_initable_atari):
-        .byte   9,12            /* Reset */
        .byte   4,0x44          /* x16, 1 stopbit, no parity */
        .byte   3,0xc0          /* receiver: 8 bpc */
        .byte   5,0xe2          /* transmitter: 8 bpc, assert dtr/rts */
-        .byte   9,0             /* no interrupts */
        .byte   10,0            /* NRZ */
        .byte   11,0x50         /* use baud rate generator */
        .byte   12,24,13,0      /* 9600 baud */
@@ -2812,7 +2811,7 @@ LMFP_UDR     = 0xfffa2f
 */
 /*
- * Initialize serial port hardware for 9600/8/1
+ * Initialize serial port hardware
 */
 func_start      serial_init,%d0/%d1/%a0/%a1
        /*
@@ -2822,7 +2821,7 @@ func_start	serial_init,%d0/%d1/%a0/%a1
         *              d0 = boot info offset
         *      CONFIG_ATARI
         *              a0 = address of SCC
-         *              a1 = Liobase address/address of scc_initable
+         *              a1 = Liobase address/address of scc_initable_atari
         *              d0 = init data for serial port
         *      CONFIG_MAC
         *              a0 = address of SCC
@@ -2843,6 +2842,7 @@ func_start	serial_init,%d0/%d1/%a0/%a1
 |       movew   #61,CUSTOMBASE+C_SERPER-ZTWOBASE
 1:
 #endif
 #ifdef CONFIG_ATARI
        is_not_atari(4f)
        movel   %pc@(L(iobase)),%a1
@@ -2857,9 +2857,21 @@ func_start	serial_init,%d0/%d1/%a0/%a1
        moveb   %a1@(LPSG_READ),%d0
        bset    #5,%d0
        moveb   %d0,%a1@(LPSG_WRITE)
-#elif defined(USE_SCC)
+#elif defined(USE_SCC_A) || defined(USE_SCC_B)
        lea     %a1@(LSCC_CTRL),%a0
-        lea     %pc@(L(scc_initable)),%a1
+        /* Reset SCC register pointer */
+        moveb   %a0@,%d0
+        /* Reset SCC device: write register pointer then register value */
+        moveb   #9,%a0@
+        moveb   #0xc0,%a0@
+        /* Wait for 5 PCLK cycles, which is about 63 CPU cycles */
+        /* 5 / 7.9872 MHz = approx. 0.63 us = 63 / 100 MHz */
+        movel   #32,%d0
+2:
+        subq    #1,%d0
+        jne     2b
+        /* Initialize channel */
+        lea     %pc@(L(scc_initable_atari)),%a1
 2:      moveb   %a1@+,%d0
        jmi     3f
        moveb   %d0,%a0@
@@ -2877,21 +2889,14 @@ func_start	serial_init,%d0/%d1/%a0/%a1
        jra     L(serial_init_done)
 4:
 #endif
 #ifdef CONFIG_MAC
        is_not_mac(L(serial_init_not_mac))
+#if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
-#ifdef SERIAL_DEBUG
-/* You may define either or both of these. */
-#define MAC_USE_SCC_A /* Modem port */
-#define MAC_USE_SCC_B /* Printer port */
 #define mac_scc_cha_b_ctrl_offset       0x0
 #define mac_scc_cha_a_ctrl_offset       0x2
 #define mac_scc_cha_b_data_offset       0x4
 #define mac_scc_cha_a_data_offset       0x6
-#if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
        movel   %pc@(L(mac_sccbase)),%a0
        /* Reset SCC register pointer */
        moveb   %a0@(mac_scc_cha_a_ctrl_offset),%d0
@@ -2905,7 +2910,6 @@ func_start	serial_init,%d0/%d1/%a0/%a1
        subq    #1,%d0
        jne     5b
 #endif
 #ifdef MAC_USE_SCC_A
        /* Initialize channel A */
        lea     %pc@(L(scc_initable_mac)),%a1
@@ -2916,7 +2920,6 @@ func_start	serial_init,%d0/%d1/%a0/%a1
        jra     5b
 6:
 #endif  /* MAC_USE_SCC_A */
 #ifdef MAC_USE_SCC_B
        /* Initialize channel B */
        lea     %pc@(L(scc_initable_mac)),%a1
@@ -2927,9 +2930,6 @@ func_start	serial_init,%d0/%d1/%a0/%a1
        jra     7b
 8:
 #endif  /* MAC_USE_SCC_B */
-#endif  /* SERIAL_DEBUG */
        jra     L(serial_init_done)
 L(serial_init_not_mac):
 #endif  /* CONFIG_MAC */
@@ -2959,6 +2959,15 @@ L(serial_init_not_mac):
 2:
 #endif
+#ifdef CONFIG_MVME16x
+        is_not_mvme16x(L(serial_init_not_mvme16x))
+        moveb   #0x10,M167_PCSCCMICR
+        moveb   #0x10,M167_PCSCCTICR
+        moveb   #0x10,M167_PCSCCRICR
+        jra     L(serial_init_done)
+L(serial_init_not_mvme16x):
+#endif
 #ifdef CONFIG_APOLLO
 /* We count on the PROM initializing SIO1 */
 #endif
@@ -2998,27 +3007,19 @@ func_start	serial_putc,%d0/%d1/%a0/%a1
 #ifdef CONFIG_MAC
        is_not_mac(5f)
-#ifdef SERIAL_DEBUG
 #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
        movel   %pc@(L(mac_sccbase)),%a1
 #endif
 #ifdef MAC_USE_SCC_A
 3:      btst    #2,%a1@(mac_scc_cha_a_ctrl_offset)
        jeq     3b
        moveb   %d0,%a1@(mac_scc_cha_a_data_offset)
 #endif  /* MAC_USE_SCC_A */
 #ifdef MAC_USE_SCC_B
 4:      btst    #2,%a1@(mac_scc_cha_b_ctrl_offset)
        jeq     4b
        moveb   %d0,%a1@(mac_scc_cha_b_data_offset)
 #endif  /* MAC_USE_SCC_B */
-#endif  /* SERIAL_DEBUG */
        jra     L(serial_putc_done)
 5:
 #endif  /* CONFIG_MAC */
@@ -3039,7 +3040,7 @@ func_start	serial_putc,%d0/%d1/%a0/%a1
        nop
        bset    #5,%d0
        moveb   %d0,%a1@(LPSG_WRITE)
-#elif defined(USE_SCC)
+#elif defined(USE_SCC_A) || defined(USE_SCC_B)
 3:      btst    #2,%a1@(LSCC_CTRL)
        jeq     3b
        moveb   %d0,%a1@(LSCC_DATA)
@@ -3195,7 +3196,7 @@ func_start	puts,%d0/%a0
        movel   ARG1,%a0
        jra     2f
 1:
-#ifdef CONSOLE
+#ifdef CONSOLE_DEBUG
        console_putc    %d0
 #endif
 #ifdef SERIAL_DEBUG
@@ -3224,7 +3225,7 @@ func_start	putn,%d0-%d2
        jls     2f
        addb    #'A'-('9'+1),%d2
 2:
-#ifdef CONSOLE
+#ifdef CONSOLE_DEBUG
        console_putc    %d2
 #endif
 #ifdef SERIAL_DEBUG
@@ -3234,21 +3235,19 @@ func_start	putn,%d0-%d2
 func_return     putn
-#ifdef CONFIG_MAC
+#ifdef CONFIG_EARLY_PRINTK
 /*
- *      mac_early_print
- *
 *      This routine takes its parameters on the stack.  It then
 *      turns around and calls the internal routines.  This routine
 *      is used by the boot console.
 *
 *      The calling parameters are:
- *              void mac_early_print(const char *str, unsigned length);
+ *              void debug_cons_nputs(const char *str, unsigned length)
 *
 *      This routine does NOT understand variable arguments only
 *      simple strings!
 */
-ENTRY(mac_early_print)
+ENTRY(debug_cons_nputs)
        moveml  %d0/%d1/%a0,%sp@-
        movew   %sr,%sp@-
        ori     #0x0700,%sr
@@ -3256,7 +3255,7 @@ ENTRY(mac_early_print)
        movel   %sp@(22),%d1            /* fetch parameter */
        jra     2f
 1:
-#ifdef CONSOLE
+#ifdef CONSOLE_DEBUG
        console_putc    %d0
 #endif
 #ifdef SERIAL_DEBUG
@@ -3270,7 +3269,7 @@ ENTRY(mac_early_print)
        movew   %sp@+,%sr
        moveml  %sp@+,%d0/%d1/%a0
        rts
-#endif /* CONFIG_MAC */
+#endif /* CONFIG_EARLY_PRINTK */
 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
 func_start      set_leds,%d0/%a0
@@ -3292,7 +3291,7 @@ func_start	set_leds,%d0/%a0
 func_return     set_leds
 #endif
-#ifdef CONSOLE
+#ifdef CONSOLE_DEBUG
 /*
 *      For continuity, see the data alignment
 *      to which this structure is tied.
@@ -3396,43 +3395,6 @@ L(console_clear_loop):
 1:
 func_return     console_init
-func_start      console_put_stats,%a0/%d7
-        /*
-         *      Some of the register usage that follows
-         *              a0 = pointer to boot_info
-         *              d7 = value of boot_info fields
-         */
-        puts    "\nMacLinux\n"
-#ifdef SERIAL_DEBUG
-        puts    "\n vidaddr:"
-        putn    %pc@(L(mac_videobase))          /* video addr. */
-        puts    "\n  _stext:"
-        lea     %pc@(_stext),%a0
-        putn    %a0
-        puts    "\nbootinfo:"
-        lea     %pc@(_end),%a0
-        putn    %a0
-        puts    "\n   cpuid:"
-        putn    %pc@(L(cputype))
-#  ifdef CONFIG_MAC
-        puts    "\n sccbase:"
-        putn    %pc@(L(mac_sccbase))
-#  endif
-#  ifdef MMU_PRINT
-        putc    '\n'
-        jbsr    mmu_print_machine_cpu_types
-#  endif
-#endif /* SERIAL_DEBUG */
-        putc    '\n'
-func_return     console_put_stats
 #ifdef CONFIG_LOGO
 func_start      console_put_penguin,%a0-%a1/%d0-%d7
        /*
@@ -3774,12 +3736,15 @@ L(white_16):
 L(console_plot_pixel_exit):
 func_return     console_plot_pixel
-#endif /* CONSOLE */
+#endif /* CONSOLE_DEBUG */
 __INITDATA
        .align  4
+m68k_init_mapped_size:
+        .long   0
 #if defined(CONFIG_ATARI) || defined(CONFIG_AMIGA) || \
    defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
 L(custom):
@@ -3787,7 +3752,7 @@ L(iobase):
        .long 0
 #endif
-#if defined(CONSOLE)
+#ifdef CONSOLE_DEBUG
 L(console_globals):
        .long   0               /* cursor column */
        .long   0               /* cursor row */
@@ -3798,7 +3763,7 @@ L(console_font):
        .long   0               /* pointer to console font (struct font_desc) */
 L(console_font_data):
        .long   0               /* pointer to console font data */
-#endif /* CONSOLE */
+#endif /* CONSOLE_DEBUG */
 #if defined(MMU_PRINT)
 L(mmu_print_data):
@@ -3838,7 +3803,9 @@ M167_CYIER = 0xfff45011
 M167_CYLICR = 0xfff45026
 M167_CYTEOIR = 0xfff45085
 M167_CYTDR = 0xfff450f8
+M167_PCSCCMICR = 0xfff4201d
 M167_PCSCCTICR = 0xfff4201e
+M167_PCSCCRICR = 0xfff4201f
 M167_PCTPIACKR = 0xfff42025
 #endif
@@ -3856,10 +3823,8 @@ L(mac_dimensions):
        .long   0
 L(mac_rowbytes):
        .long   0
-#ifdef SERIAL_DEBUG
 L(mac_sccbase):
        .long   0
-#endif
 #endif /* CONFIG_MAC */
 #if defined (CONFIG_APOLLO)
diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S
index b6223dc41d82..501e10212789 100644
--- a/arch/m68k/kernel/syscalltable.S
+++ b/arch/m68k/kernel/syscalltable.S
@@ -371,4 +371,5 @@ ENTRY(sys_call_table)
        .long sys_finit_module
        .long sys_sched_setattr
        .long sys_sched_getattr         /* 350 */
+        .long sys_renameat2
diff --git a/arch/m68k/mac/config.c b/arch/m68k/mac/config.c
index 982c3fe73c4a..a471eab1a4dd 100644
--- a/arch/m68k/mac/config.c
+++ b/arch/m68k/mac/config.c
@@ -71,31 +71,6 @@ static void mac_get_model(char *str);
 static void mac_identify(void);
 static void mac_report_hardware(void);
-#ifdef CONFIG_EARLY_PRINTK
-asmlinkage void __init mac_early_print(const char *s, unsigned n);
-static void __init mac_early_cons_write(struct console *con,
-                                 const char *s, unsigned n)
-{
-        mac_early_print(s, n);
-}
-static struct console __initdata mac_early_cons = {
-        .name  = "early",
-        .write = mac_early_cons_write,
-        .flags = CON_PRINTBUFFER | CON_BOOT,
-        .index = -1
-};
-int __init mac_unregister_early_cons(void)
-{
-        /* mac_early_print can't be used after init sections are discarded */
-        return unregister_console(&mac_early_cons);
-}
-late_initcall(mac_unregister_early_cons);
-#endif
 static void __init mac_sched_init(irq_handler_t vector)
 {
        via_init_clock(vector);
@@ -190,10 +165,6 @@ void __init config_mac(void)
        mach_beep = mac_mksound;
 #endif
-#ifdef CONFIG_EARLY_PRINTK
-        register_console(&mac_early_cons);
-#endif
        /*
         * Determine hardware present
         */
diff --git a/arch/m68k/mm/motorola.c b/arch/m68k/mm/motorola.c
index 7d4024432163..b958916e5eac 100644
--- a/arch/m68k/mm/motorola.c
+++ b/arch/m68k/mm/motorola.c
@@ -45,7 +45,7 @@ EXPORT_SYMBOL(mm_cachebits);
 #endif
 /* size of memory already mapped in head.S */
-#define INIT_MAPPED_SIZE        (4UL<<20)
+extern __initdata unsigned long m68k_init_mapped_size;
 extern unsigned long availmem;
@@ -271,10 +271,12 @@ void __init paging_init(void)
         */
        addr = m68k_memory[0].addr;
        size = m68k_memory[0].size;
-        free_bootmem_node(NODE_DATA(0), availmem, min(INIT_MAPPED_SIZE, size) - (availmem - addr));
+        free_bootmem_node(NODE_DATA(0), availmem,
+                          min(m68k_init_mapped_size, size) - (availmem - addr));
        map_node(0);
-        if (size > INIT_MAPPED_SIZE)
+        if (size > m68k_init_mapped_size)
-                free_bootmem_node(NODE_DATA(0), addr + INIT_MAPPED_SIZE, size - INIT_MAPPED_SIZE);
+                free_bootmem_node(NODE_DATA(0), addr + m68k_init_mapped_size,
+                                  size - m68k_init_mapped_size);
        for (i = 1; i < m68k_num_memory; i++)
                map_node(i);
diff --git a/arch/m68k/mvme16x/config.c b/arch/m68k/mvme16x/config.c
index eab7d342757e..a53803cc66cd 100644
--- a/arch/m68k/mvme16x/config.c
+++ b/arch/m68k/mvme16x/config.c
@@ -213,7 +213,7 @@ static void __init mvme16x_init_IRQ (void)
 #define CySCRH          (0x22)
 #define CyTFTC          (0x80)
-static void cons_write(struct console *co, const char *str, unsigned count)
+void mvme16x_cons_write(struct console *co, const char *str, unsigned count)
 {
        volatile unsigned char *base_addr = (u_char *)CD2401_ADDR;
        volatile u_char sink;
@@ -268,20 +268,6 @@ static void cons_write(struct console *co, const char *str, unsigned count)
        base_addr[CyIER] = ier;
 }
-static struct console cons_info =
-{
-        .name   = "sercon",
-        .write  = cons_write,
-        .flags  = CON_PRINTBUFFER | CON_BOOT,
-        .index  = -1,
-};
-static void __init mvme16x_early_console(void)
-{
-        register_console(&cons_info);
-        printk(KERN_INFO "MVME16x: early console registered\n");
-}
 #endif
 void __init config_mvme16x(void)
@@ -336,16 +322,6 @@ void __init config_mvme16x(void)
    else
    {
        mvme16x_config = MVME16x_CONFIG_GOT_LP | MVME16x_CONFIG_GOT_CD2401;
-        /* Dont allow any interrupts from the CD2401 until the interrupt */
-        /* handlers are installed                                        */
-        pcc2chip[PccSCCMICR] = 0x10;
-        pcc2chip[PccSCCTICR] = 0x10;
-        pcc2chip[PccSCCRICR] = 0x10;
-#ifdef CONFIG_EARLY_PRINTK
-        mvme16x_early_console();
-#endif
    }
 }
diff --git a/arch/metag/include/asm/barrier.h b/arch/metag/include/asm/barrier.h
index 5d6b4b407dda..2d6f0de77325 100644
--- a/arch/metag/include/asm/barrier.h
+++ b/arch/metag/include/asm/barrier.h
@@ -15,6 +15,7 @@ static inline void wr_fence(void)
        volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_FENCE;
        barrier();
        *flushptr = 0;
+        barrier();
 }
 #else /* CONFIG_METAG_META21 */
@@ -35,6 +36,7 @@ static inline void wr_fence(void)
        *flushptr = 0;
        *flushptr = 0;
        *flushptr = 0;
+        barrier();
 }
 #endif /* !CONFIG_METAG_META21 */
@@ -68,6 +70,7 @@ static inline void fence(void)
        volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_ATOMIC_UNLOCK;
        barrier();
        *flushptr = 0;
+        barrier();
 }
 #define smp_mb()        fence()
 #define smp_rmb()       fence()
diff --git a/arch/metag/include/asm/processor.h b/arch/metag/include/asm/processor.h
index f16477d1f571..a8a37477c66e 100644
--- a/arch/metag/include/asm/processor.h
+++ b/arch/metag/include/asm/processor.h
@@ -22,6 +22,8 @@
 /* Add an extra page of padding at the top of the stack for the guard page. */
 #define STACK_TOP       (TASK_SIZE - PAGE_SIZE)
 #define STACK_TOP_MAX   STACK_TOP
+/* Maximum virtual space for stack */
+#define STACK_SIZE_MAX  (CONFIG_MAX_STACK_SIZE_MB*1024*1024)
 /* This decides where the kernel will search for a free chunk of vm
 * space during mmap's.
diff --git a/arch/metag/include/uapi/asm/Kbuild b/arch/metag/include/uapi/asm/Kbuild
index 84e09feb4d54..ab78be2b6eb0 100644
--- a/arch/metag/include/uapi/asm/Kbuild
+++ b/arch/metag/include/uapi/asm/Kbuild
@@ -4,11 +4,11 @@ include include/uapi/asm-generic/Kbuild.asm
 header-y += byteorder.h
 header-y += ech.h
 header-y += ptrace.h
-header-y += resource.h
 header-y += sigcontext.h
 header-y += siginfo.h
 header-y += swab.h
 header-y += unistd.h
 generic-y += mman.h
+generic-y += resource.h
 generic-y += setup.h
diff --git a/arch/metag/include/uapi/asm/resource.h b/arch/metag/include/uapi/asm/resource.h
deleted file mode 100644
index 526d23cc3054..000000000000
--- a/arch/metag/include/uapi/asm/resource.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef _UAPI_METAG_RESOURCE_H
-#define _UAPI_METAG_RESOURCE_H
-#define _STK_LIM_MAX    (1 << 28)
-#include <asm-generic/resource.h>
-#endif /* _UAPI_METAG_RESOURCE_H */
diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h
index 935f9bec414a..335524040fff 100644
--- a/arch/microblaze/include/asm/pci.h
+++ b/arch/microblaze/include/asm/pci.h
@@ -44,11 +44,6 @@ struct pci_dev;
 */
 #define pcibios_assign_all_busses()     0
-static inline void pcibios_penalize_isa_irq(int irq, int active)
-{
-        /* We don't do dynamic PCI IRQ allocation */
-}
 #ifdef CONFIG_PCI
 extern void set_pci_dma_ops(struct dma_map_ops *dma_ops);
 extern struct dma_map_ops *get_pci_dma_ops(void);
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index 70996cc66aa2..a59de1bc1ce0 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
@@ -168,26 +168,6 @@ struct pci_controller *pci_find_hose_for_OF_device(struct device_node *node)
        return NULL;
 }
-static ssize_t pci_show_devspec(struct device *dev,
-                struct device_attribute *attr, char *buf)
-{
-        struct pci_dev *pdev;
-        struct device_node *np;
-        pdev = to_pci_dev(dev);
-        np = pci_device_to_OF_node(pdev);
-        if (np == NULL || np->full_name == NULL)
-                return 0;
-        return sprintf(buf, "%s", np->full_name);
-}
-static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL);
-/* Add sysfs properties */
-int pcibios_add_platform_entries(struct pci_dev *pdev)
-{
-        return device_create_file(&pdev->dev, &dev_attr_devspec);
-}
 void pcibios_set_master(struct pci_dev *dev)
 {
        /* No special bus mastering setup handling */
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 1a5b4032cb66..60a359cfa328 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -151,7 +151,7 @@ cflags-$(CONFIG_CPU_NEVADA)	+= $(call cc-option,-march=rm5200,-march=r5000) \
                        -Wa,--trap
 cflags-$(CONFIG_CPU_RM7000)     += $(call cc-option,-march=rm7000,-march=r5000) \
                        -Wa,--trap
-cflags-$(CONFIG_CPU_SB1)        += $(call cc-option,-march=sb1,-march=r5000) \
+cflags-$(CONFIG_CPU_SB1)        += $(call cc-option,-march=sb1 -mno-mdmx -mno-mips3d,-march=r5000) \
                        -Wa,--trap
 cflags-$(CONFIG_CPU_R8000)      += -march=r8000 -Wa,--trap
 cflags-$(CONFIG_CPU_R10000)     += $(call cc-option,-march=r10000,-march=r8000) \
diff --git a/arch/mips/dec/ecc-berr.c b/arch/mips/dec/ecc-berr.c
index 5abf4e894216..2a66e908f6a9 100644
--- a/arch/mips/dec/ecc-berr.c
+++ b/arch/mips/dec/ecc-berr.c
@@ -21,6 +21,7 @@
 #include <asm/addrspace.h>
 #include <asm/bootinfo.h>
 #include <asm/cpu.h>
+#include <asm/cpu-type.h>
 #include <asm/irq_regs.h>
 #include <asm/processor.h>
 #include <asm/ptrace.h>
diff --git a/arch/mips/dec/kn02xa-berr.c b/arch/mips/dec/kn02xa-berr.c
index f434b759e3b9..ec606363b806 100644
--- a/arch/mips/dec/kn02xa-berr.c
+++ b/arch/mips/dec/kn02xa-berr.c
@@ -19,6 +19,7 @@
 #include <linux/types.h>
 #include <asm/addrspace.h>
+#include <asm/cpu-type.h>
 #include <asm/irq_regs.h>
 #include <asm/ptrace.h>
 #include <asm/traps.h>
diff --git a/arch/mips/dec/prom/Makefile b/arch/mips/dec/prom/Makefile
index 064ae7a76bdc..ae73e42ac20b 100644
--- a/arch/mips/dec/prom/Makefile
+++ b/arch/mips/dec/prom/Makefile
@@ -6,4 +6,3 @@
 lib-y                   += init.o memory.o cmdline.o identify.o console.o
 lib-$(CONFIG_32BIT)     += locore.o
-lib-$(CONFIG_64BIT)     += call_o32.o
diff --git a/arch/mips/dec/prom/call_o32.S b/arch/mips/dec/prom/call_o32.S
deleted file mode 100644
index 8c8498159e43..000000000000
--- a/arch/mips/dec/prom/call_o32.S
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- *      O32 interface for the 64 (or N32) ABI.
- *
- *      Copyright (C) 2002  Maciej W. Rozycki
- *
- *      This program is free software; you can redistribute it and/or
- *      modify it under the terms of the GNU General Public License
- *      as published by the Free Software Foundation; either version
- *      2 of the License, or (at your option) any later version.
- */
-#include <asm/asm.h>
-#include <asm/regdef.h>
-/* Maximum number of arguments supported.  Must be even!  */
-#define O32_ARGC        32
-/* Number of static registers we save.  */
-#define O32_STATC       11
-/* Frame size for both of the above.  */
-#define O32_FRAMESZ     (4 * O32_ARGC + SZREG * O32_STATC)
-                .text
-/*
- * O32 function call dispatcher, for interfacing 32-bit ROM routines.
- *
- * The standard 64 (N32) calling sequence is supported, with a0
- * holding a function pointer, a1-a7 -- its first seven arguments
- * and the stack -- remaining ones (up to O32_ARGC, including a1-a7).
- * Static registers, gp and fp are preserved, v0 holds a result.
- * This code relies on the called o32 function for sp and ra
- * restoration and thus both this dispatcher and the current stack
- * have to be placed in a KSEGx (or KUSEG) address space.  Any
- * pointers passed have to point to addresses within one of these
- * spaces as well.
- */
-NESTED(call_o32, O32_FRAMESZ, ra)
-                REG_SUBU        sp,O32_FRAMESZ
-                REG_S           ra,O32_FRAMESZ-1*SZREG(sp)
-                REG_S           fp,O32_FRAMESZ-2*SZREG(sp)
-                REG_S           gp,O32_FRAMESZ-3*SZREG(sp)
-                REG_S           s7,O32_FRAMESZ-4*SZREG(sp)
-                REG_S           s6,O32_FRAMESZ-5*SZREG(sp)
-                REG_S           s5,O32_FRAMESZ-6*SZREG(sp)
-                REG_S           s4,O32_FRAMESZ-7*SZREG(sp)
-                REG_S           s3,O32_FRAMESZ-8*SZREG(sp)
-                REG_S           s2,O32_FRAMESZ-9*SZREG(sp)
-                REG_S           s1,O32_FRAMESZ-10*SZREG(sp)
-                REG_S           s0,O32_FRAMESZ-11*SZREG(sp)
-                move            jp,a0
-                sll             a0,a1,zero
-                sll             a1,a2,zero
-                sll             a2,a3,zero
-                sll             a3,a4,zero
-                sw              a5,0x10(sp)
-                sw              a6,0x14(sp)
-                sw              a7,0x18(sp)
-                PTR_LA          t0,O32_FRAMESZ(sp)
-                PTR_LA          t1,0x1c(sp)
-                li              t2,O32_ARGC-7
-1:
-                lw              t3,(t0)
-                REG_ADDU        t0,SZREG
-                sw              t3,(t1)
-                REG_SUBU        t2,1
-                REG_ADDU        t1,4
-                bnez            t2,1b
-                jalr            jp
-                REG_L           s0,O32_FRAMESZ-11*SZREG(sp)
-                REG_L           s1,O32_FRAMESZ-10*SZREG(sp)
-                REG_L           s2,O32_FRAMESZ-9*SZREG(sp)
-                REG_L           s3,O32_FRAMESZ-8*SZREG(sp)
-                REG_L           s4,O32_FRAMESZ-7*SZREG(sp)
-                REG_L           s5,O32_FRAMESZ-6*SZREG(sp)
-                REG_L           s6,O32_FRAMESZ-5*SZREG(sp)
-                REG_L           s7,O32_FRAMESZ-4*SZREG(sp)
-                REG_L           gp,O32_FRAMESZ-3*SZREG(sp)
-                REG_L           fp,O32_FRAMESZ-2*SZREG(sp)
-                REG_L           ra,O32_FRAMESZ-1*SZREG(sp)
-                REG_ADDU        sp,O32_FRAMESZ
-                jr              ra
-END(call_o32)
diff --git a/arch/mips/fw/lib/call_o32.S b/arch/mips/fw/lib/call_o32.S
index b308b2a0613e..4703fe4dbd9a 100644
--- a/arch/mips/fw/lib/call_o32.S
+++ b/arch/mips/fw/lib/call_o32.S
@@ -1,7 +1,7 @@
 /*
 *      O32 interface for the 64 (or N32) ABI.
 *
- *      Copyright (C) 2002  Maciej W. Rozycki
+ *      Copyright (C) 2002, 2014  Maciej W. Rozycki
 *
 *      This program is free software; you can redistribute it and/or
 *      modify it under the terms of the GNU General Public License
@@ -12,28 +12,37 @@
 #include <asm/asm.h>
 #include <asm/regdef.h>
+/* O32 register size.  */
+#define O32_SZREG       4
 /* Maximum number of arguments supported.  Must be even!  */
 #define O32_ARGC        32
-/* Number of static registers we save.  */
+/* Number of static registers we save.  */
 #define O32_STATC       11
-/* Frame size for static register  */
+/* Argument area frame size.  */
-#define O32_FRAMESZ     (SZREG * O32_STATC)
+#define O32_ARGSZ       (O32_SZREG * O32_ARGC)
-/* Frame size on new stack */
+/* Static register save area frame size.  */
-#define O32_FRAMESZ_NEW (SZREG + 4 * O32_ARGC)
+#define O32_STATSZ      (SZREG * O32_STATC)
+/* Stack pointer register save area frame size.  */
+#define O32_SPSZ        SZREG
+/* Combined area frame size.  */
+#define O32_FRAMESZ     (O32_ARGSZ + O32_SPSZ + O32_STATSZ)
+/* Switched stack frame size.  */
+#define O32_NFRAMESZ    (O32_ARGSZ + O32_SPSZ)
                .text
 /*
 * O32 function call dispatcher, for interfacing 32-bit ROM routines.
 *
- * The standard 64 (N32) calling sequence is supported, with a0
+ * The standard 64 (N32) calling sequence is supported, with a0 holding
- * holding a function pointer, a1 a new stack pointer, a2-a7 -- its
+ * a function pointer, a1 a pointer to the new stack to call the
- * first six arguments and the stack -- remaining ones (up to O32_ARGC,
+ * function with or 0 if no stack switching is requested, a2-a7 -- the
- * including a2-a7). Static registers, gp and fp are preserved, v0 holds
+ * function call's first six arguments, and the stack -- the remaining
- * a result. This code relies on the called o32 function for sp and ra
+ * arguments (up to O32_ARGC, including a2-a7).  Static registers, gp
- * restoration and this dispatcher has to be placed in a KSEGx (or KUSEG)
+ * and fp are preserved, v0 holds the result.  This code relies on the
- * address space.  Any pointers passed have to point to addresses within
+ * called o32 function for sp and ra restoration and this dispatcher has
- * one of these spaces as well.
+ * to be placed in a KSEGx (or KUSEG) address space.  Any pointers
+ * passed have to point to addresses within one of these spaces as well.
 */
 NESTED(call_o32, O32_FRAMESZ, ra)
                REG_SUBU        sp,O32_FRAMESZ
@@ -51,32 +60,36 @@ NESTED(call_o32, O32_FRAMESZ, ra)
                REG_S           s0,O32_FRAMESZ-11*SZREG(sp)
                move            jp,a0
-                REG_SUBU        s0,a1,O32_FRAMESZ_NEW
-                REG_S           sp,O32_FRAMESZ_NEW-1*SZREG(s0)
+                move            fp,sp
+                beqz            a1,0f
+                REG_SUBU        fp,a1,O32_NFRAMESZ
+0:
+                REG_S           sp,O32_NFRAMESZ-1*SZREG(fp)
                sll             a0,a2,zero
                sll             a1,a3,zero
                sll             a2,a4,zero
                sll             a3,a5,zero
-                sw              a6,0x10(s0)
+                sw              a6,4*O32_SZREG(fp)
-                sw              a7,0x14(s0)
+                sw              a7,5*O32_SZREG(fp)
                PTR_LA          t0,O32_FRAMESZ(sp)
-                PTR_LA          t1,0x18(s0)
+                PTR_LA          t1,6*O32_SZREG(fp)
                li              t2,O32_ARGC-6
 1:
                lw              t3,(t0)
                REG_ADDU        t0,SZREG
                sw              t3,(t1)
                REG_SUBU        t2,1
-                REG_ADDU        t1,4
+                REG_ADDU        t1,O32_SZREG
                bnez            t2,1b
-                move            sp,s0
+                move            sp,fp
                jalr            jp
-                REG_L           sp,O32_FRAMESZ_NEW-1*SZREG(sp)
+                REG_L           sp,O32_NFRAMESZ-1*SZREG(sp)
                REG_L           s0,O32_FRAMESZ-11*SZREG(sp)
                REG_L           s1,O32_FRAMESZ-10*SZREG(sp)
diff --git a/arch/mips/fw/sni/sniprom.c b/arch/mips/fw/sni/sniprom.c
index 2c2cb182af4e..6aa264b9856a 100644
--- a/arch/mips/fw/sni/sniprom.c
+++ b/arch/mips/fw/sni/sniprom.c
@@ -40,7 +40,8 @@
 #ifdef CONFIG_64BIT
-static u8 o32_stk[16384];
+/* O32 stack has to be 8-byte aligned. */
+static u64 o32_stk[4096];
 #define O32_STK   &o32_stk[sizeof(o32_stk)]
 #define __PROM_O32(fun, arg) fun arg __asm__(#fun); \
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h
index dc2135be2a3a..ff2707ab3295 100644
--- a/arch/mips/include/asm/cpu-info.h
+++ b/arch/mips/include/asm/cpu-info.h
@@ -39,14 +39,14 @@ struct cache_desc {
 #define MIPS_CACHE_PINDEX       0x00000020      /* Physically indexed cache */
 struct cpuinfo_mips {
-        unsigned int            udelay_val;
+        unsigned long           asid_cache;
-        unsigned int            asid_cache;
        /*
         * Capability and feature descriptor structure for MIPS CPU
         */
        unsigned long           options;
        unsigned long           ases;
+        unsigned int            udelay_val;
        unsigned int            processor_id;
        unsigned int            fpu_id;
        unsigned int            msa_id;
diff --git a/arch/mips/include/asm/dec/prom.h b/arch/mips/include/asm/dec/prom.h
index c0ead6313845..b59a2103b61a 100644
--- a/arch/mips/include/asm/dec/prom.h
+++ b/arch/mips/include/asm/dec/prom.h
@@ -113,31 +113,31 @@ extern int (*__pmax_close)(int);
 #define __DEC_PROM_O32(fun, arg) fun arg __asm__(#fun); \
                                 __asm__(#fun " = call_o32")
-int __DEC_PROM_O32(_rex_bootinit, (int (*)(void)));
+int __DEC_PROM_O32(_rex_bootinit, (int (*)(void), void *));
-int __DEC_PROM_O32(_rex_bootread, (int (*)(void)));
+int __DEC_PROM_O32(_rex_bootread, (int (*)(void), void *));
-int __DEC_PROM_O32(_rex_getbitmap, (int (*)(memmap *), memmap *));
+int __DEC_PROM_O32(_rex_getbitmap, (int (*)(memmap *), void *, memmap *));
 unsigned long *__DEC_PROM_O32(_rex_slot_address,
-                             (unsigned long *(*)(int), int));
+                             (unsigned long *(*)(int), void *, int));
-void *__DEC_PROM_O32(_rex_gettcinfo, (void *(*)(void)));
+void *__DEC_PROM_O32(_rex_gettcinfo, (void *(*)(void), void *));
-int __DEC_PROM_O32(_rex_getsysid, (int (*)(void)));
+int __DEC_PROM_O32(_rex_getsysid, (int (*)(void), void *));
-void __DEC_PROM_O32(_rex_clear_cache, (void (*)(void)));
+void __DEC_PROM_O32(_rex_clear_cache, (void (*)(void), void *));
-int __DEC_PROM_O32(_prom_getchar, (int (*)(void)));
+int __DEC_PROM_O32(_prom_getchar, (int (*)(void), void *));
-char *__DEC_PROM_O32(_prom_getenv, (char *(*)(char *), char *));
+char *__DEC_PROM_O32(_prom_getenv, (char *(*)(char *), void *, char *));
-int __DEC_PROM_O32(_prom_printf, (int (*)(char *, ...), char *, ...));
+int __DEC_PROM_O32(_prom_printf, (int (*)(char *, ...), void *, char *, ...));
-#define rex_bootinit()          _rex_bootinit(__rex_bootinit)
+#define rex_bootinit()          _rex_bootinit(__rex_bootinit, NULL)
-#define rex_bootread()          _rex_bootread(__rex_bootread)
+#define rex_bootread()          _rex_bootread(__rex_bootread, NULL)
-#define rex_getbitmap(x)        _rex_getbitmap(__rex_getbitmap, x)
+#define rex_getbitmap(x)        _rex_getbitmap(__rex_getbitmap, NULL, x)
-#define rex_slot_address(x)     _rex_slot_address(__rex_slot_address, x)
+#define rex_slot_address(x)     _rex_slot_address(__rex_slot_address, NULL, x)
-#define rex_gettcinfo()         _rex_gettcinfo(__rex_gettcinfo)
+#define rex_gettcinfo()         _rex_gettcinfo(__rex_gettcinfo, NULL)
-#define rex_getsysid()          _rex_getsysid(__rex_getsysid)
+#define rex_getsysid()          _rex_getsysid(__rex_getsysid, NULL)
-#define rex_clear_cache()       _rex_clear_cache(__rex_clear_cache)
+#define rex_clear_cache()       _rex_clear_cache(__rex_clear_cache, NULL)
-#define prom_getchar()          _prom_getchar(__prom_getchar)
+#define prom_getchar()          _prom_getchar(__prom_getchar, NULL)
-#define prom_getenv(x)          _prom_getenv(__prom_getenv, x)
+#define prom_getenv(x)          _prom_getenv(__prom_getenv, NULL, x)
-#define prom_printf(x...)       _prom_printf(__prom_printf, x)
+#define prom_printf(x...)       _prom_printf(__prom_printf, NULL, x)
 #else /* !CONFIG_64BIT */
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index 12d6842962be..974b0e308963 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -73,11 +73,6 @@ extern unsigned long PCIBIOS_MIN_MEM;
 extern void pcibios_set_master(struct pci_dev *dev);
-static inline void pcibios_penalize_isa_irq(int irq, int active)
-{
-        /* We don't do dynamic PCI IRQ allocation */
-}
 #define HAVE_PCI_MMAP
 extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
diff --git a/arch/mips/include/asm/rm9k-ocd.h b/arch/mips/include/asm/rm9k-ocd.h
deleted file mode 100644
index b0b80d9ecf96..000000000000
--- a/arch/mips/include/asm/rm9k-ocd.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- *  Copyright (C) 2004 by Basler Vision Technologies AG
- *  Author: Thomas Koeller <thomas.koeller@baslerweb.com>
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#if !defined(_ASM_RM9K_OCD_H)
-#define _ASM_RM9K_OCD_H
-#include <linux/types.h>
-#include <linux/spinlock.h>
-#include <asm/io.h>
-extern volatile void __iomem * const ocd_base;
-extern volatile void __iomem * const titan_base;
-#define ocd_addr(__x__)         (ocd_base + (__x__))
-#define titan_addr(__x__)       (titan_base + (__x__))
-#define scram_addr(__x__)       (scram_base + (__x__))
-/* OCD register access */
-#define ocd_readl(__offs__) __raw_readl(ocd_addr(__offs__))
-#define ocd_readw(__offs__) __raw_readw(ocd_addr(__offs__))
-#define ocd_readb(__offs__) __raw_readb(ocd_addr(__offs__))
-#define ocd_writel(__val__, __offs__) \
-        __raw_writel((__val__), ocd_addr(__offs__))
-#define ocd_writew(__val__, __offs__) \
-        __raw_writew((__val__), ocd_addr(__offs__))
-#define ocd_writeb(__val__, __offs__) \
-        __raw_writeb((__val__), ocd_addr(__offs__))
-/* TITAN register access - 32 bit-wide only */
-#define titan_readl(__offs__) __raw_readl(titan_addr(__offs__))
-#define titan_writel(__val__, __offs__) \
-        __raw_writel((__val__), titan_addr(__offs__))
-/* Protect access to shared TITAN registers */
-extern spinlock_t titan_lock;
-extern int titan_irqflags;
-#define lock_titan_regs() spin_lock_irqsave(&titan_lock, titan_irqflags)
-#define unlock_titan_regs() spin_unlock_irqrestore(&titan_lock, titan_irqflags)
-#endif  /* !defined(_ASM_RM9K_OCD_H) */
diff --git a/arch/mips/include/asm/syscall.h b/arch/mips/include/asm/syscall.h
index c6e9cd2bca8d..17960fe7a8ce 100644
--- a/arch/mips/include/asm/syscall.h
+++ b/arch/mips/include/asm/syscall.h
@@ -133,6 +133,8 @@ static inline int syscall_get_arch(void)
 #ifdef CONFIG_64BIT
        if (!test_thread_flag(TIF_32BIT_REGS))
                arch |= __AUDIT_ARCH_64BIT;
+        if (test_thread_flag(TIF_32BIT_ADDR))
+                arch |= __AUDIT_ARCH_CONVENTION_MIPS64_N32;
 #endif
 #if defined(__LITTLE_ENDIAN)
        arch |=  __AUDIT_ARCH_LE;
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
index df6e775f3fef..3125797f2a88 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
@@ -484,13 +484,13 @@ enum MIPS6e_i8_func {
 * Damn ...  bitfields depend from byteorder :-(
 */
 #ifdef __MIPSEB__
-#define BITFIELD_FIELD(field, more)                                     \
+#define __BITFIELD_FIELD(field, more)                                   \
        field;                                                          \
        more
 #elif defined(__MIPSEL__)
-#define BITFIELD_FIELD(field, more)                                     \
+#define __BITFIELD_FIELD(field, more)                                   \
        more                                                            \
        field;
@@ -499,112 +499,112 @@ enum MIPS6e_i8_func {
 #endif
 struct j_format {
-        BITFIELD_FIELD(unsigned int opcode : 6, /* Jump format */
+        __BITFIELD_FIELD(unsigned int opcode : 6, /* Jump format */
-        BITFIELD_FIELD(unsigned int target : 26,
+        __BITFIELD_FIELD(unsigned int target : 26,
        ;))
 };
 struct i_format {                       /* signed immediate format */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int rs : 5,
+        __BITFIELD_FIELD(unsigned int rs : 5,
-        BITFIELD_FIELD(unsigned int rt : 5,
+        __BITFIELD_FIELD(unsigned int rt : 5,
-        BITFIELD_FIELD(signed int simmediate : 16,
+        __BITFIELD_FIELD(signed int simmediate : 16,
        ;))))
 };
 struct u_format {                       /* unsigned immediate format */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int rs : 5,
+        __BITFIELD_FIELD(unsigned int rs : 5,
-        BITFIELD_FIELD(unsigned int rt : 5,
+        __BITFIELD_FIELD(unsigned int rt : 5,
-        BITFIELD_FIELD(unsigned int uimmediate : 16,
+        __BITFIELD_FIELD(unsigned int uimmediate : 16,
        ;))))
 };
 struct c_format {                       /* Cache (>= R6000) format */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int rs : 5,
+        __BITFIELD_FIELD(unsigned int rs : 5,
-        BITFIELD_FIELD(unsigned int c_op : 3,
+        __BITFIELD_FIELD(unsigned int c_op : 3,
-        BITFIELD_FIELD(unsigned int cache : 2,
+        __BITFIELD_FIELD(unsigned int cache : 2,
-        BITFIELD_FIELD(unsigned int simmediate : 16,
+        __BITFIELD_FIELD(unsigned int simmediate : 16,
        ;)))))
 };
 struct r_format {                       /* Register format */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int rs : 5,
+        __BITFIELD_FIELD(unsigned int rs : 5,
-        BITFIELD_FIELD(unsigned int rt : 5,
+        __BITFIELD_FIELD(unsigned int rt : 5,
-        BITFIELD_FIELD(unsigned int rd : 5,
+        __BITFIELD_FIELD(unsigned int rd : 5,
-        BITFIELD_FIELD(unsigned int re : 5,
+        __BITFIELD_FIELD(unsigned int re : 5,
-        BITFIELD_FIELD(unsigned int func : 6,
+        __BITFIELD_FIELD(unsigned int func : 6,
        ;))))))
 };
 struct p_format {               /* Performance counter format (R10000) */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int rs : 5,
+        __BITFIELD_FIELD(unsigned int rs : 5,
-        BITFIELD_FIELD(unsigned int rt : 5,
+        __BITFIELD_FIELD(unsigned int rt : 5,
-        BITFIELD_FIELD(unsigned int rd : 5,
+        __BITFIELD_FIELD(unsigned int rd : 5,
-        BITFIELD_FIELD(unsigned int re : 5,
+        __BITFIELD_FIELD(unsigned int re : 5,
-        BITFIELD_FIELD(unsigned int func : 6,
+        __BITFIELD_FIELD(unsigned int func : 6,
        ;))))))
 };
 struct f_format {                       /* FPU register format */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int : 1,
+        __BITFIELD_FIELD(unsigned int : 1,
-        BITFIELD_FIELD(unsigned int fmt : 4,
+        __BITFIELD_FIELD(unsigned int fmt : 4,
-        BITFIELD_FIELD(unsigned int rt : 5,
+        __BITFIELD_FIELD(unsigned int rt : 5,
-        BITFIELD_FIELD(unsigned int rd : 5,
+        __BITFIELD_FIELD(unsigned int rd : 5,
-        BITFIELD_FIELD(unsigned int re : 5,
+        __BITFIELD_FIELD(unsigned int re : 5,
-        BITFIELD_FIELD(unsigned int func : 6,
+        __BITFIELD_FIELD(unsigned int func : 6,
        ;)))))))
 };
 struct ma_format {              /* FPU multiply and add format (MIPS IV) */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int fr : 5,
+        __BITFIELD_FIELD(unsigned int fr : 5,
-        BITFIELD_FIELD(unsigned int ft : 5,
+        __BITFIELD_FIELD(unsigned int ft : 5,
-        BITFIELD_FIELD(unsigned int fs : 5,
+        __BITFIELD_FIELD(unsigned int fs : 5,
-        BITFIELD_FIELD(unsigned int fd : 5,
+        __BITFIELD_FIELD(unsigned int fd : 5,
-        BITFIELD_FIELD(unsigned int func : 4,
+        __BITFIELD_FIELD(unsigned int func : 4,
-        BITFIELD_FIELD(unsigned int fmt : 2,
+        __BITFIELD_FIELD(unsigned int fmt : 2,
        ;)))))))
 };
 struct b_format {                       /* BREAK and SYSCALL */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int code : 20,
+        __BITFIELD_FIELD(unsigned int code : 20,
-        BITFIELD_FIELD(unsigned int func : 6,
+        __BITFIELD_FIELD(unsigned int func : 6,
        ;)))
 };
 struct ps_format {                      /* MIPS-3D / paired single format */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int rs : 5,
+        __BITFIELD_FIELD(unsigned int rs : 5,
-        BITFIELD_FIELD(unsigned int ft : 5,
+        __BITFIELD_FIELD(unsigned int ft : 5,
-        BITFIELD_FIELD(unsigned int fs : 5,
+        __BITFIELD_FIELD(unsigned int fs : 5,
-        BITFIELD_FIELD(unsigned int fd : 5,
+        __BITFIELD_FIELD(unsigned int fd : 5,
-        BITFIELD_FIELD(unsigned int func : 6,
+        __BITFIELD_FIELD(unsigned int func : 6,
        ;))))))
 };
 struct v_format {                               /* MDMX vector format */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int sel : 4,
+        __BITFIELD_FIELD(unsigned int sel : 4,
-        BITFIELD_FIELD(unsigned int fmt : 1,
+        __BITFIELD_FIELD(unsigned int fmt : 1,
-        BITFIELD_FIELD(unsigned int vt : 5,
+        __BITFIELD_FIELD(unsigned int vt : 5,
-        BITFIELD_FIELD(unsigned int vs : 5,
+        __BITFIELD_FIELD(unsigned int vs : 5,
-        BITFIELD_FIELD(unsigned int vd : 5,
+        __BITFIELD_FIELD(unsigned int vd : 5,
-        BITFIELD_FIELD(unsigned int func : 6,
+        __BITFIELD_FIELD(unsigned int func : 6,
        ;)))))))
 };
 struct spec3_format {   /* SPEC3 */
-        BITFIELD_FIELD(unsigned int opcode:6,
+        __BITFIELD_FIELD(unsigned int opcode:6,
-        BITFIELD_FIELD(unsigned int rs:5,
+        __BITFIELD_FIELD(unsigned int rs:5,
-        BITFIELD_FIELD(unsigned int rt:5,
+        __BITFIELD_FIELD(unsigned int rt:5,
-        BITFIELD_FIELD(signed int simmediate:9,
+        __BITFIELD_FIELD(signed int simmediate:9,
-        BITFIELD_FIELD(unsigned int func:7,
+        __BITFIELD_FIELD(unsigned int func:7,
        ;)))))
 };
@@ -616,141 +616,141 @@ struct spec3_format {   /* SPEC3 */
 *      if it is MIPS32 instruction re-encoded for use in the microMIPS ASE.
 */
 struct fb_format {              /* FPU branch format (MIPS32) */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int bc : 5,
+        __BITFIELD_FIELD(unsigned int bc : 5,
-        BITFIELD_FIELD(unsigned int cc : 3,
+        __BITFIELD_FIELD(unsigned int cc : 3,
-        BITFIELD_FIELD(unsigned int flag : 2,
+        __BITFIELD_FIELD(unsigned int flag : 2,
-        BITFIELD_FIELD(signed int simmediate : 16,
+        __BITFIELD_FIELD(signed int simmediate : 16,
        ;)))))
 };
 struct fp0_format {             /* FPU multiply and add format (MIPS32) */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int fmt : 5,
+        __BITFIELD_FIELD(unsigned int fmt : 5,
-        BITFIELD_FIELD(unsigned int ft : 5,
+        __BITFIELD_FIELD(unsigned int ft : 5,
-        BITFIELD_FIELD(unsigned int fs : 5,
+        __BITFIELD_FIELD(unsigned int fs : 5,
-        BITFIELD_FIELD(unsigned int fd : 5,
+        __BITFIELD_FIELD(unsigned int fd : 5,
-        BITFIELD_FIELD(unsigned int func : 6,
+        __BITFIELD_FIELD(unsigned int func : 6,
        ;))))))
 };
 struct mm_fp0_format {          /* FPU multipy and add format (microMIPS) */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int ft : 5,
+        __BITFIELD_FIELD(unsigned int ft : 5,
-        BITFIELD_FIELD(unsigned int fs : 5,
+        __BITFIELD_FIELD(unsigned int fs : 5,
-        BITFIELD_FIELD(unsigned int fd : 5,
+        __BITFIELD_FIELD(unsigned int fd : 5,
-        BITFIELD_FIELD(unsigned int fmt : 3,
+        __BITFIELD_FIELD(unsigned int fmt : 3,
-        BITFIELD_FIELD(unsigned int op : 2,
+        __BITFIELD_FIELD(unsigned int op : 2,
-        BITFIELD_FIELD(unsigned int func : 6,
+        __BITFIELD_FIELD(unsigned int func : 6,
        ;)))))))
 };
 struct fp1_format {             /* FPU mfc1 and cfc1 format (MIPS32) */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int op : 5,
+        __BITFIELD_FIELD(unsigned int op : 5,
-        BITFIELD_FIELD(unsigned int rt : 5,
+        __BITFIELD_FIELD(unsigned int rt : 5,
-        BITFIELD_FIELD(unsigned int fs : 5,
+        __BITFIELD_FIELD(unsigned int fs : 5,
-        BITFIELD_FIELD(unsigned int fd : 5,
+        __BITFIELD_FIELD(unsigned int fd : 5,
-        BITFIELD_FIELD(unsigned int func : 6,
+        __BITFIELD_FIELD(unsigned int func : 6,
        ;))))))
 };
 struct mm_fp1_format {          /* FPU mfc1 and cfc1 format (microMIPS) */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int rt : 5,
+        __BITFIELD_FIELD(unsigned int rt : 5,
-        BITFIELD_FIELD(unsigned int fs : 5,
+        __BITFIELD_FIELD(unsigned int fs : 5,
-        BITFIELD_FIELD(unsigned int fmt : 2,
+        __BITFIELD_FIELD(unsigned int fmt : 2,
-        BITFIELD_FIELD(unsigned int op : 8,
+        __BITFIELD_FIELD(unsigned int op : 8,
-        BITFIELD_FIELD(unsigned int func : 6,
+        __BITFIELD_FIELD(unsigned int func : 6,
        ;))))))
 };
 struct mm_fp2_format {          /* FPU movt and movf format (microMIPS) */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int fd : 5,
+        __BITFIELD_FIELD(unsigned int fd : 5,
-        BITFIELD_FIELD(unsigned int fs : 5,
+        __BITFIELD_FIELD(unsigned int fs : 5,
-        BITFIELD_FIELD(unsigned int cc : 3,
+        __BITFIELD_FIELD(unsigned int cc : 3,
-        BITFIELD_FIELD(unsigned int zero : 2,
+        __BITFIELD_FIELD(unsigned int zero : 2,
-        BITFIELD_FIELD(unsigned int fmt : 2,
+        __BITFIELD_FIELD(unsigned int fmt : 2,
-        BITFIELD_FIELD(unsigned int op : 3,
+        __BITFIELD_FIELD(unsigned int op : 3,
-        BITFIELD_FIELD(unsigned int func : 6,
+        __BITFIELD_FIELD(unsigned int func : 6,
        ;))))))))
 };
 struct mm_fp3_format {          /* FPU abs and neg format (microMIPS) */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int rt : 5,
+        __BITFIELD_FIELD(unsigned int rt : 5,
-        BITFIELD_FIELD(unsigned int fs : 5,
+        __BITFIELD_FIELD(unsigned int fs : 5,
-        BITFIELD_FIELD(unsigned int fmt : 3,
+        __BITFIELD_FIELD(unsigned int fmt : 3,
-        BITFIELD_FIELD(unsigned int op : 7,
+        __BITFIELD_FIELD(unsigned int op : 7,
-        BITFIELD_FIELD(unsigned int func : 6,
+        __BITFIELD_FIELD(unsigned int func : 6,
        ;))))))
 };
 struct mm_fp4_format {          /* FPU c.cond format (microMIPS) */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int rt : 5,
+        __BITFIELD_FIELD(unsigned int rt : 5,
-        BITFIELD_FIELD(unsigned int fs : 5,
+        __BITFIELD_FIELD(unsigned int fs : 5,
-        BITFIELD_FIELD(unsigned int cc : 3,
+        __BITFIELD_FIELD(unsigned int cc : 3,
-        BITFIELD_FIELD(unsigned int fmt : 3,
+        __BITFIELD_FIELD(unsigned int fmt : 3,
-        BITFIELD_FIELD(unsigned int cond : 4,
+        __BITFIELD_FIELD(unsigned int cond : 4,
-        BITFIELD_FIELD(unsigned int func : 6,
+        __BITFIELD_FIELD(unsigned int func : 6,
        ;)))))))
 };
 struct mm_fp5_format {          /* FPU lwxc1 and swxc1 format (microMIPS) */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int index : 5,
+        __BITFIELD_FIELD(unsigned int index : 5,
-        BITFIELD_FIELD(unsigned int base : 5,
+        __BITFIELD_FIELD(unsigned int base : 5,
-        BITFIELD_FIELD(unsigned int fd : 5,
+        __BITFIELD_FIELD(unsigned int fd : 5,
-        BITFIELD_FIELD(unsigned int op : 5,
+        __BITFIELD_FIELD(unsigned int op : 5,
-        BITFIELD_FIELD(unsigned int func : 6,
+        __BITFIELD_FIELD(unsigned int func : 6,
        ;))))))
 };
 struct fp6_format {             /* FPU madd and msub format (MIPS IV) */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int fr : 5,
+        __BITFIELD_FIELD(unsigned int fr : 5,
-        BITFIELD_FIELD(unsigned int ft : 5,
+        __BITFIELD_FIELD(unsigned int ft : 5,
-        BITFIELD_FIELD(unsigned int fs : 5,
+        __BITFIELD_FIELD(unsigned int fs : 5,
-        BITFIELD_FIELD(unsigned int fd : 5,
+        __BITFIELD_FIELD(unsigned int fd : 5,
-        BITFIELD_FIELD(unsigned int func : 6,
+        __BITFIELD_FIELD(unsigned int func : 6,
        ;))))))
 };
 struct mm_fp6_format {          /* FPU madd and msub format (microMIPS) */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int ft : 5,
+        __BITFIELD_FIELD(unsigned int ft : 5,
-        BITFIELD_FIELD(unsigned int fs : 5,
+        __BITFIELD_FIELD(unsigned int fs : 5,
-        BITFIELD_FIELD(unsigned int fd : 5,
+        __BITFIELD_FIELD(unsigned int fd : 5,
-        BITFIELD_FIELD(unsigned int fr : 5,
+        __BITFIELD_FIELD(unsigned int fr : 5,
-        BITFIELD_FIELD(unsigned int func : 6,
+        __BITFIELD_FIELD(unsigned int func : 6,
        ;))))))
 };
 struct mm_i_format {            /* Immediate format (microMIPS) */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int rt : 5,
+        __BITFIELD_FIELD(unsigned int rt : 5,
-        BITFIELD_FIELD(unsigned int rs : 5,
+        __BITFIELD_FIELD(unsigned int rs : 5,
-        BITFIELD_FIELD(signed int simmediate : 16,
+        __BITFIELD_FIELD(signed int simmediate : 16,
        ;))))
 };
 struct mm_m_format {            /* Multi-word load/store format (microMIPS) */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int rd : 5,
+        __BITFIELD_FIELD(unsigned int rd : 5,
-        BITFIELD_FIELD(unsigned int base : 5,
+        __BITFIELD_FIELD(unsigned int base : 5,
-        BITFIELD_FIELD(unsigned int func : 4,
+        __BITFIELD_FIELD(unsigned int func : 4,
-        BITFIELD_FIELD(signed int simmediate : 12,
+        __BITFIELD_FIELD(signed int simmediate : 12,
        ;)))))
 };
 struct mm_x_format {            /* Scaled indexed load format (microMIPS) */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int index : 5,
+        __BITFIELD_FIELD(unsigned int index : 5,
-        BITFIELD_FIELD(unsigned int base : 5,
+        __BITFIELD_FIELD(unsigned int base : 5,
-        BITFIELD_FIELD(unsigned int rd : 5,
+        __BITFIELD_FIELD(unsigned int rd : 5,
-        BITFIELD_FIELD(unsigned int func : 11,
+        __BITFIELD_FIELD(unsigned int func : 11,
        ;)))))
 };
@@ -758,51 +758,51 @@ struct mm_x_format {		/* Scaled indexed load format (microMIPS) */
 * microMIPS instruction formats (16-bit length)
 */
 struct mm_b0_format {           /* Unconditional branch format (microMIPS) */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(signed int simmediate : 10,
+        __BITFIELD_FIELD(signed int simmediate : 10,
-        BITFIELD_FIELD(unsigned int : 16, /* Ignored */
+        __BITFIELD_FIELD(unsigned int : 16, /* Ignored */
        ;)))
 };
 struct mm_b1_format {           /* Conditional branch format (microMIPS) */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int rs : 3,
+        __BITFIELD_FIELD(unsigned int rs : 3,
-        BITFIELD_FIELD(signed int simmediate : 7,
+        __BITFIELD_FIELD(signed int simmediate : 7,
-        BITFIELD_FIELD(unsigned int : 16, /* Ignored */
+        __BITFIELD_FIELD(unsigned int : 16, /* Ignored */
        ;))))
 };
 struct mm16_m_format {          /* Multi-word load/store format */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int func : 4,
+        __BITFIELD_FIELD(unsigned int func : 4,
-        BITFIELD_FIELD(unsigned int rlist : 2,
+        __BITFIELD_FIELD(unsigned int rlist : 2,
-        BITFIELD_FIELD(unsigned int imm : 4,
+        __BITFIELD_FIELD(unsigned int imm : 4,
-        BITFIELD_FIELD(unsigned int : 16, /* Ignored */
+        __BITFIELD_FIELD(unsigned int : 16, /* Ignored */
        ;)))))
 };
 struct mm16_rb_format {         /* Signed immediate format */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int rt : 3,
+        __BITFIELD_FIELD(unsigned int rt : 3,
-        BITFIELD_FIELD(unsigned int base : 3,
+        __BITFIELD_FIELD(unsigned int base : 3,
-        BITFIELD_FIELD(signed int simmediate : 4,
+        __BITFIELD_FIELD(signed int simmediate : 4,
-        BITFIELD_FIELD(unsigned int : 16, /* Ignored */
+        __BITFIELD_FIELD(unsigned int : 16, /* Ignored */
        ;)))))
 };
 struct mm16_r3_format {         /* Load from global pointer format */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int rt : 3,
+        __BITFIELD_FIELD(unsigned int rt : 3,
-        BITFIELD_FIELD(signed int simmediate : 7,
+        __BITFIELD_FIELD(signed int simmediate : 7,
-        BITFIELD_FIELD(unsigned int : 16, /* Ignored */
+        __BITFIELD_FIELD(unsigned int : 16, /* Ignored */
        ;))))
 };
 struct mm16_r5_format {         /* Load/store from stack pointer format */
-        BITFIELD_FIELD(unsigned int opcode : 6,
+        __BITFIELD_FIELD(unsigned int opcode : 6,
-        BITFIELD_FIELD(unsigned int rt : 5,
+        __BITFIELD_FIELD(unsigned int rt : 5,
-        BITFIELD_FIELD(signed int simmediate : 5,
+        __BITFIELD_FIELD(signed int simmediate : 5,
-        BITFIELD_FIELD(unsigned int : 16, /* Ignored */
+        __BITFIELD_FIELD(unsigned int : 16, /* Ignored */
        ;))))
 };
@@ -810,57 +810,57 @@ struct mm16_r5_format {		/* Load/store from stack pointer format */
 * MIPS16e instruction formats (16-bit length)
 */
 struct m16e_rr {
-        BITFIELD_FIELD(unsigned int opcode : 5,
+        __BITFIELD_FIELD(unsigned int opcode : 5,
-        BITFIELD_FIELD(unsigned int rx : 3,
+        __BITFIELD_FIELD(unsigned int rx : 3,
-        BITFIELD_FIELD(unsigned int nd : 1,
+        __BITFIELD_FIELD(unsigned int nd : 1,
-        BITFIELD_FIELD(unsigned int l : 1,
+        __BITFIELD_FIELD(unsigned int l : 1,
-        BITFIELD_FIELD(unsigned int ra : 1,
+        __BITFIELD_FIELD(unsigned int ra : 1,
-        BITFIELD_FIELD(unsigned int func : 5,
+        __BITFIELD_FIELD(unsigned int func : 5,
        ;))))))
 };
 struct m16e_jal {
-        BITFIELD_FIELD(unsigned int opcode : 5,
+        __BITFIELD_FIELD(unsigned int opcode : 5,
-        BITFIELD_FIELD(unsigned int x : 1,
+        __BITFIELD_FIELD(unsigned int x : 1,
-        BITFIELD_FIELD(unsigned int imm20_16 : 5,
+        __BITFIELD_FIELD(unsigned int imm20_16 : 5,
-        BITFIELD_FIELD(signed int imm25_21 : 5,
+        __BITFIELD_FIELD(signed int imm25_21 : 5,
        ;))))
 };
 struct m16e_i64 {
-        BITFIELD_FIELD(unsigned int opcode : 5,
+        __BITFIELD_FIELD(unsigned int opcode : 5,
-        BITFIELD_FIELD(unsigned int func : 3,
+        __BITFIELD_FIELD(unsigned int func : 3,
-        BITFIELD_FIELD(unsigned int imm : 8,
+        __BITFIELD_FIELD(unsigned int imm : 8,
        ;)))
 };
 struct m16e_ri64 {
-        BITFIELD_FIELD(unsigned int opcode : 5,
+        __BITFIELD_FIELD(unsigned int opcode : 5,
-        BITFIELD_FIELD(unsigned int func : 3,
+        __BITFIELD_FIELD(unsigned int func : 3,
-        BITFIELD_FIELD(unsigned int ry : 3,
+        __BITFIELD_FIELD(unsigned int ry : 3,
-        BITFIELD_FIELD(unsigned int imm : 5,
+        __BITFIELD_FIELD(unsigned int imm : 5,
        ;))))
 };
 struct m16e_ri {
-        BITFIELD_FIELD(unsigned int opcode : 5,
+        __BITFIELD_FIELD(unsigned int opcode : 5,
-        BITFIELD_FIELD(unsigned int rx : 3,
+        __BITFIELD_FIELD(unsigned int rx : 3,
-        BITFIELD_FIELD(unsigned int imm : 8,
+        __BITFIELD_FIELD(unsigned int imm : 8,
        ;)))
 };
 struct m16e_rri {
-        BITFIELD_FIELD(unsigned int opcode : 5,
+        __BITFIELD_FIELD(unsigned int opcode : 5,
-        BITFIELD_FIELD(unsigned int rx : 3,
+        __BITFIELD_FIELD(unsigned int rx : 3,
-        BITFIELD_FIELD(unsigned int ry : 3,
+        __BITFIELD_FIELD(unsigned int ry : 3,
-        BITFIELD_FIELD(unsigned int imm : 5,
+        __BITFIELD_FIELD(unsigned int imm : 5,
        ;))))
 };
 struct m16e_i8 {
-        BITFIELD_FIELD(unsigned int opcode : 5,
+        __BITFIELD_FIELD(unsigned int opcode : 5,
-        BITFIELD_FIELD(unsigned int func : 3,
+        __BITFIELD_FIELD(unsigned int func : 3,
-        BITFIELD_FIELD(unsigned int imm : 8,
+        __BITFIELD_FIELD(unsigned int imm : 8,
        ;)))
 };
diff --git a/arch/mips/include/uapi/asm/unistd.h b/arch/mips/include/uapi/asm/unistd.h
index d6e154a9e6a5..5805414777e0 100644
--- a/arch/mips/include/uapi/asm/unistd.h
+++ b/arch/mips/include/uapi/asm/unistd.h
@@ -371,16 +371,17 @@
 #define __NR_finit_module               (__NR_Linux + 348)
 #define __NR_sched_setattr              (__NR_Linux + 349)
 #define __NR_sched_getattr              (__NR_Linux + 350)
+#define __NR_renameat2                  (__NR_Linux + 351)
 /*
 * Offset of the last Linux o32 flavoured syscall
 */
-#define __NR_Linux_syscalls             350
+#define __NR_Linux_syscalls             351
 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
 #define __NR_O32_Linux                  4000
-#define __NR_O32_Linux_syscalls         350
+#define __NR_O32_Linux_syscalls         351
 #if _MIPS_SIM == _MIPS_SIM_ABI64
@@ -699,16 +700,17 @@
 #define __NR_getdents64                 (__NR_Linux + 308)
 #define __NR_sched_setattr              (__NR_Linux + 309)
 #define __NR_sched_getattr              (__NR_Linux + 310)
+#define __NR_renameat2                  (__NR_Linux + 311)
 /*
 * Offset of the last Linux 64-bit flavoured syscall
 */
-#define __NR_Linux_syscalls             310
+#define __NR_Linux_syscalls             311
 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
 #define __NR_64_Linux                   5000
-#define __NR_64_Linux_syscalls          310
+#define __NR_64_Linux_syscalls          311
 #if _MIPS_SIM == _MIPS_SIM_NABI32
@@ -1031,15 +1033,16 @@
 #define __NR_finit_module               (__NR_Linux + 312)
 #define __NR_sched_setattr              (__NR_Linux + 313)
 #define __NR_sched_getattr              (__NR_Linux + 314)
+#define __NR_renameat2                  (__NR_Linux + 315)
 /*
 * Offset of the last N32 flavoured syscall
 */
-#define __NR_Linux_syscalls             314
+#define __NR_Linux_syscalls             315
 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
 #define __NR_N32_Linux                  6000
-#define __NR_N32_Linux_syscalls         314
+#define __NR_N32_Linux_syscalls         315
 #endif /* _UAPI_ASM_UNISTD_H */
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index 4d78bf445a9c..76122ff5cb5e 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -317,7 +317,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
                if (regs->regs[insn.i_format.rs] ==
                    regs->regs[insn.i_format.rt]) {
                        epc = epc + 4 + (insn.i_format.simmediate << 2);
-                        if (insn.i_format.rt == beql_op)
+                        if (insn.i_format.opcode == beql_op)
                                ret = BRANCH_LIKELY_TAKEN;
                } else
                        epc += 8;
@@ -329,7 +329,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
                if (regs->regs[insn.i_format.rs] !=
                    regs->regs[insn.i_format.rt]) {
                        epc = epc + 4 + (insn.i_format.simmediate << 2);
-                        if (insn.i_format.rt == bnel_op)
+                        if (insn.i_format.opcode == bnel_op)
                                ret = BRANCH_LIKELY_TAKEN;
                } else
                        epc += 8;
@@ -341,7 +341,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
                /* rt field assumed to be zero */
                if ((long)regs->regs[insn.i_format.rs] <= 0) {
                        epc = epc + 4 + (insn.i_format.simmediate << 2);
-                        if (insn.i_format.rt == bnel_op)
+                        if (insn.i_format.opcode == blezl_op)
                                ret = BRANCH_LIKELY_TAKEN;
                } else
                        epc += 8;
@@ -353,7 +353,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
                /* rt field assumed to be zero */
                if ((long)regs->regs[insn.i_format.rs] > 0) {
                        epc = epc + 4 + (insn.i_format.simmediate << 2);
-                        if (insn.i_format.rt == bnel_op)
+                        if (insn.i_format.opcode == bgtzl_op)
                                ret = BRANCH_LIKELY_TAKEN;
                } else
                        epc += 8;
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index e40971b51d2f..037a44d962f3 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -124,14 +124,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
        seq_printf(m, "kscratch registers\t: %d\n",
                      hweight8(cpu_data[n].kscratch_mask));
        seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core);
-#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC)
-        if (cpu_has_mipsmt) {
-                seq_printf(m, "VPE\t\t\t: %d\n", cpu_data[n].vpe_id);
-#if defined(CONFIG_MIPS_MT_SMTC)
-                seq_printf(m, "TC\t\t\t: %d\n", cpu_data[n].tc_id);
-#endif
-        }
-#endif
        sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
                      cpu_has_vce ? "%u" : "not available");
        seq_printf(m, fmt, 'D', vced_count);
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 71f85f427034..f639ccd5060c 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -163,7 +163,7 @@ int ptrace_get_watch_regs(struct task_struct *child,
        enum pt_watch_style style;
        int i;
-        if (!cpu_has_watch || current_cpu_data.watch_reg_use_cnt == 0)
+        if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
                return -EIO;
        if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs)))
                return -EIO;
@@ -177,14 +177,14 @@ int ptrace_get_watch_regs(struct task_struct *child,
 #endif
        __put_user(style, &addr->style);
-        __put_user(current_cpu_data.watch_reg_use_cnt,
+        __put_user(boot_cpu_data.watch_reg_use_cnt,
                   &addr->WATCH_STYLE.num_valid);
-        for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) {
+        for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
                __put_user(child->thread.watch.mips3264.watchlo[i],
                           &addr->WATCH_STYLE.watchlo[i]);
                __put_user(child->thread.watch.mips3264.watchhi[i] & 0xfff,
                           &addr->WATCH_STYLE.watchhi[i]);
-                __put_user(current_cpu_data.watch_reg_masks[i],
+                __put_user(boot_cpu_data.watch_reg_masks[i],
                           &addr->WATCH_STYLE.watch_masks[i]);
        }
        for (; i < 8; i++) {
@@ -204,12 +204,12 @@ int ptrace_set_watch_regs(struct task_struct *child,
        unsigned long lt[NUM_WATCH_REGS];
        u16 ht[NUM_WATCH_REGS];
-        if (!cpu_has_watch || current_cpu_data.watch_reg_use_cnt == 0)
+        if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
                return -EIO;
        if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs)))
                return -EIO;
        /* Check the values. */
-        for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) {
+        for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
                __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]);
 #ifdef CONFIG_32BIT
                if (lt[i] & __UA_LIMIT)
@@ -228,7 +228,7 @@ int ptrace_set_watch_regs(struct task_struct *child,
                        return -EINVAL;
        }
        /* Install them. */
-        for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) {
+        for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
                if (lt[i] & 7)
                        watch_active = 1;
                child->thread.watch.mips3264.watchlo[i] = lt[i];
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index fdc70b400442..3245474f19d5 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -577,3 +577,4 @@ EXPORT(sys_call_table)
        PTR     sys_finit_module
        PTR     sys_sched_setattr
        PTR     sys_sched_getattr               /* 4350 */
+        PTR     sys_renameat2
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index dd99c3285aea..be2fedd4ae33 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -430,4 +430,5 @@ EXPORT(sys_call_table)
        PTR     sys_getdents64
        PTR     sys_sched_setattr
        PTR     sys_sched_getattr               /* 5310 */
+        PTR     sys_renameat2
        .size   sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index f68d2f4f0090..c1dbcda4b816 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -423,4 +423,5 @@ EXPORT(sysn32_call_table)
        PTR     sys_finit_module
        PTR     sys_sched_setattr
        PTR     sys_sched_getattr
+        PTR     sys_renameat2                   /* 6315 */
        .size   sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 70f6acecd928..f1343ccd7ed7 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -556,4 +556,5 @@ EXPORT(sys32_call_table)
        PTR     sys_finit_module
        PTR     sys_sched_setattr
        PTR     sys_sched_getattr               /* 4350 */
+        PTR     sys_renameat2
        .size   sys32_call_table,.-sys32_call_table
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 074e857ced28..8119ac2fdfc9 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1545,7 +1545,7 @@ asmlinkage void cache_parity_error(void)
               reg_val & (1<<30) ? "secondary" : "primary",
               reg_val & (1<<31) ? "data" : "insn");
        if (cpu_has_mips_r2 &&
-            ((current_cpu_data.processor_id && 0xff0000) == PRID_COMP_MIPS)) {
+            ((current_cpu_data.processor_id & 0xff0000) == PRID_COMP_MIPS)) {
                pr_err("Error bits: %s%s%s%s%s%s%s%s\n",
                        reg_val & (1<<29) ? "ED " : "",
                        reg_val & (1<<28) ? "ET " : "",
@@ -1585,7 +1585,7 @@ asmlinkage void do_ftlb(void)
        /* For the moment, report the problem and hang. */
        if (cpu_has_mips_r2 &&
-            ((current_cpu_data.processor_id && 0xff0000) == PRID_COMP_MIPS)) {
+            ((current_cpu_data.processor_id & 0xff0000) == PRID_COMP_MIPS)) {
                pr_err("FTLB error exception, cp0_ecc=0x%08x:\n",
                       read_c0_ecc());
                pr_err("cp0_errorepc == %0*lx\n", field, read_c0_errorepc());
diff --git a/arch/mips/lantiq/dts/easy50712.dts b/arch/mips/lantiq/dts/easy50712.dts
index fac1f5b178eb..143b8a37b5e4 100644
--- a/arch/mips/lantiq/dts/easy50712.dts
+++ b/arch/mips/lantiq/dts/easy50712.dts
@@ -8,6 +8,7 @@
        };
        memory@0 {
+                device_type = "memory";
                reg = <0x0 0x2000000>;
        };
diff --git a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S
index 2e4825e48388..9901237563c5 100644
--- a/arch/mips/lib/csum_partial.S
+++ b/arch/mips/lib/csum_partial.S
@@ -56,14 +56,20 @@
 #define UNIT(unit)  ((unit)*NBYTES)
 #define ADDC(sum,reg)                                           \
+        .set    push;                                           \
+        .set    noat;                                           \
        ADD     sum, reg;                                       \
        sltu    v1, sum, reg;                                   \
        ADD     sum, v1;                                        \
+        .set    pop
 #define ADDC32(sum,reg)                                         \
+        .set    push;                                           \
+        .set    noat;                                           \
        addu    sum, reg;                                       \
        sltu    v1, sum, reg;                                   \
        addu    sum, v1;                                        \
+        .set    pop
 #define CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3)    \
        LOAD    _t0, (offset + UNIT(0))(src);                   \
@@ -710,6 +716,8 @@ LEAF(csum_partial)
        ADDC(sum, t2)
 .Ldone\@:
        /* fold checksum */
+        .set    push
+        .set    noat
 #ifdef USE_DOUBLE
        dsll32  v1, sum, 0
        daddu   sum, v1
@@ -732,6 +740,7 @@ LEAF(csum_partial)
        or      sum, sum, t0
 1:
 #endif
+        .set    pop
        .set reorder
        ADDC32(sum, psum)
        jr      ra
diff --git a/arch/mips/lib/delay.c b/arch/mips/lib/delay.c
index 44713af15a62..705cfb7c1a74 100644
--- a/arch/mips/lib/delay.c
+++ b/arch/mips/lib/delay.c
@@ -6,7 +6,7 @@
 * Copyright (C) 1994 by Waldorf Electronics
 * Copyright (C) 1995 - 2000, 01, 03 by Ralf Baechle
 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- * Copyright (C) 2007  Maciej W. Rozycki
+ * Copyright (C) 2007, 2014 Maciej W. Rozycki
 */
 #include <linux/module.h>
 #include <linux/param.h>
@@ -15,6 +15,12 @@
 #include <asm/compiler.h>
 #include <asm/war.h>
+#ifndef CONFIG_CPU_DADDI_WORKAROUNDS
+#define GCC_DADDI_IMM_ASM() "I"
+#else
+#define GCC_DADDI_IMM_ASM() "r"
+#endif
 void __delay(unsigned long loops)
 {
        __asm__ __volatile__ (
@@ -22,13 +28,13 @@ void __delay(unsigned long loops)
        "       .align  3                                       \n"
        "1:     bnez    %0, 1b                                  \n"
 #if BITS_PER_LONG == 32
-        "       subu    %0, 1                                   \n"
+        "       subu    %0, %1                                  \n"
 #else
-        "       dsubu   %0, 1                                   \n"
+        "       dsubu   %0, %1                                  \n"
 #endif
        "       .set    reorder                                 \n"
        : "=r" (loops)
-        : "0" (loops));
+        : GCC_DADDI_IMM_ASM() (1), "0" (loops));
 }
 EXPORT_SYMBOL(__delay);
diff --git a/arch/mips/lib/strncpy_user.S b/arch/mips/lib/strncpy_user.S
index d3301cd1e9a5..3c32baf8b494 100644
--- a/arch/mips/lib/strncpy_user.S
+++ b/arch/mips/lib/strncpy_user.S
@@ -35,7 +35,6 @@ LEAF(__strncpy_from_\func\()_asm)
        bnez            v0, .Lfault\@
 FEXPORT(__strncpy_from_\func\()_nocheck_asm)
-        .set            noreorder
        move            t0, zero
        move            v1, a1
 .ifeqs "\func","kernel"
@@ -45,21 +44,21 @@ FEXPORT(__strncpy_from_\func\()_nocheck_asm)
 .endif
        PTR_ADDIU       v1, 1
        R10KCBARRIER(0(ra))
+        sb              v0, (a0)
        beqz            v0, 2f
-         sb             v0, (a0)
        PTR_ADDIU       t0, 1
+        PTR_ADDIU       a0, 1
        bne             t0, a2, 1b
-         PTR_ADDIU      a0, 1
 2:      PTR_ADDU        v0, a1, t0
        xor             v0, a1
        bltz            v0, .Lfault\@
-         nop
+        move            v0, t0
        jr              ra                      # return n
-         move           v0, t0
        END(__strncpy_from_\func\()_asm)
-.Lfault\@: jr           ra
+.Lfault\@:
-          li            v0, -EFAULT
+        li              v0, -EFAULT
+        jr              ra
        .section        __ex_table,"a"
        PTR             1b, .Lfault\@
diff --git a/arch/mips/loongson/Kconfig b/arch/mips/loongson/Kconfig
index 7397be226a06..603d79a95f47 100644
--- a/arch/mips/loongson/Kconfig
+++ b/arch/mips/loongson/Kconfig
@@ -64,7 +64,6 @@ config LEMOTE_MACH3A
        bool "Lemote Loongson 3A family machines"
        select ARCH_SPARSEMEM_ENABLE
        select GENERIC_ISA_DMA_SUPPORT_BROKEN
-        select GENERIC_HARDIRQS_NO__DO_IRQ
        select BOOT_ELF32
        select BOARD_SCACHE
        select CSRC_R4K
diff --git a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
index c639b9db0012..12c75db23420 100644
--- a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
+++ b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
@@ -27,8 +27,7 @@
 #include <cs5536/cs5536_mfgpt.h>
-DEFINE_SPINLOCK(mfgpt_lock);
+static DEFINE_RAW_SPINLOCK(mfgpt_lock);
-EXPORT_SYMBOL(mfgpt_lock);
 static u32 mfgpt_base;
@@ -55,7 +54,7 @@ EXPORT_SYMBOL(enable_mfgpt0_counter);
 static void init_mfgpt_timer(enum clock_event_mode mode,
                             struct clock_event_device *evt)
 {
-        spin_lock(&mfgpt_lock);
+        raw_spin_lock(&mfgpt_lock);
        switch (mode) {
        case CLOCK_EVT_MODE_PERIODIC:
@@ -79,7 +78,7 @@ static void init_mfgpt_timer(enum clock_event_mode mode,
                /* Nothing to do here */
                break;
        }
-        spin_unlock(&mfgpt_lock);
+        raw_spin_unlock(&mfgpt_lock);
 }
 static struct clock_event_device mfgpt_clockevent = {
@@ -157,7 +156,7 @@ static cycle_t mfgpt_read(struct clocksource *cs)
        static int old_count;
        static u32 old_jifs;
-        spin_lock_irqsave(&mfgpt_lock, flags);
+        raw_spin_lock_irqsave(&mfgpt_lock, flags);
        /*
         * Although our caller may have the read side of xtime_lock,
         * this is now a seqlock, and we are cheating in this routine
@@ -191,7 +190,7 @@ static cycle_t mfgpt_read(struct clocksource *cs)
        old_count = count;
        old_jifs = jifs;
-        spin_unlock_irqrestore(&mfgpt_lock, flags);
+        raw_spin_unlock_irqrestore(&mfgpt_lock, flags);
        return (cycle_t) (jifs * COMPARE) + count;
 }
diff --git a/arch/mips/loongson/lemote-2f/clock.c b/arch/mips/loongson/lemote-2f/clock.c
index e1f427f4f5f3..67dd94ef28e6 100644
--- a/arch/mips/loongson/lemote-2f/clock.c
+++ b/arch/mips/loongson/lemote-2f/clock.c
@@ -91,6 +91,7 @@ EXPORT_SYMBOL(clk_put);
 int clk_set_rate(struct clk *clk, unsigned long rate)
 {
+        unsigned int rate_khz = rate / 1000;
        int ret = 0;
        int regval;
        int i;
@@ -111,10 +112,10 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
                if (loongson2_clockmod_table[i].frequency ==
                    CPUFREQ_ENTRY_INVALID)
                        continue;
-                if (rate == loongson2_clockmod_table[i].frequency)
+                if (rate_khz == loongson2_clockmod_table[i].frequency)
                        break;
        }
-        if (rate != loongson2_clockmod_table[i].frequency)
+        if (rate_khz != loongson2_clockmod_table[i].frequency)
                return -ENOTSUPP;
        clk->rate = rate;
diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c
index 58033c44690d..b611102e23b5 100644
--- a/arch/mips/mm/page.c
+++ b/arch/mips/mm/page.c
@@ -273,7 +273,7 @@ void build_clear_page(void)
                uasm_i_ori(&buf, A2, A0, off);
        if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
-                uasm_i_lui(&buf, AT, 0xa000);
+                uasm_i_lui(&buf, AT, uasm_rel_hi(0xa0000000));
        off = cache_line_size ? min(8, pref_bias_clear_store / cache_line_size)
                                * cache_line_size : 0;
@@ -424,7 +424,7 @@ void build_copy_page(void)
                uasm_i_ori(&buf, A2, A0, off);
        if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
-                uasm_i_lui(&buf, AT, 0xa000);
+                uasm_i_lui(&buf, AT, uasm_rel_hi(0xa0000000));
        off = cache_line_size ? min(8, pref_bias_copy_load / cache_line_size) *
                                cache_line_size : 0;
diff --git a/arch/mips/mm/tlb-funcs.S b/arch/mips/mm/tlb-funcs.S
index 30a494db99c2..a5427c6e9757 100644
--- a/arch/mips/mm/tlb-funcs.S
+++ b/arch/mips/mm/tlb-funcs.S
@@ -16,8 +16,10 @@
 #define FASTPATH_SIZE   128
+EXPORT(tlbmiss_handler_setup_pgd_start)
 LEAF(tlbmiss_handler_setup_pgd)
-        .space          16 * 4
+1:      j       1b              /* Dummy, will be replaced. */
+        .space  64
 END(tlbmiss_handler_setup_pgd)
 EXPORT(tlbmiss_handler_setup_pgd_end)
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index ee88367ab3ad..f99ec587b151 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -1422,16 +1422,17 @@ static void build_r4000_tlb_refill_handler(void)
 extern u32 handle_tlbl[], handle_tlbl_end[];
 extern u32 handle_tlbs[], handle_tlbs_end[];
 extern u32 handle_tlbm[], handle_tlbm_end[];
-extern u32 tlbmiss_handler_setup_pgd[], tlbmiss_handler_setup_pgd_end[];
+extern u32 tlbmiss_handler_setup_pgd_start[], tlbmiss_handler_setup_pgd[];
+extern u32 tlbmiss_handler_setup_pgd_end[];
 static void build_setup_pgd(void)
 {
        const int a0 = 4;
        const int __maybe_unused a1 = 5;
        const int __maybe_unused a2 = 6;
-        u32 *p = tlbmiss_handler_setup_pgd;
+        u32 *p = tlbmiss_handler_setup_pgd_start;
        const int tlbmiss_handler_setup_pgd_size =
-                tlbmiss_handler_setup_pgd_end - tlbmiss_handler_setup_pgd;
+                tlbmiss_handler_setup_pgd_end - tlbmiss_handler_setup_pgd_start;
 #ifndef CONFIG_MIPS_PGD_C0_CONTEXT
        long pgdc = (long)pgd_current;
 #endif
diff --git a/arch/mips/mti-malta/malta-memory.c b/arch/mips/mti-malta/malta-memory.c
index 6d0f4ab3632d..f2364e419682 100644
--- a/arch/mips/mti-malta/malta-memory.c
+++ b/arch/mips/mti-malta/malta-memory.c
@@ -27,7 +27,7 @@ unsigned long physical_memsize = 0L;
 fw_memblock_t * __init fw_getmdesc(int eva)
 {
        char *memsize_str, *ememsize_str __maybe_unused = NULL, *ptr;
-        unsigned long memsize, ememsize __maybe_unused = 0;
+        unsigned long memsize = 0, ememsize __maybe_unused = 0;
        static char cmdline[COMMAND_LINE_SIZE] __initdata;
        int tmp;
diff --git a/arch/mips/pci/pci-rc32434.c b/arch/mips/pci/pci-rc32434.c
index b128cb973ebe..7f6ce6d734c0 100644
--- a/arch/mips/pci/pci-rc32434.c
+++ b/arch/mips/pci/pci-rc32434.c
@@ -53,7 +53,6 @@ static struct resource rc32434_res_pci_mem1 = {
        .start = 0x50000000,
        .end = 0x5FFFFFFF,
        .flags = IORESOURCE_MEM,
-        .parent = &rc32434_res_pci_mem1,
        .sibling = NULL,
        .child = &rc32434_res_pci_mem2
 };
diff --git a/arch/mips/ralink/dts/mt7620a_eval.dts b/arch/mips/ralink/dts/mt7620a_eval.dts
index 35eb874ab7f1..709f58132f5c 100644
--- a/arch/mips/ralink/dts/mt7620a_eval.dts
+++ b/arch/mips/ralink/dts/mt7620a_eval.dts
@@ -7,6 +7,7 @@
        model = "Ralink MT7620A evaluation board";
        memory@0 {
+                device_type = "memory";
                reg = <0x0 0x2000000>;
        };
diff --git a/arch/mips/ralink/dts/rt2880_eval.dts b/arch/mips/ralink/dts/rt2880_eval.dts
index 322d7002595b..0a685db093d4 100644
--- a/arch/mips/ralink/dts/rt2880_eval.dts
+++ b/arch/mips/ralink/dts/rt2880_eval.dts
@@ -7,6 +7,7 @@
        model = "Ralink RT2880 evaluation board";
        memory@0 {
+                device_type = "memory";
                reg = <0x8000000 0x2000000>;
        };
diff --git a/arch/mips/ralink/dts/rt3052_eval.dts b/arch/mips/ralink/dts/rt3052_eval.dts
index 0ac73ea28198..ec9e9a035541 100644
--- a/arch/mips/ralink/dts/rt3052_eval.dts
+++ b/arch/mips/ralink/dts/rt3052_eval.dts
@@ -7,6 +7,7 @@
        model = "Ralink RT3052 evaluation board";
        memory@0 {
+                device_type = "memory";
                reg = <0x0 0x2000000>;
        };
diff --git a/arch/mips/ralink/dts/rt3883_eval.dts b/arch/mips/ralink/dts/rt3883_eval.dts
index 2fa6b330bf4f..e8df21a5d10d 100644
--- a/arch/mips/ralink/dts/rt3883_eval.dts
+++ b/arch/mips/ralink/dts/rt3883_eval.dts
@@ -7,6 +7,7 @@
        model = "Ralink RT3883 evaluation board";
        memory@0 {
+                device_type = "memory";
                reg = <0x0 0x2000000>;
        };
diff --git a/arch/mn10300/include/asm/pci.h b/arch/mn10300/include/asm/pci.h
index 166323824683..5f70af25c7d0 100644
--- a/arch/mn10300/include/asm/pci.h
+++ b/arch/mn10300/include/asm/pci.h
@@ -48,7 +48,6 @@ extern void unit_pci_init(void);
 #define PCIBIOS_MIN_MEM         0xB8000000
 void pcibios_set_master(struct pci_dev *dev);
-void pcibios_penalize_isa_irq(int irq);
 /* Dynamic DMA mapping stuff.
 * i386 has everything mapped statically.
diff --git a/arch/mn10300/unit-asb2305/pci-irq.c b/arch/mn10300/unit-asb2305/pci-irq.c
index 77439da04671..fcb28ceb824d 100644
--- a/arch/mn10300/unit-asb2305/pci-irq.c
+++ b/arch/mn10300/unit-asb2305/pci-irq.c
@@ -40,10 +40,6 @@ void __init pcibios_fixup_irqs(void)
        }
 }
-void __init pcibios_penalize_isa_irq(int irq)
-{
-}
 void pcibios_enable_irq(struct pci_dev *dev)
 {
        pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index 1faefed32749..108d48e652af 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -22,6 +22,7 @@ config PARISC
        select GENERIC_SMP_IDLE_THREAD
        select GENERIC_STRNCPY_FROM_USER
        select SYSCTL_ARCH_UNALIGN_ALLOW
+        select SYSCTL_EXCEPTION_TRACE
        select HAVE_MOD_ARCH_SPECIFIC
        select VIRT_TO_BUS
        select MODULES_USE_ELF_RELA
diff --git a/arch/parisc/include/asm/pci.h b/arch/parisc/include/asm/pci.h
index 465154076d23..20df2b04fc09 100644
--- a/arch/parisc/include/asm/pci.h
+++ b/arch/parisc/include/asm/pci.h
@@ -215,11 +215,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
 }
 #endif
-static inline void pcibios_penalize_isa_irq(int irq, int active)
-{
-        /* We don't need to penalize isa irq's */
-}
 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
 {
        return channel ? 15 : 14;
diff --git a/arch/parisc/include/asm/processor.h b/arch/parisc/include/asm/processor.h
index 198a86feb574..d951c9681ab3 100644
--- a/arch/parisc/include/asm/processor.h
+++ b/arch/parisc/include/asm/processor.h
@@ -55,6 +55,11 @@
 #define STACK_TOP       TASK_SIZE
 #define STACK_TOP_MAX   DEFAULT_TASK_SIZE
+/* Allow bigger stacks for 64-bit processes */
+#define STACK_SIZE_MAX  (USER_WIDE_MODE                                 \
+                         ? (1 << 30)    /* 1 GB */                      \
+                         : (CONFIG_MAX_STACK_SIZE_MB*1024*1024))
 #endif
 #ifndef __ASSEMBLY__
diff --git a/arch/parisc/include/uapi/asm/unistd.h b/arch/parisc/include/uapi/asm/unistd.h
index 265ae5190b0a..47e0e21d2272 100644
--- a/arch/parisc/include/uapi/asm/unistd.h
+++ b/arch/parisc/include/uapi/asm/unistd.h
@@ -829,8 +829,9 @@
 #define __NR_sched_setattr      (__NR_Linux + 334)
 #define __NR_sched_getattr      (__NR_Linux + 335)
 #define __NR_utimes             (__NR_Linux + 336)
+#define __NR_renameat2          (__NR_Linux + 337)
-#define __NR_Linux_syscalls     (__NR_utimes + 1)
+#define __NR_Linux_syscalls     (__NR_renameat2 + 1)
 #define __IGNORE_select         /* newselect */
diff --git a/arch/parisc/kernel/sys_parisc.c b/arch/parisc/kernel/sys_parisc.c
index 31ffa9b55322..e1ffea2f9a0b 100644
--- a/arch/parisc/kernel/sys_parisc.c
+++ b/arch/parisc/kernel/sys_parisc.c
@@ -72,10 +72,10 @@ static unsigned long mmap_upper_limit(void)
 {
        unsigned long stack_base;
-        /* Limit stack size to 1GB - see setup_arg_pages() in fs/exec.c */
+        /* Limit stack size - see setup_arg_pages() in fs/exec.c */
        stack_base = rlimit_max(RLIMIT_STACK);
-        if (stack_base > (1 << 30))
+        if (stack_base > STACK_SIZE_MAX)
-                stack_base = 1 << 30;
+                stack_base = STACK_SIZE_MAX;
        return PAGE_ALIGN(STACK_TOP - stack_base);
 }
diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S
index a63bb179f79a..838786011037 100644
--- a/arch/parisc/kernel/syscall.S
+++ b/arch/parisc/kernel/syscall.S
@@ -589,10 +589,13 @@ cas_nocontend:
 # endif
 /* ENABLE_LWS_DEBUG */
+        rsm     PSW_SM_I, %r0                           /* Disable interrupts */
+        /* COW breaks can cause contention on UP systems */
        LDCW    0(%sr2,%r20), %r28                      /* Try to acquire the lock */
        cmpb,<>,n       %r0, %r28, cas_action           /* Did we get it? */
 cas_wouldblock:
        ldo     2(%r0), %r28                            /* 2nd case */
+        ssm     PSW_SM_I, %r0
        b       lws_exit                                /* Contended... */
        ldo     -EAGAIN(%r0), %r21                      /* Spin in userspace */
@@ -619,15 +622,17 @@ cas_action:
        stw     %r1, 4(%sr2,%r20)
 #endif
        /* The load and store could fail */
-1:      ldw     0(%sr3,%r26), %r28
+1:      ldw,ma  0(%sr3,%r26), %r28
        sub,<>  %r28, %r25, %r0
-2:      stw     %r24, 0(%sr3,%r26)
+2:      stw,ma  %r24, 0(%sr3,%r26)
        /* Free lock */
-        stw     %r20, 0(%sr2,%r20)
+        stw,ma  %r20, 0(%sr2,%r20)
 #if ENABLE_LWS_DEBUG
        /* Clear thread register indicator */
        stw     %r0, 4(%sr2,%r20)
 #endif
+        /* Enable interrupts */
+        ssm     PSW_SM_I, %r0
        /* Return to userspace, set no error */
        b       lws_exit
        copy    %r0, %r21
@@ -639,6 +644,7 @@ cas_action:
 #if ENABLE_LWS_DEBUG
        stw     %r0, 4(%sr2,%r20)
 #endif
+        ssm     PSW_SM_I, %r0
        b       lws_exit
        ldo     -EFAULT(%r0),%r21       /* set errno */
        nop
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index 83ead0ea127d..c5fa7a697fba 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -432,6 +432,7 @@
        ENTRY_SAME(sched_setattr)
        ENTRY_SAME(sched_getattr)       /* 335 */
        ENTRY_COMP(utimes)
+        ENTRY_SAME(renameat2)
        /* Nothing yet */
diff --git a/arch/parisc/kernel/traps.c b/arch/parisc/kernel/traps.c
index 1cd1d0c83b6d..47ee620d15d2 100644
--- a/arch/parisc/kernel/traps.c
+++ b/arch/parisc/kernel/traps.c
@@ -25,6 +25,7 @@
 #include <linux/interrupt.h>
 #include <linux/console.h>
 #include <linux/bug.h>
+#include <linux/ratelimit.h>
 #include <asm/assembly.h>
 #include <asm/uaccess.h>
@@ -42,9 +43,6 @@
 #include "../math-emu/math-emu.h"       /* for handle_fpe() */
-#define PRINT_USER_FAULTS /* (turn this on if you want user faults to be */
-                          /*  dumped to the console via printk)          */
 #if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK)
 DEFINE_SPINLOCK(pa_dbit_lock);
 #endif
@@ -160,6 +158,17 @@ void show_regs(struct pt_regs *regs)
        }
 }
+static DEFINE_RATELIMIT_STATE(_hppa_rs,
+        DEFAULT_RATELIMIT_INTERVAL, DEFAULT_RATELIMIT_BURST);
+#define parisc_printk_ratelimited(critical, regs, fmt, ...)     {             \
+        if ((critical || show_unhandled_signals) && __ratelimit(&_hppa_rs)) { \
+                printk(fmt, ##__VA_ARGS__);                                   \
+                show_regs(regs);                                              \
+        }                                                                     \
+}
 static void do_show_stack(struct unwind_frame_info *info)
 {
        int i = 1;
@@ -229,12 +238,10 @@ void die_if_kernel(char *str, struct pt_regs *regs, long err)
                if (err == 0)
                        return; /* STFU */
-                printk(KERN_CRIT "%s (pid %d): %s (code %ld) at " RFMT "\n",
+                parisc_printk_ratelimited(1, regs,
+                        KERN_CRIT "%s (pid %d): %s (code %ld) at " RFMT "\n",
                        current->comm, task_pid_nr(current), str, err, regs->iaoq[0]);
-#ifdef PRINT_USER_FAULTS
-                /* XXX for debugging only */
-                show_regs(regs);
-#endif
                return;
        }
@@ -321,14 +328,11 @@ static void handle_break(struct pt_regs *regs)
                        (tt == BUG_TRAP_TYPE_NONE) ? 9 : 0);
        }
-#ifdef PRINT_USER_FAULTS
+        if (unlikely(iir != GDB_BREAK_INSN))
-        if (unlikely(iir != GDB_BREAK_INSN)) {
+                parisc_printk_ratelimited(0, regs,
-                printk(KERN_DEBUG "break %d,%d: pid=%d command='%s'\n",
+                        KERN_DEBUG "break %d,%d: pid=%d command='%s'\n",
                        iir & 31, (iir>>13) & ((1<<13)-1),
                        task_pid_nr(current), current->comm);
-                show_regs(regs);
-        }
-#endif
        /* send standard GDB signal */
        handle_gdb_break(regs, TRAP_BRKPT);
@@ -758,11 +762,9 @@ void notrace handle_interruption(int code, struct pt_regs *regs)
        default:
                if (user_mode(regs)) {
-#ifdef PRINT_USER_FAULTS
+                        parisc_printk_ratelimited(0, regs, KERN_DEBUG
-                        printk(KERN_DEBUG "\nhandle_interruption() pid=%d command='%s'\n",
+                                "handle_interruption() pid=%d command='%s'\n",
-                            task_pid_nr(current), current->comm);
+                                task_pid_nr(current), current->comm);
-                        show_regs(regs);
-#endif
                        /* SIGBUS, for lack of a better one. */
                        si.si_signo = SIGBUS;
                        si.si_code = BUS_OBJERR;
@@ -779,16 +781,10 @@ void notrace handle_interruption(int code, struct pt_regs *regs)
        if (user_mode(regs)) {
            if ((fault_space >> SPACEID_SHIFT) != (regs->sr[7] >> SPACEID_SHIFT)) {
-#ifdef PRINT_USER_FAULTS
+                parisc_printk_ratelimited(0, regs, KERN_DEBUG
-                if (fault_space == 0)
+                                "User fault %d on space 0x%08lx, pid=%d command='%s'\n",
-                        printk(KERN_DEBUG "User Fault on Kernel Space ");
+                                code, fault_space,
-                else
+                                task_pid_nr(current), current->comm);
-                        printk(KERN_DEBUG "User Fault (long pointer) (fault %d) ",
-                               code);
-                printk(KERN_CONT "pid=%d command='%s'\n",
-                       task_pid_nr(current), current->comm);
-                show_regs(regs);
-#endif
                si.si_signo = SIGSEGV;
                si.si_errno = 0;
                si.si_code = SEGV_MAPERR;
diff --git a/arch/parisc/mm/fault.c b/arch/parisc/mm/fault.c
index 747550762f3c..3ca9c1131cfe 100644
--- a/arch/parisc/mm/fault.c
+++ b/arch/parisc/mm/fault.c
@@ -19,10 +19,6 @@
 #include <asm/uaccess.h>
 #include <asm/traps.h>
-#define PRINT_USER_FAULTS /* (turn this on if you want user faults to be */
-                         /*  dumped to the console via printk)          */
 /* Various important other fields */
 #define bit22set(x)             (x & 0x00000200)
 #define bits23_25set(x)         (x & 0x000001c0)
@@ -34,6 +30,8 @@
 DEFINE_PER_CPU(struct exception_data, exception_data);
+int show_unhandled_signals = 1;
 /*
 * parisc_acctyp(unsigned int inst) --
 *    Given a PA-RISC memory access instruction, determine if the
@@ -173,6 +171,32 @@ int fixup_exception(struct pt_regs *regs)
        return 0;
 }
+/*
+ * Print out info about fatal segfaults, if the show_unhandled_signals
+ * sysctl is set:
+ */
+static inline void
+show_signal_msg(struct pt_regs *regs, unsigned long code,
+                unsigned long address, struct task_struct *tsk,
+                struct vm_area_struct *vma)
+{
+        if (!unhandled_signal(tsk, SIGSEGV))
+                return;
+        if (!printk_ratelimit())
+                return;
+        pr_warn("\n");
+        pr_warn("do_page_fault() command='%s' type=%lu address=0x%08lx",
+            tsk->comm, code, address);
+        print_vma_addr(KERN_CONT " in ", regs->iaoq[0]);
+        if (vma)
+                pr_warn(" vm_start = 0x%08lx, vm_end = 0x%08lx\n",
+                                vma->vm_start, vma->vm_end);
+        show_regs(regs);
+}
 void do_page_fault(struct pt_regs *regs, unsigned long code,
                              unsigned long address)
 {
@@ -270,16 +294,8 @@ bad_area:
        if (user_mode(regs)) {
                struct siginfo si;
-#ifdef PRINT_USER_FAULTS
+                show_signal_msg(regs, code, address, tsk, vma);
-                printk(KERN_DEBUG "\n");
-                printk(KERN_DEBUG "do_page_fault() pid=%d command='%s' type=%lu address=0x%08lx\n",
-                    task_pid_nr(tsk), tsk->comm, code, address);
-                if (vma) {
-                        printk(KERN_DEBUG "vm_start = 0x%08lx, vm_end = 0x%08lx\n",
-                                        vma->vm_start, vma->vm_end);
-                }
-                show_regs(regs);
-#endif
                switch (code) {
                case 15:        /* Data TLB miss fault/Data page fault */
                        /* send SIGSEGV when outside of vma */
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 4c0cedf4e2c7..ce4c68a4a823 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -150,7 +150,9 @@ endif
 CFLAGS-$(CONFIG_TUNE_CELL) += $(call cc-option,-mtune=cell)
-KBUILD_CPPFLAGS += -Iarch/$(ARCH)
+asinstr := $(call as-instr,lis 9$(comma)foo@high,-DHAVE_AS_ATHIGH=1)
+KBUILD_CPPFLAGS += -Iarch/$(ARCH) $(asinstr)
 KBUILD_AFLAGS   += -Iarch/$(ARCH)
 KBUILD_CFLAGS   += -msoft-float -pipe -Iarch/$(ARCH) $(CFLAGS-y)
 CPP             = $(CC) -E $(KBUILD_CFLAGS)
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 95145a15c708..1b0739bc14b5 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -46,11 +46,6 @@ struct pci_dev;
 #define pcibios_assign_all_busses() \
        (pci_has_flag(PCI_REASSIGN_ALL_BUS))
-static inline void pcibios_penalize_isa_irq(int irq, int active)
-{
-        /* We don't do dynamic PCI IRQ allocation */
-}
 #define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
 {
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 6586a40a46ce..cded7c1278ef 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -318,11 +318,16 @@ n:
        addi    reg,reg,(name - 0b)@l;
 #ifdef __powerpc64__
+#ifdef HAVE_AS_ATHIGH
+#define __AS_ATHIGH high
+#else
+#define __AS_ATHIGH h
+#endif
 #define LOAD_REG_IMMEDIATE(reg,expr)            \
        lis     reg,(expr)@highest;             \
        ori     reg,reg,(expr)@higher;  \
        rldicr  reg,reg,32,31;          \
-        oris    reg,reg,(expr)@h;               \
+        oris    reg,reg,(expr)@__AS_ATHIGH;     \
        ori     reg,reg,(expr)@l;
 #define LOAD_REG_ADDR(reg,name)                 \
diff --git a/arch/powerpc/include/asm/sections.h b/arch/powerpc/include/asm/sections.h
index d0e784e0ff48..521790330672 100644
--- a/arch/powerpc/include/asm/sections.h
+++ b/arch/powerpc/include/asm/sections.h
@@ -39,6 +39,17 @@ static inline int overlaps_kernel_text(unsigned long start, unsigned long end)
                (unsigned long)_stext < end;
 }
+static inline int overlaps_kvm_tmp(unsigned long start, unsigned long end)
+{
+#ifdef CONFIG_KVM_GUEST
+        extern char kvm_tmp[];
+        return start < (unsigned long)kvm_tmp &&
+                (unsigned long)&kvm_tmp[1024 * 1024] < end;
+#else
+        return 0;
+#endif
+}
 #undef dereference_function_descriptor
 static inline void *dereference_function_descriptor(void *ptr)
 {
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index 3ddf70276706..ea4dc3a89c1f 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -361,3 +361,4 @@ SYSCALL(finit_module)
 SYSCALL(ni_syscall) /* sys_kcmp */
 SYSCALL_SPU(sched_setattr)
 SYSCALL_SPU(sched_getattr)
+SYSCALL_SPU(renameat2)
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index 4494f029b632..9b892bbd9d84 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -12,7 +12,7 @@
 #include <uapi/asm/unistd.h>
-#define __NR_syscalls           357
+#define __NR_syscalls           358
 #define __NR__exit __NR_exit
 #define NR_syscalls     __NR_syscalls
diff --git a/arch/powerpc/include/uapi/asm/unistd.h b/arch/powerpc/include/uapi/asm/unistd.h
index 881bf2e2560d..2d526f7b48da 100644
--- a/arch/powerpc/include/uapi/asm/unistd.h
+++ b/arch/powerpc/include/uapi/asm/unistd.h
@@ -379,5 +379,6 @@
 #define __NR_kcmp               354
 #define __NR_sched_setattr      355
 #define __NR_sched_getattr      356
+#define __NR_renameat2          357
 #endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */
diff --git a/arch/powerpc/kernel/kvm.c b/arch/powerpc/kernel/kvm.c
index 6a0175297b0d..dd8695f6cb6d 100644
--- a/arch/powerpc/kernel/kvm.c
+++ b/arch/powerpc/kernel/kvm.c
@@ -74,7 +74,7 @@
 #define KVM_INST_MTSRIN         0x7c0001e4
 static bool kvm_patching_worked = true;
-static char kvm_tmp[1024 * 1024];
+char kvm_tmp[1024 * 1024];
 static int kvm_tmp_index;
 static inline void kvm_patch_ins(u32 *inst, u32 new_inst)
diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c
index 59d229a2a3e0..879b3aacac32 100644
--- a/arch/powerpc/kernel/machine_kexec_64.c
+++ b/arch/powerpc/kernel/machine_kexec_64.c
@@ -237,7 +237,7 @@ static void wake_offline_cpus(void)
                if (!cpu_online(cpu)) {
                        printk(KERN_INFO "kexec: Waking offline cpu %d.\n",
                               cpu);
-                        cpu_up(cpu);
+                        WARN_ON(cpu_up(cpu));
                }
        }
 }
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index d9476c1fc959..24d342e91790 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -201,26 +201,6 @@ struct pci_controller* pci_find_hose_for_OF_device(struct device_node* node)
        return NULL;
 }
-static ssize_t pci_show_devspec(struct device *dev,
-                struct device_attribute *attr, char *buf)
-{
-        struct pci_dev *pdev;
-        struct device_node *np;
-        pdev = to_pci_dev (dev);
-        np = pci_device_to_OF_node(pdev);
-        if (np == NULL || np->full_name == NULL)
-                return 0;
-        return sprintf(buf, "%s", np->full_name);
-}
-static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL);
-/* Add sysfs properties */
-int pcibios_add_platform_entries(struct pci_dev *pdev)
-{
-        return device_create_file(&pdev->dev, &dev_attr_devspec);
-}
 /*
 * Reads the interrupt pin to determine if interrupt is use by card.
 * If the interrupt is used, then gets the interrupt line from the
diff --git a/arch/powerpc/kernel/pci-hotplug.c b/arch/powerpc/kernel/pci-hotplug.c
index c1e17ae68a08..5b789177aa29 100644
--- a/arch/powerpc/kernel/pci-hotplug.c
+++ b/arch/powerpc/kernel/pci-hotplug.c
@@ -98,8 +98,7 @@ void pcibios_add_pci_devices(struct pci_bus * bus)
                max = bus->busn_res.start;
                for (pass = 0; pass < 2; pass++) {
                        list_for_each_entry(dev, &bus->devices, bus_list) {
-                                if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
+                                if (pci_is_bridge(dev))
-                                    dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
                                        max = pci_scan_bridge(bus, dev,
                                                              max, pass);
                        }
diff --git a/arch/powerpc/kernel/pci_of_scan.c b/arch/powerpc/kernel/pci_of_scan.c
index 83c26d829991..059e244484fe 100644
--- a/arch/powerpc/kernel/pci_of_scan.c
+++ b/arch/powerpc/kernel/pci_of_scan.c
@@ -362,8 +362,7 @@ static void __of_scan_bus(struct device_node *node, struct pci_bus *bus,
        /* Now scan child busses */
        list_for_each_entry(dev, &bus->devices, bus_list) {
-                if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
+                if (pci_is_bridge(dev)) {
-                    dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
                        of_scan_pci_bridge(dev);
                }
        }
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 122a580f7322..7e711bdcc6da 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -813,9 +813,6 @@ static void __init clocksource_init(void)
 static int decrementer_set_next_event(unsigned long evt,
                                      struct clock_event_device *dev)
 {
-        /* Don't adjust the decrementer if some irq work is pending */
-        if (test_irq_work_pending())
-                return 0;
        __get_cpu_var(decrementers_next_tb) = get_tb_or_rtc() + evt;
        set_dec(evt);
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index 94e597e6f15c..7af190a266b3 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -886,7 +886,7 @@ static int kvmppc_book3s_init(void)
        r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
        if (r)
                return r;
-#ifdef CONFIG_KVM_BOOK3S_32
+#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
        r = kvmppc_book3s_init_pr();
 #endif
        return r;
@@ -895,7 +895,7 @@ static int kvmppc_book3s_init(void)
 static void kvmppc_book3s_exit(void)
 {
-#ifdef CONFIG_KVM_BOOK3S_32
+#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
        kvmppc_book3s_exit_pr();
 #endif
        kvm_exit();
@@ -905,7 +905,7 @@ module_init(kvmppc_book3s_init);
 module_exit(kvmppc_book3s_exit);
 /* On 32bit this is our one and only kernel module */
-#ifdef CONFIG_KVM_BOOK3S_32
+#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
 MODULE_ALIAS_MISCDEV(KVM_MINOR);
 MODULE_ALIAS("devname:kvm");
 #endif
diff --git a/arch/powerpc/kvm/book3s_hv_rm_mmu.c b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
index 1d6c56ad5b60..8fcc36306a02 100644
--- a/arch/powerpc/kvm/book3s_hv_rm_mmu.c
+++ b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
@@ -234,7 +234,7 @@ long kvmppc_do_h_enter(struct kvm *kvm, unsigned long flags,
                pte_size = psize;
                pte = lookup_linux_pte_and_update(pgdir, hva, writing,
                                                  &pte_size);
-                if (pte_present(pte)) {
+                if (pte_present(pte) && !pte_numa(pte)) {
                        if (writing && !pte_write(pte))
                                /* make the actual HPTE be read-only */
                                ptel = hpte_make_readonly(ptel);
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index b031f932c0cc..07c8b5b0f9d2 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -1323,6 +1323,110 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
        mr      r3, r9
        bl      kvmppc_save_fp
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+BEGIN_FTR_SECTION
+        b       2f
+END_FTR_SECTION_IFCLR(CPU_FTR_TM)
+        /* Turn on TM. */
+        mfmsr   r8
+        li      r0, 1
+        rldimi  r8, r0, MSR_TM_LG, 63-MSR_TM_LG
+        mtmsrd  r8
+        ld      r5, VCPU_MSR(r9)
+        rldicl. r5, r5, 64 - MSR_TS_S_LG, 62
+        beq     1f      /* TM not active in guest. */
+        li      r3, TM_CAUSE_KVM_RESCHED
+        /* Clear the MSR RI since r1, r13 are all going to be foobar. */
+        li      r5, 0
+        mtmsrd  r5, 1
+        /* All GPRs are volatile at this point. */
+        TRECLAIM(R3)
+        /* Temporarily store r13 and r9 so we have some regs to play with */
+        SET_SCRATCH0(r13)
+        GET_PACA(r13)
+        std     r9, PACATMSCRATCH(r13)
+        ld      r9, HSTATE_KVM_VCPU(r13)
+        /* Get a few more GPRs free. */
+        std     r29, VCPU_GPRS_TM(29)(r9)
+        std     r30, VCPU_GPRS_TM(30)(r9)
+        std     r31, VCPU_GPRS_TM(31)(r9)
+        /* Save away PPR and DSCR soon so don't run with user values. */
+        mfspr   r31, SPRN_PPR
+        HMT_MEDIUM
+        mfspr   r30, SPRN_DSCR
+        ld      r29, HSTATE_DSCR(r13)
+        mtspr   SPRN_DSCR, r29
+        /* Save all but r9, r13 & r29-r31 */
+        reg = 0
+        .rept   29
+        .if (reg != 9) && (reg != 13)
+        std     reg, VCPU_GPRS_TM(reg)(r9)
+        .endif
+        reg = reg + 1
+        .endr
+        /* ... now save r13 */
+        GET_SCRATCH0(r4)
+        std     r4, VCPU_GPRS_TM(13)(r9)
+        /* ... and save r9 */
+        ld      r4, PACATMSCRATCH(r13)
+        std     r4, VCPU_GPRS_TM(9)(r9)
+        /* Reload stack pointer and TOC. */
+        ld      r1, HSTATE_HOST_R1(r13)
+        ld      r2, PACATOC(r13)
+        /* Set MSR RI now we have r1 and r13 back. */
+        li      r5, MSR_RI
+        mtmsrd  r5, 1
+        /* Save away checkpinted SPRs. */
+        std     r31, VCPU_PPR_TM(r9)
+        std     r30, VCPU_DSCR_TM(r9)
+        mflr    r5
+        mfcr    r6
+        mfctr   r7
+        mfspr   r8, SPRN_AMR
+        mfspr   r10, SPRN_TAR
+        std     r5, VCPU_LR_TM(r9)
+        stw     r6, VCPU_CR_TM(r9)
+        std     r7, VCPU_CTR_TM(r9)
+        std     r8, VCPU_AMR_TM(r9)
+        std     r10, VCPU_TAR_TM(r9)
+        /* Restore r12 as trap number. */
+        lwz     r12, VCPU_TRAP(r9)
+        /* Save FP/VSX. */
+        addi    r3, r9, VCPU_FPRS_TM
+        bl      .store_fp_state
+        addi    r3, r9, VCPU_VRS_TM
+        bl      .store_vr_state
+        mfspr   r6, SPRN_VRSAVE
+        stw     r6, VCPU_VRSAVE_TM(r9)
+1:
+        /*
+         * We need to save these SPRs after the treclaim so that the software
+         * error code is recorded correctly in the TEXASR.  Also the user may
+         * change these outside of a transaction, so they must always be
+         * context switched.
+         */
+        mfspr   r5, SPRN_TFHAR
+        mfspr   r6, SPRN_TFIAR
+        mfspr   r7, SPRN_TEXASR
+        std     r5, VCPU_TFHAR(r9)
+        std     r6, VCPU_TFIAR(r9)
+        std     r7, VCPU_TEXASR(r9)
+2:
+#endif
        /* Increment yield count if they have a VPA */
        ld      r8, VCPU_VPA(r9)        /* do they have a VPA? */
        cmpdi   r8, 0
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index c5c052a9729c..02f1defd8bb9 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -1153,7 +1153,7 @@ static struct kvm_vcpu *kvmppc_core_vcpu_create_pr(struct kvm *kvm,
                goto free_vcpu;
        vcpu->arch.book3s = vcpu_book3s;
-#ifdef CONFIG_KVM_BOOK3S_32
+#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
        vcpu->arch.shadow_vcpu =
                kzalloc(sizeof(*vcpu->arch.shadow_vcpu), GFP_KERNEL);
        if (!vcpu->arch.shadow_vcpu)
@@ -1198,7 +1198,7 @@ static struct kvm_vcpu *kvmppc_core_vcpu_create_pr(struct kvm *kvm,
 uninit_vcpu:
        kvm_vcpu_uninit(vcpu);
 free_shadow_vcpu:
-#ifdef CONFIG_KVM_BOOK3S_32
+#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
        kfree(vcpu->arch.shadow_vcpu);
 free_vcpu3s:
 #endif
@@ -1215,7 +1215,7 @@ static void kvmppc_core_vcpu_free_pr(struct kvm_vcpu *vcpu)
        free_page((unsigned long)vcpu->arch.shared & PAGE_MASK);
        kvm_vcpu_uninit(vcpu);
-#ifdef CONFIG_KVM_BOOK3S_32
+#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
        kfree(vcpu->arch.shadow_vcpu);
 #endif
        vfree(vcpu_book3s);
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index d766d6ee33fe..06ba83b036d3 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -207,6 +207,10 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
                if (overlaps_kernel_text(vaddr, vaddr + step))
                        tprot &= ~HPTE_R_N;
+                /* Make kvm guest trampolines executable */
+                if (overlaps_kvm_tmp(vaddr, vaddr + step))
+                        tprot &= ~HPTE_R_N;
                /*
                 * If relocatable, check if it overlaps interrupt vectors that
                 * are copied down to real 0. For relocatable kernel
diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c
index 253fefe3d1a0..5b51079f3e3b 100644
--- a/arch/powerpc/platforms/powernv/eeh-ioda.c
+++ b/arch/powerpc/platforms/powernv/eeh-ioda.c
@@ -549,7 +549,8 @@ static int ioda_eeh_reset(struct eeh_pe *pe, int option)
                ret = ioda_eeh_phb_reset(hose, option);
        } else {
                bus = eeh_pe_bus_get(pe);
-                if (pci_is_root_bus(bus))
+                if (pci_is_root_bus(bus) ||
+                    pci_is_root_bus(bus->parent))
                        ret = ioda_eeh_root_reset(hose, option);
                else
                        ret = ioda_eeh_bridge_reset(hose, bus->self, option);
diff --git a/arch/s390/crypto/aes_s390.c b/arch/s390/crypto/aes_s390.c
index cf3c0089bef2..23223cd63e54 100644
--- a/arch/s390/crypto/aes_s390.c
+++ b/arch/s390/crypto/aes_s390.c
@@ -820,6 +820,9 @@ static int ctr_aes_crypt(struct blkcipher_desc *desc, long func,
                else
                        memcpy(walk->iv, ctrptr, AES_BLOCK_SIZE);
                spin_unlock(&ctrblk_lock);
+        } else {
+                if (!nbytes)
+                        memcpy(walk->iv, ctrptr, AES_BLOCK_SIZE);
        }
        /*
         * final block may be < AES_BLOCK_SIZE, copy only nbytes
diff --git a/arch/s390/crypto/des_s390.c b/arch/s390/crypto/des_s390.c
index 0a5aac8a9412..7acb77f7ef1a 100644
--- a/arch/s390/crypto/des_s390.c
+++ b/arch/s390/crypto/des_s390.c
@@ -429,6 +429,9 @@ static int ctr_desall_crypt(struct blkcipher_desc *desc, long func,
                else
                        memcpy(walk->iv, ctrptr, DES_BLOCK_SIZE);
                spin_unlock(&ctrblk_lock);
+        } else {
+                if (!nbytes)
+                        memcpy(walk->iv, ctrptr, DES_BLOCK_SIZE);
        }
        /* final block may be < DES_BLOCK_SIZE, copy only nbytes */
        if (nbytes) {
diff --git a/arch/s390/include/asm/pci.h b/arch/s390/include/asm/pci.h
index 2583466f576b..79b5f0783a30 100644
--- a/arch/s390/include/asm/pci.h
+++ b/arch/s390/include/asm/pci.h
@@ -120,6 +120,8 @@ static inline bool zdev_enabled(struct zpci_dev *zdev)
        return (zdev->fh & (1UL << 31)) ? true : false;
 }
+extern const struct attribute_group *zpci_attr_groups[];
 /* -----------------------------------------------------------------------------
  Prototypes
 ----------------------------------------------------------------------------- */
@@ -166,10 +168,6 @@ static inline void zpci_exit_slot(struct zpci_dev *zdev) {}
 struct zpci_dev *get_zdev(struct pci_dev *);
 struct zpci_dev *get_zdev_by_fid(u32);
-/* sysfs */
-int zpci_sysfs_add_device(struct device *);
-void zpci_sysfs_remove_device(struct device *);
 /* DMA */
 int zpci_dma_init(void);
 void zpci_dma_exit(void);
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
index b3ecb8f5b6ce..9ae6664ff08c 100644
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@ -158,6 +158,7 @@ int kvm_dev_ioctl_check_extension(long ext)
        case KVM_CAP_ONE_REG:
        case KVM_CAP_ENABLE_CAP:
        case KVM_CAP_S390_CSS_SUPPORT:
+        case KVM_CAP_IRQFD:
        case KVM_CAP_IOEVENTFD:
        case KVM_CAP_DEVICE_CTRL:
        case KVM_CAP_ENABLE_CAP_VM:
diff --git a/arch/s390/net/bpf_jit_comp.c b/arch/s390/net/bpf_jit_comp.c
index 452d3ebd9d0f..e9f8fa9337fe 100644
--- a/arch/s390/net/bpf_jit_comp.c
+++ b/arch/s390/net/bpf_jit_comp.c
@@ -811,7 +811,7 @@ static struct bpf_binary_header *bpf_alloc_binary(unsigned int bpfsize,
                return NULL;
        memset(header, 0, sz);
        header->pages = sz / PAGE_SIZE;
-        hole = sz - (bpfsize + sizeof(*header));
+        hole = min(sz - (bpfsize + sizeof(*header)), PAGE_SIZE - sizeof(*header));
        /* Insert random number of illegal instructions before BPF code
         * and make sure the first instruction starts at an even address.
         */
diff --git a/arch/s390/pci/pci.c b/arch/s390/pci/pci.c
index 1df1d29ac81d..bdf02570d1df 100644
--- a/arch/s390/pci/pci.c
+++ b/arch/s390/pci/pci.c
@@ -530,11 +530,6 @@ static void zpci_unmap_resources(struct zpci_dev *zdev)
        }
 }
-int pcibios_add_platform_entries(struct pci_dev *pdev)
-{
-        return zpci_sysfs_add_device(&pdev->dev);
-}
 static int __init zpci_irq_init(void)
 {
        int rc;
@@ -671,6 +666,7 @@ int pcibios_add_device(struct pci_dev *pdev)
        int i;
        zdev->pdev = pdev;
+        pdev->dev.groups = zpci_attr_groups;
        zpci_map_resources(zdev);
        for (i = 0; i < PCI_BAR_COUNT; i++) {
diff --git a/arch/s390/pci/pci_sysfs.c b/arch/s390/pci/pci_sysfs.c
index ab4a91393005..b56a3958f1a7 100644
--- a/arch/s390/pci/pci_sysfs.c
+++ b/arch/s390/pci/pci_sysfs.c
@@ -72,36 +72,18 @@ static ssize_t store_recover(struct device *dev, struct device_attribute *attr,
 }
 static DEVICE_ATTR(recover, S_IWUSR, NULL, store_recover);
-static struct device_attribute *zpci_dev_attrs[] = {
+static struct attribute *zpci_dev_attrs[] = {
-        &dev_attr_function_id,
+        &dev_attr_function_id.attr,
-        &dev_attr_function_handle,
+        &dev_attr_function_handle.attr,
-        &dev_attr_pchid,
+        &dev_attr_pchid.attr,
-        &dev_attr_pfgid,
+        &dev_attr_pfgid.attr,
-        &dev_attr_recover,
+        &dev_attr_recover.attr,
+        NULL,
+};
+static struct attribute_group zpci_attr_group = {
+        .attrs = zpci_dev_attrs,
+};
+const struct attribute_group *zpci_attr_groups[] = {
+        &zpci_attr_group,
        NULL,
 };
-int zpci_sysfs_add_device(struct device *dev)
-{
-        int i, rc = 0;
-        for (i = 0; zpci_dev_attrs[i]; i++) {
-                rc = device_create_file(dev, zpci_dev_attrs[i]);
-                if (rc)
-                        goto error;
-        }
-        return 0;
-error:
-        while (--i >= 0)
-                device_remove_file(dev, zpci_dev_attrs[i]);
-        return rc;
-}
-void zpci_sysfs_remove_device(struct device *dev)
-{
-        int i;
-        for (i = 0; zpci_dev_attrs[i]; i++)
-                device_remove_file(dev, zpci_dev_attrs[i]);
-}
diff --git a/arch/sh/drivers/pci/fixups-dreamcast.c b/arch/sh/drivers/pci/fixups-dreamcast.c
index d6cde700e316..1d1c5a227e50 100644
--- a/arch/sh/drivers/pci/fixups-dreamcast.c
+++ b/arch/sh/drivers/pci/fixups-dreamcast.c
@@ -31,6 +31,8 @@
 static void gapspci_fixup_resources(struct pci_dev *dev)
 {
        struct pci_channel *p = dev->sysdata;
+        struct resource res;
+        struct pci_bus_region region;
        printk(KERN_NOTICE "PCI: Fixing up device %s\n", pci_name(dev));
@@ -50,11 +52,21 @@ static void gapspci_fixup_resources(struct pci_dev *dev)
                /*
                 * Redirect dma memory allocations to special memory window.
+                 *
+                 * If this GAPSPCI region were mapped by a BAR, the CPU
+                 * phys_addr_t would be pci_resource_start(), and the bus
+                 * address would be pci_bus_address(pci_resource_start()).
+                 * But apparently there's no BAR mapping it, so we just
+                 * "know" its CPU address is GAPSPCI_DMA_BASE.
                 */
+                res.start = GAPSPCI_DMA_BASE;
+                res.end = GAPSPCI_DMA_BASE + GAPSPCI_DMA_SIZE - 1;
+                res.flags = IORESOURCE_MEM;
+                pcibios_resource_to_bus(dev->bus, &region, &res);
                BUG_ON(!dma_declare_coherent_memory(&dev->dev,
-                                                GAPSPCI_DMA_BASE,
+                                                res.start,
-                                                GAPSPCI_DMA_BASE,
+                                                region.start,
-                                                GAPSPCI_DMA_SIZE,
+                                                resource_size(&res),
                                                DMA_MEMORY_MAP |
                                                DMA_MEMORY_EXCLUSIVE));
                break;
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h
index bff96c2e7d25..5b4511552998 100644
--- a/arch/sh/include/asm/pci.h
+++ b/arch/sh/include/asm/pci.h
@@ -70,11 +70,6 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
        enum pci_mmap_state mmap_state, int write_combine);
 extern void pcibios_set_master(struct pci_dev *dev);
-static inline void pcibios_penalize_isa_irq(int irq, int active)
-{
-        /* We don't do dynamic PCI IRQ allocation */
-}
 /* Dynamic DMA mapping stuff.
 * SuperH has everything mapped statically like x86.
 */
diff --git a/arch/sh/kernel/cpu/clock-cpg.c b/arch/sh/kernel/cpu/clock-cpg.c
index f59b1f30d44b..8525a671266f 100644
--- a/arch/sh/kernel/cpu/clock-cpg.c
+++ b/arch/sh/kernel/cpu/clock-cpg.c
@@ -56,9 +56,13 @@ int __init __deprecated cpg_clk_init(void)
        clkdev_add_table(lookups, ARRAY_SIZE(lookups));
-        clk_add_alias("tmu_fck", NULL, "peripheral_clk", NULL);
+        clk_add_alias("fck", "sh-tmu-sh3.0", "peripheral_clk", NULL);
-        clk_add_alias("mtu2_fck", NULL, "peripheral_clk", NULL);
+        clk_add_alias("fck", "sh-tmu.0", "peripheral_clk", NULL);
-        clk_add_alias("cmt_fck", NULL, "peripheral_clk", NULL);
+        clk_add_alias("fck", "sh-tmu.1", "peripheral_clk", NULL);
+        clk_add_alias("fck", "sh-tmu.2", "peripheral_clk", NULL);
+        clk_add_alias("fck", "sh-mtu2", "peripheral_clk", NULL);
+        clk_add_alias("fck", "sh-cmt-16.0", "peripheral_clk", NULL);
+        clk_add_alias("fck", "sh-cmt-32.0", "peripheral_clk", NULL);
        clk_add_alias("sci_ick", NULL, "peripheral_clk", NULL);
        return ret;
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index 3860b0be56c7..58c19adae900 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -152,62 +152,24 @@ static struct platform_device eth_device = {
        .resource = eth_resources,
 };
-static struct sh_timer_config cmt0_platform_data = {
+static struct sh_timer_config cmt_platform_data = {
-        .channel_offset = 0x02,
+        .channels_mask = 3,
-        .timer_bit = 0,
-        .clockevent_rating = 125,
-        .clocksource_rating = 0, /* disabled due to code generation issues */
 };
-static struct resource cmt0_resources[] = {
+static struct resource cmt_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xf84a0070, 0x10),
-                .start  = 0xf84a0072,
+        DEFINE_RES_IRQ(86),
-                .end    = 0xf84a0077,
+        DEFINE_RES_IRQ(87),
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 86,
-                .flags  = IORESOURCE_IRQ,
-        },
 };
-static struct platform_device cmt0_device = {
+static struct platform_device cmt_device = {
-        .name           = "sh_cmt",
+        .name           = "sh-cmt-16",
        .id             = 0,
        .dev = {
-                .platform_data  = &cmt0_platform_data,
+                .platform_data  = &cmt_platform_data,
-        },
-        .resource       = cmt0_resources,
-        .num_resources  = ARRAY_SIZE(cmt0_resources),
-};
-static struct sh_timer_config cmt1_platform_data = {
-        .channel_offset = 0x08,
-        .timer_bit = 1,
-        .clockevent_rating = 125,
-        .clocksource_rating = 0, /* disabled due to code generation issues */
-};
-static struct resource cmt1_resources[] = {
-        [0] = {
-                .start  = 0xf84a0078,
-                .end    = 0xf84a007d,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 87,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device cmt1_device = {
-        .name           = "sh_cmt",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &cmt1_platform_data,
        },
-        .resource       = cmt1_resources,
+        .resource       = cmt_resources,
-        .num_resources  = ARRAY_SIZE(cmt1_resources),
+        .num_resources  = ARRAY_SIZE(cmt_resources),
 };
 static struct platform_device *sh7619_devices[] __initdata = {
@@ -215,8 +177,7 @@ static struct platform_device *sh7619_devices[] __initdata = {
        &scif1_device,
        &scif2_device,
        &eth_device,
-        &cmt0_device,
+        &cmt_device,
-        &cmt1_device,
 };
 static int __init sh7619_devices_setup(void)
@@ -235,8 +196,7 @@ static struct platform_device *sh7619_early_devices[] __initdata = {
        &scif0_device,
        &scif1_device,
        &scif2_device,
-        &cmt0_device,
+        &cmt_device,
-        &cmt1_device,
 };
 #define STBCR3 0xf80a0000
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7264.c b/arch/sh/kernel/cpu/sh2a/clock-sh7264.c
index fdf585c95289..8638fba6cd7f 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7264.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7264.c
@@ -117,9 +117,9 @@ static struct clk_lookup lookups[] = {
        /* MSTP clocks */
        CLKDEV_CON_ID("sci_ick", &mstp_clks[MSTP77]),
        CLKDEV_CON_ID("vdc3", &mstp_clks[MSTP74]),
-        CLKDEV_CON_ID("cmt_fck", &mstp_clks[MSTP72]),
+        CLKDEV_ICK_ID("fck", "sh-cmt-16.0", &mstp_clks[MSTP72]),
        CLKDEV_CON_ID("usb0", &mstp_clks[MSTP60]),
-        CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP35]),
+        CLKDEV_ICK_ID("fck", "sh-mtu2", &mstp_clks[MSTP35]),
        CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP34]),
        CLKDEV_CON_ID("sdhi1", &mstp_clks[MSTP33]),
        CLKDEV_CON_ID("adc0", &mstp_clks[MSTP32]),
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7269.c b/arch/sh/kernel/cpu/sh2a/clock-sh7269.c
index 6b787620de99..f8a5c2abdfb3 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7269.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7269.c
@@ -158,9 +158,9 @@ static struct clk_lookup lookups[] = {
        CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]),
        CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]),
        CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]),
-        CLKDEV_CON_ID("cmt_fck", &mstp_clks[MSTP72]),
+        CLKDEV_ICK_ID("fck", "sh-cmt-16.0", &mstp_clks[MSTP72]),
        CLKDEV_CON_ID("usb0", &mstp_clks[MSTP60]),
-        CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP35]),
+        CLKDEV_ICK_ID("fck", "sh-mtu2", &mstp_clks[MSTP35]),
        CLKDEV_CON_ID("adc0", &mstp_clks[MSTP32]),
        CLKDEV_CON_ID("rtc0", &mstp_clks[MSTP30]),
 };
diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
index 63e996f9a7ed..26fcdbd4127a 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
@@ -114,88 +114,18 @@ static struct intc_mask_reg mask_registers[] __initdata = {
 static DECLARE_INTC_DESC(intc_desc, "mxg", vectors, groups,
                         mask_registers, prio_registers, NULL);
-static struct sh_timer_config mtu2_0_platform_data = {
+static struct resource mtu2_resources[] = {
-        .channel_offset = -0x80,
+        DEFINE_RES_MEM(0xff801000, 0x400),
-        .timer_bit = 0,
+        DEFINE_RES_IRQ_NAMED(228, "tgi0a"),
-        .clockevent_rating = 200,
+        DEFINE_RES_IRQ_NAMED(234, "tgi1a"),
+        DEFINE_RES_IRQ_NAMED(240, "tgi2a"),
 };
-static struct resource mtu2_0_resources[] = {
+static struct platform_device mtu2_device = {
-        [0] = {
+        .name           = "sh-mtu2",
-                .start  = 0xff801300,
+        .id             = -1,
-                .end    = 0xff801326,
+        .resource       = mtu2_resources,
-                .flags  = IORESOURCE_MEM,
+        .num_resources  = ARRAY_SIZE(mtu2_resources),
-        },
-        [1] = {
-                .start  = 228,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device mtu2_0_device = {
-        .name           = "sh_mtu2",
-        .id             = 0,
-        .dev = {
-                .platform_data  = &mtu2_0_platform_data,
-        },
-        .resource       = mtu2_0_resources,
-        .num_resources  = ARRAY_SIZE(mtu2_0_resources),
-};
-static struct sh_timer_config mtu2_1_platform_data = {
-        .channel_offset = -0x100,
-        .timer_bit = 1,
-        .clockevent_rating = 200,
-};
-static struct resource mtu2_1_resources[] = {
-        [0] = {
-                .start  = 0xff801380,
-                .end    = 0xff801390,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 234,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device mtu2_1_device = {
-        .name           = "sh_mtu2",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &mtu2_1_platform_data,
-        },
-        .resource       = mtu2_1_resources,
-        .num_resources  = ARRAY_SIZE(mtu2_1_resources),
-};
-static struct sh_timer_config mtu2_2_platform_data = {
-        .channel_offset = 0x80,
-        .timer_bit = 2,
-        .clockevent_rating = 200,
-};
-static struct resource mtu2_2_resources[] = {
-        [0] = {
-                .start  = 0xff801000,
-                .end    = 0xff80100a,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 240,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device mtu2_2_device = {
-        .name           = "sh_mtu2",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &mtu2_2_platform_data,
-        },
-        .resource       = mtu2_2_resources,
-        .num_resources  = ARRAY_SIZE(mtu2_2_resources),
 };
 static struct plat_sci_port scif0_platform_data = {
@@ -221,9 +151,7 @@ static struct platform_device scif0_device = {
 static struct platform_device *mxg_devices[] __initdata = {
        &scif0_device,
-        &mtu2_0_device,
+        &mtu2_device,
-        &mtu2_1_device,
-        &mtu2_2_device,
 };
 static int __init mxg_devices_setup(void)
@@ -240,9 +168,7 @@ void __init plat_irq_setup(void)
 static struct platform_device *mxg_early_devices[] __initdata = {
        &scif0_device,
-        &mtu2_0_device,
+        &mtu2_device,
-        &mtu2_1_device,
-        &mtu2_2_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
index 2c6874461536..abc0ce9fb800 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
@@ -365,88 +365,18 @@ static struct platform_device rtc_device = {
        .resource       = rtc_resources,
 };
-static struct sh_timer_config mtu2_0_platform_data = {
+static struct resource mtu2_resources[] = {
-        .channel_offset = -0x80,
+        DEFINE_RES_MEM(0xfffe4000, 0x400),
-        .timer_bit = 0,
+        DEFINE_RES_IRQ_NAMED(108, "tgi0a"),
-        .clockevent_rating = 200,
+        DEFINE_RES_IRQ_NAMED(116, "tgi1a"),
+        DEFINE_RES_IRQ_NAMED(124, "tgi1b"),
 };
-static struct resource mtu2_0_resources[] = {
+static struct platform_device mtu2_device = {
-        [0] = {
+        .name           = "sh-mtu2",
-                .start  = 0xfffe4300,
+        .id             = -1,
-                .end    = 0xfffe4326,
+        .resource       = mtu2_resources,
-                .flags  = IORESOURCE_MEM,
+        .num_resources  = ARRAY_SIZE(mtu2_resources),
-        },
-        [1] = {
-                .start  = 108,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device mtu2_0_device = {
-        .name           = "sh_mtu2",
-        .id             = 0,
-        .dev = {
-                .platform_data  = &mtu2_0_platform_data,
-        },
-        .resource       = mtu2_0_resources,
-        .num_resources  = ARRAY_SIZE(mtu2_0_resources),
-};
-static struct sh_timer_config mtu2_1_platform_data = {
-        .channel_offset = -0x100,
-        .timer_bit = 1,
-        .clockevent_rating = 200,
-};
-static struct resource mtu2_1_resources[] = {
-        [0] = {
-                .start  = 0xfffe4380,
-                .end    = 0xfffe4390,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 116,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device mtu2_1_device = {
-        .name           = "sh_mtu2",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &mtu2_1_platform_data,
-        },
-        .resource       = mtu2_1_resources,
-        .num_resources  = ARRAY_SIZE(mtu2_1_resources),
-};
-static struct sh_timer_config mtu2_2_platform_data = {
-        .channel_offset = 0x80,
-        .timer_bit = 2,
-        .clockevent_rating = 200,
-};
-static struct resource mtu2_2_resources[] = {
-        [0] = {
-                .start  = 0xfffe4000,
-                .end    = 0xfffe400a,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 124,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device mtu2_2_device = {
-        .name           = "sh_mtu2",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &mtu2_2_platform_data,
-        },
-        .resource       = mtu2_2_resources,
-        .num_resources  = ARRAY_SIZE(mtu2_2_resources),
 };
 static struct platform_device *sh7201_devices[] __initdata = {
@@ -459,9 +389,7 @@ static struct platform_device *sh7201_devices[] __initdata = {
        &scif6_device,
        &scif7_device,
        &rtc_device,
-        &mtu2_0_device,
+        &mtu2_device,
-        &mtu2_1_device,
-        &mtu2_2_device,
 };
 static int __init sh7201_devices_setup(void)
@@ -485,9 +413,7 @@ static struct platform_device *sh7201_early_devices[] __initdata = {
        &scif5_device,
        &scif6_device,
        &scif7_device,
-        &mtu2_0_device,
+        &mtu2_device,
-        &mtu2_1_device,
-        &mtu2_2_device,
 };
 #define STBCR3 0xfffe0408
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
index d55a0f30ada3..3b4894cba92f 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
@@ -265,118 +265,37 @@ static struct platform_device scif3_device = {
        },
 };
-static struct sh_timer_config cmt0_platform_data = {
+static struct sh_timer_config cmt_platform_data = {
-        .channel_offset = 0x02,
+        .channels_mask = 3,
-        .timer_bit = 0,
-        .clockevent_rating = 125,
-        .clocksource_rating = 0, /* disabled due to code generation issues */
 };
-static struct resource cmt0_resources[] = {
+static struct resource cmt_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xfffec000, 0x10),
-                .start  = 0xfffec002,
+        DEFINE_RES_IRQ(142),
-                .end    = 0xfffec007,
+        DEFINE_RES_IRQ(143),
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 142,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device cmt0_device = {
-        .name           = "sh_cmt",
-        .id             = 0,
-        .dev = {
-                .platform_data  = &cmt0_platform_data,
-        },
-        .resource       = cmt0_resources,
-        .num_resources  = ARRAY_SIZE(cmt0_resources),
-};
-static struct sh_timer_config cmt1_platform_data = {
-        .channel_offset = 0x08,
-        .timer_bit = 1,
-        .clockevent_rating = 125,
-        .clocksource_rating = 0, /* disabled due to code generation issues */
-};
-static struct resource cmt1_resources[] = {
-        [0] = {
-                .start  = 0xfffec008,
-                .end    = 0xfffec00d,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 143,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device cmt1_device = {
-        .name           = "sh_cmt",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &cmt1_platform_data,
-        },
-        .resource       = cmt1_resources,
-        .num_resources  = ARRAY_SIZE(cmt1_resources),
-};
-static struct sh_timer_config mtu2_0_platform_data = {
-        .channel_offset = -0x80,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
-};
-static struct resource mtu2_0_resources[] = {
-        [0] = {
-                .start  = 0xfffe4300,
-                .end    = 0xfffe4326,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 146,
-                .flags  = IORESOURCE_IRQ,
-        },
 };
-static struct platform_device mtu2_0_device = {
+static struct platform_device cmt_device = {
-        .name           = "sh_mtu2",
+        .name           = "sh-cmt-16",
        .id             = 0,
        .dev = {
-                .platform_data  = &mtu2_0_platform_data,
+                .platform_data  = &cmt_platform_data,
        },
-        .resource       = mtu2_0_resources,
+        .resource       = cmt_resources,
-        .num_resources  = ARRAY_SIZE(mtu2_0_resources),
+        .num_resources  = ARRAY_SIZE(cmt_resources),
 };
-static struct sh_timer_config mtu2_1_platform_data = {
+static struct resource mtu2_resources[] = {
-        .channel_offset = -0x100,
+        DEFINE_RES_MEM(0xfffe4000, 0x400),
-        .timer_bit = 1,
+        DEFINE_RES_IRQ_NAMED(146, "tgi0a"),
-        .clockevent_rating = 200,
+        DEFINE_RES_IRQ_NAMED(153, "tgi1a"),
 };
-static struct resource mtu2_1_resources[] = {
+static struct platform_device mtu2_device = {
-        [0] = {
+        .name           = "sh-mtu2",
-                .start  = 0xfffe4380,
+        .id             = -1,
-                .end    = 0xfffe4390,
+        .resource       = mtu2_resources,
-                .flags  = IORESOURCE_MEM,
+        .num_resources  = ARRAY_SIZE(mtu2_resources),
-        },
-        [1] = {
-                .start  = 153,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device mtu2_1_device = {
-        .name           = "sh_mtu2",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &mtu2_1_platform_data,
-        },
-        .resource       = mtu2_1_resources,
-        .num_resources  = ARRAY_SIZE(mtu2_1_resources),
 };
 static struct resource rtc_resources[] = {
@@ -404,10 +323,8 @@ static struct platform_device *sh7203_devices[] __initdata = {
        &scif1_device,
        &scif2_device,
        &scif3_device,
-        &cmt0_device,
+        &cmt_device,
-        &cmt1_device,
+        &mtu2_device,
-        &mtu2_0_device,
-        &mtu2_1_device,
        &rtc_device,
 };
@@ -428,10 +345,8 @@ static struct platform_device *sh7203_early_devices[] __initdata = {
        &scif1_device,
        &scif2_device,
        &scif3_device,
-        &cmt0_device,
+        &cmt_device,
-        &cmt1_device,
+        &mtu2_device,
-        &mtu2_0_device,
-        &mtu2_1_device,
 };
 #define STBCR3 0xfffe0408
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index 241e745e3ced..49bc5a34bec1 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -217,146 +217,38 @@ static struct platform_device scif3_device = {
        },
 };
-static struct sh_timer_config cmt0_platform_data = {
+static struct sh_timer_config cmt_platform_data = {
-        .channel_offset = 0x02,
+        .channels_mask = 3,
-        .timer_bit = 0,
-        .clockevent_rating = 125,
-        .clocksource_rating = 0, /* disabled due to code generation issues */
 };
-static struct resource cmt0_resources[] = {
+static struct resource cmt_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xfffec000, 0x10),
-                .start  = 0xfffec002,
+        DEFINE_RES_IRQ(140),
-                .end    = 0xfffec007,
+        DEFINE_RES_IRQ(144),
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 140,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device cmt0_device = {
-        .name           = "sh_cmt",
-        .id             = 0,
-        .dev = {
-                .platform_data  = &cmt0_platform_data,
-        },
-        .resource       = cmt0_resources,
-        .num_resources  = ARRAY_SIZE(cmt0_resources),
-};
-static struct sh_timer_config cmt1_platform_data = {
-        .channel_offset = 0x08,
-        .timer_bit = 1,
-        .clockevent_rating = 125,
-        .clocksource_rating = 0, /* disabled due to code generation issues */
-};
-static struct resource cmt1_resources[] = {
-        [0] = {
-                .start  = 0xfffec008,
-                .end    = 0xfffec00d,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 144,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device cmt1_device = {
-        .name           = "sh_cmt",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &cmt1_platform_data,
-        },
-        .resource       = cmt1_resources,
-        .num_resources  = ARRAY_SIZE(cmt1_resources),
-};
-static struct sh_timer_config mtu2_0_platform_data = {
-        .channel_offset = -0x80,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
-};
-static struct resource mtu2_0_resources[] = {
-        [0] = {
-                .start  = 0xfffe4300,
-                .end    = 0xfffe4326,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 156,
-                .flags  = IORESOURCE_IRQ,
-        },
 };
-static struct platform_device mtu2_0_device = {
+static struct platform_device cmt_device = {
-        .name           = "sh_mtu2",
+        .name           = "sh-cmt-16",
        .id             = 0,
        .dev = {
-                .platform_data  = &mtu2_0_platform_data,
+                .platform_data  = &cmt_platform_data,
        },
-        .resource       = mtu2_0_resources,
+        .resource       = cmt_resources,
-        .num_resources  = ARRAY_SIZE(mtu2_0_resources),
+        .num_resources  = ARRAY_SIZE(cmt_resources),
 };
-static struct sh_timer_config mtu2_1_platform_data = {
+static struct resource mtu2_resources[] = {
-        .channel_offset = -0x100,
+        DEFINE_RES_MEM(0xfffe4000, 0x400),
-        .timer_bit = 1,
+        DEFINE_RES_IRQ_NAMED(156, "tgi0a"),
-        .clockevent_rating = 200,
+        DEFINE_RES_IRQ_NAMED(164, "tgi1a"),
+        DEFINE_RES_IRQ_NAMED(180, "tgi2a"),
 };
-static struct resource mtu2_1_resources[] = {
+static struct platform_device mtu2_device = {
-        [0] = {
+        .name           = "sh-mtu2s",
-                .start  = 0xfffe4380,
+        .id             = -1,
-                .end    = 0xfffe4390,
+        .resource       = mtu2_resources,
-                .flags  = IORESOURCE_MEM,
+        .num_resources  = ARRAY_SIZE(mtu2_resources),
-        },
-        [1] = {
-                .start  = 164,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device mtu2_1_device = {
-        .name           = "sh_mtu2",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &mtu2_1_platform_data,
-        },
-        .resource       = mtu2_1_resources,
-        .num_resources  = ARRAY_SIZE(mtu2_1_resources),
-};
-static struct sh_timer_config mtu2_2_platform_data = {
-        .channel_offset = 0x80,
-        .timer_bit = 2,
-        .clockevent_rating = 200,
-};
-static struct resource mtu2_2_resources[] = {
-        [0] = {
-                .start  = 0xfffe4000,
-                .end    = 0xfffe400a,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 180,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device mtu2_2_device = {
-        .name           = "sh_mtu2",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &mtu2_2_platform_data,
-        },
-        .resource       = mtu2_2_resources,
-        .num_resources  = ARRAY_SIZE(mtu2_2_resources),
 };
 static struct platform_device *sh7206_devices[] __initdata = {
@@ -364,11 +256,8 @@ static struct platform_device *sh7206_devices[] __initdata = {
        &scif1_device,
        &scif2_device,
        &scif3_device,
-        &cmt0_device,
+        &cmt_device,
-        &cmt1_device,
+        &mtu2_device,
-        &mtu2_0_device,
-        &mtu2_1_device,
-        &mtu2_2_device,
 };
 static int __init sh7206_devices_setup(void)
@@ -388,11 +277,8 @@ static struct platform_device *sh7206_early_devices[] __initdata = {
        &scif1_device,
        &scif2_device,
        &scif3_device,
-        &cmt0_device,
+        &cmt_device,
-        &cmt1_device,
+        &mtu2_device,
-        &mtu2_0_device,
-        &mtu2_1_device,
-        &mtu2_2_device,
 };
 #define STBCR3 0xfffe0408
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7264.c b/arch/sh/kernel/cpu/sh2a/setup-sh7264.c
index ad5b0f429882..608146455562 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7264.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7264.c
@@ -433,125 +433,37 @@ static struct platform_device scif7_device = {
        },
 };
-static struct sh_timer_config cmt0_platform_data = {
+static struct sh_timer_config cmt_platform_data = {
-        .channel_offset = 0x02,
+        .channels_mask = 3,
-        .timer_bit = 0,
-        .clockevent_rating = 125,
-        .clocksource_rating = 0, /* disabled due to code generation issues */
 };
-static struct resource cmt0_resources[] = {
+static struct resource cmt_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xfffec000, 0x10),
-                .name   = "CMT0",
+        DEFINE_RES_IRQ(175),
-                .start  = 0xfffec002,
+        DEFINE_RES_IRQ(176),
-                .end    = 0xfffec007,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 175,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device cmt0_device = {
-        .name           = "sh_cmt",
-        .id             = 0,
-        .dev = {
-                .platform_data  = &cmt0_platform_data,
-        },
-        .resource       = cmt0_resources,
-        .num_resources  = ARRAY_SIZE(cmt0_resources),
-};
-static struct sh_timer_config cmt1_platform_data = {
-        .name = "CMT1",
-        .channel_offset = 0x08,
-        .timer_bit = 1,
-        .clockevent_rating = 125,
-        .clocksource_rating = 0, /* disabled due to code generation issues */
-};
-static struct resource cmt1_resources[] = {
-        [0] = {
-                .name   = "CMT1",
-                .start  = 0xfffec008,
-                .end    = 0xfffec00d,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 176,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device cmt1_device = {
-        .name           = "sh_cmt",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &cmt1_platform_data,
-        },
-        .resource       = cmt1_resources,
-        .num_resources  = ARRAY_SIZE(cmt1_resources),
-};
-static struct sh_timer_config mtu2_0_platform_data = {
-        .name = "MTU2_0",
-        .channel_offset = -0x80,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
-};
-static struct resource mtu2_0_resources[] = {
-        [0] = {
-                .name   = "MTU2_0",
-                .start  = 0xfffe4300,
-                .end    = 0xfffe4326,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 179,
-                .flags  = IORESOURCE_IRQ,
-        },
 };
-static struct platform_device mtu2_0_device = {
+static struct platform_device cmt_device = {
-        .name           = "sh_mtu2",
+        .name           = "sh-cmt-16",
        .id             = 0,
        .dev = {
-                .platform_data  = &mtu2_0_platform_data,
+                .platform_data  = &cmt_platform_data,
        },
-        .resource       = mtu2_0_resources,
+        .resource       = cmt_resources,
-        .num_resources  = ARRAY_SIZE(mtu2_0_resources),
+        .num_resources  = ARRAY_SIZE(cmt_resources),
 };
-static struct sh_timer_config mtu2_1_platform_data = {
+static struct resource mtu2_resources[] = {
-        .name = "MTU2_1",
+        DEFINE_RES_MEM(0xfffe4000, 0x400),
-        .channel_offset = -0x100,
+        DEFINE_RES_IRQ_NAMED(179, "tgi0a"),
-        .timer_bit = 1,
+        DEFINE_RES_IRQ_NAMED(186, "tgi1a"),
-        .clockevent_rating = 200,
 };
-static struct resource mtu2_1_resources[] = {
+static struct platform_device mtu2_device = {
-        [0] = {
+        .name           = "sh-mtu2",
-                .name   = "MTU2_1",
+        .id             = -1,
-                .start  = 0xfffe4380,
+        .resource       = mtu2_resources,
-                .end    = 0xfffe4390,
+        .num_resources  = ARRAY_SIZE(mtu2_resources),
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 186,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device mtu2_1_device = {
-        .name           = "sh_mtu2",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &mtu2_1_platform_data,
-        },
-        .resource       = mtu2_1_resources,
-        .num_resources  = ARRAY_SIZE(mtu2_1_resources),
 };
 static struct resource rtc_resources[] = {
@@ -620,10 +532,8 @@ static struct platform_device *sh7264_devices[] __initdata = {
        &scif5_device,
        &scif6_device,
        &scif7_device,
-        &cmt0_device,
+        &cmt_device,
-        &cmt1_device,
+        &mtu2_device,
-        &mtu2_0_device,
-        &mtu2_1_device,
        &rtc_device,
        &r8a66597_usb_host_device,
 };
@@ -649,10 +559,8 @@ static struct platform_device *sh7264_early_devices[] __initdata = {
        &scif5_device,
        &scif6_device,
        &scif7_device,
-        &cmt0_device,
+        &cmt_device,
-        &cmt1_device,
+        &mtu2_device,
-        &mtu2_0_device,
-        &mtu2_1_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7269.c b/arch/sh/kernel/cpu/sh2a/setup-sh7269.c
index 3995119f65dc..16ce5aa77bdd 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7269.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7269.c
@@ -455,118 +455,37 @@ static struct platform_device scif7_device = {
        },
 };
-static struct sh_timer_config cmt0_platform_data = {
+static struct sh_timer_config cmt_platform_data = {
-        .channel_offset = 0x02,
+        .channels_mask = 3,
-        .timer_bit = 0,
-        .clockevent_rating = 125,
-        .clocksource_rating = 0, /* disabled due to code generation issues */
 };
-static struct resource cmt0_resources[] = {
+static struct resource cmt_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xfffec000, 0x10),
-                .start  = 0xfffec002,
+        DEFINE_RES_IRQ(188),
-                .end    = 0xfffec007,
+        DEFINE_RES_IRQ(189),
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 188,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device cmt0_device = {
-        .name           = "sh_cmt",
-        .id             = 0,
-        .dev = {
-                .platform_data  = &cmt0_platform_data,
-        },
-        .resource       = cmt0_resources,
-        .num_resources  = ARRAY_SIZE(cmt0_resources),
-};
-static struct sh_timer_config cmt1_platform_data = {
-        .channel_offset = 0x08,
-        .timer_bit = 1,
-        .clockevent_rating = 125,
-        .clocksource_rating = 0, /* disabled due to code generation issues */
-};
-static struct resource cmt1_resources[] = {
-        [0] = {
-                .start  = 0xfffec008,
-                .end    = 0xfffec00d,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 189,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device cmt1_device = {
-        .name           = "sh_cmt",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &cmt1_platform_data,
-        },
-        .resource       = cmt1_resources,
-        .num_resources  = ARRAY_SIZE(cmt1_resources),
-};
-static struct sh_timer_config mtu2_0_platform_data = {
-        .channel_offset = -0x80,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
-};
-static struct resource mtu2_0_resources[] = {
-        [0] = {
-                .start  = 0xfffe4300,
-                .end    = 0xfffe4326,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 192,
-                .flags  = IORESOURCE_IRQ,
-        },
 };
-static struct platform_device mtu2_0_device = {
+static struct platform_device cmt_device = {
-        .name           = "sh_mtu2",
+        .name           = "sh-cmt-16",
        .id             = 0,
        .dev = {
-                .platform_data  = &mtu2_0_platform_data,
+                .platform_data  = &cmt_platform_data,
        },
-        .resource       = mtu2_0_resources,
+        .resource       = cmt_resources,
-        .num_resources  = ARRAY_SIZE(mtu2_0_resources),
+        .num_resources  = ARRAY_SIZE(cmt_resources),
 };
-static struct sh_timer_config mtu2_1_platform_data = {
+static struct resource mtu2_resources[] = {
-        .channel_offset = -0x100,
+        DEFINE_RES_MEM(0xfffe4000, 0x400),
-        .timer_bit = 1,
+        DEFINE_RES_IRQ_NAMED(192, "tgi0a"),
-        .clockevent_rating = 200,
+        DEFINE_RES_IRQ_NAMED(203, "tgi1a"),
 };
-static struct resource mtu2_1_resources[] = {
+static struct platform_device mtu2_device = {
-        [0] = {
+        .name           = "sh-mtu2",
-                .start  = 0xfffe4380,
+        .id             = -1,
-                .end    = 0xfffe4390,
+        .resource       = mtu2_resources,
-                .flags  = IORESOURCE_MEM,
+        .num_resources  = ARRAY_SIZE(mtu2_resources),
-        },
-        [1] = {
-                .start  = 203,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device mtu2_1_device = {
-        .name           = "sh_mtu2",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &mtu2_1_platform_data,
-        },
-        .resource       = mtu2_1_resources,
-        .num_resources  = ARRAY_SIZE(mtu2_1_resources),
 };
 static struct resource rtc_resources[] = {
@@ -629,10 +548,8 @@ static struct platform_device *sh7269_devices[] __initdata = {
        &scif5_device,
        &scif6_device,
        &scif7_device,
-        &cmt0_device,
+        &cmt_device,
-        &cmt1_device,
+        &mtu2_device,
-        &mtu2_0_device,
-        &mtu2_1_device,
        &rtc_device,
        &r8a66597_usb_host_device,
 };
@@ -658,10 +575,8 @@ static struct platform_device *sh7269_early_devices[] __initdata = {
        &scif5_device,
        &scif6_device,
        &scif7_device,
-        &cmt0_device,
+        &cmt_device,
-        &cmt1_device,
+        &mtu2_device,
-        &mtu2_0_device,
-        &mtu2_1_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index c76b2543b85f..6a72fd14de21 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -143,25 +143,18 @@ static struct platform_device rtc_device = {
 };
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x02,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xfffffe90, 0x2c),
-                .start  = 0xfffffe94,
+        DEFINE_RES_IRQ(evt2irq(0x400)),
-                .end    = 0xfffffe9f,
+        DEFINE_RES_IRQ(evt2irq(0x420)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x440)),
-        },
-        [1] = {
-                .start  = evt2irq(0x400),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu-sh3",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -170,67 +163,10 @@ static struct platform_device tmu0_device = {
        .num_resources  = ARRAY_SIZE(tmu0_resources),
 };
-static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0xe,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
-};
-static struct resource tmu1_resources[] = {
-        [0] = {
-                .start  = 0xfffffea0,
-                .end    = 0xfffffeab,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x420),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &tmu1_platform_data,
-        },
-        .resource       = tmu1_resources,
-        .num_resources  = ARRAY_SIZE(tmu1_resources),
-};
-static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1a,
-        .timer_bit = 2,
-};
-static struct resource tmu2_resources[] = {
-        [0] = {
-                .start  = 0xfffffeac,
-                .end    = 0xfffffebb,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x440),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &tmu2_platform_data,
-        },
-        .resource       = tmu2_resources,
-        .num_resources  = ARRAY_SIZE(tmu2_resources),
-};
 static struct platform_device *sh7705_devices[] __initdata = {
        &scif0_device,
        &scif1_device,
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
        &rtc_device,
 };
@@ -245,8 +181,6 @@ static struct platform_device *sh7705_early_devices[] __initdata = {
        &scif0_device,
        &scif1_device,
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index ff1465c0519c..9139d14b9c53 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -185,25 +185,18 @@ static struct platform_device scif2_device = {
 #endif
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x02,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xfffffe90, 0x2c),
-                .start  = 0xfffffe94,
+        DEFINE_RES_IRQ(evt2irq(0x400)),
-                .end    = 0xfffffe9f,
+        DEFINE_RES_IRQ(evt2irq(0x420)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x440)),
-        },
-        [1] = {
-                .start  = evt2irq(0x400),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu-sh3",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -212,61 +205,6 @@ static struct platform_device tmu0_device = {
        .num_resources  = ARRAY_SIZE(tmu0_resources),
 };
-static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0xe,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
-};
-static struct resource tmu1_resources[] = {
-        [0] = {
-                .start  = 0xfffffea0,
-                .end    = 0xfffffeab,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x420),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &tmu1_platform_data,
-        },
-        .resource       = tmu1_resources,
-        .num_resources  = ARRAY_SIZE(tmu1_resources),
-};
-static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1a,
-        .timer_bit = 2,
-};
-static struct resource tmu2_resources[] = {
-        [0] = {
-                .start  = 0xfffffeac,
-                .end    = 0xfffffebb,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x440),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &tmu2_platform_data,
-        },
-        .resource       = tmu2_resources,
-        .num_resources  = ARRAY_SIZE(tmu2_resources),
-};
 static struct platform_device *sh770x_devices[] __initdata = {
        &scif0_device,
 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
@@ -279,8 +217,6 @@ static struct platform_device *sh770x_devices[] __initdata = {
        &scif2_device,
 #endif
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
        &rtc_device,
 };
@@ -303,8 +239,6 @@ static struct platform_device *sh770x_early_devices[] __initdata = {
        &scif2_device,
 #endif
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index e2ce9360ed5a..e9ed300dba5c 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -142,25 +142,18 @@ static struct platform_device scif1_device = {
 };
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x02,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xa412fe90, 0x28),
-                .start  = 0xa412fe94,
+        DEFINE_RES_IRQ(evt2irq(0x400)),
-                .end    = 0xa412fe9f,
+        DEFINE_RES_IRQ(evt2irq(0x420)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x440)),
-        },
-        [1] = {
-                .start  = evt2irq(0x400),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu-sh3",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -169,67 +162,10 @@ static struct platform_device tmu0_device = {
        .num_resources  = ARRAY_SIZE(tmu0_resources),
 };
-static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0xe,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
-};
-static struct resource tmu1_resources[] = {
-        [0] = {
-                .start  = 0xa412fea0,
-                .end    = 0xa412feab,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x420),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &tmu1_platform_data,
-        },
-        .resource       = tmu1_resources,
-        .num_resources  = ARRAY_SIZE(tmu1_resources),
-};
-static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1a,
-        .timer_bit = 2,
-};
-static struct resource tmu2_resources[] = {
-        [0] = {
-                .start  = 0xa412feac,
-                .end    = 0xa412feb5,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x440),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &tmu2_platform_data,
-        },
-        .resource       = tmu2_resources,
-        .num_resources  = ARRAY_SIZE(tmu2_resources),
-};
 static struct platform_device *sh7710_devices[] __initdata = {
        &scif0_device,
        &scif1_device,
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
        &rtc_device,
 };
@@ -244,8 +180,6 @@ static struct platform_device *sh7710_early_devices[] __initdata = {
        &scif0_device,
        &scif1_device,
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index 1d5729dc0724..84df85a5b800 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -152,163 +152,38 @@ static struct platform_device usbf_device = {
        .resource       = usbf_resources,
 };
-static struct sh_timer_config cmt0_platform_data = {
+static struct sh_timer_config cmt_platform_data = {
-        .channel_offset = 0x10,
+        .channels_mask = 0x1f,
-        .timer_bit = 0,
-        .clockevent_rating = 125,
-        .clocksource_rating = 125,
 };
-static struct resource cmt0_resources[] = {
+static struct resource cmt_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0x044a0000, 0x60),
-                .start  = 0x044a0010,
+        DEFINE_RES_IRQ(evt2irq(0xf00)),
-                .end    = 0x044a001b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xf00),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
-static struct platform_device cmt0_device = {
+static struct platform_device cmt_device = {
-        .name           = "sh_cmt",
+        .name           = "sh-cmt-32",
        .id             = 0,
        .dev = {
-                .platform_data  = &cmt0_platform_data,
+                .platform_data  = &cmt_platform_data,
-        },
-        .resource       = cmt0_resources,
-        .num_resources  = ARRAY_SIZE(cmt0_resources),
-};
-static struct sh_timer_config cmt1_platform_data = {
-        .channel_offset = 0x20,
-        .timer_bit = 1,
-};
-static struct resource cmt1_resources[] = {
-        [0] = {
-                .start  = 0x044a0020,
-                .end    = 0x044a002b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xf00),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device cmt1_device = {
-        .name           = "sh_cmt",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &cmt1_platform_data,
-        },
-        .resource       = cmt1_resources,
-        .num_resources  = ARRAY_SIZE(cmt1_resources),
-};
-static struct sh_timer_config cmt2_platform_data = {
-        .channel_offset = 0x30,
-        .timer_bit = 2,
-};
-static struct resource cmt2_resources[] = {
-        [0] = {
-                .start  = 0x044a0030,
-                .end    = 0x044a003b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xf00),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device cmt2_device = {
-        .name           = "sh_cmt",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &cmt2_platform_data,
-        },
-        .resource       = cmt2_resources,
-        .num_resources  = ARRAY_SIZE(cmt2_resources),
-};
-static struct sh_timer_config cmt3_platform_data = {
-        .channel_offset = 0x40,
-        .timer_bit = 3,
-};
-static struct resource cmt3_resources[] = {
-        [0] = {
-                .start  = 0x044a0040,
-                .end    = 0x044a004b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xf00),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device cmt3_device = {
-        .name           = "sh_cmt",
-        .id             = 3,
-        .dev = {
-                .platform_data  = &cmt3_platform_data,
        },
-        .resource       = cmt3_resources,
+        .resource       = cmt_resources,
-        .num_resources  = ARRAY_SIZE(cmt3_resources),
+        .num_resources  = ARRAY_SIZE(cmt_resources),
-};
-static struct sh_timer_config cmt4_platform_data = {
-        .channel_offset = 0x50,
-        .timer_bit = 4,
-};
-static struct resource cmt4_resources[] = {
-        [0] = {
-                .start  = 0x044a0050,
-                .end    = 0x044a005b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xf00),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device cmt4_device = {
-        .name           = "sh_cmt",
-        .id             = 4,
-        .dev = {
-                .platform_data  = &cmt4_platform_data,
-        },
-        .resource       = cmt4_resources,
-        .num_resources  = ARRAY_SIZE(cmt4_resources),
 };
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x02,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xa412fe90, 0x28),
-                .start  = 0xa412fe94,
+        DEFINE_RES_IRQ(evt2irq(0x400)),
-                .end    = 0xa412fe9f,
+        DEFINE_RES_IRQ(evt2irq(0x420)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x440)),
-        },
-        [1] = {
-                .start  = evt2irq(0x400),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu-sh3",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -317,72 +192,11 @@ static struct platform_device tmu0_device = {
        .num_resources  = ARRAY_SIZE(tmu0_resources),
 };
-static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0xe,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
-};
-static struct resource tmu1_resources[] = {
-        [0] = {
-                .start  = 0xa412fea0,
-                .end    = 0xa412feab,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x420),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &tmu1_platform_data,
-        },
-        .resource       = tmu1_resources,
-        .num_resources  = ARRAY_SIZE(tmu1_resources),
-};
-static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1a,
-        .timer_bit = 2,
-};
-static struct resource tmu2_resources[] = {
-        [0] = {
-                .start  = 0xa412feac,
-                .end    = 0xa412feb5,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x440),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &tmu2_platform_data,
-        },
-        .resource       = tmu2_resources,
-        .num_resources  = ARRAY_SIZE(tmu2_resources),
-};
 static struct platform_device *sh7720_devices[] __initdata = {
        &scif0_device,
        &scif1_device,
-        &cmt0_device,
+        &cmt_device,
-        &cmt1_device,
-        &cmt2_device,
-        &cmt3_device,
-        &cmt4_device,
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
        &rtc_device,
        &usb_ohci_device,
        &usbf_device,
@@ -398,14 +212,8 @@ arch_initcall(sh7720_devices_setup);
 static struct platform_device *sh7720_early_devices[] __initdata = {
        &scif0_device,
        &scif1_device,
-        &cmt0_device,
+        &cmt_device,
-        &cmt1_device,
-        &cmt2_device,
-        &cmt3_device,
-        &cmt4_device,
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
index a8bd778d5ac8..e7a7b3cdf68d 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
@@ -41,25 +41,18 @@ static struct platform_device scif0_device = {
 };
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x04,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd80000, 0x30),
-                .start  = 0xffd80008,
+        DEFINE_RES_IRQ(evt2irq(0x400)),
-                .end    = 0xffd80013,
+        DEFINE_RES_IRQ(evt2irq(0x420)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x440)),
-        },
-        [1] = {
-                .start  = evt2irq(0x400),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -68,66 +61,9 @@ static struct platform_device tmu0_device = {
        .num_resources  = ARRAY_SIZE(tmu0_resources),
 };
-static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
-};
-static struct resource tmu1_resources[] = {
-        [0] = {
-                .start  = 0xffd80014,
-                .end    = 0xffd8001f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x420),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &tmu1_platform_data,
-        },
-        .resource       = tmu1_resources,
-        .num_resources  = ARRAY_SIZE(tmu1_resources),
-};
-static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu2_resources[] = {
-        [0] = {
-                .start  = 0xffd80020,
-                .end    = 0xffd8002f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x440),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &tmu2_platform_data,
-        },
-        .resource       = tmu2_resources,
-        .num_resources  = ARRAY_SIZE(tmu2_resources),
-};
 static struct platform_device *sh4202_devices[] __initdata = {
        &scif0_device,
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
 };
 static int __init sh4202_devices_setup(void)
@@ -140,8 +76,6 @@ arch_initcall(sh4202_devices_setup);
 static struct platform_device *sh4202_early_devices[] __initdata = {
        &scif0_device,
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index a447a248491f..5f08c59b9f3e 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -82,25 +82,18 @@ static struct platform_device scif_device = {
 };
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x04,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd80000, 0x30),
-                .start  = 0xffd80008,
+        DEFINE_RES_IRQ(evt2irq(0x400)),
-                .end    = 0xffd80013,
+        DEFINE_RES_IRQ(evt2irq(0x420)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x440)),
-        },
-        [1] = {
-                .start  = evt2irq(0x400),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -109,26 +102,23 @@ static struct platform_device tmu0_device = {
        .num_resources  = ARRAY_SIZE(tmu0_resources),
 };
+/* SH7750R, SH7751 and SH7751R all have two extra timer channels */
+#if defined(CONFIG_CPU_SUBTYPE_SH7750R) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7751) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7751R)
 static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0x10,
+        .channels_mask = 3,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
 };
 static struct resource tmu1_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xfe100000, 0x20),
-                .start  = 0xffd80014,
+        DEFINE_RES_IRQ(evt2irq(0xb00)),
-                .end    = 0xffd8001f,
+        DEFINE_RES_IRQ(evt2irq(0xb80)),
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x420),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 1,
        .dev = {
                .platform_data  = &tmu1_platform_data,
@@ -137,104 +127,15 @@ static struct platform_device tmu1_device = {
        .num_resources  = ARRAY_SIZE(tmu1_resources),
 };
-static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu2_resources[] = {
-        [0] = {
-                .start  = 0xffd80020,
-                .end    = 0xffd8002f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x440),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &tmu2_platform_data,
-        },
-        .resource       = tmu2_resources,
-        .num_resources  = ARRAY_SIZE(tmu2_resources),
-};
-/* SH7750R, SH7751 and SH7751R all have two extra timer channels */
-#if defined(CONFIG_CPU_SUBTYPE_SH7750R) || \
-        defined(CONFIG_CPU_SUBTYPE_SH7751) || \
-        defined(CONFIG_CPU_SUBTYPE_SH7751R)
-static struct sh_timer_config tmu3_platform_data = {
-        .channel_offset = 0x04,
-        .timer_bit = 0,
-};
-static struct resource tmu3_resources[] = {
-        [0] = {
-                .start  = 0xfe100008,
-                .end    = 0xfe100013,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xb00),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu3_device = {
-        .name           = "sh_tmu",
-        .id             = 3,
-        .dev = {
-                .platform_data  = &tmu3_platform_data,
-        },
-        .resource       = tmu3_resources,
-        .num_resources  = ARRAY_SIZE(tmu3_resources),
-};
-static struct sh_timer_config tmu4_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-};
-static struct resource tmu4_resources[] = {
-        [0] = {
-                .start  = 0xfe100014,
-                .end    = 0xfe10001f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xb80),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu4_device = {
-        .name           = "sh_tmu",
-        .id             = 4,
-        .dev = {
-                .platform_data  = &tmu4_platform_data,
-        },
-        .resource       = tmu4_resources,
-        .num_resources  = ARRAY_SIZE(tmu4_resources),
-};
 #endif
 static struct platform_device *sh7750_devices[] __initdata = {
        &rtc_device,
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
 #if defined(CONFIG_CPU_SUBTYPE_SH7750R) || \
        defined(CONFIG_CPU_SUBTYPE_SH7751) || \
        defined(CONFIG_CPU_SUBTYPE_SH7751R)
-        &tmu3_device,
+        &tmu1_device,
-        &tmu4_device,
 #endif
 };
@@ -254,13 +155,10 @@ arch_initcall(sh7750_devices_setup);
 static struct platform_device *sh7750_early_devices[] __initdata = {
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
 #if defined(CONFIG_CPU_SUBTYPE_SH7750R) || \
        defined(CONFIG_CPU_SUBTYPE_SH7751) || \
        defined(CONFIG_CPU_SUBTYPE_SH7751R)
-        &tmu3_device,
+        &tmu1_device,
-        &tmu4_device,
 #endif
 };
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index 1abd9fb4a386..973b736b3b98 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -227,25 +227,18 @@ static struct platform_device scif3_device = {
 };
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x04,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd80000, 0x30),
-                .start  = 0xffd80008,
+        DEFINE_RES_IRQ(evt2irq(0x400)),
-                .end    = 0xffd80013,
+        DEFINE_RES_IRQ(evt2irq(0x420)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x440)),
-        },
-        [1] = {
-                .start  = evt2irq(0x400),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -254,61 +247,6 @@ static struct platform_device tmu0_device = {
        .num_resources  = ARRAY_SIZE(tmu0_resources),
 };
-static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
-};
-static struct resource tmu1_resources[] = {
-        [0] = {
-                .start  = 0xffd80014,
-                .end    = 0xffd8001f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x420),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &tmu1_platform_data,
-        },
-        .resource       = tmu1_resources,
-        .num_resources  = ARRAY_SIZE(tmu1_resources),
-};
-static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu2_resources[] = {
-        [0] = {
-                .start  = 0xffd80020,
-                .end    = 0xffd8002f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x440),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &tmu2_platform_data,
-        },
-        .resource       = tmu2_resources,
-        .num_resources  = ARRAY_SIZE(tmu2_resources),
-};
 static struct platform_device *sh7760_devices[] __initdata = {
        &scif0_device,
@@ -316,8 +254,6 @@ static struct platform_device *sh7760_devices[] __initdata = {
        &scif2_device,
        &scif3_device,
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
 };
 static int __init sh7760_devices_setup(void)
@@ -333,8 +269,6 @@ static struct platform_device *sh7760_early_devices[] __initdata = {
        &scif2_device,
        &scif3_device,
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
index 53638e231cd0..9edc06c02dcf 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
@@ -227,7 +227,7 @@ static struct clk_lookup lookups[] = {
        CLKDEV_CON_ID("hudi0", &mstp_clks[MSTP019]),
        CLKDEV_CON_ID("ubc0", &mstp_clks[MSTP017]),
        CLKDEV_CON_ID("tmu_fck", &mstp_clks[MSTP015]),
-        CLKDEV_CON_ID("cmt_fck", &mstp_clks[MSTP014]),
+        CLKDEV_ICK_ID("fck", "sh-cmt-32.0", &mstp_clks[MSTP014]),
        CLKDEV_CON_ID("rwdt0", &mstp_clks[MSTP013]),
        CLKDEV_CON_ID("mfi0", &mstp_clks[MSTP011]),
        CLKDEV_CON_ID("flctl0", &mstp_clks[MSTP010]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
index 22e485d1990b..955b9add7810 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
@@ -225,7 +225,7 @@ static struct clk_lookup lookups[] = {
        CLKDEV_CON_ID("hudi0", &mstp_clks[MSTP019]),
        CLKDEV_CON_ID("ubc0", &mstp_clks[MSTP017]),
        CLKDEV_CON_ID("tmu_fck", &mstp_clks[MSTP015]),
-        CLKDEV_CON_ID("cmt_fck", &mstp_clks[MSTP014]),
+        CLKDEV_ICK_ID("fck", "sh-cmt-32.0", &mstp_clks[MSTP014]),
        CLKDEV_CON_ID("rwdt0", &mstp_clks[MSTP013]),
        CLKDEV_CON_ID("mfi0", &mstp_clks[MSTP011]),
        CLKDEV_CON_ID("flctl0", &mstp_clks[MSTP010]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index c4cb740e4d10..8f07a1a38692 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -203,11 +203,9 @@ static struct clk_lookup lookups[] = {
        CLKDEV_CON_ID("uram0", &mstp_clks[HWBLK_URAM]),
        CLKDEV_CON_ID("xymem0", &mstp_clks[HWBLK_XYMEM]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[HWBLK_TMU]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[HWBLK_TMU]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[HWBLK_TMU]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU]),
-        CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
+        CLKDEV_ICK_ID("fck", "sh-cmt-32.0", &mstp_clks[HWBLK_CMT]),
        CLKDEV_DEV_ID("sh-wdt.0", &mstp_clks[HWBLK_RWDT]),
        CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
index 37c41c7747a3..ccbcab550df2 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -236,7 +236,7 @@ static struct clk_lookup lookups[] = {
        CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]),
        CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]),
        CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]),
-        CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
+        CLKDEV_ICK_ID("fck", "sh-cmt-32.0", &mstp_clks[HWBLK_CMT]),
        CLKDEV_DEV_ID("sh-wdt.0", &mstp_clks[HWBLK_RWDT]),
        CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[HWBLK_DMAC1]),
        CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]),
@@ -264,12 +264,8 @@ static struct clk_lookup lookups[] = {
        CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU2H0]),
        CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[HWBLK_TMU0]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[HWBLK_TMU0]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[HWBLK_TMU0]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[HWBLK_TMU1]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU0]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[HWBLK_TMU1]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[HWBLK_TMU1]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[HWBLK_TMU1]),
        CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
        CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index 0128af3399b7..f579dd528198 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -304,17 +304,13 @@ static struct clk_lookup lookups[] = {
        CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]),
        CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[HWBLK_TMU0]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[HWBLK_TMU0]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[HWBLK_TMU0]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[HWBLK_TMU1]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU0]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[HWBLK_TMU1]),
-        CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
+        CLKDEV_ICK_ID("fck", "sh-cmt-16.0", &mstp_clks[HWBLK_CMT]),
        CLKDEV_DEV_ID("sh-wdt.0", &mstp_clks[HWBLK_RWDT]),
        CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[HWBLK_DMAC1]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[HWBLK_TMU1]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[HWBLK_TMU1]),
        CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
        CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
        CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7734.c b/arch/sh/kernel/cpu/sh4a/clock-sh7734.c
index ed9501519ab3..1fdf1ee672de 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7734.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7734.c
@@ -201,15 +201,9 @@ static struct clk_lookup lookups[] = {
        CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[MSTP022]),
        CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP021]),
        CLKDEV_CON_ID("hscif", &mstp_clks[MSTP019]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP016]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP016]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP016]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP015]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[MSTP016]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.2", &mstp_clks[MSTP014]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[MSTP015]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[MSTP015]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[MSTP015]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.6", &mstp_clks[MSTP014]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.7", &mstp_clks[MSTP014]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.8", &mstp_clks[MSTP014]),
        CLKDEV_CON_ID("ssi0", &mstp_clks[MSTP012]),
        CLKDEV_CON_ID("ssi1", &mstp_clks[MSTP011]),
        CLKDEV_CON_ID("ssi2", &mstp_clks[MSTP010]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
index 5c0e3c335161..9a28fdb36387 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
@@ -123,8 +123,8 @@ static struct clk_lookup lookups[] = {
        CLKDEV_CON_ID("riic6", &mstp_clks[MSTP000]),
        CLKDEV_CON_ID("riic7", &mstp_clks[MSTP000]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP113]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP113]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP114]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP114]),
        CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP112]),
        CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP111]),
        CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP110]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
index 1c83788db76a..17d0ea55a5a2 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
@@ -146,12 +146,8 @@ static struct clk_lookup lookups[] = {
        CLKDEV_CON_ID("mmcif_fck", &mstp_clks[MSTP013]),
        CLKDEV_CON_ID("flctl_fck", &mstp_clks[MSTP012]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP008]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP008]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP008]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP009]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[MSTP008]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[MSTP009]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[MSTP009]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[MSTP009]),
        CLKDEV_CON_ID("siof_fck", &mstp_clks[MSTP003]),
        CLKDEV_CON_ID("hspi_fck", &mstp_clks[MSTP002]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
index 8bba6f159023..bec2a83f1ba5 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
@@ -155,18 +155,10 @@ static struct clk_lookup lookups[] = {
        CLKDEV_CON_ID("i2c1_fck", &mstp_clks[MSTP015]),
        CLKDEV_CON_ID("i2c0_fck", &mstp_clks[MSTP014]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP008]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP008]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP008]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP009]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[MSTP008]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.2", &mstp_clks[MSTP010]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[MSTP009]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.3", &mstp_clks[MSTP011]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[MSTP009]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[MSTP009]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.6", &mstp_clks[MSTP010]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.7", &mstp_clks[MSTP010]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.8", &mstp_clks[MSTP010]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.9", &mstp_clks[MSTP011]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.10", &mstp_clks[MSTP011]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.11", &mstp_clks[MSTP011]),
        CLKDEV_CON_ID("sdif1_fck", &mstp_clks[MSTP005]),
        CLKDEV_CON_ID("sdif0_fck", &mstp_clks[MSTP004]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-shx3.c b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
index a9422dab0ce7..9a49a44f6f94 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
@@ -124,12 +124,8 @@ static struct clk_lookup lookups[] = {
        CLKDEV_CON_ID("fe1_fck", &mstp_clks[MSTP001]),
        CLKDEV_CON_ID("fe0_fck", &mstp_clks[MSTP000]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP008]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP008]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP008]),
+        CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP009]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[MSTP008]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[MSTP009]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[MSTP009]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[MSTP009]),
        CLKDEV_CON_ID("hudi_fck", &mstp_clks[MSTP119]),
        CLKDEV_CON_ID("dmac_11_6_fck", &mstp_clks[MSTP105]),
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index 245d19254489..ceb3dedad983 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -228,26 +228,16 @@ static struct platform_device jpu_device = {
 };
 static struct sh_timer_config cmt_platform_data = {
-        .channel_offset = 0x60,
+        .channels_mask = 0x20,
-        .timer_bit = 5,
-        .clockevent_rating = 125,
-        .clocksource_rating = 200,
 };
 static struct resource cmt_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0x044a0000, 0x70),
-                .start  = 0x044a0060,
+        DEFINE_RES_IRQ(evt2irq(0xf00)),
-                .end    = 0x044a006b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xf00),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device cmt_device = {
-        .name           = "sh_cmt",
+        .name           = "sh-cmt-32",
        .id             = 0,
        .dev = {
                .platform_data  = &cmt_platform_data,
@@ -257,25 +247,18 @@ static struct platform_device cmt_device = {
 };
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x04,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd80000, 0x2c),
-                .start  = 0xffd80008,
+        DEFINE_RES_IRQ(evt2irq(0x400)),
-                .end    = 0xffd80013,
+        DEFINE_RES_IRQ(evt2irq(0x420)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x440)),
-        },
-        [1] = {
-                .start  = evt2irq(0x400),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -284,61 +267,6 @@ static struct platform_device tmu0_device = {
        .num_resources  = ARRAY_SIZE(tmu0_resources),
 };
-static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
-};
-static struct resource tmu1_resources[] = {
-        [0] = {
-                .start  = 0xffd80014,
-                .end    = 0xffd8001f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x420),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &tmu1_platform_data,
-        },
-        .resource       = tmu1_resources,
-        .num_resources  = ARRAY_SIZE(tmu1_resources),
-};
-static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu2_resources[] = {
-        [0] = {
-                .start  = 0xffd80020,
-                .end    = 0xffd8002b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x440),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &tmu2_platform_data,
-        },
-        .resource       = tmu2_resources,
-        .num_resources  = ARRAY_SIZE(tmu2_resources),
-};
 static struct platform_device *sh7343_devices[] __initdata = {
        &scif0_device,
        &scif1_device,
@@ -346,8 +274,6 @@ static struct platform_device *sh7343_devices[] __initdata = {
        &scif3_device,
        &cmt_device,
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
        &iic0_device,
        &iic1_device,
        &vpu_device,
@@ -373,8 +299,6 @@ static struct platform_device *sh7343_early_devices[] __initdata = {
        &scif3_device,
        &cmt_device,
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index 6f56cbd76b20..f75f67343139 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -176,26 +176,16 @@ static struct platform_device veu1_device = {
 };
 static struct sh_timer_config cmt_platform_data = {
-        .channel_offset = 0x60,
+        .channels_mask = 0x20,
-        .timer_bit = 5,
-        .clockevent_rating = 125,
-        .clocksource_rating = 200,
 };
 static struct resource cmt_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0x044a0000, 0x70),
-                .start  = 0x044a0060,
+        DEFINE_RES_IRQ(evt2irq(0xf00)),
-                .end    = 0x044a006b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xf00),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device cmt_device = {
-        .name           = "sh_cmt",
+        .name           = "sh-cmt-32",
        .id             = 0,
        .dev = {
                .platform_data  = &cmt_platform_data,
@@ -205,25 +195,18 @@ static struct platform_device cmt_device = {
 };
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x04,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd80000, 0x2c),
-                .start  = 0xffd80008,
+        DEFINE_RES_IRQ(evt2irq(0x400)),
-                .end    = 0xffd80013,
+        DEFINE_RES_IRQ(evt2irq(0x420)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x440)),
-        },
-        [1] = {
-                .start  = 16,
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -232,67 +215,10 @@ static struct platform_device tmu0_device = {
        .num_resources  = ARRAY_SIZE(tmu0_resources),
 };
-static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
-};
-static struct resource tmu1_resources[] = {
-        [0] = {
-                .start  = 0xffd80014,
-                .end    = 0xffd8001f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x420),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &tmu1_platform_data,
-        },
-        .resource       = tmu1_resources,
-        .num_resources  = ARRAY_SIZE(tmu1_resources),
-};
-static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu2_resources[] = {
-        [0] = {
-                .start  = 0xffd80020,
-                .end    = 0xffd8002b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x440),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &tmu2_platform_data,
-        },
-        .resource       = tmu2_resources,
-        .num_resources  = ARRAY_SIZE(tmu2_resources),
-};
 static struct platform_device *sh7366_devices[] __initdata = {
        &scif0_device,
        &cmt_device,
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
        &iic_device,
        &usb_host_device,
        &vpu_device,
@@ -315,8 +241,6 @@ static struct platform_device *sh7366_early_devices[] __initdata = {
        &scif0_device,
        &cmt_device,
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index 5a94efc8d4ce..57f83a92a505 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -413,26 +413,16 @@ static struct platform_device jpu_device = {
 };
 static struct sh_timer_config cmt_platform_data = {
-        .channel_offset = 0x60,
+        .channels_mask = 0x20,
-        .timer_bit = 5,
-        .clockevent_rating = 125,
-        .clocksource_rating = 125,
 };
 static struct resource cmt_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0x044a0000, 0x70),
-                .start  = 0x044a0060,
+        DEFINE_RES_IRQ(evt2irq(0xf00)),
-                .end    = 0x044a006b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xf00),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device cmt_device = {
-        .name           = "sh_cmt",
+        .name           = "sh-cmt-32",
        .id             = 0,
        .dev = {
                .platform_data  = &cmt_platform_data,
@@ -442,25 +432,18 @@ static struct platform_device cmt_device = {
 };
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x04,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd80000, 0x2c),
-                .start  = 0xffd80008,
+        DEFINE_RES_IRQ(evt2irq(0x400)),
-                .end    = 0xffd80013,
+        DEFINE_RES_IRQ(evt2irq(0x420)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x440)),
-        },
-        [1] = {
-                .start  = evt2irq(0x400),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -469,61 +452,6 @@ static struct platform_device tmu0_device = {
        .num_resources  = ARRAY_SIZE(tmu0_resources),
 };
-static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
-};
-static struct resource tmu1_resources[] = {
-        [0] = {
-                .start  = 0xffd80014,
-                .end    = 0xffd8001f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x420),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &tmu1_platform_data,
-        },
-        .resource       = tmu1_resources,
-        .num_resources  = ARRAY_SIZE(tmu1_resources),
-};
-static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu2_resources[] = {
-        [0] = {
-                .start  = 0xffd80020,
-                .end    = 0xffd8002b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 18,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &tmu2_platform_data,
-        },
-        .resource       = tmu2_resources,
-        .num_resources  = ARRAY_SIZE(tmu2_resources),
-};
 static struct siu_platform siu_platform_data = {
        .dma_slave_tx_a = SHDMA_SLAVE_SIUA_TX,
        .dma_slave_rx_a = SHDMA_SLAVE_SIUA_RX,
@@ -559,8 +487,6 @@ static struct platform_device *sh7722_devices[] __initdata = {
        &scif2_device,
        &cmt_device,
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
        &rtc_device,
        &usbf_device,
        &iic_device,
@@ -588,8 +514,6 @@ static struct platform_device *sh7722_early_devices[] __initdata = {
        &scif2_device,
        &cmt_device,
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 3c5eb0993a75..3533b56dd465 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -245,26 +245,16 @@ static struct platform_device veu1_device = {
 };
 static struct sh_timer_config cmt_platform_data = {
-        .channel_offset = 0x60,
+        .channels_mask = 0x20,
-        .timer_bit = 5,
-        .clockevent_rating = 125,
-        .clocksource_rating = 125,
 };
 static struct resource cmt_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0x044a0000, 0x70),
-                .start  = 0x044a0060,
+        DEFINE_RES_IRQ(evt2irq(0xf00)),
-                .end    = 0x044a006b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xf00),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device cmt_device = {
-        .name           = "sh_cmt",
+        .name           = "sh-cmt-32",
        .id             = 0,
        .dev = {
                .platform_data  = &cmt_platform_data,
@@ -274,25 +264,18 @@ static struct platform_device cmt_device = {
 };
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x04,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd80000, 0x2c),
-                .start  = 0xffd80008,
+        DEFINE_RES_IRQ(evt2irq(0x400)),
-                .end    = 0xffd80013,
+        DEFINE_RES_IRQ(evt2irq(0x420)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x440)),
-        },
-        [1] = {
-                .start  = evt2irq(0x400),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -302,25 +285,18 @@ static struct platform_device tmu0_device = {
 };
 static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0x10,
+        .channels_mask = 7,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
 };
 static struct resource tmu1_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd90000, 0x2c),
-                .start  = 0xffd80014,
+        DEFINE_RES_IRQ(evt2irq(0x920)),
-                .end    = 0xffd8001f,
+        DEFINE_RES_IRQ(evt2irq(0x940)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x960)),
-        },
-        [1] = {
-                .start  = evt2irq(0x420),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 1,
        .dev = {
                .platform_data  = &tmu1_platform_data,
@@ -329,114 +305,6 @@ static struct platform_device tmu1_device = {
        .num_resources  = ARRAY_SIZE(tmu1_resources),
 };
-static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu2_resources[] = {
-        [0] = {
-                .start  = 0xffd80020,
-                .end    = 0xffd8002b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x440),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &tmu2_platform_data,
-        },
-        .resource       = tmu2_resources,
-        .num_resources  = ARRAY_SIZE(tmu2_resources),
-};
-static struct sh_timer_config tmu3_platform_data = {
-        .channel_offset = 0x04,
-        .timer_bit = 0,
-};
-static struct resource tmu3_resources[] = {
-        [0] = {
-                .start  = 0xffd90008,
-                .end    = 0xffd90013,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x920),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu3_device = {
-        .name           = "sh_tmu",
-        .id             = 3,
-        .dev = {
-                .platform_data  = &tmu3_platform_data,
-        },
-        .resource       = tmu3_resources,
-        .num_resources  = ARRAY_SIZE(tmu3_resources),
-};
-static struct sh_timer_config tmu4_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-};
-static struct resource tmu4_resources[] = {
-        [0] = {
-                .start  = 0xffd90014,
-                .end    = 0xffd9001f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x940),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu4_device = {
-        .name           = "sh_tmu",
-        .id             = 4,
-        .dev = {
-                .platform_data  = &tmu4_platform_data,
-        },
-        .resource       = tmu4_resources,
-        .num_resources  = ARRAY_SIZE(tmu4_resources),
-};
-static struct sh_timer_config tmu5_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu5_resources[] = {
-        [0] = {
-                .start  = 0xffd90020,
-                .end    = 0xffd9002b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x920),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu5_device = {
-        .name           = "sh_tmu",
-        .id             = 5,
-        .dev = {
-                .platform_data  = &tmu5_platform_data,
-        },
-        .resource       = tmu5_resources,
-        .num_resources  = ARRAY_SIZE(tmu5_resources),
-};
 static struct resource rtc_resources[] = {
        [0] = {
                .start  = 0xa465fec0,
@@ -527,10 +395,6 @@ static struct platform_device *sh7723_devices[] __initdata = {
        &cmt_device,
        &tmu0_device,
        &tmu1_device,
-        &tmu2_device,
-        &tmu3_device,
-        &tmu4_device,
-        &tmu5_device,
        &rtc_device,
        &iic_device,
        &sh7723_usb_host_device,
@@ -560,10 +424,6 @@ static struct platform_device *sh7723_early_devices[] __initdata = {
        &cmt_device,
        &tmu0_device,
        &tmu1_device,
-        &tmu2_device,
-        &tmu3_device,
-        &tmu4_device,
-        &tmu5_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index 60ebbc6842ff..b9e84b1d3aa7 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -648,26 +648,16 @@ static struct platform_device beu1_device = {
 };
 static struct sh_timer_config cmt_platform_data = {
-        .channel_offset = 0x60,
+        .channels_mask = 0x20,
-        .timer_bit = 5,
-        .clockevent_rating = 125,
-        .clocksource_rating = 200,
 };
 static struct resource cmt_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0x044a0000, 0x70),
-                .start  = 0x044a0060,
+        DEFINE_RES_IRQ(evt2irq(0xf00)),
-                .end    = 0x044a006b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xf00),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device cmt_device = {
-        .name           = "sh_cmt",
+        .name           = "sh-cmt-32",
        .id             = 0,
        .dev = {
                .platform_data  = &cmt_platform_data,
@@ -677,25 +667,18 @@ static struct platform_device cmt_device = {
 };
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x04,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd80000, 0x2c),
-                .start  = 0xffd80008,
+        DEFINE_RES_IRQ(evt2irq(0x400)),
-                .end    = 0xffd80013,
+        DEFINE_RES_IRQ(evt2irq(0x420)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x440)),
-        },
-        [1] = {
-                .start  = evt2irq(0x400),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -705,25 +688,18 @@ static struct platform_device tmu0_device = {
 };
 static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0x10,
+        .channels_mask = 7,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
 };
 static struct resource tmu1_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd90000, 0x2c),
-                .start  = 0xffd80014,
+        DEFINE_RES_IRQ(evt2irq(0x920)),
-                .end    = 0xffd8001f,
+        DEFINE_RES_IRQ(evt2irq(0x940)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x960)),
-        },
-        [1] = {
-                .start  = evt2irq(0x420),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 1,
        .dev = {
                .platform_data  = &tmu1_platform_data,
@@ -732,115 +708,6 @@ static struct platform_device tmu1_device = {
        .num_resources  = ARRAY_SIZE(tmu1_resources),
 };
-static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu2_resources[] = {
-        [0] = {
-                .start  = 0xffd80020,
-                .end    = 0xffd8002b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x440),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &tmu2_platform_data,
-        },
-        .resource       = tmu2_resources,
-        .num_resources  = ARRAY_SIZE(tmu2_resources),
-};
-static struct sh_timer_config tmu3_platform_data = {
-        .channel_offset = 0x04,
-        .timer_bit = 0,
-};
-static struct resource tmu3_resources[] = {
-        [0] = {
-                .start  = 0xffd90008,
-                .end    = 0xffd90013,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x920),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu3_device = {
-        .name           = "sh_tmu",
-        .id             = 3,
-        .dev = {
-                .platform_data  = &tmu3_platform_data,
-        },
-        .resource       = tmu3_resources,
-        .num_resources  = ARRAY_SIZE(tmu3_resources),
-};
-static struct sh_timer_config tmu4_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-};
-static struct resource tmu4_resources[] = {
-        [0] = {
-                .start  = 0xffd90014,
-                .end    = 0xffd9001f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x940),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu4_device = {
-        .name           = "sh_tmu",
-        .id             = 4,
-        .dev = {
-                .platform_data  = &tmu4_platform_data,
-        },
-        .resource       = tmu4_resources,
-        .num_resources  = ARRAY_SIZE(tmu4_resources),
-};
-static struct sh_timer_config tmu5_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu5_resources[] = {
-        [0] = {
-                .start  = 0xffd90020,
-                .end    = 0xffd9002b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x920),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu5_device = {
-        .name           = "sh_tmu",
-        .id             = 5,
-        .dev = {
-                .platform_data  = &tmu5_platform_data,
-        },
-        .resource       = tmu5_resources,
-        .num_resources  = ARRAY_SIZE(tmu5_resources),
-};
 /* JPU */
 static struct uio_info jpu_platform_data = {
        .name = "JPU",
@@ -938,10 +805,6 @@ static struct platform_device *sh7724_devices[] __initdata = {
        &cmt_device,
        &tmu0_device,
        &tmu1_device,
-        &tmu2_device,
-        &tmu3_device,
-        &tmu4_device,
-        &tmu5_device,
        &dma0_device,
        &dma1_device,
        &rtc_device,
@@ -981,10 +844,6 @@ static struct platform_device *sh7724_early_devices[] __initdata = {
        &cmt_device,
        &tmu0_device,
        &tmu1_device,
-        &tmu2_device,
-        &tmu3_device,
-        &tmu4_device,
-        &tmu5_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7734.c b/arch/sh/kernel/cpu/sh4a/setup-sh7734.c
index dad4ed1b2f94..f617bcb734df 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7734.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7734.c
@@ -200,25 +200,18 @@ static struct platform_device i2c0_device = {
 /* TMU */
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x04,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd80000, 0x30),
-                .start  = 0xFFD80008,
+        DEFINE_RES_IRQ(evt2irq(0x400)),
-                .end    = 0xFFD80014 - 1,
+        DEFINE_RES_IRQ(evt2irq(0x420)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x440)),
-        },
-        [1] = {
-                .start  = evt2irq(0x400),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name   = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -228,26 +221,19 @@ static struct platform_device tmu0_device = {
 };
 static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0x10,
+        .channels_mask = 7,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
 };
 static struct resource tmu1_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd81000, 0x30),
-                .start  = 0xFFD80014,
+        DEFINE_RES_IRQ(evt2irq(0x480)),
-                .end    = 0xFFD80020 - 1,
+        DEFINE_RES_IRQ(evt2irq(0x4a0)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x4c0)),
-        },
-        [1] = {
-                .start  = evt2irq(0x420),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
-        .id                     = 1,
+        .id             = 1,
        .dev = {
                .platform_data  = &tmu1_platform_data,
        },
@@ -256,25 +242,19 @@ static struct platform_device tmu1_device = {
 };
 static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1c,
+        .channels_mask = 7,
-        .timer_bit = 2,
 };
 static struct resource tmu2_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd82000, 0x30),
-                .start  = 0xFFD80020,
+        DEFINE_RES_IRQ(evt2irq(0x500)),
-                .end    = 0xFFD80030 - 1,
+        DEFINE_RES_IRQ(evt2irq(0x520)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x540)),
-        },
-        [1] = {
-                .start  = evt2irq(0x440),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
-        .id                     = 2,
+        .id             = 2,
        .dev = {
                .platform_data  = &tmu2_platform_data,
        },
@@ -282,169 +262,6 @@ static struct platform_device tmu2_device = {
        .num_resources  = ARRAY_SIZE(tmu2_resources),
 };
-static struct sh_timer_config tmu3_platform_data = {
-        .channel_offset = 0x04,
-        .timer_bit = 0,
-};
-static struct resource tmu3_resources[] = {
-        [0] = {
-                .start  = 0xFFD81008,
-                .end    = 0xFFD81014 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x480),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu3_device = {
-        .name           = "sh_tmu",
-        .id                     = 3,
-        .dev = {
-                .platform_data  = &tmu3_platform_data,
-        },
-        .resource       = tmu3_resources,
-        .num_resources  = ARRAY_SIZE(tmu3_resources),
-};
-static struct sh_timer_config tmu4_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-};
-static struct resource tmu4_resources[] = {
-        [0] = {
-                .start  = 0xFFD81014,
-                .end    = 0xFFD81020 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x4A0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu4_device = {
-        .name           = "sh_tmu",
-        .id                     = 4,
-        .dev = {
-                .platform_data  = &tmu4_platform_data,
-        },
-        .resource       = tmu4_resources,
-        .num_resources  = ARRAY_SIZE(tmu4_resources),
-};
-static struct sh_timer_config tmu5_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu5_resources[] = {
-        [0] = {
-                .start  = 0xFFD81020,
-                .end    = 0xFFD81030 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x4C0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu5_device = {
-        .name           = "sh_tmu",
-        .id                     = 5,
-        .dev = {
-                .platform_data  = &tmu5_platform_data,
-        },
-        .resource       = tmu5_resources,
-        .num_resources  = ARRAY_SIZE(tmu5_resources),
-};
-static struct sh_timer_config tmu6_platform_data = {
-        .channel_offset = 0x4,
-        .timer_bit = 0,
-};
-static struct resource tmu6_resources[] = {
-        [0] = {
-                .start  = 0xFFD82008,
-                .end    = 0xFFD82014 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x500),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu6_device = {
-        .name           = "sh_tmu",
-        .id                     = 6,
-        .dev = {
-                .platform_data  = &tmu6_platform_data,
-        },
-        .resource       = tmu6_resources,
-        .num_resources  = ARRAY_SIZE(tmu6_resources),
-};
-static struct sh_timer_config tmu7_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-};
-static struct resource tmu7_resources[] = {
-        [0] = {
-                .start  = 0xFFD82014,
-                .end    = 0xFFD82020 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x520),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu7_device = {
-        .name           = "sh_tmu",
-        .id                     = 7,
-        .dev = {
-                .platform_data  = &tmu7_platform_data,
-        },
-        .resource       = tmu7_resources,
-        .num_resources  = ARRAY_SIZE(tmu7_resources),
-};
-static struct sh_timer_config tmu8_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu8_resources[] = {
-        [0] = {
-                .start  = 0xFFD82020,
-                .end    = 0xFFD82030 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x540),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu8_device = {
-        .name           = "sh_tmu",
-        .id                     = 8,
-        .dev = {
-                .platform_data  = &tmu8_platform_data,
-        },
-        .resource       = tmu8_resources,
-        .num_resources  = ARRAY_SIZE(tmu8_resources),
-};
 static struct platform_device *sh7734_devices[] __initdata = {
        &scif0_device,
        &scif1_device,
@@ -455,12 +272,6 @@ static struct platform_device *sh7734_devices[] __initdata = {
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
-        &tmu3_device,
-        &tmu4_device,
-        &tmu5_device,
-        &tmu6_device,
-        &tmu7_device,
-        &tmu8_device,
        &rtc_device,
 };
@@ -474,12 +285,6 @@ static struct platform_device *sh7734_early_devices[] __initdata = {
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
-        &tmu3_device,
-        &tmu4_device,
-        &tmu5_device,
-        &tmu6_device,
-        &tmu7_device,
-        &tmu8_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index e43e5db53913..7b24ec4b409a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -87,25 +87,17 @@ static struct platform_device scif4_device = {
 };
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x04,
+        .channels_mask = 3,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xfe430000, 0x20),
-                .start  = 0xfe430008,
+        DEFINE_RES_IRQ(evt2irq(0x580)),
-                .end    = 0xfe430013,
+        DEFINE_RES_IRQ(evt2irq(0x5a0)),
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x580),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -114,34 +106,6 @@ static struct platform_device tmu0_device = {
        .num_resources  = ARRAY_SIZE(tmu0_resources),
 };
-static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
-};
-static struct resource tmu1_resources[] = {
-        [0] = {
-                .start  = 0xfe430014,
-                .end    = 0xfe43001f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x5a0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &tmu1_platform_data,
-        },
-        .resource       = tmu1_resources,
-        .num_resources  = ARRAY_SIZE(tmu1_resources),
-};
 static struct resource spi0_resources[] = {
        [0] = {
                .start  = 0xfe002000,
@@ -782,7 +746,6 @@ static struct platform_device *sh7757_devices[] __initdata = {
        &scif3_device,
        &scif4_device,
        &tmu0_device,
-        &tmu1_device,
        &dma0_device,
        &dma1_device,
        &dma2_device,
@@ -806,7 +769,6 @@ static struct platform_device *sh7757_early_devices[] __initdata = {
        &scif3_device,
        &scif4_device,
        &tmu0_device,
-        &tmu1_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index 5eebbd7f4c21..5a47d670ddec 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -158,25 +158,18 @@ static struct platform_device usbf_device = {
 };
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x04,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd80000, 0x30),
-                .start  = 0xffd80008,
+        DEFINE_RES_IRQ(evt2irq(0x580)),
-                .end    = 0xffd80013,
+        DEFINE_RES_IRQ(evt2irq(0x5a0)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x5c0)),
-        },
-        [1] = {
-                .start  = evt2irq(0x580),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -186,25 +179,18 @@ static struct platform_device tmu0_device = {
 };
 static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0x10,
+        .channels_mask = 7,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
 };
 static struct resource tmu1_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd88000, 0x2c),
-                .start  = 0xffd80014,
+        DEFINE_RES_IRQ(evt2irq(0xe00)),
-                .end    = 0xffd8001f,
+        DEFINE_RES_IRQ(evt2irq(0xe20)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0xe40)),
-        },
-        [1] = {
-                .start  = evt2irq(0x5a0),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 1,
        .dev = {
                .platform_data  = &tmu1_platform_data,
@@ -213,124 +199,12 @@ static struct platform_device tmu1_device = {
        .num_resources  = ARRAY_SIZE(tmu1_resources),
 };
-static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu2_resources[] = {
-        [0] = {
-                .start  = 0xffd80020,
-                .end    = 0xffd8002f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x5c0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &tmu2_platform_data,
-        },
-        .resource       = tmu2_resources,
-        .num_resources  = ARRAY_SIZE(tmu2_resources),
-};
-static struct sh_timer_config tmu3_platform_data = {
-        .channel_offset = 0x04,
-        .timer_bit = 0,
-};
-static struct resource tmu3_resources[] = {
-        [0] = {
-                .start  = 0xffd88008,
-                .end    = 0xffd88013,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xe00),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu3_device = {
-        .name           = "sh_tmu",
-        .id             = 3,
-        .dev = {
-                .platform_data  = &tmu3_platform_data,
-        },
-        .resource       = tmu3_resources,
-        .num_resources  = ARRAY_SIZE(tmu3_resources),
-};
-static struct sh_timer_config tmu4_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-};
-static struct resource tmu4_resources[] = {
-        [0] = {
-                .start  = 0xffd88014,
-                .end    = 0xffd8801f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xe20),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu4_device = {
-        .name           = "sh_tmu",
-        .id             = 4,
-        .dev = {
-                .platform_data  = &tmu4_platform_data,
-        },
-        .resource       = tmu4_resources,
-        .num_resources  = ARRAY_SIZE(tmu4_resources),
-};
-static struct sh_timer_config tmu5_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu5_resources[] = {
-        [0] = {
-                .start  = 0xffd88020,
-                .end    = 0xffd8802b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xe40),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu5_device = {
-        .name           = "sh_tmu",
-        .id             = 5,
-        .dev = {
-                .platform_data  = &tmu5_platform_data,
-        },
-        .resource       = tmu5_resources,
-        .num_resources  = ARRAY_SIZE(tmu5_resources),
-};
 static struct platform_device *sh7763_devices[] __initdata = {
        &scif0_device,
        &scif1_device,
        &scif2_device,
        &tmu0_device,
        &tmu1_device,
-        &tmu2_device,
-        &tmu3_device,
-        &tmu4_device,
-        &tmu5_device,
        &rtc_device,
        &usb_ohci_device,
        &usbf_device,
@@ -349,10 +223,6 @@ static struct platform_device *sh7763_early_devices[] __initdata = {
        &scif2_device,
        &tmu0_device,
        &tmu1_device,
-        &tmu2_device,
-        &tmu3_device,
-        &tmu4_device,
-        &tmu5_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index e1ba8cb74e5a..e9b532a76c37 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
@@ -226,25 +226,18 @@ static struct platform_device scif9_device = {
 };
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x04,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd80000, 0x30),
-                .start  = 0xffd80008,
+        DEFINE_RES_IRQ(evt2irq(0x400)),
-                .end    = 0xffd80013,
+        DEFINE_RES_IRQ(evt2irq(0x420)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x440)),
-        },
-        [1] = {
-                .start  = evt2irq(0x400),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -254,25 +247,18 @@ static struct platform_device tmu0_device = {
 };
 static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0x10,
+        .channels_mask = 7,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
 };
 static struct resource tmu1_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd81000, 0x30),
-                .start  = 0xffd80014,
+        DEFINE_RES_IRQ(evt2irq(0x460)),
-                .end    = 0xffd8001f,
+        DEFINE_RES_IRQ(evt2irq(0x480)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x4a0)),
-        },
-        [1] = {
-                .start  = evt2irq(0x420),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 1,
        .dev = {
                .platform_data  = &tmu1_platform_data,
@@ -282,24 +268,18 @@ static struct platform_device tmu1_device = {
 };
 static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1c,
+        .channels_mask = 7,
-        .timer_bit = 2,
 };
 static struct resource tmu2_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd82000, 0x2c),
-                .start  = 0xffd80020,
+        DEFINE_RES_IRQ(evt2irq(0x4c0)),
-                .end    = 0xffd8002f,
+        DEFINE_RES_IRQ(evt2irq(0x4e0)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x500)),
-        },
-        [1] = {
-                .start  = evt2irq(0x440),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 2,
        .dev = {
                .platform_data  = &tmu2_platform_data,
@@ -308,168 +288,6 @@ static struct platform_device tmu2_device = {
        .num_resources  = ARRAY_SIZE(tmu2_resources),
 };
-static struct sh_timer_config tmu3_platform_data = {
-        .channel_offset = 0x04,
-        .timer_bit = 0,
-};
-static struct resource tmu3_resources[] = {
-        [0] = {
-                .start  = 0xffd81008,
-                .end    = 0xffd81013,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x460),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu3_device = {
-        .name           = "sh_tmu",
-        .id             = 3,
-        .dev = {
-                .platform_data  = &tmu3_platform_data,
-        },
-        .resource       = tmu3_resources,
-        .num_resources  = ARRAY_SIZE(tmu3_resources),
-};
-static struct sh_timer_config tmu4_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-};
-static struct resource tmu4_resources[] = {
-        [0] = {
-                .start  = 0xffd81014,
-                .end    = 0xffd8101f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x480),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu4_device = {
-        .name           = "sh_tmu",
-        .id             = 4,
-        .dev = {
-                .platform_data  = &tmu4_platform_data,
-        },
-        .resource       = tmu4_resources,
-        .num_resources  = ARRAY_SIZE(tmu4_resources),
-};
-static struct sh_timer_config tmu5_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu5_resources[] = {
-        [0] = {
-                .start  = 0xffd81020,
-                .end    = 0xffd8102f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x4a0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu5_device = {
-        .name           = "sh_tmu",
-        .id             = 5,
-        .dev = {
-                .platform_data  = &tmu5_platform_data,
-        },
-        .resource       = tmu5_resources,
-        .num_resources  = ARRAY_SIZE(tmu5_resources),
-};
-static struct sh_timer_config tmu6_platform_data = {
-        .channel_offset = 0x04,
-        .timer_bit = 0,
-};
-static struct resource tmu6_resources[] = {
-        [0] = {
-                .start  = 0xffd82008,
-                .end    = 0xffd82013,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x4c0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu6_device = {
-        .name           = "sh_tmu",
-        .id             = 6,
-        .dev = {
-                .platform_data  = &tmu6_platform_data,
-        },
-        .resource       = tmu6_resources,
-        .num_resources  = ARRAY_SIZE(tmu6_resources),
-};
-static struct sh_timer_config tmu7_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-};
-static struct resource tmu7_resources[] = {
-        [0] = {
-                .start  = 0xffd82014,
-                .end    = 0xffd8201f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x4e0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu7_device = {
-        .name           = "sh_tmu",
-        .id             = 7,
-        .dev = {
-                .platform_data  = &tmu7_platform_data,
-        },
-        .resource       = tmu7_resources,
-        .num_resources  = ARRAY_SIZE(tmu7_resources),
-};
-static struct sh_timer_config tmu8_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu8_resources[] = {
-        [0] = {
-                .start  = 0xffd82020,
-                .end    = 0xffd8202b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x500),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu8_device = {
-        .name           = "sh_tmu",
-        .id             = 8,
-        .dev = {
-                .platform_data  = &tmu8_platform_data,
-        },
-        .resource       = tmu8_resources,
-        .num_resources  = ARRAY_SIZE(tmu8_resources),
-};
 static struct platform_device *sh7770_devices[] __initdata = {
        &scif0_device,
        &scif1_device,
@@ -484,12 +302,6 @@ static struct platform_device *sh7770_devices[] __initdata = {
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
-        &tmu3_device,
-        &tmu4_device,
-        &tmu5_device,
-        &tmu6_device,
-        &tmu7_device,
-        &tmu8_device,
 };
 static int __init sh7770_devices_setup(void)
@@ -513,12 +325,6 @@ static struct platform_device *sh7770_early_devices[] __initdata = {
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
-        &tmu3_device,
-        &tmu4_device,
-        &tmu5_device,
-        &tmu6_device,
-        &tmu7_device,
-        &tmu8_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index 668e54bafa86..3ee7dd9b3a65 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -62,25 +62,18 @@ static struct platform_device scif1_device = {
 };
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x04,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd80000, 0x30),
-                .start  = 0xffd80008,
+        DEFINE_RES_IRQ(evt2irq(0x580)),
-                .end    = 0xffd80013,
+        DEFINE_RES_IRQ(evt2irq(0x5a0)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x5c0)),
-        },
-        [1] = {
-                .start  = evt2irq(0x580),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -90,25 +83,18 @@ static struct platform_device tmu0_device = {
 };
 static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0x10,
+        .channels_mask = 7,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
 };
 static struct resource tmu1_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffdc0000, 0x2c),
-                .start  = 0xffd80014,
+        DEFINE_RES_IRQ(evt2irq(0xe00)),
-                .end    = 0xffd8001f,
+        DEFINE_RES_IRQ(evt2irq(0xe20)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0xe40)),
-        },
-        [1] = {
-                .start  = evt2irq(0x5a0),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 1,
        .dev = {
                .platform_data  = &tmu1_platform_data,
@@ -117,114 +103,6 @@ static struct platform_device tmu1_device = {
        .num_resources  = ARRAY_SIZE(tmu1_resources),
 };
-static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu2_resources[] = {
-        [0] = {
-                .start  = 0xffd80020,
-                .end    = 0xffd8002f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x5c0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &tmu2_platform_data,
-        },
-        .resource       = tmu2_resources,
-        .num_resources  = ARRAY_SIZE(tmu2_resources),
-};
-static struct sh_timer_config tmu3_platform_data = {
-        .channel_offset = 0x04,
-        .timer_bit = 0,
-};
-static struct resource tmu3_resources[] = {
-        [0] = {
-                .start  = 0xffdc0008,
-                .end    = 0xffdc0013,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xe00),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu3_device = {
-        .name           = "sh_tmu",
-        .id             = 3,
-        .dev = {
-                .platform_data  = &tmu3_platform_data,
-        },
-        .resource       = tmu3_resources,
-        .num_resources  = ARRAY_SIZE(tmu3_resources),
-};
-static struct sh_timer_config tmu4_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-};
-static struct resource tmu4_resources[] = {
-        [0] = {
-                .start  = 0xffdc0014,
-                .end    = 0xffdc001f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xe20),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu4_device = {
-        .name           = "sh_tmu",
-        .id             = 4,
-        .dev = {
-                .platform_data  = &tmu4_platform_data,
-        },
-        .resource       = tmu4_resources,
-        .num_resources  = ARRAY_SIZE(tmu4_resources),
-};
-static struct sh_timer_config tmu5_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu5_resources[] = {
-        [0] = {
-                .start  = 0xffdc0020,
-                .end    = 0xffdc002b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xe40),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu5_device = {
-        .name           = "sh_tmu",
-        .id             = 5,
-        .dev = {
-                .platform_data  = &tmu5_platform_data,
-        },
-        .resource       = tmu5_resources,
-        .num_resources  = ARRAY_SIZE(tmu5_resources),
-};
 static struct resource rtc_resources[] = {
        [0] = {
                .start  = 0xffe80000,
@@ -386,10 +264,6 @@ static struct platform_device *sh7780_devices[] __initdata = {
        &scif1_device,
        &tmu0_device,
        &tmu1_device,
-        &tmu2_device,
-        &tmu3_device,
-        &tmu4_device,
-        &tmu5_device,
        &rtc_device,
        &dma0_device,
        &dma1_device,
@@ -407,10 +281,6 @@ static struct platform_device *sh7780_early_devices[] __initdata = {
        &scif1_device,
        &tmu0_device,
        &tmu1_device,
-        &tmu2_device,
-        &tmu3_device,
-        &tmu4_device,
-        &tmu5_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index 4aa679140209..c72d5a5d0995 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -152,25 +152,18 @@ static struct platform_device scif5_device = {
 };
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x04,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd80000, 0x30),
-                .start  = 0xffd80008,
+        DEFINE_RES_IRQ(evt2irq(0x580)),
-                .end    = 0xffd80013,
+        DEFINE_RES_IRQ(evt2irq(0x5a0)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x5c0)),
-        },
-        [1] = {
-                .start  = evt2irq(0x580),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -180,25 +173,18 @@ static struct platform_device tmu0_device = {
 };
 static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0x10,
+        .channels_mask = 7,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
 };
 static struct resource tmu1_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffdc0000, 0x2c),
-                .start  = 0xffd80014,
+        DEFINE_RES_IRQ(evt2irq(0xe00)),
-                .end    = 0xffd8001f,
+        DEFINE_RES_IRQ(evt2irq(0xe20)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0xe40)),
-        },
-        [1] = {
-                .start  = evt2irq(0x5a0),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 1,
        .dev = {
                .platform_data  = &tmu1_platform_data,
@@ -207,114 +193,6 @@ static struct platform_device tmu1_device = {
        .num_resources  = ARRAY_SIZE(tmu1_resources),
 };
-static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu2_resources[] = {
-        [0] = {
-                .start  = 0xffd80020,
-                .end    = 0xffd8002f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x5c0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &tmu2_platform_data,
-        },
-        .resource       = tmu2_resources,
-        .num_resources  = ARRAY_SIZE(tmu2_resources),
-};
-static struct sh_timer_config tmu3_platform_data = {
-        .channel_offset = 0x04,
-        .timer_bit = 0,
-};
-static struct resource tmu3_resources[] = {
-        [0] = {
-                .start  = 0xffdc0008,
-                .end    = 0xffdc0013,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xe00),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu3_device = {
-        .name           = "sh_tmu",
-        .id             = 3,
-        .dev = {
-                .platform_data  = &tmu3_platform_data,
-        },
-        .resource       = tmu3_resources,
-        .num_resources  = ARRAY_SIZE(tmu3_resources),
-};
-static struct sh_timer_config tmu4_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-};
-static struct resource tmu4_resources[] = {
-        [0] = {
-                .start  = 0xffdc0014,
-                .end    = 0xffdc001f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xe20),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu4_device = {
-        .name           = "sh_tmu",
-        .id             = 4,
-        .dev = {
-                .platform_data  = &tmu4_platform_data,
-        },
-        .resource       = tmu4_resources,
-        .num_resources  = ARRAY_SIZE(tmu4_resources),
-};
-static struct sh_timer_config tmu5_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu5_resources[] = {
-        [0] = {
-                .start  = 0xffdc0020,
-                .end    = 0xffdc002b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0xe40),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu5_device = {
-        .name           = "sh_tmu",
-        .id             = 5,
-        .dev = {
-                .platform_data  = &tmu5_platform_data,
-        },
-        .resource       = tmu5_resources,
-        .num_resources  = ARRAY_SIZE(tmu5_resources),
-};
 /* DMA */
 static const struct sh_dmae_channel sh7785_dmae0_channels[] = {
        {
@@ -460,10 +338,6 @@ static struct platform_device *sh7785_devices[] __initdata = {
        &scif5_device,
        &tmu0_device,
        &tmu1_device,
-        &tmu2_device,
-        &tmu3_device,
-        &tmu4_device,
-        &tmu5_device,
        &dma0_device,
        &dma1_device,
 };
@@ -484,10 +358,6 @@ static struct platform_device *sh7785_early_devices[] __initdata = {
        &scif5_device,
        &tmu0_device,
        &tmu1_device,
-        &tmu2_device,
-        &tmu3_device,
-        &tmu4_device,
-        &tmu5_device,
 };
 void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index 5d619a551a3b..479e79bdd3d0 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -175,25 +175,18 @@ static struct platform_device scif5_device = {
 };
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x04,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffd80000, 0x30),
-                .start  = 0xffd80008,
+        DEFINE_RES_IRQ(evt2irq(0x400)),
-                .end    = 0xffd80013,
+        DEFINE_RES_IRQ(evt2irq(0x420)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x440)),
-        },
-        [1] = {
-                .start  = evt2irq(0x400),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -203,25 +196,18 @@ static struct platform_device tmu0_device = {
 };
 static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0x10,
+        .channels_mask = 7,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
 };
 static struct resource tmu1_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffda0000, 0x2c),
-                .start  = 0xffd80014,
+        DEFINE_RES_IRQ(evt2irq(0x480)),
-                .end    = 0xffd8001f,
+        DEFINE_RES_IRQ(evt2irq(0x4a0)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x4c0)),
-        },
-        [1] = {
-                .start  = evt2irq(0x420),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 1,
        .dev = {
                .platform_data  = &tmu1_platform_data,
@@ -231,24 +217,18 @@ static struct platform_device tmu1_device = {
 };
 static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1c,
+        .channels_mask = 7,
-        .timer_bit = 2,
 };
 static struct resource tmu2_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffdc0000, 0x2c),
-                .start  = 0xffd80020,
+        DEFINE_RES_IRQ(evt2irq(0x7a0)),
-                .end    = 0xffd8002f,
+        DEFINE_RES_IRQ(evt2irq(0x7a0)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x7a0)),
-        },
-        [1] = {
-                .start  = evt2irq(0x440),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 2,
        .dev = {
                .platform_data  = &tmu2_platform_data,
@@ -258,24 +238,18 @@ static struct platform_device tmu2_device = {
 };
 static struct sh_timer_config tmu3_platform_data = {
-        .channel_offset = 0x04,
+        .channels_mask = 7,
-        .timer_bit = 0,
 };
 static struct resource tmu3_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffde0000, 0x2c),
-                .start  = 0xffda0008,
+        DEFINE_RES_IRQ(evt2irq(0x7c0)),
-                .end    = 0xffda0013,
+        DEFINE_RES_IRQ(evt2irq(0x7c0)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x7c0)),
-        },
-        [1] = {
-                .start  = evt2irq(0x480),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu3_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 3,
        .dev = {
                .platform_data  = &tmu3_platform_data,
@@ -284,222 +258,6 @@ static struct platform_device tmu3_device = {
        .num_resources  = ARRAY_SIZE(tmu3_resources),
 };
-static struct sh_timer_config tmu4_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-};
-static struct resource tmu4_resources[] = {
-        [0] = {
-                .start  = 0xffda0014,
-                .end    = 0xffda001f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x4a0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu4_device = {
-        .name           = "sh_tmu",
-        .id             = 4,
-        .dev = {
-                .platform_data  = &tmu4_platform_data,
-        },
-        .resource       = tmu4_resources,
-        .num_resources  = ARRAY_SIZE(tmu4_resources),
-};
-static struct sh_timer_config tmu5_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu5_resources[] = {
-        [0] = {
-                .start  = 0xffda0020,
-                .end    = 0xffda002b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x4c0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu5_device = {
-        .name           = "sh_tmu",
-        .id             = 5,
-        .dev = {
-                .platform_data  = &tmu5_platform_data,
-        },
-        .resource       = tmu5_resources,
-        .num_resources  = ARRAY_SIZE(tmu5_resources),
-};
-static struct sh_timer_config tmu6_platform_data = {
-        .channel_offset = 0x04,
-        .timer_bit = 0,
-};
-static struct resource tmu6_resources[] = {
-        [0] = {
-                .start  = 0xffdc0008,
-                .end    = 0xffdc0013,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x7a0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu6_device = {
-        .name           = "sh_tmu",
-        .id             = 6,
-        .dev = {
-                .platform_data  = &tmu6_platform_data,
-        },
-        .resource       = tmu6_resources,
-        .num_resources  = ARRAY_SIZE(tmu6_resources),
-};
-static struct sh_timer_config tmu7_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-};
-static struct resource tmu7_resources[] = {
-        [0] = {
-                .start  = 0xffdc0014,
-                .end    = 0xffdc001f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x7a0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu7_device = {
-        .name           = "sh_tmu",
-        .id             = 7,
-        .dev = {
-                .platform_data  = &tmu7_platform_data,
-        },
-        .resource       = tmu7_resources,
-        .num_resources  = ARRAY_SIZE(tmu7_resources),
-};
-static struct sh_timer_config tmu8_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu8_resources[] = {
-        [0] = {
-                .start  = 0xffdc0020,
-                .end    = 0xffdc002b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x7a0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu8_device = {
-        .name           = "sh_tmu",
-        .id             = 8,
-        .dev = {
-                .platform_data  = &tmu8_platform_data,
-        },
-        .resource       = tmu8_resources,
-        .num_resources  = ARRAY_SIZE(tmu8_resources),
-};
-static struct sh_timer_config tmu9_platform_data = {
-        .channel_offset = 0x04,
-        .timer_bit = 0,
-};
-static struct resource tmu9_resources[] = {
-        [0] = {
-                .start  = 0xffde0008,
-                .end    = 0xffde0013,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x7c0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu9_device = {
-        .name           = "sh_tmu",
-        .id             = 9,
-        .dev = {
-                .platform_data  = &tmu9_platform_data,
-        },
-        .resource       = tmu9_resources,
-        .num_resources  = ARRAY_SIZE(tmu9_resources),
-};
-static struct sh_timer_config tmu10_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-};
-static struct resource tmu10_resources[] = {
-        [0] = {
-                .start  = 0xffde0014,
-                .end    = 0xffde001f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x7c0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu10_device = {
-        .name           = "sh_tmu",
-        .id             = 10,
-        .dev = {
-                .platform_data  = &tmu10_platform_data,
-        },
-        .resource       = tmu10_resources,
-        .num_resources  = ARRAY_SIZE(tmu10_resources),
-};
-static struct sh_timer_config tmu11_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu11_resources[] = {
-        [0] = {
-                .start  = 0xffde0020,
-                .end    = 0xffde002b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x7c0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu11_device = {
-        .name           = "sh_tmu",
-        .id             = 11,
-        .dev = {
-                .platform_data  = &tmu11_platform_data,
-        },
-        .resource       = tmu11_resources,
-        .num_resources  = ARRAY_SIZE(tmu11_resources),
-};
 static const struct sh_dmae_channel dmac0_channels[] = {
        {
                .offset = 0,
@@ -641,15 +399,6 @@ static struct platform_device *sh7786_early_devices[] __initdata = {
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
-        &tmu3_device,
-        &tmu4_device,
-        &tmu5_device,
-        &tmu6_device,
-        &tmu7_device,
-        &tmu8_device,
-        &tmu9_device,
-        &tmu10_device,
-        &tmu11_device,
 };
 static struct platform_device *sh7786_devices[] __initdata = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
index 0856bcbb1da0..a78c5feb4e3b 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
@@ -100,25 +100,18 @@ static struct platform_device scif2_device = {
 };
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x04,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffc10000, 0x30),
-                .start  = 0xffc10008,
+        DEFINE_RES_IRQ(evt2irq(0x400)),
-                .end    = 0xffc10013,
+        DEFINE_RES_IRQ(evt2irq(0x420)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x440)),
-        },
-        [1] = {
-                .start  = evt2irq(0x400),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -128,25 +121,18 @@ static struct platform_device tmu0_device = {
 };
 static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0x10,
+        .channels_mask = 7,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
 };
 static struct resource tmu1_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(0xffc20000, 0x2c),
-                .start  = 0xffc10014,
+        DEFINE_RES_IRQ(evt2irq(0x460)),
-                .end    = 0xffc1001f,
+        DEFINE_RES_IRQ(evt2irq(0x480)),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(evt2irq(0x4a0)),
-        },
-        [1] = {
-                .start  = evt2irq(0x420),
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 1,
        .dev = {
                .platform_data  = &tmu1_platform_data,
@@ -155,124 +141,12 @@ static struct platform_device tmu1_device = {
        .num_resources  = ARRAY_SIZE(tmu1_resources),
 };
-static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu2_resources[] = {
-        [0] = {
-                .start  = 0xffc10020,
-                .end    = 0xffc1002f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x440),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &tmu2_platform_data,
-        },
-        .resource       = tmu2_resources,
-        .num_resources  = ARRAY_SIZE(tmu2_resources),
-};
-static struct sh_timer_config tmu3_platform_data = {
-        .channel_offset = 0x04,
-        .timer_bit = 0,
-};
-static struct resource tmu3_resources[] = {
-        [0] = {
-                .start  = 0xffc20008,
-                .end    = 0xffc20013,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x460),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu3_device = {
-        .name           = "sh_tmu",
-        .id             = 3,
-        .dev = {
-                .platform_data  = &tmu3_platform_data,
-        },
-        .resource       = tmu3_resources,
-        .num_resources  = ARRAY_SIZE(tmu3_resources),
-};
-static struct sh_timer_config tmu4_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-};
-static struct resource tmu4_resources[] = {
-        [0] = {
-                .start  = 0xffc20014,
-                .end    = 0xffc2001f,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x480),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu4_device = {
-        .name           = "sh_tmu",
-        .id             = 4,
-        .dev = {
-                .platform_data  = &tmu4_platform_data,
-        },
-        .resource       = tmu4_resources,
-        .num_resources  = ARRAY_SIZE(tmu4_resources),
-};
-static struct sh_timer_config tmu5_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu5_resources[] = {
-        [0] = {
-                .start  = 0xffc20020,
-                .end    = 0xffc2002b,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x4a0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu5_device = {
-        .name           = "sh_tmu",
-        .id             = 5,
-        .dev = {
-                .platform_data  = &tmu5_platform_data,
-        },
-        .resource       = tmu5_resources,
-        .num_resources  = ARRAY_SIZE(tmu5_resources),
-};
 static struct platform_device *shx3_early_devices[] __initdata = {
        &scif0_device,
        &scif1_device,
        &scif2_device,
        &tmu0_device,
        &tmu1_device,
-        &tmu2_device,
-        &tmu3_device,
-        &tmu4_device,
-        &tmu5_device,
 };
 static int __init shx3_devices_setup(void)
diff --git a/arch/sh/kernel/cpu/sh5/setup-sh5.c b/arch/sh/kernel/cpu/sh5/setup-sh5.c
index 14d68213d16b..1bf0b2cf6652 100644
--- a/arch/sh/kernel/cpu/sh5/setup-sh5.c
+++ b/arch/sh/kernel/cpu/sh5/setup-sh5.c
@@ -71,30 +71,20 @@ static struct platform_device rtc_device = {
 #define TMU_BLOCK_OFF   0x01020000
 #define TMU_BASE        PHYS_PERIPHERAL_BLOCK + TMU_BLOCK_OFF
-#define TMU0_BASE       (TMU_BASE + 0x8 + (0xc * 0x0))
-#define TMU1_BASE       (TMU_BASE + 0x8 + (0xc * 0x1))
-#define TMU2_BASE       (TMU_BASE + 0x8 + (0xc * 0x2))
 static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x04,
+        .channels_mask = 7,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
 };
 static struct resource tmu0_resources[] = {
-        [0] = {
+        DEFINE_RES_MEM(TMU_BASE, 0x30),
-                .start  = TMU0_BASE,
+        DEFINE_RES_IRQ(IRQ_TUNI0),
-                .end    = TMU0_BASE + 0xc - 1,
+        DEFINE_RES_IRQ(IRQ_TUNI1),
-                .flags  = IORESOURCE_MEM,
+        DEFINE_RES_IRQ(IRQ_TUNI2),
-        },
-        [1] = {
-                .start  = IRQ_TUNI0,
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 static struct platform_device tmu0_device = {
-        .name           = "sh_tmu",
+        .name           = "sh-tmu",
        .id             = 0,
        .dev = {
                .platform_data  = &tmu0_platform_data,
@@ -103,66 +93,9 @@ static struct platform_device tmu0_device = {
        .num_resources  = ARRAY_SIZE(tmu0_resources),
 };
-static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
-};
-static struct resource tmu1_resources[] = {
-        [0] = {
-                .start  = TMU1_BASE,
-                .end    = TMU1_BASE + 0xc - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = IRQ_TUNI1,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &tmu1_platform_data,
-        },
-        .resource       = tmu1_resources,
-        .num_resources  = ARRAY_SIZE(tmu1_resources),
-};
-static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-static struct resource tmu2_resources[] = {
-        [0] = {
-                .start  = TMU2_BASE,
-                .end    = TMU2_BASE + 0xc - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = IRQ_TUNI2,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
-        .id             = 2,
-        .dev = {
-                .platform_data  = &tmu2_platform_data,
-        },
-        .resource       = tmu2_resources,
-        .num_resources  = ARRAY_SIZE(tmu2_resources),
-};
 static struct platform_device *sh5_early_devices[] __initdata = {
        &scif0_device,
        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
 };
 static struct platform_device *sh5_devices[] __initdata = {
diff --git a/arch/sparc/include/asm/pci_32.h b/arch/sparc/include/asm/pci_32.h
index dc503297481f..53e9b4987db0 100644
--- a/arch/sparc/include/asm/pci_32.h
+++ b/arch/sparc/include/asm/pci_32.h
@@ -16,11 +16,6 @@
 #define PCI_IRQ_NONE            0xffffffff
-static inline void pcibios_penalize_isa_irq(int irq, int active)
-{
-        /* We don't do dynamic PCI IRQ allocation */
-}
 /* Dynamic DMA mapping stuff.
 */
 #define PCI_DMA_BUS_IS_PHYS     (0)
diff --git a/arch/sparc/include/asm/pci_64.h b/arch/sparc/include/asm/pci_64.h
index 1633b718d3bc..c6c7396e7627 100644
--- a/arch/sparc/include/asm/pci_64.h
+++ b/arch/sparc/include/asm/pci_64.h
@@ -16,11 +16,6 @@
 #define PCI_IRQ_NONE            0xffffffff
-static inline void pcibios_penalize_isa_irq(int irq, int active)
-{
-        /* We don't do dynamic PCI IRQ allocation */
-}
 /* The PCI address space does not equal the physical memory
 * address space.  The networking and block device layers use
 * this boolean for bounce buffer decisions.
diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h
index 0f9e94537eee..1a49ffdf9da9 100644
--- a/arch/sparc/include/asm/pgtable_64.h
+++ b/arch/sparc/include/asm/pgtable_64.h
@@ -24,7 +24,8 @@
 /* The kernel image occupies 0x4000000 to 0x6000000 (4MB --> 96MB).
 * The page copy blockops can use 0x6000000 to 0x8000000.
- * The TSB is mapped in the 0x8000000 to 0xa000000 range.
+ * The 8K TSB is mapped in the 0x8000000 to 0x8400000 range.
+ * The 4M TSB is mapped in the 0x8400000 to 0x8800000 range.
 * The PROM resides in an area spanning 0xf0000000 to 0x100000000.
 * The vmalloc area spans 0x100000000 to 0x200000000.
 * Since modules need to be in the lowest 32-bits of the address space,
@@ -33,7 +34,8 @@
 * 0x400000000.
 */
 #define TLBTEMP_BASE            _AC(0x0000000006000000,UL)
-#define TSBMAP_BASE             _AC(0x0000000008000000,UL)
+#define TSBMAP_8K_BASE          _AC(0x0000000008000000,UL)
+#define TSBMAP_4M_BASE          _AC(0x0000000008400000,UL)
 #define MODULES_VADDR           _AC(0x0000000010000000,UL)
 #define MODULES_LEN             _AC(0x00000000e0000000,UL)
 #define MODULES_END             _AC(0x00000000f0000000,UL)
@@ -71,6 +73,23 @@
 #include <linux/sched.h>
+extern unsigned long sparc64_valid_addr_bitmap[];
+/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
+static inline bool __kern_addr_valid(unsigned long paddr)
+{
+        if ((paddr >> MAX_PHYS_ADDRESS_BITS) != 0UL)
+                return false;
+        return test_bit(paddr >> ILOG2_4MB, sparc64_valid_addr_bitmap);
+}
+static inline bool kern_addr_valid(unsigned long addr)
+{
+        unsigned long paddr = __pa(addr);
+        return __kern_addr_valid(paddr);
+}
 /* Entries per page directory level. */
 #define PTRS_PER_PTE    (1UL << (PAGE_SHIFT-3))
 #define PTRS_PER_PMD    (1UL << PMD_BITS)
@@ -79,9 +98,12 @@
 /* Kernel has a separate 44bit address space. */
 #define FIRST_USER_ADDRESS      0
-#define pte_ERROR(e)    __builtin_trap()
+#define pmd_ERROR(e)                                                    \
-#define pmd_ERROR(e)    __builtin_trap()
+        pr_err("%s:%d: bad pmd %p(%016lx) seen at (%pS)\n",             \
-#define pgd_ERROR(e)    __builtin_trap()
+               __FILE__, __LINE__, &(e), pmd_val(e), __builtin_return_address(0))
+#define pgd_ERROR(e)                                                    \
+        pr_err("%s:%d: bad pgd %p(%016lx) seen at (%pS)\n",             \
+               __FILE__, __LINE__, &(e), pgd_val(e), __builtin_return_address(0))
 #endif /* !(__ASSEMBLY__) */
@@ -258,8 +280,8 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t prot)
 {
        unsigned long mask, tmp;
-        /* SUN4U: 0x600307ffffffecb8 (negated == 0x9ffcf80000001347)
+        /* SUN4U: 0x630107ffffffec38 (negated == 0x9cfef800000013c7)
-         * SUN4V: 0x30ffffffffffee17 (negated == 0xcf000000000011e8)
+         * SUN4V: 0x33ffffffffffee07 (negated == 0xcc000000000011f8)
         *
         * Even if we use negation tricks the result is still a 6
         * instruction sequence, so don't try to play fancy and just
@@ -289,10 +311,10 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t prot)
        "       .previous\n"
        : "=r" (mask), "=r" (tmp)
        : "i" (_PAGE_PADDR_4U | _PAGE_MODIFIED_4U | _PAGE_ACCESSED_4U |
-               _PAGE_CP_4U | _PAGE_CV_4U | _PAGE_E_4U | _PAGE_PRESENT_4U |
+               _PAGE_CP_4U | _PAGE_CV_4U | _PAGE_E_4U |
               _PAGE_SPECIAL | _PAGE_PMD_HUGE | _PAGE_SZALL_4U),
          "i" (_PAGE_PADDR_4V | _PAGE_MODIFIED_4V | _PAGE_ACCESSED_4V |
-               _PAGE_CP_4V | _PAGE_CV_4V | _PAGE_E_4V | _PAGE_PRESENT_4V |
+               _PAGE_CP_4V | _PAGE_CV_4V | _PAGE_E_4V |
               _PAGE_SPECIAL | _PAGE_PMD_HUGE | _PAGE_SZALL_4V));
        return __pte((pte_val(pte) & mask) | (pgprot_val(prot) & ~mask));
@@ -633,7 +655,7 @@ static inline unsigned long pmd_large(pmd_t pmd)
 {
        pte_t pte = __pte(pmd_val(pmd));
-        return (pte_val(pte) & _PAGE_PMD_HUGE) && pte_present(pte);
+        return pte_val(pte) & _PAGE_PMD_HUGE;
 }
 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
@@ -719,20 +741,6 @@ static inline pmd_t pmd_mkwrite(pmd_t pmd)
        return __pmd(pte_val(pte));
 }
-static inline pmd_t pmd_mknotpresent(pmd_t pmd)
-{
-        unsigned long mask;
-        if (tlb_type == hypervisor)
-                mask = _PAGE_PRESENT_4V;
-        else
-                mask = _PAGE_PRESENT_4U;
-        pmd_val(pmd) &= ~mask;
-        return pmd;
-}
 static inline pmd_t pmd_mksplitting(pmd_t pmd)
 {
        pte_t pte = __pte(pmd_val(pmd));
@@ -757,6 +765,20 @@ static inline int pmd_present(pmd_t pmd)
 #define pmd_none(pmd)                   (!pmd_val(pmd))
+/* pmd_bad() is only called on non-trans-huge PMDs.  Our encoding is
+ * very simple, it's just the physical address.  PTE tables are of
+ * size PAGE_SIZE so make sure the sub-PAGE_SIZE bits are clear and
+ * the top bits outside of the range of any physical address size we
+ * support are clear as well.  We also validate the physical itself.
+ */
+#define pmd_bad(pmd)                    ((pmd_val(pmd) & ~PAGE_MASK) || \
+                                         !__kern_addr_valid(pmd_val(pmd)))
+#define pud_none(pud)                   (!pud_val(pud))
+#define pud_bad(pud)                    ((pud_val(pud) & ~PAGE_MASK) || \
+                                         !__kern_addr_valid(pud_val(pud)))
 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
                       pmd_t *pmdp, pmd_t pmd);
@@ -790,10 +812,7 @@ static inline unsigned long __pmd_page(pmd_t pmd)
 #define pud_page_vaddr(pud)             \
        ((unsigned long) __va(pud_val(pud)))
 #define pud_page(pud)                   virt_to_page((void *)pud_page_vaddr(pud))
-#define pmd_bad(pmd)                    (0)
 #define pmd_clear(pmdp)                 (pmd_val(*(pmdp)) = 0UL)
-#define pud_none(pud)                   (!pud_val(pud))
-#define pud_bad(pud)                    (0)
 #define pud_present(pud)                (pud_val(pud) != 0U)
 #define pud_clear(pudp)                 (pud_val(*(pudp)) = 0UL)
@@ -893,6 +912,10 @@ extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t *);
 extern void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
                                 pmd_t *pmd);
+#define __HAVE_ARCH_PMDP_INVALIDATE
+extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
+                            pmd_t *pmdp);
 #define __HAVE_ARCH_PGTABLE_DEPOSIT
 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
                                       pgtable_t pgtable);
@@ -919,18 +942,6 @@ extern unsigned long pte_file(pte_t);
 extern pte_t pgoff_to_pte(unsigned long);
 #define PTE_FILE_MAX_BITS       (64UL - PAGE_SHIFT - 1UL)
-extern unsigned long sparc64_valid_addr_bitmap[];
-/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
-static inline bool kern_addr_valid(unsigned long addr)
-{
-        unsigned long paddr = __pa(addr);
-        if ((paddr >> 41UL) != 0UL)
-                return false;
-        return test_bit(paddr >> 22, sparc64_valid_addr_bitmap);
-}
 extern int page_in_phys_avail(unsigned long paddr);
 /*
diff --git a/arch/sparc/include/asm/tsb.h b/arch/sparc/include/asm/tsb.h
index 2230f80d9fe3..90916f955cac 100644
--- a/arch/sparc/include/asm/tsb.h
+++ b/arch/sparc/include/asm/tsb.h
@@ -171,7 +171,8 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
        andcc           REG1, REG2, %g0;                \
        be,pt           %xcc, 700f;                     \
         sethi          %hi(4 * 1024 * 1024), REG2;     \
-        andn            REG1, REG2, REG1;               \
+        brgez,pn        REG1, FAIL_LABEL;               \
+         andn           REG1, REG2, REG1;               \
        and             VADDR, REG2, REG2;              \
        brlz,pt         REG1, PTE_LABEL;                \
         or             REG1, REG2, REG1;               \
diff --git a/arch/sparc/kernel/head_64.S b/arch/sparc/kernel/head_64.S
index 26b706a1867d..452f04fe8da6 100644
--- a/arch/sparc/kernel/head_64.S
+++ b/arch/sparc/kernel/head_64.S
@@ -282,8 +282,8 @@ sun4v_chip_type:
        stx     %l2, [%l4 + 0x0]
        ldx     [%sp + 2047 + 128 + 0x50], %l3  ! physaddr low
        /* 4MB align */
-        srlx    %l3, 22, %l3
+        srlx    %l3, ILOG2_4MB, %l3
-        sllx    %l3, 22, %l3
+        sllx    %l3, ILOG2_4MB, %l3
        stx     %l3, [%l4 + 0x8]
        /* Leave service as-is, "call-method" */
diff --git a/arch/sparc/kernel/ktlb.S b/arch/sparc/kernel/ktlb.S
index 542e96ac4d39..605d49204580 100644
--- a/arch/sparc/kernel/ktlb.S
+++ b/arch/sparc/kernel/ktlb.S
@@ -277,7 +277,7 @@ kvmap_dtlb_load:
 #ifdef CONFIG_SPARSEMEM_VMEMMAP
 kvmap_vmemmap:
        sub             %g4, %g5, %g5
-        srlx            %g5, 22, %g5
+        srlx            %g5, ILOG2_4MB, %g5
        sethi           %hi(vmemmap_table), %g1
        sllx            %g5, 3, %g5
        or              %g1, %lo(vmemmap_table), %g1
diff --git a/arch/sparc/kernel/nmi.c b/arch/sparc/kernel/nmi.c
index 6479256fd5a4..337094556916 100644
--- a/arch/sparc/kernel/nmi.c
+++ b/arch/sparc/kernel/nmi.c
@@ -68,27 +68,16 @@ EXPORT_SYMBOL(touch_nmi_watchdog);
 static void die_nmi(const char *str, struct pt_regs *regs, int do_panic)
 {
+        int this_cpu = smp_processor_id();
        if (notify_die(DIE_NMIWATCHDOG, str, regs, 0,
                       pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP)
                return;
-        console_verbose();
-        bust_spinlocks(1);
-        printk(KERN_EMERG "%s", str);
-        printk(" on CPU%d, ip %08lx, registers:\n",
-               smp_processor_id(), regs->tpc);
-        show_regs(regs);
-        dump_stack();
-        bust_spinlocks(0);
        if (do_panic || panic_on_oops)
-                panic("Non maskable interrupt");
+                panic("Watchdog detected hard LOCKUP on cpu %d", this_cpu);
+        else
-        nmi_exit();
+                WARN(1, "Watchdog detected hard LOCKUP on cpu %d", this_cpu);
-        local_irq_enable();
-        do_exit(SIGBUS);
 }
 notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs)
diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c
index 1555bbcae1ee..857ad77df9c0 100644
--- a/arch/sparc/kernel/pci.c
+++ b/arch/sparc/kernel/pci.c
@@ -543,8 +543,7 @@ static void pci_of_scan_bus(struct pci_pbm_info *pbm,
                        printk("PCI: dev header type: %x\n",
                               dev->hdr_type);
-                if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
+                if (pci_is_bridge(dev))
-                    dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
                        of_scan_pci_bridge(pbm, child, dev);
        }
 }
diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c
index 9781048161ab..745a3633ce14 100644
--- a/arch/sparc/kernel/smp_64.c
+++ b/arch/sparc/kernel/smp_64.c
@@ -149,7 +149,7 @@ void cpu_panic(void)
 #define NUM_ROUNDS      64      /* magic value */
 #define NUM_ITERS       5       /* likewise */
-static DEFINE_SPINLOCK(itc_sync_lock);
+static DEFINE_RAW_SPINLOCK(itc_sync_lock);
 static unsigned long go[SLAVE + 1];
 #define DEBUG_TICK_SYNC 0
@@ -257,7 +257,7 @@ static void smp_synchronize_one_tick(int cpu)
        go[MASTER] = 0;
        membar_safe("#StoreLoad");
-        spin_lock_irqsave(&itc_sync_lock, flags);
+        raw_spin_lock_irqsave(&itc_sync_lock, flags);
        {
                for (i = 0; i < NUM_ROUNDS*NUM_ITERS; i++) {
                        while (!go[MASTER])
@@ -268,7 +268,7 @@ static void smp_synchronize_one_tick(int cpu)
                        membar_safe("#StoreLoad");
                }
        }
-        spin_unlock_irqrestore(&itc_sync_lock, flags);
+        raw_spin_unlock_irqrestore(&itc_sync_lock, flags);
 }
 #if defined(CONFIG_SUN_LDOMS) && defined(CONFIG_HOTPLUG_CPU)
diff --git a/arch/sparc/kernel/sys32.S b/arch/sparc/kernel/sys32.S
index f7c72b6efc27..d066eb18650c 100644
--- a/arch/sparc/kernel/sys32.S
+++ b/arch/sparc/kernel/sys32.S
@@ -44,7 +44,7 @@ SIGN1(sys32_timer_settime, compat_sys_timer_settime, %o1)
 SIGN1(sys32_io_submit, compat_sys_io_submit, %o1)
 SIGN1(sys32_mq_open, compat_sys_mq_open, %o1)
 SIGN1(sys32_select, compat_sys_select, %o0)
-SIGN3(sys32_futex, compat_sys_futex, %o1, %o2, %o5)
+SIGN1(sys32_futex, compat_sys_futex, %o1)
 SIGN1(sys32_recvfrom, compat_sys_recvfrom, %o0)
 SIGN1(sys32_recvmsg, compat_sys_recvmsg, %o0)
 SIGN1(sys32_sendmsg, compat_sys_sendmsg, %o0)
diff --git a/arch/sparc/kernel/sysfs.c b/arch/sparc/kernel/sysfs.c
index a364000ca1aa..7f41d40b7e6e 100644
--- a/arch/sparc/kernel/sysfs.c
+++ b/arch/sparc/kernel/sysfs.c
@@ -151,7 +151,7 @@ static ssize_t store_mmustat_enable(struct device *s,
                        size_t count)
 {
        unsigned long val, err;
-        int ret = sscanf(buf, "%ld", &val);
+        int ret = sscanf(buf, "%lu", &val);
        if (ret != 1)
                return -EINVAL;
diff --git a/arch/sparc/kernel/unaligned_64.c b/arch/sparc/kernel/unaligned_64.c
index 3c1a7cb31579..35ab8b60d256 100644
--- a/arch/sparc/kernel/unaligned_64.c
+++ b/arch/sparc/kernel/unaligned_64.c
@@ -166,17 +166,23 @@ static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
 unsigned long compute_effective_address(struct pt_regs *regs,
                                        unsigned int insn, unsigned int rd)
 {
+        int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
        unsigned int rs1 = (insn >> 14) & 0x1f;
        unsigned int rs2 = insn & 0x1f;
-        int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
+        unsigned long addr;
        if (insn & 0x2000) {
                maybe_flush_windows(rs1, 0, rd, from_kernel);
-                return (fetch_reg(rs1, regs) + sign_extend_imm13(insn));
+                addr = (fetch_reg(rs1, regs) + sign_extend_imm13(insn));
        } else {
                maybe_flush_windows(rs1, rs2, rd, from_kernel);
-                return (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));
+                addr = (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));
        }
+        if (!from_kernel && test_thread_flag(TIF_32BIT))
+                addr &= 0xffffffff;
+        return addr;
 }
 /* This is just to make gcc think die_if_kernel does return... */
diff --git a/arch/sparc/lib/NG2memcpy.S b/arch/sparc/lib/NG2memcpy.S
index 2c20ad63ddbf..30eee6e8a81b 100644
--- a/arch/sparc/lib/NG2memcpy.S
+++ b/arch/sparc/lib/NG2memcpy.S
@@ -236,6 +236,7 @@ FUNC_NAME:	/* %o0=dst, %o1=src, %o2=len */
         */
        VISEntryHalf
+        membar          #Sync
        alignaddr       %o1, %g0, %g0
        add             %o1, (64 - 1), %o4
diff --git a/arch/sparc/mm/fault_64.c b/arch/sparc/mm/fault_64.c
index 69bb818fdd79..4ced3fc66130 100644
--- a/arch/sparc/mm/fault_64.c
+++ b/arch/sparc/mm/fault_64.c
@@ -96,38 +96,51 @@ static unsigned int get_user_insn(unsigned long tpc)
        pte_t *ptep, pte;
        unsigned long pa;
        u32 insn = 0;
-        unsigned long pstate;
-        if (pgd_none(*pgdp))
+        if (pgd_none(*pgdp) || unlikely(pgd_bad(*pgdp)))
-                goto outret;
+                goto out;
        pudp = pud_offset(pgdp, tpc);
-        if (pud_none(*pudp))
+        if (pud_none(*pudp) || unlikely(pud_bad(*pudp)))
-                goto outret;
+                goto out;
-        pmdp = pmd_offset(pudp, tpc);
-        if (pmd_none(*pmdp))
-                goto outret;
        /* This disables preemption for us as well. */
-        __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate));
+        local_irq_disable();
-        __asm__ __volatile__("wrpr %0, %1, %%pstate"
-                                : : "r" (pstate), "i" (PSTATE_IE));
+        pmdp = pmd_offset(pudp, tpc);
-        ptep = pte_offset_map(pmdp, tpc);
+        if (pmd_none(*pmdp) || unlikely(pmd_bad(*pmdp)))
-        pte = *ptep;
+                goto out_irq_enable;
-        if (!pte_present(pte))
-                goto out;
-        pa  = (pte_pfn(pte) << PAGE_SHIFT);
+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
-        pa += (tpc & ~PAGE_MASK);
+        if (pmd_trans_huge(*pmdp)) {
+                if (pmd_trans_splitting(*pmdp))
+                        goto out_irq_enable;
-        /* Use phys bypass so we don't pollute dtlb/dcache. */
+                pa  = pmd_pfn(*pmdp) << PAGE_SHIFT;
-        __asm__ __volatile__("lduwa [%1] %2, %0"
+                pa += tpc & ~HPAGE_MASK;
-                             : "=r" (insn)
-                             : "r" (pa), "i" (ASI_PHYS_USE_EC));
+                /* Use phys bypass so we don't pollute dtlb/dcache. */
+                __asm__ __volatile__("lduwa [%1] %2, %0"
+                                     : "=r" (insn)
+                                     : "r" (pa), "i" (ASI_PHYS_USE_EC));
+        } else
+#endif
+        {
+                ptep = pte_offset_map(pmdp, tpc);
+                pte = *ptep;
+                if (pte_present(pte)) {
+                        pa  = (pte_pfn(pte) << PAGE_SHIFT);
+                        pa += (tpc & ~PAGE_MASK);
+                        /* Use phys bypass so we don't pollute dtlb/dcache. */
+                        __asm__ __volatile__("lduwa [%1] %2, %0"
+                                             : "=r" (insn)
+                                             : "r" (pa), "i" (ASI_PHYS_USE_EC));
+                }
+                pte_unmap(ptep);
+        }
+out_irq_enable:
+        local_irq_enable();
 out:
-        pte_unmap(ptep);
-        __asm__ __volatile__("wrpr %0, 0x0, %%pstate" : : "r" (pstate));
-outret:
        return insn;
 }
@@ -153,7 +166,8 @@ show_signal_msg(struct pt_regs *regs, int sig, int code,
 }
 static void do_fault_siginfo(int code, int sig, struct pt_regs *regs,
-                             unsigned int insn, int fault_code)
+                             unsigned long fault_addr, unsigned int insn,
+                             int fault_code)
 {
        unsigned long addr;
        siginfo_t info;
@@ -161,10 +175,18 @@ static void do_fault_siginfo(int code, int sig, struct pt_regs *regs,
        info.si_code = code;
        info.si_signo = sig;
        info.si_errno = 0;
-        if (fault_code & FAULT_CODE_ITLB)
+        if (fault_code & FAULT_CODE_ITLB) {
                addr = regs->tpc;
-        else
+        } else {
-                addr = compute_effective_address(regs, insn, 0);
+                /* If we were able to probe the faulting instruction, use it
+                 * to compute a precise fault address.  Otherwise use the fault
+                 * time provided address which may only have page granularity.
+                 */
+                if (insn)
+                        addr = compute_effective_address(regs, insn, 0);
+                else
+                        addr = fault_addr;
+        }
        info.si_addr = (void __user *) addr;
        info.si_trapno = 0;
@@ -239,7 +261,7 @@ static void __kprobes do_kernel_fault(struct pt_regs *regs, int si_code,
                /* The si_code was set to make clear whether
                 * this was a SEGV_MAPERR or SEGV_ACCERR fault.
                 */
-                do_fault_siginfo(si_code, SIGSEGV, regs, insn, fault_code);
+                do_fault_siginfo(si_code, SIGSEGV, regs, address, insn, fault_code);
                return;
        }
@@ -259,18 +281,6 @@ static void noinline __kprobes bogus_32bit_fault_tpc(struct pt_regs *regs)
        show_regs(regs);
 }
-static void noinline __kprobes bogus_32bit_fault_address(struct pt_regs *regs,
-                                                         unsigned long addr)
-{
-        static int times;
-        if (times++ < 10)
-                printk(KERN_ERR "FAULT[%s:%d]: 32-bit process "
-                       "reports 64-bit fault address [%lx]\n",
-                       current->comm, current->pid, addr);
-        show_regs(regs);
-}
 asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs)
 {
        enum ctx_state prev_state = exception_enter();
@@ -300,10 +310,8 @@ asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs)
                                goto intr_or_no_mm;
                        }
                }
-                if (unlikely((address >> 32) != 0)) {
+                if (unlikely((address >> 32) != 0))
-                        bogus_32bit_fault_address(regs, address);
                        goto intr_or_no_mm;
-                }
        }
        if (regs->tstate & TSTATE_PRIV) {
@@ -525,7 +533,7 @@ do_sigbus:
         * Send a sigbus, regardless of whether we were in kernel
         * or user mode.
         */
-        do_fault_siginfo(BUS_ADRERR, SIGBUS, regs, insn, fault_code);
+        do_fault_siginfo(BUS_ADRERR, SIGBUS, regs, address, insn, fault_code);
        /* Kernel mode? Handle exceptions or die */
        if (regs->tstate & TSTATE_PRIV)
diff --git a/arch/sparc/mm/gup.c b/arch/sparc/mm/gup.c
index c4d3da68b800..1aed0432c64b 100644
--- a/arch/sparc/mm/gup.c
+++ b/arch/sparc/mm/gup.c
@@ -73,7 +73,7 @@ static int gup_huge_pmd(pmd_t *pmdp, pmd_t pmd, unsigned long addr,
        struct page *head, *page, *tail;
        int refs;
-        if (!pmd_large(pmd))
+        if (!(pmd_val(pmd) & _PAGE_VALID))
                return 0;
        if (write && !pmd_write(pmd))
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c
index eafbc65c9c47..ed3c969a5f4c 100644
--- a/arch/sparc/mm/init_64.c
+++ b/arch/sparc/mm/init_64.c
@@ -588,7 +588,7 @@ static void __init remap_kernel(void)
        int i, tlb_ent = sparc64_highest_locked_tlbent();
        tte_vaddr = (unsigned long) KERNBASE;
-        phys_page = (prom_boot_mapping_phys_low >> 22UL) << 22UL;
+        phys_page = (prom_boot_mapping_phys_low >> ILOG2_4MB) << ILOG2_4MB;
        tte_data = kern_large_tte(phys_page);
        kern_locked_tte_data = tte_data;
@@ -1881,7 +1881,7 @@ void __init paging_init(void)
        BUILD_BUG_ON(NR_CPUS > 4096);
-        kern_base = (prom_boot_mapping_phys_low >> 22UL) << 22UL;
+        kern_base = (prom_boot_mapping_phys_low >> ILOG2_4MB) << ILOG2_4MB;
        kern_size = (unsigned long)&_end - (unsigned long)KERNBASE;
        /* Invalidate both kernel TSBs.  */
@@ -1937,7 +1937,7 @@ void __init paging_init(void)
        shift = kern_base + PAGE_OFFSET - ((unsigned long)KERNBASE);
        real_end = (unsigned long)_end;
-        num_kernel_image_mappings = DIV_ROUND_UP(real_end - KERNBASE, 1 << 22);
+        num_kernel_image_mappings = DIV_ROUND_UP(real_end - KERNBASE, 1 << ILOG2_4MB);
        printk("Kernel: Using %d locked TLB entries for main kernel image.\n",
               num_kernel_image_mappings);
@@ -2094,7 +2094,7 @@ static void __init setup_valid_addr_bitmap_from_pavail(unsigned long *bitmap)
                                if (new_start <= old_start &&
                                    new_end >= (old_start + PAGE_SIZE)) {
-                                        set_bit(old_start >> 22, bitmap);
+                                        set_bit(old_start >> ILOG2_4MB, bitmap);
                                        goto do_next_page;
                                }
                        }
@@ -2143,7 +2143,7 @@ void __init mem_init(void)
        addr = PAGE_OFFSET + kern_base;
        last = PAGE_ALIGN(kern_size) + addr;
        while (addr < last) {
-                set_bit(__pa(addr) >> 22, sparc64_valid_addr_bitmap);
+                set_bit(__pa(addr) >> ILOG2_4MB, sparc64_valid_addr_bitmap);
                addr += PAGE_SIZE;
        }
@@ -2267,7 +2267,7 @@ int __meminit vmemmap_populate(unsigned long vstart, unsigned long vend,
                void *block;
                if (!(*vmem_pp & _PAGE_VALID)) {
-                        block = vmemmap_alloc_block(1UL << 22, node);
+                        block = vmemmap_alloc_block(1UL << ILOG2_4MB, node);
                        if (!block)
                                return -ENOMEM;
diff --git a/arch/sparc/mm/tlb.c b/arch/sparc/mm/tlb.c
index b12cb5e72812..b89aba217e3b 100644
--- a/arch/sparc/mm/tlb.c
+++ b/arch/sparc/mm/tlb.c
@@ -134,7 +134,7 @@ no_cache_flush:
 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 static void tlb_batch_pmd_scan(struct mm_struct *mm, unsigned long vaddr,
-                               pmd_t pmd, bool exec)
+                               pmd_t pmd)
 {
        unsigned long end;
        pte_t *pte;
@@ -142,8 +142,11 @@ static void tlb_batch_pmd_scan(struct mm_struct *mm, unsigned long vaddr,
        pte = pte_offset_map(&pmd, vaddr);
        end = vaddr + HPAGE_SIZE;
        while (vaddr < end) {
-                if (pte_val(*pte) & _PAGE_VALID)
+                if (pte_val(*pte) & _PAGE_VALID) {
+                        bool exec = pte_exec(*pte);
                        tlb_batch_add_one(mm, vaddr, exec);
+                }
                pte++;
                vaddr += PAGE_SIZE;
        }
@@ -177,19 +180,30 @@ void set_pmd_at(struct mm_struct *mm, unsigned long addr,
        }
        if (!pmd_none(orig)) {
-                pte_t orig_pte = __pte(pmd_val(orig));
-                bool exec = pte_exec(orig_pte);
                addr &= HPAGE_MASK;
                if (pmd_trans_huge(orig)) {
+                        pte_t orig_pte = __pte(pmd_val(orig));
+                        bool exec = pte_exec(orig_pte);
                        tlb_batch_add_one(mm, addr, exec);
                        tlb_batch_add_one(mm, addr + REAL_HPAGE_SIZE, exec);
                } else {
-                        tlb_batch_pmd_scan(mm, addr, orig, exec);
+                        tlb_batch_pmd_scan(mm, addr, orig);
                }
        }
 }
+void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
+                     pmd_t *pmdp)
+{
+        pmd_t entry = *pmdp;
+        pmd_val(entry) &= ~_PAGE_VALID;
+        set_pmd_at(vma->vm_mm, address, pmdp, entry);
+        flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
+}
 void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
                                pgtable_t pgtable)
 {
diff --git a/arch/sparc/mm/tsb.c b/arch/sparc/mm/tsb.c
index f5d506fdddad..fe19b81acc09 100644
--- a/arch/sparc/mm/tsb.c
+++ b/arch/sparc/mm/tsb.c
@@ -133,7 +133,19 @@ static void setup_tsb_params(struct mm_struct *mm, unsigned long tsb_idx, unsign
        mm->context.tsb_block[tsb_idx].tsb_nentries =
                tsb_bytes / sizeof(struct tsb);
-        base = TSBMAP_BASE;
+        switch (tsb_idx) {
+        case MM_TSB_BASE:
+                base = TSBMAP_8K_BASE;
+                break;
+#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
+        case MM_TSB_HUGE:
+                base = TSBMAP_4M_BASE;
+                break;
+#endif
+        default:
+                BUG();
+        }
        tte = pgprot_val(PAGE_KERNEL_LOCKED);
        tsb_paddr = __pa(mm->context.tsb_block[tsb_idx].tsb);
        BUG_ON(tsb_paddr & (tsb_bytes - 1UL));
diff --git a/arch/unicore32/include/asm/pci.h b/arch/unicore32/include/asm/pci.h
index f5e108f4a151..654407e98619 100644
--- a/arch/unicore32/include/asm/pci.h
+++ b/arch/unicore32/include/asm/pci.h
@@ -18,11 +18,6 @@
 #include <asm-generic/pci.h>
 #include <mach/hardware.h> /* for PCIBIOS_MIN_* */
-static inline void pcibios_penalize_isa_irq(int irq, int active)
-{
-        /* We don't do dynamic PCI IRQ allocation */
-}
 #ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                        enum pci_dma_burst_strategy *strat,
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index ce6ad7e6a7d7..33f71b01fd22 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -79,6 +79,7 @@ else
        UTS_MACHINE := x86_64
        CHECKFLAGS += -D__x86_64__ -m64
+        biarch := -m64
        KBUILD_AFLAGS += -m64
        KBUILD_CFLAGS += -m64
diff --git a/arch/x86/boot/Makefile b/arch/x86/boot/Makefile
index abb9eba61b50..dbe8dd2fe247 100644
--- a/arch/x86/boot/Makefile
+++ b/arch/x86/boot/Makefile
@@ -71,7 +71,7 @@ $(obj)/vmlinux.bin: $(obj)/compressed/vmlinux FORCE
 SETUP_OBJS = $(addprefix $(obj)/,$(setup-y))
-sed-voffset := -e 's/^\([0-9a-fA-F]*\) . \(_text\|_end\)$$/\#define VO_\2 0x\1/p'
+sed-voffset := -e 's/^\([0-9a-fA-F]*\) [ABCDGRSTVW] \(_text\|_end\)$$/\#define VO_\2 0x\1/p'
 quiet_cmd_voffset = VOFFSET $@
      cmd_voffset = $(NM) $< | sed -n $(sed-voffset) > $@
@@ -80,7 +80,7 @@ targets += voffset.h
 $(obj)/voffset.h: vmlinux FORCE
        $(call if_changed,voffset)
-sed-zoffset := -e 's/^\([0-9a-fA-F]*\) . \(startup_32\|startup_64\|efi32_stub_entry\|efi64_stub_entry\|efi_pe_entry\|input_data\|_end\|z_.*\)$$/\#define ZO_\2 0x\1/p'
+sed-zoffset := -e 's/^\([0-9a-fA-F]*\) [ABCDGRSTVW] \(startup_32\|startup_64\|efi32_stub_entry\|efi64_stub_entry\|efi_pe_entry\|input_data\|_end\|z_.*\)$$/\#define ZO_\2 0x\1/p'
 quiet_cmd_zoffset = ZOFFSET $@
      cmd_zoffset = $(NM) $< | sed -n $(sed-zoffset) > $@
diff --git a/arch/x86/boot/compressed/misc.c b/arch/x86/boot/compressed/misc.c
index 17684615374b..57ab74df7eea 100644
--- a/arch/x86/boot/compressed/misc.c
+++ b/arch/x86/boot/compressed/misc.c
@@ -354,7 +354,7 @@ static void parse_elf(void *output)
        free(phdrs);
 }
-asmlinkage void *decompress_kernel(void *rmode, memptr heap,
+asmlinkage __visible void *decompress_kernel(void *rmode, memptr heap,
                                  unsigned char *input_data,
                                  unsigned long input_len,
                                  unsigned char *output,
diff --git a/arch/x86/include/asm/hpet.h b/arch/x86/include/asm/hpet.h
index b18df579c0e9..36f7125945e3 100644
--- a/arch/x86/include/asm/hpet.h
+++ b/arch/x86/include/asm/hpet.h
@@ -63,6 +63,7 @@
 /* hpet memory map physical address */
 extern unsigned long hpet_address;
 extern unsigned long force_hpet_address;
+extern int boot_hpet_disable;
 extern u8 hpet_blockid;
 extern int hpet_force_user;
 extern u8 hpet_msi_disable;
diff --git a/arch/x86/include/asm/hugetlb.h b/arch/x86/include/asm/hugetlb.h
index a8091216963b..68c05398bba9 100644
--- a/arch/x86/include/asm/hugetlb.h
+++ b/arch/x86/include/asm/hugetlb.h
@@ -52,6 +52,7 @@ static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
 static inline void huge_ptep_clear_flush(struct vm_area_struct *vma,
                                         unsigned long addr, pte_t *ptep)
 {
+        ptep_clear_flush(vma, addr, ptep);
 }
 static inline int huge_pte_none(pte_t pte)
diff --git a/arch/x86/include/asm/page_64_types.h b/arch/x86/include/asm/page_64_types.h
index 8de6d9cf3b95..678205195ae1 100644
--- a/arch/x86/include/asm/page_64_types.h
+++ b/arch/x86/include/asm/page_64_types.h
@@ -1,7 +1,7 @@
 #ifndef _ASM_X86_PAGE_64_DEFS_H
 #define _ASM_X86_PAGE_64_DEFS_H
-#define THREAD_SIZE_ORDER       1
+#define THREAD_SIZE_ORDER       2
 #define THREAD_SIZE  (PAGE_SIZE << THREAD_SIZE_ORDER)
 #define CURRENT_MASK (~(THREAD_SIZE - 1))
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index 96ae4f4040bb..0892ea0e683f 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -68,7 +68,6 @@ void pcibios_config_init(void);
 void pcibios_scan_root(int bus);
 void pcibios_set_master(struct pci_dev *dev);
-void pcibios_penalize_isa_irq(int irq, int active);
 struct irq_routing_table *pcibios_get_irq_routing_table(void);
 int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq);
diff --git a/arch/x86/include/asm/xen/hypercall.h b/arch/x86/include/asm/xen/hypercall.h
index e709884d0ef9..ca08a27b90b3 100644
--- a/arch/x86/include/asm/xen/hypercall.h
+++ b/arch/x86/include/asm/xen/hypercall.h
@@ -343,7 +343,7 @@ HYPERVISOR_memory_op(unsigned int cmd, void *arg)
 }
 static inline int
-HYPERVISOR_multicall(void *call_list, int nr_calls)
+HYPERVISOR_multicall(void *call_list, uint32_t nr_calls)
 {
        return _hypercall2(int, multicall, call_list, nr_calls);
 }
diff --git a/arch/x86/include/asm/xen/interface.h b/arch/x86/include/asm/xen/interface.h
index fd9cb7695b5f..3400dbaec3c3 100644
--- a/arch/x86/include/asm/xen/interface.h
+++ b/arch/x86/include/asm/xen/interface.h
@@ -54,6 +54,9 @@ typedef unsigned long xen_pfn_t;
 #define PRI_xen_pfn "lx"
 typedef unsigned long xen_ulong_t;
 #define PRI_xen_ulong "lx"
+typedef long xen_long_t;
+#define PRI_xen_long "lx"
 /* Guest handles for primitive C types. */
 __DEFINE_GUEST_HANDLE(uchar, unsigned char);
 __DEFINE_GUEST_HANDLE(uint,  unsigned int);
diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h
index c827ace3121b..fcf2b3ae1bf0 100644
--- a/arch/x86/include/uapi/asm/msr-index.h
+++ b/arch/x86/include/uapi/asm/msr-index.h
@@ -384,7 +384,7 @@
 #define MSR_IA32_MISC_ENABLE_MWAIT_BIT                  18
 #define MSR_IA32_MISC_ENABLE_MWAIT                      (1ULL << MSR_IA32_MISC_ENABLE_MWAIT_BIT)
 #define MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT            22
-#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID                (1ULL << MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT);
+#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID                (1ULL << MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT)
 #define MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT           23
 #define MSR_IA32_MISC_ENABLE_XTPR_DISABLE               (1ULL << MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT)
 #define MSR_IA32_MISC_ENABLE_XD_DISABLE_BIT             34
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 3a2ae4c88948..31368207837c 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -31,7 +31,7 @@ static char temp_stack[4096];
 *
 * Wrapper around acpi_enter_sleep_state() to be called by assmebly.
 */
-acpi_status asmlinkage x86_acpi_enter_sleep_state(u8 state)
+acpi_status asmlinkage __visible x86_acpi_enter_sleep_state(u8 state)
 {
        return acpi_enter_sleep_state(state);
 }
diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c
index 9fa8aa051f54..76164e173a24 100644
--- a/arch/x86/kernel/aperture_64.c
+++ b/arch/x86/kernel/aperture_64.c
@@ -10,6 +10,8 @@
 *
 * Copyright 2002 Andi Kleen, SuSE Labs.
 */
+#define pr_fmt(fmt) "AGP: " fmt
 #include <linux/kernel.h>
 #include <linux/types.h>
 #include <linux/init.h>
@@ -75,14 +77,13 @@ static u32 __init allocate_aperture(void)
        addr = memblock_find_in_range(GART_MIN_ADDR, GART_MAX_ADDR,
                                      aper_size, aper_size);
        if (!addr) {
-                printk(KERN_ERR
+                pr_err("Cannot allocate aperture memory hole [mem %#010lx-%#010lx] (%uKB)\n",
-                        "Cannot allocate aperture memory hole (%lx,%uK)\n",
+                       addr, addr + aper_size - 1, aper_size >> 10);
-                                addr, aper_size>>10);
                return 0;
        }
        memblock_reserve(addr, aper_size);
-        printk(KERN_INFO "Mapping aperture over %d KB of RAM @ %lx\n",
+        pr_info("Mapping aperture over RAM [mem %#010lx-%#010lx] (%uKB)\n",
-                        aper_size >> 10, addr);
+                addr, addr + aper_size - 1, aper_size >> 10);
        register_nosave_region(addr >> PAGE_SHIFT,
                               (addr+aper_size) >> PAGE_SHIFT);
@@ -126,10 +127,11 @@ static u32 __init read_agp(int bus, int slot, int func, int cap, u32 *order)
        u64 aper;
        u32 old_order;
-        printk(KERN_INFO "AGP bridge at %02x:%02x:%02x\n", bus, slot, func);
+        pr_info("pci 0000:%02x:%02x:%02x: AGP bridge\n", bus, slot, func);
        apsizereg = read_pci_config_16(bus, slot, func, cap + 0x14);
        if (apsizereg == 0xffffffff) {
-                printk(KERN_ERR "APSIZE in AGP bridge unreadable\n");
+                pr_err("pci 0000:%02x:%02x.%d: APSIZE unreadable\n",
+                       bus, slot, func);
                return 0;
        }
@@ -153,16 +155,18 @@ static u32 __init read_agp(int bus, int slot, int func, int cap, u32 *order)
         * On some sick chips, APSIZE is 0. It means it wants 4G
         * so let double check that order, and lets trust AMD NB settings:
         */
-        printk(KERN_INFO "Aperture from AGP @ %Lx old size %u MB\n",
+        pr_info("pci 0000:%02x:%02x.%d: AGP aperture [bus addr %#010Lx-%#010Lx] (old size %uMB)\n",
-                        aper, 32 << old_order);
+                bus, slot, func, aper, aper + (32ULL << (old_order + 20)) - 1,
+                32 << old_order);
        if (aper + (32ULL<<(20 + *order)) > 0x100000000ULL) {
-                printk(KERN_INFO "Aperture size %u MB (APSIZE %x) is not right, using settings from NB\n",
+                pr_info("pci 0000:%02x:%02x.%d: AGP aperture size %uMB (APSIZE %#x) is not right, using settings from NB\n",
-                                32 << *order, apsizereg);
+                        bus, slot, func, 32 << *order, apsizereg);
                *order = old_order;
        }
-        printk(KERN_INFO "Aperture from AGP @ %Lx size %u MB (APSIZE %x)\n",
+        pr_info("pci 0000:%02x:%02x.%d: AGP aperture [bus addr %#010Lx-%#010Lx] (%uMB, APSIZE %#x)\n",
-                        aper, 32 << *order, apsizereg);
+                bus, slot, func, aper, aper + (32ULL << (*order + 20)) - 1,
+                32 << *order, apsizereg);
        if (!aperture_valid(aper, (32*1024*1024) << *order, 32<<20))
                return 0;
@@ -218,7 +222,7 @@ static u32 __init search_agp_bridge(u32 *order, int *valid_agp)
                        }
                }
        }
-        printk(KERN_INFO "No AGP bridge found\n");
+        pr_info("No AGP bridge found\n");
        return 0;
 }
@@ -310,7 +314,8 @@ void __init early_gart_iommu_check(void)
                if (e820_any_mapped(aper_base, aper_base + aper_size,
                                    E820_RAM)) {
                        /* reserve it, so we can reuse it in second kernel */
-                        printk(KERN_INFO "update e820 for GART\n");
+                        pr_info("e820: reserve [mem %#010Lx-%#010Lx] for GART\n",
+                                aper_base, aper_base + aper_size - 1);
                        e820_add_region(aper_base, aper_size, E820_RESERVED);
                        update_e820();
                }
@@ -354,7 +359,7 @@ int __init gart_iommu_hole_init(void)
            !early_pci_allowed())
                return -ENODEV;
-        printk(KERN_INFO  "Checking aperture...\n");
+        pr_info("Checking aperture...\n");
        if (!fallback_aper_force)
                agp_aper_base = search_agp_bridge(&agp_aper_order, &valid_agp);
@@ -395,8 +400,9 @@ int __init gart_iommu_hole_init(void)
                        aper_base = read_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE) & 0x7fff;
                        aper_base <<= 25;
-                        printk(KERN_INFO "Node %d: aperture @ %Lx size %u MB\n",
+                        pr_info("Node %d: aperture [bus addr %#010Lx-%#010Lx] (%uMB)\n",
-                                        node, aper_base, aper_size >> 20);
+                                node, aper_base, aper_base + aper_size - 1,
+                                aper_size >> 20);
                        node++;
                        if (!aperture_valid(aper_base, aper_size, 64<<20)) {
@@ -407,9 +413,9 @@ int __init gart_iommu_hole_init(void)
                                        if (!no_iommu &&
                                            max_pfn > MAX_DMA32_PFN &&
                                            !printed_gart_size_msg) {
-                                                printk(KERN_ERR "you are using iommu with agp, but GART size is less than 64M\n");
+                                                pr_err("you are using iommu with agp, but GART size is less than 64MB\n");
-                                                printk(KERN_ERR "please increase GART size in your BIOS setup\n");
+                                                pr_err("please increase GART size in your BIOS setup\n");
-                                                printk(KERN_ERR "if BIOS doesn't have that option, contact your HW vendor!\n");
+                                                pr_err("if BIOS doesn't have that option, contact your HW vendor!\n");
                                                printed_gart_size_msg = 1;
                                        }
                                } else {
@@ -446,13 +452,10 @@ out:
                   force_iommu ||
                   valid_agp ||
                   fallback_aper_force) {
-                printk(KERN_INFO
+                pr_info("Your BIOS doesn't leave a aperture memory hole\n");
-                        "Your BIOS doesn't leave a aperture memory hole\n");
+                pr_info("Please enable the IOMMU option in the BIOS setup\n");
-                printk(KERN_INFO
+                pr_info("This costs you %dMB of RAM\n",
-                        "Please enable the IOMMU option in the BIOS setup\n");
+                        32 << fallback_aper_order);
-                printk(KERN_INFO
-                        "This costs you %d MB of RAM\n",
-                                32 << fallback_aper_order);
                aper_order = fallback_aper_order;
                aper_alloc = allocate_aperture();
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index d23aa82e7a7b..992060e09897 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -2189,7 +2189,7 @@ void send_cleanup_vector(struct irq_cfg *cfg)
        cfg->move_in_progress = 0;
 }
-asmlinkage void smp_irq_move_cleanup_interrupt(void)
+asmlinkage __visible void smp_irq_move_cleanup_interrupt(void)
 {
        unsigned vector, me;
diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c
index d921b7ee6595..36a1bb6d1ee0 100644
--- a/arch/x86/kernel/cpu/mcheck/therm_throt.c
+++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c
@@ -429,14 +429,14 @@ static inline void __smp_thermal_interrupt(void)
        smp_thermal_vector();
 }
-asmlinkage void smp_thermal_interrupt(struct pt_regs *regs)
+asmlinkage __visible void smp_thermal_interrupt(struct pt_regs *regs)
 {
        entering_irq();
        __smp_thermal_interrupt();
        exiting_ack_irq();
 }
-asmlinkage void smp_trace_thermal_interrupt(struct pt_regs *regs)
+asmlinkage __visible void smp_trace_thermal_interrupt(struct pt_regs *regs)
 {
        entering_irq();
        trace_thermal_apic_entry(THERMAL_APIC_VECTOR);
diff --git a/arch/x86/kernel/cpu/mcheck/threshold.c b/arch/x86/kernel/cpu/mcheck/threshold.c
index fe6b1c86645b..7245980186ee 100644
--- a/arch/x86/kernel/cpu/mcheck/threshold.c
+++ b/arch/x86/kernel/cpu/mcheck/threshold.c
@@ -24,14 +24,14 @@ static inline void __smp_threshold_interrupt(void)
        mce_threshold_vector();
 }
-asmlinkage void smp_threshold_interrupt(void)
+asmlinkage __visible void smp_threshold_interrupt(void)
 {
        entering_irq();
        __smp_threshold_interrupt();
        exiting_ack_irq();
 }
-asmlinkage void smp_trace_threshold_interrupt(void)
+asmlinkage __visible void smp_trace_threshold_interrupt(void)
 {
        entering_irq();
        trace_threshold_apic_entry(THRESHOLD_APIC_VECTOR);
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index aa333d966886..adb02aa62af5 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -169,7 +169,6 @@ static struct event_constraint intel_slm_event_constraints[] __read_mostly =
 {
        FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
        FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
-        FIXED_EVENT_CONSTRAINT(0x013c, 2), /* CPU_CLK_UNHALTED.REF */
        FIXED_EVENT_CONSTRAINT(0x0300, 2), /* pseudo CPU_CLK_UNHALTED.REF */
        EVENT_CONSTRAINT_END
 };
diff --git a/arch/x86/kernel/cpu/rdrand.c b/arch/x86/kernel/cpu/rdrand.c
index 384df5105fbc..136ac74dee82 100644
--- a/arch/x86/kernel/cpu/rdrand.c
+++ b/arch/x86/kernel/cpu/rdrand.c
@@ -27,6 +27,7 @@
 static int __init x86_rdrand_setup(char *s)
 {
        setup_clear_cpu_cap(X86_FEATURE_RDRAND);
+        setup_clear_cpu_cap(X86_FEATURE_RDSEED);
        return 1;
 }
 __setup("nordrand", x86_rdrand_setup);
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index 6e2537c32190..6cda0baeac9d 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -17,6 +17,7 @@
 #include <asm/dma.h>
 #include <asm/io_apic.h>
 #include <asm/apic.h>
+#include <asm/hpet.h>
 #include <asm/iommu.h>
 #include <asm/gart.h>
 #include <asm/irq_remapping.h>
@@ -530,6 +531,15 @@ static void __init intel_graphics_stolen(int num, int slot, int func)
        }
 }
+static void __init force_disable_hpet(int num, int slot, int func)
+{
+#ifdef CONFIG_HPET_TIMER
+        boot_hpet_disable = 1;
+        pr_info("x86/hpet: Will disable the HPET for this platform because it's not reliable\n");
+#endif
+}
 #define QFLAG_APPLY_ONCE        0x1
 #define QFLAG_APPLIED           0x2
 #define QFLAG_DONE              (QFLAG_APPLY_ONCE|QFLAG_APPLIED)
@@ -567,6 +577,12 @@ static struct chipset early_qrk[] __initdata = {
          PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
        { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA, PCI_ANY_ID,
          QFLAG_APPLY_ONCE, intel_graphics_stolen },
+        /*
+         * HPET on current version of Baytrail platform has accuracy
+         * problems, disable it for now:
+         */
+        { PCI_VENDOR_ID_INTEL, 0x0f00,
+                PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
        {}
 };
diff --git a/arch/x86/kernel/head32.c b/arch/x86/kernel/head32.c
index c61a14a4a310..d6c1b9836995 100644
--- a/arch/x86/kernel/head32.c
+++ b/arch/x86/kernel/head32.c
@@ -29,7 +29,7 @@ static void __init i386_default_early_setup(void)
        reserve_ebda_region();
 }
-asmlinkage void __init i386_start_kernel(void)
+asmlinkage __visible void __init i386_start_kernel(void)
 {
        sanitize_boot_params(&boot_params);
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index 85126ccbdf6b..068054f4bf20 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -137,7 +137,7 @@ static void __init copy_bootdata(char *real_mode_data)
        }
 }
-asmlinkage void __init x86_64_start_kernel(char * real_mode_data)
+asmlinkage __visible void __init x86_64_start_kernel(char * real_mode_data)
 {
        int i;
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index 8d80ae011603..4177bfbc80b0 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -88,7 +88,7 @@ static inline void hpet_clear_mapping(void)
 /*
 * HPET command line enable / disable
 */
-static int boot_hpet_disable;
+int boot_hpet_disable;
 int hpet_force_user;
 static int hpet_verbose;
diff --git a/arch/x86/kernel/ldt.c b/arch/x86/kernel/ldt.c
index af1d14a9ebda..dcbbaa165bde 100644
--- a/arch/x86/kernel/ldt.c
+++ b/arch/x86/kernel/ldt.c
@@ -20,6 +20,8 @@
 #include <asm/mmu_context.h>
 #include <asm/syscalls.h>
+int sysctl_ldt16 = 0;
 #ifdef CONFIG_SMP
 static void flush_ldt(void *current_mm)
 {
@@ -234,7 +236,7 @@ static int write_ldt(void __user *ptr, unsigned long bytecount, int oldmode)
         * IRET leaking the high bits of the kernel stack address.
         */
 #ifdef CONFIG_X86_64
-        if (!ldt_info.seg_32bit) {
+        if (!ldt_info.seg_32bit && !sysctl_ldt16) {
                error = -EINVAL;
                goto out_unlock;
        }
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 9c0280f93d05..898d077617a9 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -52,7 +52,7 @@
 asmlinkage extern void ret_from_fork(void);
-asmlinkage DEFINE_PER_CPU(unsigned long, old_rsp);
+__visible DEFINE_PER_CPU(unsigned long, old_rsp);
 /* Prints also some state that isn't saved in the pt_regs */
 void __show_regs(struct pt_regs *regs, int all)
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index 3399d3a99730..52b1157c53eb 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -191,6 +191,16 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
                },
        },
+        /* Certec */
+        {       /* Handle problems with rebooting on Certec BPC600 */
+                .callback = set_pci_reboot,
+                .ident = "Certec BPC600",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "Certec"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "BPC600"),
+                },
+        },
        /* Dell */
        {       /* Handle problems with rebooting on Dell DXP061 */
                .callback = set_bios_reboot,
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
index 7c3a5a61f2e4..be8e1bde07aa 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -168,7 +168,7 @@ static int smp_stop_nmi_callback(unsigned int val, struct pt_regs *regs)
 * this function calls the 'stop' function on all other CPUs in the system.
 */
-asmlinkage void smp_reboot_interrupt(void)
+asmlinkage __visible void smp_reboot_interrupt(void)
 {
        ack_APIC_irq();
        irq_enter();
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 57409f6b8c62..f73b5d435bdc 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -357,7 +357,7 @@ exit:
 * for scheduling or signal handling. The actual stack switch is done in
 * entry.S
 */
-asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs)
+asmlinkage __visible __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs)
 {
        struct pt_regs *regs = eregs;
        /* Did already sync */
@@ -601,11 +601,11 @@ do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
 #endif
 }
-asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void)
+asmlinkage __visible void __attribute__((weak)) smp_thermal_interrupt(void)
 {
 }
-asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void)
+asmlinkage __visible void __attribute__((weak)) smp_threshold_interrupt(void)
 {
 }
diff --git a/arch/x86/kernel/vsmp_64.c b/arch/x86/kernel/vsmp_64.c
index 5edc34b5b951..b99b9ad8540c 100644
--- a/arch/x86/kernel/vsmp_64.c
+++ b/arch/x86/kernel/vsmp_64.c
@@ -36,7 +36,7 @@ static int irq_routing_comply = 1;
 * and vice versa.
 */
-asmlinkage unsigned long vsmp_save_fl(void)
+asmlinkage __visible unsigned long vsmp_save_fl(void)
 {
        unsigned long flags = native_save_fl();
@@ -56,7 +56,7 @@ __visible void vsmp_restore_fl(unsigned long flags)
 }
 PV_CALLEE_SAVE_REGS_THUNK(vsmp_restore_fl);
-asmlinkage void vsmp_irq_disable(void)
+asmlinkage __visible void vsmp_irq_disable(void)
 {
        unsigned long flags = native_save_fl();
@@ -64,7 +64,7 @@ asmlinkage void vsmp_irq_disable(void)
 }
 PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_disable);
-asmlinkage void vsmp_irq_enable(void)
+asmlinkage __visible void vsmp_irq_enable(void)
 {
        unsigned long flags = native_save_fl();
diff --git a/arch/x86/kernel/vsyscall_gtod.c b/arch/x86/kernel/vsyscall_gtod.c
index f9c6e56e14b5..9531fbb123ba 100644
--- a/arch/x86/kernel/vsyscall_gtod.c
+++ b/arch/x86/kernel/vsyscall_gtod.c
@@ -43,7 +43,7 @@ void update_vsyscall(struct timekeeper *tk)
        vdata->monotonic_time_sec       = tk->xtime_sec
                                        + tk->wall_to_monotonic.tv_sec;
        vdata->monotonic_time_snsec     = tk->xtime_nsec
-                                        + (tk->wall_to_monotonic.tv_nsec
+                                        + ((u64)tk->wall_to_monotonic.tv_nsec
                                                << tk->shift);
        while (vdata->monotonic_time_snsec >=
                                        (((u64)NSEC_PER_SEC) << tk->shift)) {
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 33e8c028842f..138ceffc6377 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -7778,7 +7778,8 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
        exec_control = vmcs12->pin_based_vm_exec_control;
        exec_control |= vmcs_config.pin_based_exec_ctrl;
-        exec_control &= ~PIN_BASED_VMX_PREEMPTION_TIMER;
+        exec_control &= ~(PIN_BASED_VMX_PREEMPTION_TIMER |
+                          PIN_BASED_POSTED_INTR);
        vmcs_write32(PIN_BASED_VM_EXEC_CONTROL, exec_control);
        vmx->nested.preemption_timer_expired = false;
@@ -7815,7 +7816,9 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
                if (!vmx->rdtscp_enabled)
                        exec_control &= ~SECONDARY_EXEC_RDTSCP;
                /* Take the following fields only from vmcs12 */
-                exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
+                exec_control &= ~(SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES |
+                                  SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY |
+                                  SECONDARY_EXEC_APIC_REGISTER_VIRT);
                if (nested_cpu_has(vmcs12,
                                CPU_BASED_ACTIVATE_SECONDARY_CONTROLS))
                        exec_control |= vmcs12->secondary_vm_exec_control;
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 8b8fc0b792ba..20316c67b824 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -106,6 +106,8 @@ EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 static u32 tsc_tolerance_ppm = 250;
 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
+static bool backwards_tsc_observed = false;
 #define KVM_NR_SHARED_MSRS 16
 struct kvm_shared_msrs_global {
@@ -280,7 +282,7 @@ int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 }
 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
-asmlinkage void kvm_spurious_fault(void)
+asmlinkage __visible void kvm_spurious_fault(void)
 {
        /* Fault while not rebooting.  We want the trace. */
        BUG();
@@ -1486,7 +1488,8 @@ static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
                                        &ka->master_kernel_ns,
                                        &ka->master_cycle_now);
-        ka->use_master_clock = host_tsc_clocksource & vcpus_matched;
+        ka->use_master_clock = host_tsc_clocksource && vcpus_matched
+                                && !backwards_tsc_observed;
        if (ka->use_master_clock)
                atomic_set(&kvm_guest_has_master_clock, 1);
@@ -6945,6 +6948,7 @@ int kvm_arch_hardware_enable(void *garbage)
         */
        if (backwards_tsc) {
                u64 delta_cyc = max_tsc - local_tsc;
+                backwards_tsc_observed = true;
                list_for_each_entry(kvm, &vm_list, vm_list) {
                        kvm_for_each_vcpu(i, vcpu, kvm) {
                                vcpu->arch.tsc_offset_adjustment += delta_cyc;
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index ad1fb5f53925..aae94132bc24 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -233,13 +233,13 @@ static void lguest_end_context_switch(struct task_struct *next)
 * flags word contains all kind of stuff, but in practice Linux only cares
 * about the interrupt flag.  Our "save_flags()" just returns that.
 */
-asmlinkage unsigned long lguest_save_fl(void)
+asmlinkage __visible unsigned long lguest_save_fl(void)
 {
        return lguest_data.irq_enabled;
 }
 /* Interrupts go off... */
-asmlinkage void lguest_irq_disable(void)
+asmlinkage __visible void lguest_irq_disable(void)
 {
        lguest_data.irq_enabled = 0;
 }
diff --git a/arch/x86/lib/msr.c b/arch/x86/lib/msr.c
index db9db446b71a..43623739c7cf 100644
--- a/arch/x86/lib/msr.c
+++ b/arch/x86/lib/msr.c
@@ -76,7 +76,7 @@ static inline int __flip_bit(u32 msr, u8 bit, bool set)
        if (m1.q == m.q)
                return 0;
-        err = msr_write(msr, &m);
+        err = msr_write(msr, &m1);
        if (err)
                return err;
diff --git a/arch/x86/math-emu/errors.c b/arch/x86/math-emu/errors.c
index a5449089cd9f..9e6545f269e5 100644
--- a/arch/x86/math-emu/errors.c
+++ b/arch/x86/math-emu/errors.c
@@ -302,7 +302,7 @@ static struct {
              0x242  in div_Xsig.S
 */
-asmlinkage void FPU_exception(int n)
+asmlinkage __visible void FPU_exception(int n)
 {
        int i, int_type;
@@ -492,7 +492,7 @@ int real_2op_NaN(FPU_REG const *b, u_char tagb,
 /* Invalid arith operation on Valid registers */
 /* Returns < 0 if the exception is unmasked */
-asmlinkage int arith_invalid(int deststnr)
+asmlinkage __visible int arith_invalid(int deststnr)
 {
        EXCEPTION(EX_Invalid);
@@ -507,7 +507,7 @@ asmlinkage int arith_invalid(int deststnr)
 }
 /* Divide a finite number by zero */
-asmlinkage int FPU_divide_by_zero(int deststnr, u_char sign)
+asmlinkage __visible int FPU_divide_by_zero(int deststnr, u_char sign)
 {
        FPU_REG *dest = &st(deststnr);
        int tag = TAG_Valid;
@@ -539,7 +539,7 @@ int set_precision_flag(int flags)
 }
 /* This may be called often, so keep it lean */
-asmlinkage void set_precision_flag_up(void)
+asmlinkage __visible void set_precision_flag_up(void)
 {
        if (control_word & CW_Precision)
                partial_status |= (SW_Precision | SW_C1);       /* The masked response */
@@ -548,7 +548,7 @@ asmlinkage void set_precision_flag_up(void)
 }
 /* This may be called often, so keep it lean */
-asmlinkage void set_precision_flag_down(void)
+asmlinkage __visible void set_precision_flag_down(void)
 {
        if (control_word & CW_Precision) {      /* The masked response */
                partial_status &= ~SW_C1;
@@ -557,7 +557,7 @@ asmlinkage void set_precision_flag_down(void)
                EXCEPTION(EX_Precision);
 }
-asmlinkage int denormal_operand(void)
+asmlinkage __visible int denormal_operand(void)
 {
        if (control_word & CW_Denormal) {       /* The masked response */
                partial_status |= SW_Denorm_Op;
@@ -568,7 +568,7 @@ asmlinkage int denormal_operand(void)
        }
 }
-asmlinkage int arith_overflow(FPU_REG *dest)
+asmlinkage __visible int arith_overflow(FPU_REG *dest)
 {
        int tag = TAG_Valid;
@@ -596,7 +596,7 @@ asmlinkage int arith_overflow(FPU_REG *dest)
 }
-asmlinkage int arith_underflow(FPU_REG *dest)
+asmlinkage __visible int arith_underflow(FPU_REG *dest)
 {
        int tag = TAG_Valid;
diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c
index dc017735bb91..6d5663a599a7 100644
--- a/arch/x86/net/bpf_jit_comp.c
+++ b/arch/x86/net/bpf_jit_comp.c
@@ -171,7 +171,7 @@ static struct bpf_binary_header *bpf_alloc_binary(unsigned int proglen,
        memset(header, 0xcc, sz); /* fill whole space with int3 instructions */
        header->pages = sz / PAGE_SIZE;
-        hole = sz - (proglen + sizeof(*header));
+        hole = min(sz - (proglen + sizeof(*header)), PAGE_SIZE - sizeof(*header));
        /* insert a random number of int3 instructions before BPF code */
        *image_ptr = &header->image[prandom_u32() % hole];
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index 01edac6c5e18..5075371ab593 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -489,8 +489,12 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
        }
        node = acpi_get_node(device->handle);
-        if (node == NUMA_NO_NODE)
+        if (node == NUMA_NO_NODE) {
                node = x86_pci_root_bus_node(busnum);
+                if (node != 0 && node != NUMA_NO_NODE)
+                        dev_info(&device->dev, FW_BUG "no _PXM; falling back to node %d from hardware (may be inconsistent with ACPI node numbers)\n",
+                                node);
+        }
        if (node != NUMA_NO_NODE && !node_online(node))
                node = NUMA_NO_NODE;
diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c
index e88f4c53d7f6..c20d2cc7ef64 100644
--- a/arch/x86/pci/amd_bus.c
+++ b/arch/x86/pci/amd_bus.c
@@ -11,27 +11,33 @@
 #include "bus_numa.h"
-/*
+#define AMD_NB_F0_NODE_ID                       0x60
- * This discovers the pcibus <-> node mapping on AMD K8.
+#define AMD_NB_F0_UNIT_ID                       0x64
- * also get peer root bus resource for io,mmio
+#define AMD_NB_F1_CONFIG_MAP_REG                0xe0
- */
+#define RANGE_NUM                               16
+#define AMD_NB_F1_CONFIG_MAP_RANGES             4
-struct pci_hostbridge_probe {
+struct amd_hostbridge {
        u32 bus;
        u32 slot;
-        u32 vendor;
        u32 device;
 };
-static struct pci_hostbridge_probe pci_probes[] __initdata = {
+/*
-        { 0, 0x18, PCI_VENDOR_ID_AMD, 0x1100 },
+ * IMPORTANT NOTE:
-        { 0, 0x18, PCI_VENDOR_ID_AMD, 0x1200 },
+ * hb_probes[] and early_root_info_init() is in maintenance mode.
-        { 0xff, 0, PCI_VENDOR_ID_AMD, 0x1200 },
+ * It only supports K8, Fam10h, Fam11h, and Fam15h_00h-0fh .
-        { 0, 0x18, PCI_VENDOR_ID_AMD, 0x1300 },
+ * Future processor will rely on information in ACPI.
+ */
+static struct amd_hostbridge hb_probes[] __initdata = {
+        { 0, 0x18, 0x1100 }, /* K8 */
+        { 0, 0x18, 0x1200 }, /* Family10h */
+        { 0xff, 0, 0x1200 }, /* Family10h */
+        { 0, 0x18, 0x1300 }, /* Family11h */
+        { 0, 0x18, 0x1600 }, /* Family15h */
 };
-#define RANGE_NUM 16
 static struct pci_root_info __init *find_pci_root_info(int node, int link)
 {
        struct pci_root_info *info;
@@ -45,12 +51,12 @@ static struct pci_root_info __init *find_pci_root_info(int node, int link)
 }
 /**
- * early_fill_mp_bus_to_node()
+ * early_root_info_init()
 * called before pcibios_scan_root and pci_scan_bus
- * fills the mp_bus_to_cpumask array based according to the LDT Bus Number
+ * fills the mp_bus_to_cpumask array based according
- * Registers found in the K8 northbridge
+ * to the LDT Bus Number Registers found in the northbridge.
 */
-static int __init early_fill_mp_bus_info(void)
+static int __init early_root_info_init(void)
 {
        int i;
        unsigned bus;
@@ -75,19 +81,21 @@ static int __init early_fill_mp_bus_info(void)
                return -1;
        found = false;
-        for (i = 0; i < ARRAY_SIZE(pci_probes); i++) {
+        for (i = 0; i < ARRAY_SIZE(hb_probes); i++) {
                u32 id;
                u16 device;
                u16 vendor;
-                bus = pci_probes[i].bus;
+                bus = hb_probes[i].bus;
-                slot = pci_probes[i].slot;
+                slot = hb_probes[i].slot;
                id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID);
                vendor = id & 0xffff;
                device = (id>>16) & 0xffff;
-                if (pci_probes[i].vendor == vendor &&
-                    pci_probes[i].device == device) {
+                if (vendor != PCI_VENDOR_ID_AMD)
+                        continue;
+                if (hb_probes[i].device == device) {
                        found = true;
                        break;
                }
@@ -96,10 +104,16 @@ static int __init early_fill_mp_bus_info(void)
        if (!found)
                return 0;
-        for (i = 0; i < 4; i++) {
+        /*
+         * We should learn topology and routing information from _PXM and
+         * _CRS methods in the ACPI namespace.  We extract node numbers
+         * here to work around BIOSes that don't supply _PXM.
+         */
+        for (i = 0; i < AMD_NB_F1_CONFIG_MAP_RANGES; i++) {
                int min_bus;
                int max_bus;
-                reg = read_pci_config(bus, slot, 1, 0xe0 + (i << 2));
+                reg = read_pci_config(bus, slot, 1,
+                                AMD_NB_F1_CONFIG_MAP_REG + (i << 2));
                /* Check if that register is enabled for bus range */
                if ((reg & 7) != 3)
@@ -113,10 +127,21 @@ static int __init early_fill_mp_bus_info(void)
                info = alloc_pci_root_info(min_bus, max_bus, node, link);
        }
+        /*
+         * The following code extracts routing information for use on old
+         * systems where Linux doesn't automatically use host bridge _CRS
+         * methods (or when the user specifies "pci=nocrs").
+         *
+         * We only do this through Fam11h, because _CRS should be enough on
+         * newer systems.
+         */
+        if (boot_cpu_data.x86 > 0x11)
+                return 0;
        /* get the default node and link for left over res */
-        reg = read_pci_config(bus, slot, 0, 0x60);
+        reg = read_pci_config(bus, slot, 0, AMD_NB_F0_NODE_ID);
        def_node = (reg >> 8) & 0x07;
-        reg = read_pci_config(bus, slot, 0, 0x64);
+        reg = read_pci_config(bus, slot, 0, AMD_NB_F0_UNIT_ID);
        def_link = (reg >> 8) & 0x03;
        memset(range, 0, sizeof(range));
@@ -363,7 +388,7 @@ static int __init pci_io_ecs_init(void)
        int cpu;
        /* assume all cpus from fam10h have IO ECS */
-        if (boot_cpu_data.x86 < 0x10)
+        if (boot_cpu_data.x86 < 0x10)
                return 0;
        /* Try the PCI method first. */
@@ -387,7 +412,7 @@ static int __init amd_postcore_init(void)
        if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
                return 0;
-        early_fill_mp_bus_info();
+        early_root_info_init();
        pci_io_ecs_init();
        return 0;
diff --git a/arch/x86/pci/broadcom_bus.c b/arch/x86/pci/broadcom_bus.c
index 614392ced7d6..bb461cfd01ab 100644
--- a/arch/x86/pci/broadcom_bus.c
+++ b/arch/x86/pci/broadcom_bus.c
@@ -60,8 +60,8 @@ static void __init cnb20le_res(u8 bus, u8 slot, u8 func)
        word1 = read_pci_config_16(bus, slot, func, 0xc4);
        word2 = read_pci_config_16(bus, slot, func, 0xc6);
        if (word1 != word2) {
-                res.start = (word1 << 16) | 0x0000;
+                res.start = ((resource_size_t) word1 << 16) | 0x0000;
-                res.end   = (word2 << 16) | 0xffff;
+                res.end   = ((resource_size_t) word2 << 16) | 0xffff;
                res.flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
                update_res(info, res.start, res.end, res.flags, 0);
        }
diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
index 94ae9ae9574f..b5e60268d93f 100644
--- a/arch/x86/pci/fixup.c
+++ b/arch/x86/pci/fixup.c
@@ -6,6 +6,7 @@
 #include <linux/dmi.h>
 #include <linux/pci.h>
 #include <linux/vgaarb.h>
+#include <asm/hpet.h>
 #include <asm/pci_x86.h>
 static void pci_fixup_i450nx(struct pci_dev *d)
@@ -337,9 +338,7 @@ static void pci_fixup_video(struct pci_dev *pdev)
                 * type BRIDGE, or CARDBUS. Host to PCI controllers use
                 * PCI header type NORMAL.
                 */
-                if (bridge
+                if (bridge && (pci_is_bridge(bridge))) {
-                    && ((bridge->hdr_type == PCI_HEADER_TYPE_BRIDGE)
-                       || (bridge->hdr_type == PCI_HEADER_TYPE_CARDBUS))) {
                        pci_read_config_word(bridge, PCI_BRIDGE_CONTROL,
                                                &config);
                        if (!(config & PCI_BRIDGE_CTL_VGA))
@@ -526,6 +525,19 @@ static void sb600_disable_hpet_bar(struct pci_dev *dev)
 }
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATI, 0x4385, sb600_disable_hpet_bar);
+#ifdef CONFIG_HPET_TIMER
+static void sb600_hpet_quirk(struct pci_dev *dev)
+{
+        struct resource *r = &dev->resource[1];
+        if (r->flags & IORESOURCE_MEM && r->start == hpet_address) {
+                r->flags |= IORESOURCE_PCI_FIXED;
+                dev_info(&dev->dev, "reg 0x14 contains HPET; making it immovable\n");
+        }
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, 0x4385, sb600_hpet_quirk);
+#endif
 /*
 * Twinhead H12Y needs us to block out a region otherwise we map devices
 * there and any access kills the box.
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index db6b1ab43255..a19ed92e74e4 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -271,11 +271,16 @@ static void pcibios_allocate_dev_resources(struct pci_dev *dev, int pass)
                                        "BAR %d: reserving %pr (d=%d, p=%d)\n",
                                        idx, r, disabled, pass);
                                if (pci_claim_resource(dev, idx) < 0) {
-                                        /* We'll assign a new address later */
+                                        if (r->flags & IORESOURCE_PCI_FIXED) {
-                                        pcibios_save_fw_addr(dev,
+                                                dev_info(&dev->dev, "BAR %d %pR is immovable\n",
-                                                        idx, r->start);
+                                                         idx, r);
-                                        r->end -= r->start;
+                                        } else {
-                                        r->start = 0;
+                                                /* We'll assign a new address later */
+                                                pcibios_save_fw_addr(dev,
+                                                                idx, r->start);
+                                                r->end -= r->start;
+                                                r->start = 0;
+                                        }
                                }
                        }
                }
@@ -356,6 +361,12 @@ static int __init pcibios_assign_resources(void)
        return 0;
 }
+/**
+ * called in fs_initcall (one below subsys_initcall),
+ * give a chance for motherboard reserve resources
+ */
+fs_initcall(pcibios_assign_resources);
 void pcibios_resource_survey_bus(struct pci_bus *bus)
 {
        dev_printk(KERN_DEBUG, &bus->dev, "Allocating resources\n");
@@ -392,12 +403,6 @@ void __init pcibios_resource_survey(void)
        ioapic_insert_resources();
 }
-/**
- * called in fs_initcall (one below subsys_initcall),
- * give a chance for motherboard reserve resources
- */
-fs_initcall(pcibios_assign_resources);
 static const struct vm_operations_struct pci_mmap_ops = {
        .access = generic_access_phys,
 };
diff --git a/arch/x86/platform/efi/early_printk.c b/arch/x86/platform/efi/early_printk.c
index 81b506d5befd..524142117296 100644
--- a/arch/x86/platform/efi/early_printk.c
+++ b/arch/x86/platform/efi/early_printk.c
@@ -14,48 +14,92 @@
 static const struct font_desc *font;
 static u32 efi_x, efi_y;
+static void *efi_fb;
+static bool early_efi_keep;
-static __init void early_efi_clear_scanline(unsigned int y)
+/*
+ * efi earlyprintk need use early_ioremap to map the framebuffer.
+ * But early_ioremap is not usable for earlyprintk=efi,keep, ioremap should
+ * be used instead. ioremap will be available after paging_init() which is
+ * earlier than initcall callbacks. Thus adding this early initcall function
+ * early_efi_map_fb to map the whole efi framebuffer.
+ */
+static __init int early_efi_map_fb(void)
 {
-        unsigned long base, *dst;
+        unsigned long base, size;
-        u16 len;
+        if (!early_efi_keep)
+                return 0;
        base = boot_params.screen_info.lfb_base;
-        len = boot_params.screen_info.lfb_linelength;
+        size = boot_params.screen_info.lfb_size;
+        efi_fb = ioremap(base, size);
+        return efi_fb ? 0 : -ENOMEM;
+}
+early_initcall(early_efi_map_fb);
+/*
+ * early_efi_map maps efi framebuffer region [start, start + len -1]
+ * In case earlyprintk=efi,keep we have the whole framebuffer mapped already
+ * so just return the offset efi_fb + start.
+ */
+static __init_refok void *early_efi_map(unsigned long start, unsigned long len)
+{
+        unsigned long base;
+        base = boot_params.screen_info.lfb_base;
+        if (efi_fb)
+                return (efi_fb + start);
+        else
+                return early_ioremap(base + start, len);
+}
-        dst = early_ioremap(base + y*len, len);
+static __init_refok void early_efi_unmap(void *addr, unsigned long len)
+{
+        if (!efi_fb)
+                early_iounmap(addr, len);
+}
+static void early_efi_clear_scanline(unsigned int y)
+{
+        unsigned long *dst;
+        u16 len;
+        len = boot_params.screen_info.lfb_linelength;
+        dst = early_efi_map(y*len, len);
        if (!dst)
                return;
        memset(dst, 0, len);
-        early_iounmap(dst, len);
+        early_efi_unmap(dst, len);
 }
-static __init void early_efi_scroll_up(void)
+static void early_efi_scroll_up(void)
 {
-        unsigned long base, *dst, *src;
+        unsigned long *dst, *src;
        u16 len;
        u32 i, height;
-        base = boot_params.screen_info.lfb_base;
        len = boot_params.screen_info.lfb_linelength;
        height = boot_params.screen_info.lfb_height;
        for (i = 0; i < height - font->height; i++) {
-                dst = early_ioremap(base + i*len, len);
+                dst = early_efi_map(i*len, len);
                if (!dst)
                        return;
-                src = early_ioremap(base + (i + font->height) * len, len);
+                src = early_efi_map((i + font->height) * len, len);
                if (!src) {
-                        early_iounmap(dst, len);
+                        early_efi_unmap(dst, len);
                        return;
                }
                memmove(dst, src, len);
-                early_iounmap(src, len);
+                early_efi_unmap(src, len);
-                early_iounmap(dst, len);
+                early_efi_unmap(dst, len);
        }
 }
@@ -79,16 +123,14 @@ static void early_efi_write_char(u32 *dst, unsigned char c, unsigned int h)
        }
 }
-static __init void
+static void
 early_efi_write(struct console *con, const char *str, unsigned int num)
 {
        struct screen_info *si;
-        unsigned long base;
        unsigned int len;
        const char *s;
        void *dst;
-        base = boot_params.screen_info.lfb_base;
        si = &boot_params.screen_info;
        len = si->lfb_linelength;
@@ -109,7 +151,7 @@ early_efi_write(struct console *con, const char *str, unsigned int num)
                for (h = 0; h < font->height; h++) {
                        unsigned int n, x;
-                        dst = early_ioremap(base + (efi_y + h) * len, len);
+                        dst = early_efi_map((efi_y + h) * len, len);
                        if (!dst)
                                return;
@@ -123,7 +165,7 @@ early_efi_write(struct console *con, const char *str, unsigned int num)
                                s++;
                        }
-                        early_iounmap(dst, len);
+                        early_efi_unmap(dst, len);
                }
                num -= count;
@@ -179,6 +221,9 @@ static __init int early_efi_setup(struct console *con, char *options)
        for (i = 0; i < (yres - efi_y) / font->height; i++)
                early_efi_scroll_up();
+        /* early_console_register will unset CON_BOOT in case ,keep */
+        if (!(con->flags & CON_BOOT))
+                early_efi_keep = true;
        return 0;
 }
diff --git a/arch/x86/platform/olpc/olpc-xo1-pm.c b/arch/x86/platform/olpc/olpc-xo1-pm.c
index ff0174dda810..a9acde72d4ed 100644
--- a/arch/x86/platform/olpc/olpc-xo1-pm.c
+++ b/arch/x86/platform/olpc/olpc-xo1-pm.c
@@ -75,7 +75,7 @@ static int xo1_power_state_enter(suspend_state_t pm_state)
        return 0;
 }
-asmlinkage int xo1_do_sleep(u8 sleep_state)
+asmlinkage __visible int xo1_do_sleep(u8 sleep_state)
 {
        void *pgd_addr = __va(read_cr3());
diff --git a/arch/x86/power/hibernate_64.c b/arch/x86/power/hibernate_64.c
index 304fca20d96e..35e2bb6c0f37 100644
--- a/arch/x86/power/hibernate_64.c
+++ b/arch/x86/power/hibernate_64.c
@@ -23,7 +23,7 @@
 extern __visible const void __nosave_begin, __nosave_end;
 /* Defined in hibernate_asm_64.S */
-extern asmlinkage int restore_image(void);
+extern asmlinkage __visible int restore_image(void);
 /*
 * Address to jump to in the last phase of restore in order to get to the image
diff --git a/arch/x86/vdso/vdso32-setup.c b/arch/x86/vdso/vdso32-setup.c
index 00348980a3a6..e1f220e3ca68 100644
--- a/arch/x86/vdso/vdso32-setup.c
+++ b/arch/x86/vdso/vdso32-setup.c
@@ -39,6 +39,7 @@
 #ifdef CONFIG_X86_64
 #define vdso_enabled                    sysctl_vsyscall32
 #define arch_setup_additional_pages     syscall32_setup_pages
+extern int sysctl_ldt16;
 #endif
 /*
@@ -249,6 +250,13 @@ static struct ctl_table abi_table2[] = {
                .mode           = 0644,
                .proc_handler   = proc_dointvec
        },
+        {
+                .procname       = "ldt16",
+                .data           = &sysctl_ldt16,
+                .maxlen         = sizeof(int),
+                .mode           = 0644,
+                .proc_handler   = proc_dointvec
+        },
        {}
 };
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 201d09a7c46b..f17b29210ac4 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1339,6 +1339,7 @@ xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
 static struct notifier_block xen_panic_block = {
        .notifier_call= xen_panic_event,
+        .priority = INT_MIN
 };
 int xen_panic_handler_init(void)
@@ -1515,7 +1516,7 @@ static void __init xen_pvh_early_guest_init(void)
 }
 /* First C function to be called on Xen boot */
-asmlinkage void __init xen_start_kernel(void)
+asmlinkage __visible void __init xen_start_kernel(void)
 {
        struct physdev_set_iopl set_iopl;
        int rc;
diff --git a/arch/x86/xen/irq.c b/arch/x86/xen/irq.c
index 08f763de26fe..a1207cb6472a 100644
--- a/arch/x86/xen/irq.c
+++ b/arch/x86/xen/irq.c
@@ -23,7 +23,7 @@ void xen_force_evtchn_callback(void)
        (void)HYPERVISOR_xen_version(0, NULL);
 }
-asmlinkage unsigned long xen_save_fl(void)
+asmlinkage __visible unsigned long xen_save_fl(void)
 {
        struct vcpu_info *vcpu;
        unsigned long flags;
@@ -63,7 +63,7 @@ __visible void xen_restore_fl(unsigned long flags)
 }
 PV_CALLEE_SAVE_REGS_THUNK(xen_restore_fl);
-asmlinkage void xen_irq_disable(void)
+asmlinkage __visible void xen_irq_disable(void)
 {
        /* There's a one instruction preempt window here.  We need to
           make sure we're don't switch CPUs between getting the vcpu
@@ -74,7 +74,7 @@ asmlinkage void xen_irq_disable(void)
 }
 PV_CALLEE_SAVE_REGS_THUNK(xen_irq_disable);
-asmlinkage void xen_irq_enable(void)
+asmlinkage __visible void xen_irq_enable(void)
 {
        struct vcpu_info *vcpu;
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 86e02eabb640..6f6e15d28466 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -2510,6 +2510,95 @@ void __init xen_hvm_init_mmu_ops(void)
 }
 #endif
+#ifdef CONFIG_XEN_PVH
+/*
+ * Map foreign gfn (fgfn), to local pfn (lpfn). This for the user
+ * space creating new guest on pvh dom0 and needing to map domU pages.
+ */
+static int xlate_add_to_p2m(unsigned long lpfn, unsigned long fgfn,
+                            unsigned int domid)
+{
+        int rc, err = 0;
+        xen_pfn_t gpfn = lpfn;
+        xen_ulong_t idx = fgfn;
+        struct xen_add_to_physmap_range xatp = {
+                .domid = DOMID_SELF,
+                .foreign_domid = domid,
+                .size = 1,
+                .space = XENMAPSPACE_gmfn_foreign,
+        };
+        set_xen_guest_handle(xatp.idxs, &idx);
+        set_xen_guest_handle(xatp.gpfns, &gpfn);
+        set_xen_guest_handle(xatp.errs, &err);
+        rc = HYPERVISOR_memory_op(XENMEM_add_to_physmap_range, &xatp);
+        if (rc < 0)
+                return rc;
+        return err;
+}
+static int xlate_remove_from_p2m(unsigned long spfn, int count)
+{
+        struct xen_remove_from_physmap xrp;
+        int i, rc;
+        for (i = 0; i < count; i++) {
+                xrp.domid = DOMID_SELF;
+                xrp.gpfn = spfn+i;
+                rc = HYPERVISOR_memory_op(XENMEM_remove_from_physmap, &xrp);
+                if (rc)
+                        break;
+        }
+        return rc;
+}
+struct xlate_remap_data {
+        unsigned long fgfn; /* foreign domain's gfn */
+        pgprot_t prot;
+        domid_t  domid;
+        int index;
+        struct page **pages;
+};
+static int xlate_map_pte_fn(pte_t *ptep, pgtable_t token, unsigned long addr,
+                            void *data)
+{
+        int rc;
+        struct xlate_remap_data *remap = data;
+        unsigned long pfn = page_to_pfn(remap->pages[remap->index++]);
+        pte_t pteval = pte_mkspecial(pfn_pte(pfn, remap->prot));
+        rc = xlate_add_to_p2m(pfn, remap->fgfn, remap->domid);
+        if (rc)
+                return rc;
+        native_set_pte(ptep, pteval);
+        return 0;
+}
+static int xlate_remap_gfn_range(struct vm_area_struct *vma,
+                                 unsigned long addr, unsigned long mfn,
+                                 int nr, pgprot_t prot, unsigned domid,
+                                 struct page **pages)
+{
+        int err;
+        struct xlate_remap_data pvhdata;
+        BUG_ON(!pages);
+        pvhdata.fgfn = mfn;
+        pvhdata.prot = prot;
+        pvhdata.domid = domid;
+        pvhdata.index = 0;
+        pvhdata.pages = pages;
+        err = apply_to_page_range(vma->vm_mm, addr, nr << PAGE_SHIFT,
+                                  xlate_map_pte_fn, &pvhdata);
+        flush_tlb_all();
+        return err;
+}
+#endif
 #define REMAP_BATCH_SIZE 16
 struct remap_data {
@@ -2522,7 +2611,7 @@ static int remap_area_mfn_pte_fn(pte_t *ptep, pgtable_t token,
                                 unsigned long addr, void *data)
 {
        struct remap_data *rmd = data;
-        pte_t pte = pte_mkspecial(pfn_pte(rmd->mfn++, rmd->prot));
+        pte_t pte = pte_mkspecial(mfn_pte(rmd->mfn++, rmd->prot));
        rmd->mmu_update->ptr = virt_to_machine(ptep).maddr;
        rmd->mmu_update->val = pte_val_ma(pte);
@@ -2544,13 +2633,18 @@ int xen_remap_domain_mfn_range(struct vm_area_struct *vma,
        unsigned long range;
        int err = 0;
-        if (xen_feature(XENFEAT_auto_translated_physmap))
-                return -EINVAL;
-        prot = __pgprot(pgprot_val(prot) | _PAGE_IOMAP);
        BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_IO)) == (VM_PFNMAP | VM_IO)));
+        if (xen_feature(XENFEAT_auto_translated_physmap)) {
+#ifdef CONFIG_XEN_PVH
+                /* We need to update the local page tables and the xen HAP */
+                return xlate_remap_gfn_range(vma, addr, mfn, nr, prot,
+                                             domid, pages);
+#else
+                return -EINVAL;
+#endif
+        }
        rmd.mfn = mfn;
        rmd.prot = prot;
@@ -2588,6 +2682,25 @@ int xen_unmap_domain_mfn_range(struct vm_area_struct *vma,
        if (!pages || !xen_feature(XENFEAT_auto_translated_physmap))
                return 0;
+#ifdef CONFIG_XEN_PVH
+        while (numpgs--) {
+                /*
+                 * The mmu has already cleaned up the process mmu
+                 * resources at this point (lookup_address will return
+                 * NULL).
+                 */
+                unsigned long pfn = page_to_pfn(pages[numpgs]);
+                xlate_remove_from_p2m(pfn, 1);
+        }
+        /*
+         * We don't need to flush tlbs because as part of
+         * xlate_remove_from_p2m, the hypervisor will do tlb flushes
+         * after removing the p2m entries from the EPT/NPT
+         */
+        return 0;
+#else
        return -EINVAL;
+#endif
 }
 EXPORT_SYMBOL_GPL(xen_unmap_domain_mfn_range);
diff --git a/arch/x86/xen/p2m.c b/arch/x86/xen/p2m.c
index 85e5d78c9874..9bb3d82ffec8 100644
--- a/arch/x86/xen/p2m.c
+++ b/arch/x86/xen/p2m.c
@@ -36,7 +36,7 @@
 *  pfn_to_mfn(0xc0000)=0xc0000
 *
 * The benefit of this is, that we can assume for non-RAM regions (think
- * PCI BARs, or ACPI spaces), we can create mappings easily b/c we
+ * PCI BARs, or ACPI spaces), we can create mappings easily because we
 * get the PFN value to match the MFN.
 *
 * For this to work efficiently we have one new page p2m_identity and
@@ -60,7 +60,7 @@
 * There is also a digram of the P2M at the end that can help.
 * Imagine your E820 looking as so:
 *
- *                    1GB                                           2GB
+ *                    1GB                                           2GB    4GB
 * /-------------------+---------\/----\         /----------\    /---+-----\
 * | System RAM        | Sys RAM ||ACPI|         | reserved |    | Sys RAM |
 * \-------------------+---------/\----/         \----------/    \---+-----/
@@ -77,9 +77,8 @@
 * of the PFN and the end PFN (263424 and 512256 respectively). The first step
 * is to reserve_brk a top leaf page if the p2m[1] is missing. The top leaf page
 * covers 512^2 of page estate (1GB) and in case the start or end PFN is not
- * aligned on 512^2*PAGE_SIZE (1GB) we loop on aligned 1GB PFNs from start pfn
+ * aligned on 512^2*PAGE_SIZE (1GB) we reserve_brk new middle and leaf pages as
- * to end pfn.  We reserve_brk top leaf pages if they are missing (means they
+ * required to split any existing p2m_mid_missing middle pages.
- * point to p2m_mid_missing).
 *
 * With the E820 example above, 263424 is not 1GB aligned so we allocate a
 * reserve_brk page which will cover the PFNs estate from 0x40000 to 0x80000.
@@ -88,7 +87,7 @@
 * Next stage is to determine if we need to do a more granular boundary check
 * on the 4MB (or 2MB depending on architecture) off the start and end pfn's.
 * We check if the start pfn and end pfn violate that boundary check, and if
- * so reserve_brk a middle (p2m[x][y]) leaf page. This way we have a much finer
+ * so reserve_brk a (p2m[x][y]) leaf page. This way we have a much finer
 * granularity of setting which PFNs are missing and which ones are identity.
 * In our example 263424 and 512256 both fail the check so we reserve_brk two
 * pages. Populate them with INVALID_P2M_ENTRY (so they both have "missing"
@@ -102,9 +101,10 @@
 *
 * The next step is to walk from the start pfn to the end pfn setting
 * the IDENTITY_FRAME_BIT on each PFN. This is done in set_phys_range_identity.
- * If we find that the middle leaf is pointing to p2m_missing we can swap it
+ * If we find that the middle entry is pointing to p2m_missing we can swap it
- * over to p2m_identity - this way covering 4MB (or 2MB) PFN space.  At this
+ * over to p2m_identity - this way covering 4MB (or 2MB) PFN space (and
- * point we do not need to worry about boundary aligment (so no need to
+ * similarly swapping p2m_mid_missing for p2m_mid_identity for larger regions).
+ * At this point we do not need to worry about boundary aligment (so no need to
 * reserve_brk a middle page, figure out which PFNs are "missing" and which
 * ones are identity), as that has been done earlier.  If we find that the
 * middle leaf is not occupied by p2m_identity or p2m_missing, we dereference
@@ -118,6 +118,9 @@
 * considered missing). In our case, p2m[1][2][0->255] and p2m[1][488][257->511]
 * contain the INVALID_P2M_ENTRY value and are considered "missing."
 *
+ * Finally, the region beyond the end of of the E820 (4 GB in this example)
+ * is set to be identity (in case there are MMIO regions placed here).
+ *
 * This is what the p2m ends up looking (for the E820 above) with this
 * fabulous drawing:
 *
@@ -129,21 +132,27 @@
 *  |-----|    \                      | [p2m_identity]+\\    | ....            |
 *  |  2  |--\  \-------------------->|  ...          | \\   \----------------/
 *  |-----|   \                       \---------------/  \\
- *  |  3  |\   \                                          \\  p2m_identity
+ *  |  3  |-\  \                                          \\  p2m_identity [1]
- *  |-----| \   \-------------------->/---------------\   /-----------------\
+ *  |-----|  \  \-------------------->/---------------\   /-----------------\
- *  | ..  +->+                        | [p2m_identity]+-->| ~0, ~0, ~0, ... |
+ *  | ..  |\  |                       | [p2m_identity]+-->| ~0, ~0, ~0, ... |
- *  \-----/ /                         | [p2m_identity]+-->| ..., ~0         |
+ *  \-----/ | |                       | [p2m_identity]+-->| ..., ~0         |
- *         / /---------------\        | ....          |   \-----------------/
+ *          | |                       | ....          |   \-----------------/
- *        /  | IDENTITY[@0]  |      /-+-[x], ~0, ~0.. |
+ *          | |                       +-[x], ~0, ~0.. +\
- *       /   | IDENTITY[@256]|<----/  \---------------/
+ *          | |                       \---------------/ \
- *      /    | ~0, ~0, ....  |
+ *          | |                                          \-> /---------------\
- *     |     \---------------/
+ *          | V  p2m_mid_missing       p2m_missing           | IDENTITY[@0]  |
- *     |
+ *          | /-----------------\     /------------\         | IDENTITY[@256]|
- *   p2m_mid_missing           p2m_missing
+ *          | | [p2m_missing]   +---->| ~0, ~0, ...|         | ~0, ~0, ....  |
- * /-----------------\     /------------\
+ *          | | [p2m_missing]   +---->| ..., ~0    |         \---------------/
- * | [p2m_missing]   +---->| ~0, ~0, ~0 |
+ *          | | ...             |     \------------/
- * | [p2m_missing]   +---->| ..., ~0    |
+ *          | \-----------------/
- * \-----------------/     \------------/
+ *          |
+ *          |     p2m_mid_identity
+ *          |   /-----------------\
+ *          \-->| [p2m_identity]  +---->[1]
+ *              | [p2m_identity]  +---->[1]
+ *              | ...             |
+ *              \-----------------/
 *
 * where ~0 is INVALID_P2M_ENTRY. IDENTITY is (PFN | IDENTITY_BIT)
 */
@@ -187,13 +196,15 @@ static RESERVE_BRK_ARRAY(unsigned long, p2m_top_mfn, P2M_TOP_PER_PAGE);
 static RESERVE_BRK_ARRAY(unsigned long *, p2m_top_mfn_p, P2M_TOP_PER_PAGE);
 static RESERVE_BRK_ARRAY(unsigned long, p2m_identity, P2M_PER_PAGE);
+static RESERVE_BRK_ARRAY(unsigned long *, p2m_mid_identity, P2M_MID_PER_PAGE);
+static RESERVE_BRK_ARRAY(unsigned long, p2m_mid_identity_mfn, P2M_MID_PER_PAGE);
 RESERVE_BRK(p2m_mid, PAGE_SIZE * (MAX_DOMAIN_PAGES / (P2M_PER_PAGE * P2M_MID_PER_PAGE)));
 RESERVE_BRK(p2m_mid_mfn, PAGE_SIZE * (MAX_DOMAIN_PAGES / (P2M_PER_PAGE * P2M_MID_PER_PAGE)));
 /* We might hit two boundary violations at the start and end, at max each
 * boundary violation will require three middle nodes. */
-RESERVE_BRK(p2m_mid_identity, PAGE_SIZE * 2 * 3);
+RESERVE_BRK(p2m_mid_extra, PAGE_SIZE * 2 * 3);
 /* When we populate back during bootup, the amount of pages can vary. The
 * max we have is seen is 395979, but that does not mean it can't be more.
@@ -242,20 +253,20 @@ static void p2m_top_mfn_p_init(unsigned long **top)
                top[i] = p2m_mid_missing_mfn;
 }
-static void p2m_mid_init(unsigned long **mid)
+static void p2m_mid_init(unsigned long **mid, unsigned long *leaf)
 {
        unsigned i;
        for (i = 0; i < P2M_MID_PER_PAGE; i++)
-                mid[i] = p2m_missing;
+                mid[i] = leaf;
 }
-static void p2m_mid_mfn_init(unsigned long *mid)
+static void p2m_mid_mfn_init(unsigned long *mid, unsigned long *leaf)
 {
        unsigned i;
        for (i = 0; i < P2M_MID_PER_PAGE; i++)
-                mid[i] = virt_to_mfn(p2m_missing);
+                mid[i] = virt_to_mfn(leaf);
 }
 static void p2m_init(unsigned long *p2m)
@@ -286,7 +297,9 @@ void __ref xen_build_mfn_list_list(void)
        /* Pre-initialize p2m_top_mfn to be completely missing */
        if (p2m_top_mfn == NULL) {
                p2m_mid_missing_mfn = extend_brk(PAGE_SIZE, PAGE_SIZE);
-                p2m_mid_mfn_init(p2m_mid_missing_mfn);
+                p2m_mid_mfn_init(p2m_mid_missing_mfn, p2m_missing);
+                p2m_mid_identity_mfn = extend_brk(PAGE_SIZE, PAGE_SIZE);
+                p2m_mid_mfn_init(p2m_mid_identity_mfn, p2m_identity);
                p2m_top_mfn_p = extend_brk(PAGE_SIZE, PAGE_SIZE);
                p2m_top_mfn_p_init(p2m_top_mfn_p);
@@ -295,7 +308,8 @@ void __ref xen_build_mfn_list_list(void)
                p2m_top_mfn_init(p2m_top_mfn);
        } else {
                /* Reinitialise, mfn's all change after migration */
-                p2m_mid_mfn_init(p2m_mid_missing_mfn);
+                p2m_mid_mfn_init(p2m_mid_missing_mfn, p2m_missing);
+                p2m_mid_mfn_init(p2m_mid_identity_mfn, p2m_identity);
        }
        for (pfn = 0; pfn < xen_max_p2m_pfn; pfn += P2M_PER_PAGE) {
@@ -327,7 +341,7 @@ void __ref xen_build_mfn_list_list(void)
                         * it too late.
                         */
                        mid_mfn_p = extend_brk(PAGE_SIZE, PAGE_SIZE);
-                        p2m_mid_mfn_init(mid_mfn_p);
+                        p2m_mid_mfn_init(mid_mfn_p, p2m_missing);
                        p2m_top_mfn_p[topidx] = mid_mfn_p;
                }
@@ -365,16 +379,17 @@ void __init xen_build_dynamic_phys_to_machine(void)
        p2m_missing = extend_brk(PAGE_SIZE, PAGE_SIZE);
        p2m_init(p2m_missing);
+        p2m_identity = extend_brk(PAGE_SIZE, PAGE_SIZE);
+        p2m_init(p2m_identity);
        p2m_mid_missing = extend_brk(PAGE_SIZE, PAGE_SIZE);
-        p2m_mid_init(p2m_mid_missing);
+        p2m_mid_init(p2m_mid_missing, p2m_missing);
+        p2m_mid_identity = extend_brk(PAGE_SIZE, PAGE_SIZE);
+        p2m_mid_init(p2m_mid_identity, p2m_identity);
        p2m_top = extend_brk(PAGE_SIZE, PAGE_SIZE);
        p2m_top_init(p2m_top);
-        p2m_identity = extend_brk(PAGE_SIZE, PAGE_SIZE);
-        p2m_init(p2m_identity);
        /*
         * The domain builder gives us a pre-constructed p2m array in
         * mfn_list for all the pages initially given to us, so we just
@@ -386,7 +401,7 @@ void __init xen_build_dynamic_phys_to_machine(void)
                if (p2m_top[topidx] == p2m_mid_missing) {
                        unsigned long **mid = extend_brk(PAGE_SIZE, PAGE_SIZE);
-                        p2m_mid_init(mid);
+                        p2m_mid_init(mid, p2m_missing);
                        p2m_top[topidx] = mid;
                }
@@ -492,7 +507,7 @@ unsigned long get_phys_to_machine(unsigned long pfn)
        unsigned topidx, mididx, idx;
        if (unlikely(pfn >= MAX_P2M_PFN))
-                return INVALID_P2M_ENTRY;
+                return IDENTITY_FRAME(pfn);
        topidx = p2m_top_index(pfn);
        mididx = p2m_mid_index(pfn);
@@ -545,7 +560,7 @@ static bool alloc_p2m(unsigned long pfn)
                if (!mid)
                        return false;
-                p2m_mid_init(mid);
+                p2m_mid_init(mid, p2m_missing);
                if (cmpxchg(top_p, p2m_mid_missing, mid) != p2m_mid_missing)
                        free_p2m_page(mid);
@@ -565,7 +580,7 @@ static bool alloc_p2m(unsigned long pfn)
                if (!mid_mfn)
                        return false;
-                p2m_mid_mfn_init(mid_mfn);
+                p2m_mid_mfn_init(mid_mfn, p2m_missing);
                missing_mfn = virt_to_mfn(p2m_mid_missing_mfn);
                mid_mfn_mfn = virt_to_mfn(mid_mfn);
@@ -596,7 +611,7 @@ static bool alloc_p2m(unsigned long pfn)
        return true;
 }
-static bool __init early_alloc_p2m_middle(unsigned long pfn, bool check_boundary)
+static bool __init early_alloc_p2m(unsigned long pfn, bool check_boundary)
 {
        unsigned topidx, mididx, idx;
        unsigned long *p2m;
@@ -638,7 +653,7 @@ static bool __init early_alloc_p2m_middle(unsigned long pfn, bool check_boundary
        return true;
 }
-static bool __init early_alloc_p2m(unsigned long pfn)
+static bool __init early_alloc_p2m_middle(unsigned long pfn)
 {
        unsigned topidx = p2m_top_index(pfn);
        unsigned long *mid_mfn_p;
@@ -649,7 +664,7 @@ static bool __init early_alloc_p2m(unsigned long pfn)
        if (mid == p2m_mid_missing) {
                mid = extend_brk(PAGE_SIZE, PAGE_SIZE);
-                p2m_mid_init(mid);
+                p2m_mid_init(mid, p2m_missing);
                p2m_top[topidx] = mid;
@@ -658,12 +673,12 @@ static bool __init early_alloc_p2m(unsigned long pfn)
        /* And the save/restore P2M tables.. */
        if (mid_mfn_p == p2m_mid_missing_mfn) {
                mid_mfn_p = extend_brk(PAGE_SIZE, PAGE_SIZE);
-                p2m_mid_mfn_init(mid_mfn_p);
+                p2m_mid_mfn_init(mid_mfn_p, p2m_missing);
                p2m_top_mfn_p[topidx] = mid_mfn_p;
                p2m_top_mfn[topidx] = virt_to_mfn(mid_mfn_p);
                /* Note: we don't set mid_mfn_p[midix] here,
-                 * look in early_alloc_p2m_middle */
+                 * look in early_alloc_p2m() */
        }
        return true;
 }
@@ -739,7 +754,7 @@ found:
        /* This shouldn't happen */
        if (WARN_ON(p2m_top[topidx] == p2m_mid_missing))
-                early_alloc_p2m(set_pfn);
+                early_alloc_p2m_middle(set_pfn);
        if (WARN_ON(p2m_top[topidx][mididx] != p2m_missing))
                return false;
@@ -754,13 +769,13 @@ found:
 bool __init early_set_phys_to_machine(unsigned long pfn, unsigned long mfn)
 {
        if (unlikely(!__set_phys_to_machine(pfn, mfn)))  {
-                if (!early_alloc_p2m(pfn))
+                if (!early_alloc_p2m_middle(pfn))
                        return false;
                if (early_can_reuse_p2m_middle(pfn, mfn))
                        return __set_phys_to_machine(pfn, mfn);
-                if (!early_alloc_p2m_middle(pfn, false /* boundary crossover OK!*/))
+                if (!early_alloc_p2m(pfn, false /* boundary crossover OK!*/))
                        return false;
                if (!__set_phys_to_machine(pfn, mfn))
@@ -769,12 +784,30 @@ bool __init early_set_phys_to_machine(unsigned long pfn, unsigned long mfn)
        return true;
 }
+static void __init early_split_p2m(unsigned long pfn)
+{
+        unsigned long mididx, idx;
+        mididx = p2m_mid_index(pfn);
+        idx = p2m_index(pfn);
+        /*
+         * Allocate new middle and leaf pages if this pfn lies in the
+         * middle of one.
+         */
+        if (mididx || idx)
+                early_alloc_p2m_middle(pfn);
+        if (idx)
+                early_alloc_p2m(pfn, false);
+}
 unsigned long __init set_phys_range_identity(unsigned long pfn_s,
                                      unsigned long pfn_e)
 {
        unsigned long pfn;
-        if (unlikely(pfn_s >= MAX_P2M_PFN || pfn_e >= MAX_P2M_PFN))
+        if (unlikely(pfn_s >= MAX_P2M_PFN))
                return 0;
        if (unlikely(xen_feature(XENFEAT_auto_translated_physmap)))
@@ -783,19 +816,30 @@ unsigned long __init set_phys_range_identity(unsigned long pfn_s,
        if (pfn_s > pfn_e)
                return 0;
-        for (pfn = (pfn_s & ~(P2M_MID_PER_PAGE * P2M_PER_PAGE - 1));
+        if (pfn_e > MAX_P2M_PFN)
-                pfn < ALIGN(pfn_e, (P2M_MID_PER_PAGE * P2M_PER_PAGE));
+                pfn_e = MAX_P2M_PFN;
-                pfn += P2M_MID_PER_PAGE * P2M_PER_PAGE)
-        {
-                WARN_ON(!early_alloc_p2m(pfn));
-        }
-        early_alloc_p2m_middle(pfn_s, true);
+        early_split_p2m(pfn_s);
-        early_alloc_p2m_middle(pfn_e, true);
+        early_split_p2m(pfn_e);
+        for (pfn = pfn_s; pfn < pfn_e;) {
+                unsigned topidx = p2m_top_index(pfn);
+                unsigned mididx = p2m_mid_index(pfn);
-        for (pfn = pfn_s; pfn < pfn_e; pfn++)
                if (!__set_phys_to_machine(pfn, IDENTITY_FRAME(pfn)))
                        break;
+                pfn++;
+                /*
+                 * If the PFN was set to a middle or leaf identity
+                 * page the remainder must also be identity, so skip
+                 * ahead to the next middle or leaf entry.
+                 */
+                if (p2m_top[topidx] == p2m_mid_identity)
+                        pfn = ALIGN(pfn, P2M_MID_PER_PAGE * P2M_PER_PAGE);
+                else if (p2m_top[topidx][mididx] == p2m_identity)
+                        pfn = ALIGN(pfn, P2M_PER_PAGE);
+        }
        if (!WARN((pfn - pfn_s) != (pfn_e - pfn_s),
                "Identity mapping failed. We are %ld short of 1-1 mappings!\n",
@@ -825,8 +869,22 @@ bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn)
        /* For sparse holes were the p2m leaf has real PFN along with
         * PCI holes, stick in the PFN as the MFN value.
+         *
+         * set_phys_range_identity() will have allocated new middle
+         * and leaf pages as required so an existing p2m_mid_missing
+         * or p2m_missing mean that whole range will be identity so
+         * these can be switched to p2m_mid_identity or p2m_identity.
         */
        if (mfn != INVALID_P2M_ENTRY && (mfn & IDENTITY_FRAME_BIT)) {
+                if (p2m_top[topidx] == p2m_mid_identity)
+                        return true;
+                if (p2m_top[topidx] == p2m_mid_missing) {
+                        WARN_ON(cmpxchg(&p2m_top[topidx], p2m_mid_missing,
+                                        p2m_mid_identity) != p2m_mid_missing);
+                        return true;
+                }
                if (p2m_top[topidx][mididx] == p2m_identity)
                        return true;
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
index 0982233b9b84..210426a26cc0 100644
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@ -89,10 +89,10 @@ static void __init xen_add_extra_mem(u64 start, u64 size)
        for (pfn = PFN_DOWN(start); pfn < xen_max_p2m_pfn; pfn++) {
                unsigned long mfn = pfn_to_mfn(pfn);
-                if (WARN(mfn == pfn, "Trying to over-write 1-1 mapping (pfn: %lx)\n", pfn))
+                if (WARN_ONCE(mfn == pfn, "Trying to over-write 1-1 mapping (pfn: %lx)\n", pfn))
                        continue;
-                WARN(mfn != INVALID_P2M_ENTRY, "Trying to remove %lx which has %lx mfn!\n",
+                WARN_ONCE(mfn != INVALID_P2M_ENTRY, "Trying to remove %lx which has %lx mfn!\n",
-                        pfn, mfn);
+                          pfn, mfn);
                __set_phys_to_machine(pfn, INVALID_P2M_ENTRY);
        }
@@ -469,6 +469,15 @@ char * __init xen_memory_setup(void)
        }
        /*
+         * Set the rest as identity mapped, in case PCI BARs are
+         * located here.
+         *
+         * PFNs above MAX_P2M_PFN are considered identity mapped as
+         * well.
+         */
+        set_phys_range_identity(map[i-1].addr / PAGE_SIZE, ~0ul);
+        /*
         * In domU, the ISA region is normal, usable memory, but we
         * reserve ISA memory anyway because too many things poke
         * about in there.
diff --git a/arch/x86/xen/suspend.c b/arch/x86/xen/suspend.c
index 45329c8c226e..c4df9dbd63b7 100644
--- a/arch/x86/xen/suspend.c
+++ b/arch/x86/xen/suspend.c
@@ -12,8 +12,10 @@
 #include "xen-ops.h"
 #include "mmu.h"
-void xen_arch_pre_suspend(void)
+static void xen_pv_pre_suspend(void)
 {
+        xen_mm_pin_all();
        xen_start_info->store_mfn = mfn_to_pfn(xen_start_info->store_mfn);
        xen_start_info->console.domU.mfn =
                mfn_to_pfn(xen_start_info->console.domU.mfn);
@@ -26,7 +28,7 @@ void xen_arch_pre_suspend(void)
                BUG();
 }
-void xen_arch_hvm_post_suspend(int suspend_cancelled)
+static void xen_hvm_post_suspend(int suspend_cancelled)
 {
 #ifdef CONFIG_XEN_PVHVM
        int cpu;
@@ -41,7 +43,7 @@ void xen_arch_hvm_post_suspend(int suspend_cancelled)
 #endif
 }
-void xen_arch_post_suspend(int suspend_cancelled)
+static void xen_pv_post_suspend(int suspend_cancelled)
 {
        xen_build_mfn_list_list();
@@ -60,6 +62,21 @@ void xen_arch_post_suspend(int suspend_cancelled)
                xen_vcpu_restore();
        }
+        xen_mm_unpin_all();
+}
+void xen_arch_pre_suspend(void)
+{
+    if (xen_pv_domain())
+        xen_pv_pre_suspend();
+}
+void xen_arch_post_suspend(int cancelled)
+{
+    if (xen_pv_domain())
+        xen_pv_post_suspend(cancelled);
+    else
+        xen_hvm_post_suspend(cancelled);
 }
 static void xen_vcpu_notify_restore(void *data)
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index 1cb6f4c37300..c834d4b231f0 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -31,6 +31,8 @@ void xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn);
 void xen_reserve_top(void);
 extern unsigned long xen_max_p2m_pfn;
+void xen_mm_pin_all(void);
+void xen_mm_unpin_all(void);
 void xen_set_pat(u64);
 char * __init xen_memory_setup(void);
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index 02d6d29a63c1..3a617af60d46 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -14,6 +14,7 @@ config XTENSA
        select GENERIC_PCI_IOMAP
        select ARCH_WANT_IPC_PARSE_VERSION
        select ARCH_WANT_OPTIONAL_GPIOLIB
+        select BUILDTIME_EXTABLE_SORT
        select CLONE_BACKWARDS
        select IRQ_DOMAIN
        select HAVE_OPROFILE
@@ -189,6 +190,24 @@ config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
          If in doubt, say Y.
+config HIGHMEM
+        bool "High Memory Support"
+        help
+          Linux can use the full amount of RAM in the system by
+          default. However, the default MMUv2 setup only maps the
+          lowermost 128 MB of memory linearly to the areas starting
+          at 0xd0000000 (cached) and 0xd8000000 (uncached).
+          When there are more than 128 MB memory in the system not
+          all of it can be "permanently mapped" by the kernel.
+          The physical memory that's not permanently mapped is called
+          "high memory".
+          If you are compiling a kernel which will never run on a
+          machine with more than 128 MB total physical RAM, answer
+          N here.
+          If unsure, say Y.
 endmenu
 config XTENSA_CALIBRATE_CCOUNT
@@ -224,7 +243,6 @@ choice
 config XTENSA_PLATFORM_ISS
        bool "ISS"
-        depends on TTY
        select XTENSA_CALIBRATE_CCOUNT
        select SERIAL_CONSOLE
        help
diff --git a/arch/xtensa/boot/dts/kc705.dts b/arch/xtensa/boot/dts/kc705.dts
new file mode 100644
index 000000000000..742a347be67a
--- /dev/null
+++ b/arch/xtensa/boot/dts/kc705.dts
@@ -0,0 +1,11 @@
+/dts-v1/;
+/include/ "xtfpga.dtsi"
+/include/ "xtfpga-flash-128m.dtsi"
+/ {
+        compatible = "cdns,xtensa-kc705";
+        memory@0 {
+                device_type = "memory";
+                reg = <0x00000000 0x08000000>;
+        };
+};
diff --git a/arch/xtensa/boot/dts/xtfpga-flash-128m.dtsi b/arch/xtensa/boot/dts/xtfpga-flash-128m.dtsi
new file mode 100644
index 000000000000..d3a88e029873
--- /dev/null
+++ b/arch/xtensa/boot/dts/xtfpga-flash-128m.dtsi
@@ -0,0 +1,28 @@
+/ {
+        soc {
+                flash: flash@00000000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "cfi-flash";
+                        reg = <0x00000000 0x08000000>;
+                        bank-width = <2>;
+                        device-width = <2>;
+                        partition@0x0 {
+                                label = "data";
+                                reg = <0x00000000 0x06000000>;
+                        };
+                        partition@0x6000000 {
+                                label = "boot loader area";
+                                reg = <0x06000000 0x00800000>;
+                        };
+                        partition@0x6800000 {
+                                label = "kernel image";
+                                reg = <0x06800000 0x017e0000>;
+                        };
+                        partition@0x7fe0000 {
+                                label = "boot environment";
+                                reg = <0x07fe0000 0x00020000>;
+                        };
+                };
+        };
+};
diff --git a/arch/xtensa/boot/dts/xtfpga-flash-16m.dtsi b/arch/xtensa/boot/dts/xtfpga-flash-16m.dtsi
index e5703c7beeb6..1d97203c18e7 100644
--- a/arch/xtensa/boot/dts/xtfpga-flash-16m.dtsi
+++ b/arch/xtensa/boot/dts/xtfpga-flash-16m.dtsi
@@ -1,26 +1,28 @@
 / {
-        flash: flash@f8000000 {
+        soc {
-                #address-cells = <1>;
+                flash: flash@08000000 {
-                #size-cells = <1>;
+                        #address-cells = <1>;
-                compatible = "cfi-flash";
+                        #size-cells = <1>;
-                reg = <0xf8000000 0x01000000>;
+                        compatible = "cfi-flash";
-                bank-width = <2>;
+                        reg = <0x08000000 0x01000000>;
-                device-width = <2>;
+                        bank-width = <2>;
-                partition@0x0 {
+                        device-width = <2>;
-                        label = "boot loader area";
+                        partition@0x0 {
-                        reg = <0x00000000 0x00400000>;
+                                label = "boot loader area";
+                                reg = <0x00000000 0x00400000>;
+                        };
+                        partition@0x400000 {
+                                label = "kernel image";
+                                reg = <0x00400000 0x00600000>;
+                        };
+                        partition@0xa00000 {
+                                label = "data";
+                                reg = <0x00a00000 0x005e0000>;
+                        };
+                        partition@0xfe0000 {
+                                label = "boot environment";
+                                reg = <0x00fe0000 0x00020000>;
+                        };
                };
-                partition@0x400000 {
+        };
-                        label = "kernel image";
-                        reg = <0x00400000 0x00600000>;
-                };
-                partition@0xa00000 {
-                        label = "data";
-                        reg = <0x00a00000 0x005e0000>;
-                };
-                partition@0xfe0000 {
-                        label = "boot environment";
-                        reg = <0x00fe0000 0x00020000>;
-                };
-        };
 };
diff --git a/arch/xtensa/boot/dts/xtfpga-flash-4m.dtsi b/arch/xtensa/boot/dts/xtfpga-flash-4m.dtsi
index 6f9c10d6b689..d1c621ca8be1 100644
--- a/arch/xtensa/boot/dts/xtfpga-flash-4m.dtsi
+++ b/arch/xtensa/boot/dts/xtfpga-flash-4m.dtsi
@@ -1,18 +1,20 @@
 / {
-        flash: flash@f8000000 {
+        soc {
-                #address-cells = <1>;
+                flash: flash@08000000 {
-                #size-cells = <1>;
+                        #address-cells = <1>;
-                compatible = "cfi-flash";
+                        #size-cells = <1>;
-                reg = <0xf8000000 0x00400000>;
+                        compatible = "cfi-flash";
-                bank-width = <2>;
+                        reg = <0x08000000 0x00400000>;
-                device-width = <2>;
+                        bank-width = <2>;
-                partition@0x0 {
+                        device-width = <2>;
-                        label = "boot loader area";
+                        partition@0x0 {
-                        reg = <0x00000000 0x003f0000>;
+                                label = "boot loader area";
+                                reg = <0x00000000 0x003f0000>;
+                        };
+                        partition@0x3f0000 {
+                                label = "boot environment";
+                                reg = <0x003f0000 0x00010000>;
+                        };
                };
-                partition@0x3f0000 {
+        };
-                        label = "boot environment";
-                        reg = <0x003f0000 0x00010000>;
-                };
-        };
 };
diff --git a/arch/xtensa/boot/dts/xtfpga.dtsi b/arch/xtensa/boot/dts/xtfpga.dtsi
index e7370b11348e..dec9178840f6 100644
--- a/arch/xtensa/boot/dts/xtfpga.dtsi
+++ b/arch/xtensa/boot/dts/xtfpga.dtsi
@@ -42,21 +42,28 @@
                };
        };
-        serial0: serial@fd050020 {
+        soc {
-                device_type = "serial";
+                #address-cells = <1>;
-                compatible = "ns16550a";
+                #size-cells = <1>;
-                no-loopback-test;
+                compatible = "simple-bus";
-                reg = <0xfd050020 0x20>;
+                ranges = <0x00000000 0xf0000000 0x10000000>;
-                reg-shift = <2>;
-                interrupts = <0 1>; /* external irq 0 */
-                clocks = <&osc>;
-        };
-        enet0: ethoc@fd030000 {
+                serial0: serial@0d050020 {
-                compatible = "opencores,ethoc";
+                        device_type = "serial";
-                reg = <0xfd030000 0x4000 0xfd800000 0x4000>;
+                        compatible = "ns16550a";
-                interrupts = <1 1>; /* external irq 1 */
+                        no-loopback-test;
-                local-mac-address = [00 50 c2 13 6f 00];
+                        reg = <0x0d050020 0x20>;
-                clocks = <&osc>;
+                        reg-shift = <2>;
+                        interrupts = <0 1>; /* external irq 0 */
+                        clocks = <&osc>;
+                };
+                enet0: ethoc@0d030000 {
+                        compatible = "opencores,ethoc";
+                        reg = <0x0d030000 0x4000 0x0d800000 0x4000>;
+                        interrupts = <1 1>; /* external irq 1 */
+                        local-mac-address = [00 50 c2 13 6f 00];
+                        clocks = <&osc>;
+                };
        };
 };
diff --git a/arch/xtensa/include/asm/bootparam.h b/arch/xtensa/include/asm/bootparam.h
index 23392c5630ce..892aab399ac8 100644
--- a/arch/xtensa/include/asm/bootparam.h
+++ b/arch/xtensa/include/asm/bootparam.h
@@ -37,23 +37,14 @@ typedef struct bp_tag {
        unsigned long data[0];  /* data */
 } bp_tag_t;
-typedef struct meminfo {
+struct bp_meminfo {
        unsigned long type;
        unsigned long start;
        unsigned long end;
-} meminfo_t;
+};
-#define SYSMEM_BANKS_MAX 5
 #define MEMORY_TYPE_CONVENTIONAL        0x1000
 #define MEMORY_TYPE_NONE                0x2000
-typedef struct sysmem_info {
-        int nr_banks;
-        meminfo_t bank[SYSMEM_BANKS_MAX];
-} sysmem_info_t;
-extern sysmem_info_t sysmem;
 #endif
 #endif
diff --git a/arch/xtensa/include/asm/fixmap.h b/arch/xtensa/include/asm/fixmap.h
new file mode 100644
index 000000000000..9f6c33d0428a
--- /dev/null
+++ b/arch/xtensa/include/asm/fixmap.h
@@ -0,0 +1,58 @@
+/*
+ * fixmap.h: compile-time virtual memory allocation
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1998 Ingo Molnar
+ *
+ * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999
+ */
+#ifndef _ASM_FIXMAP_H
+#define _ASM_FIXMAP_H
+#include <asm/pgtable.h>
+#ifdef CONFIG_HIGHMEM
+#include <linux/threads.h>
+#include <asm/kmap_types.h>
+#endif
+/*
+ * Here we define all the compile-time 'special' virtual
+ * addresses. The point is to have a constant address at
+ * compile time, but to set the physical address only
+ * in the boot process. We allocate these special  addresses
+ * from the end of the consistent memory region backwards.
+ * Also this lets us do fail-safe vmalloc(), we
+ * can guarantee that these special addresses and
+ * vmalloc()-ed addresses never overlap.
+ *
+ * these 'compile-time allocated' memory buffers are
+ * fixed-size 4k pages. (or larger if used with an increment
+ * higher than 1) use fixmap_set(idx,phys) to associate
+ * physical memory with fixmap indices.
+ */
+enum fixed_addresses {
+#ifdef CONFIG_HIGHMEM
+        /* reserved pte's for temporary kernel mappings */
+        FIX_KMAP_BEGIN,
+        FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_TYPE_NR * NR_CPUS) - 1,
+#endif
+        __end_of_fixed_addresses
+};
+#define FIXADDR_TOP     (VMALLOC_START - PAGE_SIZE)
+#define FIXADDR_SIZE    (__end_of_fixed_addresses << PAGE_SHIFT)
+#define FIXADDR_START   ((FIXADDR_TOP - FIXADDR_SIZE) & PMD_MASK)
+#include <asm-generic/fixmap.h>
+#define kmap_get_fixmap_pte(vaddr) \
+        pte_offset_kernel( \
+                pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), \
+                (vaddr) \
+        )
+#endif
diff --git a/arch/xtensa/include/asm/highmem.h b/arch/xtensa/include/asm/highmem.h
index 80be15124697..2653ef5d55f1 100644
--- a/arch/xtensa/include/asm/highmem.h
+++ b/arch/xtensa/include/asm/highmem.h
@@ -6,11 +6,54 @@
 * this archive for more details.
 *
 * Copyright (C) 2003 - 2005 Tensilica Inc.
+ * Copyright (C) 2014 Cadence Design Systems Inc.
 */
 #ifndef _XTENSA_HIGHMEM_H
 #define _XTENSA_HIGHMEM_H
-extern void flush_cache_kmaps(void);
+#include <asm/cacheflush.h>
+#include <asm/fixmap.h>
+#include <asm/kmap_types.h>
+#include <asm/pgtable.h>
+#define PKMAP_BASE              (FIXADDR_START - PMD_SIZE)
+#define LAST_PKMAP              PTRS_PER_PTE
+#define LAST_PKMAP_MASK         (LAST_PKMAP - 1)
+#define PKMAP_NR(virt)          (((virt) - PKMAP_BASE) >> PAGE_SHIFT)
+#define PKMAP_ADDR(nr)          (PKMAP_BASE + ((nr) << PAGE_SHIFT))
+#define kmap_prot               PAGE_KERNEL
+extern pte_t *pkmap_page_table;
+void *kmap_high(struct page *page);
+void kunmap_high(struct page *page);
+static inline void *kmap(struct page *page)
+{
+        BUG_ON(in_interrupt());
+        if (!PageHighMem(page))
+                return page_address(page);
+        return kmap_high(page);
+}
+static inline void kunmap(struct page *page)
+{
+        BUG_ON(in_interrupt());
+        if (!PageHighMem(page))
+                return;
+        kunmap_high(page);
+}
+static inline void flush_cache_kmaps(void)
+{
+        flush_cache_all();
+}
+void *kmap_atomic(struct page *page);
+void __kunmap_atomic(void *kvaddr);
+void kmap_init(void);
 #endif
diff --git a/arch/xtensa/include/asm/pci.h b/arch/xtensa/include/asm/pci.h
index 614be031a79a..5d52dc43dfe7 100644
--- a/arch/xtensa/include/asm/pci.h
+++ b/arch/xtensa/include/asm/pci.h
@@ -22,11 +22,6 @@
 extern struct pci_controller* pcibios_alloc_controller(void);
-static inline void pcibios_penalize_isa_irq(int irq)
-{
-        /* We don't do dynamic PCI IRQ allocation */
-}
 /* Assume some values. (We should revise them, if necessary) */
 #define PCIBIOS_MIN_IO          0x2000
diff --git a/arch/xtensa/include/asm/pgtable.h b/arch/xtensa/include/asm/pgtable.h
index 216446295ada..4b0ca35a93b1 100644
--- a/arch/xtensa/include/asm/pgtable.h
+++ b/arch/xtensa/include/asm/pgtable.h
@@ -310,6 +310,10 @@ set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pteval)
        update_pte(ptep, pteval);
 }
+static inline void set_pte(pte_t *ptep, pte_t pteval)
+{
+        update_pte(ptep, pteval);
+}
 static inline void
 set_pmd(pmd_t *pmdp, pmd_t pmdval)
diff --git a/arch/xtensa/include/asm/sysmem.h b/arch/xtensa/include/asm/sysmem.h
new file mode 100644
index 000000000000..c015c5c8e3f7
--- /dev/null
+++ b/arch/xtensa/include/asm/sysmem.h
@@ -0,0 +1,38 @@
+/*
+ * sysmem-related prototypes.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2014 Cadence Design Systems Inc.
+ */
+#ifndef _XTENSA_SYSMEM_H
+#define _XTENSA_SYSMEM_H
+#define SYSMEM_BANKS_MAX 31
+struct meminfo {
+        unsigned long start;
+        unsigned long end;
+};
+/*
+ * Bank array is sorted by .start.
+ * Banks don't overlap and there's at least one page gap
+ * between adjacent bank entries.
+ */
+struct sysmem_info {
+        int nr_banks;
+        struct meminfo bank[SYSMEM_BANKS_MAX];
+};
+extern struct sysmem_info sysmem;
+int add_sysmem_bank(unsigned long start, unsigned long end);
+int mem_reserve(unsigned long, unsigned long, int);
+void bootmem_init(void);
+void zones_init(void);
+#endif /* _XTENSA_SYSMEM_H */
diff --git a/arch/xtensa/include/asm/tlbflush.h b/arch/xtensa/include/asm/tlbflush.h
index fc34274ce41b..06875feb27c2 100644
--- a/arch/xtensa/include/asm/tlbflush.h
+++ b/arch/xtensa/include/asm/tlbflush.h
@@ -36,6 +36,7 @@ void local_flush_tlb_page(struct vm_area_struct *vma,
                unsigned long page);
 void local_flush_tlb_range(struct vm_area_struct *vma,
                unsigned long start, unsigned long end);
+void local_flush_tlb_kernel_range(unsigned long start, unsigned long end);
 #ifdef CONFIG_SMP
@@ -44,12 +45,7 @@ void flush_tlb_mm(struct mm_struct *);
 void flush_tlb_page(struct vm_area_struct *, unsigned long);
 void flush_tlb_range(struct vm_area_struct *, unsigned long,
                unsigned long);
+void flush_tlb_kernel_range(unsigned long start, unsigned long end);
-static inline void flush_tlb_kernel_range(unsigned long start,
-                unsigned long end)
-{
-        flush_tlb_all();
-}
 #else /* !CONFIG_SMP */
@@ -58,7 +54,8 @@ static inline void flush_tlb_kernel_range(unsigned long start,
 #define flush_tlb_page(vma, page)          local_flush_tlb_page(vma, page)
 #define flush_tlb_range(vma, vmaddr, end)  local_flush_tlb_range(vma, vmaddr, \
                                                                 end)
-#define flush_tlb_kernel_range(start, end) local_flush_tlb_all()
+#define flush_tlb_kernel_range(start, end) local_flush_tlb_kernel_range(start, \
+                                                                        end)
 #endif /* CONFIG_SMP */
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c
index 84fe931bb60e..9757bb74e532 100644
--- a/arch/xtensa/kernel/setup.c
+++ b/arch/xtensa/kernel/setup.c
@@ -50,6 +50,7 @@
 #include <asm/param.h>
 #include <asm/traps.h>
 #include <asm/smp.h>
+#include <asm/sysmem.h>
 #include <platform/hardware.h>
@@ -88,12 +89,6 @@ static char __initdata command_line[COMMAND_LINE_SIZE];
 static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
 #endif
-sysmem_info_t __initdata sysmem;
-extern int mem_reserve(unsigned long, unsigned long, int);
-extern void bootmem_init(void);
-extern void zones_init(void);
 /*
 * Boot parameter parsing.
 *
@@ -113,31 +108,14 @@ typedef struct tagtable {
 /* parse current tag */
-static int __init add_sysmem_bank(unsigned long type, unsigned long start,
-                unsigned long end)
-{
-        if (sysmem.nr_banks >= SYSMEM_BANKS_MAX) {
-                printk(KERN_WARNING
-                                "Ignoring memory bank 0x%08lx size %ldKB\n",
-                                start, end - start);
-                return -EINVAL;
-        }
-        sysmem.bank[sysmem.nr_banks].type  = type;
-        sysmem.bank[sysmem.nr_banks].start = PAGE_ALIGN(start);
-        sysmem.bank[sysmem.nr_banks].end   = end & PAGE_MASK;
-        sysmem.nr_banks++;
-        return 0;
-}
 static int __init parse_tag_mem(const bp_tag_t *tag)
 {
-        meminfo_t *mi = (meminfo_t *)(tag->data);
+        struct bp_meminfo *mi = (struct bp_meminfo *)(tag->data);
        if (mi->type != MEMORY_TYPE_CONVENTIONAL)
                return -1;
-        return add_sysmem_bank(mi->type, mi->start, mi->end);
+        return add_sysmem_bank(mi->start, mi->end);
 }
 __tagtable(BP_TAG_MEMORY, parse_tag_mem);
@@ -146,8 +124,8 @@ __tagtable(BP_TAG_MEMORY, parse_tag_mem);
 static int __init parse_tag_initrd(const bp_tag_t* tag)
 {
-        meminfo_t* mi;
+        struct bp_meminfo *mi = (struct bp_meminfo *)(tag->data);
-        mi = (meminfo_t*)(tag->data);
        initrd_start = (unsigned long)__va(mi->start);
        initrd_end = (unsigned long)__va(mi->end);
@@ -255,7 +233,7 @@ void __init early_init_dt_add_memory_arch(u64 base, u64 size)
                return;
        size &= PAGE_MASK;
-        add_sysmem_bank(MEMORY_TYPE_CONVENTIONAL, base, base + size);
+        add_sysmem_bank(base, base + size);
 }
 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
@@ -292,8 +270,6 @@ device_initcall(xtensa_device_probe);
 void __init init_arch(bp_tag_t *bp_start)
 {
-        sysmem.nr_banks = 0;
        /* Parse boot parameters */
        if (bp_start)
@@ -304,10 +280,9 @@ void __init init_arch(bp_tag_t *bp_start)
 #endif
        if (sysmem.nr_banks == 0) {
-                sysmem.nr_banks = 1;
+                add_sysmem_bank(PLATFORM_DEFAULT_MEM_START,
-                sysmem.bank[0].start = PLATFORM_DEFAULT_MEM_START;
+                                PLATFORM_DEFAULT_MEM_START +
-                sysmem.bank[0].end = PLATFORM_DEFAULT_MEM_START
+                                PLATFORM_DEFAULT_MEM_SIZE);
-                                     + PLATFORM_DEFAULT_MEM_SIZE;
        }
 #ifdef CONFIG_CMDLINE_BOOL
@@ -487,7 +462,7 @@ void __init setup_arch(char **cmdline_p)
 #ifdef CONFIG_BLK_DEV_INITRD
        if (initrd_start < initrd_end) {
                initrd_is_mapped = mem_reserve(__pa(initrd_start),
-                                               __pa(initrd_end), 0);
+                                               __pa(initrd_end), 0) == 0;
                initrd_below_start_ok = 1;
        } else {
                initrd_start = 0;
@@ -532,6 +507,7 @@ void __init setup_arch(char **cmdline_p)
                    __pa(&_Level6InterruptVector_text_end), 0);
 #endif
+        parse_early_param();
        bootmem_init();
        unflatten_and_copy_device_tree();
diff --git a/arch/xtensa/kernel/smp.c b/arch/xtensa/kernel/smp.c
index aa8bd8717927..40b5a3771fb0 100644
--- a/arch/xtensa/kernel/smp.c
+++ b/arch/xtensa/kernel/smp.c
@@ -496,6 +496,21 @@ void flush_tlb_range(struct vm_area_struct *vma,
        on_each_cpu(ipi_flush_tlb_range, &fd, 1);
 }
+static void ipi_flush_tlb_kernel_range(void *arg)
+{
+        struct flush_data *fd = arg;
+        local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
+}
+void flush_tlb_kernel_range(unsigned long start, unsigned long end)
+{
+        struct flush_data fd = {
+                .addr1 = start,
+                .addr2 = end,
+        };
+        on_each_cpu(ipi_flush_tlb_kernel_range, &fd, 1);
+}
 /* Cache flush functions */
 static void ipi_flush_cache_all(void *arg)
diff --git a/arch/xtensa/kernel/xtensa_ksyms.c b/arch/xtensa/kernel/xtensa_ksyms.c
index 80b33ed51f31..4d2872fd9bb5 100644
--- a/arch/xtensa/kernel/xtensa_ksyms.c
+++ b/arch/xtensa/kernel/xtensa_ksyms.c
@@ -20,6 +20,7 @@
 #include <linux/in6.h>
 #include <asm/uaccess.h>
+#include <asm/cacheflush.h>
 #include <asm/checksum.h>
 #include <asm/dma.h>
 #include <asm/io.h>
@@ -105,6 +106,7 @@ EXPORT_SYMBOL(csum_partial_copy_generic);
 * Architecture-specific symbols
 */
 EXPORT_SYMBOL(__xtensa_copy_user);
+EXPORT_SYMBOL(__invalidate_icache_range);
 /*
 * Kernel hacking ...
@@ -127,3 +129,8 @@ EXPORT_SYMBOL(common_exception_return);
 #ifdef CONFIG_FUNCTION_TRACER
 EXPORT_SYMBOL(_mcount);
 #endif
+EXPORT_SYMBOL(__invalidate_dcache_range);
+#if XCHAL_DCACHE_IS_WRITEBACK
+EXPORT_SYMBOL(__flush_dcache_range);
+#endif
diff --git a/arch/xtensa/mm/Makefile b/arch/xtensa/mm/Makefile
index f0b646d2f843..f54f78e24d7b 100644
--- a/arch/xtensa/mm/Makefile
+++ b/arch/xtensa/mm/Makefile
@@ -4,3 +4,4 @@
 obj-y                   := init.o cache.o misc.o
 obj-$(CONFIG_MMU)       += fault.o mmu.o tlb.o
+obj-$(CONFIG_HIGHMEM)   += highmem.o
diff --git a/arch/xtensa/mm/cache.c b/arch/xtensa/mm/cache.c
index ba4c47f291b1..63cbb867dadd 100644
--- a/arch/xtensa/mm/cache.c
+++ b/arch/xtensa/mm/cache.c
@@ -59,6 +59,10 @@
 *
 */
+#if (DCACHE_WAY_SIZE > PAGE_SIZE) && defined(CONFIG_HIGHMEM)
+#error "HIGHMEM is not supported on cores with aliasing cache."
+#endif
 #if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
 /*
@@ -179,10 +183,11 @@ update_mmu_cache(struct vm_area_struct * vma, unsigned long addr, pte_t *ptep)
 #else
        if (!PageReserved(page) && !test_bit(PG_arch_1, &page->flags)
            && (vma->vm_flags & VM_EXEC) != 0) {
-                unsigned long paddr = (unsigned long) page_address(page);
+                unsigned long paddr = (unsigned long)kmap_atomic(page);
                __flush_dcache_page(paddr);
                __invalidate_icache_page(paddr);
                set_bit(PG_arch_1, &page->flags);
+                kunmap_atomic((void *)paddr);
        }
 #endif
 }
diff --git a/arch/xtensa/mm/highmem.c b/arch/xtensa/mm/highmem.c
new file mode 100644
index 000000000000..17a8c0d6fd17
--- /dev/null
+++ b/arch/xtensa/mm/highmem.c
@@ -0,0 +1,72 @@
+/*
+ * High memory support for Xtensa architecture
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file "COPYING" in the main directory of
+ * this archive for more details.
+ *
+ * Copyright (C) 2014 Cadence Design Systems Inc.
+ */
+#include <linux/export.h>
+#include <linux/highmem.h>
+#include <asm/tlbflush.h>
+static pte_t *kmap_pte;
+void *kmap_atomic(struct page *page)
+{
+        enum fixed_addresses idx;
+        unsigned long vaddr;
+        int type;
+        pagefault_disable();
+        if (!PageHighMem(page))
+                return page_address(page);
+        type = kmap_atomic_idx_push();
+        idx = type + KM_TYPE_NR * smp_processor_id();
+        vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
+#ifdef CONFIG_DEBUG_HIGHMEM
+        BUG_ON(!pte_none(*(kmap_pte - idx)));
+#endif
+        set_pte(kmap_pte - idx, mk_pte(page, PAGE_KERNEL_EXEC));
+        return (void *)vaddr;
+}
+EXPORT_SYMBOL(kmap_atomic);
+void __kunmap_atomic(void *kvaddr)
+{
+        int idx, type;
+        if (kvaddr >= (void *)FIXADDR_START &&
+            kvaddr < (void *)FIXADDR_TOP) {
+                type = kmap_atomic_idx();
+                idx = type + KM_TYPE_NR * smp_processor_id();
+                /*
+                 * Force other mappings to Oops if they'll try to access this
+                 * pte without first remap it.  Keeping stale mappings around
+                 * is a bad idea also, in case the page changes cacheability
+                 * attributes or becomes a protected page in a hypervisor.
+                 */
+                pte_clear(&init_mm, kvaddr, kmap_pte - idx);
+                local_flush_tlb_kernel_range((unsigned long)kvaddr,
+                                             (unsigned long)kvaddr + PAGE_SIZE);
+                kmap_atomic_idx_pop();
+        }
+        pagefault_enable();
+}
+EXPORT_SYMBOL(__kunmap_atomic);
+void __init kmap_init(void)
+{
+        unsigned long kmap_vstart;
+        /* cache the first kmap pte */
+        kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN);
+        kmap_pte = kmap_get_fixmap_pte(kmap_vstart);
+}
diff --git a/arch/xtensa/mm/init.c b/arch/xtensa/mm/init.c
index aff108df92d3..4224256bb215 100644
--- a/arch/xtensa/mm/init.c
+++ b/arch/xtensa/mm/init.c
@@ -8,6 +8,7 @@
 * for more details.
 *
 * Copyright (C) 2001 - 2005 Tensilica Inc.
+ * Copyright (C) 2014 Cadence Design Systems Inc.
 *
 * Chris Zankel <chris@zankel.net>
 * Joe Taylor   <joe@tensilica.com, joetylr@yahoo.com>
@@ -19,6 +20,7 @@
 #include <linux/errno.h>
 #include <linux/bootmem.h>
 #include <linux/gfp.h>
+#include <linux/highmem.h>
 #include <linux/swap.h>
 #include <linux/mman.h>
 #include <linux/nodemask.h>
@@ -27,11 +29,133 @@
 #include <asm/bootparam.h>
 #include <asm/page.h>
 #include <asm/sections.h>
+#include <asm/sysmem.h>
+struct sysmem_info sysmem __initdata;
+static void __init sysmem_dump(void)
+{
+        unsigned i;
+        pr_debug("Sysmem:\n");
+        for (i = 0; i < sysmem.nr_banks; ++i)
+                pr_debug("  0x%08lx - 0x%08lx (%ldK)\n",
+                         sysmem.bank[i].start, sysmem.bank[i].end,
+                         (sysmem.bank[i].end - sysmem.bank[i].start) >> 10);
+}
+/*
+ * Find bank with maximal .start such that bank.start <= start
+ */
+static inline struct meminfo * __init find_bank(unsigned long start)
+{
+        unsigned i;
+        struct meminfo *it = NULL;
+        for (i = 0; i < sysmem.nr_banks; ++i)
+                if (sysmem.bank[i].start <= start)
+                        it = sysmem.bank + i;
+                else
+                        break;
+        return it;
+}
+/*
+ * Move all memory banks starting at 'from' to a new place at 'to',
+ * adjust nr_banks accordingly.
+ * Both 'from' and 'to' must be inside the sysmem.bank.
+ *
+ * Returns: 0 (success), -ENOMEM (not enough space in the sysmem.bank).
+ */
+static int __init move_banks(struct meminfo *to, struct meminfo *from)
+{
+        unsigned n = sysmem.nr_banks - (from - sysmem.bank);
+        if (to > from && to - from + sysmem.nr_banks > SYSMEM_BANKS_MAX)
+                return -ENOMEM;
+        if (to != from)
+                memmove(to, from, n * sizeof(struct meminfo));
+        sysmem.nr_banks += to - from;
+        return 0;
+}
+/*
+ * Add new bank to sysmem. Resulting sysmem is the union of bytes of the
+ * original sysmem and the new bank.
+ *
+ * Returns: 0 (success), < 0 (error)
+ */
+int __init add_sysmem_bank(unsigned long start, unsigned long end)
+{
+        unsigned i;
+        struct meminfo *it = NULL;
+        unsigned long sz;
+        unsigned long bank_sz = 0;
+        if (start == end ||
+            (start < end) != (PAGE_ALIGN(start) < (end & PAGE_MASK))) {
+                pr_warn("Ignoring small memory bank 0x%08lx size: %ld bytes\n",
+                        start, end - start);
+                return -EINVAL;
+        }
+        start = PAGE_ALIGN(start);
+        end &= PAGE_MASK;
+        sz = end - start;
+        it = find_bank(start);
+        if (it)
+                bank_sz = it->end - it->start;
+        if (it && bank_sz >= start - it->start) {
+                if (end - it->start > bank_sz)
+                        it->end = end;
+                else
+                        return 0;
+        } else {
+                if (!it)
+                        it = sysmem.bank;
+                else
+                        ++it;
+                if (it - sysmem.bank < sysmem.nr_banks &&
+                    it->start - start <= sz) {
+                        it->start = start;
+                        if (it->end - it->start < sz)
+                                it->end = end;
+                        else
+                                return 0;
+                } else {
+                        if (move_banks(it + 1, it) < 0) {
+                                pr_warn("Ignoring memory bank 0x%08lx size %ld bytes\n",
+                                        start, end - start);
+                                return -EINVAL;
+                        }
+                        it->start = start;
+                        it->end = end;
+                        return 0;
+                }
+        }
+        sz = it->end - it->start;
+        for (i = it + 1 - sysmem.bank; i < sysmem.nr_banks; ++i)
+                if (sysmem.bank[i].start - it->start <= sz) {
+                        if (sz < sysmem.bank[i].end - it->start)
+                                it->end = sysmem.bank[i].end;
+                } else {
+                        break;
+                }
+        move_banks(it + 1, sysmem.bank + i);
+        return 0;
+}
 /*
 * mem_reserve(start, end, must_exist)
 *
 * Reserve some memory from the memory pool.
+ * If must_exist is set and a part of the region being reserved does not exist
+ * memory map is not altered.
 *
 * Parameters:
 *  start       Start of region,
@@ -39,53 +163,69 @@
 *  must_exist  Must exist in memory pool.
 *
 * Returns:
- *  0 (memory area couldn't be mapped)
+ *  0 (success)
- * -1 (success)
+ *  < 0 (error)
 */
 int __init mem_reserve(unsigned long start, unsigned long end, int must_exist)
 {
-        int i;
+        struct meminfo *it;
+        struct meminfo *rm = NULL;
-        if (start == end)
+        unsigned long sz;
-                return 0;
+        unsigned long bank_sz = 0;
        start = start & PAGE_MASK;
        end = PAGE_ALIGN(end);
+        sz = end - start;
+        if (!sz)
+                return -EINVAL;
-        for (i = 0; i < sysmem.nr_banks; i++)
+        it = find_bank(start);
-                if (start < sysmem.bank[i].end
-                    && end >= sysmem.bank[i].start)
+        if (it)
-                        break;
+                bank_sz = it->end - it->start;
-        if (i == sysmem.nr_banks) {
+        if ((!it || end - it->start > bank_sz) && must_exist) {
-                if (must_exist)
+                pr_warn("mem_reserve: [0x%0lx, 0x%0lx) not in any region!\n",
-                        printk (KERN_WARNING "mem_reserve: [0x%0lx, 0x%0lx) "
+                        start, end);
-                                "not in any region!\n", start, end);
+                return -EINVAL;
-                return 0;
        }
-        if (start > sysmem.bank[i].start) {
+        if (it && start - it->start < bank_sz) {
-                if (end < sysmem.bank[i].end) {
+                if (start == it->start) {
-                        /* split entry */
+                        if (end - it->start < bank_sz) {
-                        if (sysmem.nr_banks >= SYSMEM_BANKS_MAX)
+                                it->start = end;
-                                panic("meminfo overflow\n");
+                                return 0;
-                        sysmem.bank[sysmem.nr_banks].start = end;
+                        } else {
-                        sysmem.bank[sysmem.nr_banks].end = sysmem.bank[i].end;
+                                rm = it;
-                        sysmem.nr_banks++;
+                        }
+                } else {
+                        it->end = start;
+                        if (end - it->start < bank_sz)
+                                return add_sysmem_bank(end,
+                                                       it->start + bank_sz);
+                        ++it;
                }
-                sysmem.bank[i].end = start;
+        }
-        } else if (end < sysmem.bank[i].end) {
+        if (!it)
-                sysmem.bank[i].start = end;
+                it = sysmem.bank;
-        } else {
+        for (; it < sysmem.bank + sysmem.nr_banks; ++it) {
-                /* remove entry */
+                if (it->end - start <= sz) {
-                sysmem.nr_banks--;
+                        if (!rm)
-                sysmem.bank[i].start = sysmem.bank[sysmem.nr_banks].start;
+                                rm = it;
-                sysmem.bank[i].end   = sysmem.bank[sysmem.nr_banks].end;
+                } else {
+                        if (it->start - start < sz)
+                                it->start = end;
+                        break;
+                }
        }
-        return -1;
+        if (rm)
+                move_banks(rm, it);
+        return 0;
 }
@@ -99,6 +239,7 @@ void __init bootmem_init(void)
        unsigned long bootmap_start, bootmap_size;
        int i;
+        sysmem_dump();
        max_low_pfn = max_pfn = 0;
        min_low_pfn = ~0;
@@ -156,19 +297,13 @@ void __init bootmem_init(void)
 void __init zones_init(void)
 {
-        unsigned long zones_size[MAX_NR_ZONES];
-        int i;
        /* All pages are DMA-able, so we put them all in the DMA zone. */
+        unsigned long zones_size[MAX_NR_ZONES] = {
-        zones_size[ZONE_DMA] = max_low_pfn - ARCH_PFN_OFFSET;
+                [ZONE_DMA] = max_low_pfn - ARCH_PFN_OFFSET,
-        for (i = 1; i < MAX_NR_ZONES; i++)
-                zones_size[i] = 0;
 #ifdef CONFIG_HIGHMEM
-        zones_size[ZONE_HIGHMEM] = max_pfn - max_low_pfn;
+                [ZONE_HIGHMEM] = max_pfn - max_low_pfn,
 #endif
+        };
        free_area_init_node(0, zones_size, ARCH_PFN_OFFSET, NULL);
 }
@@ -178,16 +313,38 @@ void __init zones_init(void)
 void __init mem_init(void)
 {
-        max_mapnr = max_low_pfn - ARCH_PFN_OFFSET;
-        high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
 #ifdef CONFIG_HIGHMEM
-#error HIGHGMEM not implemented in init.c
+        unsigned long tmp;
+        reset_all_zones_managed_pages();
+        for (tmp = max_low_pfn; tmp < max_pfn; tmp++)
+                free_highmem_page(pfn_to_page(tmp));
 #endif
+        max_mapnr = max_pfn - ARCH_PFN_OFFSET;
+        high_memory = (void *)__va(max_low_pfn << PAGE_SHIFT);
        free_all_bootmem();
        mem_init_print_info(NULL);
+        pr_info("virtual kernel memory layout:\n"
+#ifdef CONFIG_HIGHMEM
+                "    pkmap   : 0x%08lx - 0x%08lx  (%5lu kB)\n"
+                "    fixmap  : 0x%08lx - 0x%08lx  (%5lu kB)\n"
+#endif
+                "    vmalloc : 0x%08x - 0x%08x  (%5u MB)\n"
+                "    lowmem  : 0x%08x - 0x%08lx  (%5lu MB)\n",
+#ifdef CONFIG_HIGHMEM
+                PKMAP_BASE, PKMAP_BASE + LAST_PKMAP * PAGE_SIZE,
+                (LAST_PKMAP*PAGE_SIZE) >> 10,
+                FIXADDR_START, FIXADDR_TOP,
+                (FIXADDR_TOP - FIXADDR_START) >> 10,
+#endif
+                VMALLOC_START, VMALLOC_END,
+                (VMALLOC_END - VMALLOC_START) >> 20,
+                PAGE_OFFSET, PAGE_OFFSET +
+                (max_low_pfn - min_low_pfn) * PAGE_SIZE,
+                ((max_low_pfn - min_low_pfn) * PAGE_SIZE) >> 20);
 }
 #ifdef CONFIG_BLK_DEV_INITRD
@@ -204,3 +361,53 @@ void free_initmem(void)
 {
        free_initmem_default(-1);
 }
+static void __init parse_memmap_one(char *p)
+{
+        char *oldp;
+        unsigned long start_at, mem_size;
+        if (!p)
+                return;
+        oldp = p;
+        mem_size = memparse(p, &p);
+        if (p == oldp)
+                return;
+        switch (*p) {
+        case '@':
+                start_at = memparse(p + 1, &p);
+                add_sysmem_bank(start_at, start_at + mem_size);
+                break;
+        case '$':
+                start_at = memparse(p + 1, &p);
+                mem_reserve(start_at, start_at + mem_size, 0);
+                break;
+        case 0:
+                mem_reserve(mem_size, 0, 0);
+                break;
+        default:
+                pr_warn("Unrecognized memmap syntax: %s\n", p);
+                break;
+        }
+}
+static int __init parse_memmap_opt(char *str)
+{
+        while (str) {
+                char *k = strchr(str, ',');
+                if (k)
+                        *k++ = 0;
+                parse_memmap_one(str);
+                str = k;
+        }
+        return 0;
+}
+early_param("memmap", parse_memmap_opt);
diff --git a/arch/xtensa/mm/mmu.c b/arch/xtensa/mm/mmu.c
index 861203e958da..3429b483d9f8 100644
--- a/arch/xtensa/mm/mmu.c
+++ b/arch/xtensa/mm/mmu.c
@@ -3,6 +3,7 @@
 *
 * Extracted from init.c
 */
+#include <linux/bootmem.h>
 #include <linux/percpu.h>
 #include <linux/init.h>
 #include <linux/string.h>
@@ -16,9 +17,44 @@
 #include <asm/initialize_mmu.h>
 #include <asm/io.h>
+#if defined(CONFIG_HIGHMEM)
+static void * __init init_pmd(unsigned long vaddr)
+{
+        pgd_t *pgd = pgd_offset_k(vaddr);
+        pmd_t *pmd = pmd_offset(pgd, vaddr);
+        if (pmd_none(*pmd)) {
+                unsigned i;
+                pte_t *pte = alloc_bootmem_low_pages(PAGE_SIZE);
+                for (i = 0; i < 1024; i++)
+                        pte_clear(NULL, 0, pte + i);
+                set_pmd(pmd, __pmd(((unsigned long)pte) & PAGE_MASK));
+                BUG_ON(pte != pte_offset_kernel(pmd, 0));
+                pr_debug("%s: vaddr: 0x%08lx, pmd: 0x%p, pte: 0x%p\n",
+                         __func__, vaddr, pmd, pte);
+                return pte;
+        } else {
+                return pte_offset_kernel(pmd, 0);
+        }
+}
+static void __init fixedrange_init(void)
+{
+        BUILD_BUG_ON(FIXADDR_SIZE > PMD_SIZE);
+        init_pmd(__fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK);
+}
+#endif
 void __init paging_init(void)
 {
        memset(swapper_pg_dir, 0, PAGE_SIZE);
+#ifdef CONFIG_HIGHMEM
+        fixedrange_init();
+        pkmap_page_table = init_pmd(PKMAP_BASE);
+        kmap_init();
+#endif
 }
 /*
diff --git a/arch/xtensa/mm/tlb.c b/arch/xtensa/mm/tlb.c
index ade623826788..5ece856c5725 100644
--- a/arch/xtensa/mm/tlb.c
+++ b/arch/xtensa/mm/tlb.c
@@ -149,6 +149,21 @@ void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
        local_irq_restore(flags);
 }
+void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
+{
+        if (end > start && start >= TASK_SIZE && end <= PAGE_OFFSET &&
+            end - start < _TLB_ENTRIES << PAGE_SHIFT) {
+                start &= PAGE_MASK;
+                while (start < end) {
+                        invalidate_itlb_mapping(start);
+                        invalidate_dtlb_mapping(start);
+                        start += PAGE_SIZE;
+                }
+        } else {
+                local_flush_tlb_all();
+        }
+}
 #ifdef CONFIG_DEBUG_TLB_SANITY
 static unsigned get_pte_for_vaddr(unsigned vaddr)
diff --git a/arch/xtensa/platforms/iss/Makefile b/arch/xtensa/platforms/iss/Makefile
index d2369b799c50..b3e89291cfba 100644
--- a/arch/xtensa/platforms/iss/Makefile
+++ b/arch/xtensa/platforms/iss/Makefile
@@ -4,6 +4,7 @@
 # "prom monitor" library routines under Linux.
 #
-obj-y                   = console.o setup.o
+obj-y                   = setup.o
+obj-$(CONFIG_TTY)       += console.o
 obj-$(CONFIG_NET)       += network.o
 obj-$(CONFIG_BLK_DEV_SIMDISK) += simdisk.o
diff --git a/arch/xtensa/platforms/xt2000/setup.c b/arch/xtensa/platforms/xt2000/setup.c
index f9bc87966290..b90555cb8089 100644
--- a/arch/xtensa/platforms/xt2000/setup.c
+++ b/arch/xtensa/platforms/xt2000/setup.c
@@ -92,18 +92,8 @@ void __init platform_setup(char** cmdline)
 /* early initialization */
-extern sysmem_info_t __initdata sysmem;
+void __init platform_init(bp_tag_t *first)
-void platform_init(bp_tag_t* first)
 {
-        /* Set default memory block if not provided by the bootloader. */
-        if (sysmem.nr_banks == 0) {
-                sysmem.nr_banks = 1;
-                sysmem.bank[0].start = PLATFORM_DEFAULT_MEM_START;
-                sysmem.bank[0].end = PLATFORM_DEFAULT_MEM_START
-                                     + PLATFORM_DEFAULT_MEM_SIZE;
-        }
 }
 /* Heartbeat. Let the LED blink. */