4 files changed, 18 insertions, 4 deletions

diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index 73fd7d0887b5..587ceef81e45 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -23,8 +23,12 @@
         };
 
         cpus {
-                cpu@0 {
-                        compatible = "arm,arm926ejs";
+                #address-cells = <0>;
+                #size-cells = <0>;
+
+                cpu {
+                        compatible = "arm,arm926ej-s";
+                        device_type = "cpu";
                 };
         };
 
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 600f7cb51f3e..4c10a1968c0e 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -32,8 +32,12 @@
         };
 
         cpus {
-                cpu@0 {
-                        compatible = "arm,arm926ejs";
+                #address-cells = <0>;
+                #size-cells = <0>;
+
+                cpu {
+                        compatible = "arm,arm926ej-s";
+                        device_type = "cpu";
                 };
         };
 
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 5bcdf3a90bb3..62dc78126795 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -18,12 +18,14 @@
 
                 cpu@0 {
                         compatible = "arm,cortex-a9";
+                        device_type = "cpu";
                         reg = <0>;
                         next-level-cache = <&L2>;
                 };
 
                 cpu@1 {
                         compatible = "arm,cortex-a9";
+                        device_type = "cpu";
                         reg = <1>;
                         next-level-cache = <&L2>;
                 };
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 21e675848bd1..dc54a72a3bcd 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -18,6 +18,7 @@
 
                 cpu@0 {
                         compatible = "arm,cortex-a9";
+                        device_type = "cpu";
                         reg = <0>;
                         next-level-cache = <&L2>;
                         operating-points = <
@@ -39,18 +40,21 @@
 
                 cpu@1 {
                         compatible = "arm,cortex-a9";
+                        device_type = "cpu";
                         reg = <1>;
                         next-level-cache = <&L2>;
                 };
 
                 cpu@2 {
                         compatible = "arm,cortex-a9";
+                        device_type = "cpu";
                         reg = <2>;
                         next-level-cache = <&L2>;
                 };
 
                 cpu@3 {
                         compatible = "arm,cortex-a9";
+                        device_type = "cpu";
                         reg = <3>;
                         next-level-cache = <&L2>;
                 };