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-rw-r--r--arch/powerpc/include/asm/cpm.h24
-rw-r--r--arch/powerpc/include/asm/cpm1.h3
-rw-r--r--arch/powerpc/kernel/fsl_booke_entry_mapping.S4
-rw-r--r--arch/powerpc/sysdev/micropatch.c30
-rw-r--r--arch/x86/include/asm/x86_init.h2
-rw-r--r--arch/x86/kernel/mrst.c7
-rw-r--r--arch/x86/kernel/x86_init.c7
-rw-r--r--arch/x86/kvm/mmu.c2
-rw-r--r--arch/x86/kvm/vmx.c7
9 files changed, 64 insertions, 22 deletions
diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h
index 0835eb977ba9..e50323fe941f 100644
--- a/arch/powerpc/include/asm/cpm.h
+++ b/arch/powerpc/include/asm/cpm.h
@@ -7,6 +7,30 @@
7#include <linux/of.h> 7#include <linux/of.h>
8 8
9/* 9/*
10 * SPI Parameter RAM common to QE and CPM.
11 */
12struct spi_pram {
13 __be16 rbase; /* Rx Buffer descriptor base address */
14 __be16 tbase; /* Tx Buffer descriptor base address */
15 u8 rfcr; /* Rx function code */
16 u8 tfcr; /* Tx function code */
17 __be16 mrblr; /* Max receive buffer length */
18 __be32 rstate; /* Internal */
19 __be32 rdp; /* Internal */
20 __be16 rbptr; /* Internal */
21 __be16 rbc; /* Internal */
22 __be32 rxtmp; /* Internal */
23 __be32 tstate; /* Internal */
24 __be32 tdp; /* Internal */
25 __be16 tbptr; /* Internal */
26 __be16 tbc; /* Internal */
27 __be32 txtmp; /* Internal */
28 __be32 res; /* Tx temp. */
29 __be16 rpbase; /* Relocation pointer (CPM1 only) */
30 __be16 res1; /* Reserved */
31};
32
33/*
10 * USB Controller pram common to QE and CPM. 34 * USB Controller pram common to QE and CPM.
11 */ 35 */
12struct usb_ctlr { 36struct usb_ctlr {
diff --git a/arch/powerpc/include/asm/cpm1.h b/arch/powerpc/include/asm/cpm1.h
index 81b01192f440..bd07650dca56 100644
--- a/arch/powerpc/include/asm/cpm1.h
+++ b/arch/powerpc/include/asm/cpm1.h
@@ -17,6 +17,7 @@
17#ifndef __CPM1__ 17#ifndef __CPM1__
18#define __CPM1__ 18#define __CPM1__
19 19
20#include <linux/init.h>
20#include <asm/8xx_immap.h> 21#include <asm/8xx_immap.h>
21#include <asm/ptrace.h> 22#include <asm/ptrace.h>
22#include <asm/cpm.h> 23#include <asm/cpm.h>
@@ -54,7 +55,7 @@ extern cpm8xx_t __iomem *cpmp; /* Pointer to comm processor */
54 55
55extern void cpm_setbrg(uint brg, uint rate); 56extern void cpm_setbrg(uint brg, uint rate);
56 57
57extern void cpm_load_patch(cpm8xx_t *cp); 58extern void __init cpm_load_patch(cpm8xx_t *cp);
58 59
59extern void cpm_reset(void); 60extern void cpm_reset(void);
60 61
diff --git a/arch/powerpc/kernel/fsl_booke_entry_mapping.S b/arch/powerpc/kernel/fsl_booke_entry_mapping.S
index beb4d78a2304..a92c79be2728 100644
--- a/arch/powerpc/kernel/fsl_booke_entry_mapping.S
+++ b/arch/powerpc/kernel/fsl_booke_entry_mapping.S
@@ -205,8 +205,7 @@ next_tlb_setup:
205 bdnz+ next_tlb_setup 205 bdnz+ next_tlb_setup
206 206
207/* 7. Jump to our 1:1 mapping */ 207/* 7. Jump to our 1:1 mapping */
208 li r6, 0 208 mr r6, r25
209
210#else 209#else
211 #error You need to specify the mapping or not use this at all. 210 #error You need to specify the mapping or not use this at all.
212#endif 211#endif
@@ -217,7 +216,6 @@ next_tlb_setup:
2171: mflr r9 2161: mflr r9
218 rlwimi r6,r9,0,20,31 217 rlwimi r6,r9,0,20,31
219 addi r6,r6,(2f - 1b) 218 addi r6,r6,(2f - 1b)
220 add r6, r6, r25
221 mtspr SPRN_SRR0,r6 219 mtspr SPRN_SRR0,r6
222 mtspr SPRN_SRR1,r7 220 mtspr SPRN_SRR1,r7
223 rfi /* start execution out of TLB1[0] entry */ 221 rfi /* start execution out of TLB1[0] entry */
diff --git a/arch/powerpc/sysdev/micropatch.c b/arch/powerpc/sysdev/micropatch.c
index d8d602840757..c0bb76ef7242 100644
--- a/arch/powerpc/sysdev/micropatch.c
+++ b/arch/powerpc/sysdev/micropatch.c
@@ -4,6 +4,7 @@
4 * also relocates SMC2, but this would require additional changes 4 * also relocates SMC2, but this would require additional changes
5 * to uart.c, so I am holding off on that for a moment. 5 * to uart.c, so I am holding off on that for a moment.
6 */ 6 */
7#include <linux/init.h>
7#include <linux/errno.h> 8#include <linux/errno.h>
8#include <linux/sched.h> 9#include <linux/sched.h>
9#include <linux/kernel.h> 10#include <linux/kernel.h>
@@ -16,6 +17,7 @@
16#include <asm/page.h> 17#include <asm/page.h>
17#include <asm/pgtable.h> 18#include <asm/pgtable.h>
18#include <asm/8xx_immap.h> 19#include <asm/8xx_immap.h>
20#include <asm/cpm.h>
19#include <asm/cpm1.h> 21#include <asm/cpm1.h>
20 22
21/* 23/*
@@ -24,7 +26,7 @@
24 26
25#ifdef CONFIG_I2C_SPI_UCODE_PATCH 27#ifdef CONFIG_I2C_SPI_UCODE_PATCH
26 28
27uint patch_2000[] = { 29static uint patch_2000[] __initdata = {
28 0x7FFFEFD9, 30 0x7FFFEFD9,
29 0x3FFD0000, 31 0x3FFD0000,
30 0x7FFB49F7, 32 0x7FFB49F7,
@@ -143,7 +145,7 @@ uint patch_2000[] = {
143 0x5F8247F8 145 0x5F8247F8
144}; 146};
145 147
146uint patch_2f00[] = { 148static uint patch_2f00[] __initdata = {
147 0x3E303430, 149 0x3E303430,
148 0x34343737, 150 0x34343737,
149 0xABF7BF9B, 151 0xABF7BF9B,
@@ -182,7 +184,7 @@ uint patch_2f00[] = {
182 184
183#ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH 185#ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH
184 186
185uint patch_2000[] = { 187static uint patch_2000[] __initdata = {
186 0x3fff0000, 188 0x3fff0000,
187 0x3ffd0000, 189 0x3ffd0000,
188 0x3ffb0000, 190 0x3ffb0000,
@@ -505,7 +507,7 @@ uint patch_2000[] = {
505 0x6079e2bb 507 0x6079e2bb
506}; 508};
507 509
508uint patch_2f00[] = { 510static uint patch_2f00[] __initdata = {
509 0x30303030, 511 0x30303030,
510 0x3e3e3434, 512 0x3e3e3434,
511 0xabbf9b99, 513 0xabbf9b99,
@@ -572,7 +574,7 @@ uint patch_2f00[] = {
572 0xf22f3f23 574 0xf22f3f23
573}; 575};
574 576
575uint patch_2e00[] = { 577static uint patch_2e00[] __initdata = {
576 0x27eeeeee, 578 0x27eeeeee,
577 0xeeeeeeee, 579 0xeeeeeeee,
578 0xeeeeeeee, 580 0xeeeeeeee,
@@ -598,7 +600,7 @@ uint patch_2e00[] = {
598 600
599#ifdef CONFIG_USB_SOF_UCODE_PATCH 601#ifdef CONFIG_USB_SOF_UCODE_PATCH
600 602
601uint patch_2000[] = { 603static uint patch_2000[] __initdata = {
602 0x7fff0000, 604 0x7fff0000,
603 0x7ffd0000, 605 0x7ffd0000,
604 0x7ffb0000, 606 0x7ffb0000,
@@ -613,21 +615,25 @@ uint patch_2000[] = {
613 0x60750000 615 0x60750000
614}; 616};
615 617
616uint patch_2f00[] = { 618static uint patch_2f00[] __initdata = {
617 0x3030304c, 619 0x3030304c,
618 0xcab9e441, 620 0xcab9e441,
619 0xa1aaf220 621 0xa1aaf220
620}; 622};
621#endif 623#endif
622 624
623void 625void __init cpm_load_patch(cpm8xx_t *cp)
624cpm_load_patch(cpm8xx_t *cp)
625{ 626{
626 volatile uint *dp; /* Dual-ported RAM. */ 627 volatile uint *dp; /* Dual-ported RAM. */
627 volatile cpm8xx_t *commproc; 628 volatile cpm8xx_t *commproc;
629#if defined(CONFIG_I2C_SPI_UCODE_PATCH) || \
630 defined(CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
628 volatile iic_t *iip; 631 volatile iic_t *iip;
629 volatile spi_t *spp; 632 volatile struct spi_pram *spp;
633#ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH
630 volatile smc_uart_t *smp; 634 volatile smc_uart_t *smp;
635#endif
636#endif
631 int i; 637 int i;
632 638
633 commproc = cp; 639 commproc = cp;
@@ -668,8 +674,8 @@ cpm_load_patch(cpm8xx_t *cp)
668 /* Put SPI above the IIC, also 32-byte aligned. 674 /* Put SPI above the IIC, also 32-byte aligned.
669 */ 675 */
670 i = (RPBASE + sizeof(iic_t) + 31) & ~31; 676 i = (RPBASE + sizeof(iic_t) + 31) & ~31;
671 spp = (spi_t *)&commproc->cp_dparam[PROFF_SPI]; 677 spp = (struct spi_pram *)&commproc->cp_dparam[PROFF_SPI];
672 spp->spi_rpbase = i; 678 spp->rpbase = i;
673 679
674# if defined(CONFIG_I2C_SPI_UCODE_PATCH) 680# if defined(CONFIG_I2C_SPI_UCODE_PATCH)
675 commproc->cp_cpmcr1 = 0x802a; 681 commproc->cp_cpmcr1 = 0x802a;
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 519b54327d75..baa579c8e038 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -142,6 +142,7 @@ struct x86_cpuinit_ops {
142 * @set_wallclock: set time back to HW clock 142 * @set_wallclock: set time back to HW clock
143 * @is_untracked_pat_range exclude from PAT logic 143 * @is_untracked_pat_range exclude from PAT logic
144 * @nmi_init enable NMI on cpus 144 * @nmi_init enable NMI on cpus
145 * @i8042_detect pre-detect if i8042 controller exists
145 */ 146 */
146struct x86_platform_ops { 147struct x86_platform_ops {
147 unsigned long (*calibrate_tsc)(void); 148 unsigned long (*calibrate_tsc)(void);
@@ -150,6 +151,7 @@ struct x86_platform_ops {
150 void (*iommu_shutdown)(void); 151 void (*iommu_shutdown)(void);
151 bool (*is_untracked_pat_range)(u64 start, u64 end); 152 bool (*is_untracked_pat_range)(u64 start, u64 end);
152 void (*nmi_init)(void); 153 void (*nmi_init)(void);
154 int (*i8042_detect)(void);
153}; 155};
154 156
155extern struct x86_init_ops x86_init; 157extern struct x86_init_ops x86_init;
diff --git a/arch/x86/kernel/mrst.c b/arch/x86/kernel/mrst.c
index e796448f0eb5..5915e0b33303 100644
--- a/arch/x86/kernel/mrst.c
+++ b/arch/x86/kernel/mrst.c
@@ -216,6 +216,12 @@ static void __init mrst_setup_boot_clock(void)
216 setup_boot_APIC_clock(); 216 setup_boot_APIC_clock();
217}; 217};
218 218
219/* MID systems don't have i8042 controller */
220static int mrst_i8042_detect(void)
221{
222 return 0;
223}
224
219/* 225/*
220 * Moorestown specific x86_init function overrides and early setup 226 * Moorestown specific x86_init function overrides and early setup
221 * calls. 227 * calls.
@@ -233,6 +239,7 @@ void __init x86_mrst_early_setup(void)
233 x86_cpuinit.setup_percpu_clockev = mrst_setup_secondary_clock; 239 x86_cpuinit.setup_percpu_clockev = mrst_setup_secondary_clock;
234 240
235 x86_platform.calibrate_tsc = mrst_calibrate_tsc; 241 x86_platform.calibrate_tsc = mrst_calibrate_tsc;
242 x86_platform.i8042_detect = mrst_i8042_detect;
236 x86_init.pci.init = pci_mrst_init; 243 x86_init.pci.init = pci_mrst_init;
237 x86_init.pci.fixup_irqs = x86_init_noop; 244 x86_init.pci.fixup_irqs = x86_init_noop;
238 245
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index 61a1e8c7e19f..cd6da6bf3eca 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -5,6 +5,7 @@
5 */ 5 */
6#include <linux/init.h> 6#include <linux/init.h>
7#include <linux/ioport.h> 7#include <linux/ioport.h>
8#include <linux/module.h>
8 9
9#include <asm/bios_ebda.h> 10#include <asm/bios_ebda.h>
10#include <asm/paravirt.h> 11#include <asm/paravirt.h>
@@ -85,6 +86,7 @@ struct x86_cpuinit_ops x86_cpuinit __cpuinitdata = {
85}; 86};
86 87
87static void default_nmi_init(void) { }; 88static void default_nmi_init(void) { };
89static int default_i8042_detect(void) { return 1; };
88 90
89struct x86_platform_ops x86_platform = { 91struct x86_platform_ops x86_platform = {
90 .calibrate_tsc = native_calibrate_tsc, 92 .calibrate_tsc = native_calibrate_tsc,
@@ -92,5 +94,8 @@ struct x86_platform_ops x86_platform = {
92 .set_wallclock = mach_set_rtc_mmss, 94 .set_wallclock = mach_set_rtc_mmss,
93 .iommu_shutdown = iommu_shutdown_noop, 95 .iommu_shutdown = iommu_shutdown_noop,
94 .is_untracked_pat_range = is_ISA_range, 96 .is_untracked_pat_range = is_ISA_range,
95 .nmi_init = default_nmi_init 97 .nmi_init = default_nmi_init,
98 .i8042_detect = default_i8042_detect
96}; 99};
100
101EXPORT_SYMBOL_GPL(x86_platform);
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index a6f695d76928..3699613e8830 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -1879,6 +1879,8 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1879 pgprintk("hfn old %lx new %lx\n", 1879 pgprintk("hfn old %lx new %lx\n",
1880 spte_to_pfn(*sptep), pfn); 1880 spte_to_pfn(*sptep), pfn);
1881 rmap_remove(vcpu->kvm, sptep); 1881 rmap_remove(vcpu->kvm, sptep);
1882 __set_spte(sptep, shadow_trap_nonpresent_pte);
1883 kvm_flush_remote_tlbs(vcpu->kvm);
1882 } else 1884 } else
1883 was_rmapped = 1; 1885 was_rmapped = 1;
1884 } 1886 }
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 859a01a07dbf..ee03679efe78 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -1744,18 +1744,15 @@ static void enter_lmode(struct kvm_vcpu *vcpu)
1744 (guest_tr_ar & ~AR_TYPE_MASK) 1744 (guest_tr_ar & ~AR_TYPE_MASK)
1745 | AR_TYPE_BUSY_64_TSS); 1745 | AR_TYPE_BUSY_64_TSS);
1746 } 1746 }
1747 vcpu->arch.efer |= EFER_LMA; 1747 vmx_set_efer(vcpu, vcpu->arch.efer | EFER_LMA);
1748 vmx_set_efer(vcpu, vcpu->arch.efer);
1749} 1748}
1750 1749
1751static void exit_lmode(struct kvm_vcpu *vcpu) 1750static void exit_lmode(struct kvm_vcpu *vcpu)
1752{ 1751{
1753 vcpu->arch.efer &= ~EFER_LMA;
1754
1755 vmcs_write32(VM_ENTRY_CONTROLS, 1752 vmcs_write32(VM_ENTRY_CONTROLS,
1756 vmcs_read32(VM_ENTRY_CONTROLS) 1753 vmcs_read32(VM_ENTRY_CONTROLS)
1757 & ~VM_ENTRY_IA32E_MODE); 1754 & ~VM_ENTRY_IA32E_MODE);
1758 vmx_set_efer(vcpu, vcpu->arch.efer); 1755 vmx_set_efer(vcpu, vcpu->arch.efer & ~EFER_LMA);
1759} 1756}
1760 1757
1761#endif 1758#endif