aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
Diffstat (limited to 'arch')
-rw-r--r--arch/alpha/include/asm/bitops.h4
-rw-r--r--arch/alpha/include/asm/types.h11
-rw-r--r--arch/arm/Kconfig10
-rw-r--r--arch/arm/boot/compressed/mmcif-sh7372.c13
-rw-r--r--arch/arm/configs/omap2plus_defconfig11
-rw-r--r--arch/arm/configs/tegra_defconfig29
-rw-r--r--arch/arm/include/asm/bitops.h86
-rw-r--r--arch/arm/include/asm/localtimer.h8
-rw-r--r--arch/arm/include/asm/mach/udc_pxa2xx.h2
-rw-r--r--arch/arm/include/asm/outercache.h14
-rw-r--r--arch/arm/include/asm/pgtable.h3
-rw-r--r--arch/arm/include/asm/setup.h2
-rw-r--r--arch/arm/include/asm/types.h6
-rw-r--r--arch/arm/kernel/crash_dump.c3
-rw-r--r--arch/arm/kernel/hw_breakpoint.c14
-rw-r--r--arch/arm/kernel/setup.c31
-rw-r--r--arch/arm/kernel/smp.c7
-rw-r--r--arch/arm/kernel/traps.c6
-rw-r--r--arch/arm/lib/uaccess_with_memcpy.c7
-rw-r--r--arch/arm/mach-ep93xx/gpio.c46
-rw-r--r--arch/arm/mach-exynos4/localtimer.c3
-rw-r--r--arch/arm/mach-imx/mach-mx27_3ds.c11
-rw-r--r--arch/arm/mach-imx/mach-pcm038.c10
-rw-r--r--arch/arm/mach-integrator/Kconfig1
-rw-r--r--arch/arm/mach-integrator/common.h1
-rw-r--r--arch/arm/mach-integrator/core.c7
-rw-r--r--arch/arm/mach-integrator/impd1.c5
-rw-r--r--arch/arm/mach-integrator/include/mach/cm.h4
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c44
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c239
-rw-r--r--arch/arm/mach-msm/timer.c3
-rw-r--r--arch/arm/mach-mx3/mach-mx31_3ds.c10
-rw-r--r--arch/arm/mach-mx3/mach-mx31moboard.c6
-rw-r--r--arch/arm/mach-omap2/Kconfig1
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c6
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c82
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c2
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c12
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c10
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c12
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c12
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c3
-rw-r--r--arch/arm/mach-omap2/board-omap3stalker.c12
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c210
-rw-r--r--arch/arm/mach-omap2/board-overo.c357
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c2
-rw-r--r--arch/arm/mach-omap2/board-zoom-peripherals.c12
-rw-r--r--arch/arm/mach-omap2/clock2420_data.c8
-rw-r--r--arch/arm/mach-omap2/clock2430_data.c8
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c14
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c15
-rw-r--r--arch/arm/mach-omap2/devices.c62
-rw-r--r--arch/arm/mach-omap2/devices.h19
-rw-r--r--arch/arm/mach-omap2/display.c80
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c13
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c12
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c23
-rw-r--r--arch/arm/mach-omap2/timer-mpu.c7
-rw-r--r--arch/arm/mach-pxa/am200epd.c8
-rw-r--r--arch/arm/mach-pxa/am300epd.c13
-rw-r--r--arch/arm/mach-pxa/balloon3.c2
-rw-r--r--arch/arm/mach-pxa/cm-x2xx.c2
-rw-r--r--arch/arm/mach-pxa/cm-x300.c2
-rw-r--r--arch/arm/mach-pxa/colibri-pxa270-income.c2
-rw-r--r--arch/arm/mach-pxa/colibri-pxa3xx.c2
-rw-r--r--arch/arm/mach-pxa/corgi.c1
-rw-r--r--arch/arm/mach-pxa/devices.c9
-rw-r--r--arch/arm/mach-pxa/em-x270.c2
-rw-r--r--arch/arm/mach-pxa/eseries.c36
-rw-r--r--arch/arm/mach-pxa/ezx.c12
-rw-r--r--arch/arm/mach-pxa/gumstix.c13
-rw-r--r--arch/arm/mach-pxa/idp.c2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmz72.h5
-rw-r--r--arch/arm/mach-pxa/include/mach/pxafb.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/z2.h3
-rw-r--r--arch/arm/mach-pxa/littleton.c2
-rw-r--r--arch/arm/mach-pxa/lpd270.c2
-rw-r--r--arch/arm/mach-pxa/lubbock.c2
-rw-r--r--arch/arm/mach-pxa/magician.c2
-rw-r--r--arch/arm/mach-pxa/mainstone.c2
-rw-r--r--arch/arm/mach-pxa/mioa701.c2
-rw-r--r--arch/arm/mach-pxa/palm27x.c5
-rw-r--r--arch/arm/mach-pxa/palmtc.c2
-rw-r--r--arch/arm/mach-pxa/palmte2.c33
-rw-r--r--arch/arm/mach-pxa/palmz72.c127
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c2
-rw-r--r--arch/arm/mach-pxa/poodle.c3
-rw-r--r--arch/arm/mach-pxa/raumfeld.c2
-rw-r--r--arch/arm/mach-pxa/saar.c2
-rw-r--r--arch/arm/mach-pxa/spitz.c2
-rw-r--r--arch/arm/mach-pxa/tavorevb.c2
-rw-r--r--arch/arm/mach-pxa/time.c5
-rw-r--r--arch/arm/mach-pxa/tosa.c13
-rw-r--r--arch/arm/mach-pxa/trizeps4.c4
-rw-r--r--arch/arm/mach-pxa/viper.c2
-rw-r--r--arch/arm/mach-pxa/vpac270.c2
-rw-r--r--arch/arm/mach-pxa/z2.c77
-rw-r--r--arch/arm/mach-pxa/zeus.c2
-rw-r--r--arch/arm/mach-pxa/zylonite.c4
-rw-r--r--arch/arm/mach-realview/Makefile3
-rw-r--r--arch/arm/mach-realview/core.c233
-rw-r--r--arch/arm/mach-realview/core.h2
-rw-r--r--arch/arm/mach-realview/headsmp.S40
-rw-r--r--arch/arm/mach-realview/localtimer.c26
-rw-r--r--arch/arm/mach-realview/platsmp.c98
-rw-r--r--arch/arm/mach-realview/realview_eb.c22
-rw-r--r--arch/arm/mach-realview/realview_pb1176.c22
-rw-r--r--arch/arm/mach-realview/realview_pb11mp.c22
-rw-r--r--arch/arm/mach-realview/realview_pba8.c22
-rw-r--r--arch/arm/mach-realview/realview_pbx.c22
-rw-r--r--arch/arm/mach-s3c2440/mach-mini2440.c7
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c3
-rw-r--r--arch/arm/mach-shmobile/board-mackerel.c25
-rw-r--r--arch/arm/mach-shmobile/include/mach/mmc-ap4eb.h (renamed from arch/arm/mach-shmobile/include/mach/mmcif-ap4eb.h)10
-rw-r--r--arch/arm/mach-shmobile/include/mach/mmc-mackerel.h (renamed from arch/arm/mach-shmobile/include/mach/mmcif-mackerel.h)11
-rw-r--r--arch/arm/mach-shmobile/include/mach/mmc.h (renamed from arch/arm/mach-shmobile/include/mach/mmcif.h)10
-rw-r--r--arch/arm/mach-shmobile/localtimer.c3
-rw-r--r--arch/arm/mach-tegra/Kconfig5
-rw-r--r--arch/arm/mach-tegra/Makefile4
-rw-r--r--arch/arm/mach-tegra/board-harmony-pcie.c24
-rw-r--r--arch/arm/mach-tegra/board-harmony-pinmux.c28
-rw-r--r--arch/arm/mach-tegra/board-harmony-power.c117
-rw-r--r--arch/arm/mach-tegra/board-harmony.c95
-rw-r--r--arch/arm/mach-tegra/board-harmony.h15
-rw-r--r--arch/arm/mach-tegra/board-paz00-pinmux.c157
-rw-r--r--arch/arm/mach-tegra/board-paz00.c128
-rw-r--r--arch/arm/mach-tegra/board-paz00.h29
-rw-r--r--arch/arm/mach-tegra/board-seaboard-pinmux.c11
-rw-r--r--arch/arm/mach-tegra/board-seaboard.c68
-rw-r--r--arch/arm/mach-tegra/board-seaboard.h3
-rw-r--r--arch/arm/mach-tegra/board-trimslice-pinmux.c9
-rw-r--r--arch/arm/mach-tegra/board-trimslice.c19
-rw-r--r--arch/arm/mach-tegra/board-trimslice.h3
-rw-r--r--arch/arm/mach-tegra/devices.c70
-rw-r--r--arch/arm/mach-tegra/devices.h4
-rw-r--r--arch/arm/mach-tegra/include/mach/iomap.h3
-rw-r--r--arch/arm/mach-tegra/localtimer.c3
-rw-r--r--arch/arm/mach-ux500/localtimer.c3
-rw-r--r--arch/arm/mach-versatile/core.c295
-rw-r--r--arch/arm/mach-versatile/core.h2
-rw-r--r--arch/arm/mach-versatile/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-versatile/versatile_ab.c1
-rw-r--r--arch/arm/mach-versatile/versatile_pb.c6
-rw-r--r--arch/arm/mach-vexpress/Kconfig3
-rw-r--r--arch/arm/mach-vexpress/Makefile3
-rw-r--r--arch/arm/mach-vexpress/core.h5
-rw-r--r--arch/arm/mach-vexpress/ct-ca9x4.c107
-rw-r--r--arch/arm/mach-vexpress/include/mach/ct-ca9x4.h2
-rw-r--r--arch/arm/mach-vexpress/include/mach/motherboard.h22
-rw-r--r--arch/arm/mach-vexpress/platsmp.c125
-rw-r--r--arch/arm/mach-vexpress/v2m.c90
-rw-r--r--arch/arm/mm/dma-mapping.c11
-rw-r--r--arch/arm/mm/fault-armv.c7
-rw-r--r--arch/arm/mm/fault.c39
-rw-r--r--arch/arm/mm/idmap.c35
-rw-r--r--arch/arm/mm/init.c8
-rw-r--r--arch/arm/mm/mm.h2
-rw-r--r--arch/arm/mm/mmu.c71
-rw-r--r--arch/arm/mm/pgd.c24
-rw-r--r--arch/arm/plat-nomadik/gpio.c45
-rw-r--r--arch/arm/plat-omap/include/plat/display.h15
-rw-r--r--arch/arm/plat-omap/include/plat/omap34xx.h16
-rw-r--r--arch/arm/plat-versatile/Kconfig17
-rw-r--r--arch/arm/plat-versatile/Makefile13
-rw-r--r--arch/arm/plat-versatile/clcd.c182
-rw-r--r--arch/arm/plat-versatile/fpga-irq.c72
-rw-r--r--arch/arm/plat-versatile/headsmp.S (renamed from arch/arm/mach-vexpress/headsmp.S)8
-rw-r--r--arch/arm/plat-versatile/include/plat/clcd.h9
-rw-r--r--arch/arm/plat-versatile/include/plat/fpga-irq.h12
-rw-r--r--arch/arm/plat-versatile/localtimer.c (renamed from arch/arm/mach-vexpress/localtimer.c)5
-rw-r--r--arch/arm/plat-versatile/platsmp.c104
-rw-r--r--arch/arm/tools/mach-types2395
-rw-r--r--arch/avr32/Kconfig14
-rw-r--r--arch/avr32/boards/atngw100/mrmt.c2
-rw-r--r--arch/avr32/boards/atngw100/setup.c2
-rw-r--r--arch/avr32/include/asm/bitops.h3
-rw-r--r--arch/avr32/kernel/avr32_ksyms.c4
-rw-r--r--arch/avr32/kernel/irq.c37
-rw-r--r--arch/avr32/lib/findbit.S4
-rw-r--r--arch/avr32/mach-at32ap/extint.c82
-rw-r--r--arch/avr32/mach-at32ap/intc.c14
-rw-r--r--arch/avr32/mach-at32ap/pio.c37
-rw-r--r--arch/blackfin/Kconfig1
-rw-r--r--arch/blackfin/include/asm/atomic.h2
-rw-r--r--arch/blackfin/include/asm/bitops.h3
-rw-r--r--arch/blackfin/include/asm/unistd.h3
-rw-r--r--arch/blackfin/mach-bf548/include/mach/anomaly.h6
-rw-r--r--arch/blackfin/mach-bf561/hotplug.c9
-rw-r--r--arch/blackfin/mach-common/entry.S1
-rw-r--r--arch/cris/include/asm/bitops.h3
-rw-r--r--arch/cris/include/asm/types.h6
-rw-r--r--arch/frv/Kconfig4
-rw-r--r--arch/frv/include/asm/bitops.h4
-rw-r--r--arch/h8300/Kconfig5
-rw-r--r--arch/h8300/include/asm/bitops.h3
-rw-r--r--arch/h8300/kernel/irq.c33
-rw-r--r--arch/ia64/include/asm/acpi.h6
-rw-r--r--arch/ia64/include/asm/bitops.h3
-rw-r--r--arch/ia64/include/asm/thread_info.h2
-rw-r--r--arch/ia64/include/asm/unistd.h6
-rw-r--r--arch/ia64/kernel/acpi.c23
-rw-r--r--arch/ia64/kernel/crash_dump.c3
-rw-r--r--arch/ia64/kernel/efi.c1
-rw-r--r--arch/ia64/kernel/entry.S4
-rw-r--r--arch/ia64/kernel/setup.c18
-rw-r--r--arch/ia64/mm/contig.c2
-rw-r--r--arch/ia64/mm/discontig.c2
-rw-r--r--arch/m32r/Kconfig5
-rw-r--r--arch/m32r/include/asm/bitops.h3
-rw-r--r--arch/m32r/include/asm/types.h6
-rw-r--r--arch/m32r/kernel/irq.c45
-rw-r--r--arch/m32r/platforms/m32104ut/setup.c8
-rw-r--r--arch/m32r/platforms/m32700ut/setup.c28
-rw-r--r--arch/m32r/platforms/mappi/setup.c16
-rw-r--r--arch/m32r/platforms/mappi2/setup.c20
-rw-r--r--arch/m32r/platforms/mappi3/setup.c20
-rw-r--r--arch/m32r/platforms/oaks32r/setup.c12
-rw-r--r--arch/m32r/platforms/opsput/setup.c28
-rw-r--r--arch/m32r/platforms/usrv/setup.c18
-rw-r--r--arch/m68k/Kconfig456
-rw-r--r--arch/m68k/Kconfig.debug34
-rw-r--r--arch/m68k/Kconfig.mmu417
-rw-r--r--arch/m68k/Kconfig.nommu (renamed from arch/m68knommu/Kconfig)94
-rw-r--r--arch/m68k/Makefile122
-rw-r--r--arch/m68k/Makefile_mm121
-rw-r--r--arch/m68k/Makefile_no (renamed from arch/m68knommu/Makefile)16
-rw-r--r--arch/m68k/configs/m5208evb_defconfig (renamed from arch/m68knommu/configs/m5208evb_defconfig)2
-rw-r--r--arch/m68k/configs/m5249evb_defconfig (renamed from arch/m68knommu/configs/m5249evb_defconfig)2
-rw-r--r--arch/m68k/configs/m5272c3_defconfig (renamed from arch/m68knommu/configs/m5272c3_defconfig)2
-rw-r--r--arch/m68k/configs/m5275evb_defconfig (renamed from arch/m68knommu/configs/m5275evb_defconfig)2
-rw-r--r--arch/m68k/configs/m5307c3_defconfig (renamed from arch/m68knommu/configs/m5307c3_defconfig)2
-rw-r--r--arch/m68k/configs/m5407c3_defconfig (renamed from arch/m68knommu/configs/m5407c3_defconfig)2
-rw-r--r--arch/m68k/include/asm/bitops_mm.h102
-rw-r--r--arch/m68k/include/asm/bitops_no.h32
-rw-r--r--arch/m68k/include/asm/types.h6
-rw-r--r--arch/m68k/kernel/Makefile18
-rw-r--r--arch/m68k/kernel/Makefile_mm17
-rw-r--r--arch/m68k/kernel/Makefile_no (renamed from arch/m68knommu/kernel/Makefile)0
-rw-r--r--arch/m68k/kernel/asm-offsets.c101
-rw-r--r--arch/m68k/kernel/asm-offsets_mm.c100
-rw-r--r--arch/m68k/kernel/asm-offsets_no.c (renamed from arch/m68knommu/kernel/asm-offsets.c)0
-rw-r--r--arch/m68k/kernel/dma.c135
-rw-r--r--arch/m68k/kernel/dma_mm.c130
-rw-r--r--arch/m68k/kernel/dma_no.c (renamed from arch/m68knommu/kernel/dma.c)0
-rw-r--r--arch/m68k/kernel/entry.S756
-rw-r--r--arch/m68k/kernel/entry_mm.S753
-rw-r--r--arch/m68k/kernel/entry_no.S (renamed from arch/m68knommu/kernel/entry.S)0
-rw-r--r--arch/m68k/kernel/init_task.c (renamed from arch/m68knommu/kernel/init_task.c)0
-rw-r--r--arch/m68k/kernel/irq.c (renamed from arch/m68knommu/kernel/irq.c)0
-rw-r--r--arch/m68k/kernel/m68k_ksyms.c21
-rw-r--r--arch/m68k/kernel/m68k_ksyms_mm.c16
-rw-r--r--arch/m68k/kernel/m68k_ksyms_no.c (renamed from arch/m68knommu/kernel/m68k_ksyms.c)0
-rw-r--r--arch/m68k/kernel/module.c156
-rw-r--r--arch/m68k/kernel/module_mm.c155
-rw-r--r--arch/m68k/kernel/module_no.c (renamed from arch/m68knommu/kernel/module.c)0
-rw-r--r--arch/m68k/kernel/process.c355
-rw-r--r--arch/m68k/kernel/process_mm.c354
-rw-r--r--arch/m68k/kernel/process_no.c (renamed from arch/m68knommu/kernel/process.c)0
-rw-r--r--arch/m68k/kernel/ptrace.c282
-rw-r--r--arch/m68k/kernel/ptrace_mm.c277
-rw-r--r--arch/m68k/kernel/ptrace_no.c (renamed from arch/m68knommu/kernel/ptrace.c)0
-rw-r--r--arch/m68k/kernel/setup.c534
-rw-r--r--arch/m68k/kernel/setup_mm.c533
-rw-r--r--arch/m68k/kernel/setup_no.c (renamed from arch/m68knommu/kernel/setup.c)0
-rw-r--r--arch/m68k/kernel/signal.c1018
-rw-r--r--arch/m68k/kernel/signal_mm.c1017
-rw-r--r--arch/m68k/kernel/signal_no.c (renamed from arch/m68knommu/kernel/signal.c)0
-rw-r--r--arch/m68k/kernel/sys_m68k.c551
-rw-r--r--arch/m68k/kernel/sys_m68k_mm.c546
-rw-r--r--arch/m68k/kernel/sys_m68k_no.c (renamed from arch/m68knommu/kernel/sys_m68k.c)0
-rw-r--r--arch/m68k/kernel/syscalltable.S (renamed from arch/m68knommu/kernel/syscalltable.S)0
-rw-r--r--arch/m68k/kernel/time.c119
-rw-r--r--arch/m68k/kernel/time_mm.c114
-rw-r--r--arch/m68k/kernel/time_no.c (renamed from arch/m68knommu/kernel/time.c)0
-rw-r--r--arch/m68k/kernel/traps.c1208
-rw-r--r--arch/m68k/kernel/traps_mm.c1207
-rw-r--r--arch/m68k/kernel/traps_no.c (renamed from arch/m68knommu/kernel/traps.c)0
-rw-r--r--arch/m68k/kernel/vmlinux.lds.S11
-rw-r--r--arch/m68k/kernel/vmlinux.lds_mm.S10
-rw-r--r--arch/m68k/kernel/vmlinux.lds_no.S (renamed from arch/m68knommu/kernel/vmlinux.lds.S)0
-rw-r--r--arch/m68k/lib/Makefile11
-rw-r--r--arch/m68k/lib/Makefile_mm6
-rw-r--r--arch/m68k/lib/Makefile_no (renamed from arch/m68knommu/lib/Makefile)0
-rw-r--r--arch/m68k/lib/checksum.c430
-rw-r--r--arch/m68k/lib/checksum_mm.c425
-rw-r--r--arch/m68k/lib/checksum_no.c (renamed from arch/m68knommu/lib/checksum.c)0
-rw-r--r--arch/m68k/lib/delay.c (renamed from arch/m68knommu/lib/delay.c)0
-rw-r--r--arch/m68k/lib/divsi3.S (renamed from arch/m68knommu/lib/divsi3.S)0
-rw-r--r--arch/m68k/lib/memcpy.c (renamed from arch/m68knommu/lib/memcpy.c)0
-rw-r--r--arch/m68k/lib/memmove.c (renamed from arch/m68knommu/lib/memmove.c)0
-rw-r--r--arch/m68k/lib/memset.c (renamed from arch/m68knommu/lib/memset.c)0
-rw-r--r--arch/m68k/lib/modsi3.S (renamed from arch/m68knommu/lib/modsi3.S)0
-rw-r--r--arch/m68k/lib/muldi3.c68
-rw-r--r--arch/m68k/lib/muldi3_mm.c (renamed from arch/m68knommu/lib/ashrdi3.c)48
-rw-r--r--arch/m68k/lib/muldi3_no.c (renamed from arch/m68knommu/lib/muldi3.c)0
-rw-r--r--arch/m68k/lib/mulsi3.S (renamed from arch/m68knommu/lib/mulsi3.S)0
-rw-r--r--arch/m68k/lib/udivsi3.S (renamed from arch/m68knommu/lib/udivsi3.S)0
-rw-r--r--arch/m68k/lib/umodsi3.S (renamed from arch/m68knommu/lib/umodsi3.S)0
-rw-r--r--arch/m68k/mm/Makefile13
-rw-r--r--arch/m68k/mm/Makefile_mm8
-rw-r--r--arch/m68k/mm/Makefile_no (renamed from arch/m68knommu/mm/Makefile)0
-rw-r--r--arch/m68k/mm/init.c153
-rw-r--r--arch/m68k/mm/init_mm.c150
-rw-r--r--arch/m68k/mm/init_no.c (renamed from arch/m68knommu/mm/init.c)0
-rw-r--r--arch/m68k/mm/kmap.c368
-rw-r--r--arch/m68k/mm/kmap_mm.c367
-rw-r--r--arch/m68k/mm/kmap_no.c (renamed from arch/m68knommu/mm/kmap.c)0
-rw-r--r--arch/m68k/platform/5206/Makefile (renamed from arch/m68knommu/platform/5206/Makefile)0
-rw-r--r--arch/m68k/platform/5206/config.c (renamed from arch/m68knommu/platform/5206/config.c)0
-rw-r--r--arch/m68k/platform/5206/gpio.c (renamed from arch/m68knommu/platform/5206/gpio.c)0
-rw-r--r--arch/m68k/platform/5206e/Makefile (renamed from arch/m68knommu/platform/5206e/Makefile)0
-rw-r--r--arch/m68k/platform/5206e/config.c (renamed from arch/m68knommu/platform/5206e/config.c)0
-rw-r--r--arch/m68k/platform/5206e/gpio.c (renamed from arch/m68knommu/platform/5206e/gpio.c)0
-rw-r--r--arch/m68k/platform/520x/Makefile (renamed from arch/m68knommu/platform/520x/Makefile)0
-rw-r--r--arch/m68k/platform/520x/config.c (renamed from arch/m68knommu/platform/520x/config.c)0
-rw-r--r--arch/m68k/platform/520x/gpio.c (renamed from arch/m68knommu/platform/520x/gpio.c)0
-rw-r--r--arch/m68k/platform/523x/Makefile (renamed from arch/m68knommu/platform/523x/Makefile)0
-rw-r--r--arch/m68k/platform/523x/config.c (renamed from arch/m68knommu/platform/523x/config.c)0
-rw-r--r--arch/m68k/platform/523x/gpio.c (renamed from arch/m68knommu/platform/523x/gpio.c)0
-rw-r--r--arch/m68k/platform/5249/Makefile (renamed from arch/m68knommu/platform/5249/Makefile)0
-rw-r--r--arch/m68k/platform/5249/config.c (renamed from arch/m68knommu/platform/5249/config.c)0
-rw-r--r--arch/m68k/platform/5249/gpio.c (renamed from arch/m68knommu/platform/5249/gpio.c)0
-rw-r--r--arch/m68k/platform/5249/intc2.c (renamed from arch/m68knommu/platform/5249/intc2.c)0
-rw-r--r--arch/m68k/platform/5272/Makefile (renamed from arch/m68knommu/platform/5272/Makefile)0
-rw-r--r--arch/m68k/platform/5272/config.c (renamed from arch/m68knommu/platform/5272/config.c)0
-rw-r--r--arch/m68k/platform/5272/gpio.c (renamed from arch/m68knommu/platform/5272/gpio.c)0
-rw-r--r--arch/m68k/platform/5272/intc.c (renamed from arch/m68knommu/platform/5272/intc.c)0
-rw-r--r--arch/m68k/platform/527x/Makefile (renamed from arch/m68knommu/platform/527x/Makefile)0
-rw-r--r--arch/m68k/platform/527x/config.c (renamed from arch/m68knommu/platform/527x/config.c)0
-rw-r--r--arch/m68k/platform/527x/gpio.c (renamed from arch/m68knommu/platform/527x/gpio.c)0
-rw-r--r--arch/m68k/platform/528x/Makefile (renamed from arch/m68knommu/platform/528x/Makefile)0
-rw-r--r--arch/m68k/platform/528x/config.c (renamed from arch/m68knommu/platform/528x/config.c)0
-rw-r--r--arch/m68k/platform/528x/gpio.c (renamed from arch/m68knommu/platform/528x/gpio.c)0
-rw-r--r--arch/m68k/platform/5307/Makefile (renamed from arch/m68knommu/platform/5307/Makefile)0
-rw-r--r--arch/m68k/platform/5307/config.c (renamed from arch/m68knommu/platform/5307/config.c)0
-rw-r--r--arch/m68k/platform/5307/gpio.c (renamed from arch/m68knommu/platform/5307/gpio.c)0
-rw-r--r--arch/m68k/platform/5307/nettel.c (renamed from arch/m68knommu/platform/5307/nettel.c)0
-rw-r--r--arch/m68k/platform/532x/Makefile (renamed from arch/m68knommu/platform/532x/Makefile)0
-rw-r--r--arch/m68k/platform/532x/config.c (renamed from arch/m68knommu/platform/532x/config.c)0
-rw-r--r--arch/m68k/platform/532x/gpio.c (renamed from arch/m68knommu/platform/532x/gpio.c)0
-rw-r--r--arch/m68k/platform/5407/Makefile (renamed from arch/m68knommu/platform/5407/Makefile)0
-rw-r--r--arch/m68k/platform/5407/config.c (renamed from arch/m68knommu/platform/5407/config.c)0
-rw-r--r--arch/m68k/platform/5407/gpio.c (renamed from arch/m68knommu/platform/5407/gpio.c)0
-rw-r--r--arch/m68k/platform/54xx/Makefile (renamed from arch/m68knommu/platform/54xx/Makefile)0
-rw-r--r--arch/m68k/platform/54xx/config.c (renamed from arch/m68knommu/platform/54xx/config.c)0
-rw-r--r--arch/m68k/platform/54xx/firebee.c (renamed from arch/m68knommu/platform/54xx/firebee.c)0
-rw-r--r--arch/m68k/platform/68328/Makefile (renamed from arch/m68knommu/platform/68328/Makefile)0
-rw-r--r--arch/m68k/platform/68328/bootlogo.h (renamed from arch/m68knommu/platform/68328/bootlogo.h)0
-rw-r--r--arch/m68k/platform/68328/bootlogo.pl (renamed from arch/m68knommu/platform/68328/bootlogo.pl)0
-rw-r--r--arch/m68k/platform/68328/config.c (renamed from arch/m68knommu/platform/68328/config.c)0
-rw-r--r--arch/m68k/platform/68328/entry.S (renamed from arch/m68knommu/platform/68328/entry.S)0
-rw-r--r--arch/m68k/platform/68328/head-de2.S (renamed from arch/m68knommu/platform/68328/head-de2.S)0
-rw-r--r--arch/m68k/platform/68328/head-pilot.S (renamed from arch/m68knommu/platform/68328/head-pilot.S)0
-rw-r--r--arch/m68k/platform/68328/head-ram.S (renamed from arch/m68knommu/platform/68328/head-ram.S)0
-rw-r--r--arch/m68k/platform/68328/head-rom.S (renamed from arch/m68knommu/platform/68328/head-rom.S)0
-rw-r--r--arch/m68k/platform/68328/ints.c (renamed from arch/m68knommu/platform/68328/ints.c)0
-rw-r--r--arch/m68k/platform/68328/romvec.S (renamed from arch/m68knommu/platform/68328/romvec.S)0
-rw-r--r--arch/m68k/platform/68328/timers.c (renamed from arch/m68knommu/platform/68328/timers.c)0
-rw-r--r--arch/m68k/platform/68360/Makefile (renamed from arch/m68knommu/platform/68360/Makefile)0
-rw-r--r--arch/m68k/platform/68360/commproc.c (renamed from arch/m68knommu/platform/68360/commproc.c)0
-rw-r--r--arch/m68k/platform/68360/config.c (renamed from arch/m68knommu/platform/68360/config.c)0
-rw-r--r--arch/m68k/platform/68360/entry.S (renamed from arch/m68knommu/platform/68360/entry.S)0
-rw-r--r--arch/m68k/platform/68360/head-ram.S (renamed from arch/m68knommu/platform/68360/head-ram.S)0
-rw-r--r--arch/m68k/platform/68360/head-rom.S (renamed from arch/m68knommu/platform/68360/head-rom.S)0
-rw-r--r--arch/m68k/platform/68360/ints.c (renamed from arch/m68knommu/platform/68360/ints.c)0
-rw-r--r--arch/m68k/platform/68EZ328/Makefile (renamed from arch/m68knommu/platform/68EZ328/Makefile)0
-rw-r--r--arch/m68k/platform/68EZ328/bootlogo.h (renamed from arch/m68knommu/platform/68EZ328/bootlogo.h)0
-rw-r--r--arch/m68k/platform/68EZ328/config.c (renamed from arch/m68knommu/platform/68EZ328/config.c)0
-rw-r--r--arch/m68k/platform/68VZ328/Makefile (renamed from arch/m68knommu/platform/68VZ328/Makefile)0
-rw-r--r--arch/m68k/platform/68VZ328/config.c (renamed from arch/m68knommu/platform/68VZ328/config.c)0
-rw-r--r--arch/m68k/platform/Makefile (renamed from arch/m68knommu/platform/Makefile)0
-rw-r--r--arch/m68k/platform/coldfire/Makefile (renamed from arch/m68knommu/platform/coldfire/Makefile)0
-rw-r--r--arch/m68k/platform/coldfire/cache.c (renamed from arch/m68knommu/platform/coldfire/cache.c)0
-rw-r--r--arch/m68k/platform/coldfire/clk.c (renamed from arch/m68knommu/platform/coldfire/clk.c)0
-rw-r--r--arch/m68k/platform/coldfire/dma.c (renamed from arch/m68knommu/platform/coldfire/dma.c)0
-rw-r--r--arch/m68k/platform/coldfire/dma_timer.c (renamed from arch/m68knommu/platform/coldfire/dma_timer.c)0
-rw-r--r--arch/m68k/platform/coldfire/entry.S (renamed from arch/m68knommu/platform/coldfire/entry.S)0
-rw-r--r--arch/m68k/platform/coldfire/gpio.c (renamed from arch/m68knommu/platform/coldfire/gpio.c)0
-rw-r--r--arch/m68k/platform/coldfire/head.S (renamed from arch/m68knommu/platform/coldfire/head.S)0
-rw-r--r--arch/m68k/platform/coldfire/intc-2.c (renamed from arch/m68knommu/platform/coldfire/intc-2.c)0
-rw-r--r--arch/m68k/platform/coldfire/intc-simr.c (renamed from arch/m68knommu/platform/coldfire/intc-simr.c)0
-rw-r--r--arch/m68k/platform/coldfire/intc.c (renamed from arch/m68knommu/platform/coldfire/intc.c)0
-rw-r--r--arch/m68k/platform/coldfire/pinmux.c (renamed from arch/m68knommu/platform/coldfire/pinmux.c)0
-rw-r--r--arch/m68k/platform/coldfire/pit.c (renamed from arch/m68knommu/platform/coldfire/pit.c)0
-rw-r--r--arch/m68k/platform/coldfire/sltimers.c (renamed from arch/m68knommu/platform/coldfire/sltimers.c)0
-rw-r--r--arch/m68k/platform/coldfire/timers.c (renamed from arch/m68knommu/platform/coldfire/timers.c)0
-rw-r--r--arch/m68k/platform/coldfire/vectors.c (renamed from arch/m68knommu/platform/coldfire/vectors.c)0
-rw-r--r--arch/m68knommu/Kconfig.debug35
-rw-r--r--arch/m68knommu/defconfig74
-rw-r--r--arch/m68knommu/kernel/.gitignore1
-rw-r--r--arch/m68knommu/lib/ashldi3.c62
-rw-r--r--arch/m68knommu/lib/lshrdi3.c62
-rw-r--r--arch/microblaze/Kconfig3
-rw-r--r--arch/mips/Kconfig18
-rw-r--r--arch/mips/alchemy/common/irq.c98
-rw-r--r--arch/mips/alchemy/devboards/bcsr.c18
-rw-r--r--arch/mips/ar7/irq.c42
-rw-r--r--arch/mips/ath79/irq.c24
-rw-r--r--arch/mips/bcm63xx/irq.c77
-rw-r--r--arch/mips/dec/ioasic-irq.c60
-rw-r--r--arch/mips/dec/kn02-irq.c23
-rw-r--r--arch/mips/emma/markeins/irq.c67
-rw-r--r--arch/mips/include/asm/bitops.h3
-rw-r--r--arch/mips/include/asm/irq.h64
-rw-r--r--arch/mips/include/asm/pmc-sierra/msp71xx/cpu-feature-overrides.h21
-rw-r--r--arch/mips/include/asm/pmc-sierra/msp71xx/msp_gpio_macros.h343
-rw-r--r--arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h17
-rw-r--r--arch/mips/include/asm/pmc-sierra/msp71xx/msp_usb.h144
-rw-r--r--arch/mips/include/asm/spinlock.h22
-rw-r--r--arch/mips/include/asm/types.h2
-rw-r--r--arch/mips/include/asm/unistd.h24
-rw-r--r--arch/mips/jazz/irq.c14
-rw-r--r--arch/mips/jz4740/board-qi_lb60.c32
-rw-r--r--arch/mips/jz4740/gpio.c111
-rw-r--r--arch/mips/jz4740/irq.c32
-rw-r--r--arch/mips/kernel/i8259.c37
-rw-r--r--arch/mips/kernel/irq-gic.c43
-rw-r--r--arch/mips/kernel/irq-gt641xx.c26
-rw-r--r--arch/mips/kernel/irq-msc01.c51
-rw-r--r--arch/mips/kernel/irq-rm7000.c18
-rw-r--r--arch/mips/kernel/irq-rm9000.c49
-rw-r--r--arch/mips/kernel/irq.c49
-rw-r--r--arch/mips/kernel/irq_cpu.c46
-rw-r--r--arch/mips/kernel/irq_txx9.c28
-rw-r--r--arch/mips/kernel/scall32-o32.S4
-rw-r--r--arch/mips/kernel/scall64-64.S4
-rw-r--r--arch/mips/kernel/scall64-n32.S4
-rw-r--r--arch/mips/kernel/scall64-o32.S4
-rw-r--r--arch/mips/kernel/smtc.c13
-rw-r--r--arch/mips/lasat/interrupt.c16
-rw-r--r--arch/mips/loongson/common/bonito-irq.c16
-rw-r--r--arch/mips/mipssim/sim_smtc.c3
-rw-r--r--arch/mips/mti-malta/malta-smtc.c10
-rw-r--r--arch/mips/pmc-sierra/Kconfig15
-rw-r--r--arch/mips/pmc-sierra/msp71xx/Makefile8
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_eth.c187
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_irq.c56
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c239
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_irq_per.c135
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c18
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_setup.c10
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_smp.c77
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_smtc.c105
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_time.c16
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_usb.c239
-rw-r--r--arch/mips/pnx833x/common/interrupts.c98
-rw-r--r--arch/mips/pnx8550/common/int.c18
-rw-r--r--arch/mips/powertv/asic/irq_asic.c13
-rw-r--r--arch/mips/rb532/irq.c32
-rw-r--r--arch/mips/sgi-ip22/ip22-int.c60
-rw-r--r--arch/mips/sgi-ip27/ip27-irq.c38
-rw-r--r--arch/mips/sgi-ip27/ip27-timer.c11
-rw-r--r--arch/mips/sgi-ip32/ip32-irq.c134
-rw-r--r--arch/mips/sibyte/bcm1480/irq.c55
-rw-r--r--arch/mips/sibyte/sb1250/irq.c53
-rw-r--r--arch/mips/sni/a20r.c23
-rw-r--r--arch/mips/sni/pcimt.c21
-rw-r--r--arch/mips/sni/pcit.c21
-rw-r--r--arch/mips/sni/rm200.c42
-rw-r--r--arch/mips/txx9/generic/irq_tx4939.c28
-rw-r--r--arch/mips/txx9/jmr3927/irq.c14
-rw-r--r--arch/mips/txx9/rbtx4927/irq.c58
-rw-r--r--arch/mips/txx9/rbtx4938/irq.c54
-rw-r--r--arch/mips/txx9/rbtx4939/irq.c14
-rw-r--r--arch/mips/vr41xx/common/icu.c72
-rw-r--r--arch/mips/vr41xx/common/irq.c19
-rw-r--r--arch/mn10300/Kconfig10
-rw-r--r--arch/mn10300/Kconfig.debug17
-rw-r--r--arch/mn10300/include/asm/bitops.h3
-rw-r--r--arch/mn10300/include/asm/debugger.h43
-rw-r--r--arch/mn10300/include/asm/div64.h21
-rw-r--r--arch/mn10300/include/asm/fpu.h2
-rw-r--r--arch/mn10300/include/asm/irqflags.h2
-rw-r--r--arch/mn10300/include/asm/kgdb.h81
-rw-r--r--arch/mn10300/include/asm/smp.h6
-rw-r--r--arch/mn10300/include/asm/thread_info.h4
-rw-r--r--arch/mn10300/kernel/Makefile5
-rw-r--r--arch/mn10300/kernel/entry.S67
-rw-r--r--arch/mn10300/kernel/fpu.c18
-rw-r--r--arch/mn10300/kernel/gdb-cache.S105
-rw-r--r--arch/mn10300/kernel/gdb-io-ttysm.c8
-rw-r--r--arch/mn10300/kernel/gdb-stub.c41
-rw-r--r--arch/mn10300/kernel/internal.h7
-rw-r--r--arch/mn10300/kernel/irq.c2
-rw-r--r--arch/mn10300/kernel/kgdb.c502
-rw-r--r--arch/mn10300/kernel/mn10300-serial.c75
-rw-r--r--arch/mn10300/kernel/process.c6
-rw-r--r--arch/mn10300/kernel/smp.c26
-rw-r--r--arch/mn10300/kernel/switch_to.S111
-rw-r--r--arch/mn10300/kernel/traps.c406
-rw-r--r--arch/mn10300/mm/Kconfig.cache46
-rw-r--r--arch/mn10300/mm/Makefile9
-rw-r--r--arch/mn10300/mm/cache-dbg-flush-by-reg.S160
-rw-r--r--arch/mn10300/mm/cache-dbg-flush-by-tag.S114
-rw-r--r--arch/mn10300/mm/cache-dbg-inv-by-reg.S69
-rw-r--r--arch/mn10300/mm/cache-dbg-inv-by-tag.S120
-rw-r--r--arch/mn10300/mm/cache-dbg-inv.S47
-rw-r--r--arch/mn10300/mm/cache-flush-by-tag.S13
-rw-r--r--arch/mn10300/mm/cache-inv-by-reg.S22
-rw-r--r--arch/mn10300/mm/cache-inv-by-tag.S86
-rw-r--r--arch/mn10300/mm/cache.inc133
-rw-r--r--arch/mn10300/mm/fault.c9
-rw-r--r--arch/mn10300/proc-mn103e010/include/proc/cache.h1
-rw-r--r--arch/mn10300/proc-mn2ws0050/include/proc/cache.h1
-rw-r--r--arch/parisc/Kconfig4
-rw-r--r--arch/parisc/include/asm/bitops.h4
-rw-r--r--arch/parisc/include/asm/types.h13
-rw-r--r--arch/parisc/mm/init.c2
-rw-r--r--arch/powerpc/Kconfig14
-rw-r--r--arch/powerpc/include/asm/bitops.h82
-rw-r--r--arch/powerpc/include/asm/types.h2
-rw-r--r--arch/powerpc/kernel/cpu_setup_fsl_booke.S2
-rw-r--r--arch/powerpc/kernel/crash_dump.c17
-rw-r--r--arch/powerpc/kernel/vdso.c6
-rw-r--r--arch/powerpc/sysdev/Makefile2
-rw-r--r--arch/powerpc/sysdev/fsl_rio.c96
-rw-r--r--arch/powerpc/xmon/xmon.c2
-rw-r--r--arch/s390/include/asm/bitops.h65
-rw-r--r--arch/s390/include/asm/ccwdev.h4
-rw-r--r--arch/s390/include/asm/ccwgroup.h4
-rw-r--r--arch/s390/include/asm/cmpxchg.h225
-rw-r--r--arch/s390/include/asm/system.h196
-rw-r--r--arch/s390/include/asm/types.h2
-rw-r--r--arch/s390/include/asm/unistd.h6
-rw-r--r--arch/s390/kernel/compat_wrapper.S27
-rw-r--r--arch/s390/kernel/early.c22
-rw-r--r--arch/s390/kernel/setup.c88
-rw-r--r--arch/s390/kernel/syscalls.S4
-rw-r--r--arch/s390/kernel/vdso.c6
-rw-r--r--arch/s390/oprofile/Makefile3
-rw-r--r--arch/s390/oprofile/init.c15
-rw-r--r--arch/sh/Kconfig6
-rw-r--r--arch/sh/boards/board-edosk7760.c2
-rw-r--r--arch/sh/boot/romimage/mmcif-sh7724.c9
-rw-r--r--arch/sh/include/asm/bitops.h3
-rw-r--r--arch/sh/include/asm/sizes.h63
-rw-r--r--arch/sh/include/asm/unistd_32.h3
-rw-r--r--arch/sh/include/asm/unistd_64.h3
-rw-r--r--arch/sh/kernel/crash_dump.c22
-rw-r--r--arch/sh/kernel/process.c4
-rw-r--r--arch/sh/kernel/ptrace_32.c8
-rw-r--r--arch/sh/kernel/ptrace_64.c6
-rw-r--r--arch/sh/kernel/syscalls_32.S1
-rw-r--r--arch/sh/kernel/syscalls_64.S1
-rw-r--r--arch/sh/kernel/vsyscall/vsyscall.c6
-rw-r--r--arch/sh/mm/pmb.c43
-rw-r--r--arch/sparc/Kconfig4
-rw-r--r--arch/sparc/include/asm/bitops_32.h3
-rw-r--r--arch/sparc/include/asm/bitops_64.h4
-rw-r--r--arch/sparc/include/asm/types.h18
-rw-r--r--arch/sparc/kernel/time_32.c4
-rw-r--r--arch/sparc/mm/init_32.c2
-rw-r--r--arch/tile/include/asm/bitops.h3
-rw-r--r--arch/tile/mm/pgtable.c2
-rw-r--r--arch/um/Kconfig.common1
-rw-r--r--arch/um/kernel/irq.c53
-rw-r--r--arch/unicore32/mm/init.c2
-rw-r--r--arch/x86/Kconfig11
-rw-r--r--arch/x86/ia32/ia32_aout.c1
-rw-r--r--arch/x86/include/asm/acpi.h5
-rw-r--r--arch/x86/include/asm/bitops.h4
-rw-r--r--arch/x86/include/asm/mmu.h6
-rw-r--r--arch/x86/include/asm/types.h8
-rw-r--r--arch/x86/kernel/acpi/sleep.c12
-rw-r--r--arch/x86/kernel/acpi/sleep.h2
-rw-r--r--arch/x86/kernel/amd_iommu_init.c26
-rw-r--r--arch/x86/kernel/apic/apic.c33
-rw-r--r--arch/x86/kernel/apic/io_apic.c97
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce-apei.c42
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce.c21
-rw-r--r--arch/x86/kernel/cpu/mtrr/main.c10
-rw-r--r--arch/x86/kernel/cpu/perf_event.c11
-rw-r--r--arch/x86/kernel/cpu/perf_event_p4.c1
-rw-r--r--arch/x86/kernel/crash_dump_32.c3
-rw-r--r--arch/x86/kernel/crash_dump_64.c3
-rw-r--r--arch/x86/kernel/devicetree.c6
-rw-r--r--arch/x86/kernel/dumpstack.c2
-rw-r--r--arch/x86/kernel/e820.c1
-rw-r--r--arch/x86/kernel/i8237.c30
-rw-r--r--arch/x86/kernel/i8259.c33
-rw-r--r--arch/x86/kernel/kgdb.c4
-rw-r--r--arch/x86/kernel/microcode_core.c34
-rw-r--r--arch/x86/kernel/mpparse.c8
-rw-r--r--arch/x86/kernel/pci-gart_64.c32
-rw-r--r--arch/x86/kernel/process_64.c8
-rw-r--r--arch/x86/kernel/setup.c22
-rw-r--r--arch/x86/mm/init_64.c16
-rw-r--r--arch/x86/oprofile/nmi_int.c44
-rw-r--r--arch/x86/platform/olpc/olpc-xo1.c42
-rw-r--r--arch/x86/vdso/vdso32-setup.c15
-rw-r--r--arch/xtensa/Kconfig7
-rw-r--r--arch/xtensa/include/asm/bitops.h3
-rw-r--r--arch/xtensa/kernel/irq.c106
-rw-r--r--arch/xtensa/platforms/s6105/device.c2
-rw-r--r--arch/xtensa/variants/s6000/gpio.c45
595 files changed, 15443 insertions, 14513 deletions
diff --git a/arch/alpha/include/asm/bitops.h b/arch/alpha/include/asm/bitops.h
index adfab8a21dfe..85b815215776 100644
--- a/arch/alpha/include/asm/bitops.h
+++ b/arch/alpha/include/asm/bitops.h
@@ -454,13 +454,11 @@ sched_find_first_bit(const unsigned long b[2])
454 return __ffs(tmp) + ofs; 454 return __ffs(tmp) + ofs;
455} 455}
456 456
457#include <asm-generic/bitops/ext2-non-atomic.h> 457#include <asm-generic/bitops/le.h>
458 458
459#define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a) 459#define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a)
460#define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a) 460#define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a)
461 461
462#include <asm-generic/bitops/minix.h>
463
464#endif /* __KERNEL__ */ 462#endif /* __KERNEL__ */
465 463
466#endif /* _ALPHA_BITOPS_H */ 464#endif /* _ALPHA_BITOPS_H */
diff --git a/arch/alpha/include/asm/types.h b/arch/alpha/include/asm/types.h
index e46e50382d28..881544339c21 100644
--- a/arch/alpha/include/asm/types.h
+++ b/arch/alpha/include/asm/types.h
@@ -20,15 +20,4 @@
20typedef unsigned int umode_t; 20typedef unsigned int umode_t;
21 21
22#endif /* __ASSEMBLY__ */ 22#endif /* __ASSEMBLY__ */
23
24/*
25 * These aren't exported outside the kernel to avoid name space clashes
26 */
27#ifdef __KERNEL__
28#ifndef __ASSEMBLY__
29
30typedef u64 dma64_addr_t;
31
32#endif /* __ASSEMBLY__ */
33#endif /* __KERNEL__ */
34#endif /* _ALPHA_TYPES_H */ 23#endif /* _ALPHA_TYPES_H */
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f4027abac8aa..4f8f3a4e4e0d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -235,6 +235,7 @@ config ARCH_INTEGRATOR
235 select ICST 235 select ICST
236 select GENERIC_CLOCKEVENTS 236 select GENERIC_CLOCKEVENTS
237 select PLAT_VERSATILE 237 select PLAT_VERSATILE
238 select PLAT_VERSATILE_FPGA_IRQ
238 help 239 help
239 Support for ARM's Integrator platform. 240 Support for ARM's Integrator platform.
240 241
@@ -242,11 +243,11 @@ config ARCH_REALVIEW
242 bool "ARM Ltd. RealView family" 243 bool "ARM Ltd. RealView family"
243 select ARM_AMBA 244 select ARM_AMBA
244 select CLKDEV_LOOKUP 245 select CLKDEV_LOOKUP
245 select HAVE_SCHED_CLOCK
246 select ICST 246 select ICST
247 select GENERIC_CLOCKEVENTS 247 select GENERIC_CLOCKEVENTS
248 select ARCH_WANT_OPTIONAL_GPIOLIB 248 select ARCH_WANT_OPTIONAL_GPIOLIB
249 select PLAT_VERSATILE 249 select PLAT_VERSATILE
250 select PLAT_VERSATILE_CLCD
250 select ARM_TIMER_SP804 251 select ARM_TIMER_SP804
251 select GPIO_PL061 if GPIOLIB 252 select GPIO_PL061 if GPIOLIB
252 help 253 help
@@ -257,11 +258,12 @@ config ARCH_VERSATILE
257 select ARM_AMBA 258 select ARM_AMBA
258 select ARM_VIC 259 select ARM_VIC
259 select CLKDEV_LOOKUP 260 select CLKDEV_LOOKUP
260 select HAVE_SCHED_CLOCK
261 select ICST 261 select ICST
262 select GENERIC_CLOCKEVENTS 262 select GENERIC_CLOCKEVENTS
263 select ARCH_WANT_OPTIONAL_GPIOLIB 263 select ARCH_WANT_OPTIONAL_GPIOLIB
264 select PLAT_VERSATILE 264 select PLAT_VERSATILE
265 select PLAT_VERSATILE_CLCD
266 select PLAT_VERSATILE_FPGA_IRQ
265 select ARM_TIMER_SP804 267 select ARM_TIMER_SP804
266 help 268 help
267 This enables support for ARM Ltd Versatile board. 269 This enables support for ARM Ltd Versatile board.
@@ -274,9 +276,10 @@ config ARCH_VEXPRESS
274 select CLKDEV_LOOKUP 276 select CLKDEV_LOOKUP
275 select GENERIC_CLOCKEVENTS 277 select GENERIC_CLOCKEVENTS
276 select HAVE_CLK 278 select HAVE_CLK
277 select HAVE_SCHED_CLOCK 279 select HAVE_PATA_PLATFORM
278 select ICST 280 select ICST
279 select PLAT_VERSATILE 281 select PLAT_VERSATILE
282 select PLAT_VERSATILE_CLCD
280 help 283 help
281 This enables support for the ARM Ltd Versatile Express boards. 284 This enables support for the ARM Ltd Versatile Express boards.
282 285
@@ -1012,6 +1015,7 @@ source "arch/arm/mach-ux500/Kconfig"
1012source "arch/arm/mach-versatile/Kconfig" 1015source "arch/arm/mach-versatile/Kconfig"
1013 1016
1014source "arch/arm/mach-vexpress/Kconfig" 1017source "arch/arm/mach-vexpress/Kconfig"
1018source "arch/arm/plat-versatile/Kconfig"
1015 1019
1016source "arch/arm/mach-vt8500/Kconfig" 1020source "arch/arm/mach-vt8500/Kconfig"
1017 1021
diff --git a/arch/arm/boot/compressed/mmcif-sh7372.c b/arch/arm/boot/compressed/mmcif-sh7372.c
index e6180af241f6..7453c8337b83 100644
--- a/arch/arm/boot/compressed/mmcif-sh7372.c
+++ b/arch/arm/boot/compressed/mmcif-sh7372.c
@@ -10,7 +10,8 @@
10 */ 10 */
11 11
12#include <linux/mmc/sh_mmcif.h> 12#include <linux/mmc/sh_mmcif.h>
13#include <mach/mmcif.h> 13#include <linux/mmc/boot.h>
14#include <mach/mmc.h>
14 15
15#define MMCIF_BASE (void __iomem *)0xe6bd0000 16#define MMCIF_BASE (void __iomem *)0xe6bd0000
16 17
@@ -41,8 +42,8 @@
41 */ 42 */
42asmlinkage void mmcif_loader(unsigned char *buf, unsigned long len) 43asmlinkage void mmcif_loader(unsigned char *buf, unsigned long len)
43{ 44{
44 mmcif_init_progress(); 45 mmc_init_progress();
45 mmcif_update_progress(MMCIF_PROGRESS_ENTER); 46 mmc_update_progress(MMC_PROGRESS_ENTER);
46 47
47 /* Initialise MMC 48 /* Initialise MMC
48 * registers: PORT84CR-PORT92CR 49 * registers: PORT84CR-PORT92CR
@@ -68,12 +69,12 @@ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long len)
68 /* Enable clock to MMC hardware block */ 69 /* Enable clock to MMC hardware block */
69 __raw_writel(__raw_readl(SMSTPCR3) & ~(1 << 12), SMSTPCR3); 70 __raw_writel(__raw_readl(SMSTPCR3) & ~(1 << 12), SMSTPCR3);
70 71
71 mmcif_update_progress(MMCIF_PROGRESS_INIT); 72 mmc_update_progress(MMC_PROGRESS_INIT);
72 73
73 /* setup MMCIF hardware */ 74 /* setup MMCIF hardware */
74 sh_mmcif_boot_init(MMCIF_BASE); 75 sh_mmcif_boot_init(MMCIF_BASE);
75 76
76 mmcif_update_progress(MMCIF_PROGRESS_LOAD); 77 mmc_update_progress(MMC_PROGRESS_LOAD);
77 78
78 /* load kernel via MMCIF interface */ 79 /* load kernel via MMCIF interface */
79 sh_mmcif_boot_do_read(MMCIF_BASE, 2, /* Kernel is at block 2 */ 80 sh_mmcif_boot_do_read(MMCIF_BASE, 2, /* Kernel is at block 2 */
@@ -83,5 +84,5 @@ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long len)
83 /* Disable clock to MMC hardware block */ 84 /* Disable clock to MMC hardware block */
84 __raw_writel(__raw_readl(SMSTPCR3) & (1 << 12), SMSTPCR3); 85 __raw_writel(__raw_readl(SMSTPCR3) & (1 << 12), SMSTPCR3);
85 86
86 mmcif_update_progress(MMCIF_PROGRESS_DONE); 87 mmc_update_progress(MMC_PROGRESS_DONE);
87} 88}
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 019fb7c67dc3..076db52ff672 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -193,6 +193,17 @@ CONFIG_FIRMWARE_EDID=y
193CONFIG_FB_MODE_HELPERS=y 193CONFIG_FB_MODE_HELPERS=y
194CONFIG_FB_TILEBLITTING=y 194CONFIG_FB_TILEBLITTING=y
195CONFIG_FB_OMAP_LCD_VGA=y 195CONFIG_FB_OMAP_LCD_VGA=y
196CONFIG_OMAP2_DSS=m
197CONFIG_OMAP2_DSS_RFBI=y
198CONFIG_OMAP2_DSS_SDI=y
199CONFIG_OMAP2_DSS_DSI=y
200CONFIG_FB_OMAP2=m
201CONFIG_PANEL_GENERIC_DPI=m
202CONFIG_PANEL_SHARP_LS037V7DW01=m
203CONFIG_PANEL_NEC_NL8048HL11_01B=m
204CONFIG_PANEL_TAAL=m
205CONFIG_PANEL_TPO_TD043MTEA1=m
206CONFIG_PANEL_ACX565AKM=m
196CONFIG_BACKLIGHT_LCD_SUPPORT=y 207CONFIG_BACKLIGHT_LCD_SUPPORT=y
197CONFIG_LCD_CLASS_DEVICE=y 208CONFIG_LCD_CLASS_DEVICE=y
198CONFIG_LCD_PLATFORM=y 209CONFIG_LCD_PLATFORM=y
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig
index 7a9267e5da55..8845f1c9925d 100644
--- a/arch/arm/configs/tegra_defconfig
+++ b/arch/arm/configs/tegra_defconfig
@@ -21,6 +21,10 @@ CONFIG_MODULE_FORCE_UNLOAD=y
21# CONFIG_IOSCHED_CFQ is not set 21# CONFIG_IOSCHED_CFQ is not set
22CONFIG_ARCH_TEGRA=y 22CONFIG_ARCH_TEGRA=y
23CONFIG_MACH_HARMONY=y 23CONFIG_MACH_HARMONY=y
24CONFIG_MACH_KAEN=y
25CONFIG_MACH_PAZ00=y
26CONFIG_MACH_TRIMSLICE=y
27CONFIG_MACH_WARIO=y
24CONFIG_TEGRA_DEBUG_UARTD=y 28CONFIG_TEGRA_DEBUG_UARTD=y
25CONFIG_ARM_ERRATA_742230=y 29CONFIG_ARM_ERRATA_742230=y
26CONFIG_NO_HZ=y 30CONFIG_NO_HZ=y
@@ -40,6 +44,10 @@ CONFIG_PACKET=y
40CONFIG_UNIX=y 44CONFIG_UNIX=y
41CONFIG_NET_KEY=y 45CONFIG_NET_KEY=y
42CONFIG_INET=y 46CONFIG_INET=y
47CONFIG_IP_PNP=y
48CONFIG_IP_PNP_DHCP=y
49CONFIG_IP_PNP_BOOTP=y
50CONFIG_IP_PNP_RARP=y
43CONFIG_INET_ESP=y 51CONFIG_INET_ESP=y
44# CONFIG_INET_XFRM_MODE_TUNNEL is not set 52# CONFIG_INET_XFRM_MODE_TUNNEL is not set
45# CONFIG_INET_XFRM_MODE_BEET is not set 53# CONFIG_INET_XFRM_MODE_BEET is not set
@@ -66,7 +74,7 @@ CONFIG_APDS9802ALS=y
66CONFIG_ISL29003=y 74CONFIG_ISL29003=y
67CONFIG_NETDEVICES=y 75CONFIG_NETDEVICES=y
68CONFIG_DUMMY=y 76CONFIG_DUMMY=y
69# CONFIG_NETDEV_1000 is not set 77CONFIG_R8169=y
70# CONFIG_NETDEV_10000 is not set 78# CONFIG_NETDEV_10000 is not set
71# CONFIG_WLAN is not set 79# CONFIG_WLAN is not set
72# CONFIG_INPUT is not set 80# CONFIG_INPUT is not set
@@ -78,12 +86,23 @@ CONFIG_SERIAL_8250_CONSOLE=y
78# CONFIG_LEGACY_PTYS is not set 86# CONFIG_LEGACY_PTYS is not set
79# CONFIG_HW_RANDOM is not set 87# CONFIG_HW_RANDOM is not set
80CONFIG_I2C=y 88CONFIG_I2C=y
81# CONFIG_HWMON is not set 89# CONFIG_I2C_COMPAT is not set
82# CONFIG_MFD_SUPPORT is not set 90# CONFIG_I2C_HELPER_AUTO is not set
91CONFIG_I2C_TEGRA=y
92CONFIG_SENSORS_LM90=y
93CONFIG_MFD_TPS6586X=y
94CONFIG_REGULATOR=y
95CONFIG_REGULATOR_TPS6586X=y
83# CONFIG_USB_SUPPORT is not set 96# CONFIG_USB_SUPPORT is not set
84CONFIG_MMC=y 97CONFIG_MMC=y
85CONFIG_MMC_SDHCI=y 98CONFIG_MMC_SDHCI=y
86CONFIG_MMC_SDHCI_PLTFM=y 99CONFIG_MMC_SDHCI_PLTFM=y
100CONFIG_MMC_SDHCI_TEGRA=y
101CONFIG_STAGING=y
102# CONFIG_STAGING_EXCLUDE_BUILD is not set
103CONFIG_IIO=y
104CONFIG_SENSORS_ISL29018=y
105CONFIG_SENSORS_AK8975=y
87CONFIG_EXT2_FS=y 106CONFIG_EXT2_FS=y
88CONFIG_EXT2_FS_XATTR=y 107CONFIG_EXT2_FS_XATTR=y
89CONFIG_EXT2_FS_POSIX_ACL=y 108CONFIG_EXT2_FS_POSIX_ACL=y
@@ -95,6 +114,10 @@ CONFIG_EXT3_FS_SECURITY=y
95# CONFIG_DNOTIFY is not set 114# CONFIG_DNOTIFY is not set
96CONFIG_VFAT_FS=y 115CONFIG_VFAT_FS=y
97CONFIG_TMPFS=y 116CONFIG_TMPFS=y
117CONFIG_NFS_FS=y
118CONFIG_ROOT_NFS=y
119CONFIG_PARTITION_ADVANCED=y
120CONFIG_EFI_PARTITION=y
98CONFIG_NLS_CODEPAGE_437=y 121CONFIG_NLS_CODEPAGE_437=y
99CONFIG_NLS_ISO8859_1=y 122CONFIG_NLS_ISO8859_1=y
100CONFIG_PRINTK_TIME=y 123CONFIG_PRINTK_TIME=y
diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h
index af54ed102f5f..6b7403fd8f54 100644
--- a/arch/arm/include/asm/bitops.h
+++ b/arch/arm/include/asm/bitops.h
@@ -287,41 +287,63 @@ static inline int fls(int x)
287#include <asm-generic/bitops/hweight.h> 287#include <asm-generic/bitops/hweight.h>
288#include <asm-generic/bitops/lock.h> 288#include <asm-generic/bitops/lock.h>
289 289
290/* 290static inline void __set_bit_le(int nr, void *addr)
291 * Ext2 is defined to use little-endian byte ordering. 291{
292 * These do not need to be atomic. 292 __set_bit(WORD_BITOFF_TO_LE(nr), addr);
293 */ 293}
294#define ext2_set_bit(nr,p) \ 294
295 __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) 295static inline void __clear_bit_le(int nr, void *addr)
296#define ext2_set_bit_atomic(lock,nr,p) \ 296{
297 test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) 297 __clear_bit(WORD_BITOFF_TO_LE(nr), addr);
298#define ext2_clear_bit(nr,p) \ 298}
299 __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) 299
300#define ext2_clear_bit_atomic(lock,nr,p) \ 300static inline int __test_and_set_bit_le(int nr, void *addr)
301 test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) 301{
302#define ext2_test_bit(nr,p) \ 302 return __test_and_set_bit(WORD_BITOFF_TO_LE(nr), addr);
303 test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) 303}
304#define ext2_find_first_zero_bit(p,sz) \ 304
305 _find_first_zero_bit_le(p,sz) 305static inline int test_and_set_bit_le(int nr, void *addr)
306#define ext2_find_next_zero_bit(p,sz,off) \ 306{
307 _find_next_zero_bit_le(p,sz,off) 307 return test_and_set_bit(WORD_BITOFF_TO_LE(nr), addr);
308#define ext2_find_next_bit(p, sz, off) \ 308}
309 _find_next_bit_le(p, sz, off) 309
310static inline int __test_and_clear_bit_le(int nr, void *addr)
311{
312 return __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), addr);
313}
314
315static inline int test_and_clear_bit_le(int nr, void *addr)
316{
317 return test_and_clear_bit(WORD_BITOFF_TO_LE(nr), addr);
318}
319
320static inline int test_bit_le(int nr, const void *addr)
321{
322 return test_bit(WORD_BITOFF_TO_LE(nr), addr);
323}
324
325static inline int find_first_zero_bit_le(const void *p, unsigned size)
326{
327 return _find_first_zero_bit_le(p, size);
328}
329
330static inline int find_next_zero_bit_le(const void *p, int size, int offset)
331{
332 return _find_next_zero_bit_le(p, size, offset);
333}
334
335static inline int find_next_bit_le(const void *p, int size, int offset)
336{
337 return _find_next_bit_le(p, size, offset);
338}
310 339
311/* 340/*
312 * Minix is defined to use little-endian byte ordering. 341 * Ext2 is defined to use little-endian byte ordering.
313 * These do not need to be atomic.
314 */ 342 */
315#define minix_set_bit(nr,p) \ 343#define ext2_set_bit_atomic(lock, nr, p) \
316 __set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) 344 test_and_set_bit_le(nr, p)
317#define minix_test_bit(nr,p) \ 345#define ext2_clear_bit_atomic(lock, nr, p) \
318 test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) 346 test_and_clear_bit_le(nr, p)
319#define minix_test_and_set_bit(nr,p) \
320 __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
321#define minix_test_and_clear_bit(nr,p) \
322 __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
323#define minix_find_first_zero_bit(p,sz) \
324 _find_first_zero_bit_le(p,sz)
325 347
326#endif /* __KERNEL__ */ 348#endif /* __KERNEL__ */
327 349
diff --git a/arch/arm/include/asm/localtimer.h b/arch/arm/include/asm/localtimer.h
index 6bc63ab498ce..080d74f8128d 100644
--- a/arch/arm/include/asm/localtimer.h
+++ b/arch/arm/include/asm/localtimer.h
@@ -44,8 +44,14 @@ int local_timer_ack(void);
44/* 44/*
45 * Setup a local timer interrupt for a CPU. 45 * Setup a local timer interrupt for a CPU.
46 */ 46 */
47void local_timer_setup(struct clock_event_device *); 47int local_timer_setup(struct clock_event_device *);
48 48
49#else
50
51static inline int local_timer_setup(struct clock_event_device *evt)
52{
53 return -ENXIO;
54}
49#endif 55#endif
50 56
51#endif 57#endif
diff --git a/arch/arm/include/asm/mach/udc_pxa2xx.h b/arch/arm/include/asm/mach/udc_pxa2xx.h
index 833306ee9e7f..ea297ac70bc6 100644
--- a/arch/arm/include/asm/mach/udc_pxa2xx.h
+++ b/arch/arm/include/asm/mach/udc_pxa2xx.h
@@ -20,8 +20,6 @@ struct pxa2xx_udc_mach_info {
20 * VBUS IRQ and omit the methods above. Store the GPIO number 20 * VBUS IRQ and omit the methods above. Store the GPIO number
21 * here. Note that sometimes the signals go through inverters... 21 * here. Note that sometimes the signals go through inverters...
22 */ 22 */
23 bool gpio_vbus_inverted;
24 int gpio_vbus; /* high == vbus present */
25 bool gpio_pullup_inverted; 23 bool gpio_pullup_inverted;
26 int gpio_pullup; /* high == pullup activated */ 24 int gpio_pullup; /* high == pullup activated */
27}; 25};
diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h
index 348d513afa92..d8387437ec5a 100644
--- a/arch/arm/include/asm/outercache.h
+++ b/arch/arm/include/asm/outercache.h
@@ -21,6 +21,8 @@
21#ifndef __ASM_OUTERCACHE_H 21#ifndef __ASM_OUTERCACHE_H
22#define __ASM_OUTERCACHE_H 22#define __ASM_OUTERCACHE_H
23 23
24#include <linux/types.h>
25
24struct outer_cache_fns { 26struct outer_cache_fns {
25 void (*inv_range)(unsigned long, unsigned long); 27 void (*inv_range)(unsigned long, unsigned long);
26 void (*clean_range)(unsigned long, unsigned long); 28 void (*clean_range)(unsigned long, unsigned long);
@@ -38,17 +40,17 @@ struct outer_cache_fns {
38 40
39extern struct outer_cache_fns outer_cache; 41extern struct outer_cache_fns outer_cache;
40 42
41static inline void outer_inv_range(unsigned long start, unsigned long end) 43static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
42{ 44{
43 if (outer_cache.inv_range) 45 if (outer_cache.inv_range)
44 outer_cache.inv_range(start, end); 46 outer_cache.inv_range(start, end);
45} 47}
46static inline void outer_clean_range(unsigned long start, unsigned long end) 48static inline void outer_clean_range(phys_addr_t start, phys_addr_t end)
47{ 49{
48 if (outer_cache.clean_range) 50 if (outer_cache.clean_range)
49 outer_cache.clean_range(start, end); 51 outer_cache.clean_range(start, end);
50} 52}
51static inline void outer_flush_range(unsigned long start, unsigned long end) 53static inline void outer_flush_range(phys_addr_t start, phys_addr_t end)
52{ 54{
53 if (outer_cache.flush_range) 55 if (outer_cache.flush_range)
54 outer_cache.flush_range(start, end); 56 outer_cache.flush_range(start, end);
@@ -74,11 +76,11 @@ static inline void outer_disable(void)
74 76
75#else 77#else
76 78
77static inline void outer_inv_range(unsigned long start, unsigned long end) 79static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
78{ } 80{ }
79static inline void outer_clean_range(unsigned long start, unsigned long end) 81static inline void outer_clean_range(phys_addr_t start, phys_addr_t end)
80{ } 82{ }
81static inline void outer_flush_range(unsigned long start, unsigned long end) 83static inline void outer_flush_range(phys_addr_t start, phys_addr_t end)
82{ } 84{ }
83static inline void outer_flush_all(void) { } 85static inline void outer_flush_all(void) { }
84static inline void outer_inv_all(void) { } 86static inline void outer_inv_all(void) { }
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index ebcb6432f45f..5750704e0271 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -301,6 +301,7 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
301#define pgd_present(pgd) (1) 301#define pgd_present(pgd) (1)
302#define pgd_clear(pgdp) do { } while (0) 302#define pgd_clear(pgdp) do { } while (0)
303#define set_pgd(pgd,pgdp) do { } while (0) 303#define set_pgd(pgd,pgdp) do { } while (0)
304#define set_pud(pud,pudp) do { } while (0)
304 305
305 306
306/* Find an entry in the second-level page table.. */ 307/* Find an entry in the second-level page table.. */
@@ -351,7 +352,7 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd)
351#define pte_unmap(pte) __pte_unmap(pte) 352#define pte_unmap(pte) __pte_unmap(pte)
352 353
353#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT) 354#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)
354#define pfn_pte(pfn,prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) 355#define pfn_pte(pfn,prot) __pte(__pfn_to_phys(pfn) | pgprot_val(prot))
355 356
356#define pte_page(pte) pfn_to_page(pte_pfn(pte)) 357#define pte_page(pte) pfn_to_page(pte_pfn(pte))
357#define mk_pte(page,prot) pfn_pte(page_to_pfn(page), prot) 358#define mk_pte(page,prot) pfn_pte(page_to_pfn(page), prot)
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index da8b52ec49cf..95176af3df8c 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -195,7 +195,7 @@ static struct tagtable __tagtable_##fn __tag = { tag, fn }
195#define NR_BANKS 8 195#define NR_BANKS 8
196 196
197struct membank { 197struct membank {
198 unsigned long start; 198 phys_addr_t start;
199 unsigned long size; 199 unsigned long size;
200 unsigned int highmem; 200 unsigned int highmem;
201}; 201};
diff --git a/arch/arm/include/asm/types.h b/arch/arm/include/asm/types.h
index c684e3769f47..48192ac3a23a 100644
--- a/arch/arm/include/asm/types.h
+++ b/arch/arm/include/asm/types.h
@@ -16,12 +16,6 @@ typedef unsigned short umode_t;
16 16
17#define BITS_PER_LONG 32 17#define BITS_PER_LONG 32
18 18
19#ifndef __ASSEMBLY__
20
21typedef u32 dma64_addr_t;
22
23#endif /* __ASSEMBLY__ */
24
25#endif /* __KERNEL__ */ 19#endif /* __KERNEL__ */
26 20
27#endif 21#endif
diff --git a/arch/arm/kernel/crash_dump.c b/arch/arm/kernel/crash_dump.c
index cd3b853a8a6d..90c50d4b43f7 100644
--- a/arch/arm/kernel/crash_dump.c
+++ b/arch/arm/kernel/crash_dump.c
@@ -18,9 +18,6 @@
18#include <linux/uaccess.h> 18#include <linux/uaccess.h>
19#include <linux/io.h> 19#include <linux/io.h>
20 20
21/* stores the physical address of elf header of crash image */
22unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX;
23
24/** 21/**
25 * copy_oldmem_page() - copy one page from old kernel memory 22 * copy_oldmem_page() - copy one page from old kernel memory
26 * @pfn: page frame number to be copied 23 * @pfn: page frame number to be copied
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 44b84fe6e1b0..8dbc126f7152 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -238,8 +238,8 @@ static int enable_monitor_mode(void)
238 ARM_DBG_READ(c1, 0, dscr); 238 ARM_DBG_READ(c1, 0, dscr);
239 239
240 /* Ensure that halting mode is disabled. */ 240 /* Ensure that halting mode is disabled. */
241 if (WARN_ONCE(dscr & ARM_DSCR_HDBGEN, "halting debug mode enabled." 241 if (WARN_ONCE(dscr & ARM_DSCR_HDBGEN,
242 "Unable to access hardware resources.")) { 242 "halting debug mode enabled. Unable to access hardware resources.\n")) {
243 ret = -EPERM; 243 ret = -EPERM;
244 goto out; 244 goto out;
245 } 245 }
@@ -377,7 +377,7 @@ int arch_install_hw_breakpoint(struct perf_event *bp)
377 } 377 }
378 } 378 }
379 379
380 if (WARN_ONCE(i == max_slots, "Can't find any breakpoint slot")) { 380 if (WARN_ONCE(i == max_slots, "Can't find any breakpoint slot\n")) {
381 ret = -EBUSY; 381 ret = -EBUSY;
382 goto out; 382 goto out;
383 } 383 }
@@ -423,7 +423,7 @@ void arch_uninstall_hw_breakpoint(struct perf_event *bp)
423 } 423 }
424 } 424 }
425 425
426 if (WARN_ONCE(i == max_slots, "Can't find any breakpoint slot")) 426 if (WARN_ONCE(i == max_slots, "Can't find any breakpoint slot\n"))
427 return; 427 return;
428 428
429 /* Reset the control register. */ 429 /* Reset the control register. */
@@ -635,7 +635,7 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
635 if (WARN_ONCE(!bp->overflow_handler && 635 if (WARN_ONCE(!bp->overflow_handler &&
636 (arch_check_bp_in_kernelspace(bp) || !core_has_mismatch_brps() 636 (arch_check_bp_in_kernelspace(bp) || !core_has_mismatch_brps()
637 || !bp->hw.bp_target), 637 || !bp->hw.bp_target),
638 "overflow handler required but none found")) { 638 "overflow handler required but none found\n")) {
639 ret = -EINVAL; 639 ret = -EINVAL;
640 } 640 }
641out: 641out:
@@ -936,8 +936,8 @@ static int __init arch_hw_breakpoint_init(void)
936 ARM_DBG_READ(c1, 0, dscr); 936 ARM_DBG_READ(c1, 0, dscr);
937 if (dscr & ARM_DSCR_HDBGEN) { 937 if (dscr & ARM_DSCR_HDBGEN) {
938 max_watchpoint_len = 4; 938 max_watchpoint_len = 4;
939 pr_warning("halting debug mode enabled. Assuming maximum " 939 pr_warning("halting debug mode enabled. Assuming maximum watchpoint size of %u bytes.\n",
940 "watchpoint size of %u bytes.", max_watchpoint_len); 940 max_watchpoint_len);
941 } else { 941 } else {
942 /* Work out the maximum supported watchpoint length. */ 942 /* Work out the maximum supported watchpoint length. */
943 max_watchpoint_len = get_max_wp_len(); 943 max_watchpoint_len = get_max_wp_len();
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index d1da92174277..006c1e884eaf 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -466,13 +466,13 @@ static struct machine_desc * __init setup_machine(unsigned int nr)
466 /* can't use cpu_relax() here as it may require MMU setup */; 466 /* can't use cpu_relax() here as it may require MMU setup */;
467} 467}
468 468
469static int __init arm_add_memory(unsigned long start, unsigned long size) 469static int __init arm_add_memory(phys_addr_t start, unsigned long size)
470{ 470{
471 struct membank *bank = &meminfo.bank[meminfo.nr_banks]; 471 struct membank *bank = &meminfo.bank[meminfo.nr_banks];
472 472
473 if (meminfo.nr_banks >= NR_BANKS) { 473 if (meminfo.nr_banks >= NR_BANKS) {
474 printk(KERN_CRIT "NR_BANKS too low, " 474 printk(KERN_CRIT "NR_BANKS too low, "
475 "ignoring memory at %#lx\n", start); 475 "ignoring memory at 0x%08llx\n", (long long)start);
476 return -EINVAL; 476 return -EINVAL;
477 } 477 }
478 478
@@ -502,7 +502,8 @@ static int __init arm_add_memory(unsigned long start, unsigned long size)
502static int __init early_mem(char *p) 502static int __init early_mem(char *p)
503{ 503{
504 static int usermem __initdata = 0; 504 static int usermem __initdata = 0;
505 unsigned long size, start; 505 unsigned long size;
506 phys_addr_t start;
506 char *endp; 507 char *endp;
507 508
508 /* 509 /*
@@ -788,30 +789,6 @@ static void __init reserve_crashkernel(void)
788static inline void reserve_crashkernel(void) {} 789static inline void reserve_crashkernel(void) {}
789#endif /* CONFIG_KEXEC */ 790#endif /* CONFIG_KEXEC */
790 791
791/*
792 * Note: elfcorehdr_addr is not just limited to vmcore. It is also used by
793 * is_kdump_kernel() to determine if we are booting after a panic. Hence
794 * ifdef it under CONFIG_CRASH_DUMP and not CONFIG_PROC_VMCORE.
795 */
796
797#ifdef CONFIG_CRASH_DUMP
798/*
799 * elfcorehdr= specifies the location of elf core header stored by the crashed
800 * kernel. This option will be passed by kexec loader to the capture kernel.
801 */
802static int __init setup_elfcorehdr(char *arg)
803{
804 char *end;
805
806 if (!arg)
807 return -EINVAL;
808
809 elfcorehdr_addr = memparse(arg, &end);
810 return end > arg ? 0 : -EINVAL;
811}
812early_param("elfcorehdr", setup_elfcorehdr);
813#endif /* CONFIG_CRASH_DUMP */
814
815static void __init squash_mem_tags(struct tag *tag) 792static void __init squash_mem_tags(struct tag *tag)
816{ 793{
817 for (; tag->hdr.size; tag = tag_next(tag)) 794 for (; tag->hdr.size; tag = tag_next(tag))
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 4539ebcb089f..8fe05ad932e4 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -474,13 +474,12 @@ static void smp_timer_broadcast(const struct cpumask *mask)
474#define smp_timer_broadcast NULL 474#define smp_timer_broadcast NULL
475#endif 475#endif
476 476
477#ifndef CONFIG_LOCAL_TIMERS
478static void broadcast_timer_set_mode(enum clock_event_mode mode, 477static void broadcast_timer_set_mode(enum clock_event_mode mode,
479 struct clock_event_device *evt) 478 struct clock_event_device *evt)
480{ 479{
481} 480}
482 481
483static void local_timer_setup(struct clock_event_device *evt) 482static void broadcast_timer_setup(struct clock_event_device *evt)
484{ 483{
485 evt->name = "dummy_timer"; 484 evt->name = "dummy_timer";
486 evt->features = CLOCK_EVT_FEAT_ONESHOT | 485 evt->features = CLOCK_EVT_FEAT_ONESHOT |
@@ -492,7 +491,6 @@ static void local_timer_setup(struct clock_event_device *evt)
492 491
493 clockevents_register_device(evt); 492 clockevents_register_device(evt);
494} 493}
495#endif
496 494
497void __cpuinit percpu_timer_setup(void) 495void __cpuinit percpu_timer_setup(void)
498{ 496{
@@ -502,7 +500,8 @@ void __cpuinit percpu_timer_setup(void)
502 evt->cpumask = cpumask_of(cpu); 500 evt->cpumask = cpumask_of(cpu);
503 evt->broadcast = smp_timer_broadcast; 501 evt->broadcast = smp_timer_broadcast;
504 502
505 local_timer_setup(evt); 503 if (local_timer_setup(evt))
504 broadcast_timer_setup(evt);
506} 505}
507 506
508#ifdef CONFIG_HOTPLUG_CPU 507#ifdef CONFIG_HOTPLUG_CPU
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 21ac43f1c2d0..f0000e188c8c 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -712,17 +712,17 @@ EXPORT_SYMBOL(__readwrite_bug);
712 712
713void __pte_error(const char *file, int line, pte_t pte) 713void __pte_error(const char *file, int line, pte_t pte)
714{ 714{
715 printk("%s:%d: bad pte %08lx.\n", file, line, pte_val(pte)); 715 printk("%s:%d: bad pte %08llx.\n", file, line, (long long)pte_val(pte));
716} 716}
717 717
718void __pmd_error(const char *file, int line, pmd_t pmd) 718void __pmd_error(const char *file, int line, pmd_t pmd)
719{ 719{
720 printk("%s:%d: bad pmd %08lx.\n", file, line, pmd_val(pmd)); 720 printk("%s:%d: bad pmd %08llx.\n", file, line, (long long)pmd_val(pmd));
721} 721}
722 722
723void __pgd_error(const char *file, int line, pgd_t pgd) 723void __pgd_error(const char *file, int line, pgd_t pgd)
724{ 724{
725 printk("%s:%d: bad pgd %08lx.\n", file, line, pgd_val(pgd)); 725 printk("%s:%d: bad pgd %08llx.\n", file, line, (long long)pgd_val(pgd));
726} 726}
727 727
728asmlinkage void __div0(void) 728asmlinkage void __div0(void)
diff --git a/arch/arm/lib/uaccess_with_memcpy.c b/arch/arm/lib/uaccess_with_memcpy.c
index e2d2f2cd0c4f..8b9b13649f81 100644
--- a/arch/arm/lib/uaccess_with_memcpy.c
+++ b/arch/arm/lib/uaccess_with_memcpy.c
@@ -27,13 +27,18 @@ pin_page_for_write(const void __user *_addr, pte_t **ptep, spinlock_t **ptlp)
27 pgd_t *pgd; 27 pgd_t *pgd;
28 pmd_t *pmd; 28 pmd_t *pmd;
29 pte_t *pte; 29 pte_t *pte;
30 pud_t *pud;
30 spinlock_t *ptl; 31 spinlock_t *ptl;
31 32
32 pgd = pgd_offset(current->mm, addr); 33 pgd = pgd_offset(current->mm, addr);
33 if (unlikely(pgd_none(*pgd) || pgd_bad(*pgd))) 34 if (unlikely(pgd_none(*pgd) || pgd_bad(*pgd)))
34 return 0; 35 return 0;
35 36
36 pmd = pmd_offset(pgd, addr); 37 pud = pud_offset(pgd, addr);
38 if (unlikely(pud_none(*pud) || pud_bad(*pud)))
39 return 0;
40
41 pmd = pmd_offset(pud, addr);
37 if (unlikely(pmd_none(*pmd) || pmd_bad(*pmd))) 42 if (unlikely(pmd_none(*pmd) || pmd_bad(*pmd)))
38 return 0; 43 return 0;
39 44
diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c
index a889fa7c3ba1..34e071d79761 100644
--- a/arch/arm/mach-ep93xx/gpio.c
+++ b/arch/arm/mach-ep93xx/gpio.c
@@ -360,52 +360,14 @@ static void ep93xx_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
360 gpio = ep93xx_chip->chip.base; 360 gpio = ep93xx_chip->chip.base;
361 for (i = 0; i < chip->ngpio; i++, gpio++) { 361 for (i = 0; i < chip->ngpio; i++, gpio++) {
362 int is_out = data_dir_reg & (1 << i); 362 int is_out = data_dir_reg & (1 << i);
363 int irq = gpio_to_irq(gpio);
363 364
364 seq_printf(s, " %s%d gpio-%-3d (%-12s) %s %s", 365 seq_printf(s, " %s%d gpio-%-3d (%-12s) %s %s %s\n",
365 chip->label, i, gpio, 366 chip->label, i, gpio,
366 gpiochip_is_requested(chip, i) ? : "", 367 gpiochip_is_requested(chip, i) ? : "",
367 is_out ? "out" : "in ", 368 is_out ? "out" : "in ",
368 (data_reg & (1 << i)) ? "hi" : "lo"); 369 (data_reg & (1<< i)) ? "hi" : "lo",
369 370 (!is_out && irq>= 0) ? "(interrupt)" : "");
370 if (!is_out) {
371 int irq = gpio_to_irq(gpio);
372 struct irq_desc *desc = irq_desc + irq;
373
374 if (irq >= 0 && desc->action) {
375 char *trigger;
376
377 switch (desc->status & IRQ_TYPE_SENSE_MASK) {
378 case IRQ_TYPE_NONE:
379 trigger = "(default)";
380 break;
381 case IRQ_TYPE_EDGE_FALLING:
382 trigger = "edge-falling";
383 break;
384 case IRQ_TYPE_EDGE_RISING:
385 trigger = "edge-rising";
386 break;
387 case IRQ_TYPE_EDGE_BOTH:
388 trigger = "edge-both";
389 break;
390 case IRQ_TYPE_LEVEL_HIGH:
391 trigger = "level-high";
392 break;
393 case IRQ_TYPE_LEVEL_LOW:
394 trigger = "level-low";
395 break;
396 default:
397 trigger = "?trigger?";
398 break;
399 }
400
401 seq_printf(s, " irq-%d %s%s",
402 irq, trigger,
403 (desc->status & IRQ_WAKEUP)
404 ? " wakeup" : "");
405 }
406 }
407
408 seq_printf(s, "\n");
409 } 371 }
410} 372}
411 373
diff --git a/arch/arm/mach-exynos4/localtimer.c b/arch/arm/mach-exynos4/localtimer.c
index 2a2993ae8d86..6bf3d0ab9627 100644
--- a/arch/arm/mach-exynos4/localtimer.c
+++ b/arch/arm/mach-exynos4/localtimer.c
@@ -18,8 +18,9 @@
18/* 18/*
19 * Setup the local clock events for a CPU. 19 * Setup the local clock events for a CPU.
20 */ 20 */
21void __cpuinit local_timer_setup(struct clock_event_device *evt) 21int __cpuinit local_timer_setup(struct clock_event_device *evt)
22{ 22{
23 evt->irq = IRQ_LOCALTIMER; 23 evt->irq = IRQ_LOCALTIMER;
24 twd_timer_setup(evt); 24 twd_timer_setup(evt);
25 return 0;
25} 26}
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index 614b3c00c4a0..6e1accf93f81 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -232,10 +232,13 @@ static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = {
232}; 232};
233 233
234/* MC13783 */ 234/* MC13783 */
235static struct mc13xxx_platform_data mc13783_pdata __initdata = { 235static struct mc13xxx_platform_data mc13783_pdata = {
236 .regulators = mx27_3ds_regulators, 236 .regulators = {
237 .num_regulators = ARRAY_SIZE(mx27_3ds_regulators), 237 .regulators = mx27_3ds_regulators,
238 .flags = MC13XXX_USE_REGULATOR, 238 .num_regulators = ARRAY_SIZE(mx27_3ds_regulators),
239
240 },
241 .flags = MC13783_USE_REGULATOR,
239}; 242};
240 243
241/* SPI */ 244/* SPI */
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
index 38c77084b615..4cbce6d0fef1 100644
--- a/arch/arm/mach-imx/mach-pcm038.c
+++ b/arch/arm/mach-imx/mach-pcm038.c
@@ -263,10 +263,12 @@ static struct mc13xxx_regulator_init_data pcm038_regulators[] = {
263}; 263};
264 264
265static struct mc13xxx_platform_data pcm038_pmic = { 265static struct mc13xxx_platform_data pcm038_pmic = {
266 .regulators = pcm038_regulators, 266 .regulators = {
267 .num_regulators = ARRAY_SIZE(pcm038_regulators), 267 .regulators = pcm038_regulators,
268 .flags = MC13XXX_USE_ADC | MC13XXX_USE_REGULATOR | 268 .num_regulators = ARRAY_SIZE(pcm038_regulators),
269 MC13XXX_USE_TOUCHSCREEN, 269 },
270 .flags = MC13783_USE_ADC | MC13783_USE_REGULATOR |
271 MC13783_USE_TOUCHSCREEN,
270}; 272};
271 273
272static struct spi_board_info pcm038_spi_board_info[] __initdata = { 274static struct spi_board_info pcm038_spi_board_info[] __initdata = {
diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig
index 769b0f10c834..d701d32a07f1 100644
--- a/arch/arm/mach-integrator/Kconfig
+++ b/arch/arm/mach-integrator/Kconfig
@@ -13,6 +13,7 @@ config ARCH_INTEGRATOR_CP
13 bool "Support Integrator/CP platform" 13 bool "Support Integrator/CP platform"
14 select ARCH_CINTEGRATOR 14 select ARCH_CINTEGRATOR
15 select ARM_TIMER_SP804 15 select ARM_TIMER_SP804
16 select PLAT_VERSATILE_CLCD
16 help 17 help
17 Include support for the ARM(R) Integrator CP platform. 18 Include support for the ARM(R) Integrator CP platform.
18 19
diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h
index 5f96e1518aa9..a08f9b0299df 100644
--- a/arch/arm/mach-integrator/common.h
+++ b/arch/arm/mach-integrator/common.h
@@ -1 +1,2 @@
1void integrator_init_early(void);
1void integrator_reserve(void); 2void integrator_reserve(void);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index b8e884b450da..77315b995681 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -144,12 +144,15 @@ static struct clk_lookup lookups[] = {
144 } 144 }
145}; 145};
146 146
147void __init integrator_init_early(void)
148{
149 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
150}
151
147static int __init integrator_init(void) 152static int __init integrator_init(void)
148{ 153{
149 int i; 154 int i;
150 155
151 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
152
153 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { 156 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
154 struct amba_device *d = amba_devs[i]; 157 struct amba_device *d = amba_devs[i];
155 amba_device_register(d, &iomem_resource); 158 amba_device_register(d, &iomem_resource);
diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c
index 5db574f8ae3f..8cbb75a96bd4 100644
--- a/arch/arm/mach-integrator/impd1.c
+++ b/arch/arm/mach-integrator/impd1.c
@@ -121,6 +121,7 @@ static struct clcd_panel vga = {
121 .height = -1, 121 .height = -1,
122 .tim2 = TIM2_BCD | TIM2_IPC, 122 .tim2 = TIM2_BCD | TIM2_IPC,
123 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), 123 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
124 .caps = CLCD_CAP_5551,
124 .connector = IMPD1_CTRL_DISP_VGA, 125 .connector = IMPD1_CTRL_DISP_VGA,
125 .bpp = 16, 126 .bpp = 16,
126 .grayscale = 0, 127 .grayscale = 0,
@@ -149,6 +150,7 @@ static struct clcd_panel svga = {
149 .tim2 = TIM2_BCD, 150 .tim2 = TIM2_BCD,
150 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), 151 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
151 .connector = IMPD1_CTRL_DISP_VGA, 152 .connector = IMPD1_CTRL_DISP_VGA,
153 .caps = CLCD_CAP_5551,
152 .bpp = 16, 154 .bpp = 16,
153 .grayscale = 0, 155 .grayscale = 0,
154}; 156};
@@ -175,6 +177,7 @@ static struct clcd_panel prospector = {
175 .height = -1, 177 .height = -1,
176 .tim2 = TIM2_BCD, 178 .tim2 = TIM2_BCD,
177 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), 179 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
180 .caps = CLCD_CAP_5551,
178 .fixedtimings = 1, 181 .fixedtimings = 1,
179 .connector = IMPD1_CTRL_DISP_LCD, 182 .connector = IMPD1_CTRL_DISP_LCD,
180 .bpp = 16, 183 .bpp = 16,
@@ -206,6 +209,7 @@ static struct clcd_panel ltm10c209 = {
206 .height = -1, 209 .height = -1,
207 .tim2 = TIM2_BCD, 210 .tim2 = TIM2_BCD,
208 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), 211 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
212 .caps = CLCD_CAP_5551,
209 .fixedtimings = 1, 213 .fixedtimings = 1,
210 .connector = IMPD1_CTRL_DISP_LCD, 214 .connector = IMPD1_CTRL_DISP_LCD,
211 .bpp = 16, 215 .bpp = 16,
@@ -279,6 +283,7 @@ static void impd1fb_clcd_remove(struct clcd_fb *fb)
279 283
280static struct clcd_board impd1_clcd_data = { 284static struct clcd_board impd1_clcd_data = {
281 .name = "IM-PD/1", 285 .name = "IM-PD/1",
286 .caps = CLCD_CAP_5551 | CLCD_CAP_888,
282 .check = clcdfb_check, 287 .check = clcdfb_check,
283 .decode = clcdfb_decode, 288 .decode = clcdfb_decode,
284 .disable = impd1fb_clcd_disable, 289 .disable = impd1fb_clcd_disable,
diff --git a/arch/arm/mach-integrator/include/mach/cm.h b/arch/arm/mach-integrator/include/mach/cm.h
index 1ab353e23595..445d57adb043 100644
--- a/arch/arm/mach-integrator/include/mach/cm.h
+++ b/arch/arm/mach-integrator/include/mach/cm.h
@@ -24,9 +24,9 @@ void cm_control(u32, u32);
24#define CM_CTRL_LCDBIASDN (1 << 10) 24#define CM_CTRL_LCDBIASDN (1 << 10)
25#define CM_CTRL_LCDMUXSEL_MASK (7 << 11) 25#define CM_CTRL_LCDMUXSEL_MASK (7 << 11)
26#define CM_CTRL_LCDMUXSEL_GENLCD (1 << 11) 26#define CM_CTRL_LCDMUXSEL_GENLCD (1 << 11)
27#define CM_CTRL_LCDMUXSEL_VGA_16BPP (2 << 11) 27#define CM_CTRL_LCDMUXSEL_VGA565_TFT555 (2 << 11)
28#define CM_CTRL_LCDMUXSEL_SHARPLCD (3 << 11) 28#define CM_CTRL_LCDMUXSEL_SHARPLCD (3 << 11)
29#define CM_CTRL_LCDMUXSEL_VGA_8421BPP (4 << 11) 29#define CM_CTRL_LCDMUXSEL_VGA555_TFT555 (4 << 11)
30#define CM_CTRL_LCDEN0 (1 << 14) 30#define CM_CTRL_LCDEN0 (1 << 14)
31#define CM_CTRL_LCDEN1 (1 << 15) 31#define CM_CTRL_LCDEN1 (1 << 15)
32#define CM_CTRL_STATIC1 (1 << 16) 32#define CM_CTRL_STATIC1 (1 << 16)
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index b666443b5cbb..980803ff348c 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -48,6 +48,8 @@
48#include <asm/mach/map.h> 48#include <asm/mach/map.h>
49#include <asm/mach/time.h> 49#include <asm/mach/time.h>
50 50
51#include <plat/fpga-irq.h>
52
51#include "common.h" 53#include "common.h"
52 54
53/* 55/*
@@ -57,10 +59,10 @@
57 * Setup a VA for the Integrator interrupt controller (for header #0, 59 * Setup a VA for the Integrator interrupt controller (for header #0,
58 * just for now). 60 * just for now).
59 */ 61 */
60#define VA_IC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE) 62#define VA_IC_BASE __io_address(INTEGRATOR_IC_BASE)
61#define VA_SC_BASE IO_ADDRESS(INTEGRATOR_SC_BASE) 63#define VA_SC_BASE __io_address(INTEGRATOR_SC_BASE)
62#define VA_EBI_BASE IO_ADDRESS(INTEGRATOR_EBI_BASE) 64#define VA_EBI_BASE __io_address(INTEGRATOR_EBI_BASE)
63#define VA_CMIC_BASE IO_ADDRESS(INTEGRATOR_HDR_IC) 65#define VA_CMIC_BASE __io_address(INTEGRATOR_HDR_IC)
64 66
65/* 67/*
66 * Logical Physical 68 * Logical Physical
@@ -156,27 +158,14 @@ static void __init ap_map_io(void)
156 158
157#define INTEGRATOR_SC_VALID_INT 0x003fffff 159#define INTEGRATOR_SC_VALID_INT 0x003fffff
158 160
159static void sc_mask_irq(struct irq_data *d) 161static struct fpga_irq_data sc_irq_data = {
160{ 162 .base = VA_IC_BASE,
161 writel(1 << d->irq, VA_IC_BASE + IRQ_ENABLE_CLEAR); 163 .irq_start = 0,
162} 164 .chip.name = "SC",
163
164static void sc_unmask_irq(struct irq_data *d)
165{
166 writel(1 << d->irq, VA_IC_BASE + IRQ_ENABLE_SET);
167}
168
169static struct irq_chip sc_chip = {
170 .name = "SC",
171 .irq_ack = sc_mask_irq,
172 .irq_mask = sc_mask_irq,
173 .irq_unmask = sc_unmask_irq,
174}; 165};
175 166
176static void __init ap_init_irq(void) 167static void __init ap_init_irq(void)
177{ 168{
178 unsigned int i;
179
180 /* Disable all interrupts initially. */ 169 /* Disable all interrupts initially. */
181 /* Do the core module ones */ 170 /* Do the core module ones */
182 writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR); 171 writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
@@ -185,13 +174,7 @@ static void __init ap_init_irq(void)
185 writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR); 174 writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR);
186 writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR); 175 writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);
187 176
188 for (i = 0; i < NR_IRQS; i++) { 177 fpga_irq_init(-1, INTEGRATOR_SC_VALID_INT, &sc_irq_data);
189 if (((1 << i) & INTEGRATOR_SC_VALID_INT) != 0) {
190 set_irq_chip(i, &sc_chip);
191 set_irq_handler(i, handle_level_irq);
192 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
193 }
194 }
195} 178}
196 179
197#ifdef CONFIG_PM 180#ifdef CONFIG_PM
@@ -282,7 +265,7 @@ static void ap_flash_exit(void)
282 265
283static void ap_flash_set_vpp(int on) 266static void ap_flash_set_vpp(int on)
284{ 267{
285 unsigned long reg = on ? SC_CTRLS : SC_CTRLC; 268 void __iomem *reg = on ? SC_CTRLS : SC_CTRLC;
286 269
287 writel(INTEGRATOR_SC_CTRL_nFLVPPEN, reg); 270 writel(INTEGRATOR_SC_CTRL_nFLVPPEN, reg);
288} 271}
@@ -499,8 +482,9 @@ static struct sys_timer ap_timer = {
499MACHINE_START(INTEGRATOR, "ARM-Integrator") 482MACHINE_START(INTEGRATOR, "ARM-Integrator")
500 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 483 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
501 .boot_params = 0x00000100, 484 .boot_params = 0x00000100,
502 .map_io = ap_map_io,
503 .reserve = integrator_reserve, 485 .reserve = integrator_reserve,
486 .map_io = ap_map_io,
487 .init_early = integrator_init_early,
504 .init_irq = ap_init_irq, 488 .init_irq = ap_init_irq,
505 .timer = &ap_timer, 489 .timer = &ap_timer,
506 .init_machine = ap_init, 490 .init_machine = ap_init,
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index e9327da1382e..9e3ce26023e8 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -42,6 +42,10 @@
42 42
43#include <asm/hardware/timer-sp.h> 43#include <asm/hardware/timer-sp.h>
44 44
45#include <plat/clcd.h>
46#include <plat/fpga-irq.h>
47#include <plat/sched_clock.h>
48
45#include "common.h" 49#include "common.h"
46 50
47#define INTCP_PA_FLASH_BASE 0x24000000 51#define INTCP_PA_FLASH_BASE 0x24000000
@@ -49,9 +53,9 @@
49 53
50#define INTCP_PA_CLCD_BASE 0xc0000000 54#define INTCP_PA_CLCD_BASE 0xc0000000
51 55
52#define INTCP_VA_CIC_BASE IO_ADDRESS(INTEGRATOR_HDR_BASE + 0x40) 56#define INTCP_VA_CIC_BASE __io_address(INTEGRATOR_HDR_BASE + 0x40)
53#define INTCP_VA_PIC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE) 57#define INTCP_VA_PIC_BASE __io_address(INTEGRATOR_IC_BASE)
54#define INTCP_VA_SIC_BASE IO_ADDRESS(INTEGRATOR_CP_SIC_BASE) 58#define INTCP_VA_SIC_BASE __io_address(INTEGRATOR_CP_SIC_BASE)
55 59
56#define INTCP_ETH_SIZE 0x10 60#define INTCP_ETH_SIZE 0x10
57 61
@@ -139,129 +143,48 @@ static void __init intcp_map_io(void)
139 iotable_init(intcp_io_desc, ARRAY_SIZE(intcp_io_desc)); 143 iotable_init(intcp_io_desc, ARRAY_SIZE(intcp_io_desc));
140} 144}
141 145
142#define cic_writel __raw_writel 146static struct fpga_irq_data cic_irq_data = {
143#define cic_readl __raw_readl 147 .base = INTCP_VA_CIC_BASE,
144#define pic_writel __raw_writel 148 .irq_start = IRQ_CIC_START,
145#define pic_readl __raw_readl 149 .chip.name = "CIC",
146#define sic_writel __raw_writel
147#define sic_readl __raw_readl
148
149static void cic_mask_irq(struct irq_data *d)
150{
151 unsigned int irq = d->irq - IRQ_CIC_START;
152 cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR);
153}
154
155static void cic_unmask_irq(struct irq_data *d)
156{
157 unsigned int irq = d->irq - IRQ_CIC_START;
158 cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_SET);
159}
160
161static struct irq_chip cic_chip = {
162 .name = "CIC",
163 .irq_ack = cic_mask_irq,
164 .irq_mask = cic_mask_irq,
165 .irq_unmask = cic_unmask_irq,
166}; 150};
167 151
168static void pic_mask_irq(struct irq_data *d) 152static struct fpga_irq_data pic_irq_data = {
169{ 153 .base = INTCP_VA_PIC_BASE,
170 unsigned int irq = d->irq - IRQ_PIC_START; 154 .irq_start = IRQ_PIC_START,
171 pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR); 155 .chip.name = "PIC",
172}
173
174static void pic_unmask_irq(struct irq_data *d)
175{
176 unsigned int irq = d->irq - IRQ_PIC_START;
177 pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_SET);
178}
179
180static struct irq_chip pic_chip = {
181 .name = "PIC",
182 .irq_ack = pic_mask_irq,
183 .irq_mask = pic_mask_irq,
184 .irq_unmask = pic_unmask_irq,
185}; 156};
186 157
187static void sic_mask_irq(struct irq_data *d) 158static struct fpga_irq_data sic_irq_data = {
188{ 159 .base = INTCP_VA_SIC_BASE,
189 unsigned int irq = d->irq - IRQ_SIC_START; 160 .irq_start = IRQ_SIC_START,
190 sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR); 161 .chip.name = "SIC",
191}
192
193static void sic_unmask_irq(struct irq_data *d)
194{
195 unsigned int irq = d->irq - IRQ_SIC_START;
196 sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_SET);
197}
198
199static struct irq_chip sic_chip = {
200 .name = "SIC",
201 .irq_ack = sic_mask_irq,
202 .irq_mask = sic_mask_irq,
203 .irq_unmask = sic_unmask_irq,
204}; 162};
205 163
206static void
207sic_handle_irq(unsigned int irq, struct irq_desc *desc)
208{
209 unsigned long status = sic_readl(INTCP_VA_SIC_BASE + IRQ_STATUS);
210
211 if (status == 0) {
212 do_bad_IRQ(irq, desc);
213 return;
214 }
215
216 do {
217 irq = ffs(status) - 1;
218 status &= ~(1 << irq);
219
220 irq += IRQ_SIC_START;
221
222 generic_handle_irq(irq);
223 } while (status);
224}
225
226static void __init intcp_init_irq(void) 164static void __init intcp_init_irq(void)
227{ 165{
228 unsigned int i; 166 u32 pic_mask, sic_mask;
167
168 pic_mask = ~((~0u) << (11 - IRQ_PIC_START));
169 pic_mask |= (~((~0u) << (29 - 22))) << 22;
170 sic_mask = ~((~0u) << (1 + IRQ_SIC_END - IRQ_SIC_START));
229 171
230 /* 172 /*
231 * Disable all interrupt sources 173 * Disable all interrupt sources
232 */ 174 */
233 pic_writel(0xffffffff, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR); 175 writel(0xffffffff, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR);
234 pic_writel(0xffffffff, INTCP_VA_PIC_BASE + FIQ_ENABLE_CLEAR); 176 writel(0xffffffff, INTCP_VA_PIC_BASE + FIQ_ENABLE_CLEAR);
235 177 writel(0xffffffff, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR);
236 for (i = IRQ_PIC_START; i <= IRQ_PIC_END; i++) { 178 writel(0xffffffff, INTCP_VA_CIC_BASE + FIQ_ENABLE_CLEAR);
237 if (i == 11) 179 writel(sic_mask, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);
238 i = 22; 180 writel(sic_mask, INTCP_VA_SIC_BASE + FIQ_ENABLE_CLEAR);
239 if (i == 29)
240 break;
241 set_irq_chip(i, &pic_chip);
242 set_irq_handler(i, handle_level_irq);
243 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
244 }
245 181
246 cic_writel(0xffffffff, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR); 182 fpga_irq_init(-1, pic_mask, &pic_irq_data);
247 cic_writel(0xffffffff, INTCP_VA_CIC_BASE + FIQ_ENABLE_CLEAR);
248 183
249 for (i = IRQ_CIC_START; i <= IRQ_CIC_END; i++) { 184 fpga_irq_init(-1, ~((~0u) << (1 + IRQ_CIC_END - IRQ_CIC_START)),
250 set_irq_chip(i, &cic_chip); 185 &cic_irq_data);
251 set_irq_handler(i, handle_level_irq);
252 set_irq_flags(i, IRQF_VALID);
253 }
254
255 sic_writel(0x00000fff, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);
256 sic_writel(0x00000fff, INTCP_VA_SIC_BASE + FIQ_ENABLE_CLEAR);
257
258 for (i = IRQ_SIC_START; i <= IRQ_SIC_END; i++) {
259 set_irq_chip(i, &sic_chip);
260 set_irq_handler(i, handle_level_irq);
261 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
262 }
263 186
264 set_irq_chained_handler(IRQ_CP_CPPLDINT, sic_handle_irq); 187 fpga_irq_init(IRQ_CP_CPPLDINT, sic_mask, &sic_irq_data);
265} 188}
266 189
267/* 190/*
@@ -449,43 +372,21 @@ static struct amba_device aaci_device = {
449/* 372/*
450 * CLCD support 373 * CLCD support
451 */ 374 */
452static struct clcd_panel vga = {
453 .mode = {
454 .name = "VGA",
455 .refresh = 60,
456 .xres = 640,
457 .yres = 480,
458 .pixclock = 39721,
459 .left_margin = 40,
460 .right_margin = 24,
461 .upper_margin = 32,
462 .lower_margin = 11,
463 .hsync_len = 96,
464 .vsync_len = 2,
465 .sync = 0,
466 .vmode = FB_VMODE_NONINTERLACED,
467 },
468 .width = -1,
469 .height = -1,
470 .tim2 = TIM2_BCD | TIM2_IPC,
471 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
472 .bpp = 16,
473 .grayscale = 0,
474};
475
476/* 375/*
477 * Ensure VGA is selected. 376 * Ensure VGA is selected.
478 */ 377 */
479static void cp_clcd_enable(struct clcd_fb *fb) 378static void cp_clcd_enable(struct clcd_fb *fb)
480{ 379{
481 u32 val; 380 struct fb_var_screeninfo *var = &fb->fb.var;
381 u32 val = CM_CTRL_STATIC1 | CM_CTRL_STATIC2;
482 382
483 if (fb->fb.var.bits_per_pixel <= 8) 383 if (var->bits_per_pixel <= 8 ||
484 val = CM_CTRL_LCDMUXSEL_VGA_8421BPP; 384 (var->bits_per_pixel == 16 && var->green.length == 5))
385 /* Pseudocolor, RGB555, BGR555 */
386 val |= CM_CTRL_LCDMUXSEL_VGA555_TFT555;
485 else if (fb->fb.var.bits_per_pixel <= 16) 387 else if (fb->fb.var.bits_per_pixel <= 16)
486 val = CM_CTRL_LCDMUXSEL_VGA_16BPP 388 /* truecolor RGB565 */
487 | CM_CTRL_LCDEN0 | CM_CTRL_LCDEN1 389 val |= CM_CTRL_LCDMUXSEL_VGA565_TFT555;
488 | CM_CTRL_STATIC1 | CM_CTRL_STATIC2;
489 else 390 else
490 val = 0; /* no idea for this, don't trust the docs */ 391 val = 0; /* no idea for this, don't trust the docs */
491 392
@@ -498,49 +399,24 @@ static void cp_clcd_enable(struct clcd_fb *fb)
498 CM_CTRL_n24BITEN, val); 399 CM_CTRL_n24BITEN, val);
499} 400}
500 401
501static unsigned long framesize = SZ_1M;
502
503static int cp_clcd_setup(struct clcd_fb *fb) 402static int cp_clcd_setup(struct clcd_fb *fb)
504{ 403{
505 dma_addr_t dma; 404 fb->panel = versatile_clcd_get_panel("VGA");
506 405 if (!fb->panel)
507 fb->panel = &vga; 406 return -EINVAL;
508
509 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
510 &dma, GFP_KERNEL);
511 if (!fb->fb.screen_base) {
512 printk(KERN_ERR "CLCD: unable to map framebuffer\n");
513 return -ENOMEM;
514 }
515
516 fb->fb.fix.smem_start = dma;
517 fb->fb.fix.smem_len = framesize;
518
519 return 0;
520}
521
522static int cp_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
523{
524 return dma_mmap_writecombine(&fb->dev->dev, vma,
525 fb->fb.screen_base,
526 fb->fb.fix.smem_start,
527 fb->fb.fix.smem_len);
528}
529 407
530static void cp_clcd_remove(struct clcd_fb *fb) 408 return versatile_clcd_setup_dma(fb, SZ_1M);
531{
532 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
533 fb->fb.screen_base, fb->fb.fix.smem_start);
534} 409}
535 410
536static struct clcd_board clcd_data = { 411static struct clcd_board clcd_data = {
537 .name = "Integrator/CP", 412 .name = "Integrator/CP",
413 .caps = CLCD_CAP_5551 | CLCD_CAP_RGB565 | CLCD_CAP_888,
538 .check = clcdfb_check, 414 .check = clcdfb_check,
539 .decode = clcdfb_decode, 415 .decode = clcdfb_decode,
540 .enable = cp_clcd_enable, 416 .enable = cp_clcd_enable,
541 .setup = cp_clcd_setup, 417 .setup = cp_clcd_setup,
542 .mmap = cp_clcd_mmap, 418 .mmap = versatile_clcd_mmap_dma,
543 .remove = cp_clcd_remove, 419 .remove = versatile_clcd_remove_dma,
544}; 420};
545 421
546static struct amba_device clcd_device = { 422static struct amba_device clcd_device = {
@@ -565,11 +441,23 @@ static struct amba_device *amba_devs[] __initdata = {
565 &clcd_device, 441 &clcd_device,
566}; 442};
567 443
444#define REFCOUNTER (__io_address(INTEGRATOR_HDR_BASE) + 0x28)
445
446static void __init intcp_init_early(void)
447{
448 clkdev_add_table(cp_lookups, ARRAY_SIZE(cp_lookups));
449
450 integrator_init_early();
451
452#ifdef CONFIG_PLAT_VERSATILE_SCHED_CLOCK
453 versatile_sched_clock_init(REFCOUNTER, 24000000);
454#endif
455}
456
568static void __init intcp_init(void) 457static void __init intcp_init(void)
569{ 458{
570 int i; 459 int i;
571 460
572 clkdev_add_table(cp_lookups, ARRAY_SIZE(cp_lookups));
573 platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs)); 461 platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs));
574 462
575 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { 463 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
@@ -599,8 +487,9 @@ static struct sys_timer cp_timer = {
599MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP") 487MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
600 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 488 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
601 .boot_params = 0x00000100, 489 .boot_params = 0x00000100,
602 .map_io = intcp_map_io,
603 .reserve = integrator_reserve, 490 .reserve = integrator_reserve,
491 .map_io = intcp_map_io,
492 .init_early = intcp_init_early,
604 .init_irq = intcp_init_irq, 493 .init_irq = intcp_init_irq,
605 .timer = &cp_timer, 494 .timer = &cp_timer,
606 .init_machine = intcp_init, 495 .init_machine = intcp_init,
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index e7f8e5a4d48f..56f920c55b6a 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -263,7 +263,7 @@ static void __init msm_timer_init(void)
263} 263}
264 264
265#ifdef CONFIG_SMP 265#ifdef CONFIG_SMP
266void __cpuinit local_timer_setup(struct clock_event_device *evt) 266int __cpuinit local_timer_setup(struct clock_event_device *evt)
267{ 267{
268 struct msm_clock *clock = &msm_clocks[MSM_GLOBAL_TIMER]; 268 struct msm_clock *clock = &msm_clocks[MSM_GLOBAL_TIMER];
269 269
@@ -295,6 +295,7 @@ void __cpuinit local_timer_setup(struct clock_event_device *evt)
295 gic_enable_ppi(clock->irq.irq); 295 gic_enable_ppi(clock->irq.irq);
296 296
297 clockevents_register_device(evt); 297 clockevents_register_device(evt);
298 return 0;
298} 299}
299 300
300inline int local_timer_ack(void) 301inline int local_timer_ack(void)
diff --git a/arch/arm/mach-mx3/mach-mx31_3ds.c b/arch/arm/mach-mx3/mach-mx31_3ds.c
index 544d3e414f58..034be624d35c 100644
--- a/arch/arm/mach-mx3/mach-mx31_3ds.c
+++ b/arch/arm/mach-mx3/mach-mx31_3ds.c
@@ -488,10 +488,12 @@ static struct mc13xxx_regulator_init_data mx31_3ds_regulators[] = {
488}; 488};
489 489
490/* MC13783 */ 490/* MC13783 */
491static struct mc13xxx_platform_data mc13783_pdata __initdata = { 491static struct mc13xxx_platform_data mc13783_pdata = {
492 .regulators = mx31_3ds_regulators, 492 .regulators = {
493 .num_regulators = ARRAY_SIZE(mx31_3ds_regulators), 493 .regulators = mx31_3ds_regulators,
494 .flags = MC13XXX_USE_REGULATOR | MC13XXX_USE_TOUCHSCREEN 494 .num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
495 },
496 .flags = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN,
495}; 497};
496 498
497/* SPI */ 499/* SPI */
diff --git a/arch/arm/mach-mx3/mach-mx31moboard.c b/arch/arm/mach-mx3/mach-mx31moboard.c
index 6f3692bccb8a..3a021b01161d 100644
--- a/arch/arm/mach-mx3/mach-mx31moboard.c
+++ b/arch/arm/mach-mx3/mach-mx31moboard.c
@@ -268,8 +268,10 @@ static struct mc13783_leds_platform_data moboard_leds = {
268}; 268};
269 269
270static struct mc13xxx_platform_data moboard_pmic = { 270static struct mc13xxx_platform_data moboard_pmic = {
271 .regulators = moboard_regulators, 271 .regulators = {
272 .num_regulators = ARRAY_SIZE(moboard_regulators), 272 .regulators = moboard_regulators,
273 .num_regulators = ARRAY_SIZE(moboard_regulators),
274 },
273 .leds = &moboard_leds, 275 .leds = &moboard_leds,
274 .flags = MC13XXX_USE_REGULATOR | MC13XXX_USE_RTC | 276 .flags = MC13XXX_USE_REGULATOR | MC13XXX_USE_RTC |
275 MC13XXX_USE_ADC | MC13XXX_USE_LED, 277 MC13XXX_USE_ADC | MC13XXX_USE_LED,
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index eeab35dea07e..b997a35830fc 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -44,6 +44,7 @@ config ARCH_OMAP4
44 depends on ARCH_OMAP2PLUS 44 depends on ARCH_OMAP2PLUS
45 select CPU_V7 45 select CPU_V7
46 select ARM_GIC 46 select ARM_GIC
47 select LOCAL_TIMERS if SMP
47 select PL310_ERRATA_588369 48 select PL310_ERRATA_588369
48 select PL310_ERRATA_727915 49 select PL310_ERRATA_727915
49 select ARM_ERRATA_720789 50 select ARM_ERRATA_720789
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index c06eb423c4e4..9afd087cc29c 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -307,9 +307,6 @@ static struct omap_dss_board_info sdp3430_dss_data = {
307 .default_device = &sdp3430_lcd_device, 307 .default_device = &sdp3430_lcd_device,
308}; 308};
309 309
310static struct regulator_consumer_supply sdp3430_vdda_dac_supply =
311 REGULATOR_SUPPLY("vdda_dac", "omapdss");
312
313static struct omap_board_config_kernel sdp3430_config[] __initdata = { 310static struct omap_board_config_kernel sdp3430_config[] __initdata = {
314}; 311};
315 312
@@ -398,12 +395,13 @@ static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
398}; 395};
399 396
400static struct regulator_consumer_supply sdp3430_vdda_dac_supplies[] = { 397static struct regulator_consumer_supply sdp3430_vdda_dac_supplies[] = {
401 REGULATOR_SUPPLY("vdda_dac", "omapdss"), 398 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
402}; 399};
403 400
404/* VPLL2 for digital video outputs */ 401/* VPLL2 for digital video outputs */
405static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = { 402static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = {
406 REGULATOR_SUPPLY("vdds_dsi", "omapdss"), 403 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
404 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
407}; 405};
408 406
409static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = { 407static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 333ceb2c8fb0..56702c5e577f 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -36,6 +36,7 @@
36#include <plat/usb.h> 36#include <plat/usb.h>
37#include <plat/mmc.h> 37#include <plat/mmc.h>
38#include <plat/omap4-keypad.h> 38#include <plat/omap4-keypad.h>
39#include <plat/display.h>
39 40
40#include "mux.h" 41#include "mux.h"
41#include "hsmmc.h" 42#include "hsmmc.h"
@@ -47,6 +48,8 @@
47#define ETH_KS8851_QUART 138 48#define ETH_KS8851_QUART 138
48#define OMAP4_SFH7741_SENSOR_OUTPUT_GPIO 184 49#define OMAP4_SFH7741_SENSOR_OUTPUT_GPIO 184
49#define OMAP4_SFH7741_ENABLE_GPIO 188 50#define OMAP4_SFH7741_ENABLE_GPIO 188
51#define HDMI_GPIO_HPD 60 /* Hot plug pin for HDMI */
52#define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */
50 53
51static const int sdp4430_keymap[] = { 54static const int sdp4430_keymap[] = {
52 KEY(0, 0, KEY_E), 55 KEY(0, 0, KEY_E),
@@ -547,6 +550,12 @@ static struct regulator_init_data sdp4430_vusb = {
547 }, 550 },
548}; 551};
549 552
553static struct regulator_init_data sdp4430_clk32kg = {
554 .constraints = {
555 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
556 },
557};
558
550static struct twl4030_platform_data sdp4430_twldata = { 559static struct twl4030_platform_data sdp4430_twldata = {
551 .irq_base = TWL6030_IRQ_BASE, 560 .irq_base = TWL6030_IRQ_BASE,
552 .irq_end = TWL6030_IRQ_END, 561 .irq_end = TWL6030_IRQ_END,
@@ -562,6 +571,7 @@ static struct twl4030_platform_data sdp4430_twldata = {
562 .vaux1 = &sdp4430_vaux1, 571 .vaux1 = &sdp4430_vaux1,
563 .vaux2 = &sdp4430_vaux2, 572 .vaux2 = &sdp4430_vaux2,
564 .vaux3 = &sdp4430_vaux3, 573 .vaux3 = &sdp4430_vaux3,
574 .clk32kg = &sdp4430_clk32kg,
565 .usb = &omap4_usbphy_data 575 .usb = &omap4_usbphy_data
566}; 576};
567 577
@@ -621,6 +631,76 @@ static void __init omap_sfh7741prox_init(void)
621 } 631 }
622} 632}
623 633
634static void sdp4430_hdmi_mux_init(void)
635{
636 /* PAD0_HDMI_HPD_PAD1_HDMI_CEC */
637 omap_mux_init_signal("hdmi_hpd",
638 OMAP_PIN_INPUT_PULLUP);
639 omap_mux_init_signal("hdmi_cec",
640 OMAP_PIN_INPUT_PULLUP);
641 /* PAD0_HDMI_DDC_SCL_PAD1_HDMI_DDC_SDA */
642 omap_mux_init_signal("hdmi_ddc_scl",
643 OMAP_PIN_INPUT_PULLUP);
644 omap_mux_init_signal("hdmi_ddc_sda",
645 OMAP_PIN_INPUT_PULLUP);
646}
647
648static int sdp4430_panel_enable_hdmi(struct omap_dss_device *dssdev)
649{
650 int status;
651
652 status = gpio_request_one(HDMI_GPIO_HPD, GPIOF_OUT_INIT_HIGH,
653 "hdmi_gpio_hpd");
654 if (status) {
655 pr_err("Cannot request GPIO %d\n", HDMI_GPIO_HPD);
656 return status;
657 }
658 status = gpio_request_one(HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH,
659 "hdmi_gpio_ls_oe");
660 if (status) {
661 pr_err("Cannot request GPIO %d\n", HDMI_GPIO_LS_OE);
662 goto error1;
663 }
664
665 return 0;
666
667error1:
668 gpio_free(HDMI_GPIO_HPD);
669
670 return status;
671}
672
673static void sdp4430_panel_disable_hdmi(struct omap_dss_device *dssdev)
674{
675 gpio_free(HDMI_GPIO_LS_OE);
676 gpio_free(HDMI_GPIO_HPD);
677}
678
679static struct omap_dss_device sdp4430_hdmi_device = {
680 .name = "hdmi",
681 .driver_name = "hdmi_panel",
682 .type = OMAP_DISPLAY_TYPE_HDMI,
683 .platform_enable = sdp4430_panel_enable_hdmi,
684 .platform_disable = sdp4430_panel_disable_hdmi,
685 .channel = OMAP_DSS_CHANNEL_DIGIT,
686};
687
688static struct omap_dss_device *sdp4430_dss_devices[] = {
689 &sdp4430_hdmi_device,
690};
691
692static struct omap_dss_board_info sdp4430_dss_data = {
693 .num_devices = ARRAY_SIZE(sdp4430_dss_devices),
694 .devices = sdp4430_dss_devices,
695 .default_device = &sdp4430_hdmi_device,
696};
697
698void omap_4430sdp_display_init(void)
699{
700 sdp4430_hdmi_mux_init();
701 omap_display_init(&sdp4430_dss_data);
702}
703
624#ifdef CONFIG_OMAP_MUX 704#ifdef CONFIG_OMAP_MUX
625static struct omap_board_mux board_mux[] __initdata = { 705static struct omap_board_mux board_mux[] __initdata = {
626 OMAP4_MUX(USBB2_ULPITLL_CLK, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), 706 OMAP4_MUX(USBB2_ULPITLL_CLK, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
@@ -729,6 +809,8 @@ static void __init omap_4430sdp_init(void)
729 status = omap4_keyboard_init(&sdp4430_keypad_data); 809 status = omap4_keyboard_init(&sdp4430_keypad_data);
730 if (status) 810 if (status)
731 pr_err("Keypad initialization failed: %d\n", status); 811 pr_err("Keypad initialization failed: %d\n", status);
812
813 omap_4430sdp_display_init();
732} 814}
733 815
734static void __init omap_4430sdp_map_io(void) 816static void __init omap_4430sdp_map_io(void)
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 7b5647954c13..02a12b41c0ff 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -488,7 +488,7 @@ static struct regulator_consumer_supply cm_t35_vsim_supply = {
488}; 488};
489 489
490static struct regulator_consumer_supply cm_t35_vdac_supply = 490static struct regulator_consumer_supply cm_t35_vdac_supply =
491 REGULATOR_SUPPLY("vdda_dac", "omapdss"); 491 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
492 492
493static struct regulator_consumer_supply cm_t35_vdvi_supply = 493static struct regulator_consumer_supply cm_t35_vdvi_supply =
494 REGULATOR_SUPPLY("vdvi", "omapdss"); 494 REGULATOR_SUPPLY("vdvi", "omapdss");
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index aa27483c493e..65f9fde2c567 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -196,7 +196,7 @@ static struct omap_dss_board_info devkit8000_dss_data = {
196}; 196};
197 197
198static struct regulator_consumer_supply devkit8000_vdda_dac_supply = 198static struct regulator_consumer_supply devkit8000_vdda_dac_supply =
199 REGULATOR_SUPPLY("vdda_dac", "omapdss"); 199 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
200 200
201static uint32_t board_keymap[] = { 201static uint32_t board_keymap[] = {
202 KEY(0, 0, KEY_1), 202 KEY(0, 0, KEY_1),
@@ -277,8 +277,10 @@ static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
277 .setup = devkit8000_twl_gpio_setup, 277 .setup = devkit8000_twl_gpio_setup,
278}; 278};
279 279
280static struct regulator_consumer_supply devkit8000_vpll1_supply = 280static struct regulator_consumer_supply devkit8000_vpll1_supplies[] = {
281 REGULATOR_SUPPLY("vdds_dsi", "omapdss"); 281 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
282 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
283};
282 284
283/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ 285/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
284static struct regulator_init_data devkit8000_vmmc1 = { 286static struct regulator_init_data devkit8000_vmmc1 = {
@@ -319,8 +321,8 @@ static struct regulator_init_data devkit8000_vpll1 = {
319 .valid_ops_mask = REGULATOR_CHANGE_MODE 321 .valid_ops_mask = REGULATOR_CHANGE_MODE
320 | REGULATOR_CHANGE_STATUS, 322 | REGULATOR_CHANGE_STATUS,
321 }, 323 },
322 .num_consumer_supplies = 1, 324 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vpll1_supplies),
323 .consumer_supplies = &devkit8000_vpll1_supply, 325 .consumer_supplies = devkit8000_vpll1_supplies,
324}; 326};
325 327
326/* VAUX4 for ads7846 and nubs */ 328/* VAUX4 for ads7846 and nubs */
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index d3199b4ecdb6..5f8a2fd06337 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -485,8 +485,10 @@ static struct omap_dss_board_info igep2_dss_data = {
485 .default_device = &igep2_dvi_device, 485 .default_device = &igep2_dvi_device,
486}; 486};
487 487
488static struct regulator_consumer_supply igep2_vpll2_supply = 488static struct regulator_consumer_supply igep2_vpll2_supplies[] = {
489 REGULATOR_SUPPLY("vdds_dsi", "omapdss"); 489 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
490 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
491};
490 492
491static struct regulator_init_data igep2_vpll2 = { 493static struct regulator_init_data igep2_vpll2 = {
492 .constraints = { 494 .constraints = {
@@ -499,8 +501,8 @@ static struct regulator_init_data igep2_vpll2 = {
499 .valid_ops_mask = REGULATOR_CHANGE_MODE 501 .valid_ops_mask = REGULATOR_CHANGE_MODE
500 | REGULATOR_CHANGE_STATUS, 502 | REGULATOR_CHANGE_STATUS,
501 }, 503 },
502 .num_consumer_supplies = 1, 504 .num_consumer_supplies = ARRAY_SIZE(igep2_vpll2_supplies),
503 .consumer_supplies = &igep2_vpll2_supply, 505 .consumer_supplies = igep2_vpll2_supplies,
504}; 506};
505 507
506static void __init igep2_display_init(void) 508static void __init igep2_display_init(void)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 7640c054f43b..33007fd4a083 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -232,10 +232,12 @@ static struct omap_dss_board_info beagle_dss_data = {
232}; 232};
233 233
234static struct regulator_consumer_supply beagle_vdac_supply = 234static struct regulator_consumer_supply beagle_vdac_supply =
235 REGULATOR_SUPPLY("vdda_dac", "omapdss"); 235 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
236 236
237static struct regulator_consumer_supply beagle_vdvi_supply = 237static struct regulator_consumer_supply beagle_vdvi_supplies[] = {
238 REGULATOR_SUPPLY("vdds_dsi", "omapdss"); 238 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
239 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
240};
239 241
240static void __init beagle_display_init(void) 242static void __init beagle_display_init(void)
241{ 243{
@@ -422,8 +424,8 @@ static struct regulator_init_data beagle_vpll2 = {
422 .valid_ops_mask = REGULATOR_CHANGE_MODE 424 .valid_ops_mask = REGULATOR_CHANGE_MODE
423 | REGULATOR_CHANGE_STATUS, 425 | REGULATOR_CHANGE_STATUS,
424 }, 426 },
425 .num_consumer_supplies = 1, 427 .num_consumer_supplies = ARRAY_SIZE(beagle_vdvi_supplies),
426 .consumer_supplies = &beagle_vdvi_supply, 428 .consumer_supplies = beagle_vdvi_supplies,
427}; 429};
428 430
429static struct twl4030_usb_data beagle_usb_data = { 431static struct twl4030_usb_data beagle_usb_data = {
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 0fa2c7b208b1..5a1a916e5cc8 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -542,7 +542,7 @@ static struct twl4030_codec_data omap3evm_codec_data = {
542}; 542};
543 543
544static struct regulator_consumer_supply omap3_evm_vdda_dac_supply = 544static struct regulator_consumer_supply omap3_evm_vdda_dac_supply =
545 REGULATOR_SUPPLY("vdda_dac", "omapdss"); 545 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
546 546
547/* VDAC for DSS driving S-Video */ 547/* VDAC for DSS driving S-Video */
548static struct regulator_init_data omap3_evm_vdac = { 548static struct regulator_init_data omap3_evm_vdac = {
@@ -560,8 +560,10 @@ static struct regulator_init_data omap3_evm_vdac = {
560}; 560};
561 561
562/* VPLL2 for digital video outputs */ 562/* VPLL2 for digital video outputs */
563static struct regulator_consumer_supply omap3_evm_vpll2_supply = 563static struct regulator_consumer_supply omap3_evm_vpll2_supplies[] = {
564 REGULATOR_SUPPLY("vdds_dsi", "omapdss"); 564 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
565 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
566};
565 567
566static struct regulator_init_data omap3_evm_vpll2 = { 568static struct regulator_init_data omap3_evm_vpll2 = {
567 .constraints = { 569 .constraints = {
@@ -573,8 +575,8 @@ static struct regulator_init_data omap3_evm_vpll2 = {
573 .valid_ops_mask = REGULATOR_CHANGE_MODE 575 .valid_ops_mask = REGULATOR_CHANGE_MODE
574 | REGULATOR_CHANGE_STATUS, 576 | REGULATOR_CHANGE_STATUS,
575 }, 577 },
576 .num_consumer_supplies = 1, 578 .num_consumer_supplies = ARRAY_SIZE(omap3_evm_vpll2_supplies),
577 .consumer_supplies = &omap3_evm_vpll2_supply, 579 .consumer_supplies = omap3_evm_vpll2_supplies,
578}; 580};
579 581
580/* ads7846 on SPI */ 582/* ads7846 on SPI */
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 2e5dc21e3477..07dba888f450 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -342,11 +342,12 @@ static struct regulator_consumer_supply pandora_vmmc3_supply =
342 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"); 342 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2");
343 343
344static struct regulator_consumer_supply pandora_vdda_dac_supply = 344static struct regulator_consumer_supply pandora_vdda_dac_supply =
345 REGULATOR_SUPPLY("vdda_dac", "omapdss"); 345 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
346 346
347static struct regulator_consumer_supply pandora_vdds_supplies[] = { 347static struct regulator_consumer_supply pandora_vdds_supplies[] = {
348 REGULATOR_SUPPLY("vdds_sdi", "omapdss"), 348 REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
349 REGULATOR_SUPPLY("vdds_dsi", "omapdss"), 349 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
350 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
350}; 351};
351 352
352static struct regulator_consumer_supply pandora_vcc_lcd_supply = 353static struct regulator_consumer_supply pandora_vcc_lcd_supply =
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 8ebdbc38b9de..a6e0b9161c99 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -439,7 +439,7 @@ static struct twl4030_codec_data omap3stalker_codec_data = {
439}; 439};
440 440
441static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply = 441static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply =
442 REGULATOR_SUPPLY("vdda_dac", "omapdss"); 442 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
443 443
444/* VDAC for DSS driving S-Video */ 444/* VDAC for DSS driving S-Video */
445static struct regulator_init_data omap3_stalker_vdac = { 445static struct regulator_init_data omap3_stalker_vdac = {
@@ -457,8 +457,10 @@ static struct regulator_init_data omap3_stalker_vdac = {
457}; 457};
458 458
459/* VPLL2 for digital video outputs */ 459/* VPLL2 for digital video outputs */
460static struct regulator_consumer_supply omap3_stalker_vpll2_supply = 460static struct regulator_consumer_supply omap3_stalker_vpll2_supplies[] = {
461 REGULATOR_SUPPLY("vdds_dsi", "omapdss"); 461 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
462 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
463};
462 464
463static struct regulator_init_data omap3_stalker_vpll2 = { 465static struct regulator_init_data omap3_stalker_vpll2 = {
464 .constraints = { 466 .constraints = {
@@ -471,8 +473,8 @@ static struct regulator_init_data omap3_stalker_vpll2 = {
471 .valid_ops_mask = REGULATOR_CHANGE_MODE 473 .valid_ops_mask = REGULATOR_CHANGE_MODE
472 | REGULATOR_CHANGE_STATUS, 474 | REGULATOR_CHANGE_STATUS,
473 }, 475 },
474 .num_consumer_supplies = 1, 476 .num_consumer_supplies = ARRAY_SIZE(omap3_stalker_vpll2_supplies),
475 .consumer_supplies = &omap3_stalker_vpll2_supply, 477 .consumer_supplies = omap3_stalker_vpll2_supplies,
476}; 478};
477 479
478static struct twl4030_platform_data omap3stalker_twldata = { 480static struct twl4030_platform_data omap3stalker_twldata = {
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 0f4d8a762a70..c936c6d7ded0 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -34,11 +34,13 @@
34#include <asm/mach-types.h> 34#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
36#include <asm/mach/map.h> 36#include <asm/mach/map.h>
37#include <plat/display.h>
37 38
38#include <plat/board.h> 39#include <plat/board.h>
39#include <plat/common.h> 40#include <plat/common.h>
40#include <plat/usb.h> 41#include <plat/usb.h>
41#include <plat/mmc.h> 42#include <plat/mmc.h>
43#include <plat/panel-generic-dpi.h>
42#include "timer-gp.h" 44#include "timer-gp.h"
43 45
44#include "hsmmc.h" 46#include "hsmmc.h"
@@ -49,6 +51,8 @@
49#define GPIO_HUB_NRESET 62 51#define GPIO_HUB_NRESET 62
50#define GPIO_WIFI_PMENA 43 52#define GPIO_WIFI_PMENA 43
51#define GPIO_WIFI_IRQ 53 53#define GPIO_WIFI_IRQ 53
54#define HDMI_GPIO_HPD 60 /* Hot plug pin for HDMI */
55#define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */
52 56
53/* wl127x BT, FM, GPS connectivity chip */ 57/* wl127x BT, FM, GPS connectivity chip */
54static int wl1271_gpios[] = {46, -1, -1}; 58static int wl1271_gpios[] = {46, -1, -1};
@@ -407,6 +411,12 @@ static struct regulator_init_data omap4_panda_vusb = {
407 }, 411 },
408}; 412};
409 413
414static struct regulator_init_data omap4_panda_clk32kg = {
415 .constraints = {
416 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
417 },
418};
419
410static struct twl4030_platform_data omap4_panda_twldata = { 420static struct twl4030_platform_data omap4_panda_twldata = {
411 .irq_base = TWL6030_IRQ_BASE, 421 .irq_base = TWL6030_IRQ_BASE,
412 .irq_end = TWL6030_IRQ_END, 422 .irq_end = TWL6030_IRQ_END,
@@ -422,6 +432,7 @@ static struct twl4030_platform_data omap4_panda_twldata = {
422 .vaux1 = &omap4_panda_vaux1, 432 .vaux1 = &omap4_panda_vaux1,
423 .vaux2 = &omap4_panda_vaux2, 433 .vaux2 = &omap4_panda_vaux2,
424 .vaux3 = &omap4_panda_vaux3, 434 .vaux3 = &omap4_panda_vaux3,
435 .clk32kg = &omap4_panda_clk32kg,
425 .usb = &omap4_usbphy_data, 436 .usb = &omap4_usbphy_data,
426}; 437};
427 438
@@ -433,6 +444,17 @@ static struct i2c_board_info __initdata omap4_panda_i2c_boardinfo[] = {
433 .platform_data = &omap4_panda_twldata, 444 .platform_data = &omap4_panda_twldata,
434 }, 445 },
435}; 446};
447
448/*
449 * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM
450 * is connected as I2C slave device, and can be accessed at address 0x50
451 */
452static struct i2c_board_info __initdata panda_i2c_eeprom[] = {
453 {
454 I2C_BOARD_INFO("eeprom", 0x50),
455 },
456};
457
436static int __init omap4_panda_i2c_init(void) 458static int __init omap4_panda_i2c_init(void)
437{ 459{
438 /* 460 /*
@@ -442,7 +464,12 @@ static int __init omap4_panda_i2c_init(void)
442 omap_register_i2c_bus(1, 400, omap4_panda_i2c_boardinfo, 464 omap_register_i2c_bus(1, 400, omap4_panda_i2c_boardinfo,
443 ARRAY_SIZE(omap4_panda_i2c_boardinfo)); 465 ARRAY_SIZE(omap4_panda_i2c_boardinfo));
444 omap_register_i2c_bus(2, 400, NULL, 0); 466 omap_register_i2c_bus(2, 400, NULL, 0);
445 omap_register_i2c_bus(3, 400, NULL, 0); 467 /*
468 * Bus 3 is attached to the DVI port where devices like the pico DLP
469 * projector don't work reliably with 400kHz
470 */
471 omap_register_i2c_bus(3, 100, panda_i2c_eeprom,
472 ARRAY_SIZE(panda_i2c_eeprom));
446 omap_register_i2c_bus(4, 400, NULL, 0); 473 omap_register_i2c_bus(4, 400, NULL, 0);
447 return 0; 474 return 0;
448} 475}
@@ -462,6 +489,64 @@ static struct omap_board_mux board_mux[] __initdata = {
462 OMAP4_MUX(SDMMC5_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), 489 OMAP4_MUX(SDMMC5_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
463 OMAP4_MUX(SDMMC5_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), 490 OMAP4_MUX(SDMMC5_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
464 OMAP4_MUX(SDMMC5_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), 491 OMAP4_MUX(SDMMC5_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
492 /* gpio 0 - TFP410 PD */
493 OMAP4_MUX(KPD_COL1, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
494 /* dispc2_data23 */
495 OMAP4_MUX(USBB2_ULPITLL_STP, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
496 /* dispc2_data22 */
497 OMAP4_MUX(USBB2_ULPITLL_DIR, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
498 /* dispc2_data21 */
499 OMAP4_MUX(USBB2_ULPITLL_NXT, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
500 /* dispc2_data20 */
501 OMAP4_MUX(USBB2_ULPITLL_DAT0, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
502 /* dispc2_data19 */
503 OMAP4_MUX(USBB2_ULPITLL_DAT1, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
504 /* dispc2_data18 */
505 OMAP4_MUX(USBB2_ULPITLL_DAT2, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
506 /* dispc2_data15 */
507 OMAP4_MUX(USBB2_ULPITLL_DAT3, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
508 /* dispc2_data14 */
509 OMAP4_MUX(USBB2_ULPITLL_DAT4, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
510 /* dispc2_data13 */
511 OMAP4_MUX(USBB2_ULPITLL_DAT5, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
512 /* dispc2_data12 */
513 OMAP4_MUX(USBB2_ULPITLL_DAT6, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
514 /* dispc2_data11 */
515 OMAP4_MUX(USBB2_ULPITLL_DAT7, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
516 /* dispc2_data10 */
517 OMAP4_MUX(DPM_EMU3, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
518 /* dispc2_data9 */
519 OMAP4_MUX(DPM_EMU4, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
520 /* dispc2_data16 */
521 OMAP4_MUX(DPM_EMU5, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
522 /* dispc2_data17 */
523 OMAP4_MUX(DPM_EMU6, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
524 /* dispc2_hsync */
525 OMAP4_MUX(DPM_EMU7, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
526 /* dispc2_pclk */
527 OMAP4_MUX(DPM_EMU8, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
528 /* dispc2_vsync */
529 OMAP4_MUX(DPM_EMU9, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
530 /* dispc2_de */
531 OMAP4_MUX(DPM_EMU10, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
532 /* dispc2_data8 */
533 OMAP4_MUX(DPM_EMU11, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
534 /* dispc2_data7 */
535 OMAP4_MUX(DPM_EMU12, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
536 /* dispc2_data6 */
537 OMAP4_MUX(DPM_EMU13, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
538 /* dispc2_data5 */
539 OMAP4_MUX(DPM_EMU14, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
540 /* dispc2_data4 */
541 OMAP4_MUX(DPM_EMU15, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
542 /* dispc2_data3 */
543 OMAP4_MUX(DPM_EMU16, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
544 /* dispc2_data2 */
545 OMAP4_MUX(DPM_EMU17, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
546 /* dispc2_data1 */
547 OMAP4_MUX(DPM_EMU18, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
548 /* dispc2_data0 */
549 OMAP4_MUX(DPM_EMU19, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
465 { .reg_offset = OMAP_MUX_TERMINATOR }, 550 { .reg_offset = OMAP_MUX_TERMINATOR },
466}; 551};
467 552
@@ -535,6 +620,128 @@ static inline void board_serial_init(void)
535} 620}
536#endif 621#endif
537 622
623/* Display DVI */
624#define PANDA_DVI_TFP410_POWER_DOWN_GPIO 0
625
626static int omap4_panda_enable_dvi(struct omap_dss_device *dssdev)
627{
628 gpio_set_value(dssdev->reset_gpio, 1);
629 return 0;
630}
631
632static void omap4_panda_disable_dvi(struct omap_dss_device *dssdev)
633{
634 gpio_set_value(dssdev->reset_gpio, 0);
635}
636
637/* Using generic display panel */
638static struct panel_generic_dpi_data omap4_dvi_panel = {
639 .name = "generic",
640 .platform_enable = omap4_panda_enable_dvi,
641 .platform_disable = omap4_panda_disable_dvi,
642};
643
644struct omap_dss_device omap4_panda_dvi_device = {
645 .type = OMAP_DISPLAY_TYPE_DPI,
646 .name = "dvi",
647 .driver_name = "generic_dpi_panel",
648 .data = &omap4_dvi_panel,
649 .phy.dpi.data_lines = 24,
650 .reset_gpio = PANDA_DVI_TFP410_POWER_DOWN_GPIO,
651 .channel = OMAP_DSS_CHANNEL_LCD2,
652};
653
654int __init omap4_panda_dvi_init(void)
655{
656 int r;
657
658 /* Requesting TFP410 DVI GPIO and disabling it, at bootup */
659 r = gpio_request_one(omap4_panda_dvi_device.reset_gpio,
660 GPIOF_OUT_INIT_LOW, "DVI PD");
661 if (r)
662 pr_err("Failed to get DVI powerdown GPIO\n");
663
664 return r;
665}
666
667
668static void omap4_panda_hdmi_mux_init(void)
669{
670 /* PAD0_HDMI_HPD_PAD1_HDMI_CEC */
671 omap_mux_init_signal("hdmi_hpd",
672 OMAP_PIN_INPUT_PULLUP);
673 omap_mux_init_signal("hdmi_cec",
674 OMAP_PIN_INPUT_PULLUP);
675 /* PAD0_HDMI_DDC_SCL_PAD1_HDMI_DDC_SDA */
676 omap_mux_init_signal("hdmi_ddc_scl",
677 OMAP_PIN_INPUT_PULLUP);
678 omap_mux_init_signal("hdmi_ddc_sda",
679 OMAP_PIN_INPUT_PULLUP);
680}
681
682static int omap4_panda_panel_enable_hdmi(struct omap_dss_device *dssdev)
683{
684 int status;
685
686 status = gpio_request_one(HDMI_GPIO_HPD, GPIOF_OUT_INIT_HIGH,
687 "hdmi_gpio_hpd");
688 if (status) {
689 pr_err("Cannot request GPIO %d\n", HDMI_GPIO_HPD);
690 return status;
691 }
692 status = gpio_request_one(HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH,
693 "hdmi_gpio_ls_oe");
694 if (status) {
695 pr_err("Cannot request GPIO %d\n", HDMI_GPIO_LS_OE);
696 goto error1;
697 }
698
699 return 0;
700
701error1:
702 gpio_free(HDMI_GPIO_HPD);
703
704 return status;
705}
706
707static void omap4_panda_panel_disable_hdmi(struct omap_dss_device *dssdev)
708{
709 gpio_free(HDMI_GPIO_LS_OE);
710 gpio_free(HDMI_GPIO_HPD);
711}
712
713static struct omap_dss_device omap4_panda_hdmi_device = {
714 .name = "hdmi",
715 .driver_name = "hdmi_panel",
716 .type = OMAP_DISPLAY_TYPE_HDMI,
717 .platform_enable = omap4_panda_panel_enable_hdmi,
718 .platform_disable = omap4_panda_panel_disable_hdmi,
719 .channel = OMAP_DSS_CHANNEL_DIGIT,
720};
721
722static struct omap_dss_device *omap4_panda_dss_devices[] = {
723 &omap4_panda_dvi_device,
724 &omap4_panda_hdmi_device,
725};
726
727static struct omap_dss_board_info omap4_panda_dss_data = {
728 .num_devices = ARRAY_SIZE(omap4_panda_dss_devices),
729 .devices = omap4_panda_dss_devices,
730 .default_device = &omap4_panda_dvi_device,
731};
732
733void omap4_panda_display_init(void)
734{
735 int r;
736
737 r = omap4_panda_dvi_init();
738 if (r)
739 pr_err("error initializing panda DVI\n");
740
741 omap4_panda_hdmi_mux_init();
742 omap_display_init(&omap4_panda_dss_data);
743}
744
538static void __init omap4_panda_init(void) 745static void __init omap4_panda_init(void)
539{ 746{
540 int package = OMAP_PACKAGE_CBS; 747 int package = OMAP_PACKAGE_CBS;
@@ -553,6 +760,7 @@ static void __init omap4_panda_init(void)
553 omap4_twl6030_hsmmc_init(mmc); 760 omap4_twl6030_hsmmc_init(mmc);
554 omap4_ehci_init(); 761 omap4_ehci_init();
555 usb_musb_init(&musb_board_data); 762 usb_musb_init(&musb_board_data);
763 omap4_panda_display_init();
556} 764}
557 765
558static void __init omap4_panda_map_io(void) 766static void __init omap4_panda_map_io(void)
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index d0961945c65a..59ca33326b8c 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -28,6 +28,8 @@
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29#include <linux/i2c/twl.h> 29#include <linux/i2c/twl.h>
30#include <linux/regulator/machine.h> 30#include <linux/regulator/machine.h>
31#include <linux/regulator/fixed.h>
32#include <linux/spi/spi.h>
31 33
32#include <linux/mtd/mtd.h> 34#include <linux/mtd/mtd.h>
33#include <linux/mtd/nand.h> 35#include <linux/mtd/nand.h>
@@ -41,10 +43,14 @@
41 43
42#include <plat/board.h> 44#include <plat/board.h>
43#include <plat/common.h> 45#include <plat/common.h>
46#include <plat/display.h>
47#include <plat/panel-generic-dpi.h>
44#include <mach/gpio.h> 48#include <mach/gpio.h>
45#include <plat/gpmc.h> 49#include <plat/gpmc.h>
46#include <mach/hardware.h> 50#include <mach/hardware.h>
47#include <plat/nand.h> 51#include <plat/nand.h>
52#include <plat/mcspi.h>
53#include <plat/mux.h>
48#include <plat/usb.h> 54#include <plat/usb.h>
49 55
50#include "mux.h" 56#include "mux.h"
@@ -68,8 +74,6 @@
68#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ 74#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
69 defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) 75 defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
70 76
71#include <plat/mcspi.h>
72#include <linux/spi/spi.h>
73#include <linux/spi/ads7846.h> 77#include <linux/spi/ads7846.h>
74 78
75static struct omap2_mcspi_device_config ads7846_mcspi_config = { 79static struct omap2_mcspi_device_config ads7846_mcspi_config = {
@@ -94,16 +98,32 @@ static struct ads7846_platform_data ads7846_config = {
94 .keep_vref_on = 1, 98 .keep_vref_on = 1,
95}; 99};
96 100
97static struct spi_board_info overo_spi_board_info[] __initdata = { 101/* fixed regulator for ads7846 */
98 { 102static struct regulator_consumer_supply ads7846_supply =
99 .modalias = "ads7846", 103 REGULATOR_SUPPLY("vcc", "spi1.0");
100 .bus_num = 1, 104
101 .chip_select = 0, 105static struct regulator_init_data vads7846_regulator = {
102 .max_speed_hz = 1500000, 106 .constraints = {
103 .controller_data = &ads7846_mcspi_config, 107 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
104 .irq = OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN), 108 },
105 .platform_data = &ads7846_config, 109 .num_consumer_supplies = 1,
106 } 110 .consumer_supplies = &ads7846_supply,
111};
112
113static struct fixed_voltage_config vads7846 = {
114 .supply_name = "vads7846",
115 .microvolts = 3300000, /* 3.3V */
116 .gpio = -EINVAL,
117 .startup_delay = 0,
118 .init_data = &vads7846_regulator,
119};
120
121static struct platform_device vads7846_device = {
122 .name = "reg-fixed-voltage",
123 .id = 1,
124 .dev = {
125 .platform_data = &vads7846,
126 },
107}; 127};
108 128
109static void __init overo_ads7846_init(void) 129static void __init overo_ads7846_init(void)
@@ -116,8 +136,7 @@ static void __init overo_ads7846_init(void)
116 return; 136 return;
117 } 137 }
118 138
119 spi_register_board_info(overo_spi_board_info, 139 platform_device_register(&vads7846_device);
120 ARRAY_SIZE(overo_spi_board_info));
121} 140}
122 141
123#else 142#else
@@ -233,6 +252,137 @@ static inline void __init overo_init_smsc911x(void)
233static inline void __init overo_init_smsc911x(void) { return; } 252static inline void __init overo_init_smsc911x(void) { return; }
234#endif 253#endif
235 254
255/* DSS */
256static int lcd_enabled;
257static int dvi_enabled;
258
259#define OVERO_GPIO_LCD_EN 144
260#define OVERO_GPIO_LCD_BL 145
261
262static void __init overo_display_init(void)
263{
264 if ((gpio_request(OVERO_GPIO_LCD_EN, "OVERO_GPIO_LCD_EN") == 0) &&
265 (gpio_direction_output(OVERO_GPIO_LCD_EN, 1) == 0))
266 gpio_export(OVERO_GPIO_LCD_EN, 0);
267 else
268 printk(KERN_ERR "could not obtain gpio for "
269 "OVERO_GPIO_LCD_EN\n");
270
271 if ((gpio_request(OVERO_GPIO_LCD_BL, "OVERO_GPIO_LCD_BL") == 0) &&
272 (gpio_direction_output(OVERO_GPIO_LCD_BL, 1) == 0))
273 gpio_export(OVERO_GPIO_LCD_BL, 0);
274 else
275 printk(KERN_ERR "could not obtain gpio for "
276 "OVERO_GPIO_LCD_BL\n");
277}
278
279static int overo_panel_enable_dvi(struct omap_dss_device *dssdev)
280{
281 if (lcd_enabled) {
282 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
283 return -EINVAL;
284 }
285 dvi_enabled = 1;
286
287 return 0;
288}
289
290static void overo_panel_disable_dvi(struct omap_dss_device *dssdev)
291{
292 dvi_enabled = 0;
293}
294
295static struct panel_generic_dpi_data dvi_panel = {
296 .name = "generic",
297 .platform_enable = overo_panel_enable_dvi,
298 .platform_disable = overo_panel_disable_dvi,
299};
300
301static struct omap_dss_device overo_dvi_device = {
302 .name = "dvi",
303 .type = OMAP_DISPLAY_TYPE_DPI,
304 .driver_name = "generic_dpi_panel",
305 .data = &dvi_panel,
306 .phy.dpi.data_lines = 24,
307};
308
309static struct omap_dss_device overo_tv_device = {
310 .name = "tv",
311 .driver_name = "venc",
312 .type = OMAP_DISPLAY_TYPE_VENC,
313 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
314};
315
316static int overo_panel_enable_lcd(struct omap_dss_device *dssdev)
317{
318 if (dvi_enabled) {
319 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
320 return -EINVAL;
321 }
322
323 gpio_set_value(OVERO_GPIO_LCD_EN, 1);
324 gpio_set_value(OVERO_GPIO_LCD_BL, 1);
325 lcd_enabled = 1;
326 return 0;
327}
328
329static void overo_panel_disable_lcd(struct omap_dss_device *dssdev)
330{
331 gpio_set_value(OVERO_GPIO_LCD_EN, 0);
332 gpio_set_value(OVERO_GPIO_LCD_BL, 0);
333 lcd_enabled = 0;
334}
335
336static struct panel_generic_dpi_data lcd43_panel = {
337 .name = "samsung_lte430wq_f0c",
338 .platform_enable = overo_panel_enable_lcd,
339 .platform_disable = overo_panel_disable_lcd,
340};
341
342static struct omap_dss_device overo_lcd43_device = {
343 .name = "lcd43",
344 .type = OMAP_DISPLAY_TYPE_DPI,
345 .driver_name = "generic_dpi_panel",
346 .data = &lcd43_panel,
347 .phy.dpi.data_lines = 24,
348};
349
350#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \
351 defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE)
352static struct omap_dss_device overo_lcd35_device = {
353 .type = OMAP_DISPLAY_TYPE_DPI,
354 .name = "lcd35",
355 .driver_name = "lgphilips_lb035q02_panel",
356 .phy.dpi.data_lines = 24,
357 .platform_enable = overo_panel_enable_lcd,
358 .platform_disable = overo_panel_disable_lcd,
359};
360#endif
361
362static struct omap_dss_device *overo_dss_devices[] = {
363 &overo_dvi_device,
364 &overo_tv_device,
365#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \
366 defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE)
367 &overo_lcd35_device,
368#endif
369 &overo_lcd43_device,
370};
371
372static struct omap_dss_board_info overo_dss_data = {
373 .num_devices = ARRAY_SIZE(overo_dss_devices),
374 .devices = overo_dss_devices,
375 .default_device = &overo_dvi_device,
376};
377
378static struct regulator_consumer_supply overo_vdda_dac_supply =
379 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
380
381static struct regulator_consumer_supply overo_vdds_dsi_supply[] = {
382 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
383 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
384};
385
236static struct mtd_partition overo_nand_partitions[] = { 386static struct mtd_partition overo_nand_partitions[] = {
237 { 387 {
238 .name = "xloader", 388 .name = "xloader",
@@ -323,6 +473,93 @@ static struct regulator_consumer_supply overo_vmmc1_supply = {
323 .supply = "vmmc", 473 .supply = "vmmc",
324}; 474};
325 475
476#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
477#include <linux/leds.h>
478
479static struct gpio_led gpio_leds[] = {
480 {
481 .name = "overo:red:gpio21",
482 .default_trigger = "heartbeat",
483 .gpio = 21,
484 .active_low = true,
485 },
486 {
487 .name = "overo:blue:gpio22",
488 .default_trigger = "none",
489 .gpio = 22,
490 .active_low = true,
491 },
492 {
493 .name = "overo:blue:COM",
494 .default_trigger = "mmc0",
495 .gpio = -EINVAL, /* gets replaced */
496 .active_low = true,
497 },
498};
499
500static struct gpio_led_platform_data gpio_leds_pdata = {
501 .leds = gpio_leds,
502 .num_leds = ARRAY_SIZE(gpio_leds),
503};
504
505static struct platform_device gpio_leds_device = {
506 .name = "leds-gpio",
507 .id = -1,
508 .dev = {
509 .platform_data = &gpio_leds_pdata,
510 },
511};
512
513static void __init overo_init_led(void)
514{
515 platform_device_register(&gpio_leds_device);
516}
517
518#else
519static inline void __init overo_init_led(void) { return; }
520#endif
521
522#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
523#include <linux/input.h>
524#include <linux/gpio_keys.h>
525
526static struct gpio_keys_button gpio_buttons[] = {
527 {
528 .code = BTN_0,
529 .gpio = 23,
530 .desc = "button0",
531 .wakeup = 1,
532 },
533 {
534 .code = BTN_1,
535 .gpio = 14,
536 .desc = "button1",
537 .wakeup = 1,
538 },
539};
540
541static struct gpio_keys_platform_data gpio_keys_pdata = {
542 .buttons = gpio_buttons,
543 .nbuttons = ARRAY_SIZE(gpio_buttons),
544};
545
546static struct platform_device gpio_keys_device = {
547 .name = "gpio-keys",
548 .id = -1,
549 .dev = {
550 .platform_data = &gpio_keys_pdata,
551 },
552};
553
554static void __init overo_init_keys(void)
555{
556 platform_device_register(&gpio_keys_device);
557}
558
559#else
560static inline void __init overo_init_keys(void) { return; }
561#endif
562
326static int overo_twl_gpio_setup(struct device *dev, 563static int overo_twl_gpio_setup(struct device *dev,
327 unsigned gpio, unsigned ngpio) 564 unsigned gpio, unsigned ngpio)
328{ 565{
@@ -330,6 +567,11 @@ static int overo_twl_gpio_setup(struct device *dev,
330 567
331 overo_vmmc1_supply.dev = mmc[0].dev; 568 overo_vmmc1_supply.dev = mmc[0].dev;
332 569
570#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
571 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
572 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
573#endif
574
333 return 0; 575 return 0;
334} 576}
335 577
@@ -337,6 +579,7 @@ static struct twl4030_gpio_platform_data overo_gpio_data = {
337 .gpio_base = OMAP_MAX_GPIO_LINES, 579 .gpio_base = OMAP_MAX_GPIO_LINES,
338 .irq_base = TWL4030_GPIO_IRQ_BASE, 580 .irq_base = TWL4030_GPIO_IRQ_BASE,
339 .irq_end = TWL4030_GPIO_IRQ_END, 581 .irq_end = TWL4030_GPIO_IRQ_END,
582 .use_leds = true,
340 .setup = overo_twl_gpio_setup, 583 .setup = overo_twl_gpio_setup,
341}; 584};
342 585
@@ -358,6 +601,35 @@ static struct regulator_init_data overo_vmmc1 = {
358 .consumer_supplies = &overo_vmmc1_supply, 601 .consumer_supplies = &overo_vmmc1_supply,
359}; 602};
360 603
604/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
605static struct regulator_init_data overo_vdac = {
606 .constraints = {
607 .min_uV = 1800000,
608 .max_uV = 1800000,
609 .valid_modes_mask = REGULATOR_MODE_NORMAL
610 | REGULATOR_MODE_STANDBY,
611 .valid_ops_mask = REGULATOR_CHANGE_MODE
612 | REGULATOR_CHANGE_STATUS,
613 },
614 .num_consumer_supplies = 1,
615 .consumer_supplies = &overo_vdda_dac_supply,
616};
617
618/* VPLL2 for digital video outputs */
619static struct regulator_init_data overo_vpll2 = {
620 .constraints = {
621 .name = "VDVI",
622 .min_uV = 1800000,
623 .max_uV = 1800000,
624 .valid_modes_mask = REGULATOR_MODE_NORMAL
625 | REGULATOR_MODE_STANDBY,
626 .valid_ops_mask = REGULATOR_CHANGE_MODE
627 | REGULATOR_CHANGE_STATUS,
628 },
629 .num_consumer_supplies = ARRAY_SIZE(overo_vdds_dsi_supply),
630 .consumer_supplies = overo_vdds_dsi_supply,
631};
632
361static struct twl4030_codec_audio_data overo_audio_data; 633static struct twl4030_codec_audio_data overo_audio_data;
362 634
363static struct twl4030_codec_data overo_codec_data = { 635static struct twl4030_codec_data overo_codec_data = {
@@ -365,8 +637,6 @@ static struct twl4030_codec_data overo_codec_data = {
365 .audio = &overo_audio_data, 637 .audio = &overo_audio_data,
366}; 638};
367 639
368/* mmc2 (WLAN) and Bluetooth don't use twl4030 regulators */
369
370static struct twl4030_platform_data overo_twldata = { 640static struct twl4030_platform_data overo_twldata = {
371 .irq_base = TWL4030_IRQ_BASE, 641 .irq_base = TWL4030_IRQ_BASE,
372 .irq_end = TWL4030_IRQ_END, 642 .irq_end = TWL4030_IRQ_END,
@@ -374,6 +644,8 @@ static struct twl4030_platform_data overo_twldata = {
374 .usb = &overo_usb_data, 644 .usb = &overo_usb_data,
375 .codec = &overo_codec_data, 645 .codec = &overo_codec_data,
376 .vmmc1 = &overo_vmmc1, 646 .vmmc1 = &overo_vmmc1,
647 .vdac = &overo_vdac,
648 .vpll2 = &overo_vpll2,
377}; 649};
378 650
379static struct i2c_board_info __initdata overo_i2c_boardinfo[] = { 651static struct i2c_board_info __initdata overo_i2c_boardinfo[] = {
@@ -394,18 +666,38 @@ static int __init overo_i2c_init(void)
394 return 0; 666 return 0;
395} 667}
396 668
397static struct platform_device overo_lcd_device = { 669static struct spi_board_info overo_spi_board_info[] __initdata = {
398 .name = "overo_lcd", 670#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
399 .id = -1, 671 defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
400}; 672 {
401 673 .modalias = "ads7846",
402static struct omap_lcd_config overo_lcd_config __initdata = { 674 .bus_num = 1,
403 .ctrl_name = "internal", 675 .chip_select = 0,
676 .max_speed_hz = 1500000,
677 .controller_data = &ads7846_mcspi_config,
678 .irq = OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN),
679 .platform_data = &ads7846_config,
680 },
681#endif
682#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \
683 defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE)
684 {
685 .modalias = "lgphilips_lb035q02_panel-spi",
686 .bus_num = 1,
687 .chip_select = 1,
688 .max_speed_hz = 500000,
689 .mode = SPI_MODE_3,
690 },
691#endif
404}; 692};
405 693
406static struct omap_board_config_kernel overo_config[] __initdata = { 694static int __init overo_spi_init(void)
407 { OMAP_TAG_LCD, &overo_lcd_config }, 695{
408}; 696 overo_ads7846_init();
697 spi_register_board_info(overo_spi_board_info,
698 ARRAY_SIZE(overo_spi_board_info));
699 return 0;
700}
409 701
410static void __init overo_init_early(void) 702static void __init overo_init_early(void)
411{ 703{
@@ -414,15 +706,10 @@ static void __init overo_init_early(void)
414 mt46h32m32lf6_sdrc_params); 706 mt46h32m32lf6_sdrc_params);
415} 707}
416 708
417static struct platform_device *overo_devices[] __initdata = {
418 &overo_lcd_device,
419};
420
421static const struct usbhs_omap_board_data usbhs_bdata __initconst = { 709static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
422 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, 710 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
423 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, 711 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
424 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, 712 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
425
426 .phy_reset = true, 713 .phy_reset = true,
427 .reset_gpio_port[0] = -EINVAL, 714 .reset_gpio_port[0] = -EINVAL,
428 .reset_gpio_port[1] = OVERO_GPIO_USBH_NRESET, 715 .reset_gpio_port[1] = OVERO_GPIO_USBH_NRESET,
@@ -444,16 +731,18 @@ static struct omap_musb_board_data musb_board_data = {
444static void __init overo_init(void) 731static void __init overo_init(void)
445{ 732{
446 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 733 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
447 omap_board_config = overo_config;
448 omap_board_config_size = ARRAY_SIZE(overo_config);
449 overo_i2c_init(); 734 overo_i2c_init();
450 platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices)); 735 omap_display_init(&overo_dss_data);
451 omap_serial_init(); 736 omap_serial_init();
452 overo_flash_init(); 737 overo_flash_init();
453 usb_musb_init(&musb_board_data); 738 usb_musb_init(&musb_board_data);
454 usbhs_init(&usbhs_bdata); 739 usbhs_init(&usbhs_bdata);
740 overo_spi_init();
455 overo_ads7846_init(); 741 overo_ads7846_init();
456 overo_init_smsc911x(); 742 overo_init_smsc911x();
743 overo_display_init();
744 overo_init_led();
745 overo_init_keys();
457 746
458 /* Ensure SDRC pins are mux'd for self-refresh */ 747 /* Ensure SDRC pins are mux'd for self-refresh */
459 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); 748 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 5f1900c532ec..bbcb6775a6a3 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -372,7 +372,7 @@ static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
372}; 372};
373 373
374static struct regulator_consumer_supply rx51_vdac_supply[] = { 374static struct regulator_consumer_supply rx51_vdac_supply[] = {
375 REGULATOR_SUPPLY("vdda_dac", "omapdss"), 375 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
376}; 376};
377 377
378static struct regulator_init_data rx51_vaux1 = { 378static struct regulator_init_data rx51_vaux1 = {
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 448ab60195d5..8dee7549fbdf 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -226,11 +226,13 @@ static struct omap2_hsmmc_info mmc[] = {
226 {} /* Terminator */ 226 {} /* Terminator */
227}; 227};
228 228
229static struct regulator_consumer_supply zoom_vpll2_supply = 229static struct regulator_consumer_supply zoom_vpll2_supplies[] = {
230 REGULATOR_SUPPLY("vdds_dsi", "omapdss"); 230 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
231 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
232};
231 233
232static struct regulator_consumer_supply zoom_vdda_dac_supply = 234static struct regulator_consumer_supply zoom_vdda_dac_supply =
233 REGULATOR_SUPPLY("vdda_dac", "omapdss"); 235 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
234 236
235static struct regulator_init_data zoom_vpll2 = { 237static struct regulator_init_data zoom_vpll2 = {
236 .constraints = { 238 .constraints = {
@@ -241,8 +243,8 @@ static struct regulator_init_data zoom_vpll2 = {
241 .valid_ops_mask = REGULATOR_CHANGE_MODE 243 .valid_ops_mask = REGULATOR_CHANGE_MODE
242 | REGULATOR_CHANGE_STATUS, 244 | REGULATOR_CHANGE_STATUS,
243 }, 245 },
244 .num_consumer_supplies = 1, 246 .num_consumer_supplies = ARRAY_SIZE(zoom_vpll2_supplies),
245 .consumer_supplies = &zoom_vpll2_supply, 247 .consumer_supplies = zoom_vpll2_supplies,
246}; 248};
247 249
248static struct regulator_init_data zoom_vdac = { 250static struct regulator_init_data zoom_vdac = {
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index b6f65d4ac97d..2926d028b6e9 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1804,10 +1804,10 @@ static struct omap_clk omap2420_clks[] = {
1804 CLK(NULL, "gfx_2d_fck", &gfx_2d_fck, CK_242X), 1804 CLK(NULL, "gfx_2d_fck", &gfx_2d_fck, CK_242X),
1805 CLK(NULL, "gfx_ick", &gfx_ick, CK_242X), 1805 CLK(NULL, "gfx_ick", &gfx_ick, CK_242X),
1806 /* DSS domain clocks */ 1806 /* DSS domain clocks */
1807 CLK("omapdss", "ick", &dss_ick, CK_242X), 1807 CLK("omapdss_dss", "ick", &dss_ick, CK_242X),
1808 CLK("omapdss", "dss1_fck", &dss1_fck, CK_242X), 1808 CLK("omapdss_dss", "fck", &dss1_fck, CK_242X),
1809 CLK("omapdss", "dss2_fck", &dss2_fck, CK_242X), 1809 CLK("omapdss_dss", "sys_clk", &dss2_fck, CK_242X),
1810 CLK("omapdss", "tv_fck", &dss_54m_fck, CK_242X), 1810 CLK("omapdss_dss", "tv_clk", &dss_54m_fck, CK_242X),
1811 /* L3 domain clocks */ 1811 /* L3 domain clocks */
1812 CLK(NULL, "core_l3_ck", &core_l3_ck, CK_242X), 1812 CLK(NULL, "core_l3_ck", &core_l3_ck, CK_242X),
1813 CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_242X), 1813 CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_242X),
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index bba018331a71..0c79d39e3021 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -1894,10 +1894,10 @@ static struct omap_clk omap2430_clks[] = {
1894 CLK(NULL, "mdm_ick", &mdm_ick, CK_243X), 1894 CLK(NULL, "mdm_ick", &mdm_ick, CK_243X),
1895 CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X), 1895 CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X),
1896 /* DSS domain clocks */ 1896 /* DSS domain clocks */
1897 CLK("omapdss", "ick", &dss_ick, CK_243X), 1897 CLK("omapdss_dss", "ick", &dss_ick, CK_243X),
1898 CLK("omapdss", "dss1_fck", &dss1_fck, CK_243X), 1898 CLK("omapdss_dss", "fck", &dss1_fck, CK_243X),
1899 CLK("omapdss", "dss2_fck", &dss2_fck, CK_243X), 1899 CLK("omapdss_dss", "sys_clk", &dss2_fck, CK_243X),
1900 CLK("omapdss", "tv_fck", &dss_54m_fck, CK_243X), 1900 CLK("omapdss_dss", "tv_clk", &dss_54m_fck, CK_243X),
1901 /* L3 domain clocks */ 1901 /* L3 domain clocks */
1902 CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X), 1902 CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X),
1903 CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X), 1903 CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X),
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index fcb321a64f13..75b119bd9cda 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3356,13 +3356,13 @@ static struct omap_clk omap3xxx_clks[] = {
3356 CLK("omap_rng", "ick", &rng_ick, CK_34XX | CK_36XX), 3356 CLK("omap_rng", "ick", &rng_ick, CK_34XX | CK_36XX),
3357 CLK(NULL, "sha11_ick", &sha11_ick, CK_34XX | CK_36XX), 3357 CLK(NULL, "sha11_ick", &sha11_ick, CK_34XX | CK_36XX),
3358 CLK(NULL, "des1_ick", &des1_ick, CK_34XX | CK_36XX), 3358 CLK(NULL, "des1_ick", &des1_ick, CK_34XX | CK_36XX),
3359 CLK("omapdss", "dss1_fck", &dss1_alwon_fck_3430es1, CK_3430ES1), 3359 CLK("omapdss_dss", "fck", &dss1_alwon_fck_3430es1, CK_3430ES1),
3360 CLK("omapdss", "dss1_fck", &dss1_alwon_fck_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3360 CLK("omapdss_dss", "fck", &dss1_alwon_fck_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3361 CLK("omapdss", "tv_fck", &dss_tv_fck, CK_3XXX), 3361 CLK("omapdss_dss", "tv_clk", &dss_tv_fck, CK_3XXX),
3362 CLK("omapdss", "video_fck", &dss_96m_fck, CK_3XXX), 3362 CLK("omapdss_dss", "video_clk", &dss_96m_fck, CK_3XXX),
3363 CLK("omapdss", "dss2_fck", &dss2_alwon_fck, CK_3XXX), 3363 CLK("omapdss_dss", "sys_clk", &dss2_alwon_fck, CK_3XXX),
3364 CLK("omapdss", "ick", &dss_ick_3430es1, CK_3430ES1), 3364 CLK("omapdss_dss", "ick", &dss_ick_3430es1, CK_3430ES1),
3365 CLK("omapdss", "ick", &dss_ick_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3365 CLK("omapdss_dss", "ick", &dss_ick_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3366 CLK(NULL, "cam_mclk", &cam_mclk, CK_34XX | CK_36XX), 3366 CLK(NULL, "cam_mclk", &cam_mclk, CK_34XX | CK_36XX),
3367 CLK(NULL, "cam_ick", &cam_ick, CK_34XX | CK_36XX), 3367 CLK(NULL, "cam_ick", &cam_ick, CK_34XX | CK_36XX),
3368 CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_34XX | CK_36XX), 3368 CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_34XX | CK_36XX),
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index d32ed979a8da..276992d3b7fb 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3114,11 +3114,16 @@ static struct omap_clk omap44xx_clks[] = {
3114 CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X), 3114 CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X),
3115 CLK(NULL, "dmic_fck", &dmic_fck, CK_443X), 3115 CLK(NULL, "dmic_fck", &dmic_fck, CK_443X),
3116 CLK(NULL, "dsp_fck", &dsp_fck, CK_443X), 3116 CLK(NULL, "dsp_fck", &dsp_fck, CK_443X),
3117 CLK(NULL, "dss_sys_clk", &dss_sys_clk, CK_443X), 3117 CLK("omapdss_dss", "sys_clk", &dss_sys_clk, CK_443X),
3118 CLK(NULL, "dss_tv_clk", &dss_tv_clk, CK_443X), 3118 CLK("omapdss_dss", "tv_clk", &dss_tv_clk, CK_443X),
3119 CLK(NULL, "dss_dss_clk", &dss_dss_clk, CK_443X), 3119 CLK("omapdss_dss", "dss_clk", &dss_dss_clk, CK_443X),
3120 CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, CK_443X), 3120 CLK("omapdss_dss", "video_clk", &dss_48mhz_clk, CK_443X),
3121 CLK(NULL, "dss_fck", &dss_fck, CK_443X), 3121 CLK("omapdss_dss", "fck", &dss_fck, CK_443X),
3122 /*
3123 * On OMAP4, DSS ick is a dummy clock; this is needed for compatibility
3124 * with OMAP2/3.
3125 */
3126 CLK("omapdss_dss", "ick", &dummy_ck, CK_443X),
3122 CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X), 3127 CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X),
3123 CLK(NULL, "emif1_fck", &emif1_fck, CK_443X), 3128 CLK(NULL, "emif1_fck", &emif1_fck, CK_443X),
3124 CLK(NULL, "emif2_fck", &emif2_fck, CK_443X), 3129 CLK(NULL, "emif2_fck", &emif2_fck, CK_443X),
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 0d2d6a9c303c..e97851492847 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -35,6 +35,7 @@
35 35
36#include "mux.h" 36#include "mux.h"
37#include "control.h" 37#include "control.h"
38#include "devices.h"
38 39
39#define L3_MODULES_MAX_LEN 12 40#define L3_MODULES_MAX_LEN 12
40#define L3_MODULES 3 41#define L3_MODULES 3
@@ -102,7 +103,7 @@ postcore_initcall(omap4_l3_init);
102 103
103#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) 104#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
104 105
105static struct resource cam_resources[] = { 106static struct resource omap2cam_resources[] = {
106 { 107 {
107 .start = OMAP24XX_CAMERA_BASE, 108 .start = OMAP24XX_CAMERA_BASE,
108 .end = OMAP24XX_CAMERA_BASE + 0xfff, 109 .end = OMAP24XX_CAMERA_BASE + 0xfff,
@@ -114,19 +115,13 @@ static struct resource cam_resources[] = {
114 } 115 }
115}; 116};
116 117
117static struct platform_device omap_cam_device = { 118static struct platform_device omap2cam_device = {
118 .name = "omap24xxcam", 119 .name = "omap24xxcam",
119 .id = -1, 120 .id = -1,
120 .num_resources = ARRAY_SIZE(cam_resources), 121 .num_resources = ARRAY_SIZE(omap2cam_resources),
121 .resource = cam_resources, 122 .resource = omap2cam_resources,
122}; 123};
123 124#endif
124static inline void omap_init_camera(void)
125{
126 platform_device_register(&omap_cam_device);
127}
128
129#elif defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
130 125
131static struct resource omap3isp_resources[] = { 126static struct resource omap3isp_resources[] = {
132 { 127 {
@@ -135,11 +130,6 @@ static struct resource omap3isp_resources[] = {
135 .flags = IORESOURCE_MEM, 130 .flags = IORESOURCE_MEM,
136 }, 131 },
137 { 132 {
138 .start = OMAP3430_ISP_CBUFF_BASE,
139 .end = OMAP3430_ISP_CBUFF_END,
140 .flags = IORESOURCE_MEM,
141 },
142 {
143 .start = OMAP3430_ISP_CCP2_BASE, 133 .start = OMAP3430_ISP_CCP2_BASE,
144 .end = OMAP3430_ISP_CCP2_END, 134 .end = OMAP3430_ISP_CCP2_END,
145 .flags = IORESOURCE_MEM, 135 .flags = IORESOURCE_MEM,
@@ -175,13 +165,33 @@ static struct resource omap3isp_resources[] = {
175 .flags = IORESOURCE_MEM, 165 .flags = IORESOURCE_MEM,
176 }, 166 },
177 { 167 {
178 .start = OMAP3430_ISP_CSI2A_BASE, 168 .start = OMAP3430_ISP_CSI2A_REGS1_BASE,
179 .end = OMAP3430_ISP_CSI2A_END, 169 .end = OMAP3430_ISP_CSI2A_REGS1_END,
170 .flags = IORESOURCE_MEM,
171 },
172 {
173 .start = OMAP3430_ISP_CSIPHY2_BASE,
174 .end = OMAP3430_ISP_CSIPHY2_END,
175 .flags = IORESOURCE_MEM,
176 },
177 {
178 .start = OMAP3630_ISP_CSI2A_REGS2_BASE,
179 .end = OMAP3630_ISP_CSI2A_REGS2_END,
180 .flags = IORESOURCE_MEM,
181 },
182 {
183 .start = OMAP3630_ISP_CSI2C_REGS1_BASE,
184 .end = OMAP3630_ISP_CSI2C_REGS1_END,
185 .flags = IORESOURCE_MEM,
186 },
187 {
188 .start = OMAP3630_ISP_CSIPHY1_BASE,
189 .end = OMAP3630_ISP_CSIPHY1_END,
180 .flags = IORESOURCE_MEM, 190 .flags = IORESOURCE_MEM,
181 }, 191 },
182 { 192 {
183 .start = OMAP3430_ISP_CSI2PHY_BASE, 193 .start = OMAP3630_ISP_CSI2C_REGS2_BASE,
184 .end = OMAP3430_ISP_CSI2PHY_END, 194 .end = OMAP3630_ISP_CSI2C_REGS2_END,
185 .flags = IORESOURCE_MEM, 195 .flags = IORESOURCE_MEM,
186 }, 196 },
187 { 197 {
@@ -197,15 +207,19 @@ static struct platform_device omap3isp_device = {
197 .resource = omap3isp_resources, 207 .resource = omap3isp_resources,
198}; 208};
199 209
200static inline void omap_init_camera(void) 210int omap3_init_camera(struct isp_platform_data *pdata)
201{ 211{
202 platform_device_register(&omap3isp_device); 212 omap3isp_device.dev.platform_data = pdata;
213 return platform_device_register(&omap3isp_device);
203} 214}
204#else 215
205static inline void omap_init_camera(void) 216static inline void omap_init_camera(void)
206{ 217{
207} 218#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
219 if (cpu_is_omap24xx())
220 platform_device_register(&omap2cam_device);
208#endif 221#endif
222}
209 223
210struct omap_device_pm_latency omap_keyboard_latency[] = { 224struct omap_device_pm_latency omap_keyboard_latency[] = {
211 { 225 {
diff --git a/arch/arm/mach-omap2/devices.h b/arch/arm/mach-omap2/devices.h
new file mode 100644
index 000000000000..f61eb6e5d136
--- /dev/null
+++ b/arch/arm/mach-omap2/devices.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/mach-omap2/devices.h
3 *
4 * OMAP2 platform device setup/initialization
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#ifndef __ARCH_ARM_MACH_OMAP_DEVICES_H
13#define __ARCH_ARM_MACH_OMAP_DEVICES_H
14
15struct isp_platform_data;
16
17int omap3_init_camera(struct isp_platform_data *pdata);
18
19#endif
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index b18db84b0349..256d23fb79ab 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -23,6 +23,8 @@
23#include <linux/err.h> 23#include <linux/err.h>
24 24
25#include <plat/display.h> 25#include <plat/display.h>
26#include <plat/omap_hwmod.h>
27#include <plat/omap_device.h>
26 28
27static struct platform_device omap_display_device = { 29static struct platform_device omap_display_device = {
28 .name = "omapdss", 30 .name = "omapdss",
@@ -32,9 +34,87 @@ static struct platform_device omap_display_device = {
32 }, 34 },
33}; 35};
34 36
37static struct omap_device_pm_latency omap_dss_latency[] = {
38 [0] = {
39 .deactivate_func = omap_device_idle_hwmods,
40 .activate_func = omap_device_enable_hwmods,
41 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
42 },
43};
44
45/* oh_core is used for getting opt-clocks */
46static struct omap_hwmod *oh_core;
47
48static bool opt_clock_available(const char *clk_role)
49{
50 int i;
51
52 for (i = 0; i < oh_core->opt_clks_cnt; i++) {
53 if (!strcmp(oh_core->opt_clks[i].role, clk_role))
54 return true;
55 }
56 return false;
57}
58
35int __init omap_display_init(struct omap_dss_board_info *board_data) 59int __init omap_display_init(struct omap_dss_board_info *board_data)
36{ 60{
37 int r = 0; 61 int r = 0;
62 struct omap_hwmod *oh;
63 struct omap_device *od;
64 int i;
65 struct omap_display_platform_data pdata;
66
67 /*
68 * omap: valid DSS hwmod names
69 * omap2,3,4: dss_core, dss_dispc, dss_rfbi, dss_venc
70 * omap3,4: dss_dsi1
71 * omap4: dss_dsi2, dss_hdmi
72 */
73 char *oh_name[] = { "dss_core", "dss_dispc", "dss_rfbi", "dss_venc",
74 "dss_dsi1", "dss_dsi2", "dss_hdmi" };
75 char *dev_name[] = { "omapdss_dss", "omapdss_dispc", "omapdss_rfbi",
76 "omapdss_venc", "omapdss_dsi1", "omapdss_dsi2",
77 "omapdss_hdmi" };
78 int oh_count;
79
80 memset(&pdata, 0, sizeof(pdata));
81
82 if (cpu_is_omap24xx())
83 oh_count = ARRAY_SIZE(oh_name) - 3;
84 /* last 3 hwmod dev in oh_name are not available for omap2 */
85 else if (cpu_is_omap44xx())
86 oh_count = ARRAY_SIZE(oh_name);
87 else
88 oh_count = ARRAY_SIZE(oh_name) - 2;
89 /* last 2 hwmod dev in oh_name are not available for omap3 */
90
91 /* opt_clks are always associated with dss hwmod */
92 oh_core = omap_hwmod_lookup("dss_core");
93 if (!oh_core) {
94 pr_err("Could not look up dss_core.\n");
95 return -ENODEV;
96 }
97
98 pdata.board_data = board_data;
99 pdata.board_data->get_last_off_on_transaction_id = NULL;
100 pdata.opt_clock_available = opt_clock_available;
101
102 for (i = 0; i < oh_count; i++) {
103 oh = omap_hwmod_lookup(oh_name[i]);
104 if (!oh) {
105 pr_err("Could not look up %s\n", oh_name[i]);
106 return -ENODEV;
107 }
108
109 od = omap_device_build(dev_name[i], -1, oh, &pdata,
110 sizeof(struct omap_display_platform_data),
111 omap_dss_latency,
112 ARRAY_SIZE(omap_dss_latency), 0);
113
114 if (WARN((IS_ERR(od)), "Could not build omap_device for %s\n",
115 oh_name[i]))
116 return -ENODEV;
117 }
38 omap_display_device.dev.platform_data = board_data; 118 omap_display_device.dev.platform_data = board_data;
39 119
40 r = platform_device_register(&omap_display_device); 120 r = platform_device_register(&omap_display_device);
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 62823467163b..8eb3ce1bbfbe 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -1168,11 +1168,6 @@ static struct omap_hwmod_class omap2420_dss_hwmod_class = {
1168 .sysc = &omap2420_dss_sysc, 1168 .sysc = &omap2420_dss_sysc,
1169}; 1169};
1170 1170
1171/* dss */
1172static struct omap_hwmod_irq_info omap2420_dss_irqs[] = {
1173 { .irq = 25 },
1174};
1175
1176static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = { 1171static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = {
1177 { .name = "dispc", .dma_req = 5 }, 1172 { .name = "dispc", .dma_req = 5 },
1178}; 1173};
@@ -1221,8 +1216,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = {
1221 .name = "dss_core", 1216 .name = "dss_core",
1222 .class = &omap2420_dss_hwmod_class, 1217 .class = &omap2420_dss_hwmod_class,
1223 .main_clk = "dss1_fck", /* instead of dss_fck */ 1218 .main_clk = "dss1_fck", /* instead of dss_fck */
1224 .mpu_irqs = omap2420_dss_irqs,
1225 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dss_irqs),
1226 .sdma_reqs = omap2420_dss_sdma_chs, 1219 .sdma_reqs = omap2420_dss_sdma_chs,
1227 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_dss_sdma_chs), 1220 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_dss_sdma_chs),
1228 .prcm = { 1221 .prcm = {
@@ -1265,6 +1258,10 @@ static struct omap_hwmod_class omap2420_dispc_hwmod_class = {
1265 .sysc = &omap2420_dispc_sysc, 1258 .sysc = &omap2420_dispc_sysc,
1266}; 1259};
1267 1260
1261static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = {
1262 { .irq = 25 },
1263};
1264
1268static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = { 1265static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = {
1269 { 1266 {
1270 .pa_start = 0x48050400, 1267 .pa_start = 0x48050400,
@@ -1297,6 +1294,8 @@ static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = {
1297static struct omap_hwmod omap2420_dss_dispc_hwmod = { 1294static struct omap_hwmod omap2420_dss_dispc_hwmod = {
1298 .name = "dss_dispc", 1295 .name = "dss_dispc",
1299 .class = &omap2420_dispc_hwmod_class, 1296 .class = &omap2420_dispc_hwmod_class,
1297 .mpu_irqs = omap2420_dispc_irqs,
1298 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dispc_irqs),
1300 .main_clk = "dss1_fck", 1299 .main_clk = "dss1_fck",
1301 .prcm = { 1300 .prcm = {
1302 .omap2 = { 1301 .omap2 = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 0fdf2cabfb12..a860fb5024c2 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -1268,10 +1268,6 @@ static struct omap_hwmod_class omap2430_dss_hwmod_class = {
1268 .sysc = &omap2430_dss_sysc, 1268 .sysc = &omap2430_dss_sysc,
1269}; 1269};
1270 1270
1271/* dss */
1272static struct omap_hwmod_irq_info omap2430_dss_irqs[] = {
1273 { .irq = 25 },
1274};
1275static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = { 1271static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = {
1276 { .name = "dispc", .dma_req = 5 }, 1272 { .name = "dispc", .dma_req = 5 },
1277}; 1273};
@@ -1314,8 +1310,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = {
1314 .name = "dss_core", 1310 .name = "dss_core",
1315 .class = &omap2430_dss_hwmod_class, 1311 .class = &omap2430_dss_hwmod_class,
1316 .main_clk = "dss1_fck", /* instead of dss_fck */ 1312 .main_clk = "dss1_fck", /* instead of dss_fck */
1317 .mpu_irqs = omap2430_dss_irqs,
1318 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dss_irqs),
1319 .sdma_reqs = omap2430_dss_sdma_chs, 1313 .sdma_reqs = omap2430_dss_sdma_chs,
1320 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_dss_sdma_chs), 1314 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_dss_sdma_chs),
1321 .prcm = { 1315 .prcm = {
@@ -1358,6 +1352,10 @@ static struct omap_hwmod_class omap2430_dispc_hwmod_class = {
1358 .sysc = &omap2430_dispc_sysc, 1352 .sysc = &omap2430_dispc_sysc,
1359}; 1353};
1360 1354
1355static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = {
1356 { .irq = 25 },
1357};
1358
1361static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = { 1359static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = {
1362 { 1360 {
1363 .pa_start = 0x48050400, 1361 .pa_start = 0x48050400,
@@ -1384,6 +1382,8 @@ static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = {
1384static struct omap_hwmod omap2430_dss_dispc_hwmod = { 1382static struct omap_hwmod omap2430_dss_dispc_hwmod = {
1385 .name = "dss_dispc", 1383 .name = "dss_dispc",
1386 .class = &omap2430_dispc_hwmod_class, 1384 .class = &omap2430_dispc_hwmod_class,
1385 .mpu_irqs = omap2430_dispc_irqs,
1386 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dispc_irqs),
1387 .main_clk = "dss1_fck", 1387 .main_clk = "dss1_fck",
1388 .prcm = { 1388 .prcm = {
1389 .omap2 = { 1389 .omap2 = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index c819c306693a..b98e2dfcba28 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1480,11 +1480,6 @@ static struct omap_hwmod_class omap3xxx_dss_hwmod_class = {
1480 .sysc = &omap3xxx_dss_sysc, 1480 .sysc = &omap3xxx_dss_sysc,
1481}; 1481};
1482 1482
1483/* dss */
1484static struct omap_hwmod_irq_info omap3xxx_dss_irqs[] = {
1485 { .irq = 25 },
1486};
1487
1488static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { 1483static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = {
1489 { .name = "dispc", .dma_req = 5 }, 1484 { .name = "dispc", .dma_req = 5 },
1490 { .name = "dsi1", .dma_req = 74 }, 1485 { .name = "dsi1", .dma_req = 74 },
@@ -1548,7 +1543,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_slaves[] = {
1548 1543
1549static struct omap_hwmod_opt_clk dss_opt_clks[] = { 1544static struct omap_hwmod_opt_clk dss_opt_clks[] = {
1550 { .role = "tv_clk", .clk = "dss_tv_fck" }, 1545 { .role = "tv_clk", .clk = "dss_tv_fck" },
1551 { .role = "dssclk", .clk = "dss_96m_fck" }, 1546 { .role = "video_clk", .clk = "dss_96m_fck" },
1552 { .role = "sys_clk", .clk = "dss2_alwon_fck" }, 1547 { .role = "sys_clk", .clk = "dss2_alwon_fck" },
1553}; 1548};
1554 1549
@@ -1556,8 +1551,6 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = {
1556 .name = "dss_core", 1551 .name = "dss_core",
1557 .class = &omap3xxx_dss_hwmod_class, 1552 .class = &omap3xxx_dss_hwmod_class,
1558 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ 1553 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */
1559 .mpu_irqs = omap3xxx_dss_irqs,
1560 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dss_irqs),
1561 .sdma_reqs = omap3xxx_dss_sdma_chs, 1554 .sdma_reqs = omap3xxx_dss_sdma_chs,
1562 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), 1555 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs),
1563 1556
@@ -1584,8 +1577,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = {
1584 .name = "dss_core", 1577 .name = "dss_core",
1585 .class = &omap3xxx_dss_hwmod_class, 1578 .class = &omap3xxx_dss_hwmod_class,
1586 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ 1579 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */
1587 .mpu_irqs = omap3xxx_dss_irqs,
1588 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dss_irqs),
1589 .sdma_reqs = omap3xxx_dss_sdma_chs, 1580 .sdma_reqs = omap3xxx_dss_sdma_chs,
1590 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), 1581 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs),
1591 1582
@@ -1631,6 +1622,10 @@ static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = {
1631 .sysc = &omap3xxx_dispc_sysc, 1622 .sysc = &omap3xxx_dispc_sysc,
1632}; 1623};
1633 1624
1625static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = {
1626 { .irq = 25 },
1627};
1628
1634static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = { 1629static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = {
1635 { 1630 {
1636 .pa_start = 0x48050400, 1631 .pa_start = 0x48050400,
@@ -1664,6 +1659,8 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = {
1664static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { 1659static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
1665 .name = "dss_dispc", 1660 .name = "dss_dispc",
1666 .class = &omap3xxx_dispc_hwmod_class, 1661 .class = &omap3xxx_dispc_hwmod_class,
1662 .mpu_irqs = omap3xxx_dispc_irqs,
1663 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dispc_irqs),
1667 .main_clk = "dss1_alwon_fck", 1664 .main_clk = "dss1_alwon_fck",
1668 .prcm = { 1665 .prcm = {
1669 .omap2 = { 1666 .omap2 = {
@@ -1689,6 +1686,10 @@ static struct omap_hwmod_class omap3xxx_dsi_hwmod_class = {
1689 .name = "dsi", 1686 .name = "dsi",
1690}; 1687};
1691 1688
1689static struct omap_hwmod_irq_info omap3xxx_dsi1_irqs[] = {
1690 { .irq = 25 },
1691};
1692
1692/* dss_dsi1 */ 1693/* dss_dsi1 */
1693static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = { 1694static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = {
1694 { 1695 {
@@ -1722,6 +1723,8 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dsi1_slaves[] = {
1722static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { 1723static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
1723 .name = "dss_dsi1", 1724 .name = "dss_dsi1",
1724 .class = &omap3xxx_dsi_hwmod_class, 1725 .class = &omap3xxx_dsi_hwmod_class,
1726 .mpu_irqs = omap3xxx_dsi1_irqs,
1727 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dsi1_irqs),
1725 .main_clk = "dss1_alwon_fck", 1728 .main_clk = "dss1_alwon_fck",
1726 .prcm = { 1729 .prcm = {
1727 .omap2 = { 1730 .omap2 = {
diff --git a/arch/arm/mach-omap2/timer-mpu.c b/arch/arm/mach-omap2/timer-mpu.c
index 954682e64399..31c0ac4cd66a 100644
--- a/arch/arm/mach-omap2/timer-mpu.c
+++ b/arch/arm/mach-omap2/timer-mpu.c
@@ -26,9 +26,14 @@
26/* 26/*
27 * Setup the local clock events for a CPU. 27 * Setup the local clock events for a CPU.
28 */ 28 */
29void __cpuinit local_timer_setup(struct clock_event_device *evt) 29int __cpuinit local_timer_setup(struct clock_event_device *evt)
30{ 30{
31 /* Local timers are not supprted on OMAP4430 ES1.0 */
32 if (omap_rev() == OMAP4430_REV_ES1_0)
33 return -ENXIO;
34
31 evt->irq = OMAP44XX_IRQ_LOCALTIMER; 35 evt->irq = OMAP44XX_IRQ_LOCALTIMER;
32 twd_timer_setup(evt); 36 twd_timer_setup(evt);
37 return 0;
33} 38}
34 39
diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c
index 3499fada73ae..4cb069fd9af2 100644
--- a/arch/arm/mach-pxa/am200epd.c
+++ b/arch/arm/mach-pxa/am200epd.c
@@ -128,8 +128,8 @@ static int am200_init_gpio_regs(struct metronomefb_par *par)
128 return 0; 128 return 0;
129 129
130err_req_gpio: 130err_req_gpio:
131 while (i > 0) 131 while (--i >= 0)
132 gpio_free(gpios[i--]); 132 gpio_free(gpios[i]);
133 133
134 return err; 134 return err;
135} 135}
@@ -194,7 +194,7 @@ static struct notifier_block am200_fb_notif = {
194}; 194};
195 195
196/* this gets called as part of our init. these steps must be done now so 196/* this gets called as part of our init. these steps must be done now so
197 * that we can use set_pxa_fb_info */ 197 * that we can use pxa_set_fb_info */
198static void __init am200_presetup_fb(void) 198static void __init am200_presetup_fb(void)
199{ 199{
200 int fw; 200 int fw;
@@ -249,7 +249,7 @@ static void __init am200_presetup_fb(void)
249 /* we divide since we told the LCD controller we're 16bpp */ 249 /* we divide since we told the LCD controller we're 16bpp */
250 am200_fb_info.modes->xres /= 2; 250 am200_fb_info.modes->xres /= 2;
251 251
252 set_pxa_fb_info(&am200_fb_info); 252 pxa_set_fb_info(NULL, &am200_fb_info);
253 253
254} 254}
255 255
diff --git a/arch/arm/mach-pxa/am300epd.c b/arch/arm/mach-pxa/am300epd.c
index 993d75e66390..fa8bad235d9f 100644
--- a/arch/arm/mach-pxa/am300epd.c
+++ b/arch/arm/mach-pxa/am300epd.c
@@ -125,10 +125,7 @@ static int am300_init_gpio_regs(struct broadsheetfb_par *par)
125 if (err) { 125 if (err) {
126 dev_err(&am300_device->dev, "failed requesting " 126 dev_err(&am300_device->dev, "failed requesting "
127 "gpio %d, err=%d\n", i, err); 127 "gpio %d, err=%d\n", i, err);
128 while (i >= DB0_GPIO_PIN) 128 goto err_req_gpio2;
129 gpio_free(i--);
130 i = ARRAY_SIZE(gpios) - 1;
131 goto err_req_gpio;
132 } 129 }
133 } 130 }
134 131
@@ -159,9 +156,13 @@ static int am300_init_gpio_regs(struct broadsheetfb_par *par)
159 156
160 return 0; 157 return 0;
161 158
159err_req_gpio2:
160 while (--i >= DB0_GPIO_PIN)
161 gpio_free(i);
162 i = ARRAY_SIZE(gpios);
162err_req_gpio: 163err_req_gpio:
163 while (i > 0) 164 while (--i >= 0)
164 gpio_free(gpios[i--]); 165 gpio_free(gpios[i]);
165 166
166 return err; 167 return err;
167} 168}
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index d2af73321dae..c6661b1d30b2 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -263,7 +263,7 @@ static void __init balloon3_lcd_init(void)
263 } 263 }
264 264
265 balloon3_lcd_screen.pxafb_backlight_power = balloon3_backlight_power; 265 balloon3_lcd_screen.pxafb_backlight_power = balloon3_backlight_power;
266 set_pxa_fb_info(&balloon3_lcd_screen); 266 pxa_set_fb_info(NULL, &balloon3_lcd_screen);
267 return; 267 return;
268 268
269err2: 269err2:
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index b734d8468168..8225e2e58c6e 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -379,7 +379,7 @@ __setup("monitor=", cmx2xx_set_display);
379 379
380static void __init cmx2xx_init_display(void) 380static void __init cmx2xx_init_display(void)
381{ 381{
382 set_pxa_fb_info(cmx2xx_display); 382 pxa_set_fb_info(NULL, cmx2xx_display);
383} 383}
384#else 384#else
385static inline void cmx2xx_init_display(void) {} 385static inline void cmx2xx_init_display(void) {}
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index bfca7ed2fea3..7a8edba0dcdf 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -296,7 +296,7 @@ static struct pxafb_mach_info cm_x300_lcd = {
296 296
297static void __init cm_x300_init_lcd(void) 297static void __init cm_x300_init_lcd(void)
298{ 298{
299 set_pxa_fb_info(&cm_x300_lcd); 299 pxa_set_fb_info(NULL, &cm_x300_lcd);
300} 300}
301#else 301#else
302static inline void cm_x300_init_lcd(void) {} 302static inline void cm_x300_init_lcd(void) {}
diff --git a/arch/arm/mach-pxa/colibri-pxa270-income.c b/arch/arm/mach-pxa/colibri-pxa270-income.c
index ee797397dc5b..44c1b77ece67 100644
--- a/arch/arm/mach-pxa/colibri-pxa270-income.c
+++ b/arch/arm/mach-pxa/colibri-pxa270-income.c
@@ -175,7 +175,7 @@ static struct pxafb_mach_info income_lcd_screen = {
175 175
176static void __init income_lcd_init(void) 176static void __init income_lcd_init(void)
177{ 177{
178 set_pxa_fb_info(&income_lcd_screen); 178 pxa_set_fb_info(NULL, &income_lcd_screen);
179} 179}
180#else 180#else
181static inline void income_lcd_init(void) {} 181static inline void income_lcd_init(void) {}
diff --git a/arch/arm/mach-pxa/colibri-pxa3xx.c b/arch/arm/mach-pxa/colibri-pxa3xx.c
index 96b2d9fbfef0..3f9be419959d 100644
--- a/arch/arm/mach-pxa/colibri-pxa3xx.c
+++ b/arch/arm/mach-pxa/colibri-pxa3xx.c
@@ -105,7 +105,7 @@ void __init colibri_pxa3xx_init_lcd(int bl_pin)
105 lcd_bl_pin = bl_pin; 105 lcd_bl_pin = bl_pin;
106 gpio_request(bl_pin, "lcd backlight"); 106 gpio_request(bl_pin, "lcd backlight");
107 gpio_direction_output(bl_pin, 0); 107 gpio_direction_output(bl_pin, 0);
108 set_pxa_fb_info(&sharp_lq43_info); 108 pxa_set_fb_info(NULL, &sharp_lq43_info);
109} 109}
110#endif 110#endif
111 111
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index d4e705caefea..3a5507e31919 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -462,7 +462,6 @@ static struct pxaficp_platform_data corgi_ficp_platform_data = {
462 * USB Device Controller 462 * USB Device Controller
463 */ 463 */
464static struct pxa2xx_udc_mach_info udc_info __initdata = { 464static struct pxa2xx_udc_mach_info udc_info __initdata = {
465 .gpio_vbus = -1,
466 /* no connect GPIO; corgi can't tell connection status */ 465 /* no connect GPIO; corgi can't tell connection status */
467 .gpio_pullup = CORGI_GPIO_USB_PULLUP, 466 .gpio_pullup = CORGI_GPIO_USB_PULLUP,
468}; 467};
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index c4bf08b3eb61..2e0425404de5 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -90,7 +90,6 @@ void __init pxa_set_mci_info(struct pxamci_platform_data *info)
90 90
91static struct pxa2xx_udc_mach_info pxa_udc_info = { 91static struct pxa2xx_udc_mach_info pxa_udc_info = {
92 .gpio_pullup = -1, 92 .gpio_pullup = -1,
93 .gpio_vbus = -1,
94}; 93};
95 94
96void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info) 95void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
@@ -188,16 +187,12 @@ struct platform_device pxa_device_fb = {
188 .resource = pxafb_resources, 187 .resource = pxafb_resources,
189}; 188};
190 189
191void __init set_pxa_fb_info(struct pxafb_mach_info *info) 190void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
192{ 191{
192 pxa_device_fb.dev.parent = parent;
193 pxa_register_device(&pxa_device_fb, info); 193 pxa_register_device(&pxa_device_fb, info);
194} 194}
195 195
196void __init set_pxa_fb_parent(struct device *parent_dev)
197{
198 pxa_device_fb.dev.parent = parent_dev;
199}
200
201static struct resource pxa_resource_ffuart[] = { 196static struct resource pxa_resource_ffuart[] = {
202 { 197 {
203 .start = 0x40100000, 198 .start = 0x40100000,
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index b411d7cbf5a1..f8a6e9d79a3a 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -689,7 +689,7 @@ static struct pxafb_mach_info em_x270_lcd = {
689 689
690static void __init em_x270_init_lcd(void) 690static void __init em_x270_init_lcd(void)
691{ 691{
692 set_pxa_fb_info(&em_x270_lcd); 692 pxa_set_fb_info(NULL, &em_x270_lcd);
693} 693}
694#else 694#else
695static inline void em_x270_init_lcd(void) {} 695static inline void em_x270_init_lcd(void) {}
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index edca0a043293..2e3970fdde0b 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -20,6 +20,7 @@
20#include <linux/mfd/t7l66xb.h> 20#include <linux/mfd/t7l66xb.h>
21#include <linux/mtd/nand.h> 21#include <linux/mtd/nand.h>
22#include <linux/mtd/partitions.h> 22#include <linux/mtd/partitions.h>
23#include <linux/usb/gpio_vbus.h>
23 24
24#include <video/w100fb.h> 25#include <video/w100fb.h>
25 26
@@ -51,12 +52,20 @@ void __init eseries_fixup(struct machine_desc *desc,
51 mi->bank[0].size = (64*1024*1024); 52 mi->bank[0].size = (64*1024*1024);
52} 53}
53 54
54struct pxa2xx_udc_mach_info e7xx_udc_mach_info = { 55struct gpio_vbus_mach_info e7xx_udc_info = {
55 .gpio_vbus = GPIO_E7XX_USB_DISC, 56 .gpio_vbus = GPIO_E7XX_USB_DISC,
56 .gpio_pullup = GPIO_E7XX_USB_PULLUP, 57 .gpio_pullup = GPIO_E7XX_USB_PULLUP,
57 .gpio_pullup_inverted = 1 58 .gpio_pullup_inverted = 1
58}; 59};
59 60
61static struct platform_device e7xx_gpio_vbus = {
62 .name = "gpio-vbus",
63 .id = -1,
64 .dev = {
65 .platform_data = &e7xx_udc_info,
66 },
67};
68
60struct pxaficp_platform_data e7xx_ficp_platform_data = { 69struct pxaficp_platform_data e7xx_ficp_platform_data = {
61 .gpio_pwdown = GPIO_E7XX_IR_OFF, 70 .gpio_pwdown = GPIO_E7XX_IR_OFF,
62 .transceiver_cap = IR_SIRMODE | IR_OFF, 71 .transceiver_cap = IR_SIRMODE | IR_OFF,
@@ -165,6 +174,7 @@ static struct platform_device e330_tc6387xb_device = {
165 174
166static struct platform_device *e330_devices[] __initdata = { 175static struct platform_device *e330_devices[] __initdata = {
167 &e330_tc6387xb_device, 176 &e330_tc6387xb_device,
177 &e7xx_gpio_vbus,
168}; 178};
169 179
170static void __init e330_init(void) 180static void __init e330_init(void)
@@ -175,7 +185,6 @@ static void __init e330_init(void)
175 eseries_register_clks(); 185 eseries_register_clks();
176 eseries_get_tmio_gpios(); 186 eseries_get_tmio_gpios();
177 platform_add_devices(ARRAY_AND_SIZE(e330_devices)); 187 platform_add_devices(ARRAY_AND_SIZE(e330_devices));
178 pxa_set_udc_info(&e7xx_udc_mach_info);
179} 188}
180 189
181MACHINE_START(E330, "Toshiba e330") 190MACHINE_START(E330, "Toshiba e330")
@@ -214,6 +223,7 @@ static struct platform_device e350_t7l66xb_device = {
214 223
215static struct platform_device *e350_devices[] __initdata = { 224static struct platform_device *e350_devices[] __initdata = {
216 &e350_t7l66xb_device, 225 &e350_t7l66xb_device,
226 &e7xx_gpio_vbus,
217}; 227};
218 228
219static void __init e350_init(void) 229static void __init e350_init(void)
@@ -224,7 +234,6 @@ static void __init e350_init(void)
224 eseries_register_clks(); 234 eseries_register_clks();
225 eseries_get_tmio_gpios(); 235 eseries_get_tmio_gpios();
226 platform_add_devices(ARRAY_AND_SIZE(e350_devices)); 236 platform_add_devices(ARRAY_AND_SIZE(e350_devices));
227 pxa_set_udc_info(&e7xx_udc_mach_info);
228} 237}
229 238
230MACHINE_START(E350, "Toshiba e350") 239MACHINE_START(E350, "Toshiba e350")
@@ -333,6 +342,7 @@ static struct platform_device e400_t7l66xb_device = {
333 342
334static struct platform_device *e400_devices[] __initdata = { 343static struct platform_device *e400_devices[] __initdata = {
335 &e400_t7l66xb_device, 344 &e400_t7l66xb_device,
345 &e7xx_gpio_vbus,
336}; 346};
337 347
338static void __init e400_init(void) 348static void __init e400_init(void)
@@ -344,9 +354,8 @@ static void __init e400_init(void)
344 /* Fixme - e400 may have a switched clock */ 354 /* Fixme - e400 may have a switched clock */
345 eseries_register_clks(); 355 eseries_register_clks();
346 eseries_get_tmio_gpios(); 356 eseries_get_tmio_gpios();
347 set_pxa_fb_info(&e400_pxafb_mach_info); 357 pxa_set_fb_info(NULL, &e400_pxafb_mach_info);
348 platform_add_devices(ARRAY_AND_SIZE(e400_devices)); 358 platform_add_devices(ARRAY_AND_SIZE(e400_devices));
349 pxa_set_udc_info(&e7xx_udc_mach_info);
350} 359}
351 360
352MACHINE_START(E400, "Toshiba e400") 361MACHINE_START(E400, "Toshiba e400")
@@ -519,6 +528,7 @@ static struct platform_device e740_t7l66xb_device = {
519static struct platform_device *e740_devices[] __initdata = { 528static struct platform_device *e740_devices[] __initdata = {
520 &e740_fb_device, 529 &e740_fb_device,
521 &e740_t7l66xb_device, 530 &e740_t7l66xb_device,
531 &e7xx_gpio_vbus,
522}; 532};
523 533
524static void __init e740_init(void) 534static void __init e740_init(void)
@@ -532,7 +542,6 @@ static void __init e740_init(void)
532 "UDCCLK", &pxa25x_device_udc.dev), 542 "UDCCLK", &pxa25x_device_udc.dev),
533 eseries_get_tmio_gpios(); 543 eseries_get_tmio_gpios();
534 platform_add_devices(ARRAY_AND_SIZE(e740_devices)); 544 platform_add_devices(ARRAY_AND_SIZE(e740_devices));
535 pxa_set_udc_info(&e7xx_udc_mach_info);
536 pxa_set_ac97_info(NULL); 545 pxa_set_ac97_info(NULL);
537 pxa_set_ficp_info(&e7xx_ficp_platform_data); 546 pxa_set_ficp_info(&e7xx_ficp_platform_data);
538} 547}
@@ -711,6 +720,7 @@ static struct platform_device e750_tc6393xb_device = {
711static struct platform_device *e750_devices[] __initdata = { 720static struct platform_device *e750_devices[] __initdata = {
712 &e750_fb_device, 721 &e750_fb_device,
713 &e750_tc6393xb_device, 722 &e750_tc6393xb_device,
723 &e7xx_gpio_vbus,
714}; 724};
715 725
716static void __init e750_init(void) 726static void __init e750_init(void)
@@ -723,7 +733,6 @@ static void __init e750_init(void)
723 "GPIO11_CLK", NULL), 733 "GPIO11_CLK", NULL),
724 eseries_get_tmio_gpios(); 734 eseries_get_tmio_gpios();
725 platform_add_devices(ARRAY_AND_SIZE(e750_devices)); 735 platform_add_devices(ARRAY_AND_SIZE(e750_devices));
726 pxa_set_udc_info(&e7xx_udc_mach_info);
727 pxa_set_ac97_info(NULL); 736 pxa_set_ac97_info(NULL);
728 pxa_set_ficp_info(&e7xx_ficp_platform_data); 737 pxa_set_ficp_info(&e7xx_ficp_platform_data);
729} 738}
@@ -873,12 +882,21 @@ static struct platform_device e800_fb_device = {
873 882
874/* --------------------------- UDC definitions --------------------------- */ 883/* --------------------------- UDC definitions --------------------------- */
875 884
876static struct pxa2xx_udc_mach_info e800_udc_mach_info = { 885static struct gpio_vbus_mach_info e800_udc_info = {
877 .gpio_vbus = GPIO_E800_USB_DISC, 886 .gpio_vbus = GPIO_E800_USB_DISC,
878 .gpio_pullup = GPIO_E800_USB_PULLUP, 887 .gpio_pullup = GPIO_E800_USB_PULLUP,
879 .gpio_pullup_inverted = 1 888 .gpio_pullup_inverted = 1
880}; 889};
881 890
891static struct platform_device e800_gpio_vbus = {
892 .name = "gpio-vbus",
893 .id = -1,
894 .dev = {
895 .platform_data = &e800_udc_info,
896 },
897};
898
899
882/* ----------------- e800 tc6393xb parameters ------------------ */ 900/* ----------------- e800 tc6393xb parameters ------------------ */
883 901
884static struct tc6393xb_platform_data e800_tc6393xb_info = { 902static struct tc6393xb_platform_data e800_tc6393xb_info = {
@@ -907,6 +925,7 @@ static struct platform_device e800_tc6393xb_device = {
907static struct platform_device *e800_devices[] __initdata = { 925static struct platform_device *e800_devices[] __initdata = {
908 &e800_fb_device, 926 &e800_fb_device,
909 &e800_tc6393xb_device, 927 &e800_tc6393xb_device,
928 &e800_gpio_vbus,
910}; 929};
911 930
912static void __init e800_init(void) 931static void __init e800_init(void)
@@ -919,7 +938,6 @@ static void __init e800_init(void)
919 "GPIO11_CLK", NULL), 938 "GPIO11_CLK", NULL),
920 eseries_get_tmio_gpios(); 939 eseries_get_tmio_gpios();
921 platform_add_devices(ARRAY_AND_SIZE(e800_devices)); 940 platform_add_devices(ARRAY_AND_SIZE(e800_devices));
922 pxa_set_udc_info(&e800_udc_mach_info);
923 pxa_set_ac97_info(NULL); 941 pxa_set_ac97_info(NULL);
924} 942}
925 943
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
index 93f05e024313..d88aed8fbe15 100644
--- a/arch/arm/mach-pxa/ezx.c
+++ b/arch/arm/mach-pxa/ezx.c
@@ -783,7 +783,7 @@ static void __init a780_init(void)
783 783
784 pxa_set_i2c_info(NULL); 784 pxa_set_i2c_info(NULL);
785 785
786 set_pxa_fb_info(&ezx_fb_info_1); 786 pxa_set_fb_info(NULL, &ezx_fb_info_1);
787 787
788 pxa_set_keypad_info(&a780_keypad_platform_data); 788 pxa_set_keypad_info(&a780_keypad_platform_data);
789 789
@@ -853,7 +853,7 @@ static void __init e680_init(void)
853 pxa_set_i2c_info(NULL); 853 pxa_set_i2c_info(NULL);
854 i2c_register_board_info(0, ARRAY_AND_SIZE(e680_i2c_board_info)); 854 i2c_register_board_info(0, ARRAY_AND_SIZE(e680_i2c_board_info));
855 855
856 set_pxa_fb_info(&ezx_fb_info_1); 856 pxa_set_fb_info(NULL, &ezx_fb_info_1);
857 857
858 pxa_set_keypad_info(&e680_keypad_platform_data); 858 pxa_set_keypad_info(&e680_keypad_platform_data);
859 859
@@ -918,7 +918,7 @@ static void __init a1200_init(void)
918 pxa_set_i2c_info(NULL); 918 pxa_set_i2c_info(NULL);
919 i2c_register_board_info(0, ARRAY_AND_SIZE(a1200_i2c_board_info)); 919 i2c_register_board_info(0, ARRAY_AND_SIZE(a1200_i2c_board_info));
920 920
921 set_pxa_fb_info(&ezx_fb_info_2); 921 pxa_set_fb_info(NULL, &ezx_fb_info_2);
922 922
923 pxa_set_keypad_info(&a1200_keypad_platform_data); 923 pxa_set_keypad_info(&a1200_keypad_platform_data);
924 924
@@ -1103,7 +1103,7 @@ static void __init a910_init(void)
1103 pxa_set_i2c_info(NULL); 1103 pxa_set_i2c_info(NULL);
1104 i2c_register_board_info(0, ARRAY_AND_SIZE(a910_i2c_board_info)); 1104 i2c_register_board_info(0, ARRAY_AND_SIZE(a910_i2c_board_info));
1105 1105
1106 set_pxa_fb_info(&ezx_fb_info_2); 1106 pxa_set_fb_info(NULL, &ezx_fb_info_2);
1107 1107
1108 pxa_set_keypad_info(&a910_keypad_platform_data); 1108 pxa_set_keypad_info(&a910_keypad_platform_data);
1109 1109
@@ -1173,7 +1173,7 @@ static void __init e6_init(void)
1173 pxa_set_i2c_info(NULL); 1173 pxa_set_i2c_info(NULL);
1174 i2c_register_board_info(0, ARRAY_AND_SIZE(e6_i2c_board_info)); 1174 i2c_register_board_info(0, ARRAY_AND_SIZE(e6_i2c_board_info));
1175 1175
1176 set_pxa_fb_info(&ezx_fb_info_2); 1176 pxa_set_fb_info(NULL, &ezx_fb_info_2);
1177 1177
1178 pxa_set_keypad_info(&e6_keypad_platform_data); 1178 pxa_set_keypad_info(&e6_keypad_platform_data);
1179 1179
@@ -1212,7 +1212,7 @@ static void __init e2_init(void)
1212 pxa_set_i2c_info(NULL); 1212 pxa_set_i2c_info(NULL);
1213 i2c_register_board_info(0, ARRAY_AND_SIZE(e2_i2c_board_info)); 1213 i2c_register_board_info(0, ARRAY_AND_SIZE(e2_i2c_board_info));
1214 1214
1215 set_pxa_fb_info(&ezx_fb_info_2); 1215 pxa_set_fb_info(NULL, &ezx_fb_info_2);
1216 1216
1217 pxa_set_keypad_info(&e2_keypad_platform_data); 1217 pxa_set_keypad_info(&e2_keypad_platform_data);
1218 1218
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index 6fd319ea5284..d65e4bde9b91 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -26,6 +26,7 @@
26#include <linux/gpio.h> 26#include <linux/gpio.h>
27#include <linux/err.h> 27#include <linux/err.h>
28#include <linux/clk.h> 28#include <linux/clk.h>
29#include <linux/usb/gpio_vbus.h>
29 30
30#include <asm/setup.h> 31#include <asm/setup.h>
31#include <asm/memory.h> 32#include <asm/memory.h>
@@ -106,14 +107,22 @@ static void __init gumstix_mmc_init(void)
106#endif 107#endif
107 108
108#ifdef CONFIG_USB_GADGET_PXA25X 109#ifdef CONFIG_USB_GADGET_PXA25X
109static struct pxa2xx_udc_mach_info gumstix_udc_info __initdata = { 110static struct gpio_vbus_mach_info gumstix_udc_info = {
110 .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn, 111 .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn,
111 .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx, 112 .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx,
112}; 113};
113 114
115static struct platform_device gumstix_gpio_vbus = {
116 .name = "gpio-vbus",
117 .id = -1,
118 .dev = {
119 .platform_data = &gumstix_udc_info,
120 },
121};
122
114static void __init gumstix_udc_init(void) 123static void __init gumstix_udc_init(void)
115{ 124{
116 pxa_set_udc_info(&gumstix_udc_info); 125 platform_device_register(&gumstix_gpio_vbus);
117} 126}
118#else 127#else
119static void gumstix_udc_init(void) 128static void gumstix_udc_init(void)
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index dd40e4a9291c..f7fb64f11a7d 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -167,7 +167,7 @@ static void __init idp_init(void)
167 167
168 platform_device_register(&smc91x_device); 168 platform_device_register(&smc91x_device);
169 //platform_device_register(&mst_audio_device); 169 //platform_device_register(&mst_audio_device);
170 set_pxa_fb_info(&sharp_lm8v31); 170 pxa_set_fb_info(NULL, &sharp_lm8v31);
171 pxa_set_mci_info(&idp_mci_platform_data); 171 pxa_set_mci_info(&idp_mci_platform_data);
172} 172}
173 173
diff --git a/arch/arm/mach-pxa/include/mach/palmz72.h b/arch/arm/mach-pxa/include/mach/palmz72.h
index 2bbcf70dd935..0d4700a79612 100644
--- a/arch/arm/mach-pxa/include/mach/palmz72.h
+++ b/arch/arm/mach-pxa/include/mach/palmz72.h
@@ -44,6 +44,11 @@
44#define GPIO_NR_PALMZ72_BT_POWER 17 44#define GPIO_NR_PALMZ72_BT_POWER 17
45#define GPIO_NR_PALMZ72_BT_RESET 83 45#define GPIO_NR_PALMZ72_BT_RESET 83
46 46
47/* Camera */
48#define GPIO_NR_PALMZ72_CAM_PWDN 56
49#define GPIO_NR_PALMZ72_CAM_RESET 57
50#define GPIO_NR_PALMZ72_CAM_POWER 91
51
47/** Initial values **/ 52/** Initial values **/
48 53
49/* Battery */ 54/* Battery */
diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h
index 160ec83f51a6..01a45ac48114 100644
--- a/arch/arm/mach-pxa/include/mach/pxafb.h
+++ b/arch/arm/mach-pxa/include/mach/pxafb.h
@@ -154,8 +154,8 @@ struct pxafb_mach_info {
154 void (*pxafb_lcd_power)(int, struct fb_var_screeninfo *); 154 void (*pxafb_lcd_power)(int, struct fb_var_screeninfo *);
155 void (*smart_update)(struct fb_info *); 155 void (*smart_update)(struct fb_info *);
156}; 156};
157void set_pxa_fb_info(struct pxafb_mach_info *hard_pxa_fb_info); 157
158void set_pxa_fb_parent(struct device *parent_dev); 158void pxa_set_fb_info(struct device *, struct pxafb_mach_info *);
159unsigned long pxafb_get_hsync_time(struct device *dev); 159unsigned long pxafb_get_hsync_time(struct device *dev);
160 160
161extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int); 161extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int);
diff --git a/arch/arm/mach-pxa/include/mach/z2.h b/arch/arm/mach-pxa/include/mach/z2.h
index 8835c16bc82f..7b0f71ef3167 100644
--- a/arch/arm/mach-pxa/include/mach/z2.h
+++ b/arch/arm/mach-pxa/include/mach/z2.h
@@ -25,8 +25,7 @@
25#define GPIO98_ZIPITZ2_LID_BUTTON 98 25#define GPIO98_ZIPITZ2_LID_BUTTON 98
26 26
27/* Libertas GSPI8686 WiFi */ 27/* Libertas GSPI8686 WiFi */
28#define GPIO14_ZIPITZ2_WIFI_RESET 14 28#define GPIO14_ZIPITZ2_WIFI_POWER 14
29#define GPIO15_ZIPITZ2_WIFI_POWER 15
30#define GPIO24_ZIPITZ2_WIFI_CS 24 29#define GPIO24_ZIPITZ2_WIFI_CS 24
31#define GPIO36_ZIPITZ2_WIFI_IRQ 36 30#define GPIO36_ZIPITZ2_WIFI_IRQ 36
32 31
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 87c1ed9ccd2f..e5e326d2cdc9 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -185,7 +185,7 @@ static struct pxafb_mach_info littleton_lcd_info = {
185 185
186static void littleton_init_lcd(void) 186static void littleton_init_lcd(void)
187{ 187{
188 set_pxa_fb_info(&littleton_lcd_info); 188 pxa_set_fb_info(NULL, &littleton_lcd_info);
189} 189}
190#else 190#else
191static inline void littleton_init_lcd(void) {}; 191static inline void littleton_init_lcd(void) {};
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index c9a3e775c2de..8aebc58c9f1d 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -480,7 +480,7 @@ static void __init lpd270_init(void)
480 pxa_set_ac97_info(NULL); 480 pxa_set_ac97_info(NULL);
481 481
482 if (lpd270_lcd_to_use != NULL) 482 if (lpd270_lcd_to_use != NULL)
483 set_pxa_fb_info(lpd270_lcd_to_use); 483 pxa_set_fb_info(NULL, lpd270_lcd_to_use);
484 484
485 pxa_set_ohci_info(&lpd270_ohci_platform_data); 485 pxa_set_ohci_info(&lpd270_ohci_platform_data);
486} 486}
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index dca20de306bb..12a2a56b2157 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -521,7 +521,7 @@ static void __init lubbock_init(void)
521 521
522 clk_add_alias("SA1111_CLK", NULL, "GPIO11_CLK", NULL); 522 clk_add_alias("SA1111_CLK", NULL, "GPIO11_CLK", NULL);
523 pxa_set_udc_info(&udc_info); 523 pxa_set_udc_info(&udc_info);
524 set_pxa_fb_info(&sharp_lm8v31); 524 pxa_set_fb_info(NULL, &sharp_lm8v31);
525 pxa_set_mci_info(&lubbock_mci_platform_data); 525 pxa_set_mci_info(&lubbock_mci_platform_data);
526 pxa_set_ficp_info(&lubbock_ficp_platform_data); 526 pxa_set_ficp_info(&lubbock_ficp_platform_data);
527 pxa_set_ac97_info(NULL); 527 pxa_set_ac97_info(NULL);
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 5535991c4a3c..a72993dde2b3 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -757,7 +757,7 @@ static void __init magician_init(void)
757 gpio_direction_output(GPIO104_MAGICIAN_LCD_POWER_1, 0); 757 gpio_direction_output(GPIO104_MAGICIAN_LCD_POWER_1, 0);
758 gpio_direction_output(GPIO105_MAGICIAN_LCD_POWER_2, 0); 758 gpio_direction_output(GPIO105_MAGICIAN_LCD_POWER_2, 0);
759 gpio_direction_output(GPIO106_MAGICIAN_LCD_POWER_3, 0); 759 gpio_direction_output(GPIO106_MAGICIAN_LCD_POWER_3, 0);
760 set_pxa_fb_info(lcd_select ? &samsung_info : &toppoly_info); 760 pxa_set_fb_info(NULL, lcd_select ? &samsung_info : &toppoly_info);
761 } else 761 } else
762 pr_err("LCD detection: CPLD mapping failed\n"); 762 pr_err("LCD detection: CPLD mapping failed\n");
763} 763}
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index f9542220595a..8306b227e61c 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -592,7 +592,7 @@ static void __init mainstone_init(void)
592 else 592 else
593 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode; 593 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
594 594
595 set_pxa_fb_info(&mainstone_pxafb_info); 595 pxa_set_fb_info(NULL, &mainstone_pxafb_info);
596 mainstone_backlight_register(); 596 mainstone_backlight_register();
597 597
598 pxa_set_mci_info(&mainstone_mci_platform_data); 598 pxa_set_mci_info(&mainstone_mci_platform_data);
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 78d98a8607ec..dd13bb63259b 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -795,7 +795,7 @@ static void __init mioa701_machine_init(void)
795 pxa_set_stuart_info(NULL); 795 pxa_set_stuart_info(NULL);
796 mio_gpio_request(ARRAY_AND_SIZE(global_gpios)); 796 mio_gpio_request(ARRAY_AND_SIZE(global_gpios));
797 bootstrap_init(); 797 bootstrap_init();
798 set_pxa_fb_info(&mioa701_pxafb_info); 798 pxa_set_fb_info(NULL, &mioa701_pxafb_info);
799 pxa_set_mci_info(&mioa701_mci_info); 799 pxa_set_mci_info(&mioa701_mci_info);
800 pxa_set_keypad_info(&mioa701_keypad_info); 800 pxa_set_keypad_info(&mioa701_keypad_info);
801 pxa_set_udc_info(&mioa701_udc_info); 801 pxa_set_udc_info(&mioa701_udc_info);
diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c
index 72adb3ae2b43..325c245c0a0d 100644
--- a/arch/arm/mach-pxa/palm27x.c
+++ b/arch/arm/mach-pxa/palm27x.c
@@ -1,8 +1,7 @@
1/* 1/*
2 * Common code for Palm LD, T5, TX, Z72 2 * Common code for Palm LD, T5, TX, Z72
3 * 3 *
4 * Copyright (C) 2010 4 * Copyright (C) 2010-2011 Marek Vasut <marek.vasut@gmail.com>
5 * Marek Vasut <marek.vasut@gmail.com>
6 * 5 *
7 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
@@ -158,7 +157,7 @@ void __init palm27x_lcd_init(int power, struct pxafb_mode_info *mode)
158 palm27x_lcd_screen.pxafb_lcd_power = palm27x_lcd_ctl; 157 palm27x_lcd_screen.pxafb_lcd_power = palm27x_lcd_ctl;
159 } 158 }
160 159
161 set_pxa_fb_info(&palm27x_lcd_screen); 160 pxa_set_fb_info(NULL, &palm27x_lcd_screen);
162} 161}
163#endif 162#endif
164 163
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index a09a2374697b..fb06bd047272 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -507,7 +507,7 @@ static struct pxafb_mach_info palmtc_lcd_screen = {
507 507
508static void __init palmtc_lcd_init(void) 508static void __init palmtc_lcd_init(void)
509{ 509{
510 set_pxa_fb_info(&palmtc_lcd_screen); 510 pxa_set_fb_info(NULL, &palmtc_lcd_screen);
511} 511}
512#else 512#else
513static inline void palmtc_lcd_init(void) {} 513static inline void palmtc_lcd_init(void) {}
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index 3f25014a136c..726f5b98dcd3 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -136,30 +136,14 @@ static struct platform_device palmte2_pxa_keys = {
136/****************************************************************************** 136/******************************************************************************
137 * Backlight 137 * Backlight
138 ******************************************************************************/ 138 ******************************************************************************/
139static struct gpio palmte_bl_gpios[] = {
140 { GPIO_NR_PALMTE2_BL_POWER, GPIOF_INIT_LOW, "Backlight power" },
141 { GPIO_NR_PALMTE2_LCD_POWER, GPIOF_INIT_LOW, "LCD power" },
142};
143
139static int palmte2_backlight_init(struct device *dev) 144static int palmte2_backlight_init(struct device *dev)
140{ 145{
141 int ret; 146 return gpio_request_array(ARRAY_AND_SIZE(palmte_bl_gpios));
142
143 ret = gpio_request(GPIO_NR_PALMTE2_BL_POWER, "BL POWER");
144 if (ret)
145 goto err;
146 ret = gpio_direction_output(GPIO_NR_PALMTE2_BL_POWER, 0);
147 if (ret)
148 goto err2;
149 ret = gpio_request(GPIO_NR_PALMTE2_LCD_POWER, "LCD POWER");
150 if (ret)
151 goto err2;
152 ret = gpio_direction_output(GPIO_NR_PALMTE2_LCD_POWER, 0);
153 if (ret)
154 goto err3;
155
156 return 0;
157err3:
158 gpio_free(GPIO_NR_PALMTE2_LCD_POWER);
159err2:
160 gpio_free(GPIO_NR_PALMTE2_BL_POWER);
161err:
162 return ret;
163} 147}
164 148
165static int palmte2_backlight_notify(struct device *dev, int brightness) 149static int palmte2_backlight_notify(struct device *dev, int brightness)
@@ -171,8 +155,7 @@ static int palmte2_backlight_notify(struct device *dev, int brightness)
171 155
172static void palmte2_backlight_exit(struct device *dev) 156static void palmte2_backlight_exit(struct device *dev)
173{ 157{
174 gpio_free(GPIO_NR_PALMTE2_BL_POWER); 158 gpio_free_array(ARRAY_AND_SIZE(palmte_bl_gpios));
175 gpio_free(GPIO_NR_PALMTE2_LCD_POWER);
176} 159}
177 160
178static struct platform_pwm_backlight_data palmte2_backlight_data = { 161static struct platform_pwm_backlight_data palmte2_backlight_data = {
@@ -363,7 +346,7 @@ static void __init palmte2_init(void)
363 pxa_set_btuart_info(NULL); 346 pxa_set_btuart_info(NULL);
364 pxa_set_stuart_info(NULL); 347 pxa_set_stuart_info(NULL);
365 348
366 set_pxa_fb_info(&palmte2_lcd_screen); 349 pxa_set_fb_info(NULL, &palmte2_lcd_screen);
367 pxa_set_mci_info(&palmte2_mci_platform_data); 350 pxa_set_mci_info(&palmte2_mci_platform_data);
368 palmte2_udc_init(); 351 palmte2_udc_init();
369 pxa_set_ac97_info(&palmte2_ac97_pdata); 352 pxa_set_ac97_info(&palmte2_ac97_pdata);
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index 3010193b081e..3b8a4f37dbbe 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -30,6 +30,7 @@
30#include <linux/wm97xx.h> 30#include <linux/wm97xx.h>
31#include <linux/power_supply.h> 31#include <linux/power_supply.h>
32#include <linux/usb/gpio_vbus.h> 32#include <linux/usb/gpio_vbus.h>
33#include <linux/i2c-gpio.h>
33 34
34#include <asm/mach-types.h> 35#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
@@ -47,6 +48,9 @@
47#include <mach/palm27x.h> 48#include <mach/palm27x.h>
48 49
49#include <mach/pm.h> 50#include <mach/pm.h>
51#include <mach/camera.h>
52
53#include <media/soc_camera.h>
50 54
51#include "generic.h" 55#include "generic.h"
52#include "devices.h" 56#include "devices.h"
@@ -103,6 +107,28 @@ static unsigned long palmz72_pin_config[] __initdata = {
103 GPIO22_GPIO, /* LCD border color */ 107 GPIO22_GPIO, /* LCD border color */
104 GPIO96_GPIO, /* lcd power */ 108 GPIO96_GPIO, /* lcd power */
105 109
110 /* PXA Camera */
111 GPIO81_CIF_DD_0,
112 GPIO48_CIF_DD_5,
113 GPIO50_CIF_DD_3,
114 GPIO51_CIF_DD_2,
115 GPIO52_CIF_DD_4,
116 GPIO53_CIF_MCLK,
117 GPIO54_CIF_PCLK,
118 GPIO55_CIF_DD_1,
119 GPIO84_CIF_FV,
120 GPIO85_CIF_LV,
121 GPIO93_CIF_DD_6,
122 GPIO108_CIF_DD_7,
123
124 GPIO56_GPIO, /* OV9640 Powerdown */
125 GPIO57_GPIO, /* OV9640 Reset */
126 GPIO91_GPIO, /* OV9640 Power */
127
128 /* I2C */
129 GPIO117_GPIO, /* I2C_SCL */
130 GPIO118_GPIO, /* I2C_SDA */
131
106 /* Misc. */ 132 /* Misc. */
107 GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* power detect */ 133 GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* power detect */
108 GPIO88_GPIO, /* green led */ 134 GPIO88_GPIO, /* green led */
@@ -254,6 +280,106 @@ device_initcall(palmz72_pm_init);
254#endif 280#endif
255 281
256/****************************************************************************** 282/******************************************************************************
283 * SoC Camera
284 ******************************************************************************/
285#if defined(CONFIG_SOC_CAMERA_OV9640) || \
286 defined(CONFIG_SOC_CAMERA_OV9640_MODULE)
287static struct pxacamera_platform_data palmz72_pxacamera_platform_data = {
288 .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 |
289 PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN,
290 .mclk_10khz = 2600,
291};
292
293/* Board I2C devices. */
294static struct i2c_board_info palmz72_i2c_device[] = {
295 {
296 I2C_BOARD_INFO("ov9640", 0x30),
297 }
298};
299
300static int palmz72_camera_power(struct device *dev, int power)
301{
302 gpio_set_value(GPIO_NR_PALMZ72_CAM_PWDN, !power);
303 mdelay(50);
304 return 0;
305}
306
307static int palmz72_camera_reset(struct device *dev)
308{
309 gpio_set_value(GPIO_NR_PALMZ72_CAM_RESET, 1);
310 mdelay(50);
311 gpio_set_value(GPIO_NR_PALMZ72_CAM_RESET, 0);
312 mdelay(50);
313 return 0;
314}
315
316static struct soc_camera_link palmz72_iclink = {
317 .bus_id = 0, /* Match id in pxa27x_device_camera in device.c */
318 .board_info = &palmz72_i2c_device[0],
319 .i2c_adapter_id = 0,
320 .module_name = "ov96xx",
321 .power = &palmz72_camera_power,
322 .reset = &palmz72_camera_reset,
323 .flags = SOCAM_DATAWIDTH_8,
324};
325
326static struct i2c_gpio_platform_data palmz72_i2c_bus_data = {
327 .sda_pin = 118,
328 .scl_pin = 117,
329 .udelay = 10,
330 .timeout = 100,
331};
332
333static struct platform_device palmz72_i2c_bus_device = {
334 .name = "i2c-gpio",
335 .id = 0, /* we use this as a replacement for i2c-pxa */
336 .dev = {
337 .platform_data = &palmz72_i2c_bus_data,
338 }
339};
340
341static struct platform_device palmz72_camera = {
342 .name = "soc-camera-pdrv",
343 .id = -1,
344 .dev = {
345 .platform_data = &palmz72_iclink,
346 },
347};
348
349/* Here we request the camera GPIOs and configure them. We power up the camera
350 * module, deassert the reset pin, but put it into powerdown (low to no power
351 * consumption) mode. This allows us to later bring the module up fast. */
352static struct gpio palmz72_camera_gpios[] = {
353 { GPIO_NR_PALMZ72_CAM_POWER, GPIOF_INIT_HIGH,"Camera DVDD" },
354 { GPIO_NR_PALMZ72_CAM_RESET, GPIOF_INIT_LOW, "Camera RESET" },
355 { GPIO_NR_PALMZ72_CAM_PWDN, GPIOF_INIT_LOW, "Camera PWDN" },
356};
357
358static inline void __init palmz72_cam_gpio_init(void)
359{
360 int ret;
361
362 ret = gpio_request_array(ARRAY_AND_SIZE(palmz72_camera_gpios));
363 if (!ret)
364 gpio_free_array(ARRAY_AND_SIZE(palmz72_camera_gpios));
365 else
366 printk(KERN_ERR "Camera GPIO init failed!\n");
367
368 return;
369}
370
371static void __init palmz72_camera_init(void)
372{
373 palmz72_cam_gpio_init();
374 pxa_set_camera_info(&palmz72_pxacamera_platform_data);
375 platform_device_register(&palmz72_i2c_bus_device);
376 platform_device_register(&palmz72_camera);
377}
378#else
379static inline void palmz72_camera_init(void) {}
380#endif
381
382/******************************************************************************
257 * Machine init 383 * Machine init
258 ******************************************************************************/ 384 ******************************************************************************/
259static void __init palmz72_init(void) 385static void __init palmz72_init(void)
@@ -276,6 +402,7 @@ static void __init palmz72_init(void)
276 palm27x_pmic_init(); 402 palm27x_pmic_init();
277 palmz72_kpc_init(); 403 palmz72_kpc_init();
278 palmz72_leds_init(); 404 palmz72_leds_init();
405 palmz72_camera_init();
279} 406}
280 407
281MACHINE_START(PALMZ72, "Palm Zire72") 408MACHINE_START(PALMZ72, "Palm Zire72")
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 9dbf3ccd4150..a70fb848dcde 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -515,7 +515,7 @@ void __init pcm990_baseboard_init(void)
515 pcm990_init_irq(); 515 pcm990_init_irq();
516 516
517#ifndef CONFIG_PCM990_DISPLAY_NONE 517#ifndef CONFIG_PCM990_DISPLAY_NONE
518 set_pxa_fb_info(&pcm990_fbinfo); 518 pxa_set_fb_info(NULL, &pcm990_fbinfo);
519#endif 519#endif
520 platform_device_register(&pcm990_backlight_device); 520 platform_device_register(&pcm990_backlight_device);
521 521
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 35353af345d5..16d14fd79b4b 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -445,8 +445,7 @@ static void __init poodle_init(void)
445 if (ret) 445 if (ret)
446 pr_warning("poodle: Unable to register LoCoMo device\n"); 446 pr_warning("poodle: Unable to register LoCoMo device\n");
447 447
448 set_pxa_fb_parent(&poodle_locomo_device.dev); 448 pxa_set_fb_info(&poodle_locomo_device.dev, &poodle_fb_info);
449 set_pxa_fb_info(&poodle_fb_info);
450 pxa_set_udc_info(&udc_info); 449 pxa_set_udc_info(&udc_info);
451 pxa_set_mci_info(&poodle_mci_platform_data); 450 pxa_set_mci_info(&poodle_mci_platform_data);
452 pxa_set_ficp_info(&poodle_ficp_platform_data); 451 pxa_set_ficp_info(&poodle_ficp_platform_data);
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 47094188e029..cd1861351f75 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -597,7 +597,7 @@ static void __init raumfeld_lcd_init(void)
597{ 597{
598 int ret; 598 int ret;
599 599
600 set_pxa_fb_info(&raumfeld_sharp_lcd_info); 600 pxa_set_fb_info(NULL, &raumfeld_sharp_lcd_info);
601 601
602 /* Earlier devices had the backlight regulator controlled 602 /* Earlier devices had the backlight regulator controlled
603 * via PWM, later versions use another controller for that */ 603 * via PWM, later versions use another controller for that */
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index eb83c89428ef..fee97a935122 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -473,7 +473,7 @@ static struct pxafb_mach_info saar_lcd_info = {
473 473
474static void __init saar_init_lcd(void) 474static void __init saar_init_lcd(void)
475{ 475{
476 set_pxa_fb_info(&saar_lcd_info); 476 pxa_set_fb_info(NULL, &saar_lcd_info);
477} 477}
478#else 478#else
479static inline void saar_init_lcd(void) {} 479static inline void saar_init_lcd(void) {}
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 38e2c0912b9a..01c576963e94 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -724,7 +724,7 @@ static struct pxafb_mach_info spitz_pxafb_info = {
724 724
725static void __init spitz_lcd_init(void) 725static void __init spitz_lcd_init(void)
726{ 726{
727 set_pxa_fb_info(&spitz_pxafb_info); 727 pxa_set_fb_info(NULL, &spitz_pxafb_info);
728} 728}
729#else 729#else
730static inline void spitz_lcd_init(void) {} 730static inline void spitz_lcd_init(void) {}
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index 9cecf8366db8..53d4a472b699 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -466,7 +466,7 @@ static void __init tavorevb_init_lcd(void)
466{ 466{
467 platform_device_register(&tavorevb_backlight_devices[0]); 467 platform_device_register(&tavorevb_backlight_devices[0]);
468 platform_device_register(&tavorevb_backlight_devices[1]); 468 platform_device_register(&tavorevb_backlight_devices[1]);
469 set_pxa_fb_info(&tavorevb_lcd_info); 469 pxa_set_fb_info(NULL, &tavorevb_lcd_info);
470} 470}
471#else 471#else
472static inline void tavorevb_init_lcd(void) {} 472static inline void tavorevb_init_lcd(void) {}
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index e7f64d9b4f2d..428da3ff33a5 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -100,7 +100,6 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
100static struct clock_event_device ckevt_pxa_osmr0 = { 100static struct clock_event_device ckevt_pxa_osmr0 = {
101 .name = "osmr0", 101 .name = "osmr0",
102 .features = CLOCK_EVT_FEAT_ONESHOT, 102 .features = CLOCK_EVT_FEAT_ONESHOT,
103 .shift = 32,
104 .rating = 200, 103 .rating = 200,
105 .set_next_event = pxa_osmr0_set_next_event, 104 .set_next_event = pxa_osmr0_set_next_event,
106 .set_mode = pxa_osmr0_set_mode, 105 .set_mode = pxa_osmr0_set_mode,
@@ -135,8 +134,8 @@ static void __init pxa_timer_init(void)
135 134
136 init_sched_clock(&cd, pxa_update_sched_clock, 32, clock_tick_rate); 135 init_sched_clock(&cd, pxa_update_sched_clock, 32, clock_tick_rate);
137 136
138 ckevt_pxa_osmr0.mult = 137 clocksource_calc_mult_shift(&cksrc_pxa_oscr0, clock_tick_rate, 4);
139 div_sc(clock_tick_rate, NSEC_PER_SEC, ckevt_pxa_osmr0.shift); 138 clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4);
140 ckevt_pxa_osmr0.max_delta_ns = 139 ckevt_pxa_osmr0.max_delta_ns =
141 clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0); 140 clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0);
142 ckevt_pxa_osmr0.min_delta_ns = 141 ckevt_pxa_osmr0.min_delta_ns =
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 5ad3807af334..5fa145778e7d 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -35,6 +35,7 @@
35#include <linux/spi/pxa2xx_spi.h> 35#include <linux/spi/pxa2xx_spi.h>
36#include <linux/input/matrix_keypad.h> 36#include <linux/input/matrix_keypad.h>
37#include <linux/i2c/pxa-i2c.h> 37#include <linux/i2c/pxa-i2c.h>
38#include <linux/usb/gpio_vbus.h>
38 39
39#include <asm/setup.h> 40#include <asm/setup.h>
40#include <asm/mach-types.h> 41#include <asm/mach-types.h>
@@ -240,12 +241,20 @@ static struct scoop_pcmcia_config tosa_pcmcia_config = {
240/* 241/*
241 * USB Device Controller 242 * USB Device Controller
242 */ 243 */
243static struct pxa2xx_udc_mach_info udc_info __initdata = { 244static struct gpio_vbus_mach_info tosa_udc_info = {
244 .gpio_pullup = TOSA_GPIO_USB_PULLUP, 245 .gpio_pullup = TOSA_GPIO_USB_PULLUP,
245 .gpio_vbus = TOSA_GPIO_USB_IN, 246 .gpio_vbus = TOSA_GPIO_USB_IN,
246 .gpio_vbus_inverted = 1, 247 .gpio_vbus_inverted = 1,
247}; 248};
248 249
250static struct platform_device tosa_gpio_vbus = {
251 .name = "gpio-vbus",
252 .id = -1,
253 .dev = {
254 .platform_data = &tosa_udc_info,
255 },
256};
257
249/* 258/*
250 * MMC/SD Device 259 * MMC/SD Device
251 */ 260 */
@@ -891,6 +900,7 @@ static struct platform_device *devices[] __initdata = {
891 &tosa_bt_device, 900 &tosa_bt_device,
892 &sharpsl_rom_device, 901 &sharpsl_rom_device,
893 &wm9712_device, 902 &wm9712_device,
903 &tosa_gpio_vbus,
894}; 904};
895 905
896static void tosa_poweroff(void) 906static void tosa_poweroff(void)
@@ -937,7 +947,6 @@ static void __init tosa_init(void)
937 dummy = gpiochip_reserve(TOSA_TC6393XB_GPIO_BASE, 16); 947 dummy = gpiochip_reserve(TOSA_TC6393XB_GPIO_BASE, 16);
938 948
939 pxa_set_mci_info(&tosa_mci_platform_data); 949 pxa_set_mci_info(&tosa_mci_platform_data);
940 pxa_set_udc_info(&udc_info);
941 pxa_set_ficp_info(&tosa_ficp_platform_data); 950 pxa_set_ficp_info(&tosa_ficp_platform_data);
942 pxa_set_i2c_info(NULL); 951 pxa_set_i2c_info(NULL);
943 pxa_set_ac97_info(NULL); 952 pxa_set_ac97_info(NULL);
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 857bb2e63486..b9cfbebdfe9c 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -516,9 +516,9 @@ static void __init trizeps4_init(void)
516 pxa_set_stuart_info(NULL); 516 pxa_set_stuart_info(NULL);
517 517
518 if (0) /* dont know how to determine LCD */ 518 if (0) /* dont know how to determine LCD */
519 set_pxa_fb_info(&sharp_lcd); 519 pxa_set_fb_info(NULL, &sharp_lcd);
520 else 520 else
521 set_pxa_fb_info(&toshiba_lcd); 521 pxa_set_fb_info(NULL, &toshiba_lcd);
522 522
523 pxa_set_mci_info(&trizeps4_mci_platform_data); 523 pxa_set_mci_info(&trizeps4_mci_platform_data);
524#ifndef STATUS_LEDS_ON_STUART_PINS 524#ifndef STATUS_LEDS_ON_STUART_PINS
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 12279214c875..0fbe78df8461 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -932,7 +932,7 @@ static void __init viper_init(void)
932 /* Wake-up serial console */ 932 /* Wake-up serial console */
933 viper_init_serial_gpio(); 933 viper_init_serial_gpio();
934 934
935 set_pxa_fb_info(&fb_info); 935 pxa_set_fb_info(NULL, &fb_info);
936 936
937 /* v1 hardware cannot use the datacs line */ 937 /* v1 hardware cannot use the datacs line */
938 version = viper_hw_version(); 938 version = viper_hw_version();
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index e709fd459268..f71d377c8640 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -572,7 +572,7 @@ static void __init vpac270_lcd_init(void)
572 } 572 }
573 573
574 vpac270_lcd_screen.pxafb_lcd_power = vpac270_lcd_power; 574 vpac270_lcd_screen.pxafb_lcd_power = vpac270_lcd_power;
575 set_pxa_fb_info(&vpac270_lcd_screen); 575 pxa_set_fb_info(NULL, &vpac270_lcd_screen);
576 return; 576 return;
577 577
578err2: 578err2:
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index aaf883754ef4..fbe9e02e2f9f 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -91,13 +91,13 @@ static unsigned long z2_pin_config[] = {
91 GPIO47_STUART_TXD, 91 GPIO47_STUART_TXD,
92 92
93 /* Keypad */ 93 /* Keypad */
94 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, 94 GPIO100_KP_MKIN_0,
95 GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, 95 GPIO101_KP_MKIN_1,
96 GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, 96 GPIO102_KP_MKIN_2,
97 GPIO34_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, 97 GPIO34_KP_MKIN_3,
98 GPIO38_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH, 98 GPIO38_KP_MKIN_4,
99 GPIO16_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH, 99 GPIO16_KP_MKIN_5,
100 GPIO17_KP_MKIN_6 | WAKEUP_ON_LEVEL_HIGH, 100 GPIO17_KP_MKIN_6,
101 GPIO103_KP_MKOUT_0, 101 GPIO103_KP_MKOUT_0,
102 GPIO104_KP_MKOUT_1, 102 GPIO104_KP_MKOUT_1,
103 GPIO105_KP_MKOUT_2, 103 GPIO105_KP_MKOUT_2,
@@ -138,8 +138,7 @@ static unsigned long z2_pin_config[] = {
138 GPIO1_GPIO, /* Power button */ 138 GPIO1_GPIO, /* Power button */
139 GPIO37_GPIO, /* Headphone detect */ 139 GPIO37_GPIO, /* Headphone detect */
140 GPIO98_GPIO, /* Lid switch */ 140 GPIO98_GPIO, /* Lid switch */
141 GPIO14_GPIO, /* WiFi Reset */ 141 GPIO14_GPIO, /* WiFi Power */
142 GPIO15_GPIO, /* WiFi Power */
143 GPIO24_GPIO, /* WiFi CS */ 142 GPIO24_GPIO, /* WiFi CS */
144 GPIO36_GPIO, /* WiFi IRQ */ 143 GPIO36_GPIO, /* WiFi IRQ */
145 GPIO88_GPIO, /* LCD CS */ 144 GPIO88_GPIO, /* LCD CS */
@@ -204,7 +203,7 @@ static struct platform_pwm_backlight_data z2_backlight_data[] = {
204 /* Keypad Backlight */ 203 /* Keypad Backlight */
205 .pwm_id = 1, 204 .pwm_id = 1,
206 .max_brightness = 1023, 205 .max_brightness = 1023,
207 .dft_brightness = 512, 206 .dft_brightness = 0,
208 .pwm_period_ns = 1260320, 207 .pwm_period_ns = 1260320,
209 }, 208 },
210 [1] = { 209 [1] = {
@@ -271,7 +270,7 @@ static struct pxafb_mach_info z2_lcd_screen = {
271 270
272static void __init z2_lcd_init(void) 271static void __init z2_lcd_init(void)
273{ 272{
274 set_pxa_fb_info(&z2_lcd_screen); 273 pxa_set_fb_info(NULL, &z2_lcd_screen);
275} 274}
276#else 275#else
277static inline void z2_lcd_init(void) {} 276static inline void z2_lcd_init(void) {}
@@ -309,12 +308,12 @@ struct gpio_led z2_gpio_leds[] = {
309 .active_low = 1, 308 .active_low = 1,
310}, { 309}, {
311 .name = "z2:green:charged", 310 .name = "z2:green:charged",
312 .default_trigger = "none", 311 .default_trigger = "mmc0",
313 .gpio = GPIO85_ZIPITZ2_LED_CHARGED, 312 .gpio = GPIO85_ZIPITZ2_LED_CHARGED,
314 .active_low = 1, 313 .active_low = 1,
315}, { 314}, {
316 .name = "z2:amber:charging", 315 .name = "z2:amber:charging",
317 .default_trigger = "none", 316 .default_trigger = "Z2-charging-or-full",
318 .gpio = GPIO83_ZIPITZ2_LED_CHARGING, 317 .gpio = GPIO83_ZIPITZ2_LED_CHARGING,
319 .active_low = 1, 318 .active_low = 1,
320}, 319},
@@ -427,8 +426,22 @@ static inline void z2_mkp_init(void) {}
427 ******************************************************************************/ 426 ******************************************************************************/
428#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 427#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
429static struct gpio_keys_button z2_pxa_buttons[] = { 428static struct gpio_keys_button z2_pxa_buttons[] = {
430 {KEY_POWER, GPIO1_ZIPITZ2_POWER_BUTTON, 0, "Power Button" }, 429 {
431 {KEY_CLOSE, GPIO98_ZIPITZ2_LID_BUTTON, 0, "Lid Button" }, 430 .code = KEY_POWER,
431 .gpio = GPIO1_ZIPITZ2_POWER_BUTTON,
432 .active_low = 0,
433 .desc = "Power Button",
434 .wakeup = 1,
435 .type = EV_KEY,
436 },
437 {
438 .code = SW_LID,
439 .gpio = GPIO98_ZIPITZ2_LID_BUTTON,
440 .active_low = 1,
441 .desc = "Lid Switch",
442 .wakeup = 0,
443 .type = EV_SW,
444 },
432}; 445};
433 446
434static struct gpio_keys_platform_data z2_pxa_keys_data = { 447static struct gpio_keys_platform_data z2_pxa_keys_data = {
@@ -461,9 +474,9 @@ static struct z2_battery_info batt_chip_info = {
461 .batt_I2C_addr = 0x55, 474 .batt_I2C_addr = 0x55,
462 .batt_I2C_reg = 2, 475 .batt_I2C_reg = 2,
463 .charge_gpio = GPIO0_ZIPITZ2_AC_DETECT, 476 .charge_gpio = GPIO0_ZIPITZ2_AC_DETECT,
464 .min_voltage = 2400000, 477 .min_voltage = 3475000,
465 .max_voltage = 3700000, 478 .max_voltage = 4190000,
466 .batt_div = 69, 479 .batt_div = 59,
467 .batt_mult = 1000000, 480 .batt_mult = 1000000,
468 .batt_tech = POWER_SUPPLY_TECHNOLOGY_LION, 481 .batt_tech = POWER_SUPPLY_TECHNOLOGY_LION,
469 .batt_name = "Z2", 482 .batt_name = "Z2",
@@ -497,26 +510,16 @@ static int z2_lbs_spi_setup(struct spi_device *spi)
497{ 510{
498 int ret = 0; 511 int ret = 0;
499 512
500 ret = gpio_request(GPIO15_ZIPITZ2_WIFI_POWER, "WiFi Power"); 513 ret = gpio_request(GPIO14_ZIPITZ2_WIFI_POWER, "WiFi Power");
501 if (ret) 514 if (ret)
502 goto err; 515 goto err;
503 516
504 ret = gpio_direction_output(GPIO15_ZIPITZ2_WIFI_POWER, 1); 517 ret = gpio_direction_output(GPIO14_ZIPITZ2_WIFI_POWER, 1);
505 if (ret) 518 if (ret)
506 goto err2; 519 goto err2;
507 520
508 ret = gpio_request(GPIO14_ZIPITZ2_WIFI_RESET, "WiFi Reset"); 521 /* Wait until card is powered on */
509 if (ret)
510 goto err2;
511
512 ret = gpio_direction_output(GPIO14_ZIPITZ2_WIFI_RESET, 0);
513 if (ret)
514 goto err3;
515
516 /* Reset the card */
517 mdelay(180); 522 mdelay(180);
518 gpio_set_value(GPIO14_ZIPITZ2_WIFI_RESET, 1);
519 mdelay(20);
520 523
521 spi->bits_per_word = 16; 524 spi->bits_per_word = 16;
522 spi->mode = SPI_MODE_2, 525 spi->mode = SPI_MODE_2,
@@ -525,22 +528,18 @@ static int z2_lbs_spi_setup(struct spi_device *spi)
525 528
526 return 0; 529 return 0;
527 530
528err3:
529 gpio_free(GPIO14_ZIPITZ2_WIFI_RESET);
530err2: 531err2:
531 gpio_free(GPIO15_ZIPITZ2_WIFI_POWER); 532 gpio_free(GPIO14_ZIPITZ2_WIFI_POWER);
532err: 533err:
533 return ret; 534 return ret;
534}; 535};
535 536
536static int z2_lbs_spi_teardown(struct spi_device *spi) 537static int z2_lbs_spi_teardown(struct spi_device *spi)
537{ 538{
538 gpio_set_value(GPIO14_ZIPITZ2_WIFI_RESET, 0); 539 gpio_set_value(GPIO14_ZIPITZ2_WIFI_POWER, 0);
539 gpio_set_value(GPIO15_ZIPITZ2_WIFI_POWER, 0); 540 gpio_free(GPIO14_ZIPITZ2_WIFI_POWER);
540 gpio_free(GPIO14_ZIPITZ2_WIFI_RESET);
541 gpio_free(GPIO15_ZIPITZ2_WIFI_POWER);
542 return 0;
543 541
542 return 0;
544}; 543};
545 544
546static struct pxa2xx_spi_chip z2_lbs_chip_info = { 545static struct pxa2xx_spi_chip z2_lbs_chip_info = {
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 730f51e57c17..5891590126f7 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -846,7 +846,7 @@ static void __init zeus_init(void)
846 if (zeus_setup_fb_gpios()) 846 if (zeus_setup_fb_gpios())
847 pr_err("Failed to setup fb gpios\n"); 847 pr_err("Failed to setup fb gpios\n");
848 else 848 else
849 set_pxa_fb_info(&zeus_fb_info); 849 pxa_set_fb_info(NULL, &zeus_fb_info);
850 850
851 pxa_set_mci_info(&zeus_mci_platform_data); 851 pxa_set_mci_info(&zeus_mci_platform_data);
852 pxa_set_udc_info(&zeus_udc_info); 852 pxa_set_udc_info(&zeus_udc_info);
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index a4c784aab764..5821185f77ab 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -208,7 +208,7 @@ static void __init zylonite_init_lcd(void)
208 platform_device_register(&zylonite_backlight_device); 208 platform_device_register(&zylonite_backlight_device);
209 209
210 if (lcd_id & 0x20) { 210 if (lcd_id & 0x20) {
211 set_pxa_fb_info(&zylonite_sharp_lcd_info); 211 pxa_set_fb_info(NULL, &zylonite_sharp_lcd_info);
212 return; 212 return;
213 } 213 }
214 214
@@ -220,7 +220,7 @@ static void __init zylonite_init_lcd(void)
220 else 220 else
221 zylonite_toshiba_lcd_info.modes = &toshiba_ltm04c380k_mode; 221 zylonite_toshiba_lcd_info.modes = &toshiba_ltm04c380k_mode;
222 222
223 set_pxa_fb_info(&zylonite_toshiba_lcd_info); 223 pxa_set_fb_info(NULL, &zylonite_toshiba_lcd_info);
224} 224}
225#else 225#else
226static inline void zylonite_init_lcd(void) {} 226static inline void zylonite_init_lcd(void) {}
diff --git a/arch/arm/mach-realview/Makefile b/arch/arm/mach-realview/Makefile
index a01b76b7c956..541fa4c109ef 100644
--- a/arch/arm/mach-realview/Makefile
+++ b/arch/arm/mach-realview/Makefile
@@ -8,6 +8,5 @@ obj-$(CONFIG_MACH_REALVIEW_PB11MP) += realview_pb11mp.o
8obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o 8obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o
9obj-$(CONFIG_MACH_REALVIEW_PBA8) += realview_pba8.o 9obj-$(CONFIG_MACH_REALVIEW_PBA8) += realview_pba8.o
10obj-$(CONFIG_MACH_REALVIEW_PBX) += realview_pbx.o 10obj-$(CONFIG_MACH_REALVIEW_PBX) += realview_pbx.o
11obj-$(CONFIG_SMP) += platsmp.o headsmp.o 11obj-$(CONFIG_SMP) += platsmp.o
12obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 12obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
13obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 1c6602cf50e4..75dbc8791d05 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -51,6 +51,7 @@
51#include <mach/irqs.h> 51#include <mach/irqs.h>
52#include <asm/hardware/timer-sp.h> 52#include <asm/hardware/timer-sp.h>
53 53
54#include <plat/clcd.h>
54#include <plat/sched_clock.h> 55#include <plat/sched_clock.h>
55 56
56#include "core.h" 57#include "core.h"
@@ -359,18 +360,19 @@ static struct clk_lookup lookups[] = {
359 } 360 }
360}; 361};
361 362
362static int __init clk_init(void) 363void __init realview_init_early(void)
363{ 364{
365 void __iomem *sys = __io_address(REALVIEW_SYS_BASE);
366
364 if (machine_is_realview_pb1176()) 367 if (machine_is_realview_pb1176())
365 oscvco_clk.vcoreg = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC0_OFFSET; 368 oscvco_clk.vcoreg = sys + REALVIEW_SYS_OSC0_OFFSET;
366 else 369 else
367 oscvco_clk.vcoreg = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET; 370 oscvco_clk.vcoreg = sys + REALVIEW_SYS_OSC4_OFFSET;
368 371
369 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 372 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
370 373
371 return 0; 374 versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000);
372} 375}
373core_initcall(clk_init);
374 376
375/* 377/*
376 * CLCD support. 378 * CLCD support.
@@ -385,157 +387,6 @@ core_initcall(clk_init);
385#define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8) 387#define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
386#define SYS_CLCD_ID_VGA (0x1f << 8) 388#define SYS_CLCD_ID_VGA (0x1f << 8)
387 389
388static struct clcd_panel vga = {
389 .mode = {
390 .name = "VGA",
391 .refresh = 60,
392 .xres = 640,
393 .yres = 480,
394 .pixclock = 39721,
395 .left_margin = 40,
396 .right_margin = 24,
397 .upper_margin = 32,
398 .lower_margin = 11,
399 .hsync_len = 96,
400 .vsync_len = 2,
401 .sync = 0,
402 .vmode = FB_VMODE_NONINTERLACED,
403 },
404 .width = -1,
405 .height = -1,
406 .tim2 = TIM2_BCD | TIM2_IPC,
407 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
408 .bpp = 16,
409};
410
411static struct clcd_panel xvga = {
412 .mode = {
413 .name = "XVGA",
414 .refresh = 60,
415 .xres = 1024,
416 .yres = 768,
417 .pixclock = 15748,
418 .left_margin = 152,
419 .right_margin = 48,
420 .upper_margin = 23,
421 .lower_margin = 3,
422 .hsync_len = 104,
423 .vsync_len = 4,
424 .sync = 0,
425 .vmode = FB_VMODE_NONINTERLACED,
426 },
427 .width = -1,
428 .height = -1,
429 .tim2 = TIM2_BCD | TIM2_IPC,
430 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
431 .bpp = 16,
432};
433
434static struct clcd_panel sanyo_3_8_in = {
435 .mode = {
436 .name = "Sanyo QVGA",
437 .refresh = 116,
438 .xres = 320,
439 .yres = 240,
440 .pixclock = 100000,
441 .left_margin = 6,
442 .right_margin = 6,
443 .upper_margin = 5,
444 .lower_margin = 5,
445 .hsync_len = 6,
446 .vsync_len = 6,
447 .sync = 0,
448 .vmode = FB_VMODE_NONINTERLACED,
449 },
450 .width = -1,
451 .height = -1,
452 .tim2 = TIM2_BCD,
453 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
454 .bpp = 16,
455};
456
457static struct clcd_panel sanyo_2_5_in = {
458 .mode = {
459 .name = "Sanyo QVGA Portrait",
460 .refresh = 116,
461 .xres = 240,
462 .yres = 320,
463 .pixclock = 100000,
464 .left_margin = 20,
465 .right_margin = 10,
466 .upper_margin = 2,
467 .lower_margin = 2,
468 .hsync_len = 10,
469 .vsync_len = 2,
470 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
471 .vmode = FB_VMODE_NONINTERLACED,
472 },
473 .width = -1,
474 .height = -1,
475 .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC,
476 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
477 .bpp = 16,
478};
479
480static struct clcd_panel epson_2_2_in = {
481 .mode = {
482 .name = "Epson QCIF",
483 .refresh = 390,
484 .xres = 176,
485 .yres = 220,
486 .pixclock = 62500,
487 .left_margin = 3,
488 .right_margin = 2,
489 .upper_margin = 1,
490 .lower_margin = 0,
491 .hsync_len = 3,
492 .vsync_len = 2,
493 .sync = 0,
494 .vmode = FB_VMODE_NONINTERLACED,
495 },
496 .width = -1,
497 .height = -1,
498 .tim2 = TIM2_BCD | TIM2_IPC,
499 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
500 .bpp = 16,
501};
502
503/*
504 * Detect which LCD panel is connected, and return the appropriate
505 * clcd_panel structure. Note: we do not have any information on
506 * the required timings for the 8.4in panel, so we presently assume
507 * VGA timings.
508 */
509static struct clcd_panel *realview_clcd_panel(void)
510{
511 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
512 struct clcd_panel *vga_panel;
513 struct clcd_panel *panel;
514 u32 val;
515
516 if (machine_is_realview_eb())
517 vga_panel = &vga;
518 else
519 vga_panel = &xvga;
520
521 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
522 if (val == SYS_CLCD_ID_SANYO_3_8)
523 panel = &sanyo_3_8_in;
524 else if (val == SYS_CLCD_ID_SANYO_2_5)
525 panel = &sanyo_2_5_in;
526 else if (val == SYS_CLCD_ID_EPSON_2_2)
527 panel = &epson_2_2_in;
528 else if (val == SYS_CLCD_ID_VGA)
529 panel = vga_panel;
530 else {
531 printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
532 val);
533 panel = vga_panel;
534 }
535
536 return panel;
537}
538
539/* 390/*
540 * Disable all display connectors on the interface module. 391 * Disable all display connectors on the interface module.
541 */ 392 */
@@ -565,56 +416,60 @@ static void realview_clcd_enable(struct clcd_fb *fb)
565 writel(val, sys_clcd); 416 writel(val, sys_clcd);
566} 417}
567 418
419/*
420 * Detect which LCD panel is connected, and return the appropriate
421 * clcd_panel structure. Note: we do not have any information on
422 * the required timings for the 8.4in panel, so we presently assume
423 * VGA timings.
424 */
568static int realview_clcd_setup(struct clcd_fb *fb) 425static int realview_clcd_setup(struct clcd_fb *fb)
569{ 426{
427 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
428 const char *panel_name, *vga_panel_name;
570 unsigned long framesize; 429 unsigned long framesize;
571 dma_addr_t dma; 430 u32 val;
572 431
573 if (machine_is_realview_eb()) 432 if (machine_is_realview_eb()) {
574 /* VGA, 16bpp */ 433 /* VGA, 16bpp */
575 framesize = 640 * 480 * 2; 434 framesize = 640 * 480 * 2;
576 else 435 vga_panel_name = "VGA";
436 } else {
577 /* XVGA, 16bpp */ 437 /* XVGA, 16bpp */
578 framesize = 1024 * 768 * 2; 438 framesize = 1024 * 768 * 2;
579 439 vga_panel_name = "XVGA";
580 fb->panel = realview_clcd_panel();
581
582 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
583 &dma, GFP_KERNEL | GFP_DMA);
584 if (!fb->fb.screen_base) {
585 printk(KERN_ERR "CLCD: unable to map framebuffer\n");
586 return -ENOMEM;
587 } 440 }
588 441
589 fb->fb.fix.smem_start = dma; 442 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
590 fb->fb.fix.smem_len = framesize; 443 if (val == SYS_CLCD_ID_SANYO_3_8)
591 444 panel_name = "Sanyo TM38QV67A02A";
592 return 0; 445 else if (val == SYS_CLCD_ID_SANYO_2_5)
593} 446 panel_name = "Sanyo QVGA Portrait";
447 else if (val == SYS_CLCD_ID_EPSON_2_2)
448 panel_name = "Epson L2F50113T00";
449 else if (val == SYS_CLCD_ID_VGA)
450 panel_name = vga_panel_name;
451 else {
452 pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val);
453 panel_name = vga_panel_name;
454 }
594 455
595static int realview_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma) 456 fb->panel = versatile_clcd_get_panel(panel_name);
596{ 457 if (!fb->panel)
597 return dma_mmap_writecombine(&fb->dev->dev, vma, 458 return -EINVAL;
598 fb->fb.screen_base,
599 fb->fb.fix.smem_start,
600 fb->fb.fix.smem_len);
601}
602 459
603static void realview_clcd_remove(struct clcd_fb *fb) 460 return versatile_clcd_setup_dma(fb, framesize);
604{
605 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
606 fb->fb.screen_base, fb->fb.fix.smem_start);
607} 461}
608 462
609struct clcd_board clcd_plat_data = { 463struct clcd_board clcd_plat_data = {
610 .name = "RealView", 464 .name = "RealView",
465 .caps = CLCD_CAP_ALL,
611 .check = clcdfb_check, 466 .check = clcdfb_check,
612 .decode = clcdfb_decode, 467 .decode = clcdfb_decode,
613 .disable = realview_clcd_disable, 468 .disable = realview_clcd_disable,
614 .enable = realview_clcd_enable, 469 .enable = realview_clcd_enable,
615 .setup = realview_clcd_setup, 470 .setup = realview_clcd_setup,
616 .mmap = realview_clcd_mmap, 471 .mmap = versatile_clcd_mmap_dma,
617 .remove = realview_clcd_remove, 472 .remove = versatile_clcd_remove_dma,
618}; 473};
619 474
620#ifdef CONFIG_LEDS 475#ifdef CONFIG_LEDS
@@ -656,12 +511,6 @@ void realview_leds_event(led_event_t ledevt)
656#endif /* CONFIG_LEDS */ 511#endif /* CONFIG_LEDS */
657 512
658/* 513/*
659 * The sched_clock counter
660 */
661#define REFCOUNTER (__io_address(REALVIEW_SYS_BASE) + \
662 REALVIEW_SYS_24MHz_OFFSET)
663
664/*
665 * Where is the timer (VA)? 514 * Where is the timer (VA)?
666 */ 515 */
667void __iomem *timer0_va_base; 516void __iomem *timer0_va_base;
@@ -676,8 +525,6 @@ void __init realview_timer_init(unsigned int timer_irq)
676{ 525{
677 u32 val; 526 u32 val;
678 527
679 versatile_sched_clock_init(REFCOUNTER, 24000000);
680
681 /* 528 /*
682 * set clock frequency: 529 * set clock frequency:
683 * REALVIEW_REFCLK is 32KHz 530 * REALVIEW_REFCLK is 32KHz
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 693239ddc39e..5c83d1e87a03 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -42,7 +42,6 @@ static struct amba_device name##_device = { \
42 }, \ 42 }, \
43 .dma_mask = ~0, \ 43 .dma_mask = ~0, \
44 .irq = base##_IRQ, \ 44 .irq = base##_IRQ, \
45 /* .dma = base##_DMA,*/ \
46} 45}
47 46
48struct machine_desc; 47struct machine_desc;
@@ -63,6 +62,7 @@ extern void realview_timer_init(unsigned int timer_irq);
63extern int realview_flash_register(struct resource *res, u32 num); 62extern int realview_flash_register(struct resource *res, u32 num);
64extern int realview_eth_register(const char *name, struct resource *res); 63extern int realview_eth_register(const char *name, struct resource *res);
65extern int realview_usb_register(struct resource *res); 64extern int realview_usb_register(struct resource *res);
65extern void realview_init_early(void);
66extern void realview_fixup(struct machine_desc *mdesc, struct tag *tags, 66extern void realview_fixup(struct machine_desc *mdesc, struct tag *tags,
67 char **from, struct meminfo *meminfo); 67 char **from, struct meminfo *meminfo);
68extern void (*realview_reset)(char); 68extern void (*realview_reset)(char);
diff --git a/arch/arm/mach-realview/headsmp.S b/arch/arm/mach-realview/headsmp.S
deleted file mode 100644
index b34be4554d40..000000000000
--- a/arch/arm/mach-realview/headsmp.S
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * linux/arch/arm/mach-realview/headsmp.S
3 *
4 * Copyright (c) 2003 ARM Limited
5 * All Rights Reserved
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/linkage.h>
12#include <linux/init.h>
13
14 __INIT
15
16/*
17 * Realview specific entry point for secondary CPUs. This provides
18 * a "holding pen" into which all secondary cores are held until we're
19 * ready for them to initialise.
20 */
21ENTRY(realview_secondary_startup)
22 mrc p15, 0, r0, c0, c0, 5
23 and r0, r0, #15
24 adr r4, 1f
25 ldmia r4, {r5, r6}
26 sub r4, r4, r5
27 add r6, r6, r4
28pen: ldr r7, [r6]
29 cmp r7, r0
30 bne pen
31
32 /*
33 * we've been released from the holding pen: secondary_stack
34 * should now contain the SVC stack for this core
35 */
36 b secondary_startup
37
38 .align
391: .long .
40 .long pen_release
diff --git a/arch/arm/mach-realview/localtimer.c b/arch/arm/mach-realview/localtimer.c
deleted file mode 100644
index 60b4e111f459..000000000000
--- a/arch/arm/mach-realview/localtimer.c
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * linux/arch/arm/mach-realview/localtimer.c
3 *
4 * Copyright (C) 2002 ARM Ltd.
5 * All Rights Reserved
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/init.h>
12#include <linux/smp.h>
13#include <linux/clockchips.h>
14
15#include <asm/irq.h>
16#include <asm/smp_twd.h>
17#include <asm/localtimer.h>
18
19/*
20 * Setup the local clock events for a CPU.
21 */
22void __cpuinit local_timer_setup(struct clock_event_device *evt)
23{
24 evt->irq = IRQ_LOCALTIMER;
25 twd_timer_setup(evt);
26}
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index 6959d13d908a..23919229e12d 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -10,44 +10,21 @@
10 */ 10 */
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/errno.h> 12#include <linux/errno.h>
13#include <linux/delay.h>
14#include <linux/device.h>
15#include <linux/jiffies.h>
16#include <linux/smp.h> 13#include <linux/smp.h>
17#include <linux/io.h> 14#include <linux/io.h>
18 15
19#include <asm/cacheflush.h>
20#include <mach/hardware.h> 16#include <mach/hardware.h>
21#include <asm/mach-types.h> 17#include <asm/mach-types.h>
18#include <asm/smp_scu.h>
22#include <asm/unified.h> 19#include <asm/unified.h>
23 20
24#include <mach/board-eb.h> 21#include <mach/board-eb.h>
25#include <mach/board-pb11mp.h> 22#include <mach/board-pb11mp.h>
26#include <mach/board-pbx.h> 23#include <mach/board-pbx.h>
27#include <asm/smp_scu.h>
28 24
29#include "core.h" 25#include "core.h"
30 26
31extern void realview_secondary_startup(void); 27extern void versatile_secondary_startup(void);
32
33/*
34 * control for which core is the next to come out of the secondary
35 * boot "holding pen"
36 */
37volatile int __cpuinitdata pen_release = -1;
38
39/*
40 * Write pen_release in a way that is guaranteed to be visible to all
41 * observers, irrespective of whether they're taking part in coherency
42 * or not. This is necessary for the hotplug code to work reliably.
43 */
44static void __cpuinit write_pen_release(int val)
45{
46 pen_release = val;
47 smp_wmb();
48 __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
49 outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
50}
51 28
52static void __iomem *scu_base_addr(void) 29static void __iomem *scu_base_addr(void)
53{ 30{
@@ -62,75 +39,6 @@ static void __iomem *scu_base_addr(void)
62 return (void __iomem *)0; 39 return (void __iomem *)0;
63} 40}
64 41
65static DEFINE_SPINLOCK(boot_lock);
66
67void __cpuinit platform_secondary_init(unsigned int cpu)
68{
69 /*
70 * if any interrupts are already enabled for the primary
71 * core (e.g. timer irq), then they will not have been enabled
72 * for us: do so
73 */
74 gic_secondary_init(0);
75
76 /*
77 * let the primary processor know we're out of the
78 * pen, then head off into the C entry point
79 */
80 write_pen_release(-1);
81
82 /*
83 * Synchronise with the boot thread.
84 */
85 spin_lock(&boot_lock);
86 spin_unlock(&boot_lock);
87}
88
89int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
90{
91 unsigned long timeout;
92
93 /*
94 * set synchronisation state between this boot processor
95 * and the secondary one
96 */
97 spin_lock(&boot_lock);
98
99 /*
100 * The secondary processor is waiting to be released from
101 * the holding pen - release it, then wait for it to flag
102 * that it has been released by resetting pen_release.
103 *
104 * Note that "pen_release" is the hardware CPU ID, whereas
105 * "cpu" is Linux's internal ID.
106 */
107 write_pen_release(cpu);
108
109 /*
110 * Send the secondary CPU a soft interrupt, thereby causing
111 * the boot monitor to read the system wide flags register,
112 * and branch to the address found there.
113 */
114 smp_cross_call(cpumask_of(cpu), 1);
115
116 timeout = jiffies + (1 * HZ);
117 while (time_before(jiffies, timeout)) {
118 smp_rmb();
119 if (pen_release == -1)
120 break;
121
122 udelay(10);
123 }
124
125 /*
126 * now the secondary core is starting up let it run its
127 * calibrations, then wait for it to finish
128 */
129 spin_unlock(&boot_lock);
130
131 return pen_release != -1 ? -ENOSYS : 0;
132}
133
134/* 42/*
135 * Initialise the CPU possible map early - this describes the CPUs 43 * Initialise the CPU possible map early - this describes the CPUs
136 * which may be present or become present in the system. 44 * which may be present or become present in the system.
@@ -174,6 +82,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
174 * until it receives a soft interrupt, and then the 82 * until it receives a soft interrupt, and then the
175 * secondary CPU branches to this address. 83 * secondary CPU branches to this address.
176 */ 84 */
177 __raw_writel(BSYM(virt_to_phys(realview_secondary_startup)), 85 __raw_writel(BSYM(virt_to_phys(versatile_secondary_startup)),
178 __io_address(REALVIEW_SYS_FLAGSSET)); 86 __io_address(REALVIEW_SYS_FLAGSSET));
179} 87}
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 8ede983b861c..2ecc1d94284e 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -144,60 +144,39 @@ static struct pl022_ssp_controller ssp0_plat_data = {
144 * These devices are connected via the core APB bridge 144 * These devices are connected via the core APB bridge
145 */ 145 */
146#define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ } 146#define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ }
147#define GPIO2_DMA { 0, 0 }
148#define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ } 147#define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ }
149#define GPIO3_DMA { 0, 0 }
150 148
151#define AACI_IRQ { IRQ_EB_AACI, NO_IRQ } 149#define AACI_IRQ { IRQ_EB_AACI, NO_IRQ }
152#define AACI_DMA { 0x80, 0x81 }
153#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } 150#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
154#define MMCI0_DMA { 0x84, 0 }
155#define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ } 151#define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ }
156#define KMI0_DMA { 0, 0 }
157#define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ } 152#define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ }
158#define KMI1_DMA { 0, 0 }
159 153
160/* 154/*
161 * These devices are connected directly to the multi-layer AHB switch 155 * These devices are connected directly to the multi-layer AHB switch
162 */ 156 */
163#define EB_SMC_IRQ { NO_IRQ, NO_IRQ } 157#define EB_SMC_IRQ { NO_IRQ, NO_IRQ }
164#define EB_SMC_DMA { 0, 0 }
165#define MPMC_IRQ { NO_IRQ, NO_IRQ } 158#define MPMC_IRQ { NO_IRQ, NO_IRQ }
166#define MPMC_DMA { 0, 0 }
167#define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ } 159#define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ }
168#define EB_CLCD_DMA { 0, 0 }
169#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ } 160#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ }
170#define DMAC_DMA { 0, 0 }
171 161
172/* 162/*
173 * These devices are connected via the core APB bridge 163 * These devices are connected via the core APB bridge
174 */ 164 */
175#define SCTL_IRQ { NO_IRQ, NO_IRQ } 165#define SCTL_IRQ { NO_IRQ, NO_IRQ }
176#define SCTL_DMA { 0, 0 }
177#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ } 166#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
178#define EB_WATCHDOG_DMA { 0, 0 }
179#define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ } 167#define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ }
180#define EB_GPIO0_DMA { 0, 0 }
181#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ } 168#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ }
182#define GPIO1_DMA { 0, 0 }
183#define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ } 169#define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ }
184#define EB_RTC_DMA { 0, 0 }
185 170
186/* 171/*
187 * These devices are connected via the DMA APB bridge 172 * These devices are connected via the DMA APB bridge
188 */ 173 */
189#define SCI_IRQ { IRQ_EB_SCI, NO_IRQ } 174#define SCI_IRQ { IRQ_EB_SCI, NO_IRQ }
190#define SCI_DMA { 7, 6 }
191#define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ } 175#define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ }
192#define EB_UART0_DMA { 15, 14 }
193#define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ } 176#define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ }
194#define EB_UART1_DMA { 13, 12 }
195#define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ } 177#define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ }
196#define EB_UART2_DMA { 11, 10 }
197#define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ } 178#define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ }
198#define EB_UART3_DMA { 0x86, 0x87 }
199#define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ } 179#define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ }
200#define EB_SSP_DMA { 9, 8 }
201 180
202/* FPGA Primecells */ 181/* FPGA Primecells */
203AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 182AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
@@ -487,6 +466,7 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
487 .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 466 .boot_params = PLAT_PHYS_OFFSET + 0x00000100,
488 .fixup = realview_fixup, 467 .fixup = realview_fixup,
489 .map_io = realview_eb_map_io, 468 .map_io = realview_eb_map_io,
469 .init_early = realview_init_early,
490 .init_irq = gic_init_irq, 470 .init_irq = gic_init_irq,
491 .timer = &realview_eb_timer, 471 .timer = &realview_eb_timer,
492 .init_machine = realview_eb_init, 472 .init_machine = realview_eb_init,
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index 9f26369555c7..eab6070f66d0 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -134,47 +134,26 @@ static struct pl022_ssp_controller ssp0_plat_data = {
134 * RealView PB1176 AMBA devices 134 * RealView PB1176 AMBA devices
135 */ 135 */
136#define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ } 136#define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ }
137#define GPIO2_DMA { 0, 0 }
138#define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ } 137#define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ }
139#define GPIO3_DMA { 0, 0 }
140#define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ } 138#define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ }
141#define AACI_DMA { 0x80, 0x81 }
142#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } 139#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
143#define MMCI0_DMA { 0x84, 0 }
144#define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ } 140#define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ }
145#define KMI0_DMA { 0, 0 }
146#define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ } 141#define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ }
147#define KMI1_DMA { 0, 0 }
148#define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ } 142#define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ }
149#define PB1176_SMC_DMA { 0, 0 }
150#define MPMC_IRQ { NO_IRQ, NO_IRQ } 143#define MPMC_IRQ { NO_IRQ, NO_IRQ }
151#define MPMC_DMA { 0, 0 }
152#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ } 144#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ }
153#define PB1176_CLCD_DMA { 0, 0 }
154#define SCTL_IRQ { NO_IRQ, NO_IRQ } 145#define SCTL_IRQ { NO_IRQ, NO_IRQ }
155#define SCTL_DMA { 0, 0 }
156#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ } 146#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ }
157#define PB1176_WATCHDOG_DMA { 0, 0 }
158#define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ } 147#define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ }
159#define PB1176_GPIO0_DMA { 0, 0 }
160#define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ } 148#define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ }
161#define GPIO1_DMA { 0, 0 }
162#define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ } 149#define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ }
163#define PB1176_RTC_DMA { 0, 0 }
164#define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ } 150#define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ }
165#define SCI_DMA { 7, 6 }
166#define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ } 151#define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ }
167#define PB1176_UART0_DMA { 15, 14 }
168#define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ } 152#define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ }
169#define PB1176_UART1_DMA { 13, 12 }
170#define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ } 153#define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ }
171#define PB1176_UART2_DMA { 11, 10 }
172#define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ } 154#define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ }
173#define PB1176_UART3_DMA { 0x86, 0x87 }
174#define PB1176_UART4_IRQ { IRQ_PB1176_UART4, NO_IRQ } 155#define PB1176_UART4_IRQ { IRQ_PB1176_UART4, NO_IRQ }
175#define PB1176_UART4_DMA { 0, 0 }
176#define PB1176_SSP_IRQ { IRQ_DC1176_SSP, NO_IRQ } 156#define PB1176_SSP_IRQ { IRQ_DC1176_SSP, NO_IRQ }
177#define PB1176_SSP_DMA { 9, 8 }
178 157
179/* FPGA Primecells */ 158/* FPGA Primecells */
180AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 159AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
@@ -382,6 +361,7 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
382 .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 361 .boot_params = PLAT_PHYS_OFFSET + 0x00000100,
383 .fixup = realview_pb1176_fixup, 362 .fixup = realview_pb1176_fixup,
384 .map_io = realview_pb1176_map_io, 363 .map_io = realview_pb1176_map_io,
364 .init_early = realview_init_early,
385 .init_irq = gic_init_irq, 365 .init_irq = gic_init_irq,
386 .timer = &realview_pb1176_timer, 366 .timer = &realview_pb1176_timer,
387 .init_machine = realview_pb1176_init, 367 .init_machine = realview_pb1176_init,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index dea06b2da3a2..b2985fc7cd4e 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -136,47 +136,26 @@ static struct pl022_ssp_controller ssp0_plat_data = {
136 */ 136 */
137 137
138#define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ } 138#define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ }
139#define GPIO2_DMA { 0, 0 }
140#define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ } 139#define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ }
141#define GPIO3_DMA { 0, 0 }
142#define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ } 140#define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ }
143#define AACI_DMA { 0x80, 0x81 }
144#define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } 141#define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
145#define MMCI0_DMA { 0x84, 0 }
146#define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ } 142#define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ }
147#define KMI0_DMA { 0, 0 }
148#define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ } 143#define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ }
149#define KMI1_DMA { 0, 0 }
150#define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ } 144#define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ }
151#define PB11MP_SMC_DMA { 0, 0 }
152#define MPMC_IRQ { NO_IRQ, NO_IRQ } 145#define MPMC_IRQ { NO_IRQ, NO_IRQ }
153#define MPMC_DMA { 0, 0 }
154#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ } 146#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ }
155#define PB11MP_CLCD_DMA { 0, 0 }
156#define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ } 147#define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ }
157#define DMAC_DMA { 0, 0 }
158#define SCTL_IRQ { NO_IRQ, NO_IRQ } 148#define SCTL_IRQ { NO_IRQ, NO_IRQ }
159#define SCTL_DMA { 0, 0 }
160#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ } 149#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ }
161#define PB11MP_WATCHDOG_DMA { 0, 0 }
162#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ } 150#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ }
163#define PB11MP_GPIO0_DMA { 0, 0 }
164#define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ } 151#define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ }
165#define GPIO1_DMA { 0, 0 }
166#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ } 152#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ }
167#define PB11MP_RTC_DMA { 0, 0 }
168#define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ } 153#define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ }
169#define SCI_DMA { 7, 6 }
170#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ } 154#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ }
171#define PB11MP_UART0_DMA { 15, 14 }
172#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ } 155#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ }
173#define PB11MP_UART1_DMA { 13, 12 }
174#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ } 156#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ }
175#define PB11MP_UART2_DMA { 11, 10 }
176#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ } 157#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ }
177#define PB11MP_UART3_DMA { 0x86, 0x87 }
178#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ } 158#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ }
179#define PB11MP_SSP_DMA { 9, 8 }
180 159
181/* FPGA Primecells */ 160/* FPGA Primecells */
182AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 161AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
@@ -384,6 +363,7 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
384 .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 363 .boot_params = PLAT_PHYS_OFFSET + 0x00000100,
385 .fixup = realview_fixup, 364 .fixup = realview_fixup,
386 .map_io = realview_pb11mp_map_io, 365 .map_io = realview_pb11mp_map_io,
366 .init_early = realview_init_early,
387 .init_irq = gic_init_irq, 367 .init_irq = gic_init_irq,
388 .timer = &realview_pb11mp_timer, 368 .timer = &realview_pb11mp_timer,
389 .init_machine = realview_pb11mp_init, 369 .init_machine = realview_pb11mp_init,
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index 7d0f1734a217..fb6866558760 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -126,47 +126,26 @@ static struct pl022_ssp_controller ssp0_plat_data = {
126 */ 126 */
127 127
128#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ } 128#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ }
129#define GPIO2_DMA { 0, 0 }
130#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ } 129#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ }
131#define GPIO3_DMA { 0, 0 }
132#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ } 130#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ }
133#define AACI_DMA { 0x80, 0x81 }
134#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } 131#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
135#define MMCI0_DMA { 0x84, 0 }
136#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ } 132#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ }
137#define KMI0_DMA { 0, 0 }
138#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ } 133#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ }
139#define KMI1_DMA { 0, 0 }
140#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ } 134#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ }
141#define PBA8_SMC_DMA { 0, 0 }
142#define MPMC_IRQ { NO_IRQ, NO_IRQ } 135#define MPMC_IRQ { NO_IRQ, NO_IRQ }
143#define MPMC_DMA { 0, 0 }
144#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ } 136#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ }
145#define PBA8_CLCD_DMA { 0, 0 }
146#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ } 137#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ }
147#define DMAC_DMA { 0, 0 }
148#define SCTL_IRQ { NO_IRQ, NO_IRQ } 138#define SCTL_IRQ { NO_IRQ, NO_IRQ }
149#define SCTL_DMA { 0, 0 }
150#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ } 139#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ }
151#define PBA8_WATCHDOG_DMA { 0, 0 }
152#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ } 140#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ }
153#define PBA8_GPIO0_DMA { 0, 0 }
154#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ } 141#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ }
155#define GPIO1_DMA { 0, 0 }
156#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ } 142#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ }
157#define PBA8_RTC_DMA { 0, 0 }
158#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ } 143#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ }
159#define SCI_DMA { 7, 6 }
160#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ } 144#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ }
161#define PBA8_UART0_DMA { 15, 14 }
162#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ } 145#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ }
163#define PBA8_UART1_DMA { 13, 12 }
164#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ } 146#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ }
165#define PBA8_UART2_DMA { 11, 10 }
166#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ } 147#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ }
167#define PBA8_UART3_DMA { 0x86, 0x87 }
168#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ } 148#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ }
169#define PBA8_SSP_DMA { 9, 8 }
170 149
171/* FPGA Primecells */ 150/* FPGA Primecells */
172AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 151AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
@@ -334,6 +313,7 @@ MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
334 .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 313 .boot_params = PLAT_PHYS_OFFSET + 0x00000100,
335 .fixup = realview_fixup, 314 .fixup = realview_fixup,
336 .map_io = realview_pba8_map_io, 315 .map_io = realview_pba8_map_io,
316 .init_early = realview_init_early,
337 .init_irq = gic_init_irq, 317 .init_irq = gic_init_irq,
338 .timer = &realview_pba8_timer, 318 .timer = &realview_pba8_timer,
339 .init_machine = realview_pba8_init, 319 .init_machine = realview_pba8_init,
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index b89e28f8853e..92ace2cf2b2c 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -148,47 +148,26 @@ static struct pl022_ssp_controller ssp0_plat_data = {
148 */ 148 */
149 149
150#define GPIO2_IRQ { IRQ_PBX_GPIO2, NO_IRQ } 150#define GPIO2_IRQ { IRQ_PBX_GPIO2, NO_IRQ }
151#define GPIO2_DMA { 0, 0 }
152#define GPIO3_IRQ { IRQ_PBX_GPIO3, NO_IRQ } 151#define GPIO3_IRQ { IRQ_PBX_GPIO3, NO_IRQ }
153#define GPIO3_DMA { 0, 0 }
154#define AACI_IRQ { IRQ_PBX_AACI, NO_IRQ } 152#define AACI_IRQ { IRQ_PBX_AACI, NO_IRQ }
155#define AACI_DMA { 0x80, 0x81 }
156#define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B } 153#define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B }
157#define MMCI0_DMA { 0x84, 0 }
158#define KMI0_IRQ { IRQ_PBX_KMI0, NO_IRQ } 154#define KMI0_IRQ { IRQ_PBX_KMI0, NO_IRQ }
159#define KMI0_DMA { 0, 0 }
160#define KMI1_IRQ { IRQ_PBX_KMI1, NO_IRQ } 155#define KMI1_IRQ { IRQ_PBX_KMI1, NO_IRQ }
161#define KMI1_DMA { 0, 0 }
162#define PBX_SMC_IRQ { NO_IRQ, NO_IRQ } 156#define PBX_SMC_IRQ { NO_IRQ, NO_IRQ }
163#define PBX_SMC_DMA { 0, 0 }
164#define MPMC_IRQ { NO_IRQ, NO_IRQ } 157#define MPMC_IRQ { NO_IRQ, NO_IRQ }
165#define MPMC_DMA { 0, 0 }
166#define PBX_CLCD_IRQ { IRQ_PBX_CLCD, NO_IRQ } 158#define PBX_CLCD_IRQ { IRQ_PBX_CLCD, NO_IRQ }
167#define PBX_CLCD_DMA { 0, 0 }
168#define DMAC_IRQ { IRQ_PBX_DMAC, NO_IRQ } 159#define DMAC_IRQ { IRQ_PBX_DMAC, NO_IRQ }
169#define DMAC_DMA { 0, 0 }
170#define SCTL_IRQ { NO_IRQ, NO_IRQ } 160#define SCTL_IRQ { NO_IRQ, NO_IRQ }
171#define SCTL_DMA { 0, 0 }
172#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG, NO_IRQ } 161#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG, NO_IRQ }
173#define PBX_WATCHDOG_DMA { 0, 0 }
174#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0, NO_IRQ } 162#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0, NO_IRQ }
175#define PBX_GPIO0_DMA { 0, 0 }
176#define GPIO1_IRQ { IRQ_PBX_GPIO1, NO_IRQ } 163#define GPIO1_IRQ { IRQ_PBX_GPIO1, NO_IRQ }
177#define GPIO1_DMA { 0, 0 }
178#define PBX_RTC_IRQ { IRQ_PBX_RTC, NO_IRQ } 164#define PBX_RTC_IRQ { IRQ_PBX_RTC, NO_IRQ }
179#define PBX_RTC_DMA { 0, 0 }
180#define SCI_IRQ { IRQ_PBX_SCI, NO_IRQ } 165#define SCI_IRQ { IRQ_PBX_SCI, NO_IRQ }
181#define SCI_DMA { 7, 6 }
182#define PBX_UART0_IRQ { IRQ_PBX_UART0, NO_IRQ } 166#define PBX_UART0_IRQ { IRQ_PBX_UART0, NO_IRQ }
183#define PBX_UART0_DMA { 15, 14 }
184#define PBX_UART1_IRQ { IRQ_PBX_UART1, NO_IRQ } 167#define PBX_UART1_IRQ { IRQ_PBX_UART1, NO_IRQ }
185#define PBX_UART1_DMA { 13, 12 }
186#define PBX_UART2_IRQ { IRQ_PBX_UART2, NO_IRQ } 168#define PBX_UART2_IRQ { IRQ_PBX_UART2, NO_IRQ }
187#define PBX_UART2_DMA { 11, 10 }
188#define PBX_UART3_IRQ { IRQ_PBX_UART3, NO_IRQ } 169#define PBX_UART3_IRQ { IRQ_PBX_UART3, NO_IRQ }
189#define PBX_UART3_DMA { 0x86, 0x87 }
190#define PBX_SSP_IRQ { IRQ_PBX_SSP, NO_IRQ } 170#define PBX_SSP_IRQ { IRQ_PBX_SSP, NO_IRQ }
191#define PBX_SSP_DMA { 9, 8 }
192 171
193/* FPGA Primecells */ 172/* FPGA Primecells */
194AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 173AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
@@ -417,6 +396,7 @@ MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
417 .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 396 .boot_params = PLAT_PHYS_OFFSET + 0x00000100,
418 .fixup = realview_pbx_fixup, 397 .fixup = realview_pbx_fixup,
419 .map_io = realview_pbx_map_io, 398 .map_io = realview_pbx_map_io,
399 .init_early = realview_init_early,
420 .init_irq = gic_init_irq, 400 .init_irq = gic_init_irq,
421 .timer = &realview_pbx_timer, 401 .timer = &realview_pbx_timer,
422 .init_machine = realview_pbx_init, 402 .init_machine = realview_pbx_init,
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index d80f129bca94..dfedc9c9e005 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -488,6 +488,11 @@ static struct i2c_board_info mini2440_i2c_devs[] __initdata = {
488 }, 488 },
489}; 489};
490 490
491static struct platform_device uda1340_codec = {
492 .name = "uda134x-codec",
493 .id = -1,
494};
495
491static struct platform_device *mini2440_devices[] __initdata = { 496static struct platform_device *mini2440_devices[] __initdata = {
492 &s3c_device_ohci, 497 &s3c_device_ohci,
493 &s3c_device_wdt, 498 &s3c_device_wdt,
@@ -503,7 +508,9 @@ static struct platform_device *mini2440_devices[] __initdata = {
503 &s3c_device_nand, 508 &s3c_device_nand,
504 &s3c_device_sdi, 509 &s3c_device_sdi,
505 &s3c_device_iis, 510 &s3c_device_iis,
511 &uda1340_codec,
506 &mini2440_audio, 512 &mini2440_audio,
513 &samsung_asoc_dma,
507}; 514};
508 515
509static void __init mini2440_map_io(void) 516static void __init mini2440_map_io(void)
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 1a8118c929be..a94f29da5d30 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -923,7 +923,8 @@ static struct platform_device ceu_device = {
923 .num_resources = ARRAY_SIZE(ceu_resources), 923 .num_resources = ARRAY_SIZE(ceu_resources),
924 .resource = ceu_resources, 924 .resource = ceu_resources,
925 .dev = { 925 .dev = {
926 .platform_data = &sh_mobile_ceu_info, 926 .platform_data = &sh_mobile_ceu_info,
927 .coherent_dma_mask = 0xffffffff,
927 }, 928 },
928}; 929};
929 930
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 1a63c213e45d..49bc07482179 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -295,6 +295,18 @@ static struct fb_videomode mackerel_lcdc_modes[] = {
295 }, 295 },
296}; 296};
297 297
298static int mackerel_set_brightness(void *board_data, int brightness)
299{
300 gpio_set_value(GPIO_PORT31, brightness);
301
302 return 0;
303}
304
305static int mackerel_get_brightness(void *board_data)
306{
307 return gpio_get_value(GPIO_PORT31);
308}
309
298static struct sh_mobile_lcdc_info lcdc_info = { 310static struct sh_mobile_lcdc_info lcdc_info = {
299 .clock_source = LCDC_CLK_BUS, 311 .clock_source = LCDC_CLK_BUS,
300 .ch[0] = { 312 .ch[0] = {
@@ -307,6 +319,14 @@ static struct sh_mobile_lcdc_info lcdc_info = {
307 .flags = 0, 319 .flags = 0,
308 .lcd_size_cfg.width = 152, 320 .lcd_size_cfg.width = 152,
309 .lcd_size_cfg.height = 91, 321 .lcd_size_cfg.height = 91,
322 .board_cfg = {
323 .set_brightness = mackerel_set_brightness,
324 .get_brightness = mackerel_get_brightness,
325 },
326 .bl_info = {
327 .name = "sh_mobile_lcdc_bl",
328 .max_brightness = 1,
329 },
310 } 330 }
311}; 331};
312 332
@@ -901,7 +921,8 @@ static struct platform_device ceu_device = {
901 .num_resources = ARRAY_SIZE(ceu_resources), 921 .num_resources = ARRAY_SIZE(ceu_resources),
902 .resource = ceu_resources, 922 .resource = ceu_resources,
903 .dev = { 923 .dev = {
904 .platform_data = &sh_mobile_ceu_info, 924 .platform_data = &sh_mobile_ceu_info,
925 .coherent_dma_mask = 0xffffffff,
905 }, 926 },
906}; 927};
907 928
@@ -1059,7 +1080,7 @@ static void __init mackerel_init(void)
1059 gpio_request(GPIO_FN_LCDDCK, NULL); 1080 gpio_request(GPIO_FN_LCDDCK, NULL);
1060 1081
1061 gpio_request(GPIO_PORT31, NULL); /* backlight */ 1082 gpio_request(GPIO_PORT31, NULL); /* backlight */
1062 gpio_direction_output(GPIO_PORT31, 1); 1083 gpio_direction_output(GPIO_PORT31, 0); /* off by default */
1063 1084
1064 gpio_request(GPIO_PORT151, NULL); /* LCDDON */ 1085 gpio_request(GPIO_PORT151, NULL); /* LCDDON */
1065 gpio_direction_output(GPIO_PORT151, 1); 1086 gpio_direction_output(GPIO_PORT151, 1);
diff --git a/arch/arm/mach-shmobile/include/mach/mmcif-ap4eb.h b/arch/arm/mach-shmobile/include/mach/mmc-ap4eb.h
index a8d02be8d2b6..db59fdbda860 100644
--- a/arch/arm/mach-shmobile/include/mach/mmcif-ap4eb.h
+++ b/arch/arm/mach-shmobile/include/mach/mmc-ap4eb.h
@@ -1,5 +1,5 @@
1#ifndef MMCIF_AP4EB_H 1#ifndef MMC_AP4EB_H
2#define MMCIF_AP4EB_H 2#define MMC_AP4EB_H
3 3
4#define PORT185CR (void __iomem *)0xe60520b9 4#define PORT185CR (void __iomem *)0xe60520b9
5#define PORT186CR (void __iomem *)0xe60520ba 5#define PORT186CR (void __iomem *)0xe60520ba
@@ -8,7 +8,7 @@
8 8
9#define PORTR191_160DR (void __iomem *)0xe6056014 9#define PORTR191_160DR (void __iomem *)0xe6056014
10 10
11static inline void mmcif_init_progress(void) 11static inline void mmc_init_progress(void)
12{ 12{
13 /* Initialise LEDS1-4 13 /* Initialise LEDS1-4
14 * registers: PORT185CR-PORT188CR (LED1-LED4 Control) 14 * registers: PORT185CR-PORT188CR (LED1-LED4 Control)
@@ -20,10 +20,10 @@ static inline void mmcif_init_progress(void)
20 __raw_writeb(0x10, PORT188CR); 20 __raw_writeb(0x10, PORT188CR);
21} 21}
22 22
23static inline void mmcif_update_progress(int n) 23static inline void mmc_update_progress(int n)
24{ 24{
25 __raw_writel((__raw_readl(PORTR191_160DR) & ~(0xf << 25)) | 25 __raw_writel((__raw_readl(PORTR191_160DR) & ~(0xf << 25)) |
26 (1 << (25 + n)), PORTR191_160DR); 26 (1 << (25 + n)), PORTR191_160DR);
27} 27}
28 28
29#endif /* MMCIF_AP4EB_H */ 29#endif /* MMC_AP4EB_H */
diff --git a/arch/arm/mach-shmobile/include/mach/mmcif-mackerel.h b/arch/arm/mach-shmobile/include/mach/mmc-mackerel.h
index 4b4f6949a868..15d3a9efdec2 100644
--- a/arch/arm/mach-shmobile/include/mach/mmcif-mackerel.h
+++ b/arch/arm/mach-shmobile/include/mach/mmc-mackerel.h
@@ -1,5 +1,5 @@
1#ifndef MMCIF_MACKEREL_H 1#ifndef MMC_MACKEREL_H
2#define MMCIF_MACKEREL_H 2#define MMC_MACKEREL_H
3 3
4#define PORT0CR (void __iomem *)0xe6051000 4#define PORT0CR (void __iomem *)0xe6051000
5#define PORT1CR (void __iomem *)0xe6051001 5#define PORT1CR (void __iomem *)0xe6051001
@@ -9,7 +9,7 @@
9#define PORTR031_000DR (void __iomem *)0xe6055000 9#define PORTR031_000DR (void __iomem *)0xe6055000
10#define PORTL159_128DR (void __iomem *)0xe6054010 10#define PORTL159_128DR (void __iomem *)0xe6054010
11 11
12static inline void mmcif_init_progress(void) 12static inline void mmc_init_progress(void)
13{ 13{
14 /* Initialise LEDS0-3 14 /* Initialise LEDS0-3
15 * registers: PORT0CR-PORT2CR,PORT159CR (LED0-LED3 Control) 15 * registers: PORT0CR-PORT2CR,PORT159CR (LED0-LED3 Control)
@@ -21,7 +21,7 @@ static inline void mmcif_init_progress(void)
21 __raw_writeb(0x10, PORT159CR); 21 __raw_writeb(0x10, PORT159CR);
22} 22}
23 23
24static inline void mmcif_update_progress(int n) 24static inline void mmc_update_progress(int n)
25{ 25{
26 unsigned a = 0, b = 0; 26 unsigned a = 0, b = 0;
27 27
@@ -35,5 +35,4 @@ static inline void mmcif_update_progress(int n)
35 __raw_writel((__raw_readl(PORTL159_128DR) & ~(1 << 31)) | b, 35 __raw_writel((__raw_readl(PORTL159_128DR) & ~(1 << 31)) | b,
36 PORTL159_128DR); 36 PORTL159_128DR);
37} 37}
38 38#endif /* MMC_MACKEREL_H */
39#endif /* MMCIF_MACKEREL_H */
diff --git a/arch/arm/mach-shmobile/include/mach/mmcif.h b/arch/arm/mach-shmobile/include/mach/mmc.h
index f4dc3279cf03..e11560a525a1 100644
--- a/arch/arm/mach-shmobile/include/mach/mmcif.h
+++ b/arch/arm/mach-shmobile/include/mach/mmc.h
@@ -1,5 +1,5 @@
1#ifndef MMCIF_H 1#ifndef MMC_H
2#define MMCIF_H 2#define MMC_H
3 3
4/************************************************** 4/**************************************************
5 * 5 *
@@ -8,11 +8,11 @@
8 **************************************************/ 8 **************************************************/
9 9
10#ifdef CONFIG_MACH_AP4EVB 10#ifdef CONFIG_MACH_AP4EVB
11#include "mach/mmcif-ap4eb.h" 11#include "mach/mmc-ap4eb.h"
12#elif CONFIG_MACH_MACKEREL 12#elif CONFIG_MACH_MACKEREL
13#include "mach/mmcif-mackerel.h" 13#include "mach/mmc-mackerel.h"
14#else 14#else
15#error "unsupported board." 15#error "unsupported board."
16#endif 16#endif
17 17
18#endif /* MMCIF_H */ 18#endif /* MMC_H */
diff --git a/arch/arm/mach-shmobile/localtimer.c b/arch/arm/mach-shmobile/localtimer.c
index 2111c28b724e..ad9ccc9900c8 100644
--- a/arch/arm/mach-shmobile/localtimer.c
+++ b/arch/arm/mach-shmobile/localtimer.c
@@ -18,8 +18,9 @@
18/* 18/*
19 * Setup the local clock events for a CPU. 19 * Setup the local clock events for a CPU.
20 */ 20 */
21void __cpuinit local_timer_setup(struct clock_event_device *evt) 21int __cpuinit local_timer_setup(struct clock_event_device *evt)
22{ 22{
23 evt->irq = 29; 23 evt->irq = 29;
24 twd_timer_setup(evt); 24 twd_timer_setup(evt);
25 return 0;
25} 26}
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 622a9ec1ff08..3cdeffc97b44 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -36,6 +36,11 @@ config MACH_KAEN
36 help 36 help
37 Support for the Kaen version of Seaboard 37 Support for the Kaen version of Seaboard
38 38
39config MACH_PAZ00
40 bool "Paz00 board"
41 help
42 Support for the Toshiba AC100/Dynabook AZ netbook
43
39config MACH_SEABOARD 44config MACH_SEABOARD
40 bool "Seaboard board" 45 bool "Seaboard board"
41 help 46 help
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 9f7a7e1e0c38..1afe05038c27 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -22,6 +22,10 @@ obj-$(CONFIG_USB_SUPPORT) += usb_phy.o
22obj-${CONFIG_MACH_HARMONY} += board-harmony.o 22obj-${CONFIG_MACH_HARMONY} += board-harmony.o
23obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o 23obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o
24obj-${CONFIG_MACH_HARMONY} += board-harmony-pcie.o 24obj-${CONFIG_MACH_HARMONY} += board-harmony-pcie.o
25obj-${CONFIG_MACH_HARMONY} += board-harmony-power.o
26
27obj-${CONFIG_MACH_PAZ00} += board-paz00.o
28obj-${CONFIG_MACH_PAZ00} += board-paz00-pinmux.o
25 29
26obj-${CONFIG_MACH_SEABOARD} += board-seaboard.o 30obj-${CONFIG_MACH_SEABOARD} += board-seaboard.o
27obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o 31obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o
diff --git a/arch/arm/mach-tegra/board-harmony-pcie.c b/arch/arm/mach-tegra/board-harmony-pcie.c
index f7e7d4514b6a..9c27b95b8d86 100644
--- a/arch/arm/mach-tegra/board-harmony-pcie.c
+++ b/arch/arm/mach-tegra/board-harmony-pcie.c
@@ -27,13 +27,29 @@
27 27
28#ifdef CONFIG_TEGRA_PCI 28#ifdef CONFIG_TEGRA_PCI
29 29
30/* GPIO 3 of the PMIC */
31#define EN_VDD_1V05_GPIO (TEGRA_NR_GPIOS + 2)
32
30static int __init harmony_pcie_init(void) 33static int __init harmony_pcie_init(void)
31{ 34{
35 struct regulator *regulator = NULL;
32 int err; 36 int err;
33 37
34 if (!machine_is_harmony()) 38 if (!machine_is_harmony())
35 return 0; 39 return 0;
36 40
41 err = gpio_request(EN_VDD_1V05_GPIO, "EN_VDD_1V05");
42 if (err)
43 return err;
44
45 gpio_direction_output(EN_VDD_1V05_GPIO, 1);
46
47 regulator = regulator_get(NULL, "pex_clk");
48 if (IS_ERR_OR_NULL(regulator))
49 goto err_reg;
50
51 regulator_enable(regulator);
52
37 tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPV, TEGRA_TRI_NORMAL); 53 tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPV, TEGRA_TRI_NORMAL);
38 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_NORMAL); 54 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_NORMAL);
39 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_NORMAL); 55 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_NORMAL);
@@ -49,9 +65,15 @@ err_pcie:
49 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_TRISTATE); 65 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_TRISTATE);
50 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_TRISTATE); 66 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_TRISTATE);
51 67
68 regulator_disable(regulator);
69 regulator_put(regulator);
70err_reg:
71 gpio_free(EN_VDD_1V05_GPIO);
72
52 return err; 73 return err;
53} 74}
54 75
55subsys_initcall(harmony_pcie_init); 76/* PCI should be initialized after I2C, mfd and regulators */
77subsys_initcall_sync(harmony_pcie_init);
56 78
57#endif 79#endif
diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index 98368d947be3..4d63e2e97a8d 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -27,11 +27,11 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
27 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 27 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
28 {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 28 {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
29 {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 29 {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
30 {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_OSC, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 30 {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
31 {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 31 {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
32 {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 32 {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
33 {TEGRA_PINGROUP_CSUS, TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 33 {TEGRA_PINGROUP_CSUS, TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
34 {TEGRA_PINGROUP_DAP1, TEGRA_MUX_DAP1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 34 {TEGRA_PINGROUP_DAP1, TEGRA_MUX_DAP1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
35 {TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 35 {TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
36 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 36 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
37 {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 37 {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
@@ -114,13 +114,13 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
114 {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 114 {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
115 {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 115 {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
116 {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 116 {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
117 {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 117 {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
118 {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 118 {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
119 {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 119 {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
120 {TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 120 {TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
121 {TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 121 {TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
122 {TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 122 {TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
123 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 123 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
124 {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 124 {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
125 {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 125 {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
126 {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 126 {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
@@ -141,12 +141,16 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
141}; 141};
142 142
143static struct tegra_gpio_table gpio_table[] = { 143static struct tegra_gpio_table gpio_table[] = {
144 { .gpio = TEGRA_GPIO_PI5, .enable = true }, /* mmc2 cd */ 144 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
145 { .gpio = TEGRA_GPIO_PH1, .enable = true }, /* mmc2 wp */ 145 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true },
146 { .gpio = TEGRA_GPIO_PT3, .enable = true }, /* mmc2 pwr */ 146 { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true },
147 { .gpio = TEGRA_GPIO_PH2, .enable = true }, /* mmc4 cd */ 147 { .gpio = TEGRA_GPIO_SD4_CD, .enable = true },
148 { .gpio = TEGRA_GPIO_PH3, .enable = true }, /* mmc4 wp */ 148 { .gpio = TEGRA_GPIO_SD4_WP, .enable = true },
149 { .gpio = TEGRA_GPIO_PI6, .enable = true }, /* mmc4 pwr */ 149 { .gpio = TEGRA_GPIO_SD4_POWER, .enable = true },
150 { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
151 { .gpio = TEGRA_GPIO_HP_DET, .enable = true },
152 { .gpio = TEGRA_GPIO_INT_MIC_EN, .enable = true },
153 { .gpio = TEGRA_GPIO_EXT_MIC_EN, .enable = true },
150}; 154};
151 155
152void harmony_pinmux_init(void) 156void harmony_pinmux_init(void)
diff --git a/arch/arm/mach-tegra/board-harmony-power.c b/arch/arm/mach-tegra/board-harmony-power.c
new file mode 100644
index 000000000000..c84442cabe07
--- /dev/null
+++ b/arch/arm/mach-tegra/board-harmony-power.c
@@ -0,0 +1,117 @@
1/*
2 * Copyright (C) 2010 NVIDIA, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
16 * 02111-1307, USA
17 */
18#include <linux/i2c.h>
19#include <linux/platform_device.h>
20#include <linux/gpio.h>
21
22#include <linux/regulator/machine.h>
23#include <linux/mfd/tps6586x.h>
24
25#include <mach/irqs.h>
26
27#define PMC_CTRL 0x0
28#define PMC_CTRL_INTR_LOW (1 << 17)
29
30static struct regulator_consumer_supply tps658621_ldo0_supply[] = {
31 REGULATOR_SUPPLY("pex_clk", NULL),
32};
33
34static struct regulator_init_data ldo0_data = {
35 .constraints = {
36 .min_uV = 1250 * 1000,
37 .max_uV = 3300 * 1000,
38 .valid_modes_mask = (REGULATOR_MODE_NORMAL |
39 REGULATOR_MODE_STANDBY),
40 .valid_ops_mask = (REGULATOR_CHANGE_MODE |
41 REGULATOR_CHANGE_STATUS |
42 REGULATOR_CHANGE_VOLTAGE),
43 },
44 .num_consumer_supplies = ARRAY_SIZE(tps658621_ldo0_supply),
45 .consumer_supplies = tps658621_ldo0_supply,
46};
47
48#define HARMONY_REGULATOR_INIT(_id, _minmv, _maxmv) \
49 static struct regulator_init_data _id##_data = { \
50 .constraints = { \
51 .min_uV = (_minmv)*1000, \
52 .max_uV = (_maxmv)*1000, \
53 .valid_modes_mask = (REGULATOR_MODE_NORMAL | \
54 REGULATOR_MODE_STANDBY), \
55 .valid_ops_mask = (REGULATOR_CHANGE_MODE | \
56 REGULATOR_CHANGE_STATUS | \
57 REGULATOR_CHANGE_VOLTAGE), \
58 }, \
59 }
60
61HARMONY_REGULATOR_INIT(sm0, 725, 1500);
62HARMONY_REGULATOR_INIT(sm1, 725, 1500);
63HARMONY_REGULATOR_INIT(sm2, 3000, 4550);
64HARMONY_REGULATOR_INIT(ldo1, 725, 1500);
65HARMONY_REGULATOR_INIT(ldo2, 725, 1500);
66HARMONY_REGULATOR_INIT(ldo3, 1250, 3300);
67HARMONY_REGULATOR_INIT(ldo4, 1700, 2475);
68HARMONY_REGULATOR_INIT(ldo5, 1250, 3300);
69HARMONY_REGULATOR_INIT(ldo6, 1250, 3300);
70HARMONY_REGULATOR_INIT(ldo7, 1250, 3300);
71HARMONY_REGULATOR_INIT(ldo8, 1250, 3300);
72HARMONY_REGULATOR_INIT(ldo9, 1250, 3300);
73
74#define TPS_REG(_id, _data) \
75 { \
76 .id = TPS6586X_ID_##_id, \
77 .name = "tps6586x-regulator", \
78 .platform_data = _data, \
79 }
80
81static struct tps6586x_subdev_info tps_devs[] = {
82 TPS_REG(SM_0, &sm0_data),
83 TPS_REG(SM_1, &sm1_data),
84 TPS_REG(SM_2, &sm2_data),
85 TPS_REG(LDO_0, &ldo0_data),
86 TPS_REG(LDO_1, &ldo1_data),
87 TPS_REG(LDO_2, &ldo2_data),
88 TPS_REG(LDO_3, &ldo3_data),
89 TPS_REG(LDO_4, &ldo4_data),
90 TPS_REG(LDO_5, &ldo5_data),
91 TPS_REG(LDO_6, &ldo6_data),
92 TPS_REG(LDO_7, &ldo7_data),
93 TPS_REG(LDO_8, &ldo8_data),
94 TPS_REG(LDO_9, &ldo9_data),
95};
96
97static struct tps6586x_platform_data tps_platform = {
98 .irq_base = TEGRA_NR_IRQS,
99 .num_subdevs = ARRAY_SIZE(tps_devs),
100 .subdevs = tps_devs,
101 .gpio_base = TEGRA_NR_GPIOS,
102};
103
104static struct i2c_board_info __initdata harmony_regulators[] = {
105 {
106 I2C_BOARD_INFO("tps6586x", 0x34),
107 .irq = INT_EXTERNAL_PMU,
108 .platform_data = &tps_platform,
109 },
110};
111
112int __init harmony_regulator_init(void)
113{
114 i2c_register_board_info(3, harmony_regulators, 1);
115
116 return 0;
117}
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index 49224e936eb4..75c918a86a31 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -2,6 +2,7 @@
2 * arch/arm/mach-tegra/board-harmony.c 2 * arch/arm/mach-tegra/board-harmony.c
3 * 3 *
4 * Copyright (C) 2010 Google, Inc. 4 * Copyright (C) 2010 Google, Inc.
5 * Copyright (C) 2011 NVIDIA, Inc.
5 * 6 *
6 * This software is licensed under the terms of the GNU General Public 7 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and 8 * License version 2, as published by the Free Software Foundation, and
@@ -22,12 +23,18 @@
22#include <linux/dma-mapping.h> 23#include <linux/dma-mapping.h>
23#include <linux/pda_power.h> 24#include <linux/pda_power.h>
24#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/gpio.h>
27#include <linux/i2c.h>
28#include <linux/i2c-tegra.h>
29
30#include <sound/wm8903.h>
25 31
26#include <asm/mach-types.h> 32#include <asm/mach-types.h>
27#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
28#include <asm/mach/time.h> 34#include <asm/mach/time.h>
29#include <asm/setup.h> 35#include <asm/setup.h>
30 36
37#include <mach/harmony_audio.h>
31#include <mach/iomap.h> 38#include <mach/iomap.h>
32#include <mach/irqs.h> 39#include <mach/irqs.h>
33#include <mach/sdhci.h> 40#include <mach/sdhci.h>
@@ -60,11 +67,81 @@ static struct platform_device debug_uart = {
60 }, 67 },
61}; 68};
62 69
70static struct harmony_audio_platform_data harmony_audio_pdata = {
71 .gpio_spkr_en = TEGRA_GPIO_SPKR_EN,
72 .gpio_hp_det = TEGRA_GPIO_HP_DET,
73 .gpio_int_mic_en = TEGRA_GPIO_INT_MIC_EN,
74 .gpio_ext_mic_en = TEGRA_GPIO_EXT_MIC_EN,
75};
76
77static struct platform_device harmony_audio_device = {
78 .name = "tegra-snd-harmony",
79 .id = 0,
80 .dev = {
81 .platform_data = &harmony_audio_pdata,
82 },
83};
84
85static struct tegra_i2c_platform_data harmony_i2c1_platform_data = {
86 .bus_clk_rate = 400000,
87};
88
89static struct tegra_i2c_platform_data harmony_i2c2_platform_data = {
90 .bus_clk_rate = 400000,
91};
92
93static struct tegra_i2c_platform_data harmony_i2c3_platform_data = {
94 .bus_clk_rate = 400000,
95};
96
97static struct tegra_i2c_platform_data harmony_dvc_platform_data = {
98 .bus_clk_rate = 400000,
99};
100
101static struct wm8903_platform_data harmony_wm8903_pdata = {
102 .irq_active_low = 0,
103 .micdet_cfg = 0,
104 .micdet_delay = 100,
105 .gpio_base = HARMONY_GPIO_WM8903(0),
106 .gpio_cfg = {
107 WM8903_GPIO_NO_CONFIG,
108 WM8903_GPIO_NO_CONFIG,
109 0,
110 WM8903_GPIO_NO_CONFIG,
111 WM8903_GPIO_NO_CONFIG,
112 },
113};
114
115static struct i2c_board_info __initdata wm8903_board_info = {
116 I2C_BOARD_INFO("wm8903", 0x1a),
117 .platform_data = &harmony_wm8903_pdata,
118 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
119};
120
121static void __init harmony_i2c_init(void)
122{
123 tegra_i2c_device1.dev.platform_data = &harmony_i2c1_platform_data;
124 tegra_i2c_device2.dev.platform_data = &harmony_i2c2_platform_data;
125 tegra_i2c_device3.dev.platform_data = &harmony_i2c3_platform_data;
126 tegra_i2c_device4.dev.platform_data = &harmony_dvc_platform_data;
127
128 platform_device_register(&tegra_i2c_device1);
129 platform_device_register(&tegra_i2c_device2);
130 platform_device_register(&tegra_i2c_device3);
131 platform_device_register(&tegra_i2c_device4);
132
133 i2c_register_board_info(0, &wm8903_board_info, 1);
134}
135
63static struct platform_device *harmony_devices[] __initdata = { 136static struct platform_device *harmony_devices[] __initdata = {
64 &debug_uart, 137 &debug_uart,
65 &tegra_sdhci_device1, 138 &tegra_sdhci_device1,
66 &tegra_sdhci_device2, 139 &tegra_sdhci_device2,
67 &tegra_sdhci_device4, 140 &tegra_sdhci_device4,
141 &tegra_i2s_device1,
142 &tegra_das_device,
143 &tegra_pcm_device,
144 &harmony_audio_device,
68}; 145};
69 146
70static void __init tegra_harmony_fixup(struct machine_desc *desc, 147static void __init tegra_harmony_fixup(struct machine_desc *desc,
@@ -80,6 +157,10 @@ static void __init tegra_harmony_fixup(struct machine_desc *desc,
80static __initdata struct tegra_clk_init_table harmony_clk_init_table[] = { 157static __initdata struct tegra_clk_init_table harmony_clk_init_table[] = {
81 /* name parent rate enabled */ 158 /* name parent rate enabled */
82 { "uartd", "pll_p", 216000000, true }, 159 { "uartd", "pll_p", 216000000, true },
160 { "pll_a", "pll_p_out1", 56448000, true },
161 { "pll_a_out0", "pll_a", 11289600, true },
162 { "cdev1", NULL, 0, true },
163 { "i2s1", "pll_a_out0", 11289600, false},
83 { NULL, NULL, 0, 0}, 164 { NULL, NULL, 0, 0},
84}; 165};
85 166
@@ -91,15 +172,15 @@ static struct tegra_sdhci_platform_data sdhci_pdata1 = {
91}; 172};
92 173
93static struct tegra_sdhci_platform_data sdhci_pdata2 = { 174static struct tegra_sdhci_platform_data sdhci_pdata2 = {
94 .cd_gpio = TEGRA_GPIO_PI5, 175 .cd_gpio = TEGRA_GPIO_SD2_CD,
95 .wp_gpio = TEGRA_GPIO_PH1, 176 .wp_gpio = TEGRA_GPIO_SD2_WP,
96 .power_gpio = TEGRA_GPIO_PT3, 177 .power_gpio = TEGRA_GPIO_SD2_POWER,
97}; 178};
98 179
99static struct tegra_sdhci_platform_data sdhci_pdata4 = { 180static struct tegra_sdhci_platform_data sdhci_pdata4 = {
100 .cd_gpio = TEGRA_GPIO_PH2, 181 .cd_gpio = TEGRA_GPIO_SD4_CD,
101 .wp_gpio = TEGRA_GPIO_PH3, 182 .wp_gpio = TEGRA_GPIO_SD4_WP,
102 .power_gpio = TEGRA_GPIO_PI6, 183 .power_gpio = TEGRA_GPIO_SD4_POWER,
103 .is_8bit = 1, 184 .is_8bit = 1,
104}; 185};
105 186
@@ -114,6 +195,8 @@ static void __init tegra_harmony_init(void)
114 tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4; 195 tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
115 196
116 platform_add_devices(harmony_devices, ARRAY_SIZE(harmony_devices)); 197 platform_add_devices(harmony_devices, ARRAY_SIZE(harmony_devices));
198 harmony_i2c_init();
199 harmony_regulator_init();
117} 200}
118 201
119MACHINE_START(HARMONY, "harmony") 202MACHINE_START(HARMONY, "harmony")
diff --git a/arch/arm/mach-tegra/board-harmony.h b/arch/arm/mach-tegra/board-harmony.h
index 09ca7755dd55..1e57b071f52d 100644
--- a/arch/arm/mach-tegra/board-harmony.h
+++ b/arch/arm/mach-tegra/board-harmony.h
@@ -17,6 +17,21 @@
17#ifndef _MACH_TEGRA_BOARD_HARMONY_H 17#ifndef _MACH_TEGRA_BOARD_HARMONY_H
18#define _MACH_TEGRA_BOARD_HARMONY_H 18#define _MACH_TEGRA_BOARD_HARMONY_H
19 19
20#define HARMONY_GPIO_WM8903(_x_) (TEGRA_NR_GPIOS + (_x_))
21
22#define TEGRA_GPIO_SD2_CD TEGRA_GPIO_PI5
23#define TEGRA_GPIO_SD2_WP TEGRA_GPIO_PH1
24#define TEGRA_GPIO_SD2_POWER TEGRA_GPIO_PT3
25#define TEGRA_GPIO_SD4_CD TEGRA_GPIO_PH2
26#define TEGRA_GPIO_SD4_WP TEGRA_GPIO_PH3
27#define TEGRA_GPIO_SD4_POWER TEGRA_GPIO_PI6
28#define TEGRA_GPIO_CDC_IRQ TEGRA_GPIO_PX3
29#define TEGRA_GPIO_SPKR_EN HARMONY_GPIO_WM8903(2)
30#define TEGRA_GPIO_HP_DET TEGRA_GPIO_PW2
31#define TEGRA_GPIO_INT_MIC_EN TEGRA_GPIO_PX0
32#define TEGRA_GPIO_EXT_MIC_EN TEGRA_GPIO_PX1
33
20void harmony_pinmux_init(void); 34void harmony_pinmux_init(void);
35int harmony_regulator_init(void);
21 36
22#endif 37#endif
diff --git a/arch/arm/mach-tegra/board-paz00-pinmux.c b/arch/arm/mach-tegra/board-paz00-pinmux.c
new file mode 100644
index 000000000000..2643d1bd568b
--- /dev/null
+++ b/arch/arm/mach-tegra/board-paz00-pinmux.c
@@ -0,0 +1,157 @@
1/*
2 * arch/arm/mach-tegra/board-paz00-pinmux.c
3 *
4 * Copyright (C) 2010 Marc Dietrich <marvin24@gmx.de>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/kernel.h>
18#include <linux/gpio.h>
19#include <mach/pinmux.h>
20
21#include "gpio-names.h"
22#include "board-paz00.h"
23
24static struct tegra_pingroup_config paz00_pinmux[] = {
25 {TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
26 {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
27 {TEGRA_PINGROUP_ATC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
28 {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
29 {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
30 {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
31 {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
32 {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
33 {TEGRA_PINGROUP_CSUS, TEGRA_MUX_PLLC_OUT1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
34 {TEGRA_PINGROUP_DAP1, TEGRA_MUX_DAP1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
35 {TEGRA_PINGROUP_DAP2, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
36 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
37 {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
38 {TEGRA_PINGROUP_DDC, TEGRA_MUX_I2C2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
39 {TEGRA_PINGROUP_DTA, TEGRA_MUX_RSVD1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
40 {TEGRA_PINGROUP_DTB, TEGRA_MUX_RSVD1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
41 {TEGRA_PINGROUP_DTC, TEGRA_MUX_RSVD1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
42 {TEGRA_PINGROUP_DTD, TEGRA_MUX_RSVD1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
43 {TEGRA_PINGROUP_DTE, TEGRA_MUX_RSVD1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
44 {TEGRA_PINGROUP_DTF, TEGRA_MUX_I2C3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
45 {TEGRA_PINGROUP_GMA, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
46 {TEGRA_PINGROUP_GMB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
47 {TEGRA_PINGROUP_GMC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
48 {TEGRA_PINGROUP_GMD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
49 {TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
50 {TEGRA_PINGROUP_GPU, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
51 {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
52 {TEGRA_PINGROUP_GPV, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
53 {TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
54 {TEGRA_PINGROUP_I2CP, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
55 {TEGRA_PINGROUP_IRRX, TEGRA_MUX_UARTA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
56 {TEGRA_PINGROUP_IRTX, TEGRA_MUX_UARTA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
57 {TEGRA_PINGROUP_KBCA, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
58 {TEGRA_PINGROUP_KBCB, TEGRA_MUX_SDIO2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
59 {TEGRA_PINGROUP_KBCC, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
60 {TEGRA_PINGROUP_KBCD, TEGRA_MUX_SDIO2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
61 {TEGRA_PINGROUP_KBCE, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
62 {TEGRA_PINGROUP_KBCF, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
63 {TEGRA_PINGROUP_LCSN, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
64 {TEGRA_PINGROUP_LD0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
65 {TEGRA_PINGROUP_LD1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
66 {TEGRA_PINGROUP_LD10, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
67 {TEGRA_PINGROUP_LD11, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
68 {TEGRA_PINGROUP_LD12, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
69 {TEGRA_PINGROUP_LD13, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
70 {TEGRA_PINGROUP_LD14, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
71 {TEGRA_PINGROUP_LD15, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
72 {TEGRA_PINGROUP_LD16, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
73 {TEGRA_PINGROUP_LD17, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
74 {TEGRA_PINGROUP_LD2, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
75 {TEGRA_PINGROUP_LD3, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
76 {TEGRA_PINGROUP_LD4, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
77 {TEGRA_PINGROUP_LD5, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
78 {TEGRA_PINGROUP_LD6, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
79 {TEGRA_PINGROUP_LD7, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
80 {TEGRA_PINGROUP_LD8, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
81 {TEGRA_PINGROUP_LD9, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
82 {TEGRA_PINGROUP_LDC, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
83 {TEGRA_PINGROUP_LDI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
84 {TEGRA_PINGROUP_LHP0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
85 {TEGRA_PINGROUP_LHP1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
86 {TEGRA_PINGROUP_LHP2, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
87 {TEGRA_PINGROUP_LHS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
88 {TEGRA_PINGROUP_LM0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
89 {TEGRA_PINGROUP_LM1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
90 {TEGRA_PINGROUP_LPP, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
91 {TEGRA_PINGROUP_LPW0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
92 {TEGRA_PINGROUP_LPW1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
93 {TEGRA_PINGROUP_LPW2, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
94 {TEGRA_PINGROUP_LSC0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
95 {TEGRA_PINGROUP_LSC1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
96 {TEGRA_PINGROUP_LSCK, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
97 {TEGRA_PINGROUP_LSDA, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
98 {TEGRA_PINGROUP_LSDI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
99 {TEGRA_PINGROUP_LSPI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
100 {TEGRA_PINGROUP_LVP0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
101 {TEGRA_PINGROUP_LVP1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
102 {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
103 {TEGRA_PINGROUP_OWC, TEGRA_MUX_OWR, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
104 {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
105 {TEGRA_PINGROUP_PTA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
106 {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
107 {TEGRA_PINGROUP_SDB, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
108 {TEGRA_PINGROUP_SDC, TEGRA_MUX_TWC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
109 {TEGRA_PINGROUP_SDD, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
110 {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
111 {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
112 {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPI4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
113 {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPI4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
114 {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
115 {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
116 {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
117 {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
118 {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
119 {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
120 {TEGRA_PINGROUP_SPID, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
121 {TEGRA_PINGROUP_SPIE, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
122 {TEGRA_PINGROUP_SPIF, TEGRA_MUX_RSVD4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
123 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
124 {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
125 {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
126 {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
127 {TEGRA_PINGROUP_UAC, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
128 {TEGRA_PINGROUP_UAD, TEGRA_MUX_SPDIF, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
129 {TEGRA_PINGROUP_UCA, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
130 {TEGRA_PINGROUP_UCB, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
131 {TEGRA_PINGROUP_UDA, TEGRA_MUX_ULPI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
132 {TEGRA_PINGROUP_CK32, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
133 {TEGRA_PINGROUP_DDRC, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
134 {TEGRA_PINGROUP_PMCA, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
135 {TEGRA_PINGROUP_PMCB, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
136 {TEGRA_PINGROUP_PMCC, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
137 {TEGRA_PINGROUP_PMCD, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
138 {TEGRA_PINGROUP_PMCE, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
139 {TEGRA_PINGROUP_XM2C, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
140 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
141};
142
143static struct tegra_gpio_table gpio_table[] = {
144 { .gpio = TEGRA_GPIO_SD1_CD, .enable = true },
145 { .gpio = TEGRA_GPIO_SD1_WP, .enable = true },
146 { .gpio = TEGRA_GPIO_SD1_POWER, .enable = true },
147 { .gpio = TEGRA_GPIO_SD4_CD, .enable = true },
148 { .gpio = TEGRA_GPIO_SD4_WP, .enable = true },
149 { .gpio = TEGRA_GPIO_SD4_POWER, .enable = true },
150};
151
152void paz00_pinmux_init(void)
153{
154 tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux));
155
156 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
157}
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
new file mode 100644
index 000000000000..57e50a823eec
--- /dev/null
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -0,0 +1,128 @@
1/*
2 * arch/arm/mach-tegra/board-paz00.c
3 *
4 * Copyright (C) 2011 Marc Dietrich <marvin24@gmx.de>
5 *
6 * Based on board-harmony.c
7 * Copyright (C) 2010 Google, Inc.
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/platform_device.h>
23#include <linux/serial_8250.h>
24#include <linux/clk.h>
25#include <linux/dma-mapping.h>
26#include <linux/pda_power.h>
27#include <linux/io.h>
28
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31#include <asm/mach/time.h>
32#include <asm/setup.h>
33
34#include <mach/iomap.h>
35#include <mach/irqs.h>
36#include <mach/sdhci.h>
37
38#include "board.h"
39#include "board-paz00.h"
40#include "clock.h"
41#include "devices.h"
42#include "gpio-names.h"
43
44static struct plat_serial8250_port debug_uart_platform_data[] = {
45 {
46 .membase = IO_ADDRESS(TEGRA_UARTD_BASE),
47 .mapbase = TEGRA_UARTD_BASE,
48 .irq = INT_UARTD,
49 .flags = UPF_BOOT_AUTOCONF,
50 .iotype = UPIO_MEM,
51 .regshift = 2,
52 .uartclk = 216000000,
53 }, {
54 .flags = 0
55 }
56};
57
58static struct platform_device debug_uart = {
59 .name = "serial8250",
60 .id = PLAT8250_DEV_PLATFORM,
61 .dev = {
62 .platform_data = debug_uart_platform_data,
63 },
64};
65
66static struct platform_device *paz00_devices[] __initdata = {
67 &debug_uart,
68 &tegra_sdhci_device1,
69 &tegra_sdhci_device2,
70 &tegra_sdhci_device4,
71};
72
73static void __init tegra_paz00_fixup(struct machine_desc *desc,
74 struct tag *tags, char **cmdline, struct meminfo *mi)
75{
76 mi->nr_banks = 1;
77 mi->bank[0].start = PHYS_OFFSET;
78 mi->bank[0].size = 448 * SZ_1M;
79}
80
81static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {
82 /* name parent rate enabled */
83 { "uartd", "pll_p", 216000000, true },
84 { NULL, NULL, 0, 0},
85};
86
87
88static struct tegra_sdhci_platform_data sdhci_pdata1 = {
89 .cd_gpio = TEGRA_GPIO_SD1_CD,
90 .wp_gpio = TEGRA_GPIO_SD1_WP,
91 .power_gpio = TEGRA_GPIO_SD1_POWER,
92};
93
94static struct tegra_sdhci_platform_data sdhci_pdata2 = {
95 .cd_gpio = -1,
96 .wp_gpio = -1,
97 .power_gpio = -1,
98};
99
100static struct tegra_sdhci_platform_data sdhci_pdata4 = {
101 .cd_gpio = TEGRA_GPIO_SD4_CD,
102 .wp_gpio = TEGRA_GPIO_SD4_WP,
103 .power_gpio = TEGRA_GPIO_SD4_POWER,
104 .is_8bit = 1,
105};
106
107static void __init tegra_paz00_init(void)
108{
109 tegra_clk_init_from_table(paz00_clk_init_table);
110
111 paz00_pinmux_init();
112
113 tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
114 tegra_sdhci_device2.dev.platform_data = &sdhci_pdata2;
115 tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
116
117 platform_add_devices(paz00_devices, ARRAY_SIZE(paz00_devices));
118}
119
120MACHINE_START(PAZ00, "paz00")
121 .boot_params = 0x00000100,
122 .fixup = tegra_paz00_fixup,
123 .map_io = tegra_map_common_io,
124 .init_early = tegra_init_early,
125 .init_irq = tegra_init_irq,
126 .timer = &tegra_timer,
127 .init_machine = tegra_paz00_init,
128MACHINE_END
diff --git a/arch/arm/mach-tegra/board-paz00.h b/arch/arm/mach-tegra/board-paz00.h
new file mode 100644
index 000000000000..da193ca76d3b
--- /dev/null
+++ b/arch/arm/mach-tegra/board-paz00.h
@@ -0,0 +1,29 @@
1/*
2 * arch/arm/mach-tegra/board-paz00.h
3 *
4 * Copyright (C) 2010 Marc Dietrich <marvin24@gmx.de>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#ifndef _MACH_TEGRA_BOARD_PAZ00_H
18#define _MACH_TEGRA_BOARD_PAZ00_H
19
20#define TEGRA_GPIO_SD1_CD TEGRA_GPIO_PV5
21#define TEGRA_GPIO_SD1_WP TEGRA_GPIO_PH1
22#define TEGRA_GPIO_SD1_POWER TEGRA_GPIO_PT3
23#define TEGRA_GPIO_SD4_CD TEGRA_GPIO_PH2
24#define TEGRA_GPIO_SD4_WP TEGRA_GPIO_PH3
25#define TEGRA_GPIO_SD4_POWER TEGRA_GPIO_PI6
26
27void paz00_pinmux_init(void);
28
29#endif
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
index 2d6ad83ed4b2..0bda495e9742 100644
--- a/arch/arm/mach-tegra/board-seaboard-pinmux.c
+++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c
@@ -161,11 +161,12 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
161 161
162 162
163static struct tegra_gpio_table gpio_table[] = { 163static struct tegra_gpio_table gpio_table[] = {
164 { .gpio = TEGRA_GPIO_PI5, .enable = true }, /* mmc2 cd */ 164 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
165 { .gpio = TEGRA_GPIO_PH1, .enable = true }, /* mmc2 wp */ 165 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true },
166 { .gpio = TEGRA_GPIO_PI6, .enable = true }, /* mmc2 pwr */ 166 { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true },
167 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true }, /* lid switch */ 167 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true },
168 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true }, /* power key */ 168 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true },
169 { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true },
169}; 170};
170 171
171void __init seaboard_pinmux_init(void) 172void __init seaboard_pinmux_init(void)
diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c
index 6ca9e61f6cd0..a8d7ace9f958 100644
--- a/arch/arm/mach-tegra/board-seaboard.c
+++ b/arch/arm/mach-tegra/board-seaboard.c
@@ -18,9 +18,12 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/serial_8250.h> 20#include <linux/serial_8250.h>
21#include <linux/i2c.h>
22#include <linux/i2c-tegra.h>
21#include <linux/delay.h> 23#include <linux/delay.h>
22#include <linux/input.h> 24#include <linux/input.h>
23#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/gpio.h>
24#include <linux/gpio_keys.h> 27#include <linux/gpio_keys.h>
25 28
26#include <mach/iomap.h> 29#include <mach/iomap.h>
@@ -63,6 +66,22 @@ static __initdata struct tegra_clk_init_table seaboard_clk_init_table[] = {
63 { NULL, NULL, 0, 0}, 66 { NULL, NULL, 0, 0},
64}; 67};
65 68
69static struct tegra_i2c_platform_data seaboard_i2c1_platform_data = {
70 .bus_clk_rate = 400000.
71};
72
73static struct tegra_i2c_platform_data seaboard_i2c2_platform_data = {
74 .bus_clk_rate = 400000,
75};
76
77static struct tegra_i2c_platform_data seaboard_i2c3_platform_data = {
78 .bus_clk_rate = 400000,
79};
80
81static struct tegra_i2c_platform_data seaboard_dvc_platform_data = {
82 .bus_clk_rate = 400000,
83};
84
66static struct gpio_keys_button seaboard_gpio_keys_buttons[] = { 85static struct gpio_keys_button seaboard_gpio_keys_buttons[] = {
67 { 86 {
68 .code = SW_LID, 87 .code = SW_LID,
@@ -103,9 +122,9 @@ static struct tegra_sdhci_platform_data sdhci_pdata1 = {
103}; 122};
104 123
105static struct tegra_sdhci_platform_data sdhci_pdata3 = { 124static struct tegra_sdhci_platform_data sdhci_pdata3 = {
106 .cd_gpio = TEGRA_GPIO_PI5, 125 .cd_gpio = TEGRA_GPIO_SD2_CD,
107 .wp_gpio = TEGRA_GPIO_PH1, 126 .wp_gpio = TEGRA_GPIO_SD2_WP,
108 .power_gpio = TEGRA_GPIO_PI6, 127 .power_gpio = TEGRA_GPIO_SD2_POWER,
109}; 128};
110 129
111static struct tegra_sdhci_platform_data sdhci_pdata4 = { 130static struct tegra_sdhci_platform_data sdhci_pdata4 = {
@@ -124,7 +143,36 @@ static struct platform_device *seaboard_devices[] __initdata = {
124 &seaboard_gpio_keys_device, 143 &seaboard_gpio_keys_device,
125}; 144};
126 145
127static void __init __tegra_seaboard_init(void) 146static struct i2c_board_info __initdata isl29018_device = {
147 I2C_BOARD_INFO("isl29018", 0x44),
148 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_ISL29018_IRQ),
149};
150
151static struct i2c_board_info __initdata adt7461_device = {
152 I2C_BOARD_INFO("adt7461", 0x4c),
153};
154
155static void __init seaboard_i2c_init(void)
156{
157 gpio_request(TEGRA_GPIO_ISL29018_IRQ, "isl29018");
158 gpio_direction_input(TEGRA_GPIO_ISL29018_IRQ);
159
160 i2c_register_board_info(0, &isl29018_device, 1);
161
162 i2c_register_board_info(4, &adt7461_device, 1);
163
164 tegra_i2c_device1.dev.platform_data = &seaboard_i2c1_platform_data;
165 tegra_i2c_device2.dev.platform_data = &seaboard_i2c2_platform_data;
166 tegra_i2c_device3.dev.platform_data = &seaboard_i2c3_platform_data;
167 tegra_i2c_device4.dev.platform_data = &seaboard_dvc_platform_data;
168
169 platform_device_register(&tegra_i2c_device1);
170 platform_device_register(&tegra_i2c_device2);
171 platform_device_register(&tegra_i2c_device3);
172 platform_device_register(&tegra_i2c_device4);
173}
174
175static void __init seaboard_common_init(void)
128{ 176{
129 seaboard_pinmux_init(); 177 seaboard_pinmux_init();
130 178
@@ -144,7 +192,9 @@ static void __init tegra_seaboard_init(void)
144 debug_uart_platform_data[0].mapbase = TEGRA_UARTD_BASE; 192 debug_uart_platform_data[0].mapbase = TEGRA_UARTD_BASE;
145 debug_uart_platform_data[0].irq = INT_UARTD; 193 debug_uart_platform_data[0].irq = INT_UARTD;
146 194
147 __tegra_seaboard_init(); 195 seaboard_common_init();
196
197 seaboard_i2c_init();
148} 198}
149 199
150static void __init tegra_kaen_init(void) 200static void __init tegra_kaen_init(void)
@@ -154,7 +204,9 @@ static void __init tegra_kaen_init(void)
154 debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE; 204 debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
155 debug_uart_platform_data[0].irq = INT_UARTB; 205 debug_uart_platform_data[0].irq = INT_UARTB;
156 206
157 __tegra_seaboard_init(); 207 seaboard_common_init();
208
209 seaboard_i2c_init();
158} 210}
159 211
160static void __init tegra_wario_init(void) 212static void __init tegra_wario_init(void)
@@ -164,7 +216,9 @@ static void __init tegra_wario_init(void)
164 debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE; 216 debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
165 debug_uart_platform_data[0].irq = INT_UARTB; 217 debug_uart_platform_data[0].irq = INT_UARTB;
166 218
167 __tegra_seaboard_init(); 219 seaboard_common_init();
220
221 seaboard_i2c_init();
168} 222}
169 223
170 224
diff --git a/arch/arm/mach-tegra/board-seaboard.h b/arch/arm/mach-tegra/board-seaboard.h
index a098e3599731..d8415e1a8434 100644
--- a/arch/arm/mach-tegra/board-seaboard.h
+++ b/arch/arm/mach-tegra/board-seaboard.h
@@ -17,6 +17,9 @@
17#ifndef _MACH_TEGRA_BOARD_SEABOARD_H 17#ifndef _MACH_TEGRA_BOARD_SEABOARD_H
18#define _MACH_TEGRA_BOARD_SEABOARD_H 18#define _MACH_TEGRA_BOARD_SEABOARD_H
19 19
20#define TEGRA_GPIO_SD2_CD TEGRA_GPIO_PI5
21#define TEGRA_GPIO_SD2_WP TEGRA_GPIO_PH1
22#define TEGRA_GPIO_SD2_POWER TEGRA_GPIO_PI6
20#define TEGRA_GPIO_LIDSWITCH TEGRA_GPIO_PC7 23#define TEGRA_GPIO_LIDSWITCH TEGRA_GPIO_PC7
21#define TEGRA_GPIO_USB1 TEGRA_GPIO_PD0 24#define TEGRA_GPIO_USB1 TEGRA_GPIO_PD0
22#define TEGRA_GPIO_POWERKEY TEGRA_GPIO_PV2 25#define TEGRA_GPIO_POWERKEY TEGRA_GPIO_PV2
diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c
index 6d4fc9f7f1fb..13534fa08abf 100644
--- a/arch/arm/mach-tegra/board-trimslice-pinmux.c
+++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c
@@ -16,8 +16,11 @@
16 16
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/init.h> 18#include <linux/init.h>
19
19#include <mach/pinmux.h> 20#include <mach/pinmux.h>
21#include <mach/gpio.h>
20 22
23#include "gpio-names.h"
21#include "board-trimslice.h" 24#include "board-trimslice.h"
22 25
23static __initdata struct tegra_pingroup_config trimslice_pinmux[] = { 26static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
@@ -139,7 +142,13 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
139 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 142 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
140}; 143};
141 144
145static struct tegra_gpio_table gpio_table[] = {
146 { .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */
147 { .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */
148};
149
142void __init trimslice_pinmux_init(void) 150void __init trimslice_pinmux_init(void)
143{ 151{
144 tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux)); 152 tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
153 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
145} 154}
diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c
index 7be7d4acd02f..cda4cfd78e84 100644
--- a/arch/arm/mach-tegra/board-trimslice.c
+++ b/arch/arm/mach-tegra/board-trimslice.c
@@ -29,9 +29,12 @@
29#include <asm/setup.h> 29#include <asm/setup.h>
30 30
31#include <mach/iomap.h> 31#include <mach/iomap.h>
32#include <mach/sdhci.h>
32 33
33#include "board.h" 34#include "board.h"
34#include "clock.h" 35#include "clock.h"
36#include "devices.h"
37#include "gpio-names.h"
35 38
36#include "board-trimslice.h" 39#include "board-trimslice.h"
37 40
@@ -56,9 +59,22 @@ static struct platform_device debug_uart = {
56 .platform_data = debug_uart_platform_data, 59 .platform_data = debug_uart_platform_data,
57 }, 60 },
58}; 61};
62static struct tegra_sdhci_platform_data sdhci_pdata1 = {
63 .cd_gpio = -1,
64 .wp_gpio = -1,
65 .power_gpio = -1,
66};
67
68static struct tegra_sdhci_platform_data sdhci_pdata4 = {
69 .cd_gpio = TRIMSLICE_GPIO_SD4_CD,
70 .wp_gpio = TRIMSLICE_GPIO_SD4_WP,
71 .power_gpio = -1,
72};
59 73
60static struct platform_device *trimslice_devices[] __initdata = { 74static struct platform_device *trimslice_devices[] __initdata = {
61 &debug_uart, 75 &debug_uart,
76 &tegra_sdhci_device1,
77 &tegra_sdhci_device4,
62}; 78};
63 79
64static void __init tegra_trimslice_fixup(struct machine_desc *desc, 80static void __init tegra_trimslice_fixup(struct machine_desc *desc,
@@ -92,6 +108,9 @@ static void __init tegra_trimslice_init(void)
92 108
93 trimslice_pinmux_init(); 109 trimslice_pinmux_init();
94 110
111 tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
112 tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
113
95 platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices)); 114 platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices));
96} 115}
97 116
diff --git a/arch/arm/mach-tegra/board-trimslice.h b/arch/arm/mach-tegra/board-trimslice.h
index 16ec0f0d3bb1..e8ef6291c6f1 100644
--- a/arch/arm/mach-tegra/board-trimslice.h
+++ b/arch/arm/mach-tegra/board-trimslice.h
@@ -17,6 +17,9 @@
17#ifndef _MACH_TEGRA_BOARD_TRIMSLICE_H 17#ifndef _MACH_TEGRA_BOARD_TRIMSLICE_H
18#define _MACH_TEGRA_BOARD_TRIMSLICE_H 18#define _MACH_TEGRA_BOARD_TRIMSLICE_H
19 19
20#define TRIMSLICE_GPIO_SD4_CD TEGRA_GPIO_PP1 /* mmc4 cd */
21#define TRIMSLICE_GPIO_SD4_WP TEGRA_GPIO_PP2 /* mmc4 wp */
22
20void trimslice_pinmux_init(void); 23void trimslice_pinmux_init(void);
21 24
22#endif 25#endif
diff --git a/arch/arm/mach-tegra/devices.c b/arch/arm/mach-tegra/devices.c
index 682e6d33108c..1528f9daef1f 100644
--- a/arch/arm/mach-tegra/devices.c
+++ b/arch/arm/mach-tegra/devices.c
@@ -503,3 +503,73 @@ struct platform_device tegra_uarte_device = {
503 .coherent_dma_mask = DMA_BIT_MASK(32), 503 .coherent_dma_mask = DMA_BIT_MASK(32),
504 }, 504 },
505}; 505};
506
507static struct resource i2s_resource1[] = {
508 [0] = {
509 .start = INT_I2S1,
510 .end = INT_I2S1,
511 .flags = IORESOURCE_IRQ
512 },
513 [1] = {
514 .start = TEGRA_DMA_REQ_SEL_I2S_1,
515 .end = TEGRA_DMA_REQ_SEL_I2S_1,
516 .flags = IORESOURCE_DMA
517 },
518 [2] = {
519 .start = TEGRA_I2S1_BASE,
520 .end = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
521 .flags = IORESOURCE_MEM
522 }
523};
524
525static struct resource i2s_resource2[] = {
526 [0] = {
527 .start = INT_I2S2,
528 .end = INT_I2S2,
529 .flags = IORESOURCE_IRQ
530 },
531 [1] = {
532 .start = TEGRA_DMA_REQ_SEL_I2S2_1,
533 .end = TEGRA_DMA_REQ_SEL_I2S2_1,
534 .flags = IORESOURCE_DMA
535 },
536 [2] = {
537 .start = TEGRA_I2S2_BASE,
538 .end = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
539 .flags = IORESOURCE_MEM
540 }
541};
542
543struct platform_device tegra_i2s_device1 = {
544 .name = "tegra-i2s",
545 .id = 0,
546 .resource = i2s_resource1,
547 .num_resources = ARRAY_SIZE(i2s_resource1),
548};
549
550struct platform_device tegra_i2s_device2 = {
551 .name = "tegra-i2s",
552 .id = 1,
553 .resource = i2s_resource2,
554 .num_resources = ARRAY_SIZE(i2s_resource2),
555};
556
557static struct resource tegra_das_resources[] = {
558 [0] = {
559 .start = TEGRA_APB_MISC_DAS_BASE,
560 .end = TEGRA_APB_MISC_DAS_BASE + TEGRA_APB_MISC_DAS_SIZE - 1,
561 .flags = IORESOURCE_MEM,
562 },
563};
564
565struct platform_device tegra_das_device = {
566 .name = "tegra-das",
567 .id = -1,
568 .num_resources = ARRAY_SIZE(tegra_das_resources),
569 .resource = tegra_das_resources,
570};
571
572struct platform_device tegra_pcm_device = {
573 .name = "tegra-pcm-audio",
574 .id = -1,
575};
diff --git a/arch/arm/mach-tegra/devices.h b/arch/arm/mach-tegra/devices.h
index 888810c37ee9..4a7dc0a097d6 100644
--- a/arch/arm/mach-tegra/devices.h
+++ b/arch/arm/mach-tegra/devices.h
@@ -42,5 +42,9 @@ extern struct platform_device tegra_uartc_device;
42extern struct platform_device tegra_uartd_device; 42extern struct platform_device tegra_uartd_device;
43extern struct platform_device tegra_uarte_device; 43extern struct platform_device tegra_uarte_device;
44extern struct platform_device tegra_pmu_device; 44extern struct platform_device tegra_pmu_device;
45extern struct platform_device tegra_i2s_device1;
46extern struct platform_device tegra_i2s_device2;
47extern struct platform_device tegra_das_device;
48extern struct platform_device tegra_pcm_device;
45 49
46#endif 50#endif
diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h
index 691cdabd69cf..19dec3ac0854 100644
--- a/arch/arm/mach-tegra/include/mach/iomap.h
+++ b/arch/arm/mach-tegra/include/mach/iomap.h
@@ -122,6 +122,9 @@
122#define TEGRA_APB_MISC_BASE 0x70000000 122#define TEGRA_APB_MISC_BASE 0x70000000
123#define TEGRA_APB_MISC_SIZE SZ_4K 123#define TEGRA_APB_MISC_SIZE SZ_4K
124 124
125#define TEGRA_APB_MISC_DAS_BASE 0x70000c00
126#define TEGRA_APB_MISC_DAS_SIZE SZ_128
127
125#define TEGRA_AC97_BASE 0x70002000 128#define TEGRA_AC97_BASE 0x70002000
126#define TEGRA_AC97_SIZE SZ_512 129#define TEGRA_AC97_SIZE SZ_512
127 130
diff --git a/arch/arm/mach-tegra/localtimer.c b/arch/arm/mach-tegra/localtimer.c
index f81ca7cbbc1f..e91d681d45a2 100644
--- a/arch/arm/mach-tegra/localtimer.c
+++ b/arch/arm/mach-tegra/localtimer.c
@@ -18,8 +18,9 @@
18/* 18/*
19 * Setup the local clock events for a CPU. 19 * Setup the local clock events for a CPU.
20 */ 20 */
21void __cpuinit local_timer_setup(struct clock_event_device *evt) 21int __cpuinit local_timer_setup(struct clock_event_device *evt)
22{ 22{
23 evt->irq = IRQ_LOCALTIMER; 23 evt->irq = IRQ_LOCALTIMER;
24 twd_timer_setup(evt); 24 twd_timer_setup(evt);
25 return 0;
25} 26}
diff --git a/arch/arm/mach-ux500/localtimer.c b/arch/arm/mach-ux500/localtimer.c
index 2288f6a7c518..5ba113309a0b 100644
--- a/arch/arm/mach-ux500/localtimer.c
+++ b/arch/arm/mach-ux500/localtimer.c
@@ -21,8 +21,9 @@
21/* 21/*
22 * Setup the local clock events for a CPU. 22 * Setup the local clock events for a CPU.
23 */ 23 */
24void __cpuinit local_timer_setup(struct clock_event_device *evt) 24int __cpuinit local_timer_setup(struct clock_event_device *evt)
25{ 25{
26 evt->irq = IRQ_LOCALTIMER; 26 evt->irq = IRQ_LOCALTIMER;
27 twd_timer_setup(evt); 27 twd_timer_setup(evt);
28 return 0;
28} 29}
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 136c32e7ed8e..eb7ffa0ee8b5 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -50,6 +50,8 @@
50#include <mach/platform.h> 50#include <mach/platform.h>
51#include <asm/hardware/timer-sp.h> 51#include <asm/hardware/timer-sp.h>
52 52
53#include <plat/clcd.h>
54#include <plat/fpga-irq.h>
53#include <plat/sched_clock.h> 55#include <plat/sched_clock.h>
54 56
55#include "core.h" 57#include "core.h"
@@ -63,47 +65,12 @@
63#define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE) 65#define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE)
64#define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE) 66#define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE)
65 67
66static void sic_mask_irq(struct irq_data *d) 68static struct fpga_irq_data sic_irq = {
67{ 69 .base = VA_SIC_BASE,
68 unsigned int irq = d->irq - IRQ_SIC_START; 70 .irq_start = IRQ_SIC_START,
69 71 .chip.name = "SIC",
70 writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
71}
72
73static void sic_unmask_irq(struct irq_data *d)
74{
75 unsigned int irq = d->irq - IRQ_SIC_START;
76
77 writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_SET);
78}
79
80static struct irq_chip sic_chip = {
81 .name = "SIC",
82 .irq_ack = sic_mask_irq,
83 .irq_mask = sic_mask_irq,
84 .irq_unmask = sic_unmask_irq,
85}; 72};
86 73
87static void
88sic_handle_irq(unsigned int irq, struct irq_desc *desc)
89{
90 unsigned long status = readl(VA_SIC_BASE + SIC_IRQ_STATUS);
91
92 if (status == 0) {
93 do_bad_IRQ(irq, desc);
94 return;
95 }
96
97 do {
98 irq = ffs(status) - 1;
99 status &= ~(1 << irq);
100
101 irq += IRQ_SIC_START;
102
103 generic_handle_irq(irq);
104 } while (status);
105}
106
107#if 1 74#if 1
108#define IRQ_MMCI0A IRQ_VICSOURCE22 75#define IRQ_MMCI0A IRQ_VICSOURCE22
109#define IRQ_AACI IRQ_VICSOURCE24 76#define IRQ_AACI IRQ_VICSOURCE24
@@ -118,22 +85,11 @@ sic_handle_irq(unsigned int irq, struct irq_desc *desc)
118 85
119void __init versatile_init_irq(void) 86void __init versatile_init_irq(void)
120{ 87{
121 unsigned int i;
122
123 vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0); 88 vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0);
124 89
125 set_irq_chained_handler(IRQ_VICSOURCE31, sic_handle_irq);
126
127 /* Do second interrupt controller */
128 writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); 90 writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
129 91
130 for (i = IRQ_SIC_START; i <= IRQ_SIC_END; i++) { 92 fpga_irq_init(IRQ_VICSOURCE31, ~PIC_MASK, &sic_irq);
131 if ((PIC_MASK & (1 << (i - IRQ_SIC_START))) == 0) {
132 set_irq_chip(i, &sic_chip);
133 set_irq_handler(i, handle_level_irq);
134 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
135 }
136 }
137 93
138 /* 94 /*
139 * Interrupts on secondary controller from 0 to 8 are routed to 95 * Interrupts on secondary controller from 0 to 8 are routed to
@@ -476,127 +432,7 @@ static struct clk_lookup lookups[] = {
476#define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8) 432#define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
477#define SYS_CLCD_ID_VGA (0x1f << 8) 433#define SYS_CLCD_ID_VGA (0x1f << 8)
478 434
479static struct clcd_panel vga = { 435static bool is_sanyo_2_5_lcd;
480 .mode = {
481 .name = "VGA",
482 .refresh = 60,
483 .xres = 640,
484 .yres = 480,
485 .pixclock = 39721,
486 .left_margin = 40,
487 .right_margin = 24,
488 .upper_margin = 32,
489 .lower_margin = 11,
490 .hsync_len = 96,
491 .vsync_len = 2,
492 .sync = 0,
493 .vmode = FB_VMODE_NONINTERLACED,
494 },
495 .width = -1,
496 .height = -1,
497 .tim2 = TIM2_BCD | TIM2_IPC,
498 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
499 .bpp = 16,
500};
501
502static struct clcd_panel sanyo_3_8_in = {
503 .mode = {
504 .name = "Sanyo QVGA",
505 .refresh = 116,
506 .xres = 320,
507 .yres = 240,
508 .pixclock = 100000,
509 .left_margin = 6,
510 .right_margin = 6,
511 .upper_margin = 5,
512 .lower_margin = 5,
513 .hsync_len = 6,
514 .vsync_len = 6,
515 .sync = 0,
516 .vmode = FB_VMODE_NONINTERLACED,
517 },
518 .width = -1,
519 .height = -1,
520 .tim2 = TIM2_BCD,
521 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
522 .bpp = 16,
523};
524
525static struct clcd_panel sanyo_2_5_in = {
526 .mode = {
527 .name = "Sanyo QVGA Portrait",
528 .refresh = 116,
529 .xres = 240,
530 .yres = 320,
531 .pixclock = 100000,
532 .left_margin = 20,
533 .right_margin = 10,
534 .upper_margin = 2,
535 .lower_margin = 2,
536 .hsync_len = 10,
537 .vsync_len = 2,
538 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
539 .vmode = FB_VMODE_NONINTERLACED,
540 },
541 .width = -1,
542 .height = -1,
543 .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC,
544 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
545 .bpp = 16,
546};
547
548static struct clcd_panel epson_2_2_in = {
549 .mode = {
550 .name = "Epson QCIF",
551 .refresh = 390,
552 .xres = 176,
553 .yres = 220,
554 .pixclock = 62500,
555 .left_margin = 3,
556 .right_margin = 2,
557 .upper_margin = 1,
558 .lower_margin = 0,
559 .hsync_len = 3,
560 .vsync_len = 2,
561 .sync = 0,
562 .vmode = FB_VMODE_NONINTERLACED,
563 },
564 .width = -1,
565 .height = -1,
566 .tim2 = TIM2_BCD | TIM2_IPC,
567 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
568 .bpp = 16,
569};
570
571/*
572 * Detect which LCD panel is connected, and return the appropriate
573 * clcd_panel structure. Note: we do not have any information on
574 * the required timings for the 8.4in panel, so we presently assume
575 * VGA timings.
576 */
577static struct clcd_panel *versatile_clcd_panel(void)
578{
579 void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET;
580 struct clcd_panel *panel = &vga;
581 u32 val;
582
583 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
584 if (val == SYS_CLCD_ID_SANYO_3_8)
585 panel = &sanyo_3_8_in;
586 else if (val == SYS_CLCD_ID_SANYO_2_5)
587 panel = &sanyo_2_5_in;
588 else if (val == SYS_CLCD_ID_EPSON_2_2)
589 panel = &epson_2_2_in;
590 else if (val == SYS_CLCD_ID_VGA)
591 panel = &vga;
592 else {
593 printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
594 val);
595 panel = &vga;
596 }
597
598 return panel;
599}
600 436
601/* 437/*
602 * Disable all display connectors on the interface module. 438 * Disable all display connectors on the interface module.
@@ -614,7 +450,7 @@ static void versatile_clcd_disable(struct clcd_fb *fb)
614 /* 450 /*
615 * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light off 451 * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light off
616 */ 452 */
617 if (machine_is_versatile_ab() && fb->panel == &sanyo_2_5_in) { 453 if (machine_is_versatile_ab() && is_sanyo_2_5_lcd) {
618 void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL); 454 void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL);
619 unsigned long ctrl; 455 unsigned long ctrl;
620 456
@@ -630,18 +466,22 @@ static void versatile_clcd_disable(struct clcd_fb *fb)
630 */ 466 */
631static void versatile_clcd_enable(struct clcd_fb *fb) 467static void versatile_clcd_enable(struct clcd_fb *fb)
632{ 468{
469 struct fb_var_screeninfo *var = &fb->fb.var;
633 void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET; 470 void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET;
634 u32 val; 471 u32 val;
635 472
636 val = readl(sys_clcd); 473 val = readl(sys_clcd);
637 val &= ~SYS_CLCD_MODE_MASK; 474 val &= ~SYS_CLCD_MODE_MASK;
638 475
639 switch (fb->fb.var.green.length) { 476 switch (var->green.length) {
640 case 5: 477 case 5:
641 val |= SYS_CLCD_MODE_5551; 478 val |= SYS_CLCD_MODE_5551;
642 break; 479 break;
643 case 6: 480 case 6:
644 val |= SYS_CLCD_MODE_565_RLSB; 481 if (var->red.offset == 0)
482 val |= SYS_CLCD_MODE_565_RLSB;
483 else
484 val |= SYS_CLCD_MODE_565_BLSB;
645 break; 485 break;
646 case 8: 486 case 8:
647 val |= SYS_CLCD_MODE_888; 487 val |= SYS_CLCD_MODE_888;
@@ -663,7 +503,7 @@ static void versatile_clcd_enable(struct clcd_fb *fb)
663 /* 503 /*
664 * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light on 504 * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light on
665 */ 505 */
666 if (machine_is_versatile_ab() && fb->panel == &sanyo_2_5_in) { 506 if (machine_is_versatile_ab() && is_sanyo_2_5_lcd) {
667 void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL); 507 void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL);
668 unsigned long ctrl; 508 unsigned long ctrl;
669 509
@@ -674,50 +514,62 @@ static void versatile_clcd_enable(struct clcd_fb *fb)
674#endif 514#endif
675} 515}
676 516
677static unsigned long framesize = SZ_1M; 517/*
678 518 * Detect which LCD panel is connected, and return the appropriate
519 * clcd_panel structure. Note: we do not have any information on
520 * the required timings for the 8.4in panel, so we presently assume
521 * VGA timings.
522 */
679static int versatile_clcd_setup(struct clcd_fb *fb) 523static int versatile_clcd_setup(struct clcd_fb *fb)
680{ 524{
681 dma_addr_t dma; 525 void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET;
526 const char *panel_name;
527 u32 val;
682 528
683 fb->panel = versatile_clcd_panel(); 529 is_sanyo_2_5_lcd = false;
684 530
685 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize, 531 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
686 &dma, GFP_KERNEL); 532 if (val == SYS_CLCD_ID_SANYO_3_8)
687 if (!fb->fb.screen_base) { 533 panel_name = "Sanyo TM38QV67A02A";
688 printk(KERN_ERR "CLCD: unable to map framebuffer\n"); 534 else if (val == SYS_CLCD_ID_SANYO_2_5) {
689 return -ENOMEM; 535 panel_name = "Sanyo QVGA Portrait";
536 is_sanyo_2_5_lcd = true;
537 } else if (val == SYS_CLCD_ID_EPSON_2_2)
538 panel_name = "Epson L2F50113T00";
539 else if (val == SYS_CLCD_ID_VGA)
540 panel_name = "VGA";
541 else {
542 printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
543 val);
544 panel_name = "VGA";
690 } 545 }
691 546
692 fb->fb.fix.smem_start = dma; 547 fb->panel = versatile_clcd_get_panel(panel_name);
693 fb->fb.fix.smem_len = framesize; 548 if (!fb->panel)
549 return -EINVAL;
694 550
695 return 0; 551 return versatile_clcd_setup_dma(fb, SZ_1M);
696} 552}
697 553
698static int versatile_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma) 554static void versatile_clcd_decode(struct clcd_fb *fb, struct clcd_regs *regs)
699{ 555{
700 return dma_mmap_writecombine(&fb->dev->dev, vma, 556 clcdfb_decode(fb, regs);
701 fb->fb.screen_base,
702 fb->fb.fix.smem_start,
703 fb->fb.fix.smem_len);
704}
705 557
706static void versatile_clcd_remove(struct clcd_fb *fb) 558 /* Always clear BGR for RGB565: we do the routing externally */
707{ 559 if (fb->fb.var.green.length == 6)
708 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len, 560 regs->cntl &= ~CNTL_BGR;
709 fb->fb.screen_base, fb->fb.fix.smem_start);
710} 561}
711 562
712static struct clcd_board clcd_plat_data = { 563static struct clcd_board clcd_plat_data = {
713 .name = "Versatile", 564 .name = "Versatile",
565 .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888,
714 .check = clcdfb_check, 566 .check = clcdfb_check,
715 .decode = clcdfb_decode, 567 .decode = versatile_clcd_decode,
716 .disable = versatile_clcd_disable, 568 .disable = versatile_clcd_disable,
717 .enable = versatile_clcd_enable, 569 .enable = versatile_clcd_enable,
718 .setup = versatile_clcd_setup, 570 .setup = versatile_clcd_setup,
719 .mmap = versatile_clcd_mmap, 571 .mmap = versatile_clcd_mmap_dma,
720 .remove = versatile_clcd_remove, 572 .remove = versatile_clcd_remove_dma,
721}; 573};
722 574
723static struct pl061_platform_data gpio0_plat_data = { 575static struct pl061_platform_data gpio0_plat_data = {
@@ -737,53 +589,35 @@ static struct pl022_ssp_controller ssp0_plat_data = {
737}; 589};
738 590
739#define AACI_IRQ { IRQ_AACI, NO_IRQ } 591#define AACI_IRQ { IRQ_AACI, NO_IRQ }
740#define AACI_DMA { 0x80, 0x81 }
741#define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } 592#define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B }
742#define MMCI0_DMA { 0x84, 0 }
743#define KMI0_IRQ { IRQ_SIC_KMI0, NO_IRQ } 593#define KMI0_IRQ { IRQ_SIC_KMI0, NO_IRQ }
744#define KMI0_DMA { 0, 0 }
745#define KMI1_IRQ { IRQ_SIC_KMI1, NO_IRQ } 594#define KMI1_IRQ { IRQ_SIC_KMI1, NO_IRQ }
746#define KMI1_DMA { 0, 0 }
747 595
748/* 596/*
749 * These devices are connected directly to the multi-layer AHB switch 597 * These devices are connected directly to the multi-layer AHB switch
750 */ 598 */
751#define SMC_IRQ { NO_IRQ, NO_IRQ } 599#define SMC_IRQ { NO_IRQ, NO_IRQ }
752#define SMC_DMA { 0, 0 }
753#define MPMC_IRQ { NO_IRQ, NO_IRQ } 600#define MPMC_IRQ { NO_IRQ, NO_IRQ }
754#define MPMC_DMA { 0, 0 }
755#define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ } 601#define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ }
756#define CLCD_DMA { 0, 0 }
757#define DMAC_IRQ { IRQ_DMAINT, NO_IRQ } 602#define DMAC_IRQ { IRQ_DMAINT, NO_IRQ }
758#define DMAC_DMA { 0, 0 }
759 603
760/* 604/*
761 * These devices are connected via the core APB bridge 605 * These devices are connected via the core APB bridge
762 */ 606 */
763#define SCTL_IRQ { NO_IRQ, NO_IRQ } 607#define SCTL_IRQ { NO_IRQ, NO_IRQ }
764#define SCTL_DMA { 0, 0 }
765#define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ } 608#define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ }
766#define WATCHDOG_DMA { 0, 0 }
767#define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ } 609#define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ }
768#define GPIO0_DMA { 0, 0 }
769#define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ } 610#define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ }
770#define GPIO1_DMA { 0, 0 }
771#define RTC_IRQ { IRQ_RTCINT, NO_IRQ } 611#define RTC_IRQ { IRQ_RTCINT, NO_IRQ }
772#define RTC_DMA { 0, 0 }
773 612
774/* 613/*
775 * These devices are connected via the DMA APB bridge 614 * These devices are connected via the DMA APB bridge
776 */ 615 */
777#define SCI_IRQ { IRQ_SCIINT, NO_IRQ } 616#define SCI_IRQ { IRQ_SCIINT, NO_IRQ }
778#define SCI_DMA { 7, 6 }
779#define UART0_IRQ { IRQ_UARTINT0, NO_IRQ } 617#define UART0_IRQ { IRQ_UARTINT0, NO_IRQ }
780#define UART0_DMA { 15, 14 }
781#define UART1_IRQ { IRQ_UARTINT1, NO_IRQ } 618#define UART1_IRQ { IRQ_UARTINT1, NO_IRQ }
782#define UART1_DMA { 13, 12 }
783#define UART2_IRQ { IRQ_UARTINT2, NO_IRQ } 619#define UART2_IRQ { IRQ_UARTINT2, NO_IRQ }
784#define UART2_DMA { 11, 10 }
785#define SSP_IRQ { IRQ_SSPINT, NO_IRQ } 620#define SSP_IRQ { IRQ_SSPINT, NO_IRQ }
786#define SSP_DMA { 9, 8 }
787 621
788/* FPGA Primecells */ 622/* FPGA Primecells */
789AMBA_DEVICE(aaci, "fpga:04", AACI, NULL); 623AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
@@ -865,14 +699,21 @@ static void versatile_leds_event(led_event_t ledevt)
865} 699}
866#endif /* CONFIG_LEDS */ 700#endif /* CONFIG_LEDS */
867 701
868void __init versatile_init(void) 702/* Early initializations */
703void __init versatile_init_early(void)
869{ 704{
870 int i; 705 void __iomem *sys = __io_address(VERSATILE_SYS_BASE);
871
872 osc4_clk.vcoreg = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_OSCCLCD_OFFSET;
873 706
707 osc4_clk.vcoreg = sys + VERSATILE_SYS_OSCCLCD_OFFSET;
874 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 708 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
875 709
710 versatile_sched_clock_init(sys + VERSATILE_SYS_24MHz_OFFSET, 24000000);
711}
712
713void __init versatile_init(void)
714{
715 int i;
716
876 platform_device_register(&versatile_flash_device); 717 platform_device_register(&versatile_flash_device);
877 platform_device_register(&versatile_i2c_device); 718 platform_device_register(&versatile_i2c_device);
878 platform_device_register(&smc91x_device); 719 platform_device_register(&smc91x_device);
@@ -889,12 +730,6 @@ void __init versatile_init(void)
889} 730}
890 731
891/* 732/*
892 * The sched_clock counter
893 */
894#define REFCOUNTER (__io_address(VERSATILE_SYS_BASE) + \
895 VERSATILE_SYS_24MHz_OFFSET)
896
897/*
898 * Where is the timer (VA)? 733 * Where is the timer (VA)?
899 */ 734 */
900#define TIMER0_VA_BASE __io_address(VERSATILE_TIMER0_1_BASE) 735#define TIMER0_VA_BASE __io_address(VERSATILE_TIMER0_1_BASE)
@@ -909,8 +744,6 @@ static void __init versatile_timer_init(void)
909{ 744{
910 u32 val; 745 u32 val;
911 746
912 versatile_sched_clock_init(REFCOUNTER, 24000000);
913
914 /* 747 /*
915 * set clock frequency: 748 * set clock frequency:
916 * VERSATILE_REFCLK is 32KHz 749 * VERSATILE_REFCLK is 32KHz
diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h
index 9d39886a8351..fd6404e5d788 100644
--- a/arch/arm/mach-versatile/core.h
+++ b/arch/arm/mach-versatile/core.h
@@ -25,6 +25,7 @@
25#include <linux/amba/bus.h> 25#include <linux/amba/bus.h>
26 26
27extern void __init versatile_init(void); 27extern void __init versatile_init(void);
28extern void __init versatile_init_early(void);
28extern void __init versatile_init_irq(void); 29extern void __init versatile_init_irq(void);
29extern void __init versatile_map_io(void); 30extern void __init versatile_map_io(void);
30extern struct sys_timer versatile_timer; 31extern struct sys_timer versatile_timer;
@@ -44,7 +45,6 @@ static struct amba_device name##_device = { \
44 }, \ 45 }, \
45 .dma_mask = ~0, \ 46 .dma_mask = ~0, \
46 .irq = base##_IRQ, \ 47 .irq = base##_IRQ, \
47 /* .dma = base##_DMA,*/ \
48} 48}
49 49
50#endif 50#endif
diff --git a/arch/arm/mach-versatile/include/mach/hardware.h b/arch/arm/mach-versatile/include/mach/hardware.h
index b5e75bb44965..6911e1f5f156 100644
--- a/arch/arm/mach-versatile/include/mach/hardware.h
+++ b/arch/arm/mach-versatile/include/mach/hardware.h
@@ -39,6 +39,6 @@
39/* macro to get at IO space when running virtually */ 39/* macro to get at IO space when running virtually */
40#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) 40#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
41 41
42#define __io_address(n) __io(IO_ADDRESS(n)) 42#define __io_address(n) ((void __iomem __force *)IO_ADDRESS(n))
43 43
44#endif 44#endif
diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c
index aa9730fb13bf..f8ae64b3eed0 100644
--- a/arch/arm/mach-versatile/versatile_ab.c
+++ b/arch/arm/mach-versatile/versatile_ab.c
@@ -37,6 +37,7 @@ MACHINE_START(VERSATILE_AB, "ARM-Versatile AB")
37 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 37 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
38 .boot_params = 0x00000100, 38 .boot_params = 0x00000100,
39 .map_io = versatile_map_io, 39 .map_io = versatile_map_io,
40 .init_early = versatile_init_early,
40 .init_irq = versatile_init_irq, 41 .init_irq = versatile_init_irq,
41 .timer = &versatile_timer, 42 .timer = &versatile_timer,
42 .init_machine = versatile_init, 43 .init_machine = versatile_init,
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index bf469642a3f8..37c23dfeefb7 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -59,19 +59,14 @@ static struct pl061_platform_data gpio3_plat_data = {
59}; 59};
60 60
61#define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ } 61#define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ }
62#define UART3_DMA { 0x86, 0x87 }
63#define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ } 62#define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ }
64#define SCI1_DMA { 0x88, 0x89 }
65#define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } 63#define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B }
66#define MMCI1_DMA { 0x85, 0 }
67 64
68/* 65/*
69 * These devices are connected via the core APB bridge 66 * These devices are connected via the core APB bridge
70 */ 67 */
71#define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ } 68#define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ }
72#define GPIO2_DMA { 0, 0 }
73#define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ } 69#define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ }
74#define GPIO3_DMA { 0, 0 }
75 70
76/* 71/*
77 * These devices are connected via the DMA APB bridge 72 * These devices are connected via the DMA APB bridge
@@ -110,6 +105,7 @@ MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
110 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 105 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
111 .boot_params = 0x00000100, 106 .boot_params = 0x00000100,
112 .map_io = versatile_map_io, 107 .map_io = versatile_map_io,
108 .init_early = versatile_init_early,
113 .init_irq = versatile_init_irq, 109 .init_irq = versatile_init_irq,
114 .timer = &versatile_timer, 110 .timer = &versatile_timer,
115 .init_machine = versatile_pb_init, 111 .init_machine = versatile_pb_init,
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 3f19b660a165..931148487f0b 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -5,5 +5,8 @@ config ARCH_VEXPRESS_CA9X4
5 bool "Versatile Express Cortex-A9x4 tile" 5 bool "Versatile Express Cortex-A9x4 tile"
6 select CPU_V7 6 select CPU_V7
7 select ARM_GIC 7 select ARM_GIC
8 select ARM_ERRATA_720789
9 select ARM_ERRATA_751472
10 select ARM_ERRATA_753970
8 11
9endmenu 12endmenu
diff --git a/arch/arm/mach-vexpress/Makefile b/arch/arm/mach-vexpress/Makefile
index 2c0ac7de2814..90551b9780ab 100644
--- a/arch/arm/mach-vexpress/Makefile
+++ b/arch/arm/mach-vexpress/Makefile
@@ -4,6 +4,5 @@
4 4
5obj-y := v2m.o 5obj-y := v2m.o
6obj-$(CONFIG_ARCH_VEXPRESS_CA9X4) += ct-ca9x4.o 6obj-$(CONFIG_ARCH_VEXPRESS_CA9X4) += ct-ca9x4.o
7obj-$(CONFIG_SMP) += platsmp.o headsmp.o 7obj-$(CONFIG_SMP) += platsmp.o
8obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 8obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
9obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
diff --git a/arch/arm/mach-vexpress/core.h b/arch/arm/mach-vexpress/core.h
index 362780d868de..f4397159c173 100644
--- a/arch/arm/mach-vexpress/core.h
+++ b/arch/arm/mach-vexpress/core.h
@@ -17,8 +17,3 @@ struct amba_device name##_device = { \
17 .irq = IRQ_##base, \ 17 .irq = IRQ_##base, \
18 /* .dma = DMA_##base,*/ \ 18 /* .dma = DMA_##base,*/ \
19} 19}
20
21struct map_desc;
22
23void v2m_map_io(struct map_desc *tile, size_t num);
24extern struct sys_timer v2m_timer;
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index e9bccc5230c9..ebc22e759325 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -10,19 +10,17 @@
10#include <linux/amba/clcd.h> 10#include <linux/amba/clcd.h>
11#include <linux/clkdev.h> 11#include <linux/clkdev.h>
12 12
13#include <asm/pgtable.h>
14#include <asm/hardware/arm_timer.h> 13#include <asm/hardware/arm_timer.h>
15#include <asm/hardware/cache-l2x0.h> 14#include <asm/hardware/cache-l2x0.h>
16#include <asm/hardware/gic.h> 15#include <asm/hardware/gic.h>
17#include <asm/mach-types.h>
18#include <asm/pmu.h> 16#include <asm/pmu.h>
17#include <asm/smp_scu.h>
19#include <asm/smp_twd.h> 18#include <asm/smp_twd.h>
20 19
21#include <mach/ct-ca9x4.h> 20#include <mach/ct-ca9x4.h>
22 21
23#include <asm/hardware/timer-sp.h> 22#include <asm/hardware/timer-sp.h>
24 23
25#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 24#include <asm/mach/map.h>
27#include <asm/mach/time.h> 25#include <asm/mach/time.h>
28 26
@@ -30,6 +28,8 @@
30 28
31#include <mach/motherboard.h> 29#include <mach/motherboard.h>
32 30
31#include <plat/clcd.h>
32
33#define V2M_PA_CS7 0x10000000 33#define V2M_PA_CS7 0x10000000
34 34
35static struct map_desc ct_ca9x4_io_desc[] __initdata = { 35static struct map_desc ct_ca9x4_io_desc[] __initdata = {
@@ -56,7 +56,7 @@ static void __init ct_ca9x4_map_io(void)
56#ifdef CONFIG_LOCAL_TIMERS 56#ifdef CONFIG_LOCAL_TIMERS
57 twd_base = MMIO_P2V(A9_MPCORE_TWD); 57 twd_base = MMIO_P2V(A9_MPCORE_TWD);
58#endif 58#endif
59 v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc)); 59 iotable_init(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc));
60} 60}
61 61
62static void __init ct_ca9x4_init_irq(void) 62static void __init ct_ca9x4_init_irq(void)
@@ -80,29 +80,6 @@ static struct sys_timer ct_ca9x4_timer = {
80}; 80};
81#endif 81#endif
82 82
83static struct clcd_panel xvga_panel = {
84 .mode = {
85 .name = "XVGA",
86 .refresh = 60,
87 .xres = 1024,
88 .yres = 768,
89 .pixclock = 15384,
90 .left_margin = 168,
91 .right_margin = 8,
92 .upper_margin = 29,
93 .lower_margin = 3,
94 .hsync_len = 144,
95 .vsync_len = 6,
96 .sync = 0,
97 .vmode = FB_VMODE_NONINTERLACED,
98 },
99 .width = -1,
100 .height = -1,
101 .tim2 = TIM2_BCD | TIM2_IPC,
102 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
103 .bpp = 16,
104};
105
106static void ct_ca9x4_clcd_enable(struct clcd_fb *fb) 83static void ct_ca9x4_clcd_enable(struct clcd_fb *fb)
107{ 84{
108 v2m_cfg_write(SYS_CFG_MUXFPGA | SYS_CFG_SITE_DB1, 0); 85 v2m_cfg_write(SYS_CFG_MUXFPGA | SYS_CFG_SITE_DB1, 0);
@@ -112,42 +89,23 @@ static void ct_ca9x4_clcd_enable(struct clcd_fb *fb)
112static int ct_ca9x4_clcd_setup(struct clcd_fb *fb) 89static int ct_ca9x4_clcd_setup(struct clcd_fb *fb)
113{ 90{
114 unsigned long framesize = 1024 * 768 * 2; 91 unsigned long framesize = 1024 * 768 * 2;
115 dma_addr_t dma;
116 92
117 fb->panel = &xvga_panel; 93 fb->panel = versatile_clcd_get_panel("XVGA");
94 if (!fb->panel)
95 return -EINVAL;
118 96
119 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize, 97 return versatile_clcd_setup_dma(fb, framesize);
120 &dma, GFP_KERNEL);
121 if (!fb->fb.screen_base) {
122 printk(KERN_ERR "CLCD: unable to map frame buffer\n");
123 return -ENOMEM;
124 }
125 fb->fb.fix.smem_start = dma;
126 fb->fb.fix.smem_len = framesize;
127
128 return 0;
129}
130
131static int ct_ca9x4_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
132{
133 return dma_mmap_writecombine(&fb->dev->dev, vma, fb->fb.screen_base,
134 fb->fb.fix.smem_start, fb->fb.fix.smem_len);
135}
136
137static void ct_ca9x4_clcd_remove(struct clcd_fb *fb)
138{
139 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
140 fb->fb.screen_base, fb->fb.fix.smem_start);
141} 98}
142 99
143static struct clcd_board ct_ca9x4_clcd_data = { 100static struct clcd_board ct_ca9x4_clcd_data = {
144 .name = "CT-CA9X4", 101 .name = "CT-CA9X4",
102 .caps = CLCD_CAP_5551 | CLCD_CAP_565,
145 .check = clcdfb_check, 103 .check = clcdfb_check,
146 .decode = clcdfb_decode, 104 .decode = clcdfb_decode,
147 .enable = ct_ca9x4_clcd_enable, 105 .enable = ct_ca9x4_clcd_enable,
148 .setup = ct_ca9x4_clcd_setup, 106 .setup = ct_ca9x4_clcd_setup,
149 .mmap = ct_ca9x4_clcd_mmap, 107 .mmap = versatile_clcd_mmap_dma,
150 .remove = ct_ca9x4_clcd_remove, 108 .remove = versatile_clcd_remove_dma,
151}; 109};
152 110
153static AMBA_DEVICE(clcd, "ct:clcd", CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data); 111static AMBA_DEVICE(clcd, "ct:clcd", CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data);
@@ -220,6 +178,11 @@ static struct platform_device pmu_device = {
220 .resource = pmu_resources, 178 .resource = pmu_resources,
221}; 179};
222 180
181static void __init ct_ca9x4_init_early(void)
182{
183 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
184}
185
223static void __init ct_ca9x4_init(void) 186static void __init ct_ca9x4_init(void)
224{ 187{
225 int i; 188 int i;
@@ -234,22 +197,40 @@ static void __init ct_ca9x4_init(void)
234 l2x0_init(l2x0_base, 0x00400000, 0xfe0fffff); 197 l2x0_init(l2x0_base, 0x00400000, 0xfe0fffff);
235#endif 198#endif
236 199
237 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
238
239 for (i = 0; i < ARRAY_SIZE(ct_ca9x4_amba_devs); i++) 200 for (i = 0; i < ARRAY_SIZE(ct_ca9x4_amba_devs); i++)
240 amba_device_register(ct_ca9x4_amba_devs[i], &iomem_resource); 201 amba_device_register(ct_ca9x4_amba_devs[i], &iomem_resource);
241 202
242 platform_device_register(&pmu_device); 203 platform_device_register(&pmu_device);
243} 204}
244 205
245MACHINE_START(VEXPRESS, "ARM-Versatile Express CA9x4") 206#ifdef CONFIG_SMP
246 .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 207static void ct_ca9x4_init_cpu_map(void)
208{
209 int i, ncores = scu_get_core_count(MMIO_P2V(A9_MPCORE_SCU));
210
211 for (i = 0; i < ncores; ++i)
212 set_cpu_possible(i, true);
213}
214
215static void ct_ca9x4_smp_enable(unsigned int max_cpus)
216{
217 int i;
218 for (i = 0; i < max_cpus; i++)
219 set_cpu_present(i, true);
220
221 scu_enable(MMIO_P2V(A9_MPCORE_SCU));
222}
223#endif
224
225struct ct_desc ct_ca9x4_desc __initdata = {
226 .id = V2M_CT_ID_CA9,
227 .name = "CA9x4",
247 .map_io = ct_ca9x4_map_io, 228 .map_io = ct_ca9x4_map_io,
229 .init_early = ct_ca9x4_init_early,
248 .init_irq = ct_ca9x4_init_irq, 230 .init_irq = ct_ca9x4_init_irq,
249#if 0 231 .init_tile = ct_ca9x4_init,
250 .timer = &ct_ca9x4_timer, 232#ifdef CONFIG_SMP
251#else 233 .init_cpu_map = ct_ca9x4_init_cpu_map,
252 .timer = &v2m_timer, 234 .smp_enable = ct_ca9x4_smp_enable,
253#endif 235#endif
254 .init_machine = ct_ca9x4_init, 236};
255MACHINE_END
diff --git a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
index f9e2f8d22962..a34d3d4faae1 100644
--- a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
+++ b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
@@ -45,4 +45,6 @@
45#define IRQ_CT_CA9X4_PMU_CPU2 94 45#define IRQ_CT_CA9X4_PMU_CPU2 94
46#define IRQ_CT_CA9X4_PMU_CPU3 95 46#define IRQ_CT_CA9X4_PMU_CPU3 95
47 47
48extern struct ct_desc ct_ca9x4_desc;
49
48#endif 50#endif
diff --git a/arch/arm/mach-vexpress/include/mach/motherboard.h b/arch/arm/mach-vexpress/include/mach/motherboard.h
index 98a8ded055bf..0a3a37518405 100644
--- a/arch/arm/mach-vexpress/include/mach/motherboard.h
+++ b/arch/arm/mach-vexpress/include/mach/motherboard.h
@@ -118,4 +118,26 @@
118int v2m_cfg_write(u32 devfn, u32 data); 118int v2m_cfg_write(u32 devfn, u32 data);
119int v2m_cfg_read(u32 devfn, u32 *data); 119int v2m_cfg_read(u32 devfn, u32 *data);
120 120
121/*
122 * Core tile IDs
123 */
124#define V2M_CT_ID_CA9 0x0c000191
125#define V2M_CT_ID_UNSUPPORTED 0xff000191
126#define V2M_CT_ID_MASK 0xff000fff
127
128struct ct_desc {
129 u32 id;
130 const char *name;
131 void (*map_io)(void);
132 void (*init_early)(void);
133 void (*init_irq)(void);
134 void (*init_tile)(void);
135#ifdef CONFIG_SMP
136 void (*init_cpu_map)(void);
137 void (*smp_enable)(unsigned int);
138#endif
139};
140
141extern struct ct_desc *ct_desc;
142
121#endif 143#endif
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
index 634bf1d3a311..2b5f7ac001a3 100644
--- a/arch/arm/mach-vexpress/platsmp.c
+++ b/arch/arm/mach-vexpress/platsmp.c
@@ -10,114 +10,17 @@
10 */ 10 */
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/errno.h> 12#include <linux/errno.h>
13#include <linux/delay.h>
14#include <linux/device.h>
15#include <linux/jiffies.h>
16#include <linux/smp.h> 13#include <linux/smp.h>
17#include <linux/io.h> 14#include <linux/io.h>
18 15
19#include <asm/cacheflush.h>
20#include <asm/smp_scu.h>
21#include <asm/unified.h> 16#include <asm/unified.h>
22 17
23#include <mach/ct-ca9x4.h>
24#include <mach/motherboard.h> 18#include <mach/motherboard.h>
25#define V2M_PA_CS7 0x10000000 19#define V2M_PA_CS7 0x10000000
26 20
27#include "core.h" 21#include "core.h"
28 22
29extern void vexpress_secondary_startup(void); 23extern void versatile_secondary_startup(void);
30
31/*
32 * control for which core is the next to come out of the secondary
33 * boot "holding pen"
34 */
35volatile int __cpuinitdata pen_release = -1;
36
37/*
38 * Write pen_release in a way that is guaranteed to be visible to all
39 * observers, irrespective of whether they're taking part in coherency
40 * or not. This is necessary for the hotplug code to work reliably.
41 */
42static void __cpuinit write_pen_release(int val)
43{
44 pen_release = val;
45 smp_wmb();
46 __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
47 outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
48}
49
50static void __iomem *scu_base_addr(void)
51{
52 return MMIO_P2V(A9_MPCORE_SCU);
53}
54
55static DEFINE_SPINLOCK(boot_lock);
56
57void __cpuinit platform_secondary_init(unsigned int cpu)
58{
59 /*
60 * if any interrupts are already enabled for the primary
61 * core (e.g. timer irq), then they will not have been enabled
62 * for us: do so
63 */
64 gic_secondary_init(0);
65
66 /*
67 * let the primary processor know we're out of the
68 * pen, then head off into the C entry point
69 */
70 write_pen_release(-1);
71
72 /*
73 * Synchronise with the boot thread.
74 */
75 spin_lock(&boot_lock);
76 spin_unlock(&boot_lock);
77}
78
79int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
80{
81 unsigned long timeout;
82
83 /*
84 * Set synchronisation state between this boot processor
85 * and the secondary one
86 */
87 spin_lock(&boot_lock);
88
89 /*
90 * This is really belt and braces; we hold unintended secondary
91 * CPUs in the holding pen until we're ready for them. However,
92 * since we haven't sent them a soft interrupt, they shouldn't
93 * be there.
94 */
95 write_pen_release(cpu);
96
97 /*
98 * Send the secondary CPU a soft interrupt, thereby causing
99 * the boot monitor to read the system wide flags register,
100 * and branch to the address found there.
101 */
102 smp_cross_call(cpumask_of(cpu), 1);
103
104 timeout = jiffies + (1 * HZ);
105 while (time_before(jiffies, timeout)) {
106 smp_rmb();
107 if (pen_release == -1)
108 break;
109
110 udelay(10);
111 }
112
113 /*
114 * now the secondary core is starting up let it run its
115 * calibrations, then wait for it to finish
116 */
117 spin_unlock(&boot_lock);
118
119 return pen_release != -1 ? -ENOSYS : 0;
120}
121 24
122/* 25/*
123 * Initialise the CPU possible map early - this describes the CPUs 26 * Initialise the CPU possible map early - this describes the CPUs
@@ -125,36 +28,16 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
125 */ 28 */
126void __init smp_init_cpus(void) 29void __init smp_init_cpus(void)
127{ 30{
128 void __iomem *scu_base = scu_base_addr(); 31 ct_desc->init_cpu_map();
129 unsigned int i, ncores;
130
131 ncores = scu_base ? scu_get_core_count(scu_base) : 1;
132
133 /* sanity check */
134 if (ncores > NR_CPUS) {
135 printk(KERN_WARNING
136 "vexpress: no. of cores (%d) greater than configured "
137 "maximum of %d - clipping\n",
138 ncores, NR_CPUS);
139 ncores = NR_CPUS;
140 }
141
142 for (i = 0; i < ncores; i++)
143 set_cpu_possible(i, true);
144} 32}
145 33
146void __init platform_smp_prepare_cpus(unsigned int max_cpus) 34void __init platform_smp_prepare_cpus(unsigned int max_cpus)
147{ 35{
148 int i;
149
150 /* 36 /*
151 * Initialise the present map, which describes the set of CPUs 37 * Initialise the present map, which describes the set of CPUs
152 * actually populated at the present time. 38 * actually populated at the present time.
153 */ 39 */
154 for (i = 0; i < max_cpus; i++) 40 ct_desc->smp_enable(max_cpus);
155 set_cpu_present(i, true);
156
157 scu_enable(scu_base_addr());
158 41
159 /* 42 /*
160 * Write the address of secondary startup into the 43 * Write the address of secondary startup into the
@@ -163,6 +46,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
163 * secondary CPU branches to this address. 46 * secondary CPU branches to this address.
164 */ 47 */
165 writel(~0, MMIO_P2V(V2M_SYS_FLAGSCLR)); 48 writel(~0, MMIO_P2V(V2M_SYS_FLAGSCLR));
166 writel(BSYM(virt_to_phys(vexpress_secondary_startup)), 49 writel(BSYM(virt_to_phys(versatile_secondary_startup)),
167 MMIO_P2V(V2M_SYS_FLAGSSET)); 50 MMIO_P2V(V2M_SYS_FLAGSSET));
168} 51}
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 1edae65a0e72..ba46e8e07437 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -7,13 +7,16 @@
7#include <linux/io.h> 7#include <linux/io.h>
8#include <linux/init.h> 8#include <linux/init.h>
9#include <linux/platform_device.h> 9#include <linux/platform_device.h>
10#include <linux/ata_platform.h>
10#include <linux/smsc911x.h> 11#include <linux/smsc911x.h>
11#include <linux/spinlock.h> 12#include <linux/spinlock.h>
12#include <linux/sysdev.h> 13#include <linux/sysdev.h>
13#include <linux/usb/isp1760.h> 14#include <linux/usb/isp1760.h>
14#include <linux/clkdev.h> 15#include <linux/clkdev.h>
15 16
17#include <asm/mach-types.h>
16#include <asm/sizes.h> 18#include <asm/sizes.h>
19#include <asm/mach/arch.h>
17#include <asm/mach/flash.h> 20#include <asm/mach/flash.h>
18#include <asm/mach/map.h> 21#include <asm/mach/map.h>
19#include <asm/mach/time.h> 22#include <asm/mach/time.h>
@@ -21,6 +24,7 @@
21#include <asm/hardware/timer-sp.h> 24#include <asm/hardware/timer-sp.h>
22#include <asm/hardware/sp810.h> 25#include <asm/hardware/sp810.h>
23 26
27#include <mach/ct-ca9x4.h>
24#include <mach/motherboard.h> 28#include <mach/motherboard.h>
25 29
26#include <plat/sched_clock.h> 30#include <plat/sched_clock.h>
@@ -42,19 +46,16 @@ static struct map_desc v2m_io_desc[] __initdata = {
42 }, 46 },
43}; 47};
44 48
45void __init v2m_map_io(struct map_desc *tile, size_t num) 49static void __init v2m_init_early(void)
46{ 50{
47 iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc)); 51 ct_desc->init_early();
48 iotable_init(tile, num); 52 versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000);
49} 53}
50 54
51
52static void __init v2m_timer_init(void) 55static void __init v2m_timer_init(void)
53{ 56{
54 u32 scctrl; 57 u32 scctrl;
55 58
56 versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000);
57
58 /* Select 1MHz TIMCLK as the reference clock for SP804 timers */ 59 /* Select 1MHz TIMCLK as the reference clock for SP804 timers */
59 scctrl = readl(MMIO_P2V(V2M_SYSCTL + SCCTRL)); 60 scctrl = readl(MMIO_P2V(V2M_SYSCTL + SCCTRL));
60 scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK; 61 scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
@@ -68,7 +69,7 @@ static void __init v2m_timer_init(void)
68 sp804_clockevents_init(MMIO_P2V(V2M_TIMER0), IRQ_V2M_TIMER0); 69 sp804_clockevents_init(MMIO_P2V(V2M_TIMER0), IRQ_V2M_TIMER0);
69} 70}
70 71
71struct sys_timer v2m_timer = { 72static struct sys_timer v2m_timer = {
72 .init = v2m_timer_init, 73 .init = v2m_timer_init,
73}; 74};
74 75
@@ -249,6 +250,29 @@ static struct platform_device v2m_flash_device = {
249 .dev.platform_data = &v2m_flash_data, 250 .dev.platform_data = &v2m_flash_data,
250}; 251};
251 252
253static struct pata_platform_info v2m_pata_data = {
254 .ioport_shift = 2,
255};
256
257static struct resource v2m_pata_resources[] = {
258 {
259 .start = V2M_CF,
260 .end = V2M_CF + 0xff,
261 .flags = IORESOURCE_MEM,
262 }, {
263 .start = V2M_CF + 0x100,
264 .end = V2M_CF + SZ_4K - 1,
265 .flags = IORESOURCE_MEM,
266 },
267};
268
269static struct platform_device v2m_cf_device = {
270 .name = "pata_platform",
271 .id = -1,
272 .resource = v2m_pata_resources,
273 .num_resources = ARRAY_SIZE(v2m_pata_resources),
274 .dev.platform_data = &v2m_pata_data,
275};
252 276
253static unsigned int v2m_mmci_status(struct device *dev) 277static unsigned int v2m_mmci_status(struct device *dev)
254{ 278{
@@ -354,7 +378,44 @@ static void v2m_restart(char str, const char *cmd)
354 printk(KERN_EMERG "Unable to reboot\n"); 378 printk(KERN_EMERG "Unable to reboot\n");
355} 379}
356 380
357static int __init v2m_init(void) 381struct ct_desc *ct_desc;
382
383static struct ct_desc *ct_descs[] __initdata = {
384#ifdef CONFIG_ARCH_VEXPRESS_CA9X4
385 &ct_ca9x4_desc,
386#endif
387};
388
389static void __init v2m_populate_ct_desc(void)
390{
391 int i;
392 u32 current_tile_id;
393
394 ct_desc = NULL;
395 current_tile_id = readl(MMIO_P2V(V2M_SYS_PROCID0)) & V2M_CT_ID_MASK;
396
397 for (i = 0; i < ARRAY_SIZE(ct_descs) && !ct_desc; ++i)
398 if (ct_descs[i]->id == current_tile_id)
399 ct_desc = ct_descs[i];
400
401 if (!ct_desc)
402 panic("vexpress: failed to populate core tile description "
403 "for tile ID 0x%8x\n", current_tile_id);
404}
405
406static void __init v2m_map_io(void)
407{
408 iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
409 v2m_populate_ct_desc();
410 ct_desc->map_io();
411}
412
413static void __init v2m_init_irq(void)
414{
415 ct_desc->init_irq();
416}
417
418static void __init v2m_init(void)
358{ 419{
359 int i; 420 int i;
360 421
@@ -363,6 +424,7 @@ static int __init v2m_init(void)
363 platform_device_register(&v2m_pcie_i2c_device); 424 platform_device_register(&v2m_pcie_i2c_device);
364 platform_device_register(&v2m_ddc_i2c_device); 425 platform_device_register(&v2m_ddc_i2c_device);
365 platform_device_register(&v2m_flash_device); 426 platform_device_register(&v2m_flash_device);
427 platform_device_register(&v2m_cf_device);
366 platform_device_register(&v2m_eth_device); 428 platform_device_register(&v2m_eth_device);
367 platform_device_register(&v2m_usb_device); 429 platform_device_register(&v2m_usb_device);
368 430
@@ -372,6 +434,14 @@ static int __init v2m_init(void)
372 pm_power_off = v2m_power_off; 434 pm_power_off = v2m_power_off;
373 arm_pm_restart = v2m_restart; 435 arm_pm_restart = v2m_restart;
374 436
375 return 0; 437 ct_desc->init_tile();
376} 438}
377arch_initcall(v2m_init); 439
440MACHINE_START(VEXPRESS, "ARM-Versatile Express")
441 .boot_params = PLAT_PHYS_OFFSET + 0x00000100,
442 .map_io = v2m_map_io,
443 .init_early = v2m_init_early,
444 .init_irq = v2m_init_irq,
445 .timer = &v2m_timer,
446 .init_machine = v2m_init,
447MACHINE_END
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 4771dba61448..82a093cee09a 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -149,6 +149,7 @@ static int __init consistent_init(void)
149{ 149{
150 int ret = 0; 150 int ret = 0;
151 pgd_t *pgd; 151 pgd_t *pgd;
152 pud_t *pud;
152 pmd_t *pmd; 153 pmd_t *pmd;
153 pte_t *pte; 154 pte_t *pte;
154 int i = 0; 155 int i = 0;
@@ -156,7 +157,15 @@ static int __init consistent_init(void)
156 157
157 do { 158 do {
158 pgd = pgd_offset(&init_mm, base); 159 pgd = pgd_offset(&init_mm, base);
159 pmd = pmd_alloc(&init_mm, pgd, base); 160
161 pud = pud_alloc(&init_mm, pgd, base);
162 if (!pud) {
163 printk(KERN_ERR "%s: no pud tables\n", __func__);
164 ret = -ENOMEM;
165 break;
166 }
167
168 pmd = pmd_alloc(&init_mm, pud, base);
160 if (!pmd) { 169 if (!pmd) {
161 printk(KERN_ERR "%s: no pmd tables\n", __func__); 170 printk(KERN_ERR "%s: no pmd tables\n", __func__);
162 ret = -ENOMEM; 171 ret = -ENOMEM;
diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c
index 01210dba0221..7cab79179421 100644
--- a/arch/arm/mm/fault-armv.c
+++ b/arch/arm/mm/fault-armv.c
@@ -95,6 +95,7 @@ static int adjust_pte(struct vm_area_struct *vma, unsigned long address,
95{ 95{
96 spinlock_t *ptl; 96 spinlock_t *ptl;
97 pgd_t *pgd; 97 pgd_t *pgd;
98 pud_t *pud;
98 pmd_t *pmd; 99 pmd_t *pmd;
99 pte_t *pte; 100 pte_t *pte;
100 int ret; 101 int ret;
@@ -103,7 +104,11 @@ static int adjust_pte(struct vm_area_struct *vma, unsigned long address,
103 if (pgd_none_or_clear_bad(pgd)) 104 if (pgd_none_or_clear_bad(pgd))
104 return 0; 105 return 0;
105 106
106 pmd = pmd_offset(pgd, address); 107 pud = pud_offset(pgd, address);
108 if (pud_none_or_clear_bad(pud))
109 return 0;
110
111 pmd = pmd_offset(pud, address);
107 if (pmd_none_or_clear_bad(pmd)) 112 if (pmd_none_or_clear_bad(pmd))
108 return 0; 113 return 0;
109 114
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index f10f9bac2206..bc0e1d88fd3b 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -76,9 +76,11 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
76 76
77 printk(KERN_ALERT "pgd = %p\n", mm->pgd); 77 printk(KERN_ALERT "pgd = %p\n", mm->pgd);
78 pgd = pgd_offset(mm, addr); 78 pgd = pgd_offset(mm, addr);
79 printk(KERN_ALERT "[%08lx] *pgd=%08lx", addr, pgd_val(*pgd)); 79 printk(KERN_ALERT "[%08lx] *pgd=%08llx",
80 addr, (long long)pgd_val(*pgd));
80 81
81 do { 82 do {
83 pud_t *pud;
82 pmd_t *pmd; 84 pmd_t *pmd;
83 pte_t *pte; 85 pte_t *pte;
84 86
@@ -90,9 +92,21 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
90 break; 92 break;
91 } 93 }
92 94
93 pmd = pmd_offset(pgd, addr); 95 pud = pud_offset(pgd, addr);
96 if (PTRS_PER_PUD != 1)
97 printk(", *pud=%08lx", pud_val(*pud));
98
99 if (pud_none(*pud))
100 break;
101
102 if (pud_bad(*pud)) {
103 printk("(bad)");
104 break;
105 }
106
107 pmd = pmd_offset(pud, addr);
94 if (PTRS_PER_PMD != 1) 108 if (PTRS_PER_PMD != 1)
95 printk(", *pmd=%08lx", pmd_val(*pmd)); 109 printk(", *pmd=%08llx", (long long)pmd_val(*pmd));
96 110
97 if (pmd_none(*pmd)) 111 if (pmd_none(*pmd))
98 break; 112 break;
@@ -107,8 +121,9 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
107 break; 121 break;
108 122
109 pte = pte_offset_map(pmd, addr); 123 pte = pte_offset_map(pmd, addr);
110 printk(", *pte=%08lx", pte_val(*pte)); 124 printk(", *pte=%08llx", (long long)pte_val(*pte));
111 printk(", *ppte=%08lx", pte_val(pte[PTE_HWTABLE_PTRS])); 125 printk(", *ppte=%08llx",
126 (long long)pte_val(pte[PTE_HWTABLE_PTRS]));
112 pte_unmap(pte); 127 pte_unmap(pte);
113 } while(0); 128 } while(0);
114 129
@@ -388,6 +403,7 @@ do_translation_fault(unsigned long addr, unsigned int fsr,
388{ 403{
389 unsigned int index; 404 unsigned int index;
390 pgd_t *pgd, *pgd_k; 405 pgd_t *pgd, *pgd_k;
406 pud_t *pud, *pud_k;
391 pmd_t *pmd, *pmd_k; 407 pmd_t *pmd, *pmd_k;
392 408
393 if (addr < TASK_SIZE) 409 if (addr < TASK_SIZE)
@@ -406,12 +422,19 @@ do_translation_fault(unsigned long addr, unsigned int fsr,
406 422
407 if (pgd_none(*pgd_k)) 423 if (pgd_none(*pgd_k))
408 goto bad_area; 424 goto bad_area;
409
410 if (!pgd_present(*pgd)) 425 if (!pgd_present(*pgd))
411 set_pgd(pgd, *pgd_k); 426 set_pgd(pgd, *pgd_k);
412 427
413 pmd_k = pmd_offset(pgd_k, addr); 428 pud = pud_offset(pgd, addr);
414 pmd = pmd_offset(pgd, addr); 429 pud_k = pud_offset(pgd_k, addr);
430
431 if (pud_none(*pud_k))
432 goto bad_area;
433 if (!pud_present(*pud))
434 set_pud(pud, *pud_k);
435
436 pmd = pmd_offset(pud, addr);
437 pmd_k = pmd_offset(pud_k, addr);
415 438
416 /* 439 /*
417 * On ARM one Linux PGD entry contains two hardware entries (see page 440 * On ARM one Linux PGD entry contains two hardware entries (see page
diff --git a/arch/arm/mm/idmap.c b/arch/arm/mm/idmap.c
index 57299446f787..2be9139a4ef3 100644
--- a/arch/arm/mm/idmap.c
+++ b/arch/arm/mm/idmap.c
@@ -4,10 +4,10 @@
4#include <asm/pgalloc.h> 4#include <asm/pgalloc.h>
5#include <asm/pgtable.h> 5#include <asm/pgtable.h>
6 6
7static void idmap_add_pmd(pgd_t *pgd, unsigned long addr, unsigned long end, 7static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
8 unsigned long prot) 8 unsigned long prot)
9{ 9{
10 pmd_t *pmd = pmd_offset(pgd, addr); 10 pmd_t *pmd = pmd_offset(pud, addr);
11 11
12 addr = (addr & PMD_MASK) | prot; 12 addr = (addr & PMD_MASK) | prot;
13 pmd[0] = __pmd(addr); 13 pmd[0] = __pmd(addr);
@@ -16,6 +16,18 @@ static void idmap_add_pmd(pgd_t *pgd, unsigned long addr, unsigned long end,
16 flush_pmd_entry(pmd); 16 flush_pmd_entry(pmd);
17} 17}
18 18
19static void idmap_add_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
20 unsigned long prot)
21{
22 pud_t *pud = pud_offset(pgd, addr);
23 unsigned long next;
24
25 do {
26 next = pud_addr_end(addr, end);
27 idmap_add_pmd(pud, addr, next, prot);
28 } while (pud++, addr = next, addr != end);
29}
30
19void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end) 31void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end)
20{ 32{
21 unsigned long prot, next; 33 unsigned long prot, next;
@@ -27,17 +39,28 @@ void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end)
27 pgd += pgd_index(addr); 39 pgd += pgd_index(addr);
28 do { 40 do {
29 next = pgd_addr_end(addr, end); 41 next = pgd_addr_end(addr, end);
30 idmap_add_pmd(pgd, addr, next, prot); 42 idmap_add_pud(pgd, addr, next, prot);
31 } while (pgd++, addr = next, addr != end); 43 } while (pgd++, addr = next, addr != end);
32} 44}
33 45
34#ifdef CONFIG_SMP 46#ifdef CONFIG_SMP
35static void idmap_del_pmd(pgd_t *pgd, unsigned long addr, unsigned long end) 47static void idmap_del_pmd(pud_t *pud, unsigned long addr, unsigned long end)
36{ 48{
37 pmd_t *pmd = pmd_offset(pgd, addr); 49 pmd_t *pmd = pmd_offset(pud, addr);
38 pmd_clear(pmd); 50 pmd_clear(pmd);
39} 51}
40 52
53static void idmap_del_pud(pgd_t *pgd, unsigned long addr, unsigned long end)
54{
55 pud_t *pud = pud_offset(pgd, addr);
56 unsigned long next;
57
58 do {
59 next = pud_addr_end(addr, end);
60 idmap_del_pmd(pud, addr, next);
61 } while (pud++, addr = next, addr != end);
62}
63
41void identity_mapping_del(pgd_t *pgd, unsigned long addr, unsigned long end) 64void identity_mapping_del(pgd_t *pgd, unsigned long addr, unsigned long end)
42{ 65{
43 unsigned long next; 66 unsigned long next;
@@ -45,7 +68,7 @@ void identity_mapping_del(pgd_t *pgd, unsigned long addr, unsigned long end)
45 pgd += pgd_index(addr); 68 pgd += pgd_index(addr);
46 do { 69 do {
47 next = pgd_addr_end(addr, end); 70 next = pgd_addr_end(addr, end);
48 idmap_del_pmd(pgd, addr, next); 71 idmap_del_pud(pgd, addr, next);
49 } while (pgd++, addr = next, addr != end); 72 } while (pgd++, addr = next, addr != end);
50} 73}
51#endif 74#endif
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index cddd684364da..e5f6fc428348 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -78,7 +78,7 @@ __tagtable(ATAG_INITRD2, parse_tag_initrd2);
78 */ 78 */
79struct meminfo meminfo; 79struct meminfo meminfo;
80 80
81void show_mem(void) 81void show_mem(unsigned int filter)
82{ 82{
83 int free = 0, total = 0, reserved = 0; 83 int free = 0, total = 0, reserved = 0;
84 int shared = 0, cached = 0, slab = 0, i; 84 int shared = 0, cached = 0, slab = 0, i;
@@ -350,7 +350,7 @@ void __init bootmem_init(void)
350 */ 350 */
351 arm_bootmem_free(min, max_low, max_high); 351 arm_bootmem_free(min, max_low, max_high);
352 352
353 high_memory = __va((max_low << PAGE_SHIFT) - 1) + 1; 353 high_memory = __va(((phys_addr_t)max_low << PAGE_SHIFT) - 1) + 1;
354 354
355 /* 355 /*
356 * This doesn't seem to be used by the Linux memory manager any 356 * This doesn't seem to be used by the Linux memory manager any
@@ -398,8 +398,8 @@ free_memmap(unsigned long start_pfn, unsigned long end_pfn)
398 * Convert to physical addresses, and 398 * Convert to physical addresses, and
399 * round start upwards and end downwards. 399 * round start upwards and end downwards.
400 */ 400 */
401 pg = PAGE_ALIGN(__pa(start_pg)); 401 pg = (unsigned long)PAGE_ALIGN(__pa(start_pg));
402 pgend = __pa(end_pg) & PAGE_MASK; 402 pgend = (unsigned long)__pa(end_pg) & PAGE_MASK;
403 403
404 /* 404 /*
405 * If there are free pages between these, 405 * If there are free pages between these,
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index 36960df5fb76..d2384106af9c 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -7,7 +7,7 @@ extern pmd_t *top_pmd;
7 7
8static inline pmd_t *pmd_off(pgd_t *pgd, unsigned long virt) 8static inline pmd_t *pmd_off(pgd_t *pgd, unsigned long virt)
9{ 9{
10 return pmd_offset(pgd, virt); 10 return pmd_offset(pud_offset(pgd, virt), virt);
11} 11}
12 12
13static inline pmd_t *pmd_off_k(unsigned long virt) 13static inline pmd_t *pmd_off_k(unsigned long virt)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index ff7b43b5885a..6cf76b3b68d1 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -533,7 +533,7 @@ static void __init *early_alloc(unsigned long sz)
533static pte_t * __init early_pte_alloc(pmd_t *pmd, unsigned long addr, unsigned long prot) 533static pte_t * __init early_pte_alloc(pmd_t *pmd, unsigned long addr, unsigned long prot)
534{ 534{
535 if (pmd_none(*pmd)) { 535 if (pmd_none(*pmd)) {
536 pte_t *pte = early_alloc(2 * PTRS_PER_PTE * sizeof(pte_t)); 536 pte_t *pte = early_alloc(PTE_HWTABLE_OFF + PTE_HWTABLE_SIZE);
537 __pmd_populate(pmd, __pa(pte), prot); 537 __pmd_populate(pmd, __pa(pte), prot);
538 } 538 }
539 BUG_ON(pmd_bad(*pmd)); 539 BUG_ON(pmd_bad(*pmd));
@@ -551,11 +551,11 @@ static void __init alloc_init_pte(pmd_t *pmd, unsigned long addr,
551 } while (pte++, addr += PAGE_SIZE, addr != end); 551 } while (pte++, addr += PAGE_SIZE, addr != end);
552} 552}
553 553
554static void __init alloc_init_section(pgd_t *pgd, unsigned long addr, 554static void __init alloc_init_section(pud_t *pud, unsigned long addr,
555 unsigned long end, phys_addr_t phys, 555 unsigned long end, phys_addr_t phys,
556 const struct mem_type *type) 556 const struct mem_type *type)
557{ 557{
558 pmd_t *pmd = pmd_offset(pgd, addr); 558 pmd_t *pmd = pmd_offset(pud, addr);
559 559
560 /* 560 /*
561 * Try a section mapping - end, addr and phys must all be aligned 561 * Try a section mapping - end, addr and phys must all be aligned
@@ -584,6 +584,19 @@ static void __init alloc_init_section(pgd_t *pgd, unsigned long addr,
584 } 584 }
585} 585}
586 586
587static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
588 unsigned long phys, const struct mem_type *type)
589{
590 pud_t *pud = pud_offset(pgd, addr);
591 unsigned long next;
592
593 do {
594 next = pud_addr_end(addr, end);
595 alloc_init_section(pud, addr, next, phys, type);
596 phys += next - addr;
597 } while (pud++, addr = next, addr != end);
598}
599
587static void __init create_36bit_mapping(struct map_desc *md, 600static void __init create_36bit_mapping(struct map_desc *md,
588 const struct mem_type *type) 601 const struct mem_type *type)
589{ 602{
@@ -592,13 +605,13 @@ static void __init create_36bit_mapping(struct map_desc *md,
592 pgd_t *pgd; 605 pgd_t *pgd;
593 606
594 addr = md->virtual; 607 addr = md->virtual;
595 phys = (unsigned long)__pfn_to_phys(md->pfn); 608 phys = __pfn_to_phys(md->pfn);
596 length = PAGE_ALIGN(md->length); 609 length = PAGE_ALIGN(md->length);
597 610
598 if (!(cpu_architecture() >= CPU_ARCH_ARMv6 || cpu_is_xsc3())) { 611 if (!(cpu_architecture() >= CPU_ARCH_ARMv6 || cpu_is_xsc3())) {
599 printk(KERN_ERR "MM: CPU does not support supersection " 612 printk(KERN_ERR "MM: CPU does not support supersection "
600 "mapping for 0x%08llx at 0x%08lx\n", 613 "mapping for 0x%08llx at 0x%08lx\n",
601 __pfn_to_phys((u64)md->pfn), addr); 614 (long long)__pfn_to_phys((u64)md->pfn), addr);
602 return; 615 return;
603 } 616 }
604 617
@@ -611,14 +624,14 @@ static void __init create_36bit_mapping(struct map_desc *md,
611 if (type->domain) { 624 if (type->domain) {
612 printk(KERN_ERR "MM: invalid domain in supersection " 625 printk(KERN_ERR "MM: invalid domain in supersection "
613 "mapping for 0x%08llx at 0x%08lx\n", 626 "mapping for 0x%08llx at 0x%08lx\n",
614 __pfn_to_phys((u64)md->pfn), addr); 627 (long long)__pfn_to_phys((u64)md->pfn), addr);
615 return; 628 return;
616 } 629 }
617 630
618 if ((addr | length | __pfn_to_phys(md->pfn)) & ~SUPERSECTION_MASK) { 631 if ((addr | length | __pfn_to_phys(md->pfn)) & ~SUPERSECTION_MASK) {
619 printk(KERN_ERR "MM: cannot create mapping for " 632 printk(KERN_ERR "MM: cannot create mapping for 0x%08llx"
620 "0x%08llx at 0x%08lx invalid alignment\n", 633 " at 0x%08lx invalid alignment\n",
621 __pfn_to_phys((u64)md->pfn), addr); 634 (long long)__pfn_to_phys((u64)md->pfn), addr);
622 return; 635 return;
623 } 636 }
624 637
@@ -631,7 +644,8 @@ static void __init create_36bit_mapping(struct map_desc *md,
631 pgd = pgd_offset_k(addr); 644 pgd = pgd_offset_k(addr);
632 end = addr + length; 645 end = addr + length;
633 do { 646 do {
634 pmd_t *pmd = pmd_offset(pgd, addr); 647 pud_t *pud = pud_offset(pgd, addr);
648 pmd_t *pmd = pmd_offset(pud, addr);
635 int i; 649 int i;
636 650
637 for (i = 0; i < 16; i++) 651 for (i = 0; i < 16; i++)
@@ -652,22 +666,23 @@ static void __init create_36bit_mapping(struct map_desc *md,
652 */ 666 */
653static void __init create_mapping(struct map_desc *md) 667static void __init create_mapping(struct map_desc *md)
654{ 668{
655 unsigned long phys, addr, length, end; 669 unsigned long addr, length, end;
670 phys_addr_t phys;
656 const struct mem_type *type; 671 const struct mem_type *type;
657 pgd_t *pgd; 672 pgd_t *pgd;
658 673
659 if (md->virtual != vectors_base() && md->virtual < TASK_SIZE) { 674 if (md->virtual != vectors_base() && md->virtual < TASK_SIZE) {
660 printk(KERN_WARNING "BUG: not creating mapping for " 675 printk(KERN_WARNING "BUG: not creating mapping for 0x%08llx"
661 "0x%08llx at 0x%08lx in user region\n", 676 " at 0x%08lx in user region\n",
662 __pfn_to_phys((u64)md->pfn), md->virtual); 677 (long long)__pfn_to_phys((u64)md->pfn), md->virtual);
663 return; 678 return;
664 } 679 }
665 680
666 if ((md->type == MT_DEVICE || md->type == MT_ROM) && 681 if ((md->type == MT_DEVICE || md->type == MT_ROM) &&
667 md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) { 682 md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) {
668 printk(KERN_WARNING "BUG: mapping for 0x%08llx at 0x%08lx " 683 printk(KERN_WARNING "BUG: mapping for 0x%08llx"
669 "overlaps vmalloc space\n", 684 " at 0x%08lx overlaps vmalloc space\n",
670 __pfn_to_phys((u64)md->pfn), md->virtual); 685 (long long)__pfn_to_phys((u64)md->pfn), md->virtual);
671 } 686 }
672 687
673 type = &mem_types[md->type]; 688 type = &mem_types[md->type];
@@ -681,13 +696,13 @@ static void __init create_mapping(struct map_desc *md)
681 } 696 }
682 697
683 addr = md->virtual & PAGE_MASK; 698 addr = md->virtual & PAGE_MASK;
684 phys = (unsigned long)__pfn_to_phys(md->pfn); 699 phys = __pfn_to_phys(md->pfn);
685 length = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK)); 700 length = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK));
686 701
687 if (type->prot_l1 == 0 && ((addr | phys | length) & ~SECTION_MASK)) { 702 if (type->prot_l1 == 0 && ((addr | phys | length) & ~SECTION_MASK)) {
688 printk(KERN_WARNING "BUG: map for 0x%08lx at 0x%08lx can not " 703 printk(KERN_WARNING "BUG: map for 0x%08llx at 0x%08lx can not "
689 "be mapped using pages, ignoring.\n", 704 "be mapped using pages, ignoring.\n",
690 __pfn_to_phys(md->pfn), addr); 705 (long long)__pfn_to_phys(md->pfn), addr);
691 return; 706 return;
692 } 707 }
693 708
@@ -696,7 +711,7 @@ static void __init create_mapping(struct map_desc *md)
696 do { 711 do {
697 unsigned long next = pgd_addr_end(addr, end); 712 unsigned long next = pgd_addr_end(addr, end);
698 713
699 alloc_init_section(pgd, addr, next, phys, type); 714 alloc_init_pud(pgd, addr, next, phys, type);
700 715
701 phys += next - addr; 716 phys += next - addr;
702 addr = next; 717 addr = next;
@@ -794,9 +809,10 @@ static void __init sanity_check_meminfo(void)
794 */ 809 */
795 if (__va(bank->start) >= vmalloc_min || 810 if (__va(bank->start) >= vmalloc_min ||
796 __va(bank->start) < (void *)PAGE_OFFSET) { 811 __va(bank->start) < (void *)PAGE_OFFSET) {
797 printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx " 812 printk(KERN_NOTICE "Ignoring RAM at %.8llx-%.8llx "
798 "(vmalloc region overlap).\n", 813 "(vmalloc region overlap).\n",
799 bank->start, bank->start + bank->size - 1); 814 (unsigned long long)bank->start,
815 (unsigned long long)bank->start + bank->size - 1);
800 continue; 816 continue;
801 } 817 }
802 818
@@ -807,10 +823,11 @@ static void __init sanity_check_meminfo(void)
807 if (__va(bank->start + bank->size) > vmalloc_min || 823 if (__va(bank->start + bank->size) > vmalloc_min ||
808 __va(bank->start + bank->size) < __va(bank->start)) { 824 __va(bank->start + bank->size) < __va(bank->start)) {
809 unsigned long newsize = vmalloc_min - __va(bank->start); 825 unsigned long newsize = vmalloc_min - __va(bank->start);
810 printk(KERN_NOTICE "Truncating RAM at %.8lx-%.8lx " 826 printk(KERN_NOTICE "Truncating RAM at %.8llx-%.8llx "
811 "to -%.8lx (vmalloc region overlap).\n", 827 "to -%.8llx (vmalloc region overlap).\n",
812 bank->start, bank->start + bank->size - 1, 828 (unsigned long long)bank->start,
813 bank->start + newsize - 1); 829 (unsigned long long)bank->start + bank->size - 1,
830 (unsigned long long)bank->start + newsize - 1);
814 bank->size = newsize; 831 bank->size = newsize;
815 } 832 }
816#endif 833#endif
diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c
index 709244c66fa3..b2027c154b2a 100644
--- a/arch/arm/mm/pgd.c
+++ b/arch/arm/mm/pgd.c
@@ -23,6 +23,7 @@
23pgd_t *pgd_alloc(struct mm_struct *mm) 23pgd_t *pgd_alloc(struct mm_struct *mm)
24{ 24{
25 pgd_t *new_pgd, *init_pgd; 25 pgd_t *new_pgd, *init_pgd;
26 pud_t *new_pud, *init_pud;
26 pmd_t *new_pmd, *init_pmd; 27 pmd_t *new_pmd, *init_pmd;
27 pte_t *new_pte, *init_pte; 28 pte_t *new_pte, *init_pte;
28 29
@@ -46,7 +47,11 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
46 * On ARM, first page must always be allocated since it 47 * On ARM, first page must always be allocated since it
47 * contains the machine vectors. 48 * contains the machine vectors.
48 */ 49 */
49 new_pmd = pmd_alloc(mm, new_pgd, 0); 50 new_pud = pud_alloc(mm, new_pgd, 0);
51 if (!new_pud)
52 goto no_pud;
53
54 new_pmd = pmd_alloc(mm, new_pud, 0);
50 if (!new_pmd) 55 if (!new_pmd)
51 goto no_pmd; 56 goto no_pmd;
52 57
@@ -54,7 +59,8 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
54 if (!new_pte) 59 if (!new_pte)
55 goto no_pte; 60 goto no_pte;
56 61
57 init_pmd = pmd_offset(init_pgd, 0); 62 init_pud = pud_offset(init_pgd, 0);
63 init_pmd = pmd_offset(init_pud, 0);
58 init_pte = pte_offset_map(init_pmd, 0); 64 init_pte = pte_offset_map(init_pmd, 0);
59 set_pte_ext(new_pte, *init_pte, 0); 65 set_pte_ext(new_pte, *init_pte, 0);
60 pte_unmap(init_pte); 66 pte_unmap(init_pte);
@@ -66,6 +72,8 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
66no_pte: 72no_pte:
67 pmd_free(mm, new_pmd); 73 pmd_free(mm, new_pmd);
68no_pmd: 74no_pmd:
75 pud_free(mm, new_pud);
76no_pud:
69 free_pages((unsigned long)new_pgd, 2); 77 free_pages((unsigned long)new_pgd, 2);
70no_pgd: 78no_pgd:
71 return NULL; 79 return NULL;
@@ -74,6 +82,7 @@ no_pgd:
74void pgd_free(struct mm_struct *mm, pgd_t *pgd_base) 82void pgd_free(struct mm_struct *mm, pgd_t *pgd_base)
75{ 83{
76 pgd_t *pgd; 84 pgd_t *pgd;
85 pud_t *pud;
77 pmd_t *pmd; 86 pmd_t *pmd;
78 pgtable_t pte; 87 pgtable_t pte;
79 88
@@ -84,7 +93,11 @@ void pgd_free(struct mm_struct *mm, pgd_t *pgd_base)
84 if (pgd_none_or_clear_bad(pgd)) 93 if (pgd_none_or_clear_bad(pgd))
85 goto no_pgd; 94 goto no_pgd;
86 95
87 pmd = pmd_offset(pgd, 0); 96 pud = pud_offset(pgd, 0);
97 if (pud_none_or_clear_bad(pud))
98 goto no_pud;
99
100 pmd = pmd_offset(pud, 0);
88 if (pmd_none_or_clear_bad(pmd)) 101 if (pmd_none_or_clear_bad(pmd))
89 goto no_pmd; 102 goto no_pmd;
90 103
@@ -92,8 +105,11 @@ void pgd_free(struct mm_struct *mm, pgd_t *pgd_base)
92 pmd_clear(pmd); 105 pmd_clear(pmd);
93 pte_free(mm, pte); 106 pte_free(mm, pte);
94no_pmd: 107no_pmd:
95 pgd_clear(pgd); 108 pud_clear(pud);
96 pmd_free(mm, pmd); 109 pmd_free(mm, pmd);
110no_pud:
111 pgd_clear(pgd);
112 pud_free(mm, pud);
97no_pgd: 113no_pgd:
98 free_pages((unsigned long) pgd_base, 2); 114 free_pages((unsigned long) pgd_base, 2);
99} 115}
diff --git a/arch/arm/plat-nomadik/gpio.c b/arch/arm/plat-nomadik/gpio.c
index 70620426ee55..80643bc38e10 100644
--- a/arch/arm/plat-nomadik/gpio.c
+++ b/arch/arm/plat-nomadik/gpio.c
@@ -832,51 +832,6 @@ static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
832 : "? ", 832 : "? ",
833 (mode < 0) ? "unknown" : modes[mode], 833 (mode < 0) ? "unknown" : modes[mode],
834 pull ? "pull" : "none"); 834 pull ? "pull" : "none");
835
836 if (!is_out) {
837 int irq = gpio_to_irq(gpio);
838 struct irq_desc *desc = irq_to_desc(irq);
839
840 /* This races with request_irq(), set_irq_type(),
841 * and set_irq_wake() ... but those are "rare".
842 *
843 * More significantly, trigger type flags aren't
844 * currently maintained by genirq.
845 */
846 if (irq >= 0 && desc->action) {
847 char *trigger;
848
849 switch (desc->status & IRQ_TYPE_SENSE_MASK) {
850 case IRQ_TYPE_NONE:
851 trigger = "(default)";
852 break;
853 case IRQ_TYPE_EDGE_FALLING:
854 trigger = "edge-falling";
855 break;
856 case IRQ_TYPE_EDGE_RISING:
857 trigger = "edge-rising";
858 break;
859 case IRQ_TYPE_EDGE_BOTH:
860 trigger = "edge-both";
861 break;
862 case IRQ_TYPE_LEVEL_HIGH:
863 trigger = "level-high";
864 break;
865 case IRQ_TYPE_LEVEL_LOW:
866 trigger = "level-low";
867 break;
868 default:
869 trigger = "?trigger?";
870 break;
871 }
872
873 seq_printf(s, " irq-%d %s%s",
874 irq, trigger,
875 (desc->status & IRQ_WAKEUP)
876 ? " wakeup" : "");
877 }
878 }
879
880 seq_printf(s, "\n"); 835 seq_printf(s, "\n");
881 } 836 }
882} 837}
diff --git a/arch/arm/plat-omap/include/plat/display.h b/arch/arm/plat-omap/include/plat/display.h
index 0f140ecedb01..5e04ddc18fa8 100644
--- a/arch/arm/plat-omap/include/plat/display.h
+++ b/arch/arm/plat-omap/include/plat/display.h
@@ -58,6 +58,7 @@ enum omap_display_type {
58 OMAP_DISPLAY_TYPE_SDI = 1 << 2, 58 OMAP_DISPLAY_TYPE_SDI = 1 << 2,
59 OMAP_DISPLAY_TYPE_DSI = 1 << 3, 59 OMAP_DISPLAY_TYPE_DSI = 1 << 3,
60 OMAP_DISPLAY_TYPE_VENC = 1 << 4, 60 OMAP_DISPLAY_TYPE_VENC = 1 << 4,
61 OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
61}; 62};
62 63
63enum omap_plane { 64enum omap_plane {
@@ -237,6 +238,13 @@ static inline int omap_display_init(struct omap_dss_board_info *board_data)
237} 238}
238#endif 239#endif
239 240
241struct omap_display_platform_data {
242 struct omap_dss_board_info *board_data;
243 /* TODO: Additional members to be added when PM is considered */
244
245 bool (*opt_clock_available)(const char *clk_role);
246};
247
240struct omap_video_timings { 248struct omap_video_timings {
241 /* Unit: pixels */ 249 /* Unit: pixels */
242 u16 x_res; 250 u16 x_res;
@@ -396,8 +404,8 @@ struct omap_dss_device {
396 struct { 404 struct {
397 u16 regn; 405 u16 regn;
398 u16 regm; 406 u16 regm;
399 u16 regm3; 407 u16 regm_dispc;
400 u16 regm4; 408 u16 regm_dsi;
401 409
402 u16 lp_clk_div; 410 u16 lp_clk_div;
403 411
@@ -555,6 +563,9 @@ int omap_dsi_update(struct omap_dss_device *dssdev,
555 int channel, 563 int channel,
556 u16 x, u16 y, u16 w, u16 h, 564 u16 x, u16 y, u16 w, u16 h,
557 void (*callback)(int, void *), void *data); 565 void (*callback)(int, void *), void *data);
566int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel);
567int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id);
568void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel);
558 569
559int omapdss_dsi_display_enable(struct omap_dss_device *dssdev); 570int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
560void omapdss_dsi_display_disable(struct omap_dss_device *dssdev); 571void omapdss_dsi_display_disable(struct omap_dss_device *dssdev);
diff --git a/arch/arm/plat-omap/include/plat/omap34xx.h b/arch/arm/plat-omap/include/plat/omap34xx.h
index 98fc8b4a4cc4..b9e85886b9d6 100644
--- a/arch/arm/plat-omap/include/plat/omap34xx.h
+++ b/arch/arm/plat-omap/include/plat/omap34xx.h
@@ -56,8 +56,12 @@
56#define OMAP3430_ISP_RESZ_BASE (OMAP3430_ISP_BASE + 0x1000) 56#define OMAP3430_ISP_RESZ_BASE (OMAP3430_ISP_BASE + 0x1000)
57#define OMAP3430_ISP_SBL_BASE (OMAP3430_ISP_BASE + 0x1200) 57#define OMAP3430_ISP_SBL_BASE (OMAP3430_ISP_BASE + 0x1200)
58#define OMAP3430_ISP_MMU_BASE (OMAP3430_ISP_BASE + 0x1400) 58#define OMAP3430_ISP_MMU_BASE (OMAP3430_ISP_BASE + 0x1400)
59#define OMAP3430_ISP_CSI2A_BASE (OMAP3430_ISP_BASE + 0x1800) 59#define OMAP3430_ISP_CSI2A_REGS1_BASE (OMAP3430_ISP_BASE + 0x1800)
60#define OMAP3430_ISP_CSI2PHY_BASE (OMAP3430_ISP_BASE + 0x1970) 60#define OMAP3430_ISP_CSIPHY2_BASE (OMAP3430_ISP_BASE + 0x1970)
61#define OMAP3630_ISP_CSI2A_REGS2_BASE (OMAP3430_ISP_BASE + 0x19C0)
62#define OMAP3630_ISP_CSI2C_REGS1_BASE (OMAP3430_ISP_BASE + 0x1C00)
63#define OMAP3630_ISP_CSIPHY1_BASE (OMAP3430_ISP_BASE + 0x1D70)
64#define OMAP3630_ISP_CSI2C_REGS2_BASE (OMAP3430_ISP_BASE + 0x1DC0)
61 65
62#define OMAP3430_ISP_END (OMAP3430_ISP_BASE + 0x06F) 66#define OMAP3430_ISP_END (OMAP3430_ISP_BASE + 0x06F)
63#define OMAP3430_ISP_CBUFF_END (OMAP3430_ISP_CBUFF_BASE + 0x077) 67#define OMAP3430_ISP_CBUFF_END (OMAP3430_ISP_CBUFF_BASE + 0x077)
@@ -69,8 +73,12 @@
69#define OMAP3430_ISP_RESZ_END (OMAP3430_ISP_RESZ_BASE + 0x0AB) 73#define OMAP3430_ISP_RESZ_END (OMAP3430_ISP_RESZ_BASE + 0x0AB)
70#define OMAP3430_ISP_SBL_END (OMAP3430_ISP_SBL_BASE + 0x0FB) 74#define OMAP3430_ISP_SBL_END (OMAP3430_ISP_SBL_BASE + 0x0FB)
71#define OMAP3430_ISP_MMU_END (OMAP3430_ISP_MMU_BASE + 0x06F) 75#define OMAP3430_ISP_MMU_END (OMAP3430_ISP_MMU_BASE + 0x06F)
72#define OMAP3430_ISP_CSI2A_END (OMAP3430_ISP_CSI2A_BASE + 0x16F) 76#define OMAP3430_ISP_CSI2A_REGS1_END (OMAP3430_ISP_CSI2A_REGS1_BASE + 0x16F)
73#define OMAP3430_ISP_CSI2PHY_END (OMAP3430_ISP_CSI2PHY_BASE + 0x007) 77#define OMAP3430_ISP_CSIPHY2_END (OMAP3430_ISP_CSIPHY2_BASE + 0x00B)
78#define OMAP3630_ISP_CSI2A_REGS2_END (OMAP3630_ISP_CSI2A_REGS2_BASE + 0x3F)
79#define OMAP3630_ISP_CSI2C_REGS1_END (OMAP3630_ISP_CSI2C_REGS1_BASE + 0x16F)
80#define OMAP3630_ISP_CSIPHY1_END (OMAP3630_ISP_CSIPHY1_BASE + 0x00B)
81#define OMAP3630_ISP_CSI2C_REGS2_END (OMAP3630_ISP_CSI2C_REGS2_BASE + 0x3F)
74 82
75#define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000) 83#define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000)
76#define OMAP34XX_USBTLL_BASE (L4_34XX_BASE + 0x62000) 84#define OMAP34XX_USBTLL_BASE (L4_34XX_BASE + 0x62000)
diff --git a/arch/arm/plat-versatile/Kconfig b/arch/arm/plat-versatile/Kconfig
new file mode 100644
index 000000000000..52353beb369d
--- /dev/null
+++ b/arch/arm/plat-versatile/Kconfig
@@ -0,0 +1,17 @@
1if PLAT_VERSATILE
2
3config PLAT_VERSATILE_CLCD
4 bool
5
6config PLAT_VERSATILE_FPGA_IRQ
7 bool
8
9config PLAT_VERSATILE_LEDS
10 def_bool y if LEDS_CLASS
11 depends on ARCH_REALVIEW || ARCH_VERSATILE
12
13config PLAT_VERSATILE_SCHED_CLOCK
14 def_bool y if !ARCH_INTEGRATOR_AP
15 select HAVE_SCHED_CLOCK
16
17endif
diff --git a/arch/arm/plat-versatile/Makefile b/arch/arm/plat-versatile/Makefile
index 16dde0819934..69714db47c33 100644
--- a/arch/arm/plat-versatile/Makefile
+++ b/arch/arm/plat-versatile/Makefile
@@ -1,8 +1,7 @@
1obj-y := clock.o 1obj-y := clock.o
2ifneq ($(CONFIG_ARCH_INTEGRATOR),y) 2obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
3obj-y += sched-clock.o 3obj-$(CONFIG_PLAT_VERSATILE_CLCD) += clcd.o
4endif 4obj-$(CONFIG_PLAT_VERSATILE_FPGA_IRQ) += fpga-irq.o
5ifeq ($(CONFIG_LEDS_CLASS),y) 5obj-$(CONFIG_PLAT_VERSATILE_LEDS) += leds.o
6obj-$(CONFIG_ARCH_REALVIEW) += leds.o 6obj-$(CONFIG_PLAT_VERSATILE_SCHED_CLOCK) += sched-clock.o
7obj-$(CONFIG_ARCH_VERSATILE) += leds.o 7obj-$(CONFIG_SMP) += headsmp.o platsmp.o
8endif
diff --git a/arch/arm/plat-versatile/clcd.c b/arch/arm/plat-versatile/clcd.c
new file mode 100644
index 000000000000..6628cc27efc5
--- /dev/null
+++ b/arch/arm/plat-versatile/clcd.c
@@ -0,0 +1,182 @@
1#include <linux/device.h>
2#include <linux/dma-mapping.h>
3#include <linux/amba/bus.h>
4#include <linux/amba/clcd.h>
5#include <plat/clcd.h>
6
7static struct clcd_panel vga = {
8 .mode = {
9 .name = "VGA",
10 .refresh = 60,
11 .xres = 640,
12 .yres = 480,
13 .pixclock = 39721,
14 .left_margin = 40,
15 .right_margin = 24,
16 .upper_margin = 32,
17 .lower_margin = 11,
18 .hsync_len = 96,
19 .vsync_len = 2,
20 .sync = 0,
21 .vmode = FB_VMODE_NONINTERLACED,
22 },
23 .width = -1,
24 .height = -1,
25 .tim2 = TIM2_BCD | TIM2_IPC,
26 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
27 .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888,
28 .bpp = 16,
29};
30
31static struct clcd_panel xvga = {
32 .mode = {
33 .name = "XVGA",
34 .refresh = 60,
35 .xres = 1024,
36 .yres = 768,
37 .pixclock = 15748,
38 .left_margin = 152,
39 .right_margin = 48,
40 .upper_margin = 23,
41 .lower_margin = 3,
42 .hsync_len = 104,
43 .vsync_len = 4,
44 .sync = 0,
45 .vmode = FB_VMODE_NONINTERLACED,
46 },
47 .width = -1,
48 .height = -1,
49 .tim2 = TIM2_BCD | TIM2_IPC,
50 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
51 .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888,
52 .bpp = 16,
53};
54
55/* Sanyo TM38QV67A02A - 3.8 inch QVGA (320x240) Color TFT */
56static struct clcd_panel sanyo_tm38qv67a02a = {
57 .mode = {
58 .name = "Sanyo TM38QV67A02A",
59 .refresh = 116,
60 .xres = 320,
61 .yres = 240,
62 .pixclock = 100000,
63 .left_margin = 6,
64 .right_margin = 6,
65 .upper_margin = 5,
66 .lower_margin = 5,
67 .hsync_len = 6,
68 .vsync_len = 6,
69 .sync = 0,
70 .vmode = FB_VMODE_NONINTERLACED,
71 },
72 .width = -1,
73 .height = -1,
74 .tim2 = TIM2_BCD,
75 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
76 .caps = CLCD_CAP_5551,
77 .bpp = 16,
78};
79
80static struct clcd_panel sanyo_2_5_in = {
81 .mode = {
82 .name = "Sanyo QVGA Portrait",
83 .refresh = 116,
84 .xres = 240,
85 .yres = 320,
86 .pixclock = 100000,
87 .left_margin = 20,
88 .right_margin = 10,
89 .upper_margin = 2,
90 .lower_margin = 2,
91 .hsync_len = 10,
92 .vsync_len = 2,
93 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
94 .vmode = FB_VMODE_NONINTERLACED,
95 },
96 .width = -1,
97 .height = -1,
98 .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC,
99 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
100 .caps = CLCD_CAP_5551,
101 .bpp = 16,
102};
103
104/* Epson L2F50113T00 - 2.2 inch 176x220 Color TFT */
105static struct clcd_panel epson_l2f50113t00 = {
106 .mode = {
107 .name = "Epson L2F50113T00",
108 .refresh = 390,
109 .xres = 176,
110 .yres = 220,
111 .pixclock = 62500,
112 .left_margin = 3,
113 .right_margin = 2,
114 .upper_margin = 1,
115 .lower_margin = 0,
116 .hsync_len = 3,
117 .vsync_len = 2,
118 .sync = 0,
119 .vmode = FB_VMODE_NONINTERLACED,
120 },
121 .width = -1,
122 .height = -1,
123 .tim2 = TIM2_BCD | TIM2_IPC,
124 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
125 .caps = CLCD_CAP_5551,
126 .bpp = 16,
127};
128
129static struct clcd_panel *panels[] = {
130 &vga,
131 &xvga,
132 &sanyo_tm38qv67a02a,
133 &sanyo_2_5_in,
134 &epson_l2f50113t00,
135};
136
137struct clcd_panel *versatile_clcd_get_panel(const char *name)
138{
139 int i;
140
141 for (i = 0; i < ARRAY_SIZE(panels); i++)
142 if (strcmp(panels[i]->mode.name, name) == 0)
143 break;
144
145 if (i < ARRAY_SIZE(panels))
146 return panels[i];
147
148 pr_err("CLCD: couldn't get parameters for panel %s\n", name);
149
150 return NULL;
151}
152
153int versatile_clcd_setup_dma(struct clcd_fb *fb, unsigned long framesize)
154{
155 dma_addr_t dma;
156
157 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
158 &dma, GFP_KERNEL);
159 if (!fb->fb.screen_base) {
160 pr_err("CLCD: unable to map framebuffer\n");
161 return -ENOMEM;
162 }
163
164 fb->fb.fix.smem_start = dma;
165 fb->fb.fix.smem_len = framesize;
166
167 return 0;
168}
169
170int versatile_clcd_mmap_dma(struct clcd_fb *fb, struct vm_area_struct *vma)
171{
172 return dma_mmap_writecombine(&fb->dev->dev, vma,
173 fb->fb.screen_base,
174 fb->fb.fix.smem_start,
175 fb->fb.fix.smem_len);
176}
177
178void versatile_clcd_remove_dma(struct clcd_fb *fb)
179{
180 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
181 fb->fb.screen_base, fb->fb.fix.smem_start);
182}
diff --git a/arch/arm/plat-versatile/fpga-irq.c b/arch/arm/plat-versatile/fpga-irq.c
new file mode 100644
index 000000000000..31d945d37e4f
--- /dev/null
+++ b/arch/arm/plat-versatile/fpga-irq.c
@@ -0,0 +1,72 @@
1/*
2 * Support for Versatile FPGA-based IRQ controllers
3 */
4#include <linux/irq.h>
5#include <linux/io.h>
6
7#include <asm/mach/irq.h>
8#include <plat/fpga-irq.h>
9
10#define IRQ_STATUS 0x00
11#define IRQ_RAW_STATUS 0x04
12#define IRQ_ENABLE_SET 0x08
13#define IRQ_ENABLE_CLEAR 0x0c
14
15static void fpga_irq_mask(struct irq_data *d)
16{
17 struct fpga_irq_data *f = irq_data_get_irq_chip_data(d);
18 u32 mask = 1 << (d->irq - f->irq_start);
19
20 writel(mask, f->base + IRQ_ENABLE_CLEAR);
21}
22
23static void fpga_irq_unmask(struct irq_data *d)
24{
25 struct fpga_irq_data *f = irq_data_get_irq_chip_data(d);
26 u32 mask = 1 << (d->irq - f->irq_start);
27
28 writel(mask, f->base + IRQ_ENABLE_SET);
29}
30
31static void fpga_irq_handle(unsigned int irq, struct irq_desc *desc)
32{
33 struct fpga_irq_data *f = get_irq_desc_data(desc);
34 u32 status = readl(f->base + IRQ_STATUS);
35
36 if (status == 0) {
37 do_bad_IRQ(irq, desc);
38 return;
39 }
40
41 do {
42 irq = ffs(status) - 1;
43 status &= ~(1 << irq);
44
45 generic_handle_irq(irq + f->irq_start);
46 } while (status);
47}
48
49void __init fpga_irq_init(int parent_irq, u32 valid, struct fpga_irq_data *f)
50{
51 unsigned int i;
52
53 f->chip.irq_ack = fpga_irq_mask;
54 f->chip.irq_mask = fpga_irq_mask;
55 f->chip.irq_unmask = fpga_irq_unmask;
56
57 if (parent_irq != -1) {
58 set_irq_data(parent_irq, f);
59 set_irq_chained_handler(parent_irq, fpga_irq_handle);
60 }
61
62 for (i = 0; i < 32; i++) {
63 if (valid & (1 << i)) {
64 unsigned int irq = f->irq_start + i;
65
66 set_irq_chip_data(irq, f);
67 set_irq_chip(irq, &f->chip);
68 set_irq_handler(irq, handle_level_irq);
69 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
70 }
71 }
72}
diff --git a/arch/arm/mach-vexpress/headsmp.S b/arch/arm/plat-versatile/headsmp.S
index 7a3f0632947c..d397a1fb2f54 100644
--- a/arch/arm/mach-vexpress/headsmp.S
+++ b/arch/arm/plat-versatile/headsmp.S
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-vexpress/headsmp.S 2 * linux/arch/arm/plat-versatile/headsmp.S
3 * 3 *
4 * Copyright (c) 2003 ARM Limited 4 * Copyright (c) 2003 ARM Limited
5 * All Rights Reserved 5 * All Rights Reserved
@@ -14,11 +14,11 @@
14 __INIT 14 __INIT
15 15
16/* 16/*
17 * Versatile Express specific entry point for secondary CPUs. This 17 * Realview/Versatile Express specific entry point for secondary CPUs.
18 * provides a "holding pen" into which all secondary cores are held 18 * This provides a "holding pen" into which all secondary cores are held
19 * until we're ready for them to initialise. 19 * until we're ready for them to initialise.
20 */ 20 */
21ENTRY(vexpress_secondary_startup) 21ENTRY(versatile_secondary_startup)
22 mrc p15, 0, r0, c0, c0, 5 22 mrc p15, 0, r0, c0, c0, 5
23 and r0, r0, #15 23 and r0, r0, #15
24 adr r4, 1f 24 adr r4, 1f
diff --git a/arch/arm/plat-versatile/include/plat/clcd.h b/arch/arm/plat-versatile/include/plat/clcd.h
new file mode 100644
index 000000000000..6bb6a1d2019b
--- /dev/null
+++ b/arch/arm/plat-versatile/include/plat/clcd.h
@@ -0,0 +1,9 @@
1#ifndef PLAT_CLCD_H
2#define PLAT_CLCD_H
3
4struct clcd_panel *versatile_clcd_get_panel(const char *);
5int versatile_clcd_setup_dma(struct clcd_fb *, unsigned long);
6int versatile_clcd_mmap_dma(struct clcd_fb *, struct vm_area_struct *);
7void versatile_clcd_remove_dma(struct clcd_fb *);
8
9#endif
diff --git a/arch/arm/plat-versatile/include/plat/fpga-irq.h b/arch/arm/plat-versatile/include/plat/fpga-irq.h
new file mode 100644
index 000000000000..627fafd1e595
--- /dev/null
+++ b/arch/arm/plat-versatile/include/plat/fpga-irq.h
@@ -0,0 +1,12 @@
1#ifndef PLAT_FPGA_IRQ_H
2#define PLAT_FPGA_IRQ_H
3
4struct fpga_irq_data {
5 void __iomem *base;
6 unsigned int irq_start;
7 struct irq_chip chip;
8};
9
10void fpga_irq_init(int, u32, struct fpga_irq_data *);
11
12#endif
diff --git a/arch/arm/mach-vexpress/localtimer.c b/arch/arm/plat-versatile/localtimer.c
index c0e3a59a0bfc..0fb3961999b5 100644
--- a/arch/arm/mach-vexpress/localtimer.c
+++ b/arch/arm/plat-versatile/localtimer.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-vexpress/localtimer.c 2 * linux/arch/arm/plat-versatile/localtimer.c
3 * 3 *
4 * Copyright (C) 2002 ARM Ltd. 4 * Copyright (C) 2002 ARM Ltd.
5 * All Rights Reserved 5 * All Rights Reserved
@@ -19,8 +19,9 @@
19/* 19/*
20 * Setup the local clock events for a CPU. 20 * Setup the local clock events for a CPU.
21 */ 21 */
22void __cpuinit local_timer_setup(struct clock_event_device *evt) 22int __cpuinit local_timer_setup(struct clock_event_device *evt)
23{ 23{
24 evt->irq = IRQ_LOCALTIMER; 24 evt->irq = IRQ_LOCALTIMER;
25 twd_timer_setup(evt); 25 twd_timer_setup(evt);
26 return 0;
26} 27}
diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c
new file mode 100644
index 000000000000..ba3d471d4bcf
--- /dev/null
+++ b/arch/arm/plat-versatile/platsmp.c
@@ -0,0 +1,104 @@
1/*
2 * linux/arch/arm/plat-versatile/platsmp.c
3 *
4 * Copyright (C) 2002 ARM Ltd.
5 * All Rights Reserved
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/init.h>
12#include <linux/errno.h>
13#include <linux/delay.h>
14#include <linux/device.h>
15#include <linux/jiffies.h>
16#include <linux/smp.h>
17
18#include <asm/cacheflush.h>
19
20/*
21 * control for which core is the next to come out of the secondary
22 * boot "holding pen"
23 */
24volatile int __cpuinitdata pen_release = -1;
25
26/*
27 * Write pen_release in a way that is guaranteed to be visible to all
28 * observers, irrespective of whether they're taking part in coherency
29 * or not. This is necessary for the hotplug code to work reliably.
30 */
31static void __cpuinit write_pen_release(int val)
32{
33 pen_release = val;
34 smp_wmb();
35 __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
36 outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
37}
38
39static DEFINE_SPINLOCK(boot_lock);
40
41void __cpuinit platform_secondary_init(unsigned int cpu)
42{
43 /*
44 * if any interrupts are already enabled for the primary
45 * core (e.g. timer irq), then they will not have been enabled
46 * for us: do so
47 */
48 gic_secondary_init(0);
49
50 /*
51 * let the primary processor know we're out of the
52 * pen, then head off into the C entry point
53 */
54 write_pen_release(-1);
55
56 /*
57 * Synchronise with the boot thread.
58 */
59 spin_lock(&boot_lock);
60 spin_unlock(&boot_lock);
61}
62
63int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
64{
65 unsigned long timeout;
66
67 /*
68 * Set synchronisation state between this boot processor
69 * and the secondary one
70 */
71 spin_lock(&boot_lock);
72
73 /*
74 * This is really belt and braces; we hold unintended secondary
75 * CPUs in the holding pen until we're ready for them. However,
76 * since we haven't sent them a soft interrupt, they shouldn't
77 * be there.
78 */
79 write_pen_release(cpu);
80
81 /*
82 * Send the secondary CPU a soft interrupt, thereby causing
83 * the boot monitor to read the system wide flags register,
84 * and branch to the address found there.
85 */
86 smp_cross_call(cpumask_of(cpu), 1);
87
88 timeout = jiffies + (1 * HZ);
89 while (time_before(jiffies, timeout)) {
90 smp_rmb();
91 if (pen_release == -1)
92 break;
93
94 udelay(10);
95 }
96
97 /*
98 * now the secondary core is starting up let it run its
99 * calibrations, then wait for it to finish
100 */
101 spin_unlock(&boot_lock);
102
103 return pen_release != -1 ? -ENOSYS : 0;
104}
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 9d6feaabbe7d..7ca41f0a09b1 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,2745 +12,458 @@
12# 12#
13# http://www.arm.linux.org.uk/developer/machines/?action=new 13# http://www.arm.linux.org.uk/developer/machines/?action=new
14# 14#
15# Last update: Mon Feb 7 08:59:27 2011 15# XXX: This is a cut-down version of the file; it contains only machines that
16# XXX: are in mainline or have been submitted to the machine database within
17# XXX: the last 12 months. If your entry is missing please email rmk at
18# XXX: <linux@arm.linux.org.uk>
19#
20# Last update: Sun Mar 20 18:06:11 2011
16# 21#
17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 22# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
18# 23#
19ebsa110 ARCH_EBSA110 EBSA110 0 24ebsa110 ARCH_EBSA110 EBSA110 0
20riscpc ARCH_RPC RISCPC 1 25riscpc ARCH_RPC RISCPC 1
21nexuspci ARCH_NEXUSPCI NEXUSPCI 3
22ebsa285 ARCH_EBSA285 EBSA285 4 26ebsa285 ARCH_EBSA285 EBSA285 4
23netwinder ARCH_NETWINDER NETWINDER 5 27netwinder ARCH_NETWINDER NETWINDER 5
24cats ARCH_CATS CATS 6 28cats ARCH_CATS CATS 6
25tbox ARCH_TBOX TBOX 7
26co285 ARCH_CO285 CO285 8
27clps7110 ARCH_CLPS7110 CLPS7110 9
28archimedes ARCH_ARC ARCHIMEDES 10
29a5k ARCH_A5K A5K 11
30etoile ARCH_ETOILE ETOILE 12
31lacie_nas ARCH_LACIE_NAS LACIE_NAS 13
32clps7500 ARCH_CLPS7500 CLPS7500 14
33shark ARCH_SHARK SHARK 15 29shark ARCH_SHARK SHARK 15
34brutus SA1100_BRUTUS BRUTUS 16 30brutus SA1100_BRUTUS BRUTUS 16
35personal_server ARCH_PERSONAL_SERVER PERSONAL_SERVER 17 31personal_server ARCH_PERSONAL_SERVER PERSONAL_SERVER 17
36itsy SA1100_ITSY ITSY 18
37l7200 ARCH_L7200 L7200 19 32l7200 ARCH_L7200 L7200 19
38pleb SA1100_PLEB PLEB 20 33pleb SA1100_PLEB PLEB 20
39integrator ARCH_INTEGRATOR INTEGRATOR 21 34integrator ARCH_INTEGRATOR INTEGRATOR 21
40h3600 SA1100_H3600 H3600 22 35h3600 SA1100_H3600 H3600 22
41ixp1200 ARCH_IXP1200 IXP1200 23
42p720t ARCH_P720T P720T 24 36p720t ARCH_P720T P720T 24
43assabet SA1100_ASSABET ASSABET 25 37assabet SA1100_ASSABET ASSABET 25
44victor SA1100_VICTOR VICTOR 26
45lart SA1100_LART LART 27 38lart SA1100_LART LART 27
46ranger SA1100_RANGER RANGER 28
47graphicsclient SA1100_GRAPHICSCLIENT GRAPHICSCLIENT 29 39graphicsclient SA1100_GRAPHICSCLIENT GRAPHICSCLIENT 29
48xp860 SA1100_XP860 XP860 30 40xp860 SA1100_XP860 XP860 30
49cerf SA1100_CERF CERF 31 41cerf SA1100_CERF CERF 31
50nanoengine SA1100_NANOENGINE NANOENGINE 32 42nanoengine SA1100_NANOENGINE NANOENGINE 32
51fpic SA1100_FPIC FPIC 33
52extenex1 SA1100_EXTENEX1 EXTENEX1 34
53sherman SA1100_SHERMAN SHERMAN 35
54accelent_sa SA1100_ACCELENT ACCELENT_SA 36
55accelent_l7200 ARCH_L7200_ACCELENT ACCELENT_L7200 37
56netport SA1100_NETPORT NETPORT 38
57pangolin SA1100_PANGOLIN PANGOLIN 39
58yopy SA1100_YOPY YOPY 40
59coolidge SA1100_COOLIDGE COOLIDGE 41
60huw_webpanel SA1100_HUW_WEBPANEL HUW_WEBPANEL 42
61spotme ARCH_SPOTME SPOTME 43
62freebird ARCH_FREEBIRD FREEBIRD 44
63ti925 ARCH_TI925 TI925 45
64riscstation ARCH_RISCSTATION RISCSTATION 46
65cavy SA1100_CAVY CAVY 47
66jornada720 SA1100_JORNADA720 JORNADA720 48 43jornada720 SA1100_JORNADA720 JORNADA720 48
67omnimeter SA1100_OMNIMETER OMNIMETER 49
68edb7211 ARCH_EDB7211 EDB7211 50 44edb7211 ARCH_EDB7211 EDB7211 50
69citygo SA1100_CITYGO CITYGO 51
70pfs168 SA1100_PFS168 PFS168 52 45pfs168 SA1100_PFS168 PFS168 52
71spot SA1100_SPOT SPOT 53
72flexanet SA1100_FLEXANET FLEXANET 54 46flexanet SA1100_FLEXANET FLEXANET 54
73webpal ARCH_WEBPAL WEBPAL 55
74linpda SA1100_LINPDA LINPDA 56
75anakin ARCH_ANAKIN ANAKIN 57
76mvi SA1100_MVI MVI 58
77jupiter SA1100_JUPITER JUPITER 59
78psionw ARCH_PSIONW PSIONW 60
79aln SA1100_ALN ALN 61
80epxa ARCH_CAMELOT CAMELOT 62
81gds2200 SA1100_GDS2200 GDS2200 63
82netbook SA1100_PSION_SERIES7 PSION_SERIES7 64
83xfile SA1100_XFILE XFILE 65
84accelent_ep9312 ARCH_ACCELENT_EP9312 ACCELENT_EP9312 66
85ic200 ARCH_IC200 IC200 67
86creditlart SA1100_CREDITLART CREDITLART 68
87htm SA1100_HTM HTM 69
88iq80310 ARCH_IQ80310 IQ80310 70
89freebot SA1100_FREEBOT FREEBOT 71
90entel ARCH_ENTEL ENTEL 72
91enp3510 ARCH_ENP3510 ENP3510 73
92trizeps SA1100_TRIZEPS TRIZEPS 74
93nesa SA1100_NESA NESA 75
94venus ARCH_VENUS VENUS 76
95tardis ARCH_TARDIS TARDIS 77
96mercury ARCH_MERCURY MERCURY 78
97empeg SA1100_EMPEG EMPEG 79
98adi_evb ARCH_I80200FCC I80200FCC 80
99itt_cpb SA1100_ITT_CPB ITT_CPB 81
100svc SA1100_SVC SVC 82
101alpha2 SA1100_ALPHA2 ALPHA2 84
102alpha1 SA1100_ALPHA1 ALPHA1 85
103netarm ARCH_NETARM NETARM 86
104simpad SA1100_SIMPAD SIMPAD 87 47simpad SA1100_SIMPAD SIMPAD 87
105pda1 ARCH_PDA1 PDA1 88
106lubbock ARCH_LUBBOCK LUBBOCK 89 48lubbock ARCH_LUBBOCK LUBBOCK 89
107aniko ARCH_ANIKO ANIKO 90
108clep7212 ARCH_CLEP7212 CLEP7212 91 49clep7212 ARCH_CLEP7212 CLEP7212 91
109cs89712 ARCH_CS89712 CS89712 92
110weararm SA1100_WEARARM WEARARM 93
111possio_px SA1100_POSSIO_PX POSSIO_PX 94
112sidearm SA1100_SIDEARM SIDEARM 95
113stork SA1100_STORK STORK 96
114shannon SA1100_SHANNON SHANNON 97 50shannon SA1100_SHANNON SHANNON 97
115ace ARCH_ACE ACE 98
116ballyarm SA1100_BALLYARM BALLYARM 99
117simputer SA1100_SIMPUTER SIMPUTER 100
118nexterm SA1100_NEXTERM NEXTERM 101
119sa1100_elf SA1100_SA1100_ELF SA1100_ELF 102
120gator SA1100_GATOR GATOR 103
121granite ARCH_GRANITE GRANITE 104
122consus SA1100_CONSUS CONSUS 105 51consus SA1100_CONSUS CONSUS 105
123aaed2000 ARCH_AAED2000 AAED2000 106 52aaed2000 ARCH_AAED2000 AAED2000 106
124cdb89712 ARCH_CDB89712 CDB89712 107 53cdb89712 ARCH_CDB89712 CDB89712 107
125graphicsmaster SA1100_GRAPHICSMASTER GRAPHICSMASTER 108 54graphicsmaster SA1100_GRAPHICSMASTER GRAPHICSMASTER 108
126adsbitsy SA1100_ADSBITSY ADSBITSY 109 55adsbitsy SA1100_ADSBITSY ADSBITSY 109
127pxa_idp ARCH_PXA_IDP PXA_IDP 110 56pxa_idp ARCH_PXA_IDP PXA_IDP 110
128plce ARCH_PLCE PLCE 111
129pt_system3 SA1100_PT_SYSTEM3 PT_SYSTEM3 112 57pt_system3 SA1100_PT_SYSTEM3 PT_SYSTEM3 112
130murphy ARCH_MEDALB MEDALB 113
131eagle ARCH_EAGLE EAGLE 114
132dsc21 ARCH_DSC21 DSC21 115
133dsc24 ARCH_DSC24 DSC24 116
134ti5472 ARCH_TI5472 TI5472 117
135autcpu12 ARCH_AUTCPU12 AUTCPU12 118 58autcpu12 ARCH_AUTCPU12 AUTCPU12 118
136uengine ARCH_UENGINE UENGINE 119
137bluestem SA1100_BLUESTEM BLUESTEM 120
138xingu8 ARCH_XINGU8 XINGU8 121
139bushstb ARCH_BUSHSTB BUSHSTB 122
140epsilon1 SA1100_EPSILON1 EPSILON1 123
141balloon SA1100_BALLOON BALLOON 124
142puppy ARCH_PUPPY PUPPY 125
143elroy SA1100_ELROY ELROY 126
144gms720 ARCH_GMS720 GMS720 127
145s24x ARCH_S24X S24X 128
146jtel_clep7312 ARCH_JTEL_CLEP7312 JTEL_CLEP7312 129
147cx821xx ARCH_CX821XX CX821XX 130
148edb7312 ARCH_EDB7312 EDB7312 131
149bsa1110 SA1100_BSA1110 BSA1110 132
150powerpin ARCH_POWERPIN POWERPIN 133
151openarm ARCH_OPENARM OPENARM 134
152whitechapel SA1100_WHITECHAPEL WHITECHAPEL 135
153h3100 SA1100_H3100 H3100 136 59h3100 SA1100_H3100 H3100 136
154h3800 SA1100_H3800 H3800 137
155blue_v1 ARCH_BLUE_V1 BLUE_V1 138
156pxa_cerf ARCH_PXA_CERF PXA_CERF 139
157arm7tevb ARCH_ARM7TEVB ARM7TEVB 140
158d7400 SA1100_D7400 D7400 141
159piranha ARCH_PIRANHA PIRANHA 142
160sbcamelot SA1100_SBCAMELOT SBCAMELOT 143
161kings SA1100_KINGS KINGS 144
162smdk2400 ARCH_SMDK2400 SMDK2400 145
163collie SA1100_COLLIE COLLIE 146 60collie SA1100_COLLIE COLLIE 146
164idr ARCH_IDR IDR 147
165badge4 SA1100_BADGE4 BADGE4 148 61badge4 SA1100_BADGE4 BADGE4 148
166webnet ARCH_WEBNET WEBNET 149
167d7300 SA1100_D7300 D7300 150
168cep SA1100_CEP CEP 151
169fortunet ARCH_FORTUNET FORTUNET 152 62fortunet ARCH_FORTUNET FORTUNET 152
170vc547x ARCH_VC547X VC547X 153
171filewalker SA1100_FILEWALKER FILEWALKER 154
172netgateway SA1100_NETGATEWAY NETGATEWAY 155
173symbol2800 SA1100_SYMBOL2800 SYMBOL2800 156
174suns SA1100_SUNS SUNS 157
175frodo SA1100_FRODO FRODO 158
176ms301 SA1100_MACH_TYTE_MS301 MACH_TYTE_MS301 159
177mx1ads ARCH_MX1ADS MX1ADS 160 63mx1ads ARCH_MX1ADS MX1ADS 160
178h7201 ARCH_H7201 H7201 161 64h7201 ARCH_H7201 H7201 161
179h7202 ARCH_H7202 H7202 162 65h7202 ARCH_H7202 H7202 162
180amico ARCH_AMICO AMICO 163
181iam SA1100_IAM IAM 164
182tt530 SA1100_TT530 TT530 165
183sam2400 ARCH_SAM2400 SAM2400 166
184jornada56x SA1100_JORNADA56X JORNADA56X 167
185active SA1100_ACTIVE ACTIVE 168
186iq80321 ARCH_IQ80321 IQ80321 169 66iq80321 ARCH_IQ80321 IQ80321 169
187wid SA1100_WID WID 170
188sabinal ARCH_SABINAL SABINAL 171
189ixp425_matacumbe ARCH_IXP425_MATACUMBE IXP425_MATACUMBE 172
190miniprint SA1100_MINIPRINT MINIPRINT 173
191adm510x ARCH_ADM510X ADM510X 174
192svs200 SA1100_SVS200 SVS200 175
193atg_tcu ARCH_ATG_TCU ATG_TCU 176
194jornada820 SA1100_JORNADA820 JORNADA820 177
195s3c44b0 ARCH_S3C44B0 S3C44B0 178
196margis2 ARCH_MARGIS2 MARGIS2 179
197ks8695 ARCH_KS8695 KS8695 180 67ks8695 ARCH_KS8695 KS8695 180
198brh ARCH_BRH BRH 181
199s3c2410 ARCH_S3C2410 S3C2410 182
200possio_px30 ARCH_POSSIO_PX30 POSSIO_PX30 183
201s3c2800 ARCH_S3C2800 S3C2800 184
202fleetwood SA1100_FLEETWOOD FLEETWOOD 185
203omaha ARCH_OMAHA OMAHA 186
204ta7 ARCH_TA7 TA7 187
205nova SA1100_NOVA NOVA 188
206hmk ARCH_HMK HMK 189
207karo ARCH_KARO KARO 190
208fester SA1100_FESTER FESTER 191
209gpi ARCH_GPI GPI 192
210smdk2410 ARCH_SMDK2410 SMDK2410 193 68smdk2410 ARCH_SMDK2410 SMDK2410 193
211i519 ARCH_I519 I519 194
212nexio SA1100_NEXIO NEXIO 195
213bitbox SA1100_BITBOX BITBOX 196
214g200 SA1100_G200 G200 197
215gill SA1100_GILL GILL 198
216pxa_mercury ARCH_PXA_MERCURY PXA_MERCURY 199
217ceiva ARCH_CEIVA CEIVA 200 69ceiva ARCH_CEIVA CEIVA 200
218fret SA1100_FRET FRET 201
219emailphone SA1100_EMAILPHONE EMAILPHONE 202
220h3900 ARCH_H3900 H3900 203
221pxa1 ARCH_PXA1 PXA1 204
222koan369 SA1100_KOAN369 KOAN369 205
223cogent ARCH_COGENT COGENT 206
224esl_simputer ARCH_ESL_SIMPUTER ESL_SIMPUTER 207
225esl_simputer_clr ARCH_ESL_SIMPUTER_CLR ESL_SIMPUTER_CLR 208
226esl_simputer_bw ARCH_ESL_SIMPUTER_BW ESL_SIMPUTER_BW 209
227hhp_cradle ARCH_HHP_CRADLE HHP_CRADLE 210
228he500 ARCH_HE500 HE500 211
229inhandelf2 SA1100_INHANDELF2 INHANDELF2 212
230inhandftip SA1100_INHANDFTIP INHANDFTIP 213
231dnp1110 SA1100_DNP1110 DNP1110 214
232pnp1110 SA1100_PNP1110 PNP1110 215
233csb226 ARCH_CSB226 CSB226 216
234arnold SA1100_ARNOLD ARNOLD 217
235voiceblue MACH_VOICEBLUE VOICEBLUE 218 70voiceblue MACH_VOICEBLUE VOICEBLUE 218
236jz8028 ARCH_JZ8028 JZ8028 219
237h5400 ARCH_H5400 H5400 220 71h5400 ARCH_H5400 H5400 220
238forte SA1100_FORTE FORTE 221
239acam SA1100_ACAM ACAM 222
240abox SA1100_ABOX ABOX 223
241atmel ARCH_ATMEL ATMEL 224
242sitsang ARCH_SITSANG SITSANG 225
243cpu1110lcdnet SA1100_CPU1110LCDNET CPU1110LCDNET 226
244mpl_vcma9 ARCH_MPL_VCMA9 MPL_VCMA9 227
245opus_a1 ARCH_OPUS_A1 OPUS_A1 228
246daytona ARCH_DAYTONA DAYTONA 229
247killbear SA1100_KILLBEAR KILLBEAR 230
248yoho ARCH_YOHO YOHO 231
249jasper ARCH_JASPER JASPER 232
250dsc25 ARCH_DSC25 DSC25 233
251omap_innovator MACH_OMAP_INNOVATOR OMAP_INNOVATOR 234 72omap_innovator MACH_OMAP_INNOVATOR OMAP_INNOVATOR 234
252mnci ARCH_RAMSES RAMSES 235
253s28x ARCH_S28X S28X 236
254mport3 ARCH_MPORT3 MPORT3 237
255pxa_eagle250 ARCH_PXA_EAGLE250 PXA_EAGLE250 238
256pdb ARCH_PDB PDB 239
257blue_2g SA1100_BLUE_2G BLUE_2G 240
258bluearch SA1100_BLUEARCH BLUEARCH 241
259ixdp2400 ARCH_IXDP2400 IXDP2400 242 73ixdp2400 ARCH_IXDP2400 IXDP2400 242
260ixdp2800 ARCH_IXDP2800 IXDP2800 243 74ixdp2800 ARCH_IXDP2800 IXDP2800 243
261explorer SA1100_EXPLORER EXPLORER 244
262ixdp425 ARCH_IXDP425 IXDP425 245 75ixdp425 ARCH_IXDP425 IXDP425 245
263chimp ARCH_CHIMP CHIMP 246
264stork_nest ARCH_STORK_NEST STORK_NEST 247
265stork_egg ARCH_STORK_EGG STORK_EGG 248
266wismo SA1100_WISMO WISMO 249
267ezlinx ARCH_EZLINX EZLINX 250
268at91rm9200 ARCH_AT91RM9200 AT91RM9200 251
269adtech_orion ARCH_ADTECH_ORION ADTECH_ORION 252
270neptune ARCH_NEPTUNE NEPTUNE 253
271hackkit SA1100_HACKKIT HACKKIT 254 76hackkit SA1100_HACKKIT HACKKIT 254
272pxa_wins30 ARCH_PXA_WINS30 PXA_WINS30 255
273lavinna SA1100_LAVINNA LAVINNA 256
274pxa_uengine ARCH_PXA_UENGINE PXA_UENGINE 257
275innokom ARCH_INNOKOM INNOKOM 258
276bms ARCH_BMS BMS 259
277ixcdp1100 ARCH_IXCDP1100 IXCDP1100 260 77ixcdp1100 ARCH_IXCDP1100 IXCDP1100 260
278prpmc1100 ARCH_PRPMC1100 PRPMC1100 261
279at91rm9200dk ARCH_AT91RM9200DK AT91RM9200DK 262 78at91rm9200dk ARCH_AT91RM9200DK AT91RM9200DK 262
280armstick ARCH_ARMSTICK ARMSTICK 263
281armonie ARCH_ARMONIE ARMONIE 264
282mport1 ARCH_MPORT1 MPORT1 265
283s3c5410 ARCH_S3C5410 S3C5410 266
284zcp320a ARCH_ZCP320A ZCP320A 267
285i_box ARCH_I_BOX I_BOX 268
286stlc1502 ARCH_STLC1502 STLC1502 269
287siren ARCH_SIREN SIREN 270
288greenlake ARCH_GREENLAKE GREENLAKE 271
289argus ARCH_ARGUS ARGUS 272
290combadge SA1100_COMBADGE COMBADGE 273
291rokepxa ARCH_ROKEPXA ROKEPXA 274
292cintegrator ARCH_CINTEGRATOR CINTEGRATOR 275 79cintegrator ARCH_CINTEGRATOR CINTEGRATOR 275
293guidea07 ARCH_GUIDEA07 GUIDEA07 276
294tat257 ARCH_TAT257 TAT257 277
295igp2425 ARCH_IGP2425 IGP2425 278
296bluegrama ARCH_BLUEGRAMMA BLUEGRAMMA 279
297ipod ARCH_IPOD IPOD 280
298adsbitsyx ARCH_ADSBITSYX ADSBITSYX 281
299trizeps2 ARCH_TRIZEPS2 TRIZEPS2 282
300viper ARCH_VIPER VIPER 283 80viper ARCH_VIPER VIPER 283
301adsbitsyplus SA1100_ADSBITSYPLUS ADSBITSYPLUS 284
302adsagc SA1100_ADSAGC ADSAGC 285
303stp7312 ARCH_STP7312 STP7312 286
304nx_phnx MACH_NX_PHNX NX_PHNX 287
305wep_ep250 ARCH_WEP_EP250 WEP_EP250 288
306inhandelf3 ARCH_INHANDELF3 INHANDELF3 289
307adi_coyote ARCH_ADI_COYOTE ADI_COYOTE 290 81adi_coyote ARCH_ADI_COYOTE ADI_COYOTE 290
308iyonix ARCH_IYONIX IYONIX 291
309damicam1 ARCH_DAMICAM_SA1110 DAMICAM_SA1110 292
310meg03 ARCH_MEG03 MEG03 293
311pxa_whitechapel ARCH_PXA_WHITECHAPEL PXA_WHITECHAPEL 294
312nwsc ARCH_NWSC NWSC 295
313nwlarm ARCH_NWLARM NWLARM 296
314ixp425_mguard ARCH_IXP425_MGUARD IXP425_MGUARD 297
315pxa_netdcu4 ARCH_PXA_NETDCU4 PXA_NETDCU4 298
316ixdp2401 ARCH_IXDP2401 IXDP2401 299 82ixdp2401 ARCH_IXDP2401 IXDP2401 299
317ixdp2801 ARCH_IXDP2801 IXDP2801 300 83ixdp2801 ARCH_IXDP2801 IXDP2801 300
318zodiac ARCH_ZODIAC ZODIAC 301
319armmodul ARCH_ARMMODUL ARMMODUL 302
320ketop SA1100_KETOP KETOP 303
321av7200 ARCH_AV7200 AV7200 304
322arch_ti925 ARCH_ARCH_TI925 ARCH_TI925 305
323acq200 ARCH_ACQ200 ACQ200 306
324pt_dafit SA1100_PT_DAFIT PT_DAFIT 307
325ihba ARCH_IHBA IHBA 308
326quinque ARCH_QUINQUE QUINQUE 309
327nimbraone ARCH_NIMBRAONE NIMBRAONE 310
328nimbra29x ARCH_NIMBRA29X NIMBRA29X 311
329nimbra210 ARCH_NIMBRA210 NIMBRA210 312
330hhp_d95xx ARCH_HHP_D95XX HHP_D95XX 313
331labarm ARCH_LABARM LABARM 314
332m825xx ARCH_M825XX M825XX 315
333m7100 SA1100_M7100 M7100 316
334nipc2 ARCH_NIPC2 NIPC2 317
335fu7202 ARCH_FU7202 FU7202 318
336adsagx ARCH_ADSAGX ADSAGX 319
337pxa_pooh ARCH_PXA_POOH PXA_POOH 320
338bandon ARCH_BANDON BANDON 321
339pcm7210 ARCH_PCM7210 PCM7210 322
340nms9200 ARCH_NMS9200 NMS9200 323
341logodl ARCH_LOGODL LOGODL 324
342m7140 SA1100_M7140 M7140 325
343korebot ARCH_KOREBOT KOREBOT 326
344iq31244 ARCH_IQ31244 IQ31244 327 84iq31244 ARCH_IQ31244 IQ31244 327
345koan393 SA1100_KOAN393 KOAN393 328
346inhandftip3 ARCH_INHANDFTIP3 INHANDFTIP3 329
347gonzo ARCH_GONZO GONZO 330
348bast ARCH_BAST BAST 331 85bast ARCH_BAST BAST 331
349scanpass ARCH_SCANPASS SCANPASS 332
350ep7312_pooh ARCH_EP7312_POOH EP7312_POOH 333
351ta7s ARCH_TA7S TA7S 334
352ta7v ARCH_TA7V TA7V 335
353icarus SA1100_ICARUS ICARUS 336
354h1900 ARCH_H1900 H1900 337
355gemini SA1100_GEMINI GEMINI 338
356axim ARCH_AXIM AXIM 339
357audiotron ARCH_AUDIOTRON AUDIOTRON 340
358h2200 ARCH_H2200 H2200 341
359loox600 ARCH_LOOX600 LOOX600 342
360niop ARCH_NIOP NIOP 343
361dm310 ARCH_DM310 DM310 344
362seedpxa_c2 ARCH_SEEDPXA_C2 SEEDPXA_C2 345
363ixp4xx_mguardpci ARCH_IXP4XX_MGUARD_PCI IXP4XX_MGUARD_PCI 346
364h1940 ARCH_H1940 H1940 347 86h1940 ARCH_H1940 H1940 347
365scorpio ARCH_SCORPIO SCORPIO 348
366viva ARCH_VIVA VIVA 349
367pxa_xcard ARCH_PXA_XCARD PXA_XCARD 350
368csb335 ARCH_CSB335 CSB335 351
369ixrd425 ARCH_IXRD425 IXRD425 352
370iq80315 ARCH_IQ80315 IQ80315 353
371nmp7312 ARCH_NMP7312 NMP7312 354
372cx861xx ARCH_CX861XX CX861XX 355
373enp2611 ARCH_ENP2611 ENP2611 356 87enp2611 ARCH_ENP2611 ENP2611 356
374xda SA1100_XDA XDA 357
375csir_ims ARCH_CSIR_IMS CSIR_IMS 358
376ixp421_dnaeeth ARCH_IXP421_DNAEETH IXP421_DNAEETH 359
377pocketserv9200 ARCH_POCKETSERV9200 POCKETSERV9200 360
378toto ARCH_TOTO TOTO 361
379s3c2440 ARCH_S3C2440 S3C2440 362 88s3c2440 ARCH_S3C2440 S3C2440 362
380ks8695p ARCH_KS8695P KS8695P 363
381se4000 ARCH_SE4000 SE4000 364
382quadriceps ARCH_QUADRICEPS QUADRICEPS 365
383bronco ARCH_BRONCO BRONCO 366
384esl_wireless_tab ARCH_ESL_WIRELESS_TAB ESL_WIRELESS_TAB 367
385esl_sofcomp ARCH_ESL_SOFCOMP ESL_SOFCOMP 368
386s5c7375 ARCH_S5C7375 S5C7375 369
387spearhead ARCH_SPEARHEAD SPEARHEAD 370
388pantera ARCH_PANTERA PANTERA 371
389prayoglite ARCH_PRAYOGLITE PRAYOGLITE 372
390gumstix ARCH_GUMSTIX GUMSTIX 373 89gumstix ARCH_GUMSTIX GUMSTIX 373
391rcube ARCH_RCUBE RCUBE 374
392rea_olv ARCH_REA_OLV REA_OLV 375
393pxa_iphone ARCH_PXA_IPHONE PXA_IPHONE 376
394s3c3410 ARCH_S3C3410 S3C3410 377
395espd_4510b ARCH_ESPD_4510B ESPD_4510B 378
396mp1x ARCH_MP1X MP1X 379
397at91rm9200tb ARCH_AT91RM9200TB AT91RM9200TB 380
398adsvgx ARCH_ADSVGX ADSVGX 381
399omap_h2 MACH_OMAP_H2 OMAP_H2 382 90omap_h2 MACH_OMAP_H2 OMAP_H2 382
400pelee ARCH_PELEE PELEE 383
401e740 MACH_E740 E740 384 91e740 MACH_E740 E740 384
402iq80331 ARCH_IQ80331 IQ80331 385 92iq80331 ARCH_IQ80331 IQ80331 385
403versatile_pb ARCH_VERSATILE_PB VERSATILE_PB 387 93versatile_pb ARCH_VERSATILE_PB VERSATILE_PB 387
404kev7a400 MACH_KEV7A400 KEV7A400 388 94kev7a400 MACH_KEV7A400 KEV7A400 388
405lpd7a400 MACH_LPD7A400 LPD7A400 389 95lpd7a400 MACH_LPD7A400 LPD7A400 389
406lpd7a404 MACH_LPD7A404 LPD7A404 390 96lpd7a404 MACH_LPD7A404 LPD7A404 390
407fujitsu_camelot ARCH_FUJITSU_CAMELOT FUJITSU_CAMELOT 391
408janus2m ARCH_JANUS2M JANUS2M 392
409embtf MACH_EMBTF EMBTF 393
410hpm MACH_HPM HPM 394
411smdk2410tk MACH_SMDK2410TK SMDK2410TK 395
412smdk2410aj MACH_SMDK2410AJ SMDK2410AJ 396
413streetracer MACH_STREETRACER STREETRACER 397
414eframe MACH_EFRAME EFRAME 398
415csb337 MACH_CSB337 CSB337 399 97csb337 MACH_CSB337 CSB337 399
416pxa_lark MACH_PXA_LARK PXA_LARK 400
417pxa_pnp2110 MACH_PNP2110 PNP2110 401
418tcc72x MACH_TCC72X TCC72X 402
419altair MACH_ALTAIR ALTAIR 403
420kc3 MACH_KC3 KC3 404
421sinteftd MACH_SINTEFTD SINTEFTD 405
422mainstone MACH_MAINSTONE MAINSTONE 406 98mainstone MACH_MAINSTONE MAINSTONE 406
423aday4x MACH_ADAY4X ADAY4X 407
424lite300 MACH_LITE300 LITE300 408
425s5c7376 MACH_S5C7376 S5C7376 409
426mt02 MACH_MT02 MT02 410
427mport3s MACH_MPORT3S MPORT3S 411
428ra_alpha MACH_RA_ALPHA RA_ALPHA 412
429xcep MACH_XCEP XCEP 413 99xcep MACH_XCEP XCEP 413
430arcom_vulcan MACH_ARCOM_VULCAN ARCOM_VULCAN 414 100arcom_vulcan MACH_ARCOM_VULCAN ARCOM_VULCAN 414
431stargate MACH_STARGATE STARGATE 415
432armadilloj MACH_ARMADILLOJ ARMADILLOJ 416
433elroy_jack MACH_ELROY_JACK ELROY_JACK 417
434backend MACH_BACKEND BACKEND 418
435s5linbox MACH_S5LINBOX S5LINBOX 419
436nomadik MACH_NOMADIK NOMADIK 420 101nomadik MACH_NOMADIK NOMADIK 420
437ia_cpu_9200 MACH_IA_CPU_9200 IA_CPU_9200 421
438at91_bja1 MACH_AT91_BJA1 AT91_BJA1 422
439corgi MACH_CORGI CORGI 423 102corgi MACH_CORGI CORGI 423
440poodle MACH_POODLE POODLE 424 103poodle MACH_POODLE POODLE 424
441ten MACH_TEN TEN 425
442roverp5p MACH_ROVERP5P ROVERP5P 426
443sc2700 MACH_SC2700 SC2700 427
444ex_eagle MACH_EX_EAGLE EX_EAGLE 428
445nx_pxa12 MACH_NX_PXA12 NX_PXA12 429
446nx_pxa5 MACH_NX_PXA5 NX_PXA5 430
447blackboard2 MACH_BLACKBOARD2 BLACKBOARD2 431
448i819 MACH_I819 I819 432
449ixmb995e MACH_IXMB995E IXMB995E 433
450skyrider MACH_SKYRIDER SKYRIDER 434
451skyhawk MACH_SKYHAWK SKYHAWK 435
452enterprise MACH_ENTERPRISE ENTERPRISE 436
453dep2410 MACH_DEP2410 DEP2410 437
454armcore MACH_ARMCORE ARMCORE 438 104armcore MACH_ARMCORE ARMCORE 438
455hobbit MACH_HOBBIT HOBBIT 439
456h7210 MACH_H7210 H7210 440
457pxa_netdcu5 MACH_PXA_NETDCU5 PXA_NETDCU5 441
458acc MACH_ACC ACC 442
459esl_sarva MACH_ESL_SARVA ESL_SARVA 443
460xm250 MACH_XM250 XM250 444
461t6tc1xb MACH_T6TC1XB T6TC1XB 445
462ess710 MACH_ESS710 ESS710 446
463mx31ads MACH_MX31ADS MX31ADS 447 105mx31ads MACH_MX31ADS MX31ADS 447
464himalaya MACH_HIMALAYA HIMALAYA 448 106himalaya MACH_HIMALAYA HIMALAYA 448
465bolfenk MACH_BOLFENK BOLFENK 449
466at91rm9200kr MACH_AT91RM9200KR AT91RM9200KR 450
467edb9312 MACH_EDB9312 EDB9312 451 107edb9312 MACH_EDB9312 EDB9312 451
468omap_generic MACH_OMAP_GENERIC OMAP_GENERIC 452 108omap_generic MACH_OMAP_GENERIC OMAP_GENERIC 452
469aximx3 MACH_AXIMX3 AXIMX3 453
470eb67xdip MACH_EB67XDIP EB67XDIP 454
471webtxs MACH_WEBTXS WEBTXS 455
472hawk MACH_HAWK HAWK 456
473ccat91sbc001 MACH_CCAT91SBC001 CCAT91SBC001 457
474expresso MACH_EXPRESSO EXPRESSO 458
475h4000 MACH_H4000 H4000 459
476dino MACH_DINO DINO 460
477ml675k MACH_ML675K ML675K 461
478edb9301 MACH_EDB9301 EDB9301 462 109edb9301 MACH_EDB9301 EDB9301 462
479edb9315 MACH_EDB9315 EDB9315 463 110edb9315 MACH_EDB9315 EDB9315 463
480reciva_tt MACH_RECIVA_TT RECIVA_TT 464
481cstcb01 MACH_CSTCB01 CSTCB01 465
482cstcb1 MACH_CSTCB1 CSTCB1 466
483shadwell MACH_SHADWELL SHADWELL 467
484goepel263 MACH_GOEPEL263 GOEPEL263 468
485acq100 MACH_ACQ100 ACQ100 469
486mx1fs2 MACH_MX1FS2 MX1FS2 470
487hiptop_g1 MACH_HIPTOP_G1 HIPTOP_G1 471
488sparky MACH_SPARKY SPARKY 472
489ns9750 MACH_NS9750 NS9750 473
490phoenix MACH_PHOENIX PHOENIX 474
491vr1000 MACH_VR1000 VR1000 475 111vr1000 MACH_VR1000 VR1000 475
492deisterpxa MACH_DEISTERPXA DEISTERPXA 476
493bcm1160 MACH_BCM1160 BCM1160 477
494pcm022 MACH_PCM022 PCM022 478
495adsgcx MACH_ADSGCX ADSGCX 479
496dreadnaught MACH_DREADNAUGHT DREADNAUGHT 480
497dm320 MACH_DM320 DM320 481
498markov MACH_MARKOV MARKOV 482
499cos7a400 MACH_COS7A400 COS7A400 483
500milano MACH_MILANO MILANO 484
501ue9328 MACH_UE9328 UE9328 485
502uex255 MACH_UEX255 UEX255 486
503ue2410 MACH_UE2410 UE2410 487
504a620 MACH_A620 A620 488
505ocelot MACH_OCELOT OCELOT 489
506cheetah MACH_CHEETAH CHEETAH 490
507omap_perseus2 MACH_OMAP_PERSEUS2 OMAP_PERSEUS2 491 112omap_perseus2 MACH_OMAP_PERSEUS2 OMAP_PERSEUS2 491
508zvue MACH_ZVUE ZVUE 492
509roverp1 MACH_ROVERP1 ROVERP1 493
510asidial2 MACH_ASIDIAL2 ASIDIAL2 494
511s3c24a0 MACH_S3C24A0 S3C24A0 495
512e800 MACH_E800 E800 496 113e800 MACH_E800 E800 496
513e750 MACH_E750 E750 497 114e750 MACH_E750 E750 497
514s3c5500 MACH_S3C5500 S3C5500 498
515smdk5500 MACH_SMDK5500 SMDK5500 499
516signalsync MACH_SIGNALSYNC SIGNALSYNC 500
517nbc MACH_NBC NBC 501
518kodiak MACH_KODIAK KODIAK 502
519netbookpro MACH_NETBOOKPRO NETBOOKPRO 503
520hw90200 MACH_HW90200 HW90200 504
521condor MACH_CONDOR CONDOR 505
522cup MACH_CUP CUP 506
523kite MACH_KITE KITE 507
524scb9328 MACH_SCB9328 SCB9328 508 115scb9328 MACH_SCB9328 SCB9328 508
525omap_h3 MACH_OMAP_H3 OMAP_H3 509 116omap_h3 MACH_OMAP_H3 OMAP_H3 509
526omap_h4 MACH_OMAP_H4 OMAP_H4 510 117omap_h4 MACH_OMAP_H4 OMAP_H4 510
527n10 MACH_N10 N10 511
528montejade MACH_MONTAJADE MONTAJADE 512
529sg560 MACH_SG560 SG560 513
530dp1000 MACH_DP1000 DP1000 514
531omap_osk MACH_OMAP_OSK OMAP_OSK 515 118omap_osk MACH_OMAP_OSK OMAP_OSK 515
532rg100v3 MACH_RG100V3 RG100V3 516
533mx2ads MACH_MX2ADS MX2ADS 517
534pxa_kilo MACH_PXA_KILO PXA_KILO 518
535ixp4xx_eagle MACH_IXP4XX_EAGLE IXP4XX_EAGLE 519
536tosa MACH_TOSA TOSA 520 119tosa MACH_TOSA TOSA 520
537mb2520f MACH_MB2520F MB2520F 521
538emc1000 MACH_EMC1000 EMC1000 522
539tidsc25 MACH_TIDSC25 TIDSC25 523
540akcpmxl MACH_AKCPMXL AKCPMXL 524
541av3xx MACH_AV3XX AV3XX 525
542avila MACH_AVILA AVILA 526 120avila MACH_AVILA AVILA 526
543pxa_mpm10 MACH_PXA_MPM10 PXA_MPM10 527
544pxa_kyanite MACH_PXA_KYANITE PXA_KYANITE 528
545sgold MACH_SGOLD SGOLD 529
546oscar MACH_OSCAR OSCAR 530
547epxa4usb2 MACH_EPXA4USB2 EPXA4USB2 531
548xsengine MACH_XSENGINE XSENGINE 532
549ip600 MACH_IP600 IP600 533
550mcan2 MACH_MCAN2 MCAN2 534
551ddi_blueridge MACH_DDI_BLUERIDGE DDI_BLUERIDGE 535
552skyminder MACH_SKYMINDER SKYMINDER 536
553lpd79520 MACH_LPD79520 LPD79520 537
554edb9302 MACH_EDB9302 EDB9302 538 121edb9302 MACH_EDB9302 EDB9302 538
555hw90340 MACH_HW90340 HW90340 539
556cip_box MACH_CIP_BOX CIP_BOX 540
557ivpn MACH_IVPN IVPN 541
558rsoc2 MACH_RSOC2 RSOC2 542
559husky MACH_HUSKY HUSKY 543 122husky MACH_HUSKY HUSKY 543
560boxer MACH_BOXER BOXER 544
561shepherd MACH_SHEPHERD SHEPHERD 545 123shepherd MACH_SHEPHERD SHEPHERD 545
562aml42800aa MACH_AML42800AA AML42800AA 546
563lpc2294 MACH_LPC2294 LPC2294 548
564switchgrass MACH_SWITCHGRASS SWITCHGRASS 549
565ens_cmu MACH_ENS_CMU ENS_CMU 550
566mm6_sdb MACH_MM6_SDB MM6_SDB 551
567saturn MACH_SATURN SATURN 552
568i30030evb MACH_I30030EVB I30030EVB 553
569mxc27530evb MACH_MXC27530EVB MXC27530EVB 554
570smdk2800 MACH_SMDK2800 SMDK2800 555
571mtwilson MACH_MTWILSON MTWILSON 556
572ziti MACH_ZITI ZITI 557
573grandfather MACH_GRANDFATHER GRANDFATHER 558
574tengine MACH_TENGINE TENGINE 559
575s3c2460 MACH_S3C2460 S3C2460 560
576pdm MACH_PDM PDM 561
577h4700 MACH_H4700 H4700 562 124h4700 MACH_H4700 H4700 562
578h6300 MACH_H6300 H6300 563
579rz1700 MACH_RZ1700 RZ1700 564
580a716 MACH_A716 A716 565
581estk2440a MACH_ESTK2440A ESTK2440A 566
582atwixp425 MACH_ATWIXP425 ATWIXP425 567
583csb336 MACH_CSB336 CSB336 568
584rirm2 MACH_RIRM2 RIRM2 569
585cx23518 MACH_CX23518 CX23518 570
586cx2351x MACH_CX2351X CX2351X 571
587computime MACH_COMPUTIME COMPUTIME 572
588izarus MACH_IZARUS IZARUS 573
589pxa_rts MACH_RTS RTS 574
590se5100 MACH_SE5100 SE5100 575
591s3c2510 MACH_S3C2510 S3C2510 576
592csb437tl MACH_CSB437TL CSB437TL 577
593slauson MACH_SLAUSON SLAUSON 578
594pearlriver MACH_PEARLRIVER PEARLRIVER 579
595tdc_p210 MACH_TDC_P210 TDC_P210 580
596sg580 MACH_SG580 SG580 581
597wrsbcarm7 MACH_WRSBCARM7 WRSBCARM7 582
598ipd MACH_IPD IPD 583
599pxa_dnp2110 MACH_PXA_DNP2110 PXA_DNP2110 584
600xaeniax MACH_XAENIAX XAENIAX 585
601somn4250 MACH_SOMN4250 SOMN4250 586
602pleb2 MACH_PLEB2 PLEB2 587
603cornwallis MACH_CORNWALLIS CORNWALLIS 588
604gurney_drv MACH_GURNEY_DRV GURNEY_DRV 589
605chaffee MACH_CHAFFEE CHAFFEE 590
606rms101 MACH_RMS101 RMS101 591
607rx3715 MACH_RX3715 RX3715 592 125rx3715 MACH_RX3715 RX3715 592
608swift MACH_SWIFT SWIFT 593
609roverp7 MACH_ROVERP7 ROVERP7 594
610pr818s MACH_PR818S PR818S 595
611trxpro MACH_TRXPRO TRXPRO 596
612nslu2 MACH_NSLU2 NSLU2 597 126nslu2 MACH_NSLU2 NSLU2 597
613e400 MACH_E400 E400 598 127e400 MACH_E400 E400 598
614trab MACH_TRAB TRAB 599
615cmc_pu2 MACH_CMC_PU2 CMC_PU2 600
616fulcrum MACH_FULCRUM FULCRUM 601
617netgate42x MACH_NETGATE42X NETGATE42X 602
618str710 MACH_STR710 STR710 603
619ixdpg425 MACH_IXDPG425 IXDPG425 604 128ixdpg425 MACH_IXDPG425 IXDPG425 604
620tomtomgo MACH_TOMTOMGO TOMTOMGO 605
621versatile_ab MACH_VERSATILE_AB VERSATILE_AB 606 129versatile_ab MACH_VERSATILE_AB VERSATILE_AB 606
622edb9307 MACH_EDB9307 EDB9307 607 130edb9307 MACH_EDB9307 EDB9307 607
623sg565 MACH_SG565 SG565 608
624lpd79524 MACH_LPD79524 LPD79524 609
625lpd79525 MACH_LPD79525 LPD79525 610
626rms100 MACH_RMS100 RMS100 611
627kb9200 MACH_KB9200 KB9200 612 131kb9200 MACH_KB9200 KB9200 612
628sx1 MACH_SX1 SX1 613 132sx1 MACH_SX1 SX1 613
629hms39c7092 MACH_HMS39C7092 HMS39C7092 614
630armadillo MACH_ARMADILLO ARMADILLO 615
631ipcu MACH_IPCU IPCU 616
632loox720 MACH_LOOX720 LOOX720 617
633ixdp465 MACH_IXDP465 IXDP465 618 133ixdp465 MACH_IXDP465 IXDP465 618
634ixdp2351 MACH_IXDP2351 IXDP2351 619 134ixdp2351 MACH_IXDP2351 IXDP2351 619
635adsvix MACH_ADSVIX ADSVIX 620
636dm270 MACH_DM270 DM270 621
637socltplus MACH_SOCLTPLUS SOCLTPLUS 622
638ecia MACH_ECIA ECIA 623
639cm4008 MACH_CM4008 CM4008 624
640p2001 MACH_P2001 P2001 625
641twister MACH_TWISTER TWISTER 626
642mudshark MACH_MUDSHARK MUDSHARK 627
643hb2 MACH_HB2 HB2 628
644iq80332 MACH_IQ80332 IQ80332 629 135iq80332 MACH_IQ80332 IQ80332 629
645sendt MACH_SENDT SENDT 630
646mx2jazz MACH_MX2JAZZ MX2JAZZ 631
647multiio MACH_MULTIIO MULTIIO 632
648hrdisplay MACH_HRDISPLAY HRDISPLAY 633
649mxc27530ads MACH_MXC27530ADS MXC27530ADS 634
650trizeps3 MACH_TRIZEPS3 TRIZEPS3 635
651zefeerdza MACH_ZEFEERDZA ZEFEERDZA 636
652zefeerdzb MACH_ZEFEERDZB ZEFEERDZB 637
653zefeerdzg MACH_ZEFEERDZG ZEFEERDZG 638
654zefeerdzn MACH_ZEFEERDZN ZEFEERDZN 639
655zefeerdzq MACH_ZEFEERDZQ ZEFEERDZQ 640
656gtwx5715 MACH_GTWX5715 GTWX5715 641 136gtwx5715 MACH_GTWX5715 GTWX5715 641
657astro_jack MACH_ASTRO_JACK ASTRO_JACK 643
658tip03 MACH_TIP03 TIP03 644
659a9200ec MACH_A9200EC A9200EC 645
660pnx0105 MACH_PNX0105 PNX0105 646
661adcpoecpu MACH_ADCPOECPU ADCPOECPU 647
662csb637 MACH_CSB637 CSB637 648 137csb637 MACH_CSB637 CSB637 648
663mb9200 MACH_MB9200 MB9200 650
664kulun MACH_KULUN KULUN 651
665snapper MACH_SNAPPER SNAPPER 652
666optima MACH_OPTIMA OPTIMA 653
667dlhsbc MACH_DLHSBC DLHSBC 654
668x30 MACH_X30 X30 655
669n30 MACH_N30 N30 656 138n30 MACH_N30 N30 656
670manga_ks8695 MACH_MANGA_KS8695 MANGA_KS8695 657
671ajax MACH_AJAX AJAX 658
672nec_mp900 MACH_NEC_MP900 NEC_MP900 659 139nec_mp900 MACH_NEC_MP900 NEC_MP900 659
673vvtk1000 MACH_VVTK1000 VVTK1000 661
674kafa MACH_KAFA KAFA 662 140kafa MACH_KAFA KAFA 662
675vvtk3000 MACH_VVTK3000 VVTK3000 663
676pimx1 MACH_PIMX1 PIMX1 664
677ollie MACH_OLLIE OLLIE 665
678skymax MACH_SKYMAX SKYMAX 666
679jazz MACH_JAZZ JAZZ 667
680tel_t3 MACH_TEL_T3 TEL_T3 668
681aisino_fcr255 MACH_AISINO_FCR255 AISINO_FCR255 669
682btweb MACH_BTWEB BTWEB 670
683dbg_lh79520 MACH_DBG_LH79520 DBG_LH79520 671
684cm41xx MACH_CM41XX CM41XX 672
685ts72xx MACH_TS72XX TS72XX 673 141ts72xx MACH_TS72XX TS72XX 673
686nggpxa MACH_NGGPXA NGGPXA 674
687csb535 MACH_CSB535 CSB535 675
688csb536 MACH_CSB536 CSB536 676
689pxa_trakpod MACH_PXA_TRAKPOD PXA_TRAKPOD 677
690praxis MACH_PRAXIS PRAXIS 678
691lh75411 MACH_LH75411 LH75411 679
692otom MACH_OTOM OTOM 680 142otom MACH_OTOM OTOM 680
693nexcoder_2440 MACH_NEXCODER_2440 NEXCODER_2440 681 143nexcoder_2440 MACH_NEXCODER_2440 NEXCODER_2440 681
694loox410 MACH_LOOX410 LOOX410 682
695westlake MACH_WESTLAKE WESTLAKE 683
696nsb MACH_NSB NSB 684
697esl_sarva_stn MACH_ESL_SARVA_STN ESL_SARVA_STN 685
698esl_sarva_tft MACH_ESL_SARVA_TFT ESL_SARVA_TFT 686
699esl_sarva_iad MACH_ESL_SARVA_IAD ESL_SARVA_IAD 687
700esl_sarva_acc MACH_ESL_SARVA_ACC ESL_SARVA_ACC 688
701typhoon MACH_TYPHOON TYPHOON 689
702cnav MACH_CNAV CNAV 690
703a730 MACH_A730 A730 691
704netstar MACH_NETSTAR NETSTAR 692
705supercon MACH_PHASEFALE_SUPERCON PHASEFALE_SUPERCON 693
706shiva1100 MACH_SHIVA1100 SHIVA1100 694
707etexsc MACH_ETEXSC ETEXSC 695
708ixdpg465 MACH_IXDPG465 IXDPG465 696
709a9m2410 MACH_A9M2410 A9M2410 697
710a9m2440 MACH_A9M2440 A9M2440 698
711a9m9750 MACH_A9M9750 A9M9750 699
712a9m9360 MACH_A9M9360 A9M9360 700
713unc90 MACH_UNC90 UNC90 701
714eco920 MACH_ECO920 ECO920 702 144eco920 MACH_ECO920 ECO920 702
715satview MACH_SATVIEW SATVIEW 703
716roadrunner MACH_ROADRUNNER ROADRUNNER 704 145roadrunner MACH_ROADRUNNER ROADRUNNER 704
717at91rm9200ek MACH_AT91RM9200EK AT91RM9200EK 705 146at91rm9200ek MACH_AT91RM9200EK AT91RM9200EK 705
718gp32 MACH_GP32 GP32 706
719gem MACH_GEM GEM 707
720i858 MACH_I858 I858 708
721hx2750 MACH_HX2750 HX2750 709
722mxc91131evb MACH_MXC91131EVB MXC91131EVB 710
723p700 MACH_P700 P700 711
724cpe MACH_CPE CPE 712
725spitz MACH_SPITZ SPITZ 713 147spitz MACH_SPITZ SPITZ 713
726nimbra340 MACH_NIMBRA340 NIMBRA340 714
727lpc22xx MACH_LPC22XX LPC22XX 715
728omap_comet3 MACH_COMET3 COMET3 716
729omap_comet4 MACH_COMET4 COMET4 717
730csb625 MACH_CSB625 CSB625 718
731fortunet2 MACH_FORTUNET2 FORTUNET2 719
732s5h2200 MACH_S5H2200 S5H2200 720
733optorm920 MACH_OPTORM920 OPTORM920 721
734adsbitsyxb MACH_ADSBITSYXB ADSBITSYXB 722
735adssphere MACH_ADSSPHERE ADSSPHERE 723 148adssphere MACH_ADSSPHERE ADSSPHERE 723
736adsportal MACH_ADSPORTAL ADSPORTAL 724
737ln2410sbc MACH_LN2410SBC LN2410SBC 725
738cb3rufc MACH_CB3RUFC CB3RUFC 726
739mp2usb MACH_MP2USB MP2USB 727
740ntnp425c MACH_NTNP425C NTNP425C 728
741colibri MACH_COLIBRI COLIBRI 729 149colibri MACH_COLIBRI COLIBRI 729
742pcm7220 MACH_PCM7220 PCM7220 730
743gateway7001 MACH_GATEWAY7001 GATEWAY7001 731 150gateway7001 MACH_GATEWAY7001 GATEWAY7001 731
744pcm027 MACH_PCM027 PCM027 732 151pcm027 MACH_PCM027 PCM027 732
745cmpxa MACH_CMPXA CMPXA 733
746anubis MACH_ANUBIS ANUBIS 734 152anubis MACH_ANUBIS ANUBIS 734
747ite8152 MACH_ITE8152 ITE8152 735
748lpc3xxx MACH_LPC3XXX LPC3XXX 736
749puppeteer MACH_PUPPETEER PUPPETEER 737
750e570 MACH_E570 E570 739
751x50 MACH_X50 X50 740
752recon MACH_RECON RECON 741
753xboardgp8 MACH_XBOARDGP8 XBOARDGP8 742
754fpic2 MACH_FPIC2 FPIC2 743
755akita MACH_AKITA AKITA 744 153akita MACH_AKITA AKITA 744
756a81 MACH_A81 A81 745
757svm_sc25x MACH_SVM_SC25X SVM_SC25X 746
758vt020 MACH_VADATECH020 VADATECH020 747
759tli MACH_TLI TLI 748
760edb9315lc MACH_EDB9315LC EDB9315LC 749
761passec MACH_PASSEC PASSEC 750
762ds_tiger MACH_DS_TIGER DS_TIGER 751
763e310 MACH_E310 E310 752
764e330 MACH_E330 E330 753 154e330 MACH_E330 E330 753
765rt3000 MACH_RT3000 RT3000 754
766nokia770 MACH_NOKIA770 NOKIA770 755 155nokia770 MACH_NOKIA770 NOKIA770 755
767pnx0106 MACH_PNX0106 PNX0106 756
768hx21xx MACH_HX21XX HX21XX 757
769faraday MACH_FARADAY FARADAY 758
770sbc9312 MACH_SBC9312 SBC9312 759
771batman MACH_BATMAN BATMAN 760
772jpd201 MACH_JPD201 JPD201 761
773mipsa MACH_MIPSA MIPSA 762
774kacom MACH_KACOM KACOM 763
775swarcocpu MACH_SWARCOCPU SWARCOCPU 764
776swarcodsl MACH_SWARCODSL SWARCODSL 765
777blueangel MACH_BLUEANGEL BLUEANGEL 766
778hairygrama MACH_HAIRYGRAMA HAIRYGRAMA 767
779banff MACH_BANFF BANFF 768
780carmeva MACH_CARMEVA CARMEVA 769 156carmeva MACH_CARMEVA CARMEVA 769
781sam255 MACH_SAM255 SAM255 770
782ppm10 MACH_PPM10 PPM10 771
783edb9315a MACH_EDB9315A EDB9315A 772 157edb9315a MACH_EDB9315A EDB9315A 772
784sunset MACH_SUNSET SUNSET 773
785stargate2 MACH_STARGATE2 STARGATE2 774 158stargate2 MACH_STARGATE2 STARGATE2 774
786intelmote2 MACH_INTELMOTE2 INTELMOTE2 775 159intelmote2 MACH_INTELMOTE2 INTELMOTE2 775
787trizeps4 MACH_TRIZEPS4 TRIZEPS4 776 160trizeps4 MACH_TRIZEPS4 TRIZEPS4 776
788mainstone2 MACH_MAINSTONE2 MAINSTONE2 777
789ez_ixp42x MACH_EZ_IXP42X EZ_IXP42X 778
790tapwave_zodiac MACH_TAPWAVE_ZODIAC TAPWAVE_ZODIAC 779
791universalmeter MACH_UNIVERSALMETER UNIVERSALMETER 780
792hicoarm9 MACH_HICOARM9 HICOARM9 781
793pnx4008 MACH_PNX4008 PNX4008 782 161pnx4008 MACH_PNX4008 PNX4008 782
794kws6000 MACH_KWS6000 KWS6000 783
795portux920t MACH_PORTUX920T PORTUX920T 784
796ez_x5 MACH_EZ_X5 EZ_X5 785
797omap_rudolph MACH_OMAP_RUDOLPH OMAP_RUDOLPH 786
798cpuat91 MACH_CPUAT91 CPUAT91 787 162cpuat91 MACH_CPUAT91 CPUAT91 787
799rea9200 MACH_REA9200 REA9200 788
800acts_pune_sa1110 MACH_ACTS_PUNE_SA1110 ACTS_PUNE_SA1110 789
801ixp425 MACH_IXP425 IXP425 790
802i30030ads MACH_I30030ADS I30030ADS 791
803perch MACH_PERCH PERCH 792
804eis05r1 MACH_EIS05R1 EIS05R1 793
805pepperpad MACH_PEPPERPAD PEPPERPAD 794
806sb3010 MACH_SB3010 SB3010 795
807rm9200 MACH_RM9200 RM9200 796
808dma03 MACH_DMA03 DMA03 797
809road_s101 MACH_ROAD_S101 ROAD_S101 798
810iq81340sc MACH_IQ81340SC IQ81340SC 799 163iq81340sc MACH_IQ81340SC IQ81340SC 799
811iq_nextgen_b MACH_IQ_NEXTGEN_B IQ_NEXTGEN_B 800
812iq81340mc MACH_IQ81340MC IQ81340MC 801 164iq81340mc MACH_IQ81340MC IQ81340MC 801
813iq_nextgen_d MACH_IQ_NEXTGEN_D IQ_NEXTGEN_D 802
814iq_nextgen_e MACH_IQ_NEXTGEN_E IQ_NEXTGEN_E 803
815mallow_at91 MACH_MALLOW_AT91 MALLOW_AT91 804
816cybertracker_i MACH_CYBERTRACKER_I CYBERTRACKER_I 805
817gesbc931x MACH_GESBC931X GESBC931X 806
818centipad MACH_CENTIPAD CENTIPAD 807
819armsoc MACH_ARMSOC ARMSOC 808
820se4200 MACH_SE4200 SE4200 809
821ems197a MACH_EMS197A EMS197A 810
822micro9 MACH_MICRO9 MICRO9 811 165micro9 MACH_MICRO9 MICRO9 811
823micro9l MACH_MICRO9L MICRO9L 812 166micro9l MACH_MICRO9L MICRO9L 812
824uc5471dsp MACH_UC5471DSP UC5471DSP 813
825sj5471eng MACH_SJ5471ENG SJ5471ENG 814
826none MACH_CMPXA26X CMPXA26X 815
827nc1 MACH_NC NC 816
828omap_palmte MACH_OMAP_PALMTE OMAP_PALMTE 817 167omap_palmte MACH_OMAP_PALMTE OMAP_PALMTE 817
829ajax52x MACH_AJAX52X AJAX52X 818
830siriustar MACH_SIRIUSTAR SIRIUSTAR 819
831iodata_hdlg MACH_IODATA_HDLG IODATA_HDLG 820
832at91rm9200utl MACH_AT91RM9200UTL AT91RM9200UTL 821
833biosafe MACH_BIOSAFE BIOSAFE 822
834mp1000 MACH_MP1000 MP1000 823
835parsy MACH_PARSY PARSY 824
836ccxp270 MACH_CCXP CCXP 825
837omap_gsample MACH_OMAP_GSAMPLE OMAP_GSAMPLE 826
838realview_eb MACH_REALVIEW_EB REALVIEW_EB 827 168realview_eb MACH_REALVIEW_EB REALVIEW_EB 827
839samoa MACH_SAMOA SAMOA 828
840palmt3 MACH_PALMT3 PALMT3 829
841i878 MACH_I878 I878 830
842borzoi MACH_BORZOI BORZOI 831 169borzoi MACH_BORZOI BORZOI 831
843gecko MACH_GECKO GECKO 832
844ds101 MACH_DS101 DS101 833
845omap_palmtt2 MACH_OMAP_PALMTT2 OMAP_PALMTT2 834
846palmld MACH_PALMLD PALMLD 835 170palmld MACH_PALMLD PALMLD 835
847cc9c MACH_CC9C CC9C 836
848sbc1670 MACH_SBC1670 SBC1670 837
849ixdp28x5 MACH_IXDP28X5 IXDP28X5 838 171ixdp28x5 MACH_IXDP28X5 IXDP28X5 838
850omap_palmtt MACH_OMAP_PALMTT OMAP_PALMTT 839 172omap_palmtt MACH_OMAP_PALMTT OMAP_PALMTT 839
851ml696k MACH_ML696K ML696K 840
852arcom_zeus MACH_ARCOM_ZEUS ARCOM_ZEUS 841 173arcom_zeus MACH_ARCOM_ZEUS ARCOM_ZEUS 841
853osiris MACH_OSIRIS OSIRIS 842 174osiris MACH_OSIRIS OSIRIS 842
854maestro MACH_MAESTRO MAESTRO 843
855palmte2 MACH_PALMTE2 PALMTE2 844 175palmte2 MACH_PALMTE2 PALMTE2 844
856ixbbm MACH_IXBBM IXBBM 845
857mx27ads MACH_MX27ADS MX27ADS 846 176mx27ads MACH_MX27ADS MX27ADS 846
858ax8004 MACH_AX8004 AX8004 847
859at91sam9261ek MACH_AT91SAM9261EK AT91SAM9261EK 848 177at91sam9261ek MACH_AT91SAM9261EK AT91SAM9261EK 848
860loft MACH_LOFT LOFT 849 178loft MACH_LOFT LOFT 849
861magpie MACH_MAGPIE MAGPIE 850
862mx21ads MACH_MX21ADS MX21ADS 851 179mx21ads MACH_MX21ADS MX21ADS 851
863mb87m3400 MACH_MB87M3400 MB87M3400 852
864mguard_delta MACH_MGUARD_DELTA MGUARD_DELTA 853
865davinci_dvdp MACH_DAVINCI_DVDP DAVINCI_DVDP 854
866htcuniversal MACH_HTCUNIVERSAL HTCUNIVERSAL 855
867tpad MACH_TPAD TPAD 856
868roverp3 MACH_ROVERP3 ROVERP3 857
869jornada928 MACH_JORNADA928 JORNADA928 858
870mv88fxx81 MACH_MV88FXX81 MV88FXX81 859
871stmp36xx MACH_STMP36XX STMP36XX 860
872sxni79524 MACH_SXNI79524 SXNI79524 861
873ams_delta MACH_AMS_DELTA AMS_DELTA 862 180ams_delta MACH_AMS_DELTA AMS_DELTA 862
874uranium MACH_URANIUM URANIUM 863
875ucon MACH_UCON UCON 864
876nas100d MACH_NAS100D NAS100D 865 181nas100d MACH_NAS100D NAS100D 865
877l083 MACH_L083_1000 L083_1000 866
878ezx MACH_EZX EZX 867
879pnx5220 MACH_PNX5220 PNX5220 868
880butte MACH_BUTTE BUTTE 869
881srm2 MACH_SRM2 SRM2 870
882dsbr MACH_DSBR DSBR 871
883crystalball MACH_CRYSTALBALL CRYSTALBALL 872
884tinypxa27x MACH_TINYPXA27X TINYPXA27X 873
885herbie MACH_HERBIE HERBIE 874
886magician MACH_MAGICIAN MAGICIAN 875 182magician MACH_MAGICIAN MAGICIAN 875
887cm4002 MACH_CM4002 CM4002 876
888b4 MACH_B4 B4 877
889maui MACH_MAUI MAUI 878
890cybertracker_g MACH_CYBERTRACKER_G CYBERTRACKER_G 879
891nxdkn MACH_NXDKN NXDKN 880 183nxdkn MACH_NXDKN NXDKN 880
892mio8390 MACH_MIO8390 MIO8390 881
893omi_board MACH_OMI_BOARD OMI_BOARD 882
894mx21civ MACH_MX21CIV MX21CIV 883
895mahi_cdac MACH_MAHI_CDAC MAHI_CDAC 884
896palmtx MACH_PALMTX PALMTX 885 184palmtx MACH_PALMTX PALMTX 885
897s3c2413 MACH_S3C2413 S3C2413 887 185s3c2413 MACH_S3C2413 S3C2413 887
898samsys_ep0 MACH_SAMSYS_EP0 SAMSYS_EP0 888
899wg302v1 MACH_WG302V1 WG302V1 889
900wg302v2 MACH_WG302V2 WG302V2 890 186wg302v2 MACH_WG302V2 WG302V2 890
901eb42x MACH_EB42X EB42X 891
902iq331es MACH_IQ331ES IQ331ES 892
903cosydsp MACH_COSYDSP COSYDSP 893
904uplat7d_proto MACH_UPLAT7D UPLAT7D 894
905ptdavinci MACH_PTDAVINCI PTDAVINCI 895
906mbus MACH_MBUS MBUS 896
907nadia2vb MACH_NADIA2VB NADIA2VB 897
908r1000 MACH_R1000 R1000 898
909hw90250 MACH_HW90250 HW90250 899
910omap_2430sdp MACH_OMAP_2430SDP OMAP_2430SDP 900 187omap_2430sdp MACH_OMAP_2430SDP OMAP_2430SDP 900
911davinci_evm MACH_DAVINCI_EVM DAVINCI_EVM 901 188davinci_evm MACH_DAVINCI_EVM DAVINCI_EVM 901
912omap_tornado MACH_OMAP_TORNADO OMAP_TORNADO 902
913olocreek MACH_OLOCREEK OLOCREEK 903
914palmz72 MACH_PALMZ72 PALMZ72 904 189palmz72 MACH_PALMZ72 PALMZ72 904
915nxdb500 MACH_NXDB500 NXDB500 905 190nxdb500 MACH_NXDB500 NXDB500 905
916apf9328 MACH_APF9328 APF9328 906
917omap_wipoq MACH_OMAP_WIPOQ OMAP_WIPOQ 907
918omap_twip MACH_OMAP_TWIP OMAP_TWIP 908
919treo650 MACH_TREO650 TREO650 909
920acumen MACH_ACUMEN ACUMEN 910
921xp100 MACH_XP100 XP100 911
922fs2410 MACH_FS2410 FS2410 912
923pxa270_cerf MACH_PXA270_CERF PXA270_CERF 913
924sq2ftlpalm MACH_SQ2FTLPALM SQ2FTLPALM 914
925bsemserver MACH_BSEMSERVER BSEMSERVER 915
926netclient MACH_NETCLIENT NETCLIENT 916
927palmt5 MACH_PALMT5 PALMT5 917 191palmt5 MACH_PALMT5 PALMT5 917
928palmtc MACH_PALMTC PALMTC 918 192palmtc MACH_PALMTC PALMTC 918
929omap_apollon MACH_OMAP_APOLLON OMAP_APOLLON 919 193omap_apollon MACH_OMAP_APOLLON OMAP_APOLLON 919
930mxc30030evb MACH_MXC30030EVB MXC30030EVB 920
931rea_cpu2 MACH_REA_2D REA_2D 921
932eti3e524 MACH_TI3E524 TI3E524 922
933ateb9200 MACH_ATEB9200 ATEB9200 923 194ateb9200 MACH_ATEB9200 ATEB9200 923
934auckland MACH_AUCKLAND AUCKLAND 924
935ak3220m MACH_AK3320M AK3320M 925
936duramax MACH_DURAMAX DURAMAX 926
937n35 MACH_N35 N35 927 195n35 MACH_N35 N35 927
938pronghorn MACH_PRONGHORN PRONGHORN 928
939fundy MACH_FUNDY FUNDY 929
940logicpd_pxa270 MACH_LOGICPD_PXA270 LOGICPD_PXA270 930 196logicpd_pxa270 MACH_LOGICPD_PXA270 LOGICPD_PXA270 930
941cpu777 MACH_CPU777 CPU777 931
942simicon9201 MACH_SIMICON9201 SIMICON9201 932
943leap2_hpm MACH_LEAP2_HPM LEAP2_HPM 933
944cm922txa10 MACH_CM922TXA10 CM922TXA10 934
945sandgate MACH_PXA PXA 935
946sandgate2 MACH_SANDGATE2 SANDGATE2 936
947sandgate2g MACH_SANDGATE2G SANDGATE2G 937
948sandgate2p MACH_SANDGATE2P SANDGATE2P 938
949fred_jack MACH_FRED_JACK FRED_JACK 939
950ttg_color1 MACH_TTG_COLOR1 TTG_COLOR1 940
951nxeb500hmi MACH_NXEB500HMI NXEB500HMI 941 197nxeb500hmi MACH_NXEB500HMI NXEB500HMI 941
952netdcu8 MACH_NETDCU8 NETDCU8 942
953ng_fvx538 MACH_NG_FVX538 NG_FVX538 944
954ng_fvs338 MACH_NG_FVS338 NG_FVS338 945
955pnx4103 MACH_PNX4103 PNX4103 946
956hesdb MACH_HESDB HESDB 947
957xsilo MACH_XSILO XSILO 948
958espresso MACH_ESPRESSO ESPRESSO 949 198espresso MACH_ESPRESSO ESPRESSO 949
959emlc MACH_EMLC EMLC 950
960sisteron MACH_SISTERON SISTERON 951
961rx1950 MACH_RX1950 RX1950 952 199rx1950 MACH_RX1950 RX1950 952
962tsc_venus MACH_TSC_VENUS TSC_VENUS 953
963ds101j MACH_DS101J DS101J 954
964mxc30030ads MACH_MXC30030ADS MXC30030ADS 955
965fujitsu_wimaxsoc MACH_FUJITSU_WIMAXSOC FUJITSU_WIMAXSOC 956
966dualpcmodem MACH_DUALPCMODEM DUALPCMODEM 957
967gesbc9312 MACH_GESBC9312 GESBC9312 958 200gesbc9312 MACH_GESBC9312 GESBC9312 958
968htcapache MACH_HTCAPACHE HTCAPACHE 959
969ixdp435 MACH_IXDP435 IXDP435 960
970catprovt100 MACH_CATPROVT100 CATPROVT100 961
971picotux1xx MACH_PICOTUX1XX PICOTUX1XX 962
972picotux2xx MACH_PICOTUX2XX PICOTUX2XX 963 201picotux2xx MACH_PICOTUX2XX PICOTUX2XX 963
973dsmg600 MACH_DSMG600 DSMG600 964 202dsmg600 MACH_DSMG600 DSMG600 964
974empc2 MACH_EMPC2 EMPC2 965
975ventura MACH_VENTURA VENTURA 966
976phidget_sbc MACH_PHIDGET_SBC PHIDGET_SBC 967
977ij3k MACH_IJ3K IJ3K 968
978pisgah MACH_PISGAH PISGAH 969
979omap_fsample MACH_OMAP_FSAMPLE OMAP_FSAMPLE 970 203omap_fsample MACH_OMAP_FSAMPLE OMAP_FSAMPLE 970
980sg720 MACH_SG720 SG720 971
981redfox MACH_REDFOX REDFOX 972
982mysh_ep9315_1 MACH_MYSH_EP9315_1 MYSH_EP9315_1 973
983tpf106 MACH_TPF106 TPF106 974
984at91rm9200kg MACH_AT91RM9200KG AT91RM9200KG 975
985rcmt2 MACH_SLEDB SLEDB 976
986ontrack MACH_ONTRACK ONTRACK 977
987pm1200 MACH_PM1200 PM1200 978
988ess24562 MACH_ESS24XXX ESS24XXX 979
989coremp7 MACH_COREMP7 COREMP7 980
990nexcoder_6446 MACH_NEXCODER_6446 NEXCODER_6446 981
991stvc8380 MACH_STVC8380 STVC8380 982
992teklynx MACH_TEKLYNX TEKLYNX 983
993carbonado MACH_CARBONADO CARBONADO 984
994sysmos_mp730 MACH_SYSMOS_MP730 SYSMOS_MP730 985
995snapper_cl15 MACH_SNAPPER_CL15 SNAPPER_CL15 986 204snapper_cl15 MACH_SNAPPER_CL15 SNAPPER_CL15 986
996pgigim MACH_PGIGIM PGIGIM 987
997ptx9160p2 MACH_PTX9160P2 PTX9160P2 988
998dcore1 MACH_DCORE1 DCORE1 989
999victorpxa MACH_VICTORPXA VICTORPXA 990
1000mx2dtb MACH_MX2DTB MX2DTB 991
1001pxa_irex_er0100 MACH_PXA_IREX_ER0100 PXA_IREX_ER0100 992
1002omap_palmz71 MACH_OMAP_PALMZ71 OMAP_PALMZ71 993 205omap_palmz71 MACH_OMAP_PALMZ71 OMAP_PALMZ71 993
1003bartec_deg MACH_BARTEC_DEG BARTEC_DEG 994
1004hw50251 MACH_HW50251 HW50251 995
1005ibox MACH_IBOX IBOX 996
1006atlaslh7a404 MACH_ATLASLH7A404 ATLASLH7A404 997
1007pt2026 MACH_PT2026 PT2026 998
1008htcalpine MACH_HTCALPINE HTCALPINE 999
1009bartec_vtu MACH_BARTEC_VTU BARTEC_VTU 1000
1010vcoreii MACH_VCOREII VCOREII 1001
1011pdnb3 MACH_PDNB3 PDNB3 1002
1012htcbeetles MACH_HTCBEETLES HTCBEETLES 1003
1013s3c6400 MACH_S3C6400 S3C6400 1004
1014s3c2443 MACH_S3C2443 S3C2443 1005
1015omap_ldk MACH_OMAP_LDK OMAP_LDK 1006
1016smdk2460 MACH_SMDK2460 SMDK2460 1007
1017smdk2440 MACH_SMDK2440 SMDK2440 1008
1018smdk2412 MACH_SMDK2412 SMDK2412 1009 206smdk2412 MACH_SMDK2412 SMDK2412 1009
1019webbox MACH_WEBBOX WEBBOX 1010
1020cwwndp MACH_CWWNDP CWWNDP 1011
1021i839 MACH_DRAGON DRAGON 1012
1022opendo_cpu_board MACH_OPENDO_CPU_BOARD OPENDO_CPU_BOARD 1013
1023ccm2200 MACH_CCM2200 CCM2200 1014
1024etwarm MACH_ETWARM ETWARM 1015
1025m93030 MACH_M93030 M93030 1016
1026cc7u MACH_CC7U CC7U 1017
1027mtt_ranger MACH_MTT_RANGER MTT_RANGER 1018
1028nexus MACH_NEXUS NEXUS 1019
1029desman MACH_DESMAN DESMAN 1020
1030bkde303 MACH_BKDE303 BKDE303 1021
1031smdk2413 MACH_SMDK2413 SMDK2413 1022 207smdk2413 MACH_SMDK2413 SMDK2413 1022
1032aml_m7200 MACH_AML_M7200 AML_M7200 1023
1033aml_m5900 MACH_AML_M5900 AML_M5900 1024 208aml_m5900 MACH_AML_M5900 AML_M5900 1024
1034sg640 MACH_SG640 SG640 1025
1035edg79524 MACH_EDG79524 EDG79524 1026
1036ai2410 MACH_AI2410 AI2410 1027
1037ixp465 MACH_IXP465 IXP465 1028
1038balloon3 MACH_BALLOON3 BALLOON3 1029 209balloon3 MACH_BALLOON3 BALLOON3 1029
1039heins MACH_HEINS HEINS 1030
1040mpluseva MACH_MPLUSEVA MPLUSEVA 1031
1041rt042 MACH_RT042 RT042 1032
1042cwiem MACH_CWIEM CWIEM 1033
1043cm_x270 MACH_CM_X270 CM_X270 1034
1044cm_x255 MACH_CM_X255 CM_X255 1035
1045esh_at91 MACH_ESH_AT91 ESH_AT91 1036
1046sandgate3 MACH_SANDGATE3 SANDGATE3 1037
1047primo MACH_PRIMO PRIMO 1038
1048gemstone MACH_GEMSTONE GEMSTONE 1039
1049pronghorn_metro MACH_PRONGHORNMETRO PRONGHORNMETRO 1040
1050sidewinder MACH_SIDEWINDER SIDEWINDER 1041
1051picomod1 MACH_PICOMOD1 PICOMOD1 1042
1052sg590 MACH_SG590 SG590 1043
1053akai9307 MACH_AKAI9307 AKAI9307 1044
1054fontaine MACH_FONTAINE FONTAINE 1045
1055wombat MACH_WOMBAT WOMBAT 1046
1056acq300 MACH_ACQ300 ACQ300 1047
1057mod272 MACH_MOD_270 MOD_270 1048
1058vmc_vc0820 MACH_VC0820 VC0820 1049
1059ani_aim MACH_ANI_AIM ANI_AIM 1050
1060jellyfish MACH_JELLYFISH JELLYFISH 1051
1061amanita MACH_AMANITA AMANITA 1052
1062vlink MACH_VLINK VLINK 1053
1063dexflex MACH_DEXFLEX DEXFLEX 1054
1064eigen_ttq MACH_EIGEN_TTQ EIGEN_TTQ 1055
1065arcom_titan MACH_ARCOM_TITAN ARCOM_TITAN 1056
1066tabla MACH_TABLA TABLA 1057
1067mdirac3 MACH_MDIRAC3 MDIRAC3 1058
1068mrhfbp2 MACH_MRHFBP2 MRHFBP2 1059
1069at91rm9200rb MACH_AT91RM9200RB AT91RM9200RB 1060
1070ani_apm MACH_ANI_APM ANI_APM 1061
1071ella1 MACH_ELLA1 ELLA1 1062
1072inhand_pxa27x MACH_INHAND_PXA27X INHAND_PXA27X 1063
1073inhand_pxa25x MACH_INHAND_PXA25X INHAND_PXA25X 1064
1074empos_xm MACH_EMPOS_XM EMPOS_XM 1065
1075empos MACH_EMPOS EMPOS 1066
1076empos_tiny MACH_EMPOS_TINY EMPOS_TINY 1067
1077empos_sm MACH_EMPOS_SM EMPOS_SM 1068
1078egret MACH_EGRET EGRET 1069
1079ostrich MACH_OSTRICH OSTRICH 1070
1080n50 MACH_N50 N50 1071
1081ecbat91 MACH_ECBAT91 ECBAT91 1072 210ecbat91 MACH_ECBAT91 ECBAT91 1072
1082stareast MACH_STAREAST STAREAST 1073
1083dspg_dw MACH_DSPG_DW DSPG_DW 1074
1084onearm MACH_ONEARM ONEARM 1075 211onearm MACH_ONEARM ONEARM 1075
1085mrg110_6 MACH_MRG110_6 MRG110_6 1076
1086wrt300nv2 MACH_WRT300NV2 WRT300NV2 1077
1087xm_bulverde MACH_XM_BULVERDE XM_BULVERDE 1078
1088msm6100 MACH_MSM6100 MSM6100 1079
1089eti_b1 MACH_ETI_B1 ETI_B1 1080
1090za9l_series MACH_ZILOG_ZA9L ZILOG_ZA9L 1081
1091bit2440 MACH_BIT2440 BIT2440 1082
1092nbi MACH_NBI NBI 1083
1093smdk2443 MACH_SMDK2443 SMDK2443 1084 212smdk2443 MACH_SMDK2443 SMDK2443 1084
1094vdavinci MACH_VDAVINCI VDAVINCI 1085
1095atc6 MACH_ATC6 ATC6 1086
1096multmdw MACH_MULTMDW MULTMDW 1087
1097mba2440 MACH_MBA2440 MBA2440 1088
1098ecsd MACH_ECSD ECSD 1089
1099palmz31 MACH_PALMZ31 PALMZ31 1090
1100fsg MACH_FSG FSG 1091 213fsg MACH_FSG FSG 1091
1101razor101 MACH_RAZOR101 RAZOR101 1092
1102opera_tdm MACH_OPERA_TDM OPERA_TDM 1093
1103comcerto MACH_COMCERTO COMCERTO 1094
1104tb0319 MACH_TB0319 TB0319 1095
1105kws8000 MACH_KWS8000 KWS8000 1096
1106b2 MACH_B2 B2 1097
1107lcl54 MACH_LCL54 LCL54 1098
1108at91sam9260ek MACH_AT91SAM9260EK AT91SAM9260EK 1099 214at91sam9260ek MACH_AT91SAM9260EK AT91SAM9260EK 1099
1109glantank MACH_GLANTANK GLANTANK 1100 215glantank MACH_GLANTANK GLANTANK 1100
1110n2100 MACH_N2100 N2100 1101 216n2100 MACH_N2100 N2100 1101
1111n4100 MACH_N4100 N4100 1102
1112rsc4 MACH_VERTICAL_RSC4 VERTICAL_RSC4 1103
1113sg8100 MACH_SG8100 SG8100 1104
1114im42xx MACH_IM42XX IM42XX 1105
1115ftxx MACH_FTXX FTXX 1106
1116lwfusion MACH_LWFUSION LWFUSION 1107
1117qt2410 MACH_QT2410 QT2410 1108 217qt2410 MACH_QT2410 QT2410 1108
1118kixrp435 MACH_KIXRP435 KIXRP435 1109 218kixrp435 MACH_KIXRP435 KIXRP435 1109
1119ccw9c MACH_CCW9C CCW9C 1110
1120dabhs MACH_DABHS DABHS 1111
1121gzmx MACH_GZMX GZMX 1112
1122ipnw100ap MACH_IPNW100AP IPNW100AP 1113
1123cc9p9360dev MACH_CC9P9360DEV CC9P9360DEV 1114 219cc9p9360dev MACH_CC9P9360DEV CC9P9360DEV 1114
1124cc9p9750dev MACH_CC9P9750DEV CC9P9750DEV 1115
1125cc9p9360val MACH_CC9P9360VAL CC9P9360VAL 1116
1126cc9p9750val MACH_CC9P9750VAL CC9P9750VAL 1117
1127nx70v MACH_NX70V NX70V 1118
1128at91rm9200df MACH_AT91RM9200DF AT91RM9200DF 1119
1129se_pilot2 MACH_SE_PILOT2 SE_PILOT2 1120
1130mtcn_t800 MACH_MTCN_T800 MTCN_T800 1121
1131vcmx212 MACH_VCMX212 VCMX212 1122
1132lynx MACH_LYNX LYNX 1123
1133at91sam9260id MACH_AT91SAM9260ID AT91SAM9260ID 1124
1134hw86052 MACH_HW86052 HW86052 1125
1135pilz_pmi3 MACH_PILZ_PMI3 PILZ_PMI3 1126
1136edb9302a MACH_EDB9302A EDB9302A 1127 220edb9302a MACH_EDB9302A EDB9302A 1127
1137edb9307a MACH_EDB9307A EDB9307A 1128 221edb9307a MACH_EDB9307A EDB9307A 1128
1138ct_dfs MACH_CT_DFS CT_DFS 1129
1139pilz_pmi4 MACH_PILZ_PMI4 PILZ_PMI4 1130
1140xceednp_ixp MACH_XCEEDNP_IXP XCEEDNP_IXP 1131
1141smdk2442b MACH_SMDK2442B SMDK2442B 1132
1142xnode MACH_XNODE XNODE 1133
1143aidx270 MACH_AIDX270 AIDX270 1134
1144rema MACH_REMA REMA 1135
1145bps1000 MACH_BPS1000 BPS1000 1136
1146hw90350 MACH_HW90350 HW90350 1137
1147omap_3430sdp MACH_OMAP_3430SDP OMAP_3430SDP 1138 222omap_3430sdp MACH_OMAP_3430SDP OMAP_3430SDP 1138
1148bluetouch MACH_BLUETOUCH BLUETOUCH 1139
1149vstms MACH_VSTMS VSTMS 1140 223vstms MACH_VSTMS VSTMS 1140
1150xsbase270 MACH_XSBASE270 XSBASE270 1141
1151at91sam9260ek_cn MACH_AT91SAM9260EK_CN AT91SAM9260EK_CN 1142
1152adsturboxb MACH_ADSTURBOXB ADSTURBOXB 1143
1153oti4110 MACH_OTI4110 OTI4110 1144
1154hme_pxa MACH_HME_PXA HME_PXA 1145
1155deisterdca MACH_DEISTERDCA DEISTERDCA 1146
1156ces_ssem2 MACH_CES_SSEM2 CES_SSEM2 1147
1157ces_mtr MACH_CES_MTR CES_MTR 1148
1158tds_avng_sbc MACH_TDS_AVNG_SBC TDS_AVNG_SBC 1149
1159everest MACH_EVEREST EVEREST 1150
1160pnx4010 MACH_PNX4010 PNX4010 1151
1161oxnas MACH_OXNAS OXNAS 1152
1162fiori MACH_FIORI FIORI 1153
1163ml1200 MACH_ML1200 ML1200 1154
1164pecos MACH_PECOS PECOS 1155
1165nb2xxx MACH_NB2XXX NB2XXX 1156
1166hw6900 MACH_HW6900 HW6900 1157
1167cdcs_quoll MACH_CDCS_QUOLL CDCS_QUOLL 1158
1168quicksilver MACH_QUICKSILVER QUICKSILVER 1159
1169uplat926 MACH_UPLAT926 UPLAT926 1160
1170dep2410_dep2410 MACH_DEP2410_THOMAS DEP2410_THOMAS 1161
1171dtk2410 MACH_DTK2410 DTK2410 1162
1172chili MACH_CHILI CHILI 1163
1173demeter MACH_DEMETER DEMETER 1164
1174dionysus MACH_DIONYSUS DIONYSUS 1165
1175as352x MACH_AS352X AS352X 1166
1176service MACH_SERVICE SERVICE 1167
1177cs_e9301 MACH_CS_E9301 CS_E9301 1168
1178micro9m MACH_MICRO9M MICRO9M 1169 224micro9m MACH_MICRO9M MICRO9M 1169
1179ia_mospck MACH_IA_MOSPCK IA_MOSPCK 1170
1180ql201b MACH_QL201B QL201B 1171
1181bbm MACH_BBM BBM 1174
1182exxx MACH_EXXX EXXX 1175
1183wma11b MACH_WMA11B WMA11B 1176
1184pelco_atlas MACH_PELCO_ATLAS PELCO_ATLAS 1177
1185g500 MACH_G500 G500 1178
1186bug MACH_BUG BUG 1179 225bug MACH_BUG BUG 1179
1187mx33ads MACH_MX33ADS MX33ADS 1180
1188chub MACH_CHUB CHUB 1181
1189neo1973_gta01 MACH_NEO1973_GTA01 NEO1973_GTA01 1182
1190w90n740 MACH_W90N740 W90N740 1183
1191medallion_sa2410 MACH_MEDALLION_SA2410 MEDALLION_SA2410 1184
1192ia_cpu_9200_2 MACH_IA_CPU_9200_2 IA_CPU_9200_2 1185
1193dimmrm9200 MACH_DIMMRM9200 DIMMRM9200 1186
1194pm9261 MACH_PM9261 PM9261 1187
1195ml7304 MACH_ML7304 ML7304 1189
1196ucp250 MACH_UCP250 UCP250 1190
1197intboard MACH_INTBOARD INTBOARD 1191
1198gulfstream MACH_GULFSTREAM GULFSTREAM 1192
1199labquest MACH_LABQUEST LABQUEST 1193
1200vcmx313 MACH_VCMX313 VCMX313 1194
1201urg200 MACH_URG200 URG200 1195
1202cpux255lcdnet MACH_CPUX255LCDNET CPUX255LCDNET 1196
1203netdcu9 MACH_NETDCU9 NETDCU9 1197
1204netdcu10 MACH_NETDCU10 NETDCU10 1198
1205dspg_dga MACH_DSPG_DGA DSPG_DGA 1199
1206dspg_dvw MACH_DSPG_DVW DSPG_DVW 1200
1207solos MACH_SOLOS SOLOS 1201
1208at91sam9263ek MACH_AT91SAM9263EK AT91SAM9263EK 1202 226at91sam9263ek MACH_AT91SAM9263EK AT91SAM9263EK 1202
1209osstbox MACH_OSSTBOX OSSTBOX 1203
1210kbat9261 MACH_KBAT9261 KBAT9261 1204
1211ct1100 MACH_CT1100 CT1100 1205
1212akcppxa MACH_AKCPPXA AKCPPXA 1206
1213ochaya1020 MACH_OCHAYA1020 OCHAYA1020 1207
1214hitrack MACH_HITRACK HITRACK 1208
1215syme1 MACH_SYME1 SYME1 1209
1216syhl1 MACH_SYHL1 SYHL1 1210
1217empca400 MACH_EMPCA400 EMPCA400 1211
1218em7210 MACH_EM7210 EM7210 1212 227em7210 MACH_EM7210 EM7210 1212
1219htchermes MACH_HTCHERMES HTCHERMES 1213
1220eti_c1 MACH_ETI_C1 ETI_C1 1214
1221ac100 MACH_AC100 AC100 1216
1222sneetch MACH_SNEETCH SNEETCH 1217
1223studentmate MACH_STUDENTMATE STUDENTMATE 1218
1224zir2410 MACH_ZIR2410 ZIR2410 1219
1225zir2413 MACH_ZIR2413 ZIR2413 1220
1226dlonip3 MACH_DLONIP3 DLONIP3 1221
1227instream MACH_INSTREAM INSTREAM 1222
1228ambarella MACH_AMBARELLA AMBARELLA 1223
1229nevis MACH_NEVIS NEVIS 1224
1230htc_trinity MACH_HTC_TRINITY HTC_TRINITY 1225
1231ql202b MACH_QL202B QL202B 1226
1232vpac270 MACH_VPAC270 VPAC270 1227 228vpac270 MACH_VPAC270 VPAC270 1227
1233rd129 MACH_RD129 RD129 1228
1234htcwizard MACH_HTCWIZARD HTCWIZARD 1229
1235treo680 MACH_TREO680 TREO680 1230 229treo680 MACH_TREO680 TREO680 1230
1236tecon_tmezon MACH_TECON_TMEZON TECON_TMEZON 1231
1237zylonite MACH_ZYLONITE ZYLONITE 1233 230zylonite MACH_ZYLONITE ZYLONITE 1233
1238gene1270 MACH_GENE1270 GENE1270 1234
1239zir2412 MACH_ZIR2412 ZIR2412 1235
1240mx31lite MACH_MX31LITE MX31LITE 1236 231mx31lite MACH_MX31LITE MX31LITE 1236
1241t700wx MACH_T700WX T700WX 1237
1242vf100 MACH_VF100 VF100 1238
1243nsb2 MACH_NSB2 NSB2 1239
1244nxhmi_bb MACH_NXHMI_BB NXHMI_BB 1240
1245nxhmi_re MACH_NXHMI_RE NXHMI_RE 1241
1246n4100pro MACH_N4100PRO N4100PRO 1242
1247sam9260 MACH_SAM9260 SAM9260 1243
1248omap_treo600 MACH_OMAP_TREO600 OMAP_TREO600 1244
1249indy2410 MACH_INDY2410 INDY2410 1245
1250nelt_a MACH_NELT_A NELT_A 1246
1251n311 MACH_N311 N311 1248
1252at91sam9260vgk MACH_AT91SAM9260VGK AT91SAM9260VGK 1249
1253at91leppe MACH_AT91LEPPE AT91LEPPE 1250
1254at91lepccn MACH_AT91LEPCCN AT91LEPCCN 1251
1255apc7100 MACH_APC7100 APC7100 1252
1256stargazer MACH_STARGAZER STARGAZER 1253
1257sonata MACH_SONATA SONATA 1254
1258schmoogie MACH_SCHMOOGIE SCHMOOGIE 1255
1259aztool MACH_AZTOOL AZTOOL 1256
1260mioa701 MACH_MIOA701 MIOA701 1257 232mioa701 MACH_MIOA701 MIOA701 1257
1261sxni9260 MACH_SXNI9260 SXNI9260 1258
1262mxc27520evb MACH_MXC27520EVB MXC27520EVB 1259
1263armadillo5x0 MACH_ARMADILLO5X0 ARMADILLO5X0 1260 233armadillo5x0 MACH_ARMADILLO5X0 ARMADILLO5X0 1260
1264mb9260 MACH_MB9260 MB9260 1261
1265mb9263 MACH_MB9263 MB9263 1262
1266ipac9302 MACH_IPAC9302 IPAC9302 1263
1267cc9p9360js MACH_CC9P9360JS CC9P9360JS 1264 234cc9p9360js MACH_CC9P9360JS CC9P9360JS 1264
1268gallium MACH_GALLIUM GALLIUM 1265
1269msc2410 MACH_MSC2410 MSC2410 1266
1270ghi270 MACH_GHI270 GHI270 1267
1271davinci_leonardo MACH_DAVINCI_LEONARDO DAVINCI_LEONARDO 1268
1272oiab MACH_OIAB OIAB 1269
1273smdk6400 MACH_SMDK6400 SMDK6400 1270 235smdk6400 MACH_SMDK6400 SMDK6400 1270
1274nokia_n800 MACH_NOKIA_N800 NOKIA_N800 1271 236nokia_n800 MACH_NOKIA_N800 NOKIA_N800 1271
1275greenphone MACH_GREENPHONE GREENPHONE 1272
1276compex42x MACH_COMPEXWP18 COMPEXWP18 1273
1277xmate MACH_XMATE XMATE 1274
1278energizer MACH_ENERGIZER ENERGIZER 1275
1279ime1 MACH_IME1 IME1 1276
1280sweda_tms MACH_SWEDATMS SWEDATMS 1277
1281ntnp435c MACH_NTNP435C NTNP435C 1278
1282spectro2 MACH_SPECTRO2 SPECTRO2 1279
1283h6039 MACH_H6039 H6039 1280
1284ep80219 MACH_EP80219 EP80219 1281 237ep80219 MACH_EP80219 EP80219 1281
1285samoa_ii MACH_SAMOA_II SAMOA_II 1282
1286cwmxl MACH_CWMXL CWMXL 1283
1287as9200 MACH_AS9200 AS9200 1284
1288sfx1149 MACH_SFX1149 SFX1149 1285
1289navi010 MACH_NAVI010 NAVI010 1286
1290multmdp MACH_MULTMDP MULTMDP 1287
1291scb9520 MACH_SCB9520 SCB9520 1288
1292htcathena MACH_HTCATHENA HTCATHENA 1289
1293xp179 MACH_XP179 XP179 1290
1294h4300 MACH_H4300 H4300 1291
1295goramo_mlr MACH_GORAMO_MLR GORAMO_MLR 1292 238goramo_mlr MACH_GORAMO_MLR GORAMO_MLR 1292
1296mxc30020evb MACH_MXC30020EVB MXC30020EVB 1293
1297adsbitsyg5 MACH_ADSBITSYG5 ADSBITSYG5 1294
1298adsportalplus MACH_ADSPORTALPLUS ADSPORTALPLUS 1295
1299mmsp2plus MACH_MMSP2PLUS MMSP2PLUS 1296
1300em_x270 MACH_EM_X270 EM_X270 1297 239em_x270 MACH_EM_X270 EM_X270 1297
1301tpp302 MACH_TPP302 TPP302 1298
1302tpp104 MACH_TPM104 TPM104 1299
1303tpm102 MACH_TPM102 TPM102 1300
1304tpm109 MACH_TPM109 TPM109 1301
1305fbxo1 MACH_FBXO1 FBXO1 1302
1306hxd8 MACH_HXD8 HXD8 1303
1307neo1973_gta02 MACH_NEO1973_GTA02 NEO1973_GTA02 1304 240neo1973_gta02 MACH_NEO1973_GTA02 NEO1973_GTA02 1304
1308emtest MACH_EMTEST EMTEST 1305
1309ad6900 MACH_AD6900 AD6900 1306
1310europa MACH_EUROPA EUROPA 1307
1311metroconnect MACH_METROCONNECT METROCONNECT 1308
1312ez_s2410 MACH_EZ_S2410 EZ_S2410 1309
1313ez_s2440 MACH_EZ_S2440 EZ_S2440 1310
1314ez_ep9312 MACH_EZ_EP9312 EZ_EP9312 1311
1315ez_ep9315 MACH_EZ_EP9315 EZ_EP9315 1312
1316ez_x7 MACH_EZ_X7 EZ_X7 1313
1317godotdb MACH_GODOTDB GODOTDB 1314
1318mistral MACH_MISTRAL MISTRAL 1315
1319msm MACH_MSM MSM 1316
1320ct5910 MACH_CT5910 CT5910 1317
1321ct5912 MACH_CT5912 CT5912 1318
1322hynet_ine MACH_HYNET_INE HYNET_INE 1319
1323hynet_app MACH_HYNET_APP HYNET_APP 1320
1324msm7200 MACH_MSM7200 MSM7200 1321
1325msm7600 MACH_MSM7600 MSM7600 1322
1326ceb255 MACH_CEB255 CEB255 1323
1327ciel MACH_CIEL CIEL 1324
1328slm5650 MACH_SLM5650 SLM5650 1325
1329at91sam9rlek MACH_AT91SAM9RLEK AT91SAM9RLEK 1326 241at91sam9rlek MACH_AT91SAM9RLEK AT91SAM9RLEK 1326
1330comtech_router MACH_COMTECH_ROUTER COMTECH_ROUTER 1327
1331sbc2410x MACH_SBC2410X SBC2410X 1328
1332at4x0bd MACH_AT4X0BD AT4X0BD 1329
1333cbifr MACH_CBIFR CBIFR 1330
1334arcom_quantum MACH_ARCOM_QUANTUM ARCOM_QUANTUM 1331
1335matrix520 MACH_MATRIX520 MATRIX520 1332
1336matrix510 MACH_MATRIX510 MATRIX510 1333
1337matrix500 MACH_MATRIX500 MATRIX500 1334
1338m501 MACH_M501 M501 1335
1339aaeon1270 MACH_AAEON1270 AAEON1270 1336
1340matrix500ev MACH_MATRIX500EV MATRIX500EV 1337
1341pac500 MACH_PAC500 PAC500 1338
1342pnx8181 MACH_PNX8181 PNX8181 1339
1343colibri320 MACH_COLIBRI320 COLIBRI320 1340 242colibri320 MACH_COLIBRI320 COLIBRI320 1340
1344aztoolbb MACH_AZTOOLBB AZTOOLBB 1341
1345aztoolg2 MACH_AZTOOLG2 AZTOOLG2 1342
1346dvlhost MACH_DVLHOST DVLHOST 1343
1347zir9200 MACH_ZIR9200 ZIR9200 1344
1348zir9260 MACH_ZIR9260 ZIR9260 1345
1349cocopah MACH_COCOPAH COCOPAH 1346
1350nds MACH_NDS NDS 1347
1351rosencrantz MACH_ROSENCRANTZ ROSENCRANTZ 1348
1352fttx_odsc MACH_FTTX_ODSC FTTX_ODSC 1349
1353classe_r6904 MACH_CLASSE_R6904 CLASSE_R6904 1350
1354cam60 MACH_CAM60 CAM60 1351 243cam60 MACH_CAM60 CAM60 1351
1355mxc30031ads MACH_MXC30031ADS MXC30031ADS 1352
1356datacall MACH_DATACALL DATACALL 1353
1357at91eb01 MACH_AT91EB01 AT91EB01 1354 244at91eb01 MACH_AT91EB01 AT91EB01 1354
1358rty MACH_RTY RTY 1355
1359dwl2100 MACH_DWL2100 DWL2100 1356
1360vinsi MACH_VINSI VINSI 1357
1361db88f5281 MACH_DB88F5281 DB88F5281 1358 245db88f5281 MACH_DB88F5281 DB88F5281 1358
1362csb726 MACH_CSB726 CSB726 1359 246csb726 MACH_CSB726 CSB726 1359
1363tik27 MACH_TIK27 TIK27 1360
1364mx_uc7420 MACH_MX_UC7420 MX_UC7420 1361
1365rirm3 MACH_RIRM3 RIRM3 1362
1366pelco_odyssey MACH_PELCO_ODYSSEY PELCO_ODYSSEY 1363
1367adx_abox MACH_ADX_ABOX ADX_ABOX 1365
1368adx_tpid MACH_ADX_TPID ADX_TPID 1366
1369minicheck MACH_MINICHECK MINICHECK 1367
1370idam MACH_IDAM IDAM 1368
1371mario_mx MACH_MARIO_MX MARIO_MX 1369
1372vi1888 MACH_VI1888 VI1888 1370
1373zr4230 MACH_ZR4230 ZR4230 1371
1374t1_ix_blue MACH_T1_IX_BLUE T1_IX_BLUE 1372
1375syhq2 MACH_SYHQ2 SYHQ2 1373
1376computime_r3 MACH_COMPUTIME_R3 COMPUTIME_R3 1374
1377oratis MACH_ORATIS ORATIS 1375
1378mikko MACH_MIKKO MIKKO 1376
1379holon MACH_HOLON HOLON 1377
1380olip8 MACH_OLIP8 OLIP8 1378
1381ghi270hg MACH_GHI270HG GHI270HG 1379
1382davinci_dm6467_evm MACH_DAVINCI_DM6467_EVM DAVINCI_DM6467_EVM 1380 247davinci_dm6467_evm MACH_DAVINCI_DM6467_EVM DAVINCI_DM6467_EVM 1380
1383davinci_dm355_evm MACH_DAVINCI_DM355_EVM DAVINCI_DM355_EVM 1381 248davinci_dm355_evm MACH_DAVINCI_DM355_EVM DAVINCI_DM355_EVM 1381
1384blackriver MACH_BLACKRIVER BLACKRIVER 1383
1385sandgate_wp MACH_SANDGATEWP SANDGATEWP 1384
1386cdotbwsg MACH_CDOTBWSG CDOTBWSG 1385
1387quark963 MACH_QUARK963 QUARK963 1386
1388csb735 MACH_CSB735 CSB735 1387
1389littleton MACH_LITTLETON LITTLETON 1388 249littleton MACH_LITTLETON LITTLETON 1388
1390mio_p550 MACH_MIO_P550 MIO_P550 1389
1391motion2440 MACH_MOTION2440 MOTION2440 1390
1392imm500 MACH_IMM500 IMM500 1391
1393homematic MACH_HOMEMATIC HOMEMATIC 1392
1394ermine MACH_ERMINE ERMINE 1393
1395kb9202b MACH_KB9202B KB9202B 1394
1396hs1xx MACH_HS1XX HS1XX 1395
1397studentmate2440 MACH_STUDENTMATE2440 STUDENTMATE2440 1396
1398arvoo_l1_z1 MACH_ARVOO_L1_Z1 ARVOO_L1_Z1 1397
1399dep2410k MACH_DEP2410K DEP2410K 1398
1400xxsvideo MACH_XXSVIDEO XXSVIDEO 1399
1401im4004 MACH_IM4004 IM4004 1400
1402ochaya1050 MACH_OCHAYA1050 OCHAYA1050 1401
1403lep9261 MACH_LEP9261 LEP9261 1402
1404svenmeb MACH_SVENMEB SVENMEB 1403
1405fortunet2ne MACH_FORTUNET2NE FORTUNET2NE 1404
1406nxhx MACH_NXHX NXHX 1406
1407realview_pb11mp MACH_REALVIEW_PB11MP REALVIEW_PB11MP 1407 250realview_pb11mp MACH_REALVIEW_PB11MP REALVIEW_PB11MP 1407
1408ids500 MACH_IDS500 IDS500 1408
1409ors_n725 MACH_ORS_N725 ORS_N725 1409
1410hsdarm MACH_HSDARM HSDARM 1410
1411sha_pon003 MACH_SHA_PON003 SHA_PON003 1411
1412sha_pon004 MACH_SHA_PON004 SHA_PON004 1412
1413sha_pon007 MACH_SHA_PON007 SHA_PON007 1413
1414sha_pon011 MACH_SHA_PON011 SHA_PON011 1414
1415h6042 MACH_H6042 H6042 1415
1416h6043 MACH_H6043 H6043 1416
1417looxc550 MACH_LOOXC550 LOOXC550 1417
1418cnty_titan MACH_CNTY_TITAN CNTY_TITAN 1418
1419app3xx MACH_APP3XX APP3XX 1419
1420sideoatsgrama MACH_SIDEOATSGRAMA SIDEOATSGRAMA 1420
1421treo700p MACH_TREO700P TREO700P 1421
1422treo700w MACH_TREO700W TREO700W 1422
1423treo750 MACH_TREO750 TREO750 1423
1424treo755p MACH_TREO755P TREO755P 1424
1425ezreganut9200 MACH_EZREGANUT9200 EZREGANUT9200 1425
1426sarge MACH_SARGE SARGE 1426
1427a696 MACH_A696 A696 1427
1428turtle1916 MACH_TURTLE TURTLE 1428
1429mx27_3ds MACH_MX27_3DS MX27_3DS 1430 251mx27_3ds MACH_MX27_3DS MX27_3DS 1430
1430bishop MACH_BISHOP BISHOP 1431
1431pxx MACH_PXX PXX 1432
1432redwood MACH_REDWOOD REDWOOD 1433
1433omap_2430dlp MACH_OMAP_2430DLP OMAP_2430DLP 1436
1434omap_2430osk MACH_OMAP_2430OSK OMAP_2430OSK 1437
1435sardine MACH_SARDINE SARDINE 1438
1436halibut MACH_HALIBUT HALIBUT 1439 252halibut MACH_HALIBUT HALIBUT 1439
1437trout MACH_TROUT TROUT 1440 253trout MACH_TROUT TROUT 1440
1438goldfish MACH_GOLDFISH GOLDFISH 1441
1439gesbc2440 MACH_GESBC2440 GESBC2440 1442
1440nomad MACH_NOMAD NOMAD 1443
1441rosalind MACH_ROSALIND ROSALIND 1444
1442cc9p9215 MACH_CC9P9215 CC9P9215 1445
1443cc9p9210 MACH_CC9P9210 CC9P9210 1446
1444cc9p9215js MACH_CC9P9215JS CC9P9215JS 1447
1445cc9p9210js MACH_CC9P9210JS CC9P9210JS 1448
1446nasffe MACH_NASFFE NASFFE 1449
1447tn2x0bd MACH_TN2X0BD TN2X0BD 1450
1448gwmpxa MACH_GWMPXA GWMPXA 1451
1449exyplus MACH_EXYPLUS EXYPLUS 1452
1450jadoo21 MACH_JADOO21 JADOO21 1453
1451looxn560 MACH_LOOXN560 LOOXN560 1454
1452bonsai MACH_BONSAI BONSAI 1455
1453adsmilgato MACH_ADSMILGATO ADSMILGATO 1456
1454gba MACH_GBA GBA 1457
1455h6044 MACH_H6044 H6044 1458
1456app MACH_APP APP 1459
1457tct_hammer MACH_TCT_HAMMER TCT_HAMMER 1460 254tct_hammer MACH_TCT_HAMMER TCT_HAMMER 1460
1458herald MACH_HERALD HERALD 1461 255herald MACH_HERALD HERALD 1461
1459artemis MACH_ARTEMIS ARTEMIS 1462
1460htctitan MACH_HTCTITAN HTCTITAN 1463
1461qranium MACH_QRANIUM QRANIUM 1464
1462adx_wsc2 MACH_ADX_WSC2 ADX_WSC2 1465
1463adx_medcom MACH_ADX_MEDCOM ADX_MEDCOM 1466
1464bboard MACH_BBOARD BBOARD 1467
1465cambria MACH_CAMBRIA CAMBRIA 1468
1466mt7xxx MACH_MT7XXX MT7XXX 1469
1467matrix512 MACH_MATRIX512 MATRIX512 1470
1468matrix522 MACH_MATRIX522 MATRIX522 1471
1469ipac5010 MACH_IPAC5010 IPAC5010 1472
1470sakura MACH_SAKURA SAKURA 1473
1471grocx MACH_GROCX GROCX 1474
1472pm9263 MACH_PM9263 PM9263 1475
1473sim_one MACH_SIM_ONE SIM_ONE 1476 256sim_one MACH_SIM_ONE SIM_ONE 1476
1474acq132 MACH_ACQ132 ACQ132 1477
1475datr MACH_DATR DATR 1478
1476actux1 MACH_ACTUX1 ACTUX1 1479
1477actux2 MACH_ACTUX2 ACTUX2 1480
1478actux3 MACH_ACTUX3 ACTUX3 1481
1479flexit MACH_FLEXIT FLEXIT 1482
1480bh2x0bd MACH_BH2X0BD BH2X0BD 1483
1481atb2002 MACH_ATB2002 ATB2002 1484
1482xenon MACH_XENON XENON 1485
1483fm607 MACH_FM607 FM607 1486
1484matrix514 MACH_MATRIX514 MATRIX514 1487
1485matrix524 MACH_MATRIX524 MATRIX524 1488
1486inpod MACH_INPOD INPOD 1489
1487jive MACH_JIVE JIVE 1490 257jive MACH_JIVE JIVE 1490
1488tll_mx21 MACH_TLL_MX21 TLL_MX21 1491
1489sbc2800 MACH_SBC2800 SBC2800 1492
1490cc7ucamry MACH_CC7UCAMRY CC7UCAMRY 1493
1491ubisys_p9_sc15 MACH_UBISYS_P9_SC15 UBISYS_P9_SC15 1494
1492ubisys_p9_ssc2d10 MACH_UBISYS_P9_SSC2D10 UBISYS_P9_SSC2D10 1495
1493ubisys_p9_rcu3 MACH_UBISYS_P9_RCU3 UBISYS_P9_RCU3 1496
1494aml_m8000 MACH_AML_M8000 AML_M8000 1497
1495snapper_270 MACH_SNAPPER_270 SNAPPER_270 1498
1496omap_bbx MACH_OMAP_BBX OMAP_BBX 1499
1497ucn2410 MACH_UCN2410 UCN2410 1500
1498sam9_l9260 MACH_SAM9_L9260 SAM9_L9260 1501 258sam9_l9260 MACH_SAM9_L9260 SAM9_L9260 1501
1499eti_c2 MACH_ETI_C2 ETI_C2 1502
1500avalanche MACH_AVALANCHE AVALANCHE 1503
1501realview_pb1176 MACH_REALVIEW_PB1176 REALVIEW_PB1176 1504 259realview_pb1176 MACH_REALVIEW_PB1176 REALVIEW_PB1176 1504
1502dp1500 MACH_DP1500 DP1500 1505
1503apple_iphone MACH_APPLE_IPHONE APPLE_IPHONE 1506
1504yl9200 MACH_YL9200 YL9200 1507 260yl9200 MACH_YL9200 YL9200 1507
1505rd88f5182 MACH_RD88F5182 RD88F5182 1508 261rd88f5182 MACH_RD88F5182 RD88F5182 1508
1506kurobox_pro MACH_KUROBOX_PRO KUROBOX_PRO 1509 262kurobox_pro MACH_KUROBOX_PRO KUROBOX_PRO 1509
1507se_poet MACH_SE_POET SE_POET 1510
1508mx31_3ds MACH_MX31_3DS MX31_3DS 1511 263mx31_3ds MACH_MX31_3DS MX31_3DS 1511
1509r270 MACH_R270 R270 1512
1510armour21 MACH_ARMOUR21 ARMOUR21 1513
1511dt2 MACH_DT2 DT2 1514
1512vt4 MACH_VT4 VT4 1515
1513tyco320 MACH_TYCO320 TYCO320 1516
1514adma MACH_ADMA ADMA 1517
1515wp188 MACH_WP188 WP188 1518
1516corsica MACH_CORSICA CORSICA 1519
1517bigeye MACH_BIGEYE BIGEYE 1520
1518tll5000 MACH_TLL5000 TLL5000 1522
1519bebot MACH_BEBOT BEBOT 1523
1520qong MACH_QONG QONG 1524 264qong MACH_QONG QONG 1524
1521tcompact MACH_TCOMPACT TCOMPACT 1525
1522puma5 MACH_PUMA5 PUMA5 1526
1523elara MACH_ELARA ELARA 1527
1524ellington MACH_ELLINGTON ELLINGTON 1528
1525xda_atom MACH_XDA_ATOM XDA_ATOM 1529
1526energizer2 MACH_ENERGIZER2 ENERGIZER2 1530
1527odin MACH_ODIN ODIN 1531
1528actux4 MACH_ACTUX4 ACTUX4 1532
1529esl_omap MACH_ESL_OMAP ESL_OMAP 1533
1530omap2evm MACH_OMAP2EVM OMAP2EVM 1534 265omap2evm MACH_OMAP2EVM OMAP2EVM 1534
1531omap3evm MACH_OMAP3EVM OMAP3EVM 1535 266omap3evm MACH_OMAP3EVM OMAP3EVM 1535
1532adx_pcu57 MACH_ADX_PCU57 ADX_PCU57 1536
1533monaco MACH_MONACO MONACO 1537
1534levante MACH_LEVANTE LEVANTE 1538
1535tmxipx425 MACH_TMXIPX425 TMXIPX425 1539
1536leep MACH_LEEP LEEP 1540
1537raad MACH_RAAD RAAD 1541
1538dns323 MACH_DNS323 DNS323 1542 267dns323 MACH_DNS323 DNS323 1542
1539ap1000 MACH_AP1000 AP1000 1543
1540a9sam6432 MACH_A9SAM6432 A9SAM6432 1544
1541shiny MACH_SHINY SHINY 1545
1542omap3_beagle MACH_OMAP3_BEAGLE OMAP3_BEAGLE 1546 268omap3_beagle MACH_OMAP3_BEAGLE OMAP3_BEAGLE 1546
1543csr_bdb2 MACH_CSR_BDB2 CSR_BDB2 1547
1544nokia_n810 MACH_NOKIA_N810 NOKIA_N810 1548 269nokia_n810 MACH_NOKIA_N810 NOKIA_N810 1548
1545c270 MACH_C270 C270 1549
1546sentry MACH_SENTRY SENTRY 1550
1547pcm038 MACH_PCM038 PCM038 1551 270pcm038 MACH_PCM038 PCM038 1551
1548anc300 MACH_ANC300 ANC300 1552
1549htckaiser MACH_HTCKAISER HTCKAISER 1553
1550sbat100 MACH_SBAT100 SBAT100 1554
1551modunorm MACH_MODUNORM MODUNORM 1555
1552pelos_twarm MACH_PELOS_TWARM PELOS_TWARM 1556
1553flank MACH_FLANK FLANK 1557
1554sirloin MACH_SIRLOIN SIRLOIN 1558
1555brisket MACH_BRISKET BRISKET 1559
1556chuck MACH_CHUCK CHUCK 1560
1557otter MACH_OTTER OTTER 1561
1558davinci_ldk MACH_DAVINCI_LDK DAVINCI_LDK 1562
1559phreedom MACH_PHREEDOM PHREEDOM 1563
1560sg310 MACH_SG310 SG310 1564
1561ts_x09 MACH_TS209 TS209 1565 271ts_x09 MACH_TS209 TS209 1565
1562at91cap9adk MACH_AT91CAP9ADK AT91CAP9ADK 1566 272at91cap9adk MACH_AT91CAP9ADK AT91CAP9ADK 1566
1563tion9315 MACH_TION9315 TION9315 1567
1564mast MACH_MAST MAST 1568
1565pfw MACH_PFW PFW 1569
1566yl_p2440 MACH_YL_P2440 YL_P2440 1570
1567zsbc32 MACH_ZSBC32 ZSBC32 1571
1568omap_pace2 MACH_OMAP_PACE2 OMAP_PACE2 1572
1569imx_pace2 MACH_IMX_PACE2 IMX_PACE2 1573
1570mx31moboard MACH_MX31MOBOARD MX31MOBOARD 1574 273mx31moboard MACH_MX31MOBOARD MX31MOBOARD 1574
1571mx37_3ds MACH_MX37_3DS MX37_3DS 1575
1572rcc MACH_RCC RCC 1576
1573dmp MACH_ARM9 ARM9 1577
1574vision_ep9307 MACH_VISION_EP9307 VISION_EP9307 1578
1575scly1000 MACH_SCLY1000 SCLY1000 1579
1576fontel_ep MACH_FONTEL_EP FONTEL_EP 1580
1577voiceblue3g MACH_VOICEBLUE3G VOICEBLUE3G 1581
1578tt9200 MACH_TT9200 TT9200 1582
1579digi2410 MACH_DIGI2410 DIGI2410 1583
1580terastation_pro2 MACH_TERASTATION_PRO2 TERASTATION_PRO2 1584 274terastation_pro2 MACH_TERASTATION_PRO2 TERASTATION_PRO2 1584
1581linkstation_pro MACH_LINKSTATION_PRO LINKSTATION_PRO 1585 275linkstation_pro MACH_LINKSTATION_PRO LINKSTATION_PRO 1585
1582motorola_a780 MACH_MOTOROLA_A780 MOTOROLA_A780 1587
1583motorola_e6 MACH_MOTOROLA_E6 MOTOROLA_E6 1588
1584motorola_e2 MACH_MOTOROLA_E2 MOTOROLA_E2 1589
1585motorola_e680 MACH_MOTOROLA_E680 MOTOROLA_E680 1590
1586ur2410 MACH_UR2410 UR2410 1591
1587tas9261 MACH_TAS9261 TAS9261 1592
1588davinci_hermes_hd MACH_HERMES_HD HERMES_HD 1593
1589davinci_perseo_hd MACH_PERSEO_HD PERSEO_HD 1594
1590stargazer2 MACH_STARGAZER2 STARGAZER2 1595
1591e350 MACH_E350 E350 1596 276e350 MACH_E350 E350 1596
1592wpcm450 MACH_WPCM450 WPCM450 1597
1593cartesio MACH_CARTESIO CARTESIO 1598
1594toybox MACH_TOYBOX TOYBOX 1599
1595tx27 MACH_TX27 TX27 1600
1596ts409 MACH_TS409 TS409 1601 277ts409 MACH_TS409 TS409 1601
1597p300 MACH_P300 P300 1602
1598xdacomet MACH_XDACOMET XDACOMET 1603
1599dexflex2 MACH_DEXFLEX2 DEXFLEX2 1604
1600ow MACH_OW OW 1605
1601armebs3 MACH_ARMEBS3 ARMEBS3 1606
1602u3 MACH_U3 U3 1607
1603smdk2450 MACH_SMDK2450 SMDK2450 1608
1604rsi_ews MACH_RSI_EWS RSI_EWS 1609
1605tnb MACH_TNB TNB 1610
1606toepath MACH_TOEPATH TOEPATH 1611
1607kb9263 MACH_KB9263 KB9263 1612
1608mt7108 MACH_MT7108 MT7108 1613
1609smtr2440 MACH_SMTR2440 SMTR2440 1614
1610manao MACH_MANAO MANAO 1615
1611cm_x300 MACH_CM_X300 CM_X300 1616 278cm_x300 MACH_CM_X300 CM_X300 1616
1612gulfstream_kp MACH_GULFSTREAM_KP GULFSTREAM_KP 1617
1613lanreadyfn522 MACH_LANREADYFN522 LANREADYFN522 1618
1614arma37 MACH_ARMA37 ARMA37 1619
1615mendel MACH_MENDEL MENDEL 1620
1616pelco_iliad MACH_PELCO_ILIAD PELCO_ILIAD 1621
1617unit2p MACH_UNIT2P UNIT2P 1622
1618inc20otter MACH_INC20OTTER INC20OTTER 1623
1619at91sam9g20ek MACH_AT91SAM9G20EK AT91SAM9G20EK 1624 279at91sam9g20ek MACH_AT91SAM9G20EK AT91SAM9G20EK 1624
1620sc_ge2 MACH_STORCENTER STORCENTER 1625
1621smdk6410 MACH_SMDK6410 SMDK6410 1626 280smdk6410 MACH_SMDK6410 SMDK6410 1626
1622u300 MACH_U300 U300 1627 281u300 MACH_U300 U300 1627
1623u500 MACH_U500 U500 1628
1624ds9260 MACH_DS9260 DS9260 1629
1625riverrock MACH_RIVERROCK RIVERROCK 1630
1626scibath MACH_SCIBATH SCIBATH 1631
1627at91sam7se MACH_AT91SAM7SE512EK AT91SAM7SE512EK 1632
1628wrt350n_v2 MACH_WRT350N_V2 WRT350N_V2 1633 282wrt350n_v2 MACH_WRT350N_V2 WRT350N_V2 1633
1629multimedia MACH_MULTIMEDIA MULTIMEDIA 1634
1630marvin MACH_MARVIN MARVIN 1635
1631x500 MACH_X500 X500 1636
1632awlug4lcu MACH_AWLUG4LCU AWLUG4LCU 1637
1633palermoc MACH_PALERMOC PALERMOC 1638
1634omap_ldp MACH_OMAP_LDP OMAP_LDP 1639 283omap_ldp MACH_OMAP_LDP OMAP_LDP 1639
1635ip500 MACH_IP500 IP500 1640
1636ase2 MACH_ASE2 ASE2 1642
1637mx35evb MACH_MX35EVB MX35EVB 1643
1638aml_m8050 MACH_AML_M8050 AML_M8050 1644
1639mx35_3ds MACH_MX35_3DS MX35_3DS 1645 284mx35_3ds MACH_MX35_3DS MX35_3DS 1645
1640mars MACH_MARS MARS 1646
1641neuros_osd2 MACH_NEUROS_OSD2 NEUROS_OSD2 1647 285neuros_osd2 MACH_NEUROS_OSD2 NEUROS_OSD2 1647
1642badger MACH_BADGER BADGER 1648
1643trizeps4wl MACH_TRIZEPS4WL TRIZEPS4WL 1649 286trizeps4wl MACH_TRIZEPS4WL TRIZEPS4WL 1649
1644trizeps5 MACH_TRIZEPS5 TRIZEPS5 1650
1645marlin MACH_MARLIN MARLIN 1651
1646ts78xx MACH_TS78XX TS78XX 1652 287ts78xx MACH_TS78XX TS78XX 1652
1647hpipaq214 MACH_HPIPAQ214 HPIPAQ214 1653
1648at572d940dcm MACH_AT572D940DCM AT572D940DCM 1654
1649ne1board MACH_NE1BOARD NE1BOARD 1655
1650zante MACH_ZANTE ZANTE 1656
1651sffsdr MACH_SFFSDR SFFSDR 1657 288sffsdr MACH_SFFSDR SFFSDR 1657
1652tw2662 MACH_TW2662 TW2662 1658
1653vf10xx MACH_VF10XX VF10XX 1659
1654zoran43xx MACH_ZORAN43XX ZORAN43XX 1660
1655sonix926 MACH_SONIX926 SONIX926 1661
1656celestialsemi MACH_CELESTIALSEMI CELESTIALSEMI 1662
1657cc9m2443js MACH_CC9M2443JS CC9M2443JS 1663
1658tw5334 MACH_TW5334 TW5334 1664
1659omap_htcartemis MACH_HTCARTEMIS HTCARTEMIS 1665
1660nal_hlite MACH_NAL_HLITE NAL_HLITE 1666
1661htcvogue MACH_HTCVOGUE HTCVOGUE 1667
1662smartweb MACH_SMARTWEB SMARTWEB 1668
1663mv86xx MACH_MV86XX MV86XX 1669
1664mv87xx MACH_MV87XX MV87XX 1670
1665songyoungho MACH_SONGYOUNGHO SONGYOUNGHO 1671
1666younghotema MACH_YOUNGHOTEMA YOUNGHOTEMA 1672
1667pcm037 MACH_PCM037 PCM037 1673 289pcm037 MACH_PCM037 PCM037 1673
1668mmvp MACH_MMVP MMVP 1674
1669mmap MACH_MMAP MMAP 1675
1670ptid2410 MACH_PTID2410 PTID2410 1676
1671james_926 MACH_JAMES_926 JAMES_926 1677
1672fm6000 MACH_FM6000 FM6000 1678
1673db88f6281_bp MACH_DB88F6281_BP DB88F6281_BP 1680 290db88f6281_bp MACH_DB88F6281_BP DB88F6281_BP 1680
1674rd88f6192_nas MACH_RD88F6192_NAS RD88F6192_NAS 1681 291rd88f6192_nas MACH_RD88F6192_NAS RD88F6192_NAS 1681
1675rd88f6281 MACH_RD88F6281 RD88F6281 1682 292rd88f6281 MACH_RD88F6281 RD88F6281 1682
1676db78x00_bp MACH_DB78X00_BP DB78X00_BP 1683 293db78x00_bp MACH_DB78X00_BP DB78X00_BP 1683
1677smdk2416 MACH_SMDK2416 SMDK2416 1685 294smdk2416 MACH_SMDK2416 SMDK2416 1685
1678oce_spider_si MACH_OCE_SPIDER_SI OCE_SPIDER_SI 1686
1679oce_spider_sk MACH_OCE_SPIDER_SK OCE_SPIDER_SK 1687
1680rovern6 MACH_ROVERN6 ROVERN6 1688
1681pelco_evolution MACH_PELCO_EVOLUTION PELCO_EVOLUTION 1689
1682wbd111 MACH_WBD111 WBD111 1690 295wbd111 MACH_WBD111 WBD111 1690
1683elaracpe MACH_ELARACPE ELARACPE 1691
1684mabv3 MACH_MABV3 MABV3 1692
1685mv2120 MACH_MV2120 MV2120 1693 296mv2120 MACH_MV2120 MV2120 1693
1686csb737 MACH_CSB737 CSB737 1695
1687mx51_3ds MACH_MX51_3DS MX51_3DS 1696 297mx51_3ds MACH_MX51_3DS MX51_3DS 1696
1688g900 MACH_G900 G900 1697
1689apf27 MACH_APF27 APF27 1698
1690ggus2000 MACH_GGUS2000 GGUS2000 1699
1691omap_2430_mimic MACH_OMAP_2430_MIMIC OMAP_2430_MIMIC 1700
1692imx27lite MACH_IMX27LITE IMX27LITE 1701 298imx27lite MACH_IMX27LITE IMX27LITE 1701
1693almex MACH_ALMEX ALMEX 1702
1694control MACH_CONTROL CONTROL 1703
1695mba2410 MACH_MBA2410 MBA2410 1704
1696volcano MACH_VOLCANO VOLCANO 1705
1697zenith MACH_ZENITH ZENITH 1706
1698muchip MACH_MUCHIP MUCHIP 1707
1699magellan MACH_MAGELLAN MAGELLAN 1708
1700usb_a9260 MACH_USB_A9260 USB_A9260 1709 299usb_a9260 MACH_USB_A9260 USB_A9260 1709
1701usb_a9263 MACH_USB_A9263 USB_A9263 1710 300usb_a9263 MACH_USB_A9263 USB_A9263 1710
1702qil_a9260 MACH_QIL_A9260 QIL_A9260 1711 301qil_a9260 MACH_QIL_A9260 QIL_A9260 1711
1703cme9210 MACH_CME9210 CME9210 1712
1704hczh4 MACH_HCZH4 HCZH4 1713
1705spearbasic MACH_SPEARBASIC SPEARBASIC 1714
1706dep2440 MACH_DEP2440 DEP2440 1715
1707hdl_gxr MACH_HDL_GXR HDL_GXR 1716
1708hdl_gt MACH_HDL_GT HDL_GT 1717
1709hdl_4g MACH_HDL_4G HDL_4G 1718
1710s3c6000 MACH_S3C6000 S3C6000 1719
1711mmsp2_mdk MACH_MMSP2_MDK MMSP2_MDK 1720
1712mpx220 MACH_MPX220 MPX220 1721
1713kzm_arm11_01 MACH_KZM_ARM11_01 KZM_ARM11_01 1722 302kzm_arm11_01 MACH_KZM_ARM11_01 KZM_ARM11_01 1722
1714htc_polaris MACH_HTC_POLARIS HTC_POLARIS 1723
1715htc_kaiser MACH_HTC_KAISER HTC_KAISER 1724
1716lg_ks20 MACH_LG_KS20 LG_KS20 1725
1717hhgps MACH_HHGPS HHGPS 1726
1718nokia_n810_wimax MACH_NOKIA_N810_WIMAX NOKIA_N810_WIMAX 1727 303nokia_n810_wimax MACH_NOKIA_N810_WIMAX NOKIA_N810_WIMAX 1727
1719insight MACH_INSIGHT INSIGHT 1728
1720sapphire MACH_SAPPHIRE SAPPHIRE 1729 304sapphire MACH_SAPPHIRE SAPPHIRE 1729
1721csb637xo MACH_CSB637XO CSB637XO 1730
1722evisiong MACH_EVISIONG EVISIONG 1731
1723stmp37xx MACH_STMP37XX STMP37XX 1732 305stmp37xx MACH_STMP37XX STMP37XX 1732
1724stmp378x MACH_STMP378X STMP378X 1733 306stmp378x MACH_STMP378X STMP378X 1733
1725tnt MACH_TNT TNT 1734
1726tbxt MACH_TBXT TBXT 1735
1727playmate MACH_PLAYMATE PLAYMATE 1736
1728pns10 MACH_PNS10 PNS10 1737
1729eznavi MACH_EZNAVI EZNAVI 1738
1730ps4000 MACH_PS4000 PS4000 1739
1731ezx_a780 MACH_EZX_A780 EZX_A780 1740 307ezx_a780 MACH_EZX_A780 EZX_A780 1740
1732ezx_e680 MACH_EZX_E680 EZX_E680 1741 308ezx_e680 MACH_EZX_E680 EZX_E680 1741
1733ezx_a1200 MACH_EZX_A1200 EZX_A1200 1742 309ezx_a1200 MACH_EZX_A1200 EZX_A1200 1742
1734ezx_e6 MACH_EZX_E6 EZX_E6 1743 310ezx_e6 MACH_EZX_E6 EZX_E6 1743
1735ezx_e2 MACH_EZX_E2 EZX_E2 1744 311ezx_e2 MACH_EZX_E2 EZX_E2 1744
1736ezx_a910 MACH_EZX_A910 EZX_A910 1745 312ezx_a910 MACH_EZX_A910 EZX_A910 1745
1737cwmx31 MACH_CWMX31 CWMX31 1746
1738sl2312 MACH_SL2312 SL2312 1747
1739blenny MACH_BLENNY BLENNY 1748
1740ds107 MACH_DS107 DS107 1749
1741dsx07 MACH_DSX07 DSX07 1750
1742picocom1 MACH_PICOCOM1 PICOCOM1 1751
1743lynx_wolverine MACH_LYNX_WOLVERINE LYNX_WOLVERINE 1752
1744ubisys_p9_sc19 MACH_UBISYS_P9_SC19 UBISYS_P9_SC19 1753
1745kratos_low MACH_KRATOS_LOW KRATOS_LOW 1754
1746m700 MACH_M700 M700 1755
1747edmini_v2 MACH_EDMINI_V2 EDMINI_V2 1756 313edmini_v2 MACH_EDMINI_V2 EDMINI_V2 1756
1748zipit2 MACH_ZIPIT2 ZIPIT2 1757 314zipit2 MACH_ZIPIT2 ZIPIT2 1757
1749hslfemtocell MACH_HSLFEMTOCELL HSLFEMTOCELL 1758
1750daintree_at91 MACH_DAINTREE_AT91 DAINTREE_AT91 1759
1751sg560usb MACH_SG560USB SG560USB 1760
1752omap3_pandora MACH_OMAP3_PANDORA OMAP3_PANDORA 1761 315omap3_pandora MACH_OMAP3_PANDORA OMAP3_PANDORA 1761
1753usr8200 MACH_USR8200 USR8200 1762
1754s1s65k MACH_S1S65K S1S65K 1763
1755s2s65a MACH_S2S65A S2S65A 1764
1756icore MACH_ICORE ICORE 1765
1757mss2 MACH_MSS2 MSS2 1766 316mss2 MACH_MSS2 MSS2 1766
1758belmont MACH_BELMONT BELMONT 1767
1759asusp525 MACH_ASUSP525 ASUSP525 1768
1760lb88rc8480 MACH_LB88RC8480 LB88RC8480 1769 317lb88rc8480 MACH_LB88RC8480 LB88RC8480 1769
1761hipxa MACH_HIPXA HIPXA 1770
1762mx25_3ds MACH_MX25_3DS MX25_3DS 1771 318mx25_3ds MACH_MX25_3DS MX25_3DS 1771
1763m800 MACH_M800 M800 1772
1764omap3530_lv_som MACH_OMAP3530_LV_SOM OMAP3530_LV_SOM 1773 319omap3530_lv_som MACH_OMAP3530_LV_SOM OMAP3530_LV_SOM 1773
1765prima_evb MACH_PRIMA_EVB PRIMA_EVB 1774
1766mx31bt1 MACH_MX31BT1 MX31BT1 1775
1767atlas4_evb MACH_ATLAS4_EVB ATLAS4_EVB 1776
1768mx31cicada MACH_MX31CICADA MX31CICADA 1777
1769mi424wr MACH_MI424WR MI424WR 1778
1770axs_ultrax MACH_AXS_ULTRAX AXS_ULTRAX 1779
1771at572d940deb MACH_AT572D940DEB AT572D940DEB 1780
1772davinci_da830_evm MACH_DAVINCI_DA830_EVM DAVINCI_DA830_EVM 1781 320davinci_da830_evm MACH_DAVINCI_DA830_EVM DAVINCI_DA830_EVM 1781
1773ep9302 MACH_EP9302 EP9302 1782
1774at572d940hfek MACH_AT572D940HFEB AT572D940HFEB 1783 321at572d940hfek MACH_AT572D940HFEB AT572D940HFEB 1783
1775cybook3 MACH_CYBOOK3 CYBOOK3 1784
1776wdg002 MACH_WDG002 WDG002 1785
1777sg560adsl MACH_SG560ADSL SG560ADSL 1786
1778nextio_n2800_ica MACH_NEXTIO_N2800_ICA NEXTIO_N2800_ICA 1787
1779dove_db MACH_DOVE_DB DOVE_DB 1788 322dove_db MACH_DOVE_DB DOVE_DB 1788
1780marvell_newdb MACH_MARVELL_NEWDB MARVELL_NEWDB 1789
1781vandihud MACH_VANDIHUD VANDIHUD 1790
1782magx_e8 MACH_MAGX_E8 MAGX_E8 1791
1783magx_z6 MACH_MAGX_Z6 MAGX_Z6 1792
1784magx_v8 MACH_MAGX_V8 MAGX_V8 1793
1785magx_u9 MACH_MAGX_U9 MAGX_U9 1794
1786toughcf08 MACH_TOUGHCF08 TOUGHCF08 1795
1787zw4400 MACH_ZW4400 ZW4400 1796
1788marat91 MACH_MARAT91 MARAT91 1797
1789overo MACH_OVERO OVERO 1798 323overo MACH_OVERO OVERO 1798
1790at2440evb MACH_AT2440EVB AT2440EVB 1799 324at2440evb MACH_AT2440EVB AT2440EVB 1799
1791neocore926 MACH_NEOCORE926 NEOCORE926 1800 325neocore926 MACH_NEOCORE926 NEOCORE926 1800
1792wnr854t MACH_WNR854T WNR854T 1801 326wnr854t MACH_WNR854T WNR854T 1801
1793imx27 MACH_IMX27 IMX27 1802
1794moose_db MACH_MOOSE_DB MOOSE_DB 1803
1795fab4 MACH_FAB4 FAB4 1804
1796htcdiamond MACH_HTCDIAMOND HTCDIAMOND 1805
1797fiona MACH_FIONA FIONA 1806
1798mxc30030_x MACH_MXC30030_X MXC30030_X 1807
1799bmp1000 MACH_BMP1000 BMP1000 1808
1800logi9200 MACH_LOGI9200 LOGI9200 1809
1801tqma31 MACH_TQMA31 TQMA31 1810
1802ccw9p9215js MACH_CCW9P9215JS CCW9P9215JS 1811
1803rd88f5181l_ge MACH_RD88F5181L_GE RD88F5181L_GE 1812 327rd88f5181l_ge MACH_RD88F5181L_GE RD88F5181L_GE 1812
1804sifmain MACH_SIFMAIN SIFMAIN 1813
1805sam9_l9261 MACH_SAM9_L9261 SAM9_L9261 1814
1806cc9m2443 MACH_CC9M2443 CC9M2443 1815
1807xaria300 MACH_XARIA300 XARIA300 1816
1808it9200 MACH_IT9200 IT9200 1817
1809rd88f5181l_fxo MACH_RD88F5181L_FXO RD88F5181L_FXO 1818 328rd88f5181l_fxo MACH_RD88F5181L_FXO RD88F5181L_FXO 1818
1810kriss_sensor MACH_KRISS_SENSOR KRISS_SENSOR 1819
1811pilz_pmi5 MACH_PILZ_PMI5 PILZ_PMI5 1820
1812jade MACH_JADE JADE 1821
1813ks8695_softplc MACH_KS8695_SOFTPLC KS8695_SOFTPLC 1822
1814gprisc3 MACH_GPRISC3 GPRISC3 1823
1815stamp9g20 MACH_STAMP9G20 STAMP9G20 1824 329stamp9g20 MACH_STAMP9G20 STAMP9G20 1824
1816smdk6430 MACH_SMDK6430 SMDK6430 1825
1817smdkc100 MACH_SMDKC100 SMDKC100 1826 330smdkc100 MACH_SMDKC100 SMDKC100 1826
1818tavorevb MACH_TAVOREVB TAVOREVB 1827 331tavorevb MACH_TAVOREVB TAVOREVB 1827
1819saar MACH_SAAR SAAR 1828 332saar MACH_SAAR SAAR 1828
1820deister_eyecam MACH_DEISTER_EYECAM DEISTER_EYECAM 1829
1821at91sam9m10g45ek MACH_AT91SAM9M10G45EK AT91SAM9M10G45EK 1830 333at91sam9m10g45ek MACH_AT91SAM9M10G45EK AT91SAM9M10G45EK 1830
1822linkstation_produo MACH_LINKSTATION_PRODUO LINKSTATION_PRODUO 1831
1823hit_b0 MACH_HIT_B0 HIT_B0 1832
1824adx_rmu MACH_ADX_RMU ADX_RMU 1833
1825xg_cpe_main MACH_XG_CPE_MAIN XG_CPE_MAIN 1834
1826edb9407a MACH_EDB9407A EDB9407A 1835
1827dtb9608 MACH_DTB9608 DTB9608 1836
1828em104v1 MACH_EM104V1 EM104V1 1837
1829demo MACH_DEMO DEMO 1838
1830logi9260 MACH_LOGI9260 LOGI9260 1839
1831mx31_exm32 MACH_MX31_EXM32 MX31_EXM32 1840
1832usb_a9g20 MACH_USB_A9G20 USB_A9G20 1841
1833picproje2008 MACH_PICPROJE2008 PICPROJE2008 1842
1834cs_e9315 MACH_CS_E9315 CS_E9315 1843
1835qil_a9g20 MACH_QIL_A9G20 QIL_A9G20 1844
1836sha_pon020 MACH_SHA_PON020 SHA_PON020 1845
1837nad MACH_NAD NAD 1846
1838sbc35_a9260 MACH_SBC35_A9260 SBC35_A9260 1847
1839sbc35_a9g20 MACH_SBC35_A9G20 SBC35_A9G20 1848
1840davinci_beginning MACH_DAVINCI_BEGINNING DAVINCI_BEGINNING 1849
1841uwc MACH_UWC UWC 1850
1842mxlads MACH_MXLADS MXLADS 1851 334mxlads MACH_MXLADS MXLADS 1851
1843htcnike MACH_HTCNIKE HTCNIKE 1852
1844deister_pxa270 MACH_DEISTER_PXA270 DEISTER_PXA270 1853
1845cme9210js MACH_CME9210JS CME9210JS 1854
1846cc9p9360 MACH_CC9P9360 CC9P9360 1855
1847mocha MACH_MOCHA MOCHA 1856
1848wapd170ag MACH_WAPD170AG WAPD170AG 1857
1849linkstation_mini MACH_LINKSTATION_MINI LINKSTATION_MINI 1858 335linkstation_mini MACH_LINKSTATION_MINI LINKSTATION_MINI 1858
1850afeb9260 MACH_AFEB9260 AFEB9260 1859 336afeb9260 MACH_AFEB9260 AFEB9260 1859
1851w90x900 MACH_W90X900 W90X900 1860
1852w90x700 MACH_W90X700 W90X700 1861
1853kt300ip MACH_KT300IP KT300IP 1862
1854kt300ip_g20 MACH_KT300IP_G20 KT300IP_G20 1863
1855srcm MACH_SRCM SRCM 1864
1856wlnx_9260 MACH_WLNX_9260 WLNX_9260 1865
1857openmoko_gta03 MACH_OPENMOKO_GTA03 OPENMOKO_GTA03 1866
1858osprey2 MACH_OSPREY2 OSPREY2 1867
1859kbio9260 MACH_KBIO9260 KBIO9260 1868
1860ginza MACH_GINZA GINZA 1869
1861a636n MACH_A636N A636N 1870
1862imx27ipcam MACH_IMX27IPCAM IMX27IPCAM 1871 337imx27ipcam MACH_IMX27IPCAM IMX27IPCAM 1871
1863nemoc MACH_NEMOC NEMOC 1872
1864geneva MACH_GENEVA GENEVA 1873
1865htcpharos MACH_HTCPHAROS HTCPHAROS 1874
1866neonc MACH_NEONC NEONC 1875
1867nas7100 MACH_NAS7100 NAS7100 1876
1868teuphone MACH_TEUPHONE TEUPHONE 1877
1869annax_eth2 MACH_ANNAX_ETH2 ANNAX_ETH2 1878
1870csb733 MACH_CSB733 CSB733 1879
1871bk3 MACH_BK3 BK3 1880
1872omap_em32 MACH_OMAP_EM32 OMAP_EM32 1881
1873et9261cp MACH_ET9261CP ET9261CP 1882
1874jasperc MACH_JASPERC JASPERC 1883
1875issi_arm9 MACH_ISSI_ARM9 ISSI_ARM9 1884
1876ued MACH_UED UED 1885
1877esiblade MACH_ESIBLADE ESIBLADE 1886
1878eye02 MACH_EYE02 EYE02 1887
1879imx27kbd MACH_IMX27KBD IMX27KBD 1888
1880sst61vc010_fpga MACH_SST61VC010_FPGA SST61VC010_FPGA 1889
1881kixvp435 MACH_KIXVP435 KIXVP435 1890
1882kixnp435 MACH_KIXNP435 KIXNP435 1891
1883africa MACH_AFRICA AFRICA 1892
1884nh233 MACH_NH233 NH233 1893
1885rd88f6183ap_ge MACH_RD88F6183AP_GE RD88F6183AP_GE 1894 338rd88f6183ap_ge MACH_RD88F6183AP_GE RD88F6183AP_GE 1894
1886bcm4760 MACH_BCM4760 BCM4760 1895
1887eddy_v2 MACH_EDDY_V2 EDDY_V2 1896
1888realview_pba8 MACH_REALVIEW_PBA8 REALVIEW_PBA8 1897 339realview_pba8 MACH_REALVIEW_PBA8 REALVIEW_PBA8 1897
1889hid_a7 MACH_HID_A7 HID_A7 1898
1890hero MACH_HERO HERO 1899
1891omap_poseidon MACH_OMAP_POSEIDON OMAP_POSEIDON 1900
1892realview_pbx MACH_REALVIEW_PBX REALVIEW_PBX 1901 340realview_pbx MACH_REALVIEW_PBX REALVIEW_PBX 1901
1893micro9s MACH_MICRO9S MICRO9S 1902 341micro9s MACH_MICRO9S MICRO9S 1902
1894mako MACH_MAKO MAKO 1903
1895xdaflame MACH_XDAFLAME XDAFLAME 1904
1896phidget_sbc2 MACH_PHIDGET_SBC2 PHIDGET_SBC2 1905
1897limestone MACH_LIMESTONE LIMESTONE 1906
1898iprobe_c32 MACH_IPROBE_C32 IPROBE_C32 1907
1899rut100 MACH_RUT100 RUT100 1908 342rut100 MACH_RUT100 RUT100 1908
1900asusp535 MACH_ASUSP535 ASUSP535 1909
1901htcraphael MACH_HTCRAPHAEL HTCRAPHAEL 1910
1902sygdg1 MACH_SYGDG1 SYGDG1 1911
1903sygdg2 MACH_SYGDG2 SYGDG2 1912
1904seoul MACH_SEOUL SEOUL 1913
1905salerno MACH_SALERNO SALERNO 1914
1906ucn_s3c64xx MACH_UCN_S3C64XX UCN_S3C64XX 1915
1907msm7201a MACH_MSM7201A MSM7201A 1916
1908lpr1 MACH_LPR1 LPR1 1917
1909armadillo500fx MACH_ARMADILLO500FX ARMADILLO500FX 1918
1910g3evm MACH_G3EVM G3EVM 1919 343g3evm MACH_G3EVM G3EVM 1919
1911z3_dm355 MACH_Z3_DM355 Z3_DM355 1920
1912w90p910evb MACH_W90P910EVB W90P910EVB 1921 344w90p910evb MACH_W90P910EVB W90P910EVB 1921
1913w90p920evb MACH_W90P920EVB W90P920EVB 1922
1914w90p950evb MACH_W90P950EVB W90P950EVB 1923 345w90p950evb MACH_W90P950EVB W90P950EVB 1923
1915w90n960evb MACH_W90N960EVB W90N960EVB 1924 346w90n960evb MACH_W90N960EVB W90N960EVB 1924
1916camhd MACH_CAMHD CAMHD 1925
1917mvc100 MACH_MVC100 MVC100 1926
1918electrum_200 MACH_ELECTRUM_200 ELECTRUM_200 1927
1919htcjade MACH_HTCJADE HTCJADE 1928
1920memphis MACH_MEMPHIS MEMPHIS 1929
1921imx27sbc MACH_IMX27SBC IMX27SBC 1930
1922lextar MACH_LEXTAR LEXTAR 1931
1923mv88f6281gtw_ge MACH_MV88F6281GTW_GE MV88F6281GTW_GE 1932 347mv88f6281gtw_ge MACH_MV88F6281GTW_GE MV88F6281GTW_GE 1932
1924ncp MACH_NCP NCP 1933 348ncp MACH_NCP NCP 1933
1925z32an_series MACH_Z32AN Z32AN 1934
1926tmq_capd MACH_TMQ_CAPD TMQ_CAPD 1935
1927omap3_wl MACH_OMAP3_WL OMAP3_WL 1936
1928chumby MACH_CHUMBY CHUMBY 1937
1929atsarm9 MACH_ATSARM9 ATSARM9 1938
1930davinci_dm365_evm MACH_DAVINCI_DM365_EVM DAVINCI_DM365_EVM 1939 349davinci_dm365_evm MACH_DAVINCI_DM365_EVM DAVINCI_DM365_EVM 1939
1931bahamas MACH_BAHAMAS BAHAMAS 1940
1932das MACH_DAS DAS 1941
1933minidas MACH_MINIDAS MINIDAS 1942
1934vk1000 MACH_VK1000 VK1000 1943
1935centro MACH_CENTRO CENTRO 1944 350centro MACH_CENTRO CENTRO 1944
1936ctera_2bay MACH_CTERA_2BAY CTERA_2BAY 1945
1937edgeconnect MACH_EDGECONNECT EDGECONNECT 1946
1938nd27000 MACH_ND27000 ND27000 1947
1939cobra MACH_GEMALTO_COBRA GEMALTO_COBRA 1948
1940ingelabs_comet MACH_INGELABS_COMET INGELABS_COMET 1949
1941pollux_wiz MACH_POLLUX_WIZ POLLUX_WIZ 1950
1942blackstone MACH_BLACKSTONE BLACKSTONE 1951
1943topaz MACH_TOPAZ TOPAZ 1952
1944aixle MACH_AIXLE AIXLE 1953
1945mw998 MACH_MW998 MW998 1954
1946nokia_rx51 MACH_NOKIA_RX51 NOKIA_RX51 1955 351nokia_rx51 MACH_NOKIA_RX51 NOKIA_RX51 1955
1947vsc5605ev MACH_VSC5605EV VSC5605EV 1956
1948nt98700dk MACH_NT98700DK NT98700DK 1957
1949icontact MACH_ICONTACT ICONTACT 1958
1950swarco_frcpu MACH_SWARCO_FRCPU SWARCO_FRCPU 1959
1951swarco_scpu MACH_SWARCO_SCPU SWARCO_SCPU 1960
1952bbox_p16 MACH_BBOX_P16 BBOX_P16 1961
1953bstd MACH_BSTD BSTD 1962
1954sbc2440ii MACH_SBC2440II SBC2440II 1963
1955pcm034 MACH_PCM034 PCM034 1964
1956neso MACH_NESO NESO 1965
1957wlnx_9g20 MACH_WLNX_9G20 WLNX_9G20 1966
1958omap_zoom2 MACH_OMAP_ZOOM2 OMAP_ZOOM2 1967 352omap_zoom2 MACH_OMAP_ZOOM2 OMAP_ZOOM2 1967
1959totemnova MACH_TOTEMNOVA TOTEMNOVA 1968
1960c5000 MACH_C5000 C5000 1969
1961unipo_at91sam9263 MACH_UNIPO_AT91SAM9263 UNIPO_AT91SAM9263 1970
1962ethernut5 MACH_ETHERNUT5 ETHERNUT5 1971
1963arm11 MACH_ARM11 ARM11 1972
1964cpuat9260 MACH_CPUAT9260 CPUAT9260 1973 353cpuat9260 MACH_CPUAT9260 CPUAT9260 1973
1965cpupxa255 MACH_CPUPXA255 CPUPXA255 1974
1966eukrea_cpuimx27 MACH_CPUIMX27 CPUIMX27 1975 354eukrea_cpuimx27 MACH_CPUIMX27 CPUIMX27 1975
1967cheflux MACH_CHEFLUX CHEFLUX 1976
1968eb_cpux9k2 MACH_EB_CPUX9K2 EB_CPUX9K2 1977
1969opcotec MACH_OPCOTEC OPCOTEC 1978
1970yt MACH_YT YT 1979
1971motoq MACH_MOTOQ MOTOQ 1980
1972bsb1 MACH_BSB1 BSB1 1981
1973acs5k MACH_ACS5K ACS5K 1982 355acs5k MACH_ACS5K ACS5K 1982
1974milan MACH_MILAN MILAN 1983
1975quartzv2 MACH_QUARTZV2 QUARTZV2 1984
1976rsvp MACH_RSVP RSVP 1985
1977rmp200 MACH_RMP200 RMP200 1986
1978snapper_9260 MACH_SNAPPER_9260 SNAPPER_9260 1987 356snapper_9260 MACH_SNAPPER_9260 SNAPPER_9260 1987
1979dsm320 MACH_DSM320 DSM320 1988 357dsm320 MACH_DSM320 DSM320 1988
1980adsgcm MACH_ADSGCM ADSGCM 1989
1981ase2_400 MACH_ASE2_400 ASE2_400 1990
1982pizza MACH_PIZZA PIZZA 1991
1983spot_ngpl MACH_SPOT_NGPL SPOT_NGPL 1992
1984armata MACH_ARMATA ARMATA 1993
1985exeda MACH_EXEDA EXEDA 1994 358exeda MACH_EXEDA EXEDA 1994
1986mx31sf005 MACH_MX31SF005 MX31SF005 1995
1987f5d8231_4_v2 MACH_F5D8231_4_V2 F5D8231_4_V2 1996
1988q2440 MACH_Q2440 Q2440 1997
1989qq2440 MACH_QQ2440 QQ2440 1998
1990mini2440 MACH_MINI2440 MINI2440 1999 359mini2440 MACH_MINI2440 MINI2440 1999
1991colibri300 MACH_COLIBRI300 COLIBRI300 2000 360colibri300 MACH_COLIBRI300 COLIBRI300 2000
1992jades MACH_JADES JADES 2001
1993spark MACH_SPARK SPARK 2002
1994benzina MACH_BENZINA BENZINA 2003
1995blaze MACH_BLAZE BLAZE 2004
1996linkstation_ls_hgl MACH_LINKSTATION_LS_HGL LINKSTATION_LS_HGL 2005 361linkstation_ls_hgl MACH_LINKSTATION_LS_HGL LINKSTATION_LS_HGL 2005
1997htckovsky MACH_HTCKOVSKY HTCKOVSKY 2006
1998sony_prs505 MACH_SONY_PRS505 SONY_PRS505 2007
1999hanlin_v3 MACH_HANLIN_V3 HANLIN_V3 2008
2000sapphira MACH_SAPPHIRA SAPPHIRA 2009
2001dack_sda_01 MACH_DACK_SDA_01 DACK_SDA_01 2010
2002armbox MACH_ARMBOX ARMBOX 2011
2003harris_rvp MACH_HARRIS_RVP HARRIS_RVP 2012
2004ribaldo MACH_RIBALDO RIBALDO 2013
2005agora MACH_AGORA AGORA 2014
2006omap3_mini MACH_OMAP3_MINI OMAP3_MINI 2015
2007a9sam6432_b MACH_A9SAM6432_B A9SAM6432_B 2016
2008usg2410 MACH_USG2410 USG2410 2017
2009pc72052_i10_revb MACH_PC72052_I10_REVB PC72052_I10_REVB 2018
2010mx35_exm32 MACH_MX35_EXM32 MX35_EXM32 2019
2011topas910 MACH_TOPAS910 TOPAS910 2020
2012hyena MACH_HYENA HYENA 2021
2013pospax MACH_POSPAX POSPAX 2022
2014hdl_gx MACH_HDL_GX HDL_GX 2023
2015ctera_4bay MACH_CTERA_4BAY CTERA_4BAY 2024
2016ctera_plug_c MACH_CTERA_PLUG_C CTERA_PLUG_C 2025
2017crwea_plug_i MACH_CRWEA_PLUG_I CRWEA_PLUG_I 2026
2018egauge2 MACH_EGAUGE2 EGAUGE2 2027
2019didj MACH_DIDJ DIDJ 2028
2020m_s3c2443 MACH_MEISTER MEISTER 2029
2021htcblackstone MACH_HTCBLACKSTONE HTCBLACKSTONE 2030
2022cpuat9g20 MACH_CPUAT9G20 CPUAT9G20 2031 362cpuat9g20 MACH_CPUAT9G20 CPUAT9G20 2031
2023smdk6440 MACH_SMDK6440 SMDK6440 2032 363smdk6440 MACH_SMDK6440 SMDK6440 2032
2024omap_35xx_mvp MACH_OMAP_35XX_MVP OMAP_35XX_MVP 2033
2025ctera_plug_i MACH_CTERA_PLUG_I CTERA_PLUG_I 2034
2026pvg610_100 MACH_PVG610 PVG610 2035
2027hprw6815 MACH_HPRW6815 HPRW6815 2036
2028omap3_oswald MACH_OMAP3_OSWALD OMAP3_OSWALD 2037
2029nas4220b MACH_NAS4220B NAS4220B 2038 364nas4220b MACH_NAS4220B NAS4220B 2038
2030htcraphael_cdma MACH_HTCRAPHAEL_CDMA HTCRAPHAEL_CDMA 2039
2031htcdiamond_cdma MACH_HTCDIAMOND_CDMA HTCDIAMOND_CDMA 2040
2032scaler MACH_SCALER SCALER 2041
2033zylonite2 MACH_ZYLONITE2 ZYLONITE2 2042 365zylonite2 MACH_ZYLONITE2 ZYLONITE2 2042
2034aspenite MACH_ASPENITE ASPENITE 2043 366aspenite MACH_ASPENITE ASPENITE 2043
2035teton MACH_TETON TETON 2044
2036ttc_dkb MACH_TTC_DKB TTC_DKB 2045 367ttc_dkb MACH_TTC_DKB TTC_DKB 2045
2037bishop2 MACH_BISHOP2 BISHOP2 2046
2038ippv5 MACH_IPPV5 IPPV5 2047
2039farm926 MACH_FARM926 FARM926 2048
2040mmccpu MACH_MMCCPU MMCCPU 2049
2041sgmsfl MACH_SGMSFL SGMSFL 2050
2042tt8000 MACH_TT8000 TT8000 2051
2043zrn4300lp MACH_ZRN4300LP ZRN4300LP 2052
2044mptc MACH_MPTC MPTC 2053
2045h6051 MACH_H6051 H6051 2054
2046pvg610_101 MACH_PVG610_101 PVG610_101 2055
2047stamp9261_pc_evb MACH_STAMP9261_PC_EVB STAMP9261_PC_EVB 2056
2048pelco_odysseus MACH_PELCO_ODYSSEUS PELCO_ODYSSEUS 2057
2049tny_a9260 MACH_TNY_A9260 TNY_A9260 2058
2050tny_a9g20 MACH_TNY_A9G20 TNY_A9G20 2059
2051aesop_mp2530f MACH_AESOP_MP2530F AESOP_MP2530F 2060
2052dx900 MACH_DX900 DX900 2061
2053cpodc2 MACH_CPODC2 CPODC2 2062
2054tilt_8925 MACH_TILT_8925 TILT_8925 2063
2055davinci_dm357_evm MACH_DAVINCI_DM357_EVM DAVINCI_DM357_EVM 2064
2056swordfish MACH_SWORDFISH SWORDFISH 2065
2057corvus MACH_CORVUS CORVUS 2066
2058taurus MACH_TAURUS TAURUS 2067
2059axm MACH_AXM AXM 2068
2060axc MACH_AXC AXC 2069
2061baby MACH_BABY BABY 2070
2062mp200 MACH_MP200 MP200 2071
2063pcm043 MACH_PCM043 PCM043 2072 368pcm043 MACH_PCM043 PCM043 2072
2064hanlin_v3c MACH_HANLIN_V3C HANLIN_V3C 2073
2065kbk9g20 MACH_KBK9G20 KBK9G20 2074
2066adsturbog5 MACH_ADSTURBOG5 ADSTURBOG5 2075
2067avenger_lite1 MACH_AVENGER_LITE1 AVENGER_LITE1 2076
2068suc82x MACH_SUC SUC 2077
2069at91sam7s256 MACH_AT91SAM7S256 AT91SAM7S256 2078
2070mendoza MACH_MENDOZA MENDOZA 2079
2071kira MACH_KIRA KIRA 2080
2072mx1hbm MACH_MX1HBM MX1HBM 2081
2073quatro43xx MACH_QUATRO43XX QUATRO43XX 2082
2074quatro4230 MACH_QUATRO4230 QUATRO4230 2083
2075nsb400 MACH_NSB400 NSB400 2084
2076drp255 MACH_DRP255 DRP255 2085
2077thoth MACH_THOTH THOTH 2086
2078firestone MACH_FIRESTONE FIRESTONE 2087
2079asusp750 MACH_ASUSP750 ASUSP750 2088
2080ctera_dl MACH_CTERA_DL CTERA_DL 2089
2081socr MACH_SOCR SOCR 2090
2082htcoxygen MACH_HTCOXYGEN HTCOXYGEN 2091
2083heroc MACH_HEROC HEROC 2092
2084zeno6800 MACH_ZENO6800 ZENO6800 2093
2085sc2mcs MACH_SC2MCS SC2MCS 2094
2086gene100 MACH_GENE100 GENE100 2095
2087as353x MACH_AS353X AS353X 2096
2088sheevaplug MACH_SHEEVAPLUG SHEEVAPLUG 2097 369sheevaplug MACH_SHEEVAPLUG SHEEVAPLUG 2097
2089at91sam9g20 MACH_AT91SAM9G20 AT91SAM9G20 2098
2090mv88f6192gtw_fe MACH_MV88F6192GTW_FE MV88F6192GTW_FE 2099
2091cc9200 MACH_CC9200 CC9200 2100
2092sm9200 MACH_SM9200 SM9200 2101
2093tp9200 MACH_TP9200 TP9200 2102
2094snapperdv MACH_SNAPPERDV SNAPPERDV 2103
2095avengers_lite MACH_AVENGERS_LITE AVENGERS_LITE 2104 370avengers_lite MACH_AVENGERS_LITE AVENGERS_LITE 2104
2096avengers_lite1 MACH_AVENGERS_LITE1 AVENGERS_LITE1 2105
2097omap3axon MACH_OMAP3AXON OMAP3AXON 2106
2098ma8xx MACH_MA8XX MA8XX 2107
2099mp201ek MACH_MP201EK MP201EK 2108
2100davinci_tux MACH_DAVINCI_TUX DAVINCI_TUX 2109
2101mpa1600 MACH_MPA1600 MPA1600 2110
2102pelco_troy MACH_PELCO_TROY PELCO_TROY 2111
2103nsb667 MACH_NSB667 NSB667 2112
2104rovers5_4mpix MACH_ROVERS5_4MPIX ROVERS5_4MPIX 2113
2105twocom MACH_TWOCOM TWOCOM 2114
2106ubisys_p9_rcu3r2 MACH_UBISYS_P9_RCU3R2 UBISYS_P9_RCU3R2 2115
2107hero_espresso MACH_HERO_ESPRESSO HERO_ESPRESSO 2116
2108afeusb MACH_AFEUSB AFEUSB 2117
2109t830 MACH_T830 T830 2118
2110spd8020_cc MACH_SPD8020_CC SPD8020_CC 2119
2111om_3d7k MACH_OM_3D7K OM_3D7K 2120
2112picocom2 MACH_PICOCOM2 PICOCOM2 2121
2113uwg4mx27 MACH_UWG4MX27 UWG4MX27 2122
2114uwg4mx31 MACH_UWG4MX31 UWG4MX31 2123
2115cherry MACH_CHERRY CHERRY 2124
2116mx51_babbage MACH_MX51_BABBAGE MX51_BABBAGE 2125 371mx51_babbage MACH_MX51_BABBAGE MX51_BABBAGE 2125
2117s3c2440turkiye MACH_S3C2440TURKIYE S3C2440TURKIYE 2126
2118tx37 MACH_TX37 TX37 2127
2119sbc2800_9g20 MACH_SBC2800_9G20 SBC2800_9G20 2128
2120benzglb MACH_BENZGLB BENZGLB 2129
2121benztd MACH_BENZTD BENZTD 2130
2122cartesio_plus MACH_CARTESIO_PLUS CARTESIO_PLUS 2131
2123solrad_g20 MACH_SOLRAD_G20 SOLRAD_G20 2132
2124mx27wallace MACH_MX27WALLACE MX27WALLACE 2133
2125fmzwebmodul MACH_FMZWEBMODUL FMZWEBMODUL 2134
2126rd78x00_masa MACH_RD78X00_MASA RD78X00_MASA 2135 372rd78x00_masa MACH_RD78X00_MASA RD78X00_MASA 2135
2127smallogger MACH_SMALLOGGER SMALLOGGER 2136
2128ccw9p9215 MACH_CCW9P9215 CCW9P9215 2137
2129dm355_leopard MACH_DM355_LEOPARD DM355_LEOPARD 2138 373dm355_leopard MACH_DM355_LEOPARD DM355_LEOPARD 2138
2130ts219 MACH_TS219 TS219 2139 374ts219 MACH_TS219 TS219 2139
2131tny_a9263 MACH_TNY_A9263 TNY_A9263 2140
2132apollo MACH_APOLLO APOLLO 2141
2133at91cap9stk MACH_AT91CAP9STK AT91CAP9STK 2142
2134spc300 MACH_SPC300 SPC300 2143
2135eko MACH_EKO EKO 2144
2136ccw9m2443 MACH_CCW9M2443 CCW9M2443 2145
2137ccw9m2443js MACH_CCW9M2443JS CCW9M2443JS 2146
2138m2m_router_device MACH_M2M_ROUTER_DEVICE M2M_ROUTER_DEVICE 2147
2139str9104nas MACH_STAR9104NAS STAR9104NAS 2148
2140pca100 MACH_PCA100 PCA100 2149 375pca100 MACH_PCA100 PCA100 2149
2141z3_dm365_mod_01 MACH_Z3_DM365_MOD_01 Z3_DM365_MOD_01 2150
2142hipox MACH_HIPOX HIPOX 2151
2143omap3_piteds MACH_OMAP3_PITEDS OMAP3_PITEDS 2152
2144bm150r MACH_BM150R BM150R 2153
2145tbone MACH_TBONE TBONE 2154
2146merlin MACH_MERLIN MERLIN 2155
2147falcon MACH_FALCON FALCON 2156
2148davinci_da850_evm MACH_DAVINCI_DA850_EVM DAVINCI_DA850_EVM 2157 376davinci_da850_evm MACH_DAVINCI_DA850_EVM DAVINCI_DA850_EVM 2157
2149s5p6440 MACH_S5P6440 S5P6440 2158
2150at91sam9g10ek MACH_AT91SAM9G10EK AT91SAM9G10EK 2159 377at91sam9g10ek MACH_AT91SAM9G10EK AT91SAM9G10EK 2159
2151omap_4430sdp MACH_OMAP_4430SDP OMAP_4430SDP 2160 378omap_4430sdp MACH_OMAP_4430SDP OMAP_4430SDP 2160
2152lpc313x MACH_LPC313X LPC313X 2161
2153magx_zn5 MACH_MAGX_ZN5 MAGX_ZN5 2162 379magx_zn5 MACH_MAGX_ZN5 MAGX_ZN5 2162
2154magx_em30 MACH_MAGX_EM30 MAGX_EM30 2163
2155magx_ve66 MACH_MAGX_VE66 MAGX_VE66 2164
2156meesc MACH_MEESC MEESC 2165
2157otc570 MACH_OTC570 OTC570 2166
2158bcu2412 MACH_BCU2412 BCU2412 2167
2159beacon MACH_BEACON BEACON 2168
2160actia_tgw MACH_ACTIA_TGW ACTIA_TGW 2169
2161e4430 MACH_E4430 E4430 2170
2162ql300 MACH_QL300 QL300 2171
2163btmavb101 MACH_BTMAVB101 BTMAVB101 2172
2164btmawb101 MACH_BTMAWB101 BTMAWB101 2173
2165sq201 MACH_SQ201 SQ201 2174
2166quatro45xx MACH_QUATRO45XX QUATRO45XX 2175
2167openpad MACH_OPENPAD OPENPAD 2176
2168tx25 MACH_TX25 TX25 2177
2169omap3_torpedo MACH_OMAP3_TORPEDO OMAP3_TORPEDO 2178 380omap3_torpedo MACH_OMAP3_TORPEDO OMAP3_TORPEDO 2178
2170htcraphael_k MACH_HTCRAPHAEL_K HTCRAPHAEL_K 2179
2171lal43 MACH_LAL43 LAL43 2181
2172htcraphael_cdma500 MACH_HTCRAPHAEL_CDMA500 HTCRAPHAEL_CDMA500 2182
2173anw6410 MACH_ANW6410 ANW6410 2183 381anw6410 MACH_ANW6410 ANW6410 2183
2174htcprophet MACH_HTCPROPHET HTCPROPHET 2185
2175cfa_10022 MACH_CFA_10022 CFA_10022 2186
2176imx27_visstrim_m10 MACH_IMX27_VISSTRIM_M10 IMX27_VISSTRIM_M10 2187 382imx27_visstrim_m10 MACH_IMX27_VISSTRIM_M10 IMX27_VISSTRIM_M10 2187
2177px2imx27 MACH_PX2IMX27 PX2IMX27 2188
2178stm3210e_eval MACH_STM3210E_EVAL STM3210E_EVAL 2189
2179dvs10 MACH_DVS10 DVS10 2190
2180portuxg20 MACH_PORTUXG20 PORTUXG20 2191 383portuxg20 MACH_PORTUXG20 PORTUXG20 2191
2181arm_spv MACH_ARM_SPV ARM_SPV 2192
2182smdkc110 MACH_SMDKC110 SMDKC110 2193 384smdkc110 MACH_SMDKC110 SMDKC110 2193
2183cabespresso MACH_CABESPRESSO CABESPRESSO 2194
2184hmc800 MACH_HMC800 HMC800 2195
2185sholes MACH_SHOLES SHOLES 2196
2186btmxc31 MACH_BTMXC31 BTMXC31 2197
2187dt501 MACH_DT501 DT501 2198
2188ktx MACH_KTX KTX 2199
2189omap3517evm MACH_OMAP3517EVM OMAP3517EVM 2200 385omap3517evm MACH_OMAP3517EVM OMAP3517EVM 2200
2190netspace_v2 MACH_NETSPACE_V2 NETSPACE_V2 2201 386netspace_v2 MACH_NETSPACE_V2 NETSPACE_V2 2201
2191netspace_max_v2 MACH_NETSPACE_MAX_V2 NETSPACE_MAX_V2 2202 387netspace_max_v2 MACH_NETSPACE_MAX_V2 NETSPACE_MAX_V2 2202
2192d2net_v2 MACH_D2NET_V2 D2NET_V2 2203 388d2net_v2 MACH_D2NET_V2 D2NET_V2 2203
2193net2big_v2 MACH_NET2BIG_V2 NET2BIG_V2 2204 389net2big_v2 MACH_NET2BIG_V2 NET2BIG_V2 2204
2194net4big_v2 MACH_NET4BIG_V2 NET4BIG_V2 2205
2195net5big_v2 MACH_NET5BIG_V2 NET5BIG_V2 2206 390net5big_v2 MACH_NET5BIG_V2 NET5BIG_V2 2206
2196endb2443 MACH_ENDB2443 ENDB2443 2207
2197inetspace_v2 MACH_INETSPACE_V2 INETSPACE_V2 2208 391inetspace_v2 MACH_INETSPACE_V2 INETSPACE_V2 2208
2198tros MACH_TROS TROS 2209
2199pelco_homer MACH_PELCO_HOMER PELCO_HOMER 2210
2200ofsp8 MACH_OFSP8 OFSP8 2211
2201at91sam9g45ekes MACH_AT91SAM9G45EKES AT91SAM9G45EKES 2212 392at91sam9g45ekes MACH_AT91SAM9G45EKES AT91SAM9G45EKES 2212
2202guf_cupid MACH_GUF_CUPID GUF_CUPID 2213
2203eab1r MACH_EAB1R EAB1R 2214
2204desirec MACH_DESIREC DESIREC 2215
2205cordoba MACH_CORDOBA CORDOBA 2216
2206irvine MACH_IRVINE IRVINE 2217
2207sff772 MACH_SFF772 SFF772 2218
2208pelco_milano MACH_PELCO_MILANO PELCO_MILANO 2219
2209pc7302 MACH_PC7302 PC7302 2220 393pc7302 MACH_PC7302 PC7302 2220
2210bip6000 MACH_BIP6000 BIP6000 2221
2211silvermoon MACH_SILVERMOON SILVERMOON 2222
2212vc0830 MACH_VC0830 VC0830 2223
2213dt430 MACH_DT430 DT430 2224
2214ji42pf MACH_JI42PF JI42PF 2225
2215gnet_ksm MACH_GNET_KSM GNET_KSM 2226
2216gnet_sgm MACH_GNET_SGM GNET_SGM 2227
2217gnet_sgr MACH_GNET_SGR GNET_SGR 2228
2218omap3_icetekevm MACH_OMAP3_ICETEKEVM OMAP3_ICETEKEVM 2229
2219pnp MACH_PNP PNP 2230
2220ctera_2bay_k MACH_CTERA_2BAY_K CTERA_2BAY_K 2231
2221ctera_2bay_u MACH_CTERA_2BAY_U CTERA_2BAY_U 2232
2222sas_c MACH_SAS_C SAS_C 2233
2223vma2315 MACH_VMA2315 VMA2315 2234
2224vcs MACH_VCS VCS 2235
2225spear600 MACH_SPEAR600 SPEAR600 2236 394spear600 MACH_SPEAR600 SPEAR600 2236
2226spear300 MACH_SPEAR300 SPEAR300 2237 395spear300 MACH_SPEAR300 SPEAR300 2237
2227spear1300 MACH_SPEAR1300 SPEAR1300 2238
2228lilly1131 MACH_LILLY1131 LILLY1131 2239 396lilly1131 MACH_LILLY1131 LILLY1131 2239
2229arvoo_ax301 MACH_ARVOO_AX301 ARVOO_AX301 2240
2230mapphone MACH_MAPPHONE MAPPHONE 2241
2231legend MACH_LEGEND LEGEND 2242
2232salsa MACH_SALSA SALSA 2243
2233lounge MACH_LOUNGE LOUNGE 2244
2234vision MACH_VISION VISION 2245
2235vmb20 MACH_VMB20 VMB20 2246
2236hy2410 MACH_HY2410 HY2410 2247
2237hy9315 MACH_HY9315 HY9315 2248
2238bullwinkle MACH_BULLWINKLE BULLWINKLE 2249
2239arm_ultimator2 MACH_ARM_ULTIMATOR2 ARM_ULTIMATOR2 2250
2240vs_v210 MACH_VS_V210 VS_V210 2252
2241vs_v212 MACH_VS_V212 VS_V212 2253
2242hmt MACH_HMT HMT 2254 397hmt MACH_HMT HMT 2254
2243km_kirkwood MACH_KM_KIRKWOOD KM_KIRKWOOD 2255
2244vesper MACH_VESPER VESPER 2256
2245str9 MACH_STR9 STR9 2257
2246omap3_wl_ff MACH_OMAP3_WL_FF OMAP3_WL_FF 2258
2247simcom MACH_SIMCOM SIMCOM 2259
2248mcwebio MACH_MCWEBIO MCWEBIO 2260
2249omap3_phrazer MACH_OMAP3_PHRAZER OMAP3_PHRAZER 2261
2250darwin MACH_DARWIN DARWIN 2262
2251oratiscomu MACH_ORATISCOMU ORATISCOMU 2263
2252rtsbc20 MACH_RTSBC20 RTSBC20 2264
2253sgh_i780 MACH_I780 I780 2265
2254gemini324 MACH_GEMINI324 GEMINI324 2266
2255oratislan MACH_ORATISLAN ORATISLAN 2267
2256oratisalog MACH_ORATISALOG ORATISALOG 2268
2257oratismadi MACH_ORATISMADI ORATISMADI 2269
2258oratisot16 MACH_ORATISOT16 ORATISOT16 2270
2259oratisdesk MACH_ORATISDESK ORATISDESK 2271
2260vexpress MACH_VEXPRESS VEXPRESS 2272 398vexpress MACH_VEXPRESS VEXPRESS 2272
2261sintexo MACH_SINTEXO SINTEXO 2273
2262cm3389 MACH_CM3389 CM3389 2274
2263omap3_cio MACH_OMAP3_CIO OMAP3_CIO 2275
2264sgh_i900 MACH_SGH_I900 SGH_I900 2276
2265bst100 MACH_BST100 BST100 2277
2266passion MACH_PASSION PASSION 2278
2267indesign_at91sam MACH_INDESIGN_AT91SAM INDESIGN_AT91SAM 2279
2268c4_badger MACH_C4_BADGER C4_BADGER 2280
2269c4_viper MACH_C4_VIPER C4_VIPER 2281
2270d2net MACH_D2NET D2NET 2282 399d2net MACH_D2NET D2NET 2282
2271bigdisk MACH_BIGDISK BIGDISK 2283 400bigdisk MACH_BIGDISK BIGDISK 2283
2272notalvision MACH_NOTALVISION NOTALVISION 2284
2273omap3_kboc MACH_OMAP3_KBOC OMAP3_KBOC 2285
2274cyclone MACH_CYCLONE CYCLONE 2286
2275ninja MACH_NINJA NINJA 2287
2276at91sam9g20ek_2mmc MACH_AT91SAM9G20EK_2MMC AT91SAM9G20EK_2MMC 2288 401at91sam9g20ek_2mmc MACH_AT91SAM9G20EK_2MMC AT91SAM9G20EK_2MMC 2288
2277bcmring MACH_BCMRING BCMRING 2289 402bcmring MACH_BCMRING BCMRING 2289
2278resol_dl2 MACH_RESOL_DL2 RESOL_DL2 2290
2279ifosw MACH_IFOSW IFOSW 2291
2280htcrhodium MACH_HTCRHODIUM HTCRHODIUM 2292
2281htctopaz MACH_HTCTOPAZ HTCTOPAZ 2293
2282matrix504 MACH_MATRIX504 MATRIX504 2294
2283mrfsa MACH_MRFSA MRFSA 2295
2284sc_p270 MACH_SC_P270 SC_P270 2296
2285atlas5_evb MACH_ATLAS5_EVB ATLAS5_EVB 2297
2286pelco_lobox MACH_PELCO_LOBOX PELCO_LOBOX 2298
2287dilax_pcu200 MACH_DILAX_PCU200 DILAX_PCU200 2299
2288leonardo MACH_LEONARDO LEONARDO 2300
2289zoran_approach7 MACH_ZORAN_APPROACH7 ZORAN_APPROACH7 2301
2290dp6xx MACH_DP6XX DP6XX 2302
2291bcm2153_vesper MACH_BCM2153_VESPER BCM2153_VESPER 2303
2292mahimahi MACH_MAHIMAHI MAHIMAHI 2304 403mahimahi MACH_MAHIMAHI MAHIMAHI 2304
2293clickc MACH_CLICKC CLICKC 2305
2294zb_gateway MACH_ZB_GATEWAY ZB_GATEWAY 2306
2295tazcard MACH_TAZCARD TAZCARD 2307
2296tazdev MACH_TAZDEV TAZDEV 2308
2297annax_cb_arm MACH_ANNAX_CB_ARM ANNAX_CB_ARM 2309
2298annax_dm3 MACH_ANNAX_DM3 ANNAX_DM3 2310
2299cerebric MACH_CEREBRIC CEREBRIC 2311
2300orca MACH_ORCA ORCA 2312
2301pc9260 MACH_PC9260 PC9260 2313
2302ems285a MACH_EMS285A EMS285A 2314
2303gec2410 MACH_GEC2410 GEC2410 2315
2304gec2440 MACH_GEC2440 GEC2440 2316
2305mw903 MACH_ARCH_MW903 ARCH_MW903 2317
2306mw2440 MACH_MW2440 MW2440 2318
2307ecac2378 MACH_ECAC2378 ECAC2378 2319
2308tazkiosk MACH_TAZKIOSK TAZKIOSK 2320
2309whiterabbit_mch MACH_WHITERABBIT_MCH WHITERABBIT_MCH 2321
2310sbox9263 MACH_SBOX9263 SBOX9263 2322
2311oreo MACH_OREO OREO 2323
2312smdk6442 MACH_SMDK6442 SMDK6442 2324 404smdk6442 MACH_SMDK6442 SMDK6442 2324
2313openrd_base MACH_OPENRD_BASE OPENRD_BASE 2325 405openrd_base MACH_OPENRD_BASE OPENRD_BASE 2325
2314incredible MACH_INCREDIBLE INCREDIBLE 2326
2315incrediblec MACH_INCREDIBLEC INCREDIBLEC 2327
2316heroct MACH_HEROCT HEROCT 2328
2317mmnet1000 MACH_MMNET1000 MMNET1000 2329
2318devkit8000 MACH_DEVKIT8000 DEVKIT8000 2330 406devkit8000 MACH_DEVKIT8000 DEVKIT8000 2330
2319devkit9000 MACH_DEVKIT9000 DEVKIT9000 2331
2320mx31txtr MACH_MX31TXTR MX31TXTR 2332
2321u380 MACH_U380 U380 2333
2322oamp3_hualu MACH_HUALU_BOARD HUALU_BOARD 2334
2323npcmx50 MACH_NPCMX50 NPCMX50 2335
2324mx51_efikamx MACH_MX51_EFIKAMX MX51_EFIKAMX 2336 407mx51_efikamx MACH_MX51_EFIKAMX MX51_EFIKAMX 2336
2325mx51_lange52 MACH_MX51_LANGE52 MX51_LANGE52 2337
2326riom MACH_RIOM RIOM 2338
2327comcas MACH_COMCAS COMCAS 2339
2328wsi_mx27 MACH_WSI_MX27 WSI_MX27 2340
2329cm_t35 MACH_CM_T35 CM_T35 2341 408cm_t35 MACH_CM_T35 CM_T35 2341
2330net2big MACH_NET2BIG NET2BIG 2342 409net2big MACH_NET2BIG NET2BIG 2342
2331motorola_a1600 MACH_MOTOROLA_A1600 MOTOROLA_A1600 2343
2332igep0020 MACH_IGEP0020 IGEP0020 2344 410igep0020 MACH_IGEP0020 IGEP0020 2344
2333igep0010 MACH_IGEP0010 IGEP0010 2345
2334mv6281gtwge2 MACH_MV6281GTWGE2 MV6281GTWGE2 2346
2335scat100 MACH_SCAT100 SCAT100 2347
2336sanmina MACH_SANMINA SANMINA 2348
2337momento MACH_MOMENTO MOMENTO 2349
2338nuc9xx MACH_NUC9XX NUC9XX 2350
2339nuc910evb MACH_NUC910EVB NUC910EVB 2351
2340nuc920evb MACH_NUC920EVB NUC920EVB 2352
2341nuc950evb MACH_NUC950EVB NUC950EVB 2353
2342nuc945evb MACH_NUC945EVB NUC945EVB 2354
2343nuc960evb MACH_NUC960EVB NUC960EVB 2355
2344nuc932evb MACH_NUC932EVB NUC932EVB 2356 411nuc932evb MACH_NUC932EVB NUC932EVB 2356
2345nuc900 MACH_NUC900 NUC900 2357
2346sd1soc MACH_SD1SOC SD1SOC 2358
2347ln2440bc MACH_LN2440BC LN2440BC 2359
2348rsbc MACH_RSBC RSBC 2360
2349openrd_client MACH_OPENRD_CLIENT OPENRD_CLIENT 2361 412openrd_client MACH_OPENRD_CLIENT OPENRD_CLIENT 2361
2350hpipaq11x MACH_HPIPAQ11X HPIPAQ11X 2362
2351wayland MACH_WAYLAND WAYLAND 2363
2352acnbsx102 MACH_ACNBSX102 ACNBSX102 2364
2353hwat91 MACH_HWAT91 HWAT91 2365
2354at91sam9263cs MACH_AT91SAM9263CS AT91SAM9263CS 2366
2355csb732 MACH_CSB732 CSB732 2367
2356u8500 MACH_U8500 U8500 2368 413u8500 MACH_U8500 U8500 2368
2357huqiu MACH_HUQIU HUQIU 2369
2358mx51_efikasb MACH_MX51_EFIKASB MX51_EFIKASB 2370 414mx51_efikasb MACH_MX51_EFIKASB MX51_EFIKASB 2370
2359pmt1g MACH_PMT1G PMT1G 2371
2360htcelf MACH_HTCELF HTCELF 2372
2361armadillo420 MACH_ARMADILLO420 ARMADILLO420 2373
2362armadillo440 MACH_ARMADILLO440 ARMADILLO440 2374
2363u_chip_dual_arm MACH_U_CHIP_DUAL_ARM U_CHIP_DUAL_ARM 2375
2364csr_bdb3 MACH_CSR_BDB3 CSR_BDB3 2376
2365dolby_cat1018 MACH_DOLBY_CAT1018 DOLBY_CAT1018 2377
2366hy9307 MACH_HY9307 HY9307 2378
2367aspire_easystore MACH_A_ES A_ES 2379
2368davinci_irif MACH_DAVINCI_IRIF DAVINCI_IRIF 2380
2369agama9263 MACH_AGAMA9263 AGAMA9263 2381
2370marvell_jasper MACH_MARVELL_JASPER MARVELL_JASPER 2382 415marvell_jasper MACH_MARVELL_JASPER MARVELL_JASPER 2382
2371flint MACH_FLINT FLINT 2383 416flint MACH_FLINT FLINT 2383
2372tavorevb3 MACH_TAVOREVB3 TAVOREVB3 2384 417tavorevb3 MACH_TAVOREVB3 TAVOREVB3 2384
2373sch_m490 MACH_SCH_M490 SCH_M490 2386
2374rbl01 MACH_RBL01 RBL01 2387
2375omnifi MACH_OMNIFI OMNIFI 2388
2376otavalo MACH_OTAVALO OTAVALO 2389
2377sienna MACH_SIENNA SIENNA 2390
2378htc_excalibur_s620 MACH_HTC_EXCALIBUR_S620 HTC_EXCALIBUR_S620 2391
2379htc_opal MACH_HTC_OPAL HTC_OPAL 2392
2380touchbook MACH_TOUCHBOOK TOUCHBOOK 2393 418touchbook MACH_TOUCHBOOK TOUCHBOOK 2393
2381latte MACH_LATTE LATTE 2394
2382xa200 MACH_XA200 XA200 2395
2383nimrod MACH_NIMROD NIMROD 2396
2384cc9p9215_3g MACH_CC9P9215_3G CC9P9215_3G 2397
2385cc9p9215_3gjs MACH_CC9P9215_3GJS CC9P9215_3GJS 2398
2386tk71 MACH_TK71 TK71 2399
2387comham3525 MACH_COMHAM3525 COMHAM3525 2400
2388mx31erebus MACH_MX31EREBUS MX31EREBUS 2401
2389mcardmx27 MACH_MCARDMX27 MCARDMX27 2402
2390paradise MACH_PARADISE PARADISE 2403
2391tide MACH_TIDE TIDE 2404
2392wzl2440 MACH_WZL2440 WZL2440 2405
2393sdrdemo MACH_SDRDEMO SDRDEMO 2406
2394ethercan2 MACH_ETHERCAN2 ETHERCAN2 2407
2395ecmimg20 MACH_ECMIMG20 ECMIMG20 2408
2396omap_dragon MACH_OMAP_DRAGON OMAP_DRAGON 2409
2397halo MACH_HALO HALO 2410
2398huangshan MACH_HUANGSHAN HUANGSHAN 2411
2399vl_ma2sc MACH_VL_MA2SC VL_MA2SC 2412
2400raumfeld_rc MACH_RAUMFELD_RC RAUMFELD_RC 2413 419raumfeld_rc MACH_RAUMFELD_RC RAUMFELD_RC 2413
2401raumfeld_connector MACH_RAUMFELD_CONNECTOR RAUMFELD_CONNECTOR 2414 420raumfeld_connector MACH_RAUMFELD_CONNECTOR RAUMFELD_CONNECTOR 2414
2402raumfeld_speaker MACH_RAUMFELD_SPEAKER RAUMFELD_SPEAKER 2415 421raumfeld_speaker MACH_RAUMFELD_SPEAKER RAUMFELD_SPEAKER 2415
2403multibus_master MACH_MULTIBUS_MASTER MULTIBUS_MASTER 2416
2404multibus_pbk MACH_MULTIBUS_PBK MULTIBUS_PBK 2417
2405tnetv107x MACH_TNETV107X TNETV107X 2418 422tnetv107x MACH_TNETV107X TNETV107X 2418
2406snake MACH_SNAKE SNAKE 2419
2407cwmx27 MACH_CWMX27 CWMX27 2420
2408sch_m480 MACH_SCH_M480 SCH_M480 2421
2409platypus MACH_PLATYPUS PLATYPUS 2422
2410pss2 MACH_PSS2 PSS2 2423
2411davinci_apm150 MACH_DAVINCI_APM150 DAVINCI_APM150 2424
2412str9100 MACH_STR9100 STR9100 2425
2413net5big MACH_NET5BIG NET5BIG 2426
2414seabed9263 MACH_SEABED9263 SEABED9263 2427
2415mx51_m2id MACH_MX51_M2ID MX51_M2ID 2428
2416octvocplus_eb MACH_OCTVOCPLUS_EB OCTVOCPLUS_EB 2429
2417klk_firefox MACH_KLK_FIREFOX KLK_FIREFOX 2430
2418klk_wirma_module MACH_KLK_WIRMA_MODULE KLK_WIRMA_MODULE 2431
2419klk_wirma_mmi MACH_KLK_WIRMA_MMI KLK_WIRMA_MMI 2432
2420supersonic MACH_SUPERSONIC SUPERSONIC 2433
2421liberty MACH_LIBERTY LIBERTY 2434
2422mh355 MACH_MH355 MH355 2435
2423pc7802 MACH_PC7802 PC7802 2436
2424gnet_sgc MACH_GNET_SGC GNET_SGC 2437
2425einstein15 MACH_EINSTEIN15 EINSTEIN15 2438
2426cmpd MACH_CMPD CMPD 2439
2427davinci_hase1 MACH_DAVINCI_HASE1 DAVINCI_HASE1 2440
2428lgeincitephone MACH_LGEINCITEPHONE LGEINCITEPHONE 2441
2429ea313x MACH_EA313X EA313X 2442
2430fwbd_39064 MACH_FWBD_39064 FWBD_39064 2443
2431fwbd_390128 MACH_FWBD_390128 FWBD_390128 2444
2432pelco_moe MACH_PELCO_MOE PELCO_MOE 2445
2433minimix27 MACH_MINIMIX27 MINIMIX27 2446
2434omap3_thunder MACH_OMAP3_THUNDER OMAP3_THUNDER 2447
2435passionc MACH_PASSIONC PASSIONC 2448
2436mx27amata MACH_MX27AMATA MX27AMATA 2449
2437bgat1 MACH_BGAT1 BGAT1 2450
2438buzz MACH_BUZZ BUZZ 2451
2439mb9g20 MACH_MB9G20 MB9G20 2452
2440yushan MACH_YUSHAN YUSHAN 2453
2441lizard MACH_LIZARD LIZARD 2454
2442omap3polycom MACH_OMAP3POLYCOM OMAP3POLYCOM 2455
2443smdkv210 MACH_SMDKV210 SMDKV210 2456 423smdkv210 MACH_SMDKV210 SMDKV210 2456
2444bravo MACH_BRAVO BRAVO 2457
2445siogentoo1 MACH_SIOGENTOO1 SIOGENTOO1 2458
2446siogentoo2 MACH_SIOGENTOO2 SIOGENTOO2 2459
2447sm3k MACH_SM3K SM3K 2460
2448acer_tempo_f900 MACH_ACER_TEMPO_F900 ACER_TEMPO_F900 2461
2449sst61vc010_dev MACH_SST61VC010_DEV SST61VC010_DEV 2462
2450glittertind MACH_GLITTERTIND GLITTERTIND 2463
2451omap_zoom3 MACH_OMAP_ZOOM3 OMAP_ZOOM3 2464 424omap_zoom3 MACH_OMAP_ZOOM3 OMAP_ZOOM3 2464
2452omap_3630sdp MACH_OMAP_3630SDP OMAP_3630SDP 2465 425omap_3630sdp MACH_OMAP_3630SDP OMAP_3630SDP 2465
2453cybook2440 MACH_CYBOOK2440 CYBOOK2440 2466
2454torino_s MACH_TORINO_S TORINO_S 2467
2455havana MACH_HAVANA HAVANA 2468
2456beaumont_11 MACH_BEAUMONT_11 BEAUMONT_11 2469
2457vanguard MACH_VANGUARD VANGUARD 2470
2458s5pc110_draco MACH_S5PC110_DRACO S5PC110_DRACO 2471
2459cartesio_two MACH_CARTESIO_TWO CARTESIO_TWO 2472
2460aster MACH_ASTER ASTER 2473
2461voguesv210 MACH_VOGUESV210 VOGUESV210 2474
2462acm500x MACH_ACM500X ACM500X 2475
2463km9260 MACH_KM9260 KM9260 2476
2464nideflexg1 MACH_NIDEFLEXG1 NIDEFLEXG1 2477
2465ctera_plug_io MACH_CTERA_PLUG_IO CTERA_PLUG_IO 2478
2466smartq7 MACH_SMARTQ7 SMARTQ7 2479 426smartq7 MACH_SMARTQ7 SMARTQ7 2479
2467at91sam9g10ek2 MACH_AT91SAM9G10EK2 AT91SAM9G10EK2 2480
2468asusp527 MACH_ASUSP527 ASUSP527 2481
2469at91sam9g20mpm2 MACH_AT91SAM9G20MPM2 AT91SAM9G20MPM2 2482
2470topasa900 MACH_TOPASA900 TOPASA900 2483
2471electrum_100 MACH_ELECTRUM_100 ELECTRUM_100 2484
2472mx51grb MACH_MX51GRB MX51GRB 2485
2473xea300 MACH_XEA300 XEA300 2486
2474htcstartrek MACH_HTCSTARTREK HTCSTARTREK 2487
2475lima MACH_LIMA LIMA 2488
2476csb740 MACH_CSB740 CSB740 2489
2477usb_s8815 MACH_USB_S8815 USB_S8815 2490
2478watson_efm_plugin MACH_WATSON_EFM_PLUGIN WATSON_EFM_PLUGIN 2491
2479milkyway MACH_MILKYWAY MILKYWAY 2492
2480g4evm MACH_G4EVM G4EVM 2493 427g4evm MACH_G4EVM G4EVM 2493
2481picomod6 MACH_PICOMOD6 PICOMOD6 2494
2482omapl138_hawkboard MACH_OMAPL138_HAWKBOARD OMAPL138_HAWKBOARD 2495 428omapl138_hawkboard MACH_OMAPL138_HAWKBOARD OMAPL138_HAWKBOARD 2495
2483ip6000 MACH_IP6000 IP6000 2496
2484ip6010 MACH_IP6010 IP6010 2497
2485utm400 MACH_UTM400 UTM400 2498
2486omap3_zybex MACH_OMAP3_ZYBEX OMAP3_ZYBEX 2499
2487wireless_space MACH_WIRELESS_SPACE WIRELESS_SPACE 2500
2488sx560 MACH_SX560 SX560 2501
2489ts41x MACH_TS41X TS41X 2502 429ts41x MACH_TS41X TS41X 2502
2490elphel10373 MACH_ELPHEL10373 ELPHEL10373 2503
2491rhobot MACH_RHOBOT RHOBOT 2504
2492mx51_refresh MACH_MX51_REFRESH MX51_REFRESH 2505
2493ls9260 MACH_LS9260 LS9260 2506
2494shank MACH_SHANK SHANK 2507
2495qsd8x50_st1 MACH_QSD8X50_ST1 QSD8X50_ST1 2508
2496at91sam9m10ekes MACH_AT91SAM9M10EKES AT91SAM9M10EKES 2509
2497hiram MACH_HIRAM HIRAM 2510
2498phy3250 MACH_PHY3250 PHY3250 2511 430phy3250 MACH_PHY3250 PHY3250 2511
2499ea3250 MACH_EA3250 EA3250 2512
2500fdi3250 MACH_FDI3250 FDI3250 2513
2501whitestone MACH_WHITESTONE WHITESTONE 2514
2502at91sam9263nit MACH_AT91SAM9263NIT AT91SAM9263NIT 2515
2503ccmx51 MACH_CCMX51 CCMX51 2516
2504ccmx51js MACH_CCMX51JS CCMX51JS 2517
2505ccwmx51 MACH_CCWMX51 CCWMX51 2518
2506ccwmx51js MACH_CCWMX51JS CCWMX51JS 2519
2507mini6410 MACH_MINI6410 MINI6410 2520 431mini6410 MACH_MINI6410 MINI6410 2520
2508tiny6410 MACH_TINY6410 TINY6410 2521
2509nano6410 MACH_NANO6410 NANO6410 2522
2510at572d940hfnldb MACH_AT572D940HFNLDB AT572D940HFNLDB 2523
2511htcleo MACH_HTCLEO HTCLEO 2524
2512avp13 MACH_AVP13 AVP13 2525
2513xxsvideod MACH_XXSVIDEOD XXSVIDEOD 2526
2514vpnext MACH_VPNEXT VPNEXT 2527
2515swarco_itc3 MACH_SWARCO_ITC3 SWARCO_ITC3 2528
2516tx51 MACH_TX51 TX51 2529
2517dolby_cat1021 MACH_DOLBY_CAT1021 DOLBY_CAT1021 2530
2518mx28evk MACH_MX28EVK MX28EVK 2531 432mx28evk MACH_MX28EVK MX28EVK 2531
2519phoenix260 MACH_PHOENIX260 PHOENIX260 2532
2520uvaca_stork MACH_UVACA_STORK UVACA_STORK 2533
2521smartq5 MACH_SMARTQ5 SMARTQ5 2534 433smartq5 MACH_SMARTQ5 SMARTQ5 2534
2522all3078 MACH_ALL3078 ALL3078 2535
2523ctera_2bay_ds MACH_CTERA_2BAY_DS CTERA_2BAY_DS 2536
2524siogentoo3 MACH_SIOGENTOO3 SIOGENTOO3 2537
2525epb5000 MACH_EPB5000 EPB5000 2538
2526hy9263 MACH_HY9263 HY9263 2539
2527acer_tempo_m900 MACH_ACER_TEMPO_M900 ACER_TEMPO_M900 2540
2528acer_tempo_dx650 MACH_ACER_TEMPO_DX900 ACER_TEMPO_DX900 2541
2529acer_tempo_x960 MACH_ACER_TEMPO_X960 ACER_TEMPO_X960 2542
2530acer_eten_v900 MACH_ACER_ETEN_V900 ACER_ETEN_V900 2543
2531acer_eten_x900 MACH_ACER_ETEN_X900 ACER_ETEN_X900 2544
2532bonnell MACH_BONNELL BONNELL 2545
2533oht_mx27 MACH_OHT_MX27 OHT_MX27 2546
2534htcquartz MACH_HTCQUARTZ HTCQUARTZ 2547
2535davinci_dm6467tevm MACH_DAVINCI_DM6467TEVM DAVINCI_DM6467TEVM 2548 434davinci_dm6467tevm MACH_DAVINCI_DM6467TEVM DAVINCI_DM6467TEVM 2548
2536c3ax03 MACH_C3AX03 C3AX03 2549
2537mxt_td60 MACH_MXT_TD60 MXT_TD60 2550 435mxt_td60 MACH_MXT_TD60 MXT_TD60 2550
2538esyx MACH_ESYX ESYX 2551
2539dove_db2 MACH_DOVE_DB2 DOVE_DB2 2552
2540bulldog MACH_BULLDOG BULLDOG 2553
2541derell_me2000 MACH_DERELL_ME2000 DERELL_ME2000 2554
2542bcmring_base MACH_BCMRING_BASE BCMRING_BASE 2555
2543bcmring_evm MACH_BCMRING_EVM BCMRING_EVM 2556
2544bcmring_evm_jazz MACH_BCMRING_EVM_JAZZ BCMRING_EVM_JAZZ 2557
2545bcmring_sp MACH_BCMRING_SP BCMRING_SP 2558
2546bcmring_sv MACH_BCMRING_SV BCMRING_SV 2559
2547bcmring_sv_jazz MACH_BCMRING_SV_JAZZ BCMRING_SV_JAZZ 2560
2548bcmring_tablet MACH_BCMRING_TABLET BCMRING_TABLET 2561
2549bcmring_vp MACH_BCMRING_VP BCMRING_VP 2562
2550bcmring_evm_seikor MACH_BCMRING_EVM_SEIKOR BCMRING_EVM_SEIKOR 2563
2551bcmring_sp_wqvga MACH_BCMRING_SP_WQVGA BCMRING_SP_WQVGA 2564
2552bcmring_custom MACH_BCMRING_CUSTOM BCMRING_CUSTOM 2565
2553acer_s200 MACH_ACER_S200 ACER_S200 2566
2554bt270 MACH_BT270 BT270 2567
2555iseo MACH_ISEO ISEO 2568
2556cezanne MACH_CEZANNE CEZANNE 2569
2557lucca MACH_LUCCA LUCCA 2570
2558supersmart MACH_SUPERSMART SUPERSMART 2571
2559arm11_board MACH_CS_MISANO CS_MISANO 2572
2560magnolia2 MACH_MAGNOLIA2 MAGNOLIA2 2573
2561emxx MACH_EMXX EMXX 2574
2562outlaw MACH_OUTLAW OUTLAW 2575
2563riot_bei2 MACH_RIOT_BEI2 RIOT_BEI2 2576
2564riot_vox MACH_RIOT_VOX RIOT_VOX 2577
2565riot_x37 MACH_RIOT_X37 RIOT_X37 2578
2566mega25mx MACH_MEGA25MX MEGA25MX 2579
2567benzina2 MACH_BENZINA2 BENZINA2 2580
2568ignite MACH_IGNITE IGNITE 2581
2569foggia MACH_FOGGIA FOGGIA 2582
2570arezzo MACH_AREZZO AREZZO 2583
2571leica_skywalker MACH_LEICA_SKYWALKER LEICA_SKYWALKER 2584
2572jacinto2_jamr MACH_JACINTO2_JAMR JACINTO2_JAMR 2585
2573gts_nova MACH_GTS_NOVA GTS_NOVA 2586
2574p3600 MACH_P3600 P3600 2587
2575dlt2 MACH_DLT2 DLT2 2588
2576df3120 MACH_DF3120 DF3120 2589
2577ecucore_9g20 MACH_ECUCORE_9G20 ECUCORE_9G20 2590
2578nautel_lpc3240 MACH_NAUTEL_LPC3240 NAUTEL_LPC3240 2591
2579glacier MACH_GLACIER GLACIER 2592
2580phrazer_bulldog MACH_PHRAZER_BULLDOG PHRAZER_BULLDOG 2593
2581omap3_bulldog MACH_OMAP3_BULLDOG OMAP3_BULLDOG 2594
2582pca101 MACH_PCA101 PCA101 2595
2583buzzc MACH_BUZZC BUZZC 2596
2584sasie2 MACH_SASIE2 SASIE2 2597
2585davinci_cio MACH_DAVINCI_CIO DAVINCI_CIO 2598
2586smartmeter_dl MACH_SMARTMETER_DL SMARTMETER_DL 2599
2587wzl6410 MACH_WZL6410 WZL6410 2600
2588wzl6410m MACH_WZL6410M WZL6410M 2601
2589wzl6410f MACH_WZL6410F WZL6410F 2602
2590wzl6410i MACH_WZL6410I WZL6410I 2603
2591spacecom1 MACH_SPACECOM1 SPACECOM1 2604
2592pingu920 MACH_PINGU920 PINGU920 2605
2593bravoc MACH_BRAVOC BRAVOC 2606
2594cybo2440 MACH_CYBO2440 CYBO2440 2607
2595vdssw MACH_VDSSW VDSSW 2608
2596romulus MACH_ROMULUS ROMULUS 2609
2597omap_magic MACH_OMAP_MAGIC OMAP_MAGIC 2610
2598eltd100 MACH_ELTD100 ELTD100 2611
2599capc7117 MACH_CAPC7117 CAPC7117 2612 436capc7117 MACH_CAPC7117 CAPC7117 2612
2600swan MACH_SWAN SWAN 2613
2601veu MACH_VEU VEU 2614
2602rm2 MACH_RM2 RM2 2615
2603tt2100 MACH_TT2100 TT2100 2616
2604venice MACH_VENICE VENICE 2617
2605pc7323 MACH_PC7323 PC7323 2618
2606masp MACH_MASP MASP 2619
2607fujitsu_tvstbsoc0 MACH_FUJITSU_TVSTBSOC FUJITSU_TVSTBSOC 2620
2608fujitsu_tvstbsoc1 MACH_FUJITSU_TVSTBSOC1 FUJITSU_TVSTBSOC1 2621
2609lexikon MACH_LEXIKON LEXIKON 2622
2610mini2440v2 MACH_MINI2440V2 MINI2440V2 2623
2611icontrol MACH_ICONTROL ICONTROL 2624 437icontrol MACH_ICONTROL ICONTROL 2624
2612gplugd MACH_SHEEVAD SHEEVAD 2625
2613qsd8x50a_st1_1 MACH_QSD8X50A_ST1_1 QSD8X50A_ST1_1 2626
2614qsd8x50a_st1_5 MACH_QSD8X50A_ST1_5 QSD8X50A_ST1_5 2627 438qsd8x50a_st1_5 MACH_QSD8X50A_ST1_5 QSD8X50A_ST1_5 2627
2615bee MACH_BEE BEE 2628
2616mx23evk MACH_MX23EVK MX23EVK 2629 439mx23evk MACH_MX23EVK MX23EVK 2629
2617ap4evb MACH_AP4EVB AP4EVB 2630 440ap4evb MACH_AP4EVB AP4EVB 2630
2618stockholm MACH_STOCKHOLM STOCKHOLM 2631
2619lpc_h3131 MACH_LPC_H3131 LPC_H3131 2632
2620stingray MACH_STINGRAY STINGRAY 2633
2621kraken MACH_KRAKEN KRAKEN 2634
2622gw2388 MACH_GW2388 GW2388 2635
2623jadecpu MACH_JADECPU JADECPU 2636
2624carlisle MACH_CARLISLE CARLISLE 2637
2625lux_sf9 MACH_LUX_SF9 LUX_SF9 2638
2626nemid_tb MACH_NEMID_TB NEMID_TB 2639
2627terrier MACH_TERRIER TERRIER 2640
2628turbot MACH_TURBOT TURBOT 2641
2629sanddab MACH_SANDDAB SANDDAB 2642
2630mx35_cicada MACH_MX35_CICADA MX35_CICADA 2643
2631ghi2703d MACH_GHI2703D GHI2703D 2644
2632lux_sfx9 MACH_LUX_SFX9 LUX_SFX9 2645
2633lux_sf9g MACH_LUX_SF9G LUX_SF9G 2646
2634lux_edk9 MACH_LUX_EDK9 LUX_EDK9 2647
2635hw90240 MACH_HW90240 HW90240 2648
2636dm365_leopard MACH_DM365_LEOPARD DM365_LEOPARD 2649
2637mityomapl138 MACH_MITYOMAPL138 MITYOMAPL138 2650 441mityomapl138 MACH_MITYOMAPL138 MITYOMAPL138 2650
2638scat110 MACH_SCAT110 SCAT110 2651
2639acer_a1 MACH_ACER_A1 ACER_A1 2652
2640cmcontrol MACH_CMCONTROL CMCONTROL 2653
2641pelco_lamar MACH_PELCO_LAMAR PELCO_LAMAR 2654
2642rfp43 MACH_RFP43 RFP43 2655
2643sk86r0301 MACH_SK86R0301 SK86R0301 2656
2644ctpxa MACH_CTPXA CTPXA 2657
2645epb_arm9_a MACH_EPB_ARM9_A EPB_ARM9_A 2658
2646guruplug MACH_GURUPLUG GURUPLUG 2659 442guruplug MACH_GURUPLUG GURUPLUG 2659
2647spear310 MACH_SPEAR310 SPEAR310 2660 443spear310 MACH_SPEAR310 SPEAR310 2660
2648spear320 MACH_SPEAR320 SPEAR320 2661 444spear320 MACH_SPEAR320 SPEAR320 2661
2649robotx MACH_ROBOTX ROBOTX 2662
2650lsxhl MACH_LSXHL LSXHL 2663
2651smartlite MACH_SMARTLITE SMARTLITE 2664
2652cws2 MACH_CWS2 CWS2 2665
2653m619 MACH_M619 M619 2666
2654smartview MACH_SMARTVIEW SMARTVIEW 2667
2655lsa_salsa MACH_LSA_SALSA LSA_SALSA 2668
2656kizbox MACH_KIZBOX KIZBOX 2669
2657htccharmer MACH_HTCCHARMER HTCCHARMER 2670
2658guf_neso_lt MACH_GUF_NESO_LT GUF_NESO_LT 2671
2659pm9g45 MACH_PM9G45 PM9G45 2672
2660htcpanther MACH_HTCPANTHER HTCPANTHER 2673
2661htcpanther_cdma MACH_HTCPANTHER_CDMA HTCPANTHER_CDMA 2674
2662reb01 MACH_REB01 REB01 2675
2663aquila MACH_AQUILA AQUILA 2676 445aquila MACH_AQUILA AQUILA 2676
2664spark_sls_hw2 MACH_SPARK_SLS_HW2 SPARK_SLS_HW2 2677
2665sheeva_esata MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678 446sheeva_esata MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678
2666msm7x30_surf MACH_MSM7X30_SURF MSM7X30_SURF 2679 447msm7x30_surf MACH_MSM7X30_SURF MSM7X30_SURF 2679
2667micro2440 MACH_MICRO2440 MICRO2440 2680
2668am2440 MACH_AM2440 AM2440 2681
2669tq2440 MACH_TQ2440 TQ2440 2682
2670lpc2478oem MACH_LPC2478OEM LPC2478OEM 2683
2671ak880x MACH_AK880X AK880X 2684
2672cobra3530 MACH_COBRA3530 COBRA3530 2685
2673pmppb MACH_PMPPB PMPPB 2686
2674u6715 MACH_U6715 U6715 2687
2675axar1500_sender MACH_AXAR1500_SENDER AXAR1500_SENDER 2688
2676g30_dvb MACH_G30_DVB G30_DVB 2689
2677vc088x MACH_VC088X VC088X 2690
2678mioa702 MACH_MIOA702 MIOA702 2691
2679hpmin MACH_HPMIN HPMIN 2692
2680ak880xak MACH_AK880XAK AK880XAK 2693
2681arm926tomap850 MACH_ARM926TOMAP850 ARM926TOMAP850 2694
2682lkevm MACH_LKEVM LKEVM 2695
2683mw6410 MACH_MW6410 MW6410 2696
2684terastation_wxl MACH_TERASTATION_WXL TERASTATION_WXL 2697 448terastation_wxl MACH_TERASTATION_WXL TERASTATION_WXL 2697
2685cpu8000e MACH_CPU8000E CPU8000E 2698
2686catania MACH_CATANIA CATANIA 2699
2687tokyo MACH_TOKYO TOKYO 2700
2688msm7201a_surf MACH_MSM7201A_SURF MSM7201A_SURF 2701
2689msm7201a_ffa MACH_MSM7201A_FFA MSM7201A_FFA 2702
2690msm7x25_surf MACH_MSM7X25_SURF MSM7X25_SURF 2703 449msm7x25_surf MACH_MSM7X25_SURF MSM7X25_SURF 2703
2691msm7x25_ffa MACH_MSM7X25_FFA MSM7X25_FFA 2704 450msm7x25_ffa MACH_MSM7X25_FFA MSM7X25_FFA 2704
2692msm7x27_surf MACH_MSM7X27_SURF MSM7X27_SURF 2705 451msm7x27_surf MACH_MSM7X27_SURF MSM7X27_SURF 2705
2693msm7x27_ffa MACH_MSM7X27_FFA MSM7X27_FFA 2706 452msm7x27_ffa MACH_MSM7X27_FFA MSM7X27_FFA 2706
2694msm7x30_ffa MACH_MSM7X30_FFA MSM7X30_FFA 2707 453msm7x30_ffa MACH_MSM7X30_FFA MSM7X30_FFA 2707
2695qsd8x50_surf MACH_QSD8X50_SURF QSD8X50_SURF 2708 454qsd8x50_surf MACH_QSD8X50_SURF QSD8X50_SURF 2708
2696qsd8x50_comet MACH_QSD8X50_COMET QSD8X50_COMET 2709
2697qsd8x50_ffa MACH_QSD8X50_FFA QSD8X50_FFA 2710
2698qsd8x50a_surf MACH_QSD8X50A_SURF QSD8X50A_SURF 2711
2699qsd8x50a_ffa MACH_QSD8X50A_FFA QSD8X50A_FFA 2712
2700adx_xgcp10 MACH_ADX_XGCP10 ADX_XGCP10 2713
2701mcgwumts2a MACH_MCGWUMTS2A MCGWUMTS2A 2714
2702mobikt MACH_MOBIKT MOBIKT 2715
2703mx53_evk MACH_MX53_EVK MX53_EVK 2716 455mx53_evk MACH_MX53_EVK MX53_EVK 2716
2704igep0030 MACH_IGEP0030 IGEP0030 2717 456igep0030 MACH_IGEP0030 IGEP0030 2717
2705axell_h40_h50_ctrl MACH_AXELL_H40_H50_CTRL AXELL_H40_H50_CTRL 2718
2706dtcommod MACH_DTCOMMOD DTCOMMOD 2719
2707gould MACH_GOULD GOULD 2720
2708siberia MACH_SIBERIA SIBERIA 2721
2709sbc3530 MACH_SBC3530 SBC3530 2722 457sbc3530 MACH_SBC3530 SBC3530 2722
2710qarm MACH_QARM QARM 2723
2711mips MACH_MIPS MIPS 2724
2712mx27grb MACH_MX27GRB MX27GRB 2725
2713sbc8100 MACH_SBC8100 SBC8100 2726
2714saarb MACH_SAARB SAARB 2727 458saarb MACH_SAARB SAARB 2727
2715omap3mini MACH_OMAP3MINI OMAP3MINI 2728
2716cnmbook7se MACH_CNMBOOK7SE CNMBOOK7SE 2729
2717catan MACH_CATAN CATAN 2730
2718harmony MACH_HARMONY HARMONY 2731 459harmony MACH_HARMONY HARMONY 2731
2719tonga MACH_TONGA TONGA 2732
2720cybook_orizon MACH_CYBOOK_ORIZON CYBOOK_ORIZON 2733
2721htcrhodiumcdma MACH_HTCRHODIUMCDMA HTCRHODIUMCDMA 2734
2722epc_g45 MACH_EPC_G45 EPC_G45 2735
2723epc_lpc3250 MACH_EPC_LPC3250 EPC_LPC3250 2736
2724mxc91341evb MACH_MXC91341EVB MXC91341EVB 2737
2725rtw1000 MACH_RTW1000 RTW1000 2738
2726bobcat MACH_BOBCAT BOBCAT 2739
2727trizeps6 MACH_TRIZEPS6 TRIZEPS6 2740
2728msm7x30_fluid MACH_MSM7X30_FLUID MSM7X30_FLUID 2741 460msm7x30_fluid MACH_MSM7X30_FLUID MSM7X30_FLUID 2741
2729nedap9263 MACH_NEDAP9263 NEDAP9263 2742
2730netgear_ms2110 MACH_NETGEAR_MS2110 NETGEAR_MS2110 2743
2731bmx MACH_BMX BMX 2744
2732netstream MACH_NETSTREAM NETSTREAM 2745
2733vpnext_rcu MACH_VPNEXT_RCU VPNEXT_RCU 2746
2734vpnext_mpu MACH_VPNEXT_MPU VPNEXT_MPU 2747
2735bcmring_tablet_v1 MACH_BCMRING_TABLET_V1 BCMRING_TABLET_V1 2748
2736sgarm10 MACH_SGARM10 SGARM10 2749
2737cm_t3517 MACH_CM_T3517 CM_T3517 2750 461cm_t3517 MACH_CM_T3517 CM_T3517 2750
2738omap3_cps MACH_OMAP3_CPS OMAP3_CPS 2751
2739axar1500_receiver MACH_AXAR1500_RECEIVER AXAR1500_RECEIVER 2752
2740wbd222 MACH_WBD222 WBD222 2753 462wbd222 MACH_WBD222 WBD222 2753
2741mt65xx MACH_MT65XX MT65XX 2754
2742msm8x60_surf MACH_MSM8X60_SURF MSM8X60_SURF 2755 463msm8x60_surf MACH_MSM8X60_SURF MSM8X60_SURF 2755
2743msm8x60_sim MACH_MSM8X60_SIM MSM8X60_SIM 2756 464msm8x60_sim MACH_MSM8X60_SIM MSM8X60_SIM 2756
2744vmc300 MACH_VMC300 VMC300 2757
2745tcc8000_sdk MACH_TCC8000_SDK TCC8000_SDK 2758 465tcc8000_sdk MACH_TCC8000_SDK TCC8000_SDK 2758
2746nanos MACH_NANOS NANOS 2759
2747stamp9g10 MACH_STAMP9G10 STAMP9G10 2760
2748stamp9g45 MACH_STAMP9G45 STAMP9G45 2761
2749h6053 MACH_H6053 H6053 2762
2750smint01 MACH_SMINT01 SMINT01 2763
2751prtlvt2 MACH_PRTLVT2 PRTLVT2 2764
2752ap420 MACH_AP420 AP420 2765 466ap420 MACH_AP420 AP420 2765
2753htcshift MACH_HTCSHIFT HTCSHIFT 2766
2754davinci_dm365_fc MACH_DAVINCI_DM365_FC DAVINCI_DM365_FC 2767 467davinci_dm365_fc MACH_DAVINCI_DM365_FC DAVINCI_DM365_FC 2767
2755msm8x55_surf MACH_MSM8X55_SURF MSM8X55_SURF 2768 468msm8x55_surf MACH_MSM8X55_SURF MSM8X55_SURF 2768
2756msm8x55_ffa MACH_MSM8X55_FFA MSM8X55_FFA 2769 469msm8x55_ffa MACH_MSM8X55_FFA MSM8X55_FFA 2769
@@ -2761,7 +474,6 @@ oreo_controller MACH_OREO_CONTROLLER OREO_CONTROLLER 2773
2761kopin_models MACH_KOPIN_MODELS KOPIN_MODELS 2774 474kopin_models MACH_KOPIN_MODELS KOPIN_MODELS 2774
2762ttc_vision2 MACH_TTC_VISION2 TTC_VISION2 2775 475ttc_vision2 MACH_TTC_VISION2 TTC_VISION2 2775
2763cns3420vb MACH_CNS3420VB CNS3420VB 2776 476cns3420vb MACH_CNS3420VB CNS3420VB 2776
2764lpc2 MACH_LPC2 LPC2 2777
2765olympus MACH_OLYMPUS OLYMPUS 2778 477olympus MACH_OLYMPUS OLYMPUS 2778
2766vortex MACH_VORTEX VORTEX 2779 478vortex MACH_VORTEX VORTEX 2779
2767s5pc200 MACH_S5PC200 S5PC200 2780 479s5pc200 MACH_S5PC200 S5PC200 2780
@@ -2788,7 +500,6 @@ ti8168evm MACH_TI8168EVM TI8168EVM 2800
2788neocoreomap MACH_NEOCOREOMAP NEOCOREOMAP 2801 500neocoreomap MACH_NEOCOREOMAP NEOCOREOMAP 2801
2789withings_wbp MACH_WITHINGS_WBP WITHINGS_WBP 2802 501withings_wbp MACH_WITHINGS_WBP WITHINGS_WBP 2802
2790dbps MACH_DBPS DBPS 2803 502dbps MACH_DBPS DBPS 2803
2791sbc9261 MACH_SBC9261 SBC9261 2804
2792pcbfp0001 MACH_PCBFP0001 PCBFP0001 2805 503pcbfp0001 MACH_PCBFP0001 PCBFP0001 2805
2793speedy MACH_SPEEDY SPEEDY 2806 504speedy MACH_SPEEDY SPEEDY 2806
2794chrysaor MACH_CHRYSAOR CHRYSAOR 2807 505chrysaor MACH_CHRYSAOR CHRYSAOR 2807
@@ -2812,7 +523,6 @@ p565 MACH_P565 P565 2824
2812acer_a4 MACH_ACER_A4 ACER_A4 2825 523acer_a4 MACH_ACER_A4 ACER_A4 2825
2813davinci_dm368_bip MACH_DAVINCI_DM368_BIP DAVINCI_DM368_BIP 2826 524davinci_dm368_bip MACH_DAVINCI_DM368_BIP DAVINCI_DM368_BIP 2826
2814eshare MACH_ESHARE ESHARE 2827 525eshare MACH_ESHARE ESHARE 2827
2815hw_omapl138_europa MACH_HW_OMAPL138_EUROPA HW_OMAPL138_EUROPA 2828
2816wlbargn MACH_WLBARGN WLBARGN 2829 526wlbargn MACH_WLBARGN WLBARGN 2829
2817bm170 MACH_BM170 BM170 2830 527bm170 MACH_BM170 BM170 2830
2818netspace_mini_v2 MACH_NETSPACE_MINI_V2 NETSPACE_MINI_V2 2831 528netspace_mini_v2 MACH_NETSPACE_MINI_V2 NETSPACE_MINI_V2 2831
@@ -2879,7 +589,6 @@ davinci_picto MACH_DAVINCI_PICTO DAVINCI_PICTO 2891
2879mecha MACH_MECHA MECHA 2892 589mecha MACH_MECHA MECHA 2892
2880bubba3 MACH_BUBBA3 BUBBA3 2893 590bubba3 MACH_BUBBA3 BUBBA3 2893
2881pupitre MACH_PUPITRE PUPITRE 2894 591pupitre MACH_PUPITRE PUPITRE 2894
2882tegra_harmony MACH_TEGRA_HARMONY TEGRA_HARMONY 2895
2883tegra_vogue MACH_TEGRA_VOGUE TEGRA_VOGUE 2896 592tegra_vogue MACH_TEGRA_VOGUE TEGRA_VOGUE 2896
2884tegra_e1165 MACH_TEGRA_E1165 TEGRA_E1165 2897 593tegra_e1165 MACH_TEGRA_E1165 TEGRA_E1165 2897
2885simplenet MACH_SIMPLENET SIMPLENET 2898 594simplenet MACH_SIMPLENET SIMPLENET 2898
@@ -2969,7 +678,6 @@ netspace_lite_v2 MACH_NETSPACE_LITE_V2 NETSPACE_LITE_V2 2983
2969ssc MACH_SSC SSC 2984 678ssc MACH_SSC SSC 2984
2970premierwave_en MACH_PREMIERWAVE_EN PREMIERWAVE_EN 2985 679premierwave_en MACH_PREMIERWAVE_EN PREMIERWAVE_EN 2985
2971wasabi MACH_WASABI WASABI 2986 680wasabi MACH_WASABI WASABI 2986
2972vivow MACH_VIVOW VIVOW 2987
2973mx50_rdp MACH_MX50_RDP MX50_RDP 2988 681mx50_rdp MACH_MX50_RDP MX50_RDP 2988
2974universal_c210 MACH_UNIVERSAL_C210 UNIVERSAL_C210 2989 682universal_c210 MACH_UNIVERSAL_C210 UNIVERSAL_C210 2989
2975real6410 MACH_REAL6410 REAL6410 2990 683real6410 MACH_REAL6410 REAL6410 2990
@@ -3017,12 +725,10 @@ remus MACH_REMUS REMUS 3031
3017at91cap7xdk MACH_AT91CAP7XDK AT91CAP7XDK 3032 725at91cap7xdk MACH_AT91CAP7XDK AT91CAP7XDK 3032
3018at91cap7stk MACH_AT91CAP7STK AT91CAP7STK 3033 726at91cap7stk MACH_AT91CAP7STK AT91CAP7STK 3033
3019kt_sbc_sam9_1 MACH_KT_SBC_SAM9_1 KT_SBC_SAM9_1 3034 727kt_sbc_sam9_1 MACH_KT_SBC_SAM9_1 KT_SBC_SAM9_1 3034
3020oratisrouter MACH_ORATISROUTER ORATISROUTER 3035
3021armada_xp_db MACH_ARMADA_XP_DB ARMADA_XP_DB 3036 728armada_xp_db MACH_ARMADA_XP_DB ARMADA_XP_DB 3036
3022spdm MACH_SPDM SPDM 3037 729spdm MACH_SPDM SPDM 3037
3023gtib MACH_GTIB GTIB 3038 730gtib MACH_GTIB GTIB 3038
3024dgm3240 MACH_DGM3240 DGM3240 3039 731dgm3240 MACH_DGM3240 DGM3240 3039
3025atlas_i_lpe MACH_ATLAS_I_LPE ATLAS_I_LPE 3040
3026htcmega MACH_HTCMEGA HTCMEGA 3041 732htcmega MACH_HTCMEGA HTCMEGA 3041
3027tricorder MACH_TRICORDER TRICORDER 3042 733tricorder MACH_TRICORDER TRICORDER 3042
3028tx28 MACH_TX28 TX28 3043 734tx28 MACH_TX28 TX28 3043
@@ -3062,7 +768,6 @@ clod MACH_CLOD CLOD 3077
3062rump MACH_RUMP RUMP 3078 768rump MACH_RUMP RUMP 3078
3063tenderloin MACH_TENDERLOIN TENDERLOIN 3079 769tenderloin MACH_TENDERLOIN TENDERLOIN 3079
3064shortloin MACH_SHORTLOIN SHORTLOIN 3080 770shortloin MACH_SHORTLOIN SHORTLOIN 3080
3065crespo MACH_CRESPO CRESPO 3081
3066antares MACH_ANTARES ANTARES 3082 771antares MACH_ANTARES ANTARES 3082
3067wb40n MACH_WB40N WB40N 3083 772wb40n MACH_WB40N WB40N 3083
3068herring MACH_HERRING HERRING 3084 773herring MACH_HERRING HERRING 3084
@@ -3111,7 +816,6 @@ smartqv3 MACH_SMARTQV3 SMARTQV3 3126
3111smartqv7 MACH_SMARTQV7 SMARTQV7 3127 816smartqv7 MACH_SMARTQV7 SMARTQV7 3127
3112paz00 MACH_PAZ00 PAZ00 3128 817paz00 MACH_PAZ00 PAZ00 3128
3113acmenetusfoxg20 MACH_ACMENETUSFOXG20 ACMENETUSFOXG20 3129 818acmenetusfoxg20 MACH_ACMENETUSFOXG20 ACMENETUSFOXG20 3129
3114htcwillow MACH_HTCWILLOW HTCWILLOW 3130
3115fwbd_0404 MACH_FWBD_0404 FWBD_0404 3131 819fwbd_0404 MACH_FWBD_0404 FWBD_0404 3131
3116hdgu MACH_HDGU HDGU 3132 820hdgu MACH_HDGU HDGU 3132
3117pyramid MACH_PYRAMID PYRAMID 3133 821pyramid MACH_PYRAMID PYRAMID 3133
@@ -3162,7 +866,6 @@ b5500 MACH_B5500 B5500 3177
3162s5500 MACH_S5500 S5500 3178 866s5500 MACH_S5500 S5500 3178
3163icon MACH_ICON ICON 3179 867icon MACH_ICON ICON 3179
3164elephant MACH_ELEPHANT ELEPHANT 3180 868elephant MACH_ELEPHANT ELEPHANT 3180
3165msm8x60_fusion MACH_MSM8X60_FUSION MSM8X60_FUSION 3181
3166shooter MACH_SHOOTER SHOOTER 3182 869shooter MACH_SHOOTER SHOOTER 3182
3167spade_lte MACH_SPADE_LTE SPADE_LTE 3183 870spade_lte MACH_SPADE_LTE SPADE_LTE 3183
3168philhwani MACH_PHILHWANI PHILHWANI 3184 871philhwani MACH_PHILHWANI PHILHWANI 3184
@@ -3174,13 +877,11 @@ ag5evm MACH_AG5EVM AG5EVM 3189
3174sc575plc MACH_SC575PLC SC575PLC 3190 877sc575plc MACH_SC575PLC SC575PLC 3190
3175sc575hmi MACH_SC575IPC SC575IPC 3191 878sc575hmi MACH_SC575IPC SC575IPC 3191
3176omap3_tdm3730 MACH_OMAP3_TDM3730 OMAP3_TDM3730 3192 879omap3_tdm3730 MACH_OMAP3_TDM3730 OMAP3_TDM3730 3192
3177g7 MACH_G7 G7 3193
3178top9000_eval MACH_TOP9000_EVAL TOP9000_EVAL 3194 880top9000_eval MACH_TOP9000_EVAL TOP9000_EVAL 3194
3179top9000_su MACH_TOP9000_SU TOP9000_SU 3195 881top9000_su MACH_TOP9000_SU TOP9000_SU 3195
3180utm300 MACH_UTM300 UTM300 3196 882utm300 MACH_UTM300 UTM300 3196
3181tsunagi MACH_TSUNAGI TSUNAGI 3197 883tsunagi MACH_TSUNAGI TSUNAGI 3197
3182ts75xx MACH_TS75XX TS75XX 3198 884ts75xx MACH_TS75XX TS75XX 3198
3183msm8x60_fusn_ffa MACH_MSM8X60_FUSN_FFA MSM8X60_FUSN_FFA 3199
3184ts47xx MACH_TS47XX TS47XX 3200 885ts47xx MACH_TS47XX TS47XX 3200
3185da850_k5 MACH_DA850_K5 DA850_K5 3201 886da850_k5 MACH_DA850_K5 DA850_K5 3201
3186ax502 MACH_AX502 AX502 3202 887ax502 MACH_AX502 AX502 3202
@@ -3285,7 +986,6 @@ rfl109145_ssrv MACH_RFL109145_SSRV RFL109145_SSRV 3304
3285nmh MACH_NMH NMH 3305 986nmh MACH_NMH NMH 3305
3286wn802t MACH_WN802T WN802T 3306 987wn802t MACH_WN802T WN802T 3306
3287dragonet MACH_DRAGONET DRAGONET 3307 988dragonet MACH_DRAGONET DRAGONET 3307
3288geneva_b MACH_GENEVA_B GENEVA_B 3308
3289at91sam9263desk16l MACH_AT91SAM9263DESK16L AT91SAM9263DESK16L 3309 989at91sam9263desk16l MACH_AT91SAM9263DESK16L AT91SAM9263DESK16L 3309
3290bcmhana_sv MACH_BCMHANA_SV BCMHANA_SV 3310 990bcmhana_sv MACH_BCMHANA_SV BCMHANA_SV 3310
3291bcmhana_tablet MACH_BCMHANA_TABLET BCMHANA_TABLET 3311 991bcmhana_tablet MACH_BCMHANA_TABLET BCMHANA_TABLET 3311
@@ -3316,3 +1016,86 @@ rover_g8 MACH_ROVER_G8 ROVER_G8 3335
3316t5388p MACH_T5388P T5388P 3336 1016t5388p MACH_T5388P T5388P 3336
3317dingo MACH_DINGO DINGO 3337 1017dingo MACH_DINGO DINGO 3337
3318goflexhome MACH_GOFLEXHOME GOFLEXHOME 3338 1018goflexhome MACH_GOFLEXHOME GOFLEXHOME 3338
1019lanreadyfn511 MACH_LANREADYFN511 LANREADYFN511 3340
1020omap3_baia MACH_OMAP3_BAIA OMAP3_BAIA 3341
1021omap3smartdisplay MACH_OMAP3SMARTDISPLAY OMAP3SMARTDISPLAY 3342
1022xilinx MACH_XILINX XILINX 3343
1023a2f MACH_A2F A2F 3344
1024sky25 MACH_SKY25 SKY25 3345
1025ccmx53 MACH_CCMX53 CCMX53 3346
1026ccmx53js MACH_CCMX53JS CCMX53JS 3347
1027ccwmx53 MACH_CCWMX53 CCWMX53 3348
1028ccwmx53js MACH_CCWMX53JS CCWMX53JS 3349
1029frisms MACH_FRISMS FRISMS 3350
1030msm7x27a_ffa MACH_MSM7X27A_FFA MSM7X27A_FFA 3351
1031msm7x27a_surf MACH_MSM7X27A_SURF MSM7X27A_SURF 3352
1032msm7x27a_rumi3 MACH_MSM7X27A_RUMI3 MSM7X27A_RUMI3 3353
1033dimmsam9g20 MACH_DIMMSAM9G20 DIMMSAM9G20 3354
1034dimm_imx28 MACH_DIMM_IMX28 DIMM_IMX28 3355
1035amk_a4 MACH_AMK_A4 AMK_A4 3356
1036gnet_sgme MACH_GNET_SGME GNET_SGME 3357
1037shooter_u MACH_SHOOTER_U SHOOTER_U 3358
1038vmx53 MACH_VMX53 VMX53 3359
1039rhino MACH_RHINO RHINO 3360
1040armlex4210 MACH_ARMLEX4210 ARMLEX4210 3361
1041swarcoextmodem MACH_SWARCOEXTMODEM SWARCOEXTMODEM 3362
1042snowball MACH_SNOWBALL SNOWBALL 3363
1043pcm049 MACH_PCM049 PCM049 3364
1044vigor MACH_VIGOR VIGOR 3365
1045oslo_amundsen MACH_OSLO_AMUNDSEN OSLO_AMUNDSEN 3366
1046gsl_diamond MACH_GSL_DIAMOND GSL_DIAMOND 3367
1047cv2201 MACH_CV2201 CV2201 3368
1048cv2202 MACH_CV2202 CV2202 3369
1049cv2203 MACH_CV2203 CV2203 3370
1050vit_ibox MACH_VIT_IBOX VIT_IBOX 3371
1051dm6441_esp MACH_DM6441_ESP DM6441_ESP 3372
1052at91sam9x5ek MACH_AT91SAM9X5EK AT91SAM9X5EK 3373
1053libra MACH_LIBRA LIBRA 3374
1054easycrrh MACH_EASYCRRH EASYCRRH 3375
1055tripel MACH_TRIPEL TRIPEL 3376
1056endian_mini MACH_ENDIAN_MINI ENDIAN_MINI 3377
1057xilinx_ep107 MACH_XILINX_EP107 XILINX_EP107 3378
1058nuri MACH_NURI NURI 3379
1059janus MACH_JANUS JANUS 3380
1060ddnas MACH_DDNAS DDNAS 3381
1061tag MACH_TAG TAG 3382
1062tagw MACH_TAGW TAGW 3383
1063nitrogen_vm_imx51 MACH_NITROGEN_VM_IMX51 NITROGEN_VM_IMX51 3384
1064viprinet MACH_VIPRINET VIPRINET 3385
1065bockw MACH_BOCKW BOCKW 3386
1066eva2000 MACH_EVA2000 EVA2000 3387
1067steelyard MACH_STEELYARD STEELYARD 3388
1068sdh001 MACH_MACH_SDH001 MACH_SDH001 3390
1069nsslsboard MACH_NSSLSBOARD NSSLSBOARD 3392
1070geneva_b5 MACH_GENEVA_B5 GENEVA_B5 3393
1071spear1340 MACH_SPEAR1340 SPEAR1340 3394
1072rexmas MACH_REXMAS REXMAS 3395
1073msm8960_cdp MACH_MSM8960_CDP MSM8960_CDP 3396
1074msm8960_mdp MACH_MSM8960_MDP MSM8960_MDP 3397
1075msm8960_fluid MACH_MSM8960_FLUID MSM8960_FLUID 3398
1076msm8960_apq MACH_MSM8960_APQ MSM8960_APQ 3399
1077helios_v2 MACH_HELIOS_V2 HELIOS_V2 3400
1078mif10p MACH_MIF10P MIF10P 3401
1079iam28 MACH_IAM28 IAM28 3402
1080picasso MACH_PICASSO PICASSO 3403
1081mr301a MACH_MR301A MR301A 3404
1082notle MACH_NOTLE NOTLE 3405
1083eelx2 MACH_EELX2 EELX2 3406
1084moon MACH_MOON MOON 3407
1085ruby MACH_RUBY RUBY 3408
1086goldengate MACH_GOLDENGATE GOLDENGATE 3409
1087ctbu_gen2 MACH_CTBU_GEN2 CTBU_GEN2 3410
1088kmp_am17_01 MACH_KMP_AM17_01 KMP_AM17_01 3411
1089wtplug MACH_WTPLUG WTPLUG 3412
1090mx27su2 MACH_MX27SU2 MX27SU2 3413
1091nb31 MACH_NB31 NB31 3414
1092hjsdu MACH_HJSDU HJSDU 3415
1093td3_rev1 MACH_TD3_REV1 TD3_REV1 3416
1094eag_ci4000 MACH_EAG_CI4000 EAG_CI4000 3417
1095net5big_nand_v2 MACH_NET5BIG_NAND_V2 NET5BIG_NAND_V2 3418
1096cpx2 MACH_CPX2 CPX2 3419
1097net2big_nand_v2 MACH_NET2BIG_NAND_V2 NET2BIG_NAND_V2 3420
1098ecuv5 MACH_ECUV5 ECUV5 3421
1099hsgx6d MACH_HSGX6D HSGX6D 3422
1100dawad7 MACH_DAWAD7 DAWAD7 3423
1101sam9repeater MACH_SAM9REPEATER SAM9REPEATER 3424
diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
index cd2062fe0f61..49642b59f73d 100644
--- a/arch/avr32/Kconfig
+++ b/arch/avr32/Kconfig
@@ -6,6 +6,11 @@ config AVR32
6 select HAVE_CLK 6 select HAVE_CLK
7 select HAVE_OPROFILE 7 select HAVE_OPROFILE
8 select HAVE_KPROBES 8 select HAVE_KPROBES
9 select HAVE_GENERIC_HARDIRQS
10 select GENERIC_IRQ_PROBE
11 select HARDIRQS_SW_RESEND
12 select GENERIC_IRQ_SHOW
13 select GENERIC_HARDIRQS_NO_DEPRECATED
9 help 14 help
10 AVR32 is a high-performance 32-bit RISC microprocessor core, 15 AVR32 is a high-performance 32-bit RISC microprocessor core,
11 designed for cost-sensitive embedded applications, with particular 16 designed for cost-sensitive embedded applications, with particular
@@ -17,9 +22,6 @@ config AVR32
17config GENERIC_GPIO 22config GENERIC_GPIO
18 def_bool y 23 def_bool y
19 24
20config GENERIC_HARDIRQS
21 def_bool y
22
23config STACKTRACE_SUPPORT 25config STACKTRACE_SUPPORT
24 def_bool y 26 def_bool y
25 27
@@ -29,12 +31,6 @@ config LOCKDEP_SUPPORT
29config TRACE_IRQFLAGS_SUPPORT 31config TRACE_IRQFLAGS_SUPPORT
30 def_bool y 32 def_bool y
31 33
32config HARDIRQS_SW_RESEND
33 def_bool y
34
35config GENERIC_IRQ_PROBE
36 def_bool y
37
38config RWSEM_GENERIC_SPINLOCK 34config RWSEM_GENERIC_SPINLOCK
39 def_bool y 35 def_bool y
40 36
diff --git a/arch/avr32/boards/atngw100/mrmt.c b/arch/avr32/boards/atngw100/mrmt.c
index 7919be311f4a..f91431963452 100644
--- a/arch/avr32/boards/atngw100/mrmt.c
+++ b/arch/avr32/boards/atngw100/mrmt.c
@@ -301,7 +301,7 @@ static int __init mrmt1_init(void)
301 /* Select the Touchscreen interrupt pin mode */ 301 /* Select the Touchscreen interrupt pin mode */
302 at32_select_periph( GPIO_PIOB_BASE, 1 << (PB_EXTINT_BASE+TS_IRQ), 302 at32_select_periph( GPIO_PIOB_BASE, 1 << (PB_EXTINT_BASE+TS_IRQ),
303 GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH); 303 GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
304 set_irq_type( AT32_EXTINT(TS_IRQ), IRQ_TYPE_EDGE_FALLING ); 304 irq_set_irq_type(AT32_EXTINT(TS_IRQ), IRQ_TYPE_EDGE_FALLING);
305 at32_spi_setup_slaves(0,spi01_board_info,ARRAY_SIZE(spi01_board_info)); 305 at32_spi_setup_slaves(0,spi01_board_info,ARRAY_SIZE(spi01_board_info));
306 spi_register_board_info(spi01_board_info,ARRAY_SIZE(spi01_board_info)); 306 spi_register_board_info(spi01_board_info,ARRAY_SIZE(spi01_board_info));
307#endif 307#endif
diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
index 659d119ce712..fafed4c38fd2 100644
--- a/arch/avr32/boards/atngw100/setup.c
+++ b/arch/avr32/boards/atngw100/setup.c
@@ -322,6 +322,6 @@ static int __init atngw100_arch_init(void)
322 /* set_irq_type() after the arch_initcall for EIC has run, and 322 /* set_irq_type() after the arch_initcall for EIC has run, and
323 * before the I2C subsystem could try using this IRQ. 323 * before the I2C subsystem could try using this IRQ.
324 */ 324 */
325 return set_irq_type(AT32_EXTINT(3), IRQ_TYPE_EDGE_FALLING); 325 return irq_set_irq_type(AT32_EXTINT(3), IRQ_TYPE_EDGE_FALLING);
326} 326}
327arch_initcall(atngw100_arch_init); 327arch_initcall(atngw100_arch_init);
diff --git a/arch/avr32/include/asm/bitops.h b/arch/avr32/include/asm/bitops.h
index f7dd5f71edf7..72444d97f80c 100644
--- a/arch/avr32/include/asm/bitops.h
+++ b/arch/avr32/include/asm/bitops.h
@@ -299,8 +299,7 @@ static inline int ffs(unsigned long word)
299#include <asm-generic/bitops/hweight.h> 299#include <asm-generic/bitops/hweight.h>
300#include <asm-generic/bitops/lock.h> 300#include <asm-generic/bitops/lock.h>
301 301
302#include <asm-generic/bitops/ext2-non-atomic.h> 302#include <asm-generic/bitops/le.h>
303#include <asm-generic/bitops/ext2-atomic.h> 303#include <asm-generic/bitops/ext2-atomic.h>
304#include <asm-generic/bitops/minix-le.h>
305 304
306#endif /* __ASM_AVR32_BITOPS_H */ 305#endif /* __ASM_AVR32_BITOPS_H */
diff --git a/arch/avr32/kernel/avr32_ksyms.c b/arch/avr32/kernel/avr32_ksyms.c
index 11e310c567a9..d93ead02daed 100644
--- a/arch/avr32/kernel/avr32_ksyms.c
+++ b/arch/avr32/kernel/avr32_ksyms.c
@@ -58,8 +58,8 @@ EXPORT_SYMBOL(find_first_zero_bit);
58EXPORT_SYMBOL(find_next_zero_bit); 58EXPORT_SYMBOL(find_next_zero_bit);
59EXPORT_SYMBOL(find_first_bit); 59EXPORT_SYMBOL(find_first_bit);
60EXPORT_SYMBOL(find_next_bit); 60EXPORT_SYMBOL(find_next_bit);
61EXPORT_SYMBOL(generic_find_next_le_bit); 61EXPORT_SYMBOL(find_next_bit_le);
62EXPORT_SYMBOL(generic_find_next_zero_le_bit); 62EXPORT_SYMBOL(find_next_zero_bit_le);
63 63
64/* I/O primitives (lib/io-*.S) */ 64/* I/O primitives (lib/io-*.S) */
65EXPORT_SYMBOL(__raw_readsb); 65EXPORT_SYMBOL(__raw_readsb);
diff --git a/arch/avr32/kernel/irq.c b/arch/avr32/kernel/irq.c
index 9604f7758f9a..bc3aa18293df 100644
--- a/arch/avr32/kernel/irq.c
+++ b/arch/avr32/kernel/irq.c
@@ -26,40 +26,3 @@ void __weak nmi_disable(void)
26{ 26{
27 27
28} 28}
29
30#ifdef CONFIG_PROC_FS
31int show_interrupts(struct seq_file *p, void *v)
32{
33 int i = *(loff_t *)v, cpu;
34 struct irqaction *action;
35 unsigned long flags;
36
37 if (i == 0) {
38 seq_puts(p, " ");
39 for_each_online_cpu(cpu)
40 seq_printf(p, "CPU%d ", cpu);
41 seq_putc(p, '\n');
42 }
43
44 if (i < NR_IRQS) {
45 raw_spin_lock_irqsave(&irq_desc[i].lock, flags);
46 action = irq_desc[i].action;
47 if (!action)
48 goto unlock;
49
50 seq_printf(p, "%3d: ", i);
51 for_each_online_cpu(cpu)
52 seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu));
53 seq_printf(p, " %8s", irq_desc[i].chip->name ? : "-");
54 seq_printf(p, " %s", action->name);
55 for (action = action->next; action; action = action->next)
56 seq_printf(p, ", %s", action->name);
57
58 seq_putc(p, '\n');
59 unlock:
60 raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags);
61 }
62
63 return 0;
64}
65#endif
diff --git a/arch/avr32/lib/findbit.S b/arch/avr32/lib/findbit.S
index 997b33b2288a..b93586460be6 100644
--- a/arch/avr32/lib/findbit.S
+++ b/arch/avr32/lib/findbit.S
@@ -123,7 +123,7 @@ ENTRY(find_next_bit)
123 brgt 1b 123 brgt 1b
124 retal r11 124 retal r11
125 125
126ENTRY(generic_find_next_le_bit) 126ENTRY(find_next_bit_le)
127 lsr r8, r10, 5 127 lsr r8, r10, 5
128 sub r9, r11, r10 128 sub r9, r11, r10
129 retle r11 129 retle r11
@@ -153,7 +153,7 @@ ENTRY(generic_find_next_le_bit)
153 brgt 1b 153 brgt 1b
154 retal r11 154 retal r11
155 155
156ENTRY(generic_find_next_zero_le_bit) 156ENTRY(find_next_zero_bit_le)
157 lsr r8, r10, 5 157 lsr r8, r10, 5
158 sub r9, r11, r10 158 sub r9, r11, r10
159 retle r11 159 retle r11
diff --git a/arch/avr32/mach-at32ap/extint.c b/arch/avr32/mach-at32ap/extint.c
index e9d12058ffd3..47ba4b9b6db1 100644
--- a/arch/avr32/mach-at32ap/extint.c
+++ b/arch/avr32/mach-at32ap/extint.c
@@ -61,45 +61,42 @@ struct eic {
61static struct eic *nmi_eic; 61static struct eic *nmi_eic;
62static bool nmi_enabled; 62static bool nmi_enabled;
63 63
64static void eic_ack_irq(unsigned int irq) 64static void eic_ack_irq(struct irq_chip *d)
65{ 65{
66 struct eic *eic = get_irq_chip_data(irq); 66 struct eic *eic = irq_data_get_irq_chip_data(data);
67 eic_writel(eic, ICR, 1 << (irq - eic->first_irq)); 67 eic_writel(eic, ICR, 1 << (d->irq - eic->first_irq));
68} 68}
69 69
70static void eic_mask_irq(unsigned int irq) 70static void eic_mask_irq(struct irq_chip *d)
71{ 71{
72 struct eic *eic = get_irq_chip_data(irq); 72 struct eic *eic = irq_data_get_irq_chip_data(data);
73 eic_writel(eic, IDR, 1 << (irq - eic->first_irq)); 73 eic_writel(eic, IDR, 1 << (d->irq - eic->first_irq));
74} 74}
75 75
76static void eic_mask_ack_irq(unsigned int irq) 76static void eic_mask_ack_irq(struct irq_chip *d)
77{ 77{
78 struct eic *eic = get_irq_chip_data(irq); 78 struct eic *eic = irq_data_get_irq_chip_data(data);
79 eic_writel(eic, ICR, 1 << (irq - eic->first_irq)); 79 eic_writel(eic, ICR, 1 << (d->irq - eic->first_irq));
80 eic_writel(eic, IDR, 1 << (irq - eic->first_irq)); 80 eic_writel(eic, IDR, 1 << (d->irq - eic->first_irq));
81} 81}
82 82
83static void eic_unmask_irq(unsigned int irq) 83static void eic_unmask_irq(struct irq_chip *d)
84{ 84{
85 struct eic *eic = get_irq_chip_data(irq); 85 struct eic *eic = irq_data_get_irq_chip_data(data);
86 eic_writel(eic, IER, 1 << (irq - eic->first_irq)); 86 eic_writel(eic, IER, 1 << (d->irq - eic->first_irq));
87} 87}
88 88
89static int eic_set_irq_type(unsigned int irq, unsigned int flow_type) 89static int eic_set_irq_type(struct irq_chip *d, unsigned int flow_type)
90{ 90{
91 struct eic *eic = get_irq_chip_data(irq); 91 struct eic *eic = irq_data_get_irq_chip_data(data);
92 struct irq_desc *desc; 92 unsigned int irq = d->irq;
93 unsigned int i = irq - eic->first_irq; 93 unsigned int i = irq - eic->first_irq;
94 u32 mode, edge, level; 94 u32 mode, edge, level;
95 int ret = 0;
96 95
97 flow_type &= IRQ_TYPE_SENSE_MASK; 96 flow_type &= IRQ_TYPE_SENSE_MASK;
98 if (flow_type == IRQ_TYPE_NONE) 97 if (flow_type == IRQ_TYPE_NONE)
99 flow_type = IRQ_TYPE_LEVEL_LOW; 98 flow_type = IRQ_TYPE_LEVEL_LOW;
100 99
101 desc = &irq_desc[irq];
102
103 mode = eic_readl(eic, MODE); 100 mode = eic_readl(eic, MODE);
104 edge = eic_readl(eic, EDGE); 101 edge = eic_readl(eic, EDGE);
105 level = eic_readl(eic, LEVEL); 102 level = eic_readl(eic, LEVEL);
@@ -122,39 +119,34 @@ static int eic_set_irq_type(unsigned int irq, unsigned int flow_type)
122 edge &= ~(1 << i); 119 edge &= ~(1 << i);
123 break; 120 break;
124 default: 121 default:
125 ret = -EINVAL; 122 return -EINVAL;
126 break;
127 } 123 }
128 124
129 if (ret == 0) { 125 eic_writel(eic, MODE, mode);
130 eic_writel(eic, MODE, mode); 126 eic_writel(eic, EDGE, edge);
131 eic_writel(eic, EDGE, edge); 127 eic_writel(eic, LEVEL, level);
132 eic_writel(eic, LEVEL, level);
133
134 if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) {
135 flow_type |= IRQ_LEVEL;
136 __set_irq_handler_unlocked(irq, handle_level_irq);
137 } else
138 __set_irq_handler_unlocked(irq, handle_edge_irq);
139 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
140 desc->status |= flow_type;
141 }
142 128
143 return ret; 129 irqd_set_trigger_type(d, flow_type);
130 if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
131 __irq_set_handler_locked(irq, handle_level_irq);
132 else
133 __irq_set_handler_locked(irq, handle_edge_irq);
134
135 return IRQ_SET_MASK_OK_NOCOPY;
144} 136}
145 137
146static struct irq_chip eic_chip = { 138static struct irq_chip eic_chip = {
147 .name = "eic", 139 .name = "eic",
148 .ack = eic_ack_irq, 140 .irq_ack = eic_ack_irq,
149 .mask = eic_mask_irq, 141 .irq_mask = eic_mask_irq,
150 .mask_ack = eic_mask_ack_irq, 142 .irq_mask_ack = eic_mask_ack_irq,
151 .unmask = eic_unmask_irq, 143 .irq_unmask = eic_unmask_irq,
152 .set_type = eic_set_irq_type, 144 .irq_set_type = eic_set_irq_type,
153}; 145};
154 146
155static void demux_eic_irq(unsigned int irq, struct irq_desc *desc) 147static void demux_eic_irq(unsigned int irq, struct irq_desc *desc)
156{ 148{
157 struct eic *eic = desc->handler_data; 149 struct eic *eic = irq_desc_get_handler_data(desc);
158 unsigned long status, pending; 150 unsigned long status, pending;
159 unsigned int i; 151 unsigned int i;
160 152
@@ -234,13 +226,13 @@ static int __init eic_probe(struct platform_device *pdev)
234 eic->chip = &eic_chip; 226 eic->chip = &eic_chip;
235 227
236 for (i = 0; i < nr_of_irqs; i++) { 228 for (i = 0; i < nr_of_irqs; i++) {
237 set_irq_chip_and_handler(eic->first_irq + i, &eic_chip, 229 irq_set_chip_and_handler(eic->first_irq + i, &eic_chip,
238 handle_level_irq); 230 handle_level_irq);
239 set_irq_chip_data(eic->first_irq + i, eic); 231 irq_set_chip_data(eic->first_irq + i, eic);
240 } 232 }
241 233
242 set_irq_chained_handler(int_irq, demux_eic_irq); 234 irq_set_chained_handler(int_irq, demux_eic_irq);
243 set_irq_data(int_irq, eic); 235 irq_set_handler_data(int_irq, eic);
244 236
245 if (pdev->id == 0) { 237 if (pdev->id == 0) {
246 nmi_eic = eic; 238 nmi_eic = eic;
diff --git a/arch/avr32/mach-at32ap/intc.c b/arch/avr32/mach-at32ap/intc.c
index 994c4545e2b7..21ce35f33aa5 100644
--- a/arch/avr32/mach-at32ap/intc.c
+++ b/arch/avr32/mach-at32ap/intc.c
@@ -34,12 +34,12 @@ extern struct platform_device at32_intc0_device;
34 * TODO: We may be able to implement mask/unmask by setting IxM flags 34 * TODO: We may be able to implement mask/unmask by setting IxM flags
35 * in the status register. 35 * in the status register.
36 */ 36 */
37static void intc_mask_irq(unsigned int irq) 37static void intc_mask_irq(struct irq_data *d)
38{ 38{
39 39
40} 40}
41 41
42static void intc_unmask_irq(unsigned int irq) 42static void intc_unmask_irq(struct irq_data *d)
43{ 43{
44 44
45} 45}
@@ -47,8 +47,8 @@ static void intc_unmask_irq(unsigned int irq)
47static struct intc intc0 = { 47static struct intc intc0 = {
48 .chip = { 48 .chip = {
49 .name = "intc", 49 .name = "intc",
50 .mask = intc_mask_irq, 50 .irq_mask = intc_mask_irq,
51 .unmask = intc_unmask_irq, 51 .irq_unmask = intc_unmask_irq,
52 }, 52 },
53}; 53};
54 54
@@ -57,7 +57,6 @@ static struct intc intc0 = {
57 */ 57 */
58asmlinkage void do_IRQ(int level, struct pt_regs *regs) 58asmlinkage void do_IRQ(int level, struct pt_regs *regs)
59{ 59{
60 struct irq_desc *desc;
61 struct pt_regs *old_regs; 60 struct pt_regs *old_regs;
62 unsigned int irq; 61 unsigned int irq;
63 unsigned long status_reg; 62 unsigned long status_reg;
@@ -69,8 +68,7 @@ asmlinkage void do_IRQ(int level, struct pt_regs *regs)
69 irq_enter(); 68 irq_enter();
70 69
71 irq = intc_readl(&intc0, INTCAUSE0 - 4 * level); 70 irq = intc_readl(&intc0, INTCAUSE0 - 4 * level);
72 desc = irq_desc + irq; 71 generic_handle_irq(irq);
73 desc->handle_irq(irq, desc);
74 72
75 /* 73 /*
76 * Clear all interrupt level masks so that we may handle 74 * Clear all interrupt level masks so that we may handle
@@ -128,7 +126,7 @@ void __init init_IRQ(void)
128 intc_writel(&intc0, INTPR0 + 4 * i, offset); 126 intc_writel(&intc0, INTPR0 + 4 * i, offset);
129 readback = intc_readl(&intc0, INTPR0 + 4 * i); 127 readback = intc_readl(&intc0, INTPR0 + 4 * i);
130 if (readback == offset) 128 if (readback == offset)
131 set_irq_chip_and_handler(i, &intc0.chip, 129 irq_set_chip_and_handler(i, &intc0.chip,
132 handle_simple_irq); 130 handle_simple_irq);
133 } 131 }
134 132
diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c
index 09a274c9d0b7..37534103574e 100644
--- a/arch/avr32/mach-at32ap/pio.c
+++ b/arch/avr32/mach-at32ap/pio.c
@@ -249,23 +249,23 @@ static void gpio_set(struct gpio_chip *chip, unsigned offset, int value)
249 249
250/* GPIO IRQ support */ 250/* GPIO IRQ support */
251 251
252static void gpio_irq_mask(unsigned irq) 252static void gpio_irq_mask(struct irq_data *d)
253{ 253{
254 unsigned gpio = irq_to_gpio(irq); 254 unsigned gpio = irq_to_gpio(d->irq);
255 struct pio_device *pio = &pio_dev[gpio >> 5]; 255 struct pio_device *pio = &pio_dev[gpio >> 5];
256 256
257 pio_writel(pio, IDR, 1 << (gpio & 0x1f)); 257 pio_writel(pio, IDR, 1 << (gpio & 0x1f));
258} 258}
259 259
260static void gpio_irq_unmask(unsigned irq) 260static void gpio_irq_unmask(struct irq_data *d))
261{ 261{
262 unsigned gpio = irq_to_gpio(irq); 262 unsigned gpio = irq_to_gpio(d->irq);
263 struct pio_device *pio = &pio_dev[gpio >> 5]; 263 struct pio_device *pio = &pio_dev[gpio >> 5];
264 264
265 pio_writel(pio, IER, 1 << (gpio & 0x1f)); 265 pio_writel(pio, IER, 1 << (gpio & 0x1f));
266} 266}
267 267
268static int gpio_irq_type(unsigned irq, unsigned type) 268static int gpio_irq_type(struct irq_data *d, unsigned type)
269{ 269{
270 if (type != IRQ_TYPE_EDGE_BOTH && type != IRQ_TYPE_NONE) 270 if (type != IRQ_TYPE_EDGE_BOTH && type != IRQ_TYPE_NONE)
271 return -EINVAL; 271 return -EINVAL;
@@ -275,20 +275,19 @@ static int gpio_irq_type(unsigned irq, unsigned type)
275 275
276static struct irq_chip gpio_irqchip = { 276static struct irq_chip gpio_irqchip = {
277 .name = "gpio", 277 .name = "gpio",
278 .mask = gpio_irq_mask, 278 .irq_mask = gpio_irq_mask,
279 .unmask = gpio_irq_unmask, 279 .irq_unmask = gpio_irq_unmask,
280 .set_type = gpio_irq_type, 280 .irq_set_type = gpio_irq_type,
281}; 281};
282 282
283static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) 283static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
284{ 284{
285 struct pio_device *pio = get_irq_chip_data(irq); 285 struct pio_device *pio = get_irq_desc_chip_data(desc);
286 unsigned gpio_irq; 286 unsigned gpio_irq;
287 287
288 gpio_irq = (unsigned) get_irq_data(irq); 288 gpio_irq = (unsigned) irq_get_handler_data(irq);
289 for (;;) { 289 for (;;) {
290 u32 isr; 290 u32 isr;
291 struct irq_desc *d;
292 291
293 /* ack pending GPIO interrupts */ 292 /* ack pending GPIO interrupts */
294 isr = pio_readl(pio, ISR) & pio_readl(pio, IMR); 293 isr = pio_readl(pio, ISR) & pio_readl(pio, IMR);
@@ -301,9 +300,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
301 isr &= ~(1 << i); 300 isr &= ~(1 << i);
302 301
303 i += gpio_irq; 302 i += gpio_irq;
304 d = &irq_desc[i]; 303 generic_handle_irq(i);
305
306 d->handle_irq(i, d);
307 } while (isr); 304 } while (isr);
308 } 305 }
309} 306}
@@ -313,16 +310,16 @@ gpio_irq_setup(struct pio_device *pio, int irq, int gpio_irq)
313{ 310{
314 unsigned i; 311 unsigned i;
315 312
316 set_irq_chip_data(irq, pio); 313 irq_set_chip_data(irq, pio);
317 set_irq_data(irq, (void *) gpio_irq); 314 irq_set_handler_data(irq, (void *)gpio_irq);
318 315
319 for (i = 0; i < 32; i++, gpio_irq++) { 316 for (i = 0; i < 32; i++, gpio_irq++) {
320 set_irq_chip_data(gpio_irq, pio); 317 irq_set_chip_data(gpio_irq, pio);
321 set_irq_chip_and_handler(gpio_irq, &gpio_irqchip, 318 irq_set_chip_and_handler(gpio_irq, &gpio_irqchip,
322 handle_simple_irq); 319 handle_simple_irq);
323 } 320 }
324 321
325 set_irq_chained_handler(irq, gpio_irq_handler); 322 irq_set_chained_handler(irq, gpio_irq_handler);
326} 323}
327 324
328/*--------------------------------------------------------------------------*/ 325/*--------------------------------------------------------------------------*/
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 01615d4f57d6..672c21632f2f 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -31,6 +31,7 @@ config BLACKFIN
31 select HAVE_OPROFILE 31 select HAVE_OPROFILE
32 select ARCH_WANT_OPTIONAL_GPIOLIB 32 select ARCH_WANT_OPTIONAL_GPIOLIB
33 select HAVE_GENERIC_HARDIRQS 33 select HAVE_GENERIC_HARDIRQS
34 select GENERIC_ATOMIC64
34 select GENERIC_IRQ_PROBE 35 select GENERIC_IRQ_PROBE
35 select IRQ_PER_CPU if SMP 36 select IRQ_PER_CPU if SMP
36 select GENERIC_HARDIRQS_NO_DEPRECATED 37 select GENERIC_HARDIRQS_NO_DEPRECATED
diff --git a/arch/blackfin/include/asm/atomic.h b/arch/blackfin/include/asm/atomic.h
index d27c6274247d..e48508957160 100644
--- a/arch/blackfin/include/asm/atomic.h
+++ b/arch/blackfin/include/asm/atomic.h
@@ -121,4 +121,6 @@ static inline int atomic_test_mask(int mask, atomic_t *v)
121 121
122#endif 122#endif
123 123
124#include <asm-generic/atomic64.h>
125
124#endif 126#endif
diff --git a/arch/blackfin/include/asm/bitops.h b/arch/blackfin/include/asm/bitops.h
index 29f4fd886174..49762c6bb0d5 100644
--- a/arch/blackfin/include/asm/bitops.h
+++ b/arch/blackfin/include/asm/bitops.h
@@ -25,9 +25,8 @@
25#include <asm-generic/bitops/const_hweight.h> 25#include <asm-generic/bitops/const_hweight.h>
26#include <asm-generic/bitops/lock.h> 26#include <asm-generic/bitops/lock.h>
27 27
28#include <asm-generic/bitops/ext2-non-atomic.h> 28#include <asm-generic/bitops/le.h>
29#include <asm-generic/bitops/ext2-atomic.h> 29#include <asm-generic/bitops/ext2-atomic.h>
30#include <asm-generic/bitops/minix.h>
31 30
32#ifndef CONFIG_SMP 31#ifndef CONFIG_SMP
33#include <linux/irqflags.h> 32#include <linux/irqflags.h>
diff --git a/arch/blackfin/include/asm/unistd.h b/arch/blackfin/include/asm/unistd.h
index c97497dd0d19..ff9a9f35d50b 100644
--- a/arch/blackfin/include/asm/unistd.h
+++ b/arch/blackfin/include/asm/unistd.h
@@ -396,8 +396,9 @@
396#define __NR_name_to_handle_at 375 396#define __NR_name_to_handle_at 375
397#define __NR_open_by_handle_at 376 397#define __NR_open_by_handle_at 376
398#define __NR_clock_adjtime 377 398#define __NR_clock_adjtime 377
399#define __NR_syncfs 378
399 400
400#define __NR_syscall 378 401#define __NR_syscall 379
401#define NR_syscalls __NR_syscall 402#define NR_syscalls __NR_syscall
402 403
403/* Old optional stuff no one actually uses */ 404/* Old optional stuff no one actually uses */
diff --git a/arch/blackfin/mach-bf548/include/mach/anomaly.h b/arch/blackfin/mach-bf548/include/mach/anomaly.h
index 4070079e2c00..ffd0537295ac 100644
--- a/arch/blackfin/mach-bf548/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf548/include/mach/anomaly.h
@@ -81,7 +81,11 @@
81/* PLL Status Register Is Inaccurate */ 81/* PLL Status Register Is Inaccurate */
82#define ANOMALY_05000351 (__SILICON_REVISION__ < 1) 82#define ANOMALY_05000351 (__SILICON_REVISION__ < 1)
83/* bfrom_SysControl() Firmware Function Performs Improper System Reset */ 83/* bfrom_SysControl() Firmware Function Performs Improper System Reset */
84#define ANOMALY_05000353 (__SILICON_REVISION__ < 2) 84/*
85 * Note: anomaly sheet says this is fixed with bf54x-0.2+, but testing
86 * shows that the fix itself does not cover all cases.
87 */
88#define ANOMALY_05000353 (1)
85/* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */ 89/* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */
86#define ANOMALY_05000355 (__SILICON_REVISION__ < 1) 90#define ANOMALY_05000355 (__SILICON_REVISION__ < 1)
87/* System Stalled During A Core Access To AMC While A Core Access To NFC FIFO Is Required */ 91/* System Stalled During A Core Access To AMC While A Core Access To NFC FIFO Is Required */
diff --git a/arch/blackfin/mach-bf561/hotplug.c b/arch/blackfin/mach-bf561/hotplug.c
index 42fc085629c7..0123117b8ff2 100644
--- a/arch/blackfin/mach-bf561/hotplug.c
+++ b/arch/blackfin/mach-bf561/hotplug.c
@@ -7,6 +7,7 @@
7 7
8#include <linux/smp.h> 8#include <linux/smp.h>
9#include <asm/blackfin.h> 9#include <asm/blackfin.h>
10#include <asm/cacheflush.h>
10#include <mach/pll.h> 11#include <mach/pll.h>
11 12
12int hotplug_coreb; 13int hotplug_coreb;
@@ -14,8 +15,16 @@ int hotplug_coreb;
14void platform_cpu_die(void) 15void platform_cpu_die(void)
15{ 16{
16 unsigned long iwr; 17 unsigned long iwr;
18
17 hotplug_coreb = 1; 19 hotplug_coreb = 1;
18 20
21 /*
22 * When CoreB wakes up, the code in _coreb_trampoline_start cannot
23 * turn off the data cache. This causes the CoreB failed to boot.
24 * As a workaround, we invalidate all the data cache before sleep.
25 */
26 blackfin_invalidate_entire_dcache();
27
19 /* disable core timer */ 28 /* disable core timer */
20 bfin_write_TCNTL(0); 29 bfin_write_TCNTL(0);
21 30
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index 757943f620e7..46ab45704c89 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -1752,6 +1752,7 @@ ENTRY(_sys_call_table)
1752 .long _sys_name_to_handle_at /* 375 */ 1752 .long _sys_name_to_handle_at /* 375 */
1753 .long _sys_open_by_handle_at 1753 .long _sys_open_by_handle_at
1754 .long _sys_clock_adjtime 1754 .long _sys_clock_adjtime
1755 .long _sys_syncfs
1755 1756
1756 .rept NR_syscalls-(.-_sys_call_table)/4 1757 .rept NR_syscalls-(.-_sys_call_table)/4
1757 .long _sys_ni_syscall 1758 .long _sys_ni_syscall
diff --git a/arch/cris/include/asm/bitops.h b/arch/cris/include/asm/bitops.h
index 9e69cfb7f134..310e0de67aa6 100644
--- a/arch/cris/include/asm/bitops.h
+++ b/arch/cris/include/asm/bitops.h
@@ -154,12 +154,11 @@ static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
154#include <asm-generic/bitops/find.h> 154#include <asm-generic/bitops/find.h>
155#include <asm-generic/bitops/lock.h> 155#include <asm-generic/bitops/lock.h>
156 156
157#include <asm-generic/bitops/ext2-non-atomic.h> 157#include <asm-generic/bitops/le.h>
158 158
159#define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a) 159#define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a)
160#define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a) 160#define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a)
161 161
162#include <asm-generic/bitops/minix.h>
163#include <asm-generic/bitops/sched.h> 162#include <asm-generic/bitops/sched.h>
164 163
165#endif /* __KERNEL__ */ 164#endif /* __KERNEL__ */
diff --git a/arch/cris/include/asm/types.h b/arch/cris/include/asm/types.h
index 44055087c932..551a12c0aa01 100644
--- a/arch/cris/include/asm/types.h
+++ b/arch/cris/include/asm/types.h
@@ -16,12 +16,6 @@ typedef unsigned short umode_t;
16 16
17#define BITS_PER_LONG 32 17#define BITS_PER_LONG 32
18 18
19#ifndef __ASSEMBLY__
20
21typedef u32 dma64_addr_t;
22
23#endif /* __ASSEMBLY__ */
24
25#endif /* __KERNEL__ */ 19#endif /* __KERNEL__ */
26 20
27#endif 21#endif
diff --git a/arch/frv/Kconfig b/arch/frv/Kconfig
index 747499a1b31e..f6037b2da25e 100644
--- a/arch/frv/Kconfig
+++ b/arch/frv/Kconfig
@@ -22,6 +22,10 @@ config GENERIC_FIND_NEXT_BIT
22 bool 22 bool
23 default y 23 default y
24 24
25config GENERIC_FIND_BIT_LE
26 bool
27 default y
28
25config GENERIC_HWEIGHT 29config GENERIC_HWEIGHT
26 bool 30 bool
27 default y 31 default y
diff --git a/arch/frv/include/asm/bitops.h b/arch/frv/include/asm/bitops.h
index 50ae91b29674..a1d00b0c6ed7 100644
--- a/arch/frv/include/asm/bitops.h
+++ b/arch/frv/include/asm/bitops.h
@@ -401,13 +401,11 @@ int __ilog2_u64(u64 n)
401#include <asm-generic/bitops/hweight.h> 401#include <asm-generic/bitops/hweight.h>
402#include <asm-generic/bitops/lock.h> 402#include <asm-generic/bitops/lock.h>
403 403
404#include <asm-generic/bitops/ext2-non-atomic.h> 404#include <asm-generic/bitops/le.h>
405 405
406#define ext2_set_bit_atomic(lock,nr,addr) test_and_set_bit ((nr) ^ 0x18, (addr)) 406#define ext2_set_bit_atomic(lock,nr,addr) test_and_set_bit ((nr) ^ 0x18, (addr))
407#define ext2_clear_bit_atomic(lock,nr,addr) test_and_clear_bit((nr) ^ 0x18, (addr)) 407#define ext2_clear_bit_atomic(lock,nr,addr) test_and_clear_bit((nr) ^ 0x18, (addr))
408 408
409#include <asm-generic/bitops/minix-le.h>
410
411#endif /* __KERNEL__ */ 409#endif /* __KERNEL__ */
412 410
413#endif /* _ASM_BITOPS_H */ 411#endif /* _ASM_BITOPS_H */
diff --git a/arch/h8300/Kconfig b/arch/h8300/Kconfig
index 6df692d1475f..931a1ac99ff1 100644
--- a/arch/h8300/Kconfig
+++ b/arch/h8300/Kconfig
@@ -4,6 +4,7 @@ config H8300
4 select HAVE_IDE 4 select HAVE_IDE
5 select HAVE_GENERIC_HARDIRQS 5 select HAVE_GENERIC_HARDIRQS
6 select GENERIC_HARDIRQS_NO_DEPRECATED 6 select GENERIC_HARDIRQS_NO_DEPRECATED
7 select GENERIC_IRQ_SHOW
7 8
8config SYMBOL_PREFIX 9config SYMBOL_PREFIX
9 string 10 string
@@ -45,6 +46,10 @@ config GENERIC_FIND_NEXT_BIT
45 bool 46 bool
46 default y 47 default y
47 48
49config GENERIC_FIND_BIT_LE
50 bool
51 default y
52
48config GENERIC_HWEIGHT 53config GENERIC_HWEIGHT
49 bool 54 bool
50 default y 55 default y
diff --git a/arch/h8300/include/asm/bitops.h b/arch/h8300/include/asm/bitops.h
index cb9ddf5fc54f..e856c1bb3415 100644
--- a/arch/h8300/include/asm/bitops.h
+++ b/arch/h8300/include/asm/bitops.h
@@ -200,9 +200,8 @@ static __inline__ unsigned long __ffs(unsigned long word)
200#include <asm-generic/bitops/sched.h> 200#include <asm-generic/bitops/sched.h>
201#include <asm-generic/bitops/hweight.h> 201#include <asm-generic/bitops/hweight.h>
202#include <asm-generic/bitops/lock.h> 202#include <asm-generic/bitops/lock.h>
203#include <asm-generic/bitops/ext2-non-atomic.h> 203#include <asm-generic/bitops/le.h>
204#include <asm-generic/bitops/ext2-atomic.h> 204#include <asm-generic/bitops/ext2-atomic.h>
205#include <asm-generic/bitops/minix.h>
206 205
207#endif /* __KERNEL__ */ 206#endif /* __KERNEL__ */
208 207
diff --git a/arch/h8300/kernel/irq.c b/arch/h8300/kernel/irq.c
index 7643d39925d6..1f67fed476af 100644
--- a/arch/h8300/kernel/irq.c
+++ b/arch/h8300/kernel/irq.c
@@ -155,7 +155,7 @@ void __init init_IRQ(void)
155 setup_vector(); 155 setup_vector();
156 156
157 for (c = 0; c < NR_IRQS; c++) 157 for (c = 0; c < NR_IRQS; c++)
158 set_irq_chip_and_handler(c, &h8300irq_chip, handle_simple_irq); 158 irq_set_chip_and_handler(c, &h8300irq_chip, handle_simple_irq);
159} 159}
160 160
161asmlinkage void do_IRQ(int irq) 161asmlinkage void do_IRQ(int irq)
@@ -164,34 +164,3 @@ asmlinkage void do_IRQ(int irq)
164 generic_handle_irq(irq); 164 generic_handle_irq(irq);
165 irq_exit(); 165 irq_exit();
166} 166}
167
168#if defined(CONFIG_PROC_FS)
169int show_interrupts(struct seq_file *p, void *v)
170{
171 int i = *(loff_t *) v;
172 struct irqaction * action;
173 unsigned long flags;
174
175 if (i == 0)
176 seq_puts(p, " CPU0");
177
178 if (i < NR_IRQS) {
179 raw_spin_lock_irqsave(&irq_desc[i].lock, flags);
180 action = irq_desc[i].action;
181 if (!action)
182 goto unlock;
183 seq_printf(p, "%3d: ",i);
184 seq_printf(p, "%10u ", kstat_irqs(i));
185 seq_printf(p, " %14s", irq_desc[i].irq_data.chip->name);
186 seq_printf(p, "-%-8s", irq_desc[i].name);
187 seq_printf(p, " %s", action->name);
188
189 for (action=action->next; action; action = action->next)
190 seq_printf(p, ", %s", action->name);
191 seq_putc(p, '\n');
192unlock:
193 raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags);
194 }
195 return 0;
196}
197#endif
diff --git a/arch/ia64/include/asm/acpi.h b/arch/ia64/include/asm/acpi.h
index 837dc82a013e..a06dfb13d518 100644
--- a/arch/ia64/include/asm/acpi.h
+++ b/arch/ia64/include/asm/acpi.h
@@ -128,9 +128,9 @@ static inline const char *acpi_get_sysname (void)
128int acpi_request_vector (u32 int_type); 128int acpi_request_vector (u32 int_type);
129int acpi_gsi_to_irq (u32 gsi, unsigned int *irq); 129int acpi_gsi_to_irq (u32 gsi, unsigned int *irq);
130 130
131/* routines for saving/restoring kernel state */ 131/* Low-level suspend routine. */
132extern int acpi_save_state_mem(void); 132extern int acpi_suspend_lowlevel(void);
133extern void acpi_restore_state_mem(void); 133
134extern unsigned long acpi_wakeup_address; 134extern unsigned long acpi_wakeup_address;
135 135
136/* 136/*
diff --git a/arch/ia64/include/asm/bitops.h b/arch/ia64/include/asm/bitops.h
index 9da3df6f1a52..b76f7e009218 100644
--- a/arch/ia64/include/asm/bitops.h
+++ b/arch/ia64/include/asm/bitops.h
@@ -456,12 +456,11 @@ static __inline__ unsigned long __arch_hweight64(unsigned long x)
456 456
457#ifdef __KERNEL__ 457#ifdef __KERNEL__
458 458
459#include <asm-generic/bitops/ext2-non-atomic.h> 459#include <asm-generic/bitops/le.h>
460 460
461#define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a) 461#define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a)
462#define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a) 462#define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a)
463 463
464#include <asm-generic/bitops/minix.h>
465#include <asm-generic/bitops/sched.h> 464#include <asm-generic/bitops/sched.h>
466 465
467#endif /* __KERNEL__ */ 466#endif /* __KERNEL__ */
diff --git a/arch/ia64/include/asm/thread_info.h b/arch/ia64/include/asm/thread_info.h
index 6392908e8f98..ff0cc84e7bcc 100644
--- a/arch/ia64/include/asm/thread_info.h
+++ b/arch/ia64/include/asm/thread_info.h
@@ -91,7 +91,7 @@ struct thread_info {
91 KERNEL_STACK_SIZE_ORDER); \ 91 KERNEL_STACK_SIZE_ORDER); \
92 struct task_struct *ret = page ? page_address(page) : NULL; \ 92 struct task_struct *ret = page ? page_address(page) : NULL; \
93 \ 93 \
94 ret; 94 ret; \
95}) 95})
96#define free_task_struct(tsk) free_pages((unsigned long) (tsk), KERNEL_STACK_SIZE_ORDER) 96#define free_task_struct(tsk) free_pages((unsigned long) (tsk), KERNEL_STACK_SIZE_ORDER)
97 97
diff --git a/arch/ia64/include/asm/unistd.h b/arch/ia64/include/asm/unistd.h
index 954d398a54b4..404d037c5e10 100644
--- a/arch/ia64/include/asm/unistd.h
+++ b/arch/ia64/include/asm/unistd.h
@@ -315,11 +315,15 @@
315#define __NR_fanotify_init 1323 315#define __NR_fanotify_init 1323
316#define __NR_fanotify_mark 1324 316#define __NR_fanotify_mark 1324
317#define __NR_prlimit64 1325 317#define __NR_prlimit64 1325
318#define __NR_name_to_handle_at 1326
319#define __NR_open_by_handle_at 1327
320#define __NR_clock_adjtime 1328
321#define __NR_syncfs 1329
318 322
319#ifdef __KERNEL__ 323#ifdef __KERNEL__
320 324
321 325
322#define NR_syscalls 302 /* length of syscall table */ 326#define NR_syscalls 306 /* length of syscall table */
323 327
324/* 328/*
325 * The following defines stop scripts/checksyscalls.sh from complaining about 329 * The following defines stop scripts/checksyscalls.sh from complaining about
diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c
index 90ebceb899a0..3be485a300b1 100644
--- a/arch/ia64/kernel/acpi.c
+++ b/arch/ia64/kernel/acpi.c
@@ -803,7 +803,7 @@ int acpi_isa_irq_to_gsi(unsigned isa_irq, u32 *gsi)
803 * ACPI based hotplug CPU support 803 * ACPI based hotplug CPU support
804 */ 804 */
805#ifdef CONFIG_ACPI_HOTPLUG_CPU 805#ifdef CONFIG_ACPI_HOTPLUG_CPU
806static 806static __cpuinit
807int acpi_map_cpu2node(acpi_handle handle, int cpu, int physid) 807int acpi_map_cpu2node(acpi_handle handle, int cpu, int physid)
808{ 808{
809#ifdef CONFIG_ACPI_NUMA 809#ifdef CONFIG_ACPI_NUMA
@@ -878,7 +878,7 @@ __init void prefill_possible_map(void)
878 set_cpu_possible(i, true); 878 set_cpu_possible(i, true);
879} 879}
880 880
881int acpi_map_lsapic(acpi_handle handle, int *pcpu) 881static int __cpuinit _acpi_map_lsapic(acpi_handle handle, int *pcpu)
882{ 882{
883 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 883 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
884 union acpi_object *obj; 884 union acpi_object *obj;
@@ -929,6 +929,11 @@ int acpi_map_lsapic(acpi_handle handle, int *pcpu)
929 return (0); 929 return (0);
930} 930}
931 931
932/* wrapper to silence section mismatch warning */
933int __ref acpi_map_lsapic(acpi_handle handle, int *pcpu)
934{
935 return _acpi_map_lsapic(handle, pcpu);
936}
932EXPORT_SYMBOL(acpi_map_lsapic); 937EXPORT_SYMBOL(acpi_map_lsapic);
933 938
934int acpi_unmap_lsapic(int cpu) 939int acpi_unmap_lsapic(int cpu)
@@ -1034,18 +1039,8 @@ int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base)
1034EXPORT_SYMBOL(acpi_unregister_ioapic); 1039EXPORT_SYMBOL(acpi_unregister_ioapic);
1035 1040
1036/* 1041/*
1037 * acpi_save_state_mem() - save kernel state 1042 * acpi_suspend_lowlevel() - save kernel state and suspend.
1038 * 1043 *
1039 * TBD when when IA64 starts to support suspend... 1044 * TBD when when IA64 starts to support suspend...
1040 */ 1045 */
1041int acpi_save_state_mem(void) { return 0; } 1046int acpi_suspend_lowlevel(void) { return 0; }
1042
1043/*
1044 * acpi_restore_state()
1045 */
1046void acpi_restore_state_mem(void) {}
1047
1048/*
1049 * do_suspend_lowlevel()
1050 */
1051void do_suspend_lowlevel(void) {}
diff --git a/arch/ia64/kernel/crash_dump.c b/arch/ia64/kernel/crash_dump.c
index 23e91290e41f..c8c9298666fb 100644
--- a/arch/ia64/kernel/crash_dump.c
+++ b/arch/ia64/kernel/crash_dump.c
@@ -13,9 +13,6 @@
13#include <asm/page.h> 13#include <asm/page.h>
14#include <asm/uaccess.h> 14#include <asm/uaccess.h>
15 15
16/* Stores the physical address of elf header of crash image. */
17unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX;
18
19/** 16/**
20 * copy_oldmem_page - copy one page from "oldmem" 17 * copy_oldmem_page - copy one page from "oldmem"
21 * @pfn: page frame number to be copied 18 * @pfn: page frame number to be copied
diff --git a/arch/ia64/kernel/efi.c b/arch/ia64/kernel/efi.c
index a0f001928502..6fc03aff046c 100644
--- a/arch/ia64/kernel/efi.c
+++ b/arch/ia64/kernel/efi.c
@@ -23,6 +23,7 @@
23 */ 23 */
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/bootmem.h> 25#include <linux/bootmem.h>
26#include <linux/crash_dump.h>
26#include <linux/kernel.h> 27#include <linux/kernel.h>
27#include <linux/init.h> 28#include <linux/init.h>
28#include <linux/types.h> 29#include <linux/types.h>
diff --git a/arch/ia64/kernel/entry.S b/arch/ia64/kernel/entry.S
index 244704a174de..6de2e23b3636 100644
--- a/arch/ia64/kernel/entry.S
+++ b/arch/ia64/kernel/entry.S
@@ -1771,6 +1771,10 @@ sys_call_table:
1771 data8 sys_fanotify_init 1771 data8 sys_fanotify_init
1772 data8 sys_fanotify_mark 1772 data8 sys_fanotify_mark
1773 data8 sys_prlimit64 // 1325 1773 data8 sys_prlimit64 // 1325
1774 data8 sys_name_to_handle_at
1775 data8 sys_open_by_handle_at
1776 data8 sys_clock_adjtime
1777 data8 sys_syncfs
1774 1778
1775 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls 1779 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls
1776#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */ 1780#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index 911cf9749700..5e2c72498c51 100644
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -479,25 +479,7 @@ static __init int setup_nomca(char *s)
479} 479}
480early_param("nomca", setup_nomca); 480early_param("nomca", setup_nomca);
481 481
482/*
483 * Note: elfcorehdr_addr is not just limited to vmcore. It is also used by
484 * is_kdump_kernel() to determine if we are booting after a panic. Hence
485 * ifdef it under CONFIG_CRASH_DUMP and not CONFIG_PROC_VMCORE.
486 */
487#ifdef CONFIG_CRASH_DUMP 482#ifdef CONFIG_CRASH_DUMP
488/* elfcorehdr= specifies the location of elf core header
489 * stored by the crashed kernel.
490 */
491static int __init parse_elfcorehdr(char *arg)
492{
493 if (!arg)
494 return -EINVAL;
495
496 elfcorehdr_addr = memparse(arg, &arg);
497 return 0;
498}
499early_param("elfcorehdr", parse_elfcorehdr);
500
501int __init reserve_elfcorehdr(u64 *start, u64 *end) 483int __init reserve_elfcorehdr(u64 *start, u64 *end)
502{ 484{
503 u64 length; 485 u64 length;
diff --git a/arch/ia64/mm/contig.c b/arch/ia64/mm/contig.c
index 54bf54059811..9a018cde5d84 100644
--- a/arch/ia64/mm/contig.c
+++ b/arch/ia64/mm/contig.c
@@ -36,7 +36,7 @@ static unsigned long max_gap;
36 * Shows a simple page count of reserved and used pages in the system. 36 * Shows a simple page count of reserved and used pages in the system.
37 * For discontig machines, it does this on a per-pgdat basis. 37 * For discontig machines, it does this on a per-pgdat basis.
38 */ 38 */
39void show_mem(void) 39void show_mem(unsigned int filter)
40{ 40{
41 int i, total_reserved = 0; 41 int i, total_reserved = 0;
42 int total_shared = 0, total_cached = 0; 42 int total_shared = 0, total_cached = 0;
diff --git a/arch/ia64/mm/discontig.c b/arch/ia64/mm/discontig.c
index 61620323bb60..82ab1bc6afb1 100644
--- a/arch/ia64/mm/discontig.c
+++ b/arch/ia64/mm/discontig.c
@@ -614,7 +614,7 @@ void __cpuinit *per_cpu_init(void)
614 * Shows a simple page count of reserved and used pages in the system. 614 * Shows a simple page count of reserved and used pages in the system.
615 * For discontig machines, it does this on a per-pgdat basis. 615 * For discontig machines, it does this on a per-pgdat basis.
616 */ 616 */
617void show_mem(void) 617void show_mem(unsigned int filter)
618{ 618{
619 int i, total_reserved = 0; 619 int i, total_reserved = 0;
620 int total_shared = 0, total_cached = 0; 620 int total_shared = 0, total_cached = 0;
diff --git a/arch/m32r/Kconfig b/arch/m32r/Kconfig
index ef4c1e442be3..b28d0908a402 100644
--- a/arch/m32r/Kconfig
+++ b/arch/m32r/Kconfig
@@ -10,6 +10,7 @@ config M32R
10 select HAVE_GENERIC_HARDIRQS 10 select HAVE_GENERIC_HARDIRQS
11 select GENERIC_HARDIRQS_NO_DEPRECATED 11 select GENERIC_HARDIRQS_NO_DEPRECATED
12 select GENERIC_IRQ_PROBE 12 select GENERIC_IRQ_PROBE
13 select GENERIC_IRQ_SHOW
13 14
14config SBUS 15config SBUS
15 bool 16 bool
@@ -260,6 +261,10 @@ config GENERIC_FIND_NEXT_BIT
260 bool 261 bool
261 default y 262 default y
262 263
264config GENERIC_FIND_BIT_LE
265 bool
266 default y
267
263config GENERIC_HWEIGHT 268config GENERIC_HWEIGHT
264 bool 269 bool
265 default y 270 default y
diff --git a/arch/m32r/include/asm/bitops.h b/arch/m32r/include/asm/bitops.h
index aaddf0d57603..6300f22cdbdb 100644
--- a/arch/m32r/include/asm/bitops.h
+++ b/arch/m32r/include/asm/bitops.h
@@ -266,9 +266,8 @@ static __inline__ int test_and_change_bit(int nr, volatile void * addr)
266 266
267#ifdef __KERNEL__ 267#ifdef __KERNEL__
268 268
269#include <asm-generic/bitops/ext2-non-atomic.h> 269#include <asm-generic/bitops/le.h>
270#include <asm-generic/bitops/ext2-atomic.h> 270#include <asm-generic/bitops/ext2-atomic.h>
271#include <asm-generic/bitops/minix.h>
272 271
273#endif /* __KERNEL__ */ 272#endif /* __KERNEL__ */
274 273
diff --git a/arch/m32r/include/asm/types.h b/arch/m32r/include/asm/types.h
index fd84b4898e30..bd0035597b3b 100644
--- a/arch/m32r/include/asm/types.h
+++ b/arch/m32r/include/asm/types.h
@@ -16,12 +16,6 @@ typedef unsigned short umode_t;
16 16
17#define BITS_PER_LONG 32 17#define BITS_PER_LONG 32
18 18
19#ifndef __ASSEMBLY__
20
21typedef u64 dma64_addr_t;
22
23#endif /* __ASSEMBLY__ */
24
25#endif /* __KERNEL__ */ 19#endif /* __KERNEL__ */
26 20
27#endif /* _ASM_M32R_TYPES_H */ 21#endif /* _ASM_M32R_TYPES_H */
diff --git a/arch/m32r/kernel/irq.c b/arch/m32r/kernel/irq.c
index 76eaf3883fbd..c7272b894283 100644
--- a/arch/m32r/kernel/irq.c
+++ b/arch/m32r/kernel/irq.c
@@ -18,55 +18,10 @@
18 18
19#include <linux/kernel_stat.h> 19#include <linux/kernel_stat.h>
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/seq_file.h>
22#include <linux/module.h> 21#include <linux/module.h>
23#include <asm/uaccess.h> 22#include <asm/uaccess.h>
24 23
25/* 24/*
26 * Generic, controller-independent functions:
27 */
28
29int show_interrupts(struct seq_file *p, void *v)
30{
31 int i = *(loff_t *) v, j;
32 struct irqaction * action;
33 unsigned long flags;
34
35 if (i == 0) {
36 seq_printf(p, " ");
37 for_each_online_cpu(j)
38 seq_printf(p, "CPU%d ",j);
39 seq_putc(p, '\n');
40 }
41
42 if (i < NR_IRQS) {
43 struct irq_desc *desc = irq_to_desc(i);
44
45 raw_spin_lock_irqsave(&desc->lock, flags);
46 action = desc->action;
47 if (!action)
48 goto skip;
49 seq_printf(p, "%3d: ",i);
50#ifndef CONFIG_SMP
51 seq_printf(p, "%10u ", kstat_irqs(i));
52#else
53 for_each_online_cpu(j)
54 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
55#endif
56 seq_printf(p, " %14s", desc->irq_data.chip->name);
57 seq_printf(p, " %s", action->name);
58
59 for (action=action->next; action; action = action->next)
60 seq_printf(p, ", %s", action->name);
61
62 seq_putc(p, '\n');
63skip:
64 raw_spin_unlock_irqrestore(&desc->lock, flags);
65 }
66 return 0;
67}
68
69/*
70 * do_IRQ handles all normal device IRQs (the special 25 * do_IRQ handles all normal device IRQs (the special
71 * SMP cross-CPU interrupts have their own specific 26 * SMP cross-CPU interrupts have their own specific
72 * handlers). 27 * handlers).
diff --git a/arch/m32r/platforms/m32104ut/setup.c b/arch/m32r/platforms/m32104ut/setup.c
index 4a693d02c1e1..34671d32cefc 100644
--- a/arch/m32r/platforms/m32104ut/setup.c
+++ b/arch/m32r/platforms/m32104ut/setup.c
@@ -76,7 +76,7 @@ void __init init_IRQ(void)
76 76
77#if defined(CONFIG_SMC91X) 77#if defined(CONFIG_SMC91X)
78 /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/ 78 /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/
79 set_irq_chip_and_handler(M32R_IRQ_INT0, &m32104ut_irq_type, 79 irq_set_chip_and_handler(M32R_IRQ_INT0, &m32104ut_irq_type,
80 handle_level_irq); 80 handle_level_irq);
81 /* "H" level sense */ 81 /* "H" level sense */
82 cu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; 82 cu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11;
@@ -84,20 +84,20 @@ void __init init_IRQ(void)
84#endif /* CONFIG_SMC91X */ 84#endif /* CONFIG_SMC91X */
85 85
86 /* MFT2 : system timer */ 86 /* MFT2 : system timer */
87 set_irq_chip_and_handler(M32R_IRQ_MFT2, &m32104ut_irq_type, 87 irq_set_chip_and_handler(M32R_IRQ_MFT2, &m32104ut_irq_type,
88 handle_level_irq); 88 handle_level_irq);
89 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 89 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
90 disable_m32104ut_irq(M32R_IRQ_MFT2); 90 disable_m32104ut_irq(M32R_IRQ_MFT2);
91 91
92#ifdef CONFIG_SERIAL_M32R_SIO 92#ifdef CONFIG_SERIAL_M32R_SIO
93 /* SIO0_R : uart receive data */ 93 /* SIO0_R : uart receive data */
94 set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &m32104ut_irq_type, 94 irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &m32104ut_irq_type,
95 handle_level_irq); 95 handle_level_irq);
96 icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN; 96 icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN;
97 disable_m32104ut_irq(M32R_IRQ_SIO0_R); 97 disable_m32104ut_irq(M32R_IRQ_SIO0_R);
98 98
99 /* SIO0_S : uart send data */ 99 /* SIO0_S : uart send data */
100 set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &m32104ut_irq_type, 100 irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &m32104ut_irq_type,
101 handle_level_irq); 101 handle_level_irq);
102 icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN; 102 icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN;
103 disable_m32104ut_irq(M32R_IRQ_SIO0_S); 103 disable_m32104ut_irq(M32R_IRQ_SIO0_S);
diff --git a/arch/m32r/platforms/m32700ut/setup.c b/arch/m32r/platforms/m32700ut/setup.c
index 2074bcc841eb..1053e1cb7401 100644
--- a/arch/m32r/platforms/m32700ut/setup.c
+++ b/arch/m32r/platforms/m32700ut/setup.c
@@ -259,76 +259,76 @@ void __init init_IRQ(void)
259{ 259{
260#if defined(CONFIG_SMC91X) 260#if defined(CONFIG_SMC91X)
261 /* INT#0: LAN controller on M32700UT-LAN (SMC91C111)*/ 261 /* INT#0: LAN controller on M32700UT-LAN (SMC91C111)*/
262 set_irq_chip_and_handler(M32700UT_LAN_IRQ_LAN, 262 irq_set_chip_and_handler(M32700UT_LAN_IRQ_LAN,
263 &m32700ut_lanpld_irq_type, handle_level_irq); 263 &m32700ut_lanpld_irq_type, handle_level_irq);
264 lanpld_icu_data[irq2lanpldirq(M32700UT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */ 264 lanpld_icu_data[irq2lanpldirq(M32700UT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */
265 disable_m32700ut_lanpld_irq(M32700UT_LAN_IRQ_LAN); 265 disable_m32700ut_lanpld_irq(M32700UT_LAN_IRQ_LAN);
266#endif /* CONFIG_SMC91X */ 266#endif /* CONFIG_SMC91X */
267 267
268 /* MFT2 : system timer */ 268 /* MFT2 : system timer */
269 set_irq_chip_and_handler(M32R_IRQ_MFT2, &m32700ut_irq_type, 269 irq_set_chip_and_handler(M32R_IRQ_MFT2, &m32700ut_irq_type,
270 handle_level_irq); 270 handle_level_irq);
271 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 271 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
272 disable_m32700ut_irq(M32R_IRQ_MFT2); 272 disable_m32700ut_irq(M32R_IRQ_MFT2);
273 273
274 /* SIO0 : receive */ 274 /* SIO0 : receive */
275 set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &m32700ut_irq_type, 275 irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &m32700ut_irq_type,
276 handle_level_irq); 276 handle_level_irq);
277 icu_data[M32R_IRQ_SIO0_R].icucr = 0; 277 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
278 disable_m32700ut_irq(M32R_IRQ_SIO0_R); 278 disable_m32700ut_irq(M32R_IRQ_SIO0_R);
279 279
280 /* SIO0 : send */ 280 /* SIO0 : send */
281 set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &m32700ut_irq_type, 281 irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &m32700ut_irq_type,
282 handle_level_irq); 282 handle_level_irq);
283 icu_data[M32R_IRQ_SIO0_S].icucr = 0; 283 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
284 disable_m32700ut_irq(M32R_IRQ_SIO0_S); 284 disable_m32700ut_irq(M32R_IRQ_SIO0_S);
285 285
286 /* SIO1 : receive */ 286 /* SIO1 : receive */
287 set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &m32700ut_irq_type, 287 irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &m32700ut_irq_type,
288 handle_level_irq); 288 handle_level_irq);
289 icu_data[M32R_IRQ_SIO1_R].icucr = 0; 289 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
290 disable_m32700ut_irq(M32R_IRQ_SIO1_R); 290 disable_m32700ut_irq(M32R_IRQ_SIO1_R);
291 291
292 /* SIO1 : send */ 292 /* SIO1 : send */
293 set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &m32700ut_irq_type, 293 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &m32700ut_irq_type,
294 handle_level_irq); 294 handle_level_irq);
295 icu_data[M32R_IRQ_SIO1_S].icucr = 0; 295 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
296 disable_m32700ut_irq(M32R_IRQ_SIO1_S); 296 disable_m32700ut_irq(M32R_IRQ_SIO1_S);
297 297
298 /* DMA1 : */ 298 /* DMA1 : */
299 set_irq_chip_and_handler(M32R_IRQ_DMA1, &m32700ut_irq_type, 299 irq_set_chip_and_handler(M32R_IRQ_DMA1, &m32700ut_irq_type,
300 handle_level_irq); 300 handle_level_irq);
301 icu_data[M32R_IRQ_DMA1].icucr = 0; 301 icu_data[M32R_IRQ_DMA1].icucr = 0;
302 disable_m32700ut_irq(M32R_IRQ_DMA1); 302 disable_m32700ut_irq(M32R_IRQ_DMA1);
303 303
304#ifdef CONFIG_SERIAL_M32R_PLDSIO 304#ifdef CONFIG_SERIAL_M32R_PLDSIO
305 /* INT#1: SIO0 Receive on PLD */ 305 /* INT#1: SIO0 Receive on PLD */
306 set_irq_chip_and_handler(PLD_IRQ_SIO0_RCV, &m32700ut_pld_irq_type, 306 irq_set_chip_and_handler(PLD_IRQ_SIO0_RCV, &m32700ut_pld_irq_type,
307 handle_level_irq); 307 handle_level_irq);
308 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; 308 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
309 disable_m32700ut_pld_irq(PLD_IRQ_SIO0_RCV); 309 disable_m32700ut_pld_irq(PLD_IRQ_SIO0_RCV);
310 310
311 /* INT#1: SIO0 Send on PLD */ 311 /* INT#1: SIO0 Send on PLD */
312 set_irq_chip_and_handler(PLD_IRQ_SIO0_SND, &m32700ut_pld_irq_type, 312 irq_set_chip_and_handler(PLD_IRQ_SIO0_SND, &m32700ut_pld_irq_type,
313 handle_level_irq); 313 handle_level_irq);
314 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; 314 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
315 disable_m32700ut_pld_irq(PLD_IRQ_SIO0_SND); 315 disable_m32700ut_pld_irq(PLD_IRQ_SIO0_SND);
316#endif /* CONFIG_SERIAL_M32R_PLDSIO */ 316#endif /* CONFIG_SERIAL_M32R_PLDSIO */
317 317
318 /* INT#1: CFC IREQ on PLD */ 318 /* INT#1: CFC IREQ on PLD */
319 set_irq_chip_and_handler(PLD_IRQ_CFIREQ, &m32700ut_pld_irq_type, 319 irq_set_chip_and_handler(PLD_IRQ_CFIREQ, &m32700ut_pld_irq_type,
320 handle_level_irq); 320 handle_level_irq);
321 pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */ 321 pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */
322 disable_m32700ut_pld_irq(PLD_IRQ_CFIREQ); 322 disable_m32700ut_pld_irq(PLD_IRQ_CFIREQ);
323 323
324 /* INT#1: CFC Insert on PLD */ 324 /* INT#1: CFC Insert on PLD */
325 set_irq_chip_and_handler(PLD_IRQ_CFC_INSERT, &m32700ut_pld_irq_type, 325 irq_set_chip_and_handler(PLD_IRQ_CFC_INSERT, &m32700ut_pld_irq_type,
326 handle_level_irq); 326 handle_level_irq);
327 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */ 327 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */
328 disable_m32700ut_pld_irq(PLD_IRQ_CFC_INSERT); 328 disable_m32700ut_pld_irq(PLD_IRQ_CFC_INSERT);
329 329
330 /* INT#1: CFC Eject on PLD */ 330 /* INT#1: CFC Eject on PLD */
331 set_irq_chip_and_handler(PLD_IRQ_CFC_EJECT, &m32700ut_pld_irq_type, 331 irq_set_chip_and_handler(PLD_IRQ_CFC_EJECT, &m32700ut_pld_irq_type,
332 handle_level_irq); 332 handle_level_irq);
333 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */ 333 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */
334 disable_m32700ut_pld_irq(PLD_IRQ_CFC_EJECT); 334 disable_m32700ut_pld_irq(PLD_IRQ_CFC_EJECT);
@@ -349,7 +349,7 @@ void __init init_IRQ(void)
349 349
350#if defined(CONFIG_USB) 350#if defined(CONFIG_USB)
351 outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */ 351 outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */
352 set_irq_chip_and_handler(M32700UT_LCD_IRQ_USB_INT1, 352 irq_set_chip_and_handler(M32700UT_LCD_IRQ_USB_INT1,
353 &m32700ut_lcdpld_irq_type, handle_level_irq); 353 &m32700ut_lcdpld_irq_type, handle_level_irq);
354 354
355 lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */ 355 lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */
@@ -366,7 +366,7 @@ void __init init_IRQ(void)
366 /* 366 /*
367 * INT3# is used for AR 367 * INT3# is used for AR
368 */ 368 */
369 set_irq_chip_and_handler(M32R_IRQ_INT3, &m32700ut_irq_type, 369 irq_set_chip_and_handler(M32R_IRQ_INT3, &m32700ut_irq_type,
370 handle_level_irq); 370 handle_level_irq);
371 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; 371 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
372 disable_m32700ut_irq(M32R_IRQ_INT3); 372 disable_m32700ut_irq(M32R_IRQ_INT3);
diff --git a/arch/m32r/platforms/mappi/setup.c b/arch/m32r/platforms/mappi/setup.c
index cdd8c4574027..35130ac3f8d1 100644
--- a/arch/m32r/platforms/mappi/setup.c
+++ b/arch/m32r/platforms/mappi/setup.c
@@ -75,39 +75,39 @@ void __init init_IRQ(void)
75 75
76#ifdef CONFIG_NE2000 76#ifdef CONFIG_NE2000
77 /* INT0 : LAN controller (RTL8019AS) */ 77 /* INT0 : LAN controller (RTL8019AS) */
78 set_irq_chip_and_handler(M32R_IRQ_INT0, &mappi_irq_type, 78 irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi_irq_type,
79 handle_level_irq); 79 handle_level_irq);
80 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11; 80 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
81 disable_mappi_irq(M32R_IRQ_INT0); 81 disable_mappi_irq(M32R_IRQ_INT0);
82#endif /* CONFIG_M32R_NE2000 */ 82#endif /* CONFIG_M32R_NE2000 */
83 83
84 /* MFT2 : system timer */ 84 /* MFT2 : system timer */
85 set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type, 85 irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type,
86 handle_level_irq); 86 handle_level_irq);
87 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 87 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
88 disable_mappi_irq(M32R_IRQ_MFT2); 88 disable_mappi_irq(M32R_IRQ_MFT2);
89 89
90#ifdef CONFIG_SERIAL_M32R_SIO 90#ifdef CONFIG_SERIAL_M32R_SIO
91 /* SIO0_R : uart receive data */ 91 /* SIO0_R : uart receive data */
92 set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type, 92 irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type,
93 handle_level_irq); 93 handle_level_irq);
94 icu_data[M32R_IRQ_SIO0_R].icucr = 0; 94 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
95 disable_mappi_irq(M32R_IRQ_SIO0_R); 95 disable_mappi_irq(M32R_IRQ_SIO0_R);
96 96
97 /* SIO0_S : uart send data */ 97 /* SIO0_S : uart send data */
98 set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type, 98 irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type,
99 handle_level_irq); 99 handle_level_irq);
100 icu_data[M32R_IRQ_SIO0_S].icucr = 0; 100 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
101 disable_mappi_irq(M32R_IRQ_SIO0_S); 101 disable_mappi_irq(M32R_IRQ_SIO0_S);
102 102
103 /* SIO1_R : uart receive data */ 103 /* SIO1_R : uart receive data */
104 set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type, 104 irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type,
105 handle_level_irq); 105 handle_level_irq);
106 icu_data[M32R_IRQ_SIO1_R].icucr = 0; 106 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
107 disable_mappi_irq(M32R_IRQ_SIO1_R); 107 disable_mappi_irq(M32R_IRQ_SIO1_R);
108 108
109 /* SIO1_S : uart send data */ 109 /* SIO1_S : uart send data */
110 set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type, 110 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type,
111 handle_level_irq); 111 handle_level_irq);
112 icu_data[M32R_IRQ_SIO1_S].icucr = 0; 112 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
113 disable_mappi_irq(M32R_IRQ_SIO1_S); 113 disable_mappi_irq(M32R_IRQ_SIO1_S);
@@ -115,13 +115,13 @@ void __init init_IRQ(void)
115 115
116#if defined(CONFIG_M32R_PCC) 116#if defined(CONFIG_M32R_PCC)
117 /* INT1 : pccard0 interrupt */ 117 /* INT1 : pccard0 interrupt */
118 set_irq_chip_and_handler(M32R_IRQ_INT1, &mappi_irq_type, 118 irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi_irq_type,
119 handle_level_irq); 119 handle_level_irq);
120 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; 120 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
121 disable_mappi_irq(M32R_IRQ_INT1); 121 disable_mappi_irq(M32R_IRQ_INT1);
122 122
123 /* INT2 : pccard1 interrupt */ 123 /* INT2 : pccard1 interrupt */
124 set_irq_chip_and_handler(M32R_IRQ_INT2, &mappi_irq_type, 124 irq_set_chip_and_handler(M32R_IRQ_INT2, &mappi_irq_type,
125 handle_level_irq); 125 handle_level_irq);
126 icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; 126 icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
127 disable_mappi_irq(M32R_IRQ_INT2); 127 disable_mappi_irq(M32R_IRQ_INT2);
diff --git a/arch/m32r/platforms/mappi2/setup.c b/arch/m32r/platforms/mappi2/setup.c
index 9117c30ea365..f3ed6b60a5f8 100644
--- a/arch/m32r/platforms/mappi2/setup.c
+++ b/arch/m32r/platforms/mappi2/setup.c
@@ -76,38 +76,38 @@ void __init init_IRQ(void)
76{ 76{
77#if defined(CONFIG_SMC91X) 77#if defined(CONFIG_SMC91X)
78 /* INT0 : LAN controller (SMC91111) */ 78 /* INT0 : LAN controller (SMC91111) */
79 set_irq_chip_and_handler(M32R_IRQ_INT0, &mappi2_irq_type, 79 irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi2_irq_type,
80 handle_level_irq); 80 handle_level_irq);
81 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; 81 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
82 disable_mappi2_irq(M32R_IRQ_INT0); 82 disable_mappi2_irq(M32R_IRQ_INT0);
83#endif /* CONFIG_SMC91X */ 83#endif /* CONFIG_SMC91X */
84 84
85 /* MFT2 : system timer */ 85 /* MFT2 : system timer */
86 set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi2_irq_type, 86 irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi2_irq_type,
87 handle_level_irq); 87 handle_level_irq);
88 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 88 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
89 disable_mappi2_irq(M32R_IRQ_MFT2); 89 disable_mappi2_irq(M32R_IRQ_MFT2);
90 90
91#ifdef CONFIG_SERIAL_M32R_SIO 91#ifdef CONFIG_SERIAL_M32R_SIO
92 /* SIO0_R : uart receive data */ 92 /* SIO0_R : uart receive data */
93 set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi2_irq_type, 93 irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi2_irq_type,
94 handle_level_irq); 94 handle_level_irq);
95 icu_data[M32R_IRQ_SIO0_R].icucr = 0; 95 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
96 disable_mappi2_irq(M32R_IRQ_SIO0_R); 96 disable_mappi2_irq(M32R_IRQ_SIO0_R);
97 97
98 /* SIO0_S : uart send data */ 98 /* SIO0_S : uart send data */
99 set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi2_irq_type, 99 irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi2_irq_type,
100 handle_level_irq); 100 handle_level_irq);
101 icu_data[M32R_IRQ_SIO0_S].icucr = 0; 101 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
102 disable_mappi2_irq(M32R_IRQ_SIO0_S); 102 disable_mappi2_irq(M32R_IRQ_SIO0_S);
103 /* SIO1_R : uart receive data */ 103 /* SIO1_R : uart receive data */
104 set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi2_irq_type, 104 irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi2_irq_type,
105 handle_level_irq); 105 handle_level_irq);
106 icu_data[M32R_IRQ_SIO1_R].icucr = 0; 106 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
107 disable_mappi2_irq(M32R_IRQ_SIO1_R); 107 disable_mappi2_irq(M32R_IRQ_SIO1_R);
108 108
109 /* SIO1_S : uart send data */ 109 /* SIO1_S : uart send data */
110 set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi2_irq_type, 110 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi2_irq_type,
111 handle_level_irq); 111 handle_level_irq);
112 icu_data[M32R_IRQ_SIO1_S].icucr = 0; 112 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
113 disable_mappi2_irq(M32R_IRQ_SIO1_S); 113 disable_mappi2_irq(M32R_IRQ_SIO1_S);
@@ -115,27 +115,27 @@ void __init init_IRQ(void)
115 115
116#if defined(CONFIG_USB) 116#if defined(CONFIG_USB)
117 /* INT1 : USB Host controller interrupt */ 117 /* INT1 : USB Host controller interrupt */
118 set_irq_chip_and_handler(M32R_IRQ_INT1, &mappi2_irq_type, 118 irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi2_irq_type,
119 handle_level_irq); 119 handle_level_irq);
120 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01; 120 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
121 disable_mappi2_irq(M32R_IRQ_INT1); 121 disable_mappi2_irq(M32R_IRQ_INT1);
122#endif /* CONFIG_USB */ 122#endif /* CONFIG_USB */
123 123
124 /* ICUCR40: CFC IREQ */ 124 /* ICUCR40: CFC IREQ */
125 set_irq_chip_and_handler(PLD_IRQ_CFIREQ, &mappi2_irq_type, 125 irq_set_chip_and_handler(PLD_IRQ_CFIREQ, &mappi2_irq_type,
126 handle_level_irq); 126 handle_level_irq);
127 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01; 127 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
128 disable_mappi2_irq(PLD_IRQ_CFIREQ); 128 disable_mappi2_irq(PLD_IRQ_CFIREQ);
129 129
130#if defined(CONFIG_M32R_CFC) 130#if defined(CONFIG_M32R_CFC)
131 /* ICUCR41: CFC Insert */ 131 /* ICUCR41: CFC Insert */
132 set_irq_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi2_irq_type, 132 irq_set_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi2_irq_type,
133 handle_level_irq); 133 handle_level_irq);
134 icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00; 134 icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
135 disable_mappi2_irq(PLD_IRQ_CFC_INSERT); 135 disable_mappi2_irq(PLD_IRQ_CFC_INSERT);
136 136
137 /* ICUCR42: CFC Eject */ 137 /* ICUCR42: CFC Eject */
138 set_irq_chip_and_handler(PLD_IRQ_CFC_EJECT, &mappi2_irq_type, 138 irq_set_chip_and_handler(PLD_IRQ_CFC_EJECT, &mappi2_irq_type,
139 handle_level_irq); 139 handle_level_irq);
140 icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; 140 icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
141 disable_mappi2_irq(PLD_IRQ_CFC_EJECT); 141 disable_mappi2_irq(PLD_IRQ_CFC_EJECT);
diff --git a/arch/m32r/platforms/mappi3/setup.c b/arch/m32r/platforms/mappi3/setup.c
index b44f5ded2bbe..2408e356ad10 100644
--- a/arch/m32r/platforms/mappi3/setup.c
+++ b/arch/m32r/platforms/mappi3/setup.c
@@ -75,38 +75,38 @@ void __init init_IRQ(void)
75{ 75{
76#if defined(CONFIG_SMC91X) 76#if defined(CONFIG_SMC91X)
77 /* INT0 : LAN controller (SMC91111) */ 77 /* INT0 : LAN controller (SMC91111) */
78 set_irq_chip_and_handler(M32R_IRQ_INT0, &mappi3_irq_type, 78 irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi3_irq_type,
79 handle_level_irq); 79 handle_level_irq);
80 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; 80 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
81 disable_mappi3_irq(M32R_IRQ_INT0); 81 disable_mappi3_irq(M32R_IRQ_INT0);
82#endif /* CONFIG_SMC91X */ 82#endif /* CONFIG_SMC91X */
83 83
84 /* MFT2 : system timer */ 84 /* MFT2 : system timer */
85 set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi3_irq_type, 85 irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi3_irq_type,
86 handle_level_irq); 86 handle_level_irq);
87 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 87 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
88 disable_mappi3_irq(M32R_IRQ_MFT2); 88 disable_mappi3_irq(M32R_IRQ_MFT2);
89 89
90#ifdef CONFIG_SERIAL_M32R_SIO 90#ifdef CONFIG_SERIAL_M32R_SIO
91 /* SIO0_R : uart receive data */ 91 /* SIO0_R : uart receive data */
92 set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi3_irq_type, 92 irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi3_irq_type,
93 handle_level_irq); 93 handle_level_irq);
94 icu_data[M32R_IRQ_SIO0_R].icucr = 0; 94 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
95 disable_mappi3_irq(M32R_IRQ_SIO0_R); 95 disable_mappi3_irq(M32R_IRQ_SIO0_R);
96 96
97 /* SIO0_S : uart send data */ 97 /* SIO0_S : uart send data */
98 set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi3_irq_type, 98 irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi3_irq_type,
99 handle_level_irq); 99 handle_level_irq);
100 icu_data[M32R_IRQ_SIO0_S].icucr = 0; 100 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
101 disable_mappi3_irq(M32R_IRQ_SIO0_S); 101 disable_mappi3_irq(M32R_IRQ_SIO0_S);
102 /* SIO1_R : uart receive data */ 102 /* SIO1_R : uart receive data */
103 set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi3_irq_type, 103 irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi3_irq_type,
104 handle_level_irq); 104 handle_level_irq);
105 icu_data[M32R_IRQ_SIO1_R].icucr = 0; 105 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
106 disable_mappi3_irq(M32R_IRQ_SIO1_R); 106 disable_mappi3_irq(M32R_IRQ_SIO1_R);
107 107
108 /* SIO1_S : uart send data */ 108 /* SIO1_S : uart send data */
109 set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi3_irq_type, 109 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi3_irq_type,
110 handle_level_irq); 110 handle_level_irq);
111 icu_data[M32R_IRQ_SIO1_S].icucr = 0; 111 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
112 disable_mappi3_irq(M32R_IRQ_SIO1_S); 112 disable_mappi3_irq(M32R_IRQ_SIO1_S);
@@ -114,21 +114,21 @@ void __init init_IRQ(void)
114 114
115#if defined(CONFIG_USB) 115#if defined(CONFIG_USB)
116 /* INT1 : USB Host controller interrupt */ 116 /* INT1 : USB Host controller interrupt */
117 set_irq_chip_and_handler(M32R_IRQ_INT1, &mappi3_irq_type, 117 irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi3_irq_type,
118 handle_level_irq); 118 handle_level_irq);
119 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01; 119 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
120 disable_mappi3_irq(M32R_IRQ_INT1); 120 disable_mappi3_irq(M32R_IRQ_INT1);
121#endif /* CONFIG_USB */ 121#endif /* CONFIG_USB */
122 122
123 /* CFC IREQ */ 123 /* CFC IREQ */
124 set_irq_chip_and_handler(PLD_IRQ_CFIREQ, &mappi3_irq_type, 124 irq_set_chip_and_handler(PLD_IRQ_CFIREQ, &mappi3_irq_type,
125 handle_level_irq); 125 handle_level_irq);
126 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01; 126 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
127 disable_mappi3_irq(PLD_IRQ_CFIREQ); 127 disable_mappi3_irq(PLD_IRQ_CFIREQ);
128 128
129#if defined(CONFIG_M32R_CFC) 129#if defined(CONFIG_M32R_CFC)
130 /* ICUCR41: CFC Insert & eject */ 130 /* ICUCR41: CFC Insert & eject */
131 set_irq_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi3_irq_type, 131 irq_set_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi3_irq_type,
132 handle_level_irq); 132 handle_level_irq);
133 icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00; 133 icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
134 disable_mappi3_irq(PLD_IRQ_CFC_INSERT); 134 disable_mappi3_irq(PLD_IRQ_CFC_INSERT);
@@ -136,7 +136,7 @@ void __init init_IRQ(void)
136#endif /* CONFIG_M32R_CFC */ 136#endif /* CONFIG_M32R_CFC */
137 137
138 /* IDE IREQ */ 138 /* IDE IREQ */
139 set_irq_chip_and_handler(PLD_IRQ_IDEIREQ, &mappi3_irq_type, 139 irq_set_chip_and_handler(PLD_IRQ_IDEIREQ, &mappi3_irq_type,
140 handle_level_irq); 140 handle_level_irq);
141 icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; 141 icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
142 disable_mappi3_irq(PLD_IRQ_IDEIREQ); 142 disable_mappi3_irq(PLD_IRQ_IDEIREQ);
diff --git a/arch/m32r/platforms/oaks32r/setup.c b/arch/m32r/platforms/oaks32r/setup.c
index 19a02db7b818..83b46b067a17 100644
--- a/arch/m32r/platforms/oaks32r/setup.c
+++ b/arch/m32r/platforms/oaks32r/setup.c
@@ -74,39 +74,39 @@ void __init init_IRQ(void)
74 74
75#ifdef CONFIG_NE2000 75#ifdef CONFIG_NE2000
76 /* INT3 : LAN controller (RTL8019AS) */ 76 /* INT3 : LAN controller (RTL8019AS) */
77 set_irq_chip_and_handler(M32R_IRQ_INT3, &oaks32r_irq_type, 77 irq_set_chip_and_handler(M32R_IRQ_INT3, &oaks32r_irq_type,
78 handle_level_irq); 78 handle_level_irq);
79 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; 79 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
80 disable_oaks32r_irq(M32R_IRQ_INT3); 80 disable_oaks32r_irq(M32R_IRQ_INT3);
81#endif /* CONFIG_M32R_NE2000 */ 81#endif /* CONFIG_M32R_NE2000 */
82 82
83 /* MFT2 : system timer */ 83 /* MFT2 : system timer */
84 set_irq_chip_and_handler(M32R_IRQ_MFT2, &oaks32r_irq_type, 84 irq_set_chip_and_handler(M32R_IRQ_MFT2, &oaks32r_irq_type,
85 handle_level_irq); 85 handle_level_irq);
86 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 86 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
87 disable_oaks32r_irq(M32R_IRQ_MFT2); 87 disable_oaks32r_irq(M32R_IRQ_MFT2);
88 88
89#ifdef CONFIG_SERIAL_M32R_SIO 89#ifdef CONFIG_SERIAL_M32R_SIO
90 /* SIO0_R : uart receive data */ 90 /* SIO0_R : uart receive data */
91 set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &oaks32r_irq_type, 91 irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &oaks32r_irq_type,
92 handle_level_irq); 92 handle_level_irq);
93 icu_data[M32R_IRQ_SIO0_R].icucr = 0; 93 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
94 disable_oaks32r_irq(M32R_IRQ_SIO0_R); 94 disable_oaks32r_irq(M32R_IRQ_SIO0_R);
95 95
96 /* SIO0_S : uart send data */ 96 /* SIO0_S : uart send data */
97 set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &oaks32r_irq_type, 97 irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &oaks32r_irq_type,
98 handle_level_irq); 98 handle_level_irq);
99 icu_data[M32R_IRQ_SIO0_S].icucr = 0; 99 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
100 disable_oaks32r_irq(M32R_IRQ_SIO0_S); 100 disable_oaks32r_irq(M32R_IRQ_SIO0_S);
101 101
102 /* SIO1_R : uart receive data */ 102 /* SIO1_R : uart receive data */
103 set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &oaks32r_irq_type, 103 irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &oaks32r_irq_type,
104 handle_level_irq); 104 handle_level_irq);
105 icu_data[M32R_IRQ_SIO1_R].icucr = 0; 105 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
106 disable_oaks32r_irq(M32R_IRQ_SIO1_R); 106 disable_oaks32r_irq(M32R_IRQ_SIO1_R);
107 107
108 /* SIO1_S : uart send data */ 108 /* SIO1_S : uart send data */
109 set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &oaks32r_irq_type, 109 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &oaks32r_irq_type,
110 handle_level_irq); 110 handle_level_irq);
111 icu_data[M32R_IRQ_SIO1_S].icucr = 0; 111 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
112 disable_oaks32r_irq(M32R_IRQ_SIO1_S); 112 disable_oaks32r_irq(M32R_IRQ_SIO1_S);
diff --git a/arch/m32r/platforms/opsput/setup.c b/arch/m32r/platforms/opsput/setup.c
index 12731547e8bf..32660705f5fd 100644
--- a/arch/m32r/platforms/opsput/setup.c
+++ b/arch/m32r/platforms/opsput/setup.c
@@ -259,76 +259,76 @@ void __init init_IRQ(void)
259{ 259{
260#if defined(CONFIG_SMC91X) 260#if defined(CONFIG_SMC91X)
261 /* INT#0: LAN controller on OPSPUT-LAN (SMC91C111)*/ 261 /* INT#0: LAN controller on OPSPUT-LAN (SMC91C111)*/
262 set_irq_chip_and_handler(OPSPUT_LAN_IRQ_LAN, &opsput_lanpld_irq_type, 262 irq_set_chip_and_handler(OPSPUT_LAN_IRQ_LAN, &opsput_lanpld_irq_type,
263 handle_level_irq); 263 handle_level_irq);
264 lanpld_icu_data[irq2lanpldirq(OPSPUT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */ 264 lanpld_icu_data[irq2lanpldirq(OPSPUT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */
265 disable_opsput_lanpld_irq(OPSPUT_LAN_IRQ_LAN); 265 disable_opsput_lanpld_irq(OPSPUT_LAN_IRQ_LAN);
266#endif /* CONFIG_SMC91X */ 266#endif /* CONFIG_SMC91X */
267 267
268 /* MFT2 : system timer */ 268 /* MFT2 : system timer */
269 set_irq_chip_and_handler(M32R_IRQ_MFT2, &opsput_irq_type, 269 irq_set_chip_and_handler(M32R_IRQ_MFT2, &opsput_irq_type,
270 handle_level_irq); 270 handle_level_irq);
271 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 271 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
272 disable_opsput_irq(M32R_IRQ_MFT2); 272 disable_opsput_irq(M32R_IRQ_MFT2);
273 273
274 /* SIO0 : receive */ 274 /* SIO0 : receive */
275 set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &opsput_irq_type, 275 irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &opsput_irq_type,
276 handle_level_irq); 276 handle_level_irq);
277 icu_data[M32R_IRQ_SIO0_R].icucr = 0; 277 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
278 disable_opsput_irq(M32R_IRQ_SIO0_R); 278 disable_opsput_irq(M32R_IRQ_SIO0_R);
279 279
280 /* SIO0 : send */ 280 /* SIO0 : send */
281 set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &opsput_irq_type, 281 irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &opsput_irq_type,
282 handle_level_irq); 282 handle_level_irq);
283 icu_data[M32R_IRQ_SIO0_S].icucr = 0; 283 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
284 disable_opsput_irq(M32R_IRQ_SIO0_S); 284 disable_opsput_irq(M32R_IRQ_SIO0_S);
285 285
286 /* SIO1 : receive */ 286 /* SIO1 : receive */
287 set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &opsput_irq_type, 287 irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &opsput_irq_type,
288 handle_level_irq); 288 handle_level_irq);
289 icu_data[M32R_IRQ_SIO1_R].icucr = 0; 289 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
290 disable_opsput_irq(M32R_IRQ_SIO1_R); 290 disable_opsput_irq(M32R_IRQ_SIO1_R);
291 291
292 /* SIO1 : send */ 292 /* SIO1 : send */
293 set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &opsput_irq_type, 293 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &opsput_irq_type,
294 handle_level_irq); 294 handle_level_irq);
295 icu_data[M32R_IRQ_SIO1_S].icucr = 0; 295 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
296 disable_opsput_irq(M32R_IRQ_SIO1_S); 296 disable_opsput_irq(M32R_IRQ_SIO1_S);
297 297
298 /* DMA1 : */ 298 /* DMA1 : */
299 set_irq_chip_and_handler(M32R_IRQ_DMA1, &opsput_irq_type, 299 irq_set_chip_and_handler(M32R_IRQ_DMA1, &opsput_irq_type,
300 handle_level_irq); 300 handle_level_irq);
301 icu_data[M32R_IRQ_DMA1].icucr = 0; 301 icu_data[M32R_IRQ_DMA1].icucr = 0;
302 disable_opsput_irq(M32R_IRQ_DMA1); 302 disable_opsput_irq(M32R_IRQ_DMA1);
303 303
304#ifdef CONFIG_SERIAL_M32R_PLDSIO 304#ifdef CONFIG_SERIAL_M32R_PLDSIO
305 /* INT#1: SIO0 Receive on PLD */ 305 /* INT#1: SIO0 Receive on PLD */
306 set_irq_chip_and_handler(PLD_IRQ_SIO0_RCV, &opsput_pld_irq_type, 306 irq_set_chip_and_handler(PLD_IRQ_SIO0_RCV, &opsput_pld_irq_type,
307 handle_level_irq); 307 handle_level_irq);
308 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; 308 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
309 disable_opsput_pld_irq(PLD_IRQ_SIO0_RCV); 309 disable_opsput_pld_irq(PLD_IRQ_SIO0_RCV);
310 310
311 /* INT#1: SIO0 Send on PLD */ 311 /* INT#1: SIO0 Send on PLD */
312 set_irq_chip_and_handler(PLD_IRQ_SIO0_SND, &opsput_pld_irq_type, 312 irq_set_chip_and_handler(PLD_IRQ_SIO0_SND, &opsput_pld_irq_type,
313 handle_level_irq); 313 handle_level_irq);
314 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; 314 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
315 disable_opsput_pld_irq(PLD_IRQ_SIO0_SND); 315 disable_opsput_pld_irq(PLD_IRQ_SIO0_SND);
316#endif /* CONFIG_SERIAL_M32R_PLDSIO */ 316#endif /* CONFIG_SERIAL_M32R_PLDSIO */
317 317
318 /* INT#1: CFC IREQ on PLD */ 318 /* INT#1: CFC IREQ on PLD */
319 set_irq_chip_and_handler(PLD_IRQ_CFIREQ, &opsput_pld_irq_type, 319 irq_set_chip_and_handler(PLD_IRQ_CFIREQ, &opsput_pld_irq_type,
320 handle_level_irq); 320 handle_level_irq);
321 pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */ 321 pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */
322 disable_opsput_pld_irq(PLD_IRQ_CFIREQ); 322 disable_opsput_pld_irq(PLD_IRQ_CFIREQ);
323 323
324 /* INT#1: CFC Insert on PLD */ 324 /* INT#1: CFC Insert on PLD */
325 set_irq_chip_and_handler(PLD_IRQ_CFC_INSERT, &opsput_pld_irq_type, 325 irq_set_chip_and_handler(PLD_IRQ_CFC_INSERT, &opsput_pld_irq_type,
326 handle_level_irq); 326 handle_level_irq);
327 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */ 327 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */
328 disable_opsput_pld_irq(PLD_IRQ_CFC_INSERT); 328 disable_opsput_pld_irq(PLD_IRQ_CFC_INSERT);
329 329
330 /* INT#1: CFC Eject on PLD */ 330 /* INT#1: CFC Eject on PLD */
331 set_irq_chip_and_handler(PLD_IRQ_CFC_EJECT, &opsput_pld_irq_type, 331 irq_set_chip_and_handler(PLD_IRQ_CFC_EJECT, &opsput_pld_irq_type,
332 handle_level_irq); 332 handle_level_irq);
333 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */ 333 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */
334 disable_opsput_pld_irq(PLD_IRQ_CFC_EJECT); 334 disable_opsput_pld_irq(PLD_IRQ_CFC_EJECT);
@@ -349,7 +349,7 @@ void __init init_IRQ(void)
349 349
350#if defined(CONFIG_USB) 350#if defined(CONFIG_USB)
351 outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */ 351 outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */
352 set_irq_chip_and_handler(OPSPUT_LCD_IRQ_USB_INT1, 352 irq_set_chip_and_handler(OPSPUT_LCD_IRQ_USB_INT1,
353 &opsput_lcdpld_irq_type, handle_level_irq); 353 &opsput_lcdpld_irq_type, handle_level_irq);
354 lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */ 354 lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */
355 disable_opsput_lcdpld_irq(OPSPUT_LCD_IRQ_USB_INT1); 355 disable_opsput_lcdpld_irq(OPSPUT_LCD_IRQ_USB_INT1);
@@ -365,7 +365,7 @@ void __init init_IRQ(void)
365 /* 365 /*
366 * INT3# is used for AR 366 * INT3# is used for AR
367 */ 367 */
368 set_irq_chip_and_handler(M32R_IRQ_INT3, &opsput_irq_type, 368 irq_set_chip_and_handler(M32R_IRQ_INT3, &opsput_irq_type,
369 handle_level_irq); 369 handle_level_irq);
370 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; 370 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
371 disable_opsput_irq(M32R_IRQ_INT3); 371 disable_opsput_irq(M32R_IRQ_INT3);
diff --git a/arch/m32r/platforms/usrv/setup.c b/arch/m32r/platforms/usrv/setup.c
index f3cff26d6e74..0c7a1e8c77b0 100644
--- a/arch/m32r/platforms/usrv/setup.c
+++ b/arch/m32r/platforms/usrv/setup.c
@@ -138,32 +138,32 @@ void __init init_IRQ(void)
138 once++; 138 once++;
139 139
140 /* MFT2 : system timer */ 140 /* MFT2 : system timer */
141 set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type, 141 irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type,
142 handle_level_irq); 142 handle_level_irq);
143 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 143 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
144 disable_mappi_irq(M32R_IRQ_MFT2); 144 disable_mappi_irq(M32R_IRQ_MFT2);
145 145
146#if defined(CONFIG_SERIAL_M32R_SIO) 146#if defined(CONFIG_SERIAL_M32R_SIO)
147 /* SIO0_R : uart receive data */ 147 /* SIO0_R : uart receive data */
148 set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type, 148 irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type,
149 handle_level_irq); 149 handle_level_irq);
150 icu_data[M32R_IRQ_SIO0_R].icucr = 0; 150 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
151 disable_mappi_irq(M32R_IRQ_SIO0_R); 151 disable_mappi_irq(M32R_IRQ_SIO0_R);
152 152
153 /* SIO0_S : uart send data */ 153 /* SIO0_S : uart send data */
154 set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type, 154 irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type,
155 handle_level_irq); 155 handle_level_irq);
156 icu_data[M32R_IRQ_SIO0_S].icucr = 0; 156 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
157 disable_mappi_irq(M32R_IRQ_SIO0_S); 157 disable_mappi_irq(M32R_IRQ_SIO0_S);
158 158
159 /* SIO1_R : uart receive data */ 159 /* SIO1_R : uart receive data */
160 set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type, 160 irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type,
161 handle_level_irq); 161 handle_level_irq);
162 icu_data[M32R_IRQ_SIO1_R].icucr = 0; 162 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
163 disable_mappi_irq(M32R_IRQ_SIO1_R); 163 disable_mappi_irq(M32R_IRQ_SIO1_R);
164 164
165 /* SIO1_S : uart send data */ 165 /* SIO1_S : uart send data */
166 set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type, 166 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type,
167 handle_level_irq); 167 handle_level_irq);
168 icu_data[M32R_IRQ_SIO1_S].icucr = 0; 168 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
169 disable_mappi_irq(M32R_IRQ_SIO1_S); 169 disable_mappi_irq(M32R_IRQ_SIO1_S);
@@ -171,7 +171,7 @@ void __init init_IRQ(void)
171 171
172 /* INT#67-#71: CFC#0 IREQ on PLD */ 172 /* INT#67-#71: CFC#0 IREQ on PLD */
173 for (i = 0 ; i < CONFIG_M32R_CFC_NUM ; i++ ) { 173 for (i = 0 ; i < CONFIG_M32R_CFC_NUM ; i++ ) {
174 set_irq_chip_and_handler(PLD_IRQ_CF0 + i, 174 irq_set_chip_and_handler(PLD_IRQ_CF0 + i,
175 &m32700ut_pld_irq_type, 175 &m32700ut_pld_irq_type,
176 handle_level_irq); 176 handle_level_irq);
177 pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr 177 pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr
@@ -181,14 +181,14 @@ void __init init_IRQ(void)
181 181
182#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) 182#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
183 /* INT#76: 16552D#0 IREQ on PLD */ 183 /* INT#76: 16552D#0 IREQ on PLD */
184 set_irq_chip_and_handler(PLD_IRQ_UART0, &m32700ut_pld_irq_type, 184 irq_set_chip_and_handler(PLD_IRQ_UART0, &m32700ut_pld_irq_type,
185 handle_level_irq); 185 handle_level_irq);
186 pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr 186 pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr
187 = PLD_ICUCR_ISMOD03; /* 'H' level sense */ 187 = PLD_ICUCR_ISMOD03; /* 'H' level sense */
188 disable_m32700ut_pld_irq(PLD_IRQ_UART0); 188 disable_m32700ut_pld_irq(PLD_IRQ_UART0);
189 189
190 /* INT#77: 16552D#1 IREQ on PLD */ 190 /* INT#77: 16552D#1 IREQ on PLD */
191 set_irq_chip_and_handler(PLD_IRQ_UART1, &m32700ut_pld_irq_type, 191 irq_set_chip_and_handler(PLD_IRQ_UART1, &m32700ut_pld_irq_type,
192 handle_level_irq); 192 handle_level_irq);
193 pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr 193 pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr
194 = PLD_ICUCR_ISMOD03; /* 'H' level sense */ 194 = PLD_ICUCR_ISMOD03; /* 'H' level sense */
@@ -197,7 +197,7 @@ void __init init_IRQ(void)
197 197
198#if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE) 198#if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE)
199 /* INT#80: AK4524 IREQ on PLD */ 199 /* INT#80: AK4524 IREQ on PLD */
200 set_irq_chip_and_handler(PLD_IRQ_SNDINT, &m32700ut_pld_irq_type, 200 irq_set_chip_and_handler(PLD_IRQ_SNDINT, &m32700ut_pld_irq_type,
201 handle_level_irq); 201 handle_level_irq);
202 pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr 202 pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr
203 = PLD_ICUCR_ISMOD01; /* 'L' level sense */ 203 = PLD_ICUCR_ISMOD01; /* 'L' level sense */
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 525174d41679..6e056d3c5d01 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -1,13 +1,11 @@
1config M68K 1config M68K
2 bool 2 bool
3 default y 3 default y
4 select HAVE_AOUT
5 select HAVE_IDE 4 select HAVE_IDE
6 select GENERIC_ATOMIC64 5 select HAVE_AOUT if MMU
7 6 select GENERIC_ATOMIC64 if MMU
8config MMU 7 select HAVE_GENERIC_HARDIRQS if !MMU
9 bool 8 select GENERIC_HARDIRQS_NO_DEPRECATED if !MMU
10 default y
11 9
12config RWSEM_GENERIC_SPINLOCK 10config RWSEM_GENERIC_SPINLOCK
13 bool 11 bool
@@ -34,457 +32,67 @@ config TIME_LOW_RES
34 bool 32 bool
35 default y 33 default y
36 34
37config GENERIC_IOMAP
38 bool
39 default y
40
41config ARCH_MAY_HAVE_PC_FDC
42 bool
43 depends on BROKEN && (Q40 || SUN3X)
44 default y
45
46config NO_IOPORT 35config NO_IOPORT
47 def_bool y 36 def_bool y
48 37
49config NO_DMA 38config NO_DMA
50 def_bool SUN3 39 def_bool (MMU && SUN3) || (!MMU && !COLDFIRE)
51 40
41config ZONE_DMA
42 bool
43 default y
52config HZ 44config HZ
53 int 45 int
46 default 1000 if CLEOPATRA
54 default 100 47 default 100
55 48
56config ARCH_USES_GETTIMEOFFSET
57 def_bool y
58
59source "init/Kconfig" 49source "init/Kconfig"
60 50
61source "kernel/Kconfig.freezer" 51source "kernel/Kconfig.freezer"
62 52
63menu "Platform dependent setup" 53config MMU
64 54 bool "MMU-based Paged Memory Management Support"
65config EISA
66 bool
67 ---help---
68 The Extended Industry Standard Architecture (EISA) bus was
69 developed as an open alternative to the IBM MicroChannel bus.
70
71 The EISA bus provided some of the features of the IBM MicroChannel
72 bus while maintaining backward compatibility with cards made for
73 the older ISA bus. The EISA bus saw limited use between 1988 and
74 1995 when it was made obsolete by the PCI bus.
75
76 Say Y here if you are building a kernel for an EISA-based machine.
77
78 Otherwise, say N.
79
80config MCA
81 bool
82 help
83 MicroChannel Architecture is found in some IBM PS/2 machines and
84 laptops. It is a bus system similar to PCI or ISA. See
85 <file:Documentation/mca.txt> (and especially the web page given
86 there) before attempting to build an MCA bus kernel.
87
88config PCMCIA
89 tristate
90 ---help---
91 Say Y here if you want to attach PCMCIA- or PC-cards to your Linux
92 computer. These are credit-card size devices such as network cards,
93 modems or hard drives often used with laptops computers. There are
94 actually two varieties of these cards: the older 16 bit PCMCIA cards
95 and the newer 32 bit CardBus cards. If you want to use CardBus
96 cards, you need to say Y here and also to "CardBus support" below.
97
98 To use your PC-cards, you will need supporting software from David
99 Hinds' pcmcia-cs package (see the file <file:Documentation/Changes>
100 for location). Please also read the PCMCIA-HOWTO, available from
101 <http://www.tldp.org/docs.html#howto>.
102
103 To compile this driver as modules, choose M here: the
104 modules will be called pcmcia_core and ds.
105
106config AMIGA
107 bool "Amiga support"
108 select MMU_MOTOROLA if MMU
109 help
110 This option enables support for the Amiga series of computers. If
111 you plan to use this kernel on an Amiga, say Y here and browse the
112 material available in <file:Documentation/m68k>; otherwise say N.
113
114config ATARI
115 bool "Atari support"
116 select MMU_MOTOROLA if MMU
117 help
118 This option enables support for the 68000-based Atari series of
119 computers (including the TT, Falcon and Medusa). If you plan to use
120 this kernel on an Atari, say Y here and browse the material
121 available in <file:Documentation/m68k>; otherwise say N.
122
123config MAC
124 bool "Macintosh support"
125 select MMU_MOTOROLA if MMU
126 help
127 This option enables support for the Apple Macintosh series of
128 computers (yes, there is experimental support now, at least for part
129 of the series).
130
131 Say N unless you're willing to code the remaining necessary support.
132 ;)
133
134config NUBUS
135 bool
136 depends on MAC
137 default y
138
139config M68K_L2_CACHE
140 bool
141 depends on MAC
142 default y
143
144config APOLLO
145 bool "Apollo support"
146 select MMU_MOTOROLA if MMU
147 help
148 Say Y here if you want to run Linux on an MC680x0-based Apollo
149 Domain workstation such as the DN3500.
150
151config VME
152 bool "VME (Motorola and BVM) support"
153 select MMU_MOTOROLA if MMU
154 help
155 Say Y here if you want to build a kernel for a 680x0 based VME
156 board. Boards currently supported include Motorola boards MVME147,
157 MVME162, MVME166, MVME167, MVME172, and MVME177. BVME4000 and
158 BVME6000 boards from BVM Ltd are also supported.
159
160config MVME147
161 bool "MVME147 support"
162 depends on VME
163 help
164 Say Y to include support for early Motorola VME boards. This will
165 build a kernel which can run on MVME147 single-board computers. If
166 you select this option you will have to select the appropriate
167 drivers for SCSI, Ethernet and serial ports later on.
168
169config MVME16x
170 bool "MVME162, 166 and 167 support"
171 depends on VME
172 help
173 Say Y to include support for Motorola VME boards. This will build a
174 kernel which can run on MVME162, MVME166, MVME167, MVME172, and
175 MVME177 boards. If you select this option you will have to select
176 the appropriate drivers for SCSI, Ethernet and serial ports later
177 on.
178
179config BVME6000
180 bool "BVME4000 and BVME6000 support"
181 depends on VME
182 help
183 Say Y to include support for VME boards from BVM Ltd. This will
184 build a kernel which can run on BVME4000 and BVME6000 boards. If
185 you select this option you will have to select the appropriate
186 drivers for SCSI, Ethernet and serial ports later on.
187
188config HP300
189 bool "HP9000/300 and HP9000/400 support"
190 select MMU_MOTOROLA if MMU
191 help
192 This option enables support for the HP9000/300 and HP9000/400 series
193 of workstations. Support for these machines is still somewhat
194 experimental. If you plan to try to use the kernel on such a machine
195 say Y here.
196 Everybody else says N.
197
198config DIO
199 bool "DIO bus support"
200 depends on HP300
201 default y 55 default y
202 help 56 help
203 Say Y here to enable support for the "DIO" expansion bus used in 57 Select if you want MMU-based virtualised addressing space
204 HP300 machines. If you are using such a system you almost certainly 58 support by paged memory management. If unsure, say 'Y'.
205 want this.
206
207config SUN3X
208 bool "Sun3x support"
209 select MMU_MOTOROLA if MMU
210 select M68030
211 help
212 This option enables support for the Sun 3x series of workstations.
213 Be warned that this support is very experimental.
214 Note that Sun 3x kernels are not compatible with Sun 3 hardware.
215 General Linux information on the Sun 3x series (now discontinued)
216 is at <http://www.angelfire.com/ca2/tech68k/sun3.html>.
217
218 If you don't want to compile a kernel for a Sun 3x, say N.
219
220config Q40
221 bool "Q40/Q60 support"
222 select MMU_MOTOROLA if MMU
223 help
224 The Q40 is a Motorola 68040-based successor to the Sinclair QL
225 manufactured in Germany. There is an official Q40 home page at
226 <http://www.q40.de/>. This option enables support for the Q40 and
227 Q60. Select your CPU below. For 68LC060 don't forget to enable FPU
228 emulation.
229
230config SUN3
231 bool "Sun3 support"
232 depends on !MMU_MOTOROLA
233 select MMU_SUN3 if MMU
234 select M68020
235 help
236 This option enables support for the Sun 3 series of workstations
237 (3/50, 3/60, 3/1xx, 3/2xx systems). Enabling this option requires
238 that all other hardware types must be disabled, as Sun 3 kernels
239 are incompatible with all other m68k targets (including Sun 3x!).
240
241 If you don't want to compile a kernel exclusively for a Sun 3, say N.
242
243config NATFEAT
244 bool "ARAnyM emulator support"
245 depends on ATARI
246 help
247 This option enables support for ARAnyM native features, such as
248 access to a disk image as /dev/hda.
249
250config NFBLOCK
251 tristate "NatFeat block device support"
252 depends on BLOCK && NATFEAT
253 help
254 Say Y to include support for the ARAnyM NatFeat block device
255 which allows direct access to the hard drives without using
256 the hardware emulation.
257
258config NFCON
259 tristate "NatFeat console driver"
260 depends on NATFEAT
261 help
262 Say Y to include support for the ARAnyM NatFeat console driver
263 which allows the console output to be redirected to the stderr
264 output of ARAnyM.
265
266config NFETH
267 tristate "NatFeat Ethernet support"
268 depends on NET_ETHERNET && NATFEAT
269 help
270 Say Y to include support for the ARAnyM NatFeat network device
271 which will emulate a regular ethernet device while presenting an
272 ethertap device to the host system.
273
274comment "Processor type"
275
276config M68020
277 bool "68020 support"
278 help
279 If you anticipate running this kernel on a computer with a MC68020
280 processor, say Y. Otherwise, say N. Note that the 68020 requires a
281 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
282 Sun 3, which provides its own version.
283
284config M68030
285 bool "68030 support"
286 depends on !MMU_SUN3
287 help
288 If you anticipate running this kernel on a computer with a MC68030
289 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
290 work, as it does not include an MMU (Memory Management Unit).
291
292config M68040
293 bool "68040 support"
294 depends on !MMU_SUN3
295 help
296 If you anticipate running this kernel on a computer with a MC68LC040
297 or MC68040 processor, say Y. Otherwise, say N. Note that an
298 MC68EC040 will not work, as it does not include an MMU (Memory
299 Management Unit).
300
301config M68060
302 bool "68060 support"
303 depends on !MMU_SUN3
304 help
305 If you anticipate running this kernel on a computer with a MC68060
306 processor, say Y. Otherwise, say N.
307
308config MMU_MOTOROLA
309 bool
310
311config MMU_SUN3
312 bool
313 depends on MMU && !MMU_MOTOROLA
314
315config M68KFPU_EMU
316 bool "Math emulation support (EXPERIMENTAL)"
317 depends on EXPERIMENTAL
318 help
319 At some point in the future, this will cause floating-point math
320 instructions to be emulated by the kernel on machines that lack a
321 floating-point math coprocessor. Thrill-seekers and chronically
322 sleep-deprived psychotic hacker types can say Y now, everyone else
323 should probably wait a while.
324
325config M68KFPU_EMU_EXTRAPREC
326 bool "Math emulation extra precision"
327 depends on M68KFPU_EMU
328 help
329 The fpu uses normally a few bit more during calculations for
330 correct rounding, the emulator can (often) do the same but this
331 extra calculation can cost quite some time, so you can disable
332 it here. The emulator will then "only" calculate with a 64 bit
333 mantissa and round slightly incorrect, what is more than enough
334 for normal usage.
335
336config M68KFPU_EMU_ONLY
337 bool "Math emulation only kernel"
338 depends on M68KFPU_EMU
339 help
340 This option prevents any floating-point instructions from being
341 compiled into the kernel, thereby the kernel doesn't save any
342 floating point context anymore during task switches, so this
343 kernel will only be usable on machines without a floating-point
344 math coprocessor. This makes the kernel a bit faster as no tests
345 needs to be executed whether a floating-point instruction in the
346 kernel should be executed or not.
347
348config ADVANCED
349 bool "Advanced configuration options"
350 ---help---
351 This gives you access to some advanced options for the CPU. The
352 defaults should be fine for most users, but these options may make
353 it possible for you to improve performance somewhat if you know what
354 you are doing.
355
356 Note that the answer to this question won't directly affect the
357 kernel: saying N will just cause the configurator to skip all
358 the questions about these options.
359 59
360 Most users should say N to this question. 60menu "Platform dependent setup"
361
362config RMW_INSNS
363 bool "Use read-modify-write instructions"
364 depends on ADVANCED
365 ---help---
366 This allows to use certain instructions that work with indivisible
367 read-modify-write bus cycles. While this is faster than the
368 workaround of disabling interrupts, it can conflict with DMA
369 ( = direct memory access) on many Amiga systems, and it is also said
370 to destabilize other machines. It is very likely that this will
371 cause serious problems on any Amiga or Atari Medusa if set. The only
372 configuration where it should work are 68030-based Ataris, where it
373 apparently improves performance. But you've been warned! Unless you
374 really know what you are doing, say N. Try Y only if you're quite
375 adventurous.
376
377config SINGLE_MEMORY_CHUNK
378 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
379 default y if SUN3
380 select NEED_MULTIPLE_NODES
381 help
382 Ignore all but the first contiguous chunk of physical memory for VM
383 purposes. This will save a few bytes kernel size and may speed up
384 some operations. Say N if not sure.
385 61
386config 060_WRITETHROUGH 62if MMU
387 bool "Use write-through caching for 68060 supervisor accesses" 63source arch/m68k/Kconfig.mmu
388 depends on ADVANCED && M68060 64endif
389 ---help--- 65if !MMU
390 The 68060 generally uses copyback caching of recently accessed data. 66source arch/m68k/Kconfig.nommu
391 Copyback caching means that memory writes will be held in an on-chip 67endif
392 cache and only written back to memory some time later. Saying Y
393 here will force supervisor (kernel) accesses to use writethrough
394 caching. Writethrough caching means that data is written to memory
395 straight away, so that cache and memory data always agree.
396 Writethrough caching is less efficient, but is needed for some
397 drivers on 68060 based systems where the 68060 bus snooping signal
398 is hardwired on. The 53c710 SCSI driver is known to suffer from
399 this problem.
400
401config ARCH_DISCONTIGMEM_ENABLE
402 def_bool !SINGLE_MEMORY_CHUNK
403
404config NODES_SHIFT
405 int
406 default "3"
407 depends on !SINGLE_MEMORY_CHUNK
408 68
409source "mm/Kconfig" 69source "mm/Kconfig"
410 70
411endmenu 71endmenu
412 72
413menu "General setup" 73menu "Executable file formats"
414 74
415source "fs/Kconfig.binfmt" 75source "fs/Kconfig.binfmt"
416 76
417config ZORRO 77endmenu
418 bool "Amiga Zorro (AutoConfig) bus support"
419 depends on AMIGA
420 help
421 This enables support for the Zorro bus in the Amiga. If you have
422 expansion cards in your Amiga that conform to the Amiga
423 AutoConfig(tm) specification, say Y, otherwise N. Note that even
424 expansion cards that do not fit in the Zorro slots but fit in e.g.
425 the CPU slot may fall in this category, so you have to say Y to let
426 Linux use these.
427
428config AMIGA_PCMCIA
429 bool "Amiga 1200/600 PCMCIA support (EXPERIMENTAL)"
430 depends on AMIGA && EXPERIMENTAL
431 help
432 Include support in the kernel for pcmcia on Amiga 1200 and Amiga
433 600. If you intend to use pcmcia cards say Y; otherwise say N.
434
435config STRAM_PROC
436 bool "ST-RAM statistics in /proc"
437 depends on ATARI
438 help
439 Say Y here to report ST-RAM usage statistics in /proc/stram.
440
441config HEARTBEAT
442 bool "Use power LED as a heartbeat" if AMIGA || APOLLO || ATARI || MAC ||Q40
443 default y if !AMIGA && !APOLLO && !ATARI && !MAC && !Q40 && HP300
444 help
445 Use the power-on LED on your machine as a load meter. The exact
446 behavior is platform-dependent, but normally the flash frequency is
447 a hyperbolic function of the 5-minute load average.
448
449# We have a dedicated heartbeat LED. :-)
450config PROC_HARDWARE
451 bool "/proc/hardware support"
452 help
453 Say Y here to support the /proc/hardware file, which gives you
454 access to information about the machine you're running on,
455 including the model, CPU, MMU, clock speed, BogoMIPS rating,
456 and memory size.
457
458config ISA
459 bool
460 depends on Q40 || AMIGA_PCMCIA
461 default y
462 help
463 Find out whether you have ISA slots on your motherboard. ISA is the
464 name of a bus system, i.e. the way the CPU talks to the other stuff
465 inside your box. Other bus systems are PCI, EISA, MicroChannel
466 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
467 newer boards don't support it. If you have ISA, say Y, otherwise N.
468
469config GENERIC_ISA_DMA
470 bool
471 depends on Q40 || AMIGA_PCMCIA
472 default y
473
474config ZONE_DMA
475 bool
476 default y
477 78
478source "drivers/pci/Kconfig" 79if !MMU
80menu "Power management options"
479 81
480source "drivers/zorro/Kconfig" 82config PM
83 bool "Power Management support"
84 help
85 Support processor power management modes
481 86
482endmenu 87endmenu
88endif
483 89
484source "net/Kconfig" 90source "net/Kconfig"
485 91
486source "drivers/Kconfig" 92source "drivers/Kconfig"
487 93
94if MMU
95
488menu "Character devices" 96menu "Character devices"
489 97
490config ATARI_MFPSER 98config ATARI_MFPSER
@@ -627,6 +235,8 @@ config SERIAL_CONSOLE
627 235
628endmenu 236endmenu
629 237
238endif
239
630source "fs/Kconfig" 240source "fs/Kconfig"
631 241
632source "arch/m68k/Kconfig.debug" 242source "arch/m68k/Kconfig.debug"
diff --git a/arch/m68k/Kconfig.debug b/arch/m68k/Kconfig.debug
index f53b6d5300e5..2bdb1b01115c 100644
--- a/arch/m68k/Kconfig.debug
+++ b/arch/m68k/Kconfig.debug
@@ -2,4 +2,38 @@ menu "Kernel hacking"
2 2
3source "lib/Kconfig.debug" 3source "lib/Kconfig.debug"
4 4
5if !MMU
6
7config FULLDEBUG
8 bool "Full Symbolic/Source Debugging support"
9 help
10 Enable debugging symbols on kernel build.
11
12config HIGHPROFILE
13 bool "Use fast second timer for profiling"
14 depends on COLDFIRE
15 help
16 Use a fast secondary clock to produce profiling information.
17
18config BOOTPARAM
19 bool 'Compiled-in Kernel Boot Parameter'
20
21config BOOTPARAM_STRING
22 string 'Kernel Boot Parameter'
23 default 'console=ttyS0,19200'
24 depends on BOOTPARAM
25
26config NO_KERNEL_MSG
27 bool "Suppress Kernel BUG Messages"
28 help
29 Do not output any debug BUG messages within the kernel.
30
31config BDM_DISABLE
32 bool "Disable BDM signals"
33 depends on (EXPERIMENTAL && COLDFIRE)
34 help
35 Disable the ColdFire CPU's BDM signals.
36
37endif
38
5endmenu 39endmenu
diff --git a/arch/m68k/Kconfig.mmu b/arch/m68k/Kconfig.mmu
new file mode 100644
index 000000000000..16539b1d5d3a
--- /dev/null
+++ b/arch/m68k/Kconfig.mmu
@@ -0,0 +1,417 @@
1config GENERIC_IOMAP
2 bool
3 default y
4
5config ARCH_MAY_HAVE_PC_FDC
6 bool
7 depends on BROKEN && (Q40 || SUN3X)
8 default y
9
10config ARCH_USES_GETTIMEOFFSET
11 def_bool y
12
13config EISA
14 bool
15 ---help---
16 The Extended Industry Standard Architecture (EISA) bus was
17 developed as an open alternative to the IBM MicroChannel bus.
18
19 The EISA bus provided some of the features of the IBM MicroChannel
20 bus while maintaining backward compatibility with cards made for
21 the older ISA bus. The EISA bus saw limited use between 1988 and
22 1995 when it was made obsolete by the PCI bus.
23
24 Say Y here if you are building a kernel for an EISA-based machine.
25
26 Otherwise, say N.
27
28config MCA
29 bool
30 help
31 MicroChannel Architecture is found in some IBM PS/2 machines and
32 laptops. It is a bus system similar to PCI or ISA. See
33 <file:Documentation/mca.txt> (and especially the web page given
34 there) before attempting to build an MCA bus kernel.
35
36config PCMCIA
37 tristate
38 ---help---
39 Say Y here if you want to attach PCMCIA- or PC-cards to your Linux
40 computer. These are credit-card size devices such as network cards,
41 modems or hard drives often used with laptops computers. There are
42 actually two varieties of these cards: the older 16 bit PCMCIA cards
43 and the newer 32 bit CardBus cards. If you want to use CardBus
44 cards, you need to say Y here and also to "CardBus support" below.
45
46 To use your PC-cards, you will need supporting software from David
47 Hinds' pcmcia-cs package (see the file <file:Documentation/Changes>
48 for location). Please also read the PCMCIA-HOWTO, available from
49 <http://www.tldp.org/docs.html#howto>.
50
51 To compile this driver as modules, choose M here: the
52 modules will be called pcmcia_core and ds.
53
54config AMIGA
55 bool "Amiga support"
56 select MMU_MOTOROLA if MMU
57 help
58 This option enables support for the Amiga series of computers. If
59 you plan to use this kernel on an Amiga, say Y here and browse the
60 material available in <file:Documentation/m68k>; otherwise say N.
61
62config ATARI
63 bool "Atari support"
64 select MMU_MOTOROLA if MMU
65 help
66 This option enables support for the 68000-based Atari series of
67 computers (including the TT, Falcon and Medusa). If you plan to use
68 this kernel on an Atari, say Y here and browse the material
69 available in <file:Documentation/m68k>; otherwise say N.
70
71config MAC
72 bool "Macintosh support"
73 select MMU_MOTOROLA if MMU
74 help
75 This option enables support for the Apple Macintosh series of
76 computers (yes, there is experimental support now, at least for part
77 of the series).
78
79 Say N unless you're willing to code the remaining necessary support.
80 ;)
81
82config NUBUS
83 bool
84 depends on MAC
85 default y
86
87config M68K_L2_CACHE
88 bool
89 depends on MAC
90 default y
91
92config APOLLO
93 bool "Apollo support"
94 select MMU_MOTOROLA if MMU
95 help
96 Say Y here if you want to run Linux on an MC680x0-based Apollo
97 Domain workstation such as the DN3500.
98
99config VME
100 bool "VME (Motorola and BVM) support"
101 select MMU_MOTOROLA if MMU
102 help
103 Say Y here if you want to build a kernel for a 680x0 based VME
104 board. Boards currently supported include Motorola boards MVME147,
105 MVME162, MVME166, MVME167, MVME172, and MVME177. BVME4000 and
106 BVME6000 boards from BVM Ltd are also supported.
107
108config MVME147
109 bool "MVME147 support"
110 depends on VME
111 help
112 Say Y to include support for early Motorola VME boards. This will
113 build a kernel which can run on MVME147 single-board computers. If
114 you select this option you will have to select the appropriate
115 drivers for SCSI, Ethernet and serial ports later on.
116
117config MVME16x
118 bool "MVME162, 166 and 167 support"
119 depends on VME
120 help
121 Say Y to include support for Motorola VME boards. This will build a
122 kernel which can run on MVME162, MVME166, MVME167, MVME172, and
123 MVME177 boards. If you select this option you will have to select
124 the appropriate drivers for SCSI, Ethernet and serial ports later
125 on.
126
127config BVME6000
128 bool "BVME4000 and BVME6000 support"
129 depends on VME
130 help
131 Say Y to include support for VME boards from BVM Ltd. This will
132 build a kernel which can run on BVME4000 and BVME6000 boards. If
133 you select this option you will have to select the appropriate
134 drivers for SCSI, Ethernet and serial ports later on.
135
136config HP300
137 bool "HP9000/300 and HP9000/400 support"
138 select MMU_MOTOROLA if MMU
139 help
140 This option enables support for the HP9000/300 and HP9000/400 series
141 of workstations. Support for these machines is still somewhat
142 experimental. If you plan to try to use the kernel on such a machine
143 say Y here.
144 Everybody else says N.
145
146config DIO
147 bool "DIO bus support"
148 depends on HP300
149 default y
150 help
151 Say Y here to enable support for the "DIO" expansion bus used in
152 HP300 machines. If you are using such a system you almost certainly
153 want this.
154
155config SUN3X
156 bool "Sun3x support"
157 select MMU_MOTOROLA if MMU
158 select M68030
159 help
160 This option enables support for the Sun 3x series of workstations.
161 Be warned that this support is very experimental.
162 Note that Sun 3x kernels are not compatible with Sun 3 hardware.
163 General Linux information on the Sun 3x series (now discontinued)
164 is at <http://www.angelfire.com/ca2/tech68k/sun3.html>.
165
166 If you don't want to compile a kernel for a Sun 3x, say N.
167
168config Q40
169 bool "Q40/Q60 support"
170 select MMU_MOTOROLA if MMU
171 help
172 The Q40 is a Motorola 68040-based successor to the Sinclair QL
173 manufactured in Germany. There is an official Q40 home page at
174 <http://www.q40.de/>. This option enables support for the Q40 and
175 Q60. Select your CPU below. For 68LC060 don't forget to enable FPU
176 emulation.
177
178config SUN3
179 bool "Sun3 support"
180 depends on !MMU_MOTOROLA
181 select MMU_SUN3 if MMU
182 select M68020
183 help
184 This option enables support for the Sun 3 series of workstations
185 (3/50, 3/60, 3/1xx, 3/2xx systems). Enabling this option requires
186 that all other hardware types must be disabled, as Sun 3 kernels
187 are incompatible with all other m68k targets (including Sun 3x!).
188
189 If you don't want to compile a kernel exclusively for a Sun 3, say N.
190
191config NATFEAT
192 bool "ARAnyM emulator support"
193 depends on ATARI
194 help
195 This option enables support for ARAnyM native features, such as
196 access to a disk image as /dev/hda.
197
198config NFBLOCK
199 tristate "NatFeat block device support"
200 depends on BLOCK && NATFEAT
201 help
202 Say Y to include support for the ARAnyM NatFeat block device
203 which allows direct access to the hard drives without using
204 the hardware emulation.
205
206config NFCON
207 tristate "NatFeat console driver"
208 depends on NATFEAT
209 help
210 Say Y to include support for the ARAnyM NatFeat console driver
211 which allows the console output to be redirected to the stderr
212 output of ARAnyM.
213
214config NFETH
215 tristate "NatFeat Ethernet support"
216 depends on NET_ETHERNET && NATFEAT
217 help
218 Say Y to include support for the ARAnyM NatFeat network device
219 which will emulate a regular ethernet device while presenting an
220 ethertap device to the host system.
221
222comment "Processor type"
223
224config M68020
225 bool "68020 support"
226 help
227 If you anticipate running this kernel on a computer with a MC68020
228 processor, say Y. Otherwise, say N. Note that the 68020 requires a
229 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
230 Sun 3, which provides its own version.
231
232config M68030
233 bool "68030 support"
234 depends on !MMU_SUN3
235 help
236 If you anticipate running this kernel on a computer with a MC68030
237 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
238 work, as it does not include an MMU (Memory Management Unit).
239
240config M68040
241 bool "68040 support"
242 depends on !MMU_SUN3
243 help
244 If you anticipate running this kernel on a computer with a MC68LC040
245 or MC68040 processor, say Y. Otherwise, say N. Note that an
246 MC68EC040 will not work, as it does not include an MMU (Memory
247 Management Unit).
248
249config M68060
250 bool "68060 support"
251 depends on !MMU_SUN3
252 help
253 If you anticipate running this kernel on a computer with a MC68060
254 processor, say Y. Otherwise, say N.
255
256config MMU_MOTOROLA
257 bool
258
259config MMU_SUN3
260 bool
261 depends on MMU && !MMU_MOTOROLA
262
263config M68KFPU_EMU
264 bool "Math emulation support (EXPERIMENTAL)"
265 depends on EXPERIMENTAL
266 help
267 At some point in the future, this will cause floating-point math
268 instructions to be emulated by the kernel on machines that lack a
269 floating-point math coprocessor. Thrill-seekers and chronically
270 sleep-deprived psychotic hacker types can say Y now, everyone else
271 should probably wait a while.
272
273config M68KFPU_EMU_EXTRAPREC
274 bool "Math emulation extra precision"
275 depends on M68KFPU_EMU
276 help
277 The fpu uses normally a few bit more during calculations for
278 correct rounding, the emulator can (often) do the same but this
279 extra calculation can cost quite some time, so you can disable
280 it here. The emulator will then "only" calculate with a 64 bit
281 mantissa and round slightly incorrect, what is more than enough
282 for normal usage.
283
284config M68KFPU_EMU_ONLY
285 bool "Math emulation only kernel"
286 depends on M68KFPU_EMU
287 help
288 This option prevents any floating-point instructions from being
289 compiled into the kernel, thereby the kernel doesn't save any
290 floating point context anymore during task switches, so this
291 kernel will only be usable on machines without a floating-point
292 math coprocessor. This makes the kernel a bit faster as no tests
293 needs to be executed whether a floating-point instruction in the
294 kernel should be executed or not.
295
296config ADVANCED
297 bool "Advanced configuration options"
298 ---help---
299 This gives you access to some advanced options for the CPU. The
300 defaults should be fine for most users, but these options may make
301 it possible for you to improve performance somewhat if you know what
302 you are doing.
303
304 Note that the answer to this question won't directly affect the
305 kernel: saying N will just cause the configurator to skip all
306 the questions about these options.
307
308 Most users should say N to this question.
309
310config RMW_INSNS
311 bool "Use read-modify-write instructions"
312 depends on ADVANCED
313 ---help---
314 This allows to use certain instructions that work with indivisible
315 read-modify-write bus cycles. While this is faster than the
316 workaround of disabling interrupts, it can conflict with DMA
317 ( = direct memory access) on many Amiga systems, and it is also said
318 to destabilize other machines. It is very likely that this will
319 cause serious problems on any Amiga or Atari Medusa if set. The only
320 configuration where it should work are 68030-based Ataris, where it
321 apparently improves performance. But you've been warned! Unless you
322 really know what you are doing, say N. Try Y only if you're quite
323 adventurous.
324
325config SINGLE_MEMORY_CHUNK
326 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
327 default y if SUN3
328 select NEED_MULTIPLE_NODES
329 help
330 Ignore all but the first contiguous chunk of physical memory for VM
331 purposes. This will save a few bytes kernel size and may speed up
332 some operations. Say N if not sure.
333
334config 060_WRITETHROUGH
335 bool "Use write-through caching for 68060 supervisor accesses"
336 depends on ADVANCED && M68060
337 ---help---
338 The 68060 generally uses copyback caching of recently accessed data.
339 Copyback caching means that memory writes will be held in an on-chip
340 cache and only written back to memory some time later. Saying Y
341 here will force supervisor (kernel) accesses to use writethrough
342 caching. Writethrough caching means that data is written to memory
343 straight away, so that cache and memory data always agree.
344 Writethrough caching is less efficient, but is needed for some
345 drivers on 68060 based systems where the 68060 bus snooping signal
346 is hardwired on. The 53c710 SCSI driver is known to suffer from
347 this problem.
348
349config ARCH_DISCONTIGMEM_ENABLE
350 def_bool !SINGLE_MEMORY_CHUNK
351
352config NODES_SHIFT
353 int
354 default "3"
355 depends on !SINGLE_MEMORY_CHUNK
356
357config ZORRO
358 bool "Amiga Zorro (AutoConfig) bus support"
359 depends on AMIGA
360 help
361 This enables support for the Zorro bus in the Amiga. If you have
362 expansion cards in your Amiga that conform to the Amiga
363 AutoConfig(tm) specification, say Y, otherwise N. Note that even
364 expansion cards that do not fit in the Zorro slots but fit in e.g.
365 the CPU slot may fall in this category, so you have to say Y to let
366 Linux use these.
367
368config AMIGA_PCMCIA
369 bool "Amiga 1200/600 PCMCIA support (EXPERIMENTAL)"
370 depends on AMIGA && EXPERIMENTAL
371 help
372 Include support in the kernel for pcmcia on Amiga 1200 and Amiga
373 600. If you intend to use pcmcia cards say Y; otherwise say N.
374
375config STRAM_PROC
376 bool "ST-RAM statistics in /proc"
377 depends on ATARI
378 help
379 Say Y here to report ST-RAM usage statistics in /proc/stram.
380
381config HEARTBEAT
382 bool "Use power LED as a heartbeat" if AMIGA || APOLLO || ATARI || MAC ||Q40
383 default y if !AMIGA && !APOLLO && !ATARI && !MAC && !Q40 && HP300
384 help
385 Use the power-on LED on your machine as a load meter. The exact
386 behavior is platform-dependent, but normally the flash frequency is
387 a hyperbolic function of the 5-minute load average.
388
389# We have a dedicated heartbeat LED. :-)
390config PROC_HARDWARE
391 bool "/proc/hardware support"
392 help
393 Say Y here to support the /proc/hardware file, which gives you
394 access to information about the machine you're running on,
395 including the model, CPU, MMU, clock speed, BogoMIPS rating,
396 and memory size.
397
398config ISA
399 bool
400 depends on Q40 || AMIGA_PCMCIA
401 default y
402 help
403 Find out whether you have ISA slots on your motherboard. ISA is the
404 name of a bus system, i.e. the way the CPU talks to the other stuff
405 inside your box. Other bus systems are PCI, EISA, MicroChannel
406 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
407 newer boards don't support it. If you have ISA, say Y, otherwise N.
408
409config GENERIC_ISA_DMA
410 bool
411 depends on Q40 || AMIGA_PCMCIA
412 default y
413
414source "drivers/pci/Kconfig"
415
416source "drivers/zorro/Kconfig"
417
diff --git a/arch/m68knommu/Kconfig b/arch/m68k/Kconfig.nommu
index b5424cf948e6..273bccab9517 100644
--- a/arch/m68knommu/Kconfig
+++ b/arch/m68k/Kconfig.nommu
@@ -1,43 +1,7 @@
1config M68K
2 bool
3 default y
4 select HAVE_IDE
5 select HAVE_GENERIC_HARDIRQS
6 select GENERIC_HARDIRQS_NO_DEPRECATED
7
8config MMU
9 bool
10 default n
11
12config NO_DMA
13 bool
14 depends on !COLDFIRE
15 default y
16
17config FPU 1config FPU
18 bool 2 bool
19 default n 3 default n
20 4
21config ZONE_DMA
22 bool
23 default y
24
25config RWSEM_GENERIC_SPINLOCK
26 bool
27 default y
28
29config RWSEM_XCHGADD_ALGORITHM
30 bool
31 default n
32
33config ARCH_HAS_ILOG2_U32
34 bool
35 default n
36
37config ARCH_HAS_ILOG2_U64
38 bool
39 default n
40
41config GENERIC_FIND_NEXT_BIT 5config GENERIC_FIND_NEXT_BIT
42 bool 6 bool
43 default y 7 default y
@@ -46,29 +10,14 @@ config GENERIC_GPIO
46 bool 10 bool
47 default n 11 default n
48 12
49config GENERIC_HWEIGHT
50 bool
51 default y
52
53config GENERIC_CALIBRATE_DELAY
54 bool
55 default y
56
57config GENERIC_CMOS_UPDATE 13config GENERIC_CMOS_UPDATE
58 bool 14 bool
59 default y 15 default y
60 16
61config TIME_LOW_RES
62 bool
63 default y
64
65config GENERIC_CLOCKEVENTS 17config GENERIC_CLOCKEVENTS
66 bool 18 bool
67 default n 19 default n
68 20
69config NO_IOPORT
70 def_bool y
71
72config COLDFIRE_SW_A7 21config COLDFIRE_SW_A7
73 bool 22 bool
74 default n 23 default n
@@ -85,12 +34,6 @@ config HAVE_MBAR
85config HAVE_IPSBAR 34config HAVE_IPSBAR
86 bool 35 bool
87 36
88source "init/Kconfig"
89
90source "kernel/Kconfig.freezer"
91
92menu "Processor type and features"
93
94choice 37choice
95 prompt "CPU" 38 prompt "CPU"
96 default M68EZ328 39 default M68EZ328
@@ -630,11 +573,6 @@ config 4KSTACKS
630 running more threads on a system and also reduces the pressure 573 running more threads on a system and also reduces the pressure
631 on the VM subsystem for higher order allocations. 574 on the VM subsystem for higher order allocations.
632 575
633config HZ
634 int
635 default 1000 if CLEOPATRA
636 default 100
637
638comment "RAM configuration" 576comment "RAM configuration"
639 577
640config RAMBASE 578config RAMBASE
@@ -803,10 +741,6 @@ endif
803 741
804source "kernel/time/Kconfig" 742source "kernel/time/Kconfig"
805 743
806source "mm/Kconfig"
807
808endmenu
809
810config ISA_DMA_API 744config ISA_DMA_API
811 bool 745 bool
812 depends on !M5272 746 depends on !M5272
@@ -814,31 +748,3 @@ config ISA_DMA_API
814 748
815source "drivers/pcmcia/Kconfig" 749source "drivers/pcmcia/Kconfig"
816 750
817menu "Executable file formats"
818
819source "fs/Kconfig.binfmt"
820
821endmenu
822
823menu "Power management options"
824
825config PM
826 bool "Power Management support"
827 help
828 Support processor power management modes
829
830endmenu
831
832source "net/Kconfig"
833
834source "drivers/Kconfig"
835
836source "fs/Kconfig"
837
838source "arch/m68knommu/Kconfig.debug"
839
840source "security/Kconfig"
841
842source "crypto/Kconfig"
843
844source "lib/Kconfig"
diff --git a/arch/m68k/Makefile b/arch/m68k/Makefile
index b793163abc61..be46cadd4017 100644
--- a/arch/m68k/Makefile
+++ b/arch/m68k/Makefile
@@ -1,123 +1,7 @@
1#
2# m68k/Makefile
3#
4# This file is included by the global makefile so that you can add your own
5# architecture-specific flags and dependencies. Remember to do have actions
6# for "archclean" and "archdep" for cleaning up and making dependencies for
7# this architecture
8#
9# This file is subject to the terms and conditions of the GNU General Public
10# License. See the file "COPYING" in the main directory of this archive
11# for more details.
12#
13# Copyright (C) 1994 by Hamish Macdonald
14#
15
16KBUILD_DEFCONFIG := multi_defconfig 1KBUILD_DEFCONFIG := multi_defconfig
17 2
18# override top level makefile 3ifdef CONFIG_MMU
19AS += -m68020 4include $(srctree)/arch/m68k/Makefile_mm
20LDFLAGS := -m m68kelf
21KBUILD_LDFLAGS_MODULE += -T $(srctree)/arch/m68k/kernel/module.lds
22ifneq ($(SUBARCH),$(ARCH))
23 ifeq ($(CROSS_COMPILE),)
24 CROSS_COMPILE := $(call cc-cross-prefix, \
25 m68k-linux-gnu- m68k-linux- m68k-unknown-linux-gnu-)
26 endif
27endif
28
29ifdef CONFIG_SUN3
30LDFLAGS_vmlinux = -N
31endif
32
33CHECKFLAGS += -D__mc68000__
34
35# without -fno-strength-reduce the 53c7xx.c driver fails ;-(
36KBUILD_CFLAGS += -pipe -fno-strength-reduce -ffixed-a2
37
38# enable processor switch if compiled only for a single cpu
39ifndef CONFIG_M68020
40ifndef CONFIG_M68030
41
42ifndef CONFIG_M68060
43KBUILD_CFLAGS += -m68040
44endif
45
46ifndef CONFIG_M68040
47KBUILD_CFLAGS += -m68060
48endif
49
50endif
51endif
52
53ifdef CONFIG_KGDB
54# If configured for kgdb support, include debugging infos and keep the
55# frame pointer
56KBUILD_CFLAGS := $(subst -fomit-frame-pointer,,$(KBUILD_CFLAGS)) -g
57endif
58
59ifndef CONFIG_SUN3
60head-y := arch/m68k/kernel/head.o
61else 5else
62head-y := arch/m68k/kernel/sun3-head.o 6include $(srctree)/arch/m68k/Makefile_no
63endif 7endif
64
65core-y += arch/m68k/kernel/ arch/m68k/mm/
66libs-y += arch/m68k/lib/
67
68core-$(CONFIG_Q40) += arch/m68k/q40/
69core-$(CONFIG_AMIGA) += arch/m68k/amiga/
70core-$(CONFIG_ATARI) += arch/m68k/atari/
71core-$(CONFIG_MAC) += arch/m68k/mac/
72core-$(CONFIG_HP300) += arch/m68k/hp300/
73core-$(CONFIG_APOLLO) += arch/m68k/apollo/
74core-$(CONFIG_MVME147) += arch/m68k/mvme147/
75core-$(CONFIG_MVME16x) += arch/m68k/mvme16x/
76core-$(CONFIG_BVME6000) += arch/m68k/bvme6000/
77core-$(CONFIG_SUN3X) += arch/m68k/sun3x/ arch/m68k/sun3/
78core-$(CONFIG_SUN3) += arch/m68k/sun3/ arch/m68k/sun3/prom/
79core-$(CONFIG_NATFEAT) += arch/m68k/emu/
80core-$(CONFIG_M68040) += arch/m68k/fpsp040/
81core-$(CONFIG_M68060) += arch/m68k/ifpsp060/
82core-$(CONFIG_M68KFPU_EMU) += arch/m68k/math-emu/
83
84all: zImage
85
86lilo: vmlinux
87 if [ -f $(INSTALL_PATH)/vmlinux ]; then mv -f $(INSTALL_PATH)/vmlinux $(INSTALL_PATH)/vmlinux.old; fi
88 if [ -f $(INSTALL_PATH)/System.map ]; then mv -f $(INSTALL_PATH)/System.map $(INSTALL_PATH)/System.old; fi
89 cat vmlinux > $(INSTALL_PATH)/vmlinux
90 cp System.map $(INSTALL_PATH)/System.map
91 if [ -x /sbin/lilo ]; then /sbin/lilo; else /etc/lilo/install; fi
92
93zImage compressed: vmlinux.gz
94
95vmlinux.gz: vmlinux
96
97ifndef CONFIG_KGDB
98 cp vmlinux vmlinux.tmp
99 $(STRIP) vmlinux.tmp
100 gzip -9c vmlinux.tmp >vmlinux.gz
101 rm vmlinux.tmp
102else
103 gzip -9c vmlinux >vmlinux.gz
104endif
105
106bzImage: vmlinux.bz2
107
108vmlinux.bz2: vmlinux
109
110ifndef CONFIG_KGDB
111 cp vmlinux vmlinux.tmp
112 $(STRIP) vmlinux.tmp
113 bzip2 -1c vmlinux.tmp >vmlinux.bz2
114 rm vmlinux.tmp
115else
116 bzip2 -1c vmlinux >vmlinux.bz2
117endif
118
119archclean:
120 rm -f vmlinux.gz vmlinux.bz2
121
122install:
123 sh $(srctree)/arch/m68k/install.sh $(KERNELRELEASE) vmlinux.gz System.map "$(INSTALL_PATH)"
diff --git a/arch/m68k/Makefile_mm b/arch/m68k/Makefile_mm
new file mode 100644
index 000000000000..d449b6d5aecf
--- /dev/null
+++ b/arch/m68k/Makefile_mm
@@ -0,0 +1,121 @@
1#
2# m68k/Makefile
3#
4# This file is included by the global makefile so that you can add your own
5# architecture-specific flags and dependencies. Remember to do have actions
6# for "archclean" and "archdep" for cleaning up and making dependencies for
7# this architecture
8#
9# This file is subject to the terms and conditions of the GNU General Public
10# License. See the file "COPYING" in the main directory of this archive
11# for more details.
12#
13# Copyright (C) 1994 by Hamish Macdonald
14#
15
16# override top level makefile
17AS += -m68020
18LDFLAGS := -m m68kelf
19KBUILD_LDFLAGS_MODULE += -T $(srctree)/arch/m68k/kernel/module.lds
20ifneq ($(SUBARCH),$(ARCH))
21 ifeq ($(CROSS_COMPILE),)
22 CROSS_COMPILE := $(call cc-cross-prefix, \
23 m68k-linux-gnu- m68k-linux- m68k-unknown-linux-gnu-)
24 endif
25endif
26
27ifdef CONFIG_SUN3
28LDFLAGS_vmlinux = -N
29endif
30
31CHECKFLAGS += -D__mc68000__
32
33# without -fno-strength-reduce the 53c7xx.c driver fails ;-(
34KBUILD_CFLAGS += -pipe -fno-strength-reduce -ffixed-a2
35
36# enable processor switch if compiled only for a single cpu
37ifndef CONFIG_M68020
38ifndef CONFIG_M68030
39
40ifndef CONFIG_M68060
41KBUILD_CFLAGS += -m68040
42endif
43
44ifndef CONFIG_M68040
45KBUILD_CFLAGS += -m68060
46endif
47
48endif
49endif
50
51ifdef CONFIG_KGDB
52# If configured for kgdb support, include debugging infos and keep the
53# frame pointer
54KBUILD_CFLAGS := $(subst -fomit-frame-pointer,,$(KBUILD_CFLAGS)) -g
55endif
56
57ifndef CONFIG_SUN3
58head-y := arch/m68k/kernel/head.o
59else
60head-y := arch/m68k/kernel/sun3-head.o
61endif
62
63core-y += arch/m68k/kernel/ arch/m68k/mm/
64libs-y += arch/m68k/lib/
65
66core-$(CONFIG_Q40) += arch/m68k/q40/
67core-$(CONFIG_AMIGA) += arch/m68k/amiga/
68core-$(CONFIG_ATARI) += arch/m68k/atari/
69core-$(CONFIG_MAC) += arch/m68k/mac/
70core-$(CONFIG_HP300) += arch/m68k/hp300/
71core-$(CONFIG_APOLLO) += arch/m68k/apollo/
72core-$(CONFIG_MVME147) += arch/m68k/mvme147/
73core-$(CONFIG_MVME16x) += arch/m68k/mvme16x/
74core-$(CONFIG_BVME6000) += arch/m68k/bvme6000/
75core-$(CONFIG_SUN3X) += arch/m68k/sun3x/ arch/m68k/sun3/
76core-$(CONFIG_SUN3) += arch/m68k/sun3/ arch/m68k/sun3/prom/
77core-$(CONFIG_NATFEAT) += arch/m68k/emu/
78core-$(CONFIG_M68040) += arch/m68k/fpsp040/
79core-$(CONFIG_M68060) += arch/m68k/ifpsp060/
80core-$(CONFIG_M68KFPU_EMU) += arch/m68k/math-emu/
81
82all: zImage
83
84lilo: vmlinux
85 if [ -f $(INSTALL_PATH)/vmlinux ]; then mv -f $(INSTALL_PATH)/vmlinux $(INSTALL_PATH)/vmlinux.old; fi
86 if [ -f $(INSTALL_PATH)/System.map ]; then mv -f $(INSTALL_PATH)/System.map $(INSTALL_PATH)/System.old; fi
87 cat vmlinux > $(INSTALL_PATH)/vmlinux
88 cp System.map $(INSTALL_PATH)/System.map
89 if [ -x /sbin/lilo ]; then /sbin/lilo; else /etc/lilo/install; fi
90
91zImage compressed: vmlinux.gz
92
93vmlinux.gz: vmlinux
94
95ifndef CONFIG_KGDB
96 cp vmlinux vmlinux.tmp
97 $(STRIP) vmlinux.tmp
98 gzip -9c vmlinux.tmp >vmlinux.gz
99 rm vmlinux.tmp
100else
101 gzip -9c vmlinux >vmlinux.gz
102endif
103
104bzImage: vmlinux.bz2
105
106vmlinux.bz2: vmlinux
107
108ifndef CONFIG_KGDB
109 cp vmlinux vmlinux.tmp
110 $(STRIP) vmlinux.tmp
111 bzip2 -1c vmlinux.tmp >vmlinux.bz2
112 rm vmlinux.tmp
113else
114 bzip2 -1c vmlinux >vmlinux.bz2
115endif
116
117archclean:
118 rm -f vmlinux.gz vmlinux.bz2
119
120install:
121 sh $(srctree)/arch/m68k/install.sh $(KERNELRELEASE) vmlinux.gz System.map "$(INSTALL_PATH)"
diff --git a/arch/m68knommu/Makefile b/arch/m68k/Makefile_no
index 589613fed31d..81652ab893e1 100644
--- a/arch/m68knommu/Makefile
+++ b/arch/m68k/Makefile_no
@@ -1,5 +1,5 @@
1# 1#
2# arch/m68knommu/Makefile 2# arch/m68k/Makefile
3# 3#
4# This file is subject to the terms and conditions of the GNU General Public 4# This file is subject to the terms and conditions of the GNU General Public
5# License. See the file "COPYING" in the main directory of this archive 5# License. See the file "COPYING" in the main directory of this archive
@@ -8,8 +8,6 @@
8# (C) Copyright 2002, Greg Ungerer <gerg@snapgear.com> 8# (C) Copyright 2002, Greg Ungerer <gerg@snapgear.com>
9# 9#
10 10
11KBUILD_DEFCONFIG := m5208evb_defconfig
12
13platform-$(CONFIG_M68328) := 68328 11platform-$(CONFIG_M68328) := 68328
14platform-$(CONFIG_M68EZ328) := 68EZ328 12platform-$(CONFIG_M68EZ328) := 68EZ328
15platform-$(CONFIG_M68VZ328) := 68VZ328 13platform-$(CONFIG_M68VZ328) := 68VZ328
@@ -82,7 +80,7 @@ cpuclass-$(CONFIG_M68360) := 68360
82CPUCLASS := $(cpuclass-y) 80CPUCLASS := $(cpuclass-y)
83 81
84ifneq ($(CPUCLASS),$(PLATFORM)) 82ifneq ($(CPUCLASS),$(PLATFORM))
85CLASSDIR := arch/m68knommu/platform/$(cpuclass-y)/ 83CLASSDIR := arch/m68k/platform/$(cpuclass-y)/
86endif 84endif
87 85
88export PLATFORM BOARD MODEL CPUCLASS 86export PLATFORM BOARD MODEL CPUCLASS
@@ -114,13 +112,13 @@ KBUILD_CFLAGS += $(cflags-y)
114KBUILD_CFLAGS += -D__linux__ 112KBUILD_CFLAGS += -D__linux__
115KBUILD_CFLAGS += -DUTS_SYSNAME=\"uClinux\" 113KBUILD_CFLAGS += -DUTS_SYSNAME=\"uClinux\"
116 114
117head-y := arch/m68knommu/platform/$(cpuclass-y)/head.o 115head-y := arch/m68k/platform/$(cpuclass-y)/head.o
118 116
119core-y += arch/m68knommu/kernel/ \ 117core-y += arch/m68k/kernel/ \
120 arch/m68knommu/mm/ \ 118 arch/m68k/mm/ \
121 $(CLASSDIR) \ 119 $(CLASSDIR) \
122 arch/m68knommu/platform/$(PLATFORM)/ 120 arch/m68k/platform/$(PLATFORM)/
123libs-y += arch/m68knommu/lib/ 121libs-y += arch/m68k/lib/
124 122
125archclean: 123archclean:
126 124
diff --git a/arch/m68knommu/configs/m5208evb_defconfig b/arch/m68k/configs/m5208evb_defconfig
index 2f5655c577af..c1616824e201 100644
--- a/arch/m68knommu/configs/m5208evb_defconfig
+++ b/arch/m68k/configs/m5208evb_defconfig
@@ -1,3 +1,4 @@
1# CONFIG_MMU is not set
1CONFIG_EXPERIMENTAL=y 2CONFIG_EXPERIMENTAL=y
2CONFIG_LOG_BUF_SHIFT=14 3CONFIG_LOG_BUF_SHIFT=14
3# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 4# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -37,6 +38,7 @@ CONFIG_INET=y
37# CONFIG_INET_LRO is not set 38# CONFIG_INET_LRO is not set
38# CONFIG_INET_DIAG is not set 39# CONFIG_INET_DIAG is not set
39# CONFIG_IPV6 is not set 40# CONFIG_IPV6 is not set
41# CONFIG_FW_LOADER is not set
40CONFIG_MTD=y 42CONFIG_MTD=y
41CONFIG_MTD_PARTITIONS=y 43CONFIG_MTD_PARTITIONS=y
42CONFIG_MTD_CHAR=y 44CONFIG_MTD_CHAR=y
diff --git a/arch/m68knommu/configs/m5249evb_defconfig b/arch/m68k/configs/m5249evb_defconfig
index 16df72bfbd45..a6599e42facf 100644
--- a/arch/m68knommu/configs/m5249evb_defconfig
+++ b/arch/m68k/configs/m5249evb_defconfig
@@ -1,3 +1,4 @@
1# CONFIG_MMU is not set
1CONFIG_EXPERIMENTAL=y 2CONFIG_EXPERIMENTAL=y
2CONFIG_LOG_BUF_SHIFT=14 3CONFIG_LOG_BUF_SHIFT=14
3# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 4# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -35,6 +36,7 @@ CONFIG_INET=y
35# CONFIG_INET_LRO is not set 36# CONFIG_INET_LRO is not set
36# CONFIG_INET_DIAG is not set 37# CONFIG_INET_DIAG is not set
37# CONFIG_IPV6 is not set 38# CONFIG_IPV6 is not set
39# CONFIG_FW_LOADER is not set
38CONFIG_MTD=y 40CONFIG_MTD=y
39CONFIG_MTD_PARTITIONS=y 41CONFIG_MTD_PARTITIONS=y
40CONFIG_MTD_CHAR=y 42CONFIG_MTD_CHAR=y
diff --git a/arch/m68knommu/configs/m5272c3_defconfig b/arch/m68k/configs/m5272c3_defconfig
index 4e6ea50c7f33..3fa60a57a0f9 100644
--- a/arch/m68knommu/configs/m5272c3_defconfig
+++ b/arch/m68k/configs/m5272c3_defconfig
@@ -1,3 +1,4 @@
1# CONFIG_MMU is not set
1CONFIG_EXPERIMENTAL=y 2CONFIG_EXPERIMENTAL=y
2CONFIG_LOG_BUF_SHIFT=14 3CONFIG_LOG_BUF_SHIFT=14
3# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 4# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -33,6 +34,7 @@ CONFIG_INET=y
33# CONFIG_INET_LRO is not set 34# CONFIG_INET_LRO is not set
34# CONFIG_INET_DIAG is not set 35# CONFIG_INET_DIAG is not set
35# CONFIG_IPV6 is not set 36# CONFIG_IPV6 is not set
37# CONFIG_FW_LOADER is not set
36CONFIG_MTD=y 38CONFIG_MTD=y
37CONFIG_MTD_PARTITIONS=y 39CONFIG_MTD_PARTITIONS=y
38CONFIG_MTD_CHAR=y 40CONFIG_MTD_CHAR=y
diff --git a/arch/m68knommu/configs/m5275evb_defconfig b/arch/m68k/configs/m5275evb_defconfig
index f3dd74115a34..33c32aeca12b 100644
--- a/arch/m68knommu/configs/m5275evb_defconfig
+++ b/arch/m68k/configs/m5275evb_defconfig
@@ -1,3 +1,4 @@
1# CONFIG_MMU is not set
1CONFIG_EXPERIMENTAL=y 2CONFIG_EXPERIMENTAL=y
2CONFIG_LOG_BUF_SHIFT=14 3CONFIG_LOG_BUF_SHIFT=14
3# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 4# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -36,6 +37,7 @@ CONFIG_INET=y
36# CONFIG_INET_LRO is not set 37# CONFIG_INET_LRO is not set
37# CONFIG_INET_DIAG is not set 38# CONFIG_INET_DIAG is not set
38# CONFIG_IPV6 is not set 39# CONFIG_IPV6 is not set
40# CONFIG_FW_LOADER is not set
39CONFIG_MTD=y 41CONFIG_MTD=y
40CONFIG_MTD_PARTITIONS=y 42CONFIG_MTD_PARTITIONS=y
41CONFIG_MTD_CHAR=y 43CONFIG_MTD_CHAR=y
diff --git a/arch/m68knommu/configs/m5307c3_defconfig b/arch/m68k/configs/m5307c3_defconfig
index bce0a20c3737..43795f41f7c7 100644
--- a/arch/m68knommu/configs/m5307c3_defconfig
+++ b/arch/m68k/configs/m5307c3_defconfig
@@ -1,3 +1,4 @@
1# CONFIG_MMU is not set
1CONFIG_EXPERIMENTAL=y 2CONFIG_EXPERIMENTAL=y
2CONFIG_LOG_BUF_SHIFT=14 3CONFIG_LOG_BUF_SHIFT=14
3# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 4# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -35,6 +36,7 @@ CONFIG_INET=y
35# CONFIG_INET_LRO is not set 36# CONFIG_INET_LRO is not set
36# CONFIG_INET_DIAG is not set 37# CONFIG_INET_DIAG is not set
37# CONFIG_IPV6 is not set 38# CONFIG_IPV6 is not set
39# CONFIG_FW_LOADER is not set
38CONFIG_MTD=y 40CONFIG_MTD=y
39CONFIG_MTD_PARTITIONS=y 41CONFIG_MTD_PARTITIONS=y
40CONFIG_MTD_CHAR=y 42CONFIG_MTD_CHAR=y
diff --git a/arch/m68knommu/configs/m5407c3_defconfig b/arch/m68k/configs/m5407c3_defconfig
index 618cc32691f2..72746c57a571 100644
--- a/arch/m68knommu/configs/m5407c3_defconfig
+++ b/arch/m68k/configs/m5407c3_defconfig
@@ -1,3 +1,4 @@
1# CONFIG_MMU is not set
1CONFIG_EXPERIMENTAL=y 2CONFIG_EXPERIMENTAL=y
2CONFIG_LOG_BUF_SHIFT=14 3CONFIG_LOG_BUF_SHIFT=14
3# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 4# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -35,6 +36,7 @@ CONFIG_INET=y
35# CONFIG_INET_LRO is not set 36# CONFIG_INET_LRO is not set
36# CONFIG_INET_DIAG is not set 37# CONFIG_INET_DIAG is not set
37# CONFIG_IPV6 is not set 38# CONFIG_IPV6 is not set
39# CONFIG_FW_LOADER is not set
38CONFIG_MTD=y 40CONFIG_MTD=y
39CONFIG_MTD_PARTITIONS=y 41CONFIG_MTD_PARTITIONS=y
40CONFIG_MTD_CHAR=y 42CONFIG_MTD_CHAR=y
diff --git a/arch/m68k/include/asm/bitops_mm.h b/arch/m68k/include/asm/bitops_mm.h
index b4ecdaada520..9d69f6e62365 100644
--- a/arch/m68k/include/asm/bitops_mm.h
+++ b/arch/m68k/include/asm/bitops_mm.h
@@ -325,58 +325,45 @@ static inline int __fls(int x)
325#include <asm-generic/bitops/hweight.h> 325#include <asm-generic/bitops/hweight.h>
326#include <asm-generic/bitops/lock.h> 326#include <asm-generic/bitops/lock.h>
327 327
328/* Bitmap functions for the minix filesystem */ 328/* Bitmap functions for the little endian bitmap. */
329 329
330static inline int minix_find_first_zero_bit(const void *vaddr, unsigned size) 330static inline void __set_bit_le(int nr, void *addr)
331{ 331{
332 const unsigned short *p = vaddr, *addr = vaddr; 332 __set_bit(nr ^ 24, addr);
333 int res; 333}
334 unsigned short num;
335
336 if (!size)
337 return 0;
338
339 size = (size >> 4) + ((size & 15) > 0);
340 while (*p++ == 0xffff)
341 {
342 if (--size == 0)
343 return (p - addr) << 4;
344 }
345 334
346 num = ~*--p; 335static inline void __clear_bit_le(int nr, void *addr)
347 __asm__ __volatile__ ("bfffo %1{#16,#16},%0" 336{
348 : "=d" (res) : "d" (num & -num)); 337 __clear_bit(nr ^ 24, addr);
349 return ((p - addr) << 4) + (res ^ 31);
350} 338}
351 339
352#define minix_test_and_set_bit(nr, addr) __test_and_set_bit((nr) ^ 16, (unsigned long *)(addr)) 340static inline int __test_and_set_bit_le(int nr, void *addr)
353#define minix_set_bit(nr,addr) __set_bit((nr) ^ 16, (unsigned long *)(addr)) 341{
354#define minix_test_and_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 16, (unsigned long *)(addr)) 342 return __test_and_set_bit(nr ^ 24, addr);
343}
355 344
356static inline int minix_test_bit(int nr, const void *vaddr) 345static inline int test_and_set_bit_le(int nr, void *addr)
357{ 346{
358 const unsigned short *p = vaddr; 347 return test_and_set_bit(nr ^ 24, addr);
359 return (p[nr >> 4] & (1U << (nr & 15))) != 0;
360} 348}
361 349
362/* Bitmap functions for the ext2 filesystem. */ 350static inline int __test_and_clear_bit_le(int nr, void *addr)
351{
352 return __test_and_clear_bit(nr ^ 24, addr);
353}
363 354
364#define ext2_set_bit(nr, addr) __test_and_set_bit((nr) ^ 24, (unsigned long *)(addr)) 355static inline int test_and_clear_bit_le(int nr, void *addr)
365#define ext2_set_bit_atomic(lock, nr, addr) test_and_set_bit((nr) ^ 24, (unsigned long *)(addr)) 356{
366#define ext2_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 24, (unsigned long *)(addr)) 357 return test_and_clear_bit(nr ^ 24, addr);
367#define ext2_clear_bit_atomic(lock, nr, addr) test_and_clear_bit((nr) ^ 24, (unsigned long *)(addr)) 358}
368#define ext2_find_next_zero_bit(addr, size, offset) \
369 generic_find_next_zero_le_bit((unsigned long *)addr, size, offset)
370#define ext2_find_next_bit(addr, size, offset) \
371 generic_find_next_le_bit((unsigned long *)addr, size, offset)
372 359
373static inline int ext2_test_bit(int nr, const void *vaddr) 360static inline int test_bit_le(int nr, const void *vaddr)
374{ 361{
375 const unsigned char *p = vaddr; 362 const unsigned char *p = vaddr;
376 return (p[nr >> 3] & (1U << (nr & 7))) != 0; 363 return (p[nr >> 3] & (1U << (nr & 7))) != 0;
377} 364}
378 365
379static inline int ext2_find_first_zero_bit(const void *vaddr, unsigned size) 366static inline int find_first_zero_bit_le(const void *vaddr, unsigned size)
380{ 367{
381 const unsigned long *p = vaddr, *addr = vaddr; 368 const unsigned long *p = vaddr, *addr = vaddr;
382 int res; 369 int res;
@@ -393,33 +380,36 @@ static inline int ext2_find_first_zero_bit(const void *vaddr, unsigned size)
393 380
394 --p; 381 --p;
395 for (res = 0; res < 32; res++) 382 for (res = 0; res < 32; res++)
396 if (!ext2_test_bit (res, p)) 383 if (!test_bit_le(res, p))
397 break; 384 break;
398 return (p - addr) * 32 + res; 385 return (p - addr) * 32 + res;
399} 386}
400 387
401static inline unsigned long generic_find_next_zero_le_bit(const unsigned long *addr, 388static inline unsigned long find_next_zero_bit_le(const void *addr,
402 unsigned long size, unsigned long offset) 389 unsigned long size, unsigned long offset)
403{ 390{
404 const unsigned long *p = addr + (offset >> 5); 391 const unsigned long *p = addr;
405 int bit = offset & 31UL, res; 392 int bit = offset & 31UL, res;
406 393
407 if (offset >= size) 394 if (offset >= size)
408 return size; 395 return size;
409 396
397 p += offset >> 5;
398
410 if (bit) { 399 if (bit) {
400 offset -= bit;
411 /* Look for zero in first longword */ 401 /* Look for zero in first longword */
412 for (res = bit; res < 32; res++) 402 for (res = bit; res < 32; res++)
413 if (!ext2_test_bit (res, p)) 403 if (!test_bit_le(res, p))
414 return (p - addr) * 32 + res; 404 return offset + res;
415 p++; 405 p++;
406 offset += 32;
416 } 407 }
417 /* No zero yet, search remaining full bytes for a zero */ 408 /* No zero yet, search remaining full bytes for a zero */
418 res = ext2_find_first_zero_bit (p, size - 32 * (p - addr)); 409 return offset + find_first_zero_bit_le(p, size - offset);
419 return (p - addr) * 32 + res;
420} 410}
421 411
422static inline int ext2_find_first_bit(const void *vaddr, unsigned size) 412static inline int find_first_bit_le(const void *vaddr, unsigned size)
423{ 413{
424 const unsigned long *p = vaddr, *addr = vaddr; 414 const unsigned long *p = vaddr, *addr = vaddr;
425 int res; 415 int res;
@@ -435,32 +425,42 @@ static inline int ext2_find_first_bit(const void *vaddr, unsigned size)
435 425
436 --p; 426 --p;
437 for (res = 0; res < 32; res++) 427 for (res = 0; res < 32; res++)
438 if (ext2_test_bit(res, p)) 428 if (test_bit_le(res, p))
439 break; 429 break;
440 return (p - addr) * 32 + res; 430 return (p - addr) * 32 + res;
441} 431}
442 432
443static inline unsigned long generic_find_next_le_bit(const unsigned long *addr, 433static inline unsigned long find_next_bit_le(const void *addr,
444 unsigned long size, unsigned long offset) 434 unsigned long size, unsigned long offset)
445{ 435{
446 const unsigned long *p = addr + (offset >> 5); 436 const unsigned long *p = addr;
447 int bit = offset & 31UL, res; 437 int bit = offset & 31UL, res;
448 438
449 if (offset >= size) 439 if (offset >= size)
450 return size; 440 return size;
451 441
442 p += offset >> 5;
443
452 if (bit) { 444 if (bit) {
445 offset -= bit;
453 /* Look for one in first longword */ 446 /* Look for one in first longword */
454 for (res = bit; res < 32; res++) 447 for (res = bit; res < 32; res++)
455 if (ext2_test_bit(res, p)) 448 if (test_bit_le(res, p))
456 return (p - addr) * 32 + res; 449 return offset + res;
457 p++; 450 p++;
451 offset += 32;
458 } 452 }
459 /* No set bit yet, search remaining full bytes for a set bit */ 453 /* No set bit yet, search remaining full bytes for a set bit */
460 res = ext2_find_first_bit(p, size - 32 * (p - addr)); 454 return offset + find_first_bit_le(p, size - offset);
461 return (p - addr) * 32 + res;
462} 455}
463 456
457/* Bitmap functions for the ext2 filesystem. */
458
459#define ext2_set_bit_atomic(lock, nr, addr) \
460 test_and_set_bit_le(nr, addr)
461#define ext2_clear_bit_atomic(lock, nr, addr) \
462 test_and_clear_bit_le(nr, addr)
463
464#endif /* __KERNEL__ */ 464#endif /* __KERNEL__ */
465 465
466#endif /* _M68K_BITOPS_H */ 466#endif /* _M68K_BITOPS_H */
diff --git a/arch/m68k/include/asm/bitops_no.h b/arch/m68k/include/asm/bitops_no.h
index 9d3cbe5fad1e..7d3779fdc5b6 100644
--- a/arch/m68k/include/asm/bitops_no.h
+++ b/arch/m68k/include/asm/bitops_no.h
@@ -196,7 +196,19 @@ static __inline__ int __test_bit(int nr, const volatile unsigned long * addr)
196#include <asm-generic/bitops/hweight.h> 196#include <asm-generic/bitops/hweight.h>
197#include <asm-generic/bitops/lock.h> 197#include <asm-generic/bitops/lock.h>
198 198
199static __inline__ int ext2_set_bit(int nr, volatile void * addr) 199#define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7)
200
201static inline void __set_bit_le(int nr, void *addr)
202{
203 __set_bit(nr ^ BITOP_LE_SWIZZLE, addr);
204}
205
206static inline void __clear_bit_le(int nr, void *addr)
207{
208 __clear_bit(nr ^ BITOP_LE_SWIZZLE, addr);
209}
210
211static inline int __test_and_set_bit_le(int nr, volatile void *addr)
200{ 212{
201 char retval; 213 char retval;
202 214
@@ -215,7 +227,7 @@ static __inline__ int ext2_set_bit(int nr, volatile void * addr)
215 return retval; 227 return retval;
216} 228}
217 229
218static __inline__ int ext2_clear_bit(int nr, volatile void * addr) 230static inline int __test_and_clear_bit_le(int nr, volatile void *addr)
219{ 231{
220 char retval; 232 char retval;
221 233
@@ -238,7 +250,7 @@ static __inline__ int ext2_clear_bit(int nr, volatile void * addr)
238 ({ \ 250 ({ \
239 int ret; \ 251 int ret; \
240 spin_lock(lock); \ 252 spin_lock(lock); \
241 ret = ext2_set_bit((nr), (addr)); \ 253 ret = __test_and_set_bit_le((nr), (addr)); \
242 spin_unlock(lock); \ 254 spin_unlock(lock); \
243 ret; \ 255 ret; \
244 }) 256 })
@@ -247,12 +259,12 @@ static __inline__ int ext2_clear_bit(int nr, volatile void * addr)
247 ({ \ 259 ({ \
248 int ret; \ 260 int ret; \
249 spin_lock(lock); \ 261 spin_lock(lock); \
250 ret = ext2_clear_bit((nr), (addr)); \ 262 ret = __test_and_clear_bit_le((nr), (addr)); \
251 spin_unlock(lock); \ 263 spin_unlock(lock); \
252 ret; \ 264 ret; \
253 }) 265 })
254 266
255static __inline__ int ext2_test_bit(int nr, const volatile void * addr) 267static inline int test_bit_le(int nr, const volatile void *addr)
256{ 268{
257 char retval; 269 char retval;
258 270
@@ -271,10 +283,10 @@ static __inline__ int ext2_test_bit(int nr, const volatile void * addr)
271 return retval; 283 return retval;
272} 284}
273 285
274#define ext2_find_first_zero_bit(addr, size) \ 286#define find_first_zero_bit_le(addr, size) \
275 ext2_find_next_zero_bit((addr), (size), 0) 287 find_next_zero_bit_le((addr), (size), 0)
276 288
277static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset) 289static inline unsigned long find_next_zero_bit_le(void *addr, unsigned long size, unsigned long offset)
278{ 290{
279 unsigned long *p = ((unsigned long *) addr) + (offset >> 5); 291 unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
280 unsigned long result = offset & ~31UL; 292 unsigned long result = offset & ~31UL;
@@ -324,10 +336,6 @@ found_middle:
324 return result + ffz(__swab32(tmp)); 336 return result + ffz(__swab32(tmp));
325} 337}
326 338
327#define ext2_find_next_bit(addr, size, off) \
328 generic_find_next_le_bit((unsigned long *)(addr), (size), (off))
329#include <asm-generic/bitops/minix.h>
330
331#endif /* __KERNEL__ */ 339#endif /* __KERNEL__ */
332 340
333#include <asm-generic/bitops/fls.h> 341#include <asm-generic/bitops/fls.h>
diff --git a/arch/m68k/include/asm/types.h b/arch/m68k/include/asm/types.h
index 10ad92f1c173..b17fd115a4e7 100644
--- a/arch/m68k/include/asm/types.h
+++ b/arch/m68k/include/asm/types.h
@@ -23,12 +23,6 @@ typedef unsigned short umode_t;
23 23
24#define BITS_PER_LONG 32 24#define BITS_PER_LONG 32
25 25
26#ifndef __ASSEMBLY__
27
28typedef u32 dma64_addr_t;
29
30#endif /* __ASSEMBLY__ */
31
32#endif /* __KERNEL__ */ 26#endif /* __KERNEL__ */
33 27
34#endif /* _M68K_TYPES_H */ 28#endif /* _M68K_TYPES_H */
diff --git a/arch/m68k/kernel/Makefile b/arch/m68k/kernel/Makefile
index 55d5d6b680a2..c482ebc9dd54 100644
--- a/arch/m68k/kernel/Makefile
+++ b/arch/m68k/kernel/Makefile
@@ -1,17 +1,5 @@
1# 1ifdef CONFIG_MMU
2# Makefile for the linux kernel. 2include arch/m68k/kernel/Makefile_mm
3#
4
5ifndef CONFIG_SUN3
6 extra-y := head.o
7else 3else
8 extra-y := sun3-head.o 4include arch/m68k/kernel/Makefile_no
9endif 5endif
10extra-y += vmlinux.lds
11
12obj-y := entry.o process.o traps.o ints.o signal.o ptrace.o module.o \
13 sys_m68k.o time.o setup.o m68k_ksyms.o devres.o
14
15devres-y = ../../../kernel/irq/devres.o
16
17obj-y$(CONFIG_MMU_SUN3) += dma.o # no, it's not a typo
diff --git a/arch/m68k/kernel/Makefile_mm b/arch/m68k/kernel/Makefile_mm
new file mode 100644
index 000000000000..55d5d6b680a2
--- /dev/null
+++ b/arch/m68k/kernel/Makefile_mm
@@ -0,0 +1,17 @@
1#
2# Makefile for the linux kernel.
3#
4
5ifndef CONFIG_SUN3
6 extra-y := head.o
7else
8 extra-y := sun3-head.o
9endif
10extra-y += vmlinux.lds
11
12obj-y := entry.o process.o traps.o ints.o signal.o ptrace.o module.o \
13 sys_m68k.o time.o setup.o m68k_ksyms.o devres.o
14
15devres-y = ../../../kernel/irq/devres.o
16
17obj-y$(CONFIG_MMU_SUN3) += dma.o # no, it's not a typo
diff --git a/arch/m68knommu/kernel/Makefile b/arch/m68k/kernel/Makefile_no
index 37c3fc074c0a..37c3fc074c0a 100644
--- a/arch/m68knommu/kernel/Makefile
+++ b/arch/m68k/kernel/Makefile_no
diff --git a/arch/m68k/kernel/asm-offsets.c b/arch/m68k/kernel/asm-offsets.c
index 78e59b82ebc3..59a69a5c62f2 100644
--- a/arch/m68k/kernel/asm-offsets.c
+++ b/arch/m68k/kernel/asm-offsets.c
@@ -1,100 +1,5 @@
1/*
2 * This program is used to generate definitions needed by
3 * assembly language modules.
4 *
5 * We use the technique used in the OSF Mach kernel code:
6 * generate asm statements containing #defines,
7 * compile this file to assembler, and then extract the
8 * #defines from the assembly-language output.
9 */
10
11#define ASM_OFFSETS_C
12
13#include <linux/stddef.h>
14#include <linux/sched.h>
15#include <linux/kernel_stat.h>
16#include <linux/kbuild.h>
17#include <asm/bootinfo.h>
18#include <asm/irq.h>
19#include <asm/amigahw.h>
20#include <linux/font.h>
21
22int main(void)
23{
24 /* offsets into the task struct */
25 DEFINE(TASK_THREAD, offsetof(struct task_struct, thread));
26 DEFINE(TASK_INFO, offsetof(struct task_struct, thread.info));
27 DEFINE(TASK_MM, offsetof(struct task_struct, mm));
28#ifdef CONFIG_MMU 1#ifdef CONFIG_MMU
29 DEFINE(TASK_TINFO, offsetof(struct task_struct, thread.info)); 2#include "asm-offsets_mm.c"
3#else
4#include "asm-offsets_no.c"
30#endif 5#endif
31
32 /* offsets into the thread struct */
33 DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
34 DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
35 DEFINE(THREAD_SR, offsetof(struct thread_struct, sr));
36 DEFINE(THREAD_FS, offsetof(struct thread_struct, fs));
37 DEFINE(THREAD_CRP, offsetof(struct thread_struct, crp));
38 DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
39 DEFINE(THREAD_FPREG, offsetof(struct thread_struct, fp));
40 DEFINE(THREAD_FPCNTL, offsetof(struct thread_struct, fpcntl));
41 DEFINE(THREAD_FPSTATE, offsetof(struct thread_struct, fpstate));
42
43 /* offsets into the thread_info struct */
44 DEFINE(TINFO_PREEMPT, offsetof(struct thread_info, preempt_count));
45 DEFINE(TINFO_FLAGS, offsetof(struct thread_info, flags));
46
47 /* offsets into the pt_regs */
48 DEFINE(PT_OFF_D0, offsetof(struct pt_regs, d0));
49 DEFINE(PT_OFF_ORIG_D0, offsetof(struct pt_regs, orig_d0));
50 DEFINE(PT_OFF_D1, offsetof(struct pt_regs, d1));
51 DEFINE(PT_OFF_D2, offsetof(struct pt_regs, d2));
52 DEFINE(PT_OFF_D3, offsetof(struct pt_regs, d3));
53 DEFINE(PT_OFF_D4, offsetof(struct pt_regs, d4));
54 DEFINE(PT_OFF_D5, offsetof(struct pt_regs, d5));
55 DEFINE(PT_OFF_A0, offsetof(struct pt_regs, a0));
56 DEFINE(PT_OFF_A1, offsetof(struct pt_regs, a1));
57 DEFINE(PT_OFF_A2, offsetof(struct pt_regs, a2));
58 DEFINE(PT_OFF_PC, offsetof(struct pt_regs, pc));
59 DEFINE(PT_OFF_SR, offsetof(struct pt_regs, sr));
60 /* bitfields are a bit difficult */
61 DEFINE(PT_OFF_FORMATVEC, offsetof(struct pt_regs, pc) + 4);
62
63 /* offsets into the irq_cpustat_t struct */
64 DEFINE(CPUSTAT_SOFTIRQ_PENDING, offsetof(irq_cpustat_t, __softirq_pending));
65
66 /* offsets into the bi_record struct */
67 DEFINE(BIR_TAG, offsetof(struct bi_record, tag));
68 DEFINE(BIR_SIZE, offsetof(struct bi_record, size));
69 DEFINE(BIR_DATA, offsetof(struct bi_record, data));
70
71 /* offsets into font_desc (drivers/video/console/font.h) */
72 DEFINE(FONT_DESC_IDX, offsetof(struct font_desc, idx));
73 DEFINE(FONT_DESC_NAME, offsetof(struct font_desc, name));
74 DEFINE(FONT_DESC_WIDTH, offsetof(struct font_desc, width));
75 DEFINE(FONT_DESC_HEIGHT, offsetof(struct font_desc, height));
76 DEFINE(FONT_DESC_DATA, offsetof(struct font_desc, data));
77 DEFINE(FONT_DESC_PREF, offsetof(struct font_desc, pref));
78
79 /* signal defines */
80 DEFINE(LSIGSEGV, SIGSEGV);
81 DEFINE(LSEGV_MAPERR, SEGV_MAPERR);
82 DEFINE(LSIGTRAP, SIGTRAP);
83 DEFINE(LTRAP_TRACE, TRAP_TRACE);
84
85 /* offsets into the custom struct */
86 DEFINE(CUSTOMBASE, &amiga_custom);
87 DEFINE(C_INTENAR, offsetof(struct CUSTOM, intenar));
88 DEFINE(C_INTREQR, offsetof(struct CUSTOM, intreqr));
89 DEFINE(C_INTENA, offsetof(struct CUSTOM, intena));
90 DEFINE(C_INTREQ, offsetof(struct CUSTOM, intreq));
91 DEFINE(C_SERDATR, offsetof(struct CUSTOM, serdatr));
92 DEFINE(C_SERDAT, offsetof(struct CUSTOM, serdat));
93 DEFINE(C_SERPER, offsetof(struct CUSTOM, serper));
94 DEFINE(CIAABASE, &ciaa);
95 DEFINE(CIABBASE, &ciab);
96 DEFINE(C_PRA, offsetof(struct CIA, pra));
97 DEFINE(ZTWOBASE, zTwoBase);
98
99 return 0;
100}
diff --git a/arch/m68k/kernel/asm-offsets_mm.c b/arch/m68k/kernel/asm-offsets_mm.c
new file mode 100644
index 000000000000..78e59b82ebc3
--- /dev/null
+++ b/arch/m68k/kernel/asm-offsets_mm.c
@@ -0,0 +1,100 @@
1/*
2 * This program is used to generate definitions needed by
3 * assembly language modules.
4 *
5 * We use the technique used in the OSF Mach kernel code:
6 * generate asm statements containing #defines,
7 * compile this file to assembler, and then extract the
8 * #defines from the assembly-language output.
9 */
10
11#define ASM_OFFSETS_C
12
13#include <linux/stddef.h>
14#include <linux/sched.h>
15#include <linux/kernel_stat.h>
16#include <linux/kbuild.h>
17#include <asm/bootinfo.h>
18#include <asm/irq.h>
19#include <asm/amigahw.h>
20#include <linux/font.h>
21
22int main(void)
23{
24 /* offsets into the task struct */
25 DEFINE(TASK_THREAD, offsetof(struct task_struct, thread));
26 DEFINE(TASK_INFO, offsetof(struct task_struct, thread.info));
27 DEFINE(TASK_MM, offsetof(struct task_struct, mm));
28#ifdef CONFIG_MMU
29 DEFINE(TASK_TINFO, offsetof(struct task_struct, thread.info));
30#endif
31
32 /* offsets into the thread struct */
33 DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
34 DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
35 DEFINE(THREAD_SR, offsetof(struct thread_struct, sr));
36 DEFINE(THREAD_FS, offsetof(struct thread_struct, fs));
37 DEFINE(THREAD_CRP, offsetof(struct thread_struct, crp));
38 DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
39 DEFINE(THREAD_FPREG, offsetof(struct thread_struct, fp));
40 DEFINE(THREAD_FPCNTL, offsetof(struct thread_struct, fpcntl));
41 DEFINE(THREAD_FPSTATE, offsetof(struct thread_struct, fpstate));
42
43 /* offsets into the thread_info struct */
44 DEFINE(TINFO_PREEMPT, offsetof(struct thread_info, preempt_count));
45 DEFINE(TINFO_FLAGS, offsetof(struct thread_info, flags));
46
47 /* offsets into the pt_regs */
48 DEFINE(PT_OFF_D0, offsetof(struct pt_regs, d0));
49 DEFINE(PT_OFF_ORIG_D0, offsetof(struct pt_regs, orig_d0));
50 DEFINE(PT_OFF_D1, offsetof(struct pt_regs, d1));
51 DEFINE(PT_OFF_D2, offsetof(struct pt_regs, d2));
52 DEFINE(PT_OFF_D3, offsetof(struct pt_regs, d3));
53 DEFINE(PT_OFF_D4, offsetof(struct pt_regs, d4));
54 DEFINE(PT_OFF_D5, offsetof(struct pt_regs, d5));
55 DEFINE(PT_OFF_A0, offsetof(struct pt_regs, a0));
56 DEFINE(PT_OFF_A1, offsetof(struct pt_regs, a1));
57 DEFINE(PT_OFF_A2, offsetof(struct pt_regs, a2));
58 DEFINE(PT_OFF_PC, offsetof(struct pt_regs, pc));
59 DEFINE(PT_OFF_SR, offsetof(struct pt_regs, sr));
60 /* bitfields are a bit difficult */
61 DEFINE(PT_OFF_FORMATVEC, offsetof(struct pt_regs, pc) + 4);
62
63 /* offsets into the irq_cpustat_t struct */
64 DEFINE(CPUSTAT_SOFTIRQ_PENDING, offsetof(irq_cpustat_t, __softirq_pending));
65
66 /* offsets into the bi_record struct */
67 DEFINE(BIR_TAG, offsetof(struct bi_record, tag));
68 DEFINE(BIR_SIZE, offsetof(struct bi_record, size));
69 DEFINE(BIR_DATA, offsetof(struct bi_record, data));
70
71 /* offsets into font_desc (drivers/video/console/font.h) */
72 DEFINE(FONT_DESC_IDX, offsetof(struct font_desc, idx));
73 DEFINE(FONT_DESC_NAME, offsetof(struct font_desc, name));
74 DEFINE(FONT_DESC_WIDTH, offsetof(struct font_desc, width));
75 DEFINE(FONT_DESC_HEIGHT, offsetof(struct font_desc, height));
76 DEFINE(FONT_DESC_DATA, offsetof(struct font_desc, data));
77 DEFINE(FONT_DESC_PREF, offsetof(struct font_desc, pref));
78
79 /* signal defines */
80 DEFINE(LSIGSEGV, SIGSEGV);
81 DEFINE(LSEGV_MAPERR, SEGV_MAPERR);
82 DEFINE(LSIGTRAP, SIGTRAP);
83 DEFINE(LTRAP_TRACE, TRAP_TRACE);
84
85 /* offsets into the custom struct */
86 DEFINE(CUSTOMBASE, &amiga_custom);
87 DEFINE(C_INTENAR, offsetof(struct CUSTOM, intenar));
88 DEFINE(C_INTREQR, offsetof(struct CUSTOM, intreqr));
89 DEFINE(C_INTENA, offsetof(struct CUSTOM, intena));
90 DEFINE(C_INTREQ, offsetof(struct CUSTOM, intreq));
91 DEFINE(C_SERDATR, offsetof(struct CUSTOM, serdatr));
92 DEFINE(C_SERDAT, offsetof(struct CUSTOM, serdat));
93 DEFINE(C_SERPER, offsetof(struct CUSTOM, serper));
94 DEFINE(CIAABASE, &ciaa);
95 DEFINE(CIABBASE, &ciab);
96 DEFINE(C_PRA, offsetof(struct CIA, pra));
97 DEFINE(ZTWOBASE, zTwoBase);
98
99 return 0;
100}
diff --git a/arch/m68knommu/kernel/asm-offsets.c b/arch/m68k/kernel/asm-offsets_no.c
index ffe02f41ad46..ffe02f41ad46 100644
--- a/arch/m68knommu/kernel/asm-offsets.c
+++ b/arch/m68k/kernel/asm-offsets_no.c
diff --git a/arch/m68k/kernel/dma.c b/arch/m68k/kernel/dma.c
index 4bbb3c2a8880..90e8cb726c8c 100644
--- a/arch/m68k/kernel/dma.c
+++ b/arch/m68k/kernel/dma.c
@@ -1,130 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * This file is subject to the terms and conditions of the GNU General Public 2#include "dma_mm.c"
3 * License. See the file COPYING in the main directory of this archive 3#else
4 * for more details. 4#include "dma_no.c"
5 */ 5#endif
6
7#undef DEBUG
8
9#include <linux/dma-mapping.h>
10#include <linux/device.h>
11#include <linux/kernel.h>
12#include <linux/scatterlist.h>
13#include <linux/slab.h>
14#include <linux/vmalloc.h>
15
16#include <asm/pgalloc.h>
17
18void *dma_alloc_coherent(struct device *dev, size_t size,
19 dma_addr_t *handle, gfp_t flag)
20{
21 struct page *page, **map;
22 pgprot_t pgprot;
23 void *addr;
24 int i, order;
25
26 pr_debug("dma_alloc_coherent: %d,%x\n", size, flag);
27
28 size = PAGE_ALIGN(size);
29 order = get_order(size);
30
31 page = alloc_pages(flag, order);
32 if (!page)
33 return NULL;
34
35 *handle = page_to_phys(page);
36 map = kmalloc(sizeof(struct page *) << order, flag & ~__GFP_DMA);
37 if (!map) {
38 __free_pages(page, order);
39 return NULL;
40 }
41 split_page(page, order);
42
43 order = 1 << order;
44 size >>= PAGE_SHIFT;
45 map[0] = page;
46 for (i = 1; i < size; i++)
47 map[i] = page + i;
48 for (; i < order; i++)
49 __free_page(page + i);
50 pgprot = __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
51 if (CPU_IS_040_OR_060)
52 pgprot_val(pgprot) |= _PAGE_GLOBAL040 | _PAGE_NOCACHE_S;
53 else
54 pgprot_val(pgprot) |= _PAGE_NOCACHE030;
55 addr = vmap(map, size, VM_MAP, pgprot);
56 kfree(map);
57
58 return addr;
59}
60EXPORT_SYMBOL(dma_alloc_coherent);
61
62void dma_free_coherent(struct device *dev, size_t size,
63 void *addr, dma_addr_t handle)
64{
65 pr_debug("dma_free_coherent: %p, %x\n", addr, handle);
66 vfree(addr);
67}
68EXPORT_SYMBOL(dma_free_coherent);
69
70void dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
71 size_t size, enum dma_data_direction dir)
72{
73 switch (dir) {
74 case DMA_TO_DEVICE:
75 cache_push(handle, size);
76 break;
77 case DMA_FROM_DEVICE:
78 cache_clear(handle, size);
79 break;
80 default:
81 if (printk_ratelimit())
82 printk("dma_sync_single_for_device: unsupported dir %u\n", dir);
83 break;
84 }
85}
86EXPORT_SYMBOL(dma_sync_single_for_device);
87
88void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
89 enum dma_data_direction dir)
90{
91 int i;
92
93 for (i = 0; i < nents; sg++, i++)
94 dma_sync_single_for_device(dev, sg->dma_address, sg->length, dir);
95}
96EXPORT_SYMBOL(dma_sync_sg_for_device);
97
98dma_addr_t dma_map_single(struct device *dev, void *addr, size_t size,
99 enum dma_data_direction dir)
100{
101 dma_addr_t handle = virt_to_bus(addr);
102
103 dma_sync_single_for_device(dev, handle, size, dir);
104 return handle;
105}
106EXPORT_SYMBOL(dma_map_single);
107
108dma_addr_t dma_map_page(struct device *dev, struct page *page,
109 unsigned long offset, size_t size,
110 enum dma_data_direction dir)
111{
112 dma_addr_t handle = page_to_phys(page) + offset;
113
114 dma_sync_single_for_device(dev, handle, size, dir);
115 return handle;
116}
117EXPORT_SYMBOL(dma_map_page);
118
119int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
120 enum dma_data_direction dir)
121{
122 int i;
123
124 for (i = 0; i < nents; sg++, i++) {
125 sg->dma_address = sg_phys(sg);
126 dma_sync_single_for_device(dev, sg->dma_address, sg->length, dir);
127 }
128 return nents;
129}
130EXPORT_SYMBOL(dma_map_sg);
diff --git a/arch/m68k/kernel/dma_mm.c b/arch/m68k/kernel/dma_mm.c
new file mode 100644
index 000000000000..4bbb3c2a8880
--- /dev/null
+++ b/arch/m68k/kernel/dma_mm.c
@@ -0,0 +1,130 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file COPYING in the main directory of this archive
4 * for more details.
5 */
6
7#undef DEBUG
8
9#include <linux/dma-mapping.h>
10#include <linux/device.h>
11#include <linux/kernel.h>
12#include <linux/scatterlist.h>
13#include <linux/slab.h>
14#include <linux/vmalloc.h>
15
16#include <asm/pgalloc.h>
17
18void *dma_alloc_coherent(struct device *dev, size_t size,
19 dma_addr_t *handle, gfp_t flag)
20{
21 struct page *page, **map;
22 pgprot_t pgprot;
23 void *addr;
24 int i, order;
25
26 pr_debug("dma_alloc_coherent: %d,%x\n", size, flag);
27
28 size = PAGE_ALIGN(size);
29 order = get_order(size);
30
31 page = alloc_pages(flag, order);
32 if (!page)
33 return NULL;
34
35 *handle = page_to_phys(page);
36 map = kmalloc(sizeof(struct page *) << order, flag & ~__GFP_DMA);
37 if (!map) {
38 __free_pages(page, order);
39 return NULL;
40 }
41 split_page(page, order);
42
43 order = 1 << order;
44 size >>= PAGE_SHIFT;
45 map[0] = page;
46 for (i = 1; i < size; i++)
47 map[i] = page + i;
48 for (; i < order; i++)
49 __free_page(page + i);
50 pgprot = __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
51 if (CPU_IS_040_OR_060)
52 pgprot_val(pgprot) |= _PAGE_GLOBAL040 | _PAGE_NOCACHE_S;
53 else
54 pgprot_val(pgprot) |= _PAGE_NOCACHE030;
55 addr = vmap(map, size, VM_MAP, pgprot);
56 kfree(map);
57
58 return addr;
59}
60EXPORT_SYMBOL(dma_alloc_coherent);
61
62void dma_free_coherent(struct device *dev, size_t size,
63 void *addr, dma_addr_t handle)
64{
65 pr_debug("dma_free_coherent: %p, %x\n", addr, handle);
66 vfree(addr);
67}
68EXPORT_SYMBOL(dma_free_coherent);
69
70void dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
71 size_t size, enum dma_data_direction dir)
72{
73 switch (dir) {
74 case DMA_TO_DEVICE:
75 cache_push(handle, size);
76 break;
77 case DMA_FROM_DEVICE:
78 cache_clear(handle, size);
79 break;
80 default:
81 if (printk_ratelimit())
82 printk("dma_sync_single_for_device: unsupported dir %u\n", dir);
83 break;
84 }
85}
86EXPORT_SYMBOL(dma_sync_single_for_device);
87
88void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
89 enum dma_data_direction dir)
90{
91 int i;
92
93 for (i = 0; i < nents; sg++, i++)
94 dma_sync_single_for_device(dev, sg->dma_address, sg->length, dir);
95}
96EXPORT_SYMBOL(dma_sync_sg_for_device);
97
98dma_addr_t dma_map_single(struct device *dev, void *addr, size_t size,
99 enum dma_data_direction dir)
100{
101 dma_addr_t handle = virt_to_bus(addr);
102
103 dma_sync_single_for_device(dev, handle, size, dir);
104 return handle;
105}
106EXPORT_SYMBOL(dma_map_single);
107
108dma_addr_t dma_map_page(struct device *dev, struct page *page,
109 unsigned long offset, size_t size,
110 enum dma_data_direction dir)
111{
112 dma_addr_t handle = page_to_phys(page) + offset;
113
114 dma_sync_single_for_device(dev, handle, size, dir);
115 return handle;
116}
117EXPORT_SYMBOL(dma_map_page);
118
119int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
120 enum dma_data_direction dir)
121{
122 int i;
123
124 for (i = 0; i < nents; sg++, i++) {
125 sg->dma_address = sg_phys(sg);
126 dma_sync_single_for_device(dev, sg->dma_address, sg->length, dir);
127 }
128 return nents;
129}
130EXPORT_SYMBOL(dma_map_sg);
diff --git a/arch/m68knommu/kernel/dma.c b/arch/m68k/kernel/dma_no.c
index fc61541aeb71..fc61541aeb71 100644
--- a/arch/m68knommu/kernel/dma.c
+++ b/arch/m68k/kernel/dma_no.c
diff --git a/arch/m68k/kernel/entry.S b/arch/m68k/kernel/entry.S
index 1559dea36e55..081cf96f243b 100644
--- a/arch/m68k/kernel/entry.S
+++ b/arch/m68k/kernel/entry.S
@@ -1,753 +1,5 @@
1/* -*- mode: asm -*- 1#ifdef CONFIG_MMU
2 * 2#include "entry_mm.S"
3 * linux/arch/m68k/kernel/entry.S 3#else
4 * 4#include "entry_no.S"
5 * Copyright (C) 1991, 1992 Linus Torvalds
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file README.legal in the main directory of this archive
9 * for more details.
10 *
11 * Linux/m68k support by Hamish Macdonald
12 *
13 * 68060 fixes by Jesper Skov
14 *
15 */
16
17/*
18 * entry.S contains the system-call and fault low-level handling routines.
19 * This also contains the timer-interrupt handler, as well as all interrupts
20 * and faults that can result in a task-switch.
21 *
22 * NOTE: This code handles signal-recognition, which happens every time
23 * after a timer-interrupt and after each system call.
24 *
25 */
26
27/*
28 * 12/03/96 Jes: Currently we only support m68k single-cpu systems, so
29 * all pointers that used to be 'current' are now entry
30 * number 0 in the 'current_set' list.
31 *
32 * 6/05/00 RZ: addedd writeback completion after return from sighandler
33 * for 68040
34 */
35
36#include <linux/linkage.h>
37#include <asm/entry.h>
38#include <asm/errno.h>
39#include <asm/setup.h>
40#include <asm/segment.h>
41#include <asm/traps.h>
42#include <asm/unistd.h>
43
44#include <asm/asm-offsets.h>
45
46.globl system_call, buserr, trap, resume
47.globl sys_call_table
48.globl sys_fork, sys_clone, sys_vfork
49.globl ret_from_interrupt, bad_interrupt
50.globl auto_irqhandler_fixup
51.globl user_irqvec_fixup, user_irqhandler_fixup
52
53.text
54ENTRY(buserr)
55 SAVE_ALL_INT
56 GET_CURRENT(%d0)
57 movel %sp,%sp@- | stack frame pointer argument
58 bsrl buserr_c
59 addql #4,%sp
60 jra .Lret_from_exception
61
62ENTRY(trap)
63 SAVE_ALL_INT
64 GET_CURRENT(%d0)
65 movel %sp,%sp@- | stack frame pointer argument
66 bsrl trap_c
67 addql #4,%sp
68 jra .Lret_from_exception
69
70 | After a fork we jump here directly from resume,
71 | so that %d1 contains the previous task
72 | schedule_tail now used regardless of CONFIG_SMP
73ENTRY(ret_from_fork)
74 movel %d1,%sp@-
75 jsr schedule_tail
76 addql #4,%sp
77 jra .Lret_from_exception
78
79do_trace_entry:
80 movel #-ENOSYS,%sp@(PT_OFF_D0)| needed for strace
81 subql #4,%sp
82 SAVE_SWITCH_STACK
83 jbsr syscall_trace
84 RESTORE_SWITCH_STACK
85 addql #4,%sp
86 movel %sp@(PT_OFF_ORIG_D0),%d0
87 cmpl #NR_syscalls,%d0
88 jcs syscall
89badsys:
90 movel #-ENOSYS,%sp@(PT_OFF_D0)
91 jra ret_from_syscall
92
93do_trace_exit:
94 subql #4,%sp
95 SAVE_SWITCH_STACK
96 jbsr syscall_trace
97 RESTORE_SWITCH_STACK
98 addql #4,%sp
99 jra .Lret_from_exception
100
101ENTRY(ret_from_signal)
102 tstb %curptr@(TASK_INFO+TINFO_FLAGS+2)
103 jge 1f
104 jbsr syscall_trace
1051: RESTORE_SWITCH_STACK
106 addql #4,%sp
107/* on 68040 complete pending writebacks if any */
108#ifdef CONFIG_M68040
109 bfextu %sp@(PT_OFF_FORMATVEC){#0,#4},%d0
110 subql #7,%d0 | bus error frame ?
111 jbne 1f
112 movel %sp,%sp@-
113 jbsr berr_040cleanup
114 addql #4,%sp
1151:
116#endif 5#endif
117 jra .Lret_from_exception
118
119ENTRY(system_call)
120 SAVE_ALL_SYS
121
122 GET_CURRENT(%d1)
123 | save top of frame
124 movel %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
125
126 | syscall trace?
127 tstb %curptr@(TASK_INFO+TINFO_FLAGS+2)
128 jmi do_trace_entry
129 cmpl #NR_syscalls,%d0
130 jcc badsys
131syscall:
132 jbsr @(sys_call_table,%d0:l:4)@(0)
133 movel %d0,%sp@(PT_OFF_D0) | save the return value
134ret_from_syscall:
135 |oriw #0x0700,%sr
136 movew %curptr@(TASK_INFO+TINFO_FLAGS+2),%d0
137 jne syscall_exit_work
1381: RESTORE_ALL
139
140syscall_exit_work:
141 btst #5,%sp@(PT_OFF_SR) | check if returning to kernel
142 bnes 1b | if so, skip resched, signals
143 lslw #1,%d0
144 jcs do_trace_exit
145 jmi do_delayed_trace
146 lslw #8,%d0
147 jmi do_signal_return
148 pea resume_userspace
149 jra schedule
150
151
152ENTRY(ret_from_exception)
153.Lret_from_exception:
154 btst #5,%sp@(PT_OFF_SR) | check if returning to kernel
155 bnes 1f | if so, skip resched, signals
156 | only allow interrupts when we are really the last one on the
157 | kernel stack, otherwise stack overflow can occur during
158 | heavy interrupt load
159 andw #ALLOWINT,%sr
160
161resume_userspace:
162 moveb %curptr@(TASK_INFO+TINFO_FLAGS+3),%d0
163 jne exit_work
1641: RESTORE_ALL
165
166exit_work:
167 | save top of frame
168 movel %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
169 lslb #1,%d0
170 jmi do_signal_return
171 pea resume_userspace
172 jra schedule
173
174
175do_signal_return:
176 |andw #ALLOWINT,%sr
177 subql #4,%sp | dummy return address
178 SAVE_SWITCH_STACK
179 pea %sp@(SWITCH_STACK_SIZE)
180 bsrl do_signal
181 addql #4,%sp
182 RESTORE_SWITCH_STACK
183 addql #4,%sp
184 jbra resume_userspace
185
186do_delayed_trace:
187 bclr #7,%sp@(PT_OFF_SR) | clear trace bit in SR
188 pea 1 | send SIGTRAP
189 movel %curptr,%sp@-
190 pea LSIGTRAP
191 jbsr send_sig
192 addql #8,%sp
193 addql #4,%sp
194 jbra resume_userspace
195
196
197/* This is the main interrupt handler for autovector interrupts */
198
199ENTRY(auto_inthandler)
200 SAVE_ALL_INT
201 GET_CURRENT(%d0)
202 addqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
203 | put exception # in d0
204 bfextu %sp@(PT_OFF_FORMATVEC){#4,#10},%d0
205 subw #VEC_SPUR,%d0
206
207 movel %sp,%sp@-
208 movel %d0,%sp@- | put vector # on stack
209auto_irqhandler_fixup = . + 2
210 jsr __m68k_handle_int | process the IRQ
211 addql #8,%sp | pop parameters off stack
212
213ret_from_interrupt:
214 subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
215 jeq ret_from_last_interrupt
2162: RESTORE_ALL
217
218 ALIGN
219ret_from_last_interrupt:
220 moveq #(~ALLOWINT>>8)&0xff,%d0
221 andb %sp@(PT_OFF_SR),%d0
222 jne 2b
223
224 /* check if we need to do software interrupts */
225 tstl irq_stat+CPUSTAT_SOFTIRQ_PENDING
226 jeq .Lret_from_exception
227 pea ret_from_exception
228 jra do_softirq
229
230/* Handler for user defined interrupt vectors */
231
232ENTRY(user_inthandler)
233 SAVE_ALL_INT
234 GET_CURRENT(%d0)
235 addqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
236 | put exception # in d0
237 bfextu %sp@(PT_OFF_FORMATVEC){#4,#10},%d0
238user_irqvec_fixup = . + 2
239 subw #VEC_USER,%d0
240
241 movel %sp,%sp@-
242 movel %d0,%sp@- | put vector # on stack
243user_irqhandler_fixup = . + 2
244 jsr __m68k_handle_int | process the IRQ
245 addql #8,%sp | pop parameters off stack
246
247 subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
248 jeq ret_from_last_interrupt
249 RESTORE_ALL
250
251/* Handler for uninitialized and spurious interrupts */
252
253ENTRY(bad_inthandler)
254 SAVE_ALL_INT
255 GET_CURRENT(%d0)
256 addqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
257
258 movel %sp,%sp@-
259 jsr handle_badint
260 addql #4,%sp
261
262 subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
263 jeq ret_from_last_interrupt
264 RESTORE_ALL
265
266
267ENTRY(sys_fork)
268 SAVE_SWITCH_STACK
269 pea %sp@(SWITCH_STACK_SIZE)
270 jbsr m68k_fork
271 addql #4,%sp
272 RESTORE_SWITCH_STACK
273 rts
274
275ENTRY(sys_clone)
276 SAVE_SWITCH_STACK
277 pea %sp@(SWITCH_STACK_SIZE)
278 jbsr m68k_clone
279 addql #4,%sp
280 RESTORE_SWITCH_STACK
281 rts
282
283ENTRY(sys_vfork)
284 SAVE_SWITCH_STACK
285 pea %sp@(SWITCH_STACK_SIZE)
286 jbsr m68k_vfork
287 addql #4,%sp
288 RESTORE_SWITCH_STACK
289 rts
290
291ENTRY(sys_sigreturn)
292 SAVE_SWITCH_STACK
293 jbsr do_sigreturn
294 RESTORE_SWITCH_STACK
295 rts
296
297ENTRY(sys_rt_sigreturn)
298 SAVE_SWITCH_STACK
299 jbsr do_rt_sigreturn
300 RESTORE_SWITCH_STACK
301 rts
302
303resume:
304 /*
305 * Beware - when entering resume, prev (the current task) is
306 * in a0, next (the new task) is in a1,so don't change these
307 * registers until their contents are no longer needed.
308 */
309
310 /* save sr */
311 movew %sr,%a0@(TASK_THREAD+THREAD_SR)
312
313 /* save fs (sfc,%dfc) (may be pointing to kernel memory) */
314 movec %sfc,%d0
315 movew %d0,%a0@(TASK_THREAD+THREAD_FS)
316
317 /* save usp */
318 /* it is better to use a movel here instead of a movew 8*) */
319 movec %usp,%d0
320 movel %d0,%a0@(TASK_THREAD+THREAD_USP)
321
322 /* save non-scratch registers on stack */
323 SAVE_SWITCH_STACK
324
325 /* save current kernel stack pointer */
326 movel %sp,%a0@(TASK_THREAD+THREAD_KSP)
327
328 /* save floating point context */
329#ifndef CONFIG_M68KFPU_EMU_ONLY
330#ifdef CONFIG_M68KFPU_EMU
331 tstl m68k_fputype
332 jeq 3f
333#endif
334 fsave %a0@(TASK_THREAD+THREAD_FPSTATE)
335
336#if defined(CONFIG_M68060)
337#if !defined(CPU_M68060_ONLY)
338 btst #3,m68k_cputype+3
339 beqs 1f
340#endif
341 /* The 060 FPU keeps status in bits 15-8 of the first longword */
342 tstb %a0@(TASK_THREAD+THREAD_FPSTATE+2)
343 jeq 3f
344#if !defined(CPU_M68060_ONLY)
345 jra 2f
346#endif
347#endif /* CONFIG_M68060 */
348#if !defined(CPU_M68060_ONLY)
3491: tstb %a0@(TASK_THREAD+THREAD_FPSTATE)
350 jeq 3f
351#endif
3522: fmovemx %fp0-%fp7,%a0@(TASK_THREAD+THREAD_FPREG)
353 fmoveml %fpcr/%fpsr/%fpiar,%a0@(TASK_THREAD+THREAD_FPCNTL)
3543:
355#endif /* CONFIG_M68KFPU_EMU_ONLY */
356 /* Return previous task in %d1 */
357 movel %curptr,%d1
358
359 /* switch to new task (a1 contains new task) */
360 movel %a1,%curptr
361
362 /* restore floating point context */
363#ifndef CONFIG_M68KFPU_EMU_ONLY
364#ifdef CONFIG_M68KFPU_EMU
365 tstl m68k_fputype
366 jeq 4f
367#endif
368#if defined(CONFIG_M68060)
369#if !defined(CPU_M68060_ONLY)
370 btst #3,m68k_cputype+3
371 beqs 1f
372#endif
373 /* The 060 FPU keeps status in bits 15-8 of the first longword */
374 tstb %a1@(TASK_THREAD+THREAD_FPSTATE+2)
375 jeq 3f
376#if !defined(CPU_M68060_ONLY)
377 jra 2f
378#endif
379#endif /* CONFIG_M68060 */
380#if !defined(CPU_M68060_ONLY)
3811: tstb %a1@(TASK_THREAD+THREAD_FPSTATE)
382 jeq 3f
383#endif
3842: fmovemx %a1@(TASK_THREAD+THREAD_FPREG),%fp0-%fp7
385 fmoveml %a1@(TASK_THREAD+THREAD_FPCNTL),%fpcr/%fpsr/%fpiar
3863: frestore %a1@(TASK_THREAD+THREAD_FPSTATE)
3874:
388#endif /* CONFIG_M68KFPU_EMU_ONLY */
389
390 /* restore the kernel stack pointer */
391 movel %a1@(TASK_THREAD+THREAD_KSP),%sp
392
393 /* restore non-scratch registers */
394 RESTORE_SWITCH_STACK
395
396 /* restore user stack pointer */
397 movel %a1@(TASK_THREAD+THREAD_USP),%a0
398 movel %a0,%usp
399
400 /* restore fs (sfc,%dfc) */
401 movew %a1@(TASK_THREAD+THREAD_FS),%a0
402 movec %a0,%sfc
403 movec %a0,%dfc
404
405 /* restore status register */
406 movew %a1@(TASK_THREAD+THREAD_SR),%sr
407
408 rts
409
410.data
411ALIGN
412sys_call_table:
413 .long sys_restart_syscall /* 0 - old "setup()" system call, used for restarting */
414 .long sys_exit
415 .long sys_fork
416 .long sys_read
417 .long sys_write
418 .long sys_open /* 5 */
419 .long sys_close
420 .long sys_waitpid
421 .long sys_creat
422 .long sys_link
423 .long sys_unlink /* 10 */
424 .long sys_execve
425 .long sys_chdir
426 .long sys_time
427 .long sys_mknod
428 .long sys_chmod /* 15 */
429 .long sys_chown16
430 .long sys_ni_syscall /* old break syscall holder */
431 .long sys_stat
432 .long sys_lseek
433 .long sys_getpid /* 20 */
434 .long sys_mount
435 .long sys_oldumount
436 .long sys_setuid16
437 .long sys_getuid16
438 .long sys_stime /* 25 */
439 .long sys_ptrace
440 .long sys_alarm
441 .long sys_fstat
442 .long sys_pause
443 .long sys_utime /* 30 */
444 .long sys_ni_syscall /* old stty syscall holder */
445 .long sys_ni_syscall /* old gtty syscall holder */
446 .long sys_access
447 .long sys_nice
448 .long sys_ni_syscall /* 35 */ /* old ftime syscall holder */
449 .long sys_sync
450 .long sys_kill
451 .long sys_rename
452 .long sys_mkdir
453 .long sys_rmdir /* 40 */
454 .long sys_dup
455 .long sys_pipe
456 .long sys_times
457 .long sys_ni_syscall /* old prof syscall holder */
458 .long sys_brk /* 45 */
459 .long sys_setgid16
460 .long sys_getgid16
461 .long sys_signal
462 .long sys_geteuid16
463 .long sys_getegid16 /* 50 */
464 .long sys_acct
465 .long sys_umount /* recycled never used phys() */
466 .long sys_ni_syscall /* old lock syscall holder */
467 .long sys_ioctl
468 .long sys_fcntl /* 55 */
469 .long sys_ni_syscall /* old mpx syscall holder */
470 .long sys_setpgid
471 .long sys_ni_syscall /* old ulimit syscall holder */
472 .long sys_ni_syscall
473 .long sys_umask /* 60 */
474 .long sys_chroot
475 .long sys_ustat
476 .long sys_dup2
477 .long sys_getppid
478 .long sys_getpgrp /* 65 */
479 .long sys_setsid
480 .long sys_sigaction
481 .long sys_sgetmask
482 .long sys_ssetmask
483 .long sys_setreuid16 /* 70 */
484 .long sys_setregid16
485 .long sys_sigsuspend
486 .long sys_sigpending
487 .long sys_sethostname
488 .long sys_setrlimit /* 75 */
489 .long sys_old_getrlimit
490 .long sys_getrusage
491 .long sys_gettimeofday
492 .long sys_settimeofday
493 .long sys_getgroups16 /* 80 */
494 .long sys_setgroups16
495 .long sys_old_select
496 .long sys_symlink
497 .long sys_lstat
498 .long sys_readlink /* 85 */
499 .long sys_uselib
500 .long sys_swapon
501 .long sys_reboot
502 .long sys_old_readdir
503 .long sys_old_mmap /* 90 */
504 .long sys_munmap
505 .long sys_truncate
506 .long sys_ftruncate
507 .long sys_fchmod
508 .long sys_fchown16 /* 95 */
509 .long sys_getpriority
510 .long sys_setpriority
511 .long sys_ni_syscall /* old profil syscall holder */
512 .long sys_statfs
513 .long sys_fstatfs /* 100 */
514 .long sys_ni_syscall /* ioperm for i386 */
515 .long sys_socketcall
516 .long sys_syslog
517 .long sys_setitimer
518 .long sys_getitimer /* 105 */
519 .long sys_newstat
520 .long sys_newlstat
521 .long sys_newfstat
522 .long sys_ni_syscall
523 .long sys_ni_syscall /* 110 */ /* iopl for i386 */
524 .long sys_vhangup
525 .long sys_ni_syscall /* obsolete idle() syscall */
526 .long sys_ni_syscall /* vm86old for i386 */
527 .long sys_wait4
528 .long sys_swapoff /* 115 */
529 .long sys_sysinfo
530 .long sys_ipc
531 .long sys_fsync
532 .long sys_sigreturn
533 .long sys_clone /* 120 */
534 .long sys_setdomainname
535 .long sys_newuname
536 .long sys_cacheflush /* modify_ldt for i386 */
537 .long sys_adjtimex
538 .long sys_mprotect /* 125 */
539 .long sys_sigprocmask
540 .long sys_ni_syscall /* old "create_module" */
541 .long sys_init_module
542 .long sys_delete_module
543 .long sys_ni_syscall /* 130 - old "get_kernel_syms" */
544 .long sys_quotactl
545 .long sys_getpgid
546 .long sys_fchdir
547 .long sys_bdflush
548 .long sys_sysfs /* 135 */
549 .long sys_personality
550 .long sys_ni_syscall /* for afs_syscall */
551 .long sys_setfsuid16
552 .long sys_setfsgid16
553 .long sys_llseek /* 140 */
554 .long sys_getdents
555 .long sys_select
556 .long sys_flock
557 .long sys_msync
558 .long sys_readv /* 145 */
559 .long sys_writev
560 .long sys_getsid
561 .long sys_fdatasync
562 .long sys_sysctl
563 .long sys_mlock /* 150 */
564 .long sys_munlock
565 .long sys_mlockall
566 .long sys_munlockall
567 .long sys_sched_setparam
568 .long sys_sched_getparam /* 155 */
569 .long sys_sched_setscheduler
570 .long sys_sched_getscheduler
571 .long sys_sched_yield
572 .long sys_sched_get_priority_max
573 .long sys_sched_get_priority_min /* 160 */
574 .long sys_sched_rr_get_interval
575 .long sys_nanosleep
576 .long sys_mremap
577 .long sys_setresuid16
578 .long sys_getresuid16 /* 165 */
579 .long sys_getpagesize
580 .long sys_ni_syscall /* old sys_query_module */
581 .long sys_poll
582 .long sys_nfsservctl
583 .long sys_setresgid16 /* 170 */
584 .long sys_getresgid16
585 .long sys_prctl
586 .long sys_rt_sigreturn
587 .long sys_rt_sigaction
588 .long sys_rt_sigprocmask /* 175 */
589 .long sys_rt_sigpending
590 .long sys_rt_sigtimedwait
591 .long sys_rt_sigqueueinfo
592 .long sys_rt_sigsuspend
593 .long sys_pread64 /* 180 */
594 .long sys_pwrite64
595 .long sys_lchown16;
596 .long sys_getcwd
597 .long sys_capget
598 .long sys_capset /* 185 */
599 .long sys_sigaltstack
600 .long sys_sendfile
601 .long sys_ni_syscall /* streams1 */
602 .long sys_ni_syscall /* streams2 */
603 .long sys_vfork /* 190 */
604 .long sys_getrlimit
605 .long sys_mmap2
606 .long sys_truncate64
607 .long sys_ftruncate64
608 .long sys_stat64 /* 195 */
609 .long sys_lstat64
610 .long sys_fstat64
611 .long sys_chown
612 .long sys_getuid
613 .long sys_getgid /* 200 */
614 .long sys_geteuid
615 .long sys_getegid
616 .long sys_setreuid
617 .long sys_setregid
618 .long sys_getgroups /* 205 */
619 .long sys_setgroups
620 .long sys_fchown
621 .long sys_setresuid
622 .long sys_getresuid
623 .long sys_setresgid /* 210 */
624 .long sys_getresgid
625 .long sys_lchown
626 .long sys_setuid
627 .long sys_setgid
628 .long sys_setfsuid /* 215 */
629 .long sys_setfsgid
630 .long sys_pivot_root
631 .long sys_ni_syscall
632 .long sys_ni_syscall
633 .long sys_getdents64 /* 220 */
634 .long sys_gettid
635 .long sys_tkill
636 .long sys_setxattr
637 .long sys_lsetxattr
638 .long sys_fsetxattr /* 225 */
639 .long sys_getxattr
640 .long sys_lgetxattr
641 .long sys_fgetxattr
642 .long sys_listxattr
643 .long sys_llistxattr /* 230 */
644 .long sys_flistxattr
645 .long sys_removexattr
646 .long sys_lremovexattr
647 .long sys_fremovexattr
648 .long sys_futex /* 235 */
649 .long sys_sendfile64
650 .long sys_mincore
651 .long sys_madvise
652 .long sys_fcntl64
653 .long sys_readahead /* 240 */
654 .long sys_io_setup
655 .long sys_io_destroy
656 .long sys_io_getevents
657 .long sys_io_submit
658 .long sys_io_cancel /* 245 */
659 .long sys_fadvise64
660 .long sys_exit_group
661 .long sys_lookup_dcookie
662 .long sys_epoll_create
663 .long sys_epoll_ctl /* 250 */
664 .long sys_epoll_wait
665 .long sys_remap_file_pages
666 .long sys_set_tid_address
667 .long sys_timer_create
668 .long sys_timer_settime /* 255 */
669 .long sys_timer_gettime
670 .long sys_timer_getoverrun
671 .long sys_timer_delete
672 .long sys_clock_settime
673 .long sys_clock_gettime /* 260 */
674 .long sys_clock_getres
675 .long sys_clock_nanosleep
676 .long sys_statfs64
677 .long sys_fstatfs64
678 .long sys_tgkill /* 265 */
679 .long sys_utimes
680 .long sys_fadvise64_64
681 .long sys_mbind
682 .long sys_get_mempolicy
683 .long sys_set_mempolicy /* 270 */
684 .long sys_mq_open
685 .long sys_mq_unlink
686 .long sys_mq_timedsend
687 .long sys_mq_timedreceive
688 .long sys_mq_notify /* 275 */
689 .long sys_mq_getsetattr
690 .long sys_waitid
691 .long sys_ni_syscall /* for sys_vserver */
692 .long sys_add_key
693 .long sys_request_key /* 280 */
694 .long sys_keyctl
695 .long sys_ioprio_set
696 .long sys_ioprio_get
697 .long sys_inotify_init
698 .long sys_inotify_add_watch /* 285 */
699 .long sys_inotify_rm_watch
700 .long sys_migrate_pages
701 .long sys_openat
702 .long sys_mkdirat
703 .long sys_mknodat /* 290 */
704 .long sys_fchownat
705 .long sys_futimesat
706 .long sys_fstatat64
707 .long sys_unlinkat
708 .long sys_renameat /* 295 */
709 .long sys_linkat
710 .long sys_symlinkat
711 .long sys_readlinkat
712 .long sys_fchmodat
713 .long sys_faccessat /* 300 */
714 .long sys_ni_syscall /* Reserved for pselect6 */
715 .long sys_ni_syscall /* Reserved for ppoll */
716 .long sys_unshare
717 .long sys_set_robust_list
718 .long sys_get_robust_list /* 305 */
719 .long sys_splice
720 .long sys_sync_file_range
721 .long sys_tee
722 .long sys_vmsplice
723 .long sys_move_pages /* 310 */
724 .long sys_sched_setaffinity
725 .long sys_sched_getaffinity
726 .long sys_kexec_load
727 .long sys_getcpu
728 .long sys_epoll_pwait /* 315 */
729 .long sys_utimensat
730 .long sys_signalfd
731 .long sys_timerfd_create
732 .long sys_eventfd
733 .long sys_fallocate /* 320 */
734 .long sys_timerfd_settime
735 .long sys_timerfd_gettime
736 .long sys_signalfd4
737 .long sys_eventfd2
738 .long sys_epoll_create1 /* 325 */
739 .long sys_dup3
740 .long sys_pipe2
741 .long sys_inotify_init1
742 .long sys_preadv
743 .long sys_pwritev /* 330 */
744 .long sys_rt_tgsigqueueinfo
745 .long sys_perf_event_open
746 .long sys_get_thread_area
747 .long sys_set_thread_area
748 .long sys_atomic_cmpxchg_32 /* 335 */
749 .long sys_atomic_barrier
750 .long sys_fanotify_init
751 .long sys_fanotify_mark
752 .long sys_prlimit64
753
diff --git a/arch/m68k/kernel/entry_mm.S b/arch/m68k/kernel/entry_mm.S
new file mode 100644
index 000000000000..1559dea36e55
--- /dev/null
+++ b/arch/m68k/kernel/entry_mm.S
@@ -0,0 +1,753 @@
1/* -*- mode: asm -*-
2 *
3 * linux/arch/m68k/kernel/entry.S
4 *
5 * Copyright (C) 1991, 1992 Linus Torvalds
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file README.legal in the main directory of this archive
9 * for more details.
10 *
11 * Linux/m68k support by Hamish Macdonald
12 *
13 * 68060 fixes by Jesper Skov
14 *
15 */
16
17/*
18 * entry.S contains the system-call and fault low-level handling routines.
19 * This also contains the timer-interrupt handler, as well as all interrupts
20 * and faults that can result in a task-switch.
21 *
22 * NOTE: This code handles signal-recognition, which happens every time
23 * after a timer-interrupt and after each system call.
24 *
25 */
26
27/*
28 * 12/03/96 Jes: Currently we only support m68k single-cpu systems, so
29 * all pointers that used to be 'current' are now entry
30 * number 0 in the 'current_set' list.
31 *
32 * 6/05/00 RZ: addedd writeback completion after return from sighandler
33 * for 68040
34 */
35
36#include <linux/linkage.h>
37#include <asm/entry.h>
38#include <asm/errno.h>
39#include <asm/setup.h>
40#include <asm/segment.h>
41#include <asm/traps.h>
42#include <asm/unistd.h>
43
44#include <asm/asm-offsets.h>
45
46.globl system_call, buserr, trap, resume
47.globl sys_call_table
48.globl sys_fork, sys_clone, sys_vfork
49.globl ret_from_interrupt, bad_interrupt
50.globl auto_irqhandler_fixup
51.globl user_irqvec_fixup, user_irqhandler_fixup
52
53.text
54ENTRY(buserr)
55 SAVE_ALL_INT
56 GET_CURRENT(%d0)
57 movel %sp,%sp@- | stack frame pointer argument
58 bsrl buserr_c
59 addql #4,%sp
60 jra .Lret_from_exception
61
62ENTRY(trap)
63 SAVE_ALL_INT
64 GET_CURRENT(%d0)
65 movel %sp,%sp@- | stack frame pointer argument
66 bsrl trap_c
67 addql #4,%sp
68 jra .Lret_from_exception
69
70 | After a fork we jump here directly from resume,
71 | so that %d1 contains the previous task
72 | schedule_tail now used regardless of CONFIG_SMP
73ENTRY(ret_from_fork)
74 movel %d1,%sp@-
75 jsr schedule_tail
76 addql #4,%sp
77 jra .Lret_from_exception
78
79do_trace_entry:
80 movel #-ENOSYS,%sp@(PT_OFF_D0)| needed for strace
81 subql #4,%sp
82 SAVE_SWITCH_STACK
83 jbsr syscall_trace
84 RESTORE_SWITCH_STACK
85 addql #4,%sp
86 movel %sp@(PT_OFF_ORIG_D0),%d0
87 cmpl #NR_syscalls,%d0
88 jcs syscall
89badsys:
90 movel #-ENOSYS,%sp@(PT_OFF_D0)
91 jra ret_from_syscall
92
93do_trace_exit:
94 subql #4,%sp
95 SAVE_SWITCH_STACK
96 jbsr syscall_trace
97 RESTORE_SWITCH_STACK
98 addql #4,%sp
99 jra .Lret_from_exception
100
101ENTRY(ret_from_signal)
102 tstb %curptr@(TASK_INFO+TINFO_FLAGS+2)
103 jge 1f
104 jbsr syscall_trace
1051: RESTORE_SWITCH_STACK
106 addql #4,%sp
107/* on 68040 complete pending writebacks if any */
108#ifdef CONFIG_M68040
109 bfextu %sp@(PT_OFF_FORMATVEC){#0,#4},%d0
110 subql #7,%d0 | bus error frame ?
111 jbne 1f
112 movel %sp,%sp@-
113 jbsr berr_040cleanup
114 addql #4,%sp
1151:
116#endif
117 jra .Lret_from_exception
118
119ENTRY(system_call)
120 SAVE_ALL_SYS
121
122 GET_CURRENT(%d1)
123 | save top of frame
124 movel %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
125
126 | syscall trace?
127 tstb %curptr@(TASK_INFO+TINFO_FLAGS+2)
128 jmi do_trace_entry
129 cmpl #NR_syscalls,%d0
130 jcc badsys
131syscall:
132 jbsr @(sys_call_table,%d0:l:4)@(0)
133 movel %d0,%sp@(PT_OFF_D0) | save the return value
134ret_from_syscall:
135 |oriw #0x0700,%sr
136 movew %curptr@(TASK_INFO+TINFO_FLAGS+2),%d0
137 jne syscall_exit_work
1381: RESTORE_ALL
139
140syscall_exit_work:
141 btst #5,%sp@(PT_OFF_SR) | check if returning to kernel
142 bnes 1b | if so, skip resched, signals
143 lslw #1,%d0
144 jcs do_trace_exit
145 jmi do_delayed_trace
146 lslw #8,%d0
147 jmi do_signal_return
148 pea resume_userspace
149 jra schedule
150
151
152ENTRY(ret_from_exception)
153.Lret_from_exception:
154 btst #5,%sp@(PT_OFF_SR) | check if returning to kernel
155 bnes 1f | if so, skip resched, signals
156 | only allow interrupts when we are really the last one on the
157 | kernel stack, otherwise stack overflow can occur during
158 | heavy interrupt load
159 andw #ALLOWINT,%sr
160
161resume_userspace:
162 moveb %curptr@(TASK_INFO+TINFO_FLAGS+3),%d0
163 jne exit_work
1641: RESTORE_ALL
165
166exit_work:
167 | save top of frame
168 movel %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
169 lslb #1,%d0
170 jmi do_signal_return
171 pea resume_userspace
172 jra schedule
173
174
175do_signal_return:
176 |andw #ALLOWINT,%sr
177 subql #4,%sp | dummy return address
178 SAVE_SWITCH_STACK
179 pea %sp@(SWITCH_STACK_SIZE)
180 bsrl do_signal
181 addql #4,%sp
182 RESTORE_SWITCH_STACK
183 addql #4,%sp
184 jbra resume_userspace
185
186do_delayed_trace:
187 bclr #7,%sp@(PT_OFF_SR) | clear trace bit in SR
188 pea 1 | send SIGTRAP
189 movel %curptr,%sp@-
190 pea LSIGTRAP
191 jbsr send_sig
192 addql #8,%sp
193 addql #4,%sp
194 jbra resume_userspace
195
196
197/* This is the main interrupt handler for autovector interrupts */
198
199ENTRY(auto_inthandler)
200 SAVE_ALL_INT
201 GET_CURRENT(%d0)
202 addqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
203 | put exception # in d0
204 bfextu %sp@(PT_OFF_FORMATVEC){#4,#10},%d0
205 subw #VEC_SPUR,%d0
206
207 movel %sp,%sp@-
208 movel %d0,%sp@- | put vector # on stack
209auto_irqhandler_fixup = . + 2
210 jsr __m68k_handle_int | process the IRQ
211 addql #8,%sp | pop parameters off stack
212
213ret_from_interrupt:
214 subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
215 jeq ret_from_last_interrupt
2162: RESTORE_ALL
217
218 ALIGN
219ret_from_last_interrupt:
220 moveq #(~ALLOWINT>>8)&0xff,%d0
221 andb %sp@(PT_OFF_SR),%d0
222 jne 2b
223
224 /* check if we need to do software interrupts */
225 tstl irq_stat+CPUSTAT_SOFTIRQ_PENDING
226 jeq .Lret_from_exception
227 pea ret_from_exception
228 jra do_softirq
229
230/* Handler for user defined interrupt vectors */
231
232ENTRY(user_inthandler)
233 SAVE_ALL_INT
234 GET_CURRENT(%d0)
235 addqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
236 | put exception # in d0
237 bfextu %sp@(PT_OFF_FORMATVEC){#4,#10},%d0
238user_irqvec_fixup = . + 2
239 subw #VEC_USER,%d0
240
241 movel %sp,%sp@-
242 movel %d0,%sp@- | put vector # on stack
243user_irqhandler_fixup = . + 2
244 jsr __m68k_handle_int | process the IRQ
245 addql #8,%sp | pop parameters off stack
246
247 subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
248 jeq ret_from_last_interrupt
249 RESTORE_ALL
250
251/* Handler for uninitialized and spurious interrupts */
252
253ENTRY(bad_inthandler)
254 SAVE_ALL_INT
255 GET_CURRENT(%d0)
256 addqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
257
258 movel %sp,%sp@-
259 jsr handle_badint
260 addql #4,%sp
261
262 subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
263 jeq ret_from_last_interrupt
264 RESTORE_ALL
265
266
267ENTRY(sys_fork)
268 SAVE_SWITCH_STACK
269 pea %sp@(SWITCH_STACK_SIZE)
270 jbsr m68k_fork
271 addql #4,%sp
272 RESTORE_SWITCH_STACK
273 rts
274
275ENTRY(sys_clone)
276 SAVE_SWITCH_STACK
277 pea %sp@(SWITCH_STACK_SIZE)
278 jbsr m68k_clone
279 addql #4,%sp
280 RESTORE_SWITCH_STACK
281 rts
282
283ENTRY(sys_vfork)
284 SAVE_SWITCH_STACK
285 pea %sp@(SWITCH_STACK_SIZE)
286 jbsr m68k_vfork
287 addql #4,%sp
288 RESTORE_SWITCH_STACK
289 rts
290
291ENTRY(sys_sigreturn)
292 SAVE_SWITCH_STACK
293 jbsr do_sigreturn
294 RESTORE_SWITCH_STACK
295 rts
296
297ENTRY(sys_rt_sigreturn)
298 SAVE_SWITCH_STACK
299 jbsr do_rt_sigreturn
300 RESTORE_SWITCH_STACK
301 rts
302
303resume:
304 /*
305 * Beware - when entering resume, prev (the current task) is
306 * in a0, next (the new task) is in a1,so don't change these
307 * registers until their contents are no longer needed.
308 */
309
310 /* save sr */
311 movew %sr,%a0@(TASK_THREAD+THREAD_SR)
312
313 /* save fs (sfc,%dfc) (may be pointing to kernel memory) */
314 movec %sfc,%d0
315 movew %d0,%a0@(TASK_THREAD+THREAD_FS)
316
317 /* save usp */
318 /* it is better to use a movel here instead of a movew 8*) */
319 movec %usp,%d0
320 movel %d0,%a0@(TASK_THREAD+THREAD_USP)
321
322 /* save non-scratch registers on stack */
323 SAVE_SWITCH_STACK
324
325 /* save current kernel stack pointer */
326 movel %sp,%a0@(TASK_THREAD+THREAD_KSP)
327
328 /* save floating point context */
329#ifndef CONFIG_M68KFPU_EMU_ONLY
330#ifdef CONFIG_M68KFPU_EMU
331 tstl m68k_fputype
332 jeq 3f
333#endif
334 fsave %a0@(TASK_THREAD+THREAD_FPSTATE)
335
336#if defined(CONFIG_M68060)
337#if !defined(CPU_M68060_ONLY)
338 btst #3,m68k_cputype+3
339 beqs 1f
340#endif
341 /* The 060 FPU keeps status in bits 15-8 of the first longword */
342 tstb %a0@(TASK_THREAD+THREAD_FPSTATE+2)
343 jeq 3f
344#if !defined(CPU_M68060_ONLY)
345 jra 2f
346#endif
347#endif /* CONFIG_M68060 */
348#if !defined(CPU_M68060_ONLY)
3491: tstb %a0@(TASK_THREAD+THREAD_FPSTATE)
350 jeq 3f
351#endif
3522: fmovemx %fp0-%fp7,%a0@(TASK_THREAD+THREAD_FPREG)
353 fmoveml %fpcr/%fpsr/%fpiar,%a0@(TASK_THREAD+THREAD_FPCNTL)
3543:
355#endif /* CONFIG_M68KFPU_EMU_ONLY */
356 /* Return previous task in %d1 */
357 movel %curptr,%d1
358
359 /* switch to new task (a1 contains new task) */
360 movel %a1,%curptr
361
362 /* restore floating point context */
363#ifndef CONFIG_M68KFPU_EMU_ONLY
364#ifdef CONFIG_M68KFPU_EMU
365 tstl m68k_fputype
366 jeq 4f
367#endif
368#if defined(CONFIG_M68060)
369#if !defined(CPU_M68060_ONLY)
370 btst #3,m68k_cputype+3
371 beqs 1f
372#endif
373 /* The 060 FPU keeps status in bits 15-8 of the first longword */
374 tstb %a1@(TASK_THREAD+THREAD_FPSTATE+2)
375 jeq 3f
376#if !defined(CPU_M68060_ONLY)
377 jra 2f
378#endif
379#endif /* CONFIG_M68060 */
380#if !defined(CPU_M68060_ONLY)
3811: tstb %a1@(TASK_THREAD+THREAD_FPSTATE)
382 jeq 3f
383#endif
3842: fmovemx %a1@(TASK_THREAD+THREAD_FPREG),%fp0-%fp7
385 fmoveml %a1@(TASK_THREAD+THREAD_FPCNTL),%fpcr/%fpsr/%fpiar
3863: frestore %a1@(TASK_THREAD+THREAD_FPSTATE)
3874:
388#endif /* CONFIG_M68KFPU_EMU_ONLY */
389
390 /* restore the kernel stack pointer */
391 movel %a1@(TASK_THREAD+THREAD_KSP),%sp
392
393 /* restore non-scratch registers */
394 RESTORE_SWITCH_STACK
395
396 /* restore user stack pointer */
397 movel %a1@(TASK_THREAD+THREAD_USP),%a0
398 movel %a0,%usp
399
400 /* restore fs (sfc,%dfc) */
401 movew %a1@(TASK_THREAD+THREAD_FS),%a0
402 movec %a0,%sfc
403 movec %a0,%dfc
404
405 /* restore status register */
406 movew %a1@(TASK_THREAD+THREAD_SR),%sr
407
408 rts
409
410.data
411ALIGN
412sys_call_table:
413 .long sys_restart_syscall /* 0 - old "setup()" system call, used for restarting */
414 .long sys_exit
415 .long sys_fork
416 .long sys_read
417 .long sys_write
418 .long sys_open /* 5 */
419 .long sys_close
420 .long sys_waitpid
421 .long sys_creat
422 .long sys_link
423 .long sys_unlink /* 10 */
424 .long sys_execve
425 .long sys_chdir
426 .long sys_time
427 .long sys_mknod
428 .long sys_chmod /* 15 */
429 .long sys_chown16
430 .long sys_ni_syscall /* old break syscall holder */
431 .long sys_stat
432 .long sys_lseek
433 .long sys_getpid /* 20 */
434 .long sys_mount
435 .long sys_oldumount
436 .long sys_setuid16
437 .long sys_getuid16
438 .long sys_stime /* 25 */
439 .long sys_ptrace
440 .long sys_alarm
441 .long sys_fstat
442 .long sys_pause
443 .long sys_utime /* 30 */
444 .long sys_ni_syscall /* old stty syscall holder */
445 .long sys_ni_syscall /* old gtty syscall holder */
446 .long sys_access
447 .long sys_nice
448 .long sys_ni_syscall /* 35 */ /* old ftime syscall holder */
449 .long sys_sync
450 .long sys_kill
451 .long sys_rename
452 .long sys_mkdir
453 .long sys_rmdir /* 40 */
454 .long sys_dup
455 .long sys_pipe
456 .long sys_times
457 .long sys_ni_syscall /* old prof syscall holder */
458 .long sys_brk /* 45 */
459 .long sys_setgid16
460 .long sys_getgid16
461 .long sys_signal
462 .long sys_geteuid16
463 .long sys_getegid16 /* 50 */
464 .long sys_acct
465 .long sys_umount /* recycled never used phys() */
466 .long sys_ni_syscall /* old lock syscall holder */
467 .long sys_ioctl
468 .long sys_fcntl /* 55 */
469 .long sys_ni_syscall /* old mpx syscall holder */
470 .long sys_setpgid
471 .long sys_ni_syscall /* old ulimit syscall holder */
472 .long sys_ni_syscall
473 .long sys_umask /* 60 */
474 .long sys_chroot
475 .long sys_ustat
476 .long sys_dup2
477 .long sys_getppid
478 .long sys_getpgrp /* 65 */
479 .long sys_setsid
480 .long sys_sigaction
481 .long sys_sgetmask
482 .long sys_ssetmask
483 .long sys_setreuid16 /* 70 */
484 .long sys_setregid16
485 .long sys_sigsuspend
486 .long sys_sigpending
487 .long sys_sethostname
488 .long sys_setrlimit /* 75 */
489 .long sys_old_getrlimit
490 .long sys_getrusage
491 .long sys_gettimeofday
492 .long sys_settimeofday
493 .long sys_getgroups16 /* 80 */
494 .long sys_setgroups16
495 .long sys_old_select
496 .long sys_symlink
497 .long sys_lstat
498 .long sys_readlink /* 85 */
499 .long sys_uselib
500 .long sys_swapon
501 .long sys_reboot
502 .long sys_old_readdir
503 .long sys_old_mmap /* 90 */
504 .long sys_munmap
505 .long sys_truncate
506 .long sys_ftruncate
507 .long sys_fchmod
508 .long sys_fchown16 /* 95 */
509 .long sys_getpriority
510 .long sys_setpriority
511 .long sys_ni_syscall /* old profil syscall holder */
512 .long sys_statfs
513 .long sys_fstatfs /* 100 */
514 .long sys_ni_syscall /* ioperm for i386 */
515 .long sys_socketcall
516 .long sys_syslog
517 .long sys_setitimer
518 .long sys_getitimer /* 105 */
519 .long sys_newstat
520 .long sys_newlstat
521 .long sys_newfstat
522 .long sys_ni_syscall
523 .long sys_ni_syscall /* 110 */ /* iopl for i386 */
524 .long sys_vhangup
525 .long sys_ni_syscall /* obsolete idle() syscall */
526 .long sys_ni_syscall /* vm86old for i386 */
527 .long sys_wait4
528 .long sys_swapoff /* 115 */
529 .long sys_sysinfo
530 .long sys_ipc
531 .long sys_fsync
532 .long sys_sigreturn
533 .long sys_clone /* 120 */
534 .long sys_setdomainname
535 .long sys_newuname
536 .long sys_cacheflush /* modify_ldt for i386 */
537 .long sys_adjtimex
538 .long sys_mprotect /* 125 */
539 .long sys_sigprocmask
540 .long sys_ni_syscall /* old "create_module" */
541 .long sys_init_module
542 .long sys_delete_module
543 .long sys_ni_syscall /* 130 - old "get_kernel_syms" */
544 .long sys_quotactl
545 .long sys_getpgid
546 .long sys_fchdir
547 .long sys_bdflush
548 .long sys_sysfs /* 135 */
549 .long sys_personality
550 .long sys_ni_syscall /* for afs_syscall */
551 .long sys_setfsuid16
552 .long sys_setfsgid16
553 .long sys_llseek /* 140 */
554 .long sys_getdents
555 .long sys_select
556 .long sys_flock
557 .long sys_msync
558 .long sys_readv /* 145 */
559 .long sys_writev
560 .long sys_getsid
561 .long sys_fdatasync
562 .long sys_sysctl
563 .long sys_mlock /* 150 */
564 .long sys_munlock
565 .long sys_mlockall
566 .long sys_munlockall
567 .long sys_sched_setparam
568 .long sys_sched_getparam /* 155 */
569 .long sys_sched_setscheduler
570 .long sys_sched_getscheduler
571 .long sys_sched_yield
572 .long sys_sched_get_priority_max
573 .long sys_sched_get_priority_min /* 160 */
574 .long sys_sched_rr_get_interval
575 .long sys_nanosleep
576 .long sys_mremap
577 .long sys_setresuid16
578 .long sys_getresuid16 /* 165 */
579 .long sys_getpagesize
580 .long sys_ni_syscall /* old sys_query_module */
581 .long sys_poll
582 .long sys_nfsservctl
583 .long sys_setresgid16 /* 170 */
584 .long sys_getresgid16
585 .long sys_prctl
586 .long sys_rt_sigreturn
587 .long sys_rt_sigaction
588 .long sys_rt_sigprocmask /* 175 */
589 .long sys_rt_sigpending
590 .long sys_rt_sigtimedwait
591 .long sys_rt_sigqueueinfo
592 .long sys_rt_sigsuspend
593 .long sys_pread64 /* 180 */
594 .long sys_pwrite64
595 .long sys_lchown16;
596 .long sys_getcwd
597 .long sys_capget
598 .long sys_capset /* 185 */
599 .long sys_sigaltstack
600 .long sys_sendfile
601 .long sys_ni_syscall /* streams1 */
602 .long sys_ni_syscall /* streams2 */
603 .long sys_vfork /* 190 */
604 .long sys_getrlimit
605 .long sys_mmap2
606 .long sys_truncate64
607 .long sys_ftruncate64
608 .long sys_stat64 /* 195 */
609 .long sys_lstat64
610 .long sys_fstat64
611 .long sys_chown
612 .long sys_getuid
613 .long sys_getgid /* 200 */
614 .long sys_geteuid
615 .long sys_getegid
616 .long sys_setreuid
617 .long sys_setregid
618 .long sys_getgroups /* 205 */
619 .long sys_setgroups
620 .long sys_fchown
621 .long sys_setresuid
622 .long sys_getresuid
623 .long sys_setresgid /* 210 */
624 .long sys_getresgid
625 .long sys_lchown
626 .long sys_setuid
627 .long sys_setgid
628 .long sys_setfsuid /* 215 */
629 .long sys_setfsgid
630 .long sys_pivot_root
631 .long sys_ni_syscall
632 .long sys_ni_syscall
633 .long sys_getdents64 /* 220 */
634 .long sys_gettid
635 .long sys_tkill
636 .long sys_setxattr
637 .long sys_lsetxattr
638 .long sys_fsetxattr /* 225 */
639 .long sys_getxattr
640 .long sys_lgetxattr
641 .long sys_fgetxattr
642 .long sys_listxattr
643 .long sys_llistxattr /* 230 */
644 .long sys_flistxattr
645 .long sys_removexattr
646 .long sys_lremovexattr
647 .long sys_fremovexattr
648 .long sys_futex /* 235 */
649 .long sys_sendfile64
650 .long sys_mincore
651 .long sys_madvise
652 .long sys_fcntl64
653 .long sys_readahead /* 240 */
654 .long sys_io_setup
655 .long sys_io_destroy
656 .long sys_io_getevents
657 .long sys_io_submit
658 .long sys_io_cancel /* 245 */
659 .long sys_fadvise64
660 .long sys_exit_group
661 .long sys_lookup_dcookie
662 .long sys_epoll_create
663 .long sys_epoll_ctl /* 250 */
664 .long sys_epoll_wait
665 .long sys_remap_file_pages
666 .long sys_set_tid_address
667 .long sys_timer_create
668 .long sys_timer_settime /* 255 */
669 .long sys_timer_gettime
670 .long sys_timer_getoverrun
671 .long sys_timer_delete
672 .long sys_clock_settime
673 .long sys_clock_gettime /* 260 */
674 .long sys_clock_getres
675 .long sys_clock_nanosleep
676 .long sys_statfs64
677 .long sys_fstatfs64
678 .long sys_tgkill /* 265 */
679 .long sys_utimes
680 .long sys_fadvise64_64
681 .long sys_mbind
682 .long sys_get_mempolicy
683 .long sys_set_mempolicy /* 270 */
684 .long sys_mq_open
685 .long sys_mq_unlink
686 .long sys_mq_timedsend
687 .long sys_mq_timedreceive
688 .long sys_mq_notify /* 275 */
689 .long sys_mq_getsetattr
690 .long sys_waitid
691 .long sys_ni_syscall /* for sys_vserver */
692 .long sys_add_key
693 .long sys_request_key /* 280 */
694 .long sys_keyctl
695 .long sys_ioprio_set
696 .long sys_ioprio_get
697 .long sys_inotify_init
698 .long sys_inotify_add_watch /* 285 */
699 .long sys_inotify_rm_watch
700 .long sys_migrate_pages
701 .long sys_openat
702 .long sys_mkdirat
703 .long sys_mknodat /* 290 */
704 .long sys_fchownat
705 .long sys_futimesat
706 .long sys_fstatat64
707 .long sys_unlinkat
708 .long sys_renameat /* 295 */
709 .long sys_linkat
710 .long sys_symlinkat
711 .long sys_readlinkat
712 .long sys_fchmodat
713 .long sys_faccessat /* 300 */
714 .long sys_ni_syscall /* Reserved for pselect6 */
715 .long sys_ni_syscall /* Reserved for ppoll */
716 .long sys_unshare
717 .long sys_set_robust_list
718 .long sys_get_robust_list /* 305 */
719 .long sys_splice
720 .long sys_sync_file_range
721 .long sys_tee
722 .long sys_vmsplice
723 .long sys_move_pages /* 310 */
724 .long sys_sched_setaffinity
725 .long sys_sched_getaffinity
726 .long sys_kexec_load
727 .long sys_getcpu
728 .long sys_epoll_pwait /* 315 */
729 .long sys_utimensat
730 .long sys_signalfd
731 .long sys_timerfd_create
732 .long sys_eventfd
733 .long sys_fallocate /* 320 */
734 .long sys_timerfd_settime
735 .long sys_timerfd_gettime
736 .long sys_signalfd4
737 .long sys_eventfd2
738 .long sys_epoll_create1 /* 325 */
739 .long sys_dup3
740 .long sys_pipe2
741 .long sys_inotify_init1
742 .long sys_preadv
743 .long sys_pwritev /* 330 */
744 .long sys_rt_tgsigqueueinfo
745 .long sys_perf_event_open
746 .long sys_get_thread_area
747 .long sys_set_thread_area
748 .long sys_atomic_cmpxchg_32 /* 335 */
749 .long sys_atomic_barrier
750 .long sys_fanotify_init
751 .long sys_fanotify_mark
752 .long sys_prlimit64
753
diff --git a/arch/m68knommu/kernel/entry.S b/arch/m68k/kernel/entry_no.S
index 2783f25e38bd..2783f25e38bd 100644
--- a/arch/m68knommu/kernel/entry.S
+++ b/arch/m68k/kernel/entry_no.S
diff --git a/arch/m68knommu/kernel/init_task.c b/arch/m68k/kernel/init_task.c
index cbf9dc3cc51d..cbf9dc3cc51d 100644
--- a/arch/m68knommu/kernel/init_task.c
+++ b/arch/m68k/kernel/init_task.c
diff --git a/arch/m68knommu/kernel/irq.c b/arch/m68k/kernel/irq.c
index c7dd48f37bee..c7dd48f37bee 100644
--- a/arch/m68knommu/kernel/irq.c
+++ b/arch/m68k/kernel/irq.c
diff --git a/arch/m68k/kernel/m68k_ksyms.c b/arch/m68k/kernel/m68k_ksyms.c
index d900e77e5363..4752c28ce0ac 100644
--- a/arch/m68k/kernel/m68k_ksyms.c
+++ b/arch/m68k/kernel/m68k_ksyms.c
@@ -1,16 +1,5 @@
1#include <linux/module.h> 1#ifdef CONFIG_MMU
2 2#include "m68k_ksyms_mm.c"
3asmlinkage long long __ashldi3 (long long, int); 3#else
4asmlinkage long long __ashrdi3 (long long, int); 4#include "m68k_ksyms_no.c"
5asmlinkage long long __lshrdi3 (long long, int); 5#endif
6asmlinkage long long __muldi3 (long long, long long);
7
8/* The following are special because they're not called
9 explicitly (the C compiler generates them). Fortunately,
10 their interface isn't gonna change any time soon now, so
11 it's OK to leave it out of version control. */
12EXPORT_SYMBOL(__ashldi3);
13EXPORT_SYMBOL(__ashrdi3);
14EXPORT_SYMBOL(__lshrdi3);
15EXPORT_SYMBOL(__muldi3);
16
diff --git a/arch/m68k/kernel/m68k_ksyms_mm.c b/arch/m68k/kernel/m68k_ksyms_mm.c
new file mode 100644
index 000000000000..d900e77e5363
--- /dev/null
+++ b/arch/m68k/kernel/m68k_ksyms_mm.c
@@ -0,0 +1,16 @@
1#include <linux/module.h>
2
3asmlinkage long long __ashldi3 (long long, int);
4asmlinkage long long __ashrdi3 (long long, int);
5asmlinkage long long __lshrdi3 (long long, int);
6asmlinkage long long __muldi3 (long long, long long);
7
8/* The following are special because they're not called
9 explicitly (the C compiler generates them). Fortunately,
10 their interface isn't gonna change any time soon now, so
11 it's OK to leave it out of version control. */
12EXPORT_SYMBOL(__ashldi3);
13EXPORT_SYMBOL(__ashrdi3);
14EXPORT_SYMBOL(__lshrdi3);
15EXPORT_SYMBOL(__muldi3);
16
diff --git a/arch/m68knommu/kernel/m68k_ksyms.c b/arch/m68k/kernel/m68k_ksyms_no.c
index 39fe0a7aec32..39fe0a7aec32 100644
--- a/arch/m68knommu/kernel/m68k_ksyms.c
+++ b/arch/m68k/kernel/m68k_ksyms_no.c
diff --git a/arch/m68k/kernel/module.c b/arch/m68k/kernel/module.c
index cd6bcb1c957e..7ea203ce6b1a 100644
--- a/arch/m68k/kernel/module.c
+++ b/arch/m68k/kernel/module.c
@@ -1,155 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * This file is subject to the terms and conditions of the GNU General Public 2#include "module_mm.c"
3 * License. See the file COPYING in the main directory of this archive
4 * for more details.
5 */
6
7#include <linux/moduleloader.h>
8#include <linux/elf.h>
9#include <linux/vmalloc.h>
10#include <linux/fs.h>
11#include <linux/string.h>
12#include <linux/kernel.h>
13
14#if 0
15#define DEBUGP printk
16#else 3#else
17#define DEBUGP(fmt...) 4#include "module_no.c"
18#endif 5#endif
19
20#ifdef CONFIG_MODULES
21
22void *module_alloc(unsigned long size)
23{
24 if (size == 0)
25 return NULL;
26 return vmalloc(size);
27}
28
29
30/* Free memory returned from module_alloc */
31void module_free(struct module *mod, void *module_region)
32{
33 vfree(module_region);
34}
35
36/* We don't need anything special. */
37int module_frob_arch_sections(Elf_Ehdr *hdr,
38 Elf_Shdr *sechdrs,
39 char *secstrings,
40 struct module *mod)
41{
42 return 0;
43}
44
45int apply_relocate(Elf32_Shdr *sechdrs,
46 const char *strtab,
47 unsigned int symindex,
48 unsigned int relsec,
49 struct module *me)
50{
51 unsigned int i;
52 Elf32_Rel *rel = (void *)sechdrs[relsec].sh_addr;
53 Elf32_Sym *sym;
54 uint32_t *location;
55
56 DEBUGP("Applying relocate section %u to %u\n", relsec,
57 sechdrs[relsec].sh_info);
58 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
59 /* This is where to make the change */
60 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
61 + rel[i].r_offset;
62 /* This is the symbol it is referring to. Note that all
63 undefined symbols have been resolved. */
64 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
65 + ELF32_R_SYM(rel[i].r_info);
66
67 switch (ELF32_R_TYPE(rel[i].r_info)) {
68 case R_68K_32:
69 /* We add the value into the location given */
70 *location += sym->st_value;
71 break;
72 case R_68K_PC32:
73 /* Add the value, subtract its postition */
74 *location += sym->st_value - (uint32_t)location;
75 break;
76 default:
77 printk(KERN_ERR "module %s: Unknown relocation: %u\n",
78 me->name, ELF32_R_TYPE(rel[i].r_info));
79 return -ENOEXEC;
80 }
81 }
82 return 0;
83}
84
85int apply_relocate_add(Elf32_Shdr *sechdrs,
86 const char *strtab,
87 unsigned int symindex,
88 unsigned int relsec,
89 struct module *me)
90{
91 unsigned int i;
92 Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr;
93 Elf32_Sym *sym;
94 uint32_t *location;
95
96 DEBUGP("Applying relocate_add section %u to %u\n", relsec,
97 sechdrs[relsec].sh_info);
98 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
99 /* This is where to make the change */
100 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
101 + rel[i].r_offset;
102 /* This is the symbol it is referring to. Note that all
103 undefined symbols have been resolved. */
104 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
105 + ELF32_R_SYM(rel[i].r_info);
106
107 switch (ELF32_R_TYPE(rel[i].r_info)) {
108 case R_68K_32:
109 /* We add the value into the location given */
110 *location = rel[i].r_addend + sym->st_value;
111 break;
112 case R_68K_PC32:
113 /* Add the value, subtract its postition */
114 *location = rel[i].r_addend + sym->st_value - (uint32_t)location;
115 break;
116 default:
117 printk(KERN_ERR "module %s: Unknown relocation: %u\n",
118 me->name, ELF32_R_TYPE(rel[i].r_info));
119 return -ENOEXEC;
120 }
121 }
122 return 0;
123}
124
125int module_finalize(const Elf_Ehdr *hdr,
126 const Elf_Shdr *sechdrs,
127 struct module *mod)
128{
129 module_fixup(mod, mod->arch.fixup_start, mod->arch.fixup_end);
130
131 return 0;
132}
133
134void module_arch_cleanup(struct module *mod)
135{
136}
137
138#endif /* CONFIG_MODULES */
139
140void module_fixup(struct module *mod, struct m68k_fixup_info *start,
141 struct m68k_fixup_info *end)
142{
143 struct m68k_fixup_info *fixup;
144
145 for (fixup = start; fixup < end; fixup++) {
146 switch (fixup->type) {
147 case m68k_fixup_memoffset:
148 *(u32 *)fixup->addr = m68k_memoffset;
149 break;
150 case m68k_fixup_vnode_shift:
151 *(u16 *)fixup->addr += m68k_virt_to_node_shift;
152 break;
153 }
154 }
155}
diff --git a/arch/m68k/kernel/module_mm.c b/arch/m68k/kernel/module_mm.c
new file mode 100644
index 000000000000..cd6bcb1c957e
--- /dev/null
+++ b/arch/m68k/kernel/module_mm.c
@@ -0,0 +1,155 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file COPYING in the main directory of this archive
4 * for more details.
5 */
6
7#include <linux/moduleloader.h>
8#include <linux/elf.h>
9#include <linux/vmalloc.h>
10#include <linux/fs.h>
11#include <linux/string.h>
12#include <linux/kernel.h>
13
14#if 0
15#define DEBUGP printk
16#else
17#define DEBUGP(fmt...)
18#endif
19
20#ifdef CONFIG_MODULES
21
22void *module_alloc(unsigned long size)
23{
24 if (size == 0)
25 return NULL;
26 return vmalloc(size);
27}
28
29
30/* Free memory returned from module_alloc */
31void module_free(struct module *mod, void *module_region)
32{
33 vfree(module_region);
34}
35
36/* We don't need anything special. */
37int module_frob_arch_sections(Elf_Ehdr *hdr,
38 Elf_Shdr *sechdrs,
39 char *secstrings,
40 struct module *mod)
41{
42 return 0;
43}
44
45int apply_relocate(Elf32_Shdr *sechdrs,
46 const char *strtab,
47 unsigned int symindex,
48 unsigned int relsec,
49 struct module *me)
50{
51 unsigned int i;
52 Elf32_Rel *rel = (void *)sechdrs[relsec].sh_addr;
53 Elf32_Sym *sym;
54 uint32_t *location;
55
56 DEBUGP("Applying relocate section %u to %u\n", relsec,
57 sechdrs[relsec].sh_info);
58 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
59 /* This is where to make the change */
60 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
61 + rel[i].r_offset;
62 /* This is the symbol it is referring to. Note that all
63 undefined symbols have been resolved. */
64 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
65 + ELF32_R_SYM(rel[i].r_info);
66
67 switch (ELF32_R_TYPE(rel[i].r_info)) {
68 case R_68K_32:
69 /* We add the value into the location given */
70 *location += sym->st_value;
71 break;
72 case R_68K_PC32:
73 /* Add the value, subtract its postition */
74 *location += sym->st_value - (uint32_t)location;
75 break;
76 default:
77 printk(KERN_ERR "module %s: Unknown relocation: %u\n",
78 me->name, ELF32_R_TYPE(rel[i].r_info));
79 return -ENOEXEC;
80 }
81 }
82 return 0;
83}
84
85int apply_relocate_add(Elf32_Shdr *sechdrs,
86 const char *strtab,
87 unsigned int symindex,
88 unsigned int relsec,
89 struct module *me)
90{
91 unsigned int i;
92 Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr;
93 Elf32_Sym *sym;
94 uint32_t *location;
95
96 DEBUGP("Applying relocate_add section %u to %u\n", relsec,
97 sechdrs[relsec].sh_info);
98 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
99 /* This is where to make the change */
100 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
101 + rel[i].r_offset;
102 /* This is the symbol it is referring to. Note that all
103 undefined symbols have been resolved. */
104 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
105 + ELF32_R_SYM(rel[i].r_info);
106
107 switch (ELF32_R_TYPE(rel[i].r_info)) {
108 case R_68K_32:
109 /* We add the value into the location given */
110 *location = rel[i].r_addend + sym->st_value;
111 break;
112 case R_68K_PC32:
113 /* Add the value, subtract its postition */
114 *location = rel[i].r_addend + sym->st_value - (uint32_t)location;
115 break;
116 default:
117 printk(KERN_ERR "module %s: Unknown relocation: %u\n",
118 me->name, ELF32_R_TYPE(rel[i].r_info));
119 return -ENOEXEC;
120 }
121 }
122 return 0;
123}
124
125int module_finalize(const Elf_Ehdr *hdr,
126 const Elf_Shdr *sechdrs,
127 struct module *mod)
128{
129 module_fixup(mod, mod->arch.fixup_start, mod->arch.fixup_end);
130
131 return 0;
132}
133
134void module_arch_cleanup(struct module *mod)
135{
136}
137
138#endif /* CONFIG_MODULES */
139
140void module_fixup(struct module *mod, struct m68k_fixup_info *start,
141 struct m68k_fixup_info *end)
142{
143 struct m68k_fixup_info *fixup;
144
145 for (fixup = start; fixup < end; fixup++) {
146 switch (fixup->type) {
147 case m68k_fixup_memoffset:
148 *(u32 *)fixup->addr = m68k_memoffset;
149 break;
150 case m68k_fixup_vnode_shift:
151 *(u16 *)fixup->addr += m68k_virt_to_node_shift;
152 break;
153 }
154 }
155}
diff --git a/arch/m68knommu/kernel/module.c b/arch/m68k/kernel/module_no.c
index d11ffae7956a..d11ffae7956a 100644
--- a/arch/m68knommu/kernel/module.c
+++ b/arch/m68k/kernel/module_no.c
diff --git a/arch/m68k/kernel/process.c b/arch/m68k/kernel/process.c
index c2a1fc23dd75..6cf4bd6e34f8 100644
--- a/arch/m68k/kernel/process.c
+++ b/arch/m68k/kernel/process.c
@@ -1,354 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * linux/arch/m68k/kernel/process.c 2#include "process_mm.c"
3 *
4 * Copyright (C) 1995 Hamish Macdonald
5 *
6 * 68060 fixes by Jesper Skov
7 */
8
9/*
10 * This file handles the architecture-dependent parts of process handling..
11 */
12
13#include <linux/errno.h>
14#include <linux/module.h>
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/mm.h>
18#include <linux/slab.h>
19#include <linux/fs.h>
20#include <linux/smp.h>
21#include <linux/stddef.h>
22#include <linux/unistd.h>
23#include <linux/ptrace.h>
24#include <linux/user.h>
25#include <linux/reboot.h>
26#include <linux/init_task.h>
27#include <linux/mqueue.h>
28
29#include <asm/uaccess.h>
30#include <asm/system.h>
31#include <asm/traps.h>
32#include <asm/machdep.h>
33#include <asm/setup.h>
34#include <asm/pgtable.h>
35
36/*
37 * Initial task/thread structure. Make this a per-architecture thing,
38 * because different architectures tend to have different
39 * alignment requirements and potentially different initial
40 * setup.
41 */
42static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
43static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
44union thread_union init_thread_union __init_task_data
45 __attribute__((aligned(THREAD_SIZE))) =
46 { INIT_THREAD_INFO(init_task) };
47
48/* initial task structure */
49struct task_struct init_task = INIT_TASK(init_task);
50
51EXPORT_SYMBOL(init_task);
52
53asmlinkage void ret_from_fork(void);
54
55
56/*
57 * Return saved PC from a blocked thread
58 */
59unsigned long thread_saved_pc(struct task_struct *tsk)
60{
61 struct switch_stack *sw = (struct switch_stack *)tsk->thread.ksp;
62 /* Check whether the thread is blocked in resume() */
63 if (in_sched_functions(sw->retpc))
64 return ((unsigned long *)sw->a6)[1];
65 else
66 return sw->retpc;
67}
68
69/*
70 * The idle loop on an m68k..
71 */
72static void default_idle(void)
73{
74 if (!need_resched())
75#if defined(MACH_ATARI_ONLY)
76 /* block out HSYNC on the atari (falcon) */
77 __asm__("stop #0x2200" : : : "cc");
78#else 3#else
79 __asm__("stop #0x2000" : : : "cc"); 4#include "process_no.c"
80#endif 5#endif
81}
82
83void (*idle)(void) = default_idle;
84
85/*
86 * The idle thread. There's no useful work to be
87 * done, so just try to conserve power and have a
88 * low exit latency (ie sit in a loop waiting for
89 * somebody to say that they'd like to reschedule)
90 */
91void cpu_idle(void)
92{
93 /* endless idle loop with no priority at all */
94 while (1) {
95 while (!need_resched())
96 idle();
97 preempt_enable_no_resched();
98 schedule();
99 preempt_disable();
100 }
101}
102
103void machine_restart(char * __unused)
104{
105 if (mach_reset)
106 mach_reset();
107 for (;;);
108}
109
110void machine_halt(void)
111{
112 if (mach_halt)
113 mach_halt();
114 for (;;);
115}
116
117void machine_power_off(void)
118{
119 if (mach_power_off)
120 mach_power_off();
121 for (;;);
122}
123
124void (*pm_power_off)(void) = machine_power_off;
125EXPORT_SYMBOL(pm_power_off);
126
127void show_regs(struct pt_regs * regs)
128{
129 printk("\n");
130 printk("Format %02x Vector: %04x PC: %08lx Status: %04x %s\n",
131 regs->format, regs->vector, regs->pc, regs->sr, print_tainted());
132 printk("ORIG_D0: %08lx D0: %08lx A2: %08lx A1: %08lx\n",
133 regs->orig_d0, regs->d0, regs->a2, regs->a1);
134 printk("A0: %08lx D5: %08lx D4: %08lx\n",
135 regs->a0, regs->d5, regs->d4);
136 printk("D3: %08lx D2: %08lx D1: %08lx\n",
137 regs->d3, regs->d2, regs->d1);
138 if (!(regs->sr & PS_S))
139 printk("USP: %08lx\n", rdusp());
140}
141
142/*
143 * Create a kernel thread
144 */
145int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
146{
147 int pid;
148 mm_segment_t fs;
149
150 fs = get_fs();
151 set_fs (KERNEL_DS);
152
153 {
154 register long retval __asm__ ("d0");
155 register long clone_arg __asm__ ("d1") = flags | CLONE_VM | CLONE_UNTRACED;
156
157 retval = __NR_clone;
158 __asm__ __volatile__
159 ("clrl %%d2\n\t"
160 "trap #0\n\t" /* Linux/m68k system call */
161 "tstl %0\n\t" /* child or parent */
162 "jne 1f\n\t" /* parent - jump */
163 "lea %%sp@(%c7),%6\n\t" /* reload current */
164 "movel %6@,%6\n\t"
165 "movel %3,%%sp@-\n\t" /* push argument */
166 "jsr %4@\n\t" /* call fn */
167 "movel %0,%%d1\n\t" /* pass exit value */
168 "movel %2,%%d0\n\t" /* exit */
169 "trap #0\n"
170 "1:"
171 : "+d" (retval)
172 : "i" (__NR_clone), "i" (__NR_exit),
173 "r" (arg), "a" (fn), "d" (clone_arg), "r" (current),
174 "i" (-THREAD_SIZE)
175 : "d2");
176
177 pid = retval;
178 }
179
180 set_fs (fs);
181 return pid;
182}
183EXPORT_SYMBOL(kernel_thread);
184
185void flush_thread(void)
186{
187 unsigned long zero = 0;
188 set_fs(USER_DS);
189 current->thread.fs = __USER_DS;
190 if (!FPU_IS_EMU)
191 asm volatile (".chip 68k/68881\n\t"
192 "frestore %0@\n\t"
193 ".chip 68k" : : "a" (&zero));
194}
195
196/*
197 * "m68k_fork()".. By the time we get here, the
198 * non-volatile registers have also been saved on the
199 * stack. We do some ugly pointer stuff here.. (see
200 * also copy_thread)
201 */
202
203asmlinkage int m68k_fork(struct pt_regs *regs)
204{
205 return do_fork(SIGCHLD, rdusp(), regs, 0, NULL, NULL);
206}
207
208asmlinkage int m68k_vfork(struct pt_regs *regs)
209{
210 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0,
211 NULL, NULL);
212}
213
214asmlinkage int m68k_clone(struct pt_regs *regs)
215{
216 unsigned long clone_flags;
217 unsigned long newsp;
218 int __user *parent_tidptr, *child_tidptr;
219
220 /* syscall2 puts clone_flags in d1 and usp in d2 */
221 clone_flags = regs->d1;
222 newsp = regs->d2;
223 parent_tidptr = (int __user *)regs->d3;
224 child_tidptr = (int __user *)regs->d4;
225 if (!newsp)
226 newsp = rdusp();
227 return do_fork(clone_flags, newsp, regs, 0,
228 parent_tidptr, child_tidptr);
229}
230
231int copy_thread(unsigned long clone_flags, unsigned long usp,
232 unsigned long unused,
233 struct task_struct * p, struct pt_regs * regs)
234{
235 struct pt_regs * childregs;
236 struct switch_stack * childstack, *stack;
237 unsigned long *retp;
238
239 childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
240
241 *childregs = *regs;
242 childregs->d0 = 0;
243
244 retp = ((unsigned long *) regs);
245 stack = ((struct switch_stack *) retp) - 1;
246
247 childstack = ((struct switch_stack *) childregs) - 1;
248 *childstack = *stack;
249 childstack->retpc = (unsigned long)ret_from_fork;
250
251 p->thread.usp = usp;
252 p->thread.ksp = (unsigned long)childstack;
253
254 if (clone_flags & CLONE_SETTLS)
255 task_thread_info(p)->tp_value = regs->d5;
256
257 /*
258 * Must save the current SFC/DFC value, NOT the value when
259 * the parent was last descheduled - RGH 10-08-96
260 */
261 p->thread.fs = get_fs().seg;
262
263 if (!FPU_IS_EMU) {
264 /* Copy the current fpu state */
265 asm volatile ("fsave %0" : : "m" (p->thread.fpstate[0]) : "memory");
266
267 if (!CPU_IS_060 ? p->thread.fpstate[0] : p->thread.fpstate[2])
268 asm volatile ("fmovemx %/fp0-%/fp7,%0\n\t"
269 "fmoveml %/fpiar/%/fpcr/%/fpsr,%1"
270 : : "m" (p->thread.fp[0]), "m" (p->thread.fpcntl[0])
271 : "memory");
272 /* Restore the state in case the fpu was busy */
273 asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0]));
274 }
275
276 return 0;
277}
278
279/* Fill in the fpu structure for a core dump. */
280
281int dump_fpu (struct pt_regs *regs, struct user_m68kfp_struct *fpu)
282{
283 char fpustate[216];
284
285 if (FPU_IS_EMU) {
286 int i;
287
288 memcpy(fpu->fpcntl, current->thread.fpcntl, 12);
289 memcpy(fpu->fpregs, current->thread.fp, 96);
290 /* Convert internal fpu reg representation
291 * into long double format
292 */
293 for (i = 0; i < 24; i += 3)
294 fpu->fpregs[i] = ((fpu->fpregs[i] & 0xffff0000) << 15) |
295 ((fpu->fpregs[i] & 0x0000ffff) << 16);
296 return 1;
297 }
298
299 /* First dump the fpu context to avoid protocol violation. */
300 asm volatile ("fsave %0" :: "m" (fpustate[0]) : "memory");
301 if (!CPU_IS_060 ? !fpustate[0] : !fpustate[2])
302 return 0;
303
304 asm volatile ("fmovem %/fpiar/%/fpcr/%/fpsr,%0"
305 :: "m" (fpu->fpcntl[0])
306 : "memory");
307 asm volatile ("fmovemx %/fp0-%/fp7,%0"
308 :: "m" (fpu->fpregs[0])
309 : "memory");
310 return 1;
311}
312EXPORT_SYMBOL(dump_fpu);
313
314/*
315 * sys_execve() executes a new program.
316 */
317asmlinkage int sys_execve(const char __user *name,
318 const char __user *const __user *argv,
319 const char __user *const __user *envp)
320{
321 int error;
322 char * filename;
323 struct pt_regs *regs = (struct pt_regs *) &name;
324
325 filename = getname(name);
326 error = PTR_ERR(filename);
327 if (IS_ERR(filename))
328 return error;
329 error = do_execve(filename, argv, envp, regs);
330 putname(filename);
331 return error;
332}
333
334unsigned long get_wchan(struct task_struct *p)
335{
336 unsigned long fp, pc;
337 unsigned long stack_page;
338 int count = 0;
339 if (!p || p == current || p->state == TASK_RUNNING)
340 return 0;
341
342 stack_page = (unsigned long)task_stack_page(p);
343 fp = ((struct switch_stack *)p->thread.ksp)->a6;
344 do {
345 if (fp < stack_page+sizeof(struct thread_info) ||
346 fp >= 8184+stack_page)
347 return 0;
348 pc = ((unsigned long *)fp)[1];
349 if (!in_sched_functions(pc))
350 return pc;
351 fp = *(unsigned long *) fp;
352 } while (count++ < 16);
353 return 0;
354}
diff --git a/arch/m68k/kernel/process_mm.c b/arch/m68k/kernel/process_mm.c
new file mode 100644
index 000000000000..c2a1fc23dd75
--- /dev/null
+++ b/arch/m68k/kernel/process_mm.c
@@ -0,0 +1,354 @@
1/*
2 * linux/arch/m68k/kernel/process.c
3 *
4 * Copyright (C) 1995 Hamish Macdonald
5 *
6 * 68060 fixes by Jesper Skov
7 */
8
9/*
10 * This file handles the architecture-dependent parts of process handling..
11 */
12
13#include <linux/errno.h>
14#include <linux/module.h>
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/mm.h>
18#include <linux/slab.h>
19#include <linux/fs.h>
20#include <linux/smp.h>
21#include <linux/stddef.h>
22#include <linux/unistd.h>
23#include <linux/ptrace.h>
24#include <linux/user.h>
25#include <linux/reboot.h>
26#include <linux/init_task.h>
27#include <linux/mqueue.h>
28
29#include <asm/uaccess.h>
30#include <asm/system.h>
31#include <asm/traps.h>
32#include <asm/machdep.h>
33#include <asm/setup.h>
34#include <asm/pgtable.h>
35
36/*
37 * Initial task/thread structure. Make this a per-architecture thing,
38 * because different architectures tend to have different
39 * alignment requirements and potentially different initial
40 * setup.
41 */
42static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
43static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
44union thread_union init_thread_union __init_task_data
45 __attribute__((aligned(THREAD_SIZE))) =
46 { INIT_THREAD_INFO(init_task) };
47
48/* initial task structure */
49struct task_struct init_task = INIT_TASK(init_task);
50
51EXPORT_SYMBOL(init_task);
52
53asmlinkage void ret_from_fork(void);
54
55
56/*
57 * Return saved PC from a blocked thread
58 */
59unsigned long thread_saved_pc(struct task_struct *tsk)
60{
61 struct switch_stack *sw = (struct switch_stack *)tsk->thread.ksp;
62 /* Check whether the thread is blocked in resume() */
63 if (in_sched_functions(sw->retpc))
64 return ((unsigned long *)sw->a6)[1];
65 else
66 return sw->retpc;
67}
68
69/*
70 * The idle loop on an m68k..
71 */
72static void default_idle(void)
73{
74 if (!need_resched())
75#if defined(MACH_ATARI_ONLY)
76 /* block out HSYNC on the atari (falcon) */
77 __asm__("stop #0x2200" : : : "cc");
78#else
79 __asm__("stop #0x2000" : : : "cc");
80#endif
81}
82
83void (*idle)(void) = default_idle;
84
85/*
86 * The idle thread. There's no useful work to be
87 * done, so just try to conserve power and have a
88 * low exit latency (ie sit in a loop waiting for
89 * somebody to say that they'd like to reschedule)
90 */
91void cpu_idle(void)
92{
93 /* endless idle loop with no priority at all */
94 while (1) {
95 while (!need_resched())
96 idle();
97 preempt_enable_no_resched();
98 schedule();
99 preempt_disable();
100 }
101}
102
103void machine_restart(char * __unused)
104{
105 if (mach_reset)
106 mach_reset();
107 for (;;);
108}
109
110void machine_halt(void)
111{
112 if (mach_halt)
113 mach_halt();
114 for (;;);
115}
116
117void machine_power_off(void)
118{
119 if (mach_power_off)
120 mach_power_off();
121 for (;;);
122}
123
124void (*pm_power_off)(void) = machine_power_off;
125EXPORT_SYMBOL(pm_power_off);
126
127void show_regs(struct pt_regs * regs)
128{
129 printk("\n");
130 printk("Format %02x Vector: %04x PC: %08lx Status: %04x %s\n",
131 regs->format, regs->vector, regs->pc, regs->sr, print_tainted());
132 printk("ORIG_D0: %08lx D0: %08lx A2: %08lx A1: %08lx\n",
133 regs->orig_d0, regs->d0, regs->a2, regs->a1);
134 printk("A0: %08lx D5: %08lx D4: %08lx\n",
135 regs->a0, regs->d5, regs->d4);
136 printk("D3: %08lx D2: %08lx D1: %08lx\n",
137 regs->d3, regs->d2, regs->d1);
138 if (!(regs->sr & PS_S))
139 printk("USP: %08lx\n", rdusp());
140}
141
142/*
143 * Create a kernel thread
144 */
145int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
146{
147 int pid;
148 mm_segment_t fs;
149
150 fs = get_fs();
151 set_fs (KERNEL_DS);
152
153 {
154 register long retval __asm__ ("d0");
155 register long clone_arg __asm__ ("d1") = flags | CLONE_VM | CLONE_UNTRACED;
156
157 retval = __NR_clone;
158 __asm__ __volatile__
159 ("clrl %%d2\n\t"
160 "trap #0\n\t" /* Linux/m68k system call */
161 "tstl %0\n\t" /* child or parent */
162 "jne 1f\n\t" /* parent - jump */
163 "lea %%sp@(%c7),%6\n\t" /* reload current */
164 "movel %6@,%6\n\t"
165 "movel %3,%%sp@-\n\t" /* push argument */
166 "jsr %4@\n\t" /* call fn */
167 "movel %0,%%d1\n\t" /* pass exit value */
168 "movel %2,%%d0\n\t" /* exit */
169 "trap #0\n"
170 "1:"
171 : "+d" (retval)
172 : "i" (__NR_clone), "i" (__NR_exit),
173 "r" (arg), "a" (fn), "d" (clone_arg), "r" (current),
174 "i" (-THREAD_SIZE)
175 : "d2");
176
177 pid = retval;
178 }
179
180 set_fs (fs);
181 return pid;
182}
183EXPORT_SYMBOL(kernel_thread);
184
185void flush_thread(void)
186{
187 unsigned long zero = 0;
188 set_fs(USER_DS);
189 current->thread.fs = __USER_DS;
190 if (!FPU_IS_EMU)
191 asm volatile (".chip 68k/68881\n\t"
192 "frestore %0@\n\t"
193 ".chip 68k" : : "a" (&zero));
194}
195
196/*
197 * "m68k_fork()".. By the time we get here, the
198 * non-volatile registers have also been saved on the
199 * stack. We do some ugly pointer stuff here.. (see
200 * also copy_thread)
201 */
202
203asmlinkage int m68k_fork(struct pt_regs *regs)
204{
205 return do_fork(SIGCHLD, rdusp(), regs, 0, NULL, NULL);
206}
207
208asmlinkage int m68k_vfork(struct pt_regs *regs)
209{
210 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0,
211 NULL, NULL);
212}
213
214asmlinkage int m68k_clone(struct pt_regs *regs)
215{
216 unsigned long clone_flags;
217 unsigned long newsp;
218 int __user *parent_tidptr, *child_tidptr;
219
220 /* syscall2 puts clone_flags in d1 and usp in d2 */
221 clone_flags = regs->d1;
222 newsp = regs->d2;
223 parent_tidptr = (int __user *)regs->d3;
224 child_tidptr = (int __user *)regs->d4;
225 if (!newsp)
226 newsp = rdusp();
227 return do_fork(clone_flags, newsp, regs, 0,
228 parent_tidptr, child_tidptr);
229}
230
231int copy_thread(unsigned long clone_flags, unsigned long usp,
232 unsigned long unused,
233 struct task_struct * p, struct pt_regs * regs)
234{
235 struct pt_regs * childregs;
236 struct switch_stack * childstack, *stack;
237 unsigned long *retp;
238
239 childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
240
241 *childregs = *regs;
242 childregs->d0 = 0;
243
244 retp = ((unsigned long *) regs);
245 stack = ((struct switch_stack *) retp) - 1;
246
247 childstack = ((struct switch_stack *) childregs) - 1;
248 *childstack = *stack;
249 childstack->retpc = (unsigned long)ret_from_fork;
250
251 p->thread.usp = usp;
252 p->thread.ksp = (unsigned long)childstack;
253
254 if (clone_flags & CLONE_SETTLS)
255 task_thread_info(p)->tp_value = regs->d5;
256
257 /*
258 * Must save the current SFC/DFC value, NOT the value when
259 * the parent was last descheduled - RGH 10-08-96
260 */
261 p->thread.fs = get_fs().seg;
262
263 if (!FPU_IS_EMU) {
264 /* Copy the current fpu state */
265 asm volatile ("fsave %0" : : "m" (p->thread.fpstate[0]) : "memory");
266
267 if (!CPU_IS_060 ? p->thread.fpstate[0] : p->thread.fpstate[2])
268 asm volatile ("fmovemx %/fp0-%/fp7,%0\n\t"
269 "fmoveml %/fpiar/%/fpcr/%/fpsr,%1"
270 : : "m" (p->thread.fp[0]), "m" (p->thread.fpcntl[0])
271 : "memory");
272 /* Restore the state in case the fpu was busy */
273 asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0]));
274 }
275
276 return 0;
277}
278
279/* Fill in the fpu structure for a core dump. */
280
281int dump_fpu (struct pt_regs *regs, struct user_m68kfp_struct *fpu)
282{
283 char fpustate[216];
284
285 if (FPU_IS_EMU) {
286 int i;
287
288 memcpy(fpu->fpcntl, current->thread.fpcntl, 12);
289 memcpy(fpu->fpregs, current->thread.fp, 96);
290 /* Convert internal fpu reg representation
291 * into long double format
292 */
293 for (i = 0; i < 24; i += 3)
294 fpu->fpregs[i] = ((fpu->fpregs[i] & 0xffff0000) << 15) |
295 ((fpu->fpregs[i] & 0x0000ffff) << 16);
296 return 1;
297 }
298
299 /* First dump the fpu context to avoid protocol violation. */
300 asm volatile ("fsave %0" :: "m" (fpustate[0]) : "memory");
301 if (!CPU_IS_060 ? !fpustate[0] : !fpustate[2])
302 return 0;
303
304 asm volatile ("fmovem %/fpiar/%/fpcr/%/fpsr,%0"
305 :: "m" (fpu->fpcntl[0])
306 : "memory");
307 asm volatile ("fmovemx %/fp0-%/fp7,%0"
308 :: "m" (fpu->fpregs[0])
309 : "memory");
310 return 1;
311}
312EXPORT_SYMBOL(dump_fpu);
313
314/*
315 * sys_execve() executes a new program.
316 */
317asmlinkage int sys_execve(const char __user *name,
318 const char __user *const __user *argv,
319 const char __user *const __user *envp)
320{
321 int error;
322 char * filename;
323 struct pt_regs *regs = (struct pt_regs *) &name;
324
325 filename = getname(name);
326 error = PTR_ERR(filename);
327 if (IS_ERR(filename))
328 return error;
329 error = do_execve(filename, argv, envp, regs);
330 putname(filename);
331 return error;
332}
333
334unsigned long get_wchan(struct task_struct *p)
335{
336 unsigned long fp, pc;
337 unsigned long stack_page;
338 int count = 0;
339 if (!p || p == current || p->state == TASK_RUNNING)
340 return 0;
341
342 stack_page = (unsigned long)task_stack_page(p);
343 fp = ((struct switch_stack *)p->thread.ksp)->a6;
344 do {
345 if (fp < stack_page+sizeof(struct thread_info) ||
346 fp >= 8184+stack_page)
347 return 0;
348 pc = ((unsigned long *)fp)[1];
349 if (!in_sched_functions(pc))
350 return pc;
351 fp = *(unsigned long *) fp;
352 } while (count++ < 16);
353 return 0;
354}
diff --git a/arch/m68knommu/kernel/process.c b/arch/m68k/kernel/process_no.c
index e2a63af5d517..e2a63af5d517 100644
--- a/arch/m68knommu/kernel/process.c
+++ b/arch/m68k/kernel/process_no.c
diff --git a/arch/m68k/kernel/ptrace.c b/arch/m68k/kernel/ptrace.c
index 0b252683cefb..07a417550e94 100644
--- a/arch/m68k/kernel/ptrace.c
+++ b/arch/m68k/kernel/ptrace.c
@@ -1,277 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * linux/arch/m68k/kernel/ptrace.c 2#include "ptrace_mm.c"
3 * 3#else
4 * Copyright (C) 1994 by Hamish Macdonald 4#include "ptrace_no.c"
5 * Taken from linux/kernel/ptrace.c and modified for M680x0. 5#endif
6 * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of
10 * this archive for more details.
11 */
12
13#include <linux/kernel.h>
14#include <linux/sched.h>
15#include <linux/mm.h>
16#include <linux/smp.h>
17#include <linux/errno.h>
18#include <linux/ptrace.h>
19#include <linux/user.h>
20#include <linux/signal.h>
21
22#include <asm/uaccess.h>
23#include <asm/page.h>
24#include <asm/pgtable.h>
25#include <asm/system.h>
26#include <asm/processor.h>
27
28/*
29 * does not yet catch signals sent when the child dies.
30 * in exit.c or in signal.c.
31 */
32
33/* determines which bits in the SR the user has access to. */
34/* 1 = access 0 = no access */
35#define SR_MASK 0x001f
36
37/* sets the trace bits. */
38#define TRACE_BITS 0xC000
39#define T1_BIT 0x8000
40#define T0_BIT 0x4000
41
42/* Find the stack offset for a register, relative to thread.esp0. */
43#define PT_REG(reg) ((long)&((struct pt_regs *)0)->reg)
44#define SW_REG(reg) ((long)&((struct switch_stack *)0)->reg \
45 - sizeof(struct switch_stack))
46/* Mapping from PT_xxx to the stack offset at which the register is
47 saved. Notice that usp has no stack-slot and needs to be treated
48 specially (see get_reg/put_reg below). */
49static const int regoff[] = {
50 [0] = PT_REG(d1),
51 [1] = PT_REG(d2),
52 [2] = PT_REG(d3),
53 [3] = PT_REG(d4),
54 [4] = PT_REG(d5),
55 [5] = SW_REG(d6),
56 [6] = SW_REG(d7),
57 [7] = PT_REG(a0),
58 [8] = PT_REG(a1),
59 [9] = PT_REG(a2),
60 [10] = SW_REG(a3),
61 [11] = SW_REG(a4),
62 [12] = SW_REG(a5),
63 [13] = SW_REG(a6),
64 [14] = PT_REG(d0),
65 [15] = -1,
66 [16] = PT_REG(orig_d0),
67 [17] = PT_REG(sr),
68 [18] = PT_REG(pc),
69};
70
71/*
72 * Get contents of register REGNO in task TASK.
73 */
74static inline long get_reg(struct task_struct *task, int regno)
75{
76 unsigned long *addr;
77
78 if (regno == PT_USP)
79 addr = &task->thread.usp;
80 else if (regno < ARRAY_SIZE(regoff))
81 addr = (unsigned long *)(task->thread.esp0 + regoff[regno]);
82 else
83 return 0;
84 /* Need to take stkadj into account. */
85 if (regno == PT_SR || regno == PT_PC) {
86 long stkadj = *(long *)(task->thread.esp0 + PT_REG(stkadj));
87 addr = (unsigned long *) ((unsigned long)addr + stkadj);
88 /* The sr is actually a 16 bit register. */
89 if (regno == PT_SR)
90 return *(unsigned short *)addr;
91 }
92 return *addr;
93}
94
95/*
96 * Write contents of register REGNO in task TASK.
97 */
98static inline int put_reg(struct task_struct *task, int regno,
99 unsigned long data)
100{
101 unsigned long *addr;
102
103 if (regno == PT_USP)
104 addr = &task->thread.usp;
105 else if (regno < ARRAY_SIZE(regoff))
106 addr = (unsigned long *)(task->thread.esp0 + regoff[regno]);
107 else
108 return -1;
109 /* Need to take stkadj into account. */
110 if (regno == PT_SR || regno == PT_PC) {
111 long stkadj = *(long *)(task->thread.esp0 + PT_REG(stkadj));
112 addr = (unsigned long *) ((unsigned long)addr + stkadj);
113 /* The sr is actually a 16 bit register. */
114 if (regno == PT_SR) {
115 *(unsigned short *)addr = data;
116 return 0;
117 }
118 }
119 *addr = data;
120 return 0;
121}
122
123/*
124 * Make sure the single step bit is not set.
125 */
126static inline void singlestep_disable(struct task_struct *child)
127{
128 unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS;
129 put_reg(child, PT_SR, tmp);
130 clear_tsk_thread_flag(child, TIF_DELAYED_TRACE);
131}
132
133/*
134 * Called by kernel/ptrace.c when detaching..
135 */
136void ptrace_disable(struct task_struct *child)
137{
138 singlestep_disable(child);
139}
140
141void user_enable_single_step(struct task_struct *child)
142{
143 unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS;
144 put_reg(child, PT_SR, tmp | T1_BIT);
145 set_tsk_thread_flag(child, TIF_DELAYED_TRACE);
146}
147
148void user_enable_block_step(struct task_struct *child)
149{
150 unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS;
151 put_reg(child, PT_SR, tmp | T0_BIT);
152}
153
154void user_disable_single_step(struct task_struct *child)
155{
156 singlestep_disable(child);
157}
158
159long arch_ptrace(struct task_struct *child, long request,
160 unsigned long addr, unsigned long data)
161{
162 unsigned long tmp;
163 int i, ret = 0;
164 int regno = addr >> 2; /* temporary hack. */
165 unsigned long __user *datap = (unsigned long __user *) data;
166
167 switch (request) {
168 /* read the word at location addr in the USER area. */
169 case PTRACE_PEEKUSR:
170 if (addr & 3)
171 goto out_eio;
172
173 if (regno >= 0 && regno < 19) {
174 tmp = get_reg(child, regno);
175 } else if (regno >= 21 && regno < 49) {
176 tmp = child->thread.fp[regno - 21];
177 /* Convert internal fpu reg representation
178 * into long double format
179 */
180 if (FPU_IS_EMU && (regno < 45) && !(regno % 3))
181 tmp = ((tmp & 0xffff0000) << 15) |
182 ((tmp & 0x0000ffff) << 16);
183 } else
184 goto out_eio;
185 ret = put_user(tmp, datap);
186 break;
187
188 case PTRACE_POKEUSR:
189 /* write the word at location addr in the USER area */
190 if (addr & 3)
191 goto out_eio;
192
193 if (regno == PT_SR) {
194 data &= SR_MASK;
195 data |= get_reg(child, PT_SR) & ~SR_MASK;
196 }
197 if (regno >= 0 && regno < 19) {
198 if (put_reg(child, regno, data))
199 goto out_eio;
200 } else if (regno >= 21 && regno < 48) {
201 /* Convert long double format
202 * into internal fpu reg representation
203 */
204 if (FPU_IS_EMU && (regno < 45) && !(regno % 3)) {
205 data <<= 15;
206 data = (data & 0xffff0000) |
207 ((data & 0x0000ffff) >> 1);
208 }
209 child->thread.fp[regno - 21] = data;
210 } else
211 goto out_eio;
212 break;
213
214 case PTRACE_GETREGS: /* Get all gp regs from the child. */
215 for (i = 0; i < 19; i++) {
216 tmp = get_reg(child, i);
217 ret = put_user(tmp, datap);
218 if (ret)
219 break;
220 datap++;
221 }
222 break;
223
224 case PTRACE_SETREGS: /* Set all gp regs in the child. */
225 for (i = 0; i < 19; i++) {
226 ret = get_user(tmp, datap);
227 if (ret)
228 break;
229 if (i == PT_SR) {
230 tmp &= SR_MASK;
231 tmp |= get_reg(child, PT_SR) & ~SR_MASK;
232 }
233 put_reg(child, i, tmp);
234 datap++;
235 }
236 break;
237
238 case PTRACE_GETFPREGS: /* Get the child FPU state. */
239 if (copy_to_user(datap, &child->thread.fp,
240 sizeof(struct user_m68kfp_struct)))
241 ret = -EFAULT;
242 break;
243
244 case PTRACE_SETFPREGS: /* Set the child FPU state. */
245 if (copy_from_user(&child->thread.fp, datap,
246 sizeof(struct user_m68kfp_struct)))
247 ret = -EFAULT;
248 break;
249
250 case PTRACE_GET_THREAD_AREA:
251 ret = put_user(task_thread_info(child)->tp_value, datap);
252 break;
253
254 default:
255 ret = ptrace_request(child, request, addr, data);
256 break;
257 }
258
259 return ret;
260out_eio:
261 return -EIO;
262}
263
264asmlinkage void syscall_trace(void)
265{
266 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
267 ? 0x80 : 0));
268 /*
269 * this isn't the same as continuing with a signal, but it will do
270 * for normal use. strace only continues with a signal if the
271 * stopping signal is not SIGTRAP. -brl
272 */
273 if (current->exit_code) {
274 send_sig(current->exit_code, current, 1);
275 current->exit_code = 0;
276 }
277}
diff --git a/arch/m68k/kernel/ptrace_mm.c b/arch/m68k/kernel/ptrace_mm.c
new file mode 100644
index 000000000000..0b252683cefb
--- /dev/null
+++ b/arch/m68k/kernel/ptrace_mm.c
@@ -0,0 +1,277 @@
1/*
2 * linux/arch/m68k/kernel/ptrace.c
3 *
4 * Copyright (C) 1994 by Hamish Macdonald
5 * Taken from linux/kernel/ptrace.c and modified for M680x0.
6 * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of
10 * this archive for more details.
11 */
12
13#include <linux/kernel.h>
14#include <linux/sched.h>
15#include <linux/mm.h>
16#include <linux/smp.h>
17#include <linux/errno.h>
18#include <linux/ptrace.h>
19#include <linux/user.h>
20#include <linux/signal.h>
21
22#include <asm/uaccess.h>
23#include <asm/page.h>
24#include <asm/pgtable.h>
25#include <asm/system.h>
26#include <asm/processor.h>
27
28/*
29 * does not yet catch signals sent when the child dies.
30 * in exit.c or in signal.c.
31 */
32
33/* determines which bits in the SR the user has access to. */
34/* 1 = access 0 = no access */
35#define SR_MASK 0x001f
36
37/* sets the trace bits. */
38#define TRACE_BITS 0xC000
39#define T1_BIT 0x8000
40#define T0_BIT 0x4000
41
42/* Find the stack offset for a register, relative to thread.esp0. */
43#define PT_REG(reg) ((long)&((struct pt_regs *)0)->reg)
44#define SW_REG(reg) ((long)&((struct switch_stack *)0)->reg \
45 - sizeof(struct switch_stack))
46/* Mapping from PT_xxx to the stack offset at which the register is
47 saved. Notice that usp has no stack-slot and needs to be treated
48 specially (see get_reg/put_reg below). */
49static const int regoff[] = {
50 [0] = PT_REG(d1),
51 [1] = PT_REG(d2),
52 [2] = PT_REG(d3),
53 [3] = PT_REG(d4),
54 [4] = PT_REG(d5),
55 [5] = SW_REG(d6),
56 [6] = SW_REG(d7),
57 [7] = PT_REG(a0),
58 [8] = PT_REG(a1),
59 [9] = PT_REG(a2),
60 [10] = SW_REG(a3),
61 [11] = SW_REG(a4),
62 [12] = SW_REG(a5),
63 [13] = SW_REG(a6),
64 [14] = PT_REG(d0),
65 [15] = -1,
66 [16] = PT_REG(orig_d0),
67 [17] = PT_REG(sr),
68 [18] = PT_REG(pc),
69};
70
71/*
72 * Get contents of register REGNO in task TASK.
73 */
74static inline long get_reg(struct task_struct *task, int regno)
75{
76 unsigned long *addr;
77
78 if (regno == PT_USP)
79 addr = &task->thread.usp;
80 else if (regno < ARRAY_SIZE(regoff))
81 addr = (unsigned long *)(task->thread.esp0 + regoff[regno]);
82 else
83 return 0;
84 /* Need to take stkadj into account. */
85 if (regno == PT_SR || regno == PT_PC) {
86 long stkadj = *(long *)(task->thread.esp0 + PT_REG(stkadj));
87 addr = (unsigned long *) ((unsigned long)addr + stkadj);
88 /* The sr is actually a 16 bit register. */
89 if (regno == PT_SR)
90 return *(unsigned short *)addr;
91 }
92 return *addr;
93}
94
95/*
96 * Write contents of register REGNO in task TASK.
97 */
98static inline int put_reg(struct task_struct *task, int regno,
99 unsigned long data)
100{
101 unsigned long *addr;
102
103 if (regno == PT_USP)
104 addr = &task->thread.usp;
105 else if (regno < ARRAY_SIZE(regoff))
106 addr = (unsigned long *)(task->thread.esp0 + regoff[regno]);
107 else
108 return -1;
109 /* Need to take stkadj into account. */
110 if (regno == PT_SR || regno == PT_PC) {
111 long stkadj = *(long *)(task->thread.esp0 + PT_REG(stkadj));
112 addr = (unsigned long *) ((unsigned long)addr + stkadj);
113 /* The sr is actually a 16 bit register. */
114 if (regno == PT_SR) {
115 *(unsigned short *)addr = data;
116 return 0;
117 }
118 }
119 *addr = data;
120 return 0;
121}
122
123/*
124 * Make sure the single step bit is not set.
125 */
126static inline void singlestep_disable(struct task_struct *child)
127{
128 unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS;
129 put_reg(child, PT_SR, tmp);
130 clear_tsk_thread_flag(child, TIF_DELAYED_TRACE);
131}
132
133/*
134 * Called by kernel/ptrace.c when detaching..
135 */
136void ptrace_disable(struct task_struct *child)
137{
138 singlestep_disable(child);
139}
140
141void user_enable_single_step(struct task_struct *child)
142{
143 unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS;
144 put_reg(child, PT_SR, tmp | T1_BIT);
145 set_tsk_thread_flag(child, TIF_DELAYED_TRACE);
146}
147
148void user_enable_block_step(struct task_struct *child)
149{
150 unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS;
151 put_reg(child, PT_SR, tmp | T0_BIT);
152}
153
154void user_disable_single_step(struct task_struct *child)
155{
156 singlestep_disable(child);
157}
158
159long arch_ptrace(struct task_struct *child, long request,
160 unsigned long addr, unsigned long data)
161{
162 unsigned long tmp;
163 int i, ret = 0;
164 int regno = addr >> 2; /* temporary hack. */
165 unsigned long __user *datap = (unsigned long __user *) data;
166
167 switch (request) {
168 /* read the word at location addr in the USER area. */
169 case PTRACE_PEEKUSR:
170 if (addr & 3)
171 goto out_eio;
172
173 if (regno >= 0 && regno < 19) {
174 tmp = get_reg(child, regno);
175 } else if (regno >= 21 && regno < 49) {
176 tmp = child->thread.fp[regno - 21];
177 /* Convert internal fpu reg representation
178 * into long double format
179 */
180 if (FPU_IS_EMU && (regno < 45) && !(regno % 3))
181 tmp = ((tmp & 0xffff0000) << 15) |
182 ((tmp & 0x0000ffff) << 16);
183 } else
184 goto out_eio;
185 ret = put_user(tmp, datap);
186 break;
187
188 case PTRACE_POKEUSR:
189 /* write the word at location addr in the USER area */
190 if (addr & 3)
191 goto out_eio;
192
193 if (regno == PT_SR) {
194 data &= SR_MASK;
195 data |= get_reg(child, PT_SR) & ~SR_MASK;
196 }
197 if (regno >= 0 && regno < 19) {
198 if (put_reg(child, regno, data))
199 goto out_eio;
200 } else if (regno >= 21 && regno < 48) {
201 /* Convert long double format
202 * into internal fpu reg representation
203 */
204 if (FPU_IS_EMU && (regno < 45) && !(regno % 3)) {
205 data <<= 15;
206 data = (data & 0xffff0000) |
207 ((data & 0x0000ffff) >> 1);
208 }
209 child->thread.fp[regno - 21] = data;
210 } else
211 goto out_eio;
212 break;
213
214 case PTRACE_GETREGS: /* Get all gp regs from the child. */
215 for (i = 0; i < 19; i++) {
216 tmp = get_reg(child, i);
217 ret = put_user(tmp, datap);
218 if (ret)
219 break;
220 datap++;
221 }
222 break;
223
224 case PTRACE_SETREGS: /* Set all gp regs in the child. */
225 for (i = 0; i < 19; i++) {
226 ret = get_user(tmp, datap);
227 if (ret)
228 break;
229 if (i == PT_SR) {
230 tmp &= SR_MASK;
231 tmp |= get_reg(child, PT_SR) & ~SR_MASK;
232 }
233 put_reg(child, i, tmp);
234 datap++;
235 }
236 break;
237
238 case PTRACE_GETFPREGS: /* Get the child FPU state. */
239 if (copy_to_user(datap, &child->thread.fp,
240 sizeof(struct user_m68kfp_struct)))
241 ret = -EFAULT;
242 break;
243
244 case PTRACE_SETFPREGS: /* Set the child FPU state. */
245 if (copy_from_user(&child->thread.fp, datap,
246 sizeof(struct user_m68kfp_struct)))
247 ret = -EFAULT;
248 break;
249
250 case PTRACE_GET_THREAD_AREA:
251 ret = put_user(task_thread_info(child)->tp_value, datap);
252 break;
253
254 default:
255 ret = ptrace_request(child, request, addr, data);
256 break;
257 }
258
259 return ret;
260out_eio:
261 return -EIO;
262}
263
264asmlinkage void syscall_trace(void)
265{
266 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
267 ? 0x80 : 0));
268 /*
269 * this isn't the same as continuing with a signal, but it will do
270 * for normal use. strace only continues with a signal if the
271 * stopping signal is not SIGTRAP. -brl
272 */
273 if (current->exit_code) {
274 send_sig(current->exit_code, current, 1);
275 current->exit_code = 0;
276 }
277}
diff --git a/arch/m68knommu/kernel/ptrace.c b/arch/m68k/kernel/ptrace_no.c
index 6709fb707335..6709fb707335 100644
--- a/arch/m68knommu/kernel/ptrace.c
+++ b/arch/m68k/kernel/ptrace_no.c
diff --git a/arch/m68k/kernel/setup.c b/arch/m68k/kernel/setup.c
index 334d83640376..4bf129f1d2e2 100644
--- a/arch/m68k/kernel/setup.c
+++ b/arch/m68k/kernel/setup.c
@@ -1,533 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * linux/arch/m68k/kernel/setup.c 2#include "setup_mm.c"
3 *
4 * Copyright (C) 1995 Hamish Macdonald
5 */
6
7/*
8 * This file handles the architecture-dependent parts of system setup
9 */
10
11#include <linux/kernel.h>
12#include <linux/mm.h>
13#include <linux/sched.h>
14#include <linux/delay.h>
15#include <linux/interrupt.h>
16#include <linux/fs.h>
17#include <linux/console.h>
18#include <linux/genhd.h>
19#include <linux/errno.h>
20#include <linux/string.h>
21#include <linux/init.h>
22#include <linux/bootmem.h>
23#include <linux/proc_fs.h>
24#include <linux/seq_file.h>
25#include <linux/module.h>
26#include <linux/initrd.h>
27
28#include <asm/bootinfo.h>
29#include <asm/sections.h>
30#include <asm/setup.h>
31#include <asm/fpu.h>
32#include <asm/irq.h>
33#include <asm/io.h>
34#include <asm/machdep.h>
35#ifdef CONFIG_AMIGA
36#include <asm/amigahw.h>
37#endif
38#ifdef CONFIG_ATARI
39#include <asm/atarihw.h>
40#include <asm/atari_stram.h>
41#endif
42#ifdef CONFIG_SUN3X
43#include <asm/dvma.h>
44#endif
45#include <asm/natfeat.h>
46
47#if !FPSTATESIZE || !NR_IRQS
48#warning No CPU/platform type selected, your kernel will not work!
49#warning Are you building an allnoconfig kernel?
50#endif
51
52unsigned long m68k_machtype;
53EXPORT_SYMBOL(m68k_machtype);
54unsigned long m68k_cputype;
55EXPORT_SYMBOL(m68k_cputype);
56unsigned long m68k_fputype;
57unsigned long m68k_mmutype;
58EXPORT_SYMBOL(m68k_mmutype);
59#ifdef CONFIG_VME
60unsigned long vme_brdtype;
61EXPORT_SYMBOL(vme_brdtype);
62#endif
63
64int m68k_is040or060;
65EXPORT_SYMBOL(m68k_is040or060);
66
67extern unsigned long availmem;
68
69int m68k_num_memory;
70EXPORT_SYMBOL(m68k_num_memory);
71int m68k_realnum_memory;
72EXPORT_SYMBOL(m68k_realnum_memory);
73unsigned long m68k_memoffset;
74struct mem_info m68k_memory[NUM_MEMINFO];
75EXPORT_SYMBOL(m68k_memory);
76
77struct mem_info m68k_ramdisk;
78
79static char m68k_command_line[CL_SIZE];
80
81void (*mach_sched_init) (irq_handler_t handler) __initdata = NULL;
82/* machine dependent irq functions */
83void (*mach_init_IRQ) (void) __initdata = NULL;
84void (*mach_get_model) (char *model);
85void (*mach_get_hardware_list) (struct seq_file *m);
86/* machine dependent timer functions */
87unsigned long (*mach_gettimeoffset) (void);
88int (*mach_hwclk) (int, struct rtc_time*);
89EXPORT_SYMBOL(mach_hwclk);
90int (*mach_set_clock_mmss) (unsigned long);
91unsigned int (*mach_get_ss)(void);
92int (*mach_get_rtc_pll)(struct rtc_pll_info *);
93int (*mach_set_rtc_pll)(struct rtc_pll_info *);
94EXPORT_SYMBOL(mach_get_ss);
95EXPORT_SYMBOL(mach_get_rtc_pll);
96EXPORT_SYMBOL(mach_set_rtc_pll);
97void (*mach_reset)( void );
98void (*mach_halt)( void );
99void (*mach_power_off)( void );
100long mach_max_dma_address = 0x00ffffff; /* default set to the lower 16MB */
101#ifdef CONFIG_HEARTBEAT
102void (*mach_heartbeat) (int);
103EXPORT_SYMBOL(mach_heartbeat);
104#endif
105#ifdef CONFIG_M68K_L2_CACHE
106void (*mach_l2_flush) (int);
107#endif
108#if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE)
109void (*mach_beep)(unsigned int, unsigned int);
110EXPORT_SYMBOL(mach_beep);
111#endif
112#if defined(CONFIG_ISA) && defined(MULTI_ISA)
113int isa_type;
114int isa_sex;
115EXPORT_SYMBOL(isa_type);
116EXPORT_SYMBOL(isa_sex);
117#endif
118
119extern int amiga_parse_bootinfo(const struct bi_record *);
120extern int atari_parse_bootinfo(const struct bi_record *);
121extern int mac_parse_bootinfo(const struct bi_record *);
122extern int q40_parse_bootinfo(const struct bi_record *);
123extern int bvme6000_parse_bootinfo(const struct bi_record *);
124extern int mvme16x_parse_bootinfo(const struct bi_record *);
125extern int mvme147_parse_bootinfo(const struct bi_record *);
126extern int hp300_parse_bootinfo(const struct bi_record *);
127extern int apollo_parse_bootinfo(const struct bi_record *);
128
129extern void config_amiga(void);
130extern void config_atari(void);
131extern void config_mac(void);
132extern void config_sun3(void);
133extern void config_apollo(void);
134extern void config_mvme147(void);
135extern void config_mvme16x(void);
136extern void config_bvme6000(void);
137extern void config_hp300(void);
138extern void config_q40(void);
139extern void config_sun3x(void);
140
141#define MASK_256K 0xfffc0000
142
143extern void paging_init(void);
144
145static void __init m68k_parse_bootinfo(const struct bi_record *record)
146{
147 while (record->tag != BI_LAST) {
148 int unknown = 0;
149 const unsigned long *data = record->data;
150
151 switch (record->tag) {
152 case BI_MACHTYPE:
153 case BI_CPUTYPE:
154 case BI_FPUTYPE:
155 case BI_MMUTYPE:
156 /* Already set up by head.S */
157 break;
158
159 case BI_MEMCHUNK:
160 if (m68k_num_memory < NUM_MEMINFO) {
161 m68k_memory[m68k_num_memory].addr = data[0];
162 m68k_memory[m68k_num_memory].size = data[1];
163 m68k_num_memory++;
164 } else
165 printk("m68k_parse_bootinfo: too many memory chunks\n");
166 break;
167
168 case BI_RAMDISK:
169 m68k_ramdisk.addr = data[0];
170 m68k_ramdisk.size = data[1];
171 break;
172
173 case BI_COMMAND_LINE:
174 strlcpy(m68k_command_line, (const char *)data,
175 sizeof(m68k_command_line));
176 break;
177
178 default:
179 if (MACH_IS_AMIGA)
180 unknown = amiga_parse_bootinfo(record);
181 else if (MACH_IS_ATARI)
182 unknown = atari_parse_bootinfo(record);
183 else if (MACH_IS_MAC)
184 unknown = mac_parse_bootinfo(record);
185 else if (MACH_IS_Q40)
186 unknown = q40_parse_bootinfo(record);
187 else if (MACH_IS_BVME6000)
188 unknown = bvme6000_parse_bootinfo(record);
189 else if (MACH_IS_MVME16x)
190 unknown = mvme16x_parse_bootinfo(record);
191 else if (MACH_IS_MVME147)
192 unknown = mvme147_parse_bootinfo(record);
193 else if (MACH_IS_HP300)
194 unknown = hp300_parse_bootinfo(record);
195 else if (MACH_IS_APOLLO)
196 unknown = apollo_parse_bootinfo(record);
197 else
198 unknown = 1;
199 }
200 if (unknown)
201 printk("m68k_parse_bootinfo: unknown tag 0x%04x ignored\n",
202 record->tag);
203 record = (struct bi_record *)((unsigned long)record +
204 record->size);
205 }
206
207 m68k_realnum_memory = m68k_num_memory;
208#ifdef CONFIG_SINGLE_MEMORY_CHUNK
209 if (m68k_num_memory > 1) {
210 printk("Ignoring last %i chunks of physical memory\n",
211 (m68k_num_memory - 1));
212 m68k_num_memory = 1;
213 }
214#endif
215}
216
217void __init setup_arch(char **cmdline_p)
218{
219 int i;
220
221 /* The bootinfo is located right after the kernel bss */
222 m68k_parse_bootinfo((const struct bi_record *)_end);
223
224 if (CPU_IS_040)
225 m68k_is040or060 = 4;
226 else if (CPU_IS_060)
227 m68k_is040or060 = 6;
228
229 /* FIXME: m68k_fputype is passed in by Penguin booter, which can
230 * be confused by software FPU emulation. BEWARE.
231 * We should really do our own FPU check at startup.
232 * [what do we do with buggy 68LC040s? if we have problems
233 * with them, we should add a test to check_bugs() below] */
234#ifndef CONFIG_M68KFPU_EMU_ONLY
235 /* clear the fpu if we have one */
236 if (m68k_fputype & (FPU_68881|FPU_68882|FPU_68040|FPU_68060)) {
237 volatile int zero = 0;
238 asm volatile ("frestore %0" : : "m" (zero));
239 }
240#endif
241
242 if (CPU_IS_060) {
243 u32 pcr;
244
245 asm (".chip 68060; movec %%pcr,%0; .chip 68k"
246 : "=d" (pcr));
247 if (((pcr >> 8) & 0xff) <= 5) {
248 printk("Enabling workaround for errata I14\n");
249 asm (".chip 68060; movec %0,%%pcr; .chip 68k"
250 : : "d" (pcr | 0x20));
251 }
252 }
253
254 init_mm.start_code = PAGE_OFFSET;
255 init_mm.end_code = (unsigned long)_etext;
256 init_mm.end_data = (unsigned long)_edata;
257 init_mm.brk = (unsigned long)_end;
258
259 *cmdline_p = m68k_command_line;
260 memcpy(boot_command_line, *cmdline_p, CL_SIZE);
261
262 parse_early_param();
263
264#ifdef CONFIG_DUMMY_CONSOLE
265 conswitchp = &dummy_con;
266#endif
267
268 switch (m68k_machtype) {
269#ifdef CONFIG_AMIGA
270 case MACH_AMIGA:
271 config_amiga();
272 break;
273#endif
274#ifdef CONFIG_ATARI
275 case MACH_ATARI:
276 config_atari();
277 break;
278#endif
279#ifdef CONFIG_MAC
280 case MACH_MAC:
281 config_mac();
282 break;
283#endif
284#ifdef CONFIG_SUN3
285 case MACH_SUN3:
286 config_sun3();
287 break;
288#endif
289#ifdef CONFIG_APOLLO
290 case MACH_APOLLO:
291 config_apollo();
292 break;
293#endif
294#ifdef CONFIG_MVME147
295 case MACH_MVME147:
296 config_mvme147();
297 break;
298#endif
299#ifdef CONFIG_MVME16x
300 case MACH_MVME16x:
301 config_mvme16x();
302 break;
303#endif
304#ifdef CONFIG_BVME6000
305 case MACH_BVME6000:
306 config_bvme6000();
307 break;
308#endif
309#ifdef CONFIG_HP300
310 case MACH_HP300:
311 config_hp300();
312 break;
313#endif
314#ifdef CONFIG_Q40
315 case MACH_Q40:
316 config_q40();
317 break;
318#endif
319#ifdef CONFIG_SUN3X
320 case MACH_SUN3X:
321 config_sun3x();
322 break;
323#endif
324 default:
325 panic("No configuration setup");
326 }
327
328#ifdef CONFIG_NATFEAT
329 nf_init();
330#endif
331
332 paging_init();
333
334#ifndef CONFIG_SUN3
335 for (i = 1; i < m68k_num_memory; i++)
336 free_bootmem_node(NODE_DATA(i), m68k_memory[i].addr,
337 m68k_memory[i].size);
338#ifdef CONFIG_BLK_DEV_INITRD
339 if (m68k_ramdisk.size) {
340 reserve_bootmem_node(__virt_to_node(phys_to_virt(m68k_ramdisk.addr)),
341 m68k_ramdisk.addr, m68k_ramdisk.size,
342 BOOTMEM_DEFAULT);
343 initrd_start = (unsigned long)phys_to_virt(m68k_ramdisk.addr);
344 initrd_end = initrd_start + m68k_ramdisk.size;
345 printk("initrd: %08lx - %08lx\n", initrd_start, initrd_end);
346 }
347#endif
348
349#ifdef CONFIG_ATARI
350 if (MACH_IS_ATARI)
351 atari_stram_reserve_pages((void *)availmem);
352#endif
353#ifdef CONFIG_SUN3X
354 if (MACH_IS_SUN3X) {
355 dvma_init();
356 }
357#endif
358
359#endif /* !CONFIG_SUN3 */
360
361/* set ISA defs early as possible */
362#if defined(CONFIG_ISA) && defined(MULTI_ISA)
363 if (MACH_IS_Q40) {
364 isa_type = ISA_TYPE_Q40;
365 isa_sex = 0;
366 }
367#ifdef CONFIG_AMIGA_PCMCIA
368 if (MACH_IS_AMIGA && AMIGAHW_PRESENT(PCMCIA)) {
369 isa_type = ISA_TYPE_AG;
370 isa_sex = 1;
371 }
372#endif
373#endif
374}
375
376static int show_cpuinfo(struct seq_file *m, void *v)
377{
378 const char *cpu, *mmu, *fpu;
379 unsigned long clockfreq, clockfactor;
380
381#define LOOP_CYCLES_68020 (8)
382#define LOOP_CYCLES_68030 (8)
383#define LOOP_CYCLES_68040 (3)
384#define LOOP_CYCLES_68060 (1)
385
386 if (CPU_IS_020) {
387 cpu = "68020";
388 clockfactor = LOOP_CYCLES_68020;
389 } else if (CPU_IS_030) {
390 cpu = "68030";
391 clockfactor = LOOP_CYCLES_68030;
392 } else if (CPU_IS_040) {
393 cpu = "68040";
394 clockfactor = LOOP_CYCLES_68040;
395 } else if (CPU_IS_060) {
396 cpu = "68060";
397 clockfactor = LOOP_CYCLES_68060;
398 } else {
399 cpu = "680x0";
400 clockfactor = 0;
401 }
402
403#ifdef CONFIG_M68KFPU_EMU_ONLY
404 fpu = "none(soft float)";
405#else 3#else
406 if (m68k_fputype & FPU_68881) 4#include "setup_no.c"
407 fpu = "68881";
408 else if (m68k_fputype & FPU_68882)
409 fpu = "68882";
410 else if (m68k_fputype & FPU_68040)
411 fpu = "68040";
412 else if (m68k_fputype & FPU_68060)
413 fpu = "68060";
414 else if (m68k_fputype & FPU_SUNFPA)
415 fpu = "Sun FPA";
416 else
417 fpu = "none";
418#endif
419
420 if (m68k_mmutype & MMU_68851)
421 mmu = "68851";
422 else if (m68k_mmutype & MMU_68030)
423 mmu = "68030";
424 else if (m68k_mmutype & MMU_68040)
425 mmu = "68040";
426 else if (m68k_mmutype & MMU_68060)
427 mmu = "68060";
428 else if (m68k_mmutype & MMU_SUN3)
429 mmu = "Sun-3";
430 else if (m68k_mmutype & MMU_APOLLO)
431 mmu = "Apollo";
432 else
433 mmu = "unknown";
434
435 clockfreq = loops_per_jiffy * HZ * clockfactor;
436
437 seq_printf(m, "CPU:\t\t%s\n"
438 "MMU:\t\t%s\n"
439 "FPU:\t\t%s\n"
440 "Clocking:\t%lu.%1luMHz\n"
441 "BogoMips:\t%lu.%02lu\n"
442 "Calibration:\t%lu loops\n",
443 cpu, mmu, fpu,
444 clockfreq/1000000,(clockfreq/100000)%10,
445 loops_per_jiffy/(500000/HZ),(loops_per_jiffy/(5000/HZ))%100,
446 loops_per_jiffy);
447 return 0;
448}
449
450static void *c_start(struct seq_file *m, loff_t *pos)
451{
452 return *pos < 1 ? (void *)1 : NULL;
453}
454static void *c_next(struct seq_file *m, void *v, loff_t *pos)
455{
456 ++*pos;
457 return NULL;
458}
459static void c_stop(struct seq_file *m, void *v)
460{
461}
462const struct seq_operations cpuinfo_op = {
463 .start = c_start,
464 .next = c_next,
465 .stop = c_stop,
466 .show = show_cpuinfo,
467};
468
469#ifdef CONFIG_PROC_HARDWARE
470static int hardware_proc_show(struct seq_file *m, void *v)
471{
472 char model[80];
473 unsigned long mem;
474 int i;
475
476 if (mach_get_model)
477 mach_get_model(model);
478 else
479 strcpy(model, "Unknown m68k");
480
481 seq_printf(m, "Model:\t\t%s\n", model);
482 for (mem = 0, i = 0; i < m68k_num_memory; i++)
483 mem += m68k_memory[i].size;
484 seq_printf(m, "System Memory:\t%ldK\n", mem >> 10);
485
486 if (mach_get_hardware_list)
487 mach_get_hardware_list(m);
488
489 return 0;
490}
491
492static int hardware_proc_open(struct inode *inode, struct file *file)
493{
494 return single_open(file, hardware_proc_show, NULL);
495}
496
497static const struct file_operations hardware_proc_fops = {
498 .open = hardware_proc_open,
499 .read = seq_read,
500 .llseek = seq_lseek,
501 .release = single_release,
502};
503
504static int __init proc_hardware_init(void)
505{
506 proc_create("hardware", 0, NULL, &hardware_proc_fops);
507 return 0;
508}
509module_init(proc_hardware_init);
510#endif 5#endif
511
512void check_bugs(void)
513{
514#ifndef CONFIG_M68KFPU_EMU
515 if (m68k_fputype == 0) {
516 printk(KERN_EMERG "*** YOU DO NOT HAVE A FLOATING POINT UNIT, "
517 "WHICH IS REQUIRED BY LINUX/M68K ***\n");
518 printk(KERN_EMERG "Upgrade your hardware or join the FPU "
519 "emulation project\n");
520 panic("no FPU");
521 }
522#endif /* !CONFIG_M68KFPU_EMU */
523}
524
525#ifdef CONFIG_ADB
526static int __init adb_probe_sync_enable (char *str) {
527 extern int __adb_probe_sync;
528 __adb_probe_sync = 1;
529 return 1;
530}
531
532__setup("adb_sync", adb_probe_sync_enable);
533#endif /* CONFIG_ADB */
diff --git a/arch/m68k/kernel/setup_mm.c b/arch/m68k/kernel/setup_mm.c
new file mode 100644
index 000000000000..334d83640376
--- /dev/null
+++ b/arch/m68k/kernel/setup_mm.c
@@ -0,0 +1,533 @@
1/*
2 * linux/arch/m68k/kernel/setup.c
3 *
4 * Copyright (C) 1995 Hamish Macdonald
5 */
6
7/*
8 * This file handles the architecture-dependent parts of system setup
9 */
10
11#include <linux/kernel.h>
12#include <linux/mm.h>
13#include <linux/sched.h>
14#include <linux/delay.h>
15#include <linux/interrupt.h>
16#include <linux/fs.h>
17#include <linux/console.h>
18#include <linux/genhd.h>
19#include <linux/errno.h>
20#include <linux/string.h>
21#include <linux/init.h>
22#include <linux/bootmem.h>
23#include <linux/proc_fs.h>
24#include <linux/seq_file.h>
25#include <linux/module.h>
26#include <linux/initrd.h>
27
28#include <asm/bootinfo.h>
29#include <asm/sections.h>
30#include <asm/setup.h>
31#include <asm/fpu.h>
32#include <asm/irq.h>
33#include <asm/io.h>
34#include <asm/machdep.h>
35#ifdef CONFIG_AMIGA
36#include <asm/amigahw.h>
37#endif
38#ifdef CONFIG_ATARI
39#include <asm/atarihw.h>
40#include <asm/atari_stram.h>
41#endif
42#ifdef CONFIG_SUN3X
43#include <asm/dvma.h>
44#endif
45#include <asm/natfeat.h>
46
47#if !FPSTATESIZE || !NR_IRQS
48#warning No CPU/platform type selected, your kernel will not work!
49#warning Are you building an allnoconfig kernel?
50#endif
51
52unsigned long m68k_machtype;
53EXPORT_SYMBOL(m68k_machtype);
54unsigned long m68k_cputype;
55EXPORT_SYMBOL(m68k_cputype);
56unsigned long m68k_fputype;
57unsigned long m68k_mmutype;
58EXPORT_SYMBOL(m68k_mmutype);
59#ifdef CONFIG_VME
60unsigned long vme_brdtype;
61EXPORT_SYMBOL(vme_brdtype);
62#endif
63
64int m68k_is040or060;
65EXPORT_SYMBOL(m68k_is040or060);
66
67extern unsigned long availmem;
68
69int m68k_num_memory;
70EXPORT_SYMBOL(m68k_num_memory);
71int m68k_realnum_memory;
72EXPORT_SYMBOL(m68k_realnum_memory);
73unsigned long m68k_memoffset;
74struct mem_info m68k_memory[NUM_MEMINFO];
75EXPORT_SYMBOL(m68k_memory);
76
77struct mem_info m68k_ramdisk;
78
79static char m68k_command_line[CL_SIZE];
80
81void (*mach_sched_init) (irq_handler_t handler) __initdata = NULL;
82/* machine dependent irq functions */
83void (*mach_init_IRQ) (void) __initdata = NULL;
84void (*mach_get_model) (char *model);
85void (*mach_get_hardware_list) (struct seq_file *m);
86/* machine dependent timer functions */
87unsigned long (*mach_gettimeoffset) (void);
88int (*mach_hwclk) (int, struct rtc_time*);
89EXPORT_SYMBOL(mach_hwclk);
90int (*mach_set_clock_mmss) (unsigned long);
91unsigned int (*mach_get_ss)(void);
92int (*mach_get_rtc_pll)(struct rtc_pll_info *);
93int (*mach_set_rtc_pll)(struct rtc_pll_info *);
94EXPORT_SYMBOL(mach_get_ss);
95EXPORT_SYMBOL(mach_get_rtc_pll);
96EXPORT_SYMBOL(mach_set_rtc_pll);
97void (*mach_reset)( void );
98void (*mach_halt)( void );
99void (*mach_power_off)( void );
100long mach_max_dma_address = 0x00ffffff; /* default set to the lower 16MB */
101#ifdef CONFIG_HEARTBEAT
102void (*mach_heartbeat) (int);
103EXPORT_SYMBOL(mach_heartbeat);
104#endif
105#ifdef CONFIG_M68K_L2_CACHE
106void (*mach_l2_flush) (int);
107#endif
108#if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE)
109void (*mach_beep)(unsigned int, unsigned int);
110EXPORT_SYMBOL(mach_beep);
111#endif
112#if defined(CONFIG_ISA) && defined(MULTI_ISA)
113int isa_type;
114int isa_sex;
115EXPORT_SYMBOL(isa_type);
116EXPORT_SYMBOL(isa_sex);
117#endif
118
119extern int amiga_parse_bootinfo(const struct bi_record *);
120extern int atari_parse_bootinfo(const struct bi_record *);
121extern int mac_parse_bootinfo(const struct bi_record *);
122extern int q40_parse_bootinfo(const struct bi_record *);
123extern int bvme6000_parse_bootinfo(const struct bi_record *);
124extern int mvme16x_parse_bootinfo(const struct bi_record *);
125extern int mvme147_parse_bootinfo(const struct bi_record *);
126extern int hp300_parse_bootinfo(const struct bi_record *);
127extern int apollo_parse_bootinfo(const struct bi_record *);
128
129extern void config_amiga(void);
130extern void config_atari(void);
131extern void config_mac(void);
132extern void config_sun3(void);
133extern void config_apollo(void);
134extern void config_mvme147(void);
135extern void config_mvme16x(void);
136extern void config_bvme6000(void);
137extern void config_hp300(void);
138extern void config_q40(void);
139extern void config_sun3x(void);
140
141#define MASK_256K 0xfffc0000
142
143extern void paging_init(void);
144
145static void __init m68k_parse_bootinfo(const struct bi_record *record)
146{
147 while (record->tag != BI_LAST) {
148 int unknown = 0;
149 const unsigned long *data = record->data;
150
151 switch (record->tag) {
152 case BI_MACHTYPE:
153 case BI_CPUTYPE:
154 case BI_FPUTYPE:
155 case BI_MMUTYPE:
156 /* Already set up by head.S */
157 break;
158
159 case BI_MEMCHUNK:
160 if (m68k_num_memory < NUM_MEMINFO) {
161 m68k_memory[m68k_num_memory].addr = data[0];
162 m68k_memory[m68k_num_memory].size = data[1];
163 m68k_num_memory++;
164 } else
165 printk("m68k_parse_bootinfo: too many memory chunks\n");
166 break;
167
168 case BI_RAMDISK:
169 m68k_ramdisk.addr = data[0];
170 m68k_ramdisk.size = data[1];
171 break;
172
173 case BI_COMMAND_LINE:
174 strlcpy(m68k_command_line, (const char *)data,
175 sizeof(m68k_command_line));
176 break;
177
178 default:
179 if (MACH_IS_AMIGA)
180 unknown = amiga_parse_bootinfo(record);
181 else if (MACH_IS_ATARI)
182 unknown = atari_parse_bootinfo(record);
183 else if (MACH_IS_MAC)
184 unknown = mac_parse_bootinfo(record);
185 else if (MACH_IS_Q40)
186 unknown = q40_parse_bootinfo(record);
187 else if (MACH_IS_BVME6000)
188 unknown = bvme6000_parse_bootinfo(record);
189 else if (MACH_IS_MVME16x)
190 unknown = mvme16x_parse_bootinfo(record);
191 else if (MACH_IS_MVME147)
192 unknown = mvme147_parse_bootinfo(record);
193 else if (MACH_IS_HP300)
194 unknown = hp300_parse_bootinfo(record);
195 else if (MACH_IS_APOLLO)
196 unknown = apollo_parse_bootinfo(record);
197 else
198 unknown = 1;
199 }
200 if (unknown)
201 printk("m68k_parse_bootinfo: unknown tag 0x%04x ignored\n",
202 record->tag);
203 record = (struct bi_record *)((unsigned long)record +
204 record->size);
205 }
206
207 m68k_realnum_memory = m68k_num_memory;
208#ifdef CONFIG_SINGLE_MEMORY_CHUNK
209 if (m68k_num_memory > 1) {
210 printk("Ignoring last %i chunks of physical memory\n",
211 (m68k_num_memory - 1));
212 m68k_num_memory = 1;
213 }
214#endif
215}
216
217void __init setup_arch(char **cmdline_p)
218{
219 int i;
220
221 /* The bootinfo is located right after the kernel bss */
222 m68k_parse_bootinfo((const struct bi_record *)_end);
223
224 if (CPU_IS_040)
225 m68k_is040or060 = 4;
226 else if (CPU_IS_060)
227 m68k_is040or060 = 6;
228
229 /* FIXME: m68k_fputype is passed in by Penguin booter, which can
230 * be confused by software FPU emulation. BEWARE.
231 * We should really do our own FPU check at startup.
232 * [what do we do with buggy 68LC040s? if we have problems
233 * with them, we should add a test to check_bugs() below] */
234#ifndef CONFIG_M68KFPU_EMU_ONLY
235 /* clear the fpu if we have one */
236 if (m68k_fputype & (FPU_68881|FPU_68882|FPU_68040|FPU_68060)) {
237 volatile int zero = 0;
238 asm volatile ("frestore %0" : : "m" (zero));
239 }
240#endif
241
242 if (CPU_IS_060) {
243 u32 pcr;
244
245 asm (".chip 68060; movec %%pcr,%0; .chip 68k"
246 : "=d" (pcr));
247 if (((pcr >> 8) & 0xff) <= 5) {
248 printk("Enabling workaround for errata I14\n");
249 asm (".chip 68060; movec %0,%%pcr; .chip 68k"
250 : : "d" (pcr | 0x20));
251 }
252 }
253
254 init_mm.start_code = PAGE_OFFSET;
255 init_mm.end_code = (unsigned long)_etext;
256 init_mm.end_data = (unsigned long)_edata;
257 init_mm.brk = (unsigned long)_end;
258
259 *cmdline_p = m68k_command_line;
260 memcpy(boot_command_line, *cmdline_p, CL_SIZE);
261
262 parse_early_param();
263
264#ifdef CONFIG_DUMMY_CONSOLE
265 conswitchp = &dummy_con;
266#endif
267
268 switch (m68k_machtype) {
269#ifdef CONFIG_AMIGA
270 case MACH_AMIGA:
271 config_amiga();
272 break;
273#endif
274#ifdef CONFIG_ATARI
275 case MACH_ATARI:
276 config_atari();
277 break;
278#endif
279#ifdef CONFIG_MAC
280 case MACH_MAC:
281 config_mac();
282 break;
283#endif
284#ifdef CONFIG_SUN3
285 case MACH_SUN3:
286 config_sun3();
287 break;
288#endif
289#ifdef CONFIG_APOLLO
290 case MACH_APOLLO:
291 config_apollo();
292 break;
293#endif
294#ifdef CONFIG_MVME147
295 case MACH_MVME147:
296 config_mvme147();
297 break;
298#endif
299#ifdef CONFIG_MVME16x
300 case MACH_MVME16x:
301 config_mvme16x();
302 break;
303#endif
304#ifdef CONFIG_BVME6000
305 case MACH_BVME6000:
306 config_bvme6000();
307 break;
308#endif
309#ifdef CONFIG_HP300
310 case MACH_HP300:
311 config_hp300();
312 break;
313#endif
314#ifdef CONFIG_Q40
315 case MACH_Q40:
316 config_q40();
317 break;
318#endif
319#ifdef CONFIG_SUN3X
320 case MACH_SUN3X:
321 config_sun3x();
322 break;
323#endif
324 default:
325 panic("No configuration setup");
326 }
327
328#ifdef CONFIG_NATFEAT
329 nf_init();
330#endif
331
332 paging_init();
333
334#ifndef CONFIG_SUN3
335 for (i = 1; i < m68k_num_memory; i++)
336 free_bootmem_node(NODE_DATA(i), m68k_memory[i].addr,
337 m68k_memory[i].size);
338#ifdef CONFIG_BLK_DEV_INITRD
339 if (m68k_ramdisk.size) {
340 reserve_bootmem_node(__virt_to_node(phys_to_virt(m68k_ramdisk.addr)),
341 m68k_ramdisk.addr, m68k_ramdisk.size,
342 BOOTMEM_DEFAULT);
343 initrd_start = (unsigned long)phys_to_virt(m68k_ramdisk.addr);
344 initrd_end = initrd_start + m68k_ramdisk.size;
345 printk("initrd: %08lx - %08lx\n", initrd_start, initrd_end);
346 }
347#endif
348
349#ifdef CONFIG_ATARI
350 if (MACH_IS_ATARI)
351 atari_stram_reserve_pages((void *)availmem);
352#endif
353#ifdef CONFIG_SUN3X
354 if (MACH_IS_SUN3X) {
355 dvma_init();
356 }
357#endif
358
359#endif /* !CONFIG_SUN3 */
360
361/* set ISA defs early as possible */
362#if defined(CONFIG_ISA) && defined(MULTI_ISA)
363 if (MACH_IS_Q40) {
364 isa_type = ISA_TYPE_Q40;
365 isa_sex = 0;
366 }
367#ifdef CONFIG_AMIGA_PCMCIA
368 if (MACH_IS_AMIGA && AMIGAHW_PRESENT(PCMCIA)) {
369 isa_type = ISA_TYPE_AG;
370 isa_sex = 1;
371 }
372#endif
373#endif
374}
375
376static int show_cpuinfo(struct seq_file *m, void *v)
377{
378 const char *cpu, *mmu, *fpu;
379 unsigned long clockfreq, clockfactor;
380
381#define LOOP_CYCLES_68020 (8)
382#define LOOP_CYCLES_68030 (8)
383#define LOOP_CYCLES_68040 (3)
384#define LOOP_CYCLES_68060 (1)
385
386 if (CPU_IS_020) {
387 cpu = "68020";
388 clockfactor = LOOP_CYCLES_68020;
389 } else if (CPU_IS_030) {
390 cpu = "68030";
391 clockfactor = LOOP_CYCLES_68030;
392 } else if (CPU_IS_040) {
393 cpu = "68040";
394 clockfactor = LOOP_CYCLES_68040;
395 } else if (CPU_IS_060) {
396 cpu = "68060";
397 clockfactor = LOOP_CYCLES_68060;
398 } else {
399 cpu = "680x0";
400 clockfactor = 0;
401 }
402
403#ifdef CONFIG_M68KFPU_EMU_ONLY
404 fpu = "none(soft float)";
405#else
406 if (m68k_fputype & FPU_68881)
407 fpu = "68881";
408 else if (m68k_fputype & FPU_68882)
409 fpu = "68882";
410 else if (m68k_fputype & FPU_68040)
411 fpu = "68040";
412 else if (m68k_fputype & FPU_68060)
413 fpu = "68060";
414 else if (m68k_fputype & FPU_SUNFPA)
415 fpu = "Sun FPA";
416 else
417 fpu = "none";
418#endif
419
420 if (m68k_mmutype & MMU_68851)
421 mmu = "68851";
422 else if (m68k_mmutype & MMU_68030)
423 mmu = "68030";
424 else if (m68k_mmutype & MMU_68040)
425 mmu = "68040";
426 else if (m68k_mmutype & MMU_68060)
427 mmu = "68060";
428 else if (m68k_mmutype & MMU_SUN3)
429 mmu = "Sun-3";
430 else if (m68k_mmutype & MMU_APOLLO)
431 mmu = "Apollo";
432 else
433 mmu = "unknown";
434
435 clockfreq = loops_per_jiffy * HZ * clockfactor;
436
437 seq_printf(m, "CPU:\t\t%s\n"
438 "MMU:\t\t%s\n"
439 "FPU:\t\t%s\n"
440 "Clocking:\t%lu.%1luMHz\n"
441 "BogoMips:\t%lu.%02lu\n"
442 "Calibration:\t%lu loops\n",
443 cpu, mmu, fpu,
444 clockfreq/1000000,(clockfreq/100000)%10,
445 loops_per_jiffy/(500000/HZ),(loops_per_jiffy/(5000/HZ))%100,
446 loops_per_jiffy);
447 return 0;
448}
449
450static void *c_start(struct seq_file *m, loff_t *pos)
451{
452 return *pos < 1 ? (void *)1 : NULL;
453}
454static void *c_next(struct seq_file *m, void *v, loff_t *pos)
455{
456 ++*pos;
457 return NULL;
458}
459static void c_stop(struct seq_file *m, void *v)
460{
461}
462const struct seq_operations cpuinfo_op = {
463 .start = c_start,
464 .next = c_next,
465 .stop = c_stop,
466 .show = show_cpuinfo,
467};
468
469#ifdef CONFIG_PROC_HARDWARE
470static int hardware_proc_show(struct seq_file *m, void *v)
471{
472 char model[80];
473 unsigned long mem;
474 int i;
475
476 if (mach_get_model)
477 mach_get_model(model);
478 else
479 strcpy(model, "Unknown m68k");
480
481 seq_printf(m, "Model:\t\t%s\n", model);
482 for (mem = 0, i = 0; i < m68k_num_memory; i++)
483 mem += m68k_memory[i].size;
484 seq_printf(m, "System Memory:\t%ldK\n", mem >> 10);
485
486 if (mach_get_hardware_list)
487 mach_get_hardware_list(m);
488
489 return 0;
490}
491
492static int hardware_proc_open(struct inode *inode, struct file *file)
493{
494 return single_open(file, hardware_proc_show, NULL);
495}
496
497static const struct file_operations hardware_proc_fops = {
498 .open = hardware_proc_open,
499 .read = seq_read,
500 .llseek = seq_lseek,
501 .release = single_release,
502};
503
504static int __init proc_hardware_init(void)
505{
506 proc_create("hardware", 0, NULL, &hardware_proc_fops);
507 return 0;
508}
509module_init(proc_hardware_init);
510#endif
511
512void check_bugs(void)
513{
514#ifndef CONFIG_M68KFPU_EMU
515 if (m68k_fputype == 0) {
516 printk(KERN_EMERG "*** YOU DO NOT HAVE A FLOATING POINT UNIT, "
517 "WHICH IS REQUIRED BY LINUX/M68K ***\n");
518 printk(KERN_EMERG "Upgrade your hardware or join the FPU "
519 "emulation project\n");
520 panic("no FPU");
521 }
522#endif /* !CONFIG_M68KFPU_EMU */
523}
524
525#ifdef CONFIG_ADB
526static int __init adb_probe_sync_enable (char *str) {
527 extern int __adb_probe_sync;
528 __adb_probe_sync = 1;
529 return 1;
530}
531
532__setup("adb_sync", adb_probe_sync_enable);
533#endif /* CONFIG_ADB */
diff --git a/arch/m68knommu/kernel/setup.c b/arch/m68k/kernel/setup_no.c
index 16b2de7f5101..16b2de7f5101 100644
--- a/arch/m68knommu/kernel/setup.c
+++ b/arch/m68k/kernel/setup_no.c
diff --git a/arch/m68k/kernel/signal.c b/arch/m68k/kernel/signal.c
index a0afc239304e..2e25713e2ead 100644
--- a/arch/m68k/kernel/signal.c
+++ b/arch/m68k/kernel/signal.c
@@ -1,1017 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * linux/arch/m68k/kernel/signal.c 2#include "signal_mm.c"
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11/*
12 * Linux/m68k support by Hamish Macdonald
13 *
14 * 68060 fixes by Jesper Skov
15 *
16 * 1997-12-01 Modified for POSIX.1b signals by Andreas Schwab
17 *
18 * mathemu support by Roman Zippel
19 * (Note: fpstate in the signal context is completely ignored for the emulator
20 * and the internal floating point format is put on stack)
21 */
22
23/*
24 * ++roman (07/09/96): implemented signal stacks (specially for tosemu on
25 * Atari :-) Current limitation: Only one sigstack can be active at one time.
26 * If a second signal with SA_ONSTACK set arrives while working on a sigstack,
27 * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested
28 * signal handlers!
29 */
30
31#include <linux/sched.h>
32#include <linux/mm.h>
33#include <linux/kernel.h>
34#include <linux/signal.h>
35#include <linux/syscalls.h>
36#include <linux/errno.h>
37#include <linux/wait.h>
38#include <linux/ptrace.h>
39#include <linux/unistd.h>
40#include <linux/stddef.h>
41#include <linux/highuid.h>
42#include <linux/personality.h>
43#include <linux/tty.h>
44#include <linux/binfmts.h>
45#include <linux/module.h>
46
47#include <asm/setup.h>
48#include <asm/uaccess.h>
49#include <asm/pgtable.h>
50#include <asm/traps.h>
51#include <asm/ucontext.h>
52
53#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
54
55static const int frame_extra_sizes[16] = {
56 [1] = -1, /* sizeof(((struct frame *)0)->un.fmt1), */
57 [2] = sizeof(((struct frame *)0)->un.fmt2),
58 [3] = sizeof(((struct frame *)0)->un.fmt3),
59 [4] = sizeof(((struct frame *)0)->un.fmt4),
60 [5] = -1, /* sizeof(((struct frame *)0)->un.fmt5), */
61 [6] = -1, /* sizeof(((struct frame *)0)->un.fmt6), */
62 [7] = sizeof(((struct frame *)0)->un.fmt7),
63 [8] = -1, /* sizeof(((struct frame *)0)->un.fmt8), */
64 [9] = sizeof(((struct frame *)0)->un.fmt9),
65 [10] = sizeof(((struct frame *)0)->un.fmta),
66 [11] = sizeof(((struct frame *)0)->un.fmtb),
67 [12] = -1, /* sizeof(((struct frame *)0)->un.fmtc), */
68 [13] = -1, /* sizeof(((struct frame *)0)->un.fmtd), */
69 [14] = -1, /* sizeof(((struct frame *)0)->un.fmte), */
70 [15] = -1, /* sizeof(((struct frame *)0)->un.fmtf), */
71};
72
73int handle_kernel_fault(struct pt_regs *regs)
74{
75 const struct exception_table_entry *fixup;
76 struct pt_regs *tregs;
77
78 /* Are we prepared to handle this kernel fault? */
79 fixup = search_exception_tables(regs->pc);
80 if (!fixup)
81 return 0;
82
83 /* Create a new four word stack frame, discarding the old one. */
84 regs->stkadj = frame_extra_sizes[regs->format];
85 tregs = (struct pt_regs *)((long)regs + regs->stkadj);
86 tregs->vector = regs->vector;
87 tregs->format = 0;
88 tregs->pc = fixup->fixup;
89 tregs->sr = regs->sr;
90
91 return 1;
92}
93
94/*
95 * Atomically swap in the new signal mask, and wait for a signal.
96 */
97asmlinkage int
98sys_sigsuspend(int unused0, int unused1, old_sigset_t mask)
99{
100 mask &= _BLOCKABLE;
101 spin_lock_irq(&current->sighand->siglock);
102 current->saved_sigmask = current->blocked;
103 siginitset(&current->blocked, mask);
104 recalc_sigpending();
105 spin_unlock_irq(&current->sighand->siglock);
106
107 current->state = TASK_INTERRUPTIBLE;
108 schedule();
109 set_restore_sigmask();
110
111 return -ERESTARTNOHAND;
112}
113
114asmlinkage int
115sys_sigaction(int sig, const struct old_sigaction __user *act,
116 struct old_sigaction __user *oact)
117{
118 struct k_sigaction new_ka, old_ka;
119 int ret;
120
121 if (act) {
122 old_sigset_t mask;
123 if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
124 __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
125 __get_user(new_ka.sa.sa_restorer, &act->sa_restorer) ||
126 __get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
127 __get_user(mask, &act->sa_mask))
128 return -EFAULT;
129 siginitset(&new_ka.sa.sa_mask, mask);
130 }
131
132 ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
133
134 if (!ret && oact) {
135 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
136 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
137 __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer) ||
138 __put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
139 __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
140 return -EFAULT;
141 }
142
143 return ret;
144}
145
146asmlinkage int
147sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)
148{
149 return do_sigaltstack(uss, uoss, rdusp());
150}
151
152
153/*
154 * Do a signal return; undo the signal stack.
155 *
156 * Keep the return code on the stack quadword aligned!
157 * That makes the cache flush below easier.
158 */
159
160struct sigframe
161{
162 char __user *pretcode;
163 int sig;
164 int code;
165 struct sigcontext __user *psc;
166 char retcode[8];
167 unsigned long extramask[_NSIG_WORDS-1];
168 struct sigcontext sc;
169};
170
171struct rt_sigframe
172{
173 char __user *pretcode;
174 int sig;
175 struct siginfo __user *pinfo;
176 void __user *puc;
177 char retcode[8];
178 struct siginfo info;
179 struct ucontext uc;
180};
181
182
183static unsigned char fpu_version; /* version number of fpu, set by setup_frame */
184
185static inline int restore_fpu_state(struct sigcontext *sc)
186{
187 int err = 1;
188
189 if (FPU_IS_EMU) {
190 /* restore registers */
191 memcpy(current->thread.fpcntl, sc->sc_fpcntl, 12);
192 memcpy(current->thread.fp, sc->sc_fpregs, 24);
193 return 0;
194 }
195
196 if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
197 /* Verify the frame format. */
198 if (!CPU_IS_060 && (sc->sc_fpstate[0] != fpu_version))
199 goto out;
200 if (CPU_IS_020_OR_030) {
201 if (m68k_fputype & FPU_68881 &&
202 !(sc->sc_fpstate[1] == 0x18 || sc->sc_fpstate[1] == 0xb4))
203 goto out;
204 if (m68k_fputype & FPU_68882 &&
205 !(sc->sc_fpstate[1] == 0x38 || sc->sc_fpstate[1] == 0xd4))
206 goto out;
207 } else if (CPU_IS_040) {
208 if (!(sc->sc_fpstate[1] == 0x00 ||
209 sc->sc_fpstate[1] == 0x28 ||
210 sc->sc_fpstate[1] == 0x60))
211 goto out;
212 } else if (CPU_IS_060) {
213 if (!(sc->sc_fpstate[3] == 0x00 ||
214 sc->sc_fpstate[3] == 0x60 ||
215 sc->sc_fpstate[3] == 0xe0))
216 goto out;
217 } else
218 goto out;
219
220 __asm__ volatile (".chip 68k/68881\n\t"
221 "fmovemx %0,%%fp0-%%fp1\n\t"
222 "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
223 ".chip 68k"
224 : /* no outputs */
225 : "m" (*sc->sc_fpregs), "m" (*sc->sc_fpcntl));
226 }
227 __asm__ volatile (".chip 68k/68881\n\t"
228 "frestore %0\n\t"
229 ".chip 68k" : : "m" (*sc->sc_fpstate));
230 err = 0;
231
232out:
233 return err;
234}
235
236#define FPCONTEXT_SIZE 216
237#define uc_fpstate uc_filler[0]
238#define uc_formatvec uc_filler[FPCONTEXT_SIZE/4]
239#define uc_extra uc_filler[FPCONTEXT_SIZE/4+1]
240
241static inline int rt_restore_fpu_state(struct ucontext __user *uc)
242{
243 unsigned char fpstate[FPCONTEXT_SIZE];
244 int context_size = CPU_IS_060 ? 8 : 0;
245 fpregset_t fpregs;
246 int err = 1;
247
248 if (FPU_IS_EMU) {
249 /* restore fpu control register */
250 if (__copy_from_user(current->thread.fpcntl,
251 uc->uc_mcontext.fpregs.f_fpcntl, 12))
252 goto out;
253 /* restore all other fpu register */
254 if (__copy_from_user(current->thread.fp,
255 uc->uc_mcontext.fpregs.f_fpregs, 96))
256 goto out;
257 return 0;
258 }
259
260 if (__get_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate))
261 goto out;
262 if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
263 if (!CPU_IS_060)
264 context_size = fpstate[1];
265 /* Verify the frame format. */
266 if (!CPU_IS_060 && (fpstate[0] != fpu_version))
267 goto out;
268 if (CPU_IS_020_OR_030) {
269 if (m68k_fputype & FPU_68881 &&
270 !(context_size == 0x18 || context_size == 0xb4))
271 goto out;
272 if (m68k_fputype & FPU_68882 &&
273 !(context_size == 0x38 || context_size == 0xd4))
274 goto out;
275 } else if (CPU_IS_040) {
276 if (!(context_size == 0x00 ||
277 context_size == 0x28 ||
278 context_size == 0x60))
279 goto out;
280 } else if (CPU_IS_060) {
281 if (!(fpstate[3] == 0x00 ||
282 fpstate[3] == 0x60 ||
283 fpstate[3] == 0xe0))
284 goto out;
285 } else
286 goto out;
287 if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs,
288 sizeof(fpregs)))
289 goto out;
290 __asm__ volatile (".chip 68k/68881\n\t"
291 "fmovemx %0,%%fp0-%%fp7\n\t"
292 "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
293 ".chip 68k"
294 : /* no outputs */
295 : "m" (*fpregs.f_fpregs),
296 "m" (*fpregs.f_fpcntl));
297 }
298 if (context_size &&
299 __copy_from_user(fpstate + 4, (long __user *)&uc->uc_fpstate + 1,
300 context_size))
301 goto out;
302 __asm__ volatile (".chip 68k/68881\n\t"
303 "frestore %0\n\t"
304 ".chip 68k" : : "m" (*fpstate));
305 err = 0;
306
307out:
308 return err;
309}
310
311static int mangle_kernel_stack(struct pt_regs *regs, int formatvec,
312 void __user *fp)
313{
314 int fsize = frame_extra_sizes[formatvec >> 12];
315 if (fsize < 0) {
316 /*
317 * user process trying to return with weird frame format
318 */
319#ifdef DEBUG
320 printk("user process returning with weird frame format\n");
321#endif
322 return 1;
323 }
324 if (!fsize) {
325 regs->format = formatvec >> 12;
326 regs->vector = formatvec & 0xfff;
327 } else {
328 struct switch_stack *sw = (struct switch_stack *)regs - 1;
329 unsigned long buf[fsize / 2]; /* yes, twice as much */
330
331 /* that'll make sure that expansion won't crap over data */
332 if (copy_from_user(buf + fsize / 4, fp, fsize))
333 return 1;
334
335 /* point of no return */
336 regs->format = formatvec >> 12;
337 regs->vector = formatvec & 0xfff;
338#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack))
339 __asm__ __volatile__
340 (" movel %0,%/a0\n\t"
341 " subl %1,%/a0\n\t" /* make room on stack */
342 " movel %/a0,%/sp\n\t" /* set stack pointer */
343 /* move switch_stack and pt_regs */
344 "1: movel %0@+,%/a0@+\n\t"
345 " dbra %2,1b\n\t"
346 " lea %/sp@(%c3),%/a0\n\t" /* add offset of fmt */
347 " lsrl #2,%1\n\t"
348 " subql #1,%1\n\t"
349 /* copy to the gap we'd made */
350 "2: movel %4@+,%/a0@+\n\t"
351 " dbra %1,2b\n\t"
352 " bral ret_from_signal\n"
353 : /* no outputs, it doesn't ever return */
354 : "a" (sw), "d" (fsize), "d" (frame_offset/4-1),
355 "n" (frame_offset), "a" (buf + fsize/4)
356 : "a0");
357#undef frame_offset
358 }
359 return 0;
360}
361
362static inline int
363restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *usc, void __user *fp)
364{
365 int formatvec;
366 struct sigcontext context;
367 int err;
368
369 /* Always make any pending restarted system calls return -EINTR */
370 current_thread_info()->restart_block.fn = do_no_restart_syscall;
371
372 /* get previous context */
373 if (copy_from_user(&context, usc, sizeof(context)))
374 goto badframe;
375
376 /* restore passed registers */
377 regs->d0 = context.sc_d0;
378 regs->d1 = context.sc_d1;
379 regs->a0 = context.sc_a0;
380 regs->a1 = context.sc_a1;
381 regs->sr = (regs->sr & 0xff00) | (context.sc_sr & 0xff);
382 regs->pc = context.sc_pc;
383 regs->orig_d0 = -1; /* disable syscall checks */
384 wrusp(context.sc_usp);
385 formatvec = context.sc_formatvec;
386
387 err = restore_fpu_state(&context);
388
389 if (err || mangle_kernel_stack(regs, formatvec, fp))
390 goto badframe;
391
392 return 0;
393
394badframe:
395 return 1;
396}
397
398static inline int
399rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw,
400 struct ucontext __user *uc)
401{
402 int temp;
403 greg_t __user *gregs = uc->uc_mcontext.gregs;
404 unsigned long usp;
405 int err;
406
407 /* Always make any pending restarted system calls return -EINTR */
408 current_thread_info()->restart_block.fn = do_no_restart_syscall;
409
410 err = __get_user(temp, &uc->uc_mcontext.version);
411 if (temp != MCONTEXT_VERSION)
412 goto badframe;
413 /* restore passed registers */
414 err |= __get_user(regs->d0, &gregs[0]);
415 err |= __get_user(regs->d1, &gregs[1]);
416 err |= __get_user(regs->d2, &gregs[2]);
417 err |= __get_user(regs->d3, &gregs[3]);
418 err |= __get_user(regs->d4, &gregs[4]);
419 err |= __get_user(regs->d5, &gregs[5]);
420 err |= __get_user(sw->d6, &gregs[6]);
421 err |= __get_user(sw->d7, &gregs[7]);
422 err |= __get_user(regs->a0, &gregs[8]);
423 err |= __get_user(regs->a1, &gregs[9]);
424 err |= __get_user(regs->a2, &gregs[10]);
425 err |= __get_user(sw->a3, &gregs[11]);
426 err |= __get_user(sw->a4, &gregs[12]);
427 err |= __get_user(sw->a5, &gregs[13]);
428 err |= __get_user(sw->a6, &gregs[14]);
429 err |= __get_user(usp, &gregs[15]);
430 wrusp(usp);
431 err |= __get_user(regs->pc, &gregs[16]);
432 err |= __get_user(temp, &gregs[17]);
433 regs->sr = (regs->sr & 0xff00) | (temp & 0xff);
434 regs->orig_d0 = -1; /* disable syscall checks */
435 err |= __get_user(temp, &uc->uc_formatvec);
436
437 err |= rt_restore_fpu_state(uc);
438
439 if (err || do_sigaltstack(&uc->uc_stack, NULL, usp) == -EFAULT)
440 goto badframe;
441
442 if (mangle_kernel_stack(regs, temp, &uc->uc_extra))
443 goto badframe;
444
445 return 0;
446
447badframe:
448 return 1;
449}
450
451asmlinkage int do_sigreturn(unsigned long __unused)
452{
453 struct switch_stack *sw = (struct switch_stack *) &__unused;
454 struct pt_regs *regs = (struct pt_regs *) (sw + 1);
455 unsigned long usp = rdusp();
456 struct sigframe __user *frame = (struct sigframe __user *)(usp - 4);
457 sigset_t set;
458
459 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
460 goto badframe;
461 if (__get_user(set.sig[0], &frame->sc.sc_mask) ||
462 (_NSIG_WORDS > 1 &&
463 __copy_from_user(&set.sig[1], &frame->extramask,
464 sizeof(frame->extramask))))
465 goto badframe;
466
467 sigdelsetmask(&set, ~_BLOCKABLE);
468 current->blocked = set;
469 recalc_sigpending();
470
471 if (restore_sigcontext(regs, &frame->sc, frame + 1))
472 goto badframe;
473 return regs->d0;
474
475badframe:
476 force_sig(SIGSEGV, current);
477 return 0;
478}
479
480asmlinkage int do_rt_sigreturn(unsigned long __unused)
481{
482 struct switch_stack *sw = (struct switch_stack *) &__unused;
483 struct pt_regs *regs = (struct pt_regs *) (sw + 1);
484 unsigned long usp = rdusp();
485 struct rt_sigframe __user *frame = (struct rt_sigframe __user *)(usp - 4);
486 sigset_t set;
487
488 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
489 goto badframe;
490 if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
491 goto badframe;
492
493 sigdelsetmask(&set, ~_BLOCKABLE);
494 current->blocked = set;
495 recalc_sigpending();
496
497 if (rt_restore_ucontext(regs, sw, &frame->uc))
498 goto badframe;
499 return regs->d0;
500
501badframe:
502 force_sig(SIGSEGV, current);
503 return 0;
504}
505
506/*
507 * Set up a signal frame.
508 */
509
510static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
511{
512 if (FPU_IS_EMU) {
513 /* save registers */
514 memcpy(sc->sc_fpcntl, current->thread.fpcntl, 12);
515 memcpy(sc->sc_fpregs, current->thread.fp, 24);
516 return;
517 }
518
519 __asm__ volatile (".chip 68k/68881\n\t"
520 "fsave %0\n\t"
521 ".chip 68k"
522 : : "m" (*sc->sc_fpstate) : "memory");
523
524 if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
525 fpu_version = sc->sc_fpstate[0];
526 if (CPU_IS_020_OR_030 &&
527 regs->vector >= (VEC_FPBRUC * 4) &&
528 regs->vector <= (VEC_FPNAN * 4)) {
529 /* Clear pending exception in 68882 idle frame */
530 if (*(unsigned short *) sc->sc_fpstate == 0x1f38)
531 sc->sc_fpstate[0x38] |= 1 << 3;
532 }
533 __asm__ volatile (".chip 68k/68881\n\t"
534 "fmovemx %%fp0-%%fp1,%0\n\t"
535 "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
536 ".chip 68k"
537 : "=m" (*sc->sc_fpregs),
538 "=m" (*sc->sc_fpcntl)
539 : /* no inputs */
540 : "memory");
541 }
542}
543
544static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)
545{
546 unsigned char fpstate[FPCONTEXT_SIZE];
547 int context_size = CPU_IS_060 ? 8 : 0;
548 int err = 0;
549
550 if (FPU_IS_EMU) {
551 /* save fpu control register */
552 err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpcntl,
553 current->thread.fpcntl, 12);
554 /* save all other fpu register */
555 err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpregs,
556 current->thread.fp, 96);
557 return err;
558 }
559
560 __asm__ volatile (".chip 68k/68881\n\t"
561 "fsave %0\n\t"
562 ".chip 68k"
563 : : "m" (*fpstate) : "memory");
564
565 err |= __put_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate);
566 if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
567 fpregset_t fpregs;
568 if (!CPU_IS_060)
569 context_size = fpstate[1];
570 fpu_version = fpstate[0];
571 if (CPU_IS_020_OR_030 &&
572 regs->vector >= (VEC_FPBRUC * 4) &&
573 regs->vector <= (VEC_FPNAN * 4)) {
574 /* Clear pending exception in 68882 idle frame */
575 if (*(unsigned short *) fpstate == 0x1f38)
576 fpstate[0x38] |= 1 << 3;
577 }
578 __asm__ volatile (".chip 68k/68881\n\t"
579 "fmovemx %%fp0-%%fp7,%0\n\t"
580 "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
581 ".chip 68k"
582 : "=m" (*fpregs.f_fpregs),
583 "=m" (*fpregs.f_fpcntl)
584 : /* no inputs */
585 : "memory");
586 err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs,
587 sizeof(fpregs));
588 }
589 if (context_size)
590 err |= copy_to_user((long __user *)&uc->uc_fpstate + 1, fpstate + 4,
591 context_size);
592 return err;
593}
594
595static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,
596 unsigned long mask)
597{
598 sc->sc_mask = mask;
599 sc->sc_usp = rdusp();
600 sc->sc_d0 = regs->d0;
601 sc->sc_d1 = regs->d1;
602 sc->sc_a0 = regs->a0;
603 sc->sc_a1 = regs->a1;
604 sc->sc_sr = regs->sr;
605 sc->sc_pc = regs->pc;
606 sc->sc_formatvec = regs->format << 12 | regs->vector;
607 save_fpu_state(sc, regs);
608}
609
610static inline int rt_setup_ucontext(struct ucontext __user *uc, struct pt_regs *regs)
611{
612 struct switch_stack *sw = (struct switch_stack *)regs - 1;
613 greg_t __user *gregs = uc->uc_mcontext.gregs;
614 int err = 0;
615
616 err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version);
617 err |= __put_user(regs->d0, &gregs[0]);
618 err |= __put_user(regs->d1, &gregs[1]);
619 err |= __put_user(regs->d2, &gregs[2]);
620 err |= __put_user(regs->d3, &gregs[3]);
621 err |= __put_user(regs->d4, &gregs[4]);
622 err |= __put_user(regs->d5, &gregs[5]);
623 err |= __put_user(sw->d6, &gregs[6]);
624 err |= __put_user(sw->d7, &gregs[7]);
625 err |= __put_user(regs->a0, &gregs[8]);
626 err |= __put_user(regs->a1, &gregs[9]);
627 err |= __put_user(regs->a2, &gregs[10]);
628 err |= __put_user(sw->a3, &gregs[11]);
629 err |= __put_user(sw->a4, &gregs[12]);
630 err |= __put_user(sw->a5, &gregs[13]);
631 err |= __put_user(sw->a6, &gregs[14]);
632 err |= __put_user(rdusp(), &gregs[15]);
633 err |= __put_user(regs->pc, &gregs[16]);
634 err |= __put_user(regs->sr, &gregs[17]);
635 err |= __put_user((regs->format << 12) | regs->vector, &uc->uc_formatvec);
636 err |= rt_save_fpu_state(uc, regs);
637 return err;
638}
639
640static inline void push_cache (unsigned long vaddr)
641{
642 /*
643 * Using the old cache_push_v() was really a big waste.
644 *
645 * What we are trying to do is to flush 8 bytes to ram.
646 * Flushing 2 cache lines of 16 bytes is much cheaper than
647 * flushing 1 or 2 pages, as previously done in
648 * cache_push_v().
649 * Jes
650 */
651 if (CPU_IS_040) {
652 unsigned long temp;
653
654 __asm__ __volatile__ (".chip 68040\n\t"
655 "nop\n\t"
656 "ptestr (%1)\n\t"
657 "movec %%mmusr,%0\n\t"
658 ".chip 68k"
659 : "=r" (temp)
660 : "a" (vaddr));
661
662 temp &= PAGE_MASK;
663 temp |= vaddr & ~PAGE_MASK;
664
665 __asm__ __volatile__ (".chip 68040\n\t"
666 "nop\n\t"
667 "cpushl %%bc,(%0)\n\t"
668 ".chip 68k"
669 : : "a" (temp));
670 }
671 else if (CPU_IS_060) {
672 unsigned long temp;
673 __asm__ __volatile__ (".chip 68060\n\t"
674 "plpar (%0)\n\t"
675 ".chip 68k"
676 : "=a" (temp)
677 : "0" (vaddr));
678 __asm__ __volatile__ (".chip 68060\n\t"
679 "cpushl %%bc,(%0)\n\t"
680 ".chip 68k"
681 : : "a" (temp));
682 }
683 else {
684 /*
685 * 68030/68020 have no writeback cache;
686 * still need to clear icache.
687 * Note that vaddr is guaranteed to be long word aligned.
688 */
689 unsigned long temp;
690 asm volatile ("movec %%cacr,%0" : "=r" (temp));
691 temp += 4;
692 asm volatile ("movec %0,%%caar\n\t"
693 "movec %1,%%cacr"
694 : : "r" (vaddr), "r" (temp));
695 asm volatile ("movec %0,%%caar\n\t"
696 "movec %1,%%cacr"
697 : : "r" (vaddr + 4), "r" (temp));
698 }
699}
700
701static inline void __user *
702get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
703{
704 unsigned long usp;
705
706 /* Default to using normal stack. */
707 usp = rdusp();
708
709 /* This is the X/Open sanctioned signal stack switching. */
710 if (ka->sa.sa_flags & SA_ONSTACK) {
711 if (!sas_ss_flags(usp))
712 usp = current->sas_ss_sp + current->sas_ss_size;
713 }
714 return (void __user *)((usp - frame_size) & -8UL);
715}
716
717static int setup_frame (int sig, struct k_sigaction *ka,
718 sigset_t *set, struct pt_regs *regs)
719{
720 struct sigframe __user *frame;
721 int fsize = frame_extra_sizes[regs->format];
722 struct sigcontext context;
723 int err = 0;
724
725 if (fsize < 0) {
726#ifdef DEBUG
727 printk ("setup_frame: Unknown frame format %#x\n",
728 regs->format);
729#endif
730 goto give_sigsegv;
731 }
732
733 frame = get_sigframe(ka, regs, sizeof(*frame) + fsize);
734
735 if (fsize)
736 err |= copy_to_user (frame + 1, regs + 1, fsize);
737
738 err |= __put_user((current_thread_info()->exec_domain
739 && current_thread_info()->exec_domain->signal_invmap
740 && sig < 32
741 ? current_thread_info()->exec_domain->signal_invmap[sig]
742 : sig),
743 &frame->sig);
744
745 err |= __put_user(regs->vector, &frame->code);
746 err |= __put_user(&frame->sc, &frame->psc);
747
748 if (_NSIG_WORDS > 1)
749 err |= copy_to_user(frame->extramask, &set->sig[1],
750 sizeof(frame->extramask));
751
752 setup_sigcontext(&context, regs, set->sig[0]);
753 err |= copy_to_user (&frame->sc, &context, sizeof(context));
754
755 /* Set up to return from userspace. */
756 err |= __put_user(frame->retcode, &frame->pretcode);
757 /* moveq #,d0; trap #0 */
758 err |= __put_user(0x70004e40 + (__NR_sigreturn << 16),
759 (long __user *)(frame->retcode));
760
761 if (err)
762 goto give_sigsegv;
763
764 push_cache ((unsigned long) &frame->retcode);
765
766 /*
767 * Set up registers for signal handler. All the state we are about
768 * to destroy is successfully copied to sigframe.
769 */
770 wrusp ((unsigned long) frame);
771 regs->pc = (unsigned long) ka->sa.sa_handler;
772
773 /*
774 * This is subtle; if we build more than one sigframe, all but the
775 * first one will see frame format 0 and have fsize == 0, so we won't
776 * screw stkadj.
777 */
778 if (fsize)
779 regs->stkadj = fsize;
780
781 /* Prepare to skip over the extra stuff in the exception frame. */
782 if (regs->stkadj) {
783 struct pt_regs *tregs =
784 (struct pt_regs *)((ulong)regs + regs->stkadj);
785#ifdef DEBUG
786 printk("Performing stackadjust=%04x\n", regs->stkadj);
787#endif
788 /* This must be copied with decreasing addresses to
789 handle overlaps. */
790 tregs->vector = 0;
791 tregs->format = 0;
792 tregs->pc = regs->pc;
793 tregs->sr = regs->sr;
794 }
795 return 0;
796
797give_sigsegv:
798 force_sigsegv(sig, current);
799 return err;
800}
801
802static int setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info,
803 sigset_t *set, struct pt_regs *regs)
804{
805 struct rt_sigframe __user *frame;
806 int fsize = frame_extra_sizes[regs->format];
807 int err = 0;
808
809 if (fsize < 0) {
810#ifdef DEBUG
811 printk ("setup_frame: Unknown frame format %#x\n",
812 regs->format);
813#endif
814 goto give_sigsegv;
815 }
816
817 frame = get_sigframe(ka, regs, sizeof(*frame));
818
819 if (fsize)
820 err |= copy_to_user (&frame->uc.uc_extra, regs + 1, fsize);
821
822 err |= __put_user((current_thread_info()->exec_domain
823 && current_thread_info()->exec_domain->signal_invmap
824 && sig < 32
825 ? current_thread_info()->exec_domain->signal_invmap[sig]
826 : sig),
827 &frame->sig);
828 err |= __put_user(&frame->info, &frame->pinfo);
829 err |= __put_user(&frame->uc, &frame->puc);
830 err |= copy_siginfo_to_user(&frame->info, info);
831
832 /* Create the ucontext. */
833 err |= __put_user(0, &frame->uc.uc_flags);
834 err |= __put_user(NULL, &frame->uc.uc_link);
835 err |= __put_user((void __user *)current->sas_ss_sp,
836 &frame->uc.uc_stack.ss_sp);
837 err |= __put_user(sas_ss_flags(rdusp()),
838 &frame->uc.uc_stack.ss_flags);
839 err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
840 err |= rt_setup_ucontext(&frame->uc, regs);
841 err |= copy_to_user (&frame->uc.uc_sigmask, set, sizeof(*set));
842
843 /* Set up to return from userspace. */
844 err |= __put_user(frame->retcode, &frame->pretcode);
845#ifdef __mcoldfire__
846 /* movel #__NR_rt_sigreturn,d0; trap #0 */
847 err |= __put_user(0x203c0000, (long __user *)(frame->retcode + 0));
848 err |= __put_user(0x00004e40 + (__NR_rt_sigreturn << 16),
849 (long __user *)(frame->retcode + 4));
850#else 3#else
851 /* moveq #,d0; notb d0; trap #0 */ 4#include "signal_no.c"
852 err |= __put_user(0x70004600 + ((__NR_rt_sigreturn ^ 0xff) << 16),
853 (long __user *)(frame->retcode + 0));
854 err |= __put_user(0x4e40, (short __user *)(frame->retcode + 4));
855#endif
856
857 if (err)
858 goto give_sigsegv;
859
860 push_cache ((unsigned long) &frame->retcode);
861
862 /*
863 * Set up registers for signal handler. All the state we are about
864 * to destroy is successfully copied to sigframe.
865 */
866 wrusp ((unsigned long) frame);
867 regs->pc = (unsigned long) ka->sa.sa_handler;
868
869 /*
870 * This is subtle; if we build more than one sigframe, all but the
871 * first one will see frame format 0 and have fsize == 0, so we won't
872 * screw stkadj.
873 */
874 if (fsize)
875 regs->stkadj = fsize;
876
877 /* Prepare to skip over the extra stuff in the exception frame. */
878 if (regs->stkadj) {
879 struct pt_regs *tregs =
880 (struct pt_regs *)((ulong)regs + regs->stkadj);
881#ifdef DEBUG
882 printk("Performing stackadjust=%04x\n", regs->stkadj);
883#endif 5#endif
884 /* This must be copied with decreasing addresses to
885 handle overlaps. */
886 tregs->vector = 0;
887 tregs->format = 0;
888 tregs->pc = regs->pc;
889 tregs->sr = regs->sr;
890 }
891 return 0;
892
893give_sigsegv:
894 force_sigsegv(sig, current);
895 return err;
896}
897
898static inline void
899handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
900{
901 switch (regs->d0) {
902 case -ERESTARTNOHAND:
903 if (!has_handler)
904 goto do_restart;
905 regs->d0 = -EINTR;
906 break;
907
908 case -ERESTART_RESTARTBLOCK:
909 if (!has_handler) {
910 regs->d0 = __NR_restart_syscall;
911 regs->pc -= 2;
912 break;
913 }
914 regs->d0 = -EINTR;
915 break;
916
917 case -ERESTARTSYS:
918 if (has_handler && !(ka->sa.sa_flags & SA_RESTART)) {
919 regs->d0 = -EINTR;
920 break;
921 }
922 /* fallthrough */
923 case -ERESTARTNOINTR:
924 do_restart:
925 regs->d0 = regs->orig_d0;
926 regs->pc -= 2;
927 break;
928 }
929}
930
931void ptrace_signal_deliver(struct pt_regs *regs, void *cookie)
932{
933 if (regs->orig_d0 < 0)
934 return;
935 switch (regs->d0) {
936 case -ERESTARTNOHAND:
937 case -ERESTARTSYS:
938 case -ERESTARTNOINTR:
939 regs->d0 = regs->orig_d0;
940 regs->orig_d0 = -1;
941 regs->pc -= 2;
942 break;
943 }
944}
945
946/*
947 * OK, we're invoking a handler
948 */
949static void
950handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,
951 sigset_t *oldset, struct pt_regs *regs)
952{
953 int err;
954 /* are we from a system call? */
955 if (regs->orig_d0 >= 0)
956 /* If so, check system call restarting.. */
957 handle_restart(regs, ka, 1);
958
959 /* set up the stack frame */
960 if (ka->sa.sa_flags & SA_SIGINFO)
961 err = setup_rt_frame(sig, ka, info, oldset, regs);
962 else
963 err = setup_frame(sig, ka, oldset, regs);
964
965 if (err)
966 return;
967
968 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
969 if (!(ka->sa.sa_flags & SA_NODEFER))
970 sigaddset(&current->blocked,sig);
971 recalc_sigpending();
972
973 if (test_thread_flag(TIF_DELAYED_TRACE)) {
974 regs->sr &= ~0x8000;
975 send_sig(SIGTRAP, current, 1);
976 }
977
978 clear_thread_flag(TIF_RESTORE_SIGMASK);
979}
980
981/*
982 * Note that 'init' is a special process: it doesn't get signals it doesn't
983 * want to handle. Thus you cannot kill init even with a SIGKILL even by
984 * mistake.
985 */
986asmlinkage void do_signal(struct pt_regs *regs)
987{
988 siginfo_t info;
989 struct k_sigaction ka;
990 int signr;
991 sigset_t *oldset;
992
993 current->thread.esp0 = (unsigned long) regs;
994
995 if (test_thread_flag(TIF_RESTORE_SIGMASK))
996 oldset = &current->saved_sigmask;
997 else
998 oldset = &current->blocked;
999
1000 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
1001 if (signr > 0) {
1002 /* Whee! Actually deliver the signal. */
1003 handle_signal(signr, &ka, &info, oldset, regs);
1004 return;
1005 }
1006
1007 /* Did we come from a system call? */
1008 if (regs->orig_d0 >= 0)
1009 /* Restart the system call - no handlers present */
1010 handle_restart(regs, NULL, 0);
1011
1012 /* If there's no signal to deliver, we just restore the saved mask. */
1013 if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
1014 clear_thread_flag(TIF_RESTORE_SIGMASK);
1015 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
1016 }
1017}
diff --git a/arch/m68k/kernel/signal_mm.c b/arch/m68k/kernel/signal_mm.c
new file mode 100644
index 000000000000..a0afc239304e
--- /dev/null
+++ b/arch/m68k/kernel/signal_mm.c
@@ -0,0 +1,1017 @@
1/*
2 * linux/arch/m68k/kernel/signal.c
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11/*
12 * Linux/m68k support by Hamish Macdonald
13 *
14 * 68060 fixes by Jesper Skov
15 *
16 * 1997-12-01 Modified for POSIX.1b signals by Andreas Schwab
17 *
18 * mathemu support by Roman Zippel
19 * (Note: fpstate in the signal context is completely ignored for the emulator
20 * and the internal floating point format is put on stack)
21 */
22
23/*
24 * ++roman (07/09/96): implemented signal stacks (specially for tosemu on
25 * Atari :-) Current limitation: Only one sigstack can be active at one time.
26 * If a second signal with SA_ONSTACK set arrives while working on a sigstack,
27 * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested
28 * signal handlers!
29 */
30
31#include <linux/sched.h>
32#include <linux/mm.h>
33#include <linux/kernel.h>
34#include <linux/signal.h>
35#include <linux/syscalls.h>
36#include <linux/errno.h>
37#include <linux/wait.h>
38#include <linux/ptrace.h>
39#include <linux/unistd.h>
40#include <linux/stddef.h>
41#include <linux/highuid.h>
42#include <linux/personality.h>
43#include <linux/tty.h>
44#include <linux/binfmts.h>
45#include <linux/module.h>
46
47#include <asm/setup.h>
48#include <asm/uaccess.h>
49#include <asm/pgtable.h>
50#include <asm/traps.h>
51#include <asm/ucontext.h>
52
53#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
54
55static const int frame_extra_sizes[16] = {
56 [1] = -1, /* sizeof(((struct frame *)0)->un.fmt1), */
57 [2] = sizeof(((struct frame *)0)->un.fmt2),
58 [3] = sizeof(((struct frame *)0)->un.fmt3),
59 [4] = sizeof(((struct frame *)0)->un.fmt4),
60 [5] = -1, /* sizeof(((struct frame *)0)->un.fmt5), */
61 [6] = -1, /* sizeof(((struct frame *)0)->un.fmt6), */
62 [7] = sizeof(((struct frame *)0)->un.fmt7),
63 [8] = -1, /* sizeof(((struct frame *)0)->un.fmt8), */
64 [9] = sizeof(((struct frame *)0)->un.fmt9),
65 [10] = sizeof(((struct frame *)0)->un.fmta),
66 [11] = sizeof(((struct frame *)0)->un.fmtb),
67 [12] = -1, /* sizeof(((struct frame *)0)->un.fmtc), */
68 [13] = -1, /* sizeof(((struct frame *)0)->un.fmtd), */
69 [14] = -1, /* sizeof(((struct frame *)0)->un.fmte), */
70 [15] = -1, /* sizeof(((struct frame *)0)->un.fmtf), */
71};
72
73int handle_kernel_fault(struct pt_regs *regs)
74{
75 const struct exception_table_entry *fixup;
76 struct pt_regs *tregs;
77
78 /* Are we prepared to handle this kernel fault? */
79 fixup = search_exception_tables(regs->pc);
80 if (!fixup)
81 return 0;
82
83 /* Create a new four word stack frame, discarding the old one. */
84 regs->stkadj = frame_extra_sizes[regs->format];
85 tregs = (struct pt_regs *)((long)regs + regs->stkadj);
86 tregs->vector = regs->vector;
87 tregs->format = 0;
88 tregs->pc = fixup->fixup;
89 tregs->sr = regs->sr;
90
91 return 1;
92}
93
94/*
95 * Atomically swap in the new signal mask, and wait for a signal.
96 */
97asmlinkage int
98sys_sigsuspend(int unused0, int unused1, old_sigset_t mask)
99{
100 mask &= _BLOCKABLE;
101 spin_lock_irq(&current->sighand->siglock);
102 current->saved_sigmask = current->blocked;
103 siginitset(&current->blocked, mask);
104 recalc_sigpending();
105 spin_unlock_irq(&current->sighand->siglock);
106
107 current->state = TASK_INTERRUPTIBLE;
108 schedule();
109 set_restore_sigmask();
110
111 return -ERESTARTNOHAND;
112}
113
114asmlinkage int
115sys_sigaction(int sig, const struct old_sigaction __user *act,
116 struct old_sigaction __user *oact)
117{
118 struct k_sigaction new_ka, old_ka;
119 int ret;
120
121 if (act) {
122 old_sigset_t mask;
123 if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
124 __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
125 __get_user(new_ka.sa.sa_restorer, &act->sa_restorer) ||
126 __get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
127 __get_user(mask, &act->sa_mask))
128 return -EFAULT;
129 siginitset(&new_ka.sa.sa_mask, mask);
130 }
131
132 ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
133
134 if (!ret && oact) {
135 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
136 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
137 __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer) ||
138 __put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
139 __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
140 return -EFAULT;
141 }
142
143 return ret;
144}
145
146asmlinkage int
147sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)
148{
149 return do_sigaltstack(uss, uoss, rdusp());
150}
151
152
153/*
154 * Do a signal return; undo the signal stack.
155 *
156 * Keep the return code on the stack quadword aligned!
157 * That makes the cache flush below easier.
158 */
159
160struct sigframe
161{
162 char __user *pretcode;
163 int sig;
164 int code;
165 struct sigcontext __user *psc;
166 char retcode[8];
167 unsigned long extramask[_NSIG_WORDS-1];
168 struct sigcontext sc;
169};
170
171struct rt_sigframe
172{
173 char __user *pretcode;
174 int sig;
175 struct siginfo __user *pinfo;
176 void __user *puc;
177 char retcode[8];
178 struct siginfo info;
179 struct ucontext uc;
180};
181
182
183static unsigned char fpu_version; /* version number of fpu, set by setup_frame */
184
185static inline int restore_fpu_state(struct sigcontext *sc)
186{
187 int err = 1;
188
189 if (FPU_IS_EMU) {
190 /* restore registers */
191 memcpy(current->thread.fpcntl, sc->sc_fpcntl, 12);
192 memcpy(current->thread.fp, sc->sc_fpregs, 24);
193 return 0;
194 }
195
196 if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
197 /* Verify the frame format. */
198 if (!CPU_IS_060 && (sc->sc_fpstate[0] != fpu_version))
199 goto out;
200 if (CPU_IS_020_OR_030) {
201 if (m68k_fputype & FPU_68881 &&
202 !(sc->sc_fpstate[1] == 0x18 || sc->sc_fpstate[1] == 0xb4))
203 goto out;
204 if (m68k_fputype & FPU_68882 &&
205 !(sc->sc_fpstate[1] == 0x38 || sc->sc_fpstate[1] == 0xd4))
206 goto out;
207 } else if (CPU_IS_040) {
208 if (!(sc->sc_fpstate[1] == 0x00 ||
209 sc->sc_fpstate[1] == 0x28 ||
210 sc->sc_fpstate[1] == 0x60))
211 goto out;
212 } else if (CPU_IS_060) {
213 if (!(sc->sc_fpstate[3] == 0x00 ||
214 sc->sc_fpstate[3] == 0x60 ||
215 sc->sc_fpstate[3] == 0xe0))
216 goto out;
217 } else
218 goto out;
219
220 __asm__ volatile (".chip 68k/68881\n\t"
221 "fmovemx %0,%%fp0-%%fp1\n\t"
222 "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
223 ".chip 68k"
224 : /* no outputs */
225 : "m" (*sc->sc_fpregs), "m" (*sc->sc_fpcntl));
226 }
227 __asm__ volatile (".chip 68k/68881\n\t"
228 "frestore %0\n\t"
229 ".chip 68k" : : "m" (*sc->sc_fpstate));
230 err = 0;
231
232out:
233 return err;
234}
235
236#define FPCONTEXT_SIZE 216
237#define uc_fpstate uc_filler[0]
238#define uc_formatvec uc_filler[FPCONTEXT_SIZE/4]
239#define uc_extra uc_filler[FPCONTEXT_SIZE/4+1]
240
241static inline int rt_restore_fpu_state(struct ucontext __user *uc)
242{
243 unsigned char fpstate[FPCONTEXT_SIZE];
244 int context_size = CPU_IS_060 ? 8 : 0;
245 fpregset_t fpregs;
246 int err = 1;
247
248 if (FPU_IS_EMU) {
249 /* restore fpu control register */
250 if (__copy_from_user(current->thread.fpcntl,
251 uc->uc_mcontext.fpregs.f_fpcntl, 12))
252 goto out;
253 /* restore all other fpu register */
254 if (__copy_from_user(current->thread.fp,
255 uc->uc_mcontext.fpregs.f_fpregs, 96))
256 goto out;
257 return 0;
258 }
259
260 if (__get_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate))
261 goto out;
262 if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
263 if (!CPU_IS_060)
264 context_size = fpstate[1];
265 /* Verify the frame format. */
266 if (!CPU_IS_060 && (fpstate[0] != fpu_version))
267 goto out;
268 if (CPU_IS_020_OR_030) {
269 if (m68k_fputype & FPU_68881 &&
270 !(context_size == 0x18 || context_size == 0xb4))
271 goto out;
272 if (m68k_fputype & FPU_68882 &&
273 !(context_size == 0x38 || context_size == 0xd4))
274 goto out;
275 } else if (CPU_IS_040) {
276 if (!(context_size == 0x00 ||
277 context_size == 0x28 ||
278 context_size == 0x60))
279 goto out;
280 } else if (CPU_IS_060) {
281 if (!(fpstate[3] == 0x00 ||
282 fpstate[3] == 0x60 ||
283 fpstate[3] == 0xe0))
284 goto out;
285 } else
286 goto out;
287 if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs,
288 sizeof(fpregs)))
289 goto out;
290 __asm__ volatile (".chip 68k/68881\n\t"
291 "fmovemx %0,%%fp0-%%fp7\n\t"
292 "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
293 ".chip 68k"
294 : /* no outputs */
295 : "m" (*fpregs.f_fpregs),
296 "m" (*fpregs.f_fpcntl));
297 }
298 if (context_size &&
299 __copy_from_user(fpstate + 4, (long __user *)&uc->uc_fpstate + 1,
300 context_size))
301 goto out;
302 __asm__ volatile (".chip 68k/68881\n\t"
303 "frestore %0\n\t"
304 ".chip 68k" : : "m" (*fpstate));
305 err = 0;
306
307out:
308 return err;
309}
310
311static int mangle_kernel_stack(struct pt_regs *regs, int formatvec,
312 void __user *fp)
313{
314 int fsize = frame_extra_sizes[formatvec >> 12];
315 if (fsize < 0) {
316 /*
317 * user process trying to return with weird frame format
318 */
319#ifdef DEBUG
320 printk("user process returning with weird frame format\n");
321#endif
322 return 1;
323 }
324 if (!fsize) {
325 regs->format = formatvec >> 12;
326 regs->vector = formatvec & 0xfff;
327 } else {
328 struct switch_stack *sw = (struct switch_stack *)regs - 1;
329 unsigned long buf[fsize / 2]; /* yes, twice as much */
330
331 /* that'll make sure that expansion won't crap over data */
332 if (copy_from_user(buf + fsize / 4, fp, fsize))
333 return 1;
334
335 /* point of no return */
336 regs->format = formatvec >> 12;
337 regs->vector = formatvec & 0xfff;
338#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack))
339 __asm__ __volatile__
340 (" movel %0,%/a0\n\t"
341 " subl %1,%/a0\n\t" /* make room on stack */
342 " movel %/a0,%/sp\n\t" /* set stack pointer */
343 /* move switch_stack and pt_regs */
344 "1: movel %0@+,%/a0@+\n\t"
345 " dbra %2,1b\n\t"
346 " lea %/sp@(%c3),%/a0\n\t" /* add offset of fmt */
347 " lsrl #2,%1\n\t"
348 " subql #1,%1\n\t"
349 /* copy to the gap we'd made */
350 "2: movel %4@+,%/a0@+\n\t"
351 " dbra %1,2b\n\t"
352 " bral ret_from_signal\n"
353 : /* no outputs, it doesn't ever return */
354 : "a" (sw), "d" (fsize), "d" (frame_offset/4-1),
355 "n" (frame_offset), "a" (buf + fsize/4)
356 : "a0");
357#undef frame_offset
358 }
359 return 0;
360}
361
362static inline int
363restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *usc, void __user *fp)
364{
365 int formatvec;
366 struct sigcontext context;
367 int err;
368
369 /* Always make any pending restarted system calls return -EINTR */
370 current_thread_info()->restart_block.fn = do_no_restart_syscall;
371
372 /* get previous context */
373 if (copy_from_user(&context, usc, sizeof(context)))
374 goto badframe;
375
376 /* restore passed registers */
377 regs->d0 = context.sc_d0;
378 regs->d1 = context.sc_d1;
379 regs->a0 = context.sc_a0;
380 regs->a1 = context.sc_a1;
381 regs->sr = (regs->sr & 0xff00) | (context.sc_sr & 0xff);
382 regs->pc = context.sc_pc;
383 regs->orig_d0 = -1; /* disable syscall checks */
384 wrusp(context.sc_usp);
385 formatvec = context.sc_formatvec;
386
387 err = restore_fpu_state(&context);
388
389 if (err || mangle_kernel_stack(regs, formatvec, fp))
390 goto badframe;
391
392 return 0;
393
394badframe:
395 return 1;
396}
397
398static inline int
399rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw,
400 struct ucontext __user *uc)
401{
402 int temp;
403 greg_t __user *gregs = uc->uc_mcontext.gregs;
404 unsigned long usp;
405 int err;
406
407 /* Always make any pending restarted system calls return -EINTR */
408 current_thread_info()->restart_block.fn = do_no_restart_syscall;
409
410 err = __get_user(temp, &uc->uc_mcontext.version);
411 if (temp != MCONTEXT_VERSION)
412 goto badframe;
413 /* restore passed registers */
414 err |= __get_user(regs->d0, &gregs[0]);
415 err |= __get_user(regs->d1, &gregs[1]);
416 err |= __get_user(regs->d2, &gregs[2]);
417 err |= __get_user(regs->d3, &gregs[3]);
418 err |= __get_user(regs->d4, &gregs[4]);
419 err |= __get_user(regs->d5, &gregs[5]);
420 err |= __get_user(sw->d6, &gregs[6]);
421 err |= __get_user(sw->d7, &gregs[7]);
422 err |= __get_user(regs->a0, &gregs[8]);
423 err |= __get_user(regs->a1, &gregs[9]);
424 err |= __get_user(regs->a2, &gregs[10]);
425 err |= __get_user(sw->a3, &gregs[11]);
426 err |= __get_user(sw->a4, &gregs[12]);
427 err |= __get_user(sw->a5, &gregs[13]);
428 err |= __get_user(sw->a6, &gregs[14]);
429 err |= __get_user(usp, &gregs[15]);
430 wrusp(usp);
431 err |= __get_user(regs->pc, &gregs[16]);
432 err |= __get_user(temp, &gregs[17]);
433 regs->sr = (regs->sr & 0xff00) | (temp & 0xff);
434 regs->orig_d0 = -1; /* disable syscall checks */
435 err |= __get_user(temp, &uc->uc_formatvec);
436
437 err |= rt_restore_fpu_state(uc);
438
439 if (err || do_sigaltstack(&uc->uc_stack, NULL, usp) == -EFAULT)
440 goto badframe;
441
442 if (mangle_kernel_stack(regs, temp, &uc->uc_extra))
443 goto badframe;
444
445 return 0;
446
447badframe:
448 return 1;
449}
450
451asmlinkage int do_sigreturn(unsigned long __unused)
452{
453 struct switch_stack *sw = (struct switch_stack *) &__unused;
454 struct pt_regs *regs = (struct pt_regs *) (sw + 1);
455 unsigned long usp = rdusp();
456 struct sigframe __user *frame = (struct sigframe __user *)(usp - 4);
457 sigset_t set;
458
459 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
460 goto badframe;
461 if (__get_user(set.sig[0], &frame->sc.sc_mask) ||
462 (_NSIG_WORDS > 1 &&
463 __copy_from_user(&set.sig[1], &frame->extramask,
464 sizeof(frame->extramask))))
465 goto badframe;
466
467 sigdelsetmask(&set, ~_BLOCKABLE);
468 current->blocked = set;
469 recalc_sigpending();
470
471 if (restore_sigcontext(regs, &frame->sc, frame + 1))
472 goto badframe;
473 return regs->d0;
474
475badframe:
476 force_sig(SIGSEGV, current);
477 return 0;
478}
479
480asmlinkage int do_rt_sigreturn(unsigned long __unused)
481{
482 struct switch_stack *sw = (struct switch_stack *) &__unused;
483 struct pt_regs *regs = (struct pt_regs *) (sw + 1);
484 unsigned long usp = rdusp();
485 struct rt_sigframe __user *frame = (struct rt_sigframe __user *)(usp - 4);
486 sigset_t set;
487
488 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
489 goto badframe;
490 if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
491 goto badframe;
492
493 sigdelsetmask(&set, ~_BLOCKABLE);
494 current->blocked = set;
495 recalc_sigpending();
496
497 if (rt_restore_ucontext(regs, sw, &frame->uc))
498 goto badframe;
499 return regs->d0;
500
501badframe:
502 force_sig(SIGSEGV, current);
503 return 0;
504}
505
506/*
507 * Set up a signal frame.
508 */
509
510static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
511{
512 if (FPU_IS_EMU) {
513 /* save registers */
514 memcpy(sc->sc_fpcntl, current->thread.fpcntl, 12);
515 memcpy(sc->sc_fpregs, current->thread.fp, 24);
516 return;
517 }
518
519 __asm__ volatile (".chip 68k/68881\n\t"
520 "fsave %0\n\t"
521 ".chip 68k"
522 : : "m" (*sc->sc_fpstate) : "memory");
523
524 if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
525 fpu_version = sc->sc_fpstate[0];
526 if (CPU_IS_020_OR_030 &&
527 regs->vector >= (VEC_FPBRUC * 4) &&
528 regs->vector <= (VEC_FPNAN * 4)) {
529 /* Clear pending exception in 68882 idle frame */
530 if (*(unsigned short *) sc->sc_fpstate == 0x1f38)
531 sc->sc_fpstate[0x38] |= 1 << 3;
532 }
533 __asm__ volatile (".chip 68k/68881\n\t"
534 "fmovemx %%fp0-%%fp1,%0\n\t"
535 "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
536 ".chip 68k"
537 : "=m" (*sc->sc_fpregs),
538 "=m" (*sc->sc_fpcntl)
539 : /* no inputs */
540 : "memory");
541 }
542}
543
544static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)
545{
546 unsigned char fpstate[FPCONTEXT_SIZE];
547 int context_size = CPU_IS_060 ? 8 : 0;
548 int err = 0;
549
550 if (FPU_IS_EMU) {
551 /* save fpu control register */
552 err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpcntl,
553 current->thread.fpcntl, 12);
554 /* save all other fpu register */
555 err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpregs,
556 current->thread.fp, 96);
557 return err;
558 }
559
560 __asm__ volatile (".chip 68k/68881\n\t"
561 "fsave %0\n\t"
562 ".chip 68k"
563 : : "m" (*fpstate) : "memory");
564
565 err |= __put_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate);
566 if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
567 fpregset_t fpregs;
568 if (!CPU_IS_060)
569 context_size = fpstate[1];
570 fpu_version = fpstate[0];
571 if (CPU_IS_020_OR_030 &&
572 regs->vector >= (VEC_FPBRUC * 4) &&
573 regs->vector <= (VEC_FPNAN * 4)) {
574 /* Clear pending exception in 68882 idle frame */
575 if (*(unsigned short *) fpstate == 0x1f38)
576 fpstate[0x38] |= 1 << 3;
577 }
578 __asm__ volatile (".chip 68k/68881\n\t"
579 "fmovemx %%fp0-%%fp7,%0\n\t"
580 "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
581 ".chip 68k"
582 : "=m" (*fpregs.f_fpregs),
583 "=m" (*fpregs.f_fpcntl)
584 : /* no inputs */
585 : "memory");
586 err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs,
587 sizeof(fpregs));
588 }
589 if (context_size)
590 err |= copy_to_user((long __user *)&uc->uc_fpstate + 1, fpstate + 4,
591 context_size);
592 return err;
593}
594
595static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,
596 unsigned long mask)
597{
598 sc->sc_mask = mask;
599 sc->sc_usp = rdusp();
600 sc->sc_d0 = regs->d0;
601 sc->sc_d1 = regs->d1;
602 sc->sc_a0 = regs->a0;
603 sc->sc_a1 = regs->a1;
604 sc->sc_sr = regs->sr;
605 sc->sc_pc = regs->pc;
606 sc->sc_formatvec = regs->format << 12 | regs->vector;
607 save_fpu_state(sc, regs);
608}
609
610static inline int rt_setup_ucontext(struct ucontext __user *uc, struct pt_regs *regs)
611{
612 struct switch_stack *sw = (struct switch_stack *)regs - 1;
613 greg_t __user *gregs = uc->uc_mcontext.gregs;
614 int err = 0;
615
616 err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version);
617 err |= __put_user(regs->d0, &gregs[0]);
618 err |= __put_user(regs->d1, &gregs[1]);
619 err |= __put_user(regs->d2, &gregs[2]);
620 err |= __put_user(regs->d3, &gregs[3]);
621 err |= __put_user(regs->d4, &gregs[4]);
622 err |= __put_user(regs->d5, &gregs[5]);
623 err |= __put_user(sw->d6, &gregs[6]);
624 err |= __put_user(sw->d7, &gregs[7]);
625 err |= __put_user(regs->a0, &gregs[8]);
626 err |= __put_user(regs->a1, &gregs[9]);
627 err |= __put_user(regs->a2, &gregs[10]);
628 err |= __put_user(sw->a3, &gregs[11]);
629 err |= __put_user(sw->a4, &gregs[12]);
630 err |= __put_user(sw->a5, &gregs[13]);
631 err |= __put_user(sw->a6, &gregs[14]);
632 err |= __put_user(rdusp(), &gregs[15]);
633 err |= __put_user(regs->pc, &gregs[16]);
634 err |= __put_user(regs->sr, &gregs[17]);
635 err |= __put_user((regs->format << 12) | regs->vector, &uc->uc_formatvec);
636 err |= rt_save_fpu_state(uc, regs);
637 return err;
638}
639
640static inline void push_cache (unsigned long vaddr)
641{
642 /*
643 * Using the old cache_push_v() was really a big waste.
644 *
645 * What we are trying to do is to flush 8 bytes to ram.
646 * Flushing 2 cache lines of 16 bytes is much cheaper than
647 * flushing 1 or 2 pages, as previously done in
648 * cache_push_v().
649 * Jes
650 */
651 if (CPU_IS_040) {
652 unsigned long temp;
653
654 __asm__ __volatile__ (".chip 68040\n\t"
655 "nop\n\t"
656 "ptestr (%1)\n\t"
657 "movec %%mmusr,%0\n\t"
658 ".chip 68k"
659 : "=r" (temp)
660 : "a" (vaddr));
661
662 temp &= PAGE_MASK;
663 temp |= vaddr & ~PAGE_MASK;
664
665 __asm__ __volatile__ (".chip 68040\n\t"
666 "nop\n\t"
667 "cpushl %%bc,(%0)\n\t"
668 ".chip 68k"
669 : : "a" (temp));
670 }
671 else if (CPU_IS_060) {
672 unsigned long temp;
673 __asm__ __volatile__ (".chip 68060\n\t"
674 "plpar (%0)\n\t"
675 ".chip 68k"
676 : "=a" (temp)
677 : "0" (vaddr));
678 __asm__ __volatile__ (".chip 68060\n\t"
679 "cpushl %%bc,(%0)\n\t"
680 ".chip 68k"
681 : : "a" (temp));
682 }
683 else {
684 /*
685 * 68030/68020 have no writeback cache;
686 * still need to clear icache.
687 * Note that vaddr is guaranteed to be long word aligned.
688 */
689 unsigned long temp;
690 asm volatile ("movec %%cacr,%0" : "=r" (temp));
691 temp += 4;
692 asm volatile ("movec %0,%%caar\n\t"
693 "movec %1,%%cacr"
694 : : "r" (vaddr), "r" (temp));
695 asm volatile ("movec %0,%%caar\n\t"
696 "movec %1,%%cacr"
697 : : "r" (vaddr + 4), "r" (temp));
698 }
699}
700
701static inline void __user *
702get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
703{
704 unsigned long usp;
705
706 /* Default to using normal stack. */
707 usp = rdusp();
708
709 /* This is the X/Open sanctioned signal stack switching. */
710 if (ka->sa.sa_flags & SA_ONSTACK) {
711 if (!sas_ss_flags(usp))
712 usp = current->sas_ss_sp + current->sas_ss_size;
713 }
714 return (void __user *)((usp - frame_size) & -8UL);
715}
716
717static int setup_frame (int sig, struct k_sigaction *ka,
718 sigset_t *set, struct pt_regs *regs)
719{
720 struct sigframe __user *frame;
721 int fsize = frame_extra_sizes[regs->format];
722 struct sigcontext context;
723 int err = 0;
724
725 if (fsize < 0) {
726#ifdef DEBUG
727 printk ("setup_frame: Unknown frame format %#x\n",
728 regs->format);
729#endif
730 goto give_sigsegv;
731 }
732
733 frame = get_sigframe(ka, regs, sizeof(*frame) + fsize);
734
735 if (fsize)
736 err |= copy_to_user (frame + 1, regs + 1, fsize);
737
738 err |= __put_user((current_thread_info()->exec_domain
739 && current_thread_info()->exec_domain->signal_invmap
740 && sig < 32
741 ? current_thread_info()->exec_domain->signal_invmap[sig]
742 : sig),
743 &frame->sig);
744
745 err |= __put_user(regs->vector, &frame->code);
746 err |= __put_user(&frame->sc, &frame->psc);
747
748 if (_NSIG_WORDS > 1)
749 err |= copy_to_user(frame->extramask, &set->sig[1],
750 sizeof(frame->extramask));
751
752 setup_sigcontext(&context, regs, set->sig[0]);
753 err |= copy_to_user (&frame->sc, &context, sizeof(context));
754
755 /* Set up to return from userspace. */
756 err |= __put_user(frame->retcode, &frame->pretcode);
757 /* moveq #,d0; trap #0 */
758 err |= __put_user(0x70004e40 + (__NR_sigreturn << 16),
759 (long __user *)(frame->retcode));
760
761 if (err)
762 goto give_sigsegv;
763
764 push_cache ((unsigned long) &frame->retcode);
765
766 /*
767 * Set up registers for signal handler. All the state we are about
768 * to destroy is successfully copied to sigframe.
769 */
770 wrusp ((unsigned long) frame);
771 regs->pc = (unsigned long) ka->sa.sa_handler;
772
773 /*
774 * This is subtle; if we build more than one sigframe, all but the
775 * first one will see frame format 0 and have fsize == 0, so we won't
776 * screw stkadj.
777 */
778 if (fsize)
779 regs->stkadj = fsize;
780
781 /* Prepare to skip over the extra stuff in the exception frame. */
782 if (regs->stkadj) {
783 struct pt_regs *tregs =
784 (struct pt_regs *)((ulong)regs + regs->stkadj);
785#ifdef DEBUG
786 printk("Performing stackadjust=%04x\n", regs->stkadj);
787#endif
788 /* This must be copied with decreasing addresses to
789 handle overlaps. */
790 tregs->vector = 0;
791 tregs->format = 0;
792 tregs->pc = regs->pc;
793 tregs->sr = regs->sr;
794 }
795 return 0;
796
797give_sigsegv:
798 force_sigsegv(sig, current);
799 return err;
800}
801
802static int setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info,
803 sigset_t *set, struct pt_regs *regs)
804{
805 struct rt_sigframe __user *frame;
806 int fsize = frame_extra_sizes[regs->format];
807 int err = 0;
808
809 if (fsize < 0) {
810#ifdef DEBUG
811 printk ("setup_frame: Unknown frame format %#x\n",
812 regs->format);
813#endif
814 goto give_sigsegv;
815 }
816
817 frame = get_sigframe(ka, regs, sizeof(*frame));
818
819 if (fsize)
820 err |= copy_to_user (&frame->uc.uc_extra, regs + 1, fsize);
821
822 err |= __put_user((current_thread_info()->exec_domain
823 && current_thread_info()->exec_domain->signal_invmap
824 && sig < 32
825 ? current_thread_info()->exec_domain->signal_invmap[sig]
826 : sig),
827 &frame->sig);
828 err |= __put_user(&frame->info, &frame->pinfo);
829 err |= __put_user(&frame->uc, &frame->puc);
830 err |= copy_siginfo_to_user(&frame->info, info);
831
832 /* Create the ucontext. */
833 err |= __put_user(0, &frame->uc.uc_flags);
834 err |= __put_user(NULL, &frame->uc.uc_link);
835 err |= __put_user((void __user *)current->sas_ss_sp,
836 &frame->uc.uc_stack.ss_sp);
837 err |= __put_user(sas_ss_flags(rdusp()),
838 &frame->uc.uc_stack.ss_flags);
839 err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
840 err |= rt_setup_ucontext(&frame->uc, regs);
841 err |= copy_to_user (&frame->uc.uc_sigmask, set, sizeof(*set));
842
843 /* Set up to return from userspace. */
844 err |= __put_user(frame->retcode, &frame->pretcode);
845#ifdef __mcoldfire__
846 /* movel #__NR_rt_sigreturn,d0; trap #0 */
847 err |= __put_user(0x203c0000, (long __user *)(frame->retcode + 0));
848 err |= __put_user(0x00004e40 + (__NR_rt_sigreturn << 16),
849 (long __user *)(frame->retcode + 4));
850#else
851 /* moveq #,d0; notb d0; trap #0 */
852 err |= __put_user(0x70004600 + ((__NR_rt_sigreturn ^ 0xff) << 16),
853 (long __user *)(frame->retcode + 0));
854 err |= __put_user(0x4e40, (short __user *)(frame->retcode + 4));
855#endif
856
857 if (err)
858 goto give_sigsegv;
859
860 push_cache ((unsigned long) &frame->retcode);
861
862 /*
863 * Set up registers for signal handler. All the state we are about
864 * to destroy is successfully copied to sigframe.
865 */
866 wrusp ((unsigned long) frame);
867 regs->pc = (unsigned long) ka->sa.sa_handler;
868
869 /*
870 * This is subtle; if we build more than one sigframe, all but the
871 * first one will see frame format 0 and have fsize == 0, so we won't
872 * screw stkadj.
873 */
874 if (fsize)
875 regs->stkadj = fsize;
876
877 /* Prepare to skip over the extra stuff in the exception frame. */
878 if (regs->stkadj) {
879 struct pt_regs *tregs =
880 (struct pt_regs *)((ulong)regs + regs->stkadj);
881#ifdef DEBUG
882 printk("Performing stackadjust=%04x\n", regs->stkadj);
883#endif
884 /* This must be copied with decreasing addresses to
885 handle overlaps. */
886 tregs->vector = 0;
887 tregs->format = 0;
888 tregs->pc = regs->pc;
889 tregs->sr = regs->sr;
890 }
891 return 0;
892
893give_sigsegv:
894 force_sigsegv(sig, current);
895 return err;
896}
897
898static inline void
899handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
900{
901 switch (regs->d0) {
902 case -ERESTARTNOHAND:
903 if (!has_handler)
904 goto do_restart;
905 regs->d0 = -EINTR;
906 break;
907
908 case -ERESTART_RESTARTBLOCK:
909 if (!has_handler) {
910 regs->d0 = __NR_restart_syscall;
911 regs->pc -= 2;
912 break;
913 }
914 regs->d0 = -EINTR;
915 break;
916
917 case -ERESTARTSYS:
918 if (has_handler && !(ka->sa.sa_flags & SA_RESTART)) {
919 regs->d0 = -EINTR;
920 break;
921 }
922 /* fallthrough */
923 case -ERESTARTNOINTR:
924 do_restart:
925 regs->d0 = regs->orig_d0;
926 regs->pc -= 2;
927 break;
928 }
929}
930
931void ptrace_signal_deliver(struct pt_regs *regs, void *cookie)
932{
933 if (regs->orig_d0 < 0)
934 return;
935 switch (regs->d0) {
936 case -ERESTARTNOHAND:
937 case -ERESTARTSYS:
938 case -ERESTARTNOINTR:
939 regs->d0 = regs->orig_d0;
940 regs->orig_d0 = -1;
941 regs->pc -= 2;
942 break;
943 }
944}
945
946/*
947 * OK, we're invoking a handler
948 */
949static void
950handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,
951 sigset_t *oldset, struct pt_regs *regs)
952{
953 int err;
954 /* are we from a system call? */
955 if (regs->orig_d0 >= 0)
956 /* If so, check system call restarting.. */
957 handle_restart(regs, ka, 1);
958
959 /* set up the stack frame */
960 if (ka->sa.sa_flags & SA_SIGINFO)
961 err = setup_rt_frame(sig, ka, info, oldset, regs);
962 else
963 err = setup_frame(sig, ka, oldset, regs);
964
965 if (err)
966 return;
967
968 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
969 if (!(ka->sa.sa_flags & SA_NODEFER))
970 sigaddset(&current->blocked,sig);
971 recalc_sigpending();
972
973 if (test_thread_flag(TIF_DELAYED_TRACE)) {
974 regs->sr &= ~0x8000;
975 send_sig(SIGTRAP, current, 1);
976 }
977
978 clear_thread_flag(TIF_RESTORE_SIGMASK);
979}
980
981/*
982 * Note that 'init' is a special process: it doesn't get signals it doesn't
983 * want to handle. Thus you cannot kill init even with a SIGKILL even by
984 * mistake.
985 */
986asmlinkage void do_signal(struct pt_regs *regs)
987{
988 siginfo_t info;
989 struct k_sigaction ka;
990 int signr;
991 sigset_t *oldset;
992
993 current->thread.esp0 = (unsigned long) regs;
994
995 if (test_thread_flag(TIF_RESTORE_SIGMASK))
996 oldset = &current->saved_sigmask;
997 else
998 oldset = &current->blocked;
999
1000 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
1001 if (signr > 0) {
1002 /* Whee! Actually deliver the signal. */
1003 handle_signal(signr, &ka, &info, oldset, regs);
1004 return;
1005 }
1006
1007 /* Did we come from a system call? */
1008 if (regs->orig_d0 >= 0)
1009 /* Restart the system call - no handlers present */
1010 handle_restart(regs, NULL, 0);
1011
1012 /* If there's no signal to deliver, we just restore the saved mask. */
1013 if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
1014 clear_thread_flag(TIF_RESTORE_SIGMASK);
1015 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
1016 }
1017}
diff --git a/arch/m68knommu/kernel/signal.c b/arch/m68k/kernel/signal_no.c
index 36a81bb6835a..36a81bb6835a 100644
--- a/arch/m68knommu/kernel/signal.c
+++ b/arch/m68k/kernel/signal_no.c
diff --git a/arch/m68k/kernel/sys_m68k.c b/arch/m68k/kernel/sys_m68k.c
index 3db2e7f902aa..63013df33584 100644
--- a/arch/m68k/kernel/sys_m68k.c
+++ b/arch/m68k/kernel/sys_m68k.c
@@ -1,546 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * linux/arch/m68k/kernel/sys_m68k.c 2#include "sys_m68k_mm.c"
3 * 3#else
4 * This file contains various random system calls that 4#include "sys_m68k_no.c"
5 * have a non-standard calling sequence on the Linux/m68k 5#endif
6 * platform.
7 */
8
9#include <linux/capability.h>
10#include <linux/errno.h>
11#include <linux/sched.h>
12#include <linux/mm.h>
13#include <linux/fs.h>
14#include <linux/smp.h>
15#include <linux/sem.h>
16#include <linux/msg.h>
17#include <linux/shm.h>
18#include <linux/stat.h>
19#include <linux/syscalls.h>
20#include <linux/mman.h>
21#include <linux/file.h>
22#include <linux/ipc.h>
23
24#include <asm/setup.h>
25#include <asm/uaccess.h>
26#include <asm/cachectl.h>
27#include <asm/traps.h>
28#include <asm/page.h>
29#include <asm/unistd.h>
30#include <linux/elf.h>
31#include <asm/tlb.h>
32
33asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
34 unsigned long error_code);
35
36asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
37 unsigned long prot, unsigned long flags,
38 unsigned long fd, unsigned long pgoff)
39{
40 /*
41 * This is wrong for sun3 - there PAGE_SIZE is 8Kb,
42 * so we need to shift the argument down by 1; m68k mmap64(3)
43 * (in libc) expects the last argument of mmap2 in 4Kb units.
44 */
45 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
46}
47
48/* Convert virtual (user) address VADDR to physical address PADDR */
49#define virt_to_phys_040(vaddr) \
50({ \
51 unsigned long _mmusr, _paddr; \
52 \
53 __asm__ __volatile__ (".chip 68040\n\t" \
54 "ptestr (%1)\n\t" \
55 "movec %%mmusr,%0\n\t" \
56 ".chip 68k" \
57 : "=r" (_mmusr) \
58 : "a" (vaddr)); \
59 _paddr = (_mmusr & MMU_R_040) ? (_mmusr & PAGE_MASK) : 0; \
60 _paddr; \
61})
62
63static inline int
64cache_flush_040 (unsigned long addr, int scope, int cache, unsigned long len)
65{
66 unsigned long paddr, i;
67
68 switch (scope)
69 {
70 case FLUSH_SCOPE_ALL:
71 switch (cache)
72 {
73 case FLUSH_CACHE_DATA:
74 /* This nop is needed for some broken versions of the 68040. */
75 __asm__ __volatile__ ("nop\n\t"
76 ".chip 68040\n\t"
77 "cpusha %dc\n\t"
78 ".chip 68k");
79 break;
80 case FLUSH_CACHE_INSN:
81 __asm__ __volatile__ ("nop\n\t"
82 ".chip 68040\n\t"
83 "cpusha %ic\n\t"
84 ".chip 68k");
85 break;
86 default:
87 case FLUSH_CACHE_BOTH:
88 __asm__ __volatile__ ("nop\n\t"
89 ".chip 68040\n\t"
90 "cpusha %bc\n\t"
91 ".chip 68k");
92 break;
93 }
94 break;
95
96 case FLUSH_SCOPE_LINE:
97 /* Find the physical address of the first mapped page in the
98 address range. */
99 if ((paddr = virt_to_phys_040(addr))) {
100 paddr += addr & ~(PAGE_MASK | 15);
101 len = (len + (addr & 15) + 15) >> 4;
102 } else {
103 unsigned long tmp = PAGE_SIZE - (addr & ~PAGE_MASK);
104
105 if (len <= tmp)
106 return 0;
107 addr += tmp;
108 len -= tmp;
109 tmp = PAGE_SIZE;
110 for (;;)
111 {
112 if ((paddr = virt_to_phys_040(addr)))
113 break;
114 if (len <= tmp)
115 return 0;
116 addr += tmp;
117 len -= tmp;
118 }
119 len = (len + 15) >> 4;
120 }
121 i = (PAGE_SIZE - (paddr & ~PAGE_MASK)) >> 4;
122 while (len--)
123 {
124 switch (cache)
125 {
126 case FLUSH_CACHE_DATA:
127 __asm__ __volatile__ ("nop\n\t"
128 ".chip 68040\n\t"
129 "cpushl %%dc,(%0)\n\t"
130 ".chip 68k"
131 : : "a" (paddr));
132 break;
133 case FLUSH_CACHE_INSN:
134 __asm__ __volatile__ ("nop\n\t"
135 ".chip 68040\n\t"
136 "cpushl %%ic,(%0)\n\t"
137 ".chip 68k"
138 : : "a" (paddr));
139 break;
140 default:
141 case FLUSH_CACHE_BOTH:
142 __asm__ __volatile__ ("nop\n\t"
143 ".chip 68040\n\t"
144 "cpushl %%bc,(%0)\n\t"
145 ".chip 68k"
146 : : "a" (paddr));
147 break;
148 }
149 if (!--i && len)
150 {
151 /*
152 * No need to page align here since it is done by
153 * virt_to_phys_040().
154 */
155 addr += PAGE_SIZE;
156 i = PAGE_SIZE / 16;
157 /* Recompute physical address when crossing a page
158 boundary. */
159 for (;;)
160 {
161 if ((paddr = virt_to_phys_040(addr)))
162 break;
163 if (len <= i)
164 return 0;
165 len -= i;
166 addr += PAGE_SIZE;
167 }
168 }
169 else
170 paddr += 16;
171 }
172 break;
173
174 default:
175 case FLUSH_SCOPE_PAGE:
176 len += (addr & ~PAGE_MASK) + (PAGE_SIZE - 1);
177 for (len >>= PAGE_SHIFT; len--; addr += PAGE_SIZE)
178 {
179 if (!(paddr = virt_to_phys_040(addr)))
180 continue;
181 switch (cache)
182 {
183 case FLUSH_CACHE_DATA:
184 __asm__ __volatile__ ("nop\n\t"
185 ".chip 68040\n\t"
186 "cpushp %%dc,(%0)\n\t"
187 ".chip 68k"
188 : : "a" (paddr));
189 break;
190 case FLUSH_CACHE_INSN:
191 __asm__ __volatile__ ("nop\n\t"
192 ".chip 68040\n\t"
193 "cpushp %%ic,(%0)\n\t"
194 ".chip 68k"
195 : : "a" (paddr));
196 break;
197 default:
198 case FLUSH_CACHE_BOTH:
199 __asm__ __volatile__ ("nop\n\t"
200 ".chip 68040\n\t"
201 "cpushp %%bc,(%0)\n\t"
202 ".chip 68k"
203 : : "a" (paddr));
204 break;
205 }
206 }
207 break;
208 }
209 return 0;
210}
211
212#define virt_to_phys_060(vaddr) \
213({ \
214 unsigned long paddr; \
215 __asm__ __volatile__ (".chip 68060\n\t" \
216 "plpar (%0)\n\t" \
217 ".chip 68k" \
218 : "=a" (paddr) \
219 : "0" (vaddr)); \
220 (paddr); /* XXX */ \
221})
222
223static inline int
224cache_flush_060 (unsigned long addr, int scope, int cache, unsigned long len)
225{
226 unsigned long paddr, i;
227
228 /*
229 * 68060 manual says:
230 * cpush %dc : flush DC, remains valid (with our %cacr setup)
231 * cpush %ic : invalidate IC
232 * cpush %bc : flush DC + invalidate IC
233 */
234 switch (scope)
235 {
236 case FLUSH_SCOPE_ALL:
237 switch (cache)
238 {
239 case FLUSH_CACHE_DATA:
240 __asm__ __volatile__ (".chip 68060\n\t"
241 "cpusha %dc\n\t"
242 ".chip 68k");
243 break;
244 case FLUSH_CACHE_INSN:
245 __asm__ __volatile__ (".chip 68060\n\t"
246 "cpusha %ic\n\t"
247 ".chip 68k");
248 break;
249 default:
250 case FLUSH_CACHE_BOTH:
251 __asm__ __volatile__ (".chip 68060\n\t"
252 "cpusha %bc\n\t"
253 ".chip 68k");
254 break;
255 }
256 break;
257
258 case FLUSH_SCOPE_LINE:
259 /* Find the physical address of the first mapped page in the
260 address range. */
261 len += addr & 15;
262 addr &= -16;
263 if (!(paddr = virt_to_phys_060(addr))) {
264 unsigned long tmp = PAGE_SIZE - (addr & ~PAGE_MASK);
265
266 if (len <= tmp)
267 return 0;
268 addr += tmp;
269 len -= tmp;
270 tmp = PAGE_SIZE;
271 for (;;)
272 {
273 if ((paddr = virt_to_phys_060(addr)))
274 break;
275 if (len <= tmp)
276 return 0;
277 addr += tmp;
278 len -= tmp;
279 }
280 }
281 len = (len + 15) >> 4;
282 i = (PAGE_SIZE - (paddr & ~PAGE_MASK)) >> 4;
283 while (len--)
284 {
285 switch (cache)
286 {
287 case FLUSH_CACHE_DATA:
288 __asm__ __volatile__ (".chip 68060\n\t"
289 "cpushl %%dc,(%0)\n\t"
290 ".chip 68k"
291 : : "a" (paddr));
292 break;
293 case FLUSH_CACHE_INSN:
294 __asm__ __volatile__ (".chip 68060\n\t"
295 "cpushl %%ic,(%0)\n\t"
296 ".chip 68k"
297 : : "a" (paddr));
298 break;
299 default:
300 case FLUSH_CACHE_BOTH:
301 __asm__ __volatile__ (".chip 68060\n\t"
302 "cpushl %%bc,(%0)\n\t"
303 ".chip 68k"
304 : : "a" (paddr));
305 break;
306 }
307 if (!--i && len)
308 {
309
310 /*
311 * We just want to jump to the first cache line
312 * in the next page.
313 */
314 addr += PAGE_SIZE;
315 addr &= PAGE_MASK;
316
317 i = PAGE_SIZE / 16;
318 /* Recompute physical address when crossing a page
319 boundary. */
320 for (;;)
321 {
322 if ((paddr = virt_to_phys_060(addr)))
323 break;
324 if (len <= i)
325 return 0;
326 len -= i;
327 addr += PAGE_SIZE;
328 }
329 }
330 else
331 paddr += 16;
332 }
333 break;
334
335 default:
336 case FLUSH_SCOPE_PAGE:
337 len += (addr & ~PAGE_MASK) + (PAGE_SIZE - 1);
338 addr &= PAGE_MASK; /* Workaround for bug in some
339 revisions of the 68060 */
340 for (len >>= PAGE_SHIFT; len--; addr += PAGE_SIZE)
341 {
342 if (!(paddr = virt_to_phys_060(addr)))
343 continue;
344 switch (cache)
345 {
346 case FLUSH_CACHE_DATA:
347 __asm__ __volatile__ (".chip 68060\n\t"
348 "cpushp %%dc,(%0)\n\t"
349 ".chip 68k"
350 : : "a" (paddr));
351 break;
352 case FLUSH_CACHE_INSN:
353 __asm__ __volatile__ (".chip 68060\n\t"
354 "cpushp %%ic,(%0)\n\t"
355 ".chip 68k"
356 : : "a" (paddr));
357 break;
358 default:
359 case FLUSH_CACHE_BOTH:
360 __asm__ __volatile__ (".chip 68060\n\t"
361 "cpushp %%bc,(%0)\n\t"
362 ".chip 68k"
363 : : "a" (paddr));
364 break;
365 }
366 }
367 break;
368 }
369 return 0;
370}
371
372/* sys_cacheflush -- flush (part of) the processor cache. */
373asmlinkage int
374sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
375{
376 struct vm_area_struct *vma;
377 int ret = -EINVAL;
378
379 if (scope < FLUSH_SCOPE_LINE || scope > FLUSH_SCOPE_ALL ||
380 cache & ~FLUSH_CACHE_BOTH)
381 goto out;
382
383 if (scope == FLUSH_SCOPE_ALL) {
384 /* Only the superuser may explicitly flush the whole cache. */
385 ret = -EPERM;
386 if (!capable(CAP_SYS_ADMIN))
387 goto out;
388 } else {
389 /*
390 * Verify that the specified address region actually belongs
391 * to this process.
392 */
393 vma = find_vma (current->mm, addr);
394 ret = -EINVAL;
395 /* Check for overflow. */
396 if (addr + len < addr)
397 goto out;
398 if (vma == NULL || addr < vma->vm_start || addr + len > vma->vm_end)
399 goto out;
400 }
401
402 if (CPU_IS_020_OR_030) {
403 if (scope == FLUSH_SCOPE_LINE && len < 256) {
404 unsigned long cacr;
405 __asm__ ("movec %%cacr, %0" : "=r" (cacr));
406 if (cache & FLUSH_CACHE_INSN)
407 cacr |= 4;
408 if (cache & FLUSH_CACHE_DATA)
409 cacr |= 0x400;
410 len >>= 2;
411 while (len--) {
412 __asm__ __volatile__ ("movec %1, %%caar\n\t"
413 "movec %0, %%cacr"
414 : /* no outputs */
415 : "r" (cacr), "r" (addr));
416 addr += 4;
417 }
418 } else {
419 /* Flush the whole cache, even if page granularity requested. */
420 unsigned long cacr;
421 __asm__ ("movec %%cacr, %0" : "=r" (cacr));
422 if (cache & FLUSH_CACHE_INSN)
423 cacr |= 8;
424 if (cache & FLUSH_CACHE_DATA)
425 cacr |= 0x800;
426 __asm__ __volatile__ ("movec %0, %%cacr" : : "r" (cacr));
427 }
428 ret = 0;
429 goto out;
430 } else {
431 /*
432 * 040 or 060: don't blindly trust 'scope', someone could
433 * try to flush a few megs of memory.
434 */
435
436 if (len>=3*PAGE_SIZE && scope<FLUSH_SCOPE_PAGE)
437 scope=FLUSH_SCOPE_PAGE;
438 if (len>=10*PAGE_SIZE && scope<FLUSH_SCOPE_ALL)
439 scope=FLUSH_SCOPE_ALL;
440 if (CPU_IS_040) {
441 ret = cache_flush_040 (addr, scope, cache, len);
442 } else if (CPU_IS_060) {
443 ret = cache_flush_060 (addr, scope, cache, len);
444 }
445 }
446out:
447 return ret;
448}
449
450asmlinkage int sys_getpagesize(void)
451{
452 return PAGE_SIZE;
453}
454
455/*
456 * Do a system call from kernel instead of calling sys_execve so we
457 * end up with proper pt_regs.
458 */
459int kernel_execve(const char *filename,
460 const char *const argv[],
461 const char *const envp[])
462{
463 register long __res asm ("%d0") = __NR_execve;
464 register long __a asm ("%d1") = (long)(filename);
465 register long __b asm ("%d2") = (long)(argv);
466 register long __c asm ("%d3") = (long)(envp);
467 asm volatile ("trap #0" : "+d" (__res)
468 : "d" (__a), "d" (__b), "d" (__c));
469 return __res;
470}
471
472asmlinkage unsigned long sys_get_thread_area(void)
473{
474 return current_thread_info()->tp_value;
475}
476
477asmlinkage int sys_set_thread_area(unsigned long tp)
478{
479 current_thread_info()->tp_value = tp;
480 return 0;
481}
482
483/* This syscall gets its arguments in A0 (mem), D2 (oldval) and
484 D1 (newval). */
485asmlinkage int
486sys_atomic_cmpxchg_32(unsigned long newval, int oldval, int d3, int d4, int d5,
487 unsigned long __user * mem)
488{
489 /* This was borrowed from ARM's implementation. */
490 for (;;) {
491 struct mm_struct *mm = current->mm;
492 pgd_t *pgd;
493 pmd_t *pmd;
494 pte_t *pte;
495 spinlock_t *ptl;
496 unsigned long mem_value;
497
498 down_read(&mm->mmap_sem);
499 pgd = pgd_offset(mm, (unsigned long)mem);
500 if (!pgd_present(*pgd))
501 goto bad_access;
502 pmd = pmd_offset(pgd, (unsigned long)mem);
503 if (!pmd_present(*pmd))
504 goto bad_access;
505 pte = pte_offset_map_lock(mm, pmd, (unsigned long)mem, &ptl);
506 if (!pte_present(*pte) || !pte_dirty(*pte)
507 || !pte_write(*pte)) {
508 pte_unmap_unlock(pte, ptl);
509 goto bad_access;
510 }
511
512 mem_value = *mem;
513 if (mem_value == oldval)
514 *mem = newval;
515
516 pte_unmap_unlock(pte, ptl);
517 up_read(&mm->mmap_sem);
518 return mem_value;
519
520 bad_access:
521 up_read(&mm->mmap_sem);
522 /* This is not necessarily a bad access, we can get here if
523 a memory we're trying to write to should be copied-on-write.
524 Make the kernel do the necessary page stuff, then re-iterate.
525 Simulate a write access fault to do that. */
526 {
527 /* The first argument of the function corresponds to
528 D1, which is the first field of struct pt_regs. */
529 struct pt_regs *fp = (struct pt_regs *)&newval;
530
531 /* '3' is an RMW flag. */
532 if (do_page_fault(fp, (unsigned long)mem, 3))
533 /* If the do_page_fault() failed, we don't
534 have anything meaningful to return.
535 There should be a SIGSEGV pending for
536 the process. */
537 return 0xdeadbeef;
538 }
539 }
540}
541
542asmlinkage int sys_atomic_barrier(void)
543{
544 /* no code needed for uniprocs */
545 return 0;
546}
diff --git a/arch/m68k/kernel/sys_m68k_mm.c b/arch/m68k/kernel/sys_m68k_mm.c
new file mode 100644
index 000000000000..3db2e7f902aa
--- /dev/null
+++ b/arch/m68k/kernel/sys_m68k_mm.c
@@ -0,0 +1,546 @@
1/*
2 * linux/arch/m68k/kernel/sys_m68k.c
3 *
4 * This file contains various random system calls that
5 * have a non-standard calling sequence on the Linux/m68k
6 * platform.
7 */
8
9#include <linux/capability.h>
10#include <linux/errno.h>
11#include <linux/sched.h>
12#include <linux/mm.h>
13#include <linux/fs.h>
14#include <linux/smp.h>
15#include <linux/sem.h>
16#include <linux/msg.h>
17#include <linux/shm.h>
18#include <linux/stat.h>
19#include <linux/syscalls.h>
20#include <linux/mman.h>
21#include <linux/file.h>
22#include <linux/ipc.h>
23
24#include <asm/setup.h>
25#include <asm/uaccess.h>
26#include <asm/cachectl.h>
27#include <asm/traps.h>
28#include <asm/page.h>
29#include <asm/unistd.h>
30#include <linux/elf.h>
31#include <asm/tlb.h>
32
33asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
34 unsigned long error_code);
35
36asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
37 unsigned long prot, unsigned long flags,
38 unsigned long fd, unsigned long pgoff)
39{
40 /*
41 * This is wrong for sun3 - there PAGE_SIZE is 8Kb,
42 * so we need to shift the argument down by 1; m68k mmap64(3)
43 * (in libc) expects the last argument of mmap2 in 4Kb units.
44 */
45 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
46}
47
48/* Convert virtual (user) address VADDR to physical address PADDR */
49#define virt_to_phys_040(vaddr) \
50({ \
51 unsigned long _mmusr, _paddr; \
52 \
53 __asm__ __volatile__ (".chip 68040\n\t" \
54 "ptestr (%1)\n\t" \
55 "movec %%mmusr,%0\n\t" \
56 ".chip 68k" \
57 : "=r" (_mmusr) \
58 : "a" (vaddr)); \
59 _paddr = (_mmusr & MMU_R_040) ? (_mmusr & PAGE_MASK) : 0; \
60 _paddr; \
61})
62
63static inline int
64cache_flush_040 (unsigned long addr, int scope, int cache, unsigned long len)
65{
66 unsigned long paddr, i;
67
68 switch (scope)
69 {
70 case FLUSH_SCOPE_ALL:
71 switch (cache)
72 {
73 case FLUSH_CACHE_DATA:
74 /* This nop is needed for some broken versions of the 68040. */
75 __asm__ __volatile__ ("nop\n\t"
76 ".chip 68040\n\t"
77 "cpusha %dc\n\t"
78 ".chip 68k");
79 break;
80 case FLUSH_CACHE_INSN:
81 __asm__ __volatile__ ("nop\n\t"
82 ".chip 68040\n\t"
83 "cpusha %ic\n\t"
84 ".chip 68k");
85 break;
86 default:
87 case FLUSH_CACHE_BOTH:
88 __asm__ __volatile__ ("nop\n\t"
89 ".chip 68040\n\t"
90 "cpusha %bc\n\t"
91 ".chip 68k");
92 break;
93 }
94 break;
95
96 case FLUSH_SCOPE_LINE:
97 /* Find the physical address of the first mapped page in the
98 address range. */
99 if ((paddr = virt_to_phys_040(addr))) {
100 paddr += addr & ~(PAGE_MASK | 15);
101 len = (len + (addr & 15) + 15) >> 4;
102 } else {
103 unsigned long tmp = PAGE_SIZE - (addr & ~PAGE_MASK);
104
105 if (len <= tmp)
106 return 0;
107 addr += tmp;
108 len -= tmp;
109 tmp = PAGE_SIZE;
110 for (;;)
111 {
112 if ((paddr = virt_to_phys_040(addr)))
113 break;
114 if (len <= tmp)
115 return 0;
116 addr += tmp;
117 len -= tmp;
118 }
119 len = (len + 15) >> 4;
120 }
121 i = (PAGE_SIZE - (paddr & ~PAGE_MASK)) >> 4;
122 while (len--)
123 {
124 switch (cache)
125 {
126 case FLUSH_CACHE_DATA:
127 __asm__ __volatile__ ("nop\n\t"
128 ".chip 68040\n\t"
129 "cpushl %%dc,(%0)\n\t"
130 ".chip 68k"
131 : : "a" (paddr));
132 break;
133 case FLUSH_CACHE_INSN:
134 __asm__ __volatile__ ("nop\n\t"
135 ".chip 68040\n\t"
136 "cpushl %%ic,(%0)\n\t"
137 ".chip 68k"
138 : : "a" (paddr));
139 break;
140 default:
141 case FLUSH_CACHE_BOTH:
142 __asm__ __volatile__ ("nop\n\t"
143 ".chip 68040\n\t"
144 "cpushl %%bc,(%0)\n\t"
145 ".chip 68k"
146 : : "a" (paddr));
147 break;
148 }
149 if (!--i && len)
150 {
151 /*
152 * No need to page align here since it is done by
153 * virt_to_phys_040().
154 */
155 addr += PAGE_SIZE;
156 i = PAGE_SIZE / 16;
157 /* Recompute physical address when crossing a page
158 boundary. */
159 for (;;)
160 {
161 if ((paddr = virt_to_phys_040(addr)))
162 break;
163 if (len <= i)
164 return 0;
165 len -= i;
166 addr += PAGE_SIZE;
167 }
168 }
169 else
170 paddr += 16;
171 }
172 break;
173
174 default:
175 case FLUSH_SCOPE_PAGE:
176 len += (addr & ~PAGE_MASK) + (PAGE_SIZE - 1);
177 for (len >>= PAGE_SHIFT; len--; addr += PAGE_SIZE)
178 {
179 if (!(paddr = virt_to_phys_040(addr)))
180 continue;
181 switch (cache)
182 {
183 case FLUSH_CACHE_DATA:
184 __asm__ __volatile__ ("nop\n\t"
185 ".chip 68040\n\t"
186 "cpushp %%dc,(%0)\n\t"
187 ".chip 68k"
188 : : "a" (paddr));
189 break;
190 case FLUSH_CACHE_INSN:
191 __asm__ __volatile__ ("nop\n\t"
192 ".chip 68040\n\t"
193 "cpushp %%ic,(%0)\n\t"
194 ".chip 68k"
195 : : "a" (paddr));
196 break;
197 default:
198 case FLUSH_CACHE_BOTH:
199 __asm__ __volatile__ ("nop\n\t"
200 ".chip 68040\n\t"
201 "cpushp %%bc,(%0)\n\t"
202 ".chip 68k"
203 : : "a" (paddr));
204 break;
205 }
206 }
207 break;
208 }
209 return 0;
210}
211
212#define virt_to_phys_060(vaddr) \
213({ \
214 unsigned long paddr; \
215 __asm__ __volatile__ (".chip 68060\n\t" \
216 "plpar (%0)\n\t" \
217 ".chip 68k" \
218 : "=a" (paddr) \
219 : "0" (vaddr)); \
220 (paddr); /* XXX */ \
221})
222
223static inline int
224cache_flush_060 (unsigned long addr, int scope, int cache, unsigned long len)
225{
226 unsigned long paddr, i;
227
228 /*
229 * 68060 manual says:
230 * cpush %dc : flush DC, remains valid (with our %cacr setup)
231 * cpush %ic : invalidate IC
232 * cpush %bc : flush DC + invalidate IC
233 */
234 switch (scope)
235 {
236 case FLUSH_SCOPE_ALL:
237 switch (cache)
238 {
239 case FLUSH_CACHE_DATA:
240 __asm__ __volatile__ (".chip 68060\n\t"
241 "cpusha %dc\n\t"
242 ".chip 68k");
243 break;
244 case FLUSH_CACHE_INSN:
245 __asm__ __volatile__ (".chip 68060\n\t"
246 "cpusha %ic\n\t"
247 ".chip 68k");
248 break;
249 default:
250 case FLUSH_CACHE_BOTH:
251 __asm__ __volatile__ (".chip 68060\n\t"
252 "cpusha %bc\n\t"
253 ".chip 68k");
254 break;
255 }
256 break;
257
258 case FLUSH_SCOPE_LINE:
259 /* Find the physical address of the first mapped page in the
260 address range. */
261 len += addr & 15;
262 addr &= -16;
263 if (!(paddr = virt_to_phys_060(addr))) {
264 unsigned long tmp = PAGE_SIZE - (addr & ~PAGE_MASK);
265
266 if (len <= tmp)
267 return 0;
268 addr += tmp;
269 len -= tmp;
270 tmp = PAGE_SIZE;
271 for (;;)
272 {
273 if ((paddr = virt_to_phys_060(addr)))
274 break;
275 if (len <= tmp)
276 return 0;
277 addr += tmp;
278 len -= tmp;
279 }
280 }
281 len = (len + 15) >> 4;
282 i = (PAGE_SIZE - (paddr & ~PAGE_MASK)) >> 4;
283 while (len--)
284 {
285 switch (cache)
286 {
287 case FLUSH_CACHE_DATA:
288 __asm__ __volatile__ (".chip 68060\n\t"
289 "cpushl %%dc,(%0)\n\t"
290 ".chip 68k"
291 : : "a" (paddr));
292 break;
293 case FLUSH_CACHE_INSN:
294 __asm__ __volatile__ (".chip 68060\n\t"
295 "cpushl %%ic,(%0)\n\t"
296 ".chip 68k"
297 : : "a" (paddr));
298 break;
299 default:
300 case FLUSH_CACHE_BOTH:
301 __asm__ __volatile__ (".chip 68060\n\t"
302 "cpushl %%bc,(%0)\n\t"
303 ".chip 68k"
304 : : "a" (paddr));
305 break;
306 }
307 if (!--i && len)
308 {
309
310 /*
311 * We just want to jump to the first cache line
312 * in the next page.
313 */
314 addr += PAGE_SIZE;
315 addr &= PAGE_MASK;
316
317 i = PAGE_SIZE / 16;
318 /* Recompute physical address when crossing a page
319 boundary. */
320 for (;;)
321 {
322 if ((paddr = virt_to_phys_060(addr)))
323 break;
324 if (len <= i)
325 return 0;
326 len -= i;
327 addr += PAGE_SIZE;
328 }
329 }
330 else
331 paddr += 16;
332 }
333 break;
334
335 default:
336 case FLUSH_SCOPE_PAGE:
337 len += (addr & ~PAGE_MASK) + (PAGE_SIZE - 1);
338 addr &= PAGE_MASK; /* Workaround for bug in some
339 revisions of the 68060 */
340 for (len >>= PAGE_SHIFT; len--; addr += PAGE_SIZE)
341 {
342 if (!(paddr = virt_to_phys_060(addr)))
343 continue;
344 switch (cache)
345 {
346 case FLUSH_CACHE_DATA:
347 __asm__ __volatile__ (".chip 68060\n\t"
348 "cpushp %%dc,(%0)\n\t"
349 ".chip 68k"
350 : : "a" (paddr));
351 break;
352 case FLUSH_CACHE_INSN:
353 __asm__ __volatile__ (".chip 68060\n\t"
354 "cpushp %%ic,(%0)\n\t"
355 ".chip 68k"
356 : : "a" (paddr));
357 break;
358 default:
359 case FLUSH_CACHE_BOTH:
360 __asm__ __volatile__ (".chip 68060\n\t"
361 "cpushp %%bc,(%0)\n\t"
362 ".chip 68k"
363 : : "a" (paddr));
364 break;
365 }
366 }
367 break;
368 }
369 return 0;
370}
371
372/* sys_cacheflush -- flush (part of) the processor cache. */
373asmlinkage int
374sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
375{
376 struct vm_area_struct *vma;
377 int ret = -EINVAL;
378
379 if (scope < FLUSH_SCOPE_LINE || scope > FLUSH_SCOPE_ALL ||
380 cache & ~FLUSH_CACHE_BOTH)
381 goto out;
382
383 if (scope == FLUSH_SCOPE_ALL) {
384 /* Only the superuser may explicitly flush the whole cache. */
385 ret = -EPERM;
386 if (!capable(CAP_SYS_ADMIN))
387 goto out;
388 } else {
389 /*
390 * Verify that the specified address region actually belongs
391 * to this process.
392 */
393 vma = find_vma (current->mm, addr);
394 ret = -EINVAL;
395 /* Check for overflow. */
396 if (addr + len < addr)
397 goto out;
398 if (vma == NULL || addr < vma->vm_start || addr + len > vma->vm_end)
399 goto out;
400 }
401
402 if (CPU_IS_020_OR_030) {
403 if (scope == FLUSH_SCOPE_LINE && len < 256) {
404 unsigned long cacr;
405 __asm__ ("movec %%cacr, %0" : "=r" (cacr));
406 if (cache & FLUSH_CACHE_INSN)
407 cacr |= 4;
408 if (cache & FLUSH_CACHE_DATA)
409 cacr |= 0x400;
410 len >>= 2;
411 while (len--) {
412 __asm__ __volatile__ ("movec %1, %%caar\n\t"
413 "movec %0, %%cacr"
414 : /* no outputs */
415 : "r" (cacr), "r" (addr));
416 addr += 4;
417 }
418 } else {
419 /* Flush the whole cache, even if page granularity requested. */
420 unsigned long cacr;
421 __asm__ ("movec %%cacr, %0" : "=r" (cacr));
422 if (cache & FLUSH_CACHE_INSN)
423 cacr |= 8;
424 if (cache & FLUSH_CACHE_DATA)
425 cacr |= 0x800;
426 __asm__ __volatile__ ("movec %0, %%cacr" : : "r" (cacr));
427 }
428 ret = 0;
429 goto out;
430 } else {
431 /*
432 * 040 or 060: don't blindly trust 'scope', someone could
433 * try to flush a few megs of memory.
434 */
435
436 if (len>=3*PAGE_SIZE && scope<FLUSH_SCOPE_PAGE)
437 scope=FLUSH_SCOPE_PAGE;
438 if (len>=10*PAGE_SIZE && scope<FLUSH_SCOPE_ALL)
439 scope=FLUSH_SCOPE_ALL;
440 if (CPU_IS_040) {
441 ret = cache_flush_040 (addr, scope, cache, len);
442 } else if (CPU_IS_060) {
443 ret = cache_flush_060 (addr, scope, cache, len);
444 }
445 }
446out:
447 return ret;
448}
449
450asmlinkage int sys_getpagesize(void)
451{
452 return PAGE_SIZE;
453}
454
455/*
456 * Do a system call from kernel instead of calling sys_execve so we
457 * end up with proper pt_regs.
458 */
459int kernel_execve(const char *filename,
460 const char *const argv[],
461 const char *const envp[])
462{
463 register long __res asm ("%d0") = __NR_execve;
464 register long __a asm ("%d1") = (long)(filename);
465 register long __b asm ("%d2") = (long)(argv);
466 register long __c asm ("%d3") = (long)(envp);
467 asm volatile ("trap #0" : "+d" (__res)
468 : "d" (__a), "d" (__b), "d" (__c));
469 return __res;
470}
471
472asmlinkage unsigned long sys_get_thread_area(void)
473{
474 return current_thread_info()->tp_value;
475}
476
477asmlinkage int sys_set_thread_area(unsigned long tp)
478{
479 current_thread_info()->tp_value = tp;
480 return 0;
481}
482
483/* This syscall gets its arguments in A0 (mem), D2 (oldval) and
484 D1 (newval). */
485asmlinkage int
486sys_atomic_cmpxchg_32(unsigned long newval, int oldval, int d3, int d4, int d5,
487 unsigned long __user * mem)
488{
489 /* This was borrowed from ARM's implementation. */
490 for (;;) {
491 struct mm_struct *mm = current->mm;
492 pgd_t *pgd;
493 pmd_t *pmd;
494 pte_t *pte;
495 spinlock_t *ptl;
496 unsigned long mem_value;
497
498 down_read(&mm->mmap_sem);
499 pgd = pgd_offset(mm, (unsigned long)mem);
500 if (!pgd_present(*pgd))
501 goto bad_access;
502 pmd = pmd_offset(pgd, (unsigned long)mem);
503 if (!pmd_present(*pmd))
504 goto bad_access;
505 pte = pte_offset_map_lock(mm, pmd, (unsigned long)mem, &ptl);
506 if (!pte_present(*pte) || !pte_dirty(*pte)
507 || !pte_write(*pte)) {
508 pte_unmap_unlock(pte, ptl);
509 goto bad_access;
510 }
511
512 mem_value = *mem;
513 if (mem_value == oldval)
514 *mem = newval;
515
516 pte_unmap_unlock(pte, ptl);
517 up_read(&mm->mmap_sem);
518 return mem_value;
519
520 bad_access:
521 up_read(&mm->mmap_sem);
522 /* This is not necessarily a bad access, we can get here if
523 a memory we're trying to write to should be copied-on-write.
524 Make the kernel do the necessary page stuff, then re-iterate.
525 Simulate a write access fault to do that. */
526 {
527 /* The first argument of the function corresponds to
528 D1, which is the first field of struct pt_regs. */
529 struct pt_regs *fp = (struct pt_regs *)&newval;
530
531 /* '3' is an RMW flag. */
532 if (do_page_fault(fp, (unsigned long)mem, 3))
533 /* If the do_page_fault() failed, we don't
534 have anything meaningful to return.
535 There should be a SIGSEGV pending for
536 the process. */
537 return 0xdeadbeef;
538 }
539 }
540}
541
542asmlinkage int sys_atomic_barrier(void)
543{
544 /* no code needed for uniprocs */
545 return 0;
546}
diff --git a/arch/m68knommu/kernel/sys_m68k.c b/arch/m68k/kernel/sys_m68k_no.c
index 68488ae47f0a..68488ae47f0a 100644
--- a/arch/m68knommu/kernel/sys_m68k.c
+++ b/arch/m68k/kernel/sys_m68k_no.c
diff --git a/arch/m68knommu/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S
index 79b1ed198c07..79b1ed198c07 100644
--- a/arch/m68knommu/kernel/syscalltable.S
+++ b/arch/m68k/kernel/syscalltable.S
diff --git a/arch/m68k/kernel/time.c b/arch/m68k/kernel/time.c
index 18b34ee5db3b..a5cf40c26de5 100644
--- a/arch/m68k/kernel/time.c
+++ b/arch/m68k/kernel/time.c
@@ -1,114 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * linux/arch/m68k/kernel/time.c 2#include "time_mm.c"
3 * 3#else
4 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 4#include "time_no.c"
5 * 5#endif
6 * This file contains the m68k-specific time handling details.
7 * Most of the stuff is located in the machine specific files.
8 *
9 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
10 * "A Kernel Model for Precision Timekeeping" by Dave Mills
11 */
12
13#include <linux/errno.h>
14#include <linux/module.h>
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/param.h>
18#include <linux/string.h>
19#include <linux/mm.h>
20#include <linux/rtc.h>
21#include <linux/platform_device.h>
22
23#include <asm/machdep.h>
24#include <asm/io.h>
25#include <asm/irq_regs.h>
26
27#include <linux/time.h>
28#include <linux/timex.h>
29#include <linux/profile.h>
30
31static inline int set_rtc_mmss(unsigned long nowtime)
32{
33 if (mach_set_clock_mmss)
34 return mach_set_clock_mmss (nowtime);
35 return -1;
36}
37
38/*
39 * timer_interrupt() needs to keep up the real-time clock,
40 * as well as call the "xtime_update()" routine every clocktick
41 */
42static irqreturn_t timer_interrupt(int irq, void *dummy)
43{
44 xtime_update(1);
45 update_process_times(user_mode(get_irq_regs()));
46 profile_tick(CPU_PROFILING);
47
48#ifdef CONFIG_HEARTBEAT
49 /* use power LED as a heartbeat instead -- much more useful
50 for debugging -- based on the version for PReP by Cort */
51 /* acts like an actual heart beat -- ie thump-thump-pause... */
52 if (mach_heartbeat) {
53 static unsigned cnt = 0, period = 0, dist = 0;
54
55 if (cnt == 0 || cnt == dist)
56 mach_heartbeat( 1 );
57 else if (cnt == 7 || cnt == dist+7)
58 mach_heartbeat( 0 );
59
60 if (++cnt > period) {
61 cnt = 0;
62 /* The hyperbolic function below modifies the heartbeat period
63 * length in dependency of the current (5min) load. It goes
64 * through the points f(0)=126, f(1)=86, f(5)=51,
65 * f(inf)->30. */
66 period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
67 dist = period / 4;
68 }
69 }
70#endif /* CONFIG_HEARTBEAT */
71 return IRQ_HANDLED;
72}
73
74void read_persistent_clock(struct timespec *ts)
75{
76 struct rtc_time time;
77 ts->tv_sec = 0;
78 ts->tv_nsec = 0;
79
80 if (mach_hwclk) {
81 mach_hwclk(0, &time);
82
83 if ((time.tm_year += 1900) < 1970)
84 time.tm_year += 100;
85 ts->tv_sec = mktime(time.tm_year, time.tm_mon, time.tm_mday,
86 time.tm_hour, time.tm_min, time.tm_sec);
87 }
88}
89
90void __init time_init(void)
91{
92 mach_sched_init(timer_interrupt);
93}
94
95u32 arch_gettimeoffset(void)
96{
97 return mach_gettimeoffset() * 1000;
98}
99
100static int __init rtc_init(void)
101{
102 struct platform_device *pdev;
103
104 if (!mach_hwclk)
105 return -ENODEV;
106
107 pdev = platform_device_register_simple("rtc-generic", -1, NULL, 0);
108 if (IS_ERR(pdev))
109 return PTR_ERR(pdev);
110
111 return 0;
112}
113
114module_init(rtc_init);
diff --git a/arch/m68k/kernel/time_mm.c b/arch/m68k/kernel/time_mm.c
new file mode 100644
index 000000000000..18b34ee5db3b
--- /dev/null
+++ b/arch/m68k/kernel/time_mm.c
@@ -0,0 +1,114 @@
1/*
2 * linux/arch/m68k/kernel/time.c
3 *
4 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
5 *
6 * This file contains the m68k-specific time handling details.
7 * Most of the stuff is located in the machine specific files.
8 *
9 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
10 * "A Kernel Model for Precision Timekeeping" by Dave Mills
11 */
12
13#include <linux/errno.h>
14#include <linux/module.h>
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/param.h>
18#include <linux/string.h>
19#include <linux/mm.h>
20#include <linux/rtc.h>
21#include <linux/platform_device.h>
22
23#include <asm/machdep.h>
24#include <asm/io.h>
25#include <asm/irq_regs.h>
26
27#include <linux/time.h>
28#include <linux/timex.h>
29#include <linux/profile.h>
30
31static inline int set_rtc_mmss(unsigned long nowtime)
32{
33 if (mach_set_clock_mmss)
34 return mach_set_clock_mmss (nowtime);
35 return -1;
36}
37
38/*
39 * timer_interrupt() needs to keep up the real-time clock,
40 * as well as call the "xtime_update()" routine every clocktick
41 */
42static irqreturn_t timer_interrupt(int irq, void *dummy)
43{
44 xtime_update(1);
45 update_process_times(user_mode(get_irq_regs()));
46 profile_tick(CPU_PROFILING);
47
48#ifdef CONFIG_HEARTBEAT
49 /* use power LED as a heartbeat instead -- much more useful
50 for debugging -- based on the version for PReP by Cort */
51 /* acts like an actual heart beat -- ie thump-thump-pause... */
52 if (mach_heartbeat) {
53 static unsigned cnt = 0, period = 0, dist = 0;
54
55 if (cnt == 0 || cnt == dist)
56 mach_heartbeat( 1 );
57 else if (cnt == 7 || cnt == dist+7)
58 mach_heartbeat( 0 );
59
60 if (++cnt > period) {
61 cnt = 0;
62 /* The hyperbolic function below modifies the heartbeat period
63 * length in dependency of the current (5min) load. It goes
64 * through the points f(0)=126, f(1)=86, f(5)=51,
65 * f(inf)->30. */
66 period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
67 dist = period / 4;
68 }
69 }
70#endif /* CONFIG_HEARTBEAT */
71 return IRQ_HANDLED;
72}
73
74void read_persistent_clock(struct timespec *ts)
75{
76 struct rtc_time time;
77 ts->tv_sec = 0;
78 ts->tv_nsec = 0;
79
80 if (mach_hwclk) {
81 mach_hwclk(0, &time);
82
83 if ((time.tm_year += 1900) < 1970)
84 time.tm_year += 100;
85 ts->tv_sec = mktime(time.tm_year, time.tm_mon, time.tm_mday,
86 time.tm_hour, time.tm_min, time.tm_sec);
87 }
88}
89
90void __init time_init(void)
91{
92 mach_sched_init(timer_interrupt);
93}
94
95u32 arch_gettimeoffset(void)
96{
97 return mach_gettimeoffset() * 1000;
98}
99
100static int __init rtc_init(void)
101{
102 struct platform_device *pdev;
103
104 if (!mach_hwclk)
105 return -ENODEV;
106
107 pdev = platform_device_register_simple("rtc-generic", -1, NULL, 0);
108 if (IS_ERR(pdev))
109 return PTR_ERR(pdev);
110
111 return 0;
112}
113
114module_init(rtc_init);
diff --git a/arch/m68knommu/kernel/time.c b/arch/m68k/kernel/time_no.c
index 6623909f70e6..6623909f70e6 100644
--- a/arch/m68knommu/kernel/time.c
+++ b/arch/m68k/kernel/time_no.c
diff --git a/arch/m68k/kernel/traps.c b/arch/m68k/kernel/traps.c
index 4022bbc28878..c98add3f5f0f 100644
--- a/arch/m68k/kernel/traps.c
+++ b/arch/m68k/kernel/traps.c
@@ -1,1207 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * linux/arch/m68k/kernel/traps.c 2#include "traps_mm.c"
3 *
4 * Copyright (C) 1993, 1994 by Hamish Macdonald
5 *
6 * 68040 fixes by Michael Rausch
7 * 68040 fixes by Martin Apel
8 * 68040 fixes and writeback by Richard Zidlicky
9 * 68060 fixes by Roman Hodek
10 * 68060 fixes by Jesper Skov
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file COPYING in the main directory of this archive
14 * for more details.
15 */
16
17/*
18 * Sets up all exception vectors
19 */
20
21#include <linux/sched.h>
22#include <linux/signal.h>
23#include <linux/kernel.h>
24#include <linux/mm.h>
25#include <linux/module.h>
26#include <linux/user.h>
27#include <linux/string.h>
28#include <linux/linkage.h>
29#include <linux/init.h>
30#include <linux/ptrace.h>
31#include <linux/kallsyms.h>
32
33#include <asm/setup.h>
34#include <asm/fpu.h>
35#include <asm/system.h>
36#include <asm/uaccess.h>
37#include <asm/traps.h>
38#include <asm/pgalloc.h>
39#include <asm/machdep.h>
40#include <asm/siginfo.h>
41
42/* assembler routines */
43asmlinkage void system_call(void);
44asmlinkage void buserr(void);
45asmlinkage void trap(void);
46asmlinkage void nmihandler(void);
47#ifdef CONFIG_M68KFPU_EMU
48asmlinkage void fpu_emu(void);
49#endif
50
51e_vector vectors[256];
52
53/* nmi handler for the Amiga */
54asm(".text\n"
55 __ALIGN_STR "\n"
56 "nmihandler: rte");
57
58/*
59 * this must be called very early as the kernel might
60 * use some instruction that are emulated on the 060
61 * and so we're prepared for early probe attempts (e.g. nf_init).
62 */
63void __init base_trap_init(void)
64{
65 if (MACH_IS_SUN3X) {
66 extern e_vector *sun3x_prom_vbr;
67
68 __asm__ volatile ("movec %%vbr, %0" : "=r" (sun3x_prom_vbr));
69 }
70
71 /* setup the exception vector table */
72 __asm__ volatile ("movec %0,%%vbr" : : "r" ((void*)vectors));
73
74 if (CPU_IS_060) {
75 /* set up ISP entry points */
76 asmlinkage void unimp_vec(void) asm ("_060_isp_unimp");
77
78 vectors[VEC_UNIMPII] = unimp_vec;
79 }
80
81 vectors[VEC_BUSERR] = buserr;
82 vectors[VEC_ILLEGAL] = trap;
83 vectors[VEC_SYS] = system_call;
84}
85
86void __init trap_init (void)
87{
88 int i;
89
90 for (i = VEC_SPUR; i <= VEC_INT7; i++)
91 vectors[i] = bad_inthandler;
92
93 for (i = 0; i < VEC_USER; i++)
94 if (!vectors[i])
95 vectors[i] = trap;
96
97 for (i = VEC_USER; i < 256; i++)
98 vectors[i] = bad_inthandler;
99
100#ifdef CONFIG_M68KFPU_EMU
101 if (FPU_IS_EMU)
102 vectors[VEC_LINE11] = fpu_emu;
103#endif
104
105 if (CPU_IS_040 && !FPU_IS_EMU) {
106 /* set up FPSP entry points */
107 asmlinkage void dz_vec(void) asm ("dz");
108 asmlinkage void inex_vec(void) asm ("inex");
109 asmlinkage void ovfl_vec(void) asm ("ovfl");
110 asmlinkage void unfl_vec(void) asm ("unfl");
111 asmlinkage void snan_vec(void) asm ("snan");
112 asmlinkage void operr_vec(void) asm ("operr");
113 asmlinkage void bsun_vec(void) asm ("bsun");
114 asmlinkage void fline_vec(void) asm ("fline");
115 asmlinkage void unsupp_vec(void) asm ("unsupp");
116
117 vectors[VEC_FPDIVZ] = dz_vec;
118 vectors[VEC_FPIR] = inex_vec;
119 vectors[VEC_FPOVER] = ovfl_vec;
120 vectors[VEC_FPUNDER] = unfl_vec;
121 vectors[VEC_FPNAN] = snan_vec;
122 vectors[VEC_FPOE] = operr_vec;
123 vectors[VEC_FPBRUC] = bsun_vec;
124 vectors[VEC_LINE11] = fline_vec;
125 vectors[VEC_FPUNSUP] = unsupp_vec;
126 }
127
128 if (CPU_IS_060 && !FPU_IS_EMU) {
129 /* set up IFPSP entry points */
130 asmlinkage void snan_vec6(void) asm ("_060_fpsp_snan");
131 asmlinkage void operr_vec6(void) asm ("_060_fpsp_operr");
132 asmlinkage void ovfl_vec6(void) asm ("_060_fpsp_ovfl");
133 asmlinkage void unfl_vec6(void) asm ("_060_fpsp_unfl");
134 asmlinkage void dz_vec6(void) asm ("_060_fpsp_dz");
135 asmlinkage void inex_vec6(void) asm ("_060_fpsp_inex");
136 asmlinkage void fline_vec6(void) asm ("_060_fpsp_fline");
137 asmlinkage void unsupp_vec6(void) asm ("_060_fpsp_unsupp");
138 asmlinkage void effadd_vec6(void) asm ("_060_fpsp_effadd");
139
140 vectors[VEC_FPNAN] = snan_vec6;
141 vectors[VEC_FPOE] = operr_vec6;
142 vectors[VEC_FPOVER] = ovfl_vec6;
143 vectors[VEC_FPUNDER] = unfl_vec6;
144 vectors[VEC_FPDIVZ] = dz_vec6;
145 vectors[VEC_FPIR] = inex_vec6;
146 vectors[VEC_LINE11] = fline_vec6;
147 vectors[VEC_FPUNSUP] = unsupp_vec6;
148 vectors[VEC_UNIMPEA] = effadd_vec6;
149 }
150
151 /* if running on an amiga, make the NMI interrupt do nothing */
152 if (MACH_IS_AMIGA) {
153 vectors[VEC_INT7] = nmihandler;
154 }
155}
156
157
158static const char *vec_names[] = {
159 [VEC_RESETSP] = "RESET SP",
160 [VEC_RESETPC] = "RESET PC",
161 [VEC_BUSERR] = "BUS ERROR",
162 [VEC_ADDRERR] = "ADDRESS ERROR",
163 [VEC_ILLEGAL] = "ILLEGAL INSTRUCTION",
164 [VEC_ZERODIV] = "ZERO DIVIDE",
165 [VEC_CHK] = "CHK",
166 [VEC_TRAP] = "TRAPcc",
167 [VEC_PRIV] = "PRIVILEGE VIOLATION",
168 [VEC_TRACE] = "TRACE",
169 [VEC_LINE10] = "LINE 1010",
170 [VEC_LINE11] = "LINE 1111",
171 [VEC_RESV12] = "UNASSIGNED RESERVED 12",
172 [VEC_COPROC] = "COPROCESSOR PROTOCOL VIOLATION",
173 [VEC_FORMAT] = "FORMAT ERROR",
174 [VEC_UNINT] = "UNINITIALIZED INTERRUPT",
175 [VEC_RESV16] = "UNASSIGNED RESERVED 16",
176 [VEC_RESV17] = "UNASSIGNED RESERVED 17",
177 [VEC_RESV18] = "UNASSIGNED RESERVED 18",
178 [VEC_RESV19] = "UNASSIGNED RESERVED 19",
179 [VEC_RESV20] = "UNASSIGNED RESERVED 20",
180 [VEC_RESV21] = "UNASSIGNED RESERVED 21",
181 [VEC_RESV22] = "UNASSIGNED RESERVED 22",
182 [VEC_RESV23] = "UNASSIGNED RESERVED 23",
183 [VEC_SPUR] = "SPURIOUS INTERRUPT",
184 [VEC_INT1] = "LEVEL 1 INT",
185 [VEC_INT2] = "LEVEL 2 INT",
186 [VEC_INT3] = "LEVEL 3 INT",
187 [VEC_INT4] = "LEVEL 4 INT",
188 [VEC_INT5] = "LEVEL 5 INT",
189 [VEC_INT6] = "LEVEL 6 INT",
190 [VEC_INT7] = "LEVEL 7 INT",
191 [VEC_SYS] = "SYSCALL",
192 [VEC_TRAP1] = "TRAP #1",
193 [VEC_TRAP2] = "TRAP #2",
194 [VEC_TRAP3] = "TRAP #3",
195 [VEC_TRAP4] = "TRAP #4",
196 [VEC_TRAP5] = "TRAP #5",
197 [VEC_TRAP6] = "TRAP #6",
198 [VEC_TRAP7] = "TRAP #7",
199 [VEC_TRAP8] = "TRAP #8",
200 [VEC_TRAP9] = "TRAP #9",
201 [VEC_TRAP10] = "TRAP #10",
202 [VEC_TRAP11] = "TRAP #11",
203 [VEC_TRAP12] = "TRAP #12",
204 [VEC_TRAP13] = "TRAP #13",
205 [VEC_TRAP14] = "TRAP #14",
206 [VEC_TRAP15] = "TRAP #15",
207 [VEC_FPBRUC] = "FPCP BSUN",
208 [VEC_FPIR] = "FPCP INEXACT",
209 [VEC_FPDIVZ] = "FPCP DIV BY 0",
210 [VEC_FPUNDER] = "FPCP UNDERFLOW",
211 [VEC_FPOE] = "FPCP OPERAND ERROR",
212 [VEC_FPOVER] = "FPCP OVERFLOW",
213 [VEC_FPNAN] = "FPCP SNAN",
214 [VEC_FPUNSUP] = "FPCP UNSUPPORTED OPERATION",
215 [VEC_MMUCFG] = "MMU CONFIGURATION ERROR",
216 [VEC_MMUILL] = "MMU ILLEGAL OPERATION ERROR",
217 [VEC_MMUACC] = "MMU ACCESS LEVEL VIOLATION ERROR",
218 [VEC_RESV59] = "UNASSIGNED RESERVED 59",
219 [VEC_UNIMPEA] = "UNASSIGNED RESERVED 60",
220 [VEC_UNIMPII] = "UNASSIGNED RESERVED 61",
221 [VEC_RESV62] = "UNASSIGNED RESERVED 62",
222 [VEC_RESV63] = "UNASSIGNED RESERVED 63",
223};
224
225static const char *space_names[] = {
226 [0] = "Space 0",
227 [USER_DATA] = "User Data",
228 [USER_PROGRAM] = "User Program",
229#ifndef CONFIG_SUN3
230 [3] = "Space 3",
231#else 3#else
232 [FC_CONTROL] = "Control", 4#include "traps_no.c"
233#endif
234 [4] = "Space 4",
235 [SUPER_DATA] = "Super Data",
236 [SUPER_PROGRAM] = "Super Program",
237 [CPU_SPACE] = "CPU"
238};
239
240void die_if_kernel(char *,struct pt_regs *,int);
241asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
242 unsigned long error_code);
243int send_fault_sig(struct pt_regs *regs);
244
245asmlinkage void trap_c(struct frame *fp);
246
247#if defined (CONFIG_M68060)
248static inline void access_error060 (struct frame *fp)
249{
250 unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */
251
252#ifdef DEBUG
253 printk("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr);
254#endif
255
256 if (fslw & MMU060_BPE) {
257 /* branch prediction error -> clear branch cache */
258 __asm__ __volatile__ ("movec %/cacr,%/d0\n\t"
259 "orl #0x00400000,%/d0\n\t"
260 "movec %/d0,%/cacr"
261 : : : "d0" );
262 /* return if there's no other error */
263 if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE))
264 return;
265 }
266
267 if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) {
268 unsigned long errorcode;
269 unsigned long addr = fp->un.fmt4.effaddr;
270
271 if (fslw & MMU060_MA)
272 addr = (addr + PAGE_SIZE - 1) & PAGE_MASK;
273
274 errorcode = 1;
275 if (fslw & MMU060_DESC_ERR) {
276 __flush_tlb040_one(addr);
277 errorcode = 0;
278 }
279 if (fslw & MMU060_W)
280 errorcode |= 2;
281#ifdef DEBUG
282 printk("errorcode = %d\n", errorcode );
283#endif
284 do_page_fault(&fp->ptregs, addr, errorcode);
285 } else if (fslw & (MMU060_SEE)){
286 /* Software Emulation Error.
287 * fault during mem_read/mem_write in ifpsp060/os.S
288 */
289 send_fault_sig(&fp->ptregs);
290 } else if (!(fslw & (MMU060_RE|MMU060_WE)) ||
291 send_fault_sig(&fp->ptregs) > 0) {
292 printk("pc=%#lx, fa=%#lx\n", fp->ptregs.pc, fp->un.fmt4.effaddr);
293 printk( "68060 access error, fslw=%lx\n", fslw );
294 trap_c( fp );
295 }
296}
297#endif /* CONFIG_M68060 */
298
299#if defined (CONFIG_M68040)
300static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs)
301{
302 unsigned long mmusr;
303 mm_segment_t old_fs = get_fs();
304
305 set_fs(MAKE_MM_SEG(wbs));
306
307 if (iswrite)
308 asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr));
309 else
310 asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr));
311
312 asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr));
313
314 set_fs(old_fs);
315
316 return mmusr;
317}
318
319static inline int do_040writeback1(unsigned short wbs, unsigned long wba,
320 unsigned long wbd)
321{
322 int res = 0;
323 mm_segment_t old_fs = get_fs();
324
325 /* set_fs can not be moved, otherwise put_user() may oops */
326 set_fs(MAKE_MM_SEG(wbs));
327
328 switch (wbs & WBSIZ_040) {
329 case BA_SIZE_BYTE:
330 res = put_user(wbd & 0xff, (char __user *)wba);
331 break;
332 case BA_SIZE_WORD:
333 res = put_user(wbd & 0xffff, (short __user *)wba);
334 break;
335 case BA_SIZE_LONG:
336 res = put_user(wbd, (int __user *)wba);
337 break;
338 }
339
340 /* set_fs can not be moved, otherwise put_user() may oops */
341 set_fs(old_fs);
342
343
344#ifdef DEBUG
345 printk("do_040writeback1, res=%d\n",res);
346#endif
347
348 return res;
349}
350
351/* after an exception in a writeback the stack frame corresponding
352 * to that exception is discarded, set a few bits in the old frame
353 * to simulate what it should look like
354 */
355static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs)
356{
357 fp->un.fmt7.faddr = wba;
358 fp->un.fmt7.ssw = wbs & 0xff;
359 if (wba != current->thread.faddr)
360 fp->un.fmt7.ssw |= MA_040;
361}
362
363static inline void do_040writebacks(struct frame *fp)
364{
365 int res = 0;
366#if 0
367 if (fp->un.fmt7.wb1s & WBV_040)
368 printk("access_error040: cannot handle 1st writeback. oops.\n");
369#endif
370
371 if ((fp->un.fmt7.wb2s & WBV_040) &&
372 !(fp->un.fmt7.wb2s & WBTT_040)) {
373 res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a,
374 fp->un.fmt7.wb2d);
375 if (res)
376 fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s);
377 else
378 fp->un.fmt7.wb2s = 0;
379 }
380
381 /* do the 2nd wb only if the first one was successful (except for a kernel wb) */
382 if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) {
383 res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a,
384 fp->un.fmt7.wb3d);
385 if (res)
386 {
387 fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s);
388
389 fp->un.fmt7.wb2s = fp->un.fmt7.wb3s;
390 fp->un.fmt7.wb3s &= (~WBV_040);
391 fp->un.fmt7.wb2a = fp->un.fmt7.wb3a;
392 fp->un.fmt7.wb2d = fp->un.fmt7.wb3d;
393 }
394 else
395 fp->un.fmt7.wb3s = 0;
396 }
397
398 if (res)
399 send_fault_sig(&fp->ptregs);
400}
401
402/*
403 * called from sigreturn(), must ensure userspace code didn't
404 * manipulate exception frame to circumvent protection, then complete
405 * pending writebacks
406 * we just clear TM2 to turn it into a userspace access
407 */
408asmlinkage void berr_040cleanup(struct frame *fp)
409{
410 fp->un.fmt7.wb2s &= ~4;
411 fp->un.fmt7.wb3s &= ~4;
412
413 do_040writebacks(fp);
414}
415
416static inline void access_error040(struct frame *fp)
417{
418 unsigned short ssw = fp->un.fmt7.ssw;
419 unsigned long mmusr;
420
421#ifdef DEBUG
422 printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr);
423 printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s,
424 fp->un.fmt7.wb2s, fp->un.fmt7.wb3s);
425 printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n",
426 fp->un.fmt7.wb2a, fp->un.fmt7.wb3a,
427 fp->un.fmt7.wb2d, fp->un.fmt7.wb3d);
428#endif
429
430 if (ssw & ATC_040) {
431 unsigned long addr = fp->un.fmt7.faddr;
432 unsigned long errorcode;
433
434 /*
435 * The MMU status has to be determined AFTER the address
436 * has been corrected if there was a misaligned access (MA).
437 */
438 if (ssw & MA_040)
439 addr = (addr + 7) & -8;
440
441 /* MMU error, get the MMUSR info for this access */
442 mmusr = probe040(!(ssw & RW_040), addr, ssw);
443#ifdef DEBUG
444 printk("mmusr = %lx\n", mmusr);
445#endif
446 errorcode = 1;
447 if (!(mmusr & MMU_R_040)) {
448 /* clear the invalid atc entry */
449 __flush_tlb040_one(addr);
450 errorcode = 0;
451 }
452
453 /* despite what documentation seems to say, RMW
454 * accesses have always both the LK and RW bits set */
455 if (!(ssw & RW_040) || (ssw & LK_040))
456 errorcode |= 2;
457
458 if (do_page_fault(&fp->ptregs, addr, errorcode)) {
459#ifdef DEBUG
460 printk("do_page_fault() !=0\n");
461#endif
462 if (user_mode(&fp->ptregs)){
463 /* delay writebacks after signal delivery */
464#ifdef DEBUG
465 printk(".. was usermode - return\n");
466#endif
467 return;
468 }
469 /* disable writeback into user space from kernel
470 * (if do_page_fault didn't fix the mapping,
471 * the writeback won't do good)
472 */
473disable_wb:
474#ifdef DEBUG
475 printk(".. disabling wb2\n");
476#endif
477 if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr)
478 fp->un.fmt7.wb2s &= ~WBV_040;
479 if (fp->un.fmt7.wb3a == fp->un.fmt7.faddr)
480 fp->un.fmt7.wb3s &= ~WBV_040;
481 }
482 } else {
483 /* In case of a bus error we either kill the process or expect
484 * the kernel to catch the fault, which then is also responsible
485 * for cleaning up the mess.
486 */
487 current->thread.signo = SIGBUS;
488 current->thread.faddr = fp->un.fmt7.faddr;
489 if (send_fault_sig(&fp->ptregs) >= 0)
490 printk("68040 bus error (ssw=%x, faddr=%lx)\n", ssw,
491 fp->un.fmt7.faddr);
492 goto disable_wb;
493 }
494
495 do_040writebacks(fp);
496}
497#endif /* CONFIG_M68040 */
498
499#if defined(CONFIG_SUN3)
500#include <asm/sun3mmu.h>
501
502extern int mmu_emu_handle_fault (unsigned long, int, int);
503
504/* sun3 version of bus_error030 */
505
506static inline void bus_error030 (struct frame *fp)
507{
508 unsigned char buserr_type = sun3_get_buserr ();
509 unsigned long addr, errorcode;
510 unsigned short ssw = fp->un.fmtb.ssw;
511 extern unsigned long _sun3_map_test_start, _sun3_map_test_end;
512
513#ifdef DEBUG
514 if (ssw & (FC | FB))
515 printk ("Instruction fault at %#010lx\n",
516 ssw & FC ?
517 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
518 :
519 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
520 if (ssw & DF)
521 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
522 ssw & RW ? "read" : "write",
523 fp->un.fmtb.daddr,
524 space_names[ssw & DFC], fp->ptregs.pc);
525#endif
526
527 /*
528 * Check if this page should be demand-mapped. This needs to go before
529 * the testing for a bad kernel-space access (demand-mapping applies
530 * to kernel accesses too).
531 */
532
533 if ((ssw & DF)
534 && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) {
535 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0))
536 return;
537 }
538
539 /* Check for kernel-space pagefault (BAD). */
540 if (fp->ptregs.sr & PS_S) {
541 /* kernel fault must be a data fault to user space */
542 if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
543 // try checking the kernel mappings before surrender
544 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1))
545 return;
546 /* instruction fault or kernel data fault! */
547 if (ssw & (FC | FB))
548 printk ("Instruction fault at %#010lx\n",
549 fp->ptregs.pc);
550 if (ssw & DF) {
551 /* was this fault incurred testing bus mappings? */
552 if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) &&
553 (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) {
554 send_fault_sig(&fp->ptregs);
555 return;
556 }
557
558 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
559 ssw & RW ? "read" : "write",
560 fp->un.fmtb.daddr,
561 space_names[ssw & DFC], fp->ptregs.pc);
562 }
563 printk ("BAD KERNEL BUSERR\n");
564
565 die_if_kernel("Oops", &fp->ptregs,0);
566 force_sig(SIGKILL, current);
567 return;
568 }
569 } else {
570 /* user fault */
571 if (!(ssw & (FC | FB)) && !(ssw & DF))
572 /* not an instruction fault or data fault! BAD */
573 panic ("USER BUSERR w/o instruction or data fault");
574 }
575
576
577 /* First handle the data fault, if any. */
578 if (ssw & DF) {
579 addr = fp->un.fmtb.daddr;
580
581// errorcode bit 0: 0 -> no page 1 -> protection fault
582// errorcode bit 1: 0 -> read fault 1 -> write fault
583
584// (buserr_type & SUN3_BUSERR_PROTERR) -> protection fault
585// (buserr_type & SUN3_BUSERR_INVALID) -> invalid page fault
586
587 if (buserr_type & SUN3_BUSERR_PROTERR)
588 errorcode = 0x01;
589 else if (buserr_type & SUN3_BUSERR_INVALID)
590 errorcode = 0x00;
591 else {
592#ifdef DEBUG
593 printk ("*** unexpected busfault type=%#04x\n", buserr_type);
594 printk ("invalid %s access at %#lx from pc %#lx\n",
595 !(ssw & RW) ? "write" : "read", addr,
596 fp->ptregs.pc);
597#endif
598 die_if_kernel ("Oops", &fp->ptregs, buserr_type);
599 force_sig (SIGBUS, current);
600 return;
601 }
602
603//todo: wtf is RM bit? --m
604 if (!(ssw & RW) || ssw & RM)
605 errorcode |= 0x02;
606
607 /* Handle page fault. */
608 do_page_fault (&fp->ptregs, addr, errorcode);
609
610 /* Retry the data fault now. */
611 return;
612 }
613
614 /* Now handle the instruction fault. */
615
616 /* Get the fault address. */
617 if (fp->ptregs.format == 0xA)
618 addr = fp->ptregs.pc + 4;
619 else
620 addr = fp->un.fmtb.baddr;
621 if (ssw & FC)
622 addr -= 2;
623
624 if (buserr_type & SUN3_BUSERR_INVALID) {
625 if (!mmu_emu_handle_fault (fp->un.fmtb.daddr, 1, 0))
626 do_page_fault (&fp->ptregs, addr, 0);
627 } else {
628#ifdef DEBUG
629 printk ("protection fault on insn access (segv).\n");
630#endif
631 force_sig (SIGSEGV, current);
632 }
633}
634#else
635#if defined(CPU_M68020_OR_M68030)
636static inline void bus_error030 (struct frame *fp)
637{
638 volatile unsigned short temp;
639 unsigned short mmusr;
640 unsigned long addr, errorcode;
641 unsigned short ssw = fp->un.fmtb.ssw;
642#ifdef DEBUG
643 unsigned long desc;
644
645 printk ("pid = %x ", current->pid);
646 printk ("SSW=%#06x ", ssw);
647
648 if (ssw & (FC | FB))
649 printk ("Instruction fault at %#010lx\n",
650 ssw & FC ?
651 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
652 :
653 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
654 if (ssw & DF)
655 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
656 ssw & RW ? "read" : "write",
657 fp->un.fmtb.daddr,
658 space_names[ssw & DFC], fp->ptregs.pc);
659#endif
660
661 /* ++andreas: If a data fault and an instruction fault happen
662 at the same time map in both pages. */
663
664 /* First handle the data fault, if any. */
665 if (ssw & DF) {
666 addr = fp->un.fmtb.daddr;
667
668#ifdef DEBUG
669 asm volatile ("ptestr %3,%2@,#7,%0\n\t"
670 "pmove %%psr,%1@"
671 : "=a&" (desc)
672 : "a" (&temp), "a" (addr), "d" (ssw));
673#else
674 asm volatile ("ptestr %2,%1@,#7\n\t"
675 "pmove %%psr,%0@"
676 : : "a" (&temp), "a" (addr), "d" (ssw));
677#endif
678 mmusr = temp;
679
680#ifdef DEBUG
681 printk("mmusr is %#x for addr %#lx in task %p\n",
682 mmusr, addr, current);
683 printk("descriptor address is %#lx, contents %#lx\n",
684 __va(desc), *(unsigned long *)__va(desc));
685#endif
686
687 errorcode = (mmusr & MMU_I) ? 0 : 1;
688 if (!(ssw & RW) || (ssw & RM))
689 errorcode |= 2;
690
691 if (mmusr & (MMU_I | MMU_WP)) {
692 if (ssw & 4) {
693 printk("Data %s fault at %#010lx in %s (pc=%#lx)\n",
694 ssw & RW ? "read" : "write",
695 fp->un.fmtb.daddr,
696 space_names[ssw & DFC], fp->ptregs.pc);
697 goto buserr;
698 }
699 /* Don't try to do anything further if an exception was
700 handled. */
701 if (do_page_fault (&fp->ptregs, addr, errorcode) < 0)
702 return;
703 } else if (!(mmusr & MMU_I)) {
704 /* probably a 020 cas fault */
705 if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0)
706 printk("unexpected bus error (%#x,%#x)\n", ssw, mmusr);
707 } else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
708 printk("invalid %s access at %#lx from pc %#lx\n",
709 !(ssw & RW) ? "write" : "read", addr,
710 fp->ptregs.pc);
711 die_if_kernel("Oops",&fp->ptregs,mmusr);
712 force_sig(SIGSEGV, current);
713 return;
714 } else {
715#if 0
716 static volatile long tlong;
717#endif
718
719 printk("weird %s access at %#lx from pc %#lx (ssw is %#x)\n",
720 !(ssw & RW) ? "write" : "read", addr,
721 fp->ptregs.pc, ssw);
722 asm volatile ("ptestr #1,%1@,#0\n\t"
723 "pmove %%psr,%0@"
724 : /* no outputs */
725 : "a" (&temp), "a" (addr));
726 mmusr = temp;
727
728 printk ("level 0 mmusr is %#x\n", mmusr);
729#if 0
730 asm volatile ("pmove %%tt0,%0@"
731 : /* no outputs */
732 : "a" (&tlong));
733 printk("tt0 is %#lx, ", tlong);
734 asm volatile ("pmove %%tt1,%0@"
735 : /* no outputs */
736 : "a" (&tlong));
737 printk("tt1 is %#lx\n", tlong);
738#endif
739#ifdef DEBUG
740 printk("Unknown SIGSEGV - 1\n");
741#endif
742 die_if_kernel("Oops",&fp->ptregs,mmusr);
743 force_sig(SIGSEGV, current);
744 return;
745 }
746
747 /* setup an ATC entry for the access about to be retried */
748 if (!(ssw & RW) || (ssw & RM))
749 asm volatile ("ploadw %1,%0@" : /* no outputs */
750 : "a" (addr), "d" (ssw));
751 else
752 asm volatile ("ploadr %1,%0@" : /* no outputs */
753 : "a" (addr), "d" (ssw));
754 }
755
756 /* Now handle the instruction fault. */
757
758 if (!(ssw & (FC|FB)))
759 return;
760
761 if (fp->ptregs.sr & PS_S) {
762 printk("Instruction fault at %#010lx\n",
763 fp->ptregs.pc);
764 buserr:
765 printk ("BAD KERNEL BUSERR\n");
766 die_if_kernel("Oops",&fp->ptregs,0);
767 force_sig(SIGKILL, current);
768 return;
769 }
770
771 /* get the fault address */
772 if (fp->ptregs.format == 10)
773 addr = fp->ptregs.pc + 4;
774 else
775 addr = fp->un.fmtb.baddr;
776 if (ssw & FC)
777 addr -= 2;
778
779 if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
780 /* Insn fault on same page as data fault. But we
781 should still create the ATC entry. */
782 goto create_atc_entry;
783
784#ifdef DEBUG
785 asm volatile ("ptestr #1,%2@,#7,%0\n\t"
786 "pmove %%psr,%1@"
787 : "=a&" (desc)
788 : "a" (&temp), "a" (addr));
789#else
790 asm volatile ("ptestr #1,%1@,#7\n\t"
791 "pmove %%psr,%0@"
792 : : "a" (&temp), "a" (addr));
793#endif
794 mmusr = temp;
795
796#ifdef DEBUG
797 printk ("mmusr is %#x for addr %#lx in task %p\n",
798 mmusr, addr, current);
799 printk ("descriptor address is %#lx, contents %#lx\n",
800 __va(desc), *(unsigned long *)__va(desc));
801#endif
802
803 if (mmusr & MMU_I)
804 do_page_fault (&fp->ptregs, addr, 0);
805 else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
806 printk ("invalid insn access at %#lx from pc %#lx\n",
807 addr, fp->ptregs.pc);
808#ifdef DEBUG
809 printk("Unknown SIGSEGV - 2\n");
810#endif
811 die_if_kernel("Oops",&fp->ptregs,mmusr);
812 force_sig(SIGSEGV, current);
813 return;
814 }
815
816create_atc_entry:
817 /* setup an ATC entry for the access about to be retried */
818 asm volatile ("ploadr #2,%0@" : /* no outputs */
819 : "a" (addr));
820}
821#endif /* CPU_M68020_OR_M68030 */
822#endif /* !CONFIG_SUN3 */
823
824asmlinkage void buserr_c(struct frame *fp)
825{
826 /* Only set esp0 if coming from user mode */
827 if (user_mode(&fp->ptregs))
828 current->thread.esp0 = (unsigned long) fp;
829
830#ifdef DEBUG
831 printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format);
832#endif
833
834 switch (fp->ptregs.format) {
835#if defined (CONFIG_M68060)
836 case 4: /* 68060 access error */
837 access_error060 (fp);
838 break;
839#endif
840#if defined (CONFIG_M68040)
841 case 0x7: /* 68040 access error */
842 access_error040 (fp);
843 break;
844#endif
845#if defined (CPU_M68020_OR_M68030)
846 case 0xa:
847 case 0xb:
848 bus_error030 (fp);
849 break;
850#endif
851 default:
852 die_if_kernel("bad frame format",&fp->ptregs,0);
853#ifdef DEBUG
854 printk("Unknown SIGSEGV - 4\n");
855#endif
856 force_sig(SIGSEGV, current);
857 }
858}
859
860
861static int kstack_depth_to_print = 48;
862
863void show_trace(unsigned long *stack)
864{
865 unsigned long *endstack;
866 unsigned long addr;
867 int i;
868
869 printk("Call Trace:");
870 addr = (unsigned long)stack + THREAD_SIZE - 1;
871 endstack = (unsigned long *)(addr & -THREAD_SIZE);
872 i = 0;
873 while (stack + 1 <= endstack) {
874 addr = *stack++;
875 /*
876 * If the address is either in the text segment of the
877 * kernel, or in the region which contains vmalloc'ed
878 * memory, it *may* be the address of a calling
879 * routine; if so, print it so that someone tracing
880 * down the cause of the crash will be able to figure
881 * out the call path that was taken.
882 */
883 if (__kernel_text_address(addr)) {
884#ifndef CONFIG_KALLSYMS
885 if (i % 5 == 0)
886 printk("\n ");
887#endif
888 printk(" [<%08lx>] %pS\n", addr, (void *)addr);
889 i++;
890 }
891 }
892 printk("\n");
893}
894
895void show_registers(struct pt_regs *regs)
896{
897 struct frame *fp = (struct frame *)regs;
898 mm_segment_t old_fs = get_fs();
899 u16 c, *cp;
900 unsigned long addr;
901 int i;
902
903 print_modules();
904 printk("PC: [<%08lx>] %pS\n", regs->pc, (void *)regs->pc);
905 printk("SR: %04x SP: %p a2: %08lx\n", regs->sr, regs, regs->a2);
906 printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
907 regs->d0, regs->d1, regs->d2, regs->d3);
908 printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
909 regs->d4, regs->d5, regs->a0, regs->a1);
910
911 printk("Process %s (pid: %d, task=%p)\n",
912 current->comm, task_pid_nr(current), current);
913 addr = (unsigned long)&fp->un;
914 printk("Frame format=%X ", regs->format);
915 switch (regs->format) {
916 case 0x2:
917 printk("instr addr=%08lx\n", fp->un.fmt2.iaddr);
918 addr += sizeof(fp->un.fmt2);
919 break;
920 case 0x3:
921 printk("eff addr=%08lx\n", fp->un.fmt3.effaddr);
922 addr += sizeof(fp->un.fmt3);
923 break;
924 case 0x4:
925 printk((CPU_IS_060 ? "fault addr=%08lx fslw=%08lx\n"
926 : "eff addr=%08lx pc=%08lx\n"),
927 fp->un.fmt4.effaddr, fp->un.fmt4.pc);
928 addr += sizeof(fp->un.fmt4);
929 break;
930 case 0x7:
931 printk("eff addr=%08lx ssw=%04x faddr=%08lx\n",
932 fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr);
933 printk("wb 1 stat/addr/data: %04x %08lx %08lx\n",
934 fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0);
935 printk("wb 2 stat/addr/data: %04x %08lx %08lx\n",
936 fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d);
937 printk("wb 3 stat/addr/data: %04x %08lx %08lx\n",
938 fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d);
939 printk("push data: %08lx %08lx %08lx %08lx\n",
940 fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2,
941 fp->un.fmt7.pd3);
942 addr += sizeof(fp->un.fmt7);
943 break;
944 case 0x9:
945 printk("instr addr=%08lx\n", fp->un.fmt9.iaddr);
946 addr += sizeof(fp->un.fmt9);
947 break;
948 case 0xa:
949 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
950 fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb,
951 fp->un.fmta.daddr, fp->un.fmta.dobuf);
952 addr += sizeof(fp->un.fmta);
953 break;
954 case 0xb:
955 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
956 fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb,
957 fp->un.fmtb.daddr, fp->un.fmtb.dobuf);
958 printk("baddr=%08lx dibuf=%08lx ver=%x\n",
959 fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver);
960 addr += sizeof(fp->un.fmtb);
961 break;
962 default:
963 printk("\n");
964 }
965 show_stack(NULL, (unsigned long *)addr);
966
967 printk("Code:");
968 set_fs(KERNEL_DS);
969 cp = (u16 *)regs->pc;
970 for (i = -8; i < 16; i++) {
971 if (get_user(c, cp + i) && i >= 0) {
972 printk(" Bad PC value.");
973 break;
974 }
975 printk(i ? " %04x" : " <%04x>", c);
976 }
977 set_fs(old_fs);
978 printk ("\n");
979}
980
981void show_stack(struct task_struct *task, unsigned long *stack)
982{
983 unsigned long *p;
984 unsigned long *endstack;
985 int i;
986
987 if (!stack) {
988 if (task)
989 stack = (unsigned long *)task->thread.esp0;
990 else
991 stack = (unsigned long *)&stack;
992 }
993 endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE);
994
995 printk("Stack from %08lx:", (unsigned long)stack);
996 p = stack;
997 for (i = 0; i < kstack_depth_to_print; i++) {
998 if (p + 1 > endstack)
999 break;
1000 if (i % 8 == 0)
1001 printk("\n ");
1002 printk(" %08lx", *p++);
1003 }
1004 printk("\n");
1005 show_trace(stack);
1006}
1007
1008/*
1009 * The architecture-independent backtrace generator
1010 */
1011void dump_stack(void)
1012{
1013 unsigned long stack;
1014
1015 show_trace(&stack);
1016}
1017
1018EXPORT_SYMBOL(dump_stack);
1019
1020void bad_super_trap (struct frame *fp)
1021{
1022 console_verbose();
1023 if (fp->ptregs.vector < 4 * ARRAY_SIZE(vec_names))
1024 printk ("*** %s *** FORMAT=%X\n",
1025 vec_names[(fp->ptregs.vector) >> 2],
1026 fp->ptregs.format);
1027 else
1028 printk ("*** Exception %d *** FORMAT=%X\n",
1029 (fp->ptregs.vector) >> 2,
1030 fp->ptregs.format);
1031 if (fp->ptregs.vector >> 2 == VEC_ADDRERR && CPU_IS_020_OR_030) {
1032 unsigned short ssw = fp->un.fmtb.ssw;
1033
1034 printk ("SSW=%#06x ", ssw);
1035
1036 if (ssw & RC)
1037 printk ("Pipe stage C instruction fault at %#010lx\n",
1038 (fp->ptregs.format) == 0xA ?
1039 fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2);
1040 if (ssw & RB)
1041 printk ("Pipe stage B instruction fault at %#010lx\n",
1042 (fp->ptregs.format) == 0xA ?
1043 fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
1044 if (ssw & DF)
1045 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
1046 ssw & RW ? "read" : "write",
1047 fp->un.fmtb.daddr, space_names[ssw & DFC],
1048 fp->ptregs.pc);
1049 }
1050 printk ("Current process id is %d\n", task_pid_nr(current));
1051 die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
1052}
1053
1054asmlinkage void trap_c(struct frame *fp)
1055{
1056 int sig;
1057 siginfo_t info;
1058
1059 if (fp->ptregs.sr & PS_S) {
1060 if (fp->ptregs.vector == VEC_TRACE << 2) {
1061 /* traced a trapping instruction on a 68020/30,
1062 * real exception will be executed afterwards.
1063 */
1064 } else if (!handle_kernel_fault(&fp->ptregs))
1065 bad_super_trap(fp);
1066 return;
1067 }
1068
1069 /* send the appropriate signal to the user program */
1070 switch ((fp->ptregs.vector) >> 2) {
1071 case VEC_ADDRERR:
1072 info.si_code = BUS_ADRALN;
1073 sig = SIGBUS;
1074 break;
1075 case VEC_ILLEGAL:
1076 case VEC_LINE10:
1077 case VEC_LINE11:
1078 info.si_code = ILL_ILLOPC;
1079 sig = SIGILL;
1080 break;
1081 case VEC_PRIV:
1082 info.si_code = ILL_PRVOPC;
1083 sig = SIGILL;
1084 break;
1085 case VEC_COPROC:
1086 info.si_code = ILL_COPROC;
1087 sig = SIGILL;
1088 break;
1089 case VEC_TRAP1:
1090 case VEC_TRAP2:
1091 case VEC_TRAP3:
1092 case VEC_TRAP4:
1093 case VEC_TRAP5:
1094 case VEC_TRAP6:
1095 case VEC_TRAP7:
1096 case VEC_TRAP8:
1097 case VEC_TRAP9:
1098 case VEC_TRAP10:
1099 case VEC_TRAP11:
1100 case VEC_TRAP12:
1101 case VEC_TRAP13:
1102 case VEC_TRAP14:
1103 info.si_code = ILL_ILLTRP;
1104 sig = SIGILL;
1105 break;
1106 case VEC_FPBRUC:
1107 case VEC_FPOE:
1108 case VEC_FPNAN:
1109 info.si_code = FPE_FLTINV;
1110 sig = SIGFPE;
1111 break;
1112 case VEC_FPIR:
1113 info.si_code = FPE_FLTRES;
1114 sig = SIGFPE;
1115 break;
1116 case VEC_FPDIVZ:
1117 info.si_code = FPE_FLTDIV;
1118 sig = SIGFPE;
1119 break;
1120 case VEC_FPUNDER:
1121 info.si_code = FPE_FLTUND;
1122 sig = SIGFPE;
1123 break;
1124 case VEC_FPOVER:
1125 info.si_code = FPE_FLTOVF;
1126 sig = SIGFPE;
1127 break;
1128 case VEC_ZERODIV:
1129 info.si_code = FPE_INTDIV;
1130 sig = SIGFPE;
1131 break;
1132 case VEC_CHK:
1133 case VEC_TRAP:
1134 info.si_code = FPE_INTOVF;
1135 sig = SIGFPE;
1136 break;
1137 case VEC_TRACE: /* ptrace single step */
1138 info.si_code = TRAP_TRACE;
1139 sig = SIGTRAP;
1140 break;
1141 case VEC_TRAP15: /* breakpoint */
1142 info.si_code = TRAP_BRKPT;
1143 sig = SIGTRAP;
1144 break;
1145 default:
1146 info.si_code = ILL_ILLOPC;
1147 sig = SIGILL;
1148 break;
1149 }
1150 info.si_signo = sig;
1151 info.si_errno = 0;
1152 switch (fp->ptregs.format) {
1153 default:
1154 info.si_addr = (void *) fp->ptregs.pc;
1155 break;
1156 case 2:
1157 info.si_addr = (void *) fp->un.fmt2.iaddr;
1158 break;
1159 case 7:
1160 info.si_addr = (void *) fp->un.fmt7.effaddr;
1161 break;
1162 case 9:
1163 info.si_addr = (void *) fp->un.fmt9.iaddr;
1164 break;
1165 case 10:
1166 info.si_addr = (void *) fp->un.fmta.daddr;
1167 break;
1168 case 11:
1169 info.si_addr = (void *) fp->un.fmtb.daddr;
1170 break;
1171 }
1172 force_sig_info (sig, &info, current);
1173}
1174
1175void die_if_kernel (char *str, struct pt_regs *fp, int nr)
1176{
1177 if (!(fp->sr & PS_S))
1178 return;
1179
1180 console_verbose();
1181 printk("%s: %08x\n",str,nr);
1182 show_registers(fp);
1183 add_taint(TAINT_DIE);
1184 do_exit(SIGSEGV);
1185}
1186
1187/*
1188 * This function is called if an error occur while accessing
1189 * user-space from the fpsp040 code.
1190 */
1191asmlinkage void fpsp040_die(void)
1192{
1193 do_exit(SIGSEGV);
1194}
1195
1196#ifdef CONFIG_M68KFPU_EMU
1197asmlinkage void fpemu_signal(int signal, int code, void *addr)
1198{
1199 siginfo_t info;
1200
1201 info.si_signo = signal;
1202 info.si_errno = 0;
1203 info.si_code = code;
1204 info.si_addr = addr;
1205 force_sig_info(signal, &info, current);
1206}
1207#endif 5#endif
diff --git a/arch/m68k/kernel/traps_mm.c b/arch/m68k/kernel/traps_mm.c
new file mode 100644
index 000000000000..4022bbc28878
--- /dev/null
+++ b/arch/m68k/kernel/traps_mm.c
@@ -0,0 +1,1207 @@
1/*
2 * linux/arch/m68k/kernel/traps.c
3 *
4 * Copyright (C) 1993, 1994 by Hamish Macdonald
5 *
6 * 68040 fixes by Michael Rausch
7 * 68040 fixes by Martin Apel
8 * 68040 fixes and writeback by Richard Zidlicky
9 * 68060 fixes by Roman Hodek
10 * 68060 fixes by Jesper Skov
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file COPYING in the main directory of this archive
14 * for more details.
15 */
16
17/*
18 * Sets up all exception vectors
19 */
20
21#include <linux/sched.h>
22#include <linux/signal.h>
23#include <linux/kernel.h>
24#include <linux/mm.h>
25#include <linux/module.h>
26#include <linux/user.h>
27#include <linux/string.h>
28#include <linux/linkage.h>
29#include <linux/init.h>
30#include <linux/ptrace.h>
31#include <linux/kallsyms.h>
32
33#include <asm/setup.h>
34#include <asm/fpu.h>
35#include <asm/system.h>
36#include <asm/uaccess.h>
37#include <asm/traps.h>
38#include <asm/pgalloc.h>
39#include <asm/machdep.h>
40#include <asm/siginfo.h>
41
42/* assembler routines */
43asmlinkage void system_call(void);
44asmlinkage void buserr(void);
45asmlinkage void trap(void);
46asmlinkage void nmihandler(void);
47#ifdef CONFIG_M68KFPU_EMU
48asmlinkage void fpu_emu(void);
49#endif
50
51e_vector vectors[256];
52
53/* nmi handler for the Amiga */
54asm(".text\n"
55 __ALIGN_STR "\n"
56 "nmihandler: rte");
57
58/*
59 * this must be called very early as the kernel might
60 * use some instruction that are emulated on the 060
61 * and so we're prepared for early probe attempts (e.g. nf_init).
62 */
63void __init base_trap_init(void)
64{
65 if (MACH_IS_SUN3X) {
66 extern e_vector *sun3x_prom_vbr;
67
68 __asm__ volatile ("movec %%vbr, %0" : "=r" (sun3x_prom_vbr));
69 }
70
71 /* setup the exception vector table */
72 __asm__ volatile ("movec %0,%%vbr" : : "r" ((void*)vectors));
73
74 if (CPU_IS_060) {
75 /* set up ISP entry points */
76 asmlinkage void unimp_vec(void) asm ("_060_isp_unimp");
77
78 vectors[VEC_UNIMPII] = unimp_vec;
79 }
80
81 vectors[VEC_BUSERR] = buserr;
82 vectors[VEC_ILLEGAL] = trap;
83 vectors[VEC_SYS] = system_call;
84}
85
86void __init trap_init (void)
87{
88 int i;
89
90 for (i = VEC_SPUR; i <= VEC_INT7; i++)
91 vectors[i] = bad_inthandler;
92
93 for (i = 0; i < VEC_USER; i++)
94 if (!vectors[i])
95 vectors[i] = trap;
96
97 for (i = VEC_USER; i < 256; i++)
98 vectors[i] = bad_inthandler;
99
100#ifdef CONFIG_M68KFPU_EMU
101 if (FPU_IS_EMU)
102 vectors[VEC_LINE11] = fpu_emu;
103#endif
104
105 if (CPU_IS_040 && !FPU_IS_EMU) {
106 /* set up FPSP entry points */
107 asmlinkage void dz_vec(void) asm ("dz");
108 asmlinkage void inex_vec(void) asm ("inex");
109 asmlinkage void ovfl_vec(void) asm ("ovfl");
110 asmlinkage void unfl_vec(void) asm ("unfl");
111 asmlinkage void snan_vec(void) asm ("snan");
112 asmlinkage void operr_vec(void) asm ("operr");
113 asmlinkage void bsun_vec(void) asm ("bsun");
114 asmlinkage void fline_vec(void) asm ("fline");
115 asmlinkage void unsupp_vec(void) asm ("unsupp");
116
117 vectors[VEC_FPDIVZ] = dz_vec;
118 vectors[VEC_FPIR] = inex_vec;
119 vectors[VEC_FPOVER] = ovfl_vec;
120 vectors[VEC_FPUNDER] = unfl_vec;
121 vectors[VEC_FPNAN] = snan_vec;
122 vectors[VEC_FPOE] = operr_vec;
123 vectors[VEC_FPBRUC] = bsun_vec;
124 vectors[VEC_LINE11] = fline_vec;
125 vectors[VEC_FPUNSUP] = unsupp_vec;
126 }
127
128 if (CPU_IS_060 && !FPU_IS_EMU) {
129 /* set up IFPSP entry points */
130 asmlinkage void snan_vec6(void) asm ("_060_fpsp_snan");
131 asmlinkage void operr_vec6(void) asm ("_060_fpsp_operr");
132 asmlinkage void ovfl_vec6(void) asm ("_060_fpsp_ovfl");
133 asmlinkage void unfl_vec6(void) asm ("_060_fpsp_unfl");
134 asmlinkage void dz_vec6(void) asm ("_060_fpsp_dz");
135 asmlinkage void inex_vec6(void) asm ("_060_fpsp_inex");
136 asmlinkage void fline_vec6(void) asm ("_060_fpsp_fline");
137 asmlinkage void unsupp_vec6(void) asm ("_060_fpsp_unsupp");
138 asmlinkage void effadd_vec6(void) asm ("_060_fpsp_effadd");
139
140 vectors[VEC_FPNAN] = snan_vec6;
141 vectors[VEC_FPOE] = operr_vec6;
142 vectors[VEC_FPOVER] = ovfl_vec6;
143 vectors[VEC_FPUNDER] = unfl_vec6;
144 vectors[VEC_FPDIVZ] = dz_vec6;
145 vectors[VEC_FPIR] = inex_vec6;
146 vectors[VEC_LINE11] = fline_vec6;
147 vectors[VEC_FPUNSUP] = unsupp_vec6;
148 vectors[VEC_UNIMPEA] = effadd_vec6;
149 }
150
151 /* if running on an amiga, make the NMI interrupt do nothing */
152 if (MACH_IS_AMIGA) {
153 vectors[VEC_INT7] = nmihandler;
154 }
155}
156
157
158static const char *vec_names[] = {
159 [VEC_RESETSP] = "RESET SP",
160 [VEC_RESETPC] = "RESET PC",
161 [VEC_BUSERR] = "BUS ERROR",
162 [VEC_ADDRERR] = "ADDRESS ERROR",
163 [VEC_ILLEGAL] = "ILLEGAL INSTRUCTION",
164 [VEC_ZERODIV] = "ZERO DIVIDE",
165 [VEC_CHK] = "CHK",
166 [VEC_TRAP] = "TRAPcc",
167 [VEC_PRIV] = "PRIVILEGE VIOLATION",
168 [VEC_TRACE] = "TRACE",
169 [VEC_LINE10] = "LINE 1010",
170 [VEC_LINE11] = "LINE 1111",
171 [VEC_RESV12] = "UNASSIGNED RESERVED 12",
172 [VEC_COPROC] = "COPROCESSOR PROTOCOL VIOLATION",
173 [VEC_FORMAT] = "FORMAT ERROR",
174 [VEC_UNINT] = "UNINITIALIZED INTERRUPT",
175 [VEC_RESV16] = "UNASSIGNED RESERVED 16",
176 [VEC_RESV17] = "UNASSIGNED RESERVED 17",
177 [VEC_RESV18] = "UNASSIGNED RESERVED 18",
178 [VEC_RESV19] = "UNASSIGNED RESERVED 19",
179 [VEC_RESV20] = "UNASSIGNED RESERVED 20",
180 [VEC_RESV21] = "UNASSIGNED RESERVED 21",
181 [VEC_RESV22] = "UNASSIGNED RESERVED 22",
182 [VEC_RESV23] = "UNASSIGNED RESERVED 23",
183 [VEC_SPUR] = "SPURIOUS INTERRUPT",
184 [VEC_INT1] = "LEVEL 1 INT",
185 [VEC_INT2] = "LEVEL 2 INT",
186 [VEC_INT3] = "LEVEL 3 INT",
187 [VEC_INT4] = "LEVEL 4 INT",
188 [VEC_INT5] = "LEVEL 5 INT",
189 [VEC_INT6] = "LEVEL 6 INT",
190 [VEC_INT7] = "LEVEL 7 INT",
191 [VEC_SYS] = "SYSCALL",
192 [VEC_TRAP1] = "TRAP #1",
193 [VEC_TRAP2] = "TRAP #2",
194 [VEC_TRAP3] = "TRAP #3",
195 [VEC_TRAP4] = "TRAP #4",
196 [VEC_TRAP5] = "TRAP #5",
197 [VEC_TRAP6] = "TRAP #6",
198 [VEC_TRAP7] = "TRAP #7",
199 [VEC_TRAP8] = "TRAP #8",
200 [VEC_TRAP9] = "TRAP #9",
201 [VEC_TRAP10] = "TRAP #10",
202 [VEC_TRAP11] = "TRAP #11",
203 [VEC_TRAP12] = "TRAP #12",
204 [VEC_TRAP13] = "TRAP #13",
205 [VEC_TRAP14] = "TRAP #14",
206 [VEC_TRAP15] = "TRAP #15",
207 [VEC_FPBRUC] = "FPCP BSUN",
208 [VEC_FPIR] = "FPCP INEXACT",
209 [VEC_FPDIVZ] = "FPCP DIV BY 0",
210 [VEC_FPUNDER] = "FPCP UNDERFLOW",
211 [VEC_FPOE] = "FPCP OPERAND ERROR",
212 [VEC_FPOVER] = "FPCP OVERFLOW",
213 [VEC_FPNAN] = "FPCP SNAN",
214 [VEC_FPUNSUP] = "FPCP UNSUPPORTED OPERATION",
215 [VEC_MMUCFG] = "MMU CONFIGURATION ERROR",
216 [VEC_MMUILL] = "MMU ILLEGAL OPERATION ERROR",
217 [VEC_MMUACC] = "MMU ACCESS LEVEL VIOLATION ERROR",
218 [VEC_RESV59] = "UNASSIGNED RESERVED 59",
219 [VEC_UNIMPEA] = "UNASSIGNED RESERVED 60",
220 [VEC_UNIMPII] = "UNASSIGNED RESERVED 61",
221 [VEC_RESV62] = "UNASSIGNED RESERVED 62",
222 [VEC_RESV63] = "UNASSIGNED RESERVED 63",
223};
224
225static const char *space_names[] = {
226 [0] = "Space 0",
227 [USER_DATA] = "User Data",
228 [USER_PROGRAM] = "User Program",
229#ifndef CONFIG_SUN3
230 [3] = "Space 3",
231#else
232 [FC_CONTROL] = "Control",
233#endif
234 [4] = "Space 4",
235 [SUPER_DATA] = "Super Data",
236 [SUPER_PROGRAM] = "Super Program",
237 [CPU_SPACE] = "CPU"
238};
239
240void die_if_kernel(char *,struct pt_regs *,int);
241asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
242 unsigned long error_code);
243int send_fault_sig(struct pt_regs *regs);
244
245asmlinkage void trap_c(struct frame *fp);
246
247#if defined (CONFIG_M68060)
248static inline void access_error060 (struct frame *fp)
249{
250 unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */
251
252#ifdef DEBUG
253 printk("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr);
254#endif
255
256 if (fslw & MMU060_BPE) {
257 /* branch prediction error -> clear branch cache */
258 __asm__ __volatile__ ("movec %/cacr,%/d0\n\t"
259 "orl #0x00400000,%/d0\n\t"
260 "movec %/d0,%/cacr"
261 : : : "d0" );
262 /* return if there's no other error */
263 if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE))
264 return;
265 }
266
267 if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) {
268 unsigned long errorcode;
269 unsigned long addr = fp->un.fmt4.effaddr;
270
271 if (fslw & MMU060_MA)
272 addr = (addr + PAGE_SIZE - 1) & PAGE_MASK;
273
274 errorcode = 1;
275 if (fslw & MMU060_DESC_ERR) {
276 __flush_tlb040_one(addr);
277 errorcode = 0;
278 }
279 if (fslw & MMU060_W)
280 errorcode |= 2;
281#ifdef DEBUG
282 printk("errorcode = %d\n", errorcode );
283#endif
284 do_page_fault(&fp->ptregs, addr, errorcode);
285 } else if (fslw & (MMU060_SEE)){
286 /* Software Emulation Error.
287 * fault during mem_read/mem_write in ifpsp060/os.S
288 */
289 send_fault_sig(&fp->ptregs);
290 } else if (!(fslw & (MMU060_RE|MMU060_WE)) ||
291 send_fault_sig(&fp->ptregs) > 0) {
292 printk("pc=%#lx, fa=%#lx\n", fp->ptregs.pc, fp->un.fmt4.effaddr);
293 printk( "68060 access error, fslw=%lx\n", fslw );
294 trap_c( fp );
295 }
296}
297#endif /* CONFIG_M68060 */
298
299#if defined (CONFIG_M68040)
300static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs)
301{
302 unsigned long mmusr;
303 mm_segment_t old_fs = get_fs();
304
305 set_fs(MAKE_MM_SEG(wbs));
306
307 if (iswrite)
308 asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr));
309 else
310 asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr));
311
312 asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr));
313
314 set_fs(old_fs);
315
316 return mmusr;
317}
318
319static inline int do_040writeback1(unsigned short wbs, unsigned long wba,
320 unsigned long wbd)
321{
322 int res = 0;
323 mm_segment_t old_fs = get_fs();
324
325 /* set_fs can not be moved, otherwise put_user() may oops */
326 set_fs(MAKE_MM_SEG(wbs));
327
328 switch (wbs & WBSIZ_040) {
329 case BA_SIZE_BYTE:
330 res = put_user(wbd & 0xff, (char __user *)wba);
331 break;
332 case BA_SIZE_WORD:
333 res = put_user(wbd & 0xffff, (short __user *)wba);
334 break;
335 case BA_SIZE_LONG:
336 res = put_user(wbd, (int __user *)wba);
337 break;
338 }
339
340 /* set_fs can not be moved, otherwise put_user() may oops */
341 set_fs(old_fs);
342
343
344#ifdef DEBUG
345 printk("do_040writeback1, res=%d\n",res);
346#endif
347
348 return res;
349}
350
351/* after an exception in a writeback the stack frame corresponding
352 * to that exception is discarded, set a few bits in the old frame
353 * to simulate what it should look like
354 */
355static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs)
356{
357 fp->un.fmt7.faddr = wba;
358 fp->un.fmt7.ssw = wbs & 0xff;
359 if (wba != current->thread.faddr)
360 fp->un.fmt7.ssw |= MA_040;
361}
362
363static inline void do_040writebacks(struct frame *fp)
364{
365 int res = 0;
366#if 0
367 if (fp->un.fmt7.wb1s & WBV_040)
368 printk("access_error040: cannot handle 1st writeback. oops.\n");
369#endif
370
371 if ((fp->un.fmt7.wb2s & WBV_040) &&
372 !(fp->un.fmt7.wb2s & WBTT_040)) {
373 res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a,
374 fp->un.fmt7.wb2d);
375 if (res)
376 fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s);
377 else
378 fp->un.fmt7.wb2s = 0;
379 }
380
381 /* do the 2nd wb only if the first one was successful (except for a kernel wb) */
382 if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) {
383 res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a,
384 fp->un.fmt7.wb3d);
385 if (res)
386 {
387 fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s);
388
389 fp->un.fmt7.wb2s = fp->un.fmt7.wb3s;
390 fp->un.fmt7.wb3s &= (~WBV_040);
391 fp->un.fmt7.wb2a = fp->un.fmt7.wb3a;
392 fp->un.fmt7.wb2d = fp->un.fmt7.wb3d;
393 }
394 else
395 fp->un.fmt7.wb3s = 0;
396 }
397
398 if (res)
399 send_fault_sig(&fp->ptregs);
400}
401
402/*
403 * called from sigreturn(), must ensure userspace code didn't
404 * manipulate exception frame to circumvent protection, then complete
405 * pending writebacks
406 * we just clear TM2 to turn it into a userspace access
407 */
408asmlinkage void berr_040cleanup(struct frame *fp)
409{
410 fp->un.fmt7.wb2s &= ~4;
411 fp->un.fmt7.wb3s &= ~4;
412
413 do_040writebacks(fp);
414}
415
416static inline void access_error040(struct frame *fp)
417{
418 unsigned short ssw = fp->un.fmt7.ssw;
419 unsigned long mmusr;
420
421#ifdef DEBUG
422 printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr);
423 printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s,
424 fp->un.fmt7.wb2s, fp->un.fmt7.wb3s);
425 printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n",
426 fp->un.fmt7.wb2a, fp->un.fmt7.wb3a,
427 fp->un.fmt7.wb2d, fp->un.fmt7.wb3d);
428#endif
429
430 if (ssw & ATC_040) {
431 unsigned long addr = fp->un.fmt7.faddr;
432 unsigned long errorcode;
433
434 /*
435 * The MMU status has to be determined AFTER the address
436 * has been corrected if there was a misaligned access (MA).
437 */
438 if (ssw & MA_040)
439 addr = (addr + 7) & -8;
440
441 /* MMU error, get the MMUSR info for this access */
442 mmusr = probe040(!(ssw & RW_040), addr, ssw);
443#ifdef DEBUG
444 printk("mmusr = %lx\n", mmusr);
445#endif
446 errorcode = 1;
447 if (!(mmusr & MMU_R_040)) {
448 /* clear the invalid atc entry */
449 __flush_tlb040_one(addr);
450 errorcode = 0;
451 }
452
453 /* despite what documentation seems to say, RMW
454 * accesses have always both the LK and RW bits set */
455 if (!(ssw & RW_040) || (ssw & LK_040))
456 errorcode |= 2;
457
458 if (do_page_fault(&fp->ptregs, addr, errorcode)) {
459#ifdef DEBUG
460 printk("do_page_fault() !=0\n");
461#endif
462 if (user_mode(&fp->ptregs)){
463 /* delay writebacks after signal delivery */
464#ifdef DEBUG
465 printk(".. was usermode - return\n");
466#endif
467 return;
468 }
469 /* disable writeback into user space from kernel
470 * (if do_page_fault didn't fix the mapping,
471 * the writeback won't do good)
472 */
473disable_wb:
474#ifdef DEBUG
475 printk(".. disabling wb2\n");
476#endif
477 if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr)
478 fp->un.fmt7.wb2s &= ~WBV_040;
479 if (fp->un.fmt7.wb3a == fp->un.fmt7.faddr)
480 fp->un.fmt7.wb3s &= ~WBV_040;
481 }
482 } else {
483 /* In case of a bus error we either kill the process or expect
484 * the kernel to catch the fault, which then is also responsible
485 * for cleaning up the mess.
486 */
487 current->thread.signo = SIGBUS;
488 current->thread.faddr = fp->un.fmt7.faddr;
489 if (send_fault_sig(&fp->ptregs) >= 0)
490 printk("68040 bus error (ssw=%x, faddr=%lx)\n", ssw,
491 fp->un.fmt7.faddr);
492 goto disable_wb;
493 }
494
495 do_040writebacks(fp);
496}
497#endif /* CONFIG_M68040 */
498
499#if defined(CONFIG_SUN3)
500#include <asm/sun3mmu.h>
501
502extern int mmu_emu_handle_fault (unsigned long, int, int);
503
504/* sun3 version of bus_error030 */
505
506static inline void bus_error030 (struct frame *fp)
507{
508 unsigned char buserr_type = sun3_get_buserr ();
509 unsigned long addr, errorcode;
510 unsigned short ssw = fp->un.fmtb.ssw;
511 extern unsigned long _sun3_map_test_start, _sun3_map_test_end;
512
513#ifdef DEBUG
514 if (ssw & (FC | FB))
515 printk ("Instruction fault at %#010lx\n",
516 ssw & FC ?
517 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
518 :
519 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
520 if (ssw & DF)
521 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
522 ssw & RW ? "read" : "write",
523 fp->un.fmtb.daddr,
524 space_names[ssw & DFC], fp->ptregs.pc);
525#endif
526
527 /*
528 * Check if this page should be demand-mapped. This needs to go before
529 * the testing for a bad kernel-space access (demand-mapping applies
530 * to kernel accesses too).
531 */
532
533 if ((ssw & DF)
534 && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) {
535 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0))
536 return;
537 }
538
539 /* Check for kernel-space pagefault (BAD). */
540 if (fp->ptregs.sr & PS_S) {
541 /* kernel fault must be a data fault to user space */
542 if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
543 // try checking the kernel mappings before surrender
544 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1))
545 return;
546 /* instruction fault or kernel data fault! */
547 if (ssw & (FC | FB))
548 printk ("Instruction fault at %#010lx\n",
549 fp->ptregs.pc);
550 if (ssw & DF) {
551 /* was this fault incurred testing bus mappings? */
552 if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) &&
553 (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) {
554 send_fault_sig(&fp->ptregs);
555 return;
556 }
557
558 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
559 ssw & RW ? "read" : "write",
560 fp->un.fmtb.daddr,
561 space_names[ssw & DFC], fp->ptregs.pc);
562 }
563 printk ("BAD KERNEL BUSERR\n");
564
565 die_if_kernel("Oops", &fp->ptregs,0);
566 force_sig(SIGKILL, current);
567 return;
568 }
569 } else {
570 /* user fault */
571 if (!(ssw & (FC | FB)) && !(ssw & DF))
572 /* not an instruction fault or data fault! BAD */
573 panic ("USER BUSERR w/o instruction or data fault");
574 }
575
576
577 /* First handle the data fault, if any. */
578 if (ssw & DF) {
579 addr = fp->un.fmtb.daddr;
580
581// errorcode bit 0: 0 -> no page 1 -> protection fault
582// errorcode bit 1: 0 -> read fault 1 -> write fault
583
584// (buserr_type & SUN3_BUSERR_PROTERR) -> protection fault
585// (buserr_type & SUN3_BUSERR_INVALID) -> invalid page fault
586
587 if (buserr_type & SUN3_BUSERR_PROTERR)
588 errorcode = 0x01;
589 else if (buserr_type & SUN3_BUSERR_INVALID)
590 errorcode = 0x00;
591 else {
592#ifdef DEBUG
593 printk ("*** unexpected busfault type=%#04x\n", buserr_type);
594 printk ("invalid %s access at %#lx from pc %#lx\n",
595 !(ssw & RW) ? "write" : "read", addr,
596 fp->ptregs.pc);
597#endif
598 die_if_kernel ("Oops", &fp->ptregs, buserr_type);
599 force_sig (SIGBUS, current);
600 return;
601 }
602
603//todo: wtf is RM bit? --m
604 if (!(ssw & RW) || ssw & RM)
605 errorcode |= 0x02;
606
607 /* Handle page fault. */
608 do_page_fault (&fp->ptregs, addr, errorcode);
609
610 /* Retry the data fault now. */
611 return;
612 }
613
614 /* Now handle the instruction fault. */
615
616 /* Get the fault address. */
617 if (fp->ptregs.format == 0xA)
618 addr = fp->ptregs.pc + 4;
619 else
620 addr = fp->un.fmtb.baddr;
621 if (ssw & FC)
622 addr -= 2;
623
624 if (buserr_type & SUN3_BUSERR_INVALID) {
625 if (!mmu_emu_handle_fault (fp->un.fmtb.daddr, 1, 0))
626 do_page_fault (&fp->ptregs, addr, 0);
627 } else {
628#ifdef DEBUG
629 printk ("protection fault on insn access (segv).\n");
630#endif
631 force_sig (SIGSEGV, current);
632 }
633}
634#else
635#if defined(CPU_M68020_OR_M68030)
636static inline void bus_error030 (struct frame *fp)
637{
638 volatile unsigned short temp;
639 unsigned short mmusr;
640 unsigned long addr, errorcode;
641 unsigned short ssw = fp->un.fmtb.ssw;
642#ifdef DEBUG
643 unsigned long desc;
644
645 printk ("pid = %x ", current->pid);
646 printk ("SSW=%#06x ", ssw);
647
648 if (ssw & (FC | FB))
649 printk ("Instruction fault at %#010lx\n",
650 ssw & FC ?
651 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
652 :
653 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
654 if (ssw & DF)
655 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
656 ssw & RW ? "read" : "write",
657 fp->un.fmtb.daddr,
658 space_names[ssw & DFC], fp->ptregs.pc);
659#endif
660
661 /* ++andreas: If a data fault and an instruction fault happen
662 at the same time map in both pages. */
663
664 /* First handle the data fault, if any. */
665 if (ssw & DF) {
666 addr = fp->un.fmtb.daddr;
667
668#ifdef DEBUG
669 asm volatile ("ptestr %3,%2@,#7,%0\n\t"
670 "pmove %%psr,%1@"
671 : "=a&" (desc)
672 : "a" (&temp), "a" (addr), "d" (ssw));
673#else
674 asm volatile ("ptestr %2,%1@,#7\n\t"
675 "pmove %%psr,%0@"
676 : : "a" (&temp), "a" (addr), "d" (ssw));
677#endif
678 mmusr = temp;
679
680#ifdef DEBUG
681 printk("mmusr is %#x for addr %#lx in task %p\n",
682 mmusr, addr, current);
683 printk("descriptor address is %#lx, contents %#lx\n",
684 __va(desc), *(unsigned long *)__va(desc));
685#endif
686
687 errorcode = (mmusr & MMU_I) ? 0 : 1;
688 if (!(ssw & RW) || (ssw & RM))
689 errorcode |= 2;
690
691 if (mmusr & (MMU_I | MMU_WP)) {
692 if (ssw & 4) {
693 printk("Data %s fault at %#010lx in %s (pc=%#lx)\n",
694 ssw & RW ? "read" : "write",
695 fp->un.fmtb.daddr,
696 space_names[ssw & DFC], fp->ptregs.pc);
697 goto buserr;
698 }
699 /* Don't try to do anything further if an exception was
700 handled. */
701 if (do_page_fault (&fp->ptregs, addr, errorcode) < 0)
702 return;
703 } else if (!(mmusr & MMU_I)) {
704 /* probably a 020 cas fault */
705 if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0)
706 printk("unexpected bus error (%#x,%#x)\n", ssw, mmusr);
707 } else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
708 printk("invalid %s access at %#lx from pc %#lx\n",
709 !(ssw & RW) ? "write" : "read", addr,
710 fp->ptregs.pc);
711 die_if_kernel("Oops",&fp->ptregs,mmusr);
712 force_sig(SIGSEGV, current);
713 return;
714 } else {
715#if 0
716 static volatile long tlong;
717#endif
718
719 printk("weird %s access at %#lx from pc %#lx (ssw is %#x)\n",
720 !(ssw & RW) ? "write" : "read", addr,
721 fp->ptregs.pc, ssw);
722 asm volatile ("ptestr #1,%1@,#0\n\t"
723 "pmove %%psr,%0@"
724 : /* no outputs */
725 : "a" (&temp), "a" (addr));
726 mmusr = temp;
727
728 printk ("level 0 mmusr is %#x\n", mmusr);
729#if 0
730 asm volatile ("pmove %%tt0,%0@"
731 : /* no outputs */
732 : "a" (&tlong));
733 printk("tt0 is %#lx, ", tlong);
734 asm volatile ("pmove %%tt1,%0@"
735 : /* no outputs */
736 : "a" (&tlong));
737 printk("tt1 is %#lx\n", tlong);
738#endif
739#ifdef DEBUG
740 printk("Unknown SIGSEGV - 1\n");
741#endif
742 die_if_kernel("Oops",&fp->ptregs,mmusr);
743 force_sig(SIGSEGV, current);
744 return;
745 }
746
747 /* setup an ATC entry for the access about to be retried */
748 if (!(ssw & RW) || (ssw & RM))
749 asm volatile ("ploadw %1,%0@" : /* no outputs */
750 : "a" (addr), "d" (ssw));
751 else
752 asm volatile ("ploadr %1,%0@" : /* no outputs */
753 : "a" (addr), "d" (ssw));
754 }
755
756 /* Now handle the instruction fault. */
757
758 if (!(ssw & (FC|FB)))
759 return;
760
761 if (fp->ptregs.sr & PS_S) {
762 printk("Instruction fault at %#010lx\n",
763 fp->ptregs.pc);
764 buserr:
765 printk ("BAD KERNEL BUSERR\n");
766 die_if_kernel("Oops",&fp->ptregs,0);
767 force_sig(SIGKILL, current);
768 return;
769 }
770
771 /* get the fault address */
772 if (fp->ptregs.format == 10)
773 addr = fp->ptregs.pc + 4;
774 else
775 addr = fp->un.fmtb.baddr;
776 if (ssw & FC)
777 addr -= 2;
778
779 if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
780 /* Insn fault on same page as data fault. But we
781 should still create the ATC entry. */
782 goto create_atc_entry;
783
784#ifdef DEBUG
785 asm volatile ("ptestr #1,%2@,#7,%0\n\t"
786 "pmove %%psr,%1@"
787 : "=a&" (desc)
788 : "a" (&temp), "a" (addr));
789#else
790 asm volatile ("ptestr #1,%1@,#7\n\t"
791 "pmove %%psr,%0@"
792 : : "a" (&temp), "a" (addr));
793#endif
794 mmusr = temp;
795
796#ifdef DEBUG
797 printk ("mmusr is %#x for addr %#lx in task %p\n",
798 mmusr, addr, current);
799 printk ("descriptor address is %#lx, contents %#lx\n",
800 __va(desc), *(unsigned long *)__va(desc));
801#endif
802
803 if (mmusr & MMU_I)
804 do_page_fault (&fp->ptregs, addr, 0);
805 else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
806 printk ("invalid insn access at %#lx from pc %#lx\n",
807 addr, fp->ptregs.pc);
808#ifdef DEBUG
809 printk("Unknown SIGSEGV - 2\n");
810#endif
811 die_if_kernel("Oops",&fp->ptregs,mmusr);
812 force_sig(SIGSEGV, current);
813 return;
814 }
815
816create_atc_entry:
817 /* setup an ATC entry for the access about to be retried */
818 asm volatile ("ploadr #2,%0@" : /* no outputs */
819 : "a" (addr));
820}
821#endif /* CPU_M68020_OR_M68030 */
822#endif /* !CONFIG_SUN3 */
823
824asmlinkage void buserr_c(struct frame *fp)
825{
826 /* Only set esp0 if coming from user mode */
827 if (user_mode(&fp->ptregs))
828 current->thread.esp0 = (unsigned long) fp;
829
830#ifdef DEBUG
831 printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format);
832#endif
833
834 switch (fp->ptregs.format) {
835#if defined (CONFIG_M68060)
836 case 4: /* 68060 access error */
837 access_error060 (fp);
838 break;
839#endif
840#if defined (CONFIG_M68040)
841 case 0x7: /* 68040 access error */
842 access_error040 (fp);
843 break;
844#endif
845#if defined (CPU_M68020_OR_M68030)
846 case 0xa:
847 case 0xb:
848 bus_error030 (fp);
849 break;
850#endif
851 default:
852 die_if_kernel("bad frame format",&fp->ptregs,0);
853#ifdef DEBUG
854 printk("Unknown SIGSEGV - 4\n");
855#endif
856 force_sig(SIGSEGV, current);
857 }
858}
859
860
861static int kstack_depth_to_print = 48;
862
863void show_trace(unsigned long *stack)
864{
865 unsigned long *endstack;
866 unsigned long addr;
867 int i;
868
869 printk("Call Trace:");
870 addr = (unsigned long)stack + THREAD_SIZE - 1;
871 endstack = (unsigned long *)(addr & -THREAD_SIZE);
872 i = 0;
873 while (stack + 1 <= endstack) {
874 addr = *stack++;
875 /*
876 * If the address is either in the text segment of the
877 * kernel, or in the region which contains vmalloc'ed
878 * memory, it *may* be the address of a calling
879 * routine; if so, print it so that someone tracing
880 * down the cause of the crash will be able to figure
881 * out the call path that was taken.
882 */
883 if (__kernel_text_address(addr)) {
884#ifndef CONFIG_KALLSYMS
885 if (i % 5 == 0)
886 printk("\n ");
887#endif
888 printk(" [<%08lx>] %pS\n", addr, (void *)addr);
889 i++;
890 }
891 }
892 printk("\n");
893}
894
895void show_registers(struct pt_regs *regs)
896{
897 struct frame *fp = (struct frame *)regs;
898 mm_segment_t old_fs = get_fs();
899 u16 c, *cp;
900 unsigned long addr;
901 int i;
902
903 print_modules();
904 printk("PC: [<%08lx>] %pS\n", regs->pc, (void *)regs->pc);
905 printk("SR: %04x SP: %p a2: %08lx\n", regs->sr, regs, regs->a2);
906 printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
907 regs->d0, regs->d1, regs->d2, regs->d3);
908 printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
909 regs->d4, regs->d5, regs->a0, regs->a1);
910
911 printk("Process %s (pid: %d, task=%p)\n",
912 current->comm, task_pid_nr(current), current);
913 addr = (unsigned long)&fp->un;
914 printk("Frame format=%X ", regs->format);
915 switch (regs->format) {
916 case 0x2:
917 printk("instr addr=%08lx\n", fp->un.fmt2.iaddr);
918 addr += sizeof(fp->un.fmt2);
919 break;
920 case 0x3:
921 printk("eff addr=%08lx\n", fp->un.fmt3.effaddr);
922 addr += sizeof(fp->un.fmt3);
923 break;
924 case 0x4:
925 printk((CPU_IS_060 ? "fault addr=%08lx fslw=%08lx\n"
926 : "eff addr=%08lx pc=%08lx\n"),
927 fp->un.fmt4.effaddr, fp->un.fmt4.pc);
928 addr += sizeof(fp->un.fmt4);
929 break;
930 case 0x7:
931 printk("eff addr=%08lx ssw=%04x faddr=%08lx\n",
932 fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr);
933 printk("wb 1 stat/addr/data: %04x %08lx %08lx\n",
934 fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0);
935 printk("wb 2 stat/addr/data: %04x %08lx %08lx\n",
936 fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d);
937 printk("wb 3 stat/addr/data: %04x %08lx %08lx\n",
938 fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d);
939 printk("push data: %08lx %08lx %08lx %08lx\n",
940 fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2,
941 fp->un.fmt7.pd3);
942 addr += sizeof(fp->un.fmt7);
943 break;
944 case 0x9:
945 printk("instr addr=%08lx\n", fp->un.fmt9.iaddr);
946 addr += sizeof(fp->un.fmt9);
947 break;
948 case 0xa:
949 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
950 fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb,
951 fp->un.fmta.daddr, fp->un.fmta.dobuf);
952 addr += sizeof(fp->un.fmta);
953 break;
954 case 0xb:
955 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
956 fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb,
957 fp->un.fmtb.daddr, fp->un.fmtb.dobuf);
958 printk("baddr=%08lx dibuf=%08lx ver=%x\n",
959 fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver);
960 addr += sizeof(fp->un.fmtb);
961 break;
962 default:
963 printk("\n");
964 }
965 show_stack(NULL, (unsigned long *)addr);
966
967 printk("Code:");
968 set_fs(KERNEL_DS);
969 cp = (u16 *)regs->pc;
970 for (i = -8; i < 16; i++) {
971 if (get_user(c, cp + i) && i >= 0) {
972 printk(" Bad PC value.");
973 break;
974 }
975 printk(i ? " %04x" : " <%04x>", c);
976 }
977 set_fs(old_fs);
978 printk ("\n");
979}
980
981void show_stack(struct task_struct *task, unsigned long *stack)
982{
983 unsigned long *p;
984 unsigned long *endstack;
985 int i;
986
987 if (!stack) {
988 if (task)
989 stack = (unsigned long *)task->thread.esp0;
990 else
991 stack = (unsigned long *)&stack;
992 }
993 endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE);
994
995 printk("Stack from %08lx:", (unsigned long)stack);
996 p = stack;
997 for (i = 0; i < kstack_depth_to_print; i++) {
998 if (p + 1 > endstack)
999 break;
1000 if (i % 8 == 0)
1001 printk("\n ");
1002 printk(" %08lx", *p++);
1003 }
1004 printk("\n");
1005 show_trace(stack);
1006}
1007
1008/*
1009 * The architecture-independent backtrace generator
1010 */
1011void dump_stack(void)
1012{
1013 unsigned long stack;
1014
1015 show_trace(&stack);
1016}
1017
1018EXPORT_SYMBOL(dump_stack);
1019
1020void bad_super_trap (struct frame *fp)
1021{
1022 console_verbose();
1023 if (fp->ptregs.vector < 4 * ARRAY_SIZE(vec_names))
1024 printk ("*** %s *** FORMAT=%X\n",
1025 vec_names[(fp->ptregs.vector) >> 2],
1026 fp->ptregs.format);
1027 else
1028 printk ("*** Exception %d *** FORMAT=%X\n",
1029 (fp->ptregs.vector) >> 2,
1030 fp->ptregs.format);
1031 if (fp->ptregs.vector >> 2 == VEC_ADDRERR && CPU_IS_020_OR_030) {
1032 unsigned short ssw = fp->un.fmtb.ssw;
1033
1034 printk ("SSW=%#06x ", ssw);
1035
1036 if (ssw & RC)
1037 printk ("Pipe stage C instruction fault at %#010lx\n",
1038 (fp->ptregs.format) == 0xA ?
1039 fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2);
1040 if (ssw & RB)
1041 printk ("Pipe stage B instruction fault at %#010lx\n",
1042 (fp->ptregs.format) == 0xA ?
1043 fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
1044 if (ssw & DF)
1045 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
1046 ssw & RW ? "read" : "write",
1047 fp->un.fmtb.daddr, space_names[ssw & DFC],
1048 fp->ptregs.pc);
1049 }
1050 printk ("Current process id is %d\n", task_pid_nr(current));
1051 die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
1052}
1053
1054asmlinkage void trap_c(struct frame *fp)
1055{
1056 int sig;
1057 siginfo_t info;
1058
1059 if (fp->ptregs.sr & PS_S) {
1060 if (fp->ptregs.vector == VEC_TRACE << 2) {
1061 /* traced a trapping instruction on a 68020/30,
1062 * real exception will be executed afterwards.
1063 */
1064 } else if (!handle_kernel_fault(&fp->ptregs))
1065 bad_super_trap(fp);
1066 return;
1067 }
1068
1069 /* send the appropriate signal to the user program */
1070 switch ((fp->ptregs.vector) >> 2) {
1071 case VEC_ADDRERR:
1072 info.si_code = BUS_ADRALN;
1073 sig = SIGBUS;
1074 break;
1075 case VEC_ILLEGAL:
1076 case VEC_LINE10:
1077 case VEC_LINE11:
1078 info.si_code = ILL_ILLOPC;
1079 sig = SIGILL;
1080 break;
1081 case VEC_PRIV:
1082 info.si_code = ILL_PRVOPC;
1083 sig = SIGILL;
1084 break;
1085 case VEC_COPROC:
1086 info.si_code = ILL_COPROC;
1087 sig = SIGILL;
1088 break;
1089 case VEC_TRAP1:
1090 case VEC_TRAP2:
1091 case VEC_TRAP3:
1092 case VEC_TRAP4:
1093 case VEC_TRAP5:
1094 case VEC_TRAP6:
1095 case VEC_TRAP7:
1096 case VEC_TRAP8:
1097 case VEC_TRAP9:
1098 case VEC_TRAP10:
1099 case VEC_TRAP11:
1100 case VEC_TRAP12:
1101 case VEC_TRAP13:
1102 case VEC_TRAP14:
1103 info.si_code = ILL_ILLTRP;
1104 sig = SIGILL;
1105 break;
1106 case VEC_FPBRUC:
1107 case VEC_FPOE:
1108 case VEC_FPNAN:
1109 info.si_code = FPE_FLTINV;
1110 sig = SIGFPE;
1111 break;
1112 case VEC_FPIR:
1113 info.si_code = FPE_FLTRES;
1114 sig = SIGFPE;
1115 break;
1116 case VEC_FPDIVZ:
1117 info.si_code = FPE_FLTDIV;
1118 sig = SIGFPE;
1119 break;
1120 case VEC_FPUNDER:
1121 info.si_code = FPE_FLTUND;
1122 sig = SIGFPE;
1123 break;
1124 case VEC_FPOVER:
1125 info.si_code = FPE_FLTOVF;
1126 sig = SIGFPE;
1127 break;
1128 case VEC_ZERODIV:
1129 info.si_code = FPE_INTDIV;
1130 sig = SIGFPE;
1131 break;
1132 case VEC_CHK:
1133 case VEC_TRAP:
1134 info.si_code = FPE_INTOVF;
1135 sig = SIGFPE;
1136 break;
1137 case VEC_TRACE: /* ptrace single step */
1138 info.si_code = TRAP_TRACE;
1139 sig = SIGTRAP;
1140 break;
1141 case VEC_TRAP15: /* breakpoint */
1142 info.si_code = TRAP_BRKPT;
1143 sig = SIGTRAP;
1144 break;
1145 default:
1146 info.si_code = ILL_ILLOPC;
1147 sig = SIGILL;
1148 break;
1149 }
1150 info.si_signo = sig;
1151 info.si_errno = 0;
1152 switch (fp->ptregs.format) {
1153 default:
1154 info.si_addr = (void *) fp->ptregs.pc;
1155 break;
1156 case 2:
1157 info.si_addr = (void *) fp->un.fmt2.iaddr;
1158 break;
1159 case 7:
1160 info.si_addr = (void *) fp->un.fmt7.effaddr;
1161 break;
1162 case 9:
1163 info.si_addr = (void *) fp->un.fmt9.iaddr;
1164 break;
1165 case 10:
1166 info.si_addr = (void *) fp->un.fmta.daddr;
1167 break;
1168 case 11:
1169 info.si_addr = (void *) fp->un.fmtb.daddr;
1170 break;
1171 }
1172 force_sig_info (sig, &info, current);
1173}
1174
1175void die_if_kernel (char *str, struct pt_regs *fp, int nr)
1176{
1177 if (!(fp->sr & PS_S))
1178 return;
1179
1180 console_verbose();
1181 printk("%s: %08x\n",str,nr);
1182 show_registers(fp);
1183 add_taint(TAINT_DIE);
1184 do_exit(SIGSEGV);
1185}
1186
1187/*
1188 * This function is called if an error occur while accessing
1189 * user-space from the fpsp040 code.
1190 */
1191asmlinkage void fpsp040_die(void)
1192{
1193 do_exit(SIGSEGV);
1194}
1195
1196#ifdef CONFIG_M68KFPU_EMU
1197asmlinkage void fpemu_signal(int signal, int code, void *addr)
1198{
1199 siginfo_t info;
1200
1201 info.si_signo = signal;
1202 info.si_errno = 0;
1203 info.si_code = code;
1204 info.si_addr = addr;
1205 force_sig_info(signal, &info, current);
1206}
1207#endif
diff --git a/arch/m68knommu/kernel/traps.c b/arch/m68k/kernel/traps_no.c
index a768008dfd06..a768008dfd06 100644
--- a/arch/m68knommu/kernel/traps.c
+++ b/arch/m68k/kernel/traps_no.c
diff --git a/arch/m68k/kernel/vmlinux.lds.S b/arch/m68k/kernel/vmlinux.lds.S
index 99ba315bd0a8..030dabf0bc53 100644
--- a/arch/m68k/kernel/vmlinux.lds.S
+++ b/arch/m68k/kernel/vmlinux.lds.S
@@ -1,10 +1,5 @@
1PHDRS 1#ifdef CONFIG_MMU
2{ 2#include "vmlinux.lds_mm.S"
3 text PT_LOAD FILEHDR PHDRS FLAGS (7);
4 data PT_LOAD FLAGS (7);
5}
6#ifdef CONFIG_SUN3
7#include "vmlinux-sun3.lds"
8#else 3#else
9#include "vmlinux-std.lds" 4#include "vmlinux.lds_no.S"
10#endif 5#endif
diff --git a/arch/m68k/kernel/vmlinux.lds_mm.S b/arch/m68k/kernel/vmlinux.lds_mm.S
new file mode 100644
index 000000000000..99ba315bd0a8
--- /dev/null
+++ b/arch/m68k/kernel/vmlinux.lds_mm.S
@@ -0,0 +1,10 @@
1PHDRS
2{
3 text PT_LOAD FILEHDR PHDRS FLAGS (7);
4 data PT_LOAD FLAGS (7);
5}
6#ifdef CONFIG_SUN3
7#include "vmlinux-sun3.lds"
8#else
9#include "vmlinux-std.lds"
10#endif
diff --git a/arch/m68knommu/kernel/vmlinux.lds.S b/arch/m68k/kernel/vmlinux.lds_no.S
index 47e15ebfd893..47e15ebfd893 100644
--- a/arch/m68knommu/kernel/vmlinux.lds.S
+++ b/arch/m68k/kernel/vmlinux.lds_no.S
diff --git a/arch/m68k/lib/Makefile b/arch/m68k/lib/Makefile
index af9abf8d9d98..1f95881d8437 100644
--- a/arch/m68k/lib/Makefile
+++ b/arch/m68k/lib/Makefile
@@ -1,6 +1,5 @@
1# 1ifdef CONFIG_MMU
2# Makefile for m68k-specific library files.. 2include arch/m68k/lib/Makefile_mm
3# 3else
4 4include arch/m68k/lib/Makefile_no
5lib-y := ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ 5endif
6 checksum.o string.o uaccess.o
diff --git a/arch/m68k/lib/Makefile_mm b/arch/m68k/lib/Makefile_mm
new file mode 100644
index 000000000000..af9abf8d9d98
--- /dev/null
+++ b/arch/m68k/lib/Makefile_mm
@@ -0,0 +1,6 @@
1#
2# Makefile for m68k-specific library files..
3#
4
5lib-y := ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \
6 checksum.o string.o uaccess.o
diff --git a/arch/m68knommu/lib/Makefile b/arch/m68k/lib/Makefile_no
index 32d852e586d7..32d852e586d7 100644
--- a/arch/m68knommu/lib/Makefile
+++ b/arch/m68k/lib/Makefile_no
diff --git a/arch/m68k/lib/checksum.c b/arch/m68k/lib/checksum.c
index 6216f12a756b..1297536060de 100644
--- a/arch/m68k/lib/checksum.c
+++ b/arch/m68k/lib/checksum.c
@@ -1,425 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * INET An implementation of the TCP/IP protocol suite for the LINUX 2#include "checksum_mm.c"
3 * operating system. INET is implemented using the BSD Socket 3#else
4 * interface as the means of communication with the user level. 4#include "checksum_no.c"
5 * 5#endif
6 * IP/TCP/UDP checksumming routines
7 *
8 * Authors: Jorge Cwik, <jorge@laser.satlink.net>
9 * Arnt Gulbrandsen, <agulbra@nvg.unit.no>
10 * Tom May, <ftom@netcom.com>
11 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
12 * Lots of code moved from tcp.c and ip.c; see those files
13 * for more names.
14 *
15 * 03/02/96 Jes Sorensen, Andreas Schwab, Roman Hodek:
16 * Fixed some nasty bugs, causing some horrible crashes.
17 * A: At some points, the sum (%0) was used as
18 * length-counter instead of the length counter
19 * (%1). Thanks to Roman Hodek for pointing this out.
20 * B: GCC seems to mess up if one uses too many
21 * data-registers to hold input values and one tries to
22 * specify d0 and d1 as scratch registers. Letting gcc
23 * choose these registers itself solves the problem.
24 *
25 * This program is free software; you can redistribute it and/or
26 * modify it under the terms of the GNU General Public License
27 * as published by the Free Software Foundation; either version
28 * 2 of the License, or (at your option) any later version.
29 *
30 * 1998/8/31 Andreas Schwab:
31 * Zero out rest of buffer on exception in
32 * csum_partial_copy_from_user.
33 */
34
35#include <linux/module.h>
36#include <net/checksum.h>
37
38/*
39 * computes a partial checksum, e.g. for TCP/UDP fragments
40 */
41
42__wsum csum_partial(const void *buff, int len, __wsum sum)
43{
44 unsigned long tmp1, tmp2;
45 /*
46 * Experiments with ethernet and slip connections show that buff
47 * is aligned on either a 2-byte or 4-byte boundary.
48 */
49 __asm__("movel %2,%3\n\t"
50 "btst #1,%3\n\t" /* Check alignment */
51 "jeq 2f\n\t"
52 "subql #2,%1\n\t" /* buff%4==2: treat first word */
53 "jgt 1f\n\t"
54 "addql #2,%1\n\t" /* len was == 2, treat only rest */
55 "jra 4f\n"
56 "1:\t"
57 "addw %2@+,%0\n\t" /* add first word to sum */
58 "clrl %3\n\t"
59 "addxl %3,%0\n" /* add X bit */
60 "2:\t"
61 /* unrolled loop for the main part: do 8 longs at once */
62 "movel %1,%3\n\t" /* save len in tmp1 */
63 "lsrl #5,%1\n\t" /* len/32 */
64 "jeq 2f\n\t" /* not enough... */
65 "subql #1,%1\n"
66 "1:\t"
67 "movel %2@+,%4\n\t"
68 "addxl %4,%0\n\t"
69 "movel %2@+,%4\n\t"
70 "addxl %4,%0\n\t"
71 "movel %2@+,%4\n\t"
72 "addxl %4,%0\n\t"
73 "movel %2@+,%4\n\t"
74 "addxl %4,%0\n\t"
75 "movel %2@+,%4\n\t"
76 "addxl %4,%0\n\t"
77 "movel %2@+,%4\n\t"
78 "addxl %4,%0\n\t"
79 "movel %2@+,%4\n\t"
80 "addxl %4,%0\n\t"
81 "movel %2@+,%4\n\t"
82 "addxl %4,%0\n\t"
83 "dbra %1,1b\n\t"
84 "clrl %4\n\t"
85 "addxl %4,%0\n\t" /* add X bit */
86 "clrw %1\n\t"
87 "subql #1,%1\n\t"
88 "jcc 1b\n"
89 "2:\t"
90 "movel %3,%1\n\t" /* restore len from tmp1 */
91 "andw #0x1c,%3\n\t" /* number of rest longs */
92 "jeq 4f\n\t"
93 "lsrw #2,%3\n\t"
94 "subqw #1,%3\n"
95 "3:\t"
96 /* loop for rest longs */
97 "movel %2@+,%4\n\t"
98 "addxl %4,%0\n\t"
99 "dbra %3,3b\n\t"
100 "clrl %4\n\t"
101 "addxl %4,%0\n" /* add X bit */
102 "4:\t"
103 /* now check for rest bytes that do not fit into longs */
104 "andw #3,%1\n\t"
105 "jeq 7f\n\t"
106 "clrl %4\n\t" /* clear tmp2 for rest bytes */
107 "subqw #2,%1\n\t"
108 "jlt 5f\n\t"
109 "movew %2@+,%4\n\t" /* have rest >= 2: get word */
110 "swap %4\n\t" /* into bits 16..31 */
111 "tstw %1\n\t" /* another byte? */
112 "jeq 6f\n"
113 "5:\t"
114 "moveb %2@,%4\n\t" /* have odd rest: get byte */
115 "lslw #8,%4\n\t" /* into bits 8..15; 16..31 untouched */
116 "6:\t"
117 "addl %4,%0\n\t" /* now add rest long to sum */
118 "clrl %4\n\t"
119 "addxl %4,%0\n" /* add X bit */
120 "7:\t"
121 : "=d" (sum), "=d" (len), "=a" (buff),
122 "=&d" (tmp1), "=&d" (tmp2)
123 : "0" (sum), "1" (len), "2" (buff)
124 );
125 return(sum);
126}
127
128EXPORT_SYMBOL(csum_partial);
129
130
131/*
132 * copy from user space while checksumming, with exception handling.
133 */
134
135__wsum
136csum_partial_copy_from_user(const void __user *src, void *dst,
137 int len, __wsum sum, int *csum_err)
138{
139 /*
140 * GCC doesn't like more than 10 operands for the asm
141 * statements so we have to use tmp2 for the error
142 * code.
143 */
144 unsigned long tmp1, tmp2;
145
146 __asm__("movel %2,%4\n\t"
147 "btst #1,%4\n\t" /* Check alignment */
148 "jeq 2f\n\t"
149 "subql #2,%1\n\t" /* buff%4==2: treat first word */
150 "jgt 1f\n\t"
151 "addql #2,%1\n\t" /* len was == 2, treat only rest */
152 "jra 4f\n"
153 "1:\n"
154 "10:\t"
155 "movesw %2@+,%4\n\t" /* add first word to sum */
156 "addw %4,%0\n\t"
157 "movew %4,%3@+\n\t"
158 "clrl %4\n\t"
159 "addxl %4,%0\n" /* add X bit */
160 "2:\t"
161 /* unrolled loop for the main part: do 8 longs at once */
162 "movel %1,%4\n\t" /* save len in tmp1 */
163 "lsrl #5,%1\n\t" /* len/32 */
164 "jeq 2f\n\t" /* not enough... */
165 "subql #1,%1\n"
166 "1:\n"
167 "11:\t"
168 "movesl %2@+,%5\n\t"
169 "addxl %5,%0\n\t"
170 "movel %5,%3@+\n\t"
171 "12:\t"
172 "movesl %2@+,%5\n\t"
173 "addxl %5,%0\n\t"
174 "movel %5,%3@+\n\t"
175 "13:\t"
176 "movesl %2@+,%5\n\t"
177 "addxl %5,%0\n\t"
178 "movel %5,%3@+\n\t"
179 "14:\t"
180 "movesl %2@+,%5\n\t"
181 "addxl %5,%0\n\t"
182 "movel %5,%3@+\n\t"
183 "15:\t"
184 "movesl %2@+,%5\n\t"
185 "addxl %5,%0\n\t"
186 "movel %5,%3@+\n\t"
187 "16:\t"
188 "movesl %2@+,%5\n\t"
189 "addxl %5,%0\n\t"
190 "movel %5,%3@+\n\t"
191 "17:\t"
192 "movesl %2@+,%5\n\t"
193 "addxl %5,%0\n\t"
194 "movel %5,%3@+\n\t"
195 "18:\t"
196 "movesl %2@+,%5\n\t"
197 "addxl %5,%0\n\t"
198 "movel %5,%3@+\n\t"
199 "dbra %1,1b\n\t"
200 "clrl %5\n\t"
201 "addxl %5,%0\n\t" /* add X bit */
202 "clrw %1\n\t"
203 "subql #1,%1\n\t"
204 "jcc 1b\n"
205 "2:\t"
206 "movel %4,%1\n\t" /* restore len from tmp1 */
207 "andw #0x1c,%4\n\t" /* number of rest longs */
208 "jeq 4f\n\t"
209 "lsrw #2,%4\n\t"
210 "subqw #1,%4\n"
211 "3:\n"
212 /* loop for rest longs */
213 "19:\t"
214 "movesl %2@+,%5\n\t"
215 "addxl %5,%0\n\t"
216 "movel %5,%3@+\n\t"
217 "dbra %4,3b\n\t"
218 "clrl %5\n\t"
219 "addxl %5,%0\n" /* add X bit */
220 "4:\t"
221 /* now check for rest bytes that do not fit into longs */
222 "andw #3,%1\n\t"
223 "jeq 7f\n\t"
224 "clrl %5\n\t" /* clear tmp2 for rest bytes */
225 "subqw #2,%1\n\t"
226 "jlt 5f\n\t"
227 "20:\t"
228 "movesw %2@+,%5\n\t" /* have rest >= 2: get word */
229 "movew %5,%3@+\n\t"
230 "swap %5\n\t" /* into bits 16..31 */
231 "tstw %1\n\t" /* another byte? */
232 "jeq 6f\n"
233 "5:\n"
234 "21:\t"
235 "movesb %2@,%5\n\t" /* have odd rest: get byte */
236 "moveb %5,%3@+\n\t"
237 "lslw #8,%5\n\t" /* into bits 8..15; 16..31 untouched */
238 "6:\t"
239 "addl %5,%0\n\t" /* now add rest long to sum */
240 "clrl %5\n\t"
241 "addxl %5,%0\n\t" /* add X bit */
242 "7:\t"
243 "clrl %5\n" /* no error - clear return value */
244 "8:\n"
245 ".section .fixup,\"ax\"\n"
246 ".even\n"
247 /* If any exception occurs zero out the rest.
248 Similarities with the code above are intentional :-) */
249 "90:\t"
250 "clrw %3@+\n\t"
251 "movel %1,%4\n\t"
252 "lsrl #5,%1\n\t"
253 "jeq 1f\n\t"
254 "subql #1,%1\n"
255 "91:\t"
256 "clrl %3@+\n"
257 "92:\t"
258 "clrl %3@+\n"
259 "93:\t"
260 "clrl %3@+\n"
261 "94:\t"
262 "clrl %3@+\n"
263 "95:\t"
264 "clrl %3@+\n"
265 "96:\t"
266 "clrl %3@+\n"
267 "97:\t"
268 "clrl %3@+\n"
269 "98:\t"
270 "clrl %3@+\n\t"
271 "dbra %1,91b\n\t"
272 "clrw %1\n\t"
273 "subql #1,%1\n\t"
274 "jcc 91b\n"
275 "1:\t"
276 "movel %4,%1\n\t"
277 "andw #0x1c,%4\n\t"
278 "jeq 1f\n\t"
279 "lsrw #2,%4\n\t"
280 "subqw #1,%4\n"
281 "99:\t"
282 "clrl %3@+\n\t"
283 "dbra %4,99b\n\t"
284 "1:\t"
285 "andw #3,%1\n\t"
286 "jeq 9f\n"
287 "100:\t"
288 "clrw %3@+\n\t"
289 "tstw %1\n\t"
290 "jeq 9f\n"
291 "101:\t"
292 "clrb %3@+\n"
293 "9:\t"
294#define STR(X) STR1(X)
295#define STR1(X) #X
296 "moveq #-" STR(EFAULT) ",%5\n\t"
297 "jra 8b\n"
298 ".previous\n"
299 ".section __ex_table,\"a\"\n"
300 ".long 10b,90b\n"
301 ".long 11b,91b\n"
302 ".long 12b,92b\n"
303 ".long 13b,93b\n"
304 ".long 14b,94b\n"
305 ".long 15b,95b\n"
306 ".long 16b,96b\n"
307 ".long 17b,97b\n"
308 ".long 18b,98b\n"
309 ".long 19b,99b\n"
310 ".long 20b,100b\n"
311 ".long 21b,101b\n"
312 ".previous"
313 : "=d" (sum), "=d" (len), "=a" (src), "=a" (dst),
314 "=&d" (tmp1), "=d" (tmp2)
315 : "0" (sum), "1" (len), "2" (src), "3" (dst)
316 );
317
318 *csum_err = tmp2;
319
320 return(sum);
321}
322
323EXPORT_SYMBOL(csum_partial_copy_from_user);
324
325
326/*
327 * copy from kernel space while checksumming, otherwise like csum_partial
328 */
329
330__wsum
331csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum)
332{
333 unsigned long tmp1, tmp2;
334 __asm__("movel %2,%4\n\t"
335 "btst #1,%4\n\t" /* Check alignment */
336 "jeq 2f\n\t"
337 "subql #2,%1\n\t" /* buff%4==2: treat first word */
338 "jgt 1f\n\t"
339 "addql #2,%1\n\t" /* len was == 2, treat only rest */
340 "jra 4f\n"
341 "1:\t"
342 "movew %2@+,%4\n\t" /* add first word to sum */
343 "addw %4,%0\n\t"
344 "movew %4,%3@+\n\t"
345 "clrl %4\n\t"
346 "addxl %4,%0\n" /* add X bit */
347 "2:\t"
348 /* unrolled loop for the main part: do 8 longs at once */
349 "movel %1,%4\n\t" /* save len in tmp1 */
350 "lsrl #5,%1\n\t" /* len/32 */
351 "jeq 2f\n\t" /* not enough... */
352 "subql #1,%1\n"
353 "1:\t"
354 "movel %2@+,%5\n\t"
355 "addxl %5,%0\n\t"
356 "movel %5,%3@+\n\t"
357 "movel %2@+,%5\n\t"
358 "addxl %5,%0\n\t"
359 "movel %5,%3@+\n\t"
360 "movel %2@+,%5\n\t"
361 "addxl %5,%0\n\t"
362 "movel %5,%3@+\n\t"
363 "movel %2@+,%5\n\t"
364 "addxl %5,%0\n\t"
365 "movel %5,%3@+\n\t"
366 "movel %2@+,%5\n\t"
367 "addxl %5,%0\n\t"
368 "movel %5,%3@+\n\t"
369 "movel %2@+,%5\n\t"
370 "addxl %5,%0\n\t"
371 "movel %5,%3@+\n\t"
372 "movel %2@+,%5\n\t"
373 "addxl %5,%0\n\t"
374 "movel %5,%3@+\n\t"
375 "movel %2@+,%5\n\t"
376 "addxl %5,%0\n\t"
377 "movel %5,%3@+\n\t"
378 "dbra %1,1b\n\t"
379 "clrl %5\n\t"
380 "addxl %5,%0\n\t" /* add X bit */
381 "clrw %1\n\t"
382 "subql #1,%1\n\t"
383 "jcc 1b\n"
384 "2:\t"
385 "movel %4,%1\n\t" /* restore len from tmp1 */
386 "andw #0x1c,%4\n\t" /* number of rest longs */
387 "jeq 4f\n\t"
388 "lsrw #2,%4\n\t"
389 "subqw #1,%4\n"
390 "3:\t"
391 /* loop for rest longs */
392 "movel %2@+,%5\n\t"
393 "addxl %5,%0\n\t"
394 "movel %5,%3@+\n\t"
395 "dbra %4,3b\n\t"
396 "clrl %5\n\t"
397 "addxl %5,%0\n" /* add X bit */
398 "4:\t"
399 /* now check for rest bytes that do not fit into longs */
400 "andw #3,%1\n\t"
401 "jeq 7f\n\t"
402 "clrl %5\n\t" /* clear tmp2 for rest bytes */
403 "subqw #2,%1\n\t"
404 "jlt 5f\n\t"
405 "movew %2@+,%5\n\t" /* have rest >= 2: get word */
406 "movew %5,%3@+\n\t"
407 "swap %5\n\t" /* into bits 16..31 */
408 "tstw %1\n\t" /* another byte? */
409 "jeq 6f\n"
410 "5:\t"
411 "moveb %2@,%5\n\t" /* have odd rest: get byte */
412 "moveb %5,%3@+\n\t"
413 "lslw #8,%5\n" /* into bits 8..15; 16..31 untouched */
414 "6:\t"
415 "addl %5,%0\n\t" /* now add rest long to sum */
416 "clrl %5\n\t"
417 "addxl %5,%0\n" /* add X bit */
418 "7:\t"
419 : "=d" (sum), "=d" (len), "=a" (src), "=a" (dst),
420 "=&d" (tmp1), "=&d" (tmp2)
421 : "0" (sum), "1" (len), "2" (src), "3" (dst)
422 );
423 return(sum);
424}
425EXPORT_SYMBOL(csum_partial_copy_nocheck);
diff --git a/arch/m68k/lib/checksum_mm.c b/arch/m68k/lib/checksum_mm.c
new file mode 100644
index 000000000000..6216f12a756b
--- /dev/null
+++ b/arch/m68k/lib/checksum_mm.c
@@ -0,0 +1,425 @@
1/*
2 * INET An implementation of the TCP/IP protocol suite for the LINUX
3 * operating system. INET is implemented using the BSD Socket
4 * interface as the means of communication with the user level.
5 *
6 * IP/TCP/UDP checksumming routines
7 *
8 * Authors: Jorge Cwik, <jorge@laser.satlink.net>
9 * Arnt Gulbrandsen, <agulbra@nvg.unit.no>
10 * Tom May, <ftom@netcom.com>
11 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
12 * Lots of code moved from tcp.c and ip.c; see those files
13 * for more names.
14 *
15 * 03/02/96 Jes Sorensen, Andreas Schwab, Roman Hodek:
16 * Fixed some nasty bugs, causing some horrible crashes.
17 * A: At some points, the sum (%0) was used as
18 * length-counter instead of the length counter
19 * (%1). Thanks to Roman Hodek for pointing this out.
20 * B: GCC seems to mess up if one uses too many
21 * data-registers to hold input values and one tries to
22 * specify d0 and d1 as scratch registers. Letting gcc
23 * choose these registers itself solves the problem.
24 *
25 * This program is free software; you can redistribute it and/or
26 * modify it under the terms of the GNU General Public License
27 * as published by the Free Software Foundation; either version
28 * 2 of the License, or (at your option) any later version.
29 *
30 * 1998/8/31 Andreas Schwab:
31 * Zero out rest of buffer on exception in
32 * csum_partial_copy_from_user.
33 */
34
35#include <linux/module.h>
36#include <net/checksum.h>
37
38/*
39 * computes a partial checksum, e.g. for TCP/UDP fragments
40 */
41
42__wsum csum_partial(const void *buff, int len, __wsum sum)
43{
44 unsigned long tmp1, tmp2;
45 /*
46 * Experiments with ethernet and slip connections show that buff
47 * is aligned on either a 2-byte or 4-byte boundary.
48 */
49 __asm__("movel %2,%3\n\t"
50 "btst #1,%3\n\t" /* Check alignment */
51 "jeq 2f\n\t"
52 "subql #2,%1\n\t" /* buff%4==2: treat first word */
53 "jgt 1f\n\t"
54 "addql #2,%1\n\t" /* len was == 2, treat only rest */
55 "jra 4f\n"
56 "1:\t"
57 "addw %2@+,%0\n\t" /* add first word to sum */
58 "clrl %3\n\t"
59 "addxl %3,%0\n" /* add X bit */
60 "2:\t"
61 /* unrolled loop for the main part: do 8 longs at once */
62 "movel %1,%3\n\t" /* save len in tmp1 */
63 "lsrl #5,%1\n\t" /* len/32 */
64 "jeq 2f\n\t" /* not enough... */
65 "subql #1,%1\n"
66 "1:\t"
67 "movel %2@+,%4\n\t"
68 "addxl %4,%0\n\t"
69 "movel %2@+,%4\n\t"
70 "addxl %4,%0\n\t"
71 "movel %2@+,%4\n\t"
72 "addxl %4,%0\n\t"
73 "movel %2@+,%4\n\t"
74 "addxl %4,%0\n\t"
75 "movel %2@+,%4\n\t"
76 "addxl %4,%0\n\t"
77 "movel %2@+,%4\n\t"
78 "addxl %4,%0\n\t"
79 "movel %2@+,%4\n\t"
80 "addxl %4,%0\n\t"
81 "movel %2@+,%4\n\t"
82 "addxl %4,%0\n\t"
83 "dbra %1,1b\n\t"
84 "clrl %4\n\t"
85 "addxl %4,%0\n\t" /* add X bit */
86 "clrw %1\n\t"
87 "subql #1,%1\n\t"
88 "jcc 1b\n"
89 "2:\t"
90 "movel %3,%1\n\t" /* restore len from tmp1 */
91 "andw #0x1c,%3\n\t" /* number of rest longs */
92 "jeq 4f\n\t"
93 "lsrw #2,%3\n\t"
94 "subqw #1,%3\n"
95 "3:\t"
96 /* loop for rest longs */
97 "movel %2@+,%4\n\t"
98 "addxl %4,%0\n\t"
99 "dbra %3,3b\n\t"
100 "clrl %4\n\t"
101 "addxl %4,%0\n" /* add X bit */
102 "4:\t"
103 /* now check for rest bytes that do not fit into longs */
104 "andw #3,%1\n\t"
105 "jeq 7f\n\t"
106 "clrl %4\n\t" /* clear tmp2 for rest bytes */
107 "subqw #2,%1\n\t"
108 "jlt 5f\n\t"
109 "movew %2@+,%4\n\t" /* have rest >= 2: get word */
110 "swap %4\n\t" /* into bits 16..31 */
111 "tstw %1\n\t" /* another byte? */
112 "jeq 6f\n"
113 "5:\t"
114 "moveb %2@,%4\n\t" /* have odd rest: get byte */
115 "lslw #8,%4\n\t" /* into bits 8..15; 16..31 untouched */
116 "6:\t"
117 "addl %4,%0\n\t" /* now add rest long to sum */
118 "clrl %4\n\t"
119 "addxl %4,%0\n" /* add X bit */
120 "7:\t"
121 : "=d" (sum), "=d" (len), "=a" (buff),
122 "=&d" (tmp1), "=&d" (tmp2)
123 : "0" (sum), "1" (len), "2" (buff)
124 );
125 return(sum);
126}
127
128EXPORT_SYMBOL(csum_partial);
129
130
131/*
132 * copy from user space while checksumming, with exception handling.
133 */
134
135__wsum
136csum_partial_copy_from_user(const void __user *src, void *dst,
137 int len, __wsum sum, int *csum_err)
138{
139 /*
140 * GCC doesn't like more than 10 operands for the asm
141 * statements so we have to use tmp2 for the error
142 * code.
143 */
144 unsigned long tmp1, tmp2;
145
146 __asm__("movel %2,%4\n\t"
147 "btst #1,%4\n\t" /* Check alignment */
148 "jeq 2f\n\t"
149 "subql #2,%1\n\t" /* buff%4==2: treat first word */
150 "jgt 1f\n\t"
151 "addql #2,%1\n\t" /* len was == 2, treat only rest */
152 "jra 4f\n"
153 "1:\n"
154 "10:\t"
155 "movesw %2@+,%4\n\t" /* add first word to sum */
156 "addw %4,%0\n\t"
157 "movew %4,%3@+\n\t"
158 "clrl %4\n\t"
159 "addxl %4,%0\n" /* add X bit */
160 "2:\t"
161 /* unrolled loop for the main part: do 8 longs at once */
162 "movel %1,%4\n\t" /* save len in tmp1 */
163 "lsrl #5,%1\n\t" /* len/32 */
164 "jeq 2f\n\t" /* not enough... */
165 "subql #1,%1\n"
166 "1:\n"
167 "11:\t"
168 "movesl %2@+,%5\n\t"
169 "addxl %5,%0\n\t"
170 "movel %5,%3@+\n\t"
171 "12:\t"
172 "movesl %2@+,%5\n\t"
173 "addxl %5,%0\n\t"
174 "movel %5,%3@+\n\t"
175 "13:\t"
176 "movesl %2@+,%5\n\t"
177 "addxl %5,%0\n\t"
178 "movel %5,%3@+\n\t"
179 "14:\t"
180 "movesl %2@+,%5\n\t"
181 "addxl %5,%0\n\t"
182 "movel %5,%3@+\n\t"
183 "15:\t"
184 "movesl %2@+,%5\n\t"
185 "addxl %5,%0\n\t"
186 "movel %5,%3@+\n\t"
187 "16:\t"
188 "movesl %2@+,%5\n\t"
189 "addxl %5,%0\n\t"
190 "movel %5,%3@+\n\t"
191 "17:\t"
192 "movesl %2@+,%5\n\t"
193 "addxl %5,%0\n\t"
194 "movel %5,%3@+\n\t"
195 "18:\t"
196 "movesl %2@+,%5\n\t"
197 "addxl %5,%0\n\t"
198 "movel %5,%3@+\n\t"
199 "dbra %1,1b\n\t"
200 "clrl %5\n\t"
201 "addxl %5,%0\n\t" /* add X bit */
202 "clrw %1\n\t"
203 "subql #1,%1\n\t"
204 "jcc 1b\n"
205 "2:\t"
206 "movel %4,%1\n\t" /* restore len from tmp1 */
207 "andw #0x1c,%4\n\t" /* number of rest longs */
208 "jeq 4f\n\t"
209 "lsrw #2,%4\n\t"
210 "subqw #1,%4\n"
211 "3:\n"
212 /* loop for rest longs */
213 "19:\t"
214 "movesl %2@+,%5\n\t"
215 "addxl %5,%0\n\t"
216 "movel %5,%3@+\n\t"
217 "dbra %4,3b\n\t"
218 "clrl %5\n\t"
219 "addxl %5,%0\n" /* add X bit */
220 "4:\t"
221 /* now check for rest bytes that do not fit into longs */
222 "andw #3,%1\n\t"
223 "jeq 7f\n\t"
224 "clrl %5\n\t" /* clear tmp2 for rest bytes */
225 "subqw #2,%1\n\t"
226 "jlt 5f\n\t"
227 "20:\t"
228 "movesw %2@+,%5\n\t" /* have rest >= 2: get word */
229 "movew %5,%3@+\n\t"
230 "swap %5\n\t" /* into bits 16..31 */
231 "tstw %1\n\t" /* another byte? */
232 "jeq 6f\n"
233 "5:\n"
234 "21:\t"
235 "movesb %2@,%5\n\t" /* have odd rest: get byte */
236 "moveb %5,%3@+\n\t"
237 "lslw #8,%5\n\t" /* into bits 8..15; 16..31 untouched */
238 "6:\t"
239 "addl %5,%0\n\t" /* now add rest long to sum */
240 "clrl %5\n\t"
241 "addxl %5,%0\n\t" /* add X bit */
242 "7:\t"
243 "clrl %5\n" /* no error - clear return value */
244 "8:\n"
245 ".section .fixup,\"ax\"\n"
246 ".even\n"
247 /* If any exception occurs zero out the rest.
248 Similarities with the code above are intentional :-) */
249 "90:\t"
250 "clrw %3@+\n\t"
251 "movel %1,%4\n\t"
252 "lsrl #5,%1\n\t"
253 "jeq 1f\n\t"
254 "subql #1,%1\n"
255 "91:\t"
256 "clrl %3@+\n"
257 "92:\t"
258 "clrl %3@+\n"
259 "93:\t"
260 "clrl %3@+\n"
261 "94:\t"
262 "clrl %3@+\n"
263 "95:\t"
264 "clrl %3@+\n"
265 "96:\t"
266 "clrl %3@+\n"
267 "97:\t"
268 "clrl %3@+\n"
269 "98:\t"
270 "clrl %3@+\n\t"
271 "dbra %1,91b\n\t"
272 "clrw %1\n\t"
273 "subql #1,%1\n\t"
274 "jcc 91b\n"
275 "1:\t"
276 "movel %4,%1\n\t"
277 "andw #0x1c,%4\n\t"
278 "jeq 1f\n\t"
279 "lsrw #2,%4\n\t"
280 "subqw #1,%4\n"
281 "99:\t"
282 "clrl %3@+\n\t"
283 "dbra %4,99b\n\t"
284 "1:\t"
285 "andw #3,%1\n\t"
286 "jeq 9f\n"
287 "100:\t"
288 "clrw %3@+\n\t"
289 "tstw %1\n\t"
290 "jeq 9f\n"
291 "101:\t"
292 "clrb %3@+\n"
293 "9:\t"
294#define STR(X) STR1(X)
295#define STR1(X) #X
296 "moveq #-" STR(EFAULT) ",%5\n\t"
297 "jra 8b\n"
298 ".previous\n"
299 ".section __ex_table,\"a\"\n"
300 ".long 10b,90b\n"
301 ".long 11b,91b\n"
302 ".long 12b,92b\n"
303 ".long 13b,93b\n"
304 ".long 14b,94b\n"
305 ".long 15b,95b\n"
306 ".long 16b,96b\n"
307 ".long 17b,97b\n"
308 ".long 18b,98b\n"
309 ".long 19b,99b\n"
310 ".long 20b,100b\n"
311 ".long 21b,101b\n"
312 ".previous"
313 : "=d" (sum), "=d" (len), "=a" (src), "=a" (dst),
314 "=&d" (tmp1), "=d" (tmp2)
315 : "0" (sum), "1" (len), "2" (src), "3" (dst)
316 );
317
318 *csum_err = tmp2;
319
320 return(sum);
321}
322
323EXPORT_SYMBOL(csum_partial_copy_from_user);
324
325
326/*
327 * copy from kernel space while checksumming, otherwise like csum_partial
328 */
329
330__wsum
331csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum)
332{
333 unsigned long tmp1, tmp2;
334 __asm__("movel %2,%4\n\t"
335 "btst #1,%4\n\t" /* Check alignment */
336 "jeq 2f\n\t"
337 "subql #2,%1\n\t" /* buff%4==2: treat first word */
338 "jgt 1f\n\t"
339 "addql #2,%1\n\t" /* len was == 2, treat only rest */
340 "jra 4f\n"
341 "1:\t"
342 "movew %2@+,%4\n\t" /* add first word to sum */
343 "addw %4,%0\n\t"
344 "movew %4,%3@+\n\t"
345 "clrl %4\n\t"
346 "addxl %4,%0\n" /* add X bit */
347 "2:\t"
348 /* unrolled loop for the main part: do 8 longs at once */
349 "movel %1,%4\n\t" /* save len in tmp1 */
350 "lsrl #5,%1\n\t" /* len/32 */
351 "jeq 2f\n\t" /* not enough... */
352 "subql #1,%1\n"
353 "1:\t"
354 "movel %2@+,%5\n\t"
355 "addxl %5,%0\n\t"
356 "movel %5,%3@+\n\t"
357 "movel %2@+,%5\n\t"
358 "addxl %5,%0\n\t"
359 "movel %5,%3@+\n\t"
360 "movel %2@+,%5\n\t"
361 "addxl %5,%0\n\t"
362 "movel %5,%3@+\n\t"
363 "movel %2@+,%5\n\t"
364 "addxl %5,%0\n\t"
365 "movel %5,%3@+\n\t"
366 "movel %2@+,%5\n\t"
367 "addxl %5,%0\n\t"
368 "movel %5,%3@+\n\t"
369 "movel %2@+,%5\n\t"
370 "addxl %5,%0\n\t"
371 "movel %5,%3@+\n\t"
372 "movel %2@+,%5\n\t"
373 "addxl %5,%0\n\t"
374 "movel %5,%3@+\n\t"
375 "movel %2@+,%5\n\t"
376 "addxl %5,%0\n\t"
377 "movel %5,%3@+\n\t"
378 "dbra %1,1b\n\t"
379 "clrl %5\n\t"
380 "addxl %5,%0\n\t" /* add X bit */
381 "clrw %1\n\t"
382 "subql #1,%1\n\t"
383 "jcc 1b\n"
384 "2:\t"
385 "movel %4,%1\n\t" /* restore len from tmp1 */
386 "andw #0x1c,%4\n\t" /* number of rest longs */
387 "jeq 4f\n\t"
388 "lsrw #2,%4\n\t"
389 "subqw #1,%4\n"
390 "3:\t"
391 /* loop for rest longs */
392 "movel %2@+,%5\n\t"
393 "addxl %5,%0\n\t"
394 "movel %5,%3@+\n\t"
395 "dbra %4,3b\n\t"
396 "clrl %5\n\t"
397 "addxl %5,%0\n" /* add X bit */
398 "4:\t"
399 /* now check for rest bytes that do not fit into longs */
400 "andw #3,%1\n\t"
401 "jeq 7f\n\t"
402 "clrl %5\n\t" /* clear tmp2 for rest bytes */
403 "subqw #2,%1\n\t"
404 "jlt 5f\n\t"
405 "movew %2@+,%5\n\t" /* have rest >= 2: get word */
406 "movew %5,%3@+\n\t"
407 "swap %5\n\t" /* into bits 16..31 */
408 "tstw %1\n\t" /* another byte? */
409 "jeq 6f\n"
410 "5:\t"
411 "moveb %2@,%5\n\t" /* have odd rest: get byte */
412 "moveb %5,%3@+\n\t"
413 "lslw #8,%5\n" /* into bits 8..15; 16..31 untouched */
414 "6:\t"
415 "addl %5,%0\n\t" /* now add rest long to sum */
416 "clrl %5\n\t"
417 "addxl %5,%0\n" /* add X bit */
418 "7:\t"
419 : "=d" (sum), "=d" (len), "=a" (src), "=a" (dst),
420 "=&d" (tmp1), "=&d" (tmp2)
421 : "0" (sum), "1" (len), "2" (src), "3" (dst)
422 );
423 return(sum);
424}
425EXPORT_SYMBOL(csum_partial_copy_nocheck);
diff --git a/arch/m68knommu/lib/checksum.c b/arch/m68k/lib/checksum_no.c
index eccf25d3d73e..eccf25d3d73e 100644
--- a/arch/m68knommu/lib/checksum.c
+++ b/arch/m68k/lib/checksum_no.c
diff --git a/arch/m68knommu/lib/delay.c b/arch/m68k/lib/delay.c
index 5bd5472d38a0..5bd5472d38a0 100644
--- a/arch/m68knommu/lib/delay.c
+++ b/arch/m68k/lib/delay.c
diff --git a/arch/m68knommu/lib/divsi3.S b/arch/m68k/lib/divsi3.S
index ec307b61991e..ec307b61991e 100644
--- a/arch/m68knommu/lib/divsi3.S
+++ b/arch/m68k/lib/divsi3.S
diff --git a/arch/m68knommu/lib/memcpy.c b/arch/m68k/lib/memcpy.c
index b50dbcad4746..b50dbcad4746 100644
--- a/arch/m68knommu/lib/memcpy.c
+++ b/arch/m68k/lib/memcpy.c
diff --git a/arch/m68knommu/lib/memmove.c b/arch/m68k/lib/memmove.c
index b3dcfe9dab7e..b3dcfe9dab7e 100644
--- a/arch/m68knommu/lib/memmove.c
+++ b/arch/m68k/lib/memmove.c
diff --git a/arch/m68knommu/lib/memset.c b/arch/m68k/lib/memset.c
index 1389bf455633..1389bf455633 100644
--- a/arch/m68knommu/lib/memset.c
+++ b/arch/m68k/lib/memset.c
diff --git a/arch/m68knommu/lib/modsi3.S b/arch/m68k/lib/modsi3.S
index ef3849435768..ef3849435768 100644
--- a/arch/m68knommu/lib/modsi3.S
+++ b/arch/m68k/lib/modsi3.S
diff --git a/arch/m68k/lib/muldi3.c b/arch/m68k/lib/muldi3.c
index be4f275649e3..16e0eb338ee0 100644
--- a/arch/m68k/lib/muldi3.c
+++ b/arch/m68k/lib/muldi3.c
@@ -1,63 +1,5 @@
1/* muldi3.c extracted from gcc-2.7.2.3/libgcc2.c and 1#ifdef CONFIG_MMU
2 gcc-2.7.2.3/longlong.h which is: */ 2#include "muldi3_mm.c"
3/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc. 3#else
4 4#include "muldi3_no.c"
5This file is part of GNU CC. 5#endif
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */
21
22#define BITS_PER_UNIT 8
23
24#define umul_ppmm(w1, w0, u, v) \
25 __asm__ ("mulu%.l %3,%1:%0" \
26 : "=d" ((USItype)(w0)), \
27 "=d" ((USItype)(w1)) \
28 : "%0" ((USItype)(u)), \
29 "dmi" ((USItype)(v)))
30
31#define __umulsidi3(u, v) \
32 ({DIunion __w; \
33 umul_ppmm (__w.s.high, __w.s.low, u, v); \
34 __w.ll; })
35
36typedef int SItype __attribute__ ((mode (SI)));
37typedef unsigned int USItype __attribute__ ((mode (SI)));
38typedef int DItype __attribute__ ((mode (DI)));
39typedef int word_type __attribute__ ((mode (__word__)));
40
41struct DIstruct {SItype high, low;};
42
43typedef union
44{
45 struct DIstruct s;
46 DItype ll;
47} DIunion;
48
49DItype
50__muldi3 (DItype u, DItype v)
51{
52 DIunion w;
53 DIunion uu, vv;
54
55 uu.ll = u,
56 vv.ll = v;
57
58 w.ll = __umulsidi3 (uu.s.low, vv.s.low);
59 w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high
60 + (USItype) uu.s.high * (USItype) vv.s.low);
61
62 return w.ll;
63}
diff --git a/arch/m68knommu/lib/ashrdi3.c b/arch/m68k/lib/muldi3_mm.c
index 78efb65e315a..be4f275649e3 100644
--- a/arch/m68knommu/lib/ashrdi3.c
+++ b/arch/m68k/lib/muldi3_mm.c
@@ -1,4 +1,5 @@
1/* ashrdi3.c extracted from gcc-2.7.2/libgcc2.c which is: */ 1/* muldi3.c extracted from gcc-2.7.2.3/libgcc2.c and
2 gcc-2.7.2.3/longlong.h which is: */
2/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc. 3/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3 4
4This file is part of GNU CC. 5This file is part of GNU CC.
@@ -20,7 +21,19 @@ Boston, MA 02111-1307, USA. */
20 21
21#define BITS_PER_UNIT 8 22#define BITS_PER_UNIT 8
22 23
23typedef int SItype __attribute__ ((mode (SI))); 24#define umul_ppmm(w1, w0, u, v) \
25 __asm__ ("mulu%.l %3,%1:%0" \
26 : "=d" ((USItype)(w0)), \
27 "=d" ((USItype)(w1)) \
28 : "%0" ((USItype)(u)), \
29 "dmi" ((USItype)(v)))
30
31#define __umulsidi3(u, v) \
32 ({DIunion __w; \
33 umul_ppmm (__w.s.high, __w.s.low, u, v); \
34 __w.ll; })
35
36typedef int SItype __attribute__ ((mode (SI)));
24typedef unsigned int USItype __attribute__ ((mode (SI))); 37typedef unsigned int USItype __attribute__ ((mode (SI)));
25typedef int DItype __attribute__ ((mode (DI))); 38typedef int DItype __attribute__ ((mode (DI)));
26typedef int word_type __attribute__ ((mode (__word__))); 39typedef int word_type __attribute__ ((mode (__word__)));
@@ -34,30 +47,17 @@ typedef union
34} DIunion; 47} DIunion;
35 48
36DItype 49DItype
37__ashrdi3 (DItype u, word_type b) 50__muldi3 (DItype u, DItype v)
38{ 51{
39 DIunion w; 52 DIunion w;
40 word_type bm; 53 DIunion uu, vv;
41 DIunion uu; 54
42 55 uu.ll = u,
43 if (b == 0) 56 vv.ll = v;
44 return u; 57
45 58 w.ll = __umulsidi3 (uu.s.low, vv.s.low);
46 uu.ll = u; 59 w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high
47 60 + (USItype) uu.s.high * (USItype) vv.s.low);
48 bm = (sizeof (SItype) * BITS_PER_UNIT) - b;
49 if (bm <= 0)
50 {
51 /* w.s.high = 1..1 or 0..0 */
52 w.s.high = uu.s.high >> (sizeof (SItype) * BITS_PER_UNIT - 1);
53 w.s.low = uu.s.high >> -bm;
54 }
55 else
56 {
57 USItype carries = (USItype)uu.s.high << bm;
58 w.s.high = uu.s.high >> b;
59 w.s.low = ((USItype)uu.s.low >> b) | carries;
60 }
61 61
62 return w.ll; 62 return w.ll;
63} 63}
diff --git a/arch/m68knommu/lib/muldi3.c b/arch/m68k/lib/muldi3_no.c
index 34af72c30303..34af72c30303 100644
--- a/arch/m68knommu/lib/muldi3.c
+++ b/arch/m68k/lib/muldi3_no.c
diff --git a/arch/m68knommu/lib/mulsi3.S b/arch/m68k/lib/mulsi3.S
index ce29ea37b45f..ce29ea37b45f 100644
--- a/arch/m68knommu/lib/mulsi3.S
+++ b/arch/m68k/lib/mulsi3.S
diff --git a/arch/m68knommu/lib/udivsi3.S b/arch/m68k/lib/udivsi3.S
index c424c4a1f0a3..c424c4a1f0a3 100644
--- a/arch/m68knommu/lib/udivsi3.S
+++ b/arch/m68k/lib/udivsi3.S
diff --git a/arch/m68knommu/lib/umodsi3.S b/arch/m68k/lib/umodsi3.S
index 5def5f626478..5def5f626478 100644
--- a/arch/m68knommu/lib/umodsi3.S
+++ b/arch/m68k/lib/umodsi3.S
diff --git a/arch/m68k/mm/Makefile b/arch/m68k/mm/Makefile
index 5eaa43c4cb3c..b60270e4954b 100644
--- a/arch/m68k/mm/Makefile
+++ b/arch/m68k/mm/Makefile
@@ -1,8 +1,5 @@
1# 1ifdef CONFIG_MMU
2# Makefile for the linux m68k-specific parts of the memory manager. 2include arch/m68k/mm/Makefile_mm
3# 3else
4 4include arch/m68k/mm/Makefile_no
5obj-y := cache.o init.o fault.o hwtest.o 5endif
6
7obj-$(CONFIG_MMU_MOTOROLA) += kmap.o memory.o motorola.o
8obj-$(CONFIG_MMU_SUN3) += sun3kmap.o sun3mmu.o
diff --git a/arch/m68k/mm/Makefile_mm b/arch/m68k/mm/Makefile_mm
new file mode 100644
index 000000000000..5eaa43c4cb3c
--- /dev/null
+++ b/arch/m68k/mm/Makefile_mm
@@ -0,0 +1,8 @@
1#
2# Makefile for the linux m68k-specific parts of the memory manager.
3#
4
5obj-y := cache.o init.o fault.o hwtest.o
6
7obj-$(CONFIG_MMU_MOTOROLA) += kmap.o memory.o motorola.o
8obj-$(CONFIG_MMU_SUN3) += sun3kmap.o sun3mmu.o
diff --git a/arch/m68knommu/mm/Makefile b/arch/m68k/mm/Makefile_no
index b54ab6b4b523..b54ab6b4b523 100644
--- a/arch/m68knommu/mm/Makefile
+++ b/arch/m68k/mm/Makefile_no
diff --git a/arch/m68k/mm/init.c b/arch/m68k/mm/init.c
index 8bc842554e5b..27b5ce089a34 100644
--- a/arch/m68k/mm/init.c
+++ b/arch/m68k/mm/init.c
@@ -1,150 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * linux/arch/m68k/mm/init.c 2#include "init_mm.c"
3 * 3#else
4 * Copyright (C) 1995 Hamish Macdonald 4#include "init_no.c"
5 *
6 * Contains common initialization routines, specific init code moved
7 * to motorola.c and sun3mmu.c
8 */
9
10#include <linux/module.h>
11#include <linux/signal.h>
12#include <linux/sched.h>
13#include <linux/mm.h>
14#include <linux/swap.h>
15#include <linux/kernel.h>
16#include <linux/string.h>
17#include <linux/types.h>
18#include <linux/init.h>
19#include <linux/bootmem.h>
20#include <linux/gfp.h>
21
22#include <asm/setup.h>
23#include <asm/uaccess.h>
24#include <asm/page.h>
25#include <asm/pgalloc.h>
26#include <asm/system.h>
27#include <asm/machdep.h>
28#include <asm/io.h>
29#ifdef CONFIG_ATARI
30#include <asm/atari_stram.h>
31#endif
32#include <asm/sections.h>
33#include <asm/tlb.h>
34
35DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
36
37pg_data_t pg_data_map[MAX_NUMNODES];
38EXPORT_SYMBOL(pg_data_map);
39
40int m68k_virt_to_node_shift;
41
42#ifndef CONFIG_SINGLE_MEMORY_CHUNK
43pg_data_t *pg_data_table[65];
44EXPORT_SYMBOL(pg_data_table);
45#endif
46
47void __init m68k_setup_node(int node)
48{
49#ifndef CONFIG_SINGLE_MEMORY_CHUNK
50 struct mem_info *info = m68k_memory + node;
51 int i, end;
52
53 i = (unsigned long)phys_to_virt(info->addr) >> __virt_to_node_shift();
54 end = (unsigned long)phys_to_virt(info->addr + info->size - 1) >> __virt_to_node_shift();
55 for (; i <= end; i++) {
56 if (pg_data_table[i])
57 printk("overlap at %u for chunk %u\n", i, node);
58 pg_data_table[i] = pg_data_map + node;
59 }
60#endif
61 pg_data_map[node].bdata = bootmem_node_data + node;
62 node_set_online(node);
63}
64
65
66/*
67 * ZERO_PAGE is a special page that is used for zero-initialized
68 * data and COW.
69 */
70
71void *empty_zero_page;
72EXPORT_SYMBOL(empty_zero_page);
73
74extern void init_pointer_table(unsigned long ptable);
75
76/* References to section boundaries */
77
78extern pmd_t *zero_pgtable;
79
80void __init mem_init(void)
81{
82 pg_data_t *pgdat;
83 int codepages = 0;
84 int datapages = 0;
85 int initpages = 0;
86 int i;
87
88#ifdef CONFIG_ATARI
89 if (MACH_IS_ATARI)
90 atari_stram_mem_init_hook();
91#endif
92
93 /* this will put all memory onto the freelists */
94 totalram_pages = num_physpages = 0;
95 for_each_online_pgdat(pgdat) {
96 num_physpages += pgdat->node_present_pages;
97
98 totalram_pages += free_all_bootmem_node(pgdat);
99 for (i = 0; i < pgdat->node_spanned_pages; i++) {
100 struct page *page = pgdat->node_mem_map + i;
101 char *addr = page_to_virt(page);
102
103 if (!PageReserved(page))
104 continue;
105 if (addr >= _text &&
106 addr < _etext)
107 codepages++;
108 else if (addr >= __init_begin &&
109 addr < __init_end)
110 initpages++;
111 else
112 datapages++;
113 }
114 }
115
116#ifndef CONFIG_SUN3
117 /* insert pointer tables allocated so far into the tablelist */
118 init_pointer_table((unsigned long)kernel_pg_dir);
119 for (i = 0; i < PTRS_PER_PGD; i++) {
120 if (pgd_present(kernel_pg_dir[i]))
121 init_pointer_table(__pgd_page(kernel_pg_dir[i]));
122 }
123
124 /* insert also pointer table that we used to unmap the zero page */
125 if (zero_pgtable)
126 init_pointer_table((unsigned long)zero_pgtable);
127#endif
128
129 printk("Memory: %luk/%luk available (%dk kernel code, %dk data, %dk init)\n",
130 nr_free_pages() << (PAGE_SHIFT-10),
131 totalram_pages << (PAGE_SHIFT-10),
132 codepages << (PAGE_SHIFT-10),
133 datapages << (PAGE_SHIFT-10),
134 initpages << (PAGE_SHIFT-10));
135}
136
137#ifdef CONFIG_BLK_DEV_INITRD
138void free_initrd_mem(unsigned long start, unsigned long end)
139{
140 int pages = 0;
141 for (; start < end; start += PAGE_SIZE) {
142 ClearPageReserved(virt_to_page(start));
143 init_page_count(virt_to_page(start));
144 free_page(start);
145 totalram_pages++;
146 pages++;
147 }
148 printk ("Freeing initrd memory: %dk freed\n", pages);
149}
150#endif 5#endif
diff --git a/arch/m68k/mm/init_mm.c b/arch/m68k/mm/init_mm.c
new file mode 100644
index 000000000000..8bc842554e5b
--- /dev/null
+++ b/arch/m68k/mm/init_mm.c
@@ -0,0 +1,150 @@
1/*
2 * linux/arch/m68k/mm/init.c
3 *
4 * Copyright (C) 1995 Hamish Macdonald
5 *
6 * Contains common initialization routines, specific init code moved
7 * to motorola.c and sun3mmu.c
8 */
9
10#include <linux/module.h>
11#include <linux/signal.h>
12#include <linux/sched.h>
13#include <linux/mm.h>
14#include <linux/swap.h>
15#include <linux/kernel.h>
16#include <linux/string.h>
17#include <linux/types.h>
18#include <linux/init.h>
19#include <linux/bootmem.h>
20#include <linux/gfp.h>
21
22#include <asm/setup.h>
23#include <asm/uaccess.h>
24#include <asm/page.h>
25#include <asm/pgalloc.h>
26#include <asm/system.h>
27#include <asm/machdep.h>
28#include <asm/io.h>
29#ifdef CONFIG_ATARI
30#include <asm/atari_stram.h>
31#endif
32#include <asm/sections.h>
33#include <asm/tlb.h>
34
35DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
36
37pg_data_t pg_data_map[MAX_NUMNODES];
38EXPORT_SYMBOL(pg_data_map);
39
40int m68k_virt_to_node_shift;
41
42#ifndef CONFIG_SINGLE_MEMORY_CHUNK
43pg_data_t *pg_data_table[65];
44EXPORT_SYMBOL(pg_data_table);
45#endif
46
47void __init m68k_setup_node(int node)
48{
49#ifndef CONFIG_SINGLE_MEMORY_CHUNK
50 struct mem_info *info = m68k_memory + node;
51 int i, end;
52
53 i = (unsigned long)phys_to_virt(info->addr) >> __virt_to_node_shift();
54 end = (unsigned long)phys_to_virt(info->addr + info->size - 1) >> __virt_to_node_shift();
55 for (; i <= end; i++) {
56 if (pg_data_table[i])
57 printk("overlap at %u for chunk %u\n", i, node);
58 pg_data_table[i] = pg_data_map + node;
59 }
60#endif
61 pg_data_map[node].bdata = bootmem_node_data + node;
62 node_set_online(node);
63}
64
65
66/*
67 * ZERO_PAGE is a special page that is used for zero-initialized
68 * data and COW.
69 */
70
71void *empty_zero_page;
72EXPORT_SYMBOL(empty_zero_page);
73
74extern void init_pointer_table(unsigned long ptable);
75
76/* References to section boundaries */
77
78extern pmd_t *zero_pgtable;
79
80void __init mem_init(void)
81{
82 pg_data_t *pgdat;
83 int codepages = 0;
84 int datapages = 0;
85 int initpages = 0;
86 int i;
87
88#ifdef CONFIG_ATARI
89 if (MACH_IS_ATARI)
90 atari_stram_mem_init_hook();
91#endif
92
93 /* this will put all memory onto the freelists */
94 totalram_pages = num_physpages = 0;
95 for_each_online_pgdat(pgdat) {
96 num_physpages += pgdat->node_present_pages;
97
98 totalram_pages += free_all_bootmem_node(pgdat);
99 for (i = 0; i < pgdat->node_spanned_pages; i++) {
100 struct page *page = pgdat->node_mem_map + i;
101 char *addr = page_to_virt(page);
102
103 if (!PageReserved(page))
104 continue;
105 if (addr >= _text &&
106 addr < _etext)
107 codepages++;
108 else if (addr >= __init_begin &&
109 addr < __init_end)
110 initpages++;
111 else
112 datapages++;
113 }
114 }
115
116#ifndef CONFIG_SUN3
117 /* insert pointer tables allocated so far into the tablelist */
118 init_pointer_table((unsigned long)kernel_pg_dir);
119 for (i = 0; i < PTRS_PER_PGD; i++) {
120 if (pgd_present(kernel_pg_dir[i]))
121 init_pointer_table(__pgd_page(kernel_pg_dir[i]));
122 }
123
124 /* insert also pointer table that we used to unmap the zero page */
125 if (zero_pgtable)
126 init_pointer_table((unsigned long)zero_pgtable);
127#endif
128
129 printk("Memory: %luk/%luk available (%dk kernel code, %dk data, %dk init)\n",
130 nr_free_pages() << (PAGE_SHIFT-10),
131 totalram_pages << (PAGE_SHIFT-10),
132 codepages << (PAGE_SHIFT-10),
133 datapages << (PAGE_SHIFT-10),
134 initpages << (PAGE_SHIFT-10));
135}
136
137#ifdef CONFIG_BLK_DEV_INITRD
138void free_initrd_mem(unsigned long start, unsigned long end)
139{
140 int pages = 0;
141 for (; start < end; start += PAGE_SIZE) {
142 ClearPageReserved(virt_to_page(start));
143 init_page_count(virt_to_page(start));
144 free_page(start);
145 totalram_pages++;
146 pages++;
147 }
148 printk ("Freeing initrd memory: %dk freed\n", pages);
149}
150#endif
diff --git a/arch/m68knommu/mm/init.c b/arch/m68k/mm/init_no.c
index 8a6653f56bd8..8a6653f56bd8 100644
--- a/arch/m68knommu/mm/init.c
+++ b/arch/m68k/mm/init_no.c
diff --git a/arch/m68k/mm/kmap.c b/arch/m68k/mm/kmap.c
index 69345849454b..a373d136b2b2 100644
--- a/arch/m68k/mm/kmap.c
+++ b/arch/m68k/mm/kmap.c
@@ -1,367 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * linux/arch/m68k/mm/kmap.c 2#include "kmap_mm.c"
3 *
4 * Copyright (C) 1997 Roman Hodek
5 *
6 * 10/01/99 cleaned up the code and changing to the same interface
7 * used by other architectures /Roman Zippel
8 */
9
10#include <linux/module.h>
11#include <linux/mm.h>
12#include <linux/kernel.h>
13#include <linux/string.h>
14#include <linux/types.h>
15#include <linux/slab.h>
16#include <linux/vmalloc.h>
17
18#include <asm/setup.h>
19#include <asm/segment.h>
20#include <asm/page.h>
21#include <asm/pgalloc.h>
22#include <asm/io.h>
23#include <asm/system.h>
24
25#undef DEBUG
26
27#define PTRTREESIZE (256*1024)
28
29/*
30 * For 040/060 we can use the virtual memory area like other architectures,
31 * but for 020/030 we want to use early termination page descriptor and we
32 * can't mix this with normal page descriptors, so we have to copy that code
33 * (mm/vmalloc.c) and return appriorate aligned addresses.
34 */
35
36#ifdef CPU_M68040_OR_M68060_ONLY
37
38#define IO_SIZE PAGE_SIZE
39
40static inline struct vm_struct *get_io_area(unsigned long size)
41{
42 return get_vm_area(size, VM_IOREMAP);
43}
44
45
46static inline void free_io_area(void *addr)
47{
48 vfree((void *)(PAGE_MASK & (unsigned long)addr));
49}
50
51#else 3#else
52 4#include "kmap_no.c"
53#define IO_SIZE (256*1024)
54
55static struct vm_struct *iolist;
56
57static struct vm_struct *get_io_area(unsigned long size)
58{
59 unsigned long addr;
60 struct vm_struct **p, *tmp, *area;
61
62 area = kmalloc(sizeof(*area), GFP_KERNEL);
63 if (!area)
64 return NULL;
65 addr = KMAP_START;
66 for (p = &iolist; (tmp = *p) ; p = &tmp->next) {
67 if (size + addr < (unsigned long)tmp->addr)
68 break;
69 if (addr > KMAP_END-size) {
70 kfree(area);
71 return NULL;
72 }
73 addr = tmp->size + (unsigned long)tmp->addr;
74 }
75 area->addr = (void *)addr;
76 area->size = size + IO_SIZE;
77 area->next = *p;
78 *p = area;
79 return area;
80}
81
82static inline void free_io_area(void *addr)
83{
84 struct vm_struct **p, *tmp;
85
86 if (!addr)
87 return;
88 addr = (void *)((unsigned long)addr & -IO_SIZE);
89 for (p = &iolist ; (tmp = *p) ; p = &tmp->next) {
90 if (tmp->addr == addr) {
91 *p = tmp->next;
92 __iounmap(tmp->addr, tmp->size);
93 kfree(tmp);
94 return;
95 }
96 }
97}
98
99#endif 5#endif
100
101/*
102 * Map some physical address range into the kernel address space.
103 */
104/* Rewritten by Andreas Schwab to remove all races. */
105
106void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag)
107{
108 struct vm_struct *area;
109 unsigned long virtaddr, retaddr;
110 long offset;
111 pgd_t *pgd_dir;
112 pmd_t *pmd_dir;
113 pte_t *pte_dir;
114
115 /*
116 * Don't allow mappings that wrap..
117 */
118 if (!size || physaddr > (unsigned long)(-size))
119 return NULL;
120
121#ifdef CONFIG_AMIGA
122 if (MACH_IS_AMIGA) {
123 if ((physaddr >= 0x40000000) && (physaddr + size < 0x60000000)
124 && (cacheflag == IOMAP_NOCACHE_SER))
125 return (void __iomem *)physaddr;
126 }
127#endif
128
129#ifdef DEBUG
130 printk("ioremap: 0x%lx,0x%lx(%d) - ", physaddr, size, cacheflag);
131#endif
132 /*
133 * Mappings have to be aligned
134 */
135 offset = physaddr & (IO_SIZE - 1);
136 physaddr &= -IO_SIZE;
137 size = (size + offset + IO_SIZE - 1) & -IO_SIZE;
138
139 /*
140 * Ok, go for it..
141 */
142 area = get_io_area(size);
143 if (!area)
144 return NULL;
145
146 virtaddr = (unsigned long)area->addr;
147 retaddr = virtaddr + offset;
148#ifdef DEBUG
149 printk("0x%lx,0x%lx,0x%lx", physaddr, virtaddr, retaddr);
150#endif
151
152 /*
153 * add cache and table flags to physical address
154 */
155 if (CPU_IS_040_OR_060) {
156 physaddr |= (_PAGE_PRESENT | _PAGE_GLOBAL040 |
157 _PAGE_ACCESSED | _PAGE_DIRTY);
158 switch (cacheflag) {
159 case IOMAP_FULL_CACHING:
160 physaddr |= _PAGE_CACHE040;
161 break;
162 case IOMAP_NOCACHE_SER:
163 default:
164 physaddr |= _PAGE_NOCACHE_S;
165 break;
166 case IOMAP_NOCACHE_NONSER:
167 physaddr |= _PAGE_NOCACHE;
168 break;
169 case IOMAP_WRITETHROUGH:
170 physaddr |= _PAGE_CACHE040W;
171 break;
172 }
173 } else {
174 physaddr |= (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
175 switch (cacheflag) {
176 case IOMAP_NOCACHE_SER:
177 case IOMAP_NOCACHE_NONSER:
178 default:
179 physaddr |= _PAGE_NOCACHE030;
180 break;
181 case IOMAP_FULL_CACHING:
182 case IOMAP_WRITETHROUGH:
183 break;
184 }
185 }
186
187 while ((long)size > 0) {
188#ifdef DEBUG
189 if (!(virtaddr & (PTRTREESIZE-1)))
190 printk ("\npa=%#lx va=%#lx ", physaddr, virtaddr);
191#endif
192 pgd_dir = pgd_offset_k(virtaddr);
193 pmd_dir = pmd_alloc(&init_mm, pgd_dir, virtaddr);
194 if (!pmd_dir) {
195 printk("ioremap: no mem for pmd_dir\n");
196 return NULL;
197 }
198
199 if (CPU_IS_020_OR_030) {
200 pmd_dir->pmd[(virtaddr/PTRTREESIZE) & 15] = physaddr;
201 physaddr += PTRTREESIZE;
202 virtaddr += PTRTREESIZE;
203 size -= PTRTREESIZE;
204 } else {
205 pte_dir = pte_alloc_kernel(pmd_dir, virtaddr);
206 if (!pte_dir) {
207 printk("ioremap: no mem for pte_dir\n");
208 return NULL;
209 }
210
211 pte_val(*pte_dir) = physaddr;
212 virtaddr += PAGE_SIZE;
213 physaddr += PAGE_SIZE;
214 size -= PAGE_SIZE;
215 }
216 }
217#ifdef DEBUG
218 printk("\n");
219#endif
220 flush_tlb_all();
221
222 return (void __iomem *)retaddr;
223}
224EXPORT_SYMBOL(__ioremap);
225
226/*
227 * Unmap a ioremap()ed region again
228 */
229void iounmap(void __iomem *addr)
230{
231#ifdef CONFIG_AMIGA
232 if ((!MACH_IS_AMIGA) ||
233 (((unsigned long)addr < 0x40000000) ||
234 ((unsigned long)addr > 0x60000000)))
235 free_io_area((__force void *)addr);
236#else
237 free_io_area((__force void *)addr);
238#endif
239}
240EXPORT_SYMBOL(iounmap);
241
242/*
243 * __iounmap unmaps nearly everything, so be careful
244 * it doesn't free currently pointer/page tables anymore but it
245 * wans't used anyway and might be added later.
246 */
247void __iounmap(void *addr, unsigned long size)
248{
249 unsigned long virtaddr = (unsigned long)addr;
250 pgd_t *pgd_dir;
251 pmd_t *pmd_dir;
252 pte_t *pte_dir;
253
254 while ((long)size > 0) {
255 pgd_dir = pgd_offset_k(virtaddr);
256 if (pgd_bad(*pgd_dir)) {
257 printk("iounmap: bad pgd(%08lx)\n", pgd_val(*pgd_dir));
258 pgd_clear(pgd_dir);
259 return;
260 }
261 pmd_dir = pmd_offset(pgd_dir, virtaddr);
262
263 if (CPU_IS_020_OR_030) {
264 int pmd_off = (virtaddr/PTRTREESIZE) & 15;
265 int pmd_type = pmd_dir->pmd[pmd_off] & _DESCTYPE_MASK;
266
267 if (pmd_type == _PAGE_PRESENT) {
268 pmd_dir->pmd[pmd_off] = 0;
269 virtaddr += PTRTREESIZE;
270 size -= PTRTREESIZE;
271 continue;
272 } else if (pmd_type == 0)
273 continue;
274 }
275
276 if (pmd_bad(*pmd_dir)) {
277 printk("iounmap: bad pmd (%08lx)\n", pmd_val(*pmd_dir));
278 pmd_clear(pmd_dir);
279 return;
280 }
281 pte_dir = pte_offset_kernel(pmd_dir, virtaddr);
282
283 pte_val(*pte_dir) = 0;
284 virtaddr += PAGE_SIZE;
285 size -= PAGE_SIZE;
286 }
287
288 flush_tlb_all();
289}
290
291/*
292 * Set new cache mode for some kernel address space.
293 * The caller must push data for that range itself, if such data may already
294 * be in the cache.
295 */
296void kernel_set_cachemode(void *addr, unsigned long size, int cmode)
297{
298 unsigned long virtaddr = (unsigned long)addr;
299 pgd_t *pgd_dir;
300 pmd_t *pmd_dir;
301 pte_t *pte_dir;
302
303 if (CPU_IS_040_OR_060) {
304 switch (cmode) {
305 case IOMAP_FULL_CACHING:
306 cmode = _PAGE_CACHE040;
307 break;
308 case IOMAP_NOCACHE_SER:
309 default:
310 cmode = _PAGE_NOCACHE_S;
311 break;
312 case IOMAP_NOCACHE_NONSER:
313 cmode = _PAGE_NOCACHE;
314 break;
315 case IOMAP_WRITETHROUGH:
316 cmode = _PAGE_CACHE040W;
317 break;
318 }
319 } else {
320 switch (cmode) {
321 case IOMAP_NOCACHE_SER:
322 case IOMAP_NOCACHE_NONSER:
323 default:
324 cmode = _PAGE_NOCACHE030;
325 break;
326 case IOMAP_FULL_CACHING:
327 case IOMAP_WRITETHROUGH:
328 cmode = 0;
329 }
330 }
331
332 while ((long)size > 0) {
333 pgd_dir = pgd_offset_k(virtaddr);
334 if (pgd_bad(*pgd_dir)) {
335 printk("iocachemode: bad pgd(%08lx)\n", pgd_val(*pgd_dir));
336 pgd_clear(pgd_dir);
337 return;
338 }
339 pmd_dir = pmd_offset(pgd_dir, virtaddr);
340
341 if (CPU_IS_020_OR_030) {
342 int pmd_off = (virtaddr/PTRTREESIZE) & 15;
343
344 if ((pmd_dir->pmd[pmd_off] & _DESCTYPE_MASK) == _PAGE_PRESENT) {
345 pmd_dir->pmd[pmd_off] = (pmd_dir->pmd[pmd_off] &
346 _CACHEMASK040) | cmode;
347 virtaddr += PTRTREESIZE;
348 size -= PTRTREESIZE;
349 continue;
350 }
351 }
352
353 if (pmd_bad(*pmd_dir)) {
354 printk("iocachemode: bad pmd (%08lx)\n", pmd_val(*pmd_dir));
355 pmd_clear(pmd_dir);
356 return;
357 }
358 pte_dir = pte_offset_kernel(pmd_dir, virtaddr);
359
360 pte_val(*pte_dir) = (pte_val(*pte_dir) & _CACHEMASK040) | cmode;
361 virtaddr += PAGE_SIZE;
362 size -= PAGE_SIZE;
363 }
364
365 flush_tlb_all();
366}
367EXPORT_SYMBOL(kernel_set_cachemode);
diff --git a/arch/m68k/mm/kmap_mm.c b/arch/m68k/mm/kmap_mm.c
new file mode 100644
index 000000000000..69345849454b
--- /dev/null
+++ b/arch/m68k/mm/kmap_mm.c
@@ -0,0 +1,367 @@
1/*
2 * linux/arch/m68k/mm/kmap.c
3 *
4 * Copyright (C) 1997 Roman Hodek
5 *
6 * 10/01/99 cleaned up the code and changing to the same interface
7 * used by other architectures /Roman Zippel
8 */
9
10#include <linux/module.h>
11#include <linux/mm.h>
12#include <linux/kernel.h>
13#include <linux/string.h>
14#include <linux/types.h>
15#include <linux/slab.h>
16#include <linux/vmalloc.h>
17
18#include <asm/setup.h>
19#include <asm/segment.h>
20#include <asm/page.h>
21#include <asm/pgalloc.h>
22#include <asm/io.h>
23#include <asm/system.h>
24
25#undef DEBUG
26
27#define PTRTREESIZE (256*1024)
28
29/*
30 * For 040/060 we can use the virtual memory area like other architectures,
31 * but for 020/030 we want to use early termination page descriptor and we
32 * can't mix this with normal page descriptors, so we have to copy that code
33 * (mm/vmalloc.c) and return appriorate aligned addresses.
34 */
35
36#ifdef CPU_M68040_OR_M68060_ONLY
37
38#define IO_SIZE PAGE_SIZE
39
40static inline struct vm_struct *get_io_area(unsigned long size)
41{
42 return get_vm_area(size, VM_IOREMAP);
43}
44
45
46static inline void free_io_area(void *addr)
47{
48 vfree((void *)(PAGE_MASK & (unsigned long)addr));
49}
50
51#else
52
53#define IO_SIZE (256*1024)
54
55static struct vm_struct *iolist;
56
57static struct vm_struct *get_io_area(unsigned long size)
58{
59 unsigned long addr;
60 struct vm_struct **p, *tmp, *area;
61
62 area = kmalloc(sizeof(*area), GFP_KERNEL);
63 if (!area)
64 return NULL;
65 addr = KMAP_START;
66 for (p = &iolist; (tmp = *p) ; p = &tmp->next) {
67 if (size + addr < (unsigned long)tmp->addr)
68 break;
69 if (addr > KMAP_END-size) {
70 kfree(area);
71 return NULL;
72 }
73 addr = tmp->size + (unsigned long)tmp->addr;
74 }
75 area->addr = (void *)addr;
76 area->size = size + IO_SIZE;
77 area->next = *p;
78 *p = area;
79 return area;
80}
81
82static inline void free_io_area(void *addr)
83{
84 struct vm_struct **p, *tmp;
85
86 if (!addr)
87 return;
88 addr = (void *)((unsigned long)addr & -IO_SIZE);
89 for (p = &iolist ; (tmp = *p) ; p = &tmp->next) {
90 if (tmp->addr == addr) {
91 *p = tmp->next;
92 __iounmap(tmp->addr, tmp->size);
93 kfree(tmp);
94 return;
95 }
96 }
97}
98
99#endif
100
101/*
102 * Map some physical address range into the kernel address space.
103 */
104/* Rewritten by Andreas Schwab to remove all races. */
105
106void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag)
107{
108 struct vm_struct *area;
109 unsigned long virtaddr, retaddr;
110 long offset;
111 pgd_t *pgd_dir;
112 pmd_t *pmd_dir;
113 pte_t *pte_dir;
114
115 /*
116 * Don't allow mappings that wrap..
117 */
118 if (!size || physaddr > (unsigned long)(-size))
119 return NULL;
120
121#ifdef CONFIG_AMIGA
122 if (MACH_IS_AMIGA) {
123 if ((physaddr >= 0x40000000) && (physaddr + size < 0x60000000)
124 && (cacheflag == IOMAP_NOCACHE_SER))
125 return (void __iomem *)physaddr;
126 }
127#endif
128
129#ifdef DEBUG
130 printk("ioremap: 0x%lx,0x%lx(%d) - ", physaddr, size, cacheflag);
131#endif
132 /*
133 * Mappings have to be aligned
134 */
135 offset = physaddr & (IO_SIZE - 1);
136 physaddr &= -IO_SIZE;
137 size = (size + offset + IO_SIZE - 1) & -IO_SIZE;
138
139 /*
140 * Ok, go for it..
141 */
142 area = get_io_area(size);
143 if (!area)
144 return NULL;
145
146 virtaddr = (unsigned long)area->addr;
147 retaddr = virtaddr + offset;
148#ifdef DEBUG
149 printk("0x%lx,0x%lx,0x%lx", physaddr, virtaddr, retaddr);
150#endif
151
152 /*
153 * add cache and table flags to physical address
154 */
155 if (CPU_IS_040_OR_060) {
156 physaddr |= (_PAGE_PRESENT | _PAGE_GLOBAL040 |
157 _PAGE_ACCESSED | _PAGE_DIRTY);
158 switch (cacheflag) {
159 case IOMAP_FULL_CACHING:
160 physaddr |= _PAGE_CACHE040;
161 break;
162 case IOMAP_NOCACHE_SER:
163 default:
164 physaddr |= _PAGE_NOCACHE_S;
165 break;
166 case IOMAP_NOCACHE_NONSER:
167 physaddr |= _PAGE_NOCACHE;
168 break;
169 case IOMAP_WRITETHROUGH:
170 physaddr |= _PAGE_CACHE040W;
171 break;
172 }
173 } else {
174 physaddr |= (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
175 switch (cacheflag) {
176 case IOMAP_NOCACHE_SER:
177 case IOMAP_NOCACHE_NONSER:
178 default:
179 physaddr |= _PAGE_NOCACHE030;
180 break;
181 case IOMAP_FULL_CACHING:
182 case IOMAP_WRITETHROUGH:
183 break;
184 }
185 }
186
187 while ((long)size > 0) {
188#ifdef DEBUG
189 if (!(virtaddr & (PTRTREESIZE-1)))
190 printk ("\npa=%#lx va=%#lx ", physaddr, virtaddr);
191#endif
192 pgd_dir = pgd_offset_k(virtaddr);
193 pmd_dir = pmd_alloc(&init_mm, pgd_dir, virtaddr);
194 if (!pmd_dir) {
195 printk("ioremap: no mem for pmd_dir\n");
196 return NULL;
197 }
198
199 if (CPU_IS_020_OR_030) {
200 pmd_dir->pmd[(virtaddr/PTRTREESIZE) & 15] = physaddr;
201 physaddr += PTRTREESIZE;
202 virtaddr += PTRTREESIZE;
203 size -= PTRTREESIZE;
204 } else {
205 pte_dir = pte_alloc_kernel(pmd_dir, virtaddr);
206 if (!pte_dir) {
207 printk("ioremap: no mem for pte_dir\n");
208 return NULL;
209 }
210
211 pte_val(*pte_dir) = physaddr;
212 virtaddr += PAGE_SIZE;
213 physaddr += PAGE_SIZE;
214 size -= PAGE_SIZE;
215 }
216 }
217#ifdef DEBUG
218 printk("\n");
219#endif
220 flush_tlb_all();
221
222 return (void __iomem *)retaddr;
223}
224EXPORT_SYMBOL(__ioremap);
225
226/*
227 * Unmap a ioremap()ed region again
228 */
229void iounmap(void __iomem *addr)
230{
231#ifdef CONFIG_AMIGA
232 if ((!MACH_IS_AMIGA) ||
233 (((unsigned long)addr < 0x40000000) ||
234 ((unsigned long)addr > 0x60000000)))
235 free_io_area((__force void *)addr);
236#else
237 free_io_area((__force void *)addr);
238#endif
239}
240EXPORT_SYMBOL(iounmap);
241
242/*
243 * __iounmap unmaps nearly everything, so be careful
244 * it doesn't free currently pointer/page tables anymore but it
245 * wans't used anyway and might be added later.
246 */
247void __iounmap(void *addr, unsigned long size)
248{
249 unsigned long virtaddr = (unsigned long)addr;
250 pgd_t *pgd_dir;
251 pmd_t *pmd_dir;
252 pte_t *pte_dir;
253
254 while ((long)size > 0) {
255 pgd_dir = pgd_offset_k(virtaddr);
256 if (pgd_bad(*pgd_dir)) {
257 printk("iounmap: bad pgd(%08lx)\n", pgd_val(*pgd_dir));
258 pgd_clear(pgd_dir);
259 return;
260 }
261 pmd_dir = pmd_offset(pgd_dir, virtaddr);
262
263 if (CPU_IS_020_OR_030) {
264 int pmd_off = (virtaddr/PTRTREESIZE) & 15;
265 int pmd_type = pmd_dir->pmd[pmd_off] & _DESCTYPE_MASK;
266
267 if (pmd_type == _PAGE_PRESENT) {
268 pmd_dir->pmd[pmd_off] = 0;
269 virtaddr += PTRTREESIZE;
270 size -= PTRTREESIZE;
271 continue;
272 } else if (pmd_type == 0)
273 continue;
274 }
275
276 if (pmd_bad(*pmd_dir)) {
277 printk("iounmap: bad pmd (%08lx)\n", pmd_val(*pmd_dir));
278 pmd_clear(pmd_dir);
279 return;
280 }
281 pte_dir = pte_offset_kernel(pmd_dir, virtaddr);
282
283 pte_val(*pte_dir) = 0;
284 virtaddr += PAGE_SIZE;
285 size -= PAGE_SIZE;
286 }
287
288 flush_tlb_all();
289}
290
291/*
292 * Set new cache mode for some kernel address space.
293 * The caller must push data for that range itself, if such data may already
294 * be in the cache.
295 */
296void kernel_set_cachemode(void *addr, unsigned long size, int cmode)
297{
298 unsigned long virtaddr = (unsigned long)addr;
299 pgd_t *pgd_dir;
300 pmd_t *pmd_dir;
301 pte_t *pte_dir;
302
303 if (CPU_IS_040_OR_060) {
304 switch (cmode) {
305 case IOMAP_FULL_CACHING:
306 cmode = _PAGE_CACHE040;
307 break;
308 case IOMAP_NOCACHE_SER:
309 default:
310 cmode = _PAGE_NOCACHE_S;
311 break;
312 case IOMAP_NOCACHE_NONSER:
313 cmode = _PAGE_NOCACHE;
314 break;
315 case IOMAP_WRITETHROUGH:
316 cmode = _PAGE_CACHE040W;
317 break;
318 }
319 } else {
320 switch (cmode) {
321 case IOMAP_NOCACHE_SER:
322 case IOMAP_NOCACHE_NONSER:
323 default:
324 cmode = _PAGE_NOCACHE030;
325 break;
326 case IOMAP_FULL_CACHING:
327 case IOMAP_WRITETHROUGH:
328 cmode = 0;
329 }
330 }
331
332 while ((long)size > 0) {
333 pgd_dir = pgd_offset_k(virtaddr);
334 if (pgd_bad(*pgd_dir)) {
335 printk("iocachemode: bad pgd(%08lx)\n", pgd_val(*pgd_dir));
336 pgd_clear(pgd_dir);
337 return;
338 }
339 pmd_dir = pmd_offset(pgd_dir, virtaddr);
340
341 if (CPU_IS_020_OR_030) {
342 int pmd_off = (virtaddr/PTRTREESIZE) & 15;
343
344 if ((pmd_dir->pmd[pmd_off] & _DESCTYPE_MASK) == _PAGE_PRESENT) {
345 pmd_dir->pmd[pmd_off] = (pmd_dir->pmd[pmd_off] &
346 _CACHEMASK040) | cmode;
347 virtaddr += PTRTREESIZE;
348 size -= PTRTREESIZE;
349 continue;
350 }
351 }
352
353 if (pmd_bad(*pmd_dir)) {
354 printk("iocachemode: bad pmd (%08lx)\n", pmd_val(*pmd_dir));
355 pmd_clear(pmd_dir);
356 return;
357 }
358 pte_dir = pte_offset_kernel(pmd_dir, virtaddr);
359
360 pte_val(*pte_dir) = (pte_val(*pte_dir) & _CACHEMASK040) | cmode;
361 virtaddr += PAGE_SIZE;
362 size -= PAGE_SIZE;
363 }
364
365 flush_tlb_all();
366}
367EXPORT_SYMBOL(kernel_set_cachemode);
diff --git a/arch/m68knommu/mm/kmap.c b/arch/m68k/mm/kmap_no.c
index ece8d5ad4e6c..ece8d5ad4e6c 100644
--- a/arch/m68knommu/mm/kmap.c
+++ b/arch/m68k/mm/kmap_no.c
diff --git a/arch/m68knommu/platform/5206/Makefile b/arch/m68k/platform/5206/Makefile
index b5db05625cfa..b5db05625cfa 100644
--- a/arch/m68knommu/platform/5206/Makefile
+++ b/arch/m68k/platform/5206/Makefile
diff --git a/arch/m68knommu/platform/5206/config.c b/arch/m68k/platform/5206/config.c
index 9c335465e66d..9c335465e66d 100644
--- a/arch/m68knommu/platform/5206/config.c
+++ b/arch/m68k/platform/5206/config.c
diff --git a/arch/m68knommu/platform/5206/gpio.c b/arch/m68k/platform/5206/gpio.c
index b9ab4a120f28..b9ab4a120f28 100644
--- a/arch/m68knommu/platform/5206/gpio.c
+++ b/arch/m68k/platform/5206/gpio.c
diff --git a/arch/m68knommu/platform/5206e/Makefile b/arch/m68k/platform/5206e/Makefile
index b5db05625cfa..b5db05625cfa 100644
--- a/arch/m68knommu/platform/5206e/Makefile
+++ b/arch/m68k/platform/5206e/Makefile
diff --git a/arch/m68knommu/platform/5206e/config.c b/arch/m68k/platform/5206e/config.c
index 942397984c66..942397984c66 100644
--- a/arch/m68knommu/platform/5206e/config.c
+++ b/arch/m68k/platform/5206e/config.c
diff --git a/arch/m68knommu/platform/5206e/gpio.c b/arch/m68k/platform/5206e/gpio.c
index b9ab4a120f28..b9ab4a120f28 100644
--- a/arch/m68knommu/platform/5206e/gpio.c
+++ b/arch/m68k/platform/5206e/gpio.c
diff --git a/arch/m68knommu/platform/520x/Makefile b/arch/m68k/platform/520x/Makefile
index ad3f4e5a57ce..ad3f4e5a57ce 100644
--- a/arch/m68knommu/platform/520x/Makefile
+++ b/arch/m68k/platform/520x/Makefile
diff --git a/arch/m68knommu/platform/520x/config.c b/arch/m68k/platform/520x/config.c
index 621238f1a219..621238f1a219 100644
--- a/arch/m68knommu/platform/520x/config.c
+++ b/arch/m68k/platform/520x/config.c
diff --git a/arch/m68knommu/platform/520x/gpio.c b/arch/m68k/platform/520x/gpio.c
index d757328563d1..d757328563d1 100644
--- a/arch/m68knommu/platform/520x/gpio.c
+++ b/arch/m68k/platform/520x/gpio.c
diff --git a/arch/m68knommu/platform/523x/Makefile b/arch/m68k/platform/523x/Makefile
index c04b8f71c88c..c04b8f71c88c 100644
--- a/arch/m68knommu/platform/523x/Makefile
+++ b/arch/m68k/platform/523x/Makefile
diff --git a/arch/m68knommu/platform/523x/config.c b/arch/m68k/platform/523x/config.c
index 418a76feb1e3..418a76feb1e3 100644
--- a/arch/m68knommu/platform/523x/config.c
+++ b/arch/m68k/platform/523x/config.c
diff --git a/arch/m68knommu/platform/523x/gpio.c b/arch/m68k/platform/523x/gpio.c
index 327ebf142c8e..327ebf142c8e 100644
--- a/arch/m68knommu/platform/523x/gpio.c
+++ b/arch/m68k/platform/523x/gpio.c
diff --git a/arch/m68knommu/platform/5249/Makefile b/arch/m68k/platform/5249/Makefile
index 4bed30fd0073..4bed30fd0073 100644
--- a/arch/m68knommu/platform/5249/Makefile
+++ b/arch/m68k/platform/5249/Makefile
diff --git a/arch/m68knommu/platform/5249/config.c b/arch/m68k/platform/5249/config.c
index ceb31e5744a6..ceb31e5744a6 100644
--- a/arch/m68knommu/platform/5249/config.c
+++ b/arch/m68k/platform/5249/config.c
diff --git a/arch/m68knommu/platform/5249/gpio.c b/arch/m68k/platform/5249/gpio.c
index 2b56c6ef65bf..2b56c6ef65bf 100644
--- a/arch/m68knommu/platform/5249/gpio.c
+++ b/arch/m68k/platform/5249/gpio.c
diff --git a/arch/m68knommu/platform/5249/intc2.c b/arch/m68k/platform/5249/intc2.c
index 8f4b63e17366..8f4b63e17366 100644
--- a/arch/m68knommu/platform/5249/intc2.c
+++ b/arch/m68k/platform/5249/intc2.c
diff --git a/arch/m68knommu/platform/5272/Makefile b/arch/m68k/platform/5272/Makefile
index 34110fc14301..34110fc14301 100644
--- a/arch/m68knommu/platform/5272/Makefile
+++ b/arch/m68k/platform/5272/Makefile
diff --git a/arch/m68knommu/platform/5272/config.c b/arch/m68k/platform/5272/config.c
index 65bb582734e1..65bb582734e1 100644
--- a/arch/m68knommu/platform/5272/config.c
+++ b/arch/m68k/platform/5272/config.c
diff --git a/arch/m68knommu/platform/5272/gpio.c b/arch/m68k/platform/5272/gpio.c
index 57ac10a5d7f7..57ac10a5d7f7 100644
--- a/arch/m68knommu/platform/5272/gpio.c
+++ b/arch/m68k/platform/5272/gpio.c
diff --git a/arch/m68knommu/platform/5272/intc.c b/arch/m68k/platform/5272/intc.c
index 969ff0a467c6..969ff0a467c6 100644
--- a/arch/m68knommu/platform/5272/intc.c
+++ b/arch/m68k/platform/5272/intc.c
diff --git a/arch/m68knommu/platform/527x/Makefile b/arch/m68k/platform/527x/Makefile
index 6ac4b57370ea..6ac4b57370ea 100644
--- a/arch/m68knommu/platform/527x/Makefile
+++ b/arch/m68k/platform/527x/Makefile
diff --git a/arch/m68knommu/platform/527x/config.c b/arch/m68k/platform/527x/config.c
index fa359593b613..fa359593b613 100644
--- a/arch/m68knommu/platform/527x/config.c
+++ b/arch/m68k/platform/527x/config.c
diff --git a/arch/m68knommu/platform/527x/gpio.c b/arch/m68k/platform/527x/gpio.c
index 205da0aa0f2d..205da0aa0f2d 100644
--- a/arch/m68knommu/platform/527x/gpio.c
+++ b/arch/m68k/platform/527x/gpio.c
diff --git a/arch/m68knommu/platform/528x/Makefile b/arch/m68k/platform/528x/Makefile
index 6ac4b57370ea..6ac4b57370ea 100644
--- a/arch/m68knommu/platform/528x/Makefile
+++ b/arch/m68k/platform/528x/Makefile
diff --git a/arch/m68knommu/platform/528x/config.c b/arch/m68k/platform/528x/config.c
index ac39fc661219..ac39fc661219 100644
--- a/arch/m68knommu/platform/528x/config.c
+++ b/arch/m68k/platform/528x/config.c
diff --git a/arch/m68knommu/platform/528x/gpio.c b/arch/m68k/platform/528x/gpio.c
index 526db665d87e..526db665d87e 100644
--- a/arch/m68knommu/platform/528x/gpio.c
+++ b/arch/m68k/platform/528x/gpio.c
diff --git a/arch/m68knommu/platform/5307/Makefile b/arch/m68k/platform/5307/Makefile
index d4293b791f2e..d4293b791f2e 100644
--- a/arch/m68knommu/platform/5307/Makefile
+++ b/arch/m68k/platform/5307/Makefile
diff --git a/arch/m68knommu/platform/5307/config.c b/arch/m68k/platform/5307/config.c
index 00900ac06a9c..00900ac06a9c 100644
--- a/arch/m68knommu/platform/5307/config.c
+++ b/arch/m68k/platform/5307/config.c
diff --git a/arch/m68knommu/platform/5307/gpio.c b/arch/m68k/platform/5307/gpio.c
index 5850612b4a38..5850612b4a38 100644
--- a/arch/m68knommu/platform/5307/gpio.c
+++ b/arch/m68k/platform/5307/gpio.c
diff --git a/arch/m68knommu/platform/5307/nettel.c b/arch/m68k/platform/5307/nettel.c
index e925ea4602f8..e925ea4602f8 100644
--- a/arch/m68knommu/platform/5307/nettel.c
+++ b/arch/m68k/platform/5307/nettel.c
diff --git a/arch/m68knommu/platform/532x/Makefile b/arch/m68k/platform/532x/Makefile
index ce01669399c6..ce01669399c6 100644
--- a/arch/m68knommu/platform/532x/Makefile
+++ b/arch/m68k/platform/532x/Makefile
diff --git a/arch/m68knommu/platform/532x/config.c b/arch/m68k/platform/532x/config.c
index ca51323f957b..ca51323f957b 100644
--- a/arch/m68knommu/platform/532x/config.c
+++ b/arch/m68k/platform/532x/config.c
diff --git a/arch/m68knommu/platform/532x/gpio.c b/arch/m68k/platform/532x/gpio.c
index 212a85deac90..212a85deac90 100644
--- a/arch/m68knommu/platform/532x/gpio.c
+++ b/arch/m68k/platform/532x/gpio.c
diff --git a/arch/m68knommu/platform/5407/Makefile b/arch/m68k/platform/5407/Makefile
index e83fe148eddc..e83fe148eddc 100644
--- a/arch/m68knommu/platform/5407/Makefile
+++ b/arch/m68k/platform/5407/Makefile
diff --git a/arch/m68knommu/platform/5407/config.c b/arch/m68k/platform/5407/config.c
index 70ea789a400c..70ea789a400c 100644
--- a/arch/m68knommu/platform/5407/config.c
+++ b/arch/m68k/platform/5407/config.c
diff --git a/arch/m68knommu/platform/5407/gpio.c b/arch/m68k/platform/5407/gpio.c
index 5850612b4a38..5850612b4a38 100644
--- a/arch/m68knommu/platform/5407/gpio.c
+++ b/arch/m68k/platform/5407/gpio.c
diff --git a/arch/m68knommu/platform/54xx/Makefile b/arch/m68k/platform/54xx/Makefile
index 6cfd090ec3cd..6cfd090ec3cd 100644
--- a/arch/m68knommu/platform/54xx/Makefile
+++ b/arch/m68k/platform/54xx/Makefile
diff --git a/arch/m68knommu/platform/54xx/config.c b/arch/m68k/platform/54xx/config.c
index 78130984db95..78130984db95 100644
--- a/arch/m68knommu/platform/54xx/config.c
+++ b/arch/m68k/platform/54xx/config.c
diff --git a/arch/m68knommu/platform/54xx/firebee.c b/arch/m68k/platform/54xx/firebee.c
index 46d50534f981..46d50534f981 100644
--- a/arch/m68knommu/platform/54xx/firebee.c
+++ b/arch/m68k/platform/54xx/firebee.c
diff --git a/arch/m68knommu/platform/68328/Makefile b/arch/m68k/platform/68328/Makefile
index 5e5435552d56..5e5435552d56 100644
--- a/arch/m68knommu/platform/68328/Makefile
+++ b/arch/m68k/platform/68328/Makefile
diff --git a/arch/m68knommu/platform/68328/bootlogo.h b/arch/m68k/platform/68328/bootlogo.h
index 67bc2c17386e..67bc2c17386e 100644
--- a/arch/m68knommu/platform/68328/bootlogo.h
+++ b/arch/m68k/platform/68328/bootlogo.h
diff --git a/arch/m68knommu/platform/68328/bootlogo.pl b/arch/m68k/platform/68328/bootlogo.pl
index b04ae3f50da5..b04ae3f50da5 100644
--- a/arch/m68knommu/platform/68328/bootlogo.pl
+++ b/arch/m68k/platform/68328/bootlogo.pl
diff --git a/arch/m68knommu/platform/68328/config.c b/arch/m68k/platform/68328/config.c
index a7bd21deb00f..a7bd21deb00f 100644
--- a/arch/m68knommu/platform/68328/config.c
+++ b/arch/m68k/platform/68328/config.c
diff --git a/arch/m68knommu/platform/68328/entry.S b/arch/m68k/platform/68328/entry.S
index 676960cf022a..676960cf022a 100644
--- a/arch/m68knommu/platform/68328/entry.S
+++ b/arch/m68k/platform/68328/entry.S
diff --git a/arch/m68knommu/platform/68328/head-de2.S b/arch/m68k/platform/68328/head-de2.S
index f632fdcb93e9..f632fdcb93e9 100644
--- a/arch/m68knommu/platform/68328/head-de2.S
+++ b/arch/m68k/platform/68328/head-de2.S
diff --git a/arch/m68knommu/platform/68328/head-pilot.S b/arch/m68k/platform/68328/head-pilot.S
index aecff532b343..aecff532b343 100644
--- a/arch/m68knommu/platform/68328/head-pilot.S
+++ b/arch/m68k/platform/68328/head-pilot.S
diff --git a/arch/m68knommu/platform/68328/head-ram.S b/arch/m68k/platform/68328/head-ram.S
index 7f1aeeacb219..7f1aeeacb219 100644
--- a/arch/m68knommu/platform/68328/head-ram.S
+++ b/arch/m68k/platform/68328/head-ram.S
diff --git a/arch/m68knommu/platform/68328/head-rom.S b/arch/m68k/platform/68328/head-rom.S
index 6ec77d3ea0b3..6ec77d3ea0b3 100644
--- a/arch/m68knommu/platform/68328/head-rom.S
+++ b/arch/m68k/platform/68328/head-rom.S
diff --git a/arch/m68knommu/platform/68328/ints.c b/arch/m68k/platform/68328/ints.c
index e5631831a200..e5631831a200 100644
--- a/arch/m68knommu/platform/68328/ints.c
+++ b/arch/m68k/platform/68328/ints.c
diff --git a/arch/m68knommu/platform/68328/romvec.S b/arch/m68k/platform/68328/romvec.S
index 31084466eae8..31084466eae8 100644
--- a/arch/m68knommu/platform/68328/romvec.S
+++ b/arch/m68k/platform/68328/romvec.S
diff --git a/arch/m68knommu/platform/68328/timers.c b/arch/m68k/platform/68328/timers.c
index 309f725995bf..309f725995bf 100644
--- a/arch/m68knommu/platform/68328/timers.c
+++ b/arch/m68k/platform/68328/timers.c
diff --git a/arch/m68knommu/platform/68360/Makefile b/arch/m68k/platform/68360/Makefile
index cf5af73a5789..cf5af73a5789 100644
--- a/arch/m68knommu/platform/68360/Makefile
+++ b/arch/m68k/platform/68360/Makefile
diff --git a/arch/m68knommu/platform/68360/commproc.c b/arch/m68k/platform/68360/commproc.c
index 8e4e10cc0080..8e4e10cc0080 100644
--- a/arch/m68knommu/platform/68360/commproc.c
+++ b/arch/m68k/platform/68360/commproc.c
diff --git a/arch/m68knommu/platform/68360/config.c b/arch/m68k/platform/68360/config.c
index 9dd5bca38749..9dd5bca38749 100644
--- a/arch/m68knommu/platform/68360/config.c
+++ b/arch/m68k/platform/68360/config.c
diff --git a/arch/m68knommu/platform/68360/entry.S b/arch/m68k/platform/68360/entry.S
index 46c1b18c9dcb..46c1b18c9dcb 100644
--- a/arch/m68knommu/platform/68360/entry.S
+++ b/arch/m68k/platform/68360/entry.S
diff --git a/arch/m68knommu/platform/68360/head-ram.S b/arch/m68k/platform/68360/head-ram.S
index 8eb94fb6b971..8eb94fb6b971 100644
--- a/arch/m68knommu/platform/68360/head-ram.S
+++ b/arch/m68k/platform/68360/head-ram.S
diff --git a/arch/m68knommu/platform/68360/head-rom.S b/arch/m68k/platform/68360/head-rom.S
index 97510e55b802..97510e55b802 100644
--- a/arch/m68knommu/platform/68360/head-rom.S
+++ b/arch/m68k/platform/68360/head-rom.S
diff --git a/arch/m68knommu/platform/68360/ints.c b/arch/m68k/platform/68360/ints.c
index 8de3feb568c6..8de3feb568c6 100644
--- a/arch/m68knommu/platform/68360/ints.c
+++ b/arch/m68k/platform/68360/ints.c
diff --git a/arch/m68knommu/platform/68EZ328/Makefile b/arch/m68k/platform/68EZ328/Makefile
index ee97735a242c..ee97735a242c 100644
--- a/arch/m68knommu/platform/68EZ328/Makefile
+++ b/arch/m68k/platform/68EZ328/Makefile
diff --git a/arch/m68knommu/platform/68EZ328/bootlogo.h b/arch/m68k/platform/68EZ328/bootlogo.h
index e842bdae5839..e842bdae5839 100644
--- a/arch/m68knommu/platform/68EZ328/bootlogo.h
+++ b/arch/m68k/platform/68EZ328/bootlogo.h
diff --git a/arch/m68knommu/platform/68EZ328/config.c b/arch/m68k/platform/68EZ328/config.c
index 1be1a16f6896..1be1a16f6896 100644
--- a/arch/m68knommu/platform/68EZ328/config.c
+++ b/arch/m68k/platform/68EZ328/config.c
diff --git a/arch/m68knommu/platform/68VZ328/Makefile b/arch/m68k/platform/68VZ328/Makefile
index 447ffa0fd7c7..447ffa0fd7c7 100644
--- a/arch/m68knommu/platform/68VZ328/Makefile
+++ b/arch/m68k/platform/68VZ328/Makefile
diff --git a/arch/m68knommu/platform/68VZ328/config.c b/arch/m68k/platform/68VZ328/config.c
index eabaabe8af36..eabaabe8af36 100644
--- a/arch/m68knommu/platform/68VZ328/config.c
+++ b/arch/m68k/platform/68VZ328/config.c
diff --git a/arch/m68knommu/platform/Makefile b/arch/m68k/platform/Makefile
index fc932bf65d34..fc932bf65d34 100644
--- a/arch/m68knommu/platform/Makefile
+++ b/arch/m68k/platform/Makefile
diff --git a/arch/m68knommu/platform/coldfire/Makefile b/arch/m68k/platform/coldfire/Makefile
index a8967baabd72..a8967baabd72 100644
--- a/arch/m68knommu/platform/coldfire/Makefile
+++ b/arch/m68k/platform/coldfire/Makefile
diff --git a/arch/m68knommu/platform/coldfire/cache.c b/arch/m68k/platform/coldfire/cache.c
index 235d3c4f4f0f..235d3c4f4f0f 100644
--- a/arch/m68knommu/platform/coldfire/cache.c
+++ b/arch/m68k/platform/coldfire/cache.c
diff --git a/arch/m68knommu/platform/coldfire/clk.c b/arch/m68k/platform/coldfire/clk.c
index 9f1260c5e2ad..9f1260c5e2ad 100644
--- a/arch/m68knommu/platform/coldfire/clk.c
+++ b/arch/m68k/platform/coldfire/clk.c
diff --git a/arch/m68knommu/platform/coldfire/dma.c b/arch/m68k/platform/coldfire/dma.c
index e88b95e2cc62..e88b95e2cc62 100644
--- a/arch/m68knommu/platform/coldfire/dma.c
+++ b/arch/m68k/platform/coldfire/dma.c
diff --git a/arch/m68knommu/platform/coldfire/dma_timer.c b/arch/m68k/platform/coldfire/dma_timer.c
index a5f562823d7a..a5f562823d7a 100644
--- a/arch/m68knommu/platform/coldfire/dma_timer.c
+++ b/arch/m68k/platform/coldfire/dma_timer.c
diff --git a/arch/m68knommu/platform/coldfire/entry.S b/arch/m68k/platform/coldfire/entry.S
index 5837cf080b6d..5837cf080b6d 100644
--- a/arch/m68knommu/platform/coldfire/entry.S
+++ b/arch/m68k/platform/coldfire/entry.S
diff --git a/arch/m68knommu/platform/coldfire/gpio.c b/arch/m68k/platform/coldfire/gpio.c
index ff0045793450..ff0045793450 100644
--- a/arch/m68knommu/platform/coldfire/gpio.c
+++ b/arch/m68k/platform/coldfire/gpio.c
diff --git a/arch/m68knommu/platform/coldfire/head.S b/arch/m68k/platform/coldfire/head.S
index 129bff4956b5..129bff4956b5 100644
--- a/arch/m68knommu/platform/coldfire/head.S
+++ b/arch/m68k/platform/coldfire/head.S
diff --git a/arch/m68knommu/platform/coldfire/intc-2.c b/arch/m68k/platform/coldfire/intc-2.c
index 2cbfbf035db9..2cbfbf035db9 100644
--- a/arch/m68knommu/platform/coldfire/intc-2.c
+++ b/arch/m68k/platform/coldfire/intc-2.c
diff --git a/arch/m68knommu/platform/coldfire/intc-simr.c b/arch/m68k/platform/coldfire/intc-simr.c
index e642b24ab729..e642b24ab729 100644
--- a/arch/m68knommu/platform/coldfire/intc-simr.c
+++ b/arch/m68k/platform/coldfire/intc-simr.c
diff --git a/arch/m68knommu/platform/coldfire/intc.c b/arch/m68k/platform/coldfire/intc.c
index d648081a63f6..d648081a63f6 100644
--- a/arch/m68knommu/platform/coldfire/intc.c
+++ b/arch/m68k/platform/coldfire/intc.c
diff --git a/arch/m68knommu/platform/coldfire/pinmux.c b/arch/m68k/platform/coldfire/pinmux.c
index 8c62b825939f..8c62b825939f 100644
--- a/arch/m68knommu/platform/coldfire/pinmux.c
+++ b/arch/m68k/platform/coldfire/pinmux.c
diff --git a/arch/m68knommu/platform/coldfire/pit.c b/arch/m68k/platform/coldfire/pit.c
index c2b980926bec..c2b980926bec 100644
--- a/arch/m68knommu/platform/coldfire/pit.c
+++ b/arch/m68k/platform/coldfire/pit.c
diff --git a/arch/m68knommu/platform/coldfire/sltimers.c b/arch/m68k/platform/coldfire/sltimers.c
index 0a1b937c3e18..0a1b937c3e18 100644
--- a/arch/m68knommu/platform/coldfire/sltimers.c
+++ b/arch/m68k/platform/coldfire/sltimers.c
diff --git a/arch/m68knommu/platform/coldfire/timers.c b/arch/m68k/platform/coldfire/timers.c
index 60242f65fea9..60242f65fea9 100644
--- a/arch/m68knommu/platform/coldfire/timers.c
+++ b/arch/m68k/platform/coldfire/timers.c
diff --git a/arch/m68knommu/platform/coldfire/vectors.c b/arch/m68k/platform/coldfire/vectors.c
index a21d3f870b7a..a21d3f870b7a 100644
--- a/arch/m68knommu/platform/coldfire/vectors.c
+++ b/arch/m68k/platform/coldfire/vectors.c
diff --git a/arch/m68knommu/Kconfig.debug b/arch/m68knommu/Kconfig.debug
deleted file mode 100644
index ed6d9a83bfdb..000000000000
--- a/arch/m68knommu/Kconfig.debug
+++ /dev/null
@@ -1,35 +0,0 @@
1menu "Kernel hacking"
2
3source "lib/Kconfig.debug"
4
5config FULLDEBUG
6 bool "Full Symbolic/Source Debugging support"
7 help
8 Enable debugging symbols on kernel build.
9
10config HIGHPROFILE
11 bool "Use fast second timer for profiling"
12 depends on COLDFIRE
13 help
14 Use a fast secondary clock to produce profiling information.
15
16config BOOTPARAM
17 bool 'Compiled-in Kernel Boot Parameter'
18
19config BOOTPARAM_STRING
20 string 'Kernel Boot Parameter'
21 default 'console=ttyS0,19200'
22 depends on BOOTPARAM
23
24config NO_KERNEL_MSG
25 bool "Suppress Kernel BUG Messages"
26 help
27 Do not output any debug BUG messages within the kernel.
28
29config BDM_DISABLE
30 bool "Disable BDM signals"
31 depends on (EXPERIMENTAL && COLDFIRE)
32 help
33 Disable the ColdFire CPU's BDM signals.
34
35endmenu
diff --git a/arch/m68knommu/defconfig b/arch/m68knommu/defconfig
deleted file mode 100644
index 2f5655c577af..000000000000
--- a/arch/m68knommu/defconfig
+++ /dev/null
@@ -1,74 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_LOG_BUF_SHIFT=14
3# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
4CONFIG_EXPERT=y
5# CONFIG_KALLSYMS is not set
6# CONFIG_HOTPLUG is not set
7# CONFIG_FUTEX is not set
8# CONFIG_EPOLL is not set
9# CONFIG_SIGNALFD is not set
10# CONFIG_TIMERFD is not set
11# CONFIG_EVENTFD is not set
12# CONFIG_AIO is not set
13# CONFIG_VM_EVENT_COUNTERS is not set
14# CONFIG_COMPAT_BRK is not set
15# CONFIG_BLK_DEV_BSG is not set
16# CONFIG_IOSCHED_DEADLINE is not set
17# CONFIG_IOSCHED_CFQ is not set
18CONFIG_M520x=y
19CONFIG_CLOCK_SET=y
20CONFIG_CLOCK_FREQ=166666666
21CONFIG_CLOCK_DIV=2
22CONFIG_M5208EVB=y
23# CONFIG_4KSTACKS is not set
24CONFIG_RAMBASE=0x40000000
25CONFIG_RAMSIZE=0x2000000
26CONFIG_VECTORBASE=0x40000000
27CONFIG_KERNELBASE=0x40020000
28CONFIG_RAM16BIT=y
29CONFIG_BINFMT_FLAT=y
30CONFIG_NET=y
31CONFIG_PACKET=y
32CONFIG_UNIX=y
33CONFIG_INET=y
34# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
35# CONFIG_INET_XFRM_MODE_TUNNEL is not set
36# CONFIG_INET_XFRM_MODE_BEET is not set
37# CONFIG_INET_LRO is not set
38# CONFIG_INET_DIAG is not set
39# CONFIG_IPV6 is not set
40CONFIG_MTD=y
41CONFIG_MTD_PARTITIONS=y
42CONFIG_MTD_CHAR=y
43CONFIG_MTD_BLOCK=y
44CONFIG_MTD_RAM=y
45CONFIG_MTD_UCLINUX=y
46CONFIG_BLK_DEV_RAM=y
47# CONFIG_MISC_DEVICES is not set
48CONFIG_NETDEVICES=y
49CONFIG_NET_ETHERNET=y
50CONFIG_FEC=y
51# CONFIG_NETDEV_1000 is not set
52# CONFIG_NETDEV_10000 is not set
53# CONFIG_INPUT is not set
54# CONFIG_SERIO is not set
55# CONFIG_VT is not set
56CONFIG_SERIAL_MCF=y
57CONFIG_SERIAL_MCF_BAUDRATE=115200
58CONFIG_SERIAL_MCF_CONSOLE=y
59# CONFIG_UNIX98_PTYS is not set
60# CONFIG_HW_RANDOM is not set
61# CONFIG_HWMON is not set
62# CONFIG_USB_SUPPORT is not set
63CONFIG_EXT2_FS=y
64# CONFIG_FILE_LOCKING is not set
65# CONFIG_DNOTIFY is not set
66# CONFIG_SYSFS is not set
67CONFIG_ROMFS_FS=y
68CONFIG_ROMFS_BACKED_BY_MTD=y
69# CONFIG_NETWORK_FILESYSTEMS is not set
70# CONFIG_RCU_CPU_STALL_DETECTOR is not set
71CONFIG_SYSCTL_SYSCALL_CHECK=y
72CONFIG_FULLDEBUG=y
73CONFIG_BOOTPARAM=y
74CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
diff --git a/arch/m68knommu/kernel/.gitignore b/arch/m68knommu/kernel/.gitignore
deleted file mode 100644
index c5f676c3c224..000000000000
--- a/arch/m68knommu/kernel/.gitignore
+++ /dev/null
@@ -1 +0,0 @@
1vmlinux.lds
diff --git a/arch/m68knommu/lib/ashldi3.c b/arch/m68knommu/lib/ashldi3.c
deleted file mode 100644
index 008403eb8ce2..000000000000
--- a/arch/m68knommu/lib/ashldi3.c
+++ /dev/null
@@ -1,62 +0,0 @@
1/* ashrdi3.c extracted from gcc-2.95.2/libgcc2.c which is: */
2/* Copyright (C) 1989, 92-98, 1999 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
20
21#define BITS_PER_UNIT 8
22
23typedef int SItype __attribute__ ((mode (SI)));
24typedef unsigned int USItype __attribute__ ((mode (SI)));
25typedef int DItype __attribute__ ((mode (DI)));
26typedef int word_type __attribute__ ((mode (__word__)));
27
28struct DIstruct {SItype high, low;};
29
30typedef union
31{
32 struct DIstruct s;
33 DItype ll;
34} DIunion;
35
36DItype
37__ashldi3 (DItype u, word_type b)
38{
39 DIunion w;
40 word_type bm;
41 DIunion uu;
42
43 if (b == 0)
44 return u;
45
46 uu.ll = u;
47
48 bm = (sizeof (SItype) * BITS_PER_UNIT) - b;
49 if (bm <= 0)
50 {
51 w.s.low = 0;
52 w.s.high = (USItype)uu.s.low << -bm;
53 }
54 else
55 {
56 USItype carries = (USItype)uu.s.low >> bm;
57 w.s.low = (USItype)uu.s.low << b;
58 w.s.high = ((USItype)uu.s.high << b) | carries;
59 }
60
61 return w.ll;
62}
diff --git a/arch/m68knommu/lib/lshrdi3.c b/arch/m68knommu/lib/lshrdi3.c
deleted file mode 100644
index 93b1cb6fdee8..000000000000
--- a/arch/m68knommu/lib/lshrdi3.c
+++ /dev/null
@@ -1,62 +0,0 @@
1/* lshrdi3.c extracted from gcc-2.7.2/libgcc2.c which is: */
2/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
20
21#define BITS_PER_UNIT 8
22
23typedef int SItype __attribute__ ((mode (SI)));
24typedef unsigned int USItype __attribute__ ((mode (SI)));
25typedef int DItype __attribute__ ((mode (DI)));
26typedef int word_type __attribute__ ((mode (__word__)));
27
28struct DIstruct {SItype high, low;};
29
30typedef union
31{
32 struct DIstruct s;
33 DItype ll;
34} DIunion;
35
36DItype
37__lshrdi3 (DItype u, word_type b)
38{
39 DIunion w;
40 word_type bm;
41 DIunion uu;
42
43 if (b == 0)
44 return u;
45
46 uu.ll = u;
47
48 bm = (sizeof (SItype) * BITS_PER_UNIT) - b;
49 if (bm <= 0)
50 {
51 w.s.high = 0;
52 w.s.low = (USItype)uu.s.high >> -bm;
53 }
54 else
55 {
56 USItype carries = (USItype)uu.s.high << bm;
57 w.s.high = (USItype)uu.s.high >> b;
58 w.s.low = ((USItype)uu.s.low >> b) | carries;
59 }
60
61 return w.ll;
62}
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index 922c4194c7bb..5f0cf0e32653 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -37,6 +37,9 @@ config ARCH_HAS_ILOG2_U64
37config GENERIC_FIND_NEXT_BIT 37config GENERIC_FIND_NEXT_BIT
38 def_bool y 38 def_bool y
39 39
40config GENERIC_FIND_BIT_LE
41 def_bool y
42
40config GENERIC_HWEIGHT 43config GENERIC_HWEIGHT
41 def_bool y 44 def_bool y
42 45
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index d88983516e26..83aa5fb8e8f1 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -22,6 +22,7 @@ config MIPS
22 select HAVE_DMA_API_DEBUG 22 select HAVE_DMA_API_DEBUG
23 select HAVE_GENERIC_HARDIRQS 23 select HAVE_GENERIC_HARDIRQS
24 select GENERIC_IRQ_PROBE 24 select GENERIC_IRQ_PROBE
25 select GENERIC_IRQ_SHOW
25 select HAVE_ARCH_JUMP_LABEL 26 select HAVE_ARCH_JUMP_LABEL
26 27
27menu "Machine selection" 28menu "Machine selection"
@@ -777,6 +778,10 @@ config GENERIC_FIND_NEXT_BIT
777 bool 778 bool
778 default y 779 default y
779 780
781config GENERIC_FIND_BIT_LE
782 bool
783 default y
784
780config GENERIC_HWEIGHT 785config GENERIC_HWEIGHT
781 bool 786 bool
782 default y 787 default y
@@ -858,6 +863,9 @@ config GPIO_TXX9
858config CFE 863config CFE
859 bool 864 bool
860 865
866config ARCH_DMA_ADDR_T_64BIT
867 def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT
868
861config DMA_COHERENT 869config DMA_COHERENT
862 bool 870 bool
863 871
@@ -2340,6 +2348,16 @@ source "drivers/pcmcia/Kconfig"
2340 2348
2341source "drivers/pci/hotplug/Kconfig" 2349source "drivers/pci/hotplug/Kconfig"
2342 2350
2351config RAPIDIO
2352 bool "RapidIO support"
2353 depends on PCI
2354 default n
2355 help
2356 If you say Y here, the kernel will include drivers and
2357 infrastructure code to support RapidIO interconnect devices.
2358
2359source "drivers/rapidio/Kconfig"
2360
2343endmenu 2361endmenu
2344 2362
2345menu "Executable file formats" 2363menu "Executable file formats"
diff --git a/arch/mips/alchemy/common/irq.c b/arch/mips/alchemy/common/irq.c
index 9f78ada83b3c..55dd7c888517 100644
--- a/arch/mips/alchemy/common/irq.c
+++ b/arch/mips/alchemy/common/irq.c
@@ -39,7 +39,7 @@
39#include <asm/mach-pb1x00/pb1000.h> 39#include <asm/mach-pb1x00/pb1000.h>
40#endif 40#endif
41 41
42static int au1x_ic_settype(unsigned int irq, unsigned int flow_type); 42static int au1x_ic_settype(struct irq_data *d, unsigned int flow_type);
43 43
44/* NOTE on interrupt priorities: The original writers of this code said: 44/* NOTE on interrupt priorities: The original writers of this code said:
45 * 45 *
@@ -218,17 +218,17 @@ struct au1xxx_irqmap au1200_irqmap[] __initdata = {
218}; 218};
219 219
220 220
221static void au1x_ic0_unmask(unsigned int irq_nr) 221static void au1x_ic0_unmask(struct irq_data *d)
222{ 222{
223 unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE; 223 unsigned int bit = d->irq - AU1000_INTC0_INT_BASE;
224 au_writel(1 << bit, IC0_MASKSET); 224 au_writel(1 << bit, IC0_MASKSET);
225 au_writel(1 << bit, IC0_WAKESET); 225 au_writel(1 << bit, IC0_WAKESET);
226 au_sync(); 226 au_sync();
227} 227}
228 228
229static void au1x_ic1_unmask(unsigned int irq_nr) 229static void au1x_ic1_unmask(struct irq_data *d)
230{ 230{
231 unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE; 231 unsigned int bit = d->irq - AU1000_INTC1_INT_BASE;
232 au_writel(1 << bit, IC1_MASKSET); 232 au_writel(1 << bit, IC1_MASKSET);
233 au_writel(1 << bit, IC1_WAKESET); 233 au_writel(1 << bit, IC1_WAKESET);
234 234
@@ -236,31 +236,31 @@ static void au1x_ic1_unmask(unsigned int irq_nr)
236 * nowhere in the current kernel sources is it disabled. --mlau 236 * nowhere in the current kernel sources is it disabled. --mlau
237 */ 237 */
238#if defined(CONFIG_MIPS_PB1000) 238#if defined(CONFIG_MIPS_PB1000)
239 if (irq_nr == AU1000_GPIO15_INT) 239 if (d->irq == AU1000_GPIO15_INT)
240 au_writel(0x4000, PB1000_MDR); /* enable int */ 240 au_writel(0x4000, PB1000_MDR); /* enable int */
241#endif 241#endif
242 au_sync(); 242 au_sync();
243} 243}
244 244
245static void au1x_ic0_mask(unsigned int irq_nr) 245static void au1x_ic0_mask(struct irq_data *d)
246{ 246{
247 unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE; 247 unsigned int bit = d->irq - AU1000_INTC0_INT_BASE;
248 au_writel(1 << bit, IC0_MASKCLR); 248 au_writel(1 << bit, IC0_MASKCLR);
249 au_writel(1 << bit, IC0_WAKECLR); 249 au_writel(1 << bit, IC0_WAKECLR);
250 au_sync(); 250 au_sync();
251} 251}
252 252
253static void au1x_ic1_mask(unsigned int irq_nr) 253static void au1x_ic1_mask(struct irq_data *d)
254{ 254{
255 unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE; 255 unsigned int bit = d->irq - AU1000_INTC1_INT_BASE;
256 au_writel(1 << bit, IC1_MASKCLR); 256 au_writel(1 << bit, IC1_MASKCLR);
257 au_writel(1 << bit, IC1_WAKECLR); 257 au_writel(1 << bit, IC1_WAKECLR);
258 au_sync(); 258 au_sync();
259} 259}
260 260
261static void au1x_ic0_ack(unsigned int irq_nr) 261static void au1x_ic0_ack(struct irq_data *d)
262{ 262{
263 unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE; 263 unsigned int bit = d->irq - AU1000_INTC0_INT_BASE;
264 264
265 /* 265 /*
266 * This may assume that we don't get interrupts from 266 * This may assume that we don't get interrupts from
@@ -271,9 +271,9 @@ static void au1x_ic0_ack(unsigned int irq_nr)
271 au_sync(); 271 au_sync();
272} 272}
273 273
274static void au1x_ic1_ack(unsigned int irq_nr) 274static void au1x_ic1_ack(struct irq_data *d)
275{ 275{
276 unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE; 276 unsigned int bit = d->irq - AU1000_INTC1_INT_BASE;
277 277
278 /* 278 /*
279 * This may assume that we don't get interrupts from 279 * This may assume that we don't get interrupts from
@@ -284,9 +284,9 @@ static void au1x_ic1_ack(unsigned int irq_nr)
284 au_sync(); 284 au_sync();
285} 285}
286 286
287static void au1x_ic0_maskack(unsigned int irq_nr) 287static void au1x_ic0_maskack(struct irq_data *d)
288{ 288{
289 unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE; 289 unsigned int bit = d->irq - AU1000_INTC0_INT_BASE;
290 290
291 au_writel(1 << bit, IC0_WAKECLR); 291 au_writel(1 << bit, IC0_WAKECLR);
292 au_writel(1 << bit, IC0_MASKCLR); 292 au_writel(1 << bit, IC0_MASKCLR);
@@ -295,9 +295,9 @@ static void au1x_ic0_maskack(unsigned int irq_nr)
295 au_sync(); 295 au_sync();
296} 296}
297 297
298static void au1x_ic1_maskack(unsigned int irq_nr) 298static void au1x_ic1_maskack(struct irq_data *d)
299{ 299{
300 unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE; 300 unsigned int bit = d->irq - AU1000_INTC1_INT_BASE;
301 301
302 au_writel(1 << bit, IC1_WAKECLR); 302 au_writel(1 << bit, IC1_WAKECLR);
303 au_writel(1 << bit, IC1_MASKCLR); 303 au_writel(1 << bit, IC1_MASKCLR);
@@ -306,9 +306,9 @@ static void au1x_ic1_maskack(unsigned int irq_nr)
306 au_sync(); 306 au_sync();
307} 307}
308 308
309static int au1x_ic1_setwake(unsigned int irq, unsigned int on) 309static int au1x_ic1_setwake(struct irq_data *d, unsigned int on)
310{ 310{
311 int bit = irq - AU1000_INTC1_INT_BASE; 311 int bit = d->irq - AU1000_INTC1_INT_BASE;
312 unsigned long wakemsk, flags; 312 unsigned long wakemsk, flags;
313 313
314 /* only GPIO 0-7 can act as wakeup source. Fortunately these 314 /* only GPIO 0-7 can act as wakeup source. Fortunately these
@@ -336,28 +336,30 @@ static int au1x_ic1_setwake(unsigned int irq, unsigned int on)
336 */ 336 */
337static struct irq_chip au1x_ic0_chip = { 337static struct irq_chip au1x_ic0_chip = {
338 .name = "Alchemy-IC0", 338 .name = "Alchemy-IC0",
339 .ack = au1x_ic0_ack, 339 .irq_ack = au1x_ic0_ack,
340 .mask = au1x_ic0_mask, 340 .irq_mask = au1x_ic0_mask,
341 .mask_ack = au1x_ic0_maskack, 341 .irq_mask_ack = au1x_ic0_maskack,
342 .unmask = au1x_ic0_unmask, 342 .irq_unmask = au1x_ic0_unmask,
343 .set_type = au1x_ic_settype, 343 .irq_set_type = au1x_ic_settype,
344}; 344};
345 345
346static struct irq_chip au1x_ic1_chip = { 346static struct irq_chip au1x_ic1_chip = {
347 .name = "Alchemy-IC1", 347 .name = "Alchemy-IC1",
348 .ack = au1x_ic1_ack, 348 .irq_ack = au1x_ic1_ack,
349 .mask = au1x_ic1_mask, 349 .irq_mask = au1x_ic1_mask,
350 .mask_ack = au1x_ic1_maskack, 350 .irq_mask_ack = au1x_ic1_maskack,
351 .unmask = au1x_ic1_unmask, 351 .irq_unmask = au1x_ic1_unmask,
352 .set_type = au1x_ic_settype, 352 .irq_set_type = au1x_ic_settype,
353 .set_wake = au1x_ic1_setwake, 353 .irq_set_wake = au1x_ic1_setwake,
354}; 354};
355 355
356static int au1x_ic_settype(unsigned int irq, unsigned int flow_type) 356static int au1x_ic_settype(struct irq_data *d, unsigned int flow_type)
357{ 357{
358 struct irq_chip *chip; 358 struct irq_chip *chip;
359 unsigned long icr[6]; 359 unsigned long icr[6];
360 unsigned int bit, ic; 360 unsigned int bit, ic, irq = d->irq;
361 irq_flow_handler_t handler = NULL;
362 unsigned char *name = NULL;
361 int ret; 363 int ret;
362 364
363 if (irq >= AU1000_INTC1_INT_BASE) { 365 if (irq >= AU1000_INTC1_INT_BASE) {
@@ -387,47 +389,47 @@ static int au1x_ic_settype(unsigned int irq, unsigned int flow_type)
387 au_writel(1 << bit, icr[5]); 389 au_writel(1 << bit, icr[5]);
388 au_writel(1 << bit, icr[4]); 390 au_writel(1 << bit, icr[4]);
389 au_writel(1 << bit, icr[0]); 391 au_writel(1 << bit, icr[0]);
390 set_irq_chip_and_handler_name(irq, chip, 392 handler = handle_edge_irq;
391 handle_edge_irq, "riseedge"); 393 name = "riseedge";
392 break; 394 break;
393 case IRQ_TYPE_EDGE_FALLING: /* 0:1:0 */ 395 case IRQ_TYPE_EDGE_FALLING: /* 0:1:0 */
394 au_writel(1 << bit, icr[5]); 396 au_writel(1 << bit, icr[5]);
395 au_writel(1 << bit, icr[1]); 397 au_writel(1 << bit, icr[1]);
396 au_writel(1 << bit, icr[3]); 398 au_writel(1 << bit, icr[3]);
397 set_irq_chip_and_handler_name(irq, chip, 399 handler = handle_edge_irq;
398 handle_edge_irq, "falledge"); 400 name = "falledge";
399 break; 401 break;
400 case IRQ_TYPE_EDGE_BOTH: /* 0:1:1 */ 402 case IRQ_TYPE_EDGE_BOTH: /* 0:1:1 */
401 au_writel(1 << bit, icr[5]); 403 au_writel(1 << bit, icr[5]);
402 au_writel(1 << bit, icr[1]); 404 au_writel(1 << bit, icr[1]);
403 au_writel(1 << bit, icr[0]); 405 au_writel(1 << bit, icr[0]);
404 set_irq_chip_and_handler_name(irq, chip, 406 handler = handle_edge_irq;
405 handle_edge_irq, "bothedge"); 407 name = "bothedge";
406 break; 408 break;
407 case IRQ_TYPE_LEVEL_HIGH: /* 1:0:1 */ 409 case IRQ_TYPE_LEVEL_HIGH: /* 1:0:1 */
408 au_writel(1 << bit, icr[2]); 410 au_writel(1 << bit, icr[2]);
409 au_writel(1 << bit, icr[4]); 411 au_writel(1 << bit, icr[4]);
410 au_writel(1 << bit, icr[0]); 412 au_writel(1 << bit, icr[0]);
411 set_irq_chip_and_handler_name(irq, chip, 413 handler = handle_level_irq;
412 handle_level_irq, "hilevel"); 414 name = "hilevel";
413 break; 415 break;
414 case IRQ_TYPE_LEVEL_LOW: /* 1:1:0 */ 416 case IRQ_TYPE_LEVEL_LOW: /* 1:1:0 */
415 au_writel(1 << bit, icr[2]); 417 au_writel(1 << bit, icr[2]);
416 au_writel(1 << bit, icr[1]); 418 au_writel(1 << bit, icr[1]);
417 au_writel(1 << bit, icr[3]); 419 au_writel(1 << bit, icr[3]);
418 set_irq_chip_and_handler_name(irq, chip, 420 handler = handle_level_irq;
419 handle_level_irq, "lowlevel"); 421 name = "lowlevel";
420 break; 422 break;
421 case IRQ_TYPE_NONE: /* 0:0:0 */ 423 case IRQ_TYPE_NONE: /* 0:0:0 */
422 au_writel(1 << bit, icr[5]); 424 au_writel(1 << bit, icr[5]);
423 au_writel(1 << bit, icr[4]); 425 au_writel(1 << bit, icr[4]);
424 au_writel(1 << bit, icr[3]); 426 au_writel(1 << bit, icr[3]);
425 /* set at least chip so we can call set_irq_type() on it */
426 set_irq_chip(irq, chip);
427 break; 427 break;
428 default: 428 default:
429 ret = -EINVAL; 429 ret = -EINVAL;
430 } 430 }
431 __irq_set_chip_handler_name_locked(d->irq, chip, handler, name);
432
431 au_sync(); 433 au_sync();
432 434
433 return ret; 435 return ret;
@@ -504,11 +506,11 @@ static void __init au1000_init_irq(struct au1xxx_irqmap *map)
504 */ 506 */
505 for (i = AU1000_INTC0_INT_BASE; 507 for (i = AU1000_INTC0_INT_BASE;
506 (i < AU1000_INTC0_INT_BASE + 32); i++) 508 (i < AU1000_INTC0_INT_BASE + 32); i++)
507 au1x_ic_settype(i, IRQ_TYPE_NONE); 509 au1x_ic_settype(irq_get_irq_data(i), IRQ_TYPE_NONE);
508 510
509 for (i = AU1000_INTC1_INT_BASE; 511 for (i = AU1000_INTC1_INT_BASE;
510 (i < AU1000_INTC1_INT_BASE + 32); i++) 512 (i < AU1000_INTC1_INT_BASE + 32); i++)
511 au1x_ic_settype(i, IRQ_TYPE_NONE); 513 au1x_ic_settype(irq_get_irq_data(i), IRQ_TYPE_NONE);
512 514
513 /* 515 /*
514 * Initialize IC0, which is fixed per processor. 516 * Initialize IC0, which is fixed per processor.
@@ -526,7 +528,7 @@ static void __init au1000_init_irq(struct au1xxx_irqmap *map)
526 au_writel(1 << bit, IC0_ASSIGNSET); 528 au_writel(1 << bit, IC0_ASSIGNSET);
527 } 529 }
528 530
529 au1x_ic_settype(irq_nr, map->im_type); 531 au1x_ic_settype(irq_get_irq_data(irq_nr), map->im_type);
530 ++map; 532 ++map;
531 } 533 }
532 534
diff --git a/arch/mips/alchemy/devboards/bcsr.c b/arch/mips/alchemy/devboards/bcsr.c
index c52af8821da0..f91c43a7d5dc 100644
--- a/arch/mips/alchemy/devboards/bcsr.c
+++ b/arch/mips/alchemy/devboards/bcsr.c
@@ -97,26 +97,26 @@ static void bcsr_csc_handler(unsigned int irq, struct irq_desc *d)
97 * CPLD generates tons of spurious interrupts (at least on my DB1200). 97 * CPLD generates tons of spurious interrupts (at least on my DB1200).
98 * -- mlau 98 * -- mlau
99 */ 99 */
100static void bcsr_irq_mask(unsigned int irq_nr) 100static void bcsr_irq_mask(struct irq_data *d)
101{ 101{
102 unsigned short v = 1 << (irq_nr - bcsr_csc_base); 102 unsigned short v = 1 << (d->irq - bcsr_csc_base);
103 __raw_writew(v, bcsr_virt + BCSR_REG_INTCLR); 103 __raw_writew(v, bcsr_virt + BCSR_REG_INTCLR);
104 __raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR); 104 __raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR);
105 wmb(); 105 wmb();
106} 106}
107 107
108static void bcsr_irq_maskack(unsigned int irq_nr) 108static void bcsr_irq_maskack(struct irq_data *d)
109{ 109{
110 unsigned short v = 1 << (irq_nr - bcsr_csc_base); 110 unsigned short v = 1 << (d->irq - bcsr_csc_base);
111 __raw_writew(v, bcsr_virt + BCSR_REG_INTCLR); 111 __raw_writew(v, bcsr_virt + BCSR_REG_INTCLR);
112 __raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR); 112 __raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR);
113 __raw_writew(v, bcsr_virt + BCSR_REG_INTSTAT); /* ack */ 113 __raw_writew(v, bcsr_virt + BCSR_REG_INTSTAT); /* ack */
114 wmb(); 114 wmb();
115} 115}
116 116
117static void bcsr_irq_unmask(unsigned int irq_nr) 117static void bcsr_irq_unmask(struct irq_data *d)
118{ 118{
119 unsigned short v = 1 << (irq_nr - bcsr_csc_base); 119 unsigned short v = 1 << (d->irq - bcsr_csc_base);
120 __raw_writew(v, bcsr_virt + BCSR_REG_INTSET); 120 __raw_writew(v, bcsr_virt + BCSR_REG_INTSET);
121 __raw_writew(v, bcsr_virt + BCSR_REG_MASKSET); 121 __raw_writew(v, bcsr_virt + BCSR_REG_MASKSET);
122 wmb(); 122 wmb();
@@ -124,9 +124,9 @@ static void bcsr_irq_unmask(unsigned int irq_nr)
124 124
125static struct irq_chip bcsr_irq_type = { 125static struct irq_chip bcsr_irq_type = {
126 .name = "CPLD", 126 .name = "CPLD",
127 .mask = bcsr_irq_mask, 127 .irq_mask = bcsr_irq_mask,
128 .mask_ack = bcsr_irq_maskack, 128 .irq_mask_ack = bcsr_irq_maskack,
129 .unmask = bcsr_irq_unmask, 129 .irq_unmask = bcsr_irq_unmask,
130}; 130};
131 131
132void __init bcsr_init_irq(int csc_start, int csc_end, int hook_irq) 132void __init bcsr_init_irq(int csc_start, int csc_end, int hook_irq)
diff --git a/arch/mips/ar7/irq.c b/arch/mips/ar7/irq.c
index 4ec2642c568f..a6484b60642f 100644
--- a/arch/mips/ar7/irq.c
+++ b/arch/mips/ar7/irq.c
@@ -49,51 +49,51 @@
49 49
50static int ar7_irq_base; 50static int ar7_irq_base;
51 51
52static void ar7_unmask_irq(unsigned int irq) 52static void ar7_unmask_irq(struct irq_data *d)
53{ 53{
54 writel(1 << ((irq - ar7_irq_base) % 32), 54 writel(1 << ((d->irq - ar7_irq_base) % 32),
55 REG(ESR_OFFSET(irq - ar7_irq_base))); 55 REG(ESR_OFFSET(d->irq - ar7_irq_base)));
56} 56}
57 57
58static void ar7_mask_irq(unsigned int irq) 58static void ar7_mask_irq(struct irq_data *d)
59{ 59{
60 writel(1 << ((irq - ar7_irq_base) % 32), 60 writel(1 << ((d->irq - ar7_irq_base) % 32),
61 REG(ECR_OFFSET(irq - ar7_irq_base))); 61 REG(ECR_OFFSET(d->irq - ar7_irq_base)));
62} 62}
63 63
64static void ar7_ack_irq(unsigned int irq) 64static void ar7_ack_irq(struct irq_data *d)
65{ 65{
66 writel(1 << ((irq - ar7_irq_base) % 32), 66 writel(1 << ((d->irq - ar7_irq_base) % 32),
67 REG(CR_OFFSET(irq - ar7_irq_base))); 67 REG(CR_OFFSET(d->irq - ar7_irq_base)));
68} 68}
69 69
70static void ar7_unmask_sec_irq(unsigned int irq) 70static void ar7_unmask_sec_irq(struct irq_data *d)
71{ 71{
72 writel(1 << (irq - ar7_irq_base - 40), REG(SEC_ESR_OFFSET)); 72 writel(1 << (d->irq - ar7_irq_base - 40), REG(SEC_ESR_OFFSET));
73} 73}
74 74
75static void ar7_mask_sec_irq(unsigned int irq) 75static void ar7_mask_sec_irq(struct irq_data *d)
76{ 76{
77 writel(1 << (irq - ar7_irq_base - 40), REG(SEC_ECR_OFFSET)); 77 writel(1 << (d->irq - ar7_irq_base - 40), REG(SEC_ECR_OFFSET));
78} 78}
79 79
80static void ar7_ack_sec_irq(unsigned int irq) 80static void ar7_ack_sec_irq(struct irq_data *d)
81{ 81{
82 writel(1 << (irq - ar7_irq_base - 40), REG(SEC_CR_OFFSET)); 82 writel(1 << (d->irq - ar7_irq_base - 40), REG(SEC_CR_OFFSET));
83} 83}
84 84
85static struct irq_chip ar7_irq_type = { 85static struct irq_chip ar7_irq_type = {
86 .name = "AR7", 86 .name = "AR7",
87 .unmask = ar7_unmask_irq, 87 .irq_unmask = ar7_unmask_irq,
88 .mask = ar7_mask_irq, 88 .irq_mask = ar7_mask_irq,
89 .ack = ar7_ack_irq 89 .irq_ack = ar7_ack_irq
90}; 90};
91 91
92static struct irq_chip ar7_sec_irq_type = { 92static struct irq_chip ar7_sec_irq_type = {
93 .name = "AR7", 93 .name = "AR7",
94 .unmask = ar7_unmask_sec_irq, 94 .irq_unmask = ar7_unmask_sec_irq,
95 .mask = ar7_mask_sec_irq, 95 .irq_mask = ar7_mask_sec_irq,
96 .ack = ar7_ack_sec_irq, 96 .irq_ack = ar7_ack_sec_irq,
97}; 97};
98 98
99static struct irqaction ar7_cascade_action = { 99static struct irqaction ar7_cascade_action = {
diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c
index 1bf7f719ba53..7c02bc948a31 100644
--- a/arch/mips/ath79/irq.c
+++ b/arch/mips/ath79/irq.c
@@ -62,13 +62,12 @@ static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc)
62 spurious_interrupt(); 62 spurious_interrupt();
63} 63}
64 64
65static void ar71xx_misc_irq_unmask(unsigned int irq) 65static void ar71xx_misc_irq_unmask(struct irq_data *d)
66{ 66{
67 unsigned int irq = d->irq - ATH79_MISC_IRQ_BASE;
67 void __iomem *base = ath79_reset_base; 68 void __iomem *base = ath79_reset_base;
68 u32 t; 69 u32 t;
69 70
70 irq -= ATH79_MISC_IRQ_BASE;
71
72 t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); 71 t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
73 __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE); 72 __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
74 73
@@ -76,13 +75,12 @@ static void ar71xx_misc_irq_unmask(unsigned int irq)
76 __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); 75 __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
77} 76}
78 77
79static void ar71xx_misc_irq_mask(unsigned int irq) 78static void ar71xx_misc_irq_mask(struct irq_data *d)
80{ 79{
80 unsigned int irq = d->irq - ATH79_MISC_IRQ_BASE;
81 void __iomem *base = ath79_reset_base; 81 void __iomem *base = ath79_reset_base;
82 u32 t; 82 u32 t;
83 83
84 irq -= ATH79_MISC_IRQ_BASE;
85
86 t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); 84 t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
87 __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE); 85 __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
88 86
@@ -90,13 +88,12 @@ static void ar71xx_misc_irq_mask(unsigned int irq)
90 __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); 88 __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
91} 89}
92 90
93static void ar724x_misc_irq_ack(unsigned int irq) 91static void ar724x_misc_irq_ack(struct irq_data *d)
94{ 92{
93 unsigned int irq = d->irq - ATH79_MISC_IRQ_BASE;
95 void __iomem *base = ath79_reset_base; 94 void __iomem *base = ath79_reset_base;
96 u32 t; 95 u32 t;
97 96
98 irq -= ATH79_MISC_IRQ_BASE;
99
100 t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS); 97 t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS);
101 __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_STATUS); 98 __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_STATUS);
102 99
@@ -106,8 +103,8 @@ static void ar724x_misc_irq_ack(unsigned int irq)
106 103
107static struct irq_chip ath79_misc_irq_chip = { 104static struct irq_chip ath79_misc_irq_chip = {
108 .name = "MISC", 105 .name = "MISC",
109 .unmask = ar71xx_misc_irq_unmask, 106 .irq_unmask = ar71xx_misc_irq_unmask,
110 .mask = ar71xx_misc_irq_mask, 107 .irq_mask = ar71xx_misc_irq_mask,
111}; 108};
112 109
113static void __init ath79_misc_irq_init(void) 110static void __init ath79_misc_irq_init(void)
@@ -119,15 +116,14 @@ static void __init ath79_misc_irq_init(void)
119 __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS); 116 __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS);
120 117
121 if (soc_is_ar71xx() || soc_is_ar913x()) 118 if (soc_is_ar71xx() || soc_is_ar913x())
122 ath79_misc_irq_chip.mask_ack = ar71xx_misc_irq_mask; 119 ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask;
123 else if (soc_is_ar724x()) 120 else if (soc_is_ar724x())
124 ath79_misc_irq_chip.ack = ar724x_misc_irq_ack; 121 ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
125 else 122 else
126 BUG(); 123 BUG();
127 124
128 for (i = ATH79_MISC_IRQ_BASE; 125 for (i = ATH79_MISC_IRQ_BASE;
129 i < ATH79_MISC_IRQ_BASE + ATH79_MISC_IRQ_COUNT; i++) { 126 i < ATH79_MISC_IRQ_BASE + ATH79_MISC_IRQ_COUNT; i++) {
130 irq_desc[i].status = IRQ_DISABLED;
131 set_irq_chip_and_handler(i, &ath79_misc_irq_chip, 127 set_irq_chip_and_handler(i, &ath79_misc_irq_chip,
132 handle_level_irq); 128 handle_level_irq);
133 } 129 }
diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c
index 3be87f2422f0..1691531aa34d 100644
--- a/arch/mips/bcm63xx/irq.c
+++ b/arch/mips/bcm63xx/irq.c
@@ -76,88 +76,80 @@ asmlinkage void plat_irq_dispatch(void)
76 * internal IRQs operations: only mask/unmask on PERF irq mask 76 * internal IRQs operations: only mask/unmask on PERF irq mask
77 * register. 77 * register.
78 */ 78 */
79static inline void bcm63xx_internal_irq_mask(unsigned int irq) 79static inline void bcm63xx_internal_irq_mask(struct irq_data *d)
80{ 80{
81 unsigned int irq = d->irq - IRQ_INTERNAL_BASE;
81 u32 mask; 82 u32 mask;
82 83
83 irq -= IRQ_INTERNAL_BASE;
84 mask = bcm_perf_readl(PERF_IRQMASK_REG); 84 mask = bcm_perf_readl(PERF_IRQMASK_REG);
85 mask &= ~(1 << irq); 85 mask &= ~(1 << irq);
86 bcm_perf_writel(mask, PERF_IRQMASK_REG); 86 bcm_perf_writel(mask, PERF_IRQMASK_REG);
87} 87}
88 88
89static void bcm63xx_internal_irq_unmask(unsigned int irq) 89static void bcm63xx_internal_irq_unmask(struct irq_data *d)
90{ 90{
91 unsigned int irq = d->irq - IRQ_INTERNAL_BASE;
91 u32 mask; 92 u32 mask;
92 93
93 irq -= IRQ_INTERNAL_BASE;
94 mask = bcm_perf_readl(PERF_IRQMASK_REG); 94 mask = bcm_perf_readl(PERF_IRQMASK_REG);
95 mask |= (1 << irq); 95 mask |= (1 << irq);
96 bcm_perf_writel(mask, PERF_IRQMASK_REG); 96 bcm_perf_writel(mask, PERF_IRQMASK_REG);
97} 97}
98 98
99static unsigned int bcm63xx_internal_irq_startup(unsigned int irq)
100{
101 bcm63xx_internal_irq_unmask(irq);
102 return 0;
103}
104
105/* 99/*
106 * external IRQs operations: mask/unmask and clear on PERF external 100 * external IRQs operations: mask/unmask and clear on PERF external
107 * irq control register. 101 * irq control register.
108 */ 102 */
109static void bcm63xx_external_irq_mask(unsigned int irq) 103static void bcm63xx_external_irq_mask(struct irq_data *d)
110{ 104{
105 unsigned int irq = d->irq - IRQ_EXT_BASE;
111 u32 reg; 106 u32 reg;
112 107
113 irq -= IRQ_EXT_BASE;
114 reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); 108 reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG);
115 reg &= ~EXTIRQ_CFG_MASK(irq); 109 reg &= ~EXTIRQ_CFG_MASK(irq);
116 bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); 110 bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG);
117} 111}
118 112
119static void bcm63xx_external_irq_unmask(unsigned int irq) 113static void bcm63xx_external_irq_unmask(struct irq_data *d)
120{ 114{
115 unsigned int irq = d->irq - IRQ_EXT_BASE;
121 u32 reg; 116 u32 reg;
122 117
123 irq -= IRQ_EXT_BASE;
124 reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); 118 reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG);
125 reg |= EXTIRQ_CFG_MASK(irq); 119 reg |= EXTIRQ_CFG_MASK(irq);
126 bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); 120 bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG);
127} 121}
128 122
129static void bcm63xx_external_irq_clear(unsigned int irq) 123static void bcm63xx_external_irq_clear(struct irq_data *d)
130{ 124{
125 unsigned int irq = d->irq - IRQ_EXT_BASE;
131 u32 reg; 126 u32 reg;
132 127
133 irq -= IRQ_EXT_BASE;
134 reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); 128 reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG);
135 reg |= EXTIRQ_CFG_CLEAR(irq); 129 reg |= EXTIRQ_CFG_CLEAR(irq);
136 bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); 130 bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG);
137} 131}
138 132
139static unsigned int bcm63xx_external_irq_startup(unsigned int irq) 133static unsigned int bcm63xx_external_irq_startup(struct irq_data *d)
140{ 134{
141 set_c0_status(0x100 << (irq - IRQ_MIPS_BASE)); 135 set_c0_status(0x100 << (d->irq - IRQ_MIPS_BASE));
142 irq_enable_hazard(); 136 irq_enable_hazard();
143 bcm63xx_external_irq_unmask(irq); 137 bcm63xx_external_irq_unmask(d);
144 return 0; 138 return 0;
145} 139}
146 140
147static void bcm63xx_external_irq_shutdown(unsigned int irq) 141static void bcm63xx_external_irq_shutdown(struct irq_data *d)
148{ 142{
149 bcm63xx_external_irq_mask(irq); 143 bcm63xx_external_irq_mask(d);
150 clear_c0_status(0x100 << (irq - IRQ_MIPS_BASE)); 144 clear_c0_status(0x100 << (d->irq - IRQ_MIPS_BASE));
151 irq_disable_hazard(); 145 irq_disable_hazard();
152} 146}
153 147
154static int bcm63xx_external_irq_set_type(unsigned int irq, 148static int bcm63xx_external_irq_set_type(struct irq_data *d,
155 unsigned int flow_type) 149 unsigned int flow_type)
156{ 150{
151 unsigned int irq = d->irq - IRQ_EXT_BASE;
157 u32 reg; 152 u32 reg;
158 struct irq_desc *desc = irq_desc + irq;
159
160 irq -= IRQ_EXT_BASE;
161 153
162 flow_type &= IRQ_TYPE_SENSE_MASK; 154 flow_type &= IRQ_TYPE_SENSE_MASK;
163 155
@@ -199,37 +191,32 @@ static int bcm63xx_external_irq_set_type(unsigned int irq,
199 } 191 }
200 bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); 192 bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG);
201 193
202 if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) { 194 irqd_set_trigger_type(d, flow_type);
203 desc->status |= IRQ_LEVEL; 195 if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
204 desc->handle_irq = handle_level_irq; 196 __irq_set_handler_locked(d->irq, handle_level_irq);
205 } else { 197 else
206 desc->handle_irq = handle_edge_irq; 198 __irq_set_handler_locked(d->irq, handle_edge_irq);
207 }
208 199
209 return 0; 200 return IRQ_SET_MASK_OK_NOCOPY;
210} 201}
211 202
212static struct irq_chip bcm63xx_internal_irq_chip = { 203static struct irq_chip bcm63xx_internal_irq_chip = {
213 .name = "bcm63xx_ipic", 204 .name = "bcm63xx_ipic",
214 .startup = bcm63xx_internal_irq_startup, 205 .irq_mask = bcm63xx_internal_irq_mask,
215 .shutdown = bcm63xx_internal_irq_mask, 206 .irq_unmask = bcm63xx_internal_irq_unmask,
216
217 .mask = bcm63xx_internal_irq_mask,
218 .mask_ack = bcm63xx_internal_irq_mask,
219 .unmask = bcm63xx_internal_irq_unmask,
220}; 207};
221 208
222static struct irq_chip bcm63xx_external_irq_chip = { 209static struct irq_chip bcm63xx_external_irq_chip = {
223 .name = "bcm63xx_epic", 210 .name = "bcm63xx_epic",
224 .startup = bcm63xx_external_irq_startup, 211 .irq_startup = bcm63xx_external_irq_startup,
225 .shutdown = bcm63xx_external_irq_shutdown, 212 .irq_shutdown = bcm63xx_external_irq_shutdown,
226 213
227 .ack = bcm63xx_external_irq_clear, 214 .irq_ack = bcm63xx_external_irq_clear,
228 215
229 .mask = bcm63xx_external_irq_mask, 216 .irq_mask = bcm63xx_external_irq_mask,
230 .unmask = bcm63xx_external_irq_unmask, 217 .irq_unmask = bcm63xx_external_irq_unmask,
231 218
232 .set_type = bcm63xx_external_irq_set_type, 219 .irq_set_type = bcm63xx_external_irq_set_type,
233}; 220};
234 221
235static struct irqaction cpu_ip2_cascade_action = { 222static struct irqaction cpu_ip2_cascade_action = {
diff --git a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c
index cb41954fc321..8d9a5fc607e4 100644
--- a/arch/mips/dec/ioasic-irq.c
+++ b/arch/mips/dec/ioasic-irq.c
@@ -17,80 +17,48 @@
17#include <asm/dec/ioasic_addrs.h> 17#include <asm/dec/ioasic_addrs.h>
18#include <asm/dec/ioasic_ints.h> 18#include <asm/dec/ioasic_ints.h>
19 19
20
21static int ioasic_irq_base; 20static int ioasic_irq_base;
22 21
23 22static void unmask_ioasic_irq(struct irq_data *d)
24static inline void unmask_ioasic_irq(unsigned int irq)
25{ 23{
26 u32 simr; 24 u32 simr;
27 25
28 simr = ioasic_read(IO_REG_SIMR); 26 simr = ioasic_read(IO_REG_SIMR);
29 simr |= (1 << (irq - ioasic_irq_base)); 27 simr |= (1 << (d->irq - ioasic_irq_base));
30 ioasic_write(IO_REG_SIMR, simr); 28 ioasic_write(IO_REG_SIMR, simr);
31} 29}
32 30
33static inline void mask_ioasic_irq(unsigned int irq) 31static void mask_ioasic_irq(struct irq_data *d)
34{ 32{
35 u32 simr; 33 u32 simr;
36 34
37 simr = ioasic_read(IO_REG_SIMR); 35 simr = ioasic_read(IO_REG_SIMR);
38 simr &= ~(1 << (irq - ioasic_irq_base)); 36 simr &= ~(1 << (d->irq - ioasic_irq_base));
39 ioasic_write(IO_REG_SIMR, simr); 37 ioasic_write(IO_REG_SIMR, simr);
40} 38}
41 39
42static inline void clear_ioasic_irq(unsigned int irq) 40static void ack_ioasic_irq(struct irq_data *d)
43{ 41{
44 u32 sir; 42 mask_ioasic_irq(d);
45
46 sir = ~(1 << (irq - ioasic_irq_base));
47 ioasic_write(IO_REG_SIR, sir);
48}
49
50static inline void ack_ioasic_irq(unsigned int irq)
51{
52 mask_ioasic_irq(irq);
53 fast_iob(); 43 fast_iob();
54} 44}
55 45
56static inline void end_ioasic_irq(unsigned int irq)
57{
58 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
59 unmask_ioasic_irq(irq);
60}
61
62static struct irq_chip ioasic_irq_type = { 46static struct irq_chip ioasic_irq_type = {
63 .name = "IO-ASIC", 47 .name = "IO-ASIC",
64 .ack = ack_ioasic_irq, 48 .irq_ack = ack_ioasic_irq,
65 .mask = mask_ioasic_irq, 49 .irq_mask = mask_ioasic_irq,
66 .mask_ack = ack_ioasic_irq, 50 .irq_mask_ack = ack_ioasic_irq,
67 .unmask = unmask_ioasic_irq, 51 .irq_unmask = unmask_ioasic_irq,
68}; 52};
69 53
70
71#define unmask_ioasic_dma_irq unmask_ioasic_irq
72
73#define mask_ioasic_dma_irq mask_ioasic_irq
74
75#define ack_ioasic_dma_irq ack_ioasic_irq
76
77static inline void end_ioasic_dma_irq(unsigned int irq)
78{
79 clear_ioasic_irq(irq);
80 fast_iob();
81 end_ioasic_irq(irq);
82}
83
84static struct irq_chip ioasic_dma_irq_type = { 54static struct irq_chip ioasic_dma_irq_type = {
85 .name = "IO-ASIC-DMA", 55 .name = "IO-ASIC-DMA",
86 .ack = ack_ioasic_dma_irq, 56 .irq_ack = ack_ioasic_irq,
87 .mask = mask_ioasic_dma_irq, 57 .irq_mask = mask_ioasic_irq,
88 .mask_ack = ack_ioasic_dma_irq, 58 .irq_mask_ack = ack_ioasic_irq,
89 .unmask = unmask_ioasic_dma_irq, 59 .irq_unmask = unmask_ioasic_irq,
90 .end = end_ioasic_dma_irq,
91}; 60};
92 61
93
94void __init init_ioasic_irqs(int base) 62void __init init_ioasic_irqs(int base)
95{ 63{
96 int i; 64 int i;
diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c
index ed90a8deabcc..ef31d98c4fb8 100644
--- a/arch/mips/dec/kn02-irq.c
+++ b/arch/mips/dec/kn02-irq.c
@@ -27,43 +27,40 @@
27 */ 27 */
28u32 cached_kn02_csr; 28u32 cached_kn02_csr;
29 29
30
31static int kn02_irq_base; 30static int kn02_irq_base;
32 31
33 32static void unmask_kn02_irq(struct irq_data *d)
34static inline void unmask_kn02_irq(unsigned int irq)
35{ 33{
36 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + 34 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
37 KN02_CSR); 35 KN02_CSR);
38 36
39 cached_kn02_csr |= (1 << (irq - kn02_irq_base + 16)); 37 cached_kn02_csr |= (1 << (d->irq - kn02_irq_base + 16));
40 *csr = cached_kn02_csr; 38 *csr = cached_kn02_csr;
41} 39}
42 40
43static inline void mask_kn02_irq(unsigned int irq) 41static void mask_kn02_irq(struct irq_data *d)
44{ 42{
45 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + 43 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
46 KN02_CSR); 44 KN02_CSR);
47 45
48 cached_kn02_csr &= ~(1 << (irq - kn02_irq_base + 16)); 46 cached_kn02_csr &= ~(1 << (d->irq - kn02_irq_base + 16));
49 *csr = cached_kn02_csr; 47 *csr = cached_kn02_csr;
50} 48}
51 49
52static void ack_kn02_irq(unsigned int irq) 50static void ack_kn02_irq(struct irq_data *d)
53{ 51{
54 mask_kn02_irq(irq); 52 mask_kn02_irq(d);
55 iob(); 53 iob();
56} 54}
57 55
58static struct irq_chip kn02_irq_type = { 56static struct irq_chip kn02_irq_type = {
59 .name = "KN02-CSR", 57 .name = "KN02-CSR",
60 .ack = ack_kn02_irq, 58 .irq_ack = ack_kn02_irq,
61 .mask = mask_kn02_irq, 59 .irq_mask = mask_kn02_irq,
62 .mask_ack = ack_kn02_irq, 60 .irq_mask_ack = ack_kn02_irq,
63 .unmask = unmask_kn02_irq, 61 .irq_unmask = unmask_kn02_irq,
64}; 62};
65 63
66
67void __init init_kn02_irqs(int base) 64void __init init_kn02_irqs(int base)
68{ 65{
69 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + 66 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c
index 3a96799eb65f..9b1207ae2256 100644
--- a/arch/mips/emma/markeins/irq.c
+++ b/arch/mips/emma/markeins/irq.c
@@ -34,13 +34,10 @@
34 34
35#include <asm/emma/emma2rh.h> 35#include <asm/emma/emma2rh.h>
36 36
37static void emma2rh_irq_enable(unsigned int irq) 37static void emma2rh_irq_enable(struct irq_data *d)
38{ 38{
39 u32 reg_value; 39 unsigned int irq = d->irq - EMMA2RH_IRQ_BASE;
40 u32 reg_bitmask; 40 u32 reg_value, reg_bitmask, reg_index;
41 u32 reg_index;
42
43 irq -= EMMA2RH_IRQ_BASE;
44 41
45 reg_index = EMMA2RH_BHIF_INT_EN_0 + 42 reg_index = EMMA2RH_BHIF_INT_EN_0 +
46 (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * (irq / 32); 43 (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * (irq / 32);
@@ -49,13 +46,10 @@ static void emma2rh_irq_enable(unsigned int irq)
49 emma2rh_out32(reg_index, reg_value | reg_bitmask); 46 emma2rh_out32(reg_index, reg_value | reg_bitmask);
50} 47}
51 48
52static void emma2rh_irq_disable(unsigned int irq) 49static void emma2rh_irq_disable(struct irq_data *d)
53{ 50{
54 u32 reg_value; 51 unsigned int irq = d->irq - EMMA2RH_IRQ_BASE;
55 u32 reg_bitmask; 52 u32 reg_value, reg_bitmask, reg_index;
56 u32 reg_index;
57
58 irq -= EMMA2RH_IRQ_BASE;
59 53
60 reg_index = EMMA2RH_BHIF_INT_EN_0 + 54 reg_index = EMMA2RH_BHIF_INT_EN_0 +
61 (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * (irq / 32); 55 (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * (irq / 32);
@@ -66,10 +60,8 @@ static void emma2rh_irq_disable(unsigned int irq)
66 60
67struct irq_chip emma2rh_irq_controller = { 61struct irq_chip emma2rh_irq_controller = {
68 .name = "emma2rh_irq", 62 .name = "emma2rh_irq",
69 .ack = emma2rh_irq_disable, 63 .irq_mask = emma2rh_irq_disable,
70 .mask = emma2rh_irq_disable, 64 .irq_unmask = emma2rh_irq_enable,
71 .mask_ack = emma2rh_irq_disable,
72 .unmask = emma2rh_irq_enable,
73}; 65};
74 66
75void emma2rh_irq_init(void) 67void emma2rh_irq_init(void)
@@ -82,23 +74,21 @@ void emma2rh_irq_init(void)
82 handle_level_irq, "level"); 74 handle_level_irq, "level");
83} 75}
84 76
85static void emma2rh_sw_irq_enable(unsigned int irq) 77static void emma2rh_sw_irq_enable(struct irq_data *d)
86{ 78{
79 unsigned int irq = d->irq - EMMA2RH_SW_IRQ_BASE;
87 u32 reg; 80 u32 reg;
88 81
89 irq -= EMMA2RH_SW_IRQ_BASE;
90
91 reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); 82 reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
92 reg |= 1 << irq; 83 reg |= 1 << irq;
93 emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg); 84 emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
94} 85}
95 86
96static void emma2rh_sw_irq_disable(unsigned int irq) 87static void emma2rh_sw_irq_disable(struct irq_data *d)
97{ 88{
89 unsigned int irq = d->irq - EMMA2RH_SW_IRQ_BASE;
98 u32 reg; 90 u32 reg;
99 91
100 irq -= EMMA2RH_SW_IRQ_BASE;
101
102 reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); 92 reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
103 reg &= ~(1 << irq); 93 reg &= ~(1 << irq);
104 emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg); 94 emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
@@ -106,10 +96,8 @@ static void emma2rh_sw_irq_disable(unsigned int irq)
106 96
107struct irq_chip emma2rh_sw_irq_controller = { 97struct irq_chip emma2rh_sw_irq_controller = {
108 .name = "emma2rh_sw_irq", 98 .name = "emma2rh_sw_irq",
109 .ack = emma2rh_sw_irq_disable, 99 .irq_mask = emma2rh_sw_irq_disable,
110 .mask = emma2rh_sw_irq_disable, 100 .irq_unmask = emma2rh_sw_irq_enable,
111 .mask_ack = emma2rh_sw_irq_disable,
112 .unmask = emma2rh_sw_irq_enable,
113}; 101};
114 102
115void emma2rh_sw_irq_init(void) 103void emma2rh_sw_irq_init(void)
@@ -122,39 +110,38 @@ void emma2rh_sw_irq_init(void)
122 handle_level_irq, "level"); 110 handle_level_irq, "level");
123} 111}
124 112
125static void emma2rh_gpio_irq_enable(unsigned int irq) 113static void emma2rh_gpio_irq_enable(struct irq_data *d)
126{ 114{
115 unsigned int irq = d->irq - EMMA2RH_GPIO_IRQ_BASE;
127 u32 reg; 116 u32 reg;
128 117
129 irq -= EMMA2RH_GPIO_IRQ_BASE;
130
131 reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); 118 reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
132 reg |= 1 << irq; 119 reg |= 1 << irq;
133 emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); 120 emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
134} 121}
135 122
136static void emma2rh_gpio_irq_disable(unsigned int irq) 123static void emma2rh_gpio_irq_disable(struct irq_data *d)
137{ 124{
125 unsigned int irq = d->irq - EMMA2RH_GPIO_IRQ_BASE;
138 u32 reg; 126 u32 reg;
139 127
140 irq -= EMMA2RH_GPIO_IRQ_BASE;
141
142 reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); 128 reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
143 reg &= ~(1 << irq); 129 reg &= ~(1 << irq);
144 emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); 130 emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
145} 131}
146 132
147static void emma2rh_gpio_irq_ack(unsigned int irq) 133static void emma2rh_gpio_irq_ack(struct irq_data *d)
148{ 134{
149 irq -= EMMA2RH_GPIO_IRQ_BASE; 135 unsigned int irq = d->irq - EMMA2RH_GPIO_IRQ_BASE;
136
150 emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq)); 137 emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
151} 138}
152 139
153static void emma2rh_gpio_irq_mask_ack(unsigned int irq) 140static void emma2rh_gpio_irq_mask_ack(struct irq_data *d)
154{ 141{
142 unsigned int irq = d->irq - EMMA2RH_GPIO_IRQ_BASE;
155 u32 reg; 143 u32 reg;
156 144
157 irq -= EMMA2RH_GPIO_IRQ_BASE;
158 emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq)); 145 emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
159 146
160 reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); 147 reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
@@ -164,10 +151,10 @@ static void emma2rh_gpio_irq_mask_ack(unsigned int irq)
164 151
165struct irq_chip emma2rh_gpio_irq_controller = { 152struct irq_chip emma2rh_gpio_irq_controller = {
166 .name = "emma2rh_gpio_irq", 153 .name = "emma2rh_gpio_irq",
167 .ack = emma2rh_gpio_irq_ack, 154 .irq_ack = emma2rh_gpio_irq_ack,
168 .mask = emma2rh_gpio_irq_disable, 155 .irq_mask = emma2rh_gpio_irq_disable,
169 .mask_ack = emma2rh_gpio_irq_mask_ack, 156 .irq_mask_ack = emma2rh_gpio_irq_mask_ack,
170 .unmask = emma2rh_gpio_irq_enable, 157 .irq_unmask = emma2rh_gpio_irq_enable,
171}; 158};
172 159
173void emma2rh_gpio_irq_init(void) 160void emma2rh_gpio_irq_init(void)
diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h
index 50b4ef288c53..2e1ad4c652b7 100644
--- a/arch/mips/include/asm/bitops.h
+++ b/arch/mips/include/asm/bitops.h
@@ -676,9 +676,8 @@ static inline int ffs(int word)
676#include <asm/arch_hweight.h> 676#include <asm/arch_hweight.h>
677#include <asm-generic/bitops/const_hweight.h> 677#include <asm-generic/bitops/const_hweight.h>
678 678
679#include <asm-generic/bitops/ext2-non-atomic.h> 679#include <asm-generic/bitops/le.h>
680#include <asm-generic/bitops/ext2-atomic.h> 680#include <asm-generic/bitops/ext2-atomic.h>
681#include <asm-generic/bitops/minix.h>
682 681
683#endif /* __KERNEL__ */ 682#endif /* __KERNEL__ */
684 683
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h
index b003ed52ed17..0ec01294b063 100644
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -55,9 +55,9 @@ static inline void smtc_im_ack_irq(unsigned int irq)
55#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF 55#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
56#include <linux/cpumask.h> 56#include <linux/cpumask.h>
57 57
58extern int plat_set_irq_affinity(unsigned int irq, 58extern int plat_set_irq_affinity(struct irq_data *d,
59 const struct cpumask *affinity); 59 const struct cpumask *affinity, bool force);
60extern void smtc_forward_irq(unsigned int irq); 60extern void smtc_forward_irq(struct irq_data *d);
61 61
62/* 62/*
63 * IRQ affinity hook invoked at the beginning of interrupt dispatch 63 * IRQ affinity hook invoked at the beginning of interrupt dispatch
@@ -70,51 +70,53 @@ extern void smtc_forward_irq(unsigned int irq);
70 * cpumask implementations, this version is optimistically assuming 70 * cpumask implementations, this version is optimistically assuming
71 * that cpumask.h macro overhead is reasonable during interrupt dispatch. 71 * that cpumask.h macro overhead is reasonable during interrupt dispatch.
72 */ 72 */
73#define IRQ_AFFINITY_HOOK(irq) \ 73static inline int handle_on_other_cpu(unsigned int irq)
74do { \ 74{
75 if (!cpumask_test_cpu(smp_processor_id(), irq_desc[irq].affinity)) {\ 75 struct irq_data *d = irq_get_irq_data(irq);
76 smtc_forward_irq(irq); \ 76
77 irq_exit(); \ 77 if (cpumask_test_cpu(smp_processor_id(), d->affinity))
78 return; \ 78 return 0;
79 } \ 79 smtc_forward_irq(d);
80} while (0) 80 return 1;
81}
81 82
82#else /* Not doing SMTC affinity */ 83#else /* Not doing SMTC affinity */
83 84
84#define IRQ_AFFINITY_HOOK(irq) do { } while (0) 85static inline int handle_on_other_cpu(unsigned int irq) { return 0; }
85 86
86#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ 87#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */
87 88
88#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP 89#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
89 90
91static inline void smtc_im_backstop(unsigned int irq)
92{
93 if (irq_hwmask[irq] & 0x0000ff00)
94 write_c0_tccontext(read_c0_tccontext() &
95 ~(irq_hwmask[irq] & 0x0000ff00));
96}
97
90/* 98/*
91 * Clear interrupt mask handling "backstop" if irq_hwmask 99 * Clear interrupt mask handling "backstop" if irq_hwmask
92 * entry so indicates. This implies that the ack() or end() 100 * entry so indicates. This implies that the ack() or end()
93 * functions will take over re-enabling the low-level mask. 101 * functions will take over re-enabling the low-level mask.
94 * Otherwise it will be done on return from exception. 102 * Otherwise it will be done on return from exception.
95 */ 103 */
96#define __DO_IRQ_SMTC_HOOK(irq) \ 104static inline int smtc_handle_on_other_cpu(unsigned int irq)
97do { \ 105{
98 IRQ_AFFINITY_HOOK(irq); \ 106 int ret = handle_on_other_cpu(irq);
99 if (irq_hwmask[irq] & 0x0000ff00) \ 107
100 write_c0_tccontext(read_c0_tccontext() & \ 108 if (!ret)
101 ~(irq_hwmask[irq] & 0x0000ff00)); \ 109 smtc_im_backstop(irq);
102} while (0) 110 return ret;
103 111}
104#define __NO_AFFINITY_IRQ_SMTC_HOOK(irq) \
105do { \
106 if (irq_hwmask[irq] & 0x0000ff00) \
107 write_c0_tccontext(read_c0_tccontext() & \
108 ~(irq_hwmask[irq] & 0x0000ff00)); \
109} while (0)
110 112
111#else 113#else
112 114
113#define __DO_IRQ_SMTC_HOOK(irq) \ 115static inline void smtc_im_backstop(unsigned int irq) { }
114do { \ 116static inline int smtc_handle_on_other_cpu(unsigned int irq)
115 IRQ_AFFINITY_HOOK(irq); \ 117{
116} while (0) 118 return handle_on_other_cpu(irq);
117#define __NO_AFFINITY_IRQ_SMTC_HOOK(irq) do { } while (0) 119}
118 120
119#endif 121#endif
120 122
diff --git a/arch/mips/include/asm/pmc-sierra/msp71xx/cpu-feature-overrides.h b/arch/mips/include/asm/pmc-sierra/msp71xx/cpu-feature-overrides.h
new file mode 100644
index 000000000000..a80801b094bd
--- /dev/null
+++ b/arch/mips/include/asm/pmc-sierra/msp71xx/cpu-feature-overrides.h
@@ -0,0 +1,21 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003, 04, 07 Ralf Baechle (ralf@linux-mips.org)
7 */
8#ifndef __ASM_MACH_MSP71XX_CPU_FEATURE_OVERRIDES_H
9#define __ASM_MACH_MSP71XX_CPU_FEATURE_OVERRIDES_H
10
11#define cpu_has_mips16 1
12#define cpu_has_dsp 1
13#define cpu_has_mipsmt 1
14#define cpu_has_fpu 0
15
16#define cpu_has_mips32r1 0
17#define cpu_has_mips32r2 1
18#define cpu_has_mips64r1 0
19#define cpu_has_mips64r2 0
20
21#endif /* __ASM_MACH_MSP71XX_CPU_FEATURE_OVERRIDES_H */
diff --git a/arch/mips/include/asm/pmc-sierra/msp71xx/msp_gpio_macros.h b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_gpio_macros.h
new file mode 100644
index 000000000000..156f320c69e7
--- /dev/null
+++ b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_gpio_macros.h
@@ -0,0 +1,343 @@
1/*
2 *
3 * Macros for external SMP-safe access to the PMC MSP71xx reference
4 * board GPIO pins
5 *
6 * Copyright 2010 PMC-Sierra, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __MSP_GPIO_MACROS_H__
30#define __MSP_GPIO_MACROS_H__
31
32#include <msp_regops.h>
33#include <msp_regs.h>
34
35#ifdef CONFIG_PMC_MSP7120_GW
36#define MSP_NUM_GPIOS 20
37#else
38#define MSP_NUM_GPIOS 28
39#endif
40
41/* -- GPIO Enumerations -- */
42enum msp_gpio_data {
43 MSP_GPIO_LO = 0,
44 MSP_GPIO_HI = 1,
45 MSP_GPIO_NONE, /* Special - Means pin is out of range */
46 MSP_GPIO_TOGGLE, /* Special - Sets pin to opposite */
47};
48
49enum msp_gpio_mode {
50 MSP_GPIO_INPUT = 0x0,
51 /* MSP_GPIO_ INTERRUPT = 0x1, Not supported yet */
52 MSP_GPIO_UART_INPUT = 0x2, /* Only GPIO 4 or 5 */
53 MSP_GPIO_OUTPUT = 0x8,
54 MSP_GPIO_UART_OUTPUT = 0x9, /* Only GPIO 2 or 3 */
55 MSP_GPIO_PERIF_TIMERA = 0x9, /* Only GPIO 0 or 1 */
56 MSP_GPIO_PERIF_TIMERB = 0xa, /* Only GPIO 0 or 1 */
57 MSP_GPIO_UNKNOWN = 0xb, /* No such GPIO or mode */
58};
59
60/* -- Static Tables -- */
61
62/* Maps pins to data register */
63static volatile u32 * const MSP_GPIO_DATA_REGISTER[] = {
64 /* GPIO 0 and 1 on the first register */
65 GPIO_DATA1_REG, GPIO_DATA1_REG,
66 /* GPIO 2, 3, 4, and 5 on the second register */
67 GPIO_DATA2_REG, GPIO_DATA2_REG, GPIO_DATA2_REG, GPIO_DATA2_REG,
68 /* GPIO 6, 7, 8, and 9 on the third register */
69 GPIO_DATA3_REG, GPIO_DATA3_REG, GPIO_DATA3_REG, GPIO_DATA3_REG,
70 /* GPIO 10, 11, 12, 13, 14, and 15 on the fourth register */
71 GPIO_DATA4_REG, GPIO_DATA4_REG, GPIO_DATA4_REG, GPIO_DATA4_REG,
72 GPIO_DATA4_REG, GPIO_DATA4_REG,
73 /* GPIO 16 - 23 on the first strange EXTENDED register */
74 EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG,
75 EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG,
76 EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG,
77 /* GPIO 24 - 27 on the second strange EXTENDED register */
78 EXTENDED_GPIO2_REG, EXTENDED_GPIO2_REG, EXTENDED_GPIO2_REG,
79 EXTENDED_GPIO2_REG,
80};
81
82/* Maps pins to mode register */
83static volatile u32 * const MSP_GPIO_MODE_REGISTER[] = {
84 /* GPIO 0 and 1 on the first register */
85 GPIO_CFG1_REG, GPIO_CFG1_REG,
86 /* GPIO 2, 3, 4, and 5 on the second register */
87 GPIO_CFG2_REG, GPIO_CFG2_REG, GPIO_CFG2_REG, GPIO_CFG2_REG,
88 /* GPIO 6, 7, 8, and 9 on the third register */
89 GPIO_CFG3_REG, GPIO_CFG3_REG, GPIO_CFG3_REG, GPIO_CFG3_REG,
90 /* GPIO 10, 11, 12, 13, 14, and 15 on the fourth register */
91 GPIO_CFG4_REG, GPIO_CFG4_REG, GPIO_CFG4_REG, GPIO_CFG4_REG,
92 GPIO_CFG4_REG, GPIO_CFG4_REG,
93 /* GPIO 16 - 23 on the first strange EXTENDED register */
94 EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG,
95 EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG,
96 EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG,
97 /* GPIO 24 - 27 on the second strange EXTENDED register */
98 EXTENDED_GPIO2_REG, EXTENDED_GPIO2_REG, EXTENDED_GPIO2_REG,
99 EXTENDED_GPIO2_REG,
100};
101
102/* Maps 'basic' pins to relative offset from 0 per register */
103static int MSP_GPIO_OFFSET[] = {
104 /* GPIO 0 and 1 on the first register */
105 0, 0,
106 /* GPIO 2, 3, 4, and 5 on the second register */
107 2, 2, 2, 2,
108 /* GPIO 6, 7, 8, and 9 on the third register */
109 6, 6, 6, 6,
110 /* GPIO 10, 11, 12, 13, 14, and 15 on the fourth register */
111 10, 10, 10, 10, 10, 10,
112};
113
114/* Maps MODE to allowed pin mask */
115static unsigned int MSP_GPIO_MODE_ALLOWED[] = {
116 0xffffffff, /* Mode 0 - INPUT */
117 0x00000, /* Mode 1 - INTERRUPT */
118 0x00030, /* Mode 2 - UART_INPUT (GPIO 4, 5)*/
119 0, 0, 0, 0, 0, /* Modes 3, 4, 5, 6, and 7 are reserved */
120 0xffffffff, /* Mode 8 - OUTPUT */
121 0x0000f, /* Mode 9 - UART_OUTPUT/
122 PERF_TIMERA (GPIO 0, 1, 2, 3) */
123 0x00003, /* Mode a - PERF_TIMERB (GPIO 0, 1) */
124 0x00000, /* Mode b - Not really a mode! */
125};
126
127/* -- Bit masks -- */
128
129/* This gives you the 'register relative offset gpio' number */
130#define OFFSET_GPIO_NUMBER(gpio) (gpio - MSP_GPIO_OFFSET[gpio])
131
132/* These take the 'register relative offset gpio' number */
133#define BASIC_DATA_REG_MASK(ogpio) (1 << ogpio)
134#define BASIC_MODE_REG_VALUE(mode, ogpio) \
135 (mode << BASIC_MODE_REG_SHIFT(ogpio))
136#define BASIC_MODE_REG_MASK(ogpio) \
137 BASIC_MODE_REG_VALUE(0xf, ogpio)
138#define BASIC_MODE_REG_SHIFT(ogpio) (ogpio * 4)
139#define BASIC_MODE_REG_FROM_REG(data, ogpio) \
140 ((data & BASIC_MODE_REG_MASK(ogpio)) >> BASIC_MODE_REG_SHIFT(ogpio))
141
142/* These take the actual GPIO number (0 through 15) */
143#define BASIC_DATA_MASK(gpio) \
144 BASIC_DATA_REG_MASK(OFFSET_GPIO_NUMBER(gpio))
145#define BASIC_MODE_MASK(gpio) \
146 BASIC_MODE_REG_MASK(OFFSET_GPIO_NUMBER(gpio))
147#define BASIC_MODE(mode, gpio) \
148 BASIC_MODE_REG_VALUE(mode, OFFSET_GPIO_NUMBER(gpio))
149#define BASIC_MODE_SHIFT(gpio) \
150 BASIC_MODE_REG_SHIFT(OFFSET_GPIO_NUMBER(gpio))
151#define BASIC_MODE_FROM_REG(data, gpio) \
152 BASIC_MODE_REG_FROM_REG(data, OFFSET_GPIO_NUMBER(gpio))
153
154/*
155 * Each extended GPIO register is 32 bits long and is responsible for up to
156 * eight GPIOs. The least significant 16 bits contain the set and clear bit
157 * pair for each of the GPIOs. The most significant 16 bits contain the
158 * disable and enable bit pair for each of the GPIOs. For example, the
159 * extended GPIO reg for GPIOs 16-23 is as follows:
160 *
161 * 31: GPIO23_DISABLE
162 * ...
163 * 19: GPIO17_DISABLE
164 * 18: GPIO17_ENABLE
165 * 17: GPIO16_DISABLE
166 * 16: GPIO16_ENABLE
167 * ...
168 * 3: GPIO17_SET
169 * 2: GPIO17_CLEAR
170 * 1: GPIO16_SET
171 * 0: GPIO16_CLEAR
172 */
173
174/* This gives the 'register relative offset gpio' number */
175#define EXTENDED_OFFSET_GPIO(gpio) (gpio < 24 ? gpio - 16 : gpio - 24)
176
177/* These take the 'register relative offset gpio' number */
178#define EXTENDED_REG_DISABLE(ogpio) (0x2 << ((ogpio * 2) + 16))
179#define EXTENDED_REG_ENABLE(ogpio) (0x1 << ((ogpio * 2) + 16))
180#define EXTENDED_REG_SET(ogpio) (0x2 << (ogpio * 2))
181#define EXTENDED_REG_CLR(ogpio) (0x1 << (ogpio * 2))
182
183/* These take the actual GPIO number (16 through 27) */
184#define EXTENDED_DISABLE(gpio) \
185 EXTENDED_REG_DISABLE(EXTENDED_OFFSET_GPIO(gpio))
186#define EXTENDED_ENABLE(gpio) \
187 EXTENDED_REG_ENABLE(EXTENDED_OFFSET_GPIO(gpio))
188#define EXTENDED_SET(gpio) \
189 EXTENDED_REG_SET(EXTENDED_OFFSET_GPIO(gpio))
190#define EXTENDED_CLR(gpio) \
191 EXTENDED_REG_CLR(EXTENDED_OFFSET_GPIO(gpio))
192
193#define EXTENDED_FULL_MASK (0xffffffff)
194
195/* -- API inline-functions -- */
196
197/*
198 * Gets the current value of the specified pin
199 */
200static inline enum msp_gpio_data msp_gpio_pin_get(unsigned int gpio)
201{
202 u32 pinhi_mask = 0, pinhi_mask2 = 0;
203
204 if (gpio >= MSP_NUM_GPIOS)
205 return MSP_GPIO_NONE;
206
207 if (gpio < 16) {
208 pinhi_mask = BASIC_DATA_MASK(gpio);
209 } else {
210 /*
211 * Two cases are possible with the EXTENDED register:
212 * - In output mode (ENABLED flag set), check the CLR bit
213 * - In input mode (ENABLED flag not set), check the SET bit
214 */
215 pinhi_mask = EXTENDED_ENABLE(gpio) | EXTENDED_CLR(gpio);
216 pinhi_mask2 = EXTENDED_SET(gpio);
217 }
218 if (((*MSP_GPIO_DATA_REGISTER[gpio] & pinhi_mask) == pinhi_mask) ||
219 (*MSP_GPIO_DATA_REGISTER[gpio] & pinhi_mask2))
220 return MSP_GPIO_HI;
221 else
222 return MSP_GPIO_LO;
223}
224
225/* Sets the specified pin to the specified value */
226static inline void msp_gpio_pin_set(enum msp_gpio_data data, unsigned int gpio)
227{
228 if (gpio >= MSP_NUM_GPIOS)
229 return;
230
231 if (gpio < 16) {
232 if (data == MSP_GPIO_TOGGLE)
233 toggle_reg32(MSP_GPIO_DATA_REGISTER[gpio],
234 BASIC_DATA_MASK(gpio));
235 else if (data == MSP_GPIO_HI)
236 set_reg32(MSP_GPIO_DATA_REGISTER[gpio],
237 BASIC_DATA_MASK(gpio));
238 else
239 clear_reg32(MSP_GPIO_DATA_REGISTER[gpio],
240 BASIC_DATA_MASK(gpio));
241 } else {
242 if (data == MSP_GPIO_TOGGLE) {
243 /* Special ugly case:
244 * We have to read the CLR bit.
245 * If set, we write the CLR bit.
246 * If not, we write the SET bit.
247 */
248 u32 tmpdata;
249
250 custom_read_reg32(MSP_GPIO_DATA_REGISTER[gpio],
251 tmpdata);
252 if (tmpdata & EXTENDED_CLR(gpio))
253 tmpdata = EXTENDED_CLR(gpio);
254 else
255 tmpdata = EXTENDED_SET(gpio);
256 custom_write_reg32(MSP_GPIO_DATA_REGISTER[gpio],
257 tmpdata);
258 } else {
259 u32 newdata;
260
261 if (data == MSP_GPIO_HI)
262 newdata = EXTENDED_SET(gpio);
263 else
264 newdata = EXTENDED_CLR(gpio);
265 set_value_reg32(MSP_GPIO_DATA_REGISTER[gpio],
266 EXTENDED_FULL_MASK, newdata);
267 }
268 }
269}
270
271/* Sets the specified pin to the specified value */
272static inline void msp_gpio_pin_hi(unsigned int gpio)
273{
274 msp_gpio_pin_set(MSP_GPIO_HI, gpio);
275}
276
277/* Sets the specified pin to the specified value */
278static inline void msp_gpio_pin_lo(unsigned int gpio)
279{
280 msp_gpio_pin_set(MSP_GPIO_LO, gpio);
281}
282
283/* Sets the specified pin to the opposite value */
284static inline void msp_gpio_pin_toggle(unsigned int gpio)
285{
286 msp_gpio_pin_set(MSP_GPIO_TOGGLE, gpio);
287}
288
289/* Gets the mode of the specified pin */
290static inline enum msp_gpio_mode msp_gpio_pin_get_mode(unsigned int gpio)
291{
292 enum msp_gpio_mode retval = MSP_GPIO_UNKNOWN;
293 uint32_t data;
294
295 if (gpio >= MSP_NUM_GPIOS)
296 return retval;
297
298 data = *MSP_GPIO_MODE_REGISTER[gpio];
299
300 if (gpio < 16) {
301 retval = BASIC_MODE_FROM_REG(data, gpio);
302 } else {
303 /* Extended pins can only be either INPUT or OUTPUT */
304 if (data & EXTENDED_ENABLE(gpio))
305 retval = MSP_GPIO_OUTPUT;
306 else
307 retval = MSP_GPIO_INPUT;
308 }
309
310 return retval;
311}
312
313/*
314 * Sets the specified mode on the requested pin
315 * Returns 0 on success, or -1 if that mode is not allowed on this pin
316 */
317static inline int msp_gpio_pin_mode(enum msp_gpio_mode mode, unsigned int gpio)
318{
319 u32 modemask, newmode;
320
321 if ((1 << gpio) & ~MSP_GPIO_MODE_ALLOWED[mode])
322 return -1;
323
324 if (gpio >= MSP_NUM_GPIOS)
325 return -1;
326
327 if (gpio < 16) {
328 modemask = BASIC_MODE_MASK(gpio);
329 newmode = BASIC_MODE(mode, gpio);
330 } else {
331 modemask = EXTENDED_FULL_MASK;
332 if (mode == MSP_GPIO_INPUT)
333 newmode = EXTENDED_DISABLE(gpio);
334 else
335 newmode = EXTENDED_ENABLE(gpio);
336 }
337 /* Do the set atomically */
338 set_value_reg32(MSP_GPIO_MODE_REGISTER[gpio], modemask, newmode);
339
340 return 0;
341}
342
343#endif /* __MSP_GPIO_MACROS_H__ */
diff --git a/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h
index 603eb737b4a8..692c1b658b92 100644
--- a/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h
+++ b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h
@@ -91,12 +91,10 @@
91 /* MAC C device registers */ 91 /* MAC C device registers */
92#define MSP_ADSL2_BASE (MSP_MSB_BASE + 0xA80000) 92#define MSP_ADSL2_BASE (MSP_MSB_BASE + 0xA80000)
93 /* ADSL2 device registers */ 93 /* ADSL2 device registers */
94#define MSP_USB_BASE (MSP_MSB_BASE + 0xB40000) 94#define MSP_USB0_BASE (MSP_MSB_BASE + 0xB00000)
95 /* USB device registers */ 95 /* USB0 device registers */
96#define MSP_USB_BASE_START (MSP_MSB_BASE + 0xB40100) 96#define MSP_USB1_BASE (MSP_MSB_BASE + 0x300000)
97 /* USB device registers */ 97 /* USB1 device registers */
98#define MSP_USB_BASE_END (MSP_MSB_BASE + 0xB401FF)
99 /* USB device registers */
100#define MSP_CPUIF_BASE (MSP_MSB_BASE + 0xC00000) 98#define MSP_CPUIF_BASE (MSP_MSB_BASE + 0xC00000)
101 /* CPU interface registers */ 99 /* CPU interface registers */
102 100
@@ -319,8 +317,11 @@
319#define CPU_ERR2_REG regptr(MSP_SLP_BASE + 0x184) 317#define CPU_ERR2_REG regptr(MSP_SLP_BASE + 0x184)
320 /* CPU/SLP Error status 1 */ 318 /* CPU/SLP Error status 1 */
321 319
322#define EXTENDED_GPIO_REG regptr(MSP_SLP_BASE + 0x188) 320/* Extended GPIO registers */
323 /* Extended GPIO register */ 321#define EXTENDED_GPIO1_REG regptr(MSP_SLP_BASE + 0x188)
322#define EXTENDED_GPIO2_REG regptr(MSP_SLP_BASE + 0x18c)
323#define EXTENDED_GPIO_REG EXTENDED_GPIO1_REG
324 /* Backward-compatibility */
324 325
325/* System Error registers */ 326/* System Error registers */
326#define SLP_ERR_STS_REG regptr(MSP_SLP_BASE + 0x190) 327#define SLP_ERR_STS_REG regptr(MSP_SLP_BASE + 0x190)
diff --git a/arch/mips/include/asm/pmc-sierra/msp71xx/msp_usb.h b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_usb.h
new file mode 100644
index 000000000000..4c9348df9df2
--- /dev/null
+++ b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_usb.h
@@ -0,0 +1,144 @@
1/******************************************************************
2 * Copyright (c) 2000-2007 PMC-Sierra INC.
3 *
4 * This program is free software; you can redistribute it
5 * and/or modify it under the terms of the GNU General
6 * Public License as published by the Free Software
7 * Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * This program is distributed in the hope that it will be
11 * useful, but WITHOUT ANY WARRANTY; without even the implied
12 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
13 * PURPOSE. See the GNU General Public License for more
14 * details.
15 *
16 * You should have received a copy of the GNU General Public
17 * License along with this program; if not, write to the Free
18 * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA
19 * 02139, USA.
20 *
21 * PMC-SIERRA INC. DISCLAIMS ANY LIABILITY OF ANY KIND
22 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS
23 * SOFTWARE.
24 */
25#ifndef MSP_USB_H_
26#define MSP_USB_H_
27
28#ifdef CONFIG_MSP_HAS_DUAL_USB
29#define NUM_USB_DEVS 2
30#else
31#define NUM_USB_DEVS 1
32#endif
33
34/* Register spaces for USB host 0 */
35#define MSP_USB0_MAB_START (MSP_USB0_BASE + 0x0)
36#define MSP_USB0_MAB_END (MSP_USB0_BASE + 0x17)
37#define MSP_USB0_ID_START (MSP_USB0_BASE + 0x40000)
38#define MSP_USB0_ID_END (MSP_USB0_BASE + 0x4008f)
39#define MSP_USB0_HS_START (MSP_USB0_BASE + 0x40100)
40#define MSP_USB0_HS_END (MSP_USB0_BASE + 0x401FF)
41
42/* Register spaces for USB host 1 */
43#define MSP_USB1_MAB_START (MSP_USB1_BASE + 0x0)
44#define MSP_USB1_MAB_END (MSP_USB1_BASE + 0x17)
45#define MSP_USB1_ID_START (MSP_USB1_BASE + 0x40000)
46#define MSP_USB1_ID_END (MSP_USB1_BASE + 0x4008f)
47#define MSP_USB1_HS_START (MSP_USB1_BASE + 0x40100)
48#define MSP_USB1_HS_END (MSP_USB1_BASE + 0x401ff)
49
50/* USB Identification registers */
51struct msp_usbid_regs {
52 u32 id; /* 0x0: Identification register */
53 u32 hwgen; /* 0x4: General HW params */
54 u32 hwhost; /* 0x8: Host HW params */
55 u32 hwdev; /* 0xc: Device HW params */
56 u32 hwtxbuf; /* 0x10: Tx buffer HW params */
57 u32 hwrxbuf; /* 0x14: Rx buffer HW params */
58 u32 reserved[26];
59 u32 timer0_load; /* 0x80: General-purpose timer 0 load*/
60 u32 timer0_ctrl; /* 0x84: General-purpose timer 0 control */
61 u32 timer1_load; /* 0x88: General-purpose timer 1 load*/
62 u32 timer1_ctrl; /* 0x8c: General-purpose timer 1 control */
63};
64
65/* MSBus to AMBA registers */
66struct msp_mab_regs {
67 u32 isr; /* 0x0: Interrupt status */
68 u32 imr; /* 0x4: Interrupt mask */
69 u32 thcr0; /* 0x8: Transaction header capture 0 */
70 u32 thcr1; /* 0xc: Transaction header capture 1 */
71 u32 int_stat; /* 0x10: Interrupt status summary */
72 u32 phy_cfg; /* 0x14: USB phy config */
73};
74
75/* EHCI registers */
76struct msp_usbhs_regs {
77 u32 hciver; /* 0x0: Version and offset to operational regs */
78 u32 hcsparams; /* 0x4: Host control structural parameters */
79 u32 hccparams; /* 0x8: Host control capability parameters */
80 u32 reserved0[5];
81 u32 dciver; /* 0x20: Device interface version */
82 u32 dccparams; /* 0x24: Device control capability parameters */
83 u32 reserved1[6];
84 u32 cmd; /* 0x40: USB command */
85 u32 sts; /* 0x44: USB status */
86 u32 int_ena; /* 0x48: USB interrupt enable */
87 u32 frindex; /* 0x4c: Frame index */
88 u32 reserved3;
89 union {
90 struct {
91 u32 flb_addr; /* 0x54: Frame list base address */
92 u32 next_async_addr; /* 0x58: next asynchronous addr */
93 u32 ttctrl; /* 0x5c: embedded transaction translator
94 async buffer status */
95 u32 burst_size; /* 0x60: Controller burst size */
96 u32 tx_fifo_ctrl; /* 0x64: Tx latency FIFO tuning */
97 u32 reserved0[4];
98 u32 endpt_nak; /* 0x78: Endpoint NAK */
99 u32 endpt_nak_ena; /* 0x7c: Endpoint NAK enable */
100 u32 cfg_flag; /* 0x80: Config flag */
101 u32 port_sc1; /* 0x84: Port status & control 1 */
102 u32 reserved1[7];
103 u32 otgsc; /* 0xa4: OTG status & control */
104 u32 mode; /* 0xa8: USB controller mode */
105 } host;
106
107 struct {
108 u32 dev_addr; /* 0x54: Device address */
109 u32 endpt_list_addr; /* 0x58: Endpoint list address */
110 u32 reserved0[7];
111 u32 endpt_nak; /* 0x74 */
112 u32 endpt_nak_ctrl; /* 0x78 */
113 u32 cfg_flag; /* 0x80 */
114 u32 port_sc1; /* 0x84: Port status & control 1 */
115 u32 reserved[7];
116 u32 otgsc; /* 0xa4: OTG status & control */
117 u32 mode; /* 0xa8: USB controller mode */
118 u32 endpt_setup_stat; /* 0xac */
119 u32 endpt_prime; /* 0xb0 */
120 u32 endpt_flush; /* 0xb4 */
121 u32 endpt_stat; /* 0xb8 */
122 u32 endpt_complete; /* 0xbc */
123 u32 endpt_ctrl0; /* 0xc0 */
124 u32 endpt_ctrl1; /* 0xc4 */
125 u32 endpt_ctrl2; /* 0xc8 */
126 u32 endpt_ctrl3; /* 0xcc */
127 } device;
128 } u;
129};
130/*
131 * Container for the more-generic platform_device.
132 * This exists mainly as a way to map the non-standard register
133 * spaces and make them accessible to the USB ISR.
134 */
135struct mspusb_device {
136 struct msp_mab_regs __iomem *mab_regs;
137 struct msp_usbid_regs __iomem *usbid_regs;
138 struct msp_usbhs_regs __iomem *usbhs_regs;
139 struct platform_device dev;
140};
141
142#define to_mspusb_device(x) container_of((x), struct mspusb_device, dev)
143#define TO_HOST_ID(x) ((x) & 0x3)
144#endif /*MSP_USB_H_*/
diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h
index 396e402fbe2c..ca61e846ab0f 100644
--- a/arch/mips/include/asm/spinlock.h
+++ b/arch/mips/include/asm/spinlock.h
@@ -245,16 +245,16 @@ static inline void arch_read_lock(arch_rwlock_t *rw)
245 __asm__ __volatile__( 245 __asm__ __volatile__(
246 " .set noreorder # arch_read_lock \n" 246 " .set noreorder # arch_read_lock \n"
247 "1: ll %1, %2 \n" 247 "1: ll %1, %2 \n"
248 " bltz %1, 2f \n" 248 " bltz %1, 3f \n"
249 " addu %1, 1 \n" 249 " addu %1, 1 \n"
250 " sc %1, %0 \n" 250 "2: sc %1, %0 \n"
251 " beqz %1, 1b \n" 251 " beqz %1, 1b \n"
252 " nop \n" 252 " nop \n"
253 " .subsection 2 \n" 253 " .subsection 2 \n"
254 "2: ll %1, %2 \n" 254 "3: ll %1, %2 \n"
255 " bltz %1, 2b \n" 255 " bltz %1, 3b \n"
256 " addu %1, 1 \n" 256 " addu %1, 1 \n"
257 " b 1b \n" 257 " b 2b \n"
258 " nop \n" 258 " nop \n"
259 " .previous \n" 259 " .previous \n"
260 " .set reorder \n" 260 " .set reorder \n"
@@ -324,16 +324,16 @@ static inline void arch_write_lock(arch_rwlock_t *rw)
324 __asm__ __volatile__( 324 __asm__ __volatile__(
325 " .set noreorder # arch_write_lock \n" 325 " .set noreorder # arch_write_lock \n"
326 "1: ll %1, %2 \n" 326 "1: ll %1, %2 \n"
327 " bnez %1, 2f \n" 327 " bnez %1, 3f \n"
328 " lui %1, 0x8000 \n" 328 " lui %1, 0x8000 \n"
329 " sc %1, %0 \n" 329 "2: sc %1, %0 \n"
330 " beqz %1, 2f \n" 330 " beqz %1, 3f \n"
331 " nop \n" 331 " nop \n"
332 " .subsection 2 \n" 332 " .subsection 2 \n"
333 "2: ll %1, %2 \n" 333 "3: ll %1, %2 \n"
334 " bnez %1, 2b \n" 334 " bnez %1, 3b \n"
335 " lui %1, 0x8000 \n" 335 " lui %1, 0x8000 \n"
336 " b 1b \n" 336 " b 2b \n"
337 " nop \n" 337 " nop \n"
338 " .previous \n" 338 " .previous \n"
339 " .set reorder \n" 339 " .set reorder \n"
diff --git a/arch/mips/include/asm/types.h b/arch/mips/include/asm/types.h
index 9520dc894989..533812b61881 100644
--- a/arch/mips/include/asm/types.h
+++ b/arch/mips/include/asm/types.h
@@ -33,8 +33,6 @@ typedef unsigned short umode_t;
33#ifdef __KERNEL__ 33#ifdef __KERNEL__
34#ifndef __ASSEMBLY__ 34#ifndef __ASSEMBLY__
35 35
36typedef u64 dma64_addr_t;
37
38/* 36/*
39 * Don't use phys_t. You've been warned. 37 * Don't use phys_t. You've been warned.
40 */ 38 */
diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h
index 550725b881d5..dae22c1d2c82 100644
--- a/arch/mips/include/asm/unistd.h
+++ b/arch/mips/include/asm/unistd.h
@@ -359,16 +359,20 @@
359#define __NR_fanotify_init (__NR_Linux + 336) 359#define __NR_fanotify_init (__NR_Linux + 336)
360#define __NR_fanotify_mark (__NR_Linux + 337) 360#define __NR_fanotify_mark (__NR_Linux + 337)
361#define __NR_prlimit64 (__NR_Linux + 338) 361#define __NR_prlimit64 (__NR_Linux + 338)
362#define __NR_name_to_handle_at (__NR_Linux + 339)
363#define __NR_open_by_handle_at (__NR_Linux + 340)
364#define __NR_clock_adjtime (__NR_Linux + 341)
365#define __NR_syncfs (__NR_Linux + 342)
362 366
363/* 367/*
364 * Offset of the last Linux o32 flavoured syscall 368 * Offset of the last Linux o32 flavoured syscall
365 */ 369 */
366#define __NR_Linux_syscalls 338 370#define __NR_Linux_syscalls 342
367 371
368#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 372#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
369 373
370#define __NR_O32_Linux 4000 374#define __NR_O32_Linux 4000
371#define __NR_O32_Linux_syscalls 338 375#define __NR_O32_Linux_syscalls 342
372 376
373#if _MIPS_SIM == _MIPS_SIM_ABI64 377#if _MIPS_SIM == _MIPS_SIM_ABI64
374 378
@@ -674,16 +678,20 @@
674#define __NR_fanotify_init (__NR_Linux + 295) 678#define __NR_fanotify_init (__NR_Linux + 295)
675#define __NR_fanotify_mark (__NR_Linux + 296) 679#define __NR_fanotify_mark (__NR_Linux + 296)
676#define __NR_prlimit64 (__NR_Linux + 297) 680#define __NR_prlimit64 (__NR_Linux + 297)
681#define __NR_name_to_handle_at (__NR_Linux + 298)
682#define __NR_open_by_handle_at (__NR_Linux + 299)
683#define __NR_clock_adjtime (__NR_Linux + 300)
684#define __NR_syncfs (__NR_Linux + 301)
677 685
678/* 686/*
679 * Offset of the last Linux 64-bit flavoured syscall 687 * Offset of the last Linux 64-bit flavoured syscall
680 */ 688 */
681#define __NR_Linux_syscalls 297 689#define __NR_Linux_syscalls 301
682 690
683#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ 691#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
684 692
685#define __NR_64_Linux 5000 693#define __NR_64_Linux 5000
686#define __NR_64_Linux_syscalls 297 694#define __NR_64_Linux_syscalls 301
687 695
688#if _MIPS_SIM == _MIPS_SIM_NABI32 696#if _MIPS_SIM == _MIPS_SIM_NABI32
689 697
@@ -994,16 +1002,20 @@
994#define __NR_fanotify_init (__NR_Linux + 300) 1002#define __NR_fanotify_init (__NR_Linux + 300)
995#define __NR_fanotify_mark (__NR_Linux + 301) 1003#define __NR_fanotify_mark (__NR_Linux + 301)
996#define __NR_prlimit64 (__NR_Linux + 302) 1004#define __NR_prlimit64 (__NR_Linux + 302)
1005#define __NR_name_to_handle_at (__NR_Linux + 303)
1006#define __NR_open_by_handle_at (__NR_Linux + 304)
1007#define __NR_clock_adjtime (__NR_Linux + 305)
1008#define __NR_clock_adjtime (__NR_Linux + 306)
997 1009
998/* 1010/*
999 * Offset of the last N32 flavoured syscall 1011 * Offset of the last N32 flavoured syscall
1000 */ 1012 */
1001#define __NR_Linux_syscalls 302 1013#define __NR_Linux_syscalls 306
1002 1014
1003#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ 1015#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
1004 1016
1005#define __NR_N32_Linux 6000 1017#define __NR_N32_Linux 6000
1006#define __NR_N32_Linux_syscalls 302 1018#define __NR_N32_Linux_syscalls 306
1007 1019
1008#ifdef __KERNEL__ 1020#ifdef __KERNEL__
1009 1021
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c
index 35b3e2f0af04..40f7c6b1e260 100644
--- a/arch/mips/jazz/irq.c
+++ b/arch/mips/jazz/irq.c
@@ -23,9 +23,9 @@
23 23
24static DEFINE_RAW_SPINLOCK(r4030_lock); 24static DEFINE_RAW_SPINLOCK(r4030_lock);
25 25
26static void enable_r4030_irq(unsigned int irq) 26static void enable_r4030_irq(struct irq_data *d)
27{ 27{
28 unsigned int mask = 1 << (irq - JAZZ_IRQ_START); 28 unsigned int mask = 1 << (d->irq - JAZZ_IRQ_START);
29 unsigned long flags; 29 unsigned long flags;
30 30
31 raw_spin_lock_irqsave(&r4030_lock, flags); 31 raw_spin_lock_irqsave(&r4030_lock, flags);
@@ -34,9 +34,9 @@ static void enable_r4030_irq(unsigned int irq)
34 raw_spin_unlock_irqrestore(&r4030_lock, flags); 34 raw_spin_unlock_irqrestore(&r4030_lock, flags);
35} 35}
36 36
37void disable_r4030_irq(unsigned int irq) 37void disable_r4030_irq(struct irq_data *d)
38{ 38{
39 unsigned int mask = ~(1 << (irq - JAZZ_IRQ_START)); 39 unsigned int mask = ~(1 << (d->irq - JAZZ_IRQ_START));
40 unsigned long flags; 40 unsigned long flags;
41 41
42 raw_spin_lock_irqsave(&r4030_lock, flags); 42 raw_spin_lock_irqsave(&r4030_lock, flags);
@@ -47,10 +47,8 @@ void disable_r4030_irq(unsigned int irq)
47 47
48static struct irq_chip r4030_irq_type = { 48static struct irq_chip r4030_irq_type = {
49 .name = "R4030", 49 .name = "R4030",
50 .ack = disable_r4030_irq, 50 .irq_mask = disable_r4030_irq,
51 .mask = disable_r4030_irq, 51 .irq_unmask = enable_r4030_irq,
52 .mask_ack = disable_r4030_irq,
53 .unmask = enable_r4030_irq,
54}; 52};
55 53
56void __init init_r4030_ints(void) 54void __init init_r4030_ints(void)
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
index 2c0e107966ad..bc18daaa8f84 100644
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -23,6 +23,7 @@
23#include <linux/spi/spi_gpio.h> 23#include <linux/spi/spi_gpio.h>
24#include <linux/power_supply.h> 24#include <linux/power_supply.h>
25#include <linux/power/jz4740-battery.h> 25#include <linux/power/jz4740-battery.h>
26#include <linux/power/gpio-charger.h>
26 27
27#include <asm/mach-jz4740/jz4740_fb.h> 28#include <asm/mach-jz4740/jz4740_fb.h>
28#include <asm/mach-jz4740/jz4740_mmc.h> 29#include <asm/mach-jz4740/jz4740_mmc.h>
@@ -49,14 +50,14 @@ static bool is_avt2;
49 50
50/* NAND */ 51/* NAND */
51static struct nand_ecclayout qi_lb60_ecclayout_1gb = { 52static struct nand_ecclayout qi_lb60_ecclayout_1gb = {
52/* .eccbytes = 36, 53 .eccbytes = 36,
53 .eccpos = { 54 .eccpos = {
54 6, 7, 8, 9, 10, 11, 12, 13, 55 6, 7, 8, 9, 10, 11, 12, 13,
55 14, 15, 16, 17, 18, 19, 20, 21, 56 14, 15, 16, 17, 18, 19, 20, 21,
56 22, 23, 24, 25, 26, 27, 28, 29, 57 22, 23, 24, 25, 26, 27, 28, 29,
57 30, 31, 32, 33, 34, 35, 36, 37, 58 30, 31, 32, 33, 34, 35, 36, 37,
58 38, 39, 40, 41 59 38, 39, 40, 41
59 },*/ 60 },
60 .oobfree = { 61 .oobfree = {
61 { .offset = 2, .length = 4 }, 62 { .offset = 2, .length = 4 },
62 { .offset = 42, .length = 22 } 63 { .offset = 42, .length = 22 }
@@ -85,7 +86,7 @@ static struct mtd_partition qi_lb60_partitions_1gb[] = {
85}; 86};
86 87
87static struct nand_ecclayout qi_lb60_ecclayout_2gb = { 88static struct nand_ecclayout qi_lb60_ecclayout_2gb = {
88/* .eccbytes = 72, 89 .eccbytes = 72,
89 .eccpos = { 90 .eccpos = {
90 12, 13, 14, 15, 16, 17, 18, 19, 91 12, 13, 14, 15, 16, 17, 18, 19,
91 20, 21, 22, 23, 24, 25, 26, 27, 92 20, 21, 22, 23, 24, 25, 26, 27,
@@ -96,7 +97,7 @@ static struct nand_ecclayout qi_lb60_ecclayout_2gb = {
96 60, 61, 62, 63, 64, 65, 66, 67, 97 60, 61, 62, 63, 64, 65, 66, 67,
97 68, 69, 70, 71, 72, 73, 74, 75, 98 68, 69, 70, 71, 72, 73, 74, 75,
98 76, 77, 78, 79, 80, 81, 82, 83 99 76, 77, 78, 79, 80, 81, 82, 83
99 },*/ 100 },
100 .oobfree = { 101 .oobfree = {
101 { .offset = 2, .length = 10 }, 102 { .offset = 2, .length = 10 },
102 { .offset = 84, .length = 44 }, 103 { .offset = 84, .length = 44 },
@@ -396,6 +397,28 @@ static struct platform_device qi_lb60_pwm_beeper = {
396 }, 397 },
397}; 398};
398 399
400/* charger */
401static char *qi_lb60_batteries[] = {
402 "battery",
403};
404
405static struct gpio_charger_platform_data qi_lb60_charger_pdata = {
406 .name = "usb",
407 .type = POWER_SUPPLY_TYPE_USB,
408 .gpio = JZ_GPIO_PORTD(28),
409 .gpio_active_low = 1,
410 .supplied_to = qi_lb60_batteries,
411 .num_supplicants = ARRAY_SIZE(qi_lb60_batteries),
412};
413
414static struct platform_device qi_lb60_charger_device = {
415 .name = "gpio-charger",
416 .dev = {
417 .platform_data = &qi_lb60_charger_pdata,
418 },
419};
420
421
399static struct platform_device *jz_platform_devices[] __initdata = { 422static struct platform_device *jz_platform_devices[] __initdata = {
400 &jz4740_udc_device, 423 &jz4740_udc_device,
401 &jz4740_mmc_device, 424 &jz4740_mmc_device,
@@ -410,6 +433,7 @@ static struct platform_device *jz_platform_devices[] __initdata = {
410 &jz4740_adc_device, 433 &jz4740_adc_device,
411 &qi_lb60_gpio_keys, 434 &qi_lb60_gpio_keys,
412 &qi_lb60_pwm_beeper, 435 &qi_lb60_pwm_beeper,
436 &qi_lb60_charger_device,
413}; 437};
414 438
415static void __init board_gpio_setup(void) 439static void __init board_gpio_setup(void)
diff --git a/arch/mips/jz4740/gpio.c b/arch/mips/jz4740/gpio.c
index 88e6aeda5bf1..bd2fc29b95e0 100644
--- a/arch/mips/jz4740/gpio.c
+++ b/arch/mips/jz4740/gpio.c
@@ -86,7 +86,6 @@ struct jz_gpio_chip {
86 spinlock_t lock; 86 spinlock_t lock;
87 87
88 struct gpio_chip gpio_chip; 88 struct gpio_chip gpio_chip;
89 struct irq_chip irq_chip;
90 struct sys_device sysdev; 89 struct sys_device sysdev;
91}; 90};
92 91
@@ -102,9 +101,9 @@ static inline struct jz_gpio_chip *gpio_chip_to_jz_gpio_chip(struct gpio_chip *g
102 return container_of(gpio_chip, struct jz_gpio_chip, gpio_chip); 101 return container_of(gpio_chip, struct jz_gpio_chip, gpio_chip);
103} 102}
104 103
105static inline struct jz_gpio_chip *irq_to_jz_gpio_chip(unsigned int irq) 104static inline struct jz_gpio_chip *irq_to_jz_gpio_chip(struct irq_data *data)
106{ 105{
107 return get_irq_chip_data(irq); 106 return irq_data_get_irq_chip_data(data);
108} 107}
109 108
110static inline void jz_gpio_write_bit(unsigned int gpio, unsigned int reg) 109static inline void jz_gpio_write_bit(unsigned int gpio, unsigned int reg)
@@ -325,62 +324,52 @@ static void jz_gpio_irq_demux_handler(unsigned int irq, struct irq_desc *desc)
325 generic_handle_irq(gpio_irq); 324 generic_handle_irq(gpio_irq);
326}; 325};
327 326
328static inline void jz_gpio_set_irq_bit(unsigned int irq, unsigned int reg) 327static inline void jz_gpio_set_irq_bit(struct irq_data *data, unsigned int reg)
329{ 328{
330 struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(irq); 329 struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(data);
331 writel(IRQ_TO_BIT(irq), chip->base + reg); 330 writel(IRQ_TO_BIT(data->irq), chip->base + reg);
332} 331}
333 332
334static void jz_gpio_irq_mask(unsigned int irq) 333static void jz_gpio_irq_mask(struct irq_data *data)
335{ 334{
336 jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_MASK_SET); 335 jz_gpio_set_irq_bit(data, JZ_REG_GPIO_MASK_SET);
337}; 336};
338 337
339static void jz_gpio_irq_unmask(unsigned int irq) 338static void jz_gpio_irq_unmask(struct irq_data *data)
340{ 339{
341 struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(irq); 340 struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(data);
342 341
343 jz_gpio_check_trigger_both(chip, irq); 342 jz_gpio_check_trigger_both(chip, data->irq);
344 343
345 jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_MASK_CLEAR); 344 jz_gpio_set_irq_bit(data, JZ_REG_GPIO_MASK_CLEAR);
346}; 345};
347 346
348/* TODO: Check if function is gpio */ 347/* TODO: Check if function is gpio */
349static unsigned int jz_gpio_irq_startup(unsigned int irq) 348static unsigned int jz_gpio_irq_startup(struct irq_data *data)
350{ 349{
351 struct irq_desc *desc = irq_to_desc(irq); 350 jz_gpio_set_irq_bit(data, JZ_REG_GPIO_SELECT_SET);
352 351 jz_gpio_irq_unmask(data);
353 jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_SELECT_SET);
354
355 desc->status &= ~IRQ_MASKED;
356 jz_gpio_irq_unmask(irq);
357
358 return 0; 352 return 0;
359} 353}
360 354
361static void jz_gpio_irq_shutdown(unsigned int irq) 355static void jz_gpio_irq_shutdown(struct irq_data *data)
362{ 356{
363 struct irq_desc *desc = irq_to_desc(irq); 357 jz_gpio_irq_mask(data);
364
365 jz_gpio_irq_mask(irq);
366 desc->status |= IRQ_MASKED;
367 358
368 /* Set direction to input */ 359 /* Set direction to input */
369 jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_DIRECTION_CLEAR); 360 jz_gpio_set_irq_bit(data, JZ_REG_GPIO_DIRECTION_CLEAR);
370 jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_SELECT_CLEAR); 361 jz_gpio_set_irq_bit(data, JZ_REG_GPIO_SELECT_CLEAR);
371} 362}
372 363
373static void jz_gpio_irq_ack(unsigned int irq) 364static void jz_gpio_irq_ack(struct irq_data *data)
374{ 365{
375 jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_FLAG_CLEAR); 366 jz_gpio_set_irq_bit(data, JZ_REG_GPIO_FLAG_CLEAR);
376}; 367};
377 368
378static int jz_gpio_irq_set_type(unsigned int irq, unsigned int flow_type) 369static int jz_gpio_irq_set_type(struct irq_data *data, unsigned int flow_type)
379{ 370{
380 struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(irq); 371 struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(data);
381 struct irq_desc *desc = irq_to_desc(irq); 372 unsigned int irq = data->irq;
382
383 jz_gpio_irq_mask(irq);
384 373
385 if (flow_type == IRQ_TYPE_EDGE_BOTH) { 374 if (flow_type == IRQ_TYPE_EDGE_BOTH) {
386 uint32_t value = readl(chip->base + JZ_REG_GPIO_PIN); 375 uint32_t value = readl(chip->base + JZ_REG_GPIO_PIN);
@@ -395,45 +384,54 @@ static int jz_gpio_irq_set_type(unsigned int irq, unsigned int flow_type)
395 384
396 switch (flow_type) { 385 switch (flow_type) {
397 case IRQ_TYPE_EDGE_RISING: 386 case IRQ_TYPE_EDGE_RISING:
398 jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_DIRECTION_SET); 387 jz_gpio_set_irq_bit(data, JZ_REG_GPIO_DIRECTION_SET);
399 jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_TRIGGER_SET); 388 jz_gpio_set_irq_bit(data, JZ_REG_GPIO_TRIGGER_SET);
400 break; 389 break;
401 case IRQ_TYPE_EDGE_FALLING: 390 case IRQ_TYPE_EDGE_FALLING:
402 jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_DIRECTION_CLEAR); 391 jz_gpio_set_irq_bit(data, JZ_REG_GPIO_DIRECTION_CLEAR);
403 jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_TRIGGER_SET); 392 jz_gpio_set_irq_bit(data, JZ_REG_GPIO_TRIGGER_SET);
404 break; 393 break;
405 case IRQ_TYPE_LEVEL_HIGH: 394 case IRQ_TYPE_LEVEL_HIGH:
406 jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_DIRECTION_SET); 395 jz_gpio_set_irq_bit(data, JZ_REG_GPIO_DIRECTION_SET);
407 jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_TRIGGER_CLEAR); 396 jz_gpio_set_irq_bit(data, JZ_REG_GPIO_TRIGGER_CLEAR);
408 break; 397 break;
409 case IRQ_TYPE_LEVEL_LOW: 398 case IRQ_TYPE_LEVEL_LOW:
410 jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_DIRECTION_CLEAR); 399 jz_gpio_set_irq_bit(data, JZ_REG_GPIO_DIRECTION_CLEAR);
411 jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_TRIGGER_CLEAR); 400 jz_gpio_set_irq_bit(data, JZ_REG_GPIO_TRIGGER_CLEAR);
412 break; 401 break;
413 default: 402 default:
414 return -EINVAL; 403 return -EINVAL;
415 } 404 }
416 405
417 if (!(desc->status & IRQ_MASKED))
418 jz_gpio_irq_unmask(irq);
419
420 return 0; 406 return 0;
421} 407}
422 408
423static int jz_gpio_irq_set_wake(unsigned int irq, unsigned int on) 409static int jz_gpio_irq_set_wake(struct irq_data *data, unsigned int on)
424{ 410{
425 struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(irq); 411 struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(data);
426 spin_lock(&chip->lock); 412 spin_lock(&chip->lock);
427 if (on) 413 if (on)
428 chip->wakeup |= IRQ_TO_BIT(irq); 414 chip->wakeup |= IRQ_TO_BIT(data->irq);
429 else 415 else
430 chip->wakeup &= ~IRQ_TO_BIT(irq); 416 chip->wakeup &= ~IRQ_TO_BIT(data->irq);
431 spin_unlock(&chip->lock); 417 spin_unlock(&chip->lock);
432 418
433 set_irq_wake(chip->irq, on); 419 set_irq_wake(chip->irq, on);
434 return 0; 420 return 0;
435} 421}
436 422
423static struct irq_chip jz_gpio_irq_chip = {
424 .name = "GPIO",
425 .irq_mask = jz_gpio_irq_mask,
426 .irq_unmask = jz_gpio_irq_unmask,
427 .irq_ack = jz_gpio_irq_ack,
428 .irq_startup = jz_gpio_irq_startup,
429 .irq_shutdown = jz_gpio_irq_shutdown,
430 .irq_set_type = jz_gpio_irq_set_type,
431 .irq_set_wake = jz_gpio_irq_set_wake,
432 .flags = IRQCHIP_SET_TYPE_MASKED,
433};
434
437/* 435/*
438 * This lock class tells lockdep that GPIO irqs are in a different 436 * This lock class tells lockdep that GPIO irqs are in a different
439 * category than their parents, so it won't report false recursion. 437 * category than their parents, so it won't report false recursion.
@@ -452,16 +450,6 @@ static struct lock_class_key gpio_lock_class;
452 .base = JZ4740_GPIO_BASE_ ## _bank, \ 450 .base = JZ4740_GPIO_BASE_ ## _bank, \
453 .ngpio = JZ4740_GPIO_NUM_ ## _bank, \ 451 .ngpio = JZ4740_GPIO_NUM_ ## _bank, \
454 }, \ 452 }, \
455 .irq_chip = { \
456 .name = "GPIO Bank " # _bank, \
457 .mask = jz_gpio_irq_mask, \
458 .unmask = jz_gpio_irq_unmask, \
459 .ack = jz_gpio_irq_ack, \
460 .startup = jz_gpio_irq_startup, \
461 .shutdown = jz_gpio_irq_shutdown, \
462 .set_type = jz_gpio_irq_set_type, \
463 .set_wake = jz_gpio_irq_set_wake, \
464 }, \
465} 453}
466 454
467static struct jz_gpio_chip jz4740_gpio_chips[] = { 455static struct jz_gpio_chip jz4740_gpio_chips[] = {
@@ -526,9 +514,10 @@ static int jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id)
526 set_irq_chained_handler(chip->irq, jz_gpio_irq_demux_handler); 514 set_irq_chained_handler(chip->irq, jz_gpio_irq_demux_handler);
527 515
528 for (irq = chip->irq_base; irq < chip->irq_base + chip->gpio_chip.ngpio; ++irq) { 516 for (irq = chip->irq_base; irq < chip->irq_base + chip->gpio_chip.ngpio; ++irq) {
529 lockdep_set_class(&irq_desc[irq].lock, &gpio_lock_class); 517 irq_set_lockdep_class(irq, &gpio_lock_class);
530 set_irq_chip_data(irq, chip); 518 set_irq_chip_data(irq, chip);
531 set_irq_chip_and_handler(irq, &chip->irq_chip, handle_level_irq); 519 set_irq_chip_and_handler(irq, &jz_gpio_irq_chip,
520 handle_level_irq);
532 } 521 }
533 522
534 return 0; 523 return 0;
diff --git a/arch/mips/jz4740/irq.c b/arch/mips/jz4740/irq.c
index 7d33ff83580f..dcc5593a9389 100644
--- a/arch/mips/jz4740/irq.c
+++ b/arch/mips/jz4740/irq.c
@@ -43,32 +43,37 @@ static uint32_t jz_intc_saved;
43 43
44#define IRQ_BIT(x) BIT((x) - JZ4740_IRQ_BASE) 44#define IRQ_BIT(x) BIT((x) - JZ4740_IRQ_BASE)
45 45
46static void intc_irq_unmask(unsigned int irq) 46static inline unsigned long intc_irq_bit(struct irq_data *data)
47{ 47{
48 writel(IRQ_BIT(irq), jz_intc_base + JZ_REG_INTC_CLEAR_MASK); 48 return (unsigned long)irq_data_get_irq_chip_data(data);
49} 49}
50 50
51static void intc_irq_mask(unsigned int irq) 51static void intc_irq_unmask(struct irq_data *data)
52{ 52{
53 writel(IRQ_BIT(irq), jz_intc_base + JZ_REG_INTC_SET_MASK); 53 writel(intc_irq_bit(data), jz_intc_base + JZ_REG_INTC_CLEAR_MASK);
54} 54}
55 55
56static int intc_irq_set_wake(unsigned int irq, unsigned int on) 56static void intc_irq_mask(struct irq_data *data)
57{
58 writel(intc_irq_bit(data), jz_intc_base + JZ_REG_INTC_SET_MASK);
59}
60
61static int intc_irq_set_wake(struct irq_data *data, unsigned int on)
57{ 62{
58 if (on) 63 if (on)
59 jz_intc_wakeup |= IRQ_BIT(irq); 64 jz_intc_wakeup |= intc_irq_bit(data);
60 else 65 else
61 jz_intc_wakeup &= ~IRQ_BIT(irq); 66 jz_intc_wakeup &= ~intc_irq_bit(data);
62 67
63 return 0; 68 return 0;
64} 69}
65 70
66static struct irq_chip intc_irq_type = { 71static struct irq_chip intc_irq_type = {
67 .name = "INTC", 72 .name = "INTC",
68 .mask = intc_irq_mask, 73 .irq_mask = intc_irq_mask,
69 .mask_ack = intc_irq_mask, 74 .irq_mask_ack = intc_irq_mask,
70 .unmask = intc_irq_unmask, 75 .irq_unmask = intc_irq_unmask,
71 .set_wake = intc_irq_set_wake, 76 .irq_set_wake = intc_irq_set_wake,
72}; 77};
73 78
74static irqreturn_t jz4740_cascade(int irq, void *data) 79static irqreturn_t jz4740_cascade(int irq, void *data)
@@ -95,8 +100,11 @@ void __init arch_init_irq(void)
95 100
96 jz_intc_base = ioremap(JZ4740_INTC_BASE_ADDR, 0x14); 101 jz_intc_base = ioremap(JZ4740_INTC_BASE_ADDR, 0x14);
97 102
103 /* Mask all irqs */
104 writel(0xffffffff, jz_intc_base + JZ_REG_INTC_SET_MASK);
105
98 for (i = JZ4740_IRQ_BASE; i < JZ4740_IRQ_BASE + 32; i++) { 106 for (i = JZ4740_IRQ_BASE; i < JZ4740_IRQ_BASE + 32; i++) {
99 intc_irq_mask(i); 107 set_irq_chip_data(i, (void *)IRQ_BIT(i));
100 set_irq_chip_and_handler(i, &intc_irq_type, handle_level_irq); 108 set_irq_chip_and_handler(i, &intc_irq_type, handle_level_irq);
101 } 109 }
102 110
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index c58176cc796b..e221662bb80c 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -31,19 +31,19 @@
31 31
32static int i8259A_auto_eoi = -1; 32static int i8259A_auto_eoi = -1;
33DEFINE_RAW_SPINLOCK(i8259A_lock); 33DEFINE_RAW_SPINLOCK(i8259A_lock);
34static void disable_8259A_irq(unsigned int irq); 34static void disable_8259A_irq(struct irq_data *d);
35static void enable_8259A_irq(unsigned int irq); 35static void enable_8259A_irq(struct irq_data *d);
36static void mask_and_ack_8259A(unsigned int irq); 36static void mask_and_ack_8259A(struct irq_data *d);
37static void init_8259A(int auto_eoi); 37static void init_8259A(int auto_eoi);
38 38
39static struct irq_chip i8259A_chip = { 39static struct irq_chip i8259A_chip = {
40 .name = "XT-PIC", 40 .name = "XT-PIC",
41 .mask = disable_8259A_irq, 41 .irq_mask = disable_8259A_irq,
42 .disable = disable_8259A_irq, 42 .irq_disable = disable_8259A_irq,
43 .unmask = enable_8259A_irq, 43 .irq_unmask = enable_8259A_irq,
44 .mask_ack = mask_and_ack_8259A, 44 .irq_mask_ack = mask_and_ack_8259A,
45#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF 45#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
46 .set_affinity = plat_set_irq_affinity, 46 .irq_set_affinity = plat_set_irq_affinity,
47#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ 47#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */
48}; 48};
49 49
@@ -59,12 +59,11 @@ static unsigned int cached_irq_mask = 0xffff;
59#define cached_master_mask (cached_irq_mask) 59#define cached_master_mask (cached_irq_mask)
60#define cached_slave_mask (cached_irq_mask >> 8) 60#define cached_slave_mask (cached_irq_mask >> 8)
61 61
62static void disable_8259A_irq(unsigned int irq) 62static void disable_8259A_irq(struct irq_data *d)
63{ 63{
64 unsigned int mask; 64 unsigned int mask, irq = d->irq - I8259A_IRQ_BASE;
65 unsigned long flags; 65 unsigned long flags;
66 66
67 irq -= I8259A_IRQ_BASE;
68 mask = 1 << irq; 67 mask = 1 << irq;
69 raw_spin_lock_irqsave(&i8259A_lock, flags); 68 raw_spin_lock_irqsave(&i8259A_lock, flags);
70 cached_irq_mask |= mask; 69 cached_irq_mask |= mask;
@@ -75,12 +74,11 @@ static void disable_8259A_irq(unsigned int irq)
75 raw_spin_unlock_irqrestore(&i8259A_lock, flags); 74 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
76} 75}
77 76
78static void enable_8259A_irq(unsigned int irq) 77static void enable_8259A_irq(struct irq_data *d)
79{ 78{
80 unsigned int mask; 79 unsigned int mask, irq = d->irq - I8259A_IRQ_BASE;
81 unsigned long flags; 80 unsigned long flags;
82 81
83 irq -= I8259A_IRQ_BASE;
84 mask = ~(1 << irq); 82 mask = ~(1 << irq);
85 raw_spin_lock_irqsave(&i8259A_lock, flags); 83 raw_spin_lock_irqsave(&i8259A_lock, flags);
86 cached_irq_mask &= mask; 84 cached_irq_mask &= mask;
@@ -145,12 +143,11 @@ static inline int i8259A_irq_real(unsigned int irq)
145 * first, _then_ send the EOI, and the order of EOI 143 * first, _then_ send the EOI, and the order of EOI
146 * to the two 8259s is important! 144 * to the two 8259s is important!
147 */ 145 */
148static void mask_and_ack_8259A(unsigned int irq) 146static void mask_and_ack_8259A(struct irq_data *d)
149{ 147{
150 unsigned int irqmask; 148 unsigned int irqmask, irq = d->irq - I8259A_IRQ_BASE;
151 unsigned long flags; 149 unsigned long flags;
152 150
153 irq -= I8259A_IRQ_BASE;
154 irqmask = 1 << irq; 151 irqmask = 1 << irq;
155 raw_spin_lock_irqsave(&i8259A_lock, flags); 152 raw_spin_lock_irqsave(&i8259A_lock, flags);
156 /* 153 /*
@@ -290,9 +287,9 @@ static void init_8259A(int auto_eoi)
290 * In AEOI mode we just have to mask the interrupt 287 * In AEOI mode we just have to mask the interrupt
291 * when acking. 288 * when acking.
292 */ 289 */
293 i8259A_chip.mask_ack = disable_8259A_irq; 290 i8259A_chip.irq_mask_ack = disable_8259A_irq;
294 else 291 else
295 i8259A_chip.mask_ack = mask_and_ack_8259A; 292 i8259A_chip.irq_mask_ack = mask_and_ack_8259A;
296 293
297 udelay(100); /* wait for 8259A to initialize */ 294 udelay(100); /* wait for 8259A to initialize */
298 295
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c
index 1774271af848..43cd9628251a 100644
--- a/arch/mips/kernel/irq-gic.c
+++ b/arch/mips/kernel/irq-gic.c
@@ -87,17 +87,10 @@ unsigned int gic_get_int(void)
87 return i; 87 return i;
88} 88}
89 89
90static unsigned int gic_irq_startup(unsigned int irq) 90static void gic_irq_ack(struct irq_data *d)
91{ 91{
92 irq -= _irqbase; 92 unsigned int irq = d->irq - _irqbase;
93 pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
94 GIC_SET_INTR_MASK(irq);
95 return 0;
96}
97 93
98static void gic_irq_ack(unsigned int irq)
99{
100 irq -= _irqbase;
101 pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); 94 pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
102 GIC_CLR_INTR_MASK(irq); 95 GIC_CLR_INTR_MASK(irq);
103 96
@@ -105,16 +98,16 @@ static void gic_irq_ack(unsigned int irq)
105 GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), irq); 98 GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), irq);
106} 99}
107 100
108static void gic_mask_irq(unsigned int irq) 101static void gic_mask_irq(struct irq_data *d)
109{ 102{
110 irq -= _irqbase; 103 unsigned int irq = d->irq - _irqbase;
111 pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); 104 pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
112 GIC_CLR_INTR_MASK(irq); 105 GIC_CLR_INTR_MASK(irq);
113} 106}
114 107
115static void gic_unmask_irq(unsigned int irq) 108static void gic_unmask_irq(struct irq_data *d)
116{ 109{
117 irq -= _irqbase; 110 unsigned int irq = d->irq - _irqbase;
118 pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); 111 pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
119 GIC_SET_INTR_MASK(irq); 112 GIC_SET_INTR_MASK(irq);
120} 113}
@@ -123,13 +116,14 @@ static void gic_unmask_irq(unsigned int irq)
123 116
124static DEFINE_SPINLOCK(gic_lock); 117static DEFINE_SPINLOCK(gic_lock);
125 118
126static int gic_set_affinity(unsigned int irq, const struct cpumask *cpumask) 119static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
120 bool force)
127{ 121{
122 unsigned int irq = d->irq - _irqbase;
128 cpumask_t tmp = CPU_MASK_NONE; 123 cpumask_t tmp = CPU_MASK_NONE;
129 unsigned long flags; 124 unsigned long flags;
130 int i; 125 int i;
131 126
132 irq -= _irqbase;
133 pr_debug("%s(%d) called\n", __func__, irq); 127 pr_debug("%s(%d) called\n", __func__, irq);
134 cpumask_and(&tmp, cpumask, cpu_online_mask); 128 cpumask_and(&tmp, cpumask, cpu_online_mask);
135 if (cpus_empty(tmp)) 129 if (cpus_empty(tmp))
@@ -147,23 +141,22 @@ static int gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
147 set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask); 141 set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask);
148 142
149 } 143 }
150 cpumask_copy(irq_desc[irq].affinity, cpumask); 144 cpumask_copy(d->affinity, cpumask);
151 spin_unlock_irqrestore(&gic_lock, flags); 145 spin_unlock_irqrestore(&gic_lock, flags);
152 146
153 return 0; 147 return IRQ_SET_MASK_OK_NOCOPY;
154} 148}
155#endif 149#endif
156 150
157static struct irq_chip gic_irq_controller = { 151static struct irq_chip gic_irq_controller = {
158 .name = "MIPS GIC", 152 .name = "MIPS GIC",
159 .startup = gic_irq_startup, 153 .irq_ack = gic_irq_ack,
160 .ack = gic_irq_ack, 154 .irq_mask = gic_mask_irq,
161 .mask = gic_mask_irq, 155 .irq_mask_ack = gic_mask_irq,
162 .mask_ack = gic_mask_irq, 156 .irq_unmask = gic_unmask_irq,
163 .unmask = gic_unmask_irq, 157 .irq_eoi = gic_unmask_irq,
164 .eoi = gic_unmask_irq,
165#ifdef CONFIG_SMP 158#ifdef CONFIG_SMP
166 .set_affinity = gic_set_affinity, 159 .irq_set_affinity = gic_set_affinity,
167#endif 160#endif
168}; 161};
169 162
diff --git a/arch/mips/kernel/irq-gt641xx.c b/arch/mips/kernel/irq-gt641xx.c
index 42ef81461bfc..7fd176fa367a 100644
--- a/arch/mips/kernel/irq-gt641xx.c
+++ b/arch/mips/kernel/irq-gt641xx.c
@@ -29,64 +29,64 @@
29 29
30static DEFINE_RAW_SPINLOCK(gt641xx_irq_lock); 30static DEFINE_RAW_SPINLOCK(gt641xx_irq_lock);
31 31
32static void ack_gt641xx_irq(unsigned int irq) 32static void ack_gt641xx_irq(struct irq_data *d)
33{ 33{
34 unsigned long flags; 34 unsigned long flags;
35 u32 cause; 35 u32 cause;
36 36
37 raw_spin_lock_irqsave(&gt641xx_irq_lock, flags); 37 raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);
38 cause = GT_READ(GT_INTRCAUSE_OFS); 38 cause = GT_READ(GT_INTRCAUSE_OFS);
39 cause &= ~GT641XX_IRQ_TO_BIT(irq); 39 cause &= ~GT641XX_IRQ_TO_BIT(d->irq);
40 GT_WRITE(GT_INTRCAUSE_OFS, cause); 40 GT_WRITE(GT_INTRCAUSE_OFS, cause);
41 raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags); 41 raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
42} 42}
43 43
44static void mask_gt641xx_irq(unsigned int irq) 44static void mask_gt641xx_irq(struct irq_data *d)
45{ 45{
46 unsigned long flags; 46 unsigned long flags;
47 u32 mask; 47 u32 mask;
48 48
49 raw_spin_lock_irqsave(&gt641xx_irq_lock, flags); 49 raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);
50 mask = GT_READ(GT_INTRMASK_OFS); 50 mask = GT_READ(GT_INTRMASK_OFS);
51 mask &= ~GT641XX_IRQ_TO_BIT(irq); 51 mask &= ~GT641XX_IRQ_TO_BIT(d->irq);
52 GT_WRITE(GT_INTRMASK_OFS, mask); 52 GT_WRITE(GT_INTRMASK_OFS, mask);
53 raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags); 53 raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
54} 54}
55 55
56static void mask_ack_gt641xx_irq(unsigned int irq) 56static void mask_ack_gt641xx_irq(struct irq_data *d)
57{ 57{
58 unsigned long flags; 58 unsigned long flags;
59 u32 cause, mask; 59 u32 cause, mask;
60 60
61 raw_spin_lock_irqsave(&gt641xx_irq_lock, flags); 61 raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);
62 mask = GT_READ(GT_INTRMASK_OFS); 62 mask = GT_READ(GT_INTRMASK_OFS);
63 mask &= ~GT641XX_IRQ_TO_BIT(irq); 63 mask &= ~GT641XX_IRQ_TO_BIT(d->irq);
64 GT_WRITE(GT_INTRMASK_OFS, mask); 64 GT_WRITE(GT_INTRMASK_OFS, mask);
65 65
66 cause = GT_READ(GT_INTRCAUSE_OFS); 66 cause = GT_READ(GT_INTRCAUSE_OFS);
67 cause &= ~GT641XX_IRQ_TO_BIT(irq); 67 cause &= ~GT641XX_IRQ_TO_BIT(d->irq);
68 GT_WRITE(GT_INTRCAUSE_OFS, cause); 68 GT_WRITE(GT_INTRCAUSE_OFS, cause);
69 raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags); 69 raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
70} 70}
71 71
72static void unmask_gt641xx_irq(unsigned int irq) 72static void unmask_gt641xx_irq(struct irq_data *d)
73{ 73{
74 unsigned long flags; 74 unsigned long flags;
75 u32 mask; 75 u32 mask;
76 76
77 raw_spin_lock_irqsave(&gt641xx_irq_lock, flags); 77 raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);
78 mask = GT_READ(GT_INTRMASK_OFS); 78 mask = GT_READ(GT_INTRMASK_OFS);
79 mask |= GT641XX_IRQ_TO_BIT(irq); 79 mask |= GT641XX_IRQ_TO_BIT(d->irq);
80 GT_WRITE(GT_INTRMASK_OFS, mask); 80 GT_WRITE(GT_INTRMASK_OFS, mask);
81 raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags); 81 raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
82} 82}
83 83
84static struct irq_chip gt641xx_irq_chip = { 84static struct irq_chip gt641xx_irq_chip = {
85 .name = "GT641xx", 85 .name = "GT641xx",
86 .ack = ack_gt641xx_irq, 86 .irq_ack = ack_gt641xx_irq,
87 .mask = mask_gt641xx_irq, 87 .irq_mask = mask_gt641xx_irq,
88 .mask_ack = mask_ack_gt641xx_irq, 88 .irq_mask_ack = mask_ack_gt641xx_irq,
89 .unmask = unmask_gt641xx_irq, 89 .irq_unmask = unmask_gt641xx_irq,
90}; 90};
91 91
92void gt641xx_irq_dispatch(void) 92void gt641xx_irq_dispatch(void)
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c
index 6a8cd28133d5..fc800cd9947e 100644
--- a/arch/mips/kernel/irq-msc01.c
+++ b/arch/mips/kernel/irq-msc01.c
@@ -28,8 +28,10 @@ static unsigned long _icctrl_msc;
28static unsigned int irq_base; 28static unsigned int irq_base;
29 29
30/* mask off an interrupt */ 30/* mask off an interrupt */
31static inline void mask_msc_irq(unsigned int irq) 31static inline void mask_msc_irq(struct irq_data *d)
32{ 32{
33 unsigned int irq = d->irq;
34
33 if (irq < (irq_base + 32)) 35 if (irq < (irq_base + 32))
34 MSCIC_WRITE(MSC01_IC_DISL, 1<<(irq - irq_base)); 36 MSCIC_WRITE(MSC01_IC_DISL, 1<<(irq - irq_base));
35 else 37 else
@@ -37,8 +39,10 @@ static inline void mask_msc_irq(unsigned int irq)
37} 39}
38 40
39/* unmask an interrupt */ 41/* unmask an interrupt */
40static inline void unmask_msc_irq(unsigned int irq) 42static inline void unmask_msc_irq(struct irq_data *d)
41{ 43{
44 unsigned int irq = d->irq;
45
42 if (irq < (irq_base + 32)) 46 if (irq < (irq_base + 32))
43 MSCIC_WRITE(MSC01_IC_ENAL, 1<<(irq - irq_base)); 47 MSCIC_WRITE(MSC01_IC_ENAL, 1<<(irq - irq_base));
44 else 48 else
@@ -48,9 +52,11 @@ static inline void unmask_msc_irq(unsigned int irq)
48/* 52/*
49 * Masks and ACKs an IRQ 53 * Masks and ACKs an IRQ
50 */ 54 */
51static void level_mask_and_ack_msc_irq(unsigned int irq) 55static void level_mask_and_ack_msc_irq(struct irq_data *d)
52{ 56{
53 mask_msc_irq(irq); 57 unsigned int irq = d->irq;
58
59 mask_msc_irq(d);
54 if (!cpu_has_veic) 60 if (!cpu_has_veic)
55 MSCIC_WRITE(MSC01_IC_EOI, 0); 61 MSCIC_WRITE(MSC01_IC_EOI, 0);
56 /* This actually needs to be a call into platform code */ 62 /* This actually needs to be a call into platform code */
@@ -60,9 +66,11 @@ static void level_mask_and_ack_msc_irq(unsigned int irq)
60/* 66/*
61 * Masks and ACKs an IRQ 67 * Masks and ACKs an IRQ
62 */ 68 */
63static void edge_mask_and_ack_msc_irq(unsigned int irq) 69static void edge_mask_and_ack_msc_irq(struct irq_data *d)
64{ 70{
65 mask_msc_irq(irq); 71 unsigned int irq = d->irq;
72
73 mask_msc_irq(d);
66 if (!cpu_has_veic) 74 if (!cpu_has_veic)
67 MSCIC_WRITE(MSC01_IC_EOI, 0); 75 MSCIC_WRITE(MSC01_IC_EOI, 0);
68 else { 76 else {
@@ -75,15 +83,6 @@ static void edge_mask_and_ack_msc_irq(unsigned int irq)
75} 83}
76 84
77/* 85/*
78 * End IRQ processing
79 */
80static void end_msc_irq(unsigned int irq)
81{
82 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
83 unmask_msc_irq(irq);
84}
85
86/*
87 * Interrupt handler for interrupts coming from SOC-it. 86 * Interrupt handler for interrupts coming from SOC-it.
88 */ 87 */
89void ll_msc_irq(void) 88void ll_msc_irq(void)
@@ -107,22 +106,20 @@ static void msc_bind_eic_interrupt(int irq, int set)
107 106
108static struct irq_chip msc_levelirq_type = { 107static struct irq_chip msc_levelirq_type = {
109 .name = "SOC-it-Level", 108 .name = "SOC-it-Level",
110 .ack = level_mask_and_ack_msc_irq, 109 .irq_ack = level_mask_and_ack_msc_irq,
111 .mask = mask_msc_irq, 110 .irq_mask = mask_msc_irq,
112 .mask_ack = level_mask_and_ack_msc_irq, 111 .irq_mask_ack = level_mask_and_ack_msc_irq,
113 .unmask = unmask_msc_irq, 112 .irq_unmask = unmask_msc_irq,
114 .eoi = unmask_msc_irq, 113 .irq_eoi = unmask_msc_irq,
115 .end = end_msc_irq,
116}; 114};
117 115
118static struct irq_chip msc_edgeirq_type = { 116static struct irq_chip msc_edgeirq_type = {
119 .name = "SOC-it-Edge", 117 .name = "SOC-it-Edge",
120 .ack = edge_mask_and_ack_msc_irq, 118 .irq_ack = edge_mask_and_ack_msc_irq,
121 .mask = mask_msc_irq, 119 .irq_mask = mask_msc_irq,
122 .mask_ack = edge_mask_and_ack_msc_irq, 120 .irq_mask_ack = edge_mask_and_ack_msc_irq,
123 .unmask = unmask_msc_irq, 121 .irq_unmask = unmask_msc_irq,
124 .eoi = unmask_msc_irq, 122 .irq_eoi = unmask_msc_irq,
125 .end = end_msc_irq,
126}; 123};
127 124
128 125
diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c
index 9731e8b47862..fd24fd98b041 100644
--- a/arch/mips/kernel/irq-rm7000.c
+++ b/arch/mips/kernel/irq-rm7000.c
@@ -18,23 +18,23 @@
18#include <asm/mipsregs.h> 18#include <asm/mipsregs.h>
19#include <asm/system.h> 19#include <asm/system.h>
20 20
21static inline void unmask_rm7k_irq(unsigned int irq) 21static inline void unmask_rm7k_irq(struct irq_data *d)
22{ 22{
23 set_c0_intcontrol(0x100 << (irq - RM7K_CPU_IRQ_BASE)); 23 set_c0_intcontrol(0x100 << (d->irq - RM7K_CPU_IRQ_BASE));
24} 24}
25 25
26static inline void mask_rm7k_irq(unsigned int irq) 26static inline void mask_rm7k_irq(struct irq_data *d)
27{ 27{
28 clear_c0_intcontrol(0x100 << (irq - RM7K_CPU_IRQ_BASE)); 28 clear_c0_intcontrol(0x100 << (d->irq - RM7K_CPU_IRQ_BASE));
29} 29}
30 30
31static struct irq_chip rm7k_irq_controller = { 31static struct irq_chip rm7k_irq_controller = {
32 .name = "RM7000", 32 .name = "RM7000",
33 .ack = mask_rm7k_irq, 33 .irq_ack = mask_rm7k_irq,
34 .mask = mask_rm7k_irq, 34 .irq_mask = mask_rm7k_irq,
35 .mask_ack = mask_rm7k_irq, 35 .irq_mask_ack = mask_rm7k_irq,
36 .unmask = unmask_rm7k_irq, 36 .irq_unmask = unmask_rm7k_irq,
37 .eoi = unmask_rm7k_irq 37 .irq_eoi = unmask_rm7k_irq
38}; 38};
39 39
40void __init rm7k_cpu_irq_init(void) 40void __init rm7k_cpu_irq_init(void)
diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c
index b7e4025b58a8..ca463ec9bad5 100644
--- a/arch/mips/kernel/irq-rm9000.c
+++ b/arch/mips/kernel/irq-rm9000.c
@@ -19,22 +19,22 @@
19#include <asm/mipsregs.h> 19#include <asm/mipsregs.h>
20#include <asm/system.h> 20#include <asm/system.h>
21 21
22static inline void unmask_rm9k_irq(unsigned int irq) 22static inline void unmask_rm9k_irq(struct irq_data *d)
23{ 23{
24 set_c0_intcontrol(0x1000 << (irq - RM9K_CPU_IRQ_BASE)); 24 set_c0_intcontrol(0x1000 << (d->irq - RM9K_CPU_IRQ_BASE));
25} 25}
26 26
27static inline void mask_rm9k_irq(unsigned int irq) 27static inline void mask_rm9k_irq(struct irq_data *d)
28{ 28{
29 clear_c0_intcontrol(0x1000 << (irq - RM9K_CPU_IRQ_BASE)); 29 clear_c0_intcontrol(0x1000 << (d->irq - RM9K_CPU_IRQ_BASE));
30} 30}
31 31
32static inline void rm9k_cpu_irq_enable(unsigned int irq) 32static inline void rm9k_cpu_irq_enable(struct irq_data *d)
33{ 33{
34 unsigned long flags; 34 unsigned long flags;
35 35
36 local_irq_save(flags); 36 local_irq_save(flags);
37 unmask_rm9k_irq(irq); 37 unmask_rm9k_irq(d);
38 local_irq_restore(flags); 38 local_irq_restore(flags);
39} 39}
40 40
@@ -43,50 +43,47 @@ static inline void rm9k_cpu_irq_enable(unsigned int irq)
43 */ 43 */
44static void local_rm9k_perfcounter_irq_startup(void *args) 44static void local_rm9k_perfcounter_irq_startup(void *args)
45{ 45{
46 unsigned int irq = (unsigned int) args; 46 rm9k_cpu_irq_enable(args);
47
48 rm9k_cpu_irq_enable(irq);
49} 47}
50 48
51static unsigned int rm9k_perfcounter_irq_startup(unsigned int irq) 49static unsigned int rm9k_perfcounter_irq_startup(struct irq_data *d)
52{ 50{
53 on_each_cpu(local_rm9k_perfcounter_irq_startup, (void *) irq, 1); 51 on_each_cpu(local_rm9k_perfcounter_irq_startup, d, 1);
54 52
55 return 0; 53 return 0;
56} 54}
57 55
58static void local_rm9k_perfcounter_irq_shutdown(void *args) 56static void local_rm9k_perfcounter_irq_shutdown(void *args)
59{ 57{
60 unsigned int irq = (unsigned int) args;
61 unsigned long flags; 58 unsigned long flags;
62 59
63 local_irq_save(flags); 60 local_irq_save(flags);
64 mask_rm9k_irq(irq); 61 mask_rm9k_irq(args);
65 local_irq_restore(flags); 62 local_irq_restore(flags);
66} 63}
67 64
68static void rm9k_perfcounter_irq_shutdown(unsigned int irq) 65static void rm9k_perfcounter_irq_shutdown(struct irq_data *d)
69{ 66{
70 on_each_cpu(local_rm9k_perfcounter_irq_shutdown, (void *) irq, 1); 67 on_each_cpu(local_rm9k_perfcounter_irq_shutdown, d, 1);
71} 68}
72 69
73static struct irq_chip rm9k_irq_controller = { 70static struct irq_chip rm9k_irq_controller = {
74 .name = "RM9000", 71 .name = "RM9000",
75 .ack = mask_rm9k_irq, 72 .irq_ack = mask_rm9k_irq,
76 .mask = mask_rm9k_irq, 73 .irq_mask = mask_rm9k_irq,
77 .mask_ack = mask_rm9k_irq, 74 .irq_mask_ack = mask_rm9k_irq,
78 .unmask = unmask_rm9k_irq, 75 .irq_unmask = unmask_rm9k_irq,
79 .eoi = unmask_rm9k_irq 76 .irq_eoi = unmask_rm9k_irq
80}; 77};
81 78
82static struct irq_chip rm9k_perfcounter_irq = { 79static struct irq_chip rm9k_perfcounter_irq = {
83 .name = "RM9000", 80 .name = "RM9000",
84 .startup = rm9k_perfcounter_irq_startup, 81 .irq_startup = rm9k_perfcounter_irq_startup,
85 .shutdown = rm9k_perfcounter_irq_shutdown, 82 .irq_shutdown = rm9k_perfcounter_irq_shutdown,
86 .ack = mask_rm9k_irq, 83 .irq_ack = mask_rm9k_irq,
87 .mask = mask_rm9k_irq, 84 .irq_mask = mask_rm9k_irq,
88 .mask_ack = mask_rm9k_irq, 85 .irq_mask_ack = mask_rm9k_irq,
89 .unmask = unmask_rm9k_irq, 86 .irq_unmask = unmask_rm9k_irq,
90}; 87};
91 88
92unsigned int rm9000_perfcount_irq; 89unsigned int rm9000_perfcount_irq;
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index 4f93db58a79e..1b68ebe1b458 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -81,48 +81,9 @@ void ack_bad_irq(unsigned int irq)
81 81
82atomic_t irq_err_count; 82atomic_t irq_err_count;
83 83
84/* 84int arch_show_interrupts(struct seq_file *p, int prec)
85 * Generic, controller-independent functions:
86 */
87
88int show_interrupts(struct seq_file *p, void *v)
89{ 85{
90 int i = *(loff_t *) v, j; 86 seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
91 struct irqaction * action;
92 unsigned long flags;
93
94 if (i == 0) {
95 seq_printf(p, " ");
96 for_each_online_cpu(j)
97 seq_printf(p, "CPU%d ", j);
98 seq_putc(p, '\n');
99 }
100
101 if (i < NR_IRQS) {
102 raw_spin_lock_irqsave(&irq_desc[i].lock, flags);
103 action = irq_desc[i].action;
104 if (!action)
105 goto skip;
106 seq_printf(p, "%3d: ", i);
107#ifndef CONFIG_SMP
108 seq_printf(p, "%10u ", kstat_irqs(i));
109#else
110 for_each_online_cpu(j)
111 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
112#endif
113 seq_printf(p, " %14s", irq_desc[i].chip->name);
114 seq_printf(p, " %s", action->name);
115
116 for (action=action->next; action; action = action->next)
117 seq_printf(p, ", %s", action->name);
118
119 seq_putc(p, '\n');
120skip:
121 raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags);
122 } else if (i == NR_IRQS) {
123 seq_putc(p, '\n');
124 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
125 }
126 return 0; 87 return 0;
127} 88}
128 89
@@ -183,8 +144,8 @@ void __irq_entry do_IRQ(unsigned int irq)
183{ 144{
184 irq_enter(); 145 irq_enter();
185 check_stack_overflow(); 146 check_stack_overflow();
186 __DO_IRQ_SMTC_HOOK(irq); 147 if (!smtc_handle_on_other_cpu(irq))
187 generic_handle_irq(irq); 148 generic_handle_irq(irq);
188 irq_exit(); 149 irq_exit();
189} 150}
190 151
@@ -197,7 +158,7 @@ void __irq_entry do_IRQ(unsigned int irq)
197void __irq_entry do_IRQ_no_affinity(unsigned int irq) 158void __irq_entry do_IRQ_no_affinity(unsigned int irq)
198{ 159{
199 irq_enter(); 160 irq_enter();
200 __NO_AFFINITY_IRQ_SMTC_HOOK(irq); 161 smtc_im_backstop(irq);
201 generic_handle_irq(irq); 162 generic_handle_irq(irq);
202 irq_exit(); 163 irq_exit();
203} 164}
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index 0262abe09121..fd945c56bc33 100644
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -37,42 +37,38 @@
37#include <asm/mipsmtregs.h> 37#include <asm/mipsmtregs.h>
38#include <asm/system.h> 38#include <asm/system.h>
39 39
40static inline void unmask_mips_irq(unsigned int irq) 40static inline void unmask_mips_irq(struct irq_data *d)
41{ 41{
42 set_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); 42 set_c0_status(0x100 << (d->irq - MIPS_CPU_IRQ_BASE));
43 irq_enable_hazard(); 43 irq_enable_hazard();
44} 44}
45 45
46static inline void mask_mips_irq(unsigned int irq) 46static inline void mask_mips_irq(struct irq_data *d)
47{ 47{
48 clear_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); 48 clear_c0_status(0x100 << (d->irq - MIPS_CPU_IRQ_BASE));
49 irq_disable_hazard(); 49 irq_disable_hazard();
50} 50}
51 51
52static struct irq_chip mips_cpu_irq_controller = { 52static struct irq_chip mips_cpu_irq_controller = {
53 .name = "MIPS", 53 .name = "MIPS",
54 .ack = mask_mips_irq, 54 .irq_ack = mask_mips_irq,
55 .mask = mask_mips_irq, 55 .irq_mask = mask_mips_irq,
56 .mask_ack = mask_mips_irq, 56 .irq_mask_ack = mask_mips_irq,
57 .unmask = unmask_mips_irq, 57 .irq_unmask = unmask_mips_irq,
58 .eoi = unmask_mips_irq, 58 .irq_eoi = unmask_mips_irq,
59}; 59};
60 60
61/* 61/*
62 * Basically the same as above but taking care of all the MT stuff 62 * Basically the same as above but taking care of all the MT stuff
63 */ 63 */
64 64
65#define unmask_mips_mt_irq unmask_mips_irq 65static unsigned int mips_mt_cpu_irq_startup(struct irq_data *d)
66#define mask_mips_mt_irq mask_mips_irq
67
68static unsigned int mips_mt_cpu_irq_startup(unsigned int irq)
69{ 66{
70 unsigned int vpflags = dvpe(); 67 unsigned int vpflags = dvpe();
71 68
72 clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); 69 clear_c0_cause(0x100 << (d->irq - MIPS_CPU_IRQ_BASE));
73 evpe(vpflags); 70 evpe(vpflags);
74 unmask_mips_mt_irq(irq); 71 unmask_mips_irq(d);
75
76 return 0; 72 return 0;
77} 73}
78 74
@@ -80,22 +76,22 @@ static unsigned int mips_mt_cpu_irq_startup(unsigned int irq)
80 * While we ack the interrupt interrupts are disabled and thus we don't need 76 * While we ack the interrupt interrupts are disabled and thus we don't need
81 * to deal with concurrency issues. Same for mips_cpu_irq_end. 77 * to deal with concurrency issues. Same for mips_cpu_irq_end.
82 */ 78 */
83static void mips_mt_cpu_irq_ack(unsigned int irq) 79static void mips_mt_cpu_irq_ack(struct irq_data *d)
84{ 80{
85 unsigned int vpflags = dvpe(); 81 unsigned int vpflags = dvpe();
86 clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); 82 clear_c0_cause(0x100 << (d->irq - MIPS_CPU_IRQ_BASE));
87 evpe(vpflags); 83 evpe(vpflags);
88 mask_mips_mt_irq(irq); 84 mask_mips_irq(d);
89} 85}
90 86
91static struct irq_chip mips_mt_cpu_irq_controller = { 87static struct irq_chip mips_mt_cpu_irq_controller = {
92 .name = "MIPS", 88 .name = "MIPS",
93 .startup = mips_mt_cpu_irq_startup, 89 .irq_startup = mips_mt_cpu_irq_startup,
94 .ack = mips_mt_cpu_irq_ack, 90 .irq_ack = mips_mt_cpu_irq_ack,
95 .mask = mask_mips_mt_irq, 91 .irq_mask = mask_mips_irq,
96 .mask_ack = mips_mt_cpu_irq_ack, 92 .irq_mask_ack = mips_mt_cpu_irq_ack,
97 .unmask = unmask_mips_mt_irq, 93 .irq_unmask = unmask_mips_irq,
98 .eoi = unmask_mips_mt_irq, 94 .irq_eoi = unmask_mips_irq,
99}; 95};
100 96
101void __init mips_cpu_irq_init(void) 97void __init mips_cpu_irq_init(void)
diff --git a/arch/mips/kernel/irq_txx9.c b/arch/mips/kernel/irq_txx9.c
index 95a96f69172d..526e1581549a 100644
--- a/arch/mips/kernel/irq_txx9.c
+++ b/arch/mips/kernel/irq_txx9.c
@@ -63,9 +63,9 @@ static struct {
63 unsigned char mode; 63 unsigned char mode;
64} txx9irq[TXx9_MAX_IR] __read_mostly; 64} txx9irq[TXx9_MAX_IR] __read_mostly;
65 65
66static void txx9_irq_unmask(unsigned int irq) 66static void txx9_irq_unmask(struct irq_data *d)
67{ 67{
68 unsigned int irq_nr = irq - TXX9_IRQ_BASE; 68 unsigned int irq_nr = d->irq - TXX9_IRQ_BASE;
69 u32 __iomem *ilrp = &txx9_ircptr->ilr[(irq_nr % 16 ) / 2]; 69 u32 __iomem *ilrp = &txx9_ircptr->ilr[(irq_nr % 16 ) / 2];
70 int ofs = irq_nr / 16 * 16 + (irq_nr & 1) * 8; 70 int ofs = irq_nr / 16 * 16 + (irq_nr & 1) * 8;
71 71
@@ -79,9 +79,9 @@ static void txx9_irq_unmask(unsigned int irq)
79#endif 79#endif
80} 80}
81 81
82static inline void txx9_irq_mask(unsigned int irq) 82static inline void txx9_irq_mask(struct irq_data *d)
83{ 83{
84 unsigned int irq_nr = irq - TXX9_IRQ_BASE; 84 unsigned int irq_nr = d->irq - TXX9_IRQ_BASE;
85 u32 __iomem *ilrp = &txx9_ircptr->ilr[(irq_nr % 16) / 2]; 85 u32 __iomem *ilrp = &txx9_ircptr->ilr[(irq_nr % 16) / 2];
86 int ofs = irq_nr / 16 * 16 + (irq_nr & 1) * 8; 86 int ofs = irq_nr / 16 * 16 + (irq_nr & 1) * 8;
87 87
@@ -99,19 +99,19 @@ static inline void txx9_irq_mask(unsigned int irq)
99#endif 99#endif
100} 100}
101 101
102static void txx9_irq_mask_ack(unsigned int irq) 102static void txx9_irq_mask_ack(struct irq_data *d)
103{ 103{
104 unsigned int irq_nr = irq - TXX9_IRQ_BASE; 104 unsigned int irq_nr = d->irq - TXX9_IRQ_BASE;
105 105
106 txx9_irq_mask(irq); 106 txx9_irq_mask(d);
107 /* clear edge detection */ 107 /* clear edge detection */
108 if (unlikely(TXx9_IRCR_EDGE(txx9irq[irq_nr].mode))) 108 if (unlikely(TXx9_IRCR_EDGE(txx9irq[irq_nr].mode)))
109 __raw_writel(TXx9_IRSCR_EIClrE | irq_nr, &txx9_ircptr->scr); 109 __raw_writel(TXx9_IRSCR_EIClrE | irq_nr, &txx9_ircptr->scr);
110} 110}
111 111
112static int txx9_irq_set_type(unsigned int irq, unsigned int flow_type) 112static int txx9_irq_set_type(struct irq_data *d, unsigned int flow_type)
113{ 113{
114 unsigned int irq_nr = irq - TXX9_IRQ_BASE; 114 unsigned int irq_nr = d->irq - TXX9_IRQ_BASE;
115 u32 cr; 115 u32 cr;
116 u32 __iomem *crp; 116 u32 __iomem *crp;
117 int ofs; 117 int ofs;
@@ -139,11 +139,11 @@ static int txx9_irq_set_type(unsigned int irq, unsigned int flow_type)
139 139
140static struct irq_chip txx9_irq_chip = { 140static struct irq_chip txx9_irq_chip = {
141 .name = "TXX9", 141 .name = "TXX9",
142 .ack = txx9_irq_mask_ack, 142 .irq_ack = txx9_irq_mask_ack,
143 .mask = txx9_irq_mask, 143 .irq_mask = txx9_irq_mask,
144 .mask_ack = txx9_irq_mask_ack, 144 .irq_mask_ack = txx9_irq_mask_ack,
145 .unmask = txx9_irq_unmask, 145 .irq_unmask = txx9_irq_unmask,
146 .set_type = txx9_irq_set_type, 146 .irq_set_type = txx9_irq_set_type,
147}; 147};
148 148
149void __init txx9_irq_init(unsigned long baseaddr) 149void __init txx9_irq_init(unsigned long baseaddr)
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index fbaabad0e6e2..7f5468b38d4c 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -586,6 +586,10 @@ einval: li v0, -ENOSYS
586 sys sys_fanotify_init 2 586 sys sys_fanotify_init 2
587 sys sys_fanotify_mark 6 587 sys sys_fanotify_mark 6
588 sys sys_prlimit64 4 588 sys sys_prlimit64 4
589 sys sys_name_to_handle_at 5
590 sys sys_open_by_handle_at 3 /* 4340 */
591 sys sys_clock_adjtime 2
592 sys sys_syncfs 1
589 .endm 593 .endm
590 594
591 /* We pre-compute the number of _instruction_ bytes needed to 595 /* We pre-compute the number of _instruction_ bytes needed to
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index 3f4179283207..a2e1fcbc41dc 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -425,4 +425,8 @@ sys_call_table:
425 PTR sys_fanotify_init /* 5295 */ 425 PTR sys_fanotify_init /* 5295 */
426 PTR sys_fanotify_mark 426 PTR sys_fanotify_mark
427 PTR sys_prlimit64 427 PTR sys_prlimit64
428 PTR sys_name_to_handle_at
429 PTR sys_open_by_handle_at
430 PTR sys_clock_adjtime /* 5300 */
431 PTR sys_syncfs
428 .size sys_call_table,.-sys_call_table 432 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index f08ece6d8acc..b2c7624995b8 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -425,4 +425,8 @@ EXPORT(sysn32_call_table)
425 PTR sys_fanotify_init /* 6300 */ 425 PTR sys_fanotify_init /* 6300 */
426 PTR sys_fanotify_mark 426 PTR sys_fanotify_mark
427 PTR sys_prlimit64 427 PTR sys_prlimit64
428 PTR sys_name_to_handle_at
429 PTR sys_open_by_handle_at
430 PTR compat_sys_clock_adjtime /* 6305 */
431 PTR sys_syncfs
428 .size sysn32_call_table,.-sysn32_call_table 432 .size sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 78d768a3e19d..049a9c8c49a0 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -543,4 +543,8 @@ sys_call_table:
543 PTR sys_fanotify_init 543 PTR sys_fanotify_init
544 PTR sys_32_fanotify_mark 544 PTR sys_32_fanotify_mark
545 PTR sys_prlimit64 545 PTR sys_prlimit64
546 PTR sys_name_to_handle_at
547 PTR compat_sys_open_by_handle_at /* 4340 */
548 PTR compat_sys_clock_adjtime
549 PTR sys_syncfs
546 .size sys_call_table,.-sys_call_table 550 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 39c08254b0f1..f7e2c7807d7b 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -677,8 +677,9 @@ void smtc_set_irq_affinity(unsigned int irq, cpumask_t affinity)
677 */ 677 */
678} 678}
679 679
680void smtc_forward_irq(unsigned int irq) 680void smtc_forward_irq(struct irq_data *d)
681{ 681{
682 unsigned int irq = d->irq;
682 int target; 683 int target;
683 684
684 /* 685 /*
@@ -692,7 +693,7 @@ void smtc_forward_irq(unsigned int irq)
692 * and efficiency, we just pick the easiest one to find. 693 * and efficiency, we just pick the easiest one to find.
693 */ 694 */
694 695
695 target = cpumask_first(irq_desc[irq].affinity); 696 target = cpumask_first(d->affinity);
696 697
697 /* 698 /*
698 * We depend on the platform code to have correctly processed 699 * We depend on the platform code to have correctly processed
@@ -707,12 +708,10 @@ void smtc_forward_irq(unsigned int irq)
707 */ 708 */
708 709
709 /* If no one is eligible, service locally */ 710 /* If no one is eligible, service locally */
710 if (target >= NR_CPUS) { 711 if (target >= NR_CPUS)
711 do_IRQ_no_affinity(irq); 712 do_IRQ_no_affinity(irq);
712 return; 713 else
713 } 714 smtc_send_ipi(target, IRQ_AFFINITY_IPI, irq);
714
715 smtc_send_ipi(target, IRQ_AFFINITY_IPI, irq);
716} 715}
717 716
718#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ 717#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */
diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c
index 1353fb135ed3..670e3e70d198 100644
--- a/arch/mips/lasat/interrupt.c
+++ b/arch/mips/lasat/interrupt.c
@@ -32,24 +32,24 @@ static volatile int *lasat_int_status;
32static volatile int *lasat_int_mask; 32static volatile int *lasat_int_mask;
33static volatile int lasat_int_mask_shift; 33static volatile int lasat_int_mask_shift;
34 34
35void disable_lasat_irq(unsigned int irq_nr) 35void disable_lasat_irq(struct irq_data *d)
36{ 36{
37 irq_nr -= LASAT_IRQ_BASE; 37 unsigned int irq_nr = d->irq - LASAT_IRQ_BASE;
38
38 *lasat_int_mask &= ~(1 << irq_nr) << lasat_int_mask_shift; 39 *lasat_int_mask &= ~(1 << irq_nr) << lasat_int_mask_shift;
39} 40}
40 41
41void enable_lasat_irq(unsigned int irq_nr) 42void enable_lasat_irq(struct irq_data *d)
42{ 43{
43 irq_nr -= LASAT_IRQ_BASE; 44 unsigned int irq_nr = d->irq - LASAT_IRQ_BASE;
45
44 *lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift; 46 *lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift;
45} 47}
46 48
47static struct irq_chip lasat_irq_type = { 49static struct irq_chip lasat_irq_type = {
48 .name = "Lasat", 50 .name = "Lasat",
49 .ack = disable_lasat_irq, 51 .irq_mask = disable_lasat_irq,
50 .mask = disable_lasat_irq, 52 .irq_unmask = enable_lasat_irq,
51 .mask_ack = disable_lasat_irq,
52 .unmask = enable_lasat_irq,
53}; 53};
54 54
55static inline int ls1bit32(unsigned int x) 55static inline int ls1bit32(unsigned int x)
diff --git a/arch/mips/loongson/common/bonito-irq.c b/arch/mips/loongson/common/bonito-irq.c
index 2dc2a4cc632a..1549361696ad 100644
--- a/arch/mips/loongson/common/bonito-irq.c
+++ b/arch/mips/loongson/common/bonito-irq.c
@@ -16,24 +16,22 @@
16 16
17#include <loongson.h> 17#include <loongson.h>
18 18
19static inline void bonito_irq_enable(unsigned int irq) 19static inline void bonito_irq_enable(struct irq_data *d)
20{ 20{
21 LOONGSON_INTENSET = (1 << (irq - LOONGSON_IRQ_BASE)); 21 LOONGSON_INTENSET = (1 << (d->irq - LOONGSON_IRQ_BASE));
22 mmiowb(); 22 mmiowb();
23} 23}
24 24
25static inline void bonito_irq_disable(unsigned int irq) 25static inline void bonito_irq_disable(struct irq_data *d)
26{ 26{
27 LOONGSON_INTENCLR = (1 << (irq - LOONGSON_IRQ_BASE)); 27 LOONGSON_INTENCLR = (1 << (d->irq - LOONGSON_IRQ_BASE));
28 mmiowb(); 28 mmiowb();
29} 29}
30 30
31static struct irq_chip bonito_irq_type = { 31static struct irq_chip bonito_irq_type = {
32 .name = "bonito_irq", 32 .name = "bonito_irq",
33 .ack = bonito_irq_disable, 33 .irq_mask = bonito_irq_disable,
34 .mask = bonito_irq_disable, 34 .irq_unmask = bonito_irq_enable,
35 .mask_ack = bonito_irq_disable,
36 .unmask = bonito_irq_enable,
37}; 35};
38 36
39static struct irqaction __maybe_unused dma_timeout_irqaction = { 37static struct irqaction __maybe_unused dma_timeout_irqaction = {
diff --git a/arch/mips/mipssim/sim_smtc.c b/arch/mips/mipssim/sim_smtc.c
index 5da30b6a65b7..30df47258c2c 100644
--- a/arch/mips/mipssim/sim_smtc.c
+++ b/arch/mips/mipssim/sim_smtc.c
@@ -27,6 +27,7 @@
27#include <asm/atomic.h> 27#include <asm/atomic.h>
28#include <asm/cpu.h> 28#include <asm/cpu.h>
29#include <asm/processor.h> 29#include <asm/processor.h>
30#include <asm/smtc.h>
30#include <asm/system.h> 31#include <asm/system.h>
31#include <asm/mmu_context.h> 32#include <asm/mmu_context.h>
32#include <asm/smtc_ipi.h> 33#include <asm/smtc_ipi.h>
@@ -57,8 +58,6 @@ static inline void ssmtc_send_ipi_mask(const struct cpumask *mask,
57 */ 58 */
58static void __cpuinit ssmtc_init_secondary(void) 59static void __cpuinit ssmtc_init_secondary(void)
59{ 60{
60 void smtc_init_secondary(void);
61
62 smtc_init_secondary(); 61 smtc_init_secondary();
63} 62}
64 63
diff --git a/arch/mips/mti-malta/malta-smtc.c b/arch/mips/mti-malta/malta-smtc.c
index 192cfd2a539c..e67891521ac1 100644
--- a/arch/mips/mti-malta/malta-smtc.c
+++ b/arch/mips/mti-malta/malta-smtc.c
@@ -34,7 +34,6 @@ static void msmtc_send_ipi_mask(const struct cpumask *mask, unsigned int action)
34 */ 34 */
35static void __cpuinit msmtc_init_secondary(void) 35static void __cpuinit msmtc_init_secondary(void)
36{ 36{
37 void smtc_init_secondary(void);
38 int myvpe; 37 int myvpe;
39 38
40 /* Don't enable Malta I/O interrupts (IP2) for secondary VPEs */ 39 /* Don't enable Malta I/O interrupts (IP2) for secondary VPEs */
@@ -114,7 +113,8 @@ struct plat_smp_ops msmtc_smp_ops = {
114 */ 113 */
115 114
116 115
117int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) 116int plat_set_irq_affinity(struct irq_data *d, const struct cpumask *affinity,
117 bool force)
118{ 118{
119 cpumask_t tmask; 119 cpumask_t tmask;
120 int cpu = 0; 120 int cpu = 0;
@@ -144,7 +144,7 @@ int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
144 if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu)) 144 if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu))
145 cpu_clear(cpu, tmask); 145 cpu_clear(cpu, tmask);
146 } 146 }
147 cpumask_copy(irq_desc[irq].affinity, &tmask); 147 cpumask_copy(d->affinity, &tmask);
148 148
149 if (cpus_empty(tmask)) 149 if (cpus_empty(tmask))
150 /* 150 /*
@@ -155,8 +155,8 @@ int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
155 "IRQ affinity leaves no legal CPU for IRQ %d\n", irq); 155 "IRQ affinity leaves no legal CPU for IRQ %d\n", irq);
156 156
157 /* Do any generic SMTC IRQ affinity setup */ 157 /* Do any generic SMTC IRQ affinity setup */
158 smtc_set_irq_affinity(irq, tmask); 158 smtc_set_irq_affinity(d->irq, tmask);
159 159
160 return 0; 160 return IRQ_SET_MASK_OK_NOCOPY;
161} 161}
162#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ 162#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */
diff --git a/arch/mips/pmc-sierra/Kconfig b/arch/mips/pmc-sierra/Kconfig
index 8d798497c614..bbd76082fa8c 100644
--- a/arch/mips/pmc-sierra/Kconfig
+++ b/arch/mips/pmc-sierra/Kconfig
@@ -23,6 +23,8 @@ config PMC_MSP7120_GW
23 select SYS_SUPPORTS_MULTITHREADING 23 select SYS_SUPPORTS_MULTITHREADING
24 select IRQ_MSP_CIC 24 select IRQ_MSP_CIC
25 select HW_HAS_PCI 25 select HW_HAS_PCI
26 select MSP_HAS_USB
27 select MSP_ETH
26 28
27config PMC_MSP7120_FPGA 29config PMC_MSP7120_FPGA
28 bool "PMC-Sierra MSP7120 FPGA" 30 bool "PMC-Sierra MSP7120 FPGA"
@@ -35,3 +37,16 @@ endchoice
35config HYPERTRANSPORT 37config HYPERTRANSPORT
36 bool "Hypertransport Support for PMC-Sierra Yosemite" 38 bool "Hypertransport Support for PMC-Sierra Yosemite"
37 depends on PMC_YOSEMITE 39 depends on PMC_YOSEMITE
40
41config MSP_HAS_USB
42 boolean
43 depends on PMC_MSP
44
45config MSP_ETH
46 boolean
47 select MSP_HAS_MAC
48 depends on PMC_MSP
49
50config MSP_HAS_MAC
51 boolean
52 depends on PMC_MSP
diff --git a/arch/mips/pmc-sierra/msp71xx/Makefile b/arch/mips/pmc-sierra/msp71xx/Makefile
index e107f79b1491..cefba7733b73 100644
--- a/arch/mips/pmc-sierra/msp71xx/Makefile
+++ b/arch/mips/pmc-sierra/msp71xx/Makefile
@@ -6,7 +6,9 @@ obj-y += msp_prom.o msp_setup.o msp_irq.o \
6obj-$(CONFIG_HAVE_GPIO_LIB) += gpio.o gpio_extended.o 6obj-$(CONFIG_HAVE_GPIO_LIB) += gpio.o gpio_extended.o
7obj-$(CONFIG_PMC_MSP7120_GW) += msp_hwbutton.o 7obj-$(CONFIG_PMC_MSP7120_GW) += msp_hwbutton.o
8obj-$(CONFIG_IRQ_MSP_SLP) += msp_irq_slp.o 8obj-$(CONFIG_IRQ_MSP_SLP) += msp_irq_slp.o
9obj-$(CONFIG_IRQ_MSP_CIC) += msp_irq_cic.o 9obj-$(CONFIG_IRQ_MSP_CIC) += msp_irq_cic.o msp_irq_per.o
10obj-$(CONFIG_PCI) += msp_pci.o 10obj-$(CONFIG_PCI) += msp_pci.o
11obj-$(CONFIG_MSPETH) += msp_eth.o 11obj-$(CONFIG_MSP_HAS_MAC) += msp_eth.o
12obj-$(CONFIG_USB_MSP71XX) += msp_usb.o 12obj-$(CONFIG_MSP_HAS_USB) += msp_usb.o
13obj-$(CONFIG_MIPS_MT_SMP) += msp_smp.o
14obj-$(CONFIG_MIPS_MT_SMTC) += msp_smtc.o
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_eth.c b/arch/mips/pmc-sierra/msp71xx/msp_eth.c
new file mode 100644
index 000000000000..c584df393de2
--- /dev/null
+++ b/arch/mips/pmc-sierra/msp71xx/msp_eth.c
@@ -0,0 +1,187 @@
1/*
2 * The setup file for ethernet related hardware on PMC-Sierra MSP processors.
3 *
4 * Copyright 2010 PMC-Sierra, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27#include <linux/init.h>
28#include <linux/kernel.h>
29#include <linux/ioport.h>
30#include <linux/platform_device.h>
31#include <linux/delay.h>
32#include <msp_regs.h>
33#include <msp_int.h>
34#include <msp_gpio_macros.h>
35
36
37#define MSP_ETHERNET_GPIO0 14
38#define MSP_ETHERNET_GPIO1 15
39#define MSP_ETHERNET_GPIO2 16
40
41#ifdef CONFIG_MSP_HAS_TSMAC
42#define MSP_TSMAC_SIZE 0x10020
43#define MSP_TSMAC_ID "pmc_tsmac"
44
45static struct resource msp_tsmac0_resources[] = {
46 [0] = {
47 .start = MSP_MAC0_BASE,
48 .end = MSP_MAC0_BASE + MSP_TSMAC_SIZE - 1,
49 .flags = IORESOURCE_MEM,
50 },
51 [1] = {
52 .start = MSP_INT_MAC0,
53 .end = MSP_INT_MAC0,
54 .flags = IORESOURCE_IRQ,
55 },
56};
57
58static struct resource msp_tsmac1_resources[] = {
59 [0] = {
60 .start = MSP_MAC1_BASE,
61 .end = MSP_MAC1_BASE + MSP_TSMAC_SIZE - 1,
62 .flags = IORESOURCE_MEM,
63 },
64 [1] = {
65 .start = MSP_INT_MAC1,
66 .end = MSP_INT_MAC1,
67 .flags = IORESOURCE_IRQ,
68 },
69};
70static struct resource msp_tsmac2_resources[] = {
71 [0] = {
72 .start = MSP_MAC2_BASE,
73 .end = MSP_MAC2_BASE + MSP_TSMAC_SIZE - 1,
74 .flags = IORESOURCE_MEM,
75 },
76 [1] = {
77 .start = MSP_INT_SAR,
78 .end = MSP_INT_SAR,
79 .flags = IORESOURCE_IRQ,
80 },
81};
82
83
84static struct platform_device tsmac_device[] = {
85 [0] = {
86 .name = MSP_TSMAC_ID,
87 .id = 0,
88 .num_resources = ARRAY_SIZE(msp_tsmac0_resources),
89 .resource = msp_tsmac0_resources,
90 },
91 [1] = {
92 .name = MSP_TSMAC_ID,
93 .id = 1,
94 .num_resources = ARRAY_SIZE(msp_tsmac1_resources),
95 .resource = msp_tsmac1_resources,
96 },
97 [2] = {
98 .name = MSP_TSMAC_ID,
99 .id = 2,
100 .num_resources = ARRAY_SIZE(msp_tsmac2_resources),
101 .resource = msp_tsmac2_resources,
102 },
103};
104#define msp_eth_devs tsmac_device
105
106#else
107/* If it is not TSMAC assume MSP_ETH (100Mbps) */
108#define MSP_ETH_ID "pmc_mspeth"
109#define MSP_ETH_SIZE 0xE0
110static struct resource msp_eth0_resources[] = {
111 [0] = {
112 .start = MSP_MAC0_BASE,
113 .end = MSP_MAC0_BASE + MSP_ETH_SIZE - 1,
114 .flags = IORESOURCE_MEM,
115 },
116 [1] = {
117 .start = MSP_INT_MAC0,
118 .end = MSP_INT_MAC0,
119 .flags = IORESOURCE_IRQ,
120 },
121};
122
123static struct resource msp_eth1_resources[] = {
124 [0] = {
125 .start = MSP_MAC1_BASE,
126 .end = MSP_MAC1_BASE + MSP_ETH_SIZE - 1,
127 .flags = IORESOURCE_MEM,
128 },
129 [1] = {
130 .start = MSP_INT_MAC1,
131 .end = MSP_INT_MAC1,
132 .flags = IORESOURCE_IRQ,
133 },
134};
135
136
137
138static struct platform_device mspeth_device[] = {
139 [0] = {
140 .name = MSP_ETH_ID,
141 .id = 0,
142 .num_resources = ARRAY_SIZE(msp_eth0_resources),
143 .resource = msp_eth0_resources,
144 },
145 [1] = {
146 .name = MSP_ETH_ID,
147 .id = 1,
148 .num_resources = ARRAY_SIZE(msp_eth1_resources),
149 .resource = msp_eth1_resources,
150 },
151
152};
153#define msp_eth_devs mspeth_device
154
155#endif
156int __init msp_eth_setup(void)
157{
158 int i, ret = 0;
159
160 /* Configure the GPIO and take the ethernet PHY out of reset */
161 msp_gpio_pin_mode(MSP_GPIO_OUTPUT, MSP_ETHERNET_GPIO0);
162 msp_gpio_pin_hi(MSP_ETHERNET_GPIO0);
163
164#ifdef CONFIG_MSP_HAS_TSMAC
165 /* 3 phys on boards with TSMAC */
166 msp_gpio_pin_mode(MSP_GPIO_OUTPUT, MSP_ETHERNET_GPIO1);
167 msp_gpio_pin_hi(MSP_ETHERNET_GPIO1);
168
169 msp_gpio_pin_mode(MSP_GPIO_OUTPUT, MSP_ETHERNET_GPIO2);
170 msp_gpio_pin_hi(MSP_ETHERNET_GPIO2);
171#endif
172 for (i = 0; i < ARRAY_SIZE(msp_eth_devs); i++) {
173 ret = platform_device_register(&msp_eth_devs[i]);
174 printk(KERN_INFO "device: %d, return value = %d\n", i, ret);
175 if (ret) {
176 platform_device_unregister(&msp_eth_devs[i]);
177 break;
178 }
179 }
180
181 if (ret)
182 printk(KERN_WARNING "Could not initialize "
183 "MSPETH device structures.\n");
184
185 return ret;
186}
187subsys_initcall(msp_eth_setup);
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq.c b/arch/mips/pmc-sierra/msp71xx/msp_irq.c
index 734d598a2e3a..4531c4a514bc 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_irq.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_irq.c
@@ -19,8 +19,6 @@
19 19
20#include <msp_int.h> 20#include <msp_int.h>
21 21
22extern void msp_int_handle(void);
23
24/* SLP bases systems */ 22/* SLP bases systems */
25extern void msp_slp_irq_init(void); 23extern void msp_slp_irq_init(void);
26extern void msp_slp_irq_dispatch(void); 24extern void msp_slp_irq_dispatch(void);
@@ -29,6 +27,18 @@ extern void msp_slp_irq_dispatch(void);
29extern void msp_cic_irq_init(void); 27extern void msp_cic_irq_init(void);
30extern void msp_cic_irq_dispatch(void); 28extern void msp_cic_irq_dispatch(void);
31 29
30/* VSMP support init */
31extern void msp_vsmp_int_init(void);
32
33/* vectored interrupt implementation */
34
35/* SW0/1 interrupts are used for SMP/SMTC */
36static inline void mac0_int_dispatch(void) { do_IRQ(MSP_INT_MAC0); }
37static inline void mac1_int_dispatch(void) { do_IRQ(MSP_INT_MAC1); }
38static inline void mac2_int_dispatch(void) { do_IRQ(MSP_INT_SAR); }
39static inline void usb_int_dispatch(void) { do_IRQ(MSP_INT_USB); }
40static inline void sec_int_dispatch(void) { do_IRQ(MSP_INT_SEC); }
41
32/* 42/*
33 * The PMC-Sierra MSP interrupts are arranged in a 3 level cascaded 43 * The PMC-Sierra MSP interrupts are arranged in a 3 level cascaded
34 * hierarchical system. The first level are the direct MIPS interrupts 44 * hierarchical system. The first level are the direct MIPS interrupts
@@ -96,29 +106,57 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
96 do_IRQ(MSP_INT_SW1); 106 do_IRQ(MSP_INT_SW1);
97} 107}
98 108
99static struct irqaction cascade_msp = { 109static struct irqaction cic_cascade_msp = {
100 .handler = no_action, 110 .handler = no_action,
101 .name = "MSP cascade" 111 .name = "MSP CIC cascade"
102}; 112};
103 113
114static struct irqaction per_cascade_msp = {
115 .handler = no_action,
116 .name = "MSP PER cascade"
117};
104 118
105void __init arch_init_irq(void) 119void __init arch_init_irq(void)
106{ 120{
121 /* assume we'll be using vectored interrupt mode except in UP mode*/
122#ifdef CONFIG_MIPS_MT
123 BUG_ON(!cpu_has_vint);
124#endif
107 /* initialize the 1st-level CPU based interrupt controller */ 125 /* initialize the 1st-level CPU based interrupt controller */
108 mips_cpu_irq_init(); 126 mips_cpu_irq_init();
109 127
110#ifdef CONFIG_IRQ_MSP_CIC 128#ifdef CONFIG_IRQ_MSP_CIC
111 msp_cic_irq_init(); 129 msp_cic_irq_init();
112 130#ifdef CONFIG_MIPS_MT
131 set_vi_handler(MSP_INT_CIC, msp_cic_irq_dispatch);
132 set_vi_handler(MSP_INT_MAC0, mac0_int_dispatch);
133 set_vi_handler(MSP_INT_MAC1, mac1_int_dispatch);
134 set_vi_handler(MSP_INT_SAR, mac2_int_dispatch);
135 set_vi_handler(MSP_INT_USB, usb_int_dispatch);
136 set_vi_handler(MSP_INT_SEC, sec_int_dispatch);
137#ifdef CONFIG_MIPS_MT_SMP
138 msp_vsmp_int_init();
139#elif defined CONFIG_MIPS_MT_SMTC
140 /*Set hwmask for all platform devices */
141 irq_hwmask[MSP_INT_MAC0] = C_IRQ0;
142 irq_hwmask[MSP_INT_MAC1] = C_IRQ1;
143 irq_hwmask[MSP_INT_USB] = C_IRQ2;
144 irq_hwmask[MSP_INT_SAR] = C_IRQ3;
145 irq_hwmask[MSP_INT_SEC] = C_IRQ5;
146
147#endif /* CONFIG_MIPS_MT_SMP */
148#endif /* CONFIG_MIPS_MT */
113 /* setup the cascaded interrupts */ 149 /* setup the cascaded interrupts */
114 setup_irq(MSP_INT_CIC, &cascade_msp); 150 setup_irq(MSP_INT_CIC, &cic_cascade_msp);
115 setup_irq(MSP_INT_PER, &cascade_msp); 151 setup_irq(MSP_INT_PER, &per_cascade_msp);
152
116#else 153#else
117 /* setup the 2nd-level SLP register based interrupt controller */ 154 /* setup the 2nd-level SLP register based interrupt controller */
155 /* VSMP /SMTC support support is not enabled for SLP */
118 msp_slp_irq_init(); 156 msp_slp_irq_init();
119 157
120 /* setup the cascaded SLP/PER interrupts */ 158 /* setup the cascaded SLP/PER interrupts */
121 setup_irq(MSP_INT_SLP, &cascade_msp); 159 setup_irq(MSP_INT_SLP, &cic_cascade_msp);
122 setup_irq(MSP_INT_PER, &cascade_msp); 160 setup_irq(MSP_INT_PER, &per_cascade_msp);
123#endif 161#endif
124} 162}
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c b/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c
index 07e71ff2433f..352f29d9226f 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c
@@ -1,8 +1,7 @@
1/* 1/*
2 * This file define the irq handler for MSP SLM subsystem interrupts. 2 * Copyright 2010 PMC-Sierra, Inc, derived from irq_cpu.c
3 * 3 *
4 * Copyright 2005-2007 PMC-Sierra, Inc, derived from irq_cpu.c 4 * This file define the irq handler for MSP CIC subsystem interrupts.
5 * Author: Andrew Hughes, Andrew_Hughes@pmc-sierra.com
6 * 5 *
7 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
@@ -16,119 +15,203 @@
16#include <linux/bitops.h> 15#include <linux/bitops.h>
17#include <linux/irq.h> 16#include <linux/irq.h>
18 17
18#include <asm/mipsregs.h>
19#include <asm/system.h> 19#include <asm/system.h>
20 20
21#include <msp_cic_int.h> 21#include <msp_cic_int.h>
22#include <msp_regs.h> 22#include <msp_regs.h>
23 23
24/* 24/*
25 * NOTE: We are only enabling support for VPE0 right now. 25 * External API
26 */ 26 */
27extern void msp_per_irq_init(void);
28extern void msp_per_irq_dispatch(void);
27 29
28static inline void unmask_msp_cic_irq(unsigned int irq) 30
31/*
32 * Convenience Macro. Should be somewhere generic.
33 */
34#define get_current_vpe() \
35 ((read_c0_tcbind() >> TCBIND_CURVPE_SHIFT) & TCBIND_CURVPE)
36
37#ifdef CONFIG_SMP
38
39#define LOCK_VPE(flags, mtflags) \
40do { \
41 local_irq_save(flags); \
42 mtflags = dmt(); \
43} while (0)
44
45#define UNLOCK_VPE(flags, mtflags) \
46do { \
47 emt(mtflags); \
48 local_irq_restore(flags);\
49} while (0)
50
51#define LOCK_CORE(flags, mtflags) \
52do { \
53 local_irq_save(flags); \
54 mtflags = dvpe(); \
55} while (0)
56
57#define UNLOCK_CORE(flags, mtflags) \
58do { \
59 evpe(mtflags); \
60 local_irq_restore(flags);\
61} while (0)
62
63#else
64
65#define LOCK_VPE(flags, mtflags)
66#define UNLOCK_VPE(flags, mtflags)
67#endif
68
69/* ensure writes to cic are completed */
70static inline void cic_wmb(void)
29{ 71{
72 const volatile void __iomem *cic_mem = CIC_VPE0_MSK_REG;
73 volatile u32 dummy_read;
30 74
31 /* check for PER interrupt range */ 75 wmb();
32 if (irq < MSP_PER_INTBASE) 76 dummy_read = __raw_readl(cic_mem);
33 *CIC_VPE0_MSK_REG |= (1 << (irq - MSP_CIC_INTBASE)); 77 dummy_read++;
34 else
35 *PER_INT_MSK_REG |= (1 << (irq - MSP_PER_INTBASE));
36} 78}
37 79
38static inline void mask_msp_cic_irq(unsigned int irq) 80static void unmask_cic_irq(struct irq_data *d)
39{ 81{
40 /* check for PER interrupt range */ 82 volatile u32 *cic_msk_reg = CIC_VPE0_MSK_REG;
41 if (irq < MSP_PER_INTBASE) 83 int vpe;
42 *CIC_VPE0_MSK_REG &= ~(1 << (irq - MSP_CIC_INTBASE)); 84#ifdef CONFIG_SMP
43 else 85 unsigned int mtflags;
44 *PER_INT_MSK_REG &= ~(1 << (irq - MSP_PER_INTBASE)); 86 unsigned long flags;
87
88 /*
89 * Make sure we have IRQ affinity. It may have changed while
90 * we were processing the IRQ.
91 */
92 if (!cpumask_test_cpu(smp_processor_id(), d->affinity))
93 return;
94#endif
95
96 vpe = get_current_vpe();
97 LOCK_VPE(flags, mtflags);
98 cic_msk_reg[vpe] |= (1 << (d->irq - MSP_CIC_INTBASE));
99 UNLOCK_VPE(flags, mtflags);
100 cic_wmb();
45} 101}
46 102
47/* 103static void mask_cic_irq(struct irq_data *d)
48 * While we ack the interrupt interrupts are disabled and thus we don't need
49 * to deal with concurrency issues. Same for msp_cic_irq_end.
50 */
51static inline void ack_msp_cic_irq(unsigned int irq)
52{ 104{
53 mask_msp_cic_irq(irq); 105 volatile u32 *cic_msk_reg = CIC_VPE0_MSK_REG;
54 106 int vpe = get_current_vpe();
107#ifdef CONFIG_SMP
108 unsigned long flags, mtflags;
109#endif
110 LOCK_VPE(flags, mtflags);
111 cic_msk_reg[vpe] &= ~(1 << (d->irq - MSP_CIC_INTBASE));
112 UNLOCK_VPE(flags, mtflags);
113 cic_wmb();
114}
115static void msp_cic_irq_ack(struct irq_data *d)
116{
117 mask_cic_irq(d);
55 /* 118 /*
56 * only really necessary for 18, 16-14 and sometimes 3:0 (since 119 * Only really necessary for 18, 16-14 and sometimes 3:0
57 * these can be edge sensitive) but it doesn't hurt for the others. 120 * (since these can be edge sensitive) but it doesn't
58 */ 121 * hurt for the others
59 122 */
60 /* check for PER interrupt range */ 123 *CIC_STS_REG = (1 << (d->irq - MSP_CIC_INTBASE));
61 if (irq < MSP_PER_INTBASE) 124 smtc_im_ack_irq(d->irq);
62 *CIC_STS_REG = (1 << (irq - MSP_CIC_INTBASE));
63 else
64 *PER_INT_STS_REG = (1 << (irq - MSP_PER_INTBASE));
65} 125}
66 126
127/*Note: Limiting to VSMP . Not tested in SMTC */
128
129#ifdef CONFIG_MIPS_MT_SMP
130static int msp_cic_irq_set_affinity(struct irq_data *d,
131 const struct cpumask *cpumask, bool force)
132{
133 int cpu;
134 unsigned long flags;
135 unsigned int mtflags;
136 unsigned long imask = (1 << (irq - MSP_CIC_INTBASE));
137 volatile u32 *cic_mask = (volatile u32 *)CIC_VPE0_MSK_REG;
138
139 /* timer balancing should be disabled in kernel code */
140 BUG_ON(irq == MSP_INT_VPE0_TIMER || irq == MSP_INT_VPE1_TIMER);
141
142 LOCK_CORE(flags, mtflags);
143 /* enable if any of each VPE's TCs require this IRQ */
144 for_each_online_cpu(cpu) {
145 if (cpumask_test_cpu(cpu, cpumask))
146 cic_mask[cpu] |= imask;
147 else
148 cic_mask[cpu] &= ~imask;
149
150 }
151
152 UNLOCK_CORE(flags, mtflags);
153 return 0;
154
155}
156#endif
157
67static struct irq_chip msp_cic_irq_controller = { 158static struct irq_chip msp_cic_irq_controller = {
68 .name = "MSP_CIC", 159 .name = "MSP_CIC",
69 .ack = ack_msp_cic_irq, 160 .irq_mask = mask_cic_irq,
70 .mask = ack_msp_cic_irq, 161 .irq_mask_ack = msp_cic_irq_ack,
71 .mask_ack = ack_msp_cic_irq, 162 .irq_unmask = unmask_cic_irq,
72 .unmask = unmask_msp_cic_irq, 163 .irq_ack = msp_cic_irq_ack,
164#ifdef CONFIG_MIPS_MT_SMP
165 .irq_set_affinity = msp_cic_irq_set_affinity,
166#endif
73}; 167};
74 168
75
76void __init msp_cic_irq_init(void) 169void __init msp_cic_irq_init(void)
77{ 170{
78 int i; 171 int i;
79
80 /* Mask/clear interrupts. */ 172 /* Mask/clear interrupts. */
81 *CIC_VPE0_MSK_REG = 0x00000000; 173 *CIC_VPE0_MSK_REG = 0x00000000;
82 *PER_INT_MSK_REG = 0x00000000; 174 *CIC_VPE1_MSK_REG = 0x00000000;
83 *CIC_STS_REG = 0xFFFFFFFF; 175 *CIC_STS_REG = 0xFFFFFFFF;
84 *PER_INT_STS_REG = 0xFFFFFFFF;
85
86#if defined(CONFIG_PMC_MSP7120_GW) || \
87 defined(CONFIG_PMC_MSP7120_EVAL)
88 /* 176 /*
89 * The MSP7120 RG and EVBD boards use IRQ[6:4] for PCI. 177 * The MSP7120 RG and EVBD boards use IRQ[6:4] for PCI.
90 * These inputs map to EXT_INT_POL[6:4] inside the CIC. 178 * These inputs map to EXT_INT_POL[6:4] inside the CIC.
91 * They are to be active low, level sensitive. 179 * They are to be active low, level sensitive.
92 */ 180 */
93 *CIC_EXT_CFG_REG &= 0xFFFF8F8F; 181 *CIC_EXT_CFG_REG &= 0xFFFF8F8F;
94#endif
95 182
96 /* initialize all the IRQ descriptors */ 183 /* initialize all the IRQ descriptors */
97 for (i = MSP_CIC_INTBASE; i < MSP_PER_INTBASE + 32; i++) 184 for (i = MSP_CIC_INTBASE ; i < MSP_CIC_INTBASE + 32 ; i++) {
98 set_irq_chip_and_handler(i, &msp_cic_irq_controller, 185 set_irq_chip_and_handler(i, &msp_cic_irq_controller,
99 handle_level_irq); 186 handle_level_irq);
187#ifdef CONFIG_MIPS_MT_SMTC
188 /* Mask of CIC interrupt */
189 irq_hwmask[i] = C_IRQ4;
190#endif
191 }
192
193 /* Initialize the PER interrupt sub-system */
194 msp_per_irq_init();
100} 195}
101 196
197/* CIC masked by CIC vector processing before dispatch called */
102void msp_cic_irq_dispatch(void) 198void msp_cic_irq_dispatch(void)
103{ 199{
104 u32 pending; 200 volatile u32 *cic_msk_reg = (volatile u32 *)CIC_VPE0_MSK_REG;
105 int intbase; 201 u32 cic_mask;
106 202 u32 pending;
107 intbase = MSP_CIC_INTBASE; 203 int cic_status = *CIC_STS_REG;
108 pending = *CIC_STS_REG & *CIC_VPE0_MSK_REG; 204 cic_mask = cic_msk_reg[get_current_vpe()];
109 205 pending = cic_status & cic_mask;
110 /* check for PER interrupt */ 206 if (pending & (1 << (MSP_INT_VPE0_TIMER - MSP_CIC_INTBASE))) {
111 if (pending == (1 << (MSP_INT_PER - MSP_CIC_INTBASE))) {
112 intbase = MSP_PER_INTBASE;
113 pending = *PER_INT_STS_REG & *PER_INT_MSK_REG;
114 }
115
116 /* check for spurious interrupt */
117 if (pending == 0x00000000) {
118 printk(KERN_ERR
119 "Spurious %s interrupt? status %08x, mask %08x\n",
120 (intbase == MSP_CIC_INTBASE) ? "CIC" : "PER",
121 (intbase == MSP_CIC_INTBASE) ?
122 *CIC_STS_REG : *PER_INT_STS_REG,
123 (intbase == MSP_CIC_INTBASE) ?
124 *CIC_VPE0_MSK_REG : *PER_INT_MSK_REG);
125 return;
126 }
127
128 /* check for the timer and dispatch it first */
129 if ((intbase == MSP_CIC_INTBASE) &&
130 (pending & (1 << (MSP_INT_VPE0_TIMER - MSP_CIC_INTBASE))))
131 do_IRQ(MSP_INT_VPE0_TIMER); 207 do_IRQ(MSP_INT_VPE0_TIMER);
132 else 208 } else if (pending & (1 << (MSP_INT_VPE1_TIMER - MSP_CIC_INTBASE))) {
133 do_IRQ(ffs(pending) + intbase - 1); 209 do_IRQ(MSP_INT_VPE1_TIMER);
210 } else if (pending & (1 << (MSP_INT_PER - MSP_CIC_INTBASE))) {
211 msp_per_irq_dispatch();
212 } else if (pending) {
213 do_IRQ(ffs(pending) + MSP_CIC_INTBASE - 1);
214 } else{
215 spurious_interrupt();
216 }
134} 217}
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c b/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c
new file mode 100644
index 000000000000..f9b9dcdfa9dd
--- /dev/null
+++ b/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c
@@ -0,0 +1,135 @@
1/*
2 * Copyright 2010 PMC-Sierra, Inc, derived from irq_cpu.c
3 *
4 * This file define the irq handler for MSP PER subsystem interrupts.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/kernel.h>
15#include <linux/spinlock.h>
16#include <linux/bitops.h>
17
18#include <asm/mipsregs.h>
19#include <asm/system.h>
20
21#include <msp_cic_int.h>
22#include <msp_regs.h>
23
24
25/*
26 * Convenience Macro. Should be somewhere generic.
27 */
28#define get_current_vpe() \
29 ((read_c0_tcbind() >> TCBIND_CURVPE_SHIFT) & TCBIND_CURVPE)
30
31#ifdef CONFIG_SMP
32/*
33 * The PER registers must be protected from concurrent access.
34 */
35
36static DEFINE_SPINLOCK(per_lock);
37#endif
38
39/* ensure writes to per are completed */
40
41static inline void per_wmb(void)
42{
43 const volatile void __iomem *per_mem = PER_INT_MSK_REG;
44 volatile u32 dummy_read;
45
46 wmb();
47 dummy_read = __raw_readl(per_mem);
48 dummy_read++;
49}
50
51static inline void unmask_per_irq(struct irq_data *d)
52{
53#ifdef CONFIG_SMP
54 unsigned long flags;
55 spin_lock_irqsave(&per_lock, flags);
56 *PER_INT_MSK_REG |= (1 << (d->irq - MSP_PER_INTBASE));
57 spin_unlock_irqrestore(&per_lock, flags);
58#else
59 *PER_INT_MSK_REG |= (1 << (d->irq - MSP_PER_INTBASE));
60#endif
61 per_wmb();
62}
63
64static inline void mask_per_irq(struct irq_data *d)
65{
66#ifdef CONFIG_SMP
67 unsigned long flags;
68 spin_lock_irqsave(&per_lock, flags);
69 *PER_INT_MSK_REG &= ~(1 << (d->irq - MSP_PER_INTBASE));
70 spin_unlock_irqrestore(&per_lock, flags);
71#else
72 *PER_INT_MSK_REG &= ~(1 << (d->irq - MSP_PER_INTBASE));
73#endif
74 per_wmb();
75}
76
77static inline void msp_per_irq_ack(struct irq_data *d)
78{
79 mask_per_irq(d);
80 /*
81 * In the PER interrupt controller, only bits 11 and 10
82 * are write-to-clear, (SPI TX complete, SPI RX complete).
83 * It does nothing for any others.
84 */
85 *PER_INT_STS_REG = (1 << (d->irq - MSP_PER_INTBASE));
86}
87
88#ifdef CONFIG_SMP
89static int msp_per_irq_set_affinity(struct irq_data *d,
90 const struct cpumask *affinity, bool force)
91{
92 /* WTF is this doing ????? */
93 unmask_per_irq(d);
94 return 0;
95}
96#endif
97
98static struct irq_chip msp_per_irq_controller = {
99 .name = "MSP_PER",
100 .irq_enable = unmask_per_irq.
101 .irq_disable = mask_per_irq,
102 .irq_ack = msp_per_irq_ack,
103#ifdef CONFIG_SMP
104 .irq_set_affinity = msp_per_irq_set_affinity,
105#endif
106};
107
108void __init msp_per_irq_init(void)
109{
110 int i;
111 /* Mask/clear interrupts. */
112 *PER_INT_MSK_REG = 0x00000000;
113 *PER_INT_STS_REG = 0xFFFFFFFF;
114 /* initialize all the IRQ descriptors */
115 for (i = MSP_PER_INTBASE; i < MSP_PER_INTBASE + 32; i++) {
116 irq_set_chip(i, &msp_per_irq_controller);
117#ifdef CONFIG_MIPS_MT_SMTC
118 irq_hwmask[i] = C_IRQ4;
119#endif
120 }
121}
122
123void msp_per_irq_dispatch(void)
124{
125 u32 per_mask = *PER_INT_MSK_REG;
126 u32 per_status = *PER_INT_STS_REG;
127 u32 pending;
128
129 pending = per_status & per_mask;
130 if (pending) {
131 do_IRQ(ffs(pending) + MSP_PER_INTBASE - 1);
132 } else {
133 spurious_interrupt();
134 }
135}
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c b/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c
index 61f390232346..8f51e4adc438 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c
@@ -21,8 +21,10 @@
21#include <msp_slp_int.h> 21#include <msp_slp_int.h>
22#include <msp_regs.h> 22#include <msp_regs.h>
23 23
24static inline void unmask_msp_slp_irq(unsigned int irq) 24static inline void unmask_msp_slp_irq(struct irq_data *d)
25{ 25{
26 unsigned int irq = d->irq;
27
26 /* check for PER interrupt range */ 28 /* check for PER interrupt range */
27 if (irq < MSP_PER_INTBASE) 29 if (irq < MSP_PER_INTBASE)
28 *SLP_INT_MSK_REG |= (1 << (irq - MSP_SLP_INTBASE)); 30 *SLP_INT_MSK_REG |= (1 << (irq - MSP_SLP_INTBASE));
@@ -30,8 +32,10 @@ static inline void unmask_msp_slp_irq(unsigned int irq)
30 *PER_INT_MSK_REG |= (1 << (irq - MSP_PER_INTBASE)); 32 *PER_INT_MSK_REG |= (1 << (irq - MSP_PER_INTBASE));
31} 33}
32 34
33static inline void mask_msp_slp_irq(unsigned int irq) 35static inline void mask_msp_slp_irq(struct irq_data *d)
34{ 36{
37 unsigned int irq = d->irq;
38
35 /* check for PER interrupt range */ 39 /* check for PER interrupt range */
36 if (irq < MSP_PER_INTBASE) 40 if (irq < MSP_PER_INTBASE)
37 *SLP_INT_MSK_REG &= ~(1 << (irq - MSP_SLP_INTBASE)); 41 *SLP_INT_MSK_REG &= ~(1 << (irq - MSP_SLP_INTBASE));
@@ -43,8 +47,10 @@ static inline void mask_msp_slp_irq(unsigned int irq)
43 * While we ack the interrupt interrupts are disabled and thus we don't need 47 * While we ack the interrupt interrupts are disabled and thus we don't need
44 * to deal with concurrency issues. Same for msp_slp_irq_end. 48 * to deal with concurrency issues. Same for msp_slp_irq_end.
45 */ 49 */
46static inline void ack_msp_slp_irq(unsigned int irq) 50static inline void ack_msp_slp_irq(struct irq_data *d)
47{ 51{
52 unsigned int irq = d->irq;
53
48 /* check for PER interrupt range */ 54 /* check for PER interrupt range */
49 if (irq < MSP_PER_INTBASE) 55 if (irq < MSP_PER_INTBASE)
50 *SLP_INT_STS_REG = (1 << (irq - MSP_SLP_INTBASE)); 56 *SLP_INT_STS_REG = (1 << (irq - MSP_SLP_INTBASE));
@@ -54,9 +60,9 @@ static inline void ack_msp_slp_irq(unsigned int irq)
54 60
55static struct irq_chip msp_slp_irq_controller = { 61static struct irq_chip msp_slp_irq_controller = {
56 .name = "MSP_SLP", 62 .name = "MSP_SLP",
57 .ack = ack_msp_slp_irq, 63 .irq_ack = ack_msp_slp_irq,
58 .mask = mask_msp_slp_irq, 64 .irq_mask = mask_msp_slp_irq,
59 .unmask = unmask_msp_slp_irq, 65 .irq_unmask = unmask_msp_slp_irq,
60}; 66};
61 67
62void __init msp_slp_irq_init(void) 68void __init msp_slp_irq_init(void)
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_setup.c b/arch/mips/pmc-sierra/msp71xx/msp_setup.c
index a54e85b3cf29..fb37a10e0309 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_setup.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_setup.c
@@ -146,6 +146,8 @@ void __init plat_mem_setup(void)
146 pm_power_off = msp_power_off; 146 pm_power_off = msp_power_off;
147} 147}
148 148
149extern struct plat_smp_ops msp_smtc_smp_ops;
150
149void __init prom_init(void) 151void __init prom_init(void)
150{ 152{
151 unsigned long family; 153 unsigned long family;
@@ -226,6 +228,14 @@ void __init prom_init(void)
226 */ 228 */
227 msp_serial_setup(); 229 msp_serial_setup();
228 230
231#ifdef CONFIG_MIPS_MT_SMP
232 register_smp_ops(&vsmp_smp_ops);
233#endif
234
235#ifdef CONFIG_MIPS_MT_SMTC
236 register_smp_ops(&msp_smtc_smp_ops);
237#endif
238
229#ifdef CONFIG_PMCTWILED 239#ifdef CONFIG_PMCTWILED
230 /* 240 /*
231 * Setup LED states before the subsys_initcall loads other 241 * Setup LED states before the subsys_initcall loads other
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_smp.c b/arch/mips/pmc-sierra/msp71xx/msp_smp.c
new file mode 100644
index 000000000000..43a9e26e1c69
--- /dev/null
+++ b/arch/mips/pmc-sierra/msp71xx/msp_smp.c
@@ -0,0 +1,77 @@
1/*
2 * Copyright (C) 2000, 2001, 2004 MIPS Technologies, Inc.
3 * Copyright (C) 2001 Ralf Baechle
4 * Copyright (C) 2010 PMC-Sierra, Inc.
5 *
6 * VSMP support for MSP platforms . Derived from malta vsmp support.
7 *
8 * This program is free software; you can distribute it and/or modify it
9 * under the terms of the GNU General Public License (Version 2) as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 *
21 */
22#include <linux/smp.h>
23#include <linux/interrupt.h>
24
25#ifdef CONFIG_MIPS_MT_SMP
26#define MIPS_CPU_IPI_RESCHED_IRQ 0 /* SW int 0 for resched */
27#define MIPS_CPU_IPI_CALL_IRQ 1 /* SW int 1 for call */
28
29
30static void ipi_resched_dispatch(void)
31{
32 do_IRQ(MIPS_CPU_IPI_RESCHED_IRQ);
33}
34
35static void ipi_call_dispatch(void)
36{
37 do_IRQ(MIPS_CPU_IPI_CALL_IRQ);
38}
39
40static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)
41{
42 return IRQ_HANDLED;
43}
44
45static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
46{
47 smp_call_function_interrupt();
48
49 return IRQ_HANDLED;
50}
51
52static struct irqaction irq_resched = {
53 .handler = ipi_resched_interrupt,
54 .flags = IRQF_DISABLED | IRQF_PERCPU,
55 .name = "IPI_resched"
56};
57
58static struct irqaction irq_call = {
59 .handler = ipi_call_interrupt,
60 .flags = IRQF_DISABLED | IRQF_PERCPU,
61 .name = "IPI_call"
62};
63
64void __init arch_init_ipiirq(int irq, struct irqaction *action)
65{
66 setup_irq(irq, action);
67 set_irq_handler(irq, handle_percpu_irq);
68}
69
70void __init msp_vsmp_int_init(void)
71{
72 set_vi_handler(MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch);
73 set_vi_handler(MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch);
74 arch_init_ipiirq(MIPS_CPU_IPI_RESCHED_IRQ, &irq_resched);
75 arch_init_ipiirq(MIPS_CPU_IPI_CALL_IRQ, &irq_call);
76}
77#endif /* CONFIG_MIPS_MT_SMP */
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_smtc.c b/arch/mips/pmc-sierra/msp71xx/msp_smtc.c
new file mode 100644
index 000000000000..c8dcc1c01e18
--- /dev/null
+++ b/arch/mips/pmc-sierra/msp71xx/msp_smtc.c
@@ -0,0 +1,105 @@
1/*
2 * MSP71xx Platform-specific hooks for SMP operation
3 */
4#include <linux/irq.h>
5#include <linux/init.h>
6
7#include <asm/mipsmtregs.h>
8#include <asm/mipsregs.h>
9#include <asm/smtc.h>
10#include <asm/smtc_ipi.h>
11
12/* VPE/SMP Prototype implements platform interfaces directly */
13
14/*
15 * Cause the specified action to be performed on a targeted "CPU"
16 */
17
18static void msp_smtc_send_ipi_single(int cpu, unsigned int action)
19{
20 /* "CPU" may be TC of same VPE, VPE of same CPU, or different CPU */
21 smtc_send_ipi(cpu, LINUX_SMP_IPI, action);
22}
23
24static void msp_smtc_send_ipi_mask(const struct cpumask *mask,
25 unsigned int action)
26{
27 unsigned int i;
28
29 for_each_cpu(i, mask)
30 msp_smtc_send_ipi_single(i, action);
31}
32
33/*
34 * Post-config but pre-boot cleanup entry point
35 */
36static void __cpuinit msp_smtc_init_secondary(void)
37{
38 int myvpe;
39
40 /* Don't enable Malta I/O interrupts (IP2) for secondary VPEs */
41 myvpe = read_c0_tcbind() & TCBIND_CURVPE;
42 if (myvpe > 0)
43 change_c0_status(ST0_IM, STATUSF_IP0 | STATUSF_IP1 |
44 STATUSF_IP6 | STATUSF_IP7);
45 smtc_init_secondary();
46}
47
48/*
49 * Platform "CPU" startup hook
50 */
51static void __cpuinit msp_smtc_boot_secondary(int cpu,
52 struct task_struct *idle)
53{
54 smtc_boot_secondary(cpu, idle);
55}
56
57/*
58 * SMP initialization finalization entry point
59 */
60static void __cpuinit msp_smtc_smp_finish(void)
61{
62 smtc_smp_finish();
63}
64
65/*
66 * Hook for after all CPUs are online
67 */
68
69static void msp_smtc_cpus_done(void)
70{
71}
72
73/*
74 * Platform SMP pre-initialization
75 *
76 * As noted above, we can assume a single CPU for now
77 * but it may be multithreaded.
78 */
79
80static void __init msp_smtc_smp_setup(void)
81{
82 /*
83 * we won't get the definitive value until
84 * we've run smtc_prepare_cpus later, but
85 */
86
87 if (read_c0_config3() & (1 << 2))
88 smp_num_siblings = smtc_build_cpu_map(0);
89}
90
91static void __init msp_smtc_prepare_cpus(unsigned int max_cpus)
92{
93 smtc_prepare_cpus(max_cpus);
94}
95
96struct plat_smp_ops msp_smtc_smp_ops = {
97 .send_ipi_single = msp_smtc_send_ipi_single,
98 .send_ipi_mask = msp_smtc_send_ipi_mask,
99 .init_secondary = msp_smtc_init_secondary,
100 .smp_finish = msp_smtc_smp_finish,
101 .cpus_done = msp_smtc_cpus_done,
102 .boot_secondary = msp_smtc_boot_secondary,
103 .smp_setup = msp_smtc_smp_setup,
104 .prepare_cpus = msp_smtc_prepare_cpus,
105};
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_time.c b/arch/mips/pmc-sierra/msp71xx/msp_time.c
index 01df84ce31e2..8b42f307a7a7 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_time.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_time.c
@@ -29,6 +29,7 @@
29#include <linux/module.h> 29#include <linux/module.h>
30#include <linux/ptrace.h> 30#include <linux/ptrace.h>
31 31
32#include <asm/cevt-r4k.h>
32#include <asm/mipsregs.h> 33#include <asm/mipsregs.h>
33#include <asm/time.h> 34#include <asm/time.h>
34 35
@@ -36,6 +37,12 @@
36#include <msp_int.h> 37#include <msp_int.h>
37#include <msp_regs.h> 38#include <msp_regs.h>
38 39
40#define get_current_vpe() \
41 ((read_c0_tcbind() >> TCBIND_CURVPE_SHIFT) & TCBIND_CURVPE)
42
43static struct irqaction timer_vpe1;
44static int tim_installed;
45
39void __init plat_time_init(void) 46void __init plat_time_init(void)
40{ 47{
41 char *endp, *s; 48 char *endp, *s;
@@ -83,5 +90,12 @@ void __init plat_time_init(void)
83 90
84unsigned int __cpuinit get_c0_compare_int(void) 91unsigned int __cpuinit get_c0_compare_int(void)
85{ 92{
86 return MSP_INT_VPE0_TIMER; 93 /* MIPS_MT modes may want timer for second VPE */
94 if ((get_current_vpe()) && !tim_installed) {
95 memcpy(&timer_vpe1, &c0_compare_irqaction, sizeof(timer_vpe1));
96 setup_irq(MSP_INT_VPE1_TIMER, &timer_vpe1);
97 tim_installed++;
98 }
99
100 return get_current_vpe() ? MSP_INT_VPE1_TIMER : MSP_INT_VPE0_TIMER;
87} 101}
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_usb.c b/arch/mips/pmc-sierra/msp71xx/msp_usb.c
index 0ee01e359dd8..9a1aef89bd4c 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_usb.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_usb.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * The setup file for USB related hardware on PMC-Sierra MSP processors. 2 * The setup file for USB related hardware on PMC-Sierra MSP processors.
3 * 3 *
4 * Copyright 2006-2007 PMC-Sierra, Inc. 4 * Copyright 2006 PMC-Sierra, Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
@@ -23,8 +23,8 @@
23 * with this program; if not, write to the Free Software Foundation, Inc., 23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA. 24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */ 25 */
26#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_GADGET)
26 27
27#include <linux/dma-mapping.h>
28#include <linux/init.h> 28#include <linux/init.h>
29#include <linux/ioport.h> 29#include <linux/ioport.h>
30#include <linux/platform_device.h> 30#include <linux/platform_device.h>
@@ -34,40 +34,56 @@
34#include <msp_regs.h> 34#include <msp_regs.h>
35#include <msp_int.h> 35#include <msp_int.h>
36#include <msp_prom.h> 36#include <msp_prom.h>
37#include <msp_usb.h>
38
37 39
38#if defined(CONFIG_USB_EHCI_HCD) 40#if defined(CONFIG_USB_EHCI_HCD)
39static struct resource msp_usbhost_resources [] = { 41static struct resource msp_usbhost0_resources[] = {
40 [0] = { 42 [0] = { /* EHCI-HS operational and capabilities registers */
41 .start = MSP_USB_BASE_START, 43 .start = MSP_USB0_HS_START,
42 .end = MSP_USB_BASE_END, 44 .end = MSP_USB0_HS_END,
43 .flags = IORESOURCE_MEM, 45 .flags = IORESOURCE_MEM,
44 }, 46 },
45 [1] = { 47 [1] = {
46 .start = MSP_INT_USB, 48 .start = MSP_INT_USB,
47 .end = MSP_INT_USB, 49 .end = MSP_INT_USB,
48 .flags = IORESOURCE_IRQ, 50 .flags = IORESOURCE_IRQ,
51 },
52 [2] = { /* MSBus-to-AMBA bridge register space */
53 .start = MSP_USB0_MAB_START,
54 .end = MSP_USB0_MAB_END,
55 .flags = IORESOURCE_MEM,
56 },
57 [3] = { /* Identification and general hardware parameters */
58 .start = MSP_USB0_ID_START,
59 .end = MSP_USB0_ID_END,
60 .flags = IORESOURCE_MEM,
49 }, 61 },
50}; 62};
51 63
52static u64 msp_usbhost_dma_mask = DMA_BIT_MASK(32); 64static u64 msp_usbhost0_dma_mask = 0xffffffffUL;
53 65
54static struct platform_device msp_usbhost_device = { 66static struct mspusb_device msp_usbhost0_device = {
55 .name = "pmcmsp-ehci",
56 .id = 0,
57 .dev = { 67 .dev = {
58 .dma_mask = &msp_usbhost_dma_mask, 68 .name = "pmcmsp-ehci",
59 .coherent_dma_mask = DMA_BIT_MASK(32), 69 .id = 0,
70 .dev = {
71 .dma_mask = &msp_usbhost0_dma_mask,
72 .coherent_dma_mask = 0xffffffffUL,
73 },
74 .num_resources = ARRAY_SIZE(msp_usbhost0_resources),
75 .resource = msp_usbhost0_resources,
60 }, 76 },
61 .num_resources = ARRAY_SIZE(msp_usbhost_resources),
62 .resource = msp_usbhost_resources,
63}; 77};
64#endif /* CONFIG_USB_EHCI_HCD */
65 78
66#if defined(CONFIG_USB_GADGET) 79/* MSP7140/MSP82XX has two USB2 hosts. */
67static struct resource msp_usbdev_resources [] = { 80#ifdef CONFIG_MSP_HAS_DUAL_USB
68 [0] = { 81static u64 msp_usbhost1_dma_mask = 0xffffffffUL;
69 .start = MSP_USB_BASE, 82
70 .end = MSP_USB_BASE_END, 83static struct resource msp_usbhost1_resources[] = {
84 [0] = { /* EHCI-HS operational and capabilities registers */
85 .start = MSP_USB1_HS_START,
86 .end = MSP_USB1_HS_END,
71 .flags = IORESOURCE_MEM, 87 .flags = IORESOURCE_MEM,
72 }, 88 },
73 [1] = { 89 [1] = {
@@ -75,76 +91,173 @@ static struct resource msp_usbdev_resources [] = {
75 .end = MSP_INT_USB, 91 .end = MSP_INT_USB,
76 .flags = IORESOURCE_IRQ, 92 .flags = IORESOURCE_IRQ,
77 }, 93 },
94 [2] = { /* MSBus-to-AMBA bridge register space */
95 .start = MSP_USB1_MAB_START,
96 .end = MSP_USB1_MAB_END,
97 .flags = IORESOURCE_MEM,
98 },
99 [3] = { /* Identification and general hardware parameters */
100 .start = MSP_USB1_ID_START,
101 .end = MSP_USB1_ID_END,
102 .flags = IORESOURCE_MEM,
103 },
104};
105
106static struct mspusb_device msp_usbhost1_device = {
107 .dev = {
108 .name = "pmcmsp-ehci",
109 .id = 1,
110 .dev = {
111 .dma_mask = &msp_usbhost1_dma_mask,
112 .coherent_dma_mask = 0xffffffffUL,
113 },
114 .num_resources = ARRAY_SIZE(msp_usbhost1_resources),
115 .resource = msp_usbhost1_resources,
116 },
78}; 117};
118#endif /* CONFIG_MSP_HAS_DUAL_USB */
119#endif /* CONFIG_USB_EHCI_HCD */
79 120
80static u64 msp_usbdev_dma_mask = DMA_BIT_MASK(32); 121#if defined(CONFIG_USB_GADGET)
122static struct resource msp_usbdev0_resources[] = {
123 [0] = { /* EHCI-HS operational and capabilities registers */
124 .start = MSP_USB0_HS_START,
125 .end = MSP_USB0_HS_END,
126 .flags = IORESOURCE_MEM,
127 },
128 [1] = {
129 .start = MSP_INT_USB,
130 .end = MSP_INT_USB,
131 .flags = IORESOURCE_IRQ,
132 },
133 [2] = { /* MSBus-to-AMBA bridge register space */
134 .start = MSP_USB0_MAB_START,
135 .end = MSP_USB0_MAB_END,
136 .flags = IORESOURCE_MEM,
137 },
138 [3] = { /* Identification and general hardware parameters */
139 .start = MSP_USB0_ID_START,
140 .end = MSP_USB0_ID_END,
141 .flags = IORESOURCE_MEM,
142 },
143};
81 144
82static struct platform_device msp_usbdev_device = { 145static u64 msp_usbdev_dma_mask = 0xffffffffUL;
83 .name = "msp71xx_udc", 146
84 .id = 0, 147/* This may need to be converted to a mspusb_device, too. */
148static struct mspusb_device msp_usbdev0_device = {
85 .dev = { 149 .dev = {
86 .dma_mask = &msp_usbdev_dma_mask, 150 .name = "msp71xx_udc",
87 .coherent_dma_mask = DMA_BIT_MASK(32), 151 .id = 0,
152 .dev = {
153 .dma_mask = &msp_usbdev_dma_mask,
154 .coherent_dma_mask = 0xffffffffUL,
155 },
156 .num_resources = ARRAY_SIZE(msp_usbdev0_resources),
157 .resource = msp_usbdev0_resources,
88 }, 158 },
89 .num_resources = ARRAY_SIZE(msp_usbdev_resources),
90 .resource = msp_usbdev_resources,
91}; 159};
92#endif /* CONFIG_USB_GADGET */
93 160
94#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_GADGET) 161#ifdef CONFIG_MSP_HAS_DUAL_USB
95static struct platform_device *msp_devs[1]; 162static struct resource msp_usbdev1_resources[] = {
96#endif 163 [0] = { /* EHCI-HS operational and capabilities registers */
164 .start = MSP_USB1_HS_START,
165 .end = MSP_USB1_HS_END,
166 .flags = IORESOURCE_MEM,
167 },
168 [1] = {
169 .start = MSP_INT_USB,
170 .end = MSP_INT_USB,
171 .flags = IORESOURCE_IRQ,
172 },
173 [2] = { /* MSBus-to-AMBA bridge register space */
174 .start = MSP_USB1_MAB_START,
175 .end = MSP_USB1_MAB_END,
176 .flags = IORESOURCE_MEM,
177 },
178 [3] = { /* Identification and general hardware parameters */
179 .start = MSP_USB1_ID_START,
180 .end = MSP_USB1_ID_END,
181 .flags = IORESOURCE_MEM,
182 },
183};
97 184
185/* This may need to be converted to a mspusb_device, too. */
186static struct mspusb_device msp_usbdev1_device = {
187 .dev = {
188 .name = "msp71xx_udc",
189 .id = 0,
190 .dev = {
191 .dma_mask = &msp_usbdev_dma_mask,
192 .coherent_dma_mask = 0xffffffffUL,
193 },
194 .num_resources = ARRAY_SIZE(msp_usbdev1_resources),
195 .resource = msp_usbdev1_resources,
196 },
197};
198
199#endif /* CONFIG_MSP_HAS_DUAL_USB */
200#endif /* CONFIG_USB_GADGET */
98 201
99static int __init msp_usb_setup(void) 202static int __init msp_usb_setup(void)
100{ 203{
101#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_GADGET) 204 char *strp;
102 char *strp; 205 char envstr[32];
103 char envstr[32]; 206 struct platform_device *msp_devs[NUM_USB_DEVS];
104 unsigned int val = 0; 207 unsigned int val;
105 int result = 0;
106 208
209 /* construct environment name usbmode */
210 /* set usbmode <host/device> as pmon environment var */
107 /* 211 /*
108 * construct environment name usbmode 212 * Could this perhaps be integrated into the "features" env var?
109 * set usbmode <host/device> as pmon environment var 213 * Use the features key "U", and follow with "H" for host-mode,
214 * "D" for device-mode. If it works for Ethernet, why not USB...
215 * -- hammtrev, 2007/03/22
110 */ 216 */
111 snprintf((char *)&envstr[0], sizeof(envstr), "usbmode"); 217 snprintf((char *)&envstr[0], sizeof(envstr), "usbmode");
112 218
113#if defined(CONFIG_USB_EHCI_HCD) 219 /* set default host mode */
114 /* default to host mode */
115 val = 1; 220 val = 1;
116#endif
117 221
118 /* get environment string */ 222 /* get environment string */
119 strp = prom_getenv((char *)&envstr[0]); 223 strp = prom_getenv((char *)&envstr[0]);
120 if (strp) { 224 if (strp) {
225 /* compare string */
121 if (!strcmp(strp, "device")) 226 if (!strcmp(strp, "device"))
122 val = 0; 227 val = 0;
123 } 228 }
124 229
125 if (val) { 230 if (val) {
126#if defined(CONFIG_USB_EHCI_HCD) 231#if defined(CONFIG_USB_EHCI_HCD)
127 /* get host mode device */ 232 msp_devs[0] = &msp_usbhost0_device.dev;
128 msp_devs[0] = &msp_usbhost_device; 233 ppfinit("platform add USB HOST done %s.\n", msp_devs[0]->name);
129 ppfinit("platform add USB HOST done %s.\n", 234#ifdef CONFIG_MSP_HAS_DUAL_USB
130 msp_devs[0]->name); 235 msp_devs[1] = &msp_usbhost1_device.dev;
131 236 ppfinit("platform add USB HOST done %s.\n", msp_devs[1]->name);
132 result = platform_add_devices(msp_devs, ARRAY_SIZE(msp_devs)); 237#endif
133#endif /* CONFIG_USB_EHCI_HCD */ 238#else
134 } 239 ppfinit("%s: echi_hcd not supported\n", __FILE__);
240#endif /* CONFIG_USB_EHCI_HCD */
241 } else {
135#if defined(CONFIG_USB_GADGET) 242#if defined(CONFIG_USB_GADGET)
136 else {
137 /* get device mode structure */ 243 /* get device mode structure */
138 msp_devs[0] = &msp_usbdev_device; 244 msp_devs[0] = &msp_usbdev0_device.dev;
139 ppfinit("platform add USB DEVICE done %s.\n", 245 ppfinit("platform add USB DEVICE done %s.\n"
140 msp_devs[0]->name); 246 , msp_devs[0]->name);
141 247#ifdef CONFIG_MSP_HAS_DUAL_USB
142 result = platform_add_devices(msp_devs, ARRAY_SIZE(msp_devs)); 248 msp_devs[1] = &msp_usbdev1_device.dev;
249 ppfinit("platform add USB DEVICE done %s.\n"
250 , msp_devs[1]->name);
251#endif
252#else
253 ppfinit("%s: usb_gadget not supported\n", __FILE__);
254#endif /* CONFIG_USB_GADGET */
143 } 255 }
144#endif /* CONFIG_USB_GADGET */ 256 /* add device */
145#endif /* CONFIG_USB_EHCI_HCD || CONFIG_USB_GADGET */ 257 platform_add_devices(msp_devs, ARRAY_SIZE(msp_devs));
146 258
147 return result; 259 return 0;
148} 260}
149 261
150subsys_initcall(msp_usb_setup); 262subsys_initcall(msp_usb_setup);
263#endif /* CONFIG_USB_EHCI_HCD || CONFIG_USB_GADGET */
diff --git a/arch/mips/pnx833x/common/interrupts.c b/arch/mips/pnx833x/common/interrupts.c
index 941916f8aaff..b226bcb0a2f4 100644
--- a/arch/mips/pnx833x/common/interrupts.c
+++ b/arch/mips/pnx833x/common/interrupts.c
@@ -152,10 +152,6 @@ static inline void pnx833x_hard_disable_pic_irq(unsigned int irq)
152 PNX833X_PIC_INT_REG(irq) = 0; 152 PNX833X_PIC_INT_REG(irq) = 0;
153} 153}
154 154
155static int irqflags[PNX833X_PIC_NUM_IRQ]; /* initialized by zeroes */
156#define IRQFLAG_STARTED 1
157#define IRQFLAG_DISABLED 2
158
159static DEFINE_RAW_SPINLOCK(pnx833x_irq_lock); 155static DEFINE_RAW_SPINLOCK(pnx833x_irq_lock);
160 156
161static unsigned int pnx833x_startup_pic_irq(unsigned int irq) 157static unsigned int pnx833x_startup_pic_irq(unsigned int irq)
@@ -164,108 +160,54 @@ static unsigned int pnx833x_startup_pic_irq(unsigned int irq)
164 unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE; 160 unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE;
165 161
166 raw_spin_lock_irqsave(&pnx833x_irq_lock, flags); 162 raw_spin_lock_irqsave(&pnx833x_irq_lock, flags);
167
168 irqflags[pic_irq] = IRQFLAG_STARTED; /* started, not disabled */
169 pnx833x_hard_enable_pic_irq(pic_irq); 163 pnx833x_hard_enable_pic_irq(pic_irq);
170
171 raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags); 164 raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags);
172 return 0; 165 return 0;
173} 166}
174 167
175static void pnx833x_shutdown_pic_irq(unsigned int irq) 168static void pnx833x_enable_pic_irq(struct irq_data *d)
176{
177 unsigned long flags;
178 unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE;
179
180 raw_spin_lock_irqsave(&pnx833x_irq_lock, flags);
181
182 irqflags[pic_irq] = 0; /* not started */
183 pnx833x_hard_disable_pic_irq(pic_irq);
184
185 raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags);
186}
187
188static void pnx833x_enable_pic_irq(unsigned int irq)
189{ 169{
190 unsigned long flags; 170 unsigned long flags;
191 unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE; 171 unsigned int pic_irq = d->irq - PNX833X_PIC_IRQ_BASE;
192 172
193 raw_spin_lock_irqsave(&pnx833x_irq_lock, flags); 173 raw_spin_lock_irqsave(&pnx833x_irq_lock, flags);
194 174 pnx833x_hard_enable_pic_irq(pic_irq);
195 irqflags[pic_irq] &= ~IRQFLAG_DISABLED;
196 if (irqflags[pic_irq] == IRQFLAG_STARTED)
197 pnx833x_hard_enable_pic_irq(pic_irq);
198
199 raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags); 175 raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags);
200} 176}
201 177
202static void pnx833x_disable_pic_irq(unsigned int irq) 178static void pnx833x_disable_pic_irq(struct irq_data *d)
203{ 179{
204 unsigned long flags; 180 unsigned long flags;
205 unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE; 181 unsigned int pic_irq = d->irq - PNX833X_PIC_IRQ_BASE;
206 182
207 raw_spin_lock_irqsave(&pnx833x_irq_lock, flags); 183 raw_spin_lock_irqsave(&pnx833x_irq_lock, flags);
208
209 irqflags[pic_irq] |= IRQFLAG_DISABLED;
210 pnx833x_hard_disable_pic_irq(pic_irq); 184 pnx833x_hard_disable_pic_irq(pic_irq);
211
212 raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags); 185 raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags);
213} 186}
214 187
215static void pnx833x_ack_pic_irq(unsigned int irq)
216{
217}
218
219static void pnx833x_end_pic_irq(unsigned int irq)
220{
221}
222
223static DEFINE_RAW_SPINLOCK(pnx833x_gpio_pnx833x_irq_lock); 188static DEFINE_RAW_SPINLOCK(pnx833x_gpio_pnx833x_irq_lock);
224 189
225static unsigned int pnx833x_startup_gpio_irq(unsigned int irq) 190static void pnx833x_enable_gpio_irq(struct irq_data *d)
226{
227 int pin = irq - PNX833X_GPIO_IRQ_BASE;
228 unsigned long flags;
229 raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags);
230 pnx833x_gpio_enable_irq(pin);
231 raw_spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags);
232 return 0;
233}
234
235static void pnx833x_enable_gpio_irq(unsigned int irq)
236{ 191{
237 int pin = irq - PNX833X_GPIO_IRQ_BASE; 192 int pin = d->irq - PNX833X_GPIO_IRQ_BASE;
238 unsigned long flags; 193 unsigned long flags;
239 raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags); 194 raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags);
240 pnx833x_gpio_enable_irq(pin); 195 pnx833x_gpio_enable_irq(pin);
241 raw_spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags); 196 raw_spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags);
242} 197}
243 198
244static void pnx833x_disable_gpio_irq(unsigned int irq) 199static void pnx833x_disable_gpio_irq(struct irq_data *d)
245{ 200{
246 int pin = irq - PNX833X_GPIO_IRQ_BASE; 201 int pin = d->irq - PNX833X_GPIO_IRQ_BASE;
247 unsigned long flags; 202 unsigned long flags;
248 raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags); 203 raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags);
249 pnx833x_gpio_disable_irq(pin); 204 pnx833x_gpio_disable_irq(pin);
250 raw_spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags); 205 raw_spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags);
251} 206}
252 207
253static void pnx833x_ack_gpio_irq(unsigned int irq) 208static int pnx833x_set_type_gpio_irq(struct irq_data *d, unsigned int flow_type)
254{
255}
256
257static void pnx833x_end_gpio_irq(unsigned int irq)
258{
259 int pin = irq - PNX833X_GPIO_IRQ_BASE;
260 unsigned long flags;
261 raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags);
262 pnx833x_gpio_clear_irq(pin);
263 raw_spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags);
264}
265
266static int pnx833x_set_type_gpio_irq(unsigned int irq, unsigned int flow_type)
267{ 209{
268 int pin = irq - PNX833X_GPIO_IRQ_BASE; 210 int pin = d->irq - PNX833X_GPIO_IRQ_BASE;
269 int gpio_mode; 211 int gpio_mode;
270 212
271 switch (flow_type) { 213 switch (flow_type) {
@@ -296,23 +238,15 @@ static int pnx833x_set_type_gpio_irq(unsigned int irq, unsigned int flow_type)
296 238
297static struct irq_chip pnx833x_pic_irq_type = { 239static struct irq_chip pnx833x_pic_irq_type = {
298 .name = "PNX-PIC", 240 .name = "PNX-PIC",
299 .startup = pnx833x_startup_pic_irq, 241 .irq_enable = pnx833x_enable_pic_irq,
300 .shutdown = pnx833x_shutdown_pic_irq, 242 .irq_disable = pnx833x_disable_pic_irq,
301 .enable = pnx833x_enable_pic_irq,
302 .disable = pnx833x_disable_pic_irq,
303 .ack = pnx833x_ack_pic_irq,
304 .end = pnx833x_end_pic_irq
305}; 243};
306 244
307static struct irq_chip pnx833x_gpio_irq_type = { 245static struct irq_chip pnx833x_gpio_irq_type = {
308 .name = "PNX-GPIO", 246 .name = "PNX-GPIO",
309 .startup = pnx833x_startup_gpio_irq, 247 .irq_enable = pnx833x_enable_gpio_irq,
310 .shutdown = pnx833x_disable_gpio_irq, 248 .irq_disable = pnx833x_disable_gpio_irq,
311 .enable = pnx833x_enable_gpio_irq, 249 .irq_set_type = pnx833x_set_type_gpio_irq,
312 .disable = pnx833x_disable_gpio_irq,
313 .ack = pnx833x_ack_gpio_irq,
314 .end = pnx833x_end_gpio_irq,
315 .set_type = pnx833x_set_type_gpio_irq
316}; 250};
317 251
318void __init arch_init_irq(void) 252void __init arch_init_irq(void)
diff --git a/arch/mips/pnx8550/common/int.c b/arch/mips/pnx8550/common/int.c
index cfed5051dc6d..dbdc35c3531d 100644
--- a/arch/mips/pnx8550/common/int.c
+++ b/arch/mips/pnx8550/common/int.c
@@ -114,8 +114,10 @@ static inline void unmask_gic_int(unsigned int irq_nr)
114 PNX8550_GIC_REQ(irq_nr) = (1<<26 | 1<<16) | (1<<28) | gic_prio[irq_nr]; 114 PNX8550_GIC_REQ(irq_nr) = (1<<26 | 1<<16) | (1<<28) | gic_prio[irq_nr];
115} 115}
116 116
117static inline void mask_irq(unsigned int irq_nr) 117static inline void mask_irq(struct irq_data *d)
118{ 118{
119 unsigned int irq_nr = d->irq;
120
119 if ((PNX8550_INT_CP0_MIN <= irq_nr) && (irq_nr <= PNX8550_INT_CP0_MAX)) { 121 if ((PNX8550_INT_CP0_MIN <= irq_nr) && (irq_nr <= PNX8550_INT_CP0_MAX)) {
120 modify_cp0_intmask(1 << irq_nr, 0); 122 modify_cp0_intmask(1 << irq_nr, 0);
121 } else if ((PNX8550_INT_GIC_MIN <= irq_nr) && 123 } else if ((PNX8550_INT_GIC_MIN <= irq_nr) &&
@@ -129,8 +131,10 @@ static inline void mask_irq(unsigned int irq_nr)
129 } 131 }
130} 132}
131 133
132static inline void unmask_irq(unsigned int irq_nr) 134static inline void unmask_irq(struct irq_data *d)
133{ 135{
136 unsigned int irq_nr = d->irq;
137
134 if ((PNX8550_INT_CP0_MIN <= irq_nr) && (irq_nr <= PNX8550_INT_CP0_MAX)) { 138 if ((PNX8550_INT_CP0_MIN <= irq_nr) && (irq_nr <= PNX8550_INT_CP0_MAX)) {
135 modify_cp0_intmask(0, 1 << irq_nr); 139 modify_cp0_intmask(0, 1 << irq_nr);
136 } else if ((PNX8550_INT_GIC_MIN <= irq_nr) && 140 } else if ((PNX8550_INT_GIC_MIN <= irq_nr) &&
@@ -157,10 +161,8 @@ int pnx8550_set_gic_priority(int irq, int priority)
157 161
158static struct irq_chip level_irq_type = { 162static struct irq_chip level_irq_type = {
159 .name = "PNX Level IRQ", 163 .name = "PNX Level IRQ",
160 .ack = mask_irq, 164 .irq_mask = mask_irq,
161 .mask = mask_irq, 165 .irq_unmask = unmask_irq,
162 .mask_ack = mask_irq,
163 .unmask = unmask_irq,
164}; 166};
165 167
166static struct irqaction gic_action = { 168static struct irqaction gic_action = {
@@ -180,10 +182,8 @@ void __init arch_init_irq(void)
180 int i; 182 int i;
181 int configPR; 183 int configPR;
182 184
183 for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) { 185 for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++)
184 set_irq_chip_and_handler(i, &level_irq_type, handle_level_irq); 186 set_irq_chip_and_handler(i, &level_irq_type, handle_level_irq);
185 mask_irq(i); /* mask the irq just in case */
186 }
187 187
188 /* init of GIC/IPC interrupts */ 188 /* init of GIC/IPC interrupts */
189 /* should be done before cp0 since cp0 init enables the GIC int */ 189 /* should be done before cp0 since cp0 init enables the GIC int */
diff --git a/arch/mips/powertv/asic/irq_asic.c b/arch/mips/powertv/asic/irq_asic.c
index e55382434155..6f1c8ef6a719 100644
--- a/arch/mips/powertv/asic/irq_asic.c
+++ b/arch/mips/powertv/asic/irq_asic.c
@@ -21,9 +21,10 @@
21 21
22#include <asm/mach-powertv/asic_regs.h> 22#include <asm/mach-powertv/asic_regs.h>
23 23
24static inline void unmask_asic_irq(unsigned int irq) 24static inline void unmask_asic_irq(struct irq_data *d)
25{ 25{
26 unsigned long enable_bit; 26 unsigned long enable_bit;
27 unsigned int irq = d->irq;
27 28
28 enable_bit = (1 << (irq & 0x1f)); 29 enable_bit = (1 << (irq & 0x1f));
29 30
@@ -45,9 +46,10 @@ static inline void unmask_asic_irq(unsigned int irq)
45 } 46 }
46} 47}
47 48
48static inline void mask_asic_irq(unsigned int irq) 49static inline void mask_asic_irq(struct irq_data *d)
49{ 50{
50 unsigned long disable_mask; 51 unsigned long disable_mask;
52 unsigned int irq = d->irq;
51 53
52 disable_mask = ~(1 << (irq & 0x1f)); 54 disable_mask = ~(1 << (irq & 0x1f));
53 55
@@ -71,11 +73,8 @@ static inline void mask_asic_irq(unsigned int irq)
71 73
72static struct irq_chip asic_irq_chip = { 74static struct irq_chip asic_irq_chip = {
73 .name = "ASIC Level", 75 .name = "ASIC Level",
74 .ack = mask_asic_irq, 76 .irq_mask = mask_asic_irq,
75 .mask = mask_asic_irq, 77 .irq_unmask = unmask_asic_irq,
76 .mask_ack = mask_asic_irq,
77 .unmask = unmask_asic_irq,
78 .eoi = unmask_asic_irq,
79}; 78};
80 79
81void __init asic_irq_init(void) 80void __init asic_irq_init(void)
diff --git a/arch/mips/rb532/irq.c b/arch/mips/rb532/irq.c
index ea6cec3c1e0d..b32a768da894 100644
--- a/arch/mips/rb532/irq.c
+++ b/arch/mips/rb532/irq.c
@@ -111,10 +111,10 @@ static inline void ack_local_irq(unsigned int ip)
111 clear_c0_cause(ipnum); 111 clear_c0_cause(ipnum);
112} 112}
113 113
114static void rb532_enable_irq(unsigned int irq_nr) 114static void rb532_enable_irq(struct irq_data *d)
115{ 115{
116 unsigned int group, intr_bit, irq_nr = d->irq;
116 int ip = irq_nr - GROUP0_IRQ_BASE; 117 int ip = irq_nr - GROUP0_IRQ_BASE;
117 unsigned int group, intr_bit;
118 volatile unsigned int *addr; 118 volatile unsigned int *addr;
119 119
120 if (ip < 0) 120 if (ip < 0)
@@ -132,10 +132,10 @@ static void rb532_enable_irq(unsigned int irq_nr)
132 } 132 }
133} 133}
134 134
135static void rb532_disable_irq(unsigned int irq_nr) 135static void rb532_disable_irq(struct irq_data *d)
136{ 136{
137 unsigned int group, intr_bit, mask, irq_nr = d->irq;
137 int ip = irq_nr - GROUP0_IRQ_BASE; 138 int ip = irq_nr - GROUP0_IRQ_BASE;
138 unsigned int group, intr_bit, mask;
139 volatile unsigned int *addr; 139 volatile unsigned int *addr;
140 140
141 if (ip < 0) { 141 if (ip < 0) {
@@ -163,18 +163,18 @@ static void rb532_disable_irq(unsigned int irq_nr)
163 } 163 }
164} 164}
165 165
166static void rb532_mask_and_ack_irq(unsigned int irq_nr) 166static void rb532_mask_and_ack_irq(struct irq_data *d)
167{ 167{
168 rb532_disable_irq(irq_nr); 168 rb532_disable_irq(d);
169 ack_local_irq(group_to_ip(irq_to_group(irq_nr))); 169 ack_local_irq(group_to_ip(irq_to_group(d->irq)));
170} 170}
171 171
172static int rb532_set_type(unsigned int irq_nr, unsigned type) 172static int rb532_set_type(struct irq_data *d, unsigned type)
173{ 173{
174 int gpio = irq_nr - GPIO_MAPPED_IRQ_BASE; 174 int gpio = d->irq - GPIO_MAPPED_IRQ_BASE;
175 int group = irq_to_group(irq_nr); 175 int group = irq_to_group(d->irq);
176 176
177 if (group != GPIO_MAPPED_IRQ_GROUP || irq_nr > (GROUP4_IRQ_BASE + 13)) 177 if (group != GPIO_MAPPED_IRQ_GROUP || d->irq > (GROUP4_IRQ_BASE + 13))
178 return (type == IRQ_TYPE_LEVEL_HIGH) ? 0 : -EINVAL; 178 return (type == IRQ_TYPE_LEVEL_HIGH) ? 0 : -EINVAL;
179 179
180 switch (type) { 180 switch (type) {
@@ -193,11 +193,11 @@ static int rb532_set_type(unsigned int irq_nr, unsigned type)
193 193
194static struct irq_chip rc32434_irq_type = { 194static struct irq_chip rc32434_irq_type = {
195 .name = "RB532", 195 .name = "RB532",
196 .ack = rb532_disable_irq, 196 .irq_ack = rb532_disable_irq,
197 .mask = rb532_disable_irq, 197 .irq_mask = rb532_disable_irq,
198 .mask_ack = rb532_mask_and_ack_irq, 198 .irq_mask_ack = rb532_mask_and_ack_irq,
199 .unmask = rb532_enable_irq, 199 .irq_unmask = rb532_enable_irq,
200 .set_type = rb532_set_type, 200 .irq_set_type = rb532_set_type,
201}; 201};
202 202
203void __init arch_init_irq(void) 203void __init arch_init_irq(void)
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c
index 383f11d7f442..e6e64750e90a 100644
--- a/arch/mips/sgi-ip22/ip22-int.c
+++ b/arch/mips/sgi-ip22/ip22-int.c
@@ -31,88 +31,80 @@ static char lc3msk_to_irqnr[256];
31 31
32extern int ip22_eisa_init(void); 32extern int ip22_eisa_init(void);
33 33
34static void enable_local0_irq(unsigned int irq) 34static void enable_local0_irq(struct irq_data *d)
35{ 35{
36 /* don't allow mappable interrupt to be enabled from setup_irq, 36 /* don't allow mappable interrupt to be enabled from setup_irq,
37 * we have our own way to do so */ 37 * we have our own way to do so */
38 if (irq != SGI_MAP_0_IRQ) 38 if (d->irq != SGI_MAP_0_IRQ)
39 sgint->imask0 |= (1 << (irq - SGINT_LOCAL0)); 39 sgint->imask0 |= (1 << (d->irq - SGINT_LOCAL0));
40} 40}
41 41
42static void disable_local0_irq(unsigned int irq) 42static void disable_local0_irq(struct irq_data *d)
43{ 43{
44 sgint->imask0 &= ~(1 << (irq - SGINT_LOCAL0)); 44 sgint->imask0 &= ~(1 << (d->irq - SGINT_LOCAL0));
45} 45}
46 46
47static struct irq_chip ip22_local0_irq_type = { 47static struct irq_chip ip22_local0_irq_type = {
48 .name = "IP22 local 0", 48 .name = "IP22 local 0",
49 .ack = disable_local0_irq, 49 .irq_mask = disable_local0_irq,
50 .mask = disable_local0_irq, 50 .irq_unmask = enable_local0_irq,
51 .mask_ack = disable_local0_irq,
52 .unmask = enable_local0_irq,
53}; 51};
54 52
55static void enable_local1_irq(unsigned int irq) 53static void enable_local1_irq(struct irq_data *d)
56{ 54{
57 /* don't allow mappable interrupt to be enabled from setup_irq, 55 /* don't allow mappable interrupt to be enabled from setup_irq,
58 * we have our own way to do so */ 56 * we have our own way to do so */
59 if (irq != SGI_MAP_1_IRQ) 57 if (d->irq != SGI_MAP_1_IRQ)
60 sgint->imask1 |= (1 << (irq - SGINT_LOCAL1)); 58 sgint->imask1 |= (1 << (d->irq - SGINT_LOCAL1));
61} 59}
62 60
63static void disable_local1_irq(unsigned int irq) 61static void disable_local1_irq(struct irq_data *d)
64{ 62{
65 sgint->imask1 &= ~(1 << (irq - SGINT_LOCAL1)); 63 sgint->imask1 &= ~(1 << (d->irq - SGINT_LOCAL1));
66} 64}
67 65
68static struct irq_chip ip22_local1_irq_type = { 66static struct irq_chip ip22_local1_irq_type = {
69 .name = "IP22 local 1", 67 .name = "IP22 local 1",
70 .ack = disable_local1_irq, 68 .irq_mask = disable_local1_irq,
71 .mask = disable_local1_irq, 69 .irq_unmask = enable_local1_irq,
72 .mask_ack = disable_local1_irq,
73 .unmask = enable_local1_irq,
74}; 70};
75 71
76static void enable_local2_irq(unsigned int irq) 72static void enable_local2_irq(struct irq_data *d)
77{ 73{
78 sgint->imask0 |= (1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0)); 74 sgint->imask0 |= (1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
79 sgint->cmeimask0 |= (1 << (irq - SGINT_LOCAL2)); 75 sgint->cmeimask0 |= (1 << (d->irq - SGINT_LOCAL2));
80} 76}
81 77
82static void disable_local2_irq(unsigned int irq) 78static void disable_local2_irq(struct irq_data *d)
83{ 79{
84 sgint->cmeimask0 &= ~(1 << (irq - SGINT_LOCAL2)); 80 sgint->cmeimask0 &= ~(1 << (d->irq - SGINT_LOCAL2));
85 if (!sgint->cmeimask0) 81 if (!sgint->cmeimask0)
86 sgint->imask0 &= ~(1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0)); 82 sgint->imask0 &= ~(1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
87} 83}
88 84
89static struct irq_chip ip22_local2_irq_type = { 85static struct irq_chip ip22_local2_irq_type = {
90 .name = "IP22 local 2", 86 .name = "IP22 local 2",
91 .ack = disable_local2_irq, 87 .irq_mask = disable_local2_irq,
92 .mask = disable_local2_irq, 88 .irq_unmask = enable_local2_irq,
93 .mask_ack = disable_local2_irq,
94 .unmask = enable_local2_irq,
95}; 89};
96 90
97static void enable_local3_irq(unsigned int irq) 91static void enable_local3_irq(struct irq_data *d)
98{ 92{
99 sgint->imask1 |= (1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1)); 93 sgint->imask1 |= (1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
100 sgint->cmeimask1 |= (1 << (irq - SGINT_LOCAL3)); 94 sgint->cmeimask1 |= (1 << (d->irq - SGINT_LOCAL3));
101} 95}
102 96
103static void disable_local3_irq(unsigned int irq) 97static void disable_local3_irq(struct irq_data *d)
104{ 98{
105 sgint->cmeimask1 &= ~(1 << (irq - SGINT_LOCAL3)); 99 sgint->cmeimask1 &= ~(1 << (d->irq - SGINT_LOCAL3));
106 if (!sgint->cmeimask1) 100 if (!sgint->cmeimask1)
107 sgint->imask1 &= ~(1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1)); 101 sgint->imask1 &= ~(1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
108} 102}
109 103
110static struct irq_chip ip22_local3_irq_type = { 104static struct irq_chip ip22_local3_irq_type = {
111 .name = "IP22 local 3", 105 .name = "IP22 local 3",
112 .ack = disable_local3_irq, 106 .irq_mask = disable_local3_irq,
113 .mask = disable_local3_irq, 107 .irq_unmask = enable_local3_irq,
114 .mask_ack = disable_local3_irq,
115 .unmask = enable_local3_irq,
116}; 108};
117 109
118static void indy_local0_irqdispatch(void) 110static void indy_local0_irqdispatch(void)
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c
index 6a123ea72de5..f2d09d7700dd 100644
--- a/arch/mips/sgi-ip27/ip27-irq.c
+++ b/arch/mips/sgi-ip27/ip27-irq.c
@@ -240,7 +240,7 @@ static int intr_disconnect_level(int cpu, int bit)
240} 240}
241 241
242/* Startup one of the (PCI ...) IRQs routes over a bridge. */ 242/* Startup one of the (PCI ...) IRQs routes over a bridge. */
243static unsigned int startup_bridge_irq(unsigned int irq) 243static unsigned int startup_bridge_irq(struct irq_data *d)
244{ 244{
245 struct bridge_controller *bc; 245 struct bridge_controller *bc;
246 bridgereg_t device; 246 bridgereg_t device;
@@ -248,16 +248,16 @@ static unsigned int startup_bridge_irq(unsigned int irq)
248 int pin, swlevel; 248 int pin, swlevel;
249 cpuid_t cpu; 249 cpuid_t cpu;
250 250
251 pin = SLOT_FROM_PCI_IRQ(irq); 251 pin = SLOT_FROM_PCI_IRQ(d->irq);
252 bc = IRQ_TO_BRIDGE(irq); 252 bc = IRQ_TO_BRIDGE(d->irq);
253 bridge = bc->base; 253 bridge = bc->base;
254 254
255 pr_debug("bridge_startup(): irq= 0x%x pin=%d\n", irq, pin); 255 pr_debug("bridge_startup(): irq= 0x%x pin=%d\n", d->irq, pin);
256 /* 256 /*
257 * "map" irq to a swlevel greater than 6 since the first 6 bits 257 * "map" irq to a swlevel greater than 6 since the first 6 bits
258 * of INT_PEND0 are taken 258 * of INT_PEND0 are taken
259 */ 259 */
260 swlevel = find_level(&cpu, irq); 260 swlevel = find_level(&cpu, d->irq);
261 bridge->b_int_addr[pin].addr = (0x20000 | swlevel | (bc->nasid << 8)); 261 bridge->b_int_addr[pin].addr = (0x20000 | swlevel | (bc->nasid << 8));
262 bridge->b_int_enable |= (1 << pin); 262 bridge->b_int_enable |= (1 << pin);
263 bridge->b_int_enable |= 0x7ffffe00; /* more stuff in int_enable */ 263 bridge->b_int_enable |= 0x7ffffe00; /* more stuff in int_enable */
@@ -288,53 +288,51 @@ static unsigned int startup_bridge_irq(unsigned int irq)
288} 288}
289 289
290/* Shutdown one of the (PCI ...) IRQs routes over a bridge. */ 290/* Shutdown one of the (PCI ...) IRQs routes over a bridge. */
291static void shutdown_bridge_irq(unsigned int irq) 291static void shutdown_bridge_irq(struct irq_data *d)
292{ 292{
293 struct bridge_controller *bc = IRQ_TO_BRIDGE(irq); 293 struct bridge_controller *bc = IRQ_TO_BRIDGE(d->irq);
294 bridge_t *bridge = bc->base; 294 bridge_t *bridge = bc->base;
295 int pin, swlevel; 295 int pin, swlevel;
296 cpuid_t cpu; 296 cpuid_t cpu;
297 297
298 pr_debug("bridge_shutdown: irq 0x%x\n", irq); 298 pr_debug("bridge_shutdown: irq 0x%x\n", d->irq);
299 pin = SLOT_FROM_PCI_IRQ(irq); 299 pin = SLOT_FROM_PCI_IRQ(d->irq);
300 300
301 /* 301 /*
302 * map irq to a swlevel greater than 6 since the first 6 bits 302 * map irq to a swlevel greater than 6 since the first 6 bits
303 * of INT_PEND0 are taken 303 * of INT_PEND0 are taken
304 */ 304 */
305 swlevel = find_level(&cpu, irq); 305 swlevel = find_level(&cpu, d->irq);
306 intr_disconnect_level(cpu, swlevel); 306 intr_disconnect_level(cpu, swlevel);
307 307
308 bridge->b_int_enable &= ~(1 << pin); 308 bridge->b_int_enable &= ~(1 << pin);
309 bridge->b_wid_tflush; 309 bridge->b_wid_tflush;
310} 310}
311 311
312static inline void enable_bridge_irq(unsigned int irq) 312static inline void enable_bridge_irq(struct irq_data *d)
313{ 313{
314 cpuid_t cpu; 314 cpuid_t cpu;
315 int swlevel; 315 int swlevel;
316 316
317 swlevel = find_level(&cpu, irq); /* Criminal offence */ 317 swlevel = find_level(&cpu, d->irq); /* Criminal offence */
318 intr_connect_level(cpu, swlevel); 318 intr_connect_level(cpu, swlevel);
319} 319}
320 320
321static inline void disable_bridge_irq(unsigned int irq) 321static inline void disable_bridge_irq(struct irq_data *d)
322{ 322{
323 cpuid_t cpu; 323 cpuid_t cpu;
324 int swlevel; 324 int swlevel;
325 325
326 swlevel = find_level(&cpu, irq); /* Criminal offence */ 326 swlevel = find_level(&cpu, d->irq); /* Criminal offence */
327 intr_disconnect_level(cpu, swlevel); 327 intr_disconnect_level(cpu, swlevel);
328} 328}
329 329
330static struct irq_chip bridge_irq_type = { 330static struct irq_chip bridge_irq_type = {
331 .name = "bridge", 331 .name = "bridge",
332 .startup = startup_bridge_irq, 332 .irq_startup = startup_bridge_irq,
333 .shutdown = shutdown_bridge_irq, 333 .irq_shutdown = shutdown_bridge_irq,
334 .ack = disable_bridge_irq, 334 .irq_mask = disable_bridge_irq,
335 .mask = disable_bridge_irq, 335 .irq_unmask = enable_bridge_irq,
336 .mask_ack = disable_bridge_irq,
337 .unmask = enable_bridge_irq,
338}; 336};
339 337
340void __devinit register_bridge_irq(unsigned int irq) 338void __devinit register_bridge_irq(unsigned int irq)
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index d6802d6d1f82..c01f558a2a09 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -36,21 +36,18 @@
36#include <asm/sn/sn0/hubio.h> 36#include <asm/sn/sn0/hubio.h>
37#include <asm/pci/bridge.h> 37#include <asm/pci/bridge.h>
38 38
39static void enable_rt_irq(unsigned int irq) 39static void enable_rt_irq(struct irq_data *d)
40{ 40{
41} 41}
42 42
43static void disable_rt_irq(unsigned int irq) 43static void disable_rt_irq(struct irq_data *d)
44{ 44{
45} 45}
46 46
47static struct irq_chip rt_irq_type = { 47static struct irq_chip rt_irq_type = {
48 .name = "SN HUB RT timer", 48 .name = "SN HUB RT timer",
49 .ack = disable_rt_irq, 49 .irq_mask = disable_rt_irq,
50 .mask = disable_rt_irq, 50 .irq_unmask = enable_rt_irq,
51 .mask_ack = disable_rt_irq,
52 .unmask = enable_rt_irq,
53 .eoi = enable_rt_irq,
54}; 51};
55 52
56static int rt_next_event(unsigned long delta, struct clock_event_device *evt) 53static int rt_next_event(unsigned long delta, struct clock_event_device *evt)
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c
index eb40824b172a..e0a3ce4a8d48 100644
--- a/arch/mips/sgi-ip32/ip32-irq.c
+++ b/arch/mips/sgi-ip32/ip32-irq.c
@@ -130,70 +130,48 @@ static struct irqaction cpuerr_irq = {
130 130
131static uint64_t crime_mask; 131static uint64_t crime_mask;
132 132
133static inline void crime_enable_irq(unsigned int irq) 133static inline void crime_enable_irq(struct irq_data *d)
134{ 134{
135 unsigned int bit = irq - CRIME_IRQ_BASE; 135 unsigned int bit = d->irq - CRIME_IRQ_BASE;
136 136
137 crime_mask |= 1 << bit; 137 crime_mask |= 1 << bit;
138 crime->imask = crime_mask; 138 crime->imask = crime_mask;
139} 139}
140 140
141static inline void crime_disable_irq(unsigned int irq) 141static inline void crime_disable_irq(struct irq_data *d)
142{ 142{
143 unsigned int bit = irq - CRIME_IRQ_BASE; 143 unsigned int bit = d->irq - CRIME_IRQ_BASE;
144 144
145 crime_mask &= ~(1 << bit); 145 crime_mask &= ~(1 << bit);
146 crime->imask = crime_mask; 146 crime->imask = crime_mask;
147 flush_crime_bus(); 147 flush_crime_bus();
148} 148}
149 149
150static void crime_level_mask_and_ack_irq(unsigned int irq)
151{
152 crime_disable_irq(irq);
153}
154
155static void crime_level_end_irq(unsigned int irq)
156{
157 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
158 crime_enable_irq(irq);
159}
160
161static struct irq_chip crime_level_interrupt = { 150static struct irq_chip crime_level_interrupt = {
162 .name = "IP32 CRIME", 151 .name = "IP32 CRIME",
163 .ack = crime_level_mask_and_ack_irq, 152 .irq_mask = crime_disable_irq,
164 .mask = crime_disable_irq, 153 .irq_unmask = crime_enable_irq,
165 .mask_ack = crime_level_mask_and_ack_irq,
166 .unmask = crime_enable_irq,
167 .end = crime_level_end_irq,
168}; 154};
169 155
170static void crime_edge_mask_and_ack_irq(unsigned int irq) 156static void crime_edge_mask_and_ack_irq(struct irq_data *d)
171{ 157{
172 unsigned int bit = irq - CRIME_IRQ_BASE; 158 unsigned int bit = d->irq - CRIME_IRQ_BASE;
173 uint64_t crime_int; 159 uint64_t crime_int;
174 160
175 /* Edge triggered interrupts must be cleared. */ 161 /* Edge triggered interrupts must be cleared. */
176
177 crime_int = crime->hard_int; 162 crime_int = crime->hard_int;
178 crime_int &= ~(1 << bit); 163 crime_int &= ~(1 << bit);
179 crime->hard_int = crime_int; 164 crime->hard_int = crime_int;
180 165
181 crime_disable_irq(irq); 166 crime_disable_irq(d);
182}
183
184static void crime_edge_end_irq(unsigned int irq)
185{
186 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
187 crime_enable_irq(irq);
188} 167}
189 168
190static struct irq_chip crime_edge_interrupt = { 169static struct irq_chip crime_edge_interrupt = {
191 .name = "IP32 CRIME", 170 .name = "IP32 CRIME",
192 .ack = crime_edge_mask_and_ack_irq, 171 .irq_ack = crime_edge_mask_and_ack_irq,
193 .mask = crime_disable_irq, 172 .irq_mask = crime_disable_irq,
194 .mask_ack = crime_edge_mask_and_ack_irq, 173 .irq_mask_ack = crime_edge_mask_and_ack_irq,
195 .unmask = crime_enable_irq, 174 .irq_unmask = crime_enable_irq,
196 .end = crime_edge_end_irq,
197}; 175};
198 176
199/* 177/*
@@ -204,37 +182,28 @@ static struct irq_chip crime_edge_interrupt = {
204 182
205static unsigned long macepci_mask; 183static unsigned long macepci_mask;
206 184
207static void enable_macepci_irq(unsigned int irq) 185static void enable_macepci_irq(struct irq_data *d)
208{ 186{
209 macepci_mask |= MACEPCI_CONTROL_INT(irq - MACEPCI_SCSI0_IRQ); 187 macepci_mask |= MACEPCI_CONTROL_INT(d->irq - MACEPCI_SCSI0_IRQ);
210 mace->pci.control = macepci_mask; 188 mace->pci.control = macepci_mask;
211 crime_mask |= 1 << (irq - CRIME_IRQ_BASE); 189 crime_mask |= 1 << (d->irq - CRIME_IRQ_BASE);
212 crime->imask = crime_mask; 190 crime->imask = crime_mask;
213} 191}
214 192
215static void disable_macepci_irq(unsigned int irq) 193static void disable_macepci_irq(struct irq_data *d)
216{ 194{
217 crime_mask &= ~(1 << (irq - CRIME_IRQ_BASE)); 195 crime_mask &= ~(1 << (d->irq - CRIME_IRQ_BASE));
218 crime->imask = crime_mask; 196 crime->imask = crime_mask;
219 flush_crime_bus(); 197 flush_crime_bus();
220 macepci_mask &= ~MACEPCI_CONTROL_INT(irq - MACEPCI_SCSI0_IRQ); 198 macepci_mask &= ~MACEPCI_CONTROL_INT(d->irq - MACEPCI_SCSI0_IRQ);
221 mace->pci.control = macepci_mask; 199 mace->pci.control = macepci_mask;
222 flush_mace_bus(); 200 flush_mace_bus();
223} 201}
224 202
225static void end_macepci_irq(unsigned int irq)
226{
227 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
228 enable_macepci_irq(irq);
229}
230
231static struct irq_chip ip32_macepci_interrupt = { 203static struct irq_chip ip32_macepci_interrupt = {
232 .name = "IP32 MACE PCI", 204 .name = "IP32 MACE PCI",
233 .ack = disable_macepci_irq, 205 .irq_mask = disable_macepci_irq,
234 .mask = disable_macepci_irq, 206 .irq_unmask = enable_macepci_irq,
235 .mask_ack = disable_macepci_irq,
236 .unmask = enable_macepci_irq,
237 .end = end_macepci_irq,
238}; 207};
239 208
240/* This is used for MACE ISA interrupts. That means bits 4-6 in the 209/* This is used for MACE ISA interrupts. That means bits 4-6 in the
@@ -276,13 +245,13 @@ static struct irq_chip ip32_macepci_interrupt = {
276 245
277static unsigned long maceisa_mask; 246static unsigned long maceisa_mask;
278 247
279static void enable_maceisa_irq(unsigned int irq) 248static void enable_maceisa_irq(struct irq_data *d)
280{ 249{
281 unsigned int crime_int = 0; 250 unsigned int crime_int = 0;
282 251
283 pr_debug("maceisa enable: %u\n", irq); 252 pr_debug("maceisa enable: %u\n", d->irq);
284 253
285 switch (irq) { 254 switch (d->irq) {
286 case MACEISA_AUDIO_SW_IRQ ... MACEISA_AUDIO3_MERR_IRQ: 255 case MACEISA_AUDIO_SW_IRQ ... MACEISA_AUDIO3_MERR_IRQ:
287 crime_int = MACE_AUDIO_INT; 256 crime_int = MACE_AUDIO_INT;
288 break; 257 break;
@@ -296,15 +265,15 @@ static void enable_maceisa_irq(unsigned int irq)
296 pr_debug("crime_int %08x enabled\n", crime_int); 265 pr_debug("crime_int %08x enabled\n", crime_int);
297 crime_mask |= crime_int; 266 crime_mask |= crime_int;
298 crime->imask = crime_mask; 267 crime->imask = crime_mask;
299 maceisa_mask |= 1 << (irq - MACEISA_AUDIO_SW_IRQ); 268 maceisa_mask |= 1 << (d->irq - MACEISA_AUDIO_SW_IRQ);
300 mace->perif.ctrl.imask = maceisa_mask; 269 mace->perif.ctrl.imask = maceisa_mask;
301} 270}
302 271
303static void disable_maceisa_irq(unsigned int irq) 272static void disable_maceisa_irq(struct irq_data *d)
304{ 273{
305 unsigned int crime_int = 0; 274 unsigned int crime_int = 0;
306 275
307 maceisa_mask &= ~(1 << (irq - MACEISA_AUDIO_SW_IRQ)); 276 maceisa_mask &= ~(1 << (d->irq - MACEISA_AUDIO_SW_IRQ));
308 if (!(maceisa_mask & MACEISA_AUDIO_INT)) 277 if (!(maceisa_mask & MACEISA_AUDIO_INT))
309 crime_int |= MACE_AUDIO_INT; 278 crime_int |= MACE_AUDIO_INT;
310 if (!(maceisa_mask & MACEISA_MISC_INT)) 279 if (!(maceisa_mask & MACEISA_MISC_INT))
@@ -318,76 +287,57 @@ static void disable_maceisa_irq(unsigned int irq)
318 flush_mace_bus(); 287 flush_mace_bus();
319} 288}
320 289
321static void mask_and_ack_maceisa_irq(unsigned int irq) 290static void mask_and_ack_maceisa_irq(struct irq_data *d)
322{ 291{
323 unsigned long mace_int; 292 unsigned long mace_int;
324 293
325 /* edge triggered */ 294 /* edge triggered */
326 mace_int = mace->perif.ctrl.istat; 295 mace_int = mace->perif.ctrl.istat;
327 mace_int &= ~(1 << (irq - MACEISA_AUDIO_SW_IRQ)); 296 mace_int &= ~(1 << (d->irq - MACEISA_AUDIO_SW_IRQ));
328 mace->perif.ctrl.istat = mace_int; 297 mace->perif.ctrl.istat = mace_int;
329 298
330 disable_maceisa_irq(irq); 299 disable_maceisa_irq(d);
331}
332
333static void end_maceisa_irq(unsigned irq)
334{
335 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
336 enable_maceisa_irq(irq);
337} 300}
338 301
339static struct irq_chip ip32_maceisa_level_interrupt = { 302static struct irq_chip ip32_maceisa_level_interrupt = {
340 .name = "IP32 MACE ISA", 303 .name = "IP32 MACE ISA",
341 .ack = disable_maceisa_irq, 304 .irq_mask = disable_maceisa_irq,
342 .mask = disable_maceisa_irq, 305 .irq_unmask = enable_maceisa_irq,
343 .mask_ack = disable_maceisa_irq,
344 .unmask = enable_maceisa_irq,
345 .end = end_maceisa_irq,
346}; 306};
347 307
348static struct irq_chip ip32_maceisa_edge_interrupt = { 308static struct irq_chip ip32_maceisa_edge_interrupt = {
349 .name = "IP32 MACE ISA", 309 .name = "IP32 MACE ISA",
350 .ack = mask_and_ack_maceisa_irq, 310 .irq_ack = mask_and_ack_maceisa_irq,
351 .mask = disable_maceisa_irq, 311 .irq_mask = disable_maceisa_irq,
352 .mask_ack = mask_and_ack_maceisa_irq, 312 .irq_mask_ack = mask_and_ack_maceisa_irq,
353 .unmask = enable_maceisa_irq, 313 .irq_unmask = enable_maceisa_irq,
354 .end = end_maceisa_irq,
355}; 314};
356 315
357/* This is used for regular non-ISA, non-PCI MACE interrupts. That means 316/* This is used for regular non-ISA, non-PCI MACE interrupts. That means
358 * bits 0-3 and 7 in the CRIME register. 317 * bits 0-3 and 7 in the CRIME register.
359 */ 318 */
360 319
361static void enable_mace_irq(unsigned int irq) 320static void enable_mace_irq(struct irq_data *d)
362{ 321{
363 unsigned int bit = irq - CRIME_IRQ_BASE; 322 unsigned int bit = d->irq - CRIME_IRQ_BASE;
364 323
365 crime_mask |= (1 << bit); 324 crime_mask |= (1 << bit);
366 crime->imask = crime_mask; 325 crime->imask = crime_mask;
367} 326}
368 327
369static void disable_mace_irq(unsigned int irq) 328static void disable_mace_irq(struct irq_data *d)
370{ 329{
371 unsigned int bit = irq - CRIME_IRQ_BASE; 330 unsigned int bit = d->irq - CRIME_IRQ_BASE;
372 331
373 crime_mask &= ~(1 << bit); 332 crime_mask &= ~(1 << bit);
374 crime->imask = crime_mask; 333 crime->imask = crime_mask;
375 flush_crime_bus(); 334 flush_crime_bus();
376} 335}
377 336
378static void end_mace_irq(unsigned int irq)
379{
380 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
381 enable_mace_irq(irq);
382}
383
384static struct irq_chip ip32_mace_interrupt = { 337static struct irq_chip ip32_mace_interrupt = {
385 .name = "IP32 MACE", 338 .name = "IP32 MACE",
386 .ack = disable_mace_irq, 339 .irq_mask = disable_mace_irq,
387 .mask = disable_mace_irq, 340 .irq_unmask = enable_mace_irq,
388 .mask_ack = disable_mace_irq,
389 .unmask = enable_mace_irq,
390 .end = end_mace_irq,
391}; 341};
392 342
393static void ip32_unknown_interrupt(void) 343static void ip32_unknown_interrupt(void)
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index 044bbe462c2c..89e8188a4665 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -44,31 +44,10 @@
44 * for interrupt lines 44 * for interrupt lines
45 */ 45 */
46 46
47
48static void end_bcm1480_irq(unsigned int irq);
49static void enable_bcm1480_irq(unsigned int irq);
50static void disable_bcm1480_irq(unsigned int irq);
51static void ack_bcm1480_irq(unsigned int irq);
52#ifdef CONFIG_SMP
53static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask);
54#endif
55
56#ifdef CONFIG_PCI 47#ifdef CONFIG_PCI
57extern unsigned long ht_eoi_space; 48extern unsigned long ht_eoi_space;
58#endif 49#endif
59 50
60static struct irq_chip bcm1480_irq_type = {
61 .name = "BCM1480-IMR",
62 .ack = ack_bcm1480_irq,
63 .mask = disable_bcm1480_irq,
64 .mask_ack = ack_bcm1480_irq,
65 .unmask = enable_bcm1480_irq,
66 .end = end_bcm1480_irq,
67#ifdef CONFIG_SMP
68 .set_affinity = bcm1480_set_affinity
69#endif
70};
71
72/* Store the CPU id (not the logical number) */ 51/* Store the CPU id (not the logical number) */
73int bcm1480_irq_owner[BCM1480_NR_IRQS]; 52int bcm1480_irq_owner[BCM1480_NR_IRQS];
74 53
@@ -109,12 +88,13 @@ void bcm1480_unmask_irq(int cpu, int irq)
109} 88}
110 89
111#ifdef CONFIG_SMP 90#ifdef CONFIG_SMP
112static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) 91static int bcm1480_set_affinity(struct irq_data *d, const struct cpumask *mask,
92 bool force)
113{ 93{
94 unsigned int irq_dirty, irq = d->irq;
114 int i = 0, old_cpu, cpu, int_on, k; 95 int i = 0, old_cpu, cpu, int_on, k;
115 u64 cur_ints; 96 u64 cur_ints;
116 unsigned long flags; 97 unsigned long flags;
117 unsigned int irq_dirty;
118 98
119 i = cpumask_first(mask); 99 i = cpumask_first(mask);
120 100
@@ -156,21 +136,25 @@ static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask)
156 136
157/*****************************************************************************/ 137/*****************************************************************************/
158 138
159static void disable_bcm1480_irq(unsigned int irq) 139static void disable_bcm1480_irq(struct irq_data *d)
160{ 140{
141 unsigned int irq = d->irq;
142
161 bcm1480_mask_irq(bcm1480_irq_owner[irq], irq); 143 bcm1480_mask_irq(bcm1480_irq_owner[irq], irq);
162} 144}
163 145
164static void enable_bcm1480_irq(unsigned int irq) 146static void enable_bcm1480_irq(struct irq_data *d)
165{ 147{
148 unsigned int irq = d->irq;
149
166 bcm1480_unmask_irq(bcm1480_irq_owner[irq], irq); 150 bcm1480_unmask_irq(bcm1480_irq_owner[irq], irq);
167} 151}
168 152
169 153
170static void ack_bcm1480_irq(unsigned int irq) 154static void ack_bcm1480_irq(struct irq_data *d)
171{ 155{
156 unsigned int irq_dirty, irq = d->irq;
172 u64 pending; 157 u64 pending;
173 unsigned int irq_dirty;
174 int k; 158 int k;
175 159
176 /* 160 /*
@@ -217,14 +201,15 @@ static void ack_bcm1480_irq(unsigned int irq)
217 bcm1480_mask_irq(bcm1480_irq_owner[irq], irq); 201 bcm1480_mask_irq(bcm1480_irq_owner[irq], irq);
218} 202}
219 203
220 204static struct irq_chip bcm1480_irq_type = {
221static void end_bcm1480_irq(unsigned int irq) 205 .name = "BCM1480-IMR",
222{ 206 .irq_mask_ack = ack_bcm1480_irq,
223 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { 207 .irq_mask = disable_bcm1480_irq,
224 bcm1480_unmask_irq(bcm1480_irq_owner[irq], irq); 208 .irq_unmask = enable_bcm1480_irq,
225 } 209#ifdef CONFIG_SMP
226} 210 .irq_set_affinity = bcm1480_set_affinity
227 211#endif
212};
228 213
229void __init init_bcm1480_irqs(void) 214void __init init_bcm1480_irqs(void)
230{ 215{
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index 12ac04a658ee..fd269ea8d8a8 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -43,31 +43,10 @@
43 * for interrupt lines 43 * for interrupt lines
44 */ 44 */
45 45
46
47static void end_sb1250_irq(unsigned int irq);
48static void enable_sb1250_irq(unsigned int irq);
49static void disable_sb1250_irq(unsigned int irq);
50static void ack_sb1250_irq(unsigned int irq);
51#ifdef CONFIG_SMP
52static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask);
53#endif
54
55#ifdef CONFIG_SIBYTE_HAS_LDT 46#ifdef CONFIG_SIBYTE_HAS_LDT
56extern unsigned long ldt_eoi_space; 47extern unsigned long ldt_eoi_space;
57#endif 48#endif
58 49
59static struct irq_chip sb1250_irq_type = {
60 .name = "SB1250-IMR",
61 .ack = ack_sb1250_irq,
62 .mask = disable_sb1250_irq,
63 .mask_ack = ack_sb1250_irq,
64 .unmask = enable_sb1250_irq,
65 .end = end_sb1250_irq,
66#ifdef CONFIG_SMP
67 .set_affinity = sb1250_set_affinity
68#endif
69};
70
71/* Store the CPU id (not the logical number) */ 50/* Store the CPU id (not the logical number) */
72int sb1250_irq_owner[SB1250_NR_IRQS]; 51int sb1250_irq_owner[SB1250_NR_IRQS];
73 52
@@ -102,9 +81,11 @@ void sb1250_unmask_irq(int cpu, int irq)
102} 81}
103 82
104#ifdef CONFIG_SMP 83#ifdef CONFIG_SMP
105static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) 84static int sb1250_set_affinity(struct irq_data *d, const struct cpumask *mask,
85 bool force)
106{ 86{
107 int i = 0, old_cpu, cpu, int_on; 87 int i = 0, old_cpu, cpu, int_on;
88 unsigned int irq = d->irq;
108 u64 cur_ints; 89 u64 cur_ints;
109 unsigned long flags; 90 unsigned long flags;
110 91
@@ -142,21 +123,17 @@ static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask)
142} 123}
143#endif 124#endif
144 125
145/*****************************************************************************/ 126static void enable_sb1250_irq(struct irq_data *d)
146
147static void disable_sb1250_irq(unsigned int irq)
148{ 127{
149 sb1250_mask_irq(sb1250_irq_owner[irq], irq); 128 unsigned int irq = d->irq;
150}
151 129
152static void enable_sb1250_irq(unsigned int irq)
153{
154 sb1250_unmask_irq(sb1250_irq_owner[irq], irq); 130 sb1250_unmask_irq(sb1250_irq_owner[irq], irq);
155} 131}
156 132
157 133
158static void ack_sb1250_irq(unsigned int irq) 134static void ack_sb1250_irq(struct irq_data *d)
159{ 135{
136 unsigned int irq = d->irq;
160#ifdef CONFIG_SIBYTE_HAS_LDT 137#ifdef CONFIG_SIBYTE_HAS_LDT
161 u64 pending; 138 u64 pending;
162 139
@@ -199,14 +176,14 @@ static void ack_sb1250_irq(unsigned int irq)
199 sb1250_mask_irq(sb1250_irq_owner[irq], irq); 176 sb1250_mask_irq(sb1250_irq_owner[irq], irq);
200} 177}
201 178
202 179static struct irq_chip sb1250_irq_type = {
203static void end_sb1250_irq(unsigned int irq) 180 .name = "SB1250-IMR",
204{ 181 .irq_mask_ack = ack_sb1250_irq,
205 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { 182 .irq_unmask = enable_sb1250_irq,
206 sb1250_unmask_irq(sb1250_irq_owner[irq], irq); 183#ifdef CONFIG_SMP
207 } 184 .irq_set_affinity = sb1250_set_affinity
208} 185#endif
209 186};
210 187
211void __init init_sb1250_irqs(void) 188void __init init_sb1250_irqs(void)
212{ 189{
diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c
index bbe7187879fa..72b94155778d 100644
--- a/arch/mips/sni/a20r.c
+++ b/arch/mips/sni/a20r.c
@@ -168,33 +168,22 @@ static u32 a20r_ack_hwint(void)
168 return status; 168 return status;
169} 169}
170 170
171static inline void unmask_a20r_irq(unsigned int irq) 171static inline void unmask_a20r_irq(struct irq_data *d)
172{ 172{
173 set_c0_status(0x100 << (irq - SNI_A20R_IRQ_BASE)); 173 set_c0_status(0x100 << (d->irq - SNI_A20R_IRQ_BASE));
174 irq_enable_hazard(); 174 irq_enable_hazard();
175} 175}
176 176
177static inline void mask_a20r_irq(unsigned int irq) 177static inline void mask_a20r_irq(struct irq_data *d)
178{ 178{
179 clear_c0_status(0x100 << (irq - SNI_A20R_IRQ_BASE)); 179 clear_c0_status(0x100 << (d->irq - SNI_A20R_IRQ_BASE));
180 irq_disable_hazard(); 180 irq_disable_hazard();
181} 181}
182 182
183static void end_a20r_irq(unsigned int irq)
184{
185 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
186 a20r_ack_hwint();
187 unmask_a20r_irq(irq);
188 }
189}
190
191static struct irq_chip a20r_irq_type = { 183static struct irq_chip a20r_irq_type = {
192 .name = "A20R", 184 .name = "A20R",
193 .ack = mask_a20r_irq, 185 .irq_mask = mask_a20r_irq,
194 .mask = mask_a20r_irq, 186 .irq_unmask = unmask_a20r_irq,
195 .mask_ack = mask_a20r_irq,
196 .unmask = unmask_a20r_irq,
197 .end = end_a20r_irq,
198}; 187};
199 188
200/* 189/*
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c
index 8c92c73bc717..cfcc68abc5b2 100644
--- a/arch/mips/sni/pcimt.c
+++ b/arch/mips/sni/pcimt.c
@@ -194,33 +194,24 @@ static struct pci_controller sni_controller = {
194 .io_map_base = SNI_PORT_BASE 194 .io_map_base = SNI_PORT_BASE
195}; 195};
196 196
197static void enable_pcimt_irq(unsigned int irq) 197static void enable_pcimt_irq(struct irq_data *d)
198{ 198{
199 unsigned int mask = 1 << (irq - PCIMT_IRQ_INT2); 199 unsigned int mask = 1 << (d->irq - PCIMT_IRQ_INT2);
200 200
201 *(volatile u8 *) PCIMT_IRQSEL |= mask; 201 *(volatile u8 *) PCIMT_IRQSEL |= mask;
202} 202}
203 203
204void disable_pcimt_irq(unsigned int irq) 204void disable_pcimt_irq(struct irq_data *d)
205{ 205{
206 unsigned int mask = ~(1 << (irq - PCIMT_IRQ_INT2)); 206 unsigned int mask = ~(1 << (d->irq - PCIMT_IRQ_INT2));
207 207
208 *(volatile u8 *) PCIMT_IRQSEL &= mask; 208 *(volatile u8 *) PCIMT_IRQSEL &= mask;
209} 209}
210 210
211static void end_pcimt_irq(unsigned int irq)
212{
213 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
214 enable_pcimt_irq(irq);
215}
216
217static struct irq_chip pcimt_irq_type = { 211static struct irq_chip pcimt_irq_type = {
218 .name = "PCIMT", 212 .name = "PCIMT",
219 .ack = disable_pcimt_irq, 213 .irq_mask = disable_pcimt_irq,
220 .mask = disable_pcimt_irq, 214 .irq_unmask = enable_pcimt_irq,
221 .mask_ack = disable_pcimt_irq,
222 .unmask = enable_pcimt_irq,
223 .end = end_pcimt_irq,
224}; 215};
225 216
226/* 217/*
diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c
index dc9874553bec..0846e99a6efe 100644
--- a/arch/mips/sni/pcit.c
+++ b/arch/mips/sni/pcit.c
@@ -156,33 +156,24 @@ static struct pci_controller sni_pcit_controller = {
156 .io_map_base = SNI_PORT_BASE 156 .io_map_base = SNI_PORT_BASE
157}; 157};
158 158
159static void enable_pcit_irq(unsigned int irq) 159static void enable_pcit_irq(struct irq_data *d)
160{ 160{
161 u32 mask = 1 << (irq - SNI_PCIT_INT_START + 24); 161 u32 mask = 1 << (d->irq - SNI_PCIT_INT_START + 24);
162 162
163 *(volatile u32 *)SNI_PCIT_INT_REG |= mask; 163 *(volatile u32 *)SNI_PCIT_INT_REG |= mask;
164} 164}
165 165
166void disable_pcit_irq(unsigned int irq) 166void disable_pcit_irq(struct irq_data *d)
167{ 167{
168 u32 mask = 1 << (irq - SNI_PCIT_INT_START + 24); 168 u32 mask = 1 << (d->irq - SNI_PCIT_INT_START + 24);
169 169
170 *(volatile u32 *)SNI_PCIT_INT_REG &= ~mask; 170 *(volatile u32 *)SNI_PCIT_INT_REG &= ~mask;
171} 171}
172 172
173void end_pcit_irq(unsigned int irq)
174{
175 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
176 enable_pcit_irq(irq);
177}
178
179static struct irq_chip pcit_irq_type = { 173static struct irq_chip pcit_irq_type = {
180 .name = "PCIT", 174 .name = "PCIT",
181 .ack = disable_pcit_irq, 175 .irq_mask = disable_pcit_irq,
182 .mask = disable_pcit_irq, 176 .irq_unmask = enable_pcit_irq,
183 .mask_ack = disable_pcit_irq,
184 .unmask = enable_pcit_irq,
185 .end = end_pcit_irq,
186}; 177};
187 178
188static void pcit_hwint1(void) 179static void pcit_hwint1(void)
diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c
index 0e6f42c2bbc8..f05d8e593300 100644
--- a/arch/mips/sni/rm200.c
+++ b/arch/mips/sni/rm200.c
@@ -155,12 +155,11 @@ static __iomem u8 *rm200_pic_slave;
155#define cached_master_mask (rm200_cached_irq_mask) 155#define cached_master_mask (rm200_cached_irq_mask)
156#define cached_slave_mask (rm200_cached_irq_mask >> 8) 156#define cached_slave_mask (rm200_cached_irq_mask >> 8)
157 157
158static void sni_rm200_disable_8259A_irq(unsigned int irq) 158static void sni_rm200_disable_8259A_irq(struct irq_data *d)
159{ 159{
160 unsigned int mask; 160 unsigned int mask, irq = d->irq - RM200_I8259A_IRQ_BASE;
161 unsigned long flags; 161 unsigned long flags;
162 162
163 irq -= RM200_I8259A_IRQ_BASE;
164 mask = 1 << irq; 163 mask = 1 << irq;
165 raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags); 164 raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags);
166 rm200_cached_irq_mask |= mask; 165 rm200_cached_irq_mask |= mask;
@@ -171,12 +170,11 @@ static void sni_rm200_disable_8259A_irq(unsigned int irq)
171 raw_spin_unlock_irqrestore(&sni_rm200_i8259A_lock, flags); 170 raw_spin_unlock_irqrestore(&sni_rm200_i8259A_lock, flags);
172} 171}
173 172
174static void sni_rm200_enable_8259A_irq(unsigned int irq) 173static void sni_rm200_enable_8259A_irq(struct irq_data *d)
175{ 174{
176 unsigned int mask; 175 unsigned int mask, irq = d->irq - RM200_I8259A_IRQ_BASE;
177 unsigned long flags; 176 unsigned long flags;
178 177
179 irq -= RM200_I8259A_IRQ_BASE;
180 mask = ~(1 << irq); 178 mask = ~(1 << irq);
181 raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags); 179 raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags);
182 rm200_cached_irq_mask &= mask; 180 rm200_cached_irq_mask &= mask;
@@ -210,12 +208,11 @@ static inline int sni_rm200_i8259A_irq_real(unsigned int irq)
210 * first, _then_ send the EOI, and the order of EOI 208 * first, _then_ send the EOI, and the order of EOI
211 * to the two 8259s is important! 209 * to the two 8259s is important!
212 */ 210 */
213void sni_rm200_mask_and_ack_8259A(unsigned int irq) 211void sni_rm200_mask_and_ack_8259A(struct irq_data *d)
214{ 212{
215 unsigned int irqmask; 213 unsigned int irqmask, irq = d->irq - RM200_I8259A_IRQ_BASE;
216 unsigned long flags; 214 unsigned long flags;
217 215
218 irq -= RM200_I8259A_IRQ_BASE;
219 irqmask = 1 << irq; 216 irqmask = 1 << irq;
220 raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags); 217 raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags);
221 /* 218 /*
@@ -285,9 +282,9 @@ spurious_8259A_irq:
285 282
286static struct irq_chip sni_rm200_i8259A_chip = { 283static struct irq_chip sni_rm200_i8259A_chip = {
287 .name = "RM200-XT-PIC", 284 .name = "RM200-XT-PIC",
288 .mask = sni_rm200_disable_8259A_irq, 285 .irq_mask = sni_rm200_disable_8259A_irq,
289 .unmask = sni_rm200_enable_8259A_irq, 286 .irq_unmask = sni_rm200_enable_8259A_irq,
290 .mask_ack = sni_rm200_mask_and_ack_8259A, 287 .irq_mask_ack = sni_rm200_mask_and_ack_8259A,
291}; 288};
292 289
293/* 290/*
@@ -429,33 +426,24 @@ void __init sni_rm200_i8259_irqs(void)
429#define SNI_RM200_INT_START 24 426#define SNI_RM200_INT_START 24
430#define SNI_RM200_INT_END 28 427#define SNI_RM200_INT_END 28
431 428
432static void enable_rm200_irq(unsigned int irq) 429static void enable_rm200_irq(struct irq_data *d)
433{ 430{
434 unsigned int mask = 1 << (irq - SNI_RM200_INT_START); 431 unsigned int mask = 1 << (d->irq - SNI_RM200_INT_START);
435 432
436 *(volatile u8 *)SNI_RM200_INT_ENA_REG &= ~mask; 433 *(volatile u8 *)SNI_RM200_INT_ENA_REG &= ~mask;
437} 434}
438 435
439void disable_rm200_irq(unsigned int irq) 436void disable_rm200_irq(struct irq_data *d)
440{ 437{
441 unsigned int mask = 1 << (irq - SNI_RM200_INT_START); 438 unsigned int mask = 1 << (d->irq - SNI_RM200_INT_START);
442 439
443 *(volatile u8 *)SNI_RM200_INT_ENA_REG |= mask; 440 *(volatile u8 *)SNI_RM200_INT_ENA_REG |= mask;
444} 441}
445 442
446void end_rm200_irq(unsigned int irq)
447{
448 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
449 enable_rm200_irq(irq);
450}
451
452static struct irq_chip rm200_irq_type = { 443static struct irq_chip rm200_irq_type = {
453 .name = "RM200", 444 .name = "RM200",
454 .ack = disable_rm200_irq, 445 .irq_mask = disable_rm200_irq,
455 .mask = disable_rm200_irq, 446 .irq_unmask = enable_rm200_irq,
456 .mask_ack = disable_rm200_irq,
457 .unmask = enable_rm200_irq,
458 .end = end_rm200_irq,
459}; 447};
460 448
461static void sni_rm200_hwint(void) 449static void sni_rm200_hwint(void)
diff --git a/arch/mips/txx9/generic/irq_tx4939.c b/arch/mips/txx9/generic/irq_tx4939.c
index 3886ad77cbad..93b6edbedd64 100644
--- a/arch/mips/txx9/generic/irq_tx4939.c
+++ b/arch/mips/txx9/generic/irq_tx4939.c
@@ -50,9 +50,9 @@ static struct {
50 unsigned char mode; 50 unsigned char mode;
51} tx4939irq[TX4939_NUM_IR] __read_mostly; 51} tx4939irq[TX4939_NUM_IR] __read_mostly;
52 52
53static void tx4939_irq_unmask(unsigned int irq) 53static void tx4939_irq_unmask(struct irq_data *d)
54{ 54{
55 unsigned int irq_nr = irq - TXX9_IRQ_BASE; 55 unsigned int irq_nr = d->irq - TXX9_IRQ_BASE;
56 u32 __iomem *lvlp; 56 u32 __iomem *lvlp;
57 int ofs; 57 int ofs;
58 if (irq_nr < 32) { 58 if (irq_nr < 32) {
@@ -68,9 +68,9 @@ static void tx4939_irq_unmask(unsigned int irq)
68 lvlp); 68 lvlp);
69} 69}
70 70
71static inline void tx4939_irq_mask(unsigned int irq) 71static inline void tx4939_irq_mask(struct irq_data *d)
72{ 72{
73 unsigned int irq_nr = irq - TXX9_IRQ_BASE; 73 unsigned int irq_nr = d->irq - TXX9_IRQ_BASE;
74 u32 __iomem *lvlp; 74 u32 __iomem *lvlp;
75 int ofs; 75 int ofs;
76 if (irq_nr < 32) { 76 if (irq_nr < 32) {
@@ -87,11 +87,11 @@ static inline void tx4939_irq_mask(unsigned int irq)
87 mmiowb(); 87 mmiowb();
88} 88}
89 89
90static void tx4939_irq_mask_ack(unsigned int irq) 90static void tx4939_irq_mask_ack(struct irq_data *d)
91{ 91{
92 unsigned int irq_nr = irq - TXX9_IRQ_BASE; 92 unsigned int irq_nr = d->irq - TXX9_IRQ_BASE;
93 93
94 tx4939_irq_mask(irq); 94 tx4939_irq_mask(d);
95 if (TXx9_IRCR_EDGE(tx4939irq[irq_nr].mode)) { 95 if (TXx9_IRCR_EDGE(tx4939irq[irq_nr].mode)) {
96 irq_nr--; 96 irq_nr--;
97 /* clear edge detection */ 97 /* clear edge detection */
@@ -101,9 +101,9 @@ static void tx4939_irq_mask_ack(unsigned int irq)
101 } 101 }
102} 102}
103 103
104static int tx4939_irq_set_type(unsigned int irq, unsigned int flow_type) 104static int tx4939_irq_set_type(struct irq_data *d, unsigned int flow_type)
105{ 105{
106 unsigned int irq_nr = irq - TXX9_IRQ_BASE; 106 unsigned int irq_nr = d->irq - TXX9_IRQ_BASE;
107 u32 cr; 107 u32 cr;
108 u32 __iomem *crp; 108 u32 __iomem *crp;
109 int ofs; 109 int ofs;
@@ -145,11 +145,11 @@ static int tx4939_irq_set_type(unsigned int irq, unsigned int flow_type)
145 145
146static struct irq_chip tx4939_irq_chip = { 146static struct irq_chip tx4939_irq_chip = {
147 .name = "TX4939", 147 .name = "TX4939",
148 .ack = tx4939_irq_mask_ack, 148 .irq_ack = tx4939_irq_mask_ack,
149 .mask = tx4939_irq_mask, 149 .irq_mask = tx4939_irq_mask,
150 .mask_ack = tx4939_irq_mask_ack, 150 .irq_mask_ack = tx4939_irq_mask_ack,
151 .unmask = tx4939_irq_unmask, 151 .irq_unmask = tx4939_irq_unmask,
152 .set_type = tx4939_irq_set_type, 152 .irq_set_type = tx4939_irq_set_type,
153}; 153};
154 154
155static int tx4939_irq_set_pri(int irc_irq, int new_pri) 155static int tx4939_irq_set_pri(int irc_irq, int new_pri)
diff --git a/arch/mips/txx9/jmr3927/irq.c b/arch/mips/txx9/jmr3927/irq.c
index 0a7f8e3b9fd7..92a5c1b400f0 100644
--- a/arch/mips/txx9/jmr3927/irq.c
+++ b/arch/mips/txx9/jmr3927/irq.c
@@ -47,20 +47,20 @@
47 * CP0_STATUS is a thread's resource (saved/restored on context switch). 47 * CP0_STATUS is a thread's resource (saved/restored on context switch).
48 * So disable_irq/enable_irq MUST handle IOC/IRC registers. 48 * So disable_irq/enable_irq MUST handle IOC/IRC registers.
49 */ 49 */
50static void mask_irq_ioc(unsigned int irq) 50static void mask_irq_ioc(struct irq_data *d)
51{ 51{
52 /* 0: mask */ 52 /* 0: mask */
53 unsigned int irq_nr = irq - JMR3927_IRQ_IOC; 53 unsigned int irq_nr = d->irq - JMR3927_IRQ_IOC;
54 unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR); 54 unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
55 unsigned int bit = 1 << irq_nr; 55 unsigned int bit = 1 << irq_nr;
56 jmr3927_ioc_reg_out(imask & ~bit, JMR3927_IOC_INTM_ADDR); 56 jmr3927_ioc_reg_out(imask & ~bit, JMR3927_IOC_INTM_ADDR);
57 /* flush write buffer */ 57 /* flush write buffer */
58 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR); 58 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
59} 59}
60static void unmask_irq_ioc(unsigned int irq) 60static void unmask_irq_ioc(struct irq_data *d)
61{ 61{
62 /* 0: mask */ 62 /* 0: mask */
63 unsigned int irq_nr = irq - JMR3927_IRQ_IOC; 63 unsigned int irq_nr = d->irq - JMR3927_IRQ_IOC;
64 unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR); 64 unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
65 unsigned int bit = 1 << irq_nr; 65 unsigned int bit = 1 << irq_nr;
66 jmr3927_ioc_reg_out(imask | bit, JMR3927_IOC_INTM_ADDR); 66 jmr3927_ioc_reg_out(imask | bit, JMR3927_IOC_INTM_ADDR);
@@ -95,10 +95,8 @@ static int jmr3927_irq_dispatch(int pending)
95 95
96static struct irq_chip jmr3927_irq_ioc = { 96static struct irq_chip jmr3927_irq_ioc = {
97 .name = "jmr3927_ioc", 97 .name = "jmr3927_ioc",
98 .ack = mask_irq_ioc, 98 .irq_mask = mask_irq_ioc,
99 .mask = mask_irq_ioc, 99 .irq_unmask = unmask_irq_ioc,
100 .mask_ack = mask_irq_ioc,
101 .unmask = unmask_irq_ioc,
102}; 100};
103 101
104void __init jmr3927_irq_setup(void) 102void __init jmr3927_irq_setup(void)
diff --git a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c
index c4b54d20efd3..7c0a048b307c 100644
--- a/arch/mips/txx9/rbtx4927/irq.c
+++ b/arch/mips/txx9/rbtx4927/irq.c
@@ -117,18 +117,6 @@
117#include <asm/txx9/generic.h> 117#include <asm/txx9/generic.h>
118#include <asm/txx9/rbtx4927.h> 118#include <asm/txx9/rbtx4927.h>
119 119
120static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq);
121static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
122
123#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
124static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
125 .name = TOSHIBA_RBTX4927_IOC_NAME,
126 .ack = toshiba_rbtx4927_irq_ioc_disable,
127 .mask = toshiba_rbtx4927_irq_ioc_disable,
128 .mask_ack = toshiba_rbtx4927_irq_ioc_disable,
129 .unmask = toshiba_rbtx4927_irq_ioc_enable,
130};
131
132static int toshiba_rbtx4927_irq_nested(int sw_irq) 120static int toshiba_rbtx4927_irq_nested(int sw_irq)
133{ 121{
134 u8 level3; 122 u8 level3;
@@ -139,41 +127,47 @@ static int toshiba_rbtx4927_irq_nested(int sw_irq)
139 return RBTX4927_IRQ_IOC + __fls8(level3); 127 return RBTX4927_IRQ_IOC + __fls8(level3);
140} 128}
141 129
142static void __init toshiba_rbtx4927_irq_ioc_init(void) 130static void toshiba_rbtx4927_irq_ioc_enable(struct irq_data *d)
143{
144 int i;
145
146 /* mask all IOC interrupts */
147 writeb(0, rbtx4927_imask_addr);
148 /* clear SoftInt interrupts */
149 writeb(0, rbtx4927_softint_addr);
150
151 for (i = RBTX4927_IRQ_IOC;
152 i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++)
153 set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
154 handle_level_irq);
155 set_irq_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq);
156}
157
158static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
159{ 131{
160 unsigned char v; 132 unsigned char v;
161 133
162 v = readb(rbtx4927_imask_addr); 134 v = readb(rbtx4927_imask_addr);
163 v |= (1 << (irq - RBTX4927_IRQ_IOC)); 135 v |= (1 << (d->irq - RBTX4927_IRQ_IOC));
164 writeb(v, rbtx4927_imask_addr); 136 writeb(v, rbtx4927_imask_addr);
165} 137}
166 138
167static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq) 139static void toshiba_rbtx4927_irq_ioc_disable(struct irq_data *d)
168{ 140{
169 unsigned char v; 141 unsigned char v;
170 142
171 v = readb(rbtx4927_imask_addr); 143 v = readb(rbtx4927_imask_addr);
172 v &= ~(1 << (irq - RBTX4927_IRQ_IOC)); 144 v &= ~(1 << (d->irq - RBTX4927_IRQ_IOC));
173 writeb(v, rbtx4927_imask_addr); 145 writeb(v, rbtx4927_imask_addr);
174 mmiowb(); 146 mmiowb();
175} 147}
176 148
149#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
150static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
151 .name = TOSHIBA_RBTX4927_IOC_NAME,
152 .irq_mask = toshiba_rbtx4927_irq_ioc_disable,
153 .irq_unmask = toshiba_rbtx4927_irq_ioc_enable,
154};
155
156static void __init toshiba_rbtx4927_irq_ioc_init(void)
157{
158 int i;
159
160 /* mask all IOC interrupts */
161 writeb(0, rbtx4927_imask_addr);
162 /* clear SoftInt interrupts */
163 writeb(0, rbtx4927_softint_addr);
164
165 for (i = RBTX4927_IRQ_IOC;
166 i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++)
167 set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
168 handle_level_irq);
169 set_irq_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq);
170}
177 171
178static int rbtx4927_irq_dispatch(int pending) 172static int rbtx4927_irq_dispatch(int pending)
179{ 173{
diff --git a/arch/mips/txx9/rbtx4938/irq.c b/arch/mips/txx9/rbtx4938/irq.c
index 67a73a8065ec..2ec4fe1b1670 100644
--- a/arch/mips/txx9/rbtx4938/irq.c
+++ b/arch/mips/txx9/rbtx4938/irq.c
@@ -69,18 +69,6 @@
69#include <asm/txx9/generic.h> 69#include <asm/txx9/generic.h>
70#include <asm/txx9/rbtx4938.h> 70#include <asm/txx9/rbtx4938.h>
71 71
72static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq);
73static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq);
74
75#define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC"
76static struct irq_chip toshiba_rbtx4938_irq_ioc_type = {
77 .name = TOSHIBA_RBTX4938_IOC_NAME,
78 .ack = toshiba_rbtx4938_irq_ioc_disable,
79 .mask = toshiba_rbtx4938_irq_ioc_disable,
80 .mask_ack = toshiba_rbtx4938_irq_ioc_disable,
81 .unmask = toshiba_rbtx4938_irq_ioc_enable,
82};
83
84static int toshiba_rbtx4938_irq_nested(int sw_irq) 72static int toshiba_rbtx4938_irq_nested(int sw_irq)
85{ 73{
86 u8 level3; 74 u8 level3;
@@ -92,41 +80,33 @@ static int toshiba_rbtx4938_irq_nested(int sw_irq)
92 return RBTX4938_IRQ_IOC + __fls8(level3); 80 return RBTX4938_IRQ_IOC + __fls8(level3);
93} 81}
94 82
95static void __init 83static void toshiba_rbtx4938_irq_ioc_enable(struct irq_data *d)
96toshiba_rbtx4938_irq_ioc_init(void)
97{
98 int i;
99
100 for (i = RBTX4938_IRQ_IOC;
101 i < RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC; i++)
102 set_irq_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type,
103 handle_level_irq);
104
105 set_irq_chained_handler(RBTX4938_IRQ_IOCINT, handle_simple_irq);
106}
107
108static void
109toshiba_rbtx4938_irq_ioc_enable(unsigned int irq)
110{ 84{
111 unsigned char v; 85 unsigned char v;
112 86
113 v = readb(rbtx4938_imask_addr); 87 v = readb(rbtx4938_imask_addr);
114 v |= (1 << (irq - RBTX4938_IRQ_IOC)); 88 v |= (1 << (d->irq - RBTX4938_IRQ_IOC));
115 writeb(v, rbtx4938_imask_addr); 89 writeb(v, rbtx4938_imask_addr);
116 mmiowb(); 90 mmiowb();
117} 91}
118 92
119static void 93static void toshiba_rbtx4938_irq_ioc_disable(struct irq_data *d)
120toshiba_rbtx4938_irq_ioc_disable(unsigned int irq)
121{ 94{
122 unsigned char v; 95 unsigned char v;
123 96
124 v = readb(rbtx4938_imask_addr); 97 v = readb(rbtx4938_imask_addr);
125 v &= ~(1 << (irq - RBTX4938_IRQ_IOC)); 98 v &= ~(1 << (d->irq - RBTX4938_IRQ_IOC));
126 writeb(v, rbtx4938_imask_addr); 99 writeb(v, rbtx4938_imask_addr);
127 mmiowb(); 100 mmiowb();
128} 101}
129 102
103#define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC"
104static struct irq_chip toshiba_rbtx4938_irq_ioc_type = {
105 .name = TOSHIBA_RBTX4938_IOC_NAME,
106 .irq_mask = toshiba_rbtx4938_irq_ioc_disable,
107 .irq_unmask = toshiba_rbtx4938_irq_ioc_enable,
108};
109
130static int rbtx4938_irq_dispatch(int pending) 110static int rbtx4938_irq_dispatch(int pending)
131{ 111{
132 int irq; 112 int irq;
@@ -146,6 +126,18 @@ static int rbtx4938_irq_dispatch(int pending)
146 return irq; 126 return irq;
147} 127}
148 128
129static void __init toshiba_rbtx4938_irq_ioc_init(void)
130{
131 int i;
132
133 for (i = RBTX4938_IRQ_IOC;
134 i < RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC; i++)
135 set_irq_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type,
136 handle_level_irq);
137
138 set_irq_chained_handler(RBTX4938_IRQ_IOCINT, handle_simple_irq);
139}
140
149void __init rbtx4938_irq_setup(void) 141void __init rbtx4938_irq_setup(void)
150{ 142{
151 txx9_irq_dispatch = rbtx4938_irq_dispatch; 143 txx9_irq_dispatch = rbtx4938_irq_dispatch;
diff --git a/arch/mips/txx9/rbtx4939/irq.c b/arch/mips/txx9/rbtx4939/irq.c
index 57fa740a7205..70074632fb99 100644
--- a/arch/mips/txx9/rbtx4939/irq.c
+++ b/arch/mips/txx9/rbtx4939/irq.c
@@ -19,16 +19,16 @@
19 * RBTX4939 IOC controller definition 19 * RBTX4939 IOC controller definition
20 */ 20 */
21 21
22static void rbtx4939_ioc_irq_unmask(unsigned int irq) 22static void rbtx4939_ioc_irq_unmask(struct irq_data *d)
23{ 23{
24 int ioc_nr = irq - RBTX4939_IRQ_IOC; 24 int ioc_nr = d->irq - RBTX4939_IRQ_IOC;
25 25
26 writeb(readb(rbtx4939_ien_addr) | (1 << ioc_nr), rbtx4939_ien_addr); 26 writeb(readb(rbtx4939_ien_addr) | (1 << ioc_nr), rbtx4939_ien_addr);
27} 27}
28 28
29static void rbtx4939_ioc_irq_mask(unsigned int irq) 29static void rbtx4939_ioc_irq_mask(struct irq_data *d)
30{ 30{
31 int ioc_nr = irq - RBTX4939_IRQ_IOC; 31 int ioc_nr = d->irq - RBTX4939_IRQ_IOC;
32 32
33 writeb(readb(rbtx4939_ien_addr) & ~(1 << ioc_nr), rbtx4939_ien_addr); 33 writeb(readb(rbtx4939_ien_addr) & ~(1 << ioc_nr), rbtx4939_ien_addr);
34 mmiowb(); 34 mmiowb();
@@ -36,10 +36,8 @@ static void rbtx4939_ioc_irq_mask(unsigned int irq)
36 36
37static struct irq_chip rbtx4939_ioc_irq_chip = { 37static struct irq_chip rbtx4939_ioc_irq_chip = {
38 .name = "IOC", 38 .name = "IOC",
39 .ack = rbtx4939_ioc_irq_mask, 39 .irq_mask = rbtx4939_ioc_irq_mask,
40 .mask = rbtx4939_ioc_irq_mask, 40 .irq_unmask = rbtx4939_ioc_irq_unmask,
41 .mask_ack = rbtx4939_ioc_irq_mask,
42 .unmask = rbtx4939_ioc_irq_unmask,
43}; 41};
44 42
45 43
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c
index 6153b6a05ccf..f53156bb9aa8 100644
--- a/arch/mips/vr41xx/common/icu.c
+++ b/arch/mips/vr41xx/common/icu.c
@@ -154,7 +154,7 @@ static inline uint16_t icu2_clear(uint8_t offset, uint16_t clear)
154 154
155void vr41xx_enable_piuint(uint16_t mask) 155void vr41xx_enable_piuint(uint16_t mask)
156{ 156{
157 struct irq_desc *desc = irq_desc + PIU_IRQ; 157 struct irq_desc *desc = irq_to_desc(PIU_IRQ);
158 unsigned long flags; 158 unsigned long flags;
159 159
160 if (current_cpu_type() == CPU_VR4111 || 160 if (current_cpu_type() == CPU_VR4111 ||
@@ -169,7 +169,7 @@ EXPORT_SYMBOL(vr41xx_enable_piuint);
169 169
170void vr41xx_disable_piuint(uint16_t mask) 170void vr41xx_disable_piuint(uint16_t mask)
171{ 171{
172 struct irq_desc *desc = irq_desc + PIU_IRQ; 172 struct irq_desc *desc = irq_to_desc(PIU_IRQ);
173 unsigned long flags; 173 unsigned long flags;
174 174
175 if (current_cpu_type() == CPU_VR4111 || 175 if (current_cpu_type() == CPU_VR4111 ||
@@ -184,7 +184,7 @@ EXPORT_SYMBOL(vr41xx_disable_piuint);
184 184
185void vr41xx_enable_aiuint(uint16_t mask) 185void vr41xx_enable_aiuint(uint16_t mask)
186{ 186{
187 struct irq_desc *desc = irq_desc + AIU_IRQ; 187 struct irq_desc *desc = irq_to_desc(AIU_IRQ);
188 unsigned long flags; 188 unsigned long flags;
189 189
190 if (current_cpu_type() == CPU_VR4111 || 190 if (current_cpu_type() == CPU_VR4111 ||
@@ -199,7 +199,7 @@ EXPORT_SYMBOL(vr41xx_enable_aiuint);
199 199
200void vr41xx_disable_aiuint(uint16_t mask) 200void vr41xx_disable_aiuint(uint16_t mask)
201{ 201{
202 struct irq_desc *desc = irq_desc + AIU_IRQ; 202 struct irq_desc *desc = irq_to_desc(AIU_IRQ);
203 unsigned long flags; 203 unsigned long flags;
204 204
205 if (current_cpu_type() == CPU_VR4111 || 205 if (current_cpu_type() == CPU_VR4111 ||
@@ -214,7 +214,7 @@ EXPORT_SYMBOL(vr41xx_disable_aiuint);
214 214
215void vr41xx_enable_kiuint(uint16_t mask) 215void vr41xx_enable_kiuint(uint16_t mask)
216{ 216{
217 struct irq_desc *desc = irq_desc + KIU_IRQ; 217 struct irq_desc *desc = irq_to_desc(KIU_IRQ);
218 unsigned long flags; 218 unsigned long flags;
219 219
220 if (current_cpu_type() == CPU_VR4111 || 220 if (current_cpu_type() == CPU_VR4111 ||
@@ -229,7 +229,7 @@ EXPORT_SYMBOL(vr41xx_enable_kiuint);
229 229
230void vr41xx_disable_kiuint(uint16_t mask) 230void vr41xx_disable_kiuint(uint16_t mask)
231{ 231{
232 struct irq_desc *desc = irq_desc + KIU_IRQ; 232 struct irq_desc *desc = irq_to_desc(KIU_IRQ);
233 unsigned long flags; 233 unsigned long flags;
234 234
235 if (current_cpu_type() == CPU_VR4111 || 235 if (current_cpu_type() == CPU_VR4111 ||
@@ -244,7 +244,7 @@ EXPORT_SYMBOL(vr41xx_disable_kiuint);
244 244
245void vr41xx_enable_macint(uint16_t mask) 245void vr41xx_enable_macint(uint16_t mask)
246{ 246{
247 struct irq_desc *desc = irq_desc + ETHERNET_IRQ; 247 struct irq_desc *desc = irq_to_desc(ETHERNET_IRQ);
248 unsigned long flags; 248 unsigned long flags;
249 249
250 raw_spin_lock_irqsave(&desc->lock, flags); 250 raw_spin_lock_irqsave(&desc->lock, flags);
@@ -256,7 +256,7 @@ EXPORT_SYMBOL(vr41xx_enable_macint);
256 256
257void vr41xx_disable_macint(uint16_t mask) 257void vr41xx_disable_macint(uint16_t mask)
258{ 258{
259 struct irq_desc *desc = irq_desc + ETHERNET_IRQ; 259 struct irq_desc *desc = irq_to_desc(ETHERNET_IRQ);
260 unsigned long flags; 260 unsigned long flags;
261 261
262 raw_spin_lock_irqsave(&desc->lock, flags); 262 raw_spin_lock_irqsave(&desc->lock, flags);
@@ -268,7 +268,7 @@ EXPORT_SYMBOL(vr41xx_disable_macint);
268 268
269void vr41xx_enable_dsiuint(uint16_t mask) 269void vr41xx_enable_dsiuint(uint16_t mask)
270{ 270{
271 struct irq_desc *desc = irq_desc + DSIU_IRQ; 271 struct irq_desc *desc = irq_to_desc(DSIU_IRQ);
272 unsigned long flags; 272 unsigned long flags;
273 273
274 raw_spin_lock_irqsave(&desc->lock, flags); 274 raw_spin_lock_irqsave(&desc->lock, flags);
@@ -280,7 +280,7 @@ EXPORT_SYMBOL(vr41xx_enable_dsiuint);
280 280
281void vr41xx_disable_dsiuint(uint16_t mask) 281void vr41xx_disable_dsiuint(uint16_t mask)
282{ 282{
283 struct irq_desc *desc = irq_desc + DSIU_IRQ; 283 struct irq_desc *desc = irq_to_desc(DSIU_IRQ);
284 unsigned long flags; 284 unsigned long flags;
285 285
286 raw_spin_lock_irqsave(&desc->lock, flags); 286 raw_spin_lock_irqsave(&desc->lock, flags);
@@ -292,7 +292,7 @@ EXPORT_SYMBOL(vr41xx_disable_dsiuint);
292 292
293void vr41xx_enable_firint(uint16_t mask) 293void vr41xx_enable_firint(uint16_t mask)
294{ 294{
295 struct irq_desc *desc = irq_desc + FIR_IRQ; 295 struct irq_desc *desc = irq_to_desc(FIR_IRQ);
296 unsigned long flags; 296 unsigned long flags;
297 297
298 raw_spin_lock_irqsave(&desc->lock, flags); 298 raw_spin_lock_irqsave(&desc->lock, flags);
@@ -304,7 +304,7 @@ EXPORT_SYMBOL(vr41xx_enable_firint);
304 304
305void vr41xx_disable_firint(uint16_t mask) 305void vr41xx_disable_firint(uint16_t mask)
306{ 306{
307 struct irq_desc *desc = irq_desc + FIR_IRQ; 307 struct irq_desc *desc = irq_to_desc(FIR_IRQ);
308 unsigned long flags; 308 unsigned long flags;
309 309
310 raw_spin_lock_irqsave(&desc->lock, flags); 310 raw_spin_lock_irqsave(&desc->lock, flags);
@@ -316,7 +316,7 @@ EXPORT_SYMBOL(vr41xx_disable_firint);
316 316
317void vr41xx_enable_pciint(void) 317void vr41xx_enable_pciint(void)
318{ 318{
319 struct irq_desc *desc = irq_desc + PCI_IRQ; 319 struct irq_desc *desc = irq_to_desc(PCI_IRQ);
320 unsigned long flags; 320 unsigned long flags;
321 321
322 if (current_cpu_type() == CPU_VR4122 || 322 if (current_cpu_type() == CPU_VR4122 ||
@@ -332,7 +332,7 @@ EXPORT_SYMBOL(vr41xx_enable_pciint);
332 332
333void vr41xx_disable_pciint(void) 333void vr41xx_disable_pciint(void)
334{ 334{
335 struct irq_desc *desc = irq_desc + PCI_IRQ; 335 struct irq_desc *desc = irq_to_desc(PCI_IRQ);
336 unsigned long flags; 336 unsigned long flags;
337 337
338 if (current_cpu_type() == CPU_VR4122 || 338 if (current_cpu_type() == CPU_VR4122 ||
@@ -348,7 +348,7 @@ EXPORT_SYMBOL(vr41xx_disable_pciint);
348 348
349void vr41xx_enable_scuint(void) 349void vr41xx_enable_scuint(void)
350{ 350{
351 struct irq_desc *desc = irq_desc + SCU_IRQ; 351 struct irq_desc *desc = irq_to_desc(SCU_IRQ);
352 unsigned long flags; 352 unsigned long flags;
353 353
354 if (current_cpu_type() == CPU_VR4122 || 354 if (current_cpu_type() == CPU_VR4122 ||
@@ -364,7 +364,7 @@ EXPORT_SYMBOL(vr41xx_enable_scuint);
364 364
365void vr41xx_disable_scuint(void) 365void vr41xx_disable_scuint(void)
366{ 366{
367 struct irq_desc *desc = irq_desc + SCU_IRQ; 367 struct irq_desc *desc = irq_to_desc(SCU_IRQ);
368 unsigned long flags; 368 unsigned long flags;
369 369
370 if (current_cpu_type() == CPU_VR4122 || 370 if (current_cpu_type() == CPU_VR4122 ||
@@ -380,7 +380,7 @@ EXPORT_SYMBOL(vr41xx_disable_scuint);
380 380
381void vr41xx_enable_csiint(uint16_t mask) 381void vr41xx_enable_csiint(uint16_t mask)
382{ 382{
383 struct irq_desc *desc = irq_desc + CSI_IRQ; 383 struct irq_desc *desc = irq_to_desc(CSI_IRQ);
384 unsigned long flags; 384 unsigned long flags;
385 385
386 if (current_cpu_type() == CPU_VR4122 || 386 if (current_cpu_type() == CPU_VR4122 ||
@@ -396,7 +396,7 @@ EXPORT_SYMBOL(vr41xx_enable_csiint);
396 396
397void vr41xx_disable_csiint(uint16_t mask) 397void vr41xx_disable_csiint(uint16_t mask)
398{ 398{
399 struct irq_desc *desc = irq_desc + CSI_IRQ; 399 struct irq_desc *desc = irq_to_desc(CSI_IRQ);
400 unsigned long flags; 400 unsigned long flags;
401 401
402 if (current_cpu_type() == CPU_VR4122 || 402 if (current_cpu_type() == CPU_VR4122 ||
@@ -412,7 +412,7 @@ EXPORT_SYMBOL(vr41xx_disable_csiint);
412 412
413void vr41xx_enable_bcuint(void) 413void vr41xx_enable_bcuint(void)
414{ 414{
415 struct irq_desc *desc = irq_desc + BCU_IRQ; 415 struct irq_desc *desc = irq_to_desc(BCU_IRQ);
416 unsigned long flags; 416 unsigned long flags;
417 417
418 if (current_cpu_type() == CPU_VR4122 || 418 if (current_cpu_type() == CPU_VR4122 ||
@@ -428,7 +428,7 @@ EXPORT_SYMBOL(vr41xx_enable_bcuint);
428 428
429void vr41xx_disable_bcuint(void) 429void vr41xx_disable_bcuint(void)
430{ 430{
431 struct irq_desc *desc = irq_desc + BCU_IRQ; 431 struct irq_desc *desc = irq_to_desc(BCU_IRQ);
432 unsigned long flags; 432 unsigned long flags;
433 433
434 if (current_cpu_type() == CPU_VR4122 || 434 if (current_cpu_type() == CPU_VR4122 ||
@@ -442,45 +442,41 @@ void vr41xx_disable_bcuint(void)
442 442
443EXPORT_SYMBOL(vr41xx_disable_bcuint); 443EXPORT_SYMBOL(vr41xx_disable_bcuint);
444 444
445static void disable_sysint1_irq(unsigned int irq) 445static void disable_sysint1_irq(struct irq_data *d)
446{ 446{
447 icu1_clear(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); 447 icu1_clear(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(d->irq));
448} 448}
449 449
450static void enable_sysint1_irq(unsigned int irq) 450static void enable_sysint1_irq(struct irq_data *d)
451{ 451{
452 icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); 452 icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(d->irq));
453} 453}
454 454
455static struct irq_chip sysint1_irq_type = { 455static struct irq_chip sysint1_irq_type = {
456 .name = "SYSINT1", 456 .name = "SYSINT1",
457 .ack = disable_sysint1_irq, 457 .irq_mask = disable_sysint1_irq,
458 .mask = disable_sysint1_irq, 458 .irq_unmask = enable_sysint1_irq,
459 .mask_ack = disable_sysint1_irq,
460 .unmask = enable_sysint1_irq,
461}; 459};
462 460
463static void disable_sysint2_irq(unsigned int irq) 461static void disable_sysint2_irq(struct irq_data *d)
464{ 462{
465 icu2_clear(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); 463 icu2_clear(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(d->irq));
466} 464}
467 465
468static void enable_sysint2_irq(unsigned int irq) 466static void enable_sysint2_irq(struct irq_data *d)
469{ 467{
470 icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); 468 icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(d->irq));
471} 469}
472 470
473static struct irq_chip sysint2_irq_type = { 471static struct irq_chip sysint2_irq_type = {
474 .name = "SYSINT2", 472 .name = "SYSINT2",
475 .ack = disable_sysint2_irq, 473 .irq_mask = disable_sysint2_irq,
476 .mask = disable_sysint2_irq, 474 .irq_unmask = enable_sysint2_irq,
477 .mask_ack = disable_sysint2_irq,
478 .unmask = enable_sysint2_irq,
479}; 475};
480 476
481static inline int set_sysint1_assign(unsigned int irq, unsigned char assign) 477static inline int set_sysint1_assign(unsigned int irq, unsigned char assign)
482{ 478{
483 struct irq_desc *desc = irq_desc + irq; 479 struct irq_desc *desc = irq_to_desc(irq);
484 uint16_t intassign0, intassign1; 480 uint16_t intassign0, intassign1;
485 unsigned int pin; 481 unsigned int pin;
486 482
@@ -540,7 +536,7 @@ static inline int set_sysint1_assign(unsigned int irq, unsigned char assign)
540 536
541static inline int set_sysint2_assign(unsigned int irq, unsigned char assign) 537static inline int set_sysint2_assign(unsigned int irq, unsigned char assign)
542{ 538{
543 struct irq_desc *desc = irq_desc + irq; 539 struct irq_desc *desc = irq_to_desc(irq);
544 uint16_t intassign2, intassign3; 540 uint16_t intassign2, intassign3;
545 unsigned int pin; 541 unsigned int pin;
546 542
diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c
index 0975eb72d385..9ff7f397c0e1 100644
--- a/arch/mips/vr41xx/common/irq.c
+++ b/arch/mips/vr41xx/common/irq.c
@@ -62,7 +62,6 @@ EXPORT_SYMBOL_GPL(cascade_irq);
62static void irq_dispatch(unsigned int irq) 62static void irq_dispatch(unsigned int irq)
63{ 63{
64 irq_cascade_t *cascade; 64 irq_cascade_t *cascade;
65 struct irq_desc *desc;
66 65
67 if (irq >= NR_IRQS) { 66 if (irq >= NR_IRQS) {
68 atomic_inc(&irq_err_count); 67 atomic_inc(&irq_err_count);
@@ -71,14 +70,16 @@ static void irq_dispatch(unsigned int irq)
71 70
72 cascade = irq_cascade + irq; 71 cascade = irq_cascade + irq;
73 if (cascade->get_irq != NULL) { 72 if (cascade->get_irq != NULL) {
74 unsigned int source_irq = irq; 73 struct irq_desc *desc = irq_to_desc(irq);
74 struct irq_data *idata = irq_desc_get_irq_data(desc);
75 struct irq_chip *chip = irq_desc_get_chip(desc);
75 int ret; 76 int ret;
76 desc = irq_desc + source_irq; 77
77 if (desc->chip->mask_ack) 78 if (chip->irq_mask_ack)
78 desc->chip->mask_ack(source_irq); 79 chip->irq_mask_ack(idata);
79 else { 80 else {
80 desc->chip->mask(source_irq); 81 chip->irq_mask(idata);
81 desc->chip->ack(source_irq); 82 chip->irq_ack(idata);
82 } 83 }
83 ret = cascade->get_irq(irq); 84 ret = cascade->get_irq(irq);
84 irq = ret; 85 irq = ret;
@@ -86,8 +87,8 @@ static void irq_dispatch(unsigned int irq)
86 atomic_inc(&irq_err_count); 87 atomic_inc(&irq_err_count);
87 else 88 else
88 irq_dispatch(irq); 89 irq_dispatch(irq);
89 if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) 90 if (!(desc->status & IRQ_DISABLED) && chip->irq_unmask)
90 desc->chip->unmask(source_irq); 91 chip->irq_unmask(idata);
91 } else 92 } else
92 do_IRQ(irq); 93 do_IRQ(irq);
93} 94}
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig
index 10971be43061..d8ab97a73db2 100644
--- a/arch/mn10300/Kconfig
+++ b/arch/mn10300/Kconfig
@@ -3,6 +3,8 @@ config MN10300
3 select HAVE_OPROFILE 3 select HAVE_OPROFILE
4 select HAVE_GENERIC_HARDIRQS 4 select HAVE_GENERIC_HARDIRQS
5 select GENERIC_HARDIRQS_NO_DEPRECATED 5 select GENERIC_HARDIRQS_NO_DEPRECATED
6 select HAVE_ARCH_TRACEHOOK
7 select HAVE_ARCH_KGDB
6 8
7config AM33_2 9config AM33_2
8 def_bool n 10 def_bool n
@@ -401,9 +403,9 @@ comment "[!] NOTE: A lower number/level indicates a higher priority (0 is highes
401comment "____Non-maskable interrupt levels____" 403comment "____Non-maskable interrupt levels____"
402comment "The following must be set to a higher priority than local_irq_disable() and on-chip serial" 404comment "The following must be set to a higher priority than local_irq_disable() and on-chip serial"
403 405
404config GDBSTUB_IRQ_LEVEL 406config DEBUGGER_IRQ_LEVEL
405 int "GDBSTUB interrupt priority" 407 int "DEBUGGER interrupt priority"
406 depends on GDBSTUB 408 depends on KERNEL_DEBUGGER
407 range 0 1 if LINUX_CLI_LEVEL = 2 409 range 0 1 if LINUX_CLI_LEVEL = 2
408 range 0 2 if LINUX_CLI_LEVEL = 3 410 range 0 2 if LINUX_CLI_LEVEL = 3
409 range 0 3 if LINUX_CLI_LEVEL = 4 411 range 0 3 if LINUX_CLI_LEVEL = 4
@@ -437,7 +439,7 @@ config LINUX_CLI_LEVEL
437 EPSW.IM from 7. Any interrupt is permitted for which the level is 439 EPSW.IM from 7. Any interrupt is permitted for which the level is
438 lower than EPSW.IM. 440 lower than EPSW.IM.
439 441
440 Certain interrupts, such as GDBSTUB and virtual MN10300 on-chip 442 Certain interrupts, such as DEBUGGER and virtual MN10300 on-chip
441 serial DMA interrupts are allowed to interrupt normal disabled 443 serial DMA interrupts are allowed to interrupt normal disabled
442 sections. 444 sections.
443 445
diff --git a/arch/mn10300/Kconfig.debug b/arch/mn10300/Kconfig.debug
index ce83c74b3fd7..bdbfd444a9ff 100644
--- a/arch/mn10300/Kconfig.debug
+++ b/arch/mn10300/Kconfig.debug
@@ -36,7 +36,7 @@ config KPROBES
36 36
37config GDBSTUB 37config GDBSTUB
38 bool "Remote GDB kernel debugging" 38 bool "Remote GDB kernel debugging"
39 depends on DEBUG_KERNEL 39 depends on DEBUG_KERNEL && DEPRECATED
40 select DEBUG_INFO 40 select DEBUG_INFO
41 select FRAME_POINTER 41 select FRAME_POINTER
42 help 42 help
@@ -46,6 +46,9 @@ config GDBSTUB
46 RAM to avoid excessive linking time. This is only useful for kernel 46 RAM to avoid excessive linking time. This is only useful for kernel
47 hackers. If unsure, say N. 47 hackers. If unsure, say N.
48 48
49 This is deprecated in favour of KGDB and will be removed in a later
50 version.
51
49config GDBSTUB_IMMEDIATE 52config GDBSTUB_IMMEDIATE
50 bool "Break into GDB stub immediately" 53 bool "Break into GDB stub immediately"
51 depends on GDBSTUB 54 depends on GDBSTUB
@@ -54,6 +57,14 @@ config GDBSTUB_IMMEDIATE
54 possible, leaving the program counter at the beginning of 57 possible, leaving the program counter at the beginning of
55 start_kernel() in init/main.c. 58 start_kernel() in init/main.c.
56 59
60config GDBSTUB_ALLOW_SINGLE_STEP
61 bool "Allow software single-stepping in GDB stub"
62 depends on GDBSTUB && !SMP && !PREEMPT
63 help
64 Allow GDB stub to perform software single-stepping through the
65 kernel. This doesn't work very well on SMP or preemptible kernels as
66 it uses temporary breakpoints to emulate single-stepping.
67
57config GDB_CONSOLE 68config GDB_CONSOLE
58 bool "Console output to GDB" 69 bool "Console output to GDB"
59 depends on GDBSTUB 70 depends on GDBSTUB
@@ -142,3 +153,7 @@ config GDBSTUB_ON_TTYSx
142 default y 153 default y
143 154
144endmenu 155endmenu
156
157config KERNEL_DEBUGGER
158 def_bool y
159 depends on GDBSTUB || KGDB
diff --git a/arch/mn10300/include/asm/bitops.h b/arch/mn10300/include/asm/bitops.h
index 3b8a868188f5..0939462967e3 100644
--- a/arch/mn10300/include/asm/bitops.h
+++ b/arch/mn10300/include/asm/bitops.h
@@ -233,8 +233,7 @@ int ffs(int x)
233#define ext2_clear_bit_atomic(lock, nr, addr) \ 233#define ext2_clear_bit_atomic(lock, nr, addr) \
234 test_and_clear_bit((nr), (addr)) 234 test_and_clear_bit((nr), (addr))
235 235
236#include <asm-generic/bitops/ext2-non-atomic.h> 236#include <asm-generic/bitops/le.h>
237#include <asm-generic/bitops/minix-le.h>
238 237
239#endif /* __KERNEL__ */ 238#endif /* __KERNEL__ */
240#endif /* __ASM_BITOPS_H */ 239#endif /* __ASM_BITOPS_H */
diff --git a/arch/mn10300/include/asm/debugger.h b/arch/mn10300/include/asm/debugger.h
new file mode 100644
index 000000000000..e1d3b083696c
--- /dev/null
+++ b/arch/mn10300/include/asm/debugger.h
@@ -0,0 +1,43 @@
1/* Kernel debugger for MN10300
2 *
3 * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_DEBUGGER_H
13#define _ASM_DEBUGGER_H
14
15#if defined(CONFIG_KERNEL_DEBUGGER)
16
17extern int debugger_intercept(enum exception_code, int, int, struct pt_regs *);
18extern int at_debugger_breakpoint(struct pt_regs *);
19
20#ifndef CONFIG_MN10300_DEBUGGER_CACHE_NO_FLUSH
21extern void debugger_local_cache_flushinv(void);
22extern void debugger_local_cache_flushinv_one(u8 *);
23#else
24static inline void debugger_local_cache_flushinv(void) {}
25static inline void debugger_local_cache_flushinv_one(u8 *addr) {}
26#endif
27
28#else /* CONFIG_KERNEL_DEBUGGER */
29
30static inline int debugger_intercept(enum exception_code excep,
31 int signo, int si_code,
32 struct pt_regs *regs)
33{
34 return 0;
35}
36
37static inline int at_debugger_breakpoint(struct pt_regs *regs)
38{
39 return 0;
40}
41
42#endif /* CONFIG_KERNEL_DEBUGGER */
43#endif /* _ASM_DEBUGGER_H */
diff --git a/arch/mn10300/include/asm/div64.h b/arch/mn10300/include/asm/div64.h
index 34dcb8e68309..503efab2a516 100644
--- a/arch/mn10300/include/asm/div64.h
+++ b/arch/mn10300/include/asm/div64.h
@@ -16,6 +16,19 @@
16extern void ____unhandled_size_in_do_div___(void); 16extern void ____unhandled_size_in_do_div___(void);
17 17
18/* 18/*
19 * Beginning with gcc 4.6, the MDR register is represented explicitly. We
20 * must, therefore, at least explicitly clobber the register when we make
21 * changes to it. The following assembly fragments *could* be rearranged in
22 * order to leave the moves to/from the MDR register to the compiler, but the
23 * gains would be minimal at best.
24 */
25#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 6)
26# define CLOBBER_MDR_CC "mdr", "cc"
27#else
28# define CLOBBER_MDR_CC "cc"
29#endif
30
31/*
19 * divide n by base, leaving the result in n and returning the remainder 32 * divide n by base, leaving the result in n and returning the remainder
20 * - we can do this quite efficiently on the MN10300 by cascading the divides 33 * - we can do this quite efficiently on the MN10300 by cascading the divides
21 * through the MDR register 34 * through the MDR register
@@ -29,7 +42,7 @@ extern void ____unhandled_size_in_do_div___(void);
29 "mov mdr,%1 \n" \ 42 "mov mdr,%1 \n" \
30 : "+r"(n), "=d"(__rem) \ 43 : "+r"(n), "=d"(__rem) \
31 : "r"(base), "1"(__rem) \ 44 : "r"(base), "1"(__rem) \
32 : "cc" \ 45 : CLOBBER_MDR_CC \
33 ); \ 46 ); \
34 } else if (sizeof(n) <= 8) { \ 47 } else if (sizeof(n) <= 8) { \
35 union { \ 48 union { \
@@ -48,7 +61,7 @@ extern void ____unhandled_size_in_do_div___(void);
48 : "=d"(__rem), "=r"(__quot.w[1]), "=r"(__quot.w[0]) \ 61 : "=d"(__rem), "=r"(__quot.w[1]), "=r"(__quot.w[0]) \
49 : "r"(base), "0"(__rem), "1"(__quot.w[1]), \ 62 : "r"(base), "0"(__rem), "1"(__quot.w[1]), \
50 "2"(__quot.w[0]) \ 63 "2"(__quot.w[0]) \
51 : "cc" \ 64 : CLOBBER_MDR_CC \
52 ); \ 65 ); \
53 n = __quot.l; \ 66 n = __quot.l; \
54 } else { \ 67 } else { \
@@ -72,7 +85,7 @@ unsigned __muldiv64u(unsigned val, unsigned mult, unsigned div)
72 * MDR = MDR:val%div */ 85 * MDR = MDR:val%div */
73 : "=r"(result) 86 : "=r"(result)
74 : "0"(val), "ir"(mult), "r"(div) 87 : "0"(val), "ir"(mult), "r"(div)
75 : "cc" 88 : CLOBBER_MDR_CC
76 ); 89 );
77 90
78 return result; 91 return result;
@@ -93,7 +106,7 @@ signed __muldiv64s(signed val, signed mult, signed div)
93 * MDR = MDR:val%div */ 106 * MDR = MDR:val%div */
94 : "=r"(result) 107 : "=r"(result)
95 : "0"(val), "ir"(mult), "r"(div) 108 : "0"(val), "ir"(mult), "r"(div)
96 : "cc" 109 : CLOBBER_MDR_CC
97 ); 110 );
98 111
99 return result; 112 return result;
diff --git a/arch/mn10300/include/asm/fpu.h b/arch/mn10300/include/asm/fpu.h
index b7625de8eade..738ff72659d5 100644
--- a/arch/mn10300/include/asm/fpu.h
+++ b/arch/mn10300/include/asm/fpu.h
@@ -55,7 +55,6 @@ static inline void clear_using_fpu(struct task_struct *tsk)
55 55
56extern asmlinkage void fpu_kill_state(struct task_struct *); 56extern asmlinkage void fpu_kill_state(struct task_struct *);
57extern asmlinkage void fpu_exception(struct pt_regs *, enum exception_code); 57extern asmlinkage void fpu_exception(struct pt_regs *, enum exception_code);
58extern asmlinkage void fpu_invalid_op(struct pt_regs *, enum exception_code);
59extern asmlinkage void fpu_init_state(void); 58extern asmlinkage void fpu_init_state(void);
60extern asmlinkage void fpu_save(struct fpu_state_struct *); 59extern asmlinkage void fpu_save(struct fpu_state_struct *);
61extern int fpu_setup_sigcontext(struct fpucontext *buf); 60extern int fpu_setup_sigcontext(struct fpucontext *buf);
@@ -113,7 +112,6 @@ static inline void flush_fpu(void)
113 112
114extern asmlinkage 113extern asmlinkage
115void unexpected_fpu_exception(struct pt_regs *, enum exception_code); 114void unexpected_fpu_exception(struct pt_regs *, enum exception_code);
116#define fpu_invalid_op unexpected_fpu_exception
117#define fpu_exception unexpected_fpu_exception 115#define fpu_exception unexpected_fpu_exception
118 116
119struct task_struct; 117struct task_struct;
diff --git a/arch/mn10300/include/asm/irqflags.h b/arch/mn10300/include/asm/irqflags.h
index 7a7ae12c7119..678f68d5f37b 100644
--- a/arch/mn10300/include/asm/irqflags.h
+++ b/arch/mn10300/include/asm/irqflags.h
@@ -20,7 +20,7 @@
20/* 20/*
21 * interrupt control 21 * interrupt control
22 * - "disabled": run in IM1/2 22 * - "disabled": run in IM1/2
23 * - level 0 - GDB stub 23 * - level 0 - kernel debugger
24 * - level 1 - virtual serial DMA (if present) 24 * - level 1 - virtual serial DMA (if present)
25 * - level 5 - normal interrupt priority 25 * - level 5 - normal interrupt priority
26 * - level 6 - timer interrupt 26 * - level 6 - timer interrupt
diff --git a/arch/mn10300/include/asm/kgdb.h b/arch/mn10300/include/asm/kgdb.h
new file mode 100644
index 000000000000..eb245f18a708
--- /dev/null
+++ b/arch/mn10300/include/asm/kgdb.h
@@ -0,0 +1,81 @@
1/* Kernel debugger for MN10300
2 *
3 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_KGDB_H
13#define _ASM_KGDB_H
14
15/*
16 * BUFMAX defines the maximum number of characters in inbound/outbound
17 * buffers at least NUMREGBYTES*2 are needed for register packets
18 * Longer buffer is needed to list all threads
19 */
20#define BUFMAX 1024
21
22/*
23 * Note that this register image is in a different order than the register
24 * image that Linux produces at interrupt time.
25 */
26enum regnames {
27 GDB_FR_D0 = 0,
28 GDB_FR_D1 = 1,
29 GDB_FR_D2 = 2,
30 GDB_FR_D3 = 3,
31 GDB_FR_A0 = 4,
32 GDB_FR_A1 = 5,
33 GDB_FR_A2 = 6,
34 GDB_FR_A3 = 7,
35
36 GDB_FR_SP = 8,
37 GDB_FR_PC = 9,
38 GDB_FR_MDR = 10,
39 GDB_FR_EPSW = 11,
40 GDB_FR_LIR = 12,
41 GDB_FR_LAR = 13,
42 GDB_FR_MDRQ = 14,
43
44 GDB_FR_E0 = 15,
45 GDB_FR_E1 = 16,
46 GDB_FR_E2 = 17,
47 GDB_FR_E3 = 18,
48 GDB_FR_E4 = 19,
49 GDB_FR_E5 = 20,
50 GDB_FR_E6 = 21,
51 GDB_FR_E7 = 22,
52
53 GDB_FR_SSP = 23,
54 GDB_FR_MSP = 24,
55 GDB_FR_USP = 25,
56 GDB_FR_MCRH = 26,
57 GDB_FR_MCRL = 27,
58 GDB_FR_MCVF = 28,
59
60 GDB_FR_FPCR = 29,
61 GDB_FR_DUMMY0 = 30,
62 GDB_FR_DUMMY1 = 31,
63
64 GDB_FR_FS0 = 32,
65
66 GDB_FR_SIZE = 64,
67};
68
69#define GDB_ORIG_D0 41
70#define NUMREGBYTES (GDB_FR_SIZE*4)
71
72static inline void arch_kgdb_breakpoint(void)
73{
74 asm(".globl __arch_kgdb_breakpoint; __arch_kgdb_breakpoint: break");
75}
76extern u8 __arch_kgdb_breakpoint;
77
78#define BREAK_INSTR_SIZE 1
79#define CACHE_FLUSH_IS_SAFE 1
80
81#endif /* _ASM_KGDB_H */
diff --git a/arch/mn10300/include/asm/smp.h b/arch/mn10300/include/asm/smp.h
index a3930e43a958..6745dbe64944 100644
--- a/arch/mn10300/include/asm/smp.h
+++ b/arch/mn10300/include/asm/smp.h
@@ -34,7 +34,7 @@
34#define LOCAL_TIMER_IPI 193 34#define LOCAL_TIMER_IPI 193
35#define FLUSH_CACHE_IPI 194 35#define FLUSH_CACHE_IPI 194
36#define CALL_FUNCTION_NMI_IPI 195 36#define CALL_FUNCTION_NMI_IPI 195
37#define GDB_NMI_IPI 196 37#define DEBUGGER_NMI_IPI 196
38 38
39#define SMP_BOOT_IRQ 195 39#define SMP_BOOT_IRQ 195
40 40
@@ -43,6 +43,7 @@
43#define LOCAL_TIMER_GxICR_LV GxICR_LEVEL_4 43#define LOCAL_TIMER_GxICR_LV GxICR_LEVEL_4
44#define FLUSH_CACHE_GxICR_LV GxICR_LEVEL_0 44#define FLUSH_CACHE_GxICR_LV GxICR_LEVEL_0
45#define SMP_BOOT_GxICR_LV GxICR_LEVEL_0 45#define SMP_BOOT_GxICR_LV GxICR_LEVEL_0
46#define DEBUGGER_GxICR_LV CONFIG_DEBUGGER_IRQ_LEVEL
46 47
47#define TIME_OUT_COUNT_BOOT_IPI 100 48#define TIME_OUT_COUNT_BOOT_IPI 100
48#define DELAY_TIME_BOOT_IPI 75000 49#define DELAY_TIME_BOOT_IPI 75000
@@ -61,8 +62,9 @@
61 * An alternate way of dealing with this could be to use the EPSW.S bits to 62 * An alternate way of dealing with this could be to use the EPSW.S bits to
62 * cache this information for systems with up to four CPUs. 63 * cache this information for systems with up to four CPUs.
63 */ 64 */
65#define arch_smp_processor_id() (CPUID)
64#if 0 66#if 0
65#define raw_smp_processor_id() (CPUID) 67#define raw_smp_processor_id() (arch_smp_processor_id())
66#else 68#else
67#define raw_smp_processor_id() (current_thread_info()->cpu) 69#define raw_smp_processor_id() (current_thread_info()->cpu)
68#endif 70#endif
diff --git a/arch/mn10300/include/asm/thread_info.h b/arch/mn10300/include/asm/thread_info.h
index 8d53f09c878d..87c213002d4c 100644
--- a/arch/mn10300/include/asm/thread_info.h
+++ b/arch/mn10300/include/asm/thread_info.h
@@ -131,7 +131,11 @@ static inline unsigned long current_stack_pointer(void)
131 kmalloc_node(THREAD_SIZE, GFP_KERNEL, node) 131 kmalloc_node(THREAD_SIZE, GFP_KERNEL, node)
132#endif 132#endif
133 133
134#ifndef CONFIG_KGDB
134#define free_thread_info(ti) kfree((ti)) 135#define free_thread_info(ti) kfree((ti))
136#else
137extern void free_thread_info(struct thread_info *);
138#endif
135#define get_thread_info(ti) get_task_struct((ti)->task) 139#define get_thread_info(ti) get_task_struct((ti)->task)
136#define put_thread_info(ti) put_task_struct((ti)->task) 140#define put_thread_info(ti) put_task_struct((ti)->task)
137 141
diff --git a/arch/mn10300/kernel/Makefile b/arch/mn10300/kernel/Makefile
index a06a2e10051d..47ed30fe8178 100644
--- a/arch/mn10300/kernel/Makefile
+++ b/arch/mn10300/kernel/Makefile
@@ -21,11 +21,8 @@ obj-$(CONFIG_GDBSTUB) += gdb-stub.o gdb-low.o
21obj-$(CONFIG_GDBSTUB_ON_TTYSx) += gdb-io-serial.o gdb-io-serial-low.o 21obj-$(CONFIG_GDBSTUB_ON_TTYSx) += gdb-io-serial.o gdb-io-serial-low.o
22obj-$(CONFIG_GDBSTUB_ON_TTYSMx) += gdb-io-ttysm.o gdb-io-ttysm-low.o 22obj-$(CONFIG_GDBSTUB_ON_TTYSMx) += gdb-io-ttysm.o gdb-io-ttysm-low.o
23 23
24ifeq ($(CONFIG_MN10300_CACHE_ENABLED),y)
25obj-$(CONFIG_GDBSTUB) += gdb-cache.o
26endif
27
28obj-$(CONFIG_MN10300_RTC) += rtc.o 24obj-$(CONFIG_MN10300_RTC) += rtc.o
29obj-$(CONFIG_PROFILE) += profile.o profile-low.o 25obj-$(CONFIG_PROFILE) += profile.o profile-low.o
30obj-$(CONFIG_MODULES) += module.o 26obj-$(CONFIG_MODULES) += module.o
31obj-$(CONFIG_KPROBES) += kprobes.o 27obj-$(CONFIG_KPROBES) += kprobes.o
28obj-$(CONFIG_KGDB) += kgdb.o
diff --git a/arch/mn10300/kernel/entry.S b/arch/mn10300/kernel/entry.S
index f00b9bafcd3e..fb93ad720b82 100644
--- a/arch/mn10300/kernel/entry.S
+++ b/arch/mn10300/kernel/entry.S
@@ -266,7 +266,11 @@ ENTRY(raw_bus_error)
266 266
267############################################################################### 267###############################################################################
268# 268#
269# Miscellaneous exception entry points 269# NMI exception entry points
270#
271# This is used by ordinary interrupt channels that have the GxICR_NMI bit set
272# in addition to the main NMI and Watchdog channels. SMP NMI IPIs use this
273# facility.
270# 274#
271############################################################################### 275###############################################################################
272ENTRY(nmi_handler) 276ENTRY(nmi_handler)
@@ -281,7 +285,7 @@ ENTRY(nmi_handler)
281 and NMIAGR_GN,d0 285 and NMIAGR_GN,d0
282 lsr 0x2,d0 286 lsr 0x2,d0
283 cmp CALL_FUNCTION_NMI_IPI,d0 287 cmp CALL_FUNCTION_NMI_IPI,d0
284 bne 5f # if not call function, jump 288 bne nmi_not_smp_callfunc # if not call function, jump
285 289
286 # function call nmi ipi 290 # function call nmi ipi
287 add 4,sp # no need to store TBR 291 add 4,sp # no need to store TBR
@@ -295,59 +299,38 @@ ENTRY(nmi_handler)
295 call smp_nmi_call_function_interrupt[],0 299 call smp_nmi_call_function_interrupt[],0
296 RESTORE_ALL 300 RESTORE_ALL
297 301
2985: 302nmi_not_smp_callfunc:
299#ifdef CONFIG_GDBSTUB 303#ifdef CONFIG_KERNEL_DEBUGGER
300 cmp GDB_NMI_IPI,d0 304 cmp DEBUGGER_NMI_IPI,d0
301 bne 3f # if not gdb nmi ipi, jump 305 bne nmi_not_debugger # if not kernel debugger NMI IPI, jump
302 306
303 # gdb nmi ipi 307 # kernel debugger NMI IPI
304 add 4,sp # no need to store TBR 308 add 4,sp # no need to store TBR
305 mov GxICR_DETECT,d0 # clear NMI 309 mov GxICR_DETECT,d0 # clear NMI
306 movbu d0,(GxICR(GDB_NMI_IPI)) 310 movbu d0,(GxICR(DEBUGGER_NMI_IPI))
307 movhu (GxICR(GDB_NMI_IPI)),d0 311 movhu (GxICR(DEBUGGER_NMI_IPI)),d0
308 and ~EPSW_NMID,epsw # enable NMI 312 and ~EPSW_NMID,epsw # enable NMI
309#ifdef CONFIG_MN10300_CACHE_ENABLED 313
310 mov (gdbstub_nmi_opr_type),d0
311 cmp GDBSTUB_NMI_CACHE_PURGE,d0
312 bne 4f # if not gdb cache purge, jump
313
314 # gdb cache purge nmi ipi
315 add -20,sp
316 mov d1,(4,sp)
317 mov a0,(8,sp)
318 mov a1,(12,sp)
319 mov mdr,d0
320 mov d0,(16,sp)
321 call gdbstub_local_purge_cache[],0
322 mov 0x1,d0
323 mov (CPUID),d1
324 asl d1,d0
325 mov gdbstub_nmi_cpumask,a0
326 bclr d0,(a0)
327 mov (4,sp),d1
328 mov (8,sp),a0
329 mov (12,sp),a1
330 mov (16,sp),d0
331 mov d0,mdr
332 add 20,sp
333 mov (sp),d0
334 add 4,sp
335 rti
3364:
337#endif /* CONFIG_MN10300_CACHE_ENABLED */
338 # gdb wait nmi ipi
339 mov (sp),d0 314 mov (sp),d0
340 SAVE_ALL 315 SAVE_ALL
341 call gdbstub_nmi_wait[],0 316 mov fp,d0 # arg 0: stacked register file
317 mov a2,d1 # arg 1: exception number
318 call debugger_nmi_interrupt[],0
342 RESTORE_ALL 319 RESTORE_ALL
3433: 320
344#endif /* CONFIG_GDBSTUB */ 321nmi_not_debugger:
322#endif /* CONFIG_KERNEL_DEBUGGER */
345 mov (sp),d0 # restore TBR to d0 323 mov (sp),d0 # restore TBR to d0
346 add 4,sp 324 add 4,sp
347#endif /* CONFIG_SMP */ 325#endif /* CONFIG_SMP */
348 326
349 bra __common_exception_nonmi 327 bra __common_exception_nonmi
350 328
329###############################################################################
330#
331# General exception entry point
332#
333###############################################################################
351ENTRY(__common_exception) 334ENTRY(__common_exception)
352 add -4,sp 335 add -4,sp
353 mov d0,(sp) 336 mov d0,(sp)
diff --git a/arch/mn10300/kernel/fpu.c b/arch/mn10300/kernel/fpu.c
index 5f9c3fa19a85..bb5fa7df6c44 100644
--- a/arch/mn10300/kernel/fpu.c
+++ b/arch/mn10300/kernel/fpu.c
@@ -70,24 +70,6 @@ asmlinkage void fpu_exception(struct pt_regs *regs, enum exception_code code)
70} 70}
71 71
72/* 72/*
73 * handle an FPU invalid_op exception
74 * - Derived from DO_EINFO() macro in arch/mn10300/kernel/traps.c
75 */
76asmlinkage void fpu_invalid_op(struct pt_regs *regs, enum exception_code code)
77{
78 siginfo_t info;
79
80 if (!user_mode(regs))
81 die_if_no_fixup("FPU invalid opcode", regs, code);
82
83 info.si_signo = SIGILL;
84 info.si_errno = 0;
85 info.si_code = ILL_COPROC;
86 info.si_addr = (void *) regs->pc;
87 force_sig_info(info.si_signo, &info, current);
88}
89
90/*
91 * save the FPU state to a signal context 73 * save the FPU state to a signal context
92 */ 74 */
93int fpu_setup_sigcontext(struct fpucontext *fpucontext) 75int fpu_setup_sigcontext(struct fpucontext *fpucontext)
diff --git a/arch/mn10300/kernel/gdb-cache.S b/arch/mn10300/kernel/gdb-cache.S
deleted file mode 100644
index 1108badc3d32..000000000000
--- a/arch/mn10300/kernel/gdb-cache.S
+++ /dev/null
@@ -1,105 +0,0 @@
1###############################################################################
2#
3# MN10300 Low-level cache purging routines for gdbstub
4#
5# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6# Written by David Howells (dhowells@redhat.com)
7#
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public Licence
10# as published by the Free Software Foundation; either version
11# 2 of the Licence, or (at your option) any later version.
12#
13###############################################################################
14#include <linux/sys.h>
15#include <linux/linkage.h>
16#include <asm/smp.h>
17#include <asm/cache.h>
18#include <asm/cpu-regs.h>
19#include <asm/exceptions.h>
20#include <asm/frame.inc>
21#include <asm/serial-regs.h>
22
23 .text
24
25###############################################################################
26#
27# GDB stub cache purge
28#
29###############################################################################
30 .type gdbstub_purge_cache,@function
31ENTRY(gdbstub_purge_cache)
32 #######################################################################
33 # read the addresses tagged in the cache's tag RAM and attempt to flush
34 # those addresses specifically
35 # - we rely on the hardware to filter out invalid tag entry addresses
36 mov DCACHE_TAG(0,0),a0 # dcache tag RAM access address
37 mov DCACHE_PURGE(0,0),a1 # dcache purge request address
38 mov L1_CACHE_NWAYS*L1_CACHE_NENTRIES,d1 # total number of entries
39
40mn10300_dcache_flush_loop:
41 mov (a0),d0
42 and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d0
43 or L1_CACHE_TAG_VALID,d0 # retain valid entries in the
44 # cache
45 mov d0,(a1) # conditional purge
46
47mn10300_dcache_flush_skip:
48 add L1_CACHE_BYTES,a0
49 add L1_CACHE_BYTES,a1
50 add -1,d1
51 bne mn10300_dcache_flush_loop
52
53;; # unconditionally flush and invalidate the dcache
54;; mov DCACHE_PURGE(0,0),a1 # dcache purge request address
55;; mov L1_CACHE_NWAYS*L1_CACHE_NENTRIES,d1 # total number of
56;; # entries
57;;
58;; gdbstub_purge_cache__dcache_loop:
59;; mov (a1),d0 # unconditional purge
60;;
61;; add L1_CACHE_BYTES,a1
62;; add -1,d1
63;; bne gdbstub_purge_cache__dcache_loop
64
65 #######################################################################
66 # now invalidate the icache
67 mov CHCTR,a0
68 movhu (a0),a1
69
70 mov epsw,d1
71 and ~EPSW_IE,epsw
72 nop
73 nop
74
75 # disable the icache
76 and ~CHCTR_ICEN,d0
77 movhu d0,(a0)
78
79 # and wait for it to calm down
80 setlb
81 movhu (a0),d0
82 btst CHCTR_ICBUSY,d0
83 lne
84
85 # invalidate
86 or CHCTR_ICINV,d0
87 movhu d0,(a0)
88
89 # wait for the cache to finish
90 mov CHCTR,a0
91 setlb
92 movhu (a0),d0
93 btst CHCTR_ICBUSY,d0
94 lne
95
96 # and reenable it
97 movhu a1,(a0)
98 movhu (a0),d0 # read back to flush
99 # (SIGILLs all over without this)
100
101 mov d1,epsw
102
103 ret [],0
104
105 .size gdbstub_purge_cache,.-gdbstub_purge_cache
diff --git a/arch/mn10300/kernel/gdb-io-ttysm.c b/arch/mn10300/kernel/gdb-io-ttysm.c
index abdeea153c89..c859cacbb9c3 100644
--- a/arch/mn10300/kernel/gdb-io-ttysm.c
+++ b/arch/mn10300/kernel/gdb-io-ttysm.c
@@ -59,10 +59,10 @@ void __init gdbstub_io_init(void)
59 59
60 /* we want to get serial receive interrupts */ 60 /* we want to get serial receive interrupts */
61 set_intr_level(gdbstub_port->rx_irq, 61 set_intr_level(gdbstub_port->rx_irq,
62 NUM2GxICR_LEVEL(CONFIG_GDBSTUB_IRQ_LEVEL)); 62 NUM2GxICR_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL));
63 set_intr_level(gdbstub_port->tx_irq, 63 set_intr_level(gdbstub_port->tx_irq,
64 NUM2GxICR_LEVEL(CONFIG_GDBSTUB_IRQ_LEVEL)); 64 NUM2GxICR_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL));
65 set_intr_stub(NUM2EXCEP_IRQ_LEVEL(CONFIG_GDBSTUB_IRQ_LEVEL), 65 set_intr_stub(NUM2EXCEP_IRQ_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL),
66 gdbstub_io_rx_handler); 66 gdbstub_io_rx_handler);
67 67
68 *gdbstub_port->rx_icr |= GxICR_ENABLE; 68 *gdbstub_port->rx_icr |= GxICR_ENABLE;
@@ -88,7 +88,7 @@ void __init gdbstub_io_init(void)
88 88
89 /* permit level 0 IRQs only */ 89 /* permit level 0 IRQs only */
90 arch_local_change_intr_mask_level( 90 arch_local_change_intr_mask_level(
91 NUM2EPSW_IM(CONFIG_GDBSTUB_IRQ_LEVEL + 1)); 91 NUM2EPSW_IM(CONFIG_DEBUGGER_IRQ_LEVEL + 1));
92} 92}
93 93
94/* 94/*
diff --git a/arch/mn10300/kernel/gdb-stub.c b/arch/mn10300/kernel/gdb-stub.c
index b169d99d9f20..538266b2c9bc 100644
--- a/arch/mn10300/kernel/gdb-stub.c
+++ b/arch/mn10300/kernel/gdb-stub.c
@@ -133,7 +133,7 @@
133#include <asm/system.h> 133#include <asm/system.h>
134#include <asm/gdb-stub.h> 134#include <asm/gdb-stub.h>
135#include <asm/exceptions.h> 135#include <asm/exceptions.h>
136#include <asm/cacheflush.h> 136#include <asm/debugger.h>
137#include <asm/serial-regs.h> 137#include <asm/serial-regs.h>
138#include <asm/busctl-regs.h> 138#include <asm/busctl-regs.h>
139#include <unit/leds.h> 139#include <unit/leds.h>
@@ -405,6 +405,7 @@ static int hexToInt(char **ptr, int *intValue)
405 return (numChars); 405 return (numChars);
406} 406}
407 407
408#ifdef CONFIG_GDBSTUB_ALLOW_SINGLE_STEP
408/* 409/*
409 * We single-step by setting breakpoints. When an exception 410 * We single-step by setting breakpoints. When an exception
410 * is handled, we need to restore the instructions hoisted 411 * is handled, we need to restore the instructions hoisted
@@ -729,6 +730,7 @@ static int gdbstub_single_step(struct pt_regs *regs)
729 __gdbstub_restore_bp(); 730 __gdbstub_restore_bp();
730 return -EFAULT; 731 return -EFAULT;
731} 732}
733#endif /* CONFIG_GDBSTUB_ALLOW_SINGLE_STEP */
732 734
733#ifdef CONFIG_GDBSTUB_CONSOLE 735#ifdef CONFIG_GDBSTUB_CONSOLE
734 736
@@ -1171,7 +1173,7 @@ int gdbstub_clear_breakpoint(u8 *addr, int len)
1171 1173
1172/* 1174/*
1173 * This function does all command processing for interfacing to gdb 1175 * This function does all command processing for interfacing to gdb
1174 * - returns 1 if the exception should be skipped, 0 otherwise. 1176 * - returns 0 if the exception should be skipped, -ERROR otherwise.
1175 */ 1177 */
1176static int gdbstub(struct pt_regs *regs, enum exception_code excep) 1178static int gdbstub(struct pt_regs *regs, enum exception_code excep)
1177{ 1179{
@@ -1186,7 +1188,7 @@ static int gdbstub(struct pt_regs *regs, enum exception_code excep)
1186 int loop; 1188 int loop;
1187 1189
1188 if (excep == EXCEP_FPU_DISABLED) 1190 if (excep == EXCEP_FPU_DISABLED)
1189 return 0; 1191 return -ENOTSUPP;
1190 1192
1191 gdbstub_flush_caches = 0; 1193 gdbstub_flush_caches = 0;
1192 1194
@@ -1195,7 +1197,7 @@ static int gdbstub(struct pt_regs *regs, enum exception_code excep)
1195 asm volatile("mov mdr,%0" : "=d"(mdr)); 1197 asm volatile("mov mdr,%0" : "=d"(mdr));
1196 local_save_flags(epsw); 1198 local_save_flags(epsw);
1197 arch_local_change_intr_mask_level( 1199 arch_local_change_intr_mask_level(
1198 NUM2EPSW_IM(CONFIG_GDBSTUB_IRQ_LEVEL + 1)); 1200 NUM2EPSW_IM(CONFIG_DEBUGGER_IRQ_LEVEL + 1));
1199 1201
1200 gdbstub_store_fpu(); 1202 gdbstub_store_fpu();
1201 1203
@@ -1208,11 +1210,13 @@ static int gdbstub(struct pt_regs *regs, enum exception_code excep)
1208 /* if we were single stepping, restore the opcodes hoisted for the 1210 /* if we were single stepping, restore the opcodes hoisted for the
1209 * breakpoint[s] */ 1211 * breakpoint[s] */
1210 broke = 0; 1212 broke = 0;
1213#ifdef CONFIG_GDBSTUB_ALLOW_SINGLE_STEP
1211 if ((step_bp[0].addr && step_bp[0].addr == (u8 *) regs->pc) || 1214 if ((step_bp[0].addr && step_bp[0].addr == (u8 *) regs->pc) ||
1212 (step_bp[1].addr && step_bp[1].addr == (u8 *) regs->pc)) 1215 (step_bp[1].addr && step_bp[1].addr == (u8 *) regs->pc))
1213 broke = 1; 1216 broke = 1;
1214 1217
1215 __gdbstub_restore_bp(); 1218 __gdbstub_restore_bp();
1219#endif
1216 1220
1217 if (gdbstub_rx_unget) { 1221 if (gdbstub_rx_unget) {
1218 sigval = SIGINT; 1222 sigval = SIGINT;
@@ -1548,17 +1552,21 @@ packet_waiting:
1548 * Step to next instruction 1552 * Step to next instruction
1549 */ 1553 */
1550 case 's': 1554 case 's':
1551 /* 1555 /* Using the T flag doesn't seem to perform single
1552 * using the T flag doesn't seem to perform single
1553 * stepping (it seems to wind up being caught by the 1556 * stepping (it seems to wind up being caught by the
1554 * JTAG unit), so we have to use breakpoints and 1557 * JTAG unit), so we have to use breakpoints and
1555 * continue instead. 1558 * continue instead.
1556 */ 1559 */
1560#ifdef CONFIG_GDBSTUB_ALLOW_SINGLE_STEP
1557 if (gdbstub_single_step(regs) < 0) 1561 if (gdbstub_single_step(regs) < 0)
1558 /* ignore any fault error for now */ 1562 /* ignore any fault error for now */
1559 gdbstub_printk("unable to set single-step" 1563 gdbstub_printk("unable to set single-step"
1560 " bp\n"); 1564 " bp\n");
1561 goto done; 1565 goto done;
1566#else
1567 gdbstub_strcpy(output_buffer, "E01");
1568 break;
1569#endif
1562 1570
1563 /* 1571 /*
1564 * Set baud rate (bBB) 1572 * Set baud rate (bBB)
@@ -1657,7 +1665,7 @@ done:
1657 * NB: We flush both caches, just to be sure... 1665 * NB: We flush both caches, just to be sure...
1658 */ 1666 */
1659 if (gdbstub_flush_caches) 1667 if (gdbstub_flush_caches)
1660 gdbstub_purge_cache(); 1668 debugger_local_cache_flushinv();
1661 1669
1662 gdbstub_load_fpu(); 1670 gdbstub_load_fpu();
1663 mn10300_set_gdbleds(0); 1671 mn10300_set_gdbleds(0);
@@ -1667,14 +1675,23 @@ done:
1667 touch_softlockup_watchdog(); 1675 touch_softlockup_watchdog();
1668 1676
1669 local_irq_restore(epsw); 1677 local_irq_restore(epsw);
1670 return 1; 1678 return 0;
1679}
1680
1681/*
1682 * Determine if we hit a debugger special breakpoint that needs skipping over
1683 * automatically.
1684 */
1685int at_debugger_breakpoint(struct pt_regs *regs)
1686{
1687 return 0;
1671} 1688}
1672 1689
1673/* 1690/*
1674 * handle event interception 1691 * handle event interception
1675 */ 1692 */
1676asmlinkage int gdbstub_intercept(struct pt_regs *regs, 1693asmlinkage int debugger_intercept(enum exception_code excep,
1677 enum exception_code excep) 1694 int signo, int si_code, struct pt_regs *regs)
1678{ 1695{
1679 static u8 notfirst = 1; 1696 static u8 notfirst = 1;
1680 int ret; 1697 int ret;
@@ -1688,7 +1705,7 @@ asmlinkage int gdbstub_intercept(struct pt_regs *regs,
1688 asm("mov mdr,%0" : "=d"(mdr)); 1705 asm("mov mdr,%0" : "=d"(mdr));
1689 1706
1690 gdbstub_entry( 1707 gdbstub_entry(
1691 "--> gdbstub_intercept(%p,%04x) [MDR=%lx PC=%lx]\n", 1708 "--> debugger_intercept(%p,%04x) [MDR=%lx PC=%lx]\n",
1692 regs, excep, mdr, regs->pc); 1709 regs, excep, mdr, regs->pc);
1693 1710
1694 gdbstub_entry( 1711 gdbstub_entry(
@@ -1722,7 +1739,7 @@ asmlinkage int gdbstub_intercept(struct pt_regs *regs,
1722 1739
1723 ret = gdbstub(regs, excep); 1740 ret = gdbstub(regs, excep);
1724 1741
1725 gdbstub_entry("<-- gdbstub_intercept()\n"); 1742 gdbstub_entry("<-- debugger_intercept()\n");
1726 gdbstub_busy = 0; 1743 gdbstub_busy = 0;
1727 return ret; 1744 return ret;
1728} 1745}
diff --git a/arch/mn10300/kernel/internal.h b/arch/mn10300/kernel/internal.h
index ea946613f46d..a5ac755dd69f 100644
--- a/arch/mn10300/kernel/internal.h
+++ b/arch/mn10300/kernel/internal.h
@@ -30,6 +30,13 @@ extern void mn10300_low_ipi_handler(void);
30#endif 30#endif
31 31
32/* 32/*
33 * smp.c
34 */
35#ifdef CONFIG_SMP
36extern void smp_jump_to_debugger(void);
37#endif
38
39/*
33 * time.c 40 * time.c
34 */ 41 */
35extern irqreturn_t local_timer_interrupt(void); 42extern irqreturn_t local_timer_interrupt(void);
diff --git a/arch/mn10300/kernel/irq.c b/arch/mn10300/kernel/irq.c
index f09fed5e6afc..5f7fc3eb45e6 100644
--- a/arch/mn10300/kernel/irq.c
+++ b/arch/mn10300/kernel/irq.c
@@ -153,7 +153,7 @@ mn10300_cpupic_setaffinity(struct irq_data *d, const struct cpumask *mask,
153 case LOCAL_TIMER_IPI: 153 case LOCAL_TIMER_IPI:
154 case FLUSH_CACHE_IPI: 154 case FLUSH_CACHE_IPI:
155 case CALL_FUNCTION_NMI_IPI: 155 case CALL_FUNCTION_NMI_IPI:
156 case GDB_NMI_IPI: 156 case DEBUGGER_NMI_IPI:
157#ifdef CONFIG_MN10300_TTYSM0 157#ifdef CONFIG_MN10300_TTYSM0
158 case SC0RXIRQ: 158 case SC0RXIRQ:
159 case SC0TXIRQ: 159 case SC0TXIRQ:
diff --git a/arch/mn10300/kernel/kgdb.c b/arch/mn10300/kernel/kgdb.c
new file mode 100644
index 000000000000..f6c981db2a36
--- /dev/null
+++ b/arch/mn10300/kernel/kgdb.c
@@ -0,0 +1,502 @@
1/* kgdb support for MN10300
2 *
3 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#include <linux/slab.h>
13#include <linux/ptrace.h>
14#include <linux/kgdb.h>
15#include <linux/uaccess.h>
16#include <unit/leds.h>
17#include <unit/serial.h>
18#include <asm/debugger.h>
19#include <asm/serial-regs.h>
20#include "internal.h"
21
22/*
23 * Software single-stepping breakpoint save (used by __switch_to())
24 */
25static struct thread_info *kgdb_sstep_thread;
26u8 *kgdb_sstep_bp_addr[2];
27u8 kgdb_sstep_bp[2];
28
29/*
30 * Copy kernel exception frame registers to the GDB register file
31 */
32void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
33{
34 unsigned long ssp = (unsigned long) (regs + 1);
35
36 gdb_regs[GDB_FR_D0] = regs->d0;
37 gdb_regs[GDB_FR_D1] = regs->d1;
38 gdb_regs[GDB_FR_D2] = regs->d2;
39 gdb_regs[GDB_FR_D3] = regs->d3;
40 gdb_regs[GDB_FR_A0] = regs->a0;
41 gdb_regs[GDB_FR_A1] = regs->a1;
42 gdb_regs[GDB_FR_A2] = regs->a2;
43 gdb_regs[GDB_FR_A3] = regs->a3;
44 gdb_regs[GDB_FR_SP] = (regs->epsw & EPSW_nSL) ? regs->sp : ssp;
45 gdb_regs[GDB_FR_PC] = regs->pc;
46 gdb_regs[GDB_FR_MDR] = regs->mdr;
47 gdb_regs[GDB_FR_EPSW] = regs->epsw;
48 gdb_regs[GDB_FR_LIR] = regs->lir;
49 gdb_regs[GDB_FR_LAR] = regs->lar;
50 gdb_regs[GDB_FR_MDRQ] = regs->mdrq;
51 gdb_regs[GDB_FR_E0] = regs->e0;
52 gdb_regs[GDB_FR_E1] = regs->e1;
53 gdb_regs[GDB_FR_E2] = regs->e2;
54 gdb_regs[GDB_FR_E3] = regs->e3;
55 gdb_regs[GDB_FR_E4] = regs->e4;
56 gdb_regs[GDB_FR_E5] = regs->e5;
57 gdb_regs[GDB_FR_E6] = regs->e6;
58 gdb_regs[GDB_FR_E7] = regs->e7;
59 gdb_regs[GDB_FR_SSP] = ssp;
60 gdb_regs[GDB_FR_MSP] = 0;
61 gdb_regs[GDB_FR_USP] = regs->sp;
62 gdb_regs[GDB_FR_MCRH] = regs->mcrh;
63 gdb_regs[GDB_FR_MCRL] = regs->mcrl;
64 gdb_regs[GDB_FR_MCVF] = regs->mcvf;
65 gdb_regs[GDB_FR_DUMMY0] = 0;
66 gdb_regs[GDB_FR_DUMMY1] = 0;
67 gdb_regs[GDB_FR_FS0] = 0;
68}
69
70/*
71 * Extracts kernel SP/PC values understandable by gdb from the values
72 * saved by switch_to().
73 */
74void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
75{
76 gdb_regs[GDB_FR_SSP] = p->thread.sp;
77 gdb_regs[GDB_FR_PC] = p->thread.pc;
78 gdb_regs[GDB_FR_A3] = p->thread.a3;
79 gdb_regs[GDB_FR_USP] = p->thread.usp;
80 gdb_regs[GDB_FR_FPCR] = p->thread.fpu_state.fpcr;
81}
82
83/*
84 * Fill kernel exception frame registers from the GDB register file
85 */
86void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
87{
88 regs->d0 = gdb_regs[GDB_FR_D0];
89 regs->d1 = gdb_regs[GDB_FR_D1];
90 regs->d2 = gdb_regs[GDB_FR_D2];
91 regs->d3 = gdb_regs[GDB_FR_D3];
92 regs->a0 = gdb_regs[GDB_FR_A0];
93 regs->a1 = gdb_regs[GDB_FR_A1];
94 regs->a2 = gdb_regs[GDB_FR_A2];
95 regs->a3 = gdb_regs[GDB_FR_A3];
96 regs->sp = gdb_regs[GDB_FR_SP];
97 regs->pc = gdb_regs[GDB_FR_PC];
98 regs->mdr = gdb_regs[GDB_FR_MDR];
99 regs->epsw = gdb_regs[GDB_FR_EPSW];
100 regs->lir = gdb_regs[GDB_FR_LIR];
101 regs->lar = gdb_regs[GDB_FR_LAR];
102 regs->mdrq = gdb_regs[GDB_FR_MDRQ];
103 regs->e0 = gdb_regs[GDB_FR_E0];
104 regs->e1 = gdb_regs[GDB_FR_E1];
105 regs->e2 = gdb_regs[GDB_FR_E2];
106 regs->e3 = gdb_regs[GDB_FR_E3];
107 regs->e4 = gdb_regs[GDB_FR_E4];
108 regs->e5 = gdb_regs[GDB_FR_E5];
109 regs->e6 = gdb_regs[GDB_FR_E6];
110 regs->e7 = gdb_regs[GDB_FR_E7];
111 regs->sp = gdb_regs[GDB_FR_SSP];
112 /* gdb_regs[GDB_FR_MSP]; */
113 // regs->usp = gdb_regs[GDB_FR_USP];
114 regs->mcrh = gdb_regs[GDB_FR_MCRH];
115 regs->mcrl = gdb_regs[GDB_FR_MCRL];
116 regs->mcvf = gdb_regs[GDB_FR_MCVF];
117 /* gdb_regs[GDB_FR_DUMMY0]; */
118 /* gdb_regs[GDB_FR_DUMMY1]; */
119
120 // regs->fpcr = gdb_regs[GDB_FR_FPCR];
121 // regs->fs0 = gdb_regs[GDB_FR_FS0];
122}
123
124struct kgdb_arch arch_kgdb_ops = {
125 .gdb_bpt_instr = { 0xff },
126 .flags = KGDB_HW_BREAKPOINT,
127};
128
129static const unsigned char mn10300_kgdb_insn_sizes[256] =
130{
131 /* 1 2 3 4 5 6 7 8 9 a b c d e f */
132 1, 3, 3, 3, 1, 3, 3, 3, 1, 3, 3, 3, 1, 3, 3, 3, /* 0 */
133 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 1 */
134 2, 2, 2, 2, 3, 3, 3, 3, 2, 2, 2, 2, 3, 3, 3, 3, /* 2 */
135 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, /* 3 */
136 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, /* 4 */
137 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, /* 5 */
138 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 6 */
139 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 7 */
140 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* 8 */
141 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* 9 */
142 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* a */
143 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* b */
144 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 2, /* c */
145 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* d */
146 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* e */
147 0, 2, 2, 2, 2, 2, 2, 4, 0, 3, 0, 4, 0, 6, 7, 1 /* f */
148};
149
150/*
151 * Attempt to emulate single stepping by means of breakpoint instructions.
152 * Although there is a single-step trace flag in EPSW, its use is not
153 * sufficiently documented and is only intended for use with the JTAG debugger.
154 */
155static int kgdb_arch_do_singlestep(struct pt_regs *regs)
156{
157 unsigned long arg;
158 unsigned size;
159 u8 *pc = (u8 *)regs->pc, *sp = (u8 *)(regs + 1), cur;
160 u8 *x = NULL, *y = NULL;
161 int ret;
162
163 ret = probe_kernel_read(&cur, pc, 1);
164 if (ret < 0)
165 return ret;
166
167 size = mn10300_kgdb_insn_sizes[cur];
168 if (size > 0) {
169 x = pc + size;
170 goto set_x;
171 }
172
173 switch (cur) {
174 /* Bxx (d8,PC) */
175 case 0xc0 ... 0xca:
176 ret = probe_kernel_read(&arg, pc + 1, 1);
177 if (ret < 0)
178 return ret;
179 x = pc + 2;
180 if (arg >= 0 && arg <= 2)
181 goto set_x;
182 y = pc + (s8)arg;
183 goto set_x_and_y;
184
185 /* LXX (d8,PC) */
186 case 0xd0 ... 0xda:
187 x = pc + 1;
188 if (regs->pc == regs->lar)
189 goto set_x;
190 y = (u8 *)regs->lar;
191 goto set_x_and_y;
192
193 /* SETLB - loads the next four bytes into the LIR register
194 * (which mustn't include a breakpoint instruction) */
195 case 0xdb:
196 x = pc + 5;
197 goto set_x;
198
199 /* JMP (d16,PC) or CALL (d16,PC) */
200 case 0xcc:
201 case 0xcd:
202 ret = probe_kernel_read(&arg, pc + 1, 2);
203 if (ret < 0)
204 return ret;
205 x = pc + (s16)arg;
206 goto set_x;
207
208 /* JMP (d32,PC) or CALL (d32,PC) */
209 case 0xdc:
210 case 0xdd:
211 ret = probe_kernel_read(&arg, pc + 1, 4);
212 if (ret < 0)
213 return ret;
214 x = pc + (s32)arg;
215 goto set_x;
216
217 /* RETF */
218 case 0xde:
219 x = (u8 *)regs->mdr;
220 goto set_x;
221
222 /* RET */
223 case 0xdf:
224 ret = probe_kernel_read(&arg, pc + 2, 1);
225 if (ret < 0)
226 return ret;
227 ret = probe_kernel_read(&x, sp + (s8)arg, 4);
228 if (ret < 0)
229 return ret;
230 goto set_x;
231
232 case 0xf0:
233 ret = probe_kernel_read(&cur, pc + 1, 1);
234 if (ret < 0)
235 return ret;
236
237 if (cur >= 0xf0 && cur <= 0xf7) {
238 /* JMP (An) / CALLS (An) */
239 switch (cur & 3) {
240 case 0: x = (u8 *)regs->a0; break;
241 case 1: x = (u8 *)regs->a1; break;
242 case 2: x = (u8 *)regs->a2; break;
243 case 3: x = (u8 *)regs->a3; break;
244 }
245 goto set_x;
246 } else if (cur == 0xfc) {
247 /* RETS */
248 ret = probe_kernel_read(&x, sp, 4);
249 if (ret < 0)
250 return ret;
251 goto set_x;
252 } else if (cur == 0xfd) {
253 /* RTI */
254 ret = probe_kernel_read(&x, sp + 4, 4);
255 if (ret < 0)
256 return ret;
257 goto set_x;
258 } else {
259 x = pc + 2;
260 goto set_x;
261 }
262 break;
263
264 /* potential 3-byte conditional branches */
265 case 0xf8:
266 ret = probe_kernel_read(&cur, pc + 1, 1);
267 if (ret < 0)
268 return ret;
269 x = pc + 3;
270
271 if (cur >= 0xe8 && cur <= 0xeb) {
272 ret = probe_kernel_read(&arg, pc + 2, 1);
273 if (ret < 0)
274 return ret;
275 if (arg >= 0 && arg <= 3)
276 goto set_x;
277 y = pc + (s8)arg;
278 goto set_x_and_y;
279 }
280 goto set_x;
281
282 case 0xfa:
283 ret = probe_kernel_read(&cur, pc + 1, 1);
284 if (ret < 0)
285 return ret;
286
287 if (cur == 0xff) {
288 /* CALLS (d16,PC) */
289 ret = probe_kernel_read(&arg, pc + 2, 2);
290 if (ret < 0)
291 return ret;
292 x = pc + (s16)arg;
293 goto set_x;
294 }
295
296 x = pc + 4;
297 goto set_x;
298
299 case 0xfc:
300 ret = probe_kernel_read(&cur, pc + 1, 1);
301 if (ret < 0)
302 return ret;
303
304 if (cur == 0xff) {
305 /* CALLS (d32,PC) */
306 ret = probe_kernel_read(&arg, pc + 2, 4);
307 if (ret < 0)
308 return ret;
309 x = pc + (s32)arg;
310 goto set_x;
311 }
312
313 x = pc + 6;
314 goto set_x;
315 }
316
317 return 0;
318
319set_x:
320 kgdb_sstep_bp_addr[0] = x;
321 kgdb_sstep_bp_addr[1] = NULL;
322 ret = probe_kernel_read(&kgdb_sstep_bp[0], x, 1);
323 if (ret < 0)
324 return ret;
325 ret = probe_kernel_write(x, &arch_kgdb_ops.gdb_bpt_instr, 1);
326 if (ret < 0)
327 return ret;
328 kgdb_sstep_thread = current_thread_info();
329 debugger_local_cache_flushinv_one(x);
330 return ret;
331
332set_x_and_y:
333 kgdb_sstep_bp_addr[0] = x;
334 kgdb_sstep_bp_addr[1] = y;
335 ret = probe_kernel_read(&kgdb_sstep_bp[0], x, 1);
336 if (ret < 0)
337 return ret;
338 ret = probe_kernel_read(&kgdb_sstep_bp[1], y, 1);
339 if (ret < 0)
340 return ret;
341 ret = probe_kernel_write(x, &arch_kgdb_ops.gdb_bpt_instr, 1);
342 if (ret < 0)
343 return ret;
344 ret = probe_kernel_write(y, &arch_kgdb_ops.gdb_bpt_instr, 1);
345 if (ret < 0) {
346 probe_kernel_write(kgdb_sstep_bp_addr[0],
347 &kgdb_sstep_bp[0], 1);
348 } else {
349 kgdb_sstep_thread = current_thread_info();
350 }
351 debugger_local_cache_flushinv_one(x);
352 debugger_local_cache_flushinv_one(y);
353 return ret;
354}
355
356/*
357 * Remove emplaced single-step breakpoints, returning true if we hit one of
358 * them.
359 */
360static bool kgdb_arch_undo_singlestep(struct pt_regs *regs)
361{
362 bool hit = false;
363 u8 *x = kgdb_sstep_bp_addr[0], *y = kgdb_sstep_bp_addr[1];
364 u8 opcode;
365
366 if (kgdb_sstep_thread == current_thread_info()) {
367 if (x) {
368 if (x == (u8 *)regs->pc)
369 hit = true;
370 if (probe_kernel_read(&opcode, x,
371 1) < 0 ||
372 opcode != 0xff)
373 BUG();
374 probe_kernel_write(x, &kgdb_sstep_bp[0], 1);
375 debugger_local_cache_flushinv_one(x);
376 }
377 if (y) {
378 if (y == (u8 *)regs->pc)
379 hit = true;
380 if (probe_kernel_read(&opcode, y,
381 1) < 0 ||
382 opcode != 0xff)
383 BUG();
384 probe_kernel_write(y, &kgdb_sstep_bp[1], 1);
385 debugger_local_cache_flushinv_one(y);
386 }
387 }
388
389 kgdb_sstep_bp_addr[0] = NULL;
390 kgdb_sstep_bp_addr[1] = NULL;
391 kgdb_sstep_thread = NULL;
392 return hit;
393}
394
395/*
396 * Catch a single-step-pending thread being deleted and make sure the global
397 * single-step state is cleared. At this point the breakpoints should have
398 * been removed by __switch_to().
399 */
400void free_thread_info(struct thread_info *ti)
401{
402 if (kgdb_sstep_thread == ti) {
403 kgdb_sstep_thread = NULL;
404
405 /* However, we may now be running in degraded mode, with most
406 * of the CPUs disabled until such a time as KGDB is reentered,
407 * so force immediate reentry */
408 kgdb_breakpoint();
409 }
410 kfree(ti);
411}
412
413/*
414 * Handle unknown packets and [CcsDk] packets
415 * - at this point breakpoints have been installed
416 */
417int kgdb_arch_handle_exception(int vector, int signo, int err_code,
418 char *remcom_in_buffer, char *remcom_out_buffer,
419 struct pt_regs *regs)
420{
421 long addr;
422 char *ptr;
423
424 switch (remcom_in_buffer[0]) {
425 case 'c':
426 case 's':
427 /* try to read optional parameter, pc unchanged if no parm */
428 ptr = &remcom_in_buffer[1];
429 if (kgdb_hex2long(&ptr, &addr))
430 regs->pc = addr;
431 case 'D':
432 case 'k':
433 atomic_set(&kgdb_cpu_doing_single_step, -1);
434
435 if (remcom_in_buffer[0] == 's') {
436 kgdb_arch_do_singlestep(regs);
437 kgdb_single_step = 1;
438 atomic_set(&kgdb_cpu_doing_single_step,
439 raw_smp_processor_id());
440 }
441 return 0;
442 }
443 return -1; /* this means that we do not want to exit from the handler */
444}
445
446/*
447 * Handle event interception
448 * - returns 0 if the exception should be skipped, -ERROR otherwise.
449 */
450int debugger_intercept(enum exception_code excep, int signo, int si_code,
451 struct pt_regs *regs)
452{
453 int ret;
454
455 if (kgdb_arch_undo_singlestep(regs)) {
456 excep = EXCEP_TRAP;
457 signo = SIGTRAP;
458 si_code = TRAP_TRACE;
459 }
460
461 ret = kgdb_handle_exception(excep, signo, si_code, regs);
462
463 debugger_local_cache_flushinv();
464
465 return ret;
466}
467
468/*
469 * Determine if we've hit a debugger special breakpoint
470 */
471int at_debugger_breakpoint(struct pt_regs *regs)
472{
473 return regs->pc == (unsigned long)&__arch_kgdb_breakpoint;
474}
475
476/*
477 * Initialise kgdb
478 */
479int kgdb_arch_init(void)
480{
481 return 0;
482}
483
484/*
485 * Do something, perhaps, but don't know what.
486 */
487void kgdb_arch_exit(void)
488{
489}
490
491#ifdef CONFIG_SMP
492void debugger_nmi_interrupt(struct pt_regs *regs, enum exception_code code)
493{
494 kgdb_nmicallback(arch_smp_processor_id(), regs);
495 debugger_local_cache_flushinv();
496}
497
498void kgdb_roundup_cpus(unsigned long flags)
499{
500 smp_jump_to_debugger();
501}
502#endif
diff --git a/arch/mn10300/kernel/mn10300-serial.c b/arch/mn10300/kernel/mn10300-serial.c
index 93c53739cfc9..efca426a2ed4 100644
--- a/arch/mn10300/kernel/mn10300-serial.c
+++ b/arch/mn10300/kernel/mn10300-serial.c
@@ -119,6 +119,10 @@ static int mn10300_serial_request_port(struct uart_port *);
119static void mn10300_serial_config_port(struct uart_port *, int); 119static void mn10300_serial_config_port(struct uart_port *, int);
120static int mn10300_serial_verify_port(struct uart_port *, 120static int mn10300_serial_verify_port(struct uart_port *,
121 struct serial_struct *); 121 struct serial_struct *);
122#ifdef CONFIG_CONSOLE_POLL
123static void mn10300_serial_poll_put_char(struct uart_port *, unsigned char);
124static int mn10300_serial_poll_get_char(struct uart_port *);
125#endif
122 126
123static const struct uart_ops mn10300_serial_ops = { 127static const struct uart_ops mn10300_serial_ops = {
124 .tx_empty = mn10300_serial_tx_empty, 128 .tx_empty = mn10300_serial_tx_empty,
@@ -138,6 +142,10 @@ static const struct uart_ops mn10300_serial_ops = {
138 .request_port = mn10300_serial_request_port, 142 .request_port = mn10300_serial_request_port,
139 .config_port = mn10300_serial_config_port, 143 .config_port = mn10300_serial_config_port,
140 .verify_port = mn10300_serial_verify_port, 144 .verify_port = mn10300_serial_verify_port,
145#ifdef CONFIG_CONSOLE_POLL
146 .poll_put_char = mn10300_serial_poll_put_char,
147 .poll_get_char = mn10300_serial_poll_get_char,
148#endif
141}; 149};
142 150
143static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id); 151static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id);
@@ -1634,3 +1642,70 @@ static int __init mn10300_serial_console_init(void)
1634 1642
1635console_initcall(mn10300_serial_console_init); 1643console_initcall(mn10300_serial_console_init);
1636#endif 1644#endif
1645
1646#ifdef CONFIG_CONSOLE_POLL
1647/*
1648 * Polled character reception for the kernel debugger
1649 */
1650static int mn10300_serial_poll_get_char(struct uart_port *_port)
1651{
1652 struct mn10300_serial_port *port =
1653 container_of(_port, struct mn10300_serial_port, uart);
1654 unsigned ix;
1655 u8 st, ch;
1656
1657 _enter("%s", port->name);
1658
1659 do {
1660 /* pull chars out of the hat */
1661 ix = port->rx_outp;
1662 if (ix == port->rx_inp)
1663 return NO_POLL_CHAR;
1664
1665 ch = port->rx_buffer[ix++];
1666 st = port->rx_buffer[ix++];
1667 smp_rmb();
1668 port->rx_outp = ix & (MNSC_BUFFER_SIZE - 1);
1669
1670 } while (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF));
1671
1672 return ch;
1673}
1674
1675
1676/*
1677 * Polled character transmission for the kernel debugger
1678 */
1679static void mn10300_serial_poll_put_char(struct uart_port *_port,
1680 unsigned char ch)
1681{
1682 struct mn10300_serial_port *port =
1683 container_of(_port, struct mn10300_serial_port, uart);
1684 u8 intr, tmp;
1685
1686 /* wait for the transmitter to finish anything it might be doing (and
1687 * this includes the virtual DMA handler, so it might take a while) */
1688 while (*port->_status & (SC01STR_TBF | SC01STR_TXF))
1689 continue;
1690
1691 /* disable the Tx ready interrupt */
1692 intr = *port->_intr;
1693 *port->_intr = intr & ~SC01ICR_TI;
1694 tmp = *port->_intr;
1695
1696 if (ch == 0x0a) {
1697 *(u8 *) port->_txb = 0x0d;
1698 while (*port->_status & SC01STR_TBF)
1699 continue;
1700 }
1701
1702 *(u8 *) port->_txb = ch;
1703 while (*port->_status & SC01STR_TBF)
1704 continue;
1705
1706 /* restore the Tx interrupt flag */
1707 *port->_intr = intr;
1708 tmp = *port->_intr;
1709}
1710
1711#endif /* CONFIG_CONSOLE_POLL */
diff --git a/arch/mn10300/kernel/process.c b/arch/mn10300/kernel/process.c
index e1b14a6ed544..28eec3102535 100644
--- a/arch/mn10300/kernel/process.c
+++ b/arch/mn10300/kernel/process.c
@@ -135,7 +135,7 @@ void release_segments(struct mm_struct *mm)
135 135
136void machine_restart(char *cmd) 136void machine_restart(char *cmd)
137{ 137{
138#ifdef CONFIG_GDBSTUB 138#ifdef CONFIG_KERNEL_DEBUGGER
139 gdbstub_exit(0); 139 gdbstub_exit(0);
140#endif 140#endif
141 141
@@ -148,14 +148,14 @@ void machine_restart(char *cmd)
148 148
149void machine_halt(void) 149void machine_halt(void)
150{ 150{
151#ifdef CONFIG_GDBSTUB 151#ifdef CONFIG_KERNEL_DEBUGGER
152 gdbstub_exit(0); 152 gdbstub_exit(0);
153#endif 153#endif
154} 154}
155 155
156void machine_power_off(void) 156void machine_power_off(void)
157{ 157{
158#ifdef CONFIG_GDBSTUB 158#ifdef CONFIG_KERNEL_DEBUGGER
159 gdbstub_exit(0); 159 gdbstub_exit(0);
160#endif 160#endif
161} 161}
diff --git a/arch/mn10300/kernel/smp.c b/arch/mn10300/kernel/smp.c
index 1ebb79f1650d..51c02f97dcea 100644
--- a/arch/mn10300/kernel/smp.c
+++ b/arch/mn10300/kernel/smp.c
@@ -440,6 +440,22 @@ int smp_nmi_call_function(smp_call_func_t func, void *info, int wait)
440} 440}
441 441
442/** 442/**
443 * smp_jump_to_debugger - Make other CPUs enter the debugger by sending an IPI
444 *
445 * Send a non-maskable request to all other CPUs in the system, instructing
446 * them to jump into the debugger. The caller is responsible for checking that
447 * the other CPUs responded to the instruction.
448 *
449 * The caller should make sure that this CPU's debugger IPI is disabled.
450 */
451void smp_jump_to_debugger(void)
452{
453 if (num_online_cpus() > 1)
454 /* Send a message to all other CPUs */
455 send_IPI_allbutself(DEBUGGER_NMI_IPI);
456}
457
458/**
443 * stop_this_cpu - Callback to stop a CPU. 459 * stop_this_cpu - Callback to stop a CPU.
444 * @unused: Callback context (ignored). 460 * @unused: Callback context (ignored).
445 */ 461 */
@@ -603,7 +619,7 @@ static void __init smp_cpu_init(void)
603/** 619/**
604 * smp_prepare_cpu_init - Initialise CPU in startup_secondary 620 * smp_prepare_cpu_init - Initialise CPU in startup_secondary
605 * 621 *
606 * Set interrupt level 0-6 setting and init ICR of gdbstub. 622 * Set interrupt level 0-6 setting and init ICR of the kernel debugger.
607 */ 623 */
608void smp_prepare_cpu_init(void) 624void smp_prepare_cpu_init(void)
609{ 625{
@@ -622,15 +638,15 @@ void smp_prepare_cpu_init(void)
622 for (loop = 0; loop < GxICR_NUM_IRQS; loop++) 638 for (loop = 0; loop < GxICR_NUM_IRQS; loop++)
623 GxICR(loop) = GxICR_LEVEL_6 | GxICR_DETECT; 639 GxICR(loop) = GxICR_LEVEL_6 | GxICR_DETECT;
624 640
625#ifdef CONFIG_GDBSTUB 641#ifdef CONFIG_KERNEL_DEBUGGER
626 /* initialise GDB-stub */ 642 /* initialise the kernel debugger interrupt */
627 do { 643 do {
628 unsigned long flags; 644 unsigned long flags;
629 u16 tmp16; 645 u16 tmp16;
630 646
631 flags = arch_local_cli_save(); 647 flags = arch_local_cli_save();
632 GxICR(GDB_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT; 648 GxICR(DEBUGGER_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
633 tmp16 = GxICR(GDB_NMI_IPI); 649 tmp16 = GxICR(DEBUGGER_NMI_IPI);
634 arch_local_irq_restore(flags); 650 arch_local_irq_restore(flags);
635 } while (0); 651 } while (0);
636#endif 652#endif
diff --git a/arch/mn10300/kernel/switch_to.S b/arch/mn10300/kernel/switch_to.S
index 9074d0fb8788..de3e74fc9ea0 100644
--- a/arch/mn10300/kernel/switch_to.S
+++ b/arch/mn10300/kernel/switch_to.S
@@ -39,11 +39,17 @@ ENTRY(__switch_to)
39 39
40 # save prev context 40 # save prev context
41 mov __switch_back,d0 41 mov __switch_back,d0
42 mov d0,(THREAD_PC,a0)
43 mov sp,a2 42 mov sp,a2
44 mov a2,(THREAD_SP,a0) 43 mov a2,(THREAD_SP,a0)
45 mov a3,(THREAD_A3,a0) 44 mov a3,(THREAD_A3,a0)
46 45
46#ifdef CONFIG_KGDB
47 btst 0xff,(kgdb_single_step)
48 bne __switch_to__lift_sstep_bp
49__switch_to__continue:
50#endif
51 mov d0,(THREAD_PC,a0)
52
47 mov (THREAD_A3,a1),a3 53 mov (THREAD_A3,a1),a3
48 mov (THREAD_SP,a1),a2 54 mov (THREAD_SP,a1),a2
49 55
@@ -68,3 +74,106 @@ ENTRY(__switch_to)
68__switch_back: 74__switch_back:
69 and ~EPSW_NMID,epsw 75 and ~EPSW_NMID,epsw
70 ret [d2,d3,a2,a3,exreg1],32 76 ret [d2,d3,a2,a3,exreg1],32
77
78#ifdef CONFIG_KGDB
79###############################################################################
80#
81# Lift the single-step breakpoints when the task being traced is switched out
82# A0 = prev
83# A1 = next
84#
85###############################################################################
86__switch_to__lift_sstep_bp:
87 add -12,sp
88 mov a0,e4
89 mov a1,e5
90
91 # Clear the single-step flag to prevent us coming this way until we get
92 # switched back in
93 bclr 0xff,(kgdb_single_step)
94
95 # Remove first breakpoint
96 mov (kgdb_sstep_bp_addr),a2
97 cmp 0,a2
98 beq 1f
99 movbu (kgdb_sstep_bp),d0
100 movbu d0,(a2)
101#if defined(CONFIG_MN10300_CACHE_FLUSH_ICACHE) || defined(CONFIG_MN10300_CACHE_INV_ICACHE)
102 mov a2,d0
103 mov a2,d1
104 add 1,d1
105 calls flush_icache_range
106#endif
1071:
108
109 # Remove second breakpoint
110 mov (kgdb_sstep_bp_addr+4),a2
111 cmp 0,a2
112 beq 2f
113 movbu (kgdb_sstep_bp+1),d0
114 movbu d0,(a2)
115#if defined(CONFIG_MN10300_CACHE_FLUSH_ICACHE) || defined(CONFIG_MN10300_CACHE_INV_ICACHE)
116 mov a2,d0
117 mov a2,d1
118 add 1,d1
119 calls flush_icache_range
120#endif
1212:
122
123 # Change the resumption address and return
124 mov __switch_back__reinstall_sstep_bp,d0
125 mov e4,a0
126 mov e5,a1
127 add 12,sp
128 bra __switch_to__continue
129
130###############################################################################
131#
132# Reinstall the single-step breakpoints when the task being traced is switched
133# back in (A1 points to the new thread_struct).
134#
135###############################################################################
136__switch_back__reinstall_sstep_bp:
137 add -12,sp
138 mov a0,e4 # save the return value
139 mov 0xff,d3
140
141 # Reinstall first breakpoint
142 mov (kgdb_sstep_bp_addr),a2
143 cmp 0,a2
144 beq 1f
145 movbu (a2),d0
146 movbu d0,(kgdb_sstep_bp)
147 movbu d3,(a2)
148#if defined(CONFIG_MN10300_CACHE_FLUSH_ICACHE) || defined(CONFIG_MN10300_CACHE_INV_ICACHE)
149 mov a2,d0
150 mov a2,d1
151 add 1,d1
152 calls flush_icache_range
153#endif
1541:
155
156 # Reinstall second breakpoint
157 mov (kgdb_sstep_bp_addr+4),a2
158 cmp 0,a2
159 beq 2f
160 movbu (a2),d0
161 movbu d0,(kgdb_sstep_bp+1)
162 movbu d3,(a2)
163#if defined(CONFIG_MN10300_CACHE_FLUSH_ICACHE) || defined(CONFIG_MN10300_CACHE_INV_ICACHE)
164 mov a2,d0
165 mov a2,d1
166 add 1,d1
167 calls flush_icache_range
168#endif
1692:
170
171 mov d3,(kgdb_single_step)
172
173 # Restore the return value (the previous thread_struct pointer)
174 mov e4,a0
175 mov a0,d0
176 add 12,sp
177 bra __switch_back
178
179#endif /* CONFIG_KGDB */
diff --git a/arch/mn10300/kernel/traps.c b/arch/mn10300/kernel/traps.c
index b90c3f160c77..f03cb278828f 100644
--- a/arch/mn10300/kernel/traps.c
+++ b/arch/mn10300/kernel/traps.c
@@ -38,8 +38,9 @@
38#include <asm/busctl-regs.h> 38#include <asm/busctl-regs.h>
39#include <unit/leds.h> 39#include <unit/leds.h>
40#include <asm/fpu.h> 40#include <asm/fpu.h>
41#include <asm/gdb-stub.h>
42#include <asm/sections.h> 41#include <asm/sections.h>
42#include <asm/debugger.h>
43#include "internal.h"
43 44
44#if (CONFIG_INTERRUPT_VECTOR_BASE & 0xffffff) 45#if (CONFIG_INTERRUPT_VECTOR_BASE & 0xffffff)
45#error "INTERRUPT_VECTOR_BASE not aligned to 16MiB boundary!" 46#error "INTERRUPT_VECTOR_BASE not aligned to 16MiB boundary!"
@@ -49,63 +50,169 @@ int kstack_depth_to_print = 24;
49 50
50spinlock_t die_lock = __SPIN_LOCK_UNLOCKED(die_lock); 51spinlock_t die_lock = __SPIN_LOCK_UNLOCKED(die_lock);
51 52
52ATOMIC_NOTIFIER_HEAD(mn10300_die_chain); 53struct exception_to_signal_map {
54 u8 signo;
55 u32 si_code;
56};
57
58static const struct exception_to_signal_map exception_to_signal_map[256] = {
59 /* MMU exceptions */
60 [EXCEP_ITLBMISS >> 3] = { 0, 0 },
61 [EXCEP_DTLBMISS >> 3] = { 0, 0 },
62 [EXCEP_IAERROR >> 3] = { 0, 0 },
63 [EXCEP_DAERROR >> 3] = { 0, 0 },
64
65 /* system exceptions */
66 [EXCEP_TRAP >> 3] = { SIGTRAP, TRAP_BRKPT },
67 [EXCEP_ISTEP >> 3] = { SIGTRAP, TRAP_TRACE }, /* Monitor */
68 [EXCEP_IBREAK >> 3] = { SIGTRAP, TRAP_HWBKPT }, /* Monitor */
69 [EXCEP_OBREAK >> 3] = { SIGTRAP, TRAP_HWBKPT }, /* Monitor */
70 [EXCEP_PRIVINS >> 3] = { SIGILL, ILL_PRVOPC },
71 [EXCEP_UNIMPINS >> 3] = { SIGILL, ILL_ILLOPC },
72 [EXCEP_UNIMPEXINS >> 3] = { SIGILL, ILL_ILLOPC },
73 [EXCEP_MEMERR >> 3] = { SIGSEGV, SEGV_ACCERR },
74 [EXCEP_MISALIGN >> 3] = { SIGBUS, BUS_ADRALN },
75 [EXCEP_BUSERROR >> 3] = { SIGBUS, BUS_ADRERR },
76 [EXCEP_ILLINSACC >> 3] = { SIGSEGV, SEGV_ACCERR },
77 [EXCEP_ILLDATACC >> 3] = { SIGSEGV, SEGV_ACCERR },
78 [EXCEP_IOINSACC >> 3] = { SIGSEGV, SEGV_ACCERR },
79 [EXCEP_PRIVINSACC >> 3] = { SIGSEGV, SEGV_ACCERR }, /* userspace */
80 [EXCEP_PRIVDATACC >> 3] = { SIGSEGV, SEGV_ACCERR }, /* userspace */
81 [EXCEP_DATINSACC >> 3] = { SIGSEGV, SEGV_ACCERR },
82 [EXCEP_DOUBLE_FAULT >> 3] = { SIGILL, ILL_BADSTK },
83
84 /* FPU exceptions */
85 [EXCEP_FPU_DISABLED >> 3] = { SIGILL, ILL_COPROC },
86 [EXCEP_FPU_UNIMPINS >> 3] = { SIGILL, ILL_COPROC },
87 [EXCEP_FPU_OPERATION >> 3] = { SIGFPE, FPE_INTDIV },
88
89 /* interrupts */
90 [EXCEP_WDT >> 3] = { SIGALRM, 0 },
91 [EXCEP_NMI >> 3] = { SIGQUIT, 0 },
92 [EXCEP_IRQ_LEVEL0 >> 3] = { SIGINT, 0 },
93 [EXCEP_IRQ_LEVEL1 >> 3] = { 0, 0 },
94 [EXCEP_IRQ_LEVEL2 >> 3] = { 0, 0 },
95 [EXCEP_IRQ_LEVEL3 >> 3] = { 0, 0 },
96 [EXCEP_IRQ_LEVEL4 >> 3] = { 0, 0 },
97 [EXCEP_IRQ_LEVEL5 >> 3] = { 0, 0 },
98 [EXCEP_IRQ_LEVEL6 >> 3] = { 0, 0 },
99
100 /* system calls */
101 [EXCEP_SYSCALL0 >> 3] = { 0, 0 },
102 [EXCEP_SYSCALL1 >> 3] = { SIGILL, ILL_ILLTRP },
103 [EXCEP_SYSCALL2 >> 3] = { SIGILL, ILL_ILLTRP },
104 [EXCEP_SYSCALL3 >> 3] = { SIGILL, ILL_ILLTRP },
105 [EXCEP_SYSCALL4 >> 3] = { SIGILL, ILL_ILLTRP },
106 [EXCEP_SYSCALL5 >> 3] = { SIGILL, ILL_ILLTRP },
107 [EXCEP_SYSCALL6 >> 3] = { SIGILL, ILL_ILLTRP },
108 [EXCEP_SYSCALL7 >> 3] = { SIGILL, ILL_ILLTRP },
109 [EXCEP_SYSCALL8 >> 3] = { SIGILL, ILL_ILLTRP },
110 [EXCEP_SYSCALL9 >> 3] = { SIGILL, ILL_ILLTRP },
111 [EXCEP_SYSCALL10 >> 3] = { SIGILL, ILL_ILLTRP },
112 [EXCEP_SYSCALL11 >> 3] = { SIGILL, ILL_ILLTRP },
113 [EXCEP_SYSCALL12 >> 3] = { SIGILL, ILL_ILLTRP },
114 [EXCEP_SYSCALL13 >> 3] = { SIGILL, ILL_ILLTRP },
115 [EXCEP_SYSCALL14 >> 3] = { SIGILL, ILL_ILLTRP },
116 [EXCEP_SYSCALL15 >> 3] = { SIGABRT, 0 },
117};
53 118
54/* 119/*
55 * These constants are for searching for possible module text 120 * Handle kernel exceptions.
56 * segments. MODULE_RANGE is a guess of how much space is likely 121 *
57 * to be vmalloced. 122 * See if there's a fixup handler we can force a jump to when an exception
123 * happens due to something kernel code did
58 */ 124 */
59#define MODULE_RANGE (8 * 1024 * 1024) 125int die_if_no_fixup(const char *str, struct pt_regs *regs,
60 126 enum exception_code code)
61#define DO_ERROR(signr, prologue, str, name) \ 127{
62asmlinkage void name(struct pt_regs *regs, u32 intcode) \ 128 u8 opcode;
63{ \ 129 int signo, si_code;
64 prologue; \ 130
65 if (die_if_no_fixup(str, regs, intcode)) \ 131 if (user_mode(regs))
66 return; \ 132 return 0;
67 force_sig(signr, current); \ 133
68} 134 peripheral_leds_display_exception(code);
135
136 signo = exception_to_signal_map[code >> 3].signo;
137 si_code = exception_to_signal_map[code >> 3].si_code;
138
139 switch (code) {
140 /* see if we can fixup the kernel accessing memory */
141 case EXCEP_ITLBMISS:
142 case EXCEP_DTLBMISS:
143 case EXCEP_IAERROR:
144 case EXCEP_DAERROR:
145 case EXCEP_MEMERR:
146 case EXCEP_MISALIGN:
147 case EXCEP_BUSERROR:
148 case EXCEP_ILLDATACC:
149 case EXCEP_IOINSACC:
150 case EXCEP_PRIVINSACC:
151 case EXCEP_PRIVDATACC:
152 case EXCEP_DATINSACC:
153 if (fixup_exception(regs))
154 return 1;
155 break;
69 156
70#define DO_EINFO(signr, prologue, str, name, sicode) \ 157 case EXCEP_TRAP:
71asmlinkage void name(struct pt_regs *regs, u32 intcode) \ 158 case EXCEP_UNIMPINS:
72{ \ 159 if (get_user(opcode, (uint8_t __user *)regs->pc) != 0)
73 siginfo_t info; \ 160 break;
74 prologue; \ 161 if (opcode == 0xff) {
75 if (die_if_no_fixup(str, regs, intcode)) \ 162 if (notify_die(DIE_BREAKPOINT, str, regs, code, 0, 0))
76 return; \ 163 return 1;
77 info.si_signo = signr; \ 164 if (at_debugger_breakpoint(regs))
78 if (signr == SIGILL && sicode == ILL_ILLOPC) { \ 165 regs->pc++;
79 uint8_t opcode; \ 166 signo = SIGTRAP;
80 if (get_user(opcode, (uint8_t __user *)regs->pc) == 0) \ 167 si_code = TRAP_BRKPT;
81 if (opcode == 0xff) \ 168 }
82 info.si_signo = SIGTRAP; \ 169 break;
83 } \ 170
84 info.si_errno = 0; \ 171 case EXCEP_SYSCALL1 ... EXCEP_SYSCALL14:
85 info.si_code = sicode; \ 172 /* syscall return addr is _after_ the instruction */
86 info.si_addr = (void *) regs->pc; \ 173 regs->pc -= 2;
87 force_sig_info(info.si_signo, &info, current); \ 174 break;
175
176 case EXCEP_SYSCALL15:
177 if (report_bug(regs->pc, regs) == BUG_TRAP_TYPE_WARN)
178 return 1;
179
180 /* syscall return addr is _after_ the instruction */
181 regs->pc -= 2;
182 break;
183
184 default:
185 break;
186 }
187
188 if (debugger_intercept(code, signo, si_code, regs) == 0)
189 return 1;
190
191 if (notify_die(DIE_GPF, str, regs, code, 0, 0))
192 return 1;
193
194 /* make the process die as the last resort */
195 die(str, regs, code);
88} 196}
89 197
90DO_ERROR(SIGTRAP, {}, "trap", trap); 198/*
91DO_ERROR(SIGSEGV, {}, "ibreak", ibreak); 199 * General exception handler
92DO_ERROR(SIGSEGV, {}, "obreak", obreak); 200 */
93DO_EINFO(SIGSEGV, {}, "access error", access_error, SEGV_ACCERR); 201asmlinkage void handle_exception(struct pt_regs *regs, u32 intcode)
94DO_EINFO(SIGSEGV, {}, "insn access error", insn_acc_error, SEGV_ACCERR); 202{
95DO_EINFO(SIGSEGV, {}, "data access error", data_acc_error, SEGV_ACCERR); 203 siginfo_t info;
96DO_EINFO(SIGILL, {}, "privileged opcode", priv_op, ILL_PRVOPC); 204
97DO_EINFO(SIGILL, {}, "invalid opcode", invalid_op, ILL_ILLOPC); 205 /* deal with kernel exceptions here */
98DO_EINFO(SIGILL, {}, "invalid ex opcode", invalid_exop, ILL_ILLOPC); 206 if (die_if_no_fixup(NULL, regs, intcode))
99DO_EINFO(SIGBUS, {}, "invalid address", mem_error, BUS_ADRERR); 207 return;
100DO_EINFO(SIGBUS, {}, "bus error", bus_error, BUS_ADRERR); 208
101 209 /* otherwise it's a userspace exception */
102DO_ERROR(SIGTRAP, 210 info.si_signo = exception_to_signal_map[intcode >> 3].signo;
103#ifndef CONFIG_MN10300_USING_JTAG 211 info.si_code = exception_to_signal_map[intcode >> 3].si_code;
104 DCR &= ~0x0001, 212 info.si_errno = 0;
105#else 213 info.si_addr = (void *) regs->pc;
106 {}, 214 force_sig_info(info.si_signo, &info, current);
107#endif 215}
108 "single step", istep);
109 216
110/* 217/*
111 * handle NMI 218 * handle NMI
@@ -113,10 +220,8 @@ DO_ERROR(SIGTRAP,
113asmlinkage void nmi(struct pt_regs *regs, enum exception_code code) 220asmlinkage void nmi(struct pt_regs *regs, enum exception_code code)
114{ 221{
115 /* see if gdbstub wants to deal with it */ 222 /* see if gdbstub wants to deal with it */
116#ifdef CONFIG_GDBSTUB 223 if (debugger_intercept(code, SIGQUIT, 0, regs))
117 if (gdbstub_intercept(regs, code))
118 return; 224 return;
119#endif
120 225
121 printk(KERN_WARNING "--- Register Dump ---\n"); 226 printk(KERN_WARNING "--- Register Dump ---\n");
122 show_registers(regs); 227 show_registers(regs);
@@ -128,29 +233,36 @@ asmlinkage void nmi(struct pt_regs *regs, enum exception_code code)
128 */ 233 */
129void show_trace(unsigned long *sp) 234void show_trace(unsigned long *sp)
130{ 235{
131 unsigned long *stack, addr, module_start, module_end; 236 unsigned long bottom, stack, addr, fp, raslot;
132 int i; 237
133 238 printk(KERN_EMERG "\nCall Trace:\n");
134 printk(KERN_EMERG "\nCall Trace:"); 239
135 240 //stack = (unsigned long)sp;
136 stack = sp; 241 asm("mov sp,%0" : "=a"(stack));
137 i = 0; 242 asm("mov a3,%0" : "=r"(fp));
138 module_start = VMALLOC_START; 243
139 module_end = VMALLOC_END; 244 raslot = ULONG_MAX;
245 bottom = (stack + THREAD_SIZE) & ~(THREAD_SIZE - 1);
246 for (; stack < bottom; stack += sizeof(addr)) {
247 addr = *(unsigned long *)stack;
248 if (stack == fp) {
249 if (addr > stack && addr < bottom) {
250 fp = addr;
251 raslot = stack + sizeof(addr);
252 continue;
253 }
254 fp = 0;
255 raslot = ULONG_MAX;
256 }
140 257
141 while (((long) stack & (THREAD_SIZE - 1)) != 0) {
142 addr = *stack++;
143 if (__kernel_text_address(addr)) { 258 if (__kernel_text_address(addr)) {
144#if 1
145 printk(" [<%08lx>]", addr); 259 printk(" [<%08lx>]", addr);
260 if (stack >= raslot)
261 raslot = ULONG_MAX;
262 else
263 printk(" ?");
146 print_symbol(" %s", addr); 264 print_symbol(" %s", addr);
147 printk("\n"); 265 printk("\n");
148#else
149 if ((i % 6) == 0)
150 printk(KERN_EMERG " ");
151 printk("[<%08lx>] ", addr);
152 i++;
153#endif
154 } 266 }
155 } 267 }
156 268
@@ -323,86 +435,6 @@ void die(const char *str, struct pt_regs *regs, enum exception_code code)
323} 435}
324 436
325/* 437/*
326 * see if there's a fixup handler we can force a jump to when an exception
327 * happens due to something kernel code did
328 */
329int die_if_no_fixup(const char *str, struct pt_regs *regs,
330 enum exception_code code)
331{
332 if (user_mode(regs))
333 return 0;
334
335 peripheral_leds_display_exception(code);
336
337 switch (code) {
338 /* see if we can fixup the kernel accessing memory */
339 case EXCEP_ITLBMISS:
340 case EXCEP_DTLBMISS:
341 case EXCEP_IAERROR:
342 case EXCEP_DAERROR:
343 case EXCEP_MEMERR:
344 case EXCEP_MISALIGN:
345 case EXCEP_BUSERROR:
346 case EXCEP_ILLDATACC:
347 case EXCEP_IOINSACC:
348 case EXCEP_PRIVINSACC:
349 case EXCEP_PRIVDATACC:
350 case EXCEP_DATINSACC:
351 if (fixup_exception(regs))
352 return 1;
353 case EXCEP_UNIMPINS:
354 if (regs->pc && *(uint8_t *)regs->pc == 0xff)
355 if (notify_die(DIE_BREAKPOINT, str, regs, code, 0, 0))
356 return 1;
357 break;
358 default:
359 break;
360 }
361
362 /* see if gdbstub wants to deal with it */
363#ifdef CONFIG_GDBSTUB
364 if (gdbstub_intercept(regs, code))
365 return 1;
366#endif
367
368 if (notify_die(DIE_GPF, str, regs, code, 0, 0))
369 return 1;
370
371 /* make the process die as the last resort */
372 die(str, regs, code);
373}
374
375/*
376 * handle unsupported syscall instructions (syscall 1-15)
377 */
378static asmlinkage void unsupported_syscall(struct pt_regs *regs,
379 enum exception_code code)
380{
381 struct task_struct *tsk = current;
382 siginfo_t info;
383
384 /* catch a kernel BUG() */
385 if (code == EXCEP_SYSCALL15 && !user_mode(regs)) {
386 if (report_bug(regs->pc, regs) == BUG_TRAP_TYPE_BUG) {
387#ifdef CONFIG_GDBSTUB
388 gdbstub_intercept(regs, code);
389#endif
390 }
391 }
392
393 regs->pc -= 2; /* syscall return addr is _after_ the instruction */
394
395 die_if_no_fixup("An unsupported syscall insn was used by the kernel\n",
396 regs, code);
397
398 info.si_signo = SIGILL;
399 info.si_errno = ENOSYS;
400 info.si_code = ILL_ILLTRP;
401 info.si_addr = (void *) regs->pc;
402 force_sig_info(SIGILL, &info, tsk);
403}
404
405/*
406 * display the register file when the stack pointer gets clobbered 438 * display the register file when the stack pointer gets clobbered
407 */ 439 */
408asmlinkage void do_double_fault(struct pt_regs *regs) 440asmlinkage void do_double_fault(struct pt_regs *regs)
@@ -481,10 +513,8 @@ asmlinkage void uninitialised_exception(struct pt_regs *regs,
481{ 513{
482 514
483 /* see if gdbstub wants to deal with it */ 515 /* see if gdbstub wants to deal with it */
484#ifdef CONFIG_GDBSTUB 516 if (debugger_intercept(code, SIGSYS, 0, regs) == 0)
485 if (gdbstub_intercept(regs, code))
486 return; 517 return;
487#endif
488 518
489 peripheral_leds_display_exception(code); 519 peripheral_leds_display_exception(code);
490 printk(KERN_EMERG "Uninitialised Exception 0x%04x\n", code & 0xFFFF); 520 printk(KERN_EMERG "Uninitialised Exception 0x%04x\n", code & 0xFFFF);
@@ -549,43 +579,43 @@ void __init set_intr_stub(enum exception_code code, void *handler)
549 */ 579 */
550void __init trap_init(void) 580void __init trap_init(void)
551{ 581{
552 set_excp_vector(EXCEP_TRAP, trap); 582 set_excp_vector(EXCEP_TRAP, handle_exception);
553 set_excp_vector(EXCEP_ISTEP, istep); 583 set_excp_vector(EXCEP_ISTEP, handle_exception);
554 set_excp_vector(EXCEP_IBREAK, ibreak); 584 set_excp_vector(EXCEP_IBREAK, handle_exception);
555 set_excp_vector(EXCEP_OBREAK, obreak); 585 set_excp_vector(EXCEP_OBREAK, handle_exception);
556 586
557 set_excp_vector(EXCEP_PRIVINS, priv_op); 587 set_excp_vector(EXCEP_PRIVINS, handle_exception);
558 set_excp_vector(EXCEP_UNIMPINS, invalid_op); 588 set_excp_vector(EXCEP_UNIMPINS, handle_exception);
559 set_excp_vector(EXCEP_UNIMPEXINS, invalid_exop); 589 set_excp_vector(EXCEP_UNIMPEXINS, handle_exception);
560 set_excp_vector(EXCEP_MEMERR, mem_error); 590 set_excp_vector(EXCEP_MEMERR, handle_exception);
561 set_excp_vector(EXCEP_MISALIGN, misalignment); 591 set_excp_vector(EXCEP_MISALIGN, misalignment);
562 set_excp_vector(EXCEP_BUSERROR, bus_error); 592 set_excp_vector(EXCEP_BUSERROR, handle_exception);
563 set_excp_vector(EXCEP_ILLINSACC, insn_acc_error); 593 set_excp_vector(EXCEP_ILLINSACC, handle_exception);
564 set_excp_vector(EXCEP_ILLDATACC, data_acc_error); 594 set_excp_vector(EXCEP_ILLDATACC, handle_exception);
565 set_excp_vector(EXCEP_IOINSACC, insn_acc_error); 595 set_excp_vector(EXCEP_IOINSACC, handle_exception);
566 set_excp_vector(EXCEP_PRIVINSACC, insn_acc_error); 596 set_excp_vector(EXCEP_PRIVINSACC, handle_exception);
567 set_excp_vector(EXCEP_PRIVDATACC, data_acc_error); 597 set_excp_vector(EXCEP_PRIVDATACC, handle_exception);
568 set_excp_vector(EXCEP_DATINSACC, insn_acc_error); 598 set_excp_vector(EXCEP_DATINSACC, handle_exception);
569 set_excp_vector(EXCEP_FPU_UNIMPINS, fpu_invalid_op); 599 set_excp_vector(EXCEP_FPU_UNIMPINS, handle_exception);
570 set_excp_vector(EXCEP_FPU_OPERATION, fpu_exception); 600 set_excp_vector(EXCEP_FPU_OPERATION, fpu_exception);
571 601
572 set_excp_vector(EXCEP_NMI, nmi); 602 set_excp_vector(EXCEP_NMI, nmi);
573 603
574 set_excp_vector(EXCEP_SYSCALL1, unsupported_syscall); 604 set_excp_vector(EXCEP_SYSCALL1, handle_exception);
575 set_excp_vector(EXCEP_SYSCALL2, unsupported_syscall); 605 set_excp_vector(EXCEP_SYSCALL2, handle_exception);
576 set_excp_vector(EXCEP_SYSCALL3, unsupported_syscall); 606 set_excp_vector(EXCEP_SYSCALL3, handle_exception);
577 set_excp_vector(EXCEP_SYSCALL4, unsupported_syscall); 607 set_excp_vector(EXCEP_SYSCALL4, handle_exception);
578 set_excp_vector(EXCEP_SYSCALL5, unsupported_syscall); 608 set_excp_vector(EXCEP_SYSCALL5, handle_exception);
579 set_excp_vector(EXCEP_SYSCALL6, unsupported_syscall); 609 set_excp_vector(EXCEP_SYSCALL6, handle_exception);
580 set_excp_vector(EXCEP_SYSCALL7, unsupported_syscall); 610 set_excp_vector(EXCEP_SYSCALL7, handle_exception);
581 set_excp_vector(EXCEP_SYSCALL8, unsupported_syscall); 611 set_excp_vector(EXCEP_SYSCALL8, handle_exception);
582 set_excp_vector(EXCEP_SYSCALL9, unsupported_syscall); 612 set_excp_vector(EXCEP_SYSCALL9, handle_exception);
583 set_excp_vector(EXCEP_SYSCALL10, unsupported_syscall); 613 set_excp_vector(EXCEP_SYSCALL10, handle_exception);
584 set_excp_vector(EXCEP_SYSCALL11, unsupported_syscall); 614 set_excp_vector(EXCEP_SYSCALL11, handle_exception);
585 set_excp_vector(EXCEP_SYSCALL12, unsupported_syscall); 615 set_excp_vector(EXCEP_SYSCALL12, handle_exception);
586 set_excp_vector(EXCEP_SYSCALL13, unsupported_syscall); 616 set_excp_vector(EXCEP_SYSCALL13, handle_exception);
587 set_excp_vector(EXCEP_SYSCALL14, unsupported_syscall); 617 set_excp_vector(EXCEP_SYSCALL14, handle_exception);
588 set_excp_vector(EXCEP_SYSCALL15, unsupported_syscall); 618 set_excp_vector(EXCEP_SYSCALL15, handle_exception);
589} 619}
590 620
591/* 621/*
diff --git a/arch/mn10300/mm/Kconfig.cache b/arch/mn10300/mm/Kconfig.cache
index c4fd923a55a0..bfbe52691f2c 100644
--- a/arch/mn10300/mm/Kconfig.cache
+++ b/arch/mn10300/mm/Kconfig.cache
@@ -99,3 +99,49 @@ config MN10300_CACHE_INV_ICACHE
99 help 99 help
100 Set if we need the icache to be invalidated, even if the dcache is in 100 Set if we need the icache to be invalidated, even if the dcache is in
101 write-through mode and doesn't need flushing. 101 write-through mode and doesn't need flushing.
102
103#
104# The kernel debugger gets its own separate cache flushing functions
105#
106config MN10300_DEBUGGER_CACHE_FLUSH_BY_TAG
107 def_bool y if KERNEL_DEBUGGER && \
108 MN10300_CACHE_WBACK && \
109 !MN10300_CACHE_SNOOP && \
110 MN10300_CACHE_MANAGE_BY_TAG
111 help
112 Set if the debugger needs to flush the dcache and invalidate the
113 icache using the cache tag registers to make breakpoints work.
114
115config MN10300_DEBUGGER_CACHE_FLUSH_BY_REG
116 def_bool y if KERNEL_DEBUGGER && \
117 MN10300_CACHE_WBACK && \
118 !MN10300_CACHE_SNOOP && \
119 MN10300_CACHE_MANAGE_BY_REG
120 help
121 Set if the debugger needs to flush the dcache and invalidate the
122 icache using automatic purge registers to make breakpoints work.
123
124config MN10300_DEBUGGER_CACHE_INV_BY_TAG
125 def_bool y if KERNEL_DEBUGGER && \
126 MN10300_CACHE_WTHRU && \
127 !MN10300_CACHE_SNOOP && \
128 MN10300_CACHE_MANAGE_BY_TAG
129 help
130 Set if the debugger needs to invalidate the icache using the cache
131 tag registers to make breakpoints work.
132
133config MN10300_DEBUGGER_CACHE_INV_BY_REG
134 def_bool y if KERNEL_DEBUGGER && \
135 MN10300_CACHE_WTHRU && \
136 !MN10300_CACHE_SNOOP && \
137 MN10300_CACHE_MANAGE_BY_REG
138 help
139 Set if the debugger needs to invalidate the icache using automatic
140 purge registers to make breakpoints work.
141
142config MN10300_DEBUGGER_CACHE_NO_FLUSH
143 def_bool y if KERNEL_DEBUGGER && \
144 (MN10300_CACHE_DISABLED || MN10300_CACHE_SNOOP)
145 help
146 Set if the debugger does not need to flush the dcache and/or
147 invalidate the icache to make breakpoints work.
diff --git a/arch/mn10300/mm/Makefile b/arch/mn10300/mm/Makefile
index 203fee23f7d7..11f38466ac28 100644
--- a/arch/mn10300/mm/Makefile
+++ b/arch/mn10300/mm/Makefile
@@ -13,6 +13,15 @@ cacheflush-$(CONFIG_MN10300_CACHE_INV_BY_REG) += cache-inv-by-reg.o
13cacheflush-$(CONFIG_MN10300_CACHE_FLUSH_BY_TAG) += cache-flush-by-tag.o 13cacheflush-$(CONFIG_MN10300_CACHE_FLUSH_BY_TAG) += cache-flush-by-tag.o
14cacheflush-$(CONFIG_MN10300_CACHE_FLUSH_BY_REG) += cache-flush-by-reg.o 14cacheflush-$(CONFIG_MN10300_CACHE_FLUSH_BY_REG) += cache-flush-by-reg.o
15 15
16cacheflush-$(CONFIG_MN10300_DEBUGGER_CACHE_FLUSH_BY_TAG) += \
17 cache-dbg-flush-by-tag.o cache-dbg-inv-by-tag.o
18cacheflush-$(CONFIG_MN10300_DEBUGGER_CACHE_FLUSH_BY_REG) += \
19 cache-dbg-flush-by-reg.o
20cacheflush-$(CONFIG_MN10300_DEBUGGER_CACHE_INV_BY_TAG) += \
21 cache-dbg-inv-by-tag.o cache-dbg-inv.o
22cacheflush-$(CONFIG_MN10300_DEBUGGER_CACHE_INV_BY_REG) += \
23 cache-dbg-inv-by-reg.o cache-dbg-inv.o
24
16cacheflush-$(CONFIG_MN10300_CACHE_DISABLED) := cache-disabled.o 25cacheflush-$(CONFIG_MN10300_CACHE_DISABLED) := cache-disabled.o
17 26
18obj-y := \ 27obj-y := \
diff --git a/arch/mn10300/mm/cache-dbg-flush-by-reg.S b/arch/mn10300/mm/cache-dbg-flush-by-reg.S
new file mode 100644
index 000000000000..665919f2ab62
--- /dev/null
+++ b/arch/mn10300/mm/cache-dbg-flush-by-reg.S
@@ -0,0 +1,160 @@
1/* MN10300 CPU cache invalidation routines, using automatic purge registers
2 *
3 * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/sys.h>
12#include <linux/linkage.h>
13#include <asm/smp.h>
14#include <asm/page.h>
15#include <asm/cache.h>
16#include <asm/irqflags.h>
17#include <asm/cacheflush.h>
18#include "cache.inc"
19
20 .am33_2
21
22###############################################################################
23#
24# void debugger_local_cache_flushinv(void)
25# Flush the entire data cache back to RAM and invalidate the icache
26#
27###############################################################################
28 ALIGN
29 .globl debugger_local_cache_flushinv
30 .type debugger_local_cache_flushinv,@function
31debugger_local_cache_flushinv:
32 #
33 # firstly flush the dcache
34 #
35 movhu (CHCTR),d0
36 btst CHCTR_DCEN|CHCTR_ICEN,d0
37 beq debugger_local_cache_flushinv_end
38
39 mov DCPGCR,a0
40
41 mov epsw,d1
42 and ~EPSW_IE,epsw
43 or EPSW_NMID,epsw
44 nop
45
46 btst CHCTR_DCEN,d0
47 beq debugger_local_cache_flushinv_no_dcache
48
49 # wait for busy bit of area purge
50 setlb
51 mov (a0),d0
52 btst DCPGCR_DCPGBSY,d0
53 lne
54
55 # set mask
56 clr d0
57 mov d0,(DCPGMR)
58
59 # area purge
60 #
61 # DCPGCR = DCPGCR_DCP
62 #
63 mov DCPGCR_DCP,d0
64 mov d0,(a0)
65
66 # wait for busy bit of area purge
67 setlb
68 mov (a0),d0
69 btst DCPGCR_DCPGBSY,d0
70 lne
71
72debugger_local_cache_flushinv_no_dcache:
73 #
74 # secondly, invalidate the icache if it is enabled
75 #
76 mov CHCTR,a0
77 movhu (a0),d0
78 btst CHCTR_ICEN,d0
79 beq debugger_local_cache_flushinv_done
80
81 invalidate_icache 0
82
83debugger_local_cache_flushinv_done:
84 mov d1,epsw
85
86debugger_local_cache_flushinv_end:
87 ret [],0
88 .size debugger_local_cache_flushinv,.-debugger_local_cache_flushinv
89
90###############################################################################
91#
92# void debugger_local_cache_flushinv_one(u8 *addr)
93#
94# Invalidate one particular cacheline if it's in the icache
95#
96###############################################################################
97 ALIGN
98 .globl debugger_local_cache_flushinv_one
99 .type debugger_local_cache_flushinv_one,@function
100debugger_local_cache_flushinv_one:
101 movhu (CHCTR),d1
102 btst CHCTR_DCEN|CHCTR_ICEN,d1
103 beq debugger_local_cache_flushinv_one_end
104 btst CHCTR_DCEN,d1
105 beq debugger_local_cache_flushinv_one_no_dcache
106
107 # round cacheline addr down
108 and L1_CACHE_TAG_MASK,d0
109 mov d0,a1
110 mov d0,d1
111
112 # determine the dcache purge control reg address
113 mov DCACHE_PURGE(0,0),a0
114 and L1_CACHE_TAG_ENTRY,d0
115 add d0,a0
116
117 # retain valid entries in the cache
118 or L1_CACHE_TAG_VALID,d1
119
120 # conditionally purge this line in all ways
121 mov d1,(L1_CACHE_WAYDISP*0,a0)
122
123debugger_local_cache_flushinv_no_dcache:
124 #
125 # now try to flush the icache
126 #
127 mov CHCTR,a0
128 movhu (a0),d0
129 btst CHCTR_ICEN,d0
130 beq mn10300_local_icache_inv_range_reg_end
131
132 LOCAL_CLI_SAVE(d1)
133
134 mov ICIVCR,a0
135
136 # wait for the invalidator to quiesce
137 setlb
138 mov (a0),d0
139 btst ICIVCR_ICIVBSY,d0
140 lne
141
142 # set the mask
143 mov L1_CACHE_TAG_MASK,d0
144 mov d0,(ICIVMR)
145
146 # invalidate the cache line at the given address
147 or ICIVCR_ICI,a1
148 mov a1,(a0)
149
150 # wait for the invalidator to quiesce again
151 setlb
152 mov (a0),d0
153 btst ICIVCR_ICIVBSY,d0
154 lne
155
156 LOCAL_IRQ_RESTORE(d1)
157
158debugger_local_cache_flushinv_one_end:
159 ret [],0
160 .size debugger_local_cache_flushinv_one,.-debugger_local_cache_flushinv_one
diff --git a/arch/mn10300/mm/cache-dbg-flush-by-tag.S b/arch/mn10300/mm/cache-dbg-flush-by-tag.S
new file mode 100644
index 000000000000..bf56930e6e70
--- /dev/null
+++ b/arch/mn10300/mm/cache-dbg-flush-by-tag.S
@@ -0,0 +1,114 @@
1/* MN10300 CPU cache invalidation routines, using direct tag flushing
2 *
3 * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/sys.h>
12#include <linux/linkage.h>
13#include <asm/smp.h>
14#include <asm/page.h>
15#include <asm/cache.h>
16#include <asm/irqflags.h>
17#include <asm/cacheflush.h>
18#include "cache.inc"
19
20 .am33_2
21
22###############################################################################
23#
24# void debugger_local_cache_flushinv(void)
25#
26# Flush the entire data cache back to RAM and invalidate the icache
27#
28###############################################################################
29 ALIGN
30 .globl debugger_local_cache_flushinv
31 .type debugger_local_cache_flushinv,@function
32debugger_local_cache_flushinv:
33 #
34 # firstly flush the dcache
35 #
36 movhu (CHCTR),d0
37 btst CHCTR_DCEN|CHCTR_ICEN,d0
38 beq debugger_local_cache_flushinv_end
39
40 btst CHCTR_DCEN,d0
41 beq debugger_local_cache_flushinv_no_dcache
42
43 # read the addresses tagged in the cache's tag RAM and attempt to flush
44 # those addresses specifically
45 # - we rely on the hardware to filter out invalid tag entry addresses
46 mov DCACHE_TAG(0,0),a0 # dcache tag RAM access address
47 mov DCACHE_PURGE(0,0),a1 # dcache purge request address
48 mov L1_CACHE_NWAYS*L1_CACHE_NENTRIES,e0 # total number of entries
49
50mn10300_local_dcache_flush_loop:
51 mov (a0),d0
52 and L1_CACHE_TAG_MASK,d0
53 or L1_CACHE_TAG_VALID,d0 # retain valid entries in the
54 # cache
55 mov d0,(a1) # conditional purge
56
57 add L1_CACHE_BYTES,a0
58 add L1_CACHE_BYTES,a1
59 add -1,e0
60 bne mn10300_local_dcache_flush_loop
61
62debugger_local_cache_flushinv_no_dcache:
63 #
64 # secondly, invalidate the icache if it is enabled
65 #
66 mov CHCTR,a0
67 movhu (a0),d0
68 btst CHCTR_ICEN,d0
69 beq debugger_local_cache_flushinv_end
70
71 invalidate_icache 1
72
73debugger_local_cache_flushinv_end:
74 ret [],0
75 .size debugger_local_cache_flushinv,.-debugger_local_cache_flushinv
76
77###############################################################################
78#
79# void debugger_local_cache_flushinv_one(u8 *addr)
80#
81# Invalidate one particular cacheline if it's in the icache
82#
83###############################################################################
84 ALIGN
85 .globl debugger_local_cache_flushinv_one
86 .type debugger_local_cache_flushinv_one,@function
87debugger_local_cache_flushinv_one:
88 movhu (CHCTR),d1
89 btst CHCTR_DCEN|CHCTR_ICEN,d1
90 beq debugger_local_cache_flushinv_one_end
91 btst CHCTR_DCEN,d1
92 beq debugger_local_cache_flushinv_one_icache
93
94 # round cacheline addr down
95 and L1_CACHE_TAG_MASK,d0
96 mov d0,a1
97
98 # determine the dcache purge control reg address
99 mov DCACHE_PURGE(0,0),a0
100 and L1_CACHE_TAG_ENTRY,d0
101 add d0,a0
102
103 # retain valid entries in the cache
104 or L1_CACHE_TAG_VALID,a1
105
106 # conditionally purge this line in all ways
107 mov a1,(L1_CACHE_WAYDISP*0,a0)
108
109 # now go and do the icache
110 bra debugger_local_cache_flushinv_one_icache
111
112debugger_local_cache_flushinv_one_end:
113 ret [],0
114 .size debugger_local_cache_flushinv_one,.-debugger_local_cache_flushinv_one
diff --git a/arch/mn10300/mm/cache-dbg-inv-by-reg.S b/arch/mn10300/mm/cache-dbg-inv-by-reg.S
new file mode 100644
index 000000000000..c4e6252941b1
--- /dev/null
+++ b/arch/mn10300/mm/cache-dbg-inv-by-reg.S
@@ -0,0 +1,69 @@
1/* MN10300 CPU cache invalidation routines, using automatic purge registers
2 *
3 * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/sys.h>
12#include <linux/linkage.h>
13#include <asm/cache.h>
14#include <asm/irqflags.h>
15#include <asm/cacheflush.h>
16#include "cache.inc"
17
18 .am33_2
19
20 .globl debugger_local_cache_flushinv_one
21
22###############################################################################
23#
24# void debugger_local_cache_flushinv_one(u8 *addr)
25#
26# Invalidate one particular cacheline if it's in the icache
27#
28###############################################################################
29 ALIGN
30 .globl debugger_local_cache_flushinv_one
31 .type debugger_local_cache_flushinv_one,@function
32debugger_local_cache_flushinv_one:
33 mov d0,a1
34
35 mov CHCTR,a0
36 movhu (a0),d0
37 btst CHCTR_ICEN,d0
38 beq mn10300_local_icache_inv_range_reg_end
39
40 LOCAL_CLI_SAVE(d1)
41
42 mov ICIVCR,a0
43
44 # wait for the invalidator to quiesce
45 setlb
46 mov (a0),d0
47 btst ICIVCR_ICIVBSY,d0
48 lne
49
50 # set the mask
51 mov ~L1_CACHE_TAG_MASK,d0
52 mov d0,(ICIVMR)
53
54 # invalidate the cache line at the given address
55 and ~L1_CACHE_TAG_MASK,a1
56 or ICIVCR_ICI,a1
57 mov a1,(a0)
58
59 # wait for the invalidator to quiesce again
60 setlb
61 mov (a0),d0
62 btst ICIVCR_ICIVBSY,d0
63 lne
64
65 LOCAL_IRQ_RESTORE(d1)
66
67mn10300_local_icache_inv_range_reg_end:
68 ret [],0
69 .size debugger_local_cache_flushinv_one,.-debugger_local_cache_flushinv_one
diff --git a/arch/mn10300/mm/cache-dbg-inv-by-tag.S b/arch/mn10300/mm/cache-dbg-inv-by-tag.S
new file mode 100644
index 000000000000..d8ec821e5f88
--- /dev/null
+++ b/arch/mn10300/mm/cache-dbg-inv-by-tag.S
@@ -0,0 +1,120 @@
1/* MN10300 CPU cache invalidation routines, using direct tag flushing
2 *
3 * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/sys.h>
12#include <linux/linkage.h>
13#include <asm/smp.h>
14#include <asm/page.h>
15#include <asm/cache.h>
16#include <asm/irqflags.h>
17#include <asm/cacheflush.h>
18#include "cache.inc"
19
20 .am33_2
21
22 .globl debugger_local_cache_flushinv_one_icache
23
24###############################################################################
25#
26# void debugger_local_cache_flushinv_one(u8 *addr)
27#
28# Invalidate one particular cacheline if it's in the icache
29#
30###############################################################################
31 ALIGN
32 .globl debugger_local_cache_flushinv_one_icache
33 .type debugger_local_cache_flushinv_one_icache,@function
34debugger_local_cache_flushinv_one_icache:
35 movm [d3,a2],(sp)
36
37 mov CHCTR,a2
38 movhu (a2),d0
39 btst CHCTR_ICEN,d0
40 beq debugger_local_cache_flushinv_one_icache_end
41
42 mov d0,a1
43 and L1_CACHE_TAG_MASK,a1
44
45 # read the tags from the tag RAM, and if they indicate a matching valid
46 # cache line then we invalidate that line
47 mov ICACHE_TAG(0,0),a0
48 mov a1,d0
49 and L1_CACHE_TAG_ENTRY,d0
50 add d0,a0 # starting icache tag RAM
51 # access address
52
53 and ~(L1_CACHE_DISPARITY-1),a1 # determine comparator base
54 or L1_CACHE_TAG_VALID,a1
55 mov L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_VALID,d1
56
57 LOCAL_CLI_SAVE(d3)
58
59 # disable the icache
60 movhu (a2),d0
61 and ~CHCTR_ICEN,d0
62 movhu d0,(a2)
63
64 # and wait for it to calm down
65 setlb
66 movhu (a2),d0
67 btst CHCTR_ICBUSY,d0
68 lne
69
70 # check all the way tags for this cache entry
71 mov (a0),d0 # read the tag in the way 0 slot
72 xor a1,d0
73 and d1,d0
74 beq debugger_local_icache_kill # jump if matched
75
76 add L1_CACHE_WAYDISP,a0
77 mov (a0),d0 # read the tag in the way 1 slot
78 xor a1,d0
79 and d1,d0
80 beq debugger_local_icache_kill # jump if matched
81
82 add L1_CACHE_WAYDISP,a0
83 mov (a0),d0 # read the tag in the way 2 slot
84 xor a1,d0
85 and d1,d0
86 beq debugger_local_icache_kill # jump if matched
87
88 add L1_CACHE_WAYDISP,a0
89 mov (a0),d0 # read the tag in the way 3 slot
90 xor a1,d0
91 and d1,d0
92 bne debugger_local_icache_finish # jump if not matched
93
94debugger_local_icache_kill:
95 mov d0,(a0) # kill the tag (D0 is 0 at this point)
96
97debugger_local_icache_finish:
98 # wait for the cache to finish what it's doing
99 setlb
100 movhu (a2),d0
101 btst CHCTR_ICBUSY,d0
102 lne
103
104 # and reenable it
105 or CHCTR_ICEN,d0
106 movhu d0,(a2)
107 movhu (a2),d0
108
109 # re-enable interrupts
110 LOCAL_IRQ_RESTORE(d3)
111
112debugger_local_cache_flushinv_one_icache_end:
113 ret [d3,a2],8
114 .size debugger_local_cache_flushinv_one_icache,.-debugger_local_cache_flushinv_one_icache
115
116#ifdef CONFIG_MN10300_DEBUGGER_CACHE_INV_BY_TAG
117 .globl debugger_local_cache_flushinv_one
118 .type debugger_local_cache_flushinv_one,@function
119debugger_local_cache_flushinv_one = debugger_local_cache_flushinv_one_icache
120#endif
diff --git a/arch/mn10300/mm/cache-dbg-inv.S b/arch/mn10300/mm/cache-dbg-inv.S
new file mode 100644
index 000000000000..eba2d6dca066
--- /dev/null
+++ b/arch/mn10300/mm/cache-dbg-inv.S
@@ -0,0 +1,47 @@
1/* MN10300 CPU cache invalidation routines
2 *
3 * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/sys.h>
12#include <linux/linkage.h>
13#include <asm/smp.h>
14#include <asm/page.h>
15#include <asm/cache.h>
16#include <asm/irqflags.h>
17#include <asm/cacheflush.h>
18#include "cache.inc"
19
20 .am33_2
21
22 .globl debugger_local_cache_flushinv
23
24###############################################################################
25#
26# void debugger_local_cache_flushinv(void)
27#
28# Invalidate the entire icache
29#
30###############################################################################
31 ALIGN
32 .globl debugger_local_cache_flushinv
33 .type debugger_local_cache_flushinv,@function
34debugger_local_cache_flushinv:
35 #
36 # we only need to invalidate the icache in this cache mode
37 #
38 mov CHCTR,a0
39 movhu (a0),d0
40 btst CHCTR_ICEN,d0
41 beq debugger_local_cache_flushinv_end
42
43 invalidate_icache 1
44
45debugger_local_cache_flushinv_end:
46 ret [],0
47 .size debugger_local_cache_flushinv,.-debugger_local_cache_flushinv
diff --git a/arch/mn10300/mm/cache-flush-by-tag.S b/arch/mn10300/mm/cache-flush-by-tag.S
index 5cd6a27dd63e..1ddc06849242 100644
--- a/arch/mn10300/mm/cache-flush-by-tag.S
+++ b/arch/mn10300/mm/cache-flush-by-tag.S
@@ -62,7 +62,7 @@ mn10300_local_dcache_flush:
62 62
63mn10300_local_dcache_flush_loop: 63mn10300_local_dcache_flush_loop:
64 mov (a0),d0 64 mov (a0),d0
65 and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d0 65 and L1_CACHE_TAG_MASK,d0
66 or L1_CACHE_TAG_VALID,d0 # retain valid entries in the 66 or L1_CACHE_TAG_VALID,d0 # retain valid entries in the
67 # cache 67 # cache
68 mov d0,(a1) # conditional purge 68 mov d0,(a1) # conditional purge
@@ -112,11 +112,11 @@ mn10300_local_dcache_flush_range:
1121: 1121:
113 113
114 # round start addr down 114 # round start addr down
115 and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d0 115 and L1_CACHE_TAG_MASK,d0
116 mov d0,a1 116 mov d0,a1
117 117
118 add L1_CACHE_BYTES,d1 # round end addr up 118 add L1_CACHE_BYTES,d1 # round end addr up
119 and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d1 119 and L1_CACHE_TAG_MASK,d1
120 120
121 # write a request to flush all instances of an address from the cache 121 # write a request to flush all instances of an address from the cache
122 mov DCACHE_PURGE(0,0),a0 122 mov DCACHE_PURGE(0,0),a0
@@ -215,12 +215,11 @@ mn10300_local_dcache_flush_inv_range:
215 bra mn10300_local_dcache_flush_inv 215 bra mn10300_local_dcache_flush_inv
2161: 2161:
217 217
218 and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d0 # round start 218 and L1_CACHE_TAG_MASK,d0 # round start addr down
219 # addr down
220 mov d0,a1 219 mov d0,a1
221 220
222 add L1_CACHE_BYTES,d1 # round end addr up 221 add L1_CACHE_BYTES,d1 # round end addr up
223 and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d1 222 and L1_CACHE_TAG_MASK,d1
224 223
225 # write a request to flush and invalidate all instances of an address 224 # write a request to flush and invalidate all instances of an address
226 # from the cache 225 # from the cache
diff --git a/arch/mn10300/mm/cache-inv-by-reg.S b/arch/mn10300/mm/cache-inv-by-reg.S
index c8950861ed77..a60825b91e77 100644
--- a/arch/mn10300/mm/cache-inv-by-reg.S
+++ b/arch/mn10300/mm/cache-inv-by-reg.S
@@ -15,6 +15,7 @@
15#include <asm/cache.h> 15#include <asm/cache.h>
16#include <asm/irqflags.h> 16#include <asm/irqflags.h>
17#include <asm/cacheflush.h> 17#include <asm/cacheflush.h>
18#include "cache.inc"
18 19
19#define mn10300_local_dcache_inv_range_intr_interval \ 20#define mn10300_local_dcache_inv_range_intr_interval \
20 +((1 << MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL) - 1) 21 +((1 << MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL) - 1)
@@ -62,10 +63,7 @@ mn10300_local_icache_inv:
62 btst CHCTR_ICEN,d0 63 btst CHCTR_ICEN,d0
63 beq mn10300_local_icache_inv_end 64 beq mn10300_local_icache_inv_end
64 65
65 # invalidate 66 invalidate_icache 1
66 or CHCTR_ICINV,d0
67 movhu d0,(a0)
68 movhu (a0),d0
69 67
70mn10300_local_icache_inv_end: 68mn10300_local_icache_inv_end:
71 ret [],0 69 ret [],0
@@ -87,11 +85,8 @@ mn10300_local_dcache_inv:
87 btst CHCTR_DCEN,d0 85 btst CHCTR_DCEN,d0
88 beq mn10300_local_dcache_inv_end 86 beq mn10300_local_dcache_inv_end
89 87
90 # invalidate 88 invalidate_dcache 1
91 or CHCTR_DCINV,d0 89
92 movhu d0,(a0)
93 movhu (a0),d0
94
95mn10300_local_dcache_inv_end: 90mn10300_local_dcache_inv_end:
96 ret [],0 91 ret [],0
97 .size mn10300_local_dcache_inv,.-mn10300_local_dcache_inv 92 .size mn10300_local_dcache_inv,.-mn10300_local_dcache_inv
@@ -121,9 +116,9 @@ mn10300_local_dcache_inv_range:
121 # and if they're not cacheline-aligned, we must flush any bits outside 116 # and if they're not cacheline-aligned, we must flush any bits outside
122 # the range that share cachelines with stuff inside the range 117 # the range that share cachelines with stuff inside the range
123#ifdef CONFIG_MN10300_CACHE_WBACK 118#ifdef CONFIG_MN10300_CACHE_WBACK
124 btst ~(L1_CACHE_BYTES-1),d0 119 btst ~L1_CACHE_TAG_MASK,d0
125 bne 1f 120 bne 1f
126 btst ~(L1_CACHE_BYTES-1),d1 121 btst ~L1_CACHE_TAG_MASK,d1
127 beq 2f 122 beq 2f
1281: 1231:
129 bra mn10300_local_dcache_flush_inv_range 124 bra mn10300_local_dcache_flush_inv_range
@@ -141,12 +136,11 @@ mn10300_local_dcache_inv_range:
141 # writeback mode, in which case we would be in flush and invalidate by 136 # writeback mode, in which case we would be in flush and invalidate by
142 # now 137 # now
143#ifndef CONFIG_MN10300_CACHE_WBACK 138#ifndef CONFIG_MN10300_CACHE_WBACK
144 and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d0 # round start 139 and L1_CACHE_TAG_MASK,d0 # round start addr down
145 # addr down
146 140
147 mov L1_CACHE_BYTES-1,d2 141 mov L1_CACHE_BYTES-1,d2
148 add d2,d1 142 add d2,d1
149 and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d1 # round end addr up 143 and L1_CACHE_TAG_MASK,d1 # round end addr up
150#endif /* !CONFIG_MN10300_CACHE_WBACK */ 144#endif /* !CONFIG_MN10300_CACHE_WBACK */
151 145
152 sub d0,d1,d2 # calculate the total size 146 sub d0,d1,d2 # calculate the total size
diff --git a/arch/mn10300/mm/cache-inv-by-tag.S b/arch/mn10300/mm/cache-inv-by-tag.S
index e9713b40c0ff..ccedce9c144d 100644
--- a/arch/mn10300/mm/cache-inv-by-tag.S
+++ b/arch/mn10300/mm/cache-inv-by-tag.S
@@ -15,6 +15,7 @@
15#include <asm/cache.h> 15#include <asm/cache.h>
16#include <asm/irqflags.h> 16#include <asm/irqflags.h>
17#include <asm/cacheflush.h> 17#include <asm/cacheflush.h>
18#include "cache.inc"
18 19
19#define mn10300_local_dcache_inv_range_intr_interval \ 20#define mn10300_local_dcache_inv_range_intr_interval \
20 +((1 << MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL) - 1) 21 +((1 << MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL) - 1)
@@ -70,43 +71,7 @@ mn10300_local_icache_inv:
70 btst CHCTR_ICEN,d0 71 btst CHCTR_ICEN,d0
71 beq mn10300_local_icache_inv_end 72 beq mn10300_local_icache_inv_end
72 73
73#if defined(CONFIG_AM33_2) || defined(CONFIG_AM33_3) 74 invalidate_icache 1
74 LOCAL_CLI_SAVE(d1)
75
76 # disable the icache
77 and ~CHCTR_ICEN,d0
78 movhu d0,(a0)
79
80 # and wait for it to calm down
81 setlb
82 movhu (a0),d0
83 btst CHCTR_ICBUSY,d0
84 lne
85
86 # invalidate
87 or CHCTR_ICINV,d0
88 movhu d0,(a0)
89
90 # wait for the cache to finish
91 mov CHCTR,a0
92 setlb
93 movhu (a0),d0
94 btst CHCTR_ICBUSY,d0
95 lne
96
97 # and reenable it
98 and ~CHCTR_ICINV,d0
99 or CHCTR_ICEN,d0
100 movhu d0,(a0)
101 movhu (a0),d0
102
103 LOCAL_IRQ_RESTORE(d1)
104#else /* CONFIG_AM33_2 || CONFIG_AM33_3 */
105 # invalidate
106 or CHCTR_ICINV,d0
107 movhu d0,(a0)
108 movhu (a0),d0
109#endif /* CONFIG_AM33_2 || CONFIG_AM33_3 */
110 75
111mn10300_local_icache_inv_end: 76mn10300_local_icache_inv_end:
112 ret [],0 77 ret [],0
@@ -128,43 +93,7 @@ mn10300_local_dcache_inv:
128 btst CHCTR_DCEN,d0 93 btst CHCTR_DCEN,d0
129 beq mn10300_local_dcache_inv_end 94 beq mn10300_local_dcache_inv_end
130 95
131#if defined(CONFIG_AM33_2) || defined(CONFIG_AM33_3) 96 invalidate_dcache 1
132 LOCAL_CLI_SAVE(d1)
133
134 # disable the dcache
135 and ~CHCTR_DCEN,d0
136 movhu d0,(a0)
137
138 # and wait for it to calm down
139 setlb
140 movhu (a0),d0
141 btst CHCTR_DCBUSY,d0
142 lne
143
144 # invalidate
145 or CHCTR_DCINV,d0
146 movhu d0,(a0)
147
148 # wait for the cache to finish
149 mov CHCTR,a0
150 setlb
151 movhu (a0),d0
152 btst CHCTR_DCBUSY,d0
153 lne
154
155 # and reenable it
156 and ~CHCTR_DCINV,d0
157 or CHCTR_DCEN,d0
158 movhu d0,(a0)
159 movhu (a0),d0
160
161 LOCAL_IRQ_RESTORE(d1)
162#else /* CONFIG_AM33_2 || CONFIG_AM33_3 */
163 # invalidate
164 or CHCTR_DCINV,d0
165 movhu d0,(a0)
166 movhu (a0),d0
167#endif /* CONFIG_AM33_2 || CONFIG_AM33_3 */
168 97
169mn10300_local_dcache_inv_end: 98mn10300_local_dcache_inv_end:
170 ret [],0 99 ret [],0
@@ -195,9 +124,9 @@ mn10300_local_dcache_inv_range:
195 # and if they're not cacheline-aligned, we must flush any bits outside 124 # and if they're not cacheline-aligned, we must flush any bits outside
196 # the range that share cachelines with stuff inside the range 125 # the range that share cachelines with stuff inside the range
197#ifdef CONFIG_MN10300_CACHE_WBACK 126#ifdef CONFIG_MN10300_CACHE_WBACK
198 btst ~(L1_CACHE_BYTES-1),d0 127 btst ~L1_CACHE_TAG_MASK,d0
199 bne 1f 128 bne 1f
200 btst ~(L1_CACHE_BYTES-1),d1 129 btst ~L1_CACHE_TAG_MASK,d1
201 beq 2f 130 beq 2f
2021: 1311:
203 bra mn10300_local_dcache_flush_inv_range 132 bra mn10300_local_dcache_flush_inv_range
@@ -212,11 +141,10 @@ mn10300_local_dcache_inv_range:
212 beq mn10300_local_dcache_inv_range_end 141 beq mn10300_local_dcache_inv_range_end
213 142
214#ifndef CONFIG_MN10300_CACHE_WBACK 143#ifndef CONFIG_MN10300_CACHE_WBACK
215 and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d0 # round start 144 and L1_CACHE_TAG_MASK,d0 # round start addr down
216 # addr down
217 145
218 add L1_CACHE_BYTES,d1 # round end addr up 146 add L1_CACHE_BYTES,d1 # round end addr up
219 and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d1 147 and L1_CACHE_TAG_MASK,d1
220#endif /* !CONFIG_MN10300_CACHE_WBACK */ 148#endif /* !CONFIG_MN10300_CACHE_WBACK */
221 mov d0,a1 149 mov d0,a1
222 150
diff --git a/arch/mn10300/mm/cache.inc b/arch/mn10300/mm/cache.inc
new file mode 100644
index 000000000000..394a119b9c73
--- /dev/null
+++ b/arch/mn10300/mm/cache.inc
@@ -0,0 +1,133 @@
1/* MN10300 CPU core caching macros -*- asm -*-
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12
13###############################################################################
14#
15# Invalidate the instruction cache.
16# A0: Should hold CHCTR
17# D0: Should have been read from CHCTR
18# D1: Will be clobbered
19#
20# On some cores it is necessary to disable the icache whilst we do this.
21#
22###############################################################################
23 .macro invalidate_icache,disable_irq
24
25#if defined(CONFIG_AM33_2) || defined(CONFIG_AM33_3)
26 .if \disable_irq
27 # don't want an interrupt routine seeing a disabled cache
28 mov epsw,d1
29 and ~EPSW_IE,epsw
30 or EPSW_NMID,epsw
31 nop
32 nop
33 .endif
34
35 # disable the icache
36 and ~CHCTR_ICEN,d0
37 movhu d0,(a0)
38
39 # and wait for it to calm down
40 setlb
41 movhu (a0),d0
42 btst CHCTR_ICBUSY,d0
43 lne
44
45 # invalidate
46 or CHCTR_ICINV,d0
47 movhu d0,(a0)
48
49 # wait for the cache to finish
50 setlb
51 movhu (a0),d0
52 btst CHCTR_ICBUSY,d0
53 lne
54
55 # and reenable it
56 or CHCTR_ICEN,d0
57 movhu d0,(a0)
58 movhu (a0),d0
59
60 .if \disable_irq
61 LOCAL_IRQ_RESTORE(d1)
62 .endif
63
64#else /* CONFIG_AM33_2 || CONFIG_AM33_3 */
65
66 # invalidate
67 or CHCTR_ICINV,d0
68 movhu d0,(a0)
69 movhu (a0),d0
70
71#endif /* CONFIG_AM33_2 || CONFIG_AM33_3 */
72 .endm
73
74###############################################################################
75#
76# Invalidate the data cache.
77# A0: Should hold CHCTR
78# D0: Should have been read from CHCTR
79# D1: Will be clobbered
80#
81# On some cores it is necessary to disable the dcache whilst we do this.
82#
83###############################################################################
84 .macro invalidate_dcache,disable_irq
85
86#if defined(CONFIG_AM33_2) || defined(CONFIG_AM33_3)
87 .if \disable_irq
88 # don't want an interrupt routine seeing a disabled cache
89 mov epsw,d1
90 and ~EPSW_IE,epsw
91 or EPSW_NMID,epsw
92 nop
93 nop
94 .endif
95
96 # disable the dcache
97 and ~CHCTR_DCEN,d0
98 movhu d0,(a0)
99
100 # and wait for it to calm down
101 setlb
102 movhu (a0),d0
103 btst CHCTR_DCBUSY,d0
104 lne
105
106 # invalidate
107 or CHCTR_DCINV,d0
108 movhu d0,(a0)
109
110 # wait for the cache to finish
111 setlb
112 movhu (a0),d0
113 btst CHCTR_DCBUSY,d0
114 lne
115
116 # and reenable it
117 or CHCTR_DCEN,d0
118 movhu d0,(a0)
119 movhu (a0),d0
120
121 .if \disable_irq
122 LOCAL_IRQ_RESTORE(d1)
123 .endif
124
125#else /* CONFIG_AM33_2 || CONFIG_AM33_3 */
126
127 # invalidate
128 or CHCTR_DCINV,d0
129 movhu d0,(a0)
130 movhu (a0),d0
131
132#endif /* CONFIG_AM33_2 || CONFIG_AM33_3 */
133 .endm
diff --git a/arch/mn10300/mm/fault.c b/arch/mn10300/mm/fault.c
index 59c3da49d9d9..0945409a8022 100644
--- a/arch/mn10300/mm/fault.c
+++ b/arch/mn10300/mm/fault.c
@@ -28,8 +28,9 @@
28#include <asm/uaccess.h> 28#include <asm/uaccess.h>
29#include <asm/pgalloc.h> 29#include <asm/pgalloc.h>
30#include <asm/hardirq.h> 30#include <asm/hardirq.h>
31#include <asm/gdb-stub.h>
32#include <asm/cpu-regs.h> 31#include <asm/cpu-regs.h>
32#include <asm/debugger.h>
33#include <asm/gdb-stub.h>
33 34
34/* 35/*
35 * Unlock any spinlocks which will prevent us from getting the 36 * Unlock any spinlocks which will prevent us from getting the
@@ -306,10 +307,8 @@ no_context:
306 printk(" printing pc:\n"); 307 printk(" printing pc:\n");
307 printk(KERN_ALERT "%08lx\n", regs->pc); 308 printk(KERN_ALERT "%08lx\n", regs->pc);
308 309
309#ifdef CONFIG_GDBSTUB 310 debugger_intercept(fault_code & 0x00010000 ? EXCEP_IAERROR : EXCEP_DAERROR,
310 gdbstub_intercept( 311 SIGSEGV, SEGV_ACCERR, regs);
311 regs, fault_code & 0x00010000 ? EXCEP_IAERROR : EXCEP_DAERROR);
312#endif
313 312
314 page = PTBR; 313 page = PTBR;
315 page = ((unsigned long *) __va(page))[address >> 22]; 314 page = ((unsigned long *) __va(page))[address >> 22];
diff --git a/arch/mn10300/proc-mn103e010/include/proc/cache.h b/arch/mn10300/proc-mn103e010/include/proc/cache.h
index c1528004163c..967d144f307e 100644
--- a/arch/mn10300/proc-mn103e010/include/proc/cache.h
+++ b/arch/mn10300/proc-mn103e010/include/proc/cache.h
@@ -23,6 +23,7 @@
23#define L1_CACHE_TAG_DIRTY 0x00000008 /* data cache tag dirty bit */ 23#define L1_CACHE_TAG_DIRTY 0x00000008 /* data cache tag dirty bit */
24#define L1_CACHE_TAG_ENTRY 0x00000ff0 /* cache tag entry address mask */ 24#define L1_CACHE_TAG_ENTRY 0x00000ff0 /* cache tag entry address mask */
25#define L1_CACHE_TAG_ADDRESS 0xfffff000 /* cache tag line address mask */ 25#define L1_CACHE_TAG_ADDRESS 0xfffff000 /* cache tag line address mask */
26#define L1_CACHE_TAG_MASK +(L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY)
26 27
27/* 28/*
28 * specification of the interval between interrupt checking intervals whilst 29 * specification of the interval between interrupt checking intervals whilst
diff --git a/arch/mn10300/proc-mn2ws0050/include/proc/cache.h b/arch/mn10300/proc-mn2ws0050/include/proc/cache.h
index cafd7b5b55b4..bcb5df2d892f 100644
--- a/arch/mn10300/proc-mn2ws0050/include/proc/cache.h
+++ b/arch/mn10300/proc-mn2ws0050/include/proc/cache.h
@@ -29,6 +29,7 @@
29#define L1_CACHE_TAG_DIRTY 0x00000008 /* data cache tag dirty bit */ 29#define L1_CACHE_TAG_DIRTY 0x00000008 /* data cache tag dirty bit */
30#define L1_CACHE_TAG_ENTRY 0x00000fe0 /* cache tag entry address mask */ 30#define L1_CACHE_TAG_ENTRY 0x00000fe0 /* cache tag entry address mask */
31#define L1_CACHE_TAG_ADDRESS 0xfffff000 /* cache tag line address mask */ 31#define L1_CACHE_TAG_ADDRESS 0xfffff000 /* cache tag line address mask */
32#define L1_CACHE_TAG_MASK +(L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY)
32 33
33/* 34/*
34 * specification of the interval between interrupt checking intervals whilst 35 * specification of the interval between interrupt checking intervals whilst
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index fafdf30bea9e..9b1f427cdc37 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -52,6 +52,10 @@ config GENERIC_FIND_NEXT_BIT
52 bool 52 bool
53 default y 53 default y
54 54
55config GENERIC_FIND_BIT_LE
56 bool
57 default y
58
55config GENERIC_BUG 59config GENERIC_BUG
56 bool 60 bool
57 default y 61 default y
diff --git a/arch/parisc/include/asm/bitops.h b/arch/parisc/include/asm/bitops.h
index 7a6ea10bd231..43c516fa17ff 100644
--- a/arch/parisc/include/asm/bitops.h
+++ b/arch/parisc/include/asm/bitops.h
@@ -222,7 +222,7 @@ static __inline__ int fls(int x)
222 222
223#ifdef __KERNEL__ 223#ifdef __KERNEL__
224 224
225#include <asm-generic/bitops/ext2-non-atomic.h> 225#include <asm-generic/bitops/le.h>
226 226
227/* '3' is bits per byte */ 227/* '3' is bits per byte */
228#define LE_BYTE_ADDR ((sizeof(unsigned long) - 1) << 3) 228#define LE_BYTE_ADDR ((sizeof(unsigned long) - 1) << 3)
@@ -234,6 +234,4 @@ static __inline__ int fls(int x)
234 234
235#endif /* __KERNEL__ */ 235#endif /* __KERNEL__ */
236 236
237#include <asm-generic/bitops/minix-le.h>
238
239#endif /* _PARISC_BITOPS_H */ 237#endif /* _PARISC_BITOPS_H */
diff --git a/arch/parisc/include/asm/types.h b/arch/parisc/include/asm/types.h
index bc164ddffb78..80e415c9936d 100644
--- a/arch/parisc/include/asm/types.h
+++ b/arch/parisc/include/asm/types.h
@@ -9,17 +9,4 @@ typedef unsigned short umode_t;
9 9
10#endif /* __ASSEMBLY__ */ 10#endif /* __ASSEMBLY__ */
11 11
12/*
13 * These aren't exported outside the kernel to avoid name space clashes
14 */
15#ifdef __KERNEL__
16
17#ifndef __ASSEMBLY__
18
19typedef u64 dma64_addr_t;
20
21#endif /* __ASSEMBLY__ */
22
23#endif /* __KERNEL__ */
24
25#endif 12#endif
diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c
index f4f4d700833a..b7ed8d7a9b33 100644
--- a/arch/parisc/mm/init.c
+++ b/arch/parisc/mm/init.c
@@ -544,7 +544,7 @@ void __init mem_init(void)
544unsigned long *empty_zero_page __read_mostly; 544unsigned long *empty_zero_page __read_mostly;
545EXPORT_SYMBOL(empty_zero_page); 545EXPORT_SYMBOL(empty_zero_page);
546 546
547void show_mem(void) 547void show_mem(unsigned int filter)
548{ 548{
549 int i,free = 0,total = 0,reserved = 0; 549 int i,free = 0,total = 0,reserved = 0;
550 int shared = 0, cached = 0; 550 int shared = 0, cached = 0;
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 71ba04721beb..3584e4d4a4ad 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -95,6 +95,10 @@ config GENERIC_FIND_NEXT_BIT
95 bool 95 bool
96 default y 96 default y
97 97
98config GENERIC_FIND_BIT_LE
99 bool
100 default y
101
98config GENERIC_GPIO 102config GENERIC_GPIO
99 bool 103 bool
100 help 104 help
@@ -768,11 +772,19 @@ config HAS_RAPIDIO
768 772
769config RAPIDIO 773config RAPIDIO
770 bool "RapidIO support" 774 bool "RapidIO support"
771 depends on HAS_RAPIDIO 775 depends on HAS_RAPIDIO || PCI
772 help 776 help
773 If you say Y here, the kernel will include drivers and 777 If you say Y here, the kernel will include drivers and
774 infrastructure code to support RapidIO interconnect devices. 778 infrastructure code to support RapidIO interconnect devices.
775 779
780config FSL_RIO
781 bool "Freescale Embedded SRIO Controller support"
782 depends on RAPIDIO && HAS_RAPIDIO
783 default "n"
784 ---help---
785 Include support for RapidIO controller on Freescale embedded
786 processors (MPC8548, MPC8641, etc).
787
776source "drivers/rapidio/Kconfig" 788source "drivers/rapidio/Kconfig"
777 789
778endmenu 790endmenu
diff --git a/arch/powerpc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h
index 8a7e9314c68a..2e561876fc89 100644
--- a/arch/powerpc/include/asm/bitops.h
+++ b/arch/powerpc/include/asm/bitops.h
@@ -281,68 +281,56 @@ unsigned long __arch_hweight64(__u64 w);
281 281
282/* Little-endian versions */ 282/* Little-endian versions */
283 283
284static __inline__ int test_le_bit(unsigned long nr, 284static __inline__ int test_bit_le(unsigned long nr,
285 __const__ unsigned long *addr) 285 __const__ void *addr)
286{ 286{
287 __const__ unsigned char *tmp = (__const__ unsigned char *) addr; 287 __const__ unsigned char *tmp = (__const__ unsigned char *) addr;
288 return (tmp[nr >> 3] >> (nr & 7)) & 1; 288 return (tmp[nr >> 3] >> (nr & 7)) & 1;
289} 289}
290 290
291#define __set_le_bit(nr, addr) \ 291static inline void __set_bit_le(int nr, void *addr)
292 __set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) 292{
293#define __clear_le_bit(nr, addr) \ 293 __set_bit(nr ^ BITOP_LE_SWIZZLE, addr);
294 __clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) 294}
295
296static inline void __clear_bit_le(int nr, void *addr)
297{
298 __clear_bit(nr ^ BITOP_LE_SWIZZLE, addr);
299}
300
301static inline int test_and_set_bit_le(int nr, void *addr)
302{
303 return test_and_set_bit(nr ^ BITOP_LE_SWIZZLE, addr);
304}
295 305
296#define test_and_set_le_bit(nr, addr) \ 306static inline int test_and_clear_bit_le(int nr, void *addr)
297 test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) 307{
298#define test_and_clear_le_bit(nr, addr) \ 308 return test_and_clear_bit(nr ^ BITOP_LE_SWIZZLE, addr);
299 test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) 309}
310
311static inline int __test_and_set_bit_le(int nr, void *addr)
312{
313 return __test_and_set_bit(nr ^ BITOP_LE_SWIZZLE, addr);
314}
300 315
301#define __test_and_set_le_bit(nr, addr) \ 316static inline int __test_and_clear_bit_le(int nr, void *addr)
302 __test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) 317{
303#define __test_and_clear_le_bit(nr, addr) \ 318 return __test_and_clear_bit(nr ^ BITOP_LE_SWIZZLE, addr);
304 __test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) 319}
305 320
306#define find_first_zero_le_bit(addr, size) generic_find_next_zero_le_bit((addr), (size), 0) 321#define find_first_zero_bit_le(addr, size) \
307unsigned long generic_find_next_zero_le_bit(const unsigned long *addr, 322 find_next_zero_bit_le((addr), (size), 0)
323unsigned long find_next_zero_bit_le(const void *addr,
308 unsigned long size, unsigned long offset); 324 unsigned long size, unsigned long offset);
309 325
310unsigned long generic_find_next_le_bit(const unsigned long *addr, 326unsigned long find_next_bit_le(const void *addr,
311 unsigned long size, unsigned long offset); 327 unsigned long size, unsigned long offset);
312/* Bitmap functions for the ext2 filesystem */ 328/* Bitmap functions for the ext2 filesystem */
313 329
314#define ext2_set_bit(nr,addr) \
315 __test_and_set_le_bit((nr), (unsigned long*)addr)
316#define ext2_clear_bit(nr, addr) \
317 __test_and_clear_le_bit((nr), (unsigned long*)addr)
318
319#define ext2_set_bit_atomic(lock, nr, addr) \ 330#define ext2_set_bit_atomic(lock, nr, addr) \
320 test_and_set_le_bit((nr), (unsigned long*)addr) 331 test_and_set_bit_le((nr), (unsigned long*)addr)
321#define ext2_clear_bit_atomic(lock, nr, addr) \ 332#define ext2_clear_bit_atomic(lock, nr, addr) \
322 test_and_clear_le_bit((nr), (unsigned long*)addr) 333 test_and_clear_bit_le((nr), (unsigned long*)addr)
323
324#define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr)
325
326#define ext2_find_first_zero_bit(addr, size) \
327 find_first_zero_le_bit((unsigned long*)addr, size)
328#define ext2_find_next_zero_bit(addr, size, off) \
329 generic_find_next_zero_le_bit((unsigned long*)addr, size, off)
330
331#define ext2_find_next_bit(addr, size, off) \
332 generic_find_next_le_bit((unsigned long *)addr, size, off)
333/* Bitmap functions for the minix filesystem. */
334
335#define minix_test_and_set_bit(nr,addr) \
336 __test_and_set_le_bit(nr, (unsigned long *)addr)
337#define minix_set_bit(nr,addr) \
338 __set_le_bit(nr, (unsigned long *)addr)
339#define minix_test_and_clear_bit(nr,addr) \
340 __test_and_clear_le_bit(nr, (unsigned long *)addr)
341#define minix_test_bit(nr,addr) \
342 test_le_bit(nr, (unsigned long *)addr)
343
344#define minix_find_first_zero_bit(addr,size) \
345 find_first_zero_le_bit((unsigned long *)addr, size)
346 334
347#include <asm-generic/bitops/sched.h> 335#include <asm-generic/bitops/sched.h>
348 336
diff --git a/arch/powerpc/include/asm/types.h b/arch/powerpc/include/asm/types.h
index e16a6b2d96f1..8947b9827bc4 100644
--- a/arch/powerpc/include/asm/types.h
+++ b/arch/powerpc/include/asm/types.h
@@ -44,8 +44,6 @@ typedef struct {
44 44
45typedef __vector128 vector128; 45typedef __vector128 vector128;
46 46
47typedef u64 dma64_addr_t;
48
49typedef struct { 47typedef struct {
50 unsigned long entry; 48 unsigned long entry;
51 unsigned long toc; 49 unsigned long toc;
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index 5c518ad3445c..913611105c1f 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -64,7 +64,7 @@ _GLOBAL(__setup_cpu_e500v2)
64 bl __e500_icache_setup 64 bl __e500_icache_setup
65 bl __e500_dcache_setup 65 bl __e500_dcache_setup
66 bl __setup_e500_ivors 66 bl __setup_e500_ivors
67#ifdef CONFIG_RAPIDIO 67#ifdef CONFIG_FSL_RIO
68 /* Ensure that RFXE is set */ 68 /* Ensure that RFXE is set */
69 mfspr r3,SPRN_HID1 69 mfspr r3,SPRN_HID1
70 oris r3,r3,HID1_RFXE@h 70 oris r3,r3,HID1_RFXE@h
diff --git a/arch/powerpc/kernel/crash_dump.c b/arch/powerpc/kernel/crash_dump.c
index 0a2af50243cb..424afb6b8fba 100644
--- a/arch/powerpc/kernel/crash_dump.c
+++ b/arch/powerpc/kernel/crash_dump.c
@@ -28,9 +28,6 @@
28#define DBG(fmt...) 28#define DBG(fmt...)
29#endif 29#endif
30 30
31/* Stores the physical address of elf header of crash image. */
32unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX;
33
34#ifndef CONFIG_RELOCATABLE 31#ifndef CONFIG_RELOCATABLE
35void __init reserve_kdump_trampoline(void) 32void __init reserve_kdump_trampoline(void)
36{ 33{
@@ -72,20 +69,6 @@ void __init setup_kdump_trampoline(void)
72} 69}
73#endif /* CONFIG_RELOCATABLE */ 70#endif /* CONFIG_RELOCATABLE */
74 71
75/*
76 * Note: elfcorehdr_addr is not just limited to vmcore. It is also used by
77 * is_kdump_kernel() to determine if we are booting after a panic. Hence
78 * ifdef it under CONFIG_CRASH_DUMP and not CONFIG_PROC_VMCORE.
79 */
80static int __init parse_elfcorehdr(char *p)
81{
82 if (p)
83 elfcorehdr_addr = memparse(p, &p);
84
85 return 1;
86}
87__setup("elfcorehdr=", parse_elfcorehdr);
88
89static int __init parse_savemaxmem(char *p) 72static int __init parse_savemaxmem(char *p)
90{ 73{
91 if (p) 74 if (p)
diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c
index fd8728729abc..142ab1008c3b 100644
--- a/arch/powerpc/kernel/vdso.c
+++ b/arch/powerpc/kernel/vdso.c
@@ -820,17 +820,17 @@ static int __init vdso_init(void)
820} 820}
821arch_initcall(vdso_init); 821arch_initcall(vdso_init);
822 822
823int in_gate_area_no_task(unsigned long addr) 823int in_gate_area_no_mm(unsigned long addr)
824{ 824{
825 return 0; 825 return 0;
826} 826}
827 827
828int in_gate_area(struct task_struct *task, unsigned long addr) 828int in_gate_area(struct mm_struct *mm, unsigned long addr)
829{ 829{
830 return 0; 830 return 0;
831} 831}
832 832
833struct vm_area_struct *get_gate_vma(struct task_struct *tsk) 833struct vm_area_struct *get_gate_vma(struct mm_struct *mm)
834{ 834{
835 return NULL; 835 return NULL;
836} 836}
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 9c2973479142..1e0c933ef772 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -20,7 +20,7 @@ obj-$(CONFIG_FSL_GTM) += fsl_gtm.o
20obj-$(CONFIG_MPC8xxx_GPIO) += mpc8xxx_gpio.o 20obj-$(CONFIG_MPC8xxx_GPIO) += mpc8xxx_gpio.o
21obj-$(CONFIG_FSL_85XX_CACHE_SRAM) += fsl_85xx_l2ctlr.o fsl_85xx_cache_sram.o 21obj-$(CONFIG_FSL_85XX_CACHE_SRAM) += fsl_85xx_l2ctlr.o fsl_85xx_cache_sram.o
22obj-$(CONFIG_SIMPLE_GPIO) += simple_gpio.o 22obj-$(CONFIG_SIMPLE_GPIO) += simple_gpio.o
23obj-$(CONFIG_RAPIDIO) += fsl_rio.o 23obj-$(CONFIG_FSL_RIO) += fsl_rio.o
24obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o 24obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
25obj-$(CONFIG_QUICC_ENGINE) += qe_lib/ 25obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
26obj-$(CONFIG_PPC_BESTCOMM) += bestcomm/ 26obj-$(CONFIG_PPC_BESTCOMM) += bestcomm/
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index 3eff2c3a9ad5..14232d57369c 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -482,7 +482,7 @@ fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid,
482} 482}
483 483
484/** 484/**
485 * rio_hw_add_outb_message - Add message to the MPC85xx outbound message queue 485 * fsl_add_outb_message - Add message to the MPC85xx outbound message queue
486 * @mport: Master port with outbound message queue 486 * @mport: Master port with outbound message queue
487 * @rdev: Target of outbound message 487 * @rdev: Target of outbound message
488 * @mbox: Outbound mailbox 488 * @mbox: Outbound mailbox
@@ -492,8 +492,8 @@ fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid,
492 * Adds the @buffer message to the MPC85xx outbound message queue. Returns 492 * Adds the @buffer message to the MPC85xx outbound message queue. Returns
493 * %0 on success or %-EINVAL on failure. 493 * %0 on success or %-EINVAL on failure.
494 */ 494 */
495int 495static int
496rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox, 496fsl_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox,
497 void *buffer, size_t len) 497 void *buffer, size_t len)
498{ 498{
499 struct rio_priv *priv = mport->priv; 499 struct rio_priv *priv = mport->priv;
@@ -502,9 +502,8 @@ rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox,
502 + priv->msg_tx_ring.tx_slot; 502 + priv->msg_tx_ring.tx_slot;
503 int ret = 0; 503 int ret = 0;
504 504
505 pr_debug 505 pr_debug("RIO: fsl_add_outb_message(): destid %4.4x mbox %d buffer " \
506 ("RIO: rio_hw_add_outb_message(): destid %4.4x mbox %d buffer %8.8x len %8.8x\n", 506 "%8.8x len %8.8x\n", rdev->destid, mbox, (int)buffer, len);
507 rdev->destid, mbox, (int)buffer, len);
508 507
509 if ((len < 8) || (len > RIO_MAX_MSG_SIZE)) { 508 if ((len < 8) || (len > RIO_MAX_MSG_SIZE)) {
510 ret = -EINVAL; 509 ret = -EINVAL;
@@ -554,8 +553,6 @@ rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox,
554 return ret; 553 return ret;
555} 554}
556 555
557EXPORT_SYMBOL_GPL(rio_hw_add_outb_message);
558
559/** 556/**
560 * fsl_rio_tx_handler - MPC85xx outbound message interrupt handler 557 * fsl_rio_tx_handler - MPC85xx outbound message interrupt handler
561 * @irq: Linux interrupt number 558 * @irq: Linux interrupt number
@@ -600,7 +597,7 @@ fsl_rio_tx_handler(int irq, void *dev_instance)
600} 597}
601 598
602/** 599/**
603 * rio_open_outb_mbox - Initialize MPC85xx outbound mailbox 600 * fsl_open_outb_mbox - Initialize MPC85xx outbound mailbox
604 * @mport: Master port implementing the outbound message unit 601 * @mport: Master port implementing the outbound message unit
605 * @dev_id: Device specific pointer to pass on event 602 * @dev_id: Device specific pointer to pass on event
606 * @mbox: Mailbox to open 603 * @mbox: Mailbox to open
@@ -610,7 +607,8 @@ fsl_rio_tx_handler(int irq, void *dev_instance)
610 * and enables the outbound message unit. Returns %0 on success and 607 * and enables the outbound message unit. Returns %0 on success and
611 * %-EINVAL or %-ENOMEM on failure. 608 * %-EINVAL or %-ENOMEM on failure.
612 */ 609 */
613int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries) 610static int
611fsl_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
614{ 612{
615 int i, j, rc = 0; 613 int i, j, rc = 0;
616 struct rio_priv *priv = mport->priv; 614 struct rio_priv *priv = mport->priv;
@@ -706,14 +704,14 @@ int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entr
706} 704}
707 705
708/** 706/**
709 * rio_close_outb_mbox - Shut down MPC85xx outbound mailbox 707 * fsl_close_outb_mbox - Shut down MPC85xx outbound mailbox
710 * @mport: Master port implementing the outbound message unit 708 * @mport: Master port implementing the outbound message unit
711 * @mbox: Mailbox to close 709 * @mbox: Mailbox to close
712 * 710 *
713 * Disables the outbound message unit, free all buffers, and 711 * Disables the outbound message unit, free all buffers, and
714 * frees the outbound message interrupt. 712 * frees the outbound message interrupt.
715 */ 713 */
716void rio_close_outb_mbox(struct rio_mport *mport, int mbox) 714static void fsl_close_outb_mbox(struct rio_mport *mport, int mbox)
717{ 715{
718 struct rio_priv *priv = mport->priv; 716 struct rio_priv *priv = mport->priv;
719 /* Disable inbound message unit */ 717 /* Disable inbound message unit */
@@ -770,7 +768,7 @@ fsl_rio_rx_handler(int irq, void *dev_instance)
770} 768}
771 769
772/** 770/**
773 * rio_open_inb_mbox - Initialize MPC85xx inbound mailbox 771 * fsl_open_inb_mbox - Initialize MPC85xx inbound mailbox
774 * @mport: Master port implementing the inbound message unit 772 * @mport: Master port implementing the inbound message unit
775 * @dev_id: Device specific pointer to pass on event 773 * @dev_id: Device specific pointer to pass on event
776 * @mbox: Mailbox to open 774 * @mbox: Mailbox to open
@@ -780,7 +778,8 @@ fsl_rio_rx_handler(int irq, void *dev_instance)
780 * and enables the inbound message unit. Returns %0 on success 778 * and enables the inbound message unit. Returns %0 on success
781 * and %-EINVAL or %-ENOMEM on failure. 779 * and %-EINVAL or %-ENOMEM on failure.
782 */ 780 */
783int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries) 781static int
782fsl_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
784{ 783{
785 int i, rc = 0; 784 int i, rc = 0;
786 struct rio_priv *priv = mport->priv; 785 struct rio_priv *priv = mport->priv;
@@ -844,14 +843,14 @@ int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entri
844} 843}
845 844
846/** 845/**
847 * rio_close_inb_mbox - Shut down MPC85xx inbound mailbox 846 * fsl_close_inb_mbox - Shut down MPC85xx inbound mailbox
848 * @mport: Master port implementing the inbound message unit 847 * @mport: Master port implementing the inbound message unit
849 * @mbox: Mailbox to close 848 * @mbox: Mailbox to close
850 * 849 *
851 * Disables the inbound message unit, free all buffers, and 850 * Disables the inbound message unit, free all buffers, and
852 * frees the inbound message interrupt. 851 * frees the inbound message interrupt.
853 */ 852 */
854void rio_close_inb_mbox(struct rio_mport *mport, int mbox) 853static void fsl_close_inb_mbox(struct rio_mport *mport, int mbox)
855{ 854{
856 struct rio_priv *priv = mport->priv; 855 struct rio_priv *priv = mport->priv;
857 /* Disable inbound message unit */ 856 /* Disable inbound message unit */
@@ -866,7 +865,7 @@ void rio_close_inb_mbox(struct rio_mport *mport, int mbox)
866} 865}
867 866
868/** 867/**
869 * rio_hw_add_inb_buffer - Add buffer to the MPC85xx inbound message queue 868 * fsl_add_inb_buffer - Add buffer to the MPC85xx inbound message queue
870 * @mport: Master port implementing the inbound message unit 869 * @mport: Master port implementing the inbound message unit
871 * @mbox: Inbound mailbox number 870 * @mbox: Inbound mailbox number
872 * @buf: Buffer to add to inbound queue 871 * @buf: Buffer to add to inbound queue
@@ -874,12 +873,12 @@ void rio_close_inb_mbox(struct rio_mport *mport, int mbox)
874 * Adds the @buf buffer to the MPC85xx inbound message queue. Returns 873 * Adds the @buf buffer to the MPC85xx inbound message queue. Returns
875 * %0 on success or %-EINVAL on failure. 874 * %0 on success or %-EINVAL on failure.
876 */ 875 */
877int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf) 876static int fsl_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf)
878{ 877{
879 int rc = 0; 878 int rc = 0;
880 struct rio_priv *priv = mport->priv; 879 struct rio_priv *priv = mport->priv;
881 880
882 pr_debug("RIO: rio_hw_add_inb_buffer(), msg_rx_ring.rx_slot %d\n", 881 pr_debug("RIO: fsl_add_inb_buffer(), msg_rx_ring.rx_slot %d\n",
883 priv->msg_rx_ring.rx_slot); 882 priv->msg_rx_ring.rx_slot);
884 883
885 if (priv->msg_rx_ring.virt_buffer[priv->msg_rx_ring.rx_slot]) { 884 if (priv->msg_rx_ring.virt_buffer[priv->msg_rx_ring.rx_slot]) {
@@ -898,17 +897,15 @@ int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf)
898 return rc; 897 return rc;
899} 898}
900 899
901EXPORT_SYMBOL_GPL(rio_hw_add_inb_buffer);
902
903/** 900/**
904 * rio_hw_get_inb_message - Fetch inbound message from the MPC85xx message unit 901 * fsl_get_inb_message - Fetch inbound message from the MPC85xx message unit
905 * @mport: Master port implementing the inbound message unit 902 * @mport: Master port implementing the inbound message unit
906 * @mbox: Inbound mailbox number 903 * @mbox: Inbound mailbox number
907 * 904 *
908 * Gets the next available inbound message from the inbound message queue. 905 * Gets the next available inbound message from the inbound message queue.
909 * A pointer to the message is returned on success or NULL on failure. 906 * A pointer to the message is returned on success or NULL on failure.
910 */ 907 */
911void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox) 908static void *fsl_get_inb_message(struct rio_mport *mport, int mbox)
912{ 909{
913 struct rio_priv *priv = mport->priv; 910 struct rio_priv *priv = mport->priv;
914 u32 phys_buf, virt_buf; 911 u32 phys_buf, virt_buf;
@@ -945,8 +942,6 @@ void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox)
945 return buf; 942 return buf;
946} 943}
947 944
948EXPORT_SYMBOL_GPL(rio_hw_get_inb_message);
949
950/** 945/**
951 * fsl_rio_dbell_handler - MPC85xx doorbell interrupt handler 946 * fsl_rio_dbell_handler - MPC85xx doorbell interrupt handler
952 * @irq: Linux interrupt number 947 * @irq: Linux interrupt number
@@ -1293,28 +1288,6 @@ err_out:
1293 return rc; 1288 return rc;
1294} 1289}
1295 1290
1296static char *cmdline = NULL;
1297
1298static int fsl_rio_get_hdid(int index)
1299{
1300 /* XXX Need to parse multiple entries in some format */
1301 if (!cmdline)
1302 return -1;
1303
1304 return simple_strtol(cmdline, NULL, 0);
1305}
1306
1307static int fsl_rio_get_cmdline(char *s)
1308{
1309 if (!s)
1310 return 0;
1311
1312 cmdline = s;
1313 return 1;
1314}
1315
1316__setup("riohdid=", fsl_rio_get_cmdline);
1317
1318static inline void fsl_rio_info(struct device *dev, u32 ccsr) 1291static inline void fsl_rio_info(struct device *dev, u32 ccsr)
1319{ 1292{
1320 const char *str; 1293 const char *str;
@@ -1431,13 +1404,19 @@ int fsl_rio_setup(struct platform_device *dev)
1431 ops->cwrite = fsl_rio_config_write; 1404 ops->cwrite = fsl_rio_config_write;
1432 ops->dsend = fsl_rio_doorbell_send; 1405 ops->dsend = fsl_rio_doorbell_send;
1433 ops->pwenable = fsl_rio_pw_enable; 1406 ops->pwenable = fsl_rio_pw_enable;
1407 ops->open_outb_mbox = fsl_open_outb_mbox;
1408 ops->open_inb_mbox = fsl_open_inb_mbox;
1409 ops->close_outb_mbox = fsl_close_outb_mbox;
1410 ops->close_inb_mbox = fsl_close_inb_mbox;
1411 ops->add_outb_message = fsl_add_outb_message;
1412 ops->add_inb_buffer = fsl_add_inb_buffer;
1413 ops->get_inb_message = fsl_get_inb_message;
1434 1414
1435 port = kzalloc(sizeof(struct rio_mport), GFP_KERNEL); 1415 port = kzalloc(sizeof(struct rio_mport), GFP_KERNEL);
1436 if (!port) { 1416 if (!port) {
1437 rc = -ENOMEM; 1417 rc = -ENOMEM;
1438 goto err_port; 1418 goto err_port;
1439 } 1419 }
1440 port->id = 0;
1441 port->index = 0; 1420 port->index = 0;
1442 1421
1443 priv = kzalloc(sizeof(struct rio_priv), GFP_KERNEL); 1422 priv = kzalloc(sizeof(struct rio_priv), GFP_KERNEL);
@@ -1453,6 +1432,14 @@ int fsl_rio_setup(struct platform_device *dev)
1453 port->iores.flags = IORESOURCE_MEM; 1432 port->iores.flags = IORESOURCE_MEM;
1454 port->iores.name = "rio_io_win"; 1433 port->iores.name = "rio_io_win";
1455 1434
1435 if (request_resource(&iomem_resource, &port->iores) < 0) {
1436 dev_err(&dev->dev, "RIO: Error requesting master port region"
1437 " 0x%016llx-0x%016llx\n",
1438 (u64)port->iores.start, (u64)port->iores.end);
1439 rc = -ENOMEM;
1440 goto err_res;
1441 }
1442
1456 priv->pwirq = irq_of_parse_and_map(dev->dev.of_node, 0); 1443 priv->pwirq = irq_of_parse_and_map(dev->dev.of_node, 0);
1457 priv->bellirq = irq_of_parse_and_map(dev->dev.of_node, 2); 1444 priv->bellirq = irq_of_parse_and_map(dev->dev.of_node, 2);
1458 priv->txirq = irq_of_parse_and_map(dev->dev.of_node, 3); 1445 priv->txirq = irq_of_parse_and_map(dev->dev.of_node, 3);
@@ -1468,8 +1455,6 @@ int fsl_rio_setup(struct platform_device *dev)
1468 priv->dev = &dev->dev; 1455 priv->dev = &dev->dev;
1469 1456
1470 port->ops = ops; 1457 port->ops = ops;
1471 port->host_deviceid = fsl_rio_get_hdid(port->id);
1472
1473 port->priv = priv; 1458 port->priv = priv;
1474 port->phys_efptr = 0x100; 1459 port->phys_efptr = 0x100;
1475 rio_register_mport(port); 1460 rio_register_mport(port);
@@ -1559,6 +1544,7 @@ int fsl_rio_setup(struct platform_device *dev)
1559 return 0; 1544 return 0;
1560err: 1545err:
1561 iounmap(priv->regs_win); 1546 iounmap(priv->regs_win);
1547err_res:
1562 kfree(priv); 1548 kfree(priv);
1563err_priv: 1549err_priv:
1564 kfree(port); 1550 kfree(port);
@@ -1572,18 +1558,10 @@ err_ops:
1572 */ 1558 */
1573static int __devinit fsl_of_rio_rpn_probe(struct platform_device *dev) 1559static int __devinit fsl_of_rio_rpn_probe(struct platform_device *dev)
1574{ 1560{
1575 int rc;
1576 printk(KERN_INFO "Setting up RapidIO peer-to-peer network %s\n", 1561 printk(KERN_INFO "Setting up RapidIO peer-to-peer network %s\n",
1577 dev->dev.of_node->full_name); 1562 dev->dev.of_node->full_name);
1578 1563
1579 rc = fsl_rio_setup(dev); 1564 return fsl_rio_setup(dev);
1580 if (rc)
1581 goto out;
1582
1583 /* Enumerate all registered ports */
1584 rc = rio_init_mports();
1585out:
1586 return rc;
1587}; 1565};
1588 1566
1589static const struct of_device_id fsl_of_rio_rpn_ids[] = { 1567static const struct of_device_id fsl_of_rio_rpn_ids[] = {
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index d17d04cfb2cd..33794c1d92c3 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -821,7 +821,7 @@ cmds(struct pt_regs *excp)
821 memzcan(); 821 memzcan();
822 break; 822 break;
823 case 'i': 823 case 'i':
824 show_mem(); 824 show_mem(0);
825 break; 825 break;
826 default: 826 default:
827 termch = cmd; 827 termch = cmd;
diff --git a/arch/s390/include/asm/bitops.h b/arch/s390/include/asm/bitops.h
index 2e05972c5085..e1c8f3a49884 100644
--- a/arch/s390/include/asm/bitops.h
+++ b/arch/s390/include/asm/bitops.h
@@ -742,18 +742,42 @@ static inline int sched_find_first_bit(unsigned long *b)
742 * 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24 742 * 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
743 */ 743 */
744 744
745#define ext2_set_bit(nr, addr) \ 745static inline void __set_bit_le(unsigned long nr, void *addr)
746 __test_and_set_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr) 746{
747#define ext2_set_bit_atomic(lock, nr, addr) \ 747 __set_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr);
748 test_and_set_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr) 748}
749#define ext2_clear_bit(nr, addr) \ 749
750 __test_and_clear_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr) 750static inline void __clear_bit_le(unsigned long nr, void *addr)
751#define ext2_clear_bit_atomic(lock, nr, addr) \ 751{
752 test_and_clear_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr) 752 __clear_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr);
753#define ext2_test_bit(nr, addr) \ 753}
754 test_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr) 754
755 755static inline int __test_and_set_bit_le(unsigned long nr, void *addr)
756static inline int ext2_find_first_zero_bit(void *vaddr, unsigned int size) 756{
757 return __test_and_set_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr);
758}
759
760static inline int test_and_set_bit_le(unsigned long nr, void *addr)
761{
762 return test_and_set_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr);
763}
764
765static inline int __test_and_clear_bit_le(unsigned long nr, void *addr)
766{
767 return __test_and_clear_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr);
768}
769
770static inline int test_and_clear_bit_le(unsigned long nr, void *addr)
771{
772 return test_and_clear_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr);
773}
774
775static inline int test_bit_le(unsigned long nr, const void *addr)
776{
777 return test_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr);
778}
779
780static inline int find_first_zero_bit_le(void *vaddr, unsigned int size)
757{ 781{
758 unsigned long bytes, bits; 782 unsigned long bytes, bits;
759 783
@@ -764,7 +788,7 @@ static inline int ext2_find_first_zero_bit(void *vaddr, unsigned int size)
764 return (bits < size) ? bits : size; 788 return (bits < size) ? bits : size;
765} 789}
766 790
767static inline int ext2_find_next_zero_bit(void *vaddr, unsigned long size, 791static inline int find_next_zero_bit_le(void *vaddr, unsigned long size,
768 unsigned long offset) 792 unsigned long offset)
769{ 793{
770 unsigned long *addr = vaddr, *p; 794 unsigned long *addr = vaddr, *p;
@@ -790,11 +814,10 @@ static inline int ext2_find_next_zero_bit(void *vaddr, unsigned long size,
790 size -= __BITOPS_WORDSIZE; 814 size -= __BITOPS_WORDSIZE;
791 p++; 815 p++;
792 } 816 }
793 return offset + ext2_find_first_zero_bit(p, size); 817 return offset + find_first_zero_bit_le(p, size);
794} 818}
795 819
796static inline unsigned long ext2_find_first_bit(void *vaddr, 820static inline unsigned long find_first_bit_le(void *vaddr, unsigned long size)
797 unsigned long size)
798{ 821{
799 unsigned long bytes, bits; 822 unsigned long bytes, bits;
800 823
@@ -805,7 +828,7 @@ static inline unsigned long ext2_find_first_bit(void *vaddr,
805 return (bits < size) ? bits : size; 828 return (bits < size) ? bits : size;
806} 829}
807 830
808static inline int ext2_find_next_bit(void *vaddr, unsigned long size, 831static inline int find_next_bit_le(void *vaddr, unsigned long size,
809 unsigned long offset) 832 unsigned long offset)
810{ 833{
811 unsigned long *addr = vaddr, *p; 834 unsigned long *addr = vaddr, *p;
@@ -831,10 +854,14 @@ static inline int ext2_find_next_bit(void *vaddr, unsigned long size,
831 size -= __BITOPS_WORDSIZE; 854 size -= __BITOPS_WORDSIZE;
832 p++; 855 p++;
833 } 856 }
834 return offset + ext2_find_first_bit(p, size); 857 return offset + find_first_bit_le(p, size);
835} 858}
836 859
837#include <asm-generic/bitops/minix.h> 860#define ext2_set_bit_atomic(lock, nr, addr) \
861 test_and_set_bit_le(nr, addr)
862#define ext2_clear_bit_atomic(lock, nr, addr) \
863 test_and_clear_bit_le(nr, addr)
864
838 865
839#endif /* __KERNEL__ */ 866#endif /* __KERNEL__ */
840 867
diff --git a/arch/s390/include/asm/ccwdev.h b/arch/s390/include/asm/ccwdev.h
index ff6f62e0ec3e..623f2fb71774 100644
--- a/arch/s390/include/asm/ccwdev.h
+++ b/arch/s390/include/asm/ccwdev.h
@@ -112,7 +112,6 @@ enum uc_todo {
112 112
113/** 113/**
114 * struct ccw driver - device driver for channel attached devices 114 * struct ccw driver - device driver for channel attached devices
115 * @owner: owning module
116 * @ids: ids supported by this driver 115 * @ids: ids supported by this driver
117 * @probe: function called on probe 116 * @probe: function called on probe
118 * @remove: function called on remove 117 * @remove: function called on remove
@@ -128,10 +127,8 @@ enum uc_todo {
128 * @restore: callback for restoring after hibernation 127 * @restore: callback for restoring after hibernation
129 * @uc_handler: callback for unit check handler 128 * @uc_handler: callback for unit check handler
130 * @driver: embedded device driver structure 129 * @driver: embedded device driver structure
131 * @name: device driver name
132 */ 130 */
133struct ccw_driver { 131struct ccw_driver {
134 struct module *owner;
135 struct ccw_device_id *ids; 132 struct ccw_device_id *ids;
136 int (*probe) (struct ccw_device *); 133 int (*probe) (struct ccw_device *);
137 void (*remove) (struct ccw_device *); 134 void (*remove) (struct ccw_device *);
@@ -147,7 +144,6 @@ struct ccw_driver {
147 int (*restore)(struct ccw_device *); 144 int (*restore)(struct ccw_device *);
148 enum uc_todo (*uc_handler) (struct ccw_device *, struct irb *); 145 enum uc_todo (*uc_handler) (struct ccw_device *, struct irb *);
149 struct device_driver driver; 146 struct device_driver driver;
150 char *name;
151}; 147};
152 148
153extern struct ccw_device *get_ccwdev_by_busid(struct ccw_driver *cdrv, 149extern struct ccw_device *get_ccwdev_by_busid(struct ccw_driver *cdrv,
diff --git a/arch/s390/include/asm/ccwgroup.h b/arch/s390/include/asm/ccwgroup.h
index c79c1e787b86..f2ea2c56a7e1 100644
--- a/arch/s390/include/asm/ccwgroup.h
+++ b/arch/s390/include/asm/ccwgroup.h
@@ -29,8 +29,6 @@ struct ccwgroup_device {
29 29
30/** 30/**
31 * struct ccwgroup_driver - driver for ccw group devices 31 * struct ccwgroup_driver - driver for ccw group devices
32 * @owner: driver owner
33 * @name: driver name
34 * @max_slaves: maximum number of slave devices 32 * @max_slaves: maximum number of slave devices
35 * @driver_id: unique id 33 * @driver_id: unique id
36 * @probe: function called on probe 34 * @probe: function called on probe
@@ -46,8 +44,6 @@ struct ccwgroup_device {
46 * @driver: embedded driver structure 44 * @driver: embedded driver structure
47 */ 45 */
48struct ccwgroup_driver { 46struct ccwgroup_driver {
49 struct module *owner;
50 char *name;
51 int max_slaves; 47 int max_slaves;
52 unsigned long driver_id; 48 unsigned long driver_id;
53 49
diff --git a/arch/s390/include/asm/cmpxchg.h b/arch/s390/include/asm/cmpxchg.h
new file mode 100644
index 000000000000..7488e52efa97
--- /dev/null
+++ b/arch/s390/include/asm/cmpxchg.h
@@ -0,0 +1,225 @@
1/*
2 * Copyright IBM Corp. 1999, 2011
3 *
4 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
5 */
6
7#ifndef __ASM_CMPXCHG_H
8#define __ASM_CMPXCHG_H
9
10#include <linux/types.h>
11
12extern void __xchg_called_with_bad_pointer(void);
13
14static inline unsigned long __xchg(unsigned long x, void *ptr, int size)
15{
16 unsigned long addr, old;
17 int shift;
18
19 switch (size) {
20 case 1:
21 addr = (unsigned long) ptr;
22 shift = (3 ^ (addr & 3)) << 3;
23 addr ^= addr & 3;
24 asm volatile(
25 " l %0,%4\n"
26 "0: lr 0,%0\n"
27 " nr 0,%3\n"
28 " or 0,%2\n"
29 " cs %0,0,%4\n"
30 " jl 0b\n"
31 : "=&d" (old), "=Q" (*(int *) addr)
32 : "d" (x << shift), "d" (~(255 << shift)),
33 "Q" (*(int *) addr) : "memory", "cc", "0");
34 return old >> shift;
35 case 2:
36 addr = (unsigned long) ptr;
37 shift = (2 ^ (addr & 2)) << 3;
38 addr ^= addr & 2;
39 asm volatile(
40 " l %0,%4\n"
41 "0: lr 0,%0\n"
42 " nr 0,%3\n"
43 " or 0,%2\n"
44 " cs %0,0,%4\n"
45 " jl 0b\n"
46 : "=&d" (old), "=Q" (*(int *) addr)
47 : "d" (x << shift), "d" (~(65535 << shift)),
48 "Q" (*(int *) addr) : "memory", "cc", "0");
49 return old >> shift;
50 case 4:
51 asm volatile(
52 " l %0,%3\n"
53 "0: cs %0,%2,%3\n"
54 " jl 0b\n"
55 : "=&d" (old), "=Q" (*(int *) ptr)
56 : "d" (x), "Q" (*(int *) ptr)
57 : "memory", "cc");
58 return old;
59#ifdef CONFIG_64BIT
60 case 8:
61 asm volatile(
62 " lg %0,%3\n"
63 "0: csg %0,%2,%3\n"
64 " jl 0b\n"
65 : "=&d" (old), "=m" (*(long *) ptr)
66 : "d" (x), "Q" (*(long *) ptr)
67 : "memory", "cc");
68 return old;
69#endif /* CONFIG_64BIT */
70 }
71 __xchg_called_with_bad_pointer();
72 return x;
73}
74
75#define xchg(ptr, x) \
76({ \
77 __typeof__(*(ptr)) __ret; \
78 __ret = (__typeof__(*(ptr))) \
79 __xchg((unsigned long)(x), (void *)(ptr), sizeof(*(ptr)));\
80 __ret; \
81})
82
83/*
84 * Atomic compare and exchange. Compare OLD with MEM, if identical,
85 * store NEW in MEM. Return the initial value in MEM. Success is
86 * indicated by comparing RETURN with OLD.
87 */
88
89#define __HAVE_ARCH_CMPXCHG
90
91extern void __cmpxchg_called_with_bad_pointer(void);
92
93static inline unsigned long __cmpxchg(void *ptr, unsigned long old,
94 unsigned long new, int size)
95{
96 unsigned long addr, prev, tmp;
97 int shift;
98
99 switch (size) {
100 case 1:
101 addr = (unsigned long) ptr;
102 shift = (3 ^ (addr & 3)) << 3;
103 addr ^= addr & 3;
104 asm volatile(
105 " l %0,%2\n"
106 "0: nr %0,%5\n"
107 " lr %1,%0\n"
108 " or %0,%3\n"
109 " or %1,%4\n"
110 " cs %0,%1,%2\n"
111 " jnl 1f\n"
112 " xr %1,%0\n"
113 " nr %1,%5\n"
114 " jnz 0b\n"
115 "1:"
116 : "=&d" (prev), "=&d" (tmp), "=Q" (*(int *) ptr)
117 : "d" (old << shift), "d" (new << shift),
118 "d" (~(255 << shift)), "Q" (*(int *) ptr)
119 : "memory", "cc");
120 return prev >> shift;
121 case 2:
122 addr = (unsigned long) ptr;
123 shift = (2 ^ (addr & 2)) << 3;
124 addr ^= addr & 2;
125 asm volatile(
126 " l %0,%2\n"
127 "0: nr %0,%5\n"
128 " lr %1,%0\n"
129 " or %0,%3\n"
130 " or %1,%4\n"
131 " cs %0,%1,%2\n"
132 " jnl 1f\n"
133 " xr %1,%0\n"
134 " nr %1,%5\n"
135 " jnz 0b\n"
136 "1:"
137 : "=&d" (prev), "=&d" (tmp), "=Q" (*(int *) ptr)
138 : "d" (old << shift), "d" (new << shift),
139 "d" (~(65535 << shift)), "Q" (*(int *) ptr)
140 : "memory", "cc");
141 return prev >> shift;
142 case 4:
143 asm volatile(
144 " cs %0,%3,%1\n"
145 : "=&d" (prev), "=Q" (*(int *) ptr)
146 : "0" (old), "d" (new), "Q" (*(int *) ptr)
147 : "memory", "cc");
148 return prev;
149#ifdef CONFIG_64BIT
150 case 8:
151 asm volatile(
152 " csg %0,%3,%1\n"
153 : "=&d" (prev), "=Q" (*(long *) ptr)
154 : "0" (old), "d" (new), "Q" (*(long *) ptr)
155 : "memory", "cc");
156 return prev;
157#endif /* CONFIG_64BIT */
158 }
159 __cmpxchg_called_with_bad_pointer();
160 return old;
161}
162
163#define cmpxchg(ptr, o, n) \
164 ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
165 (unsigned long)(n), sizeof(*(ptr))))
166
167#ifdef CONFIG_64BIT
168#define cmpxchg64(ptr, o, n) \
169({ \
170 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
171 cmpxchg((ptr), (o), (n)); \
172})
173#else /* CONFIG_64BIT */
174static inline unsigned long long __cmpxchg64(void *ptr,
175 unsigned long long old,
176 unsigned long long new)
177{
178 register_pair rp_old = {.pair = old};
179 register_pair rp_new = {.pair = new};
180
181 asm volatile(
182 " cds %0,%2,%1"
183 : "+&d" (rp_old), "=Q" (ptr)
184 : "d" (rp_new), "Q" (ptr)
185 : "cc");
186 return rp_old.pair;
187}
188#define cmpxchg64(ptr, o, n) \
189 ((__typeof__(*(ptr)))__cmpxchg64((ptr), \
190 (unsigned long long)(o), \
191 (unsigned long long)(n)))
192#endif /* CONFIG_64BIT */
193
194#include <asm-generic/cmpxchg-local.h>
195
196static inline unsigned long __cmpxchg_local(void *ptr,
197 unsigned long old,
198 unsigned long new, int size)
199{
200 switch (size) {
201 case 1:
202 case 2:
203 case 4:
204#ifdef CONFIG_64BIT
205 case 8:
206#endif
207 return __cmpxchg(ptr, old, new, size);
208 default:
209 return __cmpxchg_local_generic(ptr, old, new, size);
210 }
211
212 return old;
213}
214
215/*
216 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
217 * them available.
218 */
219#define cmpxchg_local(ptr, o, n) \
220 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
221 (unsigned long)(n), sizeof(*(ptr))))
222
223#define cmpxchg64_local(ptr, o, n) cmpxchg64((ptr), (o), (n))
224
225#endif /* __ASM_CMPXCHG_H */
diff --git a/arch/s390/include/asm/system.h b/arch/s390/include/asm/system.h
index 8f8d759f6a7b..d382629a0172 100644
--- a/arch/s390/include/asm/system.h
+++ b/arch/s390/include/asm/system.h
@@ -14,6 +14,7 @@
14#include <asm/setup.h> 14#include <asm/setup.h>
15#include <asm/processor.h> 15#include <asm/processor.h>
16#include <asm/lowcore.h> 16#include <asm/lowcore.h>
17#include <asm/cmpxchg.h>
17 18
18#ifdef __KERNEL__ 19#ifdef __KERNEL__
19 20
@@ -120,161 +121,6 @@ extern int memcpy_real(void *, void *, size_t);
120 121
121#define nop() asm volatile("nop") 122#define nop() asm volatile("nop")
122 123
123#define xchg(ptr,x) \
124({ \
125 __typeof__(*(ptr)) __ret; \
126 __ret = (__typeof__(*(ptr))) \
127 __xchg((unsigned long)(x), (void *)(ptr),sizeof(*(ptr))); \
128 __ret; \
129})
130
131extern void __xchg_called_with_bad_pointer(void);
132
133static inline unsigned long __xchg(unsigned long x, void * ptr, int size)
134{
135 unsigned long addr, old;
136 int shift;
137
138 switch (size) {
139 case 1:
140 addr = (unsigned long) ptr;
141 shift = (3 ^ (addr & 3)) << 3;
142 addr ^= addr & 3;
143 asm volatile(
144 " l %0,%4\n"
145 "0: lr 0,%0\n"
146 " nr 0,%3\n"
147 " or 0,%2\n"
148 " cs %0,0,%4\n"
149 " jl 0b\n"
150 : "=&d" (old), "=Q" (*(int *) addr)
151 : "d" (x << shift), "d" (~(255 << shift)),
152 "Q" (*(int *) addr) : "memory", "cc", "0");
153 return old >> shift;
154 case 2:
155 addr = (unsigned long) ptr;
156 shift = (2 ^ (addr & 2)) << 3;
157 addr ^= addr & 2;
158 asm volatile(
159 " l %0,%4\n"
160 "0: lr 0,%0\n"
161 " nr 0,%3\n"
162 " or 0,%2\n"
163 " cs %0,0,%4\n"
164 " jl 0b\n"
165 : "=&d" (old), "=Q" (*(int *) addr)
166 : "d" (x << shift), "d" (~(65535 << shift)),
167 "Q" (*(int *) addr) : "memory", "cc", "0");
168 return old >> shift;
169 case 4:
170 asm volatile(
171 " l %0,%3\n"
172 "0: cs %0,%2,%3\n"
173 " jl 0b\n"
174 : "=&d" (old), "=Q" (*(int *) ptr)
175 : "d" (x), "Q" (*(int *) ptr)
176 : "memory", "cc");
177 return old;
178#ifdef __s390x__
179 case 8:
180 asm volatile(
181 " lg %0,%3\n"
182 "0: csg %0,%2,%3\n"
183 " jl 0b\n"
184 : "=&d" (old), "=m" (*(long *) ptr)
185 : "d" (x), "Q" (*(long *) ptr)
186 : "memory", "cc");
187 return old;
188#endif /* __s390x__ */
189 }
190 __xchg_called_with_bad_pointer();
191 return x;
192}
193
194/*
195 * Atomic compare and exchange. Compare OLD with MEM, if identical,
196 * store NEW in MEM. Return the initial value in MEM. Success is
197 * indicated by comparing RETURN with OLD.
198 */
199
200#define __HAVE_ARCH_CMPXCHG 1
201
202#define cmpxchg(ptr, o, n) \
203 ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
204 (unsigned long)(n), sizeof(*(ptr))))
205
206extern void __cmpxchg_called_with_bad_pointer(void);
207
208static inline unsigned long
209__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
210{
211 unsigned long addr, prev, tmp;
212 int shift;
213
214 switch (size) {
215 case 1:
216 addr = (unsigned long) ptr;
217 shift = (3 ^ (addr & 3)) << 3;
218 addr ^= addr & 3;
219 asm volatile(
220 " l %0,%2\n"
221 "0: nr %0,%5\n"
222 " lr %1,%0\n"
223 " or %0,%3\n"
224 " or %1,%4\n"
225 " cs %0,%1,%2\n"
226 " jnl 1f\n"
227 " xr %1,%0\n"
228 " nr %1,%5\n"
229 " jnz 0b\n"
230 "1:"
231 : "=&d" (prev), "=&d" (tmp), "=Q" (*(int *) ptr)
232 : "d" (old << shift), "d" (new << shift),
233 "d" (~(255 << shift)), "Q" (*(int *) ptr)
234 : "memory", "cc");
235 return prev >> shift;
236 case 2:
237 addr = (unsigned long) ptr;
238 shift = (2 ^ (addr & 2)) << 3;
239 addr ^= addr & 2;
240 asm volatile(
241 " l %0,%2\n"
242 "0: nr %0,%5\n"
243 " lr %1,%0\n"
244 " or %0,%3\n"
245 " or %1,%4\n"
246 " cs %0,%1,%2\n"
247 " jnl 1f\n"
248 " xr %1,%0\n"
249 " nr %1,%5\n"
250 " jnz 0b\n"
251 "1:"
252 : "=&d" (prev), "=&d" (tmp), "=Q" (*(int *) ptr)
253 : "d" (old << shift), "d" (new << shift),
254 "d" (~(65535 << shift)), "Q" (*(int *) ptr)
255 : "memory", "cc");
256 return prev >> shift;
257 case 4:
258 asm volatile(
259 " cs %0,%3,%1\n"
260 : "=&d" (prev), "=Q" (*(int *) ptr)
261 : "0" (old), "d" (new), "Q" (*(int *) ptr)
262 : "memory", "cc");
263 return prev;
264#ifdef __s390x__
265 case 8:
266 asm volatile(
267 " csg %0,%3,%1\n"
268 : "=&d" (prev), "=Q" (*(long *) ptr)
269 : "0" (old), "d" (new), "Q" (*(long *) ptr)
270 : "memory", "cc");
271 return prev;
272#endif /* __s390x__ */
273 }
274 __cmpxchg_called_with_bad_pointer();
275 return old;
276}
277
278/* 124/*
279 * Force strict CPU ordering. 125 * Force strict CPU ordering.
280 * And yes, this is required on UP too when we're talking 126 * And yes, this is required on UP too when we're talking
@@ -353,46 +199,6 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
353 __ctl_load(__dummy, cr, cr); \ 199 __ctl_load(__dummy, cr, cr); \
354}) 200})
355 201
356#include <linux/irqflags.h>
357
358#include <asm-generic/cmpxchg-local.h>
359
360static inline unsigned long __cmpxchg_local(volatile void *ptr,
361 unsigned long old,
362 unsigned long new, int size)
363{
364 switch (size) {
365 case 1:
366 case 2:
367 case 4:
368#ifdef __s390x__
369 case 8:
370#endif
371 return __cmpxchg(ptr, old, new, size);
372 default:
373 return __cmpxchg_local_generic(ptr, old, new, size);
374 }
375
376 return old;
377}
378
379/*
380 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
381 * them available.
382 */
383#define cmpxchg_local(ptr, o, n) \
384 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
385 (unsigned long)(n), sizeof(*(ptr))))
386#ifdef __s390x__
387#define cmpxchg64_local(ptr, o, n) \
388 ({ \
389 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
390 cmpxchg_local((ptr), (o), (n)); \
391 })
392#else
393#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
394#endif
395
396/* 202/*
397 * Use to set psw mask except for the first byte which 203 * Use to set psw mask except for the first byte which
398 * won't be changed by this function. 204 * won't be changed by this function.
diff --git a/arch/s390/include/asm/types.h b/arch/s390/include/asm/types.h
index f7f6ae6bed8f..eeb52ccf499f 100644
--- a/arch/s390/include/asm/types.h
+++ b/arch/s390/include/asm/types.h
@@ -30,8 +30,6 @@ typedef __signed__ long saddr_t;
30 30
31#ifndef __ASSEMBLY__ 31#ifndef __ASSEMBLY__
32 32
33typedef u64 dma64_addr_t;
34
35#ifndef __s390x__ 33#ifndef __s390x__
36typedef union { 34typedef union {
37 unsigned long long pair; 35 unsigned long long pair;
diff --git a/arch/s390/include/asm/unistd.h b/arch/s390/include/asm/unistd.h
index 1049ef27c15e..e82152572377 100644
--- a/arch/s390/include/asm/unistd.h
+++ b/arch/s390/include/asm/unistd.h
@@ -272,7 +272,11 @@
272#define __NR_fanotify_init 332 272#define __NR_fanotify_init 332
273#define __NR_fanotify_mark 333 273#define __NR_fanotify_mark 333
274#define __NR_prlimit64 334 274#define __NR_prlimit64 334
275#define NR_syscalls 335 275#define __NR_name_to_handle_at 335
276#define __NR_open_by_handle_at 336
277#define __NR_clock_adjtime 337
278#define __NR_syncfs 338
279#define NR_syscalls 339
276 280
277/* 281/*
278 * There are some system calls that are not present on 64 bit, some 282 * There are some system calls that are not present on 64 bit, some
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index 8e60fb23b90d..1dc96ea08fa8 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -1877,3 +1877,30 @@ sys_prlimit64_wrapper:
1877 llgtr %r4,%r4 # const struct rlimit64 __user * 1877 llgtr %r4,%r4 # const struct rlimit64 __user *
1878 llgtr %r5,%r5 # struct rlimit64 __user * 1878 llgtr %r5,%r5 # struct rlimit64 __user *
1879 jg sys_prlimit64 # branch to system call 1879 jg sys_prlimit64 # branch to system call
1880
1881 .globl sys_name_to_handle_at_wrapper
1882sys_name_to_handle_at_wrapper:
1883 lgfr %r2,%r2 # int
1884 llgtr %r3,%r3 # const char __user *
1885 llgtr %r4,%r4 # struct file_handle __user *
1886 llgtr %r5,%r5 # int __user *
1887 lgfr %r6,%r6 # int
1888 jg sys_name_to_handle_at
1889
1890 .globl compat_sys_open_by_handle_at_wrapper
1891compat_sys_open_by_handle_at_wrapper:
1892 lgfr %r2,%r2 # int
1893 llgtr %r3,%r3 # struct file_handle __user *
1894 lgfr %r4,%r4 # int
1895 jg compat_sys_open_by_handle_at
1896
1897 .globl compat_sys_clock_adjtime_wrapper
1898compat_sys_clock_adjtime_wrapper:
1899 lgfr %r2,%r2 # clockid_t (int)
1900 llgtr %r3,%r3 # struct compat_timex __user *
1901 jg compat_sys_clock_adjtime
1902
1903 .globl sys_syncfs_wrapper
1904sys_syncfs_wrapper:
1905 lgfr %r2,%r2 # int
1906 jg sys_syncfs
diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c
index 3b7e7dddc324..068f8465c4ee 100644
--- a/arch/s390/kernel/early.c
+++ b/arch/s390/kernel/early.c
@@ -94,6 +94,7 @@ static noinline __init void create_kernel_nss(void)
94 unsigned int sinitrd_pfn, einitrd_pfn; 94 unsigned int sinitrd_pfn, einitrd_pfn;
95#endif 95#endif
96 int response; 96 int response;
97 int hlen;
97 size_t len; 98 size_t len;
98 char *savesys_ptr; 99 char *savesys_ptr;
99 char defsys_cmd[DEFSYS_CMD_SIZE]; 100 char defsys_cmd[DEFSYS_CMD_SIZE];
@@ -124,24 +125,27 @@ static noinline __init void create_kernel_nss(void)
124 end_pfn = PFN_UP(__pa(&_end)); 125 end_pfn = PFN_UP(__pa(&_end));
125 min_size = end_pfn << 2; 126 min_size = end_pfn << 2;
126 127
127 sprintf(defsys_cmd, "DEFSYS %s 00000-%.5X EW %.5X-%.5X SR %.5X-%.5X", 128 hlen = snprintf(defsys_cmd, DEFSYS_CMD_SIZE,
128 kernel_nss_name, stext_pfn - 1, stext_pfn, eshared_pfn - 1, 129 "DEFSYS %s 00000-%.5X EW %.5X-%.5X SR %.5X-%.5X",
129 eshared_pfn, end_pfn); 130 kernel_nss_name, stext_pfn - 1, stext_pfn,
131 eshared_pfn - 1, eshared_pfn, end_pfn);
130 132
131#ifdef CONFIG_BLK_DEV_INITRD 133#ifdef CONFIG_BLK_DEV_INITRD
132 if (INITRD_START && INITRD_SIZE) { 134 if (INITRD_START && INITRD_SIZE) {
133 sinitrd_pfn = PFN_DOWN(__pa(INITRD_START)); 135 sinitrd_pfn = PFN_DOWN(__pa(INITRD_START));
134 einitrd_pfn = PFN_UP(__pa(INITRD_START + INITRD_SIZE)); 136 einitrd_pfn = PFN_UP(__pa(INITRD_START + INITRD_SIZE));
135 min_size = einitrd_pfn << 2; 137 min_size = einitrd_pfn << 2;
136 sprintf(defsys_cmd, "%s EW %.5X-%.5X", defsys_cmd, 138 hlen += snprintf(defsys_cmd + hlen, DEFSYS_CMD_SIZE - hlen,
137 sinitrd_pfn, einitrd_pfn); 139 " EW %.5X-%.5X", sinitrd_pfn, einitrd_pfn);
138 } 140 }
139#endif 141#endif
140 142
141 sprintf(defsys_cmd, "%s EW MINSIZE=%.7iK PARMREGS=0-13", 143 snprintf(defsys_cmd + hlen, DEFSYS_CMD_SIZE - hlen,
142 defsys_cmd, min_size); 144 " EW MINSIZE=%.7iK PARMREGS=0-13", min_size);
143 sprintf(savesys_cmd, "SAVESYS %s \n IPL %s", 145 defsys_cmd[DEFSYS_CMD_SIZE - 1] = '\0';
144 kernel_nss_name, kernel_nss_name); 146 snprintf(savesys_cmd, SAVESYS_CMD_SIZE, "SAVESYS %s \n IPL %s",
147 kernel_nss_name, kernel_nss_name);
148 savesys_cmd[SAVESYS_CMD_SIZE - 1] = '\0';
145 149
146 __cpcmd(defsys_cmd, NULL, 0, &response); 150 __cpcmd(defsys_cmd, NULL, 0, &response);
147 151
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index 6f6350826c81..ed183c2c6168 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -102,16 +102,6 @@ EXPORT_SYMBOL(lowcore_ptr);
102 102
103#include <asm/setup.h> 103#include <asm/setup.h>
104 104
105static struct resource code_resource = {
106 .name = "Kernel code",
107 .flags = IORESOURCE_BUSY | IORESOURCE_MEM,
108};
109
110static struct resource data_resource = {
111 .name = "Kernel data",
112 .flags = IORESOURCE_BUSY | IORESOURCE_MEM,
113};
114
115/* 105/*
116 * condev= and conmode= setup parameter. 106 * condev= and conmode= setup parameter.
117 */ 107 */
@@ -436,21 +426,43 @@ setup_lowcore(void)
436 lowcore_ptr[0] = lc; 426 lowcore_ptr[0] = lc;
437} 427}
438 428
439static void __init 429static struct resource code_resource = {
440setup_resources(void) 430 .name = "Kernel code",
431 .flags = IORESOURCE_BUSY | IORESOURCE_MEM,
432};
433
434static struct resource data_resource = {
435 .name = "Kernel data",
436 .flags = IORESOURCE_BUSY | IORESOURCE_MEM,
437};
438
439static struct resource bss_resource = {
440 .name = "Kernel bss",
441 .flags = IORESOURCE_BUSY | IORESOURCE_MEM,
442};
443
444static struct resource __initdata *standard_resources[] = {
445 &code_resource,
446 &data_resource,
447 &bss_resource,
448};
449
450static void __init setup_resources(void)
441{ 451{
442 struct resource *res, *sub_res; 452 struct resource *res, *std_res, *sub_res;
443 int i; 453 int i, j;
444 454
445 code_resource.start = (unsigned long) &_text; 455 code_resource.start = (unsigned long) &_text;
446 code_resource.end = (unsigned long) &_etext - 1; 456 code_resource.end = (unsigned long) &_etext - 1;
447 data_resource.start = (unsigned long) &_etext; 457 data_resource.start = (unsigned long) &_etext;
448 data_resource.end = (unsigned long) &_edata - 1; 458 data_resource.end = (unsigned long) &_edata - 1;
459 bss_resource.start = (unsigned long) &__bss_start;
460 bss_resource.end = (unsigned long) &__bss_stop - 1;
449 461
450 for (i = 0; i < MEMORY_CHUNKS; i++) { 462 for (i = 0; i < MEMORY_CHUNKS; i++) {
451 if (!memory_chunk[i].size) 463 if (!memory_chunk[i].size)
452 continue; 464 continue;
453 res = alloc_bootmem_low(sizeof(struct resource)); 465 res = alloc_bootmem_low(sizeof(*res));
454 res->flags = IORESOURCE_BUSY | IORESOURCE_MEM; 466 res->flags = IORESOURCE_BUSY | IORESOURCE_MEM;
455 switch (memory_chunk[i].type) { 467 switch (memory_chunk[i].type) {
456 case CHUNK_READ_WRITE: 468 case CHUNK_READ_WRITE:
@@ -464,40 +476,24 @@ setup_resources(void)
464 res->name = "reserved"; 476 res->name = "reserved";
465 } 477 }
466 res->start = memory_chunk[i].addr; 478 res->start = memory_chunk[i].addr;
467 res->end = memory_chunk[i].addr + memory_chunk[i].size - 1; 479 res->end = res->start + memory_chunk[i].size - 1;
468 request_resource(&iomem_resource, res); 480 request_resource(&iomem_resource, res);
469 481
470 if (code_resource.start >= res->start && 482 for (j = 0; j < ARRAY_SIZE(standard_resources); j++) {
471 code_resource.start <= res->end && 483 std_res = standard_resources[j];
472 code_resource.end > res->end) { 484 if (std_res->start < res->start ||
473 sub_res = alloc_bootmem_low(sizeof(struct resource)); 485 std_res->start > res->end)
474 memcpy(sub_res, &code_resource, 486 continue;
475 sizeof(struct resource)); 487 if (std_res->end > res->end) {
476 sub_res->end = res->end; 488 sub_res = alloc_bootmem_low(sizeof(*sub_res));
477 code_resource.start = res->end + 1; 489 *sub_res = *std_res;
478 request_resource(res, sub_res); 490 sub_res->end = res->end;
479 } 491 std_res->start = res->end + 1;
480 492 request_resource(res, sub_res);
481 if (code_resource.start >= res->start && 493 } else {
482 code_resource.start <= res->end && 494 request_resource(res, std_res);
483 code_resource.end <= res->end) 495 }
484 request_resource(res, &code_resource);
485
486 if (data_resource.start >= res->start &&
487 data_resource.start <= res->end &&
488 data_resource.end > res->end) {
489 sub_res = alloc_bootmem_low(sizeof(struct resource));
490 memcpy(sub_res, &data_resource,
491 sizeof(struct resource));
492 sub_res->end = res->end;
493 data_resource.start = res->end + 1;
494 request_resource(res, sub_res);
495 } 496 }
496
497 if (data_resource.start >= res->start &&
498 data_resource.start <= res->end &&
499 data_resource.end <= res->end)
500 request_resource(res, &data_resource);
501 } 497 }
502} 498}
503 499
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S
index a8fee1b14395..9c65fd4ddce0 100644
--- a/arch/s390/kernel/syscalls.S
+++ b/arch/s390/kernel/syscalls.S
@@ -343,3 +343,7 @@ SYSCALL(sys_perf_event_open,sys_perf_event_open,sys_perf_event_open_wrapper)
343SYSCALL(sys_fanotify_init,sys_fanotify_init,sys_fanotify_init_wrapper) 343SYSCALL(sys_fanotify_init,sys_fanotify_init,sys_fanotify_init_wrapper)
344SYSCALL(sys_fanotify_mark,sys_fanotify_mark,sys_fanotify_mark_wrapper) 344SYSCALL(sys_fanotify_mark,sys_fanotify_mark,sys_fanotify_mark_wrapper)
345SYSCALL(sys_prlimit64,sys_prlimit64,sys_prlimit64_wrapper) 345SYSCALL(sys_prlimit64,sys_prlimit64,sys_prlimit64_wrapper)
346SYSCALL(sys_name_to_handle_at,sys_name_to_handle_at,sys_name_to_handle_at_wrapper) /* 335 */
347SYSCALL(sys_open_by_handle_at,sys_open_by_handle_at,compat_sys_open_by_handle_at_wrapper)
348SYSCALL(sys_clock_adjtime,sys_clock_adjtime,compat_sys_clock_adjtime_wrapper)
349SYSCALL(sys_syncfs,sys_syncfs,sys_syncfs_wrapper)
diff --git a/arch/s390/kernel/vdso.c b/arch/s390/kernel/vdso.c
index f438d74dedbd..d73630b4fe1d 100644
--- a/arch/s390/kernel/vdso.c
+++ b/arch/s390/kernel/vdso.c
@@ -337,17 +337,17 @@ static int __init vdso_init(void)
337} 337}
338arch_initcall(vdso_init); 338arch_initcall(vdso_init);
339 339
340int in_gate_area_no_task(unsigned long addr) 340int in_gate_area_no_mm(unsigned long addr)
341{ 341{
342 return 0; 342 return 0;
343} 343}
344 344
345int in_gate_area(struct task_struct *task, unsigned long addr) 345int in_gate_area(struct mm_struct *mm, unsigned long addr)
346{ 346{
347 return 0; 347 return 0;
348} 348}
349 349
350struct vm_area_struct *get_gate_vma(struct task_struct *tsk) 350struct vm_area_struct *get_gate_vma(struct mm_struct *mm)
351{ 351{
352 return NULL; 352 return NULL;
353} 353}
diff --git a/arch/s390/oprofile/Makefile b/arch/s390/oprofile/Makefile
index d698cddcfbdd..524c4b615821 100644
--- a/arch/s390/oprofile/Makefile
+++ b/arch/s390/oprofile/Makefile
@@ -6,4 +6,5 @@ DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
6 oprofilefs.o oprofile_stats.o \ 6 oprofilefs.o oprofile_stats.o \
7 timer_int.o ) 7 timer_int.o )
8 8
9oprofile-y := $(DRIVER_OBJS) init.o backtrace.o hwsampler.o 9oprofile-y := $(DRIVER_OBJS) init.o backtrace.o
10oprofile-$(CONFIG_64BIT) += hwsampler.o
diff --git a/arch/s390/oprofile/init.c b/arch/s390/oprofile/init.c
index 16c76def4a9d..c63d7e58352b 100644
--- a/arch/s390/oprofile/init.c
+++ b/arch/s390/oprofile/init.c
@@ -18,6 +18,11 @@
18#include <linux/fs.h> 18#include <linux/fs.h>
19 19
20#include "../../../drivers/oprofile/oprof.h" 20#include "../../../drivers/oprofile/oprof.h"
21
22extern void s390_backtrace(struct pt_regs * const regs, unsigned int depth);
23
24#ifdef CONFIG_64BIT
25
21#include "hwsampler.h" 26#include "hwsampler.h"
22 27
23#define DEFAULT_INTERVAL 4096 28#define DEFAULT_INTERVAL 4096
@@ -37,8 +42,6 @@ static int hwsampler_running; /* start_mutex must be held to change */
37 42
38static struct oprofile_operations timer_ops; 43static struct oprofile_operations timer_ops;
39 44
40extern void s390_backtrace(struct pt_regs * const regs, unsigned int depth);
41
42static int oprofile_hwsampler_start(void) 45static int oprofile_hwsampler_start(void)
43{ 46{
44 int retval; 47 int retval;
@@ -172,14 +175,22 @@ static void oprofile_hwsampler_exit(void)
172 hwsampler_shutdown(); 175 hwsampler_shutdown();
173} 176}
174 177
178#endif /* CONFIG_64BIT */
179
175int __init oprofile_arch_init(struct oprofile_operations *ops) 180int __init oprofile_arch_init(struct oprofile_operations *ops)
176{ 181{
177 ops->backtrace = s390_backtrace; 182 ops->backtrace = s390_backtrace;
178 183
184#ifdef CONFIG_64BIT
179 return oprofile_hwsampler_init(ops); 185 return oprofile_hwsampler_init(ops);
186#else
187 return -ENODEV;
188#endif
180} 189}
181 190
182void oprofile_arch_exit(void) 191void oprofile_arch_exit(void)
183{ 192{
193#ifdef CONFIG_64BIT
184 oprofile_hwsampler_exit(); 194 oprofile_hwsampler_exit();
195#endif
185} 196}
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 2d264fa84959..9af3c8d0776b 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -23,8 +23,7 @@ config SUPERH
23 select HAVE_SPARSE_IRQ 23 select HAVE_SPARSE_IRQ
24 select RTC_LIB 24 select RTC_LIB
25 select GENERIC_ATOMIC64 25 select GENERIC_ATOMIC64
26 # Support the deprecated APIs until MFD and GPIOLIB catch up. 26 select GENERIC_HARDIRQS_NO_DEPRECATED
27 select GENERIC_HARDIRQS_NO_DEPRECATED if !MFD_SUPPORT && !GPIOLIB
28 select GENERIC_IRQ_SHOW 27 select GENERIC_IRQ_SHOW
29 help 28 help
30 The SuperH is a RISC processor targeted for use in embedded systems 29 The SuperH is a RISC processor targeted for use in embedded systems
@@ -75,6 +74,9 @@ config GENERIC_CSUM
75config GENERIC_FIND_NEXT_BIT 74config GENERIC_FIND_NEXT_BIT
76 def_bool y 75 def_bool y
77 76
77config GENERIC_FIND_BIT_LE
78 def_bool y
79
78config GENERIC_HWEIGHT 80config GENERIC_HWEIGHT
79 def_bool y 81 def_bool y
80 82
diff --git a/arch/sh/boards/board-edosk7760.c b/arch/sh/boards/board-edosk7760.c
index f47ac82da876..e9656a2cc4cc 100644
--- a/arch/sh/boards/board-edosk7760.c
+++ b/arch/sh/boards/board-edosk7760.c
@@ -56,7 +56,7 @@ static struct mtd_partition edosk7760_nor_flash_partitions[] = {
56 }, { 56 }, {
57 .name = "fs", 57 .name = "fs",
58 .offset = MTDPART_OFS_APPEND, 58 .offset = MTDPART_OFS_APPEND,
59 .size = SZ_26M, 59 .size = (26 << 20),
60 }, { 60 }, {
61 .name = "other", 61 .name = "other",
62 .offset = MTDPART_OFS_APPEND, 62 .offset = MTDPART_OFS_APPEND,
diff --git a/arch/sh/boot/romimage/mmcif-sh7724.c b/arch/sh/boot/romimage/mmcif-sh7724.c
index c84e7831018d..16b122510c84 100644
--- a/arch/sh/boot/romimage/mmcif-sh7724.c
+++ b/arch/sh/boot/romimage/mmcif-sh7724.c
@@ -9,6 +9,7 @@
9 */ 9 */
10 10
11#include <linux/mmc/sh_mmcif.h> 11#include <linux/mmc/sh_mmcif.h>
12#include <linux/mmc/boot.h>
12#include <mach/romimage.h> 13#include <mach/romimage.h>
13 14
14#define MMCIF_BASE (void __iomem *)0xa4ca0000 15#define MMCIF_BASE (void __iomem *)0xa4ca0000
@@ -29,7 +30,7 @@
29 */ 30 */
30asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes) 31asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes)
31{ 32{
32 mmcif_update_progress(MMCIF_PROGRESS_ENTER); 33 mmcif_update_progress(MMC_PROGRESS_ENTER);
33 34
34 /* enable clock to the MMCIF hardware block */ 35 /* enable clock to the MMCIF hardware block */
35 __raw_writel(__raw_readl(MSTPCR2) & ~0x20000000, MSTPCR2); 36 __raw_writel(__raw_readl(MSTPCR2) & ~0x20000000, MSTPCR2);
@@ -52,12 +53,12 @@ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes)
52 /* high drive capability for MMC pins */ 53 /* high drive capability for MMC pins */
53 __raw_writew(__raw_readw(DRVCRA) | 0x3000, DRVCRA); 54 __raw_writew(__raw_readw(DRVCRA) | 0x3000, DRVCRA);
54 55
55 mmcif_update_progress(MMCIF_PROGRESS_INIT); 56 mmcif_update_progress(MMC_PROGRESS_INIT);
56 57
57 /* setup MMCIF hardware */ 58 /* setup MMCIF hardware */
58 sh_mmcif_boot_init(MMCIF_BASE); 59 sh_mmcif_boot_init(MMCIF_BASE);
59 60
60 mmcif_update_progress(MMCIF_PROGRESS_LOAD); 61 mmcif_update_progress(MMC_PROGRESS_LOAD);
61 62
62 /* load kernel via MMCIF interface */ 63 /* load kernel via MMCIF interface */
63 sh_mmcif_boot_do_read(MMCIF_BASE, 512, 64 sh_mmcif_boot_do_read(MMCIF_BASE, 512,
@@ -67,5 +68,5 @@ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes)
67 /* disable clock to the MMCIF hardware block */ 68 /* disable clock to the MMCIF hardware block */
68 __raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2); 69 __raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2);
69 70
70 mmcif_update_progress(MMCIF_PROGRESS_DONE); 71 mmcif_update_progress(MMC_PROGRESS_DONE);
71} 72}
diff --git a/arch/sh/include/asm/bitops.h b/arch/sh/include/asm/bitops.h
index 98511e4d28cb..90fa3e48b4d6 100644
--- a/arch/sh/include/asm/bitops.h
+++ b/arch/sh/include/asm/bitops.h
@@ -94,9 +94,8 @@ static inline unsigned long ffz(unsigned long word)
94#include <asm-generic/bitops/hweight.h> 94#include <asm-generic/bitops/hweight.h>
95#include <asm-generic/bitops/lock.h> 95#include <asm-generic/bitops/lock.h>
96#include <asm-generic/bitops/sched.h> 96#include <asm-generic/bitops/sched.h>
97#include <asm-generic/bitops/ext2-non-atomic.h> 97#include <asm-generic/bitops/le.h>
98#include <asm-generic/bitops/ext2-atomic.h> 98#include <asm-generic/bitops/ext2-atomic.h>
99#include <asm-generic/bitops/minix.h>
100#include <asm-generic/bitops/fls.h> 99#include <asm-generic/bitops/fls.h>
101#include <asm-generic/bitops/__fls.h> 100#include <asm-generic/bitops/__fls.h>
102#include <asm-generic/bitops/fls64.h> 101#include <asm-generic/bitops/fls64.h>
diff --git a/arch/sh/include/asm/sizes.h b/arch/sh/include/asm/sizes.h
index 0b9fe2d5c36d..dd248c2e1085 100644
--- a/arch/sh/include/asm/sizes.h
+++ b/arch/sh/include/asm/sizes.h
@@ -1,62 +1 @@
1/* #include <asm-generic/sizes.h>
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
15 */
16/* DO NOT EDIT!! - this file automatically generated
17 * from .s file by awk -f s2h.awk
18 */
19/* Size definitions
20 * Copyright (C) ARM Limited 1998. All rights reserved.
21 */
22
23#ifndef __sizes_h
24#define __sizes_h 1
25
26/* handy sizes */
27#define SZ_16 0x00000010
28#define SZ_32 0x00000020
29#define SZ_64 0x00000040
30#define SZ_128 0x00000080
31#define SZ_256 0x00000100
32#define SZ_512 0x00000200
33
34#define SZ_1K 0x00000400
35#define SZ_2K 0x00000800
36#define SZ_4K 0x00001000
37#define SZ_8K 0x00002000
38#define SZ_16K 0x00004000
39#define SZ_32K 0x00008000
40#define SZ_64K 0x00010000
41#define SZ_128K 0x00020000
42#define SZ_256K 0x00040000
43#define SZ_512K 0x00080000
44
45#define SZ_1M 0x00100000
46#define SZ_2M 0x00200000
47#define SZ_4M 0x00400000
48#define SZ_8M 0x00800000
49#define SZ_16M 0x01000000
50#define SZ_26M 0x01a00000
51#define SZ_32M 0x02000000
52#define SZ_64M 0x04000000
53#define SZ_128M 0x08000000
54#define SZ_256M 0x10000000
55#define SZ_512M 0x20000000
56
57#define SZ_1G 0x40000000
58#define SZ_2G 0x80000000
59
60#endif
61
62/* END */
diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h
index b5a74e88028d..ca7765e5f967 100644
--- a/arch/sh/include/asm/unistd_32.h
+++ b/arch/sh/include/asm/unistd_32.h
@@ -372,8 +372,9 @@
372#define __NR_name_to_handle_at 359 372#define __NR_name_to_handle_at 359
373#define __NR_open_by_handle_at 360 373#define __NR_open_by_handle_at 360
374#define __NR_clock_adjtime 361 374#define __NR_clock_adjtime 361
375#define __NR_syncfs 362
375 376
376#define NR_syscalls 362 377#define NR_syscalls 363
377 378
378#ifdef __KERNEL__ 379#ifdef __KERNEL__
379 380
diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/asm/unistd_64.h
index 953da4a52199..a694009bb816 100644
--- a/arch/sh/include/asm/unistd_64.h
+++ b/arch/sh/include/asm/unistd_64.h
@@ -393,10 +393,11 @@
393#define __NR_name_to_handle_at 370 393#define __NR_name_to_handle_at 370
394#define __NR_open_by_handle_at 371 394#define __NR_open_by_handle_at 371
395#define __NR_clock_adjtime 372 395#define __NR_clock_adjtime 372
396#define __NR_syncfs 373
396 397
397#ifdef __KERNEL__ 398#ifdef __KERNEL__
398 399
399#define NR_syscalls 373 400#define NR_syscalls 374
400 401
401#define __ARCH_WANT_IPC_PARSE_VERSION 402#define __ARCH_WANT_IPC_PARSE_VERSION
402#define __ARCH_WANT_OLD_READDIR 403#define __ARCH_WANT_OLD_READDIR
diff --git a/arch/sh/kernel/crash_dump.c b/arch/sh/kernel/crash_dump.c
index 37c97d444576..569e7b171c01 100644
--- a/arch/sh/kernel/crash_dump.c
+++ b/arch/sh/kernel/crash_dump.c
@@ -9,28 +9,6 @@
9#include <linux/io.h> 9#include <linux/io.h>
10#include <asm/uaccess.h> 10#include <asm/uaccess.h>
11 11
12/* Stores the physical address of elf header of crash image. */
13unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX;
14
15/*
16 * Note: elfcorehdr_addr is not just limited to vmcore. It is also used by
17 * is_kdump_kernel() to determine if we are booting after a panic. Hence
18 * ifdef it under CONFIG_CRASH_DUMP and not CONFIG_PROC_VMCORE.
19 *
20 * elfcorehdr= specifies the location of elf core header
21 * stored by the crashed kernel.
22 */
23static int __init parse_elfcorehdr(char *arg)
24{
25 if (!arg)
26 return -EINVAL;
27
28 elfcorehdr_addr = memparse(arg, &arg);
29
30 return 0;
31}
32early_param("elfcorehdr", parse_elfcorehdr);
33
34/** 12/**
35 * copy_oldmem_page - copy one page from "oldmem" 13 * copy_oldmem_page - copy one page from "oldmem"
36 * @pfn: page frame number to be copied 14 * @pfn: page frame number to be copied
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
index f39ad57296b7..325f98b1736d 100644
--- a/arch/sh/kernel/process.c
+++ b/arch/sh/kernel/process.c
@@ -32,7 +32,7 @@ void free_thread_xstate(struct task_struct *tsk)
32#if THREAD_SHIFT < PAGE_SHIFT 32#if THREAD_SHIFT < PAGE_SHIFT
33static struct kmem_cache *thread_info_cache; 33static struct kmem_cache *thread_info_cache;
34 34
35struct thread_info *alloc_thread_info(struct task_struct *tsk, int node) 35struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node)
36{ 36{
37 struct thread_info *ti; 37 struct thread_info *ti;
38#ifdef CONFIG_DEBUG_STACK_USAGE 38#ifdef CONFIG_DEBUG_STACK_USAGE
@@ -57,7 +57,7 @@ void thread_info_cache_init(void)
57 THREAD_SIZE, SLAB_PANIC, NULL); 57 THREAD_SIZE, SLAB_PANIC, NULL);
58} 58}
59#else 59#else
60struct thread_info *alloc_thread_info(struct task_struct *tsk) 60struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node)
61{ 61{
62#ifdef CONFIG_DEBUG_STACK_USAGE 62#ifdef CONFIG_DEBUG_STACK_USAGE
63 gfp_t mask = GFP_KERNEL | __GFP_ZERO; 63 gfp_t mask = GFP_KERNEL | __GFP_ZERO;
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c
index 90a15d29feeb..2130ca674e9b 100644
--- a/arch/sh/kernel/ptrace_32.c
+++ b/arch/sh/kernel/ptrace_32.c
@@ -101,6 +101,8 @@ static int set_single_step(struct task_struct *tsk, unsigned long addr)
101 101
102 attr = bp->attr; 102 attr = bp->attr;
103 attr.bp_addr = addr; 103 attr.bp_addr = addr;
104 /* reenable breakpoint */
105 attr.disabled = false;
104 err = modify_user_hw_breakpoint(bp, &attr); 106 err = modify_user_hw_breakpoint(bp, &attr);
105 if (unlikely(err)) 107 if (unlikely(err))
106 return err; 108 return err;
@@ -392,6 +394,9 @@ long arch_ptrace(struct task_struct *child, long request,
392 tmp = 0; 394 tmp = 0;
393 } else { 395 } else {
394 unsigned long index; 396 unsigned long index;
397 ret = init_fpu(child);
398 if (ret)
399 break;
395 index = addr - offsetof(struct user, fpu); 400 index = addr - offsetof(struct user, fpu);
396 tmp = ((unsigned long *)child->thread.xstate) 401 tmp = ((unsigned long *)child->thread.xstate)
397 [index >> 2]; 402 [index >> 2];
@@ -423,6 +428,9 @@ long arch_ptrace(struct task_struct *child, long request,
423 else if (addr >= offsetof(struct user, fpu) && 428 else if (addr >= offsetof(struct user, fpu) &&
424 addr < offsetof(struct user, u_fpvalid)) { 429 addr < offsetof(struct user, u_fpvalid)) {
425 unsigned long index; 430 unsigned long index;
431 ret = init_fpu(child);
432 if (ret)
433 break;
426 index = addr - offsetof(struct user, fpu); 434 index = addr - offsetof(struct user, fpu);
427 set_stopped_child_used_math(child); 435 set_stopped_child_used_math(child);
428 ((unsigned long *)child->thread.xstate) 436 ((unsigned long *)child->thread.xstate)
diff --git a/arch/sh/kernel/ptrace_64.c b/arch/sh/kernel/ptrace_64.c
index 4436eacddb15..c8f97649f354 100644
--- a/arch/sh/kernel/ptrace_64.c
+++ b/arch/sh/kernel/ptrace_64.c
@@ -403,6 +403,9 @@ long arch_ptrace(struct task_struct *child, long request,
403 else if ((addr >= offsetof(struct user, fpu)) && 403 else if ((addr >= offsetof(struct user, fpu)) &&
404 (addr < offsetof(struct user, u_fpvalid))) { 404 (addr < offsetof(struct user, u_fpvalid))) {
405 unsigned long index; 405 unsigned long index;
406 ret = init_fpu(child);
407 if (ret)
408 break;
406 index = addr - offsetof(struct user, fpu); 409 index = addr - offsetof(struct user, fpu);
407 tmp = get_fpu_long(child, index); 410 tmp = get_fpu_long(child, index);
408 } else if (addr == offsetof(struct user, u_fpvalid)) { 411 } else if (addr == offsetof(struct user, u_fpvalid)) {
@@ -442,6 +445,9 @@ long arch_ptrace(struct task_struct *child, long request,
442 else if ((addr >= offsetof(struct user, fpu)) && 445 else if ((addr >= offsetof(struct user, fpu)) &&
443 (addr < offsetof(struct user, u_fpvalid))) { 446 (addr < offsetof(struct user, u_fpvalid))) {
444 unsigned long index; 447 unsigned long index;
448 ret = init_fpu(child);
449 if (ret)
450 break;
445 index = addr - offsetof(struct user, fpu); 451 index = addr - offsetof(struct user, fpu);
446 ret = put_fpu_long(child, index, data); 452 ret = put_fpu_long(child, index, data);
447 } 453 }
diff --git a/arch/sh/kernel/syscalls_32.S b/arch/sh/kernel/syscalls_32.S
index 768fb33fdd35..030966a9305c 100644
--- a/arch/sh/kernel/syscalls_32.S
+++ b/arch/sh/kernel/syscalls_32.S
@@ -379,3 +379,4 @@ ENTRY(sys_call_table)
379 .long sys_name_to_handle_at 379 .long sys_name_to_handle_at
380 .long sys_open_by_handle_at /* 360 */ 380 .long sys_open_by_handle_at /* 360 */
381 .long sys_clock_adjtime 381 .long sys_clock_adjtime
382 .long sys_syncfs
diff --git a/arch/sh/kernel/syscalls_64.S b/arch/sh/kernel/syscalls_64.S
index 44e7b00c8067..ca0a6142ab63 100644
--- a/arch/sh/kernel/syscalls_64.S
+++ b/arch/sh/kernel/syscalls_64.S
@@ -399,3 +399,4 @@ sys_call_table:
399 .long sys_name_to_handle_at /* 370 */ 399 .long sys_name_to_handle_at /* 370 */
400 .long sys_open_by_handle_at 400 .long sys_open_by_handle_at
401 .long sys_clock_adjtime 401 .long sys_clock_adjtime
402 .long sys_syncfs
diff --git a/arch/sh/kernel/vsyscall/vsyscall.c b/arch/sh/kernel/vsyscall/vsyscall.c
index 242117cbad67..1d6d51a1ce79 100644
--- a/arch/sh/kernel/vsyscall/vsyscall.c
+++ b/arch/sh/kernel/vsyscall/vsyscall.c
@@ -94,17 +94,17 @@ const char *arch_vma_name(struct vm_area_struct *vma)
94 return NULL; 94 return NULL;
95} 95}
96 96
97struct vm_area_struct *get_gate_vma(struct task_struct *task) 97struct vm_area_struct *get_gate_vma(struct mm_struct *mm)
98{ 98{
99 return NULL; 99 return NULL;
100} 100}
101 101
102int in_gate_area(struct task_struct *task, unsigned long address) 102int in_gate_area(struct mm_struct *mm, unsigned long address)
103{ 103{
104 return 0; 104 return 0;
105} 105}
106 106
107int in_gate_area_no_task(unsigned long address) 107int in_gate_area_no_mm(unsigned long address)
108{ 108{
109 return 0; 109 return 0;
110} 110}
diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c
index b20b1b3eee4b..fad52f1f6812 100644
--- a/arch/sh/mm/pmb.c
+++ b/arch/sh/mm/pmb.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Privileged Space Mapping Buffer (PMB) Support. 4 * Privileged Space Mapping Buffer (PMB) Support.
5 * 5 *
6 * Copyright (C) 2005 - 2010 Paul Mundt 6 * Copyright (C) 2005 - 2011 Paul Mundt
7 * Copyright (C) 2010 Matt Fleming 7 * Copyright (C) 2010 Matt Fleming
8 * 8 *
9 * This file is subject to the terms and conditions of the GNU General Public 9 * This file is subject to the terms and conditions of the GNU General Public
@@ -12,7 +12,7 @@
12 */ 12 */
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/sysdev.h> 15#include <linux/syscore_ops.h>
16#include <linux/cpu.h> 16#include <linux/cpu.h>
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/bitops.h> 18#include <linux/bitops.h>
@@ -874,46 +874,31 @@ static int __init pmb_debugfs_init(void)
874subsys_initcall(pmb_debugfs_init); 874subsys_initcall(pmb_debugfs_init);
875 875
876#ifdef CONFIG_PM 876#ifdef CONFIG_PM
877static int pmb_sysdev_suspend(struct sys_device *dev, pm_message_t state) 877static void pmb_syscore_resume(void)
878{ 878{
879 static pm_message_t prev_state; 879 struct pmb_entry *pmbe;
880 int i; 880 int i;
881 881
882 /* Restore the PMB after a resume from hibernation */ 882 read_lock(&pmb_rwlock);
883 if (state.event == PM_EVENT_ON &&
884 prev_state.event == PM_EVENT_FREEZE) {
885 struct pmb_entry *pmbe;
886
887 read_lock(&pmb_rwlock);
888 883
889 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) { 884 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
890 if (test_bit(i, pmb_map)) { 885 if (test_bit(i, pmb_map)) {
891 pmbe = &pmb_entry_list[i]; 886 pmbe = &pmb_entry_list[i];
892 set_pmb_entry(pmbe); 887 set_pmb_entry(pmbe);
893 }
894 } 888 }
895
896 read_unlock(&pmb_rwlock);
897 } 889 }
898 890
899 prev_state = state; 891 read_unlock(&pmb_rwlock);
900
901 return 0;
902}
903
904static int pmb_sysdev_resume(struct sys_device *dev)
905{
906 return pmb_sysdev_suspend(dev, PMSG_ON);
907} 892}
908 893
909static struct sysdev_driver pmb_sysdev_driver = { 894static struct syscore_ops pmb_syscore_ops = {
910 .suspend = pmb_sysdev_suspend, 895 .resume = pmb_syscore_resume,
911 .resume = pmb_sysdev_resume,
912}; 896};
913 897
914static int __init pmb_sysdev_init(void) 898static int __init pmb_sysdev_init(void)
915{ 899{
916 return sysdev_driver_register(&cpu_sysdev_class, &pmb_sysdev_driver); 900 register_syscore_ops(&pmb_syscore_ops);
901 return 0;
917} 902}
918subsys_initcall(pmb_sysdev_init); 903subsys_initcall(pmb_sysdev_init);
919#endif 904#endif
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index e48f471be547..f766e6bf370e 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -192,6 +192,10 @@ config GENERIC_FIND_NEXT_BIT
192 bool 192 bool
193 default y 193 default y
194 194
195config GENERIC_FIND_BIT_LE
196 bool
197 default y
198
195config GENERIC_HWEIGHT 199config GENERIC_HWEIGHT
196 bool 200 bool
197 default y if !ULTRA_HAS_POPULATION_COUNT 201 default y if !ULTRA_HAS_POPULATION_COUNT
diff --git a/arch/sparc/include/asm/bitops_32.h b/arch/sparc/include/asm/bitops_32.h
index 9cf4ae0cd7ba..25a676653d45 100644
--- a/arch/sparc/include/asm/bitops_32.h
+++ b/arch/sparc/include/asm/bitops_32.h
@@ -103,9 +103,8 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
103#include <asm-generic/bitops/hweight.h> 103#include <asm-generic/bitops/hweight.h>
104#include <asm-generic/bitops/lock.h> 104#include <asm-generic/bitops/lock.h>
105#include <asm-generic/bitops/find.h> 105#include <asm-generic/bitops/find.h>
106#include <asm-generic/bitops/ext2-non-atomic.h> 106#include <asm-generic/bitops/le.h>
107#include <asm-generic/bitops/ext2-atomic.h> 107#include <asm-generic/bitops/ext2-atomic.h>
108#include <asm-generic/bitops/minix.h>
109 108
110#endif /* __KERNEL__ */ 109#endif /* __KERNEL__ */
111 110
diff --git a/arch/sparc/include/asm/bitops_64.h b/arch/sparc/include/asm/bitops_64.h
index 766121a67a24..38e9aa1b2cea 100644
--- a/arch/sparc/include/asm/bitops_64.h
+++ b/arch/sparc/include/asm/bitops_64.h
@@ -89,15 +89,13 @@ static inline unsigned int __arch_hweight8(unsigned int w)
89 89
90#ifdef __KERNEL__ 90#ifdef __KERNEL__
91 91
92#include <asm-generic/bitops/ext2-non-atomic.h> 92#include <asm-generic/bitops/le.h>
93 93
94#define ext2_set_bit_atomic(lock,nr,addr) \ 94#define ext2_set_bit_atomic(lock,nr,addr) \
95 test_and_set_bit((nr) ^ 0x38,(unsigned long *)(addr)) 95 test_and_set_bit((nr) ^ 0x38,(unsigned long *)(addr))
96#define ext2_clear_bit_atomic(lock,nr,addr) \ 96#define ext2_clear_bit_atomic(lock,nr,addr) \
97 test_and_clear_bit((nr) ^ 0x38,(unsigned long *)(addr)) 97 test_and_clear_bit((nr) ^ 0x38,(unsigned long *)(addr))
98 98
99#include <asm-generic/bitops/minix.h>
100
101#endif /* __KERNEL__ */ 99#endif /* __KERNEL__ */
102 100
103#endif /* defined(_SPARC64_BITOPS_H) */ 101#endif /* defined(_SPARC64_BITOPS_H) */
diff --git a/arch/sparc/include/asm/types.h b/arch/sparc/include/asm/types.h
index f02d330cb9f1..91e5a034f987 100644
--- a/arch/sparc/include/asm/types.h
+++ b/arch/sparc/include/asm/types.h
@@ -18,24 +18,6 @@ typedef unsigned short umode_t;
18 18
19#endif /* __ASSEMBLY__ */ 19#endif /* __ASSEMBLY__ */
20 20
21#ifdef __KERNEL__
22
23#ifndef __ASSEMBLY__
24
25#if defined(__arch64__)
26
27/*** SPARC 64 bit ***/
28typedef u64 dma64_addr_t;
29#else
30/*** SPARC 32 bit ***/
31typedef u32 dma64_addr_t;
32
33#endif /* defined(__arch64__) */
34
35#endif /* __ASSEMBLY__ */
36
37#endif /* __KERNEL__ */
38
39#endif /* defined(__sparc__) */ 21#endif /* defined(__sparc__) */
40 22
41#endif /* defined(_SPARC_TYPES_H) */ 23#endif /* defined(_SPARC_TYPES_H) */
diff --git a/arch/sparc/kernel/time_32.c b/arch/sparc/kernel/time_32.c
index 8237dd4dfeb4..4e236391b635 100644
--- a/arch/sparc/kernel/time_32.c
+++ b/arch/sparc/kernel/time_32.c
@@ -145,6 +145,10 @@ static int __devinit clock_probe(struct platform_device *op)
145 if (!model) 145 if (!model)
146 return -ENODEV; 146 return -ENODEV;
147 147
148 /* Only the primary RTC has an address property */
149 if (!of_find_property(dp, "address", NULL))
150 return -ENODEV;
151
148 m48t59_rtc.resource = &op->resource[0]; 152 m48t59_rtc.resource = &op->resource[0];
149 if (!strcmp(model, "mk48t02")) { 153 if (!strcmp(model, "mk48t02")) {
150 /* Map the clock register io area read-only */ 154 /* Map the clock register io area read-only */
diff --git a/arch/sparc/mm/init_32.c b/arch/sparc/mm/init_32.c
index 6d0e02c4fe09..4c31e2b6e71b 100644
--- a/arch/sparc/mm/init_32.c
+++ b/arch/sparc/mm/init_32.c
@@ -75,7 +75,7 @@ void __init kmap_init(void)
75 kmap_prot = __pgprot(SRMMU_ET_PTE | SRMMU_PRIV | SRMMU_CACHE); 75 kmap_prot = __pgprot(SRMMU_ET_PTE | SRMMU_PRIV | SRMMU_CACHE);
76} 76}
77 77
78void show_mem(void) 78void show_mem(unsigned int filter)
79{ 79{
80 printk("Mem-info:\n"); 80 printk("Mem-info:\n");
81 show_free_areas(); 81 show_free_areas();
diff --git a/arch/tile/include/asm/bitops.h b/arch/tile/include/asm/bitops.h
index 6d4f0ff2c68c..132e6bbd07e9 100644
--- a/arch/tile/include/asm/bitops.h
+++ b/arch/tile/include/asm/bitops.h
@@ -122,7 +122,6 @@ static inline unsigned long __arch_hweight64(__u64 w)
122#include <asm-generic/bitops/lock.h> 122#include <asm-generic/bitops/lock.h>
123#include <asm-generic/bitops/find.h> 123#include <asm-generic/bitops/find.h>
124#include <asm-generic/bitops/sched.h> 124#include <asm-generic/bitops/sched.h>
125#include <asm-generic/bitops/ext2-non-atomic.h> 125#include <asm-generic/bitops/le.h>
126#include <asm-generic/bitops/minix.h>
127 126
128#endif /* _ASM_TILE_BITOPS_H */ 127#endif /* _ASM_TILE_BITOPS_H */
diff --git a/arch/tile/mm/pgtable.c b/arch/tile/mm/pgtable.c
index 1a2b36f8866d..de7d8e21e01d 100644
--- a/arch/tile/mm/pgtable.c
+++ b/arch/tile/mm/pgtable.c
@@ -41,7 +41,7 @@
41 * The normal show_free_areas() is too verbose on Tile, with dozens 41 * The normal show_free_areas() is too verbose on Tile, with dozens
42 * of processors and often four NUMA zones each with high and lowmem. 42 * of processors and often four NUMA zones each with high and lowmem.
43 */ 43 */
44void show_mem(void) 44void show_mem(unsigned int filter)
45{ 45{
46 struct zone *zone; 46 struct zone *zone;
47 47
diff --git a/arch/um/Kconfig.common b/arch/um/Kconfig.common
index 1e78940218c0..109ddc0071c6 100644
--- a/arch/um/Kconfig.common
+++ b/arch/um/Kconfig.common
@@ -8,6 +8,7 @@ config UML
8 default y 8 default y
9 select HAVE_GENERIC_HARDIRQS 9 select HAVE_GENERIC_HARDIRQS
10 select GENERIC_HARDIRQS_NO_DEPRECATED 10 select GENERIC_HARDIRQS_NO_DEPRECATED
11 select GENERIC_IRQ_SHOW
11 12
12config MMU 13config MMU
13 bool 14 bool
diff --git a/arch/um/kernel/irq.c b/arch/um/kernel/irq.c
index 64cfea80cfe2..9e485c770308 100644
--- a/arch/um/kernel/irq.c
+++ b/arch/um/kernel/irq.c
@@ -18,52 +18,6 @@
18#include "os.h" 18#include "os.h"
19 19
20/* 20/*
21 * Generic, controller-independent functions:
22 */
23
24int show_interrupts(struct seq_file *p, void *v)
25{
26 int i = *(loff_t *) v, j;
27 struct irqaction * action;
28 unsigned long flags;
29
30 if (i == 0) {
31 seq_printf(p, " ");
32 for_each_online_cpu(j)
33 seq_printf(p, "CPU%d ",j);
34 seq_putc(p, '\n');
35 }
36
37 if (i < NR_IRQS) {
38 struct irq_desc *desc = irq_to_desc(i);
39
40 raw_spin_lock_irqsave(&desc->lock, flags);
41 action = desc->action;
42 if (!action)
43 goto skip;
44 seq_printf(p, "%3d: ",i);
45#ifndef CONFIG_SMP
46 seq_printf(p, "%10u ", kstat_irqs(i));
47#else
48 for_each_online_cpu(j)
49 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
50#endif
51 seq_printf(p, " %14s", get_irq_desc_chip(desc)->name);
52 seq_printf(p, " %s", action->name);
53
54 for (action=action->next; action; action = action->next)
55 seq_printf(p, ", %s", action->name);
56
57 seq_putc(p, '\n');
58skip:
59 raw_spin_unlock_irqrestore(&desc->lock, flags);
60 } else if (i == NR_IRQS)
61 seq_putc(p, '\n');
62
63 return 0;
64}
65
66/*
67 * This list is accessed under irq_lock, except in sigio_handler, 21 * This list is accessed under irq_lock, except in sigio_handler,
68 * where it is safe from being modified. IRQ handlers won't change it - 22 * where it is safe from being modified. IRQ handlers won't change it -
69 * if an IRQ source has vanished, it will be freed by free_irqs just 23 * if an IRQ source has vanished, it will be freed by free_irqs just
@@ -390,11 +344,10 @@ void __init init_IRQ(void)
390{ 344{
391 int i; 345 int i;
392 346
393 set_irq_chip_and_handler(TIMER_IRQ, &SIGVTALRM_irq_type, handle_edge_irq); 347 irq_set_chip_and_handler(TIMER_IRQ, &SIGVTALRM_irq_type, handle_edge_irq);
394 348
395 for (i = 1; i < NR_IRQS; i++) { 349 for (i = 1; i < NR_IRQS; i++)
396 set_irq_chip_and_handler(i, &normal_irq_type, handle_edge_irq); 350 irq_set_chip_and_handler(i, &normal_irq_type, handle_edge_irq);
397 }
398} 351}
399 352
400/* 353/*
diff --git a/arch/unicore32/mm/init.c b/arch/unicore32/mm/init.c
index 3dbe3709b69d..1fc02633f700 100644
--- a/arch/unicore32/mm/init.c
+++ b/arch/unicore32/mm/init.c
@@ -55,7 +55,7 @@ early_param("initrd", early_initrd);
55 */ 55 */
56struct meminfo meminfo; 56struct meminfo meminfo;
57 57
58void show_mem(void) 58void show_mem(unsigned int filter)
59{ 59{
60 int free = 0, total = 0, reserved = 0; 60 int free = 0, total = 0, reserved = 0;
61 int shared = 0, cached = 0, slab = 0, i; 61 int shared = 0, cached = 0, slab = 0, i;
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index d57ddd7573cc..cc6c53a95bfd 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -71,6 +71,7 @@ config X86
71 select GENERIC_IRQ_SHOW 71 select GENERIC_IRQ_SHOW
72 select IRQ_FORCED_THREADING 72 select IRQ_FORCED_THREADING
73 select USE_GENERIC_SMP_HELPERS if SMP 73 select USE_GENERIC_SMP_HELPERS if SMP
74 select ARCH_NO_SYSDEV_OPS
74 75
75config INSTRUCTION_DECODER 76config INSTRUCTION_DECODER
76 def_bool (KPROBES || PERF_EVENTS) 77 def_bool (KPROBES || PERF_EVENTS)
@@ -2096,6 +2097,16 @@ source "drivers/pcmcia/Kconfig"
2096 2097
2097source "drivers/pci/hotplug/Kconfig" 2098source "drivers/pci/hotplug/Kconfig"
2098 2099
2100config RAPIDIO
2101 bool "RapidIO support"
2102 depends on PCI
2103 default n
2104 help
2105 If you say Y here, the kernel will include drivers and
2106 infrastructure code to support RapidIO interconnect devices.
2107
2108source "drivers/rapidio/Kconfig"
2109
2099endmenu 2110endmenu
2100 2111
2101 2112
diff --git a/arch/x86/ia32/ia32_aout.c b/arch/x86/ia32/ia32_aout.c
index 2d93bdbc9ac0..fd843877e841 100644
--- a/arch/x86/ia32/ia32_aout.c
+++ b/arch/x86/ia32/ia32_aout.c
@@ -298,6 +298,7 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs)
298 /* OK, This is the point of no return */ 298 /* OK, This is the point of no return */
299 set_personality(PER_LINUX); 299 set_personality(PER_LINUX);
300 set_thread_flag(TIF_IA32); 300 set_thread_flag(TIF_IA32);
301 current->mm->context.ia32_compat = 1;
301 302
302 setup_new_exec(bprm); 303 setup_new_exec(bprm);
303 304
diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h
index 448d73a371ba..12e0e7dd869c 100644
--- a/arch/x86/include/asm/acpi.h
+++ b/arch/x86/include/asm/acpi.h
@@ -114,9 +114,8 @@ static inline void acpi_disable_pci(void)
114 acpi_noirq_set(); 114 acpi_noirq_set();
115} 115}
116 116
117/* routines for saving/restoring kernel state */ 117/* Low-level suspend routine. */
118extern int acpi_save_state_mem(void); 118extern int acpi_suspend_lowlevel(void);
119extern void acpi_restore_state_mem(void);
120 119
121extern const unsigned char acpi_wakeup_code[]; 120extern const unsigned char acpi_wakeup_code[];
122#define acpi_wakeup_address (__pa(TRAMPOLINE_SYM(acpi_wakeup_code))) 121#define acpi_wakeup_address (__pa(TRAMPOLINE_SYM(acpi_wakeup_code)))
diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index 903683b07e42..69d58131bc8e 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -456,14 +456,12 @@ static inline int fls(int x)
456 456
457#ifdef __KERNEL__ 457#ifdef __KERNEL__
458 458
459#include <asm-generic/bitops/ext2-non-atomic.h> 459#include <asm-generic/bitops/le.h>
460 460
461#define ext2_set_bit_atomic(lock, nr, addr) \ 461#define ext2_set_bit_atomic(lock, nr, addr) \
462 test_and_set_bit((nr), (unsigned long *)(addr)) 462 test_and_set_bit((nr), (unsigned long *)(addr))
463#define ext2_clear_bit_atomic(lock, nr, addr) \ 463#define ext2_clear_bit_atomic(lock, nr, addr) \
464 test_and_clear_bit((nr), (unsigned long *)(addr)) 464 test_and_clear_bit((nr), (unsigned long *)(addr))
465 465
466#include <asm-generic/bitops/minix.h>
467
468#endif /* __KERNEL__ */ 466#endif /* __KERNEL__ */
469#endif /* _ASM_X86_BITOPS_H */ 467#endif /* _ASM_X86_BITOPS_H */
diff --git a/arch/x86/include/asm/mmu.h b/arch/x86/include/asm/mmu.h
index 80a1dee5bea5..aeff3e89b222 100644
--- a/arch/x86/include/asm/mmu.h
+++ b/arch/x86/include/asm/mmu.h
@@ -13,6 +13,12 @@ typedef struct {
13 int size; 13 int size;
14 struct mutex lock; 14 struct mutex lock;
15 void *vdso; 15 void *vdso;
16
17#ifdef CONFIG_X86_64
18 /* True if mm supports a task running in 32 bit compatibility mode. */
19 unsigned short ia32_compat;
20#endif
21
16} mm_context_t; 22} mm_context_t;
17 23
18#ifdef CONFIG_SMP 24#ifdef CONFIG_SMP
diff --git a/arch/x86/include/asm/types.h b/arch/x86/include/asm/types.h
index 88102055a4b8..8e8c23fef08c 100644
--- a/arch/x86/include/asm/types.h
+++ b/arch/x86/include/asm/types.h
@@ -3,12 +3,4 @@
3 3
4#include <asm-generic/types.h> 4#include <asm-generic/types.h>
5 5
6#ifdef __KERNEL__
7#ifndef __ASSEMBLY__
8
9typedef u64 dma64_addr_t;
10
11#endif /* __ASSEMBLY__ */
12#endif /* __KERNEL__ */
13
14#endif /* _ASM_X86_TYPES_H */ 6#endif /* _ASM_X86_TYPES_H */
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 4572c58e66d5..ff93bc1b09c3 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -25,12 +25,12 @@ static char temp_stack[4096];
25#endif 25#endif
26 26
27/** 27/**
28 * acpi_save_state_mem - save kernel state 28 * acpi_suspend_lowlevel - save kernel state
29 * 29 *
30 * Create an identity mapped page table and copy the wakeup routine to 30 * Create an identity mapped page table and copy the wakeup routine to
31 * low memory. 31 * low memory.
32 */ 32 */
33int acpi_save_state_mem(void) 33int acpi_suspend_lowlevel(void)
34{ 34{
35 struct wakeup_header *header; 35 struct wakeup_header *header;
36 /* address in low memory of the wakeup routine. */ 36 /* address in low memory of the wakeup routine. */
@@ -96,16 +96,10 @@ int acpi_save_state_mem(void)
96 saved_magic = 0x123456789abcdef0L; 96 saved_magic = 0x123456789abcdef0L;
97#endif /* CONFIG_64BIT */ 97#endif /* CONFIG_64BIT */
98 98
99 do_suspend_lowlevel();
99 return 0; 100 return 0;
100} 101}
101 102
102/*
103 * acpi_restore_state - undo effects of acpi_save_state_mem
104 */
105void acpi_restore_state_mem(void)
106{
107}
108
109static int __init acpi_sleep_setup(char *str) 103static int __init acpi_sleep_setup(char *str)
110{ 104{
111 while ((str != NULL) && (*str != '\0')) { 105 while ((str != NULL) && (*str != '\0')) {
diff --git a/arch/x86/kernel/acpi/sleep.h b/arch/x86/kernel/acpi/sleep.h
index 86ba1c87165b..416d4be13fef 100644
--- a/arch/x86/kernel/acpi/sleep.h
+++ b/arch/x86/kernel/acpi/sleep.h
@@ -11,3 +11,5 @@ extern int wakeup_pmode_return;
11 11
12extern unsigned long acpi_copy_wakeup_routine(unsigned long); 12extern unsigned long acpi_copy_wakeup_routine(unsigned long);
13extern void wakeup_long64(void); 13extern void wakeup_long64(void);
14
15extern void do_suspend_lowlevel(void);
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index 6e11c8134158..246d727b65b7 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -21,7 +21,7 @@
21#include <linux/acpi.h> 21#include <linux/acpi.h>
22#include <linux/list.h> 22#include <linux/list.h>
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/sysdev.h> 24#include <linux/syscore_ops.h>
25#include <linux/interrupt.h> 25#include <linux/interrupt.h>
26#include <linux/msi.h> 26#include <linux/msi.h>
27#include <asm/pci-direct.h> 27#include <asm/pci-direct.h>
@@ -1260,7 +1260,7 @@ static void disable_iommus(void)
1260 * disable suspend until real resume implemented 1260 * disable suspend until real resume implemented
1261 */ 1261 */
1262 1262
1263static int amd_iommu_resume(struct sys_device *dev) 1263static void amd_iommu_resume(void)
1264{ 1264{
1265 struct amd_iommu *iommu; 1265 struct amd_iommu *iommu;
1266 1266
@@ -1276,11 +1276,9 @@ static int amd_iommu_resume(struct sys_device *dev)
1276 */ 1276 */
1277 amd_iommu_flush_all_devices(); 1277 amd_iommu_flush_all_devices();
1278 amd_iommu_flush_all_domains(); 1278 amd_iommu_flush_all_domains();
1279
1280 return 0;
1281} 1279}
1282 1280
1283static int amd_iommu_suspend(struct sys_device *dev, pm_message_t state) 1281static int amd_iommu_suspend(void)
1284{ 1282{
1285 /* disable IOMMUs to go out of the way for BIOS */ 1283 /* disable IOMMUs to go out of the way for BIOS */
1286 disable_iommus(); 1284 disable_iommus();
@@ -1288,17 +1286,11 @@ static int amd_iommu_suspend(struct sys_device *dev, pm_message_t state)
1288 return 0; 1286 return 0;
1289} 1287}
1290 1288
1291static struct sysdev_class amd_iommu_sysdev_class = { 1289static struct syscore_ops amd_iommu_syscore_ops = {
1292 .name = "amd_iommu",
1293 .suspend = amd_iommu_suspend, 1290 .suspend = amd_iommu_suspend,
1294 .resume = amd_iommu_resume, 1291 .resume = amd_iommu_resume,
1295}; 1292};
1296 1293
1297static struct sys_device device_amd_iommu = {
1298 .id = 0,
1299 .cls = &amd_iommu_sysdev_class,
1300};
1301
1302/* 1294/*
1303 * This is the core init function for AMD IOMMU hardware in the system. 1295 * This is the core init function for AMD IOMMU hardware in the system.
1304 * This function is called from the generic x86 DMA layer initialization 1296 * This function is called from the generic x86 DMA layer initialization
@@ -1415,14 +1407,6 @@ static int __init amd_iommu_init(void)
1415 goto free; 1407 goto free;
1416 } 1408 }
1417 1409
1418 ret = sysdev_class_register(&amd_iommu_sysdev_class);
1419 if (ret)
1420 goto free;
1421
1422 ret = sysdev_register(&device_amd_iommu);
1423 if (ret)
1424 goto free;
1425
1426 ret = amd_iommu_init_devices(); 1410 ret = amd_iommu_init_devices();
1427 if (ret) 1411 if (ret)
1428 goto free; 1412 goto free;
@@ -1441,6 +1425,8 @@ static int __init amd_iommu_init(void)
1441 1425
1442 amd_iommu_init_notifier(); 1426 amd_iommu_init_notifier();
1443 1427
1428 register_syscore_ops(&amd_iommu_syscore_ops);
1429
1444 if (iommu_pass_through) 1430 if (iommu_pass_through)
1445 goto out; 1431 goto out;
1446 1432
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 966673f44141..fabf01eff771 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -24,7 +24,7 @@
24#include <linux/ftrace.h> 24#include <linux/ftrace.h>
25#include <linux/ioport.h> 25#include <linux/ioport.h>
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/sysdev.h> 27#include <linux/syscore_ops.h>
28#include <linux/delay.h> 28#include <linux/delay.h>
29#include <linux/timex.h> 29#include <linux/timex.h>
30#include <linux/dmar.h> 30#include <linux/dmar.h>
@@ -2046,7 +2046,7 @@ static struct {
2046 unsigned int apic_thmr; 2046 unsigned int apic_thmr;
2047} apic_pm_state; 2047} apic_pm_state;
2048 2048
2049static int lapic_suspend(struct sys_device *dev, pm_message_t state) 2049static int lapic_suspend(void)
2050{ 2050{
2051 unsigned long flags; 2051 unsigned long flags;
2052 int maxlvt; 2052 int maxlvt;
@@ -2084,23 +2084,21 @@ static int lapic_suspend(struct sys_device *dev, pm_message_t state)
2084 return 0; 2084 return 0;
2085} 2085}
2086 2086
2087static int lapic_resume(struct sys_device *dev) 2087static void lapic_resume(void)
2088{ 2088{
2089 unsigned int l, h; 2089 unsigned int l, h;
2090 unsigned long flags; 2090 unsigned long flags;
2091 int maxlvt; 2091 int maxlvt, ret;
2092 int ret = 0;
2093 struct IO_APIC_route_entry **ioapic_entries = NULL; 2092 struct IO_APIC_route_entry **ioapic_entries = NULL;
2094 2093
2095 if (!apic_pm_state.active) 2094 if (!apic_pm_state.active)
2096 return 0; 2095 return;
2097 2096
2098 local_irq_save(flags); 2097 local_irq_save(flags);
2099 if (intr_remapping_enabled) { 2098 if (intr_remapping_enabled) {
2100 ioapic_entries = alloc_ioapic_entries(); 2099 ioapic_entries = alloc_ioapic_entries();
2101 if (!ioapic_entries) { 2100 if (!ioapic_entries) {
2102 WARN(1, "Alloc ioapic_entries in lapic resume failed."); 2101 WARN(1, "Alloc ioapic_entries in lapic resume failed.");
2103 ret = -ENOMEM;
2104 goto restore; 2102 goto restore;
2105 } 2103 }
2106 2104
@@ -2162,8 +2160,6 @@ static int lapic_resume(struct sys_device *dev)
2162 } 2160 }
2163restore: 2161restore:
2164 local_irq_restore(flags); 2162 local_irq_restore(flags);
2165
2166 return ret;
2167} 2163}
2168 2164
2169/* 2165/*
@@ -2171,17 +2167,11 @@ restore:
2171 * are needed on every CPU up until machine_halt/restart/poweroff. 2167 * are needed on every CPU up until machine_halt/restart/poweroff.
2172 */ 2168 */
2173 2169
2174static struct sysdev_class lapic_sysclass = { 2170static struct syscore_ops lapic_syscore_ops = {
2175 .name = "lapic",
2176 .resume = lapic_resume, 2171 .resume = lapic_resume,
2177 .suspend = lapic_suspend, 2172 .suspend = lapic_suspend,
2178}; 2173};
2179 2174
2180static struct sys_device device_lapic = {
2181 .id = 0,
2182 .cls = &lapic_sysclass,
2183};
2184
2185static void __cpuinit apic_pm_activate(void) 2175static void __cpuinit apic_pm_activate(void)
2186{ 2176{
2187 apic_pm_state.active = 1; 2177 apic_pm_state.active = 1;
@@ -2189,16 +2179,11 @@ static void __cpuinit apic_pm_activate(void)
2189 2179
2190static int __init init_lapic_sysfs(void) 2180static int __init init_lapic_sysfs(void)
2191{ 2181{
2192 int error;
2193
2194 if (!cpu_has_apic)
2195 return 0;
2196 /* XXX: remove suspend/resume procs if !apic_pm_state.active? */ 2182 /* XXX: remove suspend/resume procs if !apic_pm_state.active? */
2183 if (cpu_has_apic)
2184 register_syscore_ops(&lapic_syscore_ops);
2197 2185
2198 error = sysdev_class_register(&lapic_sysclass); 2186 return 0;
2199 if (!error)
2200 error = sysdev_register(&device_lapic);
2201 return error;
2202} 2187}
2203 2188
2204/* local apic needs to resume before other devices access its registers. */ 2189/* local apic needs to resume before other devices access its registers. */
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 180ca240e03c..68df09bba92e 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -30,7 +30,7 @@
30#include <linux/compiler.h> 30#include <linux/compiler.h>
31#include <linux/acpi.h> 31#include <linux/acpi.h>
32#include <linux/module.h> 32#include <linux/module.h>
33#include <linux/sysdev.h> 33#include <linux/syscore_ops.h>
34#include <linux/msi.h> 34#include <linux/msi.h>
35#include <linux/htirq.h> 35#include <linux/htirq.h>
36#include <linux/freezer.h> 36#include <linux/freezer.h>
@@ -2918,89 +2918,84 @@ static int __init io_apic_bug_finalize(void)
2918 2918
2919late_initcall(io_apic_bug_finalize); 2919late_initcall(io_apic_bug_finalize);
2920 2920
2921struct sysfs_ioapic_data { 2921static struct IO_APIC_route_entry *ioapic_saved_data[MAX_IO_APICS];
2922 struct sys_device dev;
2923 struct IO_APIC_route_entry entry[0];
2924};
2925static struct sysfs_ioapic_data * mp_ioapic_data[MAX_IO_APICS];
2926 2922
2927static int ioapic_suspend(struct sys_device *dev, pm_message_t state) 2923static void suspend_ioapic(int ioapic_id)
2928{ 2924{
2929 struct IO_APIC_route_entry *entry; 2925 struct IO_APIC_route_entry *saved_data = ioapic_saved_data[ioapic_id];
2930 struct sysfs_ioapic_data *data;
2931 int i; 2926 int i;
2932 2927
2933 data = container_of(dev, struct sysfs_ioapic_data, dev); 2928 if (!saved_data)
2934 entry = data->entry; 2929 return;
2935 for (i = 0; i < nr_ioapic_registers[dev->id]; i ++, entry ++ ) 2930
2936 *entry = ioapic_read_entry(dev->id, i); 2931 for (i = 0; i < nr_ioapic_registers[ioapic_id]; i++)
2932 saved_data[i] = ioapic_read_entry(ioapic_id, i);
2933}
2934
2935static int ioapic_suspend(void)
2936{
2937 int ioapic_id;
2938
2939 for (ioapic_id = 0; ioapic_id < nr_ioapics; ioapic_id++)
2940 suspend_ioapic(ioapic_id);
2937 2941
2938 return 0; 2942 return 0;
2939} 2943}
2940 2944
2941static int ioapic_resume(struct sys_device *dev) 2945static void resume_ioapic(int ioapic_id)
2942{ 2946{
2943 struct IO_APIC_route_entry *entry; 2947 struct IO_APIC_route_entry *saved_data = ioapic_saved_data[ioapic_id];
2944 struct sysfs_ioapic_data *data;
2945 unsigned long flags; 2948 unsigned long flags;
2946 union IO_APIC_reg_00 reg_00; 2949 union IO_APIC_reg_00 reg_00;
2947 int i; 2950 int i;
2948 2951
2949 data = container_of(dev, struct sysfs_ioapic_data, dev); 2952 if (!saved_data)
2950 entry = data->entry; 2953 return;
2951 2954
2952 raw_spin_lock_irqsave(&ioapic_lock, flags); 2955 raw_spin_lock_irqsave(&ioapic_lock, flags);
2953 reg_00.raw = io_apic_read(dev->id, 0); 2956 reg_00.raw = io_apic_read(ioapic_id, 0);
2954 if (reg_00.bits.ID != mp_ioapics[dev->id].apicid) { 2957 if (reg_00.bits.ID != mp_ioapics[ioapic_id].apicid) {
2955 reg_00.bits.ID = mp_ioapics[dev->id].apicid; 2958 reg_00.bits.ID = mp_ioapics[ioapic_id].apicid;
2956 io_apic_write(dev->id, 0, reg_00.raw); 2959 io_apic_write(ioapic_id, 0, reg_00.raw);
2957 } 2960 }
2958 raw_spin_unlock_irqrestore(&ioapic_lock, flags); 2961 raw_spin_unlock_irqrestore(&ioapic_lock, flags);
2959 for (i = 0; i < nr_ioapic_registers[dev->id]; i++) 2962 for (i = 0; i < nr_ioapic_registers[ioapic_id]; i++)
2960 ioapic_write_entry(dev->id, i, entry[i]); 2963 ioapic_write_entry(ioapic_id, i, saved_data[i]);
2964}
2961 2965
2962 return 0; 2966static void ioapic_resume(void)
2967{
2968 int ioapic_id;
2969
2970 for (ioapic_id = nr_ioapics - 1; ioapic_id >= 0; ioapic_id--)
2971 resume_ioapic(ioapic_id);
2963} 2972}
2964 2973
2965static struct sysdev_class ioapic_sysdev_class = { 2974static struct syscore_ops ioapic_syscore_ops = {
2966 .name = "ioapic",
2967 .suspend = ioapic_suspend, 2975 .suspend = ioapic_suspend,
2968 .resume = ioapic_resume, 2976 .resume = ioapic_resume,
2969}; 2977};
2970 2978
2971static int __init ioapic_init_sysfs(void) 2979static int __init ioapic_init_ops(void)
2972{ 2980{
2973 struct sys_device * dev; 2981 int i;
2974 int i, size, error;
2975 2982
2976 error = sysdev_class_register(&ioapic_sysdev_class); 2983 for (i = 0; i < nr_ioapics; i++) {
2977 if (error) 2984 unsigned int size;
2978 return error;
2979 2985
2980 for (i = 0; i < nr_ioapics; i++ ) { 2986 size = nr_ioapic_registers[i]
2981 size = sizeof(struct sys_device) + nr_ioapic_registers[i]
2982 * sizeof(struct IO_APIC_route_entry); 2987 * sizeof(struct IO_APIC_route_entry);
2983 mp_ioapic_data[i] = kzalloc(size, GFP_KERNEL); 2988 ioapic_saved_data[i] = kzalloc(size, GFP_KERNEL);
2984 if (!mp_ioapic_data[i]) { 2989 if (!ioapic_saved_data[i])
2985 printk(KERN_ERR "Can't suspend/resume IOAPIC %d\n", i); 2990 pr_err("IOAPIC %d: suspend/resume impossible!\n", i);
2986 continue;
2987 }
2988 dev = &mp_ioapic_data[i]->dev;
2989 dev->id = i;
2990 dev->cls = &ioapic_sysdev_class;
2991 error = sysdev_register(dev);
2992 if (error) {
2993 kfree(mp_ioapic_data[i]);
2994 mp_ioapic_data[i] = NULL;
2995 printk(KERN_ERR "Can't suspend/resume IOAPIC %d\n", i);
2996 continue;
2997 }
2998 } 2991 }
2999 2992
2993 register_syscore_ops(&ioapic_syscore_ops);
2994
3000 return 0; 2995 return 0;
3001} 2996}
3002 2997
3003device_initcall(ioapic_init_sysfs); 2998device_initcall(ioapic_init_ops);
3004 2999
3005/* 3000/*
3006 * Dynamic irq allocate and deallocation 3001 * Dynamic irq allocate and deallocation
diff --git a/arch/x86/kernel/cpu/mcheck/mce-apei.c b/arch/x86/kernel/cpu/mcheck/mce-apei.c
index 8209472b27a5..83930deec3c6 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-apei.c
+++ b/arch/x86/kernel/cpu/mcheck/mce-apei.c
@@ -106,24 +106,34 @@ int apei_write_mce(struct mce *m)
106ssize_t apei_read_mce(struct mce *m, u64 *record_id) 106ssize_t apei_read_mce(struct mce *m, u64 *record_id)
107{ 107{
108 struct cper_mce_record rcd; 108 struct cper_mce_record rcd;
109 ssize_t len; 109 int rc, pos;
110 110
111 len = erst_read_next(&rcd.hdr, sizeof(rcd)); 111 rc = erst_get_record_id_begin(&pos);
112 if (len <= 0) 112 if (rc)
113 return len; 113 return rc;
114 /* Can not skip other records in storage via ERST unless clear them */ 114retry:
115 else if (len != sizeof(rcd) || 115 rc = erst_get_record_id_next(&pos, record_id);
116 uuid_le_cmp(rcd.hdr.creator_id, CPER_CREATOR_MCE)) { 116 if (rc)
117 if (printk_ratelimit()) 117 goto out;
118 pr_warning( 118 /* no more record */
119 "MCE-APEI: Can not skip the unknown record in ERST"); 119 if (*record_id == APEI_ERST_INVALID_RECORD_ID)
120 return -EIO; 120 goto out;
121 } 121 rc = erst_read(*record_id, &rcd.hdr, sizeof(rcd));
122 122 /* someone else has cleared the record, try next one */
123 if (rc == -ENOENT)
124 goto retry;
125 else if (rc < 0)
126 goto out;
127 /* try to skip other type records in storage */
128 else if (rc != sizeof(rcd) ||
129 uuid_le_cmp(rcd.hdr.creator_id, CPER_CREATOR_MCE))
130 goto retry;
123 memcpy(m, &rcd.mce, sizeof(*m)); 131 memcpy(m, &rcd.mce, sizeof(*m));
124 *record_id = rcd.hdr.record_id; 132 rc = sizeof(*m);
133out:
134 erst_get_record_id_end();
125 135
126 return sizeof(*m); 136 return rc;
127} 137}
128 138
129/* Check whether there is record in ERST */ 139/* Check whether there is record in ERST */
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index ab1122998dba..5a05ef63eb4a 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -21,6 +21,7 @@
21#include <linux/percpu.h> 21#include <linux/percpu.h>
22#include <linux/string.h> 22#include <linux/string.h>
23#include <linux/sysdev.h> 23#include <linux/sysdev.h>
24#include <linux/syscore_ops.h>
24#include <linux/delay.h> 25#include <linux/delay.h>
25#include <linux/ctype.h> 26#include <linux/ctype.h>
26#include <linux/sched.h> 27#include <linux/sched.h>
@@ -1749,14 +1750,14 @@ static int mce_disable_error_reporting(void)
1749 return 0; 1750 return 0;
1750} 1751}
1751 1752
1752static int mce_suspend(struct sys_device *dev, pm_message_t state) 1753static int mce_suspend(void)
1753{ 1754{
1754 return mce_disable_error_reporting(); 1755 return mce_disable_error_reporting();
1755} 1756}
1756 1757
1757static int mce_shutdown(struct sys_device *dev) 1758static void mce_shutdown(void)
1758{ 1759{
1759 return mce_disable_error_reporting(); 1760 mce_disable_error_reporting();
1760} 1761}
1761 1762
1762/* 1763/*
@@ -1764,14 +1765,18 @@ static int mce_shutdown(struct sys_device *dev)
1764 * Only one CPU is active at this time, the others get re-added later using 1765 * Only one CPU is active at this time, the others get re-added later using
1765 * CPU hotplug: 1766 * CPU hotplug:
1766 */ 1767 */
1767static int mce_resume(struct sys_device *dev) 1768static void mce_resume(void)
1768{ 1769{
1769 __mcheck_cpu_init_generic(); 1770 __mcheck_cpu_init_generic();
1770 __mcheck_cpu_init_vendor(__this_cpu_ptr(&cpu_info)); 1771 __mcheck_cpu_init_vendor(__this_cpu_ptr(&cpu_info));
1771
1772 return 0;
1773} 1772}
1774 1773
1774static struct syscore_ops mce_syscore_ops = {
1775 .suspend = mce_suspend,
1776 .shutdown = mce_shutdown,
1777 .resume = mce_resume,
1778};
1779
1775static void mce_cpu_restart(void *data) 1780static void mce_cpu_restart(void *data)
1776{ 1781{
1777 del_timer_sync(&__get_cpu_var(mce_timer)); 1782 del_timer_sync(&__get_cpu_var(mce_timer));
@@ -1808,9 +1813,6 @@ static void mce_enable_ce(void *all)
1808} 1813}
1809 1814
1810static struct sysdev_class mce_sysclass = { 1815static struct sysdev_class mce_sysclass = {
1811 .suspend = mce_suspend,
1812 .shutdown = mce_shutdown,
1813 .resume = mce_resume,
1814 .name = "machinecheck", 1816 .name = "machinecheck",
1815}; 1817};
1816 1818
@@ -2139,6 +2141,7 @@ static __init int mcheck_init_device(void)
2139 return err; 2141 return err;
2140 } 2142 }
2141 2143
2144 register_syscore_ops(&mce_syscore_ops);
2142 register_hotcpu_notifier(&mce_cpu_notifier); 2145 register_hotcpu_notifier(&mce_cpu_notifier);
2143 misc_register(&mce_log_device); 2146 misc_register(&mce_log_device);
2144 2147
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index bebabec5b448..307dfbbf4a8e 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -45,6 +45,7 @@
45#include <linux/cpu.h> 45#include <linux/cpu.h>
46#include <linux/pci.h> 46#include <linux/pci.h>
47#include <linux/smp.h> 47#include <linux/smp.h>
48#include <linux/syscore_ops.h>
48 49
49#include <asm/processor.h> 50#include <asm/processor.h>
50#include <asm/e820.h> 51#include <asm/e820.h>
@@ -630,7 +631,7 @@ struct mtrr_value {
630 631
631static struct mtrr_value mtrr_value[MTRR_MAX_VAR_RANGES]; 632static struct mtrr_value mtrr_value[MTRR_MAX_VAR_RANGES];
632 633
633static int mtrr_save(struct sys_device *sysdev, pm_message_t state) 634static int mtrr_save(void)
634{ 635{
635 int i; 636 int i;
636 637
@@ -642,7 +643,7 @@ static int mtrr_save(struct sys_device *sysdev, pm_message_t state)
642 return 0; 643 return 0;
643} 644}
644 645
645static int mtrr_restore(struct sys_device *sysdev) 646static void mtrr_restore(void)
646{ 647{
647 int i; 648 int i;
648 649
@@ -653,12 +654,11 @@ static int mtrr_restore(struct sys_device *sysdev)
653 mtrr_value[i].ltype); 654 mtrr_value[i].ltype);
654 } 655 }
655 } 656 }
656 return 0;
657} 657}
658 658
659 659
660 660
661static struct sysdev_driver mtrr_sysdev_driver = { 661static struct syscore_ops mtrr_syscore_ops = {
662 .suspend = mtrr_save, 662 .suspend = mtrr_save,
663 .resume = mtrr_restore, 663 .resume = mtrr_restore,
664}; 664};
@@ -839,7 +839,7 @@ static int __init mtrr_init_finialize(void)
839 * TBD: is there any system with such CPU which supports 839 * TBD: is there any system with such CPU which supports
840 * suspend/resume? If no, we should remove the code. 840 * suspend/resume? If no, we should remove the code.
841 */ 841 */
842 sysdev_driver_register(&cpu_sysdev_class, &mtrr_sysdev_driver); 842 register_syscore_ops(&mtrr_syscore_ops);
843 843
844 return 0; 844 return 0;
845} 845}
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 87eab4a27dfc..eed3673a8656 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -500,12 +500,17 @@ static bool check_hw_exists(void)
500 return true; 500 return true;
501 501
502bios_fail: 502bios_fail:
503 printk(KERN_CONT "Broken BIOS detected, using software events only.\n"); 503 /*
504 * We still allow the PMU driver to operate:
505 */
506 printk(KERN_CONT "Broken BIOS detected, complain to your hardware vendor.\n");
504 printk(KERN_ERR FW_BUG "the BIOS has corrupted hw-PMU resources (MSR %x is %Lx)\n", reg, val); 507 printk(KERN_ERR FW_BUG "the BIOS has corrupted hw-PMU resources (MSR %x is %Lx)\n", reg, val);
505 return false; 508
509 return true;
506 510
507msr_fail: 511msr_fail:
508 printk(KERN_CONT "Broken PMU hardware detected, using software events only.\n"); 512 printk(KERN_CONT "Broken PMU hardware detected, using software events only.\n");
513
509 return false; 514 return false;
510} 515}
511 516
@@ -912,7 +917,7 @@ static inline void x86_assign_hw_event(struct perf_event *event,
912 hwc->event_base = 0; 917 hwc->event_base = 0;
913 } else if (hwc->idx >= X86_PMC_IDX_FIXED) { 918 } else if (hwc->idx >= X86_PMC_IDX_FIXED) {
914 hwc->config_base = MSR_ARCH_PERFMON_FIXED_CTR_CTRL; 919 hwc->config_base = MSR_ARCH_PERFMON_FIXED_CTR_CTRL;
915 hwc->event_base = MSR_ARCH_PERFMON_FIXED_CTR0; 920 hwc->event_base = MSR_ARCH_PERFMON_FIXED_CTR0 + (hwc->idx - X86_PMC_IDX_FIXED);
916 } else { 921 } else {
917 hwc->config_base = x86_pmu_config_addr(hwc->idx); 922 hwc->config_base = x86_pmu_config_addr(hwc->idx);
918 hwc->event_base = x86_pmu_event_addr(hwc->idx); 923 hwc->event_base = x86_pmu_event_addr(hwc->idx);
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index 0811f5ebfba6..c2520e178d32 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -777,6 +777,7 @@ static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc)
777 * the counter has reached zero value and continued counting before 777 * the counter has reached zero value and continued counting before
778 * real NMI signal was received: 778 * real NMI signal was received:
779 */ 779 */
780 rdmsrl(hwc->event_base, v);
780 if (!(v & ARCH_P4_UNFLAGGED_BIT)) 781 if (!(v & ARCH_P4_UNFLAGGED_BIT))
781 return 1; 782 return 1;
782 783
diff --git a/arch/x86/kernel/crash_dump_32.c b/arch/x86/kernel/crash_dump_32.c
index d5cd13945d5a..642f75a68cd5 100644
--- a/arch/x86/kernel/crash_dump_32.c
+++ b/arch/x86/kernel/crash_dump_32.c
@@ -14,9 +14,6 @@
14 14
15static void *kdump_buf_page; 15static void *kdump_buf_page;
16 16
17/* Stores the physical address of elf header of crash image. */
18unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX;
19
20static inline bool is_crashed_pfn_valid(unsigned long pfn) 17static inline bool is_crashed_pfn_valid(unsigned long pfn)
21{ 18{
22#ifndef CONFIG_X86_PAE 19#ifndef CONFIG_X86_PAE
diff --git a/arch/x86/kernel/crash_dump_64.c b/arch/x86/kernel/crash_dump_64.c
index 994828899e09..afa64adb75ee 100644
--- a/arch/x86/kernel/crash_dump_64.c
+++ b/arch/x86/kernel/crash_dump_64.c
@@ -10,9 +10,6 @@
10#include <linux/uaccess.h> 10#include <linux/uaccess.h>
11#include <linux/io.h> 11#include <linux/io.h>
12 12
13/* Stores the physical address of elf header of crash image. */
14unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX;
15
16/** 13/**
17 * copy_oldmem_page - copy one page from "oldmem" 14 * copy_oldmem_page - copy one page from "oldmem"
18 * @pfn: page frame number to be copied 15 * @pfn: page frame number to be copied
diff --git a/arch/x86/kernel/devicetree.c b/arch/x86/kernel/devicetree.c
index 7a8cebc9ff29..706a9fb46a58 100644
--- a/arch/x86/kernel/devicetree.c
+++ b/arch/x86/kernel/devicetree.c
@@ -65,12 +65,10 @@ unsigned int irq_create_of_mapping(struct device_node *controller,
65 return 0; 65 return 0;
66 ret = ih->xlate(ih, intspec, intsize, &virq, &type); 66 ret = ih->xlate(ih, intspec, intsize, &virq, &type);
67 if (ret) 67 if (ret)
68 return ret; 68 return 0;
69 if (type == IRQ_TYPE_NONE) 69 if (type == IRQ_TYPE_NONE)
70 return virq; 70 return virq;
71 /* set the mask if it is different from current */ 71 irq_set_irq_type(virq, type);
72 if (type == (irq_to_desc(virq)->status & IRQF_TRIGGER_MASK))
73 set_irq_type(virq, type);
74 return virq; 72 return virq;
75} 73}
76EXPORT_SYMBOL_GPL(irq_create_of_mapping); 74EXPORT_SYMBOL_GPL(irq_create_of_mapping);
diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c
index 81ac6c78c01c..e2a3f0606da4 100644
--- a/arch/x86/kernel/dumpstack.c
+++ b/arch/x86/kernel/dumpstack.c
@@ -27,7 +27,7 @@ static int die_counter;
27 27
28void printk_address(unsigned long address, int reliable) 28void printk_address(unsigned long address, int reliable)
29{ 29{
30 printk(" [<%p>] %s%pS\n", (void *) address, 30 printk(" [<%p>] %s%pB\n", (void *) address,
31 reliable ? "" : "? ", (void *) address); 31 reliable ? "" : "? ", (void *) address);
32} 32}
33 33
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index cdf5bfd9d4d5..3e2ef8425316 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -11,6 +11,7 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/crash_dump.h>
14#include <linux/bootmem.h> 15#include <linux/bootmem.h>
15#include <linux/pfn.h> 16#include <linux/pfn.h>
16#include <linux/suspend.h> 17#include <linux/suspend.h>
diff --git a/arch/x86/kernel/i8237.c b/arch/x86/kernel/i8237.c
index b42ca694dc68..8eeaa81de066 100644
--- a/arch/x86/kernel/i8237.c
+++ b/arch/x86/kernel/i8237.c
@@ -10,7 +10,7 @@
10 */ 10 */
11 11
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/sysdev.h> 13#include <linux/syscore_ops.h>
14 14
15#include <asm/dma.h> 15#include <asm/dma.h>
16 16
@@ -21,7 +21,7 @@
21 * in asm/dma.h. 21 * in asm/dma.h.
22 */ 22 */
23 23
24static int i8237A_resume(struct sys_device *dev) 24static void i8237A_resume(void)
25{ 25{
26 unsigned long flags; 26 unsigned long flags;
27 int i; 27 int i;
@@ -41,31 +41,15 @@ static int i8237A_resume(struct sys_device *dev)
41 enable_dma(4); 41 enable_dma(4);
42 42
43 release_dma_lock(flags); 43 release_dma_lock(flags);
44
45 return 0;
46} 44}
47 45
48static int i8237A_suspend(struct sys_device *dev, pm_message_t state) 46static struct syscore_ops i8237_syscore_ops = {
49{
50 return 0;
51}
52
53static struct sysdev_class i8237_sysdev_class = {
54 .name = "i8237",
55 .suspend = i8237A_suspend,
56 .resume = i8237A_resume, 47 .resume = i8237A_resume,
57}; 48};
58 49
59static struct sys_device device_i8237A = { 50static int __init i8237A_init_ops(void)
60 .id = 0,
61 .cls = &i8237_sysdev_class,
62};
63
64static int __init i8237A_init_sysfs(void)
65{ 51{
66 int error = sysdev_class_register(&i8237_sysdev_class); 52 register_syscore_ops(&i8237_syscore_ops);
67 if (!error) 53 return 0;
68 error = sysdev_register(&device_i8237A);
69 return error;
70} 54}
71device_initcall(i8237A_init_sysfs); 55device_initcall(i8237A_init_ops);
diff --git a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c
index d9ca749c123b..65b8f5c2eebf 100644
--- a/arch/x86/kernel/i8259.c
+++ b/arch/x86/kernel/i8259.c
@@ -8,7 +8,7 @@
8#include <linux/random.h> 8#include <linux/random.h>
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/kernel_stat.h> 10#include <linux/kernel_stat.h>
11#include <linux/sysdev.h> 11#include <linux/syscore_ops.h>
12#include <linux/bitops.h> 12#include <linux/bitops.h>
13#include <linux/acpi.h> 13#include <linux/acpi.h>
14#include <linux/io.h> 14#include <linux/io.h>
@@ -245,20 +245,19 @@ static void save_ELCR(char *trigger)
245 trigger[1] = inb(0x4d1) & 0xDE; 245 trigger[1] = inb(0x4d1) & 0xDE;
246} 246}
247 247
248static int i8259A_resume(struct sys_device *dev) 248static void i8259A_resume(void)
249{ 249{
250 init_8259A(i8259A_auto_eoi); 250 init_8259A(i8259A_auto_eoi);
251 restore_ELCR(irq_trigger); 251 restore_ELCR(irq_trigger);
252 return 0;
253} 252}
254 253
255static int i8259A_suspend(struct sys_device *dev, pm_message_t state) 254static int i8259A_suspend(void)
256{ 255{
257 save_ELCR(irq_trigger); 256 save_ELCR(irq_trigger);
258 return 0; 257 return 0;
259} 258}
260 259
261static int i8259A_shutdown(struct sys_device *dev) 260static void i8259A_shutdown(void)
262{ 261{
263 /* Put the i8259A into a quiescent state that 262 /* Put the i8259A into a quiescent state that
264 * the kernel initialization code can get it 263 * the kernel initialization code can get it
@@ -266,21 +265,14 @@ static int i8259A_shutdown(struct sys_device *dev)
266 */ 265 */
267 outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */ 266 outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */
268 outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-1 */ 267 outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-1 */
269 return 0;
270} 268}
271 269
272static struct sysdev_class i8259_sysdev_class = { 270static struct syscore_ops i8259_syscore_ops = {
273 .name = "i8259",
274 .suspend = i8259A_suspend, 271 .suspend = i8259A_suspend,
275 .resume = i8259A_resume, 272 .resume = i8259A_resume,
276 .shutdown = i8259A_shutdown, 273 .shutdown = i8259A_shutdown,
277}; 274};
278 275
279static struct sys_device device_i8259A = {
280 .id = 0,
281 .cls = &i8259_sysdev_class,
282};
283
284static void mask_8259A(void) 276static void mask_8259A(void)
285{ 277{
286 unsigned long flags; 278 unsigned long flags;
@@ -399,17 +391,12 @@ struct legacy_pic default_legacy_pic = {
399 391
400struct legacy_pic *legacy_pic = &default_legacy_pic; 392struct legacy_pic *legacy_pic = &default_legacy_pic;
401 393
402static int __init i8259A_init_sysfs(void) 394static int __init i8259A_init_ops(void)
403{ 395{
404 int error; 396 if (legacy_pic == &default_legacy_pic)
405 397 register_syscore_ops(&i8259_syscore_ops);
406 if (legacy_pic != &default_legacy_pic)
407 return 0;
408 398
409 error = sysdev_class_register(&i8259_sysdev_class); 399 return 0;
410 if (!error)
411 error = sysdev_register(&device_i8259A);
412 return error;
413} 400}
414 401
415device_initcall(i8259A_init_sysfs); 402device_initcall(i8259A_init_ops);
diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c
index dba0b36941a5..5f9ecff328b5 100644
--- a/arch/x86/kernel/kgdb.c
+++ b/arch/x86/kernel/kgdb.c
@@ -121,8 +121,8 @@ char *dbg_get_reg(int regno, void *mem, struct pt_regs *regs)
121 memcpy(mem, (void *)regs + dbg_reg_def[regno].offset, 121 memcpy(mem, (void *)regs + dbg_reg_def[regno].offset,
122 dbg_reg_def[regno].size); 122 dbg_reg_def[regno].size);
123 123
124 switch (regno) {
125#ifdef CONFIG_X86_32 124#ifdef CONFIG_X86_32
125 switch (regno) {
126 case GDB_SS: 126 case GDB_SS:
127 if (!user_mode_vm(regs)) 127 if (!user_mode_vm(regs))
128 *(unsigned long *)mem = __KERNEL_DS; 128 *(unsigned long *)mem = __KERNEL_DS;
@@ -135,8 +135,8 @@ char *dbg_get_reg(int regno, void *mem, struct pt_regs *regs)
135 case GDB_FS: 135 case GDB_FS:
136 *(unsigned long *)mem = 0xFFFF; 136 *(unsigned long *)mem = 0xFFFF;
137 break; 137 break;
138#endif
139 } 138 }
139#endif
140 return dbg_reg_def[regno].name; 140 return dbg_reg_def[regno].name;
141} 141}
142 142
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index 87af68e0e1e1..5ed0ab549eb8 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -82,6 +82,7 @@
82#include <linux/cpu.h> 82#include <linux/cpu.h>
83#include <linux/fs.h> 83#include <linux/fs.h>
84#include <linux/mm.h> 84#include <linux/mm.h>
85#include <linux/syscore_ops.h>
85 86
86#include <asm/microcode.h> 87#include <asm/microcode.h>
87#include <asm/processor.h> 88#include <asm/processor.h>
@@ -438,33 +439,25 @@ static int mc_sysdev_remove(struct sys_device *sys_dev)
438 return 0; 439 return 0;
439} 440}
440 441
441static int mc_sysdev_resume(struct sys_device *dev) 442static struct sysdev_driver mc_sysdev_driver = {
443 .add = mc_sysdev_add,
444 .remove = mc_sysdev_remove,
445};
446
447/**
448 * mc_bp_resume - Update boot CPU microcode during resume.
449 */
450static void mc_bp_resume(void)
442{ 451{
443 int cpu = dev->id; 452 int cpu = smp_processor_id();
444 struct ucode_cpu_info *uci = ucode_cpu_info + cpu; 453 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
445 454
446 if (!cpu_online(cpu))
447 return 0;
448
449 /*
450 * All non-bootup cpus are still disabled,
451 * so only CPU 0 will apply ucode here.
452 *
453 * Moreover, there can be no concurrent
454 * updates from any other places at this point.
455 */
456 WARN_ON(cpu != 0);
457
458 if (uci->valid && uci->mc) 455 if (uci->valid && uci->mc)
459 microcode_ops->apply_microcode(cpu); 456 microcode_ops->apply_microcode(cpu);
460
461 return 0;
462} 457}
463 458
464static struct sysdev_driver mc_sysdev_driver = { 459static struct syscore_ops mc_syscore_ops = {
465 .add = mc_sysdev_add, 460 .resume = mc_bp_resume,
466 .remove = mc_sysdev_remove,
467 .resume = mc_sysdev_resume,
468}; 461};
469 462
470static __cpuinit int 463static __cpuinit int
@@ -542,6 +535,7 @@ static int __init microcode_init(void)
542 if (error) 535 if (error)
543 return error; 536 return error;
544 537
538 register_syscore_ops(&mc_syscore_ops);
545 register_hotcpu_notifier(&mc_cpu_notifier); 539 register_hotcpu_notifier(&mc_cpu_notifier);
546 540
547 pr_info("Microcode Update Driver: v" MICROCODE_VERSION 541 pr_info("Microcode Update Driver: v" MICROCODE_VERSION
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index 6f789a887c06..5a532ce646bf 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -714,10 +714,6 @@ static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
714 *nr_m_spare += 1; 714 *nr_m_spare += 1;
715 } 715 }
716} 716}
717#else /* CONFIG_X86_IO_APIC */
718static
719inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {}
720#endif /* CONFIG_X86_IO_APIC */
721 717
722static int 718static int
723check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count) 719check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count)
@@ -731,6 +727,10 @@ check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count)
731 727
732 return ret; 728 return ret;
733} 729}
730#else /* CONFIG_X86_IO_APIC */
731static
732inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {}
733#endif /* CONFIG_X86_IO_APIC */
734 734
735static int __init replace_intsrc_all(struct mpc_table *mpc, 735static int __init replace_intsrc_all(struct mpc_table *mpc,
736 unsigned long mpc_new_phys, 736 unsigned long mpc_new_phys,
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index c01ffa5b9b87..82ada01625b9 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -27,7 +27,7 @@
27#include <linux/kdebug.h> 27#include <linux/kdebug.h>
28#include <linux/scatterlist.h> 28#include <linux/scatterlist.h>
29#include <linux/iommu-helper.h> 29#include <linux/iommu-helper.h>
30#include <linux/sysdev.h> 30#include <linux/syscore_ops.h>
31#include <linux/io.h> 31#include <linux/io.h>
32#include <linux/gfp.h> 32#include <linux/gfp.h>
33#include <asm/atomic.h> 33#include <asm/atomic.h>
@@ -589,7 +589,7 @@ void set_up_gart_resume(u32 aper_order, u32 aper_alloc)
589 aperture_alloc = aper_alloc; 589 aperture_alloc = aper_alloc;
590} 590}
591 591
592static void gart_fixup_northbridges(struct sys_device *dev) 592static void gart_fixup_northbridges(void)
593{ 593{
594 int i; 594 int i;
595 595
@@ -613,33 +613,20 @@ static void gart_fixup_northbridges(struct sys_device *dev)
613 } 613 }
614} 614}
615 615
616static int gart_resume(struct sys_device *dev) 616static void gart_resume(void)
617{ 617{
618 pr_info("PCI-DMA: Resuming GART IOMMU\n"); 618 pr_info("PCI-DMA: Resuming GART IOMMU\n");
619 619
620 gart_fixup_northbridges(dev); 620 gart_fixup_northbridges();
621 621
622 enable_gart_translations(); 622 enable_gart_translations();
623
624 return 0;
625} 623}
626 624
627static int gart_suspend(struct sys_device *dev, pm_message_t state) 625static struct syscore_ops gart_syscore_ops = {
628{
629 return 0;
630}
631
632static struct sysdev_class gart_sysdev_class = {
633 .name = "gart",
634 .suspend = gart_suspend,
635 .resume = gart_resume, 626 .resume = gart_resume,
636 627
637}; 628};
638 629
639static struct sys_device device_gart = {
640 .cls = &gart_sysdev_class,
641};
642
643/* 630/*
644 * Private Northbridge GATT initialization in case we cannot use the 631 * Private Northbridge GATT initialization in case we cannot use the
645 * AGP driver for some reason. 632 * AGP driver for some reason.
@@ -650,7 +637,7 @@ static __init int init_amd_gatt(struct agp_kern_info *info)
650 unsigned aper_base, new_aper_base; 637 unsigned aper_base, new_aper_base;
651 struct pci_dev *dev; 638 struct pci_dev *dev;
652 void *gatt; 639 void *gatt;
653 int i, error; 640 int i;
654 641
655 pr_info("PCI-DMA: Disabling AGP.\n"); 642 pr_info("PCI-DMA: Disabling AGP.\n");
656 643
@@ -685,12 +672,7 @@ static __init int init_amd_gatt(struct agp_kern_info *info)
685 672
686 agp_gatt_table = gatt; 673 agp_gatt_table = gatt;
687 674
688 error = sysdev_class_register(&gart_sysdev_class); 675 register_syscore_ops(&gart_syscore_ops);
689 if (!error)
690 error = sysdev_register(&device_gart);
691 if (error)
692 panic("Could not register gart_sysdev -- "
693 "would corrupt data on next suspend");
694 676
695 flush_gart(); 677 flush_gart();
696 678
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index bd387e8f73b4..6c9dd922ac0d 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -501,6 +501,10 @@ void set_personality_64bit(void)
501 /* Make sure to be in 64bit mode */ 501 /* Make sure to be in 64bit mode */
502 clear_thread_flag(TIF_IA32); 502 clear_thread_flag(TIF_IA32);
503 503
504 /* Ensure the corresponding mm is not marked. */
505 if (current->mm)
506 current->mm->context.ia32_compat = 0;
507
504 /* TBD: overwrites user setup. Should have two bits. 508 /* TBD: overwrites user setup. Should have two bits.
505 But 64bit processes have always behaved this way, 509 But 64bit processes have always behaved this way,
506 so it's not too bad. The main problem is just that 510 so it's not too bad. The main problem is just that
@@ -516,6 +520,10 @@ void set_personality_ia32(void)
516 set_thread_flag(TIF_IA32); 520 set_thread_flag(TIF_IA32);
517 current->personality |= force_personality32; 521 current->personality |= force_personality32;
518 522
523 /* Mark the associated mm as containing 32-bit tasks. */
524 if (current->mm)
525 current->mm->context.ia32_compat = 1;
526
519 /* Prepare the first "return" to user space */ 527 /* Prepare the first "return" to user space */
520 current_thread_info()->status |= TS_COMPAT; 528 current_thread_info()->status |= TS_COMPAT;
521} 529}
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 32bd87cbf982..5a0484a95ad6 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -619,28 +619,6 @@ void __init reserve_standard_io_resources(void)
619 619
620} 620}
621 621
622/*
623 * Note: elfcorehdr_addr is not just limited to vmcore. It is also used by
624 * is_kdump_kernel() to determine if we are booting after a panic. Hence
625 * ifdef it under CONFIG_CRASH_DUMP and not CONFIG_PROC_VMCORE.
626 */
627
628#ifdef CONFIG_CRASH_DUMP
629/* elfcorehdr= specifies the location of elf core header
630 * stored by the crashed kernel. This option will be passed
631 * by kexec loader to the capture kernel.
632 */
633static int __init setup_elfcorehdr(char *arg)
634{
635 char *end;
636 if (!arg)
637 return -EINVAL;
638 elfcorehdr_addr = memparse(arg, &end);
639 return end > arg ? 0 : -EINVAL;
640}
641early_param("elfcorehdr", setup_elfcorehdr);
642#endif
643
644static __init void reserve_ibft_region(void) 622static __init void reserve_ibft_region(void)
645{ 623{
646 unsigned long addr, size = 0; 624 unsigned long addr, size = 0;
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index 2362b646178e..794233587287 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -862,18 +862,18 @@ static struct vm_area_struct gate_vma = {
862 .vm_flags = VM_READ | VM_EXEC 862 .vm_flags = VM_READ | VM_EXEC
863}; 863};
864 864
865struct vm_area_struct *get_gate_vma(struct task_struct *tsk) 865struct vm_area_struct *get_gate_vma(struct mm_struct *mm)
866{ 866{
867#ifdef CONFIG_IA32_EMULATION 867#ifdef CONFIG_IA32_EMULATION
868 if (test_tsk_thread_flag(tsk, TIF_IA32)) 868 if (!mm || mm->context.ia32_compat)
869 return NULL; 869 return NULL;
870#endif 870#endif
871 return &gate_vma; 871 return &gate_vma;
872} 872}
873 873
874int in_gate_area(struct task_struct *task, unsigned long addr) 874int in_gate_area(struct mm_struct *mm, unsigned long addr)
875{ 875{
876 struct vm_area_struct *vma = get_gate_vma(task); 876 struct vm_area_struct *vma = get_gate_vma(mm);
877 877
878 if (!vma) 878 if (!vma)
879 return 0; 879 return 0;
@@ -882,11 +882,11 @@ int in_gate_area(struct task_struct *task, unsigned long addr)
882} 882}
883 883
884/* 884/*
885 * Use this when you have no reliable task/vma, typically from interrupt 885 * Use this when you have no reliable mm, typically from interrupt
886 * context. It is less reliable than using the task's vma and may give 886 * context. It is less reliable than using a task's mm and may give
887 * false positives: 887 * false positives.
888 */ 888 */
889int in_gate_area_no_task(unsigned long addr) 889int in_gate_area_no_mm(unsigned long addr)
890{ 890{
891 return (addr >= VSYSCALL_START) && (addr < VSYSCALL_END); 891 return (addr >= VSYSCALL_START) && (addr < VSYSCALL_END);
892} 892}
diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c
index e2b7b0c06cdf..8dace181c88e 100644
--- a/arch/x86/oprofile/nmi_int.c
+++ b/arch/x86/oprofile/nmi_int.c
@@ -15,7 +15,7 @@
15#include <linux/notifier.h> 15#include <linux/notifier.h>
16#include <linux/smp.h> 16#include <linux/smp.h>
17#include <linux/oprofile.h> 17#include <linux/oprofile.h>
18#include <linux/sysdev.h> 18#include <linux/syscore_ops.h>
19#include <linux/slab.h> 19#include <linux/slab.h>
20#include <linux/moduleparam.h> 20#include <linux/moduleparam.h>
21#include <linux/kdebug.h> 21#include <linux/kdebug.h>
@@ -536,7 +536,7 @@ static void nmi_shutdown(void)
536 536
537#ifdef CONFIG_PM 537#ifdef CONFIG_PM
538 538
539static int nmi_suspend(struct sys_device *dev, pm_message_t state) 539static int nmi_suspend(void)
540{ 540{
541 /* Only one CPU left, just stop that one */ 541 /* Only one CPU left, just stop that one */
542 if (nmi_enabled == 1) 542 if (nmi_enabled == 1)
@@ -544,49 +544,31 @@ static int nmi_suspend(struct sys_device *dev, pm_message_t state)
544 return 0; 544 return 0;
545} 545}
546 546
547static int nmi_resume(struct sys_device *dev) 547static void nmi_resume(void)
548{ 548{
549 if (nmi_enabled == 1) 549 if (nmi_enabled == 1)
550 nmi_cpu_start(NULL); 550 nmi_cpu_start(NULL);
551 return 0;
552} 551}
553 552
554static struct sysdev_class oprofile_sysclass = { 553static struct syscore_ops oprofile_syscore_ops = {
555 .name = "oprofile",
556 .resume = nmi_resume, 554 .resume = nmi_resume,
557 .suspend = nmi_suspend, 555 .suspend = nmi_suspend,
558}; 556};
559 557
560static struct sys_device device_oprofile = { 558static void __init init_suspend_resume(void)
561 .id = 0,
562 .cls = &oprofile_sysclass,
563};
564
565static int __init init_sysfs(void)
566{ 559{
567 int error; 560 register_syscore_ops(&oprofile_syscore_ops);
568
569 error = sysdev_class_register(&oprofile_sysclass);
570 if (error)
571 return error;
572
573 error = sysdev_register(&device_oprofile);
574 if (error)
575 sysdev_class_unregister(&oprofile_sysclass);
576
577 return error;
578} 561}
579 562
580static void exit_sysfs(void) 563static void exit_suspend_resume(void)
581{ 564{
582 sysdev_unregister(&device_oprofile); 565 unregister_syscore_ops(&oprofile_syscore_ops);
583 sysdev_class_unregister(&oprofile_sysclass);
584} 566}
585 567
586#else 568#else
587 569
588static inline int init_sysfs(void) { return 0; } 570static inline void init_suspend_resume(void) { }
589static inline void exit_sysfs(void) { } 571static inline void exit_suspend_resume(void) { }
590 572
591#endif /* CONFIG_PM */ 573#endif /* CONFIG_PM */
592 574
@@ -789,9 +771,7 @@ int __init op_nmi_init(struct oprofile_operations *ops)
789 771
790 mux_init(ops); 772 mux_init(ops);
791 773
792 ret = init_sysfs(); 774 init_suspend_resume();
793 if (ret)
794 return ret;
795 775
796 printk(KERN_INFO "oprofile: using NMI interrupt.\n"); 776 printk(KERN_INFO "oprofile: using NMI interrupt.\n");
797 return 0; 777 return 0;
@@ -799,5 +779,5 @@ int __init op_nmi_init(struct oprofile_operations *ops)
799 779
800void op_nmi_exit(void) 780void op_nmi_exit(void)
801{ 781{
802 exit_sysfs(); 782 exit_suspend_resume();
803} 783}
diff --git a/arch/x86/platform/olpc/olpc-xo1.c b/arch/x86/platform/olpc/olpc-xo1.c
index 127775696d6c..99513642a0e6 100644
--- a/arch/x86/platform/olpc/olpc-xo1.c
+++ b/arch/x86/platform/olpc/olpc-xo1.c
@@ -15,6 +15,7 @@
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/pm.h> 17#include <linux/pm.h>
18#include <linux/mfd/core.h>
18 19
19#include <asm/io.h> 20#include <asm/io.h>
20#include <asm/olpc.h> 21#include <asm/olpc.h>
@@ -56,25 +57,24 @@ static void xo1_power_off(void)
56static int __devinit olpc_xo1_probe(struct platform_device *pdev) 57static int __devinit olpc_xo1_probe(struct platform_device *pdev)
57{ 58{
58 struct resource *res; 59 struct resource *res;
60 int err;
59 61
60 /* don't run on non-XOs */ 62 /* don't run on non-XOs */
61 if (!machine_is_olpc()) 63 if (!machine_is_olpc())
62 return -ENODEV; 64 return -ENODEV;
63 65
66 err = mfd_cell_enable(pdev);
67 if (err)
68 return err;
69
64 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 70 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
65 if (!res) { 71 if (!res) {
66 dev_err(&pdev->dev, "can't fetch device resource info\n"); 72 dev_err(&pdev->dev, "can't fetch device resource info\n");
67 return -EIO; 73 return -EIO;
68 } 74 }
69 75 if (strcmp(pdev->name, "olpc-xo1-pms") == 0)
70 if (!request_region(res->start, resource_size(res), DRV_NAME)) {
71 dev_err(&pdev->dev, "can't request region\n");
72 return -EIO;
73 }
74
75 if (strcmp(pdev->name, "cs5535-pms") == 0)
76 pms_base = res->start; 76 pms_base = res->start;
77 else if (strcmp(pdev->name, "cs5535-acpi") == 0) 77 else if (strcmp(pdev->name, "olpc-xo1-ac-acpi") == 0)
78 acpi_base = res->start; 78 acpi_base = res->start;
79 79
80 /* If we have both addresses, we can override the poweroff hook */ 80 /* If we have both addresses, we can override the poweroff hook */
@@ -88,14 +88,11 @@ static int __devinit olpc_xo1_probe(struct platform_device *pdev)
88 88
89static int __devexit olpc_xo1_remove(struct platform_device *pdev) 89static int __devexit olpc_xo1_remove(struct platform_device *pdev)
90{ 90{
91 struct resource *r; 91 mfd_cell_disable(pdev);
92
93 r = platform_get_resource(pdev, IORESOURCE_IO, 0);
94 release_region(r->start, resource_size(r));
95 92
96 if (strcmp(pdev->name, "cs5535-pms") == 0) 93 if (strcmp(pdev->name, "olpc-xo1-pms") == 0)
97 pms_base = 0; 94 pms_base = 0;
98 else if (strcmp(pdev->name, "cs5535-acpi") == 0) 95 else if (strcmp(pdev->name, "olpc-xo1-acpi") == 0)
99 acpi_base = 0; 96 acpi_base = 0;
100 97
101 pm_power_off = NULL; 98 pm_power_off = NULL;
@@ -104,7 +101,7 @@ static int __devexit olpc_xo1_remove(struct platform_device *pdev)
104 101
105static struct platform_driver cs5535_pms_drv = { 102static struct platform_driver cs5535_pms_drv = {
106 .driver = { 103 .driver = {
107 .name = "cs5535-pms", 104 .name = "olpc-xo1-pms",
108 .owner = THIS_MODULE, 105 .owner = THIS_MODULE,
109 }, 106 },
110 .probe = olpc_xo1_probe, 107 .probe = olpc_xo1_probe,
@@ -113,7 +110,7 @@ static struct platform_driver cs5535_pms_drv = {
113 110
114static struct platform_driver cs5535_acpi_drv = { 111static struct platform_driver cs5535_acpi_drv = {
115 .driver = { 112 .driver = {
116 .name = "cs5535-acpi", 113 .name = "olpc-xo1-acpi",
117 .owner = THIS_MODULE, 114 .owner = THIS_MODULE,
118 }, 115 },
119 .probe = olpc_xo1_probe, 116 .probe = olpc_xo1_probe,
@@ -124,26 +121,27 @@ static int __init olpc_xo1_init(void)
124{ 121{
125 int r; 122 int r;
126 123
127 r = platform_driver_register(&cs5535_pms_drv); 124 r = mfd_shared_platform_driver_register(&cs5535_pms_drv, "cs5535-pms");
128 if (r) 125 if (r)
129 return r; 126 return r;
130 127
131 r = platform_driver_register(&cs5535_acpi_drv); 128 r = mfd_shared_platform_driver_register(&cs5535_acpi_drv,
129 "cs5535-acpi");
132 if (r) 130 if (r)
133 platform_driver_unregister(&cs5535_pms_drv); 131 mfd_shared_platform_driver_unregister(&cs5535_pms_drv);
134 132
135 return r; 133 return r;
136} 134}
137 135
138static void __exit olpc_xo1_exit(void) 136static void __exit olpc_xo1_exit(void)
139{ 137{
140 platform_driver_unregister(&cs5535_acpi_drv); 138 mfd_shared_platform_driver_unregister(&cs5535_acpi_drv);
141 platform_driver_unregister(&cs5535_pms_drv); 139 mfd_shared_platform_driver_unregister(&cs5535_pms_drv);
142} 140}
143 141
144MODULE_AUTHOR("Daniel Drake <dsd@laptop.org>"); 142MODULE_AUTHOR("Daniel Drake <dsd@laptop.org>");
145MODULE_LICENSE("GPL"); 143MODULE_LICENSE("GPL");
146MODULE_ALIAS("platform:olpc-xo1"); 144MODULE_ALIAS("platform:cs5535-pms");
147 145
148module_init(olpc_xo1_init); 146module_init(olpc_xo1_init);
149module_exit(olpc_xo1_exit); 147module_exit(olpc_xo1_exit);
diff --git a/arch/x86/vdso/vdso32-setup.c b/arch/x86/vdso/vdso32-setup.c
index 36df991985b2..468d591dde31 100644
--- a/arch/x86/vdso/vdso32-setup.c
+++ b/arch/x86/vdso/vdso32-setup.c
@@ -417,24 +417,25 @@ const char *arch_vma_name(struct vm_area_struct *vma)
417 return NULL; 417 return NULL;
418} 418}
419 419
420struct vm_area_struct *get_gate_vma(struct task_struct *tsk) 420struct vm_area_struct *get_gate_vma(struct mm_struct *mm)
421{ 421{
422 struct mm_struct *mm = tsk->mm; 422 /*
423 423 * Check to see if the corresponding task was created in compat vdso
424 /* Check to see if this task was created in compat vdso mode */ 424 * mode.
425 */
425 if (mm && mm->context.vdso == (void *)VDSO_HIGH_BASE) 426 if (mm && mm->context.vdso == (void *)VDSO_HIGH_BASE)
426 return &gate_vma; 427 return &gate_vma;
427 return NULL; 428 return NULL;
428} 429}
429 430
430int in_gate_area(struct task_struct *task, unsigned long addr) 431int in_gate_area(struct mm_struct *mm, unsigned long addr)
431{ 432{
432 const struct vm_area_struct *vma = get_gate_vma(task); 433 const struct vm_area_struct *vma = get_gate_vma(mm);
433 434
434 return vma && addr >= vma->vm_start && addr < vma->vm_end; 435 return vma && addr >= vma->vm_start && addr < vma->vm_end;
435} 436}
436 437
437int in_gate_area_no_task(unsigned long addr) 438int in_gate_area_no_mm(unsigned long addr)
438{ 439{
439 return 0; 440 return 0;
440} 441}
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index d373d159e75e..1d730b5579a0 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -7,6 +7,9 @@ config ZONE_DMA
7config XTENSA 7config XTENSA
8 def_bool y 8 def_bool y
9 select HAVE_IDE 9 select HAVE_IDE
10 select HAVE_GENERIC_HARDIRQS
11 select GENERIC_IRQ_SHOW
12 select GENERIC_HARDIRQS_NO_DEPRECATED
10 help 13 help
11 Xtensa processors are 32-bit RISC machines designed by Tensilica 14 Xtensa processors are 32-bit RISC machines designed by Tensilica
12 primarily for embedded systems. These processors are both 15 primarily for embedded systems. These processors are both
@@ -21,10 +24,10 @@ config RWSEM_XCHGADD_ALGORITHM
21config GENERIC_FIND_NEXT_BIT 24config GENERIC_FIND_NEXT_BIT
22 def_bool y 25 def_bool y
23 26
24config GENERIC_HWEIGHT 27config GENERIC_FIND_BIT_LE
25 def_bool y 28 def_bool y
26 29
27config GENERIC_HARDIRQS 30config GENERIC_HWEIGHT
28 def_bool y 31 def_bool y
29 32
30config GENERIC_GPIO 33config GENERIC_GPIO
diff --git a/arch/xtensa/include/asm/bitops.h b/arch/xtensa/include/asm/bitops.h
index 6c3930397bd3..c8fac8d8190d 100644
--- a/arch/xtensa/include/asm/bitops.h
+++ b/arch/xtensa/include/asm/bitops.h
@@ -106,7 +106,7 @@ static inline unsigned long __fls(unsigned long word)
106 106
107#include <asm-generic/bitops/fls64.h> 107#include <asm-generic/bitops/fls64.h>
108#include <asm-generic/bitops/find.h> 108#include <asm-generic/bitops/find.h>
109#include <asm-generic/bitops/ext2-non-atomic.h> 109#include <asm-generic/bitops/le.h>
110 110
111#ifdef __XTENSA_EL__ 111#ifdef __XTENSA_EL__
112# define ext2_set_bit_atomic(lock,nr,addr) \ 112# define ext2_set_bit_atomic(lock,nr,addr) \
@@ -125,7 +125,6 @@ static inline unsigned long __fls(unsigned long word)
125#include <asm-generic/bitops/hweight.h> 125#include <asm-generic/bitops/hweight.h>
126#include <asm-generic/bitops/lock.h> 126#include <asm-generic/bitops/lock.h>
127#include <asm-generic/bitops/sched.h> 127#include <asm-generic/bitops/sched.h>
128#include <asm-generic/bitops/minix.h>
129 128
130#endif /* __KERNEL__ */ 129#endif /* __KERNEL__ */
131 130
diff --git a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c
index 87508886cbbd..d77089df412e 100644
--- a/arch/xtensa/kernel/irq.c
+++ b/arch/xtensa/kernel/irq.c
@@ -35,7 +35,6 @@ atomic_t irq_err_count;
35asmlinkage void do_IRQ(int irq, struct pt_regs *regs) 35asmlinkage void do_IRQ(int irq, struct pt_regs *regs)
36{ 36{
37 struct pt_regs *old_regs = set_irq_regs(regs); 37 struct pt_regs *old_regs = set_irq_regs(regs);
38 struct irq_desc *desc = irq_desc + irq;
39 38
40 if (irq >= NR_IRQS) { 39 if (irq >= NR_IRQS) {
41 printk(KERN_EMERG "%s: cannot handle IRQ %d\n", 40 printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
@@ -57,104 +56,69 @@ asmlinkage void do_IRQ(int irq, struct pt_regs *regs)
57 sp - sizeof(struct thread_info)); 56 sp - sizeof(struct thread_info));
58 } 57 }
59#endif 58#endif
60 desc->handle_irq(irq, desc); 59 generic_handle_irq(irq);
61 60
62 irq_exit(); 61 irq_exit();
63 set_irq_regs(old_regs); 62 set_irq_regs(old_regs);
64} 63}
65 64
66/* 65int arch_show_interrupts(struct seq_file *p, int prec)
67 * Generic, controller-independent functions:
68 */
69
70int show_interrupts(struct seq_file *p, void *v)
71{ 66{
72 int i = *(loff_t *) v, j; 67 int j;
73 struct irqaction * action; 68
74 unsigned long flags; 69 seq_printf(p, "%*s: ", prec, "NMI");
75 70 for_each_online_cpu(j)
76 if (i == 0) { 71 seq_printf(p, "%10u ", nmi_count(j));
77 seq_printf(p, " "); 72 seq_putc(p, '\n');
78 for_each_online_cpu(j) 73 seq_printf(p, "%*s: ", prec, "ERR");
79 seq_printf(p, "CPU%d ",j); 74 seq_printf(p, "%10u\n", atomic_read(&irq_err_count));
80 seq_putc(p, '\n');
81 }
82
83 if (i < NR_IRQS) {
84 raw_spin_lock_irqsave(&irq_desc[i].lock, flags);
85 action = irq_desc[i].action;
86 if (!action)
87 goto skip;
88 seq_printf(p, "%3d: ",i);
89#ifndef CONFIG_SMP
90 seq_printf(p, "%10u ", kstat_irqs(i));
91#else
92 for_each_online_cpu(j)
93 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
94#endif
95 seq_printf(p, " %14s", irq_desc[i].chip->name);
96 seq_printf(p, " %s", action->name);
97
98 for (action=action->next; action; action = action->next)
99 seq_printf(p, ", %s", action->name);
100
101 seq_putc(p, '\n');
102skip:
103 raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags);
104 } else if (i == NR_IRQS) {
105 seq_printf(p, "NMI: ");
106 for_each_online_cpu(j)
107 seq_printf(p, "%10u ", nmi_count(j));
108 seq_putc(p, '\n');
109 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
110 }
111 return 0; 75 return 0;
112} 76}
113 77
114static void xtensa_irq_mask(unsigned int irq) 78static void xtensa_irq_mask(struct irq_chip *d)
115{ 79{
116 cached_irq_mask &= ~(1 << irq); 80 cached_irq_mask &= ~(1 << d->irq);
117 set_sr (cached_irq_mask, INTENABLE); 81 set_sr (cached_irq_mask, INTENABLE);
118} 82}
119 83
120static void xtensa_irq_unmask(unsigned int irq) 84static void xtensa_irq_unmask(struct irq_chip *d)
121{ 85{
122 cached_irq_mask |= 1 << irq; 86 cached_irq_mask |= 1 << d->irq;
123 set_sr (cached_irq_mask, INTENABLE); 87 set_sr (cached_irq_mask, INTENABLE);
124} 88}
125 89
126static void xtensa_irq_enable(unsigned int irq) 90static void xtensa_irq_enable(struct irq_chip *d)
127{ 91{
128 variant_irq_enable(irq); 92 variant_irq_enable(d->irq);
129 xtensa_irq_unmask(irq); 93 xtensa_irq_unmask(d->irq);
130} 94}
131 95
132static void xtensa_irq_disable(unsigned int irq) 96static void xtensa_irq_disable(struct irq_chip *d)
133{ 97{
134 xtensa_irq_mask(irq); 98 xtensa_irq_mask(d->irq);
135 variant_irq_disable(irq); 99 variant_irq_disable(d->irq);
136} 100}
137 101
138static void xtensa_irq_ack(unsigned int irq) 102static void xtensa_irq_ack(struct irq_chip *d)
139{ 103{
140 set_sr(1 << irq, INTCLEAR); 104 set_sr(1 << d->irq, INTCLEAR);
141} 105}
142 106
143static int xtensa_irq_retrigger(unsigned int irq) 107static int xtensa_irq_retrigger(struct irq_chip *d)
144{ 108{
145 set_sr (1 << irq, INTSET); 109 set_sr (1 << d->irq, INTSET);
146 return 1; 110 return 1;
147} 111}
148 112
149 113
150static struct irq_chip xtensa_irq_chip = { 114static struct irq_chip xtensa_irq_chip = {
151 .name = "xtensa", 115 .name = "xtensa",
152 .enable = xtensa_irq_enable, 116 .irq_enable = xtensa_irq_enable,
153 .disable = xtensa_irq_disable, 117 .irq_disable = xtensa_irq_disable,
154 .mask = xtensa_irq_mask, 118 .irq_mask = xtensa_irq_mask,
155 .unmask = xtensa_irq_unmask, 119 .irq_unmask = xtensa_irq_unmask,
156 .ack = xtensa_irq_ack, 120 .irq_ack = xtensa_irq_ack,
157 .retrigger = xtensa_irq_retrigger, 121 .irq_retrigger = xtensa_irq_retrigger,
158}; 122};
159 123
160void __init init_IRQ(void) 124void __init init_IRQ(void)
@@ -165,25 +129,25 @@ void __init init_IRQ(void)
165 int mask = 1 << index; 129 int mask = 1 << index;
166 130
167 if (mask & XCHAL_INTTYPE_MASK_SOFTWARE) 131 if (mask & XCHAL_INTTYPE_MASK_SOFTWARE)
168 set_irq_chip_and_handler(index, &xtensa_irq_chip, 132 irq_set_chip_and_handler(index, &xtensa_irq_chip,
169 handle_simple_irq); 133 handle_simple_irq);
170 134
171 else if (mask & XCHAL_INTTYPE_MASK_EXTERN_EDGE) 135 else if (mask & XCHAL_INTTYPE_MASK_EXTERN_EDGE)
172 set_irq_chip_and_handler(index, &xtensa_irq_chip, 136 irq_set_chip_and_handler(index, &xtensa_irq_chip,
173 handle_edge_irq); 137 handle_edge_irq);
174 138
175 else if (mask & XCHAL_INTTYPE_MASK_EXTERN_LEVEL) 139 else if (mask & XCHAL_INTTYPE_MASK_EXTERN_LEVEL)
176 set_irq_chip_and_handler(index, &xtensa_irq_chip, 140 irq_set_chip_and_handler(index, &xtensa_irq_chip,
177 handle_level_irq); 141 handle_level_irq);
178 142
179 else if (mask & XCHAL_INTTYPE_MASK_TIMER) 143 else if (mask & XCHAL_INTTYPE_MASK_TIMER)
180 set_irq_chip_and_handler(index, &xtensa_irq_chip, 144 irq_set_chip_and_handler(index, &xtensa_irq_chip,
181 handle_edge_irq); 145 handle_edge_irq);
182 146
183 else /* XCHAL_INTTYPE_MASK_WRITE_ERROR */ 147 else /* XCHAL_INTTYPE_MASK_WRITE_ERROR */
184 /* XCHAL_INTTYPE_MASK_NMI */ 148 /* XCHAL_INTTYPE_MASK_NMI */
185 149
186 set_irq_chip_and_handler(index, &xtensa_irq_chip, 150 irq_set_chip_and_handler(index, &xtensa_irq_chip,
187 handle_level_irq); 151 handle_level_irq);
188 } 152 }
189 153
diff --git a/arch/xtensa/platforms/s6105/device.c b/arch/xtensa/platforms/s6105/device.c
index 65333ffefb07..4f4fc971042f 100644
--- a/arch/xtensa/platforms/s6105/device.c
+++ b/arch/xtensa/platforms/s6105/device.c
@@ -120,7 +120,7 @@ static int __init prepare_phy_irq(int pin)
120 irq = gpio_to_irq(pin); 120 irq = gpio_to_irq(pin);
121 if (irq < 0) 121 if (irq < 0)
122 goto free; 122 goto free;
123 if (set_irq_type(irq, IRQ_TYPE_LEVEL_LOW) < 0) 123 if (irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW) < 0)
124 goto free; 124 goto free;
125 return irq; 125 return irq;
126free: 126free:
diff --git a/arch/xtensa/variants/s6000/gpio.c b/arch/xtensa/variants/s6000/gpio.c
index 380a70fff756..7af0757e001b 100644
--- a/arch/xtensa/variants/s6000/gpio.c
+++ b/arch/xtensa/variants/s6000/gpio.c
@@ -85,30 +85,29 @@ int s6_gpio_init(u32 afsel)
85 return gpiochip_add(&gpiochip); 85 return gpiochip_add(&gpiochip);
86} 86}
87 87
88static void ack(unsigned int irq) 88static void ack(struct irq_data *d)
89{ 89{
90 writeb(1 << (irq - IRQ_BASE), S6_REG_GPIO + S6_GPIO_IC); 90 writeb(1 << (d->irq - IRQ_BASE), S6_REG_GPIO + S6_GPIO_IC);
91} 91}
92 92
93static void mask(unsigned int irq) 93static void mask(struct irq_data *d)
94{ 94{
95 u8 r = readb(S6_REG_GPIO + S6_GPIO_IE); 95 u8 r = readb(S6_REG_GPIO + S6_GPIO_IE);
96 r &= ~(1 << (irq - IRQ_BASE)); 96 r &= ~(1 << (d->irq - IRQ_BASE));
97 writeb(r, S6_REG_GPIO + S6_GPIO_IE); 97 writeb(r, S6_REG_GPIO + S6_GPIO_IE);
98} 98}
99 99
100static void unmask(unsigned int irq) 100static void unmask(struct irq_data *d)
101{ 101{
102 u8 m = readb(S6_REG_GPIO + S6_GPIO_IE); 102 u8 m = readb(S6_REG_GPIO + S6_GPIO_IE);
103 m |= 1 << (irq - IRQ_BASE); 103 m |= 1 << (d->irq - IRQ_BASE);
104 writeb(m, S6_REG_GPIO + S6_GPIO_IE); 104 writeb(m, S6_REG_GPIO + S6_GPIO_IE);
105} 105}
106 106
107static int set_type(unsigned int irq, unsigned int type) 107static int set_type(struct irq_data *d, unsigned int type)
108{ 108{
109 const u8 m = 1 << (irq - IRQ_BASE); 109 const u8 m = 1 << (d->irq - IRQ_BASE);
110 irq_flow_handler_t handler; 110 irq_flow_handler_t handler;
111 struct irq_desc *desc;
112 u8 reg; 111 u8 reg;
113 112
114 if (type == IRQ_TYPE_PROBE) { 113 if (type == IRQ_TYPE_PROBE) {
@@ -129,8 +128,7 @@ static int set_type(unsigned int irq, unsigned int type)
129 handler = handle_edge_irq; 128 handler = handle_edge_irq;
130 } 129 }
131 writeb(reg, S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IS); 130 writeb(reg, S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IS);
132 desc = irq_to_desc(irq); 131 __irq_set_handler_locked(irq, handler);
133 desc->handle_irq = handler;
134 132
135 reg = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IEV); 133 reg = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IEV);
136 if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING)) 134 if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING))
@@ -150,22 +148,23 @@ static int set_type(unsigned int irq, unsigned int type)
150 148
151static struct irq_chip gpioirqs = { 149static struct irq_chip gpioirqs = {
152 .name = "GPIO", 150 .name = "GPIO",
153 .ack = ack, 151 .irq_ack = ack,
154 .mask = mask, 152 .irq_mask = mask,
155 .unmask = unmask, 153 .irq_unmask = unmask,
156 .set_type = set_type, 154 .irq_set_type = set_type,
157}; 155};
158 156
159static u8 demux_masks[4]; 157static u8 demux_masks[4];
160 158
161static void demux_irqs(unsigned int irq, struct irq_desc *desc) 159static void demux_irqs(unsigned int irq, struct irq_desc *desc)
162{ 160{
163 u8 *mask = get_irq_desc_data(desc); 161 struct irq_chip *chip = irq_desc_get_chip(desc);
162 u8 *mask = irq_desc_get_handler_data(desc);
164 u8 pending; 163 u8 pending;
165 int cirq; 164 int cirq;
166 165
167 desc->chip->mask(irq); 166 chip->irq_mask(&desc->irq_data);
168 desc->chip->ack(irq); 167 chip->irq_ack(&desc->irq_data));
169 pending = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_MIS) & *mask; 168 pending = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_MIS) & *mask;
170 cirq = IRQ_BASE - 1; 169 cirq = IRQ_BASE - 1;
171 while (pending) { 170 while (pending) {
@@ -174,7 +173,7 @@ static void demux_irqs(unsigned int irq, struct irq_desc *desc)
174 pending >>= n; 173 pending >>= n;
175 generic_handle_irq(cirq); 174 generic_handle_irq(cirq);
176 } 175 }
177 desc->chip->unmask(irq); 176 chip->irq_unmask(&desc->irq_data));
178} 177}
179 178
180extern const signed char *platform_irq_mappings[XTENSA_NR_IRQS]; 179extern const signed char *platform_irq_mappings[XTENSA_NR_IRQS];
@@ -219,11 +218,11 @@ void __init variant_init_irq(void)
219 i = ffs(mask); 218 i = ffs(mask);
220 cirq += i; 219 cirq += i;
221 mask >>= i; 220 mask >>= i;
222 set_irq_chip(cirq, &gpioirqs); 221 irq_set_chip(cirq, &gpioirqs);
223 set_irq_type(irq, IRQ_TYPE_LEVEL_LOW); 222 irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
224 } while (mask); 223 } while (mask);
225 set_irq_data(irq, demux_masks + n); 224 irq_set_handler_data(irq, demux_masks + n);
226 set_irq_chained_handler(irq, demux_irqs); 225 irq_set_chained_handler(irq, demux_irqs);
227 if (++n == ARRAY_SIZE(demux_masks)) 226 if (++n == ARRAY_SIZE(demux_masks))
228 break; 227 break;
229 } 228 }