diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/ecx-2000.dts | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/highbank.dts | 20 | ||||
-rw-r--r-- | arch/arm/mach-highbank/highbank.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-highbank/hotplug.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-highbank/platsmp.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-highbank/pm.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-highbank/sysregs.h | 23 | ||||
-rw-r--r-- | arch/arm/mach-highbank/system.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-nomadik/board-nhk8815.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-nomadik/include/mach/irqs.h | 78 |
11 files changed, 97 insertions, 69 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f95ba14ae3d0..ab864d9545dd 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -371,7 +371,6 @@ config ARCH_CNS3XXX | |||
371 | config ARCH_CLPS711X | 371 | config ARCH_CLPS711X |
372 | bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" | 372 | bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" |
373 | select ARCH_REQUIRE_GPIOLIB | 373 | select ARCH_REQUIRE_GPIOLIB |
374 | select ARCH_USES_GETTIMEOFFSET | ||
375 | select AUTO_ZRELADDR | 374 | select AUTO_ZRELADDR |
376 | select CLKDEV_LOOKUP | 375 | select CLKDEV_LOOKUP |
377 | select COMMON_CLK | 376 | select COMMON_CLK |
diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts index 46477ac1de99..139b40cc3a23 100644 --- a/arch/arm/boot/dts/ecx-2000.dts +++ b/arch/arm/boot/dts/ecx-2000.dts | |||
@@ -32,6 +32,7 @@ | |||
32 | 32 | ||
33 | cpu@0 { | 33 | cpu@0 { |
34 | compatible = "arm,cortex-a15"; | 34 | compatible = "arm,cortex-a15"; |
35 | device_type = "cpu"; | ||
35 | reg = <0>; | 36 | reg = <0>; |
36 | clocks = <&a9pll>; | 37 | clocks = <&a9pll>; |
37 | clock-names = "cpu"; | 38 | clock-names = "cpu"; |
@@ -39,6 +40,7 @@ | |||
39 | 40 | ||
40 | cpu@1 { | 41 | cpu@1 { |
41 | compatible = "arm,cortex-a15"; | 42 | compatible = "arm,cortex-a15"; |
43 | device_type = "cpu"; | ||
42 | reg = <1>; | 44 | reg = <1>; |
43 | clocks = <&a9pll>; | 45 | clocks = <&a9pll>; |
44 | clock-names = "cpu"; | 46 | clock-names = "cpu"; |
@@ -46,6 +48,7 @@ | |||
46 | 48 | ||
47 | cpu@2 { | 49 | cpu@2 { |
48 | compatible = "arm,cortex-a15"; | 50 | compatible = "arm,cortex-a15"; |
51 | device_type = "cpu"; | ||
49 | reg = <2>; | 52 | reg = <2>; |
50 | clocks = <&a9pll>; | 53 | clocks = <&a9pll>; |
51 | clock-names = "cpu"; | 54 | clock-names = "cpu"; |
@@ -53,6 +56,7 @@ | |||
53 | 56 | ||
54 | cpu@3 { | 57 | cpu@3 { |
55 | compatible = "arm,cortex-a15"; | 58 | compatible = "arm,cortex-a15"; |
59 | device_type = "cpu"; | ||
56 | reg = <3>; | 60 | reg = <3>; |
57 | clocks = <&a9pll>; | 61 | clocks = <&a9pll>; |
58 | clock-names = "cpu"; | 62 | clock-names = "cpu"; |
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts index a9ae5d32e80d..5927a8df5625 100644 --- a/arch/arm/boot/dts/highbank.dts +++ b/arch/arm/boot/dts/highbank.dts | |||
@@ -30,33 +30,37 @@ | |||
30 | #address-cells = <1>; | 30 | #address-cells = <1>; |
31 | #size-cells = <0>; | 31 | #size-cells = <0>; |
32 | 32 | ||
33 | cpu@0 { | 33 | cpu@900 { |
34 | compatible = "arm,cortex-a9"; | 34 | compatible = "arm,cortex-a9"; |
35 | reg = <0>; | 35 | device_type = "cpu"; |
36 | reg = <0x900>; | ||
36 | next-level-cache = <&L2>; | 37 | next-level-cache = <&L2>; |
37 | clocks = <&a9pll>; | 38 | clocks = <&a9pll>; |
38 | clock-names = "cpu"; | 39 | clock-names = "cpu"; |
39 | }; | 40 | }; |
40 | 41 | ||
41 | cpu@1 { | 42 | cpu@901 { |
42 | compatible = "arm,cortex-a9"; | 43 | compatible = "arm,cortex-a9"; |
43 | reg = <1>; | 44 | device_type = "cpu"; |
45 | reg = <0x901>; | ||
44 | next-level-cache = <&L2>; | 46 | next-level-cache = <&L2>; |
45 | clocks = <&a9pll>; | 47 | clocks = <&a9pll>; |
46 | clock-names = "cpu"; | 48 | clock-names = "cpu"; |
47 | }; | 49 | }; |
48 | 50 | ||
49 | cpu@2 { | 51 | cpu@902 { |
50 | compatible = "arm,cortex-a9"; | 52 | compatible = "arm,cortex-a9"; |
51 | reg = <2>; | 53 | device_type = "cpu"; |
54 | reg = <0x902>; | ||
52 | next-level-cache = <&L2>; | 55 | next-level-cache = <&L2>; |
53 | clocks = <&a9pll>; | 56 | clocks = <&a9pll>; |
54 | clock-names = "cpu"; | 57 | clock-names = "cpu"; |
55 | }; | 58 | }; |
56 | 59 | ||
57 | cpu@3 { | 60 | cpu@903 { |
58 | compatible = "arm,cortex-a9"; | 61 | compatible = "arm,cortex-a9"; |
59 | reg = <3>; | 62 | device_type = "cpu"; |
63 | reg = <0x903>; | ||
60 | next-level-cache = <&L2>; | 64 | next-level-cache = <&L2>; |
61 | clocks = <&a9pll>; | 65 | clocks = <&a9pll>; |
62 | clock-names = "cpu"; | 66 | clock-names = "cpu"; |
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c index dc248167d206..981dc1e1da51 100644 --- a/arch/arm/mach-highbank/highbank.c +++ b/arch/arm/mach-highbank/highbank.c | |||
@@ -135,7 +135,7 @@ static struct sys_timer highbank_timer = { | |||
135 | 135 | ||
136 | static void highbank_power_off(void) | 136 | static void highbank_power_off(void) |
137 | { | 137 | { |
138 | hignbank_set_pwr_shutdown(); | 138 | highbank_set_pwr_shutdown(); |
139 | 139 | ||
140 | while (1) | 140 | while (1) |
141 | cpu_do_idle(); | 141 | cpu_do_idle(); |
diff --git a/arch/arm/mach-highbank/hotplug.c b/arch/arm/mach-highbank/hotplug.c index 7b60faccd551..f30c52843396 100644 --- a/arch/arm/mach-highbank/hotplug.c +++ b/arch/arm/mach-highbank/hotplug.c | |||
@@ -30,7 +30,7 @@ void __ref highbank_cpu_die(unsigned int cpu) | |||
30 | { | 30 | { |
31 | flush_cache_all(); | 31 | flush_cache_all(); |
32 | 32 | ||
33 | highbank_set_cpu_jump(cpu, secondary_startup); | 33 | highbank_set_cpu_jump(cpu, phys_to_virt(0)); |
34 | highbank_set_core_pwr(); | 34 | highbank_set_core_pwr(); |
35 | 35 | ||
36 | cpu_do_idle(); | 36 | cpu_do_idle(); |
diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c index 1129957f6c1d..4ecc864ac8b9 100644 --- a/arch/arm/mach-highbank/platsmp.c +++ b/arch/arm/mach-highbank/platsmp.c | |||
@@ -32,6 +32,7 @@ static void __cpuinit highbank_secondary_init(unsigned int cpu) | |||
32 | 32 | ||
33 | static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle) | 33 | static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle) |
34 | { | 34 | { |
35 | highbank_set_cpu_jump(cpu, secondary_startup); | ||
35 | gic_raise_softirq(cpumask_of(cpu), 0); | 36 | gic_raise_softirq(cpumask_of(cpu), 0); |
36 | return 0; | 37 | return 0; |
37 | } | 38 | } |
@@ -61,19 +62,8 @@ static void __init highbank_smp_init_cpus(void) | |||
61 | 62 | ||
62 | static void __init highbank_smp_prepare_cpus(unsigned int max_cpus) | 63 | static void __init highbank_smp_prepare_cpus(unsigned int max_cpus) |
63 | { | 64 | { |
64 | int i; | ||
65 | |||
66 | if (scu_base_addr) | 65 | if (scu_base_addr) |
67 | scu_enable(scu_base_addr); | 66 | scu_enable(scu_base_addr); |
68 | |||
69 | /* | ||
70 | * Write the address of secondary startup into the jump table | ||
71 | * The cores are in wfi and wait until they receive a soft interrupt | ||
72 | * and a non-zero value to jump to. Then the secondary CPU branches | ||
73 | * to this address. | ||
74 | */ | ||
75 | for (i = 1; i < max_cpus; i++) | ||
76 | highbank_set_cpu_jump(i, secondary_startup); | ||
77 | } | 67 | } |
78 | 68 | ||
79 | struct smp_operations highbank_smp_ops __initdata = { | 69 | struct smp_operations highbank_smp_ops __initdata = { |
diff --git a/arch/arm/mach-highbank/pm.c b/arch/arm/mach-highbank/pm.c index 74aa135966f0..04eddb4f4380 100644 --- a/arch/arm/mach-highbank/pm.c +++ b/arch/arm/mach-highbank/pm.c | |||
@@ -14,10 +14,12 @@ | |||
14 | * this program. If not, see <http://www.gnu.org/licenses/>. | 14 | * this program. If not, see <http://www.gnu.org/licenses/>. |
15 | */ | 15 | */ |
16 | 16 | ||
17 | #include <linux/cpu_pm.h> | ||
17 | #include <linux/init.h> | 18 | #include <linux/init.h> |
18 | #include <linux/io.h> | 19 | #include <linux/io.h> |
19 | #include <linux/suspend.h> | 20 | #include <linux/suspend.h> |
20 | 21 | ||
22 | #include <asm/cacheflush.h> | ||
21 | #include <asm/proc-fns.h> | 23 | #include <asm/proc-fns.h> |
22 | #include <asm/suspend.h> | 24 | #include <asm/suspend.h> |
23 | 25 | ||
@@ -26,16 +28,31 @@ | |||
26 | 28 | ||
27 | static int highbank_suspend_finish(unsigned long val) | 29 | static int highbank_suspend_finish(unsigned long val) |
28 | { | 30 | { |
31 | outer_flush_all(); | ||
32 | outer_disable(); | ||
33 | |||
34 | highbank_set_pwr_suspend(); | ||
35 | |||
29 | cpu_do_idle(); | 36 | cpu_do_idle(); |
37 | |||
38 | highbank_clear_pwr_request(); | ||
30 | return 0; | 39 | return 0; |
31 | } | 40 | } |
32 | 41 | ||
33 | static int highbank_pm_enter(suspend_state_t state) | 42 | static int highbank_pm_enter(suspend_state_t state) |
34 | { | 43 | { |
35 | hignbank_set_pwr_suspend(); | 44 | cpu_pm_enter(); |
45 | cpu_cluster_pm_enter(); | ||
46 | |||
36 | highbank_set_cpu_jump(0, cpu_resume); | 47 | highbank_set_cpu_jump(0, cpu_resume); |
37 | cpu_suspend(0, highbank_suspend_finish); | 48 | cpu_suspend(0, highbank_suspend_finish); |
38 | 49 | ||
50 | cpu_cluster_pm_exit(); | ||
51 | cpu_pm_exit(); | ||
52 | |||
53 | highbank_smc1(0x102, 0x1); | ||
54 | if (scu_base_addr) | ||
55 | scu_enable(scu_base_addr); | ||
39 | return 0; | 56 | return 0; |
40 | } | 57 | } |
41 | 58 | ||
diff --git a/arch/arm/mach-highbank/sysregs.h b/arch/arm/mach-highbank/sysregs.h index e13e8ea7c6cb..70af9d13fcef 100644 --- a/arch/arm/mach-highbank/sysregs.h +++ b/arch/arm/mach-highbank/sysregs.h | |||
@@ -44,28 +44,43 @@ static inline void highbank_set_core_pwr(void) | |||
44 | writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu)); | 44 | writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu)); |
45 | } | 45 | } |
46 | 46 | ||
47 | static inline void hignbank_set_pwr_suspend(void) | 47 | static inline void highbank_clear_core_pwr(void) |
48 | { | ||
49 | int cpu = cpu_logical_map(smp_processor_id()); | ||
50 | if (scu_base_addr) | ||
51 | scu_power_mode(scu_base_addr, SCU_PM_NORMAL); | ||
52 | else | ||
53 | writel_relaxed(0, sregs_base + SREG_CPU_PWR_CTRL(cpu)); | ||
54 | } | ||
55 | |||
56 | static inline void highbank_set_pwr_suspend(void) | ||
48 | { | 57 | { |
49 | writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ); | 58 | writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ); |
50 | highbank_set_core_pwr(); | 59 | highbank_set_core_pwr(); |
51 | } | 60 | } |
52 | 61 | ||
53 | static inline void hignbank_set_pwr_shutdown(void) | 62 | static inline void highbank_set_pwr_shutdown(void) |
54 | { | 63 | { |
55 | writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ); | 64 | writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ); |
56 | highbank_set_core_pwr(); | 65 | highbank_set_core_pwr(); |
57 | } | 66 | } |
58 | 67 | ||
59 | static inline void hignbank_set_pwr_soft_reset(void) | 68 | static inline void highbank_set_pwr_soft_reset(void) |
60 | { | 69 | { |
61 | writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ); | 70 | writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ); |
62 | highbank_set_core_pwr(); | 71 | highbank_set_core_pwr(); |
63 | } | 72 | } |
64 | 73 | ||
65 | static inline void hignbank_set_pwr_hard_reset(void) | 74 | static inline void highbank_set_pwr_hard_reset(void) |
66 | { | 75 | { |
67 | writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ); | 76 | writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ); |
68 | highbank_set_core_pwr(); | 77 | highbank_set_core_pwr(); |
69 | } | 78 | } |
70 | 79 | ||
80 | static inline void highbank_clear_pwr_request(void) | ||
81 | { | ||
82 | writel(~0UL, sregs_base + HB_SREG_A9_PWR_REQ); | ||
83 | highbank_clear_core_pwr(); | ||
84 | } | ||
85 | |||
71 | #endif | 86 | #endif |
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c index aed96ad9bd4a..37d8384dcf19 100644 --- a/arch/arm/mach-highbank/system.c +++ b/arch/arm/mach-highbank/system.c | |||
@@ -22,9 +22,9 @@ | |||
22 | void highbank_restart(char mode, const char *cmd) | 22 | void highbank_restart(char mode, const char *cmd) |
23 | { | 23 | { |
24 | if (mode == 'h') | 24 | if (mode == 'h') |
25 | hignbank_set_pwr_hard_reset(); | 25 | highbank_set_pwr_hard_reset(); |
26 | else | 26 | else |
27 | hignbank_set_pwr_soft_reset(); | 27 | highbank_set_pwr_soft_reset(); |
28 | 28 | ||
29 | while (1) | 29 | while (1) |
30 | cpu_do_idle(); | 30 | cpu_do_idle(); |
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c index 98167a4319f7..9f19069248da 100644 --- a/arch/arm/mach-nomadik/board-nhk8815.c +++ b/arch/arm/mach-nomadik/board-nhk8815.c | |||
@@ -27,7 +27,6 @@ | |||
27 | #include <linux/pinctrl/machine.h> | 27 | #include <linux/pinctrl/machine.h> |
28 | #include <linux/platform_data/pinctrl-nomadik.h> | 28 | #include <linux/platform_data/pinctrl-nomadik.h> |
29 | #include <linux/platform_data/clocksource-nomadik-mtu.h> | 29 | #include <linux/platform_data/clocksource-nomadik-mtu.h> |
30 | #include <linux/platform_data/mtd-nomadik-nand.h> | ||
31 | #include <asm/hardware/vic.h> | 30 | #include <asm/hardware/vic.h> |
32 | #include <asm/sizes.h> | 31 | #include <asm/sizes.h> |
33 | #include <asm/mach-types.h> | 32 | #include <asm/mach-types.h> |
diff --git a/arch/arm/mach-nomadik/include/mach/irqs.h b/arch/arm/mach-nomadik/include/mach/irqs.h index b549d0571548..215f8cdb4004 100644 --- a/arch/arm/mach-nomadik/include/mach/irqs.h +++ b/arch/arm/mach-nomadik/include/mach/irqs.h | |||
@@ -22,49 +22,49 @@ | |||
22 | 22 | ||
23 | #include <mach/hardware.h> | 23 | #include <mach/hardware.h> |
24 | 24 | ||
25 | #define IRQ_VIC_START 1 /* first VIC interrupt is 1 */ | 25 | #define IRQ_VIC_START 32 /* first VIC interrupt is 1 */ |
26 | 26 | ||
27 | /* | 27 | /* |
28 | * Interrupt numbers generic for all Nomadik Chip cuts | 28 | * Interrupt numbers generic for all Nomadik Chip cuts |
29 | */ | 29 | */ |
30 | #define IRQ_WATCHDOG 1 | 30 | #define IRQ_WATCHDOG (IRQ_VIC_START+0) |
31 | #define IRQ_SOFTINT 2 | 31 | #define IRQ_SOFTINT (IRQ_VIC_START+1) |
32 | #define IRQ_CRYPTO 3 | 32 | #define IRQ_CRYPTO (IRQ_VIC_START+2) |
33 | #define IRQ_OWM 4 | 33 | #define IRQ_OWM (IRQ_VIC_START+3) |
34 | #define IRQ_MTU0 5 | 34 | #define IRQ_MTU0 (IRQ_VIC_START+4) |
35 | #define IRQ_MTU1 6 | 35 | #define IRQ_MTU1 (IRQ_VIC_START+5) |
36 | #define IRQ_GPIO0 7 | 36 | #define IRQ_GPIO0 (IRQ_VIC_START+6) |
37 | #define IRQ_GPIO1 8 | 37 | #define IRQ_GPIO1 (IRQ_VIC_START+7) |
38 | #define IRQ_GPIO2 9 | 38 | #define IRQ_GPIO2 (IRQ_VIC_START+8) |
39 | #define IRQ_GPIO3 10 | 39 | #define IRQ_GPIO3 (IRQ_VIC_START+9) |
40 | #define IRQ_RTC_RTT 11 | 40 | #define IRQ_RTC_RTT (IRQ_VIC_START+10) |
41 | #define IRQ_SSP 12 | 41 | #define IRQ_SSP (IRQ_VIC_START+11) |
42 | #define IRQ_UART0 13 | 42 | #define IRQ_UART0 (IRQ_VIC_START+12) |
43 | #define IRQ_DMA1 14 | 43 | #define IRQ_DMA1 (IRQ_VIC_START+13) |
44 | #define IRQ_CLCD_MDIF 15 | 44 | #define IRQ_CLCD_MDIF (IRQ_VIC_START+14) |
45 | #define IRQ_DMA0 16 | 45 | #define IRQ_DMA0 (IRQ_VIC_START+15) |
46 | #define IRQ_PWRFAIL 17 | 46 | #define IRQ_PWRFAIL (IRQ_VIC_START+16) |
47 | #define IRQ_UART1 18 | 47 | #define IRQ_UART1 (IRQ_VIC_START+17) |
48 | #define IRQ_FIRDA 19 | 48 | #define IRQ_FIRDA (IRQ_VIC_START+18) |
49 | #define IRQ_MSP0 20 | 49 | #define IRQ_MSP0 (IRQ_VIC_START+19) |
50 | #define IRQ_I2C0 21 | 50 | #define IRQ_I2C0 (IRQ_VIC_START+20) |
51 | #define IRQ_I2C1 22 | 51 | #define IRQ_I2C1 (IRQ_VIC_START+21) |
52 | #define IRQ_SDMMC 23 | 52 | #define IRQ_SDMMC (IRQ_VIC_START+22) |
53 | #define IRQ_USBOTG 24 | 53 | #define IRQ_USBOTG (IRQ_VIC_START+23) |
54 | #define IRQ_SVA_IT0 25 | 54 | #define IRQ_SVA_IT0 (IRQ_VIC_START+24) |
55 | #define IRQ_SVA_IT1 26 | 55 | #define IRQ_SVA_IT1 (IRQ_VIC_START+25) |
56 | #define IRQ_SAA_IT0 27 | 56 | #define IRQ_SAA_IT0 (IRQ_VIC_START+26) |
57 | #define IRQ_SAA_IT1 28 | 57 | #define IRQ_SAA_IT1 (IRQ_VIC_START+27) |
58 | #define IRQ_UART2 29 | 58 | #define IRQ_UART2 (IRQ_VIC_START+28) |
59 | #define IRQ_MSP2 30 | 59 | #define IRQ_MSP2 (IRQ_VIC_START+29) |
60 | #define IRQ_L2CC 49 | 60 | #define IRQ_L2CC (IRQ_VIC_START+30) |
61 | #define IRQ_HPI 50 | 61 | #define IRQ_HPI (IRQ_VIC_START+31) |
62 | #define IRQ_SKE 51 | 62 | #define IRQ_SKE (IRQ_VIC_START+32) |
63 | #define IRQ_KP 52 | 63 | #define IRQ_KP (IRQ_VIC_START+33) |
64 | #define IRQ_MEMST 55 | 64 | #define IRQ_MEMST (IRQ_VIC_START+34) |
65 | #define IRQ_SGA_IT 59 | 65 | #define IRQ_SGA_IT (IRQ_VIC_START+35) |
66 | #define IRQ_USBM 61 | 66 | #define IRQ_USBM (IRQ_VIC_START+36) |
67 | #define IRQ_MSP1 63 | 67 | #define IRQ_MSP1 (IRQ_VIC_START+37) |
68 | 68 | ||
69 | #define NOMADIK_GPIO_OFFSET (IRQ_VIC_START+64) | 69 | #define NOMADIK_GPIO_OFFSET (IRQ_VIC_START+64) |
70 | 70 | ||