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-rw-r--r--arch/blackfin/Kconfig18
-rw-r--r--arch/blackfin/kernel/asm-offsets.c3
-rw-r--r--arch/blackfin/kernel/fixed_code.S2
-rw-r--r--arch/blackfin/kernel/module.c37
-rw-r--r--arch/blackfin/kernel/process.c2
-rw-r--r--arch/blackfin/kernel/ptrace.c4
-rw-r--r--arch/blackfin/kernel/signal.c13
-rw-r--r--arch/blackfin/kernel/time-ts.c10
-rw-r--r--arch/blackfin/mach-bf527/boards/ezkit.c104
-rw-r--r--arch/blackfin/mach-bf533/boards/cm_bf533.c33
-rw-r--r--arch/blackfin/mach-bf533/boards/ezkit.c31
-rw-r--r--arch/blackfin/mach-bf533/boards/stamp.c31
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537.c33
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c31
-rw-r--r--arch/blackfin/mach-bf548/boards/cm_bf548.c34
-rw-r--r--arch/blackfin/mach-bf548/boards/ezkit.c32
-rw-r--r--arch/blackfin/mach-bf561/boards/cm_bf561.c32
-rw-r--r--arch/blackfin/mach-bf561/boards/ezkit.c31
-rw-r--r--arch/blackfin/mach-common/Makefile5
-rw-r--r--arch/blackfin/mach-common/cpufreq.c26
-rw-r--r--arch/blackfin/mach-common/dpmc.c137
-rw-r--r--arch/blackfin/mach-common/dpmc_modes.S (renamed from arch/blackfin/mach-common/dpmc.S)27
-rw-r--r--arch/blackfin/mach-common/entry.S113
-rw-r--r--arch/cris/kernel/sys_cris.c22
-rw-r--r--arch/m32r/kernel/sys_m32r.c23
-rw-r--r--arch/mn10300/Kconfig11
-rw-r--r--arch/powerpc/boot/dts/sequoia.dts9
-rw-r--r--arch/powerpc/kernel/btext.c1
-rw-r--r--arch/powerpc/kernel/cputable.c53
-rw-r--r--arch/powerpc/kernel/head_44x.S9
-rw-r--r--arch/powerpc/kernel/head_64.S4
-rw-r--r--arch/powerpc/kernel/isa-bridge.c3
-rw-r--r--arch/powerpc/kernel/setup_64.c10
-rw-r--r--arch/powerpc/platforms/cell/interrupt.c53
-rw-r--r--arch/powerpc/platforms/cell/spu_base.c31
-rw-r--r--arch/powerpc/platforms/cell/spu_priv1_mmio.c16
-rw-r--r--arch/powerpc/platforms/cell/spufs/fault.c17
-rw-r--r--arch/powerpc/platforms/cell/spufs/inode.c10
-rw-r--r--arch/powerpc/platforms/cell/spufs/run.c38
-rw-r--r--arch/powerpc/platforms/cell/spufs/sched.c7
-rw-r--r--arch/powerpc/platforms/cell/spufs/spufs.h3
-rw-r--r--arch/powerpc/platforms/cell/spufs/switch.c71
-rw-r--r--arch/powerpc/sysdev/ppc4xx_pci.c180
-rw-r--r--arch/powerpc/xmon/xmon.c6
-rw-r--r--arch/sh/Kconfig17
-rw-r--r--arch/sh/Kconfig.debug1
-rw-r--r--arch/sh/Makefile1
-rw-r--r--arch/sh/boards/mpc1211/Makefile8
-rw-r--r--arch/sh/boards/mpc1211/pci.c295
-rw-r--r--arch/sh/boards/mpc1211/rtc.c136
-rw-r--r--arch/sh/boards/mpc1211/setup.c347
-rw-r--r--arch/sh/boards/renesas/migor/setup.c11
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq-r7780mp.c2
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq-r7780rp.c2
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq-r7785rp.c2
-rw-r--r--arch/sh/boards/renesas/r7780rp/setup.c24
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/setup.c7
-rw-r--r--arch/sh/boards/se/7206/setup.c17
-rw-r--r--arch/sh/boards/se/7722/setup.c6
-rw-r--r--arch/sh/boot/compressed/Makefile_321
-rw-r--r--arch/sh/boot/compressed/Makefile_641
-rw-r--r--arch/sh/kernel/cpu/irq/intc-sh5.c73
-rw-r--r--arch/sh/kernel/cpu/irq/intc.c93
-rw-r--r--arch/sh/kernel/cpu/sh2a/fpu.c4
-rw-r--r--arch/sh/kernel/cpu/sh3/Makefile2
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh3.c71
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7705.c22
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh770x.c32
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7710.c25
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7720.c35
-rw-r--r--arch/sh/kernel/cpu/sh5/entry.S28
-rw-r--r--arch/sh/kernel/cpu/sh5/probe.c4
-rw-r--r--arch/sh/kernel/early_printk.c30
-rw-r--r--arch/sh/kernel/setup.c46
-rw-r--r--arch/sh/kernel/sh_ksyms_32.c2
-rw-r--r--arch/sh/kernel/sh_ksyms_64.c26
-rw-r--r--arch/sh/kernel/time_64.c5
-rw-r--r--arch/sh/lib64/dbg.c2
-rw-r--r--arch/sh/mm/Makefile_647
-rw-r--r--arch/sh/mm/cache-sh5.c2
-rw-r--r--arch/sh/mm/ioremap_64.c2
-rw-r--r--arch/sh/mm/numa.c2
-rw-r--r--arch/sh/tools/mach-types1
-rw-r--r--arch/x86/Kconfig2
-rw-r--r--arch/x86/kernel/cpu/addon_cpuid_features.c21
-rw-r--r--arch/x86/kernel/cpu/common.c27
-rw-r--r--arch/x86/kernel/geode_32.c19
-rw-r--r--arch/x86/kernel/i387.c12
-rw-r--r--arch/x86/kernel/setup.c2
-rw-r--r--arch/x86/kernel/setup_32.c7
-rw-r--r--arch/x86/kernel/setup_64.c13
-rw-r--r--arch/x86/mm/pat.c50
-rw-r--r--arch/x86/pci/k8-bus_64.c8
93 files changed, 1545 insertions, 1374 deletions
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 795d0ac67c21..fd5708523f2e 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -832,6 +832,7 @@ config BANK_0
832config BANK_1 832config BANK_1
833 hex "Bank 1" 833 hex "Bank 1"
834 default 0x7BB0 834 default 0x7BB0
835 default 0x5558 if BF54x
835 836
836config BANK_2 837config BANK_2
837 hex "Bank 2" 838 hex "Bank 2"
@@ -963,21 +964,22 @@ endchoice
963 964
964endmenu 965endmenu
965 966
966if (BF537 || BF533 || BF54x)
967
968menu "CPU Frequency scaling" 967menu "CPU Frequency scaling"
969 968
970source "drivers/cpufreq/Kconfig" 969source "drivers/cpufreq/Kconfig"
971 970
972config CPU_FREQ 971config CPU_VOLTAGE
973 bool 972 bool "CPU Voltage scaling"
973 depends on EXPERIMENTAL
974 depends on CPU_FREQ
974 default n 975 default n
975 help 976 help
976 If you want to enable this option, you should select the 977 Say Y here if you want CPU voltage scaling according to the CPU frequency.
977 DPMC driver from Character Devices. 978 This option violates the PLL BYPASS recommendation in the Blackfin Processor
978endmenu 979 manuals. There is a theoretical risk that during VDDINT transitions
980 the PLL may unlock.
979 981
980endif 982endmenu
981 983
982source "net/Kconfig" 984source "net/Kconfig"
983 985
diff --git a/arch/blackfin/kernel/asm-offsets.c b/arch/blackfin/kernel/asm-offsets.c
index 721f15f3cebf..881afe9082c7 100644
--- a/arch/blackfin/kernel/asm-offsets.c
+++ b/arch/blackfin/kernel/asm-offsets.c
@@ -56,9 +56,6 @@ int main(void)
56 /* offsets into the thread struct */ 56 /* offsets into the thread struct */
57 DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp)); 57 DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
58 DEFINE(THREAD_USP, offsetof(struct thread_struct, usp)); 58 DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
59 DEFINE(THREAD_SR, offsetof(struct thread_struct, seqstat));
60 DEFINE(PT_SR, offsetof(struct thread_struct, seqstat));
61 DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
62 DEFINE(THREAD_PC, offsetof(struct thread_struct, pc)); 59 DEFINE(THREAD_PC, offsetof(struct thread_struct, pc));
63 DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE); 60 DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE);
64 61
diff --git a/arch/blackfin/kernel/fixed_code.S b/arch/blackfin/kernel/fixed_code.S
index 5ed47228a390..4b03ba025488 100644
--- a/arch/blackfin/kernel/fixed_code.S
+++ b/arch/blackfin/kernel/fixed_code.S
@@ -1,6 +1,6 @@
1/* 1/*
2 * This file contains sequences of code that will be copied to a 2 * This file contains sequences of code that will be copied to a
3 * fixed location, defined in <asm/atomic_seq.h>. The interrupt 3 * fixed location, defined in <asm/fixed_code.h>. The interrupt
4 * handlers ensure that these sequences appear to be atomic when 4 * handlers ensure that these sequences appear to be atomic when
5 * executed from userspace. 5 * executed from userspace.
6 * These are aligned to 16 bytes, so that we have some space to replace 6 * These are aligned to 16 bytes, so that we have some space to replace
diff --git a/arch/blackfin/kernel/module.c b/arch/blackfin/kernel/module.c
index 8b9fe29d03f4..14a42848f37f 100644
--- a/arch/blackfin/kernel/module.c
+++ b/arch/blackfin/kernel/module.c
@@ -160,6 +160,13 @@ int
160module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs, 160module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
161 char *secstrings, struct module *mod) 161 char *secstrings, struct module *mod)
162{ 162{
163 /*
164 * XXX: sechdrs are vmalloced in kernel/module.c
165 * and would be vfreed just after module is loaded,
166 * so we hack to keep the only information we needed
167 * in mod->arch to correctly free L1 I/D sram later.
168 * NOTE: this breaks the semantic of mod->arch structure.
169 */
163 Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum; 170 Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum;
164 void *dest = NULL; 171 void *dest = NULL;
165 172
@@ -167,8 +174,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
167 if ((strcmp(".l1.text", secstrings + s->sh_name) == 0) || 174 if ((strcmp(".l1.text", secstrings + s->sh_name) == 0) ||
168 ((strcmp(".text", secstrings + s->sh_name) == 0) && 175 ((strcmp(".text", secstrings + s->sh_name) == 0) &&
169 (hdr->e_flags & FLG_CODE_IN_L1) && (s->sh_size > 0))) { 176 (hdr->e_flags & FLG_CODE_IN_L1) && (s->sh_size > 0))) {
170 mod->arch.text_l1 = s;
171 dest = l1_inst_sram_alloc(s->sh_size); 177 dest = l1_inst_sram_alloc(s->sh_size);
178 mod->arch.text_l1 = dest;
172 if (dest == NULL) { 179 if (dest == NULL) {
173 printk(KERN_ERR 180 printk(KERN_ERR
174 "module %s: L1 instruction memory allocation failed\n", 181 "module %s: L1 instruction memory allocation failed\n",
@@ -182,8 +189,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
182 if ((strcmp(".l1.data", secstrings + s->sh_name) == 0) || 189 if ((strcmp(".l1.data", secstrings + s->sh_name) == 0) ||
183 ((strcmp(".data", secstrings + s->sh_name) == 0) && 190 ((strcmp(".data", secstrings + s->sh_name) == 0) &&
184 (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) { 191 (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
185 mod->arch.data_a_l1 = s;
186 dest = l1_data_sram_alloc(s->sh_size); 192 dest = l1_data_sram_alloc(s->sh_size);
193 mod->arch.data_a_l1 = dest;
187 if (dest == NULL) { 194 if (dest == NULL) {
188 printk(KERN_ERR 195 printk(KERN_ERR
189 "module %s: L1 data memory allocation failed\n", 196 "module %s: L1 data memory allocation failed\n",
@@ -197,8 +204,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
197 if (strcmp(".l1.bss", secstrings + s->sh_name) == 0 || 204 if (strcmp(".l1.bss", secstrings + s->sh_name) == 0 ||
198 ((strcmp(".bss", secstrings + s->sh_name) == 0) && 205 ((strcmp(".bss", secstrings + s->sh_name) == 0) &&
199 (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) { 206 (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
200 mod->arch.bss_a_l1 = s;
201 dest = l1_data_sram_alloc(s->sh_size); 207 dest = l1_data_sram_alloc(s->sh_size);
208 mod->arch.bss_a_l1 = dest;
202 if (dest == NULL) { 209 if (dest == NULL) {
203 printk(KERN_ERR 210 printk(KERN_ERR
204 "module %s: L1 data memory allocation failed\n", 211 "module %s: L1 data memory allocation failed\n",
@@ -210,8 +217,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
210 s->sh_addr = (unsigned long)dest; 217 s->sh_addr = (unsigned long)dest;
211 } 218 }
212 if (strcmp(".l1.data.B", secstrings + s->sh_name) == 0) { 219 if (strcmp(".l1.data.B", secstrings + s->sh_name) == 0) {
213 mod->arch.data_b_l1 = s;
214 dest = l1_data_B_sram_alloc(s->sh_size); 220 dest = l1_data_B_sram_alloc(s->sh_size);
221 mod->arch.data_b_l1 = dest;
215 if (dest == NULL) { 222 if (dest == NULL) {
216 printk(KERN_ERR 223 printk(KERN_ERR
217 "module %s: L1 data memory allocation failed\n", 224 "module %s: L1 data memory allocation failed\n",
@@ -223,8 +230,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
223 s->sh_addr = (unsigned long)dest; 230 s->sh_addr = (unsigned long)dest;
224 } 231 }
225 if (strcmp(".l1.bss.B", secstrings + s->sh_name) == 0) { 232 if (strcmp(".l1.bss.B", secstrings + s->sh_name) == 0) {
226 mod->arch.bss_b_l1 = s;
227 dest = l1_data_B_sram_alloc(s->sh_size); 233 dest = l1_data_B_sram_alloc(s->sh_size);
234 mod->arch.bss_b_l1 = dest;
228 if (dest == NULL) { 235 if (dest == NULL) {
229 printk(KERN_ERR 236 printk(KERN_ERR
230 "module %s: L1 data memory allocation failed\n", 237 "module %s: L1 data memory allocation failed\n",
@@ -416,14 +423,14 @@ module_finalize(const Elf_Ehdr * hdr,
416 423
417void module_arch_cleanup(struct module *mod) 424void module_arch_cleanup(struct module *mod)
418{ 425{
419 if ((mod->arch.text_l1) && (mod->arch.text_l1->sh_addr)) 426 if (mod->arch.text_l1)
420 l1_inst_sram_free((void *)mod->arch.text_l1->sh_addr); 427 l1_inst_sram_free((void *)mod->arch.text_l1);
421 if ((mod->arch.data_a_l1) && (mod->arch.data_a_l1->sh_addr)) 428 if (mod->arch.data_a_l1)
422 l1_data_sram_free((void *)mod->arch.data_a_l1->sh_addr); 429 l1_data_sram_free((void *)mod->arch.data_a_l1);
423 if ((mod->arch.bss_a_l1) && (mod->arch.bss_a_l1->sh_addr)) 430 if (mod->arch.bss_a_l1)
424 l1_data_sram_free((void *)mod->arch.bss_a_l1->sh_addr); 431 l1_data_sram_free((void *)mod->arch.bss_a_l1);
425 if ((mod->arch.data_b_l1) && (mod->arch.data_b_l1->sh_addr)) 432 if (mod->arch.data_b_l1)
426 l1_data_B_sram_free((void *)mod->arch.data_b_l1->sh_addr); 433 l1_data_B_sram_free((void *)mod->arch.data_b_l1);
427 if ((mod->arch.bss_b_l1) && (mod->arch.bss_b_l1->sh_addr)) 434 if (mod->arch.bss_b_l1)
428 l1_data_B_sram_free((void *)mod->arch.bss_b_l1->sh_addr); 435 l1_data_B_sram_free((void *)mod->arch.bss_b_l1);
429} 436}
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index be9fdd00d7cb..53c2cd255441 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -245,7 +245,7 @@ unsigned long get_wchan(struct task_struct *p)
245 245
246void finish_atomic_sections (struct pt_regs *regs) 246void finish_atomic_sections (struct pt_regs *regs)
247{ 247{
248 int __user *up0 = (int __user *)&regs->p0; 248 int __user *up0 = (int __user *)regs->p0;
249 249
250 if (regs->pc < ATOMIC_SEQS_START || regs->pc >= ATOMIC_SEQS_END) 250 if (regs->pc < ATOMIC_SEQS_START || regs->pc >= ATOMIC_SEQS_END)
251 return; 251 return;
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c
index b4f062c172c6..f51ab088098e 100644
--- a/arch/blackfin/kernel/ptrace.c
+++ b/arch/blackfin/kernel/ptrace.c
@@ -185,8 +185,8 @@ void ptrace_disable(struct task_struct *child)
185{ 185{
186 unsigned long tmp; 186 unsigned long tmp;
187 /* make sure the single step bit is not set. */ 187 /* make sure the single step bit is not set. */
188 tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16); 188 tmp = get_reg(child, PT_SYSCFG) & ~TRACE_BITS;
189 put_reg(child, PT_SR, tmp); 189 put_reg(child, PT_SYSCFG, tmp);
190} 190}
191 191
192long arch_ptrace(struct task_struct *child, long request, long addr, long data) 192long arch_ptrace(struct task_struct *child, long request, long addr, long data)
diff --git a/arch/blackfin/kernel/signal.c b/arch/blackfin/kernel/signal.c
index cb9d883d493c..dbc3bbf846be 100644
--- a/arch/blackfin/kernel/signal.c
+++ b/arch/blackfin/kernel/signal.c
@@ -42,6 +42,9 @@
42 42
43#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) 43#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
44 44
45/* Location of the trace bit in SYSCFG. */
46#define TRACE_BITS 0x0001
47
45struct fdpic_func_descriptor { 48struct fdpic_func_descriptor {
46 unsigned long text; 49 unsigned long text;
47 unsigned long GOT; 50 unsigned long GOT;
@@ -225,6 +228,16 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t * info,
225 regs->r1 = (unsigned long)(&frame->info); 228 regs->r1 = (unsigned long)(&frame->info);
226 regs->r2 = (unsigned long)(&frame->uc); 229 regs->r2 = (unsigned long)(&frame->uc);
227 230
231 /*
232 * Clear the trace flag when entering the signal handler, but
233 * notify any tracer that was single-stepping it. The tracer
234 * may want to single-step inside the handler too.
235 */
236 if (regs->syscfg & TRACE_BITS) {
237 regs->syscfg &= ~TRACE_BITS;
238 ptrace_notify(SIGTRAP);
239 }
240
228 return 0; 241 return 0;
229 242
230 give_sigsegv: 243 give_sigsegv:
diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c
index 4482c47c09e5..e887efc86c29 100644
--- a/arch/blackfin/kernel/time-ts.c
+++ b/arch/blackfin/kernel/time-ts.c
@@ -60,7 +60,7 @@ static inline unsigned long long cycles_2_ns(cycle_t cyc)
60 60
61static cycle_t read_cycles(void) 61static cycle_t read_cycles(void)
62{ 62{
63 return get_cycles(); 63 return __bfin_cycles_off + (get_cycles() << __bfin_cycles_mod);
64} 64}
65 65
66unsigned long long sched_clock(void) 66unsigned long long sched_clock(void)
@@ -117,7 +117,7 @@ static void bfin_timer_set_mode(enum clock_event_mode mode,
117 break; 117 break;
118 } 118 }
119 case CLOCK_EVT_MODE_ONESHOT: 119 case CLOCK_EVT_MODE_ONESHOT:
120 bfin_write_TSCALE(0); 120 bfin_write_TSCALE(TIME_SCALE - 1);
121 bfin_write_TCOUNT(0); 121 bfin_write_TCOUNT(0);
122 bfin_write_TCNTL(TMPWR | TMREN); 122 bfin_write_TCNTL(TMPWR | TMREN);
123 CSYNC(); 123 CSYNC();
@@ -183,10 +183,14 @@ irqreturn_t timer_interrupt(int irq, void *dev_id)
183 183
184static int __init bfin_clockevent_init(void) 184static int __init bfin_clockevent_init(void)
185{ 185{
186 unsigned long timer_clk;
187
188 timer_clk = get_cclk() / TIME_SCALE;
189
186 setup_irq(IRQ_CORETMR, &bfin_timer_irq); 190 setup_irq(IRQ_CORETMR, &bfin_timer_irq);
187 bfin_timer_init(); 191 bfin_timer_init();
188 192
189 clockevent_bfin.mult = div_sc(get_cclk(), NSEC_PER_SEC, clockevent_bfin.shift); 193 clockevent_bfin.mult = div_sc(timer_clk, NSEC_PER_SEC, clockevent_bfin.shift);
190 clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin); 194 clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin);
191 clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin); 195 clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin);
192 clockevents_register_device(&clockevent_bfin); 196 clockevents_register_device(&clockevent_bfin);
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index 583d53811f03..8aa49f804228 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -32,12 +32,14 @@
32#include <linux/platform_device.h> 32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h> 33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h> 34#include <linux/mtd/partitions.h>
35#include <linux/mtd/physmap.h>
35#include <linux/spi/spi.h> 36#include <linux/spi/spi.h>
36#include <linux/spi/flash.h> 37#include <linux/spi/flash.h>
37#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
38#include <linux/usb/isp1362.h> 39#include <linux/usb/isp1362.h>
39#endif 40#endif
40#include <linux/ata_platform.h> 41#include <linux/ata_platform.h>
42#include <linux/i2c.h>
41#include <linux/irq.h> 43#include <linux/irq.h>
42#include <linux/interrupt.h> 44#include <linux/interrupt.h>
43#include <linux/usb/sl811.h> 45#include <linux/usb/sl811.h>
@@ -50,6 +52,7 @@
50#include <asm/reboot.h> 52#include <asm/reboot.h>
51#include <asm/nand.h> 53#include <asm/nand.h>
52#include <asm/portmux.h> 54#include <asm/portmux.h>
55#include <asm/dpmc.h>
53#include <linux/spi/ad7877.h> 56#include <linux/spi/ad7877.h>
54 57
55/* 58/*
@@ -171,6 +174,46 @@ static struct platform_device bf52x_t350mcqb_device = {
171}; 174};
172#endif 175#endif
173 176
177#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
178static struct mtd_partition ezkit_partitions[] = {
179 {
180 .name = "Bootloader",
181 .size = 0x40000,
182 .offset = 0,
183 }, {
184 .name = "Kernel",
185 .size = 0x1C0000,
186 .offset = MTDPART_OFS_APPEND,
187 }, {
188 .name = "RootFS",
189 .size = MTDPART_SIZ_FULL,
190 .offset = MTDPART_OFS_APPEND,
191 }
192};
193
194static struct physmap_flash_data ezkit_flash_data = {
195 .width = 2,
196 .parts = ezkit_partitions,
197 .nr_parts = ARRAY_SIZE(ezkit_partitions),
198};
199
200static struct resource ezkit_flash_resource = {
201 .start = 0x20000000,
202 .end = 0x203fffff,
203 .flags = IORESOURCE_MEM,
204};
205
206static struct platform_device ezkit_flash_device = {
207 .name = "physmap-flash",
208 .id = 0,
209 .dev = {
210 .platform_data = &ezkit_flash_data,
211 },
212 .num_resources = 1,
213 .resource = &ezkit_flash_resource,
214};
215#endif
216
174#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) 217#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
175static struct mtd_partition partition_info[] = { 218static struct mtd_partition partition_info[] = {
176 { 219 {
@@ -420,11 +463,7 @@ static struct mtd_partition bfin_spi_flash_partitions[] = {
420 .offset = 0, 463 .offset = 0,
421 .mask_flags = MTD_CAP_ROM 464 .mask_flags = MTD_CAP_ROM
422 }, { 465 }, {
423 .name = "kernel", 466 .name = "linux kernel",
424 .size = 0xe0000,
425 .offset = MTDPART_OFS_APPEND,
426 }, {
427 .name = "file system",
428 .size = MTDPART_SIZ_FULL, 467 .size = MTDPART_SIZ_FULL,
429 .offset = MTDPART_OFS_APPEND, 468 .offset = MTDPART_OFS_APPEND,
430 } 469 }
@@ -434,7 +473,7 @@ static struct flash_platform_data bfin_spi_flash_data = {
434 .name = "m25p80", 473 .name = "m25p80",
435 .parts = bfin_spi_flash_partitions, 474 .parts = bfin_spi_flash_partitions,
436 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), 475 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
437 .type = "m25p64", 476 .type = "m25p16",
438}; 477};
439 478
440/* SPI flash chip (m25p64) */ 479/* SPI flash chip (m25p64) */
@@ -755,6 +794,24 @@ static struct platform_device i2c_bfin_twi_device = {
755}; 794};
756#endif 795#endif
757 796
797#ifdef CONFIG_I2C_BOARDINFO
798static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
799#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
800 {
801 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
802 .type = "pcf8574_lcd",
803 },
804#endif
805#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
806 {
807 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
808 .type = "pcf8574_keypad",
809 .irq = IRQ_PF8,
810 },
811#endif
812};
813#endif
814
758#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 815#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
759static struct platform_device bfin_sport0_uart_device = { 816static struct platform_device bfin_sport0_uart_device = {
760 .name = "bfin-sport-uart", 817 .name = "bfin-sport-uart",
@@ -839,7 +896,32 @@ static struct platform_device bfin_gpios_device = {
839 .resource = &bfin_gpios_resources, 896 .resource = &bfin_gpios_resources,
840}; 897};
841 898
899static const unsigned int cclk_vlev_datasheet[] =
900{
901 VRPAIR(VLEV_100, 400000000),
902 VRPAIR(VLEV_105, 426000000),
903 VRPAIR(VLEV_110, 500000000),
904 VRPAIR(VLEV_115, 533000000),
905 VRPAIR(VLEV_120, 600000000),
906};
907
908static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
909 .tuple_tab = cclk_vlev_datasheet,
910 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
911 .vr_settling_time = 25 /* us */,
912};
913
914static struct platform_device bfin_dpmc = {
915 .name = "bfin dpmc",
916 .dev = {
917 .platform_data = &bfin_dmpc_vreg_data,
918 },
919};
920
842static struct platform_device *stamp_devices[] __initdata = { 921static struct platform_device *stamp_devices[] __initdata = {
922
923 &bfin_dpmc,
924
843#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) 925#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
844 &bf5xx_nand_device, 926 &bf5xx_nand_device,
845#endif 927#endif
@@ -921,12 +1003,22 @@ static struct platform_device *stamp_devices[] __initdata = {
921 &bfin_device_gpiokeys, 1003 &bfin_device_gpiokeys,
922#endif 1004#endif
923 1005
1006#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1007 &ezkit_flash_device,
1008#endif
1009
924 &bfin_gpios_device, 1010 &bfin_gpios_device,
925}; 1011};
926 1012
927static int __init stamp_init(void) 1013static int __init stamp_init(void)
928{ 1014{
929 printk(KERN_INFO "%s(): registering device resources\n", __func__); 1015 printk(KERN_INFO "%s(): registering device resources\n", __func__);
1016
1017#ifdef CONFIG_I2C_BOARDINFO
1018 i2c_register_board_info(0, bfin_i2c_board_info,
1019 ARRAY_SIZE(bfin_i2c_board_info));
1020#endif
1021
930 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); 1022 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
931#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 1023#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
932 spi_register_board_info(bfin_spi_board_info, 1024 spi_register_board_info(bfin_spi_board_info,
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c
index a03149c72681..ed2b0b8f5dc9 100644
--- a/arch/blackfin/mach-bf533/boards/cm_bf533.c
+++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c
@@ -33,12 +33,15 @@
33#include <linux/mtd/partitions.h> 33#include <linux/mtd/partitions.h>
34#include <linux/spi/spi.h> 34#include <linux/spi/spi.h>
35#include <linux/spi/flash.h> 35#include <linux/spi/flash.h>
36#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
36#include <linux/usb/isp1362.h> 37#include <linux/usb/isp1362.h>
38#endif
37#include <linux/ata_platform.h> 39#include <linux/ata_platform.h>
38#include <linux/irq.h> 40#include <linux/irq.h>
39#include <asm/dma.h> 41#include <asm/dma.h>
40#include <asm/bfin5xx_spi.h> 42#include <asm/bfin5xx_spi.h>
41#include <asm/portmux.h> 43#include <asm/portmux.h>
44#include <asm/dpmc.h>
42 45
43/* 46/*
44 * Name the Board for the /proc/cpuinfo 47 * Name the Board for the /proc/cpuinfo
@@ -341,7 +344,37 @@ static struct platform_device bfin_pata_device = {
341}; 344};
342#endif 345#endif
343 346
347static const unsigned int cclk_vlev_datasheet[] =
348{
349 VRPAIR(VLEV_085, 250000000),
350 VRPAIR(VLEV_090, 376000000),
351 VRPAIR(VLEV_095, 426000000),
352 VRPAIR(VLEV_100, 426000000),
353 VRPAIR(VLEV_105, 476000000),
354 VRPAIR(VLEV_110, 476000000),
355 VRPAIR(VLEV_115, 476000000),
356 VRPAIR(VLEV_120, 600000000),
357 VRPAIR(VLEV_125, 600000000),
358 VRPAIR(VLEV_130, 600000000),
359};
360
361static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
362 .tuple_tab = cclk_vlev_datasheet,
363 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
364 .vr_settling_time = 25 /* us */,
365};
366
367static struct platform_device bfin_dpmc = {
368 .name = "bfin dpmc",
369 .dev = {
370 .platform_data = &bfin_dmpc_vreg_data,
371 },
372};
373
344static struct platform_device *cm_bf533_devices[] __initdata = { 374static struct platform_device *cm_bf533_devices[] __initdata = {
375
376 &bfin_dpmc,
377
345#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 378#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
346 &bfin_uart_device, 379 &bfin_uart_device,
347#endif 380#endif
diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c
index 08a7943949ae..9d28415163ea 100644
--- a/arch/blackfin/mach-bf533/boards/ezkit.c
+++ b/arch/blackfin/mach-bf533/boards/ezkit.c
@@ -42,6 +42,7 @@
42#include <asm/dma.h> 42#include <asm/dma.h>
43#include <asm/bfin5xx_spi.h> 43#include <asm/bfin5xx_spi.h>
44#include <asm/portmux.h> 44#include <asm/portmux.h>
45#include <asm/dpmc.h>
45 46
46/* 47/*
47 * Name the Board for the /proc/cpuinfo 48 * Name the Board for the /proc/cpuinfo
@@ -350,7 +351,37 @@ static struct platform_device i2c_gpio_device = {
350}; 351};
351#endif 352#endif
352 353
354static const unsigned int cclk_vlev_datasheet[] =
355{
356 VRPAIR(VLEV_085, 250000000),
357 VRPAIR(VLEV_090, 376000000),
358 VRPAIR(VLEV_095, 426000000),
359 VRPAIR(VLEV_100, 426000000),
360 VRPAIR(VLEV_105, 476000000),
361 VRPAIR(VLEV_110, 476000000),
362 VRPAIR(VLEV_115, 476000000),
363 VRPAIR(VLEV_120, 600000000),
364 VRPAIR(VLEV_125, 600000000),
365 VRPAIR(VLEV_130, 600000000),
366};
367
368static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
369 .tuple_tab = cclk_vlev_datasheet,
370 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
371 .vr_settling_time = 25 /* us */,
372};
373
374static struct platform_device bfin_dpmc = {
375 .name = "bfin dpmc",
376 .dev = {
377 .platform_data = &bfin_dmpc_vreg_data,
378 },
379};
380
353static struct platform_device *ezkit_devices[] __initdata = { 381static struct platform_device *ezkit_devices[] __initdata = {
382
383 &bfin_dpmc,
384
354#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 385#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
355 &smc91x_device, 386 &smc91x_device,
356#endif 387#endif
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index 024f418ae543..7fd35fb32fd5 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -45,6 +45,7 @@
45#include <asm/bfin5xx_spi.h> 45#include <asm/bfin5xx_spi.h>
46#include <asm/reboot.h> 46#include <asm/reboot.h>
47#include <asm/portmux.h> 47#include <asm/portmux.h>
48#include <asm/dpmc.h>
48 49
49/* 50/*
50 * Name the Board for the /proc/cpuinfo 51 * Name the Board for the /proc/cpuinfo
@@ -516,7 +517,37 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
516}; 517};
517#endif 518#endif
518 519
520static const unsigned int cclk_vlev_datasheet[] =
521{
522 VRPAIR(VLEV_085, 250000000),
523 VRPAIR(VLEV_090, 376000000),
524 VRPAIR(VLEV_095, 426000000),
525 VRPAIR(VLEV_100, 426000000),
526 VRPAIR(VLEV_105, 476000000),
527 VRPAIR(VLEV_110, 476000000),
528 VRPAIR(VLEV_115, 476000000),
529 VRPAIR(VLEV_120, 600000000),
530 VRPAIR(VLEV_125, 600000000),
531 VRPAIR(VLEV_130, 600000000),
532};
533
534static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
535 .tuple_tab = cclk_vlev_datasheet,
536 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
537 .vr_settling_time = 25 /* us */,
538};
539
540static struct platform_device bfin_dpmc = {
541 .name = "bfin dpmc",
542 .dev = {
543 .platform_data = &bfin_dmpc_vreg_data,
544 },
545};
546
519static struct platform_device *stamp_devices[] __initdata = { 547static struct platform_device *stamp_devices[] __initdata = {
548
549 &bfin_dpmc,
550
520#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 551#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
521 &rtc_device, 552 &rtc_device,
522#endif 553#endif
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c
index d8a23cd9b9ed..73f2142875e2 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c
@@ -35,12 +35,15 @@
35#include <linux/mtd/partitions.h> 35#include <linux/mtd/partitions.h>
36#include <linux/spi/spi.h> 36#include <linux/spi/spi.h>
37#include <linux/spi/flash.h> 37#include <linux/spi/flash.h>
38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
38#include <linux/usb/isp1362.h> 39#include <linux/usb/isp1362.h>
40#endif
39#include <linux/ata_platform.h> 41#include <linux/ata_platform.h>
40#include <linux/irq.h> 42#include <linux/irq.h>
41#include <asm/dma.h> 43#include <asm/dma.h>
42#include <asm/bfin5xx_spi.h> 44#include <asm/bfin5xx_spi.h>
43#include <asm/portmux.h> 45#include <asm/portmux.h>
46#include <asm/dpmc.h>
44 47
45/* 48/*
46 * Name the Board for the /proc/cpuinfo 49 * Name the Board for the /proc/cpuinfo
@@ -428,7 +431,37 @@ static struct platform_device bfin_pata_device = {
428}; 431};
429#endif 432#endif
430 433
434static const unsigned int cclk_vlev_datasheet[] =
435{
436 VRPAIR(VLEV_085, 250000000),
437 VRPAIR(VLEV_090, 376000000),
438 VRPAIR(VLEV_095, 426000000),
439 VRPAIR(VLEV_100, 426000000),
440 VRPAIR(VLEV_105, 476000000),
441 VRPAIR(VLEV_110, 476000000),
442 VRPAIR(VLEV_115, 476000000),
443 VRPAIR(VLEV_120, 500000000),
444 VRPAIR(VLEV_125, 533000000),
445 VRPAIR(VLEV_130, 600000000),
446};
447
448static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
449 .tuple_tab = cclk_vlev_datasheet,
450 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
451 .vr_settling_time = 25 /* us */,
452};
453
454static struct platform_device bfin_dpmc = {
455 .name = "bfin dpmc",
456 .dev = {
457 .platform_data = &bfin_dmpc_vreg_data,
458 },
459};
460
431static struct platform_device *cm_bf537_devices[] __initdata = { 461static struct platform_device *cm_bf537_devices[] __initdata = {
462
463 &bfin_dpmc,
464
432#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE) 465#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
433 &hitachi_fb_device, 466 &hitachi_fb_device,
434#endif 467#endif
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index d3727b7c2d7d..9a756d1f3d73 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -47,6 +47,7 @@
47#include <asm/bfin5xx_spi.h> 47#include <asm/bfin5xx_spi.h>
48#include <asm/reboot.h> 48#include <asm/reboot.h>
49#include <asm/portmux.h> 49#include <asm/portmux.h>
50#include <asm/dpmc.h>
50#include <linux/spi/ad7877.h> 51#include <linux/spi/ad7877.h>
51 52
52/* 53/*
@@ -817,7 +818,37 @@ static struct platform_device bfin_pata_device = {
817}; 818};
818#endif 819#endif
819 820
821static const unsigned int cclk_vlev_datasheet[] =
822{
823 VRPAIR(VLEV_085, 250000000),
824 VRPAIR(VLEV_090, 376000000),
825 VRPAIR(VLEV_095, 426000000),
826 VRPAIR(VLEV_100, 426000000),
827 VRPAIR(VLEV_105, 476000000),
828 VRPAIR(VLEV_110, 476000000),
829 VRPAIR(VLEV_115, 476000000),
830 VRPAIR(VLEV_120, 500000000),
831 VRPAIR(VLEV_125, 533000000),
832 VRPAIR(VLEV_130, 600000000),
833};
834
835static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
836 .tuple_tab = cclk_vlev_datasheet,
837 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
838 .vr_settling_time = 25 /* us */,
839};
840
841static struct platform_device bfin_dpmc = {
842 .name = "bfin dpmc",
843 .dev = {
844 .platform_data = &bfin_dmpc_vreg_data,
845 },
846};
847
820static struct platform_device *stamp_devices[] __initdata = { 848static struct platform_device *stamp_devices[] __initdata = {
849
850 &bfin_dpmc,
851
821#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 852#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
822 &bfin_pcmcia_cf_device, 853 &bfin_pcmcia_cf_device,
823#endif 854#endif
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c
index e3e8479fffb5..3b74f96d3590 100644
--- a/arch/blackfin/mach-bf548/boards/cm_bf548.c
+++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c
@@ -36,7 +36,9 @@
36#include <linux/spi/flash.h> 36#include <linux/spi/flash.h>
37#include <linux/irq.h> 37#include <linux/irq.h>
38#include <linux/interrupt.h> 38#include <linux/interrupt.h>
39#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
39#include <linux/usb/musb.h> 40#include <linux/usb/musb.h>
41#endif
40#include <asm/bfin5xx_spi.h> 42#include <asm/bfin5xx_spi.h>
41#include <asm/cplb.h> 43#include <asm/cplb.h>
42#include <asm/dma.h> 44#include <asm/dma.h>
@@ -44,6 +46,7 @@
44#include <asm/nand.h> 46#include <asm/nand.h>
45#include <asm/portmux.h> 47#include <asm/portmux.h>
46#include <asm/mach/bf54x_keys.h> 48#include <asm/mach/bf54x_keys.h>
49#include <asm/dpmc.h>
47#include <linux/input.h> 50#include <linux/input.h>
48#include <linux/spi/ad7877.h> 51#include <linux/spi/ad7877.h>
49 52
@@ -590,7 +593,38 @@ static struct platform_device bfin_device_gpiokeys = {
590}; 593};
591#endif 594#endif
592 595
596static const unsigned int cclk_vlev_datasheet[] =
597{
598/*
599 * Internal VLEV BF54XSBBC1533
600 ****temporarily using these values until data sheet is updated
601 */
602 VRPAIR(VLEV_085, 150000000),
603 VRPAIR(VLEV_090, 250000000),
604 VRPAIR(VLEV_110, 276000000),
605 VRPAIR(VLEV_115, 301000000),
606 VRPAIR(VLEV_120, 525000000),
607 VRPAIR(VLEV_125, 550000000),
608 VRPAIR(VLEV_130, 600000000),
609};
610
611static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
612 .tuple_tab = cclk_vlev_datasheet,
613 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
614 .vr_settling_time = 25 /* us */,
615};
616
617static struct platform_device bfin_dpmc = {
618 .name = "bfin dpmc",
619 .dev = {
620 .platform_data = &bfin_dmpc_vreg_data,
621 },
622};
623
593static struct platform_device *cm_bf548_devices[] __initdata = { 624static struct platform_device *cm_bf548_devices[] __initdata = {
625
626 &bfin_dpmc,
627
594#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 628#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
595 &rtc_device, 629 &rtc_device,
596#endif 630#endif
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index b00f68ac6bc9..d1682bb37509 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -46,6 +46,7 @@
46#include <asm/dma.h> 46#include <asm/dma.h>
47#include <asm/gpio.h> 47#include <asm/gpio.h>
48#include <asm/nand.h> 48#include <asm/nand.h>
49#include <asm/dpmc.h>
49#include <asm/portmux.h> 50#include <asm/portmux.h>
50#include <asm/mach/bf54x_keys.h> 51#include <asm/mach/bf54x_keys.h>
51#include <linux/input.h> 52#include <linux/input.h>
@@ -689,7 +690,38 @@ static struct platform_device bfin_gpios_device = {
689 .resource = &bfin_gpios_resources, 690 .resource = &bfin_gpios_resources,
690}; 691};
691 692
693static const unsigned int cclk_vlev_datasheet[] =
694{
695/*
696 * Internal VLEV BF54XSBBC1533
697 ****temporarily using these values until data sheet is updated
698 */
699 VRPAIR(VLEV_085, 150000000),
700 VRPAIR(VLEV_090, 250000000),
701 VRPAIR(VLEV_110, 276000000),
702 VRPAIR(VLEV_115, 301000000),
703 VRPAIR(VLEV_120, 525000000),
704 VRPAIR(VLEV_125, 550000000),
705 VRPAIR(VLEV_130, 600000000),
706};
707
708static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
709 .tuple_tab = cclk_vlev_datasheet,
710 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
711 .vr_settling_time = 25 /* us */,
712};
713
714static struct platform_device bfin_dpmc = {
715 .name = "bfin dpmc",
716 .dev = {
717 .platform_data = &bfin_dmpc_vreg_data,
718 },
719};
720
692static struct platform_device *ezkit_devices[] __initdata = { 721static struct platform_device *ezkit_devices[] __initdata = {
722
723 &bfin_dpmc,
724
693#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 725#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
694 &rtc_device, 726 &rtc_device,
695#endif 727#endif
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c
index 9fd580952fd8..466ef5929a25 100644
--- a/arch/blackfin/mach-bf561/boards/cm_bf561.c
+++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c
@@ -33,12 +33,15 @@
33#include <linux/mtd/partitions.h> 33#include <linux/mtd/partitions.h>
34#include <linux/spi/spi.h> 34#include <linux/spi/spi.h>
35#include <linux/spi/flash.h> 35#include <linux/spi/flash.h>
36#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
36#include <linux/usb/isp1362.h> 37#include <linux/usb/isp1362.h>
38#endif
37#include <linux/ata_platform.h> 39#include <linux/ata_platform.h>
38#include <linux/irq.h> 40#include <linux/irq.h>
39#include <asm/dma.h> 41#include <asm/dma.h>
40#include <asm/bfin5xx_spi.h> 42#include <asm/bfin5xx_spi.h>
41#include <asm/portmux.h> 43#include <asm/portmux.h>
44#include <asm/dpmc.h>
42 45
43/* 46/*
44 * Name the Board for the /proc/cpuinfo 47 * Name the Board for the /proc/cpuinfo
@@ -339,8 +342,37 @@ static struct platform_device bfin_pata_device = {
339}; 342};
340#endif 343#endif
341 344
345static const unsigned int cclk_vlev_datasheet[] =
346{
347 VRPAIR(VLEV_085, 250000000),
348 VRPAIR(VLEV_090, 300000000),
349 VRPAIR(VLEV_095, 313000000),
350 VRPAIR(VLEV_100, 350000000),
351 VRPAIR(VLEV_105, 400000000),
352 VRPAIR(VLEV_110, 444000000),
353 VRPAIR(VLEV_115, 450000000),
354 VRPAIR(VLEV_120, 475000000),
355 VRPAIR(VLEV_125, 500000000),
356 VRPAIR(VLEV_130, 600000000),
357};
358
359static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
360 .tuple_tab = cclk_vlev_datasheet,
361 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
362 .vr_settling_time = 25 /* us */,
363};
364
365static struct platform_device bfin_dpmc = {
366 .name = "bfin dpmc",
367 .dev = {
368 .platform_data = &bfin_dmpc_vreg_data,
369 },
370};
371
342static struct platform_device *cm_bf561_devices[] __initdata = { 372static struct platform_device *cm_bf561_devices[] __initdata = {
343 373
374 &bfin_dpmc,
375
344#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE) 376#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
345 &hitachi_fb_device, 377 &hitachi_fb_device,
346#endif 378#endif
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index 0d74b7d99209..61d8f7648b24 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -39,6 +39,7 @@
39#include <asm/dma.h> 39#include <asm/dma.h>
40#include <asm/bfin5xx_spi.h> 40#include <asm/bfin5xx_spi.h>
41#include <asm/portmux.h> 41#include <asm/portmux.h>
42#include <asm/dpmc.h>
42 43
43/* 44/*
44 * Name the Board for the /proc/cpuinfo 45 * Name the Board for the /proc/cpuinfo
@@ -443,7 +444,37 @@ static struct platform_device i2c_gpio_device = {
443}; 444};
444#endif 445#endif
445 446
447static const unsigned int cclk_vlev_datasheet[] =
448{
449 VRPAIR(VLEV_085, 250000000),
450 VRPAIR(VLEV_090, 300000000),
451 VRPAIR(VLEV_095, 313000000),
452 VRPAIR(VLEV_100, 350000000),
453 VRPAIR(VLEV_105, 400000000),
454 VRPAIR(VLEV_110, 444000000),
455 VRPAIR(VLEV_115, 450000000),
456 VRPAIR(VLEV_120, 475000000),
457 VRPAIR(VLEV_125, 500000000),
458 VRPAIR(VLEV_130, 600000000),
459};
460
461static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
462 .tuple_tab = cclk_vlev_datasheet,
463 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
464 .vr_settling_time = 25 /* us */,
465};
466
467static struct platform_device bfin_dpmc = {
468 .name = "bfin dpmc",
469 .dev = {
470 .platform_data = &bfin_dmpc_vreg_data,
471 },
472};
473
446static struct platform_device *ezkit_devices[] __initdata = { 474static struct platform_device *ezkit_devices[] __initdata = {
475
476 &bfin_dpmc,
477
447#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 478#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
448 &smc91x_device, 479 &smc91x_device,
449#endif 480#endif
diff --git a/arch/blackfin/mach-common/Makefile b/arch/blackfin/mach-common/Makefile
index 393081e9b680..422bfee34adc 100644
--- a/arch/blackfin/mach-common/Makefile
+++ b/arch/blackfin/mach-common/Makefile
@@ -6,5 +6,6 @@ obj-y := \
6 cache.o cacheinit.o entry.o \ 6 cache.o cacheinit.o entry.o \
7 interrupt.o lock.o irqpanic.o arch_checks.o ints-priority.o 7 interrupt.o lock.o irqpanic.o arch_checks.o ints-priority.o
8 8
9obj-$(CONFIG_PM) += pm.o dpmc.o 9obj-$(CONFIG_PM) += pm.o dpmc_modes.o
10obj-$(CONFIG_CPU_FREQ) += cpufreq.o 10obj-$(CONFIG_CPU_FREQ) += cpufreq.o
11obj-$(CONFIG_CPU_VOLTAGE) += dpmc.o
diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c
index ed81e00d20e1..75cdad291e88 100644
--- a/arch/blackfin/mach-common/cpufreq.c
+++ b/arch/blackfin/mach-common/cpufreq.c
@@ -62,6 +62,14 @@ static struct bfin_dpm_state {
62 unsigned int tscale; /* change the divider on the core timer interrupt */ 62 unsigned int tscale; /* change the divider on the core timer interrupt */
63} dpm_state_table[3]; 63} dpm_state_table[3];
64 64
65/*
66 normalized to maximum frequncy offset for CYCLES,
67 used in time-ts cycles clock source, but could be used
68 somewhere also.
69 */
70unsigned long long __bfin_cycles_off;
71unsigned int __bfin_cycles_mod;
72
65/**************************************************************************/ 73/**************************************************************************/
66 74
67static unsigned int bfin_getfreq(unsigned int cpu) 75static unsigned int bfin_getfreq(unsigned int cpu)
@@ -80,6 +88,7 @@ static int bfin_target(struct cpufreq_policy *policy,
80 unsigned int index, plldiv, tscale; 88 unsigned int index, plldiv, tscale;
81 unsigned long flags, cclk_hz; 89 unsigned long flags, cclk_hz;
82 struct cpufreq_freqs freqs; 90 struct cpufreq_freqs freqs;
91 cycles_t cycles;
83 92
84 if (cpufreq_frequency_table_target(policy, bfin_freq_table, 93 if (cpufreq_frequency_table_target(policy, bfin_freq_table,
85 target_freq, relation, &index)) 94 target_freq, relation, &index))
@@ -101,8 +110,14 @@ static int bfin_target(struct cpufreq_policy *policy,
101 bfin_write_PLL_DIV(plldiv); 110 bfin_write_PLL_DIV(plldiv);
102 /* we have to adjust the core timer, because it is using cclk */ 111 /* we have to adjust the core timer, because it is using cclk */
103 bfin_write_TSCALE(tscale); 112 bfin_write_TSCALE(tscale);
113 cycles = get_cycles();
104 SSYNC(); 114 SSYNC();
115 cycles += 10; /* ~10 cycles we loose after get_cycles() */
116 __bfin_cycles_off += (cycles << __bfin_cycles_mod) - (cycles << index);
117 __bfin_cycles_mod = index;
105 local_irq_restore(flags); 118 local_irq_restore(flags);
119 /* TODO: just test case for cycles clock source, remove later */
120 pr_debug("cpufreq: done\n");
106 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 121 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
107 122
108 return 0; 123 return 0;
@@ -119,22 +134,13 @@ static int __init __bfin_cpu_init(struct cpufreq_policy *policy)
119 unsigned long cclk, sclk, csel, min_cclk; 134 unsigned long cclk, sclk, csel, min_cclk;
120 int index; 135 int index;
121 136
122#ifdef CONFIG_CYCLES_CLOCKSOURCE
123/*
124 * Clocksource CYCLES is still CONTINUOUS but not longer MONOTONIC in case we enable
125 * CPU frequency scaling, since CYCLES runs off Core Clock.
126 */
127 printk(KERN_WARNING "CPU frequency scaling not supported: Clocksource not suitable\n"
128 return -ENODEV;
129#endif
130
131 if (policy->cpu != 0) 137 if (policy->cpu != 0)
132 return -EINVAL; 138 return -EINVAL;
133 139
134 cclk = get_cclk(); 140 cclk = get_cclk();
135 sclk = get_sclk(); 141 sclk = get_sclk();
136 142
137#if ANOMALY_05000273 143#if ANOMALY_05000273 || (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_DCACHE))
138 min_cclk = sclk * 2; 144 min_cclk = sclk * 2;
139#else 145#else
140 min_cclk = sclk; 146 min_cclk = sclk;
diff --git a/arch/blackfin/mach-common/dpmc.c b/arch/blackfin/mach-common/dpmc.c
new file mode 100644
index 000000000000..02c7efd1bcf4
--- /dev/null
+++ b/arch/blackfin/mach-common/dpmc.c
@@ -0,0 +1,137 @@
1/*
2 * Copyright 2008 Analog Devices Inc.
3 *
4 * Licensed under the GPL-2 or later.
5 */
6
7#include <linux/cdev.h>
8#include <linux/device.h>
9#include <linux/errno.h>
10#include <linux/fs.h>
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/platform_device.h>
14#include <linux/types.h>
15#include <linux/cpufreq.h>
16
17#include <asm/delay.h>
18#include <asm/dpmc.h>
19
20#define DRIVER_NAME "bfin dpmc"
21
22#define dprintk(msg...) \
23 cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, DRIVER_NAME, msg)
24
25struct bfin_dpmc_platform_data *pdata;
26
27/**
28 * bfin_set_vlev - Update VLEV field in VR_CTL Reg.
29 * Avoid BYPASS sequence
30 */
31static void bfin_set_vlev(unsigned int vlev)
32{
33 unsigned pll_lcnt;
34
35 pll_lcnt = bfin_read_PLL_LOCKCNT();
36
37 bfin_write_PLL_LOCKCNT(1);
38 bfin_write_VR_CTL((bfin_read_VR_CTL() & ~VLEV) | vlev);
39 bfin_write_PLL_LOCKCNT(pll_lcnt);
40}
41
42/**
43 * bfin_get_vlev - Get CPU specific VLEV from platform device data
44 */
45static unsigned int bfin_get_vlev(unsigned int freq)
46{
47 int i;
48
49 if (!pdata)
50 goto err_out;
51
52 freq >>= 16;
53
54 for (i = 0; i < pdata->tabsize; i++)
55 if (freq <= (pdata->tuple_tab[i] & 0xFFFF))
56 return pdata->tuple_tab[i] >> 16;
57
58err_out:
59 printk(KERN_WARNING "DPMC: No suitable CCLK VDDINT voltage pair found\n");
60 return VLEV_120;
61}
62
63#ifdef CONFIG_CPU_FREQ
64static int
65vreg_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data)
66{
67 struct cpufreq_freqs *freq = data;
68
69 if (val == CPUFREQ_PRECHANGE && freq->old < freq->new) {
70 bfin_set_vlev(bfin_get_vlev(freq->new));
71 udelay(pdata->vr_settling_time); /* Wait until Volatge settled */
72
73 } else if (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)
74 bfin_set_vlev(bfin_get_vlev(freq->new));
75
76 return 0;
77}
78
79static struct notifier_block vreg_cpufreq_notifier_block = {
80 .notifier_call = vreg_cpufreq_notifier
81};
82#endif /* CONFIG_CPU_FREQ */
83
84/**
85 * bfin_dpmc_probe -
86 *
87 */
88static int __devinit bfin_dpmc_probe(struct platform_device *pdev)
89{
90 if (pdev->dev.platform_data)
91 pdata = pdev->dev.platform_data;
92 else
93 return -EINVAL;
94
95 return cpufreq_register_notifier(&vreg_cpufreq_notifier_block,
96 CPUFREQ_TRANSITION_NOTIFIER);
97}
98
99/**
100 * bfin_dpmc_remove -
101 */
102static int __devexit bfin_dpmc_remove(struct platform_device *pdev)
103{
104 pdata = NULL;
105 return cpufreq_unregister_notifier(&vreg_cpufreq_notifier_block,
106 CPUFREQ_TRANSITION_NOTIFIER);
107}
108
109struct platform_driver bfin_dpmc_device_driver = {
110 .probe = bfin_dpmc_probe,
111 .remove = __devexit_p(bfin_dpmc_remove),
112 .driver = {
113 .name = DRIVER_NAME,
114 }
115};
116
117/**
118 * bfin_dpmc_init - Init driver
119 */
120static int __init bfin_dpmc_init(void)
121{
122 return platform_driver_register(&bfin_dpmc_device_driver);
123}
124module_init(bfin_dpmc_init);
125
126/**
127 * bfin_dpmc_exit - break down driver
128 */
129static void __exit bfin_dpmc_exit(void)
130{
131 platform_driver_unregister(&bfin_dpmc_device_driver);
132}
133module_exit(bfin_dpmc_exit);
134
135MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
136MODULE_DESCRIPTION("cpu power management driver for Blackfin");
137MODULE_LICENSE("GPL");
diff --git a/arch/blackfin/mach-common/dpmc.S b/arch/blackfin/mach-common/dpmc_modes.S
index 9d45aa3265b1..b7981d31c392 100644
--- a/arch/blackfin/mach-common/dpmc.S
+++ b/arch/blackfin/mach-common/dpmc_modes.S
@@ -1,30 +1,7 @@
1/* 1/*
2 * File: arch/blackfin/mach-common/dpmc.S 2 * Copyright 2004-2008 Analog Devices Inc.
3 * Based on:
4 * Author: LG Soft India
5 * 3 *
6 * Created: ? 4 * Licensed under the GPL-2 or later.
7 * Description: Watchdog Timer APIs
8 *
9 * Modified:
10 * Copyright 2004-2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */ 5 */
29 6
30#include <linux/linkage.h> 7#include <linux/linkage.h>
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index f2fb87e9a46e..038f70e0be65 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -151,26 +151,62 @@ ENTRY(_ex_soft_bp)
151ENDPROC(_ex_soft_bp) 151ENDPROC(_ex_soft_bp)
152 152
153ENTRY(_ex_single_step) 153ENTRY(_ex_single_step)
154 /* If we just returned from an interrupt, the single step event is
155 for the RTI instruction. */
154 r7 = retx; 156 r7 = retx;
155 r6 = reti; 157 r6 = reti;
156 cc = r7 == r6; 158 cc = r7 == r6;
157 if cc jump _bfin_return_from_exception 159 if cc jump _bfin_return_from_exception;
158 r7 = syscfg;
159 bitclr (r7, 0);
160 syscfg = R7;
161 160
161 /* If we were in user mode, do the single step normally. */
162 p5.l = lo(IPEND); 162 p5.l = lo(IPEND);
163 p5.h = hi(IPEND); 163 p5.h = hi(IPEND);
164 r6 = [p5]; 164 r6 = [p5];
165 cc = bittst(r6, 5); 165 r7 = 0xffe0 (z);
166 if !cc jump _ex_trap_c; 166 r7 = r7 & r6;
167 p4.l = lo(EVT5); 167 cc = r7 == 0;
168 p4.h = hi(EVT5); 168 if !cc jump 1f;
169 r6.h = _exception_to_level5; 169
170 r6.l = _exception_to_level5; 170 /* Single stepping only a single instruction, so clear the trace
171 r7 = [p4]; 171 * bit here. */
172 cc = r6 == r7; 172 r7 = syscfg;
173 if !cc jump _ex_trap_c; 173 bitclr (r7, 0);
174 syscfg = R7;
175 jump _ex_trap_c;
176
1771:
178 /*
179 * We were in an interrupt handler. By convention, all of them save
180 * SYSCFG with their first instruction, so by checking whether our
181 * RETX points at the entry point, we can determine whether to allow
182 * a single step, or whether to clear SYSCFG.
183 *
184 * First, find out the interrupt level and the event vector for it.
185 */
186 p5.l = lo(EVT0);
187 p5.h = hi(EVT0);
188 p5 += -4;
1892:
190 r7 = rot r7 by -1;
191 p5 += 4;
192 if !cc jump 2b;
193
194 /* What we actually do is test for the _second_ instruction in the
195 * IRQ handler. That way, if there are insns following the restore
196 * of SYSCFG after leaving the handler, we will not turn off SYSCFG
197 * for them. */
198
199 r7 = [p5];
200 r7 += 2;
201 r6 = RETX;
202 cc = R7 == R6;
203 if !cc jump _bfin_return_from_exception;
204
205 r7 = syscfg;
206 bitclr (r7, 0);
207 syscfg = R7;
208
209 /* Fall through to _bfin_return_from_exception. */
174ENDPROC(_ex_single_step) 210ENDPROC(_ex_single_step)
175 211
176ENTRY(_bfin_return_from_exception) 212ENTRY(_bfin_return_from_exception)
@@ -234,20 +270,26 @@ ENTRY(_ex_trap_c)
234 p5.l = _saved_icplb_fault_addr; 270 p5.l = _saved_icplb_fault_addr;
235 [p5] = r7; 271 [p5] = r7;
236 272
237 p4.l = __retx; 273 p4.l = _excpt_saved_stuff;
238 p4.h = __retx; 274 p4.h = _excpt_saved_stuff;
275
239 r6 = retx; 276 r6 = retx;
240 [p4] = r6; 277 [p4] = r6;
241 p4.l = lo(SAFE_USER_INSTRUCTION); 278
242 p4.h = hi(SAFE_USER_INSTRUCTION); 279 r6 = SYSCFG;
243 retx = p4; 280 [p4 + 4] = r6;
281 BITCLR(r6, 0);
282 SYSCFG = r6;
244 283
245 /* Disable all interrupts, but make sure level 5 is enabled so 284 /* Disable all interrupts, but make sure level 5 is enabled so
246 * we can switch to that level. Save the old mask. */ 285 * we can switch to that level. Save the old mask. */
247 cli r6; 286 cli r6;
248 p4.l = _excpt_saved_imask; 287 [p4 + 8] = r6;
249 p4.h = _excpt_saved_imask; 288
250 [p4] = r6; 289 p4.l = lo(SAFE_USER_INSTRUCTION);
290 p4.h = hi(SAFE_USER_INSTRUCTION);
291 retx = p4;
292
251 r6 = 0x3f; 293 r6 = 0x3f;
252 sti r6; 294 sti r6;
253 295
@@ -295,6 +337,11 @@ ENTRY(_double_fault)
295 */ 337 */
296 SAVE_ALL_SYS 338 SAVE_ALL_SYS
297 339
340 /* The dumping functions expect the return address in the RETI
341 * slot. */
342 r6 = retx;
343 [sp + PT_PC] = r6;
344
298 r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */ 345 r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */
299 SP += -12; 346 SP += -12;
300 call _double_fault_c; 347 call _double_fault_c;
@@ -307,16 +354,17 @@ ENDPROC(_double_fault)
307ENTRY(_exception_to_level5) 354ENTRY(_exception_to_level5)
308 SAVE_ALL_SYS 355 SAVE_ALL_SYS
309 356
310 p4.l = __retx; 357 p4.l = _excpt_saved_stuff;
311 p4.h = __retx; 358 p4.h = _excpt_saved_stuff;
312 r6 = [p4]; 359 r6 = [p4];
313 [sp + PT_PC] = r6; 360 [sp + PT_PC] = r6;
314 361
362 r6 = [p4 + 4];
363 [sp + PT_SYSCFG] = r6;
364
315 /* Restore interrupt mask. We haven't pushed RETI, so this 365 /* Restore interrupt mask. We haven't pushed RETI, so this
316 * doesn't enable interrupts until we return from this handler. */ 366 * doesn't enable interrupts until we return from this handler. */
317 p4.l = _excpt_saved_imask; 367 r6 = [p4 + 8];
318 p4.h = _excpt_saved_imask;
319 r6 = [p4];
320 sti r6; 368 sti r6;
321 369
322 /* Restore the hardware error vector. */ 370 /* Restore the hardware error vector. */
@@ -1344,7 +1392,14 @@ ENTRY(_sys_call_table)
1344 .rept NR_syscalls-(.-_sys_call_table)/4 1392 .rept NR_syscalls-(.-_sys_call_table)/4
1345 .long _sys_ni_syscall 1393 .long _sys_ni_syscall
1346 .endr 1394 .endr
1347_excpt_saved_imask: 1395
1396 /*
1397 * Used to save the real RETX, IMASK and SYSCFG when temporarily
1398 * storing safe values across the transition from exception to IRQ5.
1399 */
1400_excpt_saved_stuff:
1401 .long 0;
1402 .long 0;
1348 .long 0; 1403 .long 0;
1349 1404
1350_exception_stack: 1405_exception_stack:
@@ -1358,7 +1413,3 @@ _exception_stack_top:
1358_last_cplb_fault_retx: 1413_last_cplb_fault_retx:
1359 .long 0; 1414 .long 0;
1360#endif 1415#endif
1361 /* Used to save the real RETX when temporarily storing a safe
1362 * return address. */
1363__retx:
1364 .long 0;
diff --git a/arch/cris/kernel/sys_cris.c b/arch/cris/kernel/sys_cris.c
index d124066e1728..a79fbd87021b 100644
--- a/arch/cris/kernel/sys_cris.c
+++ b/arch/cris/kernel/sys_cris.c
@@ -27,28 +27,6 @@
27#include <asm/uaccess.h> 27#include <asm/uaccess.h>
28#include <asm/segment.h> 28#include <asm/segment.h>
29 29
30/*
31 * sys_pipe() is the normal C calling standard for creating
32 * a pipe. It's not the way Unix traditionally does this, though.
33 */
34asmlinkage int sys_pipe(unsigned long __user * fildes)
35{
36 int fd[2];
37 int error;
38
39 lock_kernel();
40 error = do_pipe(fd);
41 unlock_kernel();
42 if (!error) {
43 if (copy_to_user(fildes, fd, 2*sizeof(int))) {
44 sys_close(fd[0]);
45 sys_close(fd[1]);
46 error = -EFAULT;
47 }
48 }
49 return error;
50}
51
52/* common code for old and new mmaps */ 30/* common code for old and new mmaps */
53static inline long 31static inline long
54do_mmap2(unsigned long addr, unsigned long len, unsigned long prot, 32do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
diff --git a/arch/m32r/kernel/sys_m32r.c b/arch/m32r/kernel/sys_m32r.c
index 319c79720b8a..305ac852bbed 100644
--- a/arch/m32r/kernel/sys_m32r.c
+++ b/arch/m32r/kernel/sys_m32r.c
@@ -76,29 +76,6 @@ asmlinkage int sys_tas(int __user *addr)
76 return oldval; 76 return oldval;
77} 77}
78 78
79/*
80 * sys_pipe() is the normal C calling standard for creating
81 * a pipe. It's not the way Unix traditionally does this, though.
82 */
83asmlinkage int
84sys_pipe(unsigned long r0, unsigned long r1, unsigned long r2,
85 unsigned long r3, unsigned long r4, unsigned long r5,
86 unsigned long r6, struct pt_regs regs)
87{
88 int fd[2];
89 int error;
90
91 error = do_pipe(fd);
92 if (!error) {
93 if (copy_to_user((void __user *)r0, fd, 2*sizeof(int))) {
94 sys_close(fd[0]);
95 sys_close(fd[1]);
96 error = -EFAULT;
97 }
98 }
99 return error;
100}
101
102asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, 79asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
103 unsigned long prot, unsigned long flags, 80 unsigned long prot, unsigned long flags,
104 unsigned long fd, unsigned long pgoff) 81 unsigned long fd, unsigned long pgoff)
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig
index 6a6409adc564..e856218da90d 100644
--- a/arch/mn10300/Kconfig
+++ b/arch/mn10300/Kconfig
@@ -186,17 +186,6 @@ config PREEMPT
186 Say Y here if you are building a kernel for a desktop, embedded 186 Say Y here if you are building a kernel for a desktop, embedded
187 or real-time system. Say N if you are unsure. 187 or real-time system. Say N if you are unsure.
188 188
189config PREEMPT_BKL
190 bool "Preempt The Big Kernel Lock"
191 depends on PREEMPT
192 default y
193 help
194 This option reduces the latency of the kernel by making the
195 big kernel lock preemptible.
196
197 Say Y here if you are building a kernel for a desktop system.
198 Say N if you are unsure.
199
200config MN10300_CURRENT_IN_E2 189config MN10300_CURRENT_IN_E2
201 bool "Hold current task address in E2 register" 190 bool "Hold current task address in E2 register"
202 default y 191 default y
diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts
index a1ae4d6ec990..72d67564bdfc 100644
--- a/arch/powerpc/boot/dts/sequoia.dts
+++ b/arch/powerpc/boot/dts/sequoia.dts
@@ -342,9 +342,14 @@
342 /* Outbound ranges, one memory and one IO, 342 /* Outbound ranges, one memory and one IO,
343 * later cannot be changed. Chip supports a second 343 * later cannot be changed. Chip supports a second
344 * IO range but we don't use it for now 344 * IO range but we don't use it for now
345 * From the 440EPx user manual:
346 * PCI 1 Memory 1 8000 0000 1 BFFF FFFF 1GB
347 * I/O 1 E800 0000 1 E800 FFFF 64KB
348 * I/O 1 E880 0000 1 EBFF FFFF 56MB
345 */ 349 */
346 ranges = <02000000 0 80000000 1 80000000 0 10000000 350 ranges = <02000000 0 80000000 1 80000000 0 40000000
347 01000000 0 00000000 1 e8000000 0 00100000>; 351 01000000 0 00000000 1 e8000000 0 00010000
352 01000000 0 00000000 1 e8800000 0 03800000>;
348 353
349 /* Inbound 2GB range starting at 0 */ 354 /* Inbound 2GB range starting at 0 */
350 dma-ranges = <42000000 0 0 0 0 0 80000000>; 355 dma-ranges = <42000000 0 0 0 0 0 80000000>;
diff --git a/arch/powerpc/kernel/btext.c b/arch/powerpc/kernel/btext.c
index 9f9377745490..d8f0329b1344 100644
--- a/arch/powerpc/kernel/btext.c
+++ b/arch/powerpc/kernel/btext.c
@@ -16,7 +16,6 @@
16#include <asm/mmu.h> 16#include <asm/mmu.h>
17#include <asm/pgtable.h> 17#include <asm/pgtable.h>
18#include <asm/io.h> 18#include <asm/io.h>
19#include <asm/prom.h>
20#include <asm/processor.h> 19#include <asm/processor.h>
21#include <asm/udbg.h> 20#include <asm/udbg.h>
22 21
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 36080d4d1922..81738a4b3c3a 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1208,6 +1208,18 @@ static struct cpu_spec __initdata cpu_specs[] = {
1208 .machine_check = machine_check_4xx, 1208 .machine_check = machine_check_4xx,
1209 .platform = "ppc405", 1209 .platform = "ppc405",
1210 }, 1210 },
1211 { /* default match */
1212 .pvr_mask = 0x00000000,
1213 .pvr_value = 0x00000000,
1214 .cpu_name = "(generic 40x PPC)",
1215 .cpu_features = CPU_FTRS_40X,
1216 .cpu_user_features = PPC_FEATURE_32 |
1217 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1218 .icache_bsize = 32,
1219 .dcache_bsize = 32,
1220 .machine_check = machine_check_4xx,
1221 .platform = "ppc405",
1222 }
1211 1223
1212#endif /* CONFIG_40x */ 1224#endif /* CONFIG_40x */
1213#ifdef CONFIG_44x 1225#ifdef CONFIG_44x
@@ -1421,8 +1433,18 @@ static struct cpu_spec __initdata cpu_specs[] = {
1421 .machine_check = machine_check_440A, 1433 .machine_check = machine_check_440A,
1422 .platform = "ppc440", 1434 .platform = "ppc440",
1423 }, 1435 },
1436 { /* default match */
1437 .pvr_mask = 0x00000000,
1438 .pvr_value = 0x00000000,
1439 .cpu_name = "(generic 44x PPC)",
1440 .cpu_features = CPU_FTRS_44X,
1441 .cpu_user_features = COMMON_USER_BOOKE,
1442 .icache_bsize = 32,
1443 .dcache_bsize = 32,
1444 .machine_check = machine_check_4xx,
1445 .platform = "ppc440",
1446 }
1424#endif /* CONFIG_44x */ 1447#endif /* CONFIG_44x */
1425#ifdef CONFIG_FSL_BOOKE
1426#ifdef CONFIG_E200 1448#ifdef CONFIG_E200
1427 { /* e200z5 */ 1449 { /* e200z5 */
1428 .pvr_mask = 0xfff00000, 1450 .pvr_mask = 0xfff00000,
@@ -1451,7 +1473,19 @@ static struct cpu_spec __initdata cpu_specs[] = {
1451 .machine_check = machine_check_e200, 1473 .machine_check = machine_check_e200,
1452 .platform = "ppc5554", 1474 .platform = "ppc5554",
1453 }, 1475 },
1454#elif defined(CONFIG_E500) 1476 { /* default match */
1477 .pvr_mask = 0x00000000,
1478 .pvr_value = 0x00000000,
1479 .cpu_name = "(generic E200 PPC)",
1480 .cpu_features = CPU_FTRS_E200,
1481 .cpu_user_features = COMMON_USER_BOOKE |
1482 PPC_FEATURE_HAS_EFP_SINGLE |
1483 PPC_FEATURE_UNIFIED_CACHE,
1484 .dcache_bsize = 32,
1485 .machine_check = machine_check_e200,
1486 .platform = "ppc5554",
1487#endif /* CONFIG_E200 */
1488#ifdef CONFIG_E500
1455 { /* e500 */ 1489 { /* e500 */
1456 .pvr_mask = 0xffff0000, 1490 .pvr_mask = 0xffff0000,
1457 .pvr_value = 0x80200000, 1491 .pvr_value = 0x80200000,
@@ -1487,20 +1521,19 @@ static struct cpu_spec __initdata cpu_specs[] = {
1487 .machine_check = machine_check_e500, 1521 .machine_check = machine_check_e500,
1488 .platform = "ppc8548", 1522 .platform = "ppc8548",
1489 }, 1523 },
1490#endif
1491#endif
1492#if !CLASSIC_PPC
1493 { /* default match */ 1524 { /* default match */
1494 .pvr_mask = 0x00000000, 1525 .pvr_mask = 0x00000000,
1495 .pvr_value = 0x00000000, 1526 .pvr_value = 0x00000000,
1496 .cpu_name = "(generic PPC)", 1527 .cpu_name = "(generic E500 PPC)",
1497 .cpu_features = CPU_FTRS_GENERIC_32, 1528 .cpu_features = CPU_FTRS_E500,
1498 .cpu_user_features = PPC_FEATURE_32, 1529 .cpu_user_features = COMMON_USER_BOOKE |
1530 PPC_FEATURE_HAS_SPE_COMP |
1531 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1499 .icache_bsize = 32, 1532 .icache_bsize = 32,
1500 .dcache_bsize = 32, 1533 .dcache_bsize = 32,
1534 .machine_check = machine_check_e500,
1501 .platform = "powerpc", 1535 .platform = "powerpc",
1502 } 1536#endif /* CONFIG_E500 */
1503#endif /* !CLASSIC_PPC */
1504#endif /* CONFIG_PPC32 */ 1537#endif /* CONFIG_PPC32 */
1505}; 1538};
1506 1539
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index b84ec6a2fc94..c2b9dc4fce5d 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -653,7 +653,14 @@ finish_tlb_load:
653 rlwimi r10, r11, 0, 26, 26 /* UX = HWEXEC & USER */ 653 rlwimi r10, r11, 0, 26, 26 /* UX = HWEXEC & USER */
654 654
655 rlwimi r12, r10, 0, 26, 31 /* Insert static perms */ 655 rlwimi r12, r10, 0, 26, 31 /* Insert static perms */
656 rlwinm r12, r12, 0, 20, 15 /* Clear U0-U3 */ 656
657 /*
658 * Clear U0-U3 and WL1 IL1I IL1D IL2I IL2D bits which are added
659 * on newer 440 cores like the 440x6 used on AMCC 460EX/460GT (see
660 * include/asm-powerpc/pgtable-ppc32.h for details).
661 */
662 rlwinm r12, r12, 0, 20, 10
663
657 tlbwe r12, r13, PPC44x_TLB_ATTRIB /* Write ATTRIB */ 664 tlbwe r12, r13, PPC44x_TLB_ATTRIB /* Write ATTRIB */
658 665
659 /* Done...restore registers and get out of here. 666 /* Done...restore registers and get out of here.
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 024805e1747d..25e84c0e1166 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -1517,10 +1517,6 @@ _INIT_STATIC(start_here_multiplatform)
1517 addi r2,r2,0x4000 1517 addi r2,r2,0x4000
1518 add r2,r2,r26 1518 add r2,r2,r26
1519 1519
1520 /* Set initial ptr to current */
1521 LOAD_REG_IMMEDIATE(r4, init_task)
1522 std r4,PACACURRENT(r13)
1523
1524 /* Do very early kernel initializations, including initial hash table, 1520 /* Do very early kernel initializations, including initial hash table,
1525 * stab and slb setup before we turn on relocation. */ 1521 * stab and slb setup before we turn on relocation. */
1526 1522
diff --git a/arch/powerpc/kernel/isa-bridge.c b/arch/powerpc/kernel/isa-bridge.c
index 289af348978d..4d5731b2429a 100644
--- a/arch/powerpc/kernel/isa-bridge.c
+++ b/arch/powerpc/kernel/isa-bridge.c
@@ -108,9 +108,6 @@ static void __devinit pci_process_ISA_OF_ranges(struct device_node *isa_node,
108 if (size > 0x10000) 108 if (size > 0x10000)
109 size = 0x10000; 109 size = 0x10000;
110 110
111 printk(KERN_ERR "no ISA IO ranges or unexpected isa range, "
112 "mapping 64k\n");
113
114 __ioremap_at(phb_io_base_phys, (void *)ISA_IO_BASE, 111 __ioremap_at(phb_io_base_phys, (void *)ISA_IO_BASE,
115 size, _PAGE_NO_CACHE|_PAGE_GUARDED); 112 size, _PAGE_NO_CACHE|_PAGE_GUARDED);
116 return; 113 return;
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 25e3fd8606ab..098fd96a394a 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -170,6 +170,8 @@ void __init setup_paca(int cpu)
170 170
171void __init early_setup(unsigned long dt_ptr) 171void __init early_setup(unsigned long dt_ptr)
172{ 172{
173 /* -------- printk is _NOT_ safe to use here ! ------- */
174
173 /* Fill in any unititialised pacas */ 175 /* Fill in any unititialised pacas */
174 initialise_pacas(); 176 initialise_pacas();
175 177
@@ -179,12 +181,14 @@ void __init early_setup(unsigned long dt_ptr)
179 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ 181 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
180 setup_paca(0); 182 setup_paca(0);
181 183
182 /* Enable early debugging if any specified (see udbg.h) */
183 udbg_early_init();
184
185 /* Initialize lockdep early or else spinlocks will blow */ 184 /* Initialize lockdep early or else spinlocks will blow */
186 lockdep_init(); 185 lockdep_init();
187 186
187 /* -------- printk is now safe to use ------- */
188
189 /* Enable early debugging if any specified (see udbg.h) */
190 udbg_early_init();
191
188 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); 192 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
189 193
190 /* 194 /*
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index 04f74f9f9ab6..5bf7df146022 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -35,6 +35,7 @@
35#include <linux/percpu.h> 35#include <linux/percpu.h>
36#include <linux/types.h> 36#include <linux/types.h>
37#include <linux/ioport.h> 37#include <linux/ioport.h>
38#include <linux/kernel_stat.h>
38 39
39#include <asm/io.h> 40#include <asm/io.h>
40#include <asm/pgtable.h> 41#include <asm/pgtable.h>
@@ -231,6 +232,54 @@ static int iic_host_match(struct irq_host *h, struct device_node *node)
231 "IBM,CBEA-Internal-Interrupt-Controller"); 232 "IBM,CBEA-Internal-Interrupt-Controller");
232} 233}
233 234
235extern int noirqdebug;
236
237static void handle_iic_irq(unsigned int irq, struct irq_desc *desc)
238{
239 const unsigned int cpu = smp_processor_id();
240
241 spin_lock(&desc->lock);
242
243 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
244
245 /*
246 * If we're currently running this IRQ, or its disabled,
247 * we shouldn't process the IRQ. Mark it pending, handle
248 * the necessary masking and go out
249 */
250 if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
251 !desc->action)) {
252 desc->status |= IRQ_PENDING;
253 goto out_eoi;
254 }
255
256 kstat_cpu(cpu).irqs[irq]++;
257
258 /* Mark the IRQ currently in progress.*/
259 desc->status |= IRQ_INPROGRESS;
260
261 do {
262 struct irqaction *action = desc->action;
263 irqreturn_t action_ret;
264
265 if (unlikely(!action))
266 goto out_eoi;
267
268 desc->status &= ~IRQ_PENDING;
269 spin_unlock(&desc->lock);
270 action_ret = handle_IRQ_event(irq, action);
271 if (!noirqdebug)
272 note_interrupt(irq, desc, action_ret);
273 spin_lock(&desc->lock);
274
275 } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
276
277 desc->status &= ~IRQ_INPROGRESS;
278out_eoi:
279 desc->chip->eoi(irq);
280 spin_unlock(&desc->lock);
281}
282
234static int iic_host_map(struct irq_host *h, unsigned int virq, 283static int iic_host_map(struct irq_host *h, unsigned int virq,
235 irq_hw_number_t hw) 284 irq_hw_number_t hw)
236{ 285{
@@ -240,10 +289,10 @@ static int iic_host_map(struct irq_host *h, unsigned int virq,
240 break; 289 break;
241 case IIC_IRQ_TYPE_IOEXC: 290 case IIC_IRQ_TYPE_IOEXC:
242 set_irq_chip_and_handler(virq, &iic_ioexc_chip, 291 set_irq_chip_and_handler(virq, &iic_ioexc_chip,
243 handle_fasteoi_irq); 292 handle_iic_irq);
244 break; 293 break;
245 default: 294 default:
246 set_irq_chip_and_handler(virq, &iic_chip, handle_fasteoi_irq); 295 set_irq_chip_and_handler(virq, &iic_chip, handle_iic_irq);
247 } 296 }
248 return 0; 297 return 0;
249} 298}
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index 6bab44b7716b..70c660121ec4 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -141,6 +141,10 @@ static void spu_restart_dma(struct spu *spu)
141 141
142 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags)) 142 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
143 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND); 143 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
144 else {
145 set_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags);
146 mb();
147 }
144} 148}
145 149
146static inline void spu_load_slb(struct spu *spu, int slbe, struct spu_slb *slb) 150static inline void spu_load_slb(struct spu *spu, int slbe, struct spu_slb *slb)
@@ -226,11 +230,13 @@ static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
226 return 0; 230 return 0;
227 } 231 }
228 232
229 spu->class_0_pending = 0; 233 spu->class_1_dar = ea;
230 spu->dar = ea; 234 spu->class_1_dsisr = dsisr;
231 spu->dsisr = dsisr; 235
236 spu->stop_callback(spu, 1);
232 237
233 spu->stop_callback(spu); 238 spu->class_1_dar = 0;
239 spu->class_1_dsisr = 0;
234 240
235 return 0; 241 return 0;
236} 242}
@@ -318,11 +324,15 @@ spu_irq_class_0(int irq, void *data)
318 stat = spu_int_stat_get(spu, 0) & mask; 324 stat = spu_int_stat_get(spu, 0) & mask;
319 325
320 spu->class_0_pending |= stat; 326 spu->class_0_pending |= stat;
321 spu->dsisr = spu_mfc_dsisr_get(spu); 327 spu->class_0_dsisr = spu_mfc_dsisr_get(spu);
322 spu->dar = spu_mfc_dar_get(spu); 328 spu->class_0_dar = spu_mfc_dar_get(spu);
323 spin_unlock(&spu->register_lock); 329 spin_unlock(&spu->register_lock);
324 330
325 spu->stop_callback(spu); 331 spu->stop_callback(spu, 0);
332
333 spu->class_0_pending = 0;
334 spu->class_0_dsisr = 0;
335 spu->class_0_dar = 0;
326 336
327 spu_int_stat_clear(spu, 0, stat); 337 spu_int_stat_clear(spu, 0, stat);
328 338
@@ -363,6 +373,9 @@ spu_irq_class_1(int irq, void *data)
363 if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR) 373 if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR)
364 ; 374 ;
365 375
376 spu->class_1_dsisr = 0;
377 spu->class_1_dar = 0;
378
366 return stat ? IRQ_HANDLED : IRQ_NONE; 379 return stat ? IRQ_HANDLED : IRQ_NONE;
367} 380}
368 381
@@ -396,10 +409,10 @@ spu_irq_class_2(int irq, void *data)
396 spu->ibox_callback(spu); 409 spu->ibox_callback(spu);
397 410
398 if (stat & CLASS2_SPU_STOP_INTR) 411 if (stat & CLASS2_SPU_STOP_INTR)
399 spu->stop_callback(spu); 412 spu->stop_callback(spu, 2);
400 413
401 if (stat & CLASS2_SPU_HALT_INTR) 414 if (stat & CLASS2_SPU_HALT_INTR)
402 spu->stop_callback(spu); 415 spu->stop_callback(spu, 2);
403 416
404 if (stat & CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR) 417 if (stat & CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR)
405 spu->mfc_callback(spu); 418 spu->mfc_callback(spu);
diff --git a/arch/powerpc/platforms/cell/spu_priv1_mmio.c b/arch/powerpc/platforms/cell/spu_priv1_mmio.c
index 67fa7247b80a..906a0a2a9fe1 100644
--- a/arch/powerpc/platforms/cell/spu_priv1_mmio.c
+++ b/arch/powerpc/platforms/cell/spu_priv1_mmio.c
@@ -28,6 +28,7 @@
28#include <linux/io.h> 28#include <linux/io.h>
29#include <linux/mutex.h> 29#include <linux/mutex.h>
30#include <linux/device.h> 30#include <linux/device.h>
31#include <linux/sched.h>
31 32
32#include <asm/spu.h> 33#include <asm/spu.h>
33#include <asm/spu_priv1.h> 34#include <asm/spu_priv1.h>
@@ -75,8 +76,19 @@ static u64 int_stat_get(struct spu *spu, int class)
75 76
76static void cpu_affinity_set(struct spu *spu, int cpu) 77static void cpu_affinity_set(struct spu *spu, int cpu)
77{ 78{
78 u64 target = iic_get_target_id(cpu); 79 u64 target;
79 u64 route = target << 48 | target << 32 | target << 16; 80 u64 route;
81
82 if (nr_cpus_node(spu->node)) {
83 cpumask_t spumask = node_to_cpumask(spu->node);
84 cpumask_t cpumask = node_to_cpumask(cpu_to_node(cpu));
85
86 if (!cpus_intersects(spumask, cpumask))
87 return;
88 }
89
90 target = iic_get_target_id(cpu);
91 route = target << 48 | target << 32 | target << 16;
80 out_be64(&spu->priv1->int_route_RW, route); 92 out_be64(&spu->priv1->int_route_RW, route);
81} 93}
82 94
diff --git a/arch/powerpc/platforms/cell/spufs/fault.c b/arch/powerpc/platforms/cell/spufs/fault.c
index e46d300e21a5..f093a581ac74 100644
--- a/arch/powerpc/platforms/cell/spufs/fault.c
+++ b/arch/powerpc/platforms/cell/spufs/fault.c
@@ -83,13 +83,18 @@ int spufs_handle_class0(struct spu_context *ctx)
83 return 0; 83 return 0;
84 84
85 if (stat & CLASS0_DMA_ALIGNMENT_INTR) 85 if (stat & CLASS0_DMA_ALIGNMENT_INTR)
86 spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_DMA_ALIGNMENT); 86 spufs_handle_event(ctx, ctx->csa.class_0_dar,
87 SPE_EVENT_DMA_ALIGNMENT);
87 88
88 if (stat & CLASS0_INVALID_DMA_COMMAND_INTR) 89 if (stat & CLASS0_INVALID_DMA_COMMAND_INTR)
89 spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_INVALID_DMA); 90 spufs_handle_event(ctx, ctx->csa.class_0_dar,
91 SPE_EVENT_INVALID_DMA);
90 92
91 if (stat & CLASS0_SPU_ERROR_INTR) 93 if (stat & CLASS0_SPU_ERROR_INTR)
92 spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_SPE_ERROR); 94 spufs_handle_event(ctx, ctx->csa.class_0_dar,
95 SPE_EVENT_SPE_ERROR);
96
97 ctx->csa.class_0_pending = 0;
93 98
94 return -EIO; 99 return -EIO;
95} 100}
@@ -119,8 +124,8 @@ int spufs_handle_class1(struct spu_context *ctx)
119 * in time, we can still expect to get the same fault 124 * in time, we can still expect to get the same fault
120 * the immediately after the context restore. 125 * the immediately after the context restore.
121 */ 126 */
122 ea = ctx->csa.dar; 127 ea = ctx->csa.class_1_dar;
123 dsisr = ctx->csa.dsisr; 128 dsisr = ctx->csa.class_1_dsisr;
124 129
125 if (!(dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))) 130 if (!(dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)))
126 return 0; 131 return 0;
@@ -158,7 +163,7 @@ int spufs_handle_class1(struct spu_context *ctx)
158 * time slicing will not preempt the context while the page fault 163 * time slicing will not preempt the context while the page fault
159 * handler is running. Context switch code removes mappings. 164 * handler is running. Context switch code removes mappings.
160 */ 165 */
161 ctx->csa.dar = ctx->csa.dsisr = 0; 166 ctx->csa.class_1_dar = ctx->csa.class_1_dsisr = 0;
162 167
163 /* 168 /*
164 * If we handled the fault successfully and are in runnable 169 * If we handled the fault successfully and are in runnable
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index 0c32a05ab068..f407b2471855 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -23,6 +23,7 @@
23 23
24#include <linux/file.h> 24#include <linux/file.h>
25#include <linux/fs.h> 25#include <linux/fs.h>
26#include <linux/fsnotify.h>
26#include <linux/backing-dev.h> 27#include <linux/backing-dev.h>
27#include <linux/init.h> 28#include <linux/init.h>
28#include <linux/ioctl.h> 29#include <linux/ioctl.h>
@@ -223,7 +224,7 @@ static int spufs_dir_close(struct inode *inode, struct file *file)
223 parent = dir->d_parent->d_inode; 224 parent = dir->d_parent->d_inode;
224 ctx = SPUFS_I(dir->d_inode)->i_ctx; 225 ctx = SPUFS_I(dir->d_inode)->i_ctx;
225 226
226 mutex_lock(&parent->i_mutex); 227 mutex_lock_nested(&parent->i_mutex, I_MUTEX_PARENT);
227 ret = spufs_rmdir(parent, dir); 228 ret = spufs_rmdir(parent, dir);
228 mutex_unlock(&parent->i_mutex); 229 mutex_unlock(&parent->i_mutex);
229 WARN_ON(ret); 230 WARN_ON(ret);
@@ -618,12 +619,15 @@ long spufs_create(struct nameidata *nd, unsigned int flags, mode_t mode,
618 mode &= ~current->fs->umask; 619 mode &= ~current->fs->umask;
619 620
620 if (flags & SPU_CREATE_GANG) 621 if (flags & SPU_CREATE_GANG)
621 return spufs_create_gang(nd->path.dentry->d_inode, 622 ret = spufs_create_gang(nd->path.dentry->d_inode,
622 dentry, nd->path.mnt, mode); 623 dentry, nd->path.mnt, mode);
623 else 624 else
624 return spufs_create_context(nd->path.dentry->d_inode, 625 ret = spufs_create_context(nd->path.dentry->d_inode,
625 dentry, nd->path.mnt, flags, mode, 626 dentry, nd->path.mnt, flags, mode,
626 filp); 627 filp);
628 if (ret >= 0)
629 fsnotify_mkdir(nd->path.dentry->d_inode, dentry);
630 return ret;
627 631
628out_dput: 632out_dput:
629 dput(dentry); 633 dput(dentry);
diff --git a/arch/powerpc/platforms/cell/spufs/run.c b/arch/powerpc/platforms/cell/spufs/run.c
index a9c35b7b719f..b7493b865812 100644
--- a/arch/powerpc/platforms/cell/spufs/run.c
+++ b/arch/powerpc/platforms/cell/spufs/run.c
@@ -11,7 +11,7 @@
11#include "spufs.h" 11#include "spufs.h"
12 12
13/* interrupt-level stop callback function. */ 13/* interrupt-level stop callback function. */
14void spufs_stop_callback(struct spu *spu) 14void spufs_stop_callback(struct spu *spu, int irq)
15{ 15{
16 struct spu_context *ctx = spu->ctx; 16 struct spu_context *ctx = spu->ctx;
17 17
@@ -24,9 +24,19 @@ void spufs_stop_callback(struct spu *spu)
24 */ 24 */
25 if (ctx) { 25 if (ctx) {
26 /* Copy exception arguments into module specific structure */ 26 /* Copy exception arguments into module specific structure */
27 ctx->csa.class_0_pending = spu->class_0_pending; 27 switch(irq) {
28 ctx->csa.dsisr = spu->dsisr; 28 case 0 :
29 ctx->csa.dar = spu->dar; 29 ctx->csa.class_0_pending = spu->class_0_pending;
30 ctx->csa.class_0_dsisr = spu->class_0_dsisr;
31 ctx->csa.class_0_dar = spu->class_0_dar;
32 break;
33 case 1 :
34 ctx->csa.class_1_dsisr = spu->class_1_dsisr;
35 ctx->csa.class_1_dar = spu->class_1_dar;
36 break;
37 case 2 :
38 break;
39 }
30 40
31 /* ensure that the exception status has hit memory before a 41 /* ensure that the exception status has hit memory before a
32 * thread waiting on the context's stop queue is woken */ 42 * thread waiting on the context's stop queue is woken */
@@ -34,11 +44,6 @@ void spufs_stop_callback(struct spu *spu)
34 44
35 wake_up_all(&ctx->stop_wq); 45 wake_up_all(&ctx->stop_wq);
36 } 46 }
37
38 /* Clear callback arguments from spu structure */
39 spu->class_0_pending = 0;
40 spu->dsisr = 0;
41 spu->dar = 0;
42} 47}
43 48
44int spu_stopped(struct spu_context *ctx, u32 *stat) 49int spu_stopped(struct spu_context *ctx, u32 *stat)
@@ -56,7 +61,11 @@ int spu_stopped(struct spu_context *ctx, u32 *stat)
56 if (!(*stat & SPU_STATUS_RUNNING) && (*stat & stopped)) 61 if (!(*stat & SPU_STATUS_RUNNING) && (*stat & stopped))
57 return 1; 62 return 1;
58 63
59 dsisr = ctx->csa.dsisr; 64 dsisr = ctx->csa.class_0_dsisr;
65 if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
66 return 1;
67
68 dsisr = ctx->csa.class_1_dsisr;
60 if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)) 69 if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
61 return 1; 70 return 1;
62 71
@@ -294,7 +303,7 @@ static int spu_process_callback(struct spu_context *ctx)
294 u32 ls_pointer, npc; 303 u32 ls_pointer, npc;
295 void __iomem *ls; 304 void __iomem *ls;
296 long spu_ret; 305 long spu_ret;
297 int ret, ret2; 306 int ret;
298 307
299 /* get syscall block from local store */ 308 /* get syscall block from local store */
300 npc = ctx->ops->npc_read(ctx) & ~3; 309 npc = ctx->ops->npc_read(ctx) & ~3;
@@ -316,11 +325,9 @@ static int spu_process_callback(struct spu_context *ctx)
316 if (spu_ret <= -ERESTARTSYS) { 325 if (spu_ret <= -ERESTARTSYS) {
317 ret = spu_handle_restartsys(ctx, &spu_ret, &npc); 326 ret = spu_handle_restartsys(ctx, &spu_ret, &npc);
318 } 327 }
319 ret2 = spu_acquire(ctx); 328 mutex_lock(&ctx->state_mutex);
320 if (ret == -ERESTARTSYS) 329 if (ret == -ERESTARTSYS)
321 return ret; 330 return ret;
322 if (ret2)
323 return -EINTR;
324 } 331 }
325 332
326 /* need to re-get the ls, as it may have changed when we released the 333 /* need to re-get the ls, as it may have changed when we released the
@@ -343,13 +350,14 @@ long spufs_run_spu(struct spu_context *ctx, u32 *npc, u32 *event)
343 if (mutex_lock_interruptible(&ctx->run_mutex)) 350 if (mutex_lock_interruptible(&ctx->run_mutex))
344 return -ERESTARTSYS; 351 return -ERESTARTSYS;
345 352
346 spu_enable_spu(ctx);
347 ctx->event_return = 0; 353 ctx->event_return = 0;
348 354
349 ret = spu_acquire(ctx); 355 ret = spu_acquire(ctx);
350 if (ret) 356 if (ret)
351 goto out_unlock; 357 goto out_unlock;
352 358
359 spu_enable_spu(ctx);
360
353 spu_update_sched_info(ctx); 361 spu_update_sched_info(ctx);
354 362
355 ret = spu_run_init(ctx, npc); 363 ret = spu_run_init(ctx, npc);
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index 7298e7db2c83..2e411f23462b 100644
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -140,6 +140,9 @@ void __spu_update_sched_info(struct spu_context *ctx)
140 * if it is timesliced or preempted. 140 * if it is timesliced or preempted.
141 */ 141 */
142 ctx->cpus_allowed = current->cpus_allowed; 142 ctx->cpus_allowed = current->cpus_allowed;
143
144 /* Save the current cpu id for spu interrupt routing. */
145 ctx->last_ran = raw_smp_processor_id();
143} 146}
144 147
145void spu_update_sched_info(struct spu_context *ctx) 148void spu_update_sched_info(struct spu_context *ctx)
@@ -243,7 +246,6 @@ static void spu_bind_context(struct spu *spu, struct spu_context *ctx)
243 spu_switch_log_notify(spu, ctx, SWITCH_LOG_START, 0); 246 spu_switch_log_notify(spu, ctx, SWITCH_LOG_START, 0);
244 spu_restore(&ctx->csa, spu); 247 spu_restore(&ctx->csa, spu);
245 spu->timestamp = jiffies; 248 spu->timestamp = jiffies;
246 spu_cpu_affinity_set(spu, raw_smp_processor_id());
247 spu_switch_notify(spu, ctx); 249 spu_switch_notify(spu, ctx);
248 ctx->state = SPU_STATE_RUNNABLE; 250 ctx->state = SPU_STATE_RUNNABLE;
249 251
@@ -657,7 +659,8 @@ static struct spu *find_victim(struct spu_context *ctx)
657 659
658 victim->stats.invol_ctx_switch++; 660 victim->stats.invol_ctx_switch++;
659 spu->stats.invol_ctx_switch++; 661 spu->stats.invol_ctx_switch++;
660 spu_add_to_rq(victim); 662 if (test_bit(SPU_SCHED_SPU_RUN, &ctx->sched_flags))
663 spu_add_to_rq(victim);
661 664
662 mutex_unlock(&victim->state_mutex); 665 mutex_unlock(&victim->state_mutex);
663 666
diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h
index 7312745b7540..454c277c1457 100644
--- a/arch/powerpc/platforms/cell/spufs/spufs.h
+++ b/arch/powerpc/platforms/cell/spufs/spufs.h
@@ -121,6 +121,7 @@ struct spu_context {
121 cpumask_t cpus_allowed; 121 cpumask_t cpus_allowed;
122 int policy; 122 int policy;
123 int prio; 123 int prio;
124 int last_ran;
124 125
125 /* statistics */ 126 /* statistics */
126 struct { 127 struct {
@@ -331,7 +332,7 @@ size_t spu_ibox_read(struct spu_context *ctx, u32 *data);
331/* irq callback funcs. */ 332/* irq callback funcs. */
332void spufs_ibox_callback(struct spu *spu); 333void spufs_ibox_callback(struct spu *spu);
333void spufs_wbox_callback(struct spu *spu); 334void spufs_wbox_callback(struct spu *spu);
334void spufs_stop_callback(struct spu *spu); 335void spufs_stop_callback(struct spu *spu, int irq);
335void spufs_mfc_callback(struct spu *spu); 336void spufs_mfc_callback(struct spu *spu);
336void spufs_dma_callback(struct spu *spu, int type); 337void spufs_dma_callback(struct spu *spu, int type);
337 338
diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c
index d2a1249d36dd..3df9a36eb2f5 100644
--- a/arch/powerpc/platforms/cell/spufs/switch.c
+++ b/arch/powerpc/platforms/cell/spufs/switch.c
@@ -132,6 +132,14 @@ static inline void disable_interrupts(struct spu_state *csa, struct spu *spu)
132 spu_int_mask_set(spu, 2, 0ul); 132 spu_int_mask_set(spu, 2, 0ul);
133 eieio(); 133 eieio();
134 spin_unlock_irq(&spu->register_lock); 134 spin_unlock_irq(&spu->register_lock);
135
136 /*
137 * This flag needs to be set before calling synchronize_irq so
138 * that the update will be visible to the relevant handlers
139 * via a simple load.
140 */
141 set_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
142 clear_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags);
135 synchronize_irq(spu->irqs[0]); 143 synchronize_irq(spu->irqs[0]);
136 synchronize_irq(spu->irqs[1]); 144 synchronize_irq(spu->irqs[1]);
137 synchronize_irq(spu->irqs[2]); 145 synchronize_irq(spu->irqs[2]);
@@ -166,9 +174,8 @@ static inline void set_switch_pending(struct spu_state *csa, struct spu *spu)
166 /* Save, Step 7: 174 /* Save, Step 7:
167 * Restore, Step 5: 175 * Restore, Step 5:
168 * Set a software context switch pending flag. 176 * Set a software context switch pending flag.
177 * Done above in Step 3 - disable_interrupts().
169 */ 178 */
170 set_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
171 mb();
172} 179}
173 180
174static inline void save_mfc_cntl(struct spu_state *csa, struct spu *spu) 181static inline void save_mfc_cntl(struct spu_state *csa, struct spu *spu)
@@ -186,20 +193,21 @@ static inline void save_mfc_cntl(struct spu_state *csa, struct spu *spu)
186 MFC_CNTL_SUSPEND_COMPLETE); 193 MFC_CNTL_SUSPEND_COMPLETE);
187 /* fall through */ 194 /* fall through */
188 case MFC_CNTL_SUSPEND_COMPLETE: 195 case MFC_CNTL_SUSPEND_COMPLETE:
189 if (csa) { 196 if (csa)
190 csa->priv2.mfc_control_RW = 197 csa->priv2.mfc_control_RW =
191 MFC_CNTL_SUSPEND_MASK | 198 in_be64(&priv2->mfc_control_RW) |
192 MFC_CNTL_SUSPEND_DMA_QUEUE; 199 MFC_CNTL_SUSPEND_DMA_QUEUE;
193 }
194 break; 200 break;
195 case MFC_CNTL_NORMAL_DMA_QUEUE_OPERATION: 201 case MFC_CNTL_NORMAL_DMA_QUEUE_OPERATION:
196 out_be64(&priv2->mfc_control_RW, MFC_CNTL_SUSPEND_DMA_QUEUE); 202 out_be64(&priv2->mfc_control_RW, MFC_CNTL_SUSPEND_DMA_QUEUE);
197 POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) & 203 POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) &
198 MFC_CNTL_SUSPEND_DMA_STATUS_MASK) == 204 MFC_CNTL_SUSPEND_DMA_STATUS_MASK) ==
199 MFC_CNTL_SUSPEND_COMPLETE); 205 MFC_CNTL_SUSPEND_COMPLETE);
200 if (csa) { 206 if (csa)
201 csa->priv2.mfc_control_RW = 0; 207 csa->priv2.mfc_control_RW =
202 } 208 in_be64(&priv2->mfc_control_RW) &
209 ~MFC_CNTL_SUSPEND_DMA_QUEUE &
210 ~MFC_CNTL_SUSPEND_MASK;
203 break; 211 break;
204 } 212 }
205} 213}
@@ -249,16 +257,21 @@ static inline void save_spu_status(struct spu_state *csa, struct spu *spu)
249 } 257 }
250} 258}
251 259
252static inline void save_mfc_decr(struct spu_state *csa, struct spu *spu) 260static inline void save_mfc_stopped_status(struct spu_state *csa,
261 struct spu *spu)
253{ 262{
254 struct spu_priv2 __iomem *priv2 = spu->priv2; 263 struct spu_priv2 __iomem *priv2 = spu->priv2;
264 const u64 mask = MFC_CNTL_DECREMENTER_RUNNING |
265 MFC_CNTL_DMA_QUEUES_EMPTY;
255 266
256 /* Save, Step 12: 267 /* Save, Step 12:
257 * Read MFC_CNTL[Ds]. Update saved copy of 268 * Read MFC_CNTL[Ds]. Update saved copy of
258 * CSA.MFC_CNTL[Ds]. 269 * CSA.MFC_CNTL[Ds].
270 *
271 * update: do the same with MFC_CNTL[Q].
259 */ 272 */
260 csa->priv2.mfc_control_RW |= 273 csa->priv2.mfc_control_RW &= ~mask;
261 in_be64(&priv2->mfc_control_RW) & MFC_CNTL_DECREMENTER_RUNNING; 274 csa->priv2.mfc_control_RW |= in_be64(&priv2->mfc_control_RW) & mask;
262} 275}
263 276
264static inline void halt_mfc_decr(struct spu_state *csa, struct spu *spu) 277static inline void halt_mfc_decr(struct spu_state *csa, struct spu *spu)
@@ -462,7 +475,9 @@ static inline void purge_mfc_queue(struct spu_state *csa, struct spu *spu)
462 * Restore, Step 14. 475 * Restore, Step 14.
463 * Write MFC_CNTL[Pc]=1 (purge queue). 476 * Write MFC_CNTL[Pc]=1 (purge queue).
464 */ 477 */
465 out_be64(&priv2->mfc_control_RW, MFC_CNTL_PURGE_DMA_REQUEST); 478 out_be64(&priv2->mfc_control_RW,
479 MFC_CNTL_PURGE_DMA_REQUEST |
480 MFC_CNTL_SUSPEND_MASK);
466 eieio(); 481 eieio();
467} 482}
468 483
@@ -725,10 +740,14 @@ static inline void set_switch_active(struct spu_state *csa, struct spu *spu)
725 /* Save, Step 48: 740 /* Save, Step 48:
726 * Restore, Step 23. 741 * Restore, Step 23.
727 * Change the software context switch pending flag 742 * Change the software context switch pending flag
728 * to context switch active. 743 * to context switch active. This implementation does
744 * not uses a switch active flag.
729 * 745 *
730 * This implementation does not uses a switch active flag. 746 * Now that we have saved the mfc in the csa, we can add in the
747 * restart command if an exception occurred.
731 */ 748 */
749 if (test_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags))
750 csa->priv2.mfc_control_RW |= MFC_CNTL_RESTART_DMA_COMMAND;
732 clear_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags); 751 clear_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
733 mb(); 752 mb();
734} 753}
@@ -1690,6 +1709,13 @@ static inline void restore_mfc_sr1(struct spu_state *csa, struct spu *spu)
1690 eieio(); 1709 eieio();
1691} 1710}
1692 1711
1712static inline void set_int_route(struct spu_state *csa, struct spu *spu)
1713{
1714 struct spu_context *ctx = spu->ctx;
1715
1716 spu_cpu_affinity_set(spu, ctx->last_ran);
1717}
1718
1693static inline void restore_other_spu_access(struct spu_state *csa, 1719static inline void restore_other_spu_access(struct spu_state *csa,
1694 struct spu *spu) 1720 struct spu *spu)
1695{ 1721{
@@ -1721,15 +1747,15 @@ static inline void restore_mfc_cntl(struct spu_state *csa, struct spu *spu)
1721 */ 1747 */
1722 out_be64(&priv2->mfc_control_RW, csa->priv2.mfc_control_RW); 1748 out_be64(&priv2->mfc_control_RW, csa->priv2.mfc_control_RW);
1723 eieio(); 1749 eieio();
1750
1724 /* 1751 /*
1725 * FIXME: this is to restart a DMA that we were processing 1752 * The queue is put back into the same state that was evident prior to
1726 * before the save. better remember the fault information 1753 * the context switch. The suspend flag is added to the saved state in
1727 * in the csa instead. 1754 * the csa, if the operational state was suspending or suspended. In
1755 * this case, the code that suspended the mfc is responsible for
1756 * continuing it. Note that SPE faults do not change the operational
1757 * state of the spu.
1728 */ 1758 */
1729 if ((csa->priv2.mfc_control_RW & MFC_CNTL_SUSPEND_DMA_QUEUE_MASK)) {
1730 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
1731 eieio();
1732 }
1733} 1759}
1734 1760
1735static inline void enable_user_access(struct spu_state *csa, struct spu *spu) 1761static inline void enable_user_access(struct spu_state *csa, struct spu *spu)
@@ -1788,7 +1814,7 @@ static int quiece_spu(struct spu_state *prev, struct spu *spu)
1788 save_spu_runcntl(prev, spu); /* Step 9. */ 1814 save_spu_runcntl(prev, spu); /* Step 9. */
1789 save_mfc_sr1(prev, spu); /* Step 10. */ 1815 save_mfc_sr1(prev, spu); /* Step 10. */
1790 save_spu_status(prev, spu); /* Step 11. */ 1816 save_spu_status(prev, spu); /* Step 11. */
1791 save_mfc_decr(prev, spu); /* Step 12. */ 1817 save_mfc_stopped_status(prev, spu); /* Step 12. */
1792 halt_mfc_decr(prev, spu); /* Step 13. */ 1818 halt_mfc_decr(prev, spu); /* Step 13. */
1793 save_timebase(prev, spu); /* Step 14. */ 1819 save_timebase(prev, spu); /* Step 14. */
1794 remove_other_spu_access(prev, spu); /* Step 15. */ 1820 remove_other_spu_access(prev, spu); /* Step 15. */
@@ -2000,6 +2026,7 @@ static void restore_csa(struct spu_state *next, struct spu *spu)
2000 check_ppuint_mb_stat(next, spu); /* Step 67. */ 2026 check_ppuint_mb_stat(next, spu); /* Step 67. */
2001 spu_invalidate_slbs(spu); /* Modified Step 68. */ 2027 spu_invalidate_slbs(spu); /* Modified Step 68. */
2002 restore_mfc_sr1(next, spu); /* Step 69. */ 2028 restore_mfc_sr1(next, spu); /* Step 69. */
2029 set_int_route(next, spu); /* NEW */
2003 restore_other_spu_access(next, spu); /* Step 70. */ 2030 restore_other_spu_access(next, spu); /* Step 70. */
2004 restore_spu_runcntl(next, spu); /* Step 71. */ 2031 restore_spu_runcntl(next, spu); /* Step 71. */
2005 restore_mfc_cntl(next, spu); /* Step 72. */ 2032 restore_mfc_cntl(next, spu); /* Step 72. */
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index 1814adbd2236..b4a54c52e880 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -1387,28 +1387,59 @@ static void __init ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port,
1387 resource_size_t size = res->end - res->start + 1; 1387 resource_size_t size = res->end - res->start + 1;
1388 u64 sa; 1388 u64 sa;
1389 1389
1390 /* Calculate window size */ 1390 if (port->endpoint) {
1391 sa = (0xffffffffffffffffull << ilog2(size));; 1391 resource_size_t ep_addr = 0;
1392 if (res->flags & IORESOURCE_PREFETCH) 1392 resource_size_t ep_size = 32 << 20;
1393 sa |= 0x8; 1393
1394 /* Currently we map a fixed 64MByte window to PLB address
1395 * 0 (SDRAM). This should probably be configurable via a dts
1396 * property.
1397 */
1398
1399 /* Calculate window size */
1400 sa = (0xffffffffffffffffull << ilog2(ep_size));;
1401
1402 /* Setup BAR0 */
1403 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
1404 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa) |
1405 PCI_BASE_ADDRESS_MEM_TYPE_64);
1394 1406
1395 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa)); 1407 /* Disable BAR1 & BAR2 */
1396 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa)); 1408 out_le32(mbase + PECFG_BAR1MPA, 0);
1409 out_le32(mbase + PECFG_BAR2HMPA, 0);
1410 out_le32(mbase + PECFG_BAR2LMPA, 0);
1397 1411
1398 /* The setup of the split looks weird to me ... let's see if it works */ 1412 out_le32(mbase + PECFG_PIM01SAH, RES_TO_U32_HIGH(sa));
1399 out_le32(mbase + PECFG_PIM0LAL, 0x00000000); 1413 out_le32(mbase + PECFG_PIM01SAL, RES_TO_U32_LOW(sa));
1400 out_le32(mbase + PECFG_PIM0LAH, 0x00000000); 1414
1401 out_le32(mbase + PECFG_PIM1LAL, 0x00000000); 1415 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(ep_addr));
1402 out_le32(mbase + PECFG_PIM1LAH, 0x00000000); 1416 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(ep_addr));
1403 out_le32(mbase + PECFG_PIM01SAH, 0xffff0000); 1417 } else {
1404 out_le32(mbase + PECFG_PIM01SAL, 0x00000000); 1418 /* Calculate window size */
1419 sa = (0xffffffffffffffffull << ilog2(size));;
1420 if (res->flags & IORESOURCE_PREFETCH)
1421 sa |= 0x8;
1422
1423 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
1424 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa));
1425
1426 /* The setup of the split looks weird to me ... let's see
1427 * if it works
1428 */
1429 out_le32(mbase + PECFG_PIM0LAL, 0x00000000);
1430 out_le32(mbase + PECFG_PIM0LAH, 0x00000000);
1431 out_le32(mbase + PECFG_PIM1LAL, 0x00000000);
1432 out_le32(mbase + PECFG_PIM1LAH, 0x00000000);
1433 out_le32(mbase + PECFG_PIM01SAH, 0xffff0000);
1434 out_le32(mbase + PECFG_PIM01SAL, 0x00000000);
1435
1436 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start));
1437 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start));
1438 }
1405 1439
1406 /* Enable inbound mapping */ 1440 /* Enable inbound mapping */
1407 out_le32(mbase + PECFG_PIMEN, 0x1); 1441 out_le32(mbase + PECFG_PIMEN, 0x1);
1408 1442
1409 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start));
1410 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start));
1411
1412 /* Enable I/O, Mem, and Busmaster cycles */ 1443 /* Enable I/O, Mem, and Busmaster cycles */
1413 out_le16(mbase + PCI_COMMAND, 1444 out_le16(mbase + PCI_COMMAND,
1414 in_le16(mbase + PCI_COMMAND) | 1445 in_le16(mbase + PCI_COMMAND) |
@@ -1422,13 +1453,8 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
1422 const int *bus_range; 1453 const int *bus_range;
1423 int primary = 0, busses; 1454 int primary = 0, busses;
1424 void __iomem *mbase = NULL, *cfg_data = NULL; 1455 void __iomem *mbase = NULL, *cfg_data = NULL;
1425 1456 const u32 *pval;
1426 /* XXX FIXME: Handle endpoint mode properly */ 1457 u32 val;
1427 if (port->endpoint) {
1428 printk(KERN_WARNING "PCIE%d: Port in endpoint mode !\n",
1429 port->index);
1430 return;
1431 }
1432 1458
1433 /* Check if primary bridge */ 1459 /* Check if primary bridge */
1434 if (of_get_property(port->node, "primary", NULL)) 1460 if (of_get_property(port->node, "primary", NULL))
@@ -1462,21 +1488,30 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
1462 hose->last_busno = hose->first_busno + busses; 1488 hose->last_busno = hose->first_busno + busses;
1463 } 1489 }
1464 1490
1465 /* We map the external config space in cfg_data and the host config 1491 if (!port->endpoint) {
1466 * space in cfg_addr. External space is 1M per bus, internal space 1492 /* Only map the external config space in cfg_data for
1467 * is 4K 1493 * PCIe root-complexes. External space is 1M per bus
1494 */
1495 cfg_data = ioremap(port->cfg_space.start +
1496 (hose->first_busno + 1) * 0x100000,
1497 busses * 0x100000);
1498 if (cfg_data == NULL) {
1499 printk(KERN_ERR "%s: Can't map external config space !",
1500 port->node->full_name);
1501 goto fail;
1502 }
1503 hose->cfg_data = cfg_data;
1504 }
1505
1506 /* Always map the host config space in cfg_addr.
1507 * Internal space is 4K
1468 */ 1508 */
1469 cfg_data = ioremap(port->cfg_space.start +
1470 (hose->first_busno + 1) * 0x100000,
1471 busses * 0x100000);
1472 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000); 1509 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000);
1473 if (cfg_data == NULL || mbase == NULL) { 1510 if (mbase == NULL) {
1474 printk(KERN_ERR "%s: Can't map config space !", 1511 printk(KERN_ERR "%s: Can't map internal config space !",
1475 port->node->full_name); 1512 port->node->full_name);
1476 goto fail; 1513 goto fail;
1477 } 1514 }
1478
1479 hose->cfg_data = cfg_data;
1480 hose->cfg_addr = mbase; 1515 hose->cfg_addr = mbase;
1481 1516
1482 pr_debug("PCIE %s, bus %d..%d\n", port->node->full_name, 1517 pr_debug("PCIE %s, bus %d..%d\n", port->node->full_name,
@@ -1489,12 +1524,14 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
1489 port->hose = hose; 1524 port->hose = hose;
1490 mbase = (void __iomem *)hose->cfg_addr; 1525 mbase = (void __iomem *)hose->cfg_addr;
1491 1526
1492 /* 1527 if (!port->endpoint) {
1493 * Set bus numbers on our root port 1528 /*
1494 */ 1529 * Set bus numbers on our root port
1495 out_8(mbase + PCI_PRIMARY_BUS, hose->first_busno); 1530 */
1496 out_8(mbase + PCI_SECONDARY_BUS, hose->first_busno + 1); 1531 out_8(mbase + PCI_PRIMARY_BUS, hose->first_busno);
1497 out_8(mbase + PCI_SUBORDINATE_BUS, hose->last_busno); 1532 out_8(mbase + PCI_SECONDARY_BUS, hose->first_busno + 1);
1533 out_8(mbase + PCI_SUBORDINATE_BUS, hose->last_busno);
1534 }
1498 1535
1499 /* 1536 /*
1500 * OMRs are already reset, also disable PIMs 1537 * OMRs are already reset, also disable PIMs
@@ -1515,17 +1552,49 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
1515 ppc4xx_configure_pciex_PIMs(port, hose, mbase, &dma_window); 1552 ppc4xx_configure_pciex_PIMs(port, hose, mbase, &dma_window);
1516 1553
1517 /* The root complex doesn't show up if we don't set some vendor 1554 /* The root complex doesn't show up if we don't set some vendor
1518 * and device IDs into it. Those are the same bogus one that the 1555 * and device IDs into it. The defaults below are the same bogus
1519 * initial code in arch/ppc add. We might want to change that. 1556 * one that the initial code in arch/ppc had. This can be
1557 * overwritten by setting the "vendor-id/device-id" properties
1558 * in the pciex node.
1520 */ 1559 */
1521 out_le16(mbase + 0x200, 0xaaa0 + port->index);
1522 out_le16(mbase + 0x202, 0xbed0 + port->index);
1523 1560
1524 /* Set Class Code to PCI-PCI bridge and Revision Id to 1 */ 1561 /* Get the (optional) vendor-/device-id from the device-tree */
1525 out_le32(mbase + 0x208, 0x06040001); 1562 pval = of_get_property(port->node, "vendor-id", NULL);
1563 if (pval) {
1564 val = *pval;
1565 } else {
1566 if (!port->endpoint)
1567 val = 0xaaa0 + port->index;
1568 else
1569 val = 0xeee0 + port->index;
1570 }
1571 out_le16(mbase + 0x200, val);
1572
1573 pval = of_get_property(port->node, "device-id", NULL);
1574 if (pval) {
1575 val = *pval;
1576 } else {
1577 if (!port->endpoint)
1578 val = 0xbed0 + port->index;
1579 else
1580 val = 0xfed0 + port->index;
1581 }
1582 out_le16(mbase + 0x202, val);
1583
1584 if (!port->endpoint) {
1585 /* Set Class Code to PCI-PCI bridge and Revision Id to 1 */
1586 out_le32(mbase + 0x208, 0x06040001);
1587
1588 printk(KERN_INFO "PCIE%d: successfully set as root-complex\n",
1589 port->index);
1590 } else {
1591 /* Set Class Code to Processor/PPC */
1592 out_le32(mbase + 0x208, 0x0b200001);
1593
1594 printk(KERN_INFO "PCIE%d: successfully set as endpoint\n",
1595 port->index);
1596 }
1526 1597
1527 printk(KERN_INFO "PCIE%d: successfully set as root-complex\n",
1528 port->index);
1529 return; 1598 return;
1530 fail: 1599 fail:
1531 if (hose) 1600 if (hose)
@@ -1542,6 +1611,7 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np)
1542 const u32 *pval; 1611 const u32 *pval;
1543 int portno; 1612 int portno;
1544 unsigned int dcrs; 1613 unsigned int dcrs;
1614 const char *val;
1545 1615
1546 /* First, proceed to core initialization as we assume there's 1616 /* First, proceed to core initialization as we assume there's
1547 * only one PCIe core in the system 1617 * only one PCIe core in the system
@@ -1573,8 +1643,20 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np)
1573 } 1643 }
1574 port->sdr_base = *pval; 1644 port->sdr_base = *pval;
1575 1645
1576 /* XXX Currently, we only support root complex mode */ 1646 /* Check if device_type property is set to "pci" or "pci-endpoint".
1577 port->endpoint = 0; 1647 * Resulting from this setup this PCIe port will be configured
1648 * as root-complex or as endpoint.
1649 */
1650 val = of_get_property(port->node, "device_type", NULL);
1651 if (!strcmp(val, "pci-endpoint")) {
1652 port->endpoint = 1;
1653 } else if (!strcmp(val, "pci")) {
1654 port->endpoint = 0;
1655 } else {
1656 printk(KERN_ERR "PCIE: missing or incorrect device_type for %s\n",
1657 np->full_name);
1658 return;
1659 }
1578 1660
1579 /* Fetch config space registers address */ 1661 /* Fetch config space registers address */
1580 if (of_address_to_resource(np, 0, &port->cfg_space)) { 1662 if (of_address_to_resource(np, 0, &port->cfg_space)) {
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 52c74780f403..1702de9395ee 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -2842,9 +2842,11 @@ static void dump_spu_fields(struct spu *spu)
2842 DUMP_FIELD(spu, "0x%lx", ls_size); 2842 DUMP_FIELD(spu, "0x%lx", ls_size);
2843 DUMP_FIELD(spu, "0x%x", node); 2843 DUMP_FIELD(spu, "0x%x", node);
2844 DUMP_FIELD(spu, "0x%lx", flags); 2844 DUMP_FIELD(spu, "0x%lx", flags);
2845 DUMP_FIELD(spu, "0x%lx", dar);
2846 DUMP_FIELD(spu, "0x%lx", dsisr);
2847 DUMP_FIELD(spu, "%d", class_0_pending); 2845 DUMP_FIELD(spu, "%d", class_0_pending);
2846 DUMP_FIELD(spu, "0x%lx", class_0_dar);
2847 DUMP_FIELD(spu, "0x%lx", class_0_dsisr);
2848 DUMP_FIELD(spu, "0x%lx", class_1_dar);
2849 DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
2848 DUMP_FIELD(spu, "0x%lx", irqs[0]); 2850 DUMP_FIELD(spu, "0x%lx", irqs[0]);
2849 DUMP_FIELD(spu, "0x%lx", irqs[1]); 2851 DUMP_FIELD(spu, "0x%lx", irqs[1]);
2850 DUMP_FIELD(spu, "0x%lx", irqs[2]); 2852 DUMP_FIELD(spu, "0x%lx", irqs[2]);
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 6a679c3e15e8..8a68160079a9 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -448,14 +448,6 @@ config SH_DREAMCAST
448 Select Dreamcast if configuring for a SEGA Dreamcast. 448 Select Dreamcast if configuring for a SEGA Dreamcast.
449 More information at <http://www.linux-sh.org> 449 More information at <http://www.linux-sh.org>
450 450
451config SH_MPC1211
452 bool "Interface MPC1211"
453 depends on CPU_SUBTYPE_SH7751 && BROKEN
454 help
455 CTP/PCI-SH02 is a CPU module computer that is produced
456 by Interface Corporation.
457 More information at <http://www.interface.co.jp>
458
459config SH_SH03 451config SH_SH03
460 bool "Interface CTP/PCI-SH03" 452 bool "Interface CTP/PCI-SH03"
461 depends on CPU_SUBTYPE_SH7751 453 depends on CPU_SUBTYPE_SH7751
@@ -657,8 +649,7 @@ source "arch/sh/drivers/Kconfig"
657endmenu 649endmenu
658 650
659config ISA_DMA_API 651config ISA_DMA_API
660 def_bool y 652 bool
661 depends on SH_MPC1211
662 653
663menu "Kernel features" 654menu "Kernel features"
664 655
@@ -666,7 +657,7 @@ source kernel/Kconfig.hz
666 657
667config KEXEC 658config KEXEC
668 bool "kexec system call (EXPERIMENTAL)" 659 bool "kexec system call (EXPERIMENTAL)"
669 depends on EXPERIMENTAL 660 depends on SUPERH32 && EXPERIMENTAL
670 help 661 help
671 kexec is a system call that implements the ability to shutdown your 662 kexec is a system call that implements the ability to shutdown your
672 current kernel, and to start another kernel. It is like a reboot 663 current kernel, and to start another kernel. It is like a reboot
@@ -683,7 +674,7 @@ config KEXEC
683 674
684config CRASH_DUMP 675config CRASH_DUMP
685 bool "kernel crash dumps (EXPERIMENTAL)" 676 bool "kernel crash dumps (EXPERIMENTAL)"
686 depends on EXPERIMENTAL 677 depends on SUPERH32 && EXPERIMENTAL
687 help 678 help
688 Generate crash dump after being started by kexec. 679 Generate crash dump after being started by kexec.
689 This should be normally only set in special crash dump kernels 680 This should be normally only set in special crash dump kernels
@@ -763,7 +754,7 @@ menu "Boot options"
763 754
764config ZERO_PAGE_OFFSET 755config ZERO_PAGE_OFFSET
765 hex "Zero page offset" 756 hex "Zero page offset"
766 default "0x00004000" if SH_MPC1211 || SH_SH03 757 default "0x00004000" if SH_SH03
767 default "0x00010000" if PAGE_SIZE_64KB 758 default "0x00010000" if PAGE_SIZE_64KB
768 default "0x00002000" if PAGE_SIZE_8KB 759 default "0x00002000" if PAGE_SIZE_8KB
769 default "0x00001000" 760 default "0x00001000"
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index d9d28f9dd0db..0d2ef1e9a6fd 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -7,6 +7,7 @@ source "lib/Kconfig.debug"
7 7
8config SH_STANDARD_BIOS 8config SH_STANDARD_BIOS
9 bool "Use LinuxSH standard BIOS" 9 bool "Use LinuxSH standard BIOS"
10 depends on SUPERH32
10 help 11 help
11 Say Y here if your target has the gdb-sh-stub 12 Say Y here if your target has the gdb-sh-stub
12 package from www.m17n.org (or any conforming standard LinuxSH BIOS) 13 package from www.m17n.org (or any conforming standard LinuxSH BIOS)
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index bb06f83e6239..8050b03d51fc 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -110,7 +110,6 @@ machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) += se/7343
110machdir-$(CONFIG_SH_7721_SOLUTION_ENGINE) += se/7721 110machdir-$(CONFIG_SH_7721_SOLUTION_ENGINE) += se/7721
111machdir-$(CONFIG_SH_HP6XX) += hp6xx 111machdir-$(CONFIG_SH_HP6XX) += hp6xx
112machdir-$(CONFIG_SH_DREAMCAST) += dreamcast 112machdir-$(CONFIG_SH_DREAMCAST) += dreamcast
113machdir-$(CONFIG_SH_MPC1211) += mpc1211
114machdir-$(CONFIG_SH_SH03) += sh03 113machdir-$(CONFIG_SH_SH03) += sh03
115machdir-$(CONFIG_SH_SECUREEDGE5410) += snapgear 114machdir-$(CONFIG_SH_SECUREEDGE5410) += snapgear
116machdir-$(CONFIG_SH_RTS7751R2D) += renesas/rts7751r2d 115machdir-$(CONFIG_SH_RTS7751R2D) += renesas/rts7751r2d
diff --git a/arch/sh/boards/mpc1211/Makefile b/arch/sh/boards/mpc1211/Makefile
deleted file mode 100644
index 8cd31b5d200b..000000000000
--- a/arch/sh/boards/mpc1211/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Makefile for the Interface (CTP/PCI/MPC-SH02) specific parts of the kernel
3#
4
5obj-y := setup.o rtc.o
6
7obj-$(CONFIG_PCI) += pci.o
8
diff --git a/arch/sh/boards/mpc1211/pci.c b/arch/sh/boards/mpc1211/pci.c
deleted file mode 100644
index 23849f70f133..000000000000
--- a/arch/sh/boards/mpc1211/pci.c
+++ /dev/null
@@ -1,295 +0,0 @@
1/*
2 * Low-Level PCI Support for the MPC-1211(CTP/PCI/MPC-SH02)
3 *
4 * (c) 2002-2003 Saito.K & Jeanne
5 *
6 * Dustin McIntire (dustin@sensoria.com)
7 * Derived from arch/i386/kernel/pci-*.c which bore the message:
8 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
9 *
10 * May be copied or modified under the terms of the GNU General Public
11 * License. See linux/COPYING for more information.
12 *
13 */
14#include <linux/types.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pci.h>
19#include <linux/sched.h>
20#include <linux/ioport.h>
21#include <linux/errno.h>
22#include <linux/irq.h>
23#include <linux/interrupt.h>
24
25#include <asm/machvec.h>
26#include <asm/io.h>
27#include <asm/mpc1211/pci.h>
28
29static struct resource mpcpci_io_resource = {
30 "MPCPCI IO",
31 0x00000000,
32 0xffffffff,
33 IORESOURCE_IO
34};
35
36static struct resource mpcpci_mem_resource = {
37 "MPCPCI mem",
38 0x00000000,
39 0xffffffff,
40 IORESOURCE_MEM
41};
42
43static struct pci_ops pci_direct_conf1;
44struct pci_channel board_pci_channels[] = {
45 {&pci_direct_conf1, &mpcpci_io_resource, &mpcpci_mem_resource, 0, 256},
46 {NULL, NULL, NULL, 0, 0},
47};
48
49/*
50 * Direct access to PCI hardware...
51 */
52
53
54#define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
55
56/*
57 * Functions for accessing PCI configuration space with type 1 accesses
58 */
59static int pci_conf1_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
60{
61 u32 word;
62 unsigned long flags;
63
64 /*
65 * PCIPDR may only be accessed as 32 bit words,
66 * so we must do byte alignment by hand
67 */
68 local_irq_save(flags);
69 writel(CONFIG_CMD(bus,devfn,where), PCIPAR);
70 word = readl(PCIPDR);
71 local_irq_restore(flags);
72
73 switch (size) {
74 case 1:
75 switch (where & 0x3) {
76 case 3:
77 *value = (u8)(word >> 24);
78 break;
79 case 2:
80 *value = (u8)(word >> 16);
81 break;
82 case 1:
83 *value = (u8)(word >> 8);
84 break;
85 default:
86 *value = (u8)word;
87 break;
88 }
89 break;
90 case 2:
91 switch (where & 0x3) {
92 case 3:
93 *value = (u16)(word >> 24);
94 local_irq_save(flags);
95 writel(CONFIG_CMD(bus,devfn,(where+1)), PCIPAR);
96 word = readl(PCIPDR);
97 local_irq_restore(flags);
98 *value |= ((word & 0xff) << 8);
99 break;
100 case 2:
101 *value = (u16)(word >> 16);
102 break;
103 case 1:
104 *value = (u16)(word >> 8);
105 break;
106 default:
107 *value = (u16)word;
108 break;
109 }
110 break;
111 case 4:
112 *value = word;
113 break;
114 }
115 PCIDBG(4,"pci_conf1_read@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),*value);
116 return PCIBIOS_SUCCESSFUL;
117}
118
119/*
120 * Since MPC-1211 only does 32bit access we'll have to do a read,mask,write operation.
121 * We'll allow an odd byte offset, though it should be illegal.
122 */
123static int pci_conf1_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
124{
125 u32 word,mask = 0;
126 unsigned long flags;
127 u32 shift = (where & 3) * 8;
128
129 if(size == 1) {
130 mask = ((1 << 8) - 1) << shift; // create the byte mask
131 } else if(size == 2){
132 if(shift == 24)
133 return PCIBIOS_BAD_REGISTER_NUMBER;
134 mask = ((1 << 16) - 1) << shift; // create the word mask
135 }
136 local_irq_save(flags);
137 writel(CONFIG_CMD(bus,devfn,where), PCIPAR);
138 if(size == 4){
139 writel(value, PCIPDR);
140 local_irq_restore(flags);
141 PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),value);
142 return PCIBIOS_SUCCESSFUL;
143 }
144 word = readl(PCIPDR);
145 word &= ~mask;
146 word |= ((value << shift) & mask);
147 writel(word, PCIPDR);
148 local_irq_restore(flags);
149 PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),word);
150 return PCIBIOS_SUCCESSFUL;
151}
152
153#undef CONFIG_CMD
154
155static struct pci_ops pci_direct_conf1 = {
156 .read = pci_conf1_read,
157 .write = pci_conf1_write,
158};
159
160static void __devinit quirk_ali_ide_ports(struct pci_dev *dev)
161{
162 dev->resource[0].start = 0x1f0;
163 dev->resource[0].end = 0x1f7;
164 dev->resource[0].flags = IORESOURCE_IO;
165 dev->resource[1].start = 0x3f6;
166 dev->resource[1].end = 0x3f6;
167 dev->resource[1].flags = IORESOURCE_IO;
168 dev->resource[2].start = 0x170;
169 dev->resource[2].end = 0x177;
170 dev->resource[2].flags = IORESOURCE_IO;
171 dev->resource[3].start = 0x376;
172 dev->resource[3].end = 0x376;
173 dev->resource[3].flags = IORESOURCE_IO;
174 dev->resource[4].start = 0xf000;
175 dev->resource[4].end = 0xf00f;
176 dev->resource[4].flags = IORESOURCE_IO;
177}
178DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, quirk_ali_ide_ports);
179
180char * __devinit pcibios_setup(char *str)
181{
182 return str;
183}
184
185/*
186 * Called after each bus is probed, but before its children
187 * are examined.
188 */
189
190void __devinit pcibios_fixup_bus(struct pci_bus *b)
191{
192 pci_read_bridge_bases(b);
193}
194
195/*
196 * IRQ functions
197 */
198static inline u8 bridge_swizzle(u8 pin, u8 slot)
199{
200 return (((pin-1) + slot) % 4) + 1;
201}
202
203static inline u8 bridge_swizzle_pci_1(u8 pin, u8 slot)
204{
205 return (((pin-1) - slot) & 3) + 1;
206}
207
208static u8 __init mpc1211_swizzle(struct pci_dev *dev, u8 *pinp)
209{
210 unsigned long flags;
211 u8 pin = *pinp;
212 u32 word;
213
214 for ( ; dev->bus->self; dev = dev->bus->self) {
215 if (!pin)
216 continue;
217
218 if (dev->bus->number == 1) {
219 local_irq_save(flags);
220 writel(0x80000000 | 0x2c, PCIPAR);
221 word = readl(PCIPDR);
222 local_irq_restore(flags);
223 word >>= 16;
224
225 if (word == 0x0001)
226 pin = bridge_swizzle_pci_1(pin, PCI_SLOT(dev->devfn));
227 else
228 pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
229 } else
230 pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
231 }
232
233 *pinp = pin;
234
235 return PCI_SLOT(dev->devfn);
236}
237
238static int __init map_mpc1211_irq(struct pci_dev *dev, u8 slot, u8 pin)
239{
240 int irq = -1;
241
242 /* now lookup the actual IRQ on a platform specific basis (pci-'platform'.c) */
243 if (dev->bus->number == 0) {
244 switch (slot) {
245 case 13: irq = 9; break; /* USB */
246 case 22: irq = 10; break; /* LAN */
247 default: irq = 0; break;
248 }
249 } else {
250 switch (pin) {
251 case 0: irq = 0; break;
252 case 1: irq = 7; break;
253 case 2: irq = 9; break;
254 case 3: irq = 10; break;
255 case 4: irq = 11; break;
256 }
257 }
258
259 if( irq < 0 ) {
260 PCIDBG(3, "PCI: Error mapping IRQ on device %s\n", pci_name(dev));
261 return irq;
262 }
263
264 PCIDBG(2, "Setting IRQ for slot %s to %d\n", pci_name(dev), irq);
265
266 return irq;
267}
268
269void __init pcibios_fixup_irqs(void)
270{
271 pci_fixup_irqs(mpc1211_swizzle, map_mpc1211_irq);
272}
273
274void pcibios_align_resource(void *data, struct resource *res,
275 resource_size_t size, resource_size_t align)
276{
277 resource_size_t start = res->start;
278
279 if (res->flags & IORESOURCE_IO) {
280 if (start >= 0x10000UL) {
281 if ((start & 0xffffUL) < 0x4000UL) {
282 start = (start & 0xffff0000UL) + 0x4000UL;
283 } else if ((start & 0xffffUL) >= 0xf000UL) {
284 start = (start & 0xffff0000UL) + 0x10000UL;
285 }
286 res->start = start;
287 } else {
288 if (start & 0x300) {
289 start = (start + 0x3ff) & ~0x3ff;
290 res->start = start;
291 }
292 }
293 }
294}
295
diff --git a/arch/sh/boards/mpc1211/rtc.c b/arch/sh/boards/mpc1211/rtc.c
deleted file mode 100644
index 03b123a4bba4..000000000000
--- a/arch/sh/boards/mpc1211/rtc.c
+++ /dev/null
@@ -1,136 +0,0 @@
1/*
2 * linux/arch/sh/kernel/rtc-mpc1211.c -- MPC-1211 on-chip RTC support
3 *
4 * Copyright (C) 2002 Saito.K & Jeanne
5 *
6 */
7
8#include <linux/init.h>
9#include <linux/kernel.h>
10#include <linux/sched.h>
11#include <linux/time.h>
12#include <linux/bcd.h>
13#include <linux/mc146818rtc.h>
14
15unsigned long get_cmos_time(void)
16{
17 unsigned int year, mon, day, hour, min, sec;
18
19 spin_lock(&rtc_lock);
20
21 do {
22 sec = CMOS_READ(RTC_SECONDS);
23 min = CMOS_READ(RTC_MINUTES);
24 hour = CMOS_READ(RTC_HOURS);
25 day = CMOS_READ(RTC_DAY_OF_MONTH);
26 mon = CMOS_READ(RTC_MONTH);
27 year = CMOS_READ(RTC_YEAR);
28 } while (sec != CMOS_READ(RTC_SECONDS));
29
30 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
31 BCD_TO_BIN(sec);
32 BCD_TO_BIN(min);
33 BCD_TO_BIN(hour);
34 BCD_TO_BIN(day);
35 BCD_TO_BIN(mon);
36 BCD_TO_BIN(year);
37 }
38
39 spin_unlock(&rtc_lock);
40
41 year += 1900;
42 if (year < 1970)
43 year += 100;
44
45 return mktime(year, mon, day, hour, min, sec);
46}
47
48void mpc1211_rtc_gettimeofday(struct timeval *tv)
49{
50
51 tv->tv_sec = get_cmos_time();
52 tv->tv_usec = 0;
53}
54
55/* arc/i386/kernel/time.c */
56/*
57 * In order to set the CMOS clock precisely, set_rtc_mmss has to be
58 * called 500 ms after the second nowtime has started, because when
59 * nowtime is written into the registers of the CMOS clock, it will
60 * jump to the next second precisely 500 ms later. Check the Motorola
61 * MC146818A or Dallas DS12887 data sheet for details.
62 *
63 * BUG: This routine does not handle hour overflow properly; it just
64 * sets the minutes. Usually you'll only notice that after reboot!
65 */
66static int set_rtc_mmss(unsigned long nowtime)
67{
68 int retval = 0;
69 int real_seconds, real_minutes, cmos_minutes;
70 unsigned char save_control, save_freq_select;
71
72 /* gets recalled with irq locally disabled */
73 spin_lock(&rtc_lock);
74 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
75 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
76
77 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
78 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
79
80 cmos_minutes = CMOS_READ(RTC_MINUTES);
81 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
82 BCD_TO_BIN(cmos_minutes);
83
84 /*
85 * since we're only adjusting minutes and seconds,
86 * don't interfere with hour overflow. This avoids
87 * messing with unknown time zones but requires your
88 * RTC not to be off by more than 15 minutes
89 */
90 real_seconds = nowtime % 60;
91 real_minutes = nowtime / 60;
92 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
93 real_minutes += 30; /* correct for half hour time zone */
94 real_minutes %= 60;
95
96 if (abs(real_minutes - cmos_minutes) < 30) {
97 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
98 BIN_TO_BCD(real_seconds);
99 BIN_TO_BCD(real_minutes);
100 }
101 CMOS_WRITE(real_seconds,RTC_SECONDS);
102 CMOS_WRITE(real_minutes,RTC_MINUTES);
103 } else {
104 printk(KERN_WARNING
105 "set_rtc_mmss: can't update from %d to %d\n",
106 cmos_minutes, real_minutes);
107 retval = -1;
108 }
109
110 /* The following flags have to be released exactly in this order,
111 * otherwise the DS12887 (popular MC146818A clone with integrated
112 * battery and quartz) will not reset the oscillator and will not
113 * update precisely 500 ms later. You won't find this mentioned in
114 * the Dallas Semiconductor data sheets, but who believes data
115 * sheets anyway ... -- Markus Kuhn
116 */
117 CMOS_WRITE(save_control, RTC_CONTROL);
118 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
119 spin_unlock(&rtc_lock);
120
121 return retval;
122}
123
124int mpc1211_rtc_settimeofday(const struct timeval *tv)
125{
126 unsigned long nowtime = tv->tv_sec;
127
128 return set_rtc_mmss(nowtime);
129}
130
131void mpc1211_time_init(void)
132{
133 rtc_sh_get_time = mpc1211_rtc_gettimeofday;
134 rtc_sh_set_time = mpc1211_rtc_settimeofday;
135}
136
diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c
deleted file mode 100644
index fede36361dc7..000000000000
--- a/arch/sh/boards/mpc1211/setup.c
+++ /dev/null
@@ -1,347 +0,0 @@
1/*
2 * linux/arch/sh/boards/mpc1211/setup.c
3 *
4 * Copyright (C) 2002 Saito.K & Jeanne, Fujii.Y
5 *
6 */
7
8#include <linux/init.h>
9#include <linux/irq.h>
10#include <linux/hdreg.h>
11#include <linux/ide.h>
12#include <linux/interrupt.h>
13#include <linux/platform_device.h>
14#include <asm/io.h>
15#include <asm/machvec.h>
16#include <asm/mpc1211/mpc1211.h>
17#include <asm/mpc1211/pci.h>
18#include <asm/mpc1211/m1543c.h>
19
20/* ALI15X3 SMBus address offsets */
21#define SMBHSTSTS (0 + 0x3100)
22#define SMBHSTCNT (1 + 0x3100)
23#define SMBHSTSTART (2 + 0x3100)
24#define SMBHSTCMD (7 + 0x3100)
25#define SMBHSTADD (3 + 0x3100)
26#define SMBHSTDAT0 (4 + 0x3100)
27#define SMBHSTDAT1 (5 + 0x3100)
28#define SMBBLKDAT (6 + 0x3100)
29
30/* Other settings */
31#define MAX_TIMEOUT 500 /* times 1/100 sec */
32
33/* ALI15X3 command constants */
34#define ALI15X3_ABORT 0x04
35#define ALI15X3_T_OUT 0x08
36#define ALI15X3_QUICK 0x00
37#define ALI15X3_BYTE 0x10
38#define ALI15X3_BYTE_DATA 0x20
39#define ALI15X3_WORD_DATA 0x30
40#define ALI15X3_BLOCK_DATA 0x40
41#define ALI15X3_BLOCK_CLR 0x80
42
43/* ALI15X3 status register bits */
44#define ALI15X3_STS_IDLE 0x04
45#define ALI15X3_STS_BUSY 0x08
46#define ALI15X3_STS_DONE 0x10
47#define ALI15X3_STS_DEV 0x20 /* device error */
48#define ALI15X3_STS_COLL 0x40 /* collision or no response */
49#define ALI15X3_STS_TERM 0x80 /* terminated by abort */
50#define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */
51
52static void __init pci_write_config(unsigned long busNo,
53 unsigned long devNo,
54 unsigned long fncNo,
55 unsigned long cnfAdd,
56 unsigned long cnfData)
57{
58 ctrl_outl((0x80000000
59 + ((busNo & 0xff) << 16)
60 + ((devNo & 0x1f) << 11)
61 + ((fncNo & 0x07) << 8)
62 + (cnfAdd & 0xfc)), PCIPAR);
63
64 ctrl_outl(cnfData, PCIPDR);
65}
66
67/*
68 Initialize IRQ setting
69*/
70
71static unsigned char m_irq_mask = 0xfb;
72static unsigned char s_irq_mask = 0xff;
73
74static void disable_mpc1211_irq(unsigned int irq)
75{
76 if( irq < 8) {
77 m_irq_mask |= (1 << irq);
78 outb(m_irq_mask,I8259_M_MR);
79 } else {
80 s_irq_mask |= (1 << (irq - 8));
81 outb(s_irq_mask,I8259_S_MR);
82 }
83
84}
85
86static void enable_mpc1211_irq(unsigned int irq)
87{
88 if( irq < 8) {
89 m_irq_mask &= ~(1 << irq);
90 outb(m_irq_mask,I8259_M_MR);
91 } else {
92 s_irq_mask &= ~(1 << (irq - 8));
93 outb(s_irq_mask,I8259_S_MR);
94 }
95}
96
97static inline int mpc1211_irq_real(unsigned int irq)
98{
99 int value;
100 int irqmask;
101
102 if ( irq < 8) {
103 irqmask = 1<<irq;
104 outb(0x0b,I8259_M_CR); /* ISR register */
105 value = inb(I8259_M_CR) & irqmask;
106 outb(0x0a,I8259_M_CR); /* back ro the IPR reg */
107 return value;
108 }
109 irqmask = 1<<(irq - 8);
110 outb(0x0b,I8259_S_CR); /* ISR register */
111 value = inb(I8259_S_CR) & irqmask;
112 outb(0x0a,I8259_S_CR); /* back ro the IPR reg */
113 return value;
114}
115
116static void mask_and_ack_mpc1211(unsigned int irq)
117{
118 if(irq < 8) {
119 if(m_irq_mask & (1<<irq)){
120 if(!mpc1211_irq_real(irq)){
121 atomic_inc(&irq_err_count)
122 printk("spurious 8259A interrupt: IRQ %x\n",irq);
123 }
124 } else {
125 m_irq_mask |= (1<<irq);
126 }
127 inb(I8259_M_MR); /* DUMMY */
128 outb(m_irq_mask,I8259_M_MR); /* disable */
129 outb(0x60+irq,I8259_M_CR); /* EOI */
130
131 } else {
132 if(s_irq_mask & (1<<(irq - 8))){
133 if(!mpc1211_irq_real(irq)){
134 atomic_inc(&irq_err_count);
135 printk("spurious 8259A interrupt: IRQ %x\n",irq);
136 }
137 } else {
138 s_irq_mask |= (1<<(irq - 8));
139 }
140 inb(I8259_S_MR); /* DUMMY */
141 outb(s_irq_mask,I8259_S_MR); /* disable */
142 outb(0x60+(irq-8),I8259_S_CR); /* EOI */
143 outb(0x60+2,I8259_M_CR);
144 }
145}
146
147static void end_mpc1211_irq(unsigned int irq)
148{
149 enable_mpc1211_irq(irq);
150}
151
152static unsigned int startup_mpc1211_irq(unsigned int irq)
153{
154 enable_mpc1211_irq(irq);
155 return 0;
156}
157
158static void shutdown_mpc1211_irq(unsigned int irq)
159{
160 disable_mpc1211_irq(irq);
161}
162
163static struct hw_interrupt_type mpc1211_irq_type = {
164 .typename = "MPC1211-IRQ",
165 .startup = startup_mpc1211_irq,
166 .shutdown = shutdown_mpc1211_irq,
167 .enable = enable_mpc1211_irq,
168 .disable = disable_mpc1211_irq,
169 .ack = mask_and_ack_mpc1211,
170 .end = end_mpc1211_irq
171};
172
173static void make_mpc1211_irq(unsigned int irq)
174{
175 irq_desc[irq].chip = &mpc1211_irq_type;
176 irq_desc[irq].status = IRQ_DISABLED;
177 irq_desc[irq].action = 0;
178 irq_desc[irq].depth = 1;
179 disable_mpc1211_irq(irq);
180}
181
182int mpc1211_irq_demux(int irq)
183{
184 unsigned int poll;
185
186 if( irq == 2 ) {
187 outb(0x0c,I8259_M_CR);
188 poll = inb(I8259_M_CR);
189 if(poll & 0x80) {
190 irq = (poll & 0x07);
191 }
192 if( irq == 2) {
193 outb(0x0c,I8259_S_CR);
194 poll = inb(I8259_S_CR);
195 irq = (poll & 0x07) + 8;
196 }
197 }
198 return irq;
199}
200
201static void __init init_mpc1211_IRQ(void)
202{
203 int i;
204 /*
205 * Super I/O (Just mimic PC):
206 * 1: keyboard
207 * 3: serial 1
208 * 4: serial 0
209 * 5: printer
210 * 6: floppy
211 * 8: rtc
212 * 10: lan
213 * 12: mouse
214 * 14: ide0
215 * 15: ide1
216 */
217
218 pci_write_config(0,0,0,0x54, 0xb0b0002d);
219 outb(0x11, I8259_M_CR); /* mater icw1 edge trigger */
220 outb(0x11, I8259_S_CR); /* slave icw1 edge trigger */
221 outb(0x20, I8259_M_MR); /* m icw2 base vec 0x08 */
222 outb(0x28, I8259_S_MR); /* s icw2 base vec 0x70 */
223 outb(0x04, I8259_M_MR); /* m icw3 slave irq2 */
224 outb(0x02, I8259_S_MR); /* s icw3 slave id */
225 outb(0x01, I8259_M_MR); /* m icw4 non buf normal eoi*/
226 outb(0x01, I8259_S_MR); /* s icw4 non buf normal eo1*/
227 outb(0xfb, I8259_M_MR); /* disable irq0--irq7 */
228 outb(0xff, I8259_S_MR); /* disable irq8--irq15 */
229
230 for ( i=0; i < 16; i++) {
231 if(i != 2) {
232 make_mpc1211_irq(i);
233 }
234 }
235}
236
237static void delay1000(void)
238{
239 int i;
240
241 for (i=0; i<1000; i++)
242 ctrl_delay();
243}
244
245static int put_smb_blk(unsigned char *p, int address, int command, int no)
246{
247 int temp;
248 int timeout;
249 int i;
250
251 outb(0xff, SMBHSTSTS);
252 temp = inb(SMBHSTSTS);
253 for (timeout = 0; (timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE); timeout++) {
254 delay1000();
255 temp = inb(SMBHSTSTS);
256 }
257 if (timeout >= MAX_TIMEOUT){
258 return -1;
259 }
260
261 outb(((address & 0x7f) << 1), SMBHSTADD);
262 outb(0xc0, SMBHSTCNT);
263 outb(command & 0xff, SMBHSTCMD);
264 outb(no & 0x1f, SMBHSTDAT0);
265
266 for(i = 1; i <= no; i++) {
267 outb(*p++, SMBBLKDAT);
268 }
269 outb(0xff, SMBHSTSTART);
270
271 temp = inb(SMBHSTSTS);
272 for (timeout = 0; (timeout < MAX_TIMEOUT) && !(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE)); timeout++) {
273 delay1000();
274 temp = inb(SMBHSTSTS);
275 }
276 if (timeout >= MAX_TIMEOUT) {
277 return -2;
278 }
279 if ( temp & ALI15X3_STS_ERR ){
280 return -3;
281 }
282 return 0;
283}
284
285static struct resource heartbeat_resources[] = {
286 [0] = {
287 .start = 0xa2000000,
288 .end = 0xa2000000,
289 .flags = IORESOURCE_MEM,
290 },
291};
292
293static struct platform_device heartbeat_device = {
294 .name = "heartbeat",
295 .id = -1,
296 .num_resources = ARRAY_SIZE(heartbeat_resources),
297 .resource = heartbeat_resources,
298};
299
300static struct platform_device *mpc1211_devices[] __initdata = {
301 &heartbeat_device,
302};
303
304static int __init mpc1211_devices_setup(void)
305{
306 return platform_add_devices(mpc1211_devices,
307 ARRAY_SIZE(mpc1211_devices));
308}
309__initcall(mpc1211_devices_setup);
310
311/* arch/sh/boards/mpc1211/rtc.c */
312void mpc1211_time_init(void);
313
314static void __init mpc1211_setup(char **cmdline_p)
315{
316 unsigned char spd_buf[128];
317
318 __set_io_port_base(PA_PCI_IO);
319
320 pci_write_config(0,0,0,0x54, 0xb0b00000);
321
322 do {
323 outb(ALI15X3_ABORT, SMBHSTCNT);
324 spd_buf[0] = 0x0c;
325 spd_buf[1] = 0x43;
326 spd_buf[2] = 0x7f;
327 spd_buf[3] = 0x03;
328 spd_buf[4] = 0x00;
329 spd_buf[5] = 0x03;
330 spd_buf[6] = 0x00;
331 } while (put_smb_blk(spd_buf, 0x69, 0, 7) < 0);
332
333 board_time_init = mpc1211_time_init;
334
335 return 0;
336}
337
338/*
339 * The Machine Vector
340 */
341static struct sh_machine_vector mv_mpc1211 __initmv = {
342 .mv_name = "Interface MPC-1211(CTP/PCI/MPC-SH02)",
343 .mv_setup = mpc1211_setup,
344 .mv_nr_irqs = 48,
345 .mv_irq_demux = mpc1211_irq_demux,
346 .mv_init_irq = init_mpc1211_IRQ,
347};
diff --git a/arch/sh/boards/renesas/migor/setup.c b/arch/sh/boards/renesas/migor/setup.c
index e7c150d49702..01af44245b57 100644
--- a/arch/sh/boards/renesas/migor/setup.c
+++ b/arch/sh/boards/renesas/migor/setup.c
@@ -14,6 +14,7 @@
14#include <linux/mtd/physmap.h> 14#include <linux/mtd/physmap.h>
15#include <linux/mtd/nand.h> 15#include <linux/mtd/nand.h>
16#include <linux/i2c.h> 16#include <linux/i2c.h>
17#include <linux/smc91x.h>
17#include <asm/machvec.h> 18#include <asm/machvec.h>
18#include <asm/io.h> 19#include <asm/io.h>
19#include <asm/sh_keysc.h> 20#include <asm/sh_keysc.h>
@@ -27,6 +28,11 @@
27 * 0x18000000 8GB 8 NAND Flash (K9K8G08U0A) 28 * 0x18000000 8GB 8 NAND Flash (K9K8G08U0A)
28 */ 29 */
29 30
31static struct smc91x_platdata smc91x_info = {
32 .flags = SMC91X_USE_16BIT,
33 .irq_flags = IRQF_TRIGGER_HIGH,
34};
35
30static struct resource smc91x_eth_resources[] = { 36static struct resource smc91x_eth_resources[] = {
31 [0] = { 37 [0] = {
32 .name = "SMC91C111" , 38 .name = "SMC91C111" ,
@@ -36,7 +42,7 @@ static struct resource smc91x_eth_resources[] = {
36 }, 42 },
37 [1] = { 43 [1] = {
38 .start = 32, /* IRQ0 */ 44 .start = 32, /* IRQ0 */
39 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH, 45 .flags = IORESOURCE_IRQ,
40 }, 46 },
41}; 47};
42 48
@@ -44,6 +50,9 @@ static struct platform_device smc91x_eth_device = {
44 .name = "smc91x", 50 .name = "smc91x",
45 .num_resources = ARRAY_SIZE(smc91x_eth_resources), 51 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
46 .resource = smc91x_eth_resources, 52 .resource = smc91x_eth_resources,
53 .dev = {
54 .platform_data = &smc91x_info,
55 },
47}; 56};
48 57
49static struct sh_keysc_info sh_keysc_info = { 58static struct sh_keysc_info sh_keysc_info = {
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
index 68f0ad1b637d..ae1cfcb29700 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
@@ -62,7 +62,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = {
62static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors, 62static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors,
63 NULL, mask_registers, NULL, NULL); 63 NULL, mask_registers, NULL, NULL);
64 64
65unsigned char * __init highlander_init_irq_r7780mp(void) 65unsigned char * __init highlander_plat_irq_setup(void)
66{ 66{
67 if ((ctrl_inw(0xa4000700) & 0xf000) == 0x2000) { 67 if ((ctrl_inw(0xa4000700) & 0xf000) == 0x2000) {
68 printk(KERN_INFO "Using r7780mp interrupt controller.\n"); 68 printk(KERN_INFO "Using r7780mp interrupt controller.\n");
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
index bd34048ed0e1..9d3921fe27c0 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
@@ -55,7 +55,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = {
55static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors, 55static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors,
56 NULL, mask_registers, NULL, NULL); 56 NULL, mask_registers, NULL, NULL);
57 57
58unsigned char * __init highlander_init_irq_r7780rp(void) 58unsigned char * __init highlander_plat_irq_setup(void)
59{ 59{
60 if (ctrl_inw(0xa5000600)) { 60 if (ctrl_inw(0xa5000600)) {
61 printk(KERN_INFO "Using r7780rp interrupt controller.\n"); 61 printk(KERN_INFO "Using r7780rp interrupt controller.\n");
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
index bf7ec107fbc6..896c045aa39d 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
@@ -64,7 +64,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = {
64static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors, 64static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
65 NULL, mask_registers, NULL, NULL); 65 NULL, mask_registers, NULL, NULL);
66 66
67unsigned char * __init highlander_init_irq_r7785rp(void) 67unsigned char * __init highlander_plat_irq_setup(void)
68{ 68{
69 if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000) 69 if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000)
70 return NULL; 70 return NULL;
diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c
index ac0a96522e45..bc79afb6fc4c 100644
--- a/arch/sh/boards/renesas/r7780rp/setup.c
+++ b/arch/sh/boards/renesas/r7780rp/setup.c
@@ -316,7 +316,7 @@ static void __init highlander_setup(char **cmdline_p)
316 316
317static unsigned char irl2irq[HL_NR_IRL]; 317static unsigned char irl2irq[HL_NR_IRL];
318 318
319int highlander_irq_demux(int irq) 319static int highlander_irq_demux(int irq)
320{ 320{
321 if (irq >= HL_NR_IRL || !irl2irq[irq]) 321 if (irq >= HL_NR_IRL || !irl2irq[irq])
322 return irq; 322 return irq;
@@ -324,27 +324,9 @@ int highlander_irq_demux(int irq)
324 return irl2irq[irq]; 324 return irl2irq[irq];
325} 325}
326 326
327void __init highlander_init_irq(void) 327static void __init highlander_init_irq(void)
328{ 328{
329 unsigned char *ucp = NULL; 329 unsigned char *ucp = highlander_plat_irq_setup();
330
331 do {
332#ifdef CONFIG_SH_R7780MP
333 ucp = highlander_init_irq_r7780mp();
334 if (ucp)
335 break;
336#endif
337#ifdef CONFIG_SH_R7785RP
338 ucp = highlander_init_irq_r7785rp();
339 if (ucp)
340 break;
341#endif
342#ifdef CONFIG_SH_R7780RP
343 ucp = highlander_init_irq_r7780rp();
344 if (ucp)
345 break;
346#endif
347 } while (0);
348 330
349 if (ucp) { 331 if (ucp) {
350 plat_irq_setup_pins(IRQ_MODE_IRL3210); 332 plat_irq_setup_pins(IRQ_MODE_IRL3210);
diff --git a/arch/sh/boards/renesas/rts7751r2d/setup.c b/arch/sh/boards/renesas/rts7751r2d/setup.c
index f21ee49ef3a5..452d0d6459a4 100644
--- a/arch/sh/boards/renesas/rts7751r2d/setup.c
+++ b/arch/sh/boards/renesas/rts7751r2d/setup.c
@@ -109,7 +109,6 @@ static struct platform_device heartbeat_device = {
109 .resource = heartbeat_resources, 109 .resource = heartbeat_resources,
110}; 110};
111 111
112#ifdef CONFIG_MFD_SM501
113static struct plat_serial8250_port uart_platform_data[] = { 112static struct plat_serial8250_port uart_platform_data[] = {
114 { 113 {
115 .membase = (void __iomem *)0xb3e30000, 114 .membase = (void __iomem *)0xb3e30000,
@@ -208,13 +207,9 @@ static struct platform_device sm501_device = {
208 .resource = sm501_resources, 207 .resource = sm501_resources,
209}; 208};
210 209
211#endif /* CONFIG_MFD_SM501 */
212
213static struct platform_device *rts7751r2d_devices[] __initdata = { 210static struct platform_device *rts7751r2d_devices[] __initdata = {
214#ifdef CONFIG_MFD_SM501
215 &uart_device, 211 &uart_device,
216 &sm501_device, 212 &sm501_device,
217#endif
218 &heartbeat_device, 213 &heartbeat_device,
219 &spi_sh_sci_device, 214 &spi_sh_sci_device,
220}; 215};
@@ -234,7 +229,9 @@ static int __init rts7751r2d_devices_setup(void)
234{ 229{
235 if (register_trapped_io(&cf_trapped_io) == 0) 230 if (register_trapped_io(&cf_trapped_io) == 0)
236 platform_device_register(&cf_ide_device); 231 platform_device_register(&cf_ide_device);
232
237 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus)); 233 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
234
238 return platform_add_devices(rts7751r2d_devices, 235 return platform_add_devices(rts7751r2d_devices,
239 ARRAY_SIZE(rts7751r2d_devices)); 236 ARRAY_SIZE(rts7751r2d_devices));
240} 237}
diff --git a/arch/sh/boards/se/7206/setup.c b/arch/sh/boards/se/7206/setup.c
index 5b3ee089d91d..4fe84cc08406 100644
--- a/arch/sh/boards/se/7206/setup.c
+++ b/arch/sh/boards/se/7206/setup.c
@@ -3,12 +3,13 @@
3 * linux/arch/sh/boards/se/7206/setup.c 3 * linux/arch/sh/boards/se/7206/setup.c
4 * 4 *
5 * Copyright (C) 2006 Yoshinori Sato 5 * Copyright (C) 2006 Yoshinori Sato
6 * Copyright (C) 2007 Paul Mundt 6 * Copyright (C) 2007 - 2008 Paul Mundt
7 * 7 *
8 * Hitachi 7206 SolutionEngine Support. 8 * Hitachi 7206 SolutionEngine Support.
9 */ 9 */
10#include <linux/init.h> 10#include <linux/init.h>
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/smc91x.h>
12#include <asm/se7206.h> 13#include <asm/se7206.h>
13#include <asm/io.h> 14#include <asm/io.h>
14#include <asm/machvec.h> 15#include <asm/machvec.h>
@@ -16,8 +17,9 @@
16 17
17static struct resource smc91x_resources[] = { 18static struct resource smc91x_resources[] = {
18 [0] = { 19 [0] = {
19 .start = 0x300, 20 .name = "smc91x-regs",
20 .end = 0x300 + 0x020 - 1, 21 .start = PA_SMSC + 0x300,
22 .end = PA_SMSC + 0x300 + 0x020 - 1,
21 .flags = IORESOURCE_MEM, 23 .flags = IORESOURCE_MEM,
22 }, 24 },
23 [1] = { 25 [1] = {
@@ -27,9 +29,18 @@ static struct resource smc91x_resources[] = {
27 }, 29 },
28}; 30};
29 31
32static struct smc91x_platdata smc91x_info = {
33 .flags = SMC91X_USE_16BIT,
34};
35
30static struct platform_device smc91x_device = { 36static struct platform_device smc91x_device = {
31 .name = "smc91x", 37 .name = "smc91x",
32 .id = -1, 38 .id = -1,
39 .dev = {
40 .dma_mask = NULL,
41 .coherent_dma_mask = 0xffffffff,
42 .platform_data = &smc91x_info,
43 },
33 .num_resources = ARRAY_SIZE(smc91x_resources), 44 .num_resources = ARRAY_SIZE(smc91x_resources),
34 .resource = smc91x_resources, 45 .resource = smc91x_resources,
35}; 46};
diff --git a/arch/sh/boards/se/7722/setup.c b/arch/sh/boards/se/7722/setup.c
index 33f6ee71f848..ede3957fc14a 100644
--- a/arch/sh/boards/se/7722/setup.c
+++ b/arch/sh/boards/se/7722/setup.c
@@ -14,6 +14,7 @@
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/ata_platform.h> 15#include <linux/ata_platform.h>
16#include <linux/input.h> 16#include <linux/input.h>
17#include <linux/smc91x.h>
17#include <asm/machvec.h> 18#include <asm/machvec.h>
18#include <asm/se7722.h> 19#include <asm/se7722.h>
19#include <asm/io.h> 20#include <asm/io.h>
@@ -44,6 +45,10 @@ static struct platform_device heartbeat_device = {
44}; 45};
45 46
46/* SMC91x */ 47/* SMC91x */
48static struct smc91x_platdata smc91x_info = {
49 .flags = SMC91X_USE_16BIT,
50};
51
47static struct resource smc91x_eth_resources[] = { 52static struct resource smc91x_eth_resources[] = {
48 [0] = { 53 [0] = {
49 .name = "smc91x-regs" , 54 .name = "smc91x-regs" ,
@@ -64,6 +69,7 @@ static struct platform_device smc91x_eth_device = {
64 .dev = { 69 .dev = {
65 .dma_mask = NULL, /* don't use dma */ 70 .dma_mask = NULL, /* don't use dma */
66 .coherent_dma_mask = 0xffffffff, 71 .coherent_dma_mask = 0xffffffff,
72 .platform_data = &smc91x_info,
67 }, 73 },
68 .num_resources = ARRAY_SIZE(smc91x_eth_resources), 74 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
69 .resource = smc91x_eth_resources, 75 .resource = smc91x_eth_resources,
diff --git a/arch/sh/boot/compressed/Makefile_32 b/arch/sh/boot/compressed/Makefile_32
index 6ac8d4a4ed1d..c0d25fb1aa60 100644
--- a/arch/sh/boot/compressed/Makefile_32
+++ b/arch/sh/boot/compressed/Makefile_32
@@ -6,7 +6,6 @@
6 6
7targets := vmlinux vmlinux.bin vmlinux.bin.gz \ 7targets := vmlinux vmlinux.bin vmlinux.bin.gz \
8 head_32.o misc_32.o piggy.o 8 head_32.o misc_32.o piggy.o
9EXTRA_AFLAGS := -traditional
10 9
11OBJECTS = $(obj)/head_32.o $(obj)/misc_32.o 10OBJECTS = $(obj)/head_32.o $(obj)/misc_32.o
12 11
diff --git a/arch/sh/boot/compressed/Makefile_64 b/arch/sh/boot/compressed/Makefile_64
index 4334f2b86d8f..912f3e205a0d 100644
--- a/arch/sh/boot/compressed/Makefile_64
+++ b/arch/sh/boot/compressed/Makefile_64
@@ -13,7 +13,6 @@
13 13
14targets := vmlinux vmlinux.bin vmlinux.bin.gz \ 14targets := vmlinux vmlinux.bin vmlinux.bin.gz \
15 head_64.o misc_64.o cache.o piggy.o 15 head_64.o misc_64.o cache.o piggy.o
16EXTRA_AFLAGS := -traditional
17 16
18OBJECTS := $(obj)/vmlinux_64.lds $(obj)/head_64.o $(obj)/misc_64.o \ 17OBJECTS := $(obj)/vmlinux_64.lds $(obj)/head_64.o $(obj)/misc_64.o \
19 $(obj)/cache.o 18 $(obj)/cache.o
diff --git a/arch/sh/kernel/cpu/irq/intc-sh5.c b/arch/sh/kernel/cpu/irq/intc-sh5.c
index d6e0e2bdaad5..de45c6a3e33b 100644
--- a/arch/sh/kernel/cpu/irq/intc-sh5.c
+++ b/arch/sh/kernel/cpu/irq/intc-sh5.c
@@ -184,9 +184,8 @@ int intc_irq_describe(char* p, int irq)
184 184
185void __init plat_irq_setup(void) 185void __init plat_irq_setup(void)
186{ 186{
187 unsigned long long __dummy0, __dummy1=~0x00000000100000f0; 187 unsigned long long __dummy0, __dummy1=~0x00000000100000f0;
188 unsigned long reg; 188 unsigned long reg;
189 unsigned long data;
190 int i; 189 int i;
191 190
192 intc_virt = onchip_remap(INTC_BASE, 1024, "INTC"); 191 intc_virt = onchip_remap(INTC_BASE, 1024, "INTC");
@@ -196,11 +195,8 @@ void __init plat_irq_setup(void)
196 195
197 196
198 /* Set default: per-line enable/disable, priority driven ack/eoi */ 197 /* Set default: per-line enable/disable, priority driven ack/eoi */
199 for (i = 0; i < NR_INTC_IRQS; i++) { 198 for (i = 0; i < NR_INTC_IRQS; i++)
200 if (platform_int_priority[i] != NO_PRIORITY) { 199 irq_desc[i].chip = &intc_irq_type;
201 irq_desc[i].chip = &intc_irq_type;
202 }
203 }
204 200
205 201
206 /* Disable all interrupts and set all priorities to 0 to avoid trouble */ 202 /* Disable all interrupts and set all priorities to 0 to avoid trouble */
@@ -211,35 +207,42 @@ void __init plat_irq_setup(void)
211 ctrl_outl( NO_PRIORITY, reg); 207 ctrl_outl( NO_PRIORITY, reg);
212 208
213 209
214 /* Set IRLM */ 210#ifdef CONFIG_SH_CAYMAN
215 /* If all the priorities are set to 'no priority', then 211 {
216 * assume we are using encoded mode. 212 unsigned long data;
217 */ 213
218 irlm = platform_int_priority[IRQ_IRL0] + platform_int_priority[IRQ_IRL1] + \ 214 /* Set IRLM */
219 platform_int_priority[IRQ_IRL2] + platform_int_priority[IRQ_IRL3]; 215 /* If all the priorities are set to 'no priority', then
220 216 * assume we are using encoded mode.
221 if (irlm == NO_PRIORITY) { 217 */
222 /* IRLM = 0 */ 218 irlm = platform_int_priority[IRQ_IRL0] +
223 reg = INTC_ICR_CLEAR; 219 platform_int_priority[IRQ_IRL1] +
224 i = IRQ_INTA; 220 platform_int_priority[IRQ_IRL2] +
225 printk("Trying to use encoded IRL0-3. IRLs unsupported.\n"); 221 platform_int_priority[IRQ_IRL3];
226 } else { 222 if (irlm == NO_PRIORITY) {
227 /* IRLM = 1 */ 223 /* IRLM = 0 */
228 reg = INTC_ICR_SET; 224 reg = INTC_ICR_CLEAR;
229 i = IRQ_IRL0; 225 i = IRQ_INTA;
230 } 226 printk("Trying to use encoded IRL0-3. IRLs unsupported.\n");
231 ctrl_outl(INTC_ICR_IRLM, reg); 227 } else {
232 228 /* IRLM = 1 */
233 /* Set interrupt priorities according to platform description */ 229 reg = INTC_ICR_SET;
234 for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) { 230 i = IRQ_IRL0;
235 data |= platform_int_priority[i] << ((i % INTC_INTPRI_PPREG) * 4);
236 if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) {
237 /* Upon the 7th, set Priority Register */
238 ctrl_outl(data, reg);
239 data = 0;
240 reg += 8;
241 } 231 }
242 } 232 ctrl_outl(INTC_ICR_IRLM, reg);
233
234 /* Set interrupt priorities according to platform description */
235 for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) {
236 data |= platform_int_priority[i] <<
237 ((i % INTC_INTPRI_PPREG) * 4);
238 if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) {
239 /* Upon the 7th, set Priority Register */
240 ctrl_outl(data, reg);
241 data = 0;
242 reg += 8;
243 }
244 }
245#endif
243 246
244 /* 247 /*
245 * And now let interrupts come in. 248 * And now let interrupts come in.
diff --git a/arch/sh/kernel/cpu/irq/intc.c b/arch/sh/kernel/cpu/irq/intc.c
index 84806b2027f8..da5dae787888 100644
--- a/arch/sh/kernel/cpu/irq/intc.c
+++ b/arch/sh/kernel/cpu/irq/intc.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Shared interrupt handling code for IPR and INTC2 types of IRQs. 2 * Shared interrupt handling code for IPR and INTC2 types of IRQs.
3 * 3 *
4 * Copyright (C) 2007 Magnus Damm 4 * Copyright (C) 2007, 2008 Magnus Damm
5 * 5 *
6 * Based on intc2.c and ipr.c 6 * Based on intc2.c and ipr.c
7 * 7 *
@@ -62,6 +62,9 @@ struct intc_desc_int {
62#endif 62#endif
63 63
64static unsigned int intc_prio_level[NR_IRQS]; /* for now */ 64static unsigned int intc_prio_level[NR_IRQS]; /* for now */
65#ifdef CONFIG_CPU_SH3
66static unsigned long ack_handle[NR_IRQS];
67#endif
65 68
66static inline struct intc_desc_int *get_intc_desc(unsigned int irq) 69static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
67{ 70{
@@ -98,17 +101,26 @@ static void write_32(unsigned long addr, unsigned long h, unsigned long data)
98 101
99static void modify_8(unsigned long addr, unsigned long h, unsigned long data) 102static void modify_8(unsigned long addr, unsigned long h, unsigned long data)
100{ 103{
104 unsigned long flags;
105 local_irq_save(flags);
101 ctrl_outb(set_field(ctrl_inb(addr), data, h), addr); 106 ctrl_outb(set_field(ctrl_inb(addr), data, h), addr);
107 local_irq_restore(flags);
102} 108}
103 109
104static void modify_16(unsigned long addr, unsigned long h, unsigned long data) 110static void modify_16(unsigned long addr, unsigned long h, unsigned long data)
105{ 111{
112 unsigned long flags;
113 local_irq_save(flags);
106 ctrl_outw(set_field(ctrl_inw(addr), data, h), addr); 114 ctrl_outw(set_field(ctrl_inw(addr), data, h), addr);
115 local_irq_restore(flags);
107} 116}
108 117
109static void modify_32(unsigned long addr, unsigned long h, unsigned long data) 118static void modify_32(unsigned long addr, unsigned long h, unsigned long data)
110{ 119{
120 unsigned long flags;
121 local_irq_save(flags);
111 ctrl_outl(set_field(ctrl_inl(addr), data, h), addr); 122 ctrl_outl(set_field(ctrl_inl(addr), data, h), addr);
123 local_irq_restore(flags);
112} 124}
113 125
114enum { REG_FN_ERR = 0, REG_FN_WRITE_BASE = 1, REG_FN_MODIFY_BASE = 5 }; 126enum { REG_FN_ERR = 0, REG_FN_WRITE_BASE = 1, REG_FN_MODIFY_BASE = 5 };
@@ -219,6 +231,25 @@ static void intc_disable(unsigned int irq)
219 } 231 }
220} 232}
221 233
234#ifdef CONFIG_CPU_SH3
235static void intc_mask_ack(unsigned int irq)
236{
237 struct intc_desc_int *d = get_intc_desc(irq);
238 unsigned long handle = ack_handle[irq];
239 unsigned long addr;
240
241 intc_disable(irq);
242
243 /* read register and write zero only to the assocaited bit */
244
245 if (handle) {
246 addr = INTC_REG(d, _INTC_ADDR_D(handle), 0);
247 ctrl_inb(addr);
248 ctrl_outb(0x3f ^ set_field(0, 1, handle), addr);
249 }
250}
251#endif
252
222static struct intc_handle_int *intc_find_irq(struct intc_handle_int *hp, 253static struct intc_handle_int *intc_find_irq(struct intc_handle_int *hp,
223 unsigned int nr_hp, 254 unsigned int nr_hp,
224 unsigned int irq) 255 unsigned int irq)
@@ -280,7 +311,12 @@ static unsigned char intc_irq_sense_table[IRQ_TYPE_SENSE_MASK + 1] = {
280 [IRQ_TYPE_EDGE_FALLING] = VALID(0), 311 [IRQ_TYPE_EDGE_FALLING] = VALID(0),
281 [IRQ_TYPE_EDGE_RISING] = VALID(1), 312 [IRQ_TYPE_EDGE_RISING] = VALID(1),
282 [IRQ_TYPE_LEVEL_LOW] = VALID(2), 313 [IRQ_TYPE_LEVEL_LOW] = VALID(2),
314 /* SH7706, SH7707 and SH7709 do not support high level triggered */
315#if !defined(CONFIG_CPU_SUBTYPE_SH7706) && \
316 !defined(CONFIG_CPU_SUBTYPE_SH7707) && \
317 !defined(CONFIG_CPU_SUBTYPE_SH7709)
283 [IRQ_TYPE_LEVEL_HIGH] = VALID(3), 318 [IRQ_TYPE_LEVEL_HIGH] = VALID(3),
319#endif
284}; 320};
285 321
286static int intc_set_sense(unsigned int irq, unsigned int type) 322static int intc_set_sense(unsigned int irq, unsigned int type)
@@ -430,6 +466,40 @@ static unsigned int __init intc_prio_data(struct intc_desc *desc,
430 return 0; 466 return 0;
431} 467}
432 468
469#ifdef CONFIG_CPU_SH3
470static unsigned int __init intc_ack_data(struct intc_desc *desc,
471 struct intc_desc_int *d,
472 intc_enum enum_id)
473{
474 struct intc_mask_reg *mr = desc->ack_regs;
475 unsigned int i, j, fn, mode;
476 unsigned long reg_e, reg_d;
477
478 for (i = 0; mr && enum_id && i < desc->nr_ack_regs; i++) {
479 mr = desc->ack_regs + i;
480
481 for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) {
482 if (mr->enum_ids[j] != enum_id)
483 continue;
484
485 fn = REG_FN_MODIFY_BASE;
486 mode = MODE_ENABLE_REG;
487 reg_e = mr->set_reg;
488 reg_d = mr->set_reg;
489
490 fn += (mr->reg_width >> 3) - 1;
491 return _INTC_MK(fn, mode,
492 intc_get_reg(d, reg_e),
493 intc_get_reg(d, reg_d),
494 1,
495 (mr->reg_width - 1) - j);
496 }
497 }
498
499 return 0;
500}
501#endif
502
433static unsigned int __init intc_sense_data(struct intc_desc *desc, 503static unsigned int __init intc_sense_data(struct intc_desc *desc,
434 struct intc_desc_int *d, 504 struct intc_desc_int *d,
435 intc_enum enum_id) 505 intc_enum enum_id)
@@ -530,6 +600,11 @@ static void __init intc_register_irq(struct intc_desc *desc,
530 600
531 /* irq should be disabled by default */ 601 /* irq should be disabled by default */
532 d->chip.mask(irq); 602 d->chip.mask(irq);
603
604#ifdef CONFIG_CPU_SH3
605 if (desc->ack_regs)
606 ack_handle[irq] = intc_ack_data(desc, d, enum_id);
607#endif
533} 608}
534 609
535static unsigned int __init save_reg(struct intc_desc_int *d, 610static unsigned int __init save_reg(struct intc_desc_int *d,
@@ -560,6 +635,9 @@ void __init register_intc_controller(struct intc_desc *desc)
560 d->nr_reg += desc->prio_regs ? desc->nr_prio_regs * 2 : 0; 635 d->nr_reg += desc->prio_regs ? desc->nr_prio_regs * 2 : 0;
561 d->nr_reg += desc->sense_regs ? desc->nr_sense_regs : 0; 636 d->nr_reg += desc->sense_regs ? desc->nr_sense_regs : 0;
562 637
638#ifdef CONFIG_CPU_SH3
639 d->nr_reg += desc->ack_regs ? desc->nr_ack_regs : 0;
640#endif
563 d->reg = alloc_bootmem(d->nr_reg * sizeof(*d->reg)); 641 d->reg = alloc_bootmem(d->nr_reg * sizeof(*d->reg));
564#ifdef CONFIG_SMP 642#ifdef CONFIG_SMP
565 d->smp = alloc_bootmem(d->nr_reg * sizeof(*d->smp)); 643 d->smp = alloc_bootmem(d->nr_reg * sizeof(*d->smp));
@@ -592,14 +670,23 @@ void __init register_intc_controller(struct intc_desc *desc)
592 } 670 }
593 } 671 }
594 672
595 BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
596
597 d->chip.name = desc->name; 673 d->chip.name = desc->name;
598 d->chip.mask = intc_disable; 674 d->chip.mask = intc_disable;
599 d->chip.unmask = intc_enable; 675 d->chip.unmask = intc_enable;
600 d->chip.mask_ack = intc_disable; 676 d->chip.mask_ack = intc_disable;
601 d->chip.set_type = intc_set_sense; 677 d->chip.set_type = intc_set_sense;
602 678
679#ifdef CONFIG_CPU_SH3
680 if (desc->ack_regs) {
681 for (i = 0; i < desc->nr_ack_regs; i++)
682 k += save_reg(d, k, desc->ack_regs[i].set_reg, 0);
683
684 d->chip.mask_ack = intc_mask_ack;
685 }
686#endif
687
688 BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
689
603 for (i = 0; i < desc->nr_vectors; i++) { 690 for (i = 0; i < desc->nr_vectors; i++) {
604 struct intc_vect *vect = desc->vectors + i; 691 struct intc_vect *vect = desc->vectors + i;
605 692
diff --git a/arch/sh/kernel/cpu/sh2a/fpu.c b/arch/sh/kernel/cpu/sh2a/fpu.c
index 5627c0b3ffa8..6df2fb98eb30 100644
--- a/arch/sh/kernel/cpu/sh2a/fpu.c
+++ b/arch/sh/kernel/cpu/sh2a/fpu.c
@@ -300,7 +300,7 @@ static int denormal_addf(int hx, int hy)
300 iy = hy & 0x7fffffff; 300 iy = hy & 0x7fffffff;
301 if (iy < 0x00800000) { 301 if (iy < 0x00800000) {
302 ix = denormal_subf1(ix, iy); 302 ix = denormal_subf1(ix, iy);
303 if (ix < 0) { 303 if ((int) ix < 0) {
304 ix = -ix; 304 ix = -ix;
305 sign ^= 0x80000000; 305 sign ^= 0x80000000;
306 } 306 }
@@ -385,7 +385,7 @@ static long long denormal_addd(long long hx, long long hy)
385 iy = hy & 0x7fffffffffffffffLL; 385 iy = hy & 0x7fffffffffffffffLL;
386 if (iy < 0x0010000000000000LL) { 386 if (iy < 0x0010000000000000LL) {
387 ix = denormal_subd1(ix, iy); 387 ix = denormal_subd1(ix, iy);
388 if (ix < 0) { 388 if ((int) ix < 0) {
389 ix = -ix; 389 ix = -ix;
390 sign ^= 0x8000000000000000LL; 390 sign ^= 0x8000000000000000LL;
391 } 391 }
diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile
index 3ae4d9111f19..511de55af832 100644
--- a/arch/sh/kernel/cpu/sh3/Makefile
+++ b/arch/sh/kernel/cpu/sh3/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the Linux/SuperH SH-3 backends. 2# Makefile for the Linux/SuperH SH-3 backends.
3# 3#
4 4
5obj-y := ex.o probe.o entry.o 5obj-y := ex.o probe.o entry.o setup-sh3.o
6 6
7# CPU subtype setup 7# CPU subtype setup
8obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o 8obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh3.c b/arch/sh/kernel/cpu/sh3/setup-sh3.c
new file mode 100644
index 000000000000..c98846857855
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/setup-sh3.c
@@ -0,0 +1,71 @@
1/*
2 * Shared SH3 Setup code
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/irq.h>
13#include <linux/io.h>
14
15/* All SH3 devices are equipped with IRQ0->5 (except sh7708) */
16
17enum {
18 UNUSED = 0,
19
20 /* interrupt sources */
21 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
22};
23
24static struct intc_vect vectors_irq0123[] __initdata = {
25 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
26 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
27};
28
29static struct intc_vect vectors_irq45[] __initdata = {
30 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
31};
32
33static struct intc_prio_reg prio_registers[] __initdata = {
34 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
35 { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
36};
37
38static struct intc_mask_reg ack_registers[] __initdata = {
39 { 0xa4000004, 0, 8, /* IRR0 */
40 { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
41};
42
43static struct intc_sense_reg sense_registers[] __initdata = {
44 { 0xa4000010, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
45};
46
47static DECLARE_INTC_DESC_ACK(intc_desc_irq0123, "sh3-irq0123",
48 vectors_irq0123, NULL, NULL,
49 prio_registers, sense_registers, ack_registers);
50
51static DECLARE_INTC_DESC_ACK(intc_desc_irq45, "sh3-irq45",
52 vectors_irq45, NULL, NULL,
53 prio_registers, sense_registers, ack_registers);
54
55#define INTC_ICR1 0xa4000010UL
56#define INTC_ICR1_IRQLVL (1<<14)
57
58void __init plat_irq_setup_pins(int mode)
59{
60 if (mode == IRQ_MODE_IRQ) {
61 ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
62 register_intc_controller(&intc_desc_irq0123);
63 return;
64 }
65 BUG();
66}
67
68void __init plat_irq_setup_sh3(void)
69{
70 register_intc_controller(&intc_desc_irq45);
71}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index f581534cb732..6468ae86b944 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -37,7 +37,7 @@ enum {
37}; 37};
38 38
39static struct intc_vect vectors[] __initdata = { 39static struct intc_vect vectors[] __initdata = {
40 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), 40 /* IRQ0->5 are handled in setup-sh3.c */
41 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720), 41 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
42 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), 42 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
43 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), 43 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
@@ -48,7 +48,7 @@ static struct intc_vect vectors[] __initdata = {
48 INTC_VECT(ADC_ADI, 0x980), 48 INTC_VECT(ADC_ADI, 0x980),
49 INTC_VECT(USB_USI0, 0xa20), INTC_VECT(USB_USI1, 0xa40), 49 INTC_VECT(USB_USI0, 0xa20), INTC_VECT(USB_USI1, 0xa40),
50 INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20), 50 INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20),
51 INTC_VECT(TPU3, 0xc80), INTC_VECT(TPU1, 0xca0), 51 INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0),
52 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 52 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
53 INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460), 53 INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
54 INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0), 54 INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
@@ -81,14 +81,6 @@ static struct intc_prio_reg prio_registers[] __initdata = {
81static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups, 81static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups,
82 NULL, prio_registers, NULL); 82 NULL, prio_registers, NULL);
83 83
84static struct intc_vect vectors_irq[] __initdata = {
85 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
86 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
87};
88
89static DECLARE_INTC_DESC(intc_desc_irq, "sh7705-irq", vectors_irq, NULL,
90 NULL, prio_registers, NULL);
91
92static struct plat_sci_port sci_platform_data[] = { 84static struct plat_sci_port sci_platform_data[] = {
93 { 85 {
94 .mapbase = 0xa4410000, 86 .mapbase = 0xa4410000,
@@ -159,16 +151,8 @@ static int __init sh7705_devices_setup(void)
159} 151}
160__initcall(sh7705_devices_setup); 152__initcall(sh7705_devices_setup);
161 153
162void __init plat_irq_setup_pins(int mode)
163{
164 if (mode == IRQ_MODE_IRQ) {
165 register_intc_controller(&intc_desc_irq);
166 return;
167 }
168 BUG();
169}
170
171void __init plat_irq_setup(void) 154void __init plat_irq_setup(void)
172{ 155{
173 register_intc_controller(&intc_desc); 156 register_intc_controller(&intc_desc);
157 plat_irq_setup_sh3();
174} 158}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index d3733b13ea52..93c55e2ed952 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -52,7 +52,7 @@ static struct intc_vect vectors[] __initdata = {
52#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ 52#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
53 defined(CONFIG_CPU_SUBTYPE_SH7707) || \ 53 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
54 defined(CONFIG_CPU_SUBTYPE_SH7709) 54 defined(CONFIG_CPU_SUBTYPE_SH7709)
55 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), 55 /* IRQ0->5 are handled in setup-sh3.c */
56 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), 56 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
57 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), 57 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
58 INTC_VECT(ADC_ADI, 0x980), 58 INTC_VECT(ADC_ADI, 0x980),
@@ -104,18 +104,6 @@ static struct intc_prio_reg prio_registers[] __initdata = {
104static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups, 104static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups,
105 NULL, prio_registers, NULL); 105 NULL, prio_registers, NULL);
106 106
107#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
108 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
109 defined(CONFIG_CPU_SUBTYPE_SH7709)
110static struct intc_vect vectors_irq[] __initdata = {
111 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
112 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
113};
114
115static DECLARE_INTC_DESC(intc_desc_irq, "sh770x-irq", vectors_irq, NULL,
116 NULL, prio_registers, NULL);
117#endif
118
119static struct resource rtc_resources[] = { 107static struct resource rtc_resources[] = {
120 [0] = { 108 [0] = {
121 .start = 0xfffffec0, 109 .start = 0xfffffec0,
@@ -194,24 +182,12 @@ static int __init sh770x_devices_setup(void)
194} 182}
195__initcall(sh770x_devices_setup); 183__initcall(sh770x_devices_setup);
196 184
197#define INTC_ICR1 0xa4000010UL 185void __init plat_irq_setup(void)
198#define INTC_ICR1_IRQLVL (1<<14)
199
200void __init plat_irq_setup_pins(int mode)
201{ 186{
202 if (mode == IRQ_MODE_IRQ) { 187 register_intc_controller(&intc_desc);
203#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ 188#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
204 defined(CONFIG_CPU_SUBTYPE_SH7707) || \ 189 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
205 defined(CONFIG_CPU_SUBTYPE_SH7709) 190 defined(CONFIG_CPU_SUBTYPE_SH7709)
206 ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1); 191 plat_irq_setup_sh3();
207 register_intc_controller(&intc_desc_irq);
208 return;
209#endif 192#endif
210 }
211 BUG();
212}
213
214void __init plat_irq_setup(void)
215{
216 register_intc_controller(&intc_desc);
217} 193}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index 7406c9ad9259..77eee481de47 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -38,7 +38,7 @@ enum {
38}; 38};
39 39
40static struct intc_vect vectors[] __initdata = { 40static struct intc_vect vectors[] __initdata = {
41 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), 41 /* IRQ0->5 are handled in setup-sh3.c */
42 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), 42 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
43 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), 43 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
44 INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0), 44 INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
@@ -79,10 +79,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
79 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } }, 79 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
80 { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } }, 80 { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
81 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC1, SCIF0, SCIF1 } }, 81 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC1, SCIF0, SCIF1 } },
82 { 0xa4080000, 0, 16, 4, /* IPRF */ { 0, DMAC2 } }, 82 { 0xa4080000, 0, 16, 4, /* IPRF */ { IPSEC, DMAC2 } },
83#ifdef CONFIG_CPU_SUBTYPE_SH7710
84 { 0xa4080000, 0, 16, 4, /* IPRF */ { IPSEC } },
85#endif
86 { 0xa4080002, 0, 16, 4, /* IPRG */ { EDMAC0, EDMAC1, EDMAC2 } }, 83 { 0xa4080002, 0, 16, 4, /* IPRG */ { EDMAC0, EDMAC1, EDMAC2 } },
87 { 0xa4080004, 0, 16, 4, /* IPRH */ { 0, 0, 0, SIOF0 } }, 84 { 0xa4080004, 0, 16, 4, /* IPRH */ { 0, 0, 0, SIOF0 } },
88 { 0xa4080006, 0, 16, 4, /* IPRI */ { 0, 0, SIOF1 } }, 85 { 0xa4080006, 0, 16, 4, /* IPRI */ { 0, 0, SIOF1 } },
@@ -91,14 +88,6 @@ static struct intc_prio_reg prio_registers[] __initdata = {
91static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups, 88static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups,
92 NULL, prio_registers, NULL); 89 NULL, prio_registers, NULL);
93 90
94static struct intc_vect vectors_irq[] __initdata = {
95 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
96 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
97};
98
99static DECLARE_INTC_DESC(intc_desc_irq, "sh7710-irq", vectors_irq, NULL,
100 NULL, prio_registers, NULL);
101
102static struct resource rtc_resources[] = { 91static struct resource rtc_resources[] = {
103 [0] = { 92 [0] = {
104 .start = 0xa413fec0, 93 .start = 0xa413fec0,
@@ -170,16 +159,8 @@ static int __init sh7710_devices_setup(void)
170} 159}
171__initcall(sh7710_devices_setup); 160__initcall(sh7710_devices_setup);
172 161
173void __init plat_irq_setup_pins(int mode)
174{
175 if (mode == IRQ_MODE_IRQ) {
176 register_intc_controller(&intc_desc_irq);
177 return;
178 }
179 BUG();
180}
181
182void __init plat_irq_setup(void) 162void __init plat_irq_setup(void)
183{ 163{
184 register_intc_controller(&intc_desc); 164 register_intc_controller(&intc_desc);
165 plat_irq_setup_sh3();
185} 166}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index 8028082527c5..f807a21b066c 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -19,10 +19,6 @@
19#include <linux/serial_sci.h> 19#include <linux/serial_sci.h>
20#include <asm/rtc.h> 20#include <asm/rtc.h>
21 21
22#define INTC_ICR1 0xA4140010UL
23#define INTC_ICR_IRLM 0x4000
24#define INTC_ICR_IRQ (~INTC_ICR_IRLM)
25
26static struct resource rtc_resources[] = { 22static struct resource rtc_resources[] = {
27 [0] = { 23 [0] = {
28 .start = 0xa413fec0, 24 .start = 0xa413fec0,
@@ -170,6 +166,7 @@ enum {
170}; 166};
171 167
172static struct intc_vect vectors[] __initdata = { 168static struct intc_vect vectors[] __initdata = {
169 /* IRQ0->5 are handled in setup-sh3.c */
173 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 170 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
174 INTC_VECT(TMU2, 0x440), INTC_VECT(RTC_ATI, 0x480), 171 INTC_VECT(TMU2, 0x440), INTC_VECT(RTC_ATI, 0x480),
175 INTC_VECT(RTC_PRI, 0x4a0), INTC_VECT(RTC_CUI, 0x4c0), 172 INTC_VECT(RTC_PRI, 0x4a0), INTC_VECT(RTC_CUI, 0x4c0),
@@ -214,11 +211,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
214 { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } }, 211 { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
215 { 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } }, 212 { 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
216 { 0xA4140018UL, 0, 16, 4, /* IPRD */ { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } }, 213 { 0xA4140018UL, 0, 16, 4, /* IPRD */ { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } },
217#if defined(CONFIG_CPU_SUBTYPE_SH7720)
218 { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } }, 214 { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } },
219#else
220 { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, 0 } },
221#endif
222 { 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } }, 215 { 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } },
223 { 0xA4080002UL, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, 0, 0 } }, 216 { 0xA4080002UL, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, 0, 0 } },
224 { 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } }, 217 { 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } },
@@ -229,32 +222,8 @@ static struct intc_prio_reg prio_registers[] __initdata = {
229static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups, 222static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups,
230 NULL, prio_registers, NULL); 223 NULL, prio_registers, NULL);
231 224
232static struct intc_sense_reg sense_registers[] __initdata = {
233 { INTC_ICR1, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
234};
235
236static struct intc_vect vectors_irq[] __initdata = {
237 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
238 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
239 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
240};
241
242static DECLARE_INTC_DESC(intc_irq_desc, "sh7720-irq", vectors_irq,
243 NULL, NULL, prio_registers, sense_registers);
244
245void __init plat_irq_setup_pins(int mode)
246{
247 switch (mode) {
248 case IRQ_MODE_IRQ:
249 ctrl_outw(ctrl_inw(INTC_ICR1) & INTC_ICR_IRQ, INTC_ICR1);
250 register_intc_controller(&intc_irq_desc);
251 break;
252 default:
253 BUG();
254 }
255}
256
257void __init plat_irq_setup(void) 225void __init plat_irq_setup(void)
258{ 226{
259 register_intc_controller(&intc_desc); 227 register_intc_controller(&intc_desc);
228 plat_irq_setup_sh3();
260} 229}
diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S
index ba8750176d91..05372ed6c568 100644
--- a/arch/sh/kernel/cpu/sh5/entry.S
+++ b/arch/sh/kernel/cpu/sh5/entry.S
@@ -143,12 +143,22 @@ resvec_save_area:
143trap_jtable: 143trap_jtable:
144 .long do_exception_error /* 0x000 */ 144 .long do_exception_error /* 0x000 */
145 .long do_exception_error /* 0x020 */ 145 .long do_exception_error /* 0x020 */
146#ifdef CONFIG_MMU
146 .long tlb_miss_load /* 0x040 */ 147 .long tlb_miss_load /* 0x040 */
147 .long tlb_miss_store /* 0x060 */ 148 .long tlb_miss_store /* 0x060 */
149#else
150 .long do_exception_error
151 .long do_exception_error
152#endif
148 ! ARTIFICIAL pseudo-EXPEVT setting 153 ! ARTIFICIAL pseudo-EXPEVT setting
149 .long do_debug_interrupt /* 0x080 */ 154 .long do_debug_interrupt /* 0x080 */
155#ifdef CONFIG_MMU
150 .long tlb_miss_load /* 0x0A0 */ 156 .long tlb_miss_load /* 0x0A0 */
151 .long tlb_miss_store /* 0x0C0 */ 157 .long tlb_miss_store /* 0x0C0 */
158#else
159 .long do_exception_error
160 .long do_exception_error
161#endif
152 .long do_address_error_load /* 0x0E0 */ 162 .long do_address_error_load /* 0x0E0 */
153 .long do_address_error_store /* 0x100 */ 163 .long do_address_error_store /* 0x100 */
154#ifdef CONFIG_SH_FPU 164#ifdef CONFIG_SH_FPU
@@ -185,10 +195,18 @@ trap_jtable:
185 .endr 195 .endr
186 .long do_IRQ /* 0xA00 */ 196 .long do_IRQ /* 0xA00 */
187 .long do_IRQ /* 0xA20 */ 197 .long do_IRQ /* 0xA20 */
198#ifdef CONFIG_MMU
188 .long itlb_miss_or_IRQ /* 0xA40 */ 199 .long itlb_miss_or_IRQ /* 0xA40 */
200#else
201 .long do_IRQ
202#endif
189 .long do_IRQ /* 0xA60 */ 203 .long do_IRQ /* 0xA60 */
190 .long do_IRQ /* 0xA80 */ 204 .long do_IRQ /* 0xA80 */
205#ifdef CONFIG_MMU
191 .long itlb_miss_or_IRQ /* 0xAA0 */ 206 .long itlb_miss_or_IRQ /* 0xAA0 */
207#else
208 .long do_IRQ
209#endif
192 .long do_exception_error /* 0xAC0 */ 210 .long do_exception_error /* 0xAC0 */
193 .long do_address_error_exec /* 0xAE0 */ 211 .long do_address_error_exec /* 0xAE0 */
194 .rept 8 212 .rept 8
@@ -274,6 +292,7 @@ not_a_tlb_miss:
274 * Instead of '.space 1024-TEXT_SIZE' place the RESVEC 292 * Instead of '.space 1024-TEXT_SIZE' place the RESVEC
275 * block making sure the final alignment is correct. 293 * block making sure the final alignment is correct.
276 */ 294 */
295#ifdef CONFIG_MMU
277tlb_miss: 296tlb_miss:
278 synco /* TAKum03020 (but probably a good idea anyway.) */ 297 synco /* TAKum03020 (but probably a good idea anyway.) */
279 putcon SP, KCR1 298 putcon SP, KCR1
@@ -377,6 +396,9 @@ fixup_to_invoke_general_handler:
377 getcon KCR1, SP 396 getcon KCR1, SP
378 pta handle_exception, tr0 397 pta handle_exception, tr0
379 blink tr0, ZERO 398 blink tr0, ZERO
399#else /* CONFIG_MMU */
400 .balign 256
401#endif
380 402
381/* NB TAKE GREAT CARE HERE TO ENSURE THAT THE INTERRUPT CODE 403/* NB TAKE GREAT CARE HERE TO ENSURE THAT THE INTERRUPT CODE
382 DOES END UP AT VBR+0x600 */ 404 DOES END UP AT VBR+0x600 */
@@ -1103,6 +1125,7 @@ restore_all:
1103 * fpu_error_or_IRQ? is a helper to deflect to the right cause. 1125 * fpu_error_or_IRQ? is a helper to deflect to the right cause.
1104 * 1126 *
1105 */ 1127 */
1128#ifdef CONFIG_MMU
1106tlb_miss_load: 1129tlb_miss_load:
1107 or SP, ZERO, r2 1130 or SP, ZERO, r2
1108 or ZERO, ZERO, r3 /* Read */ 1131 or ZERO, ZERO, r3 /* Read */
@@ -1132,6 +1155,7 @@ call_do_page_fault:
1132 movi do_page_fault, r6 1155 movi do_page_fault, r6
1133 ptabs r6, tr0 1156 ptabs r6, tr0
1134 blink tr0, ZERO 1157 blink tr0, ZERO
1158#endif /* CONFIG_MMU */
1135 1159
1136fpu_error_or_IRQA: 1160fpu_error_or_IRQA:
1137 pta its_IRQ, tr0 1161 pta its_IRQ, tr0
@@ -1481,6 +1505,7 @@ poke_real_address_q:
1481 ptabs LINK, tr0 1505 ptabs LINK, tr0
1482 blink tr0, r63 1506 blink tr0, r63
1483 1507
1508#ifdef CONFIG_MMU
1484/* 1509/*
1485 * --- User Access Handling Section 1510 * --- User Access Handling Section
1486 */ 1511 */
@@ -1604,6 +1629,7 @@ ___clear_user_exit:
1604 ptabs LINK, tr0 1629 ptabs LINK, tr0
1605 blink tr0, ZERO 1630 blink tr0, ZERO
1606 1631
1632#endif /* CONFIG_MMU */
1607 1633
1608/* 1634/*
1609 * int __strncpy_from_user(unsigned long __dest, unsigned long __src, 1635 * int __strncpy_from_user(unsigned long __dest, unsigned long __src,
@@ -2014,9 +2040,11 @@ sa_default_restorer:
2014 .global asm_uaccess_start /* Just a marker */ 2040 .global asm_uaccess_start /* Just a marker */
2015asm_uaccess_start: 2041asm_uaccess_start:
2016 2042
2043#ifdef CONFIG_MMU
2017 .long ___copy_user1, ___copy_user_exit 2044 .long ___copy_user1, ___copy_user_exit
2018 .long ___copy_user2, ___copy_user_exit 2045 .long ___copy_user2, ___copy_user_exit
2019 .long ___clear_user1, ___clear_user_exit 2046 .long ___clear_user1, ___clear_user_exit
2047#endif
2020 .long ___strncpy_from_user1, ___strncpy_from_user_exit 2048 .long ___strncpy_from_user1, ___strncpy_from_user_exit
2021 .long ___strnlen_user1, ___strnlen_user_exit 2049 .long ___strnlen_user1, ___strnlen_user_exit
2022 .long ___get_user_asm_b1, ___get_user_asm_b_exit 2050 .long ___get_user_asm_b1, ___get_user_asm_b_exit
diff --git a/arch/sh/kernel/cpu/sh5/probe.c b/arch/sh/kernel/cpu/sh5/probe.c
index 31f8cb0f6374..92ad844b5c12 100644
--- a/arch/sh/kernel/cpu/sh5/probe.c
+++ b/arch/sh/kernel/cpu/sh5/probe.c
@@ -15,6 +15,7 @@
15#include <linux/string.h> 15#include <linux/string.h>
16#include <asm/processor.h> 16#include <asm/processor.h>
17#include <asm/cache.h> 17#include <asm/cache.h>
18#include <asm/tlb.h>
18 19
19int __init detect_cpu_and_cache_system(void) 20int __init detect_cpu_and_cache_system(void)
20{ 21{
@@ -67,5 +68,8 @@ int __init detect_cpu_and_cache_system(void)
67 set_bit(SH_CACHE_MODE_WB, &(boot_cpu_data.dcache.flags)); 68 set_bit(SH_CACHE_MODE_WB, &(boot_cpu_data.dcache.flags));
68#endif 69#endif
69 70
71 /* Setup some I/D TLB defaults */
72 sh64_tlb_init();
73
70 return 0; 74 return 0;
71} 75}
diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c
index 957f25611543..6b7d166694e2 100644
--- a/arch/sh/kernel/early_printk.c
+++ b/arch/sh/kernel/early_printk.c
@@ -141,7 +141,9 @@ static void scif_sercon_init(char *s)
141 */ 141 */
142static void scif_sercon_init(char *s) 142static void scif_sercon_init(char *s)
143{ 143{
144 struct uart_port *port = &scif_port;
144 unsigned baud = DEFAULT_BAUD; 145 unsigned baud = DEFAULT_BAUD;
146 unsigned int status;
145 char *e; 147 char *e;
146 148
147 if (*s == ',') 149 if (*s == ',')
@@ -160,19 +162,25 @@ static void scif_sercon_init(char *s)
160 baud = DEFAULT_BAUD; 162 baud = DEFAULT_BAUD;
161 } 163 }
162 164
163 ctrl_outw(0, scif_port.mapbase + 8); 165 do {
164 ctrl_outw(0, scif_port.mapbase); 166 status = sci_in(port, SCxSR);
167 } while (!(status & SCxSR_TEND(port)));
168
169 sci_out(port, SCSCR, 0); /* TE=0, RE=0 */
170 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
171 sci_out(port, SCSMR, 0);
165 172
166 /* Set baud rate */ 173 /* Set baud rate */
167 ctrl_outb((CONFIG_SH_PCLK_FREQ + 16 * baud) / 174 sci_out(port, SCBRR, (CONFIG_SH_PCLK_FREQ + 16 * baud) /
168 (32 * baud) - 1, scif_port.mapbase + 4); 175 (32 * baud) - 1);
169 176 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
170 ctrl_outw(12, scif_port.mapbase + 24); 177
171 ctrl_outw(8, scif_port.mapbase + 24); 178 sci_out(port, SCSPTR, 0);
172 ctrl_outw(0, scif_port.mapbase + 32); 179 sci_out(port, SCxSR, 0x60);
173 ctrl_outw(0x60, scif_port.mapbase + 16); 180 sci_out(port, SCLSR, 0);
174 ctrl_outw(0, scif_port.mapbase + 36); 181
175 ctrl_outw(0x30, scif_port.mapbase + 8); 182 sci_out(port, SCFCR, 0);
183 sci_out(port, SCSCR, 0x30); /* TE=1, RE=1 */
176} 184}
177#endif /* defined(CONFIG_CPU_SUBTYPE_SH7720) */ 185#endif /* defined(CONFIG_CPU_SUBTYPE_SH7720) */
178#endif /* !defined(CONFIG_SH_STANDARD_BIOS) */ 186#endif /* !defined(CONFIG_SH_STANDARD_BIOS) */
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 284f66f1ebbe..516bde9c50fa 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -53,6 +53,7 @@ EXPORT_SYMBOL(cpu_data);
53 * sh_mv= on the command line, prior to .machvec.init teardown. 53 * sh_mv= on the command line, prior to .machvec.init teardown.
54 */ 54 */
55struct sh_machine_vector sh_mv = { .mv_name = "generic", }; 55struct sh_machine_vector sh_mv = { .mv_name = "generic", };
56EXPORT_SYMBOL(sh_mv);
56 57
57#ifdef CONFIG_VT 58#ifdef CONFIG_VT
58struct screen_info screen_info; 59struct screen_info screen_info;
@@ -76,11 +77,18 @@ static struct resource data_resource = {
76 .flags = IORESOURCE_BUSY | IORESOURCE_MEM, 77 .flags = IORESOURCE_BUSY | IORESOURCE_MEM,
77}; 78};
78 79
80static struct resource bss_resource = {
81 .name = "Kernel bss",
82 .flags = IORESOURCE_BUSY | IORESOURCE_MEM,
83};
84
79unsigned long memory_start; 85unsigned long memory_start;
80EXPORT_SYMBOL(memory_start); 86EXPORT_SYMBOL(memory_start);
81unsigned long memory_end = 0; 87unsigned long memory_end = 0;
82EXPORT_SYMBOL(memory_end); 88EXPORT_SYMBOL(memory_end);
83 89
90static struct resource mem_resources[MAX_NUMNODES];
91
84int l1i_cache_shape, l1d_cache_shape, l2_cache_shape; 92int l1i_cache_shape, l1d_cache_shape, l2_cache_shape;
85 93
86static int __init early_parse_mem(char *p) 94static int __init early_parse_mem(char *p)
@@ -169,6 +177,40 @@ static inline void __init reserve_crashkernel(void)
169{} 177{}
170#endif 178#endif
171 179
180void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
181 unsigned long end_pfn)
182{
183 struct resource *res = &mem_resources[nid];
184
185 WARN_ON(res->name); /* max one active range per node for now */
186
187 res->name = "System RAM";
188 res->start = start_pfn << PAGE_SHIFT;
189 res->end = (end_pfn << PAGE_SHIFT) - 1;
190 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
191 if (request_resource(&iomem_resource, res)) {
192 pr_err("unable to request memory_resource 0x%lx 0x%lx\n",
193 start_pfn, end_pfn);
194 return;
195 }
196
197 /*
198 * We don't know which RAM region contains kernel data,
199 * so we try it repeatedly and let the resource manager
200 * test it.
201 */
202 request_resource(res, &code_resource);
203 request_resource(res, &data_resource);
204 request_resource(res, &bss_resource);
205
206#ifdef CONFIG_KEXEC
207 if (crashk_res.start != crashk_res.end)
208 request_resource(res, &crashk_res);
209#endif
210
211 add_active_range(nid, start_pfn, end_pfn);
212}
213
172void __init setup_bootmem_allocator(unsigned long free_pfn) 214void __init setup_bootmem_allocator(unsigned long free_pfn)
173{ 215{
174 unsigned long bootmap_size; 216 unsigned long bootmap_size;
@@ -181,7 +223,7 @@ void __init setup_bootmem_allocator(unsigned long free_pfn)
181 bootmap_size = init_bootmem_node(NODE_DATA(0), free_pfn, 223 bootmap_size = init_bootmem_node(NODE_DATA(0), free_pfn,
182 min_low_pfn, max_low_pfn); 224 min_low_pfn, max_low_pfn);
183 225
184 add_active_range(0, min_low_pfn, max_low_pfn); 226 __add_active_range(0, min_low_pfn, max_low_pfn);
185 register_bootmem_low_pages(); 227 register_bootmem_low_pages();
186 228
187 node_set_online(0); 229 node_set_online(0);
@@ -267,6 +309,8 @@ void __init setup_arch(char **cmdline_p)
267 code_resource.end = virt_to_phys(_etext)-1; 309 code_resource.end = virt_to_phys(_etext)-1;
268 data_resource.start = virt_to_phys(_etext); 310 data_resource.start = virt_to_phys(_etext);
269 data_resource.end = virt_to_phys(_edata)-1; 311 data_resource.end = virt_to_phys(_edata)-1;
312 bss_resource.start = virt_to_phys(__bss_start);
313 bss_resource.end = virt_to_phys(_ebss)-1;
270 314
271 memory_start = (unsigned long)__va(__MEMORY_START); 315 memory_start = (unsigned long)__va(__MEMORY_START);
272 if (!memory_end) 316 if (!memory_end)
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c
index 6d405462cee8..8f916536719c 100644
--- a/arch/sh/kernel/sh_ksyms_32.c
+++ b/arch/sh/kernel/sh_ksyms_32.c
@@ -20,8 +20,6 @@
20extern int dump_fpu(struct pt_regs *, elf_fpregset_t *); 20extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
21extern struct hw_interrupt_type no_irq_type; 21extern struct hw_interrupt_type no_irq_type;
22 22
23EXPORT_SYMBOL(sh_mv);
24
25/* platform dependent support */ 23/* platform dependent support */
26EXPORT_SYMBOL(dump_fpu); 24EXPORT_SYMBOL(dump_fpu);
27EXPORT_SYMBOL(kernel_thread); 25EXPORT_SYMBOL(kernel_thread);
diff --git a/arch/sh/kernel/sh_ksyms_64.c b/arch/sh/kernel/sh_ksyms_64.c
index a310c9707f03..9324d32adacc 100644
--- a/arch/sh/kernel/sh_ksyms_64.c
+++ b/arch/sh/kernel/sh_ksyms_64.c
@@ -16,6 +16,7 @@
16#include <linux/in6.h> 16#include <linux/in6.h>
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/screen_info.h> 18#include <linux/screen_info.h>
19#include <asm/cacheflush.h>
19#include <asm/processor.h> 20#include <asm/processor.h>
20#include <asm/uaccess.h> 21#include <asm/uaccess.h>
21#include <asm/checksum.h> 22#include <asm/checksum.h>
@@ -29,25 +30,50 @@ extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
29EXPORT_SYMBOL(dump_fpu); 30EXPORT_SYMBOL(dump_fpu);
30EXPORT_SYMBOL(kernel_thread); 31EXPORT_SYMBOL(kernel_thread);
31 32
33#if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU)
34EXPORT_SYMBOL(clear_user_page);
35#endif
36
37#ifndef CONFIG_CACHE_OFF
38EXPORT_SYMBOL(flush_dcache_page);
39#endif
40
32/* Networking helper routines. */ 41/* Networking helper routines. */
42EXPORT_SYMBOL(csum_partial);
33EXPORT_SYMBOL(csum_partial_copy_nocheck); 43EXPORT_SYMBOL(csum_partial_copy_nocheck);
44#ifdef CONFIG_IPV6
45EXPORT_SYMBOL(csum_ipv6_magic);
46#endif
34 47
35#ifdef CONFIG_VT 48#ifdef CONFIG_VT
36EXPORT_SYMBOL(screen_info); 49EXPORT_SYMBOL(screen_info);
37#endif 50#endif
38 51
52EXPORT_SYMBOL(__put_user_asm_b);
53EXPORT_SYMBOL(__put_user_asm_w);
39EXPORT_SYMBOL(__put_user_asm_l); 54EXPORT_SYMBOL(__put_user_asm_l);
55EXPORT_SYMBOL(__put_user_asm_q);
56EXPORT_SYMBOL(__get_user_asm_b);
57EXPORT_SYMBOL(__get_user_asm_w);
40EXPORT_SYMBOL(__get_user_asm_l); 58EXPORT_SYMBOL(__get_user_asm_l);
59EXPORT_SYMBOL(__get_user_asm_q);
60EXPORT_SYMBOL(__strnlen_user);
61EXPORT_SYMBOL(__strncpy_from_user);
62EXPORT_SYMBOL(clear_page);
63EXPORT_SYMBOL(__clear_user);
41EXPORT_SYMBOL(copy_page); 64EXPORT_SYMBOL(copy_page);
42EXPORT_SYMBOL(__copy_user); 65EXPORT_SYMBOL(__copy_user);
43EXPORT_SYMBOL(empty_zero_page); 66EXPORT_SYMBOL(empty_zero_page);
44EXPORT_SYMBOL(memcpy); 67EXPORT_SYMBOL(memcpy);
45EXPORT_SYMBOL(__udelay); 68EXPORT_SYMBOL(__udelay);
46EXPORT_SYMBOL(__ndelay); 69EXPORT_SYMBOL(__ndelay);
70EXPORT_SYMBOL(__const_udelay);
47 71
48/* Ugh. These come in from libgcc.a at link time. */ 72/* Ugh. These come in from libgcc.a at link time. */
49#define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name) 73#define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name)
50 74
51DECLARE_EXPORT(__sdivsi3); 75DECLARE_EXPORT(__sdivsi3);
76DECLARE_EXPORT(__sdivsi3_2);
52DECLARE_EXPORT(__muldi3); 77DECLARE_EXPORT(__muldi3);
53DECLARE_EXPORT(__udivsi3); 78DECLARE_EXPORT(__udivsi3);
79DECLARE_EXPORT(__div_table);
diff --git a/arch/sh/kernel/time_64.c b/arch/sh/kernel/time_64.c
index 898977ee2030..022a55f1c1d4 100644
--- a/arch/sh/kernel/time_64.c
+++ b/arch/sh/kernel/time_64.c
@@ -172,6 +172,7 @@ void do_gettimeofday(struct timeval *tv)
172 tv->tv_sec = sec; 172 tv->tv_sec = sec;
173 tv->tv_usec = usec; 173 tv->tv_usec = usec;
174} 174}
175EXPORT_SYMBOL(do_gettimeofday);
175 176
176int do_settimeofday(struct timespec *tv) 177int do_settimeofday(struct timespec *tv)
177{ 178{
@@ -240,7 +241,7 @@ static inline void do_timer_interrupt(void)
240 * the irq version of write_lock because as just said we have irq 241 * the irq version of write_lock because as just said we have irq
241 * locally disabled. -arca 242 * locally disabled. -arca
242 */ 243 */
243 write_lock(&xtime_lock); 244 write_seqlock(&xtime_lock);
244 asm ("getcon cr62, %0" : "=r" (current_ctc)); 245 asm ("getcon cr62, %0" : "=r" (current_ctc));
245 ctc_last_interrupt = (unsigned long) current_ctc; 246 ctc_last_interrupt = (unsigned long) current_ctc;
246 247
@@ -266,7 +267,7 @@ static inline void do_timer_interrupt(void)
266 /* do it again in 60 s */ 267 /* do it again in 60 s */
267 last_rtc_update = xtime.tv_sec - 600; 268 last_rtc_update = xtime.tv_sec - 600;
268 } 269 }
269 write_unlock(&xtime_lock); 270 write_sequnlock(&xtime_lock);
270 271
271#ifndef CONFIG_SMP 272#ifndef CONFIG_SMP
272 update_process_times(user_mode(get_irq_regs())); 273 update_process_times(user_mode(get_irq_regs()));
diff --git a/arch/sh/lib64/dbg.c b/arch/sh/lib64/dbg.c
index 75825ef6e084..2fb8eaf6de60 100644
--- a/arch/sh/lib64/dbg.c
+++ b/arch/sh/lib64/dbg.c
@@ -186,8 +186,8 @@ void evt_debug(int evt, int ret_addr, int event, int tra, struct pt_regs *regs)
186 rr->pc = regs->pc; 186 rr->pc = regs->pc;
187 187
188 if (sp < stack_bottom + 3092) { 188 if (sp < stack_bottom + 3092) {
189 printk("evt_debug : stack underflow report\n");
190 int i, j; 189 int i, j;
190 printk("evt_debug : stack underflow report\n");
191 for (j=0, i = event_ptr; j<16; j++) { 191 for (j=0, i = event_ptr; j<16; j++) {
192 rr = event_ring + i; 192 rr = event_ring + i;
193 printk("evt=%08x event=%08x tra=%08x pid=%5d sp=%08lx pc=%08lx\n", 193 printk("evt=%08x event=%08x tra=%08x pid=%5d sp=%08lx pc=%08lx\n",
diff --git a/arch/sh/mm/Makefile_64 b/arch/sh/mm/Makefile_64
index cbd6aa33c5ac..0d92a8a3ac9a 100644
--- a/arch/sh/mm/Makefile_64
+++ b/arch/sh/mm/Makefile_64
@@ -2,10 +2,11 @@
2# Makefile for the Linux SuperH-specific parts of the memory manager. 2# Makefile for the Linux SuperH-specific parts of the memory manager.
3# 3#
4 4
5obj-y := init.o extable_64.o consistent.o 5obj-y := init.o consistent.o
6 6
7mmu-y := tlb-nommu.o pg-nommu.o 7mmu-y := tlb-nommu.o pg-nommu.o extable_32.o
8mmu-$(CONFIG_MMU) := fault_64.o ioremap_64.o tlbflush_64.o tlb-sh5.o 8mmu-$(CONFIG_MMU) := fault_64.o ioremap_64.o tlbflush_64.o tlb-sh5.o \
9 extable_64.o
9 10
10ifndef CONFIG_CACHE_OFF 11ifndef CONFIG_CACHE_OFF
11obj-y += cache-sh5.o 12obj-y += cache-sh5.o
diff --git a/arch/sh/mm/cache-sh5.c b/arch/sh/mm/cache-sh5.c
index 3877321fcede..9e277ec7d536 100644
--- a/arch/sh/mm/cache-sh5.c
+++ b/arch/sh/mm/cache-sh5.c
@@ -714,6 +714,7 @@ void flush_cache_sigtramp(unsigned long vaddr)
714 sh64_icache_inv_current_user_range(vaddr, end); 714 sh64_icache_inv_current_user_range(vaddr, end);
715} 715}
716 716
717#ifdef CONFIG_MMU
717/* 718/*
718 * These *MUST* lie in an area of virtual address space that's otherwise 719 * These *MUST* lie in an area of virtual address space that's otherwise
719 * unused. 720 * unused.
@@ -830,3 +831,4 @@ void clear_user_page(void *to, unsigned long address, struct page *page)
830 else 831 else
831 sh64_clear_user_page_coloured(to, address); 832 sh64_clear_user_page_coloured(to, address);
832} 833}
834#endif
diff --git a/arch/sh/mm/ioremap_64.c b/arch/sh/mm/ioremap_64.c
index cea224c3e49b..6e0be24d26e2 100644
--- a/arch/sh/mm/ioremap_64.c
+++ b/arch/sh/mm/ioremap_64.c
@@ -343,6 +343,7 @@ unsigned long onchip_remap(unsigned long phys, unsigned long size, const char *n
343 343
344 return shmedia_alloc_io(phys, size, name); 344 return shmedia_alloc_io(phys, size, name);
345} 345}
346EXPORT_SYMBOL(onchip_remap);
346 347
347void onchip_unmap(unsigned long vaddr) 348void onchip_unmap(unsigned long vaddr)
348{ 349{
@@ -370,6 +371,7 @@ void onchip_unmap(unsigned long vaddr)
370 kfree(res); 371 kfree(res);
371 } 372 }
372} 373}
374EXPORT_SYMBOL(onchip_unmap);
373 375
374#ifdef CONFIG_PROC_FS 376#ifdef CONFIG_PROC_FS
375static int 377static int
diff --git a/arch/sh/mm/numa.c b/arch/sh/mm/numa.c
index 2de7302724fc..1663199ce888 100644
--- a/arch/sh/mm/numa.c
+++ b/arch/sh/mm/numa.c
@@ -59,7 +59,7 @@ void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end)
59 free_pfn = start_pfn = start >> PAGE_SHIFT; 59 free_pfn = start_pfn = start >> PAGE_SHIFT;
60 end_pfn = end >> PAGE_SHIFT; 60 end_pfn = end >> PAGE_SHIFT;
61 61
62 add_active_range(nid, start_pfn, end_pfn); 62 __add_active_range(nid, start_pfn, end_pfn);
63 63
64 /* Node-local pgdat */ 64 /* Node-local pgdat */
65 NODE_DATA(nid) = pfn_to_kaddr(free_pfn); 65 NODE_DATA(nid) = pfn_to_kaddr(free_pfn);
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index 987c6682bf99..1bba7d36be90 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -28,7 +28,6 @@ HD64465 HD64465
287751SYSTEMH SH_7751_SYSTEMH 287751SYSTEMH SH_7751_SYSTEMH
29HP6XX SH_HP6XX 29HP6XX SH_HP6XX
30DREAMCAST SH_DREAMCAST 30DREAMCAST SH_DREAMCAST
31MPC1211 SH_MPC1211
32SNAPGEAR SH_SECUREEDGE5410 31SNAPGEAR SH_SECUREEDGE5410
33EDOSK7705 SH_EDOSK7705 32EDOSK7705 SH_EDOSK7705
34SH4202_MICRODEV SH_SH4202_MICRODEV 33SH4202_MICRODEV SH_SH4202_MICRODEV
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index bbcafaa160c0..fe361ae7ef2f 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -335,6 +335,7 @@ config X86_RDC321X
335 select GENERIC_GPIO 335 select GENERIC_GPIO
336 select LEDS_CLASS 336 select LEDS_CLASS
337 select LEDS_GPIO 337 select LEDS_GPIO
338 select NEW_LEDS
338 help 339 help
339 This option is needed for RDC R-321x system-on-chip, also known 340 This option is needed for RDC R-321x system-on-chip, also known
340 as R-8610-(G). 341 as R-8610-(G).
@@ -1662,7 +1663,6 @@ config GEODE_MFGPT_TIMER
1662 1663
1663config OLPC 1664config OLPC
1664 bool "One Laptop Per Child support" 1665 bool "One Laptop Per Child support"
1665 depends on MGEODE_LX
1666 default n 1666 default n
1667 help 1667 help
1668 Add support for detecting the unique features of the OLPC 1668 Add support for detecting the unique features of the OLPC
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 238468ae1993..c2e1ce33c7cb 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -6,6 +6,7 @@
6 6
7#include <linux/cpu.h> 7#include <linux/cpu.h>
8 8
9#include <asm/pat.h>
9#include <asm/processor.h> 10#include <asm/processor.h>
10 11
11struct cpuid_bit { 12struct cpuid_bit {
@@ -48,3 +49,23 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
48 set_cpu_cap(c, cb->feature); 49 set_cpu_cap(c, cb->feature);
49 } 50 }
50} 51}
52
53#ifdef CONFIG_X86_PAT
54void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
55{
56 switch (c->x86_vendor) {
57 case X86_VENDOR_AMD:
58 if (c->x86 >= 0xf && c->x86 <= 0x11)
59 return;
60 break;
61 case X86_VENDOR_INTEL:
62 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
63 return;
64 break;
65 }
66
67 pat_disable(cpu_has_pat ?
68 "PAT disabled. Not yet verified on this CPU type." :
69 "PAT not supported by CPU.");
70}
71#endif
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 35b4f6a9c8ef..d0463a946247 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -12,6 +12,7 @@
12#include <asm/mmu_context.h> 12#include <asm/mmu_context.h>
13#include <asm/mtrr.h> 13#include <asm/mtrr.h>
14#include <asm/mce.h> 14#include <asm/mce.h>
15#include <asm/pat.h>
15#ifdef CONFIG_X86_LOCAL_APIC 16#ifdef CONFIG_X86_LOCAL_APIC
16#include <asm/mpspec.h> 17#include <asm/mpspec.h>
17#include <asm/apic.h> 18#include <asm/apic.h>
@@ -308,19 +309,6 @@ static void __cpuinit early_get_cap(struct cpuinfo_x86 *c)
308 309
309 } 310 }
310 311
311 clear_cpu_cap(c, X86_FEATURE_PAT);
312
313 switch (c->x86_vendor) {
314 case X86_VENDOR_AMD:
315 if (c->x86 >= 0xf && c->x86 <= 0x11)
316 set_cpu_cap(c, X86_FEATURE_PAT);
317 break;
318 case X86_VENDOR_INTEL:
319 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
320 set_cpu_cap(c, X86_FEATURE_PAT);
321 break;
322 }
323
324} 312}
325 313
326/* 314/*
@@ -409,18 +397,6 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
409 init_scattered_cpuid_features(c); 397 init_scattered_cpuid_features(c);
410 } 398 }
411 399
412 clear_cpu_cap(c, X86_FEATURE_PAT);
413
414 switch (c->x86_vendor) {
415 case X86_VENDOR_AMD:
416 if (c->x86 >= 0xf && c->x86 <= 0x11)
417 set_cpu_cap(c, X86_FEATURE_PAT);
418 break;
419 case X86_VENDOR_INTEL:
420 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
421 set_cpu_cap(c, X86_FEATURE_PAT);
422 break;
423 }
424} 400}
425 401
426static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c) 402static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
@@ -651,6 +627,7 @@ void __init early_cpu_init(void)
651 cpu_devs[cvdev->vendor] = cvdev->cpu_dev; 627 cpu_devs[cvdev->vendor] = cvdev->cpu_dev;
652 628
653 early_cpu_detect(); 629 early_cpu_detect();
630 validate_pat_support(&boot_cpu_data);
654} 631}
655 632
656/* Make sure %fs is initialized properly in idle threads */ 633/* Make sure %fs is initialized properly in idle threads */
diff --git a/arch/x86/kernel/geode_32.c b/arch/x86/kernel/geode_32.c
index 9dad6ca6cd70..e8edd63ab000 100644
--- a/arch/x86/kernel/geode_32.c
+++ b/arch/x86/kernel/geode_32.c
@@ -161,6 +161,25 @@ void geode_gpio_setup_event(unsigned int gpio, int pair, int pme)
161} 161}
162EXPORT_SYMBOL_GPL(geode_gpio_setup_event); 162EXPORT_SYMBOL_GPL(geode_gpio_setup_event);
163 163
164int geode_has_vsa2(void)
165{
166 static int has_vsa2 = -1;
167
168 if (has_vsa2 == -1) {
169 /*
170 * The VSA has virtual registers that we can query for a
171 * signature.
172 */
173 outw(VSA_VR_UNLOCK, VSA_VRC_INDEX);
174 outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX);
175
176 has_vsa2 = (inw(VSA_VRC_DATA) == VSA_SIG);
177 }
178
179 return has_vsa2;
180}
181EXPORT_SYMBOL_GPL(geode_has_vsa2);
182
164static int __init geode_southbridge_init(void) 183static int __init geode_southbridge_init(void)
165{ 184{
166 if (!is_geode()) 185 if (!is_geode())
diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c
index db6839b53195..e03cc952f233 100644
--- a/arch/x86/kernel/i387.c
+++ b/arch/x86/kernel/i387.c
@@ -450,7 +450,6 @@ static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
450{ 450{
451 struct task_struct *tsk = current; 451 struct task_struct *tsk = current;
452 452
453 clear_fpu(tsk);
454 return __copy_from_user(&tsk->thread.xstate->fsave, buf, 453 return __copy_from_user(&tsk->thread.xstate->fsave, buf,
455 sizeof(struct i387_fsave_struct)); 454 sizeof(struct i387_fsave_struct));
456} 455}
@@ -461,7 +460,6 @@ static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf)
461 struct user_i387_ia32_struct env; 460 struct user_i387_ia32_struct env;
462 int err; 461 int err;
463 462
464 clear_fpu(tsk);
465 err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0], 463 err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
466 sizeof(struct i387_fxsave_struct)); 464 sizeof(struct i387_fxsave_struct));
467 /* mxcsr reserved bits must be masked to zero for security reasons */ 465 /* mxcsr reserved bits must be masked to zero for security reasons */
@@ -478,6 +476,16 @@ int restore_i387_ia32(struct _fpstate_ia32 __user *buf)
478 int err; 476 int err;
479 477
480 if (HAVE_HWFP) { 478 if (HAVE_HWFP) {
479 struct task_struct *tsk = current;
480
481 clear_fpu(tsk);
482
483 if (!used_math()) {
484 err = init_fpu(tsk);
485 if (err)
486 return err;
487 }
488
481 if (cpu_has_fxsr) 489 if (cpu_has_fxsr)
482 err = restore_i387_fxsave(buf); 490 err = restore_i387_fxsave(buf);
483 else 491 else
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index cc6f5eb20b24..c0c68c18a788 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -95,7 +95,7 @@ void __init setup_per_cpu_areas(void)
95 95
96 /* Copy section for each CPU (we discard the original) */ 96 /* Copy section for each CPU (we discard the original) */
97 size = PERCPU_ENOUGH_ROOM; 97 size = PERCPU_ENOUGH_ROOM;
98 printk(KERN_INFO "PERCPU: Allocating %zd bytes of per cpu data\n", 98 printk(KERN_INFO "PERCPU: Allocating %lu bytes of per cpu data\n",
99 size); 99 size);
100 100
101 for_each_possible_cpu(i) { 101 for_each_possible_cpu(i) {
diff --git a/arch/x86/kernel/setup_32.c b/arch/x86/kernel/setup_32.c
index 2283422af794..2c5f8b213e86 100644
--- a/arch/x86/kernel/setup_32.c
+++ b/arch/x86/kernel/setup_32.c
@@ -127,7 +127,12 @@ static struct resource standard_io_resources[] = { {
127}, { 127}, {
128 .name = "keyboard", 128 .name = "keyboard",
129 .start = 0x0060, 129 .start = 0x0060,
130 .end = 0x006f, 130 .end = 0x0060,
131 .flags = IORESOURCE_BUSY | IORESOURCE_IO
132}, {
133 .name = "keyboard",
134 .start = 0x0064,
135 .end = 0x0064,
131 .flags = IORESOURCE_BUSY | IORESOURCE_IO 136 .flags = IORESOURCE_BUSY | IORESOURCE_IO
132}, { 137}, {
133 .name = "dma page reg", 138 .name = "dma page reg",
diff --git a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c
index 22c14e21c97c..f2fc8feb727d 100644
--- a/arch/x86/kernel/setup_64.c
+++ b/arch/x86/kernel/setup_64.c
@@ -70,6 +70,7 @@
70#include <asm/ds.h> 70#include <asm/ds.h>
71#include <asm/topology.h> 71#include <asm/topology.h>
72#include <asm/trampoline.h> 72#include <asm/trampoline.h>
73#include <asm/pat.h>
73 74
74#include <mach_apic.h> 75#include <mach_apic.h>
75#ifdef CONFIG_PARAVIRT 76#ifdef CONFIG_PARAVIRT
@@ -128,7 +129,9 @@ static struct resource standard_io_resources[] = {
128 .flags = IORESOURCE_BUSY | IORESOURCE_IO }, 129 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
129 { .name = "timer1", .start = 0x50, .end = 0x53, 130 { .name = "timer1", .start = 0x50, .end = 0x53,
130 .flags = IORESOURCE_BUSY | IORESOURCE_IO }, 131 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
131 { .name = "keyboard", .start = 0x60, .end = 0x6f, 132 { .name = "keyboard", .start = 0x60, .end = 0x60,
133 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
134 { .name = "keyboard", .start = 0x64, .end = 0x64,
132 .flags = IORESOURCE_BUSY | IORESOURCE_IO }, 135 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
133 { .name = "dma page reg", .start = 0x80, .end = 0x8f, 136 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
134 .flags = IORESOURCE_BUSY | IORESOURCE_IO }, 137 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
@@ -1063,25 +1066,19 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1063 if (c->extended_cpuid_level >= 0x80000007) 1066 if (c->extended_cpuid_level >= 0x80000007)
1064 c->x86_power = cpuid_edx(0x80000007); 1067 c->x86_power = cpuid_edx(0x80000007);
1065 1068
1066
1067 clear_cpu_cap(c, X86_FEATURE_PAT);
1068
1069 switch (c->x86_vendor) { 1069 switch (c->x86_vendor) {
1070 case X86_VENDOR_AMD: 1070 case X86_VENDOR_AMD:
1071 early_init_amd(c); 1071 early_init_amd(c);
1072 if (c->x86 >= 0xf && c->x86 <= 0x11)
1073 set_cpu_cap(c, X86_FEATURE_PAT);
1074 break; 1072 break;
1075 case X86_VENDOR_INTEL: 1073 case X86_VENDOR_INTEL:
1076 early_init_intel(c); 1074 early_init_intel(c);
1077 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
1078 set_cpu_cap(c, X86_FEATURE_PAT);
1079 break; 1075 break;
1080 case X86_VENDOR_CENTAUR: 1076 case X86_VENDOR_CENTAUR:
1081 early_init_centaur(c); 1077 early_init_centaur(c);
1082 break; 1078 break;
1083 } 1079 }
1084 1080
1081 validate_pat_support(c);
1085} 1082}
1086 1083
1087/* 1084/*
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index 277446cd30b6..60adbe22efa0 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -25,31 +25,24 @@
25#include <asm/mtrr.h> 25#include <asm/mtrr.h>
26#include <asm/io.h> 26#include <asm/io.h>
27 27
28int pat_wc_enabled = 1; 28#ifdef CONFIG_X86_PAT
29int __read_mostly pat_wc_enabled = 1;
29 30
30static u64 __read_mostly boot_pat_state; 31void __init pat_disable(char *reason)
31
32static int nopat(char *str)
33{ 32{
34 pat_wc_enabled = 0; 33 pat_wc_enabled = 0;
35 printk(KERN_INFO "x86: PAT support disabled.\n"); 34 printk(KERN_INFO "%s\n", reason);
36
37 return 0;
38} 35}
39early_param("nopat", nopat);
40 36
41static int pat_known_cpu(void) 37static int nopat(char *str)
42{ 38{
43 if (!pat_wc_enabled) 39 pat_disable("PAT support disabled.");
44 return 0;
45
46 if (cpu_has_pat)
47 return 1;
48
49 pat_wc_enabled = 0;
50 printk(KERN_INFO "CPU and/or kernel does not support PAT.\n");
51 return 0; 40 return 0;
52} 41}
42early_param("nopat", nopat);
43#endif
44
45static u64 __read_mostly boot_pat_state;
53 46
54enum { 47enum {
55 PAT_UC = 0, /* uncached */ 48 PAT_UC = 0, /* uncached */
@@ -66,17 +59,19 @@ void pat_init(void)
66{ 59{
67 u64 pat; 60 u64 pat;
68 61
69#ifndef CONFIG_X86_PAT 62 if (!pat_wc_enabled)
70 nopat(NULL);
71#endif
72
73 /* Boot CPU enables PAT based on CPU feature */
74 if (!smp_processor_id() && !pat_known_cpu())
75 return; 63 return;
76 64
77 /* APs enable PAT iff boot CPU has enabled it before */ 65 /* Paranoia check. */
78 if (smp_processor_id() && !pat_wc_enabled) 66 if (!cpu_has_pat) {
79 return; 67 printk(KERN_ERR "PAT enabled, but CPU feature cleared\n");
68 /*
69 * Panic if this happens on the secondary CPU, and we
70 * switched to PAT on the boot CPU. We have no way to
71 * undo PAT.
72 */
73 BUG_ON(boot_pat_state);
74 }
80 75
81 /* Set PWT to Write-Combining. All other bits stay the same */ 76 /* Set PWT to Write-Combining. All other bits stay the same */
82 /* 77 /*
@@ -95,9 +90,8 @@ void pat_init(void)
95 PAT(4,WB) | PAT(5,WC) | PAT(6,UC_MINUS) | PAT(7,UC); 90 PAT(4,WB) | PAT(5,WC) | PAT(6,UC_MINUS) | PAT(7,UC);
96 91
97 /* Boot CPU check */ 92 /* Boot CPU check */
98 if (!smp_processor_id()) { 93 if (!boot_pat_state)
99 rdmsrl(MSR_IA32_CR_PAT, boot_pat_state); 94 rdmsrl(MSR_IA32_CR_PAT, boot_pat_state);
100 }
101 95
102 wrmsrl(MSR_IA32_CR_PAT, pat); 96 wrmsrl(MSR_IA32_CR_PAT, pat);
103 printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n", 97 printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n",
diff --git a/arch/x86/pci/k8-bus_64.c b/arch/x86/pci/k8-bus_64.c
index ab6d4b18a88f..5c2799c20e47 100644
--- a/arch/x86/pci/k8-bus_64.c
+++ b/arch/x86/pci/k8-bus_64.c
@@ -504,14 +504,6 @@ static int __init early_fill_mp_bus_info(void)
504 } 504 }
505 } 505 }
506 506
507#ifdef CONFIG_NUMA
508 for (i = 0; i < BUS_NR; i++) {
509 node = mp_bus_to_node[i];
510 if (node >= 0)
511 printk(KERN_DEBUG "bus: %02x to node: %02x\n", i, node);
512 }
513#endif
514
515 for (i = 0; i < pci_root_num; i++) { 507 for (i = 0; i < pci_root_num; i++) {
516 int res_num; 508 int res_num;
517 int busnum; 509 int busnum;