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-rw-r--r--arch/arc/Kconfig6
-rw-r--r--arch/arc/Makefile17
-rw-r--r--arch/arc/boot/dts/angel4.dts5
-rw-r--r--arch/arc/boot/dts/nsimosci.dts7
-rw-r--r--arch/arc/configs/fpga_defconfig1
-rw-r--r--arch/arc/configs/fpga_noramfs_defconfig1
-rw-r--r--arch/arc/configs/nsimosci_defconfig1
-rw-r--r--arch/arc/include/asm/arcregs.h89
-rw-r--r--arch/arc/include/asm/atomic.h4
-rw-r--r--arch/arc/include/asm/bitops.h4
-rw-r--r--arch/arc/include/asm/bug.h7
-rw-r--r--arch/arc/include/asm/cache.h2
-rw-r--r--arch/arc/include/asm/current.h4
-rw-r--r--arch/arc/include/asm/irqflags.h4
-rw-r--r--arch/arc/include/asm/kgdb.h32
-rw-r--r--arch/arc/include/asm/processor.h13
-rw-r--r--arch/arc/include/asm/setup.h1
-rw-r--r--arch/arc/include/asm/smp.h10
-rw-r--r--arch/arc/include/asm/string.h3
-rw-r--r--arch/arc/include/asm/syscalls.h4
-rw-r--r--arch/arc/include/asm/thread_info.h4
-rw-r--r--arch/arc/include/asm/unaligned.h2
-rw-r--r--arch/arc/kernel/Makefile2
-rw-r--r--arch/arc/kernel/disasm.c4
-rw-r--r--arch/arc/kernel/head.S10
-rw-r--r--arch/arc/kernel/kgdb.c5
-rw-r--r--arch/arc/kernel/perf_event.c22
-rw-r--r--arch/arc/kernel/setup.c272
-rw-r--r--arch/arc/kernel/smp.c2
-rw-r--r--arch/arc/mm/cache_arc700.c14
-rw-r--r--arch/arc/mm/tlb.c8
-rw-r--r--arch/arc/plat-arcfpga/Kconfig13
-rw-r--r--arch/arc/plat-arcfpga/include/plat/irq.h27
-rw-r--r--arch/arc/plat-arcfpga/include/plat/memmap.h29
-rw-r--r--arch/arc/plat-arcfpga/platform.c61
-rw-r--r--arch/arc/plat-arcfpga/smp.c3
-rw-r--r--arch/arc/plat-tb10x/Kconfig1
-rw-r--r--arch/arc/plat-tb10x/tb10x.c13
-rw-r--r--arch/arm/Kconfig.debug2
-rw-r--r--arch/arm/boot/dts/Makefile3
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi5
-rw-r--r--arch/arm/boot/dts/imx28-evk.dts1
-rw-r--r--arch/arm/boot/dts/mmp2-brownstone.dts2
-rw-r--r--arch/arm/boot/dts/mmp2.dtsi29
-rw-r--r--arch/arm/boot/dts/omap3-n900.dts2
-rw-r--r--arch/arm/boot/dts/pxa168-aspenite.dts2
-rw-r--r--arch/arm/boot/dts/pxa168.dtsi27
-rw-r--r--arch/arm/boot/dts/pxa910-dkb.dts2
-rw-r--r--arch/arm/boot/dts/pxa910.dtsi28
-rw-r--r--arch/arm/boot/dts/socfpga.dtsi12
-rw-r--r--arch/arm/boot/dts/socfpga_arria5.dtsi2
-rw-r--r--arch/arm/boot/dts/socfpga_arria5_socdk.dts12
-rw-r--r--arch/arm/boot/dts/socfpga_cyclone5_socdk.dts15
-rw-r--r--arch/arm/boot/dts/socfpga_cyclone5_sockit.dts12
-rw-r--r--arch/arm/boot/dts/vf610-cosmic.dts19
-rw-r--r--arch/arm/boot/dts/zynq-7000.dtsi24
-rw-r--r--arch/arm/boot/dts/zynq-parallella.dts4
-rw-r--r--arch/arm/common/edma.c9
-rw-r--r--arch/arm/configs/imx_v4_v5_defconfig1
-rw-r--r--arch/arm/configs/imx_v6_v7_defconfig1
-rw-r--r--arch/arm/configs/multi_v7_defconfig4
-rw-r--r--arch/arm/configs/omap2plus_defconfig4
-rw-r--r--arch/arm/configs/socfpga_defconfig71
-rw-r--r--arch/arm/configs/sunxi_defconfig1
-rw-r--r--arch/arm/include/uapi/asm/unistd.h1
-rw-r--r--arch/arm/kernel/asm-offsets.c12
-rw-r--r--arch/arm/kernel/calls.S1
-rw-r--r--arch/arm/mach-highbank/highbank.c2
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c14
-rw-r--r--arch/arm/mach-imx/clk-vf610.c134
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/io.h4
-rw-r--r--arch/arm/mach-mmp/Kconfig12
-rw-r--r--arch/arm/mach-mmp/mmp-dt.c57
-rw-r--r--arch/arm/mach-mmp/mmp2-dt.c26
-rw-r--r--arch/arm/mach-omap2/omap_device.c4
-rw-r--r--arch/arm/mach-omap2/pdata-quirks.c3
-rw-r--r--arch/arm/mach-pxa/include/mach/addr-map.h5
-rw-r--r--arch/arm/mach-socfpga/core.h2
-rw-r--r--arch/arm/mach-socfpga/headsmp.S25
-rw-r--r--arch/arm/mach-socfpga/platsmp.c4
-rw-r--r--arch/arm/mach-socfpga/socfpga.c4
-rw-r--r--arch/arm/mm/cache-l2x0.c26
-rw-r--r--arch/arm/mm/dma-mapping.c1
-rw-r--r--arch/arm/mm/highmem.c3
-rw-r--r--arch/arm/mm/init.c8
-rw-r--r--arch/arm64/Kconfig3
-rw-r--r--arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi35
-rw-r--r--arch/arm64/configs/defconfig28
-rw-r--r--arch/arm64/include/asm/compat.h4
-rw-r--r--arch/arm64/include/asm/elf.h4
-rw-r--r--arch/arm64/include/asm/irq_work.h11
-rw-r--r--arch/arm64/include/asm/unistd32.h2
-rw-r--r--arch/arm64/kernel/efi.c44
-rw-r--r--arch/arm64/kernel/process.c5
-rw-r--r--arch/arm64/kernel/psci.c2
-rw-r--r--arch/arm64/mm/ioremap.c4
-rw-r--r--arch/arm64/mm/mmu.c12
-rw-r--r--arch/arm64/mm/pgd.c18
-rw-r--r--arch/arm64/net/bpf_jit.h8
-rw-r--r--arch/arm64/net/bpf_jit_comp.c84
-rw-r--r--arch/ia64/kernel/efi.c6
-rw-r--r--arch/m68k/include/asm/unistd.h2
-rw-r--r--arch/m68k/include/uapi/asm/unistd.h1
-rw-r--r--arch/m68k/kernel/syscalltable.S1
-rw-r--r--arch/microblaze/Kconfig4
-rw-r--r--arch/microblaze/include/asm/unistd.h2
-rw-r--r--arch/microblaze/include/uapi/asm/unistd.h1
-rw-r--r--arch/microblaze/kernel/syscall_table.S1
-rw-r--r--arch/microblaze/pci/pci-common.c9
-rw-r--r--arch/mips/Kconfig1
-rw-r--r--arch/mips/Makefile9
-rw-r--r--arch/mips/ath79/mach-db120.c2
-rw-r--r--arch/mips/cavium-octeon/octeon-irq.c2
-rw-r--r--arch/mips/cavium-octeon/setup.c9
-rw-r--r--arch/mips/include/asm/asmmacro-32.h6
-rw-r--r--arch/mips/include/asm/asmmacro.h18
-rw-r--r--arch/mips/include/asm/cop2.h8
-rw-r--r--arch/mips/include/asm/fpregdef.h14
-rw-r--r--arch/mips/include/asm/fpu.h4
-rw-r--r--arch/mips/include/asm/ftrace.h4
-rw-r--r--arch/mips/include/asm/idle.h7
-rw-r--r--arch/mips/include/asm/mipsregs.h11
-rw-r--r--arch/mips/include/uapi/asm/ptrace.h2
-rw-r--r--arch/mips/include/uapi/asm/unistd.h15
-rw-r--r--arch/mips/kernel/branch.c8
-rw-r--r--arch/mips/kernel/genex.S1
-rw-r--r--arch/mips/kernel/idle.c3
-rw-r--r--arch/mips/kernel/r2300_fpu.S6
-rw-r--r--arch/mips/kernel/r2300_switch.S5
-rw-r--r--arch/mips/kernel/r4k_fpu.S27
-rw-r--r--arch/mips/kernel/r4k_switch.S15
-rw-r--r--arch/mips/kernel/r6000_fpu.S5
-rw-r--r--arch/mips/kernel/scall32-o32.S1
-rw-r--r--arch/mips/kernel/scall64-64.S1
-rw-r--r--arch/mips/kernel/scall64-n32.S1
-rw-r--r--arch/mips/kernel/scall64-o32.S1
-rw-r--r--arch/mips/kernel/setup.c3
-rw-r--r--arch/mips/lasat/Kconfig2
-rw-r--r--arch/mips/lib/r3k_dump_tlb.c4
-rw-r--r--arch/mips/lib/strnlen_user.S6
-rw-r--r--arch/mips/loongson/lemote-2f/clock.c5
-rw-r--r--arch/mips/math-emu/cp1emu.c10
-rw-r--r--arch/mips/mm/tlbex.c6
-rw-r--r--arch/mips/mti-malta/Makefile3
-rw-r--r--arch/mips/mti-sead3/Makefile1
-rw-r--r--arch/mips/mti-sead3/sead3-i2c.c8
-rw-r--r--arch/mips/mti-sead3/sead3-pic32-bus.c102
-rw-r--r--arch/mips/mti-sead3/sead3-pic32-i2c-drv.c423
-rw-r--r--arch/mips/pci/msi-xlp.c4
-rw-r--r--arch/mips/pci/pci-lantiq.c7
-rw-r--r--arch/mips/pmcs-msp71xx/msp_irq.c1
-rw-r--r--arch/mips/pmcs-msp71xx/msp_irq_cic.c4
-rw-r--r--arch/mips/sibyte/Makefile1
-rw-r--r--arch/powerpc/configs/pseries_le_defconfig7
-rw-r--r--arch/powerpc/include/asm/eeh.h3
-rw-r--r--arch/powerpc/include/asm/fadump.h52
-rw-r--r--arch/powerpc/include/asm/hugetlb.h2
-rw-r--r--arch/powerpc/include/asm/perf_event.h2
-rw-r--r--arch/powerpc/include/asm/reg.h3
-rw-r--r--arch/powerpc/include/asm/syscall.h2
-rw-r--r--arch/powerpc/include/asm/systbl.h1
-rw-r--r--arch/powerpc/include/asm/unistd.h2
-rw-r--r--arch/powerpc/include/uapi/asm/unistd.h1
-rw-r--r--arch/powerpc/kernel/dma.c8
-rw-r--r--arch/powerpc/kernel/eeh.c19
-rw-r--r--arch/powerpc/kernel/eeh_driver.c12
-rw-r--r--arch/powerpc/kernel/eeh_pe.c10
-rw-r--r--arch/powerpc/kernel/entry_64.S6
-rw-r--r--arch/powerpc/kernel/exceptions-64s.S5
-rw-r--r--arch/powerpc/kernel/fadump.c114
-rw-r--r--arch/powerpc/kernel/irq.c2
-rw-r--r--arch/powerpc/kernel/misc.S4
-rw-r--r--arch/powerpc/kernel/ppc_ksyms.c2
-rw-r--r--arch/powerpc/kernel/process.c2
-rw-r--r--arch/powerpc/kernel/rtas_pci.c30
-rw-r--r--arch/powerpc/kernel/setup_64.c32
-rw-r--r--arch/powerpc/kernel/stacktrace.c2
-rw-r--r--arch/powerpc/mm/copro_fault.c3
-rw-r--r--arch/powerpc/mm/init_32.c2
-rw-r--r--arch/powerpc/mm/numa.c48
-rw-r--r--arch/powerpc/mm/slice.c3
-rw-r--r--arch/powerpc/perf/hv-24x7.c6
-rw-r--r--arch/powerpc/perf/hv-gpci.c6
-rw-r--r--arch/powerpc/platforms/powernv/eeh-ioda.c2
-rw-r--r--arch/powerpc/platforms/powernv/eeh-powernv.c57
-rw-r--r--arch/powerpc/platforms/powernv/opal-lpc.c63
-rw-r--r--arch/powerpc/platforms/powernv/opal-wrappers.S2
-rw-r--r--arch/powerpc/platforms/powernv/opal.c21
-rw-r--r--arch/powerpc/platforms/powernv/pci.c2
-rw-r--r--arch/powerpc/platforms/pseries/dlpar.c26
-rw-r--r--arch/powerpc/platforms/pseries/hotplug-cpu.c4
-rw-r--r--arch/powerpc/platforms/pseries/iommu.c11
-rw-r--r--arch/powerpc/platforms/pseries/lpar.c14
-rw-r--r--arch/powerpc/platforms/pseries/pseries.h3
-rw-r--r--arch/powerpc/sysdev/msi_bitmap.c66
-rw-r--r--arch/s390/configs/default_defconfig36
-rw-r--r--arch/s390/configs/gcov_defconfig25
-rw-r--r--arch/s390/configs/performance_defconfig30
-rw-r--r--arch/s390/configs/zfcpdump_defconfig10
-rw-r--r--arch/s390/defconfig5
-rw-r--r--arch/s390/include/uapi/asm/unistd.h3
-rw-r--r--arch/s390/kernel/compat_wrapper.c1
-rw-r--r--arch/s390/kernel/ftrace.c2
-rw-r--r--arch/s390/kernel/perf_cpum_sf.c6
-rw-r--r--arch/s390/kernel/syscalls.S1
-rw-r--r--arch/s390/kernel/uprobes.c2
-rw-r--r--arch/s390/kernel/vdso32/clock_gettime.S12
-rw-r--r--arch/s390/kernel/vdso32/gettimeofday.S14
-rw-r--r--arch/s390/kernel/vdso64/clock_gettime.S13
-rw-r--r--arch/s390/kernel/vdso64/gettimeofday.S6
-rw-r--r--arch/s390/kernel/vtime.c4
-rw-r--r--arch/s390/lib/probes.c2
-rw-r--r--arch/s390/mm/pgtable.c6
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh770x.c6
-rw-r--r--arch/sparc/include/asm/oplib_64.h3
-rw-r--r--arch/sparc/include/asm/setup.h2
-rw-r--r--arch/sparc/include/uapi/asm/unistd.h3
-rw-r--r--arch/sparc/kernel/entry.h3
-rw-r--r--arch/sparc/kernel/head_64.S40
-rw-r--r--arch/sparc/kernel/hvtramp.S1
-rw-r--r--arch/sparc/kernel/setup_64.c28
-rw-r--r--arch/sparc/kernel/systbls_32.S2
-rw-r--r--arch/sparc/kernel/systbls_64.S4
-rw-r--r--arch/sparc/kernel/trampoline_64.S12
-rw-r--r--arch/sparc/mm/gup.c30
-rw-r--r--arch/sparc/prom/cif.S5
-rw-r--r--arch/sparc/prom/init_64.c6
-rw-r--r--arch/sparc/prom/p1275.c2
-rw-r--r--arch/x86/Kconfig4
-rw-r--r--arch/x86/boot/compressed/eboot.c32
-rw-r--r--arch/x86/ia32/ia32entry.S2
-rw-r--r--arch/x86/include/asm/efi.h31
-rw-r--r--arch/x86/include/asm/kvm_host.h16
-rw-r--r--arch/x86/include/asm/preempt.h1
-rw-r--r--arch/x86/include/uapi/asm/vmx.h2
-rw-r--r--arch/x86/kernel/acpi/boot.c16
-rw-r--r--arch/x86/kernel/apb_timer.c2
-rw-r--r--arch/x86/kernel/apic/apic.c4
-rw-r--r--arch/x86/kernel/cpu/Makefile7
-rw-r--r--arch/x86/kernel/cpu/intel.c5
-rw-r--r--arch/x86/kernel/cpu/perf_event.c14
-rw-r--r--arch/x86/kernel/cpu/perf_event.h1
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c173
-rw-r--r--arch/x86/kernel/entry_32.S15
-rw-r--r--arch/x86/kernel/i8259.c3
-rw-r--r--arch/x86/kernel/irqinit.c3
-rw-r--r--arch/x86/kernel/setup.c2
-rw-r--r--arch/x86/kernel/smpboot.c4
-rw-r--r--arch/x86/kernel/tsc.c5
-rw-r--r--arch/x86/kvm/emulate.c299
-rw-r--r--arch/x86/kvm/i8254.c2
-rw-r--r--arch/x86/kvm/paging_tmpl.h2
-rw-r--r--arch/x86/kvm/svm.c8
-rw-r--r--arch/x86/kvm/vmx.c30
-rw-r--r--arch/x86/kvm/x86.c38
-rw-r--r--arch/x86/mm/pageattr.c2
-rw-r--r--arch/x86/platform/efi/efi-bgrt.c36
-rw-r--r--arch/x86/platform/efi/efi.c52
-rw-r--r--arch/x86/platform/efi/efi_32.c12
-rw-r--r--arch/x86/platform/efi/efi_64.c6
-rw-r--r--arch/x86/platform/efi/efi_stub_32.S4
-rw-r--r--arch/x86/platform/intel-mid/intel_mid_weak_decls.h7
-rw-r--r--arch/x86/platform/intel-mid/sfi.c2
-rw-r--r--arch/x86/xen/enlighten.c3
-rw-r--r--arch/x86/xen/mmu.c5
-rw-r--r--arch/x86/xen/p2m.c83
-rw-r--r--arch/x86/xen/setup.c1
-rw-r--r--arch/x86/xen/time.c2
268 files changed, 2160 insertions, 2179 deletions
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 9596b0ab108d..fe44b2494609 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -9,6 +9,7 @@
9config ARC 9config ARC
10 def_bool y 10 def_bool y
11 select BUILDTIME_EXTABLE_SORT 11 select BUILDTIME_EXTABLE_SORT
12 select COMMON_CLK
12 select CLONE_BACKWARDS 13 select CLONE_BACKWARDS
13 # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev 14 # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
14 select DEVTMPFS if !INITRAMFS_SOURCE="" 15 select DEVTMPFS if !INITRAMFS_SOURCE=""
@@ -73,9 +74,6 @@ config STACKTRACE_SUPPORT
73config HAVE_LATENCYTOP_SUPPORT 74config HAVE_LATENCYTOP_SUPPORT
74 def_bool y 75 def_bool y
75 76
76config NO_DMA
77 def_bool n
78
79source "init/Kconfig" 77source "init/Kconfig"
80source "kernel/Kconfig.freezer" 78source "kernel/Kconfig.freezer"
81 79
@@ -354,7 +352,7 @@ config ARC_CURR_IN_REG
354 kernel mode. This saves memory access for each such access 352 kernel mode. This saves memory access for each such access
355 353
356 354
357config ARC_MISALIGN_ACCESS 355config ARC_EMUL_UNALIGNED
358 bool "Emulate unaligned memory access (userspace only)" 356 bool "Emulate unaligned memory access (userspace only)"
359 select SYSCTL_ARCH_UNALIGN_NO_WARN 357 select SYSCTL_ARCH_UNALIGN_NO_WARN
360 select SYSCTL_ARCH_UNALIGN_ALLOW 358 select SYSCTL_ARCH_UNALIGN_ALLOW
diff --git a/arch/arc/Makefile b/arch/arc/Makefile
index 8c0b1aa56f7e..10bc3d4e8a44 100644
--- a/arch/arc/Makefile
+++ b/arch/arc/Makefile
@@ -25,7 +25,6 @@ ifdef CONFIG_ARC_CURR_IN_REG
25LINUXINCLUDE += -include ${src}/arch/arc/include/asm/current.h 25LINUXINCLUDE += -include ${src}/arch/arc/include/asm/current.h
26endif 26endif
27 27
28upto_gcc42 := $(call cc-ifversion, -le, 0402, y)
29upto_gcc44 := $(call cc-ifversion, -le, 0404, y) 28upto_gcc44 := $(call cc-ifversion, -le, 0404, y)
30atleast_gcc44 := $(call cc-ifversion, -ge, 0404, y) 29atleast_gcc44 := $(call cc-ifversion, -ge, 0404, y)
31atleast_gcc48 := $(call cc-ifversion, -ge, 0408, y) 30atleast_gcc48 := $(call cc-ifversion, -ge, 0408, y)
@@ -60,25 +59,11 @@ ldflags-$(CONFIG_CPU_BIG_ENDIAN) += -EB
60# --build-id w/o "-marclinux". Default arc-elf32-ld is OK 59# --build-id w/o "-marclinux". Default arc-elf32-ld is OK
61ldflags-$(upto_gcc44) += -marclinux 60ldflags-$(upto_gcc44) += -marclinux
62 61
63ARC_LIBGCC := -mA7
64cflags-$(CONFIG_ARC_HAS_HW_MPY) += -multcost=16
65
66ifndef CONFIG_ARC_HAS_HW_MPY 62ifndef CONFIG_ARC_HAS_HW_MPY
67 cflags-y += -mno-mpy 63 cflags-y += -mno-mpy
68
69# newlib for ARC700 assumes MPY to be always present, which is generally true
70# However, if someone really doesn't want MPY, we need to use the 600 ver
71# which coupled with -mno-mpy will use mpy emulation
72# With gcc 4.4.7, -mno-mpy is enough to make any other related adjustments,
73# e.g. increased cost of MPY. With gcc 4.2.1 this had to be explicitly hinted
74
75 ifeq ($(upto_gcc42),y)
76 ARC_LIBGCC := -marc600
77 cflags-y += -multcost=30
78 endif
79endif 64endif
80 65
81LIBGCC := $(shell $(CC) $(ARC_LIBGCC) $(cflags-y) --print-libgcc-file-name) 66LIBGCC := $(shell $(CC) $(cflags-y) --print-libgcc-file-name)
82 67
83# Modules with short calls might break for calls into builtin-kernel 68# Modules with short calls might break for calls into builtin-kernel
84KBUILD_CFLAGS_MODULE += -mlong-calls 69KBUILD_CFLAGS_MODULE += -mlong-calls
diff --git a/arch/arc/boot/dts/angel4.dts b/arch/arc/boot/dts/angel4.dts
index 6b57475967a6..757e0c62c4f9 100644
--- a/arch/arc/boot/dts/angel4.dts
+++ b/arch/arc/boot/dts/angel4.dts
@@ -24,11 +24,6 @@
24 serial0 = &arcuart0; 24 serial0 = &arcuart0;
25 }; 25 };
26 26
27 memory {
28 device_type = "memory";
29 reg = <0x00000000 0x10000000>; /* 256M */
30 };
31
32 fpga { 27 fpga {
33 compatible = "simple-bus"; 28 compatible = "simple-bus";
34 #address-cells = <1>; 29 #address-cells = <1>;
diff --git a/arch/arc/boot/dts/nsimosci.dts b/arch/arc/boot/dts/nsimosci.dts
index 4f31b2eb5cdf..cfaedd9c61c9 100644
--- a/arch/arc/boot/dts/nsimosci.dts
+++ b/arch/arc/boot/dts/nsimosci.dts
@@ -20,18 +20,13 @@
20 /* this is for console on PGU */ 20 /* this is for console on PGU */
21 /* bootargs = "console=tty0 consoleblank=0"; */ 21 /* bootargs = "console=tty0 consoleblank=0"; */
22 /* this is for console on serial */ 22 /* this is for console on serial */
23 bootargs = "earlycon=uart8250,mmio32,0xc0000000,115200n8 console=ttyS0,115200n8 consoleblank=0 debug"; 23 bootargs = "earlycon=uart8250,mmio32,0xc0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug";
24 }; 24 };
25 25
26 aliases { 26 aliases {
27 serial0 = &uart0; 27 serial0 = &uart0;
28 }; 28 };
29 29
30 memory {
31 device_type = "memory";
32 reg = <0x80000000 0x10000000>; /* 256M */
33 };
34
35 fpga { 30 fpga {
36 compatible = "simple-bus"; 31 compatible = "simple-bus";
37 #address-cells = <1>; 32 #address-cells = <1>;
diff --git a/arch/arc/configs/fpga_defconfig b/arch/arc/configs/fpga_defconfig
index e283aa586934..ef4d3bc7b6c0 100644
--- a/arch/arc/configs/fpga_defconfig
+++ b/arch/arc/configs/fpga_defconfig
@@ -23,7 +23,6 @@ CONFIG_MODULES=y
23# CONFIG_IOSCHED_DEADLINE is not set 23# CONFIG_IOSCHED_DEADLINE is not set
24# CONFIG_IOSCHED_CFQ is not set 24# CONFIG_IOSCHED_CFQ is not set
25CONFIG_ARC_PLAT_FPGA_LEGACY=y 25CONFIG_ARC_PLAT_FPGA_LEGACY=y
26CONFIG_ARC_BOARD_ML509=y
27# CONFIG_ARC_HAS_RTSC is not set 26# CONFIG_ARC_HAS_RTSC is not set
28CONFIG_ARC_BUILTIN_DTB_NAME="angel4" 27CONFIG_ARC_BUILTIN_DTB_NAME="angel4"
29CONFIG_PREEMPT=y 28CONFIG_PREEMPT=y
diff --git a/arch/arc/configs/fpga_noramfs_defconfig b/arch/arc/configs/fpga_noramfs_defconfig
index 5276a52f6a2f..49c93011ab96 100644
--- a/arch/arc/configs/fpga_noramfs_defconfig
+++ b/arch/arc/configs/fpga_noramfs_defconfig
@@ -20,7 +20,6 @@ CONFIG_MODULES=y
20# CONFIG_IOSCHED_DEADLINE is not set 20# CONFIG_IOSCHED_DEADLINE is not set
21# CONFIG_IOSCHED_CFQ is not set 21# CONFIG_IOSCHED_CFQ is not set
22CONFIG_ARC_PLAT_FPGA_LEGACY=y 22CONFIG_ARC_PLAT_FPGA_LEGACY=y
23CONFIG_ARC_BOARD_ML509=y
24# CONFIG_ARC_HAS_RTSC is not set 23# CONFIG_ARC_HAS_RTSC is not set
25CONFIG_ARC_BUILTIN_DTB_NAME="angel4" 24CONFIG_ARC_BUILTIN_DTB_NAME="angel4"
26CONFIG_PREEMPT=y 25CONFIG_PREEMPT=y
diff --git a/arch/arc/configs/nsimosci_defconfig b/arch/arc/configs/nsimosci_defconfig
index c01ba35a4eff..278dacf2a3f9 100644
--- a/arch/arc/configs/nsimosci_defconfig
+++ b/arch/arc/configs/nsimosci_defconfig
@@ -21,7 +21,6 @@ CONFIG_MODULES=y
21# CONFIG_IOSCHED_DEADLINE is not set 21# CONFIG_IOSCHED_DEADLINE is not set
22# CONFIG_IOSCHED_CFQ is not set 22# CONFIG_IOSCHED_CFQ is not set
23CONFIG_ARC_PLAT_FPGA_LEGACY=y 23CONFIG_ARC_PLAT_FPGA_LEGACY=y
24CONFIG_ARC_BOARD_ML509=y
25# CONFIG_ARC_IDE is not set 24# CONFIG_ARC_IDE is not set
26# CONFIG_ARCTANGENT_EMAC is not set 25# CONFIG_ARCTANGENT_EMAC is not set
27# CONFIG_ARC_HAS_RTSC is not set 26# CONFIG_ARC_HAS_RTSC is not set
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 372466b371bf..be33db8a2ee3 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -9,19 +9,16 @@
9#ifndef _ASM_ARC_ARCREGS_H 9#ifndef _ASM_ARC_ARCREGS_H
10#define _ASM_ARC_ARCREGS_H 10#define _ASM_ARC_ARCREGS_H
11 11
12#ifdef __KERNEL__
13
14/* Build Configuration Registers */ 12/* Build Configuration Registers */
15#define ARC_REG_DCCMBASE_BCR 0x61 /* DCCM Base Addr */ 13#define ARC_REG_DCCMBASE_BCR 0x61 /* DCCM Base Addr */
16#define ARC_REG_CRC_BCR 0x62 14#define ARC_REG_CRC_BCR 0x62
17#define ARC_REG_DVFB_BCR 0x64
18#define ARC_REG_EXTARITH_BCR 0x65
19#define ARC_REG_VECBASE_BCR 0x68 15#define ARC_REG_VECBASE_BCR 0x68
20#define ARC_REG_PERIBASE_BCR 0x69 16#define ARC_REG_PERIBASE_BCR 0x69
21#define ARC_REG_FP_BCR 0x6B /* Single-Precision FPU */ 17#define ARC_REG_FP_BCR 0x6B /* ARCompact: Single-Precision FPU */
22#define ARC_REG_DPFP_BCR 0x6C /* Dbl Precision FPU */ 18#define ARC_REG_DPFP_BCR 0x6C /* ARCompact: Dbl Precision FPU */
23#define ARC_REG_DCCM_BCR 0x74 /* DCCM Present + SZ */ 19#define ARC_REG_DCCM_BCR 0x74 /* DCCM Present + SZ */
24#define ARC_REG_TIMERS_BCR 0x75 20#define ARC_REG_TIMERS_BCR 0x75
21#define ARC_REG_AP_BCR 0x76
25#define ARC_REG_ICCM_BCR 0x78 22#define ARC_REG_ICCM_BCR 0x78
26#define ARC_REG_XY_MEM_BCR 0x79 23#define ARC_REG_XY_MEM_BCR 0x79
27#define ARC_REG_MAC_BCR 0x7a 24#define ARC_REG_MAC_BCR 0x7a
@@ -31,6 +28,9 @@
31#define ARC_REG_MIXMAX_BCR 0x7e 28#define ARC_REG_MIXMAX_BCR 0x7e
32#define ARC_REG_BARREL_BCR 0x7f 29#define ARC_REG_BARREL_BCR 0x7f
33#define ARC_REG_D_UNCACH_BCR 0x6A 30#define ARC_REG_D_UNCACH_BCR 0x6A
31#define ARC_REG_BPU_BCR 0xc0
32#define ARC_REG_ISA_CFG_BCR 0xc1
33#define ARC_REG_SMART_BCR 0xFF
34 34
35/* status32 Bits Positions */ 35/* status32 Bits Positions */
36#define STATUS_AE_BIT 5 /* Exception active */ 36#define STATUS_AE_BIT 5 /* Exception active */
@@ -191,14 +191,6 @@
191#define PAGES_TO_KB(n_pages) ((n_pages) << (PAGE_SHIFT - 10)) 191#define PAGES_TO_KB(n_pages) ((n_pages) << (PAGE_SHIFT - 10))
192#define PAGES_TO_MB(n_pages) (PAGES_TO_KB(n_pages) >> 10) 192#define PAGES_TO_MB(n_pages) (PAGES_TO_KB(n_pages) >> 10)
193 193
194#ifdef CONFIG_ARC_FPU_SAVE_RESTORE
195/* These DPFP regs need to be saved/restored across ctx-sw */
196struct arc_fpu {
197 struct {
198 unsigned int l, h;
199 } aux_dpfp[2];
200};
201#endif
202 194
203/* 195/*
204 *************************************************************** 196 ***************************************************************
@@ -212,27 +204,19 @@ struct bcr_identity {
212#endif 204#endif
213}; 205};
214 206
215#define EXTN_SWAP_VALID 0x1 207struct bcr_isa {
216#define EXTN_NORM_VALID 0x2
217#define EXTN_MINMAX_VALID 0x2
218#define EXTN_BARREL_VALID 0x2
219
220struct bcr_extn {
221#ifdef CONFIG_CPU_BIG_ENDIAN 208#ifdef CONFIG_CPU_BIG_ENDIAN
222 unsigned int pad:20, crc:1, ext_arith:2, mul:2, barrel:2, minmax:2, 209 unsigned int pad1:23, atomic1:1, ver:8;
223 norm:2, swap:1;
224#else 210#else
225 unsigned int swap:1, norm:2, minmax:2, barrel:2, mul:2, ext_arith:2, 211 unsigned int ver:8, atomic1:1, pad1:23;
226 crc:1, pad:20;
227#endif 212#endif
228}; 213};
229 214
230/* DSP Options Ref Manual */ 215struct bcr_mpy {
231struct bcr_extn_mac_mul {
232#ifdef CONFIG_CPU_BIG_ENDIAN 216#ifdef CONFIG_CPU_BIG_ENDIAN
233 unsigned int pad:16, type:8, ver:8; 217 unsigned int pad:8, x1616:8, dsp:4, cycles:2, type:2, ver:8;
234#else 218#else
235 unsigned int ver:8, type:8, pad:16; 219 unsigned int ver:8, type:2, cycles:2, dsp:4, x1616:8, pad:8;
236#endif 220#endif
237}; 221};
238 222
@@ -251,6 +235,7 @@ struct bcr_perip {
251 unsigned int pad:8, sz:8, pad2:8, start:8; 235 unsigned int pad:8, sz:8, pad2:8, start:8;
252#endif 236#endif
253}; 237};
238
254struct bcr_iccm { 239struct bcr_iccm {
255#ifdef CONFIG_CPU_BIG_ENDIAN 240#ifdef CONFIG_CPU_BIG_ENDIAN
256 unsigned int base:16, pad:5, sz:3, ver:8; 241 unsigned int base:16, pad:5, sz:3, ver:8;
@@ -277,8 +262,8 @@ struct bcr_dccm {
277#endif 262#endif
278}; 263};
279 264
280/* Both SP and DP FPU BCRs have same format */ 265/* ARCompact: Both SP and DP FPU BCRs have same format */
281struct bcr_fp { 266struct bcr_fp_arcompact {
282#ifdef CONFIG_CPU_BIG_ENDIAN 267#ifdef CONFIG_CPU_BIG_ENDIAN
283 unsigned int fast:1, ver:8; 268 unsigned int fast:1, ver:8;
284#else 269#else
@@ -286,6 +271,30 @@ struct bcr_fp {
286#endif 271#endif
287}; 272};
288 273
274struct bcr_timer {
275#ifdef CONFIG_CPU_BIG_ENDIAN
276 unsigned int pad2:15, rtsc:1, pad1:6, t1:1, t0:1, ver:8;
277#else
278 unsigned int ver:8, t0:1, t1:1, pad1:6, rtsc:1, pad2:15;
279#endif
280};
281
282struct bcr_bpu_arcompact {
283#ifdef CONFIG_CPU_BIG_ENDIAN
284 unsigned int pad2:19, fam:1, pad:2, ent:2, ver:8;
285#else
286 unsigned int ver:8, ent:2, pad:2, fam:1, pad2:19;
287#endif
288};
289
290struct bcr_generic {
291#ifdef CONFIG_CPU_BIG_ENDIAN
292 unsigned int pad:24, ver:8;
293#else
294 unsigned int ver:8, pad:24;
295#endif
296};
297
289/* 298/*
290 ******************************************************************* 299 *******************************************************************
291 * Generic structures to hold build configuration used at runtime 300 * Generic structures to hold build configuration used at runtime
@@ -299,6 +308,10 @@ struct cpuinfo_arc_cache {
299 unsigned int sz_k:8, line_len:8, assoc:4, ver:4, alias:1, vipt:1, pad:6; 308 unsigned int sz_k:8, line_len:8, assoc:4, ver:4, alias:1, vipt:1, pad:6;
300}; 309};
301 310
311struct cpuinfo_arc_bpu {
312 unsigned int ver, full, num_cache, num_pred;
313};
314
302struct cpuinfo_arc_ccm { 315struct cpuinfo_arc_ccm {
303 unsigned int base_addr, sz; 316 unsigned int base_addr, sz;
304}; 317};
@@ -306,21 +319,25 @@ struct cpuinfo_arc_ccm {
306struct cpuinfo_arc { 319struct cpuinfo_arc {
307 struct cpuinfo_arc_cache icache, dcache; 320 struct cpuinfo_arc_cache icache, dcache;
308 struct cpuinfo_arc_mmu mmu; 321 struct cpuinfo_arc_mmu mmu;
322 struct cpuinfo_arc_bpu bpu;
309 struct bcr_identity core; 323 struct bcr_identity core;
310 unsigned int timers; 324 struct bcr_isa isa;
325 struct bcr_timer timers;
311 unsigned int vec_base; 326 unsigned int vec_base;
312 unsigned int uncached_base; 327 unsigned int uncached_base;
313 struct cpuinfo_arc_ccm iccm, dccm; 328 struct cpuinfo_arc_ccm iccm, dccm;
314 struct bcr_extn extn; 329 struct {
330 unsigned int swap:1, norm:1, minmax:1, barrel:1, crc:1, pad1:3,
331 fpu_sp:1, fpu_dp:1, pad2:6,
332 debug:1, ap:1, smart:1, rtt:1, pad3:4,
333 pad4:8;
334 } extn;
335 struct bcr_mpy extn_mpy;
315 struct bcr_extn_xymem extn_xymem; 336 struct bcr_extn_xymem extn_xymem;
316 struct bcr_extn_mac_mul extn_mac_mul;
317 struct bcr_fp fp, dpfp;
318}; 337};
319 338
320extern struct cpuinfo_arc cpuinfo_arc700[]; 339extern struct cpuinfo_arc cpuinfo_arc700[];
321 340
322#endif /* __ASEMBLY__ */ 341#endif /* __ASEMBLY__ */
323 342
324#endif /* __KERNEL__ */
325
326#endif /* _ASM_ARC_ARCREGS_H */ 343#endif /* _ASM_ARC_ARCREGS_H */
diff --git a/arch/arc/include/asm/atomic.h b/arch/arc/include/asm/atomic.h
index 173f303a868f..067551b6920a 100644
--- a/arch/arc/include/asm/atomic.h
+++ b/arch/arc/include/asm/atomic.h
@@ -9,8 +9,6 @@
9#ifndef _ASM_ARC_ATOMIC_H 9#ifndef _ASM_ARC_ATOMIC_H
10#define _ASM_ARC_ATOMIC_H 10#define _ASM_ARC_ATOMIC_H
11 11
12#ifdef __KERNEL__
13
14#ifndef __ASSEMBLY__ 12#ifndef __ASSEMBLY__
15 13
16#include <linux/types.h> 14#include <linux/types.h>
@@ -170,5 +168,3 @@ ATOMIC_OP(and, &=, and)
170#endif 168#endif
171 169
172#endif 170#endif
173
174#endif
diff --git a/arch/arc/include/asm/bitops.h b/arch/arc/include/asm/bitops.h
index ebc0cf3164dc..1a5bf07eefe2 100644
--- a/arch/arc/include/asm/bitops.h
+++ b/arch/arc/include/asm/bitops.h
@@ -13,8 +13,6 @@
13#error only <linux/bitops.h> can be included directly 13#error only <linux/bitops.h> can be included directly
14#endif 14#endif
15 15
16#ifdef __KERNEL__
17
18#ifndef __ASSEMBLY__ 16#ifndef __ASSEMBLY__
19 17
20#include <linux/types.h> 18#include <linux/types.h>
@@ -508,6 +506,4 @@ static inline __attribute__ ((const)) int __ffs(unsigned long word)
508 506
509#endif /* !__ASSEMBLY__ */ 507#endif /* !__ASSEMBLY__ */
510 508
511#endif /* __KERNEL__ */
512
513#endif 509#endif
diff --git a/arch/arc/include/asm/bug.h b/arch/arc/include/asm/bug.h
index 5b18e94c6678..ea022d47896c 100644
--- a/arch/arc/include/asm/bug.h
+++ b/arch/arc/include/asm/bug.h
@@ -21,10 +21,9 @@ void show_kernel_fault_diag(const char *str, struct pt_regs *regs,
21 unsigned long address); 21 unsigned long address);
22void die(const char *str, struct pt_regs *regs, unsigned long address); 22void die(const char *str, struct pt_regs *regs, unsigned long address);
23 23
24#define BUG() do { \ 24#define BUG() do { \
25 dump_stack(); \ 25 pr_warn("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \
26 pr_warn("Kernel BUG in %s: %s: %d!\n", \ 26 dump_stack(); \
27 __FILE__, __func__, __LINE__); \
28} while (0) 27} while (0)
29 28
30#define HAVE_ARCH_BUG 29#define HAVE_ARCH_BUG
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h
index b3c750979aa1..7861255da32d 100644
--- a/arch/arc/include/asm/cache.h
+++ b/arch/arc/include/asm/cache.h
@@ -20,7 +20,7 @@
20#define CACHE_LINE_MASK (~(L1_CACHE_BYTES - 1)) 20#define CACHE_LINE_MASK (~(L1_CACHE_BYTES - 1))
21 21
22/* 22/*
23 * ARC700 doesn't cache any access in top 256M. 23 * ARC700 doesn't cache any access in top 1G (0xc000_0000 to 0xFFFF_FFFF)
24 * Ideal for wiring memory mapped peripherals as we don't need to do 24 * Ideal for wiring memory mapped peripherals as we don't need to do
25 * explicit uncached accesses (LD.di/ST.di) hence more portable drivers 25 * explicit uncached accesses (LD.di/ST.di) hence more portable drivers
26 */ 26 */
diff --git a/arch/arc/include/asm/current.h b/arch/arc/include/asm/current.h
index 87b918585c4a..c2453ee62801 100644
--- a/arch/arc/include/asm/current.h
+++ b/arch/arc/include/asm/current.h
@@ -12,8 +12,6 @@
12#ifndef _ASM_ARC_CURRENT_H 12#ifndef _ASM_ARC_CURRENT_H
13#define _ASM_ARC_CURRENT_H 13#define _ASM_ARC_CURRENT_H
14 14
15#ifdef __KERNEL__
16
17#ifndef __ASSEMBLY__ 15#ifndef __ASSEMBLY__
18 16
19#ifdef CONFIG_ARC_CURR_IN_REG 17#ifdef CONFIG_ARC_CURR_IN_REG
@@ -27,6 +25,4 @@ register struct task_struct *curr_arc asm("r25");
27 25
28#endif /* ! __ASSEMBLY__ */ 26#endif /* ! __ASSEMBLY__ */
29 27
30#endif /* __KERNEL__ */
31
32#endif /* _ASM_ARC_CURRENT_H */ 28#endif /* _ASM_ARC_CURRENT_H */
diff --git a/arch/arc/include/asm/irqflags.h b/arch/arc/include/asm/irqflags.h
index 587df8236e8b..742816f1b210 100644
--- a/arch/arc/include/asm/irqflags.h
+++ b/arch/arc/include/asm/irqflags.h
@@ -15,8 +15,6 @@
15 * -Conditionally disable interrupts (if they are not enabled, don't disable) 15 * -Conditionally disable interrupts (if they are not enabled, don't disable)
16*/ 16*/
17 17
18#ifdef __KERNEL__
19
20#include <asm/arcregs.h> 18#include <asm/arcregs.h>
21 19
22/* status32 Reg bits related to Interrupt Handling */ 20/* status32 Reg bits related to Interrupt Handling */
@@ -169,6 +167,4 @@ static inline int arch_irqs_disabled(void)
169 167
170#endif /* __ASSEMBLY__ */ 168#endif /* __ASSEMBLY__ */
171 169
172#endif /* KERNEL */
173
174#endif 170#endif
diff --git a/arch/arc/include/asm/kgdb.h b/arch/arc/include/asm/kgdb.h
index b65fca7ffeb5..fea931634136 100644
--- a/arch/arc/include/asm/kgdb.h
+++ b/arch/arc/include/asm/kgdb.h
@@ -19,7 +19,7 @@
19 * register API yet */ 19 * register API yet */
20#undef DBG_MAX_REG_NUM 20#undef DBG_MAX_REG_NUM
21 21
22#define GDB_MAX_REGS 39 22#define GDB_MAX_REGS 87
23 23
24#define BREAK_INSTR_SIZE 2 24#define BREAK_INSTR_SIZE 2
25#define CACHE_FLUSH_IS_SAFE 1 25#define CACHE_FLUSH_IS_SAFE 1
@@ -33,23 +33,27 @@ static inline void arch_kgdb_breakpoint(void)
33 33
34extern void kgdb_trap(struct pt_regs *regs); 34extern void kgdb_trap(struct pt_regs *regs);
35 35
36enum arc700_linux_regnums { 36/* This is the numbering of registers according to the GDB. See GDB's
37 * arc-tdep.h for details.
38 *
39 * Registers are ordered for GDB 7.5. It is incompatible with GDB 6.8. */
40enum arc_linux_regnums {
37 _R0 = 0, 41 _R0 = 0,
38 _R1, _R2, _R3, _R4, _R5, _R6, _R7, _R8, _R9, _R10, _R11, _R12, _R13, 42 _R1, _R2, _R3, _R4, _R5, _R6, _R7, _R8, _R9, _R10, _R11, _R12, _R13,
39 _R14, _R15, _R16, _R17, _R18, _R19, _R20, _R21, _R22, _R23, _R24, 43 _R14, _R15, _R16, _R17, _R18, _R19, _R20, _R21, _R22, _R23, _R24,
40 _R25, _R26, 44 _R25, _R26,
41 _BTA = 27, 45 _FP = 27,
42 _LP_START = 28, 46 __SP = 28,
43 _LP_END = 29, 47 _R30 = 30,
44 _LP_COUNT = 30, 48 _BLINK = 31,
45 _STATUS32 = 31, 49 _LP_COUNT = 60,
46 _BLINK = 32, 50 _STOP_PC = 64,
47 _FP = 33, 51 _RET = 64,
48 __SP = 34, 52 _LP_START = 65,
49 _EFA = 35, 53 _LP_END = 66,
50 _RET = 36, 54 _STATUS32 = 67,
51 _ORIG_R8 = 37, 55 _ECR = 76,
52 _STOP_PC = 38 56 _BTA = 82,
53}; 57};
54 58
55#else 59#else
diff --git a/arch/arc/include/asm/processor.h b/arch/arc/include/asm/processor.h
index 82588f3ba77f..210fe97464c3 100644
--- a/arch/arc/include/asm/processor.h
+++ b/arch/arc/include/asm/processor.h
@@ -14,12 +14,19 @@
14#ifndef __ASM_ARC_PROCESSOR_H 14#ifndef __ASM_ARC_PROCESSOR_H
15#define __ASM_ARC_PROCESSOR_H 15#define __ASM_ARC_PROCESSOR_H
16 16
17#ifdef __KERNEL__
18
19#ifndef __ASSEMBLY__ 17#ifndef __ASSEMBLY__
20 18
21#include <asm/ptrace.h> 19#include <asm/ptrace.h>
22 20
21#ifdef CONFIG_ARC_FPU_SAVE_RESTORE
22/* These DPFP regs need to be saved/restored across ctx-sw */
23struct arc_fpu {
24 struct {
25 unsigned int l, h;
26 } aux_dpfp[2];
27};
28#endif
29
23/* Arch specific stuff which needs to be saved per task. 30/* Arch specific stuff which needs to be saved per task.
24 * However these items are not so important so as to earn a place in 31 * However these items are not so important so as to earn a place in
25 * struct thread_info 32 * struct thread_info
@@ -128,6 +135,4 @@ extern unsigned int get_wchan(struct task_struct *p);
128 */ 135 */
129#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) 136#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
130 137
131#endif /* __KERNEL__ */
132
133#endif /* __ASM_ARC_PROCESSOR_H */ 138#endif /* __ASM_ARC_PROCESSOR_H */
diff --git a/arch/arc/include/asm/setup.h b/arch/arc/include/asm/setup.h
index e10f8cef56a8..6e3ef5ba4f74 100644
--- a/arch/arc/include/asm/setup.h
+++ b/arch/arc/include/asm/setup.h
@@ -29,7 +29,6 @@ struct cpuinfo_data {
29}; 29};
30 30
31extern int root_mountflags, end_mem; 31extern int root_mountflags, end_mem;
32extern int running_on_hw;
33 32
34void setup_processor(void); 33void setup_processor(void);
35void __init setup_arch_memory(void); 34void __init setup_arch_memory(void);
diff --git a/arch/arc/include/asm/smp.h b/arch/arc/include/asm/smp.h
index 5d06eee43ea9..3845b9e94f69 100644
--- a/arch/arc/include/asm/smp.h
+++ b/arch/arc/include/asm/smp.h
@@ -59,7 +59,15 @@ struct plat_smp_ops {
59/* TBD: stop exporting it for direct population by platform */ 59/* TBD: stop exporting it for direct population by platform */
60extern struct plat_smp_ops plat_smp_ops; 60extern struct plat_smp_ops plat_smp_ops;
61 61
62#endif /* CONFIG_SMP */ 62#else /* CONFIG_SMP */
63
64static inline void smp_init_cpus(void) {}
65static inline const char *arc_platform_smp_cpuinfo(void)
66{
67 return "";
68}
69
70#endif /* !CONFIG_SMP */
63 71
64/* 72/*
65 * ARC700 doesn't support atomic Read-Modify-Write ops. 73 * ARC700 doesn't support atomic Read-Modify-Write ops.
diff --git a/arch/arc/include/asm/string.h b/arch/arc/include/asm/string.h
index 87676c8f1412..95822b550a18 100644
--- a/arch/arc/include/asm/string.h
+++ b/arch/arc/include/asm/string.h
@@ -17,8 +17,6 @@
17 17
18#include <linux/types.h> 18#include <linux/types.h>
19 19
20#ifdef __KERNEL__
21
22#define __HAVE_ARCH_MEMSET 20#define __HAVE_ARCH_MEMSET
23#define __HAVE_ARCH_MEMCPY 21#define __HAVE_ARCH_MEMCPY
24#define __HAVE_ARCH_MEMCMP 22#define __HAVE_ARCH_MEMCMP
@@ -36,5 +34,4 @@ extern char *strcpy(char *dest, const char *src);
36extern int strcmp(const char *cs, const char *ct); 34extern int strcmp(const char *cs, const char *ct);
37extern __kernel_size_t strlen(const char *); 35extern __kernel_size_t strlen(const char *);
38 36
39#endif /* __KERNEL__ */
40#endif /* _ASM_ARC_STRING_H */ 37#endif /* _ASM_ARC_STRING_H */
diff --git a/arch/arc/include/asm/syscalls.h b/arch/arc/include/asm/syscalls.h
index dd785befe7fd..e56f9fcc5581 100644
--- a/arch/arc/include/asm/syscalls.h
+++ b/arch/arc/include/asm/syscalls.h
@@ -9,8 +9,6 @@
9#ifndef _ASM_ARC_SYSCALLS_H 9#ifndef _ASM_ARC_SYSCALLS_H
10#define _ASM_ARC_SYSCALLS_H 1 10#define _ASM_ARC_SYSCALLS_H 1
11 11
12#ifdef __KERNEL__
13
14#include <linux/compiler.h> 12#include <linux/compiler.h>
15#include <linux/linkage.h> 13#include <linux/linkage.h>
16#include <linux/types.h> 14#include <linux/types.h>
@@ -22,6 +20,4 @@ int sys_arc_gettls(void);
22 20
23#include <asm-generic/syscalls.h> 21#include <asm-generic/syscalls.h>
24 22
25#endif /* __KERNEL__ */
26
27#endif 23#endif
diff --git a/arch/arc/include/asm/thread_info.h b/arch/arc/include/asm/thread_info.h
index 45be21672011..02bc5ec0fb2e 100644
--- a/arch/arc/include/asm/thread_info.h
+++ b/arch/arc/include/asm/thread_info.h
@@ -16,8 +16,6 @@
16#ifndef _ASM_THREAD_INFO_H 16#ifndef _ASM_THREAD_INFO_H
17#define _ASM_THREAD_INFO_H 17#define _ASM_THREAD_INFO_H
18 18
19#ifdef __KERNEL__
20
21#include <asm/page.h> 19#include <asm/page.h>
22 20
23#ifdef CONFIG_16KSTACKS 21#ifdef CONFIG_16KSTACKS
@@ -114,6 +112,4 @@ static inline __attribute_const__ struct thread_info *current_thread_info(void)
114 * syscall, so all that reamins to be tested is _TIF_WORK_MASK 112 * syscall, so all that reamins to be tested is _TIF_WORK_MASK
115 */ 113 */
116 114
117#endif /* __KERNEL__ */
118
119#endif /* _ASM_THREAD_INFO_H */ 115#endif /* _ASM_THREAD_INFO_H */
diff --git a/arch/arc/include/asm/unaligned.h b/arch/arc/include/asm/unaligned.h
index 3e5f071bc00c..6da6b4edaeda 100644
--- a/arch/arc/include/asm/unaligned.h
+++ b/arch/arc/include/asm/unaligned.h
@@ -14,7 +14,7 @@
14#include <asm-generic/unaligned.h> 14#include <asm-generic/unaligned.h>
15#include <asm/ptrace.h> 15#include <asm/ptrace.h>
16 16
17#ifdef CONFIG_ARC_MISALIGN_ACCESS 17#ifdef CONFIG_ARC_EMUL_UNALIGNED
18int misaligned_fixup(unsigned long address, struct pt_regs *regs, 18int misaligned_fixup(unsigned long address, struct pt_regs *regs,
19 struct callee_regs *cregs); 19 struct callee_regs *cregs);
20#else 20#else
diff --git a/arch/arc/kernel/Makefile b/arch/arc/kernel/Makefile
index 8004b4fa6461..113f2033da9f 100644
--- a/arch/arc/kernel/Makefile
+++ b/arch/arc/kernel/Makefile
@@ -16,7 +16,7 @@ obj-$(CONFIG_MODULES) += arcksyms.o module.o
16obj-$(CONFIG_SMP) += smp.o 16obj-$(CONFIG_SMP) += smp.o
17obj-$(CONFIG_ARC_DW2_UNWIND) += unwind.o 17obj-$(CONFIG_ARC_DW2_UNWIND) += unwind.o
18obj-$(CONFIG_KPROBES) += kprobes.o 18obj-$(CONFIG_KPROBES) += kprobes.o
19obj-$(CONFIG_ARC_MISALIGN_ACCESS) += unaligned.o 19obj-$(CONFIG_ARC_EMUL_UNALIGNED) += unaligned.o
20obj-$(CONFIG_KGDB) += kgdb.o 20obj-$(CONFIG_KGDB) += kgdb.o
21obj-$(CONFIG_ARC_METAWARE_HLINK) += arc_hostlink.o 21obj-$(CONFIG_ARC_METAWARE_HLINK) += arc_hostlink.o
22obj-$(CONFIG_PERF_EVENTS) += perf_event.o 22obj-$(CONFIG_PERF_EVENTS) += perf_event.o
diff --git a/arch/arc/kernel/disasm.c b/arch/arc/kernel/disasm.c
index b8a549c4f540..3b7cd4864ba2 100644
--- a/arch/arc/kernel/disasm.c
+++ b/arch/arc/kernel/disasm.c
@@ -15,7 +15,7 @@
15#include <linux/uaccess.h> 15#include <linux/uaccess.h>
16#include <asm/disasm.h> 16#include <asm/disasm.h>
17 17
18#if defined(CONFIG_KGDB) || defined(CONFIG_ARC_MISALIGN_ACCESS) || \ 18#if defined(CONFIG_KGDB) || defined(CONFIG_ARC_EMUL_UNALIGNED) || \
19 defined(CONFIG_KPROBES) 19 defined(CONFIG_KPROBES)
20 20
21/* disasm_instr: Analyses instruction at addr, stores 21/* disasm_instr: Analyses instruction at addr, stores
@@ -535,4 +535,4 @@ int __kprobes disasm_next_pc(unsigned long pc, struct pt_regs *regs,
535 return instr.is_branch; 535 return instr.is_branch;
536} 536}
537 537
538#endif /* CONFIG_KGDB || CONFIG_ARC_MISALIGN_ACCESS || CONFIG_KPROBES */ 538#endif /* CONFIG_KGDB || CONFIG_ARC_EMUL_UNALIGNED || CONFIG_KPROBES */
diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S
index 4d2481bd8b98..b0e8666fdccc 100644
--- a/arch/arc/kernel/head.S
+++ b/arch/arc/kernel/head.S
@@ -91,16 +91,6 @@ stext:
91 st r0, [@uboot_tag] 91 st r0, [@uboot_tag]
92 st r2, [@uboot_arg] 92 st r2, [@uboot_arg]
93 93
94 ; Identify if running on ISS vs Silicon
95 ; IDENTITY Reg [ 3 2 1 0 ]
96 ; (chip-id) ^^^^^ ==> 0xffff for ISS
97 lr r0, [identity]
98 lsr r3, r0, 16
99 cmp r3, 0xffff
100 mov.z r4, 0
101 mov.nz r4, 1
102 st r4, [@running_on_hw]
103
104 ; setup "current" tsk and optionally cache it in dedicated r25 94 ; setup "current" tsk and optionally cache it in dedicated r25
105 mov r9, @init_task 95 mov r9, @init_task
106 SET_CURR_TASK_ON_CPU r9, r0 ; r9 = tsk, r0 = scratch 96 SET_CURR_TASK_ON_CPU r9, r0 ; r9 = tsk, r0 = scratch
diff --git a/arch/arc/kernel/kgdb.c b/arch/arc/kernel/kgdb.c
index a2ff5c5d1450..ecf6a7869375 100644
--- a/arch/arc/kernel/kgdb.c
+++ b/arch/arc/kernel/kgdb.c
@@ -158,11 +158,6 @@ int kgdb_arch_handle_exception(int e_vector, int signo, int err_code,
158 return -1; 158 return -1;
159} 159}
160 160
161unsigned long kgdb_arch_pc(int exception, struct pt_regs *regs)
162{
163 return instruction_pointer(regs);
164}
165
166int kgdb_arch_init(void) 161int kgdb_arch_init(void)
167{ 162{
168 single_step_data.armed = 0; 163 single_step_data.armed = 0;
diff --git a/arch/arc/kernel/perf_event.c b/arch/arc/kernel/perf_event.c
index b9a5685a990e..ae1c485cbc68 100644
--- a/arch/arc/kernel/perf_event.c
+++ b/arch/arc/kernel/perf_event.c
@@ -244,25 +244,23 @@ static int arc_pmu_device_probe(struct platform_device *pdev)
244 pr_err("This core does not have performance counters!\n"); 244 pr_err("This core does not have performance counters!\n");
245 return -ENODEV; 245 return -ENODEV;
246 } 246 }
247 BUG_ON(pct_bcr.c > ARC_PMU_MAX_HWEVENTS);
247 248
248 arc_pmu = devm_kzalloc(&pdev->dev, sizeof(struct arc_pmu), 249 READ_BCR(ARC_REG_CC_BUILD, cc_bcr);
249 GFP_KERNEL); 250 if (!cc_bcr.v) {
251 pr_err("Performance counters exist, but no countable conditions?\n");
252 return -ENODEV;
253 }
254
255 arc_pmu = devm_kzalloc(&pdev->dev, sizeof(struct arc_pmu), GFP_KERNEL);
250 if (!arc_pmu) 256 if (!arc_pmu)
251 return -ENOMEM; 257 return -ENOMEM;
252 258
253 arc_pmu->n_counters = pct_bcr.c; 259 arc_pmu->n_counters = pct_bcr.c;
254 BUG_ON(arc_pmu->n_counters > ARC_PMU_MAX_HWEVENTS);
255
256 arc_pmu->counter_size = 32 + (pct_bcr.s << 4); 260 arc_pmu->counter_size = 32 + (pct_bcr.s << 4);
257 pr_info("ARC PMU found with %d counters of size %d bits\n",
258 arc_pmu->n_counters, arc_pmu->counter_size);
259
260 READ_BCR(ARC_REG_CC_BUILD, cc_bcr);
261
262 if (!cc_bcr.v)
263 pr_err("Strange! Performance counters exist, but no countable conditions?\n");
264 261
265 pr_info("ARC PMU has %d countable conditions\n", cc_bcr.c); 262 pr_info("ARC perf\t: %d counters (%d bits), %d countable conditions\n",
263 arc_pmu->n_counters, arc_pmu->counter_size, cc_bcr.c);
266 264
267 cc_name.str[8] = 0; 265 cc_name.str[8] = 0;
268 for (i = 0; i < PERF_COUNT_HW_MAX; i++) 266 for (i = 0; i < PERF_COUNT_HW_MAX; i++)
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index 119dddb752b2..252bf603db9c 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -13,7 +13,9 @@
13#include <linux/console.h> 13#include <linux/console.h>
14#include <linux/module.h> 14#include <linux/module.h>
15#include <linux/cpu.h> 15#include <linux/cpu.h>
16#include <linux/clk-provider.h>
16#include <linux/of_fdt.h> 17#include <linux/of_fdt.h>
18#include <linux/of_platform.h>
17#include <linux/cache.h> 19#include <linux/cache.h>
18#include <asm/sections.h> 20#include <asm/sections.h>
19#include <asm/arcregs.h> 21#include <asm/arcregs.h>
@@ -24,11 +26,10 @@
24#include <asm/unwind.h> 26#include <asm/unwind.h>
25#include <asm/clk.h> 27#include <asm/clk.h>
26#include <asm/mach_desc.h> 28#include <asm/mach_desc.h>
29#include <asm/smp.h>
27 30
28#define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x)) 31#define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
29 32
30int running_on_hw = 1; /* vs. on ISS */
31
32/* Part of U-boot ABI: see head.S */ 33/* Part of U-boot ABI: see head.S */
33int __initdata uboot_tag; 34int __initdata uboot_tag;
34char __initdata *uboot_arg; 35char __initdata *uboot_arg;
@@ -42,26 +43,26 @@ struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
42static void read_arc_build_cfg_regs(void) 43static void read_arc_build_cfg_regs(void)
43{ 44{
44 struct bcr_perip uncached_space; 45 struct bcr_perip uncached_space;
46 struct bcr_generic bcr;
45 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; 47 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
46 FIX_PTR(cpu); 48 FIX_PTR(cpu);
47 49
48 READ_BCR(AUX_IDENTITY, cpu->core); 50 READ_BCR(AUX_IDENTITY, cpu->core);
51 READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
49 52
50 cpu->timers = read_aux_reg(ARC_REG_TIMERS_BCR); 53 READ_BCR(ARC_REG_TIMERS_BCR, cpu->timers);
51 cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE); 54 cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
52 55
53 READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space); 56 READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
54 cpu->uncached_base = uncached_space.start << 24; 57 cpu->uncached_base = uncached_space.start << 24;
55 58
56 cpu->extn.mul = read_aux_reg(ARC_REG_MUL_BCR); 59 READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
57 cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR);
58 cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR);
59 cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR);
60 cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR);
61 READ_BCR(ARC_REG_MAC_BCR, cpu->extn_mac_mul);
62 60
63 cpu->extn.ext_arith = read_aux_reg(ARC_REG_EXTARITH_BCR); 61 cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
64 cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR); 62 cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
63 cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */
64 cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
65 cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
65 66
66 /* Note that we read the CCM BCRs independent of kernel config 67 /* Note that we read the CCM BCRs independent of kernel config
67 * This is to catch the cases where user doesn't know that 68 * This is to catch the cases where user doesn't know that
@@ -95,43 +96,76 @@ static void read_arc_build_cfg_regs(void)
95 read_decode_mmu_bcr(); 96 read_decode_mmu_bcr();
96 read_decode_cache_bcr(); 97 read_decode_cache_bcr();
97 98
98 READ_BCR(ARC_REG_FP_BCR, cpu->fp); 99 {
99 READ_BCR(ARC_REG_DPFP_BCR, cpu->dpfp); 100 struct bcr_fp_arcompact sp, dp;
101 struct bcr_bpu_arcompact bpu;
102
103 READ_BCR(ARC_REG_FP_BCR, sp);
104 READ_BCR(ARC_REG_DPFP_BCR, dp);
105 cpu->extn.fpu_sp = sp.ver ? 1 : 0;
106 cpu->extn.fpu_dp = dp.ver ? 1 : 0;
107
108 READ_BCR(ARC_REG_BPU_BCR, bpu);
109 cpu->bpu.ver = bpu.ver;
110 cpu->bpu.full = bpu.fam ? 1 : 0;
111 if (bpu.ent) {
112 cpu->bpu.num_cache = 256 << (bpu.ent - 1);
113 cpu->bpu.num_pred = 256 << (bpu.ent - 1);
114 }
115 }
116
117 READ_BCR(ARC_REG_AP_BCR, bcr);
118 cpu->extn.ap = bcr.ver ? 1 : 0;
119
120 READ_BCR(ARC_REG_SMART_BCR, bcr);
121 cpu->extn.smart = bcr.ver ? 1 : 0;
122
123 cpu->extn.debug = cpu->extn.ap | cpu->extn.smart;
100} 124}
101 125
102static const struct cpuinfo_data arc_cpu_tbl[] = { 126static const struct cpuinfo_data arc_cpu_tbl[] = {
103 { {0x10, "ARCTangent A5"}, 0x1F},
104 { {0x20, "ARC 600" }, 0x2F}, 127 { {0x20, "ARC 600" }, 0x2F},
105 { {0x30, "ARC 700" }, 0x33}, 128 { {0x30, "ARC 700" }, 0x33},
106 { {0x34, "ARC 700 R4.10"}, 0x34}, 129 { {0x34, "ARC 700 R4.10"}, 0x34},
130 { {0x35, "ARC 700 R4.11"}, 0x35},
107 { {0x00, NULL } } 131 { {0x00, NULL } }
108}; 132};
109 133
134#define IS_AVAIL1(v, str) ((v) ? str : "")
135#define IS_USED(cfg) (IS_ENABLED(cfg) ? "" : "(not used) ")
136#define IS_AVAIL2(v, str, cfg) IS_AVAIL1(v, str), IS_AVAIL1(v, IS_USED(cfg))
137
110static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len) 138static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
111{ 139{
112 int n = 0;
113 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id]; 140 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
114 struct bcr_identity *core = &cpu->core; 141 struct bcr_identity *core = &cpu->core;
115 const struct cpuinfo_data *tbl; 142 const struct cpuinfo_data *tbl;
116 int be = 0; 143 char *isa_nm;
117#ifdef CONFIG_CPU_BIG_ENDIAN 144 int i, be, atomic;
118 be = 1; 145 int n = 0;
119#endif 146
120 FIX_PTR(cpu); 147 FIX_PTR(cpu);
121 148
149 {
150 isa_nm = "ARCompact";
151 be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
152
153 atomic = cpu->isa.atomic1;
154 if (!cpu->isa.ver) /* ISA BCR absent, use Kconfig info */
155 atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
156 }
157
122 n += scnprintf(buf + n, len - n, 158 n += scnprintf(buf + n, len - n,
123 "\nARC IDENTITY\t: Family [%#02x]" 159 "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
124 " Cpu-id [%#02x] Chip-id [%#4x]\n", 160 core->family, core->cpu_id, core->chip_id);
125 core->family, core->cpu_id,
126 core->chip_id);
127 161
128 for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) { 162 for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
129 if ((core->family >= tbl->info.id) && 163 if ((core->family >= tbl->info.id) &&
130 (core->family <= tbl->up_range)) { 164 (core->family <= tbl->up_range)) {
131 n += scnprintf(buf + n, len - n, 165 n += scnprintf(buf + n, len - n,
132 "processor\t: %s %s\n", 166 "processor [%d]\t: %s (%s ISA) %s\n",
133 tbl->info.str, 167 cpu_id, tbl->info.str, isa_nm,
134 be ? "[Big Endian]" : ""); 168 IS_AVAIL1(be, "[Big-Endian]"));
135 break; 169 break;
136 } 170 }
137 } 171 }
@@ -143,34 +177,35 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
143 (unsigned int)(arc_get_core_freq() / 1000000), 177 (unsigned int)(arc_get_core_freq() / 1000000),
144 (unsigned int)(arc_get_core_freq() / 10000) % 100); 178 (unsigned int)(arc_get_core_freq() / 10000) % 100);
145 179
146 n += scnprintf(buf + n, len - n, "Timers\t\t: %s %s\n", 180 n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
147 (cpu->timers & 0x200) ? "TIMER1" : "", 181 IS_AVAIL1(cpu->timers.t0, "Timer0 "),
148 (cpu->timers & 0x100) ? "TIMER0" : ""); 182 IS_AVAIL1(cpu->timers.t1, "Timer1 "),
183 IS_AVAIL2(cpu->timers.rtsc, "64-bit RTSC ", CONFIG_ARC_HAS_RTSC));
149 184
150 n += scnprintf(buf + n, len - n, "Vect Tbl Base\t: %#x\n", 185 n += i = scnprintf(buf + n, len - n, "%s%s",
151 cpu->vec_base); 186 IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC));
152 187
153 n += scnprintf(buf + n, len - n, "UNCACHED Base\t: %#x\n", 188 if (i)
154 cpu->uncached_base); 189 n += scnprintf(buf + n, len - n, "\n\t\t: ");
155 190
156 return buf; 191 n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
157} 192 IS_AVAIL1(cpu->extn_mpy.ver, "mpy "),
193 IS_AVAIL1(cpu->extn.norm, "norm "),
194 IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
195 IS_AVAIL1(cpu->extn.swap, "swap "),
196 IS_AVAIL1(cpu->extn.minmax, "minmax "),
197 IS_AVAIL1(cpu->extn.crc, "crc "),
198 IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE));
158 199
159static const struct id_to_str mul_type_nm[] = { 200 if (cpu->bpu.ver)
160 { 0x0, "N/A"}, 201 n += scnprintf(buf + n, len - n,
161 { 0x1, "32x32 (spl Result Reg)" }, 202 "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
162 { 0x2, "32x32 (ANY Result Reg)" } 203 IS_AVAIL1(cpu->bpu.full, "full"),
163}; 204 IS_AVAIL1(!cpu->bpu.full, "partial"),
205 cpu->bpu.num_cache, cpu->bpu.num_pred);
164 206
165static const struct id_to_str mac_mul_nm[] = { 207 return buf;
166 {0x0, "N/A"}, 208}
167 {0x1, "N/A"},
168 {0x2, "Dual 16 x 16"},
169 {0x3, "N/A"},
170 {0x4, "32x16"},
171 {0x5, "N/A"},
172 {0x6, "Dual 16x16 and 32x16"}
173};
174 209
175static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len) 210static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
176{ 211{
@@ -178,67 +213,46 @@ static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
178 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id]; 213 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
179 214
180 FIX_PTR(cpu); 215 FIX_PTR(cpu);
181#define IS_AVAIL1(var, str) ((var) ? str : "")
182#define IS_AVAIL2(var, str) ((var == 0x2) ? str : "")
183#define IS_USED(cfg) (IS_ENABLED(cfg) ? "(in-use)" : "(not used)")
184 216
185 n += scnprintf(buf + n, len - n, 217 n += scnprintf(buf + n, len - n,
186 "Extn [700-Base]\t: %s %s %s %s %s %s\n", 218 "Vector Table\t: %#x\nUncached Base\t: %#x\n",
187 IS_AVAIL2(cpu->extn.norm, "norm,"), 219 cpu->vec_base, cpu->uncached_base);
188 IS_AVAIL2(cpu->extn.barrel, "barrel-shift,"), 220
189 IS_AVAIL1(cpu->extn.swap, "swap,"), 221 if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
190 IS_AVAIL2(cpu->extn.minmax, "minmax,"), 222 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
191 IS_AVAIL1(cpu->extn.crc, "crc,"), 223 IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
192 IS_AVAIL2(cpu->extn.ext_arith, "ext-arith")); 224 IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
193 225
194 n += scnprintf(buf + n, len - n, "Extn [700-MPY]\t: %s", 226 if (cpu->extn.debug)
195 mul_type_nm[cpu->extn.mul].str); 227 n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
196 228 IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
197 n += scnprintf(buf + n, len - n, " MAC MPY: %s\n", 229 IS_AVAIL1(cpu->extn.smart, "smaRT "),
198 mac_mul_nm[cpu->extn_mac_mul.type].str); 230 IS_AVAIL1(cpu->extn.rtt, "RTT "));
199 231
200 if (cpu->core.family == 0x34) { 232 if (cpu->dccm.sz || cpu->iccm.sz)
201 n += scnprintf(buf + n, len - n, 233 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
202 "Extn [700-4.10]\t: LLOCK/SCOND %s, SWAPE %s, RTSC %s\n", 234 cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
203 IS_USED(CONFIG_ARC_HAS_LLSC),
204 IS_USED(CONFIG_ARC_HAS_SWAPE),
205 IS_USED(CONFIG_ARC_HAS_RTSC));
206 }
207
208 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: %s",
209 !(cpu->dccm.sz || cpu->iccm.sz) ? "N/A" : "");
210
211 if (cpu->dccm.sz)
212 n += scnprintf(buf + n, len - n, "DCCM: @ %x, %d KB ",
213 cpu->dccm.base_addr, TO_KB(cpu->dccm.sz));
214
215 if (cpu->iccm.sz)
216 n += scnprintf(buf + n, len - n, "ICCM: @ %x, %d KB",
217 cpu->iccm.base_addr, TO_KB(cpu->iccm.sz)); 235 cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
218 236
219 n += scnprintf(buf + n, len - n, "\nExtn [FPU]\t: %s",
220 !(cpu->fp.ver || cpu->dpfp.ver) ? "N/A" : "");
221
222 if (cpu->fp.ver)
223 n += scnprintf(buf + n, len - n, "SP [v%d] %s",
224 cpu->fp.ver, cpu->fp.fast ? "(fast)" : "");
225
226 if (cpu->dpfp.ver)
227 n += scnprintf(buf + n, len - n, "DP [v%d] %s",
228 cpu->dpfp.ver, cpu->dpfp.fast ? "(fast)" : "");
229
230 n += scnprintf(buf + n, len - n, "\n");
231
232 n += scnprintf(buf + n, len - n, 237 n += scnprintf(buf + n, len - n,
233 "OS ABI [v3]\t: no-legacy-syscalls\n"); 238 "OS ABI [v3]\t: no-legacy-syscalls\n");
234 239
235 return buf; 240 return buf;
236} 241}
237 242
238static void arc_chk_ccms(void) 243static void arc_chk_core_config(void)
239{ 244{
240#if defined(CONFIG_ARC_HAS_DCCM) || defined(CONFIG_ARC_HAS_ICCM)
241 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; 245 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
246 int fpu_enabled;
247
248 if (!cpu->timers.t0)
249 panic("Timer0 is not present!\n");
250
251 if (!cpu->timers.t1)
252 panic("Timer1 is not present!\n");
253
254 if (IS_ENABLED(CONFIG_ARC_HAS_RTSC) && !cpu->timers.rtsc)
255 panic("RTSC is not present\n");
242 256
243#ifdef CONFIG_ARC_HAS_DCCM 257#ifdef CONFIG_ARC_HAS_DCCM
244 /* 258 /*
@@ -256,33 +270,20 @@ static void arc_chk_ccms(void)
256 if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz) 270 if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
257 panic("Linux built with incorrect ICCM Size\n"); 271 panic("Linux built with incorrect ICCM Size\n");
258#endif 272#endif
259#endif
260}
261 273
262/* 274 /*
263 * Ensure that FP hardware and kernel config match 275 * FP hardware/software config sanity
264 * -If hardware contains DPFP, kernel needs to save/restore FPU state 276 * -If hardware contains DPFP, kernel needs to save/restore FPU state
265 * across context switches 277 * -If not, it will crash trying to save/restore the non-existant regs
266 * -If hardware lacks DPFP, but kernel configured to save FPU state then 278 *
267 * kernel trying to access non-existant DPFP regs will crash 279 * (only DPDP checked since SP has no arch visible regs)
268 * 280 */
269 * We only check for Dbl precision Floating Point, because only DPFP 281 fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
270 * hardware has dedicated regs which need to be saved/restored on ctx-sw
271 * (Single Precision uses core regs), thus kernel is kind of oblivious to it
272 */
273static void arc_chk_fpu(void)
274{
275 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
276 282
277 if (cpu->dpfp.ver) { 283 if (cpu->extn.fpu_dp && !fpu_enabled)
278#ifndef CONFIG_ARC_FPU_SAVE_RESTORE 284 pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
279 pr_warn("DPFP support broken in this kernel...\n"); 285 else if (!cpu->extn.fpu_dp && fpu_enabled)
280#endif 286 panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
281 } else {
282#ifdef CONFIG_ARC_FPU_SAVE_RESTORE
283 panic("H/w lacks DPFP support, apps won't work\n");
284#endif
285 }
286} 287}
287 288
288/* 289/*
@@ -303,15 +304,11 @@ void setup_processor(void)
303 304
304 arc_mmu_init(); 305 arc_mmu_init();
305 arc_cache_init(); 306 arc_cache_init();
306 arc_chk_ccms();
307 307
308 printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str))); 308 printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
309
310#ifdef CONFIG_SMP
311 printk(arc_platform_smp_cpuinfo()); 309 printk(arc_platform_smp_cpuinfo());
312#endif
313 310
314 arc_chk_fpu(); 311 arc_chk_core_config();
315} 312}
316 313
317static inline int is_kernel(unsigned long addr) 314static inline int is_kernel(unsigned long addr)
@@ -360,11 +357,7 @@ void __init setup_arch(char **cmdline_p)
360 machine_desc->init_early(); 357 machine_desc->init_early();
361 358
362 setup_processor(); 359 setup_processor();
363
364#ifdef CONFIG_SMP
365 smp_init_cpus(); 360 smp_init_cpus();
366#endif
367
368 setup_arch_memory(); 361 setup_arch_memory();
369 362
370 /* copy flat DT out of .init and then unflatten it */ 363 /* copy flat DT out of .init and then unflatten it */
@@ -385,7 +378,13 @@ void __init setup_arch(char **cmdline_p)
385 378
386static int __init customize_machine(void) 379static int __init customize_machine(void)
387{ 380{
388 /* Add platform devices */ 381 of_clk_init(NULL);
382 /*
383 * Traverses flattened DeviceTree - registering platform devices
384 * (if any) complete with their resources
385 */
386 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
387
389 if (machine_desc->init_machine) 388 if (machine_desc->init_machine)
390 machine_desc->init_machine(); 389 machine_desc->init_machine();
391 390
@@ -419,19 +418,14 @@ static int show_cpuinfo(struct seq_file *m, void *v)
419 418
420 seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE)); 419 seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
421 420
422 seq_printf(m, "Bogo MIPS : \t%lu.%02lu\n", 421 seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
423 loops_per_jiffy / (500000 / HZ), 422 loops_per_jiffy / (500000 / HZ),
424 (loops_per_jiffy / (5000 / HZ)) % 100); 423 (loops_per_jiffy / (5000 / HZ)) % 100);
425 424
426 seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE)); 425 seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
427
428 seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE)); 426 seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
429
430 seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE)); 427 seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
431
432#ifdef CONFIG_SMP
433 seq_printf(m, arc_platform_smp_cpuinfo()); 428 seq_printf(m, arc_platform_smp_cpuinfo());
434#endif
435 429
436 free_page((unsigned long)str); 430 free_page((unsigned long)str);
437done: 431done:
diff --git a/arch/arc/kernel/smp.c b/arch/arc/kernel/smp.c
index dcd317c47d09..d01df0c517a2 100644
--- a/arch/arc/kernel/smp.c
+++ b/arch/arc/kernel/smp.c
@@ -101,7 +101,7 @@ void __weak arc_platform_smp_wait_to_boot(int cpu)
101 101
102const char *arc_platform_smp_cpuinfo(void) 102const char *arc_platform_smp_cpuinfo(void)
103{ 103{
104 return plat_smp_ops.info; 104 return plat_smp_ops.info ? : "";
105} 105}
106 106
107/* 107/*
diff --git a/arch/arc/mm/cache_arc700.c b/arch/arc/mm/cache_arc700.c
index 9e1142729fd1..8c3a3e02ba92 100644
--- a/arch/arc/mm/cache_arc700.c
+++ b/arch/arc/mm/cache_arc700.c
@@ -530,16 +530,9 @@ EXPORT_SYMBOL(dma_cache_wback);
530 */ 530 */
531void flush_icache_range(unsigned long kstart, unsigned long kend) 531void flush_icache_range(unsigned long kstart, unsigned long kend)
532{ 532{
533 unsigned int tot_sz, off, sz; 533 unsigned int tot_sz;
534 unsigned long phy, pfn;
535 534
536 /* printk("Kernel Cache Cohenercy: %lx to %lx\n",kstart, kend); */ 535 WARN(kstart < TASK_SIZE, "%s() can't handle user vaddr", __func__);
537
538 /* This is not the right API for user virtual address */
539 if (kstart < TASK_SIZE) {
540 BUG_ON("Flush icache range for user virtual addr space");
541 return;
542 }
543 536
544 /* Shortcut for bigger flush ranges. 537 /* Shortcut for bigger flush ranges.
545 * Here we don't care if this was kernel virtual or phy addr 538 * Here we don't care if this was kernel virtual or phy addr
@@ -572,6 +565,9 @@ void flush_icache_range(unsigned long kstart, unsigned long kend)
572 * straddles across 2 virtual pages and hence need for loop 565 * straddles across 2 virtual pages and hence need for loop
573 */ 566 */
574 while (tot_sz > 0) { 567 while (tot_sz > 0) {
568 unsigned int off, sz;
569 unsigned long phy, pfn;
570
575 off = kstart % PAGE_SIZE; 571 off = kstart % PAGE_SIZE;
576 pfn = vmalloc_to_pfn((void *)kstart); 572 pfn = vmalloc_to_pfn((void *)kstart);
577 phy = (pfn << PAGE_SHIFT) + off; 573 phy = (pfn << PAGE_SHIFT) + off;
diff --git a/arch/arc/mm/tlb.c b/arch/arc/mm/tlb.c
index e1acf0ce5647..7f47d2a56f44 100644
--- a/arch/arc/mm/tlb.c
+++ b/arch/arc/mm/tlb.c
@@ -609,14 +609,12 @@ char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len)
609 int n = 0; 609 int n = 0;
610 struct cpuinfo_arc_mmu *p_mmu = &cpuinfo_arc700[cpu_id].mmu; 610 struct cpuinfo_arc_mmu *p_mmu = &cpuinfo_arc700[cpu_id].mmu;
611 611
612 n += scnprintf(buf + n, len - n, "ARC700 MMU [v%x]\t: %dk PAGE, ",
613 p_mmu->ver, TO_KB(p_mmu->pg_sz));
614
615 n += scnprintf(buf + n, len - n, 612 n += scnprintf(buf + n, len - n,
616 "J-TLB %d (%dx%d), uDTLB %d, uITLB %d, %s\n", 613 "MMU [v%x]\t: %dk PAGE, JTLB %d (%dx%d), uDTLB %d, uITLB %d %s\n",
614 p_mmu->ver, TO_KB(p_mmu->pg_sz),
617 p_mmu->num_tlb, p_mmu->sets, p_mmu->ways, 615 p_mmu->num_tlb, p_mmu->sets, p_mmu->ways,
618 p_mmu->u_dtlb, p_mmu->u_itlb, 616 p_mmu->u_dtlb, p_mmu->u_itlb,
619 IS_ENABLED(CONFIG_ARC_MMU_SASID) ? "SASID" : ""); 617 IS_ENABLED(CONFIG_ARC_MMU_SASID) ? ",SASID" : "");
620 618
621 return buf; 619 return buf;
622} 620}
diff --git a/arch/arc/plat-arcfpga/Kconfig b/arch/arc/plat-arcfpga/Kconfig
index b9f34cf55acf..217593a70751 100644
--- a/arch/arc/plat-arcfpga/Kconfig
+++ b/arch/arc/plat-arcfpga/Kconfig
@@ -8,7 +8,7 @@
8 8
9menuconfig ARC_PLAT_FPGA_LEGACY 9menuconfig ARC_PLAT_FPGA_LEGACY
10 bool "\"Legacy\" ARC FPGA dev Boards" 10 bool "\"Legacy\" ARC FPGA dev Boards"
11 select ISS_SMP_EXTN if SMP 11 select ARC_HAS_COH_CACHES if SMP
12 help 12 help
13 Support for ARC development boards, provided by Synopsys. 13 Support for ARC development boards, provided by Synopsys.
14 These are based on FPGA or ISS. e.g. 14 These are based on FPGA or ISS. e.g.
@@ -18,17 +18,6 @@ menuconfig ARC_PLAT_FPGA_LEGACY
18 18
19if ARC_PLAT_FPGA_LEGACY 19if ARC_PLAT_FPGA_LEGACY
20 20
21config ARC_BOARD_ANGEL4
22 bool "ARC Angel4"
23 default y
24 help
25 ARC Angel4 FPGA Ref Platform (Xilinx Virtex Based)
26
27config ARC_BOARD_ML509
28 bool "ML509"
29 help
30 ARC ML509 FPGA Ref Platform (Xilinx Virtex-5 Based)
31
32config ISS_SMP_EXTN 21config ISS_SMP_EXTN
33 bool "ARC SMP Extensions (ISS Models only)" 22 bool "ARC SMP Extensions (ISS Models only)"
34 default n 23 default n
diff --git a/arch/arc/plat-arcfpga/include/plat/irq.h b/arch/arc/plat-arcfpga/include/plat/irq.h
deleted file mode 100644
index 2c9dea690ac4..000000000000
--- a/arch/arc/plat-arcfpga/include/plat/irq.h
+++ /dev/null
@@ -1,27 +0,0 @@
1/*
2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * vineetg: Feb 2009
9 * -For AA4 board, IRQ assignments to peripherals
10 */
11
12#ifndef __PLAT_IRQ_H
13#define __PLAT_IRQ_H
14
15#define UART0_IRQ 5
16#define UART1_IRQ 10
17#define UART2_IRQ 11
18
19#define IDE_IRQ 13
20#define PCI_IRQ 14
21#define PS2_IRQ 15
22
23#ifdef CONFIG_SMP
24#define IDU_INTERRUPT_0 16
25#endif
26
27#endif
diff --git a/arch/arc/plat-arcfpga/include/plat/memmap.h b/arch/arc/plat-arcfpga/include/plat/memmap.h
deleted file mode 100644
index 5c78e6135a1f..000000000000
--- a/arch/arc/plat-arcfpga/include/plat/memmap.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/*
2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * vineetg: Feb 2009
9 * -For AA4 board, System Memory Map for Peripherals etc
10 */
11
12#ifndef __PLAT_MEMMAP_H
13#define __PLAT_MEMMAP_H
14
15#define UART0_BASE 0xC0FC1000
16#define UART1_BASE 0xC0FC1100
17
18#define IDE_CONTROLLER_BASE 0xC0FC9000
19
20#define AHB_PCI_HOST_BRG_BASE 0xC0FD0000
21
22#define PGU_BASEADDR 0xC0FC8000
23#define VLCK_ADDR 0xC0FCF028
24
25#define BVCI_LAT_UNIT_BASE 0xC0FED000
26
27#define PS2_BASE_ADDR 0xC0FCC000
28
29#endif
diff --git a/arch/arc/plat-arcfpga/platform.c b/arch/arc/plat-arcfpga/platform.c
index 1038949a99a1..afc88254acc1 100644
--- a/arch/arc/plat-arcfpga/platform.c
+++ b/arch/arc/plat-arcfpga/platform.c
@@ -8,37 +8,9 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#include <linux/types.h>
12#include <linux/init.h> 11#include <linux/init.h>
13#include <linux/device.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/console.h>
17#include <linux/of_platform.h>
18#include <asm/setup.h>
19#include <asm/clk.h>
20#include <asm/mach_desc.h> 12#include <asm/mach_desc.h>
21#include <plat/memmap.h>
22#include <plat/smp.h> 13#include <plat/smp.h>
23#include <plat/irq.h>
24
25static void __init plat_fpga_early_init(void)
26{
27 pr_info("[plat-arcfpga]: registering early dev resources\n");
28
29#ifdef CONFIG_ISS_SMP_EXTN
30 iss_model_init_early_smp();
31#endif
32}
33
34static void __init plat_fpga_populate_dev(void)
35{
36 /*
37 * Traverses flattened DeviceTree - registering platform devices
38 * (if any) complete with their resources
39 */
40 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
41}
42 14
43/*----------------------- Machine Descriptions ------------------------------ 15/*----------------------- Machine Descriptions ------------------------------
44 * 16 *
@@ -48,41 +20,26 @@ static void __init plat_fpga_populate_dev(void)
48 * callback set, by matching the DT compatible name. 20 * callback set, by matching the DT compatible name.
49 */ 21 */
50 22
51static const char *aa4_compat[] __initconst = { 23static const char *legacy_fpga_compat[] __initconst = {
52 "snps,arc-angel4", 24 "snps,arc-angel4",
53 NULL,
54};
55
56MACHINE_START(ANGEL4, "angel4")
57 .dt_compat = aa4_compat,
58 .init_early = plat_fpga_early_init,
59 .init_machine = plat_fpga_populate_dev,
60#ifdef CONFIG_ISS_SMP_EXTN
61 .init_smp = iss_model_init_smp,
62#endif
63MACHINE_END
64
65static const char *ml509_compat[] __initconst = {
66 "snps,arc-ml509", 25 "snps,arc-ml509",
67 NULL, 26 NULL,
68}; 27};
69 28
70MACHINE_START(ML509, "ml509") 29MACHINE_START(LEGACY_FPGA, "legacy_fpga")
71 .dt_compat = ml509_compat, 30 .dt_compat = legacy_fpga_compat,
72 .init_early = plat_fpga_early_init, 31#ifdef CONFIG_ISS_SMP_EXTN
73 .init_machine = plat_fpga_populate_dev, 32 .init_early = iss_model_init_early_smp,
74#ifdef CONFIG_SMP
75 .init_smp = iss_model_init_smp, 33 .init_smp = iss_model_init_smp,
76#endif 34#endif
77MACHINE_END 35MACHINE_END
78 36
79static const char *nsimosci_compat[] __initconst = { 37static const char *simulation_compat[] __initconst = {
38 "snps,nsim",
80 "snps,nsimosci", 39 "snps,nsimosci",
81 NULL, 40 NULL,
82}; 41};
83 42
84MACHINE_START(NSIMOSCI, "nsimosci") 43MACHINE_START(SIMULATION, "simulation")
85 .dt_compat = nsimosci_compat, 44 .dt_compat = simulation_compat,
86 .init_early = NULL,
87 .init_machine = plat_fpga_populate_dev,
88MACHINE_END 45MACHINE_END
diff --git a/arch/arc/plat-arcfpga/smp.c b/arch/arc/plat-arcfpga/smp.c
index 92bad9122077..64797ba3bbe3 100644
--- a/arch/arc/plat-arcfpga/smp.c
+++ b/arch/arc/plat-arcfpga/smp.c
@@ -13,9 +13,10 @@
13 13
14#include <linux/smp.h> 14#include <linux/smp.h>
15#include <linux/irq.h> 15#include <linux/irq.h>
16#include <plat/irq.h>
17#include <plat/smp.h> 16#include <plat/smp.h>
18 17
18#define IDU_INTERRUPT_0 16
19
19static char smp_cpuinfo_buf[128]; 20static char smp_cpuinfo_buf[128];
20 21
21/* 22/*
diff --git a/arch/arc/plat-tb10x/Kconfig b/arch/arc/plat-tb10x/Kconfig
index 6994c188dc88..d14b3d3c5dfd 100644
--- a/arch/arc/plat-tb10x/Kconfig
+++ b/arch/arc/plat-tb10x/Kconfig
@@ -18,7 +18,6 @@
18 18
19menuconfig ARC_PLAT_TB10X 19menuconfig ARC_PLAT_TB10X
20 bool "Abilis TB10x" 20 bool "Abilis TB10x"
21 select COMMON_CLK
22 select PINCTRL 21 select PINCTRL
23 select PINCTRL_TB10X 22 select PINCTRL_TB10X
24 select PINMUX 23 select PINMUX
diff --git a/arch/arc/plat-tb10x/tb10x.c b/arch/arc/plat-tb10x/tb10x.c
index 06cb30929460..da0ac0960a4b 100644
--- a/arch/arc/plat-tb10x/tb10x.c
+++ b/arch/arc/plat-tb10x/tb10x.c
@@ -19,21 +19,9 @@
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21 21
22
23#include <linux/init.h> 22#include <linux/init.h>
24#include <linux/of_platform.h>
25#include <linux/clk-provider.h>
26#include <linux/pinctrl/consumer.h>
27
28#include <asm/mach_desc.h> 23#include <asm/mach_desc.h>
29 24
30
31static void __init tb10x_platform_init(void)
32{
33 of_clk_init(NULL);
34 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
35}
36
37static const char *tb10x_compat[] __initdata = { 25static const char *tb10x_compat[] __initdata = {
38 "abilis,arc-tb10x", 26 "abilis,arc-tb10x",
39 NULL, 27 NULL,
@@ -41,5 +29,4 @@ static const char *tb10x_compat[] __initdata = {
41 29
42MACHINE_START(TB10x, "tb10x") 30MACHINE_START(TB10x, "tb10x")
43 .dt_compat = tb10x_compat, 31 .dt_compat = tb10x_compat,
44 .init_machine = tb10x_platform_init,
45MACHINE_END 32MACHINE_END
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 03dc4c1a8736..d8f6a2ec3d4e 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -1187,7 +1187,7 @@ config DEBUG_UART_VIRT
1187 default 0xf1c28000 if DEBUG_SUNXI_UART0 1187 default 0xf1c28000 if DEBUG_SUNXI_UART0
1188 default 0xf1c28400 if DEBUG_SUNXI_UART1 1188 default 0xf1c28400 if DEBUG_SUNXI_UART1
1189 default 0xf1f02800 if DEBUG_SUNXI_R_UART 1189 default 0xf1f02800 if DEBUG_SUNXI_R_UART
1190 default 0xf2100000 if DEBUG_PXA_UART1 1190 default 0xf6200000 if DEBUG_PXA_UART1
1191 default 0xf4090000 if ARCH_LPC32XX 1191 default 0xf4090000 if ARCH_LPC32XX
1192 default 0xf4200000 if ARCH_GEMINI 1192 default 0xf4200000 if ARCH_GEMINI
1193 default 0xf7000000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART0 || \ 1193 default 0xf7000000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART0 || \
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 38c89cafa1ab..5b31c3f6d8e5 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -164,6 +164,9 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += kirkwood-b3.dtb \
164dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb 164dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
165dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb 165dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
166dtb-$(CONFIG_MACH_MESON6) += meson6-atv1200.dtb 166dtb-$(CONFIG_MACH_MESON6) += meson6-atv1200.dtb
167dtb-$(CONFIG_ARCH_MMP) += pxa168-aspenite.dtb \
168 pxa910-dkb.dtb \
169 mmp2-brownstone.dtb
167dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb 170dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb
168dtb-$(CONFIG_ARCH_MXC) += \ 171dtb-$(CONFIG_ARCH_MXC) += \
169 imx1-ads.dtb \ 172 imx1-ads.dtb \
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index d68b3c4862bc..51416c7d0625 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -122,9 +122,10 @@
122 interrupts-extended = <&pmc AT91_PMC_LOCKB>; 122 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
123 clocks = <&main>; 123 clocks = <&main>;
124 reg = <1>; 124 reg = <1>;
125 atmel,clk-input-range = <1000000 5000000>; 125 atmel,clk-input-range = <1000000 32000000>;
126 #atmel,pll-clk-output-range-cells = <4>; 126 #atmel,pll-clk-output-range-cells = <4>;
127 atmel,pll-clk-output-ranges = <70000000 130000000 1 1>; 127 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
128 <190000000 240000000 2 1>;
128 }; 129 };
129 130
130 mck: masterck { 131 mck: masterck {
diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts
index 09664fcf5afb..0e13b4b10a92 100644
--- a/arch/arm/boot/dts/imx28-evk.dts
+++ b/arch/arm/boot/dts/imx28-evk.dts
@@ -193,7 +193,6 @@
193 i2c0: i2c@80058000 { 193 i2c0: i2c@80058000 {
194 pinctrl-names = "default"; 194 pinctrl-names = "default";
195 pinctrl-0 = <&i2c0_pins_a>; 195 pinctrl-0 = <&i2c0_pins_a>;
196 clock-frequency = <400000>;
197 status = "okay"; 196 status = "okay";
198 197
199 sgtl5000: codec@0a { 198 sgtl5000: codec@0a {
diff --git a/arch/arm/boot/dts/mmp2-brownstone.dts b/arch/arm/boot/dts/mmp2-brownstone.dts
index 7f70a39459f6..350208c5e1ed 100644
--- a/arch/arm/boot/dts/mmp2-brownstone.dts
+++ b/arch/arm/boot/dts/mmp2-brownstone.dts
@@ -8,7 +8,7 @@
8 */ 8 */
9 9
10/dts-v1/; 10/dts-v1/;
11/include/ "mmp2.dtsi" 11#include "mmp2.dtsi"
12 12
13/ { 13/ {
14 model = "Marvell MMP2 Brownstone Development Board"; 14 model = "Marvell MMP2 Brownstone Development Board";
diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi
index 4e8b08c628c7..766bbb8495b6 100644
--- a/arch/arm/boot/dts/mmp2.dtsi
+++ b/arch/arm/boot/dts/mmp2.dtsi
@@ -7,7 +7,8 @@
7 * publishhed by the Free Software Foundation. 7 * publishhed by the Free Software Foundation.
8 */ 8 */
9 9
10/include/ "skeleton.dtsi" 10#include "skeleton.dtsi"
11#include <dt-bindings/clock/marvell,mmp2.h>
11 12
12/ { 13/ {
13 aliases { 14 aliases {
@@ -135,6 +136,8 @@
135 compatible = "mrvl,mmp-uart"; 136 compatible = "mrvl,mmp-uart";
136 reg = <0xd4030000 0x1000>; 137 reg = <0xd4030000 0x1000>;
137 interrupts = <27>; 138 interrupts = <27>;
139 clocks = <&soc_clocks MMP2_CLK_UART0>;
140 resets = <&soc_clocks MMP2_CLK_UART0>;
138 status = "disabled"; 141 status = "disabled";
139 }; 142 };
140 143
@@ -142,6 +145,8 @@
142 compatible = "mrvl,mmp-uart"; 145 compatible = "mrvl,mmp-uart";
143 reg = <0xd4017000 0x1000>; 146 reg = <0xd4017000 0x1000>;
144 interrupts = <28>; 147 interrupts = <28>;
148 clocks = <&soc_clocks MMP2_CLK_UART1>;
149 resets = <&soc_clocks MMP2_CLK_UART1>;
145 status = "disabled"; 150 status = "disabled";
146 }; 151 };
147 152
@@ -149,6 +154,8 @@
149 compatible = "mrvl,mmp-uart"; 154 compatible = "mrvl,mmp-uart";
150 reg = <0xd4018000 0x1000>; 155 reg = <0xd4018000 0x1000>;
151 interrupts = <24>; 156 interrupts = <24>;
157 clocks = <&soc_clocks MMP2_CLK_UART2>;
158 resets = <&soc_clocks MMP2_CLK_UART2>;
152 status = "disabled"; 159 status = "disabled";
153 }; 160 };
154 161
@@ -156,6 +163,8 @@
156 compatible = "mrvl,mmp-uart"; 163 compatible = "mrvl,mmp-uart";
157 reg = <0xd4016000 0x1000>; 164 reg = <0xd4016000 0x1000>;
158 interrupts = <46>; 165 interrupts = <46>;
166 clocks = <&soc_clocks MMP2_CLK_UART3>;
167 resets = <&soc_clocks MMP2_CLK_UART3>;
159 status = "disabled"; 168 status = "disabled";
160 }; 169 };
161 170
@@ -168,6 +177,8 @@
168 #gpio-cells = <2>; 177 #gpio-cells = <2>;
169 interrupts = <49>; 178 interrupts = <49>;
170 interrupt-names = "gpio_mux"; 179 interrupt-names = "gpio_mux";
180 clocks = <&soc_clocks MMP2_CLK_GPIO>;
181 resets = <&soc_clocks MMP2_CLK_GPIO>;
171 interrupt-controller; 182 interrupt-controller;
172 #interrupt-cells = <1>; 183 #interrupt-cells = <1>;
173 ranges; 184 ranges;
@@ -201,6 +212,8 @@
201 compatible = "mrvl,mmp-twsi"; 212 compatible = "mrvl,mmp-twsi";
202 reg = <0xd4011000 0x1000>; 213 reg = <0xd4011000 0x1000>;
203 interrupts = <7>; 214 interrupts = <7>;
215 clocks = <&soc_clocks MMP2_CLK_TWSI0>;
216 resets = <&soc_clocks MMP2_CLK_TWSI0>;
204 #address-cells = <1>; 217 #address-cells = <1>;
205 #size-cells = <0>; 218 #size-cells = <0>;
206 mrvl,i2c-fast-mode; 219 mrvl,i2c-fast-mode;
@@ -211,6 +224,8 @@
211 compatible = "mrvl,mmp-twsi"; 224 compatible = "mrvl,mmp-twsi";
212 reg = <0xd4025000 0x1000>; 225 reg = <0xd4025000 0x1000>;
213 interrupts = <58>; 226 interrupts = <58>;
227 clocks = <&soc_clocks MMP2_CLK_TWSI1>;
228 resets = <&soc_clocks MMP2_CLK_TWSI1>;
214 status = "disabled"; 229 status = "disabled";
215 }; 230 };
216 231
@@ -220,8 +235,20 @@
220 interrupts = <1 0>; 235 interrupts = <1 0>;
221 interrupt-names = "rtc 1Hz", "rtc alarm"; 236 interrupt-names = "rtc 1Hz", "rtc alarm";
222 interrupt-parent = <&intcmux5>; 237 interrupt-parent = <&intcmux5>;
238 clocks = <&soc_clocks MMP2_CLK_RTC>;
239 resets = <&soc_clocks MMP2_CLK_RTC>;
223 status = "disabled"; 240 status = "disabled";
224 }; 241 };
225 }; 242 };
243
244 soc_clocks: clocks{
245 compatible = "marvell,mmp2-clock";
246 reg = <0xd4050000 0x1000>,
247 <0xd4282800 0x400>,
248 <0xd4015000 0x1000>;
249 reg-names = "mpmu", "apmu", "apbc";
250 #clock-cells = <1>;
251 #reset-cells = <1>;
252 };
226 }; 253 };
227}; 254};
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 739fcf29c643..bc82a12d4c2c 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -668,6 +668,8 @@
668 bank-width = <2>; 668 bank-width = <2>;
669 pinctrl-names = "default"; 669 pinctrl-names = "default";
670 pinctrl-0 = <&ethernet_pins>; 670 pinctrl-0 = <&ethernet_pins>;
671 power-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; /* gpio86 */
672 reset-gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* gpio164 */
671 gpmc,device-width = <2>; 673 gpmc,device-width = <2>;
672 gpmc,sync-clk-ps = <0>; 674 gpmc,sync-clk-ps = <0>;
673 gpmc,cs-on-ns = <0>; 675 gpmc,cs-on-ns = <0>;
diff --git a/arch/arm/boot/dts/pxa168-aspenite.dts b/arch/arm/boot/dts/pxa168-aspenite.dts
index e762facb3fa4..0a988b3fb248 100644
--- a/arch/arm/boot/dts/pxa168-aspenite.dts
+++ b/arch/arm/boot/dts/pxa168-aspenite.dts
@@ -8,7 +8,7 @@
8 */ 8 */
9 9
10/dts-v1/; 10/dts-v1/;
11/include/ "pxa168.dtsi" 11#include "pxa168.dtsi"
12 12
13/ { 13/ {
14 model = "Marvell PXA168 Aspenite Development Board"; 14 model = "Marvell PXA168 Aspenite Development Board";
diff --git a/arch/arm/boot/dts/pxa168.dtsi b/arch/arm/boot/dts/pxa168.dtsi
index 975dad21ac38..b899e25cbb1b 100644
--- a/arch/arm/boot/dts/pxa168.dtsi
+++ b/arch/arm/boot/dts/pxa168.dtsi
@@ -7,7 +7,8 @@
7 * publishhed by the Free Software Foundation. 7 * publishhed by the Free Software Foundation.
8 */ 8 */
9 9
10/include/ "skeleton.dtsi" 10#include "skeleton.dtsi"
11#include <dt-bindings/clock/marvell,pxa168.h>
11 12
12/ { 13/ {
13 aliases { 14 aliases {
@@ -59,6 +60,8 @@
59 compatible = "mrvl,mmp-uart"; 60 compatible = "mrvl,mmp-uart";
60 reg = <0xd4017000 0x1000>; 61 reg = <0xd4017000 0x1000>;
61 interrupts = <27>; 62 interrupts = <27>;
63 clocks = <&soc_clocks PXA168_CLK_UART0>;
64 resets = <&soc_clocks PXA168_CLK_UART0>;
62 status = "disabled"; 65 status = "disabled";
63 }; 66 };
64 67
@@ -66,6 +69,8 @@
66 compatible = "mrvl,mmp-uart"; 69 compatible = "mrvl,mmp-uart";
67 reg = <0xd4018000 0x1000>; 70 reg = <0xd4018000 0x1000>;
68 interrupts = <28>; 71 interrupts = <28>;
72 clocks = <&soc_clocks PXA168_CLK_UART1>;
73 resets = <&soc_clocks PXA168_CLK_UART1>;
69 status = "disabled"; 74 status = "disabled";
70 }; 75 };
71 76
@@ -73,6 +78,8 @@
73 compatible = "mrvl,mmp-uart"; 78 compatible = "mrvl,mmp-uart";
74 reg = <0xd4026000 0x1000>; 79 reg = <0xd4026000 0x1000>;
75 interrupts = <29>; 80 interrupts = <29>;
81 clocks = <&soc_clocks PXA168_CLK_UART2>;
82 resets = <&soc_clocks PXA168_CLK_UART2>;
76 status = "disabled"; 83 status = "disabled";
77 }; 84 };
78 85
@@ -84,6 +91,8 @@
84 gpio-controller; 91 gpio-controller;
85 #gpio-cells = <2>; 92 #gpio-cells = <2>;
86 interrupts = <49>; 93 interrupts = <49>;
94 clocks = <&soc_clocks PXA168_CLK_GPIO>;
95 resets = <&soc_clocks PXA168_CLK_GPIO>;
87 interrupt-names = "gpio_mux"; 96 interrupt-names = "gpio_mux";
88 interrupt-controller; 97 interrupt-controller;
89 #interrupt-cells = <1>; 98 #interrupt-cells = <1>;
@@ -110,6 +119,8 @@
110 compatible = "mrvl,mmp-twsi"; 119 compatible = "mrvl,mmp-twsi";
111 reg = <0xd4011000 0x1000>; 120 reg = <0xd4011000 0x1000>;
112 interrupts = <7>; 121 interrupts = <7>;
122 clocks = <&soc_clocks PXA168_CLK_TWSI0>;
123 resets = <&soc_clocks PXA168_CLK_TWSI0>;
113 mrvl,i2c-fast-mode; 124 mrvl,i2c-fast-mode;
114 status = "disabled"; 125 status = "disabled";
115 }; 126 };
@@ -118,6 +129,8 @@
118 compatible = "mrvl,mmp-twsi"; 129 compatible = "mrvl,mmp-twsi";
119 reg = <0xd4025000 0x1000>; 130 reg = <0xd4025000 0x1000>;
120 interrupts = <58>; 131 interrupts = <58>;
132 clocks = <&soc_clocks PXA168_CLK_TWSI1>;
133 resets = <&soc_clocks PXA168_CLK_TWSI1>;
121 status = "disabled"; 134 status = "disabled";
122 }; 135 };
123 136
@@ -126,8 +139,20 @@
126 reg = <0xd4010000 0x1000>; 139 reg = <0xd4010000 0x1000>;
127 interrupts = <5 6>; 140 interrupts = <5 6>;
128 interrupt-names = "rtc 1Hz", "rtc alarm"; 141 interrupt-names = "rtc 1Hz", "rtc alarm";
142 clocks = <&soc_clocks PXA168_CLK_RTC>;
143 resets = <&soc_clocks PXA168_CLK_RTC>;
129 status = "disabled"; 144 status = "disabled";
130 }; 145 };
131 }; 146 };
147
148 soc_clocks: clocks{
149 compatible = "marvell,pxa168-clock";
150 reg = <0xd4050000 0x1000>,
151 <0xd4282800 0x400>,
152 <0xd4015000 0x1000>;
153 reg-names = "mpmu", "apmu", "apbc";
154 #clock-cells = <1>;
155 #reset-cells = <1>;
156 };
132 }; 157 };
133}; 158};
diff --git a/arch/arm/boot/dts/pxa910-dkb.dts b/arch/arm/boot/dts/pxa910-dkb.dts
index 595492aa5053..c82f2810ec73 100644
--- a/arch/arm/boot/dts/pxa910-dkb.dts
+++ b/arch/arm/boot/dts/pxa910-dkb.dts
@@ -8,7 +8,7 @@
8 */ 8 */
9 9
10/dts-v1/; 10/dts-v1/;
11/include/ "pxa910.dtsi" 11#include "pxa910.dtsi"
12 12
13/ { 13/ {
14 model = "Marvell PXA910 DKB Development Board"; 14 model = "Marvell PXA910 DKB Development Board";
diff --git a/arch/arm/boot/dts/pxa910.dtsi b/arch/arm/boot/dts/pxa910.dtsi
index 0247c622f580..0868f6729be1 100644
--- a/arch/arm/boot/dts/pxa910.dtsi
+++ b/arch/arm/boot/dts/pxa910.dtsi
@@ -7,7 +7,8 @@
7 * publishhed by the Free Software Foundation. 7 * publishhed by the Free Software Foundation.
8 */ 8 */
9 9
10/include/ "skeleton.dtsi" 10#include "skeleton.dtsi"
11#include <dt-bindings/clock/marvell,pxa910.h>
11 12
12/ { 13/ {
13 aliases { 14 aliases {
@@ -71,6 +72,8 @@
71 compatible = "mrvl,mmp-uart"; 72 compatible = "mrvl,mmp-uart";
72 reg = <0xd4017000 0x1000>; 73 reg = <0xd4017000 0x1000>;
73 interrupts = <27>; 74 interrupts = <27>;
75 clocks = <&soc_clocks PXA910_CLK_UART0>;
76 resets = <&soc_clocks PXA910_CLK_UART0>;
74 status = "disabled"; 77 status = "disabled";
75 }; 78 };
76 79
@@ -78,6 +81,8 @@
78 compatible = "mrvl,mmp-uart"; 81 compatible = "mrvl,mmp-uart";
79 reg = <0xd4018000 0x1000>; 82 reg = <0xd4018000 0x1000>;
80 interrupts = <28>; 83 interrupts = <28>;
84 clocks = <&soc_clocks PXA910_CLK_UART1>;
85 resets = <&soc_clocks PXA910_CLK_UART1>;
81 status = "disabled"; 86 status = "disabled";
82 }; 87 };
83 88
@@ -85,6 +90,8 @@
85 compatible = "mrvl,mmp-uart"; 90 compatible = "mrvl,mmp-uart";
86 reg = <0xd4036000 0x1000>; 91 reg = <0xd4036000 0x1000>;
87 interrupts = <59>; 92 interrupts = <59>;
93 clocks = <&soc_clocks PXA910_CLK_UART2>;
94 resets = <&soc_clocks PXA910_CLK_UART2>;
88 status = "disabled"; 95 status = "disabled";
89 }; 96 };
90 97
@@ -97,6 +104,8 @@
97 #gpio-cells = <2>; 104 #gpio-cells = <2>;
98 interrupts = <49>; 105 interrupts = <49>;
99 interrupt-names = "gpio_mux"; 106 interrupt-names = "gpio_mux";
107 clocks = <&soc_clocks PXA910_CLK_GPIO>;
108 resets = <&soc_clocks PXA910_CLK_GPIO>;
100 interrupt-controller; 109 interrupt-controller;
101 #interrupt-cells = <1>; 110 #interrupt-cells = <1>;
102 ranges; 111 ranges;
@@ -124,6 +133,8 @@
124 #size-cells = <0>; 133 #size-cells = <0>;
125 reg = <0xd4011000 0x1000>; 134 reg = <0xd4011000 0x1000>;
126 interrupts = <7>; 135 interrupts = <7>;
136 clocks = <&soc_clocks PXA910_CLK_TWSI0>;
137 resets = <&soc_clocks PXA910_CLK_TWSI0>;
127 mrvl,i2c-fast-mode; 138 mrvl,i2c-fast-mode;
128 status = "disabled"; 139 status = "disabled";
129 }; 140 };
@@ -134,6 +145,8 @@
134 #size-cells = <0>; 145 #size-cells = <0>;
135 reg = <0xd4037000 0x1000>; 146 reg = <0xd4037000 0x1000>;
136 interrupts = <54>; 147 interrupts = <54>;
148 clocks = <&soc_clocks PXA910_CLK_TWSI1>;
149 resets = <&soc_clocks PXA910_CLK_TWSI1>;
137 status = "disabled"; 150 status = "disabled";
138 }; 151 };
139 152
@@ -142,8 +155,21 @@
142 reg = <0xd4010000 0x1000>; 155 reg = <0xd4010000 0x1000>;
143 interrupts = <5 6>; 156 interrupts = <5 6>;
144 interrupt-names = "rtc 1Hz", "rtc alarm"; 157 interrupt-names = "rtc 1Hz", "rtc alarm";
158 clocks = <&soc_clocks PXA910_CLK_RTC>;
159 resets = <&soc_clocks PXA910_CLK_RTC>;
145 status = "disabled"; 160 status = "disabled";
146 }; 161 };
147 }; 162 };
163
164 soc_clocks: clocks{
165 compatible = "marvell,pxa910-clock";
166 reg = <0xd4050000 0x1000>,
167 <0xd4282800 0x400>,
168 <0xd4015000 0x1000>,
169 <0xd403b000 0x1000>;
170 reg-names = "mpmu", "apmu", "apbc", "apbcp";
171 #clock-cells = <1>;
172 #reset-cells = <1>;
173 };
148 }; 174 };
149}; 175};
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 45fce2cf6fed..4472fd92685c 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -547,7 +547,7 @@
547 status = "disabled"; 547 status = "disabled";
548 }; 548 };
549 549
550 gpio@ff708000 { 550 gpio0: gpio@ff708000 {
551 #address-cells = <1>; 551 #address-cells = <1>;
552 #size-cells = <0>; 552 #size-cells = <0>;
553 compatible = "snps,dw-apb-gpio"; 553 compatible = "snps,dw-apb-gpio";
@@ -555,7 +555,7 @@
555 clocks = <&per_base_clk>; 555 clocks = <&per_base_clk>;
556 status = "disabled"; 556 status = "disabled";
557 557
558 gpio0: gpio-controller@0 { 558 porta: gpio-controller@0 {
559 compatible = "snps,dw-apb-gpio-port"; 559 compatible = "snps,dw-apb-gpio-port";
560 gpio-controller; 560 gpio-controller;
561 #gpio-cells = <2>; 561 #gpio-cells = <2>;
@@ -567,7 +567,7 @@
567 }; 567 };
568 }; 568 };
569 569
570 gpio@ff709000 { 570 gpio1: gpio@ff709000 {
571 #address-cells = <1>; 571 #address-cells = <1>;
572 #size-cells = <0>; 572 #size-cells = <0>;
573 compatible = "snps,dw-apb-gpio"; 573 compatible = "snps,dw-apb-gpio";
@@ -575,7 +575,7 @@
575 clocks = <&per_base_clk>; 575 clocks = <&per_base_clk>;
576 status = "disabled"; 576 status = "disabled";
577 577
578 gpio1: gpio-controller@0 { 578 portb: gpio-controller@0 {
579 compatible = "snps,dw-apb-gpio-port"; 579 compatible = "snps,dw-apb-gpio-port";
580 gpio-controller; 580 gpio-controller;
581 #gpio-cells = <2>; 581 #gpio-cells = <2>;
@@ -587,7 +587,7 @@
587 }; 587 };
588 }; 588 };
589 589
590 gpio@ff70a000 { 590 gpio2: gpio@ff70a000 {
591 #address-cells = <1>; 591 #address-cells = <1>;
592 #size-cells = <0>; 592 #size-cells = <0>;
593 compatible = "snps,dw-apb-gpio"; 593 compatible = "snps,dw-apb-gpio";
@@ -595,7 +595,7 @@
595 clocks = <&per_base_clk>; 595 clocks = <&per_base_clk>;
596 status = "disabled"; 596 status = "disabled";
597 597
598 gpio2: gpio-controller@0 { 598 portc: gpio-controller@0 {
599 compatible = "snps,dw-apb-gpio-port"; 599 compatible = "snps,dw-apb-gpio-port";
600 gpio-controller; 600 gpio-controller;
601 #gpio-cells = <2>; 601 #gpio-cells = <2>;
diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi b/arch/arm/boot/dts/socfpga_arria5.dtsi
index 03e8268ae219..1907cc600452 100644
--- a/arch/arm/boot/dts/socfpga_arria5.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria5.dtsi
@@ -29,7 +29,7 @@
29 }; 29 };
30 }; 30 };
31 31
32 dwmmc0@ff704000 { 32 mmc0: dwmmc0@ff704000 {
33 num-slots = <1>; 33 num-slots = <1>;
34 broken-cd; 34 broken-cd;
35 bus-width = <4>; 35 bus-width = <4>;
diff --git a/arch/arm/boot/dts/socfpga_arria5_socdk.dts b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
index 27d551c384d0..ccaf41742fc3 100644
--- a/arch/arm/boot/dts/socfpga_arria5_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
@@ -37,6 +37,13 @@
37 */ 37 */
38 ethernet0 = &gmac1; 38 ethernet0 = &gmac1;
39 }; 39 };
40
41 regulator_3_3v: 3-3-v-regulator {
42 compatible = "regulator-fixed";
43 regulator-name = "3.3V";
44 regulator-min-microvolt = <3300000>;
45 regulator-max-microvolt = <3300000>;
46 };
40}; 47};
41 48
42&gmac1 { 49&gmac1 {
@@ -68,6 +75,11 @@
68 }; 75 };
69}; 76};
70 77
78&mmc0 {
79 vmmc-supply = <&regulator_3_3v>;
80 vqmmc-supply = <&regulator_3_3v>;
81};
82
71&usb1 { 83&usb1 {
72 status = "okay"; 84 status = "okay";
73}; 85};
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
index d7296a5f750c..258865da8f6a 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
@@ -37,6 +37,13 @@
37 */ 37 */
38 ethernet0 = &gmac1; 38 ethernet0 = &gmac1;
39 }; 39 };
40
41 regulator_3_3v: 3-3-v-regulator {
42 compatible = "regulator-fixed";
43 regulator-name = "3.3V";
44 regulator-min-microvolt = <3300000>;
45 regulator-max-microvolt = <3300000>;
46 };
40}; 47};
41 48
42&gmac1 { 49&gmac1 {
@@ -53,6 +60,10 @@
53 rxc-skew-ps = <2000>; 60 rxc-skew-ps = <2000>;
54}; 61};
55 62
63&gpio1 {
64 status = "okay";
65};
66
56&i2c0 { 67&i2c0 {
57 status = "okay"; 68 status = "okay";
58 69
@@ -69,7 +80,9 @@
69}; 80};
70 81
71&mmc0 { 82&mmc0 {
72 cd-gpios = <&gpio1 18 0>; 83 cd-gpios = <&portb 18 0>;
84 vmmc-supply = <&regulator_3_3v>;
85 vqmmc-supply = <&regulator_3_3v>;
73}; 86};
74 87
75&usb1 { 88&usb1 {
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
index d26f155f5fd9..16ea6f5f2ab8 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
@@ -37,6 +37,13 @@
37 */ 37 */
38 ethernet0 = &gmac1; 38 ethernet0 = &gmac1;
39 }; 39 };
40
41 regulator_3_3v: vcc3p3-regulator {
42 compatible = "regulator-fixed";
43 regulator-name = "VCC3P3";
44 regulator-min-microvolt = <3300000>;
45 regulator-max-microvolt = <3300000>;
46 };
40}; 47};
41 48
42&gmac1 { 49&gmac1 {
@@ -53,6 +60,11 @@
53 rxc-skew-ps = <2000>; 60 rxc-skew-ps = <2000>;
54}; 61};
55 62
63&mmc0 {
64 vmmc-supply = <&regulator_3_3v>;
65 vqmmc-supply = <&regulator_3_3v>;
66};
67
56&usb1 { 68&usb1 {
57 status = "okay"; 69 status = "okay";
58}; 70};
diff --git a/arch/arm/boot/dts/vf610-cosmic.dts b/arch/arm/boot/dts/vf610-cosmic.dts
index 3fd1b74e1216..de1b453c2932 100644
--- a/arch/arm/boot/dts/vf610-cosmic.dts
+++ b/arch/arm/boot/dts/vf610-cosmic.dts
@@ -33,6 +33,13 @@
33 33
34}; 34};
35 35
36&esdhc1 {
37 pinctrl-names = "default";
38 pinctrl-0 = <&pinctrl_esdhc1>;
39 bus-width = <4>;
40 status = "okay";
41};
42
36&fec1 { 43&fec1 {
37 phy-mode = "rmii"; 44 phy-mode = "rmii";
38 pinctrl-names = "default"; 45 pinctrl-names = "default";
@@ -42,6 +49,18 @@
42 49
43&iomuxc { 50&iomuxc {
44 vf610-cosmic { 51 vf610-cosmic {
52 pinctrl_esdhc1: esdhc1grp {
53 fsl,pins = <
54 VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
55 VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
56 VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
57 VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
58 VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
59 VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
60 VF610_PAD_PTB28__GPIO_98 0x219d
61 >;
62 };
63
45 pinctrl_fec1: fec1grp { 64 pinctrl_fec1: fec1grp {
46 fsl,pins = < 65 fsl,pins = <
47 VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 66 VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 24036c440440..ce2ef5bec4f2 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -30,7 +30,6 @@
30 /* kHz uV */ 30 /* kHz uV */
31 666667 1000000 31 666667 1000000
32 333334 1000000 32 333334 1000000
33 222223 1000000
34 >; 33 >;
35 }; 34 };
36 35
@@ -65,7 +64,7 @@
65 interrupt-parent = <&intc>; 64 interrupt-parent = <&intc>;
66 ranges; 65 ranges;
67 66
68 adc@f8007100 { 67 adc: adc@f8007100 {
69 compatible = "xlnx,zynq-xadc-1.00.a"; 68 compatible = "xlnx,zynq-xadc-1.00.a";
70 reg = <0xf8007100 0x20>; 69 reg = <0xf8007100 0x20>;
71 interrupts = <0 7 4>; 70 interrupts = <0 7 4>;
@@ -137,7 +136,7 @@
137 <0xF8F00100 0x100>; 136 <0xF8F00100 0x100>;
138 }; 137 };
139 138
140 L2: cache-controller { 139 L2: cache-controller@f8f02000 {
141 compatible = "arm,pl310-cache"; 140 compatible = "arm,pl310-cache";
142 reg = <0xF8F02000 0x1000>; 141 reg = <0xF8F02000 0x1000>;
143 arm,data-latency = <3 2 2>; 142 arm,data-latency = <3 2 2>;
@@ -146,10 +145,10 @@
146 cache-level = <2>; 145 cache-level = <2>;
147 }; 146 };
148 147
149 memory-controller@f8006000 { 148 mc: memory-controller@f8006000 {
150 compatible = "xlnx,zynq-ddrc-a05"; 149 compatible = "xlnx,zynq-ddrc-a05";
151 reg = <0xf8006000 0x1000>; 150 reg = <0xf8006000 0x1000>;
152 } ; 151 };
153 152
154 uart0: serial@e0000000 { 153 uart0: serial@e0000000 {
155 compatible = "xlnx,xuartps", "cdns,uart-r1p8"; 154 compatible = "xlnx,xuartps", "cdns,uart-r1p8";
@@ -195,7 +194,7 @@
195 194
196 gem0: ethernet@e000b000 { 195 gem0: ethernet@e000b000 {
197 compatible = "cdns,gem"; 196 compatible = "cdns,gem";
198 reg = <0xe000b000 0x4000>; 197 reg = <0xe000b000 0x1000>;
199 status = "disabled"; 198 status = "disabled";
200 interrupts = <0 22 4>; 199 interrupts = <0 22 4>;
201 clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>; 200 clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;
@@ -206,7 +205,7 @@
206 205
207 gem1: ethernet@e000c000 { 206 gem1: ethernet@e000c000 {
208 compatible = "cdns,gem"; 207 compatible = "cdns,gem";
209 reg = <0xe000c000 0x4000>; 208 reg = <0xe000c000 0x1000>;
210 status = "disabled"; 209 status = "disabled";
211 interrupts = <0 45 4>; 210 interrupts = <0 45 4>;
212 clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>; 211 clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>;
@@ -315,5 +314,16 @@
315 reg = <0xf8f00600 0x20>; 314 reg = <0xf8f00600 0x20>;
316 clocks = <&clkc 4>; 315 clocks = <&clkc 4>;
317 }; 316 };
317
318 watchdog0: watchdog@f8005000 {
319 clocks = <&clkc 45>;
320 compatible = "xlnx,zynq-wdt-r1p2";
321 device_type = "watchdog";
322 interrupt-parent = <&intc>;
323 interrupts = <0 9 1>;
324 reg = <0xf8005000 0x1000>;
325 reset = <0>;
326 timeout-sec = <10>;
327 };
318 }; 328 };
319}; 329};
diff --git a/arch/arm/boot/dts/zynq-parallella.dts b/arch/arm/boot/dts/zynq-parallella.dts
index e1f51ca127fe..0429bbd89fba 100644
--- a/arch/arm/boot/dts/zynq-parallella.dts
+++ b/arch/arm/boot/dts/zynq-parallella.dts
@@ -34,6 +34,10 @@
34 }; 34 };
35}; 35};
36 36
37&clkc {
38 fclk-enable = <0xf>;
39};
40
37&gem0 { 41&gem0 {
38 status = "okay"; 42 status = "okay";
39 phy-mode = "rgmii-id"; 43 phy-mode = "rgmii-id";
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index d86771abbf57..72041f002b7e 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -26,6 +26,7 @@
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/slab.h> 27#include <linux/slab.h>
28#include <linux/edma.h> 28#include <linux/edma.h>
29#include <linux/dma-mapping.h>
29#include <linux/of_address.h> 30#include <linux/of_address.h>
30#include <linux/of_device.h> 31#include <linux/of_device.h>
31#include <linux/of_dma.h> 32#include <linux/of_dma.h>
@@ -1623,6 +1624,11 @@ static int edma_probe(struct platform_device *pdev)
1623 struct device_node *node = pdev->dev.of_node; 1624 struct device_node *node = pdev->dev.of_node;
1624 struct device *dev = &pdev->dev; 1625 struct device *dev = &pdev->dev;
1625 int ret; 1626 int ret;
1627 struct platform_device_info edma_dev_info = {
1628 .name = "edma-dma-engine",
1629 .dma_mask = DMA_BIT_MASK(32),
1630 .parent = &pdev->dev,
1631 };
1626 1632
1627 if (node) { 1633 if (node) {
1628 /* Check if this is a second instance registered */ 1634 /* Check if this is a second instance registered */
@@ -1793,6 +1799,9 @@ static int edma_probe(struct platform_device *pdev)
1793 edma_write_array(j, EDMA_QRAE, i, 0x0); 1799 edma_write_array(j, EDMA_QRAE, i, 0x0);
1794 } 1800 }
1795 arch_num_cc++; 1801 arch_num_cc++;
1802
1803 edma_dev_info.id = j;
1804 platform_device_register_full(&edma_dev_info);
1796 } 1805 }
1797 1806
1798 return 0; 1807 return 0;
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index e688741c89aa..e6b0007355f8 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -97,6 +97,7 @@ CONFIG_SERIAL_IMX_CONSOLE=y
97# CONFIG_HW_RANDOM is not set 97# CONFIG_HW_RANDOM is not set
98CONFIG_I2C_CHARDEV=y 98CONFIG_I2C_CHARDEV=y
99CONFIG_I2C_IMX=y 99CONFIG_I2C_IMX=y
100CONFIG_SPI=y
100CONFIG_SPI_IMX=y 101CONFIG_SPI_IMX=y
101CONFIG_SPI_SPIDEV=y 102CONFIG_SPI_SPIDEV=y
102CONFIG_GPIO_SYSFS=y 103CONFIG_GPIO_SYSFS=y
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index 8fca6e276b69..6790f1b3f3a1 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -158,6 +158,7 @@ CONFIG_I2C_CHARDEV=y
158CONFIG_I2C_ALGOPCF=m 158CONFIG_I2C_ALGOPCF=m
159CONFIG_I2C_ALGOPCA=m 159CONFIG_I2C_ALGOPCA=m
160CONFIG_I2C_IMX=y 160CONFIG_I2C_IMX=y
161CONFIG_SPI=y
161CONFIG_SPI_IMX=y 162CONFIG_SPI_IMX=y
162CONFIG_GPIO_SYSFS=y 163CONFIG_GPIO_SYSFS=y
163CONFIG_GPIO_MC9S08DZ60=y 164CONFIG_GPIO_MC9S08DZ60=y
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 491b7d5523bf..3487046d8a78 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -235,6 +235,7 @@ CONFIG_SPI_TEGRA20_SLINK=y
235CONFIG_SPI_XILINX=y 235CONFIG_SPI_XILINX=y
236CONFIG_PINCTRL_AS3722=y 236CONFIG_PINCTRL_AS3722=y
237CONFIG_PINCTRL_PALMAS=y 237CONFIG_PINCTRL_PALMAS=y
238CONFIG_PINCTRL_APQ8084=y
238CONFIG_GPIO_SYSFS=y 239CONFIG_GPIO_SYSFS=y
239CONFIG_GPIO_GENERIC_PLATFORM=y 240CONFIG_GPIO_GENERIC_PLATFORM=y
240CONFIG_GPIO_DWAPB=y 241CONFIG_GPIO_DWAPB=y
@@ -261,6 +262,7 @@ CONFIG_WATCHDOG=y
261CONFIG_XILINX_WATCHDOG=y 262CONFIG_XILINX_WATCHDOG=y
262CONFIG_ORION_WATCHDOG=y 263CONFIG_ORION_WATCHDOG=y
263CONFIG_SUNXI_WATCHDOG=y 264CONFIG_SUNXI_WATCHDOG=y
265CONFIG_MESON_WATCHDOG=y
264CONFIG_MFD_AS3722=y 266CONFIG_MFD_AS3722=y
265CONFIG_MFD_BCM590XX=y 267CONFIG_MFD_BCM590XX=y
266CONFIG_MFD_CROS_EC=y 268CONFIG_MFD_CROS_EC=y
@@ -353,6 +355,7 @@ CONFIG_MMC_MVSDIO=y
353CONFIG_MMC_SUNXI=y 355CONFIG_MMC_SUNXI=y
354CONFIG_MMC_DW=y 356CONFIG_MMC_DW=y
355CONFIG_MMC_DW_EXYNOS=y 357CONFIG_MMC_DW_EXYNOS=y
358CONFIG_MMC_DW_ROCKCHIP=y
356CONFIG_NEW_LEDS=y 359CONFIG_NEW_LEDS=y
357CONFIG_LEDS_CLASS=y 360CONFIG_LEDS_CLASS=y
358CONFIG_LEDS_GPIO=y 361CONFIG_LEDS_GPIO=y
@@ -409,6 +412,7 @@ CONFIG_NVEC_POWER=y
409CONFIG_NVEC_PAZ00=y 412CONFIG_NVEC_PAZ00=y
410CONFIG_QCOM_GSBI=y 413CONFIG_QCOM_GSBI=y
411CONFIG_COMMON_CLK_QCOM=y 414CONFIG_COMMON_CLK_QCOM=y
415CONFIG_APQ_MMCC_8084=y
412CONFIG_MSM_GCC_8660=y 416CONFIG_MSM_GCC_8660=y
413CONFIG_MSM_MMCC_8960=y 417CONFIG_MSM_MMCC_8960=y
414CONFIG_MSM_MMCC_8974=y 418CONFIG_MSM_MMCC_8974=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 16e719c268dd..b3f86670d2eb 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -86,7 +86,6 @@ CONFIG_IP_PNP_DHCP=y
86CONFIG_IP_PNP_BOOTP=y 86CONFIG_IP_PNP_BOOTP=y
87CONFIG_IP_PNP_RARP=y 87CONFIG_IP_PNP_RARP=y
88# CONFIG_INET_LRO is not set 88# CONFIG_INET_LRO is not set
89CONFIG_IPV6=y
90CONFIG_NETFILTER=y 89CONFIG_NETFILTER=y
91CONFIG_CAN=m 90CONFIG_CAN=m
92CONFIG_CAN_C_CAN=m 91CONFIG_CAN_C_CAN=m
@@ -112,6 +111,7 @@ CONFIG_MTD_OOPS=y
112CONFIG_MTD_CFI=y 111CONFIG_MTD_CFI=y
113CONFIG_MTD_CFI_INTELEXT=y 112CONFIG_MTD_CFI_INTELEXT=y
114CONFIG_MTD_NAND=y 113CONFIG_MTD_NAND=y
114CONFIG_MTD_NAND_ECC_BCH=y
115CONFIG_MTD_NAND_OMAP2=y 115CONFIG_MTD_NAND_OMAP2=y
116CONFIG_MTD_ONENAND=y 116CONFIG_MTD_ONENAND=y
117CONFIG_MTD_ONENAND_VERIFY_WRITE=y 117CONFIG_MTD_ONENAND_VERIFY_WRITE=y
@@ -317,7 +317,7 @@ CONFIG_EXT4_FS=y
317CONFIG_FANOTIFY=y 317CONFIG_FANOTIFY=y
318CONFIG_QUOTA=y 318CONFIG_QUOTA=y
319CONFIG_QFMT_V2=y 319CONFIG_QFMT_V2=y
320CONFIG_AUTOFS4_FS=y 320CONFIG_AUTOFS4_FS=m
321CONFIG_MSDOS_FS=y 321CONFIG_MSDOS_FS=y
322CONFIG_VFAT_FS=y 322CONFIG_VFAT_FS=y
323CONFIG_TMPFS=y 323CONFIG_TMPFS=y
diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig
index d7a5855a5db8..a2956c3112f1 100644
--- a/arch/arm/configs/socfpga_defconfig
+++ b/arch/arm/configs/socfpga_defconfig
@@ -1,5 +1,6 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y 1CONFIG_SYSVIPC=y
2CONFIG_FHANDLE=y
3CONFIG_HIGH_RES_TIMERS=y
3CONFIG_IKCONFIG=y 4CONFIG_IKCONFIG=y
4CONFIG_IKCONFIG_PROC=y 5CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=14 6CONFIG_LOG_BUF_SHIFT=14
@@ -11,23 +12,17 @@ CONFIG_PROFILING=y
11CONFIG_OPROFILE=y 12CONFIG_OPROFILE=y
12CONFIG_MODULES=y 13CONFIG_MODULES=y
13CONFIG_MODULE_UNLOAD=y 14CONFIG_MODULE_UNLOAD=y
14CONFIG_HOTPLUG=y
15# CONFIG_LBDAF is not set 15# CONFIG_LBDAF is not set
16# CONFIG_BLK_DEV_BSG is not set 16# CONFIG_BLK_DEV_BSG is not set
17# CONFIG_IOSCHED_DEADLINE is not set 17# CONFIG_IOSCHED_DEADLINE is not set
18# CONFIG_IOSCHED_CFQ is not set 18# CONFIG_IOSCHED_CFQ is not set
19CONFIG_ARCH_SOCFPGA=y 19CONFIG_ARCH_SOCFPGA=y
20CONFIG_MACH_SOCFPGA_CYCLONE5=y
21CONFIG_ARM_THUMBEE=y 20CONFIG_ARM_THUMBEE=y
22# CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA is not set
23# CONFIG_CACHE_L2X0 is not set
24CONFIG_HIGH_RES_TIMERS=y
25CONFIG_SMP=y 21CONFIG_SMP=y
26CONFIG_NR_CPUS=2 22CONFIG_NR_CPUS=2
27CONFIG_AEABI=y 23CONFIG_AEABI=y
28CONFIG_ZBOOT_ROM_TEXT=0x0 24CONFIG_ZBOOT_ROM_TEXT=0x0
29CONFIG_ZBOOT_ROM_BSS=0x0 25CONFIG_ZBOOT_ROM_BSS=0x0
30CONFIG_CMDLINE=""
31CONFIG_VFP=y 26CONFIG_VFP=y
32CONFIG_NEON=y 27CONFIG_NEON=y
33CONFIG_NET=y 28CONFIG_NET=y
@@ -41,38 +36,30 @@ CONFIG_IP_PNP=y
41CONFIG_IP_PNP_DHCP=y 36CONFIG_IP_PNP_DHCP=y
42CONFIG_IP_PNP_BOOTP=y 37CONFIG_IP_PNP_BOOTP=y
43CONFIG_IP_PNP_RARP=y 38CONFIG_IP_PNP_RARP=y
39CONFIG_IPV6=y
40CONFIG_NETWORK_PHY_TIMESTAMPING=y
41CONFIG_VLAN_8021Q=y
42CONFIG_VLAN_8021Q_GVRP=y
44CONFIG_CAN=y 43CONFIG_CAN=y
45CONFIG_CAN_RAW=y
46CONFIG_CAN_BCM=y
47CONFIG_CAN_GW=y
48CONFIG_CAN_DEV=y
49CONFIG_CAN_CALC_BITTIMING=y
50CONFIG_CAN_C_CAN=y 44CONFIG_CAN_C_CAN=y
51CONFIG_CAN_C_CAN_PLATFORM=y 45CONFIG_CAN_C_CAN_PLATFORM=y
52CONFIG_CAN_DEBUG_DEVICES=y 46CONFIG_CAN_DEBUG_DEVICES=y
53CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 47CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
54CONFIG_DEVTMPFS=y 48CONFIG_DEVTMPFS=y
55CONFIG_PROC_DEVICETREE=y 49CONFIG_DEVTMPFS_MOUNT=y
56CONFIG_BLK_DEV_RAM=y 50CONFIG_BLK_DEV_RAM=y
57CONFIG_BLK_DEV_RAM_COUNT=2 51CONFIG_BLK_DEV_RAM_COUNT=2
58CONFIG_BLK_DEV_RAM_SIZE=8192 52CONFIG_BLK_DEV_RAM_SIZE=8192
53CONFIG_SRAM=y
59CONFIG_SCSI=y 54CONFIG_SCSI=y
60# CONFIG_SCSI_PROC_FS is not set 55# CONFIG_SCSI_PROC_FS is not set
61CONFIG_BLK_DEV_SD=y 56CONFIG_BLK_DEV_SD=y
62# CONFIG_SCSI_LOWLEVEL is not set 57# CONFIG_SCSI_LOWLEVEL is not set
63CONFIG_NETDEVICES=y 58CONFIG_NETDEVICES=y
64CONFIG_STMMAC_ETH=y 59CONFIG_STMMAC_ETH=y
60CONFIG_DWMAC_SOCFPGA=y
65CONFIG_MICREL_PHY=y 61CONFIG_MICREL_PHY=y
66# CONFIG_STMMAC_PHY_ID_ZERO_WORKAROUND is not set
67CONFIG_INPUT_EVDEV=y 62CONFIG_INPUT_EVDEV=y
68CONFIG_DWMAC_SOCFPGA=y
69CONFIG_PPS=y
70CONFIG_NETWORK_PHY_TIMESTAMPING=y
71CONFIG_PTP_1588_CLOCK=y
72CONFIG_VLAN_8021Q=y
73CONFIG_VLAN_8021Q_GVRP=y
74CONFIG_GARP=y
75CONFIG_IPV6=y
76# CONFIG_SERIO_SERPORT is not set 63# CONFIG_SERIO_SERPORT is not set
77CONFIG_SERIO_AMBAKMI=y 64CONFIG_SERIO_AMBAKMI=y
78CONFIG_LEGACY_PTY_COUNT=16 65CONFIG_LEGACY_PTY_COUNT=16
@@ -81,45 +68,43 @@ CONFIG_SERIAL_8250_CONSOLE=y
81CONFIG_SERIAL_8250_NR_UARTS=2 68CONFIG_SERIAL_8250_NR_UARTS=2
82CONFIG_SERIAL_8250_RUNTIME_UARTS=2 69CONFIG_SERIAL_8250_RUNTIME_UARTS=2
83CONFIG_SERIAL_8250_DW=y 70CONFIG_SERIAL_8250_DW=y
71CONFIG_I2C=y
72CONFIG_I2C_CHARDEV=y
73CONFIG_I2C_DESIGNWARE_PLATFORM=y
84CONFIG_GPIOLIB=y 74CONFIG_GPIOLIB=y
85CONFIG_GPIO_SYSFS=y 75CONFIG_GPIO_SYSFS=y
86CONFIG_GPIO_DWAPB=y 76CONFIG_GPIO_DWAPB=y
87# CONFIG_RTC_HCTOSYS is not set 77CONFIG_PMBUS=y
78CONFIG_SENSORS_LTC2978=y
79CONFIG_SENSORS_LTC2978_REGULATOR=y
88CONFIG_WATCHDOG=y 80CONFIG_WATCHDOG=y
89CONFIG_DW_WATCHDOG=y 81CONFIG_DW_WATCHDOG=y
82CONFIG_REGULATOR=y
83CONFIG_REGULATOR_FIXED_VOLTAGE=y
84CONFIG_USB=y
85CONFIG_USB_DWC2=y
86CONFIG_USB_DWC2_HOST=y
87CONFIG_MMC=y
88CONFIG_MMC_DW=y
90CONFIG_EXT2_FS=y 89CONFIG_EXT2_FS=y
91CONFIG_EXT2_FS_XATTR=y 90CONFIG_EXT2_FS_XATTR=y
92CONFIG_EXT2_FS_POSIX_ACL=y 91CONFIG_EXT2_FS_POSIX_ACL=y
93CONFIG_EXT3_FS=y 92CONFIG_EXT3_FS=y
94CONFIG_NFS_FS=y 93CONFIG_EXT4_FS=y
95CONFIG_ROOT_NFS=y
96# CONFIG_DNOTIFY is not set
97# CONFIG_INOTIFY_USER is not set
98CONFIG_FHANDLE=y
99CONFIG_VFAT_FS=y 94CONFIG_VFAT_FS=y
100CONFIG_NTFS_FS=y 95CONFIG_NTFS_FS=y
101CONFIG_NTFS_RW=y 96CONFIG_NTFS_RW=y
102CONFIG_TMPFS=y 97CONFIG_TMPFS=y
103CONFIG_JFFS2_FS=y 98CONFIG_CONFIGFS_FS=y
99CONFIG_NFS_FS=y
100CONFIG_ROOT_NFS=y
104CONFIG_NLS_CODEPAGE_437=y 101CONFIG_NLS_CODEPAGE_437=y
105CONFIG_NLS_ISO8859_1=y 102CONFIG_NLS_ISO8859_1=y
103CONFIG_PRINTK_TIME=y
104CONFIG_DEBUG_INFO=y
106CONFIG_MAGIC_SYSRQ=y 105CONFIG_MAGIC_SYSRQ=y
107CONFIG_DETECT_HUNG_TASK=y 106CONFIG_DETECT_HUNG_TASK=y
108# CONFIG_SCHED_DEBUG is not set 107# CONFIG_SCHED_DEBUG is not set
109CONFIG_DEBUG_INFO=y
110CONFIG_ENABLE_DEFAULT_TRACERS=y 108CONFIG_ENABLE_DEFAULT_TRACERS=y
111CONFIG_DEBUG_USER=y 109CONFIG_DEBUG_USER=y
112CONFIG_XZ_DEC=y 110CONFIG_XZ_DEC=y
113CONFIG_I2C=y
114CONFIG_I2C_DESIGNWARE_CORE=y
115CONFIG_I2C_DESIGNWARE_PLATFORM=y
116CONFIG_I2C_CHARDEV=y
117CONFIG_MMC=y
118CONFIG_MMC_DW=y
119CONFIG_PM=y
120CONFIG_SUSPEND=y
121CONFIG_MMC_UNSAFE_RESUME=y
122CONFIG_USB=y
123CONFIG_USB_DWC2=y
124CONFIG_USB_DWC2_HOST=y
125CONFIG_USB_DWC2_PLATFORM=y
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index 847045313101..f7ac0379850f 100644
--- a/arch/arm/configs/sunxi_defconfig
+++ b/arch/arm/configs/sunxi_defconfig
@@ -76,6 +76,7 @@ CONFIG_WATCHDOG=y
76CONFIG_SUNXI_WATCHDOG=y 76CONFIG_SUNXI_WATCHDOG=y
77CONFIG_MFD_AXP20X=y 77CONFIG_MFD_AXP20X=y
78CONFIG_REGULATOR=y 78CONFIG_REGULATOR=y
79CONFIG_REGULATOR_FIXED_VOLTAGE=y
79CONFIG_REGULATOR_GPIO=y 80CONFIG_REGULATOR_GPIO=y
80CONFIG_USB=y 81CONFIG_USB=y
81CONFIG_USB_EHCI_HCD=y 82CONFIG_USB_EHCI_HCD=y
diff --git a/arch/arm/include/uapi/asm/unistd.h b/arch/arm/include/uapi/asm/unistd.h
index 3aaa75cae90c..705bb7620673 100644
--- a/arch/arm/include/uapi/asm/unistd.h
+++ b/arch/arm/include/uapi/asm/unistd.h
@@ -412,6 +412,7 @@
412#define __NR_seccomp (__NR_SYSCALL_BASE+383) 412#define __NR_seccomp (__NR_SYSCALL_BASE+383)
413#define __NR_getrandom (__NR_SYSCALL_BASE+384) 413#define __NR_getrandom (__NR_SYSCALL_BASE+384)
414#define __NR_memfd_create (__NR_SYSCALL_BASE+385) 414#define __NR_memfd_create (__NR_SYSCALL_BASE+385)
415#define __NR_bpf (__NR_SYSCALL_BASE+386)
415 416
416/* 417/*
417 * The following SWIs are ARM private. 418 * The following SWIs are ARM private.
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c
index 713e807621d2..2d2d6087b9b1 100644
--- a/arch/arm/kernel/asm-offsets.c
+++ b/arch/arm/kernel/asm-offsets.c
@@ -10,6 +10,7 @@
10 * it under the terms of the GNU General Public License version 2 as 10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
12 */ 12 */
13#include <linux/compiler.h>
13#include <linux/sched.h> 14#include <linux/sched.h>
14#include <linux/mm.h> 15#include <linux/mm.h>
15#include <linux/dma-mapping.h> 16#include <linux/dma-mapping.h>
@@ -39,10 +40,19 @@
39 * GCC 3.2.x: miscompiles NEW_AUX_ENT in fs/binfmt_elf.c 40 * GCC 3.2.x: miscompiles NEW_AUX_ENT in fs/binfmt_elf.c
40 * (http://gcc.gnu.org/PR8896) and incorrect structure 41 * (http://gcc.gnu.org/PR8896) and incorrect structure
41 * initialisation in fs/jffs2/erase.c 42 * initialisation in fs/jffs2/erase.c
43 * GCC 4.8.0-4.8.2: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58854
44 * miscompiles find_get_entry(), and can result in EXT3 and EXT4
45 * filesystem corruption (possibly other FS too).
42 */ 46 */
47#ifdef __GNUC__
43#if (__GNUC__ == 3 && __GNUC_MINOR__ < 3) 48#if (__GNUC__ == 3 && __GNUC_MINOR__ < 3)
44#error Your compiler is too buggy; it is known to miscompile kernels. 49#error Your compiler is too buggy; it is known to miscompile kernels.
45#error Known good compilers: 3.3 50#error Known good compilers: 3.3, 4.x
51#endif
52#if GCC_VERSION >= 40800 && GCC_VERSION < 40803
53#error Your compiler is too buggy; it is known to miscompile kernels
54#error and result in filesystem corruption and oopses.
55#endif
46#endif 56#endif
47 57
48int main(void) 58int main(void)
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 9f899d8fdcca..e51833f8cc38 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -395,6 +395,7 @@
395 CALL(sys_seccomp) 395 CALL(sys_seccomp)
396 CALL(sys_getrandom) 396 CALL(sys_getrandom)
397/* 385 */ CALL(sys_memfd_create) 397/* 385 */ CALL(sys_memfd_create)
398 CALL(sys_bpf)
398#ifndef syscalls_counted 399#ifndef syscalls_counted
399.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls 400.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
400#define syscalls_counted 401#define syscalls_counted
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index 8c35ae4ff176..07a09570175d 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -20,7 +20,7 @@
20#include <linux/input.h> 20#include <linux/input.h>
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/irqchip.h> 22#include <linux/irqchip.h>
23#include <linux/mailbox.h> 23#include <linux/pl320-ipc.h>
24#include <linux/of.h> 24#include <linux/of.h>
25#include <linux/of_irq.h> 25#include <linux/of_irq.h>
26#include <linux/of_platform.h> 26#include <linux/of_platform.h>
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 1412daf4a714..4e79da7c5e30 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -50,8 +50,8 @@ static const char *pcie_axi_sels[] = { "axi", "ahb", };
50static const char *ssi_sels[] = { "pll3_pfd2_508m", "pll3_pfd3_454m", "pll4_audio_div", }; 50static const char *ssi_sels[] = { "pll3_pfd2_508m", "pll3_pfd3_454m", "pll4_audio_div", };
51static const char *usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", }; 51static const char *usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", };
52static const char *enfc_sels[] = { "pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", }; 52static const char *enfc_sels[] = { "pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", };
53static const char *emi_sels[] = { "pll2_pfd2_396m", "pll3_usb_otg", "axi", "pll2_pfd0_352m", }; 53static const char *eim_sels[] = { "pll2_pfd2_396m", "pll3_usb_otg", "axi", "pll2_pfd0_352m", };
54static const char *emi_slow_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd2_396m", "pll2_pfd0_352m", }; 54static const char *eim_slow_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd2_396m", "pll2_pfd0_352m", };
55static const char *vdo_axi_sels[] = { "axi", "ahb", }; 55static const char *vdo_axi_sels[] = { "axi", "ahb", };
56static const char *vpu_axi_sels[] = { "axi", "pll2_pfd2_396m", "pll2_pfd0_352m", }; 56static const char *vpu_axi_sels[] = { "axi", "pll2_pfd2_396m", "pll2_pfd0_352m", };
57static const char *cko1_sels[] = { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5_video_div", 57static const char *cko1_sels[] = { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5_video_div",
@@ -302,8 +302,8 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
302 clk[IMX6QDL_CLK_USDHC3_SEL] = imx_clk_fixup_mux("usdhc3_sel", base + 0x1c, 18, 1, usdhc_sels, ARRAY_SIZE(usdhc_sels), imx_cscmr1_fixup); 302 clk[IMX6QDL_CLK_USDHC3_SEL] = imx_clk_fixup_mux("usdhc3_sel", base + 0x1c, 18, 1, usdhc_sels, ARRAY_SIZE(usdhc_sels), imx_cscmr1_fixup);
303 clk[IMX6QDL_CLK_USDHC4_SEL] = imx_clk_fixup_mux("usdhc4_sel", base + 0x1c, 19, 1, usdhc_sels, ARRAY_SIZE(usdhc_sels), imx_cscmr1_fixup); 303 clk[IMX6QDL_CLK_USDHC4_SEL] = imx_clk_fixup_mux("usdhc4_sel", base + 0x1c, 19, 1, usdhc_sels, ARRAY_SIZE(usdhc_sels), imx_cscmr1_fixup);
304 clk[IMX6QDL_CLK_ENFC_SEL] = imx_clk_mux("enfc_sel", base + 0x2c, 16, 2, enfc_sels, ARRAY_SIZE(enfc_sels)); 304 clk[IMX6QDL_CLK_ENFC_SEL] = imx_clk_mux("enfc_sel", base + 0x2c, 16, 2, enfc_sels, ARRAY_SIZE(enfc_sels));
305 clk[IMX6QDL_CLK_EMI_SEL] = imx_clk_fixup_mux("emi_sel", base + 0x1c, 27, 2, emi_sels, ARRAY_SIZE(emi_sels), imx_cscmr1_fixup); 305 clk[IMX6QDL_CLK_EIM_SEL] = imx_clk_fixup_mux("eim_sel", base + 0x1c, 27, 2, eim_sels, ARRAY_SIZE(eim_sels), imx_cscmr1_fixup);
306 clk[IMX6QDL_CLK_EMI_SLOW_SEL] = imx_clk_fixup_mux("emi_slow_sel", base + 0x1c, 29, 2, emi_slow_sels, ARRAY_SIZE(emi_slow_sels), imx_cscmr1_fixup); 306 clk[IMX6QDL_CLK_EIM_SLOW_SEL] = imx_clk_fixup_mux("eim_slow_sel", base + 0x1c, 29, 2, eim_slow_sels, ARRAY_SIZE(eim_slow_sels), imx_cscmr1_fixup);
307 clk[IMX6QDL_CLK_VDO_AXI_SEL] = imx_clk_mux("vdo_axi_sel", base + 0x18, 11, 1, vdo_axi_sels, ARRAY_SIZE(vdo_axi_sels)); 307 clk[IMX6QDL_CLK_VDO_AXI_SEL] = imx_clk_mux("vdo_axi_sel", base + 0x18, 11, 1, vdo_axi_sels, ARRAY_SIZE(vdo_axi_sels));
308 clk[IMX6QDL_CLK_VPU_AXI_SEL] = imx_clk_mux("vpu_axi_sel", base + 0x18, 14, 2, vpu_axi_sels, ARRAY_SIZE(vpu_axi_sels)); 308 clk[IMX6QDL_CLK_VPU_AXI_SEL] = imx_clk_mux("vpu_axi_sel", base + 0x18, 14, 2, vpu_axi_sels, ARRAY_SIZE(vpu_axi_sels));
309 clk[IMX6QDL_CLK_CKO1_SEL] = imx_clk_mux("cko1_sel", base + 0x60, 0, 4, cko1_sels, ARRAY_SIZE(cko1_sels)); 309 clk[IMX6QDL_CLK_CKO1_SEL] = imx_clk_mux("cko1_sel", base + 0x60, 0, 4, cko1_sels, ARRAY_SIZE(cko1_sels));
@@ -354,8 +354,8 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
354 clk[IMX6QDL_CLK_USDHC4_PODF] = imx_clk_divider("usdhc4_podf", "usdhc4_sel", base + 0x24, 22, 3); 354 clk[IMX6QDL_CLK_USDHC4_PODF] = imx_clk_divider("usdhc4_podf", "usdhc4_sel", base + 0x24, 22, 3);
355 clk[IMX6QDL_CLK_ENFC_PRED] = imx_clk_divider("enfc_pred", "enfc_sel", base + 0x2c, 18, 3); 355 clk[IMX6QDL_CLK_ENFC_PRED] = imx_clk_divider("enfc_pred", "enfc_sel", base + 0x2c, 18, 3);
356 clk[IMX6QDL_CLK_ENFC_PODF] = imx_clk_divider("enfc_podf", "enfc_pred", base + 0x2c, 21, 6); 356 clk[IMX6QDL_CLK_ENFC_PODF] = imx_clk_divider("enfc_podf", "enfc_pred", base + 0x2c, 21, 6);
357 clk[IMX6QDL_CLK_EMI_PODF] = imx_clk_fixup_divider("emi_podf", "emi_sel", base + 0x1c, 20, 3, imx_cscmr1_fixup); 357 clk[IMX6QDL_CLK_EIM_PODF] = imx_clk_fixup_divider("eim_podf", "eim_sel", base + 0x1c, 20, 3, imx_cscmr1_fixup);
358 clk[IMX6QDL_CLK_EMI_SLOW_PODF] = imx_clk_fixup_divider("emi_slow_podf", "emi_slow_sel", base + 0x1c, 23, 3, imx_cscmr1_fixup); 358 clk[IMX6QDL_CLK_EIM_SLOW_PODF] = imx_clk_fixup_divider("eim_slow_podf", "eim_slow_sel", base + 0x1c, 23, 3, imx_cscmr1_fixup);
359 clk[IMX6QDL_CLK_VPU_AXI_PODF] = imx_clk_divider("vpu_axi_podf", "vpu_axi_sel", base + 0x24, 25, 3); 359 clk[IMX6QDL_CLK_VPU_AXI_PODF] = imx_clk_divider("vpu_axi_podf", "vpu_axi_sel", base + 0x24, 25, 3);
360 clk[IMX6QDL_CLK_CKO1_PODF] = imx_clk_divider("cko1_podf", "cko1_sel", base + 0x60, 4, 3); 360 clk[IMX6QDL_CLK_CKO1_PODF] = imx_clk_divider("cko1_podf", "cko1_sel", base + 0x60, 4, 3);
361 clk[IMX6QDL_CLK_CKO2_PODF] = imx_clk_divider("cko2_podf", "cko2_sel", base + 0x60, 21, 3); 361 clk[IMX6QDL_CLK_CKO2_PODF] = imx_clk_divider("cko2_podf", "cko2_sel", base + 0x60, 21, 3);
@@ -456,7 +456,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
456 clk[IMX6QDL_CLK_USDHC2] = imx_clk_gate2("usdhc2", "usdhc2_podf", base + 0x80, 4); 456 clk[IMX6QDL_CLK_USDHC2] = imx_clk_gate2("usdhc2", "usdhc2_podf", base + 0x80, 4);
457 clk[IMX6QDL_CLK_USDHC3] = imx_clk_gate2("usdhc3", "usdhc3_podf", base + 0x80, 6); 457 clk[IMX6QDL_CLK_USDHC3] = imx_clk_gate2("usdhc3", "usdhc3_podf", base + 0x80, 6);
458 clk[IMX6QDL_CLK_USDHC4] = imx_clk_gate2("usdhc4", "usdhc4_podf", base + 0x80, 8); 458 clk[IMX6QDL_CLK_USDHC4] = imx_clk_gate2("usdhc4", "usdhc4_podf", base + 0x80, 8);
459 clk[IMX6QDL_CLK_EIM_SLOW] = imx_clk_gate2("eim_slow", "emi_slow_podf", base + 0x80, 10); 459 clk[IMX6QDL_CLK_EIM_SLOW] = imx_clk_gate2("eim_slow", "eim_slow_podf", base + 0x80, 10);
460 clk[IMX6QDL_CLK_VDO_AXI] = imx_clk_gate2("vdo_axi", "vdo_axi_sel", base + 0x80, 12); 460 clk[IMX6QDL_CLK_VDO_AXI] = imx_clk_gate2("vdo_axi", "vdo_axi_sel", base + 0x80, 12);
461 clk[IMX6QDL_CLK_VPU_AXI] = imx_clk_gate2("vpu_axi", "vpu_axi_podf", base + 0x80, 14); 461 clk[IMX6QDL_CLK_VPU_AXI] = imx_clk_gate2("vpu_axi", "vpu_axi_podf", base + 0x80, 14);
462 clk[IMX6QDL_CLK_CKO1] = imx_clk_gate("cko1", "cko1_podf", base + 0x60, 7); 462 clk[IMX6QDL_CLK_CKO1] = imx_clk_gate("cko1", "cko1_podf", base + 0x60, 7);
diff --git a/arch/arm/mach-imx/clk-vf610.c b/arch/arm/mach-imx/clk-vf610.c
index a17818475050..409637254594 100644
--- a/arch/arm/mach-imx/clk-vf610.c
+++ b/arch/arm/mach-imx/clk-vf610.c
@@ -58,8 +58,14 @@
58#define PFD_PLL1_BASE (anatop_base + 0x2b0) 58#define PFD_PLL1_BASE (anatop_base + 0x2b0)
59#define PFD_PLL2_BASE (anatop_base + 0x100) 59#define PFD_PLL2_BASE (anatop_base + 0x100)
60#define PFD_PLL3_BASE (anatop_base + 0xf0) 60#define PFD_PLL3_BASE (anatop_base + 0xf0)
61#define PLL1_CTRL (anatop_base + 0x270)
62#define PLL2_CTRL (anatop_base + 0x30)
61#define PLL3_CTRL (anatop_base + 0x10) 63#define PLL3_CTRL (anatop_base + 0x10)
64#define PLL4_CTRL (anatop_base + 0x70)
65#define PLL5_CTRL (anatop_base + 0xe0)
66#define PLL6_CTRL (anatop_base + 0xa0)
62#define PLL7_CTRL (anatop_base + 0x20) 67#define PLL7_CTRL (anatop_base + 0x20)
68#define ANA_MISC1 (anatop_base + 0x160)
63 69
64static void __iomem *anatop_base; 70static void __iomem *anatop_base;
65static void __iomem *ccm_base; 71static void __iomem *ccm_base;
@@ -67,25 +73,34 @@ static void __iomem *ccm_base;
67/* sources for multiplexer clocks, this is used multiple times */ 73/* sources for multiplexer clocks, this is used multiple times */
68static const char *fast_sels[] = { "firc", "fxosc", }; 74static const char *fast_sels[] = { "firc", "fxosc", };
69static const char *slow_sels[] = { "sirc_32k", "sxosc", }; 75static const char *slow_sels[] = { "sirc_32k", "sxosc", };
70static const char *pll1_sels[] = { "pll1_main", "pll1_pfd1", "pll1_pfd2", "pll1_pfd3", "pll1_pfd4", }; 76static const char *pll1_sels[] = { "pll1_sys", "pll1_pfd1", "pll1_pfd2", "pll1_pfd3", "pll1_pfd4", };
71static const char *pll2_sels[] = { "pll2_main", "pll2_pfd1", "pll2_pfd2", "pll2_pfd3", "pll2_pfd4", }; 77static const char *pll2_sels[] = { "pll2_bus", "pll2_pfd1", "pll2_pfd2", "pll2_pfd3", "pll2_pfd4", };
72static const char *sys_sels[] = { "fast_clk_sel", "slow_clk_sel", "pll2_pfd_sel", "pll2_main", "pll1_pfd_sel", "pll3_main", }; 78static const char *pll_bypass_src_sels[] = { "fast_clk_sel", "lvds1_in", };
79static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", };
80static const char *pll2_bypass_sels[] = { "pll2", "pll2_bypass_src", };
81static const char *pll3_bypass_sels[] = { "pll3", "pll3_bypass_src", };
82static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", };
83static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", };
84static const char *pll6_bypass_sels[] = { "pll6", "pll6_bypass_src", };
85static const char *pll7_bypass_sels[] = { "pll7", "pll7_bypass_src", };
86static const char *sys_sels[] = { "fast_clk_sel", "slow_clk_sel", "pll2_pfd_sel", "pll2_bus", "pll1_pfd_sel", "pll3_usb_otg", };
73static const char *ddr_sels[] = { "pll2_pfd2", "sys_sel", }; 87static const char *ddr_sels[] = { "pll2_pfd2", "sys_sel", };
74static const char *rmii_sels[] = { "enet_ext", "audio_ext", "enet_50m", "enet_25m", }; 88static const char *rmii_sels[] = { "enet_ext", "audio_ext", "enet_50m", "enet_25m", };
75static const char *enet_ts_sels[] = { "enet_ext", "fxosc", "audio_ext", "usb", "enet_ts", "enet_25m", "enet_50m", }; 89static const char *enet_ts_sels[] = { "enet_ext", "fxosc", "audio_ext", "usb", "enet_ts", "enet_25m", "enet_50m", };
76static const char *esai_sels[] = { "audio_ext", "mlb", "spdif_rx", "pll4_main_div", }; 90static const char *esai_sels[] = { "audio_ext", "mlb", "spdif_rx", "pll4_audio_div", };
77static const char *sai_sels[] = { "audio_ext", "mlb", "spdif_rx", "pll4_main_div", }; 91static const char *sai_sels[] = { "audio_ext", "mlb", "spdif_rx", "pll4_audio_div", };
78static const char *nfc_sels[] = { "platform_bus", "pll1_pfd1", "pll3_pfd1", "pll3_pfd3", }; 92static const char *nfc_sels[] = { "platform_bus", "pll1_pfd1", "pll3_pfd1", "pll3_pfd3", };
79static const char *qspi_sels[] = { "pll3_main", "pll3_pfd4", "pll2_pfd4", "pll1_pfd4", }; 93static const char *qspi_sels[] = { "pll3_usb_otg", "pll3_pfd4", "pll2_pfd4", "pll1_pfd4", };
80static const char *esdhc_sels[] = { "pll3_main", "pll3_pfd3", "pll1_pfd3", "platform_bus", }; 94static const char *esdhc_sels[] = { "pll3_usb_otg", "pll3_pfd3", "pll1_pfd3", "platform_bus", };
81static const char *dcu_sels[] = { "pll1_pfd2", "pll3_main", }; 95static const char *dcu_sels[] = { "pll1_pfd2", "pll3_usb_otg", };
82static const char *gpu_sels[] = { "pll2_pfd2", "pll3_pfd2", }; 96static const char *gpu_sels[] = { "pll2_pfd2", "pll3_pfd2", };
83static const char *vadc_sels[] = { "pll6_main_div", "pll3_main_div", "pll3_main", }; 97static const char *vadc_sels[] = { "pll6_video_div", "pll3_usb_otg_div", "pll3_usb_otg", };
84/* FTM counter clock source, not module clock */ 98/* FTM counter clock source, not module clock */
85static const char *ftm_ext_sels[] = {"sirc_128k", "sxosc", "fxosc_half", "audio_ext", }; 99static const char *ftm_ext_sels[] = {"sirc_128k", "sxosc", "fxosc_half", "audio_ext", };
86static const char *ftm_fix_sels[] = { "sxosc", "ipg_bus", }; 100static const char *ftm_fix_sels[] = { "sxosc", "ipg_bus", };
87 101
88static struct clk_div_table pll4_main_div_table[] = { 102
103static struct clk_div_table pll4_audio_div_table[] = {
89 { .val = 0, .div = 1 }, 104 { .val = 0, .div = 1 },
90 { .val = 1, .div = 2 }, 105 { .val = 1, .div = 2 },
91 { .val = 2, .div = 6 }, 106 { .val = 2, .div = 6 },
@@ -120,6 +135,9 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
120 clk[VF610_CLK_AUDIO_EXT] = imx_obtain_fixed_clock("audio_ext", 0); 135 clk[VF610_CLK_AUDIO_EXT] = imx_obtain_fixed_clock("audio_ext", 0);
121 clk[VF610_CLK_ENET_EXT] = imx_obtain_fixed_clock("enet_ext", 0); 136 clk[VF610_CLK_ENET_EXT] = imx_obtain_fixed_clock("enet_ext", 0);
122 137
138 /* Clock source from external clock via LVDs PAD */
139 clk[VF610_CLK_ANACLK1] = imx_obtain_fixed_clock("anaclk1", 0);
140
123 clk[VF610_CLK_FXOSC_HALF] = imx_clk_fixed_factor("fxosc_half", "fxosc", 1, 2); 141 clk[VF610_CLK_FXOSC_HALF] = imx_clk_fixed_factor("fxosc_half", "fxosc", 1, 2);
124 142
125 np = of_find_compatible_node(NULL, NULL, "fsl,vf610-anatop"); 143 np = of_find_compatible_node(NULL, NULL, "fsl,vf610-anatop");
@@ -133,31 +151,63 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
133 clk[VF610_CLK_SLOW_CLK_SEL] = imx_clk_mux("slow_clk_sel", CCM_CCSR, 4, 1, slow_sels, ARRAY_SIZE(slow_sels)); 151 clk[VF610_CLK_SLOW_CLK_SEL] = imx_clk_mux("slow_clk_sel", CCM_CCSR, 4, 1, slow_sels, ARRAY_SIZE(slow_sels));
134 clk[VF610_CLK_FASK_CLK_SEL] = imx_clk_mux("fast_clk_sel", CCM_CCSR, 5, 1, fast_sels, ARRAY_SIZE(fast_sels)); 152 clk[VF610_CLK_FASK_CLK_SEL] = imx_clk_mux("fast_clk_sel", CCM_CCSR, 5, 1, fast_sels, ARRAY_SIZE(fast_sels));
135 153
136 clk[VF610_CLK_PLL1_MAIN] = imx_clk_fixed_factor("pll1_main", "fast_clk_sel", 22, 1); 154 clk[VF610_CLK_PLL1_BYPASS_SRC] = imx_clk_mux("pll1_bypass_src", PLL1_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
137 clk[VF610_CLK_PLL1_PFD1] = imx_clk_pfd("pll1_pfd1", "pll1_main", PFD_PLL1_BASE, 0); 155 clk[VF610_CLK_PLL2_BYPASS_SRC] = imx_clk_mux("pll2_bypass_src", PLL2_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
138 clk[VF610_CLK_PLL1_PFD2] = imx_clk_pfd("pll1_pfd2", "pll1_main", PFD_PLL1_BASE, 1); 156 clk[VF610_CLK_PLL3_BYPASS_SRC] = imx_clk_mux("pll3_bypass_src", PLL3_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
139 clk[VF610_CLK_PLL1_PFD3] = imx_clk_pfd("pll1_pfd3", "pll1_main", PFD_PLL1_BASE, 2); 157 clk[VF610_CLK_PLL4_BYPASS_SRC] = imx_clk_mux("pll4_bypass_src", PLL4_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
140 clk[VF610_CLK_PLL1_PFD4] = imx_clk_pfd("pll1_pfd4", "pll1_main", PFD_PLL1_BASE, 3); 158 clk[VF610_CLK_PLL5_BYPASS_SRC] = imx_clk_mux("pll5_bypass_src", PLL5_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
141 159 clk[VF610_CLK_PLL6_BYPASS_SRC] = imx_clk_mux("pll6_bypass_src", PLL6_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
142 clk[VF610_CLK_PLL2_MAIN] = imx_clk_fixed_factor("pll2_main", "fast_clk_sel", 22, 1); 160 clk[VF610_CLK_PLL7_BYPASS_SRC] = imx_clk_mux("pll7_bypass_src", PLL7_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
143 clk[VF610_CLK_PLL2_PFD1] = imx_clk_pfd("pll2_pfd1", "pll2_main", PFD_PLL2_BASE, 0); 161
144 clk[VF610_CLK_PLL2_PFD2] = imx_clk_pfd("pll2_pfd2", "pll2_main", PFD_PLL2_BASE, 1); 162 clk[VF610_CLK_PLL1] = imx_clk_pllv3(IMX_PLLV3_GENERIC, "pll1", "pll1_bypass_src", PLL1_CTRL, 0x1);
145 clk[VF610_CLK_PLL2_PFD3] = imx_clk_pfd("pll2_pfd3", "pll2_main", PFD_PLL2_BASE, 2); 163 clk[VF610_CLK_PLL2] = imx_clk_pllv3(IMX_PLLV3_GENERIC, "pll2", "pll2_bypass_src", PLL2_CTRL, 0x1);
146 clk[VF610_CLK_PLL2_PFD4] = imx_clk_pfd("pll2_pfd4", "pll2_main", PFD_PLL2_BASE, 3); 164 clk[VF610_CLK_PLL3] = imx_clk_pllv3(IMX_PLLV3_USB, "pll3", "pll3_bypass_src", PLL3_CTRL, 0x1);
147 165 clk[VF610_CLK_PLL4] = imx_clk_pllv3(IMX_PLLV3_AV, "pll4", "pll4_bypass_src", PLL4_CTRL, 0x7f);
148 clk[VF610_CLK_PLL3_MAIN] = imx_clk_fixed_factor("pll3_main", "fast_clk_sel", 20, 1); 166 clk[VF610_CLK_PLL5] = imx_clk_pllv3(IMX_PLLV3_ENET, "pll5", "pll5_bypass_src", PLL5_CTRL, 0x3);
149 clk[VF610_CLK_PLL3_PFD1] = imx_clk_pfd("pll3_pfd1", "pll3_main", PFD_PLL3_BASE, 0); 167 clk[VF610_CLK_PLL6] = imx_clk_pllv3(IMX_PLLV3_AV, "pll6", "pll6_bypass_src", PLL6_CTRL, 0x7f);
150 clk[VF610_CLK_PLL3_PFD2] = imx_clk_pfd("pll3_pfd2", "pll3_main", PFD_PLL3_BASE, 1); 168 clk[VF610_CLK_PLL7] = imx_clk_pllv3(IMX_PLLV3_USB, "pll7", "pll7_bypass_src", PLL7_CTRL, 0x1);
151 clk[VF610_CLK_PLL3_PFD3] = imx_clk_pfd("pll3_pfd3", "pll3_main", PFD_PLL3_BASE, 2); 169
152 clk[VF610_CLK_PLL3_PFD4] = imx_clk_pfd("pll3_pfd4", "pll3_main", PFD_PLL3_BASE, 3); 170 clk[VF610_PLL1_BYPASS] = imx_clk_mux_flags("pll1_bypass", PLL1_CTRL, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT);
153 171 clk[VF610_PLL2_BYPASS] = imx_clk_mux_flags("pll2_bypass", PLL2_CTRL, 16, 1, pll2_bypass_sels, ARRAY_SIZE(pll2_bypass_sels), CLK_SET_RATE_PARENT);
154 clk[VF610_CLK_PLL4_MAIN] = imx_clk_fixed_factor("pll4_main", "fast_clk_sel", 25, 1); 172 clk[VF610_PLL3_BYPASS] = imx_clk_mux_flags("pll3_bypass", PLL3_CTRL, 16, 1, pll3_bypass_sels, ARRAY_SIZE(pll3_bypass_sels), CLK_SET_RATE_PARENT);
155 /* Enet pll: fixed 50Mhz */ 173 clk[VF610_PLL4_BYPASS] = imx_clk_mux_flags("pll4_bypass", PLL4_CTRL, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT);
156 clk[VF610_CLK_PLL5_MAIN] = imx_clk_fixed_factor("pll5_main", "fast_clk_sel", 125, 6); 174 clk[VF610_PLL5_BYPASS] = imx_clk_mux_flags("pll5_bypass", PLL5_CTRL, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT);
157 /* pll6: default 960Mhz */ 175 clk[VF610_PLL6_BYPASS] = imx_clk_mux_flags("pll6_bypass", PLL6_CTRL, 16, 1, pll6_bypass_sels, ARRAY_SIZE(pll6_bypass_sels), CLK_SET_RATE_PARENT);
158 clk[VF610_CLK_PLL6_MAIN] = imx_clk_fixed_factor("pll6_main", "fast_clk_sel", 40, 1); 176 clk[VF610_PLL7_BYPASS] = imx_clk_mux_flags("pll7_bypass", PLL7_CTRL, 16, 1, pll7_bypass_sels, ARRAY_SIZE(pll7_bypass_sels), CLK_SET_RATE_PARENT);
159 /* pll7: USB1 PLL at 480MHz */ 177
160 clk[VF610_CLK_PLL7_MAIN] = imx_clk_pllv3(IMX_PLLV3_USB, "pll7_main", "fast_clk_sel", PLL7_CTRL, 0x2); 178 /* Do not bypass PLLs initially */
179 clk_set_parent(clk[VF610_PLL1_BYPASS], clk[VF610_CLK_PLL1]);
180 clk_set_parent(clk[VF610_PLL2_BYPASS], clk[VF610_CLK_PLL2]);
181 clk_set_parent(clk[VF610_PLL3_BYPASS], clk[VF610_CLK_PLL3]);
182 clk_set_parent(clk[VF610_PLL4_BYPASS], clk[VF610_CLK_PLL4]);
183 clk_set_parent(clk[VF610_PLL5_BYPASS], clk[VF610_CLK_PLL5]);
184 clk_set_parent(clk[VF610_PLL6_BYPASS], clk[VF610_CLK_PLL6]);
185 clk_set_parent(clk[VF610_PLL7_BYPASS], clk[VF610_CLK_PLL7]);
186
187 clk[VF610_CLK_PLL1_SYS] = imx_clk_gate("pll1_sys", "pll1_bypass", PLL1_CTRL, 13);
188 clk[VF610_CLK_PLL2_BUS] = imx_clk_gate("pll2_bus", "pll2_bypass", PLL2_CTRL, 13);
189 clk[VF610_CLK_PLL3_USB_OTG] = imx_clk_gate("pll3_usb_otg", "pll3_bypass", PLL3_CTRL, 13);
190 clk[VF610_CLK_PLL4_AUDIO] = imx_clk_gate("pll4_audio", "pll4_bypass", PLL4_CTRL, 13);
191 clk[VF610_CLK_PLL5_ENET] = imx_clk_gate("pll5_enet", "pll5_bypass", PLL5_CTRL, 13);
192 clk[VF610_CLK_PLL6_VIDEO] = imx_clk_gate("pll6_video", "pll6_bypass", PLL6_CTRL, 13);
193 clk[VF610_CLK_PLL7_USB_HOST] = imx_clk_gate("pll7_usb_host", "pll7_bypass", PLL7_CTRL, 13);
194
195 clk[VF610_CLK_LVDS1_IN] = imx_clk_gate_exclusive("lvds1_in", "anaclk1", ANA_MISC1, 12, BIT(10));
196
197 clk[VF610_CLK_PLL1_PFD1] = imx_clk_pfd("pll1_pfd1", "pll1_sys", PFD_PLL1_BASE, 0);
198 clk[VF610_CLK_PLL1_PFD2] = imx_clk_pfd("pll1_pfd2", "pll1_sys", PFD_PLL1_BASE, 1);
199 clk[VF610_CLK_PLL1_PFD3] = imx_clk_pfd("pll1_pfd3", "pll1_sys", PFD_PLL1_BASE, 2);
200 clk[VF610_CLK_PLL1_PFD4] = imx_clk_pfd("pll1_pfd4", "pll1_sys", PFD_PLL1_BASE, 3);
201
202 clk[VF610_CLK_PLL2_PFD1] = imx_clk_pfd("pll2_pfd1", "pll2_bus", PFD_PLL2_BASE, 0);
203 clk[VF610_CLK_PLL2_PFD2] = imx_clk_pfd("pll2_pfd2", "pll2_bus", PFD_PLL2_BASE, 1);
204 clk[VF610_CLK_PLL2_PFD3] = imx_clk_pfd("pll2_pfd3", "pll2_bus", PFD_PLL2_BASE, 2);
205 clk[VF610_CLK_PLL2_PFD4] = imx_clk_pfd("pll2_pfd4", "pll2_bus", PFD_PLL2_BASE, 3);
206
207 clk[VF610_CLK_PLL3_PFD1] = imx_clk_pfd("pll3_pfd1", "pll3_usb_otg", PFD_PLL3_BASE, 0);
208 clk[VF610_CLK_PLL3_PFD2] = imx_clk_pfd("pll3_pfd2", "pll3_usb_otg", PFD_PLL3_BASE, 1);
209 clk[VF610_CLK_PLL3_PFD3] = imx_clk_pfd("pll3_pfd3", "pll3_usb_otg", PFD_PLL3_BASE, 2);
210 clk[VF610_CLK_PLL3_PFD4] = imx_clk_pfd("pll3_pfd4", "pll3_usb_otg", PFD_PLL3_BASE, 3);
161 211
162 clk[VF610_CLK_PLL1_PFD_SEL] = imx_clk_mux("pll1_pfd_sel", CCM_CCSR, 16, 3, pll1_sels, 5); 212 clk[VF610_CLK_PLL1_PFD_SEL] = imx_clk_mux("pll1_pfd_sel", CCM_CCSR, 16, 3, pll1_sels, 5);
163 clk[VF610_CLK_PLL2_PFD_SEL] = imx_clk_mux("pll2_pfd_sel", CCM_CCSR, 19, 3, pll2_sels, 5); 213 clk[VF610_CLK_PLL2_PFD_SEL] = imx_clk_mux("pll2_pfd_sel", CCM_CCSR, 19, 3, pll2_sels, 5);
@@ -167,12 +217,12 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
167 clk[VF610_CLK_PLATFORM_BUS] = imx_clk_divider("platform_bus", "sys_bus", CCM_CACRR, 3, 3); 217 clk[VF610_CLK_PLATFORM_BUS] = imx_clk_divider("platform_bus", "sys_bus", CCM_CACRR, 3, 3);
168 clk[VF610_CLK_IPG_BUS] = imx_clk_divider("ipg_bus", "platform_bus", CCM_CACRR, 11, 2); 218 clk[VF610_CLK_IPG_BUS] = imx_clk_divider("ipg_bus", "platform_bus", CCM_CACRR, 11, 2);
169 219
170 clk[VF610_CLK_PLL3_MAIN_DIV] = imx_clk_divider("pll3_main_div", "pll3_main", CCM_CACRR, 20, 1); 220 clk[VF610_CLK_PLL3_MAIN_DIV] = imx_clk_divider("pll3_usb_otg_div", "pll3_usb_otg", CCM_CACRR, 20, 1);
171 clk[VF610_CLK_PLL4_MAIN_DIV] = clk_register_divider_table(NULL, "pll4_main_div", "pll4_main", 0, CCM_CACRR, 6, 3, 0, pll4_main_div_table, &imx_ccm_lock); 221 clk[VF610_CLK_PLL4_MAIN_DIV] = clk_register_divider_table(NULL, "pll4_audio_div", "pll4_audio", 0, CCM_CACRR, 6, 3, 0, pll4_audio_div_table, &imx_ccm_lock);
172 clk[VF610_CLK_PLL6_MAIN_DIV] = imx_clk_divider("pll6_main_div", "pll6_main", CCM_CACRR, 21, 1); 222 clk[VF610_CLK_PLL6_MAIN_DIV] = imx_clk_divider("pll6_video_div", "pll6_video", CCM_CACRR, 21, 1);
173 223
174 clk[VF610_CLK_USBPHY0] = imx_clk_gate("usbphy0", "pll3_main", PLL3_CTRL, 6); 224 clk[VF610_CLK_USBPHY0] = imx_clk_gate("usbphy0", "pll3_usb_otg", PLL3_CTRL, 6);
175 clk[VF610_CLK_USBPHY1] = imx_clk_gate("usbphy1", "pll7_main", PLL7_CTRL, 6); 225 clk[VF610_CLK_USBPHY1] = imx_clk_gate("usbphy1", "pll7_usb_host", PLL7_CTRL, 6);
176 226
177 clk[VF610_CLK_USBC0] = imx_clk_gate2("usbc0", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(4)); 227 clk[VF610_CLK_USBC0] = imx_clk_gate2("usbc0", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(4));
178 clk[VF610_CLK_USBC1] = imx_clk_gate2("usbc1", "ipg_bus", CCM_CCGR7, CCM_CCGRx_CGn(4)); 228 clk[VF610_CLK_USBC1] = imx_clk_gate2("usbc1", "ipg_bus", CCM_CCGR7, CCM_CCGRx_CGn(4));
@@ -191,8 +241,8 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
191 clk[VF610_CLK_QSPI1_X1_DIV] = imx_clk_divider("qspi1_x1", "qspi1_x2", CCM_CSCDR3, 11, 1); 241 clk[VF610_CLK_QSPI1_X1_DIV] = imx_clk_divider("qspi1_x1", "qspi1_x2", CCM_CSCDR3, 11, 1);
192 clk[VF610_CLK_QSPI1] = imx_clk_gate2("qspi1", "qspi1_x1", CCM_CCGR8, CCM_CCGRx_CGn(4)); 242 clk[VF610_CLK_QSPI1] = imx_clk_gate2("qspi1", "qspi1_x1", CCM_CCGR8, CCM_CCGRx_CGn(4));
193 243
194 clk[VF610_CLK_ENET_50M] = imx_clk_fixed_factor("enet_50m", "pll5_main", 1, 10); 244 clk[VF610_CLK_ENET_50M] = imx_clk_fixed_factor("enet_50m", "pll5_enet", 1, 10);
195 clk[VF610_CLK_ENET_25M] = imx_clk_fixed_factor("enet_25m", "pll5_main", 1, 20); 245 clk[VF610_CLK_ENET_25M] = imx_clk_fixed_factor("enet_25m", "pll5_enet", 1, 20);
196 clk[VF610_CLK_ENET_SEL] = imx_clk_mux("enet_sel", CCM_CSCMR2, 4, 2, rmii_sels, 4); 246 clk[VF610_CLK_ENET_SEL] = imx_clk_mux("enet_sel", CCM_CSCMR2, 4, 2, rmii_sels, 4);
197 clk[VF610_CLK_ENET_TS_SEL] = imx_clk_mux("enet_ts_sel", CCM_CSCMR2, 0, 3, enet_ts_sels, 7); 247 clk[VF610_CLK_ENET_TS_SEL] = imx_clk_mux("enet_ts_sel", CCM_CSCMR2, 0, 3, enet_ts_sels, 7);
198 clk[VF610_CLK_ENET] = imx_clk_gate("enet", "enet_sel", CCM_CSCDR1, 24); 248 clk[VF610_CLK_ENET] = imx_clk_gate("enet", "enet_sel", CCM_CSCDR1, 24);
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h
index 559c69a47731..7d11979da030 100644
--- a/arch/arm/mach-ixp4xx/include/mach/io.h
+++ b/arch/arm/mach-ixp4xx/include/mach/io.h
@@ -76,7 +76,7 @@ static inline void __indirect_writeb(u8 value, volatile void __iomem *p)
76 u32 n, byte_enables, data; 76 u32 n, byte_enables, data;
77 77
78 if (!is_pci_memory(addr)) { 78 if (!is_pci_memory(addr)) {
79 __raw_writeb(value, addr); 79 __raw_writeb(value, p);
80 return; 80 return;
81 } 81 }
82 82
@@ -141,7 +141,7 @@ static inline unsigned char __indirect_readb(const volatile void __iomem *p)
141 u32 n, byte_enables, data; 141 u32 n, byte_enables, data;
142 142
143 if (!is_pci_memory(addr)) 143 if (!is_pci_memory(addr))
144 return __raw_readb(addr); 144 return __raw_readb(p);
145 145
146 n = addr % 4; 146 n = addr % 4;
147 byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL; 147 byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL;
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index ebdba87b9671..fdbfadf00c84 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -86,11 +86,12 @@ config MACH_GPLUGD
86 86
87config MACH_MMP_DT 87config MACH_MMP_DT
88 bool "Support MMP (ARMv5) platforms from device tree" 88 bool "Support MMP (ARMv5) platforms from device tree"
89 select CPU_PXA168
90 select CPU_PXA910
91 select USE_OF 89 select USE_OF
92 select PINCTRL 90 select PINCTRL
93 select PINCTRL_SINGLE 91 select PINCTRL_SINGLE
92 select COMMON_CLK
93 select ARCH_HAS_RESET_CONTROLLER
94 select CPU_MOHAWK
94 help 95 help
95 Include support for Marvell MMP2 based platforms using 96 Include support for Marvell MMP2 based platforms using
96 the device tree. Needn't select any other machine while 97 the device tree. Needn't select any other machine while
@@ -99,10 +100,12 @@ config MACH_MMP_DT
99config MACH_MMP2_DT 100config MACH_MMP2_DT
100 bool "Support MMP2 (ARMv7) platforms from device tree" 101 bool "Support MMP2 (ARMv7) platforms from device tree"
101 depends on !CPU_MOHAWK 102 depends on !CPU_MOHAWK
102 select CPU_MMP2
103 select USE_OF 103 select USE_OF
104 select PINCTRL 104 select PINCTRL
105 select PINCTRL_SINGLE 105 select PINCTRL_SINGLE
106 select COMMON_CLK
107 select ARCH_HAS_RESET_CONTROLLER
108 select CPU_PJ4
106 help 109 help
107 Include support for Marvell MMP2 based platforms using 110 Include support for Marvell MMP2 based platforms using
108 the device tree. 111 the device tree.
@@ -111,21 +114,18 @@ endmenu
111 114
112config CPU_PXA168 115config CPU_PXA168
113 bool 116 bool
114 select COMMON_CLK
115 select CPU_MOHAWK 117 select CPU_MOHAWK
116 help 118 help
117 Select code specific to PXA168 119 Select code specific to PXA168
118 120
119config CPU_PXA910 121config CPU_PXA910
120 bool 122 bool
121 select COMMON_CLK
122 select CPU_MOHAWK 123 select CPU_MOHAWK
123 help 124 help
124 Select code specific to PXA910 125 Select code specific to PXA910
125 126
126config CPU_MMP2 127config CPU_MMP2
127 bool 128 bool
128 select COMMON_CLK
129 select CPU_PJ4 129 select CPU_PJ4
130 help 130 help
131 Select code specific to MMP2. MMP2 is ARMv7 compatible. 131 Select code specific to MMP2. MMP2 is ARMv7 compatible.
diff --git a/arch/arm/mach-mmp/mmp-dt.c b/arch/arm/mach-mmp/mmp-dt.c
index cca529ceecb7..b2296c9309b8 100644
--- a/arch/arm/mach-mmp/mmp-dt.c
+++ b/arch/arm/mach-mmp/mmp-dt.c
@@ -11,63 +11,42 @@
11 11
12#include <linux/irqchip.h> 12#include <linux/irqchip.h>
13#include <linux/of_platform.h> 13#include <linux/of_platform.h>
14#include <linux/clk-provider.h>
14#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
15#include <asm/mach/time.h> 16#include <asm/mach/time.h>
17#include <asm/hardware/cache-tauros2.h>
16 18
17#include "common.h" 19#include "common.h"
18 20
19extern void __init mmp_dt_init_timer(void); 21extern void __init mmp_dt_init_timer(void);
20 22
21static const struct of_dev_auxdata pxa168_auxdata_lookup[] __initconst = { 23static const char *pxa168_dt_board_compat[] __initdata = {
22 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.0", NULL), 24 "mrvl,pxa168-aspenite",
23 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4018000, "pxa2xx-uart.1", NULL), 25 NULL,
24 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4026000, "pxa2xx-uart.2", NULL),
25 OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4011000, "pxa2xx-i2c.0", NULL),
26 OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4025000, "pxa2xx-i2c.1", NULL),
27 OF_DEV_AUXDATA("marvell,mmp-gpio", 0xd4019000, "mmp-gpio", NULL),
28 OF_DEV_AUXDATA("mrvl,mmp-rtc", 0xd4010000, "sa1100-rtc", NULL),
29 {}
30}; 26};
31 27
32static const struct of_dev_auxdata pxa910_auxdata_lookup[] __initconst = { 28static const char *pxa910_dt_board_compat[] __initdata = {
33 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.0", NULL), 29 "mrvl,pxa910-dkb",
34 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4018000, "pxa2xx-uart.1", NULL), 30 NULL,
35 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4036000, "pxa2xx-uart.2", NULL),
36 OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4011000, "pxa2xx-i2c.0", NULL),
37 OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4037000, "pxa2xx-i2c.1", NULL),
38 OF_DEV_AUXDATA("marvell,mmp-gpio", 0xd4019000, "mmp-gpio", NULL),
39 OF_DEV_AUXDATA("mrvl,mmp-rtc", 0xd4010000, "sa1100-rtc", NULL),
40 {}
41}; 31};
42 32
43static void __init pxa168_dt_init(void) 33static void __init mmp_init_time(void)
44{
45 of_platform_populate(NULL, of_default_bus_match_table,
46 pxa168_auxdata_lookup, NULL);
47}
48
49static void __init pxa910_dt_init(void)
50{ 34{
51 of_platform_populate(NULL, of_default_bus_match_table, 35#ifdef CONFIG_CACHE_TAUROS2
52 pxa910_auxdata_lookup, NULL); 36 tauros2_init(0);
37#endif
38 mmp_dt_init_timer();
39 of_clk_init(NULL);
53} 40}
54 41
55static const char *mmp_dt_board_compat[] __initdata = {
56 "mrvl,pxa168-aspenite",
57 "mrvl,pxa910-dkb",
58 NULL,
59};
60
61DT_MACHINE_START(PXA168_DT, "Marvell PXA168 (Device Tree Support)") 42DT_MACHINE_START(PXA168_DT, "Marvell PXA168 (Device Tree Support)")
62 .map_io = mmp_map_io, 43 .map_io = mmp_map_io,
63 .init_time = mmp_dt_init_timer, 44 .init_time = mmp_init_time,
64 .init_machine = pxa168_dt_init, 45 .dt_compat = pxa168_dt_board_compat,
65 .dt_compat = mmp_dt_board_compat,
66MACHINE_END 46MACHINE_END
67 47
68DT_MACHINE_START(PXA910_DT, "Marvell PXA910 (Device Tree Support)") 48DT_MACHINE_START(PXA910_DT, "Marvell PXA910 (Device Tree Support)")
69 .map_io = mmp_map_io, 49 .map_io = mmp_map_io,
70 .init_time = mmp_dt_init_timer, 50 .init_time = mmp_init_time,
71 .init_machine = pxa910_dt_init, 51 .dt_compat = pxa910_dt_board_compat,
72 .dt_compat = mmp_dt_board_compat,
73MACHINE_END 52MACHINE_END
diff --git a/arch/arm/mach-mmp/mmp2-dt.c b/arch/arm/mach-mmp/mmp2-dt.c
index 023cb453f157..998c0f533abc 100644
--- a/arch/arm/mach-mmp/mmp2-dt.c
+++ b/arch/arm/mach-mmp/mmp2-dt.c
@@ -12,29 +12,22 @@
12#include <linux/io.h> 12#include <linux/io.h>
13#include <linux/irqchip.h> 13#include <linux/irqchip.h>
14#include <linux/of_platform.h> 14#include <linux/of_platform.h>
15#include <linux/clk-provider.h>
15#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
16#include <asm/mach/time.h> 17#include <asm/mach/time.h>
18#include <asm/hardware/cache-tauros2.h>
17 19
18#include "common.h" 20#include "common.h"
19 21
20extern void __init mmp_dt_init_timer(void); 22extern void __init mmp_dt_init_timer(void);
21 23
22static const struct of_dev_auxdata mmp2_auxdata_lookup[] __initconst = { 24static void __init mmp_init_time(void)
23 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4030000, "pxa2xx-uart.0", NULL),
24 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.1", NULL),
25 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4018000, "pxa2xx-uart.2", NULL),
26 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4016000, "pxa2xx-uart.3", NULL),
27 OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4011000, "pxa2xx-i2c.0", NULL),
28 OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4025000, "pxa2xx-i2c.1", NULL),
29 OF_DEV_AUXDATA("marvell,mmp-gpio", 0xd4019000, "mmp2-gpio", NULL),
30 OF_DEV_AUXDATA("mrvl,mmp-rtc", 0xd4010000, "sa1100-rtc", NULL),
31 {}
32};
33
34static void __init mmp2_dt_init(void)
35{ 25{
36 of_platform_populate(NULL, of_default_bus_match_table, 26#ifdef CONFIG_CACHE_TAUROS2
37 mmp2_auxdata_lookup, NULL); 27 tauros2_init(0);
28#endif
29 mmp_dt_init_timer();
30 of_clk_init(NULL);
38} 31}
39 32
40static const char *mmp2_dt_board_compat[] __initdata = { 33static const char *mmp2_dt_board_compat[] __initdata = {
@@ -44,7 +37,6 @@ static const char *mmp2_dt_board_compat[] __initdata = {
44 37
45DT_MACHINE_START(MMP2_DT, "Marvell MMP2 (Device Tree Support)") 38DT_MACHINE_START(MMP2_DT, "Marvell MMP2 (Device Tree Support)")
46 .map_io = mmp_map_io, 39 .map_io = mmp_map_io,
47 .init_time = mmp_dt_init_timer, 40 .init_time = mmp_init_time,
48 .init_machine = mmp2_dt_init,
49 .dt_compat = mmp2_dt_board_compat, 41 .dt_compat = mmp2_dt_board_compat,
50MACHINE_END 42MACHINE_END
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index d22c30d3ccfa..8c58b71c2727 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -917,6 +917,10 @@ static int __init omap_device_late_idle(struct device *dev, void *data)
917static int __init omap_device_late_init(void) 917static int __init omap_device_late_init(void)
918{ 918{
919 bus_for_each_dev(&platform_bus_type, NULL, NULL, omap_device_late_idle); 919 bus_for_each_dev(&platform_bus_type, NULL, NULL, omap_device_late_idle);
920
921 WARN(!of_have_populated_dt(),
922 "legacy booting deprecated, please update to boot with .dts\n");
923
920 return 0; 924 return 0;
921} 925}
922omap_late_initcall_sync(omap_device_late_init); 926omap_late_initcall_sync(omap_device_late_init);
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index c95346c94829..cec9d6c6442c 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -252,9 +252,6 @@ static void __init nokia_n900_legacy_init(void)
252 platform_device_register(&omap3_rom_rng_device); 252 platform_device_register(&omap3_rom_rng_device);
253 253
254 } 254 }
255
256 /* Only on some development boards */
257 gpio_request_one(164, GPIOF_OUT_INIT_LOW, "smc91x reset");
258} 255}
259 256
260static void __init omap3_tao3530_legacy_init(void) 257static void __init omap3_tao3530_legacy_init(void)
diff --git a/arch/arm/mach-pxa/include/mach/addr-map.h b/arch/arm/mach-pxa/include/mach/addr-map.h
index bbf9df37ad4b..d28fe291233a 100644
--- a/arch/arm/mach-pxa/include/mach/addr-map.h
+++ b/arch/arm/mach-pxa/include/mach/addr-map.h
@@ -39,6 +39,11 @@
39#define DMEMC_SIZE 0x00100000 39#define DMEMC_SIZE 0x00100000
40 40
41/* 41/*
42 * Reserved space for low level debug virtual addresses within
43 * 0xf6200000..0xf6201000
44 */
45
46/*
42 * Internal Memory Controller (PXA27x and later) 47 * Internal Memory Controller (PXA27x and later)
43 */ 48 */
44#define IMEMC_PHYS 0x58000000 49#define IMEMC_PHYS 0x58000000
diff --git a/arch/arm/mach-socfpga/core.h b/arch/arm/mach-socfpga/core.h
index 572b8f719ffb..60c443dadb58 100644
--- a/arch/arm/mach-socfpga/core.h
+++ b/arch/arm/mach-socfpga/core.h
@@ -40,7 +40,7 @@ extern void __iomem *rst_manager_base_addr;
40extern struct smp_operations socfpga_smp_ops; 40extern struct smp_operations socfpga_smp_ops;
41extern char secondary_trampoline, secondary_trampoline_end; 41extern char secondary_trampoline, secondary_trampoline_end;
42 42
43extern unsigned long cpu1start_addr; 43extern unsigned long socfpga_cpu1start_addr;
44 44
45#define SOCFPGA_SCU_VIRT_BASE 0xfffec000 45#define SOCFPGA_SCU_VIRT_BASE 0xfffec000
46 46
diff --git a/arch/arm/mach-socfpga/headsmp.S b/arch/arm/mach-socfpga/headsmp.S
index 95c115d8b5ee..f65ea0af4af3 100644
--- a/arch/arm/mach-socfpga/headsmp.S
+++ b/arch/arm/mach-socfpga/headsmp.S
@@ -9,21 +9,26 @@
9 */ 9 */
10#include <linux/linkage.h> 10#include <linux/linkage.h>
11#include <linux/init.h> 11#include <linux/init.h>
12#include <asm/memory.h>
12 13
13 .arch armv7-a 14 .arch armv7-a
14 15
15ENTRY(secondary_trampoline) 16ENTRY(secondary_trampoline)
16 movw r2, #:lower16:cpu1start_addr 17 /* CPU1 will always fetch from 0x0 when it is brought out of reset.
17 movt r2, #:upper16:cpu1start_addr 18 * Thus, we can just subtract the PAGE_OFFSET to get the physical
18 19 * address of &cpu1start_addr. This would not work for platforms
19 /* The socfpga VT cannot handle a 0xC0000000 page offset when loading 20 * where the physical memory does not start at 0x0.
20 the cpu1start_addr, we bit clear it. Tested on HW and VT. */ 21 */
21 bic r2, r2, #0x40000000 22 adr r0, 1f
22 23 ldmia r0, {r1, r2}
23 ldr r0, [r2] 24 sub r2, r2, #PAGE_OFFSET
24 ldr r1, [r0] 25 ldr r3, [r2]
25 bx r1 26 ldr r4, [r3]
27 bx r4
26 28
29 .align
301: .long .
31 .long socfpga_cpu1start_addr
27ENTRY(secondary_trampoline_end) 32ENTRY(secondary_trampoline_end)
28 33
29ENTRY(socfpga_secondary_startup) 34ENTRY(socfpga_secondary_startup)
diff --git a/arch/arm/mach-socfpga/platsmp.c b/arch/arm/mach-socfpga/platsmp.c
index 5356a72bc8ce..16ca97b039f9 100644
--- a/arch/arm/mach-socfpga/platsmp.c
+++ b/arch/arm/mach-socfpga/platsmp.c
@@ -33,11 +33,11 @@ static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
33{ 33{
34 int trampoline_size = &secondary_trampoline_end - &secondary_trampoline; 34 int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
35 35
36 if (cpu1start_addr) { 36 if (socfpga_cpu1start_addr) {
37 memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size); 37 memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
38 38
39 __raw_writel(virt_to_phys(socfpga_secondary_startup), 39 __raw_writel(virt_to_phys(socfpga_secondary_startup),
40 (sys_manager_base_addr + (cpu1start_addr & 0x000000ff))); 40 (sys_manager_base_addr + (socfpga_cpu1start_addr & 0x000000ff)));
41 41
42 flush_cache_all(); 42 flush_cache_all();
43 smp_wmb(); 43 smp_wmb();
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c
index adbf38314ca8..383d61e138af 100644
--- a/arch/arm/mach-socfpga/socfpga.c
+++ b/arch/arm/mach-socfpga/socfpga.c
@@ -29,7 +29,7 @@
29void __iomem *socfpga_scu_base_addr = ((void __iomem *)(SOCFPGA_SCU_VIRT_BASE)); 29void __iomem *socfpga_scu_base_addr = ((void __iomem *)(SOCFPGA_SCU_VIRT_BASE));
30void __iomem *sys_manager_base_addr; 30void __iomem *sys_manager_base_addr;
31void __iomem *rst_manager_base_addr; 31void __iomem *rst_manager_base_addr;
32unsigned long cpu1start_addr; 32unsigned long socfpga_cpu1start_addr;
33 33
34static struct map_desc scu_io_desc __initdata = { 34static struct map_desc scu_io_desc __initdata = {
35 .virtual = SOCFPGA_SCU_VIRT_BASE, 35 .virtual = SOCFPGA_SCU_VIRT_BASE,
@@ -70,7 +70,7 @@ void __init socfpga_sysmgr_init(void)
70 np = of_find_compatible_node(NULL, NULL, "altr,sys-mgr"); 70 np = of_find_compatible_node(NULL, NULL, "altr,sys-mgr");
71 71
72 if (of_property_read_u32(np, "cpu1-start-addr", 72 if (of_property_read_u32(np, "cpu1-start-addr",
73 (u32 *) &cpu1start_addr)) 73 (u32 *) &socfpga_cpu1start_addr))
74 pr_err("SMP: Need cpu1-start-addr in device tree.\n"); 74 pr_err("SMP: Need cpu1-start-addr in device tree.\n");
75 75
76 sys_manager_base_addr = of_iomap(np, 0); 76 sys_manager_base_addr = of_iomap(np, 0);
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 55f9d6e0cc88..5e65ca8dea62 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -956,7 +956,7 @@ static u32 cache_id_part_number_from_dt;
956 * @associativity: variable to return the calculated associativity in 956 * @associativity: variable to return the calculated associativity in
957 * @max_way_size: the maximum size in bytes for the cache ways 957 * @max_way_size: the maximum size in bytes for the cache ways
958 */ 958 */
959static void __init l2x0_cache_size_of_parse(const struct device_node *np, 959static int __init l2x0_cache_size_of_parse(const struct device_node *np,
960 u32 *aux_val, u32 *aux_mask, 960 u32 *aux_val, u32 *aux_mask,
961 u32 *associativity, 961 u32 *associativity,
962 u32 max_way_size) 962 u32 max_way_size)
@@ -974,7 +974,7 @@ static void __init l2x0_cache_size_of_parse(const struct device_node *np,
974 of_property_read_u32(np, "cache-line-size", &line_size); 974 of_property_read_u32(np, "cache-line-size", &line_size);
975 975
976 if (!cache_size || !sets) 976 if (!cache_size || !sets)
977 return; 977 return -ENODEV;
978 978
979 /* All these l2 caches have the same line = block size actually */ 979 /* All these l2 caches have the same line = block size actually */
980 if (!line_size) { 980 if (!line_size) {
@@ -1009,7 +1009,7 @@ static void __init l2x0_cache_size_of_parse(const struct device_node *np,
1009 1009
1010 if (way_size > max_way_size) { 1010 if (way_size > max_way_size) {
1011 pr_err("L2C OF: set size %dKB is too large\n", way_size); 1011 pr_err("L2C OF: set size %dKB is too large\n", way_size);
1012 return; 1012 return -EINVAL;
1013 } 1013 }
1014 1014
1015 pr_info("L2C OF: override cache size: %d bytes (%dKB)\n", 1015 pr_info("L2C OF: override cache size: %d bytes (%dKB)\n",
@@ -1027,7 +1027,7 @@ static void __init l2x0_cache_size_of_parse(const struct device_node *np,
1027 if (way_size_bits < 1 || way_size_bits > 6) { 1027 if (way_size_bits < 1 || way_size_bits > 6) {
1028 pr_err("L2C OF: cache way size illegal: %dKB is not mapped\n", 1028 pr_err("L2C OF: cache way size illegal: %dKB is not mapped\n",
1029 way_size); 1029 way_size);
1030 return; 1030 return -EINVAL;
1031 } 1031 }
1032 1032
1033 mask |= L2C_AUX_CTRL_WAY_SIZE_MASK; 1033 mask |= L2C_AUX_CTRL_WAY_SIZE_MASK;
@@ -1036,6 +1036,8 @@ static void __init l2x0_cache_size_of_parse(const struct device_node *np,
1036 *aux_val &= ~mask; 1036 *aux_val &= ~mask;
1037 *aux_val |= val; 1037 *aux_val |= val;
1038 *aux_mask &= ~mask; 1038 *aux_mask &= ~mask;
1039
1040 return 0;
1039} 1041}
1040 1042
1041static void __init l2x0_of_parse(const struct device_node *np, 1043static void __init l2x0_of_parse(const struct device_node *np,
@@ -1046,6 +1048,7 @@ static void __init l2x0_of_parse(const struct device_node *np,
1046 u32 dirty = 0; 1048 u32 dirty = 0;
1047 u32 val = 0, mask = 0; 1049 u32 val = 0, mask = 0;
1048 u32 assoc; 1050 u32 assoc;
1051 int ret;
1049 1052
1050 of_property_read_u32(np, "arm,tag-latency", &tag); 1053 of_property_read_u32(np, "arm,tag-latency", &tag);
1051 if (tag) { 1054 if (tag) {
@@ -1068,7 +1071,10 @@ static void __init l2x0_of_parse(const struct device_node *np,
1068 val |= (dirty - 1) << L2X0_AUX_CTRL_DIRTY_LATENCY_SHIFT; 1071 val |= (dirty - 1) << L2X0_AUX_CTRL_DIRTY_LATENCY_SHIFT;
1069 } 1072 }
1070 1073
1071 l2x0_cache_size_of_parse(np, aux_val, aux_mask, &assoc, SZ_256K); 1074 ret = l2x0_cache_size_of_parse(np, aux_val, aux_mask, &assoc, SZ_256K);
1075 if (ret)
1076 return;
1077
1072 if (assoc > 8) { 1078 if (assoc > 8) {
1073 pr_err("l2x0 of: cache setting yield too high associativity\n"); 1079 pr_err("l2x0 of: cache setting yield too high associativity\n");
1074 pr_err("l2x0 of: %d calculated, max 8\n", assoc); 1080 pr_err("l2x0 of: %d calculated, max 8\n", assoc);
@@ -1125,6 +1131,7 @@ static void __init l2c310_of_parse(const struct device_node *np,
1125 u32 tag[3] = { 0, 0, 0 }; 1131 u32 tag[3] = { 0, 0, 0 };
1126 u32 filter[2] = { 0, 0 }; 1132 u32 filter[2] = { 0, 0 };
1127 u32 assoc; 1133 u32 assoc;
1134 int ret;
1128 1135
1129 of_property_read_u32_array(np, "arm,tag-latency", tag, ARRAY_SIZE(tag)); 1136 of_property_read_u32_array(np, "arm,tag-latency", tag, ARRAY_SIZE(tag));
1130 if (tag[0] && tag[1] && tag[2]) 1137 if (tag[0] && tag[1] && tag[2])
@@ -1152,7 +1159,10 @@ static void __init l2c310_of_parse(const struct device_node *np,
1152 l2x0_base + L310_ADDR_FILTER_START); 1159 l2x0_base + L310_ADDR_FILTER_START);
1153 } 1160 }
1154 1161
1155 l2x0_cache_size_of_parse(np, aux_val, aux_mask, &assoc, SZ_512K); 1162 ret = l2x0_cache_size_of_parse(np, aux_val, aux_mask, &assoc, SZ_512K);
1163 if (ret)
1164 return;
1165
1156 switch (assoc) { 1166 switch (assoc) {
1157 case 16: 1167 case 16:
1158 *aux_val &= ~L2X0_AUX_CTRL_ASSOC_MASK; 1168 *aux_val &= ~L2X0_AUX_CTRL_ASSOC_MASK;
@@ -1164,8 +1174,8 @@ static void __init l2c310_of_parse(const struct device_node *np,
1164 *aux_mask &= ~L2X0_AUX_CTRL_ASSOC_MASK; 1174 *aux_mask &= ~L2X0_AUX_CTRL_ASSOC_MASK;
1165 break; 1175 break;
1166 default: 1176 default:
1167 pr_err("PL310 OF: cache setting yield illegal associativity\n"); 1177 pr_err("L2C-310 OF cache associativity %d invalid, only 8 or 16 permitted\n",
1168 pr_err("PL310 OF: %d calculated, only 8 and 16 legal\n", assoc); 1178 assoc);
1169 break; 1179 break;
1170 } 1180 }
1171} 1181}
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index c245d903927f..e8907117861e 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -1198,7 +1198,6 @@ __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
1198{ 1198{
1199 return dma_common_pages_remap(pages, size, 1199 return dma_common_pages_remap(pages, size,
1200 VM_ARM_DMA_CONSISTENT | VM_USERMAP, prot, caller); 1200 VM_ARM_DMA_CONSISTENT | VM_USERMAP, prot, caller);
1201 return NULL;
1202} 1201}
1203 1202
1204/* 1203/*
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c
index 45aeaaca9052..e17ed00828d7 100644
--- a/arch/arm/mm/highmem.c
+++ b/arch/arm/mm/highmem.c
@@ -127,8 +127,11 @@ void *kmap_atomic_pfn(unsigned long pfn)
127{ 127{
128 unsigned long vaddr; 128 unsigned long vaddr;
129 int idx, type; 129 int idx, type;
130 struct page *page = pfn_to_page(pfn);
130 131
131 pagefault_disable(); 132 pagefault_disable();
133 if (!PageHighMem(page))
134 return page_address(page);
132 135
133 type = kmap_atomic_idx_push(); 136 type = kmap_atomic_idx_push();
134 idx = type + KM_TYPE_NR * smp_processor_id(); 137 idx = type + KM_TYPE_NR * smp_processor_id();
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 92bba32d9230..9481f85c56e6 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -559,10 +559,10 @@ void __init mem_init(void)
559#ifdef CONFIG_MODULES 559#ifdef CONFIG_MODULES
560 " modules : 0x%08lx - 0x%08lx (%4ld MB)\n" 560 " modules : 0x%08lx - 0x%08lx (%4ld MB)\n"
561#endif 561#endif
562 " .text : 0x%p" " - 0x%p" " (%4d kB)\n" 562 " .text : 0x%p" " - 0x%p" " (%4td kB)\n"
563 " .init : 0x%p" " - 0x%p" " (%4d kB)\n" 563 " .init : 0x%p" " - 0x%p" " (%4td kB)\n"
564 " .data : 0x%p" " - 0x%p" " (%4d kB)\n" 564 " .data : 0x%p" " - 0x%p" " (%4td kB)\n"
565 " .bss : 0x%p" " - 0x%p" " (%4d kB)\n", 565 " .bss : 0x%p" " - 0x%p" " (%4td kB)\n",
566 566
567 MLK(UL(CONFIG_VECTORS_BASE), UL(CONFIG_VECTORS_BASE) + 567 MLK(UL(CONFIG_VECTORS_BASE), UL(CONFIG_VECTORS_BASE) +
568 (PAGE_SIZE)), 568 (PAGE_SIZE)),
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index ac9afde76dea..9532f8d5857e 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1,5 +1,6 @@
1config ARM64 1config ARM64
2 def_bool y 2 def_bool y
3 select ARCH_BINFMT_ELF_RANDOMIZE_PIE
3 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 4 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
4 select ARCH_HAS_SG_CHAIN 5 select ARCH_HAS_SG_CHAIN
5 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 6 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
@@ -232,7 +233,7 @@ config ARM64_VA_BITS_42
232 233
233config ARM64_VA_BITS_48 234config ARM64_VA_BITS_48
234 bool "48-bit" 235 bool "48-bit"
235 depends on BROKEN 236 depends on !ARM_SMMU
236 237
237endchoice 238endchoice
238 239
diff --git a/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi
index ac2cb2418025..c46cbb29f3c6 100644
--- a/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi
+++ b/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi
@@ -22,7 +22,7 @@
22 bank-width = <4>; 22 bank-width = <4>;
23 }; 23 };
24 24
25 vram@2,00000000 { 25 v2m_video_ram: vram@2,00000000 {
26 compatible = "arm,vexpress-vram"; 26 compatible = "arm,vexpress-vram";
27 reg = <2 0x00000000 0x00800000>; 27 reg = <2 0x00000000 0x00800000>;
28 }; 28 };
@@ -179,9 +179,42 @@
179 clcd@1f0000 { 179 clcd@1f0000 {
180 compatible = "arm,pl111", "arm,primecell"; 180 compatible = "arm,pl111", "arm,primecell";
181 reg = <0x1f0000 0x1000>; 181 reg = <0x1f0000 0x1000>;
182 interrupt-names = "combined";
182 interrupts = <14>; 183 interrupts = <14>;
183 clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>; 184 clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>;
184 clock-names = "clcdclk", "apb_pclk"; 185 clock-names = "clcdclk", "apb_pclk";
186 arm,pl11x,framebuffer = <0x18000000 0x00180000>;
187 memory-region = <&v2m_video_ram>;
188 max-memory-bandwidth = <130000000>; /* 16bpp @ 63.5MHz */
189
190 port {
191 v2m_clcd_pads: endpoint {
192 remote-endpoint = <&v2m_clcd_panel>;
193 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
194 };
195 };
196
197 panel {
198 compatible = "panel-dpi";
199
200 port {
201 v2m_clcd_panel: endpoint {
202 remote-endpoint = <&v2m_clcd_pads>;
203 };
204 };
205
206 panel-timing {
207 clock-frequency = <63500127>;
208 hactive = <1024>;
209 hback-porch = <152>;
210 hfront-porch = <48>;
211 hsync-len = <104>;
212 vactive = <768>;
213 vback-porch = <23>;
214 vfront-porch = <3>;
215 vsync-len = <4>;
216 };
217 };
185 }; 218 };
186 219
187 virtio_block@0130000 { 220 virtio_block@0130000 {
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 9cd37de9aa8d..dd301be89ecc 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -35,6 +35,9 @@ CONFIG_MODULE_UNLOAD=y
35CONFIG_ARCH_THUNDER=y 35CONFIG_ARCH_THUNDER=y
36CONFIG_ARCH_VEXPRESS=y 36CONFIG_ARCH_VEXPRESS=y
37CONFIG_ARCH_XGENE=y 37CONFIG_ARCH_XGENE=y
38CONFIG_PCI=y
39CONFIG_PCI_MSI=y
40CONFIG_PCI_XGENE=y
38CONFIG_SMP=y 41CONFIG_SMP=y
39CONFIG_PREEMPT=y 42CONFIG_PREEMPT=y
40CONFIG_KSM=y 43CONFIG_KSM=y
@@ -52,6 +55,7 @@ CONFIG_IP_PNP_DHCP=y
52CONFIG_IP_PNP_BOOTP=y 55CONFIG_IP_PNP_BOOTP=y
53# CONFIG_INET_LRO is not set 56# CONFIG_INET_LRO is not set
54# CONFIG_IPV6 is not set 57# CONFIG_IPV6 is not set
58CONFIG_BPF_JIT=y
55# CONFIG_WIRELESS is not set 59# CONFIG_WIRELESS is not set
56CONFIG_NET_9P=y 60CONFIG_NET_9P=y
57CONFIG_NET_9P_VIRTIO=y 61CONFIG_NET_9P_VIRTIO=y
@@ -65,19 +69,21 @@ CONFIG_VIRTIO_BLK=y
65CONFIG_BLK_DEV_SD=y 69CONFIG_BLK_DEV_SD=y
66# CONFIG_SCSI_LOWLEVEL is not set 70# CONFIG_SCSI_LOWLEVEL is not set
67CONFIG_ATA=y 71CONFIG_ATA=y
72CONFIG_SATA_AHCI=y
73CONFIG_SATA_AHCI_PLATFORM=y
68CONFIG_AHCI_XGENE=y 74CONFIG_AHCI_XGENE=y
69CONFIG_PHY_XGENE=y
70CONFIG_PATA_PLATFORM=y 75CONFIG_PATA_PLATFORM=y
71CONFIG_PATA_OF_PLATFORM=y 76CONFIG_PATA_OF_PLATFORM=y
72CONFIG_NETDEVICES=y 77CONFIG_NETDEVICES=y
73CONFIG_TUN=y 78CONFIG_TUN=y
74CONFIG_VIRTIO_NET=y 79CONFIG_VIRTIO_NET=y
80CONFIG_NET_XGENE=y
75CONFIG_SMC91X=y 81CONFIG_SMC91X=y
76CONFIG_SMSC911X=y 82CONFIG_SMSC911X=y
77CONFIG_NET_XGENE=y
78# CONFIG_WLAN is not set 83# CONFIG_WLAN is not set
79CONFIG_INPUT_EVDEV=y 84CONFIG_INPUT_EVDEV=y
80# CONFIG_SERIO_SERPORT is not set 85# CONFIG_SERIO_SERPORT is not set
86CONFIG_SERIO_AMBAKMI=y
81CONFIG_LEGACY_PTY_COUNT=16 87CONFIG_LEGACY_PTY_COUNT=16
82CONFIG_SERIAL_8250=y 88CONFIG_SERIAL_8250=y
83CONFIG_SERIAL_8250_CONSOLE=y 89CONFIG_SERIAL_8250_CONSOLE=y
@@ -86,22 +92,40 @@ CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
86CONFIG_SERIAL_OF_PLATFORM=y 92CONFIG_SERIAL_OF_PLATFORM=y
87CONFIG_VIRTIO_CONSOLE=y 93CONFIG_VIRTIO_CONSOLE=y
88# CONFIG_HW_RANDOM is not set 94# CONFIG_HW_RANDOM is not set
95# CONFIG_HMC_DRV is not set
96CONFIG_SPI=y
97CONFIG_SPI_PL022=y
98CONFIG_GPIO_PL061=y
99CONFIG_GPIO_XGENE=y
89# CONFIG_HWMON is not set 100# CONFIG_HWMON is not set
90CONFIG_REGULATOR=y 101CONFIG_REGULATOR=y
91CONFIG_REGULATOR_FIXED_VOLTAGE=y 102CONFIG_REGULATOR_FIXED_VOLTAGE=y
92CONFIG_FB=y 103CONFIG_FB=y
104CONFIG_FB_ARMCLCD=y
93CONFIG_FRAMEBUFFER_CONSOLE=y 105CONFIG_FRAMEBUFFER_CONSOLE=y
94CONFIG_LOGO=y 106CONFIG_LOGO=y
95# CONFIG_LOGO_LINUX_MONO is not set 107# CONFIG_LOGO_LINUX_MONO is not set
96# CONFIG_LOGO_LINUX_VGA16 is not set 108# CONFIG_LOGO_LINUX_VGA16 is not set
97CONFIG_USB=y 109CONFIG_USB=y
110CONFIG_USB_EHCI_HCD=y
111CONFIG_USB_EHCI_HCD_PLATFORM=y
98CONFIG_USB_ISP1760_HCD=y 112CONFIG_USB_ISP1760_HCD=y
113CONFIG_USB_OHCI_HCD=y
114CONFIG_USB_OHCI_HCD_PLATFORM=y
99CONFIG_USB_STORAGE=y 115CONFIG_USB_STORAGE=y
116CONFIG_USB_ULPI=y
100CONFIG_MMC=y 117CONFIG_MMC=y
101CONFIG_MMC_ARMMMCI=y 118CONFIG_MMC_ARMMMCI=y
119CONFIG_MMC_SDHCI=y
120CONFIG_MMC_SDHCI_PLTFM=y
121CONFIG_MMC_SPI=y
122CONFIG_RTC_CLASS=y
123CONFIG_RTC_DRV_EFI=y
124CONFIG_RTC_DRV_XGENE=y
102CONFIG_VIRTIO_BALLOON=y 125CONFIG_VIRTIO_BALLOON=y
103CONFIG_VIRTIO_MMIO=y 126CONFIG_VIRTIO_MMIO=y
104# CONFIG_IOMMU_SUPPORT is not set 127# CONFIG_IOMMU_SUPPORT is not set
128CONFIG_PHY_XGENE=y
105CONFIG_EXT2_FS=y 129CONFIG_EXT2_FS=y
106CONFIG_EXT3_FS=y 130CONFIG_EXT3_FS=y
107# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set 131# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
diff --git a/arch/arm64/include/asm/compat.h b/arch/arm64/include/asm/compat.h
index 253e33bc94fb..56de5aadede2 100644
--- a/arch/arm64/include/asm/compat.h
+++ b/arch/arm64/include/asm/compat.h
@@ -37,8 +37,8 @@ typedef s32 compat_ssize_t;
37typedef s32 compat_time_t; 37typedef s32 compat_time_t;
38typedef s32 compat_clock_t; 38typedef s32 compat_clock_t;
39typedef s32 compat_pid_t; 39typedef s32 compat_pid_t;
40typedef u32 __compat_uid_t; 40typedef u16 __compat_uid_t;
41typedef u32 __compat_gid_t; 41typedef u16 __compat_gid_t;
42typedef u16 __compat_uid16_t; 42typedef u16 __compat_uid16_t;
43typedef u16 __compat_gid16_t; 43typedef u16 __compat_gid16_t;
44typedef u32 __compat_uid32_t; 44typedef u32 __compat_uid32_t;
diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
index 01d3aab64b79..1f65be393139 100644
--- a/arch/arm64/include/asm/elf.h
+++ b/arch/arm64/include/asm/elf.h
@@ -126,7 +126,7 @@ typedef struct user_fpsimd_state elf_fpregset_t;
126 * that it will "exec", and that there is sufficient room for the brk. 126 * that it will "exec", and that there is sufficient room for the brk.
127 */ 127 */
128extern unsigned long randomize_et_dyn(unsigned long base); 128extern unsigned long randomize_et_dyn(unsigned long base);
129#define ELF_ET_DYN_BASE (randomize_et_dyn(2 * TASK_SIZE_64 / 3)) 129#define ELF_ET_DYN_BASE (2 * TASK_SIZE_64 / 3)
130 130
131/* 131/*
132 * When the program starts, a1 contains a pointer to a function to be 132 * When the program starts, a1 contains a pointer to a function to be
@@ -169,7 +169,7 @@ extern unsigned long arch_randomize_brk(struct mm_struct *mm);
169#define COMPAT_ELF_PLATFORM ("v8l") 169#define COMPAT_ELF_PLATFORM ("v8l")
170#endif 170#endif
171 171
172#define COMPAT_ELF_ET_DYN_BASE (randomize_et_dyn(2 * TASK_SIZE_32 / 3)) 172#define COMPAT_ELF_ET_DYN_BASE (2 * TASK_SIZE_32 / 3)
173 173
174/* AArch32 registers. */ 174/* AArch32 registers. */
175#define COMPAT_ELF_NGREG 18 175#define COMPAT_ELF_NGREG 18
diff --git a/arch/arm64/include/asm/irq_work.h b/arch/arm64/include/asm/irq_work.h
index 8e24ef3f7c82..b4f6b19a8a68 100644
--- a/arch/arm64/include/asm/irq_work.h
+++ b/arch/arm64/include/asm/irq_work.h
@@ -1,6 +1,8 @@
1#ifndef __ASM_IRQ_WORK_H 1#ifndef __ASM_IRQ_WORK_H
2#define __ASM_IRQ_WORK_H 2#define __ASM_IRQ_WORK_H
3 3
4#ifdef CONFIG_SMP
5
4#include <asm/smp.h> 6#include <asm/smp.h>
5 7
6static inline bool arch_irq_work_has_interrupt(void) 8static inline bool arch_irq_work_has_interrupt(void)
@@ -8,4 +10,13 @@ static inline bool arch_irq_work_has_interrupt(void)
8 return !!__smp_cross_call; 10 return !!__smp_cross_call;
9} 11}
10 12
13#else
14
15static inline bool arch_irq_work_has_interrupt(void)
16{
17 return false;
18}
19
20#endif
21
11#endif /* __ASM_IRQ_WORK_H */ 22#endif /* __ASM_IRQ_WORK_H */
diff --git a/arch/arm64/include/asm/unistd32.h b/arch/arm64/include/asm/unistd32.h
index da1f06b535e3..9dfdac4a74a1 100644
--- a/arch/arm64/include/asm/unistd32.h
+++ b/arch/arm64/include/asm/unistd32.h
@@ -792,3 +792,5 @@ __SYSCALL(__NR_renameat2, sys_renameat2)
792__SYSCALL(__NR_getrandom, sys_getrandom) 792__SYSCALL(__NR_getrandom, sys_getrandom)
793#define __NR_memfd_create 385 793#define __NR_memfd_create 385
794__SYSCALL(__NR_memfd_create, sys_memfd_create) 794__SYSCALL(__NR_memfd_create, sys_memfd_create)
795#define __NR_bpf 386
796__SYSCALL(__NR_bpf, sys_bpf)
diff --git a/arch/arm64/kernel/efi.c b/arch/arm64/kernel/efi.c
index 03aaa99e1ea0..95c49ebc660d 100644
--- a/arch/arm64/kernel/efi.c
+++ b/arch/arm64/kernel/efi.c
@@ -89,7 +89,8 @@ static int __init uefi_init(void)
89 */ 89 */
90 if (efi.systab->hdr.signature != EFI_SYSTEM_TABLE_SIGNATURE) { 90 if (efi.systab->hdr.signature != EFI_SYSTEM_TABLE_SIGNATURE) {
91 pr_err("System table signature incorrect\n"); 91 pr_err("System table signature incorrect\n");
92 return -EINVAL; 92 retval = -EINVAL;
93 goto out;
93 } 94 }
94 if ((efi.systab->hdr.revision >> 16) < 2) 95 if ((efi.systab->hdr.revision >> 16) < 2)
95 pr_warn("Warning: EFI system table version %d.%02d, expected 2.00 or greater\n", 96 pr_warn("Warning: EFI system table version %d.%02d, expected 2.00 or greater\n",
@@ -103,6 +104,7 @@ static int __init uefi_init(void)
103 for (i = 0; i < (int) sizeof(vendor) - 1 && *c16; ++i) 104 for (i = 0; i < (int) sizeof(vendor) - 1 && *c16; ++i)
104 vendor[i] = c16[i]; 105 vendor[i] = c16[i];
105 vendor[i] = '\0'; 106 vendor[i] = '\0';
107 early_memunmap(c16, sizeof(vendor));
106 } 108 }
107 109
108 pr_info("EFI v%u.%.02u by %s\n", 110 pr_info("EFI v%u.%.02u by %s\n",
@@ -113,29 +115,11 @@ static int __init uefi_init(void)
113 if (retval == 0) 115 if (retval == 0)
114 set_bit(EFI_CONFIG_TABLES, &efi.flags); 116 set_bit(EFI_CONFIG_TABLES, &efi.flags);
115 117
116 early_memunmap(c16, sizeof(vendor)); 118out:
117 early_memunmap(efi.systab, sizeof(efi_system_table_t)); 119 early_memunmap(efi.systab, sizeof(efi_system_table_t));
118
119 return retval; 120 return retval;
120} 121}
121 122
122static __initdata char memory_type_name[][32] = {
123 {"Reserved"},
124 {"Loader Code"},
125 {"Loader Data"},
126 {"Boot Code"},
127 {"Boot Data"},
128 {"Runtime Code"},
129 {"Runtime Data"},
130 {"Conventional Memory"},
131 {"Unusable Memory"},
132 {"ACPI Reclaim Memory"},
133 {"ACPI Memory NVS"},
134 {"Memory Mapped I/O"},
135 {"MMIO Port Space"},
136 {"PAL Code"},
137};
138
139/* 123/*
140 * Return true for RAM regions we want to permanently reserve. 124 * Return true for RAM regions we want to permanently reserve.
141 */ 125 */
@@ -166,10 +150,13 @@ static __init void reserve_regions(void)
166 paddr = md->phys_addr; 150 paddr = md->phys_addr;
167 npages = md->num_pages; 151 npages = md->num_pages;
168 152
169 if (uefi_debug) 153 if (uefi_debug) {
170 pr_info(" 0x%012llx-0x%012llx [%s]", 154 char buf[64];
155
156 pr_info(" 0x%012llx-0x%012llx %s",
171 paddr, paddr + (npages << EFI_PAGE_SHIFT) - 1, 157 paddr, paddr + (npages << EFI_PAGE_SHIFT) - 1,
172 memory_type_name[md->type]); 158 efi_md_typeattr_format(buf, sizeof(buf), md));
159 }
173 160
174 memrange_efi_to_native(&paddr, &npages); 161 memrange_efi_to_native(&paddr, &npages);
175 size = npages << PAGE_SHIFT; 162 size = npages << PAGE_SHIFT;
@@ -393,11 +380,16 @@ static int __init arm64_enter_virtual_mode(void)
393 return -1; 380 return -1;
394 } 381 }
395 382
396 pr_info("Remapping and enabling EFI services.\n");
397
398 /* replace early memmap mapping with permanent mapping */
399 mapsize = memmap.map_end - memmap.map; 383 mapsize = memmap.map_end - memmap.map;
400 early_memunmap(memmap.map, mapsize); 384 early_memunmap(memmap.map, mapsize);
385
386 if (efi_runtime_disabled()) {
387 pr_info("EFI runtime services will be disabled.\n");
388 return -1;
389 }
390
391 pr_info("Remapping and enabling EFI services.\n");
392 /* replace early memmap mapping with permanent mapping */
401 memmap.map = (__force void *)ioremap_cache((phys_addr_t)memmap.phys_map, 393 memmap.map = (__force void *)ioremap_cache((phys_addr_t)memmap.phys_map,
402 mapsize); 394 mapsize);
403 memmap.map_end = memmap.map + mapsize; 395 memmap.map_end = memmap.map + mapsize;
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index c3065dbc4fa2..fde9923af859 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -378,8 +378,3 @@ unsigned long arch_randomize_brk(struct mm_struct *mm)
378{ 378{
379 return randomize_base(mm->brk); 379 return randomize_base(mm->brk);
380} 380}
381
382unsigned long randomize_et_dyn(unsigned long base)
383{
384 return randomize_base(base);
385}
diff --git a/arch/arm64/kernel/psci.c b/arch/arm64/kernel/psci.c
index 866c1c821860..663da771580a 100644
--- a/arch/arm64/kernel/psci.c
+++ b/arch/arm64/kernel/psci.c
@@ -528,7 +528,7 @@ static int __maybe_unused cpu_psci_cpu_suspend(unsigned long index)
528 if (WARN_ON_ONCE(!index)) 528 if (WARN_ON_ONCE(!index))
529 return -EINVAL; 529 return -EINVAL;
530 530
531 if (state->type == PSCI_POWER_STATE_TYPE_STANDBY) 531 if (state[index - 1].type == PSCI_POWER_STATE_TYPE_STANDBY)
532 ret = psci_ops.cpu_suspend(state[index - 1], 0); 532 ret = psci_ops.cpu_suspend(state[index - 1], 0);
533 else 533 else
534 ret = __cpu_suspend(index, psci_suspend_finisher); 534 ret = __cpu_suspend(index, psci_suspend_finisher);
diff --git a/arch/arm64/mm/ioremap.c b/arch/arm64/mm/ioremap.c
index fa324bd5a5c4..4a07630a6616 100644
--- a/arch/arm64/mm/ioremap.c
+++ b/arch/arm64/mm/ioremap.c
@@ -105,10 +105,10 @@ EXPORT_SYMBOL(ioremap_cache);
105 105
106static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; 106static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss;
107#if CONFIG_ARM64_PGTABLE_LEVELS > 2 107#if CONFIG_ARM64_PGTABLE_LEVELS > 2
108static pte_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss; 108static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss;
109#endif 109#endif
110#if CONFIG_ARM64_PGTABLE_LEVELS > 3 110#if CONFIG_ARM64_PGTABLE_LEVELS > 3
111static pte_t bm_pud[PTRS_PER_PUD] __page_aligned_bss; 111static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss;
112#endif 112#endif
113 113
114static inline pud_t * __init early_ioremap_pud(unsigned long addr) 114static inline pud_t * __init early_ioremap_pud(unsigned long addr)
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 6894ef3e6234..0bf90d26e745 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -297,11 +297,15 @@ static void __init map_mem(void)
297 * create_mapping requires puds, pmds and ptes to be allocated from 297 * create_mapping requires puds, pmds and ptes to be allocated from
298 * memory addressable from the initial direct kernel mapping. 298 * memory addressable from the initial direct kernel mapping.
299 * 299 *
300 * The initial direct kernel mapping, located at swapper_pg_dir, 300 * The initial direct kernel mapping, located at swapper_pg_dir, gives
301 * gives us PUD_SIZE memory starting from PHYS_OFFSET (which must be 301 * us PUD_SIZE (4K pages) or PMD_SIZE (64K pages) memory starting from
302 * aligned to 2MB as per Documentation/arm64/booting.txt). 302 * PHYS_OFFSET (which must be aligned to 2MB as per
303 * Documentation/arm64/booting.txt).
303 */ 304 */
304 limit = PHYS_OFFSET + PUD_SIZE; 305 if (IS_ENABLED(CONFIG_ARM64_64K_PAGES))
306 limit = PHYS_OFFSET + PMD_SIZE;
307 else
308 limit = PHYS_OFFSET + PUD_SIZE;
305 memblock_set_current_limit(limit); 309 memblock_set_current_limit(limit);
306 310
307 /* map all the memory banks */ 311 /* map all the memory banks */
diff --git a/arch/arm64/mm/pgd.c b/arch/arm64/mm/pgd.c
index 62c6101df260..6682b361d3ac 100644
--- a/arch/arm64/mm/pgd.c
+++ b/arch/arm64/mm/pgd.c
@@ -30,12 +30,14 @@
30 30
31#define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t)) 31#define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t))
32 32
33static struct kmem_cache *pgd_cache;
34
33pgd_t *pgd_alloc(struct mm_struct *mm) 35pgd_t *pgd_alloc(struct mm_struct *mm)
34{ 36{
35 if (PGD_SIZE == PAGE_SIZE) 37 if (PGD_SIZE == PAGE_SIZE)
36 return (pgd_t *)get_zeroed_page(GFP_KERNEL); 38 return (pgd_t *)get_zeroed_page(GFP_KERNEL);
37 else 39 else
38 return kzalloc(PGD_SIZE, GFP_KERNEL); 40 return kmem_cache_zalloc(pgd_cache, GFP_KERNEL);
39} 41}
40 42
41void pgd_free(struct mm_struct *mm, pgd_t *pgd) 43void pgd_free(struct mm_struct *mm, pgd_t *pgd)
@@ -43,5 +45,17 @@ void pgd_free(struct mm_struct *mm, pgd_t *pgd)
43 if (PGD_SIZE == PAGE_SIZE) 45 if (PGD_SIZE == PAGE_SIZE)
44 free_page((unsigned long)pgd); 46 free_page((unsigned long)pgd);
45 else 47 else
46 kfree(pgd); 48 kmem_cache_free(pgd_cache, pgd);
49}
50
51static int __init pgd_cache_init(void)
52{
53 /*
54 * Naturally aligned pgds required by the architecture.
55 */
56 if (PGD_SIZE != PAGE_SIZE)
57 pgd_cache = kmem_cache_create("pgd_cache", PGD_SIZE, PGD_SIZE,
58 SLAB_PANIC, NULL);
59 return 0;
47} 60}
61core_initcall(pgd_cache_init);
diff --git a/arch/arm64/net/bpf_jit.h b/arch/arm64/net/bpf_jit.h
index 2134f7e6c288..de0a81a539a0 100644
--- a/arch/arm64/net/bpf_jit.h
+++ b/arch/arm64/net/bpf_jit.h
@@ -144,8 +144,12 @@
144 144
145/* Data-processing (2 source) */ 145/* Data-processing (2 source) */
146/* Rd = Rn OP Rm */ 146/* Rd = Rn OP Rm */
147#define A64_UDIV(sf, Rd, Rn, Rm) aarch64_insn_gen_data2(Rd, Rn, Rm, \ 147#define A64_DATA2(sf, Rd, Rn, Rm, type) aarch64_insn_gen_data2(Rd, Rn, Rm, \
148 A64_VARIANT(sf), AARCH64_INSN_DATA2_UDIV) 148 A64_VARIANT(sf), AARCH64_INSN_DATA2_##type)
149#define A64_UDIV(sf, Rd, Rn, Rm) A64_DATA2(sf, Rd, Rn, Rm, UDIV)
150#define A64_LSLV(sf, Rd, Rn, Rm) A64_DATA2(sf, Rd, Rn, Rm, LSLV)
151#define A64_LSRV(sf, Rd, Rn, Rm) A64_DATA2(sf, Rd, Rn, Rm, LSRV)
152#define A64_ASRV(sf, Rd, Rn, Rm) A64_DATA2(sf, Rd, Rn, Rm, ASRV)
149 153
150/* Data-processing (3 source) */ 154/* Data-processing (3 source) */
151/* Rd = Ra + Rn * Rm */ 155/* Rd = Ra + Rn * Rm */
diff --git a/arch/arm64/net/bpf_jit_comp.c b/arch/arm64/net/bpf_jit_comp.c
index 7ae33545535b..41f1e3e2ea24 100644
--- a/arch/arm64/net/bpf_jit_comp.c
+++ b/arch/arm64/net/bpf_jit_comp.c
@@ -19,12 +19,13 @@
19#define pr_fmt(fmt) "bpf_jit: " fmt 19#define pr_fmt(fmt) "bpf_jit: " fmt
20 20
21#include <linux/filter.h> 21#include <linux/filter.h>
22#include <linux/moduleloader.h>
23#include <linux/printk.h> 22#include <linux/printk.h>
24#include <linux/skbuff.h> 23#include <linux/skbuff.h>
25#include <linux/slab.h> 24#include <linux/slab.h>
25
26#include <asm/byteorder.h> 26#include <asm/byteorder.h>
27#include <asm/cacheflush.h> 27#include <asm/cacheflush.h>
28#include <asm/debug-monitors.h>
28 29
29#include "bpf_jit.h" 30#include "bpf_jit.h"
30 31
@@ -119,6 +120,14 @@ static inline int bpf2a64_offset(int bpf_to, int bpf_from,
119 return to - from; 120 return to - from;
120} 121}
121 122
123static void jit_fill_hole(void *area, unsigned int size)
124{
125 u32 *ptr;
126 /* We are guaranteed to have aligned memory. */
127 for (ptr = area; size >= sizeof(u32); size -= sizeof(u32))
128 *ptr++ = cpu_to_le32(AARCH64_BREAK_FAULT);
129}
130
122static inline int epilogue_offset(const struct jit_ctx *ctx) 131static inline int epilogue_offset(const struct jit_ctx *ctx)
123{ 132{
124 int to = ctx->offset[ctx->prog->len - 1]; 133 int to = ctx->offset[ctx->prog->len - 1];
@@ -196,6 +205,12 @@ static void build_epilogue(struct jit_ctx *ctx)
196 emit(A64_RET(A64_LR), ctx); 205 emit(A64_RET(A64_LR), ctx);
197} 206}
198 207
208/* JITs an eBPF instruction.
209 * Returns:
210 * 0 - successfully JITed an 8-byte eBPF instruction.
211 * >0 - successfully JITed a 16-byte eBPF instruction.
212 * <0 - failed to JIT.
213 */
199static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx) 214static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
200{ 215{
201 const u8 code = insn->code; 216 const u8 code = insn->code;
@@ -252,6 +267,18 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
252 emit(A64_MUL(is64, tmp, tmp, src), ctx); 267 emit(A64_MUL(is64, tmp, tmp, src), ctx);
253 emit(A64_SUB(is64, dst, dst, tmp), ctx); 268 emit(A64_SUB(is64, dst, dst, tmp), ctx);
254 break; 269 break;
270 case BPF_ALU | BPF_LSH | BPF_X:
271 case BPF_ALU64 | BPF_LSH | BPF_X:
272 emit(A64_LSLV(is64, dst, dst, src), ctx);
273 break;
274 case BPF_ALU | BPF_RSH | BPF_X:
275 case BPF_ALU64 | BPF_RSH | BPF_X:
276 emit(A64_LSRV(is64, dst, dst, src), ctx);
277 break;
278 case BPF_ALU | BPF_ARSH | BPF_X:
279 case BPF_ALU64 | BPF_ARSH | BPF_X:
280 emit(A64_ASRV(is64, dst, dst, src), ctx);
281 break;
255 /* dst = -dst */ 282 /* dst = -dst */
256 case BPF_ALU | BPF_NEG: 283 case BPF_ALU | BPF_NEG:
257 case BPF_ALU64 | BPF_NEG: 284 case BPF_ALU64 | BPF_NEG:
@@ -443,6 +470,27 @@ emit_cond_jmp:
443 emit(A64_B(jmp_offset), ctx); 470 emit(A64_B(jmp_offset), ctx);
444 break; 471 break;
445 472
473 /* dst = imm64 */
474 case BPF_LD | BPF_IMM | BPF_DW:
475 {
476 const struct bpf_insn insn1 = insn[1];
477 u64 imm64;
478
479 if (insn1.code != 0 || insn1.src_reg != 0 ||
480 insn1.dst_reg != 0 || insn1.off != 0) {
481 /* Note: verifier in BPF core must catch invalid
482 * instructions.
483 */
484 pr_err_once("Invalid BPF_LD_IMM64 instruction\n");
485 return -EINVAL;
486 }
487
488 imm64 = (u64)insn1.imm << 32 | imm;
489 emit_a64_mov_i64(dst, imm64, ctx);
490
491 return 1;
492 }
493
446 /* LDX: dst = *(size *)(src + off) */ 494 /* LDX: dst = *(size *)(src + off) */
447 case BPF_LDX | BPF_MEM | BPF_W: 495 case BPF_LDX | BPF_MEM | BPF_W:
448 case BPF_LDX | BPF_MEM | BPF_H: 496 case BPF_LDX | BPF_MEM | BPF_H:
@@ -594,6 +642,10 @@ static int build_body(struct jit_ctx *ctx)
594 ctx->offset[i] = ctx->idx; 642 ctx->offset[i] = ctx->idx;
595 643
596 ret = build_insn(insn, ctx); 644 ret = build_insn(insn, ctx);
645 if (ret > 0) {
646 i++;
647 continue;
648 }
597 if (ret) 649 if (ret)
598 return ret; 650 return ret;
599 } 651 }
@@ -613,8 +665,10 @@ void bpf_jit_compile(struct bpf_prog *prog)
613 665
614void bpf_int_jit_compile(struct bpf_prog *prog) 666void bpf_int_jit_compile(struct bpf_prog *prog)
615{ 667{
668 struct bpf_binary_header *header;
616 struct jit_ctx ctx; 669 struct jit_ctx ctx;
617 int image_size; 670 int image_size;
671 u8 *image_ptr;
618 672
619 if (!bpf_jit_enable) 673 if (!bpf_jit_enable)
620 return; 674 return;
@@ -636,23 +690,25 @@ void bpf_int_jit_compile(struct bpf_prog *prog)
636 goto out; 690 goto out;
637 691
638 build_prologue(&ctx); 692 build_prologue(&ctx);
639
640 build_epilogue(&ctx); 693 build_epilogue(&ctx);
641 694
642 /* Now we know the actual image size. */ 695 /* Now we know the actual image size. */
643 image_size = sizeof(u32) * ctx.idx; 696 image_size = sizeof(u32) * ctx.idx;
644 ctx.image = module_alloc(image_size); 697 header = bpf_jit_binary_alloc(image_size, &image_ptr,
645 if (unlikely(ctx.image == NULL)) 698 sizeof(u32), jit_fill_hole);
699 if (header == NULL)
646 goto out; 700 goto out;
647 701
648 /* 2. Now, the actual pass. */ 702 /* 2. Now, the actual pass. */
649 703
704 ctx.image = (u32 *)image_ptr;
650 ctx.idx = 0; 705 ctx.idx = 0;
706
651 build_prologue(&ctx); 707 build_prologue(&ctx);
652 708
653 ctx.body_offset = ctx.idx; 709 ctx.body_offset = ctx.idx;
654 if (build_body(&ctx)) { 710 if (build_body(&ctx)) {
655 module_free(NULL, ctx.image); 711 bpf_jit_binary_free(header);
656 goto out; 712 goto out;
657 } 713 }
658 714
@@ -663,17 +719,25 @@ void bpf_int_jit_compile(struct bpf_prog *prog)
663 bpf_jit_dump(prog->len, image_size, 2, ctx.image); 719 bpf_jit_dump(prog->len, image_size, 2, ctx.image);
664 720
665 bpf_flush_icache(ctx.image, ctx.image + ctx.idx); 721 bpf_flush_icache(ctx.image, ctx.image + ctx.idx);
666 prog->bpf_func = (void *)ctx.image;
667 prog->jited = 1;
668 722
723 set_memory_ro((unsigned long)header, header->pages);
724 prog->bpf_func = (void *)ctx.image;
725 prog->jited = true;
669out: 726out:
670 kfree(ctx.offset); 727 kfree(ctx.offset);
671} 728}
672 729
673void bpf_jit_free(struct bpf_prog *prog) 730void bpf_jit_free(struct bpf_prog *prog)
674{ 731{
675 if (prog->jited) 732 unsigned long addr = (unsigned long)prog->bpf_func & PAGE_MASK;
676 module_free(NULL, prog->bpf_func); 733 struct bpf_binary_header *header = (void *)addr;
734
735 if (!prog->jited)
736 goto free_filter;
737
738 set_memory_rw(addr, header->pages);
739 bpf_jit_binary_free(header);
677 740
678 kfree(prog); 741free_filter:
742 bpf_prog_unlock_free(prog);
679} 743}
diff --git a/arch/ia64/kernel/efi.c b/arch/ia64/kernel/efi.c
index 741b99c1a0b1..c52d7540dc05 100644
--- a/arch/ia64/kernel/efi.c
+++ b/arch/ia64/kernel/efi.c
@@ -568,6 +568,7 @@ efi_init (void)
568 { 568 {
569 const char *unit; 569 const char *unit;
570 unsigned long size; 570 unsigned long size;
571 char buf[64];
571 572
572 md = p; 573 md = p;
573 size = md->num_pages << EFI_PAGE_SHIFT; 574 size = md->num_pages << EFI_PAGE_SHIFT;
@@ -586,9 +587,10 @@ efi_init (void)
586 unit = "KB"; 587 unit = "KB";
587 } 588 }
588 589
589 printk("mem%02d: type=%2u, attr=0x%016lx, " 590 printk("mem%02d: %s "
590 "range=[0x%016lx-0x%016lx) (%4lu%s)\n", 591 "range=[0x%016lx-0x%016lx) (%4lu%s)\n",
591 i, md->type, md->attribute, md->phys_addr, 592 i, efi_md_typeattr_format(buf, sizeof(buf), md),
593 md->phys_addr,
592 md->phys_addr + efi_md_size(md), size, unit); 594 md->phys_addr + efi_md_size(md), size, unit);
593 } 595 }
594 } 596 }
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index 4ef7a54813e6..75e75d7b1702 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -4,7 +4,7 @@
4#include <uapi/asm/unistd.h> 4#include <uapi/asm/unistd.h>
5 5
6 6
7#define NR_syscalls 354 7#define NR_syscalls 355
8 8
9#define __ARCH_WANT_OLD_READDIR 9#define __ARCH_WANT_OLD_READDIR
10#define __ARCH_WANT_OLD_STAT 10#define __ARCH_WANT_OLD_STAT
diff --git a/arch/m68k/include/uapi/asm/unistd.h b/arch/m68k/include/uapi/asm/unistd.h
index b419c6b7ac37..2c1bec9a14b6 100644
--- a/arch/m68k/include/uapi/asm/unistd.h
+++ b/arch/m68k/include/uapi/asm/unistd.h
@@ -359,5 +359,6 @@
359#define __NR_renameat2 351 359#define __NR_renameat2 351
360#define __NR_getrandom 352 360#define __NR_getrandom 352
361#define __NR_memfd_create 353 361#define __NR_memfd_create 353
362#define __NR_bpf 354
362 363
363#endif /* _UAPI_ASM_M68K_UNISTD_H_ */ 364#endif /* _UAPI_ASM_M68K_UNISTD_H_ */
diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S
index 05b46c2b08b8..2ca219e184cd 100644
--- a/arch/m68k/kernel/syscalltable.S
+++ b/arch/m68k/kernel/syscalltable.S
@@ -374,4 +374,5 @@ ENTRY(sys_call_table)
374 .long sys_renameat2 374 .long sys_renameat2
375 .long sys_getrandom 375 .long sys_getrandom
376 .long sys_memfd_create 376 .long sys_memfd_create
377 .long sys_bpf
377 378
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index 6feded3b0c4c..a7736fa0580c 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -129,6 +129,10 @@ endmenu
129 129
130menu "Kernel features" 130menu "Kernel features"
131 131
132config NR_CPUS
133 int
134 default "1"
135
132config ADVANCED_OPTIONS 136config ADVANCED_OPTIONS
133 bool "Prompt for advanced kernel configuration options" 137 bool "Prompt for advanced kernel configuration options"
134 help 138 help
diff --git a/arch/microblaze/include/asm/unistd.h b/arch/microblaze/include/asm/unistd.h
index ea4b233647c1..0a53362d5548 100644
--- a/arch/microblaze/include/asm/unistd.h
+++ b/arch/microblaze/include/asm/unistd.h
@@ -38,6 +38,6 @@
38 38
39#endif /* __ASSEMBLY__ */ 39#endif /* __ASSEMBLY__ */
40 40
41#define __NR_syscalls 387 41#define __NR_syscalls 388
42 42
43#endif /* _ASM_MICROBLAZE_UNISTD_H */ 43#endif /* _ASM_MICROBLAZE_UNISTD_H */
diff --git a/arch/microblaze/include/uapi/asm/unistd.h b/arch/microblaze/include/uapi/asm/unistd.h
index 1c2380bf8fe6..c712677f8a2a 100644
--- a/arch/microblaze/include/uapi/asm/unistd.h
+++ b/arch/microblaze/include/uapi/asm/unistd.h
@@ -402,5 +402,6 @@
402#define __NR_seccomp 384 402#define __NR_seccomp 384
403#define __NR_getrandom 385 403#define __NR_getrandom 385
404#define __NR_memfd_create 386 404#define __NR_memfd_create 386
405#define __NR_bpf 387
405 406
406#endif /* _UAPI_ASM_MICROBLAZE_UNISTD_H */ 407#endif /* _UAPI_ASM_MICROBLAZE_UNISTD_H */
diff --git a/arch/microblaze/kernel/syscall_table.S b/arch/microblaze/kernel/syscall_table.S
index de59ee1d7010..0166e890486c 100644
--- a/arch/microblaze/kernel/syscall_table.S
+++ b/arch/microblaze/kernel/syscall_table.S
@@ -387,3 +387,4 @@ ENTRY(sys_call_table)
387 .long sys_seccomp 387 .long sys_seccomp
388 .long sys_getrandom /* 385 */ 388 .long sys_getrandom /* 385 */
389 .long sys_memfd_create 389 .long sys_memfd_create
390 .long sys_bpf
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index 9037914f6985..b30e41c0c033 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
@@ -660,8 +660,13 @@ void pci_process_bridge_OF_ranges(struct pci_controller *hose,
660 res = &hose->mem_resources[memno++]; 660 res = &hose->mem_resources[memno++];
661 break; 661 break;
662 } 662 }
663 if (res != NULL) 663 if (res != NULL) {
664 of_pci_range_to_resource(&range, dev, res); 664 res->name = dev->full_name;
665 res->flags = range.flags;
666 res->start = range.cpu_addr;
667 res->end = range.cpu_addr + range.size - 1;
668 res->parent = res->child = res->sibling = NULL;
669 }
665 } 670 }
666 671
667 /* If there's an ISA hole and the pci_mem_offset is -not- matching 672 /* If there's an ISA hole and the pci_mem_offset is -not- matching
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index ad6badb6be71..f43aa536c517 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -2066,6 +2066,7 @@ config MIPS_CPS
2066 support is unavailable. 2066 support is unavailable.
2067 2067
2068config MIPS_CPS_PM 2068config MIPS_CPS_PM
2069 depends on MIPS_CPS
2069 select MIPS_CPC 2070 select MIPS_CPC
2070 bool 2071 bool
2071 2072
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 23cb94806fbc..58076472bdd8 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -93,6 +93,15 @@ LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
93KBUILD_AFLAGS_MODULE += -mlong-calls 93KBUILD_AFLAGS_MODULE += -mlong-calls
94KBUILD_CFLAGS_MODULE += -mlong-calls 94KBUILD_CFLAGS_MODULE += -mlong-calls
95 95
96#
97# pass -msoft-float to GAS if it supports it. However on newer binutils
98# (specifically newer than 2.24.51.20140728) we then also need to explicitly
99# set ".set hardfloat" in all files which manipulate floating point registers.
100#
101ifneq ($(call as-option,-Wa$(comma)-msoft-float,),)
102 cflags-y += -DGAS_HAS_SET_HARDFLOAT -Wa,-msoft-float
103endif
104
96cflags-y += -ffreestanding 105cflags-y += -ffreestanding
97 106
98# 107#
diff --git a/arch/mips/ath79/mach-db120.c b/arch/mips/ath79/mach-db120.c
index 4d661a1d2dae..9423f5aed287 100644
--- a/arch/mips/ath79/mach-db120.c
+++ b/arch/mips/ath79/mach-db120.c
@@ -113,7 +113,7 @@ static void __init db120_pci_init(u8 *eeprom)
113 ath79_register_pci(); 113 ath79_register_pci();
114} 114}
115#else 115#else
116static inline void db120_pci_init(void) {} 116static inline void db120_pci_init(u8 *eeprom) {}
117#endif /* CONFIG_PCI */ 117#endif /* CONFIG_PCI */
118 118
119static void __init db120_setup(void) 119static void __init db120_setup(void)
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c
index 741734049675..2bc4aa95944e 100644
--- a/arch/mips/cavium-octeon/octeon-irq.c
+++ b/arch/mips/cavium-octeon/octeon-irq.c
@@ -809,6 +809,7 @@ static struct irq_chip octeon_irq_chip_ciu_gpio_v2 = {
809 .irq_set_type = octeon_irq_ciu_gpio_set_type, 809 .irq_set_type = octeon_irq_ciu_gpio_set_type,
810#ifdef CONFIG_SMP 810#ifdef CONFIG_SMP
811 .irq_set_affinity = octeon_irq_ciu_set_affinity_v2, 811 .irq_set_affinity = octeon_irq_ciu_set_affinity_v2,
812 .irq_cpu_offline = octeon_irq_cpu_offline_ciu,
812#endif 813#endif
813 .flags = IRQCHIP_SET_TYPE_MASKED, 814 .flags = IRQCHIP_SET_TYPE_MASKED,
814}; 815};
@@ -823,6 +824,7 @@ static struct irq_chip octeon_irq_chip_ciu_gpio = {
823 .irq_set_type = octeon_irq_ciu_gpio_set_type, 824 .irq_set_type = octeon_irq_ciu_gpio_set_type,
824#ifdef CONFIG_SMP 825#ifdef CONFIG_SMP
825 .irq_set_affinity = octeon_irq_ciu_set_affinity, 826 .irq_set_affinity = octeon_irq_ciu_set_affinity,
827 .irq_cpu_offline = octeon_irq_cpu_offline_ciu,
826#endif 828#endif
827 .flags = IRQCHIP_SET_TYPE_MASKED, 829 .flags = IRQCHIP_SET_TYPE_MASKED,
828}; 830};
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 38f4c32e2816..5ebdb32d9a2b 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -806,15 +806,6 @@ void __init prom_init(void)
806#endif 806#endif
807 } 807 }
808 808
809 if (octeon_is_simulation()) {
810 /*
811 * The simulator uses a mtdram device pre filled with
812 * the filesystem. Also specify the calibration delay
813 * to avoid calculating it every time.
814 */
815 strcat(arcs_cmdline, " rw root=1f00 slram=root,0x40000000,+1073741824");
816 }
817
818 mips_hpt_frequency = octeon_get_clock_rate(); 809 mips_hpt_frequency = octeon_get_clock_rate();
819 810
820 octeon_init_cvmcount(); 811 octeon_init_cvmcount();
diff --git a/arch/mips/include/asm/asmmacro-32.h b/arch/mips/include/asm/asmmacro-32.h
index e38c2811d4e2..cdac7b3eeaf7 100644
--- a/arch/mips/include/asm/asmmacro-32.h
+++ b/arch/mips/include/asm/asmmacro-32.h
@@ -13,6 +13,8 @@
13#include <asm/mipsregs.h> 13#include <asm/mipsregs.h>
14 14
15 .macro fpu_save_single thread tmp=t0 15 .macro fpu_save_single thread tmp=t0
16 .set push
17 SET_HARDFLOAT
16 cfc1 \tmp, fcr31 18 cfc1 \tmp, fcr31
17 swc1 $f0, THREAD_FPR0_LS64(\thread) 19 swc1 $f0, THREAD_FPR0_LS64(\thread)
18 swc1 $f1, THREAD_FPR1_LS64(\thread) 20 swc1 $f1, THREAD_FPR1_LS64(\thread)
@@ -47,9 +49,12 @@
47 swc1 $f30, THREAD_FPR30_LS64(\thread) 49 swc1 $f30, THREAD_FPR30_LS64(\thread)
48 swc1 $f31, THREAD_FPR31_LS64(\thread) 50 swc1 $f31, THREAD_FPR31_LS64(\thread)
49 sw \tmp, THREAD_FCR31(\thread) 51 sw \tmp, THREAD_FCR31(\thread)
52 .set pop
50 .endm 53 .endm
51 54
52 .macro fpu_restore_single thread tmp=t0 55 .macro fpu_restore_single thread tmp=t0
56 .set push
57 SET_HARDFLOAT
53 lw \tmp, THREAD_FCR31(\thread) 58 lw \tmp, THREAD_FCR31(\thread)
54 lwc1 $f0, THREAD_FPR0_LS64(\thread) 59 lwc1 $f0, THREAD_FPR0_LS64(\thread)
55 lwc1 $f1, THREAD_FPR1_LS64(\thread) 60 lwc1 $f1, THREAD_FPR1_LS64(\thread)
@@ -84,6 +89,7 @@
84 lwc1 $f30, THREAD_FPR30_LS64(\thread) 89 lwc1 $f30, THREAD_FPR30_LS64(\thread)
85 lwc1 $f31, THREAD_FPR31_LS64(\thread) 90 lwc1 $f31, THREAD_FPR31_LS64(\thread)
86 ctc1 \tmp, fcr31 91 ctc1 \tmp, fcr31
92 .set pop
87 .endm 93 .endm
88 94
89 .macro cpu_save_nonscratch thread 95 .macro cpu_save_nonscratch thread
diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index cd9a98bc8f60..6caf8766b80f 100644
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -57,6 +57,8 @@
57#endif /* CONFIG_CPU_MIPSR2 */ 57#endif /* CONFIG_CPU_MIPSR2 */
58 58
59 .macro fpu_save_16even thread tmp=t0 59 .macro fpu_save_16even thread tmp=t0
60 .set push
61 SET_HARDFLOAT
60 cfc1 \tmp, fcr31 62 cfc1 \tmp, fcr31
61 sdc1 $f0, THREAD_FPR0_LS64(\thread) 63 sdc1 $f0, THREAD_FPR0_LS64(\thread)
62 sdc1 $f2, THREAD_FPR2_LS64(\thread) 64 sdc1 $f2, THREAD_FPR2_LS64(\thread)
@@ -75,11 +77,13 @@
75 sdc1 $f28, THREAD_FPR28_LS64(\thread) 77 sdc1 $f28, THREAD_FPR28_LS64(\thread)
76 sdc1 $f30, THREAD_FPR30_LS64(\thread) 78 sdc1 $f30, THREAD_FPR30_LS64(\thread)
77 sw \tmp, THREAD_FCR31(\thread) 79 sw \tmp, THREAD_FCR31(\thread)
80 .set pop
78 .endm 81 .endm
79 82
80 .macro fpu_save_16odd thread 83 .macro fpu_save_16odd thread
81 .set push 84 .set push
82 .set mips64r2 85 .set mips64r2
86 SET_HARDFLOAT
83 sdc1 $f1, THREAD_FPR1_LS64(\thread) 87 sdc1 $f1, THREAD_FPR1_LS64(\thread)
84 sdc1 $f3, THREAD_FPR3_LS64(\thread) 88 sdc1 $f3, THREAD_FPR3_LS64(\thread)
85 sdc1 $f5, THREAD_FPR5_LS64(\thread) 89 sdc1 $f5, THREAD_FPR5_LS64(\thread)
@@ -110,6 +114,8 @@
110 .endm 114 .endm
111 115
112 .macro fpu_restore_16even thread tmp=t0 116 .macro fpu_restore_16even thread tmp=t0
117 .set push
118 SET_HARDFLOAT
113 lw \tmp, THREAD_FCR31(\thread) 119 lw \tmp, THREAD_FCR31(\thread)
114 ldc1 $f0, THREAD_FPR0_LS64(\thread) 120 ldc1 $f0, THREAD_FPR0_LS64(\thread)
115 ldc1 $f2, THREAD_FPR2_LS64(\thread) 121 ldc1 $f2, THREAD_FPR2_LS64(\thread)
@@ -133,6 +139,7 @@
133 .macro fpu_restore_16odd thread 139 .macro fpu_restore_16odd thread
134 .set push 140 .set push
135 .set mips64r2 141 .set mips64r2
142 SET_HARDFLOAT
136 ldc1 $f1, THREAD_FPR1_LS64(\thread) 143 ldc1 $f1, THREAD_FPR1_LS64(\thread)
137 ldc1 $f3, THREAD_FPR3_LS64(\thread) 144 ldc1 $f3, THREAD_FPR3_LS64(\thread)
138 ldc1 $f5, THREAD_FPR5_LS64(\thread) 145 ldc1 $f5, THREAD_FPR5_LS64(\thread)
@@ -277,6 +284,7 @@
277 .macro cfcmsa rd, cs 284 .macro cfcmsa rd, cs
278 .set push 285 .set push
279 .set noat 286 .set noat
287 SET_HARDFLOAT
280 .insn 288 .insn
281 .word CFC_MSA_INSN | (\cs << 11) 289 .word CFC_MSA_INSN | (\cs << 11)
282 move \rd, $1 290 move \rd, $1
@@ -286,6 +294,7 @@
286 .macro ctcmsa cd, rs 294 .macro ctcmsa cd, rs
287 .set push 295 .set push
288 .set noat 296 .set noat
297 SET_HARDFLOAT
289 move $1, \rs 298 move $1, \rs
290 .word CTC_MSA_INSN | (\cd << 6) 299 .word CTC_MSA_INSN | (\cd << 6)
291 .set pop 300 .set pop
@@ -294,6 +303,7 @@
294 .macro ld_d wd, off, base 303 .macro ld_d wd, off, base
295 .set push 304 .set push
296 .set noat 305 .set noat
306 SET_HARDFLOAT
297 add $1, \base, \off 307 add $1, \base, \off
298 .word LDD_MSA_INSN | (\wd << 6) 308 .word LDD_MSA_INSN | (\wd << 6)
299 .set pop 309 .set pop
@@ -302,6 +312,7 @@
302 .macro st_d wd, off, base 312 .macro st_d wd, off, base
303 .set push 313 .set push
304 .set noat 314 .set noat
315 SET_HARDFLOAT
305 add $1, \base, \off 316 add $1, \base, \off
306 .word STD_MSA_INSN | (\wd << 6) 317 .word STD_MSA_INSN | (\wd << 6)
307 .set pop 318 .set pop
@@ -310,6 +321,7 @@
310 .macro copy_u_w rd, ws, n 321 .macro copy_u_w rd, ws, n
311 .set push 322 .set push
312 .set noat 323 .set noat
324 SET_HARDFLOAT
313 .insn 325 .insn
314 .word COPY_UW_MSA_INSN | (\n << 16) | (\ws << 11) 326 .word COPY_UW_MSA_INSN | (\n << 16) | (\ws << 11)
315 /* move triggers an assembler bug... */ 327 /* move triggers an assembler bug... */
@@ -320,6 +332,7 @@
320 .macro copy_u_d rd, ws, n 332 .macro copy_u_d rd, ws, n
321 .set push 333 .set push
322 .set noat 334 .set noat
335 SET_HARDFLOAT
323 .insn 336 .insn
324 .word COPY_UD_MSA_INSN | (\n << 16) | (\ws << 11) 337 .word COPY_UD_MSA_INSN | (\n << 16) | (\ws << 11)
325 /* move triggers an assembler bug... */ 338 /* move triggers an assembler bug... */
@@ -330,6 +343,7 @@
330 .macro insert_w wd, n, rs 343 .macro insert_w wd, n, rs
331 .set push 344 .set push
332 .set noat 345 .set noat
346 SET_HARDFLOAT
333 /* move triggers an assembler bug... */ 347 /* move triggers an assembler bug... */
334 or $1, \rs, zero 348 or $1, \rs, zero
335 .word INSERT_W_MSA_INSN | (\n << 16) | (\wd << 6) 349 .word INSERT_W_MSA_INSN | (\n << 16) | (\wd << 6)
@@ -339,6 +353,7 @@
339 .macro insert_d wd, n, rs 353 .macro insert_d wd, n, rs
340 .set push 354 .set push
341 .set noat 355 .set noat
356 SET_HARDFLOAT
342 /* move triggers an assembler bug... */ 357 /* move triggers an assembler bug... */
343 or $1, \rs, zero 358 or $1, \rs, zero
344 .word INSERT_D_MSA_INSN | (\n << 16) | (\wd << 6) 359 .word INSERT_D_MSA_INSN | (\n << 16) | (\wd << 6)
@@ -381,6 +396,7 @@
381 st_d 31, THREAD_FPR31, \thread 396 st_d 31, THREAD_FPR31, \thread
382 .set push 397 .set push
383 .set noat 398 .set noat
399 SET_HARDFLOAT
384 cfcmsa $1, MSA_CSR 400 cfcmsa $1, MSA_CSR
385 sw $1, THREAD_MSA_CSR(\thread) 401 sw $1, THREAD_MSA_CSR(\thread)
386 .set pop 402 .set pop
@@ -389,6 +405,7 @@
389 .macro msa_restore_all thread 405 .macro msa_restore_all thread
390 .set push 406 .set push
391 .set noat 407 .set noat
408 SET_HARDFLOAT
392 lw $1, THREAD_MSA_CSR(\thread) 409 lw $1, THREAD_MSA_CSR(\thread)
393 ctcmsa MSA_CSR, $1 410 ctcmsa MSA_CSR, $1
394 .set pop 411 .set pop
@@ -441,6 +458,7 @@
441 .macro msa_init_all_upper 458 .macro msa_init_all_upper
442 .set push 459 .set push
443 .set noat 460 .set noat
461 SET_HARDFLOAT
444 not $1, zero 462 not $1, zero
445 msa_init_upper 0 463 msa_init_upper 0
446 .set pop 464 .set pop
diff --git a/arch/mips/include/asm/cop2.h b/arch/mips/include/asm/cop2.h
index 51f80bd36fcc..63b3468ede4c 100644
--- a/arch/mips/include/asm/cop2.h
+++ b/arch/mips/include/asm/cop2.h
@@ -37,15 +37,15 @@ extern void nlm_cop2_restore(struct nlm_cop2_state *);
37 37
38#define cop2_present 1 38#define cop2_present 1
39#define cop2_lazy_restore 1 39#define cop2_lazy_restore 1
40#define cop2_save(r) do { (r); } while (0) 40#define cop2_save(r) do { (void)(r); } while (0)
41#define cop2_restore(r) do { (r); } while (0) 41#define cop2_restore(r) do { (void)(r); } while (0)
42 42
43#else 43#else
44 44
45#define cop2_present 0 45#define cop2_present 0
46#define cop2_lazy_restore 0 46#define cop2_lazy_restore 0
47#define cop2_save(r) do { (r); } while (0) 47#define cop2_save(r) do { (void)(r); } while (0)
48#define cop2_restore(r) do { (r); } while (0) 48#define cop2_restore(r) do { (void)(r); } while (0)
49#endif 49#endif
50 50
51enum cu2_ops { 51enum cu2_ops {
diff --git a/arch/mips/include/asm/fpregdef.h b/arch/mips/include/asm/fpregdef.h
index 429481f9028d..f184ba088532 100644
--- a/arch/mips/include/asm/fpregdef.h
+++ b/arch/mips/include/asm/fpregdef.h
@@ -14,6 +14,20 @@
14 14
15#include <asm/sgidefs.h> 15#include <asm/sgidefs.h>
16 16
17/*
18 * starting with binutils 2.24.51.20140729, MIPS binutils warn about mixing
19 * hardfloat and softfloat object files. The kernel build uses soft-float by
20 * default, so we also need to pass -msoft-float along to GAS if it supports it.
21 * But this in turn causes assembler errors in files which access hardfloat
22 * registers. We detect if GAS supports "-msoft-float" in the Makefile and
23 * explicitly put ".set hardfloat" where floating point registers are touched.
24 */
25#ifdef GAS_HAS_SET_HARDFLOAT
26#define SET_HARDFLOAT .set hardfloat
27#else
28#define SET_HARDFLOAT
29#endif
30
17#if _MIPS_SIM == _MIPS_SIM_ABI32 31#if _MIPS_SIM == _MIPS_SIM_ABI32
18 32
19/* 33/*
diff --git a/arch/mips/include/asm/fpu.h b/arch/mips/include/asm/fpu.h
index 4d0aeda68397..dd562414cd5e 100644
--- a/arch/mips/include/asm/fpu.h
+++ b/arch/mips/include/asm/fpu.h
@@ -145,8 +145,8 @@ static inline void lose_fpu(int save)
145 if (is_msa_enabled()) { 145 if (is_msa_enabled()) {
146 if (save) { 146 if (save) {
147 save_msa(current); 147 save_msa(current);
148 asm volatile("cfc1 %0, $31" 148 current->thread.fpu.fcr31 =
149 : "=r"(current->thread.fpu.fcr31)); 149 read_32bit_cp1_register(CP1_STATUS);
150 } 150 }
151 disable_msa(); 151 disable_msa();
152 clear_thread_flag(TIF_USEDMSA); 152 clear_thread_flag(TIF_USEDMSA);
diff --git a/arch/mips/include/asm/ftrace.h b/arch/mips/include/asm/ftrace.h
index 992aaba603b5..b463f2aa5a61 100644
--- a/arch/mips/include/asm/ftrace.h
+++ b/arch/mips/include/asm/ftrace.h
@@ -24,7 +24,7 @@ do { \
24 asm volatile ( \ 24 asm volatile ( \
25 "1: " load " %[tmp_dst], 0(%[tmp_src])\n" \ 25 "1: " load " %[tmp_dst], 0(%[tmp_src])\n" \
26 " li %[tmp_err], 0\n" \ 26 " li %[tmp_err], 0\n" \
27 "2:\n" \ 27 "2: .insn\n" \
28 \ 28 \
29 ".section .fixup, \"ax\"\n" \ 29 ".section .fixup, \"ax\"\n" \
30 "3: li %[tmp_err], 1\n" \ 30 "3: li %[tmp_err], 1\n" \
@@ -46,7 +46,7 @@ do { \
46 asm volatile ( \ 46 asm volatile ( \
47 "1: " store " %[tmp_src], 0(%[tmp_dst])\n"\ 47 "1: " store " %[tmp_src], 0(%[tmp_dst])\n"\
48 " li %[tmp_err], 0\n" \ 48 " li %[tmp_err], 0\n" \
49 "2:\n" \ 49 "2: .insn\n" \
50 \ 50 \
51 ".section .fixup, \"ax\"\n" \ 51 ".section .fixup, \"ax\"\n" \
52 "3: li %[tmp_err], 1\n" \ 52 "3: li %[tmp_err], 1\n" \
diff --git a/arch/mips/include/asm/idle.h b/arch/mips/include/asm/idle.h
index d9f932de80e9..1c967abd545c 100644
--- a/arch/mips/include/asm/idle.h
+++ b/arch/mips/include/asm/idle.h
@@ -8,19 +8,12 @@ extern void (*cpu_wait)(void);
8extern void r4k_wait(void); 8extern void r4k_wait(void);
9extern asmlinkage void __r4k_wait(void); 9extern asmlinkage void __r4k_wait(void);
10extern void r4k_wait_irqoff(void); 10extern void r4k_wait_irqoff(void);
11extern void __pastwait(void);
12 11
13static inline int using_rollback_handler(void) 12static inline int using_rollback_handler(void)
14{ 13{
15 return cpu_wait == r4k_wait; 14 return cpu_wait == r4k_wait;
16} 15}
17 16
18static inline int address_is_in_r4k_wait_irqoff(unsigned long addr)
19{
20 return addr >= (unsigned long)r4k_wait_irqoff &&
21 addr < (unsigned long)__pastwait;
22}
23
24extern int mips_cpuidle_wait_enter(struct cpuidle_device *dev, 17extern int mips_cpuidle_wait_enter(struct cpuidle_device *dev,
25 struct cpuidle_driver *drv, int index); 18 struct cpuidle_driver *drv, int index);
26 19
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index cf3b580c3df6..b46cd220a018 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -1324,7 +1324,7 @@ do { \
1324/* 1324/*
1325 * Macros to access the floating point coprocessor control registers 1325 * Macros to access the floating point coprocessor control registers
1326 */ 1326 */
1327#define read_32bit_cp1_register(source) \ 1327#define _read_32bit_cp1_register(source, gas_hardfloat) \
1328({ \ 1328({ \
1329 int __res; \ 1329 int __res; \
1330 \ 1330 \
@@ -1334,12 +1334,21 @@ do { \
1334 " # gas fails to assemble cfc1 for some archs, \n" \ 1334 " # gas fails to assemble cfc1 for some archs, \n" \
1335 " # like Octeon. \n" \ 1335 " # like Octeon. \n" \
1336 " .set mips1 \n" \ 1336 " .set mips1 \n" \
1337 " "STR(gas_hardfloat)" \n" \
1337 " cfc1 %0,"STR(source)" \n" \ 1338 " cfc1 %0,"STR(source)" \n" \
1338 " .set pop \n" \ 1339 " .set pop \n" \
1339 : "=r" (__res)); \ 1340 : "=r" (__res)); \
1340 __res; \ 1341 __res; \
1341}) 1342})
1342 1343
1344#ifdef GAS_HAS_SET_HARDFLOAT
1345#define read_32bit_cp1_register(source) \
1346 _read_32bit_cp1_register(source, .set hardfloat)
1347#else
1348#define read_32bit_cp1_register(source) \
1349 _read_32bit_cp1_register(source, )
1350#endif
1351
1343#ifdef HAVE_AS_DSP 1352#ifdef HAVE_AS_DSP
1344#define rddsp(mask) \ 1353#define rddsp(mask) \
1345({ \ 1354({ \
diff --git a/arch/mips/include/uapi/asm/ptrace.h b/arch/mips/include/uapi/asm/ptrace.h
index bbcfb8ba8106..91a3d197ede3 100644
--- a/arch/mips/include/uapi/asm/ptrace.h
+++ b/arch/mips/include/uapi/asm/ptrace.h
@@ -9,6 +9,8 @@
9#ifndef _UAPI_ASM_PTRACE_H 9#ifndef _UAPI_ASM_PTRACE_H
10#define _UAPI_ASM_PTRACE_H 10#define _UAPI_ASM_PTRACE_H
11 11
12#include <linux/types.h>
13
12/* 0 - 31 are integer registers, 32 - 63 are fp registers. */ 14/* 0 - 31 are integer registers, 32 - 63 are fp registers. */
13#define FPR_BASE 32 15#define FPR_BASE 32
14#define PC 64 16#define PC 64
diff --git a/arch/mips/include/uapi/asm/unistd.h b/arch/mips/include/uapi/asm/unistd.h
index fdb4923777d1..9dc58568f230 100644
--- a/arch/mips/include/uapi/asm/unistd.h
+++ b/arch/mips/include/uapi/asm/unistd.h
@@ -375,16 +375,17 @@
375#define __NR_seccomp (__NR_Linux + 352) 375#define __NR_seccomp (__NR_Linux + 352)
376#define __NR_getrandom (__NR_Linux + 353) 376#define __NR_getrandom (__NR_Linux + 353)
377#define __NR_memfd_create (__NR_Linux + 354) 377#define __NR_memfd_create (__NR_Linux + 354)
378#define __NR_bpf (__NR_Linux + 355)
378 379
379/* 380/*
380 * Offset of the last Linux o32 flavoured syscall 381 * Offset of the last Linux o32 flavoured syscall
381 */ 382 */
382#define __NR_Linux_syscalls 354 383#define __NR_Linux_syscalls 355
383 384
384#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 385#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
385 386
386#define __NR_O32_Linux 4000 387#define __NR_O32_Linux 4000
387#define __NR_O32_Linux_syscalls 354 388#define __NR_O32_Linux_syscalls 355
388 389
389#if _MIPS_SIM == _MIPS_SIM_ABI64 390#if _MIPS_SIM == _MIPS_SIM_ABI64
390 391
@@ -707,16 +708,17 @@
707#define __NR_seccomp (__NR_Linux + 312) 708#define __NR_seccomp (__NR_Linux + 312)
708#define __NR_getrandom (__NR_Linux + 313) 709#define __NR_getrandom (__NR_Linux + 313)
709#define __NR_memfd_create (__NR_Linux + 314) 710#define __NR_memfd_create (__NR_Linux + 314)
711#define __NR_bpf (__NR_Linux + 315)
710 712
711/* 713/*
712 * Offset of the last Linux 64-bit flavoured syscall 714 * Offset of the last Linux 64-bit flavoured syscall
713 */ 715 */
714#define __NR_Linux_syscalls 314 716#define __NR_Linux_syscalls 315
715 717
716#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ 718#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
717 719
718#define __NR_64_Linux 5000 720#define __NR_64_Linux 5000
719#define __NR_64_Linux_syscalls 314 721#define __NR_64_Linux_syscalls 315
720 722
721#if _MIPS_SIM == _MIPS_SIM_NABI32 723#if _MIPS_SIM == _MIPS_SIM_NABI32
722 724
@@ -1043,15 +1045,16 @@
1043#define __NR_seccomp (__NR_Linux + 316) 1045#define __NR_seccomp (__NR_Linux + 316)
1044#define __NR_getrandom (__NR_Linux + 317) 1046#define __NR_getrandom (__NR_Linux + 317)
1045#define __NR_memfd_create (__NR_Linux + 318) 1047#define __NR_memfd_create (__NR_Linux + 318)
1048#define __NR_memfd_create (__NR_Linux + 319)
1046 1049
1047/* 1050/*
1048 * Offset of the last N32 flavoured syscall 1051 * Offset of the last N32 flavoured syscall
1049 */ 1052 */
1050#define __NR_Linux_syscalls 318 1053#define __NR_Linux_syscalls 319
1051 1054
1052#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ 1055#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
1053 1056
1054#define __NR_N32_Linux 6000 1057#define __NR_N32_Linux 6000
1055#define __NR_N32_Linux_syscalls 318 1058#define __NR_N32_Linux_syscalls 319
1056 1059
1057#endif /* _UAPI_ASM_UNISTD_H */ 1060#endif /* _UAPI_ASM_UNISTD_H */
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index 7b2df224f041..4d7d99d601cc 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -144,7 +144,7 @@ int __mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
144 case mm_bc1t_op: 144 case mm_bc1t_op:
145 preempt_disable(); 145 preempt_disable();
146 if (is_fpu_owner()) 146 if (is_fpu_owner())
147 asm volatile("cfc1\t%0,$31" : "=r" (fcr31)); 147 fcr31 = read_32bit_cp1_register(CP1_STATUS);
148 else 148 else
149 fcr31 = current->thread.fpu.fcr31; 149 fcr31 = current->thread.fpu.fcr31;
150 preempt_enable(); 150 preempt_enable();
@@ -562,11 +562,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
562 case cop1_op: 562 case cop1_op:
563 preempt_disable(); 563 preempt_disable();
564 if (is_fpu_owner()) 564 if (is_fpu_owner())
565 asm volatile( 565 fcr31 = read_32bit_cp1_register(CP1_STATUS);
566 ".set push\n"
567 "\t.set mips1\n"
568 "\tcfc1\t%0,$31\n"
569 "\t.set pop" : "=r" (fcr31));
570 else 566 else
571 fcr31 = current->thread.fpu.fcr31; 567 fcr31 = current->thread.fpu.fcr31;
572 preempt_enable(); 568 preempt_enable();
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index ac35e12cb1f3..a5e26dd90592 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -358,6 +358,7 @@ NESTED(nmi_handler, PT_SIZE, sp)
358 .set push 358 .set push
359 /* gas fails to assemble cfc1 for some archs (octeon).*/ \ 359 /* gas fails to assemble cfc1 for some archs (octeon).*/ \
360 .set mips1 360 .set mips1
361 SET_HARDFLOAT
361 cfc1 a1, fcr31 362 cfc1 a1, fcr31
362 li a2, ~(0x3f << 12) 363 li a2, ~(0x3f << 12)
363 and a2, a1 364 and a2, a1
diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c
index 09ce45980758..0b9082b6b683 100644
--- a/arch/mips/kernel/idle.c
+++ b/arch/mips/kernel/idle.c
@@ -68,9 +68,6 @@ void r4k_wait_irqoff(void)
68 " wait \n" 68 " wait \n"
69 " .set pop \n"); 69 " .set pop \n");
70 local_irq_enable(); 70 local_irq_enable();
71 __asm__(
72 " .globl __pastwait \n"
73 "__pastwait: \n");
74} 71}
75 72
76/* 73/*
diff --git a/arch/mips/kernel/r2300_fpu.S b/arch/mips/kernel/r2300_fpu.S
index f31063dbdaeb..5ce3b746cedc 100644
--- a/arch/mips/kernel/r2300_fpu.S
+++ b/arch/mips/kernel/r2300_fpu.S
@@ -28,6 +28,8 @@
28 .set mips1 28 .set mips1
29 /* Save floating point context */ 29 /* Save floating point context */
30LEAF(_save_fp_context) 30LEAF(_save_fp_context)
31 .set push
32 SET_HARDFLOAT
31 li v0, 0 # assume success 33 li v0, 0 # assume success
32 cfc1 t1,fcr31 34 cfc1 t1,fcr31
33 EX(swc1 $f0,(SC_FPREGS+0)(a0)) 35 EX(swc1 $f0,(SC_FPREGS+0)(a0))
@@ -65,6 +67,7 @@ LEAF(_save_fp_context)
65 EX(sw t1,(SC_FPC_CSR)(a0)) 67 EX(sw t1,(SC_FPC_CSR)(a0))
66 cfc1 t0,$0 # implementation/version 68 cfc1 t0,$0 # implementation/version
67 jr ra 69 jr ra
70 .set pop
68 .set nomacro 71 .set nomacro
69 EX(sw t0,(SC_FPC_EIR)(a0)) 72 EX(sw t0,(SC_FPC_EIR)(a0))
70 .set macro 73 .set macro
@@ -80,6 +83,8 @@ LEAF(_save_fp_context)
80 * stack frame which might have been changed by the user. 83 * stack frame which might have been changed by the user.
81 */ 84 */
82LEAF(_restore_fp_context) 85LEAF(_restore_fp_context)
86 .set push
87 SET_HARDFLOAT
83 li v0, 0 # assume success 88 li v0, 0 # assume success
84 EX(lw t0,(SC_FPC_CSR)(a0)) 89 EX(lw t0,(SC_FPC_CSR)(a0))
85 EX(lwc1 $f0,(SC_FPREGS+0)(a0)) 90 EX(lwc1 $f0,(SC_FPREGS+0)(a0))
@@ -116,6 +121,7 @@ LEAF(_restore_fp_context)
116 EX(lwc1 $f31,(SC_FPREGS+248)(a0)) 121 EX(lwc1 $f31,(SC_FPREGS+248)(a0))
117 jr ra 122 jr ra
118 ctc1 t0,fcr31 123 ctc1 t0,fcr31
124 .set pop
119 END(_restore_fp_context) 125 END(_restore_fp_context)
120 .set reorder 126 .set reorder
121 127
diff --git a/arch/mips/kernel/r2300_switch.S b/arch/mips/kernel/r2300_switch.S
index 20b7b040e76f..435ea652f5fa 100644
--- a/arch/mips/kernel/r2300_switch.S
+++ b/arch/mips/kernel/r2300_switch.S
@@ -120,6 +120,9 @@ LEAF(_restore_fp)
120 120
121#define FPU_DEFAULT 0x00000000 121#define FPU_DEFAULT 0x00000000
122 122
123 .set push
124 SET_HARDFLOAT
125
123LEAF(_init_fpu) 126LEAF(_init_fpu)
124 mfc0 t0, CP0_STATUS 127 mfc0 t0, CP0_STATUS
125 li t1, ST0_CU1 128 li t1, ST0_CU1
@@ -165,3 +168,5 @@ LEAF(_init_fpu)
165 mtc1 t0, $f31 168 mtc1 t0, $f31
166 jr ra 169 jr ra
167 END(_init_fpu) 170 END(_init_fpu)
171
172 .set pop
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index 8352523568e6..6c160c67984c 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -19,8 +19,12 @@
19#include <asm/asm-offsets.h> 19#include <asm/asm-offsets.h>
20#include <asm/regdef.h> 20#include <asm/regdef.h>
21 21
22/* preprocessor replaces the fp in ".set fp=64" with $30 otherwise */
23#undef fp
24
22 .macro EX insn, reg, src 25 .macro EX insn, reg, src
23 .set push 26 .set push
27 SET_HARDFLOAT
24 .set nomacro 28 .set nomacro
25.ex\@: \insn \reg, \src 29.ex\@: \insn \reg, \src
26 .set pop 30 .set pop
@@ -33,12 +37,17 @@
33 .set arch=r4000 37 .set arch=r4000
34 38
35LEAF(_save_fp_context) 39LEAF(_save_fp_context)
40 .set push
41 SET_HARDFLOAT
36 cfc1 t1, fcr31 42 cfc1 t1, fcr31
43 .set pop
37 44
38#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) 45#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)
39 .set push 46 .set push
47 SET_HARDFLOAT
40#ifdef CONFIG_CPU_MIPS32_R2 48#ifdef CONFIG_CPU_MIPS32_R2
41 .set mips64r2 49 .set mips32r2
50 .set fp=64
42 mfc0 t0, CP0_STATUS 51 mfc0 t0, CP0_STATUS
43 sll t0, t0, 5 52 sll t0, t0, 5
44 bgez t0, 1f # skip storing odd if FR=0 53 bgez t0, 1f # skip storing odd if FR=0
@@ -64,6 +73,8 @@ LEAF(_save_fp_context)
641: .set pop 731: .set pop
65#endif 74#endif
66 75
76 .set push
77 SET_HARDFLOAT
67 /* Store the 16 even double precision registers */ 78 /* Store the 16 even double precision registers */
68 EX sdc1 $f0, SC_FPREGS+0(a0) 79 EX sdc1 $f0, SC_FPREGS+0(a0)
69 EX sdc1 $f2, SC_FPREGS+16(a0) 80 EX sdc1 $f2, SC_FPREGS+16(a0)
@@ -84,11 +95,14 @@ LEAF(_save_fp_context)
84 EX sw t1, SC_FPC_CSR(a0) 95 EX sw t1, SC_FPC_CSR(a0)
85 jr ra 96 jr ra
86 li v0, 0 # success 97 li v0, 0 # success
98 .set pop
87 END(_save_fp_context) 99 END(_save_fp_context)
88 100
89#ifdef CONFIG_MIPS32_COMPAT 101#ifdef CONFIG_MIPS32_COMPAT
90 /* Save 32-bit process floating point context */ 102 /* Save 32-bit process floating point context */
91LEAF(_save_fp_context32) 103LEAF(_save_fp_context32)
104 .set push
105 SET_HARDFLOAT
92 cfc1 t1, fcr31 106 cfc1 t1, fcr31
93 107
94 mfc0 t0, CP0_STATUS 108 mfc0 t0, CP0_STATUS
@@ -134,6 +148,7 @@ LEAF(_save_fp_context32)
134 EX sw t1, SC32_FPC_CSR(a0) 148 EX sw t1, SC32_FPC_CSR(a0)
135 cfc1 t0, $0 # implementation/version 149 cfc1 t0, $0 # implementation/version
136 EX sw t0, SC32_FPC_EIR(a0) 150 EX sw t0, SC32_FPC_EIR(a0)
151 .set pop
137 152
138 jr ra 153 jr ra
139 li v0, 0 # success 154 li v0, 0 # success
@@ -150,8 +165,10 @@ LEAF(_restore_fp_context)
150 165
151#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) 166#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)
152 .set push 167 .set push
168 SET_HARDFLOAT
153#ifdef CONFIG_CPU_MIPS32_R2 169#ifdef CONFIG_CPU_MIPS32_R2
154 .set mips64r2 170 .set mips32r2
171 .set fp=64
155 mfc0 t0, CP0_STATUS 172 mfc0 t0, CP0_STATUS
156 sll t0, t0, 5 173 sll t0, t0, 5
157 bgez t0, 1f # skip loading odd if FR=0 174 bgez t0, 1f # skip loading odd if FR=0
@@ -175,6 +192,8 @@ LEAF(_restore_fp_context)
175 EX ldc1 $f31, SC_FPREGS+248(a0) 192 EX ldc1 $f31, SC_FPREGS+248(a0)
1761: .set pop 1931: .set pop
177#endif 194#endif
195 .set push
196 SET_HARDFLOAT
178 EX ldc1 $f0, SC_FPREGS+0(a0) 197 EX ldc1 $f0, SC_FPREGS+0(a0)
179 EX ldc1 $f2, SC_FPREGS+16(a0) 198 EX ldc1 $f2, SC_FPREGS+16(a0)
180 EX ldc1 $f4, SC_FPREGS+32(a0) 199 EX ldc1 $f4, SC_FPREGS+32(a0)
@@ -192,6 +211,7 @@ LEAF(_restore_fp_context)
192 EX ldc1 $f28, SC_FPREGS+224(a0) 211 EX ldc1 $f28, SC_FPREGS+224(a0)
193 EX ldc1 $f30, SC_FPREGS+240(a0) 212 EX ldc1 $f30, SC_FPREGS+240(a0)
194 ctc1 t1, fcr31 213 ctc1 t1, fcr31
214 .set pop
195 jr ra 215 jr ra
196 li v0, 0 # success 216 li v0, 0 # success
197 END(_restore_fp_context) 217 END(_restore_fp_context)
@@ -199,6 +219,8 @@ LEAF(_restore_fp_context)
199#ifdef CONFIG_MIPS32_COMPAT 219#ifdef CONFIG_MIPS32_COMPAT
200LEAF(_restore_fp_context32) 220LEAF(_restore_fp_context32)
201 /* Restore an o32 sigcontext. */ 221 /* Restore an o32 sigcontext. */
222 .set push
223 SET_HARDFLOAT
202 EX lw t1, SC32_FPC_CSR(a0) 224 EX lw t1, SC32_FPC_CSR(a0)
203 225
204 mfc0 t0, CP0_STATUS 226 mfc0 t0, CP0_STATUS
@@ -242,6 +264,7 @@ LEAF(_restore_fp_context32)
242 ctc1 t1, fcr31 264 ctc1 t1, fcr31
243 jr ra 265 jr ra
244 li v0, 0 # success 266 li v0, 0 # success
267 .set pop
245 END(_restore_fp_context32) 268 END(_restore_fp_context32)
246#endif 269#endif
247 270
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index 4c4ec1812420..64591e671878 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -22,6 +22,9 @@
22 22
23#include <asm/asmmacro.h> 23#include <asm/asmmacro.h>
24 24
25/* preprocessor replaces the fp in ".set fp=64" with $30 otherwise */
26#undef fp
27
25/* 28/*
26 * Offset to the current process status flags, the first 32 bytes of the 29 * Offset to the current process status flags, the first 32 bytes of the
27 * stack are not used. 30 * stack are not used.
@@ -65,8 +68,12 @@
65 bgtz a3, 1f 68 bgtz a3, 1f
66 69
67 /* Save 128b MSA vector context + scalar FP control & status. */ 70 /* Save 128b MSA vector context + scalar FP control & status. */
71 .set push
72 SET_HARDFLOAT
68 cfc1 t1, fcr31 73 cfc1 t1, fcr31
69 msa_save_all a0 74 msa_save_all a0
75 .set pop /* SET_HARDFLOAT */
76
70 sw t1, THREAD_FCR31(a0) 77 sw t1, THREAD_FCR31(a0)
71 b 2f 78 b 2f
72 79
@@ -161,6 +168,9 @@ LEAF(_init_msa_upper)
161 168
162#define FPU_DEFAULT 0x00000000 169#define FPU_DEFAULT 0x00000000
163 170
171 .set push
172 SET_HARDFLOAT
173
164LEAF(_init_fpu) 174LEAF(_init_fpu)
165 mfc0 t0, CP0_STATUS 175 mfc0 t0, CP0_STATUS
166 li t1, ST0_CU1 176 li t1, ST0_CU1
@@ -232,7 +242,8 @@ LEAF(_init_fpu)
232 242
233#ifdef CONFIG_CPU_MIPS32_R2 243#ifdef CONFIG_CPU_MIPS32_R2
234 .set push 244 .set push
235 .set mips64r2 245 .set mips32r2
246 .set fp=64
236 sll t0, t0, 5 # is Status.FR set? 247 sll t0, t0, 5 # is Status.FR set?
237 bgez t0, 1f # no: skip setting upper 32b 248 bgez t0, 1f # no: skip setting upper 32b
238 249
@@ -291,3 +302,5 @@ LEAF(_init_fpu)
291#endif 302#endif
292 jr ra 303 jr ra
293 END(_init_fpu) 304 END(_init_fpu)
305
306 .set pop /* SET_HARDFLOAT */
diff --git a/arch/mips/kernel/r6000_fpu.S b/arch/mips/kernel/r6000_fpu.S
index da0fbe46d83b..47077380c15c 100644
--- a/arch/mips/kernel/r6000_fpu.S
+++ b/arch/mips/kernel/r6000_fpu.S
@@ -18,6 +18,9 @@
18 18
19 .set noreorder 19 .set noreorder
20 .set mips2 20 .set mips2
21 .set push
22 SET_HARDFLOAT
23
21 /* Save floating point context */ 24 /* Save floating point context */
22 LEAF(_save_fp_context) 25 LEAF(_save_fp_context)
23 mfc0 t0,CP0_STATUS 26 mfc0 t0,CP0_STATUS
@@ -85,3 +88,5 @@
851: jr ra 881: jr ra
86 nop 89 nop
87 END(_restore_fp_context) 90 END(_restore_fp_context)
91
92 .set pop /* SET_HARDFLOAT */
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 744cd10ba599..00cad1005a16 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -579,3 +579,4 @@ EXPORT(sys_call_table)
579 PTR sys_seccomp 579 PTR sys_seccomp
580 PTR sys_getrandom 580 PTR sys_getrandom
581 PTR sys_memfd_create 581 PTR sys_memfd_create
582 PTR sys_bpf /* 4355 */
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index 002b1bc09c38..5251565e344b 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -434,4 +434,5 @@ EXPORT(sys_call_table)
434 PTR sys_seccomp 434 PTR sys_seccomp
435 PTR sys_getrandom 435 PTR sys_getrandom
436 PTR sys_memfd_create 436 PTR sys_memfd_create
437 PTR sys_bpf /* 5315 */
437 .size sys_call_table,.-sys_call_table 438 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index ca6cbbe9805b..77e74398b828 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -427,4 +427,5 @@ EXPORT(sysn32_call_table)
427 PTR sys_seccomp 427 PTR sys_seccomp
428 PTR sys_getrandom 428 PTR sys_getrandom
429 PTR sys_memfd_create 429 PTR sys_memfd_create
430 PTR sys_bpf
430 .size sysn32_call_table,.-sysn32_call_table 431 .size sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 9e10d11fbb84..6f8db9f728e8 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -564,4 +564,5 @@ EXPORT(sys32_call_table)
564 PTR sys_seccomp 564 PTR sys_seccomp
565 PTR sys_getrandom 565 PTR sys_getrandom
566 PTR sys_memfd_create 566 PTR sys_memfd_create
567 PTR sys_bpf /* 4355 */
567 .size sys32_call_table,.-sys32_call_table 568 .size sys32_call_table,.-sys32_call_table
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index b3b8f0d9d4a7..d21ec57b6e95 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -683,7 +683,8 @@ static void __init arch_mem_init(char **cmdline_p)
683 dma_contiguous_reserve(PFN_PHYS(max_low_pfn)); 683 dma_contiguous_reserve(PFN_PHYS(max_low_pfn));
684 /* Tell bootmem about cma reserved memblock section */ 684 /* Tell bootmem about cma reserved memblock section */
685 for_each_memblock(reserved, reg) 685 for_each_memblock(reserved, reg)
686 reserve_bootmem(reg->base, reg->size, BOOTMEM_DEFAULT); 686 if (reg->size != 0)
687 reserve_bootmem(reg->base, reg->size, BOOTMEM_DEFAULT);
687} 688}
688 689
689static void __init resource_init(void) 690static void __init resource_init(void)
diff --git a/arch/mips/lasat/Kconfig b/arch/mips/lasat/Kconfig
index 1d2ee8a9be13..8776d0a34274 100644
--- a/arch/mips/lasat/Kconfig
+++ b/arch/mips/lasat/Kconfig
@@ -4,7 +4,7 @@ config PICVUE
4 4
5config PICVUE_PROC 5config PICVUE_PROC
6 tristate "PICVUE LCD display driver /proc interface" 6 tristate "PICVUE LCD display driver /proc interface"
7 depends on PICVUE 7 depends on PICVUE && PROC_FS
8 8
9config DS1603 9config DS1603
10 bool "DS1603 RTC driver" 10 bool "DS1603 RTC driver"
diff --git a/arch/mips/lib/r3k_dump_tlb.c b/arch/mips/lib/r3k_dump_tlb.c
index 91615c2ef0cf..1ef365ab3cd3 100644
--- a/arch/mips/lib/r3k_dump_tlb.c
+++ b/arch/mips/lib/r3k_dump_tlb.c
@@ -34,7 +34,7 @@ static void dump_tlb(int first, int last)
34 entrylo0 = read_c0_entrylo0(); 34 entrylo0 = read_c0_entrylo0();
35 35
36 /* Unused entries have a virtual address of KSEG0. */ 36 /* Unused entries have a virtual address of KSEG0. */
37 if ((entryhi & 0xffffe000) != 0x80000000 37 if ((entryhi & 0xfffff000) != 0x80000000
38 && (entryhi & 0xfc0) == asid) { 38 && (entryhi & 0xfc0) == asid) {
39 /* 39 /*
40 * Only print entries in use 40 * Only print entries in use
@@ -43,7 +43,7 @@ static void dump_tlb(int first, int last)
43 43
44 printk("va=%08lx asid=%08lx" 44 printk("va=%08lx asid=%08lx"
45 " [pa=%06lx n=%d d=%d v=%d g=%d]", 45 " [pa=%06lx n=%d d=%d v=%d g=%d]",
46 (entryhi & 0xffffe000), 46 (entryhi & 0xfffff000),
47 entryhi & 0xfc0, 47 entryhi & 0xfc0,
48 entrylo0 & PAGE_MASK, 48 entrylo0 & PAGE_MASK,
49 (entrylo0 & (1 << 11)) ? 1 : 0, 49 (entrylo0 & (1 << 11)) ? 1 : 0,
diff --git a/arch/mips/lib/strnlen_user.S b/arch/mips/lib/strnlen_user.S
index f3af6995e2a6..7d12c0dded3d 100644
--- a/arch/mips/lib/strnlen_user.S
+++ b/arch/mips/lib/strnlen_user.S
@@ -40,9 +40,11 @@ FEXPORT(__strnlen_\func\()_nocheck_asm)
40.else 40.else
41 EX(lbe, t0, (v0), .Lfault\@) 41 EX(lbe, t0, (v0), .Lfault\@)
42.endif 42.endif
43 PTR_ADDIU v0, 1 43 .set noreorder
44 bnez t0, 1b 44 bnez t0, 1b
451: PTR_SUBU v0, a0 451: PTR_ADDIU v0, 1
46 .set reorder
47 PTR_SUBU v0, a0
46 jr ra 48 jr ra
47 END(__strnlen_\func\()_asm) 49 END(__strnlen_\func\()_asm)
48 50
diff --git a/arch/mips/loongson/lemote-2f/clock.c b/arch/mips/loongson/lemote-2f/clock.c
index a217061beee3..462e34d46b4a 100644
--- a/arch/mips/loongson/lemote-2f/clock.c
+++ b/arch/mips/loongson/lemote-2f/clock.c
@@ -91,6 +91,7 @@ EXPORT_SYMBOL(clk_put);
91 91
92int clk_set_rate(struct clk *clk, unsigned long rate) 92int clk_set_rate(struct clk *clk, unsigned long rate)
93{ 93{
94 unsigned int rate_khz = rate / 1000;
94 struct cpufreq_frequency_table *pos; 95 struct cpufreq_frequency_table *pos;
95 int ret = 0; 96 int ret = 0;
96 int regval; 97 int regval;
@@ -107,9 +108,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
107 propagate_rate(clk); 108 propagate_rate(clk);
108 109
109 cpufreq_for_each_valid_entry(pos, loongson2_clockmod_table) 110 cpufreq_for_each_valid_entry(pos, loongson2_clockmod_table)
110 if (rate == pos->frequency) 111 if (rate_khz == pos->frequency)
111 break; 112 break;
112 if (rate != pos->frequency) 113 if (rate_khz != pos->frequency)
113 return -ENOTSUPP; 114 return -ENOTSUPP;
114 115
115 clk->rate = rate; 116 clk->rate = rate;
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 7a4727795a70..cac529a405b8 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -584,11 +584,7 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
584 if (insn.i_format.rs == bc_op) { 584 if (insn.i_format.rs == bc_op) {
585 preempt_disable(); 585 preempt_disable();
586 if (is_fpu_owner()) 586 if (is_fpu_owner())
587 asm volatile( 587 fcr31 = read_32bit_cp1_register(CP1_STATUS);
588 ".set push\n"
589 "\t.set mips1\n"
590 "\tcfc1\t%0,$31\n"
591 "\t.set pop" : "=r" (fcr31));
592 else 588 else
593 fcr31 = current->thread.fpu.fcr31; 589 fcr31 = current->thread.fpu.fcr31;
594 preempt_enable(); 590 preempt_enable();
@@ -1023,7 +1019,7 @@ emul:
1023 goto emul; 1019 goto emul;
1024 1020
1025 case cop1x_op: 1021 case cop1x_op:
1026 if (cpu_has_mips_4_5 || cpu_has_mips64) 1022 if (cpu_has_mips_4_5 || cpu_has_mips64 || cpu_has_mips32r2)
1027 /* its one of ours */ 1023 /* its one of ours */
1028 goto emul; 1024 goto emul;
1029 1025
@@ -1068,7 +1064,7 @@ emul:
1068 break; 1064 break;
1069 1065
1070 case cop1x_op: 1066 case cop1x_op:
1071 if (!cpu_has_mips_4_5 && !cpu_has_mips64) 1067 if (!cpu_has_mips_4_5 && !cpu_has_mips64 && !cpu_has_mips32r2)
1072 return SIGILL; 1068 return SIGILL;
1073 1069
1074 sig = fpux_emu(xcp, ctx, ir, fault_addr); 1070 sig = fpux_emu(xcp, ctx, ir, fault_addr);
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index a08dd53a1cc5..b5f228e7eae6 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -1062,6 +1062,7 @@ static void build_update_entries(u32 **p, unsigned int tmp, unsigned int ptep)
1062struct mips_huge_tlb_info { 1062struct mips_huge_tlb_info {
1063 int huge_pte; 1063 int huge_pte;
1064 int restore_scratch; 1064 int restore_scratch;
1065 bool need_reload_pte;
1065}; 1066};
1066 1067
1067static struct mips_huge_tlb_info 1068static struct mips_huge_tlb_info
@@ -1076,6 +1077,7 @@ build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
1076 1077
1077 rv.huge_pte = scratch; 1078 rv.huge_pte = scratch;
1078 rv.restore_scratch = 0; 1079 rv.restore_scratch = 0;
1080 rv.need_reload_pte = false;
1079 1081
1080 if (check_for_high_segbits) { 1082 if (check_for_high_segbits) {
1081 UASM_i_MFC0(p, tmp, C0_BADVADDR); 1083 UASM_i_MFC0(p, tmp, C0_BADVADDR);
@@ -1264,6 +1266,7 @@ static void build_r4000_tlb_refill_handler(void)
1264 } else { 1266 } else {
1265 htlb_info.huge_pte = K0; 1267 htlb_info.huge_pte = K0;
1266 htlb_info.restore_scratch = 0; 1268 htlb_info.restore_scratch = 0;
1269 htlb_info.need_reload_pte = true;
1267 vmalloc_mode = refill_noscratch; 1270 vmalloc_mode = refill_noscratch;
1268 /* 1271 /*
1269 * create the plain linear handler 1272 * create the plain linear handler
@@ -1300,7 +1303,8 @@ static void build_r4000_tlb_refill_handler(void)
1300 } 1303 }
1301#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT 1304#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
1302 uasm_l_tlb_huge_update(&l, p); 1305 uasm_l_tlb_huge_update(&l, p);
1303 UASM_i_LW(&p, K0, 0, K1); 1306 if (htlb_info.need_reload_pte)
1307 UASM_i_LW(&p, htlb_info.huge_pte, 0, K1);
1304 build_huge_update_entries(&p, htlb_info.huge_pte, K1); 1308 build_huge_update_entries(&p, htlb_info.huge_pte, K1);
1305 build_huge_tlb_write_entry(&p, &l, &r, K0, tlb_random, 1309 build_huge_tlb_write_entry(&p, &l, &r, K0, tlb_random,
1306 htlb_info.restore_scratch); 1310 htlb_info.restore_scratch);
diff --git a/arch/mips/mti-malta/Makefile b/arch/mips/mti-malta/Makefile
index b9510ea8db56..6510ace272d4 100644
--- a/arch/mips/mti-malta/Makefile
+++ b/arch/mips/mti-malta/Makefile
@@ -5,8 +5,9 @@
5# Copyright (C) 2008 Wind River Systems, Inc. 5# Copyright (C) 2008 Wind River Systems, Inc.
6# written by Ralf Baechle <ralf@linux-mips.org> 6# written by Ralf Baechle <ralf@linux-mips.org>
7# 7#
8obj-y := malta-amon.o malta-display.o malta-init.o \ 8obj-y := malta-display.o malta-init.o \
9 malta-int.o malta-memory.o malta-platform.o \ 9 malta-int.o malta-memory.o malta-platform.o \
10 malta-reset.o malta-setup.o malta-time.o 10 malta-reset.o malta-setup.o malta-time.o
11 11
12obj-$(CONFIG_MIPS_CMP) += malta-amon.o
12obj-$(CONFIG_MIPS_MALTA_PM) += malta-pm.o 13obj-$(CONFIG_MIPS_MALTA_PM) += malta-pm.o
diff --git a/arch/mips/mti-sead3/Makefile b/arch/mips/mti-sead3/Makefile
index febf4334545e..2ae49e99eb67 100644
--- a/arch/mips/mti-sead3/Makefile
+++ b/arch/mips/mti-sead3/Makefile
@@ -14,7 +14,6 @@ obj-y := sead3-lcd.o sead3-display.o sead3-init.o \
14 sead3-setup.o sead3-time.o 14 sead3-setup.o sead3-time.o
15 15
16obj-y += sead3-i2c-dev.o sead3-i2c.o \ 16obj-y += sead3-i2c-dev.o sead3-i2c.o \
17 sead3-pic32-i2c-drv.o sead3-pic32-bus.o \
18 leds-sead3.o sead3-leds.o 17 leds-sead3.o sead3-leds.o
19 18
20obj-$(CONFIG_EARLY_PRINTK) += sead3-console.o 19obj-$(CONFIG_EARLY_PRINTK) += sead3-console.o
diff --git a/arch/mips/mti-sead3/sead3-i2c.c b/arch/mips/mti-sead3/sead3-i2c.c
index f70d5fc58ef5..795ae83894e0 100644
--- a/arch/mips/mti-sead3/sead3-i2c.c
+++ b/arch/mips/mti-sead3/sead3-i2c.c
@@ -5,10 +5,8 @@
5 * 5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved. 6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 */ 7 */
8#include <linux/module.h>
9#include <linux/init.h> 8#include <linux/init.h>
10#include <linux/platform_device.h> 9#include <linux/platform_device.h>
11#include <irq.h>
12 10
13struct resource sead3_i2c_resources[] = { 11struct resource sead3_i2c_resources[] = {
14 { 12 {
@@ -30,8 +28,4 @@ static int __init sead3_i2c_init(void)
30 return platform_device_register(&sead3_i2c_device); 28 return platform_device_register(&sead3_i2c_device);
31} 29}
32 30
33module_init(sead3_i2c_init); 31device_initcall(sead3_i2c_init);
34
35MODULE_AUTHOR("Chris Dearman <chris@mips.com>");
36MODULE_LICENSE("GPL");
37MODULE_DESCRIPTION("I2C probe driver for SEAD3");
diff --git a/arch/mips/mti-sead3/sead3-pic32-bus.c b/arch/mips/mti-sead3/sead3-pic32-bus.c
deleted file mode 100644
index 3b12aa5a7c88..000000000000
--- a/arch/mips/mti-sead3/sead3-pic32-bus.c
+++ /dev/null
@@ -1,102 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 */
8#include <linux/delay.h>
9#include <linux/kernel.h>
10#include <linux/spinlock.h>
11#include <linux/io.h>
12#include <linux/errno.h>
13
14#define PIC32_NULL 0x00
15#define PIC32_RD 0x01
16#define PIC32_SYSRD 0x02
17#define PIC32_WR 0x10
18#define PIC32_SYSWR 0x20
19#define PIC32_IRQ_CLR 0x40
20#define PIC32_STATUS 0x80
21
22#define DELAY() udelay(100) /* FIXME: needed? */
23
24/* spinlock to ensure atomic access to PIC32 */
25static DEFINE_SPINLOCK(pic32_bus_lock);
26
27/* FIXME: io_remap these */
28static void __iomem *bus_xfer = (void __iomem *)0xbf000600;
29static void __iomem *bus_status = (void __iomem *)0xbf000060;
30
31static inline unsigned int ioready(void)
32{
33 return readl(bus_status) & 1;
34}
35
36static inline void wait_ioready(void)
37{
38 do { } while (!ioready());
39}
40
41static inline void wait_ioclear(void)
42{
43 do { } while (ioready());
44}
45
46static inline void check_ioclear(void)
47{
48 if (ioready()) {
49 pr_debug("ioclear: initially busy\n");
50 do {
51 (void) readl(bus_xfer);
52 DELAY();
53 } while (ioready());
54 pr_debug("ioclear: cleared busy\n");
55 }
56}
57
58u32 pic32_bus_readl(u32 reg)
59{
60 unsigned long flags;
61 u32 status, val;
62
63 spin_lock_irqsave(&pic32_bus_lock, flags);
64
65 check_ioclear();
66
67 writel((PIC32_RD << 24) | (reg & 0x00ffffff), bus_xfer);
68 DELAY();
69 wait_ioready();
70 status = readl(bus_xfer);
71 DELAY();
72 val = readl(bus_xfer);
73 wait_ioclear();
74
75 pr_debug("pic32_bus_readl: *%x -> %x (status=%x)\n", reg, val, status);
76
77 spin_unlock_irqrestore(&pic32_bus_lock, flags);
78
79 return val;
80}
81
82void pic32_bus_writel(u32 val, u32 reg)
83{
84 unsigned long flags;
85 u32 status;
86
87 spin_lock_irqsave(&pic32_bus_lock, flags);
88
89 check_ioclear();
90
91 writel((PIC32_WR << 24) | (reg & 0x00ffffff), bus_xfer);
92 DELAY();
93 writel(val, bus_xfer);
94 DELAY();
95 wait_ioready();
96 status = readl(bus_xfer);
97 wait_ioclear();
98
99 pr_debug("pic32_bus_writel: *%x <- %x (status=%x)\n", reg, val, status);
100
101 spin_unlock_irqrestore(&pic32_bus_lock, flags);
102}
diff --git a/arch/mips/mti-sead3/sead3-pic32-i2c-drv.c b/arch/mips/mti-sead3/sead3-pic32-i2c-drv.c
deleted file mode 100644
index 80fe194cfa53..000000000000
--- a/arch/mips/mti-sead3/sead3-pic32-i2c-drv.c
+++ /dev/null
@@ -1,423 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 */
8#include <linux/delay.h>
9#include <linux/kernel.h>
10#include <linux/module.h>
11#include <linux/spinlock.h>
12#include <linux/platform_device.h>
13#include <linux/init.h>
14#include <linux/errno.h>
15#include <linux/i2c.h>
16#include <linux/slab.h>
17
18#define PIC32_I2CxCON 0x0000
19#define PIC32_I2CxCONCLR 0x0004
20#define PIC32_I2CxCONSET 0x0008
21#define PIC32_I2CxCONINV 0x000C
22#define I2CCON_ON (1<<15)
23#define I2CCON_FRZ (1<<14)
24#define I2CCON_SIDL (1<<13)
25#define I2CCON_SCLREL (1<<12)
26#define I2CCON_STRICT (1<<11)
27#define I2CCON_A10M (1<<10)
28#define I2CCON_DISSLW (1<<9)
29#define I2CCON_SMEN (1<<8)
30#define I2CCON_GCEN (1<<7)
31#define I2CCON_STREN (1<<6)
32#define I2CCON_ACKDT (1<<5)
33#define I2CCON_ACKEN (1<<4)
34#define I2CCON_RCEN (1<<3)
35#define I2CCON_PEN (1<<2)
36#define I2CCON_RSEN (1<<1)
37#define I2CCON_SEN (1<<0)
38
39#define PIC32_I2CxSTAT 0x0010
40#define PIC32_I2CxSTATCLR 0x0014
41#define PIC32_I2CxSTATSET 0x0018
42#define PIC32_I2CxSTATINV 0x001C
43#define I2CSTAT_ACKSTAT (1<<15)
44#define I2CSTAT_TRSTAT (1<<14)
45#define I2CSTAT_BCL (1<<10)
46#define I2CSTAT_GCSTAT (1<<9)
47#define I2CSTAT_ADD10 (1<<8)
48#define I2CSTAT_IWCOL (1<<7)
49#define I2CSTAT_I2COV (1<<6)
50#define I2CSTAT_DA (1<<5)
51#define I2CSTAT_P (1<<4)
52#define I2CSTAT_S (1<<3)
53#define I2CSTAT_RW (1<<2)
54#define I2CSTAT_RBF (1<<1)
55#define I2CSTAT_TBF (1<<0)
56
57#define PIC32_I2CxADD 0x0020
58#define PIC32_I2CxADDCLR 0x0024
59#define PIC32_I2CxADDSET 0x0028
60#define PIC32_I2CxADDINV 0x002C
61#define PIC32_I2CxMSK 0x0030
62#define PIC32_I2CxMSKCLR 0x0034
63#define PIC32_I2CxMSKSET 0x0038
64#define PIC32_I2CxMSKINV 0x003C
65#define PIC32_I2CxBRG 0x0040
66#define PIC32_I2CxBRGCLR 0x0044
67#define PIC32_I2CxBRGSET 0x0048
68#define PIC32_I2CxBRGINV 0x004C
69#define PIC32_I2CxTRN 0x0050
70#define PIC32_I2CxTRNCLR 0x0054
71#define PIC32_I2CxTRNSET 0x0058
72#define PIC32_I2CxTRNINV 0x005C
73#define PIC32_I2CxRCV 0x0060
74
75struct i2c_platform_data {
76 u32 base;
77 struct i2c_adapter adap;
78 u32 xfer_timeout;
79 u32 ack_timeout;
80 u32 ctl_timeout;
81};
82
83extern u32 pic32_bus_readl(u32 reg);
84extern void pic32_bus_writel(u32 val, u32 reg);
85
86static inline void
87StartI2C(struct i2c_platform_data *adap)
88{
89 pr_debug("StartI2C\n");
90 pic32_bus_writel(I2CCON_SEN, adap->base + PIC32_I2CxCONSET);
91}
92
93static inline void
94StopI2C(struct i2c_platform_data *adap)
95{
96 pr_debug("StopI2C\n");
97 pic32_bus_writel(I2CCON_PEN, adap->base + PIC32_I2CxCONSET);
98}
99
100static inline void
101AckI2C(struct i2c_platform_data *adap)
102{
103 pr_debug("AckI2C\n");
104 pic32_bus_writel(I2CCON_ACKDT, adap->base + PIC32_I2CxCONCLR);
105 pic32_bus_writel(I2CCON_ACKEN, adap->base + PIC32_I2CxCONSET);
106}
107
108static inline void
109NotAckI2C(struct i2c_platform_data *adap)
110{
111 pr_debug("NakI2C\n");
112 pic32_bus_writel(I2CCON_ACKDT, adap->base + PIC32_I2CxCONSET);
113 pic32_bus_writel(I2CCON_ACKEN, adap->base + PIC32_I2CxCONSET);
114}
115
116static inline int
117IdleI2C(struct i2c_platform_data *adap)
118{
119 int i;
120
121 pr_debug("IdleI2C\n");
122 for (i = 0; i < adap->ctl_timeout; i++) {
123 if (((pic32_bus_readl(adap->base + PIC32_I2CxCON) &
124 (I2CCON_ACKEN | I2CCON_RCEN | I2CCON_PEN | I2CCON_RSEN |
125 I2CCON_SEN)) == 0) &&
126 ((pic32_bus_readl(adap->base + PIC32_I2CxSTAT) &
127 (I2CSTAT_TRSTAT)) == 0))
128 return 0;
129 udelay(1);
130 }
131 return -ETIMEDOUT;
132}
133
134static inline u32
135MasterWriteI2C(struct i2c_platform_data *adap, u32 byte)
136{
137 pr_debug("MasterWriteI2C\n");
138
139 pic32_bus_writel(byte, adap->base + PIC32_I2CxTRN);
140
141 return pic32_bus_readl(adap->base + PIC32_I2CxSTAT) & I2CSTAT_IWCOL;
142}
143
144static inline u32
145MasterReadI2C(struct i2c_platform_data *adap)
146{
147 pr_debug("MasterReadI2C\n");
148
149 pic32_bus_writel(I2CCON_RCEN, adap->base + PIC32_I2CxCONSET);
150
151 while (pic32_bus_readl(adap->base + PIC32_I2CxCON) & I2CCON_RCEN)
152 ;
153
154 pic32_bus_writel(I2CSTAT_I2COV, adap->base + PIC32_I2CxSTATCLR);
155
156 return pic32_bus_readl(adap->base + PIC32_I2CxRCV);
157}
158
159static int
160do_address(struct i2c_platform_data *adap, unsigned int addr, int rd)
161{
162 pr_debug("doaddress\n");
163
164 IdleI2C(adap);
165 StartI2C(adap);
166 IdleI2C(adap);
167
168 addr <<= 1;
169 if (rd)
170 addr |= 1;
171
172 if (MasterWriteI2C(adap, addr))
173 return -EIO;
174 IdleI2C(adap);
175 if (pic32_bus_readl(adap->base + PIC32_I2CxSTAT) & I2CSTAT_ACKSTAT)
176 return -EIO;
177 return 0;
178}
179
180static int
181i2c_read(struct i2c_platform_data *adap, unsigned char *buf,
182 unsigned int len)
183{
184 int i;
185 u32 data;
186
187 pr_debug("i2c_read\n");
188
189 i = 0;
190 while (i < len) {
191 data = MasterReadI2C(adap);
192 buf[i++] = data;
193 if (i < len)
194 AckI2C(adap);
195 else
196 NotAckI2C(adap);
197 }
198
199 StopI2C(adap);
200 IdleI2C(adap);
201 return 0;
202}
203
204static int
205i2c_write(struct i2c_platform_data *adap, unsigned char *buf,
206 unsigned int len)
207{
208 int i;
209 u32 data;
210
211 pr_debug("i2c_write\n");
212
213 i = 0;
214 while (i < len) {
215 data = buf[i];
216 if (MasterWriteI2C(adap, data))
217 return -EIO;
218 IdleI2C(adap);
219 if (pic32_bus_readl(adap->base + PIC32_I2CxSTAT) &
220 I2CSTAT_ACKSTAT)
221 return -EIO;
222 i++;
223 }
224
225 StopI2C(adap);
226 IdleI2C(adap);
227 return 0;
228}
229
230static int
231platform_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num)
232{
233 struct i2c_platform_data *adap = i2c_adap->algo_data;
234 struct i2c_msg *p;
235 int i, err = 0;
236
237 pr_debug("platform_xfer\n");
238 for (i = 0; i < num; i++) {
239#define __BUFSIZE 80
240 int ii;
241 static char buf[__BUFSIZE];
242 char *b = buf;
243
244 p = &msgs[i];
245 b += sprintf(buf, " [%d bytes]", p->len);
246 if ((p->flags & I2C_M_RD) == 0) {
247 for (ii = 0; ii < p->len; ii++) {
248 if (b < &buf[__BUFSIZE-4]) {
249 b += sprintf(b, " %02x", p->buf[ii]);
250 } else {
251 strcat(b, "...");
252 break;
253 }
254 }
255 }
256 pr_debug("xfer%d: DevAddr: %04x Op:%s Data:%s\n", i, p->addr,
257 (p->flags & I2C_M_RD) ? "Rd" : "Wr", buf);
258 }
259
260
261 for (i = 0; !err && i < num; i++) {
262 p = &msgs[i];
263 err = do_address(adap, p->addr, p->flags & I2C_M_RD);
264 if (err || !p->len)
265 continue;
266 if (p->flags & I2C_M_RD)
267 err = i2c_read(adap, p->buf, p->len);
268 else
269 err = i2c_write(adap, p->buf, p->len);
270 }
271
272 /* Return the number of messages processed, or the error code. */
273 if (err == 0)
274 err = num;
275
276 return err;
277}
278
279static u32
280platform_func(struct i2c_adapter *adap)
281{
282 pr_debug("platform_algo\n");
283 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
284}
285
286static const struct i2c_algorithm platform_algo = {
287 .master_xfer = platform_xfer,
288 .functionality = platform_func,
289};
290
291static void i2c_platform_setup(struct i2c_platform_data *priv)
292{
293 pr_debug("i2c_platform_setup\n");
294
295 pic32_bus_writel(500, priv->base + PIC32_I2CxBRG);
296 pic32_bus_writel(I2CCON_ON, priv->base + PIC32_I2CxCONCLR);
297 pic32_bus_writel(I2CCON_ON, priv->base + PIC32_I2CxCONSET);
298 pic32_bus_writel((I2CSTAT_BCL | I2CSTAT_IWCOL),
299 (priv->base + PIC32_I2CxSTATCLR));
300}
301
302static void i2c_platform_disable(struct i2c_platform_data *priv)
303{
304 pr_debug("i2c_platform_disable\n");
305}
306
307static int i2c_platform_probe(struct platform_device *pdev)
308{
309 struct i2c_platform_data *priv;
310 struct resource *r;
311 int ret;
312
313 pr_debug("i2c_platform_probe\n");
314 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
315 if (!r)
316 return -ENODEV;
317
318 priv = devm_kzalloc(&pdev->dev, sizeof(struct i2c_platform_data),
319 GFP_KERNEL);
320 if (!priv)
321 return -ENOMEM;
322
323 /* FIXME: need to allocate resource in PIC32 space */
324#if 0
325 priv->base = bus_request_region(r->start, resource_size(r),
326 pdev->name);
327#else
328 priv->base = r->start;
329#endif
330 if (!priv->base)
331 return -EBUSY;
332
333 priv->xfer_timeout = 200;
334 priv->ack_timeout = 200;
335 priv->ctl_timeout = 200;
336
337 priv->adap.nr = pdev->id;
338 priv->adap.algo = &platform_algo;
339 priv->adap.algo_data = priv;
340 priv->adap.dev.parent = &pdev->dev;
341 strlcpy(priv->adap.name, "PIC32 I2C", sizeof(priv->adap.name));
342
343 i2c_platform_setup(priv);
344
345 ret = i2c_add_numbered_adapter(&priv->adap);
346 if (ret) {
347 i2c_platform_disable(priv);
348 return ret;
349 }
350
351 platform_set_drvdata(pdev, priv);
352 return 0;
353}
354
355static int i2c_platform_remove(struct platform_device *pdev)
356{
357 struct i2c_platform_data *priv = platform_get_drvdata(pdev);
358
359 pr_debug("i2c_platform_remove\n");
360 platform_set_drvdata(pdev, NULL);
361 i2c_del_adapter(&priv->adap);
362 i2c_platform_disable(priv);
363 return 0;
364}
365
366#ifdef CONFIG_PM
367static int
368i2c_platform_suspend(struct platform_device *pdev, pm_message_t state)
369{
370 struct i2c_platform_data *priv = platform_get_drvdata(pdev);
371
372 dev_dbg(&pdev->dev, "i2c_platform_disable\n");
373 i2c_platform_disable(priv);
374
375 return 0;
376}
377
378static int
379i2c_platform_resume(struct platform_device *pdev)
380{
381 struct i2c_platform_data *priv = platform_get_drvdata(pdev);
382
383 dev_dbg(&pdev->dev, "i2c_platform_setup\n");
384 i2c_platform_setup(priv);
385
386 return 0;
387}
388#else
389#define i2c_platform_suspend NULL
390#define i2c_platform_resume NULL
391#endif
392
393static struct platform_driver i2c_platform_driver = {
394 .driver = {
395 .name = "i2c_pic32",
396 .owner = THIS_MODULE,
397 },
398 .probe = i2c_platform_probe,
399 .remove = i2c_platform_remove,
400 .suspend = i2c_platform_suspend,
401 .resume = i2c_platform_resume,
402};
403
404static int __init
405i2c_platform_init(void)
406{
407 pr_debug("i2c_platform_init\n");
408 return platform_driver_register(&i2c_platform_driver);
409}
410
411static void __exit
412i2c_platform_exit(void)
413{
414 pr_debug("i2c_platform_exit\n");
415 platform_driver_unregister(&i2c_platform_driver);
416}
417
418MODULE_AUTHOR("Chris Dearman, MIPS Technologies INC.");
419MODULE_DESCRIPTION("PIC32 I2C driver");
420MODULE_LICENSE("GPL");
421
422module_init(i2c_platform_init);
423module_exit(i2c_platform_exit);
diff --git a/arch/mips/pci/msi-xlp.c b/arch/mips/pci/msi-xlp.c
index fa374fe3746b..f7ac3edda1b2 100644
--- a/arch/mips/pci/msi-xlp.c
+++ b/arch/mips/pci/msi-xlp.c
@@ -443,10 +443,8 @@ static int xlp_setup_msix(uint64_t lnkbase, int node, int link,
443 msg.data = 0xc00 | msixvec; 443 msg.data = 0xc00 | msixvec;
444 444
445 ret = irq_set_msi_desc(xirq, desc); 445 ret = irq_set_msi_desc(xirq, desc);
446 if (ret < 0) { 446 if (ret < 0)
447 destroy_irq(xirq);
448 return ret; 447 return ret;
449 }
450 448
451 write_msi_msg(xirq, &msg); 449 write_msi_msg(xirq, &msg);
452 return 0; 450 return 0;
diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c
index 37fe8e7887e2..d3ed15b2b2d1 100644
--- a/arch/mips/pci/pci-lantiq.c
+++ b/arch/mips/pci/pci-lantiq.c
@@ -215,17 +215,12 @@ static int ltq_pci_probe(struct platform_device *pdev)
215 215
216 pci_clear_flags(PCI_PROBE_ONLY); 216 pci_clear_flags(PCI_PROBE_ONLY);
217 217
218 res_cfg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
219 res_bridge = platform_get_resource(pdev, IORESOURCE_MEM, 1); 218 res_bridge = platform_get_resource(pdev, IORESOURCE_MEM, 1);
220 if (!res_cfg || !res_bridge) {
221 dev_err(&pdev->dev, "missing memory resources\n");
222 return -EINVAL;
223 }
224
225 ltq_pci_membase = devm_ioremap_resource(&pdev->dev, res_bridge); 219 ltq_pci_membase = devm_ioremap_resource(&pdev->dev, res_bridge);
226 if (IS_ERR(ltq_pci_membase)) 220 if (IS_ERR(ltq_pci_membase))
227 return PTR_ERR(ltq_pci_membase); 221 return PTR_ERR(ltq_pci_membase);
228 222
223 res_cfg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
229 ltq_pci_mapped_cfg = devm_ioremap_resource(&pdev->dev, res_cfg); 224 ltq_pci_mapped_cfg = devm_ioremap_resource(&pdev->dev, res_cfg);
230 if (IS_ERR(ltq_pci_mapped_cfg)) 225 if (IS_ERR(ltq_pci_mapped_cfg))
231 return PTR_ERR(ltq_pci_mapped_cfg); 226 return PTR_ERR(ltq_pci_mapped_cfg);
diff --git a/arch/mips/pmcs-msp71xx/msp_irq.c b/arch/mips/pmcs-msp71xx/msp_irq.c
index f914c753de21..8d53d7a2ed45 100644
--- a/arch/mips/pmcs-msp71xx/msp_irq.c
+++ b/arch/mips/pmcs-msp71xx/msp_irq.c
@@ -16,6 +16,7 @@
16#include <linux/time.h> 16#include <linux/time.h>
17 17
18#include <asm/irq_cpu.h> 18#include <asm/irq_cpu.h>
19#include <asm/setup.h>
19 20
20#include <msp_int.h> 21#include <msp_int.h>
21 22
diff --git a/arch/mips/pmcs-msp71xx/msp_irq_cic.c b/arch/mips/pmcs-msp71xx/msp_irq_cic.c
index b8df2f7b3328..1207ec4dfb77 100644
--- a/arch/mips/pmcs-msp71xx/msp_irq_cic.c
+++ b/arch/mips/pmcs-msp71xx/msp_irq_cic.c
@@ -131,11 +131,11 @@ static int msp_cic_irq_set_affinity(struct irq_data *d,
131 int cpu; 131 int cpu;
132 unsigned long flags; 132 unsigned long flags;
133 unsigned int mtflags; 133 unsigned int mtflags;
134 unsigned long imask = (1 << (irq - MSP_CIC_INTBASE)); 134 unsigned long imask = (1 << (d->irq - MSP_CIC_INTBASE));
135 volatile u32 *cic_mask = (volatile u32 *)CIC_VPE0_MSK_REG; 135 volatile u32 *cic_mask = (volatile u32 *)CIC_VPE0_MSK_REG;
136 136
137 /* timer balancing should be disabled in kernel code */ 137 /* timer balancing should be disabled in kernel code */
138 BUG_ON(irq == MSP_INT_VPE0_TIMER || irq == MSP_INT_VPE1_TIMER); 138 BUG_ON(d->irq == MSP_INT_VPE0_TIMER || d->irq == MSP_INT_VPE1_TIMER);
139 139
140 LOCK_CORE(flags, mtflags); 140 LOCK_CORE(flags, mtflags);
141 /* enable if any of each VPE's TCs require this IRQ */ 141 /* enable if any of each VPE's TCs require this IRQ */
diff --git a/arch/mips/sibyte/Makefile b/arch/mips/sibyte/Makefile
index c8ed2c807e69..455c40d6d625 100644
--- a/arch/mips/sibyte/Makefile
+++ b/arch/mips/sibyte/Makefile
@@ -25,3 +25,4 @@ obj-$(CONFIG_SIBYTE_RHONE) += swarm/
25obj-$(CONFIG_SIBYTE_SENTOSA) += swarm/ 25obj-$(CONFIG_SIBYTE_SENTOSA) += swarm/
26obj-$(CONFIG_SIBYTE_SWARM) += swarm/ 26obj-$(CONFIG_SIBYTE_SWARM) += swarm/
27obj-$(CONFIG_SIBYTE_BIGSUR) += swarm/ 27obj-$(CONFIG_SIBYTE_BIGSUR) += swarm/
28obj-$(CONFIG_SIBYTE_LITTLESUR) += swarm/
diff --git a/arch/powerpc/configs/pseries_le_defconfig b/arch/powerpc/configs/pseries_le_defconfig
index 63392f4b29a4..d2008887eb8c 100644
--- a/arch/powerpc/configs/pseries_le_defconfig
+++ b/arch/powerpc/configs/pseries_le_defconfig
@@ -48,7 +48,6 @@ CONFIG_KEXEC=y
48CONFIG_IRQ_ALL_CPUS=y 48CONFIG_IRQ_ALL_CPUS=y
49CONFIG_MEMORY_HOTPLUG=y 49CONFIG_MEMORY_HOTPLUG=y
50CONFIG_MEMORY_HOTREMOVE=y 50CONFIG_MEMORY_HOTREMOVE=y
51CONFIG_CMA=y
52CONFIG_PPC_64K_PAGES=y 51CONFIG_PPC_64K_PAGES=y
53CONFIG_PPC_SUBPAGE_PROT=y 52CONFIG_PPC_SUBPAGE_PROT=y
54CONFIG_SCHED_SMT=y 53CONFIG_SCHED_SMT=y
@@ -138,6 +137,7 @@ CONFIG_NETCONSOLE=y
138CONFIG_NETPOLL_TRAP=y 137CONFIG_NETPOLL_TRAP=y
139CONFIG_TUN=m 138CONFIG_TUN=m
140CONFIG_VIRTIO_NET=m 139CONFIG_VIRTIO_NET=m
140CONFIG_VHOST_NET=m
141CONFIG_VORTEX=y 141CONFIG_VORTEX=y
142CONFIG_ACENIC=m 142CONFIG_ACENIC=m
143CONFIG_ACENIC_OMIT_TIGON_I=y 143CONFIG_ACENIC_OMIT_TIGON_I=y
@@ -303,4 +303,9 @@ CONFIG_CRYPTO_LZO=m
303# CONFIG_CRYPTO_ANSI_CPRNG is not set 303# CONFIG_CRYPTO_ANSI_CPRNG is not set
304CONFIG_CRYPTO_DEV_NX=y 304CONFIG_CRYPTO_DEV_NX=y
305CONFIG_CRYPTO_DEV_NX_ENCRYPT=m 305CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
306CONFIG_VIRTUALIZATION=y
307CONFIG_KVM_BOOK3S_64=m
308CONFIG_KVM_BOOK3S_64_HV=y
309CONFIG_TRANSPARENT_HUGEPAGE=y
310CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y
306CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y 311CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index 3b260efbfbf9..ca07f9c27335 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -71,9 +71,10 @@ struct device_node;
71 71
72#define EEH_PE_ISOLATED (1 << 0) /* Isolated PE */ 72#define EEH_PE_ISOLATED (1 << 0) /* Isolated PE */
73#define EEH_PE_RECOVERING (1 << 1) /* Recovering PE */ 73#define EEH_PE_RECOVERING (1 << 1) /* Recovering PE */
74#define EEH_PE_RESET (1 << 2) /* PE reset in progress */ 74#define EEH_PE_CFG_BLOCKED (1 << 2) /* Block config access */
75 75
76#define EEH_PE_KEEP (1 << 8) /* Keep PE on hotplug */ 76#define EEH_PE_KEEP (1 << 8) /* Keep PE on hotplug */
77#define EEH_PE_CFG_RESTRICTED (1 << 9) /* Block config on error */
77 78
78struct eeh_pe { 79struct eeh_pe {
79 int type; /* PE type: PHB/Bus/Device */ 80 int type; /* PE type: PHB/Bus/Device */
diff --git a/arch/powerpc/include/asm/fadump.h b/arch/powerpc/include/asm/fadump.h
index a6774560afe3..493e72f64b35 100644
--- a/arch/powerpc/include/asm/fadump.h
+++ b/arch/powerpc/include/asm/fadump.h
@@ -70,39 +70,39 @@
70#define CPU_UNKNOWN (~((u32)0)) 70#define CPU_UNKNOWN (~((u32)0))
71 71
72/* Utility macros */ 72/* Utility macros */
73#define SKIP_TO_NEXT_CPU(reg_entry) \ 73#define SKIP_TO_NEXT_CPU(reg_entry) \
74({ \ 74({ \
75 while (reg_entry->reg_id != REG_ID("CPUEND")) \ 75 while (be64_to_cpu(reg_entry->reg_id) != REG_ID("CPUEND")) \
76 reg_entry++; \ 76 reg_entry++; \
77 reg_entry++; \ 77 reg_entry++; \
78}) 78})
79 79
80/* Kernel Dump section info */ 80/* Kernel Dump section info */
81struct fadump_section { 81struct fadump_section {
82 u32 request_flag; 82 __be32 request_flag;
83 u16 source_data_type; 83 __be16 source_data_type;
84 u16 error_flags; 84 __be16 error_flags;
85 u64 source_address; 85 __be64 source_address;
86 u64 source_len; 86 __be64 source_len;
87 u64 bytes_dumped; 87 __be64 bytes_dumped;
88 u64 destination_address; 88 __be64 destination_address;
89}; 89};
90 90
91/* ibm,configure-kernel-dump header. */ 91/* ibm,configure-kernel-dump header. */
92struct fadump_section_header { 92struct fadump_section_header {
93 u32 dump_format_version; 93 __be32 dump_format_version;
94 u16 dump_num_sections; 94 __be16 dump_num_sections;
95 u16 dump_status_flag; 95 __be16 dump_status_flag;
96 u32 offset_first_dump_section; 96 __be32 offset_first_dump_section;
97 97
98 /* Fields for disk dump option. */ 98 /* Fields for disk dump option. */
99 u32 dd_block_size; 99 __be32 dd_block_size;
100 u64 dd_block_offset; 100 __be64 dd_block_offset;
101 u64 dd_num_blocks; 101 __be64 dd_num_blocks;
102 u32 dd_offset_disk_path; 102 __be32 dd_offset_disk_path;
103 103
104 /* Maximum time allowed to prevent an automatic dump-reboot. */ 104 /* Maximum time allowed to prevent an automatic dump-reboot. */
105 u32 max_time_auto; 105 __be32 max_time_auto;
106}; 106};
107 107
108/* 108/*
@@ -174,15 +174,15 @@ static inline u64 str_to_u64(const char *str)
174 174
175/* Register save area header. */ 175/* Register save area header. */
176struct fadump_reg_save_area_header { 176struct fadump_reg_save_area_header {
177 u64 magic_number; 177 __be64 magic_number;
178 u32 version; 178 __be32 version;
179 u32 num_cpu_offset; 179 __be32 num_cpu_offset;
180}; 180};
181 181
182/* Register entry. */ 182/* Register entry. */
183struct fadump_reg_entry { 183struct fadump_reg_entry {
184 u64 reg_id; 184 __be64 reg_id;
185 u64 reg_value; 185 __be64 reg_value;
186}; 186};
187 187
188/* fadump crash info structure */ 188/* fadump crash info structure */
diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h
index 623f2971ce0e..766b77d527ac 100644
--- a/arch/powerpc/include/asm/hugetlb.h
+++ b/arch/powerpc/include/asm/hugetlb.h
@@ -71,7 +71,7 @@ pte_t *huge_pte_offset_and_shift(struct mm_struct *mm,
71 71
72void flush_dcache_icache_hugepage(struct page *page); 72void flush_dcache_icache_hugepage(struct page *page);
73 73
74#if defined(CONFIG_PPC_MM_SLICES) || defined(CONFIG_PPC_SUBPAGE_PROT) 74#if defined(CONFIG_PPC_MM_SLICES)
75int is_hugepage_only_range(struct mm_struct *mm, unsigned long addr, 75int is_hugepage_only_range(struct mm_struct *mm, unsigned long addr,
76 unsigned long len); 76 unsigned long len);
77#else 77#else
diff --git a/arch/powerpc/include/asm/perf_event.h b/arch/powerpc/include/asm/perf_event.h
index 0bb23725b1e7..8bf1b6351716 100644
--- a/arch/powerpc/include/asm/perf_event.h
+++ b/arch/powerpc/include/asm/perf_event.h
@@ -34,7 +34,7 @@
34 do { \ 34 do { \
35 (regs)->result = 0; \ 35 (regs)->result = 0; \
36 (regs)->nip = __ip; \ 36 (regs)->nip = __ip; \
37 (regs)->gpr[1] = *(unsigned long *)__get_SP(); \ 37 (regs)->gpr[1] = current_stack_pointer(); \
38 asm volatile("mfmsr %0" : "=r" ((regs)->msr)); \ 38 asm volatile("mfmsr %0" : "=r" ((regs)->msr)); \
39 } while (0) 39 } while (0)
40#endif 40#endif
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index fe3f9488f321..c998279bd85b 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -1265,8 +1265,7 @@ static inline unsigned long mfvtb (void)
1265 1265
1266#define proc_trap() asm volatile("trap") 1266#define proc_trap() asm volatile("trap")
1267 1267
1268#define __get_SP() ({unsigned long sp; \ 1268extern unsigned long current_stack_pointer(void);
1269 asm volatile("mr %0,1": "=r" (sp)); sp;})
1270 1269
1271extern unsigned long scom970_read(unsigned int address); 1270extern unsigned long scom970_read(unsigned int address);
1272extern void scom970_write(unsigned int address, unsigned long value); 1271extern void scom970_write(unsigned int address, unsigned long value);
diff --git a/arch/powerpc/include/asm/syscall.h b/arch/powerpc/include/asm/syscall.h
index 6fa2708da153..6240698fee9a 100644
--- a/arch/powerpc/include/asm/syscall.h
+++ b/arch/powerpc/include/asm/syscall.h
@@ -19,7 +19,7 @@
19 19
20/* ftrace syscalls requires exporting the sys_call_table */ 20/* ftrace syscalls requires exporting the sys_call_table */
21#ifdef CONFIG_FTRACE_SYSCALLS 21#ifdef CONFIG_FTRACE_SYSCALLS
22extern const unsigned long *sys_call_table; 22extern const unsigned long sys_call_table[];
23#endif /* CONFIG_FTRACE_SYSCALLS */ 23#endif /* CONFIG_FTRACE_SYSCALLS */
24 24
25static inline long syscall_get_nr(struct task_struct *task, 25static inline long syscall_get_nr(struct task_struct *task,
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index 7d8a60068805..ce9577d693be 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -365,3 +365,4 @@ SYSCALL_SPU(renameat2)
365SYSCALL_SPU(seccomp) 365SYSCALL_SPU(seccomp)
366SYSCALL_SPU(getrandom) 366SYSCALL_SPU(getrandom)
367SYSCALL_SPU(memfd_create) 367SYSCALL_SPU(memfd_create)
368SYSCALL_SPU(bpf)
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index 4e9af3fd43e7..e0da021caa00 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -12,7 +12,7 @@
12#include <uapi/asm/unistd.h> 12#include <uapi/asm/unistd.h>
13 13
14 14
15#define __NR_syscalls 361 15#define __NR_syscalls 362
16 16
17#define __NR__exit __NR_exit 17#define __NR__exit __NR_exit
18#define NR_syscalls __NR_syscalls 18#define NR_syscalls __NR_syscalls
diff --git a/arch/powerpc/include/uapi/asm/unistd.h b/arch/powerpc/include/uapi/asm/unistd.h
index 0688fc06e183..f55351f2e66e 100644
--- a/arch/powerpc/include/uapi/asm/unistd.h
+++ b/arch/powerpc/include/uapi/asm/unistd.h
@@ -383,5 +383,6 @@
383#define __NR_seccomp 358 383#define __NR_seccomp 358
384#define __NR_getrandom 359 384#define __NR_getrandom 359
385#define __NR_memfd_create 360 385#define __NR_memfd_create 360
386#define __NR_bpf 361
386 387
387#endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */ 388#endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
index adac9dc54aee..484b2d4462c1 100644
--- a/arch/powerpc/kernel/dma.c
+++ b/arch/powerpc/kernel/dma.c
@@ -53,9 +53,16 @@ void *dma_direct_alloc_coherent(struct device *dev, size_t size,
53#else 53#else
54 struct page *page; 54 struct page *page;
55 int node = dev_to_node(dev); 55 int node = dev_to_node(dev);
56#ifdef CONFIG_FSL_SOC
56 u64 pfn = get_pfn_limit(dev); 57 u64 pfn = get_pfn_limit(dev);
57 int zone; 58 int zone;
58 59
60 /*
61 * This code should be OK on other platforms, but we have drivers that
62 * don't set coherent_dma_mask. As a workaround we just ifdef it. This
63 * whole routine needs some serious cleanup.
64 */
65
59 zone = dma_pfn_limit_to_zone(pfn); 66 zone = dma_pfn_limit_to_zone(pfn);
60 if (zone < 0) { 67 if (zone < 0) {
61 dev_err(dev, "%s: No suitable zone for pfn %#llx\n", 68 dev_err(dev, "%s: No suitable zone for pfn %#llx\n",
@@ -73,6 +80,7 @@ void *dma_direct_alloc_coherent(struct device *dev, size_t size,
73 break; 80 break;
74#endif 81#endif
75 }; 82 };
83#endif /* CONFIG_FSL_SOC */
76 84
77 /* ignore region specifiers */ 85 /* ignore region specifiers */
78 flag &= ~(__GFP_HIGHMEM); 86 flag &= ~(__GFP_HIGHMEM);
diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index d543e4179c18..2248a1999c64 100644
--- a/arch/powerpc/kernel/eeh.c
+++ b/arch/powerpc/kernel/eeh.c
@@ -257,6 +257,13 @@ static void *eeh_dump_pe_log(void *data, void *flag)
257 struct eeh_dev *edev, *tmp; 257 struct eeh_dev *edev, *tmp;
258 size_t *plen = flag; 258 size_t *plen = flag;
259 259
260 /* If the PE's config space is blocked, 0xFF's will be
261 * returned. It's pointless to collect the log in this
262 * case.
263 */
264 if (pe->state & EEH_PE_CFG_BLOCKED)
265 return NULL;
266
260 eeh_pe_for_each_dev(pe, edev, tmp) 267 eeh_pe_for_each_dev(pe, edev, tmp)
261 *plen += eeh_dump_dev_log(edev, pci_regs_buf + *plen, 268 *plen += eeh_dump_dev_log(edev, pci_regs_buf + *plen,
262 EEH_PCI_REGS_LOG_LEN - *plen); 269 EEH_PCI_REGS_LOG_LEN - *plen);
@@ -673,18 +680,18 @@ int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state stat
673 switch (state) { 680 switch (state) {
674 case pcie_deassert_reset: 681 case pcie_deassert_reset:
675 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE); 682 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
676 eeh_pe_state_clear(pe, EEH_PE_RESET); 683 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
677 break; 684 break;
678 case pcie_hot_reset: 685 case pcie_hot_reset:
679 eeh_pe_state_mark(pe, EEH_PE_RESET); 686 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
680 eeh_ops->reset(pe, EEH_RESET_HOT); 687 eeh_ops->reset(pe, EEH_RESET_HOT);
681 break; 688 break;
682 case pcie_warm_reset: 689 case pcie_warm_reset:
683 eeh_pe_state_mark(pe, EEH_PE_RESET); 690 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
684 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL); 691 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
685 break; 692 break;
686 default: 693 default:
687 eeh_pe_state_clear(pe, EEH_PE_RESET); 694 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
688 return -EINVAL; 695 return -EINVAL;
689 }; 696 };
690 697
@@ -1523,7 +1530,7 @@ int eeh_pe_reset(struct eeh_pe *pe, int option)
1523 switch (option) { 1530 switch (option) {
1524 case EEH_RESET_DEACTIVATE: 1531 case EEH_RESET_DEACTIVATE:
1525 ret = eeh_ops->reset(pe, option); 1532 ret = eeh_ops->reset(pe, option);
1526 eeh_pe_state_clear(pe, EEH_PE_RESET); 1533 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
1527 if (ret) 1534 if (ret)
1528 break; 1535 break;
1529 1536
@@ -1538,7 +1545,7 @@ int eeh_pe_reset(struct eeh_pe *pe, int option)
1538 */ 1545 */
1539 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE); 1546 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
1540 1547
1541 eeh_pe_state_mark(pe, EEH_PE_RESET); 1548 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
1542 ret = eeh_ops->reset(pe, option); 1549 ret = eeh_ops->reset(pe, option);
1543 break; 1550 break;
1544 default: 1551 default:
diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c
index 3fd514f8e4b2..6535936bdf27 100644
--- a/arch/powerpc/kernel/eeh_driver.c
+++ b/arch/powerpc/kernel/eeh_driver.c
@@ -528,13 +528,13 @@ int eeh_pe_reset_and_recover(struct eeh_pe *pe)
528 eeh_pe_dev_traverse(pe, eeh_report_error, &result); 528 eeh_pe_dev_traverse(pe, eeh_report_error, &result);
529 529
530 /* Issue reset */ 530 /* Issue reset */
531 eeh_pe_state_mark(pe, EEH_PE_RESET); 531 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
532 ret = eeh_reset_pe(pe); 532 ret = eeh_reset_pe(pe);
533 if (ret) { 533 if (ret) {
534 eeh_pe_state_clear(pe, EEH_PE_RECOVERING | EEH_PE_RESET); 534 eeh_pe_state_clear(pe, EEH_PE_RECOVERING | EEH_PE_CFG_BLOCKED);
535 return ret; 535 return ret;
536 } 536 }
537 eeh_pe_state_clear(pe, EEH_PE_RESET); 537 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
538 538
539 /* Unfreeze the PE */ 539 /* Unfreeze the PE */
540 ret = eeh_clear_pe_frozen_state(pe, true); 540 ret = eeh_clear_pe_frozen_state(pe, true);
@@ -601,10 +601,10 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus)
601 * config accesses. So we prefer to block them. However, controlled 601 * config accesses. So we prefer to block them. However, controlled
602 * PCI config accesses initiated from EEH itself are allowed. 602 * PCI config accesses initiated from EEH itself are allowed.
603 */ 603 */
604 eeh_pe_state_mark(pe, EEH_PE_RESET); 604 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
605 rc = eeh_reset_pe(pe); 605 rc = eeh_reset_pe(pe);
606 if (rc) { 606 if (rc) {
607 eeh_pe_state_clear(pe, EEH_PE_RESET); 607 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
608 return rc; 608 return rc;
609 } 609 }
610 610
@@ -613,7 +613,7 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus)
613 /* Restore PE */ 613 /* Restore PE */
614 eeh_ops->configure_bridge(pe); 614 eeh_ops->configure_bridge(pe);
615 eeh_pe_restore_bars(pe); 615 eeh_pe_restore_bars(pe);
616 eeh_pe_state_clear(pe, EEH_PE_RESET); 616 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
617 617
618 /* Clear frozen state */ 618 /* Clear frozen state */
619 rc = eeh_clear_pe_frozen_state(pe, false); 619 rc = eeh_clear_pe_frozen_state(pe, false);
diff --git a/arch/powerpc/kernel/eeh_pe.c b/arch/powerpc/kernel/eeh_pe.c
index 53dd0915e690..5a63e2b0f65b 100644
--- a/arch/powerpc/kernel/eeh_pe.c
+++ b/arch/powerpc/kernel/eeh_pe.c
@@ -525,7 +525,7 @@ static void *__eeh_pe_state_mark(void *data, void *flag)
525 pe->state |= state; 525 pe->state |= state;
526 526
527 /* Offline PCI devices if applicable */ 527 /* Offline PCI devices if applicable */
528 if (state != EEH_PE_ISOLATED) 528 if (!(state & EEH_PE_ISOLATED))
529 return NULL; 529 return NULL;
530 530
531 eeh_pe_for_each_dev(pe, edev, tmp) { 531 eeh_pe_for_each_dev(pe, edev, tmp) {
@@ -534,6 +534,10 @@ static void *__eeh_pe_state_mark(void *data, void *flag)
534 pdev->error_state = pci_channel_io_frozen; 534 pdev->error_state = pci_channel_io_frozen;
535 } 535 }
536 536
537 /* Block PCI config access if required */
538 if (pe->state & EEH_PE_CFG_RESTRICTED)
539 pe->state |= EEH_PE_CFG_BLOCKED;
540
537 return NULL; 541 return NULL;
538} 542}
539 543
@@ -611,6 +615,10 @@ static void *__eeh_pe_state_clear(void *data, void *flag)
611 pdev->error_state = pci_channel_io_normal; 615 pdev->error_state = pci_channel_io_normal;
612 } 616 }
613 617
618 /* Unblock PCI config access if required */
619 if (pe->state & EEH_PE_CFG_RESTRICTED)
620 pe->state &= ~EEH_PE_CFG_BLOCKED;
621
614 return NULL; 622 return NULL;
615} 623}
616 624
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 5bbd1bc8c3b0..0905c8da90f1 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -659,7 +659,13 @@ _GLOBAL(ret_from_except_lite)
6593: 6593:
660#endif 660#endif
661 bl save_nvgprs 661 bl save_nvgprs
662 /*
663 * Use a non volatile GPR to save and restore our thread_info flags
664 * across the call to restore_interrupts.
665 */
666 mr r30,r4
662 bl restore_interrupts 667 bl restore_interrupts
668 mr r4,r30
663 addi r3,r1,STACK_FRAME_OVERHEAD 669 addi r3,r1,STACK_FRAME_OVERHEAD
664 bl do_notify_resume 670 bl do_notify_resume
665 b ret_from_except 671 b ret_from_except
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 050f79a4a168..72e783ea0681 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -1270,11 +1270,6 @@ hmi_exception_early:
1270 addi r3,r1,STACK_FRAME_OVERHEAD 1270 addi r3,r1,STACK_FRAME_OVERHEAD
1271 bl hmi_exception_realmode 1271 bl hmi_exception_realmode
1272 /* Windup the stack. */ 1272 /* Windup the stack. */
1273 /* Clear MSR_RI before setting SRR0 and SRR1. */
1274 li r0,MSR_RI
1275 mfmsr r9 /* get MSR value */
1276 andc r9,r9,r0
1277 mtmsrd r9,1 /* Clear MSR_RI */
1278 /* Move original HSRR0 and HSRR1 into the respective regs */ 1273 /* Move original HSRR0 and HSRR1 into the respective regs */
1279 ld r9,_MSR(r1) 1274 ld r9,_MSR(r1)
1280 mtspr SPRN_HSRR1,r9 1275 mtspr SPRN_HSRR1,r9
diff --git a/arch/powerpc/kernel/fadump.c b/arch/powerpc/kernel/fadump.c
index 742694c1d852..26d091a1a54c 100644
--- a/arch/powerpc/kernel/fadump.c
+++ b/arch/powerpc/kernel/fadump.c
@@ -58,7 +58,7 @@ int __init early_init_dt_scan_fw_dump(unsigned long node,
58 const __be32 *sections; 58 const __be32 *sections;
59 int i, num_sections; 59 int i, num_sections;
60 int size; 60 int size;
61 const int *token; 61 const __be32 *token;
62 62
63 if (depth != 1 || strcmp(uname, "rtas") != 0) 63 if (depth != 1 || strcmp(uname, "rtas") != 0)
64 return 0; 64 return 0;
@@ -72,7 +72,7 @@ int __init early_init_dt_scan_fw_dump(unsigned long node,
72 return 1; 72 return 1;
73 73
74 fw_dump.fadump_supported = 1; 74 fw_dump.fadump_supported = 1;
75 fw_dump.ibm_configure_kernel_dump = *token; 75 fw_dump.ibm_configure_kernel_dump = be32_to_cpu(*token);
76 76
77 /* 77 /*
78 * The 'ibm,kernel-dump' rtas node is present only if there is 78 * The 'ibm,kernel-dump' rtas node is present only if there is
@@ -147,11 +147,11 @@ static unsigned long init_fadump_mem_struct(struct fadump_mem_struct *fdm,
147 memset(fdm, 0, sizeof(struct fadump_mem_struct)); 147 memset(fdm, 0, sizeof(struct fadump_mem_struct));
148 addr = addr & PAGE_MASK; 148 addr = addr & PAGE_MASK;
149 149
150 fdm->header.dump_format_version = 0x00000001; 150 fdm->header.dump_format_version = cpu_to_be32(0x00000001);
151 fdm->header.dump_num_sections = 3; 151 fdm->header.dump_num_sections = cpu_to_be16(3);
152 fdm->header.dump_status_flag = 0; 152 fdm->header.dump_status_flag = 0;
153 fdm->header.offset_first_dump_section = 153 fdm->header.offset_first_dump_section =
154 (u32)offsetof(struct fadump_mem_struct, cpu_state_data); 154 cpu_to_be32((u32)offsetof(struct fadump_mem_struct, cpu_state_data));
155 155
156 /* 156 /*
157 * Fields for disk dump option. 157 * Fields for disk dump option.
@@ -167,27 +167,27 @@ static unsigned long init_fadump_mem_struct(struct fadump_mem_struct *fdm,
167 167
168 /* Kernel dump sections */ 168 /* Kernel dump sections */
169 /* cpu state data section. */ 169 /* cpu state data section. */
170 fdm->cpu_state_data.request_flag = FADUMP_REQUEST_FLAG; 170 fdm->cpu_state_data.request_flag = cpu_to_be32(FADUMP_REQUEST_FLAG);
171 fdm->cpu_state_data.source_data_type = FADUMP_CPU_STATE_DATA; 171 fdm->cpu_state_data.source_data_type = cpu_to_be16(FADUMP_CPU_STATE_DATA);
172 fdm->cpu_state_data.source_address = 0; 172 fdm->cpu_state_data.source_address = 0;
173 fdm->cpu_state_data.source_len = fw_dump.cpu_state_data_size; 173 fdm->cpu_state_data.source_len = cpu_to_be64(fw_dump.cpu_state_data_size);
174 fdm->cpu_state_data.destination_address = addr; 174 fdm->cpu_state_data.destination_address = cpu_to_be64(addr);
175 addr += fw_dump.cpu_state_data_size; 175 addr += fw_dump.cpu_state_data_size;
176 176
177 /* hpte region section */ 177 /* hpte region section */
178 fdm->hpte_region.request_flag = FADUMP_REQUEST_FLAG; 178 fdm->hpte_region.request_flag = cpu_to_be32(FADUMP_REQUEST_FLAG);
179 fdm->hpte_region.source_data_type = FADUMP_HPTE_REGION; 179 fdm->hpte_region.source_data_type = cpu_to_be16(FADUMP_HPTE_REGION);
180 fdm->hpte_region.source_address = 0; 180 fdm->hpte_region.source_address = 0;
181 fdm->hpte_region.source_len = fw_dump.hpte_region_size; 181 fdm->hpte_region.source_len = cpu_to_be64(fw_dump.hpte_region_size);
182 fdm->hpte_region.destination_address = addr; 182 fdm->hpte_region.destination_address = cpu_to_be64(addr);
183 addr += fw_dump.hpte_region_size; 183 addr += fw_dump.hpte_region_size;
184 184
185 /* RMA region section */ 185 /* RMA region section */
186 fdm->rmr_region.request_flag = FADUMP_REQUEST_FLAG; 186 fdm->rmr_region.request_flag = cpu_to_be32(FADUMP_REQUEST_FLAG);
187 fdm->rmr_region.source_data_type = FADUMP_REAL_MODE_REGION; 187 fdm->rmr_region.source_data_type = cpu_to_be16(FADUMP_REAL_MODE_REGION);
188 fdm->rmr_region.source_address = RMA_START; 188 fdm->rmr_region.source_address = cpu_to_be64(RMA_START);
189 fdm->rmr_region.source_len = fw_dump.boot_memory_size; 189 fdm->rmr_region.source_len = cpu_to_be64(fw_dump.boot_memory_size);
190 fdm->rmr_region.destination_address = addr; 190 fdm->rmr_region.destination_address = cpu_to_be64(addr);
191 addr += fw_dump.boot_memory_size; 191 addr += fw_dump.boot_memory_size;
192 192
193 return addr; 193 return addr;
@@ -272,7 +272,7 @@ int __init fadump_reserve_mem(void)
272 * first kernel. 272 * first kernel.
273 */ 273 */
274 if (fdm_active) 274 if (fdm_active)
275 fw_dump.boot_memory_size = fdm_active->rmr_region.source_len; 275 fw_dump.boot_memory_size = be64_to_cpu(fdm_active->rmr_region.source_len);
276 else 276 else
277 fw_dump.boot_memory_size = fadump_calculate_reserve_size(); 277 fw_dump.boot_memory_size = fadump_calculate_reserve_size();
278 278
@@ -314,8 +314,8 @@ int __init fadump_reserve_mem(void)
314 (unsigned long)(base >> 20)); 314 (unsigned long)(base >> 20));
315 315
316 fw_dump.fadumphdr_addr = 316 fw_dump.fadumphdr_addr =
317 fdm_active->rmr_region.destination_address + 317 be64_to_cpu(fdm_active->rmr_region.destination_address) +
318 fdm_active->rmr_region.source_len; 318 be64_to_cpu(fdm_active->rmr_region.source_len);
319 pr_debug("fadumphdr_addr = %p\n", 319 pr_debug("fadumphdr_addr = %p\n",
320 (void *) fw_dump.fadumphdr_addr); 320 (void *) fw_dump.fadumphdr_addr);
321 } else { 321 } else {
@@ -472,9 +472,9 @@ fadump_read_registers(struct fadump_reg_entry *reg_entry, struct pt_regs *regs)
472{ 472{
473 memset(regs, 0, sizeof(struct pt_regs)); 473 memset(regs, 0, sizeof(struct pt_regs));
474 474
475 while (reg_entry->reg_id != REG_ID("CPUEND")) { 475 while (be64_to_cpu(reg_entry->reg_id) != REG_ID("CPUEND")) {
476 fadump_set_regval(regs, reg_entry->reg_id, 476 fadump_set_regval(regs, be64_to_cpu(reg_entry->reg_id),
477 reg_entry->reg_value); 477 be64_to_cpu(reg_entry->reg_value));
478 reg_entry++; 478 reg_entry++;
479 } 479 }
480 reg_entry++; 480 reg_entry++;
@@ -603,20 +603,20 @@ static int __init fadump_build_cpu_notes(const struct fadump_mem_struct *fdm)
603 if (!fdm->cpu_state_data.bytes_dumped) 603 if (!fdm->cpu_state_data.bytes_dumped)
604 return -EINVAL; 604 return -EINVAL;
605 605
606 addr = fdm->cpu_state_data.destination_address; 606 addr = be64_to_cpu(fdm->cpu_state_data.destination_address);
607 vaddr = __va(addr); 607 vaddr = __va(addr);
608 608
609 reg_header = vaddr; 609 reg_header = vaddr;
610 if (reg_header->magic_number != REGSAVE_AREA_MAGIC) { 610 if (be64_to_cpu(reg_header->magic_number) != REGSAVE_AREA_MAGIC) {
611 printk(KERN_ERR "Unable to read register save area.\n"); 611 printk(KERN_ERR "Unable to read register save area.\n");
612 return -ENOENT; 612 return -ENOENT;
613 } 613 }
614 pr_debug("--------CPU State Data------------\n"); 614 pr_debug("--------CPU State Data------------\n");
615 pr_debug("Magic Number: %llx\n", reg_header->magic_number); 615 pr_debug("Magic Number: %llx\n", be64_to_cpu(reg_header->magic_number));
616 pr_debug("NumCpuOffset: %x\n", reg_header->num_cpu_offset); 616 pr_debug("NumCpuOffset: %x\n", be32_to_cpu(reg_header->num_cpu_offset));
617 617
618 vaddr += reg_header->num_cpu_offset; 618 vaddr += be32_to_cpu(reg_header->num_cpu_offset);
619 num_cpus = *((u32 *)(vaddr)); 619 num_cpus = be32_to_cpu(*((__be32 *)(vaddr)));
620 pr_debug("NumCpus : %u\n", num_cpus); 620 pr_debug("NumCpus : %u\n", num_cpus);
621 vaddr += sizeof(u32); 621 vaddr += sizeof(u32);
622 reg_entry = (struct fadump_reg_entry *)vaddr; 622 reg_entry = (struct fadump_reg_entry *)vaddr;
@@ -639,13 +639,13 @@ static int __init fadump_build_cpu_notes(const struct fadump_mem_struct *fdm)
639 fdh = __va(fw_dump.fadumphdr_addr); 639 fdh = __va(fw_dump.fadumphdr_addr);
640 640
641 for (i = 0; i < num_cpus; i++) { 641 for (i = 0; i < num_cpus; i++) {
642 if (reg_entry->reg_id != REG_ID("CPUSTRT")) { 642 if (be64_to_cpu(reg_entry->reg_id) != REG_ID("CPUSTRT")) {
643 printk(KERN_ERR "Unable to read CPU state data\n"); 643 printk(KERN_ERR "Unable to read CPU state data\n");
644 rc = -ENOENT; 644 rc = -ENOENT;
645 goto error_out; 645 goto error_out;
646 } 646 }
647 /* Lower 4 bytes of reg_value contains logical cpu id */ 647 /* Lower 4 bytes of reg_value contains logical cpu id */
648 cpu = reg_entry->reg_value & FADUMP_CPU_ID_MASK; 648 cpu = be64_to_cpu(reg_entry->reg_value) & FADUMP_CPU_ID_MASK;
649 if (fdh && !cpumask_test_cpu(cpu, &fdh->cpu_online_mask)) { 649 if (fdh && !cpumask_test_cpu(cpu, &fdh->cpu_online_mask)) {
650 SKIP_TO_NEXT_CPU(reg_entry); 650 SKIP_TO_NEXT_CPU(reg_entry);
651 continue; 651 continue;
@@ -692,7 +692,7 @@ static int __init process_fadump(const struct fadump_mem_struct *fdm_active)
692 return -EINVAL; 692 return -EINVAL;
693 693
694 /* Check if the dump data is valid. */ 694 /* Check if the dump data is valid. */
695 if ((fdm_active->header.dump_status_flag == FADUMP_ERROR_FLAG) || 695 if ((be16_to_cpu(fdm_active->header.dump_status_flag) == FADUMP_ERROR_FLAG) ||
696 (fdm_active->cpu_state_data.error_flags != 0) || 696 (fdm_active->cpu_state_data.error_flags != 0) ||
697 (fdm_active->rmr_region.error_flags != 0)) { 697 (fdm_active->rmr_region.error_flags != 0)) {
698 printk(KERN_ERR "Dump taken by platform is not valid\n"); 698 printk(KERN_ERR "Dump taken by platform is not valid\n");
@@ -828,7 +828,7 @@ static void fadump_setup_crash_memory_ranges(void)
828static inline unsigned long fadump_relocate(unsigned long paddr) 828static inline unsigned long fadump_relocate(unsigned long paddr)
829{ 829{
830 if (paddr > RMA_START && paddr < fw_dump.boot_memory_size) 830 if (paddr > RMA_START && paddr < fw_dump.boot_memory_size)
831 return fdm.rmr_region.destination_address + paddr; 831 return be64_to_cpu(fdm.rmr_region.destination_address) + paddr;
832 else 832 else
833 return paddr; 833 return paddr;
834} 834}
@@ -902,7 +902,7 @@ static int fadump_create_elfcore_headers(char *bufp)
902 * to the specified destination_address. Hence set 902 * to the specified destination_address. Hence set
903 * the correct offset. 903 * the correct offset.
904 */ 904 */
905 phdr->p_offset = fdm.rmr_region.destination_address; 905 phdr->p_offset = be64_to_cpu(fdm.rmr_region.destination_address);
906 } 906 }
907 907
908 phdr->p_paddr = mbase; 908 phdr->p_paddr = mbase;
@@ -951,7 +951,7 @@ static void register_fadump(void)
951 951
952 fadump_setup_crash_memory_ranges(); 952 fadump_setup_crash_memory_ranges();
953 953
954 addr = fdm.rmr_region.destination_address + fdm.rmr_region.source_len; 954 addr = be64_to_cpu(fdm.rmr_region.destination_address) + be64_to_cpu(fdm.rmr_region.source_len);
955 /* Initialize fadump crash info header. */ 955 /* Initialize fadump crash info header. */
956 addr = init_fadump_header(addr); 956 addr = init_fadump_header(addr);
957 vaddr = __va(addr); 957 vaddr = __va(addr);
@@ -1023,7 +1023,7 @@ void fadump_cleanup(void)
1023 /* Invalidate the registration only if dump is active. */ 1023 /* Invalidate the registration only if dump is active. */
1024 if (fw_dump.dump_active) { 1024 if (fw_dump.dump_active) {
1025 init_fadump_mem_struct(&fdm, 1025 init_fadump_mem_struct(&fdm,
1026 fdm_active->cpu_state_data.destination_address); 1026 be64_to_cpu(fdm_active->cpu_state_data.destination_address));
1027 fadump_invalidate_dump(&fdm); 1027 fadump_invalidate_dump(&fdm);
1028 } 1028 }
1029} 1029}
@@ -1063,7 +1063,7 @@ static void fadump_invalidate_release_mem(void)
1063 return; 1063 return;
1064 } 1064 }
1065 1065
1066 destination_address = fdm_active->cpu_state_data.destination_address; 1066 destination_address = be64_to_cpu(fdm_active->cpu_state_data.destination_address);
1067 fadump_cleanup(); 1067 fadump_cleanup();
1068 mutex_unlock(&fadump_mutex); 1068 mutex_unlock(&fadump_mutex);
1069 1069
@@ -1183,31 +1183,31 @@ static int fadump_region_show(struct seq_file *m, void *private)
1183 seq_printf(m, 1183 seq_printf(m,
1184 "CPU : [%#016llx-%#016llx] %#llx bytes, " 1184 "CPU : [%#016llx-%#016llx] %#llx bytes, "
1185 "Dumped: %#llx\n", 1185 "Dumped: %#llx\n",
1186 fdm_ptr->cpu_state_data.destination_address, 1186 be64_to_cpu(fdm_ptr->cpu_state_data.destination_address),
1187 fdm_ptr->cpu_state_data.destination_address + 1187 be64_to_cpu(fdm_ptr->cpu_state_data.destination_address) +
1188 fdm_ptr->cpu_state_data.source_len - 1, 1188 be64_to_cpu(fdm_ptr->cpu_state_data.source_len) - 1,
1189 fdm_ptr->cpu_state_data.source_len, 1189 be64_to_cpu(fdm_ptr->cpu_state_data.source_len),
1190 fdm_ptr->cpu_state_data.bytes_dumped); 1190 be64_to_cpu(fdm_ptr->cpu_state_data.bytes_dumped));
1191 seq_printf(m, 1191 seq_printf(m,
1192 "HPTE: [%#016llx-%#016llx] %#llx bytes, " 1192 "HPTE: [%#016llx-%#016llx] %#llx bytes, "
1193 "Dumped: %#llx\n", 1193 "Dumped: %#llx\n",
1194 fdm_ptr->hpte_region.destination_address, 1194 be64_to_cpu(fdm_ptr->hpte_region.destination_address),
1195 fdm_ptr->hpte_region.destination_address + 1195 be64_to_cpu(fdm_ptr->hpte_region.destination_address) +
1196 fdm_ptr->hpte_region.source_len - 1, 1196 be64_to_cpu(fdm_ptr->hpte_region.source_len) - 1,
1197 fdm_ptr->hpte_region.source_len, 1197 be64_to_cpu(fdm_ptr->hpte_region.source_len),
1198 fdm_ptr->hpte_region.bytes_dumped); 1198 be64_to_cpu(fdm_ptr->hpte_region.bytes_dumped));
1199 seq_printf(m, 1199 seq_printf(m,
1200 "DUMP: [%#016llx-%#016llx] %#llx bytes, " 1200 "DUMP: [%#016llx-%#016llx] %#llx bytes, "
1201 "Dumped: %#llx\n", 1201 "Dumped: %#llx\n",
1202 fdm_ptr->rmr_region.destination_address, 1202 be64_to_cpu(fdm_ptr->rmr_region.destination_address),
1203 fdm_ptr->rmr_region.destination_address + 1203 be64_to_cpu(fdm_ptr->rmr_region.destination_address) +
1204 fdm_ptr->rmr_region.source_len - 1, 1204 be64_to_cpu(fdm_ptr->rmr_region.source_len) - 1,
1205 fdm_ptr->rmr_region.source_len, 1205 be64_to_cpu(fdm_ptr->rmr_region.source_len),
1206 fdm_ptr->rmr_region.bytes_dumped); 1206 be64_to_cpu(fdm_ptr->rmr_region.bytes_dumped));
1207 1207
1208 if (!fdm_active || 1208 if (!fdm_active ||
1209 (fw_dump.reserve_dump_area_start == 1209 (fw_dump.reserve_dump_area_start ==
1210 fdm_ptr->cpu_state_data.destination_address)) 1210 be64_to_cpu(fdm_ptr->cpu_state_data.destination_address)))
1211 goto out; 1211 goto out;
1212 1212
1213 /* Dump is active. Show reserved memory region. */ 1213 /* Dump is active. Show reserved memory region. */
@@ -1215,10 +1215,10 @@ static int fadump_region_show(struct seq_file *m, void *private)
1215 " : [%#016llx-%#016llx] %#llx bytes, " 1215 " : [%#016llx-%#016llx] %#llx bytes, "
1216 "Dumped: %#llx\n", 1216 "Dumped: %#llx\n",
1217 (unsigned long long)fw_dump.reserve_dump_area_start, 1217 (unsigned long long)fw_dump.reserve_dump_area_start,
1218 fdm_ptr->cpu_state_data.destination_address - 1, 1218 be64_to_cpu(fdm_ptr->cpu_state_data.destination_address) - 1,
1219 fdm_ptr->cpu_state_data.destination_address - 1219 be64_to_cpu(fdm_ptr->cpu_state_data.destination_address) -
1220 fw_dump.reserve_dump_area_start, 1220 fw_dump.reserve_dump_area_start,
1221 fdm_ptr->cpu_state_data.destination_address - 1221 be64_to_cpu(fdm_ptr->cpu_state_data.destination_address) -
1222 fw_dump.reserve_dump_area_start); 1222 fw_dump.reserve_dump_area_start);
1223out: 1223out:
1224 if (fdm_active) 1224 if (fdm_active)
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 8eb857f216c1..c14383575fe8 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -466,7 +466,7 @@ static inline void check_stack_overflow(void)
466#ifdef CONFIG_DEBUG_STACKOVERFLOW 466#ifdef CONFIG_DEBUG_STACKOVERFLOW
467 long sp; 467 long sp;
468 468
469 sp = __get_SP() & (THREAD_SIZE-1); 469 sp = current_stack_pointer() & (THREAD_SIZE-1);
470 470
471 /* check for stack overflow: is there less than 2KB free? */ 471 /* check for stack overflow: is there less than 2KB free? */
472 if (unlikely(sp < (sizeof(struct thread_info) + 2048))) { 472 if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
diff --git a/arch/powerpc/kernel/misc.S b/arch/powerpc/kernel/misc.S
index 7ce26d45777e..0d432194c018 100644
--- a/arch/powerpc/kernel/misc.S
+++ b/arch/powerpc/kernel/misc.S
@@ -114,3 +114,7 @@ _GLOBAL(longjmp)
114 mtlr r0 114 mtlr r0
115 mr r3,r4 115 mr r3,r4
116 blr 116 blr
117
118_GLOBAL(current_stack_pointer)
119 PPC_LL r3,0(r1)
120 blr
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index c4dfff6c2719..202963ee013a 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -41,3 +41,5 @@ EXPORT_SYMBOL(giveup_spe);
41#ifdef CONFIG_EPAPR_PARAVIRT 41#ifdef CONFIG_EPAPR_PARAVIRT
42EXPORT_SYMBOL(epapr_hypercall_start); 42EXPORT_SYMBOL(epapr_hypercall_start);
43#endif 43#endif
44
45EXPORT_SYMBOL(current_stack_pointer);
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index aa1df89c8b2a..923cd2daba89 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -1545,7 +1545,7 @@ void show_stack(struct task_struct *tsk, unsigned long *stack)
1545 tsk = current; 1545 tsk = current;
1546 if (sp == 0) { 1546 if (sp == 0) {
1547 if (tsk == current) 1547 if (tsk == current)
1548 asm("mr %0,1" : "=r" (sp)); 1548 sp = current_stack_pointer();
1549 else 1549 else
1550 sp = tsk->thread.ksp; 1550 sp = tsk->thread.ksp;
1551 } 1551 }
diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c
index c168337aef9d..7c55b86206b3 100644
--- a/arch/powerpc/kernel/rtas_pci.c
+++ b/arch/powerpc/kernel/rtas_pci.c
@@ -66,6 +66,11 @@ int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
66 return PCIBIOS_DEVICE_NOT_FOUND; 66 return PCIBIOS_DEVICE_NOT_FOUND;
67 if (!config_access_valid(pdn, where)) 67 if (!config_access_valid(pdn, where))
68 return PCIBIOS_BAD_REGISTER_NUMBER; 68 return PCIBIOS_BAD_REGISTER_NUMBER;
69#ifdef CONFIG_EEH
70 if (pdn->edev && pdn->edev->pe &&
71 (pdn->edev->pe->state & EEH_PE_CFG_BLOCKED))
72 return PCIBIOS_SET_FAILED;
73#endif
69 74
70 addr = rtas_config_addr(pdn->busno, pdn->devfn, where); 75 addr = rtas_config_addr(pdn->busno, pdn->devfn, where);
71 buid = pdn->phb->buid; 76 buid = pdn->phb->buid;
@@ -90,9 +95,6 @@ static int rtas_pci_read_config(struct pci_bus *bus,
90 struct device_node *busdn, *dn; 95 struct device_node *busdn, *dn;
91 struct pci_dn *pdn; 96 struct pci_dn *pdn;
92 bool found = false; 97 bool found = false;
93#ifdef CONFIG_EEH
94 struct eeh_dev *edev;
95#endif
96 int ret; 98 int ret;
97 99
98 /* Search only direct children of the bus */ 100 /* Search only direct children of the bus */
@@ -109,11 +111,6 @@ static int rtas_pci_read_config(struct pci_bus *bus,
109 111
110 if (!found) 112 if (!found)
111 return PCIBIOS_DEVICE_NOT_FOUND; 113 return PCIBIOS_DEVICE_NOT_FOUND;
112#ifdef CONFIG_EEH
113 edev = of_node_to_eeh_dev(dn);
114 if (edev && edev->pe && edev->pe->state & EEH_PE_RESET)
115 return PCIBIOS_DEVICE_NOT_FOUND;
116#endif
117 114
118 ret = rtas_read_config(pdn, where, size, val); 115 ret = rtas_read_config(pdn, where, size, val);
119 if (*val == EEH_IO_ERROR_VALUE(size) && 116 if (*val == EEH_IO_ERROR_VALUE(size) &&
@@ -132,6 +129,11 @@ int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val)
132 return PCIBIOS_DEVICE_NOT_FOUND; 129 return PCIBIOS_DEVICE_NOT_FOUND;
133 if (!config_access_valid(pdn, where)) 130 if (!config_access_valid(pdn, where))
134 return PCIBIOS_BAD_REGISTER_NUMBER; 131 return PCIBIOS_BAD_REGISTER_NUMBER;
132#ifdef CONFIG_EEH
133 if (pdn->edev && pdn->edev->pe &&
134 (pdn->edev->pe->state & EEH_PE_CFG_BLOCKED))
135 return PCIBIOS_SET_FAILED;
136#endif
135 137
136 addr = rtas_config_addr(pdn->busno, pdn->devfn, where); 138 addr = rtas_config_addr(pdn->busno, pdn->devfn, where);
137 buid = pdn->phb->buid; 139 buid = pdn->phb->buid;
@@ -155,10 +157,6 @@ static int rtas_pci_write_config(struct pci_bus *bus,
155 struct device_node *busdn, *dn; 157 struct device_node *busdn, *dn;
156 struct pci_dn *pdn; 158 struct pci_dn *pdn;
157 bool found = false; 159 bool found = false;
158#ifdef CONFIG_EEH
159 struct eeh_dev *edev;
160#endif
161 int ret;
162 160
163 /* Search only direct children of the bus */ 161 /* Search only direct children of the bus */
164 busdn = pci_bus_to_OF_node(bus); 162 busdn = pci_bus_to_OF_node(bus);
@@ -173,14 +171,8 @@ static int rtas_pci_write_config(struct pci_bus *bus,
173 171
174 if (!found) 172 if (!found)
175 return PCIBIOS_DEVICE_NOT_FOUND; 173 return PCIBIOS_DEVICE_NOT_FOUND;
176#ifdef CONFIG_EEH
177 edev = of_node_to_eeh_dev(dn);
178 if (edev && edev->pe && (edev->pe->state & EEH_PE_RESET))
179 return PCIBIOS_DEVICE_NOT_FOUND;
180#endif
181 ret = rtas_write_config(pdn, where, size, val);
182 174
183 return ret; 175 return rtas_write_config(pdn, where, size, val);
184} 176}
185 177
186static struct pci_ops rtas_pci_ops = { 178static struct pci_ops rtas_pci_ops = {
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index cd07d79ad21c..4f3cfe1b6a33 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -522,36 +522,36 @@ void __init setup_system(void)
522 smp_release_cpus(); 522 smp_release_cpus();
523#endif 523#endif
524 524
525 printk("Starting Linux PPC64 %s\n", init_utsname()->version); 525 pr_info("Starting Linux PPC64 %s\n", init_utsname()->version);
526 526
527 printk("-----------------------------------------------------\n"); 527 pr_info("-----------------------------------------------------\n");
528 printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size); 528 pr_info("ppc64_pft_size = 0x%llx\n", ppc64_pft_size);
529 printk("phys_mem_size = 0x%llx\n", memblock_phys_mem_size()); 529 pr_info("phys_mem_size = 0x%llx\n", memblock_phys_mem_size());
530 530
531 if (ppc64_caches.dline_size != 0x80) 531 if (ppc64_caches.dline_size != 0x80)
532 printk("dcache_line_size = 0x%x\n", ppc64_caches.dline_size); 532 pr_info("dcache_line_size = 0x%x\n", ppc64_caches.dline_size);
533 if (ppc64_caches.iline_size != 0x80) 533 if (ppc64_caches.iline_size != 0x80)
534 printk("icache_line_size = 0x%x\n", ppc64_caches.iline_size); 534 pr_info("icache_line_size = 0x%x\n", ppc64_caches.iline_size);
535 535
536 printk("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features); 536 pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features);
537 printk(" possible = 0x%016lx\n", CPU_FTRS_POSSIBLE); 537 pr_info(" possible = 0x%016lx\n", CPU_FTRS_POSSIBLE);
538 printk(" always = 0x%016lx\n", CPU_FTRS_ALWAYS); 538 pr_info(" always = 0x%016lx\n", CPU_FTRS_ALWAYS);
539 printk("cpu_user_features = 0x%08x 0x%08x\n", cur_cpu_spec->cpu_user_features, 539 pr_info("cpu_user_features = 0x%08x 0x%08x\n", cur_cpu_spec->cpu_user_features,
540 cur_cpu_spec->cpu_user_features2); 540 cur_cpu_spec->cpu_user_features2);
541 printk("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features); 541 pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features);
542 printk("firmware_features = 0x%016lx\n", powerpc_firmware_features); 542 pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
543 543
544#ifdef CONFIG_PPC_STD_MMU_64 544#ifdef CONFIG_PPC_STD_MMU_64
545 if (htab_address) 545 if (htab_address)
546 printk("htab_address = 0x%p\n", htab_address); 546 pr_info("htab_address = 0x%p\n", htab_address);
547 547
548 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); 548 pr_info("htab_hash_mask = 0x%lx\n", htab_hash_mask);
549#endif 549#endif
550 550
551 if (PHYSICAL_START > 0) 551 if (PHYSICAL_START > 0)
552 printk("physical_start = 0x%llx\n", 552 pr_info("physical_start = 0x%llx\n",
553 (unsigned long long)PHYSICAL_START); 553 (unsigned long long)PHYSICAL_START);
554 printk("-----------------------------------------------------\n"); 554 pr_info("-----------------------------------------------------\n");
555 555
556 DBG(" <- setup_system()\n"); 556 DBG(" <- setup_system()\n");
557} 557}
diff --git a/arch/powerpc/kernel/stacktrace.c b/arch/powerpc/kernel/stacktrace.c
index 3d30ef1038e5..ea43a347a104 100644
--- a/arch/powerpc/kernel/stacktrace.c
+++ b/arch/powerpc/kernel/stacktrace.c
@@ -50,7 +50,7 @@ void save_stack_trace(struct stack_trace *trace)
50{ 50{
51 unsigned long sp; 51 unsigned long sp;
52 52
53 asm("mr %0,1" : "=r" (sp)); 53 sp = current_stack_pointer();
54 54
55 save_context_stack(trace, sp, current, 1); 55 save_context_stack(trace, sp, current, 1);
56} 56}
diff --git a/arch/powerpc/mm/copro_fault.c b/arch/powerpc/mm/copro_fault.c
index 0f9939e693df..5a236f082c78 100644
--- a/arch/powerpc/mm/copro_fault.c
+++ b/arch/powerpc/mm/copro_fault.c
@@ -99,8 +99,6 @@ int copro_calculate_slb(struct mm_struct *mm, u64 ea, struct copro_slb *slb)
99 u64 vsid; 99 u64 vsid;
100 int psize, ssize; 100 int psize, ssize;
101 101
102 slb->esid = (ea & ESID_MASK) | SLB_ESID_V;
103
104 switch (REGION_ID(ea)) { 102 switch (REGION_ID(ea)) {
105 case USER_REGION_ID: 103 case USER_REGION_ID:
106 pr_devel("%s: 0x%llx -- USER_REGION_ID\n", __func__, ea); 104 pr_devel("%s: 0x%llx -- USER_REGION_ID\n", __func__, ea);
@@ -133,6 +131,7 @@ int copro_calculate_slb(struct mm_struct *mm, u64 ea, struct copro_slb *slb)
133 vsid |= mmu_psize_defs[psize].sllp | 131 vsid |= mmu_psize_defs[psize].sllp |
134 ((ssize == MMU_SEGSIZE_1T) ? SLB_VSID_B_1T : 0); 132 ((ssize == MMU_SEGSIZE_1T) ? SLB_VSID_B_1T : 0);
135 133
134 slb->esid = (ea & (ssize == MMU_SEGSIZE_1T ? ESID_MASK_1T : ESID_MASK)) | SLB_ESID_V;
136 slb->vsid = vsid; 135 slb->vsid = vsid;
137 136
138 return 0; 137 return 0;
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index cad68ff8eca5..415a51b028b9 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -103,7 +103,7 @@ unsigned long __max_low_memory = MAX_LOW_MEM;
103/* 103/*
104 * Check for command-line options that affect what MMU_init will do. 104 * Check for command-line options that affect what MMU_init will do.
105 */ 105 */
106void MMU_setup(void) 106void __init MMU_setup(void)
107{ 107{
108 /* Check for nobats option (used in mapin_ram). */ 108 /* Check for nobats option (used in mapin_ram). */
109 if (strstr(boot_command_line, "nobats")) { 109 if (strstr(boot_command_line, "nobats")) {
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index 649666d5d1c2..b9d1dfdbe5bb 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -8,6 +8,8 @@
8 * as published by the Free Software Foundation; either version 8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version. 9 * 2 of the License, or (at your option) any later version.
10 */ 10 */
11#define pr_fmt(fmt) "numa: " fmt
12
11#include <linux/threads.h> 13#include <linux/threads.h>
12#include <linux/bootmem.h> 14#include <linux/bootmem.h>
13#include <linux/init.h> 15#include <linux/init.h>
@@ -1153,6 +1155,22 @@ static int __init early_numa(char *p)
1153} 1155}
1154early_param("numa", early_numa); 1156early_param("numa", early_numa);
1155 1157
1158static bool topology_updates_enabled = true;
1159
1160static int __init early_topology_updates(char *p)
1161{
1162 if (!p)
1163 return 0;
1164
1165 if (!strcmp(p, "off")) {
1166 pr_info("Disabling topology updates\n");
1167 topology_updates_enabled = false;
1168 }
1169
1170 return 0;
1171}
1172early_param("topology_updates", early_topology_updates);
1173
1156#ifdef CONFIG_MEMORY_HOTPLUG 1174#ifdef CONFIG_MEMORY_HOTPLUG
1157/* 1175/*
1158 * Find the node associated with a hot added memory section for 1176 * Find the node associated with a hot added memory section for
@@ -1442,8 +1460,11 @@ static long hcall_vphn(unsigned long cpu, __be32 *associativity)
1442 long retbuf[PLPAR_HCALL9_BUFSIZE] = {0}; 1460 long retbuf[PLPAR_HCALL9_BUFSIZE] = {0};
1443 u64 flags = 1; 1461 u64 flags = 1;
1444 int hwcpu = get_hard_smp_processor_id(cpu); 1462 int hwcpu = get_hard_smp_processor_id(cpu);
1463 int i;
1445 1464
1446 rc = plpar_hcall9(H_HOME_NODE_ASSOCIATIVITY, retbuf, flags, hwcpu); 1465 rc = plpar_hcall9(H_HOME_NODE_ASSOCIATIVITY, retbuf, flags, hwcpu);
1466 for (i = 0; i < 6; i++)
1467 retbuf[i] = cpu_to_be64(retbuf[i]);
1447 vphn_unpack_associativity(retbuf, associativity); 1468 vphn_unpack_associativity(retbuf, associativity);
1448 1469
1449 return rc; 1470 return rc;
@@ -1488,11 +1509,14 @@ static int update_cpu_topology(void *data)
1488 cpu = smp_processor_id(); 1509 cpu = smp_processor_id();
1489 1510
1490 for (update = data; update; update = update->next) { 1511 for (update = data; update; update = update->next) {
1512 int new_nid = update->new_nid;
1491 if (cpu != update->cpu) 1513 if (cpu != update->cpu)
1492 continue; 1514 continue;
1493 1515
1494 unmap_cpu_from_node(update->cpu); 1516 unmap_cpu_from_node(cpu);
1495 map_cpu_to_node(update->cpu, update->new_nid); 1517 map_cpu_to_node(cpu, new_nid);
1518 set_cpu_numa_node(cpu, new_nid);
1519 set_cpu_numa_mem(cpu, local_memory_node(new_nid));
1496 vdso_getcpu_init(); 1520 vdso_getcpu_init();
1497 } 1521 }
1498 1522
@@ -1539,6 +1563,9 @@ int arch_update_cpu_topology(void)
1539 struct device *dev; 1563 struct device *dev;
1540 int weight, new_nid, i = 0; 1564 int weight, new_nid, i = 0;
1541 1565
1566 if (!prrn_enabled && !vphn_enabled)
1567 return 0;
1568
1542 weight = cpumask_weight(&cpu_associativity_changes_mask); 1569 weight = cpumask_weight(&cpu_associativity_changes_mask);
1543 if (!weight) 1570 if (!weight)
1544 return 0; 1571 return 0;
@@ -1592,6 +1619,15 @@ int arch_update_cpu_topology(void)
1592 cpu = cpu_last_thread_sibling(cpu); 1619 cpu = cpu_last_thread_sibling(cpu);
1593 } 1620 }
1594 1621
1622 pr_debug("Topology update for the following CPUs:\n");
1623 if (cpumask_weight(&updated_cpus)) {
1624 for (ud = &updates[0]; ud; ud = ud->next) {
1625 pr_debug("cpu %d moving from node %d "
1626 "to %d\n", ud->cpu,
1627 ud->old_nid, ud->new_nid);
1628 }
1629 }
1630
1595 /* 1631 /*
1596 * In cases where we have nothing to update (because the updates list 1632 * In cases where we have nothing to update (because the updates list
1597 * is too short or because the new topology is same as the old one), 1633 * is too short or because the new topology is same as the old one),
@@ -1800,8 +1836,12 @@ static const struct file_operations topology_ops = {
1800 1836
1801static int topology_update_init(void) 1837static int topology_update_init(void)
1802{ 1838{
1803 start_topology_update(); 1839 /* Do not poll for changes if disabled at boot */
1804 proc_create("powerpc/topology_updates", 0644, NULL, &topology_ops); 1840 if (topology_updates_enabled)
1841 start_topology_update();
1842
1843 if (!proc_create("powerpc/topology_updates", 0644, NULL, &topology_ops))
1844 return -ENOMEM;
1805 1845
1806 return 0; 1846 return 0;
1807} 1847}
diff --git a/arch/powerpc/mm/slice.c b/arch/powerpc/mm/slice.c
index 8d7bda94d196..ded0ea1afde4 100644
--- a/arch/powerpc/mm/slice.c
+++ b/arch/powerpc/mm/slice.c
@@ -682,6 +682,7 @@ void slice_set_range_psize(struct mm_struct *mm, unsigned long start,
682 slice_convert(mm, mask, psize); 682 slice_convert(mm, mask, psize);
683} 683}
684 684
685#ifdef CONFIG_HUGETLB_PAGE
685/* 686/*
686 * is_hugepage_only_range() is used by generic code to verify whether 687 * is_hugepage_only_range() is used by generic code to verify whether
687 * a normal mmap mapping (non hugetlbfs) is valid on a given area. 688 * a normal mmap mapping (non hugetlbfs) is valid on a given area.
@@ -726,4 +727,4 @@ int is_hugepage_only_range(struct mm_struct *mm, unsigned long addr,
726#endif 727#endif
727 return !slice_check_fit(mask, available); 728 return !slice_check_fit(mask, available);
728} 729}
729 730#endif
diff --git a/arch/powerpc/perf/hv-24x7.c b/arch/powerpc/perf/hv-24x7.c
index 6c8710dd90c9..dba34088da28 100644
--- a/arch/powerpc/perf/hv-24x7.c
+++ b/arch/powerpc/perf/hv-24x7.c
@@ -417,11 +417,6 @@ static int h_24x7_event_add(struct perf_event *event, int flags)
417 return 0; 417 return 0;
418} 418}
419 419
420static int h_24x7_event_idx(struct perf_event *event)
421{
422 return 0;
423}
424
425static struct pmu h_24x7_pmu = { 420static struct pmu h_24x7_pmu = {
426 .task_ctx_nr = perf_invalid_context, 421 .task_ctx_nr = perf_invalid_context,
427 422
@@ -433,7 +428,6 @@ static struct pmu h_24x7_pmu = {
433 .start = h_24x7_event_start, 428 .start = h_24x7_event_start,
434 .stop = h_24x7_event_stop, 429 .stop = h_24x7_event_stop,
435 .read = h_24x7_event_update, 430 .read = h_24x7_event_update,
436 .event_idx = h_24x7_event_idx,
437}; 431};
438 432
439static int hv_24x7_init(void) 433static int hv_24x7_init(void)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 15fc76c93022..a051fe946c63 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -246,11 +246,6 @@ static int h_gpci_event_init(struct perf_event *event)
246 return 0; 246 return 0;
247} 247}
248 248
249static int h_gpci_event_idx(struct perf_event *event)
250{
251 return 0;
252}
253
254static struct pmu h_gpci_pmu = { 249static struct pmu h_gpci_pmu = {
255 .task_ctx_nr = perf_invalid_context, 250 .task_ctx_nr = perf_invalid_context,
256 251
@@ -262,7 +257,6 @@ static struct pmu h_gpci_pmu = {
262 .start = h_gpci_event_start, 257 .start = h_gpci_event_start,
263 .stop = h_gpci_event_stop, 258 .stop = h_gpci_event_stop,
264 .read = h_gpci_event_update, 259 .read = h_gpci_event_update,
265 .event_idx = h_gpci_event_idx,
266}; 260};
267 261
268static int hv_gpci_init(void) 262static int hv_gpci_init(void)
diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c
index 426814a2ede3..eba9cb10619c 100644
--- a/arch/powerpc/platforms/powernv/eeh-ioda.c
+++ b/arch/powerpc/platforms/powernv/eeh-ioda.c
@@ -373,7 +373,7 @@ static int ioda_eeh_get_pe_state(struct eeh_pe *pe)
373 * moving forward, we have to return operational 373 * moving forward, we have to return operational
374 * state during PE reset. 374 * state during PE reset.
375 */ 375 */
376 if (pe->state & EEH_PE_RESET) { 376 if (pe->state & EEH_PE_CFG_BLOCKED) {
377 result = (EEH_STATE_MMIO_ACTIVE | 377 result = (EEH_STATE_MMIO_ACTIVE |
378 EEH_STATE_DMA_ACTIVE | 378 EEH_STATE_DMA_ACTIVE |
379 EEH_STATE_MMIO_ENABLED | 379 EEH_STATE_MMIO_ENABLED |
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
index 3e89cbf55885..1d19e7917d7f 100644
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -169,6 +169,26 @@ static int powernv_eeh_dev_probe(struct pci_dev *dev, void *flag)
169 } 169 }
170 170
171 /* 171 /*
172 * If the PE contains any one of following adapters, the
173 * PCI config space can't be accessed when dumping EEH log.
174 * Otherwise, we will run into fenced PHB caused by shortage
175 * of outbound credits in the adapter. The PCI config access
176 * should be blocked until PE reset. MMIO access is dropped
177 * by hardware certainly. In order to drop PCI config requests,
178 * one more flag (EEH_PE_CFG_RESTRICTED) is introduced, which
179 * will be checked in the backend for PE state retrival. If
180 * the PE becomes frozen for the first time and the flag has
181 * been set for the PE, we will set EEH_PE_CFG_BLOCKED for
182 * that PE to block its config space.
183 *
184 * Broadcom Austin 4-ports NICs (14e4:1657)
185 * Broadcom Shiner 2-ports 10G NICs (14e4:168e)
186 */
187 if ((dev->vendor == PCI_VENDOR_ID_BROADCOM && dev->device == 0x1657) ||
188 (dev->vendor == PCI_VENDOR_ID_BROADCOM && dev->device == 0x168e))
189 edev->pe->state |= EEH_PE_CFG_RESTRICTED;
190
191 /*
172 * Cache the PE primary bus, which can't be fetched when 192 * Cache the PE primary bus, which can't be fetched when
173 * full hotplug is in progress. In that case, all child 193 * full hotplug is in progress. In that case, all child
174 * PCI devices of the PE are expected to be removed prior 194 * PCI devices of the PE are expected to be removed prior
@@ -383,6 +403,39 @@ static int powernv_eeh_err_inject(struct eeh_pe *pe, int type, int func,
383 return ret; 403 return ret;
384} 404}
385 405
406static inline bool powernv_eeh_cfg_blocked(struct device_node *dn)
407{
408 struct eeh_dev *edev = of_node_to_eeh_dev(dn);
409
410 if (!edev || !edev->pe)
411 return false;
412
413 if (edev->pe->state & EEH_PE_CFG_BLOCKED)
414 return true;
415
416 return false;
417}
418
419static int powernv_eeh_read_config(struct device_node *dn,
420 int where, int size, u32 *val)
421{
422 if (powernv_eeh_cfg_blocked(dn)) {
423 *val = 0xFFFFFFFF;
424 return PCIBIOS_SET_FAILED;
425 }
426
427 return pnv_pci_cfg_read(dn, where, size, val);
428}
429
430static int powernv_eeh_write_config(struct device_node *dn,
431 int where, int size, u32 val)
432{
433 if (powernv_eeh_cfg_blocked(dn))
434 return PCIBIOS_SET_FAILED;
435
436 return pnv_pci_cfg_write(dn, where, size, val);
437}
438
386/** 439/**
387 * powernv_eeh_next_error - Retrieve next EEH error to handle 440 * powernv_eeh_next_error - Retrieve next EEH error to handle
388 * @pe: Affected PE 441 * @pe: Affected PE
@@ -440,8 +493,8 @@ static struct eeh_ops powernv_eeh_ops = {
440 .get_log = powernv_eeh_get_log, 493 .get_log = powernv_eeh_get_log,
441 .configure_bridge = powernv_eeh_configure_bridge, 494 .configure_bridge = powernv_eeh_configure_bridge,
442 .err_inject = powernv_eeh_err_inject, 495 .err_inject = powernv_eeh_err_inject,
443 .read_config = pnv_pci_cfg_read, 496 .read_config = powernv_eeh_read_config,
444 .write_config = pnv_pci_cfg_write, 497 .write_config = powernv_eeh_write_config,
445 .next_error = powernv_eeh_next_error, 498 .next_error = powernv_eeh_next_error,
446 .restore_config = powernv_eeh_restore_config 499 .restore_config = powernv_eeh_restore_config
447}; 500};
diff --git a/arch/powerpc/platforms/powernv/opal-lpc.c b/arch/powerpc/platforms/powernv/opal-lpc.c
index dd2c285ad170..e4169d68cb32 100644
--- a/arch/powerpc/platforms/powernv/opal-lpc.c
+++ b/arch/powerpc/platforms/powernv/opal-lpc.c
@@ -191,7 +191,6 @@ static ssize_t lpc_debug_read(struct file *filp, char __user *ubuf,
191{ 191{
192 struct lpc_debugfs_entry *lpc = filp->private_data; 192 struct lpc_debugfs_entry *lpc = filp->private_data;
193 u32 data, pos, len, todo; 193 u32 data, pos, len, todo;
194 __be32 bedata;
195 int rc; 194 int rc;
196 195
197 if (!access_ok(VERIFY_WRITE, ubuf, count)) 196 if (!access_ok(VERIFY_WRITE, ubuf, count))
@@ -214,18 +213,57 @@ static ssize_t lpc_debug_read(struct file *filp, char __user *ubuf,
214 len = 2; 213 len = 2;
215 } 214 }
216 rc = opal_lpc_read(opal_lpc_chip_id, lpc->lpc_type, pos, 215 rc = opal_lpc_read(opal_lpc_chip_id, lpc->lpc_type, pos,
217 &bedata, len); 216 &data, len);
218 if (rc) 217 if (rc)
219 return -ENXIO; 218 return -ENXIO;
220 data = be32_to_cpu(bedata); 219
220 /*
221 * Now there is some trickery with the data returned by OPAL
222 * as it's the desired data right justified in a 32-bit BE
223 * word.
224 *
225 * This is a very bad interface and I'm to blame for it :-(
226 *
227 * So we can't just apply a 32-bit swap to what comes from OPAL,
228 * because user space expects the *bytes* to be in their proper
229 * respective positions (ie, LPC position).
230 *
231 * So what we really want to do here is to shift data right
232 * appropriately on a LE kernel.
233 *
234 * IE. If the LPC transaction has bytes B0, B1, B2 and B3 in that
235 * order, we have in memory written to by OPAL at the "data"
236 * pointer:
237 *
238 * Bytes: OPAL "data" LE "data"
239 * 32-bit: B0 B1 B2 B3 B0B1B2B3 B3B2B1B0
240 * 16-bit: B0 B1 0000B0B1 B1B00000
241 * 8-bit: B0 000000B0 B0000000
242 *
243 * So a BE kernel will have the leftmost of the above in the MSB
244 * and rightmost in the LSB and can just then "cast" the u32 "data"
245 * down to the appropriate quantity and write it.
246 *
247 * However, an LE kernel can't. It doesn't need to swap because a
248 * load from data followed by a store to user are going to preserve
249 * the byte ordering which is the wire byte order which is what the
250 * user wants, but in order to "crop" to the right size, we need to
251 * shift right first.
252 */
221 switch(len) { 253 switch(len) {
222 case 4: 254 case 4:
223 rc = __put_user((u32)data, (u32 __user *)ubuf); 255 rc = __put_user((u32)data, (u32 __user *)ubuf);
224 break; 256 break;
225 case 2: 257 case 2:
258#ifdef __LITTLE_ENDIAN__
259 data >>= 16;
260#endif
226 rc = __put_user((u16)data, (u16 __user *)ubuf); 261 rc = __put_user((u16)data, (u16 __user *)ubuf);
227 break; 262 break;
228 default: 263 default:
264#ifdef __LITTLE_ENDIAN__
265 data >>= 24;
266#endif
229 rc = __put_user((u8)data, (u8 __user *)ubuf); 267 rc = __put_user((u8)data, (u8 __user *)ubuf);
230 break; 268 break;
231 } 269 }
@@ -265,12 +303,31 @@ static ssize_t lpc_debug_write(struct file *filp, const char __user *ubuf,
265 else if (todo > 1 && (pos & 1) == 0) 303 else if (todo > 1 && (pos & 1) == 0)
266 len = 2; 304 len = 2;
267 } 305 }
306
307 /*
308 * Similarly to the read case, we have some trickery here but
309 * it's different to handle. We need to pass the value to OPAL in
310 * a register whose layout depends on the access size. We want
311 * to reproduce the memory layout of the user, however we aren't
312 * doing a load from user and a store to another memory location
313 * which would achieve that. Here we pass the value to OPAL via
314 * a register which is expected to contain the "BE" interpretation
315 * of the byte sequence. IE: for a 32-bit access, byte 0 should be
316 * in the MSB. So here we *do* need to byteswap on LE.
317 *
318 * User bytes: LE "data" OPAL "data"
319 * 32-bit: B0 B1 B2 B3 B3B2B1B0 B0B1B2B3
320 * 16-bit: B0 B1 0000B1B0 0000B0B1
321 * 8-bit: B0 000000B0 000000B0
322 */
268 switch(len) { 323 switch(len) {
269 case 4: 324 case 4:
270 rc = __get_user(data, (u32 __user *)ubuf); 325 rc = __get_user(data, (u32 __user *)ubuf);
326 data = cpu_to_be32(data);
271 break; 327 break;
272 case 2: 328 case 2:
273 rc = __get_user(data, (u16 __user *)ubuf); 329 rc = __get_user(data, (u16 __user *)ubuf);
330 data = cpu_to_be16(data);
274 break; 331 break;
275 default: 332 default:
276 rc = __get_user(data, (u8 __user *)ubuf); 333 rc = __get_user(data, (u8 __user *)ubuf);
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index e9e2450c1fdd..feb549aa3eea 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -58,7 +58,7 @@ END_FTR_SECTION(0, 1); \
58 */ 58 */
59 59
60#define OPAL_CALL(name, token) \ 60#define OPAL_CALL(name, token) \
61 _GLOBAL(name); \ 61 _GLOBAL_TOC(name); \
62 mflr r0; \ 62 mflr r0; \
63 std r0,16(r1); \ 63 std r0,16(r1); \
64 li r0,token; \ 64 li r0,token; \
diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c
index b642b0562f5a..d019b081df9d 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -194,6 +194,27 @@ static int __init opal_register_exception_handlers(void)
194 * fwnmi area at 0x7000 to provide the glue space to OPAL 194 * fwnmi area at 0x7000 to provide the glue space to OPAL
195 */ 195 */
196 glue = 0x7000; 196 glue = 0x7000;
197
198 /*
199 * Check if we are running on newer firmware that exports
200 * OPAL_HANDLE_HMI token. If yes, then don't ask OPAL to patch
201 * the HMI interrupt and we catch it directly in Linux.
202 *
203 * For older firmware (i.e currently released POWER8 System Firmware
204 * as of today <= SV810_087), we fallback to old behavior and let OPAL
205 * patch the HMI vector and handle it inside OPAL firmware.
206 *
207 * For newer firmware (in development/yet to be released) we will
208 * start catching/handling HMI directly in Linux.
209 */
210 if (!opal_check_token(OPAL_HANDLE_HMI)) {
211 pr_info("opal: Old firmware detected, OPAL handles HMIs.\n");
212 opal_register_exception_handler(
213 OPAL_HYPERVISOR_MAINTENANCE_HANDLER,
214 0, glue);
215 glue += 128;
216 }
217
197 opal_register_exception_handler(OPAL_SOFTPATCH_HANDLER, 0, glue); 218 opal_register_exception_handler(OPAL_SOFTPATCH_HANDLER, 0, glue);
198#endif 219#endif
199 220
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index b3ca77ddf36d..b2187d0068b8 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -505,7 +505,7 @@ static bool pnv_pci_cfg_check(struct pci_controller *hose,
505 edev = of_node_to_eeh_dev(dn); 505 edev = of_node_to_eeh_dev(dn);
506 if (edev) { 506 if (edev) {
507 if (edev->pe && 507 if (edev->pe &&
508 (edev->pe->state & EEH_PE_RESET)) 508 (edev->pe->state & EEH_PE_CFG_BLOCKED))
509 return false; 509 return false;
510 510
511 if (edev->mode & EEH_DEV_REMOVED) 511 if (edev->mode & EEH_DEV_REMOVED)
diff --git a/arch/powerpc/platforms/pseries/dlpar.c b/arch/powerpc/platforms/pseries/dlpar.c
index fdf01b660d59..c22bb1b4beb8 100644
--- a/arch/powerpc/platforms/pseries/dlpar.c
+++ b/arch/powerpc/platforms/pseries/dlpar.c
@@ -25,11 +25,11 @@
25#include <asm/rtas.h> 25#include <asm/rtas.h>
26 26
27struct cc_workarea { 27struct cc_workarea {
28 u32 drc_index; 28 __be32 drc_index;
29 u32 zero; 29 __be32 zero;
30 u32 name_offset; 30 __be32 name_offset;
31 u32 prop_length; 31 __be32 prop_length;
32 u32 prop_offset; 32 __be32 prop_offset;
33}; 33};
34 34
35void dlpar_free_cc_property(struct property *prop) 35void dlpar_free_cc_property(struct property *prop)
@@ -49,11 +49,11 @@ static struct property *dlpar_parse_cc_property(struct cc_workarea *ccwa)
49 if (!prop) 49 if (!prop)
50 return NULL; 50 return NULL;
51 51
52 name = (char *)ccwa + ccwa->name_offset; 52 name = (char *)ccwa + be32_to_cpu(ccwa->name_offset);
53 prop->name = kstrdup(name, GFP_KERNEL); 53 prop->name = kstrdup(name, GFP_KERNEL);
54 54
55 prop->length = ccwa->prop_length; 55 prop->length = be32_to_cpu(ccwa->prop_length);
56 value = (char *)ccwa + ccwa->prop_offset; 56 value = (char *)ccwa + be32_to_cpu(ccwa->prop_offset);
57 prop->value = kmemdup(value, prop->length, GFP_KERNEL); 57 prop->value = kmemdup(value, prop->length, GFP_KERNEL);
58 if (!prop->value) { 58 if (!prop->value) {
59 dlpar_free_cc_property(prop); 59 dlpar_free_cc_property(prop);
@@ -79,7 +79,7 @@ static struct device_node *dlpar_parse_cc_node(struct cc_workarea *ccwa,
79 if (!dn) 79 if (!dn)
80 return NULL; 80 return NULL;
81 81
82 name = (char *)ccwa + ccwa->name_offset; 82 name = (char *)ccwa + be32_to_cpu(ccwa->name_offset);
83 dn->full_name = kasprintf(GFP_KERNEL, "%s/%s", path, name); 83 dn->full_name = kasprintf(GFP_KERNEL, "%s/%s", path, name);
84 if (!dn->full_name) { 84 if (!dn->full_name) {
85 kfree(dn); 85 kfree(dn);
@@ -126,7 +126,7 @@ void dlpar_free_cc_nodes(struct device_node *dn)
126#define CALL_AGAIN -2 126#define CALL_AGAIN -2
127#define ERR_CFG_USE -9003 127#define ERR_CFG_USE -9003
128 128
129struct device_node *dlpar_configure_connector(u32 drc_index, 129struct device_node *dlpar_configure_connector(__be32 drc_index,
130 struct device_node *parent) 130 struct device_node *parent)
131{ 131{
132 struct device_node *dn; 132 struct device_node *dn;
@@ -382,7 +382,7 @@ static int dlpar_online_cpu(struct device_node *dn)
382 BUG_ON(get_cpu_current_state(cpu) 382 BUG_ON(get_cpu_current_state(cpu)
383 != CPU_STATE_OFFLINE); 383 != CPU_STATE_OFFLINE);
384 cpu_maps_update_done(); 384 cpu_maps_update_done();
385 rc = cpu_up(cpu); 385 rc = device_online(get_cpu_device(cpu));
386 if (rc) 386 if (rc)
387 goto out; 387 goto out;
388 cpu_maps_update_begin(); 388 cpu_maps_update_begin();
@@ -414,7 +414,7 @@ static ssize_t dlpar_cpu_probe(const char *buf, size_t count)
414 if (!parent) 414 if (!parent)
415 return -ENODEV; 415 return -ENODEV;
416 416
417 dn = dlpar_configure_connector(drc_index, parent); 417 dn = dlpar_configure_connector(cpu_to_be32(drc_index), parent);
418 if (!dn) 418 if (!dn)
419 return -EINVAL; 419 return -EINVAL;
420 420
@@ -467,7 +467,7 @@ static int dlpar_offline_cpu(struct device_node *dn)
467 if (get_cpu_current_state(cpu) == CPU_STATE_ONLINE) { 467 if (get_cpu_current_state(cpu) == CPU_STATE_ONLINE) {
468 set_preferred_offline_state(cpu, CPU_STATE_OFFLINE); 468 set_preferred_offline_state(cpu, CPU_STATE_OFFLINE);
469 cpu_maps_update_done(); 469 cpu_maps_update_done();
470 rc = cpu_down(cpu); 470 rc = device_offline(get_cpu_device(cpu));
471 if (rc) 471 if (rc)
472 goto out; 472 goto out;
473 cpu_maps_update_begin(); 473 cpu_maps_update_begin();
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index b174fa751d26..5c375f93c669 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -247,7 +247,7 @@ static int pseries_add_processor(struct device_node *np)
247 unsigned int cpu; 247 unsigned int cpu;
248 cpumask_var_t candidate_mask, tmp; 248 cpumask_var_t candidate_mask, tmp;
249 int err = -ENOSPC, len, nthreads, i; 249 int err = -ENOSPC, len, nthreads, i;
250 const u32 *intserv; 250 const __be32 *intserv;
251 251
252 intserv = of_get_property(np, "ibm,ppc-interrupt-server#s", &len); 252 intserv = of_get_property(np, "ibm,ppc-interrupt-server#s", &len);
253 if (!intserv) 253 if (!intserv)
@@ -293,7 +293,7 @@ static int pseries_add_processor(struct device_node *np)
293 for_each_cpu(cpu, tmp) { 293 for_each_cpu(cpu, tmp) {
294 BUG_ON(cpu_present(cpu)); 294 BUG_ON(cpu_present(cpu));
295 set_cpu_present(cpu, true); 295 set_cpu_present(cpu, true);
296 set_hard_smp_processor_id(cpu, *intserv++); 296 set_hard_smp_processor_id(cpu, be32_to_cpu(*intserv++));
297 } 297 }
298 err = 0; 298 err = 0;
299out_unlock: 299out_unlock:
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index de1ec54a2a57..e32e00976a94 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -30,7 +30,6 @@
30#include <linux/mm.h> 30#include <linux/mm.h>
31#include <linux/memblock.h> 31#include <linux/memblock.h>
32#include <linux/spinlock.h> 32#include <linux/spinlock.h>
33#include <linux/sched.h> /* for show_stack */
34#include <linux/string.h> 33#include <linux/string.h>
35#include <linux/pci.h> 34#include <linux/pci.h>
36#include <linux/dma-mapping.h> 35#include <linux/dma-mapping.h>
@@ -168,7 +167,7 @@ static int tce_build_pSeriesLP(struct iommu_table *tbl, long tcenum,
168 printk("\tindex = 0x%llx\n", (u64)tbl->it_index); 167 printk("\tindex = 0x%llx\n", (u64)tbl->it_index);
169 printk("\ttcenum = 0x%llx\n", (u64)tcenum); 168 printk("\ttcenum = 0x%llx\n", (u64)tcenum);
170 printk("\ttce val = 0x%llx\n", tce ); 169 printk("\ttce val = 0x%llx\n", tce );
171 show_stack(current, (unsigned long *)__get_SP()); 170 dump_stack();
172 } 171 }
173 172
174 tcenum++; 173 tcenum++;
@@ -257,7 +256,7 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
257 printk("\tindex = 0x%llx\n", (u64)tbl->it_index); 256 printk("\tindex = 0x%llx\n", (u64)tbl->it_index);
258 printk("\tnpages = 0x%llx\n", (u64)npages); 257 printk("\tnpages = 0x%llx\n", (u64)npages);
259 printk("\ttce[0] val = 0x%llx\n", tcep[0]); 258 printk("\ttce[0] val = 0x%llx\n", tcep[0]);
260 show_stack(current, (unsigned long *)__get_SP()); 259 dump_stack();
261 } 260 }
262 return ret; 261 return ret;
263} 262}
@@ -273,7 +272,7 @@ static void tce_free_pSeriesLP(struct iommu_table *tbl, long tcenum, long npages
273 printk("tce_free_pSeriesLP: plpar_tce_put failed. rc=%lld\n", rc); 272 printk("tce_free_pSeriesLP: plpar_tce_put failed. rc=%lld\n", rc);
274 printk("\tindex = 0x%llx\n", (u64)tbl->it_index); 273 printk("\tindex = 0x%llx\n", (u64)tbl->it_index);
275 printk("\ttcenum = 0x%llx\n", (u64)tcenum); 274 printk("\ttcenum = 0x%llx\n", (u64)tcenum);
276 show_stack(current, (unsigned long *)__get_SP()); 275 dump_stack();
277 } 276 }
278 277
279 tcenum++; 278 tcenum++;
@@ -292,7 +291,7 @@ static void tce_freemulti_pSeriesLP(struct iommu_table *tbl, long tcenum, long n
292 printk("\trc = %lld\n", rc); 291 printk("\trc = %lld\n", rc);
293 printk("\tindex = 0x%llx\n", (u64)tbl->it_index); 292 printk("\tindex = 0x%llx\n", (u64)tbl->it_index);
294 printk("\tnpages = 0x%llx\n", (u64)npages); 293 printk("\tnpages = 0x%llx\n", (u64)npages);
295 show_stack(current, (unsigned long *)__get_SP()); 294 dump_stack();
296 } 295 }
297} 296}
298 297
@@ -307,7 +306,7 @@ static unsigned long tce_get_pSeriesLP(struct iommu_table *tbl, long tcenum)
307 printk("tce_get_pSeriesLP: plpar_tce_get failed. rc=%lld\n", rc); 306 printk("tce_get_pSeriesLP: plpar_tce_get failed. rc=%lld\n", rc);
308 printk("\tindex = 0x%llx\n", (u64)tbl->it_index); 307 printk("\tindex = 0x%llx\n", (u64)tbl->it_index);
309 printk("\ttcenum = 0x%llx\n", (u64)tcenum); 308 printk("\ttcenum = 0x%llx\n", (u64)tcenum);
310 show_stack(current, (unsigned long *)__get_SP()); 309 dump_stack();
311 } 310 }
312 311
313 return tce_ret; 312 return tce_ret;
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c
index 8c509d5397c6..f6880d2a40fb 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -43,6 +43,7 @@
43#include <asm/trace.h> 43#include <asm/trace.h>
44#include <asm/firmware.h> 44#include <asm/firmware.h>
45#include <asm/plpar_wrappers.h> 45#include <asm/plpar_wrappers.h>
46#include <asm/fadump.h>
46 47
47#include "pseries.h" 48#include "pseries.h"
48 49
@@ -247,8 +248,17 @@ static void pSeries_lpar_hptab_clear(void)
247 } 248 }
248 249
249#ifdef __LITTLE_ENDIAN__ 250#ifdef __LITTLE_ENDIAN__
250 /* Reset exceptions to big endian */ 251 /*
251 if (firmware_has_feature(FW_FEATURE_SET_MODE)) { 252 * Reset exceptions to big endian.
253 *
254 * FIXME this is a hack for kexec, we need to reset the exception
255 * endian before starting the new kernel and this is a convenient place
256 * to do it.
257 *
258 * This is also called on boot when a fadump happens. In that case we
259 * must not change the exception endian mode.
260 */
261 if (firmware_has_feature(FW_FEATURE_SET_MODE) && !is_fadump_active()) {
252 long rc; 262 long rc;
253 263
254 rc = pseries_big_endian_exceptions(); 264 rc = pseries_big_endian_exceptions();
diff --git a/arch/powerpc/platforms/pseries/pseries.h b/arch/powerpc/platforms/pseries/pseries.h
index 361add62abf1..1796c5438cc6 100644
--- a/arch/powerpc/platforms/pseries/pseries.h
+++ b/arch/powerpc/platforms/pseries/pseries.h
@@ -56,7 +56,8 @@ extern void hvc_vio_init_early(void);
56/* Dynamic logical Partitioning/Mobility */ 56/* Dynamic logical Partitioning/Mobility */
57extern void dlpar_free_cc_nodes(struct device_node *); 57extern void dlpar_free_cc_nodes(struct device_node *);
58extern void dlpar_free_cc_property(struct property *); 58extern void dlpar_free_cc_property(struct property *);
59extern struct device_node *dlpar_configure_connector(u32, struct device_node *); 59extern struct device_node *dlpar_configure_connector(__be32,
60 struct device_node *);
60extern int dlpar_attach_node(struct device_node *); 61extern int dlpar_attach_node(struct device_node *);
61extern int dlpar_detach_node(struct device_node *); 62extern int dlpar_detach_node(struct device_node *);
62 63
diff --git a/arch/powerpc/sysdev/msi_bitmap.c b/arch/powerpc/sysdev/msi_bitmap.c
index 0c75214b6f92..73b64c73505b 100644
--- a/arch/powerpc/sysdev/msi_bitmap.c
+++ b/arch/powerpc/sysdev/msi_bitmap.c
@@ -145,59 +145,64 @@ void msi_bitmap_free(struct msi_bitmap *bmp)
145 145
146#ifdef CONFIG_MSI_BITMAP_SELFTEST 146#ifdef CONFIG_MSI_BITMAP_SELFTEST
147 147
148#define check(x) \
149 if (!(x)) printk("msi_bitmap: test failed at line %d\n", __LINE__);
150
151static void __init test_basics(void) 148static void __init test_basics(void)
152{ 149{
153 struct msi_bitmap bmp; 150 struct msi_bitmap bmp;
154 int i, size = 512; 151 int rc, i, size = 512;
155 152
156 /* Can't allocate a bitmap of 0 irqs */ 153 /* Can't allocate a bitmap of 0 irqs */
157 check(msi_bitmap_alloc(&bmp, 0, NULL) != 0); 154 WARN_ON(msi_bitmap_alloc(&bmp, 0, NULL) == 0);
158 155
159 /* of_node may be NULL */ 156 /* of_node may be NULL */
160 check(0 == msi_bitmap_alloc(&bmp, size, NULL)); 157 WARN_ON(msi_bitmap_alloc(&bmp, size, NULL));
161 158
162 /* Should all be free by default */ 159 /* Should all be free by default */
163 check(0 == bitmap_find_free_region(bmp.bitmap, size, 160 WARN_ON(bitmap_find_free_region(bmp.bitmap, size, get_count_order(size)));
164 get_count_order(size)));
165 bitmap_release_region(bmp.bitmap, 0, get_count_order(size)); 161 bitmap_release_region(bmp.bitmap, 0, get_count_order(size));
166 162
167 /* With no node, there's no msi-available-ranges, so expect > 0 */ 163 /* With no node, there's no msi-available-ranges, so expect > 0 */
168 check(msi_bitmap_reserve_dt_hwirqs(&bmp) > 0); 164 WARN_ON(msi_bitmap_reserve_dt_hwirqs(&bmp) <= 0);
169 165
170 /* Should all still be free */ 166 /* Should all still be free */
171 check(0 == bitmap_find_free_region(bmp.bitmap, size, 167 WARN_ON(bitmap_find_free_region(bmp.bitmap, size, get_count_order(size)));
172 get_count_order(size)));
173 bitmap_release_region(bmp.bitmap, 0, get_count_order(size)); 168 bitmap_release_region(bmp.bitmap, 0, get_count_order(size));
174 169
175 /* Check we can fill it up and then no more */ 170 /* Check we can fill it up and then no more */
176 for (i = 0; i < size; i++) 171 for (i = 0; i < size; i++)
177 check(msi_bitmap_alloc_hwirqs(&bmp, 1) >= 0); 172 WARN_ON(msi_bitmap_alloc_hwirqs(&bmp, 1) < 0);
178 173
179 check(msi_bitmap_alloc_hwirqs(&bmp, 1) < 0); 174 WARN_ON(msi_bitmap_alloc_hwirqs(&bmp, 1) >= 0);
180 175
181 /* Should all be allocated */ 176 /* Should all be allocated */
182 check(bitmap_find_free_region(bmp.bitmap, size, 0) < 0); 177 WARN_ON(bitmap_find_free_region(bmp.bitmap, size, 0) >= 0);
183 178
184 /* And if we free one we can then allocate another */ 179 /* And if we free one we can then allocate another */
185 msi_bitmap_free_hwirqs(&bmp, size / 2, 1); 180 msi_bitmap_free_hwirqs(&bmp, size / 2, 1);
186 check(msi_bitmap_alloc_hwirqs(&bmp, 1) == size / 2); 181 WARN_ON(msi_bitmap_alloc_hwirqs(&bmp, 1) != size / 2);
182
183 /* Free most of them for the alignment tests */
184 msi_bitmap_free_hwirqs(&bmp, 3, size - 3);
187 185
188 /* Check we get a naturally aligned offset */ 186 /* Check we get a naturally aligned offset */
189 check(msi_bitmap_alloc_hwirqs(&bmp, 2) % 2 == 0); 187 rc = msi_bitmap_alloc_hwirqs(&bmp, 2);
190 check(msi_bitmap_alloc_hwirqs(&bmp, 4) % 4 == 0); 188 WARN_ON(rc < 0 && rc % 2 != 0);
191 check(msi_bitmap_alloc_hwirqs(&bmp, 8) % 8 == 0); 189 rc = msi_bitmap_alloc_hwirqs(&bmp, 4);
192 check(msi_bitmap_alloc_hwirqs(&bmp, 9) % 16 == 0); 190 WARN_ON(rc < 0 && rc % 4 != 0);
193 check(msi_bitmap_alloc_hwirqs(&bmp, 3) % 4 == 0); 191 rc = msi_bitmap_alloc_hwirqs(&bmp, 8);
194 check(msi_bitmap_alloc_hwirqs(&bmp, 7) % 8 == 0); 192 WARN_ON(rc < 0 && rc % 8 != 0);
195 check(msi_bitmap_alloc_hwirqs(&bmp, 121) % 128 == 0); 193 rc = msi_bitmap_alloc_hwirqs(&bmp, 9);
194 WARN_ON(rc < 0 && rc % 16 != 0);
195 rc = msi_bitmap_alloc_hwirqs(&bmp, 3);
196 WARN_ON(rc < 0 && rc % 4 != 0);
197 rc = msi_bitmap_alloc_hwirqs(&bmp, 7);
198 WARN_ON(rc < 0 && rc % 8 != 0);
199 rc = msi_bitmap_alloc_hwirqs(&bmp, 121);
200 WARN_ON(rc < 0 && rc % 128 != 0);
196 201
197 msi_bitmap_free(&bmp); 202 msi_bitmap_free(&bmp);
198 203
199 /* Clients may check bitmap == NULL for "not-allocated" */ 204 /* Clients may WARN_ON bitmap == NULL for "not-allocated" */
200 check(bmp.bitmap == NULL); 205 WARN_ON(bmp.bitmap != NULL);
201 206
202 kfree(bmp.bitmap); 207 kfree(bmp.bitmap);
203} 208}
@@ -219,14 +224,13 @@ static void __init test_of_node(void)
219 of_node_init(&of_node); 224 of_node_init(&of_node);
220 of_node.full_name = node_name; 225 of_node.full_name = node_name;
221 226
222 check(0 == msi_bitmap_alloc(&bmp, size, &of_node)); 227 WARN_ON(msi_bitmap_alloc(&bmp, size, &of_node));
223 228
224 /* No msi-available-ranges, so expect > 0 */ 229 /* No msi-available-ranges, so expect > 0 */
225 check(msi_bitmap_reserve_dt_hwirqs(&bmp) > 0); 230 WARN_ON(msi_bitmap_reserve_dt_hwirqs(&bmp) <= 0);
226 231
227 /* Should all still be free */ 232 /* Should all still be free */
228 check(0 == bitmap_find_free_region(bmp.bitmap, size, 233 WARN_ON(bitmap_find_free_region(bmp.bitmap, size, get_count_order(size)));
229 get_count_order(size)));
230 bitmap_release_region(bmp.bitmap, 0, get_count_order(size)); 234 bitmap_release_region(bmp.bitmap, 0, get_count_order(size));
231 235
232 /* Now create a fake msi-available-ranges property */ 236 /* Now create a fake msi-available-ranges property */
@@ -240,11 +244,11 @@ static void __init test_of_node(void)
240 of_node.properties = &prop; 244 of_node.properties = &prop;
241 245
242 /* msi-available-ranges, so expect == 0 */ 246 /* msi-available-ranges, so expect == 0 */
243 check(msi_bitmap_reserve_dt_hwirqs(&bmp) == 0); 247 WARN_ON(msi_bitmap_reserve_dt_hwirqs(&bmp));
244 248
245 /* Check we got the expected result */ 249 /* Check we got the expected result */
246 check(0 == bitmap_parselist(expected_str, expected, size)); 250 WARN_ON(bitmap_parselist(expected_str, expected, size));
247 check(bitmap_equal(expected, bmp.bitmap, size)); 251 WARN_ON(!bitmap_equal(expected, bmp.bitmap, size));
248 252
249 msi_bitmap_free(&bmp); 253 msi_bitmap_free(&bmp);
250 kfree(bmp.bitmap); 254 kfree(bmp.bitmap);
diff --git a/arch/s390/configs/default_defconfig b/arch/s390/configs/default_defconfig
index 9d94fdd9f525..9432d0f202ef 100644
--- a/arch/s390/configs/default_defconfig
+++ b/arch/s390/configs/default_defconfig
@@ -35,7 +35,6 @@ CONFIG_MODULE_UNLOAD=y
35CONFIG_MODULE_FORCE_UNLOAD=y 35CONFIG_MODULE_FORCE_UNLOAD=y
36CONFIG_MODVERSIONS=y 36CONFIG_MODVERSIONS=y
37CONFIG_MODULE_SRCVERSION_ALL=y 37CONFIG_MODULE_SRCVERSION_ALL=y
38CONFIG_BLK_DEV_INTEGRITY=y
39CONFIG_BLK_DEV_THROTTLING=y 38CONFIG_BLK_DEV_THROTTLING=y
40CONFIG_PARTITION_ADVANCED=y 39CONFIG_PARTITION_ADVANCED=y
41CONFIG_IBM_PARTITION=y 40CONFIG_IBM_PARTITION=y
@@ -245,6 +244,7 @@ CONFIG_NF_TABLES_IPV4=m
245CONFIG_NFT_CHAIN_ROUTE_IPV4=m 244CONFIG_NFT_CHAIN_ROUTE_IPV4=m
246CONFIG_NFT_CHAIN_NAT_IPV4=m 245CONFIG_NFT_CHAIN_NAT_IPV4=m
247CONFIG_NF_TABLES_ARP=m 246CONFIG_NF_TABLES_ARP=m
247CONFIG_NF_NAT_IPV4=m
248CONFIG_IP_NF_IPTABLES=m 248CONFIG_IP_NF_IPTABLES=m
249CONFIG_IP_NF_MATCH_AH=m 249CONFIG_IP_NF_MATCH_AH=m
250CONFIG_IP_NF_MATCH_ECN=m 250CONFIG_IP_NF_MATCH_ECN=m
@@ -252,11 +252,6 @@ CONFIG_IP_NF_MATCH_RPFILTER=m
252CONFIG_IP_NF_MATCH_TTL=m 252CONFIG_IP_NF_MATCH_TTL=m
253CONFIG_IP_NF_FILTER=m 253CONFIG_IP_NF_FILTER=m
254CONFIG_IP_NF_TARGET_REJECT=m 254CONFIG_IP_NF_TARGET_REJECT=m
255CONFIG_IP_NF_TARGET_ULOG=m
256CONFIG_NF_NAT_IPV4=m
257CONFIG_IP_NF_TARGET_MASQUERADE=m
258CONFIG_IP_NF_TARGET_NETMAP=m
259CONFIG_IP_NF_TARGET_REDIRECT=m
260CONFIG_IP_NF_MANGLE=m 255CONFIG_IP_NF_MANGLE=m
261CONFIG_IP_NF_TARGET_CLUSTERIP=m 256CONFIG_IP_NF_TARGET_CLUSTERIP=m
262CONFIG_IP_NF_TARGET_ECN=m 257CONFIG_IP_NF_TARGET_ECN=m
@@ -270,6 +265,7 @@ CONFIG_NF_CONNTRACK_IPV6=m
270CONFIG_NF_TABLES_IPV6=m 265CONFIG_NF_TABLES_IPV6=m
271CONFIG_NFT_CHAIN_ROUTE_IPV6=m 266CONFIG_NFT_CHAIN_ROUTE_IPV6=m
272CONFIG_NFT_CHAIN_NAT_IPV6=m 267CONFIG_NFT_CHAIN_NAT_IPV6=m
268CONFIG_NF_NAT_IPV6=m
273CONFIG_IP6_NF_IPTABLES=m 269CONFIG_IP6_NF_IPTABLES=m
274CONFIG_IP6_NF_MATCH_AH=m 270CONFIG_IP6_NF_MATCH_AH=m
275CONFIG_IP6_NF_MATCH_EUI64=m 271CONFIG_IP6_NF_MATCH_EUI64=m
@@ -286,9 +282,6 @@ CONFIG_IP6_NF_TARGET_REJECT=m
286CONFIG_IP6_NF_MANGLE=m 282CONFIG_IP6_NF_MANGLE=m
287CONFIG_IP6_NF_RAW=m 283CONFIG_IP6_NF_RAW=m
288CONFIG_IP6_NF_SECURITY=m 284CONFIG_IP6_NF_SECURITY=m
289CONFIG_NF_NAT_IPV6=m
290CONFIG_IP6_NF_TARGET_MASQUERADE=m
291CONFIG_IP6_NF_TARGET_NPT=m
292CONFIG_NF_TABLES_BRIDGE=m 285CONFIG_NF_TABLES_BRIDGE=m
293CONFIG_NET_SCTPPROBE=m 286CONFIG_NET_SCTPPROBE=m
294CONFIG_RDS=m 287CONFIG_RDS=m
@@ -374,14 +367,13 @@ CONFIG_BLK_DEV_SR=m
374CONFIG_CHR_DEV_SG=y 367CONFIG_CHR_DEV_SG=y
375CONFIG_CHR_DEV_SCH=m 368CONFIG_CHR_DEV_SCH=m
376CONFIG_SCSI_ENCLOSURE=m 369CONFIG_SCSI_ENCLOSURE=m
377CONFIG_SCSI_MULTI_LUN=y
378CONFIG_SCSI_CONSTANTS=y 370CONFIG_SCSI_CONSTANTS=y
379CONFIG_SCSI_LOGGING=y 371CONFIG_SCSI_LOGGING=y
380CONFIG_SCSI_SPI_ATTRS=m 372CONFIG_SCSI_SPI_ATTRS=m
373CONFIG_SCSI_FC_ATTRS=y
381CONFIG_SCSI_SAS_LIBSAS=m 374CONFIG_SCSI_SAS_LIBSAS=m
382CONFIG_SCSI_SRP_ATTRS=m 375CONFIG_SCSI_SRP_ATTRS=m
383CONFIG_ISCSI_TCP=m 376CONFIG_ISCSI_TCP=m
384CONFIG_LIBFCOE=m
385CONFIG_SCSI_DEBUG=m 377CONFIG_SCSI_DEBUG=m
386CONFIG_ZFCP=y 378CONFIG_ZFCP=y
387CONFIG_SCSI_VIRTIO=m 379CONFIG_SCSI_VIRTIO=m
@@ -427,7 +419,6 @@ CONFIG_VIRTIO_NET=m
427CONFIG_NLMON=m 419CONFIG_NLMON=m
428CONFIG_VHOST_NET=m 420CONFIG_VHOST_NET=m
429# CONFIG_NET_VENDOR_ARC is not set 421# CONFIG_NET_VENDOR_ARC is not set
430# CONFIG_NET_CADENCE is not set
431# CONFIG_NET_VENDOR_CHELSIO is not set 422# CONFIG_NET_VENDOR_CHELSIO is not set
432# CONFIG_NET_VENDOR_INTEL is not set 423# CONFIG_NET_VENDOR_INTEL is not set
433# CONFIG_NET_VENDOR_MARVELL is not set 424# CONFIG_NET_VENDOR_MARVELL is not set
@@ -481,14 +472,14 @@ CONFIG_JFS_FS=m
481CONFIG_JFS_POSIX_ACL=y 472CONFIG_JFS_POSIX_ACL=y
482CONFIG_JFS_SECURITY=y 473CONFIG_JFS_SECURITY=y
483CONFIG_JFS_STATISTICS=y 474CONFIG_JFS_STATISTICS=y
484CONFIG_XFS_FS=m 475CONFIG_XFS_FS=y
485CONFIG_XFS_QUOTA=y 476CONFIG_XFS_QUOTA=y
486CONFIG_XFS_POSIX_ACL=y 477CONFIG_XFS_POSIX_ACL=y
487CONFIG_XFS_RT=y 478CONFIG_XFS_RT=y
488CONFIG_XFS_DEBUG=y 479CONFIG_XFS_DEBUG=y
489CONFIG_GFS2_FS=m 480CONFIG_GFS2_FS=m
490CONFIG_OCFS2_FS=m 481CONFIG_OCFS2_FS=m
491CONFIG_BTRFS_FS=m 482CONFIG_BTRFS_FS=y
492CONFIG_BTRFS_FS_POSIX_ACL=y 483CONFIG_BTRFS_FS_POSIX_ACL=y
493CONFIG_NILFS2_FS=m 484CONFIG_NILFS2_FS=m
494CONFIG_FANOTIFY=y 485CONFIG_FANOTIFY=y
@@ -574,7 +565,6 @@ CONFIG_DEBUG_SHIRQ=y
574CONFIG_DETECT_HUNG_TASK=y 565CONFIG_DETECT_HUNG_TASK=y
575CONFIG_TIMER_STATS=y 566CONFIG_TIMER_STATS=y
576CONFIG_DEBUG_RT_MUTEXES=y 567CONFIG_DEBUG_RT_MUTEXES=y
577CONFIG_RT_MUTEX_TESTER=y
578CONFIG_DEBUG_WW_MUTEX_SLOWPATH=y 568CONFIG_DEBUG_WW_MUTEX_SLOWPATH=y
579CONFIG_PROVE_LOCKING=y 569CONFIG_PROVE_LOCKING=y
580CONFIG_LOCK_STAT=y 570CONFIG_LOCK_STAT=y
@@ -600,8 +590,13 @@ CONFIG_FAULT_INJECTION_DEBUG_FS=y
600CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y 590CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y
601CONFIG_LATENCYTOP=y 591CONFIG_LATENCYTOP=y
602CONFIG_DEBUG_STRICT_USER_COPY_CHECKS=y 592CONFIG_DEBUG_STRICT_USER_COPY_CHECKS=y
593CONFIG_IRQSOFF_TRACER=y
594CONFIG_PREEMPT_TRACER=y
595CONFIG_SCHED_TRACER=y
596CONFIG_FTRACE_SYSCALLS=y
597CONFIG_STACK_TRACER=y
603CONFIG_BLK_DEV_IO_TRACE=y 598CONFIG_BLK_DEV_IO_TRACE=y
604# CONFIG_KPROBE_EVENT is not set 599CONFIG_UPROBE_EVENT=y
605CONFIG_LKDTM=m 600CONFIG_LKDTM=m
606CONFIG_TEST_LIST_SORT=y 601CONFIG_TEST_LIST_SORT=y
607CONFIG_KPROBES_SANITY_TEST=y 602CONFIG_KPROBES_SANITY_TEST=y
@@ -609,7 +604,10 @@ CONFIG_RBTREE_TEST=y
609CONFIG_INTERVAL_TREE_TEST=m 604CONFIG_INTERVAL_TREE_TEST=m
610CONFIG_PERCPU_TEST=m 605CONFIG_PERCPU_TEST=m
611CONFIG_ATOMIC64_SELFTEST=y 606CONFIG_ATOMIC64_SELFTEST=y
607CONFIG_TEST_STRING_HELPERS=y
608CONFIG_TEST_KSTRTOX=y
612CONFIG_DMA_API_DEBUG=y 609CONFIG_DMA_API_DEBUG=y
610CONFIG_TEST_BPF=m
613# CONFIG_STRICT_DEVMEM is not set 611# CONFIG_STRICT_DEVMEM is not set
614CONFIG_S390_PTDUMP=y 612CONFIG_S390_PTDUMP=y
615CONFIG_ENCRYPTED_KEYS=m 613CONFIG_ENCRYPTED_KEYS=m
@@ -673,12 +671,6 @@ CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=m
673CONFIG_X509_CERTIFICATE_PARSER=m 671CONFIG_X509_CERTIFICATE_PARSER=m
674CONFIG_CRC7=m 672CONFIG_CRC7=m
675CONFIG_CRC8=m 673CONFIG_CRC8=m
676CONFIG_XZ_DEC_X86=y
677CONFIG_XZ_DEC_POWERPC=y
678CONFIG_XZ_DEC_IA64=y
679CONFIG_XZ_DEC_ARM=y
680CONFIG_XZ_DEC_ARMTHUMB=y
681CONFIG_XZ_DEC_SPARC=y
682CONFIG_CORDIC=m 674CONFIG_CORDIC=m
683CONFIG_CMM=m 675CONFIG_CMM=m
684CONFIG_APPLDATA_BASE=y 676CONFIG_APPLDATA_BASE=y
diff --git a/arch/s390/configs/gcov_defconfig b/arch/s390/configs/gcov_defconfig
index 90f514baa37d..219dca6ea926 100644
--- a/arch/s390/configs/gcov_defconfig
+++ b/arch/s390/configs/gcov_defconfig
@@ -35,7 +35,6 @@ CONFIG_MODULE_UNLOAD=y
35CONFIG_MODULE_FORCE_UNLOAD=y 35CONFIG_MODULE_FORCE_UNLOAD=y
36CONFIG_MODVERSIONS=y 36CONFIG_MODVERSIONS=y
37CONFIG_MODULE_SRCVERSION_ALL=y 37CONFIG_MODULE_SRCVERSION_ALL=y
38CONFIG_BLK_DEV_INTEGRITY=y
39CONFIG_BLK_DEV_THROTTLING=y 38CONFIG_BLK_DEV_THROTTLING=y
40CONFIG_PARTITION_ADVANCED=y 39CONFIG_PARTITION_ADVANCED=y
41CONFIG_IBM_PARTITION=y 40CONFIG_IBM_PARTITION=y
@@ -243,6 +242,7 @@ CONFIG_NF_TABLES_IPV4=m
243CONFIG_NFT_CHAIN_ROUTE_IPV4=m 242CONFIG_NFT_CHAIN_ROUTE_IPV4=m
244CONFIG_NFT_CHAIN_NAT_IPV4=m 243CONFIG_NFT_CHAIN_NAT_IPV4=m
245CONFIG_NF_TABLES_ARP=m 244CONFIG_NF_TABLES_ARP=m
245CONFIG_NF_NAT_IPV4=m
246CONFIG_IP_NF_IPTABLES=m 246CONFIG_IP_NF_IPTABLES=m
247CONFIG_IP_NF_MATCH_AH=m 247CONFIG_IP_NF_MATCH_AH=m
248CONFIG_IP_NF_MATCH_ECN=m 248CONFIG_IP_NF_MATCH_ECN=m
@@ -250,11 +250,6 @@ CONFIG_IP_NF_MATCH_RPFILTER=m
250CONFIG_IP_NF_MATCH_TTL=m 250CONFIG_IP_NF_MATCH_TTL=m
251CONFIG_IP_NF_FILTER=m 251CONFIG_IP_NF_FILTER=m
252CONFIG_IP_NF_TARGET_REJECT=m 252CONFIG_IP_NF_TARGET_REJECT=m
253CONFIG_IP_NF_TARGET_ULOG=m
254CONFIG_NF_NAT_IPV4=m
255CONFIG_IP_NF_TARGET_MASQUERADE=m
256CONFIG_IP_NF_TARGET_NETMAP=m
257CONFIG_IP_NF_TARGET_REDIRECT=m
258CONFIG_IP_NF_MANGLE=m 253CONFIG_IP_NF_MANGLE=m
259CONFIG_IP_NF_TARGET_CLUSTERIP=m 254CONFIG_IP_NF_TARGET_CLUSTERIP=m
260CONFIG_IP_NF_TARGET_ECN=m 255CONFIG_IP_NF_TARGET_ECN=m
@@ -268,6 +263,7 @@ CONFIG_NF_CONNTRACK_IPV6=m
268CONFIG_NF_TABLES_IPV6=m 263CONFIG_NF_TABLES_IPV6=m
269CONFIG_NFT_CHAIN_ROUTE_IPV6=m 264CONFIG_NFT_CHAIN_ROUTE_IPV6=m
270CONFIG_NFT_CHAIN_NAT_IPV6=m 265CONFIG_NFT_CHAIN_NAT_IPV6=m
266CONFIG_NF_NAT_IPV6=m
271CONFIG_IP6_NF_IPTABLES=m 267CONFIG_IP6_NF_IPTABLES=m
272CONFIG_IP6_NF_MATCH_AH=m 268CONFIG_IP6_NF_MATCH_AH=m
273CONFIG_IP6_NF_MATCH_EUI64=m 269CONFIG_IP6_NF_MATCH_EUI64=m
@@ -284,9 +280,6 @@ CONFIG_IP6_NF_TARGET_REJECT=m
284CONFIG_IP6_NF_MANGLE=m 280CONFIG_IP6_NF_MANGLE=m
285CONFIG_IP6_NF_RAW=m 281CONFIG_IP6_NF_RAW=m
286CONFIG_IP6_NF_SECURITY=m 282CONFIG_IP6_NF_SECURITY=m
287CONFIG_NF_NAT_IPV6=m
288CONFIG_IP6_NF_TARGET_MASQUERADE=m
289CONFIG_IP6_NF_TARGET_NPT=m
290CONFIG_NF_TABLES_BRIDGE=m 283CONFIG_NF_TABLES_BRIDGE=m
291CONFIG_NET_SCTPPROBE=m 284CONFIG_NET_SCTPPROBE=m
292CONFIG_RDS=m 285CONFIG_RDS=m
@@ -371,14 +364,13 @@ CONFIG_BLK_DEV_SR=m
371CONFIG_CHR_DEV_SG=y 364CONFIG_CHR_DEV_SG=y
372CONFIG_CHR_DEV_SCH=m 365CONFIG_CHR_DEV_SCH=m
373CONFIG_SCSI_ENCLOSURE=m 366CONFIG_SCSI_ENCLOSURE=m
374CONFIG_SCSI_MULTI_LUN=y
375CONFIG_SCSI_CONSTANTS=y 367CONFIG_SCSI_CONSTANTS=y
376CONFIG_SCSI_LOGGING=y 368CONFIG_SCSI_LOGGING=y
377CONFIG_SCSI_SPI_ATTRS=m 369CONFIG_SCSI_SPI_ATTRS=m
370CONFIG_SCSI_FC_ATTRS=y
378CONFIG_SCSI_SAS_LIBSAS=m 371CONFIG_SCSI_SAS_LIBSAS=m
379CONFIG_SCSI_SRP_ATTRS=m 372CONFIG_SCSI_SRP_ATTRS=m
380CONFIG_ISCSI_TCP=m 373CONFIG_ISCSI_TCP=m
381CONFIG_LIBFCOE=m
382CONFIG_SCSI_DEBUG=m 374CONFIG_SCSI_DEBUG=m
383CONFIG_ZFCP=y 375CONFIG_ZFCP=y
384CONFIG_SCSI_VIRTIO=m 376CONFIG_SCSI_VIRTIO=m
@@ -424,7 +416,6 @@ CONFIG_VIRTIO_NET=m
424CONFIG_NLMON=m 416CONFIG_NLMON=m
425CONFIG_VHOST_NET=m 417CONFIG_VHOST_NET=m
426# CONFIG_NET_VENDOR_ARC is not set 418# CONFIG_NET_VENDOR_ARC is not set
427# CONFIG_NET_CADENCE is not set
428# CONFIG_NET_VENDOR_CHELSIO is not set 419# CONFIG_NET_VENDOR_CHELSIO is not set
429# CONFIG_NET_VENDOR_INTEL is not set 420# CONFIG_NET_VENDOR_INTEL is not set
430# CONFIG_NET_VENDOR_MARVELL is not set 421# CONFIG_NET_VENDOR_MARVELL is not set
@@ -478,13 +469,13 @@ CONFIG_JFS_FS=m
478CONFIG_JFS_POSIX_ACL=y 469CONFIG_JFS_POSIX_ACL=y
479CONFIG_JFS_SECURITY=y 470CONFIG_JFS_SECURITY=y
480CONFIG_JFS_STATISTICS=y 471CONFIG_JFS_STATISTICS=y
481CONFIG_XFS_FS=m 472CONFIG_XFS_FS=y
482CONFIG_XFS_QUOTA=y 473CONFIG_XFS_QUOTA=y
483CONFIG_XFS_POSIX_ACL=y 474CONFIG_XFS_POSIX_ACL=y
484CONFIG_XFS_RT=y 475CONFIG_XFS_RT=y
485CONFIG_GFS2_FS=m 476CONFIG_GFS2_FS=m
486CONFIG_OCFS2_FS=m 477CONFIG_OCFS2_FS=m
487CONFIG_BTRFS_FS=m 478CONFIG_BTRFS_FS=y
488CONFIG_BTRFS_FS_POSIX_ACL=y 479CONFIG_BTRFS_FS_POSIX_ACL=y
489CONFIG_NILFS2_FS=m 480CONFIG_NILFS2_FS=m
490CONFIG_FANOTIFY=y 481CONFIG_FANOTIFY=y
@@ -626,12 +617,6 @@ CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=m
626CONFIG_X509_CERTIFICATE_PARSER=m 617CONFIG_X509_CERTIFICATE_PARSER=m
627CONFIG_CRC7=m 618CONFIG_CRC7=m
628CONFIG_CRC8=m 619CONFIG_CRC8=m
629CONFIG_XZ_DEC_X86=y
630CONFIG_XZ_DEC_POWERPC=y
631CONFIG_XZ_DEC_IA64=y
632CONFIG_XZ_DEC_ARM=y
633CONFIG_XZ_DEC_ARMTHUMB=y
634CONFIG_XZ_DEC_SPARC=y
635CONFIG_CORDIC=m 620CONFIG_CORDIC=m
636CONFIG_CMM=m 621CONFIG_CMM=m
637CONFIG_APPLDATA_BASE=y 622CONFIG_APPLDATA_BASE=y
diff --git a/arch/s390/configs/performance_defconfig b/arch/s390/configs/performance_defconfig
index 13559d32af69..822c2f2e0c25 100644
--- a/arch/s390/configs/performance_defconfig
+++ b/arch/s390/configs/performance_defconfig
@@ -33,7 +33,6 @@ CONFIG_MODULE_UNLOAD=y
33CONFIG_MODULE_FORCE_UNLOAD=y 33CONFIG_MODULE_FORCE_UNLOAD=y
34CONFIG_MODVERSIONS=y 34CONFIG_MODVERSIONS=y
35CONFIG_MODULE_SRCVERSION_ALL=y 35CONFIG_MODULE_SRCVERSION_ALL=y
36CONFIG_BLK_DEV_INTEGRITY=y
37CONFIG_BLK_DEV_THROTTLING=y 36CONFIG_BLK_DEV_THROTTLING=y
38CONFIG_PARTITION_ADVANCED=y 37CONFIG_PARTITION_ADVANCED=y
39CONFIG_IBM_PARTITION=y 38CONFIG_IBM_PARTITION=y
@@ -241,6 +240,7 @@ CONFIG_NF_TABLES_IPV4=m
241CONFIG_NFT_CHAIN_ROUTE_IPV4=m 240CONFIG_NFT_CHAIN_ROUTE_IPV4=m
242CONFIG_NFT_CHAIN_NAT_IPV4=m 241CONFIG_NFT_CHAIN_NAT_IPV4=m
243CONFIG_NF_TABLES_ARP=m 242CONFIG_NF_TABLES_ARP=m
243CONFIG_NF_NAT_IPV4=m
244CONFIG_IP_NF_IPTABLES=m 244CONFIG_IP_NF_IPTABLES=m
245CONFIG_IP_NF_MATCH_AH=m 245CONFIG_IP_NF_MATCH_AH=m
246CONFIG_IP_NF_MATCH_ECN=m 246CONFIG_IP_NF_MATCH_ECN=m
@@ -248,11 +248,6 @@ CONFIG_IP_NF_MATCH_RPFILTER=m
248CONFIG_IP_NF_MATCH_TTL=m 248CONFIG_IP_NF_MATCH_TTL=m
249CONFIG_IP_NF_FILTER=m 249CONFIG_IP_NF_FILTER=m
250CONFIG_IP_NF_TARGET_REJECT=m 250CONFIG_IP_NF_TARGET_REJECT=m
251CONFIG_IP_NF_TARGET_ULOG=m
252CONFIG_NF_NAT_IPV4=m
253CONFIG_IP_NF_TARGET_MASQUERADE=m
254CONFIG_IP_NF_TARGET_NETMAP=m
255CONFIG_IP_NF_TARGET_REDIRECT=m
256CONFIG_IP_NF_MANGLE=m 251CONFIG_IP_NF_MANGLE=m
257CONFIG_IP_NF_TARGET_CLUSTERIP=m 252CONFIG_IP_NF_TARGET_CLUSTERIP=m
258CONFIG_IP_NF_TARGET_ECN=m 253CONFIG_IP_NF_TARGET_ECN=m
@@ -266,6 +261,7 @@ CONFIG_NF_CONNTRACK_IPV6=m
266CONFIG_NF_TABLES_IPV6=m 261CONFIG_NF_TABLES_IPV6=m
267CONFIG_NFT_CHAIN_ROUTE_IPV6=m 262CONFIG_NFT_CHAIN_ROUTE_IPV6=m
268CONFIG_NFT_CHAIN_NAT_IPV6=m 263CONFIG_NFT_CHAIN_NAT_IPV6=m
264CONFIG_NF_NAT_IPV6=m
269CONFIG_IP6_NF_IPTABLES=m 265CONFIG_IP6_NF_IPTABLES=m
270CONFIG_IP6_NF_MATCH_AH=m 266CONFIG_IP6_NF_MATCH_AH=m
271CONFIG_IP6_NF_MATCH_EUI64=m 267CONFIG_IP6_NF_MATCH_EUI64=m
@@ -282,9 +278,6 @@ CONFIG_IP6_NF_TARGET_REJECT=m
282CONFIG_IP6_NF_MANGLE=m 278CONFIG_IP6_NF_MANGLE=m
283CONFIG_IP6_NF_RAW=m 279CONFIG_IP6_NF_RAW=m
284CONFIG_IP6_NF_SECURITY=m 280CONFIG_IP6_NF_SECURITY=m
285CONFIG_NF_NAT_IPV6=m
286CONFIG_IP6_NF_TARGET_MASQUERADE=m
287CONFIG_IP6_NF_TARGET_NPT=m
288CONFIG_NF_TABLES_BRIDGE=m 281CONFIG_NF_TABLES_BRIDGE=m
289CONFIG_NET_SCTPPROBE=m 282CONFIG_NET_SCTPPROBE=m
290CONFIG_RDS=m 283CONFIG_RDS=m
@@ -369,14 +362,13 @@ CONFIG_BLK_DEV_SR=m
369CONFIG_CHR_DEV_SG=y 362CONFIG_CHR_DEV_SG=y
370CONFIG_CHR_DEV_SCH=m 363CONFIG_CHR_DEV_SCH=m
371CONFIG_SCSI_ENCLOSURE=m 364CONFIG_SCSI_ENCLOSURE=m
372CONFIG_SCSI_MULTI_LUN=y
373CONFIG_SCSI_CONSTANTS=y 365CONFIG_SCSI_CONSTANTS=y
374CONFIG_SCSI_LOGGING=y 366CONFIG_SCSI_LOGGING=y
375CONFIG_SCSI_SPI_ATTRS=m 367CONFIG_SCSI_SPI_ATTRS=m
368CONFIG_SCSI_FC_ATTRS=y
376CONFIG_SCSI_SAS_LIBSAS=m 369CONFIG_SCSI_SAS_LIBSAS=m
377CONFIG_SCSI_SRP_ATTRS=m 370CONFIG_SCSI_SRP_ATTRS=m
378CONFIG_ISCSI_TCP=m 371CONFIG_ISCSI_TCP=m
379CONFIG_LIBFCOE=m
380CONFIG_SCSI_DEBUG=m 372CONFIG_SCSI_DEBUG=m
381CONFIG_ZFCP=y 373CONFIG_ZFCP=y
382CONFIG_SCSI_VIRTIO=m 374CONFIG_SCSI_VIRTIO=m
@@ -422,7 +414,6 @@ CONFIG_VIRTIO_NET=m
422CONFIG_NLMON=m 414CONFIG_NLMON=m
423CONFIG_VHOST_NET=m 415CONFIG_VHOST_NET=m
424# CONFIG_NET_VENDOR_ARC is not set 416# CONFIG_NET_VENDOR_ARC is not set
425# CONFIG_NET_CADENCE is not set
426# CONFIG_NET_VENDOR_CHELSIO is not set 417# CONFIG_NET_VENDOR_CHELSIO is not set
427# CONFIG_NET_VENDOR_INTEL is not set 418# CONFIG_NET_VENDOR_INTEL is not set
428# CONFIG_NET_VENDOR_MARVELL is not set 419# CONFIG_NET_VENDOR_MARVELL is not set
@@ -476,13 +467,13 @@ CONFIG_JFS_FS=m
476CONFIG_JFS_POSIX_ACL=y 467CONFIG_JFS_POSIX_ACL=y
477CONFIG_JFS_SECURITY=y 468CONFIG_JFS_SECURITY=y
478CONFIG_JFS_STATISTICS=y 469CONFIG_JFS_STATISTICS=y
479CONFIG_XFS_FS=m 470CONFIG_XFS_FS=y
480CONFIG_XFS_QUOTA=y 471CONFIG_XFS_QUOTA=y
481CONFIG_XFS_POSIX_ACL=y 472CONFIG_XFS_POSIX_ACL=y
482CONFIG_XFS_RT=y 473CONFIG_XFS_RT=y
483CONFIG_GFS2_FS=m 474CONFIG_GFS2_FS=m
484CONFIG_OCFS2_FS=m 475CONFIG_OCFS2_FS=m
485CONFIG_BTRFS_FS=m 476CONFIG_BTRFS_FS=y
486CONFIG_BTRFS_FS_POSIX_ACL=y 477CONFIG_BTRFS_FS_POSIX_ACL=y
487CONFIG_NILFS2_FS=m 478CONFIG_NILFS2_FS=m
488CONFIG_FANOTIFY=y 479CONFIG_FANOTIFY=y
@@ -550,8 +541,11 @@ CONFIG_TIMER_STATS=y
550CONFIG_RCU_TORTURE_TEST=m 541CONFIG_RCU_TORTURE_TEST=m
551CONFIG_RCU_CPU_STALL_TIMEOUT=60 542CONFIG_RCU_CPU_STALL_TIMEOUT=60
552CONFIG_LATENCYTOP=y 543CONFIG_LATENCYTOP=y
544CONFIG_SCHED_TRACER=y
545CONFIG_FTRACE_SYSCALLS=y
546CONFIG_STACK_TRACER=y
553CONFIG_BLK_DEV_IO_TRACE=y 547CONFIG_BLK_DEV_IO_TRACE=y
554# CONFIG_KPROBE_EVENT is not set 548CONFIG_UPROBE_EVENT=y
555CONFIG_LKDTM=m 549CONFIG_LKDTM=m
556CONFIG_PERCPU_TEST=m 550CONFIG_PERCPU_TEST=m
557CONFIG_ATOMIC64_SELFTEST=y 551CONFIG_ATOMIC64_SELFTEST=y
@@ -618,12 +612,6 @@ CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=m
618CONFIG_X509_CERTIFICATE_PARSER=m 612CONFIG_X509_CERTIFICATE_PARSER=m
619CONFIG_CRC7=m 613CONFIG_CRC7=m
620CONFIG_CRC8=m 614CONFIG_CRC8=m
621CONFIG_XZ_DEC_X86=y
622CONFIG_XZ_DEC_POWERPC=y
623CONFIG_XZ_DEC_IA64=y
624CONFIG_XZ_DEC_ARM=y
625CONFIG_XZ_DEC_ARMTHUMB=y
626CONFIG_XZ_DEC_SPARC=y
627CONFIG_CORDIC=m 615CONFIG_CORDIC=m
628CONFIG_CMM=m 616CONFIG_CMM=m
629CONFIG_APPLDATA_BASE=y 617CONFIG_APPLDATA_BASE=y
diff --git a/arch/s390/configs/zfcpdump_defconfig b/arch/s390/configs/zfcpdump_defconfig
index e376789f2d8d..9d63051ebec4 100644
--- a/arch/s390/configs/zfcpdump_defconfig
+++ b/arch/s390/configs/zfcpdump_defconfig
@@ -22,8 +22,8 @@ CONFIG_HZ_100=y
22CONFIG_CRASH_DUMP=y 22CONFIG_CRASH_DUMP=y
23# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set 23# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
24# CONFIG_SECCOMP is not set 24# CONFIG_SECCOMP is not set
25# CONFIG_IUCV is not set
26CONFIG_NET=y 25CONFIG_NET=y
26# CONFIG_IUCV is not set
27CONFIG_ATM=y 27CONFIG_ATM=y
28CONFIG_ATM_LANE=y 28CONFIG_ATM_LANE=y
29CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 29CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
@@ -36,9 +36,9 @@ CONFIG_ENCLOSURE_SERVICES=y
36CONFIG_SCSI=y 36CONFIG_SCSI=y
37CONFIG_BLK_DEV_SD=y 37CONFIG_BLK_DEV_SD=y
38CONFIG_SCSI_ENCLOSURE=y 38CONFIG_SCSI_ENCLOSURE=y
39CONFIG_SCSI_MULTI_LUN=y
40CONFIG_SCSI_CONSTANTS=y 39CONFIG_SCSI_CONSTANTS=y
41CONFIG_SCSI_LOGGING=y 40CONFIG_SCSI_LOGGING=y
41CONFIG_SCSI_FC_ATTRS=y
42CONFIG_SCSI_SRP_ATTRS=y 42CONFIG_SCSI_SRP_ATTRS=y
43CONFIG_ZFCP=y 43CONFIG_ZFCP=y
44# CONFIG_INPUT_MOUSEDEV_PSAUX is not set 44# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
@@ -75,12 +75,6 @@ CONFIG_DEBUG_KERNEL=y
75CONFIG_RCU_CPU_STALL_TIMEOUT=60 75CONFIG_RCU_CPU_STALL_TIMEOUT=60
76# CONFIG_FTRACE is not set 76# CONFIG_FTRACE is not set
77# CONFIG_STRICT_DEVMEM is not set 77# CONFIG_STRICT_DEVMEM is not set
78CONFIG_XZ_DEC_X86=y
79CONFIG_XZ_DEC_POWERPC=y
80CONFIG_XZ_DEC_IA64=y
81CONFIG_XZ_DEC_ARM=y
82CONFIG_XZ_DEC_ARMTHUMB=y
83CONFIG_XZ_DEC_SPARC=y
84# CONFIG_PFAULT is not set 78# CONFIG_PFAULT is not set
85# CONFIG_S390_HYPFS_FS is not set 79# CONFIG_S390_HYPFS_FS is not set
86# CONFIG_VIRTUALIZATION is not set 80# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/s390/defconfig b/arch/s390/defconfig
index fab35a8efa4f..785c5f24d6f9 100644
--- a/arch/s390/defconfig
+++ b/arch/s390/defconfig
@@ -92,10 +92,10 @@ CONFIG_CHR_DEV_ST=y
92CONFIG_BLK_DEV_SR=y 92CONFIG_BLK_DEV_SR=y
93CONFIG_BLK_DEV_SR_VENDOR=y 93CONFIG_BLK_DEV_SR_VENDOR=y
94CONFIG_CHR_DEV_SG=y 94CONFIG_CHR_DEV_SG=y
95CONFIG_SCSI_MULTI_LUN=y
96CONFIG_SCSI_CONSTANTS=y 95CONFIG_SCSI_CONSTANTS=y
97CONFIG_SCSI_LOGGING=y 96CONFIG_SCSI_LOGGING=y
98CONFIG_SCSI_SCAN_ASYNC=y 97CONFIG_SCSI_SCAN_ASYNC=y
98CONFIG_SCSI_FC_ATTRS=y
99CONFIG_ZFCP=y 99CONFIG_ZFCP=y
100CONFIG_SCSI_VIRTIO=y 100CONFIG_SCSI_VIRTIO=y
101CONFIG_NETDEVICES=y 101CONFIG_NETDEVICES=y
@@ -164,14 +164,13 @@ CONFIG_CRYPTO_CMAC=m
164CONFIG_CRYPTO_XCBC=m 164CONFIG_CRYPTO_XCBC=m
165CONFIG_CRYPTO_VMAC=m 165CONFIG_CRYPTO_VMAC=m
166CONFIG_CRYPTO_CRC32=m 166CONFIG_CRYPTO_CRC32=m
167CONFIG_CRYPTO_CRCT10DIF=m
168CONFIG_CRYPTO_MD4=m 167CONFIG_CRYPTO_MD4=m
169CONFIG_CRYPTO_MICHAEL_MIC=m 168CONFIG_CRYPTO_MICHAEL_MIC=m
170CONFIG_CRYPTO_RMD128=m 169CONFIG_CRYPTO_RMD128=m
171CONFIG_CRYPTO_RMD160=m 170CONFIG_CRYPTO_RMD160=m
172CONFIG_CRYPTO_RMD256=m 171CONFIG_CRYPTO_RMD256=m
173CONFIG_CRYPTO_RMD320=m 172CONFIG_CRYPTO_RMD320=m
174CONFIG_CRYPTO_SHA256=m 173CONFIG_CRYPTO_SHA256=y
175CONFIG_CRYPTO_SHA512=m 174CONFIG_CRYPTO_SHA512=m
176CONFIG_CRYPTO_TGR192=m 175CONFIG_CRYPTO_TGR192=m
177CONFIG_CRYPTO_WP512=m 176CONFIG_CRYPTO_WP512=m
diff --git a/arch/s390/include/uapi/asm/unistd.h b/arch/s390/include/uapi/asm/unistd.h
index 940ac49198db..4197c89c52d4 100644
--- a/arch/s390/include/uapi/asm/unistd.h
+++ b/arch/s390/include/uapi/asm/unistd.h
@@ -286,7 +286,8 @@
286#define __NR_seccomp 348 286#define __NR_seccomp 348
287#define __NR_getrandom 349 287#define __NR_getrandom 349
288#define __NR_memfd_create 350 288#define __NR_memfd_create 350
289#define NR_syscalls 351 289#define __NR_bpf 351
290#define NR_syscalls 352
290 291
291/* 292/*
292 * There are some system calls that are not present on 64 bit, some 293 * There are some system calls that are not present on 64 bit, some
diff --git a/arch/s390/kernel/compat_wrapper.c b/arch/s390/kernel/compat_wrapper.c
index faf6caa510dc..c4f7a3d655b8 100644
--- a/arch/s390/kernel/compat_wrapper.c
+++ b/arch/s390/kernel/compat_wrapper.c
@@ -217,3 +217,4 @@ COMPAT_SYSCALL_WRAP5(renameat2, int, olddfd, const char __user *, oldname, int,
217COMPAT_SYSCALL_WRAP3(seccomp, unsigned int, op, unsigned int, flags, const char __user *, uargs) 217COMPAT_SYSCALL_WRAP3(seccomp, unsigned int, op, unsigned int, flags, const char __user *, uargs)
218COMPAT_SYSCALL_WRAP3(getrandom, char __user *, buf, size_t, count, unsigned int, flags) 218COMPAT_SYSCALL_WRAP3(getrandom, char __user *, buf, size_t, count, unsigned int, flags)
219COMPAT_SYSCALL_WRAP2(memfd_create, const char __user *, uname, unsigned int, flags) 219COMPAT_SYSCALL_WRAP2(memfd_create, const char __user *, uname, unsigned int, flags)
220COMPAT_SYSCALL_WRAP3(bpf, int, cmd, union bpf_attr *, attr, unsigned int, size);
diff --git a/arch/s390/kernel/ftrace.c b/arch/s390/kernel/ftrace.c
index 51d14fe5eb9a..ca1cabb3a96c 100644
--- a/arch/s390/kernel/ftrace.c
+++ b/arch/s390/kernel/ftrace.c
@@ -121,6 +121,8 @@ unsigned long __kprobes prepare_ftrace_return(unsigned long parent,
121{ 121{
122 struct ftrace_graph_ent trace; 122 struct ftrace_graph_ent trace;
123 123
124 if (unlikely(ftrace_graph_is_dead()))
125 goto out;
124 if (unlikely(atomic_read(&current->tracing_graph_pause))) 126 if (unlikely(atomic_read(&current->tracing_graph_pause)))
125 goto out; 127 goto out;
126 ip = (ip & PSW_ADDR_INSN) - MCOUNT_INSN_SIZE; 128 ip = (ip & PSW_ADDR_INSN) - MCOUNT_INSN_SIZE;
diff --git a/arch/s390/kernel/perf_cpum_sf.c b/arch/s390/kernel/perf_cpum_sf.c
index 08e761318c17..b878f12a9597 100644
--- a/arch/s390/kernel/perf_cpum_sf.c
+++ b/arch/s390/kernel/perf_cpum_sf.c
@@ -1411,11 +1411,6 @@ static void cpumsf_pmu_del(struct perf_event *event, int flags)
1411 perf_pmu_enable(event->pmu); 1411 perf_pmu_enable(event->pmu);
1412} 1412}
1413 1413
1414static int cpumsf_pmu_event_idx(struct perf_event *event)
1415{
1416 return event->hw.idx;
1417}
1418
1419CPUMF_EVENT_ATTR(SF, SF_CYCLES_BASIC, PERF_EVENT_CPUM_SF); 1414CPUMF_EVENT_ATTR(SF, SF_CYCLES_BASIC, PERF_EVENT_CPUM_SF);
1420CPUMF_EVENT_ATTR(SF, SF_CYCLES_BASIC_DIAG, PERF_EVENT_CPUM_SF_DIAG); 1415CPUMF_EVENT_ATTR(SF, SF_CYCLES_BASIC_DIAG, PERF_EVENT_CPUM_SF_DIAG);
1421 1416
@@ -1458,7 +1453,6 @@ static struct pmu cpumf_sampling = {
1458 .stop = cpumsf_pmu_stop, 1453 .stop = cpumsf_pmu_stop,
1459 .read = cpumsf_pmu_read, 1454 .read = cpumsf_pmu_read,
1460 1455
1461 .event_idx = cpumsf_pmu_event_idx,
1462 .attr_groups = cpumsf_pmu_attr_groups, 1456 .attr_groups = cpumsf_pmu_attr_groups,
1463}; 1457};
1464 1458
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S
index 6fe886ac2db5..9f7087fd58de 100644
--- a/arch/s390/kernel/syscalls.S
+++ b/arch/s390/kernel/syscalls.S
@@ -359,3 +359,4 @@ SYSCALL(sys_renameat2,sys_renameat2,compat_sys_renameat2)
359SYSCALL(sys_seccomp,sys_seccomp,compat_sys_seccomp) 359SYSCALL(sys_seccomp,sys_seccomp,compat_sys_seccomp)
360SYSCALL(sys_getrandom,sys_getrandom,compat_sys_getrandom) 360SYSCALL(sys_getrandom,sys_getrandom,compat_sys_getrandom)
361SYSCALL(sys_memfd_create,sys_memfd_create,compat_sys_memfd_create) /* 350 */ 361SYSCALL(sys_memfd_create,sys_memfd_create,compat_sys_memfd_create) /* 350 */
362SYSCALL(sys_bpf,sys_bpf,compat_sys_bpf)
diff --git a/arch/s390/kernel/uprobes.c b/arch/s390/kernel/uprobes.c
index 956f4f7a591c..f6b3cd056ec2 100644
--- a/arch/s390/kernel/uprobes.c
+++ b/arch/s390/kernel/uprobes.c
@@ -5,13 +5,13 @@
5 * Author(s): Jan Willeke, 5 * Author(s): Jan Willeke,
6 */ 6 */
7 7
8#include <linux/kprobes.h>
9#include <linux/uaccess.h> 8#include <linux/uaccess.h>
10#include <linux/uprobes.h> 9#include <linux/uprobes.h>
11#include <linux/compat.h> 10#include <linux/compat.h>
12#include <linux/kdebug.h> 11#include <linux/kdebug.h>
13#include <asm/switch_to.h> 12#include <asm/switch_to.h>
14#include <asm/facility.h> 13#include <asm/facility.h>
14#include <asm/kprobes.h>
15#include <asm/dis.h> 15#include <asm/dis.h>
16#include "entry.h" 16#include "entry.h"
17 17
diff --git a/arch/s390/kernel/vdso32/clock_gettime.S b/arch/s390/kernel/vdso32/clock_gettime.S
index 48c2206a3956..5eec9afbb5b5 100644
--- a/arch/s390/kernel/vdso32/clock_gettime.S
+++ b/arch/s390/kernel/vdso32/clock_gettime.S
@@ -19,6 +19,7 @@
19 .type __kernel_clock_gettime,@function 19 .type __kernel_clock_gettime,@function
20__kernel_clock_gettime: 20__kernel_clock_gettime:
21 .cfi_startproc 21 .cfi_startproc
22 ahi %r15,-16
22 basr %r5,0 23 basr %r5,0
230: al %r5,21f-0b(%r5) /* get &_vdso_data */ 240: al %r5,21f-0b(%r5) /* get &_vdso_data */
24 chi %r2,__CLOCK_REALTIME_COARSE 25 chi %r2,__CLOCK_REALTIME_COARSE
@@ -34,8 +35,8 @@ __kernel_clock_gettime:
341: l %r4,__VDSO_UPD_COUNT+4(%r5) /* load update counter */ 351: l %r4,__VDSO_UPD_COUNT+4(%r5) /* load update counter */
35 tml %r4,0x0001 /* pending update ? loop */ 36 tml %r4,0x0001 /* pending update ? loop */
36 jnz 1b 37 jnz 1b
37 stcke 24(%r15) /* Store TOD clock */ 38 stcke 0(%r15) /* Store TOD clock */
38 lm %r0,%r1,25(%r15) 39 lm %r0,%r1,1(%r15)
39 s %r0,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */ 40 s %r0,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */
40 sl %r1,__VDSO_XTIME_STAMP+4(%r5) 41 sl %r1,__VDSO_XTIME_STAMP+4(%r5)
41 brc 3,2f 42 brc 3,2f
@@ -70,6 +71,7 @@ __kernel_clock_gettime:
708: st %r2,0(%r3) /* store tp->tv_sec */ 718: st %r2,0(%r3) /* store tp->tv_sec */
71 st %r1,4(%r3) /* store tp->tv_nsec */ 72 st %r1,4(%r3) /* store tp->tv_nsec */
72 lhi %r2,0 73 lhi %r2,0
74 ahi %r15,16
73 br %r14 75 br %r14
74 76
75 /* CLOCK_MONOTONIC_COARSE */ 77 /* CLOCK_MONOTONIC_COARSE */
@@ -96,8 +98,8 @@ __kernel_clock_gettime:
9611: l %r4,__VDSO_UPD_COUNT+4(%r5) /* load update counter */ 9811: l %r4,__VDSO_UPD_COUNT+4(%r5) /* load update counter */
97 tml %r4,0x0001 /* pending update ? loop */ 99 tml %r4,0x0001 /* pending update ? loop */
98 jnz 11b 100 jnz 11b
99 stcke 24(%r15) /* Store TOD clock */ 101 stcke 0(%r15) /* Store TOD clock */
100 lm %r0,%r1,25(%r15) 102 lm %r0,%r1,1(%r15)
101 s %r0,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */ 103 s %r0,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */
102 sl %r1,__VDSO_XTIME_STAMP+4(%r5) 104 sl %r1,__VDSO_XTIME_STAMP+4(%r5)
103 brc 3,12f 105 brc 3,12f
@@ -132,11 +134,13 @@ __kernel_clock_gettime:
13217: st %r2,0(%r3) /* store tp->tv_sec */ 13417: st %r2,0(%r3) /* store tp->tv_sec */
133 st %r1,4(%r3) /* store tp->tv_nsec */ 135 st %r1,4(%r3) /* store tp->tv_nsec */
134 lhi %r2,0 136 lhi %r2,0
137 ahi %r15,16
135 br %r14 138 br %r14
136 139
137 /* Fallback to system call */ 140 /* Fallback to system call */
13819: lhi %r1,__NR_clock_gettime 14119: lhi %r1,__NR_clock_gettime
139 svc 0 142 svc 0
143 ahi %r15,16
140 br %r14 144 br %r14
141 145
14220: .long 1000000000 14620: .long 1000000000
diff --git a/arch/s390/kernel/vdso32/gettimeofday.S b/arch/s390/kernel/vdso32/gettimeofday.S
index 60def5f562db..719de6186b20 100644
--- a/arch/s390/kernel/vdso32/gettimeofday.S
+++ b/arch/s390/kernel/vdso32/gettimeofday.S
@@ -19,6 +19,7 @@
19 .type __kernel_gettimeofday,@function 19 .type __kernel_gettimeofday,@function
20__kernel_gettimeofday: 20__kernel_gettimeofday:
21 .cfi_startproc 21 .cfi_startproc
22 ahi %r15,-16
22 basr %r5,0 23 basr %r5,0
230: al %r5,13f-0b(%r5) /* get &_vdso_data */ 240: al %r5,13f-0b(%r5) /* get &_vdso_data */
241: ltr %r3,%r3 /* check if tz is NULL */ 251: ltr %r3,%r3 /* check if tz is NULL */
@@ -29,30 +30,30 @@ __kernel_gettimeofday:
29 l %r4,__VDSO_UPD_COUNT+4(%r5) /* load update counter */ 30 l %r4,__VDSO_UPD_COUNT+4(%r5) /* load update counter */
30 tml %r4,0x0001 /* pending update ? loop */ 31 tml %r4,0x0001 /* pending update ? loop */
31 jnz 1b 32 jnz 1b
32 stcke 24(%r15) /* Store TOD clock */ 33 stcke 0(%r15) /* Store TOD clock */
33 lm %r0,%r1,25(%r15) 34 lm %r0,%r1,1(%r15)
34 s %r0,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */ 35 s %r0,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */
35 sl %r1,__VDSO_XTIME_STAMP+4(%r5) 36 sl %r1,__VDSO_XTIME_STAMP+4(%r5)
36 brc 3,3f 37 brc 3,3f
37 ahi %r0,-1 38 ahi %r0,-1
383: ms %r0,__VDSO_TK_MULT(%r5) /* * tk->mult */ 393: ms %r0,__VDSO_TK_MULT(%r5) /* * tk->mult */
39 st %r0,24(%r15) 40 st %r0,0(%r15)
40 l %r0,__VDSO_TK_MULT(%r5) 41 l %r0,__VDSO_TK_MULT(%r5)
41 ltr %r1,%r1 42 ltr %r1,%r1
42 mr %r0,%r0 43 mr %r0,%r0
43 jnm 4f 44 jnm 4f
44 a %r0,__VDSO_TK_MULT(%r5) 45 a %r0,__VDSO_TK_MULT(%r5)
454: al %r0,24(%r15) 464: al %r0,0(%r15)
46 al %r0,__VDSO_XTIME_NSEC(%r5) /* + xtime */ 47 al %r0,__VDSO_XTIME_NSEC(%r5) /* + xtime */
47 al %r1,__VDSO_XTIME_NSEC+4(%r5) 48 al %r1,__VDSO_XTIME_NSEC+4(%r5)
48 brc 12,5f 49 brc 12,5f
49 ahi %r0,1 50 ahi %r0,1
505: mvc 24(4,%r15),__VDSO_XTIME_SEC+4(%r5) 515: mvc 0(4,%r15),__VDSO_XTIME_SEC+4(%r5)
51 cl %r4,__VDSO_UPD_COUNT+4(%r5) /* check update counter */ 52 cl %r4,__VDSO_UPD_COUNT+4(%r5) /* check update counter */
52 jne 1b 53 jne 1b
53 l %r4,__VDSO_TK_SHIFT(%r5) /* Timekeeper shift */ 54 l %r4,__VDSO_TK_SHIFT(%r5) /* Timekeeper shift */
54 srdl %r0,0(%r4) /* >> tk->shift */ 55 srdl %r0,0(%r4) /* >> tk->shift */
55 l %r4,24(%r15) /* get tv_sec from stack */ 56 l %r4,0(%r15) /* get tv_sec from stack */
56 basr %r5,0 57 basr %r5,0
576: ltr %r0,%r0 586: ltr %r0,%r0
58 jnz 7f 59 jnz 7f
@@ -71,6 +72,7 @@ __kernel_gettimeofday:
719: srl %r0,6 729: srl %r0,6
72 st %r0,4(%r2) /* store tv->tv_usec */ 73 st %r0,4(%r2) /* store tv->tv_usec */
7310: slr %r2,%r2 7410: slr %r2,%r2
75 ahi %r15,16
74 br %r14 76 br %r14
7511: .long 1000000000 7711: .long 1000000000
7612: .long 274877907 7812: .long 274877907
diff --git a/arch/s390/kernel/vdso64/clock_gettime.S b/arch/s390/kernel/vdso64/clock_gettime.S
index 9d9761f8e110..7699e735ae28 100644
--- a/arch/s390/kernel/vdso64/clock_gettime.S
+++ b/arch/s390/kernel/vdso64/clock_gettime.S
@@ -19,6 +19,7 @@
19 .type __kernel_clock_gettime,@function 19 .type __kernel_clock_gettime,@function
20__kernel_clock_gettime: 20__kernel_clock_gettime:
21 .cfi_startproc 21 .cfi_startproc
22 aghi %r15,-16
22 larl %r5,_vdso_data 23 larl %r5,_vdso_data
23 cghi %r2,__CLOCK_REALTIME_COARSE 24 cghi %r2,__CLOCK_REALTIME_COARSE
24 je 4f 25 je 4f
@@ -37,10 +38,10 @@ __kernel_clock_gettime:
370: lg %r4,__VDSO_UPD_COUNT(%r5) /* load update counter */ 380: lg %r4,__VDSO_UPD_COUNT(%r5) /* load update counter */
38 tmll %r4,0x0001 /* pending update ? loop */ 39 tmll %r4,0x0001 /* pending update ? loop */
39 jnz 0b 40 jnz 0b
40 stcke 48(%r15) /* Store TOD clock */ 41 stcke 0(%r15) /* Store TOD clock */
41 lgf %r2,__VDSO_TK_SHIFT(%r5) /* Timekeeper shift */ 42 lgf %r2,__VDSO_TK_SHIFT(%r5) /* Timekeeper shift */
42 lg %r0,__VDSO_WTOM_SEC(%r5) 43 lg %r0,__VDSO_WTOM_SEC(%r5)
43 lg %r1,49(%r15) 44 lg %r1,1(%r15)
44 sg %r1,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */ 45 sg %r1,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */
45 msgf %r1,__VDSO_TK_MULT(%r5) /* * tk->mult */ 46 msgf %r1,__VDSO_TK_MULT(%r5) /* * tk->mult */
46 alg %r1,__VDSO_WTOM_NSEC(%r5) 47 alg %r1,__VDSO_WTOM_NSEC(%r5)
@@ -56,6 +57,7 @@ __kernel_clock_gettime:
562: stg %r0,0(%r3) /* store tp->tv_sec */ 572: stg %r0,0(%r3) /* store tp->tv_sec */
57 stg %r1,8(%r3) /* store tp->tv_nsec */ 58 stg %r1,8(%r3) /* store tp->tv_nsec */
58 lghi %r2,0 59 lghi %r2,0
60 aghi %r15,16
59 br %r14 61 br %r14
60 62
61 /* CLOCK_MONOTONIC_COARSE */ 63 /* CLOCK_MONOTONIC_COARSE */
@@ -82,9 +84,9 @@ __kernel_clock_gettime:
825: lg %r4,__VDSO_UPD_COUNT(%r5) /* load update counter */ 845: lg %r4,__VDSO_UPD_COUNT(%r5) /* load update counter */
83 tmll %r4,0x0001 /* pending update ? loop */ 85 tmll %r4,0x0001 /* pending update ? loop */
84 jnz 5b 86 jnz 5b
85 stcke 48(%r15) /* Store TOD clock */ 87 stcke 0(%r15) /* Store TOD clock */
86 lgf %r2,__VDSO_TK_SHIFT(%r5) /* Timekeeper shift */ 88 lgf %r2,__VDSO_TK_SHIFT(%r5) /* Timekeeper shift */
87 lg %r1,49(%r15) 89 lg %r1,1(%r15)
88 sg %r1,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */ 90 sg %r1,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */
89 msgf %r1,__VDSO_TK_MULT(%r5) /* * tk->mult */ 91 msgf %r1,__VDSO_TK_MULT(%r5) /* * tk->mult */
90 alg %r1,__VDSO_XTIME_NSEC(%r5) /* + tk->xtime_nsec */ 92 alg %r1,__VDSO_XTIME_NSEC(%r5) /* + tk->xtime_nsec */
@@ -101,6 +103,7 @@ __kernel_clock_gettime:
1017: stg %r0,0(%r3) /* store tp->tv_sec */ 1037: stg %r0,0(%r3) /* store tp->tv_sec */
102 stg %r1,8(%r3) /* store tp->tv_nsec */ 104 stg %r1,8(%r3) /* store tp->tv_nsec */
103 lghi %r2,0 105 lghi %r2,0
106 aghi %r15,16
104 br %r14 107 br %r14
105 108
106 /* CLOCK_THREAD_CPUTIME_ID for this thread */ 109 /* CLOCK_THREAD_CPUTIME_ID for this thread */
@@ -134,11 +137,13 @@ __kernel_clock_gettime:
134 slgr %r4,%r0 /* r4 = tv_nsec */ 137 slgr %r4,%r0 /* r4 = tv_nsec */
135 stg %r4,8(%r3) 138 stg %r4,8(%r3)
136 lghi %r2,0 139 lghi %r2,0
140 aghi %r15,16
137 br %r14 141 br %r14
138 142
139 /* Fallback to system call */ 143 /* Fallback to system call */
14012: lghi %r1,__NR_clock_gettime 14412: lghi %r1,__NR_clock_gettime
141 svc 0 145 svc 0
146 aghi %r15,16
142 br %r14 147 br %r14
143 148
14413: .quad 1000000000 14913: .quad 1000000000
diff --git a/arch/s390/kernel/vdso64/gettimeofday.S b/arch/s390/kernel/vdso64/gettimeofday.S
index 7a344995a97f..6ce46707663c 100644
--- a/arch/s390/kernel/vdso64/gettimeofday.S
+++ b/arch/s390/kernel/vdso64/gettimeofday.S
@@ -19,6 +19,7 @@
19 .type __kernel_gettimeofday,@function 19 .type __kernel_gettimeofday,@function
20__kernel_gettimeofday: 20__kernel_gettimeofday:
21 .cfi_startproc 21 .cfi_startproc
22 aghi %r15,-16
22 larl %r5,_vdso_data 23 larl %r5,_vdso_data
230: ltgr %r3,%r3 /* check if tz is NULL */ 240: ltgr %r3,%r3 /* check if tz is NULL */
24 je 1f 25 je 1f
@@ -28,8 +29,8 @@ __kernel_gettimeofday:
28 lg %r4,__VDSO_UPD_COUNT(%r5) /* load update counter */ 29 lg %r4,__VDSO_UPD_COUNT(%r5) /* load update counter */
29 tmll %r4,0x0001 /* pending update ? loop */ 30 tmll %r4,0x0001 /* pending update ? loop */
30 jnz 0b 31 jnz 0b
31 stcke 48(%r15) /* Store TOD clock */ 32 stcke 0(%r15) /* Store TOD clock */
32 lg %r1,49(%r15) 33 lg %r1,1(%r15)
33 sg %r1,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */ 34 sg %r1,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */
34 msgf %r1,__VDSO_TK_MULT(%r5) /* * tk->mult */ 35 msgf %r1,__VDSO_TK_MULT(%r5) /* * tk->mult */
35 alg %r1,__VDSO_XTIME_NSEC(%r5) /* + tk->xtime_nsec */ 36 alg %r1,__VDSO_XTIME_NSEC(%r5) /* + tk->xtime_nsec */
@@ -50,6 +51,7 @@ __kernel_gettimeofday:
50 srlg %r0,%r0,6 51 srlg %r0,%r0,6
51 stg %r0,8(%r2) /* store tv->tv_usec */ 52 stg %r0,8(%r2) /* store tv->tv_usec */
524: lghi %r2,0 534: lghi %r2,0
54 aghi %r15,16
53 br %r14 55 br %r14
545: .quad 1000000000 565: .quad 1000000000
55 .long 274877907 57 .long 274877907
diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c
index 416f2a323ba5..7f0089d9a4aa 100644
--- a/arch/s390/kernel/vtime.c
+++ b/arch/s390/kernel/vtime.c
@@ -66,7 +66,11 @@ static int do_account_vtime(struct task_struct *tsk, int hardirq_offset)
66 clock = S390_lowcore.last_update_clock; 66 clock = S390_lowcore.last_update_clock;
67 asm volatile( 67 asm volatile(
68 " stpt %0\n" /* Store current cpu timer value */ 68 " stpt %0\n" /* Store current cpu timer value */
69#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
70 " stckf %1" /* Store current tod clock value */
71#else
69 " stck %1" /* Store current tod clock value */ 72 " stck %1" /* Store current tod clock value */
73#endif
70 : "=m" (S390_lowcore.last_update_timer), 74 : "=m" (S390_lowcore.last_update_timer),
71 "=m" (S390_lowcore.last_update_clock)); 75 "=m" (S390_lowcore.last_update_clock));
72 S390_lowcore.system_timer += timer - S390_lowcore.last_update_timer; 76 S390_lowcore.system_timer += timer - S390_lowcore.last_update_timer;
diff --git a/arch/s390/lib/probes.c b/arch/s390/lib/probes.c
index c5d64a099719..ae90e1ae3607 100644
--- a/arch/s390/lib/probes.c
+++ b/arch/s390/lib/probes.c
@@ -4,7 +4,7 @@
4 * Copyright IBM Corp. 2014 4 * Copyright IBM Corp. 2014
5 */ 5 */
6 6
7#include <linux/kprobes.h> 7#include <asm/kprobes.h>
8#include <asm/dis.h> 8#include <asm/dis.h>
9 9
10int probe_is_prohibited_opcode(u16 *insn) 10int probe_is_prohibited_opcode(u16 *insn)
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index 296b61a4af59..1b79ca67392f 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -656,7 +656,7 @@ void __gmap_zap(struct gmap *gmap, unsigned long gaddr)
656 } 656 }
657 pgste_set_unlock(ptep, pgste); 657 pgste_set_unlock(ptep, pgste);
658out_pte: 658out_pte:
659 pte_unmap_unlock(*ptep, ptl); 659 pte_unmap_unlock(ptep, ptl);
660} 660}
661EXPORT_SYMBOL_GPL(__gmap_zap); 661EXPORT_SYMBOL_GPL(__gmap_zap);
662 662
@@ -943,7 +943,7 @@ retry:
943 } 943 }
944 if (!(pte_val(*ptep) & _PAGE_INVALID) && 944 if (!(pte_val(*ptep) & _PAGE_INVALID) &&
945 (pte_val(*ptep) & _PAGE_PROTECT)) { 945 (pte_val(*ptep) & _PAGE_PROTECT)) {
946 pte_unmap_unlock(*ptep, ptl); 946 pte_unmap_unlock(ptep, ptl);
947 if (fixup_user_fault(current, mm, addr, FAULT_FLAG_WRITE)) { 947 if (fixup_user_fault(current, mm, addr, FAULT_FLAG_WRITE)) {
948 up_read(&mm->mmap_sem); 948 up_read(&mm->mmap_sem);
949 return -EFAULT; 949 return -EFAULT;
@@ -974,7 +974,7 @@ retry:
974 pgste_val(new) |= PGSTE_UC_BIT; 974 pgste_val(new) |= PGSTE_UC_BIT;
975 975
976 pgste_set_unlock(ptep, new); 976 pgste_set_unlock(ptep, new);
977 pte_unmap_unlock(*ptep, ptl); 977 pte_unmap_unlock(ptep, ptl);
978 up_read(&mm->mmap_sem); 978 up_read(&mm->mmap_sem);
979 return 0; 979 return 0;
980} 980}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index 9139d14b9c53..538c10db3537 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -118,7 +118,7 @@ static struct plat_sci_port scif0_platform_data = {
118}; 118};
119 119
120static struct resource scif0_resources[] = { 120static struct resource scif0_resources[] = {
121 DEFINE_RES_MEM(0xfffffe80, 0x100), 121 DEFINE_RES_MEM(0xfffffe80, 0x10),
122 DEFINE_RES_IRQ(evt2irq(0x4e0)), 122 DEFINE_RES_IRQ(evt2irq(0x4e0)),
123}; 123};
124 124
@@ -143,7 +143,7 @@ static struct plat_sci_port scif1_platform_data = {
143}; 143};
144 144
145static struct resource scif1_resources[] = { 145static struct resource scif1_resources[] = {
146 DEFINE_RES_MEM(0xa4000150, 0x100), 146 DEFINE_RES_MEM(0xa4000150, 0x10),
147 DEFINE_RES_IRQ(evt2irq(0x900)), 147 DEFINE_RES_IRQ(evt2irq(0x900)),
148}; 148};
149 149
@@ -169,7 +169,7 @@ static struct plat_sci_port scif2_platform_data = {
169}; 169};
170 170
171static struct resource scif2_resources[] = { 171static struct resource scif2_resources[] = {
172 DEFINE_RES_MEM(0xa4000140, 0x100), 172 DEFINE_RES_MEM(0xa4000140, 0x10),
173 DEFINE_RES_IRQ(evt2irq(0x880)), 173 DEFINE_RES_IRQ(evt2irq(0x880)),
174}; 174};
175 175
diff --git a/arch/sparc/include/asm/oplib_64.h b/arch/sparc/include/asm/oplib_64.h
index f34682430fcf..2e3a4add8591 100644
--- a/arch/sparc/include/asm/oplib_64.h
+++ b/arch/sparc/include/asm/oplib_64.h
@@ -62,7 +62,8 @@ struct linux_mem_p1275 {
62/* You must call prom_init() before using any of the library services, 62/* You must call prom_init() before using any of the library services,
63 * preferably as early as possible. Pass it the romvec pointer. 63 * preferably as early as possible. Pass it the romvec pointer.
64 */ 64 */
65void prom_init(void *cif_handler, void *cif_stack); 65void prom_init(void *cif_handler);
66void prom_init_report(void);
66 67
67/* Boot argument acquisition, returns the boot command line string. */ 68/* Boot argument acquisition, returns the boot command line string. */
68char *prom_getbootargs(void); 69char *prom_getbootargs(void);
diff --git a/arch/sparc/include/asm/setup.h b/arch/sparc/include/asm/setup.h
index f5fffd84d0dd..29d64b1758ed 100644
--- a/arch/sparc/include/asm/setup.h
+++ b/arch/sparc/include/asm/setup.h
@@ -48,6 +48,8 @@ unsigned long safe_compute_effective_address(struct pt_regs *, unsigned int);
48#endif 48#endif
49 49
50#ifdef CONFIG_SPARC64 50#ifdef CONFIG_SPARC64
51void __init start_early_boot(void);
52
51/* unaligned_64.c */ 53/* unaligned_64.c */
52int handle_ldf_stq(u32 insn, struct pt_regs *regs); 54int handle_ldf_stq(u32 insn, struct pt_regs *regs);
53void handle_ld_nf(u32 insn, struct pt_regs *regs); 55void handle_ld_nf(u32 insn, struct pt_regs *regs);
diff --git a/arch/sparc/include/uapi/asm/unistd.h b/arch/sparc/include/uapi/asm/unistd.h
index c842a89b1190..46d83842eddc 100644
--- a/arch/sparc/include/uapi/asm/unistd.h
+++ b/arch/sparc/include/uapi/asm/unistd.h
@@ -414,8 +414,9 @@
414#define __NR_seccomp 346 414#define __NR_seccomp 346
415#define __NR_getrandom 347 415#define __NR_getrandom 347
416#define __NR_memfd_create 348 416#define __NR_memfd_create 348
417#define __NR_bpf 349
417 418
418#define NR_syscalls 349 419#define NR_syscalls 350
419 420
420/* Bitmask values returned from kern_features system call. */ 421/* Bitmask values returned from kern_features system call. */
421#define KERN_FEATURE_MIXED_MODE_STACK 0x00000001 422#define KERN_FEATURE_MIXED_MODE_STACK 0x00000001
diff --git a/arch/sparc/kernel/entry.h b/arch/sparc/kernel/entry.h
index ebaba6167dd4..88d322b67fac 100644
--- a/arch/sparc/kernel/entry.h
+++ b/arch/sparc/kernel/entry.h
@@ -65,13 +65,10 @@ struct pause_patch_entry {
65extern struct pause_patch_entry __pause_3insn_patch, 65extern struct pause_patch_entry __pause_3insn_patch,
66 __pause_3insn_patch_end; 66 __pause_3insn_patch_end;
67 67
68void __init per_cpu_patch(void);
69void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *, 68void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *,
70 struct sun4v_1insn_patch_entry *); 69 struct sun4v_1insn_patch_entry *);
71void sun4v_patch_2insn_range(struct sun4v_2insn_patch_entry *, 70void sun4v_patch_2insn_range(struct sun4v_2insn_patch_entry *,
72 struct sun4v_2insn_patch_entry *); 71 struct sun4v_2insn_patch_entry *);
73void __init sun4v_patch(void);
74void __init boot_cpu_id_too_large(int cpu);
75extern unsigned int dcache_parity_tl1_occurred; 72extern unsigned int dcache_parity_tl1_occurred;
76extern unsigned int icache_parity_tl1_occurred; 73extern unsigned int icache_parity_tl1_occurred;
77 74
diff --git a/arch/sparc/kernel/head_64.S b/arch/sparc/kernel/head_64.S
index 4fdeb8040d4d..3d61fcae7ee3 100644
--- a/arch/sparc/kernel/head_64.S
+++ b/arch/sparc/kernel/head_64.S
@@ -672,14 +672,12 @@ tlb_fixup_done:
672 sethi %hi(init_thread_union), %g6 672 sethi %hi(init_thread_union), %g6
673 or %g6, %lo(init_thread_union), %g6 673 or %g6, %lo(init_thread_union), %g6
674 ldx [%g6 + TI_TASK], %g4 674 ldx [%g6 + TI_TASK], %g4
675 mov %sp, %l6
676 675
677 wr %g0, ASI_P, %asi 676 wr %g0, ASI_P, %asi
678 mov 1, %g1 677 mov 1, %g1
679 sllx %g1, THREAD_SHIFT, %g1 678 sllx %g1, THREAD_SHIFT, %g1
680 sub %g1, (STACKFRAME_SZ + STACK_BIAS), %g1 679 sub %g1, (STACKFRAME_SZ + STACK_BIAS), %g1
681 add %g6, %g1, %sp 680 add %g6, %g1, %sp
682 mov 0, %fp
683 681
684 /* Set per-cpu pointer initially to zero, this makes 682 /* Set per-cpu pointer initially to zero, this makes
685 * the boot-cpu use the in-kernel-image per-cpu areas 683 * the boot-cpu use the in-kernel-image per-cpu areas
@@ -706,44 +704,14 @@ tlb_fixup_done:
706 nop 704 nop
707#endif 705#endif
708 706
709 mov %l6, %o1 ! OpenPROM stack
710 call prom_init 707 call prom_init
711 mov %l7, %o0 ! OpenPROM cif handler 708 mov %l7, %o0 ! OpenPROM cif handler
712 709
713 /* Initialize current_thread_info()->cpu as early as possible. 710 /* To create a one-register-window buffer between the kernel's
714 * In order to do that accurately we have to patch up the get_cpuid() 711 * initial stack and the last stack frame we use from the firmware,
715 * assembler sequences. And that, in turn, requires that we know 712 * do the rest of the boot from a C helper function.
716 * if we are on a Starfire box or not. While we're here, patch up
717 * the sun4v sequences as well.
718 */ 713 */
719 call check_if_starfire 714 call start_early_boot
720 nop
721 call per_cpu_patch
722 nop
723 call sun4v_patch
724 nop
725
726#ifdef CONFIG_SMP
727 call hard_smp_processor_id
728 nop
729 cmp %o0, NR_CPUS
730 blu,pt %xcc, 1f
731 nop
732 call boot_cpu_id_too_large
733 nop
734 /* Not reached... */
735
7361:
737#else
738 mov 0, %o0
739#endif
740 sth %o0, [%g6 + TI_CPU]
741
742 call prom_init_report
743 nop
744
745 /* Off we go.... */
746 call start_kernel
747 nop 715 nop
748 /* Not reached... */ 716 /* Not reached... */
749 717
diff --git a/arch/sparc/kernel/hvtramp.S b/arch/sparc/kernel/hvtramp.S
index b7ddcdd1dea9..cdbfec299f2f 100644
--- a/arch/sparc/kernel/hvtramp.S
+++ b/arch/sparc/kernel/hvtramp.S
@@ -109,7 +109,6 @@ hv_cpu_startup:
109 sllx %g5, THREAD_SHIFT, %g5 109 sllx %g5, THREAD_SHIFT, %g5
110 sub %g5, (STACKFRAME_SZ + STACK_BIAS), %g5 110 sub %g5, (STACKFRAME_SZ + STACK_BIAS), %g5
111 add %g6, %g5, %sp 111 add %g6, %g5, %sp
112 mov 0, %fp
113 112
114 call init_irqwork_curcpu 113 call init_irqwork_curcpu
115 nop 114 nop
diff --git a/arch/sparc/kernel/setup_64.c b/arch/sparc/kernel/setup_64.c
index e629b8377587..c38d19fc27ba 100644
--- a/arch/sparc/kernel/setup_64.c
+++ b/arch/sparc/kernel/setup_64.c
@@ -30,6 +30,7 @@
30#include <linux/cpu.h> 30#include <linux/cpu.h>
31#include <linux/initrd.h> 31#include <linux/initrd.h>
32#include <linux/module.h> 32#include <linux/module.h>
33#include <linux/start_kernel.h>
33 34
34#include <asm/io.h> 35#include <asm/io.h>
35#include <asm/processor.h> 36#include <asm/processor.h>
@@ -162,7 +163,7 @@ char reboot_command[COMMAND_LINE_SIZE];
162 163
163static struct pt_regs fake_swapper_regs = { { 0, }, 0, 0, 0, 0 }; 164static struct pt_regs fake_swapper_regs = { { 0, }, 0, 0, 0, 0 };
164 165
165void __init per_cpu_patch(void) 166static void __init per_cpu_patch(void)
166{ 167{
167 struct cpuid_patch_entry *p; 168 struct cpuid_patch_entry *p;
168 unsigned long ver; 169 unsigned long ver;
@@ -254,7 +255,7 @@ void sun4v_patch_2insn_range(struct sun4v_2insn_patch_entry *start,
254 } 255 }
255} 256}
256 257
257void __init sun4v_patch(void) 258static void __init sun4v_patch(void)
258{ 259{
259 extern void sun4v_hvapi_init(void); 260 extern void sun4v_hvapi_init(void);
260 261
@@ -323,14 +324,25 @@ static void __init pause_patch(void)
323 } 324 }
324} 325}
325 326
326#ifdef CONFIG_SMP 327void __init start_early_boot(void)
327void __init boot_cpu_id_too_large(int cpu)
328{ 328{
329 prom_printf("Serious problem, boot cpu id (%d) >= NR_CPUS (%d)\n", 329 int cpu;
330 cpu, NR_CPUS); 330
331 prom_halt(); 331 check_if_starfire();
332 per_cpu_patch();
333 sun4v_patch();
334
335 cpu = hard_smp_processor_id();
336 if (cpu >= NR_CPUS) {
337 prom_printf("Serious problem, boot cpu id (%d) >= NR_CPUS (%d)\n",
338 cpu, NR_CPUS);
339 prom_halt();
340 }
341 current_thread_info()->cpu = cpu;
342
343 prom_init_report();
344 start_kernel();
332} 345}
333#endif
334 346
335/* On Ultra, we support all of the v8 capabilities. */ 347/* On Ultra, we support all of the v8 capabilities. */
336unsigned long sparc64_elf_hwcap = (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | 348unsigned long sparc64_elf_hwcap = (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR |
diff --git a/arch/sparc/kernel/systbls_32.S b/arch/sparc/kernel/systbls_32.S
index 6a873c344bc0..ad0cdf497b78 100644
--- a/arch/sparc/kernel/systbls_32.S
+++ b/arch/sparc/kernel/systbls_32.S
@@ -86,4 +86,4 @@ sys_call_table:
86/*330*/ .long sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime 86/*330*/ .long sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime
87/*335*/ .long sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev 87/*335*/ .long sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev
88/*340*/ .long sys_ni_syscall, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr 88/*340*/ .long sys_ni_syscall, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr
89/*345*/ .long sys_renameat2, sys_seccomp, sys_getrandom, sys_memfd_create 89/*345*/ .long sys_renameat2, sys_seccomp, sys_getrandom, sys_memfd_create, sys_bpf
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S
index d9151b6490d8..580cde9370c9 100644
--- a/arch/sparc/kernel/systbls_64.S
+++ b/arch/sparc/kernel/systbls_64.S
@@ -87,7 +87,7 @@ sys_call_table32:
87/*330*/ .word compat_sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, compat_sys_open_by_handle_at, compat_sys_clock_adjtime 87/*330*/ .word compat_sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, compat_sys_open_by_handle_at, compat_sys_clock_adjtime
88 .word sys_syncfs, compat_sys_sendmmsg, sys_setns, compat_sys_process_vm_readv, compat_sys_process_vm_writev 88 .word sys_syncfs, compat_sys_sendmmsg, sys_setns, compat_sys_process_vm_readv, compat_sys_process_vm_writev
89/*340*/ .word sys_kern_features, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr 89/*340*/ .word sys_kern_features, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr
90 .word sys32_renameat2, sys_seccomp, sys_getrandom, sys_memfd_create 90 .word sys32_renameat2, sys_seccomp, sys_getrandom, sys_memfd_create, sys_bpf
91 91
92#endif /* CONFIG_COMPAT */ 92#endif /* CONFIG_COMPAT */
93 93
@@ -166,4 +166,4 @@ sys_call_table:
166/*330*/ .word sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime 166/*330*/ .word sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime
167 .word sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev 167 .word sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev
168/*340*/ .word sys_kern_features, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr 168/*340*/ .word sys_kern_features, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr
169 .word sys_renameat2, sys_seccomp, sys_getrandom, sys_memfd_create 169 .word sys_renameat2, sys_seccomp, sys_getrandom, sys_memfd_create, sys_bpf
diff --git a/arch/sparc/kernel/trampoline_64.S b/arch/sparc/kernel/trampoline_64.S
index 737f8cbc7d56..88ede1d53b4c 100644
--- a/arch/sparc/kernel/trampoline_64.S
+++ b/arch/sparc/kernel/trampoline_64.S
@@ -109,10 +109,13 @@ startup_continue:
109 brnz,pn %g1, 1b 109 brnz,pn %g1, 1b
110 nop 110 nop
111 111
112 sethi %hi(p1275buf), %g2 112 /* Get onto temporary stack which will be in the locked
113 or %g2, %lo(p1275buf), %g2 113 * kernel image.
114 ldx [%g2 + 0x10], %l2 114 */
115 add %l2, -(192 + 128), %sp 115 sethi %hi(tramp_stack), %g1
116 or %g1, %lo(tramp_stack), %g1
117 add %g1, TRAMP_STACK_SIZE, %g1
118 sub %g1, STACKFRAME_SZ + STACK_BIAS + 256, %sp
116 flushw 119 flushw
117 120
118 /* Setup the loop variables: 121 /* Setup the loop variables:
@@ -394,7 +397,6 @@ after_lock_tlb:
394 sllx %g5, THREAD_SHIFT, %g5 397 sllx %g5, THREAD_SHIFT, %g5
395 sub %g5, (STACKFRAME_SZ + STACK_BIAS), %g5 398 sub %g5, (STACKFRAME_SZ + STACK_BIAS), %g5
396 add %g6, %g5, %sp 399 add %g6, %g5, %sp
397 mov 0, %fp
398 400
399 rdpr %pstate, %o1 401 rdpr %pstate, %o1
400 or %o1, PSTATE_IE, %o1 402 or %o1, PSTATE_IE, %o1
diff --git a/arch/sparc/mm/gup.c b/arch/sparc/mm/gup.c
index 1aed0432c64b..ae6ce383d4df 100644
--- a/arch/sparc/mm/gup.c
+++ b/arch/sparc/mm/gup.c
@@ -160,6 +160,36 @@ static int gup_pud_range(pgd_t pgd, unsigned long addr, unsigned long end,
160 return 1; 160 return 1;
161} 161}
162 162
163int __get_user_pages_fast(unsigned long start, int nr_pages, int write,
164 struct page **pages)
165{
166 struct mm_struct *mm = current->mm;
167 unsigned long addr, len, end;
168 unsigned long next, flags;
169 pgd_t *pgdp;
170 int nr = 0;
171
172 start &= PAGE_MASK;
173 addr = start;
174 len = (unsigned long) nr_pages << PAGE_SHIFT;
175 end = start + len;
176
177 local_irq_save(flags);
178 pgdp = pgd_offset(mm, addr);
179 do {
180 pgd_t pgd = *pgdp;
181
182 next = pgd_addr_end(addr, end);
183 if (pgd_none(pgd))
184 break;
185 if (!gup_pud_range(pgd, addr, next, write, pages, &nr))
186 break;
187 } while (pgdp++, addr = next, addr != end);
188 local_irq_restore(flags);
189
190 return nr;
191}
192
163int get_user_pages_fast(unsigned long start, int nr_pages, int write, 193int get_user_pages_fast(unsigned long start, int nr_pages, int write,
164 struct page **pages) 194 struct page **pages)
165{ 195{
diff --git a/arch/sparc/prom/cif.S b/arch/sparc/prom/cif.S
index 9c86b4b7d429..8050f381f518 100644
--- a/arch/sparc/prom/cif.S
+++ b/arch/sparc/prom/cif.S
@@ -11,11 +11,10 @@
11 .text 11 .text
12 .globl prom_cif_direct 12 .globl prom_cif_direct
13prom_cif_direct: 13prom_cif_direct:
14 save %sp, -192, %sp
14 sethi %hi(p1275buf), %o1 15 sethi %hi(p1275buf), %o1
15 or %o1, %lo(p1275buf), %o1 16 or %o1, %lo(p1275buf), %o1
16 ldx [%o1 + 0x0010], %o2 ! prom_cif_stack 17 ldx [%o1 + 0x0008], %l2 ! prom_cif_handler
17 save %o2, -192, %sp
18 ldx [%i1 + 0x0008], %l2 ! prom_cif_handler
19 mov %g4, %l0 18 mov %g4, %l0
20 mov %g5, %l1 19 mov %g5, %l1
21 mov %g6, %l3 20 mov %g6, %l3
diff --git a/arch/sparc/prom/init_64.c b/arch/sparc/prom/init_64.c
index d95db755828f..110b0d78b864 100644
--- a/arch/sparc/prom/init_64.c
+++ b/arch/sparc/prom/init_64.c
@@ -26,13 +26,13 @@ phandle prom_chosen_node;
26 * It gets passed the pointer to the PROM vector. 26 * It gets passed the pointer to the PROM vector.
27 */ 27 */
28 28
29extern void prom_cif_init(void *, void *); 29extern void prom_cif_init(void *);
30 30
31void __init prom_init(void *cif_handler, void *cif_stack) 31void __init prom_init(void *cif_handler)
32{ 32{
33 phandle node; 33 phandle node;
34 34
35 prom_cif_init(cif_handler, cif_stack); 35 prom_cif_init(cif_handler);
36 36
37 prom_chosen_node = prom_finddevice(prom_chosen_path); 37 prom_chosen_node = prom_finddevice(prom_chosen_path);
38 if (!prom_chosen_node || (s32)prom_chosen_node == -1) 38 if (!prom_chosen_node || (s32)prom_chosen_node == -1)
diff --git a/arch/sparc/prom/p1275.c b/arch/sparc/prom/p1275.c
index b2340f008ae0..545d8bb79b65 100644
--- a/arch/sparc/prom/p1275.c
+++ b/arch/sparc/prom/p1275.c
@@ -20,7 +20,6 @@
20struct { 20struct {
21 long prom_callback; /* 0x00 */ 21 long prom_callback; /* 0x00 */
22 void (*prom_cif_handler)(long *); /* 0x08 */ 22 void (*prom_cif_handler)(long *); /* 0x08 */
23 unsigned long prom_cif_stack; /* 0x10 */
24} p1275buf; 23} p1275buf;
25 24
26extern void prom_world(int); 25extern void prom_world(int);
@@ -52,5 +51,4 @@ void p1275_cmd_direct(unsigned long *args)
52void prom_cif_init(void *cif_handler, void *cif_stack) 51void prom_cif_init(void *cif_handler, void *cif_stack)
53{ 52{
54 p1275buf.prom_cif_handler = (void (*)(long *))cif_handler; 53 p1275buf.prom_cif_handler = (void (*)(long *))cif_handler;
55 p1275buf.prom_cif_stack = (unsigned long)cif_stack;
56} 54}
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index f2327e88e07c..ded8a6774ac9 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -142,6 +142,10 @@ config INSTRUCTION_DECODER
142 def_bool y 142 def_bool y
143 depends on KPROBES || PERF_EVENTS || UPROBES 143 depends on KPROBES || PERF_EVENTS || UPROBES
144 144
145config PERF_EVENTS_INTEL_UNCORE
146 def_bool y
147 depends on PERF_EVENTS && SUP_SUP_INTEL && PCI
148
145config OUTPUT_FORMAT 149config OUTPUT_FORMAT
146 string 150 string
147 default "elf32-i386" if X86_32 151 default "elf32-i386" if X86_32
diff --git a/arch/x86/boot/compressed/eboot.c b/arch/x86/boot/compressed/eboot.c
index de8eebd6f67c..1acf605a646d 100644
--- a/arch/x86/boot/compressed/eboot.c
+++ b/arch/x86/boot/compressed/eboot.c
@@ -330,8 +330,10 @@ __setup_efi_pci32(efi_pci_io_protocol_32 *pci, struct pci_setup_rom **__rom)
330 size = pci->romsize + sizeof(*rom); 330 size = pci->romsize + sizeof(*rom);
331 331
332 status = efi_call_early(allocate_pool, EFI_LOADER_DATA, size, &rom); 332 status = efi_call_early(allocate_pool, EFI_LOADER_DATA, size, &rom);
333 if (status != EFI_SUCCESS) 333 if (status != EFI_SUCCESS) {
334 efi_printk(sys_table, "Failed to alloc mem for rom\n");
334 return status; 335 return status;
336 }
335 337
336 memset(rom, 0, sizeof(*rom)); 338 memset(rom, 0, sizeof(*rom));
337 339
@@ -344,14 +346,18 @@ __setup_efi_pci32(efi_pci_io_protocol_32 *pci, struct pci_setup_rom **__rom)
344 status = efi_early->call(pci->pci.read, pci, EfiPciIoWidthUint16, 346 status = efi_early->call(pci->pci.read, pci, EfiPciIoWidthUint16,
345 PCI_VENDOR_ID, 1, &(rom->vendor)); 347 PCI_VENDOR_ID, 1, &(rom->vendor));
346 348
347 if (status != EFI_SUCCESS) 349 if (status != EFI_SUCCESS) {
350 efi_printk(sys_table, "Failed to read rom->vendor\n");
348 goto free_struct; 351 goto free_struct;
352 }
349 353
350 status = efi_early->call(pci->pci.read, pci, EfiPciIoWidthUint16, 354 status = efi_early->call(pci->pci.read, pci, EfiPciIoWidthUint16,
351 PCI_DEVICE_ID, 1, &(rom->devid)); 355 PCI_DEVICE_ID, 1, &(rom->devid));
352 356
353 if (status != EFI_SUCCESS) 357 if (status != EFI_SUCCESS) {
358 efi_printk(sys_table, "Failed to read rom->devid\n");
354 goto free_struct; 359 goto free_struct;
360 }
355 361
356 status = efi_early->call(pci->get_location, pci, &(rom->segment), 362 status = efi_early->call(pci->get_location, pci, &(rom->segment),
357 &(rom->bus), &(rom->device), &(rom->function)); 363 &(rom->bus), &(rom->device), &(rom->function));
@@ -432,8 +438,10 @@ __setup_efi_pci64(efi_pci_io_protocol_64 *pci, struct pci_setup_rom **__rom)
432 size = pci->romsize + sizeof(*rom); 438 size = pci->romsize + sizeof(*rom);
433 439
434 status = efi_call_early(allocate_pool, EFI_LOADER_DATA, size, &rom); 440 status = efi_call_early(allocate_pool, EFI_LOADER_DATA, size, &rom);
435 if (status != EFI_SUCCESS) 441 if (status != EFI_SUCCESS) {
442 efi_printk(sys_table, "Failed to alloc mem for rom\n");
436 return status; 443 return status;
444 }
437 445
438 rom->data.type = SETUP_PCI; 446 rom->data.type = SETUP_PCI;
439 rom->data.len = size - sizeof(struct setup_data); 447 rom->data.len = size - sizeof(struct setup_data);
@@ -444,14 +452,18 @@ __setup_efi_pci64(efi_pci_io_protocol_64 *pci, struct pci_setup_rom **__rom)
444 status = efi_early->call(pci->pci.read, pci, EfiPciIoWidthUint16, 452 status = efi_early->call(pci->pci.read, pci, EfiPciIoWidthUint16,
445 PCI_VENDOR_ID, 1, &(rom->vendor)); 453 PCI_VENDOR_ID, 1, &(rom->vendor));
446 454
447 if (status != EFI_SUCCESS) 455 if (status != EFI_SUCCESS) {
456 efi_printk(sys_table, "Failed to read rom->vendor\n");
448 goto free_struct; 457 goto free_struct;
458 }
449 459
450 status = efi_early->call(pci->pci.read, pci, EfiPciIoWidthUint16, 460 status = efi_early->call(pci->pci.read, pci, EfiPciIoWidthUint16,
451 PCI_DEVICE_ID, 1, &(rom->devid)); 461 PCI_DEVICE_ID, 1, &(rom->devid));
452 462
453 if (status != EFI_SUCCESS) 463 if (status != EFI_SUCCESS) {
464 efi_printk(sys_table, "Failed to read rom->devid\n");
454 goto free_struct; 465 goto free_struct;
466 }
455 467
456 status = efi_early->call(pci->get_location, pci, &(rom->segment), 468 status = efi_early->call(pci->get_location, pci, &(rom->segment),
457 &(rom->bus), &(rom->device), &(rom->function)); 469 &(rom->bus), &(rom->device), &(rom->function));
@@ -538,8 +550,10 @@ static void setup_efi_pci(struct boot_params *params)
538 EFI_LOADER_DATA, 550 EFI_LOADER_DATA,
539 size, (void **)&pci_handle); 551 size, (void **)&pci_handle);
540 552
541 if (status != EFI_SUCCESS) 553 if (status != EFI_SUCCESS) {
554 efi_printk(sys_table, "Failed to alloc mem for pci_handle\n");
542 return; 555 return;
556 }
543 557
544 status = efi_call_early(locate_handle, 558 status = efi_call_early(locate_handle,
545 EFI_LOCATE_BY_PROTOCOL, &pci_proto, 559 EFI_LOCATE_BY_PROTOCOL, &pci_proto,
@@ -1105,6 +1119,10 @@ struct boot_params *make_boot_params(struct efi_config *c)
1105 1119
1106 memset(sdt, 0, sizeof(*sdt)); 1120 memset(sdt, 0, sizeof(*sdt));
1107 1121
1122 status = efi_parse_options(cmdline_ptr);
1123 if (status != EFI_SUCCESS)
1124 goto fail2;
1125
1108 status = handle_cmdline_files(sys_table, image, 1126 status = handle_cmdline_files(sys_table, image,
1109 (char *)(unsigned long)hdr->cmd_line_ptr, 1127 (char *)(unsigned long)hdr->cmd_line_ptr,
1110 "initrd=", hdr->initrd_addr_max, 1128 "initrd=", hdr->initrd_addr_max,
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S
index 8ffba18395c8..ffe71228fc10 100644
--- a/arch/x86/ia32/ia32entry.S
+++ b/arch/x86/ia32/ia32entry.S
@@ -157,7 +157,7 @@ ENTRY(ia32_sysenter_target)
157 * ourselves. To save a few cycles, we can check whether 157 * ourselves. To save a few cycles, we can check whether
158 * NT was set instead of doing an unconditional popfq. 158 * NT was set instead of doing an unconditional popfq.
159 */ 159 */
160 testl $X86_EFLAGS_NT,EFLAGS(%rsp) /* saved EFLAGS match cpu */ 160 testl $X86_EFLAGS_NT,EFLAGS-ARGOFFSET(%rsp)
161 jnz sysenter_fix_flags 161 jnz sysenter_fix_flags
162sysenter_flags_fixed: 162sysenter_flags_fixed:
163 163
diff --git a/arch/x86/include/asm/efi.h b/arch/x86/include/asm/efi.h
index 0ec241ede5a2..9b11757975d0 100644
--- a/arch/x86/include/asm/efi.h
+++ b/arch/x86/include/asm/efi.h
@@ -81,24 +81,23 @@ extern u64 asmlinkage efi_call(void *fp, ...);
81 */ 81 */
82#define __efi_call_virt(f, args...) efi_call_virt(f, args) 82#define __efi_call_virt(f, args...) efi_call_virt(f, args)
83 83
84extern void __iomem *efi_ioremap(unsigned long addr, unsigned long size, 84extern void __iomem *__init efi_ioremap(unsigned long addr, unsigned long size,
85 u32 type, u64 attribute); 85 u32 type, u64 attribute);
86 86
87#endif /* CONFIG_X86_32 */ 87#endif /* CONFIG_X86_32 */
88 88
89extern int add_efi_memmap;
90extern struct efi_scratch efi_scratch; 89extern struct efi_scratch efi_scratch;
91extern void efi_set_executable(efi_memory_desc_t *md, bool executable); 90extern void __init efi_set_executable(efi_memory_desc_t *md, bool executable);
92extern int efi_memblock_x86_reserve_range(void); 91extern int __init efi_memblock_x86_reserve_range(void);
93extern void efi_call_phys_prelog(void); 92extern void __init efi_call_phys_prolog(void);
94extern void efi_call_phys_epilog(void); 93extern void __init efi_call_phys_epilog(void);
95extern void efi_unmap_memmap(void); 94extern void __init efi_unmap_memmap(void);
96extern void efi_memory_uc(u64 addr, unsigned long size); 95extern void __init efi_memory_uc(u64 addr, unsigned long size);
97extern void __init efi_map_region(efi_memory_desc_t *md); 96extern void __init efi_map_region(efi_memory_desc_t *md);
98extern void __init efi_map_region_fixed(efi_memory_desc_t *md); 97extern void __init efi_map_region_fixed(efi_memory_desc_t *md);
99extern void efi_sync_low_kernel_mappings(void); 98extern void efi_sync_low_kernel_mappings(void);
100extern int efi_setup_page_tables(unsigned long pa_memmap, unsigned num_pages); 99extern int __init efi_setup_page_tables(unsigned long pa_memmap, unsigned num_pages);
101extern void efi_cleanup_page_tables(unsigned long pa_memmap, unsigned num_pages); 100extern void __init efi_cleanup_page_tables(unsigned long pa_memmap, unsigned num_pages);
102extern void __init old_map_region(efi_memory_desc_t *md); 101extern void __init old_map_region(efi_memory_desc_t *md);
103extern void __init runtime_code_page_mkexec(void); 102extern void __init runtime_code_page_mkexec(void);
104extern void __init efi_runtime_mkexec(void); 103extern void __init efi_runtime_mkexec(void);
@@ -162,16 +161,6 @@ static inline efi_status_t efi_thunk_set_virtual_address_map(
162extern bool efi_reboot_required(void); 161extern bool efi_reboot_required(void);
163 162
164#else 163#else
165/*
166 * IF EFI is not configured, have the EFI calls return -ENOSYS.
167 */
168#define efi_call0(_f) (-ENOSYS)
169#define efi_call1(_f, _a1) (-ENOSYS)
170#define efi_call2(_f, _a1, _a2) (-ENOSYS)
171#define efi_call3(_f, _a1, _a2, _a3) (-ENOSYS)
172#define efi_call4(_f, _a1, _a2, _a3, _a4) (-ENOSYS)
173#define efi_call5(_f, _a1, _a2, _a3, _a4, _a5) (-ENOSYS)
174#define efi_call6(_f, _a1, _a2, _a3, _a4, _a5, _a6) (-ENOSYS)
175static inline void parse_efi_setup(u64 phys_addr, u32 data_len) {} 164static inline void parse_efi_setup(u64 phys_addr, u32 data_len) {}
176static inline bool efi_reboot_required(void) 165static inline bool efi_reboot_required(void)
177{ 166{
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 7d603a71ab3a..6ed0c30d6a0c 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -989,6 +989,20 @@ static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
989 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 989 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
990} 990}
991 991
992static inline u64 get_canonical(u64 la)
993{
994 return ((int64_t)la << 16) >> 16;
995}
996
997static inline bool is_noncanonical_address(u64 la)
998{
999#ifdef CONFIG_X86_64
1000 return get_canonical(la) != la;
1001#else
1002 return false;
1003#endif
1004}
1005
992#define TSS_IOPB_BASE_OFFSET 0x66 1006#define TSS_IOPB_BASE_OFFSET 0x66
993#define TSS_BASE_SIZE 0x68 1007#define TSS_BASE_SIZE 0x68
994#define TSS_IOPB_SIZE (65536 / 8) 1008#define TSS_IOPB_SIZE (65536 / 8)
@@ -1050,7 +1064,7 @@ void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
1050 unsigned long address); 1064 unsigned long address);
1051 1065
1052void kvm_define_shared_msr(unsigned index, u32 msr); 1066void kvm_define_shared_msr(unsigned index, u32 msr);
1053void kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1067int kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1054 1068
1055bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1069bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1056 1070
diff --git a/arch/x86/include/asm/preempt.h b/arch/x86/include/asm/preempt.h
index 7024c12f7bfe..400873450e33 100644
--- a/arch/x86/include/asm/preempt.h
+++ b/arch/x86/include/asm/preempt.h
@@ -105,6 +105,7 @@ static __always_inline bool should_resched(void)
105# ifdef CONFIG_CONTEXT_TRACKING 105# ifdef CONFIG_CONTEXT_TRACKING
106 extern asmlinkage void ___preempt_schedule_context(void); 106 extern asmlinkage void ___preempt_schedule_context(void);
107# define __preempt_schedule_context() asm ("call ___preempt_schedule_context") 107# define __preempt_schedule_context() asm ("call ___preempt_schedule_context")
108 extern asmlinkage void preempt_schedule_context(void);
108# endif 109# endif
109#endif 110#endif
110 111
diff --git a/arch/x86/include/uapi/asm/vmx.h b/arch/x86/include/uapi/asm/vmx.h
index 0e79420376eb..990a2fe1588d 100644
--- a/arch/x86/include/uapi/asm/vmx.h
+++ b/arch/x86/include/uapi/asm/vmx.h
@@ -67,6 +67,7 @@
67#define EXIT_REASON_EPT_MISCONFIG 49 67#define EXIT_REASON_EPT_MISCONFIG 49
68#define EXIT_REASON_INVEPT 50 68#define EXIT_REASON_INVEPT 50
69#define EXIT_REASON_PREEMPTION_TIMER 52 69#define EXIT_REASON_PREEMPTION_TIMER 52
70#define EXIT_REASON_INVVPID 53
70#define EXIT_REASON_WBINVD 54 71#define EXIT_REASON_WBINVD 54
71#define EXIT_REASON_XSETBV 55 72#define EXIT_REASON_XSETBV 55
72#define EXIT_REASON_APIC_WRITE 56 73#define EXIT_REASON_APIC_WRITE 56
@@ -114,6 +115,7 @@
114 { EXIT_REASON_EOI_INDUCED, "EOI_INDUCED" }, \ 115 { EXIT_REASON_EOI_INDUCED, "EOI_INDUCED" }, \
115 { EXIT_REASON_INVALID_STATE, "INVALID_STATE" }, \ 116 { EXIT_REASON_INVALID_STATE, "INVALID_STATE" }, \
116 { EXIT_REASON_INVD, "INVD" }, \ 117 { EXIT_REASON_INVD, "INVD" }, \
118 { EXIT_REASON_INVVPID, "INVVPID" }, \
117 { EXIT_REASON_INVPCID, "INVPCID" } 119 { EXIT_REASON_INVPCID, "INVPCID" }
118 120
119#endif /* _UAPIVMX_H */ 121#endif /* _UAPIVMX_H */
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index b436fc735aa4..a142e77693e1 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -397,7 +397,7 @@ static int mp_register_gsi(struct device *dev, u32 gsi, int trigger,
397 397
398 /* Don't set up the ACPI SCI because it's already set up */ 398 /* Don't set up the ACPI SCI because it's already set up */
399 if (acpi_gbl_FADT.sci_interrupt == gsi) 399 if (acpi_gbl_FADT.sci_interrupt == gsi)
400 return gsi; 400 return mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC);
401 401
402 trigger = trigger == ACPI_EDGE_SENSITIVE ? 0 : 1; 402 trigger = trigger == ACPI_EDGE_SENSITIVE ? 0 : 1;
403 polarity = polarity == ACPI_ACTIVE_HIGH ? 0 : 1; 403 polarity = polarity == ACPI_ACTIVE_HIGH ? 0 : 1;
@@ -604,14 +604,18 @@ void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
604 604
605int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp) 605int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp)
606{ 606{
607 int irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC | IOAPIC_MAP_CHECK); 607 int irq;
608 608
609 if (irq >= 0) { 609 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) {
610 *irqp = gsi;
611 } else {
612 irq = mp_map_gsi_to_irq(gsi,
613 IOAPIC_MAP_ALLOC | IOAPIC_MAP_CHECK);
614 if (irq < 0)
615 return -1;
610 *irqp = irq; 616 *irqp = irq;
611 return 0;
612 } 617 }
613 618 return 0;
614 return -1;
615} 619}
616EXPORT_SYMBOL_GPL(acpi_gsi_to_irq); 620EXPORT_SYMBOL_GPL(acpi_gsi_to_irq);
617 621
diff --git a/arch/x86/kernel/apb_timer.c b/arch/x86/kernel/apb_timer.c
index 5972b108f15a..b708738d016e 100644
--- a/arch/x86/kernel/apb_timer.c
+++ b/arch/x86/kernel/apb_timer.c
@@ -185,8 +185,6 @@ static void apbt_setup_irq(struct apbt_dev *adev)
185 185
186 irq_modify_status(adev->irq, 0, IRQ_MOVE_PCNTXT); 186 irq_modify_status(adev->irq, 0, IRQ_MOVE_PCNTXT);
187 irq_set_affinity(adev->irq, cpumask_of(adev->cpu)); 187 irq_set_affinity(adev->irq, cpumask_of(adev->cpu));
188 /* APB timer irqs are set up as mp_irqs, timer is edge type */
189 __irq_set_handler(adev->irq, handle_edge_irq, 0, "edge");
190} 188}
191 189
192/* Should be called with per cpu */ 190/* Should be called with per cpu */
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 00853b254ab0..ba6cc041edb1 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1297,7 +1297,7 @@ void setup_local_APIC(void)
1297 unsigned int value, queued; 1297 unsigned int value, queued;
1298 int i, j, acked = 0; 1298 int i, j, acked = 0;
1299 unsigned long long tsc = 0, ntsc; 1299 unsigned long long tsc = 0, ntsc;
1300 long long max_loops = cpu_khz; 1300 long long max_loops = cpu_khz ? cpu_khz : 1000000;
1301 1301
1302 if (cpu_has_tsc) 1302 if (cpu_has_tsc)
1303 rdtscll(tsc); 1303 rdtscll(tsc);
@@ -1383,7 +1383,7 @@ void setup_local_APIC(void)
1383 break; 1383 break;
1384 } 1384 }
1385 if (queued) { 1385 if (queued) {
1386 if (cpu_has_tsc) { 1386 if (cpu_has_tsc && cpu_khz) {
1387 rdtscll(ntsc); 1387 rdtscll(ntsc);
1388 max_loops = (cpu_khz << 10) - (ntsc - tsc); 1388 max_loops = (cpu_khz << 10) - (ntsc - tsc);
1389 } else 1389 } else
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 01d5453b5502..e27b49d7c922 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -39,9 +39,12 @@ obj-$(CONFIG_CPU_SUP_AMD) += perf_event_amd_iommu.o
39endif 39endif
40obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_p6.o perf_event_knc.o perf_event_p4.o 40obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_p6.o perf_event_knc.o perf_event_p4.o
41obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_intel_lbr.o perf_event_intel_ds.o perf_event_intel.o 41obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_intel_lbr.o perf_event_intel_ds.o perf_event_intel.o
42obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_intel_uncore.o perf_event_intel_uncore_snb.o
43obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_intel_uncore_snbep.o perf_event_intel_uncore_nhmex.o
44obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_intel_rapl.o 42obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_intel_rapl.o
43
44obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += perf_event_intel_uncore.o \
45 perf_event_intel_uncore_snb.o \
46 perf_event_intel_uncore_snbep.o \
47 perf_event_intel_uncore_nhmex.o
45endif 48endif
46 49
47 50
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 1ef456273172..9cc6b6f25f42 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -213,12 +213,13 @@ static void intel_workarounds(struct cpuinfo_x86 *c)
213{ 213{
214#ifdef CONFIG_X86_F00F_BUG 214#ifdef CONFIG_X86_F00F_BUG
215 /* 215 /*
216 * All current models of Pentium and Pentium with MMX technology CPUs 216 * All models of Pentium and Pentium with MMX technology CPUs
217 * have the F0 0F bug, which lets nonprivileged users lock up the 217 * have the F0 0F bug, which lets nonprivileged users lock up the
218 * system. Announce that the fault handler will be checking for it. 218 * system. Announce that the fault handler will be checking for it.
219 * The Quark is also family 5, but does not have the same bug.
219 */ 220 */
220 clear_cpu_bug(c, X86_BUG_F00F); 221 clear_cpu_bug(c, X86_BUG_F00F);
221 if (!paravirt_enabled() && c->x86 == 5) { 222 if (!paravirt_enabled() && c->x86 == 5 && c->x86_model < 9) {
222 static int f00f_workaround_enabled; 223 static int f00f_workaround_enabled;
223 224
224 set_cpu_bug(c, X86_BUG_F00F); 225 set_cpu_bug(c, X86_BUG_F00F);
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 1b8299dd3d91..143e5f5dc855 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -243,8 +243,9 @@ static bool check_hw_exists(void)
243 243
244msr_fail: 244msr_fail:
245 printk(KERN_CONT "Broken PMU hardware detected, using software events only.\n"); 245 printk(KERN_CONT "Broken PMU hardware detected, using software events only.\n");
246 printk(boot_cpu_has(X86_FEATURE_HYPERVISOR) ? KERN_INFO : KERN_ERR 246 printk("%sFailed to access perfctr msr (MSR %x is %Lx)\n",
247 "Failed to access perfctr msr (MSR %x is %Lx)\n", reg, val_new); 247 boot_cpu_has(X86_FEATURE_HYPERVISOR) ? KERN_INFO : KERN_ERR,
248 reg, val_new);
248 249
249 return false; 250 return false;
250} 251}
@@ -444,12 +445,6 @@ int x86_pmu_hw_config(struct perf_event *event)
444 if (event->attr.type == PERF_TYPE_RAW) 445 if (event->attr.type == PERF_TYPE_RAW)
445 event->hw.config |= event->attr.config & X86_RAW_EVENT_MASK; 446 event->hw.config |= event->attr.config & X86_RAW_EVENT_MASK;
446 447
447 if (event->attr.sample_period && x86_pmu.limit_period) {
448 if (x86_pmu.limit_period(event, event->attr.sample_period) >
449 event->attr.sample_period)
450 return -EINVAL;
451 }
452
453 return x86_setup_perfctr(event); 448 return x86_setup_perfctr(event);
454} 449}
455 450
@@ -987,9 +982,6 @@ int x86_perf_event_set_period(struct perf_event *event)
987 if (left > x86_pmu.max_period) 982 if (left > x86_pmu.max_period)
988 left = x86_pmu.max_period; 983 left = x86_pmu.max_period;
989 984
990 if (x86_pmu.limit_period)
991 left = x86_pmu.limit_period(event, left);
992
993 per_cpu(pmc_prev_left[idx], smp_processor_id()) = left; 985 per_cpu(pmc_prev_left[idx], smp_processor_id()) = left;
994 986
995 /* 987 /*
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index d98a34d435d7..fc5eb390b368 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -445,7 +445,6 @@ struct x86_pmu {
445 struct x86_pmu_quirk *quirks; 445 struct x86_pmu_quirk *quirks;
446 int perfctr_second_write; 446 int perfctr_second_write;
447 bool late_ack; 447 bool late_ack;
448 unsigned (*limit_period)(struct perf_event *event, unsigned l);
449 448
450 /* 449 /*
451 * sysfs attrs 450 * sysfs attrs
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index a73947c53b65..944bf019b74f 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -220,15 +220,6 @@ static struct event_constraint intel_hsw_event_constraints[] = {
220 EVENT_CONSTRAINT_END 220 EVENT_CONSTRAINT_END
221}; 221};
222 222
223static struct event_constraint intel_bdw_event_constraints[] = {
224 FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
225 FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
226 FIXED_EVENT_CONSTRAINT(0x0300, 2), /* CPU_CLK_UNHALTED.REF */
227 INTEL_UEVENT_CONSTRAINT(0x148, 0x4), /* L1D_PEND_MISS.PENDING */
228 INTEL_EVENT_CONSTRAINT(0xa3, 0x4), /* CYCLE_ACTIVITY.* */
229 EVENT_CONSTRAINT_END
230};
231
232static u64 intel_pmu_event_map(int hw_event) 223static u64 intel_pmu_event_map(int hw_event)
233{ 224{
234 return intel_perfmon_event_map[hw_event]; 225 return intel_perfmon_event_map[hw_event];
@@ -424,126 +415,6 @@ static __initconst const u64 snb_hw_cache_event_ids
424 415
425}; 416};
426 417
427static __initconst const u64 hsw_hw_cache_event_ids
428 [PERF_COUNT_HW_CACHE_MAX]
429 [PERF_COUNT_HW_CACHE_OP_MAX]
430 [PERF_COUNT_HW_CACHE_RESULT_MAX] =
431{
432 [ C(L1D ) ] = {
433 [ C(OP_READ) ] = {
434 [ C(RESULT_ACCESS) ] = 0x81d0, /* MEM_UOPS_RETIRED.ALL_LOADS */
435 [ C(RESULT_MISS) ] = 0x151, /* L1D.REPLACEMENT */
436 },
437 [ C(OP_WRITE) ] = {
438 [ C(RESULT_ACCESS) ] = 0x82d0, /* MEM_UOPS_RETIRED.ALL_STORES */
439 [ C(RESULT_MISS) ] = 0x0,
440 },
441 [ C(OP_PREFETCH) ] = {
442 [ C(RESULT_ACCESS) ] = 0x0,
443 [ C(RESULT_MISS) ] = 0x0,
444 },
445 },
446 [ C(L1I ) ] = {
447 [ C(OP_READ) ] = {
448 [ C(RESULT_ACCESS) ] = 0x0,
449 [ C(RESULT_MISS) ] = 0x280, /* ICACHE.MISSES */
450 },
451 [ C(OP_WRITE) ] = {
452 [ C(RESULT_ACCESS) ] = -1,
453 [ C(RESULT_MISS) ] = -1,
454 },
455 [ C(OP_PREFETCH) ] = {
456 [ C(RESULT_ACCESS) ] = 0x0,
457 [ C(RESULT_MISS) ] = 0x0,
458 },
459 },
460 [ C(LL ) ] = {
461 [ C(OP_READ) ] = {
462 /* OFFCORE_RESPONSE:ALL_DATA_RD|ALL_CODE_RD */
463 [ C(RESULT_ACCESS) ] = 0x1b7,
464 /* OFFCORE_RESPONSE:ALL_DATA_RD|ALL_CODE_RD|SUPPLIER_NONE|
465 L3_MISS|ANY_SNOOP */
466 [ C(RESULT_MISS) ] = 0x1b7,
467 },
468 [ C(OP_WRITE) ] = {
469 [ C(RESULT_ACCESS) ] = 0x1b7, /* OFFCORE_RESPONSE:ALL_RFO */
470 /* OFFCORE_RESPONSE:ALL_RFO|SUPPLIER_NONE|L3_MISS|ANY_SNOOP */
471 [ C(RESULT_MISS) ] = 0x1b7,
472 },
473 [ C(OP_PREFETCH) ] = {
474 [ C(RESULT_ACCESS) ] = 0x0,
475 [ C(RESULT_MISS) ] = 0x0,
476 },
477 },
478 [ C(DTLB) ] = {
479 [ C(OP_READ) ] = {
480 [ C(RESULT_ACCESS) ] = 0x81d0, /* MEM_UOPS_RETIRED.ALL_LOADS */
481 [ C(RESULT_MISS) ] = 0x108, /* DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK */
482 },
483 [ C(OP_WRITE) ] = {
484 [ C(RESULT_ACCESS) ] = 0x82d0, /* MEM_UOPS_RETIRED.ALL_STORES */
485 [ C(RESULT_MISS) ] = 0x149, /* DTLB_STORE_MISSES.MISS_CAUSES_A_WALK */
486 },
487 [ C(OP_PREFETCH) ] = {
488 [ C(RESULT_ACCESS) ] = 0x0,
489 [ C(RESULT_MISS) ] = 0x0,
490 },
491 },
492 [ C(ITLB) ] = {
493 [ C(OP_READ) ] = {
494 [ C(RESULT_ACCESS) ] = 0x6085, /* ITLB_MISSES.STLB_HIT */
495 [ C(RESULT_MISS) ] = 0x185, /* ITLB_MISSES.MISS_CAUSES_A_WALK */
496 },
497 [ C(OP_WRITE) ] = {
498 [ C(RESULT_ACCESS) ] = -1,
499 [ C(RESULT_MISS) ] = -1,
500 },
501 [ C(OP_PREFETCH) ] = {
502 [ C(RESULT_ACCESS) ] = -1,
503 [ C(RESULT_MISS) ] = -1,
504 },
505 },
506 [ C(BPU ) ] = {
507 [ C(OP_READ) ] = {
508 [ C(RESULT_ACCESS) ] = 0xc4, /* BR_INST_RETIRED.ALL_BRANCHES */
509 [ C(RESULT_MISS) ] = 0xc5, /* BR_MISP_RETIRED.ALL_BRANCHES */
510 },
511 [ C(OP_WRITE) ] = {
512 [ C(RESULT_ACCESS) ] = -1,
513 [ C(RESULT_MISS) ] = -1,
514 },
515 [ C(OP_PREFETCH) ] = {
516 [ C(RESULT_ACCESS) ] = -1,
517 [ C(RESULT_MISS) ] = -1,
518 },
519 },
520};
521
522static __initconst const u64 hsw_hw_cache_extra_regs
523 [PERF_COUNT_HW_CACHE_MAX]
524 [PERF_COUNT_HW_CACHE_OP_MAX]
525 [PERF_COUNT_HW_CACHE_RESULT_MAX] =
526{
527 [ C(LL ) ] = {
528 [ C(OP_READ) ] = {
529 /* OFFCORE_RESPONSE:ALL_DATA_RD|ALL_CODE_RD */
530 [ C(RESULT_ACCESS) ] = 0x2d5,
531 /* OFFCORE_RESPONSE:ALL_DATA_RD|ALL_CODE_RD|SUPPLIER_NONE|
532 L3_MISS|ANY_SNOOP */
533 [ C(RESULT_MISS) ] = 0x3fbc0202d5ull,
534 },
535 [ C(OP_WRITE) ] = {
536 [ C(RESULT_ACCESS) ] = 0x122, /* OFFCORE_RESPONSE:ALL_RFO */
537 /* OFFCORE_RESPONSE:ALL_RFO|SUPPLIER_NONE|L3_MISS|ANY_SNOOP */
538 [ C(RESULT_MISS) ] = 0x3fbc020122ull,
539 },
540 [ C(OP_PREFETCH) ] = {
541 [ C(RESULT_ACCESS) ] = 0x0,
542 [ C(RESULT_MISS) ] = 0x0,
543 },
544 },
545};
546
547static __initconst const u64 westmere_hw_cache_event_ids 418static __initconst const u64 westmere_hw_cache_event_ids
548 [PERF_COUNT_HW_CACHE_MAX] 419 [PERF_COUNT_HW_CACHE_MAX]
549 [PERF_COUNT_HW_CACHE_OP_MAX] 420 [PERF_COUNT_HW_CACHE_OP_MAX]
@@ -2034,24 +1905,6 @@ hsw_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event)
2034 return c; 1905 return c;
2035} 1906}
2036 1907
2037/*
2038 * Broadwell:
2039 * The INST_RETIRED.ALL period always needs to have lowest
2040 * 6bits cleared (BDM57). It shall not use a period smaller
2041 * than 100 (BDM11). We combine the two to enforce
2042 * a min-period of 128.
2043 */
2044static unsigned bdw_limit_period(struct perf_event *event, unsigned left)
2045{
2046 if ((event->hw.config & INTEL_ARCH_EVENT_MASK) ==
2047 X86_CONFIG(.event=0xc0, .umask=0x01)) {
2048 if (left < 128)
2049 left = 128;
2050 left &= ~0x3fu;
2051 }
2052 return left;
2053}
2054
2055PMU_FORMAT_ATTR(event, "config:0-7" ); 1908PMU_FORMAT_ATTR(event, "config:0-7" );
2056PMU_FORMAT_ATTR(umask, "config:8-15" ); 1909PMU_FORMAT_ATTR(umask, "config:8-15" );
2057PMU_FORMAT_ATTR(edge, "config:18" ); 1910PMU_FORMAT_ATTR(edge, "config:18" );
@@ -2692,8 +2545,8 @@ __init int intel_pmu_init(void)
2692 case 69: /* 22nm Haswell ULT */ 2545 case 69: /* 22nm Haswell ULT */
2693 case 70: /* 22nm Haswell + GT3e (Intel Iris Pro graphics) */ 2546 case 70: /* 22nm Haswell + GT3e (Intel Iris Pro graphics) */
2694 x86_pmu.late_ack = true; 2547 x86_pmu.late_ack = true;
2695 memcpy(hw_cache_event_ids, hsw_hw_cache_event_ids, sizeof(hw_cache_event_ids)); 2548 memcpy(hw_cache_event_ids, snb_hw_cache_event_ids, sizeof(hw_cache_event_ids));
2696 memcpy(hw_cache_extra_regs, hsw_hw_cache_extra_regs, sizeof(hw_cache_extra_regs)); 2549 memcpy(hw_cache_extra_regs, snb_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));
2697 2550
2698 intel_pmu_lbr_init_snb(); 2551 intel_pmu_lbr_init_snb();
2699 2552
@@ -2712,28 +2565,6 @@ __init int intel_pmu_init(void)
2712 pr_cont("Haswell events, "); 2565 pr_cont("Haswell events, ");
2713 break; 2566 break;
2714 2567
2715 case 61: /* 14nm Broadwell Core-M */
2716 x86_pmu.late_ack = true;
2717 memcpy(hw_cache_event_ids, hsw_hw_cache_event_ids, sizeof(hw_cache_event_ids));
2718 memcpy(hw_cache_extra_regs, hsw_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));
2719
2720 intel_pmu_lbr_init_snb();
2721
2722 x86_pmu.event_constraints = intel_bdw_event_constraints;
2723 x86_pmu.pebs_constraints = intel_hsw_pebs_event_constraints;
2724 x86_pmu.extra_regs = intel_snbep_extra_regs;
2725 x86_pmu.pebs_aliases = intel_pebs_aliases_snb;
2726 /* all extra regs are per-cpu when HT is on */
2727 x86_pmu.er_flags |= ERF_HAS_RSP_1;
2728 x86_pmu.er_flags |= ERF_NO_HT_SHARING;
2729
2730 x86_pmu.hw_config = hsw_hw_config;
2731 x86_pmu.get_event_constraints = hsw_get_event_constraints;
2732 x86_pmu.cpu_events = hsw_events_attrs;
2733 x86_pmu.limit_period = bdw_limit_period;
2734 pr_cont("Broadwell events, ");
2735 break;
2736
2737 default: 2568 default:
2738 switch (x86_pmu.version) { 2569 switch (x86_pmu.version) {
2739 case 1: 2570 case 1:
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index b553ed89e5f5..344b63f18d14 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -447,15 +447,14 @@ sysenter_exit:
447sysenter_audit: 447sysenter_audit:
448 testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags(%ebp) 448 testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags(%ebp)
449 jnz syscall_trace_entry 449 jnz syscall_trace_entry
450 addl $4,%esp 450 /* movl PT_EAX(%esp), %eax already set, syscall number: 1st arg to audit */
451 CFI_ADJUST_CFA_OFFSET -4 451 movl PT_EBX(%esp), %edx /* ebx/a0: 2nd arg to audit */
452 movl %esi,4(%esp) /* 5th arg: 4th syscall arg */ 452 /* movl PT_ECX(%esp), %ecx already set, a1: 3nd arg to audit */
453 movl %edx,(%esp) /* 4th arg: 3rd syscall arg */ 453 pushl_cfi PT_ESI(%esp) /* a3: 5th arg */
454 /* %ecx already in %ecx 3rd arg: 2nd syscall arg */ 454 pushl_cfi PT_EDX+4(%esp) /* a2: 4th arg */
455 movl %ebx,%edx /* 2nd arg: 1st syscall arg */
456 /* %eax already in %eax 1st arg: syscall number */
457 call __audit_syscall_entry 455 call __audit_syscall_entry
458 pushl_cfi %ebx 456 popl_cfi %ecx /* get that remapped edx off the stack */
457 popl_cfi %ecx /* get that remapped esi off the stack */
459 movl PT_EAX(%esp),%eax /* reload syscall number */ 458 movl PT_EAX(%esp),%eax /* reload syscall number */
460 jmp sysenter_do_call 459 jmp sysenter_do_call
461 460
diff --git a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c
index 8af817105e29..e7cc5370cd2f 100644
--- a/arch/x86/kernel/i8259.c
+++ b/arch/x86/kernel/i8259.c
@@ -111,8 +111,7 @@ static void make_8259A_irq(unsigned int irq)
111{ 111{
112 disable_irq_nosync(irq); 112 disable_irq_nosync(irq);
113 io_apic_irqs &= ~(1<<irq); 113 io_apic_irqs &= ~(1<<irq);
114 irq_set_chip_and_handler_name(irq, &i8259A_chip, handle_level_irq, 114 irq_set_chip_and_handler(irq, &i8259A_chip, handle_level_irq);
115 i8259A_chip.name);
116 enable_irq(irq); 115 enable_irq(irq);
117} 116}
118 117
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index 44f1ed42fdf2..4de73ee78361 100644
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -70,7 +70,6 @@ int vector_used_by_percpu_irq(unsigned int vector)
70void __init init_ISA_irqs(void) 70void __init init_ISA_irqs(void)
71{ 71{
72 struct irq_chip *chip = legacy_pic->chip; 72 struct irq_chip *chip = legacy_pic->chip;
73 const char *name = chip->name;
74 int i; 73 int i;
75 74
76#if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC) 75#if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC)
@@ -79,7 +78,7 @@ void __init init_ISA_irqs(void)
79 legacy_pic->init(0); 78 legacy_pic->init(0);
80 79
81 for (i = 0; i < nr_legacy_irqs(); i++) 80 for (i = 0; i < nr_legacy_irqs(); i++)
82 irq_set_chip_and_handler_name(i, chip, handle_level_irq, name); 81 irq_set_chip_and_handler(i, chip, handle_level_irq);
83} 82}
84 83
85void __init init_IRQ(void) 84void __init init_IRQ(void)
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 235cfd39e0d7..ab08aa2276fb 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -1128,7 +1128,6 @@ void __init setup_arch(char **cmdline_p)
1128 setup_real_mode(); 1128 setup_real_mode();
1129 1129
1130 memblock_set_current_limit(get_max_mapped()); 1130 memblock_set_current_limit(get_max_mapped());
1131 dma_contiguous_reserve(max_pfn_mapped << PAGE_SHIFT);
1132 1131
1133 /* 1132 /*
1134 * NOTE: On x86-32, only from this point on, fixmaps are ready for use. 1133 * NOTE: On x86-32, only from this point on, fixmaps are ready for use.
@@ -1159,6 +1158,7 @@ void __init setup_arch(char **cmdline_p)
1159 early_acpi_boot_init(); 1158 early_acpi_boot_init();
1160 1159
1161 initmem_init(); 1160 initmem_init();
1161 dma_contiguous_reserve(max_pfn_mapped << PAGE_SHIFT);
1162 1162
1163 /* 1163 /*
1164 * Reserve memory for crash kernel after SRAT is parsed so that it 1164 * Reserve memory for crash kernel after SRAT is parsed so that it
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 2d5200e56357..4d2128ac70bd 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -102,8 +102,6 @@ DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_llc_shared_map);
102DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info); 102DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
103EXPORT_PER_CPU_SYMBOL(cpu_info); 103EXPORT_PER_CPU_SYMBOL(cpu_info);
104 104
105static DEFINE_PER_CPU(struct completion, die_complete);
106
107atomic_t init_deasserted; 105atomic_t init_deasserted;
108 106
109/* 107/*
@@ -1318,6 +1316,8 @@ void cpu_disable_common(void)
1318 fixup_irqs(); 1316 fixup_irqs();
1319} 1317}
1320 1318
1319static DEFINE_PER_CPU(struct completion, die_complete);
1320
1321int native_cpu_disable(void) 1321int native_cpu_disable(void)
1322{ 1322{
1323 int ret; 1323 int ret;
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index b6025f9e36c6..b7e50bba3bbb 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -1166,14 +1166,17 @@ void __init tsc_init(void)
1166 1166
1167 x86_init.timers.tsc_pre_init(); 1167 x86_init.timers.tsc_pre_init();
1168 1168
1169 if (!cpu_has_tsc) 1169 if (!cpu_has_tsc) {
1170 setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER);
1170 return; 1171 return;
1172 }
1171 1173
1172 tsc_khz = x86_platform.calibrate_tsc(); 1174 tsc_khz = x86_platform.calibrate_tsc();
1173 cpu_khz = tsc_khz; 1175 cpu_khz = tsc_khz;
1174 1176
1175 if (!tsc_khz) { 1177 if (!tsc_khz) {
1176 mark_tsc_unstable("could not calculate TSC khz"); 1178 mark_tsc_unstable("could not calculate TSC khz");
1179 setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER);
1177 return; 1180 return;
1178 } 1181 }
1179 1182
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index a46207a05835..5edf088ca51e 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -504,11 +504,6 @@ static void rsp_increment(struct x86_emulate_ctxt *ctxt, int inc)
504 masked_increment(reg_rmw(ctxt, VCPU_REGS_RSP), stack_mask(ctxt), inc); 504 masked_increment(reg_rmw(ctxt, VCPU_REGS_RSP), stack_mask(ctxt), inc);
505} 505}
506 506
507static inline void jmp_rel(struct x86_emulate_ctxt *ctxt, int rel)
508{
509 register_address_increment(ctxt, &ctxt->_eip, rel);
510}
511
512static u32 desc_limit_scaled(struct desc_struct *desc) 507static u32 desc_limit_scaled(struct desc_struct *desc)
513{ 508{
514 u32 limit = get_desc_limit(desc); 509 u32 limit = get_desc_limit(desc);
@@ -569,6 +564,40 @@ static int emulate_nm(struct x86_emulate_ctxt *ctxt)
569 return emulate_exception(ctxt, NM_VECTOR, 0, false); 564 return emulate_exception(ctxt, NM_VECTOR, 0, false);
570} 565}
571 566
567static inline int assign_eip_far(struct x86_emulate_ctxt *ctxt, ulong dst,
568 int cs_l)
569{
570 switch (ctxt->op_bytes) {
571 case 2:
572 ctxt->_eip = (u16)dst;
573 break;
574 case 4:
575 ctxt->_eip = (u32)dst;
576 break;
577#ifdef CONFIG_X86_64
578 case 8:
579 if ((cs_l && is_noncanonical_address(dst)) ||
580 (!cs_l && (dst >> 32) != 0))
581 return emulate_gp(ctxt, 0);
582 ctxt->_eip = dst;
583 break;
584#endif
585 default:
586 WARN(1, "unsupported eip assignment size\n");
587 }
588 return X86EMUL_CONTINUE;
589}
590
591static inline int assign_eip_near(struct x86_emulate_ctxt *ctxt, ulong dst)
592{
593 return assign_eip_far(ctxt, dst, ctxt->mode == X86EMUL_MODE_PROT64);
594}
595
596static inline int jmp_rel(struct x86_emulate_ctxt *ctxt, int rel)
597{
598 return assign_eip_near(ctxt, ctxt->_eip + rel);
599}
600
572static u16 get_segment_selector(struct x86_emulate_ctxt *ctxt, unsigned seg) 601static u16 get_segment_selector(struct x86_emulate_ctxt *ctxt, unsigned seg)
573{ 602{
574 u16 selector; 603 u16 selector;
@@ -614,7 +643,8 @@ static bool insn_aligned(struct x86_emulate_ctxt *ctxt, unsigned size)
614 643
615static int __linearize(struct x86_emulate_ctxt *ctxt, 644static int __linearize(struct x86_emulate_ctxt *ctxt,
616 struct segmented_address addr, 645 struct segmented_address addr,
617 unsigned size, bool write, bool fetch, 646 unsigned *max_size, unsigned size,
647 bool write, bool fetch,
618 ulong *linear) 648 ulong *linear)
619{ 649{
620 struct desc_struct desc; 650 struct desc_struct desc;
@@ -625,10 +655,15 @@ static int __linearize(struct x86_emulate_ctxt *ctxt,
625 unsigned cpl; 655 unsigned cpl;
626 656
627 la = seg_base(ctxt, addr.seg) + addr.ea; 657 la = seg_base(ctxt, addr.seg) + addr.ea;
658 *max_size = 0;
628 switch (ctxt->mode) { 659 switch (ctxt->mode) {
629 case X86EMUL_MODE_PROT64: 660 case X86EMUL_MODE_PROT64:
630 if (((signed long)la << 16) >> 16 != la) 661 if (((signed long)la << 16) >> 16 != la)
631 return emulate_gp(ctxt, 0); 662 return emulate_gp(ctxt, 0);
663
664 *max_size = min_t(u64, ~0u, (1ull << 48) - la);
665 if (size > *max_size)
666 goto bad;
632 break; 667 break;
633 default: 668 default:
634 usable = ctxt->ops->get_segment(ctxt, &sel, &desc, NULL, 669 usable = ctxt->ops->get_segment(ctxt, &sel, &desc, NULL,
@@ -646,20 +681,25 @@ static int __linearize(struct x86_emulate_ctxt *ctxt,
646 if ((ctxt->mode == X86EMUL_MODE_REAL) && !fetch && 681 if ((ctxt->mode == X86EMUL_MODE_REAL) && !fetch &&
647 (ctxt->d & NoBigReal)) { 682 (ctxt->d & NoBigReal)) {
648 /* la is between zero and 0xffff */ 683 /* la is between zero and 0xffff */
649 if (la > 0xffff || (u32)(la + size - 1) > 0xffff) 684 if (la > 0xffff)
650 goto bad; 685 goto bad;
686 *max_size = 0x10000 - la;
651 } else if ((desc.type & 8) || !(desc.type & 4)) { 687 } else if ((desc.type & 8) || !(desc.type & 4)) {
652 /* expand-up segment */ 688 /* expand-up segment */
653 if (addr.ea > lim || (u32)(addr.ea + size - 1) > lim) 689 if (addr.ea > lim)
654 goto bad; 690 goto bad;
691 *max_size = min_t(u64, ~0u, (u64)lim + 1 - addr.ea);
655 } else { 692 } else {
656 /* expand-down segment */ 693 /* expand-down segment */
657 if (addr.ea <= lim || (u32)(addr.ea + size - 1) <= lim) 694 if (addr.ea <= lim)
658 goto bad; 695 goto bad;
659 lim = desc.d ? 0xffffffff : 0xffff; 696 lim = desc.d ? 0xffffffff : 0xffff;
660 if (addr.ea > lim || (u32)(addr.ea + size - 1) > lim) 697 if (addr.ea > lim)
661 goto bad; 698 goto bad;
699 *max_size = min_t(u64, ~0u, (u64)lim + 1 - addr.ea);
662 } 700 }
701 if (size > *max_size)
702 goto bad;
663 cpl = ctxt->ops->cpl(ctxt); 703 cpl = ctxt->ops->cpl(ctxt);
664 if (!(desc.type & 8)) { 704 if (!(desc.type & 8)) {
665 /* data segment */ 705 /* data segment */
@@ -684,9 +724,9 @@ static int __linearize(struct x86_emulate_ctxt *ctxt,
684 return X86EMUL_CONTINUE; 724 return X86EMUL_CONTINUE;
685bad: 725bad:
686 if (addr.seg == VCPU_SREG_SS) 726 if (addr.seg == VCPU_SREG_SS)
687 return emulate_ss(ctxt, sel); 727 return emulate_ss(ctxt, 0);
688 else 728 else
689 return emulate_gp(ctxt, sel); 729 return emulate_gp(ctxt, 0);
690} 730}
691 731
692static int linearize(struct x86_emulate_ctxt *ctxt, 732static int linearize(struct x86_emulate_ctxt *ctxt,
@@ -694,7 +734,8 @@ static int linearize(struct x86_emulate_ctxt *ctxt,
694 unsigned size, bool write, 734 unsigned size, bool write,
695 ulong *linear) 735 ulong *linear)
696{ 736{
697 return __linearize(ctxt, addr, size, write, false, linear); 737 unsigned max_size;
738 return __linearize(ctxt, addr, &max_size, size, write, false, linear);
698} 739}
699 740
700 741
@@ -719,17 +760,27 @@ static int segmented_read_std(struct x86_emulate_ctxt *ctxt,
719static int __do_insn_fetch_bytes(struct x86_emulate_ctxt *ctxt, int op_size) 760static int __do_insn_fetch_bytes(struct x86_emulate_ctxt *ctxt, int op_size)
720{ 761{
721 int rc; 762 int rc;
722 unsigned size; 763 unsigned size, max_size;
723 unsigned long linear; 764 unsigned long linear;
724 int cur_size = ctxt->fetch.end - ctxt->fetch.data; 765 int cur_size = ctxt->fetch.end - ctxt->fetch.data;
725 struct segmented_address addr = { .seg = VCPU_SREG_CS, 766 struct segmented_address addr = { .seg = VCPU_SREG_CS,
726 .ea = ctxt->eip + cur_size }; 767 .ea = ctxt->eip + cur_size };
727 768
728 size = 15UL ^ cur_size; 769 /*
729 rc = __linearize(ctxt, addr, size, false, true, &linear); 770 * We do not know exactly how many bytes will be needed, and
771 * __linearize is expensive, so fetch as much as possible. We
772 * just have to avoid going beyond the 15 byte limit, the end
773 * of the segment, or the end of the page.
774 *
775 * __linearize is called with size 0 so that it does not do any
776 * boundary check itself. Instead, we use max_size to check
777 * against op_size.
778 */
779 rc = __linearize(ctxt, addr, &max_size, 0, false, true, &linear);
730 if (unlikely(rc != X86EMUL_CONTINUE)) 780 if (unlikely(rc != X86EMUL_CONTINUE))
731 return rc; 781 return rc;
732 782
783 size = min_t(unsigned, 15UL ^ cur_size, max_size);
733 size = min_t(unsigned, size, PAGE_SIZE - offset_in_page(linear)); 784 size = min_t(unsigned, size, PAGE_SIZE - offset_in_page(linear));
734 785
735 /* 786 /*
@@ -739,7 +790,8 @@ static int __do_insn_fetch_bytes(struct x86_emulate_ctxt *ctxt, int op_size)
739 * still, we must have hit the 15-byte boundary. 790 * still, we must have hit the 15-byte boundary.
740 */ 791 */
741 if (unlikely(size < op_size)) 792 if (unlikely(size < op_size))
742 return X86EMUL_UNHANDLEABLE; 793 return emulate_gp(ctxt, 0);
794
743 rc = ctxt->ops->fetch(ctxt, linear, ctxt->fetch.end, 795 rc = ctxt->ops->fetch(ctxt, linear, ctxt->fetch.end,
744 size, &ctxt->exception); 796 size, &ctxt->exception);
745 if (unlikely(rc != X86EMUL_CONTINUE)) 797 if (unlikely(rc != X86EMUL_CONTINUE))
@@ -751,8 +803,10 @@ static int __do_insn_fetch_bytes(struct x86_emulate_ctxt *ctxt, int op_size)
751static __always_inline int do_insn_fetch_bytes(struct x86_emulate_ctxt *ctxt, 803static __always_inline int do_insn_fetch_bytes(struct x86_emulate_ctxt *ctxt,
752 unsigned size) 804 unsigned size)
753{ 805{
754 if (unlikely(ctxt->fetch.end - ctxt->fetch.ptr < size)) 806 unsigned done_size = ctxt->fetch.end - ctxt->fetch.ptr;
755 return __do_insn_fetch_bytes(ctxt, size); 807
808 if (unlikely(done_size < size))
809 return __do_insn_fetch_bytes(ctxt, size - done_size);
756 else 810 else
757 return X86EMUL_CONTINUE; 811 return X86EMUL_CONTINUE;
758} 812}
@@ -1416,7 +1470,9 @@ static int write_segment_descriptor(struct x86_emulate_ctxt *ctxt,
1416 1470
1417/* Does not support long mode */ 1471/* Does not support long mode */
1418static int __load_segment_descriptor(struct x86_emulate_ctxt *ctxt, 1472static int __load_segment_descriptor(struct x86_emulate_ctxt *ctxt,
1419 u16 selector, int seg, u8 cpl, bool in_task_switch) 1473 u16 selector, int seg, u8 cpl,
1474 bool in_task_switch,
1475 struct desc_struct *desc)
1420{ 1476{
1421 struct desc_struct seg_desc, old_desc; 1477 struct desc_struct seg_desc, old_desc;
1422 u8 dpl, rpl; 1478 u8 dpl, rpl;
@@ -1557,6 +1613,8 @@ static int __load_segment_descriptor(struct x86_emulate_ctxt *ctxt,
1557 } 1613 }
1558load: 1614load:
1559 ctxt->ops->set_segment(ctxt, selector, &seg_desc, base3, seg); 1615 ctxt->ops->set_segment(ctxt, selector, &seg_desc, base3, seg);
1616 if (desc)
1617 *desc = seg_desc;
1560 return X86EMUL_CONTINUE; 1618 return X86EMUL_CONTINUE;
1561exception: 1619exception:
1562 return emulate_exception(ctxt, err_vec, err_code, true); 1620 return emulate_exception(ctxt, err_vec, err_code, true);
@@ -1566,7 +1624,7 @@ static int load_segment_descriptor(struct x86_emulate_ctxt *ctxt,
1566 u16 selector, int seg) 1624 u16 selector, int seg)
1567{ 1625{
1568 u8 cpl = ctxt->ops->cpl(ctxt); 1626 u8 cpl = ctxt->ops->cpl(ctxt);
1569 return __load_segment_descriptor(ctxt, selector, seg, cpl, false); 1627 return __load_segment_descriptor(ctxt, selector, seg, cpl, false, NULL);
1570} 1628}
1571 1629
1572static void write_register_operand(struct operand *op) 1630static void write_register_operand(struct operand *op)
@@ -1960,17 +2018,31 @@ static int em_iret(struct x86_emulate_ctxt *ctxt)
1960static int em_jmp_far(struct x86_emulate_ctxt *ctxt) 2018static int em_jmp_far(struct x86_emulate_ctxt *ctxt)
1961{ 2019{
1962 int rc; 2020 int rc;
1963 unsigned short sel; 2021 unsigned short sel, old_sel;
2022 struct desc_struct old_desc, new_desc;
2023 const struct x86_emulate_ops *ops = ctxt->ops;
2024 u8 cpl = ctxt->ops->cpl(ctxt);
2025
2026 /* Assignment of RIP may only fail in 64-bit mode */
2027 if (ctxt->mode == X86EMUL_MODE_PROT64)
2028 ops->get_segment(ctxt, &old_sel, &old_desc, NULL,
2029 VCPU_SREG_CS);
1964 2030
1965 memcpy(&sel, ctxt->src.valptr + ctxt->op_bytes, 2); 2031 memcpy(&sel, ctxt->src.valptr + ctxt->op_bytes, 2);
1966 2032
1967 rc = load_segment_descriptor(ctxt, sel, VCPU_SREG_CS); 2033 rc = __load_segment_descriptor(ctxt, sel, VCPU_SREG_CS, cpl, false,
2034 &new_desc);
1968 if (rc != X86EMUL_CONTINUE) 2035 if (rc != X86EMUL_CONTINUE)
1969 return rc; 2036 return rc;
1970 2037
1971 ctxt->_eip = 0; 2038 rc = assign_eip_far(ctxt, ctxt->src.val, new_desc.l);
1972 memcpy(&ctxt->_eip, ctxt->src.valptr, ctxt->op_bytes); 2039 if (rc != X86EMUL_CONTINUE) {
1973 return X86EMUL_CONTINUE; 2040 WARN_ON(ctxt->mode != X86EMUL_MODE_PROT64);
2041 /* assigning eip failed; restore the old cs */
2042 ops->set_segment(ctxt, old_sel, &old_desc, 0, VCPU_SREG_CS);
2043 return rc;
2044 }
2045 return rc;
1974} 2046}
1975 2047
1976static int em_grp45(struct x86_emulate_ctxt *ctxt) 2048static int em_grp45(struct x86_emulate_ctxt *ctxt)
@@ -1981,13 +2053,15 @@ static int em_grp45(struct x86_emulate_ctxt *ctxt)
1981 case 2: /* call near abs */ { 2053 case 2: /* call near abs */ {
1982 long int old_eip; 2054 long int old_eip;
1983 old_eip = ctxt->_eip; 2055 old_eip = ctxt->_eip;
1984 ctxt->_eip = ctxt->src.val; 2056 rc = assign_eip_near(ctxt, ctxt->src.val);
2057 if (rc != X86EMUL_CONTINUE)
2058 break;
1985 ctxt->src.val = old_eip; 2059 ctxt->src.val = old_eip;
1986 rc = em_push(ctxt); 2060 rc = em_push(ctxt);
1987 break; 2061 break;
1988 } 2062 }
1989 case 4: /* jmp abs */ 2063 case 4: /* jmp abs */
1990 ctxt->_eip = ctxt->src.val; 2064 rc = assign_eip_near(ctxt, ctxt->src.val);
1991 break; 2065 break;
1992 case 5: /* jmp far */ 2066 case 5: /* jmp far */
1993 rc = em_jmp_far(ctxt); 2067 rc = em_jmp_far(ctxt);
@@ -2022,30 +2096,47 @@ static int em_cmpxchg8b(struct x86_emulate_ctxt *ctxt)
2022 2096
2023static int em_ret(struct x86_emulate_ctxt *ctxt) 2097static int em_ret(struct x86_emulate_ctxt *ctxt)
2024{ 2098{
2025 ctxt->dst.type = OP_REG; 2099 int rc;
2026 ctxt->dst.addr.reg = &ctxt->_eip; 2100 unsigned long eip;
2027 ctxt->dst.bytes = ctxt->op_bytes; 2101
2028 return em_pop(ctxt); 2102 rc = emulate_pop(ctxt, &eip, ctxt->op_bytes);
2103 if (rc != X86EMUL_CONTINUE)
2104 return rc;
2105
2106 return assign_eip_near(ctxt, eip);
2029} 2107}
2030 2108
2031static int em_ret_far(struct x86_emulate_ctxt *ctxt) 2109static int em_ret_far(struct x86_emulate_ctxt *ctxt)
2032{ 2110{
2033 int rc; 2111 int rc;
2034 unsigned long cs; 2112 unsigned long eip, cs;
2113 u16 old_cs;
2035 int cpl = ctxt->ops->cpl(ctxt); 2114 int cpl = ctxt->ops->cpl(ctxt);
2115 struct desc_struct old_desc, new_desc;
2116 const struct x86_emulate_ops *ops = ctxt->ops;
2036 2117
2037 rc = emulate_pop(ctxt, &ctxt->_eip, ctxt->op_bytes); 2118 if (ctxt->mode == X86EMUL_MODE_PROT64)
2119 ops->get_segment(ctxt, &old_cs, &old_desc, NULL,
2120 VCPU_SREG_CS);
2121
2122 rc = emulate_pop(ctxt, &eip, ctxt->op_bytes);
2038 if (rc != X86EMUL_CONTINUE) 2123 if (rc != X86EMUL_CONTINUE)
2039 return rc; 2124 return rc;
2040 if (ctxt->op_bytes == 4)
2041 ctxt->_eip = (u32)ctxt->_eip;
2042 rc = emulate_pop(ctxt, &cs, ctxt->op_bytes); 2125 rc = emulate_pop(ctxt, &cs, ctxt->op_bytes);
2043 if (rc != X86EMUL_CONTINUE) 2126 if (rc != X86EMUL_CONTINUE)
2044 return rc; 2127 return rc;
2045 /* Outer-privilege level return is not implemented */ 2128 /* Outer-privilege level return is not implemented */
2046 if (ctxt->mode >= X86EMUL_MODE_PROT16 && (cs & 3) > cpl) 2129 if (ctxt->mode >= X86EMUL_MODE_PROT16 && (cs & 3) > cpl)
2047 return X86EMUL_UNHANDLEABLE; 2130 return X86EMUL_UNHANDLEABLE;
2048 rc = load_segment_descriptor(ctxt, (u16)cs, VCPU_SREG_CS); 2131 rc = __load_segment_descriptor(ctxt, (u16)cs, VCPU_SREG_CS, 0, false,
2132 &new_desc);
2133 if (rc != X86EMUL_CONTINUE)
2134 return rc;
2135 rc = assign_eip_far(ctxt, eip, new_desc.l);
2136 if (rc != X86EMUL_CONTINUE) {
2137 WARN_ON(ctxt->mode != X86EMUL_MODE_PROT64);
2138 ops->set_segment(ctxt, old_cs, &old_desc, 0, VCPU_SREG_CS);
2139 }
2049 return rc; 2140 return rc;
2050} 2141}
2051 2142
@@ -2306,7 +2397,7 @@ static int em_sysexit(struct x86_emulate_ctxt *ctxt)
2306{ 2397{
2307 const struct x86_emulate_ops *ops = ctxt->ops; 2398 const struct x86_emulate_ops *ops = ctxt->ops;
2308 struct desc_struct cs, ss; 2399 struct desc_struct cs, ss;
2309 u64 msr_data; 2400 u64 msr_data, rcx, rdx;
2310 int usermode; 2401 int usermode;
2311 u16 cs_sel = 0, ss_sel = 0; 2402 u16 cs_sel = 0, ss_sel = 0;
2312 2403
@@ -2322,6 +2413,9 @@ static int em_sysexit(struct x86_emulate_ctxt *ctxt)
2322 else 2413 else
2323 usermode = X86EMUL_MODE_PROT32; 2414 usermode = X86EMUL_MODE_PROT32;
2324 2415
2416 rcx = reg_read(ctxt, VCPU_REGS_RCX);
2417 rdx = reg_read(ctxt, VCPU_REGS_RDX);
2418
2325 cs.dpl = 3; 2419 cs.dpl = 3;
2326 ss.dpl = 3; 2420 ss.dpl = 3;
2327 ops->get_msr(ctxt, MSR_IA32_SYSENTER_CS, &msr_data); 2421 ops->get_msr(ctxt, MSR_IA32_SYSENTER_CS, &msr_data);
@@ -2339,6 +2433,9 @@ static int em_sysexit(struct x86_emulate_ctxt *ctxt)
2339 ss_sel = cs_sel + 8; 2433 ss_sel = cs_sel + 8;
2340 cs.d = 0; 2434 cs.d = 0;
2341 cs.l = 1; 2435 cs.l = 1;
2436 if (is_noncanonical_address(rcx) ||
2437 is_noncanonical_address(rdx))
2438 return emulate_gp(ctxt, 0);
2342 break; 2439 break;
2343 } 2440 }
2344 cs_sel |= SELECTOR_RPL_MASK; 2441 cs_sel |= SELECTOR_RPL_MASK;
@@ -2347,8 +2444,8 @@ static int em_sysexit(struct x86_emulate_ctxt *ctxt)
2347 ops->set_segment(ctxt, cs_sel, &cs, 0, VCPU_SREG_CS); 2444 ops->set_segment(ctxt, cs_sel, &cs, 0, VCPU_SREG_CS);
2348 ops->set_segment(ctxt, ss_sel, &ss, 0, VCPU_SREG_SS); 2445 ops->set_segment(ctxt, ss_sel, &ss, 0, VCPU_SREG_SS);
2349 2446
2350 ctxt->_eip = reg_read(ctxt, VCPU_REGS_RDX); 2447 ctxt->_eip = rdx;
2351 *reg_write(ctxt, VCPU_REGS_RSP) = reg_read(ctxt, VCPU_REGS_RCX); 2448 *reg_write(ctxt, VCPU_REGS_RSP) = rcx;
2352 2449
2353 return X86EMUL_CONTINUE; 2450 return X86EMUL_CONTINUE;
2354} 2451}
@@ -2466,19 +2563,24 @@ static int load_state_from_tss16(struct x86_emulate_ctxt *ctxt,
2466 * Now load segment descriptors. If fault happens at this stage 2563 * Now load segment descriptors. If fault happens at this stage
2467 * it is handled in a context of new task 2564 * it is handled in a context of new task
2468 */ 2565 */
2469 ret = __load_segment_descriptor(ctxt, tss->ldt, VCPU_SREG_LDTR, cpl, true); 2566 ret = __load_segment_descriptor(ctxt, tss->ldt, VCPU_SREG_LDTR, cpl,
2567 true, NULL);
2470 if (ret != X86EMUL_CONTINUE) 2568 if (ret != X86EMUL_CONTINUE)
2471 return ret; 2569 return ret;
2472 ret = __load_segment_descriptor(ctxt, tss->es, VCPU_SREG_ES, cpl, true); 2570 ret = __load_segment_descriptor(ctxt, tss->es, VCPU_SREG_ES, cpl,
2571 true, NULL);
2473 if (ret != X86EMUL_CONTINUE) 2572 if (ret != X86EMUL_CONTINUE)
2474 return ret; 2573 return ret;
2475 ret = __load_segment_descriptor(ctxt, tss->cs, VCPU_SREG_CS, cpl, true); 2574 ret = __load_segment_descriptor(ctxt, tss->cs, VCPU_SREG_CS, cpl,
2575 true, NULL);
2476 if (ret != X86EMUL_CONTINUE) 2576 if (ret != X86EMUL_CONTINUE)
2477 return ret; 2577 return ret;
2478 ret = __load_segment_descriptor(ctxt, tss->ss, VCPU_SREG_SS, cpl, true); 2578 ret = __load_segment_descriptor(ctxt, tss->ss, VCPU_SREG_SS, cpl,
2579 true, NULL);
2479 if (ret != X86EMUL_CONTINUE) 2580 if (ret != X86EMUL_CONTINUE)
2480 return ret; 2581 return ret;
2481 ret = __load_segment_descriptor(ctxt, tss->ds, VCPU_SREG_DS, cpl, true); 2582 ret = __load_segment_descriptor(ctxt, tss->ds, VCPU_SREG_DS, cpl,
2583 true, NULL);
2482 if (ret != X86EMUL_CONTINUE) 2584 if (ret != X86EMUL_CONTINUE)
2483 return ret; 2585 return ret;
2484 2586
@@ -2603,25 +2705,32 @@ static int load_state_from_tss32(struct x86_emulate_ctxt *ctxt,
2603 * Now load segment descriptors. If fault happenes at this stage 2705 * Now load segment descriptors. If fault happenes at this stage
2604 * it is handled in a context of new task 2706 * it is handled in a context of new task
2605 */ 2707 */
2606 ret = __load_segment_descriptor(ctxt, tss->ldt_selector, VCPU_SREG_LDTR, cpl, true); 2708 ret = __load_segment_descriptor(ctxt, tss->ldt_selector, VCPU_SREG_LDTR,
2709 cpl, true, NULL);
2607 if (ret != X86EMUL_CONTINUE) 2710 if (ret != X86EMUL_CONTINUE)
2608 return ret; 2711 return ret;
2609 ret = __load_segment_descriptor(ctxt, tss->es, VCPU_SREG_ES, cpl, true); 2712 ret = __load_segment_descriptor(ctxt, tss->es, VCPU_SREG_ES, cpl,
2713 true, NULL);
2610 if (ret != X86EMUL_CONTINUE) 2714 if (ret != X86EMUL_CONTINUE)
2611 return ret; 2715 return ret;
2612 ret = __load_segment_descriptor(ctxt, tss->cs, VCPU_SREG_CS, cpl, true); 2716 ret = __load_segment_descriptor(ctxt, tss->cs, VCPU_SREG_CS, cpl,
2717 true, NULL);
2613 if (ret != X86EMUL_CONTINUE) 2718 if (ret != X86EMUL_CONTINUE)
2614 return ret; 2719 return ret;
2615 ret = __load_segment_descriptor(ctxt, tss->ss, VCPU_SREG_SS, cpl, true); 2720 ret = __load_segment_descriptor(ctxt, tss->ss, VCPU_SREG_SS, cpl,
2721 true, NULL);
2616 if (ret != X86EMUL_CONTINUE) 2722 if (ret != X86EMUL_CONTINUE)
2617 return ret; 2723 return ret;
2618 ret = __load_segment_descriptor(ctxt, tss->ds, VCPU_SREG_DS, cpl, true); 2724 ret = __load_segment_descriptor(ctxt, tss->ds, VCPU_SREG_DS, cpl,
2725 true, NULL);
2619 if (ret != X86EMUL_CONTINUE) 2726 if (ret != X86EMUL_CONTINUE)
2620 return ret; 2727 return ret;
2621 ret = __load_segment_descriptor(ctxt, tss->fs, VCPU_SREG_FS, cpl, true); 2728 ret = __load_segment_descriptor(ctxt, tss->fs, VCPU_SREG_FS, cpl,
2729 true, NULL);
2622 if (ret != X86EMUL_CONTINUE) 2730 if (ret != X86EMUL_CONTINUE)
2623 return ret; 2731 return ret;
2624 ret = __load_segment_descriptor(ctxt, tss->gs, VCPU_SREG_GS, cpl, true); 2732 ret = __load_segment_descriptor(ctxt, tss->gs, VCPU_SREG_GS, cpl,
2733 true, NULL);
2625 if (ret != X86EMUL_CONTINUE) 2734 if (ret != X86EMUL_CONTINUE)
2626 return ret; 2735 return ret;
2627 2736
@@ -2888,10 +2997,13 @@ static int em_aad(struct x86_emulate_ctxt *ctxt)
2888 2997
2889static int em_call(struct x86_emulate_ctxt *ctxt) 2998static int em_call(struct x86_emulate_ctxt *ctxt)
2890{ 2999{
3000 int rc;
2891 long rel = ctxt->src.val; 3001 long rel = ctxt->src.val;
2892 3002
2893 ctxt->src.val = (unsigned long)ctxt->_eip; 3003 ctxt->src.val = (unsigned long)ctxt->_eip;
2894 jmp_rel(ctxt, rel); 3004 rc = jmp_rel(ctxt, rel);
3005 if (rc != X86EMUL_CONTINUE)
3006 return rc;
2895 return em_push(ctxt); 3007 return em_push(ctxt);
2896} 3008}
2897 3009
@@ -2900,34 +3012,50 @@ static int em_call_far(struct x86_emulate_ctxt *ctxt)
2900 u16 sel, old_cs; 3012 u16 sel, old_cs;
2901 ulong old_eip; 3013 ulong old_eip;
2902 int rc; 3014 int rc;
3015 struct desc_struct old_desc, new_desc;
3016 const struct x86_emulate_ops *ops = ctxt->ops;
3017 int cpl = ctxt->ops->cpl(ctxt);
2903 3018
2904 old_cs = get_segment_selector(ctxt, VCPU_SREG_CS);
2905 old_eip = ctxt->_eip; 3019 old_eip = ctxt->_eip;
3020 ops->get_segment(ctxt, &old_cs, &old_desc, NULL, VCPU_SREG_CS);
2906 3021
2907 memcpy(&sel, ctxt->src.valptr + ctxt->op_bytes, 2); 3022 memcpy(&sel, ctxt->src.valptr + ctxt->op_bytes, 2);
2908 if (load_segment_descriptor(ctxt, sel, VCPU_SREG_CS)) 3023 rc = __load_segment_descriptor(ctxt, sel, VCPU_SREG_CS, cpl, false,
3024 &new_desc);
3025 if (rc != X86EMUL_CONTINUE)
2909 return X86EMUL_CONTINUE; 3026 return X86EMUL_CONTINUE;
2910 3027
2911 ctxt->_eip = 0; 3028 rc = assign_eip_far(ctxt, ctxt->src.val, new_desc.l);
2912 memcpy(&ctxt->_eip, ctxt->src.valptr, ctxt->op_bytes); 3029 if (rc != X86EMUL_CONTINUE)
3030 goto fail;
2913 3031
2914 ctxt->src.val = old_cs; 3032 ctxt->src.val = old_cs;
2915 rc = em_push(ctxt); 3033 rc = em_push(ctxt);
2916 if (rc != X86EMUL_CONTINUE) 3034 if (rc != X86EMUL_CONTINUE)
2917 return rc; 3035 goto fail;
2918 3036
2919 ctxt->src.val = old_eip; 3037 ctxt->src.val = old_eip;
2920 return em_push(ctxt); 3038 rc = em_push(ctxt);
3039 /* If we failed, we tainted the memory, but the very least we should
3040 restore cs */
3041 if (rc != X86EMUL_CONTINUE)
3042 goto fail;
3043 return rc;
3044fail:
3045 ops->set_segment(ctxt, old_cs, &old_desc, 0, VCPU_SREG_CS);
3046 return rc;
3047
2921} 3048}
2922 3049
2923static int em_ret_near_imm(struct x86_emulate_ctxt *ctxt) 3050static int em_ret_near_imm(struct x86_emulate_ctxt *ctxt)
2924{ 3051{
2925 int rc; 3052 int rc;
3053 unsigned long eip;
2926 3054
2927 ctxt->dst.type = OP_REG; 3055 rc = emulate_pop(ctxt, &eip, ctxt->op_bytes);
2928 ctxt->dst.addr.reg = &ctxt->_eip; 3056 if (rc != X86EMUL_CONTINUE)
2929 ctxt->dst.bytes = ctxt->op_bytes; 3057 return rc;
2930 rc = emulate_pop(ctxt, &ctxt->dst.val, ctxt->op_bytes); 3058 rc = assign_eip_near(ctxt, eip);
2931 if (rc != X86EMUL_CONTINUE) 3059 if (rc != X86EMUL_CONTINUE)
2932 return rc; 3060 return rc;
2933 rsp_increment(ctxt, ctxt->src.val); 3061 rsp_increment(ctxt, ctxt->src.val);
@@ -3254,20 +3382,24 @@ static int em_lmsw(struct x86_emulate_ctxt *ctxt)
3254 3382
3255static int em_loop(struct x86_emulate_ctxt *ctxt) 3383static int em_loop(struct x86_emulate_ctxt *ctxt)
3256{ 3384{
3385 int rc = X86EMUL_CONTINUE;
3386
3257 register_address_increment(ctxt, reg_rmw(ctxt, VCPU_REGS_RCX), -1); 3387 register_address_increment(ctxt, reg_rmw(ctxt, VCPU_REGS_RCX), -1);
3258 if ((address_mask(ctxt, reg_read(ctxt, VCPU_REGS_RCX)) != 0) && 3388 if ((address_mask(ctxt, reg_read(ctxt, VCPU_REGS_RCX)) != 0) &&
3259 (ctxt->b == 0xe2 || test_cc(ctxt->b ^ 0x5, ctxt->eflags))) 3389 (ctxt->b == 0xe2 || test_cc(ctxt->b ^ 0x5, ctxt->eflags)))
3260 jmp_rel(ctxt, ctxt->src.val); 3390 rc = jmp_rel(ctxt, ctxt->src.val);
3261 3391
3262 return X86EMUL_CONTINUE; 3392 return rc;
3263} 3393}
3264 3394
3265static int em_jcxz(struct x86_emulate_ctxt *ctxt) 3395static int em_jcxz(struct x86_emulate_ctxt *ctxt)
3266{ 3396{
3397 int rc = X86EMUL_CONTINUE;
3398
3267 if (address_mask(ctxt, reg_read(ctxt, VCPU_REGS_RCX)) == 0) 3399 if (address_mask(ctxt, reg_read(ctxt, VCPU_REGS_RCX)) == 0)
3268 jmp_rel(ctxt, ctxt->src.val); 3400 rc = jmp_rel(ctxt, ctxt->src.val);
3269 3401
3270 return X86EMUL_CONTINUE; 3402 return rc;
3271} 3403}
3272 3404
3273static int em_in(struct x86_emulate_ctxt *ctxt) 3405static int em_in(struct x86_emulate_ctxt *ctxt)
@@ -3355,6 +3487,12 @@ static int em_bswap(struct x86_emulate_ctxt *ctxt)
3355 return X86EMUL_CONTINUE; 3487 return X86EMUL_CONTINUE;
3356} 3488}
3357 3489
3490static int em_clflush(struct x86_emulate_ctxt *ctxt)
3491{
3492 /* emulating clflush regardless of cpuid */
3493 return X86EMUL_CONTINUE;
3494}
3495
3358static bool valid_cr(int nr) 3496static bool valid_cr(int nr)
3359{ 3497{
3360 switch (nr) { 3498 switch (nr) {
@@ -3693,6 +3831,16 @@ static const struct opcode group11[] = {
3693 X7(D(Undefined)), 3831 X7(D(Undefined)),
3694}; 3832};
3695 3833
3834static const struct gprefix pfx_0f_ae_7 = {
3835 I(SrcMem | ByteOp, em_clflush), N, N, N,
3836};
3837
3838static const struct group_dual group15 = { {
3839 N, N, N, N, N, N, N, GP(0, &pfx_0f_ae_7),
3840}, {
3841 N, N, N, N, N, N, N, N,
3842} };
3843
3696static const struct gprefix pfx_0f_6f_0f_7f = { 3844static const struct gprefix pfx_0f_6f_0f_7f = {
3697 I(Mmx, em_mov), I(Sse | Aligned, em_mov), N, I(Sse | Unaligned, em_mov), 3845 I(Mmx, em_mov), I(Sse | Aligned, em_mov), N, I(Sse | Unaligned, em_mov),
3698}; 3846};
@@ -3901,10 +4049,11 @@ static const struct opcode twobyte_table[256] = {
3901 N, I(ImplicitOps | EmulateOnUD, em_syscall), 4049 N, I(ImplicitOps | EmulateOnUD, em_syscall),
3902 II(ImplicitOps | Priv, em_clts, clts), N, 4050 II(ImplicitOps | Priv, em_clts, clts), N,
3903 DI(ImplicitOps | Priv, invd), DI(ImplicitOps | Priv, wbinvd), N, N, 4051 DI(ImplicitOps | Priv, invd), DI(ImplicitOps | Priv, wbinvd), N, N,
3904 N, D(ImplicitOps | ModRM), N, N, 4052 N, D(ImplicitOps | ModRM | SrcMem | NoAccess), N, N,
3905 /* 0x10 - 0x1F */ 4053 /* 0x10 - 0x1F */
3906 N, N, N, N, N, N, N, N, 4054 N, N, N, N, N, N, N, N,
3907 D(ImplicitOps | ModRM), N, N, N, N, N, N, D(ImplicitOps | ModRM), 4055 D(ImplicitOps | ModRM | SrcMem | NoAccess),
4056 N, N, N, N, N, N, D(ImplicitOps | ModRM | SrcMem | NoAccess),
3908 /* 0x20 - 0x2F */ 4057 /* 0x20 - 0x2F */
3909 DIP(ModRM | DstMem | Priv | Op3264 | NoMod, cr_read, check_cr_read), 4058 DIP(ModRM | DstMem | Priv | Op3264 | NoMod, cr_read, check_cr_read),
3910 DIP(ModRM | DstMem | Priv | Op3264 | NoMod, dr_read, check_dr_read), 4059 DIP(ModRM | DstMem | Priv | Op3264 | NoMod, dr_read, check_dr_read),
@@ -3956,7 +4105,7 @@ static const struct opcode twobyte_table[256] = {
3956 F(DstMem | SrcReg | ModRM | BitOp | Lock | PageTable, em_bts), 4105 F(DstMem | SrcReg | ModRM | BitOp | Lock | PageTable, em_bts),
3957 F(DstMem | SrcReg | Src2ImmByte | ModRM, em_shrd), 4106 F(DstMem | SrcReg | Src2ImmByte | ModRM, em_shrd),
3958 F(DstMem | SrcReg | Src2CL | ModRM, em_shrd), 4107 F(DstMem | SrcReg | Src2CL | ModRM, em_shrd),
3959 D(ModRM), F(DstReg | SrcMem | ModRM, em_imul), 4108 GD(0, &group15), F(DstReg | SrcMem | ModRM, em_imul),
3960 /* 0xB0 - 0xB7 */ 4109 /* 0xB0 - 0xB7 */
3961 I2bv(DstMem | SrcReg | ModRM | Lock | PageTable, em_cmpxchg), 4110 I2bv(DstMem | SrcReg | ModRM | Lock | PageTable, em_cmpxchg),
3962 I(DstReg | SrcMemFAddr | ModRM | Src2SS, em_lseg), 4111 I(DstReg | SrcMemFAddr | ModRM | Src2SS, em_lseg),
@@ -4473,10 +4622,10 @@ done_prefixes:
4473 /* Decode and fetch the destination operand: register or memory. */ 4622 /* Decode and fetch the destination operand: register or memory. */
4474 rc = decode_operand(ctxt, &ctxt->dst, (ctxt->d >> DstShift) & OpMask); 4623 rc = decode_operand(ctxt, &ctxt->dst, (ctxt->d >> DstShift) & OpMask);
4475 4624
4476done:
4477 if (ctxt->rip_relative) 4625 if (ctxt->rip_relative)
4478 ctxt->memopp->addr.mem.ea += ctxt->_eip; 4626 ctxt->memopp->addr.mem.ea += ctxt->_eip;
4479 4627
4628done:
4480 return (rc != X86EMUL_CONTINUE) ? EMULATION_FAILED : EMULATION_OK; 4629 return (rc != X86EMUL_CONTINUE) ? EMULATION_FAILED : EMULATION_OK;
4481} 4630}
4482 4631
@@ -4726,7 +4875,7 @@ special_insn:
4726 break; 4875 break;
4727 case 0x70 ... 0x7f: /* jcc (short) */ 4876 case 0x70 ... 0x7f: /* jcc (short) */
4728 if (test_cc(ctxt->b, ctxt->eflags)) 4877 if (test_cc(ctxt->b, ctxt->eflags))
4729 jmp_rel(ctxt, ctxt->src.val); 4878 rc = jmp_rel(ctxt, ctxt->src.val);
4730 break; 4879 break;
4731 case 0x8d: /* lea r16/r32, m */ 4880 case 0x8d: /* lea r16/r32, m */
4732 ctxt->dst.val = ctxt->src.addr.mem.ea; 4881 ctxt->dst.val = ctxt->src.addr.mem.ea;
@@ -4756,7 +4905,7 @@ special_insn:
4756 break; 4905 break;
4757 case 0xe9: /* jmp rel */ 4906 case 0xe9: /* jmp rel */
4758 case 0xeb: /* jmp rel short */ 4907 case 0xeb: /* jmp rel short */
4759 jmp_rel(ctxt, ctxt->src.val); 4908 rc = jmp_rel(ctxt, ctxt->src.val);
4760 ctxt->dst.type = OP_NONE; /* Disable writeback. */ 4909 ctxt->dst.type = OP_NONE; /* Disable writeback. */
4761 break; 4910 break;
4762 case 0xf4: /* hlt */ 4911 case 0xf4: /* hlt */
@@ -4881,13 +5030,11 @@ twobyte_insn:
4881 break; 5030 break;
4882 case 0x80 ... 0x8f: /* jnz rel, etc*/ 5031 case 0x80 ... 0x8f: /* jnz rel, etc*/
4883 if (test_cc(ctxt->b, ctxt->eflags)) 5032 if (test_cc(ctxt->b, ctxt->eflags))
4884 jmp_rel(ctxt, ctxt->src.val); 5033 rc = jmp_rel(ctxt, ctxt->src.val);
4885 break; 5034 break;
4886 case 0x90 ... 0x9f: /* setcc r/m8 */ 5035 case 0x90 ... 0x9f: /* setcc r/m8 */
4887 ctxt->dst.val = test_cc(ctxt->b, ctxt->eflags); 5036 ctxt->dst.val = test_cc(ctxt->b, ctxt->eflags);
4888 break; 5037 break;
4889 case 0xae: /* clflush */
4890 break;
4891 case 0xb6 ... 0xb7: /* movzx */ 5038 case 0xb6 ... 0xb7: /* movzx */
4892 ctxt->dst.bytes = ctxt->op_bytes; 5039 ctxt->dst.bytes = ctxt->op_bytes;
4893 ctxt->dst.val = (ctxt->src.bytes == 1) ? (u8) ctxt->src.val 5040 ctxt->dst.val = (ctxt->src.bytes == 1) ? (u8) ctxt->src.val
diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c
index 518d86471b76..298781d4cfb4 100644
--- a/arch/x86/kvm/i8254.c
+++ b/arch/x86/kvm/i8254.c
@@ -262,8 +262,10 @@ void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu)
262 return; 262 return;
263 263
264 timer = &pit->pit_state.timer; 264 timer = &pit->pit_state.timer;
265 mutex_lock(&pit->pit_state.lock);
265 if (hrtimer_cancel(timer)) 266 if (hrtimer_cancel(timer))
266 hrtimer_start_expires(timer, HRTIMER_MODE_ABS); 267 hrtimer_start_expires(timer, HRTIMER_MODE_ABS);
268 mutex_unlock(&pit->pit_state.lock);
267} 269}
268 270
269static void destroy_pit_timer(struct kvm_pit *pit) 271static void destroy_pit_timer(struct kvm_pit *pit)
diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h
index 806d58e3c320..fd49c867b25a 100644
--- a/arch/x86/kvm/paging_tmpl.h
+++ b/arch/x86/kvm/paging_tmpl.h
@@ -298,7 +298,7 @@ retry_walk:
298 } 298 }
299#endif 299#endif
300 walker->max_level = walker->level; 300 walker->max_level = walker->level;
301 ASSERT(!is_long_mode(vcpu) && is_pae(vcpu)); 301 ASSERT(!(is_long_mode(vcpu) && !is_pae(vcpu)));
302 302
303 accessed_dirty = PT_GUEST_ACCESSED_MASK; 303 accessed_dirty = PT_GUEST_ACCESSED_MASK;
304 pt_access = pte_access = ACC_ALL; 304 pt_access = pte_access = ACC_ALL;
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 65510f624dfe..7527cefc5a43 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -3251,7 +3251,7 @@ static int wrmsr_interception(struct vcpu_svm *svm)
3251 msr.host_initiated = false; 3251 msr.host_initiated = false;
3252 3252
3253 svm->next_rip = kvm_rip_read(&svm->vcpu) + 2; 3253 svm->next_rip = kvm_rip_read(&svm->vcpu) + 2;
3254 if (svm_set_msr(&svm->vcpu, &msr)) { 3254 if (kvm_set_msr(&svm->vcpu, &msr)) {
3255 trace_kvm_msr_write_ex(ecx, data); 3255 trace_kvm_msr_write_ex(ecx, data);
3256 kvm_inject_gp(&svm->vcpu, 0); 3256 kvm_inject_gp(&svm->vcpu, 0);
3257 } else { 3257 } else {
@@ -3551,9 +3551,9 @@ static int handle_exit(struct kvm_vcpu *vcpu)
3551 3551
3552 if (exit_code >= ARRAY_SIZE(svm_exit_handlers) 3552 if (exit_code >= ARRAY_SIZE(svm_exit_handlers)
3553 || !svm_exit_handlers[exit_code]) { 3553 || !svm_exit_handlers[exit_code]) {
3554 kvm_run->exit_reason = KVM_EXIT_UNKNOWN; 3554 WARN_ONCE(1, "vmx: unexpected exit reason 0x%x\n", exit_code);
3555 kvm_run->hw.hardware_exit_reason = exit_code; 3555 kvm_queue_exception(vcpu, UD_VECTOR);
3556 return 0; 3556 return 1;
3557 } 3557 }
3558 3558
3559 return svm_exit_handlers[exit_code](svm); 3559 return svm_exit_handlers[exit_code](svm);
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 0acac81f198b..3e556c68351b 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -2659,12 +2659,15 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2659 default: 2659 default:
2660 msr = find_msr_entry(vmx, msr_index); 2660 msr = find_msr_entry(vmx, msr_index);
2661 if (msr) { 2661 if (msr) {
2662 u64 old_msr_data = msr->data;
2662 msr->data = data; 2663 msr->data = data;
2663 if (msr - vmx->guest_msrs < vmx->save_nmsrs) { 2664 if (msr - vmx->guest_msrs < vmx->save_nmsrs) {
2664 preempt_disable(); 2665 preempt_disable();
2665 kvm_set_shared_msr(msr->index, msr->data, 2666 ret = kvm_set_shared_msr(msr->index, msr->data,
2666 msr->mask); 2667 msr->mask);
2667 preempt_enable(); 2668 preempt_enable();
2669 if (ret)
2670 msr->data = old_msr_data;
2668 } 2671 }
2669 break; 2672 break;
2670 } 2673 }
@@ -4576,7 +4579,7 @@ static void vmx_vcpu_reset(struct kvm_vcpu *vcpu)
4576 vmcs_write32(TPR_THRESHOLD, 0); 4579 vmcs_write32(TPR_THRESHOLD, 0);
4577 } 4580 }
4578 4581
4579 kvm_vcpu_reload_apic_access_page(vcpu); 4582 kvm_make_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu);
4580 4583
4581 if (vmx_vm_has_apicv(vcpu->kvm)) 4584 if (vmx_vm_has_apicv(vcpu->kvm))
4582 memset(&vmx->pi_desc, 0, sizeof(struct pi_desc)); 4585 memset(&vmx->pi_desc, 0, sizeof(struct pi_desc));
@@ -5291,7 +5294,7 @@ static int handle_wrmsr(struct kvm_vcpu *vcpu)
5291 msr.data = data; 5294 msr.data = data;
5292 msr.index = ecx; 5295 msr.index = ecx;
5293 msr.host_initiated = false; 5296 msr.host_initiated = false;
5294 if (vmx_set_msr(vcpu, &msr) != 0) { 5297 if (kvm_set_msr(vcpu, &msr) != 0) {
5295 trace_kvm_msr_write_ex(ecx, data); 5298 trace_kvm_msr_write_ex(ecx, data);
5296 kvm_inject_gp(vcpu, 0); 5299 kvm_inject_gp(vcpu, 0);
5297 return 1; 5300 return 1;
@@ -6423,6 +6426,8 @@ static void copy_shadow_to_vmcs12(struct vcpu_vmx *vmx)
6423 const unsigned long *fields = shadow_read_write_fields; 6426 const unsigned long *fields = shadow_read_write_fields;
6424 const int num_fields = max_shadow_read_write_fields; 6427 const int num_fields = max_shadow_read_write_fields;
6425 6428
6429 preempt_disable();
6430
6426 vmcs_load(shadow_vmcs); 6431 vmcs_load(shadow_vmcs);
6427 6432
6428 for (i = 0; i < num_fields; i++) { 6433 for (i = 0; i < num_fields; i++) {
@@ -6446,6 +6451,8 @@ static void copy_shadow_to_vmcs12(struct vcpu_vmx *vmx)
6446 6451
6447 vmcs_clear(shadow_vmcs); 6452 vmcs_clear(shadow_vmcs);
6448 vmcs_load(vmx->loaded_vmcs->vmcs); 6453 vmcs_load(vmx->loaded_vmcs->vmcs);
6454
6455 preempt_enable();
6449} 6456}
6450 6457
6451static void copy_vmcs12_to_shadow(struct vcpu_vmx *vmx) 6458static void copy_vmcs12_to_shadow(struct vcpu_vmx *vmx)
@@ -6743,6 +6750,12 @@ static int handle_invept(struct kvm_vcpu *vcpu)
6743 return 1; 6750 return 1;
6744} 6751}
6745 6752
6753static int handle_invvpid(struct kvm_vcpu *vcpu)
6754{
6755 kvm_queue_exception(vcpu, UD_VECTOR);
6756 return 1;
6757}
6758
6746/* 6759/*
6747 * The exit handlers return 1 if the exit was handled fully and guest execution 6760 * The exit handlers return 1 if the exit was handled fully and guest execution
6748 * may resume. Otherwise they set the kvm_run parameter to indicate what needs 6761 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
@@ -6788,6 +6801,7 @@ static int (*const kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu) = {
6788 [EXIT_REASON_MWAIT_INSTRUCTION] = handle_mwait, 6801 [EXIT_REASON_MWAIT_INSTRUCTION] = handle_mwait,
6789 [EXIT_REASON_MONITOR_INSTRUCTION] = handle_monitor, 6802 [EXIT_REASON_MONITOR_INSTRUCTION] = handle_monitor,
6790 [EXIT_REASON_INVEPT] = handle_invept, 6803 [EXIT_REASON_INVEPT] = handle_invept,
6804 [EXIT_REASON_INVVPID] = handle_invvpid,
6791}; 6805};
6792 6806
6793static const int kvm_vmx_max_exit_handlers = 6807static const int kvm_vmx_max_exit_handlers =
@@ -7023,7 +7037,7 @@ static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
7023 case EXIT_REASON_VMPTRST: case EXIT_REASON_VMREAD: 7037 case EXIT_REASON_VMPTRST: case EXIT_REASON_VMREAD:
7024 case EXIT_REASON_VMRESUME: case EXIT_REASON_VMWRITE: 7038 case EXIT_REASON_VMRESUME: case EXIT_REASON_VMWRITE:
7025 case EXIT_REASON_VMOFF: case EXIT_REASON_VMON: 7039 case EXIT_REASON_VMOFF: case EXIT_REASON_VMON:
7026 case EXIT_REASON_INVEPT: 7040 case EXIT_REASON_INVEPT: case EXIT_REASON_INVVPID:
7027 /* 7041 /*
7028 * VMX instructions trap unconditionally. This allows L1 to 7042 * VMX instructions trap unconditionally. This allows L1 to
7029 * emulate them for its L2 guest, i.e., allows 3-level nesting! 7043 * emulate them for its L2 guest, i.e., allows 3-level nesting!
@@ -7164,10 +7178,10 @@ static int vmx_handle_exit(struct kvm_vcpu *vcpu)
7164 && kvm_vmx_exit_handlers[exit_reason]) 7178 && kvm_vmx_exit_handlers[exit_reason])
7165 return kvm_vmx_exit_handlers[exit_reason](vcpu); 7179 return kvm_vmx_exit_handlers[exit_reason](vcpu);
7166 else { 7180 else {
7167 vcpu->run->exit_reason = KVM_EXIT_UNKNOWN; 7181 WARN_ONCE(1, "vmx: unexpected exit reason 0x%x\n", exit_reason);
7168 vcpu->run->hw.hardware_exit_reason = exit_reason; 7182 kvm_queue_exception(vcpu, UD_VECTOR);
7183 return 1;
7169 } 7184 }
7170 return 0;
7171} 7185}
7172 7186
7173static void update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr) 7187static void update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 34c8f94331f8..0033df32a745 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -229,20 +229,25 @@ static void kvm_shared_msr_cpu_online(void)
229 shared_msr_update(i, shared_msrs_global.msrs[i]); 229 shared_msr_update(i, shared_msrs_global.msrs[i]);
230} 230}
231 231
232void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask) 232int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
233{ 233{
234 unsigned int cpu = smp_processor_id(); 234 unsigned int cpu = smp_processor_id();
235 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu); 235 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
236 int err;
236 237
237 if (((value ^ smsr->values[slot].curr) & mask) == 0) 238 if (((value ^ smsr->values[slot].curr) & mask) == 0)
238 return; 239 return 0;
239 smsr->values[slot].curr = value; 240 smsr->values[slot].curr = value;
240 wrmsrl(shared_msrs_global.msrs[slot], value); 241 err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
242 if (err)
243 return 1;
244
241 if (!smsr->registered) { 245 if (!smsr->registered) {
242 smsr->urn.on_user_return = kvm_on_user_return; 246 smsr->urn.on_user_return = kvm_on_user_return;
243 user_return_notifier_register(&smsr->urn); 247 user_return_notifier_register(&smsr->urn);
244 smsr->registered = true; 248 smsr->registered = true;
245 } 249 }
250 return 0;
246} 251}
247EXPORT_SYMBOL_GPL(kvm_set_shared_msr); 252EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
248 253
@@ -987,7 +992,6 @@ void kvm_enable_efer_bits(u64 mask)
987} 992}
988EXPORT_SYMBOL_GPL(kvm_enable_efer_bits); 993EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
989 994
990
991/* 995/*
992 * Writes msr value into into the appropriate "register". 996 * Writes msr value into into the appropriate "register".
993 * Returns 0 on success, non-0 otherwise. 997 * Returns 0 on success, non-0 otherwise.
@@ -995,8 +999,34 @@ EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
995 */ 999 */
996int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr) 1000int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
997{ 1001{
1002 switch (msr->index) {
1003 case MSR_FS_BASE:
1004 case MSR_GS_BASE:
1005 case MSR_KERNEL_GS_BASE:
1006 case MSR_CSTAR:
1007 case MSR_LSTAR:
1008 if (is_noncanonical_address(msr->data))
1009 return 1;
1010 break;
1011 case MSR_IA32_SYSENTER_EIP:
1012 case MSR_IA32_SYSENTER_ESP:
1013 /*
1014 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1015 * non-canonical address is written on Intel but not on
1016 * AMD (which ignores the top 32-bits, because it does
1017 * not implement 64-bit SYSENTER).
1018 *
1019 * 64-bit code should hence be able to write a non-canonical
1020 * value on AMD. Making the address canonical ensures that
1021 * vmentry does not fail on Intel after writing a non-canonical
1022 * value, and that something deterministic happens if the guest
1023 * invokes 64-bit SYSENTER.
1024 */
1025 msr->data = get_canonical(msr->data);
1026 }
998 return kvm_x86_ops->set_msr(vcpu, msr); 1027 return kvm_x86_ops->set_msr(vcpu, msr);
999} 1028}
1029EXPORT_SYMBOL_GPL(kvm_set_msr);
1000 1030
1001/* 1031/*
1002 * Adapt set_msr() to msr_io()'s calling convention 1032 * Adapt set_msr() to msr_io()'s calling convention
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index ae242a7c11c7..36de293caf25 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -409,7 +409,7 @@ phys_addr_t slow_virt_to_phys(void *__virt_addr)
409 psize = page_level_size(level); 409 psize = page_level_size(level);
410 pmask = page_level_mask(level); 410 pmask = page_level_mask(level);
411 offset = virt_addr & ~pmask; 411 offset = virt_addr & ~pmask;
412 phys_addr = pte_pfn(*pte) << PAGE_SHIFT; 412 phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
413 return (phys_addr | offset); 413 return (phys_addr | offset);
414} 414}
415EXPORT_SYMBOL_GPL(slow_virt_to_phys); 415EXPORT_SYMBOL_GPL(slow_virt_to_phys);
diff --git a/arch/x86/platform/efi/efi-bgrt.c b/arch/x86/platform/efi/efi-bgrt.c
index f15103dff4b4..d143d216d52b 100644
--- a/arch/x86/platform/efi/efi-bgrt.c
+++ b/arch/x86/platform/efi/efi-bgrt.c
@@ -40,20 +40,40 @@ void __init efi_bgrt_init(void)
40 if (ACPI_FAILURE(status)) 40 if (ACPI_FAILURE(status))
41 return; 41 return;
42 42
43 if (bgrt_tab->header.length < sizeof(*bgrt_tab)) 43 if (bgrt_tab->header.length < sizeof(*bgrt_tab)) {
44 pr_err("Ignoring BGRT: invalid length %u (expected %zu)\n",
45 bgrt_tab->header.length, sizeof(*bgrt_tab));
44 return; 46 return;
45 if (bgrt_tab->version != 1 || bgrt_tab->status != 1) 47 }
48 if (bgrt_tab->version != 1) {
49 pr_err("Ignoring BGRT: invalid version %u (expected 1)\n",
50 bgrt_tab->version);
51 return;
52 }
53 if (bgrt_tab->status != 1) {
54 pr_err("Ignoring BGRT: invalid status %u (expected 1)\n",
55 bgrt_tab->status);
56 return;
57 }
58 if (bgrt_tab->image_type != 0) {
59 pr_err("Ignoring BGRT: invalid image type %u (expected 0)\n",
60 bgrt_tab->image_type);
46 return; 61 return;
47 if (bgrt_tab->image_type != 0 || !bgrt_tab->image_address) 62 }
63 if (!bgrt_tab->image_address) {
64 pr_err("Ignoring BGRT: null image address\n");
48 return; 65 return;
66 }
49 67
50 image = efi_lookup_mapped_addr(bgrt_tab->image_address); 68 image = efi_lookup_mapped_addr(bgrt_tab->image_address);
51 if (!image) { 69 if (!image) {
52 image = early_memremap(bgrt_tab->image_address, 70 image = early_memremap(bgrt_tab->image_address,
53 sizeof(bmp_header)); 71 sizeof(bmp_header));
54 ioremapped = true; 72 ioremapped = true;
55 if (!image) 73 if (!image) {
74 pr_err("Ignoring BGRT: failed to map image header memory\n");
56 return; 75 return;
76 }
57 } 77 }
58 78
59 memcpy_fromio(&bmp_header, image, sizeof(bmp_header)); 79 memcpy_fromio(&bmp_header, image, sizeof(bmp_header));
@@ -61,14 +81,18 @@ void __init efi_bgrt_init(void)
61 early_iounmap(image, sizeof(bmp_header)); 81 early_iounmap(image, sizeof(bmp_header));
62 bgrt_image_size = bmp_header.size; 82 bgrt_image_size = bmp_header.size;
63 83
64 bgrt_image = kmalloc(bgrt_image_size, GFP_KERNEL); 84 bgrt_image = kmalloc(bgrt_image_size, GFP_KERNEL | __GFP_NOWARN);
65 if (!bgrt_image) 85 if (!bgrt_image) {
86 pr_err("Ignoring BGRT: failed to allocate memory for image (wanted %zu bytes)\n",
87 bgrt_image_size);
66 return; 88 return;
89 }
67 90
68 if (ioremapped) { 91 if (ioremapped) {
69 image = early_memremap(bgrt_tab->image_address, 92 image = early_memremap(bgrt_tab->image_address,
70 bmp_header.size); 93 bmp_header.size);
71 if (!image) { 94 if (!image) {
95 pr_err("Ignoring BGRT: failed to map image memory\n");
72 kfree(bgrt_image); 96 kfree(bgrt_image);
73 bgrt_image = NULL; 97 bgrt_image = NULL;
74 return; 98 return;
diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c
index 850da94fef30..dbc8627a5cdf 100644
--- a/arch/x86/platform/efi/efi.c
+++ b/arch/x86/platform/efi/efi.c
@@ -70,17 +70,7 @@ static efi_config_table_type_t arch_tables[] __initdata = {
70 70
71u64 efi_setup; /* efi setup_data physical address */ 71u64 efi_setup; /* efi setup_data physical address */
72 72
73static bool disable_runtime __initdata = false; 73static int add_efi_memmap __initdata;
74static int __init setup_noefi(char *arg)
75{
76 disable_runtime = true;
77 return 0;
78}
79early_param("noefi", setup_noefi);
80
81int add_efi_memmap;
82EXPORT_SYMBOL(add_efi_memmap);
83
84static int __init setup_add_efi_memmap(char *arg) 74static int __init setup_add_efi_memmap(char *arg)
85{ 75{
86 add_efi_memmap = 1; 76 add_efi_memmap = 1;
@@ -96,7 +86,7 @@ static efi_status_t __init phys_efi_set_virtual_address_map(
96{ 86{
97 efi_status_t status; 87 efi_status_t status;
98 88
99 efi_call_phys_prelog(); 89 efi_call_phys_prolog();
100 status = efi_call_phys(efi_phys.set_virtual_address_map, 90 status = efi_call_phys(efi_phys.set_virtual_address_map,
101 memory_map_size, descriptor_size, 91 memory_map_size, descriptor_size,
102 descriptor_version, virtual_map); 92 descriptor_version, virtual_map);
@@ -210,9 +200,12 @@ static void __init print_efi_memmap(void)
210 for (p = memmap.map, i = 0; 200 for (p = memmap.map, i = 0;
211 p < memmap.map_end; 201 p < memmap.map_end;
212 p += memmap.desc_size, i++) { 202 p += memmap.desc_size, i++) {
203 char buf[64];
204
213 md = p; 205 md = p;
214 pr_info("mem%02u: type=%u, attr=0x%llx, range=[0x%016llx-0x%016llx) (%lluMB)\n", 206 pr_info("mem%02u: %s range=[0x%016llx-0x%016llx) (%lluMB)\n",
215 i, md->type, md->attribute, md->phys_addr, 207 i, efi_md_typeattr_format(buf, sizeof(buf), md),
208 md->phys_addr,
216 md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT), 209 md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT),
217 (md->num_pages >> (20 - EFI_PAGE_SHIFT))); 210 (md->num_pages >> (20 - EFI_PAGE_SHIFT)));
218 } 211 }
@@ -344,9 +337,9 @@ static int __init efi_runtime_init32(void)
344 } 337 }
345 338
346 /* 339 /*
347 * We will only need *early* access to the following two 340 * We will only need *early* access to the SetVirtualAddressMap
348 * EFI runtime services before set_virtual_address_map 341 * EFI runtime service. All other runtime services will be called
349 * is invoked. 342 * via the virtual mapping.
350 */ 343 */
351 efi_phys.set_virtual_address_map = 344 efi_phys.set_virtual_address_map =
352 (efi_set_virtual_address_map_t *) 345 (efi_set_virtual_address_map_t *)
@@ -368,9 +361,9 @@ static int __init efi_runtime_init64(void)
368 } 361 }
369 362
370 /* 363 /*
371 * We will only need *early* access to the following two 364 * We will only need *early* access to the SetVirtualAddressMap
372 * EFI runtime services before set_virtual_address_map 365 * EFI runtime service. All other runtime services will be called
373 * is invoked. 366 * via the virtual mapping.
374 */ 367 */
375 efi_phys.set_virtual_address_map = 368 efi_phys.set_virtual_address_map =
376 (efi_set_virtual_address_map_t *) 369 (efi_set_virtual_address_map_t *)
@@ -492,7 +485,7 @@ void __init efi_init(void)
492 if (!efi_runtime_supported()) 485 if (!efi_runtime_supported())
493 pr_info("No EFI runtime due to 32/64-bit mismatch with kernel\n"); 486 pr_info("No EFI runtime due to 32/64-bit mismatch with kernel\n");
494 else { 487 else {
495 if (disable_runtime || efi_runtime_init()) 488 if (efi_runtime_disabled() || efi_runtime_init())
496 return; 489 return;
497 } 490 }
498 if (efi_memmap_init()) 491 if (efi_memmap_init())
@@ -537,7 +530,7 @@ void __init runtime_code_page_mkexec(void)
537 } 530 }
538} 531}
539 532
540void efi_memory_uc(u64 addr, unsigned long size) 533void __init efi_memory_uc(u64 addr, unsigned long size)
541{ 534{
542 unsigned long page_shift = 1UL << EFI_PAGE_SHIFT; 535 unsigned long page_shift = 1UL << EFI_PAGE_SHIFT;
543 u64 npages; 536 u64 npages;
@@ -732,6 +725,7 @@ static void __init kexec_enter_virtual_mode(void)
732 */ 725 */
733 if (!efi_is_native()) { 726 if (!efi_is_native()) {
734 efi_unmap_memmap(); 727 efi_unmap_memmap();
728 clear_bit(EFI_RUNTIME_SERVICES, &efi.flags);
735 return; 729 return;
736 } 730 }
737 731
@@ -805,6 +799,7 @@ static void __init __efi_enter_virtual_mode(void)
805 new_memmap = efi_map_regions(&count, &pg_shift); 799 new_memmap = efi_map_regions(&count, &pg_shift);
806 if (!new_memmap) { 800 if (!new_memmap) {
807 pr_err("Error reallocating memory, EFI runtime non-functional!\n"); 801 pr_err("Error reallocating memory, EFI runtime non-functional!\n");
802 clear_bit(EFI_RUNTIME_SERVICES, &efi.flags);
808 return; 803 return;
809 } 804 }
810 805
@@ -812,8 +807,10 @@ static void __init __efi_enter_virtual_mode(void)
812 807
813 BUG_ON(!efi.systab); 808 BUG_ON(!efi.systab);
814 809
815 if (efi_setup_page_tables(__pa(new_memmap), 1 << pg_shift)) 810 if (efi_setup_page_tables(__pa(new_memmap), 1 << pg_shift)) {
811 clear_bit(EFI_RUNTIME_SERVICES, &efi.flags);
816 return; 812 return;
813 }
817 814
818 efi_sync_low_kernel_mappings(); 815 efi_sync_low_kernel_mappings();
819 efi_dump_pagetable(); 816 efi_dump_pagetable();
@@ -938,14 +935,11 @@ u64 efi_mem_attributes(unsigned long phys_addr)
938 return 0; 935 return 0;
939} 936}
940 937
941static int __init parse_efi_cmdline(char *str) 938static int __init arch_parse_efi_cmdline(char *str)
942{ 939{
943 if (*str == '=') 940 if (parse_option_str(str, "old_map"))
944 str++;
945
946 if (!strncmp(str, "old_map", 7))
947 set_bit(EFI_OLD_MEMMAP, &efi.flags); 941 set_bit(EFI_OLD_MEMMAP, &efi.flags);
948 942
949 return 0; 943 return 0;
950} 944}
951early_param("efi", parse_efi_cmdline); 945early_param("efi", arch_parse_efi_cmdline);
diff --git a/arch/x86/platform/efi/efi_32.c b/arch/x86/platform/efi/efi_32.c
index 9ee3491e31fb..40e7cda52936 100644
--- a/arch/x86/platform/efi/efi_32.c
+++ b/arch/x86/platform/efi/efi_32.c
@@ -33,7 +33,7 @@
33 33
34/* 34/*
35 * To make EFI call EFI runtime service in physical addressing mode we need 35 * To make EFI call EFI runtime service in physical addressing mode we need
36 * prelog/epilog before/after the invocation to disable interrupt, to 36 * prolog/epilog before/after the invocation to disable interrupt, to
37 * claim EFI runtime service handler exclusively and to duplicate a memory in 37 * claim EFI runtime service handler exclusively and to duplicate a memory in
38 * low memory space say 0 - 3G. 38 * low memory space say 0 - 3G.
39 */ 39 */
@@ -41,11 +41,13 @@ static unsigned long efi_rt_eflags;
41 41
42void efi_sync_low_kernel_mappings(void) {} 42void efi_sync_low_kernel_mappings(void) {}
43void __init efi_dump_pagetable(void) {} 43void __init efi_dump_pagetable(void) {}
44int efi_setup_page_tables(unsigned long pa_memmap, unsigned num_pages) 44int __init efi_setup_page_tables(unsigned long pa_memmap, unsigned num_pages)
45{ 45{
46 return 0; 46 return 0;
47} 47}
48void efi_cleanup_page_tables(unsigned long pa_memmap, unsigned num_pages) {} 48void __init efi_cleanup_page_tables(unsigned long pa_memmap, unsigned num_pages)
49{
50}
49 51
50void __init efi_map_region(efi_memory_desc_t *md) 52void __init efi_map_region(efi_memory_desc_t *md)
51{ 53{
@@ -55,7 +57,7 @@ void __init efi_map_region(efi_memory_desc_t *md)
55void __init efi_map_region_fixed(efi_memory_desc_t *md) {} 57void __init efi_map_region_fixed(efi_memory_desc_t *md) {}
56void __init parse_efi_setup(u64 phys_addr, u32 data_len) {} 58void __init parse_efi_setup(u64 phys_addr, u32 data_len) {}
57 59
58void efi_call_phys_prelog(void) 60void __init efi_call_phys_prolog(void)
59{ 61{
60 struct desc_ptr gdt_descr; 62 struct desc_ptr gdt_descr;
61 63
@@ -69,7 +71,7 @@ void efi_call_phys_prelog(void)
69 load_gdt(&gdt_descr); 71 load_gdt(&gdt_descr);
70} 72}
71 73
72void efi_call_phys_epilog(void) 74void __init efi_call_phys_epilog(void)
73{ 75{
74 struct desc_ptr gdt_descr; 76 struct desc_ptr gdt_descr;
75 77
diff --git a/arch/x86/platform/efi/efi_64.c b/arch/x86/platform/efi/efi_64.c
index 290d397e1dd9..35aecb6042fb 100644
--- a/arch/x86/platform/efi/efi_64.c
+++ b/arch/x86/platform/efi/efi_64.c
@@ -79,7 +79,7 @@ static void __init early_code_mapping_set_exec(int executable)
79 } 79 }
80} 80}
81 81
82void __init efi_call_phys_prelog(void) 82void __init efi_call_phys_prolog(void)
83{ 83{
84 unsigned long vaddress; 84 unsigned long vaddress;
85 int pgd; 85 int pgd;
@@ -139,7 +139,7 @@ void efi_sync_low_kernel_mappings(void)
139 sizeof(pgd_t) * num_pgds); 139 sizeof(pgd_t) * num_pgds);
140} 140}
141 141
142int efi_setup_page_tables(unsigned long pa_memmap, unsigned num_pages) 142int __init efi_setup_page_tables(unsigned long pa_memmap, unsigned num_pages)
143{ 143{
144 unsigned long text; 144 unsigned long text;
145 struct page *page; 145 struct page *page;
@@ -192,7 +192,7 @@ int efi_setup_page_tables(unsigned long pa_memmap, unsigned num_pages)
192 return 0; 192 return 0;
193} 193}
194 194
195void efi_cleanup_page_tables(unsigned long pa_memmap, unsigned num_pages) 195void __init efi_cleanup_page_tables(unsigned long pa_memmap, unsigned num_pages)
196{ 196{
197 pgd_t *pgd = (pgd_t *)__va(real_mode_header->trampoline_pgd); 197 pgd_t *pgd = (pgd_t *)__va(real_mode_header->trampoline_pgd);
198 198
diff --git a/arch/x86/platform/efi/efi_stub_32.S b/arch/x86/platform/efi/efi_stub_32.S
index fbe66e626c09..040192b50d02 100644
--- a/arch/x86/platform/efi/efi_stub_32.S
+++ b/arch/x86/platform/efi/efi_stub_32.S
@@ -27,13 +27,13 @@ ENTRY(efi_call_phys)
27 * set to 0x0010, DS and SS have been set to 0x0018. In EFI, I found 27 * set to 0x0010, DS and SS have been set to 0x0018. In EFI, I found
28 * the values of these registers are the same. And, the corresponding 28 * the values of these registers are the same. And, the corresponding
29 * GDT entries are identical. So I will do nothing about segment reg 29 * GDT entries are identical. So I will do nothing about segment reg
30 * and GDT, but change GDT base register in prelog and epilog. 30 * and GDT, but change GDT base register in prolog and epilog.
31 */ 31 */
32 32
33 /* 33 /*
34 * 1. Now I am running with EIP = <physical address> + PAGE_OFFSET. 34 * 1. Now I am running with EIP = <physical address> + PAGE_OFFSET.
35 * But to make it smoothly switch from virtual mode to flat mode. 35 * But to make it smoothly switch from virtual mode to flat mode.
36 * The mapping of lower virtual memory has been created in prelog and 36 * The mapping of lower virtual memory has been created in prolog and
37 * epilog. 37 * epilog.
38 */ 38 */
39 movl $1f, %edx 39 movl $1f, %edx
diff --git a/arch/x86/platform/intel-mid/intel_mid_weak_decls.h b/arch/x86/platform/intel-mid/intel_mid_weak_decls.h
index 46aa25c8ce06..3c1c3866d82b 100644
--- a/arch/x86/platform/intel-mid/intel_mid_weak_decls.h
+++ b/arch/x86/platform/intel-mid/intel_mid_weak_decls.h
@@ -10,10 +10,9 @@
10 */ 10 */
11 11
12 12
13/* __attribute__((weak)) makes these declarations overridable */
14/* For every CPU addition a new get_<cpuname>_ops interface needs 13/* For every CPU addition a new get_<cpuname>_ops interface needs
15 * to be added. 14 * to be added.
16 */ 15 */
17extern void *get_penwell_ops(void) __attribute__((weak)); 16extern void *get_penwell_ops(void);
18extern void *get_cloverview_ops(void) __attribute__((weak)); 17extern void *get_cloverview_ops(void);
19extern void *get_tangier_ops(void) __attribute__((weak)); 18extern void *get_tangier_ops(void);
diff --git a/arch/x86/platform/intel-mid/sfi.c b/arch/x86/platform/intel-mid/sfi.c
index 3c53a90fdb18..c14ad34776c4 100644
--- a/arch/x86/platform/intel-mid/sfi.c
+++ b/arch/x86/platform/intel-mid/sfi.c
@@ -106,6 +106,7 @@ int __init sfi_parse_mtmr(struct sfi_table_header *table)
106 mp_irq.dstapic = MP_APIC_ALL; 106 mp_irq.dstapic = MP_APIC_ALL;
107 mp_irq.dstirq = pentry->irq; 107 mp_irq.dstirq = pentry->irq;
108 mp_save_irq(&mp_irq); 108 mp_save_irq(&mp_irq);
109 mp_map_gsi_to_irq(pentry->irq, IOAPIC_MAP_ALLOC);
109 } 110 }
110 111
111 return 0; 112 return 0;
@@ -176,6 +177,7 @@ int __init sfi_parse_mrtc(struct sfi_table_header *table)
176 mp_irq.dstapic = MP_APIC_ALL; 177 mp_irq.dstapic = MP_APIC_ALL;
177 mp_irq.dstirq = pentry->irq; 178 mp_irq.dstirq = pentry->irq;
178 mp_save_irq(&mp_irq); 179 mp_save_irq(&mp_irq);
180 mp_map_gsi_to_irq(pentry->irq, IOAPIC_MAP_ALLOC);
179 } 181 }
180 return 0; 182 return 0;
181} 183}
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 1a3f0445432a..fac5e4f9607c 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1636,9 +1636,6 @@ asmlinkage __visible void __init xen_start_kernel(void)
1636 xen_raw_console_write("mapping kernel into physical memory\n"); 1636 xen_raw_console_write("mapping kernel into physical memory\n");
1637 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, xen_start_info->nr_pages); 1637 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, xen_start_info->nr_pages);
1638 1638
1639 /* Allocate and initialize top and mid mfn levels for p2m structure */
1640 xen_build_mfn_list_list();
1641
1642 /* keep using Xen gdt for now; no urgent need to change it */ 1639 /* keep using Xen gdt for now; no urgent need to change it */
1643 1640
1644#ifdef CONFIG_X86_32 1641#ifdef CONFIG_X86_32
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index f62af7647ec9..a8a1a3d08d4d 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -1217,10 +1217,13 @@ static void __init xen_pagetable_p2m_copy(void)
1217static void __init xen_pagetable_init(void) 1217static void __init xen_pagetable_init(void)
1218{ 1218{
1219 paging_init(); 1219 paging_init();
1220 xen_setup_shared_info();
1221#ifdef CONFIG_X86_64 1220#ifdef CONFIG_X86_64
1222 xen_pagetable_p2m_copy(); 1221 xen_pagetable_p2m_copy();
1223#endif 1222#endif
1223 /* Allocate and initialize top and mid mfn levels for p2m structure */
1224 xen_build_mfn_list_list();
1225
1226 xen_setup_shared_info();
1224 xen_post_allocator_init(); 1227 xen_post_allocator_init();
1225} 1228}
1226static void xen_write_cr2(unsigned long cr2) 1229static void xen_write_cr2(unsigned long cr2)
diff --git a/arch/x86/xen/p2m.c b/arch/x86/xen/p2m.c
index 9f5983b01ed9..b456b048eca9 100644
--- a/arch/x86/xen/p2m.c
+++ b/arch/x86/xen/p2m.c
@@ -163,6 +163,7 @@
163#include <linux/hash.h> 163#include <linux/hash.h>
164#include <linux/sched.h> 164#include <linux/sched.h>
165#include <linux/seq_file.h> 165#include <linux/seq_file.h>
166#include <linux/bootmem.h>
166 167
167#include <asm/cache.h> 168#include <asm/cache.h>
168#include <asm/setup.h> 169#include <asm/setup.h>
@@ -181,21 +182,20 @@ static void __init m2p_override_init(void);
181 182
182unsigned long xen_max_p2m_pfn __read_mostly; 183unsigned long xen_max_p2m_pfn __read_mostly;
183 184
185static unsigned long *p2m_mid_missing_mfn;
186static unsigned long *p2m_top_mfn;
187static unsigned long **p2m_top_mfn_p;
188
184/* Placeholders for holes in the address space */ 189/* Placeholders for holes in the address space */
185static RESERVE_BRK_ARRAY(unsigned long, p2m_missing, P2M_PER_PAGE); 190static RESERVE_BRK_ARRAY(unsigned long, p2m_missing, P2M_PER_PAGE);
186static RESERVE_BRK_ARRAY(unsigned long *, p2m_mid_missing, P2M_MID_PER_PAGE); 191static RESERVE_BRK_ARRAY(unsigned long *, p2m_mid_missing, P2M_MID_PER_PAGE);
187static RESERVE_BRK_ARRAY(unsigned long, p2m_mid_missing_mfn, P2M_MID_PER_PAGE);
188 192
189static RESERVE_BRK_ARRAY(unsigned long **, p2m_top, P2M_TOP_PER_PAGE); 193static RESERVE_BRK_ARRAY(unsigned long **, p2m_top, P2M_TOP_PER_PAGE);
190static RESERVE_BRK_ARRAY(unsigned long, p2m_top_mfn, P2M_TOP_PER_PAGE);
191static RESERVE_BRK_ARRAY(unsigned long *, p2m_top_mfn_p, P2M_TOP_PER_PAGE);
192 194
193static RESERVE_BRK_ARRAY(unsigned long, p2m_identity, P2M_PER_PAGE); 195static RESERVE_BRK_ARRAY(unsigned long, p2m_identity, P2M_PER_PAGE);
194static RESERVE_BRK_ARRAY(unsigned long *, p2m_mid_identity, P2M_MID_PER_PAGE); 196static RESERVE_BRK_ARRAY(unsigned long *, p2m_mid_identity, P2M_MID_PER_PAGE);
195static RESERVE_BRK_ARRAY(unsigned long, p2m_mid_identity_mfn, P2M_MID_PER_PAGE);
196 197
197RESERVE_BRK(p2m_mid, PAGE_SIZE * (MAX_DOMAIN_PAGES / (P2M_PER_PAGE * P2M_MID_PER_PAGE))); 198RESERVE_BRK(p2m_mid, PAGE_SIZE * (MAX_DOMAIN_PAGES / (P2M_PER_PAGE * P2M_MID_PER_PAGE)));
198RESERVE_BRK(p2m_mid_mfn, PAGE_SIZE * (MAX_DOMAIN_PAGES / (P2M_PER_PAGE * P2M_MID_PER_PAGE)));
199 199
200/* For each I/O range remapped we may lose up to two leaf pages for the boundary 200/* For each I/O range remapped we may lose up to two leaf pages for the boundary
201 * violations and three mid pages to cover up to 3GB. With 201 * violations and three mid pages to cover up to 3GB. With
@@ -272,11 +272,11 @@ static void p2m_init(unsigned long *p2m)
272 * Build the parallel p2m_top_mfn and p2m_mid_mfn structures 272 * Build the parallel p2m_top_mfn and p2m_mid_mfn structures
273 * 273 *
274 * This is called both at boot time, and after resuming from suspend: 274 * This is called both at boot time, and after resuming from suspend:
275 * - At boot time we're called very early, and must use extend_brk() 275 * - At boot time we're called rather early, and must use alloc_bootmem*()
276 * to allocate memory. 276 * to allocate memory.
277 * 277 *
278 * - After resume we're called from within stop_machine, but the mfn 278 * - After resume we're called from within stop_machine, but the mfn
279 * tree should alreay be completely allocated. 279 * tree should already be completely allocated.
280 */ 280 */
281void __ref xen_build_mfn_list_list(void) 281void __ref xen_build_mfn_list_list(void)
282{ 282{
@@ -287,20 +287,17 @@ void __ref xen_build_mfn_list_list(void)
287 287
288 /* Pre-initialize p2m_top_mfn to be completely missing */ 288 /* Pre-initialize p2m_top_mfn to be completely missing */
289 if (p2m_top_mfn == NULL) { 289 if (p2m_top_mfn == NULL) {
290 p2m_mid_missing_mfn = extend_brk(PAGE_SIZE, PAGE_SIZE); 290 p2m_mid_missing_mfn = alloc_bootmem_align(PAGE_SIZE, PAGE_SIZE);
291 p2m_mid_mfn_init(p2m_mid_missing_mfn, p2m_missing); 291 p2m_mid_mfn_init(p2m_mid_missing_mfn, p2m_missing);
292 p2m_mid_identity_mfn = extend_brk(PAGE_SIZE, PAGE_SIZE);
293 p2m_mid_mfn_init(p2m_mid_identity_mfn, p2m_identity);
294 292
295 p2m_top_mfn_p = extend_brk(PAGE_SIZE, PAGE_SIZE); 293 p2m_top_mfn_p = alloc_bootmem_align(PAGE_SIZE, PAGE_SIZE);
296 p2m_top_mfn_p_init(p2m_top_mfn_p); 294 p2m_top_mfn_p_init(p2m_top_mfn_p);
297 295
298 p2m_top_mfn = extend_brk(PAGE_SIZE, PAGE_SIZE); 296 p2m_top_mfn = alloc_bootmem_align(PAGE_SIZE, PAGE_SIZE);
299 p2m_top_mfn_init(p2m_top_mfn); 297 p2m_top_mfn_init(p2m_top_mfn);
300 } else { 298 } else {
301 /* Reinitialise, mfn's all change after migration */ 299 /* Reinitialise, mfn's all change after migration */
302 p2m_mid_mfn_init(p2m_mid_missing_mfn, p2m_missing); 300 p2m_mid_mfn_init(p2m_mid_missing_mfn, p2m_missing);
303 p2m_mid_mfn_init(p2m_mid_identity_mfn, p2m_identity);
304 } 301 }
305 302
306 for (pfn = 0; pfn < xen_max_p2m_pfn; pfn += P2M_PER_PAGE) { 303 for (pfn = 0; pfn < xen_max_p2m_pfn; pfn += P2M_PER_PAGE) {
@@ -328,10 +325,9 @@ void __ref xen_build_mfn_list_list(void)
328 /* 325 /*
329 * XXX boot-time only! We should never find 326 * XXX boot-time only! We should never find
330 * missing parts of the mfn tree after 327 * missing parts of the mfn tree after
331 * runtime. extend_brk() will BUG if we call 328 * runtime.
332 * it too late.
333 */ 329 */
334 mid_mfn_p = extend_brk(PAGE_SIZE, PAGE_SIZE); 330 mid_mfn_p = alloc_bootmem_align(PAGE_SIZE, PAGE_SIZE);
335 p2m_mid_mfn_init(mid_mfn_p, p2m_missing); 331 p2m_mid_mfn_init(mid_mfn_p, p2m_missing);
336 332
337 p2m_top_mfn_p[topidx] = mid_mfn_p; 333 p2m_top_mfn_p[topidx] = mid_mfn_p;
@@ -415,7 +411,6 @@ void __init xen_build_dynamic_phys_to_machine(void)
415 m2p_override_init(); 411 m2p_override_init();
416} 412}
417#ifdef CONFIG_X86_64 413#ifdef CONFIG_X86_64
418#include <linux/bootmem.h>
419unsigned long __init xen_revector_p2m_tree(void) 414unsigned long __init xen_revector_p2m_tree(void)
420{ 415{
421 unsigned long va_start; 416 unsigned long va_start;
@@ -477,7 +472,6 @@ unsigned long __init xen_revector_p2m_tree(void)
477 472
478 copy_page(new, mid_p); 473 copy_page(new, mid_p);
479 p2m_top[topidx][mididx] = &mfn_list[pfn_free]; 474 p2m_top[topidx][mididx] = &mfn_list[pfn_free];
480 p2m_top_mfn_p[topidx][mididx] = virt_to_mfn(&mfn_list[pfn_free]);
481 475
482 pfn_free += P2M_PER_PAGE; 476 pfn_free += P2M_PER_PAGE;
483 477
@@ -538,12 +532,13 @@ static bool alloc_p2m(unsigned long pfn)
538 unsigned topidx, mididx; 532 unsigned topidx, mididx;
539 unsigned long ***top_p, **mid; 533 unsigned long ***top_p, **mid;
540 unsigned long *top_mfn_p, *mid_mfn; 534 unsigned long *top_mfn_p, *mid_mfn;
535 unsigned long *p2m_orig;
541 536
542 topidx = p2m_top_index(pfn); 537 topidx = p2m_top_index(pfn);
543 mididx = p2m_mid_index(pfn); 538 mididx = p2m_mid_index(pfn);
544 539
545 top_p = &p2m_top[topidx]; 540 top_p = &p2m_top[topidx];
546 mid = *top_p; 541 mid = ACCESS_ONCE(*top_p);
547 542
548 if (mid == p2m_mid_missing) { 543 if (mid == p2m_mid_missing) {
549 /* Mid level is missing, allocate a new one */ 544 /* Mid level is missing, allocate a new one */
@@ -558,7 +553,7 @@ static bool alloc_p2m(unsigned long pfn)
558 } 553 }
559 554
560 top_mfn_p = &p2m_top_mfn[topidx]; 555 top_mfn_p = &p2m_top_mfn[topidx];
561 mid_mfn = p2m_top_mfn_p[topidx]; 556 mid_mfn = ACCESS_ONCE(p2m_top_mfn_p[topidx]);
562 557
563 BUG_ON(virt_to_mfn(mid_mfn) != *top_mfn_p); 558 BUG_ON(virt_to_mfn(mid_mfn) != *top_mfn_p);
564 559
@@ -566,6 +561,7 @@ static bool alloc_p2m(unsigned long pfn)
566 /* Separately check the mid mfn level */ 561 /* Separately check the mid mfn level */
567 unsigned long missing_mfn; 562 unsigned long missing_mfn;
568 unsigned long mid_mfn_mfn; 563 unsigned long mid_mfn_mfn;
564 unsigned long old_mfn;
569 565
570 mid_mfn = alloc_p2m_page(); 566 mid_mfn = alloc_p2m_page();
571 if (!mid_mfn) 567 if (!mid_mfn)
@@ -575,17 +571,19 @@ static bool alloc_p2m(unsigned long pfn)
575 571
576 missing_mfn = virt_to_mfn(p2m_mid_missing_mfn); 572 missing_mfn = virt_to_mfn(p2m_mid_missing_mfn);
577 mid_mfn_mfn = virt_to_mfn(mid_mfn); 573 mid_mfn_mfn = virt_to_mfn(mid_mfn);
578 if (cmpxchg(top_mfn_p, missing_mfn, mid_mfn_mfn) != missing_mfn) 574 old_mfn = cmpxchg(top_mfn_p, missing_mfn, mid_mfn_mfn);
575 if (old_mfn != missing_mfn) {
579 free_p2m_page(mid_mfn); 576 free_p2m_page(mid_mfn);
580 else 577 mid_mfn = mfn_to_virt(old_mfn);
578 } else {
581 p2m_top_mfn_p[topidx] = mid_mfn; 579 p2m_top_mfn_p[topidx] = mid_mfn;
580 }
582 } 581 }
583 582
584 if (p2m_top[topidx][mididx] == p2m_identity || 583 p2m_orig = ACCESS_ONCE(p2m_top[topidx][mididx]);
585 p2m_top[topidx][mididx] == p2m_missing) { 584 if (p2m_orig == p2m_identity || p2m_orig == p2m_missing) {
586 /* p2m leaf page is missing */ 585 /* p2m leaf page is missing */
587 unsigned long *p2m; 586 unsigned long *p2m;
588 unsigned long *p2m_orig = p2m_top[topidx][mididx];
589 587
590 p2m = alloc_p2m_page(); 588 p2m = alloc_p2m_page();
591 if (!p2m) 589 if (!p2m)
@@ -606,7 +604,6 @@ static bool __init early_alloc_p2m(unsigned long pfn, bool check_boundary)
606{ 604{
607 unsigned topidx, mididx, idx; 605 unsigned topidx, mididx, idx;
608 unsigned long *p2m; 606 unsigned long *p2m;
609 unsigned long *mid_mfn_p;
610 607
611 topidx = p2m_top_index(pfn); 608 topidx = p2m_top_index(pfn);
612 mididx = p2m_mid_index(pfn); 609 mididx = p2m_mid_index(pfn);
@@ -633,43 +630,21 @@ static bool __init early_alloc_p2m(unsigned long pfn, bool check_boundary)
633 630
634 p2m_top[topidx][mididx] = p2m; 631 p2m_top[topidx][mididx] = p2m;
635 632
636 /* For save/restore we need to MFN of the P2M saved */
637
638 mid_mfn_p = p2m_top_mfn_p[topidx];
639 WARN(mid_mfn_p[mididx] != virt_to_mfn(p2m_missing),
640 "P2M_TOP_P[%d][%d] != MFN of p2m_missing!\n",
641 topidx, mididx);
642 mid_mfn_p[mididx] = virt_to_mfn(p2m);
643
644 return true; 633 return true;
645} 634}
646 635
647static bool __init early_alloc_p2m_middle(unsigned long pfn) 636static bool __init early_alloc_p2m_middle(unsigned long pfn)
648{ 637{
649 unsigned topidx = p2m_top_index(pfn); 638 unsigned topidx = p2m_top_index(pfn);
650 unsigned long *mid_mfn_p;
651 unsigned long **mid; 639 unsigned long **mid;
652 640
653 mid = p2m_top[topidx]; 641 mid = p2m_top[topidx];
654 mid_mfn_p = p2m_top_mfn_p[topidx];
655 if (mid == p2m_mid_missing) { 642 if (mid == p2m_mid_missing) {
656 mid = extend_brk(PAGE_SIZE, PAGE_SIZE); 643 mid = extend_brk(PAGE_SIZE, PAGE_SIZE);
657 644
658 p2m_mid_init(mid, p2m_missing); 645 p2m_mid_init(mid, p2m_missing);
659 646
660 p2m_top[topidx] = mid; 647 p2m_top[topidx] = mid;
661
662 BUG_ON(mid_mfn_p != p2m_mid_missing_mfn);
663 }
664 /* And the save/restore P2M tables.. */
665 if (mid_mfn_p == p2m_mid_missing_mfn) {
666 mid_mfn_p = extend_brk(PAGE_SIZE, PAGE_SIZE);
667 p2m_mid_mfn_init(mid_mfn_p, p2m_missing);
668
669 p2m_top_mfn_p[topidx] = mid_mfn_p;
670 p2m_top_mfn[topidx] = virt_to_mfn(mid_mfn_p);
671 /* Note: we don't set mid_mfn_p[midix] here,
672 * look in early_alloc_p2m() */
673 } 648 }
674 return true; 649 return true;
675} 650}
@@ -680,14 +655,13 @@ static bool __init early_alloc_p2m_middle(unsigned long pfn)
680 * replace the P2M leaf with a p2m_missing or p2m_identity. 655 * replace the P2M leaf with a p2m_missing or p2m_identity.
681 * Stick the old page in the new P2M tree location. 656 * Stick the old page in the new P2M tree location.
682 */ 657 */
683bool __init early_can_reuse_p2m_middle(unsigned long set_pfn, unsigned long set_mfn) 658static bool __init early_can_reuse_p2m_middle(unsigned long set_pfn)
684{ 659{
685 unsigned topidx; 660 unsigned topidx;
686 unsigned mididx; 661 unsigned mididx;
687 unsigned ident_pfns; 662 unsigned ident_pfns;
688 unsigned inv_pfns; 663 unsigned inv_pfns;
689 unsigned long *p2m; 664 unsigned long *p2m;
690 unsigned long *mid_mfn_p;
691 unsigned idx; 665 unsigned idx;
692 unsigned long pfn; 666 unsigned long pfn;
693 667
@@ -733,11 +707,6 @@ bool __init early_can_reuse_p2m_middle(unsigned long set_pfn, unsigned long set_
733found: 707found:
734 /* Found one, replace old with p2m_identity or p2m_missing */ 708 /* Found one, replace old with p2m_identity or p2m_missing */
735 p2m_top[topidx][mididx] = (ident_pfns ? p2m_identity : p2m_missing); 709 p2m_top[topidx][mididx] = (ident_pfns ? p2m_identity : p2m_missing);
736 /* And the other for save/restore.. */
737 mid_mfn_p = p2m_top_mfn_p[topidx];
738 /* NOTE: Even if it is a p2m_identity it should still be point to
739 * a page filled with INVALID_P2M_ENTRY entries. */
740 mid_mfn_p[mididx] = virt_to_mfn(p2m_missing);
741 710
742 /* Reset where we want to stick the old page in. */ 711 /* Reset where we want to stick the old page in. */
743 topidx = p2m_top_index(set_pfn); 712 topidx = p2m_top_index(set_pfn);
@@ -752,8 +721,6 @@ found:
752 721
753 p2m_init(p2m); 722 p2m_init(p2m);
754 p2m_top[topidx][mididx] = p2m; 723 p2m_top[topidx][mididx] = p2m;
755 mid_mfn_p = p2m_top_mfn_p[topidx];
756 mid_mfn_p[mididx] = virt_to_mfn(p2m);
757 724
758 return true; 725 return true;
759} 726}
@@ -763,7 +730,7 @@ bool __init early_set_phys_to_machine(unsigned long pfn, unsigned long mfn)
763 if (!early_alloc_p2m_middle(pfn)) 730 if (!early_alloc_p2m_middle(pfn))
764 return false; 731 return false;
765 732
766 if (early_can_reuse_p2m_middle(pfn, mfn)) 733 if (early_can_reuse_p2m_middle(pfn))
767 return __set_phys_to_machine(pfn, mfn); 734 return __set_phys_to_machine(pfn, mfn);
768 735
769 if (!early_alloc_p2m(pfn, false /* boundary crossover OK!*/)) 736 if (!early_alloc_p2m(pfn, false /* boundary crossover OK!*/))
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
index af7216128d93..29834b3fd87f 100644
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@ -595,6 +595,7 @@ char * __init xen_memory_setup(void)
595 rc = 0; 595 rc = 0;
596 } 596 }
597 BUG_ON(rc); 597 BUG_ON(rc);
598 BUG_ON(memmap.nr_entries == 0);
598 599
599 /* 600 /*
600 * Xen won't allow a 1:1 mapping to be created to UNUSABLE 601 * Xen won't allow a 1:1 mapping to be created to UNUSABLE
diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c
index a1d430b112b3..f473d268d387 100644
--- a/arch/x86/xen/time.c
+++ b/arch/x86/xen/time.c
@@ -158,7 +158,7 @@ cycle_t xen_clocksource_read(void)
158 cycle_t ret; 158 cycle_t ret;
159 159
160 preempt_disable_notrace(); 160 preempt_disable_notrace();
161 src = this_cpu_ptr(&xen_vcpu->time); 161 src = &__this_cpu_read(xen_vcpu)->time;
162 ret = pvclock_clocksource_read(src); 162 ret = pvclock_clocksource_read(src);
163 preempt_enable_notrace(); 163 preempt_enable_notrace();
164 return ret; 164 return ret;