diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-orion5x/addr-map.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/common.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/dns323-setup.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/include/mach/orion5x.h | 8 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/irq.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/mpp.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/pci.c | 4 |
7 files changed, 24 insertions, 19 deletions
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c index eaac83d1df6f..d309f53b7a0c 100644 --- a/arch/arm/mach-orion5x/addr-map.c +++ b/arch/arm/mach-orion5x/addr-map.c | |||
@@ -79,7 +79,7 @@ static int __init cpu_win_can_remap(const struct orion_addr_map_cfg *cfg, | |||
79 | static struct orion_addr_map_cfg addr_map_cfg __initdata = { | 79 | static struct orion_addr_map_cfg addr_map_cfg __initdata = { |
80 | .num_wins = 8, | 80 | .num_wins = 8, |
81 | .cpu_win_can_remap = cpu_win_can_remap, | 81 | .cpu_win_can_remap = cpu_win_can_remap, |
82 | .bridge_virt_base = ORION5X_BRIDGE_VIRT_BASE, | 82 | .bridge_virt_base = (unsigned long) ORION5X_BRIDGE_VIRT_BASE, |
83 | }; | 83 | }; |
84 | 84 | ||
85 | static const struct __initdata orion_addr_map_info addr_map_info[] = { | 85 | static const struct __initdata orion_addr_map_info addr_map_info[] = { |
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 410291c67666..a890cb0eb83d 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c | |||
@@ -42,22 +42,22 @@ | |||
42 | ****************************************************************************/ | 42 | ****************************************************************************/ |
43 | static struct map_desc orion5x_io_desc[] __initdata = { | 43 | static struct map_desc orion5x_io_desc[] __initdata = { |
44 | { | 44 | { |
45 | .virtual = ORION5X_REGS_VIRT_BASE, | 45 | .virtual = (unsigned long) ORION5X_REGS_VIRT_BASE, |
46 | .pfn = __phys_to_pfn(ORION5X_REGS_PHYS_BASE), | 46 | .pfn = __phys_to_pfn(ORION5X_REGS_PHYS_BASE), |
47 | .length = ORION5X_REGS_SIZE, | 47 | .length = ORION5X_REGS_SIZE, |
48 | .type = MT_DEVICE, | 48 | .type = MT_DEVICE, |
49 | }, { | 49 | }, { |
50 | .virtual = ORION5X_PCIE_IO_VIRT_BASE, | 50 | .virtual = (unsigned long) ORION5X_PCIE_IO_VIRT_BASE, |
51 | .pfn = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE), | 51 | .pfn = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE), |
52 | .length = ORION5X_PCIE_IO_SIZE, | 52 | .length = ORION5X_PCIE_IO_SIZE, |
53 | .type = MT_DEVICE, | 53 | .type = MT_DEVICE, |
54 | }, { | 54 | }, { |
55 | .virtual = ORION5X_PCI_IO_VIRT_BASE, | 55 | .virtual = (unsigned long) ORION5X_PCI_IO_VIRT_BASE, |
56 | .pfn = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE), | 56 | .pfn = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE), |
57 | .length = ORION5X_PCI_IO_SIZE, | 57 | .length = ORION5X_PCI_IO_SIZE, |
58 | .type = MT_DEVICE, | 58 | .type = MT_DEVICE, |
59 | }, { | 59 | }, { |
60 | .virtual = ORION5X_PCIE_WA_VIRT_BASE, | 60 | .virtual = (unsigned long) ORION5X_PCIE_WA_VIRT_BASE, |
61 | .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE), | 61 | .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE), |
62 | .length = ORION5X_PCIE_WA_SIZE, | 62 | .length = ORION5X_PCIE_WA_SIZE, |
63 | .type = MT_DEVICE, | 63 | .type = MT_DEVICE, |
@@ -156,7 +156,8 @@ void __init orion5x_spi_init() | |||
156 | ****************************************************************************/ | 156 | ****************************************************************************/ |
157 | void __init orion5x_uart0_init(void) | 157 | void __init orion5x_uart0_init(void) |
158 | { | 158 | { |
159 | orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE, | 159 | orion_uart0_init((unsigned long) UART0_VIRT_BASE, |
160 | UART0_PHYS_BASE, | ||
160 | IRQ_ORION5X_UART0, tclk); | 161 | IRQ_ORION5X_UART0, tclk); |
161 | } | 162 | } |
162 | 163 | ||
@@ -165,7 +166,8 @@ void __init orion5x_uart0_init(void) | |||
165 | ****************************************************************************/ | 166 | ****************************************************************************/ |
166 | void __init orion5x_uart1_init(void) | 167 | void __init orion5x_uart1_init(void) |
167 | { | 168 | { |
168 | orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE, | 169 | orion_uart1_init((unsigned long) UART1_VIRT_BASE, |
170 | UART1_PHYS_BASE, | ||
169 | IRQ_ORION5X_UART1, tclk); | 171 | IRQ_ORION5X_UART1, tclk); |
170 | } | 172 | } |
171 | 173 | ||
@@ -203,7 +205,7 @@ void __init orion5x_wdt_init(void) | |||
203 | ****************************************************************************/ | 205 | ****************************************************************************/ |
204 | void __init orion5x_init_early(void) | 206 | void __init orion5x_init_early(void) |
205 | { | 207 | { |
206 | orion_time_set_base(TIMER_VIRT_BASE); | 208 | orion_time_set_base((unsigned long) TIMER_VIRT_BASE); |
207 | } | 209 | } |
208 | 210 | ||
209 | int orion5x_tclk; | 211 | int orion5x_tclk; |
@@ -224,7 +226,8 @@ static void __init orion5x_timer_init(void) | |||
224 | { | 226 | { |
225 | orion5x_tclk = orion5x_find_tclk(); | 227 | orion5x_tclk = orion5x_find_tclk(); |
226 | 228 | ||
227 | orion_time_init(ORION5X_BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR, | 229 | orion_time_init((unsigned long) ORION5X_BRIDGE_VIRT_BASE, |
230 | BRIDGE_INT_TIMER1_CLR, | ||
228 | IRQ_ORION5X_BRIDGE, orion5x_tclk); | 231 | IRQ_ORION5X_BRIDGE, orion5x_tclk); |
229 | } | 232 | } |
230 | 233 | ||
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c index d470864b4e42..3a5e6fc197f7 100644 --- a/arch/arm/mach-orion5x/dns323-setup.c +++ b/arch/arm/mach-orion5x/dns323-setup.c | |||
@@ -700,7 +700,7 @@ static void __init dns323_init(void) | |||
700 | * Note: AFAIK, rev B1 needs the same treatement but I'll let | 700 | * Note: AFAIK, rev B1 needs the same treatement but I'll let |
701 | * somebody else test it. | 701 | * somebody else test it. |
702 | */ | 702 | */ |
703 | writel(0x5, ORION5X_SATA_VIRT_BASE | 0x2c); | 703 | writel(0x5, ORION5X_SATA_VIRT_BASE + 0x2c); |
704 | break; | 704 | break; |
705 | } | 705 | } |
706 | } | 706 | } |
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h index 87bd378b8203..6fd38ab5e267 100644 --- a/arch/arm/mach-orion5x/include/mach/orion5x.h +++ b/arch/arm/mach-orion5x/include/mach/orion5x.h | |||
@@ -37,16 +37,16 @@ | |||
37 | * fe000000 f0000000 16M PCIe WA space (Orion-1/Orion-NAS only) | 37 | * fe000000 f0000000 16M PCIe WA space (Orion-1/Orion-NAS only) |
38 | ****************************************************************************/ | 38 | ****************************************************************************/ |
39 | #define ORION5X_REGS_PHYS_BASE 0xf1000000 | 39 | #define ORION5X_REGS_PHYS_BASE 0xf1000000 |
40 | #define ORION5X_REGS_VIRT_BASE 0xfdd00000 | 40 | #define ORION5X_REGS_VIRT_BASE IOMEM(0xfdd00000) |
41 | #define ORION5X_REGS_SIZE SZ_1M | 41 | #define ORION5X_REGS_SIZE SZ_1M |
42 | 42 | ||
43 | #define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000 | 43 | #define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000 |
44 | #define ORION5X_PCIE_IO_VIRT_BASE 0xfde00000 | 44 | #define ORION5X_PCIE_IO_VIRT_BASE IOMEM(0xfde00000) |
45 | #define ORION5X_PCIE_IO_BUS_BASE 0x00000000 | 45 | #define ORION5X_PCIE_IO_BUS_BASE 0x00000000 |
46 | #define ORION5X_PCIE_IO_SIZE SZ_1M | 46 | #define ORION5X_PCIE_IO_SIZE SZ_1M |
47 | 47 | ||
48 | #define ORION5X_PCI_IO_PHYS_BASE 0xf2100000 | 48 | #define ORION5X_PCI_IO_PHYS_BASE 0xf2100000 |
49 | #define ORION5X_PCI_IO_VIRT_BASE 0xfdf00000 | 49 | #define ORION5X_PCI_IO_VIRT_BASE IOMEM(0xfdf00000) |
50 | #define ORION5X_PCI_IO_BUS_BASE 0x00100000 | 50 | #define ORION5X_PCI_IO_BUS_BASE 0x00100000 |
51 | #define ORION5X_PCI_IO_SIZE SZ_1M | 51 | #define ORION5X_PCI_IO_SIZE SZ_1M |
52 | 52 | ||
@@ -55,7 +55,7 @@ | |||
55 | 55 | ||
56 | /* Relevant only for Orion-1/Orion-NAS */ | 56 | /* Relevant only for Orion-1/Orion-NAS */ |
57 | #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000 | 57 | #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000 |
58 | #define ORION5X_PCIE_WA_VIRT_BASE 0xfe000000 | 58 | #define ORION5X_PCIE_WA_VIRT_BASE IOMEM(0xfe000000) |
59 | #define ORION5X_PCIE_WA_SIZE SZ_16M | 59 | #define ORION5X_PCIE_WA_SIZE SZ_16M |
60 | 60 | ||
61 | #define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000 | 61 | #define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000 |
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c index 17da7091d310..bf9ff4f00818 100644 --- a/arch/arm/mach-orion5x/irq.c +++ b/arch/arm/mach-orion5x/irq.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/gpio.h> | 12 | #include <linux/gpio.h> |
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/irq.h> | 14 | #include <linux/irq.h> |
15 | #include <linux/io.h> | ||
15 | #include <mach/bridge-regs.h> | 16 | #include <mach/bridge-regs.h> |
16 | #include <plat/irq.h> | 17 | #include <plat/irq.h> |
17 | 18 | ||
@@ -24,11 +25,11 @@ static int __initdata gpio0_irqs[4] = { | |||
24 | 25 | ||
25 | void __init orion5x_init_irq(void) | 26 | void __init orion5x_init_irq(void) |
26 | { | 27 | { |
27 | orion_irq_init(0, (void __iomem *)MAIN_IRQ_MASK); | 28 | orion_irq_init(0, MAIN_IRQ_MASK); |
28 | 29 | ||
29 | /* | 30 | /* |
30 | * Initialize gpiolib for GPIOs 0-31. | 31 | * Initialize gpiolib for GPIOs 0-31. |
31 | */ | 32 | */ |
32 | orion_gpio_init(NULL, 0, 32, (void __iomem *)GPIO_VIRT_BASE, 0, | 33 | orion_gpio_init(NULL, 0, 32, GPIO_VIRT_BASE, 0, |
33 | IRQ_ORION5X_GPIO_START, gpio0_irqs); | 34 | IRQ_ORION5X_GPIO_START, gpio0_irqs); |
34 | } | 35 | } |
diff --git a/arch/arm/mach-orion5x/mpp.c b/arch/arm/mach-orion5x/mpp.c index 5b70026f478c..30f5ef6e2ec2 100644 --- a/arch/arm/mach-orion5x/mpp.c +++ b/arch/arm/mach-orion5x/mpp.c | |||
@@ -40,5 +40,6 @@ static unsigned int __init orion5x_variant(void) | |||
40 | void __init orion5x_mpp_conf(unsigned int *mpp_list) | 40 | void __init orion5x_mpp_conf(unsigned int *mpp_list) |
41 | { | 41 | { |
42 | orion_mpp_conf(mpp_list, orion5x_variant(), | 42 | orion_mpp_conf(mpp_list, orion5x_variant(), |
43 | MPP_MAX, ORION5X_DEV_BUS_VIRT_BASE); | 43 | MPP_MAX, |
44 | (unsigned long) ORION5X_DEV_BUS_VIRT_BASE); | ||
44 | } | 45 | } |
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c index b36f928d017c..b0822a864e0f 100644 --- a/arch/arm/mach-orion5x/pci.c +++ b/arch/arm/mach-orion5x/pci.c | |||
@@ -38,7 +38,7 @@ | |||
38 | /***************************************************************************** | 38 | /***************************************************************************** |
39 | * PCIe controller | 39 | * PCIe controller |
40 | ****************************************************************************/ | 40 | ****************************************************************************/ |
41 | #define PCIE_BASE ((void __iomem *)ORION5X_PCIE_VIRT_BASE) | 41 | #define PCIE_BASE (ORION5X_PCIE_VIRT_BASE) |
42 | 42 | ||
43 | void __init orion5x_pcie_id(u32 *dev, u32 *rev) | 43 | void __init orion5x_pcie_id(u32 *dev, u32 *rev) |
44 | { | 44 | { |
@@ -111,7 +111,7 @@ static int pcie_rd_conf_wa(struct pci_bus *bus, u32 devfn, | |||
111 | return PCIBIOS_DEVICE_NOT_FOUND; | 111 | return PCIBIOS_DEVICE_NOT_FOUND; |
112 | } | 112 | } |
113 | 113 | ||
114 | ret = orion_pcie_rd_conf_wa((void __iomem *)ORION5X_PCIE_WA_VIRT_BASE, | 114 | ret = orion_pcie_rd_conf_wa(ORION5X_PCIE_WA_VIRT_BASE, |
115 | bus, devfn, where, size, val); | 115 | bus, devfn, where, size, val); |
116 | 116 | ||
117 | return ret; | 117 | return ret; |