diff options
Diffstat (limited to 'arch')
136 files changed, 4690 insertions, 1027 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index db00376aca15..0d8fac3b0371 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -29,6 +29,10 @@ config GENERIC_TIME | |||
29 | bool | 29 | bool |
30 | default n | 30 | default n |
31 | 31 | ||
32 | config GENERIC_CLOCKEVENTS | ||
33 | bool | ||
34 | default n | ||
35 | |||
32 | config MMU | 36 | config MMU |
33 | bool | 37 | bool |
34 | default y | 38 | default y |
@@ -67,6 +71,14 @@ config GENERIC_HARDIRQS | |||
67 | bool | 71 | bool |
68 | default y | 72 | default y |
69 | 73 | ||
74 | config STACKTRACE_SUPPORT | ||
75 | bool | ||
76 | default y | ||
77 | |||
78 | config LOCKDEP_SUPPORT | ||
79 | bool | ||
80 | default y | ||
81 | |||
70 | config TRACE_IRQFLAGS_SUPPORT | 82 | config TRACE_IRQFLAGS_SUPPORT |
71 | bool | 83 | bool |
72 | default y | 84 | default y |
@@ -162,6 +174,8 @@ config ARCH_VERSATILE | |||
162 | select ARM_AMBA | 174 | select ARM_AMBA |
163 | select ARM_VIC | 175 | select ARM_VIC |
164 | select ICST307 | 176 | select ICST307 |
177 | select GENERIC_TIME | ||
178 | select GENERIC_CLOCKEVENTS | ||
165 | help | 179 | help |
166 | This enables support for ARM Ltd Versatile board. | 180 | This enables support for ARM Ltd Versatile board. |
167 | 181 | ||
@@ -263,6 +277,7 @@ config ARCH_IXP4XX | |||
263 | bool "IXP4xx-based" | 277 | bool "IXP4xx-based" |
264 | depends on MMU | 278 | depends on MMU |
265 | select GENERIC_TIME | 279 | select GENERIC_TIME |
280 | select GENERIC_CLOCKEVENTS | ||
266 | help | 281 | help |
267 | Support for Intel's IXP4XX (XScale) family of processors. | 282 | Support for Intel's IXP4XX (XScale) family of processors. |
268 | 283 | ||
@@ -364,6 +379,7 @@ config ARCH_LH7A40X | |||
364 | config ARCH_OMAP | 379 | config ARCH_OMAP |
365 | bool "TI OMAP" | 380 | bool "TI OMAP" |
366 | select GENERIC_GPIO | 381 | select GENERIC_GPIO |
382 | select GENERIC_TIME | ||
367 | help | 383 | help |
368 | Support for TI's OMAP platform (OMAP1 and OMAP2). | 384 | Support for TI's OMAP platform (OMAP1 and OMAP2). |
369 | 385 | ||
@@ -514,6 +530,8 @@ endmenu | |||
514 | 530 | ||
515 | menu "Kernel Features" | 531 | menu "Kernel Features" |
516 | 532 | ||
533 | source "kernel/time/Kconfig" | ||
534 | |||
517 | config SMP | 535 | config SMP |
518 | bool "Symmetric Multi-Processing (EXPERIMENTAL)" | 536 | bool "Symmetric Multi-Processing (EXPERIMENTAL)" |
519 | depends on EXPERIMENTAL && REALVIEW_MPCORE | 537 | depends on EXPERIMENTAL && REALVIEW_MPCORE |
@@ -573,6 +591,7 @@ config PREEMPT | |||
573 | 591 | ||
574 | config NO_IDLE_HZ | 592 | config NO_IDLE_HZ |
575 | bool "Dynamic tick timer" | 593 | bool "Dynamic tick timer" |
594 | depends on !GENERIC_CLOCKEVENTS | ||
576 | help | 595 | help |
577 | Select this option if you want to disable continuous timer ticks | 596 | Select this option if you want to disable continuous timer ticks |
578 | and have them programmed to occur as required. This option saves | 597 | and have them programmed to occur as required. This option saves |
@@ -670,6 +689,7 @@ config LEDS_TIMER | |||
670 | bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ | 689 | bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ |
671 | MACH_OMAP_H2 || MACH_OMAP_PERSEUS2 | 690 | MACH_OMAP_H2 || MACH_OMAP_PERSEUS2 |
672 | depends on LEDS | 691 | depends on LEDS |
692 | depends on !GENERIC_CLOCKEVENTS | ||
673 | default y if ARCH_EBSA110 | 693 | default y if ARCH_EBSA110 |
674 | help | 694 | help |
675 | If you say Y here, one of the system LEDs (the green one on the | 695 | If you say Y here, one of the system LEDs (the green one on the |
diff --git a/arch/arm/boot/compressed/head-at91rm9200.S b/arch/arm/boot/compressed/head-at91rm9200.S index d68b9acd826e..11782ccd93a1 100644 --- a/arch/arm/boot/compressed/head-at91rm9200.S +++ b/arch/arm/boot/compressed/head-at91rm9200.S | |||
@@ -61,6 +61,12 @@ | |||
61 | cmp r7, r3 | 61 | cmp r7, r3 |
62 | beq 99f | 62 | beq 99f |
63 | 63 | ||
64 | @ picotux 200 : 963 | ||
65 | mov r3, #(MACH_TYPE_PICOTUX2XX & 0xff) | ||
66 | orr r3, r3, #(MACH_TYPE_PICOTUX2XX & 0xff00) | ||
67 | cmp r7, r3 | ||
68 | beq 99f | ||
69 | |||
64 | @ Ajeco 1ARM : 1075 | 70 | @ Ajeco 1ARM : 1075 |
65 | mov r3, #(MACH_TYPE_ONEARM & 0xff) | 71 | mov r3, #(MACH_TYPE_ONEARM & 0xff) |
66 | orr r3, r3, #(MACH_TYPE_ONEARM & 0xff00) | 72 | orr r3, r3, #(MACH_TYPE_ONEARM & 0xff00) |
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index fe3f05901a23..798bbfccafb7 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c | |||
@@ -18,7 +18,6 @@ | |||
18 | #include <linux/init.h> | 18 | #include <linux/init.h> |
19 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
20 | #include <linux/delay.h> | 20 | #include <linux/delay.h> |
21 | #include <linux/ptrace.h> | ||
22 | #include <linux/errno.h> | 21 | #include <linux/errno.h> |
23 | #include <linux/ioport.h> | 22 | #include <linux/ioport.h> |
24 | #include <linux/platform_device.h> | 23 | #include <linux/platform_device.h> |
diff --git a/arch/arm/common/via82c505.c b/arch/arm/common/via82c505.c index ba2e62986a57..79a8206e62ac 100644 --- a/arch/arm/common/via82c505.c +++ b/arch/arm/common/via82c505.c | |||
@@ -1,6 +1,5 @@ | |||
1 | #include <linux/kernel.h> | 1 | #include <linux/kernel.h> |
2 | #include <linux/pci.h> | 2 | #include <linux/pci.h> |
3 | #include <linux/ptrace.h> | ||
4 | #include <linux/interrupt.h> | 3 | #include <linux/interrupt.h> |
5 | #include <linux/mm.h> | 4 | #include <linux/mm.h> |
6 | #include <linux/init.h> | 5 | #include <linux/init.h> |
diff --git a/arch/arm/configs/ixp4xx_defconfig b/arch/arm/configs/ixp4xx_defconfig index fabf74c51a88..db850a5689eb 100644 --- a/arch/arm/configs/ixp4xx_defconfig +++ b/arch/arm/configs/ixp4xx_defconfig | |||
@@ -117,11 +117,13 @@ CONFIG_ARCH_ADI_COYOTE=y | |||
117 | CONFIG_ARCH_IXDP425=y | 117 | CONFIG_ARCH_IXDP425=y |
118 | CONFIG_MACH_IXDPG425=y | 118 | CONFIG_MACH_IXDPG425=y |
119 | CONFIG_MACH_IXDP465=y | 119 | CONFIG_MACH_IXDP465=y |
120 | CONFIG_MACH_KIXRP435=y | ||
120 | CONFIG_ARCH_IXCDP1100=y | 121 | CONFIG_ARCH_IXCDP1100=y |
121 | CONFIG_ARCH_PRPMC1100=y | 122 | CONFIG_ARCH_PRPMC1100=y |
122 | CONFIG_MACH_NAS100D=y | 123 | CONFIG_MACH_NAS100D=y |
123 | CONFIG_ARCH_IXDP4XX=y | 124 | CONFIG_ARCH_IXDP4XX=y |
124 | CONFIG_CPU_IXP46X=y | 125 | CONFIG_CPU_IXP46X=y |
126 | CONFIG_CPU_IXP43X=y | ||
125 | # CONFIG_MACH_GTWX5715 is not set | 127 | # CONFIG_MACH_GTWX5715 is not set |
126 | 128 | ||
127 | # | 129 | # |
diff --git a/arch/arm/configs/picotux200_defconfig b/arch/arm/configs/picotux200_defconfig new file mode 100644 index 000000000000..339c48953a62 --- /dev/null +++ b/arch/arm/configs/picotux200_defconfig | |||
@@ -0,0 +1,1386 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.21-rc4 | ||
4 | # Wed Mar 28 16:19:50 2007 | ||
5 | # | ||
6 | CONFIG_ARM=y | ||
7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
8 | CONFIG_GENERIC_GPIO=y | ||
9 | # CONFIG_GENERIC_TIME is not set | ||
10 | CONFIG_MMU=y | ||
11 | # CONFIG_NO_IOPORT is not set | ||
12 | CONFIG_GENERIC_HARDIRQS=y | ||
13 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
14 | CONFIG_HARDIRQS_SW_RESEND=y | ||
15 | CONFIG_GENERIC_IRQ_PROBE=y | ||
16 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
17 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
18 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
19 | CONFIG_GENERIC_HWEIGHT=y | ||
20 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
21 | CONFIG_ZONE_DMA=y | ||
22 | CONFIG_VECTORS_BASE=0xffff0000 | ||
23 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
24 | |||
25 | # | ||
26 | # Code maturity level options | ||
27 | # | ||
28 | CONFIG_EXPERIMENTAL=y | ||
29 | CONFIG_BROKEN_ON_SMP=y | ||
30 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
31 | |||
32 | # | ||
33 | # General setup | ||
34 | # | ||
35 | CONFIG_LOCALVERSION="" | ||
36 | CONFIG_LOCALVERSION_AUTO=y | ||
37 | CONFIG_SWAP=y | ||
38 | CONFIG_SYSVIPC=y | ||
39 | # CONFIG_IPC_NS is not set | ||
40 | CONFIG_SYSVIPC_SYSCTL=y | ||
41 | # CONFIG_POSIX_MQUEUE is not set | ||
42 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
43 | # CONFIG_TASKSTATS is not set | ||
44 | # CONFIG_UTS_NS is not set | ||
45 | # CONFIG_AUDIT is not set | ||
46 | CONFIG_IKCONFIG=m | ||
47 | CONFIG_IKCONFIG_PROC=y | ||
48 | # CONFIG_SYSFS_DEPRECATED is not set | ||
49 | # CONFIG_RELAY is not set | ||
50 | # CONFIG_BLK_DEV_INITRD is not set | ||
51 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
52 | CONFIG_SYSCTL=y | ||
53 | CONFIG_EMBEDDED=y | ||
54 | CONFIG_UID16=y | ||
55 | CONFIG_SYSCTL_SYSCALL=y | ||
56 | # CONFIG_KALLSYMS is not set | ||
57 | CONFIG_HOTPLUG=y | ||
58 | CONFIG_PRINTK=y | ||
59 | CONFIG_BUG=y | ||
60 | CONFIG_ELF_CORE=y | ||
61 | CONFIG_BASE_FULL=y | ||
62 | CONFIG_FUTEX=y | ||
63 | CONFIG_EPOLL=y | ||
64 | CONFIG_SHMEM=y | ||
65 | CONFIG_SLAB=y | ||
66 | CONFIG_VM_EVENT_COUNTERS=y | ||
67 | CONFIG_RT_MUTEXES=y | ||
68 | # CONFIG_TINY_SHMEM is not set | ||
69 | CONFIG_BASE_SMALL=0 | ||
70 | # CONFIG_SLOB is not set | ||
71 | |||
72 | # | ||
73 | # Loadable module support | ||
74 | # | ||
75 | CONFIG_MODULES=y | ||
76 | CONFIG_MODULE_UNLOAD=y | ||
77 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
78 | # CONFIG_MODVERSIONS is not set | ||
79 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
80 | CONFIG_KMOD=y | ||
81 | |||
82 | # | ||
83 | # Block layer | ||
84 | # | ||
85 | CONFIG_BLOCK=y | ||
86 | # CONFIG_LBD is not set | ||
87 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
88 | # CONFIG_LSF is not set | ||
89 | |||
90 | # | ||
91 | # IO Schedulers | ||
92 | # | ||
93 | CONFIG_IOSCHED_NOOP=y | ||
94 | # CONFIG_IOSCHED_AS is not set | ||
95 | # CONFIG_IOSCHED_DEADLINE is not set | ||
96 | # CONFIG_IOSCHED_CFQ is not set | ||
97 | # CONFIG_DEFAULT_AS is not set | ||
98 | # CONFIG_DEFAULT_DEADLINE is not set | ||
99 | # CONFIG_DEFAULT_CFQ is not set | ||
100 | CONFIG_DEFAULT_NOOP=y | ||
101 | CONFIG_DEFAULT_IOSCHED="noop" | ||
102 | |||
103 | # | ||
104 | # System Type | ||
105 | # | ||
106 | # CONFIG_ARCH_AAEC2000 is not set | ||
107 | # CONFIG_ARCH_INTEGRATOR is not set | ||
108 | # CONFIG_ARCH_REALVIEW is not set | ||
109 | # CONFIG_ARCH_VERSATILE is not set | ||
110 | CONFIG_ARCH_AT91=y | ||
111 | # CONFIG_ARCH_CLPS7500 is not set | ||
112 | # CONFIG_ARCH_CLPS711X is not set | ||
113 | # CONFIG_ARCH_CO285 is not set | ||
114 | # CONFIG_ARCH_EBSA110 is not set | ||
115 | # CONFIG_ARCH_EP93XX is not set | ||
116 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
117 | # CONFIG_ARCH_NETX is not set | ||
118 | # CONFIG_ARCH_H720X is not set | ||
119 | # CONFIG_ARCH_IMX is not set | ||
120 | # CONFIG_ARCH_IOP32X is not set | ||
121 | # CONFIG_ARCH_IOP33X is not set | ||
122 | # CONFIG_ARCH_IOP13XX is not set | ||
123 | # CONFIG_ARCH_IXP4XX is not set | ||
124 | # CONFIG_ARCH_IXP2000 is not set | ||
125 | # CONFIG_ARCH_IXP23XX is not set | ||
126 | # CONFIG_ARCH_L7200 is not set | ||
127 | # CONFIG_ARCH_NS9XXX is not set | ||
128 | # CONFIG_ARCH_PNX4008 is not set | ||
129 | # CONFIG_ARCH_PXA is not set | ||
130 | # CONFIG_ARCH_RPC is not set | ||
131 | # CONFIG_ARCH_SA1100 is not set | ||
132 | # CONFIG_ARCH_S3C2410 is not set | ||
133 | # CONFIG_ARCH_SHARK is not set | ||
134 | # CONFIG_ARCH_LH7A40X is not set | ||
135 | # CONFIG_ARCH_OMAP is not set | ||
136 | |||
137 | # | ||
138 | # Atmel AT91 System-on-Chip | ||
139 | # | ||
140 | CONFIG_ARCH_AT91RM9200=y | ||
141 | # CONFIG_ARCH_AT91SAM9260 is not set | ||
142 | # CONFIG_ARCH_AT91SAM9261 is not set | ||
143 | # CONFIG_ARCH_AT91SAM9263 is not set | ||
144 | |||
145 | # | ||
146 | # AT91RM9200 Board Type | ||
147 | # | ||
148 | # CONFIG_MACH_ONEARM is not set | ||
149 | # CONFIG_ARCH_AT91RM9200DK is not set | ||
150 | # CONFIG_MACH_AT91RM9200EK is not set | ||
151 | # CONFIG_MACH_CSB337 is not set | ||
152 | # CONFIG_MACH_CSB637 is not set | ||
153 | # CONFIG_MACH_CARMEVA is not set | ||
154 | # CONFIG_MACH_ATEB9200 is not set | ||
155 | # CONFIG_MACH_KB9200 is not set | ||
156 | CONFIG_MACH_PICOTUX2XX=y | ||
157 | # CONFIG_MACH_KAFA is not set | ||
158 | |||
159 | # | ||
160 | # AT91 Board Options | ||
161 | # | ||
162 | |||
163 | # | ||
164 | # AT91 Feature Selections | ||
165 | # | ||
166 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
167 | |||
168 | # | ||
169 | # Processor Type | ||
170 | # | ||
171 | CONFIG_CPU_32=y | ||
172 | CONFIG_CPU_ARM920T=y | ||
173 | CONFIG_CPU_32v4T=y | ||
174 | CONFIG_CPU_ABRT_EV4T=y | ||
175 | CONFIG_CPU_CACHE_V4WT=y | ||
176 | CONFIG_CPU_CACHE_VIVT=y | ||
177 | CONFIG_CPU_COPY_V4WB=y | ||
178 | CONFIG_CPU_TLB_V4WBI=y | ||
179 | CONFIG_CPU_CP15=y | ||
180 | CONFIG_CPU_CP15_MMU=y | ||
181 | |||
182 | # | ||
183 | # Processor Features | ||
184 | # | ||
185 | CONFIG_ARM_THUMB=y | ||
186 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
187 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
188 | # CONFIG_CPU_DCACHE_WRITETHROUGH is not set | ||
189 | # CONFIG_OUTER_CACHE is not set | ||
190 | |||
191 | # | ||
192 | # Bus support | ||
193 | # | ||
194 | |||
195 | # | ||
196 | # PCCARD (PCMCIA/CardBus) support | ||
197 | # | ||
198 | # CONFIG_PCCARD is not set | ||
199 | |||
200 | # | ||
201 | # Kernel Features | ||
202 | # | ||
203 | # CONFIG_PREEMPT is not set | ||
204 | CONFIG_NO_IDLE_HZ=y | ||
205 | CONFIG_HZ=100 | ||
206 | CONFIG_AEABI=y | ||
207 | CONFIG_OABI_COMPAT=y | ||
208 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | ||
209 | CONFIG_SELECT_MEMORY_MODEL=y | ||
210 | CONFIG_FLATMEM_MANUAL=y | ||
211 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
212 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
213 | CONFIG_FLATMEM=y | ||
214 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
215 | # CONFIG_SPARSEMEM_STATIC is not set | ||
216 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
217 | # CONFIG_RESOURCES_64BIT is not set | ||
218 | CONFIG_ZONE_DMA_FLAG=1 | ||
219 | # CONFIG_LEDS is not set | ||
220 | CONFIG_ALIGNMENT_TRAP=y | ||
221 | |||
222 | # | ||
223 | # Boot options | ||
224 | # | ||
225 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
226 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
227 | CONFIG_CMDLINE="" | ||
228 | # CONFIG_XIP_KERNEL is not set | ||
229 | CONFIG_KEXEC=y | ||
230 | |||
231 | # | ||
232 | # Floating point emulation | ||
233 | # | ||
234 | |||
235 | # | ||
236 | # At least one emulation must be selected | ||
237 | # | ||
238 | CONFIG_FPE_NWFPE=y | ||
239 | # CONFIG_FPE_NWFPE_XP is not set | ||
240 | # CONFIG_FPE_FASTFPE is not set | ||
241 | |||
242 | # | ||
243 | # Userspace binary formats | ||
244 | # | ||
245 | CONFIG_BINFMT_ELF=y | ||
246 | # CONFIG_BINFMT_AOUT is not set | ||
247 | CONFIG_BINFMT_MISC=m | ||
248 | |||
249 | # | ||
250 | # Power management options | ||
251 | # | ||
252 | # CONFIG_PM is not set | ||
253 | |||
254 | # | ||
255 | # Networking | ||
256 | # | ||
257 | CONFIG_NET=y | ||
258 | |||
259 | # | ||
260 | # Networking options | ||
261 | # | ||
262 | # CONFIG_NETDEBUG is not set | ||
263 | CONFIG_PACKET=m | ||
264 | CONFIG_PACKET_MMAP=y | ||
265 | CONFIG_UNIX=y | ||
266 | CONFIG_XFRM=y | ||
267 | CONFIG_XFRM_USER=m | ||
268 | # CONFIG_XFRM_SUB_POLICY is not set | ||
269 | # CONFIG_XFRM_MIGRATE is not set | ||
270 | # CONFIG_NET_KEY is not set | ||
271 | CONFIG_INET=y | ||
272 | # CONFIG_IP_MULTICAST is not set | ||
273 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
274 | CONFIG_IP_FIB_HASH=y | ||
275 | CONFIG_IP_PNP=y | ||
276 | # CONFIG_IP_PNP_DHCP is not set | ||
277 | CONFIG_IP_PNP_BOOTP=y | ||
278 | # CONFIG_IP_PNP_RARP is not set | ||
279 | CONFIG_NET_IPIP=m | ||
280 | CONFIG_NET_IPGRE=m | ||
281 | # CONFIG_ARPD is not set | ||
282 | # CONFIG_SYN_COOKIES is not set | ||
283 | CONFIG_INET_AH=m | ||
284 | CONFIG_INET_ESP=m | ||
285 | CONFIG_INET_IPCOMP=m | ||
286 | CONFIG_INET_XFRM_TUNNEL=m | ||
287 | CONFIG_INET_TUNNEL=m | ||
288 | CONFIG_INET_XFRM_MODE_TRANSPORT=m | ||
289 | CONFIG_INET_XFRM_MODE_TUNNEL=m | ||
290 | CONFIG_INET_XFRM_MODE_BEET=m | ||
291 | CONFIG_INET_DIAG=m | ||
292 | CONFIG_INET_TCP_DIAG=m | ||
293 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
294 | CONFIG_TCP_CONG_CUBIC=y | ||
295 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
296 | # CONFIG_TCP_MD5SIG is not set | ||
297 | CONFIG_IPV6=m | ||
298 | CONFIG_IPV6_PRIVACY=y | ||
299 | CONFIG_IPV6_ROUTER_PREF=y | ||
300 | CONFIG_IPV6_ROUTE_INFO=y | ||
301 | CONFIG_INET6_AH=m | ||
302 | CONFIG_INET6_ESP=m | ||
303 | CONFIG_INET6_IPCOMP=m | ||
304 | CONFIG_IPV6_MIP6=y | ||
305 | CONFIG_INET6_XFRM_TUNNEL=m | ||
306 | CONFIG_INET6_TUNNEL=m | ||
307 | CONFIG_INET6_XFRM_MODE_TRANSPORT=m | ||
308 | CONFIG_INET6_XFRM_MODE_TUNNEL=m | ||
309 | CONFIG_INET6_XFRM_MODE_BEET=m | ||
310 | CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m | ||
311 | CONFIG_IPV6_SIT=m | ||
312 | CONFIG_IPV6_TUNNEL=m | ||
313 | # CONFIG_IPV6_MULTIPLE_TABLES is not set | ||
314 | # CONFIG_NETWORK_SECMARK is not set | ||
315 | # CONFIG_NETFILTER is not set | ||
316 | |||
317 | # | ||
318 | # DCCP Configuration (EXPERIMENTAL) | ||
319 | # | ||
320 | # CONFIG_IP_DCCP is not set | ||
321 | |||
322 | # | ||
323 | # SCTP Configuration (EXPERIMENTAL) | ||
324 | # | ||
325 | # CONFIG_IP_SCTP is not set | ||
326 | |||
327 | # | ||
328 | # TIPC Configuration (EXPERIMENTAL) | ||
329 | # | ||
330 | # CONFIG_TIPC is not set | ||
331 | # CONFIG_ATM is not set | ||
332 | CONFIG_BRIDGE=m | ||
333 | CONFIG_VLAN_8021Q=m | ||
334 | # CONFIG_DECNET is not set | ||
335 | CONFIG_LLC=m | ||
336 | # CONFIG_LLC2 is not set | ||
337 | # CONFIG_IPX is not set | ||
338 | # CONFIG_ATALK is not set | ||
339 | # CONFIG_X25 is not set | ||
340 | # CONFIG_LAPB is not set | ||
341 | # CONFIG_ECONET is not set | ||
342 | # CONFIG_WAN_ROUTER is not set | ||
343 | |||
344 | # | ||
345 | # QoS and/or fair queueing | ||
346 | # | ||
347 | # CONFIG_NET_SCHED is not set | ||
348 | |||
349 | # | ||
350 | # Network testing | ||
351 | # | ||
352 | # CONFIG_NET_PKTGEN is not set | ||
353 | # CONFIG_HAMRADIO is not set | ||
354 | # CONFIG_IRDA is not set | ||
355 | CONFIG_BT=m | ||
356 | CONFIG_BT_L2CAP=m | ||
357 | CONFIG_BT_SCO=m | ||
358 | CONFIG_BT_RFCOMM=m | ||
359 | CONFIG_BT_RFCOMM_TTY=y | ||
360 | CONFIG_BT_BNEP=m | ||
361 | CONFIG_BT_BNEP_MC_FILTER=y | ||
362 | CONFIG_BT_BNEP_PROTO_FILTER=y | ||
363 | CONFIG_BT_HIDP=m | ||
364 | |||
365 | # | ||
366 | # Bluetooth device drivers | ||
367 | # | ||
368 | CONFIG_BT_HCIUSB=m | ||
369 | CONFIG_BT_HCIUSB_SCO=y | ||
370 | # CONFIG_BT_HCIUART is not set | ||
371 | # CONFIG_BT_HCIBCM203X is not set | ||
372 | # CONFIG_BT_HCIBPA10X is not set | ||
373 | # CONFIG_BT_HCIBFUSB is not set | ||
374 | # CONFIG_BT_HCIVHCI is not set | ||
375 | # CONFIG_IEEE80211 is not set | ||
376 | |||
377 | # | ||
378 | # Device Drivers | ||
379 | # | ||
380 | |||
381 | # | ||
382 | # Generic Driver Options | ||
383 | # | ||
384 | CONFIG_STANDALONE=y | ||
385 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
386 | CONFIG_FW_LOADER=m | ||
387 | # CONFIG_DEBUG_DRIVER is not set | ||
388 | # CONFIG_DEBUG_DEVRES is not set | ||
389 | # CONFIG_SYS_HYPERVISOR is not set | ||
390 | |||
391 | # | ||
392 | # Connector - unified userspace <-> kernelspace linker | ||
393 | # | ||
394 | # CONFIG_CONNECTOR is not set | ||
395 | |||
396 | # | ||
397 | # Memory Technology Devices (MTD) | ||
398 | # | ||
399 | CONFIG_MTD=y | ||
400 | # CONFIG_MTD_DEBUG is not set | ||
401 | # CONFIG_MTD_CONCAT is not set | ||
402 | CONFIG_MTD_PARTITIONS=y | ||
403 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
404 | CONFIG_MTD_CMDLINE_PARTS=y | ||
405 | # CONFIG_MTD_AFS_PARTS is not set | ||
406 | |||
407 | # | ||
408 | # User Modules And Translation Layers | ||
409 | # | ||
410 | CONFIG_MTD_CHAR=y | ||
411 | CONFIG_MTD_BLKDEVS=y | ||
412 | CONFIG_MTD_BLOCK=y | ||
413 | # CONFIG_FTL is not set | ||
414 | # CONFIG_NFTL is not set | ||
415 | # CONFIG_INFTL is not set | ||
416 | # CONFIG_RFD_FTL is not set | ||
417 | # CONFIG_SSFDC is not set | ||
418 | |||
419 | # | ||
420 | # RAM/ROM/Flash chip drivers | ||
421 | # | ||
422 | CONFIG_MTD_CFI=y | ||
423 | # CONFIG_MTD_JEDECPROBE is not set | ||
424 | CONFIG_MTD_GEN_PROBE=y | ||
425 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
426 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
427 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
428 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
429 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
430 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
431 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
432 | CONFIG_MTD_CFI_I1=y | ||
433 | CONFIG_MTD_CFI_I2=y | ||
434 | # CONFIG_MTD_CFI_I4 is not set | ||
435 | # CONFIG_MTD_CFI_I8 is not set | ||
436 | # CONFIG_MTD_CFI_INTELEXT is not set | ||
437 | CONFIG_MTD_CFI_AMDSTD=y | ||
438 | # CONFIG_MTD_CFI_STAA is not set | ||
439 | CONFIG_MTD_CFI_UTIL=y | ||
440 | # CONFIG_MTD_RAM is not set | ||
441 | # CONFIG_MTD_ROM is not set | ||
442 | # CONFIG_MTD_ABSENT is not set | ||
443 | # CONFIG_MTD_OBSOLETE_CHIPS is not set | ||
444 | |||
445 | # | ||
446 | # Mapping drivers for chip access | ||
447 | # | ||
448 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
449 | CONFIG_MTD_PHYSMAP=y | ||
450 | CONFIG_MTD_PHYSMAP_START=0x8000000 | ||
451 | CONFIG_MTD_PHYSMAP_LEN=0x0 | ||
452 | CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | ||
453 | # CONFIG_MTD_ARM_INTEGRATOR is not set | ||
454 | # CONFIG_MTD_PLATRAM is not set | ||
455 | |||
456 | # | ||
457 | # Self-contained MTD device drivers | ||
458 | # | ||
459 | # CONFIG_MTD_SLRAM is not set | ||
460 | # CONFIG_MTD_PHRAM is not set | ||
461 | # CONFIG_MTD_MTDRAM is not set | ||
462 | # CONFIG_MTD_BLOCK2MTD is not set | ||
463 | |||
464 | # | ||
465 | # Disk-On-Chip Device Drivers | ||
466 | # | ||
467 | # CONFIG_MTD_DOC2000 is not set | ||
468 | # CONFIG_MTD_DOC2001 is not set | ||
469 | # CONFIG_MTD_DOC2001PLUS is not set | ||
470 | |||
471 | # | ||
472 | # NAND Flash Device Drivers | ||
473 | # | ||
474 | # CONFIG_MTD_NAND is not set | ||
475 | |||
476 | # | ||
477 | # OneNAND Flash Device Drivers | ||
478 | # | ||
479 | # CONFIG_MTD_ONENAND is not set | ||
480 | |||
481 | # | ||
482 | # Parallel port support | ||
483 | # | ||
484 | # CONFIG_PARPORT is not set | ||
485 | |||
486 | # | ||
487 | # Plug and Play support | ||
488 | # | ||
489 | # CONFIG_PNPACPI is not set | ||
490 | |||
491 | # | ||
492 | # Block devices | ||
493 | # | ||
494 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
495 | CONFIG_BLK_DEV_LOOP=m | ||
496 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
497 | # CONFIG_BLK_DEV_NBD is not set | ||
498 | # CONFIG_BLK_DEV_UB is not set | ||
499 | # CONFIG_BLK_DEV_RAM is not set | ||
500 | # CONFIG_CDROM_PKTCDVD is not set | ||
501 | # CONFIG_ATA_OVER_ETH is not set | ||
502 | |||
503 | # | ||
504 | # SCSI device support | ||
505 | # | ||
506 | # CONFIG_RAID_ATTRS is not set | ||
507 | CONFIG_SCSI=m | ||
508 | # CONFIG_SCSI_TGT is not set | ||
509 | # CONFIG_SCSI_NETLINK is not set | ||
510 | CONFIG_SCSI_PROC_FS=y | ||
511 | |||
512 | # | ||
513 | # SCSI support type (disk, tape, CD-ROM) | ||
514 | # | ||
515 | CONFIG_BLK_DEV_SD=m | ||
516 | # CONFIG_CHR_DEV_ST is not set | ||
517 | # CONFIG_CHR_DEV_OSST is not set | ||
518 | CONFIG_BLK_DEV_SR=m | ||
519 | CONFIG_BLK_DEV_SR_VENDOR=y | ||
520 | CONFIG_CHR_DEV_SG=m | ||
521 | # CONFIG_CHR_DEV_SCH is not set | ||
522 | |||
523 | # | ||
524 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
525 | # | ||
526 | # CONFIG_SCSI_MULTI_LUN is not set | ||
527 | # CONFIG_SCSI_CONSTANTS is not set | ||
528 | # CONFIG_SCSI_LOGGING is not set | ||
529 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
530 | |||
531 | # | ||
532 | # SCSI Transports | ||
533 | # | ||
534 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
535 | # CONFIG_SCSI_FC_ATTRS is not set | ||
536 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
537 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
538 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
539 | |||
540 | # | ||
541 | # SCSI low-level drivers | ||
542 | # | ||
543 | # CONFIG_ISCSI_TCP is not set | ||
544 | # CONFIG_SCSI_DEBUG is not set | ||
545 | |||
546 | # | ||
547 | # Serial ATA (prod) and Parallel ATA (experimental) drivers | ||
548 | # | ||
549 | # CONFIG_ATA is not set | ||
550 | |||
551 | # | ||
552 | # Multi-device support (RAID and LVM) | ||
553 | # | ||
554 | # CONFIG_MD is not set | ||
555 | |||
556 | # | ||
557 | # Fusion MPT device support | ||
558 | # | ||
559 | # CONFIG_FUSION is not set | ||
560 | |||
561 | # | ||
562 | # IEEE 1394 (FireWire) support | ||
563 | # | ||
564 | |||
565 | # | ||
566 | # I2O device support | ||
567 | # | ||
568 | |||
569 | # | ||
570 | # Network device support | ||
571 | # | ||
572 | CONFIG_NETDEVICES=y | ||
573 | # CONFIG_DUMMY is not set | ||
574 | # CONFIG_BONDING is not set | ||
575 | # CONFIG_EQUALIZER is not set | ||
576 | CONFIG_TUN=m | ||
577 | |||
578 | # | ||
579 | # PHY device support | ||
580 | # | ||
581 | # CONFIG_PHYLIB is not set | ||
582 | |||
583 | # | ||
584 | # Ethernet (10 or 100Mbit) | ||
585 | # | ||
586 | CONFIG_NET_ETHERNET=y | ||
587 | CONFIG_MII=y | ||
588 | CONFIG_ARM_AT91_ETHER=y | ||
589 | # CONFIG_SMC91X is not set | ||
590 | # CONFIG_DM9000 is not set | ||
591 | |||
592 | # | ||
593 | # Ethernet (1000 Mbit) | ||
594 | # | ||
595 | |||
596 | # | ||
597 | # Ethernet (10000 Mbit) | ||
598 | # | ||
599 | |||
600 | # | ||
601 | # Token Ring devices | ||
602 | # | ||
603 | |||
604 | # | ||
605 | # Wireless LAN (non-hamradio) | ||
606 | # | ||
607 | # CONFIG_NET_RADIO is not set | ||
608 | |||
609 | # | ||
610 | # Wan interfaces | ||
611 | # | ||
612 | # CONFIG_WAN is not set | ||
613 | CONFIG_PPP=m | ||
614 | # CONFIG_PPP_MULTILINK is not set | ||
615 | CONFIG_PPP_FILTER=y | ||
616 | CONFIG_PPP_ASYNC=m | ||
617 | # CONFIG_PPP_SYNC_TTY is not set | ||
618 | CONFIG_PPP_DEFLATE=m | ||
619 | CONFIG_PPP_BSDCOMP=m | ||
620 | CONFIG_PPP_MPPE=m | ||
621 | CONFIG_PPPOE=m | ||
622 | CONFIG_SLIP=m | ||
623 | CONFIG_SLIP_COMPRESSED=y | ||
624 | CONFIG_SLHC=m | ||
625 | CONFIG_SLIP_SMART=y | ||
626 | CONFIG_SLIP_MODE_SLIP6=y | ||
627 | # CONFIG_SHAPER is not set | ||
628 | # CONFIG_NETCONSOLE is not set | ||
629 | # CONFIG_NETPOLL is not set | ||
630 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
631 | |||
632 | # | ||
633 | # ISDN subsystem | ||
634 | # | ||
635 | # CONFIG_ISDN is not set | ||
636 | |||
637 | # | ||
638 | # Input device support | ||
639 | # | ||
640 | CONFIG_INPUT=y | ||
641 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
642 | |||
643 | # | ||
644 | # Userland interfaces | ||
645 | # | ||
646 | # CONFIG_INPUT_MOUSEDEV is not set | ||
647 | # CONFIG_INPUT_JOYDEV is not set | ||
648 | # CONFIG_INPUT_TSDEV is not set | ||
649 | # CONFIG_INPUT_EVDEV is not set | ||
650 | # CONFIG_INPUT_EVBUG is not set | ||
651 | |||
652 | # | ||
653 | # Input Device Drivers | ||
654 | # | ||
655 | # CONFIG_INPUT_KEYBOARD is not set | ||
656 | # CONFIG_INPUT_MOUSE is not set | ||
657 | # CONFIG_INPUT_JOYSTICK is not set | ||
658 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
659 | # CONFIG_INPUT_MISC is not set | ||
660 | |||
661 | # | ||
662 | # Hardware I/O ports | ||
663 | # | ||
664 | # CONFIG_SERIO is not set | ||
665 | # CONFIG_GAMEPORT is not set | ||
666 | |||
667 | # | ||
668 | # Character devices | ||
669 | # | ||
670 | # CONFIG_VT is not set | ||
671 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
672 | |||
673 | # | ||
674 | # Serial drivers | ||
675 | # | ||
676 | # CONFIG_SERIAL_8250 is not set | ||
677 | |||
678 | # | ||
679 | # Non-8250 serial port support | ||
680 | # | ||
681 | CONFIG_SERIAL_ATMEL=y | ||
682 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
683 | # CONFIG_SERIAL_ATMEL_TTYAT is not set | ||
684 | CONFIG_SERIAL_CORE=y | ||
685 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
686 | CONFIG_UNIX98_PTYS=y | ||
687 | # CONFIG_LEGACY_PTYS is not set | ||
688 | |||
689 | # | ||
690 | # IPMI | ||
691 | # | ||
692 | # CONFIG_IPMI_HANDLER is not set | ||
693 | |||
694 | # | ||
695 | # Watchdog Cards | ||
696 | # | ||
697 | CONFIG_WATCHDOG=y | ||
698 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
699 | |||
700 | # | ||
701 | # Watchdog Device Drivers | ||
702 | # | ||
703 | # CONFIG_SOFT_WATCHDOG is not set | ||
704 | CONFIG_AT91RM9200_WATCHDOG=m | ||
705 | |||
706 | # | ||
707 | # USB-based Watchdog Cards | ||
708 | # | ||
709 | # CONFIG_USBPCWATCHDOG is not set | ||
710 | CONFIG_HW_RANDOM=m | ||
711 | # CONFIG_NVRAM is not set | ||
712 | # CONFIG_DTLK is not set | ||
713 | # CONFIG_R3964 is not set | ||
714 | # CONFIG_RAW_DRIVER is not set | ||
715 | |||
716 | # | ||
717 | # TPM devices | ||
718 | # | ||
719 | # CONFIG_TCG_TPM is not set | ||
720 | |||
721 | # | ||
722 | # I2C support | ||
723 | # | ||
724 | CONFIG_I2C=m | ||
725 | CONFIG_I2C_CHARDEV=m | ||
726 | |||
727 | # | ||
728 | # I2C Algorithms | ||
729 | # | ||
730 | # CONFIG_I2C_ALGOBIT is not set | ||
731 | # CONFIG_I2C_ALGOPCF is not set | ||
732 | # CONFIG_I2C_ALGOPCA is not set | ||
733 | |||
734 | # | ||
735 | # I2C Hardware Bus support | ||
736 | # | ||
737 | CONFIG_I2C_AT91=m | ||
738 | CONFIG_I2C_ISA=m | ||
739 | # CONFIG_I2C_OCORES is not set | ||
740 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
741 | # CONFIG_I2C_STUB is not set | ||
742 | # CONFIG_I2C_PCA_ISA is not set | ||
743 | |||
744 | # | ||
745 | # Miscellaneous I2C Chip support | ||
746 | # | ||
747 | CONFIG_SENSORS_DS1337=m | ||
748 | CONFIG_SENSORS_DS1374=m | ||
749 | CONFIG_SENSORS_EEPROM=m | ||
750 | CONFIG_SENSORS_PCF8574=m | ||
751 | CONFIG_SENSORS_PCA9539=m | ||
752 | CONFIG_SENSORS_PCF8591=m | ||
753 | # CONFIG_SENSORS_MAX6875 is not set | ||
754 | # CONFIG_I2C_DEBUG_CORE is not set | ||
755 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
756 | # CONFIG_I2C_DEBUG_BUS is not set | ||
757 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
758 | |||
759 | # | ||
760 | # SPI support | ||
761 | # | ||
762 | # CONFIG_SPI is not set | ||
763 | # CONFIG_SPI_MASTER is not set | ||
764 | |||
765 | # | ||
766 | # Dallas's 1-wire bus | ||
767 | # | ||
768 | # CONFIG_W1 is not set | ||
769 | |||
770 | # | ||
771 | # Hardware Monitoring support | ||
772 | # | ||
773 | CONFIG_HWMON=m | ||
774 | CONFIG_HWMON_VID=m | ||
775 | # CONFIG_SENSORS_ABITUGURU is not set | ||
776 | CONFIG_SENSORS_ADM1021=m | ||
777 | CONFIG_SENSORS_ADM1025=m | ||
778 | CONFIG_SENSORS_ADM1026=m | ||
779 | CONFIG_SENSORS_ADM1029=m | ||
780 | CONFIG_SENSORS_ADM1031=m | ||
781 | CONFIG_SENSORS_ADM9240=m | ||
782 | # CONFIG_SENSORS_ASB100 is not set | ||
783 | # CONFIG_SENSORS_ATXP1 is not set | ||
784 | CONFIG_SENSORS_DS1621=m | ||
785 | # CONFIG_SENSORS_F71805F is not set | ||
786 | # CONFIG_SENSORS_FSCHER is not set | ||
787 | # CONFIG_SENSORS_FSCPOS is not set | ||
788 | CONFIG_SENSORS_GL518SM=m | ||
789 | CONFIG_SENSORS_GL520SM=m | ||
790 | CONFIG_SENSORS_IT87=m | ||
791 | CONFIG_SENSORS_LM63=m | ||
792 | CONFIG_SENSORS_LM75=m | ||
793 | CONFIG_SENSORS_LM77=m | ||
794 | CONFIG_SENSORS_LM78=m | ||
795 | CONFIG_SENSORS_LM80=m | ||
796 | CONFIG_SENSORS_LM83=m | ||
797 | CONFIG_SENSORS_LM85=m | ||
798 | CONFIG_SENSORS_LM87=m | ||
799 | CONFIG_SENSORS_LM90=m | ||
800 | CONFIG_SENSORS_LM92=m | ||
801 | CONFIG_SENSORS_MAX1619=m | ||
802 | # CONFIG_SENSORS_PC87360 is not set | ||
803 | # CONFIG_SENSORS_PC87427 is not set | ||
804 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
805 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
806 | CONFIG_SENSORS_SMSC47B397=m | ||
807 | # CONFIG_SENSORS_VT1211 is not set | ||
808 | CONFIG_SENSORS_W83781D=m | ||
809 | CONFIG_SENSORS_W83791D=m | ||
810 | CONFIG_SENSORS_W83792D=m | ||
811 | CONFIG_SENSORS_W83793=m | ||
812 | CONFIG_SENSORS_W83L785TS=m | ||
813 | # CONFIG_SENSORS_W83627HF is not set | ||
814 | # CONFIG_SENSORS_W83627EHF is not set | ||
815 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
816 | |||
817 | # | ||
818 | # Misc devices | ||
819 | # | ||
820 | |||
821 | # | ||
822 | # Multifunction device drivers | ||
823 | # | ||
824 | # CONFIG_MFD_SM501 is not set | ||
825 | |||
826 | # | ||
827 | # LED devices | ||
828 | # | ||
829 | # CONFIG_NEW_LEDS is not set | ||
830 | |||
831 | # | ||
832 | # LED drivers | ||
833 | # | ||
834 | |||
835 | # | ||
836 | # LED Triggers | ||
837 | # | ||
838 | |||
839 | # | ||
840 | # Multimedia devices | ||
841 | # | ||
842 | # CONFIG_VIDEO_DEV is not set | ||
843 | |||
844 | # | ||
845 | # Digital Video Broadcasting Devices | ||
846 | # | ||
847 | # CONFIG_DVB is not set | ||
848 | # CONFIG_USB_DABUSB is not set | ||
849 | |||
850 | # | ||
851 | # Graphics support | ||
852 | # | ||
853 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
854 | # CONFIG_FB is not set | ||
855 | |||
856 | # | ||
857 | # Sound | ||
858 | # | ||
859 | # CONFIG_SOUND is not set | ||
860 | |||
861 | # | ||
862 | # HID Devices | ||
863 | # | ||
864 | CONFIG_HID=m | ||
865 | # CONFIG_HID_DEBUG is not set | ||
866 | |||
867 | # | ||
868 | # USB support | ||
869 | # | ||
870 | CONFIG_USB_ARCH_HAS_HCD=y | ||
871 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
872 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
873 | CONFIG_USB=m | ||
874 | # CONFIG_USB_DEBUG is not set | ||
875 | |||
876 | # | ||
877 | # Miscellaneous USB options | ||
878 | # | ||
879 | CONFIG_USB_DEVICEFS=y | ||
880 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
881 | # CONFIG_USB_OTG is not set | ||
882 | |||
883 | # | ||
884 | # USB Host Controller Drivers | ||
885 | # | ||
886 | # CONFIG_USB_ISP116X_HCD is not set | ||
887 | CONFIG_USB_OHCI_HCD=m | ||
888 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | ||
889 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | ||
890 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
891 | # CONFIG_USB_SL811_HCD is not set | ||
892 | |||
893 | # | ||
894 | # USB Device Class drivers | ||
895 | # | ||
896 | CONFIG_USB_ACM=m | ||
897 | CONFIG_USB_PRINTER=m | ||
898 | |||
899 | # | ||
900 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
901 | # | ||
902 | |||
903 | # | ||
904 | # may also be needed; see USB_STORAGE Help for more information | ||
905 | # | ||
906 | CONFIG_USB_STORAGE=m | ||
907 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
908 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
909 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
910 | # CONFIG_USB_STORAGE_DPCM is not set | ||
911 | # CONFIG_USB_STORAGE_USBAT is not set | ||
912 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
913 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
914 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
915 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
916 | # CONFIG_USB_STORAGE_KARMA is not set | ||
917 | # CONFIG_USB_LIBUSUAL is not set | ||
918 | |||
919 | # | ||
920 | # USB Input Devices | ||
921 | # | ||
922 | CONFIG_USB_HID=m | ||
923 | # CONFIG_USB_HIDINPUT_POWERBOOK is not set | ||
924 | # CONFIG_HID_FF is not set | ||
925 | # CONFIG_USB_HIDDEV is not set | ||
926 | |||
927 | # | ||
928 | # USB HID Boot Protocol drivers | ||
929 | # | ||
930 | # CONFIG_USB_KBD is not set | ||
931 | # CONFIG_USB_MOUSE is not set | ||
932 | # CONFIG_USB_AIPTEK is not set | ||
933 | # CONFIG_USB_WACOM is not set | ||
934 | # CONFIG_USB_ACECAD is not set | ||
935 | # CONFIG_USB_KBTAB is not set | ||
936 | # CONFIG_USB_POWERMATE is not set | ||
937 | # CONFIG_USB_TOUCHSCREEN is not set | ||
938 | # CONFIG_USB_YEALINK is not set | ||
939 | # CONFIG_USB_XPAD is not set | ||
940 | # CONFIG_USB_ATI_REMOTE is not set | ||
941 | # CONFIG_USB_ATI_REMOTE2 is not set | ||
942 | # CONFIG_USB_KEYSPAN_REMOTE is not set | ||
943 | # CONFIG_USB_APPLETOUCH is not set | ||
944 | # CONFIG_USB_GTCO is not set | ||
945 | |||
946 | # | ||
947 | # USB Imaging devices | ||
948 | # | ||
949 | # CONFIG_USB_MDC800 is not set | ||
950 | # CONFIG_USB_MICROTEK is not set | ||
951 | |||
952 | # | ||
953 | # USB Network Adapters | ||
954 | # | ||
955 | CONFIG_USB_CATC=m | ||
956 | CONFIG_USB_KAWETH=m | ||
957 | CONFIG_USB_PEGASUS=m | ||
958 | CONFIG_USB_RTL8150=m | ||
959 | CONFIG_USB_USBNET_MII=m | ||
960 | CONFIG_USB_USBNET=m | ||
961 | CONFIG_USB_NET_AX8817X=m | ||
962 | CONFIG_USB_NET_CDCETHER=m | ||
963 | CONFIG_USB_NET_DM9601=m | ||
964 | CONFIG_USB_NET_GL620A=m | ||
965 | CONFIG_USB_NET_NET1080=m | ||
966 | CONFIG_USB_NET_PLUSB=m | ||
967 | CONFIG_USB_NET_MCS7830=m | ||
968 | CONFIG_USB_NET_RNDIS_HOST=m | ||
969 | CONFIG_USB_NET_CDC_SUBSET=m | ||
970 | CONFIG_USB_ALI_M5632=y | ||
971 | CONFIG_USB_AN2720=y | ||
972 | CONFIG_USB_BELKIN=y | ||
973 | CONFIG_USB_ARMLINUX=y | ||
974 | CONFIG_USB_EPSON2888=y | ||
975 | CONFIG_USB_KC2190=y | ||
976 | CONFIG_USB_NET_ZAURUS=m | ||
977 | # CONFIG_USB_MON is not set | ||
978 | |||
979 | # | ||
980 | # USB port drivers | ||
981 | # | ||
982 | |||
983 | # | ||
984 | # USB Serial Converter support | ||
985 | # | ||
986 | CONFIG_USB_SERIAL=m | ||
987 | CONFIG_USB_SERIAL_GENERIC=y | ||
988 | # CONFIG_USB_SERIAL_AIRCABLE is not set | ||
989 | # CONFIG_USB_SERIAL_AIRPRIME is not set | ||
990 | # CONFIG_USB_SERIAL_ARK3116 is not set | ||
991 | # CONFIG_USB_SERIAL_BELKIN is not set | ||
992 | # CONFIG_USB_SERIAL_WHITEHEAT is not set | ||
993 | # CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set | ||
994 | # CONFIG_USB_SERIAL_CP2101 is not set | ||
995 | # CONFIG_USB_SERIAL_CYPRESS_M8 is not set | ||
996 | # CONFIG_USB_SERIAL_EMPEG is not set | ||
997 | # CONFIG_USB_SERIAL_FTDI_SIO is not set | ||
998 | # CONFIG_USB_SERIAL_FUNSOFT is not set | ||
999 | # CONFIG_USB_SERIAL_VISOR is not set | ||
1000 | # CONFIG_USB_SERIAL_IPAQ is not set | ||
1001 | # CONFIG_USB_SERIAL_IR is not set | ||
1002 | # CONFIG_USB_SERIAL_EDGEPORT is not set | ||
1003 | # CONFIG_USB_SERIAL_EDGEPORT_TI is not set | ||
1004 | # CONFIG_USB_SERIAL_GARMIN is not set | ||
1005 | # CONFIG_USB_SERIAL_IPW is not set | ||
1006 | # CONFIG_USB_SERIAL_KEYSPAN_PDA is not set | ||
1007 | # CONFIG_USB_SERIAL_KEYSPAN is not set | ||
1008 | # CONFIG_USB_SERIAL_KLSI is not set | ||
1009 | # CONFIG_USB_SERIAL_KOBIL_SCT is not set | ||
1010 | # CONFIG_USB_SERIAL_MCT_U232 is not set | ||
1011 | # CONFIG_USB_SERIAL_MOS7720 is not set | ||
1012 | # CONFIG_USB_SERIAL_MOS7840 is not set | ||
1013 | # CONFIG_USB_SERIAL_NAVMAN is not set | ||
1014 | CONFIG_USB_SERIAL_PL2303=m | ||
1015 | # CONFIG_USB_SERIAL_HP4X is not set | ||
1016 | # CONFIG_USB_SERIAL_SAFE is not set | ||
1017 | # CONFIG_USB_SERIAL_SIERRAWIRELESS is not set | ||
1018 | # CONFIG_USB_SERIAL_TI is not set | ||
1019 | # CONFIG_USB_SERIAL_CYBERJACK is not set | ||
1020 | # CONFIG_USB_SERIAL_XIRCOM is not set | ||
1021 | # CONFIG_USB_SERIAL_OPTION is not set | ||
1022 | # CONFIG_USB_SERIAL_OMNINET is not set | ||
1023 | # CONFIG_USB_SERIAL_DEBUG is not set | ||
1024 | |||
1025 | # | ||
1026 | # USB Miscellaneous drivers | ||
1027 | # | ||
1028 | # CONFIG_USB_EMI62 is not set | ||
1029 | # CONFIG_USB_EMI26 is not set | ||
1030 | # CONFIG_USB_ADUTUX is not set | ||
1031 | # CONFIG_USB_AUERSWALD is not set | ||
1032 | # CONFIG_USB_RIO500 is not set | ||
1033 | # CONFIG_USB_LEGOTOWER is not set | ||
1034 | # CONFIG_USB_LCD is not set | ||
1035 | # CONFIG_USB_BERRY_CHARGE is not set | ||
1036 | # CONFIG_USB_LED is not set | ||
1037 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1038 | # CONFIG_USB_CYTHERM is not set | ||
1039 | # CONFIG_USB_PHIDGET is not set | ||
1040 | # CONFIG_USB_IDMOUSE is not set | ||
1041 | # CONFIG_USB_FTDI_ELAN is not set | ||
1042 | # CONFIG_USB_APPLEDISPLAY is not set | ||
1043 | # CONFIG_USB_LD is not set | ||
1044 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
1045 | # CONFIG_USB_IOWARRIOR is not set | ||
1046 | # CONFIG_USB_TEST is not set | ||
1047 | |||
1048 | # | ||
1049 | # USB DSL modem support | ||
1050 | # | ||
1051 | |||
1052 | # | ||
1053 | # USB Gadget Support | ||
1054 | # | ||
1055 | # CONFIG_USB_GADGET is not set | ||
1056 | |||
1057 | # | ||
1058 | # MMC/SD Card support | ||
1059 | # | ||
1060 | CONFIG_MMC=m | ||
1061 | # CONFIG_MMC_DEBUG is not set | ||
1062 | CONFIG_MMC_BLOCK=m | ||
1063 | CONFIG_MMC_AT91=m | ||
1064 | |||
1065 | # | ||
1066 | # Real Time Clock | ||
1067 | # | ||
1068 | CONFIG_RTC_LIB=y | ||
1069 | CONFIG_RTC_CLASS=m | ||
1070 | |||
1071 | # | ||
1072 | # RTC interfaces | ||
1073 | # | ||
1074 | CONFIG_RTC_INTF_SYSFS=m | ||
1075 | CONFIG_RTC_INTF_PROC=m | ||
1076 | CONFIG_RTC_INTF_DEV=m | ||
1077 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
1078 | |||
1079 | # | ||
1080 | # RTC drivers | ||
1081 | # | ||
1082 | # CONFIG_RTC_DRV_CMOS is not set | ||
1083 | # CONFIG_RTC_DRV_X1205 is not set | ||
1084 | # CONFIG_RTC_DRV_DS1307 is not set | ||
1085 | # CONFIG_RTC_DRV_DS1553 is not set | ||
1086 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
1087 | # CONFIG_RTC_DRV_DS1672 is not set | ||
1088 | # CONFIG_RTC_DRV_DS1742 is not set | ||
1089 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
1090 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
1091 | # CONFIG_RTC_DRV_M48T86 is not set | ||
1092 | CONFIG_RTC_DRV_AT91RM9200=m | ||
1093 | # CONFIG_RTC_DRV_TEST is not set | ||
1094 | # CONFIG_RTC_DRV_V3020 is not set | ||
1095 | |||
1096 | # | ||
1097 | # File systems | ||
1098 | # | ||
1099 | CONFIG_EXT2_FS=m | ||
1100 | # CONFIG_EXT2_FS_XATTR is not set | ||
1101 | # CONFIG_EXT2_FS_XIP is not set | ||
1102 | CONFIG_EXT3_FS=m | ||
1103 | # CONFIG_EXT3_FS_XATTR is not set | ||
1104 | # CONFIG_EXT4DEV_FS is not set | ||
1105 | CONFIG_JBD=m | ||
1106 | # CONFIG_JBD_DEBUG is not set | ||
1107 | # CONFIG_REISERFS_FS is not set | ||
1108 | # CONFIG_JFS_FS is not set | ||
1109 | # CONFIG_FS_POSIX_ACL is not set | ||
1110 | # CONFIG_XFS_FS is not set | ||
1111 | # CONFIG_GFS2_FS is not set | ||
1112 | # CONFIG_OCFS2_FS is not set | ||
1113 | # CONFIG_MINIX_FS is not set | ||
1114 | # CONFIG_ROMFS_FS is not set | ||
1115 | CONFIG_INOTIFY=y | ||
1116 | CONFIG_INOTIFY_USER=y | ||
1117 | # CONFIG_QUOTA is not set | ||
1118 | CONFIG_DNOTIFY=y | ||
1119 | # CONFIG_AUTOFS_FS is not set | ||
1120 | # CONFIG_AUTOFS4_FS is not set | ||
1121 | # CONFIG_FUSE_FS is not set | ||
1122 | |||
1123 | # | ||
1124 | # CD-ROM/DVD Filesystems | ||
1125 | # | ||
1126 | CONFIG_ISO9660_FS=m | ||
1127 | CONFIG_JOLIET=y | ||
1128 | # CONFIG_ZISOFS is not set | ||
1129 | CONFIG_UDF_FS=m | ||
1130 | CONFIG_UDF_NLS=y | ||
1131 | |||
1132 | # | ||
1133 | # DOS/FAT/NT Filesystems | ||
1134 | # | ||
1135 | CONFIG_FAT_FS=m | ||
1136 | CONFIG_MSDOS_FS=m | ||
1137 | CONFIG_VFAT_FS=m | ||
1138 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
1139 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
1140 | CONFIG_NTFS_FS=m | ||
1141 | # CONFIG_NTFS_DEBUG is not set | ||
1142 | # CONFIG_NTFS_RW is not set | ||
1143 | |||
1144 | # | ||
1145 | # Pseudo filesystems | ||
1146 | # | ||
1147 | CONFIG_PROC_FS=y | ||
1148 | CONFIG_PROC_SYSCTL=y | ||
1149 | CONFIG_SYSFS=y | ||
1150 | CONFIG_TMPFS=y | ||
1151 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
1152 | # CONFIG_HUGETLB_PAGE is not set | ||
1153 | CONFIG_RAMFS=y | ||
1154 | # CONFIG_CONFIGFS_FS is not set | ||
1155 | |||
1156 | # | ||
1157 | # Miscellaneous filesystems | ||
1158 | # | ||
1159 | # CONFIG_ADFS_FS is not set | ||
1160 | # CONFIG_AFFS_FS is not set | ||
1161 | # CONFIG_HFS_FS is not set | ||
1162 | # CONFIG_HFSPLUS_FS is not set | ||
1163 | # CONFIG_BEFS_FS is not set | ||
1164 | # CONFIG_BFS_FS is not set | ||
1165 | # CONFIG_EFS_FS is not set | ||
1166 | CONFIG_JFFS2_FS=y | ||
1167 | CONFIG_JFFS2_FS_DEBUG=0 | ||
1168 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
1169 | CONFIG_JFFS2_SUMMARY=y | ||
1170 | # CONFIG_JFFS2_FS_XATTR is not set | ||
1171 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
1172 | CONFIG_JFFS2_ZLIB=y | ||
1173 | CONFIG_JFFS2_RTIME=y | ||
1174 | # CONFIG_JFFS2_RUBIN is not set | ||
1175 | # CONFIG_JFFS2_CMODE_NONE is not set | ||
1176 | CONFIG_JFFS2_CMODE_PRIORITY=y | ||
1177 | # CONFIG_JFFS2_CMODE_SIZE is not set | ||
1178 | # CONFIG_CRAMFS is not set | ||
1179 | # CONFIG_VXFS_FS is not set | ||
1180 | # CONFIG_HPFS_FS is not set | ||
1181 | # CONFIG_QNX4FS_FS is not set | ||
1182 | # CONFIG_SYSV_FS is not set | ||
1183 | # CONFIG_UFS_FS is not set | ||
1184 | |||
1185 | # | ||
1186 | # Network File Systems | ||
1187 | # | ||
1188 | CONFIG_NFS_FS=m | ||
1189 | # CONFIG_NFS_V3 is not set | ||
1190 | # CONFIG_NFS_V4 is not set | ||
1191 | # CONFIG_NFS_DIRECTIO is not set | ||
1192 | # CONFIG_NFSD is not set | ||
1193 | CONFIG_LOCKD=m | ||
1194 | CONFIG_NFS_COMMON=y | ||
1195 | CONFIG_SUNRPC=m | ||
1196 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
1197 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
1198 | CONFIG_SMB_FS=m | ||
1199 | # CONFIG_SMB_NLS_DEFAULT is not set | ||
1200 | CONFIG_CIFS=m | ||
1201 | # CONFIG_CIFS_STATS is not set | ||
1202 | # CONFIG_CIFS_WEAK_PW_HASH is not set | ||
1203 | # CONFIG_CIFS_XATTR is not set | ||
1204 | # CONFIG_CIFS_DEBUG2 is not set | ||
1205 | # CONFIG_CIFS_EXPERIMENTAL is not set | ||
1206 | # CONFIG_NCP_FS is not set | ||
1207 | # CONFIG_CODA_FS is not set | ||
1208 | # CONFIG_AFS_FS is not set | ||
1209 | # CONFIG_9P_FS is not set | ||
1210 | |||
1211 | # | ||
1212 | # Partition Types | ||
1213 | # | ||
1214 | CONFIG_PARTITION_ADVANCED=y | ||
1215 | # CONFIG_ACORN_PARTITION is not set | ||
1216 | # CONFIG_OSF_PARTITION is not set | ||
1217 | CONFIG_AMIGA_PARTITION=y | ||
1218 | # CONFIG_ATARI_PARTITION is not set | ||
1219 | # CONFIG_MAC_PARTITION is not set | ||
1220 | CONFIG_MSDOS_PARTITION=y | ||
1221 | # CONFIG_BSD_DISKLABEL is not set | ||
1222 | # CONFIG_MINIX_SUBPARTITION is not set | ||
1223 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
1224 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
1225 | # CONFIG_LDM_PARTITION is not set | ||
1226 | # CONFIG_SGI_PARTITION is not set | ||
1227 | # CONFIG_ULTRIX_PARTITION is not set | ||
1228 | # CONFIG_SUN_PARTITION is not set | ||
1229 | # CONFIG_KARMA_PARTITION is not set | ||
1230 | # CONFIG_EFI_PARTITION is not set | ||
1231 | |||
1232 | # | ||
1233 | # Native Language Support | ||
1234 | # | ||
1235 | CONFIG_NLS=m | ||
1236 | CONFIG_NLS_DEFAULT="utf-8" | ||
1237 | CONFIG_NLS_CODEPAGE_437=m | ||
1238 | CONFIG_NLS_CODEPAGE_737=m | ||
1239 | CONFIG_NLS_CODEPAGE_775=m | ||
1240 | CONFIG_NLS_CODEPAGE_850=m | ||
1241 | CONFIG_NLS_CODEPAGE_852=m | ||
1242 | CONFIG_NLS_CODEPAGE_855=m | ||
1243 | CONFIG_NLS_CODEPAGE_857=m | ||
1244 | CONFIG_NLS_CODEPAGE_860=m | ||
1245 | CONFIG_NLS_CODEPAGE_861=m | ||
1246 | CONFIG_NLS_CODEPAGE_862=m | ||
1247 | CONFIG_NLS_CODEPAGE_863=m | ||
1248 | CONFIG_NLS_CODEPAGE_864=m | ||
1249 | CONFIG_NLS_CODEPAGE_865=m | ||
1250 | CONFIG_NLS_CODEPAGE_866=m | ||
1251 | CONFIG_NLS_CODEPAGE_869=m | ||
1252 | CONFIG_NLS_CODEPAGE_936=m | ||
1253 | CONFIG_NLS_CODEPAGE_950=m | ||
1254 | CONFIG_NLS_CODEPAGE_932=m | ||
1255 | CONFIG_NLS_CODEPAGE_949=m | ||
1256 | CONFIG_NLS_CODEPAGE_874=m | ||
1257 | CONFIG_NLS_ISO8859_8=m | ||
1258 | CONFIG_NLS_CODEPAGE_1250=m | ||
1259 | CONFIG_NLS_CODEPAGE_1251=m | ||
1260 | CONFIG_NLS_ASCII=m | ||
1261 | CONFIG_NLS_ISO8859_1=m | ||
1262 | CONFIG_NLS_ISO8859_2=m | ||
1263 | CONFIG_NLS_ISO8859_3=m | ||
1264 | CONFIG_NLS_ISO8859_4=m | ||
1265 | CONFIG_NLS_ISO8859_5=m | ||
1266 | CONFIG_NLS_ISO8859_6=m | ||
1267 | CONFIG_NLS_ISO8859_7=m | ||
1268 | CONFIG_NLS_ISO8859_9=m | ||
1269 | CONFIG_NLS_ISO8859_13=m | ||
1270 | CONFIG_NLS_ISO8859_14=m | ||
1271 | CONFIG_NLS_ISO8859_15=m | ||
1272 | CONFIG_NLS_KOI8_R=m | ||
1273 | CONFIG_NLS_KOI8_U=m | ||
1274 | CONFIG_NLS_UTF8=m | ||
1275 | |||
1276 | # | ||
1277 | # Distributed Lock Manager | ||
1278 | # | ||
1279 | # CONFIG_DLM is not set | ||
1280 | |||
1281 | # | ||
1282 | # Profiling support | ||
1283 | # | ||
1284 | # CONFIG_PROFILING is not set | ||
1285 | |||
1286 | # | ||
1287 | # Kernel hacking | ||
1288 | # | ||
1289 | # CONFIG_PRINTK_TIME is not set | ||
1290 | CONFIG_ENABLE_MUST_CHECK=y | ||
1291 | # CONFIG_MAGIC_SYSRQ is not set | ||
1292 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1293 | # CONFIG_DEBUG_FS is not set | ||
1294 | # CONFIG_HEADERS_CHECK is not set | ||
1295 | CONFIG_DEBUG_KERNEL=y | ||
1296 | # CONFIG_DEBUG_SHIRQ is not set | ||
1297 | CONFIG_LOG_BUF_SHIFT=14 | ||
1298 | CONFIG_DETECT_SOFTLOCKUP=y | ||
1299 | # CONFIG_SCHEDSTATS is not set | ||
1300 | # CONFIG_TIMER_STATS is not set | ||
1301 | # CONFIG_DEBUG_SLAB is not set | ||
1302 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
1303 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1304 | # CONFIG_DEBUG_SPINLOCK is not set | ||
1305 | # CONFIG_DEBUG_MUTEXES is not set | ||
1306 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
1307 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1308 | # CONFIG_DEBUG_KOBJECT is not set | ||
1309 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
1310 | # CONFIG_DEBUG_INFO is not set | ||
1311 | # CONFIG_DEBUG_VM is not set | ||
1312 | # CONFIG_DEBUG_LIST is not set | ||
1313 | CONFIG_FRAME_POINTER=y | ||
1314 | # CONFIG_FORCED_INLINING is not set | ||
1315 | # CONFIG_RCU_TORTURE_TEST is not set | ||
1316 | # CONFIG_FAULT_INJECTION is not set | ||
1317 | # CONFIG_DEBUG_USER is not set | ||
1318 | # CONFIG_DEBUG_ERRORS is not set | ||
1319 | CONFIG_DEBUG_LL=y | ||
1320 | # CONFIG_DEBUG_ICEDCC is not set | ||
1321 | |||
1322 | # | ||
1323 | # Security options | ||
1324 | # | ||
1325 | # CONFIG_KEYS is not set | ||
1326 | # CONFIG_SECURITY is not set | ||
1327 | |||
1328 | # | ||
1329 | # Cryptographic options | ||
1330 | # | ||
1331 | CONFIG_CRYPTO=y | ||
1332 | CONFIG_CRYPTO_ALGAPI=m | ||
1333 | CONFIG_CRYPTO_BLKCIPHER=m | ||
1334 | CONFIG_CRYPTO_HASH=m | ||
1335 | CONFIG_CRYPTO_MANAGER=m | ||
1336 | CONFIG_CRYPTO_HMAC=m | ||
1337 | CONFIG_CRYPTO_XCBC=m | ||
1338 | CONFIG_CRYPTO_NULL=m | ||
1339 | CONFIG_CRYPTO_MD4=m | ||
1340 | CONFIG_CRYPTO_MD5=m | ||
1341 | CONFIG_CRYPTO_SHA1=m | ||
1342 | CONFIG_CRYPTO_SHA256=m | ||
1343 | CONFIG_CRYPTO_SHA512=m | ||
1344 | CONFIG_CRYPTO_WP512=m | ||
1345 | CONFIG_CRYPTO_TGR192=m | ||
1346 | CONFIG_CRYPTO_GF128MUL=m | ||
1347 | CONFIG_CRYPTO_ECB=m | ||
1348 | CONFIG_CRYPTO_CBC=m | ||
1349 | CONFIG_CRYPTO_PCBC=m | ||
1350 | CONFIG_CRYPTO_LRW=m | ||
1351 | CONFIG_CRYPTO_DES=m | ||
1352 | CONFIG_CRYPTO_FCRYPT=m | ||
1353 | CONFIG_CRYPTO_BLOWFISH=m | ||
1354 | CONFIG_CRYPTO_TWOFISH=m | ||
1355 | CONFIG_CRYPTO_TWOFISH_COMMON=m | ||
1356 | CONFIG_CRYPTO_SERPENT=m | ||
1357 | CONFIG_CRYPTO_AES=m | ||
1358 | CONFIG_CRYPTO_CAST5=m | ||
1359 | CONFIG_CRYPTO_CAST6=m | ||
1360 | CONFIG_CRYPTO_TEA=m | ||
1361 | CONFIG_CRYPTO_ARC4=m | ||
1362 | CONFIG_CRYPTO_KHAZAD=m | ||
1363 | CONFIG_CRYPTO_ANUBIS=m | ||
1364 | CONFIG_CRYPTO_DEFLATE=m | ||
1365 | CONFIG_CRYPTO_MICHAEL_MIC=m | ||
1366 | CONFIG_CRYPTO_CRC32C=m | ||
1367 | CONFIG_CRYPTO_CAMELLIA=m | ||
1368 | CONFIG_CRYPTO_TEST=m | ||
1369 | |||
1370 | # | ||
1371 | # Hardware crypto devices | ||
1372 | # | ||
1373 | |||
1374 | # | ||
1375 | # Library routines | ||
1376 | # | ||
1377 | CONFIG_BITREVERSE=y | ||
1378 | CONFIG_CRC_CCITT=m | ||
1379 | CONFIG_CRC16=m | ||
1380 | CONFIG_CRC32=y | ||
1381 | CONFIG_LIBCRC32C=m | ||
1382 | CONFIG_ZLIB_INFLATE=y | ||
1383 | CONFIG_ZLIB_DEFLATE=y | ||
1384 | CONFIG_PLIST=y | ||
1385 | CONFIG_HAS_IOMEM=y | ||
1386 | CONFIG_HAS_IOPORT=y | ||
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index bb28087bf818..593b56509f4f 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile | |||
@@ -7,8 +7,8 @@ AFLAGS_head.o := -DTEXT_OFFSET=$(TEXT_OFFSET) | |||
7 | # Object file lists. | 7 | # Object file lists. |
8 | 8 | ||
9 | obj-y := compat.o entry-armv.o entry-common.o irq.o \ | 9 | obj-y := compat.o entry-armv.o entry-common.o irq.o \ |
10 | process.o ptrace.o semaphore.o setup.o signal.o sys_arm.o \ | 10 | process.o ptrace.o semaphore.o setup.o signal.o \ |
11 | time.o traps.o | 11 | sys_arm.o stacktrace.o time.o traps.o |
12 | 12 | ||
13 | obj-$(CONFIG_ISA_DMA_API) += dma.o | 13 | obj-$(CONFIG_ISA_DMA_API) += dma.o |
14 | obj-$(CONFIG_ARCH_ACORN) += ecard.o | 14 | obj-$(CONFIG_ARCH_ACORN) += ecard.o |
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c index f1c0fb974177..bdbd7da99286 100644 --- a/arch/arm/kernel/ecard.c +++ b/arch/arm/kernel/ecard.c | |||
@@ -40,6 +40,7 @@ | |||
40 | #include <linux/device.h> | 40 | #include <linux/device.h> |
41 | #include <linux/init.h> | 41 | #include <linux/init.h> |
42 | #include <linux/mutex.h> | 42 | #include <linux/mutex.h> |
43 | #include <linux/kthread.h> | ||
43 | 44 | ||
44 | #include <asm/dma.h> | 45 | #include <asm/dma.h> |
45 | #include <asm/ecard.h> | 46 | #include <asm/ecard.h> |
@@ -50,6 +51,8 @@ | |||
50 | #include <asm/mach/irq.h> | 51 | #include <asm/mach/irq.h> |
51 | #include <asm/tlbflush.h> | 52 | #include <asm/tlbflush.h> |
52 | 53 | ||
54 | #include "ecard.h" | ||
55 | |||
53 | #ifndef CONFIG_ARCH_RPC | 56 | #ifndef CONFIG_ARCH_RPC |
54 | #define HAVE_EXPMASK | 57 | #define HAVE_EXPMASK |
55 | #endif | 58 | #endif |
@@ -123,7 +126,7 @@ static void ecard_task_reset(struct ecard_request *req) | |||
123 | 126 | ||
124 | res = ec->slot_no == 8 | 127 | res = ec->slot_no == 8 |
125 | ? &ec->resource[ECARD_RES_MEMC] | 128 | ? &ec->resource[ECARD_RES_MEMC] |
126 | : ec->type == ECARD_EASI | 129 | : ec->easi |
127 | ? &ec->resource[ECARD_RES_EASI] | 130 | ? &ec->resource[ECARD_RES_EASI] |
128 | : &ec->resource[ECARD_RES_IOCSYNC]; | 131 | : &ec->resource[ECARD_RES_IOCSYNC]; |
129 | 132 | ||
@@ -178,7 +181,7 @@ static void ecard_task_readbytes(struct ecard_request *req) | |||
178 | index += 1; | 181 | index += 1; |
179 | } | 182 | } |
180 | } else { | 183 | } else { |
181 | unsigned long base = (ec->type == ECARD_EASI | 184 | unsigned long base = (ec->easi |
182 | ? &ec->resource[ECARD_RES_EASI] | 185 | ? &ec->resource[ECARD_RES_EASI] |
183 | : &ec->resource[ECARD_RES_IOCSYNC])->start; | 186 | : &ec->resource[ECARD_RES_IOCSYNC])->start; |
184 | void __iomem *pbase = (void __iomem *)base; | 187 | void __iomem *pbase = (void __iomem *)base; |
@@ -263,8 +266,6 @@ static int ecard_init_mm(void) | |||
263 | static int | 266 | static int |
264 | ecard_task(void * unused) | 267 | ecard_task(void * unused) |
265 | { | 268 | { |
266 | daemonize("kecardd"); | ||
267 | |||
268 | /* | 269 | /* |
269 | * Allocate a mm. We're not a lazy-TLB kernel task since we need | 270 | * Allocate a mm. We're not a lazy-TLB kernel task since we need |
270 | * to set page table entries where the user space would be. Note | 271 | * to set page table entries where the user space would be. Note |
@@ -727,7 +728,7 @@ static int ecard_prints(char *buffer, ecard_t *ec) | |||
727 | char *start = buffer; | 728 | char *start = buffer; |
728 | 729 | ||
729 | buffer += sprintf(buffer, " %d: %s ", ec->slot_no, | 730 | buffer += sprintf(buffer, " %d: %s ", ec->slot_no, |
730 | ec->type == ECARD_EASI ? "EASI" : " "); | 731 | ec->easi ? "EASI" : " "); |
731 | 732 | ||
732 | if (ec->cid.id == 0) { | 733 | if (ec->cid.id == 0) { |
733 | struct in_chunk_dir incd; | 734 | struct in_chunk_dir incd; |
@@ -814,7 +815,7 @@ static struct expansion_card *__init ecard_alloc_card(int type, int slot) | |||
814 | } | 815 | } |
815 | 816 | ||
816 | ec->slot_no = slot; | 817 | ec->slot_no = slot; |
817 | ec->type = type; | 818 | ec->easi = type == ECARD_EASI; |
818 | ec->irq = NO_IRQ; | 819 | ec->irq = NO_IRQ; |
819 | ec->fiq = NO_IRQ; | 820 | ec->fiq = NO_IRQ; |
820 | ec->dma = NO_DMA; | 821 | ec->dma = NO_DMA; |
@@ -825,6 +826,7 @@ static struct expansion_card *__init ecard_alloc_card(int type, int slot) | |||
825 | ec->dev.bus = &ecard_bus_type; | 826 | ec->dev.bus = &ecard_bus_type; |
826 | ec->dev.dma_mask = &ec->dma_mask; | 827 | ec->dev.dma_mask = &ec->dma_mask; |
827 | ec->dma_mask = (u64)0xffffffff; | 828 | ec->dma_mask = (u64)0xffffffff; |
829 | ec->dev.coherent_dma_mask = ec->dma_mask; | ||
828 | 830 | ||
829 | if (slot < 4) { | 831 | if (slot < 4) { |
830 | ec_set_resource(ec, ECARD_RES_MEMC, | 832 | ec_set_resource(ec, ECARD_RES_MEMC, |
@@ -907,7 +909,7 @@ static ssize_t ecard_show_device(struct device *dev, struct device_attribute *at | |||
907 | static ssize_t ecard_show_type(struct device *dev, struct device_attribute *attr, char *buf) | 909 | static ssize_t ecard_show_type(struct device *dev, struct device_attribute *attr, char *buf) |
908 | { | 910 | { |
909 | struct expansion_card *ec = ECARD_DEV(dev); | 911 | struct expansion_card *ec = ECARD_DEV(dev); |
910 | return sprintf(buf, "%s\n", ec->type == ECARD_EASI ? "EASI" : "IOC"); | 912 | return sprintf(buf, "%s\n", ec->easi ? "EASI" : "IOC"); |
911 | } | 913 | } |
912 | 914 | ||
913 | static struct device_attribute ecard_dev_attrs[] = { | 915 | static struct device_attribute ecard_dev_attrs[] = { |
@@ -1058,13 +1060,14 @@ ecard_probe(int slot, card_type_t type) | |||
1058 | */ | 1060 | */ |
1059 | static int __init ecard_init(void) | 1061 | static int __init ecard_init(void) |
1060 | { | 1062 | { |
1061 | int slot, irqhw, ret; | 1063 | struct task_struct *task; |
1062 | 1064 | int slot, irqhw; | |
1063 | ret = kernel_thread(ecard_task, NULL, CLONE_KERNEL); | 1065 | |
1064 | if (ret < 0) { | 1066 | task = kthread_run(ecard_task, NULL, "kecardd"); |
1065 | printk(KERN_ERR "Ecard: unable to create kernel thread: %d\n", | 1067 | if (IS_ERR(task)) { |
1066 | ret); | 1068 | printk(KERN_ERR "Ecard: unable to create kernel thread: %ld\n", |
1067 | return ret; | 1069 | PTR_ERR(task)); |
1070 | return PTR_ERR(task); | ||
1068 | } | 1071 | } |
1069 | 1072 | ||
1070 | printk("Probing expansion cards\n"); | 1073 | printk("Probing expansion cards\n"); |
diff --git a/arch/arm/kernel/ecard.h b/arch/arm/kernel/ecard.h new file mode 100644 index 000000000000..d7c2dacf935d --- /dev/null +++ b/arch/arm/kernel/ecard.h | |||
@@ -0,0 +1,56 @@ | |||
1 | /* | ||
2 | * ecard.h | ||
3 | * | ||
4 | * Copyright 2007 Russell King | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | /* Definitions internal to ecard.c - for it's use only!! | ||
12 | * | ||
13 | * External expansion card header as read from the card | ||
14 | */ | ||
15 | struct ex_ecid { | ||
16 | unsigned char r_irq:1; | ||
17 | unsigned char r_zero:1; | ||
18 | unsigned char r_fiq:1; | ||
19 | unsigned char r_id:4; | ||
20 | unsigned char r_a:1; | ||
21 | |||
22 | unsigned char r_cd:1; | ||
23 | unsigned char r_is:1; | ||
24 | unsigned char r_w:2; | ||
25 | unsigned char r_r1:4; | ||
26 | |||
27 | unsigned char r_r2:8; | ||
28 | |||
29 | unsigned char r_prod[2]; | ||
30 | |||
31 | unsigned char r_manu[2]; | ||
32 | |||
33 | unsigned char r_country; | ||
34 | |||
35 | unsigned char r_fiqmask; | ||
36 | unsigned char r_fiqoff[3]; | ||
37 | |||
38 | unsigned char r_irqmask; | ||
39 | unsigned char r_irqoff[3]; | ||
40 | }; | ||
41 | |||
42 | /* | ||
43 | * Chunk directory entry as read from the card | ||
44 | */ | ||
45 | struct ex_chunk_dir { | ||
46 | unsigned char r_id; | ||
47 | unsigned char r_len[3]; | ||
48 | unsigned long r_start; | ||
49 | union { | ||
50 | char string[256]; | ||
51 | char data[1]; | ||
52 | } d; | ||
53 | #define c_id(x) ((x)->r_id) | ||
54 | #define c_len(x) ((x)->r_len[0]|((x)->r_len[1]<<8)|((x)->r_len[2]<<16)) | ||
55 | #define c_start(x) ((x)->r_start) | ||
56 | }; | ||
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 66db0a9bf0bc..1d35edacc011 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S | |||
@@ -257,7 +257,9 @@ __create_page_tables: | |||
257 | * Map some ram to cover our .data and .bss areas. | 257 | * Map some ram to cover our .data and .bss areas. |
258 | */ | 258 | */ |
259 | orr r3, r7, #(KERNEL_RAM_PADDR & 0xff000000) | 259 | orr r3, r7, #(KERNEL_RAM_PADDR & 0xff000000) |
260 | .if (KERNEL_RAM_PADDR & 0x00f00000) | ||
260 | orr r3, r3, #(KERNEL_RAM_PADDR & 0x00f00000) | 261 | orr r3, r3, #(KERNEL_RAM_PADDR & 0x00f00000) |
262 | .endif | ||
261 | add r0, r4, #(KERNEL_RAM_VADDR & 0xff000000) >> 18 | 263 | add r0, r4, #(KERNEL_RAM_VADDR & 0xff000000) >> 18 |
262 | str r3, [r0, #(KERNEL_RAM_VADDR & 0x00f00000) >> 18]! | 264 | str r3, [r0, #(KERNEL_RAM_VADDR & 0x00f00000) >> 18]! |
263 | ldr r6, =(_end - 1) | 265 | ldr r6, =(_end - 1) |
@@ -274,7 +276,9 @@ __create_page_tables: | |||
274 | */ | 276 | */ |
275 | add r0, r4, #PAGE_OFFSET >> 18 | 277 | add r0, r4, #PAGE_OFFSET >> 18 |
276 | orr r6, r7, #(PHYS_OFFSET & 0xff000000) | 278 | orr r6, r7, #(PHYS_OFFSET & 0xff000000) |
277 | orr r6, r6, #(PHYS_OFFSET & 0x00e00000) | 279 | .if (PHYS_OFFSET & 0x00f00000) |
280 | orr r6, r6, #(PHYS_OFFSET & 0x00f00000) | ||
281 | .endif | ||
278 | str r6, [r0] | 282 | str r6, [r0] |
279 | 283 | ||
280 | #ifdef CONFIG_DEBUG_LL | 284 | #ifdef CONFIG_DEBUG_LL |
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index e101846ab7dd..11dcd52e51be 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c | |||
@@ -27,7 +27,6 @@ | |||
27 | #include <linux/ioport.h> | 27 | #include <linux/ioport.h> |
28 | #include <linux/interrupt.h> | 28 | #include <linux/interrupt.h> |
29 | #include <linux/irq.h> | 29 | #include <linux/irq.h> |
30 | #include <linux/ptrace.h> | ||
31 | #include <linux/slab.h> | 30 | #include <linux/slab.h> |
32 | #include <linux/random.h> | 31 | #include <linux/random.h> |
33 | #include <linux/smp.h> | 32 | #include <linux/smp.h> |
@@ -109,7 +108,7 @@ static struct irq_desc bad_irq_desc = { | |||
109 | * come via this function. Instead, they should provide their | 108 | * come via this function. Instead, they should provide their |
110 | * own 'handler' | 109 | * own 'handler' |
111 | */ | 110 | */ |
112 | asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs) | 111 | asmlinkage void __exception asm_do_IRQ(unsigned int irq, struct pt_regs *regs) |
113 | { | 112 | { |
114 | struct pt_regs *old_regs = set_irq_regs(regs); | 113 | struct pt_regs *old_regs = set_irq_regs(regs); |
115 | struct irq_desc *desc = irq_desc + irq; | 114 | struct irq_desc *desc = irq_desc + irq; |
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 782af3cb213f..5d6e6523598b 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c | |||
@@ -16,7 +16,6 @@ | |||
16 | #include <linux/mm.h> | 16 | #include <linux/mm.h> |
17 | #include <linux/stddef.h> | 17 | #include <linux/stddef.h> |
18 | #include <linux/unistd.h> | 18 | #include <linux/unistd.h> |
19 | #include <linux/ptrace.h> | ||
20 | #include <linux/slab.h> | 19 | #include <linux/slab.h> |
21 | #include <linux/user.h> | 20 | #include <linux/user.h> |
22 | #include <linux/a.out.h> | 21 | #include <linux/a.out.h> |
@@ -28,6 +27,7 @@ | |||
28 | #include <linux/cpu.h> | 27 | #include <linux/cpu.h> |
29 | #include <linux/elfcore.h> | 28 | #include <linux/elfcore.h> |
30 | #include <linux/pm.h> | 29 | #include <linux/pm.h> |
30 | #include <linux/tick.h> | ||
31 | 31 | ||
32 | #include <asm/leds.h> | 32 | #include <asm/leds.h> |
33 | #include <asm/processor.h> | 33 | #include <asm/processor.h> |
@@ -160,9 +160,11 @@ void cpu_idle(void) | |||
160 | if (!idle) | 160 | if (!idle) |
161 | idle = default_idle; | 161 | idle = default_idle; |
162 | leds_event(led_idle_start); | 162 | leds_event(led_idle_start); |
163 | tick_nohz_stop_sched_tick(); | ||
163 | while (!need_resched()) | 164 | while (!need_resched()) |
164 | idle(); | 165 | idle(); |
165 | leds_event(led_idle_end); | 166 | leds_event(led_idle_end); |
167 | tick_nohz_restart_sched_tick(); | ||
166 | preempt_enable_no_resched(); | 168 | preempt_enable_no_resched(); |
167 | schedule(); | 169 | schedule(); |
168 | preempt_disable(); | 170 | preempt_disable(); |
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c index 9254ba2f46fc..13af4006a40f 100644 --- a/arch/arm/kernel/ptrace.c +++ b/arch/arm/kernel/ptrace.c | |||
@@ -457,13 +457,10 @@ void ptrace_cancel_bpt(struct task_struct *child) | |||
457 | 457 | ||
458 | /* | 458 | /* |
459 | * Called by kernel/ptrace.c when detaching.. | 459 | * Called by kernel/ptrace.c when detaching.. |
460 | * | ||
461 | * Make sure the single step bit is not set. | ||
462 | */ | 460 | */ |
463 | void ptrace_disable(struct task_struct *child) | 461 | void ptrace_disable(struct task_struct *child) |
464 | { | 462 | { |
465 | child->ptrace &= ~PT_SINGLESTEP; | 463 | single_step_disable(child); |
466 | ptrace_cancel_bpt(child); | ||
467 | } | 464 | } |
468 | 465 | ||
469 | /* | 466 | /* |
@@ -712,9 +709,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
712 | else | 709 | else |
713 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | 710 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); |
714 | child->exit_code = data; | 711 | child->exit_code = data; |
715 | /* make sure single-step breakpoint is gone. */ | 712 | single_step_disable(child); |
716 | child->ptrace &= ~PT_SINGLESTEP; | ||
717 | ptrace_cancel_bpt(child); | ||
718 | wake_up_process(child); | 713 | wake_up_process(child); |
719 | ret = 0; | 714 | ret = 0; |
720 | break; | 715 | break; |
@@ -725,9 +720,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
725 | * exit. | 720 | * exit. |
726 | */ | 721 | */ |
727 | case PTRACE_KILL: | 722 | case PTRACE_KILL: |
728 | /* make sure single-step breakpoint is gone. */ | 723 | single_step_disable(child); |
729 | child->ptrace &= ~PT_SINGLESTEP; | ||
730 | ptrace_cancel_bpt(child); | ||
731 | if (child->exit_state != EXIT_ZOMBIE) { | 724 | if (child->exit_state != EXIT_ZOMBIE) { |
732 | child->exit_code = SIGKILL; | 725 | child->exit_code = SIGKILL; |
733 | wake_up_process(child); | 726 | wake_up_process(child); |
@@ -742,7 +735,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
742 | ret = -EIO; | 735 | ret = -EIO; |
743 | if (!valid_signal(data)) | 736 | if (!valid_signal(data)) |
744 | break; | 737 | break; |
745 | child->ptrace |= PT_SINGLESTEP; | 738 | single_step_enable(child); |
746 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | 739 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); |
747 | child->exit_code = data; | 740 | child->exit_code = data; |
748 | /* give it a chance to run. */ | 741 | /* give it a chance to run. */ |
@@ -786,8 +779,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
786 | break; | 779 | break; |
787 | 780 | ||
788 | case PTRACE_SET_SYSCALL: | 781 | case PTRACE_SET_SYSCALL: |
782 | task_thread_info(child)->syscall = data; | ||
789 | ret = 0; | 783 | ret = 0; |
790 | child->ptrace_message = data; | ||
791 | break; | 784 | break; |
792 | 785 | ||
793 | #ifdef CONFIG_CRUNCH | 786 | #ifdef CONFIG_CRUNCH |
@@ -824,7 +817,7 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) | |||
824 | ip = regs->ARM_ip; | 817 | ip = regs->ARM_ip; |
825 | regs->ARM_ip = why; | 818 | regs->ARM_ip = why; |
826 | 819 | ||
827 | current->ptrace_message = scno; | 820 | current_thread_info()->syscall = scno; |
828 | 821 | ||
829 | /* the 0x80 provides a way for the tracing parent to distinguish | 822 | /* the 0x80 provides a way for the tracing parent to distinguish |
830 | between a syscall stop and SIGTRAP delivery */ | 823 | between a syscall stop and SIGTRAP delivery */ |
@@ -841,5 +834,5 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) | |||
841 | } | 834 | } |
842 | regs->ARM_ip = ip; | 835 | regs->ARM_ip = ip; |
843 | 836 | ||
844 | return current->ptrace_message; | 837 | return current_thread_info()->syscall; |
845 | } | 838 | } |
diff --git a/arch/arm/kernel/ptrace.h b/arch/arm/kernel/ptrace.h index f7cad13a22e9..def3b6184a79 100644 --- a/arch/arm/kernel/ptrace.h +++ b/arch/arm/kernel/ptrace.h | |||
@@ -7,6 +7,45 @@ | |||
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | #include <linux/ptrace.h> | ||
11 | |||
10 | extern void ptrace_cancel_bpt(struct task_struct *); | 12 | extern void ptrace_cancel_bpt(struct task_struct *); |
11 | extern void ptrace_set_bpt(struct task_struct *); | 13 | extern void ptrace_set_bpt(struct task_struct *); |
12 | extern void ptrace_break(struct task_struct *, struct pt_regs *); | 14 | extern void ptrace_break(struct task_struct *, struct pt_regs *); |
15 | |||
16 | /* | ||
17 | * make sure single-step breakpoint is gone. | ||
18 | */ | ||
19 | static inline void single_step_disable(struct task_struct *task) | ||
20 | { | ||
21 | task->ptrace &= ~PT_SINGLESTEP; | ||
22 | ptrace_cancel_bpt(task); | ||
23 | } | ||
24 | |||
25 | static inline void single_step_enable(struct task_struct *task) | ||
26 | { | ||
27 | task->ptrace |= PT_SINGLESTEP; | ||
28 | } | ||
29 | |||
30 | /* | ||
31 | * Send SIGTRAP if we're single-stepping | ||
32 | */ | ||
33 | static inline void single_step_trap(struct task_struct *task) | ||
34 | { | ||
35 | if (task->ptrace & PT_SINGLESTEP) { | ||
36 | ptrace_cancel_bpt(task); | ||
37 | send_sig(SIGTRAP, task, 1); | ||
38 | } | ||
39 | } | ||
40 | |||
41 | static inline void single_step_clear(struct task_struct *task) | ||
42 | { | ||
43 | if (task->ptrace & PT_SINGLESTEP) | ||
44 | ptrace_cancel_bpt(task); | ||
45 | } | ||
46 | |||
47 | static inline void single_step_set(struct task_struct *task) | ||
48 | { | ||
49 | if (task->ptrace & PT_SINGLESTEP) | ||
50 | ptrace_set_bpt(task); | ||
51 | } | ||
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index 3843d3bab2dd..54cdf1aeefc3 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c | |||
@@ -9,7 +9,6 @@ | |||
9 | */ | 9 | */ |
10 | #include <linux/errno.h> | 10 | #include <linux/errno.h> |
11 | #include <linux/signal.h> | 11 | #include <linux/signal.h> |
12 | #include <linux/ptrace.h> | ||
13 | #include <linux/personality.h> | 12 | #include <linux/personality.h> |
14 | #include <linux/freezer.h> | 13 | #include <linux/freezer.h> |
15 | 14 | ||
@@ -285,11 +284,7 @@ asmlinkage int sys_sigreturn(struct pt_regs *regs) | |||
285 | if (restore_sigframe(regs, frame)) | 284 | if (restore_sigframe(regs, frame)) |
286 | goto badframe; | 285 | goto badframe; |
287 | 286 | ||
288 | /* Send SIGTRAP if we're single-stepping */ | 287 | single_step_trap(current); |
289 | if (current->ptrace & PT_SINGLESTEP) { | ||
290 | ptrace_cancel_bpt(current); | ||
291 | send_sig(SIGTRAP, current, 1); | ||
292 | } | ||
293 | 288 | ||
294 | return regs->ARM_r0; | 289 | return regs->ARM_r0; |
295 | 290 | ||
@@ -324,11 +319,7 @@ asmlinkage int sys_rt_sigreturn(struct pt_regs *regs) | |||
324 | if (do_sigaltstack(&frame->sig.uc.uc_stack, NULL, regs->ARM_sp) == -EFAULT) | 319 | if (do_sigaltstack(&frame->sig.uc.uc_stack, NULL, regs->ARM_sp) == -EFAULT) |
325 | goto badframe; | 320 | goto badframe; |
326 | 321 | ||
327 | /* Send SIGTRAP if we're single-stepping */ | 322 | single_step_trap(current); |
328 | if (current->ptrace & PT_SINGLESTEP) { | ||
329 | ptrace_cancel_bpt(current); | ||
330 | send_sig(SIGTRAP, current, 1); | ||
331 | } | ||
332 | 323 | ||
333 | return regs->ARM_r0; | 324 | return regs->ARM_r0; |
334 | 325 | ||
@@ -644,14 +635,12 @@ static int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall) | |||
644 | if (try_to_freeze()) | 635 | if (try_to_freeze()) |
645 | goto no_signal; | 636 | goto no_signal; |
646 | 637 | ||
647 | if (current->ptrace & PT_SINGLESTEP) | 638 | single_step_clear(current); |
648 | ptrace_cancel_bpt(current); | ||
649 | 639 | ||
650 | signr = get_signal_to_deliver(&info, &ka, regs, NULL); | 640 | signr = get_signal_to_deliver(&info, &ka, regs, NULL); |
651 | if (signr > 0) { | 641 | if (signr > 0) { |
652 | handle_signal(signr, &ka, &info, oldset, regs, syscall); | 642 | handle_signal(signr, &ka, &info, oldset, regs, syscall); |
653 | if (current->ptrace & PT_SINGLESTEP) | 643 | single_step_set(current); |
654 | ptrace_set_bpt(current); | ||
655 | return 1; | 644 | return 1; |
656 | } | 645 | } |
657 | 646 | ||
@@ -705,8 +694,7 @@ static int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall) | |||
705 | restart_syscall(regs); | 694 | restart_syscall(regs); |
706 | } | 695 | } |
707 | } | 696 | } |
708 | if (current->ptrace & PT_SINGLESTEP) | 697 | single_step_set(current); |
709 | ptrace_set_bpt(current); | ||
710 | return 0; | 698 | return 0; |
711 | } | 699 | } |
712 | 700 | ||
diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c new file mode 100644 index 000000000000..77ef35efaa8d --- /dev/null +++ b/arch/arm/kernel/stacktrace.c | |||
@@ -0,0 +1,73 @@ | |||
1 | #include <linux/sched.h> | ||
2 | #include <linux/stacktrace.h> | ||
3 | |||
4 | #include "stacktrace.h" | ||
5 | |||
6 | int walk_stackframe(unsigned long fp, unsigned long low, unsigned long high, | ||
7 | int (*fn)(struct stackframe *, void *), void *data) | ||
8 | { | ||
9 | struct stackframe *frame; | ||
10 | |||
11 | do { | ||
12 | /* | ||
13 | * Check current frame pointer is within bounds | ||
14 | */ | ||
15 | if ((fp - 12) < low || fp + 4 >= high) | ||
16 | break; | ||
17 | |||
18 | frame = (struct stackframe *)(fp - 12); | ||
19 | |||
20 | if (fn(frame, data)) | ||
21 | break; | ||
22 | |||
23 | /* | ||
24 | * Update the low bound - the next frame must always | ||
25 | * be at a higher address than the current frame. | ||
26 | */ | ||
27 | low = fp + 4; | ||
28 | fp = frame->fp; | ||
29 | } while (fp); | ||
30 | |||
31 | return 0; | ||
32 | } | ||
33 | |||
34 | #ifdef CONFIG_STACKTRACE | ||
35 | struct stack_trace_data { | ||
36 | struct stack_trace *trace; | ||
37 | unsigned int skip; | ||
38 | }; | ||
39 | |||
40 | static int save_trace(struct stackframe *frame, void *d) | ||
41 | { | ||
42 | struct stack_trace_data *data = d; | ||
43 | struct stack_trace *trace = data->trace; | ||
44 | |||
45 | if (data->skip) { | ||
46 | data->skip--; | ||
47 | return 0; | ||
48 | } | ||
49 | |||
50 | trace->entries[trace->nr_entries++] = frame->lr; | ||
51 | |||
52 | return trace->nr_entries >= trace->max_entries; | ||
53 | } | ||
54 | |||
55 | void save_stack_trace(struct stack_trace *trace, struct task_struct *task) | ||
56 | { | ||
57 | struct stack_trace_data data; | ||
58 | unsigned long fp, base; | ||
59 | |||
60 | data.trace = trace; | ||
61 | data.skip = trace->skip; | ||
62 | |||
63 | if (task) { | ||
64 | base = (unsigned long)task_stack_page(task); | ||
65 | fp = 0; /* FIXME */ | ||
66 | } else { | ||
67 | base = (unsigned long)task_stack_page(current); | ||
68 | asm("mov %0, fp" : "=r" (fp)); | ||
69 | } | ||
70 | |||
71 | walk_stackframe(fp, base, base + THREAD_SIZE, save_trace, &data); | ||
72 | } | ||
73 | #endif | ||
diff --git a/arch/arm/kernel/stacktrace.h b/arch/arm/kernel/stacktrace.h new file mode 100644 index 000000000000..e9fd20cb5662 --- /dev/null +++ b/arch/arm/kernel/stacktrace.h | |||
@@ -0,0 +1,9 @@ | |||
1 | struct stackframe { | ||
2 | unsigned long fp; | ||
3 | unsigned long sp; | ||
4 | unsigned long lr; | ||
5 | unsigned long pc; | ||
6 | }; | ||
7 | |||
8 | int walk_stackframe(unsigned long fp, unsigned long low, unsigned long high, | ||
9 | int (*fn)(struct stackframe *, void *), void *data); | ||
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c index f61decb89ba2..d0540e4eaf5b 100644 --- a/arch/arm/kernel/time.c +++ b/arch/arm/kernel/time.c | |||
@@ -327,6 +327,7 @@ void restore_time_delta(struct timespec *delta, struct timespec *rtc) | |||
327 | } | 327 | } |
328 | EXPORT_SYMBOL(restore_time_delta); | 328 | EXPORT_SYMBOL(restore_time_delta); |
329 | 329 | ||
330 | #ifndef CONFIG_GENERIC_CLOCKEVENTS | ||
330 | /* | 331 | /* |
331 | * Kernel system timer support. | 332 | * Kernel system timer support. |
332 | */ | 333 | */ |
@@ -340,8 +341,9 @@ void timer_tick(void) | |||
340 | update_process_times(user_mode(get_irq_regs())); | 341 | update_process_times(user_mode(get_irq_regs())); |
341 | #endif | 342 | #endif |
342 | } | 343 | } |
344 | #endif | ||
343 | 345 | ||
344 | #ifdef CONFIG_PM | 346 | #if defined(CONFIG_PM) && !defined(CONFIG_GENERIC_CLOCKEVENTS) |
345 | static int timer_suspend(struct sys_device *dev, pm_message_t state) | 347 | static int timer_suspend(struct sys_device *dev, pm_message_t state) |
346 | { | 348 | { |
347 | struct sys_timer *timer = container_of(dev, struct sys_timer, dev); | 349 | struct sys_timer *timer = container_of(dev, struct sys_timer, dev); |
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 24095601359b..f05e66b0f868 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c | |||
@@ -16,7 +16,6 @@ | |||
16 | #include <linux/signal.h> | 16 | #include <linux/signal.h> |
17 | #include <linux/spinlock.h> | 17 | #include <linux/spinlock.h> |
18 | #include <linux/personality.h> | 18 | #include <linux/personality.h> |
19 | #include <linux/ptrace.h> | ||
20 | #include <linux/kallsyms.h> | 19 | #include <linux/kallsyms.h> |
21 | #include <linux/delay.h> | 20 | #include <linux/delay.h> |
22 | #include <linux/init.h> | 21 | #include <linux/init.h> |
@@ -45,7 +44,18 @@ static int __init user_debug_setup(char *str) | |||
45 | __setup("user_debug=", user_debug_setup); | 44 | __setup("user_debug=", user_debug_setup); |
46 | #endif | 45 | #endif |
47 | 46 | ||
48 | void dump_backtrace_entry(unsigned long where, unsigned long from) | 47 | static void dump_mem(const char *str, unsigned long bottom, unsigned long top); |
48 | |||
49 | static inline int in_exception_text(unsigned long ptr) | ||
50 | { | ||
51 | extern char __exception_text_start[]; | ||
52 | extern char __exception_text_end[]; | ||
53 | |||
54 | return ptr >= (unsigned long)&__exception_text_start && | ||
55 | ptr < (unsigned long)&__exception_text_end; | ||
56 | } | ||
57 | |||
58 | void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame) | ||
49 | { | 59 | { |
50 | #ifdef CONFIG_KALLSYMS | 60 | #ifdef CONFIG_KALLSYMS |
51 | printk("[<%08lx>] ", where); | 61 | printk("[<%08lx>] ", where); |
@@ -55,6 +65,9 @@ void dump_backtrace_entry(unsigned long where, unsigned long from) | |||
55 | #else | 65 | #else |
56 | printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from); | 66 | printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from); |
57 | #endif | 67 | #endif |
68 | |||
69 | if (in_exception_text(where)) | ||
70 | dump_mem("Exception stack", frame + 4, frame + 4 + sizeof(struct pt_regs)); | ||
58 | } | 71 | } |
59 | 72 | ||
60 | /* | 73 | /* |
@@ -266,13 +279,14 @@ void unregister_undef_hook(struct undef_hook *hook) | |||
266 | spin_unlock_irqrestore(&undef_lock, flags); | 279 | spin_unlock_irqrestore(&undef_lock, flags); |
267 | } | 280 | } |
268 | 281 | ||
269 | asmlinkage void do_undefinstr(struct pt_regs *regs) | 282 | asmlinkage void __exception do_undefinstr(struct pt_regs *regs) |
270 | { | 283 | { |
271 | unsigned int correction = thumb_mode(regs) ? 2 : 4; | 284 | unsigned int correction = thumb_mode(regs) ? 2 : 4; |
272 | unsigned int instr; | 285 | unsigned int instr; |
273 | struct undef_hook *hook; | 286 | struct undef_hook *hook; |
274 | siginfo_t info; | 287 | siginfo_t info; |
275 | void __user *pc; | 288 | void __user *pc; |
289 | unsigned long flags; | ||
276 | 290 | ||
277 | /* | 291 | /* |
278 | * According to the ARM ARM, PC is 2 or 4 bytes ahead, | 292 | * According to the ARM ARM, PC is 2 or 4 bytes ahead, |
@@ -291,7 +305,7 @@ asmlinkage void do_undefinstr(struct pt_regs *regs) | |||
291 | get_user(instr, (u32 __user *)pc); | 305 | get_user(instr, (u32 __user *)pc); |
292 | } | 306 | } |
293 | 307 | ||
294 | spin_lock_irq(&undef_lock); | 308 | spin_lock_irqsave(&undef_lock, flags); |
295 | list_for_each_entry(hook, &undef_hook, node) { | 309 | list_for_each_entry(hook, &undef_hook, node) { |
296 | if ((instr & hook->instr_mask) == hook->instr_val && | 310 | if ((instr & hook->instr_mask) == hook->instr_val && |
297 | (regs->ARM_cpsr & hook->cpsr_mask) == hook->cpsr_val) { | 311 | (regs->ARM_cpsr & hook->cpsr_mask) == hook->cpsr_val) { |
@@ -301,7 +315,7 @@ asmlinkage void do_undefinstr(struct pt_regs *regs) | |||
301 | } | 315 | } |
302 | } | 316 | } |
303 | } | 317 | } |
304 | spin_unlock_irq(&undef_lock); | 318 | spin_unlock_irqrestore(&undef_lock, flags); |
305 | 319 | ||
306 | #ifdef CONFIG_DEBUG_USER | 320 | #ifdef CONFIG_DEBUG_USER |
307 | if (user_debug & UDBG_UNDEFINED) { | 321 | if (user_debug & UDBG_UNDEFINED) { |
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index d1a6a597ed9a..6be67296f333 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S | |||
@@ -83,6 +83,9 @@ SECTIONS | |||
83 | 83 | ||
84 | .text : { /* Real text segment */ | 84 | .text : { /* Real text segment */ |
85 | _text = .; /* Text and read-only data */ | 85 | _text = .; /* Text and read-only data */ |
86 | __exception_text_start = .; | ||
87 | *(.exception.text) | ||
88 | __exception_text_end = .; | ||
86 | *(.text) | 89 | *(.text) |
87 | SCHED_TEXT | 90 | SCHED_TEXT |
88 | LOCK_TEXT | 91 | LOCK_TEXT |
diff --git a/arch/arm/lib/backtrace.S b/arch/arm/lib/backtrace.S index 74230083cbf4..84dc890d2bf3 100644 --- a/arch/arm/lib/backtrace.S +++ b/arch/arm/lib/backtrace.S | |||
@@ -17,8 +17,8 @@ | |||
17 | @ fp is 0 or stack frame | 17 | @ fp is 0 or stack frame |
18 | 18 | ||
19 | #define frame r4 | 19 | #define frame r4 |
20 | #define next r5 | 20 | #define sv_fp r5 |
21 | #define save r6 | 21 | #define sv_pc r6 |
22 | #define mask r7 | 22 | #define mask r7 |
23 | #define offset r8 | 23 | #define offset r8 |
24 | 24 | ||
@@ -31,108 +31,106 @@ ENTRY(c_backtrace) | |||
31 | #if !defined(CONFIG_FRAME_POINTER) || !defined(CONFIG_PRINTK) | 31 | #if !defined(CONFIG_FRAME_POINTER) || !defined(CONFIG_PRINTK) |
32 | mov pc, lr | 32 | mov pc, lr |
33 | #else | 33 | #else |
34 | |||
35 | stmfd sp!, {r4 - r8, lr} @ Save an extra register so we have a location... | 34 | stmfd sp!, {r4 - r8, lr} @ Save an extra register so we have a location... |
36 | tst r1, #0x10 @ 26 or 32-bit? | 35 | movs frame, r0 @ if frame pointer is zero |
37 | moveq mask, #0xfc000003 | 36 | beq no_frame @ we have no stack frames |
38 | movne mask, #0 | 37 | |
39 | tst mask, r0 | 38 | tst r1, #0x10 @ 26 or 32-bit mode? |
40 | movne r0, #0 | 39 | moveq mask, #0xfc000003 @ mask for 26-bit |
41 | movs frame, r0 | 40 | movne mask, #0 @ mask for 32-bit |
42 | 1: moveq r0, #-2 | 41 | |
43 | ldmeqfd sp!, {r4 - r8, pc} | 42 | 1: stmfd sp!, {pc} @ calculate offset of PC stored |
44 | 43 | ldr r0, [sp], #4 @ by stmfd for this CPU | |
45 | 2: stmfd sp!, {pc} @ calculate offset of PC in STMIA instruction | 44 | adr r1, 1b |
46 | ldr r0, [sp], #4 | ||
47 | adr r1, 2b - 4 | ||
48 | sub offset, r0, r1 | 45 | sub offset, r0, r1 |
49 | 46 | ||
50 | 3: tst frame, mask @ Check for address exceptions... | 47 | /* |
51 | bne 1b | 48 | * Stack frame layout: |
49 | * optionally saved caller registers (r4 - r10) | ||
50 | * saved fp | ||
51 | * saved sp | ||
52 | * saved lr | ||
53 | * frame => saved pc | ||
54 | * optionally saved arguments (r0 - r3) | ||
55 | * saved sp => <next word> | ||
56 | * | ||
57 | * Functions start with the following code sequence: | ||
58 | * mov ip, sp | ||
59 | * stmfd sp!, {r0 - r3} (optional) | ||
60 | * corrected pc => stmfd sp!, {..., fp, ip, lr, pc} | ||
61 | */ | ||
62 | for_each_frame: tst frame, mask @ Check for address exceptions | ||
63 | bne no_frame | ||
64 | |||
65 | 1001: ldr sv_pc, [frame, #0] @ get saved pc | ||
66 | 1002: ldr sv_fp, [frame, #-12] @ get saved fp | ||
52 | 67 | ||
53 | 1001: ldr next, [frame, #-12] @ get fp | 68 | sub sv_pc, sv_pc, offset @ Correct PC for prefetching |
54 | 1002: ldr r2, [frame, #-4] @ get lr | 69 | bic sv_pc, sv_pc, mask @ mask PC/LR for the mode |
55 | 1003: ldr r3, [frame, #0] @ get pc | 70 | |
56 | sub save, r3, offset @ Correct PC for prefetching | 71 | 1003: ldr r2, [sv_pc, #-4] @ if stmfd sp!, {args} exists, |
57 | bic save, save, mask | 72 | ldr r3, .Ldsi+4 @ adjust saved 'pc' back one |
58 | 1004: ldr r1, [save, #0] @ get instruction at function | 73 | teq r3, r2, lsr #10 @ instruction |
59 | mov r1, r1, lsr #10 | 74 | subne r0, sv_pc, #4 @ allow for mov |
60 | ldr r3, .Ldsi+4 | 75 | subeq r0, sv_pc, #8 @ allow for mov + stmia |
61 | teq r1, r3 | 76 | |
62 | subeq save, save, #4 | 77 | ldr r1, [frame, #-4] @ get saved lr |
63 | mov r0, save | 78 | mov r2, frame |
64 | bic r1, r2, mask | 79 | bic r1, r1, mask @ mask PC/LR for the mode |
65 | bl dump_backtrace_entry | 80 | bl dump_backtrace_entry |
66 | 81 | ||
67 | ldr r0, [frame, #-8] @ get sp | 82 | ldr r1, [sv_pc, #-4] @ if stmfd sp!, {args} exists, |
68 | sub r0, r0, #4 | 83 | ldr r3, .Ldsi+4 |
69 | 1005: ldr r1, [save, #4] @ get instruction at function+4 | 84 | teq r3, r1, lsr #10 |
70 | mov r3, r1, lsr #10 | 85 | ldreq r0, [frame, #-8] @ get sp |
71 | ldr r2, .Ldsi+4 | 86 | subeq r0, r0, #4 @ point at the last arg |
72 | teq r3, r2 @ Check for stmia sp!, {args} | 87 | bleq .Ldumpstm @ dump saved registers |
73 | addeq save, save, #4 @ next instruction | ||
74 | bleq .Ldumpstm | ||
75 | |||
76 | sub r0, frame, #16 | ||
77 | 1006: ldr r1, [save, #4] @ Get 'stmia sp!, {rlist, fp, ip, lr, pc}' instruction | ||
78 | mov r3, r1, lsr #10 | ||
79 | ldr r2, .Ldsi | ||
80 | teq r3, r2 | ||
81 | bleq .Ldumpstm | ||
82 | |||
83 | /* | ||
84 | * A zero next framepointer means we're done. | ||
85 | */ | ||
86 | teq next, #0 | ||
87 | ldmeqfd sp!, {r4 - r8, pc} | ||
88 | |||
89 | /* | ||
90 | * The next framepointer must be above the | ||
91 | * current framepointer. | ||
92 | */ | ||
93 | cmp next, frame | ||
94 | mov frame, next | ||
95 | bhi 3b | ||
96 | b 1007f | ||
97 | 88 | ||
98 | /* | 89 | 1004: ldr r1, [sv_pc, #0] @ if stmfd sp!, {..., fp, ip, lr, pc} |
99 | * Fixup for LDMDB. Note that this must not be in the fixup section. | 90 | ldr r3, .Ldsi @ instruction exists, |
100 | */ | 91 | teq r3, r1, lsr #10 |
101 | 1007: ldr r0, =.Lbad | 92 | subeq r0, frame, #16 |
93 | bleq .Ldumpstm @ dump saved registers | ||
94 | |||
95 | teq sv_fp, #0 @ zero saved fp means | ||
96 | beq no_frame @ no further frames | ||
97 | |||
98 | cmp sv_fp, frame @ next frame must be | ||
99 | mov frame, sv_fp @ above the current frame | ||
100 | bhi for_each_frame | ||
101 | |||
102 | 1006: adr r0, .Lbad | ||
102 | mov r1, frame | 103 | mov r1, frame |
103 | bl printk | 104 | bl printk |
104 | ldmfd sp!, {r4 - r8, pc} | 105 | no_frame: ldmfd sp!, {r4 - r8, pc} |
105 | .ltorg | ||
106 | 106 | ||
107 | .section __ex_table,"a" | 107 | .section __ex_table,"a" |
108 | .align 3 | 108 | .align 3 |
109 | .long 1001b, 1007b | 109 | .long 1001b, 1006b |
110 | .long 1002b, 1007b | 110 | .long 1002b, 1006b |
111 | .long 1003b, 1007b | 111 | .long 1003b, 1006b |
112 | .long 1004b, 1007b | 112 | .long 1004b, 1006b |
113 | .long 1005b, 1007b | ||
114 | .long 1006b, 1007b | ||
115 | .previous | 113 | .previous |
116 | 114 | ||
117 | #define instr r4 | 115 | #define instr r4 |
118 | #define reg r5 | 116 | #define reg r5 |
119 | #define stack r6 | 117 | #define stack r6 |
120 | 118 | ||
121 | .Ldumpstm: stmfd sp!, {instr, reg, stack, r7, r8, lr} | 119 | .Ldumpstm: stmfd sp!, {instr, reg, stack, r7, lr} |
122 | mov stack, r0 | 120 | mov stack, r0 |
123 | mov instr, r1 | 121 | mov instr, r1 |
124 | mov reg, #9 | 122 | mov reg, #10 |
125 | mov r7, #0 | 123 | mov r7, #0 |
126 | 1: mov r3, #1 | 124 | 1: mov r3, #1 |
127 | tst instr, r3, lsl reg | 125 | tst instr, r3, lsl reg |
128 | beq 2f | 126 | beq 2f |
129 | add r7, r7, #1 | 127 | add r7, r7, #1 |
130 | teq r7, #4 | 128 | teq r7, #6 |
131 | moveq r7, #0 | 129 | moveq r7, #1 |
132 | moveq r3, #'\n' | 130 | moveq r1, #'\n' |
133 | movne r3, #' ' | 131 | movne r1, #' ' |
134 | ldr r2, [stack], #-4 | 132 | ldr r3, [stack], #-4 |
135 | mov r1, reg | 133 | mov r2, reg |
136 | adr r0, .Lfp | 134 | adr r0, .Lfp |
137 | bl printk | 135 | bl printk |
138 | 2: subs reg, reg, #1 | 136 | 2: subs reg, reg, #1 |
@@ -140,14 +138,13 @@ ENTRY(c_backtrace) | |||
140 | teq r7, #0 | 138 | teq r7, #0 |
141 | adrne r0, .Lcr | 139 | adrne r0, .Lcr |
142 | blne printk | 140 | blne printk |
143 | mov r0, stack | 141 | ldmfd sp!, {instr, reg, stack, r7, pc} |
144 | ldmfd sp!, {instr, reg, stack, r7, r8, pc} | ||
145 | 142 | ||
146 | .Lfp: .asciz " r%d = %08X%c" | 143 | .Lfp: .asciz "%cr%d:%08x" |
147 | .Lcr: .asciz "\n" | 144 | .Lcr: .asciz "\n" |
148 | .Lbad: .asciz "Backtrace aborted due to bad frame pointer <%p>\n" | 145 | .Lbad: .asciz "Backtrace aborted due to bad frame pointer <%p>\n" |
149 | .align | 146 | .align |
150 | .Ldsi: .word 0x00e92dd8 >> 2 | 147 | .Ldsi: .word 0xe92dd800 >> 10 @ stmfd sp!, {... fp, ip, lr, pc} |
151 | .word 0x00e92d00 >> 2 | 148 | .word 0xe92d0000 >> 10 @ stmfd sp!, {} |
152 | 149 | ||
153 | #endif | 150 | #endif |
diff --git a/arch/arm/lib/getuser.S b/arch/arm/lib/getuser.S index c03ea8e666ba..1dd8ea4f9a9c 100644 --- a/arch/arm/lib/getuser.S +++ b/arch/arm/lib/getuser.S | |||
@@ -26,8 +26,6 @@ | |||
26 | * Note that ADDR_LIMIT is either 0 or 0xc0000000. | 26 | * Note that ADDR_LIMIT is either 0 or 0xc0000000. |
27 | * Note also that it is intended that __get_user_bad is not global. | 27 | * Note also that it is intended that __get_user_bad is not global. |
28 | */ | 28 | */ |
29 | #include <asm/asm-offsets.h> | ||
30 | #include <asm/thread_info.h> | ||
31 | #include <asm/errno.h> | 29 | #include <asm/errno.h> |
32 | 30 | ||
33 | .global __get_user_1 | 31 | .global __get_user_1 |
diff --git a/arch/arm/lib/putuser.S b/arch/arm/lib/putuser.S index 4593e9c07f05..8620afe54f72 100644 --- a/arch/arm/lib/putuser.S +++ b/arch/arm/lib/putuser.S | |||
@@ -26,8 +26,6 @@ | |||
26 | * Note that ADDR_LIMIT is either 0 or 0xc0000000 | 26 | * Note that ADDR_LIMIT is either 0 or 0xc0000000 |
27 | * Note also that it is intended that __put_user_bad is not global. | 27 | * Note also that it is intended that __put_user_bad is not global. |
28 | */ | 28 | */ |
29 | #include <asm/asm-offsets.h> | ||
30 | #include <asm/thread_info.h> | ||
31 | #include <asm/errno.h> | 29 | #include <asm/errno.h> |
32 | 30 | ||
33 | .global __put_user_1 | 31 | .global __put_user_1 |
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index bf0d96272e3a..e238ad8cfd8f 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig | |||
@@ -81,6 +81,13 @@ config MACH_KB9200 | |||
81 | Select this if you are using KwikByte's KB920x board. | 81 | Select this if you are using KwikByte's KB920x board. |
82 | <http://kwikbyte.com/KB9202_description_new.htm> | 82 | <http://kwikbyte.com/KB9202_description_new.htm> |
83 | 83 | ||
84 | config MACH_PICOTUX2XX | ||
85 | bool "picotux 200" | ||
86 | depends on ARCH_AT91RM9200 | ||
87 | help | ||
88 | Select this if you are using a picotux 200. | ||
89 | <http://www.picotux.com/> | ||
90 | |||
84 | config MACH_KAFA | 91 | config MACH_KAFA |
85 | bool "Sperry-Sun KAFA board" | 92 | bool "Sperry-Sun KAFA board" |
86 | depends on ARCH_AT91RM9200 | 93 | depends on ARCH_AT91RM9200 |
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 05de6cdc88f1..a412ae18a421 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile | |||
@@ -25,6 +25,7 @@ obj-$(CONFIG_MACH_CARMEVA) += board-carmeva.o | |||
25 | obj-$(CONFIG_MACH_KB9200) += board-kb9202.o | 25 | obj-$(CONFIG_MACH_KB9200) += board-kb9202.o |
26 | obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o | 26 | obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o |
27 | obj-$(CONFIG_MACH_KAFA) += board-kafa.o | 27 | obj-$(CONFIG_MACH_KAFA) += board-kafa.o |
28 | obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o | ||
28 | 29 | ||
29 | # AT91SAM9260 board-specific support | 30 | # AT91SAM9260 board-specific support |
30 | obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o | 31 | obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o |
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 2ddcdd69df7d..2cad2bf864be 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c | |||
@@ -117,6 +117,21 @@ static struct clk pioD_clk = { | |||
117 | .pmc_mask = 1 << AT91RM9200_ID_PIOD, | 117 | .pmc_mask = 1 << AT91RM9200_ID_PIOD, |
118 | .type = CLK_TYPE_PERIPHERAL, | 118 | .type = CLK_TYPE_PERIPHERAL, |
119 | }; | 119 | }; |
120 | static struct clk ssc0_clk = { | ||
121 | .name = "ssc0_clk", | ||
122 | .pmc_mask = 1 << AT91RM9200_ID_SSC0, | ||
123 | .type = CLK_TYPE_PERIPHERAL, | ||
124 | }; | ||
125 | static struct clk ssc1_clk = { | ||
126 | .name = "ssc1_clk", | ||
127 | .pmc_mask = 1 << AT91RM9200_ID_SSC1, | ||
128 | .type = CLK_TYPE_PERIPHERAL, | ||
129 | }; | ||
130 | static struct clk ssc2_clk = { | ||
131 | .name = "ssc2_clk", | ||
132 | .pmc_mask = 1 << AT91RM9200_ID_SSC2, | ||
133 | .type = CLK_TYPE_PERIPHERAL, | ||
134 | }; | ||
120 | static struct clk tc0_clk = { | 135 | static struct clk tc0_clk = { |
121 | .name = "tc0_clk", | 136 | .name = "tc0_clk", |
122 | .pmc_mask = 1 << AT91RM9200_ID_TC0, | 137 | .pmc_mask = 1 << AT91RM9200_ID_TC0, |
@@ -161,7 +176,9 @@ static struct clk *periph_clocks[] __initdata = { | |||
161 | &udc_clk, | 176 | &udc_clk, |
162 | &twi_clk, | 177 | &twi_clk, |
163 | &spi_clk, | 178 | &spi_clk, |
164 | // ssc 0 .. ssc2 | 179 | &ssc0_clk, |
180 | &ssc1_clk, | ||
181 | &ssc2_clk, | ||
165 | &tc0_clk, | 182 | &tc0_clk, |
166 | &tc1_clk, | 183 | &tc1_clk, |
167 | &tc2_clk, | 184 | &tc2_clk, |
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index 6ea41d8266cb..e47381e8aaba 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c | |||
@@ -119,6 +119,11 @@ static struct clk spi1_clk = { | |||
119 | .pmc_mask = 1 << AT91SAM9260_ID_SPI1, | 119 | .pmc_mask = 1 << AT91SAM9260_ID_SPI1, |
120 | .type = CLK_TYPE_PERIPHERAL, | 120 | .type = CLK_TYPE_PERIPHERAL, |
121 | }; | 121 | }; |
122 | static struct clk ssc_clk = { | ||
123 | .name = "ssc_clk", | ||
124 | .pmc_mask = 1 << AT91SAM9260_ID_SSC, | ||
125 | .type = CLK_TYPE_PERIPHERAL, | ||
126 | }; | ||
122 | static struct clk tc0_clk = { | 127 | static struct clk tc0_clk = { |
123 | .name = "tc0_clk", | 128 | .name = "tc0_clk", |
124 | .pmc_mask = 1 << AT91SAM9260_ID_TC0, | 129 | .pmc_mask = 1 << AT91SAM9260_ID_TC0, |
@@ -193,7 +198,7 @@ static struct clk *periph_clocks[] __initdata = { | |||
193 | &twi_clk, | 198 | &twi_clk, |
194 | &spi0_clk, | 199 | &spi0_clk, |
195 | &spi1_clk, | 200 | &spi1_clk, |
196 | // ssc | 201 | &ssc_clk, |
197 | &tc0_clk, | 202 | &tc0_clk, |
198 | &tc1_clk, | 203 | &tc1_clk, |
199 | &tc2_clk, | 204 | &tc2_clk, |
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 784d1e682d6d..dfe8c39c9fb9 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c | |||
@@ -97,6 +97,21 @@ static struct clk spi1_clk = { | |||
97 | .pmc_mask = 1 << AT91SAM9261_ID_SPI1, | 97 | .pmc_mask = 1 << AT91SAM9261_ID_SPI1, |
98 | .type = CLK_TYPE_PERIPHERAL, | 98 | .type = CLK_TYPE_PERIPHERAL, |
99 | }; | 99 | }; |
100 | static struct clk ssc0_clk = { | ||
101 | .name = "ssc0_clk", | ||
102 | .pmc_mask = 1 << AT91SAM9261_ID_SSC0, | ||
103 | .type = CLK_TYPE_PERIPHERAL, | ||
104 | }; | ||
105 | static struct clk ssc1_clk = { | ||
106 | .name = "ssc1_clk", | ||
107 | .pmc_mask = 1 << AT91SAM9261_ID_SSC1, | ||
108 | .type = CLK_TYPE_PERIPHERAL, | ||
109 | }; | ||
110 | static struct clk ssc2_clk = { | ||
111 | .name = "ssc2_clk", | ||
112 | .pmc_mask = 1 << AT91SAM9261_ID_SSC2, | ||
113 | .type = CLK_TYPE_PERIPHERAL, | ||
114 | }; | ||
100 | static struct clk tc0_clk = { | 115 | static struct clk tc0_clk = { |
101 | .name = "tc0_clk", | 116 | .name = "tc0_clk", |
102 | .pmc_mask = 1 << AT91SAM9261_ID_TC0, | 117 | .pmc_mask = 1 << AT91SAM9261_ID_TC0, |
@@ -135,7 +150,9 @@ static struct clk *periph_clocks[] __initdata = { | |||
135 | &twi_clk, | 150 | &twi_clk, |
136 | &spi0_clk, | 151 | &spi0_clk, |
137 | &spi1_clk, | 152 | &spi1_clk, |
138 | // ssc 0 .. ssc2 | 153 | &ssc0_clk, |
154 | &ssc1_clk, | ||
155 | &ssc2_clk, | ||
139 | &tc0_clk, | 156 | &tc0_clk, |
140 | &tc1_clk, | 157 | &tc1_clk, |
141 | &tc2_clk, | 158 | &tc2_clk, |
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index e1504766fd64..8e781997716a 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c | |||
@@ -430,9 +430,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | |||
430 | * LCD Controller | 430 | * LCD Controller |
431 | * -------------------------------------------------------------------- */ | 431 | * -------------------------------------------------------------------- */ |
432 | 432 | ||
433 | #if defined(CONFIG_FB_AT91) || defined(CONFIG_FB_AT91_MODULE) | 433 | #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) |
434 | static u64 lcdc_dmamask = 0xffffffffUL; | 434 | static u64 lcdc_dmamask = 0xffffffffUL; |
435 | static struct at91fb_info lcdc_data; | 435 | static struct atmel_lcdfb_info lcdc_data; |
436 | 436 | ||
437 | static struct resource lcdc_resources[] = { | 437 | static struct resource lcdc_resources[] = { |
438 | [0] = { | 438 | [0] = { |
@@ -455,7 +455,7 @@ static struct resource lcdc_resources[] = { | |||
455 | }; | 455 | }; |
456 | 456 | ||
457 | static struct platform_device at91_lcdc_device = { | 457 | static struct platform_device at91_lcdc_device = { |
458 | .name = "at91-fb", | 458 | .name = "atmel_lcdfb", |
459 | .id = 0, | 459 | .id = 0, |
460 | .dev = { | 460 | .dev = { |
461 | .dma_mask = &lcdc_dmamask, | 461 | .dma_mask = &lcdc_dmamask, |
@@ -466,7 +466,7 @@ static struct platform_device at91_lcdc_device = { | |||
466 | .num_resources = ARRAY_SIZE(lcdc_resources), | 466 | .num_resources = ARRAY_SIZE(lcdc_resources), |
467 | }; | 467 | }; |
468 | 468 | ||
469 | void __init at91_add_device_lcdc(struct at91fb_info *data) | 469 | void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) |
470 | { | 470 | { |
471 | if (!data) { | 471 | if (!data) { |
472 | return; | 472 | return; |
@@ -499,7 +499,7 @@ void __init at91_add_device_lcdc(struct at91fb_info *data) | |||
499 | platform_device_register(&at91_lcdc_device); | 499 | platform_device_register(&at91_lcdc_device); |
500 | } | 500 | } |
501 | #else | 501 | #else |
502 | void __init at91_add_device_lcdc(struct at91fb_info *data) {} | 502 | void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} |
503 | #endif | 503 | #endif |
504 | 504 | ||
505 | 505 | ||
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 0e89a7fca3fa..00e27b177857 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c | |||
@@ -87,6 +87,11 @@ static struct clk mmc1_clk = { | |||
87 | .pmc_mask = 1 << AT91SAM9263_ID_MCI1, | 87 | .pmc_mask = 1 << AT91SAM9263_ID_MCI1, |
88 | .type = CLK_TYPE_PERIPHERAL, | 88 | .type = CLK_TYPE_PERIPHERAL, |
89 | }; | 89 | }; |
90 | static struct clk can_clk = { | ||
91 | .name = "can_clk", | ||
92 | .pmc_mask = 1 << AT91SAM9263_ID_CAN, | ||
93 | .type = CLK_TYPE_PERIPHERAL, | ||
94 | }; | ||
90 | static struct clk twi_clk = { | 95 | static struct clk twi_clk = { |
91 | .name = "twi_clk", | 96 | .name = "twi_clk", |
92 | .pmc_mask = 1 << AT91SAM9263_ID_TWI, | 97 | .pmc_mask = 1 << AT91SAM9263_ID_TWI, |
@@ -102,16 +107,46 @@ static struct clk spi1_clk = { | |||
102 | .pmc_mask = 1 << AT91SAM9263_ID_SPI1, | 107 | .pmc_mask = 1 << AT91SAM9263_ID_SPI1, |
103 | .type = CLK_TYPE_PERIPHERAL, | 108 | .type = CLK_TYPE_PERIPHERAL, |
104 | }; | 109 | }; |
110 | static struct clk ssc0_clk = { | ||
111 | .name = "ssc0_clk", | ||
112 | .pmc_mask = 1 << AT91SAM9263_ID_SSC0, | ||
113 | .type = CLK_TYPE_PERIPHERAL, | ||
114 | }; | ||
115 | static struct clk ssc1_clk = { | ||
116 | .name = "ssc1_clk", | ||
117 | .pmc_mask = 1 << AT91SAM9263_ID_SSC1, | ||
118 | .type = CLK_TYPE_PERIPHERAL, | ||
119 | }; | ||
120 | static struct clk ac97_clk = { | ||
121 | .name = "ac97_clk", | ||
122 | .pmc_mask = 1 << AT91SAM9263_ID_AC97C, | ||
123 | .type = CLK_TYPE_PERIPHERAL, | ||
124 | }; | ||
105 | static struct clk tcb_clk = { | 125 | static struct clk tcb_clk = { |
106 | .name = "tcb_clk", | 126 | .name = "tcb_clk", |
107 | .pmc_mask = 1 << AT91SAM9263_ID_TCB, | 127 | .pmc_mask = 1 << AT91SAM9263_ID_TCB, |
108 | .type = CLK_TYPE_PERIPHERAL, | 128 | .type = CLK_TYPE_PERIPHERAL, |
109 | }; | 129 | }; |
130 | static struct clk pwmc_clk = { | ||
131 | .name = "pwmc_clk", | ||
132 | .pmc_mask = 1 << AT91SAM9263_ID_PWMC, | ||
133 | .type = CLK_TYPE_PERIPHERAL, | ||
134 | }; | ||
110 | static struct clk macb_clk = { | 135 | static struct clk macb_clk = { |
111 | .name = "macb_clk", | 136 | .name = "macb_clk", |
112 | .pmc_mask = 1 << AT91SAM9263_ID_EMAC, | 137 | .pmc_mask = 1 << AT91SAM9263_ID_EMAC, |
113 | .type = CLK_TYPE_PERIPHERAL, | 138 | .type = CLK_TYPE_PERIPHERAL, |
114 | }; | 139 | }; |
140 | static struct clk dma_clk = { | ||
141 | .name = "dma_clk", | ||
142 | .pmc_mask = 1 << AT91SAM9263_ID_DMA, | ||
143 | .type = CLK_TYPE_PERIPHERAL, | ||
144 | }; | ||
145 | static struct clk twodge_clk = { | ||
146 | .name = "2dge_clk", | ||
147 | .pmc_mask = 1 << AT91SAM9263_ID_2DGE, | ||
148 | .type = CLK_TYPE_PERIPHERAL, | ||
149 | }; | ||
115 | static struct clk udc_clk = { | 150 | static struct clk udc_clk = { |
116 | .name = "udc_clk", | 151 | .name = "udc_clk", |
117 | .pmc_mask = 1 << AT91SAM9263_ID_UDP, | 152 | .pmc_mask = 1 << AT91SAM9263_ID_UDP, |
@@ -142,20 +177,21 @@ static struct clk *periph_clocks[] __initdata = { | |||
142 | &usart2_clk, | 177 | &usart2_clk, |
143 | &mmc0_clk, | 178 | &mmc0_clk, |
144 | &mmc1_clk, | 179 | &mmc1_clk, |
145 | // can | 180 | &can_clk, |
146 | &twi_clk, | 181 | &twi_clk, |
147 | &spi0_clk, | 182 | &spi0_clk, |
148 | &spi1_clk, | 183 | &spi1_clk, |
149 | // ssc0 .. ssc1 | 184 | &ssc0_clk, |
150 | // ac97 | 185 | &ssc1_clk, |
186 | &ac97_clk, | ||
151 | &tcb_clk, | 187 | &tcb_clk, |
152 | // pwmc | 188 | &pwmc_clk, |
153 | &macb_clk, | 189 | &macb_clk, |
154 | // 2dge | 190 | &twodge_clk, |
155 | &udc_clk, | 191 | &udc_clk, |
156 | &isi_clk, | 192 | &isi_clk, |
157 | &lcdc_clk, | 193 | &lcdc_clk, |
158 | // dma | 194 | &dma_clk, |
159 | &ohci_clk, | 195 | &ohci_clk, |
160 | // irq0 .. irq1 | 196 | // irq0 .. irq1 |
161 | }; | 197 | }; |
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index b77121f27f34..2b2e18a67128 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c | |||
@@ -573,6 +573,130 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | |||
573 | 573 | ||
574 | 574 | ||
575 | /* -------------------------------------------------------------------- | 575 | /* -------------------------------------------------------------------- |
576 | * AC97 | ||
577 | * -------------------------------------------------------------------- */ | ||
578 | |||
579 | #if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE) | ||
580 | static u64 ac97_dmamask = 0xffffffffUL; | ||
581 | static struct atmel_ac97_data ac97_data; | ||
582 | |||
583 | static struct resource ac97_resources[] = { | ||
584 | [0] = { | ||
585 | .start = AT91SAM9263_BASE_AC97C, | ||
586 | .end = AT91SAM9263_BASE_AC97C + SZ_16K - 1, | ||
587 | .flags = IORESOURCE_MEM, | ||
588 | }, | ||
589 | [1] = { | ||
590 | .start = AT91SAM9263_ID_AC97C, | ||
591 | .end = AT91SAM9263_ID_AC97C, | ||
592 | .flags = IORESOURCE_IRQ, | ||
593 | }, | ||
594 | }; | ||
595 | |||
596 | static struct platform_device at91sam9263_ac97_device = { | ||
597 | .name = "ac97c", | ||
598 | .id = 1, | ||
599 | .dev = { | ||
600 | .dma_mask = &ac97_dmamask, | ||
601 | .coherent_dma_mask = 0xffffffff, | ||
602 | .platform_data = &ac97_data, | ||
603 | }, | ||
604 | .resource = ac97_resources, | ||
605 | .num_resources = ARRAY_SIZE(ac97_resources), | ||
606 | }; | ||
607 | |||
608 | void __init at91_add_device_ac97(struct atmel_ac97_data *data) | ||
609 | { | ||
610 | if (!data) | ||
611 | return; | ||
612 | |||
613 | at91_set_A_periph(AT91_PIN_PB0, 0); /* AC97FS */ | ||
614 | at91_set_A_periph(AT91_PIN_PB1, 0); /* AC97CK */ | ||
615 | at91_set_A_periph(AT91_PIN_PB2, 0); /* AC97TX */ | ||
616 | at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */ | ||
617 | |||
618 | /* reset */ | ||
619 | if (data->reset_pin) | ||
620 | at91_set_gpio_output(data->reset_pin, 0); | ||
621 | |||
622 | ac97_data = *ek_data; | ||
623 | platform_device_register(&at91sam9263_ac97_device); | ||
624 | } | ||
625 | #else | ||
626 | void __init at91_add_device_ac97(struct atmel_ac97_data *data) {} | ||
627 | #endif | ||
628 | |||
629 | |||
630 | /* -------------------------------------------------------------------- | ||
631 | * LCD Controller | ||
632 | * -------------------------------------------------------------------- */ | ||
633 | |||
634 | #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) | ||
635 | static u64 lcdc_dmamask = 0xffffffffUL; | ||
636 | static struct atmel_lcdfb_info lcdc_data; | ||
637 | |||
638 | static struct resource lcdc_resources[] = { | ||
639 | [0] = { | ||
640 | .start = AT91SAM9263_LCDC_BASE, | ||
641 | .end = AT91SAM9263_LCDC_BASE + SZ_4K - 1, | ||
642 | .flags = IORESOURCE_MEM, | ||
643 | }, | ||
644 | [1] = { | ||
645 | .start = AT91SAM9263_ID_LCDC, | ||
646 | .end = AT91SAM9263_ID_LCDC, | ||
647 | .flags = IORESOURCE_IRQ, | ||
648 | }, | ||
649 | }; | ||
650 | |||
651 | static struct platform_device at91_lcdc_device = { | ||
652 | .name = "atmel_lcdfb", | ||
653 | .id = 0, | ||
654 | .dev = { | ||
655 | .dma_mask = &lcdc_dmamask, | ||
656 | .coherent_dma_mask = 0xffffffff, | ||
657 | .platform_data = &lcdc_data, | ||
658 | }, | ||
659 | .resource = lcdc_resources, | ||
660 | .num_resources = ARRAY_SIZE(lcdc_resources), | ||
661 | }; | ||
662 | |||
663 | void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) | ||
664 | { | ||
665 | if (!data) | ||
666 | return; | ||
667 | |||
668 | at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ | ||
669 | at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ | ||
670 | at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */ | ||
671 | at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */ | ||
672 | at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */ | ||
673 | at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */ | ||
674 | at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */ | ||
675 | at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */ | ||
676 | at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */ | ||
677 | at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */ | ||
678 | at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */ | ||
679 | at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */ | ||
680 | at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */ | ||
681 | at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */ | ||
682 | at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */ | ||
683 | at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */ | ||
684 | at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */ | ||
685 | at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */ | ||
686 | at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */ | ||
687 | at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */ | ||
688 | at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */ | ||
689 | at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */ | ||
690 | |||
691 | lcdc_data = *data; | ||
692 | platform_device_register(&at91_lcdc_device); | ||
693 | } | ||
694 | #else | ||
695 | void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} | ||
696 | #endif | ||
697 | |||
698 | |||
699 | /* -------------------------------------------------------------------- | ||
576 | * LEDs | 700 | * LEDs |
577 | * -------------------------------------------------------------------- */ | 701 | * -------------------------------------------------------------------- */ |
578 | 702 | ||
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c new file mode 100644 index 000000000000..49cfe7ab4a85 --- /dev/null +++ b/arch/arm/mach-at91/board-picotux200.c | |||
@@ -0,0 +1,166 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-at91/board-picotux200.c | ||
3 | * | ||
4 | * Copyright (C) 2005 SAN People | ||
5 | * Copyright (C) 2007 Kleinhenz Elektronik GmbH | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | |||
22 | #include <linux/types.h> | ||
23 | #include <linux/init.h> | ||
24 | #include <linux/mm.h> | ||
25 | #include <linux/module.h> | ||
26 | #include <linux/platform_device.h> | ||
27 | #include <linux/spi/spi.h> | ||
28 | #include <linux/mtd/physmap.h> | ||
29 | |||
30 | #include <asm/hardware.h> | ||
31 | #include <asm/setup.h> | ||
32 | #include <asm/mach-types.h> | ||
33 | #include <asm/irq.h> | ||
34 | |||
35 | #include <asm/mach/arch.h> | ||
36 | #include <asm/mach/map.h> | ||
37 | #include <asm/mach/irq.h> | ||
38 | |||
39 | #include <asm/arch/board.h> | ||
40 | #include <asm/arch/gpio.h> | ||
41 | #include <asm/arch/at91rm9200_mc.h> | ||
42 | |||
43 | #include "generic.h" | ||
44 | |||
45 | |||
46 | /* | ||
47 | * Serial port configuration. | ||
48 | * 0 .. 3 = USART0 .. USART3 | ||
49 | * 4 = DBGU | ||
50 | */ | ||
51 | static struct at91_uart_config __initdata picotux200_uart_config = { | ||
52 | .console_tty = 0, /* ttyS0 */ | ||
53 | .nr_tty = 2, | ||
54 | .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ | ||
55 | }; | ||
56 | |||
57 | static void __init picotux200_map_io(void) | ||
58 | { | ||
59 | /* Initialize processor: 18.432 MHz crystal */ | ||
60 | at91rm9200_initialize(18432000, AT91RM9200_BGA); | ||
61 | |||
62 | /* Setup the serial ports and console */ | ||
63 | at91_init_serial(&picotux200_uart_config); | ||
64 | } | ||
65 | |||
66 | static void __init picotux200_init_irq(void) | ||
67 | { | ||
68 | at91rm9200_init_interrupts(NULL); | ||
69 | } | ||
70 | |||
71 | static struct at91_eth_data __initdata picotux200_eth_data = { | ||
72 | .phy_irq_pin = AT91_PIN_PC4, | ||
73 | .is_rmii = 1, | ||
74 | }; | ||
75 | |||
76 | static struct at91_usbh_data __initdata picotux200_usbh_data = { | ||
77 | .ports = 1, | ||
78 | }; | ||
79 | |||
80 | // static struct at91_udc_data __initdata picotux200_udc_data = { | ||
81 | // .vbus_pin = AT91_PIN_PD4, | ||
82 | // .pullup_pin = AT91_PIN_PD5, | ||
83 | // }; | ||
84 | |||
85 | static struct at91_mmc_data __initdata picotux200_mmc_data = { | ||
86 | .det_pin = AT91_PIN_PB27, | ||
87 | .slot_b = 0, | ||
88 | .wire4 = 1, | ||
89 | .wp_pin = AT91_PIN_PA17, | ||
90 | }; | ||
91 | |||
92 | // static struct spi_board_info picotux200_spi_devices[] = { | ||
93 | // { /* DataFlash chip */ | ||
94 | // .modalias = "mtd_dataflash", | ||
95 | // .chip_select = 0, | ||
96 | // .max_speed_hz = 15 * 1000 * 1000, | ||
97 | // }, | ||
98 | // #ifdef CONFIG_MTD_AT91_DATAFLASH_CARD | ||
99 | // { /* DataFlash card */ | ||
100 | // .modalias = "mtd_dataflash", | ||
101 | // .chip_select = 3, | ||
102 | // .max_speed_hz = 15 * 1000 * 1000, | ||
103 | // }, | ||
104 | // #endif | ||
105 | // }; | ||
106 | |||
107 | #define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0 | ||
108 | #define PICOTUX200_FLASH_SIZE 0x400000 | ||
109 | |||
110 | static struct physmap_flash_data picotux200_flash_data = { | ||
111 | .width = 2, | ||
112 | }; | ||
113 | |||
114 | static struct resource picotux200_flash_resource = { | ||
115 | .start = PICOTUX200_FLASH_BASE, | ||
116 | .end = PICOTUX200_FLASH_BASE + PICOTUX200_FLASH_SIZE - 1, | ||
117 | .flags = IORESOURCE_MEM, | ||
118 | }; | ||
119 | |||
120 | static struct platform_device picotux200_flash = { | ||
121 | .name = "physmap-flash", | ||
122 | .id = 0, | ||
123 | .dev = { | ||
124 | .platform_data = &picotux200_flash_data, | ||
125 | }, | ||
126 | .resource = &picotux200_flash_resource, | ||
127 | .num_resources = 1, | ||
128 | }; | ||
129 | |||
130 | static void __init picotux200_board_init(void) | ||
131 | { | ||
132 | /* Serial */ | ||
133 | at91_add_device_serial(); | ||
134 | /* Ethernet */ | ||
135 | at91_add_device_eth(&picotux200_eth_data); | ||
136 | /* USB Host */ | ||
137 | at91_add_device_usbh(&picotux200_usbh_data); | ||
138 | /* USB Device */ | ||
139 | // at91_add_device_udc(&picotux200_udc_data); | ||
140 | // at91_set_multi_drive(picotux200_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */ | ||
141 | /* I2C */ | ||
142 | at91_add_device_i2c(); | ||
143 | /* SPI */ | ||
144 | // at91_add_device_spi(picotux200_spi_devices, ARRAY_SIZE(picotux200_spi_devices)); | ||
145 | #ifdef CONFIG_MTD_AT91_DATAFLASH_CARD | ||
146 | /* DataFlash card */ | ||
147 | at91_set_gpio_output(AT91_PIN_PB22, 0); | ||
148 | #else | ||
149 | /* MMC */ | ||
150 | at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */ | ||
151 | at91_add_device_mmc(0, &picotux200_mmc_data); | ||
152 | #endif | ||
153 | /* NOR Flash */ | ||
154 | platform_device_register(&picotux200_flash); | ||
155 | } | ||
156 | |||
157 | MACHINE_START(PICOTUX2XX, "picotux 200") | ||
158 | /* Maintainer: Kleinhenz Elektronik GmbH */ | ||
159 | .phys_io = AT91_BASE_SYS, | ||
160 | .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, | ||
161 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
162 | .timer = &at91rm9200_timer, | ||
163 | .map_io = picotux200_map_io, | ||
164 | .init_irq = picotux200_init_irq, | ||
165 | .init_machine = picotux200_board_init, | ||
166 | MACHINE_END | ||
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c index 57fb4499d969..65fa532bb4ac 100644 --- a/arch/arm/mach-at91/board-sam9260ek.c +++ b/arch/arm/mach-at91/board-sam9260ek.c | |||
@@ -104,9 +104,9 @@ static struct spi_board_info ek_spi_devices[] = { | |||
104 | }, | 104 | }, |
105 | #endif | 105 | #endif |
106 | #endif | 106 | #endif |
107 | #if defined(CONFIG_SND_AT73C213) | 107 | #if defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE) |
108 | { /* AT73C213 DAC */ | 108 | { /* AT73C213 DAC */ |
109 | .modalias = "snd_at73c213", | 109 | .modalias = "at73c213", |
110 | .chip_select = 0, | 110 | .chip_select = 0, |
111 | .max_speed_hz = 10 * 1000 * 1000, | 111 | .max_speed_hz = 10 * 1000 * 1000, |
112 | .bus_num = 1, | 112 | .bus_num = 1, |
@@ -118,7 +118,7 @@ static struct spi_board_info ek_spi_devices[] = { | |||
118 | /* | 118 | /* |
119 | * MACB Ethernet device | 119 | * MACB Ethernet device |
120 | */ | 120 | */ |
121 | static struct __initdata at91_eth_data ek_macb_data = { | 121 | static struct at91_eth_data __initdata ek_macb_data = { |
122 | .phy_irq_pin = AT91_PIN_PA7, | 122 | .phy_irq_pin = AT91_PIN_PA7, |
123 | .is_rmii = 1, | 123 | .is_rmii = 1, |
124 | }; | 124 | }; |
@@ -140,7 +140,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { | |||
140 | }, | 140 | }, |
141 | }; | 141 | }; |
142 | 142 | ||
143 | static struct mtd_partition *nand_partitions(int size, int *num_partitions) | 143 | static struct mtd_partition * __init nand_partitions(int size, int *num_partitions) |
144 | { | 144 | { |
145 | *num_partitions = ARRAY_SIZE(ek_nand_partition); | 145 | *num_partitions = ARRAY_SIZE(ek_nand_partition); |
146 | return ek_nand_partition; | 146 | return ek_nand_partition; |
@@ -188,6 +188,8 @@ static void __init ek_board_init(void) | |||
188 | at91_add_device_eth(&ek_macb_data); | 188 | at91_add_device_eth(&ek_macb_data); |
189 | /* MMC */ | 189 | /* MMC */ |
190 | at91_add_device_mmc(0, &ek_mmc_data); | 190 | at91_add_device_mmc(0, &ek_mmc_data); |
191 | /* I2C */ | ||
192 | at91_add_device_i2c(); | ||
191 | } | 193 | } |
192 | 194 | ||
193 | MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK") | 195 | MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK") |
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c index b7e772467cf6..bcf71536cc6d 100644 --- a/arch/arm/mach-at91/board-sam9261ek.c +++ b/arch/arm/mach-at91/board-sam9261ek.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/module.h> | 25 | #include <linux/module.h> |
26 | #include <linux/platform_device.h> | 26 | #include <linux/platform_device.h> |
27 | #include <linux/spi/spi.h> | 27 | #include <linux/spi/spi.h> |
28 | #include <linux/spi/ads7846.h> | ||
28 | #include <linux/dm9000.h> | 29 | #include <linux/dm9000.h> |
29 | 30 | ||
30 | #include <asm/hardware.h> | 31 | #include <asm/hardware.h> |
@@ -195,6 +196,41 @@ static struct at91_nand_data __initdata ek_nand_data = { | |||
195 | }; | 196 | }; |
196 | 197 | ||
197 | /* | 198 | /* |
199 | * ADS7846 Touchscreen | ||
200 | */ | ||
201 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | ||
202 | |||
203 | static int ads7843_pendown_state(void) | ||
204 | { | ||
205 | return !at91_get_gpio_value(AT91_PIN_PC2); /* Touchscreen PENIRQ */ | ||
206 | } | ||
207 | |||
208 | static struct ads7846_platform_data ads_info = { | ||
209 | .model = 7843, | ||
210 | .x_min = 150, | ||
211 | .x_max = 3830, | ||
212 | .y_min = 190, | ||
213 | .y_max = 3830, | ||
214 | .vref_delay_usecs = 100, | ||
215 | .x_plate_ohms = 450, | ||
216 | .y_plate_ohms = 250, | ||
217 | .pressure_max = 15000, | ||
218 | .debounce_max = 1, | ||
219 | .debounce_rep = 0, | ||
220 | .debounce_tol = (~0), | ||
221 | .get_pendown_state = ads7843_pendown_state, | ||
222 | }; | ||
223 | |||
224 | static void __init ek_add_device_ts(void) | ||
225 | { | ||
226 | at91_set_B_periph(AT91_PIN_PC2, 1); /* External IRQ0, with pullup */ | ||
227 | at91_set_gpio_input(AT91_PIN_PA11, 1); /* Touchscreen BUSY signal */ | ||
228 | } | ||
229 | #else | ||
230 | static void __init ek_add_device_ts(void) {} | ||
231 | #endif | ||
232 | |||
233 | /* | ||
198 | * SPI devices | 234 | * SPI devices |
199 | */ | 235 | */ |
200 | static struct spi_board_info ek_spi_devices[] = { | 236 | static struct spi_board_info ek_spi_devices[] = { |
@@ -204,6 +240,16 @@ static struct spi_board_info ek_spi_devices[] = { | |||
204 | .max_speed_hz = 15 * 1000 * 1000, | 240 | .max_speed_hz = 15 * 1000 * 1000, |
205 | .bus_num = 0, | 241 | .bus_num = 0, |
206 | }, | 242 | }, |
243 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | ||
244 | { | ||
245 | .modalias = "ads7846", | ||
246 | .chip_select = 2, | ||
247 | .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */ | ||
248 | .bus_num = 0, | ||
249 | .platform_data = &ads_info, | ||
250 | .irq = AT91SAM9261_ID_IRQ0, | ||
251 | }, | ||
252 | #endif | ||
207 | #if defined(CONFIG_MTD_AT91_DATAFLASH_CARD) | 253 | #if defined(CONFIG_MTD_AT91_DATAFLASH_CARD) |
208 | { /* DataFlash card - jumper (J12) configurable to CS3 or CS0 */ | 254 | { /* DataFlash card - jumper (J12) configurable to CS3 or CS0 */ |
209 | .modalias = "mtd_dataflash", | 255 | .modalias = "mtd_dataflash", |
@@ -211,9 +257,9 @@ static struct spi_board_info ek_spi_devices[] = { | |||
211 | .max_speed_hz = 15 * 1000 * 1000, | 257 | .max_speed_hz = 15 * 1000 * 1000, |
212 | .bus_num = 0, | 258 | .bus_num = 0, |
213 | }, | 259 | }, |
214 | #elif defined(CONFIG_SND_AT73C213) | 260 | #elif defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE) |
215 | { /* AT73C213 DAC */ | 261 | { /* AT73C213 DAC */ |
216 | .modalias = "snd_at73c213", | 262 | .modalias = "at73c213", |
217 | .chip_select = 3, | 263 | .chip_select = 3, |
218 | .max_speed_hz = 10 * 1000 * 1000, | 264 | .max_speed_hz = 10 * 1000 * 1000, |
219 | .bus_num = 0, | 265 | .bus_num = 0, |
@@ -241,6 +287,8 @@ static void __init ek_board_init(void) | |||
241 | #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) | 287 | #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) |
242 | /* SPI */ | 288 | /* SPI */ |
243 | at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); | 289 | at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); |
290 | /* Touchscreen */ | ||
291 | ek_add_device_ts(); | ||
244 | #else | 292 | #else |
245 | /* MMC */ | 293 | /* MMC */ |
246 | at91_add_device_mmc(0, &ek_mmc_data); | 294 | at91_add_device_mmc(0, &ek_mmc_data); |
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c index 8fdce11a880c..f57458559fb6 100644 --- a/arch/arm/mach-at91/board-sam9263ek.c +++ b/arch/arm/mach-at91/board-sam9263ek.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/module.h> | 25 | #include <linux/module.h> |
26 | #include <linux/platform_device.h> | 26 | #include <linux/platform_device.h> |
27 | #include <linux/spi/spi.h> | 27 | #include <linux/spi/spi.h> |
28 | #include <linux/spi/ads7846.h> | ||
28 | 29 | ||
29 | #include <asm/hardware.h> | 30 | #include <asm/hardware.h> |
30 | #include <asm/setup.h> | 31 | #include <asm/setup.h> |
@@ -86,6 +87,40 @@ static struct at91_udc_data __initdata ek_udc_data = { | |||
86 | 87 | ||
87 | 88 | ||
88 | /* | 89 | /* |
90 | * ADS7846 Touchscreen | ||
91 | */ | ||
92 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | ||
93 | static int ads7843_pendown_state(void) | ||
94 | { | ||
95 | return !at91_get_gpio_value(AT91_PIN_PA15); /* Touchscreen PENIRQ */ | ||
96 | } | ||
97 | |||
98 | static struct ads7846_platform_data ads_info = { | ||
99 | .model = 7843, | ||
100 | .x_min = 150, | ||
101 | .x_max = 3830, | ||
102 | .y_min = 190, | ||
103 | .y_max = 3830, | ||
104 | .vref_delay_usecs = 100, | ||
105 | .x_plate_ohms = 450, | ||
106 | .y_plate_ohms = 250, | ||
107 | .pressure_max = 15000, | ||
108 | .debounce_max = 1, | ||
109 | .debounce_rep = 0, | ||
110 | .debounce_tol = (~0), | ||
111 | .get_pendown_state = ads7843_pendown_state, | ||
112 | }; | ||
113 | |||
114 | static void __init ek_add_device_ts(void) | ||
115 | { | ||
116 | at91_set_B_periph(AT91_PIN_PA15, 1); /* External IRQ1, with pullup */ | ||
117 | at91_set_gpio_input(AT91_PIN_PA31, 1); /* Touchscreen BUSY signal */ | ||
118 | } | ||
119 | #else | ||
120 | static void __init ek_add_device_ts(void) {} | ||
121 | #endif | ||
122 | |||
123 | /* | ||
89 | * SPI devices. | 124 | * SPI devices. |
90 | */ | 125 | */ |
91 | static struct spi_board_info ek_spi_devices[] = { | 126 | static struct spi_board_info ek_spi_devices[] = { |
@@ -97,6 +132,16 @@ static struct spi_board_info ek_spi_devices[] = { | |||
97 | .bus_num = 0, | 132 | .bus_num = 0, |
98 | }, | 133 | }, |
99 | #endif | 134 | #endif |
135 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | ||
136 | { | ||
137 | .modalias = "ads7846", | ||
138 | .chip_select = 3, | ||
139 | .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */ | ||
140 | .bus_num = 0, | ||
141 | .platform_data = &ads_info, | ||
142 | .irq = AT91SAM9263_ID_IRQ1, | ||
143 | }, | ||
144 | #endif | ||
100 | }; | 145 | }; |
101 | 146 | ||
102 | 147 | ||
@@ -112,6 +157,14 @@ static struct at91_mmc_data __initdata ek_mmc_data = { | |||
112 | 157 | ||
113 | 158 | ||
114 | /* | 159 | /* |
160 | * MACB Ethernet device | ||
161 | */ | ||
162 | static struct at91_eth_data __initdata ek_macb_data = { | ||
163 | .is_rmii = 1, | ||
164 | }; | ||
165 | |||
166 | |||
167 | /* | ||
115 | * NAND flash | 168 | * NAND flash |
116 | */ | 169 | */ |
117 | static struct mtd_partition __initdata ek_nand_partition[] = { | 170 | static struct mtd_partition __initdata ek_nand_partition[] = { |
@@ -148,6 +201,14 @@ static struct at91_nand_data __initdata ek_nand_data = { | |||
148 | }; | 201 | }; |
149 | 202 | ||
150 | 203 | ||
204 | /* | ||
205 | * AC97 | ||
206 | */ | ||
207 | static struct atmel_ac97_data ek_ac97_data = { | ||
208 | .reset_pin = AT91_PIN_PA13, | ||
209 | }; | ||
210 | |||
211 | |||
151 | static void __init ek_board_init(void) | 212 | static void __init ek_board_init(void) |
152 | { | 213 | { |
153 | /* Serial */ | 214 | /* Serial */ |
@@ -157,11 +218,20 @@ static void __init ek_board_init(void) | |||
157 | /* USB Device */ | 218 | /* USB Device */ |
158 | at91_add_device_udc(&ek_udc_data); | 219 | at91_add_device_udc(&ek_udc_data); |
159 | /* SPI */ | 220 | /* SPI */ |
221 | at91_set_gpio_output(AT91_PIN_PE20, 1); /* select spi0 clock */ | ||
160 | at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); | 222 | at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); |
223 | /* Touchscreen */ | ||
224 | ek_add_device_ts(); | ||
161 | /* MMC */ | 225 | /* MMC */ |
162 | at91_add_device_mmc(1, &ek_mmc_data); | 226 | at91_add_device_mmc(1, &ek_mmc_data); |
227 | /* Ethernet */ | ||
228 | at91_add_device_eth(&ek_macb_data); | ||
163 | /* NAND */ | 229 | /* NAND */ |
164 | at91_add_device_nand(&ek_nand_data); | 230 | at91_add_device_nand(&ek_nand_data); |
231 | /* I2C */ | ||
232 | at91_add_device_i2c(); | ||
233 | /* AC97 */ | ||
234 | at91_add_device_ac97(&ek_ac97_data); | ||
165 | } | 235 | } |
166 | 236 | ||
167 | MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") | 237 | MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") |
diff --git a/arch/arm/mach-ebsa110/io.c b/arch/arm/mach-ebsa110/io.c index db38afb2aa88..bbf0d332407e 100644 --- a/arch/arm/mach-ebsa110/io.c +++ b/arch/arm/mach-ebsa110/io.c | |||
@@ -102,6 +102,26 @@ EXPORT_SYMBOL(__readb); | |||
102 | EXPORT_SYMBOL(__readw); | 102 | EXPORT_SYMBOL(__readw); |
103 | EXPORT_SYMBOL(__readl); | 103 | EXPORT_SYMBOL(__readl); |
104 | 104 | ||
105 | void readsw(void __iomem *addr, void *data, int len) | ||
106 | { | ||
107 | void __iomem *a = __isamem_convert_addr(addr); | ||
108 | |||
109 | BUG_ON((unsigned long)addr & 1); | ||
110 | |||
111 | __raw_readsw(a, data, len); | ||
112 | } | ||
113 | EXPORT_SYMBOL(readsw); | ||
114 | |||
115 | void readsl(void __iomem *addr, void *data, int len) | ||
116 | { | ||
117 | void __iomem *a = __isamem_convert_addr(addr); | ||
118 | |||
119 | BUG_ON((unsigned long)addr & 3); | ||
120 | |||
121 | __raw_readsl(a, data, len); | ||
122 | } | ||
123 | EXPORT_SYMBOL(readsl); | ||
124 | |||
105 | void __writeb(u8 val, void __iomem *addr) | 125 | void __writeb(u8 val, void __iomem *addr) |
106 | { | 126 | { |
107 | void __iomem *a = __isamem_convert_addr(addr); | 127 | void __iomem *a = __isamem_convert_addr(addr); |
@@ -137,6 +157,26 @@ EXPORT_SYMBOL(__writeb); | |||
137 | EXPORT_SYMBOL(__writew); | 157 | EXPORT_SYMBOL(__writew); |
138 | EXPORT_SYMBOL(__writel); | 158 | EXPORT_SYMBOL(__writel); |
139 | 159 | ||
160 | void writesw(void __iomem *addr, void *data, int len) | ||
161 | { | ||
162 | void __iomem *a = __isamem_convert_addr(addr); | ||
163 | |||
164 | BUG_ON((unsigned long)addr & 1); | ||
165 | |||
166 | __raw_writesw(a, data, len); | ||
167 | } | ||
168 | EXPORT_SYMBOL(writesw); | ||
169 | |||
170 | void writesl(void __iomem *addr, void *data, int len) | ||
171 | { | ||
172 | void __iomem *a = __isamem_convert_addr(addr); | ||
173 | |||
174 | BUG_ON((unsigned long)addr & 3); | ||
175 | |||
176 | __raw_writesl(a, data, len); | ||
177 | } | ||
178 | EXPORT_SYMBOL(writesl); | ||
179 | |||
140 | #define SUPERIO_PORT(p) \ | 180 | #define SUPERIO_PORT(p) \ |
141 | (((p) >> 3) == (0x3f8 >> 3) || \ | 181 | (((p) >> 3) == (0x3f8 >> 3) || \ |
142 | ((p) >> 3) == (0x2f8 >> 3) || \ | 182 | ((p) >> 3) == (0x2f8 >> 3) || \ |
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c index f174d1a3b11c..9d7515c36bff 100644 --- a/arch/arm/mach-ep93xx/clock.c +++ b/arch/arm/mach-ep93xx/clock.c | |||
@@ -27,6 +27,10 @@ struct clk { | |||
27 | u32 enable_mask; | 27 | u32 enable_mask; |
28 | }; | 28 | }; |
29 | 29 | ||
30 | static struct clk clk_uart = { | ||
31 | .name = "UARTCLK", | ||
32 | .rate = 14745600, | ||
33 | }; | ||
30 | static struct clk clk_pll1 = { | 34 | static struct clk clk_pll1 = { |
31 | .name = "pll1", | 35 | .name = "pll1", |
32 | }; | 36 | }; |
@@ -50,6 +54,7 @@ static struct clk clk_usb_host = { | |||
50 | 54 | ||
51 | 55 | ||
52 | static struct clk *clocks[] = { | 56 | static struct clk *clocks[] = { |
57 | &clk_uart, | ||
53 | &clk_pll1, | 58 | &clk_pll1, |
54 | &clk_f, | 59 | &clk_f, |
55 | &clk_h, | 60 | &clk_h, |
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c index 1463330ed8ee..d0dc51e81338 100644 --- a/arch/arm/mach-footbridge/dc21285.c +++ b/arch/arm/mach-footbridge/dc21285.c | |||
@@ -10,7 +10,6 @@ | |||
10 | */ | 10 | */ |
11 | #include <linux/kernel.h> | 11 | #include <linux/kernel.h> |
12 | #include <linux/pci.h> | 12 | #include <linux/pci.h> |
13 | #include <linux/ptrace.h> | ||
14 | #include <linux/interrupt.h> | 13 | #include <linux/interrupt.h> |
15 | #include <linux/mm.h> | 14 | #include <linux/mm.h> |
16 | #include <linux/slab.h> | 15 | #include <linux/slab.h> |
diff --git a/arch/arm/mach-integrator/pci.c b/arch/arm/mach-integrator/pci.c index 394ec9261c4e..af7d3ff013ec 100644 --- a/arch/arm/mach-integrator/pci.c +++ b/arch/arm/mach-integrator/pci.c | |||
@@ -23,7 +23,6 @@ | |||
23 | */ | 23 | */ |
24 | #include <linux/kernel.h> | 24 | #include <linux/kernel.h> |
25 | #include <linux/pci.h> | 25 | #include <linux/pci.h> |
26 | #include <linux/ptrace.h> | ||
27 | #include <linux/interrupt.h> | 26 | #include <linux/interrupt.h> |
28 | #include <linux/init.h> | 27 | #include <linux/init.h> |
29 | 28 | ||
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index fb8c6d97b22b..af9ebccac7c1 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c | |||
@@ -22,7 +22,6 @@ | |||
22 | */ | 22 | */ |
23 | #include <linux/kernel.h> | 23 | #include <linux/kernel.h> |
24 | #include <linux/pci.h> | 24 | #include <linux/pci.h> |
25 | #include <linux/ptrace.h> | ||
26 | #include <linux/slab.h> | 25 | #include <linux/slab.h> |
27 | #include <linux/ioport.h> | 26 | #include <linux/ioport.h> |
28 | #include <linux/interrupt.h> | 27 | #include <linux/interrupt.h> |
diff --git a/arch/arm/mach-iop13xx/Makefile b/arch/arm/mach-iop13xx/Makefile index 4185e0586c33..da1609dc0dee 100644 --- a/arch/arm/mach-iop13xx/Makefile +++ b/arch/arm/mach-iop13xx/Makefile | |||
@@ -7,5 +7,6 @@ obj-$(CONFIG_ARCH_IOP13XX) += setup.o | |||
7 | obj-$(CONFIG_ARCH_IOP13XX) += irq.o | 7 | obj-$(CONFIG_ARCH_IOP13XX) += irq.o |
8 | obj-$(CONFIG_ARCH_IOP13XX) += pci.o | 8 | obj-$(CONFIG_ARCH_IOP13XX) += pci.o |
9 | obj-$(CONFIG_ARCH_IOP13XX) += io.o | 9 | obj-$(CONFIG_ARCH_IOP13XX) += io.o |
10 | obj-$(CONFIG_ARCH_IOP13XX) += tpmi.o | ||
10 | obj-$(CONFIG_MACH_IQ81340SC) += iq81340sc.o | 11 | obj-$(CONFIG_MACH_IQ81340SC) += iq81340sc.o |
11 | obj-$(CONFIG_MACH_IQ81340MC) += iq81340mc.o | 12 | obj-$(CONFIG_MACH_IQ81340MC) += iq81340mc.o |
diff --git a/arch/arm/mach-iop13xx/io.c b/arch/arm/mach-iop13xx/io.c index e79a1b62600f..5b22fdeca52c 100644 --- a/arch/arm/mach-iop13xx/io.c +++ b/arch/arm/mach-iop13xx/io.c | |||
@@ -41,7 +41,7 @@ void * __iomem __iop13xx_io(unsigned long io_addr) | |||
41 | EXPORT_SYMBOL(__iop13xx_io); | 41 | EXPORT_SYMBOL(__iop13xx_io); |
42 | 42 | ||
43 | void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size, | 43 | void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size, |
44 | unsigned long flags) | 44 | unsigned int mtype) |
45 | { | 45 | { |
46 | void __iomem * retval; | 46 | void __iomem * retval; |
47 | 47 | ||
@@ -61,9 +61,9 @@ void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size, | |||
61 | (cookie - IOP13XX_PCIE_LOWER_MEM_RA)); | 61 | (cookie - IOP13XX_PCIE_LOWER_MEM_RA)); |
62 | break; | 62 | break; |
63 | case IOP13XX_PBI_LOWER_MEM_RA ... IOP13XX_PBI_UPPER_MEM_RA: | 63 | case IOP13XX_PBI_LOWER_MEM_RA ... IOP13XX_PBI_UPPER_MEM_RA: |
64 | retval = __ioremap(IOP13XX_PBI_LOWER_MEM_PA + | 64 | retval = __arm_ioremap(IOP13XX_PBI_LOWER_MEM_PA + |
65 | (cookie - IOP13XX_PBI_LOWER_MEM_RA), | 65 | (cookie - IOP13XX_PBI_LOWER_MEM_RA), |
66 | size, flags); | 66 | size, mtype); |
67 | break; | 67 | break; |
68 | case IOP13XX_PCIE_LOWER_IO_PA ... IOP13XX_PCIE_UPPER_IO_PA: | 68 | case IOP13XX_PCIE_LOWER_IO_PA ... IOP13XX_PCIE_UPPER_IO_PA: |
69 | retval = (void *) IOP13XX_PCIE_IO_PHYS_TO_VIRT(cookie); | 69 | retval = (void *) IOP13XX_PCIE_IO_PHYS_TO_VIRT(cookie); |
@@ -75,7 +75,7 @@ void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size, | |||
75 | retval = (void *) IOP13XX_PMMR_PHYS_TO_VIRT(cookie); | 75 | retval = (void *) IOP13XX_PMMR_PHYS_TO_VIRT(cookie); |
76 | break; | 76 | break; |
77 | default: | 77 | default: |
78 | retval = __ioremap(cookie, size, flags); | 78 | retval = __arm_ioremap(cookie, size, mtype); |
79 | } | 79 | } |
80 | 80 | ||
81 | return retval; | 81 | return retval; |
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c index a519d707571c..268a8d84999c 100644 --- a/arch/arm/mach-iop13xx/iq81340mc.c +++ b/arch/arm/mach-iop13xx/iq81340mc.c | |||
@@ -75,11 +75,14 @@ static void __init iq81340mc_init(void) | |||
75 | { | 75 | { |
76 | iop13xx_platform_init(); | 76 | iop13xx_platform_init(); |
77 | iq81340mc_pci_init(); | 77 | iq81340mc_pci_init(); |
78 | iop13xx_add_tpmi_devices(); | ||
78 | } | 79 | } |
79 | 80 | ||
80 | static void __init iq81340mc_timer_init(void) | 81 | static void __init iq81340mc_timer_init(void) |
81 | { | 82 | { |
82 | iop_init_time(400000000); | 83 | unsigned long bus_freq = iop13xx_core_freq() / iop13xx_xsi_bus_ratio(); |
84 | printk(KERN_DEBUG "%s: bus frequency: %lu\n", __FUNCTION__, bus_freq); | ||
85 | iop_init_time(bus_freq); | ||
83 | } | 86 | } |
84 | 87 | ||
85 | static struct sys_timer iq81340mc_timer = { | 88 | static struct sys_timer iq81340mc_timer = { |
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c index 0e71fbcabe00..a51ffd2683e5 100644 --- a/arch/arm/mach-iop13xx/iq81340sc.c +++ b/arch/arm/mach-iop13xx/iq81340sc.c | |||
@@ -77,11 +77,14 @@ static void __init iq81340sc_init(void) | |||
77 | { | 77 | { |
78 | iop13xx_platform_init(); | 78 | iop13xx_platform_init(); |
79 | iq81340sc_pci_init(); | 79 | iq81340sc_pci_init(); |
80 | iop13xx_add_tpmi_devices(); | ||
80 | } | 81 | } |
81 | 82 | ||
82 | static void __init iq81340sc_timer_init(void) | 83 | static void __init iq81340sc_timer_init(void) |
83 | { | 84 | { |
84 | iop_init_time(400000000); | 85 | unsigned long bus_freq = iop13xx_core_freq() / iop13xx_xsi_bus_ratio(); |
86 | printk(KERN_DEBUG "%s: bus frequency: %lu\n", __FUNCTION__, bus_freq); | ||
87 | iop_init_time(bus_freq); | ||
85 | } | 88 | } |
86 | 89 | ||
87 | static struct sys_timer iq81340sc_timer = { | 90 | static struct sys_timer iq81340sc_timer = { |
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c index 89ec70ea3187..d1d0d32ca77c 100644 --- a/arch/arm/mach-iop13xx/pci.c +++ b/arch/arm/mach-iop13xx/pci.c | |||
@@ -88,9 +88,9 @@ void iop13xx_map_pci_memory(void) | |||
88 | 88 | ||
89 | if (end) { | 89 | if (end) { |
90 | iop13xx_atux_mem_base = | 90 | iop13xx_atux_mem_base = |
91 | (u32) __ioremap_pfn( | 91 | (u32) __arm_ioremap_pfn( |
92 | __phys_to_pfn(IOP13XX_PCIX_LOWER_MEM_PA) | 92 | __phys_to_pfn(IOP13XX_PCIX_LOWER_MEM_PA) |
93 | , 0, iop13xx_atux_mem_size, 0); | 93 | , 0, iop13xx_atux_mem_size, MT_DEVICE); |
94 | if (!iop13xx_atux_mem_base) { | 94 | if (!iop13xx_atux_mem_base) { |
95 | printk("%s: atux allocation " | 95 | printk("%s: atux allocation " |
96 | "failed\n", __FUNCTION__); | 96 | "failed\n", __FUNCTION__); |
@@ -114,9 +114,9 @@ void iop13xx_map_pci_memory(void) | |||
114 | 114 | ||
115 | if (end) { | 115 | if (end) { |
116 | iop13xx_atue_mem_base = | 116 | iop13xx_atue_mem_base = |
117 | (u32) __ioremap_pfn( | 117 | (u32) __arm_ioremap_pfn( |
118 | __phys_to_pfn(IOP13XX_PCIE_LOWER_MEM_PA) | 118 | __phys_to_pfn(IOP13XX_PCIE_LOWER_MEM_PA) |
119 | , 0, iop13xx_atue_mem_size, 0); | 119 | , 0, iop13xx_atue_mem_size, MT_DEVICE); |
120 | if (!iop13xx_atue_mem_base) { | 120 | if (!iop13xx_atue_mem_base) { |
121 | printk("%s: atue allocation " | 121 | printk("%s: atue allocation " |
122 | "failed\n", __FUNCTION__); | 122 | "failed\n", __FUNCTION__); |
@@ -1023,7 +1023,7 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) | |||
1023 | << IOP13XX_ATUX_PCIXSR_FUNC_NUM; | 1023 | << IOP13XX_ATUX_PCIXSR_FUNC_NUM; |
1024 | __raw_writel(pcixsr, IOP13XX_ATUX_PCIXSR); | 1024 | __raw_writel(pcixsr, IOP13XX_ATUX_PCIXSR); |
1025 | 1025 | ||
1026 | res[0].start = IOP13XX_PCIX_LOWER_IO_PA; | 1026 | res[0].start = IOP13XX_PCIX_LOWER_IO_PA + IOP13XX_PCIX_IO_BUS_OFFSET; |
1027 | res[0].end = IOP13XX_PCIX_UPPER_IO_PA; | 1027 | res[0].end = IOP13XX_PCIX_UPPER_IO_PA; |
1028 | res[0].name = "IQ81340 ATUX PCI I/O Space"; | 1028 | res[0].name = "IQ81340 ATUX PCI I/O Space"; |
1029 | res[0].flags = IORESOURCE_IO; | 1029 | res[0].flags = IORESOURCE_IO; |
@@ -1033,7 +1033,7 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) | |||
1033 | res[1].name = "IQ81340 ATUX PCI Memory Space"; | 1033 | res[1].name = "IQ81340 ATUX PCI Memory Space"; |
1034 | res[1].flags = IORESOURCE_MEM; | 1034 | res[1].flags = IORESOURCE_MEM; |
1035 | sys->mem_offset = IOP13XX_PCIX_MEM_OFFSET; | 1035 | sys->mem_offset = IOP13XX_PCIX_MEM_OFFSET; |
1036 | sys->io_offset = IOP13XX_PCIX_IO_OFFSET; | 1036 | sys->io_offset = IOP13XX_PCIX_LOWER_IO_PA; |
1037 | break; | 1037 | break; |
1038 | case IOP13XX_INIT_ATU_ATUE: | 1038 | case IOP13XX_INIT_ATU_ATUE: |
1039 | /* Note: the function number field in the PCSR is ro */ | 1039 | /* Note: the function number field in the PCSR is ro */ |
@@ -1044,7 +1044,7 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) | |||
1044 | 1044 | ||
1045 | __raw_writel(pcsr, IOP13XX_ATUE_PCSR); | 1045 | __raw_writel(pcsr, IOP13XX_ATUE_PCSR); |
1046 | 1046 | ||
1047 | res[0].start = IOP13XX_PCIE_LOWER_IO_PA; | 1047 | res[0].start = IOP13XX_PCIE_LOWER_IO_PA + IOP13XX_PCIE_IO_BUS_OFFSET; |
1048 | res[0].end = IOP13XX_PCIE_UPPER_IO_PA; | 1048 | res[0].end = IOP13XX_PCIE_UPPER_IO_PA; |
1049 | res[0].name = "IQ81340 ATUE PCI I/O Space"; | 1049 | res[0].name = "IQ81340 ATUE PCI I/O Space"; |
1050 | res[0].flags = IORESOURCE_IO; | 1050 | res[0].flags = IORESOURCE_IO; |
@@ -1054,7 +1054,7 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) | |||
1054 | res[1].name = "IQ81340 ATUE PCI Memory Space"; | 1054 | res[1].name = "IQ81340 ATUE PCI Memory Space"; |
1055 | res[1].flags = IORESOURCE_MEM; | 1055 | res[1].flags = IORESOURCE_MEM; |
1056 | sys->mem_offset = IOP13XX_PCIE_MEM_OFFSET; | 1056 | sys->mem_offset = IOP13XX_PCIE_MEM_OFFSET; |
1057 | sys->io_offset = IOP13XX_PCIE_IO_OFFSET; | 1057 | sys->io_offset = IOP13XX_PCIE_LOWER_IO_PA; |
1058 | sys->map_irq = iop13xx_pcie_map_irq; | 1058 | sys->map_irq = iop13xx_pcie_map_irq; |
1059 | break; | 1059 | break; |
1060 | default: | 1060 | default: |
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c index 9a46bcd5f18e..bc4871553f6a 100644 --- a/arch/arm/mach-iop13xx/setup.c +++ b/arch/arm/mach-iop13xx/setup.c | |||
@@ -258,15 +258,11 @@ void __init iop13xx_platform_init(void) | |||
258 | 258 | ||
259 | if (init_uart == IOP13XX_INIT_UART_DEFAULT) { | 259 | if (init_uart == IOP13XX_INIT_UART_DEFAULT) { |
260 | switch (iop13xx_dev_id()) { | 260 | switch (iop13xx_dev_id()) { |
261 | /* enable both uarts on iop341 and iop342 */ | 261 | /* enable both uarts on iop341 */ |
262 | case 0x3380: | 262 | case 0x3380: |
263 | case 0x3384: | 263 | case 0x3384: |
264 | case 0x3388: | 264 | case 0x3388: |
265 | case 0x338c: | 265 | case 0x338c: |
266 | case 0x3382: | ||
267 | case 0x3386: | ||
268 | case 0x338a: | ||
269 | case 0x338e: | ||
270 | init_uart |= IOP13XX_INIT_UART_0; | 266 | init_uart |= IOP13XX_INIT_UART_0; |
271 | init_uart |= IOP13XX_INIT_UART_1; | 267 | init_uart |= IOP13XX_INIT_UART_1; |
272 | break; | 268 | break; |
diff --git a/arch/arm/mach-iop13xx/tpmi.c b/arch/arm/mach-iop13xx/tpmi.c new file mode 100644 index 000000000000..d3dc278213da --- /dev/null +++ b/arch/arm/mach-iop13xx/tpmi.c | |||
@@ -0,0 +1,234 @@ | |||
1 | /* | ||
2 | * iop13xx tpmi device resources | ||
3 | * Copyright (c) 2005-2006, Intel Corporation. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify it | ||
6 | * under the terms and conditions of the GNU General Public License, | ||
7 | * version 2, as published by the Free Software Foundation. | ||
8 | * | ||
9 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
12 | * more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License along with | ||
15 | * this program; if not, write to the Free Software Foundation, Inc., 59 Temple | ||
16 | * Place - Suite 330, Boston, MA 02111-1307 USA. | ||
17 | * | ||
18 | */ | ||
19 | |||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/platform_device.h> | ||
23 | #include <linux/dma-mapping.h> | ||
24 | #include <asm/io.h> | ||
25 | #include <asm/irq.h> | ||
26 | #include <asm/sizes.h> | ||
27 | |||
28 | /* assumes CONTROLLER_ONLY# is never asserted in the ESSR register */ | ||
29 | #define IOP13XX_TPMI_MMR(dev) IOP13XX_REG_ADDR32_PHYS(0x48000 + (dev << 12)) | ||
30 | #define IOP13XX_TPMI_MEM(dev) IOP13XX_REG_ADDR32_PHYS(0x60000 + (dev << 13)) | ||
31 | #define IOP13XX_TPMI_CTRL(dev) IOP13XX_REG_ADDR32_PHYS(0x50000 + (dev << 10)) | ||
32 | #define IOP13XX_TPMI_MMR_SIZE (SZ_4K - 1) | ||
33 | #define IOP13XX_TPMI_MEM_SIZE (255) | ||
34 | #define IOP13XX_TPMI_MEM_CTRL (SZ_1K - 1) | ||
35 | #define IOP13XX_TPMI_RESOURCE_MMR 0 | ||
36 | #define IOP13XX_TPMI_RESOURCE_MEM 1 | ||
37 | #define IOP13XX_TPMI_RESOURCE_CTRL 2 | ||
38 | #define IOP13XX_TPMI_RESOURCE_IRQ 3 | ||
39 | |||
40 | static struct resource iop13xx_tpmi_0_resources[] = { | ||
41 | [IOP13XX_TPMI_RESOURCE_MMR] = { | ||
42 | .start = IOP13XX_TPMI_MMR(4), /* tpmi0 starts at dev == 4 */ | ||
43 | .end = IOP13XX_TPMI_MMR(4) + IOP13XX_TPMI_MMR_SIZE, | ||
44 | .flags = IORESOURCE_MEM, | ||
45 | }, | ||
46 | [IOP13XX_TPMI_RESOURCE_MEM] = { | ||
47 | .start = IOP13XX_TPMI_MEM(0), | ||
48 | .end = IOP13XX_TPMI_MEM(0) + IOP13XX_TPMI_MEM_SIZE, | ||
49 | .flags = IORESOURCE_MEM, | ||
50 | }, | ||
51 | [IOP13XX_TPMI_RESOURCE_CTRL] = { | ||
52 | .start = IOP13XX_TPMI_CTRL(0), | ||
53 | .end = IOP13XX_TPMI_CTRL(0) + IOP13XX_TPMI_MEM_CTRL, | ||
54 | .flags = IORESOURCE_MEM, | ||
55 | }, | ||
56 | [IOP13XX_TPMI_RESOURCE_IRQ] = { | ||
57 | .start = IRQ_IOP13XX_TPMI0_OUT, | ||
58 | .end = IRQ_IOP13XX_TPMI0_OUT, | ||
59 | .flags = IORESOURCE_IRQ | ||
60 | } | ||
61 | }; | ||
62 | |||
63 | static struct resource iop13xx_tpmi_1_resources[] = { | ||
64 | [IOP13XX_TPMI_RESOURCE_MMR] = { | ||
65 | .start = IOP13XX_TPMI_MMR(1), | ||
66 | .end = IOP13XX_TPMI_MMR(1) + IOP13XX_TPMI_MMR_SIZE, | ||
67 | .flags = IORESOURCE_MEM, | ||
68 | }, | ||
69 | [IOP13XX_TPMI_RESOURCE_MEM] = { | ||
70 | .start = IOP13XX_TPMI_MEM(1), | ||
71 | .end = IOP13XX_TPMI_MEM(1) + IOP13XX_TPMI_MEM_SIZE, | ||
72 | .flags = IORESOURCE_MEM, | ||
73 | }, | ||
74 | [IOP13XX_TPMI_RESOURCE_CTRL] = { | ||
75 | .start = IOP13XX_TPMI_CTRL(1), | ||
76 | .end = IOP13XX_TPMI_CTRL(1) + IOP13XX_TPMI_MEM_CTRL, | ||
77 | .flags = IORESOURCE_MEM, | ||
78 | }, | ||
79 | [IOP13XX_TPMI_RESOURCE_IRQ] = { | ||
80 | .start = IRQ_IOP13XX_TPMI1_OUT, | ||
81 | .end = IRQ_IOP13XX_TPMI1_OUT, | ||
82 | .flags = IORESOURCE_IRQ | ||
83 | } | ||
84 | }; | ||
85 | |||
86 | static struct resource iop13xx_tpmi_2_resources[] = { | ||
87 | [IOP13XX_TPMI_RESOURCE_MMR] = { | ||
88 | .start = IOP13XX_TPMI_MMR(2), | ||
89 | .end = IOP13XX_TPMI_MMR(2) + IOP13XX_TPMI_MMR_SIZE, | ||
90 | .flags = IORESOURCE_MEM, | ||
91 | }, | ||
92 | [IOP13XX_TPMI_RESOURCE_MEM] = { | ||
93 | .start = IOP13XX_TPMI_MEM(2), | ||
94 | .end = IOP13XX_TPMI_MEM(2) + IOP13XX_TPMI_MEM_SIZE, | ||
95 | .flags = IORESOURCE_MEM, | ||
96 | }, | ||
97 | [IOP13XX_TPMI_RESOURCE_CTRL] = { | ||
98 | .start = IOP13XX_TPMI_CTRL(2), | ||
99 | .end = IOP13XX_TPMI_CTRL(2) + IOP13XX_TPMI_MEM_CTRL, | ||
100 | .flags = IORESOURCE_MEM, | ||
101 | }, | ||
102 | [IOP13XX_TPMI_RESOURCE_IRQ] = { | ||
103 | .start = IRQ_IOP13XX_TPMI2_OUT, | ||
104 | .end = IRQ_IOP13XX_TPMI2_OUT, | ||
105 | .flags = IORESOURCE_IRQ | ||
106 | } | ||
107 | }; | ||
108 | |||
109 | static struct resource iop13xx_tpmi_3_resources[] = { | ||
110 | [IOP13XX_TPMI_RESOURCE_MMR] = { | ||
111 | .start = IOP13XX_TPMI_MMR(3), | ||
112 | .end = IOP13XX_TPMI_MMR(3) + IOP13XX_TPMI_MMR_SIZE, | ||
113 | .flags = IORESOURCE_MEM, | ||
114 | }, | ||
115 | [IOP13XX_TPMI_RESOURCE_MEM] = { | ||
116 | .start = IOP13XX_TPMI_MEM(3), | ||
117 | .end = IOP13XX_TPMI_MEM(3) + IOP13XX_TPMI_MEM_SIZE, | ||
118 | .flags = IORESOURCE_MEM, | ||
119 | }, | ||
120 | [IOP13XX_TPMI_RESOURCE_CTRL] = { | ||
121 | .start = IOP13XX_TPMI_CTRL(3), | ||
122 | .end = IOP13XX_TPMI_CTRL(3) + IOP13XX_TPMI_MEM_CTRL, | ||
123 | .flags = IORESOURCE_MEM, | ||
124 | }, | ||
125 | [IOP13XX_TPMI_RESOURCE_IRQ] = { | ||
126 | .start = IRQ_IOP13XX_TPMI3_OUT, | ||
127 | .end = IRQ_IOP13XX_TPMI3_OUT, | ||
128 | .flags = IORESOURCE_IRQ | ||
129 | } | ||
130 | }; | ||
131 | |||
132 | u64 iop13xx_tpmi_mask = DMA_64BIT_MASK; | ||
133 | static struct platform_device iop13xx_tpmi_0_device = { | ||
134 | .name = "iop-tpmi", | ||
135 | .id = 0, | ||
136 | .num_resources = 4, | ||
137 | .resource = iop13xx_tpmi_0_resources, | ||
138 | .dev = { | ||
139 | .dma_mask = &iop13xx_tpmi_mask, | ||
140 | .coherent_dma_mask = DMA_64BIT_MASK, | ||
141 | }, | ||
142 | }; | ||
143 | |||
144 | static struct platform_device iop13xx_tpmi_1_device = { | ||
145 | .name = "iop-tpmi", | ||
146 | .id = 1, | ||
147 | .num_resources = 4, | ||
148 | .resource = iop13xx_tpmi_1_resources, | ||
149 | .dev = { | ||
150 | .dma_mask = &iop13xx_tpmi_mask, | ||
151 | .coherent_dma_mask = DMA_64BIT_MASK, | ||
152 | }, | ||
153 | }; | ||
154 | |||
155 | static struct platform_device iop13xx_tpmi_2_device = { | ||
156 | .name = "iop-tpmi", | ||
157 | .id = 2, | ||
158 | .num_resources = 4, | ||
159 | .resource = iop13xx_tpmi_2_resources, | ||
160 | .dev = { | ||
161 | .dma_mask = &iop13xx_tpmi_mask, | ||
162 | .coherent_dma_mask = DMA_64BIT_MASK, | ||
163 | }, | ||
164 | }; | ||
165 | |||
166 | static struct platform_device iop13xx_tpmi_3_device = { | ||
167 | .name = "iop-tpmi", | ||
168 | .id = 3, | ||
169 | .num_resources = 4, | ||
170 | .resource = iop13xx_tpmi_3_resources, | ||
171 | .dev = { | ||
172 | .dma_mask = &iop13xx_tpmi_mask, | ||
173 | .coherent_dma_mask = DMA_64BIT_MASK, | ||
174 | }, | ||
175 | }; | ||
176 | |||
177 | __init void iop13xx_add_tpmi_devices(void) | ||
178 | { | ||
179 | unsigned short device_id; | ||
180 | |||
181 | /* tpmi's not present on iop341 or iop342 */ | ||
182 | if (__raw_readl(IOP13XX_ESSR0) & IOP13XX_INTERFACE_SEL_PCIX) | ||
183 | /* ATUE must be present */ | ||
184 | device_id = __raw_readw(IOP13XX_ATUE_DID); | ||
185 | else | ||
186 | /* ATUX must be present */ | ||
187 | device_id = __raw_readw(IOP13XX_ATUX_DID); | ||
188 | |||
189 | switch (device_id) { | ||
190 | /* iop34[1|2] 0-tpmi */ | ||
191 | case 0x3380: | ||
192 | case 0x3384: | ||
193 | case 0x3388: | ||
194 | case 0x338c: | ||
195 | case 0x3382: | ||
196 | case 0x3386: | ||
197 | case 0x338a: | ||
198 | case 0x338e: | ||
199 | return; | ||
200 | /* iop348 1-tpmi */ | ||
201 | case 0x3310: | ||
202 | case 0x3312: | ||
203 | case 0x3314: | ||
204 | case 0x3318: | ||
205 | case 0x331a: | ||
206 | case 0x331c: | ||
207 | case 0x33c0: | ||
208 | case 0x33c2: | ||
209 | case 0x33c4: | ||
210 | case 0x33c8: | ||
211 | case 0x33ca: | ||
212 | case 0x33cc: | ||
213 | case 0x33b0: | ||
214 | case 0x33b2: | ||
215 | case 0x33b4: | ||
216 | case 0x33b8: | ||
217 | case 0x33ba: | ||
218 | case 0x33bc: | ||
219 | case 0x3320: | ||
220 | case 0x3322: | ||
221 | case 0x3324: | ||
222 | case 0x3328: | ||
223 | case 0x332a: | ||
224 | case 0x332c: | ||
225 | platform_device_register(&iop13xx_tpmi_0_device); | ||
226 | return; | ||
227 | default: | ||
228 | platform_device_register(&iop13xx_tpmi_0_device); | ||
229 | platform_device_register(&iop13xx_tpmi_1_device); | ||
230 | platform_device_register(&iop13xx_tpmi_2_device); | ||
231 | platform_device_register(&iop13xx_tpmi_3_device); | ||
232 | return; | ||
233 | } | ||
234 | } | ||
diff --git a/arch/arm/mach-iop32x/Kconfig b/arch/arm/mach-iop32x/Kconfig index 9dd49cff21ff..9bb02b6d7ae1 100644 --- a/arch/arm/mach-iop32x/Kconfig +++ b/arch/arm/mach-iop32x/Kconfig | |||
@@ -34,6 +34,14 @@ config MACH_N2100 | |||
34 | Say Y here if you want to run your kernel on the Thecus n2100 | 34 | Say Y here if you want to run your kernel on the Thecus n2100 |
35 | NAS appliance. | 35 | NAS appliance. |
36 | 36 | ||
37 | config IOP3XX_ATU | ||
38 | bool "Enable the PCI Controller" | ||
39 | default y | ||
40 | help | ||
41 | Say Y here if you want the IOP to initialize its PCI Controller. | ||
42 | Say N if the IOP is an add in card, the host system owns the PCI | ||
43 | bus in this case. | ||
44 | |||
37 | endmenu | 45 | endmenu |
38 | 46 | ||
39 | endif | 47 | endif |
diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c index 60e74309a458..7b21c6e13e59 100644 --- a/arch/arm/mach-iop32x/iq31244.c +++ b/arch/arm/mach-iop32x/iq31244.c | |||
@@ -178,9 +178,10 @@ static struct hw_pci iq31244_pci __initdata = { | |||
178 | 178 | ||
179 | static int __init iq31244_pci_init(void) | 179 | static int __init iq31244_pci_init(void) |
180 | { | 180 | { |
181 | if (is_ep80219()) | 181 | if (is_ep80219()) { |
182 | pci_common_init(&ep80219_pci); | 182 | if (iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) |
183 | else if (machine_is_iq31244()) { | 183 | pci_common_init(&ep80219_pci); |
184 | } else if (machine_is_iq31244()) { | ||
184 | if (is_80219()) { | 185 | if (is_80219()) { |
185 | printk("note: iq31244 board type has been selected\n"); | 186 | printk("note: iq31244 board type has been selected\n"); |
186 | printk("note: to select ep80219 operation:\n"); | 187 | printk("note: to select ep80219 operation:\n"); |
@@ -189,7 +190,9 @@ static int __init iq31244_pci_init(void) | |||
189 | printk("\t2/ update boot loader to pass" | 190 | printk("\t2/ update boot loader to pass" |
190 | " the ep80219 id: %d\n", MACH_TYPE_EP80219); | 191 | " the ep80219 id: %d\n", MACH_TYPE_EP80219); |
191 | } | 192 | } |
192 | pci_common_init(&iq31244_pci); | 193 | |
194 | if (iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) | ||
195 | pci_common_init(&iq31244_pci); | ||
193 | } | 196 | } |
194 | 197 | ||
195 | return 0; | 198 | return 0; |
diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c index 361c70c0f64c..bc25fb91e7b9 100644 --- a/arch/arm/mach-iop32x/iq80321.c +++ b/arch/arm/mach-iop32x/iq80321.c | |||
@@ -113,7 +113,8 @@ static struct hw_pci iq80321_pci __initdata = { | |||
113 | 113 | ||
114 | static int __init iq80321_pci_init(void) | 114 | static int __init iq80321_pci_init(void) |
115 | { | 115 | { |
116 | if (machine_is_iq80321()) | 116 | if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) && |
117 | machine_is_iq80321()) | ||
117 | pci_common_init(&iq80321_pci); | 118 | pci_common_init(&iq80321_pci); |
118 | 119 | ||
119 | return 0; | 120 | return 0; |
diff --git a/arch/arm/mach-iop33x/Kconfig b/arch/arm/mach-iop33x/Kconfig index 9aa016bb18f9..45598e096898 100644 --- a/arch/arm/mach-iop33x/Kconfig +++ b/arch/arm/mach-iop33x/Kconfig | |||
@@ -16,6 +16,14 @@ config MACH_IQ80332 | |||
16 | Say Y here if you want to run your kernel on the Intel IQ80332 | 16 | Say Y here if you want to run your kernel on the Intel IQ80332 |
17 | evaluation kit for the IOP332 chipset. | 17 | evaluation kit for the IOP332 chipset. |
18 | 18 | ||
19 | config IOP3XX_ATU | ||
20 | bool "Enable the PCI Controller" | ||
21 | default y | ||
22 | help | ||
23 | Say Y here if you want the IOP to initialize its PCI Controller. | ||
24 | Say N if the IOP is an add in card, the host system owns the PCI | ||
25 | bus in this case. | ||
26 | |||
19 | endmenu | 27 | endmenu |
20 | 28 | ||
21 | endif | 29 | endif |
diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c index 1a9e36138d80..376c932830be 100644 --- a/arch/arm/mach-iop33x/iq80331.c +++ b/arch/arm/mach-iop33x/iq80331.c | |||
@@ -96,7 +96,8 @@ static struct hw_pci iq80331_pci __initdata = { | |||
96 | 96 | ||
97 | static int __init iq80331_pci_init(void) | 97 | static int __init iq80331_pci_init(void) |
98 | { | 98 | { |
99 | if (machine_is_iq80331()) | 99 | if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) && |
100 | machine_is_iq80331()) | ||
100 | pci_common_init(&iq80331_pci); | 101 | pci_common_init(&iq80331_pci); |
101 | 102 | ||
102 | return 0; | 103 | return 0; |
diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c index 96d6f0f3cd21..58c81496c6f6 100644 --- a/arch/arm/mach-iop33x/iq80332.c +++ b/arch/arm/mach-iop33x/iq80332.c | |||
@@ -96,7 +96,8 @@ static struct hw_pci iq80332_pci __initdata = { | |||
96 | 96 | ||
97 | static int __init iq80332_pci_init(void) | 97 | static int __init iq80332_pci_init(void) |
98 | { | 98 | { |
99 | if (machine_is_iq80332()) | 99 | if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) && |
100 | machine_is_iq80332()) | ||
100 | pci_common_init(&iq80332_pci); | 101 | pci_common_init(&iq80332_pci); |
101 | 102 | ||
102 | return 0; | 103 | return 0; |
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index 27b7480f4afe..9cf2498dc99e 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c | |||
@@ -84,59 +84,59 @@ static struct map_desc ixp2000_io_desc[] __initdata = { | |||
84 | .virtual = IXP2000_CAP_VIRT_BASE, | 84 | .virtual = IXP2000_CAP_VIRT_BASE, |
85 | .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE), | 85 | .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE), |
86 | .length = IXP2000_CAP_SIZE, | 86 | .length = IXP2000_CAP_SIZE, |
87 | .type = MT_IXP2000_DEVICE, | 87 | .type = MT_DEVICE_IXP2000, |
88 | }, { | 88 | }, { |
89 | .virtual = IXP2000_INTCTL_VIRT_BASE, | 89 | .virtual = IXP2000_INTCTL_VIRT_BASE, |
90 | .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE), | 90 | .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE), |
91 | .length = IXP2000_INTCTL_SIZE, | 91 | .length = IXP2000_INTCTL_SIZE, |
92 | .type = MT_IXP2000_DEVICE, | 92 | .type = MT_DEVICE_IXP2000, |
93 | }, { | 93 | }, { |
94 | .virtual = IXP2000_PCI_CREG_VIRT_BASE, | 94 | .virtual = IXP2000_PCI_CREG_VIRT_BASE, |
95 | .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE), | 95 | .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE), |
96 | .length = IXP2000_PCI_CREG_SIZE, | 96 | .length = IXP2000_PCI_CREG_SIZE, |
97 | .type = MT_IXP2000_DEVICE, | 97 | .type = MT_DEVICE_IXP2000, |
98 | }, { | 98 | }, { |
99 | .virtual = IXP2000_PCI_CSR_VIRT_BASE, | 99 | .virtual = IXP2000_PCI_CSR_VIRT_BASE, |
100 | .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE), | 100 | .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE), |
101 | .length = IXP2000_PCI_CSR_SIZE, | 101 | .length = IXP2000_PCI_CSR_SIZE, |
102 | .type = MT_IXP2000_DEVICE, | 102 | .type = MT_DEVICE_IXP2000, |
103 | }, { | 103 | }, { |
104 | .virtual = IXP2000_MSF_VIRT_BASE, | 104 | .virtual = IXP2000_MSF_VIRT_BASE, |
105 | .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE), | 105 | .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE), |
106 | .length = IXP2000_MSF_SIZE, | 106 | .length = IXP2000_MSF_SIZE, |
107 | .type = MT_IXP2000_DEVICE, | 107 | .type = MT_DEVICE_IXP2000, |
108 | }, { | 108 | }, { |
109 | .virtual = IXP2000_SCRATCH_RING_VIRT_BASE, | 109 | .virtual = IXP2000_SCRATCH_RING_VIRT_BASE, |
110 | .pfn = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE), | 110 | .pfn = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE), |
111 | .length = IXP2000_SCRATCH_RING_SIZE, | 111 | .length = IXP2000_SCRATCH_RING_SIZE, |
112 | .type = MT_IXP2000_DEVICE, | 112 | .type = MT_DEVICE_IXP2000, |
113 | }, { | 113 | }, { |
114 | .virtual = IXP2000_SRAM0_VIRT_BASE, | 114 | .virtual = IXP2000_SRAM0_VIRT_BASE, |
115 | .pfn = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE), | 115 | .pfn = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE), |
116 | .length = IXP2000_SRAM0_SIZE, | 116 | .length = IXP2000_SRAM0_SIZE, |
117 | .type = MT_IXP2000_DEVICE, | 117 | .type = MT_DEVICE_IXP2000, |
118 | }, { | 118 | }, { |
119 | .virtual = IXP2000_PCI_IO_VIRT_BASE, | 119 | .virtual = IXP2000_PCI_IO_VIRT_BASE, |
120 | .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE), | 120 | .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE), |
121 | .length = IXP2000_PCI_IO_SIZE, | 121 | .length = IXP2000_PCI_IO_SIZE, |
122 | .type = MT_IXP2000_DEVICE, | 122 | .type = MT_DEVICE_IXP2000, |
123 | }, { | 123 | }, { |
124 | .virtual = IXP2000_PCI_CFG0_VIRT_BASE, | 124 | .virtual = IXP2000_PCI_CFG0_VIRT_BASE, |
125 | .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE), | 125 | .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE), |
126 | .length = IXP2000_PCI_CFG0_SIZE, | 126 | .length = IXP2000_PCI_CFG0_SIZE, |
127 | .type = MT_IXP2000_DEVICE, | 127 | .type = MT_DEVICE_IXP2000, |
128 | }, { | 128 | }, { |
129 | .virtual = IXP2000_PCI_CFG1_VIRT_BASE, | 129 | .virtual = IXP2000_PCI_CFG1_VIRT_BASE, |
130 | .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE), | 130 | .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE), |
131 | .length = IXP2000_PCI_CFG1_SIZE, | 131 | .length = IXP2000_PCI_CFG1_SIZE, |
132 | .type = MT_IXP2000_DEVICE, | 132 | .type = MT_DEVICE_IXP2000, |
133 | } | 133 | } |
134 | }; | 134 | }; |
135 | 135 | ||
136 | void __init ixp2000_map_io(void) | 136 | void __init ixp2000_map_io(void) |
137 | { | 137 | { |
138 | /* | 138 | /* |
139 | * On IXP2400 CPUs we need to use MT_IXP2000_DEVICE so that | 139 | * On IXP2400 CPUs we need to use MT_DEVICE_IXP2000 so that |
140 | * XCB=101 (to avoid triggering erratum #66), and given that | 140 | * XCB=101 (to avoid triggering erratum #66), and given that |
141 | * this mode speeds up I/O accesses and we have write buffer | 141 | * this mode speeds up I/O accesses and we have write buffer |
142 | * flushes in the right places anyway, it doesn't hurt to use | 142 | * flushes in the right places anyway, it doesn't hurt to use |
diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c index ac29298c5d3f..500e997ba7a4 100644 --- a/arch/arm/mach-ixp2000/enp2611.c +++ b/arch/arm/mach-ixp2000/enp2611.c | |||
@@ -70,17 +70,17 @@ static struct map_desc enp2611_io_desc[] __initdata = { | |||
70 | .virtual = ENP2611_CALEB_VIRT_BASE, | 70 | .virtual = ENP2611_CALEB_VIRT_BASE, |
71 | .pfn = __phys_to_pfn(ENP2611_CALEB_PHYS_BASE), | 71 | .pfn = __phys_to_pfn(ENP2611_CALEB_PHYS_BASE), |
72 | .length = ENP2611_CALEB_SIZE, | 72 | .length = ENP2611_CALEB_SIZE, |
73 | .type = MT_IXP2000_DEVICE, | 73 | .type = MT_DEVICE_IXP2000, |
74 | }, { | 74 | }, { |
75 | .virtual = ENP2611_PM3386_0_VIRT_BASE, | 75 | .virtual = ENP2611_PM3386_0_VIRT_BASE, |
76 | .pfn = __phys_to_pfn(ENP2611_PM3386_0_PHYS_BASE), | 76 | .pfn = __phys_to_pfn(ENP2611_PM3386_0_PHYS_BASE), |
77 | .length = ENP2611_PM3386_0_SIZE, | 77 | .length = ENP2611_PM3386_0_SIZE, |
78 | .type = MT_IXP2000_DEVICE, | 78 | .type = MT_DEVICE_IXP2000, |
79 | }, { | 79 | }, { |
80 | .virtual = ENP2611_PM3386_1_VIRT_BASE, | 80 | .virtual = ENP2611_PM3386_1_VIRT_BASE, |
81 | .pfn = __phys_to_pfn(ENP2611_PM3386_1_PHYS_BASE), | 81 | .pfn = __phys_to_pfn(ENP2611_PM3386_1_PHYS_BASE), |
82 | .length = ENP2611_PM3386_1_SIZE, | 82 | .length = ENP2611_PM3386_1_SIZE, |
83 | .type = MT_IXP2000_DEVICE, | 83 | .type = MT_DEVICE_IXP2000, |
84 | } | 84 | } |
85 | }; | 85 | }; |
86 | 86 | ||
diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig index 8a339cdfe222..9715ef506c24 100644 --- a/arch/arm/mach-ixp4xx/Kconfig +++ b/arch/arm/mach-ixp4xx/Kconfig | |||
@@ -62,6 +62,12 @@ config MACH_IXDP465 | |||
62 | IXDP465 Development Platform (Also known as BMP). | 62 | IXDP465 Development Platform (Also known as BMP). |
63 | For more information on this platform, see <file:Documentation/arm/IXP4xx>. | 63 | For more information on this platform, see <file:Documentation/arm/IXP4xx>. |
64 | 64 | ||
65 | config MACH_KIXRP435 | ||
66 | bool "KIXRP435" | ||
67 | help | ||
68 | Say 'Y' here if you want your kernel to support Intel's | ||
69 | KIXRP435 Reference Platform. | ||
70 | For more information on this platform, see <file:Documentation/arm/IXP4xx>. | ||
65 | 71 | ||
66 | # | 72 | # |
67 | # IXCDP1100 is the exact same HW as IXDP425, but with a different machine | 73 | # IXCDP1100 is the exact same HW as IXDP425, but with a different machine |
@@ -89,12 +95,21 @@ config MACH_NAS100D | |||
89 | NAS 100d device. For more information on this platform, | 95 | NAS 100d device. For more information on this platform, |
90 | see http://www.nslu2-linux.org/wiki/NAS100d/HomePage | 96 | see http://www.nslu2-linux.org/wiki/NAS100d/HomePage |
91 | 97 | ||
98 | config MACH_DSMG600 | ||
99 | bool | ||
100 | prompt "D-Link DSM-G600 RevA" | ||
101 | select PCI | ||
102 | help | ||
103 | Say 'Y' here if you want your kernel to support D-Link's | ||
104 | DSM-G600 RevA device. For more information on this platform, | ||
105 | see http://www.nslu2-linux.org/wiki/DSMG600/HomePage | ||
106 | |||
92 | # | 107 | # |
93 | # Avila and IXDP share the same source for now. Will change in future | 108 | # Avila and IXDP share the same source for now. Will change in future |
94 | # | 109 | # |
95 | config ARCH_IXDP4XX | 110 | config ARCH_IXDP4XX |
96 | bool | 111 | bool |
97 | depends on ARCH_IXDP425 || MACH_IXDP465 | 112 | depends on ARCH_IXDP425 || MACH_IXDP465 || MACH_KIXRP435 |
98 | default y | 113 | default y |
99 | 114 | ||
100 | # | 115 | # |
@@ -105,6 +120,11 @@ config CPU_IXP46X | |||
105 | depends on MACH_IXDP465 | 120 | depends on MACH_IXDP465 |
106 | default y | 121 | default y |
107 | 122 | ||
123 | config CPU_IXP43X | ||
124 | bool | ||
125 | depends on MACH_KIXRP435 | ||
126 | default y | ||
127 | |||
108 | config MACH_GTWX5715 | 128 | config MACH_GTWX5715 |
109 | bool "Gemtek WX5715 (Linksys WRV54G)" | 129 | bool "Gemtek WX5715 (Linksys WRV54G)" |
110 | depends on ARCH_IXP4XX | 130 | depends on ARCH_IXP4XX |
diff --git a/arch/arm/mach-ixp4xx/Makefile b/arch/arm/mach-ixp4xx/Makefile index 746e297284ed..3b87c47e06cf 100644 --- a/arch/arm/mach-ixp4xx/Makefile +++ b/arch/arm/mach-ixp4xx/Makefile | |||
@@ -12,6 +12,7 @@ obj-pci-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o | |||
12 | obj-pci-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o | 12 | obj-pci-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o |
13 | obj-pci-$(CONFIG_MACH_NSLU2) += nslu2-pci.o | 13 | obj-pci-$(CONFIG_MACH_NSLU2) += nslu2-pci.o |
14 | obj-pci-$(CONFIG_MACH_NAS100D) += nas100d-pci.o | 14 | obj-pci-$(CONFIG_MACH_NAS100D) += nas100d-pci.o |
15 | obj-pci-$(CONFIG_MACH_DSMG600) += dsmg600-pci.o | ||
15 | 16 | ||
16 | obj-y += common.o | 17 | obj-y += common.o |
17 | 18 | ||
@@ -22,5 +23,6 @@ obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-setup.o | |||
22 | obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o | 23 | obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o |
23 | obj-$(CONFIG_MACH_NSLU2) += nslu2-setup.o nslu2-power.o | 24 | obj-$(CONFIG_MACH_NSLU2) += nslu2-setup.o nslu2-power.o |
24 | obj-$(CONFIG_MACH_NAS100D) += nas100d-setup.o nas100d-power.o | 25 | obj-$(CONFIG_MACH_NAS100D) += nas100d-setup.o nas100d-power.o |
26 | obj-$(CONFIG_MACH_DSMG600) += dsmg600-setup.o dsmg600-power.o | ||
25 | 27 | ||
26 | obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o | 28 | obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o |
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 9562177b5fe1..bf04121d1a31 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c | |||
@@ -374,7 +374,7 @@ void __init ixp4xx_pci_preinit(void) | |||
374 | * Determine which PCI read method to use. | 374 | * Determine which PCI read method to use. |
375 | * Rev 0 IXP425 requires workaround. | 375 | * Rev 0 IXP425 requires workaround. |
376 | */ | 376 | */ |
377 | if (!(processor_id & 0xf) && !cpu_is_ixp46x()) { | 377 | if (!(processor_id & 0xf) && cpu_is_ixp42x()) { |
378 | printk("PCI: IXP42x A0 silicon detected - " | 378 | printk("PCI: IXP42x A0 silicon detected - " |
379 | "PCI Non-Prefetch Workaround Enabled\n"); | 379 | "PCI Non-Prefetch Workaround Enabled\n"); |
380 | ixp4xx_pci_read = ixp4xx_pci_read_errata; | 380 | ixp4xx_pci_read = ixp4xx_pci_read_errata; |
@@ -480,7 +480,7 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys) | |||
480 | res[0].flags = IORESOURCE_IO; | 480 | res[0].flags = IORESOURCE_IO; |
481 | 481 | ||
482 | res[1].name = "PCI Memory Space"; | 482 | res[1].name = "PCI Memory Space"; |
483 | res[1].start = 0x48000000; | 483 | res[1].start = PCIBIOS_MIN_MEM; |
484 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 484 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
485 | res[1].end = 0x4bffffff; | 485 | res[1].end = 0x4bffffff; |
486 | #else | 486 | #else |
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 45068c3d8dcc..f5cae1e46b7e 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/time.h> | 27 | #include <linux/time.h> |
28 | #include <linux/timex.h> | 28 | #include <linux/timex.h> |
29 | #include <linux/clocksource.h> | 29 | #include <linux/clocksource.h> |
30 | #include <linux/clockchips.h> | ||
30 | 31 | ||
31 | #include <asm/arch/udc.h> | 32 | #include <asm/arch/udc.h> |
32 | #include <asm/hardware.h> | 33 | #include <asm/hardware.h> |
@@ -41,6 +42,8 @@ | |||
41 | #include <asm/mach/time.h> | 42 | #include <asm/mach/time.h> |
42 | 43 | ||
43 | static int __init ixp4xx_clocksource_init(void); | 44 | static int __init ixp4xx_clocksource_init(void); |
45 | static int __init ixp4xx_clockevent_init(void); | ||
46 | static struct clock_event_device clockevent_ixp4xx; | ||
44 | 47 | ||
45 | /************************************************************************* | 48 | /************************************************************************* |
46 | * IXP4xx chipset I/O mapping | 49 | * IXP4xx chipset I/O mapping |
@@ -102,6 +105,29 @@ static signed char irq2gpio[32] = { | |||
102 | 7, 8, 9, 10, 11, 12, -1, -1, | 105 | 7, 8, 9, 10, 11, 12, -1, -1, |
103 | }; | 106 | }; |
104 | 107 | ||
108 | int gpio_to_irq(int gpio) | ||
109 | { | ||
110 | int irq; | ||
111 | |||
112 | for (irq = 0; irq < 32; irq++) { | ||
113 | if (irq2gpio[irq] == gpio) | ||
114 | return irq; | ||
115 | } | ||
116 | return -EINVAL; | ||
117 | } | ||
118 | EXPORT_SYMBOL(gpio_to_irq); | ||
119 | |||
120 | int irq_to_gpio(int irq) | ||
121 | { | ||
122 | int gpio = (irq < 32) ? irq2gpio[irq] : -EINVAL; | ||
123 | |||
124 | if (gpio == -1) | ||
125 | return -EINVAL; | ||
126 | |||
127 | return gpio; | ||
128 | } | ||
129 | EXPORT_SYMBOL(irq_to_gpio); | ||
130 | |||
105 | static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type) | 131 | static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type) |
106 | { | 132 | { |
107 | int line = irq2gpio[irq]; | 133 | int line = irq2gpio[irq]; |
@@ -169,7 +195,7 @@ static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type) | |||
169 | 195 | ||
170 | static void ixp4xx_irq_mask(unsigned int irq) | 196 | static void ixp4xx_irq_mask(unsigned int irq) |
171 | { | 197 | { |
172 | if (cpu_is_ixp46x() && irq >= 32) | 198 | if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && irq >= 32) |
173 | *IXP4XX_ICMR2 &= ~(1 << (irq - 32)); | 199 | *IXP4XX_ICMR2 &= ~(1 << (irq - 32)); |
174 | else | 200 | else |
175 | *IXP4XX_ICMR &= ~(1 << irq); | 201 | *IXP4XX_ICMR &= ~(1 << irq); |
@@ -192,7 +218,7 @@ static void ixp4xx_irq_unmask(unsigned int irq) | |||
192 | if (!(ixp4xx_irq_edge & (1 << irq))) | 218 | if (!(ixp4xx_irq_edge & (1 << irq))) |
193 | ixp4xx_irq_ack(irq); | 219 | ixp4xx_irq_ack(irq); |
194 | 220 | ||
195 | if (cpu_is_ixp46x() && irq >= 32) | 221 | if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && irq >= 32) |
196 | *IXP4XX_ICMR2 |= (1 << (irq - 32)); | 222 | *IXP4XX_ICMR2 |= (1 << (irq - 32)); |
197 | else | 223 | else |
198 | *IXP4XX_ICMR |= (1 << irq); | 224 | *IXP4XX_ICMR |= (1 << irq); |
@@ -216,7 +242,7 @@ void __init ixp4xx_init_irq(void) | |||
216 | /* Disable all interrupt */ | 242 | /* Disable all interrupt */ |
217 | *IXP4XX_ICMR = 0x0; | 243 | *IXP4XX_ICMR = 0x0; |
218 | 244 | ||
219 | if (cpu_is_ixp46x()) { | 245 | if (cpu_is_ixp46x() || cpu_is_ixp43x()) { |
220 | /* Route upper 32 sources to IRQ instead of FIQ */ | 246 | /* Route upper 32 sources to IRQ instead of FIQ */ |
221 | *IXP4XX_ICLR2 = 0x00; | 247 | *IXP4XX_ICLR2 = 0x00; |
222 | 248 | ||
@@ -239,52 +265,40 @@ void __init ixp4xx_init_irq(void) | |||
239 | * counter as a source of real clock ticks to account for missed jiffies. | 265 | * counter as a source of real clock ticks to account for missed jiffies. |
240 | *************************************************************************/ | 266 | *************************************************************************/ |
241 | 267 | ||
242 | static unsigned volatile last_jiffy_time; | ||
243 | |||
244 | #define CLOCK_TICKS_PER_USEC ((CLOCK_TICK_RATE + USEC_PER_SEC/2) / USEC_PER_SEC) | ||
245 | |||
246 | static irqreturn_t ixp4xx_timer_interrupt(int irq, void *dev_id) | 268 | static irqreturn_t ixp4xx_timer_interrupt(int irq, void *dev_id) |
247 | { | 269 | { |
248 | write_seqlock(&xtime_lock); | 270 | struct clock_event_device *evt = &clockevent_ixp4xx; |
249 | 271 | ||
250 | /* Clear Pending Interrupt by writing '1' to it */ | 272 | /* Clear Pending Interrupt by writing '1' to it */ |
251 | *IXP4XX_OSST = IXP4XX_OSST_TIMER_1_PEND; | 273 | *IXP4XX_OSST = IXP4XX_OSST_TIMER_1_PEND; |
252 | 274 | ||
253 | /* | 275 | evt->event_handler(evt); |
254 | * Catch up with the real idea of time | ||
255 | */ | ||
256 | while ((signed long)(*IXP4XX_OSTS - last_jiffy_time) >= LATCH) { | ||
257 | timer_tick(); | ||
258 | last_jiffy_time += LATCH; | ||
259 | } | ||
260 | |||
261 | write_sequnlock(&xtime_lock); | ||
262 | 276 | ||
263 | return IRQ_HANDLED; | 277 | return IRQ_HANDLED; |
264 | } | 278 | } |
265 | 279 | ||
266 | static struct irqaction ixp4xx_timer_irq = { | 280 | static struct irqaction ixp4xx_timer_irq = { |
267 | .name = "IXP4xx Timer Tick", | 281 | .name = "timer1", |
268 | .flags = IRQF_DISABLED | IRQF_TIMER, | 282 | .flags = IRQF_DISABLED | IRQF_TIMER, |
269 | .handler = ixp4xx_timer_interrupt, | 283 | .handler = ixp4xx_timer_interrupt, |
270 | }; | 284 | }; |
271 | 285 | ||
272 | static void __init ixp4xx_timer_init(void) | 286 | static void __init ixp4xx_timer_init(void) |
273 | { | 287 | { |
288 | /* Reset/disable counter */ | ||
289 | *IXP4XX_OSRT1 = 0; | ||
290 | |||
274 | /* Clear Pending Interrupt by writing '1' to it */ | 291 | /* Clear Pending Interrupt by writing '1' to it */ |
275 | *IXP4XX_OSST = IXP4XX_OSST_TIMER_1_PEND; | 292 | *IXP4XX_OSST = IXP4XX_OSST_TIMER_1_PEND; |
276 | 293 | ||
277 | /* Setup the Timer counter value */ | ||
278 | *IXP4XX_OSRT1 = (LATCH & ~IXP4XX_OST_RELOAD_MASK) | IXP4XX_OST_ENABLE; | ||
279 | |||
280 | /* Reset time-stamp counter */ | 294 | /* Reset time-stamp counter */ |
281 | *IXP4XX_OSTS = 0; | 295 | *IXP4XX_OSTS = 0; |
282 | last_jiffy_time = 0; | ||
283 | 296 | ||
284 | /* Connect the interrupt handler and enable the interrupt */ | 297 | /* Connect the interrupt handler and enable the interrupt */ |
285 | setup_irq(IRQ_IXP4XX_TIMER1, &ixp4xx_timer_irq); | 298 | setup_irq(IRQ_IXP4XX_TIMER1, &ixp4xx_timer_irq); |
286 | 299 | ||
287 | ixp4xx_clocksource_init(); | 300 | ixp4xx_clocksource_init(); |
301 | ixp4xx_clockevent_init(); | ||
288 | } | 302 | } |
289 | 303 | ||
290 | struct sys_timer ixp4xx_timer = { | 304 | struct sys_timer ixp4xx_timer = { |
@@ -384,6 +398,9 @@ void __init ixp4xx_sys_init(void) | |||
384 | ixp4xx_exp_bus_size >> 20); | 398 | ixp4xx_exp_bus_size >> 20); |
385 | } | 399 | } |
386 | 400 | ||
401 | /* | ||
402 | * clocksource | ||
403 | */ | ||
387 | cycle_t ixp4xx_get_cycles(void) | 404 | cycle_t ixp4xx_get_cycles(void) |
388 | { | 405 | { |
389 | return *IXP4XX_OSTS; | 406 | return *IXP4XX_OSTS; |
@@ -408,3 +425,64 @@ static int __init ixp4xx_clocksource_init(void) | |||
408 | 425 | ||
409 | return 0; | 426 | return 0; |
410 | } | 427 | } |
428 | |||
429 | /* | ||
430 | * clockevents | ||
431 | */ | ||
432 | static int ixp4xx_set_next_event(unsigned long evt, | ||
433 | struct clock_event_device *unused) | ||
434 | { | ||
435 | unsigned long opts = *IXP4XX_OSRT1 & IXP4XX_OST_RELOAD_MASK; | ||
436 | |||
437 | *IXP4XX_OSRT1 = (evt & ~IXP4XX_OST_RELOAD_MASK) | opts; | ||
438 | |||
439 | return 0; | ||
440 | } | ||
441 | |||
442 | static void ixp4xx_set_mode(enum clock_event_mode mode, | ||
443 | struct clock_event_device *evt) | ||
444 | { | ||
445 | unsigned long opts, osrt = *IXP4XX_OSRT1 & ~IXP4XX_OST_RELOAD_MASK; | ||
446 | |||
447 | switch (mode) { | ||
448 | case CLOCK_EVT_MODE_PERIODIC: | ||
449 | osrt = LATCH & ~IXP4XX_OST_RELOAD_MASK; | ||
450 | opts = IXP4XX_OST_ENABLE; | ||
451 | break; | ||
452 | case CLOCK_EVT_MODE_ONESHOT: | ||
453 | /* period set by 'set next_event' */ | ||
454 | osrt = 0; | ||
455 | opts = IXP4XX_OST_ENABLE | IXP4XX_OST_ONE_SHOT; | ||
456 | break; | ||
457 | case CLOCK_EVT_MODE_SHUTDOWN: | ||
458 | case CLOCK_EVT_MODE_UNUSED: | ||
459 | default: | ||
460 | osrt = opts = 0; | ||
461 | break; | ||
462 | } | ||
463 | |||
464 | *IXP4XX_OSRT1 = osrt | opts; | ||
465 | } | ||
466 | |||
467 | static struct clock_event_device clockevent_ixp4xx = { | ||
468 | .name = "ixp4xx timer1", | ||
469 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | ||
470 | .rating = 200, | ||
471 | .shift = 24, | ||
472 | .set_mode = ixp4xx_set_mode, | ||
473 | .set_next_event = ixp4xx_set_next_event, | ||
474 | }; | ||
475 | |||
476 | static int __init ixp4xx_clockevent_init(void) | ||
477 | { | ||
478 | clockevent_ixp4xx.mult = div_sc(FREQ, NSEC_PER_SEC, | ||
479 | clockevent_ixp4xx.shift); | ||
480 | clockevent_ixp4xx.max_delta_ns = | ||
481 | clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx); | ||
482 | clockevent_ixp4xx.min_delta_ns = | ||
483 | clockevent_delta2ns(0xf, &clockevent_ixp4xx); | ||
484 | clockevent_ixp4xx.cpumask = cpumask_of_cpu(0); | ||
485 | |||
486 | clockevents_register_device(&clockevent_ixp4xx); | ||
487 | return 0; | ||
488 | } | ||
diff --git a/arch/arm/mach-ixp4xx/dsmg600-pci.c b/arch/arm/mach-ixp4xx/dsmg600-pci.c new file mode 100644 index 000000000000..9db7e1f42011 --- /dev/null +++ b/arch/arm/mach-ixp4xx/dsmg600-pci.c | |||
@@ -0,0 +1,74 @@ | |||
1 | /* | ||
2 | * DSM-G600 board-level PCI initialization | ||
3 | * | ||
4 | * Copyright (C) 2006 Tower Technologies | ||
5 | * Author: Alessandro Zummo <a.zummo@towertech.it> | ||
6 | * | ||
7 | * based on ixdp425-pci.c: | ||
8 | * Copyright (C) 2002 Intel Corporation. | ||
9 | * Copyright (C) 2003-2004 MontaVista Software, Inc. | ||
10 | * | ||
11 | * Maintainer: http://www.nslu2-linux.org/ | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU General Public License version 2 as | ||
15 | * published by the Free Software Foundation. | ||
16 | * | ||
17 | */ | ||
18 | |||
19 | #include <linux/pci.h> | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/irq.h> | ||
22 | |||
23 | #include <asm/mach/pci.h> | ||
24 | #include <asm/mach-types.h> | ||
25 | |||
26 | void __init dsmg600_pci_preinit(void) | ||
27 | { | ||
28 | set_irq_type(IRQ_DSMG600_PCI_INTA, IRQT_LOW); | ||
29 | set_irq_type(IRQ_DSMG600_PCI_INTB, IRQT_LOW); | ||
30 | set_irq_type(IRQ_DSMG600_PCI_INTC, IRQT_LOW); | ||
31 | set_irq_type(IRQ_DSMG600_PCI_INTD, IRQT_LOW); | ||
32 | set_irq_type(IRQ_DSMG600_PCI_INTE, IRQT_LOW); | ||
33 | set_irq_type(IRQ_DSMG600_PCI_INTF, IRQT_LOW); | ||
34 | |||
35 | ixp4xx_pci_preinit(); | ||
36 | } | ||
37 | |||
38 | static int __init dsmg600_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | ||
39 | { | ||
40 | static int pci_irq_table[DSMG600_PCI_MAX_DEV][DSMG600_PCI_IRQ_LINES] = | ||
41 | { | ||
42 | { IRQ_DSMG600_PCI_INTE, -1, -1 }, | ||
43 | { IRQ_DSMG600_PCI_INTA, -1, -1 }, | ||
44 | { IRQ_DSMG600_PCI_INTB, IRQ_DSMG600_PCI_INTC, IRQ_DSMG600_PCI_INTD }, | ||
45 | { IRQ_DSMG600_PCI_INTF, -1, -1 }, | ||
46 | }; | ||
47 | |||
48 | int irq = -1; | ||
49 | |||
50 | if (slot >= 1 && slot <= DSMG600_PCI_MAX_DEV && | ||
51 | pin >= 1 && pin <= DSMG600_PCI_IRQ_LINES) | ||
52 | irq = pci_irq_table[slot-1][pin-1]; | ||
53 | |||
54 | return irq; | ||
55 | } | ||
56 | |||
57 | struct hw_pci __initdata dsmg600_pci = { | ||
58 | .nr_controllers = 1, | ||
59 | .preinit = dsmg600_pci_preinit, | ||
60 | .swizzle = pci_std_swizzle, | ||
61 | .setup = ixp4xx_setup, | ||
62 | .scan = ixp4xx_scan_bus, | ||
63 | .map_irq = dsmg600_map_irq, | ||
64 | }; | ||
65 | |||
66 | int __init dsmg600_pci_init(void) | ||
67 | { | ||
68 | if (machine_is_dsmg600()) | ||
69 | pci_common_init(&dsmg600_pci); | ||
70 | |||
71 | return 0; | ||
72 | } | ||
73 | |||
74 | subsys_initcall(dsmg600_pci_init); | ||
diff --git a/arch/arm/mach-ixp4xx/dsmg600-power.c b/arch/arm/mach-ixp4xx/dsmg600-power.c new file mode 100644 index 000000000000..34717872d076 --- /dev/null +++ b/arch/arm/mach-ixp4xx/dsmg600-power.c | |||
@@ -0,0 +1,125 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ixp4xx/dsmg600-power.c | ||
3 | * | ||
4 | * DSM-G600 Power/Reset driver | ||
5 | * Author: Michael Westerhof <mwester@dls.net> | ||
6 | * | ||
7 | * Based on nslu2-power.c | ||
8 | * Copyright (C) 2005 Tower Technologies | ||
9 | * Author: Alessandro Zummo <a.zummo@towertech.it> | ||
10 | * | ||
11 | * which was based on nslu2-io.c | ||
12 | * Copyright (C) 2004 Karen Spearel | ||
13 | * | ||
14 | * Maintainers: http://www.nslu2-linux.org/ | ||
15 | * | ||
16 | * This program is free software; you can redistribute it and/or modify | ||
17 | * it under the terms of the GNU General Public License version 2 as | ||
18 | * published by the Free Software Foundation. | ||
19 | * | ||
20 | */ | ||
21 | |||
22 | #include <linux/module.h> | ||
23 | #include <linux/reboot.h> | ||
24 | #include <linux/interrupt.h> | ||
25 | #include <linux/irq.h> | ||
26 | #include <linux/jiffies.h> | ||
27 | #include <linux/timer.h> | ||
28 | |||
29 | #include <asm/mach-types.h> | ||
30 | |||
31 | extern void ctrl_alt_del(void); | ||
32 | |||
33 | /* This is used to make sure the power-button pusher is serious. The button | ||
34 | * must be held until the value of this counter reaches zero. | ||
35 | */ | ||
36 | static volatile int power_button_countdown; | ||
37 | |||
38 | /* Must hold the button down for at least this many counts to be processed */ | ||
39 | #define PBUTTON_HOLDDOWN_COUNT 4 /* 2 secs */ | ||
40 | |||
41 | static void dsmg600_power_handler(unsigned long data); | ||
42 | static DEFINE_TIMER(dsmg600_power_timer, dsmg600_power_handler, 0, 0); | ||
43 | |||
44 | static void dsmg600_power_handler(unsigned long data) | ||
45 | { | ||
46 | /* This routine is called twice per second to check the | ||
47 | * state of the power button. | ||
48 | */ | ||
49 | |||
50 | if (*IXP4XX_GPIO_GPINR & DSMG600_PB_BM) { | ||
51 | |||
52 | /* IO Pin is 1 (button pushed) */ | ||
53 | if (power_button_countdown == 0) { | ||
54 | /* Signal init to do the ctrlaltdel action, this will bypass | ||
55 | * init if it hasn't started and do a kernel_restart. | ||
56 | */ | ||
57 | ctrl_alt_del(); | ||
58 | |||
59 | /* Change the state of the power LED to "blink" */ | ||
60 | gpio_line_set(DSMG600_LED_PWR_GPIO, IXP4XX_GPIO_LOW); | ||
61 | } | ||
62 | power_button_countdown--; | ||
63 | |||
64 | } else { | ||
65 | power_button_countdown = PBUTTON_HOLDDOWN_COUNT; | ||
66 | } | ||
67 | |||
68 | mod_timer(&dsmg600_power_timer, jiffies + msecs_to_jiffies(500)); | ||
69 | } | ||
70 | |||
71 | static irqreturn_t dsmg600_reset_handler(int irq, void *dev_id) | ||
72 | { | ||
73 | /* This is the paper-clip reset, it shuts the machine down directly. */ | ||
74 | machine_power_off(); | ||
75 | |||
76 | return IRQ_HANDLED; | ||
77 | } | ||
78 | |||
79 | static int __init dsmg600_power_init(void) | ||
80 | { | ||
81 | if (!(machine_is_dsmg600())) | ||
82 | return 0; | ||
83 | |||
84 | if (request_irq(DSMG600_RB_IRQ, &dsmg600_reset_handler, | ||
85 | IRQF_DISABLED | IRQF_TRIGGER_LOW, "DSM-G600 reset button", | ||
86 | NULL) < 0) { | ||
87 | |||
88 | printk(KERN_DEBUG "Reset Button IRQ %d not available\n", | ||
89 | DSMG600_RB_IRQ); | ||
90 | |||
91 | return -EIO; | ||
92 | } | ||
93 | |||
94 | /* The power button on the D-Link DSM-G600 is on GPIO 15, but | ||
95 | * it cannot handle interrupts on that GPIO line. So we'll | ||
96 | * have to poll it with a kernel timer. | ||
97 | */ | ||
98 | |||
99 | /* Make sure that the power button GPIO is set up as an input */ | ||
100 | gpio_line_config(DSMG600_PB_GPIO, IXP4XX_GPIO_IN); | ||
101 | |||
102 | /* Set the initial value for the power button IRQ handler */ | ||
103 | power_button_countdown = PBUTTON_HOLDDOWN_COUNT; | ||
104 | |||
105 | mod_timer(&dsmg600_power_timer, jiffies + msecs_to_jiffies(500)); | ||
106 | |||
107 | return 0; | ||
108 | } | ||
109 | |||
110 | static void __exit dsmg600_power_exit(void) | ||
111 | { | ||
112 | if (!(machine_is_dsmg600())) | ||
113 | return; | ||
114 | |||
115 | del_timer_sync(&dsmg600_power_timer); | ||
116 | |||
117 | free_irq(DSMG600_RB_IRQ, NULL); | ||
118 | } | ||
119 | |||
120 | module_init(dsmg600_power_init); | ||
121 | module_exit(dsmg600_power_exit); | ||
122 | |||
123 | MODULE_AUTHOR("Michael Westerhof <mwester@dls.net>"); | ||
124 | MODULE_DESCRIPTION("DSM-G600 Power/Reset driver"); | ||
125 | MODULE_LICENSE("GPL"); | ||
diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c new file mode 100644 index 000000000000..1caff65e22cc --- /dev/null +++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c | |||
@@ -0,0 +1,175 @@ | |||
1 | /* | ||
2 | * DSM-G600 board-setup | ||
3 | * | ||
4 | * Copyright (C) 2006 Tower Technologies | ||
5 | * Author: Alessandro Zummo <a.zummo@towertech.it> | ||
6 | * | ||
7 | * based ixdp425-setup.c: | ||
8 | * Copyright (C) 2003-2004 MontaVista Software, Inc. | ||
9 | * | ||
10 | * Author: Alessandro Zummo <a.zummo@towertech.it> | ||
11 | * Maintainers: http://www.nslu2-linux.org/ | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/serial.h> | ||
16 | #include <linux/serial_8250.h> | ||
17 | |||
18 | #include <asm/mach-types.h> | ||
19 | #include <asm/mach/arch.h> | ||
20 | #include <asm/mach/flash.h> | ||
21 | |||
22 | static struct flash_platform_data dsmg600_flash_data = { | ||
23 | .map_name = "cfi_probe", | ||
24 | .width = 2, | ||
25 | }; | ||
26 | |||
27 | static struct resource dsmg600_flash_resource = { | ||
28 | .flags = IORESOURCE_MEM, | ||
29 | }; | ||
30 | |||
31 | static struct platform_device dsmg600_flash = { | ||
32 | .name = "IXP4XX-Flash", | ||
33 | .id = 0, | ||
34 | .dev.platform_data = &dsmg600_flash_data, | ||
35 | .num_resources = 1, | ||
36 | .resource = &dsmg600_flash_resource, | ||
37 | }; | ||
38 | |||
39 | static struct ixp4xx_i2c_pins dsmg600_i2c_gpio_pins = { | ||
40 | .sda_pin = DSMG600_SDA_PIN, | ||
41 | .scl_pin = DSMG600_SCL_PIN, | ||
42 | }; | ||
43 | |||
44 | static struct platform_device dsmg600_i2c_controller = { | ||
45 | .name = "IXP4XX-I2C", | ||
46 | .id = 0, | ||
47 | .dev.platform_data = &dsmg600_i2c_gpio_pins, | ||
48 | }; | ||
49 | |||
50 | #ifdef CONFIG_LEDS_CLASS | ||
51 | static struct resource dsmg600_led_resources[] = { | ||
52 | { | ||
53 | .name = "power", | ||
54 | .start = DSMG600_LED_PWR_GPIO, | ||
55 | .end = DSMG600_LED_PWR_GPIO, | ||
56 | .flags = IXP4XX_GPIO_HIGH, | ||
57 | }, | ||
58 | { | ||
59 | .name = "wlan", | ||
60 | .start = DSMG600_LED_WLAN_GPIO, | ||
61 | .end = DSMG600_LED_WLAN_GPIO, | ||
62 | .flags = IXP4XX_GPIO_LOW, | ||
63 | }, | ||
64 | }; | ||
65 | |||
66 | static struct platform_device dsmg600_leds = { | ||
67 | .name = "IXP4XX-GPIO-LED", | ||
68 | .id = -1, | ||
69 | .num_resources = ARRAY_SIZE(dsmg600_led_resources), | ||
70 | .resource = dsmg600_led_resources, | ||
71 | }; | ||
72 | #endif | ||
73 | |||
74 | static struct resource dsmg600_uart_resources[] = { | ||
75 | { | ||
76 | .start = IXP4XX_UART1_BASE_PHYS, | ||
77 | .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, | ||
78 | .flags = IORESOURCE_MEM, | ||
79 | }, | ||
80 | { | ||
81 | .start = IXP4XX_UART2_BASE_PHYS, | ||
82 | .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, | ||
83 | .flags = IORESOURCE_MEM, | ||
84 | } | ||
85 | }; | ||
86 | |||
87 | static struct plat_serial8250_port dsmg600_uart_data[] = { | ||
88 | { | ||
89 | .mapbase = IXP4XX_UART1_BASE_PHYS, | ||
90 | .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, | ||
91 | .irq = IRQ_IXP4XX_UART1, | ||
92 | .flags = UPF_BOOT_AUTOCONF, | ||
93 | .iotype = UPIO_MEM, | ||
94 | .regshift = 2, | ||
95 | .uartclk = IXP4XX_UART_XTAL, | ||
96 | }, | ||
97 | { | ||
98 | .mapbase = IXP4XX_UART2_BASE_PHYS, | ||
99 | .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, | ||
100 | .irq = IRQ_IXP4XX_UART2, | ||
101 | .flags = UPF_BOOT_AUTOCONF, | ||
102 | .iotype = UPIO_MEM, | ||
103 | .regshift = 2, | ||
104 | .uartclk = IXP4XX_UART_XTAL, | ||
105 | }, | ||
106 | { } | ||
107 | }; | ||
108 | |||
109 | static struct platform_device dsmg600_uart = { | ||
110 | .name = "serial8250", | ||
111 | .id = PLAT8250_DEV_PLATFORM, | ||
112 | .dev.platform_data = dsmg600_uart_data, | ||
113 | .num_resources = ARRAY_SIZE(dsmg600_uart_resources), | ||
114 | .resource = dsmg600_uart_resources, | ||
115 | }; | ||
116 | |||
117 | static struct platform_device *dsmg600_devices[] __initdata = { | ||
118 | &dsmg600_i2c_controller, | ||
119 | &dsmg600_flash, | ||
120 | }; | ||
121 | |||
122 | static void dsmg600_power_off(void) | ||
123 | { | ||
124 | /* enable the pwr cntl gpio */ | ||
125 | gpio_line_config(DSMG600_PO_GPIO, IXP4XX_GPIO_OUT); | ||
126 | |||
127 | /* poweroff */ | ||
128 | gpio_line_set(DSMG600_PO_GPIO, IXP4XX_GPIO_HIGH); | ||
129 | } | ||
130 | |||
131 | static void __init dsmg600_init(void) | ||
132 | { | ||
133 | ixp4xx_sys_init(); | ||
134 | |||
135 | /* Make sure that GPIO14 and GPIO15 are not used as clocks */ | ||
136 | *IXP4XX_GPIO_GPCLKR = 0; | ||
137 | |||
138 | dsmg600_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); | ||
139 | dsmg600_flash_resource.end = | ||
140 | IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1; | ||
141 | |||
142 | pm_power_off = dsmg600_power_off; | ||
143 | |||
144 | /* The UART is required on the DSM-G600 (Redboot cannot use the | ||
145 | * NIC) -- do it here so that it does *not* get removed if | ||
146 | * platform_add_devices fails! | ||
147 | */ | ||
148 | (void)platform_device_register(&dsmg600_uart); | ||
149 | |||
150 | platform_add_devices(dsmg600_devices, ARRAY_SIZE(dsmg600_devices)); | ||
151 | |||
152 | #ifdef CONFIG_LEDS_CLASS | ||
153 | /* We don't care whether or not this works. */ | ||
154 | (void)platform_device_register(&dsmg600_leds); | ||
155 | #endif | ||
156 | } | ||
157 | |||
158 | static void __init dsmg600_fixup(struct machine_desc *desc, | ||
159 | struct tag *tags, char **cmdline, struct meminfo *mi) | ||
160 | { | ||
161 | /* The xtal on this machine is non-standard. */ | ||
162 | ixp4xx_timer_freq = DSMG600_FREQ; | ||
163 | } | ||
164 | |||
165 | MACHINE_START(DSMG600, "D-Link DSM-G600 RevA") | ||
166 | /* Maintainer: www.nslu2-linux.org */ | ||
167 | .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, | ||
168 | .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xFFFC, | ||
169 | .boot_params = 0x00000100, | ||
170 | .fixup = dsmg600_fixup, | ||
171 | .map_io = ixp4xx_map_io, | ||
172 | .init_irq = ixp4xx_init_irq, | ||
173 | .timer = &ixp4xx_timer, | ||
174 | .init_machine = dsmg600_init, | ||
175 | MACHINE_END | ||
diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c index 99c1dc8033c8..408796004812 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-pci.c +++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c | |||
@@ -66,7 +66,7 @@ struct hw_pci ixdp425_pci __initdata = { | |||
66 | int __init ixdp425_pci_init(void) | 66 | int __init ixdp425_pci_init(void) |
67 | { | 67 | { |
68 | if (machine_is_ixdp425() || machine_is_ixcdp1100() || | 68 | if (machine_is_ixdp425() || machine_is_ixcdp1100() || |
69 | machine_is_ixdp465()) | 69 | machine_is_ixdp465() || machine_is_kixrp435()) |
70 | pci_common_init(&ixdp425_pci); | 70 | pci_common_init(&ixdp425_pci); |
71 | return 0; | 71 | return 0; |
72 | } | 72 | } |
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c index 04b1d56396a0..ec4f07950ec6 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-setup.c +++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c | |||
@@ -115,6 +115,11 @@ static void __init ixdp425_init(void) | |||
115 | ixdp425_flash_resource.end = | 115 | ixdp425_flash_resource.end = |
116 | IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1; | 116 | IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1; |
117 | 117 | ||
118 | if (cpu_is_ixp43x()) { | ||
119 | ixdp425_uart.num_resources = 1; | ||
120 | ixdp425_uart_data[1].flags = 0; | ||
121 | } | ||
122 | |||
118 | platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices)); | 123 | platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices)); |
119 | } | 124 | } |
120 | 125 | ||
@@ -156,3 +161,16 @@ MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform") | |||
156 | .init_machine = ixdp425_init, | 161 | .init_machine = ixdp425_init, |
157 | MACHINE_END | 162 | MACHINE_END |
158 | #endif | 163 | #endif |
164 | |||
165 | #ifdef CONFIG_MACH_KIXRP435 | ||
166 | MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform") | ||
167 | /* Maintainer: MontaVista Software, Inc. */ | ||
168 | .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, | ||
169 | .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, | ||
170 | .map_io = ixp4xx_map_io, | ||
171 | .init_irq = ixp4xx_init_irq, | ||
172 | .timer = &ixp4xx_timer, | ||
173 | .boot_params = 0x0100, | ||
174 | .init_machine = ixdp425_init, | ||
175 | MACHINE_END | ||
176 | #endif | ||
diff --git a/arch/arm/mach-lh7a40x/irq-lh7a400.c b/arch/arm/mach-lh7a40x/irq-lh7a400.c index 0b938e8b4d98..9472bbebd8ab 100644 --- a/arch/arm/mach-lh7a40x/irq-lh7a400.c +++ b/arch/arm/mach-lh7a40x/irq-lh7a400.c | |||
@@ -11,7 +11,6 @@ | |||
11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
13 | #include <linux/interrupt.h> | 13 | #include <linux/interrupt.h> |
14 | #include <linux/ptrace.h> | ||
15 | 14 | ||
16 | #include <asm/hardware.h> | 15 | #include <asm/hardware.h> |
17 | #include <asm/irq.h> | 16 | #include <asm/irq.h> |
diff --git a/arch/arm/mach-lh7a40x/irq-lh7a404.c b/arch/arm/mach-lh7a40x/irq-lh7a404.c index 5760f8c53e89..9b28389035e6 100644 --- a/arch/arm/mach-lh7a40x/irq-lh7a404.c +++ b/arch/arm/mach-lh7a40x/irq-lh7a404.c | |||
@@ -11,7 +11,6 @@ | |||
11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
13 | #include <linux/interrupt.h> | 13 | #include <linux/interrupt.h> |
14 | #include <linux/ptrace.h> | ||
15 | 14 | ||
16 | #include <asm/hardware.h> | 15 | #include <asm/hardware.h> |
17 | #include <asm/irq.h> | 16 | #include <asm/irq.h> |
diff --git a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c index 15b9577023c9..66e1ed3961ea 100644 --- a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c +++ b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c | |||
@@ -12,7 +12,6 @@ | |||
12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | #include <linux/interrupt.h> | 14 | #include <linux/interrupt.h> |
15 | #include <linux/ptrace.h> | ||
16 | 15 | ||
17 | #include <asm/hardware.h> | 16 | #include <asm/hardware.h> |
18 | #include <asm/irq.h> | 17 | #include <asm/irq.h> |
diff --git a/arch/arm/mach-ns9xxx/Kconfig b/arch/arm/mach-ns9xxx/Kconfig index 8175ba92a2fa..8584ed107991 100644 --- a/arch/arm/mach-ns9xxx/Kconfig +++ b/arch/arm/mach-ns9xxx/Kconfig | |||
@@ -3,19 +3,30 @@ if ARCH_NS9XXX | |||
3 | menu "NS9xxx Implementations" | 3 | menu "NS9xxx Implementations" |
4 | 4 | ||
5 | config MACH_CC9P9360DEV | 5 | config MACH_CC9P9360DEV |
6 | bool "Connect Core 9P 9360 on an A9M9750 Devboard" | 6 | bool "ConnectCore 9P 9360 on an A9M9750 Devboard" |
7 | select PROCESSOR_NS9360 | 7 | select PROCESSOR_NS9360 |
8 | select BOARD_A9M9750DEV | 8 | select BOARD_A9M9750DEV |
9 | help | 9 | help |
10 | Say Y here if you are using the Digi Connect Core 9P 9360 | 10 | Say Y here if you are using the Digi ConnectCore 9P 9360 |
11 | on an A9M9750 Development Board. | 11 | on an A9M9750 Development Board. |
12 | 12 | ||
13 | config MACH_CC9P9360JS | ||
14 | bool "ConnectCore 9P 9360 on a JSCC9P9360 Devboard" | ||
15 | select PROCESSOR_NS9360 | ||
16 | select BOARD_JSCC9P9360 | ||
17 | help | ||
18 | Say Y here if you are using the Digi ConnectCore 9P 9360 | ||
19 | on an JSCC9P9360 Development Board. | ||
20 | |||
13 | config PROCESSOR_NS9360 | 21 | config PROCESSOR_NS9360 |
14 | bool | 22 | bool |
15 | 23 | ||
16 | config BOARD_A9M9750DEV | 24 | config BOARD_A9M9750DEV |
17 | bool | 25 | bool |
18 | 26 | ||
27 | config BOARD_JSCC9P9360 | ||
28 | bool | ||
29 | |||
19 | endmenu | 30 | endmenu |
20 | 31 | ||
21 | endif | 32 | endif |
diff --git a/arch/arm/mach-ns9xxx/Makefile b/arch/arm/mach-ns9xxx/Makefile index 91e945f5e16d..53213a69f601 100644 --- a/arch/arm/mach-ns9xxx/Makefile +++ b/arch/arm/mach-ns9xxx/Makefile | |||
@@ -3,3 +3,4 @@ obj-y := irq.o time.o generic.o | |||
3 | obj-$(CONFIG_MACH_CC9P9360DEV) += mach-cc9p9360dev.o | 3 | obj-$(CONFIG_MACH_CC9P9360DEV) += mach-cc9p9360dev.o |
4 | 4 | ||
5 | obj-$(CONFIG_BOARD_A9M9750DEV) += board-a9m9750dev.o | 5 | obj-$(CONFIG_BOARD_A9M9750DEV) += board-a9m9750dev.o |
6 | obj-$(CONFIG_BOARD_JSCC9P9360) += board-jscc9p9360.o | ||
diff --git a/arch/arm/mach-ns9xxx/board-jscc9p9360.c b/arch/arm/mach-ns9xxx/board-jscc9p9360.c new file mode 100644 index 000000000000..4bd3eec04bfe --- /dev/null +++ b/arch/arm/mach-ns9xxx/board-jscc9p9360.c | |||
@@ -0,0 +1,17 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/board-jscc9p9360.c | ||
3 | * | ||
4 | * Copyright (C) 2006,2007 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #include "board-jscc9p9360.h" | ||
12 | |||
13 | void __init board_jscc9p9360_init_machine(void) | ||
14 | { | ||
15 | /* TODO: reserve GPIOs for push buttons, etc pp */ | ||
16 | } | ||
17 | |||
diff --git a/arch/arm/mach-ns9xxx/board-jscc9p9360.h b/arch/arm/mach-ns9xxx/board-jscc9p9360.h new file mode 100644 index 000000000000..1a81a074df45 --- /dev/null +++ b/arch/arm/mach-ns9xxx/board-jscc9p9360.h | |||
@@ -0,0 +1,13 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/board-jscc9p9360.h | ||
3 | * | ||
4 | * Copyright (C) 2006 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #include <linux/init.h> | ||
12 | |||
13 | void __init board_jscc9p9360_init_machine(void); | ||
diff --git a/arch/arm/mach-ns9xxx/mach-cc9p9360js.c b/arch/arm/mach-ns9xxx/mach-cc9p9360js.c new file mode 100644 index 000000000000..d09d5fa5620a --- /dev/null +++ b/arch/arm/mach-ns9xxx/mach-cc9p9360js.c | |||
@@ -0,0 +1,29 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/mach-cc9p9360js.c | ||
3 | * | ||
4 | * Copyright (C) 2006 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #include <asm/mach/arch.h> | ||
12 | #include <asm/mach-types.h> | ||
13 | |||
14 | #include "board-jscc9p9360.h" | ||
15 | #include "generic.h" | ||
16 | |||
17 | static void __init mach_cc9p9360js_init_machine(void) | ||
18 | { | ||
19 | ns9xxx_init_machine(); | ||
20 | board_jscc9p9360_init_machine(); | ||
21 | } | ||
22 | |||
23 | MACHINE_START(CC9P9360DEV, "Digi ConnectCore 9P 9360 on an JSCC9P9360 Devboard") | ||
24 | .map_io = ns9xxx_map_io, | ||
25 | .init_irq = ns9xxx_init_irq, | ||
26 | .init_machine = mach_cc9p9360js_init_machine, | ||
27 | .timer = &ns9xxx_timer, | ||
28 | .boot_params = 0x100, | ||
29 | MACHINE_END | ||
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index 410d3e78dd0f..0733078940fa 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c | |||
@@ -40,7 +40,6 @@ | |||
40 | #include <linux/module.h> | 40 | #include <linux/module.h> |
41 | #include <linux/sched.h> | 41 | #include <linux/sched.h> |
42 | #include <linux/interrupt.h> | 42 | #include <linux/interrupt.h> |
43 | #include <linux/ptrace.h> | ||
44 | 43 | ||
45 | #include <asm/hardware.h> | 44 | #include <asm/hardware.h> |
46 | #include <asm/irq.h> | 45 | #include <asm/irq.h> |
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c index 1b7e4a506c26..85e048b259f5 100644 --- a/arch/arm/mach-omap1/time.c +++ b/arch/arm/mach-omap1/time.c | |||
@@ -39,6 +39,10 @@ | |||
39 | #include <linux/interrupt.h> | 39 | #include <linux/interrupt.h> |
40 | #include <linux/sched.h> | 40 | #include <linux/sched.h> |
41 | #include <linux/spinlock.h> | 41 | #include <linux/spinlock.h> |
42 | #include <linux/clk.h> | ||
43 | #include <linux/err.h> | ||
44 | #include <linux/clocksource.h> | ||
45 | #include <linux/clockchips.h> | ||
42 | 46 | ||
43 | #include <asm/system.h> | 47 | #include <asm/system.h> |
44 | #include <asm/hardware.h> | 48 | #include <asm/hardware.h> |
@@ -48,13 +52,7 @@ | |||
48 | #include <asm/mach/irq.h> | 52 | #include <asm/mach/irq.h> |
49 | #include <asm/mach/time.h> | 53 | #include <asm/mach/time.h> |
50 | 54 | ||
51 | struct sys_timer omap_timer; | ||
52 | 55 | ||
53 | /* | ||
54 | * --------------------------------------------------------------------------- | ||
55 | * MPU timer | ||
56 | * --------------------------------------------------------------------------- | ||
57 | */ | ||
58 | #define OMAP_MPU_TIMER_BASE OMAP_MPU_TIMER1_BASE | 56 | #define OMAP_MPU_TIMER_BASE OMAP_MPU_TIMER1_BASE |
59 | #define OMAP_MPU_TIMER_OFFSET 0x100 | 57 | #define OMAP_MPU_TIMER_OFFSET 0x100 |
60 | 58 | ||
@@ -88,21 +86,6 @@ static inline unsigned long long cycles_2_ns(unsigned long long cyc) | |||
88 | return (cyc * cyc2ns_scale) >> CYC2NS_SCALE_FACTOR; | 86 | return (cyc * cyc2ns_scale) >> CYC2NS_SCALE_FACTOR; |
89 | } | 87 | } |
90 | 88 | ||
91 | /* | ||
92 | * MPU_TICKS_PER_SEC must be an even number, otherwise machinecycles_to_usecs | ||
93 | * will break. On P2, the timer count rate is 6.5 MHz after programming PTV | ||
94 | * with 0. This divides the 13MHz input by 2, and is undocumented. | ||
95 | */ | ||
96 | #if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE) | ||
97 | /* REVISIT: This ifdef construct should be replaced by a query to clock | ||
98 | * framework to see if timer base frequency is 12.0, 13.0 or 19.2 MHz. | ||
99 | */ | ||
100 | #define MPU_TICKS_PER_SEC (13000000 / 2) | ||
101 | #else | ||
102 | #define MPU_TICKS_PER_SEC (12000000 / 2) | ||
103 | #endif | ||
104 | |||
105 | #define MPU_TIMER_TICK_PERIOD ((MPU_TICKS_PER_SEC / HZ) - 1) | ||
106 | 89 | ||
107 | typedef struct { | 90 | typedef struct { |
108 | u32 cntl; /* CNTL_TIMER, R/W */ | 91 | u32 cntl; /* CNTL_TIMER, R/W */ |
@@ -120,98 +103,164 @@ static inline unsigned long omap_mpu_timer_read(int nr) | |||
120 | return timer->read_tim; | 103 | return timer->read_tim; |
121 | } | 104 | } |
122 | 105 | ||
123 | static inline void omap_mpu_timer_start(int nr, unsigned long load_val) | 106 | static inline void omap_mpu_set_autoreset(int nr) |
124 | { | 107 | { |
125 | volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr); | 108 | volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr); |
126 | 109 | ||
127 | timer->cntl = MPU_TIMER_CLOCK_ENABLE; | 110 | timer->cntl = timer->cntl | MPU_TIMER_AR; |
128 | udelay(1); | ||
129 | timer->load_tim = load_val; | ||
130 | udelay(1); | ||
131 | timer->cntl = (MPU_TIMER_CLOCK_ENABLE | MPU_TIMER_AR | MPU_TIMER_ST); | ||
132 | } | 111 | } |
133 | 112 | ||
134 | unsigned long omap_mpu_timer_ticks_to_usecs(unsigned long nr_ticks) | 113 | static inline void omap_mpu_remove_autoreset(int nr) |
135 | { | 114 | { |
136 | unsigned long long nsec; | 115 | volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr); |
137 | 116 | ||
138 | nsec = cycles_2_ns((unsigned long long)nr_ticks); | 117 | timer->cntl = timer->cntl & ~MPU_TIMER_AR; |
139 | return (unsigned long)nsec / 1000; | ||
140 | } | 118 | } |
141 | 119 | ||
142 | /* | 120 | static inline void omap_mpu_timer_start(int nr, unsigned long load_val, |
143 | * Last processed system timer interrupt | 121 | int autoreset) |
144 | */ | 122 | { |
145 | static unsigned long omap_mpu_timer_last = 0; | 123 | volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr); |
124 | unsigned int timerflags = (MPU_TIMER_CLOCK_ENABLE | MPU_TIMER_ST); | ||
125 | |||
126 | if (autoreset) timerflags |= MPU_TIMER_AR; | ||
127 | |||
128 | timer->cntl = MPU_TIMER_CLOCK_ENABLE; | ||
129 | udelay(1); | ||
130 | timer->load_tim = load_val; | ||
131 | udelay(1); | ||
132 | timer->cntl = timerflags; | ||
133 | } | ||
146 | 134 | ||
147 | /* | 135 | /* |
148 | * Returns elapsed usecs since last system timer interrupt | 136 | * --------------------------------------------------------------------------- |
137 | * MPU timer 1 ... count down to zero, interrupt, reload | ||
138 | * --------------------------------------------------------------------------- | ||
149 | */ | 139 | */ |
150 | static unsigned long omap_mpu_timer_gettimeoffset(void) | 140 | static int omap_mpu_set_next_event(unsigned long cycles, |
141 | struct clock_event_device *evt) | ||
151 | { | 142 | { |
152 | unsigned long now = 0 - omap_mpu_timer_read(0); | 143 | omap_mpu_timer_start(0, cycles, 0); |
153 | unsigned long elapsed = now - omap_mpu_timer_last; | 144 | return 0; |
145 | } | ||
154 | 146 | ||
155 | return omap_mpu_timer_ticks_to_usecs(elapsed); | 147 | static void omap_mpu_set_mode(enum clock_event_mode mode, |
148 | struct clock_event_device *evt) | ||
149 | { | ||
150 | switch (mode) { | ||
151 | case CLOCK_EVT_MODE_PERIODIC: | ||
152 | omap_mpu_set_autoreset(0); | ||
153 | break; | ||
154 | case CLOCK_EVT_MODE_ONESHOT: | ||
155 | omap_mpu_remove_autoreset(0); | ||
156 | break; | ||
157 | case CLOCK_EVT_MODE_UNUSED: | ||
158 | case CLOCK_EVT_MODE_SHUTDOWN: | ||
159 | break; | ||
160 | } | ||
156 | } | 161 | } |
157 | 162 | ||
158 | /* | 163 | static struct clock_event_device clockevent_mpu_timer1 = { |
159 | * Elapsed time between interrupts is calculated using timer0. | 164 | .name = "mpu_timer1", |
160 | * Latency during the interrupt is calculated using timer1. | 165 | .features = CLOCK_EVT_FEAT_PERIODIC, CLOCK_EVT_FEAT_ONESHOT, |
161 | * Both timer0 and timer1 are counting at 6MHz (P2 6.5MHz). | 166 | .shift = 32, |
162 | */ | 167 | .set_next_event = omap_mpu_set_next_event, |
163 | static irqreturn_t omap_mpu_timer_interrupt(int irq, void *dev_id) | 168 | .set_mode = omap_mpu_set_mode, |
169 | }; | ||
170 | |||
171 | static irqreturn_t omap_mpu_timer1_interrupt(int irq, void *dev_id) | ||
164 | { | 172 | { |
165 | unsigned long now, latency; | 173 | struct clock_event_device *evt = &clockevent_mpu_timer1; |
166 | 174 | ||
167 | write_seqlock(&xtime_lock); | 175 | evt->event_handler(evt); |
168 | now = 0 - omap_mpu_timer_read(0); | ||
169 | latency = MPU_TICKS_PER_SEC / HZ - omap_mpu_timer_read(1); | ||
170 | omap_mpu_timer_last = now - latency; | ||
171 | timer_tick(); | ||
172 | write_sequnlock(&xtime_lock); | ||
173 | 176 | ||
174 | return IRQ_HANDLED; | 177 | return IRQ_HANDLED; |
175 | } | 178 | } |
176 | 179 | ||
177 | static struct irqaction omap_mpu_timer_irq = { | 180 | static struct irqaction omap_mpu_timer1_irq = { |
178 | .name = "mpu timer", | 181 | .name = "mpu_timer1", |
179 | .flags = IRQF_DISABLED | IRQF_TIMER, | 182 | .flags = IRQF_DISABLED | IRQF_TIMER, |
180 | .handler = omap_mpu_timer_interrupt, | 183 | .handler = omap_mpu_timer1_interrupt, |
181 | }; | 184 | }; |
182 | 185 | ||
183 | static unsigned long omap_mpu_timer1_overflows; | 186 | static __init void omap_init_mpu_timer(unsigned long rate) |
184 | static irqreturn_t omap_mpu_timer1_interrupt(int irq, void *dev_id) | 187 | { |
188 | set_cyc2ns_scale(rate / 1000); | ||
189 | |||
190 | setup_irq(INT_TIMER1, &omap_mpu_timer1_irq); | ||
191 | omap_mpu_timer_start(0, (rate / HZ) - 1, 1); | ||
192 | |||
193 | clockevent_mpu_timer1.mult = div_sc(rate, NSEC_PER_SEC, | ||
194 | clockevent_mpu_timer1.shift); | ||
195 | clockevent_mpu_timer1.max_delta_ns = | ||
196 | clockevent_delta2ns(-1, &clockevent_mpu_timer1); | ||
197 | clockevent_mpu_timer1.min_delta_ns = | ||
198 | clockevent_delta2ns(1, &clockevent_mpu_timer1); | ||
199 | |||
200 | clockevent_mpu_timer1.cpumask = cpumask_of_cpu(0); | ||
201 | clockevents_register_device(&clockevent_mpu_timer1); | ||
202 | } | ||
203 | |||
204 | |||
205 | /* | ||
206 | * --------------------------------------------------------------------------- | ||
207 | * MPU timer 2 ... free running 32-bit clock source and scheduler clock | ||
208 | * --------------------------------------------------------------------------- | ||
209 | */ | ||
210 | |||
211 | static unsigned long omap_mpu_timer2_overflows; | ||
212 | |||
213 | static irqreturn_t omap_mpu_timer2_interrupt(int irq, void *dev_id) | ||
185 | { | 214 | { |
186 | omap_mpu_timer1_overflows++; | 215 | omap_mpu_timer2_overflows++; |
187 | return IRQ_HANDLED; | 216 | return IRQ_HANDLED; |
188 | } | 217 | } |
189 | 218 | ||
190 | static struct irqaction omap_mpu_timer1_irq = { | 219 | static struct irqaction omap_mpu_timer2_irq = { |
191 | .name = "mpu timer1 overflow", | 220 | .name = "mpu_timer2", |
192 | .flags = IRQF_DISABLED, | 221 | .flags = IRQF_DISABLED, |
193 | .handler = omap_mpu_timer1_interrupt, | 222 | .handler = omap_mpu_timer2_interrupt, |
194 | }; | 223 | }; |
195 | 224 | ||
196 | static __init void omap_init_mpu_timer(void) | 225 | static cycle_t mpu_read(void) |
197 | { | 226 | { |
198 | set_cyc2ns_scale(MPU_TICKS_PER_SEC / 1000); | 227 | return ~omap_mpu_timer_read(1); |
199 | omap_timer.offset = omap_mpu_timer_gettimeoffset; | 228 | } |
200 | setup_irq(INT_TIMER1, &omap_mpu_timer1_irq); | 229 | |
201 | setup_irq(INT_TIMER2, &omap_mpu_timer_irq); | 230 | static struct clocksource clocksource_mpu = { |
202 | omap_mpu_timer_start(0, 0xffffffff); | 231 | .name = "mpu_timer2", |
203 | omap_mpu_timer_start(1, MPU_TIMER_TICK_PERIOD); | 232 | .rating = 300, |
233 | .read = mpu_read, | ||
234 | .mask = CLOCKSOURCE_MASK(32), | ||
235 | .shift = 24, | ||
236 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
237 | }; | ||
238 | |||
239 | static void __init omap_init_clocksource(unsigned long rate) | ||
240 | { | ||
241 | static char err[] __initdata = KERN_ERR | ||
242 | "%s: can't register clocksource!\n"; | ||
243 | |||
244 | clocksource_mpu.mult | ||
245 | = clocksource_khz2mult(rate/1000, clocksource_mpu.shift); | ||
246 | |||
247 | setup_irq(INT_TIMER2, &omap_mpu_timer2_irq); | ||
248 | omap_mpu_timer_start(1, ~0, 1); | ||
249 | |||
250 | if (clocksource_register(&clocksource_mpu)) | ||
251 | printk(err, clocksource_mpu.name); | ||
204 | } | 252 | } |
205 | 253 | ||
254 | |||
206 | /* | 255 | /* |
207 | * Scheduler clock - returns current time in nanosec units. | 256 | * Scheduler clock - returns current time in nanosec units. |
208 | */ | 257 | */ |
209 | unsigned long long sched_clock(void) | 258 | unsigned long long sched_clock(void) |
210 | { | 259 | { |
211 | unsigned long ticks = 0 - omap_mpu_timer_read(0); | 260 | unsigned long ticks = 0 - omap_mpu_timer_read(1); |
212 | unsigned long long ticks64; | 261 | unsigned long long ticks64; |
213 | 262 | ||
214 | ticks64 = omap_mpu_timer1_overflows; | 263 | ticks64 = omap_mpu_timer2_overflows; |
215 | ticks64 <<= 32; | 264 | ticks64 <<= 32; |
216 | ticks64 |= ticks; | 265 | ticks64 |= ticks; |
217 | 266 | ||
@@ -225,10 +274,21 @@ unsigned long long sched_clock(void) | |||
225 | */ | 274 | */ |
226 | static void __init omap_timer_init(void) | 275 | static void __init omap_timer_init(void) |
227 | { | 276 | { |
228 | omap_init_mpu_timer(); | 277 | struct clk *ck_ref = clk_get(NULL, "ck_ref"); |
278 | unsigned long rate; | ||
279 | |||
280 | BUG_ON(IS_ERR(ck_ref)); | ||
281 | |||
282 | rate = clk_get_rate(ck_ref); | ||
283 | clk_put(ck_ref); | ||
284 | |||
285 | /* PTV = 0 */ | ||
286 | rate /= 2; | ||
287 | |||
288 | omap_init_mpu_timer(rate); | ||
289 | omap_init_clocksource(rate); | ||
229 | } | 290 | } |
230 | 291 | ||
231 | struct sys_timer omap_timer = { | 292 | struct sys_timer omap_timer = { |
232 | .init = omap_timer_init, | 293 | .init = omap_timer_init, |
233 | .offset = NULL, /* Initialized later */ | ||
234 | }; | 294 | }; |
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index b8cb79f899d5..64b08b744f9f 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c | |||
@@ -164,9 +164,9 @@ void pxa_set_cken(int clock, int enable) | |||
164 | local_irq_save(flags); | 164 | local_irq_save(flags); |
165 | 165 | ||
166 | if (enable) | 166 | if (enable) |
167 | CKEN |= clock; | 167 | CKEN |= (1 << clock); |
168 | else | 168 | else |
169 | CKEN &= ~clock; | 169 | CKEN &= ~(1 << clock); |
170 | 170 | ||
171 | local_irq_restore(flags); | 171 | local_irq_restore(flags); |
172 | } | 172 | } |
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index f815678a9d63..4619d5fe606c 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c | |||
@@ -15,7 +15,6 @@ | |||
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/module.h> | 16 | #include <linux/module.h> |
17 | #include <linux/interrupt.h> | 17 | #include <linux/interrupt.h> |
18 | #include <linux/ptrace.h> | ||
19 | 18 | ||
20 | #include <asm/hardware.h> | 19 | #include <asm/hardware.h> |
21 | #include <asm/irq.h> | 20 | #include <asm/irq.h> |
@@ -39,11 +38,33 @@ static void pxa_unmask_low_irq(unsigned int irq) | |||
39 | ICMR |= (1 << (irq + PXA_IRQ_SKIP)); | 38 | ICMR |= (1 << (irq + PXA_IRQ_SKIP)); |
40 | } | 39 | } |
41 | 40 | ||
41 | static int pxa_set_wake(unsigned int irq, unsigned int on) | ||
42 | { | ||
43 | u32 mask; | ||
44 | |||
45 | switch (irq) { | ||
46 | case IRQ_RTCAlrm: | ||
47 | mask = PWER_RTC; | ||
48 | break; | ||
49 | #ifdef CONFIG_PXA27x | ||
50 | /* REVISIT can handle USBH1, USBH2, USB, MSL, USIM, ... */ | ||
51 | #endif | ||
52 | default: | ||
53 | return -EINVAL; | ||
54 | } | ||
55 | if (on) | ||
56 | PWER |= mask; | ||
57 | else | ||
58 | PWER &= ~mask; | ||
59 | return 0; | ||
60 | } | ||
61 | |||
42 | static struct irq_chip pxa_internal_chip_low = { | 62 | static struct irq_chip pxa_internal_chip_low = { |
43 | .name = "SC", | 63 | .name = "SC", |
44 | .ack = pxa_mask_low_irq, | 64 | .ack = pxa_mask_low_irq, |
45 | .mask = pxa_mask_low_irq, | 65 | .mask = pxa_mask_low_irq, |
46 | .unmask = pxa_unmask_low_irq, | 66 | .unmask = pxa_unmask_low_irq, |
67 | .set_wake = pxa_set_wake, | ||
47 | }; | 68 | }; |
48 | 69 | ||
49 | #if PXA_INTERNAL_IRQS > 32 | 70 | #if PXA_INTERNAL_IRQS > 32 |
@@ -71,6 +92,26 @@ static struct irq_chip pxa_internal_chip_high = { | |||
71 | 92 | ||
72 | #endif | 93 | #endif |
73 | 94 | ||
95 | /* Note that if an input/irq line ever gets changed to an output during | ||
96 | * suspend, the relevant PWER, PRER, and PFER bits should be cleared. | ||
97 | */ | ||
98 | #ifdef CONFIG_PXA27x | ||
99 | |||
100 | /* PXA27x: Various gpios can issue wakeup events. This logic only | ||
101 | * handles the simple cases, not the WEMUX2 and WEMUX3 options | ||
102 | */ | ||
103 | #define PXA27x_GPIO_NOWAKE_MASK \ | ||
104 | ((1 << 8) | (1 << 7) | (1 << 6) | (1 << 5) | (1 << 2)) | ||
105 | #define WAKEMASK(gpio) \ | ||
106 | (((gpio) <= 15) \ | ||
107 | ? ((1 << (gpio)) & ~PXA27x_GPIO_NOWAKE_MASK) \ | ||
108 | : ((gpio == 35) ? (1 << 24) : 0)) | ||
109 | #else | ||
110 | |||
111 | /* pxa 210, 250, 255, 26x: gpios 0..15 can issue wakeups */ | ||
112 | #define WAKEMASK(gpio) (((gpio) <= 15) ? (1 << (gpio)) : 0) | ||
113 | #endif | ||
114 | |||
74 | /* | 115 | /* |
75 | * PXA GPIO edge detection for IRQs: | 116 | * PXA GPIO edge detection for IRQs: |
76 | * IRQs are generated on Falling-Edge, Rising-Edge, or both. | 117 | * IRQs are generated on Falling-Edge, Rising-Edge, or both. |
@@ -84,9 +125,11 @@ static long GPIO_IRQ_mask[4]; | |||
84 | static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) | 125 | static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) |
85 | { | 126 | { |
86 | int gpio, idx; | 127 | int gpio, idx; |
128 | u32 mask; | ||
87 | 129 | ||
88 | gpio = IRQ_TO_GPIO(irq); | 130 | gpio = IRQ_TO_GPIO(irq); |
89 | idx = gpio >> 5; | 131 | idx = gpio >> 5; |
132 | mask = WAKEMASK(gpio); | ||
90 | 133 | ||
91 | if (type == IRQT_PROBE) { | 134 | if (type == IRQT_PROBE) { |
92 | /* Don't mess with enabled GPIOs using preconfigured edges or | 135 | /* Don't mess with enabled GPIOs using preconfigured edges or |
@@ -106,14 +149,20 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) | |||
106 | if (type & __IRQT_RISEDGE) { | 149 | if (type & __IRQT_RISEDGE) { |
107 | /* printk("rising "); */ | 150 | /* printk("rising "); */ |
108 | __set_bit (gpio, GPIO_IRQ_rising_edge); | 151 | __set_bit (gpio, GPIO_IRQ_rising_edge); |
109 | } else | 152 | PRER |= mask; |
153 | } else { | ||
110 | __clear_bit (gpio, GPIO_IRQ_rising_edge); | 154 | __clear_bit (gpio, GPIO_IRQ_rising_edge); |
155 | PRER &= ~mask; | ||
156 | } | ||
111 | 157 | ||
112 | if (type & __IRQT_FALEDGE) { | 158 | if (type & __IRQT_FALEDGE) { |
113 | /* printk("falling "); */ | 159 | /* printk("falling "); */ |
114 | __set_bit (gpio, GPIO_IRQ_falling_edge); | 160 | __set_bit (gpio, GPIO_IRQ_falling_edge); |
115 | } else | 161 | PFER |= mask; |
162 | } else { | ||
116 | __clear_bit (gpio, GPIO_IRQ_falling_edge); | 163 | __clear_bit (gpio, GPIO_IRQ_falling_edge); |
164 | PFER &= ~mask; | ||
165 | } | ||
117 | 166 | ||
118 | /* printk("edges\n"); */ | 167 | /* printk("edges\n"); */ |
119 | 168 | ||
@@ -131,12 +180,29 @@ static void pxa_ack_low_gpio(unsigned int irq) | |||
131 | GEDR0 = (1 << (irq - IRQ_GPIO0)); | 180 | GEDR0 = (1 << (irq - IRQ_GPIO0)); |
132 | } | 181 | } |
133 | 182 | ||
183 | static int pxa_set_gpio_wake(unsigned int irq, unsigned int on) | ||
184 | { | ||
185 | int gpio = IRQ_TO_GPIO(irq); | ||
186 | u32 mask = WAKEMASK(gpio); | ||
187 | |||
188 | if (!mask) | ||
189 | return -EINVAL; | ||
190 | |||
191 | if (on) | ||
192 | PWER |= mask; | ||
193 | else | ||
194 | PWER &= ~mask; | ||
195 | return 0; | ||
196 | } | ||
197 | |||
198 | |||
134 | static struct irq_chip pxa_low_gpio_chip = { | 199 | static struct irq_chip pxa_low_gpio_chip = { |
135 | .name = "GPIO-l", | 200 | .name = "GPIO-l", |
136 | .ack = pxa_ack_low_gpio, | 201 | .ack = pxa_ack_low_gpio, |
137 | .mask = pxa_mask_low_irq, | 202 | .mask = pxa_mask_low_irq, |
138 | .unmask = pxa_unmask_low_irq, | 203 | .unmask = pxa_unmask_low_irq, |
139 | .set_type = pxa_gpio_irq_type, | 204 | .set_type = pxa_gpio_irq_type, |
205 | .set_wake = pxa_set_gpio_wake, | ||
140 | }; | 206 | }; |
141 | 207 | ||
142 | /* | 208 | /* |
@@ -245,6 +311,7 @@ static struct irq_chip pxa_muxed_gpio_chip = { | |||
245 | .mask = pxa_mask_muxed_gpio, | 311 | .mask = pxa_mask_muxed_gpio, |
246 | .unmask = pxa_unmask_muxed_gpio, | 312 | .unmask = pxa_unmask_muxed_gpio, |
247 | .set_type = pxa_gpio_irq_type, | 313 | .set_type = pxa_gpio_irq_type, |
314 | .set_wake = pxa_set_gpio_wake, | ||
248 | }; | 315 | }; |
249 | 316 | ||
250 | 317 | ||
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index 8e27a64fa9f4..e3097664ffe1 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c | |||
@@ -234,7 +234,7 @@ static void lpd270_backlight_power(int on) | |||
234 | { | 234 | { |
235 | if (on) { | 235 | if (on) { |
236 | pxa_gpio_mode(GPIO16_PWM0_MD); | 236 | pxa_gpio_mode(GPIO16_PWM0_MD); |
237 | pxa_set_cken(CKEN0_PWM0, 1); | 237 | pxa_set_cken(CKEN_PWM0, 1); |
238 | PWM_CTRL0 = 0; | 238 | PWM_CTRL0 = 0; |
239 | PWM_PWDUTY0 = 0x3ff; | 239 | PWM_PWDUTY0 = 0x3ff; |
240 | PWM_PERVAL0 = 0x3ff; | 240 | PWM_PERVAL0 = 0x3ff; |
@@ -242,7 +242,7 @@ static void lpd270_backlight_power(int on) | |||
242 | PWM_CTRL0 = 0; | 242 | PWM_CTRL0 = 0; |
243 | PWM_PWDUTY0 = 0x0; | 243 | PWM_PWDUTY0 = 0x0; |
244 | PWM_PERVAL0 = 0x3FF; | 244 | PWM_PERVAL0 = 0x3FF; |
245 | pxa_set_cken(CKEN0_PWM0, 0); | 245 | pxa_set_cken(CKEN_PWM0, 0); |
246 | } | 246 | } |
247 | } | 247 | } |
248 | 248 | ||
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 055de7f4f00a..6377b2e29ff0 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c | |||
@@ -220,7 +220,7 @@ static struct resource pxa_ssp_resources[] = { | |||
220 | 220 | ||
221 | static struct pxa2xx_spi_master pxa_ssp_master_info = { | 221 | static struct pxa2xx_spi_master pxa_ssp_master_info = { |
222 | .ssp_type = PXA25x_SSP, | 222 | .ssp_type = PXA25x_SSP, |
223 | .clock_enable = CKEN3_SSP, | 223 | .clock_enable = CKEN_SSP, |
224 | .num_chipselect = 0, | 224 | .num_chipselect = 0, |
225 | }; | 225 | }; |
226 | 226 | ||
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index 56d94d88d5ca..ed99a81b98f3 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c | |||
@@ -266,7 +266,7 @@ static void mainstone_backlight_power(int on) | |||
266 | { | 266 | { |
267 | if (on) { | 267 | if (on) { |
268 | pxa_gpio_mode(GPIO16_PWM0_MD); | 268 | pxa_gpio_mode(GPIO16_PWM0_MD); |
269 | pxa_set_cken(CKEN0_PWM0, 1); | 269 | pxa_set_cken(CKEN_PWM0, 1); |
270 | PWM_CTRL0 = 0; | 270 | PWM_CTRL0 = 0; |
271 | PWM_PWDUTY0 = 0x3ff; | 271 | PWM_PWDUTY0 = 0x3ff; |
272 | PWM_PERVAL0 = 0x3ff; | 272 | PWM_PERVAL0 = 0x3ff; |
@@ -274,7 +274,7 @@ static void mainstone_backlight_power(int on) | |||
274 | PWM_CTRL0 = 0; | 274 | PWM_CTRL0 = 0; |
275 | PWM_PWDUTY0 = 0x0; | 275 | PWM_PWDUTY0 = 0x0; |
276 | PWM_PERVAL0 = 0x3FF; | 276 | PWM_PERVAL0 = 0x3FF; |
277 | pxa_set_cken(CKEN0_PWM0, 0); | 277 | pxa_set_cken(CKEN_PWM0, 0); |
278 | } | 278 | } |
279 | } | 279 | } |
280 | 280 | ||
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 74eeada1e2fc..c64bab49efc4 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c | |||
@@ -140,9 +140,9 @@ void pxa_cpu_pm_enter(suspend_state_t state) | |||
140 | extern void pxa_cpu_resume(void); | 140 | extern void pxa_cpu_resume(void); |
141 | 141 | ||
142 | if (state == PM_SUSPEND_STANDBY) | 142 | if (state == PM_SUSPEND_STANDBY) |
143 | CKEN = CKEN22_MEMC | CKEN9_OSTIMER | CKEN16_LCD |CKEN0_PWM0; | 143 | CKEN = CKEN_MEMC | CKEN_OSTIMER | CKEN_LCD | CKEN_PWM0; |
144 | else | 144 | else |
145 | CKEN = CKEN22_MEMC | CKEN9_OSTIMER; | 145 | CKEN = CKEN_MEMC | CKEN_OSTIMER; |
146 | 146 | ||
147 | /* ensure voltage-change sequencer not initiated, which hangs */ | 147 | /* ensure voltage-change sequencer not initiated, which hangs */ |
148 | PCFR &= ~PCFR_FVC; | 148 | PCFR &= ~PCFR_FVC; |
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c index 6cc202755fb4..71766ac0328b 100644 --- a/arch/arm/mach-pxa/ssp.c +++ b/arch/arm/mach-pxa/ssp.c | |||
@@ -52,13 +52,13 @@ struct ssp_info_ { | |||
52 | */ | 52 | */ |
53 | static const struct ssp_info_ ssp_info[PXA_SSP_PORTS] = { | 53 | static const struct ssp_info_ ssp_info[PXA_SSP_PORTS] = { |
54 | #if defined (CONFIG_PXA27x) | 54 | #if defined (CONFIG_PXA27x) |
55 | {IRQ_SSP, CKEN23_SSP1}, | 55 | {IRQ_SSP, CKEN_SSP1}, |
56 | {IRQ_SSP2, CKEN3_SSP2}, | 56 | {IRQ_SSP2, CKEN_SSP2}, |
57 | {IRQ_SSP3, CKEN4_SSP3}, | 57 | {IRQ_SSP3, CKEN_SSP3}, |
58 | #else | 58 | #else |
59 | {IRQ_SSP, CKEN3_SSP}, | 59 | {IRQ_SSP, CKEN_SSP}, |
60 | {IRQ_NSSP, CKEN9_NSSP}, | 60 | {IRQ_NSSP, CKEN_NSSP}, |
61 | {IRQ_ASSP, CKEN10_ASSP}, | 61 | {IRQ_ASSP, CKEN_ASSP}, |
62 | #endif | 62 | #endif |
63 | }; | 63 | }; |
64 | 64 | ||
diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c index 208a2b5dba1b..570cf937e73b 100644 --- a/arch/arm/mach-rpc/riscpc.c +++ b/arch/arm/mach-rpc/riscpc.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/sched.h> | 17 | #include <linux/sched.h> |
18 | #include <linux/device.h> | 18 | #include <linux/device.h> |
19 | #include <linux/serial_8250.h> | 19 | #include <linux/serial_8250.h> |
20 | #include <linux/pata_platform.h> | ||
20 | 21 | ||
21 | #include <asm/elf.h> | 22 | #include <asm/elf.h> |
22 | #include <asm/io.h> | 23 | #include <asm/io.h> |
@@ -159,11 +160,45 @@ static struct platform_device serial_device = { | |||
159 | }, | 160 | }, |
160 | }; | 161 | }; |
161 | 162 | ||
163 | static struct pata_platform_info pata_platform_data = { | ||
164 | .ioport_shift = 2, | ||
165 | }; | ||
166 | |||
167 | static struct resource pata_resources[] = { | ||
168 | [0] = { | ||
169 | .start = 0x030107c0, | ||
170 | .end = 0x030107df, | ||
171 | .flags = IORESOURCE_MEM, | ||
172 | }, | ||
173 | [1] = { | ||
174 | .start = 0x03010fd8, | ||
175 | .end = 0x03010fdb, | ||
176 | .flags = IORESOURCE_MEM, | ||
177 | }, | ||
178 | [2] = { | ||
179 | .start = IRQ_HARDDISK, | ||
180 | .end = IRQ_HARDDISK, | ||
181 | .flags = IORESOURCE_IRQ, | ||
182 | }, | ||
183 | }; | ||
184 | |||
185 | static struct platform_device pata_device = { | ||
186 | .name = "pata_platform", | ||
187 | .id = -1, | ||
188 | .num_resources = ARRAY_SIZE(pata_resources), | ||
189 | .resource = pata_resources, | ||
190 | .dev = { | ||
191 | .platform_data = &pata_platform_data, | ||
192 | .coherent_dma_mask = ~0, /* grumble */ | ||
193 | }, | ||
194 | }; | ||
195 | |||
162 | static struct platform_device *devs[] __initdata = { | 196 | static struct platform_device *devs[] __initdata = { |
163 | &iomd_device, | 197 | &iomd_device, |
164 | &kbd_device, | 198 | &kbd_device, |
165 | &serial_device, | 199 | &serial_device, |
166 | &acornfb_device, | 200 | &acornfb_device, |
201 | &pata_device, | ||
167 | }; | 202 | }; |
168 | 203 | ||
169 | static int __init rpc_init(void) | 204 | static int __init rpc_init(void) |
diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c index daeba427d781..76a7cb15f3be 100644 --- a/arch/arm/mach-s3c2410/bast-irq.c +++ b/arch/arm/mach-s3c2410/bast-irq.c | |||
@@ -24,7 +24,6 @@ | |||
24 | #include <linux/init.h> | 24 | #include <linux/init.h> |
25 | #include <linux/module.h> | 25 | #include <linux/module.h> |
26 | #include <linux/ioport.h> | 26 | #include <linux/ioport.h> |
27 | #include <linux/ptrace.h> | ||
28 | #include <linux/sysdev.h> | 27 | #include <linux/sysdev.h> |
29 | 28 | ||
30 | #include <asm/mach-types.h> | 29 | #include <asm/mach-types.h> |
diff --git a/arch/arm/mach-s3c2410/irq.c b/arch/arm/mach-s3c2410/irq.c index 53cbdaa43ac6..f5c5c53e1cc1 100644 --- a/arch/arm/mach-s3c2410/irq.c +++ b/arch/arm/mach-s3c2410/irq.c | |||
@@ -23,7 +23,6 @@ | |||
23 | #include <linux/module.h> | 23 | #include <linux/module.h> |
24 | #include <linux/interrupt.h> | 24 | #include <linux/interrupt.h> |
25 | #include <linux/ioport.h> | 25 | #include <linux/ioport.h> |
26 | #include <linux/ptrace.h> | ||
27 | #include <linux/sysdev.h> | 26 | #include <linux/sysdev.h> |
28 | 27 | ||
29 | #include <asm/plat-s3c24xx/cpu.h> | 28 | #include <asm/plat-s3c24xx/cpu.h> |
diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c index 72f2cc4fcd03..bc308ceb91c3 100644 --- a/arch/arm/mach-s3c2410/mach-amlm5900.c +++ b/arch/arm/mach-s3c2410/mach-amlm5900.c | |||
@@ -160,17 +160,11 @@ static struct platform_device *amlm5900_devices[] __initdata = { | |||
160 | #endif | 160 | #endif |
161 | }; | 161 | }; |
162 | 162 | ||
163 | static struct s3c24xx_board amlm5900_board __initdata = { | ||
164 | .devices = amlm5900_devices, | ||
165 | .devices_count = ARRAY_SIZE(amlm5900_devices) | ||
166 | }; | ||
167 | |||
168 | void __init amlm5900_map_io(void) | 163 | void __init amlm5900_map_io(void) |
169 | { | 164 | { |
170 | s3c24xx_init_io(amlm5900_iodesc, ARRAY_SIZE(amlm5900_iodesc)); | 165 | s3c24xx_init_io(amlm5900_iodesc, ARRAY_SIZE(amlm5900_iodesc)); |
171 | s3c24xx_init_clocks(0); | 166 | s3c24xx_init_clocks(0); |
172 | s3c24xx_init_uarts(amlm5900_uartcfgs, ARRAY_SIZE(amlm5900_uartcfgs)); | 167 | s3c24xx_init_uarts(amlm5900_uartcfgs, ARRAY_SIZE(amlm5900_uartcfgs)); |
173 | s3c24xx_set_board(&amlm5900_board); | ||
174 | } | 168 | } |
175 | 169 | ||
176 | #ifdef CONFIG_FB_S3C2410 | 170 | #ifdef CONFIG_FB_S3C2410 |
@@ -247,6 +241,7 @@ static void __init amlm5900_init(void) | |||
247 | #ifdef CONFIG_FB_S3C2410 | 241 | #ifdef CONFIG_FB_S3C2410 |
248 | s3c24xx_fb_set_platdata(&amlm5900_lcd_info); | 242 | s3c24xx_fb_set_platdata(&amlm5900_lcd_info); |
249 | #endif | 243 | #endif |
244 | platform_add_devices(amlm5900_devices, ARRAY_SIZE(amlm5900_devices)); | ||
250 | } | 245 | } |
251 | 246 | ||
252 | MACHINE_START(AML_M5900, "AML_M5900") | 247 | MACHINE_START(AML_M5900, "AML_M5900") |
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index 7b81296427eb..f01de807b72f 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c | |||
@@ -464,13 +464,6 @@ static struct clk *bast_clocks[] = { | |||
464 | &s3c24xx_uclk, | 464 | &s3c24xx_uclk, |
465 | }; | 465 | }; |
466 | 466 | ||
467 | static struct s3c24xx_board bast_board __initdata = { | ||
468 | .devices = bast_devices, | ||
469 | .devices_count = ARRAY_SIZE(bast_devices), | ||
470 | .clocks = bast_clocks, | ||
471 | .clocks_count = ARRAY_SIZE(bast_clocks), | ||
472 | }; | ||
473 | |||
474 | static void __init bast_map_io(void) | 467 | static void __init bast_map_io(void) |
475 | { | 468 | { |
476 | /* initialise the clocks */ | 469 | /* initialise the clocks */ |
@@ -486,19 +479,22 @@ static void __init bast_map_io(void) | |||
486 | 479 | ||
487 | s3c24xx_uclk.parent = &s3c24xx_clkout1; | 480 | s3c24xx_uclk.parent = &s3c24xx_clkout1; |
488 | 481 | ||
482 | s3c24xx_register_clocks(bast_clocks, ARRAY_SIZE(bast_clocks)); | ||
483 | |||
489 | s3c_device_nand.dev.platform_data = &bast_nand_info; | 484 | s3c_device_nand.dev.platform_data = &bast_nand_info; |
490 | s3c_device_i2c.dev.platform_data = &bast_i2c_info; | 485 | s3c_device_i2c.dev.platform_data = &bast_i2c_info; |
491 | 486 | ||
492 | s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); | 487 | s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); |
493 | s3c24xx_init_clocks(0); | 488 | s3c24xx_init_clocks(0); |
494 | s3c24xx_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs)); | 489 | s3c24xx_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs)); |
495 | s3c24xx_set_board(&bast_board); | 490 | |
496 | usb_simtec_init(); | 491 | usb_simtec_init(); |
497 | } | 492 | } |
498 | 493 | ||
499 | static void __init bast_init(void) | 494 | static void __init bast_init(void) |
500 | { | 495 | { |
501 | s3c24xx_fb_set_platdata(&bast_lcd_info); | 496 | s3c24xx_fb_set_platdata(&bast_lcd_info); |
497 | platform_add_devices(bast_devices, ARRAY_SIZE(bast_devices)); | ||
502 | } | 498 | } |
503 | 499 | ||
504 | MACHINE_START(BAST, "Simtec-BAST") | 500 | MACHINE_START(BAST, "Simtec-BAST") |
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index d052ab2d9377..5d5f00e9c462 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c | |||
@@ -129,7 +129,6 @@ static struct s3c2410_udc_mach_info h1940_udc_cfg __initdata = { | |||
129 | }; | 129 | }; |
130 | 130 | ||
131 | 131 | ||
132 | |||
133 | /** | 132 | /** |
134 | * Set lcd on or off | 133 | * Set lcd on or off |
135 | **/ | 134 | **/ |
@@ -188,17 +187,11 @@ static struct platform_device *h1940_devices[] __initdata = { | |||
188 | &s3c_device_leds, | 187 | &s3c_device_leds, |
189 | }; | 188 | }; |
190 | 189 | ||
191 | static struct s3c24xx_board h1940_board __initdata = { | ||
192 | .devices = h1940_devices, | ||
193 | .devices_count = ARRAY_SIZE(h1940_devices) | ||
194 | }; | ||
195 | |||
196 | static void __init h1940_map_io(void) | 190 | static void __init h1940_map_io(void) |
197 | { | 191 | { |
198 | s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc)); | 192 | s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc)); |
199 | s3c24xx_init_clocks(0); | 193 | s3c24xx_init_clocks(0); |
200 | s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs)); | 194 | s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs)); |
201 | s3c24xx_set_board(&h1940_board); | ||
202 | 195 | ||
203 | /* setup PM */ | 196 | /* setup PM */ |
204 | 197 | ||
@@ -232,6 +225,8 @@ static void __init h1940_init(void) | |||
232 | | (0x02 << S3C2410_PLLCON_PDIVSHIFT) | 225 | | (0x02 << S3C2410_PLLCON_PDIVSHIFT) |
233 | | (0x03 << S3C2410_PLLCON_SDIVSHIFT); | 226 | | (0x03 << S3C2410_PLLCON_SDIVSHIFT); |
234 | writel(tmp, S3C2410_UPLLCON); | 227 | writel(tmp, S3C2410_UPLLCON); |
228 | |||
229 | platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices)); | ||
235 | } | 230 | } |
236 | 231 | ||
237 | MACHINE_START(H1940, "IPAQ-H1940") | 232 | MACHINE_START(H1940, "IPAQ-H1940") |
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c index 261aa4cc0770..412e50c3d28a 100644 --- a/arch/arm/mach-s3c2410/mach-n30.c +++ b/arch/arm/mach-s3c2410/mach-n30.c | |||
@@ -90,17 +90,11 @@ static struct s3c2410_platform_i2c n30_i2ccfg = { | |||
90 | .max_freq = 10*1000, | 90 | .max_freq = 10*1000, |
91 | }; | 91 | }; |
92 | 92 | ||
93 | static struct s3c24xx_board n30_board __initdata = { | ||
94 | .devices = n30_devices, | ||
95 | .devices_count = ARRAY_SIZE(n30_devices) | ||
96 | }; | ||
97 | |||
98 | static void __init n30_map_io(void) | 93 | static void __init n30_map_io(void) |
99 | { | 94 | { |
100 | s3c24xx_init_io(n30_iodesc, ARRAY_SIZE(n30_iodesc)); | 95 | s3c24xx_init_io(n30_iodesc, ARRAY_SIZE(n30_iodesc)); |
101 | s3c24xx_init_clocks(0); | 96 | s3c24xx_init_clocks(0); |
102 | s3c24xx_init_uarts(n30_uartcfgs, ARRAY_SIZE(n30_uartcfgs)); | 97 | s3c24xx_init_uarts(n30_uartcfgs, ARRAY_SIZE(n30_uartcfgs)); |
103 | s3c24xx_set_board(&n30_board); | ||
104 | } | 98 | } |
105 | 99 | ||
106 | static void __init n30_init_irq(void) | 100 | static void __init n30_init_irq(void) |
@@ -120,6 +114,8 @@ static void __init n30_init(void) | |||
120 | s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | | 114 | s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | |
121 | S3C2410_MISCCR_USBSUSPND0 | | 115 | S3C2410_MISCCR_USBSUSPND0 | |
122 | S3C2410_MISCCR_USBSUSPND1, 0x0); | 116 | S3C2410_MISCCR_USBSUSPND1, 0x0); |
117 | |||
118 | platform_add_devices(n30_devices, ARRAY_SIZE(n30_devices)); | ||
123 | } | 119 | } |
124 | 120 | ||
125 | MACHINE_START(N30, "Acer-N30") | 121 | MACHINE_START(N30, "Acer-N30") |
diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c index c78ab75b44f3..1f899fa588df 100644 --- a/arch/arm/mach-s3c2410/mach-otom.c +++ b/arch/arm/mach-s3c2410/mach-otom.c | |||
@@ -100,20 +100,17 @@ static struct platform_device *otom11_devices[] __initdata = { | |||
100 | &otom_device_nor, | 100 | &otom_device_nor, |
101 | }; | 101 | }; |
102 | 102 | ||
103 | static struct s3c24xx_board otom11_board __initdata = { | ||
104 | .devices = otom11_devices, | ||
105 | .devices_count = ARRAY_SIZE(otom11_devices) | ||
106 | }; | ||
107 | |||
108 | |||
109 | static void __init otom11_map_io(void) | 103 | static void __init otom11_map_io(void) |
110 | { | 104 | { |
111 | s3c24xx_init_io(otom11_iodesc, ARRAY_SIZE(otom11_iodesc)); | 105 | s3c24xx_init_io(otom11_iodesc, ARRAY_SIZE(otom11_iodesc)); |
112 | s3c24xx_init_clocks(0); | 106 | s3c24xx_init_clocks(0); |
113 | s3c24xx_init_uarts(otom11_uartcfgs, ARRAY_SIZE(otom11_uartcfgs)); | 107 | s3c24xx_init_uarts(otom11_uartcfgs, ARRAY_SIZE(otom11_uartcfgs)); |
114 | s3c24xx_set_board(&otom11_board); | ||
115 | } | 108 | } |
116 | 109 | ||
110 | static void __init otom11_init(void) | ||
111 | { | ||
112 | platform_add_devices(otom11_devices, ARRAY_SIZE(otom11_devices)); | ||
113 | } | ||
117 | 114 | ||
118 | MACHINE_START(OTOM, "Nex Vision - Otom 1.1") | 115 | MACHINE_START(OTOM, "Nex Vision - Otom 1.1") |
119 | /* Maintainer: Guillaume GOURAT <guillaume.gourat@nexvision.tv> */ | 116 | /* Maintainer: Guillaume GOURAT <guillaume.gourat@nexvision.tv> */ |
@@ -121,6 +118,7 @@ MACHINE_START(OTOM, "Nex Vision - Otom 1.1") | |||
121 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, | 118 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, |
122 | .boot_params = S3C2410_SDRAM_PA + 0x100, | 119 | .boot_params = S3C2410_SDRAM_PA + 0x100, |
123 | .map_io = otom11_map_io, | 120 | .map_io = otom11_map_io, |
121 | .init_machine = otom11_init, | ||
124 | .init_irq = s3c24xx_init_irq, | 122 | .init_irq = s3c24xx_init_irq, |
125 | .timer = &s3c24xx_timer, | 123 | .timer = &s3c24xx_timer, |
126 | MACHINE_END | 124 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c index c6a41593de21..9cc4253d7bbc 100644 --- a/arch/arm/mach-s3c2410/mach-qt2410.c +++ b/arch/arm/mach-s3c2410/mach-qt2410.c | |||
@@ -29,7 +29,6 @@ | |||
29 | #include <linux/init.h> | 29 | #include <linux/init.h> |
30 | #include <linux/platform_device.h> | 30 | #include <linux/platform_device.h> |
31 | #include <linux/serial_core.h> | 31 | #include <linux/serial_core.h> |
32 | #include <linux/mmc/protocol.h> | ||
33 | #include <linux/spi/spi.h> | 32 | #include <linux/spi/spi.h> |
34 | #include <linux/spi/spi_bitbang.h> | 33 | #include <linux/spi/spi_bitbang.h> |
35 | 34 | ||
@@ -331,11 +330,6 @@ static struct platform_device *qt2410_devices[] __initdata = { | |||
331 | &qt2410_led, | 330 | &qt2410_led, |
332 | }; | 331 | }; |
333 | 332 | ||
334 | static struct s3c24xx_board qt2410_board __initdata = { | ||
335 | .devices = qt2410_devices, | ||
336 | .devices_count = ARRAY_SIZE(qt2410_devices) | ||
337 | }; | ||
338 | |||
339 | static struct mtd_partition qt2410_nand_part[] = { | 333 | static struct mtd_partition qt2410_nand_part[] = { |
340 | [0] = { | 334 | [0] = { |
341 | .name = "U-Boot", | 335 | .name = "U-Boot", |
@@ -405,7 +399,6 @@ static void __init qt2410_map_io(void) | |||
405 | s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc)); | 399 | s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc)); |
406 | s3c24xx_init_clocks(12*1000*1000); | 400 | s3c24xx_init_clocks(12*1000*1000); |
407 | s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs)); | 401 | s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs)); |
408 | s3c24xx_set_board(&qt2410_board); | ||
409 | } | 402 | } |
410 | 403 | ||
411 | static void __init qt2410_machine_init(void) | 404 | static void __init qt2410_machine_init(void) |
@@ -432,6 +425,7 @@ static void __init qt2410_machine_init(void) | |||
432 | 425 | ||
433 | s3c2410_gpio_cfgpin(S3C2410_GPB5, S3C2410_GPIO_OUTPUT); | 426 | s3c2410_gpio_cfgpin(S3C2410_GPB5, S3C2410_GPIO_OUTPUT); |
434 | 427 | ||
428 | platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices)); | ||
435 | s3c2410_pm_init(); | 429 | s3c2410_pm_init(); |
436 | } | 430 | } |
437 | 431 | ||
diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c index 57b8a80f33d0..5852d300d52f 100644 --- a/arch/arm/mach-s3c2410/mach-smdk2410.c +++ b/arch/arm/mach-s3c2410/mach-smdk2410.c | |||
@@ -94,17 +94,17 @@ static struct platform_device *smdk2410_devices[] __initdata = { | |||
94 | &s3c_device_iis, | 94 | &s3c_device_iis, |
95 | }; | 95 | }; |
96 | 96 | ||
97 | static struct s3c24xx_board smdk2410_board __initdata = { | ||
98 | .devices = smdk2410_devices, | ||
99 | .devices_count = ARRAY_SIZE(smdk2410_devices) | ||
100 | }; | ||
101 | |||
102 | static void __init smdk2410_map_io(void) | 97 | static void __init smdk2410_map_io(void) |
103 | { | 98 | { |
104 | s3c24xx_init_io(smdk2410_iodesc, ARRAY_SIZE(smdk2410_iodesc)); | 99 | s3c24xx_init_io(smdk2410_iodesc, ARRAY_SIZE(smdk2410_iodesc)); |
105 | s3c24xx_init_clocks(0); | 100 | s3c24xx_init_clocks(0); |
106 | s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs)); | 101 | s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs)); |
107 | s3c24xx_set_board(&smdk2410_board); | 102 | } |
103 | |||
104 | static void __init smdk2410_init(void) | ||
105 | { | ||
106 | platform_add_devices(smdk2410_devices, ARRAY_SIZE(smdk2410_devices)); | ||
107 | smdk_machine_init(); | ||
108 | } | 108 | } |
109 | 109 | ||
110 | MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switch | 110 | MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switch |
@@ -115,7 +115,7 @@ MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switc | |||
115 | .boot_params = S3C2410_SDRAM_PA + 0x100, | 115 | .boot_params = S3C2410_SDRAM_PA + 0x100, |
116 | .map_io = smdk2410_map_io, | 116 | .map_io = smdk2410_map_io, |
117 | .init_irq = s3c24xx_init_irq, | 117 | .init_irq = s3c24xx_init_irq, |
118 | .init_machine = smdk_machine_init, | 118 | .init_machine = smdk2410_init, |
119 | .timer = &s3c24xx_timer, | 119 | .timer = &s3c24xx_timer, |
120 | MACHINE_END | 120 | MACHINE_END |
121 | 121 | ||
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c index c947c75bcbf0..7b624bb00490 100644 --- a/arch/arm/mach-s3c2410/mach-vr1000.c +++ b/arch/arm/mach-s3c2410/mach-vr1000.c | |||
@@ -384,13 +384,6 @@ static struct clk *vr1000_clocks[] = { | |||
384 | &s3c24xx_uclk, | 384 | &s3c24xx_uclk, |
385 | }; | 385 | }; |
386 | 386 | ||
387 | static struct s3c24xx_board vr1000_board __initdata = { | ||
388 | .devices = vr1000_devices, | ||
389 | .devices_count = ARRAY_SIZE(vr1000_devices), | ||
390 | .clocks = vr1000_clocks, | ||
391 | .clocks_count = ARRAY_SIZE(vr1000_clocks), | ||
392 | }; | ||
393 | |||
394 | static void vr1000_power_off(void) | 387 | static void vr1000_power_off(void) |
395 | { | 388 | { |
396 | s3c2410_gpio_cfgpin(S3C2410_GPB9, S3C2410_GPB9_OUTP); | 389 | s3c2410_gpio_cfgpin(S3C2410_GPB9, S3C2410_GPB9_OUTP); |
@@ -412,15 +405,19 @@ static void __init vr1000_map_io(void) | |||
412 | 405 | ||
413 | s3c24xx_uclk.parent = &s3c24xx_clkout1; | 406 | s3c24xx_uclk.parent = &s3c24xx_clkout1; |
414 | 407 | ||
408 | s3c24xx_register_clocks(vr1000_clocks, ARRAY_SIZE(vr1000_clocks)); | ||
409 | |||
415 | pm_power_off = vr1000_power_off; | 410 | pm_power_off = vr1000_power_off; |
416 | 411 | ||
417 | s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc)); | 412 | s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc)); |
418 | s3c24xx_init_clocks(0); | 413 | s3c24xx_init_clocks(0); |
419 | s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs)); | 414 | s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs)); |
420 | s3c24xx_set_board(&vr1000_board); | ||
421 | usb_simtec_init(); | ||
422 | } | 415 | } |
423 | 416 | ||
417 | static void __init vr1000_init(void) | ||
418 | { | ||
419 | platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices)); | ||
420 | } | ||
424 | 421 | ||
425 | MACHINE_START(VR1000, "Thorcom-VR1000") | 422 | MACHINE_START(VR1000, "Thorcom-VR1000") |
426 | /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ | 423 | /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ |
@@ -428,6 +425,7 @@ MACHINE_START(VR1000, "Thorcom-VR1000") | |||
428 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, | 425 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, |
429 | .boot_params = S3C2410_SDRAM_PA + 0x100, | 426 | .boot_params = S3C2410_SDRAM_PA + 0x100, |
430 | .map_io = vr1000_map_io, | 427 | .map_io = vr1000_map_io, |
428 | .init_machine = vr1000_init, | ||
431 | .init_irq = s3c24xx_init_irq, | 429 | .init_irq = s3c24xx_init_irq, |
432 | .timer = &s3c24xx_timer, | 430 | .timer = &s3c24xx_timer, |
433 | MACHINE_END | 431 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig index befc5fdbb613..d5be5d053264 100644 --- a/arch/arm/mach-s3c2412/Kconfig +++ b/arch/arm/mach-s3c2412/Kconfig | |||
@@ -47,6 +47,15 @@ config MACH_S3C2413 | |||
47 | machine_is_s3c2413() will work when MACH_SMDK2413 is | 47 | machine_is_s3c2413() will work when MACH_SMDK2413 is |
48 | selected | 48 | selected |
49 | 49 | ||
50 | config MACH_SMDK2412 | ||
51 | bool "SMDK2412" | ||
52 | select MACH_SMDK2413 | ||
53 | help | ||
54 | Say Y here if you are using an SMDK2412 | ||
55 | |||
56 | Note, this shares support with SMDK2413, so will automatically | ||
57 | select MACH_SMDK2413. | ||
58 | |||
50 | config MACH_VSTMS | 59 | config MACH_VSTMS |
51 | bool "VMSTMS" | 60 | bool "VMSTMS" |
52 | select CPU_S3C2412 | 61 | select CPU_S3C2412 |
diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c index e89dbdcb1b7b..f0d66828f965 100644 --- a/arch/arm/mach-s3c2412/irq.c +++ b/arch/arm/mach-s3c2412/irq.c | |||
@@ -23,7 +23,6 @@ | |||
23 | #include <linux/module.h> | 23 | #include <linux/module.h> |
24 | #include <linux/interrupt.h> | 24 | #include <linux/interrupt.h> |
25 | #include <linux/ioport.h> | 25 | #include <linux/ioport.h> |
26 | #include <linux/ptrace.h> | ||
27 | #include <linux/sysdev.h> | 26 | #include <linux/sysdev.h> |
28 | 27 | ||
29 | #include <asm/hardware.h> | 28 | #include <asm/hardware.h> |
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c index b5befce6c8d3..063af09f899d 100644 --- a/arch/arm/mach-s3c2412/mach-smdk2413.c +++ b/arch/arm/mach-s3c2412/mach-smdk2413.c | |||
@@ -110,11 +110,6 @@ static struct platform_device *smdk2413_devices[] __initdata = { | |||
110 | &s3c_device_usbgadget, | 110 | &s3c_device_usbgadget, |
111 | }; | 111 | }; |
112 | 112 | ||
113 | static struct s3c24xx_board smdk2413_board __initdata = { | ||
114 | .devices = smdk2413_devices, | ||
115 | .devices_count = ARRAY_SIZE(smdk2413_devices) | ||
116 | }; | ||
117 | |||
118 | static void __init smdk2413_fixup(struct machine_desc *desc, | 113 | static void __init smdk2413_fixup(struct machine_desc *desc, |
119 | struct tag *tags, char **cmdline, | 114 | struct tag *tags, char **cmdline, |
120 | struct meminfo *mi) | 115 | struct meminfo *mi) |
@@ -132,7 +127,6 @@ static void __init smdk2413_map_io(void) | |||
132 | s3c24xx_init_io(smdk2413_iodesc, ARRAY_SIZE(smdk2413_iodesc)); | 127 | s3c24xx_init_io(smdk2413_iodesc, ARRAY_SIZE(smdk2413_iodesc)); |
133 | s3c24xx_init_clocks(12000000); | 128 | s3c24xx_init_clocks(12000000); |
134 | s3c24xx_init_uarts(smdk2413_uartcfgs, ARRAY_SIZE(smdk2413_uartcfgs)); | 129 | s3c24xx_init_uarts(smdk2413_uartcfgs, ARRAY_SIZE(smdk2413_uartcfgs)); |
135 | s3c24xx_set_board(&smdk2413_board); | ||
136 | } | 130 | } |
137 | 131 | ||
138 | static void __init smdk2413_machine_init(void) | 132 | static void __init smdk2413_machine_init(void) |
@@ -149,6 +143,7 @@ static void __init smdk2413_machine_init(void) | |||
149 | 143 | ||
150 | s3c24xx_udc_set_platdata(&smdk2413_udc_cfg); | 144 | s3c24xx_udc_set_platdata(&smdk2413_udc_cfg); |
151 | 145 | ||
146 | platform_add_devices(smdk2413_devices, ARRAY_SIZE(smdk2413_devices)); | ||
152 | smdk_machine_init(); | 147 | smdk_machine_init(); |
153 | } | 148 | } |
154 | 149 | ||
diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c index 4231b549d797..f2fbd65956ac 100644 --- a/arch/arm/mach-s3c2412/mach-vstms.c +++ b/arch/arm/mach-s3c2412/mach-vstms.c | |||
@@ -129,11 +129,6 @@ static struct platform_device *vstms_devices[] __initdata = { | |||
129 | &s3c_device_nand, | 129 | &s3c_device_nand, |
130 | }; | 130 | }; |
131 | 131 | ||
132 | static struct s3c24xx_board vstms_board __initdata = { | ||
133 | .devices = vstms_devices, | ||
134 | .devices_count = ARRAY_SIZE(vstms_devices) | ||
135 | }; | ||
136 | |||
137 | static void __init vstms_fixup(struct machine_desc *desc, | 132 | static void __init vstms_fixup(struct machine_desc *desc, |
138 | struct tag *tags, char **cmdline, | 133 | struct tag *tags, char **cmdline, |
139 | struct meminfo *mi) | 134 | struct meminfo *mi) |
@@ -153,7 +148,11 @@ static void __init vstms_map_io(void) | |||
153 | s3c24xx_init_io(vstms_iodesc, ARRAY_SIZE(vstms_iodesc)); | 148 | s3c24xx_init_io(vstms_iodesc, ARRAY_SIZE(vstms_iodesc)); |
154 | s3c24xx_init_clocks(12000000); | 149 | s3c24xx_init_clocks(12000000); |
155 | s3c24xx_init_uarts(vstms_uartcfgs, ARRAY_SIZE(vstms_uartcfgs)); | 150 | s3c24xx_init_uarts(vstms_uartcfgs, ARRAY_SIZE(vstms_uartcfgs)); |
156 | s3c24xx_set_board(&vstms_board); | 151 | } |
152 | |||
153 | static void __init vstms_init(void) | ||
154 | { | ||
155 | platform_add_devices(vstms_devices, ARRAY_SIZE(vstms_devices)); | ||
157 | } | 156 | } |
158 | 157 | ||
159 | MACHINE_START(VSTMS, "VSTMS") | 158 | MACHINE_START(VSTMS, "VSTMS") |
@@ -163,6 +162,7 @@ MACHINE_START(VSTMS, "VSTMS") | |||
163 | 162 | ||
164 | .fixup = vstms_fixup, | 163 | .fixup = vstms_fixup, |
165 | .init_irq = s3c24xx_init_irq, | 164 | .init_irq = s3c24xx_init_irq, |
165 | .init_machine = vstms_init, | ||
166 | .map_io = vstms_map_io, | 166 | .map_io = vstms_map_io, |
167 | .timer = &s3c24xx_timer, | 167 | .timer = &s3c24xx_timer, |
168 | MACHINE_END | 168 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/irq.c b/arch/arm/mach-s3c2440/irq.c index 1069d13d8c57..a87608bc1a03 100644 --- a/arch/arm/mach-s3c2440/irq.c +++ b/arch/arm/mach-s3c2440/irq.c | |||
@@ -23,7 +23,6 @@ | |||
23 | #include <linux/module.h> | 23 | #include <linux/module.h> |
24 | #include <linux/interrupt.h> | 24 | #include <linux/interrupt.h> |
25 | #include <linux/ioport.h> | 25 | #include <linux/ioport.h> |
26 | #include <linux/ptrace.h> | ||
27 | #include <linux/sysdev.h> | 26 | #include <linux/sysdev.h> |
28 | 27 | ||
29 | #include <asm/hardware.h> | 28 | #include <asm/hardware.h> |
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c index 3f0288eb1ed5..b5d387ef37e1 100644 --- a/arch/arm/mach-s3c2440/mach-anubis.c +++ b/arch/arm/mach-s3c2440/mach-anubis.c | |||
@@ -281,13 +281,6 @@ static struct clk *anubis_clocks[] = { | |||
281 | &s3c24xx_uclk, | 281 | &s3c24xx_uclk, |
282 | }; | 282 | }; |
283 | 283 | ||
284 | static struct s3c24xx_board anubis_board __initdata = { | ||
285 | .devices = anubis_devices, | ||
286 | .devices_count = ARRAY_SIZE(anubis_devices), | ||
287 | .clocks = anubis_clocks, | ||
288 | .clocks_count = ARRAY_SIZE(anubis_clocks), | ||
289 | }; | ||
290 | |||
291 | static void __init anubis_map_io(void) | 284 | static void __init anubis_map_io(void) |
292 | { | 285 | { |
293 | /* initialise the clocks */ | 286 | /* initialise the clocks */ |
@@ -303,23 +296,31 @@ static void __init anubis_map_io(void) | |||
303 | 296 | ||
304 | s3c24xx_uclk.parent = &s3c24xx_clkout1; | 297 | s3c24xx_uclk.parent = &s3c24xx_clkout1; |
305 | 298 | ||
299 | s3c24xx_register_clocks(anubis_clocks, ARRAY_SIZE(anubis_clocks)); | ||
300 | |||
306 | s3c_device_nand.dev.platform_data = &anubis_nand_info; | 301 | s3c_device_nand.dev.platform_data = &anubis_nand_info; |
307 | 302 | ||
308 | s3c24xx_init_io(anubis_iodesc, ARRAY_SIZE(anubis_iodesc)); | 303 | s3c24xx_init_io(anubis_iodesc, ARRAY_SIZE(anubis_iodesc)); |
309 | s3c24xx_init_clocks(0); | 304 | s3c24xx_init_clocks(0); |
310 | s3c24xx_init_uarts(anubis_uartcfgs, ARRAY_SIZE(anubis_uartcfgs)); | 305 | s3c24xx_init_uarts(anubis_uartcfgs, ARRAY_SIZE(anubis_uartcfgs)); |
311 | s3c24xx_set_board(&anubis_board); | ||
312 | 306 | ||
313 | /* ensure that the GPIO is setup */ | 307 | /* ensure that the GPIO is setup */ |
314 | s3c2410_gpio_setpin(S3C2410_GPA0, 1); | 308 | s3c2410_gpio_setpin(S3C2410_GPA0, 1); |
315 | } | 309 | } |
316 | 310 | ||
311 | static void __init anubis_init(void) | ||
312 | { | ||
313 | platform_add_devices(anubis_devices, ARRAY_SIZE(anubis_devices)); | ||
314 | } | ||
315 | |||
316 | |||
317 | MACHINE_START(ANUBIS, "Simtec-Anubis") | 317 | MACHINE_START(ANUBIS, "Simtec-Anubis") |
318 | /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ | 318 | /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ |
319 | .phys_io = S3C2410_PA_UART, | 319 | .phys_io = S3C2410_PA_UART, |
320 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, | 320 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, |
321 | .boot_params = S3C2410_SDRAM_PA + 0x100, | 321 | .boot_params = S3C2410_SDRAM_PA + 0x100, |
322 | .map_io = anubis_map_io, | 322 | .map_io = anubis_map_io, |
323 | .init_machine = anubis_init, | ||
323 | .init_irq = s3c24xx_init_irq, | 324 | .init_irq = s3c24xx_init_irq, |
324 | .timer = &s3c24xx_timer, | 325 | .timer = &s3c24xx_timer, |
325 | MACHINE_END | 326 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c index 6d551d88330b..5e61f2166c76 100644 --- a/arch/arm/mach-s3c2440/mach-nexcoder.c +++ b/arch/arm/mach-s3c2440/mach-nexcoder.c | |||
@@ -116,12 +116,6 @@ static struct platform_device *nexcoder_devices[] __initdata = { | |||
116 | &nexcoder_device_nor, | 116 | &nexcoder_device_nor, |
117 | }; | 117 | }; |
118 | 118 | ||
119 | static struct s3c24xx_board nexcoder_board __initdata = { | ||
120 | .devices = nexcoder_devices, | ||
121 | .devices_count = ARRAY_SIZE(nexcoder_devices), | ||
122 | }; | ||
123 | |||
124 | |||
125 | static void __init nexcoder_sensorboard_init(void) | 119 | static void __init nexcoder_sensorboard_init(void) |
126 | { | 120 | { |
127 | // Initialize SCCB bus | 121 | // Initialize SCCB bus |
@@ -142,10 +136,14 @@ static void __init nexcoder_map_io(void) | |||
142 | s3c24xx_init_io(nexcoder_iodesc, ARRAY_SIZE(nexcoder_iodesc)); | 136 | s3c24xx_init_io(nexcoder_iodesc, ARRAY_SIZE(nexcoder_iodesc)); |
143 | s3c24xx_init_clocks(0); | 137 | s3c24xx_init_clocks(0); |
144 | s3c24xx_init_uarts(nexcoder_uartcfgs, ARRAY_SIZE(nexcoder_uartcfgs)); | 138 | s3c24xx_init_uarts(nexcoder_uartcfgs, ARRAY_SIZE(nexcoder_uartcfgs)); |
145 | s3c24xx_set_board(&nexcoder_board); | 139 | |
146 | nexcoder_sensorboard_init(); | 140 | nexcoder_sensorboard_init(); |
147 | } | 141 | } |
148 | 142 | ||
143 | static void __init nexcoder_init(void) | ||
144 | { | ||
145 | platform_add_devices(nexcoder_devices, ARRAY_SIZE(nexcoder_devices)); | ||
146 | }; | ||
149 | 147 | ||
150 | MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440") | 148 | MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440") |
151 | /* Maintainer: Guillaume GOURAT <guillaume.gourat@nexvision.tv> */ | 149 | /* Maintainer: Guillaume GOURAT <guillaume.gourat@nexvision.tv> */ |
@@ -153,6 +151,7 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440") | |||
153 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, | 151 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, |
154 | .boot_params = S3C2410_SDRAM_PA + 0x100, | 152 | .boot_params = S3C2410_SDRAM_PA + 0x100, |
155 | .map_io = nexcoder_map_io, | 153 | .map_io = nexcoder_map_io, |
154 | .init_machine = nexcoder_init, | ||
156 | .init_irq = s3c24xx_init_irq, | 155 | .init_irq = s3c24xx_init_irq, |
157 | .timer = &s3c24xx_timer, | 156 | .timer = &s3c24xx_timer, |
158 | MACHINE_END | 157 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c index 2ed8e51f20c8..324f5a237921 100644 --- a/arch/arm/mach-s3c2440/mach-osiris.c +++ b/arch/arm/mach-s3c2440/mach-osiris.c | |||
@@ -251,13 +251,6 @@ static struct clk *osiris_clocks[] = { | |||
251 | &s3c24xx_uclk, | 251 | &s3c24xx_uclk, |
252 | }; | 252 | }; |
253 | 253 | ||
254 | static struct s3c24xx_board osiris_board __initdata = { | ||
255 | .devices = osiris_devices, | ||
256 | .devices_count = ARRAY_SIZE(osiris_devices), | ||
257 | .clocks = osiris_clocks, | ||
258 | .clocks_count = ARRAY_SIZE(osiris_clocks), | ||
259 | }; | ||
260 | |||
261 | static void __init osiris_map_io(void) | 254 | static void __init osiris_map_io(void) |
262 | { | 255 | { |
263 | unsigned long flags; | 256 | unsigned long flags; |
@@ -275,12 +268,13 @@ static void __init osiris_map_io(void) | |||
275 | 268 | ||
276 | s3c24xx_uclk.parent = &s3c24xx_clkout1; | 269 | s3c24xx_uclk.parent = &s3c24xx_clkout1; |
277 | 270 | ||
271 | s3c24xx_register_clocks(osiris_clocks, ARRAY_SIZE(osiris_clocks)); | ||
272 | |||
278 | s3c_device_nand.dev.platform_data = &osiris_nand_info; | 273 | s3c_device_nand.dev.platform_data = &osiris_nand_info; |
279 | 274 | ||
280 | s3c24xx_init_io(osiris_iodesc, ARRAY_SIZE(osiris_iodesc)); | 275 | s3c24xx_init_io(osiris_iodesc, ARRAY_SIZE(osiris_iodesc)); |
281 | s3c24xx_init_clocks(0); | 276 | s3c24xx_init_clocks(0); |
282 | s3c24xx_init_uarts(osiris_uartcfgs, ARRAY_SIZE(osiris_uartcfgs)); | 277 | s3c24xx_init_uarts(osiris_uartcfgs, ARRAY_SIZE(osiris_uartcfgs)); |
283 | s3c24xx_set_board(&osiris_board); | ||
284 | 278 | ||
285 | /* fix bus configuration (nBE settings wrong on ABLE pre v2.20) */ | 279 | /* fix bus configuration (nBE settings wrong on ABLE pre v2.20) */ |
286 | 280 | ||
@@ -292,12 +286,18 @@ static void __init osiris_map_io(void) | |||
292 | s3c2410_gpio_setpin(S3C2410_GPA0, 1); | 286 | s3c2410_gpio_setpin(S3C2410_GPA0, 1); |
293 | } | 287 | } |
294 | 288 | ||
289 | static void __init osiris_init(void) | ||
290 | { | ||
291 | platform_add_devices(osiris_devices, ARRAY_SIZE(osiris_devices)); | ||
292 | }; | ||
293 | |||
295 | MACHINE_START(OSIRIS, "Simtec-OSIRIS") | 294 | MACHINE_START(OSIRIS, "Simtec-OSIRIS") |
296 | /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ | 295 | /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ |
297 | .phys_io = S3C2410_PA_UART, | 296 | .phys_io = S3C2410_PA_UART, |
298 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, | 297 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, |
299 | .boot_params = S3C2410_SDRAM_PA + 0x100, | 298 | .boot_params = S3C2410_SDRAM_PA + 0x100, |
300 | .map_io = osiris_map_io, | 299 | .map_io = osiris_map_io, |
300 | .init_machine = osiris_init, | ||
301 | .init_irq = s3c24xx_init_irq, | 301 | .init_irq = s3c24xx_init_irq, |
302 | .timer = &s3c24xx_timer, | 302 | .timer = &s3c24xx_timer, |
303 | MACHINE_END | 303 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c index ae1d0a81fd6a..c3cc4bf158f6 100644 --- a/arch/arm/mach-s3c2440/mach-rx3715.c +++ b/arch/arm/mach-s3c2440/mach-rx3715.c | |||
@@ -202,11 +202,6 @@ static struct platform_device *rx3715_devices[] __initdata = { | |||
202 | &s3c_device_nand, | 202 | &s3c_device_nand, |
203 | }; | 203 | }; |
204 | 204 | ||
205 | static struct s3c24xx_board rx3715_board __initdata = { | ||
206 | .devices = rx3715_devices, | ||
207 | .devices_count = ARRAY_SIZE(rx3715_devices) | ||
208 | }; | ||
209 | |||
210 | static void __init rx3715_map_io(void) | 205 | static void __init rx3715_map_io(void) |
211 | { | 206 | { |
212 | s3c_device_nand.dev.platform_data = &rx3715_nand_info; | 207 | s3c_device_nand.dev.platform_data = &rx3715_nand_info; |
@@ -214,7 +209,6 @@ static void __init rx3715_map_io(void) | |||
214 | s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc)); | 209 | s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc)); |
215 | s3c24xx_init_clocks(16934000); | 210 | s3c24xx_init_clocks(16934000); |
216 | s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs)); | 211 | s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs)); |
217 | s3c24xx_set_board(&rx3715_board); | ||
218 | } | 212 | } |
219 | 213 | ||
220 | static void __init rx3715_init_irq(void) | 214 | static void __init rx3715_init_irq(void) |
@@ -230,9 +224,9 @@ static void __init rx3715_init_machine(void) | |||
230 | s3c2410_pm_init(); | 224 | s3c2410_pm_init(); |
231 | 225 | ||
232 | s3c24xx_fb_set_platdata(&rx3715_lcdcfg); | 226 | s3c24xx_fb_set_platdata(&rx3715_lcdcfg); |
227 | platform_add_devices(rx3715_devices, ARRAY_SIZE(rx3715_devices)); | ||
233 | } | 228 | } |
234 | 229 | ||
235 | |||
236 | MACHINE_START(RX3715, "IPAQ-RX3715") | 230 | MACHINE_START(RX3715, "IPAQ-RX3715") |
237 | /* Maintainer: Ben Dooks <ben@fluff.org> */ | 231 | /* Maintainer: Ben Dooks <ben@fluff.org> */ |
238 | .phys_io = S3C2410_PA_UART, | 232 | .phys_io = S3C2410_PA_UART, |
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c index c17eb5b1f6b4..e167254e232e 100644 --- a/arch/arm/mach-s3c2440/mach-smdk2440.c +++ b/arch/arm/mach-s3c2440/mach-smdk2440.c | |||
@@ -174,23 +174,18 @@ static struct platform_device *smdk2440_devices[] __initdata = { | |||
174 | &s3c_device_iis, | 174 | &s3c_device_iis, |
175 | }; | 175 | }; |
176 | 176 | ||
177 | static struct s3c24xx_board smdk2440_board __initdata = { | ||
178 | .devices = smdk2440_devices, | ||
179 | .devices_count = ARRAY_SIZE(smdk2440_devices) | ||
180 | }; | ||
181 | |||
182 | static void __init smdk2440_map_io(void) | 177 | static void __init smdk2440_map_io(void) |
183 | { | 178 | { |
184 | s3c24xx_init_io(smdk2440_iodesc, ARRAY_SIZE(smdk2440_iodesc)); | 179 | s3c24xx_init_io(smdk2440_iodesc, ARRAY_SIZE(smdk2440_iodesc)); |
185 | s3c24xx_init_clocks(16934400); | 180 | s3c24xx_init_clocks(16934400); |
186 | s3c24xx_init_uarts(smdk2440_uartcfgs, ARRAY_SIZE(smdk2440_uartcfgs)); | 181 | s3c24xx_init_uarts(smdk2440_uartcfgs, ARRAY_SIZE(smdk2440_uartcfgs)); |
187 | s3c24xx_set_board(&smdk2440_board); | ||
188 | } | 182 | } |
189 | 183 | ||
190 | static void __init smdk2440_machine_init(void) | 184 | static void __init smdk2440_machine_init(void) |
191 | { | 185 | { |
192 | s3c24xx_fb_set_platdata(&smdk2440_lcd_cfg); | 186 | s3c24xx_fb_set_platdata(&smdk2440_lcd_cfg); |
193 | 187 | ||
188 | platform_add_devices(smdk2440_devices, ARRAY_SIZE(smdk2440_devices)); | ||
194 | smdk_machine_init(); | 189 | smdk_machine_init(); |
195 | } | 190 | } |
196 | 191 | ||
diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c index 756573595b88..6cd4818f3f0d 100644 --- a/arch/arm/mach-s3c2443/irq.c +++ b/arch/arm/mach-s3c2443/irq.c | |||
@@ -23,7 +23,6 @@ | |||
23 | #include <linux/module.h> | 23 | #include <linux/module.h> |
24 | #include <linux/interrupt.h> | 24 | #include <linux/interrupt.h> |
25 | #include <linux/ioport.h> | 25 | #include <linux/ioport.h> |
26 | #include <linux/ptrace.h> | ||
27 | #include <linux/sysdev.h> | 26 | #include <linux/sysdev.h> |
28 | 27 | ||
29 | #include <asm/hardware.h> | 28 | #include <asm/hardware.h> |
diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c index e82aaff7dee4..b71ee53c2865 100644 --- a/arch/arm/mach-s3c2443/mach-smdk2443.c +++ b/arch/arm/mach-s3c2443/mach-smdk2443.c | |||
@@ -106,21 +106,16 @@ static struct platform_device *smdk2443_devices[] __initdata = { | |||
106 | &s3c_device_i2c, | 106 | &s3c_device_i2c, |
107 | }; | 107 | }; |
108 | 108 | ||
109 | static struct s3c24xx_board smdk2443_board __initdata = { | ||
110 | .devices = smdk2443_devices, | ||
111 | .devices_count = ARRAY_SIZE(smdk2443_devices) | ||
112 | }; | ||
113 | |||
114 | static void __init smdk2443_map_io(void) | 109 | static void __init smdk2443_map_io(void) |
115 | { | 110 | { |
116 | s3c24xx_init_io(smdk2443_iodesc, ARRAY_SIZE(smdk2443_iodesc)); | 111 | s3c24xx_init_io(smdk2443_iodesc, ARRAY_SIZE(smdk2443_iodesc)); |
117 | s3c24xx_init_clocks(12000000); | 112 | s3c24xx_init_clocks(12000000); |
118 | s3c24xx_init_uarts(smdk2443_uartcfgs, ARRAY_SIZE(smdk2443_uartcfgs)); | 113 | s3c24xx_init_uarts(smdk2443_uartcfgs, ARRAY_SIZE(smdk2443_uartcfgs)); |
119 | s3c24xx_set_board(&smdk2443_board); | ||
120 | } | 114 | } |
121 | 115 | ||
122 | static void __init smdk2443_machine_init(void) | 116 | static void __init smdk2443_machine_init(void) |
123 | { | 117 | { |
118 | platform_add_devices(smdk2443_devices, ARRAY_SIZE(smdk2443_devices)); | ||
124 | smdk_machine_init(); | 119 | smdk_machine_init(); |
125 | } | 120 | } |
126 | 121 | ||
diff --git a/arch/arm/mach-sa1100/clock.c b/arch/arm/mach-sa1100/clock.c index b1e8fd766c1a..fc97fe57ee6f 100644 --- a/arch/arm/mach-sa1100/clock.c +++ b/arch/arm/mach-sa1100/clock.c | |||
@@ -9,14 +9,17 @@ | |||
9 | #include <linux/string.h> | 9 | #include <linux/string.h> |
10 | #include <linux/clk.h> | 10 | #include <linux/clk.h> |
11 | #include <linux/spinlock.h> | 11 | #include <linux/spinlock.h> |
12 | #include <linux/mutex.h> | ||
12 | 13 | ||
13 | #include <asm/hardware.h> | 14 | #include <asm/hardware.h> |
14 | #include <asm/semaphore.h> | ||
15 | 15 | ||
16 | /* | ||
17 | * Very simple clock implementation - we only have one clock to | ||
18 | * deal with at the moment, so we only match using the "name". | ||
19 | */ | ||
16 | struct clk { | 20 | struct clk { |
17 | struct list_head node; | 21 | struct list_head node; |
18 | unsigned long rate; | 22 | unsigned long rate; |
19 | struct module *owner; | ||
20 | const char *name; | 23 | const char *name; |
21 | unsigned int enabled; | 24 | unsigned int enabled; |
22 | void (*enable)(void); | 25 | void (*enable)(void); |
@@ -24,21 +27,21 @@ struct clk { | |||
24 | }; | 27 | }; |
25 | 28 | ||
26 | static LIST_HEAD(clocks); | 29 | static LIST_HEAD(clocks); |
27 | static DECLARE_MUTEX(clocks_sem); | 30 | static DEFINE_MUTEX(clocks_mutex); |
28 | static DEFINE_SPINLOCK(clocks_lock); | 31 | static DEFINE_SPINLOCK(clocks_lock); |
29 | 32 | ||
30 | struct clk *clk_get(struct device *dev, const char *id) | 33 | struct clk *clk_get(struct device *dev, const char *id) |
31 | { | 34 | { |
32 | struct clk *p, *clk = ERR_PTR(-ENOENT); | 35 | struct clk *p, *clk = ERR_PTR(-ENOENT); |
33 | 36 | ||
34 | down(&clocks_sem); | 37 | mutex_lock(&clocks_mutex); |
35 | list_for_each_entry(p, &clocks, node) { | 38 | list_for_each_entry(p, &clocks, node) { |
36 | if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) { | 39 | if (strcmp(id, p->name) == 0) { |
37 | clk = p; | 40 | clk = p; |
38 | break; | 41 | break; |
39 | } | 42 | } |
40 | } | 43 | } |
41 | up(&clocks_sem); | 44 | mutex_unlock(&clocks_mutex); |
42 | 45 | ||
43 | return clk; | 46 | return clk; |
44 | } | 47 | } |
@@ -46,7 +49,6 @@ EXPORT_SYMBOL(clk_get); | |||
46 | 49 | ||
47 | void clk_put(struct clk *clk) | 50 | void clk_put(struct clk *clk) |
48 | { | 51 | { |
49 | module_put(clk->owner); | ||
50 | } | 52 | } |
51 | EXPORT_SYMBOL(clk_put); | 53 | EXPORT_SYMBOL(clk_put); |
52 | 54 | ||
@@ -109,18 +111,18 @@ static struct clk clk_gpio27 = { | |||
109 | 111 | ||
110 | int clk_register(struct clk *clk) | 112 | int clk_register(struct clk *clk) |
111 | { | 113 | { |
112 | down(&clocks_sem); | 114 | mutex_lock(&clocks_mutex); |
113 | list_add(&clk->node, &clocks); | 115 | list_add(&clk->node, &clocks); |
114 | up(&clocks_sem); | 116 | mutex_unlock(&clocks_mutex); |
115 | return 0; | 117 | return 0; |
116 | } | 118 | } |
117 | EXPORT_SYMBOL(clk_register); | 119 | EXPORT_SYMBOL(clk_register); |
118 | 120 | ||
119 | void clk_unregister(struct clk *clk) | 121 | void clk_unregister(struct clk *clk) |
120 | { | 122 | { |
121 | down(&clocks_sem); | 123 | mutex_lock(&clocks_mutex); |
122 | list_del(&clk->node); | 124 | list_del(&clk->node); |
123 | up(&clocks_sem); | 125 | mutex_unlock(&clocks_mutex); |
124 | } | 126 | } |
125 | EXPORT_SYMBOL(clk_unregister); | 127 | EXPORT_SYMBOL(clk_unregister); |
126 | 128 | ||
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c index 5642aeca079e..edf3347d9c5b 100644 --- a/arch/arm/mach-sa1100/irq.c +++ b/arch/arm/mach-sa1100/irq.c | |||
@@ -14,7 +14,6 @@ | |||
14 | #include <linux/interrupt.h> | 14 | #include <linux/interrupt.h> |
15 | #include <linux/irq.h> | 15 | #include <linux/irq.h> |
16 | #include <linux/ioport.h> | 16 | #include <linux/ioport.h> |
17 | #include <linux/ptrace.h> | ||
18 | #include <linux/sysdev.h> | 17 | #include <linux/sysdev.h> |
19 | 18 | ||
20 | #include <asm/hardware.h> | 19 | #include <asm/hardware.h> |
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c index 075d4d1d63be..d7c038a0256b 100644 --- a/arch/arm/mach-sa1100/neponset.c +++ b/arch/arm/mach-sa1100/neponset.c | |||
@@ -4,7 +4,6 @@ | |||
4 | */ | 4 | */ |
5 | #include <linux/kernel.h> | 5 | #include <linux/kernel.h> |
6 | #include <linux/init.h> | 6 | #include <linux/init.h> |
7 | #include <linux/ptrace.h> | ||
8 | #include <linux/tty.h> | 7 | #include <linux/tty.h> |
9 | #include <linux/ioport.h> | 8 | #include <linux/ioport.h> |
10 | #include <linux/serial_core.h> | 9 | #include <linux/serial_core.h> |
diff --git a/arch/arm/mach-shark/irq.c b/arch/arm/mach-shark/irq.c index 00a6c1466867..5b0c6af44ec6 100644 --- a/arch/arm/mach-shark/irq.c +++ b/arch/arm/mach-shark/irq.c | |||
@@ -10,7 +10,6 @@ | |||
10 | 10 | ||
11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
12 | #include <linux/fs.h> | 12 | #include <linux/fs.h> |
13 | #include <linux/ptrace.h> | ||
14 | #include <linux/interrupt.h> | 13 | #include <linux/interrupt.h> |
15 | 14 | ||
16 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index bf71507c76fd..1275aa7d2eb1 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c | |||
@@ -26,6 +26,8 @@ | |||
26 | #include <linux/interrupt.h> | 26 | #include <linux/interrupt.h> |
27 | #include <linux/amba/bus.h> | 27 | #include <linux/amba/bus.h> |
28 | #include <linux/amba/clcd.h> | 28 | #include <linux/amba/clcd.h> |
29 | #include <linux/clocksource.h> | ||
30 | #include <linux/clockchips.h> | ||
29 | 31 | ||
30 | #include <asm/cnt32_to_63.h> | 32 | #include <asm/cnt32_to_63.h> |
31 | #include <asm/system.h> | 33 | #include <asm/system.h> |
@@ -828,59 +830,61 @@ void __init versatile_init(void) | |||
828 | #define TICKS2USECS(x) ((x) / TICKS_PER_uSEC) | 830 | #define TICKS2USECS(x) ((x) / TICKS_PER_uSEC) |
829 | #endif | 831 | #endif |
830 | 832 | ||
831 | /* | 833 | static void timer_set_mode(enum clock_event_mode mode, |
832 | * Returns number of ms since last clock interrupt. Note that interrupts | 834 | struct clock_event_device *clk) |
833 | * will have been disabled by do_gettimeoffset() | ||
834 | */ | ||
835 | static unsigned long versatile_gettimeoffset(void) | ||
836 | { | 835 | { |
837 | unsigned long ticks1, ticks2, status; | 836 | unsigned long ctrl; |
838 | 837 | ||
839 | /* | 838 | switch(mode) { |
840 | * Get the current number of ticks. Note that there is a race | 839 | case CLOCK_EVT_MODE_PERIODIC: |
841 | * condition between us reading the timer and checking for | 840 | writel(TIMER_RELOAD, TIMER0_VA_BASE + TIMER_LOAD); |
842 | * an interrupt. We get around this by ensuring that the | ||
843 | * counter has not reloaded between our two reads. | ||
844 | */ | ||
845 | ticks2 = readl(TIMER0_VA_BASE + TIMER_VALUE) & 0xffff; | ||
846 | do { | ||
847 | ticks1 = ticks2; | ||
848 | status = __raw_readl(VA_IC_BASE + VIC_RAW_STATUS); | ||
849 | ticks2 = readl(TIMER0_VA_BASE + TIMER_VALUE) & 0xffff; | ||
850 | } while (ticks2 > ticks1); | ||
851 | 841 | ||
852 | /* | 842 | ctrl = TIMER_CTRL_PERIODIC; |
853 | * Number of ticks since last interrupt. | 843 | ctrl |= TIMER_CTRL_32BIT | TIMER_CTRL_IE | TIMER_CTRL_ENABLE; |
854 | */ | 844 | break; |
855 | ticks1 = TIMER_RELOAD - ticks2; | 845 | case CLOCK_EVT_MODE_ONESHOT: |
846 | /* period set, and timer enabled in 'next_event' hook */ | ||
847 | ctrl = TIMER_CTRL_ONESHOT; | ||
848 | ctrl |= TIMER_CTRL_32BIT | TIMER_CTRL_IE; | ||
849 | break; | ||
850 | case CLOCK_EVT_MODE_UNUSED: | ||
851 | case CLOCK_EVT_MODE_SHUTDOWN: | ||
852 | default: | ||
853 | ctrl = 0; | ||
854 | } | ||
856 | 855 | ||
857 | /* | 856 | writel(ctrl, TIMER0_VA_BASE + TIMER_CTRL); |
858 | * Interrupt pending? If so, we've reloaded once already. | 857 | } |
859 | * | ||
860 | * FIXME: Need to check this is effectively timer 0 that expires | ||
861 | */ | ||
862 | if (status & IRQMASK_TIMERINT0_1) | ||
863 | ticks1 += TIMER_RELOAD; | ||
864 | 858 | ||
865 | /* | 859 | static int timer_set_next_event(unsigned long evt, |
866 | * Convert the ticks to usecs | 860 | struct clock_event_device *unused) |
867 | */ | 861 | { |
868 | return TICKS2USECS(ticks1); | 862 | unsigned long ctrl = readl(TIMER0_VA_BASE + TIMER_CTRL); |
863 | |||
864 | writel(evt, TIMER0_VA_BASE + TIMER_LOAD); | ||
865 | writel(ctrl | TIMER_CTRL_ENABLE, TIMER0_VA_BASE + TIMER_CTRL); | ||
866 | |||
867 | return 0; | ||
869 | } | 868 | } |
870 | 869 | ||
870 | static struct clock_event_device timer0_clockevent = { | ||
871 | .name = "timer0", | ||
872 | .shift = 32, | ||
873 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | ||
874 | .set_mode = timer_set_mode, | ||
875 | .set_next_event = timer_set_next_event, | ||
876 | }; | ||
877 | |||
871 | /* | 878 | /* |
872 | * IRQ handler for the timer | 879 | * IRQ handler for the timer |
873 | */ | 880 | */ |
874 | static irqreturn_t versatile_timer_interrupt(int irq, void *dev_id) | 881 | static irqreturn_t versatile_timer_interrupt(int irq, void *dev_id) |
875 | { | 882 | { |
876 | write_seqlock(&xtime_lock); | 883 | struct clock_event_device *evt = &timer0_clockevent; |
877 | 884 | ||
878 | // ...clear the interrupt | ||
879 | writel(1, TIMER0_VA_BASE + TIMER_INTCLR); | 885 | writel(1, TIMER0_VA_BASE + TIMER_INTCLR); |
880 | 886 | ||
881 | timer_tick(); | 887 | evt->event_handler(evt); |
882 | |||
883 | write_sequnlock(&xtime_lock); | ||
884 | 888 | ||
885 | return IRQ_HANDLED; | 889 | return IRQ_HANDLED; |
886 | } | 890 | } |
@@ -891,6 +895,36 @@ static struct irqaction versatile_timer_irq = { | |||
891 | .handler = versatile_timer_interrupt, | 895 | .handler = versatile_timer_interrupt, |
892 | }; | 896 | }; |
893 | 897 | ||
898 | static cycle_t versatile_get_cycles(void) | ||
899 | { | ||
900 | return ~readl(TIMER3_VA_BASE + TIMER_VALUE); | ||
901 | } | ||
902 | |||
903 | static struct clocksource clocksource_versatile = { | ||
904 | .name = "timer3", | ||
905 | .rating = 200, | ||
906 | .read = versatile_get_cycles, | ||
907 | .mask = CLOCKSOURCE_MASK(32), | ||
908 | .shift = 20, | ||
909 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
910 | }; | ||
911 | |||
912 | static int __init versatile_clocksource_init(void) | ||
913 | { | ||
914 | /* setup timer3 as free-running clocksource */ | ||
915 | writel(0, TIMER3_VA_BASE + TIMER_CTRL); | ||
916 | writel(0xffffffff, TIMER3_VA_BASE + TIMER_LOAD); | ||
917 | writel(0xffffffff, TIMER3_VA_BASE + TIMER_VALUE); | ||
918 | writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC, | ||
919 | TIMER3_VA_BASE + TIMER_CTRL); | ||
920 | |||
921 | clocksource_versatile.mult = | ||
922 | clocksource_khz2mult(1000, clocksource_versatile.shift); | ||
923 | clocksource_register(&clocksource_versatile); | ||
924 | |||
925 | return 0; | ||
926 | } | ||
927 | |||
894 | /* | 928 | /* |
895 | * Set up timer interrupt, and return the current time in seconds. | 929 | * Set up timer interrupt, and return the current time in seconds. |
896 | */ | 930 | */ |
@@ -918,18 +952,25 @@ static void __init versatile_timer_init(void) | |||
918 | writel(0, TIMER2_VA_BASE + TIMER_CTRL); | 952 | writel(0, TIMER2_VA_BASE + TIMER_CTRL); |
919 | writel(0, TIMER3_VA_BASE + TIMER_CTRL); | 953 | writel(0, TIMER3_VA_BASE + TIMER_CTRL); |
920 | 954 | ||
921 | writel(TIMER_RELOAD, TIMER0_VA_BASE + TIMER_LOAD); | ||
922 | writel(TIMER_RELOAD, TIMER0_VA_BASE + TIMER_VALUE); | ||
923 | writel(TIMER_DIVISOR | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC | | ||
924 | TIMER_CTRL_IE, TIMER0_VA_BASE + TIMER_CTRL); | ||
925 | |||
926 | /* | 955 | /* |
927 | * Make irqs happen for the system timer | 956 | * Make irqs happen for the system timer |
928 | */ | 957 | */ |
929 | setup_irq(IRQ_TIMERINT0_1, &versatile_timer_irq); | 958 | setup_irq(IRQ_TIMERINT0_1, &versatile_timer_irq); |
959 | |||
960 | versatile_clocksource_init(); | ||
961 | |||
962 | timer0_clockevent.mult = | ||
963 | div_sc(1000000, NSEC_PER_SEC, timer0_clockevent.shift); | ||
964 | timer0_clockevent.max_delta_ns = | ||
965 | clockevent_delta2ns(0xffffffff, &timer0_clockevent); | ||
966 | timer0_clockevent.min_delta_ns = | ||
967 | clockevent_delta2ns(0xf, &timer0_clockevent); | ||
968 | |||
969 | timer0_clockevent.cpumask = cpumask_of_cpu(0); | ||
970 | clockevents_register_device(&timer0_clockevent); | ||
930 | } | 971 | } |
931 | 972 | ||
932 | struct sys_timer versatile_timer = { | 973 | struct sys_timer versatile_timer = { |
933 | .init = versatile_timer_init, | 974 | .init = versatile_timer_init, |
934 | .offset = versatile_gettimeoffset, | ||
935 | }; | 975 | }; |
976 | |||
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c index 5cd0b5d9e7eb..ba58223f12be 100644 --- a/arch/arm/mach-versatile/pci.c +++ b/arch/arm/mach-versatile/pci.c | |||
@@ -16,7 +16,6 @@ | |||
16 | */ | 16 | */ |
17 | #include <linux/kernel.h> | 17 | #include <linux/kernel.h> |
18 | #include <linux/pci.h> | 18 | #include <linux/pci.h> |
19 | #include <linux/ptrace.h> | ||
20 | #include <linux/slab.h> | 19 | #include <linux/slab.h> |
21 | #include <linux/ioport.h> | 20 | #include <linux/ioport.h> |
22 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c index aa109f074dd9..19ca333240ec 100644 --- a/arch/arm/mm/alignment.c +++ b/arch/arm/mm/alignment.c | |||
@@ -15,7 +15,6 @@ | |||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/errno.h> | 16 | #include <linux/errno.h> |
17 | #include <linux/string.h> | 17 | #include <linux/string.h> |
18 | #include <linux/ptrace.h> | ||
19 | #include <linux/proc_fs.h> | 18 | #include <linux/proc_fs.h> |
20 | #include <linux/init.h> | 19 | #include <linux/init.h> |
21 | 20 | ||
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c index 9fd6d2eafb40..5d9ce7deb4a7 100644 --- a/arch/arm/mm/fault.c +++ b/arch/arm/mm/fault.c | |||
@@ -10,7 +10,6 @@ | |||
10 | */ | 10 | */ |
11 | #include <linux/module.h> | 11 | #include <linux/module.h> |
12 | #include <linux/signal.h> | 12 | #include <linux/signal.h> |
13 | #include <linux/ptrace.h> | ||
14 | #include <linux/mm.h> | 13 | #include <linux/mm.h> |
15 | #include <linux/init.h> | 14 | #include <linux/init.h> |
16 | 15 | ||
@@ -438,7 +437,7 @@ hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *) | |||
438 | /* | 437 | /* |
439 | * Dispatch a data abort to the relevant handler. | 438 | * Dispatch a data abort to the relevant handler. |
440 | */ | 439 | */ |
441 | asmlinkage void | 440 | asmlinkage void __exception |
442 | do_DataAbort(unsigned long addr, unsigned int fsr, struct pt_regs *regs) | 441 | do_DataAbort(unsigned long addr, unsigned int fsr, struct pt_regs *regs) |
443 | { | 442 | { |
444 | const struct fsr_info *inf = fsr_info + (fsr & 15) + ((fsr & (1 << 10)) >> 6); | 443 | const struct fsr_info *inf = fsr_info + (fsr & 15) + ((fsr & (1 << 10)) >> 6); |
@@ -457,7 +456,7 @@ do_DataAbort(unsigned long addr, unsigned int fsr, struct pt_regs *regs) | |||
457 | notify_die("", regs, &info, fsr, 0); | 456 | notify_die("", regs, &info, fsr, 0); |
458 | } | 457 | } |
459 | 458 | ||
460 | asmlinkage void | 459 | asmlinkage void __exception |
461 | do_PrefetchAbort(unsigned long addr, struct pt_regs *regs) | 460 | do_PrefetchAbort(unsigned long addr, struct pt_regs *regs) |
462 | { | 461 | { |
463 | do_translation_fault(addr, 0, regs); | 462 | do_translation_fault(addr, 0, regs); |
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 7760193e74cc..c0ad7c0fbae0 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c | |||
@@ -9,7 +9,6 @@ | |||
9 | */ | 9 | */ |
10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
11 | #include <linux/errno.h> | 11 | #include <linux/errno.h> |
12 | #include <linux/ptrace.h> | ||
13 | #include <linux/swap.h> | 12 | #include <linux/swap.h> |
14 | #include <linux/init.h> | 13 | #include <linux/init.h> |
15 | #include <linux/bootmem.h> | 14 | #include <linux/bootmem.h> |
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index 0ac615c0f798..d6167ad4e011 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c | |||
@@ -32,6 +32,9 @@ | |||
32 | #include <asm/tlbflush.h> | 32 | #include <asm/tlbflush.h> |
33 | #include <asm/sizes.h> | 33 | #include <asm/sizes.h> |
34 | 34 | ||
35 | #include <asm/mach/map.h> | ||
36 | #include "mm.h" | ||
37 | |||
35 | /* | 38 | /* |
36 | * Used by ioremap() and iounmap() code to mark (super)section-mapped | 39 | * Used by ioremap() and iounmap() code to mark (super)section-mapped |
37 | * I/O regions in vm_struct->flags field. | 40 | * I/O regions in vm_struct->flags field. |
@@ -39,8 +42,9 @@ | |||
39 | #define VM_ARM_SECTION_MAPPING 0x80000000 | 42 | #define VM_ARM_SECTION_MAPPING 0x80000000 |
40 | 43 | ||
41 | static int remap_area_pte(pmd_t *pmd, unsigned long addr, unsigned long end, | 44 | static int remap_area_pte(pmd_t *pmd, unsigned long addr, unsigned long end, |
42 | unsigned long phys_addr, pgprot_t prot) | 45 | unsigned long phys_addr, const struct mem_type *type) |
43 | { | 46 | { |
47 | pgprot_t prot = __pgprot(type->prot_pte); | ||
44 | pte_t *pte; | 48 | pte_t *pte; |
45 | 49 | ||
46 | pte = pte_alloc_kernel(pmd, addr); | 50 | pte = pte_alloc_kernel(pmd, addr); |
@@ -51,7 +55,8 @@ static int remap_area_pte(pmd_t *pmd, unsigned long addr, unsigned long end, | |||
51 | if (!pte_none(*pte)) | 55 | if (!pte_none(*pte)) |
52 | goto bad; | 56 | goto bad; |
53 | 57 | ||
54 | set_pte_ext(pte, pfn_pte(phys_addr >> PAGE_SHIFT, prot), 0); | 58 | set_pte_ext(pte, pfn_pte(phys_addr >> PAGE_SHIFT, prot), |
59 | type->prot_pte_ext); | ||
55 | phys_addr += PAGE_SIZE; | 60 | phys_addr += PAGE_SIZE; |
56 | } while (pte++, addr += PAGE_SIZE, addr != end); | 61 | } while (pte++, addr += PAGE_SIZE, addr != end); |
57 | return 0; | 62 | return 0; |
@@ -63,7 +68,7 @@ static int remap_area_pte(pmd_t *pmd, unsigned long addr, unsigned long end, | |||
63 | 68 | ||
64 | static inline int remap_area_pmd(pgd_t *pgd, unsigned long addr, | 69 | static inline int remap_area_pmd(pgd_t *pgd, unsigned long addr, |
65 | unsigned long end, unsigned long phys_addr, | 70 | unsigned long end, unsigned long phys_addr, |
66 | pgprot_t prot) | 71 | const struct mem_type *type) |
67 | { | 72 | { |
68 | unsigned long next; | 73 | unsigned long next; |
69 | pmd_t *pmd; | 74 | pmd_t *pmd; |
@@ -75,7 +80,7 @@ static inline int remap_area_pmd(pgd_t *pgd, unsigned long addr, | |||
75 | 80 | ||
76 | do { | 81 | do { |
77 | next = pmd_addr_end(addr, end); | 82 | next = pmd_addr_end(addr, end); |
78 | ret = remap_area_pte(pmd, addr, next, phys_addr, prot); | 83 | ret = remap_area_pte(pmd, addr, next, phys_addr, type); |
79 | if (ret) | 84 | if (ret) |
80 | return ret; | 85 | return ret; |
81 | phys_addr += next - addr; | 86 | phys_addr += next - addr; |
@@ -84,13 +89,11 @@ static inline int remap_area_pmd(pgd_t *pgd, unsigned long addr, | |||
84 | } | 89 | } |
85 | 90 | ||
86 | static int remap_area_pages(unsigned long start, unsigned long pfn, | 91 | static int remap_area_pages(unsigned long start, unsigned long pfn, |
87 | unsigned long size, unsigned long flags) | 92 | size_t size, const struct mem_type *type) |
88 | { | 93 | { |
89 | unsigned long addr = start; | 94 | unsigned long addr = start; |
90 | unsigned long next, end = start + size; | 95 | unsigned long next, end = start + size; |
91 | unsigned long phys_addr = __pfn_to_phys(pfn); | 96 | unsigned long phys_addr = __pfn_to_phys(pfn); |
92 | pgprot_t prot = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | | ||
93 | L_PTE_DIRTY | L_PTE_WRITE | flags); | ||
94 | pgd_t *pgd; | 97 | pgd_t *pgd; |
95 | int err = 0; | 98 | int err = 0; |
96 | 99 | ||
@@ -98,7 +101,7 @@ static int remap_area_pages(unsigned long start, unsigned long pfn, | |||
98 | pgd = pgd_offset_k(addr); | 101 | pgd = pgd_offset_k(addr); |
99 | do { | 102 | do { |
100 | next = pgd_addr_end(addr, end); | 103 | next = pgd_addr_end(addr, end); |
101 | err = remap_area_pmd(pgd, addr, next, phys_addr, prot); | 104 | err = remap_area_pmd(pgd, addr, next, phys_addr, type); |
102 | if (err) | 105 | if (err) |
103 | break; | 106 | break; |
104 | phys_addr += next - addr; | 107 | phys_addr += next - addr; |
@@ -178,9 +181,9 @@ static void unmap_area_sections(unsigned long virt, unsigned long size) | |||
178 | 181 | ||
179 | static int | 182 | static int |
180 | remap_area_sections(unsigned long virt, unsigned long pfn, | 183 | remap_area_sections(unsigned long virt, unsigned long pfn, |
181 | unsigned long size, unsigned long flags) | 184 | size_t size, const struct mem_type *type) |
182 | { | 185 | { |
183 | unsigned long prot, addr = virt, end = virt + size; | 186 | unsigned long addr = virt, end = virt + size; |
184 | pgd_t *pgd; | 187 | pgd_t *pgd; |
185 | 188 | ||
186 | /* | 189 | /* |
@@ -189,23 +192,13 @@ remap_area_sections(unsigned long virt, unsigned long pfn, | |||
189 | */ | 192 | */ |
190 | unmap_area_sections(virt, size); | 193 | unmap_area_sections(virt, size); |
191 | 194 | ||
192 | prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO) | | ||
193 | (flags & (L_PTE_CACHEABLE | L_PTE_BUFFERABLE)); | ||
194 | |||
195 | /* | ||
196 | * ARMv6 and above need XN set to prevent speculative prefetches | ||
197 | * hitting IO. | ||
198 | */ | ||
199 | if (cpu_architecture() >= CPU_ARCH_ARMv6) | ||
200 | prot |= PMD_SECT_XN; | ||
201 | |||
202 | pgd = pgd_offset_k(addr); | 195 | pgd = pgd_offset_k(addr); |
203 | do { | 196 | do { |
204 | pmd_t *pmd = pmd_offset(pgd, addr); | 197 | pmd_t *pmd = pmd_offset(pgd, addr); |
205 | 198 | ||
206 | pmd[0] = __pmd(__pfn_to_phys(pfn) | prot); | 199 | pmd[0] = __pmd(__pfn_to_phys(pfn) | type->prot_sect); |
207 | pfn += SZ_1M >> PAGE_SHIFT; | 200 | pfn += SZ_1M >> PAGE_SHIFT; |
208 | pmd[1] = __pmd(__pfn_to_phys(pfn) | prot); | 201 | pmd[1] = __pmd(__pfn_to_phys(pfn) | type->prot_sect); |
209 | pfn += SZ_1M >> PAGE_SHIFT; | 202 | pfn += SZ_1M >> PAGE_SHIFT; |
210 | flush_pmd_entry(pmd); | 203 | flush_pmd_entry(pmd); |
211 | 204 | ||
@@ -218,9 +211,9 @@ remap_area_sections(unsigned long virt, unsigned long pfn, | |||
218 | 211 | ||
219 | static int | 212 | static int |
220 | remap_area_supersections(unsigned long virt, unsigned long pfn, | 213 | remap_area_supersections(unsigned long virt, unsigned long pfn, |
221 | unsigned long size, unsigned long flags) | 214 | size_t size, const struct mem_type *type) |
222 | { | 215 | { |
223 | unsigned long prot, addr = virt, end = virt + size; | 216 | unsigned long addr = virt, end = virt + size; |
224 | pgd_t *pgd; | 217 | pgd_t *pgd; |
225 | 218 | ||
226 | /* | 219 | /* |
@@ -229,22 +222,12 @@ remap_area_supersections(unsigned long virt, unsigned long pfn, | |||
229 | */ | 222 | */ |
230 | unmap_area_sections(virt, size); | 223 | unmap_area_sections(virt, size); |
231 | 224 | ||
232 | prot = PMD_TYPE_SECT | PMD_SECT_SUPER | PMD_SECT_AP_WRITE | | ||
233 | PMD_DOMAIN(DOMAIN_IO) | | ||
234 | (flags & (L_PTE_CACHEABLE | L_PTE_BUFFERABLE)); | ||
235 | |||
236 | /* | ||
237 | * ARMv6 and above need XN set to prevent speculative prefetches | ||
238 | * hitting IO. | ||
239 | */ | ||
240 | if (cpu_architecture() >= CPU_ARCH_ARMv6) | ||
241 | prot |= PMD_SECT_XN; | ||
242 | |||
243 | pgd = pgd_offset_k(virt); | 225 | pgd = pgd_offset_k(virt); |
244 | do { | 226 | do { |
245 | unsigned long super_pmd_val, i; | 227 | unsigned long super_pmd_val, i; |
246 | 228 | ||
247 | super_pmd_val = __pfn_to_phys(pfn) | prot; | 229 | super_pmd_val = __pfn_to_phys(pfn) | type->prot_sect | |
230 | PMD_SECT_SUPER; | ||
248 | super_pmd_val |= ((pfn >> (32 - PAGE_SHIFT)) & 0xf) << 20; | 231 | super_pmd_val |= ((pfn >> (32 - PAGE_SHIFT)) & 0xf) << 20; |
249 | 232 | ||
250 | for (i = 0; i < 8; i++) { | 233 | for (i = 0; i < 8; i++) { |
@@ -279,9 +262,10 @@ remap_area_supersections(unsigned long virt, unsigned long pfn, | |||
279 | * mapping. See include/asm-arm/proc-armv/pgtable.h for more information. | 262 | * mapping. See include/asm-arm/proc-armv/pgtable.h for more information. |
280 | */ | 263 | */ |
281 | void __iomem * | 264 | void __iomem * |
282 | __ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size, | 265 | __arm_ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size, |
283 | unsigned long flags) | 266 | unsigned int mtype) |
284 | { | 267 | { |
268 | const struct mem_type *type; | ||
285 | int err; | 269 | int err; |
286 | unsigned long addr; | 270 | unsigned long addr; |
287 | struct vm_struct * area; | 271 | struct vm_struct * area; |
@@ -292,6 +276,10 @@ __ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size, | |||
292 | if (pfn >= 0x100000 && (__pfn_to_phys(pfn) & ~SUPERSECTION_MASK)) | 276 | if (pfn >= 0x100000 && (__pfn_to_phys(pfn) & ~SUPERSECTION_MASK)) |
293 | return NULL; | 277 | return NULL; |
294 | 278 | ||
279 | type = get_mem_type(mtype); | ||
280 | if (!type) | ||
281 | return NULL; | ||
282 | |||
295 | size = PAGE_ALIGN(size); | 283 | size = PAGE_ALIGN(size); |
296 | 284 | ||
297 | area = get_vm_area(size, VM_IOREMAP); | 285 | area = get_vm_area(size, VM_IOREMAP); |
@@ -302,16 +290,16 @@ __ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size, | |||
302 | #ifndef CONFIG_SMP | 290 | #ifndef CONFIG_SMP |
303 | if (DOMAIN_IO == 0 && | 291 | if (DOMAIN_IO == 0 && |
304 | (((cpu_architecture() >= CPU_ARCH_ARMv6) && (get_cr() & CR_XP)) || | 292 | (((cpu_architecture() >= CPU_ARCH_ARMv6) && (get_cr() & CR_XP)) || |
305 | cpu_is_xsc3()) && | 293 | cpu_is_xsc3()) && pfn >= 0x100000 && |
306 | !((__pfn_to_phys(pfn) | size | addr) & ~SUPERSECTION_MASK)) { | 294 | !((__pfn_to_phys(pfn) | size | addr) & ~SUPERSECTION_MASK)) { |
307 | area->flags |= VM_ARM_SECTION_MAPPING; | 295 | area->flags |= VM_ARM_SECTION_MAPPING; |
308 | err = remap_area_supersections(addr, pfn, size, flags); | 296 | err = remap_area_supersections(addr, pfn, size, type); |
309 | } else if (!((__pfn_to_phys(pfn) | size | addr) & ~PMD_MASK)) { | 297 | } else if (!((__pfn_to_phys(pfn) | size | addr) & ~PMD_MASK)) { |
310 | area->flags |= VM_ARM_SECTION_MAPPING; | 298 | area->flags |= VM_ARM_SECTION_MAPPING; |
311 | err = remap_area_sections(addr, pfn, size, flags); | 299 | err = remap_area_sections(addr, pfn, size, type); |
312 | } else | 300 | } else |
313 | #endif | 301 | #endif |
314 | err = remap_area_pages(addr, pfn, size, flags); | 302 | err = remap_area_pages(addr, pfn, size, type); |
315 | 303 | ||
316 | if (err) { | 304 | if (err) { |
317 | vunmap((void *)addr); | 305 | vunmap((void *)addr); |
@@ -321,10 +309,10 @@ __ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size, | |||
321 | flush_cache_vmap(addr, addr + size); | 309 | flush_cache_vmap(addr, addr + size); |
322 | return (void __iomem *) (offset + addr); | 310 | return (void __iomem *) (offset + addr); |
323 | } | 311 | } |
324 | EXPORT_SYMBOL(__ioremap_pfn); | 312 | EXPORT_SYMBOL(__arm_ioremap_pfn); |
325 | 313 | ||
326 | void __iomem * | 314 | void __iomem * |
327 | __ioremap(unsigned long phys_addr, size_t size, unsigned long flags) | 315 | __arm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) |
328 | { | 316 | { |
329 | unsigned long last_addr; | 317 | unsigned long last_addr; |
330 | unsigned long offset = phys_addr & ~PAGE_MASK; | 318 | unsigned long offset = phys_addr & ~PAGE_MASK; |
@@ -342,9 +330,9 @@ __ioremap(unsigned long phys_addr, size_t size, unsigned long flags) | |||
342 | */ | 330 | */ |
343 | size = PAGE_ALIGN(last_addr + 1) - phys_addr; | 331 | size = PAGE_ALIGN(last_addr + 1) - phys_addr; |
344 | 332 | ||
345 | return __ioremap_pfn(pfn, offset, size, flags); | 333 | return __arm_ioremap_pfn(pfn, offset, size, mtype); |
346 | } | 334 | } |
347 | EXPORT_SYMBOL(__ioremap); | 335 | EXPORT_SYMBOL(__arm_ioremap); |
348 | 336 | ||
349 | void __iounmap(volatile void __iomem *addr) | 337 | void __iounmap(volatile void __iomem *addr) |
350 | { | 338 | { |
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h index a44e30970635..7647c597fc59 100644 --- a/arch/arm/mm/mm.h +++ b/arch/arm/mm/mm.h | |||
@@ -16,6 +16,16 @@ static inline pmd_t *pmd_off_k(unsigned long virt) | |||
16 | return pmd_off(pgd_offset_k(virt), virt); | 16 | return pmd_off(pgd_offset_k(virt), virt); |
17 | } | 17 | } |
18 | 18 | ||
19 | struct mem_type { | ||
20 | unsigned int prot_pte; | ||
21 | unsigned int prot_pte_ext; | ||
22 | unsigned int prot_l1; | ||
23 | unsigned int prot_sect; | ||
24 | unsigned int domain; | ||
25 | }; | ||
26 | |||
27 | const struct mem_type *get_mem_type(unsigned int type); | ||
28 | |||
19 | #endif | 29 | #endif |
20 | 30 | ||
21 | struct map_desc; | 31 | struct map_desc; |
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 94fd4bf5cb9e..2ba1530d1ce1 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c | |||
@@ -176,28 +176,42 @@ void adjust_cr(unsigned long mask, unsigned long set) | |||
176 | } | 176 | } |
177 | #endif | 177 | #endif |
178 | 178 | ||
179 | struct mem_types { | 179 | #define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_WRITE |
180 | unsigned int prot_pte; | 180 | #define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_XN|PMD_SECT_AP_WRITE |
181 | unsigned int prot_l1; | 181 | |
182 | unsigned int prot_sect; | 182 | static struct mem_type mem_types[] = { |
183 | unsigned int domain; | 183 | [MT_DEVICE] = { /* Strongly ordered / ARMv6 shared device */ |
184 | }; | 184 | .prot_pte = PROT_PTE_DEVICE, |
185 | 185 | .prot_l1 = PMD_TYPE_TABLE, | |
186 | static struct mem_types mem_types[] __initdata = { | 186 | .prot_sect = PROT_SECT_DEVICE | PMD_SECT_UNCACHED, |
187 | [MT_DEVICE] = { | 187 | .domain = DOMAIN_IO, |
188 | .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | | 188 | }, |
189 | L_PTE_WRITE, | 189 | [MT_DEVICE_NONSHARED] = { /* ARMv6 non-shared device */ |
190 | .prot_l1 = PMD_TYPE_TABLE, | 190 | .prot_pte = PROT_PTE_DEVICE, |
191 | .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_UNCACHED | | 191 | .prot_pte_ext = PTE_EXT_TEX(2), |
192 | PMD_SECT_AP_WRITE, | 192 | .prot_l1 = PMD_TYPE_TABLE, |
193 | .domain = DOMAIN_IO, | 193 | .prot_sect = PROT_SECT_DEVICE | PMD_SECT_TEX(2), |
194 | .domain = DOMAIN_IO, | ||
195 | }, | ||
196 | [MT_DEVICE_CACHED] = { /* ioremap_cached */ | ||
197 | .prot_pte = PROT_PTE_DEVICE | L_PTE_CACHEABLE | L_PTE_BUFFERABLE, | ||
198 | .prot_l1 = PMD_TYPE_TABLE, | ||
199 | .prot_sect = PROT_SECT_DEVICE | PMD_SECT_WB, | ||
200 | .domain = DOMAIN_IO, | ||
201 | }, | ||
202 | [MT_DEVICE_IXP2000] = { /* IXP2400 requires XCB=101 for on-chip I/O */ | ||
203 | .prot_pte = PROT_PTE_DEVICE, | ||
204 | .prot_l1 = PMD_TYPE_TABLE, | ||
205 | .prot_sect = PROT_SECT_DEVICE | PMD_SECT_BUFFERABLE | | ||
206 | PMD_SECT_TEX(1), | ||
207 | .domain = DOMAIN_IO, | ||
194 | }, | 208 | }, |
195 | [MT_CACHECLEAN] = { | 209 | [MT_CACHECLEAN] = { |
196 | .prot_sect = PMD_TYPE_SECT | PMD_BIT4, | 210 | .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN, |
197 | .domain = DOMAIN_KERNEL, | 211 | .domain = DOMAIN_KERNEL, |
198 | }, | 212 | }, |
199 | [MT_MINICLEAN] = { | 213 | [MT_MINICLEAN] = { |
200 | .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_MINICACHE, | 214 | .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_MINICACHE, |
201 | .domain = DOMAIN_KERNEL, | 215 | .domain = DOMAIN_KERNEL, |
202 | }, | 216 | }, |
203 | [MT_LOW_VECTORS] = { | 217 | [MT_LOW_VECTORS] = { |
@@ -213,30 +227,20 @@ static struct mem_types mem_types[] __initdata = { | |||
213 | .domain = DOMAIN_USER, | 227 | .domain = DOMAIN_USER, |
214 | }, | 228 | }, |
215 | [MT_MEMORY] = { | 229 | [MT_MEMORY] = { |
216 | .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_AP_WRITE, | 230 | .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE, |
217 | .domain = DOMAIN_KERNEL, | 231 | .domain = DOMAIN_KERNEL, |
218 | }, | 232 | }, |
219 | [MT_ROM] = { | 233 | [MT_ROM] = { |
220 | .prot_sect = PMD_TYPE_SECT | PMD_BIT4, | 234 | .prot_sect = PMD_TYPE_SECT, |
221 | .domain = DOMAIN_KERNEL, | 235 | .domain = DOMAIN_KERNEL, |
222 | }, | 236 | }, |
223 | [MT_IXP2000_DEVICE] = { /* IXP2400 requires XCB=101 for on-chip I/O */ | ||
224 | .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | | ||
225 | L_PTE_WRITE, | ||
226 | .prot_l1 = PMD_TYPE_TABLE, | ||
227 | .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_UNCACHED | | ||
228 | PMD_SECT_AP_WRITE | PMD_SECT_BUFFERABLE | | ||
229 | PMD_SECT_TEX(1), | ||
230 | .domain = DOMAIN_IO, | ||
231 | }, | ||
232 | [MT_NONSHARED_DEVICE] = { | ||
233 | .prot_l1 = PMD_TYPE_TABLE, | ||
234 | .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_NONSHARED_DEV | | ||
235 | PMD_SECT_AP_WRITE, | ||
236 | .domain = DOMAIN_IO, | ||
237 | } | ||
238 | }; | 237 | }; |
239 | 238 | ||
239 | const struct mem_type *get_mem_type(unsigned int type) | ||
240 | { | ||
241 | return type < ARRAY_SIZE(mem_types) ? &mem_types[type] : NULL; | ||
242 | } | ||
243 | |||
240 | /* | 244 | /* |
241 | * Adjust the PMD section entries according to the CPU in use. | 245 | * Adjust the PMD section entries according to the CPU in use. |
242 | */ | 246 | */ |
@@ -262,20 +266,23 @@ static void __init build_mem_type_table(void) | |||
262 | } | 266 | } |
263 | 267 | ||
264 | /* | 268 | /* |
265 | * Xscale must not have PMD bit 4 set for section mappings. | 269 | * ARMv5 and lower, bit 4 must be set for page tables. |
270 | * (was: cache "update-able on write" bit on ARM610) | ||
271 | * However, Xscale cores require this bit to be cleared. | ||
266 | */ | 272 | */ |
267 | if (cpu_is_xscale()) | 273 | if (cpu_is_xscale()) { |
268 | for (i = 0; i < ARRAY_SIZE(mem_types); i++) | 274 | for (i = 0; i < ARRAY_SIZE(mem_types); i++) { |
269 | mem_types[i].prot_sect &= ~PMD_BIT4; | 275 | mem_types[i].prot_sect &= ~PMD_BIT4; |
270 | 276 | mem_types[i].prot_l1 &= ~PMD_BIT4; | |
271 | /* | 277 | } |
272 | * ARMv5 and lower, excluding Xscale, bit 4 must be set for | 278 | } else if (cpu_arch < CPU_ARCH_ARMv6) { |
273 | * page tables. | 279 | for (i = 0; i < ARRAY_SIZE(mem_types); i++) { |
274 | */ | ||
275 | if (cpu_arch < CPU_ARCH_ARMv6 && !cpu_is_xscale()) | ||
276 | for (i = 0; i < ARRAY_SIZE(mem_types); i++) | ||
277 | if (mem_types[i].prot_l1) | 280 | if (mem_types[i].prot_l1) |
278 | mem_types[i].prot_l1 |= PMD_BIT4; | 281 | mem_types[i].prot_l1 |= PMD_BIT4; |
282 | if (mem_types[i].prot_sect) | ||
283 | mem_types[i].prot_sect |= PMD_BIT4; | ||
284 | } | ||
285 | } | ||
279 | 286 | ||
280 | cp = &cache_policies[cachepolicy]; | 287 | cp = &cache_policies[cachepolicy]; |
281 | kern_pgprot = user_pgprot = cp->pte; | 288 | kern_pgprot = user_pgprot = cp->pte; |
@@ -296,13 +303,6 @@ static void __init build_mem_type_table(void) | |||
296 | */ | 303 | */ |
297 | if (cpu_arch >= CPU_ARCH_ARMv6 && (cr & CR_XP)) { | 304 | if (cpu_arch >= CPU_ARCH_ARMv6 && (cr & CR_XP)) { |
298 | /* | 305 | /* |
299 | * bit 4 becomes XN which we must clear for the | ||
300 | * kernel memory mapping. | ||
301 | */ | ||
302 | mem_types[MT_MEMORY].prot_sect &= ~PMD_SECT_XN; | ||
303 | mem_types[MT_ROM].prot_sect &= ~PMD_SECT_XN; | ||
304 | |||
305 | /* | ||
306 | * Mark cache clean areas and XIP ROM read only | 306 | * Mark cache clean areas and XIP ROM read only |
307 | * from SVC mode and no access from userspace. | 307 | * from SVC mode and no access from userspace. |
308 | */ | 308 | */ |
@@ -368,64 +368,126 @@ static void __init build_mem_type_table(void) | |||
368 | } | 368 | } |
369 | printk("Memory policy: ECC %sabled, Data cache %s\n", | 369 | printk("Memory policy: ECC %sabled, Data cache %s\n", |
370 | ecc_mask ? "en" : "dis", cp->policy); | 370 | ecc_mask ? "en" : "dis", cp->policy); |
371 | |||
372 | for (i = 0; i < ARRAY_SIZE(mem_types); i++) { | ||
373 | struct mem_type *t = &mem_types[i]; | ||
374 | if (t->prot_l1) | ||
375 | t->prot_l1 |= PMD_DOMAIN(t->domain); | ||
376 | if (t->prot_sect) | ||
377 | t->prot_sect |= PMD_DOMAIN(t->domain); | ||
378 | } | ||
371 | } | 379 | } |
372 | 380 | ||
373 | #define vectors_base() (vectors_high() ? 0xffff0000 : 0) | 381 | #define vectors_base() (vectors_high() ? 0xffff0000 : 0) |
374 | 382 | ||
375 | /* | 383 | static void __init alloc_init_pte(pmd_t *pmd, unsigned long addr, |
376 | * Create a SECTION PGD between VIRT and PHYS in domain | 384 | unsigned long end, unsigned long pfn, |
377 | * DOMAIN with protection PROT. This operates on half- | 385 | const struct mem_type *type) |
378 | * pgdir entry increments. | ||
379 | */ | ||
380 | static inline void | ||
381 | alloc_init_section(unsigned long virt, unsigned long phys, int prot) | ||
382 | { | 386 | { |
383 | pmd_t *pmdp = pmd_off_k(virt); | 387 | pte_t *pte; |
384 | 388 | ||
385 | if (virt & (1 << 20)) | 389 | if (pmd_none(*pmd)) { |
386 | pmdp++; | 390 | pte = alloc_bootmem_low_pages(2 * PTRS_PER_PTE * sizeof(pte_t)); |
391 | __pmd_populate(pmd, __pa(pte) | type->prot_l1); | ||
392 | } | ||
387 | 393 | ||
388 | *pmdp = __pmd(phys | prot); | 394 | pte = pte_offset_kernel(pmd, addr); |
389 | flush_pmd_entry(pmdp); | 395 | do { |
396 | set_pte_ext(pte, pfn_pte(pfn, __pgprot(type->prot_pte)), | ||
397 | type->prot_pte_ext); | ||
398 | pfn++; | ||
399 | } while (pte++, addr += PAGE_SIZE, addr != end); | ||
390 | } | 400 | } |
391 | 401 | ||
392 | /* | 402 | static void __init alloc_init_section(pgd_t *pgd, unsigned long addr, |
393 | * Create a SUPER SECTION PGD between VIRT and PHYS with protection PROT | 403 | unsigned long end, unsigned long phys, |
394 | */ | 404 | const struct mem_type *type) |
395 | static inline void | ||
396 | alloc_init_supersection(unsigned long virt, unsigned long phys, int prot) | ||
397 | { | 405 | { |
398 | int i; | 406 | pmd_t *pmd = pmd_offset(pgd, addr); |
407 | |||
408 | /* | ||
409 | * Try a section mapping - end, addr and phys must all be aligned | ||
410 | * to a section boundary. Note that PMDs refer to the individual | ||
411 | * L1 entries, whereas PGDs refer to a group of L1 entries making | ||
412 | * up one logical pointer to an L2 table. | ||
413 | */ | ||
414 | if (((addr | end | phys) & ~SECTION_MASK) == 0) { | ||
415 | pmd_t *p = pmd; | ||
416 | |||
417 | if (addr & SECTION_SIZE) | ||
418 | pmd++; | ||
399 | 419 | ||
400 | for (i = 0; i < 16; i += 1) { | 420 | do { |
401 | alloc_init_section(virt, phys, prot | PMD_SECT_SUPER); | 421 | *pmd = __pmd(phys | type->prot_sect); |
422 | phys += SECTION_SIZE; | ||
423 | } while (pmd++, addr += SECTION_SIZE, addr != end); | ||
402 | 424 | ||
403 | virt += (PGDIR_SIZE / 2); | 425 | flush_pmd_entry(p); |
426 | } else { | ||
427 | /* | ||
428 | * No need to loop; pte's aren't interested in the | ||
429 | * individual L1 entries. | ||
430 | */ | ||
431 | alloc_init_pte(pmd, addr, end, __phys_to_pfn(phys), type); | ||
404 | } | 432 | } |
405 | } | 433 | } |
406 | 434 | ||
407 | /* | 435 | static void __init create_36bit_mapping(struct map_desc *md, |
408 | * Add a PAGE mapping between VIRT and PHYS in domain | 436 | const struct mem_type *type) |
409 | * DOMAIN with protection PROT. Note that due to the | ||
410 | * way we map the PTEs, we must allocate two PTE_SIZE'd | ||
411 | * blocks - one for the Linux pte table, and one for | ||
412 | * the hardware pte table. | ||
413 | */ | ||
414 | static inline void | ||
415 | alloc_init_page(unsigned long virt, unsigned long phys, unsigned int prot_l1, pgprot_t prot) | ||
416 | { | 437 | { |
417 | pmd_t *pmdp = pmd_off_k(virt); | 438 | unsigned long phys, addr, length, end; |
418 | pte_t *ptep; | 439 | pgd_t *pgd; |
440 | |||
441 | addr = md->virtual; | ||
442 | phys = (unsigned long)__pfn_to_phys(md->pfn); | ||
443 | length = PAGE_ALIGN(md->length); | ||
444 | |||
445 | if (!(cpu_architecture() >= CPU_ARCH_ARMv6 || cpu_is_xsc3())) { | ||
446 | printk(KERN_ERR "MM: CPU does not support supersection " | ||
447 | "mapping for 0x%08llx at 0x%08lx\n", | ||
448 | __pfn_to_phys((u64)md->pfn), addr); | ||
449 | return; | ||
450 | } | ||
419 | 451 | ||
420 | if (pmd_none(*pmdp)) { | 452 | /* N.B. ARMv6 supersections are only defined to work with domain 0. |
421 | ptep = alloc_bootmem_low_pages(2 * PTRS_PER_PTE * | 453 | * Since domain assignments can in fact be arbitrary, the |
422 | sizeof(pte_t)); | 454 | * 'domain == 0' check below is required to insure that ARMv6 |
455 | * supersections are only allocated for domain 0 regardless | ||
456 | * of the actual domain assignments in use. | ||
457 | */ | ||
458 | if (type->domain) { | ||
459 | printk(KERN_ERR "MM: invalid domain in supersection " | ||
460 | "mapping for 0x%08llx at 0x%08lx\n", | ||
461 | __pfn_to_phys((u64)md->pfn), addr); | ||
462 | return; | ||
463 | } | ||
423 | 464 | ||
424 | __pmd_populate(pmdp, __pa(ptep) | prot_l1); | 465 | if ((addr | length | __pfn_to_phys(md->pfn)) & ~SUPERSECTION_MASK) { |
466 | printk(KERN_ERR "MM: cannot create mapping for " | ||
467 | "0x%08llx at 0x%08lx invalid alignment\n", | ||
468 | __pfn_to_phys((u64)md->pfn), addr); | ||
469 | return; | ||
425 | } | 470 | } |
426 | ptep = pte_offset_kernel(pmdp, virt); | ||
427 | 471 | ||
428 | set_pte_ext(ptep, pfn_pte(phys >> PAGE_SHIFT, prot), 0); | 472 | /* |
473 | * Shift bits [35:32] of address into bits [23:20] of PMD | ||
474 | * (See ARMv6 spec). | ||
475 | */ | ||
476 | phys |= (((md->pfn >> (32 - PAGE_SHIFT)) & 0xF) << 20); | ||
477 | |||
478 | pgd = pgd_offset_k(addr); | ||
479 | end = addr + length; | ||
480 | do { | ||
481 | pmd_t *pmd = pmd_offset(pgd, addr); | ||
482 | int i; | ||
483 | |||
484 | for (i = 0; i < 16; i++) | ||
485 | *pmd++ = __pmd(phys | type->prot_sect | PMD_SECT_SUPER); | ||
486 | |||
487 | addr += SUPERSECTION_SIZE; | ||
488 | phys += SUPERSECTION_SIZE; | ||
489 | pgd += SUPERSECTION_SIZE >> PGDIR_SHIFT; | ||
490 | } while (addr != end); | ||
429 | } | 491 | } |
430 | 492 | ||
431 | /* | 493 | /* |
@@ -437,10 +499,9 @@ alloc_init_page(unsigned long virt, unsigned long phys, unsigned int prot_l1, pg | |||
437 | */ | 499 | */ |
438 | void __init create_mapping(struct map_desc *md) | 500 | void __init create_mapping(struct map_desc *md) |
439 | { | 501 | { |
440 | unsigned long virt, length; | 502 | unsigned long phys, addr, length, end; |
441 | int prot_sect, prot_l1, domain; | 503 | const struct mem_type *type; |
442 | pgprot_t prot_pte; | 504 | pgd_t *pgd; |
443 | unsigned long off = (u32)__pfn_to_phys(md->pfn); | ||
444 | 505 | ||
445 | if (md->virtual != vectors_base() && md->virtual < TASK_SIZE) { | 506 | if (md->virtual != vectors_base() && md->virtual < TASK_SIZE) { |
446 | printk(KERN_WARNING "BUG: not creating mapping for " | 507 | printk(KERN_WARNING "BUG: not creating mapping for " |
@@ -456,105 +517,37 @@ void __init create_mapping(struct map_desc *md) | |||
456 | __pfn_to_phys((u64)md->pfn), md->virtual); | 517 | __pfn_to_phys((u64)md->pfn), md->virtual); |
457 | } | 518 | } |
458 | 519 | ||
459 | domain = mem_types[md->type].domain; | 520 | type = &mem_types[md->type]; |
460 | prot_pte = __pgprot(mem_types[md->type].prot_pte); | ||
461 | prot_l1 = mem_types[md->type].prot_l1 | PMD_DOMAIN(domain); | ||
462 | prot_sect = mem_types[md->type].prot_sect | PMD_DOMAIN(domain); | ||
463 | 521 | ||
464 | /* | 522 | /* |
465 | * Catch 36-bit addresses | 523 | * Catch 36-bit addresses |
466 | */ | 524 | */ |
467 | if(md->pfn >= 0x100000) { | 525 | if (md->pfn >= 0x100000) { |
468 | if(domain) { | 526 | create_36bit_mapping(md, type); |
469 | printk(KERN_ERR "MM: invalid domain in supersection " | 527 | return; |
470 | "mapping for 0x%08llx at 0x%08lx\n", | ||
471 | __pfn_to_phys((u64)md->pfn), md->virtual); | ||
472 | return; | ||
473 | } | ||
474 | if((md->virtual | md->length | __pfn_to_phys(md->pfn)) | ||
475 | & ~SUPERSECTION_MASK) { | ||
476 | printk(KERN_ERR "MM: cannot create mapping for " | ||
477 | "0x%08llx at 0x%08lx invalid alignment\n", | ||
478 | __pfn_to_phys((u64)md->pfn), md->virtual); | ||
479 | return; | ||
480 | } | ||
481 | |||
482 | /* | ||
483 | * Shift bits [35:32] of address into bits [23:20] of PMD | ||
484 | * (See ARMv6 spec). | ||
485 | */ | ||
486 | off |= (((md->pfn >> (32 - PAGE_SHIFT)) & 0xF) << 20); | ||
487 | } | 528 | } |
488 | 529 | ||
489 | virt = md->virtual; | 530 | addr = md->virtual; |
490 | off -= virt; | 531 | phys = (unsigned long)__pfn_to_phys(md->pfn); |
491 | length = md->length; | 532 | length = PAGE_ALIGN(md->length); |
492 | 533 | ||
493 | if (mem_types[md->type].prot_l1 == 0 && | 534 | if (type->prot_l1 == 0 && ((addr | phys | length) & ~SECTION_MASK)) { |
494 | (virt & 0xfffff || (virt + off) & 0xfffff || (virt + length) & 0xfffff)) { | ||
495 | printk(KERN_WARNING "BUG: map for 0x%08lx at 0x%08lx can not " | 535 | printk(KERN_WARNING "BUG: map for 0x%08lx at 0x%08lx can not " |
496 | "be mapped using pages, ignoring.\n", | 536 | "be mapped using pages, ignoring.\n", |
497 | __pfn_to_phys(md->pfn), md->virtual); | 537 | __pfn_to_phys(md->pfn), addr); |
498 | return; | 538 | return; |
499 | } | 539 | } |
500 | 540 | ||
501 | while ((virt & 0xfffff || (virt + off) & 0xfffff) && length >= PAGE_SIZE) { | 541 | pgd = pgd_offset_k(addr); |
502 | alloc_init_page(virt, virt + off, prot_l1, prot_pte); | 542 | end = addr + length; |
543 | do { | ||
544 | unsigned long next = pgd_addr_end(addr, end); | ||
503 | 545 | ||
504 | virt += PAGE_SIZE; | 546 | alloc_init_section(pgd, addr, next, phys, type); |
505 | length -= PAGE_SIZE; | ||
506 | } | ||
507 | |||
508 | /* N.B. ARMv6 supersections are only defined to work with domain 0. | ||
509 | * Since domain assignments can in fact be arbitrary, the | ||
510 | * 'domain == 0' check below is required to insure that ARMv6 | ||
511 | * supersections are only allocated for domain 0 regardless | ||
512 | * of the actual domain assignments in use. | ||
513 | */ | ||
514 | if ((cpu_architecture() >= CPU_ARCH_ARMv6 || cpu_is_xsc3()) | ||
515 | && domain == 0) { | ||
516 | /* | ||
517 | * Align to supersection boundary if !high pages. | ||
518 | * High pages have already been checked for proper | ||
519 | * alignment above and they will fail the SUPSERSECTION_MASK | ||
520 | * check because of the way the address is encoded into | ||
521 | * offset. | ||
522 | */ | ||
523 | if (md->pfn <= 0x100000) { | ||
524 | while ((virt & ~SUPERSECTION_MASK || | ||
525 | (virt + off) & ~SUPERSECTION_MASK) && | ||
526 | length >= (PGDIR_SIZE / 2)) { | ||
527 | alloc_init_section(virt, virt + off, prot_sect); | ||
528 | |||
529 | virt += (PGDIR_SIZE / 2); | ||
530 | length -= (PGDIR_SIZE / 2); | ||
531 | } | ||
532 | } | ||
533 | 547 | ||
534 | while (length >= SUPERSECTION_SIZE) { | 548 | phys += next - addr; |
535 | alloc_init_supersection(virt, virt + off, prot_sect); | 549 | addr = next; |
536 | 550 | } while (pgd++, addr != end); | |
537 | virt += SUPERSECTION_SIZE; | ||
538 | length -= SUPERSECTION_SIZE; | ||
539 | } | ||
540 | } | ||
541 | |||
542 | /* | ||
543 | * A section mapping covers half a "pgdir" entry. | ||
544 | */ | ||
545 | while (length >= (PGDIR_SIZE / 2)) { | ||
546 | alloc_init_section(virt, virt + off, prot_sect); | ||
547 | |||
548 | virt += (PGDIR_SIZE / 2); | ||
549 | length -= (PGDIR_SIZE / 2); | ||
550 | } | ||
551 | |||
552 | while (length >= PAGE_SIZE) { | ||
553 | alloc_init_page(virt, virt + off, prot_l1, prot_pte); | ||
554 | |||
555 | virt += PAGE_SIZE; | ||
556 | length -= PAGE_SIZE; | ||
557 | } | ||
558 | } | 551 | } |
559 | 552 | ||
560 | /* | 553 | /* |
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c index 05818fc0c705..8cd3a60954f0 100644 --- a/arch/arm/mm/nommu.c +++ b/arch/arm/mm/nommu.c | |||
@@ -62,21 +62,21 @@ void flush_dcache_page(struct page *page) | |||
62 | } | 62 | } |
63 | EXPORT_SYMBOL(flush_dcache_page); | 63 | EXPORT_SYMBOL(flush_dcache_page); |
64 | 64 | ||
65 | void __iomem *__ioremap_pfn(unsigned long pfn, unsigned long offset, | 65 | void __iomem *__arm_ioremap_pfn(unsigned long pfn, unsigned long offset, |
66 | size_t size, unsigned long flags) | 66 | size_t size, unsigned int mtype) |
67 | { | 67 | { |
68 | if (pfn >= (0x100000000ULL >> PAGE_SHIFT)) | 68 | if (pfn >= (0x100000000ULL >> PAGE_SHIFT)) |
69 | return NULL; | 69 | return NULL; |
70 | return (void __iomem *) (offset + (pfn << PAGE_SHIFT)); | 70 | return (void __iomem *) (offset + (pfn << PAGE_SHIFT)); |
71 | } | 71 | } |
72 | EXPORT_SYMBOL(__ioremap_pfn); | 72 | EXPORT_SYMBOL(__arm_ioremap_pfn); |
73 | 73 | ||
74 | void __iomem *__ioremap(unsigned long phys_addr, size_t size, | 74 | void __iomem *__arm_ioremap(unsigned long phys_addr, size_t size, |
75 | unsigned long flags) | 75 | unsigned int mtype) |
76 | { | 76 | { |
77 | return (void __iomem *)phys_addr; | 77 | return (void __iomem *)phys_addr; |
78 | } | 78 | } |
79 | EXPORT_SYMBOL(__ioremap); | 79 | EXPORT_SYMBOL(__arm_ioremap); |
80 | 80 | ||
81 | void __iounmap(volatile void __iomem *addr) | 81 | void __iounmap(volatile void __iomem *addr) |
82 | { | 82 | { |
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index d29fe927ee9e..c156ddab9a2d 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S | |||
@@ -584,6 +584,11 @@ cpu_ixp42x_name: | |||
584 | .asciz "XScale-IXP42x Family" | 584 | .asciz "XScale-IXP42x Family" |
585 | .size cpu_ixp42x_name, . - cpu_ixp42x_name | 585 | .size cpu_ixp42x_name, . - cpu_ixp42x_name |
586 | 586 | ||
587 | .type cpu_ixp43x_name, #object | ||
588 | cpu_ixp43x_name: | ||
589 | .asciz "XScale-IXP43x Family" | ||
590 | .size cpu_ixp43x_name, . - cpu_ixp43x_name | ||
591 | |||
587 | .type cpu_ixp46x_name, #object | 592 | .type cpu_ixp46x_name, #object |
588 | cpu_ixp46x_name: | 593 | cpu_ixp46x_name: |
589 | .asciz "XScale-IXP46x Family" | 594 | .asciz "XScale-IXP46x Family" |
@@ -843,6 +848,29 @@ __ixp42x_proc_info: | |||
843 | .long xscale_cache_fns | 848 | .long xscale_cache_fns |
844 | .size __ixp42x_proc_info, . - __ixp42x_proc_info | 849 | .size __ixp42x_proc_info, . - __ixp42x_proc_info |
845 | 850 | ||
851 | .type __ixp43x_proc_info, #object | ||
852 | __ixp43x_proc_info: | ||
853 | .long 0x69054040 | ||
854 | .long 0xfffffff0 | ||
855 | .long PMD_TYPE_SECT | \ | ||
856 | PMD_SECT_BUFFERABLE | \ | ||
857 | PMD_SECT_CACHEABLE | \ | ||
858 | PMD_SECT_AP_WRITE | \ | ||
859 | PMD_SECT_AP_READ | ||
860 | .long PMD_TYPE_SECT | \ | ||
861 | PMD_SECT_AP_WRITE | \ | ||
862 | PMD_SECT_AP_READ | ||
863 | b __xscale_setup | ||
864 | .long cpu_arch_name | ||
865 | .long cpu_elf_name | ||
866 | .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP | ||
867 | .long cpu_ixp43x_name | ||
868 | .long xscale_processor_functions | ||
869 | .long v4wbi_tlb_fns | ||
870 | .long xscale_mc_user_fns | ||
871 | .long xscale_cache_fns | ||
872 | .size __ixp43x_proc_info, . - __ixp43x_proc_info | ||
873 | |||
846 | .type __ixp46x_proc_info, #object | 874 | .type __ixp46x_proc_info, #object |
847 | __ixp46x_proc_info: | 875 | __ixp46x_proc_info: |
848 | .long 0x69054200 | 876 | .long 0x69054200 |
diff --git a/arch/arm/oprofile/backtrace.c b/arch/arm/oprofile/backtrace.c index 7c22c12618cc..f5ebf30151fa 100644 --- a/arch/arm/oprofile/backtrace.c +++ b/arch/arm/oprofile/backtrace.c | |||
@@ -19,6 +19,19 @@ | |||
19 | #include <asm/ptrace.h> | 19 | #include <asm/ptrace.h> |
20 | #include <asm/uaccess.h> | 20 | #include <asm/uaccess.h> |
21 | 21 | ||
22 | #include "../kernel/stacktrace.h" | ||
23 | |||
24 | static int report_trace(struct stackframe *frame, void *d) | ||
25 | { | ||
26 | unsigned int *depth = d; | ||
27 | |||
28 | if (*depth) { | ||
29 | oprofile_add_trace(frame->lr); | ||
30 | (*depth)--; | ||
31 | } | ||
32 | |||
33 | return *depth == 0; | ||
34 | } | ||
22 | 35 | ||
23 | /* | 36 | /* |
24 | * The registers we're interested in are at the end of the variable | 37 | * The registers we're interested in are at the end of the variable |
@@ -32,21 +45,6 @@ struct frame_tail { | |||
32 | unsigned long lr; | 45 | unsigned long lr; |
33 | } __attribute__((packed)); | 46 | } __attribute__((packed)); |
34 | 47 | ||
35 | |||
36 | #ifdef CONFIG_FRAME_POINTER | ||
37 | static struct frame_tail* kernel_backtrace(struct frame_tail *tail) | ||
38 | { | ||
39 | oprofile_add_trace(tail->lr); | ||
40 | |||
41 | /* frame pointers should strictly progress back up the stack | ||
42 | * (towards higher addresses) */ | ||
43 | if (tail >= tail->fp) | ||
44 | return NULL; | ||
45 | |||
46 | return tail->fp-1; | ||
47 | } | ||
48 | #endif | ||
49 | |||
50 | static struct frame_tail* user_backtrace(struct frame_tail *tail) | 48 | static struct frame_tail* user_backtrace(struct frame_tail *tail) |
51 | { | 49 | { |
52 | struct frame_tail buftail[2]; | 50 | struct frame_tail buftail[2]; |
@@ -67,47 +65,14 @@ static struct frame_tail* user_backtrace(struct frame_tail *tail) | |||
67 | return buftail[0].fp-1; | 65 | return buftail[0].fp-1; |
68 | } | 66 | } |
69 | 67 | ||
70 | /* | ||
71 | * | | /\ Higher addresses | ||
72 | * | | | ||
73 | * --------------- stack base (address of current_thread_info) | ||
74 | * | thread info | | ||
75 | * . . | ||
76 | * | stack | | ||
77 | * --------------- saved regs->ARM_fp value if valid (frame_tail address) | ||
78 | * . . | ||
79 | * --------------- struct pt_regs stored on stack (struct pt_regs *) | ||
80 | * | | | ||
81 | * . . | ||
82 | * | | | ||
83 | * --------------- %esp | ||
84 | * | | | ||
85 | * | | \/ Lower addresses | ||
86 | * | ||
87 | * Thus, &pt_regs <-> stack base restricts the valid(ish) fp values | ||
88 | */ | ||
89 | static int valid_kernel_stack(struct frame_tail *tail, struct pt_regs *regs) | ||
90 | { | ||
91 | unsigned long tailaddr = (unsigned long)tail; | ||
92 | unsigned long stack = (unsigned long)regs; | ||
93 | unsigned long stack_base = (stack & ~(THREAD_SIZE - 1)) + THREAD_SIZE; | ||
94 | |||
95 | return (tailaddr > stack) && (tailaddr < stack_base); | ||
96 | } | ||
97 | |||
98 | void arm_backtrace(struct pt_regs * const regs, unsigned int depth) | 68 | void arm_backtrace(struct pt_regs * const regs, unsigned int depth) |
99 | { | 69 | { |
100 | struct frame_tail *tail; | 70 | struct frame_tail *tail = ((struct frame_tail *) regs->ARM_fp) - 1; |
101 | |||
102 | tail = ((struct frame_tail *) regs->ARM_fp) - 1; | ||
103 | 71 | ||
104 | if (!user_mode(regs)) { | 72 | if (!user_mode(regs)) { |
105 | 73 | unsigned long base = ((unsigned long)regs) & ~(THREAD_SIZE - 1); | |
106 | #ifdef CONFIG_FRAME_POINTER | 74 | walk_stackframe(regs->ARM_fp, base, base + THREAD_SIZE, |
107 | while (depth-- && tail && valid_kernel_stack(tail, regs)) { | 75 | report_trace, &depth); |
108 | tail = kernel_backtrace(tail); | ||
109 | } | ||
110 | #endif | ||
111 | return; | 76 | return; |
112 | } | 77 | } |
113 | 78 | ||
diff --git a/arch/arm/plat-iop/io.c b/arch/arm/plat-iop/io.c index f7eccecf2e47..498675d028d0 100644 --- a/arch/arm/plat-iop/io.c +++ b/arch/arm/plat-iop/io.c | |||
@@ -22,7 +22,7 @@ | |||
22 | #include <asm/io.h> | 22 | #include <asm/io.h> |
23 | 23 | ||
24 | void * __iomem __iop3xx_ioremap(unsigned long cookie, size_t size, | 24 | void * __iomem __iop3xx_ioremap(unsigned long cookie, size_t size, |
25 | unsigned long flags) | 25 | unsigned int mtype) |
26 | { | 26 | { |
27 | void __iomem * retval; | 27 | void __iomem * retval; |
28 | 28 | ||
@@ -34,7 +34,7 @@ void * __iomem __iop3xx_ioremap(unsigned long cookie, size_t size, | |||
34 | retval = (void *) IOP3XX_PMMR_PHYS_TO_VIRT(cookie); | 34 | retval = (void *) IOP3XX_PMMR_PHYS_TO_VIRT(cookie); |
35 | break; | 35 | break; |
36 | default: | 36 | default: |
37 | retval = __ioremap(cookie, size, flags); | 37 | retval = __arm_ioremap(cookie, size, mtype); |
38 | } | 38 | } |
39 | 39 | ||
40 | return retval; | 40 | return retval; |
diff --git a/arch/arm/plat-iop/pci.c b/arch/arm/plat-iop/pci.c index b5f6ec35aafb..e2744b7227c5 100644 --- a/arch/arm/plat-iop/pci.c +++ b/arch/arm/plat-iop/pci.c | |||
@@ -55,7 +55,7 @@ static u32 iop3xx_cfg_address(struct pci_bus *bus, int devfn, int where) | |||
55 | * This routine checks the status of the last configuration cycle. If an error | 55 | * This routine checks the status of the last configuration cycle. If an error |
56 | * was detected it returns a 1, else it returns a 0. The errors being checked | 56 | * was detected it returns a 1, else it returns a 0. The errors being checked |
57 | * are parity, master abort, target abort (master and target). These types of | 57 | * are parity, master abort, target abort (master and target). These types of |
58 | * errors occure during a config cycle where there is no device, like during | 58 | * errors occur during a config cycle where there is no device, like during |
59 | * the discovery stage. | 59 | * the discovery stage. |
60 | */ | 60 | */ |
61 | static int iop3xx_pci_status(void) | 61 | static int iop3xx_pci_status(void) |
@@ -223,8 +223,111 @@ struct pci_bus *iop3xx_pci_scan_bus(int nr, struct pci_sys_data *sys) | |||
223 | return pci_scan_bus(sys->busnr, &iop3xx_ops, sys); | 223 | return pci_scan_bus(sys->busnr, &iop3xx_ops, sys); |
224 | } | 224 | } |
225 | 225 | ||
226 | void __init iop3xx_atu_setup(void) | ||
227 | { | ||
228 | /* BAR 0 ( Disabled ) */ | ||
229 | *IOP3XX_IAUBAR0 = 0x0; | ||
230 | *IOP3XX_IABAR0 = 0x0; | ||
231 | *IOP3XX_IATVR0 = 0x0; | ||
232 | *IOP3XX_IALR0 = 0x0; | ||
233 | |||
234 | /* BAR 1 ( Disabled ) */ | ||
235 | *IOP3XX_IAUBAR1 = 0x0; | ||
236 | *IOP3XX_IABAR1 = 0x0; | ||
237 | *IOP3XX_IALR1 = 0x0; | ||
238 | |||
239 | /* BAR 2 (1:1 mapping with Physical RAM) */ | ||
240 | /* Set limit and enable */ | ||
241 | *IOP3XX_IALR2 = ~((u32)IOP3XX_MAX_RAM_SIZE - 1) & ~0x1; | ||
242 | *IOP3XX_IAUBAR2 = 0x0; | ||
243 | |||
244 | /* Align the inbound bar with the base of memory */ | ||
245 | *IOP3XX_IABAR2 = PHYS_OFFSET | | ||
246 | PCI_BASE_ADDRESS_MEM_TYPE_64 | | ||
247 | PCI_BASE_ADDRESS_MEM_PREFETCH; | ||
248 | |||
249 | *IOP3XX_IATVR2 = PHYS_OFFSET; | ||
250 | |||
251 | /* Outbound window 0 */ | ||
252 | *IOP3XX_OMWTVR0 = IOP3XX_PCI_LOWER_MEM_PA; | ||
253 | *IOP3XX_OUMWTVR0 = 0; | ||
254 | |||
255 | /* Outbound window 1 */ | ||
256 | *IOP3XX_OMWTVR1 = IOP3XX_PCI_LOWER_MEM_PA + IOP3XX_PCI_MEM_WINDOW_SIZE; | ||
257 | *IOP3XX_OUMWTVR1 = 0; | ||
258 | |||
259 | /* BAR 3 ( Disabled ) */ | ||
260 | *IOP3XX_IAUBAR3 = 0x0; | ||
261 | *IOP3XX_IABAR3 = 0x0; | ||
262 | *IOP3XX_IATVR3 = 0x0; | ||
263 | *IOP3XX_IALR3 = 0x0; | ||
264 | |||
265 | /* Setup the I/O Bar | ||
266 | */ | ||
267 | *IOP3XX_OIOWTVR = IOP3XX_PCI_LOWER_IO_PA;; | ||
268 | |||
269 | /* Enable inbound and outbound cycles | ||
270 | */ | ||
271 | *IOP3XX_ATUCMD |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | | ||
272 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR; | ||
273 | *IOP3XX_ATUCR |= IOP3XX_ATUCR_OUT_EN; | ||
274 | } | ||
275 | |||
276 | void __init iop3xx_atu_disable(void) | ||
277 | { | ||
278 | *IOP3XX_ATUCMD = 0; | ||
279 | *IOP3XX_ATUCR = 0; | ||
280 | |||
281 | /* wait for cycles to quiesce */ | ||
282 | while (*IOP3XX_PCSR & (IOP3XX_PCSR_OUT_Q_BUSY | | ||
283 | IOP3XX_PCSR_IN_Q_BUSY)) | ||
284 | cpu_relax(); | ||
285 | |||
286 | /* BAR 0 ( Disabled ) */ | ||
287 | *IOP3XX_IAUBAR0 = 0x0; | ||
288 | *IOP3XX_IABAR0 = 0x0; | ||
289 | *IOP3XX_IATVR0 = 0x0; | ||
290 | *IOP3XX_IALR0 = 0x0; | ||
291 | |||
292 | /* BAR 1 ( Disabled ) */ | ||
293 | *IOP3XX_IAUBAR1 = 0x0; | ||
294 | *IOP3XX_IABAR1 = 0x0; | ||
295 | *IOP3XX_IALR1 = 0x0; | ||
296 | |||
297 | /* BAR 2 ( Disabled ) */ | ||
298 | *IOP3XX_IAUBAR2 = 0x0; | ||
299 | *IOP3XX_IABAR2 = 0x0; | ||
300 | *IOP3XX_IATVR2 = 0x0; | ||
301 | *IOP3XX_IALR2 = 0x0; | ||
302 | |||
303 | /* BAR 3 ( Disabled ) */ | ||
304 | *IOP3XX_IAUBAR3 = 0x0; | ||
305 | *IOP3XX_IABAR3 = 0x0; | ||
306 | *IOP3XX_IATVR3 = 0x0; | ||
307 | *IOP3XX_IALR3 = 0x0; | ||
308 | |||
309 | /* Clear the outbound windows */ | ||
310 | *IOP3XX_OIOWTVR = 0; | ||
311 | |||
312 | /* Outbound window 0 */ | ||
313 | *IOP3XX_OMWTVR0 = 0; | ||
314 | *IOP3XX_OUMWTVR0 = 0; | ||
315 | |||
316 | /* Outbound window 1 */ | ||
317 | *IOP3XX_OMWTVR1 = 0; | ||
318 | *IOP3XX_OUMWTVR1 = 0; | ||
319 | } | ||
320 | |||
321 | /* Flag to determine whether the ATU is initialized and the PCI bus scanned */ | ||
322 | int init_atu; | ||
323 | |||
226 | void iop3xx_pci_preinit(void) | 324 | void iop3xx_pci_preinit(void) |
227 | { | 325 | { |
326 | if (iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) { | ||
327 | iop3xx_atu_disable(); | ||
328 | iop3xx_atu_setup(); | ||
329 | } | ||
330 | |||
228 | DBG("PCI: Intel 803xx PCI init code.\n"); | 331 | DBG("PCI: Intel 803xx PCI init code.\n"); |
229 | DBG("ATU: IOP3XX_ATUCMD=0x%04x\n", *IOP3XX_ATUCMD); | 332 | DBG("ATU: IOP3XX_ATUCMD=0x%04x\n", *IOP3XX_ATUCMD); |
230 | DBG("ATU: IOP3XX_OMWTVR0=0x%04x, IOP3XX_OIOWTVR=0x%04x\n", | 333 | DBG("ATU: IOP3XX_OMWTVR0=0x%04x, IOP3XX_OIOWTVR=0x%04x\n", |
@@ -245,3 +348,38 @@ void iop3xx_pci_preinit(void) | |||
245 | 348 | ||
246 | hook_fault_code(16+6, iop3xx_pci_abort, SIGBUS, "imprecise external abort"); | 349 | hook_fault_code(16+6, iop3xx_pci_abort, SIGBUS, "imprecise external abort"); |
247 | } | 350 | } |
351 | |||
352 | /* allow init_atu to be user overridden */ | ||
353 | static int __init iop3xx_init_atu_setup(char *str) | ||
354 | { | ||
355 | init_atu = IOP3XX_INIT_ATU_DEFAULT; | ||
356 | if (str) { | ||
357 | while (*str != '\0') { | ||
358 | switch (*str) { | ||
359 | case 'y': | ||
360 | case 'Y': | ||
361 | init_atu = IOP3XX_INIT_ATU_ENABLE; | ||
362 | break; | ||
363 | case 'n': | ||
364 | case 'N': | ||
365 | init_atu = IOP3XX_INIT_ATU_DISABLE; | ||
366 | break; | ||
367 | case ',': | ||
368 | case '=': | ||
369 | break; | ||
370 | default: | ||
371 | printk(KERN_DEBUG "\"%s\" malformed at " | ||
372 | "character: \'%c\'", | ||
373 | __FUNCTION__, | ||
374 | *str); | ||
375 | *(str + 1) = '\0'; | ||
376 | } | ||
377 | str++; | ||
378 | } | ||
379 | } | ||
380 | |||
381 | return 1; | ||
382 | } | ||
383 | |||
384 | __setup("iop3xx_init_atu", iop3xx_init_atu_setup); | ||
385 | |||
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c index 16300adfb4de..0cc26da034a1 100644 --- a/arch/arm/plat-iop/time.c +++ b/arch/arm/plat-iop/time.c | |||
@@ -32,22 +32,22 @@ static unsigned long next_jiffy_time; | |||
32 | 32 | ||
33 | unsigned long iop_gettimeoffset(void) | 33 | unsigned long iop_gettimeoffset(void) |
34 | { | 34 | { |
35 | unsigned long offset, temp1, temp2; | 35 | unsigned long offset, temp; |
36 | 36 | ||
37 | /* enable cp6, if necessary, to avoid taking the overhead of an | 37 | /* enable cp6, if necessary, to avoid taking the overhead of an |
38 | * undefined instruction trap | 38 | * undefined instruction trap |
39 | */ | 39 | */ |
40 | asm volatile ( | 40 | asm volatile ( |
41 | "mrc p15, 0, %0, c15, c1, 0\n\t" | 41 | "mrc p15, 0, %0, c15, c1, 0\n\t" |
42 | "ands %1, %0, #(1 << 6)\n\t" | 42 | "tst %0, #(1 << 6)\n\t" |
43 | "orreq %0, %0, #(1 << 6)\n\t" | 43 | "orreq %0, %0, #(1 << 6)\n\t" |
44 | "mcreq p15, 0, %0, c15, c1, 0\n\t" | 44 | "mcreq p15, 0, %0, c15, c1, 0\n\t" |
45 | #ifdef CONFIG_XSCALE | 45 | #ifdef CONFIG_CPU_XSCALE |
46 | "mrceq p15, 0, %0, c15, c1, 0\n\t" | 46 | "mrceq p15, 0, %0, c15, c1, 0\n\t" |
47 | "moveq %0, %0\n\t" | 47 | "moveq %0, %0\n\t" |
48 | "subeq pc, pc, #4\n\t" | 48 | "subeq pc, pc, #4\n\t" |
49 | #endif | 49 | #endif |
50 | : "=r"(temp1), "=r"(temp2) : : "cc"); | 50 | : "=r"(temp) : : "cc"); |
51 | 51 | ||
52 | offset = next_jiffy_time - read_tcr1(); | 52 | offset = next_jiffy_time - read_tcr1(); |
53 | 53 | ||
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index f2dc363de66b..9e8d21eca4ec 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig | |||
@@ -11,6 +11,7 @@ choice | |||
11 | 11 | ||
12 | config ARCH_OMAP1 | 12 | config ARCH_OMAP1 |
13 | bool "TI OMAP1" | 13 | bool "TI OMAP1" |
14 | select GENERIC_CLOCKEVENTS | ||
14 | 15 | ||
15 | config ARCH_OMAP2 | 16 | config ARCH_OMAP2 |
16 | bool "TI OMAP2" | 17 | bool "TI OMAP2" |
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index 57b7b93674a4..fecd3d625995 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c | |||
@@ -156,3 +156,53 @@ static int __init omap_add_serial_console(void) | |||
156 | return add_preferred_console("ttyS", line, opt); | 156 | return add_preferred_console("ttyS", line, opt); |
157 | } | 157 | } |
158 | console_initcall(omap_add_serial_console); | 158 | console_initcall(omap_add_serial_console); |
159 | |||
160 | |||
161 | /* | ||
162 | * 32KHz clocksource ... always available, on pretty most chips except | ||
163 | * OMAP 730 and 1510. Other timers could be used as clocksources, with | ||
164 | * higher resolution in free-running counter modes (e.g. 12 MHz xtal), | ||
165 | * but systems won't necessarily want to spend resources that way. | ||
166 | */ | ||
167 | |||
168 | #if defined(CONFIG_ARCH_OMAP16XX) | ||
169 | #define TIMER_32K_SYNCHRONIZED 0xfffbc410 | ||
170 | #elif defined(CONFIG_ARCH_OMAP24XX) | ||
171 | #define TIMER_32K_SYNCHRONIZED 0x48004010 | ||
172 | #endif | ||
173 | |||
174 | #ifdef TIMER_32K_SYNCHRONIZED | ||
175 | |||
176 | #include <linux/clocksource.h> | ||
177 | |||
178 | static cycle_t omap_32k_read(void) | ||
179 | { | ||
180 | return omap_readl(TIMER_32K_SYNCHRONIZED); | ||
181 | } | ||
182 | |||
183 | static struct clocksource clocksource_32k = { | ||
184 | .name = "32k_counter", | ||
185 | .rating = 250, | ||
186 | .read = omap_32k_read, | ||
187 | .mask = CLOCKSOURCE_MASK(32), | ||
188 | .shift = 10, | ||
189 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
190 | }; | ||
191 | |||
192 | static int __init omap_init_clocksource_32k(void) | ||
193 | { | ||
194 | static char err[] __initdata = KERN_ERR | ||
195 | "%s: can't register clocksource!\n"; | ||
196 | |||
197 | if (cpu_is_omap16xx() || cpu_is_omap24xx()) { | ||
198 | clocksource_32k.mult = clocksource_hz2mult(32768, | ||
199 | clocksource_32k.shift); | ||
200 | |||
201 | if (clocksource_register(&clocksource_32k)) | ||
202 | printk(err, clocksource_32k.name); | ||
203 | } | ||
204 | return 0; | ||
205 | } | ||
206 | arch_initcall(omap_init_clocksource_32k); | ||
207 | |||
208 | #endif /* TIMER_32K_SYNCHRONIZED */ | ||
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c index dbc3f44e07a6..eeb33fed6f7c 100644 --- a/arch/arm/plat-omap/devices.c +++ b/arch/arm/plat-omap/devices.c | |||
@@ -429,6 +429,10 @@ static inline void omap_init_rng(void) {} | |||
429 | */ | 429 | */ |
430 | static int __init omap_init_devices(void) | 430 | static int __init omap_init_devices(void) |
431 | { | 431 | { |
432 | /* | ||
433 | * Need to enable relevant once for 2430 SDP | ||
434 | */ | ||
435 | #ifndef CONFIG_MACH_OMAP_2430SDP | ||
432 | /* please keep these calls, and their implementations above, | 436 | /* please keep these calls, and their implementations above, |
433 | * in alphabetical order so they're easier to sort through. | 437 | * in alphabetical order so they're easier to sort through. |
434 | */ | 438 | */ |
@@ -438,7 +442,7 @@ static int __init omap_init_devices(void) | |||
438 | omap_init_uwire(); | 442 | omap_init_uwire(); |
439 | omap_init_wdt(); | 443 | omap_init_wdt(); |
440 | omap_init_rng(); | 444 | omap_init_rng(); |
441 | 445 | #endif | |
442 | return 0; | 446 | return 0; |
443 | } | 447 | } |
444 | arch_initcall(omap_init_devices); | 448 | arch_initcall(omap_init_devices); |
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 45f0439bffba..659619f235ca 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c | |||
@@ -506,6 +506,8 @@ int omap_dm_timer_init(void) | |||
506 | BUG_ON(dm_source_clocks[i] == NULL); | 506 | BUG_ON(dm_source_clocks[i] == NULL); |
507 | } | 507 | } |
508 | #endif | 508 | #endif |
509 | if (cpu_is_omap243x()) | ||
510 | dm_timers[0].phys_base = 0x49018000; | ||
509 | 511 | ||
510 | for (i = 0; i < dm_timer_count; i++) { | 512 | for (i = 0; i < dm_timer_count; i++) { |
511 | #ifdef CONFIG_ARCH_OMAP2 | 513 | #ifdef CONFIG_ARCH_OMAP2 |
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index b8c01de208b4..9dc6d3617bdb 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -15,7 +15,6 @@ | |||
15 | #include <linux/module.h> | 15 | #include <linux/module.h> |
16 | #include <linux/sched.h> | 16 | #include <linux/sched.h> |
17 | #include <linux/interrupt.h> | 17 | #include <linux/interrupt.h> |
18 | #include <linux/ptrace.h> | ||
19 | #include <linux/sysdev.h> | 18 | #include <linux/sysdev.h> |
20 | #include <linux/err.h> | 19 | #include <linux/err.h> |
21 | #include <linux/clk.h> | 20 | #include <linux/clk.h> |
@@ -86,10 +85,17 @@ | |||
86 | /* | 85 | /* |
87 | * omap24xx specific GPIO registers | 86 | * omap24xx specific GPIO registers |
88 | */ | 87 | */ |
89 | #define OMAP24XX_GPIO1_BASE (void __iomem *)0x48018000 | 88 | #define OMAP242X_GPIO1_BASE (void __iomem *)0x48018000 |
90 | #define OMAP24XX_GPIO2_BASE (void __iomem *)0x4801a000 | 89 | #define OMAP242X_GPIO2_BASE (void __iomem *)0x4801a000 |
91 | #define OMAP24XX_GPIO3_BASE (void __iomem *)0x4801c000 | 90 | #define OMAP242X_GPIO3_BASE (void __iomem *)0x4801c000 |
92 | #define OMAP24XX_GPIO4_BASE (void __iomem *)0x4801e000 | 91 | #define OMAP242X_GPIO4_BASE (void __iomem *)0x4801e000 |
92 | |||
93 | #define OMAP243X_GPIO1_BASE (void __iomem *)0x4900C000 | ||
94 | #define OMAP243X_GPIO2_BASE (void __iomem *)0x4900E000 | ||
95 | #define OMAP243X_GPIO3_BASE (void __iomem *)0x49010000 | ||
96 | #define OMAP243X_GPIO4_BASE (void __iomem *)0x49012000 | ||
97 | #define OMAP243X_GPIO5_BASE (void __iomem *)0x480B6000 | ||
98 | |||
93 | #define OMAP24XX_GPIO_REVISION 0x0000 | 99 | #define OMAP24XX_GPIO_REVISION 0x0000 |
94 | #define OMAP24XX_GPIO_SYSCONFIG 0x0010 | 100 | #define OMAP24XX_GPIO_SYSCONFIG 0x0010 |
95 | #define OMAP24XX_GPIO_SYSSTATUS 0x0014 | 101 | #define OMAP24XX_GPIO_SYSSTATUS 0x0014 |
@@ -118,8 +124,18 @@ struct gpio_bank { | |||
118 | u16 virtual_irq_start; | 124 | u16 virtual_irq_start; |
119 | int method; | 125 | int method; |
120 | u32 reserved_map; | 126 | u32 reserved_map; |
127 | #if defined (CONFIG_ARCH_OMAP16XX) || defined (CONFIG_ARCH_OMAP24XX) | ||
121 | u32 suspend_wakeup; | 128 | u32 suspend_wakeup; |
122 | u32 saved_wakeup; | 129 | u32 saved_wakeup; |
130 | #endif | ||
131 | #ifdef CONFIG_ARCH_OMAP24XX | ||
132 | u32 non_wakeup_gpios; | ||
133 | u32 enabled_non_wakeup_gpios; | ||
134 | |||
135 | u32 saved_datain; | ||
136 | u32 saved_fallingdetect; | ||
137 | u32 saved_risingdetect; | ||
138 | #endif | ||
123 | spinlock_t lock; | 139 | spinlock_t lock; |
124 | }; | 140 | }; |
125 | 141 | ||
@@ -159,12 +175,22 @@ static struct gpio_bank gpio_bank_730[7] = { | |||
159 | #endif | 175 | #endif |
160 | 176 | ||
161 | #ifdef CONFIG_ARCH_OMAP24XX | 177 | #ifdef CONFIG_ARCH_OMAP24XX |
162 | static struct gpio_bank gpio_bank_24xx[4] = { | 178 | |
163 | { OMAP24XX_GPIO1_BASE, INT_24XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_24XX }, | 179 | static struct gpio_bank gpio_bank_242x[4] = { |
164 | { OMAP24XX_GPIO2_BASE, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_24XX }, | 180 | { OMAP242X_GPIO1_BASE, INT_24XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_24XX }, |
165 | { OMAP24XX_GPIO3_BASE, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_24XX }, | 181 | { OMAP242X_GPIO2_BASE, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_24XX }, |
166 | { OMAP24XX_GPIO4_BASE, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_24XX }, | 182 | { OMAP242X_GPIO3_BASE, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_24XX }, |
183 | { OMAP242X_GPIO4_BASE, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_24XX }, | ||
184 | }; | ||
185 | |||
186 | static struct gpio_bank gpio_bank_243x[5] = { | ||
187 | { OMAP243X_GPIO1_BASE, INT_24XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_24XX }, | ||
188 | { OMAP243X_GPIO2_BASE, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_24XX }, | ||
189 | { OMAP243X_GPIO3_BASE, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_24XX }, | ||
190 | { OMAP243X_GPIO4_BASE, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_24XX }, | ||
191 | { OMAP243X_GPIO5_BASE, INT_24XX_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_24XX }, | ||
167 | }; | 192 | }; |
193 | |||
168 | #endif | 194 | #endif |
169 | 195 | ||
170 | static struct gpio_bank *gpio_bank; | 196 | static struct gpio_bank *gpio_bank; |
@@ -258,21 +284,34 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) | |||
258 | u32 l; | 284 | u32 l; |
259 | 285 | ||
260 | switch (bank->method) { | 286 | switch (bank->method) { |
287 | #ifdef CONFIG_ARCH_OMAP1 | ||
261 | case METHOD_MPUIO: | 288 | case METHOD_MPUIO: |
262 | reg += OMAP_MPUIO_IO_CNTL; | 289 | reg += OMAP_MPUIO_IO_CNTL; |
263 | break; | 290 | break; |
291 | #endif | ||
292 | #ifdef CONFIG_ARCH_OMAP15XX | ||
264 | case METHOD_GPIO_1510: | 293 | case METHOD_GPIO_1510: |
265 | reg += OMAP1510_GPIO_DIR_CONTROL; | 294 | reg += OMAP1510_GPIO_DIR_CONTROL; |
266 | break; | 295 | break; |
296 | #endif | ||
297 | #ifdef CONFIG_ARCH_OMAP16XX | ||
267 | case METHOD_GPIO_1610: | 298 | case METHOD_GPIO_1610: |
268 | reg += OMAP1610_GPIO_DIRECTION; | 299 | reg += OMAP1610_GPIO_DIRECTION; |
269 | break; | 300 | break; |
301 | #endif | ||
302 | #ifdef CONFIG_ARCH_OMAP730 | ||
270 | case METHOD_GPIO_730: | 303 | case METHOD_GPIO_730: |
271 | reg += OMAP730_GPIO_DIR_CONTROL; | 304 | reg += OMAP730_GPIO_DIR_CONTROL; |
272 | break; | 305 | break; |
306 | #endif | ||
307 | #ifdef CONFIG_ARCH_OMAP24XX | ||
273 | case METHOD_GPIO_24XX: | 308 | case METHOD_GPIO_24XX: |
274 | reg += OMAP24XX_GPIO_OE; | 309 | reg += OMAP24XX_GPIO_OE; |
275 | break; | 310 | break; |
311 | #endif | ||
312 | default: | ||
313 | WARN_ON(1); | ||
314 | return; | ||
276 | } | 315 | } |
277 | l = __raw_readl(reg); | 316 | l = __raw_readl(reg); |
278 | if (is_input) | 317 | if (is_input) |
@@ -300,6 +339,7 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) | |||
300 | u32 l = 0; | 339 | u32 l = 0; |
301 | 340 | ||
302 | switch (bank->method) { | 341 | switch (bank->method) { |
342 | #ifdef CONFIG_ARCH_OMAP1 | ||
303 | case METHOD_MPUIO: | 343 | case METHOD_MPUIO: |
304 | reg += OMAP_MPUIO_OUTPUT; | 344 | reg += OMAP_MPUIO_OUTPUT; |
305 | l = __raw_readl(reg); | 345 | l = __raw_readl(reg); |
@@ -308,6 +348,8 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) | |||
308 | else | 348 | else |
309 | l &= ~(1 << gpio); | 349 | l &= ~(1 << gpio); |
310 | break; | 350 | break; |
351 | #endif | ||
352 | #ifdef CONFIG_ARCH_OMAP15XX | ||
311 | case METHOD_GPIO_1510: | 353 | case METHOD_GPIO_1510: |
312 | reg += OMAP1510_GPIO_DATA_OUTPUT; | 354 | reg += OMAP1510_GPIO_DATA_OUTPUT; |
313 | l = __raw_readl(reg); | 355 | l = __raw_readl(reg); |
@@ -316,6 +358,8 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) | |||
316 | else | 358 | else |
317 | l &= ~(1 << gpio); | 359 | l &= ~(1 << gpio); |
318 | break; | 360 | break; |
361 | #endif | ||
362 | #ifdef CONFIG_ARCH_OMAP16XX | ||
319 | case METHOD_GPIO_1610: | 363 | case METHOD_GPIO_1610: |
320 | if (enable) | 364 | if (enable) |
321 | reg += OMAP1610_GPIO_SET_DATAOUT; | 365 | reg += OMAP1610_GPIO_SET_DATAOUT; |
@@ -323,6 +367,8 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) | |||
323 | reg += OMAP1610_GPIO_CLEAR_DATAOUT; | 367 | reg += OMAP1610_GPIO_CLEAR_DATAOUT; |
324 | l = 1 << gpio; | 368 | l = 1 << gpio; |
325 | break; | 369 | break; |
370 | #endif | ||
371 | #ifdef CONFIG_ARCH_OMAP730 | ||
326 | case METHOD_GPIO_730: | 372 | case METHOD_GPIO_730: |
327 | reg += OMAP730_GPIO_DATA_OUTPUT; | 373 | reg += OMAP730_GPIO_DATA_OUTPUT; |
328 | l = __raw_readl(reg); | 374 | l = __raw_readl(reg); |
@@ -331,6 +377,8 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) | |||
331 | else | 377 | else |
332 | l &= ~(1 << gpio); | 378 | l &= ~(1 << gpio); |
333 | break; | 379 | break; |
380 | #endif | ||
381 | #ifdef CONFIG_ARCH_OMAP24XX | ||
334 | case METHOD_GPIO_24XX: | 382 | case METHOD_GPIO_24XX: |
335 | if (enable) | 383 | if (enable) |
336 | reg += OMAP24XX_GPIO_SETDATAOUT; | 384 | reg += OMAP24XX_GPIO_SETDATAOUT; |
@@ -338,8 +386,9 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) | |||
338 | reg += OMAP24XX_GPIO_CLEARDATAOUT; | 386 | reg += OMAP24XX_GPIO_CLEARDATAOUT; |
339 | l = 1 << gpio; | 387 | l = 1 << gpio; |
340 | break; | 388 | break; |
389 | #endif | ||
341 | default: | 390 | default: |
342 | BUG(); | 391 | WARN_ON(1); |
343 | return; | 392 | return; |
344 | } | 393 | } |
345 | __raw_writel(l, reg); | 394 | __raw_writel(l, reg); |
@@ -363,28 +412,37 @@ int omap_get_gpio_datain(int gpio) | |||
363 | void __iomem *reg; | 412 | void __iomem *reg; |
364 | 413 | ||
365 | if (check_gpio(gpio) < 0) | 414 | if (check_gpio(gpio) < 0) |
366 | return -1; | 415 | return -EINVAL; |
367 | bank = get_gpio_bank(gpio); | 416 | bank = get_gpio_bank(gpio); |
368 | reg = bank->base; | 417 | reg = bank->base; |
369 | switch (bank->method) { | 418 | switch (bank->method) { |
419 | #ifdef CONFIG_ARCH_OMAP1 | ||
370 | case METHOD_MPUIO: | 420 | case METHOD_MPUIO: |
371 | reg += OMAP_MPUIO_INPUT_LATCH; | 421 | reg += OMAP_MPUIO_INPUT_LATCH; |
372 | break; | 422 | break; |
423 | #endif | ||
424 | #ifdef CONFIG_ARCH_OMAP15XX | ||
373 | case METHOD_GPIO_1510: | 425 | case METHOD_GPIO_1510: |
374 | reg += OMAP1510_GPIO_DATA_INPUT; | 426 | reg += OMAP1510_GPIO_DATA_INPUT; |
375 | break; | 427 | break; |
428 | #endif | ||
429 | #ifdef CONFIG_ARCH_OMAP16XX | ||
376 | case METHOD_GPIO_1610: | 430 | case METHOD_GPIO_1610: |
377 | reg += OMAP1610_GPIO_DATAIN; | 431 | reg += OMAP1610_GPIO_DATAIN; |
378 | break; | 432 | break; |
433 | #endif | ||
434 | #ifdef CONFIG_ARCH_OMAP730 | ||
379 | case METHOD_GPIO_730: | 435 | case METHOD_GPIO_730: |
380 | reg += OMAP730_GPIO_DATA_INPUT; | 436 | reg += OMAP730_GPIO_DATA_INPUT; |
381 | break; | 437 | break; |
438 | #endif | ||
439 | #ifdef CONFIG_ARCH_OMAP24XX | ||
382 | case METHOD_GPIO_24XX: | 440 | case METHOD_GPIO_24XX: |
383 | reg += OMAP24XX_GPIO_DATAIN; | 441 | reg += OMAP24XX_GPIO_DATAIN; |
384 | break; | 442 | break; |
443 | #endif | ||
385 | default: | 444 | default: |
386 | BUG(); | 445 | return -EINVAL; |
387 | return -1; | ||
388 | } | 446 | } |
389 | return (__raw_readl(reg) | 447 | return (__raw_readl(reg) |
390 | & (1 << get_gpio_index(gpio))) != 0; | 448 | & (1 << get_gpio_index(gpio))) != 0; |
@@ -398,8 +456,10 @@ do { \ | |||
398 | __raw_writel(l, base + reg); \ | 456 | __raw_writel(l, base + reg); \ |
399 | } while(0) | 457 | } while(0) |
400 | 458 | ||
401 | static inline void set_24xx_gpio_triggering(void __iomem *base, int gpio, int trigger) | 459 | #ifdef CONFIG_ARCH_OMAP24XX |
460 | static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | ||
402 | { | 461 | { |
462 | void __iomem *base = bank->base; | ||
403 | u32 gpio_bit = 1 << gpio; | 463 | u32 gpio_bit = 1 << gpio; |
404 | 464 | ||
405 | MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit, | 465 | MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit, |
@@ -410,9 +470,21 @@ static inline void set_24xx_gpio_triggering(void __iomem *base, int gpio, int tr | |||
410 | trigger & __IRQT_RISEDGE); | 470 | trigger & __IRQT_RISEDGE); |
411 | MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit, | 471 | MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit, |
412 | trigger & __IRQT_FALEDGE); | 472 | trigger & __IRQT_FALEDGE); |
473 | if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { | ||
474 | if (trigger != 0) | ||
475 | __raw_writel(1 << gpio, bank->base + OMAP24XX_GPIO_SETWKUENA); | ||
476 | else | ||
477 | __raw_writel(1 << gpio, bank->base + OMAP24XX_GPIO_CLEARWKUENA); | ||
478 | } else { | ||
479 | if (trigger != 0) | ||
480 | bank->enabled_non_wakeup_gpios |= gpio_bit; | ||
481 | else | ||
482 | bank->enabled_non_wakeup_gpios &= ~gpio_bit; | ||
483 | } | ||
413 | /* FIXME: Possibly do 'set_irq_handler(j, handle_level_irq)' if only level | 484 | /* FIXME: Possibly do 'set_irq_handler(j, handle_level_irq)' if only level |
414 | * triggering requested. */ | 485 | * triggering requested. */ |
415 | } | 486 | } |
487 | #endif | ||
416 | 488 | ||
417 | static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | 489 | static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) |
418 | { | 490 | { |
@@ -420,6 +492,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
420 | u32 l = 0; | 492 | u32 l = 0; |
421 | 493 | ||
422 | switch (bank->method) { | 494 | switch (bank->method) { |
495 | #ifdef CONFIG_ARCH_OMAP1 | ||
423 | case METHOD_MPUIO: | 496 | case METHOD_MPUIO: |
424 | reg += OMAP_MPUIO_GPIO_INT_EDGE; | 497 | reg += OMAP_MPUIO_GPIO_INT_EDGE; |
425 | l = __raw_readl(reg); | 498 | l = __raw_readl(reg); |
@@ -430,6 +503,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
430 | else | 503 | else |
431 | goto bad; | 504 | goto bad; |
432 | break; | 505 | break; |
506 | #endif | ||
507 | #ifdef CONFIG_ARCH_OMAP15XX | ||
433 | case METHOD_GPIO_1510: | 508 | case METHOD_GPIO_1510: |
434 | reg += OMAP1510_GPIO_INT_CONTROL; | 509 | reg += OMAP1510_GPIO_INT_CONTROL; |
435 | l = __raw_readl(reg); | 510 | l = __raw_readl(reg); |
@@ -440,22 +515,28 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
440 | else | 515 | else |
441 | goto bad; | 516 | goto bad; |
442 | break; | 517 | break; |
518 | #endif | ||
519 | #ifdef CONFIG_ARCH_OMAP16XX | ||
443 | case METHOD_GPIO_1610: | 520 | case METHOD_GPIO_1610: |
444 | if (gpio & 0x08) | 521 | if (gpio & 0x08) |
445 | reg += OMAP1610_GPIO_EDGE_CTRL2; | 522 | reg += OMAP1610_GPIO_EDGE_CTRL2; |
446 | else | 523 | else |
447 | reg += OMAP1610_GPIO_EDGE_CTRL1; | 524 | reg += OMAP1610_GPIO_EDGE_CTRL1; |
448 | gpio &= 0x07; | 525 | gpio &= 0x07; |
449 | /* We allow only edge triggering, i.e. two lowest bits */ | ||
450 | if (trigger & (__IRQT_LOWLVL | __IRQT_HIGHLVL)) | ||
451 | BUG(); | ||
452 | l = __raw_readl(reg); | 526 | l = __raw_readl(reg); |
453 | l &= ~(3 << (gpio << 1)); | 527 | l &= ~(3 << (gpio << 1)); |
454 | if (trigger & __IRQT_RISEDGE) | 528 | if (trigger & __IRQT_RISEDGE) |
455 | l |= 2 << (gpio << 1); | 529 | l |= 2 << (gpio << 1); |
456 | if (trigger & __IRQT_FALEDGE) | 530 | if (trigger & __IRQT_FALEDGE) |
457 | l |= 1 << (gpio << 1); | 531 | l |= 1 << (gpio << 1); |
532 | if (trigger) | ||
533 | /* Enable wake-up during idle for dynamic tick */ | ||
534 | __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_SET_WAKEUPENA); | ||
535 | else | ||
536 | __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA); | ||
458 | break; | 537 | break; |
538 | #endif | ||
539 | #ifdef CONFIG_ARCH_OMAP730 | ||
459 | case METHOD_GPIO_730: | 540 | case METHOD_GPIO_730: |
460 | reg += OMAP730_GPIO_INT_CONTROL; | 541 | reg += OMAP730_GPIO_INT_CONTROL; |
461 | l = __raw_readl(reg); | 542 | l = __raw_readl(reg); |
@@ -466,11 +547,13 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
466 | else | 547 | else |
467 | goto bad; | 548 | goto bad; |
468 | break; | 549 | break; |
550 | #endif | ||
551 | #ifdef CONFIG_ARCH_OMAP24XX | ||
469 | case METHOD_GPIO_24XX: | 552 | case METHOD_GPIO_24XX: |
470 | set_24xx_gpio_triggering(reg, gpio, trigger); | 553 | set_24xx_gpio_triggering(bank, gpio, trigger); |
471 | break; | 554 | break; |
555 | #endif | ||
472 | default: | 556 | default: |
473 | BUG(); | ||
474 | goto bad; | 557 | goto bad; |
475 | } | 558 | } |
476 | __raw_writel(l, reg); | 559 | __raw_writel(l, reg); |
@@ -485,7 +568,7 @@ static int gpio_irq_type(unsigned irq, unsigned type) | |||
485 | unsigned gpio; | 568 | unsigned gpio; |
486 | int retval; | 569 | int retval; |
487 | 570 | ||
488 | if (irq > IH_MPUIO_BASE) | 571 | if (!cpu_is_omap24xx() && irq > IH_MPUIO_BASE) |
489 | gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE); | 572 | gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE); |
490 | else | 573 | else |
491 | gpio = irq - IH_GPIO_BASE; | 574 | gpio = irq - IH_GPIO_BASE; |
@@ -493,14 +576,21 @@ static int gpio_irq_type(unsigned irq, unsigned type) | |||
493 | if (check_gpio(gpio) < 0) | 576 | if (check_gpio(gpio) < 0) |
494 | return -EINVAL; | 577 | return -EINVAL; |
495 | 578 | ||
496 | if (type & IRQT_PROBE) | 579 | if (type & ~IRQ_TYPE_SENSE_MASK) |
497 | return -EINVAL; | 580 | return -EINVAL; |
498 | if (!cpu_is_omap24xx() && (type & (__IRQT_LOWLVL|__IRQT_HIGHLVL))) | 581 | |
582 | /* OMAP1 allows only only edge triggering */ | ||
583 | if (!cpu_is_omap24xx() | ||
584 | && (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) | ||
499 | return -EINVAL; | 585 | return -EINVAL; |
500 | 586 | ||
501 | bank = get_gpio_bank(gpio); | 587 | bank = get_irq_chip_data(irq); |
502 | spin_lock(&bank->lock); | 588 | spin_lock(&bank->lock); |
503 | retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type); | 589 | retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type); |
590 | if (retval == 0) { | ||
591 | irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK; | ||
592 | irq_desc[irq].status |= type; | ||
593 | } | ||
504 | spin_unlock(&bank->lock); | 594 | spin_unlock(&bank->lock); |
505 | return retval; | 595 | return retval; |
506 | } | 596 | } |
@@ -510,24 +600,34 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) | |||
510 | void __iomem *reg = bank->base; | 600 | void __iomem *reg = bank->base; |
511 | 601 | ||
512 | switch (bank->method) { | 602 | switch (bank->method) { |
603 | #ifdef CONFIG_ARCH_OMAP1 | ||
513 | case METHOD_MPUIO: | 604 | case METHOD_MPUIO: |
514 | /* MPUIO irqstatus is reset by reading the status register, | 605 | /* MPUIO irqstatus is reset by reading the status register, |
515 | * so do nothing here */ | 606 | * so do nothing here */ |
516 | return; | 607 | return; |
608 | #endif | ||
609 | #ifdef CONFIG_ARCH_OMAP15XX | ||
517 | case METHOD_GPIO_1510: | 610 | case METHOD_GPIO_1510: |
518 | reg += OMAP1510_GPIO_INT_STATUS; | 611 | reg += OMAP1510_GPIO_INT_STATUS; |
519 | break; | 612 | break; |
613 | #endif | ||
614 | #ifdef CONFIG_ARCH_OMAP16XX | ||
520 | case METHOD_GPIO_1610: | 615 | case METHOD_GPIO_1610: |
521 | reg += OMAP1610_GPIO_IRQSTATUS1; | 616 | reg += OMAP1610_GPIO_IRQSTATUS1; |
522 | break; | 617 | break; |
618 | #endif | ||
619 | #ifdef CONFIG_ARCH_OMAP730 | ||
523 | case METHOD_GPIO_730: | 620 | case METHOD_GPIO_730: |
524 | reg += OMAP730_GPIO_INT_STATUS; | 621 | reg += OMAP730_GPIO_INT_STATUS; |
525 | break; | 622 | break; |
623 | #endif | ||
624 | #ifdef CONFIG_ARCH_OMAP24XX | ||
526 | case METHOD_GPIO_24XX: | 625 | case METHOD_GPIO_24XX: |
527 | reg += OMAP24XX_GPIO_IRQSTATUS1; | 626 | reg += OMAP24XX_GPIO_IRQSTATUS1; |
528 | break; | 627 | break; |
628 | #endif | ||
529 | default: | 629 | default: |
530 | BUG(); | 630 | WARN_ON(1); |
531 | return; | 631 | return; |
532 | } | 632 | } |
533 | __raw_writel(gpio_mask, reg); | 633 | __raw_writel(gpio_mask, reg); |
@@ -550,31 +650,41 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank) | |||
550 | u32 mask; | 650 | u32 mask; |
551 | 651 | ||
552 | switch (bank->method) { | 652 | switch (bank->method) { |
653 | #ifdef CONFIG_ARCH_OMAP1 | ||
553 | case METHOD_MPUIO: | 654 | case METHOD_MPUIO: |
554 | reg += OMAP_MPUIO_GPIO_MASKIT; | 655 | reg += OMAP_MPUIO_GPIO_MASKIT; |
555 | mask = 0xffff; | 656 | mask = 0xffff; |
556 | inv = 1; | 657 | inv = 1; |
557 | break; | 658 | break; |
659 | #endif | ||
660 | #ifdef CONFIG_ARCH_OMAP15XX | ||
558 | case METHOD_GPIO_1510: | 661 | case METHOD_GPIO_1510: |
559 | reg += OMAP1510_GPIO_INT_MASK; | 662 | reg += OMAP1510_GPIO_INT_MASK; |
560 | mask = 0xffff; | 663 | mask = 0xffff; |
561 | inv = 1; | 664 | inv = 1; |
562 | break; | 665 | break; |
666 | #endif | ||
667 | #ifdef CONFIG_ARCH_OMAP16XX | ||
563 | case METHOD_GPIO_1610: | 668 | case METHOD_GPIO_1610: |
564 | reg += OMAP1610_GPIO_IRQENABLE1; | 669 | reg += OMAP1610_GPIO_IRQENABLE1; |
565 | mask = 0xffff; | 670 | mask = 0xffff; |
566 | break; | 671 | break; |
672 | #endif | ||
673 | #ifdef CONFIG_ARCH_OMAP730 | ||
567 | case METHOD_GPIO_730: | 674 | case METHOD_GPIO_730: |
568 | reg += OMAP730_GPIO_INT_MASK; | 675 | reg += OMAP730_GPIO_INT_MASK; |
569 | mask = 0xffffffff; | 676 | mask = 0xffffffff; |
570 | inv = 1; | 677 | inv = 1; |
571 | break; | 678 | break; |
679 | #endif | ||
680 | #ifdef CONFIG_ARCH_OMAP24XX | ||
572 | case METHOD_GPIO_24XX: | 681 | case METHOD_GPIO_24XX: |
573 | reg += OMAP24XX_GPIO_IRQENABLE1; | 682 | reg += OMAP24XX_GPIO_IRQENABLE1; |
574 | mask = 0xffffffff; | 683 | mask = 0xffffffff; |
575 | break; | 684 | break; |
685 | #endif | ||
576 | default: | 686 | default: |
577 | BUG(); | 687 | WARN_ON(1); |
578 | return 0; | 688 | return 0; |
579 | } | 689 | } |
580 | 690 | ||
@@ -591,6 +701,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab | |||
591 | u32 l; | 701 | u32 l; |
592 | 702 | ||
593 | switch (bank->method) { | 703 | switch (bank->method) { |
704 | #ifdef CONFIG_ARCH_OMAP1 | ||
594 | case METHOD_MPUIO: | 705 | case METHOD_MPUIO: |
595 | reg += OMAP_MPUIO_GPIO_MASKIT; | 706 | reg += OMAP_MPUIO_GPIO_MASKIT; |
596 | l = __raw_readl(reg); | 707 | l = __raw_readl(reg); |
@@ -599,6 +710,8 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab | |||
599 | else | 710 | else |
600 | l |= gpio_mask; | 711 | l |= gpio_mask; |
601 | break; | 712 | break; |
713 | #endif | ||
714 | #ifdef CONFIG_ARCH_OMAP15XX | ||
602 | case METHOD_GPIO_1510: | 715 | case METHOD_GPIO_1510: |
603 | reg += OMAP1510_GPIO_INT_MASK; | 716 | reg += OMAP1510_GPIO_INT_MASK; |
604 | l = __raw_readl(reg); | 717 | l = __raw_readl(reg); |
@@ -607,6 +720,8 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab | |||
607 | else | 720 | else |
608 | l |= gpio_mask; | 721 | l |= gpio_mask; |
609 | break; | 722 | break; |
723 | #endif | ||
724 | #ifdef CONFIG_ARCH_OMAP16XX | ||
610 | case METHOD_GPIO_1610: | 725 | case METHOD_GPIO_1610: |
611 | if (enable) | 726 | if (enable) |
612 | reg += OMAP1610_GPIO_SET_IRQENABLE1; | 727 | reg += OMAP1610_GPIO_SET_IRQENABLE1; |
@@ -614,6 +729,8 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab | |||
614 | reg += OMAP1610_GPIO_CLEAR_IRQENABLE1; | 729 | reg += OMAP1610_GPIO_CLEAR_IRQENABLE1; |
615 | l = gpio_mask; | 730 | l = gpio_mask; |
616 | break; | 731 | break; |
732 | #endif | ||
733 | #ifdef CONFIG_ARCH_OMAP730 | ||
617 | case METHOD_GPIO_730: | 734 | case METHOD_GPIO_730: |
618 | reg += OMAP730_GPIO_INT_MASK; | 735 | reg += OMAP730_GPIO_INT_MASK; |
619 | l = __raw_readl(reg); | 736 | l = __raw_readl(reg); |
@@ -622,6 +739,8 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab | |||
622 | else | 739 | else |
623 | l |= gpio_mask; | 740 | l |= gpio_mask; |
624 | break; | 741 | break; |
742 | #endif | ||
743 | #ifdef CONFIG_ARCH_OMAP24XX | ||
625 | case METHOD_GPIO_24XX: | 744 | case METHOD_GPIO_24XX: |
626 | if (enable) | 745 | if (enable) |
627 | reg += OMAP24XX_GPIO_SETIRQENABLE1; | 746 | reg += OMAP24XX_GPIO_SETIRQENABLE1; |
@@ -629,8 +748,9 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab | |||
629 | reg += OMAP24XX_GPIO_CLEARIRQENABLE1; | 748 | reg += OMAP24XX_GPIO_CLEARIRQENABLE1; |
630 | l = gpio_mask; | 749 | l = gpio_mask; |
631 | break; | 750 | break; |
751 | #endif | ||
632 | default: | 752 | default: |
633 | BUG(); | 753 | WARN_ON(1); |
634 | return; | 754 | return; |
635 | } | 755 | } |
636 | __raw_writel(l, reg); | 756 | __raw_writel(l, reg); |
@@ -652,15 +772,39 @@ static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int ena | |||
652 | static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) | 772 | static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) |
653 | { | 773 | { |
654 | switch (bank->method) { | 774 | switch (bank->method) { |
775 | #ifdef CONFIG_ARCH_OMAP16XX | ||
776 | case METHOD_MPUIO: | ||
655 | case METHOD_GPIO_1610: | 777 | case METHOD_GPIO_1610: |
778 | spin_lock(&bank->lock); | ||
779 | if (enable) { | ||
780 | bank->suspend_wakeup |= (1 << gpio); | ||
781 | enable_irq_wake(bank->irq); | ||
782 | } else { | ||
783 | disable_irq_wake(bank->irq); | ||
784 | bank->suspend_wakeup &= ~(1 << gpio); | ||
785 | } | ||
786 | spin_unlock(&bank->lock); | ||
787 | return 0; | ||
788 | #endif | ||
789 | #ifdef CONFIG_ARCH_OMAP24XX | ||
656 | case METHOD_GPIO_24XX: | 790 | case METHOD_GPIO_24XX: |
791 | if (bank->non_wakeup_gpios & (1 << gpio)) { | ||
792 | printk(KERN_ERR "Unable to modify wakeup on " | ||
793 | "non-wakeup GPIO%d\n", | ||
794 | (bank - gpio_bank) * 32 + gpio); | ||
795 | return -EINVAL; | ||
796 | } | ||
657 | spin_lock(&bank->lock); | 797 | spin_lock(&bank->lock); |
658 | if (enable) | 798 | if (enable) { |
659 | bank->suspend_wakeup |= (1 << gpio); | 799 | bank->suspend_wakeup |= (1 << gpio); |
660 | else | 800 | enable_irq_wake(bank->irq); |
801 | } else { | ||
802 | disable_irq_wake(bank->irq); | ||
661 | bank->suspend_wakeup &= ~(1 << gpio); | 803 | bank->suspend_wakeup &= ~(1 << gpio); |
804 | } | ||
662 | spin_unlock(&bank->lock); | 805 | spin_unlock(&bank->lock); |
663 | return 0; | 806 | return 0; |
807 | #endif | ||
664 | default: | 808 | default: |
665 | printk(KERN_ERR "Can't enable GPIO wakeup for method %i\n", | 809 | printk(KERN_ERR "Can't enable GPIO wakeup for method %i\n", |
666 | bank->method); | 810 | bank->method); |
@@ -685,7 +829,7 @@ static int gpio_wake_enable(unsigned int irq, unsigned int enable) | |||
685 | 829 | ||
686 | if (check_gpio(gpio) < 0) | 830 | if (check_gpio(gpio) < 0) |
687 | return -ENODEV; | 831 | return -ENODEV; |
688 | bank = get_gpio_bank(gpio); | 832 | bank = get_irq_chip_data(irq); |
689 | retval = _set_gpio_wakeup(bank, get_gpio_index(gpio), enable); | 833 | retval = _set_gpio_wakeup(bank, get_gpio_index(gpio), enable); |
690 | 834 | ||
691 | return retval; | 835 | return retval; |
@@ -722,20 +866,6 @@ int omap_request_gpio(int gpio) | |||
722 | __raw_writel(__raw_readl(reg) | (1 << get_gpio_index(gpio)), reg); | 866 | __raw_writel(__raw_readl(reg) | (1 << get_gpio_index(gpio)), reg); |
723 | } | 867 | } |
724 | #endif | 868 | #endif |
725 | #ifdef CONFIG_ARCH_OMAP16XX | ||
726 | if (bank->method == METHOD_GPIO_1610) { | ||
727 | /* Enable wake-up during idle for dynamic tick */ | ||
728 | void __iomem *reg = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; | ||
729 | __raw_writel(1 << get_gpio_index(gpio), reg); | ||
730 | } | ||
731 | #endif | ||
732 | #ifdef CONFIG_ARCH_OMAP24XX | ||
733 | if (bank->method == METHOD_GPIO_24XX) { | ||
734 | /* Enable wake-up during idle for dynamic tick */ | ||
735 | void __iomem *reg = bank->base + OMAP24XX_GPIO_SETWKUENA; | ||
736 | __raw_writel(1 << get_gpio_index(gpio), reg); | ||
737 | } | ||
738 | #endif | ||
739 | spin_unlock(&bank->lock); | 869 | spin_unlock(&bank->lock); |
740 | 870 | ||
741 | return 0; | 871 | return 0; |
@@ -795,8 +925,10 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
795 | desc->chip->ack(irq); | 925 | desc->chip->ack(irq); |
796 | 926 | ||
797 | bank = get_irq_data(irq); | 927 | bank = get_irq_data(irq); |
928 | #ifdef CONFIG_ARCH_OMAP1 | ||
798 | if (bank->method == METHOD_MPUIO) | 929 | if (bank->method == METHOD_MPUIO) |
799 | isr_reg = bank->base + OMAP_MPUIO_GPIO_INT; | 930 | isr_reg = bank->base + OMAP_MPUIO_GPIO_INT; |
931 | #endif | ||
800 | #ifdef CONFIG_ARCH_OMAP15XX | 932 | #ifdef CONFIG_ARCH_OMAP15XX |
801 | if (bank->method == METHOD_GPIO_1510) | 933 | if (bank->method == METHOD_GPIO_1510) |
802 | isr_reg = bank->base + OMAP1510_GPIO_INT_STATUS; | 934 | isr_reg = bank->base + OMAP1510_GPIO_INT_STATUS; |
@@ -912,7 +1044,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
912 | static void gpio_irq_shutdown(unsigned int irq) | 1044 | static void gpio_irq_shutdown(unsigned int irq) |
913 | { | 1045 | { |
914 | unsigned int gpio = irq - IH_GPIO_BASE; | 1046 | unsigned int gpio = irq - IH_GPIO_BASE; |
915 | struct gpio_bank *bank = get_gpio_bank(gpio); | 1047 | struct gpio_bank *bank = get_irq_chip_data(irq); |
916 | 1048 | ||
917 | _reset_gpio(bank, gpio); | 1049 | _reset_gpio(bank, gpio); |
918 | } | 1050 | } |
@@ -920,7 +1052,7 @@ static void gpio_irq_shutdown(unsigned int irq) | |||
920 | static void gpio_ack_irq(unsigned int irq) | 1052 | static void gpio_ack_irq(unsigned int irq) |
921 | { | 1053 | { |
922 | unsigned int gpio = irq - IH_GPIO_BASE; | 1054 | unsigned int gpio = irq - IH_GPIO_BASE; |
923 | struct gpio_bank *bank = get_gpio_bank(gpio); | 1055 | struct gpio_bank *bank = get_irq_chip_data(irq); |
924 | 1056 | ||
925 | _clear_gpio_irqstatus(bank, gpio); | 1057 | _clear_gpio_irqstatus(bank, gpio); |
926 | } | 1058 | } |
@@ -928,7 +1060,7 @@ static void gpio_ack_irq(unsigned int irq) | |||
928 | static void gpio_mask_irq(unsigned int irq) | 1060 | static void gpio_mask_irq(unsigned int irq) |
929 | { | 1061 | { |
930 | unsigned int gpio = irq - IH_GPIO_BASE; | 1062 | unsigned int gpio = irq - IH_GPIO_BASE; |
931 | struct gpio_bank *bank = get_gpio_bank(gpio); | 1063 | struct gpio_bank *bank = get_irq_chip_data(irq); |
932 | 1064 | ||
933 | _set_gpio_irqenable(bank, gpio, 0); | 1065 | _set_gpio_irqenable(bank, gpio, 0); |
934 | } | 1066 | } |
@@ -937,11 +1069,27 @@ static void gpio_unmask_irq(unsigned int irq) | |||
937 | { | 1069 | { |
938 | unsigned int gpio = irq - IH_GPIO_BASE; | 1070 | unsigned int gpio = irq - IH_GPIO_BASE; |
939 | unsigned int gpio_idx = get_gpio_index(gpio); | 1071 | unsigned int gpio_idx = get_gpio_index(gpio); |
940 | struct gpio_bank *bank = get_gpio_bank(gpio); | 1072 | struct gpio_bank *bank = get_irq_chip_data(irq); |
941 | 1073 | ||
942 | _set_gpio_irqenable(bank, gpio_idx, 1); | 1074 | _set_gpio_irqenable(bank, gpio_idx, 1); |
943 | } | 1075 | } |
944 | 1076 | ||
1077 | static struct irq_chip gpio_irq_chip = { | ||
1078 | .name = "GPIO", | ||
1079 | .shutdown = gpio_irq_shutdown, | ||
1080 | .ack = gpio_ack_irq, | ||
1081 | .mask = gpio_mask_irq, | ||
1082 | .unmask = gpio_unmask_irq, | ||
1083 | .set_type = gpio_irq_type, | ||
1084 | .set_wake = gpio_wake_enable, | ||
1085 | }; | ||
1086 | |||
1087 | /*---------------------------------------------------------------------*/ | ||
1088 | |||
1089 | #ifdef CONFIG_ARCH_OMAP1 | ||
1090 | |||
1091 | /* MPUIO uses the always-on 32k clock */ | ||
1092 | |||
945 | static void mpuio_ack_irq(unsigned int irq) | 1093 | static void mpuio_ack_irq(unsigned int irq) |
946 | { | 1094 | { |
947 | /* The ISR is reset automatically, so do nothing here. */ | 1095 | /* The ISR is reset automatically, so do nothing here. */ |
@@ -950,7 +1098,7 @@ static void mpuio_ack_irq(unsigned int irq) | |||
950 | static void mpuio_mask_irq(unsigned int irq) | 1098 | static void mpuio_mask_irq(unsigned int irq) |
951 | { | 1099 | { |
952 | unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE); | 1100 | unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE); |
953 | struct gpio_bank *bank = get_gpio_bank(gpio); | 1101 | struct gpio_bank *bank = get_irq_chip_data(irq); |
954 | 1102 | ||
955 | _set_gpio_irqenable(bank, gpio, 0); | 1103 | _set_gpio_irqenable(bank, gpio, 0); |
956 | } | 1104 | } |
@@ -958,33 +1106,108 @@ static void mpuio_mask_irq(unsigned int irq) | |||
958 | static void mpuio_unmask_irq(unsigned int irq) | 1106 | static void mpuio_unmask_irq(unsigned int irq) |
959 | { | 1107 | { |
960 | unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE); | 1108 | unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE); |
961 | struct gpio_bank *bank = get_gpio_bank(gpio); | 1109 | struct gpio_bank *bank = get_irq_chip_data(irq); |
962 | 1110 | ||
963 | _set_gpio_irqenable(bank, gpio, 1); | 1111 | _set_gpio_irqenable(bank, gpio, 1); |
964 | } | 1112 | } |
965 | 1113 | ||
966 | static struct irq_chip gpio_irq_chip = { | 1114 | static struct irq_chip mpuio_irq_chip = { |
967 | .name = "GPIO", | 1115 | .name = "MPUIO", |
968 | .shutdown = gpio_irq_shutdown, | 1116 | .ack = mpuio_ack_irq, |
969 | .ack = gpio_ack_irq, | 1117 | .mask = mpuio_mask_irq, |
970 | .mask = gpio_mask_irq, | 1118 | .unmask = mpuio_unmask_irq, |
971 | .unmask = gpio_unmask_irq, | ||
972 | .set_type = gpio_irq_type, | 1119 | .set_type = gpio_irq_type, |
1120 | #ifdef CONFIG_ARCH_OMAP16XX | ||
1121 | /* REVISIT: assuming only 16xx supports MPUIO wake events */ | ||
973 | .set_wake = gpio_wake_enable, | 1122 | .set_wake = gpio_wake_enable, |
1123 | #endif | ||
974 | }; | 1124 | }; |
975 | 1125 | ||
976 | static struct irq_chip mpuio_irq_chip = { | 1126 | |
977 | .name = "MPUIO", | 1127 | #define bank_is_mpuio(bank) ((bank)->method == METHOD_MPUIO) |
978 | .ack = mpuio_ack_irq, | 1128 | |
979 | .mask = mpuio_mask_irq, | 1129 | |
980 | .unmask = mpuio_unmask_irq, | 1130 | #ifdef CONFIG_ARCH_OMAP16XX |
981 | .set_type = gpio_irq_type, | 1131 | |
1132 | #include <linux/platform_device.h> | ||
1133 | |||
1134 | static int omap_mpuio_suspend_late(struct platform_device *pdev, pm_message_t mesg) | ||
1135 | { | ||
1136 | struct gpio_bank *bank = platform_get_drvdata(pdev); | ||
1137 | void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT; | ||
1138 | |||
1139 | spin_lock(&bank->lock); | ||
1140 | bank->saved_wakeup = __raw_readl(mask_reg); | ||
1141 | __raw_writel(0xffff & ~bank->suspend_wakeup, mask_reg); | ||
1142 | spin_unlock(&bank->lock); | ||
1143 | |||
1144 | return 0; | ||
1145 | } | ||
1146 | |||
1147 | static int omap_mpuio_resume_early(struct platform_device *pdev) | ||
1148 | { | ||
1149 | struct gpio_bank *bank = platform_get_drvdata(pdev); | ||
1150 | void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT; | ||
1151 | |||
1152 | spin_lock(&bank->lock); | ||
1153 | __raw_writel(bank->saved_wakeup, mask_reg); | ||
1154 | spin_unlock(&bank->lock); | ||
1155 | |||
1156 | return 0; | ||
1157 | } | ||
1158 | |||
1159 | /* use platform_driver for this, now that there's no longer any | ||
1160 | * point to sys_device (other than not disturbing old code). | ||
1161 | */ | ||
1162 | static struct platform_driver omap_mpuio_driver = { | ||
1163 | .suspend_late = omap_mpuio_suspend_late, | ||
1164 | .resume_early = omap_mpuio_resume_early, | ||
1165 | .driver = { | ||
1166 | .name = "mpuio", | ||
1167 | }, | ||
1168 | }; | ||
1169 | |||
1170 | static struct platform_device omap_mpuio_device = { | ||
1171 | .name = "mpuio", | ||
1172 | .id = -1, | ||
1173 | .dev = { | ||
1174 | .driver = &omap_mpuio_driver.driver, | ||
1175 | } | ||
1176 | /* could list the /proc/iomem resources */ | ||
982 | }; | 1177 | }; |
983 | 1178 | ||
1179 | static inline void mpuio_init(void) | ||
1180 | { | ||
1181 | platform_set_drvdata(&omap_mpuio_device, &gpio_bank_1610[0]); | ||
1182 | |||
1183 | if (platform_driver_register(&omap_mpuio_driver) == 0) | ||
1184 | (void) platform_device_register(&omap_mpuio_device); | ||
1185 | } | ||
1186 | |||
1187 | #else | ||
1188 | static inline void mpuio_init(void) {} | ||
1189 | #endif /* 16xx */ | ||
1190 | |||
1191 | #else | ||
1192 | |||
1193 | extern struct irq_chip mpuio_irq_chip; | ||
1194 | |||
1195 | #define bank_is_mpuio(bank) 0 | ||
1196 | static inline void mpuio_init(void) {} | ||
1197 | |||
1198 | #endif | ||
1199 | |||
1200 | /*---------------------------------------------------------------------*/ | ||
1201 | |||
984 | static int initialized; | 1202 | static int initialized; |
985 | static struct clk * gpio_ick; | 1203 | static struct clk * gpio_ick; |
986 | static struct clk * gpio_fck; | 1204 | static struct clk * gpio_fck; |
987 | 1205 | ||
1206 | #ifdef CONFIG_ARCH_OMAP2430 | ||
1207 | static struct clk * gpio5_ick; | ||
1208 | static struct clk * gpio5_fck; | ||
1209 | #endif | ||
1210 | |||
988 | static int __init _omap_gpio_init(void) | 1211 | static int __init _omap_gpio_init(void) |
989 | { | 1212 | { |
990 | int i; | 1213 | int i; |
@@ -1010,7 +1233,25 @@ static int __init _omap_gpio_init(void) | |||
1010 | printk("Could not get gpios_fck\n"); | 1233 | printk("Could not get gpios_fck\n"); |
1011 | else | 1234 | else |
1012 | clk_enable(gpio_fck); | 1235 | clk_enable(gpio_fck); |
1013 | } | 1236 | |
1237 | /* | ||
1238 | * On 2430 GPIO 5 uses CORE L4 ICLK | ||
1239 | */ | ||
1240 | #ifdef CONFIG_ARCH_OMAP2430 | ||
1241 | if (cpu_is_omap2430()) { | ||
1242 | gpio5_ick = clk_get(NULL, "gpio5_ick"); | ||
1243 | if (IS_ERR(gpio5_ick)) | ||
1244 | printk("Could not get gpio5_ick\n"); | ||
1245 | else | ||
1246 | clk_enable(gpio5_ick); | ||
1247 | gpio5_fck = clk_get(NULL, "gpio5_fck"); | ||
1248 | if (IS_ERR(gpio5_fck)) | ||
1249 | printk("Could not get gpio5_fck\n"); | ||
1250 | else | ||
1251 | clk_enable(gpio5_fck); | ||
1252 | } | ||
1253 | #endif | ||
1254 | } | ||
1014 | 1255 | ||
1015 | #ifdef CONFIG_ARCH_OMAP15XX | 1256 | #ifdef CONFIG_ARCH_OMAP15XX |
1016 | if (cpu_is_omap15xx()) { | 1257 | if (cpu_is_omap15xx()) { |
@@ -1037,14 +1278,24 @@ static int __init _omap_gpio_init(void) | |||
1037 | gpio_bank = gpio_bank_730; | 1278 | gpio_bank = gpio_bank_730; |
1038 | } | 1279 | } |
1039 | #endif | 1280 | #endif |
1281 | |||
1040 | #ifdef CONFIG_ARCH_OMAP24XX | 1282 | #ifdef CONFIG_ARCH_OMAP24XX |
1041 | if (cpu_is_omap24xx()) { | 1283 | if (cpu_is_omap242x()) { |
1042 | int rev; | 1284 | int rev; |
1043 | 1285 | ||
1044 | gpio_bank_count = 4; | 1286 | gpio_bank_count = 4; |
1045 | gpio_bank = gpio_bank_24xx; | 1287 | gpio_bank = gpio_bank_242x; |
1288 | rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); | ||
1289 | printk(KERN_INFO "OMAP242x GPIO hardware version %d.%d\n", | ||
1290 | (rev >> 4) & 0x0f, rev & 0x0f); | ||
1291 | } | ||
1292 | if (cpu_is_omap243x()) { | ||
1293 | int rev; | ||
1294 | |||
1295 | gpio_bank_count = 5; | ||
1296 | gpio_bank = gpio_bank_243x; | ||
1046 | rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); | 1297 | rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); |
1047 | printk(KERN_INFO "OMAP24xx GPIO hardware version %d.%d\n", | 1298 | printk(KERN_INFO "OMAP243x GPIO hardware version %d.%d\n", |
1048 | (rev >> 4) & 0x0f, rev & 0x0f); | 1299 | (rev >> 4) & 0x0f, rev & 0x0f); |
1049 | } | 1300 | } |
1050 | #endif | 1301 | #endif |
@@ -1055,9 +1306,8 @@ static int __init _omap_gpio_init(void) | |||
1055 | bank->reserved_map = 0; | 1306 | bank->reserved_map = 0; |
1056 | bank->base = IO_ADDRESS(bank->base); | 1307 | bank->base = IO_ADDRESS(bank->base); |
1057 | spin_lock_init(&bank->lock); | 1308 | spin_lock_init(&bank->lock); |
1058 | if (bank->method == METHOD_MPUIO) { | 1309 | if (bank_is_mpuio(bank)) |
1059 | omap_writew(0xFFFF, OMAP_MPUIO_BASE + OMAP_MPUIO_GPIO_MASKIT); | 1310 | omap_writew(0xFFFF, OMAP_MPUIO_BASE + OMAP_MPUIO_GPIO_MASKIT); |
1060 | } | ||
1061 | #ifdef CONFIG_ARCH_OMAP15XX | 1311 | #ifdef CONFIG_ARCH_OMAP15XX |
1062 | if (bank->method == METHOD_GPIO_1510) { | 1312 | if (bank->method == METHOD_GPIO_1510) { |
1063 | __raw_writew(0xffff, bank->base + OMAP1510_GPIO_INT_MASK); | 1313 | __raw_writew(0xffff, bank->base + OMAP1510_GPIO_INT_MASK); |
@@ -1081,15 +1331,25 @@ static int __init _omap_gpio_init(void) | |||
1081 | #endif | 1331 | #endif |
1082 | #ifdef CONFIG_ARCH_OMAP24XX | 1332 | #ifdef CONFIG_ARCH_OMAP24XX |
1083 | if (bank->method == METHOD_GPIO_24XX) { | 1333 | if (bank->method == METHOD_GPIO_24XX) { |
1334 | static const u32 non_wakeup_gpios[] = { | ||
1335 | 0xe203ffc0, 0x08700040 | ||
1336 | }; | ||
1337 | |||
1084 | __raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_IRQENABLE1); | 1338 | __raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_IRQENABLE1); |
1085 | __raw_writel(0xffffffff, bank->base + OMAP24XX_GPIO_IRQSTATUS1); | 1339 | __raw_writel(0xffffffff, bank->base + OMAP24XX_GPIO_IRQSTATUS1); |
1340 | __raw_writew(0x0015, bank->base + OMAP24XX_GPIO_SYSCONFIG); | ||
1086 | 1341 | ||
1342 | /* Initialize interface clock ungated, module enabled */ | ||
1343 | __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL); | ||
1344 | if (i < ARRAY_SIZE(non_wakeup_gpios)) | ||
1345 | bank->non_wakeup_gpios = non_wakeup_gpios[i]; | ||
1087 | gpio_count = 32; | 1346 | gpio_count = 32; |
1088 | } | 1347 | } |
1089 | #endif | 1348 | #endif |
1090 | for (j = bank->virtual_irq_start; | 1349 | for (j = bank->virtual_irq_start; |
1091 | j < bank->virtual_irq_start + gpio_count; j++) { | 1350 | j < bank->virtual_irq_start + gpio_count; j++) { |
1092 | if (bank->method == METHOD_MPUIO) | 1351 | set_irq_chip_data(j, bank); |
1352 | if (bank_is_mpuio(bank)) | ||
1093 | set_irq_chip(j, &mpuio_irq_chip); | 1353 | set_irq_chip(j, &mpuio_irq_chip); |
1094 | else | 1354 | else |
1095 | set_irq_chip(j, &gpio_irq_chip); | 1355 | set_irq_chip(j, &gpio_irq_chip); |
@@ -1105,6 +1365,12 @@ static int __init _omap_gpio_init(void) | |||
1105 | if (cpu_is_omap16xx()) | 1365 | if (cpu_is_omap16xx()) |
1106 | omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04, ULPD_CAM_CLK_CTRL); | 1366 | omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04, ULPD_CAM_CLK_CTRL); |
1107 | 1367 | ||
1368 | #ifdef CONFIG_ARCH_OMAP24XX | ||
1369 | /* Enable autoidle for the OCP interface */ | ||
1370 | if (cpu_is_omap24xx()) | ||
1371 | omap_writel(1 << 0, 0x48019010); | ||
1372 | #endif | ||
1373 | |||
1108 | return 0; | 1374 | return 0; |
1109 | } | 1375 | } |
1110 | 1376 | ||
@@ -1123,16 +1389,20 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg) | |||
1123 | void __iomem *wake_set; | 1389 | void __iomem *wake_set; |
1124 | 1390 | ||
1125 | switch (bank->method) { | 1391 | switch (bank->method) { |
1392 | #ifdef CONFIG_ARCH_OMAP16XX | ||
1126 | case METHOD_GPIO_1610: | 1393 | case METHOD_GPIO_1610: |
1127 | wake_status = bank->base + OMAP1610_GPIO_WAKEUPENABLE; | 1394 | wake_status = bank->base + OMAP1610_GPIO_WAKEUPENABLE; |
1128 | wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA; | 1395 | wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA; |
1129 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; | 1396 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; |
1130 | break; | 1397 | break; |
1398 | #endif | ||
1399 | #ifdef CONFIG_ARCH_OMAP24XX | ||
1131 | case METHOD_GPIO_24XX: | 1400 | case METHOD_GPIO_24XX: |
1132 | wake_status = bank->base + OMAP24XX_GPIO_SETWKUENA; | 1401 | wake_status = bank->base + OMAP24XX_GPIO_SETWKUENA; |
1133 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; | 1402 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; |
1134 | wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; | 1403 | wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; |
1135 | break; | 1404 | break; |
1405 | #endif | ||
1136 | default: | 1406 | default: |
1137 | continue; | 1407 | continue; |
1138 | } | 1408 | } |
@@ -1160,14 +1430,18 @@ static int omap_gpio_resume(struct sys_device *dev) | |||
1160 | void __iomem *wake_set; | 1430 | void __iomem *wake_set; |
1161 | 1431 | ||
1162 | switch (bank->method) { | 1432 | switch (bank->method) { |
1433 | #ifdef CONFIG_ARCH_OMAP16XX | ||
1163 | case METHOD_GPIO_1610: | 1434 | case METHOD_GPIO_1610: |
1164 | wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA; | 1435 | wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA; |
1165 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; | 1436 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; |
1166 | break; | 1437 | break; |
1438 | #endif | ||
1439 | #ifdef CONFIG_ARCH_OMAP24XX | ||
1167 | case METHOD_GPIO_24XX: | 1440 | case METHOD_GPIO_24XX: |
1168 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; | 1441 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; |
1169 | wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; | 1442 | wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; |
1170 | break; | 1443 | break; |
1444 | #endif | ||
1171 | default: | 1445 | default: |
1172 | continue; | 1446 | continue; |
1173 | } | 1447 | } |
@@ -1191,6 +1465,80 @@ static struct sys_device omap_gpio_device = { | |||
1191 | .id = 0, | 1465 | .id = 0, |
1192 | .cls = &omap_gpio_sysclass, | 1466 | .cls = &omap_gpio_sysclass, |
1193 | }; | 1467 | }; |
1468 | |||
1469 | #endif | ||
1470 | |||
1471 | #ifdef CONFIG_ARCH_OMAP24XX | ||
1472 | |||
1473 | static int workaround_enabled; | ||
1474 | |||
1475 | void omap2_gpio_prepare_for_retention(void) | ||
1476 | { | ||
1477 | int i, c = 0; | ||
1478 | |||
1479 | /* Remove triggering for all non-wakeup GPIOs. Otherwise spurious | ||
1480 | * IRQs will be generated. See OMAP2420 Errata item 1.101. */ | ||
1481 | for (i = 0; i < gpio_bank_count; i++) { | ||
1482 | struct gpio_bank *bank = &gpio_bank[i]; | ||
1483 | u32 l1, l2; | ||
1484 | |||
1485 | if (!(bank->enabled_non_wakeup_gpios)) | ||
1486 | continue; | ||
1487 | bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); | ||
1488 | l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT); | ||
1489 | l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT); | ||
1490 | bank->saved_fallingdetect = l1; | ||
1491 | bank->saved_risingdetect = l2; | ||
1492 | l1 &= ~bank->enabled_non_wakeup_gpios; | ||
1493 | l2 &= ~bank->enabled_non_wakeup_gpios; | ||
1494 | __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT); | ||
1495 | __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT); | ||
1496 | c++; | ||
1497 | } | ||
1498 | if (!c) { | ||
1499 | workaround_enabled = 0; | ||
1500 | return; | ||
1501 | } | ||
1502 | workaround_enabled = 1; | ||
1503 | } | ||
1504 | |||
1505 | void omap2_gpio_resume_after_retention(void) | ||
1506 | { | ||
1507 | int i; | ||
1508 | |||
1509 | if (!workaround_enabled) | ||
1510 | return; | ||
1511 | for (i = 0; i < gpio_bank_count; i++) { | ||
1512 | struct gpio_bank *bank = &gpio_bank[i]; | ||
1513 | u32 l; | ||
1514 | |||
1515 | if (!(bank->enabled_non_wakeup_gpios)) | ||
1516 | continue; | ||
1517 | __raw_writel(bank->saved_fallingdetect, | ||
1518 | bank->base + OMAP24XX_GPIO_FALLINGDETECT); | ||
1519 | __raw_writel(bank->saved_risingdetect, | ||
1520 | bank->base + OMAP24XX_GPIO_RISINGDETECT); | ||
1521 | /* Check if any of the non-wakeup interrupt GPIOs have changed | ||
1522 | * state. If so, generate an IRQ by software. This is | ||
1523 | * horribly racy, but it's the best we can do to work around | ||
1524 | * this silicon bug. */ | ||
1525 | l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); | ||
1526 | l ^= bank->saved_datain; | ||
1527 | l &= bank->non_wakeup_gpios; | ||
1528 | if (l) { | ||
1529 | u32 old0, old1; | ||
1530 | |||
1531 | old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); | ||
1532 | old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); | ||
1533 | __raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0); | ||
1534 | __raw_writel(old1 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT1); | ||
1535 | __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0); | ||
1536 | __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1); | ||
1537 | } | ||
1538 | } | ||
1539 | |||
1540 | } | ||
1541 | |||
1194 | #endif | 1542 | #endif |
1195 | 1543 | ||
1196 | /* | 1544 | /* |
@@ -1212,6 +1560,8 @@ static int __init omap_gpio_sysinit(void) | |||
1212 | if (!initialized) | 1560 | if (!initialized) |
1213 | ret = _omap_gpio_init(); | 1561 | ret = _omap_gpio_init(); |
1214 | 1562 | ||
1563 | mpuio_init(); | ||
1564 | |||
1215 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) | 1565 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) |
1216 | if (cpu_is_omap16xx() || cpu_is_omap24xx()) { | 1566 | if (cpu_is_omap16xx() || cpu_is_omap24xx()) { |
1217 | if (ret == 0) { | 1567 | if (ret == 0) { |
@@ -1232,3 +1582,128 @@ EXPORT_SYMBOL(omap_set_gpio_dataout); | |||
1232 | EXPORT_SYMBOL(omap_get_gpio_datain); | 1582 | EXPORT_SYMBOL(omap_get_gpio_datain); |
1233 | 1583 | ||
1234 | arch_initcall(omap_gpio_sysinit); | 1584 | arch_initcall(omap_gpio_sysinit); |
1585 | |||
1586 | |||
1587 | #ifdef CONFIG_DEBUG_FS | ||
1588 | |||
1589 | #include <linux/debugfs.h> | ||
1590 | #include <linux/seq_file.h> | ||
1591 | |||
1592 | static int gpio_is_input(struct gpio_bank *bank, int mask) | ||
1593 | { | ||
1594 | void __iomem *reg = bank->base; | ||
1595 | |||
1596 | switch (bank->method) { | ||
1597 | case METHOD_MPUIO: | ||
1598 | reg += OMAP_MPUIO_IO_CNTL; | ||
1599 | break; | ||
1600 | case METHOD_GPIO_1510: | ||
1601 | reg += OMAP1510_GPIO_DIR_CONTROL; | ||
1602 | break; | ||
1603 | case METHOD_GPIO_1610: | ||
1604 | reg += OMAP1610_GPIO_DIRECTION; | ||
1605 | break; | ||
1606 | case METHOD_GPIO_730: | ||
1607 | reg += OMAP730_GPIO_DIR_CONTROL; | ||
1608 | break; | ||
1609 | case METHOD_GPIO_24XX: | ||
1610 | reg += OMAP24XX_GPIO_OE; | ||
1611 | break; | ||
1612 | } | ||
1613 | return __raw_readl(reg) & mask; | ||
1614 | } | ||
1615 | |||
1616 | |||
1617 | static int dbg_gpio_show(struct seq_file *s, void *unused) | ||
1618 | { | ||
1619 | unsigned i, j, gpio; | ||
1620 | |||
1621 | for (i = 0, gpio = 0; i < gpio_bank_count; i++) { | ||
1622 | struct gpio_bank *bank = gpio_bank + i; | ||
1623 | unsigned bankwidth = 16; | ||
1624 | u32 mask = 1; | ||
1625 | |||
1626 | if (bank_is_mpuio(bank)) | ||
1627 | gpio = OMAP_MPUIO(0); | ||
1628 | else if (cpu_is_omap24xx() || cpu_is_omap730()) | ||
1629 | bankwidth = 32; | ||
1630 | |||
1631 | for (j = 0; j < bankwidth; j++, gpio++, mask <<= 1) { | ||
1632 | unsigned irq, value, is_in, irqstat; | ||
1633 | |||
1634 | if (!(bank->reserved_map & mask)) | ||
1635 | continue; | ||
1636 | |||
1637 | irq = bank->virtual_irq_start + j; | ||
1638 | value = omap_get_gpio_datain(gpio); | ||
1639 | is_in = gpio_is_input(bank, mask); | ||
1640 | |||
1641 | if (bank_is_mpuio(bank)) | ||
1642 | seq_printf(s, "MPUIO %2d: ", j); | ||
1643 | else | ||
1644 | seq_printf(s, "GPIO %3d: ", gpio); | ||
1645 | seq_printf(s, "%s %s", | ||
1646 | is_in ? "in " : "out", | ||
1647 | value ? "hi" : "lo"); | ||
1648 | |||
1649 | irqstat = irq_desc[irq].status; | ||
1650 | if (is_in && ((bank->suspend_wakeup & mask) | ||
1651 | || irqstat & IRQ_TYPE_SENSE_MASK)) { | ||
1652 | char *trigger = NULL; | ||
1653 | |||
1654 | switch (irqstat & IRQ_TYPE_SENSE_MASK) { | ||
1655 | case IRQ_TYPE_EDGE_FALLING: | ||
1656 | trigger = "falling"; | ||
1657 | break; | ||
1658 | case IRQ_TYPE_EDGE_RISING: | ||
1659 | trigger = "rising"; | ||
1660 | break; | ||
1661 | case IRQ_TYPE_EDGE_BOTH: | ||
1662 | trigger = "bothedge"; | ||
1663 | break; | ||
1664 | case IRQ_TYPE_LEVEL_LOW: | ||
1665 | trigger = "low"; | ||
1666 | break; | ||
1667 | case IRQ_TYPE_LEVEL_HIGH: | ||
1668 | trigger = "high"; | ||
1669 | break; | ||
1670 | case IRQ_TYPE_NONE: | ||
1671 | trigger = "(unspecified)"; | ||
1672 | break; | ||
1673 | } | ||
1674 | seq_printf(s, ", irq-%d %s%s", | ||
1675 | irq, trigger, | ||
1676 | (bank->suspend_wakeup & mask) | ||
1677 | ? " wakeup" : ""); | ||
1678 | } | ||
1679 | seq_printf(s, "\n"); | ||
1680 | } | ||
1681 | |||
1682 | if (bank_is_mpuio(bank)) { | ||
1683 | seq_printf(s, "\n"); | ||
1684 | gpio = 0; | ||
1685 | } | ||
1686 | } | ||
1687 | return 0; | ||
1688 | } | ||
1689 | |||
1690 | static int dbg_gpio_open(struct inode *inode, struct file *file) | ||
1691 | { | ||
1692 | return single_open(file, dbg_gpio_show, &inode->i_private); | ||
1693 | } | ||
1694 | |||
1695 | static const struct file_operations debug_fops = { | ||
1696 | .open = dbg_gpio_open, | ||
1697 | .read = seq_read, | ||
1698 | .llseek = seq_lseek, | ||
1699 | .release = single_release, | ||
1700 | }; | ||
1701 | |||
1702 | static int __init omap_gpio_debuginit(void) | ||
1703 | { | ||
1704 | (void) debugfs_create_file("omap_gpio", S_IRUGO, | ||
1705 | NULL, NULL, &debug_fops); | ||
1706 | return 0; | ||
1707 | } | ||
1708 | late_initcall(omap_gpio_debuginit); | ||
1709 | #endif | ||
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index b8d6f17ff58f..f7b9ccdaacbc 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c | |||
@@ -225,11 +225,16 @@ static void omap_mcbsp_dsp_free(void) | |||
225 | #ifdef CONFIG_ARCH_OMAP2 | 225 | #ifdef CONFIG_ARCH_OMAP2 |
226 | static void omap2_mcbsp2_mux_setup(void) | 226 | static void omap2_mcbsp2_mux_setup(void) |
227 | { | 227 | { |
228 | omap_cfg_reg(Y15_24XX_MCBSP2_CLKX); | 228 | if (cpu_is_omap2420()) { |
229 | omap_cfg_reg(R14_24XX_MCBSP2_FSX); | 229 | omap_cfg_reg(Y15_24XX_MCBSP2_CLKX); |
230 | omap_cfg_reg(W15_24XX_MCBSP2_DR); | 230 | omap_cfg_reg(R14_24XX_MCBSP2_FSX); |
231 | omap_cfg_reg(V15_24XX_MCBSP2_DX); | 231 | omap_cfg_reg(W15_24XX_MCBSP2_DR); |
232 | omap_cfg_reg(V14_24XX_GPIO117); | 232 | omap_cfg_reg(V15_24XX_MCBSP2_DX); |
233 | omap_cfg_reg(V14_24XX_GPIO117); | ||
234 | } | ||
235 | /* | ||
236 | * Need to add MUX settings for OMAP 2430 SDP | ||
237 | */ | ||
233 | } | 238 | } |
234 | #endif | 239 | #endif |
235 | 240 | ||
diff --git a/arch/arm/plat-omap/timer32k.c b/arch/arm/plat-omap/timer32k.c index 265310601161..114f87151d60 100644 --- a/arch/arm/plat-omap/timer32k.c +++ b/arch/arm/plat-omap/timer32k.c | |||
@@ -42,6 +42,8 @@ | |||
42 | #include <linux/spinlock.h> | 42 | #include <linux/spinlock.h> |
43 | #include <linux/err.h> | 43 | #include <linux/err.h> |
44 | #include <linux/clk.h> | 44 | #include <linux/clk.h> |
45 | #include <linux/clocksource.h> | ||
46 | #include <linux/clockchips.h> | ||
45 | 47 | ||
46 | #include <asm/system.h> | 48 | #include <asm/system.h> |
47 | #include <asm/hardware.h> | 49 | #include <asm/hardware.h> |
@@ -80,13 +82,13 @@ struct sys_timer omap_timer; | |||
80 | #define OMAP1_32K_TIMER_TVR 0x00 | 82 | #define OMAP1_32K_TIMER_TVR 0x00 |
81 | #define OMAP1_32K_TIMER_TCR 0x04 | 83 | #define OMAP1_32K_TIMER_TCR 0x04 |
82 | 84 | ||
83 | #define OMAP_32K_TICKS_PER_HZ (32768 / HZ) | 85 | #define OMAP_32K_TICKS_PER_SEC (32768) |
84 | 86 | ||
85 | /* | 87 | /* |
86 | * TRM says 1 / HZ = ( TVR + 1) / 32768, so TRV = (32768 / HZ) - 1 | 88 | * TRM says 1 / HZ = ( TVR + 1) / 32768, so TRV = (32768 / HZ) - 1 |
87 | * so with HZ = 128, TVR = 255. | 89 | * so with HZ = 128, TVR = 255. |
88 | */ | 90 | */ |
89 | #define OMAP_32K_TIMER_TICK_PERIOD ((32768 / HZ) - 1) | 91 | #define OMAP_32K_TIMER_TICK_PERIOD ((OMAP_32K_TICKS_PER_SEC / HZ) - 1) |
90 | 92 | ||
91 | #define JIFFIES_TO_HW_TICKS(nr_jiffies, clock_rate) \ | 93 | #define JIFFIES_TO_HW_TICKS(nr_jiffies, clock_rate) \ |
92 | (((nr_jiffies) * (clock_rate)) / HZ) | 94 | (((nr_jiffies) * (clock_rate)) / HZ) |
@@ -142,6 +144,28 @@ static inline void omap_32k_timer_ack_irq(void) | |||
142 | 144 | ||
143 | #endif | 145 | #endif |
144 | 146 | ||
147 | static void omap_32k_timer_set_mode(enum clock_event_mode mode, | ||
148 | struct clock_event_device *evt) | ||
149 | { | ||
150 | switch (mode) { | ||
151 | case CLOCK_EVT_MODE_ONESHOT: | ||
152 | case CLOCK_EVT_MODE_PERIODIC: | ||
153 | omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD); | ||
154 | break; | ||
155 | case CLOCK_EVT_MODE_UNUSED: | ||
156 | case CLOCK_EVT_MODE_SHUTDOWN: | ||
157 | omap_32k_timer_stop(); | ||
158 | break; | ||
159 | } | ||
160 | } | ||
161 | |||
162 | static struct clock_event_device clockevent_32k_timer = { | ||
163 | .name = "32k-timer", | ||
164 | .features = CLOCK_EVT_FEAT_PERIODIC, | ||
165 | .shift = 32, | ||
166 | .set_mode = omap_32k_timer_set_mode, | ||
167 | }; | ||
168 | |||
145 | /* | 169 | /* |
146 | * The 32KHz synchronized timer is an additional timer on 16xx. | 170 | * The 32KHz synchronized timer is an additional timer on 16xx. |
147 | * It is always running. | 171 | * It is always running. |
@@ -171,15 +195,6 @@ omap_32k_ticks_to_nsecs(unsigned long ticks_32k) | |||
171 | static unsigned long omap_32k_last_tick = 0; | 195 | static unsigned long omap_32k_last_tick = 0; |
172 | 196 | ||
173 | /* | 197 | /* |
174 | * Returns elapsed usecs since last 32k timer interrupt | ||
175 | */ | ||
176 | static unsigned long omap_32k_timer_gettimeoffset(void) | ||
177 | { | ||
178 | unsigned long now = omap_32k_sync_timer_read(); | ||
179 | return omap_32k_ticks_to_usecs(now - omap_32k_last_tick); | ||
180 | } | ||
181 | |||
182 | /* | ||
183 | * Returns current time from boot in nsecs. It's OK for this to wrap | 198 | * Returns current time from boot in nsecs. It's OK for this to wrap |
184 | * around for now, as it's just a relative time stamp. | 199 | * around for now, as it's just a relative time stamp. |
185 | */ | 200 | */ |
@@ -188,95 +203,16 @@ unsigned long long sched_clock(void) | |||
188 | return omap_32k_ticks_to_nsecs(omap_32k_sync_timer_read()); | 203 | return omap_32k_ticks_to_nsecs(omap_32k_sync_timer_read()); |
189 | } | 204 | } |
190 | 205 | ||
191 | /* | ||
192 | * Timer interrupt for 32KHz timer. When dynamic tick is enabled, this | ||
193 | * function is also called from other interrupts to remove latency | ||
194 | * issues with dynamic tick. In the dynamic tick case, we need to lock | ||
195 | * with irqsave. | ||
196 | */ | ||
197 | static inline irqreturn_t _omap_32k_timer_interrupt(int irq, void *dev_id) | ||
198 | { | ||
199 | unsigned long now; | ||
200 | |||
201 | omap_32k_timer_ack_irq(); | ||
202 | now = omap_32k_sync_timer_read(); | ||
203 | |||
204 | while ((signed long)(now - omap_32k_last_tick) | ||
205 | >= OMAP_32K_TICKS_PER_HZ) { | ||
206 | omap_32k_last_tick += OMAP_32K_TICKS_PER_HZ; | ||
207 | timer_tick(); | ||
208 | } | ||
209 | |||
210 | /* Restart timer so we don't drift off due to modulo or dynamic tick. | ||
211 | * By default we program the next timer to be continuous to avoid | ||
212 | * latencies during high system load. During dynamic tick operation the | ||
213 | * continuous timer can be overridden from pm_idle to be longer. | ||
214 | */ | ||
215 | omap_32k_timer_start(omap_32k_last_tick + OMAP_32K_TICKS_PER_HZ - now); | ||
216 | |||
217 | return IRQ_HANDLED; | ||
218 | } | ||
219 | |||
220 | static irqreturn_t omap_32k_timer_handler(int irq, void *dev_id) | ||
221 | { | ||
222 | return _omap_32k_timer_interrupt(irq, dev_id); | ||
223 | } | ||
224 | |||
225 | static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id) | 206 | static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id) |
226 | { | 207 | { |
227 | unsigned long flags; | 208 | struct clock_event_device *evt = &clockevent_32k_timer; |
209 | omap_32k_timer_ack_irq(); | ||
228 | 210 | ||
229 | write_seqlock_irqsave(&xtime_lock, flags); | 211 | evt->event_handler(evt); |
230 | _omap_32k_timer_interrupt(irq, dev_id); | ||
231 | write_sequnlock_irqrestore(&xtime_lock, flags); | ||
232 | 212 | ||
233 | return IRQ_HANDLED; | 213 | return IRQ_HANDLED; |
234 | } | 214 | } |
235 | 215 | ||
236 | #ifdef CONFIG_NO_IDLE_HZ | ||
237 | /* | ||
238 | * Programs the next timer interrupt needed. Called when dynamic tick is | ||
239 | * enabled, and to reprogram the ticks to skip from pm_idle. Note that | ||
240 | * we can keep the timer continuous, and don't need to set it to run in | ||
241 | * one-shot mode. This is because the timer will get reprogrammed again | ||
242 | * after next interrupt. | ||
243 | */ | ||
244 | void omap_32k_timer_reprogram(unsigned long next_tick) | ||
245 | { | ||
246 | unsigned long ticks = JIFFIES_TO_HW_TICKS(next_tick, 32768) + 1; | ||
247 | unsigned long now = omap_32k_sync_timer_read(); | ||
248 | unsigned long idled = now - omap_32k_last_tick; | ||
249 | |||
250 | if (idled + 1 < ticks) | ||
251 | ticks -= idled; | ||
252 | else | ||
253 | ticks = 1; | ||
254 | omap_32k_timer_start(ticks); | ||
255 | } | ||
256 | |||
257 | static struct irqaction omap_32k_timer_irq; | ||
258 | extern struct timer_update_handler timer_update; | ||
259 | |||
260 | static int omap_32k_timer_enable_dyn_tick(void) | ||
261 | { | ||
262 | /* No need to reprogram timer, just use the next interrupt */ | ||
263 | return 0; | ||
264 | } | ||
265 | |||
266 | static int omap_32k_timer_disable_dyn_tick(void) | ||
267 | { | ||
268 | omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD); | ||
269 | return 0; | ||
270 | } | ||
271 | |||
272 | static struct dyn_tick_timer omap_dyn_tick_timer = { | ||
273 | .enable = omap_32k_timer_enable_dyn_tick, | ||
274 | .disable = omap_32k_timer_disable_dyn_tick, | ||
275 | .reprogram = omap_32k_timer_reprogram, | ||
276 | .handler = omap_32k_timer_handler, | ||
277 | }; | ||
278 | #endif /* CONFIG_NO_IDLE_HZ */ | ||
279 | |||
280 | static struct irqaction omap_32k_timer_irq = { | 216 | static struct irqaction omap_32k_timer_irq = { |
281 | .name = "32KHz timer", | 217 | .name = "32KHz timer", |
282 | .flags = IRQF_DISABLED | IRQF_TIMER, | 218 | .flags = IRQF_DISABLED | IRQF_TIMER, |
@@ -285,13 +221,8 @@ static struct irqaction omap_32k_timer_irq = { | |||
285 | 221 | ||
286 | static __init void omap_init_32k_timer(void) | 222 | static __init void omap_init_32k_timer(void) |
287 | { | 223 | { |
288 | #ifdef CONFIG_NO_IDLE_HZ | ||
289 | omap_timer.dyn_tick = &omap_dyn_tick_timer; | ||
290 | #endif | ||
291 | |||
292 | if (cpu_class_is_omap1()) | 224 | if (cpu_class_is_omap1()) |
293 | setup_irq(INT_OS_TIMER, &omap_32k_timer_irq); | 225 | setup_irq(INT_OS_TIMER, &omap_32k_timer_irq); |
294 | omap_timer.offset = omap_32k_timer_gettimeoffset; | ||
295 | omap_32k_last_tick = omap_32k_sync_timer_read(); | 226 | omap_32k_last_tick = omap_32k_sync_timer_read(); |
296 | 227 | ||
297 | #ifdef CONFIG_ARCH_OMAP2 | 228 | #ifdef CONFIG_ARCH_OMAP2 |
@@ -308,7 +239,16 @@ static __init void omap_init_32k_timer(void) | |||
308 | } | 239 | } |
309 | #endif | 240 | #endif |
310 | 241 | ||
311 | omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD); | 242 | clockevent_32k_timer.mult = div_sc(OMAP_32K_TICKS_PER_SEC, |
243 | NSEC_PER_SEC, | ||
244 | clockevent_32k_timer.shift); | ||
245 | clockevent_32k_timer.max_delta_ns = | ||
246 | clockevent_delta2ns(0xfffffffe, &clockevent_32k_timer); | ||
247 | clockevent_32k_timer.min_delta_ns = | ||
248 | clockevent_delta2ns(1, &clockevent_32k_timer); | ||
249 | |||
250 | clockevent_32k_timer.cpumask = cpumask_of_cpu(0); | ||
251 | clockevents_register_device(&clockevent_32k_timer); | ||
312 | } | 252 | } |
313 | 253 | ||
314 | /* | 254 | /* |
@@ -326,5 +266,4 @@ static void __init omap_timer_init(void) | |||
326 | 266 | ||
327 | struct sys_timer omap_timer = { | 267 | struct sys_timer omap_timer = { |
328 | .init = omap_timer_init, | 268 | .init = omap_timer_init, |
329 | .offset = NULL, /* Initialized later */ | ||
330 | }; | 269 | }; |
diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c index d3dc03a7383a..79cda0faec86 100644 --- a/arch/arm/plat-s3c24xx/clock.c +++ b/arch/arm/plat-s3c24xx/clock.c | |||
@@ -404,6 +404,18 @@ int s3c24xx_register_clock(struct clk *clk) | |||
404 | return 0; | 404 | return 0; |
405 | } | 405 | } |
406 | 406 | ||
407 | int s3c24xx_register_clocks(struct clk **clks, int nr_clks) | ||
408 | { | ||
409 | int fails = 0; | ||
410 | |||
411 | for (; nr_clks > 0; nr_clks--, clks++) { | ||
412 | if (s3c24xx_register_clock(*clks) < 0) | ||
413 | fails++; | ||
414 | } | ||
415 | |||
416 | return fails; | ||
417 | } | ||
418 | |||
407 | /* initalise all the clocks */ | 419 | /* initalise all the clocks */ |
408 | 420 | ||
409 | int __init s3c24xx_setup_clocks(unsigned long xtal, | 421 | int __init s3c24xx_setup_clocks(unsigned long xtal, |
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c index 6a2d1070e5a0..8ce4904d3131 100644 --- a/arch/arm/plat-s3c24xx/cpu.c +++ b/arch/arm/plat-s3c24xx/cpu.c | |||
@@ -181,24 +181,6 @@ s3c_lookup_cpu(unsigned long idcode) | |||
181 | return NULL; | 181 | return NULL; |
182 | } | 182 | } |
183 | 183 | ||
184 | /* board information */ | ||
185 | |||
186 | static struct s3c24xx_board *board; | ||
187 | |||
188 | void s3c24xx_set_board(struct s3c24xx_board *b) | ||
189 | { | ||
190 | int i; | ||
191 | |||
192 | board = b; | ||
193 | |||
194 | if (b->clocks_count != 0) { | ||
195 | struct clk **ptr = b->clocks; | ||
196 | |||
197 | for (i = b->clocks_count; i > 0; i--, ptr++) | ||
198 | s3c24xx_register_clock(*ptr); | ||
199 | } | ||
200 | } | ||
201 | |||
202 | /* cpu information */ | 184 | /* cpu information */ |
203 | 185 | ||
204 | static struct cpu_table *cpu; | 186 | static struct cpu_table *cpu; |
@@ -342,26 +324,6 @@ static int __init s3c_arch_init(void) | |||
342 | return ret; | 324 | return ret; |
343 | 325 | ||
344 | ret = platform_add_devices(s3c24xx_uart_devs, nr_uarts); | 326 | ret = platform_add_devices(s3c24xx_uart_devs, nr_uarts); |
345 | if (ret != 0) | ||
346 | return ret; | ||
347 | |||
348 | if (board != NULL) { | ||
349 | struct platform_device **ptr = board->devices; | ||
350 | int i; | ||
351 | |||
352 | for (i = 0; i < board->devices_count; i++, ptr++) { | ||
353 | ret = platform_device_register(*ptr); | ||
354 | |||
355 | if (ret) { | ||
356 | printk(KERN_ERR "s3c24xx: failed to add board device %s (%d) @%p\n", (*ptr)->name, ret, *ptr); | ||
357 | } | ||
358 | } | ||
359 | |||
360 | /* mask any error, we may not need all these board | ||
361 | * devices */ | ||
362 | ret = 0; | ||
363 | } | ||
364 | |||
365 | return ret; | 327 | return ret; |
366 | } | 328 | } |
367 | 329 | ||
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index 4540a806f522..6f03c9370979 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c | |||
@@ -44,7 +44,7 @@ static struct kmem_cache *dma_kmem; | |||
44 | 44 | ||
45 | static int dma_channels; | 45 | static int dma_channels; |
46 | 46 | ||
47 | struct s3c24xx_dma_selection dma_sel; | 47 | static struct s3c24xx_dma_selection dma_sel; |
48 | 48 | ||
49 | /* dma channel state information */ | 49 | /* dma channel state information */ |
50 | struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS]; | 50 | struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS]; |
@@ -880,7 +880,7 @@ static int s3c2410_dma_dostop(struct s3c2410_dma_chan *chan) | |||
880 | return 0; | 880 | return 0; |
881 | } | 881 | } |
882 | 882 | ||
883 | void s3c2410_dma_waitforstop(struct s3c2410_dma_chan *chan) | 883 | static void s3c2410_dma_waitforstop(struct s3c2410_dma_chan *chan) |
884 | { | 884 | { |
885 | unsigned long tmp; | 885 | unsigned long tmp; |
886 | unsigned int timeout = 0x10000; | 886 | unsigned int timeout = 0x10000; |
@@ -957,8 +957,7 @@ static int s3c2410_dma_flush(struct s3c2410_dma_chan *chan) | |||
957 | return 0; | 957 | return 0; |
958 | } | 958 | } |
959 | 959 | ||
960 | int | 960 | static int s3c2410_dma_started(struct s3c2410_dma_chan *chan) |
961 | s3c2410_dma_started(struct s3c2410_dma_chan *chan) | ||
962 | { | 961 | { |
963 | unsigned long flags; | 962 | unsigned long flags; |
964 | 963 | ||
@@ -1280,7 +1279,7 @@ static void s3c2410_dma_cache_ctor(void *p, struct kmem_cache *c, unsigned long | |||
1280 | 1279 | ||
1281 | /* initialisation code */ | 1280 | /* initialisation code */ |
1282 | 1281 | ||
1283 | int __init s3c24xx_dma_sysclass_init(void) | 1282 | static int __init s3c24xx_dma_sysclass_init(void) |
1284 | { | 1283 | { |
1285 | int ret = sysdev_class_register(&dma_sysclass); | 1284 | int ret = sysdev_class_register(&dma_sysclass); |
1286 | 1285 | ||
@@ -1292,7 +1291,7 @@ int __init s3c24xx_dma_sysclass_init(void) | |||
1292 | 1291 | ||
1293 | core_initcall(s3c24xx_dma_sysclass_init); | 1292 | core_initcall(s3c24xx_dma_sysclass_init); |
1294 | 1293 | ||
1295 | int __init s3c24xx_dma_sysdev_register(void) | 1294 | static int __init s3c24xx_dma_sysdev_register(void) |
1296 | { | 1295 | { |
1297 | struct s3c2410_dma_chan *cp = s3c2410_chans; | 1296 | struct s3c2410_dma_chan *cp = s3c2410_chans; |
1298 | int channel, ret; | 1297 | int channel, ret; |
@@ -1396,7 +1395,7 @@ static struct s3c24xx_dma_order *dma_order; | |||
1396 | * channel | 1395 | * channel |
1397 | */ | 1396 | */ |
1398 | 1397 | ||
1399 | struct s3c2410_dma_chan *s3c2410_dma_map_channel(int channel) | 1398 | static struct s3c2410_dma_chan *s3c2410_dma_map_channel(int channel) |
1400 | { | 1399 | { |
1401 | struct s3c24xx_dma_order_ch *ord = NULL; | 1400 | struct s3c24xx_dma_order_ch *ord = NULL; |
1402 | struct s3c24xx_dma_map *ch_map; | 1401 | struct s3c24xx_dma_map *ch_map; |
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c index ce186398e3fd..8fbc88470261 100644 --- a/arch/arm/plat-s3c24xx/irq.c +++ b/arch/arm/plat-s3c24xx/irq.c | |||
@@ -54,7 +54,6 @@ | |||
54 | #include <linux/module.h> | 54 | #include <linux/module.h> |
55 | #include <linux/interrupt.h> | 55 | #include <linux/interrupt.h> |
56 | #include <linux/ioport.h> | 56 | #include <linux/ioport.h> |
57 | #include <linux/ptrace.h> | ||
58 | #include <linux/sysdev.h> | 57 | #include <linux/sysdev.h> |
59 | 58 | ||
60 | #include <asm/hardware.h> | 59 | #include <asm/hardware.h> |
diff --git a/arch/arm/plat-s3c24xx/s3c244x-irq.c b/arch/arm/plat-s3c24xx/s3c244x-irq.c index a0e39d894014..2dbb2606d448 100644 --- a/arch/arm/plat-s3c24xx/s3c244x-irq.c +++ b/arch/arm/plat-s3c24xx/s3c244x-irq.c | |||
@@ -23,7 +23,6 @@ | |||
23 | #include <linux/module.h> | 23 | #include <linux/module.h> |
24 | #include <linux/interrupt.h> | 24 | #include <linux/interrupt.h> |
25 | #include <linux/ioport.h> | 25 | #include <linux/ioport.h> |
26 | #include <linux/ptrace.h> | ||
27 | #include <linux/sysdev.h> | 26 | #include <linux/sysdev.h> |
28 | 27 | ||
29 | #include <asm/hardware.h> | 28 | #include <asm/hardware.h> |
diff --git a/arch/arm/vfp/vfpdouble.c b/arch/arm/vfp/vfpdouble.c index e44b9ed0f81f..74e89f8fb3ab 100644 --- a/arch/arm/vfp/vfpdouble.c +++ b/arch/arm/vfp/vfpdouble.c | |||
@@ -34,7 +34,6 @@ | |||
34 | #include <linux/bitops.h> | 34 | #include <linux/bitops.h> |
35 | 35 | ||
36 | #include <asm/div64.h> | 36 | #include <asm/div64.h> |
37 | #include <asm/ptrace.h> | ||
38 | #include <asm/vfp.h> | 37 | #include <asm/vfp.h> |
39 | 38 | ||
40 | #include "vfpinstr.h" | 39 | #include "vfpinstr.h" |
diff --git a/arch/arm/vfp/vfpsingle.c b/arch/arm/vfp/vfpsingle.c index 0221ba3bc799..b252631b406b 100644 --- a/arch/arm/vfp/vfpsingle.c +++ b/arch/arm/vfp/vfpsingle.c | |||
@@ -34,7 +34,6 @@ | |||
34 | #include <linux/bitops.h> | 34 | #include <linux/bitops.h> |
35 | 35 | ||
36 | #include <asm/div64.h> | 36 | #include <asm/div64.h> |
37 | #include <asm/ptrace.h> | ||
38 | #include <asm/vfp.h> | 37 | #include <asm/vfp.h> |
39 | 38 | ||
40 | #include "vfpinstr.h" | 39 | #include "vfpinstr.h" |