5 files changed, 81 insertions, 0 deletions

diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 0a18d16cb58d..453ac9497574 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1314,6 +1314,11 @@ static void __init pmu_check_apic(void)
         pr_info("no hardware sampling interrupt available.\n");
 }
 
+static struct attribute_group x86_pmu_format_group = {
+        .name = "format",
+        .attrs = NULL,
+};
+
 static int __init init_hw_perf_events(void)
 {
         struct x86_pmu_quirk *quirk;
@@ -1388,6 +1393,7 @@ static int __init init_hw_perf_events(void)
         }
 
         x86_pmu.attr_rdpmc = 1; /* enable userspace RDPMC usage by default */
+        x86_pmu_format_group.attrs = x86_pmu.format_attrs;
 
         pr_info("... version:                %d\n",     x86_pmu.version);
         pr_info("... bit width:              %d\n",     x86_pmu.cntval_bits);
@@ -1668,6 +1674,7 @@ static struct attribute_group x86_pmu_attr_group = {
 
 static const struct attribute_group *x86_pmu_attr_groups[] = {
         &x86_pmu_attr_group,
+        &x86_pmu_format_group,
         NULL,
 };
 
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index 8484e77c211e..6638aaf54493 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -339,6 +339,7 @@ struct x86_pmu {
          * sysfs attrs
          */
         int             attr_rdpmc;
+        struct attribute **format_attrs;
 
         /*
          * CPU Hotplug hooks
diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
index dd002faff7a6..95e7fe1c5f0b 100644
--- a/arch/x86/kernel/cpu/perf_event_amd.c
+++ b/arch/x86/kernel/cpu/perf_event_amd.c
@@ -404,6 +404,21 @@ static void amd_pmu_cpu_dead(int cpu)
         }
 }
 
+PMU_FORMAT_ATTR(event,  "config:0-7,32-35");
+PMU_FORMAT_ATTR(umask,  "config:8-15"   );
+PMU_FORMAT_ATTR(edge,   "config:18"     );
+PMU_FORMAT_ATTR(inv,    "config:23"     );
+PMU_FORMAT_ATTR(cmask,  "config:24-31"  );
+
+static struct attribute *amd_format_attr[] = {
+        &format_attr_event.attr,
+        &format_attr_umask.attr,
+        &format_attr_edge.attr,
+        &format_attr_inv.attr,
+        &format_attr_cmask.attr,
+        NULL,
+};
+
 static __initconst const struct x86_pmu amd_pmu = {
         .name                   = "AMD",
         .handle_irq             = x86_pmu_handle_irq,
@@ -426,6 +441,8 @@ static __initconst const struct x86_pmu amd_pmu = {
         .get_event_constraints  = amd_get_event_constraints,
         .put_event_constraints  = amd_put_event_constraints,
 
+        .format_attrs           = amd_format_attr,
+
         .cpu_prepare            = amd_pmu_cpu_prepare,
         .cpu_starting           = amd_pmu_cpu_starting,
         .cpu_dead               = amd_pmu_cpu_dead,
@@ -596,6 +613,7 @@ static __initconst const struct x86_pmu amd_pmu_f15h = {
         .cpu_dead               = amd_pmu_cpu_dead,
 #endif
         .cpu_starting           = amd_pmu_cpu_starting,
+        .format_attrs           = amd_format_attr,
 };
 
 __init int amd_pmu_init(void)
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 6a84e7f28f05..26b3e2fef104 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1431,6 +1431,24 @@ static void core_pmu_enable_all(int added)
         }
 }
 
+PMU_FORMAT_ATTR(event,  "config:0-7"    );
+PMU_FORMAT_ATTR(umask,  "config:8-15"   );
+PMU_FORMAT_ATTR(edge,   "config:18"     );
+PMU_FORMAT_ATTR(pc,     "config:19"     );
+PMU_FORMAT_ATTR(any,    "config:21"     ); /* v3 + */
+PMU_FORMAT_ATTR(inv,    "config:23"     );
+PMU_FORMAT_ATTR(cmask,  "config:24-31"  );
+
+static struct attribute *intel_arch_formats_attr[] = {
+        &format_attr_event.attr,
+        &format_attr_umask.attr,
+        &format_attr_edge.attr,
+        &format_attr_pc.attr,
+        &format_attr_inv.attr,
+        &format_attr_cmask.attr,
+        NULL,
+};
+
 static __initconst const struct x86_pmu core_pmu = {
         .name                   = "core",
         .handle_irq             = x86_pmu_handle_irq,
@@ -1455,6 +1473,7 @@ static __initconst const struct x86_pmu core_pmu = {
         .put_event_constraints  = intel_put_event_constraints,
         .event_constraints      = intel_core_event_constraints,
         .guest_get_msrs         = core_guest_get_msrs,
+        .format_attrs           = intel_arch_formats_attr,
 };
 
 struct intel_shared_regs *allocate_shared_regs(int cpu)
@@ -1553,6 +1572,21 @@ static void intel_pmu_flush_branch_stack(void)
                 intel_pmu_lbr_reset();
 }
 
+PMU_FORMAT_ATTR(offcore_rsp, "config1:0-63");
+
+static struct attribute *intel_arch3_formats_attr[] = {
+        &format_attr_event.attr,
+        &format_attr_umask.attr,
+        &format_attr_edge.attr,
+        &format_attr_pc.attr,
+        &format_attr_any.attr,
+        &format_attr_inv.attr,
+        &format_attr_cmask.attr,
+
+        &format_attr_offcore_rsp.attr, /* XXX do NHM/WSM + SNB breakout */
+        NULL,
+};
+
 static __initconst const struct x86_pmu intel_pmu = {
         .name                   = "Intel",
         .handle_irq             = intel_pmu_handle_irq,
@@ -1576,6 +1610,8 @@ static __initconst const struct x86_pmu intel_pmu = {
         .get_event_constraints  = intel_get_event_constraints,
         .put_event_constraints  = intel_put_event_constraints,
 
+        .format_attrs           = intel_arch3_formats_attr,
+
         .cpu_prepare            = intel_pmu_cpu_prepare,
         .cpu_starting           = intel_pmu_cpu_starting,
         .cpu_dying              = intel_pmu_cpu_dying,
diff --git a/arch/x86/kernel/cpu/perf_event_p6.c b/arch/x86/kernel/cpu/perf_event_p6.c
index c7181befecde..32bcfc7dd230 100644
--- a/arch/x86/kernel/cpu/perf_event_p6.c
+++ b/arch/x86/kernel/cpu/perf_event_p6.c
@@ -87,6 +87,23 @@ static void p6_pmu_enable_event(struct perf_event *event)
         (void)checking_wrmsrl(hwc->config_base, val);
 }
 
+PMU_FORMAT_ATTR(event,  "config:0-7"    );
+PMU_FORMAT_ATTR(umask,  "config:8-15"   );
+PMU_FORMAT_ATTR(edge,   "config:18"     );
+PMU_FORMAT_ATTR(pc,     "config:19"     );
+PMU_FORMAT_ATTR(inv,    "config:23"     );
+PMU_FORMAT_ATTR(cmask,  "config:24-31"  );
+
+static struct attribute *intel_p6_formats_attr[] = {
+        &format_attr_event.attr,
+        &format_attr_umask.attr,
+        &format_attr_edge.attr,
+        &format_attr_pc.attr,
+        &format_attr_inv.attr,
+        &format_attr_cmask.attr,
+        NULL,
+};
+
 static __initconst const struct x86_pmu p6_pmu = {
         .name                   = "p6",
         .handle_irq             = x86_pmu_handle_irq,
@@ -115,6 +132,8 @@ static __initconst const struct x86_pmu p6_pmu = {
         .cntval_mask            = (1ULL << 32) - 1,
         .get_event_constraints  = x86_get_event_constraints,
         .event_constraints      = p6_event_constraints,
+
+        .format_attrs           = intel_p6_formats_attr,
 };
 
 __init int p6_pmu_init(void)