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-rw-r--r--arch/Kconfig4
-rw-r--r--arch/alpha/kernel/entry.S20
-rw-r--r--arch/alpha/kernel/process.c2
-rw-r--r--arch/alpha/kernel/signal.c56
-rw-r--r--arch/alpha/kernel/systbls.S2
-rw-r--r--arch/arm/Kconfig27
-rw-r--r--arch/arm/boot/compressed/Makefile2
-rw-r--r--arch/arm/common/it8152.c8
-rw-r--r--arch/arm/include/asm/pgtable.h4
-rw-r--r--arch/arm/kernel/entry-common.S2
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c4
-rw-r--r--arch/arm/mach-davinci/dm355.c3
-rw-r--r--arch/arm/mach-davinci/dm365.c3
-rw-r--r--arch/arm/mach-davinci/dm644x.c3
-rw-r--r--arch/arm/mach-davinci/dm646x.c3
-rw-r--r--arch/arm/mach-dove/include/mach/io.h6
-rw-r--r--arch/arm/mach-ixp4xx/common-pci.c8
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-kirkwood/include/mach/kirkwood.h2
-rw-r--r--arch/arm/mach-kirkwood/pcie.c4
-rw-r--r--arch/arm/mach-mmp/include/mach/system.h7
-rw-r--r--arch/arm/mach-pxa/cpufreq-pxa2xx.c3
-rw-r--r--arch/arm/mach-pxa/include/mach/hardware.h14
-rw-r--r--arch/arm/mach-pxa/include/mach/io.h2
-rw-r--r--arch/arm/mach-pxa/palm27x.c6
-rw-r--r--arch/arm/mach-pxa/vpac270.c1
-rw-r--r--arch/arm/mach-u300/include/mach/gpio.h3
-rw-r--r--arch/arm/mach-vexpress/ct-ca9x4.c8
-rw-r--r--arch/arm/mm/alignment.c19
-rw-r--r--arch/arm/mm/mmu.c31
-rw-r--r--arch/arm/mm/proc-v7.S62
-rw-r--r--arch/arm/plat-nomadik/timer.c33
-rw-r--r--arch/arm/plat-omap/sram.c25
-rw-r--r--arch/m32r/include/asm/signal.h1
-rw-r--r--arch/m32r/include/asm/unistd.h1
-rw-r--r--arch/m32r/kernel/entry.S5
-rw-r--r--arch/m32r/kernel/ptrace.c7
-rw-r--r--arch/m32r/kernel/signal.c105
-rw-r--r--arch/mn10300/Kconfig1
-rw-r--r--arch/mn10300/Kconfig.debug2
-rw-r--r--arch/mn10300/include/asm/bitops.h4
-rw-r--r--arch/mn10300/include/asm/signal.h2
-rw-r--r--arch/mn10300/kernel/signal.c35
-rw-r--r--arch/powerpc/kernel/signal.c2
-rw-r--r--arch/powerpc/kernel/signal_32.c3
-rw-r--r--arch/powerpc/kernel/signal_64.c2
-rw-r--r--arch/sparc/kernel/perf_event.c14
-rw-r--r--arch/sparc/kernel/signal32.c161
-rw-r--r--arch/sparc/kernel/signal_32.c55
-rw-r--r--arch/sparc/kernel/signal_64.c45
-rw-r--r--arch/tile/kernel/intvec_32.S7
-rw-r--r--arch/um/kernel/exec.c6
-rw-r--r--arch/um/kernel/internal.h2
-rw-r--r--arch/um/kernel/syscall.c4
-rw-r--r--arch/x86/boot/early_serial_console.c14
-rw-r--r--arch/x86/include/asm/amd_iommu_proto.h6
-rw-r--r--arch/x86/include/asm/amd_iommu_types.h12
-rw-r--r--arch/x86/include/asm/bitops.h2
-rw-r--r--arch/x86/include/asm/cpufeature.h1
-rw-r--r--arch/x86/include/asm/hw_breakpoint.h2
-rw-r--r--arch/x86/kernel/Makefile2
-rw-r--r--arch/x86/kernel/amd_iommu.c4
-rw-r--r--arch/x86/kernel/amd_iommu_init.c67
-rw-r--r--arch/x86/kernel/apic/io_apic.c11
-rw-r--r--arch/x86/kernel/cpu/common.c2
-rw-r--r--arch/x86/kernel/cpu/cpu.h1
-rw-r--r--arch/x86/kernel/cpu/intel.c1
-rw-r--r--arch/x86/kernel/cpu/perf_event.c12
-rw-r--r--arch/x86/kernel/cpu/scattered.c1
-rw-r--r--arch/x86/kernel/hpet.c2
-rw-r--r--arch/x86/kernel/hw_breakpoint.c40
-rw-r--r--arch/x86/lguest/boot.c13
-rw-r--r--arch/x86/oprofile/nmi_int.c4
73 files changed, 637 insertions, 403 deletions
diff --git a/arch/Kconfig b/arch/Kconfig
index 4877a8c8ee16..fe48fc7a3eba 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -32,8 +32,9 @@ config HAVE_OPROFILE
32 32
33config KPROBES 33config KPROBES
34 bool "Kprobes" 34 bool "Kprobes"
35 depends on KALLSYMS && MODULES 35 depends on MODULES
36 depends on HAVE_KPROBES 36 depends on HAVE_KPROBES
37 select KALLSYMS
37 help 38 help
38 Kprobes allows you to trap at almost any kernel address and 39 Kprobes allows you to trap at almost any kernel address and
39 execute a callback function. register_kprobe() establishes 40 execute a callback function. register_kprobe() establishes
@@ -45,7 +46,6 @@ config OPTPROBES
45 def_bool y 46 def_bool y
46 depends on KPROBES && HAVE_OPTPROBES 47 depends on KPROBES && HAVE_OPTPROBES
47 depends on !PREEMPT 48 depends on !PREEMPT
48 select KALLSYMS_ALL
49 49
50config HAVE_EFFICIENT_UNALIGNED_ACCESS 50config HAVE_EFFICIENT_UNALIGNED_ACCESS
51 bool 51 bool
diff --git a/arch/alpha/kernel/entry.S b/arch/alpha/kernel/entry.S
index ab1ee0ab082b..6d159cee5f2f 100644
--- a/arch/alpha/kernel/entry.S
+++ b/arch/alpha/kernel/entry.S
@@ -73,8 +73,6 @@
73 ldq $20, HAE_REG($19); \ 73 ldq $20, HAE_REG($19); \
74 stq $21, HAE_CACHE($19); \ 74 stq $21, HAE_CACHE($19); \
75 stq $21, 0($20); \ 75 stq $21, 0($20); \
76 ldq $0, 0($sp); \
77 ldq $1, 8($sp); \
7899:; \ 7699:; \
79 ldq $19, 72($sp); \ 77 ldq $19, 72($sp); \
80 ldq $20, 80($sp); \ 78 ldq $20, 80($sp); \
@@ -316,7 +314,7 @@ ret_from_sys_call:
316 cmovne $26, 0, $19 /* $19 = 0 => non-restartable */ 314 cmovne $26, 0, $19 /* $19 = 0 => non-restartable */
317 ldq $0, SP_OFF($sp) 315 ldq $0, SP_OFF($sp)
318 and $0, 8, $0 316 and $0, 8, $0
319 beq $0, restore_all 317 beq $0, ret_to_kernel
320ret_to_user: 318ret_to_user:
321 /* Make sure need_resched and sigpending don't change between 319 /* Make sure need_resched and sigpending don't change between
322 sampling and the rti. */ 320 sampling and the rti. */
@@ -329,6 +327,11 @@ restore_all:
329 RESTORE_ALL 327 RESTORE_ALL
330 call_pal PAL_rti 328 call_pal PAL_rti
331 329
330ret_to_kernel:
331 lda $16, 7
332 call_pal PAL_swpipl
333 br restore_all
334
332 .align 3 335 .align 3
333$syscall_error: 336$syscall_error:
334 /* 337 /*
@@ -657,7 +660,7 @@ kernel_thread:
657 /* We don't actually care for a3 success widgetry in the kernel. 660 /* We don't actually care for a3 success widgetry in the kernel.
658 Not for positive errno values. */ 661 Not for positive errno values. */
659 stq $0, 0($sp) /* $0 */ 662 stq $0, 0($sp) /* $0 */
660 br restore_all 663 br ret_to_kernel
661.end kernel_thread 664.end kernel_thread
662 665
663/* 666/*
@@ -912,15 +915,6 @@ sys_execve:
912.end sys_execve 915.end sys_execve
913 916
914 .align 4 917 .align 4
915 .globl osf_sigprocmask
916 .ent osf_sigprocmask
917osf_sigprocmask:
918 .prologue 0
919 mov $sp, $18
920 jmp $31, sys_osf_sigprocmask
921.end osf_sigprocmask
922
923 .align 4
924 .globl alpha_ni_syscall 918 .globl alpha_ni_syscall
925 .ent alpha_ni_syscall 919 .ent alpha_ni_syscall
926alpha_ni_syscall: 920alpha_ni_syscall:
diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c
index 842dba308eab..3ec35066f1dc 100644
--- a/arch/alpha/kernel/process.c
+++ b/arch/alpha/kernel/process.c
@@ -356,7 +356,7 @@ dump_elf_thread(elf_greg_t *dest, struct pt_regs *pt, struct thread_info *ti)
356 dest[27] = pt->r27; 356 dest[27] = pt->r27;
357 dest[28] = pt->r28; 357 dest[28] = pt->r28;
358 dest[29] = pt->gp; 358 dest[29] = pt->gp;
359 dest[30] = rdusp(); 359 dest[30] = ti == current_thread_info() ? rdusp() : ti->pcb.usp;
360 dest[31] = pt->pc; 360 dest[31] = pt->pc;
361 361
362 /* Once upon a time this was the PS value. Which is stupid 362 /* Once upon a time this was the PS value. Which is stupid
diff --git a/arch/alpha/kernel/signal.c b/arch/alpha/kernel/signal.c
index 0f6b51ae865a..d290845aef59 100644
--- a/arch/alpha/kernel/signal.c
+++ b/arch/alpha/kernel/signal.c
@@ -41,46 +41,20 @@ static void do_signal(struct pt_regs *, struct switch_stack *,
41/* 41/*
42 * The OSF/1 sigprocmask calling sequence is different from the 42 * The OSF/1 sigprocmask calling sequence is different from the
43 * C sigprocmask() sequence.. 43 * C sigprocmask() sequence..
44 *
45 * how:
46 * 1 - SIG_BLOCK
47 * 2 - SIG_UNBLOCK
48 * 3 - SIG_SETMASK
49 *
50 * We change the range to -1 .. 1 in order to let gcc easily
51 * use the conditional move instructions.
52 *
53 * Note that we don't need to acquire the kernel lock for SMP
54 * operation, as all of this is local to this thread.
55 */ 44 */
56SYSCALL_DEFINE3(osf_sigprocmask, int, how, unsigned long, newmask, 45SYSCALL_DEFINE2(osf_sigprocmask, int, how, unsigned long, newmask)
57 struct pt_regs *, regs)
58{ 46{
59 unsigned long oldmask = -EINVAL; 47 sigset_t oldmask;
60 48 sigset_t mask;
61 if ((unsigned long)how-1 <= 2) { 49 unsigned long res;
62 long sign = how-2; /* -1 .. 1 */ 50
63 unsigned long block, unblock; 51 siginitset(&mask, newmask & ~_BLOCKABLE);
64 52 res = sigprocmask(how, &mask, &oldmask);
65 newmask &= _BLOCKABLE; 53 if (!res) {
66 spin_lock_irq(&current->sighand->siglock); 54 force_successful_syscall_return();
67 oldmask = current->blocked.sig[0]; 55 res = oldmask.sig[0];
68
69 unblock = oldmask & ~newmask;
70 block = oldmask | newmask;
71 if (!sign)
72 block = unblock;
73 if (sign <= 0)
74 newmask = block;
75 if (_NSIG_WORDS > 1 && sign > 0)
76 sigemptyset(&current->blocked);
77 current->blocked.sig[0] = newmask;
78 recalc_sigpending();
79 spin_unlock_irq(&current->sighand->siglock);
80
81 regs->r0 = 0; /* special no error return */
82 } 56 }
83 return oldmask; 57 return res;
84} 58}
85 59
86SYSCALL_DEFINE3(osf_sigaction, int, sig, 60SYSCALL_DEFINE3(osf_sigaction, int, sig,
@@ -94,9 +68,9 @@ SYSCALL_DEFINE3(osf_sigaction, int, sig,
94 old_sigset_t mask; 68 old_sigset_t mask;
95 if (!access_ok(VERIFY_READ, act, sizeof(*act)) || 69 if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
96 __get_user(new_ka.sa.sa_handler, &act->sa_handler) || 70 __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
97 __get_user(new_ka.sa.sa_flags, &act->sa_flags)) 71 __get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
72 __get_user(mask, &act->sa_mask))
98 return -EFAULT; 73 return -EFAULT;
99 __get_user(mask, &act->sa_mask);
100 siginitset(&new_ka.sa.sa_mask, mask); 74 siginitset(&new_ka.sa.sa_mask, mask);
101 new_ka.ka_restorer = NULL; 75 new_ka.ka_restorer = NULL;
102 } 76 }
@@ -106,9 +80,9 @@ SYSCALL_DEFINE3(osf_sigaction, int, sig,
106 if (!ret && oact) { 80 if (!ret && oact) {
107 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) || 81 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
108 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) || 82 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
109 __put_user(old_ka.sa.sa_flags, &oact->sa_flags)) 83 __put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
84 __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
110 return -EFAULT; 85 return -EFAULT;
111 __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
112 } 86 }
113 87
114 return ret; 88 return ret;
diff --git a/arch/alpha/kernel/systbls.S b/arch/alpha/kernel/systbls.S
index ce594ef533cc..a6a1de9db16f 100644
--- a/arch/alpha/kernel/systbls.S
+++ b/arch/alpha/kernel/systbls.S
@@ -58,7 +58,7 @@ sys_call_table:
58 .quad sys_open /* 45 */ 58 .quad sys_open /* 45 */
59 .quad alpha_ni_syscall 59 .quad alpha_ni_syscall
60 .quad sys_getxgid 60 .quad sys_getxgid
61 .quad osf_sigprocmask 61 .quad sys_osf_sigprocmask
62 .quad alpha_ni_syscall 62 .quad alpha_ni_syscall
63 .quad alpha_ni_syscall /* 50 */ 63 .quad alpha_ni_syscall /* 50 */
64 .quad sys_acct 64 .quad sys_acct
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 553b7cf17bfb..88c97bc7a6f5 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -271,7 +271,6 @@ config ARCH_AT91
271 bool "Atmel AT91" 271 bool "Atmel AT91"
272 select ARCH_REQUIRE_GPIOLIB 272 select ARCH_REQUIRE_GPIOLIB
273 select HAVE_CLK 273 select HAVE_CLK
274 select ARCH_USES_GETTIMEOFFSET
275 help 274 help
276 This enables support for systems based on the Atmel AT91RM9200, 275 This enables support for systems based on the Atmel AT91RM9200,
277 AT91SAM9 and AT91CAP9 processors. 276 AT91SAM9 and AT91CAP9 processors.
@@ -1051,6 +1050,32 @@ config ARM_ERRATA_460075
1051 ACTLR register. Note that setting specific bits in the ACTLR register 1050 ACTLR register. Note that setting specific bits in the ACTLR register
1052 may not be available in non-secure mode. 1051 may not be available in non-secure mode.
1053 1052
1053config ARM_ERRATA_742230
1054 bool "ARM errata: DMB operation may be faulty"
1055 depends on CPU_V7 && SMP
1056 help
1057 This option enables the workaround for the 742230 Cortex-A9
1058 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1059 between two write operations may not ensure the correct visibility
1060 ordering of the two writes. This workaround sets a specific bit in
1061 the diagnostic register of the Cortex-A9 which causes the DMB
1062 instruction to behave as a DSB, ensuring the correct behaviour of
1063 the two writes.
1064
1065config ARM_ERRATA_742231
1066 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1067 depends on CPU_V7 && SMP
1068 help
1069 This option enables the workaround for the 742231 Cortex-A9
1070 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1071 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1072 accessing some data located in the same cache line, may get corrupted
1073 data due to bad handling of the address hazard when the line gets
1074 replaced from one of the CPUs at the same time as another CPU is
1075 accessing it. This workaround sets specific bits in the diagnostic
1076 register of the Cortex-A9 which reduces the linefill issuing
1077 capabilities of the processor.
1078
1054config PL310_ERRATA_588369 1079config PL310_ERRATA_588369
1055 bool "Clean & Invalidate maintenance operations do not invalidate clean lines" 1080 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1056 depends on CACHE_L2X0 && ARCH_OMAP4 1081 depends on CACHE_L2X0 && ARCH_OMAP4
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index b23f6bc46cfa..65a7c1c588a9 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -116,5 +116,5 @@ CFLAGS_font.o := -Dstatic=
116$(obj)/font.c: $(FONTC) 116$(obj)/font.c: $(FONTC)
117 $(call cmd,shipped) 117 $(call cmd,shipped)
118 118
119$(obj)/vmlinux.lds: $(obj)/vmlinux.lds.in arch/arm/boot/Makefile .config 119$(obj)/vmlinux.lds: $(obj)/vmlinux.lds.in arch/arm/boot/Makefile $(KCONFIG_CONFIG)
120 @sed "$(SEDFLAGS)" < $< > $@ 120 @sed "$(SEDFLAGS)" < $< > $@
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index 7974baacafce..1bec96e85196 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -271,6 +271,14 @@ int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size)
271 ((dma_addr + size - PHYS_OFFSET) >= SZ_64M); 271 ((dma_addr + size - PHYS_OFFSET) >= SZ_64M);
272} 272}
273 273
274int dma_set_coherent_mask(struct device *dev, u64 mask)
275{
276 if (mask >= PHYS_OFFSET + SZ_64M - 1)
277 return 0;
278
279 return -EIO;
280}
281
274int __init it8152_pci_setup(int nr, struct pci_sys_data *sys) 282int __init it8152_pci_setup(int nr, struct pci_sys_data *sys)
275{ 283{
276 it8152_io.start = IT8152_IO_BASE + 0x12000; 284 it8152_io.start = IT8152_IO_BASE + 0x12000;
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index ab68cf1ef80f..e90b167ea848 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -317,6 +317,10 @@ static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
317#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE 317#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
318#define pgprot_dmacoherent(prot) \ 318#define pgprot_dmacoherent(prot) \
319 __pgprot_modify(prot, L_PTE_MT_MASK|L_PTE_EXEC, L_PTE_MT_BUFFERABLE) 319 __pgprot_modify(prot, L_PTE_MT_MASK|L_PTE_EXEC, L_PTE_MT_BUFFERABLE)
320#define __HAVE_PHYS_MEM_ACCESS_PROT
321struct file;
322extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
323 unsigned long size, pgprot_t vma_prot);
320#else 324#else
321#define pgprot_dmacoherent(prot) \ 325#define pgprot_dmacoherent(prot) \
322 __pgprot_modify(prot, L_PTE_MT_MASK|L_PTE_EXEC, L_PTE_MT_UNCACHED) 326 __pgprot_modify(prot, L_PTE_MT_MASK|L_PTE_EXEC, L_PTE_MT_UNCACHED)
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 1b560825e1cf..7885722bdf4e 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -48,6 +48,8 @@ work_pending:
48 beq no_work_pending 48 beq no_work_pending
49 mov r0, sp @ 'regs' 49 mov r0, sp @ 'regs'
50 mov r2, why @ 'syscall' 50 mov r2, why @ 'syscall'
51 tst r1, #_TIF_SIGPENDING @ delivering a signal?
52 movne why, #0 @ prevent further restarts
51 bl do_notify_resume 53 bl do_notify_resume
52 b ret_slow_syscall @ Check work again 54 b ret_slow_syscall @ Check work again
53 55
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 5e71ccd5e7d3..1276babf84d5 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -426,7 +426,7 @@ static struct i2c_gpio_platform_data pdata_i2c0 = {
426 .sda_is_open_drain = 1, 426 .sda_is_open_drain = 1,
427 .scl_pin = AT91_PIN_PA21, 427 .scl_pin = AT91_PIN_PA21,
428 .scl_is_open_drain = 1, 428 .scl_is_open_drain = 1,
429 .udelay = 2, /* ~100 kHz */ 429 .udelay = 5, /* ~100 kHz */
430}; 430};
431 431
432static struct platform_device at91sam9g45_twi0_device = { 432static struct platform_device at91sam9g45_twi0_device = {
@@ -440,7 +440,7 @@ static struct i2c_gpio_platform_data pdata_i2c1 = {
440 .sda_is_open_drain = 1, 440 .sda_is_open_drain = 1,
441 .scl_pin = AT91_PIN_PB11, 441 .scl_pin = AT91_PIN_PB11,
442 .scl_is_open_drain = 1, 442 .scl_is_open_drain = 1,
443 .udelay = 2, /* ~100 kHz */ 443 .udelay = 5, /* ~100 kHz */
444}; 444};
445 445
446static struct platform_device at91sam9g45_twi1_device = { 446static struct platform_device at91sam9g45_twi1_device = {
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 3d996b659ff4..9be261beae7d 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -769,8 +769,7 @@ static struct map_desc dm355_io_desc[] = {
769 .virtual = SRAM_VIRT, 769 .virtual = SRAM_VIRT,
770 .pfn = __phys_to_pfn(0x00010000), 770 .pfn = __phys_to_pfn(0x00010000),
771 .length = SZ_32K, 771 .length = SZ_32K,
772 /* MT_MEMORY_NONCACHED requires supersection alignment */ 772 .type = MT_MEMORY_NONCACHED,
773 .type = MT_DEVICE,
774 }, 773 },
775}; 774};
776 775
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 6b6f4c643709..7781e35daec3 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -969,8 +969,7 @@ static struct map_desc dm365_io_desc[] = {
969 .virtual = SRAM_VIRT, 969 .virtual = SRAM_VIRT,
970 .pfn = __phys_to_pfn(0x00010000), 970 .pfn = __phys_to_pfn(0x00010000),
971 .length = SZ_32K, 971 .length = SZ_32K,
972 /* MT_MEMORY_NONCACHED requires supersection alignment */ 972 .type = MT_MEMORY_NONCACHED,
973 .type = MT_DEVICE,
974 }, 973 },
975}; 974};
976 975
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 40fec315c99a..5e5b0a7831fb 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -653,8 +653,7 @@ static struct map_desc dm644x_io_desc[] = {
653 .virtual = SRAM_VIRT, 653 .virtual = SRAM_VIRT,
654 .pfn = __phys_to_pfn(0x00008000), 654 .pfn = __phys_to_pfn(0x00008000),
655 .length = SZ_16K, 655 .length = SZ_16K,
656 /* MT_MEMORY_NONCACHED requires supersection alignment */ 656 .type = MT_MEMORY_NONCACHED,
657 .type = MT_DEVICE,
658 }, 657 },
659}; 658};
660 659
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index e4a3df1872ac..26e8a9c7f50b 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -737,8 +737,7 @@ static struct map_desc dm646x_io_desc[] = {
737 .virtual = SRAM_VIRT, 737 .virtual = SRAM_VIRT,
738 .pfn = __phys_to_pfn(0x00010000), 738 .pfn = __phys_to_pfn(0x00010000),
739 .length = SZ_32K, 739 .length = SZ_32K,
740 /* MT_MEMORY_NONCACHED requires supersection alignment */ 740 .type = MT_MEMORY_NONCACHED,
741 .type = MT_DEVICE,
742 }, 741 },
743}; 742};
744 743
diff --git a/arch/arm/mach-dove/include/mach/io.h b/arch/arm/mach-dove/include/mach/io.h
index 3b3e4721ce2e..eb4936ff90ad 100644
--- a/arch/arm/mach-dove/include/mach/io.h
+++ b/arch/arm/mach-dove/include/mach/io.h
@@ -13,8 +13,8 @@
13 13
14#define IO_SPACE_LIMIT 0xffffffff 14#define IO_SPACE_LIMIT 0xffffffff
15 15
16#define __io(a) ((void __iomem *)(((a) - DOVE_PCIE0_IO_PHYS_BASE) +\ 16#define __io(a) ((void __iomem *)(((a) - DOVE_PCIE0_IO_BUS_BASE) + \
17 DOVE_PCIE0_IO_VIRT_BASE)) 17 DOVE_PCIE0_IO_VIRT_BASE))
18#define __mem_pci(a) (a) 18#define __mem_pci(a) (a)
19 19
20#endif 20#endif
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 61cd4d64b985..24498a932ba6 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -503,6 +503,14 @@ struct pci_bus * __devinit ixp4xx_scan_bus(int nr, struct pci_sys_data *sys)
503 return pci_scan_bus(sys->busnr, &ixp4xx_ops, sys); 503 return pci_scan_bus(sys->busnr, &ixp4xx_ops, sys);
504} 504}
505 505
506int dma_set_coherent_mask(struct device *dev, u64 mask)
507{
508 if (mask >= SZ_64M - 1)
509 return 0;
510
511 return -EIO;
512}
513
506EXPORT_SYMBOL(ixp4xx_pci_read); 514EXPORT_SYMBOL(ixp4xx_pci_read);
507EXPORT_SYMBOL(ixp4xx_pci_write); 515EXPORT_SYMBOL(ixp4xx_pci_write);
508 516
diff --git a/arch/arm/mach-ixp4xx/include/mach/hardware.h b/arch/arm/mach-ixp4xx/include/mach/hardware.h
index f91ca6d4fbe8..8138371c406e 100644
--- a/arch/arm/mach-ixp4xx/include/mach/hardware.h
+++ b/arch/arm/mach-ixp4xx/include/mach/hardware.h
@@ -26,6 +26,8 @@
26#define PCIBIOS_MAX_MEM 0x4BFFFFFF 26#define PCIBIOS_MAX_MEM 0x4BFFFFFF
27#endif 27#endif
28 28
29#define ARCH_HAS_DMA_SET_COHERENT_MASK
30
29#define pcibios_assign_all_busses() 1 31#define pcibios_assign_all_busses() 1
30 32
31/* Register locations and bits */ 33/* Register locations and bits */
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index 93fc2ec95e76..6e924b398919 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -38,7 +38,7 @@
38 38
39#define KIRKWOOD_PCIE1_IO_PHYS_BASE 0xf3000000 39#define KIRKWOOD_PCIE1_IO_PHYS_BASE 0xf3000000
40#define KIRKWOOD_PCIE1_IO_VIRT_BASE 0xfef00000 40#define KIRKWOOD_PCIE1_IO_VIRT_BASE 0xfef00000
41#define KIRKWOOD_PCIE1_IO_BUS_BASE 0x00000000 41#define KIRKWOOD_PCIE1_IO_BUS_BASE 0x00100000
42#define KIRKWOOD_PCIE1_IO_SIZE SZ_1M 42#define KIRKWOOD_PCIE1_IO_SIZE SZ_1M
43 43
44#define KIRKWOOD_PCIE_IO_PHYS_BASE 0xf2000000 44#define KIRKWOOD_PCIE_IO_PHYS_BASE 0xf2000000
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index 55e7f00836b7..513ad3102d7c 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -117,7 +117,7 @@ static void __init pcie0_ioresources_init(struct pcie_port *pp)
117 * IORESOURCE_IO 117 * IORESOURCE_IO
118 */ 118 */
119 pp->res[0].name = "PCIe 0 I/O Space"; 119 pp->res[0].name = "PCIe 0 I/O Space";
120 pp->res[0].start = KIRKWOOD_PCIE_IO_PHYS_BASE; 120 pp->res[0].start = KIRKWOOD_PCIE_IO_BUS_BASE;
121 pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1; 121 pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1;
122 pp->res[0].flags = IORESOURCE_IO; 122 pp->res[0].flags = IORESOURCE_IO;
123 123
@@ -139,7 +139,7 @@ static void __init pcie1_ioresources_init(struct pcie_port *pp)
139 * IORESOURCE_IO 139 * IORESOURCE_IO
140 */ 140 */
141 pp->res[0].name = "PCIe 1 I/O Space"; 141 pp->res[0].name = "PCIe 1 I/O Space";
142 pp->res[0].start = KIRKWOOD_PCIE1_IO_PHYS_BASE; 142 pp->res[0].start = KIRKWOOD_PCIE1_IO_BUS_BASE;
143 pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE1_IO_SIZE - 1; 143 pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE1_IO_SIZE - 1;
144 pp->res[0].flags = IORESOURCE_IO; 144 pp->res[0].flags = IORESOURCE_IO;
145 145
diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h
index 4f5b0e0ce6cf..1a8a25edb1b4 100644
--- a/arch/arm/mach-mmp/include/mach/system.h
+++ b/arch/arm/mach-mmp/include/mach/system.h
@@ -9,6 +9,8 @@
9#ifndef __ASM_MACH_SYSTEM_H 9#ifndef __ASM_MACH_SYSTEM_H
10#define __ASM_MACH_SYSTEM_H 10#define __ASM_MACH_SYSTEM_H
11 11
12#include <mach/cputype.h>
13
12static inline void arch_idle(void) 14static inline void arch_idle(void)
13{ 15{
14 cpu_do_idle(); 16 cpu_do_idle();
@@ -16,6 +18,9 @@ static inline void arch_idle(void)
16 18
17static inline void arch_reset(char mode, const char *cmd) 19static inline void arch_reset(char mode, const char *cmd)
18{ 20{
19 cpu_reset(0); 21 if (cpu_is_pxa168())
22 cpu_reset(0xffff0000);
23 else
24 cpu_reset(0);
20} 25}
21#endif /* __ASM_MACH_SYSTEM_H */ 26#endif /* __ASM_MACH_SYSTEM_H */
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
index 50d5939a78f1..58093d9e07be 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
@@ -312,8 +312,7 @@ static int pxa_set_target(struct cpufreq_policy *policy,
312 freqs.cpu = policy->cpu; 312 freqs.cpu = policy->cpu;
313 313
314 if (freq_debug) 314 if (freq_debug)
315 pr_debug(KERN_INFO "Changing CPU frequency to %d Mhz, " 315 pr_debug("Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n",
316 "(SDRAM %d Mhz)\n",
317 freqs.new / 1000, (pxa_freq_settings[idx].div2) ? 316 freqs.new / 1000, (pxa_freq_settings[idx].div2) ?
318 (new_freq_mem / 2000) : (new_freq_mem / 1000)); 317 (new_freq_mem / 2000) : (new_freq_mem / 1000));
319 318
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index 7f64d24cd564..814f1458a06a 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -264,23 +264,35 @@
264 * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x 264 * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x
265 * == 0x3 for pxa300/pxa310/pxa320 265 * == 0x3 for pxa300/pxa310/pxa320
266 */ 266 */
267#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
267#define __cpu_is_pxa2xx(id) \ 268#define __cpu_is_pxa2xx(id) \
268 ({ \ 269 ({ \
269 unsigned int _id = (id) >> 13 & 0x7; \ 270 unsigned int _id = (id) >> 13 & 0x7; \
270 _id <= 0x2; \ 271 _id <= 0x2; \
271 }) 272 })
273#else
274#define __cpu_is_pxa2xx(id) (0)
275#endif
272 276
277#ifdef CONFIG_PXA3xx
273#define __cpu_is_pxa3xx(id) \ 278#define __cpu_is_pxa3xx(id) \
274 ({ \ 279 ({ \
275 unsigned int _id = (id) >> 13 & 0x7; \ 280 unsigned int _id = (id) >> 13 & 0x7; \
276 _id == 0x3; \ 281 _id == 0x3; \
277 }) 282 })
283#else
284#define __cpu_is_pxa3xx(id) (0)
285#endif
278 286
287#if defined(CONFIG_CPU_PXA930) || defined(CONFIG_CPU_PXA935)
279#define __cpu_is_pxa93x(id) \ 288#define __cpu_is_pxa93x(id) \
280 ({ \ 289 ({ \
281 unsigned int _id = (id) >> 4 & 0xfff; \ 290 unsigned int _id = (id) >> 4 & 0xfff; \
282 _id == 0x683 || _id == 0x693; \ 291 _id == 0x683 || _id == 0x693; \
283 }) 292 })
293#else
294#define __cpu_is_pxa93x(id) (0)
295#endif
284 296
285#define cpu_is_pxa2xx() \ 297#define cpu_is_pxa2xx() \
286 ({ \ 298 ({ \
@@ -309,7 +321,7 @@ extern unsigned long get_clock_tick_rate(void);
309#define PCIBIOS_MIN_IO 0 321#define PCIBIOS_MIN_IO 0
310#define PCIBIOS_MIN_MEM 0 322#define PCIBIOS_MIN_MEM 0
311#define pcibios_assign_all_busses() 1 323#define pcibios_assign_all_busses() 1
324#define ARCH_HAS_DMA_SET_COHERENT_MASK
312#endif 325#endif
313 326
314
315#endif /* _ASM_ARCH_HARDWARE_H */ 327#endif /* _ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-pxa/include/mach/io.h b/arch/arm/mach-pxa/include/mach/io.h
index 262691fb97d8..fdca3be47d9b 100644
--- a/arch/arm/mach-pxa/include/mach/io.h
+++ b/arch/arm/mach-pxa/include/mach/io.h
@@ -6,6 +6,8 @@
6#ifndef __ASM_ARM_ARCH_IO_H 6#ifndef __ASM_ARM_ARCH_IO_H
7#define __ASM_ARM_ARCH_IO_H 7#define __ASM_ARM_ARCH_IO_H
8 8
9#include <mach/hardware.h>
10
9#define IO_SPACE_LIMIT 0xffffffff 11#define IO_SPACE_LIMIT 0xffffffff
10 12
11/* 13/*
diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c
index 77ad6d34ab5b..405b92a29793 100644
--- a/arch/arm/mach-pxa/palm27x.c
+++ b/arch/arm/mach-pxa/palm27x.c
@@ -469,9 +469,13 @@ static struct i2c_board_info __initdata palm27x_pi2c_board_info[] = {
469 }, 469 },
470}; 470};
471 471
472static struct i2c_pxa_platform_data palm27x_i2c_power_info = {
473 .use_pio = 1,
474};
475
472void __init palm27x_pmic_init(void) 476void __init palm27x_pmic_init(void)
473{ 477{
474 i2c_register_board_info(1, ARRAY_AND_SIZE(palm27x_pi2c_board_info)); 478 i2c_register_board_info(1, ARRAY_AND_SIZE(palm27x_pi2c_board_info));
475 pxa27x_set_i2c_power_info(NULL); 479 pxa27x_set_i2c_power_info(&palm27x_i2c_power_info);
476} 480}
477#endif 481#endif
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index c9b747cedea8..37d6173bbb66 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -240,6 +240,7 @@ static void __init vpac270_onenand_init(void) {}
240#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) 240#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
241static struct pxamci_platform_data vpac270_mci_platform_data = { 241static struct pxamci_platform_data vpac270_mci_platform_data = {
242 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 242 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
243 .gpio_power = -1,
243 .gpio_card_detect = GPIO53_VPAC270_SD_DETECT_N, 244 .gpio_card_detect = GPIO53_VPAC270_SD_DETECT_N,
244 .gpio_card_ro = GPIO52_VPAC270_SD_READONLY, 245 .gpio_card_ro = GPIO52_VPAC270_SD_READONLY,
245 .detect_delay_ms = 200, 246 .detect_delay_ms = 200,
diff --git a/arch/arm/mach-u300/include/mach/gpio.h b/arch/arm/mach-u300/include/mach/gpio.h
index 7b1fc984abb6..d5a71abcbaea 100644
--- a/arch/arm/mach-u300/include/mach/gpio.h
+++ b/arch/arm/mach-u300/include/mach/gpio.h
@@ -273,6 +273,9 @@ extern void gpio_pullup(unsigned gpio, int value);
273extern int gpio_get_value(unsigned gpio); 273extern int gpio_get_value(unsigned gpio);
274extern void gpio_set_value(unsigned gpio, int value); 274extern void gpio_set_value(unsigned gpio, int value);
275 275
276#define gpio_get_value_cansleep gpio_get_value
277#define gpio_set_value_cansleep gpio_set_value
278
276/* wrappers to sleep-enable the previous two functions */ 279/* wrappers to sleep-enable the previous two functions */
277static inline unsigned gpio_to_irq(unsigned gpio) 280static inline unsigned gpio_to_irq(unsigned gpio)
278{ 281{
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index 577df6cccb08..efb127022d42 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -227,7 +227,13 @@ static void ct_ca9x4_init(void)
227 int i; 227 int i;
228 228
229#ifdef CONFIG_CACHE_L2X0 229#ifdef CONFIG_CACHE_L2X0
230 l2x0_init(MMIO_P2V(CT_CA9X4_L2CC), 0x00000000, 0xfe0fffff); 230 void __iomem *l2x0_base = MMIO_P2V(CT_CA9X4_L2CC);
231
232 /* set RAM latencies to 1 cycle for this core tile. */
233 writel(0, l2x0_base + L2X0_TAG_LATENCY_CTRL);
234 writel(0, l2x0_base + L2X0_DATA_LATENCY_CTRL);
235
236 l2x0_init(l2x0_base, 0x00400000, 0xfe0fffff);
231#endif 237#endif
232 238
233 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 239 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index d073b64ae87e..724ba3bce72c 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -885,8 +885,23 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
885 885
886 if (ai_usermode & UM_SIGNAL) 886 if (ai_usermode & UM_SIGNAL)
887 force_sig(SIGBUS, current); 887 force_sig(SIGBUS, current);
888 else 888 else {
889 set_cr(cr_no_alignment); 889 /*
890 * We're about to disable the alignment trap and return to
891 * user space. But if an interrupt occurs before actually
892 * reaching user space, then the IRQ vector entry code will
893 * notice that we were still in kernel space and therefore
894 * the alignment trap won't be re-enabled in that case as it
895 * is presumed to be always on from kernel space.
896 * Let's prevent that race by disabling interrupts here (they
897 * are disabled on the way back to user space anyway in
898 * entry-common.S) and disable the alignment trap only if
899 * there is no work pending for this thread.
900 */
901 raw_local_irq_disable();
902 if (!(current_thread_info()->flags & _TIF_WORK_MASK))
903 set_cr(cr_no_alignment);
904 }
890 905
891 return 0; 906 return 0;
892} 907}
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 6e1c4f6a2b3f..6a3a2d0cd6db 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -15,6 +15,7 @@
15#include <linux/nodemask.h> 15#include <linux/nodemask.h>
16#include <linux/memblock.h> 16#include <linux/memblock.h>
17#include <linux/sort.h> 17#include <linux/sort.h>
18#include <linux/fs.h>
18 19
19#include <asm/cputype.h> 20#include <asm/cputype.h>
20#include <asm/sections.h> 21#include <asm/sections.h>
@@ -246,6 +247,9 @@ static struct mem_type mem_types[] = {
246 .domain = DOMAIN_USER, 247 .domain = DOMAIN_USER,
247 }, 248 },
248 [MT_MEMORY] = { 249 [MT_MEMORY] = {
250 .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
251 L_PTE_USER | L_PTE_EXEC,
252 .prot_l1 = PMD_TYPE_TABLE,
249 .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE, 253 .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
250 .domain = DOMAIN_KERNEL, 254 .domain = DOMAIN_KERNEL,
251 }, 255 },
@@ -254,6 +258,9 @@ static struct mem_type mem_types[] = {
254 .domain = DOMAIN_KERNEL, 258 .domain = DOMAIN_KERNEL,
255 }, 259 },
256 [MT_MEMORY_NONCACHED] = { 260 [MT_MEMORY_NONCACHED] = {
261 .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
262 L_PTE_USER | L_PTE_EXEC | L_PTE_MT_BUFFERABLE,
263 .prot_l1 = PMD_TYPE_TABLE,
257 .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE, 264 .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
258 .domain = DOMAIN_KERNEL, 265 .domain = DOMAIN_KERNEL,
259 }, 266 },
@@ -411,9 +418,12 @@ static void __init build_mem_type_table(void)
411 * Enable CPU-specific coherency if supported. 418 * Enable CPU-specific coherency if supported.
412 * (Only available on XSC3 at the moment.) 419 * (Only available on XSC3 at the moment.)
413 */ 420 */
414 if (arch_is_coherent() && cpu_is_xsc3()) 421 if (arch_is_coherent() && cpu_is_xsc3()) {
415 mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S; 422 mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
416 423 mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
424 mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
425 mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED;
426 }
417 /* 427 /*
418 * ARMv6 and above have extended page tables. 428 * ARMv6 and above have extended page tables.
419 */ 429 */
@@ -438,7 +448,9 @@ static void __init build_mem_type_table(void)
438 mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S; 448 mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S;
439 mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED; 449 mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED;
440 mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S; 450 mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
451 mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
441 mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S; 452 mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
453 mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED;
442#endif 454#endif
443 } 455 }
444 456
@@ -475,6 +487,8 @@ static void __init build_mem_type_table(void)
475 mem_types[MT_LOW_VECTORS].prot_l1 |= ecc_mask; 487 mem_types[MT_LOW_VECTORS].prot_l1 |= ecc_mask;
476 mem_types[MT_HIGH_VECTORS].prot_l1 |= ecc_mask; 488 mem_types[MT_HIGH_VECTORS].prot_l1 |= ecc_mask;
477 mem_types[MT_MEMORY].prot_sect |= ecc_mask | cp->pmd; 489 mem_types[MT_MEMORY].prot_sect |= ecc_mask | cp->pmd;
490 mem_types[MT_MEMORY].prot_pte |= kern_pgprot;
491 mem_types[MT_MEMORY_NONCACHED].prot_sect |= ecc_mask;
478 mem_types[MT_ROM].prot_sect |= cp->pmd; 492 mem_types[MT_ROM].prot_sect |= cp->pmd;
479 493
480 switch (cp->pmd) { 494 switch (cp->pmd) {
@@ -498,6 +512,19 @@ static void __init build_mem_type_table(void)
498 } 512 }
499} 513}
500 514
515#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
516pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
517 unsigned long size, pgprot_t vma_prot)
518{
519 if (!pfn_valid(pfn))
520 return pgprot_noncached(vma_prot);
521 else if (file->f_flags & O_SYNC)
522 return pgprot_writecombine(vma_prot);
523 return vma_prot;
524}
525EXPORT_SYMBOL(phys_mem_access_prot);
526#endif
527
501#define vectors_base() (vectors_high() ? 0xffff0000 : 0) 528#define vectors_base() (vectors_high() ? 0xffff0000 : 0)
502 529
503static void __init *early_alloc(unsigned long sz) 530static void __init *early_alloc(unsigned long sz)
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 6a8506d99ee9..7563ff0141bd 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -186,13 +186,14 @@ cpu_v7_name:
186 * It is assumed that: 186 * It is assumed that:
187 * - cache type register is implemented 187 * - cache type register is implemented
188 */ 188 */
189__v7_setup: 189__v7_ca9mp_setup:
190#ifdef CONFIG_SMP 190#ifdef CONFIG_SMP
191 mrc p15, 0, r0, c1, c0, 1 191 mrc p15, 0, r0, c1, c0, 1
192 tst r0, #(1 << 6) @ SMP/nAMP mode enabled? 192 tst r0, #(1 << 6) @ SMP/nAMP mode enabled?
193 orreq r0, r0, #(1 << 6) | (1 << 0) @ Enable SMP/nAMP mode and 193 orreq r0, r0, #(1 << 6) | (1 << 0) @ Enable SMP/nAMP mode and
194 mcreq p15, 0, r0, c1, c0, 1 @ TLB ops broadcasting 194 mcreq p15, 0, r0, c1, c0, 1 @ TLB ops broadcasting
195#endif 195#endif
196__v7_setup:
196 adr r12, __v7_setup_stack @ the local stack 197 adr r12, __v7_setup_stack @ the local stack
197 stmia r12, {r0-r5, r7, r9, r11, lr} 198 stmia r12, {r0-r5, r7, r9, r11, lr}
198 bl v7_flush_dcache_all 199 bl v7_flush_dcache_all
@@ -201,11 +202,16 @@ __v7_setup:
201 mrc p15, 0, r0, c0, c0, 0 @ read main ID register 202 mrc p15, 0, r0, c0, c0, 0 @ read main ID register
202 and r10, r0, #0xff000000 @ ARM? 203 and r10, r0, #0xff000000 @ ARM?
203 teq r10, #0x41000000 204 teq r10, #0x41000000
204 bne 2f 205 bne 3f
205 and r5, r0, #0x00f00000 @ variant 206 and r5, r0, #0x00f00000 @ variant
206 and r6, r0, #0x0000000f @ revision 207 and r6, r0, #0x0000000f @ revision
207 orr r0, r6, r5, lsr #20-4 @ combine variant and revision 208 orr r6, r6, r5, lsr #20-4 @ combine variant and revision
209 ubfx r0, r0, #4, #12 @ primary part number
208 210
211 /* Cortex-A8 Errata */
212 ldr r10, =0x00000c08 @ Cortex-A8 primary part number
213 teq r0, r10
214 bne 2f
209#ifdef CONFIG_ARM_ERRATA_430973 215#ifdef CONFIG_ARM_ERRATA_430973
210 teq r5, #0x00100000 @ only present in r1p* 216 teq r5, #0x00100000 @ only present in r1p*
211 mrceq p15, 0, r10, c1, c0, 1 @ read aux control register 217 mrceq p15, 0, r10, c1, c0, 1 @ read aux control register
@@ -213,21 +219,42 @@ __v7_setup:
213 mcreq p15, 0, r10, c1, c0, 1 @ write aux control register 219 mcreq p15, 0, r10, c1, c0, 1 @ write aux control register
214#endif 220#endif
215#ifdef CONFIG_ARM_ERRATA_458693 221#ifdef CONFIG_ARM_ERRATA_458693
216 teq r0, #0x20 @ only present in r2p0 222 teq r6, #0x20 @ only present in r2p0
217 mrceq p15, 0, r10, c1, c0, 1 @ read aux control register 223 mrceq p15, 0, r10, c1, c0, 1 @ read aux control register
218 orreq r10, r10, #(1 << 5) @ set L1NEON to 1 224 orreq r10, r10, #(1 << 5) @ set L1NEON to 1
219 orreq r10, r10, #(1 << 9) @ set PLDNOP to 1 225 orreq r10, r10, #(1 << 9) @ set PLDNOP to 1
220 mcreq p15, 0, r10, c1, c0, 1 @ write aux control register 226 mcreq p15, 0, r10, c1, c0, 1 @ write aux control register
221#endif 227#endif
222#ifdef CONFIG_ARM_ERRATA_460075 228#ifdef CONFIG_ARM_ERRATA_460075
223 teq r0, #0x20 @ only present in r2p0 229 teq r6, #0x20 @ only present in r2p0
224 mrceq p15, 1, r10, c9, c0, 2 @ read L2 cache aux ctrl register 230 mrceq p15, 1, r10, c9, c0, 2 @ read L2 cache aux ctrl register
225 tsteq r10, #1 << 22 231 tsteq r10, #1 << 22
226 orreq r10, r10, #(1 << 22) @ set the Write Allocate disable bit 232 orreq r10, r10, #(1 << 22) @ set the Write Allocate disable bit
227 mcreq p15, 1, r10, c9, c0, 2 @ write the L2 cache aux ctrl register 233 mcreq p15, 1, r10, c9, c0, 2 @ write the L2 cache aux ctrl register
228#endif 234#endif
235 b 3f
236
237 /* Cortex-A9 Errata */
2382: ldr r10, =0x00000c09 @ Cortex-A9 primary part number
239 teq r0, r10
240 bne 3f
241#ifdef CONFIG_ARM_ERRATA_742230
242 cmp r6, #0x22 @ only present up to r2p2
243 mrcle p15, 0, r10, c15, c0, 1 @ read diagnostic register
244 orrle r10, r10, #1 << 4 @ set bit #4
245 mcrle p15, 0, r10, c15, c0, 1 @ write diagnostic register
246#endif
247#ifdef CONFIG_ARM_ERRATA_742231
248 teq r6, #0x20 @ present in r2p0
249 teqne r6, #0x21 @ present in r2p1
250 teqne r6, #0x22 @ present in r2p2
251 mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register
252 orreq r10, r10, #1 << 12 @ set bit #12
253 orreq r10, r10, #1 << 22 @ set bit #22
254 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
255#endif
229 256
2302: mov r10, #0 2573: mov r10, #0
231#ifdef HARVARD_CACHE 258#ifdef HARVARD_CACHE
232 mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate 259 mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate
233#endif 260#endif
@@ -323,6 +350,29 @@ cpu_elf_name:
323 350
324 .section ".proc.info.init", #alloc, #execinstr 351 .section ".proc.info.init", #alloc, #execinstr
325 352
353 .type __v7_ca9mp_proc_info, #object
354__v7_ca9mp_proc_info:
355 .long 0x410fc090 @ Required ID value
356 .long 0xff0ffff0 @ Mask for ID
357 .long PMD_TYPE_SECT | \
358 PMD_SECT_AP_WRITE | \
359 PMD_SECT_AP_READ | \
360 PMD_FLAGS
361 .long PMD_TYPE_SECT | \
362 PMD_SECT_XN | \
363 PMD_SECT_AP_WRITE | \
364 PMD_SECT_AP_READ
365 b __v7_ca9mp_setup
366 .long cpu_arch_name
367 .long cpu_elf_name
368 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
369 .long cpu_v7_name
370 .long v7_processor_functions
371 .long v7wbi_tlb_fns
372 .long v6_user_fns
373 .long v7_cache_fns
374 .size __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info
375
326 /* 376 /*
327 * Match any ARMv7 processor core. 377 * Match any ARMv7 processor core.
328 */ 378 */
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c
index ea3ca86c5283..aedf9c1d645e 100644
--- a/arch/arm/plat-nomadik/timer.c
+++ b/arch/arm/plat-nomadik/timer.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-nomadik/timer.c 2 * linux/arch/arm/plat-nomadik/timer.c
3 * 3 *
4 * Copyright (C) 2008 STMicroelectronics 4 * Copyright (C) 2008 STMicroelectronics
5 * Copyright (C) 2010 Alessandro Rubini 5 * Copyright (C) 2010 Alessandro Rubini
@@ -75,7 +75,7 @@ static void nmdk_clkevt_mode(enum clock_event_mode mode,
75 cr = readl(mtu_base + MTU_CR(1)); 75 cr = readl(mtu_base + MTU_CR(1));
76 writel(0, mtu_base + MTU_LR(1)); 76 writel(0, mtu_base + MTU_LR(1));
77 writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(1)); 77 writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(1));
78 writel(0x2, mtu_base + MTU_IMSC); 78 writel(1 << 1, mtu_base + MTU_IMSC);
79 break; 79 break;
80 case CLOCK_EVT_MODE_SHUTDOWN: 80 case CLOCK_EVT_MODE_SHUTDOWN:
81 case CLOCK_EVT_MODE_UNUSED: 81 case CLOCK_EVT_MODE_UNUSED:
@@ -131,25 +131,23 @@ void __init nmdk_timer_init(void)
131{ 131{
132 unsigned long rate; 132 unsigned long rate;
133 struct clk *clk0; 133 struct clk *clk0;
134 struct clk *clk1; 134 u32 cr = MTU_CRn_32BITS;
135 u32 cr;
136 135
137 clk0 = clk_get_sys("mtu0", NULL); 136 clk0 = clk_get_sys("mtu0", NULL);
138 BUG_ON(IS_ERR(clk0)); 137 BUG_ON(IS_ERR(clk0));
139 138
140 clk1 = clk_get_sys("mtu1", NULL);
141 BUG_ON(IS_ERR(clk1));
142
143 clk_enable(clk0); 139 clk_enable(clk0);
144 clk_enable(clk1);
145 140
146 /* 141 /*
147 * Tick rate is 2.4MHz for Nomadik and 110MHz for ux500: 142 * Tick rate is 2.4MHz for Nomadik and 2.4Mhz, 100MHz or 133 MHz
148 * use a divide-by-16 counter if it's more than 16MHz 143 * for ux500.
144 * Use a divide-by-16 counter if the tick rate is more than 32MHz.
145 * At 32 MHz, the timer (with 32 bit counter) can be programmed
146 * to wake-up at a max 127s a head in time. Dividing a 2.4 MHz timer
147 * with 16 gives too low timer resolution.
149 */ 148 */
150 cr = MTU_CRn_32BITS;;
151 rate = clk_get_rate(clk0); 149 rate = clk_get_rate(clk0);
152 if (rate > 16 << 20) { 150 if (rate > 32000000) {
153 rate /= 16; 151 rate /= 16;
154 cr |= MTU_CRn_PRESCALE_16; 152 cr |= MTU_CRn_PRESCALE_16;
155 } else { 153 } else {
@@ -170,15 +168,8 @@ void __init nmdk_timer_init(void)
170 pr_err("timer: failed to initialize clock source %s\n", 168 pr_err("timer: failed to initialize clock source %s\n",
171 nmdk_clksrc.name); 169 nmdk_clksrc.name);
172 170
173 /* Timer 1 is used for events, fix according to rate */ 171 /* Timer 1 is used for events */
174 cr = MTU_CRn_32BITS; 172
175 rate = clk_get_rate(clk1);
176 if (rate > 16 << 20) {
177 rate /= 16;
178 cr |= MTU_CRn_PRESCALE_16;
179 } else {
180 cr |= MTU_CRn_PRESCALE_1;
181 }
182 clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE); 173 clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE);
183 174
184 writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */ 175 writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 226b2e858d6c..10b3b4c63372 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -220,20 +220,7 @@ void __init omap_map_sram(void)
220 if (omap_sram_size == 0) 220 if (omap_sram_size == 0)
221 return; 221 return;
222 222
223 if (cpu_is_omap24xx()) {
224 omap_sram_io_desc[0].virtual = OMAP2_SRAM_VA;
225
226 base = OMAP2_SRAM_PA;
227 base = ROUND_DOWN(base, PAGE_SIZE);
228 omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
229 }
230
231 if (cpu_is_omap34xx()) { 223 if (cpu_is_omap34xx()) {
232 omap_sram_io_desc[0].virtual = OMAP3_SRAM_VA;
233 base = OMAP3_SRAM_PA;
234 base = ROUND_DOWN(base, PAGE_SIZE);
235 omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
236
237 /* 224 /*
238 * SRAM must be marked as non-cached on OMAP3 since the 225 * SRAM must be marked as non-cached on OMAP3 since the
239 * CORE DPLL M2 divider change code (in SRAM) runs with the 226 * CORE DPLL M2 divider change code (in SRAM) runs with the
@@ -244,13 +231,11 @@ void __init omap_map_sram(void)
244 omap_sram_io_desc[0].type = MT_MEMORY_NONCACHED; 231 omap_sram_io_desc[0].type = MT_MEMORY_NONCACHED;
245 } 232 }
246 233
247 if (cpu_is_omap44xx()) { 234 omap_sram_io_desc[0].virtual = omap_sram_base;
248 omap_sram_io_desc[0].virtual = OMAP4_SRAM_VA; 235 base = omap_sram_start;
249 base = OMAP4_SRAM_PA; 236 base = ROUND_DOWN(base, PAGE_SIZE);
250 base = ROUND_DOWN(base, PAGE_SIZE); 237 omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
251 omap_sram_io_desc[0].pfn = __phys_to_pfn(base); 238 omap_sram_io_desc[0].length = ROUND_DOWN(omap_sram_size, PAGE_SIZE);
252 }
253 omap_sram_io_desc[0].length = 1024 * 1024; /* Use section desc */
254 iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc)); 239 iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
255 240
256 printk(KERN_INFO "SRAM: Mapped pa 0x%08lx to va 0x%08lx size: 0x%lx\n", 241 printk(KERN_INFO "SRAM: Mapped pa 0x%08lx to va 0x%08lx size: 0x%lx\n",
diff --git a/arch/m32r/include/asm/signal.h b/arch/m32r/include/asm/signal.h
index 9c1acb2b1a92..b2eeb0de1c8d 100644
--- a/arch/m32r/include/asm/signal.h
+++ b/arch/m32r/include/asm/signal.h
@@ -157,7 +157,6 @@ typedef struct sigaltstack {
157#undef __HAVE_ARCH_SIG_BITOPS 157#undef __HAVE_ARCH_SIG_BITOPS
158 158
159struct pt_regs; 159struct pt_regs;
160extern int do_signal(struct pt_regs *regs, sigset_t *oldset);
161 160
162#define ptrace_signal_deliver(regs, cookie) do { } while (0) 161#define ptrace_signal_deliver(regs, cookie) do { } while (0)
163 162
diff --git a/arch/m32r/include/asm/unistd.h b/arch/m32r/include/asm/unistd.h
index 76125777483c..c70545689da8 100644
--- a/arch/m32r/include/asm/unistd.h
+++ b/arch/m32r/include/asm/unistd.h
@@ -351,6 +351,7 @@
351#define __ARCH_WANT_SYS_OLD_GETRLIMIT /*will be unused*/ 351#define __ARCH_WANT_SYS_OLD_GETRLIMIT /*will be unused*/
352#define __ARCH_WANT_SYS_OLDUMOUNT 352#define __ARCH_WANT_SYS_OLDUMOUNT
353#define __ARCH_WANT_SYS_RT_SIGACTION 353#define __ARCH_WANT_SYS_RT_SIGACTION
354#define __ARCH_WANT_SYS_RT_SIGSUSPEND
354 355
355#define __IGNORE_lchown 356#define __IGNORE_lchown
356#define __IGNORE_setuid 357#define __IGNORE_setuid
diff --git a/arch/m32r/kernel/entry.S b/arch/m32r/kernel/entry.S
index 403869833b98..225412bc227e 100644
--- a/arch/m32r/kernel/entry.S
+++ b/arch/m32r/kernel/entry.S
@@ -235,10 +235,9 @@ work_resched:
235work_notifysig: ; deal with pending signals and 235work_notifysig: ; deal with pending signals and
236 ; notify-resume requests 236 ; notify-resume requests
237 mv r0, sp ; arg1 : struct pt_regs *regs 237 mv r0, sp ; arg1 : struct pt_regs *regs
238 ldi r1, #0 ; arg2 : sigset_t *oldset 238 mv r1, r9 ; arg2 : __u32 thread_info_flags
239 mv r2, r9 ; arg3 : __u32 thread_info_flags
240 bl do_notify_resume 239 bl do_notify_resume
241 bra restore_all 240 bra resume_userspace
242 241
243 ; perform syscall exit tracing 242 ; perform syscall exit tracing
244 ALIGN 243 ALIGN
diff --git a/arch/m32r/kernel/ptrace.c b/arch/m32r/kernel/ptrace.c
index e555091eb97c..0021ade4cba8 100644
--- a/arch/m32r/kernel/ptrace.c
+++ b/arch/m32r/kernel/ptrace.c
@@ -592,16 +592,17 @@ void user_enable_single_step(struct task_struct *child)
592 592
593 if (access_process_vm(child, pc&~3, &insn, sizeof(insn), 0) 593 if (access_process_vm(child, pc&~3, &insn, sizeof(insn), 0)
594 != sizeof(insn)) 594 != sizeof(insn))
595 break; 595 return -EIO;
596 596
597 compute_next_pc(insn, pc, &next_pc, child); 597 compute_next_pc(insn, pc, &next_pc, child);
598 if (next_pc & 0x80000000) 598 if (next_pc & 0x80000000)
599 break; 599 return -EIO;
600 600
601 if (embed_debug_trap(child, next_pc)) 601 if (embed_debug_trap(child, next_pc))
602 break; 602 return -EIO;
603 603
604 invalidate_cache(); 604 invalidate_cache();
605 return 0;
605} 606}
606 607
607void user_disable_single_step(struct task_struct *child) 608void user_disable_single_step(struct task_struct *child)
diff --git a/arch/m32r/kernel/signal.c b/arch/m32r/kernel/signal.c
index 144b0f124fc7..7bbe38645ed5 100644
--- a/arch/m32r/kernel/signal.c
+++ b/arch/m32r/kernel/signal.c
@@ -28,37 +28,6 @@
28 28
29#define DEBUG_SIG 0 29#define DEBUG_SIG 0
30 30
31#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
32
33int do_signal(struct pt_regs *, sigset_t *);
34
35asmlinkage int
36sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize,
37 unsigned long r2, unsigned long r3, unsigned long r4,
38 unsigned long r5, unsigned long r6, struct pt_regs *regs)
39{
40 sigset_t newset;
41
42 /* XXX: Don't preclude handling different sized sigset_t's. */
43 if (sigsetsize != sizeof(sigset_t))
44 return -EINVAL;
45
46 if (copy_from_user(&newset, unewset, sizeof(newset)))
47 return -EFAULT;
48 sigdelsetmask(&newset, sigmask(SIGKILL)|sigmask(SIGSTOP));
49
50 spin_lock_irq(&current->sighand->siglock);
51 current->saved_sigmask = current->blocked;
52 current->blocked = newset;
53 recalc_sigpending();
54 spin_unlock_irq(&current->sighand->siglock);
55
56 current->state = TASK_INTERRUPTIBLE;
57 schedule();
58 set_thread_flag(TIF_RESTORE_SIGMASK);
59 return -ERESTARTNOHAND;
60}
61
62asmlinkage int 31asmlinkage int
63sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, 32sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
64 unsigned long r2, unsigned long r3, unsigned long r4, 33 unsigned long r2, unsigned long r3, unsigned long r4,
@@ -218,7 +187,7 @@ get_sigframe(struct k_sigaction *ka, unsigned long sp, size_t frame_size)
218 return (void __user *)((sp - frame_size) & -8ul); 187 return (void __user *)((sp - frame_size) & -8ul);
219} 188}
220 189
221static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, 190static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
222 sigset_t *set, struct pt_regs *regs) 191 sigset_t *set, struct pt_regs *regs)
223{ 192{
224 struct rt_sigframe __user *frame; 193 struct rt_sigframe __user *frame;
@@ -275,22 +244,34 @@ static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
275 current->comm, current->pid, frame, regs->pc); 244 current->comm, current->pid, frame, regs->pc);
276#endif 245#endif
277 246
278 return; 247 return 0;
279 248
280give_sigsegv: 249give_sigsegv:
281 force_sigsegv(sig, current); 250 force_sigsegv(sig, current);
251 return -EFAULT;
252}
253
254static int prev_insn(struct pt_regs *regs)
255{
256 u16 inst;
257 if (get_user(&inst, (u16 __user *)(regs->bpc - 2)))
258 return -EFAULT;
259 if ((inst & 0xfff0) == 0x10f0) /* trap ? */
260 regs->bpc -= 2;
261 else
262 regs->bpc -= 4;
263 regs->syscall_nr = -1;
264 return 0;
282} 265}
283 266
284/* 267/*
285 * OK, we're invoking a handler 268 * OK, we're invoking a handler
286 */ 269 */
287 270
288static void 271static int
289handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info, 272handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,
290 sigset_t *oldset, struct pt_regs *regs) 273 sigset_t *oldset, struct pt_regs *regs)
291{ 274{
292 unsigned short inst;
293
294 /* Are we from a system call? */ 275 /* Are we from a system call? */
295 if (regs->syscall_nr >= 0) { 276 if (regs->syscall_nr >= 0) {
296 /* If so, check system call restarting.. */ 277 /* If so, check system call restarting.. */
@@ -308,16 +289,14 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,
308 /* fallthrough */ 289 /* fallthrough */
309 case -ERESTARTNOINTR: 290 case -ERESTARTNOINTR:
310 regs->r0 = regs->orig_r0; 291 regs->r0 = regs->orig_r0;
311 inst = *(unsigned short *)(regs->bpc - 2); 292 if (prev_insn(regs) < 0)
312 if ((inst & 0xfff0) == 0x10f0) /* trap ? */ 293 return -EFAULT;
313 regs->bpc -= 2;
314 else
315 regs->bpc -= 4;
316 } 294 }
317 } 295 }
318 296
319 /* Set up the stack frame */ 297 /* Set up the stack frame */
320 setup_rt_frame(sig, ka, info, oldset, regs); 298 if (setup_rt_frame(sig, ka, info, oldset, regs))
299 return -EFAULT;
321 300
322 spin_lock_irq(&current->sighand->siglock); 301 spin_lock_irq(&current->sighand->siglock);
323 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask); 302 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
@@ -325,6 +304,7 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,
325 sigaddset(&current->blocked,sig); 304 sigaddset(&current->blocked,sig);
326 recalc_sigpending(); 305 recalc_sigpending();
327 spin_unlock_irq(&current->sighand->siglock); 306 spin_unlock_irq(&current->sighand->siglock);
307 return 0;
328} 308}
329 309
330/* 310/*
@@ -332,12 +312,12 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,
332 * want to handle. Thus you cannot kill init even with a SIGKILL even by 312 * want to handle. Thus you cannot kill init even with a SIGKILL even by
333 * mistake. 313 * mistake.
334 */ 314 */
335int do_signal(struct pt_regs *regs, sigset_t *oldset) 315static void do_signal(struct pt_regs *regs)
336{ 316{
337 siginfo_t info; 317 siginfo_t info;
338 int signr; 318 int signr;
339 struct k_sigaction ka; 319 struct k_sigaction ka;
340 unsigned short inst; 320 sigset_t *oldset;
341 321
342 /* 322 /*
343 * We want the common case to go fast, which 323 * We want the common case to go fast, which
@@ -346,12 +326,14 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset)
346 * if so. 326 * if so.
347 */ 327 */
348 if (!user_mode(regs)) 328 if (!user_mode(regs))
349 return 1; 329 return;
350 330
351 if (try_to_freeze()) 331 if (try_to_freeze())
352 goto no_signal; 332 goto no_signal;
353 333
354 if (!oldset) 334 if (test_thread_flag(TIF_RESTORE_SIGMASK))
335 oldset = &current->saved_sigmask;
336 else
355 oldset = &current->blocked; 337 oldset = &current->blocked;
356 338
357 signr = get_signal_to_deliver(&info, &ka, regs, NULL); 339 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
@@ -363,8 +345,10 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset)
363 */ 345 */
364 346
365 /* Whee! Actually deliver the signal. */ 347 /* Whee! Actually deliver the signal. */
366 handle_signal(signr, &ka, &info, oldset, regs); 348 if (handle_signal(signr, &ka, &info, oldset, regs) == 0)
367 return 1; 349 clear_thread_flag(TIF_RESTORE_SIGMASK);
350
351 return;
368 } 352 }
369 353
370 no_signal: 354 no_signal:
@@ -375,31 +359,24 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset)
375 regs->r0 == -ERESTARTSYS || 359 regs->r0 == -ERESTARTSYS ||
376 regs->r0 == -ERESTARTNOINTR) { 360 regs->r0 == -ERESTARTNOINTR) {
377 regs->r0 = regs->orig_r0; 361 regs->r0 = regs->orig_r0;
378 inst = *(unsigned short *)(regs->bpc - 2); 362 prev_insn(regs);
379 if ((inst & 0xfff0) == 0x10f0) /* trap ? */ 363 } else if (regs->r0 == -ERESTART_RESTARTBLOCK){
380 regs->bpc -= 2;
381 else
382 regs->bpc -= 4;
383 }
384 if (regs->r0 == -ERESTART_RESTARTBLOCK){
385 regs->r0 = regs->orig_r0; 364 regs->r0 = regs->orig_r0;
386 regs->r7 = __NR_restart_syscall; 365 regs->r7 = __NR_restart_syscall;
387 inst = *(unsigned short *)(regs->bpc - 2); 366 prev_insn(regs);
388 if ((inst & 0xfff0) == 0x10f0) /* trap ? */
389 regs->bpc -= 2;
390 else
391 regs->bpc -= 4;
392 } 367 }
393 } 368 }
394 return 0; 369 if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
370 clear_thread_flag(TIF_RESTORE_SIGMASK);
371 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
372 }
395} 373}
396 374
397/* 375/*
398 * notification of userspace execution resumption 376 * notification of userspace execution resumption
399 * - triggered by current->work.notify_resume 377 * - triggered by current->work.notify_resume
400 */ 378 */
401void do_notify_resume(struct pt_regs *regs, sigset_t *oldset, 379void do_notify_resume(struct pt_regs *regs, __u32 thread_info_flags)
402 __u32 thread_info_flags)
403{ 380{
404 /* Pending single-step? */ 381 /* Pending single-step? */
405 if (thread_info_flags & _TIF_SINGLESTEP) 382 if (thread_info_flags & _TIF_SINGLESTEP)
@@ -407,7 +384,7 @@ void do_notify_resume(struct pt_regs *regs, sigset_t *oldset,
407 384
408 /* deal with pending signal delivery */ 385 /* deal with pending signal delivery */
409 if (thread_info_flags & _TIF_SIGPENDING) 386 if (thread_info_flags & _TIF_SIGPENDING)
410 do_signal(regs,oldset); 387 do_signal(regs);
411 388
412 if (thread_info_flags & _TIF_NOTIFY_RESUME) { 389 if (thread_info_flags & _TIF_NOTIFY_RESUME) {
413 clear_thread_flag(TIF_NOTIFY_RESUME); 390 clear_thread_flag(TIF_NOTIFY_RESUME);
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig
index 444b9f918fdf..7c2a2f7f8dc1 100644
--- a/arch/mn10300/Kconfig
+++ b/arch/mn10300/Kconfig
@@ -8,7 +8,6 @@ mainmenu "Linux Kernel Configuration"
8config MN10300 8config MN10300
9 def_bool y 9 def_bool y
10 select HAVE_OPROFILE 10 select HAVE_OPROFILE
11 select HAVE_ARCH_TRACEHOOK
12 11
13config AM33 12config AM33
14 def_bool y 13 def_bool y
diff --git a/arch/mn10300/Kconfig.debug b/arch/mn10300/Kconfig.debug
index ff80e86b9bd2..ce83c74b3fd7 100644
--- a/arch/mn10300/Kconfig.debug
+++ b/arch/mn10300/Kconfig.debug
@@ -101,7 +101,7 @@ config GDBSTUB_DEBUG_BREAKPOINT
101 101
102choice 102choice
103 prompt "GDB stub port" 103 prompt "GDB stub port"
104 default GDBSTUB_TTYSM0 104 default GDBSTUB_ON_TTYSM0
105 depends on GDBSTUB 105 depends on GDBSTUB
106 help 106 help
107 Select the serial port used for GDB-stub. 107 Select the serial port used for GDB-stub.
diff --git a/arch/mn10300/include/asm/bitops.h b/arch/mn10300/include/asm/bitops.h
index f49ac49e09ad..3f50e9661076 100644
--- a/arch/mn10300/include/asm/bitops.h
+++ b/arch/mn10300/include/asm/bitops.h
@@ -229,9 +229,9 @@ int ffs(int x)
229#include <asm-generic/bitops/hweight.h> 229#include <asm-generic/bitops/hweight.h>
230 230
231#define ext2_set_bit_atomic(lock, nr, addr) \ 231#define ext2_set_bit_atomic(lock, nr, addr) \
232 test_and_set_bit((nr) ^ 0x18, (addr)) 232 test_and_set_bit((nr), (addr))
233#define ext2_clear_bit_atomic(lock, nr, addr) \ 233#define ext2_clear_bit_atomic(lock, nr, addr) \
234 test_and_clear_bit((nr) ^ 0x18, (addr)) 234 test_and_clear_bit((nr), (addr))
235 235
236#include <asm-generic/bitops/ext2-non-atomic.h> 236#include <asm-generic/bitops/ext2-non-atomic.h>
237#include <asm-generic/bitops/minix-le.h> 237#include <asm-generic/bitops/minix-le.h>
diff --git a/arch/mn10300/include/asm/signal.h b/arch/mn10300/include/asm/signal.h
index 7e891fce2370..1865d72a86ff 100644
--- a/arch/mn10300/include/asm/signal.h
+++ b/arch/mn10300/include/asm/signal.h
@@ -78,7 +78,7 @@ typedef unsigned long sigset_t;
78 78
79/* These should not be considered constants from userland. */ 79/* These should not be considered constants from userland. */
80#define SIGRTMIN 32 80#define SIGRTMIN 32
81#define SIGRTMAX (_NSIG-1) 81#define SIGRTMAX _NSIG
82 82
83/* 83/*
84 * SA_FLAGS values: 84 * SA_FLAGS values:
diff --git a/arch/mn10300/kernel/signal.c b/arch/mn10300/kernel/signal.c
index 717db14c2cc3..d4de05ab7864 100644
--- a/arch/mn10300/kernel/signal.c
+++ b/arch/mn10300/kernel/signal.c
@@ -65,10 +65,10 @@ asmlinkage long sys_sigaction(int sig,
65 old_sigset_t mask; 65 old_sigset_t mask;
66 if (verify_area(VERIFY_READ, act, sizeof(*act)) || 66 if (verify_area(VERIFY_READ, act, sizeof(*act)) ||
67 __get_user(new_ka.sa.sa_handler, &act->sa_handler) || 67 __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
68 __get_user(new_ka.sa.sa_restorer, &act->sa_restorer)) 68 __get_user(new_ka.sa.sa_restorer, &act->sa_restorer) ||
69 __get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
70 __get_user(mask, &act->sa_mask))
69 return -EFAULT; 71 return -EFAULT;
70 __get_user(new_ka.sa.sa_flags, &act->sa_flags);
71 __get_user(mask, &act->sa_mask);
72 siginitset(&new_ka.sa.sa_mask, mask); 72 siginitset(&new_ka.sa.sa_mask, mask);
73 } 73 }
74 74
@@ -77,10 +77,10 @@ asmlinkage long sys_sigaction(int sig,
77 if (!ret && oact) { 77 if (!ret && oact) {
78 if (verify_area(VERIFY_WRITE, oact, sizeof(*oact)) || 78 if (verify_area(VERIFY_WRITE, oact, sizeof(*oact)) ||
79 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) || 79 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
80 __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer)) 80 __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer) ||
81 __put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
82 __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
81 return -EFAULT; 83 return -EFAULT;
82 __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
83 __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
84 } 84 }
85 85
86 return ret; 86 return ret;
@@ -102,6 +102,9 @@ static int restore_sigcontext(struct pt_regs *regs,
102{ 102{
103 unsigned int err = 0; 103 unsigned int err = 0;
104 104
105 /* Always make any pending restarted system calls return -EINTR */
106 current_thread_info()->restart_block.fn = do_no_restart_syscall;
107
105 if (is_using_fpu(current)) 108 if (is_using_fpu(current))
106 fpu_kill_state(current); 109 fpu_kill_state(current);
107 110
@@ -330,8 +333,6 @@ static int setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
330 regs->d0 = sig; 333 regs->d0 = sig;
331 regs->d1 = (unsigned long) &frame->sc; 334 regs->d1 = (unsigned long) &frame->sc;
332 335
333 set_fs(USER_DS);
334
335 /* the tracer may want to single-step inside the handler */ 336 /* the tracer may want to single-step inside the handler */
336 if (test_thread_flag(TIF_SINGLESTEP)) 337 if (test_thread_flag(TIF_SINGLESTEP))
337 ptrace_notify(SIGTRAP); 338 ptrace_notify(SIGTRAP);
@@ -345,7 +346,7 @@ static int setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
345 return 0; 346 return 0;
346 347
347give_sigsegv: 348give_sigsegv:
348 force_sig(SIGSEGV, current); 349 force_sigsegv(sig, current);
349 return -EFAULT; 350 return -EFAULT;
350} 351}
351 352
@@ -413,8 +414,6 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
413 regs->d0 = sig; 414 regs->d0 = sig;
414 regs->d1 = (long) &frame->info; 415 regs->d1 = (long) &frame->info;
415 416
416 set_fs(USER_DS);
417
418 /* the tracer may want to single-step inside the handler */ 417 /* the tracer may want to single-step inside the handler */
419 if (test_thread_flag(TIF_SINGLESTEP)) 418 if (test_thread_flag(TIF_SINGLESTEP))
420 ptrace_notify(SIGTRAP); 419 ptrace_notify(SIGTRAP);
@@ -428,10 +427,16 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
428 return 0; 427 return 0;
429 428
430give_sigsegv: 429give_sigsegv:
431 force_sig(SIGSEGV, current); 430 force_sigsegv(sig, current);
432 return -EFAULT; 431 return -EFAULT;
433} 432}
434 433
434static inline void stepback(struct pt_regs *regs)
435{
436 regs->pc -= 2;
437 regs->orig_d0 = -1;
438}
439
435/* 440/*
436 * handle the actual delivery of a signal to userspace 441 * handle the actual delivery of a signal to userspace
437 */ 442 */
@@ -459,7 +464,7 @@ static int handle_signal(int sig,
459 /* fallthrough */ 464 /* fallthrough */
460 case -ERESTARTNOINTR: 465 case -ERESTARTNOINTR:
461 regs->d0 = regs->orig_d0; 466 regs->d0 = regs->orig_d0;
462 regs->pc -= 2; 467 stepback(regs);
463 } 468 }
464 } 469 }
465 470
@@ -527,12 +532,12 @@ static void do_signal(struct pt_regs *regs)
527 case -ERESTARTSYS: 532 case -ERESTARTSYS:
528 case -ERESTARTNOINTR: 533 case -ERESTARTNOINTR:
529 regs->d0 = regs->orig_d0; 534 regs->d0 = regs->orig_d0;
530 regs->pc -= 2; 535 stepback(regs);
531 break; 536 break;
532 537
533 case -ERESTART_RESTARTBLOCK: 538 case -ERESTART_RESTARTBLOCK:
534 regs->d0 = __NR_restart_syscall; 539 regs->d0 = __NR_restart_syscall;
535 regs->pc -= 2; 540 stepback(regs);
536 break; 541 break;
537 } 542 }
538 } 543 }
diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c
index 7109f5b1baa8..2300426e531a 100644
--- a/arch/powerpc/kernel/signal.c
+++ b/arch/powerpc/kernel/signal.c
@@ -138,6 +138,7 @@ static int do_signal_pending(sigset_t *oldset, struct pt_regs *regs)
138 ti->local_flags &= ~_TLF_RESTORE_SIGMASK; 138 ti->local_flags &= ~_TLF_RESTORE_SIGMASK;
139 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL); 139 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
140 } 140 }
141 regs->trap = 0;
141 return 0; /* no signals delivered */ 142 return 0; /* no signals delivered */
142 } 143 }
143 144
@@ -164,6 +165,7 @@ static int do_signal_pending(sigset_t *oldset, struct pt_regs *regs)
164 ret = handle_rt_signal64(signr, &ka, &info, oldset, regs); 165 ret = handle_rt_signal64(signr, &ka, &info, oldset, regs);
165 } 166 }
166 167
168 regs->trap = 0;
167 if (ret) { 169 if (ret) {
168 spin_lock_irq(&current->sighand->siglock); 170 spin_lock_irq(&current->sighand->siglock);
169 sigorsets(&current->blocked, &current->blocked, 171 sigorsets(&current->blocked, &current->blocked,
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index 266610119f66..b96a3a010c26 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -511,6 +511,7 @@ static long restore_user_regs(struct pt_regs *regs,
511 if (!sig) 511 if (!sig)
512 save_r2 = (unsigned int)regs->gpr[2]; 512 save_r2 = (unsigned int)regs->gpr[2];
513 err = restore_general_regs(regs, sr); 513 err = restore_general_regs(regs, sr);
514 regs->trap = 0;
514 err |= __get_user(msr, &sr->mc_gregs[PT_MSR]); 515 err |= __get_user(msr, &sr->mc_gregs[PT_MSR]);
515 if (!sig) 516 if (!sig)
516 regs->gpr[2] = (unsigned long) save_r2; 517 regs->gpr[2] = (unsigned long) save_r2;
@@ -884,7 +885,6 @@ int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka,
884 regs->nip = (unsigned long) ka->sa.sa_handler; 885 regs->nip = (unsigned long) ka->sa.sa_handler;
885 /* enter the signal handler in big-endian mode */ 886 /* enter the signal handler in big-endian mode */
886 regs->msr &= ~MSR_LE; 887 regs->msr &= ~MSR_LE;
887 regs->trap = 0;
888 return 1; 888 return 1;
889 889
890badframe: 890badframe:
@@ -1228,7 +1228,6 @@ int handle_signal32(unsigned long sig, struct k_sigaction *ka,
1228 regs->nip = (unsigned long) ka->sa.sa_handler; 1228 regs->nip = (unsigned long) ka->sa.sa_handler;
1229 /* enter the signal handler in big-endian mode */ 1229 /* enter the signal handler in big-endian mode */
1230 regs->msr &= ~MSR_LE; 1230 regs->msr &= ~MSR_LE;
1231 regs->trap = 0;
1232 1231
1233 return 1; 1232 return 1;
1234 1233
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index 2fe6fc64b614..27c4a4584f80 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -178,7 +178,7 @@ static long restore_sigcontext(struct pt_regs *regs, sigset_t *set, int sig,
178 err |= __get_user(regs->xer, &sc->gp_regs[PT_XER]); 178 err |= __get_user(regs->xer, &sc->gp_regs[PT_XER]);
179 err |= __get_user(regs->ccr, &sc->gp_regs[PT_CCR]); 179 err |= __get_user(regs->ccr, &sc->gp_regs[PT_CCR]);
180 /* skip SOFTE */ 180 /* skip SOFTE */
181 err |= __get_user(regs->trap, &sc->gp_regs[PT_TRAP]); 181 regs->trap = 0;
182 err |= __get_user(regs->dar, &sc->gp_regs[PT_DAR]); 182 err |= __get_user(regs->dar, &sc->gp_regs[PT_DAR]);
183 err |= __get_user(regs->dsisr, &sc->gp_regs[PT_DSISR]); 183 err |= __get_user(regs->dsisr, &sc->gp_regs[PT_DSISR]);
184 err |= __get_user(regs->result, &sc->gp_regs[PT_RESULT]); 184 err |= __get_user(regs->result, &sc->gp_regs[PT_RESULT]);
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c
index 357ced3c33ff..6318e622cfb0 100644
--- a/arch/sparc/kernel/perf_event.c
+++ b/arch/sparc/kernel/perf_event.c
@@ -1038,6 +1038,7 @@ static int __hw_perf_event_init(struct perf_event *event)
1038 if (atomic_read(&nmi_active) < 0) 1038 if (atomic_read(&nmi_active) < 0)
1039 return -ENODEV; 1039 return -ENODEV;
1040 1040
1041 pmap = NULL;
1041 if (attr->type == PERF_TYPE_HARDWARE) { 1042 if (attr->type == PERF_TYPE_HARDWARE) {
1042 if (attr->config >= sparc_pmu->max_events) 1043 if (attr->config >= sparc_pmu->max_events)
1043 return -EINVAL; 1044 return -EINVAL;
@@ -1046,9 +1047,18 @@ static int __hw_perf_event_init(struct perf_event *event)
1046 pmap = sparc_map_cache_event(attr->config); 1047 pmap = sparc_map_cache_event(attr->config);
1047 if (IS_ERR(pmap)) 1048 if (IS_ERR(pmap))
1048 return PTR_ERR(pmap); 1049 return PTR_ERR(pmap);
1049 } else 1050 } else if (attr->type != PERF_TYPE_RAW)
1050 return -EOPNOTSUPP; 1051 return -EOPNOTSUPP;
1051 1052
1053 if (pmap) {
1054 hwc->event_base = perf_event_encode(pmap);
1055 } else {
1056 /* User gives us "(encoding << 16) | pic_mask" for
1057 * PERF_TYPE_RAW events.
1058 */
1059 hwc->event_base = attr->config;
1060 }
1061
1052 /* We save the enable bits in the config_base. */ 1062 /* We save the enable bits in the config_base. */
1053 hwc->config_base = sparc_pmu->irq_bit; 1063 hwc->config_base = sparc_pmu->irq_bit;
1054 if (!attr->exclude_user) 1064 if (!attr->exclude_user)
@@ -1058,8 +1068,6 @@ static int __hw_perf_event_init(struct perf_event *event)
1058 if (!attr->exclude_hv) 1068 if (!attr->exclude_hv)
1059 hwc->config_base |= sparc_pmu->hv_bit; 1069 hwc->config_base |= sparc_pmu->hv_bit;
1060 1070
1061 hwc->event_base = perf_event_encode(pmap);
1062
1063 n = 0; 1071 n = 0;
1064 if (event->group_leader != event) { 1072 if (event->group_leader != event) {
1065 n = collect_events(event->group_leader, 1073 n = collect_events(event->group_leader,
diff --git a/arch/sparc/kernel/signal32.c b/arch/sparc/kernel/signal32.c
index ea22cd373c64..75fad425e249 100644
--- a/arch/sparc/kernel/signal32.c
+++ b/arch/sparc/kernel/signal32.c
@@ -453,8 +453,66 @@ static int save_fpu_state32(struct pt_regs *regs, __siginfo_fpu_t __user *fpu)
453 return err; 453 return err;
454} 454}
455 455
456static void setup_frame32(struct k_sigaction *ka, struct pt_regs *regs, 456/* The I-cache flush instruction only works in the primary ASI, which
457 int signo, sigset_t *oldset) 457 * right now is the nucleus, aka. kernel space.
458 *
459 * Therefore we have to kick the instructions out using the kernel
460 * side linear mapping of the physical address backing the user
461 * instructions.
462 */
463static void flush_signal_insns(unsigned long address)
464{
465 unsigned long pstate, paddr;
466 pte_t *ptep, pte;
467 pgd_t *pgdp;
468 pud_t *pudp;
469 pmd_t *pmdp;
470
471 /* Commit all stores of the instructions we are about to flush. */
472 wmb();
473
474 /* Disable cross-call reception. In this way even a very wide
475 * munmap() on another cpu can't tear down the page table
476 * hierarchy from underneath us, since that can't complete
477 * until the IPI tlb flush returns.
478 */
479
480 __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate));
481 __asm__ __volatile__("wrpr %0, %1, %%pstate"
482 : : "r" (pstate), "i" (PSTATE_IE));
483
484 pgdp = pgd_offset(current->mm, address);
485 if (pgd_none(*pgdp))
486 goto out_irqs_on;
487 pudp = pud_offset(pgdp, address);
488 if (pud_none(*pudp))
489 goto out_irqs_on;
490 pmdp = pmd_offset(pudp, address);
491 if (pmd_none(*pmdp))
492 goto out_irqs_on;
493
494 ptep = pte_offset_map(pmdp, address);
495 pte = *ptep;
496 if (!pte_present(pte))
497 goto out_unmap;
498
499 paddr = (unsigned long) page_address(pte_page(pte));
500
501 __asm__ __volatile__("flush %0 + %1"
502 : /* no outputs */
503 : "r" (paddr),
504 "r" (address & (PAGE_SIZE - 1))
505 : "memory");
506
507out_unmap:
508 pte_unmap(ptep);
509out_irqs_on:
510 __asm__ __volatile__("wrpr %0, 0x0, %%pstate" : : "r" (pstate));
511
512}
513
514static int setup_frame32(struct k_sigaction *ka, struct pt_regs *regs,
515 int signo, sigset_t *oldset)
458{ 516{
459 struct signal_frame32 __user *sf; 517 struct signal_frame32 __user *sf;
460 int sigframe_size; 518 int sigframe_size;
@@ -547,13 +605,7 @@ static void setup_frame32(struct k_sigaction *ka, struct pt_regs *regs,
547 if (ka->ka_restorer) { 605 if (ka->ka_restorer) {
548 regs->u_regs[UREG_I7] = (unsigned long)ka->ka_restorer; 606 regs->u_regs[UREG_I7] = (unsigned long)ka->ka_restorer;
549 } else { 607 } else {
550 /* Flush instruction space. */
551 unsigned long address = ((unsigned long)&(sf->insns[0])); 608 unsigned long address = ((unsigned long)&(sf->insns[0]));
552 pgd_t *pgdp = pgd_offset(current->mm, address);
553 pud_t *pudp = pud_offset(pgdp, address);
554 pmd_t *pmdp = pmd_offset(pudp, address);
555 pte_t *ptep;
556 pte_t pte;
557 609
558 regs->u_regs[UREG_I7] = (unsigned long) (&(sf->insns[0]) - 2); 610 regs->u_regs[UREG_I7] = (unsigned long) (&(sf->insns[0]) - 2);
559 611
@@ -562,34 +614,22 @@ static void setup_frame32(struct k_sigaction *ka, struct pt_regs *regs,
562 if (err) 614 if (err)
563 goto sigsegv; 615 goto sigsegv;
564 616
565 preempt_disable(); 617 flush_signal_insns(address);
566 ptep = pte_offset_map(pmdp, address);
567 pte = *ptep;
568 if (pte_present(pte)) {
569 unsigned long page = (unsigned long)
570 page_address(pte_page(pte));
571
572 wmb();
573 __asm__ __volatile__("flush %0 + %1"
574 : /* no outputs */
575 : "r" (page),
576 "r" (address & (PAGE_SIZE - 1))
577 : "memory");
578 }
579 pte_unmap(ptep);
580 preempt_enable();
581 } 618 }
582 return; 619 return 0;
583 620
584sigill: 621sigill:
585 do_exit(SIGILL); 622 do_exit(SIGILL);
623 return -EINVAL;
624
586sigsegv: 625sigsegv:
587 force_sigsegv(signo, current); 626 force_sigsegv(signo, current);
627 return -EFAULT;
588} 628}
589 629
590static void setup_rt_frame32(struct k_sigaction *ka, struct pt_regs *regs, 630static int setup_rt_frame32(struct k_sigaction *ka, struct pt_regs *regs,
591 unsigned long signr, sigset_t *oldset, 631 unsigned long signr, sigset_t *oldset,
592 siginfo_t *info) 632 siginfo_t *info)
593{ 633{
594 struct rt_signal_frame32 __user *sf; 634 struct rt_signal_frame32 __user *sf;
595 int sigframe_size; 635 int sigframe_size;
@@ -687,12 +727,7 @@ static void setup_rt_frame32(struct k_sigaction *ka, struct pt_regs *regs,
687 if (ka->ka_restorer) 727 if (ka->ka_restorer)
688 regs->u_regs[UREG_I7] = (unsigned long)ka->ka_restorer; 728 regs->u_regs[UREG_I7] = (unsigned long)ka->ka_restorer;
689 else { 729 else {
690 /* Flush instruction space. */
691 unsigned long address = ((unsigned long)&(sf->insns[0])); 730 unsigned long address = ((unsigned long)&(sf->insns[0]));
692 pgd_t *pgdp = pgd_offset(current->mm, address);
693 pud_t *pudp = pud_offset(pgdp, address);
694 pmd_t *pmdp = pmd_offset(pudp, address);
695 pte_t *ptep;
696 731
697 regs->u_regs[UREG_I7] = (unsigned long) (&(sf->insns[0]) - 2); 732 regs->u_regs[UREG_I7] = (unsigned long) (&(sf->insns[0]) - 2);
698 733
@@ -704,38 +739,32 @@ static void setup_rt_frame32(struct k_sigaction *ka, struct pt_regs *regs,
704 if (err) 739 if (err)
705 goto sigsegv; 740 goto sigsegv;
706 741
707 preempt_disable(); 742 flush_signal_insns(address);
708 ptep = pte_offset_map(pmdp, address);
709 if (pte_present(*ptep)) {
710 unsigned long page = (unsigned long)
711 page_address(pte_page(*ptep));
712
713 wmb();
714 __asm__ __volatile__("flush %0 + %1"
715 : /* no outputs */
716 : "r" (page),
717 "r" (address & (PAGE_SIZE - 1))
718 : "memory");
719 }
720 pte_unmap(ptep);
721 preempt_enable();
722 } 743 }
723 return; 744 return 0;
724 745
725sigill: 746sigill:
726 do_exit(SIGILL); 747 do_exit(SIGILL);
748 return -EINVAL;
749
727sigsegv: 750sigsegv:
728 force_sigsegv(signr, current); 751 force_sigsegv(signr, current);
752 return -EFAULT;
729} 753}
730 754
731static inline void handle_signal32(unsigned long signr, struct k_sigaction *ka, 755static inline int handle_signal32(unsigned long signr, struct k_sigaction *ka,
732 siginfo_t *info, 756 siginfo_t *info,
733 sigset_t *oldset, struct pt_regs *regs) 757 sigset_t *oldset, struct pt_regs *regs)
734{ 758{
759 int err;
760
735 if (ka->sa.sa_flags & SA_SIGINFO) 761 if (ka->sa.sa_flags & SA_SIGINFO)
736 setup_rt_frame32(ka, regs, signr, oldset, info); 762 err = setup_rt_frame32(ka, regs, signr, oldset, info);
737 else 763 else
738 setup_frame32(ka, regs, signr, oldset); 764 err = setup_frame32(ka, regs, signr, oldset);
765
766 if (err)
767 return err;
739 768
740 spin_lock_irq(&current->sighand->siglock); 769 spin_lock_irq(&current->sighand->siglock);
741 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask); 770 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
@@ -743,6 +772,10 @@ static inline void handle_signal32(unsigned long signr, struct k_sigaction *ka,
743 sigaddset(&current->blocked,signr); 772 sigaddset(&current->blocked,signr);
744 recalc_sigpending(); 773 recalc_sigpending();
745 spin_unlock_irq(&current->sighand->siglock); 774 spin_unlock_irq(&current->sighand->siglock);
775
776 tracehook_signal_handler(signr, info, ka, regs, 0);
777
778 return 0;
746} 779}
747 780
748static inline void syscall_restart32(unsigned long orig_i0, struct pt_regs *regs, 781static inline void syscall_restart32(unsigned long orig_i0, struct pt_regs *regs,
@@ -789,16 +822,14 @@ void do_signal32(sigset_t *oldset, struct pt_regs * regs,
789 if (signr > 0) { 822 if (signr > 0) {
790 if (restart_syscall) 823 if (restart_syscall)
791 syscall_restart32(orig_i0, regs, &ka.sa); 824 syscall_restart32(orig_i0, regs, &ka.sa);
792 handle_signal32(signr, &ka, &info, oldset, regs); 825 if (handle_signal32(signr, &ka, &info, oldset, regs) == 0) {
793 826 /* A signal was successfully delivered; the saved
794 /* A signal was successfully delivered; the saved 827 * sigmask will have been stored in the signal frame,
795 * sigmask will have been stored in the signal frame, 828 * and will be restored by sigreturn, so we can simply
796 * and will be restored by sigreturn, so we can simply 829 * clear the TS_RESTORE_SIGMASK flag.
797 * clear the TS_RESTORE_SIGMASK flag. 830 */
798 */ 831 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
799 current_thread_info()->status &= ~TS_RESTORE_SIGMASK; 832 }
800
801 tracehook_signal_handler(signr, &info, &ka, regs, 0);
802 return; 833 return;
803 } 834 }
804 if (restart_syscall && 835 if (restart_syscall &&
@@ -809,12 +840,14 @@ void do_signal32(sigset_t *oldset, struct pt_regs * regs,
809 regs->u_regs[UREG_I0] = orig_i0; 840 regs->u_regs[UREG_I0] = orig_i0;
810 regs->tpc -= 4; 841 regs->tpc -= 4;
811 regs->tnpc -= 4; 842 regs->tnpc -= 4;
843 pt_regs_clear_syscall(regs);
812 } 844 }
813 if (restart_syscall && 845 if (restart_syscall &&
814 regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) { 846 regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) {
815 regs->u_regs[UREG_G1] = __NR_restart_syscall; 847 regs->u_regs[UREG_G1] = __NR_restart_syscall;
816 regs->tpc -= 4; 848 regs->tpc -= 4;
817 regs->tnpc -= 4; 849 regs->tnpc -= 4;
850 pt_regs_clear_syscall(regs);
818 } 851 }
819 852
820 /* If there's no signal to deliver, we just put the saved sigmask 853 /* If there's no signal to deliver, we just put the saved sigmask
diff --git a/arch/sparc/kernel/signal_32.c b/arch/sparc/kernel/signal_32.c
index 9882df92ba0a..5e5c5fd03783 100644
--- a/arch/sparc/kernel/signal_32.c
+++ b/arch/sparc/kernel/signal_32.c
@@ -315,8 +315,8 @@ save_fpu_state(struct pt_regs *regs, __siginfo_fpu_t __user *fpu)
315 return err; 315 return err;
316} 316}
317 317
318static void setup_frame(struct k_sigaction *ka, struct pt_regs *regs, 318static int setup_frame(struct k_sigaction *ka, struct pt_regs *regs,
319 int signo, sigset_t *oldset) 319 int signo, sigset_t *oldset)
320{ 320{
321 struct signal_frame __user *sf; 321 struct signal_frame __user *sf;
322 int sigframe_size, err; 322 int sigframe_size, err;
@@ -384,16 +384,19 @@ static void setup_frame(struct k_sigaction *ka, struct pt_regs *regs,
384 /* Flush instruction space. */ 384 /* Flush instruction space. */
385 flush_sig_insns(current->mm, (unsigned long) &(sf->insns[0])); 385 flush_sig_insns(current->mm, (unsigned long) &(sf->insns[0]));
386 } 386 }
387 return; 387 return 0;
388 388
389sigill_and_return: 389sigill_and_return:
390 do_exit(SIGILL); 390 do_exit(SIGILL);
391 return -EINVAL;
392
391sigsegv: 393sigsegv:
392 force_sigsegv(signo, current); 394 force_sigsegv(signo, current);
395 return -EFAULT;
393} 396}
394 397
395static void setup_rt_frame(struct k_sigaction *ka, struct pt_regs *regs, 398static int setup_rt_frame(struct k_sigaction *ka, struct pt_regs *regs,
396 int signo, sigset_t *oldset, siginfo_t *info) 399 int signo, sigset_t *oldset, siginfo_t *info)
397{ 400{
398 struct rt_signal_frame __user *sf; 401 struct rt_signal_frame __user *sf;
399 int sigframe_size; 402 int sigframe_size;
@@ -466,22 +469,30 @@ static void setup_rt_frame(struct k_sigaction *ka, struct pt_regs *regs,
466 /* Flush instruction space. */ 469 /* Flush instruction space. */
467 flush_sig_insns(current->mm, (unsigned long) &(sf->insns[0])); 470 flush_sig_insns(current->mm, (unsigned long) &(sf->insns[0]));
468 } 471 }
469 return; 472 return 0;
470 473
471sigill: 474sigill:
472 do_exit(SIGILL); 475 do_exit(SIGILL);
476 return -EINVAL;
477
473sigsegv: 478sigsegv:
474 force_sigsegv(signo, current); 479 force_sigsegv(signo, current);
480 return -EFAULT;
475} 481}
476 482
477static inline void 483static inline int
478handle_signal(unsigned long signr, struct k_sigaction *ka, 484handle_signal(unsigned long signr, struct k_sigaction *ka,
479 siginfo_t *info, sigset_t *oldset, struct pt_regs *regs) 485 siginfo_t *info, sigset_t *oldset, struct pt_regs *regs)
480{ 486{
487 int err;
488
481 if (ka->sa.sa_flags & SA_SIGINFO) 489 if (ka->sa.sa_flags & SA_SIGINFO)
482 setup_rt_frame(ka, regs, signr, oldset, info); 490 err = setup_rt_frame(ka, regs, signr, oldset, info);
483 else 491 else
484 setup_frame(ka, regs, signr, oldset); 492 err = setup_frame(ka, regs, signr, oldset);
493
494 if (err)
495 return err;
485 496
486 spin_lock_irq(&current->sighand->siglock); 497 spin_lock_irq(&current->sighand->siglock);
487 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask); 498 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
@@ -489,6 +500,10 @@ handle_signal(unsigned long signr, struct k_sigaction *ka,
489 sigaddset(&current->blocked, signr); 500 sigaddset(&current->blocked, signr);
490 recalc_sigpending(); 501 recalc_sigpending();
491 spin_unlock_irq(&current->sighand->siglock); 502 spin_unlock_irq(&current->sighand->siglock);
503
504 tracehook_signal_handler(signr, info, ka, regs, 0);
505
506 return 0;
492} 507}
493 508
494static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs, 509static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs,
@@ -546,17 +561,15 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
546 if (signr > 0) { 561 if (signr > 0) {
547 if (restart_syscall) 562 if (restart_syscall)
548 syscall_restart(orig_i0, regs, &ka.sa); 563 syscall_restart(orig_i0, regs, &ka.sa);
549 handle_signal(signr, &ka, &info, oldset, regs); 564 if (handle_signal(signr, &ka, &info, oldset, regs) == 0) {
550 565 /* a signal was successfully delivered; the saved
551 /* a signal was successfully delivered; the saved 566 * sigmask will have been stored in the signal frame,
552 * sigmask will have been stored in the signal frame, 567 * and will be restored by sigreturn, so we can simply
553 * and will be restored by sigreturn, so we can simply 568 * clear the TIF_RESTORE_SIGMASK flag.
554 * clear the TIF_RESTORE_SIGMASK flag. 569 */
555 */ 570 if (test_thread_flag(TIF_RESTORE_SIGMASK))
556 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 571 clear_thread_flag(TIF_RESTORE_SIGMASK);
557 clear_thread_flag(TIF_RESTORE_SIGMASK); 572 }
558
559 tracehook_signal_handler(signr, &info, &ka, regs, 0);
560 return; 573 return;
561 } 574 }
562 if (restart_syscall && 575 if (restart_syscall &&
@@ -567,12 +580,14 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
567 regs->u_regs[UREG_I0] = orig_i0; 580 regs->u_regs[UREG_I0] = orig_i0;
568 regs->pc -= 4; 581 regs->pc -= 4;
569 regs->npc -= 4; 582 regs->npc -= 4;
583 pt_regs_clear_syscall(regs);
570 } 584 }
571 if (restart_syscall && 585 if (restart_syscall &&
572 regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) { 586 regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) {
573 regs->u_regs[UREG_G1] = __NR_restart_syscall; 587 regs->u_regs[UREG_G1] = __NR_restart_syscall;
574 regs->pc -= 4; 588 regs->pc -= 4;
575 regs->npc -= 4; 589 regs->npc -= 4;
590 pt_regs_clear_syscall(regs);
576 } 591 }
577 592
578 /* if there's no signal to deliver, we just put the saved sigmask 593 /* if there's no signal to deliver, we just put the saved sigmask
diff --git a/arch/sparc/kernel/signal_64.c b/arch/sparc/kernel/signal_64.c
index 9fa48c30037e..006fe4515886 100644
--- a/arch/sparc/kernel/signal_64.c
+++ b/arch/sparc/kernel/signal_64.c
@@ -409,7 +409,7 @@ static inline void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *
409 return (void __user *) sp; 409 return (void __user *) sp;
410} 410}
411 411
412static inline void 412static inline int
413setup_rt_frame(struct k_sigaction *ka, struct pt_regs *regs, 413setup_rt_frame(struct k_sigaction *ka, struct pt_regs *regs,
414 int signo, sigset_t *oldset, siginfo_t *info) 414 int signo, sigset_t *oldset, siginfo_t *info)
415{ 415{
@@ -483,26 +483,37 @@ setup_rt_frame(struct k_sigaction *ka, struct pt_regs *regs,
483 } 483 }
484 /* 4. return to kernel instructions */ 484 /* 4. return to kernel instructions */
485 regs->u_regs[UREG_I7] = (unsigned long)ka->ka_restorer; 485 regs->u_regs[UREG_I7] = (unsigned long)ka->ka_restorer;
486 return; 486 return 0;
487 487
488sigill: 488sigill:
489 do_exit(SIGILL); 489 do_exit(SIGILL);
490 return -EINVAL;
491
490sigsegv: 492sigsegv:
491 force_sigsegv(signo, current); 493 force_sigsegv(signo, current);
494 return -EFAULT;
492} 495}
493 496
494static inline void handle_signal(unsigned long signr, struct k_sigaction *ka, 497static inline int handle_signal(unsigned long signr, struct k_sigaction *ka,
495 siginfo_t *info, 498 siginfo_t *info,
496 sigset_t *oldset, struct pt_regs *regs) 499 sigset_t *oldset, struct pt_regs *regs)
497{ 500{
498 setup_rt_frame(ka, regs, signr, oldset, 501 int err;
499 (ka->sa.sa_flags & SA_SIGINFO) ? info : NULL); 502
503 err = setup_rt_frame(ka, regs, signr, oldset,
504 (ka->sa.sa_flags & SA_SIGINFO) ? info : NULL);
505 if (err)
506 return err;
500 spin_lock_irq(&current->sighand->siglock); 507 spin_lock_irq(&current->sighand->siglock);
501 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask); 508 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
502 if (!(ka->sa.sa_flags & SA_NOMASK)) 509 if (!(ka->sa.sa_flags & SA_NOMASK))
503 sigaddset(&current->blocked,signr); 510 sigaddset(&current->blocked,signr);
504 recalc_sigpending(); 511 recalc_sigpending();
505 spin_unlock_irq(&current->sighand->siglock); 512 spin_unlock_irq(&current->sighand->siglock);
513
514 tracehook_signal_handler(signr, info, ka, regs, 0);
515
516 return 0;
506} 517}
507 518
508static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs, 519static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs,
@@ -571,16 +582,14 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
571 if (signr > 0) { 582 if (signr > 0) {
572 if (restart_syscall) 583 if (restart_syscall)
573 syscall_restart(orig_i0, regs, &ka.sa); 584 syscall_restart(orig_i0, regs, &ka.sa);
574 handle_signal(signr, &ka, &info, oldset, regs); 585 if (handle_signal(signr, &ka, &info, oldset, regs) == 0) {
575 586 /* A signal was successfully delivered; the saved
576 /* A signal was successfully delivered; the saved 587 * sigmask will have been stored in the signal frame,
577 * sigmask will have been stored in the signal frame, 588 * and will be restored by sigreturn, so we can simply
578 * and will be restored by sigreturn, so we can simply 589 * clear the TS_RESTORE_SIGMASK flag.
579 * clear the TS_RESTORE_SIGMASK flag. 590 */
580 */ 591 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
581 current_thread_info()->status &= ~TS_RESTORE_SIGMASK; 592 }
582
583 tracehook_signal_handler(signr, &info, &ka, regs, 0);
584 return; 593 return;
585 } 594 }
586 if (restart_syscall && 595 if (restart_syscall &&
@@ -591,12 +600,14 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
591 regs->u_regs[UREG_I0] = orig_i0; 600 regs->u_regs[UREG_I0] = orig_i0;
592 regs->tpc -= 4; 601 regs->tpc -= 4;
593 regs->tnpc -= 4; 602 regs->tnpc -= 4;
603 pt_regs_clear_syscall(regs);
594 } 604 }
595 if (restart_syscall && 605 if (restart_syscall &&
596 regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) { 606 regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) {
597 regs->u_regs[UREG_G1] = __NR_restart_syscall; 607 regs->u_regs[UREG_G1] = __NR_restart_syscall;
598 regs->tpc -= 4; 608 regs->tpc -= 4;
599 regs->tnpc -= 4; 609 regs->tnpc -= 4;
610 pt_regs_clear_syscall(regs);
600 } 611 }
601 612
602 /* If there's no signal to deliver, we just put the saved sigmask 613 /* If there's no signal to deliver, we just put the saved sigmask
diff --git a/arch/tile/kernel/intvec_32.S b/arch/tile/kernel/intvec_32.S
index 84f296ca9e63..8f58bdff20d7 100644
--- a/arch/tile/kernel/intvec_32.S
+++ b/arch/tile/kernel/intvec_32.S
@@ -1506,13 +1506,6 @@ handle_ill:
1506 } 1506 }
1507 STD_ENDPROC(handle_ill) 1507 STD_ENDPROC(handle_ill)
1508 1508
1509 .pushsection .rodata, "a"
1510 .align 8
1511bpt_code:
1512 bpt
1513 ENDPROC(bpt_code)
1514 .popsection
1515
1516/* Various stub interrupt handlers and syscall handlers */ 1509/* Various stub interrupt handlers and syscall handlers */
1517 1510
1518STD_ENTRY_LOCAL(_kernel_double_fault) 1511STD_ENTRY_LOCAL(_kernel_double_fault)
diff --git a/arch/um/kernel/exec.c b/arch/um/kernel/exec.c
index cd145eda3579..49b5e1eb3262 100644
--- a/arch/um/kernel/exec.c
+++ b/arch/um/kernel/exec.c
@@ -62,7 +62,7 @@ static long execve1(const char *file,
62 return error; 62 return error;
63} 63}
64 64
65long um_execve(const char *file, char __user *__user *argv, char __user *__user *env) 65long um_execve(const char *file, const char __user *const __user *argv, const char __user *const __user *env)
66{ 66{
67 long err; 67 long err;
68 68
@@ -72,8 +72,8 @@ long um_execve(const char *file, char __user *__user *argv, char __user *__user
72 return err; 72 return err;
73} 73}
74 74
75long sys_execve(const char __user *file, char __user *__user *argv, 75long sys_execve(const char __user *file, const char __user *const __user *argv,
76 char __user *__user *env) 76 const char __user *const __user *env)
77{ 77{
78 long error; 78 long error;
79 char *filename; 79 char *filename;
diff --git a/arch/um/kernel/internal.h b/arch/um/kernel/internal.h
index 1303a105fe91..5bf97db24a04 100644
--- a/arch/um/kernel/internal.h
+++ b/arch/um/kernel/internal.h
@@ -1 +1 @@
extern long um_execve(const char *file, char __user *__user *argv, char __user *__user *env); extern long um_execve(const char *file, const char __user *const __user *argv, const char __user *const __user *env);
diff --git a/arch/um/kernel/syscall.c b/arch/um/kernel/syscall.c
index 5ddb246626db..f958cb876ee3 100644
--- a/arch/um/kernel/syscall.c
+++ b/arch/um/kernel/syscall.c
@@ -60,8 +60,8 @@ int kernel_execve(const char *filename,
60 60
61 fs = get_fs(); 61 fs = get_fs();
62 set_fs(KERNEL_DS); 62 set_fs(KERNEL_DS);
63 ret = um_execve(filename, (char __user *__user *)argv, 63 ret = um_execve(filename, (const char __user *const __user *)argv,
64 (char __user *__user *) envp); 64 (const char __user *const __user *) envp);
65 set_fs(fs); 65 set_fs(fs);
66 66
67 return ret; 67 return ret;
diff --git a/arch/x86/boot/early_serial_console.c b/arch/x86/boot/early_serial_console.c
index 030f4b93e255..5df2869c874b 100644
--- a/arch/x86/boot/early_serial_console.c
+++ b/arch/x86/boot/early_serial_console.c
@@ -58,7 +58,19 @@ static void parse_earlyprintk(void)
58 if (arg[pos] == ',') 58 if (arg[pos] == ',')
59 pos++; 59 pos++;
60 60
61 if (!strncmp(arg, "ttyS", 4)) { 61 /*
62 * make sure we have
63 * "serial,0x3f8,115200"
64 * "serial,ttyS0,115200"
65 * "ttyS0,115200"
66 */
67 if (pos == 7 && !strncmp(arg + pos, "0x", 2)) {
68 port = simple_strtoull(arg + pos, &e, 16);
69 if (port == 0 || arg + pos == e)
70 port = DEFAULT_SERIAL_PORT;
71 else
72 pos = e - arg;
73 } else if (!strncmp(arg + pos, "ttyS", 4)) {
62 static const int bases[] = { 0x3f8, 0x2f8 }; 74 static const int bases[] = { 0x3f8, 0x2f8 };
63 int idx = 0; 75 int idx = 0;
64 76
diff --git a/arch/x86/include/asm/amd_iommu_proto.h b/arch/x86/include/asm/amd_iommu_proto.h
index d2544f1d705d..cb030374b90a 100644
--- a/arch/x86/include/asm/amd_iommu_proto.h
+++ b/arch/x86/include/asm/amd_iommu_proto.h
@@ -38,4 +38,10 @@ static inline void amd_iommu_stats_init(void) { }
38 38
39#endif /* !CONFIG_AMD_IOMMU_STATS */ 39#endif /* !CONFIG_AMD_IOMMU_STATS */
40 40
41static inline bool is_rd890_iommu(struct pci_dev *pdev)
42{
43 return (pdev->vendor == PCI_VENDOR_ID_ATI) &&
44 (pdev->device == PCI_DEVICE_ID_RD890_IOMMU);
45}
46
41#endif /* _ASM_X86_AMD_IOMMU_PROTO_H */ 47#endif /* _ASM_X86_AMD_IOMMU_PROTO_H */
diff --git a/arch/x86/include/asm/amd_iommu_types.h b/arch/x86/include/asm/amd_iommu_types.h
index 7014e88bc779..08616180deaf 100644
--- a/arch/x86/include/asm/amd_iommu_types.h
+++ b/arch/x86/include/asm/amd_iommu_types.h
@@ -368,6 +368,9 @@ struct amd_iommu {
368 /* capabilities of that IOMMU read from ACPI */ 368 /* capabilities of that IOMMU read from ACPI */
369 u32 cap; 369 u32 cap;
370 370
371 /* flags read from acpi table */
372 u8 acpi_flags;
373
371 /* 374 /*
372 * Capability pointer. There could be more than one IOMMU per PCI 375 * Capability pointer. There could be more than one IOMMU per PCI
373 * device function if there are more than one AMD IOMMU capability 376 * device function if there are more than one AMD IOMMU capability
@@ -411,6 +414,15 @@ struct amd_iommu {
411 414
412 /* default dma_ops domain for that IOMMU */ 415 /* default dma_ops domain for that IOMMU */
413 struct dma_ops_domain *default_dom; 416 struct dma_ops_domain *default_dom;
417
418 /*
419 * This array is required to work around a potential BIOS bug.
420 * The BIOS may miss to restore parts of the PCI configuration
421 * space when the system resumes from S3. The result is that the
422 * IOMMU does not execute commands anymore which leads to system
423 * failure.
424 */
425 u32 cache_cfg[4];
414}; 426};
415 427
416/* 428/*
diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index 545776efeb16..bafd80defa43 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -309,7 +309,7 @@ static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
309static __always_inline int constant_test_bit(unsigned int nr, const volatile unsigned long *addr) 309static __always_inline int constant_test_bit(unsigned int nr, const volatile unsigned long *addr)
310{ 310{
311 return ((1UL << (nr % BITS_PER_LONG)) & 311 return ((1UL << (nr % BITS_PER_LONG)) &
312 (((unsigned long *)addr)[nr / BITS_PER_LONG])) != 0; 312 (addr[nr / BITS_PER_LONG])) != 0;
313} 313}
314 314
315static inline int variable_test_bit(int nr, volatile const unsigned long *addr) 315static inline int variable_test_bit(int nr, volatile const unsigned long *addr)
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index c6fbb7b430d1..3f76523589af 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -168,6 +168,7 @@
168#define X86_FEATURE_XSAVEOPT (7*32+ 4) /* Optimized Xsave */ 168#define X86_FEATURE_XSAVEOPT (7*32+ 4) /* Optimized Xsave */
169#define X86_FEATURE_PLN (7*32+ 5) /* Intel Power Limit Notification */ 169#define X86_FEATURE_PLN (7*32+ 5) /* Intel Power Limit Notification */
170#define X86_FEATURE_PTS (7*32+ 6) /* Intel Package Thermal Status */ 170#define X86_FEATURE_PTS (7*32+ 6) /* Intel Package Thermal Status */
171#define X86_FEATURE_DTS (7*32+ 7) /* Digital Thermal Sensor */
171 172
172/* Virtualization flags: Linux defined, word 8 */ 173/* Virtualization flags: Linux defined, word 8 */
173#define X86_FEATURE_TPR_SHADOW (8*32+ 0) /* Intel TPR Shadow */ 174#define X86_FEATURE_TPR_SHADOW (8*32+ 0) /* Intel TPR Shadow */
diff --git a/arch/x86/include/asm/hw_breakpoint.h b/arch/x86/include/asm/hw_breakpoint.h
index 528a11e8d3e3..824ca07860d0 100644
--- a/arch/x86/include/asm/hw_breakpoint.h
+++ b/arch/x86/include/asm/hw_breakpoint.h
@@ -20,7 +20,7 @@ struct arch_hw_breakpoint {
20#include <linux/list.h> 20#include <linux/list.h>
21 21
22/* Available HW breakpoint length encodings */ 22/* Available HW breakpoint length encodings */
23#define X86_BREAKPOINT_LEN_X 0x00 23#define X86_BREAKPOINT_LEN_X 0x40
24#define X86_BREAKPOINT_LEN_1 0x40 24#define X86_BREAKPOINT_LEN_1 0x40
25#define X86_BREAKPOINT_LEN_2 0x44 25#define X86_BREAKPOINT_LEN_2 0x44
26#define X86_BREAKPOINT_LEN_4 0x4c 26#define X86_BREAKPOINT_LEN_4 0x4c
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 0925676266bd..fedf32a8c3ec 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -11,6 +11,8 @@ ifdef CONFIG_FUNCTION_TRACER
11CFLAGS_REMOVE_tsc.o = -pg 11CFLAGS_REMOVE_tsc.o = -pg
12CFLAGS_REMOVE_rtc.o = -pg 12CFLAGS_REMOVE_rtc.o = -pg
13CFLAGS_REMOVE_paravirt-spinlocks.o = -pg 13CFLAGS_REMOVE_paravirt-spinlocks.o = -pg
14CFLAGS_REMOVE_pvclock.o = -pg
15CFLAGS_REMOVE_kvmclock.o = -pg
14CFLAGS_REMOVE_ftrace.o = -pg 16CFLAGS_REMOVE_ftrace.o = -pg
15CFLAGS_REMOVE_early_printk.o = -pg 17CFLAGS_REMOVE_early_printk.o = -pg
16endif 18endif
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index fa044e1e30a2..679b6450382b 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -1953,6 +1953,7 @@ static void __unmap_single(struct dma_ops_domain *dma_dom,
1953 size_t size, 1953 size_t size,
1954 int dir) 1954 int dir)
1955{ 1955{
1956 dma_addr_t flush_addr;
1956 dma_addr_t i, start; 1957 dma_addr_t i, start;
1957 unsigned int pages; 1958 unsigned int pages;
1958 1959
@@ -1960,6 +1961,7 @@ static void __unmap_single(struct dma_ops_domain *dma_dom,
1960 (dma_addr + size > dma_dom->aperture_size)) 1961 (dma_addr + size > dma_dom->aperture_size))
1961 return; 1962 return;
1962 1963
1964 flush_addr = dma_addr;
1963 pages = iommu_num_pages(dma_addr, size, PAGE_SIZE); 1965 pages = iommu_num_pages(dma_addr, size, PAGE_SIZE);
1964 dma_addr &= PAGE_MASK; 1966 dma_addr &= PAGE_MASK;
1965 start = dma_addr; 1967 start = dma_addr;
@@ -1974,7 +1976,7 @@ static void __unmap_single(struct dma_ops_domain *dma_dom,
1974 dma_ops_free_addresses(dma_dom, dma_addr, pages); 1976 dma_ops_free_addresses(dma_dom, dma_addr, pages);
1975 1977
1976 if (amd_iommu_unmap_flush || dma_dom->need_flush) { 1978 if (amd_iommu_unmap_flush || dma_dom->need_flush) {
1977 iommu_flush_pages(&dma_dom->domain, dma_addr, size); 1979 iommu_flush_pages(&dma_dom->domain, flush_addr, size);
1978 dma_dom->need_flush = false; 1980 dma_dom->need_flush = false;
1979 } 1981 }
1980} 1982}
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index 3cc63e2b8dd4..5a170cbbbed8 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -632,6 +632,13 @@ static void __init init_iommu_from_pci(struct amd_iommu *iommu)
632 iommu->last_device = calc_devid(MMIO_GET_BUS(range), 632 iommu->last_device = calc_devid(MMIO_GET_BUS(range),
633 MMIO_GET_LD(range)); 633 MMIO_GET_LD(range));
634 iommu->evt_msi_num = MMIO_MSI_NUM(misc); 634 iommu->evt_msi_num = MMIO_MSI_NUM(misc);
635
636 if (is_rd890_iommu(iommu->dev)) {
637 pci_read_config_dword(iommu->dev, 0xf0, &iommu->cache_cfg[0]);
638 pci_read_config_dword(iommu->dev, 0xf4, &iommu->cache_cfg[1]);
639 pci_read_config_dword(iommu->dev, 0xf8, &iommu->cache_cfg[2]);
640 pci_read_config_dword(iommu->dev, 0xfc, &iommu->cache_cfg[3]);
641 }
635} 642}
636 643
637/* 644/*
@@ -649,29 +656,9 @@ static void __init init_iommu_from_acpi(struct amd_iommu *iommu,
649 struct ivhd_entry *e; 656 struct ivhd_entry *e;
650 657
651 /* 658 /*
652 * First set the recommended feature enable bits from ACPI 659 * First save the recommended feature enable bits from ACPI
653 * into the IOMMU control registers
654 */ 660 */
655 h->flags & IVHD_FLAG_HT_TUN_EN_MASK ? 661 iommu->acpi_flags = h->flags;
656 iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) :
657 iommu_feature_disable(iommu, CONTROL_HT_TUN_EN);
658
659 h->flags & IVHD_FLAG_PASSPW_EN_MASK ?
660 iommu_feature_enable(iommu, CONTROL_PASSPW_EN) :
661 iommu_feature_disable(iommu, CONTROL_PASSPW_EN);
662
663 h->flags & IVHD_FLAG_RESPASSPW_EN_MASK ?
664 iommu_feature_enable(iommu, CONTROL_RESPASSPW_EN) :
665 iommu_feature_disable(iommu, CONTROL_RESPASSPW_EN);
666
667 h->flags & IVHD_FLAG_ISOC_EN_MASK ?
668 iommu_feature_enable(iommu, CONTROL_ISOC_EN) :
669 iommu_feature_disable(iommu, CONTROL_ISOC_EN);
670
671 /*
672 * make IOMMU memory accesses cache coherent
673 */
674 iommu_feature_enable(iommu, CONTROL_COHERENT_EN);
675 662
676 /* 663 /*
677 * Done. Now parse the device entries 664 * Done. Now parse the device entries
@@ -1116,6 +1103,40 @@ static void init_device_table(void)
1116 } 1103 }
1117} 1104}
1118 1105
1106static void iommu_init_flags(struct amd_iommu *iommu)
1107{
1108 iommu->acpi_flags & IVHD_FLAG_HT_TUN_EN_MASK ?
1109 iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) :
1110 iommu_feature_disable(iommu, CONTROL_HT_TUN_EN);
1111
1112 iommu->acpi_flags & IVHD_FLAG_PASSPW_EN_MASK ?
1113 iommu_feature_enable(iommu, CONTROL_PASSPW_EN) :
1114 iommu_feature_disable(iommu, CONTROL_PASSPW_EN);
1115
1116 iommu->acpi_flags & IVHD_FLAG_RESPASSPW_EN_MASK ?
1117 iommu_feature_enable(iommu, CONTROL_RESPASSPW_EN) :
1118 iommu_feature_disable(iommu, CONTROL_RESPASSPW_EN);
1119
1120 iommu->acpi_flags & IVHD_FLAG_ISOC_EN_MASK ?
1121 iommu_feature_enable(iommu, CONTROL_ISOC_EN) :
1122 iommu_feature_disable(iommu, CONTROL_ISOC_EN);
1123
1124 /*
1125 * make IOMMU memory accesses cache coherent
1126 */
1127 iommu_feature_enable(iommu, CONTROL_COHERENT_EN);
1128}
1129
1130static void iommu_apply_quirks(struct amd_iommu *iommu)
1131{
1132 if (is_rd890_iommu(iommu->dev)) {
1133 pci_write_config_dword(iommu->dev, 0xf0, iommu->cache_cfg[0]);
1134 pci_write_config_dword(iommu->dev, 0xf4, iommu->cache_cfg[1]);
1135 pci_write_config_dword(iommu->dev, 0xf8, iommu->cache_cfg[2]);
1136 pci_write_config_dword(iommu->dev, 0xfc, iommu->cache_cfg[3]);
1137 }
1138}
1139
1119/* 1140/*
1120 * This function finally enables all IOMMUs found in the system after 1141 * This function finally enables all IOMMUs found in the system after
1121 * they have been initialized 1142 * they have been initialized
@@ -1126,6 +1147,8 @@ static void enable_iommus(void)
1126 1147
1127 for_each_iommu(iommu) { 1148 for_each_iommu(iommu) {
1128 iommu_disable(iommu); 1149 iommu_disable(iommu);
1150 iommu_apply_quirks(iommu);
1151 iommu_init_flags(iommu);
1129 iommu_set_device_table(iommu); 1152 iommu_set_device_table(iommu);
1130 iommu_enable_command_buffer(iommu); 1153 iommu_enable_command_buffer(iommu);
1131 iommu_enable_event_buffer(iommu); 1154 iommu_enable_event_buffer(iommu);
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index bc0fa1ae5233..7556eb7a1a47 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -306,14 +306,19 @@ void arch_init_copy_chip_data(struct irq_desc *old_desc,
306 306
307 old_cfg = old_desc->chip_data; 307 old_cfg = old_desc->chip_data;
308 308
309 memcpy(cfg, old_cfg, sizeof(struct irq_cfg)); 309 cfg->vector = old_cfg->vector;
310 cfg->move_in_progress = old_cfg->move_in_progress;
311 cpumask_copy(cfg->domain, old_cfg->domain);
312 cpumask_copy(cfg->old_domain, old_cfg->old_domain);
310 313
311 init_copy_irq_2_pin(old_cfg, cfg, node); 314 init_copy_irq_2_pin(old_cfg, cfg, node);
312} 315}
313 316
314static void free_irq_cfg(struct irq_cfg *old_cfg) 317static void free_irq_cfg(struct irq_cfg *cfg)
315{ 318{
316 kfree(old_cfg); 319 free_cpumask_var(cfg->domain);
320 free_cpumask_var(cfg->old_domain);
321 kfree(cfg);
317} 322}
318 323
319void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc) 324void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 787b3c7c6625..15c671385f59 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -545,7 +545,7 @@ void __cpuinit cpu_detect(struct cpuinfo_x86 *c)
545 } 545 }
546} 546}
547 547
548static void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c) 548void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c)
549{ 549{
550 u32 tfms, xlvl; 550 u32 tfms, xlvl;
551 u32 ebx; 551 u32 ebx;
diff --git a/arch/x86/kernel/cpu/cpu.h b/arch/x86/kernel/cpu/cpu.h
index 3624e8a0f71b..f668bb1f7d43 100644
--- a/arch/x86/kernel/cpu/cpu.h
+++ b/arch/x86/kernel/cpu/cpu.h
@@ -33,5 +33,6 @@ extern const struct cpu_dev *const __x86_cpu_dev_start[],
33 *const __x86_cpu_dev_end[]; 33 *const __x86_cpu_dev_end[];
34 34
35extern void cpu_detect_cache_sizes(struct cpuinfo_x86 *c); 35extern void cpu_detect_cache_sizes(struct cpuinfo_x86 *c);
36extern void get_cpu_cap(struct cpuinfo_x86 *c);
36 37
37#endif 38#endif
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 3a683ea5267e..695f17731e23 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -39,6 +39,7 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
39 misc_enable &= ~MSR_IA32_MISC_ENABLE_LIMIT_CPUID; 39 misc_enable &= ~MSR_IA32_MISC_ENABLE_LIMIT_CPUID;
40 wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable); 40 wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
41 c->cpuid_level = cpuid_eax(0); 41 c->cpuid_level = cpuid_eax(0);
42 get_cpu_cap(c);
42 } 43 }
43 } 44 }
44 45
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 3efdf2870a35..03a5b0385ad6 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -102,6 +102,7 @@ struct cpu_hw_events {
102 */ 102 */
103 struct perf_event *events[X86_PMC_IDX_MAX]; /* in counter order */ 103 struct perf_event *events[X86_PMC_IDX_MAX]; /* in counter order */
104 unsigned long active_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)]; 104 unsigned long active_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
105 unsigned long running[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
105 int enabled; 106 int enabled;
106 107
107 int n_events; 108 int n_events;
@@ -1010,6 +1011,7 @@ static int x86_pmu_start(struct perf_event *event)
1010 x86_perf_event_set_period(event); 1011 x86_perf_event_set_period(event);
1011 cpuc->events[idx] = event; 1012 cpuc->events[idx] = event;
1012 __set_bit(idx, cpuc->active_mask); 1013 __set_bit(idx, cpuc->active_mask);
1014 __set_bit(idx, cpuc->running);
1013 x86_pmu.enable(event); 1015 x86_pmu.enable(event);
1014 perf_event_update_userpage(event); 1016 perf_event_update_userpage(event);
1015 1017
@@ -1141,8 +1143,16 @@ static int x86_pmu_handle_irq(struct pt_regs *regs)
1141 cpuc = &__get_cpu_var(cpu_hw_events); 1143 cpuc = &__get_cpu_var(cpu_hw_events);
1142 1144
1143 for (idx = 0; idx < x86_pmu.num_counters; idx++) { 1145 for (idx = 0; idx < x86_pmu.num_counters; idx++) {
1144 if (!test_bit(idx, cpuc->active_mask)) 1146 if (!test_bit(idx, cpuc->active_mask)) {
1147 /*
1148 * Though we deactivated the counter some cpus
1149 * might still deliver spurious interrupts still
1150 * in flight. Catch them:
1151 */
1152 if (__test_and_clear_bit(idx, cpuc->running))
1153 handled++;
1145 continue; 1154 continue;
1155 }
1146 1156
1147 event = cpuc->events[idx]; 1157 event = cpuc->events[idx];
1148 hwc = &event->hw; 1158 hwc = &event->hw;
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index 34b4dad6f0b8..d49079515122 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -31,6 +31,7 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
31 const struct cpuid_bit *cb; 31 const struct cpuid_bit *cb;
32 32
33 static const struct cpuid_bit __cpuinitconst cpuid_bits[] = { 33 static const struct cpuid_bit __cpuinitconst cpuid_bits[] = {
34 { X86_FEATURE_DTS, CR_EAX, 0, 0x00000006, 0 },
34 { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006, 0 }, 35 { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006, 0 },
35 { X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006, 0 }, 36 { X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006, 0 },
36 { X86_FEATURE_PLN, CR_EAX, 4, 0x00000006, 0 }, 37 { X86_FEATURE_PLN, CR_EAX, 4, 0x00000006, 0 },
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index 410fdb3f1939..7494999141b3 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -506,7 +506,7 @@ static int hpet_assign_irq(struct hpet_dev *dev)
506{ 506{
507 unsigned int irq; 507 unsigned int irq;
508 508
509 irq = create_irq(); 509 irq = create_irq_nr(0, -1);
510 if (!irq) 510 if (!irq)
511 return -EINVAL; 511 return -EINVAL;
512 512
diff --git a/arch/x86/kernel/hw_breakpoint.c b/arch/x86/kernel/hw_breakpoint.c
index a474ec37c32f..ff15c9dcc25d 100644
--- a/arch/x86/kernel/hw_breakpoint.c
+++ b/arch/x86/kernel/hw_breakpoint.c
@@ -206,11 +206,27 @@ int arch_check_bp_in_kernelspace(struct perf_event *bp)
206int arch_bp_generic_fields(int x86_len, int x86_type, 206int arch_bp_generic_fields(int x86_len, int x86_type,
207 int *gen_len, int *gen_type) 207 int *gen_len, int *gen_type)
208{ 208{
209 /* Len */ 209 /* Type */
210 switch (x86_len) { 210 switch (x86_type) {
211 case X86_BREAKPOINT_LEN_X: 211 case X86_BREAKPOINT_EXECUTE:
212 if (x86_len != X86_BREAKPOINT_LEN_X)
213 return -EINVAL;
214
215 *gen_type = HW_BREAKPOINT_X;
212 *gen_len = sizeof(long); 216 *gen_len = sizeof(long);
217 return 0;
218 case X86_BREAKPOINT_WRITE:
219 *gen_type = HW_BREAKPOINT_W;
213 break; 220 break;
221 case X86_BREAKPOINT_RW:
222 *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
223 break;
224 default:
225 return -EINVAL;
226 }
227
228 /* Len */
229 switch (x86_len) {
214 case X86_BREAKPOINT_LEN_1: 230 case X86_BREAKPOINT_LEN_1:
215 *gen_len = HW_BREAKPOINT_LEN_1; 231 *gen_len = HW_BREAKPOINT_LEN_1;
216 break; 232 break;
@@ -229,21 +245,6 @@ int arch_bp_generic_fields(int x86_len, int x86_type,
229 return -EINVAL; 245 return -EINVAL;
230 } 246 }
231 247
232 /* Type */
233 switch (x86_type) {
234 case X86_BREAKPOINT_EXECUTE:
235 *gen_type = HW_BREAKPOINT_X;
236 break;
237 case X86_BREAKPOINT_WRITE:
238 *gen_type = HW_BREAKPOINT_W;
239 break;
240 case X86_BREAKPOINT_RW:
241 *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
242 break;
243 default:
244 return -EINVAL;
245 }
246
247 return 0; 248 return 0;
248} 249}
249 250
@@ -316,9 +317,6 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
316 ret = -EINVAL; 317 ret = -EINVAL;
317 318
318 switch (info->len) { 319 switch (info->len) {
319 case X86_BREAKPOINT_LEN_X:
320 align = sizeof(long) -1;
321 break;
322 case X86_BREAKPOINT_LEN_1: 320 case X86_BREAKPOINT_LEN_1:
323 align = 0; 321 align = 0;
324 break; 322 break;
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 9257510b4836..9d5f55848455 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -324,9 +324,8 @@ static void lguest_load_gdt(const struct desc_ptr *desc)
324} 324}
325 325
326/* 326/*
327 * For a single GDT entry which changes, we do the lazy thing: alter our GDT, 327 * For a single GDT entry which changes, we simply change our copy and
328 * then tell the Host to reload the entire thing. This operation is so rare 328 * then tell the host about it.
329 * that this naive implementation is reasonable.
330 */ 329 */
331static void lguest_write_gdt_entry(struct desc_struct *dt, int entrynum, 330static void lguest_write_gdt_entry(struct desc_struct *dt, int entrynum,
332 const void *desc, int type) 331 const void *desc, int type)
@@ -338,9 +337,13 @@ static void lguest_write_gdt_entry(struct desc_struct *dt, int entrynum,
338} 337}
339 338
340/* 339/*
341 * OK, I lied. There are three "thread local storage" GDT entries which change 340 * There are three "thread local storage" GDT entries which change
342 * on every context switch (these three entries are how glibc implements 341 * on every context switch (these three entries are how glibc implements
343 * __thread variables). So we have a hypercall specifically for this case. 342 * __thread variables). As an optimization, we have a hypercall
343 * specifically for this case.
344 *
345 * Wouldn't it be nicer to have a general LOAD_GDT_ENTRIES hypercall
346 * which took a range of entries?
344 */ 347 */
345static void lguest_load_tls(struct thread_struct *t, unsigned int cpu) 348static void lguest_load_tls(struct thread_struct *t, unsigned int cpu)
346{ 349{
diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c
index cfe4faabb0f6..009b819f48d0 100644
--- a/arch/x86/oprofile/nmi_int.c
+++ b/arch/x86/oprofile/nmi_int.c
@@ -671,7 +671,9 @@ static int __init ppro_init(char **cpu_type)
671 case 14: 671 case 14:
672 *cpu_type = "i386/core"; 672 *cpu_type = "i386/core";
673 break; 673 break;
674 case 15: case 23: 674 case 0x0f:
675 case 0x16:
676 case 0x17:
675 *cpu_type = "i386/core_2"; 677 *cpu_type = "i386/core_2";
676 break; 678 break;
677 case 0x1a: 679 case 0x1a:
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-28 16:35:13 -0500