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-rw-r--r--arch/arm/mach-imx/mm-imx1.c7
-rw-r--r--arch/arm/mach-imx/mm-imx21.c21
-rw-r--r--arch/arm/mach-imx/mm-imx27.c21
-rw-r--r--arch/arm/mach-mx25/mm.c25
-rw-r--r--arch/arm/mach-mx3/mm.c53
-rw-r--r--arch/arm/mach-mx5/mm.c35
-rw-r--r--arch/arm/mach-mxc91231/mm.c53
-rw-r--r--arch/arm/plat-mxc/include/mach/hardware.h7
8 files changed, 56 insertions, 166 deletions
diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c
index 9be92b96dc89..729ae0915af8 100644
--- a/arch/arm/mach-imx/mm-imx1.c
+++ b/arch/arm/mach-imx/mm-imx1.c
@@ -25,12 +25,7 @@
25#include <mach/hardware.h> 25#include <mach/hardware.h>
26 26
27static struct map_desc imx_io_desc[] __initdata = { 27static struct map_desc imx_io_desc[] __initdata = {
28 { 28 imx_map_entry(MX1, IO, MT_DEVICE),
29 .virtual = MX1_IO_BASE_ADDR_VIRT,
30 .pfn = __phys_to_pfn(MX1_IO_BASE_ADDR),
31 .length = MX1_IO_SIZE,
32 .type = MT_DEVICE
33 }
34}; 29};
35 30
36void __init mx1_map_io(void) 31void __init mx1_map_io(void)
diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c
index 12faeeaa0a97..e728af81d1b1 100644
--- a/arch/arm/mach-imx/mm-imx21.c
+++ b/arch/arm/mach-imx/mm-imx21.c
@@ -35,33 +35,18 @@ static struct map_desc imx21_io_desc[] __initdata = {
35 * - ROM Patch 35 * - ROM Patch
36 * - and some reserved space 36 * - and some reserved space
37 */ 37 */
38 { 38 imx_map_entry(MX21, AIPI, MT_DEVICE),
39 .virtual = MX21_AIPI_BASE_ADDR_VIRT,
40 .pfn = __phys_to_pfn(MX21_AIPI_BASE_ADDR),
41 .length = MX21_AIPI_SIZE,
42 .type = MT_DEVICE
43 },
44 /* 39 /*
45 * this fixed mapping covers: 40 * this fixed mapping covers:
46 * - CSI 41 * - CSI
47 * - ATA 42 * - ATA
48 */ 43 */
49 { 44 imx_map_entry(MX21, SAHB1, MT_DEVICE),
50 .virtual = MX21_SAHB1_BASE_ADDR_VIRT,
51 .pfn = __phys_to_pfn(MX21_SAHB1_BASE_ADDR),
52 .length = MX21_SAHB1_SIZE,
53 .type = MT_DEVICE
54 },
55 /* 45 /*
56 * this fixed mapping covers: 46 * this fixed mapping covers:
57 * - EMI 47 * - EMI
58 */ 48 */
59 { 49 imx_map_entry(MX21, X_MEMC, MT_DEVICE),
60 .virtual = MX21_X_MEMC_BASE_ADDR_VIRT,
61 .pfn = __phys_to_pfn(MX21_X_MEMC_BASE_ADDR),
62 .length = MX21_X_MEMC_SIZE,
63 .type = MT_DEVICE
64 },
65}; 50};
66 51
67/* 52/*
diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c
index a24622957ff2..374e48b7a412 100644
--- a/arch/arm/mach-imx/mm-imx27.c
+++ b/arch/arm/mach-imx/mm-imx27.c
@@ -35,33 +35,18 @@ static struct map_desc imx27_io_desc[] __initdata = {
35 * - ROM Patch 35 * - ROM Patch
36 * - and some reserved space 36 * - and some reserved space
37 */ 37 */
38 { 38 imx_map_entry(MX27, AIPI, MT_DEVICE),
39 .virtual = MX27_AIPI_BASE_ADDR_VIRT,
40 .pfn = __phys_to_pfn(MX27_AIPI_BASE_ADDR),
41 .length = MX27_AIPI_SIZE,
42 .type = MT_DEVICE
43 },
44 /* 39 /*
45 * this fixed mapping covers: 40 * this fixed mapping covers:
46 * - CSI 41 * - CSI
47 * - ATA 42 * - ATA
48 */ 43 */
49 { 44 imx_map_entry(MX27, SAHB1, MT_DEVICE),
50 .virtual = MX27_SAHB1_BASE_ADDR_VIRT,
51 .pfn = __phys_to_pfn(MX27_SAHB1_BASE_ADDR),
52 .length = MX27_SAHB1_SIZE,
53 .type = MT_DEVICE
54 },
55 /* 45 /*
56 * this fixed mapping covers: 46 * this fixed mapping covers:
57 * - EMI 47 * - EMI
58 */ 48 */
59 { 49 imx_map_entry(MX27, X_MEMC, MT_DEVICE),
60 .virtual = MX27_X_MEMC_BASE_ADDR_VIRT,
61 .pfn = __phys_to_pfn(MX27_X_MEMC_BASE_ADDR),
62 .length = MX27_X_MEMC_SIZE,
63 .type = MT_DEVICE
64 },
65}; 50};
66 51
67/* 52/*
diff --git a/arch/arm/mach-mx25/mm.c b/arch/arm/mach-mx25/mm.c
index bb677111fb0f..11cd33599bd8 100644
--- a/arch/arm/mach-mx25/mm.c
+++ b/arch/arm/mach-mx25/mm.c
@@ -30,25 +30,12 @@
30 30
31/* 31/*
32 * This table defines static virtual address mappings for I/O regions. 32 * This table defines static virtual address mappings for I/O regions.
33 * These are the mappings common across all MX3 boards. 33 * These are the mappings common across all MX25 boards.
34 */ 34 */
35static struct map_desc mxc_io_desc[] __initdata = { 35static struct map_desc mx25_io_desc[] __initdata = {
36 { 36 imx_map_entry(MX25, AVIC, MT_DEVICE_NONSHARED),
37 .virtual = MX25_AVIC_BASE_ADDR_VIRT, 37 imx_map_entry(MX25, AIPS1, MT_DEVICE_NONSHARED),
38 .pfn = __phys_to_pfn(MX25_AVIC_BASE_ADDR), 38 imx_map_entry(MX25, AIPS2, MT_DEVICE_NONSHARED),
39 .length = MX25_AVIC_SIZE,
40 .type = MT_DEVICE_NONSHARED
41 }, {
42 .virtual = MX25_AIPS1_BASE_ADDR_VIRT,
43 .pfn = __phys_to_pfn(MX25_AIPS1_BASE_ADDR),
44 .length = MX25_AIPS1_SIZE,
45 .type = MT_DEVICE_NONSHARED
46 }, {
47 .virtual = MX25_AIPS2_BASE_ADDR_VIRT,
48 .pfn = __phys_to_pfn(MX25_AIPS2_BASE_ADDR),
49 .length = MX25_AIPS2_SIZE,
50 .type = MT_DEVICE_NONSHARED
51 },
52}; 39};
53 40
54/* 41/*
@@ -62,7 +49,7 @@ void __init mx25_map_io(void)
62 mxc_iomux_v3_init(MX25_IO_ADDRESS(MX25_IOMUXC_BASE_ADDR)); 49 mxc_iomux_v3_init(MX25_IO_ADDRESS(MX25_IOMUXC_BASE_ADDR));
63 mxc_arch_reset_init(MX25_IO_ADDRESS(MX25_WDOG_BASE_ADDR)); 50 mxc_arch_reset_init(MX25_IO_ADDRESS(MX25_WDOG_BASE_ADDR));
64 51
65 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); 52 iotable_init(mx25_io_desc, ARRAY_SIZE(mx25_io_desc));
66} 53}
67 54
68int imx25_register_gpios(void); 55int imx25_register_gpios(void);
diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c
index 809ee40b9f0e..193c18cd5304 100644
--- a/arch/arm/mach-mx3/mm.c
+++ b/arch/arm/mach-mx3/mm.c
@@ -36,40 +36,16 @@
36 * @ingroup Memory 36 * @ingroup Memory
37 */ 37 */
38 38
39/*! 39#ifdef CONFIG_ARCH_MX31
40 * This table defines static virtual address mappings for I/O regions. 40static struct map_desc mx31_io_desc[] __initdata = {
41 * These are the mappings common across all MX3 boards. 41 imx_map_entry(MX31, X_MEMC, MT_DEVICE),
42 */ 42 imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
43static struct map_desc mxc_io_desc[] __initdata = { 43 imx_map_entry(MX31, AIPS1, MT_DEVICE_NONSHARED),
44 { 44 imx_map_entry(MX31, AIPS2, MT_DEVICE_NONSHARED),
45 .virtual = MX3x_X_MEMC_BASE_ADDR_VIRT, 45 imx_map_entry(MX31, SPBA0, MT_DEVICE_NONSHARED),
46 .pfn = __phys_to_pfn(MX3x_X_MEMC_BASE_ADDR),
47 .length = MX3x_X_MEMC_SIZE,
48 .type = MT_DEVICE
49 }, {
50 .virtual = MX3x_AVIC_BASE_ADDR_VIRT,
51 .pfn = __phys_to_pfn(MX3x_AVIC_BASE_ADDR),
52 .length = MX3x_AVIC_SIZE,
53 .type = MT_DEVICE_NONSHARED
54 }, {
55 .virtual = MX3x_AIPS1_BASE_ADDR_VIRT,
56 .pfn = __phys_to_pfn(MX3x_AIPS1_BASE_ADDR),
57 .length = MX3x_AIPS1_SIZE,
58 .type = MT_DEVICE_NONSHARED
59 }, {
60 .virtual = MX3x_AIPS2_BASE_ADDR_VIRT,
61 .pfn = __phys_to_pfn(MX3x_AIPS2_BASE_ADDR),
62 .length = MX3x_AIPS2_SIZE,
63 .type = MT_DEVICE_NONSHARED
64 }, {
65 .virtual = MX3x_SPBA0_BASE_ADDR_VIRT,
66 .pfn = __phys_to_pfn(MX3x_SPBA0_BASE_ADDR),
67 .length = MX3x_SPBA0_SIZE,
68 .type = MT_DEVICE_NONSHARED
69 },
70}; 46};
71 47
72/*! 48/*
73 * This function initializes the memory map. It is called during the 49 * This function initializes the memory map. It is called during the
74 * system startup to create static physical to virtual memory mappings 50 * system startup to create static physical to virtual memory mappings
75 * for the IO modules. 51 * for the IO modules.
@@ -79,17 +55,26 @@ void __init mx31_map_io(void)
79 mxc_set_cpu_type(MXC_CPU_MX31); 55 mxc_set_cpu_type(MXC_CPU_MX31);
80 mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); 56 mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
81 57
82 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); 58 iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc));
83} 59}
60#endif
84 61
85#ifdef CONFIG_ARCH_MX35 62#ifdef CONFIG_ARCH_MX35
63static struct map_desc mx35_io_desc[] __initdata = {
64 imx_map_entry(MX35, X_MEMC, MT_DEVICE),
65 imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
66 imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
67 imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
68 imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
69};
70
86void __init mx35_map_io(void) 71void __init mx35_map_io(void)
87{ 72{
88 mxc_set_cpu_type(MXC_CPU_MX35); 73 mxc_set_cpu_type(MXC_CPU_MX35);
89 mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); 74 mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
90 mxc_arch_reset_init(MX35_IO_ADDRESS(MX3x_WDOG_BASE_ADDR)); 75 mxc_arch_reset_init(MX35_IO_ADDRESS(MX3x_WDOG_BASE_ADDR));
91 76
92 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); 77 iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
93} 78}
94#endif 79#endif
95 80
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index bc3f30db8d9a..01dff26c1007 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -23,33 +23,12 @@
23/* 23/*
24 * Define the MX51 memory map. 24 * Define the MX51 memory map.
25 */ 25 */
26static struct map_desc mxc_io_desc[] __initdata = { 26static struct map_desc mx51_io_desc[] __initdata = {
27 { 27 imx_map_entry(MX51, IRAM, MT_DEVICE),
28 .virtual = MX51_IRAM_BASE_ADDR_VIRT, 28 imx_map_entry(MX51, DEBUG, MT_DEVICE),
29 .pfn = __phys_to_pfn(MX51_IRAM_BASE_ADDR), 29 imx_map_entry(MX51, AIPS1, MT_DEVICE),
30 .length = MX51_IRAM_SIZE, 30 imx_map_entry(MX51, SPBA0, MT_DEVICE),
31 .type = MT_DEVICE 31 imx_map_entry(MX51, AIPS2, MT_DEVICE),
32 }, {
33 .virtual = MX51_DEBUG_BASE_ADDR_VIRT,
34 .pfn = __phys_to_pfn(MX51_DEBUG_BASE_ADDR),
35 .length = MX51_DEBUG_SIZE,
36 .type = MT_DEVICE
37 }, {
38 .virtual = MX51_AIPS1_BASE_ADDR_VIRT,
39 .pfn = __phys_to_pfn(MX51_AIPS1_BASE_ADDR),
40 .length = MX51_AIPS1_SIZE,
41 .type = MT_DEVICE
42 }, {
43 .virtual = MX51_SPBA0_BASE_ADDR_VIRT,
44 .pfn = __phys_to_pfn(MX51_SPBA0_BASE_ADDR),
45 .length = MX51_SPBA0_SIZE,
46 .type = MT_DEVICE
47 }, {
48 .virtual = MX51_AIPS2_BASE_ADDR_VIRT,
49 .pfn = __phys_to_pfn(MX51_AIPS2_BASE_ADDR),
50 .length = MX51_AIPS2_SIZE,
51 .type = MT_DEVICE
52 },
53}; 32};
54 33
55/* 34/*
@@ -62,7 +41,7 @@ void __init mx51_map_io(void)
62 mxc_set_cpu_type(MXC_CPU_MX51); 41 mxc_set_cpu_type(MXC_CPU_MX51);
63 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); 42 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
64 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR)); 43 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR));
65 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); 44 iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc));
66} 45}
67 46
68int imx51_register_gpios(void); 47int imx51_register_gpios(void);
diff --git a/arch/arm/mach-mxc91231/mm.c b/arch/arm/mach-mxc91231/mm.c
index aeccfd755fee..7652c301da88 100644
--- a/arch/arm/mach-mxc91231/mm.c
+++ b/arch/arm/mach-mxc91231/mm.c
@@ -27,48 +27,15 @@
27/* 27/*
28 * This structure defines the MXC memory map. 28 * This structure defines the MXC memory map.
29 */ 29 */
30static struct map_desc mxc_io_desc[] __initdata = { 30static struct map_desc mxc91231_io_desc[] __initdata = {
31 { 31 imx_map_entry(MXC91231, L2CC, MT_DEVICE),
32 .virtual = MXC91231_L2CC_BASE_ADDR_VIRT, 32 imx_map_entry(MXC91231, X_MEMC, MT_DEVICE),
33 .pfn = __phys_to_pfn(MXC91231_L2CC_BASE_ADDR), 33 imx_map_entry(MXC91231, ROMP, MT_DEVICE),
34 .length = MXC91231_L2CC_SIZE, 34 imx_map_entry(MXC91231, AVIC, MT_DEVICE),
35 .type = MT_DEVICE, 35 imx_map_entry(MXC91231, AIPS1, MT_DEVICE),
36 }, { 36 imx_map_entry(MXC91231, SPBA0, MT_DEVICE),
37 .virtual = MXC91231_X_MEMC_BASE_ADDR_VIRT, 37 imx_map_entry(MXC91231, SPBA1, MT_DEVICE),
38 .pfn = __phys_to_pfn(MXC91231_X_MEMC_BASE_ADDR), 38 imx_map_entry(MXC91231, AIPS2, MT_DEVICE),
39 .length = MXC91231_X_MEMC_SIZE,
40 .type = MT_DEVICE,
41 }, {
42 .virtual = MXC91231_ROMP_BASE_ADDR_VIRT,
43 .pfn = __phys_to_pfn(MXC91231_ROMP_BASE_ADDR),
44 .length = MXC91231_ROMP_SIZE,
45 .type = MT_DEVICE,
46 }, {
47 .virtual = MXC91231_AVIC_BASE_ADDR_VIRT,
48 .pfn = __phys_to_pfn(MXC91231_AVIC_BASE_ADDR),
49 .length = MXC91231_AVIC_SIZE,
50 .type = MT_DEVICE,
51 }, {
52 .virtual = MXC91231_AIPS1_BASE_ADDR_VIRT,
53 .pfn = __phys_to_pfn(MXC91231_AIPS1_BASE_ADDR),
54 .length = MXC91231_AIPS1_SIZE,
55 .type = MT_DEVICE,
56 }, {
57 .virtual = MXC91231_SPBA0_BASE_ADDR_VIRT,
58 .pfn = __phys_to_pfn(MXC91231_SPBA0_BASE_ADDR),
59 .length = MXC91231_SPBA0_SIZE,
60 .type = MT_DEVICE,
61 }, {
62 .virtual = MXC91231_SPBA1_BASE_ADDR_VIRT,
63 .pfn = __phys_to_pfn(MXC91231_SPBA1_BASE_ADDR),
64 .length = MXC91231_SPBA1_SIZE,
65 .type = MT_DEVICE,
66 }, {
67 .virtual = MXC91231_AIPS2_BASE_ADDR_VIRT,
68 .pfn = __phys_to_pfn(MXC91231_AIPS2_BASE_ADDR),
69 .length = MXC91231_AIPS2_SIZE,
70 .type = MT_DEVICE,
71 },
72}; 39};
73 40
74/* 41/*
@@ -80,7 +47,7 @@ void __init mxc91231_map_io(void)
80{ 47{
81 mxc_set_cpu_type(MXC_CPU_MXC91231); 48 mxc_set_cpu_type(MXC_CPU_MXC91231);
82 49
83 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); 50 iotable_init(mxc91231_io_desc, ARRAY_SIZE(mxc91231_io_desc));
84} 51}
85 52
86int mxc91231_register_gpios(void); 53int mxc91231_register_gpios(void);
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index 4bbe50612d14..409cec6223df 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -66,4 +66,11 @@
66 66
67#include <mach/mxc.h> 67#include <mach/mxc.h>
68 68
69#define imx_map_entry(soc, name, _type) { \
70 .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \
71 .pfn = __phys_to_pfn(soc ## _ ## name ## _BASE_ADDR), \
72 .length = soc ## _ ## name ## _SIZE, \
73 .type = _type, \
74}
75
69#endif /* __ASM_ARCH_MXC_HARDWARE_H__ */ 76#endif /* __ASM_ARCH_MXC_HARDWARE_H__ */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-17 19:36:59 -0500