160 files changed, 947 insertions, 1252 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 24626b0419ee..a48aecc17eac 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -754,7 +754,7 @@ config ARCH_SA1100
         select ARCH_HAS_CPUFREQ
         select CPU_FREQ
         select GENERIC_CLOCKEVENTS
-        select CLKDEV_LOOKUP
+        select HAVE_CLK
         select HAVE_SCHED_CLOCK
         select TICK_ONESHOT
         select ARCH_REQUIRE_GPIOLIB
@@ -825,7 +825,6 @@ config ARCH_S5PC100
         select HAVE_CLK
         select CLKDEV_LOOKUP
         select CPU_V7
-        select ARM_L1_CACHE_SHIFT_6
         select ARCH_USES_GETTIMEOFFSET
         select HAVE_S3C2410_I2C if I2C
         select HAVE_S3C_RTC if RTC_CLASS
@@ -842,7 +841,6 @@ config ARCH_S5PV210
         select HAVE_CLK
         select CLKDEV_LOOKUP
         select CLKSRC_MMIO
-        select ARM_L1_CACHE_SHIFT_6
         select ARCH_HAS_CPUFREQ
         select GENERIC_CLOCKEVENTS
         select HAVE_SCHED_CLOCK
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 40319d91bb7f..1683bfb9166f 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -160,7 +160,6 @@ machine-$(CONFIG_ARCH_MSM)		:= msm
 machine-$(CONFIG_ARCH_MV78XX0)          := mv78xx0
 machine-$(CONFIG_ARCH_IMX_V4_V5)        := imx
 machine-$(CONFIG_ARCH_IMX_V6_V7)        := imx
-machine-$(CONFIG_ARCH_MX5)              := mx5
 machine-$(CONFIG_ARCH_MXS)              := mxs
 machine-$(CONFIG_ARCH_NETX)             := netx
 machine-$(CONFIG_ARCH_NOMADIK)          := nomadik
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index b2dc2dd7f1df..c47d6199b784 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -41,6 +41,7 @@
 
 #include <asm/irq.h>
 #include <asm/exception.h>
+#include <asm/smp_plat.h>
 #include <asm/mach/irq.h>
 #include <asm/hardware/gic.h>
 
@@ -352,11 +353,7 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
         unsigned int gic_irqs = gic->gic_irqs;
         struct irq_domain *domain = &gic->domain;
         void __iomem *base = gic_data_dist_base(gic);
-        u32 cpu = 0;
-
-#ifdef CONFIG_SMP
-        cpu = cpu_logical_map(smp_processor_id());
-#endif
+        u32 cpu = cpu_logical_map(smp_processor_id());
 
         cpumask = 1 << cpu;
         cpumask |= cpumask << 8;
diff --git a/arch/arm/configs/mx5_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index d0d8dfece37e..3a4fb2e5fc68 100644
--- a/arch/arm/configs/mx5_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -3,6 +3,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_KERNEL_LZO=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=18
+CONFIG_CGROUPS=y
 CONFIG_RELAY=y
 CONFIG_EXPERT=y
 # CONFIG_SLUB_DEBUG is not set
@@ -14,20 +15,31 @@ CONFIG_MODULE_SRCVERSION_ALL=y
 # CONFIG_LBDAF is not set
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_ARCH_MXC=y
-CONFIG_ARCH_MX5=y
-CONFIG_MACH_MX51_BABBAGE=y
+CONFIG_MACH_MX31LILLY=y
+CONFIG_MACH_MX31LITE=y
+CONFIG_MACH_PCM037=y
+CONFIG_MACH_PCM037_EET=y
+CONFIG_MACH_MX31_3DS=y
+CONFIG_MACH_MX31MOBOARD=y
+CONFIG_MACH_QONG=y
+CONFIG_MACH_ARMADILLO5X0=y
+CONFIG_MACH_KZM_ARM11_01=y
+CONFIG_MACH_PCM043=y
+CONFIG_MACH_MX35_3DS=y
+CONFIG_MACH_EUKREA_CPUIMX35=y
+CONFIG_MACH_VPR200=y
+CONFIG_MACH_IMX51_DT=y
 CONFIG_MACH_MX51_3DS=y
 CONFIG_MACH_EUKREA_CPUIMX51=y
 CONFIG_MACH_EUKREA_CPUIMX51SD=y
 CONFIG_MACH_MX51_EFIKAMX=y
 CONFIG_MACH_MX51_EFIKASB=y
-CONFIG_MACH_MX53_EVK=y
-CONFIG_MACH_MX53_SMD=y
-CONFIG_MACH_MX53_LOCO=y
-CONFIG_MACH_MX53_ARD=y
+CONFIG_MACH_IMX53_DT=y
+CONFIG_SOC_IMX6Q=y
 CONFIG_MXC_PWM=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
+CONFIG_SMP=y
 CONFIG_VMSPLIT_2G=y
 CONFIG_PREEMPT_VOLUNTARY=y
 CONFIG_AEABI=y
@@ -49,7 +61,7 @@ CONFIG_IP_PNP_DHCP=y
 # CONFIG_INET_XFRM_MODE_TUNNEL is not set
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
+CONFIG_IPV6=y
 # CONFIG_WIRELESS is not set
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
@@ -68,24 +80,20 @@ CONFIG_SCSI_SCAN_ASYNC=y
 CONFIG_ATA=y
 CONFIG_PATA_IMX=y
 CONFIG_NETDEVICES=y
-CONFIG_MII=m
-CONFIG_MARVELL_PHY=y
-CONFIG_DAVICOM_PHY=y
-CONFIG_QSEMI_PHY=y
-CONFIG_LXT_PHY=y
-CONFIG_CICADA_PHY=y
-CONFIG_VITESSE_PHY=y
-CONFIG_SMSC_PHY=y
-CONFIG_BROADCOM_PHY=y
-CONFIG_ICPLUS_PHY=y
-CONFIG_REALTEK_PHY=y
-CONFIG_NATIONAL_PHY=y
-CONFIG_STE10XP=y
-CONFIG_LSI_ET1011C_PHY=y
-CONFIG_MICREL_PHY=y
-CONFIG_NET_ETHERNET=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CHELSIO is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+CONFIG_FEC=y
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+CONFIG_SMC91X=y
+CONFIG_SMC911X=y
+CONFIG_SMSC911X=y
+# CONFIG_NET_VENDOR_STMICRO is not set
 # CONFIG_WLAN is not set
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 CONFIG_INPUT_EVDEV=y
@@ -124,7 +132,6 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_MXC=y
 CONFIG_USB_STORAGE=y
 CONFIG_MMC=y
-CONFIG_MMC_BLOCK=m
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_PLTFM=y
 CONFIG_MMC_SDHCI_ESDHC_IMX=y
@@ -133,6 +140,8 @@ CONFIG_LEDS_CLASS=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_INTF_DEV_UIE_EMUL=y
 CONFIG_RTC_MXC=y
+CONFIG_DMADEVICES=y
+CONFIG_IMX_SDMA=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
 CONFIG_EXT2_FS_POSIX_ACL=y
diff --git a/arch/arm/configs/mx3_defconfig b/arch/arm/configs/mx3_defconfig
deleted file mode 100644
index cb0717fbb03d..000000000000
--- a/arch/arm/configs/mx3_defconfig
+++ /dev/null
@@ -1,144 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_MXC=y
-CONFIG_MACH_MX31ADS_WM1133_EV1=y
-CONFIG_MACH_MX31LILLY=y
-CONFIG_MACH_MX31LITE=y
-CONFIG_MACH_PCM037=y
-CONFIG_MACH_PCM037_EET=y
-CONFIG_MACH_MX31_3DS=y
-CONFIG_MACH_MX31MOBOARD=y
-CONFIG_MACH_QONG=y
-CONFIG_MACH_ARMADILLO5X0=y
-CONFIG_MACH_KZM_ARM11_01=y
-CONFIG_MACH_PCM043=y
-CONFIG_MACH_MX35_3DS=y
-CONFIG_MACH_EUKREA_CPUIMX35=y
-CONFIG_MXC_IRQ_PRIOR=y
-CONFIG_MXC_PWM=y
-CONFIG_ARM_ERRATA_411920=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off"
-CONFIG_VFP=y
-CONFIG_PM_DEBUG=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_FW_LOADER=m
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_MXC=y
-CONFIG_MTD_UBI=y
-# CONFIG_BLK_DEV is not set
-CONFIG_MISC_DEVICES=y
-CONFIG_EEPROM_AT24=y
-CONFIG_NETDEVICES=y
-CONFIG_SMSC_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMSC911X=y
-CONFIG_DNET=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_IMX=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_8250=m
-CONFIG_SERIAL_8250_EXTENDED=y
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-CONFIG_SERIAL_IMX=y
-CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_IMX=y
-CONFIG_SPI=y
-CONFIG_W1=y
-CONFIG_W1_MASTER_MXC=y
-CONFIG_W1_SLAVE_THERM=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_IMX2_WDT=y
-CONFIG_MFD_WM8350_I2C=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_WM8350=y
-CONFIG_MEDIA_SUPPORT=y
-CONFIG_VIDEO_DEV=y
-# CONFIG_RC_CORE is not set
-# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
-CONFIG_SOC_CAMERA=y
-CONFIG_SOC_CAMERA_MT9M001=y
-CONFIG_SOC_CAMERA_MT9M111=y
-CONFIG_SOC_CAMERA_MT9T031=y
-CONFIG_SOC_CAMERA_MT9V022=y
-CONFIG_SOC_CAMERA_TW9910=y
-CONFIG_SOC_CAMERA_OV772X=y
-CONFIG_VIDEO_MX3=y
-# CONFIG_RADIO_ADAPTERS is not set
-CONFIG_FB=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_SPI is not set
-CONFIG_SND_SOC=y
-CONFIG_SND_IMX_SOC=y
-CONFIG_SND_MXC_SOC_WM1133_EV1=y
-CONFIG_SND_SOC_PHYCORE_AC97=y
-CONFIG_SND_SOC_EUKREA_TLV320=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_MXC=y
-CONFIG_USB_GADGET=m
-CONFIG_USB_FSL_USB2=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_USB_ULPI=y
-CONFIG_MMC=y
-CONFIG_MMC_MXC=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_MXC=y
-CONFIG_DMADEVICES=y
-# CONFIG_DNOTIFY is not set
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index b6e65dedfd71..62f8095d46de 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -237,7 +237,7 @@
  */
 #ifdef CONFIG_THUMB2_KERNEL
 
-        .macro  usraccoff, instr, reg, ptr, inc, off, cond, abort, t=T()
+        .macro  usraccoff, instr, reg, ptr, inc, off, cond, abort, t=TUSER()
 9999:
         .if     \inc == 1
         \instr\cond\()b\()\t\().w \reg, [\ptr, #\off]
@@ -277,7 +277,7 @@
 
 #else   /* !CONFIG_THUMB2_KERNEL */
 
-        .macro  usracc, instr, reg, ptr, inc, cond, rept, abort, t=T()
+        .macro  usracc, instr, reg, ptr, inc, cond, rept, abort, t=TUSER()
         .rept   \rept
 9999:
         .if     \inc == 1
diff --git a/arch/arm/include/asm/domain.h b/arch/arm/include/asm/domain.h
index af18ceaacf5d..b5dc173d336f 100644
--- a/arch/arm/include/asm/domain.h
+++ b/arch/arm/include/asm/domain.h
@@ -83,9 +83,9 @@
  * instructions (inline assembly)
  */
 #ifdef CONFIG_CPU_USE_DOMAINS
-#define T(instr)        #instr "t"
+#define TUSER(instr)    #instr "t"
 #else
-#define T(instr)        #instr
+#define TUSER(instr)    #instr
 #endif
 
 #else /* __ASSEMBLY__ */
@@ -95,9 +95,9 @@
  * instructions
  */
 #ifdef CONFIG_CPU_USE_DOMAINS
-#define T(instr)        instr ## t
+#define TUSER(instr)    instr ## t
 #else
-#define T(instr)        instr
+#define TUSER(instr)    instr
 #endif
 
 #endif /* __ASSEMBLY__ */
diff --git a/arch/arm/include/asm/futex.h b/arch/arm/include/asm/futex.h
index 253cc86318bf..7be54690aeec 100644
--- a/arch/arm/include/asm/futex.h
+++ b/arch/arm/include/asm/futex.h
@@ -75,9 +75,9 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
 
 #define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \
         __asm__ __volatile__(                                   \
-        "1:     " T(ldr) "      %1, [%3]\n"                     \
+        "1:     " TUSER(ldr) "  %1, [%3]\n"                     \
         "       " insn "\n"                                     \
-        "2:     " T(str) "      %0, [%3]\n"                     \
+        "2:     " TUSER(str) "  %0, [%3]\n"                     \
         "       mov     %0, #0\n"                               \
         __futex_atomic_ex_table("%5")                           \
         : "=&r" (ret), "=&r" (oldval), "=&r" (tmp)              \
@@ -95,10 +95,10 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
                 return -EFAULT;
 
         __asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n"
-        "1:     " T(ldr) "      %1, [%4]\n"
+        "1:     " TUSER(ldr) "  %1, [%4]\n"
         "       teq     %1, %2\n"
         "       it      eq      @ explicit IT needed for the 2b label\n"
-        "2:     " T(streq) "    %3, [%4]\n"
+        "2:     " TUSER(streq) "        %3, [%4]\n"
         __futex_atomic_ex_table("%5")
         : "+r" (ret), "=&r" (val)
         : "r" (oldval), "r" (newval), "r" (uaddr), "Ir" (-EFAULT)
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h
index 1e5717afc4ac..ae29293270a3 100644
--- a/arch/arm/include/asm/smp.h
+++ b/arch/arm/include/asm/smp.h
@@ -71,12 +71,6 @@ extern void platform_secondary_init(unsigned int cpu);
 extern void platform_smp_prepare_cpus(unsigned int);
 
 /*
- * Logical CPU mapping.
- */
-extern int __cpu_logical_map[NR_CPUS];
-#define cpu_logical_map(cpu)    __cpu_logical_map[cpu]
-
-/*
  * Initial data for bringing up a secondary CPU.
  */
 struct secondary_data {
diff --git a/arch/arm/include/asm/smp_plat.h b/arch/arm/include/asm/smp_plat.h
index f24c1b9e211d..558d6c80aca9 100644
--- a/arch/arm/include/asm/smp_plat.h
+++ b/arch/arm/include/asm/smp_plat.h
@@ -43,4 +43,10 @@ static inline int cache_ops_need_broadcast(void)
 }
 #endif
 
+/*
+ * Logical CPU mapping.
+ */
+extern int __cpu_logical_map[];
+#define cpu_logical_map(cpu)    __cpu_logical_map[cpu]
+
 #endif
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index b293616a1a1a..2958976d867b 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -227,7 +227,7 @@ do {									\
 
 #define __get_user_asm_byte(x,addr,err)                         \
         __asm__ __volatile__(                                   \
-        "1:     " T(ldrb) "     %1,[%2],#0\n"                   \
+        "1:     " TUSER(ldrb) " %1,[%2],#0\n"                   \
         "2:\n"                                                  \
         "       .pushsection .fixup,\"ax\"\n"                   \
         "       .align  2\n"                                    \
@@ -263,7 +263,7 @@ do {									\
 
 #define __get_user_asm_word(x,addr,err)                         \
         __asm__ __volatile__(                                   \
-        "1:     " T(ldr) "      %1,[%2],#0\n"                   \
+        "1:     " TUSER(ldr) "  %1,[%2],#0\n"                   \
         "2:\n"                                                  \
         "       .pushsection .fixup,\"ax\"\n"                   \
         "       .align  2\n"                                    \
@@ -308,7 +308,7 @@ do {									\
 
 #define __put_user_asm_byte(x,__pu_addr,err)                    \
         __asm__ __volatile__(                                   \
-        "1:     " T(strb) "     %1,[%2],#0\n"                   \
+        "1:     " TUSER(strb) " %1,[%2],#0\n"                   \
         "2:\n"                                                  \
         "       .pushsection .fixup,\"ax\"\n"                   \
         "       .align  2\n"                                    \
@@ -341,7 +341,7 @@ do {									\
 
 #define __put_user_asm_word(x,__pu_addr,err)                    \
         __asm__ __volatile__(                                   \
-        "1:     " T(str) "      %1,[%2],#0\n"                   \
+        "1:     " TUSER(str) "  %1,[%2],#0\n"                   \
         "2:\n"                                                  \
         "       .pushsection .fixup,\"ax\"\n"                   \
         "       .align  2\n"                                    \
@@ -366,10 +366,10 @@ do {									\
 
 #define __put_user_asm_dword(x,__pu_addr,err)                   \
         __asm__ __volatile__(                                   \
- ARM(   "1:     " T(str) "      " __reg_oper1 ", [%1], #4\n"    )       \
- ARM(   "2:     " T(str) "      " __reg_oper0 ", [%1]\n"        )       \
- THUMB( "1:     " T(str) "      " __reg_oper1 ", [%1]\n"        )       \
- THUMB( "2:     " T(str) "      " __reg_oper0 ", [%1, #4]\n"    )       \
+ ARM(   "1:     " TUSER(str) "  " __reg_oper1 ", [%1], #4\n"    ) \
+ ARM(   "2:     " TUSER(str) "  " __reg_oper0 ", [%1]\n"        ) \
+ THUMB( "1:     " TUSER(str) "  " __reg_oper1 ", [%1]\n"        ) \
+ THUMB( "2:     " TUSER(str) "  " __reg_oper0 ", [%1, #4]\n"    ) \
         "3:\n"                                                  \
         "       .pushsection .fixup,\"ax\"\n"                   \
         "       .align  2\n"                                    \
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 520889cf1b5b..9fd0ba90c1d2 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -149,6 +149,11 @@ ENDPROC(ret_from_fork)
 #endif
 #endif
 
+.macro mcount_adjust_addr rd, rn
+        bic     \rd, \rn, #1            @ clear the Thumb bit if present
+        sub     \rd, \rd, #MCOUNT_INSN_SIZE
+.endm
+
 .macro __mcount suffix
         mcount_enter
         ldr     r0, =ftrace_trace_function
@@ -173,8 +178,7 @@ ENDPROC(ret_from_fork)
         mcount_exit
 
 1:      mcount_get_lr   r1                      @ lr of instrumented func
-        mov     r0, lr                          @ instrumented function
-        sub     r0, r0, #MCOUNT_INSN_SIZE
+        mcount_adjust_addr      r0, lr          @ instrumented function
         adr     lr, BSYM(2f)
         mov     pc, r2
 2:      mcount_exit
@@ -184,8 +188,7 @@ ENDPROC(ret_from_fork)
         mcount_enter
 
         mcount_get_lr   r1                      @ lr of instrumented func
-        mov     r0, lr                          @ instrumented function
-        sub     r0, r0, #MCOUNT_INSN_SIZE
+        mcount_adjust_addr      r0, lr          @ instrumented function
 
         .globl ftrace_call\suffix
 ftrace_call\suffix:
@@ -205,11 +208,11 @@ ftrace_graph_call\suffix:
 #ifdef CONFIG_DYNAMIC_FTRACE
         @ called from __ftrace_caller, saved in mcount_enter
         ldr     r1, [sp, #16]           @ instrumented routine (func)
+        mcount_adjust_addr      r1, r1
 #else
         @ called from __mcount, untouched in lr
-        mov     r1, lr                  @ instrumented routine (func)
+        mcount_adjust_addr      r1, lr  @ instrumented routine (func)
 #endif
-        sub     r1, r1, #MCOUNT_INSN_SIZE
         mov     r2, fp                  @ frame pointer
         bl      prepare_ftrace_return
         mcount_exit
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 129fbd55bde8..a255c39612ca 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -21,7 +21,6 @@
 #include <linux/init.h>
 #include <linux/kexec.h>
 #include <linux/of_fdt.h>
-#include <linux/crash_dump.h>
 #include <linux/root_dev.h>
 #include <linux/cpu.h>
 #include <linux/interrupt.h>
@@ -160,7 +159,7 @@ static struct resource mem_res[] = {
                 .flags = IORESOURCE_MEM
         },
         {
-                .name = "Kernel text",
+                .name = "Kernel code",
                 .start = 0,
                 .end = 0,
                 .flags = IORESOURCE_MEM
@@ -427,6 +426,20 @@ void cpu_init(void)
             : "r14");
 }
 
+int __cpu_logical_map[NR_CPUS];
+
+void __init smp_setup_processor_id(void)
+{
+        int i;
+        u32 cpu = is_smp() ? read_cpuid_mpidr() & 0xff : 0;
+
+        cpu_logical_map(0) = cpu;
+        for (i = 1; i < NR_CPUS; ++i)
+                cpu_logical_map(i) = i == cpu ? 0 : i;
+
+        printk(KERN_INFO "Booting Linux on physical CPU %d\n", cpu);
+}
+
 static void __init setup_processor(void)
 {
         struct proc_info_list *list;
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 57db122a4f62..cdeb727527d3 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -233,20 +233,6 @@ void __ref cpu_die(void)
 }
 #endif /* CONFIG_HOTPLUG_CPU */
 
-int __cpu_logical_map[NR_CPUS];
-
-void __init smp_setup_processor_id(void)
-{
-        int i;
-        u32 cpu = is_smp() ? read_cpuid_mpidr() & 0xff : 0;
-
-        cpu_logical_map(0) = cpu;
-        for (i = 1; i < NR_CPUS; ++i)
-                cpu_logical_map(i) = i == cpu ? 0 : i;
-
-        printk(KERN_INFO "Booting Linux on physical CPU %d\n", cpu);
-}
-
 /*
  * Called by both boot and secondaries to move global data into
  * per-processor storage.
@@ -443,9 +429,7 @@ static DEFINE_PER_CPU(struct clock_event_device, percpu_clockevent);
 static void ipi_timer(void)
 {
         struct clock_event_device *evt = &__get_cpu_var(percpu_clockevent);
-        irq_enter();
         evt->event_handler(evt);
-        irq_exit();
 }
 
 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
@@ -548,7 +532,9 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
 
         switch (ipinr) {
         case IPI_TIMER:
+                irq_enter();
                 ipi_timer();
+                irq_exit();
                 break;
 
         case IPI_RESCHEDULE:
@@ -556,15 +542,21 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
                 break;
 
         case IPI_CALL_FUNC:
+                irq_enter();
                 generic_smp_call_function_interrupt();
+                irq_exit();
                 break;
 
         case IPI_CALL_FUNC_SINGLE:
+                irq_enter();
                 generic_smp_call_function_single_interrupt();
+                irq_exit();
                 break;
 
         case IPI_CPU_STOP:
+                irq_enter();
                 ipi_cpu_stop(cpu);
+                irq_exit();
                 break;
 
         default:
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index c8e938553d47..4285daa077b0 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -252,6 +252,8 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
         else
                 twd_calibrate_rate();
 
+        __raw_writel(0, twd_base + TWD_TIMER_CONTROL);
+
         clk->name = "local_timer";
         clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
                         CLOCK_EVT_FEAT_C3STOP;
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index f76e75548670..1e19691e0406 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -4,6 +4,7 @@
  */
 
 #include <asm-generic/vmlinux.lds.h>
+#include <asm/cache.h>
 #include <asm/thread_info.h>
 #include <asm/memory.h>
 #include <asm/page.h>
@@ -181,7 +182,7 @@ SECTIONS
         }
 #endif
 
-        PERCPU_SECTION(32)
+        PERCPU_SECTION(L1_CACHE_BYTES)
 
 #ifdef CONFIG_XIP_KERNEL
         __data_loc = ALIGN(4);          /* location in binary */
@@ -212,13 +213,13 @@ SECTIONS
 #endif
 
                 NOSAVE_DATA
-                CACHELINE_ALIGNED_DATA(32)
-                READ_MOSTLY_DATA(32)
+                CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
+                READ_MOSTLY_DATA(L1_CACHE_BYTES)
 
                 /*
                  * The exception fixup table (might need resorting at runtime)
                  */
-                . = ALIGN(32);
+                . = ALIGN(4);
                 __start___ex_table = .;
 #ifdef CONFIG_MMU
                 *(__ex_table)
diff --git a/arch/arm/lib/getuser.S b/arch/arm/lib/getuser.S
index 1b049cd7a49a..11093a7c3e32 100644
--- a/arch/arm/lib/getuser.S
+++ b/arch/arm/lib/getuser.S
@@ -31,18 +31,18 @@
 #include <asm/domain.h>
 
 ENTRY(__get_user_1)
-1:      T(ldrb) r2, [r0]
+1: TUSER(ldrb)  r2, [r0]
         mov     r0, #0
         mov     pc, lr
 ENDPROC(__get_user_1)
 
 ENTRY(__get_user_2)
 #ifdef CONFIG_THUMB2_KERNEL
-2:      T(ldrb) r2, [r0]
-3:      T(ldrb) r3, [r0, #1]
+2: TUSER(ldrb)  r2, [r0]
+3: TUSER(ldrb)  r3, [r0, #1]
 #else
-2:      T(ldrb) r2, [r0], #1
-3:      T(ldrb) r3, [r0]
+2: TUSER(ldrb)  r2, [r0], #1
+3: TUSER(ldrb)  r3, [r0]
 #endif
 #ifndef __ARMEB__
         orr     r2, r2, r3, lsl #8
@@ -54,7 +54,7 @@ ENTRY(__get_user_2)
 ENDPROC(__get_user_2)
 
 ENTRY(__get_user_4)
-4:      T(ldr)  r2, [r0]
+4: TUSER(ldr)   r2, [r0]
         mov     r0, #0
         mov     pc, lr
 ENDPROC(__get_user_4)
diff --git a/arch/arm/lib/putuser.S b/arch/arm/lib/putuser.S
index c023fc11e86c..7db25990c589 100644
--- a/arch/arm/lib/putuser.S
+++ b/arch/arm/lib/putuser.S
@@ -31,7 +31,7 @@
 #include <asm/domain.h>
 
 ENTRY(__put_user_1)
-1:      T(strb) r2, [r0]
+1: TUSER(strb)  r2, [r0]
         mov     r0, #0
         mov     pc, lr
 ENDPROC(__put_user_1)
@@ -40,19 +40,19 @@ ENTRY(__put_user_2)
         mov     ip, r2, lsr #8
 #ifdef CONFIG_THUMB2_KERNEL
 #ifndef __ARMEB__
-2:      T(strb) r2, [r0]
-3:      T(strb) ip, [r0, #1]
+2: TUSER(strb)  r2, [r0]
+3: TUSER(strb)  ip, [r0, #1]
 #else
-2:      T(strb) ip, [r0]
-3:      T(strb) r2, [r0, #1]
+2: TUSER(strb)  ip, [r0]
+3: TUSER(strb)  r2, [r0, #1]
 #endif
 #else   /* !CONFIG_THUMB2_KERNEL */
 #ifndef __ARMEB__
-2:      T(strb) r2, [r0], #1
-3:      T(strb) ip, [r0]
+2: TUSER(strb)  r2, [r0], #1
+3: TUSER(strb)  ip, [r0]
 #else
-2:      T(strb) ip, [r0], #1
-3:      T(strb) r2, [r0]
+2: TUSER(strb)  ip, [r0], #1
+3: TUSER(strb)  r2, [r0]
 #endif
 #endif  /* CONFIG_THUMB2_KERNEL */
         mov     r0, #0
@@ -60,18 +60,18 @@ ENTRY(__put_user_2)
 ENDPROC(__put_user_2)
 
 ENTRY(__put_user_4)
-4:      T(str)  r2, [r0]
+4: TUSER(str)   r2, [r0]
         mov     r0, #0
         mov     pc, lr
 ENDPROC(__put_user_4)
 
 ENTRY(__put_user_8)
 #ifdef CONFIG_THUMB2_KERNEL
-5:      T(str)  r2, [r0]
-6:      T(str)  r3, [r0, #4]
+5: TUSER(str)   r2, [r0]
+6: TUSER(str)   r3, [r0, #4]
 #else
-5:      T(str)  r2, [r0], #4
-6:      T(str)  r3, [r0]
+5: TUSER(str)   r2, [r0], #4
+6: TUSER(str)   r3, [r0]
 #endif
         mov     r0, #0
         mov     pc, lr
diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S
index d0ece2aeb70d..5c908b1cb8ed 100644
--- a/arch/arm/lib/uaccess.S
+++ b/arch/arm/lib/uaccess.S
@@ -32,11 +32,11 @@
                 rsb     ip, ip, #4
                 cmp     ip, #2
                 ldrb    r3, [r1], #1
-USER(           T(strb) r3, [r0], #1)                   @ May fault
+USER(   TUSER(  strb)   r3, [r0], #1)                   @ May fault
                 ldrgeb  r3, [r1], #1
-USER(           T(strgeb) r3, [r0], #1)                 @ May fault
+USER(   TUSER(  strgeb) r3, [r0], #1)                   @ May fault
                 ldrgtb  r3, [r1], #1
-USER(           T(strgtb) r3, [r0], #1)                 @ May fault
+USER(   TUSER(  strgtb) r3, [r0], #1)                   @ May fault
                 sub     r2, r2, ip
                 b       .Lc2u_dest_aligned
 
@@ -59,7 +59,7 @@ ENTRY(__copy_to_user)
                 addmi   ip, r2, #4
                 bmi     .Lc2u_0nowords
                 ldr     r3, [r1], #4
-USER(           T(str)  r3, [r0], #4)                   @ May fault
+USER(   TUSER(  str)    r3, [r0], #4)                   @ May fault
                 mov     ip, r0, lsl #32 - PAGE_SHIFT    @ On each page, use a ld/st??t instruction
                 rsb     ip, ip, #0
                 movs    ip, ip, lsr #32 - PAGE_SHIFT
@@ -88,18 +88,18 @@ USER(		T(str)	r3, [r0], #4)			@ May fault
                 stmneia r0!, {r3 - r4}                  @ Shouldnt fault
                 tst     ip, #4
                 ldrne   r3, [r1], #4
-                T(strne) r3, [r0], #4                   @ Shouldnt fault
+        TUSER(  strne) r3, [r0], #4                     @ Shouldnt fault
                 ands    ip, ip, #3
                 beq     .Lc2u_0fupi
 .Lc2u_0nowords: teq     ip, #0
                 beq     .Lc2u_finished
 .Lc2u_nowords:  cmp     ip, #2
                 ldrb    r3, [r1], #1
-USER(           T(strb) r3, [r0], #1)                   @ May fault
+USER(   TUSER(  strb)   r3, [r0], #1)                   @ May fault
                 ldrgeb  r3, [r1], #1
-USER(           T(strgeb) r3, [r0], #1)                 @ May fault
+USER(   TUSER(  strgeb) r3, [r0], #1)                   @ May fault
                 ldrgtb  r3, [r1], #1
-USER(           T(strgtb) r3, [r0], #1)                 @ May fault
+USER(   TUSER(  strgtb) r3, [r0], #1)                   @ May fault
                 b       .Lc2u_finished
 
 .Lc2u_not_enough:
@@ -120,7 +120,7 @@ USER(		T(strgtb) r3, [r0], #1)			@ May fault
                 mov     r3, r7, pull #8
                 ldr     r7, [r1], #4
                 orr     r3, r3, r7, push #24
-USER(           T(str)  r3, [r0], #4)                   @ May fault
+USER(   TUSER(  str)    r3, [r0], #4)                   @ May fault
                 mov     ip, r0, lsl #32 - PAGE_SHIFT
                 rsb     ip, ip, #0
                 movs    ip, ip, lsr #32 - PAGE_SHIFT
@@ -155,18 +155,18 @@ USER(		T(str)	r3, [r0], #4)			@ May fault
                 movne   r3, r7, pull #8
                 ldrne   r7, [r1], #4
                 orrne   r3, r3, r7, push #24
-                T(strne) r3, [r0], #4                   @ Shouldnt fault
+        TUSER(  strne) r3, [r0], #4                     @ Shouldnt fault
                 ands    ip, ip, #3
                 beq     .Lc2u_1fupi
 .Lc2u_1nowords: mov     r3, r7, get_byte_1
                 teq     ip, #0
                 beq     .Lc2u_finished
                 cmp     ip, #2
-USER(           T(strb) r3, [r0], #1)                   @ May fault
+USER(   TUSER(  strb)   r3, [r0], #1)                   @ May fault
                 movge   r3, r7, get_byte_2
-USER(           T(strgeb) r3, [r0], #1)                 @ May fault
+USER(   TUSER(  strgeb) r3, [r0], #1)                   @ May fault
                 movgt   r3, r7, get_byte_3
-USER(           T(strgtb) r3, [r0], #1)                 @ May fault
+USER(   TUSER(  strgtb) r3, [r0], #1)                   @ May fault
                 b       .Lc2u_finished
 
 .Lc2u_2fupi:    subs    r2, r2, #4
@@ -175,7 +175,7 @@ USER(		T(strgtb) r3, [r0], #1)			@ May fault
                 mov     r3, r7, pull #16
                 ldr     r7, [r1], #4
                 orr     r3, r3, r7, push #16
-USER(           T(str)  r3, [r0], #4)                   @ May fault
+USER(   TUSER(  str)    r3, [r0], #4)                   @ May fault
                 mov     ip, r0, lsl #32 - PAGE_SHIFT
                 rsb     ip, ip, #0
                 movs    ip, ip, lsr #32 - PAGE_SHIFT
@@ -210,18 +210,18 @@ USER(		T(str)	r3, [r0], #4)			@ May fault
                 movne   r3, r7, pull #16
                 ldrne   r7, [r1], #4
                 orrne   r3, r3, r7, push #16
-                T(strne) r3, [r0], #4                   @ Shouldnt fault
+        TUSER(  strne) r3, [r0], #4                     @ Shouldnt fault
                 ands    ip, ip, #3
                 beq     .Lc2u_2fupi
 .Lc2u_2nowords: mov     r3, r7, get_byte_2
                 teq     ip, #0
                 beq     .Lc2u_finished
                 cmp     ip, #2
-USER(           T(strb) r3, [r0], #1)                   @ May fault
+USER(   TUSER(  strb)   r3, [r0], #1)                   @ May fault
                 movge   r3, r7, get_byte_3
-USER(           T(strgeb) r3, [r0], #1)                 @ May fault
+USER(   TUSER(  strgeb) r3, [r0], #1)                   @ May fault
                 ldrgtb  r3, [r1], #0
-USER(           T(strgtb) r3, [r0], #1)                 @ May fault
+USER(   TUSER(  strgtb) r3, [r0], #1)                   @ May fault
                 b       .Lc2u_finished
 
 .Lc2u_3fupi:    subs    r2, r2, #4
@@ -230,7 +230,7 @@ USER(		T(strgtb) r3, [r0], #1)			@ May fault
                 mov     r3, r7, pull #24
                 ldr     r7, [r1], #4
                 orr     r3, r3, r7, push #8
-USER(           T(str)  r3, [r0], #4)                   @ May fault
+USER(   TUSER(  str)    r3, [r0], #4)                   @ May fault
                 mov     ip, r0, lsl #32 - PAGE_SHIFT
                 rsb     ip, ip, #0
                 movs    ip, ip, lsr #32 - PAGE_SHIFT
@@ -265,18 +265,18 @@ USER(		T(str)	r3, [r0], #4)			@ May fault
                 movne   r3, r7, pull #24
                 ldrne   r7, [r1], #4
                 orrne   r3, r3, r7, push #8
-                T(strne) r3, [r0], #4                   @ Shouldnt fault
+        TUSER(  strne) r3, [r0], #4                     @ Shouldnt fault
                 ands    ip, ip, #3
                 beq     .Lc2u_3fupi
 .Lc2u_3nowords: mov     r3, r7, get_byte_3
                 teq     ip, #0
                 beq     .Lc2u_finished
                 cmp     ip, #2
-USER(           T(strb) r3, [r0], #1)                   @ May fault
+USER(   TUSER(  strb)   r3, [r0], #1)                   @ May fault
                 ldrgeb  r3, [r1], #1
-USER(           T(strgeb) r3, [r0], #1)                 @ May fault
+USER(   TUSER(  strgeb) r3, [r0], #1)                   @ May fault
                 ldrgtb  r3, [r1], #0
-USER(           T(strgtb) r3, [r0], #1)                 @ May fault
+USER(   TUSER(  strgtb) r3, [r0], #1)                   @ May fault
                 b       .Lc2u_finished
 ENDPROC(__copy_to_user)
 
@@ -295,11 +295,11 @@ ENDPROC(__copy_to_user)
 .Lcfu_dest_not_aligned:
                 rsb     ip, ip, #4
                 cmp     ip, #2
-USER(           T(ldrb) r3, [r1], #1)                   @ May fault
+USER(   TUSER(  ldrb)   r3, [r1], #1)                   @ May fault
                 strb    r3, [r0], #1
-USER(           T(ldrgeb) r3, [r1], #1)                 @ May fault
+USER(   TUSER(  ldrgeb) r3, [r1], #1)                   @ May fault
                 strgeb  r3, [r0], #1
-USER(           T(ldrgtb) r3, [r1], #1)                 @ May fault
+USER(   TUSER(  ldrgtb) r3, [r1], #1)                   @ May fault
                 strgtb  r3, [r0], #1
                 sub     r2, r2, ip
                 b       .Lcfu_dest_aligned
@@ -322,7 +322,7 @@ ENTRY(__copy_from_user)
 .Lcfu_0fupi:    subs    r2, r2, #4
                 addmi   ip, r2, #4
                 bmi     .Lcfu_0nowords
-USER(           T(ldr)  r3, [r1], #4)
+USER(   TUSER(  ldr)    r3, [r1], #4)
                 str     r3, [r0], #4
                 mov     ip, r1, lsl #32 - PAGE_SHIFT    @ On each page, use a ld/st??t instruction
                 rsb     ip, ip, #0
@@ -351,18 +351,18 @@ USER(		T(ldr)	r3, [r1], #4)
                 ldmneia r1!, {r3 - r4}                  @ Shouldnt fault
                 stmneia r0!, {r3 - r4}
                 tst     ip, #4
-                T(ldrne) r3, [r1], #4                   @ Shouldnt fault
+        TUSER(  ldrne) r3, [r1], #4                     @ Shouldnt fault
                 strne   r3, [r0], #4
                 ands    ip, ip, #3
                 beq     .Lcfu_0fupi
 .Lcfu_0nowords: teq     ip, #0
                 beq     .Lcfu_finished
 .Lcfu_nowords:  cmp     ip, #2
-USER(           T(ldrb) r3, [r1], #1)                   @ May fault
+USER(   TUSER(  ldrb)   r3, [r1], #1)                   @ May fault
                 strb    r3, [r0], #1
-USER(           T(ldrgeb) r3, [r1], #1)                 @ May fault
+USER(   TUSER(  ldrgeb) r3, [r1], #1)                   @ May fault
                 strgeb  r3, [r0], #1
-USER(           T(ldrgtb) r3, [r1], #1)                 @ May fault
+USER(   TUSER(  ldrgtb) r3, [r1], #1)                   @ May fault
                 strgtb  r3, [r0], #1
                 b       .Lcfu_finished
 
@@ -375,7 +375,7 @@ USER(		T(ldrgtb) r3, [r1], #1)			@ May fault
 
 .Lcfu_src_not_aligned:
                 bic     r1, r1, #3
-USER(           T(ldr)  r7, [r1], #4)                   @ May fault
+USER(   TUSER(  ldr)    r7, [r1], #4)                   @ May fault
                 cmp     ip, #2
                 bgt     .Lcfu_3fupi
                 beq     .Lcfu_2fupi
@@ -383,7 +383,7 @@ USER(		T(ldr)	r7, [r1], #4)			@ May fault
                 addmi   ip, r2, #4
                 bmi     .Lcfu_1nowords
                 mov     r3, r7, pull #8
-USER(           T(ldr)  r7, [r1], #4)                   @ May fault
+USER(   TUSER(  ldr)    r7, [r1], #4)                   @ May fault
                 orr     r3, r3, r7, push #24
                 str     r3, [r0], #4
                 mov     ip, r1, lsl #32 - PAGE_SHIFT
@@ -418,7 +418,7 @@ USER(		T(ldr)	r7, [r1], #4)			@ May fault
                 stmneia r0!, {r3 - r4}
                 tst     ip, #4
                 movne   r3, r7, pull #8
-USER(           T(ldrne) r7, [r1], #4)                  @ May fault
+USER(   TUSER(  ldrne) r7, [r1], #4)                    @ May fault
                 orrne   r3, r3, r7, push #24
                 strne   r3, [r0], #4
                 ands    ip, ip, #3
@@ -438,7 +438,7 @@ USER(		T(ldrne) r7, [r1], #4)			@ May fault
                 addmi   ip, r2, #4
                 bmi     .Lcfu_2nowords
                 mov     r3, r7, pull #16
-USER(           T(ldr)  r7, [r1], #4)                   @ May fault
+USER(   TUSER(  ldr)    r7, [r1], #4)                   @ May fault
                 orr     r3, r3, r7, push #16
                 str     r3, [r0], #4
                 mov     ip, r1, lsl #32 - PAGE_SHIFT
@@ -474,7 +474,7 @@ USER(		T(ldr)	r7, [r1], #4)			@ May fault
                 stmneia r0!, {r3 - r4}
                 tst     ip, #4
                 movne   r3, r7, pull #16
-USER(           T(ldrne) r7, [r1], #4)                  @ May fault
+USER(   TUSER(  ldrne) r7, [r1], #4)                    @ May fault
                 orrne   r3, r3, r7, push #16
                 strne   r3, [r0], #4
                 ands    ip, ip, #3
@@ -486,7 +486,7 @@ USER(		T(ldrne) r7, [r1], #4)			@ May fault
                 strb    r3, [r0], #1
                 movge   r3, r7, get_byte_3
                 strgeb  r3, [r0], #1
-USER(           T(ldrgtb) r3, [r1], #0)                 @ May fault
+USER(   TUSER(  ldrgtb) r3, [r1], #0)                   @ May fault
                 strgtb  r3, [r0], #1
                 b       .Lcfu_finished
 
@@ -494,7 +494,7 @@ USER(		T(ldrgtb) r3, [r1], #0)			@ May fault
                 addmi   ip, r2, #4
                 bmi     .Lcfu_3nowords
                 mov     r3, r7, pull #24
-USER(           T(ldr)  r7, [r1], #4)                   @ May fault
+USER(   TUSER(  ldr)    r7, [r1], #4)                   @ May fault
                 orr     r3, r3, r7, push #8
                 str     r3, [r0], #4
                 mov     ip, r1, lsl #32 - PAGE_SHIFT
@@ -529,7 +529,7 @@ USER(		T(ldr)	r7, [r1], #4)			@ May fault
                 stmneia r0!, {r3 - r4}
                 tst     ip, #4
                 movne   r3, r7, pull #24
-USER(           T(ldrne) r7, [r1], #4)                  @ May fault
+USER(   TUSER(  ldrne) r7, [r1], #4)                    @ May fault
                 orrne   r3, r3, r7, push #8
                 strne   r3, [r0], #4
                 ands    ip, ip, #3
@@ -539,9 +539,9 @@ USER(		T(ldrne) r7, [r1], #4)			@ May fault
                 beq     .Lcfu_finished
                 cmp     ip, #2
                 strb    r3, [r0], #1
-USER(           T(ldrgeb) r3, [r1], #1)                 @ May fault
+USER(   TUSER(  ldrgeb) r3, [r1], #1)                   @ May fault
                 strgeb  r3, [r0], #1
-USER(           T(ldrgtb) r3, [r1], #1)                 @ May fault
+USER(   TUSER(  ldrgtb) r3, [r1], #1)                   @ May fault
                 strgtb  r3, [r0], #1
                 b       .Lcfu_finished
 ENDPROC(__copy_from_user)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 4f991f295284..71feb00a1e99 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -18,6 +18,12 @@ config HAVE_AT91_USART4
 config HAVE_AT91_USART5
         bool
 
+config AT91_SAM9_ALT_RESET
+        bool
+
+config AT91_SAM9G45_RESET
+        bool
+
 menu "Atmel AT91 System-on-Chip"
 
 choice
@@ -39,6 +45,7 @@ config ARCH_AT91SAM9260
         select HAVE_AT91_USART4
         select HAVE_AT91_USART5
         select HAVE_NET_MACB
+        select AT91_SAM9_ALT_RESET
 
 config ARCH_AT91SAM9261
         bool "AT91SAM9261"
@@ -46,6 +53,7 @@ config ARCH_AT91SAM9261
         select GENERIC_CLOCKEVENTS
         select HAVE_FB_ATMEL
         select HAVE_AT91_DBGU0
+        select AT91_SAM9_ALT_RESET
 
 config ARCH_AT91SAM9G10
         bool "AT91SAM9G10"
@@ -53,6 +61,7 @@ config ARCH_AT91SAM9G10
         select GENERIC_CLOCKEVENTS
         select HAVE_AT91_DBGU0
         select HAVE_FB_ATMEL
+        select AT91_SAM9_ALT_RESET
 
 config ARCH_AT91SAM9263
         bool "AT91SAM9263"
@@ -61,6 +70,7 @@ config ARCH_AT91SAM9263
         select HAVE_FB_ATMEL
         select HAVE_NET_MACB
         select HAVE_AT91_DBGU1
+        select AT91_SAM9_ALT_RESET
 
 config ARCH_AT91SAM9RL
         bool "AT91SAM9RL"
@@ -69,6 +79,7 @@ config ARCH_AT91SAM9RL
         select HAVE_AT91_USART3
         select HAVE_FB_ATMEL
         select HAVE_AT91_DBGU0
+        select AT91_SAM9_ALT_RESET
 
 config ARCH_AT91SAM9G20
         bool "AT91SAM9G20"
@@ -79,6 +90,7 @@ config ARCH_AT91SAM9G20
         select HAVE_AT91_USART4
         select HAVE_AT91_USART5
         select HAVE_NET_MACB
+        select AT91_SAM9_ALT_RESET
 
 config ARCH_AT91SAM9G45
         bool "AT91SAM9G45"
@@ -88,6 +100,7 @@ config ARCH_AT91SAM9G45
         select HAVE_FB_ATMEL
         select HAVE_NET_MACB
         select HAVE_AT91_DBGU1
+        select AT91_SAM9G45_RESET
 
 config ARCH_AT91CAP9
         bool "AT91CAP9"
@@ -96,6 +109,7 @@ config ARCH_AT91CAP9
         select HAVE_FB_ATMEL
         select HAVE_NET_MACB
         select HAVE_AT91_DBGU1
+        select AT91_SAM9G45_RESET
 
 config ARCH_AT91X40
         bool "AT91x40"
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 242174f9f355..705e1fbded39 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -8,15 +8,17 @@ obj-n		:=
 obj-            :=
 
 obj-$(CONFIG_AT91_PMC_UNIT)     += clock.o
+obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o
+obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o
 
 # CPU-specific support
 obj-$(CONFIG_ARCH_AT91RM9200)   += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9260)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o
-obj-$(CONFIG_ARCH_AT91SAM9261)  += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o
-obj-$(CONFIG_ARCH_AT91SAM9G10)  += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o
-obj-$(CONFIG_ARCH_AT91SAM9263)  += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o at91sam9_alt_reset.o
-obj-$(CONFIG_ARCH_AT91SAM9RL)   += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o at91sam9_alt_reset.o
-obj-$(CONFIG_ARCH_AT91SAM9G20)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o
+obj-$(CONFIG_ARCH_AT91SAM9260)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9261)  += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9G10)  += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9263)  += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9RL)   += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9G20)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91SAM9G45)  += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91CAP9)     += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91X40)      += at91x40.o at91x40_time.o
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index edb879ac04c8..a42edc25a87e 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -21,7 +21,6 @@
 #include <mach/cpu.h>
 #include <mach/at91cap9.h>
 #include <mach/at91_pmc.h>
-#include <mach/at91_rstc.h>
 
 #include "soc.h"
 #include "generic.h"
@@ -314,11 +313,6 @@ static struct at91_gpio_bank at91cap9_gpio[] __initdata = {
         }
 };
 
-static void at91cap9_restart(char mode, const char *cmd)
-{
-        at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
-}
-
 /* --------------------------------------------------------------------
  *  AT91CAP9 processor initialization
  * -------------------------------------------------------------------- */
@@ -331,13 +325,14 @@ static void __init at91cap9_map_io(void)
 static void __init at91cap9_ioremap_registers(void)
 {
         at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC);
+        at91_ioremap_rstc(AT91CAP9_BASE_RSTC);
         at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT);
         at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC);
 }
 
 static void __init at91cap9_initialize(void)
 {
-        arm_pm_restart = at91cap9_restart;
+        arm_pm_restart = at91sam9g45_restart;
         at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
 
         /* Register GPIO subsystem */
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 5e46e4a96430..d4036ba43612 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -323,6 +323,7 @@ static void __init at91sam9260_map_io(void)
 static void __init at91sam9260_ioremap_registers(void)
 {
         at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC);
+        at91_ioremap_rstc(AT91SAM9260_BASE_RSTC);
         at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT);
         at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
 }
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index b85b9ea60170..023c2ff138df 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -281,6 +281,7 @@ static void __init at91sam9261_map_io(void)
 static void __init at91sam9261_ioremap_registers(void)
 {
         at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC);
+        at91_ioremap_rstc(AT91SAM9261_BASE_RSTC);
         at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
         at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
 }
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 79e3669b1117..75e876c258af 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -301,6 +301,7 @@ static void __init at91sam9263_map_io(void)
 static void __init at91sam9263_ioremap_registers(void)
 {
         at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC);
+        at91_ioremap_rstc(AT91SAM9263_BASE_RSTC);
         at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
         at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
         at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S
index d3f931c5942e..518e42377171 100644
--- a/arch/arm/mach-at91/at91sam9_alt_reset.S
+++ b/arch/arm/mach-at91/at91sam9_alt_reset.S
@@ -23,7 +23,8 @@
                         .globl  at91sam9_alt_restart
 
 at91sam9_alt_restart:   ldr     r0, .at91_va_base_sdramc        @ preload constants
-                        ldr     r1, .at91_va_base_rstc_cr
+                        ldr     r1, =at91_rstc_base
+                        ldr     r1, [r1]
 
                         mov     r2, #1
                         mov     r3, #AT91_SDRAMC_LPCB_POWER_DOWN
@@ -33,11 +34,9 @@ at91sam9_alt_restart:	ldr	r0, .at91_va_base_sdramc	@ preload constants
 
                         str     r2, [r0, #AT91_SDRAMC_TR]       @ disable SDRAM access
                         str     r3, [r0, #AT91_SDRAMC_LPR]      @ power down SDRAM
-                        str     r4, [r1]                        @ reset processor
+                        str     r4, [r1, #AT91_RSTC_CR]         @ reset processor
 
                         b       .
 
 .at91_va_base_sdramc:
         .word AT91_VA_BASE_SYS + AT91_SDRAMC0
-.at91_va_base_rstc_cr:
-        .word AT91_VA_BASE_SYS + AT91_RSTC_CR
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 7032dd32cdf0..1cb6a96b1c1e 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -18,7 +18,6 @@
 #include <asm/mach/map.h>
 #include <mach/at91sam9g45.h>
 #include <mach/at91_pmc.h>
-#include <mach/at91_rstc.h>
 #include <mach/cpu.h>
 
 #include "soc.h"
@@ -318,11 +317,6 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
         }
 };
 
-static void at91sam9g45_restart(char mode, const char *cmd)
-{
-        at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
-}
-
 /* --------------------------------------------------------------------
  *  AT91SAM9G45 processor initialization
  * -------------------------------------------------------------------- */
@@ -336,6 +330,7 @@ static void __init at91sam9g45_map_io(void)
 static void __init at91sam9g45_ioremap_registers(void)
 {
         at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC);
+        at91_ioremap_rstc(AT91SAM9G45_BASE_RSTC);
         at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
         at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC);
 }
diff --git a/arch/arm/mach-at91/at91sam9g45_reset.S b/arch/arm/mach-at91/at91sam9g45_reset.S
new file mode 100644
index 000000000000..0468be10980b
--- /dev/null
+++ b/arch/arm/mach-at91/at91sam9g45_reset.S
@@ -0,0 +1,40 @@
+/*
+ * reset AT91SAM9G45 as per errata
+ *
+ * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcosoft.com>
+ *
+ * unless the SDRAM is cleanly shutdown before we hit the
+ * reset register it can be left driving the data bus and
+ * killing the chance of a subsequent boot from NAND
+ *
+ * GPLv2 Only
+ */
+
+#include <linux/linkage.h>
+#include <mach/hardware.h>
+#include <mach/at91sam9_ddrsdr.h>
+#include <mach/at91_rstc.h>
+
+                        .arm
+
+                        .globl  at91sam9g45_restart
+
+at91sam9g45_restart:
+                        ldr     r0, .at91_va_base_sdramc0       @ preload constants
+                        ldr     r1, =at91_rstc_base
+                        ldr     r1, [r1]
+
+                        mov     r2, #1
+                        mov     r3, #AT91_DDRSDRC_LPCB_POWER_DOWN
+                        ldr     r4, =AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST
+
+                        .balign 32                              @ align to cache line
+
+                        str     r2, [r0, #AT91_DDRSDRC_RTR]     @ disable DDR0 access
+                        str     r3, [r0, #AT91_DDRSDRC_LPR]     @ power down DDR0
+                        str     r4, [r1, #AT91_RSTC_CR]         @ reset processor
+
+                        b       .
+
+.at91_va_base_sdramc0:
+        .word AT91_VA_BASE_SYS + AT91_DDRSDRC0
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index d6bcb1da11df..d2c91a841cb8 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -286,6 +286,7 @@ static void __init at91sam9rl_map_io(void)
 static void __init at91sam9rl_ioremap_registers(void)
 {
         at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC);
+        at91_ioremap_rstc(AT91SAM9RL_BASE_RSTC);
         at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT);
         at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
 }
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 4866b8180d66..594133451c0c 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -58,7 +58,9 @@ extern void at91_irq_suspend(void);
 extern void at91_irq_resume(void);
 
 /* reset */
+extern void at91_ioremap_rstc(u32 base_addr);
 extern void at91sam9_alt_restart(char, const char *);
+extern void at91sam9g45_restart(char, const char *);
 
 /* shutdown */
 extern void at91_ioremap_shdwc(u32 base_addr);
diff --git a/arch/arm/mach-at91/include/mach/at91_rstc.h b/arch/arm/mach-at91/include/mach/at91_rstc.h
index cbd2bf052c1f..875fa336800b 100644
--- a/arch/arm/mach-at91/include/mach/at91_rstc.h
+++ b/arch/arm/mach-at91/include/mach/at91_rstc.h
@@ -16,13 +16,25 @@
 #ifndef AT91_RSTC_H
 #define AT91_RSTC_H
 
-#define AT91_RSTC_CR            (AT91_RSTC + 0x00)      /* Reset Controller Control Register */
+#ifndef __ASSEMBLY__
+extern void __iomem *at91_rstc_base;
+
+#define at91_rstc_read(field) \
+        __raw_readl(at91_rstc_base + field)
+
+#define at91_rstc_write(field, value) \
+        __raw_writel(value, at91_rstc_base + field);
+#else
+.extern at91_rstc_base
+#endif
+
+#define AT91_RSTC_CR            0x00                    /* Reset Controller Control Register */
 #define         AT91_RSTC_PROCRST       (1 << 0)                /* Processor Reset */
 #define         AT91_RSTC_PERRST        (1 << 2)                /* Peripheral Reset */
 #define         AT91_RSTC_EXTRST        (1 << 3)                /* External Reset */
 #define         AT91_RSTC_KEY           (0xa5 << 24)            /* KEY Password */
 
-#define AT91_RSTC_SR            (AT91_RSTC + 0x04)      /* Reset Controller Status Register */
+#define AT91_RSTC_SR            0x04                    /* Reset Controller Status Register */
 #define         AT91_RSTC_URSTS         (1 << 0)                /* User Reset Status */
 #define         AT91_RSTC_RSTTYP        (7 << 8)                /* Reset Type */
 #define                 AT91_RSTC_RSTTYP_GENERAL        (0 << 8)
@@ -33,7 +45,7 @@
 #define         AT91_RSTC_NRSTL         (1 << 16)               /* NRST Pin Level */
 #define         AT91_RSTC_SRCMP         (1 << 17)               /* Software Reset Command in Progress */
 
-#define AT91_RSTC_MR            (AT91_RSTC + 0x08)      /* Reset Controller Mode Register */
+#define AT91_RSTC_MR            0x08                    /* Reset Controller Mode Register */
 #define         AT91_RSTC_URSTEN        (1 << 0)                /* User Reset Enable */
 #define         AT91_RSTC_URSTIEN       (1 << 4)                /* User Reset Interrupt Enable */
 #define         AT91_RSTC_ERSTL         (0xf << 8)              /* External Reset Length */
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
index 4c0e2f6011d7..61d952902f2b 100644
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ b/arch/arm/mach-at91/include/mach/at91cap9.h
@@ -83,7 +83,6 @@
 #define AT91_DDRSDRC0   (0xffffe600 - AT91_BASE_SYS)
 #define AT91_MATRIX     (0xffffea00 - AT91_BASE_SYS)
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
-#define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
 #define AT91_GPBR       (cpu_is_at91cap9_revB() ?       \
                         (0xfffffd50 - AT91_BASE_SYS) :  \
                         (0xfffffd60 - AT91_BASE_SYS))
@@ -96,6 +95,7 @@
 #define AT91CAP9_BASE_PIOB      0xfffff400
 #define AT91CAP9_BASE_PIOC      0xfffff600
 #define AT91CAP9_BASE_PIOD      0xfffff800
+#define AT91CAP9_BASE_RSTC      0xfffffd00
 #define AT91CAP9_BASE_SHDWC     0xfffffd10
 #define AT91CAP9_BASE_RTT       0xfffffd20
 #define AT91CAP9_BASE_PIT       0xfffffd30
diff --git a/arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h b/arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h
deleted file mode 100644
index 976f4a6c3353..000000000000
--- a/arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h
+++ /dev/null
@@ -1,108 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h
- *
- *  (C) 2008 Andrew Victor
- *
- * DDR/SDR Controller (DDRSDRC) - System peripherals registers.
- * Based on AT91CAP9 datasheet revision B.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91CAP9_DDRSDR_H
-#define AT91CAP9_DDRSDR_H
-
-#define AT91_DDRSDRC_MR         0x00    /* Mode Register */
-#define         AT91_DDRSDRC_MODE       (0xf << 0)              /* Command Mode */
-#define                 AT91_DDRSDRC_MODE_NORMAL                0
-#define                 AT91_DDRSDRC_MODE_NOP           1
-#define                 AT91_DDRSDRC_MODE_PRECHARGE     2
-#define                 AT91_DDRSDRC_MODE_LMR           3
-#define                 AT91_DDRSDRC_MODE_REFRESH       4
-#define                 AT91_DDRSDRC_MODE_EXT_LMR       5
-#define                 AT91_DDRSDRC_MODE_DEEP          6
-
-#define AT91_DDRSDRC_RTR        0x04    /* Refresh Timer Register */
-#define         AT91_DDRSDRC_COUNT      (0xfff << 0)            /* Refresh Timer Counter */
-
-#define AT91_DDRSDRC_CR         0x08    /* Configuration Register */
-#define         AT91_DDRSDRC_NC         (3 << 0)                /* Number of Column Bits */
-#define                 AT91_DDRSDRC_NC_SDR8    (0 << 0)
-#define                 AT91_DDRSDRC_NC_SDR9    (1 << 0)
-#define                 AT91_DDRSDRC_NC_SDR10   (2 << 0)
-#define                 AT91_DDRSDRC_NC_SDR11   (3 << 0)
-#define                 AT91_DDRSDRC_NC_DDR9    (0 << 0)
-#define                 AT91_DDRSDRC_NC_DDR10   (1 << 0)
-#define                 AT91_DDRSDRC_NC_DDR11   (2 << 0)
-#define                 AT91_DDRSDRC_NC_DDR12   (3 << 0)
-#define         AT91_DDRSDRC_NR         (3 << 2)                /* Number of Row Bits */
-#define                 AT91_DDRSDRC_NR_11      (0 << 2)
-#define                 AT91_DDRSDRC_NR_12      (1 << 2)
-#define                 AT91_DDRSDRC_NR_13      (2 << 2)
-#define         AT91_DDRSDRC_CAS        (7 << 4)                /* CAS Latency */
-#define                 AT91_DDRSDRC_CAS_2      (2 << 4)
-#define                 AT91_DDRSDRC_CAS_3      (3 << 4)
-#define                 AT91_DDRSDRC_CAS_25     (6 << 4)
-#define         AT91_DDRSDRC_DLL        (1 << 7)                /* Reset DLL */
-#define         AT91_DDRSDRC_DICDS      (1 << 8)                /* Output impedance control */
-
-#define AT91_DDRSDRC_T0PR       0x0C    /* Timing 0 Register */
-#define         AT91_DDRSDRC_TRAS       (0xf <<  0)             /* Active to Precharge delay */
-#define         AT91_DDRSDRC_TRCD       (0xf <<  4)             /* Row to Column delay */
-#define         AT91_DDRSDRC_TWR        (0xf <<  8)             /* Write recovery delay */
-#define         AT91_DDRSDRC_TRC        (0xf << 12)             /* Row cycle delay */
-#define         AT91_DDRSDRC_TRP        (0xf << 16)             /* Row precharge delay */
-#define         AT91_DDRSDRC_TRRD       (0xf << 20)             /* Active BankA to BankB */
-#define         AT91_DDRSDRC_TWTR       (1   << 24)             /* Internal Write to Read delay */
-#define         AT91_DDRSDRC_TMRD       (0xf << 28)             /* Load mode to active/refresh delay */
-
-#define AT91_DDRSDRC_T1PR       0x10    /* Timing 1 Register */
-#define         AT91_DDRSDRC_TRFC       (0x1f << 0)             /* Row Cycle Delay */
-#define         AT91_DDRSDRC_TXSNR      (0xff << 8)             /* Exit self-refresh to non-read */
-#define         AT91_DDRSDRC_TXSRD      (0xff << 16)            /* Exit self-refresh to read */
-#define         AT91_DDRSDRC_TXP        (0xf  << 24)            /* Exit power-down delay */
-
-#define AT91_DDRSDRC_LPR        0x18    /* Low Power Register */
-#define         AT91_DDRSDRC_LPCB               (3 << 0)        /* Low-power Configurations */
-#define                 AT91_DDRSDRC_LPCB_DISABLE               0
-#define                 AT91_DDRSDRC_LPCB_SELF_REFRESH          1
-#define                 AT91_DDRSDRC_LPCB_POWER_DOWN            2
-#define                 AT91_DDRSDRC_LPCB_DEEP_POWER_DOWN       3
-#define         AT91_DDRSDRC_CLKFR              (1 << 2)        /* Clock Frozen */
-#define         AT91_DDRSDRC_PASR               (7 << 4)        /* Partial Array Self Refresh */
-#define         AT91_DDRSDRC_TCSR               (3 << 8)        /* Temperature Compensated Self Refresh */
-#define         AT91_DDRSDRC_DS                 (3 << 10)       /* Drive Strength */
-#define         AT91_DDRSDRC_TIMEOUT            (3 << 12)       /* Time to define when Low Power Mode is enabled */
-#define                 AT91_DDRSDRC_TIMEOUT_0_CLK_CYCLES       (0 << 12)
-#define                 AT91_DDRSDRC_TIMEOUT_64_CLK_CYCLES      (1 << 12)
-#define                 AT91_DDRSDRC_TIMEOUT_128_CLK_CYCLES     (2 << 12)
-
-#define AT91_DDRSDRC_MDR        0x1C    /* Memory Device Register */
-#define         AT91_DDRSDRC_MD         (3 << 0)                /* Memory Device Type */
-#define                 AT91_DDRSDRC_MD_SDR             0
-#define                 AT91_DDRSDRC_MD_LOW_POWER_SDR   1
-#define                 AT91_DDRSDRC_MD_DDR             2
-#define                 AT91_DDRSDRC_MD_LOW_POWER_DDR   3
-
-#define AT91_DDRSDRC_DLLR       0x20    /* DLL Information Register */
-#define         AT91_DDRSDRC_MDINC      (1 << 0)                /* Master Delay increment */
-#define         AT91_DDRSDRC_MDDEC      (1 << 1)                /* Master Delay decrement */
-#define         AT91_DDRSDRC_MDOVF      (1 << 2)                /* Master Delay Overflow */
-#define         AT91_DDRSDRC_SDCOVF     (1 << 3)                /* Slave Delay Correction Overflow */
-#define         AT91_DDRSDRC_SDCUDF     (1 << 4)                /* Slave Delay Correction Underflow */
-#define         AT91_DDRSDRC_SDERF      (1 << 5)                /* Slave Delay Correction error */
-#define         AT91_DDRSDRC_MDVAL      (0xff <<  8)            /* Master Delay value */
-#define         AT91_DDRSDRC_SDVAL      (0xff << 16)            /* Slave Delay value */
-#define         AT91_DDRSDRC_SDCVAL     (0xff << 24)            /* Slave Delay Correction value */
-
-/* Register access macros */
-#define at91_ramc_read(num, reg) \
-        at91_sys_read(AT91_DDRSDRC##num + reg)
-#define at91_ramc_write(num, reg, value) \
-        at91_sys_write(AT91_DDRSDRC##num + reg, value)
-
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index f937c476bb67..fa5ca278adeb 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -83,7 +83,6 @@
 #define AT91_SDRAMC0    (0xffffea00 - AT91_BASE_SYS)
 #define AT91_MATRIX     (0xffffee00 - AT91_BASE_SYS)
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
-#define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
 #define AT91_GPBR       (0xfffffd50 - AT91_BASE_SYS)
 
 #define AT91SAM9260_BASE_ECC    0xffffe800
@@ -92,6 +91,7 @@
 #define AT91SAM9260_BASE_PIOA   0xfffff400
 #define AT91SAM9260_BASE_PIOB   0xfffff600
 #define AT91SAM9260_BASE_PIOC   0xfffff800
+#define AT91SAM9260_BASE_RSTC   0xfffffd00
 #define AT91SAM9260_BASE_SHDWC  0xfffffd10
 #define AT91SAM9260_BASE_RTT    0xfffffd20
 #define AT91SAM9260_BASE_PIT    0xfffffd30
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index 175604e261be..7cde2d36570e 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -68,7 +68,6 @@
 #define AT91_SDRAMC0    (0xffffea00 - AT91_BASE_SYS)
 #define AT91_MATRIX     (0xffffee00 - AT91_BASE_SYS)
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
-#define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
 #define AT91_GPBR       (0xfffffd50 - AT91_BASE_SYS)
 
 #define AT91SAM9261_BASE_SMC    0xffffec00
@@ -76,6 +75,7 @@
 #define AT91SAM9261_BASE_PIOA   0xfffff400
 #define AT91SAM9261_BASE_PIOB   0xfffff600
 #define AT91SAM9261_BASE_PIOC   0xfffff800
+#define AT91SAM9261_BASE_RSTC   0xfffffd00
 #define AT91SAM9261_BASE_SHDWC  0xfffffd10
 #define AT91SAM9261_BASE_RTT    0xfffffd20
 #define AT91SAM9261_BASE_PIT    0xfffffd30
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index 80c915002d83..5949abda962b 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -78,7 +78,6 @@
 #define AT91_SDRAMC1    (0xffffe800 - AT91_BASE_SYS)
 #define AT91_MATRIX     (0xffffec00 - AT91_BASE_SYS)
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
-#define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
 #define AT91_GPBR       (0xfffffd60 - AT91_BASE_SYS)
 
 #define AT91SAM9263_BASE_ECC0   0xffffe000
@@ -91,6 +90,7 @@
 #define AT91SAM9263_BASE_PIOC   0xfffff600
 #define AT91SAM9263_BASE_PIOD   0xfffff800
 #define AT91SAM9263_BASE_PIOE   0xfffffa00
+#define AT91SAM9263_BASE_RSTC   0xfffffd00
 #define AT91SAM9263_BASE_SHDWC  0xfffffd10
 #define AT91SAM9263_BASE_RTT0   0xfffffd20
 #define AT91SAM9263_BASE_PIT    0xfffffd30
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
index d27b15ba8ebf..e2f8da8ce5bc 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
@@ -46,10 +46,10 @@
 #define                 AT91_DDRSDRC_CAS_25     (6 << 4)
 #define         AT91_DDRSDRC_RST_DLL    (1 << 7)                /* Reset DLL */
 #define         AT91_DDRSDRC_DICDS      (1 << 8)                /* Output impedance control */
-#define         AT91_DDRSDRC_DIS_DLL    (1 << 9)                /* Disable DLL */
-#define         AT91_DDRSDRC_OCD        (1 << 12)               /* Off-Chip Driver */
-#define         AT91_DDRSDRC_DQMS       (1 << 16)               /* Mask Data is Shared */
-#define         AT91_DDRSDRC_ACTBST     (1 << 18)               /* Active Bank X to Burst Stop Read Access Bank Y */
+#define         AT91_DDRSDRC_DIS_DLL    (1 << 9)                /* Disable DLL [SAM9 Only] */
+#define         AT91_DDRSDRC_OCD        (1 << 12)               /* Off-Chip Driver [SAM9 Only] */
+#define         AT91_DDRSDRC_DQMS       (1 << 16)               /* Mask Data is Shared [SAM9 Only] */
+#define         AT91_DDRSDRC_ACTBST     (1 << 18)               /* Active Bank X to Burst Stop Read Access Bank Y [SAM9 Only] */
 
 #define AT91_DDRSDRC_T0PR       0x0C    /* Timing 0 Register */
 #define         AT91_DDRSDRC_TRAS       (0xf <<  0)             /* Active to Precharge delay */
@@ -59,7 +59,8 @@
 #define         AT91_DDRSDRC_TRP        (0xf << 16)             /* Row precharge delay */
 #define         AT91_DDRSDRC_TRRD       (0xf << 20)             /* Active BankA to BankB */
 #define         AT91_DDRSDRC_TWTR       (0x7 << 24)             /* Internal Write to Read delay */
-#define         AT91_DDRSDRC_RED_WRRD   (0x1 << 27)             /* Reduce Write to Read Delay */
+#define         AT91CAP9_DDRSDRC_TWTR   (1   << 24)             /* Internal Write to Read delay */
+#define         AT91_DDRSDRC_RED_WRRD   (0x1 << 27)             /* Reduce Write to Read Delay [SAM9 Only] */
 #define         AT91_DDRSDRC_TMRD       (0xf << 28)             /* Load mode to active/refresh delay */
 
 #define AT91_DDRSDRC_T1PR       0x10    /* Timing 1 Register */
@@ -68,13 +69,14 @@
 #define         AT91_DDRSDRC_TXSRD      (0xff << 16)            /* Exit self-refresh to read */
 #define         AT91_DDRSDRC_TXP        (0xf  << 24)            /* Exit power-down delay */
 
-#define AT91_DDRSDRC_T2PR       0x14    /* Timing 2 Register */
+#define AT91_DDRSDRC_T2PR       0x14    /* Timing 2 Register [SAM9 Only] */
 #define         AT91_DDRSDRC_TXARD      (0xf  << 0)             /* Exit active power down delay to read command in mode "Fast Exit" */
 #define         AT91_DDRSDRC_TXARDS     (0xf  << 4)             /* Exit active power down delay to read command in mode "Slow Exit" */
 #define         AT91_DDRSDRC_TRPA       (0xf  << 8)             /* Row Precharge All delay */
 #define         AT91_DDRSDRC_TRTP       (0x7  << 12)            /* Read to Precharge delay */
 
 #define AT91_DDRSDRC_LPR        0x1C    /* Low Power Register */
+#define AT91CAP9_DDRSDRC_LPR    0x18    /* Low Power Register */
 #define         AT91_DDRSDRC_LPCB       (3 << 0)                /* Low-power Configurations */
 #define                 AT91_DDRSDRC_LPCB_DISABLE               0
 #define                 AT91_DDRSDRC_LPCB_SELF_REFRESH          1
@@ -92,32 +94,40 @@
 #define         AT91_DDRSDRC_UPD_MR     (3 << 20)        /* Update load mode register and extended mode register */
 
 #define AT91_DDRSDRC_MDR        0x20    /* Memory Device Register */
+#define AT91CAP9_DDRSDRC_MDR    0x1C    /* Memory Device Register */
 #define         AT91_DDRSDRC_MD         (3 << 0)                /* Memory Device Type */
 #define                 AT91_DDRSDRC_MD_SDR             0
 #define                 AT91_DDRSDRC_MD_LOW_POWER_SDR   1
+#define                 AT91CAP9_DDRSDRC_MD_DDR         2
 #define                 AT91_DDRSDRC_MD_LOW_POWER_DDR   3
-#define                 AT91_DDRSDRC_MD_DDR2            6
+#define                 AT91_DDRSDRC_MD_DDR2            6       /* [SAM9 Only] */
 #define         AT91_DDRSDRC_DBW        (1 << 4)                /* Data Bus Width */
 #define                 AT91_DDRSDRC_DBW_32BITS         (0 <<  4)
 #define                 AT91_DDRSDRC_DBW_16BITS         (1 <<  4)
 
 #define AT91_DDRSDRC_DLL        0x24    /* DLL Information Register */
+#define AT91CAP9_DDRSDRC_DLL    0x20    /* DLL Information Register */
 #define         AT91_DDRSDRC_MDINC      (1 << 0)                /* Master Delay increment */
 #define         AT91_DDRSDRC_MDDEC      (1 << 1)                /* Master Delay decrement */
 #define         AT91_DDRSDRC_MDOVF      (1 << 2)                /* Master Delay Overflow */
+#define         AT91CAP9_DDRSDRC_SDCOVF (1 << 3)                /* Slave Delay Correction Overflow */
+#define         AT91CAP9_DDRSDRC_SDCUDF (1 << 4)                /* Slave Delay Correction Underflow */
+#define         AT91CAP9_DDRSDRC_SDERF  (1 << 5)                /* Slave Delay Correction error */
 #define         AT91_DDRSDRC_MDVAL      (0xff <<  8)            /* Master Delay value */
+#define         AT91CAP9_DDRSDRC_SDVAL  (0xff << 16)            /* Slave Delay value */
+#define         AT91CAP9_DDRSDRC_SDCVAL (0xff << 24)            /* Slave Delay Correction value */
 
-#define AT91_DDRSDRC_HS         0x2C    /* High Speed Register */
+#define AT91_DDRSDRC_HS         0x2C    /* High Speed Register [SAM9 Only] */
 #define         AT91_DDRSDRC_DIS_ATCP_RD        (1 << 2)        /* Anticip read access is disabled */
 
 #define AT91_DDRSDRC_DELAY(n)   (0x30 + (0x4 * (n)))    /* Delay I/O Register n */
 
-#define AT91_DDRSDRC_WPMR       0xE4    /* Write Protect Mode Register */
+#define AT91_DDRSDRC_WPMR       0xE4    /* Write Protect Mode Register [SAM9 Only] */
 #define         AT91_DDRSDRC_WP         (1 << 0)                /* Write protect enable */
 #define         AT91_DDRSDRC_WPKEY      (0xffffff << 8)         /* Write protect key */
 #define         AT91_DDRSDRC_KEY        (0x444452 << 8)         /* Write protect key = "DDR" */
 
-#define AT91_DDRSDRC_WPSR       0xE8    /* Write Protect Status Register */
+#define AT91_DDRSDRC_WPSR       0xE8    /* Write Protect Status Register [SAM9 Only] */
 #define         AT91_DDRSDRC_WPVS       (1 << 0)                /* Write protect violation status */
 #define         AT91_DDRSDRC_WPVSRC     (0xffff << 8)           /* Write protect violation source */
 
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index f0c23c960dec..dd9c95ea0862 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -90,7 +90,6 @@
 #define AT91_DDRSDRC0   (0xffffe600 - AT91_BASE_SYS)
 #define AT91_MATRIX     (0xffffea00 - AT91_BASE_SYS)
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
-#define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
 #define AT91_GPBR       (0xfffffd60 - AT91_BASE_SYS)
 
 #define AT91SAM9G45_BASE_ECC    0xffffe200
@@ -102,6 +101,7 @@
 #define AT91SAM9G45_BASE_PIOC   0xfffff600
 #define AT91SAM9G45_BASE_PIOD   0xfffff800
 #define AT91SAM9G45_BASE_PIOE   0xfffffa00
+#define AT91SAM9G45_BASE_RSTC   0xfffffd00
 #define AT91SAM9G45_BASE_SHDWC  0xfffffd10
 #define AT91SAM9G45_BASE_RTT    0xfffffd20
 #define AT91SAM9G45_BASE_PIT    0xfffffd30
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index 2bb359e60b97..d7bead7118da 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -72,7 +72,6 @@
 #define AT91_SDRAMC0    (0xffffea00 - AT91_BASE_SYS)
 #define AT91_MATRIX     (0xffffee00 - AT91_BASE_SYS)
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
-#define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
 #define AT91_SCKCR      (0xfffffd50 - AT91_BASE_SYS)
 #define AT91_GPBR       (0xfffffd60 - AT91_BASE_SYS)
 
@@ -84,6 +83,7 @@
 #define AT91SAM9RL_BASE_PIOB    0xfffff600
 #define AT91SAM9RL_BASE_PIOC    0xfffff800
 #define AT91SAM9RL_BASE_PIOD    0xfffffa00
+#define AT91SAM9RL_BASE_RSTC    0xfffffd00
 #define AT91SAM9RL_BASE_SHDWC   0xfffffd10
 #define AT91SAM9RL_BASE_RTT     0xfffffd20
 #define AT91SAM9RL_BASE_PIT     0xfffffd30
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index d0b377b21bd7..3b33f07b1e11 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -88,7 +88,7 @@ extern void __init at91_add_device_eth(struct macb_platform_data *data);
 struct at91_usbh_data {
         u8              ports;          /* number of ports on root hub */
         int             vbus_pin[2];    /* port power-control pin */
-        u8              vbus_pin_inverted;
+        u8              vbus_pin_active_low[2];
         u8              overcurrent_supported;
         int             overcurrent_pin[2];
         u8              overcurrent_status[2];
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 62ad95556c36..1606379ac284 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -34,7 +34,6 @@
 /*
  * Show the reason for the previous system reset.
  */
-#if defined(AT91_RSTC)
 
 #include <mach/at91_rstc.h>
 #include <mach/at91_shdwc.h>
@@ -58,10 +57,10 @@ static void __init show_reset_status(void)
         char *reason, *r2 = reset;
         u32 reset_type, wake_type;
 
-        if (!at91_shdwc_base)
+        if (!at91_shdwc_base || !at91_rstc_base)
                 return;
 
-        reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
+        reset_type = at91_rstc_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
         wake_type = at91_shdwc_read(AT91_SHDW_SR);
 
         switch (reset_type) {
@@ -102,10 +101,6 @@ static void __init show_reset_status(void)
         }
         pr_info("AT91: Starting after %s %s\n", reason, r2);
 }
-#else
-static void __init show_reset_status(void) {}
-#endif
-
 
 static int at91_pm_valid_state(suspend_state_t state)
 {
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index ce9a20699111..7eb40d24242f 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -25,21 +25,21 @@ static inline u32 sdram_selfrefresh_enable(void)
                                                                 : : "r" (0))
 
 #elif defined(CONFIG_ARCH_AT91CAP9)
-#include <mach/at91cap9_ddrsdr.h>
+#include <mach/at91sam9_ddrsdr.h>
 
 
 static inline u32 sdram_selfrefresh_enable(void)
 {
         u32 saved_lpr, lpr;
 
-        saved_lpr = at91_ramc_read(0, AT91_DDRSDRC_LPR);
+        saved_lpr = at91_ramc_read(0, AT91CAP9_DDRSDRC_LPR);
 
         lpr = saved_lpr & ~AT91_DDRSDRC_LPCB;
-        at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH);
+        at91_ramc_write(0, AT91CAP9_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH);
         return saved_lpr;
 }
 
-#define sdram_selfrefresh_disable(saved_lpr)    at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr)
+#define sdram_selfrefresh_disable(saved_lpr)    at91_ramc_write(0, AT91CAP9_DDRSDRC_LPR, saved_lpr)
 #define wait_for_interrupt_enable()             cpu_do_idle()
 
 #elif defined(CONFIG_ARCH_AT91SAM9G45)
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index f7922a436172..92dfb8461392 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -18,9 +18,8 @@
 
 #if defined(CONFIG_ARCH_AT91RM9200)
 #include <mach/at91rm9200_mc.h>
-#elif defined(CONFIG_ARCH_AT91CAP9)
-#include <mach/at91cap9_ddrsdr.h>
-#elif defined(CONFIG_ARCH_AT91SAM9G45)
+#elif defined(CONFIG_ARCH_AT91CAP9) \
+        || defined(CONFIG_ARCH_AT91SAM9G45)
 #include <mach/at91sam9_ddrsdr.h>
 #else
 #include <mach/at91sam9_sdramc.h>
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 8bdcc3cb6012..69d3fc4c46f3 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -29,9 +29,12 @@ EXPORT_SYMBOL(at91_soc_initdata);
 void __init at91rm9200_set_type(int type)
 {
         if (type == ARCH_REVISON_9200_PQFP)
-                at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
-        else
                 at91_soc_initdata.subtype = AT91_SOC_RM9200_PQFP;
+        else
+                at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
+
+        pr_info("AT91: filled in soc subtype: %s\n",
+                at91_get_soc_subtype(&at91_soc_initdata));
 }
 
 void __init at91_init_irq_default(void)
@@ -281,6 +284,15 @@ void __init at91_ioremap_shdwc(u32 base_addr)
         pm_power_off = at91sam9_poweroff;
 }
 
+void __iomem *at91_rstc_base;
+
+void __init at91_ioremap_rstc(u32 base_addr)
+{
+        at91_rstc_base = ioremap(base_addr, 16);
+        if (!at91_rstc_base)
+                panic("Impossible to ioremap at91_rstc_base\n");
+}
+
 void __init at91_initialize(unsigned long main_clock)
 {
         at91_boot_soc.ioremap_registers();
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index da70e7e39937..dd1ad55524c9 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -16,6 +16,7 @@
 #include <linux/io.h>
 
 #include <asm/cacheflush.h>
+#include <asm/smp_plat.h>
 
 #include <mach/regs-pmu.h>
 
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 683aec786b78..0f2035a1eb6e 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -23,6 +23,7 @@
 
 #include <asm/cacheflush.h>
 #include <asm/hardware/gic.h>
+#include <asm/smp_plat.h>
 #include <asm/smp_scu.h>
 
 #include <mach/hardware.h>
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index 7afbe1e55beb..8394d512a402 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -25,6 +25,7 @@
 #include <linux/smp.h>
 
 #include <asm/cacheflush.h>
+#include <asm/smp_plat.h>
 #include <asm/smp_scu.h>
 #include <asm/hardware/arm_timer.h>
 #include <asm/hardware/timer-sp.h>
@@ -72,9 +73,7 @@ static void __init highbank_map_io(void)
 
 void highbank_set_cpu_jump(int cpu, void *jump_addr)
 {
-#ifdef CONFIG_SMP
         cpu = cpu_logical_map(cpu);
-#endif
         writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu));
         __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
         outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 0e6de366c648..4defb97bbfc8 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -22,6 +22,18 @@ config ARCH_MX25
 config MACH_MX27
         bool
 
+config ARCH_MX5
+        bool
+
+config ARCH_MX50
+        bool
+
+config ARCH_MX51
+        bool
+
+config ARCH_MX53
+        bool
+
 config SOC_IMX1
         bool
         select ARCH_MX1
@@ -73,6 +85,31 @@ config SOC_IMX35
         select MXC_AVIC
         select SMP_ON_UP if SMP
 
+config SOC_IMX5
+        select CPU_V7
+        select MXC_TZIC
+        select ARCH_MXC_IOMUX_V3
+        select ARCH_MXC_AUDMUX_V2
+        select ARCH_HAS_CPUFREQ
+        select ARCH_MX5
+        bool
+
+config SOC_IMX50
+        bool
+        select SOC_IMX5
+        select ARCH_MX50
+
+config  SOC_IMX51
+        bool
+        select SOC_IMX5
+        select ARCH_MX5
+        select ARCH_MX51
+
+config  SOC_IMX53
+        bool
+        select SOC_IMX5
+        select ARCH_MX5
+        select ARCH_MX53
 
 if ARCH_IMX_V4_V5
 
@@ -592,6 +629,207 @@ config MACH_VPR200
           Include support for VPR200 platform. This includes specific
           configurations for the board and its peripherals.
 
+comment "i.MX5 platforms:"
+
+config MACH_MX50_RDP
+        bool "Support MX50 reference design platform"
+        depends on BROKEN
+        select SOC_IMX50
+        select IMX_HAVE_PLATFORM_IMX_I2C
+        select IMX_HAVE_PLATFORM_IMX_UART
+        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
+        select IMX_HAVE_PLATFORM_SPI_IMX
+        help
+          Include support for MX50 reference design platform (RDP) board. This
+          includes specific configurations for the board and its peripherals.
+
+comment "i.MX51 machines:"
+
+config MACH_IMX51_DT
+        bool "Support i.MX51 platforms from device tree"
+        select SOC_IMX51
+        select USE_OF
+        select MACH_MX51_BABBAGE
+        help
+          Include support for Freescale i.MX51 based platforms
+          using the device tree for discovery
+
+config MACH_MX51_BABBAGE
+        bool "Support MX51 BABBAGE platforms"
+        select SOC_IMX51
+        select IMX_HAVE_PLATFORM_FSL_USB2_UDC
+        select IMX_HAVE_PLATFORM_IMX2_WDT
+        select IMX_HAVE_PLATFORM_IMX_I2C
+        select IMX_HAVE_PLATFORM_IMX_UART
+        select IMX_HAVE_PLATFORM_MXC_EHCI
+        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
+        select IMX_HAVE_PLATFORM_SPI_IMX
+        help
+          Include support for MX51 Babbage platform, also known as MX51EVK in
+          u-boot. This includes specific configurations for the board and its
+          peripherals.
+
+config MACH_MX51_3DS
+        bool "Support MX51PDK (3DS)"
+        select SOC_IMX51
+        select IMX_HAVE_PLATFORM_IMX2_WDT
+        select IMX_HAVE_PLATFORM_IMX_KEYPAD
+        select IMX_HAVE_PLATFORM_IMX_UART
+        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
+        select IMX_HAVE_PLATFORM_SPI_IMX
+        select MXC_DEBUG_BOARD
+        help
+          Include support for MX51PDK (3DS) platform. This includes specific
+          configurations for the board and its peripherals.
+
+config MACH_EUKREA_CPUIMX51
+        bool "Support Eukrea CPUIMX51 module"
+        select SOC_IMX51
+        select IMX_HAVE_PLATFORM_FSL_USB2_UDC
+        select IMX_HAVE_PLATFORM_IMX_I2C
+        select IMX_HAVE_PLATFORM_IMX_UART
+        select IMX_HAVE_PLATFORM_MXC_EHCI
+        select IMX_HAVE_PLATFORM_MXC_NAND
+        select IMX_HAVE_PLATFORM_SPI_IMX
+        help
+          Include support for Eukrea CPUIMX51 platform. This includes
+          specific configurations for the module and its peripherals.
+
+choice
+        prompt "Baseboard"
+        depends on MACH_EUKREA_CPUIMX51
+        default MACH_EUKREA_MBIMX51_BASEBOARD
+
+config MACH_EUKREA_MBIMX51_BASEBOARD
+        prompt "Eukrea MBIMX51 development board"
+        bool
+        select IMX_HAVE_PLATFORM_IMX_KEYPAD
+        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
+        select LEDS_GPIO_REGISTER
+        help
+          This adds board specific devices that can be found on Eukrea's
+          MBIMX51 evaluation board.
+
+endchoice
+
+config MACH_EUKREA_CPUIMX51SD
+        bool "Support Eukrea CPUIMX51SD module"
+        select SOC_IMX51
+        select IMX_HAVE_PLATFORM_FSL_USB2_UDC
+        select IMX_HAVE_PLATFORM_IMX_I2C
+        select IMX_HAVE_PLATFORM_IMX_UART
+        select IMX_HAVE_PLATFORM_MXC_EHCI
+        select IMX_HAVE_PLATFORM_MXC_NAND
+        select IMX_HAVE_PLATFORM_SPI_IMX
+        help
+          Include support for Eukrea CPUIMX51SD platform. This includes
+          specific configurations for the module and its peripherals.
+
+choice
+        prompt "Baseboard"
+        depends on MACH_EUKREA_CPUIMX51SD
+        default MACH_EUKREA_MBIMXSD51_BASEBOARD
+
+config MACH_EUKREA_MBIMXSD51_BASEBOARD
+        prompt "Eukrea MBIMXSD development board"
+        bool
+        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
+        select LEDS_GPIO_REGISTER
+        help
+          This adds board specific devices that can be found on Eukrea's
+          MBIMXSD evaluation board.
+
+endchoice
+
+config MX51_EFIKA_COMMON
+        bool
+        select SOC_IMX51
+        select IMX_HAVE_PLATFORM_IMX_UART
+        select IMX_HAVE_PLATFORM_MXC_EHCI
+        select IMX_HAVE_PLATFORM_PATA_IMX
+        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
+        select IMX_HAVE_PLATFORM_SPI_IMX
+        select MXC_ULPI if USB_ULPI
+
+config MACH_MX51_EFIKAMX
+        bool "Support MX51 Genesi Efika MX nettop"
+        select LEDS_GPIO_REGISTER
+        select MX51_EFIKA_COMMON
+        help
+          Include support for Genesi Efika MX nettop. This includes specific
+          configurations for the board and its peripherals.
+
+config MACH_MX51_EFIKASB
+        bool "Support MX51 Genesi Efika Smartbook"
+        select LEDS_GPIO_REGISTER
+        select MX51_EFIKA_COMMON
+        help
+          Include support for Genesi Efika Smartbook. This includes specific
+          configurations for the board and its peripherals.
+
+comment "i.MX53 machines:"
+
+config MACH_IMX53_DT
+        bool "Support i.MX53 platforms from device tree"
+        select SOC_IMX53
+        select USE_OF
+        select MACH_MX53_ARD
+        select MACH_MX53_EVK
+        select MACH_MX53_LOCO
+        select MACH_MX53_SMD
+        help
+          Include support for Freescale i.MX53 based platforms
+          using the device tree for discovery
+
+config MACH_MX53_EVK
+        bool "Support MX53 EVK platforms"
+        select SOC_IMX53
+        select IMX_HAVE_PLATFORM_IMX2_WDT
+        select IMX_HAVE_PLATFORM_IMX_UART
+        select IMX_HAVE_PLATFORM_IMX_I2C
+        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
+        select IMX_HAVE_PLATFORM_SPI_IMX
+        select LEDS_GPIO_REGISTER
+        help
+          Include support for MX53 EVK platform. This includes specific
+          configurations for the board and its peripherals.
+
+config MACH_MX53_SMD
+        bool "Support MX53 SMD platforms"
+        select SOC_IMX53
+        select IMX_HAVE_PLATFORM_IMX2_WDT
+        select IMX_HAVE_PLATFORM_IMX_I2C
+        select IMX_HAVE_PLATFORM_IMX_UART
+        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
+        help
+          Include support for MX53 SMD platform. This includes specific
+          configurations for the board and its peripherals.
+
+config MACH_MX53_LOCO
+        bool "Support MX53 LOCO platforms"
+        select SOC_IMX53
+        select IMX_HAVE_PLATFORM_IMX2_WDT
+        select IMX_HAVE_PLATFORM_IMX_I2C
+        select IMX_HAVE_PLATFORM_IMX_UART
+        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
+        select IMX_HAVE_PLATFORM_GPIO_KEYS
+        select LEDS_GPIO_REGISTER
+        help
+          Include support for MX53 LOCO platform. This includes specific
+          configurations for the board and its peripherals.
+
+config MACH_MX53_ARD
+        bool "Support MX53 ARD platforms"
+        select SOC_IMX53
+        select IMX_HAVE_PLATFORM_IMX2_WDT
+        select IMX_HAVE_PLATFORM_IMX_I2C
+        select IMX_HAVE_PLATFORM_IMX_UART
+        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
+        select IMX_HAVE_PLATFORM_GPIO_KEYS
+        help
+          Include support for MX53 ARD platform. This includes specific
+          configurations for the board and its peripherals.
+
 comment "i.MX6 family:"
 
 config SOC_IMX6Q
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index f5920c24f7d7..55db9c488f2b 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -11,6 +11,8 @@ obj-$(CONFIG_SOC_IMX27) += clock-imx27.o mm-imx27.o ehci-imx27.o
 obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clock-imx31.o iomux-imx31.o ehci-imx31.o
 obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clock-imx35.o ehci-imx35.o
 
+obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clock-mx51-mx53.o ehci-imx5.o pm-imx5.o cpu_op-mx51.o
+
 # Support for CMOS sensor interface
 obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o
 
@@ -75,3 +77,22 @@ obj-$(CONFIG_SOC_IMX6Q) += clock-imx6q.o mach-imx6q.o
 ifeq ($(CONFIG_PM),y)
 obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o
 endif
+
+# i.MX5 based machines
+obj-$(CONFIG_MACH_MX51_BABBAGE) += mach-mx51_babbage.o
+obj-$(CONFIG_MACH_MX51_3DS) += mach-mx51_3ds.o
+obj-$(CONFIG_MACH_MX53_EVK) += mach-mx53_evk.o
+obj-$(CONFIG_MACH_MX53_SMD) += mach-mx53_smd.o
+obj-$(CONFIG_MACH_MX53_LOCO) += mach-mx53_loco.o
+obj-$(CONFIG_MACH_MX53_ARD) += mach-mx53_ard.o
+obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += mach-cpuimx51.o
+obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o
+obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += mach-cpuimx51sd.o
+obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd-baseboard.o
+obj-$(CONFIG_MX51_EFIKA_COMMON) += mx51_efika.o
+obj-$(CONFIG_MACH_MX51_EFIKAMX) += mach-mx51_efikamx.o
+obj-$(CONFIG_MACH_MX51_EFIKASB) += mach-mx51_efikasb.o
+obj-$(CONFIG_MACH_MX50_RDP) += mach-mx50_rdp.o
+
+obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
+obj-$(CONFIG_MACH_IMX53_DT) += imx53-dt.o
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
index 5f4d06af4912..6dfdbcc83afd 100644
--- a/arch/arm/mach-imx/Makefile.boot
+++ b/arch/arm/mach-imx/Makefile.boot
@@ -22,6 +22,18 @@ zreladdr-$(CONFIG_SOC_IMX35)	+= 0x80008000
 params_phys-$(CONFIG_SOC_IMX35) := 0x80000100
 initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000
 
+zreladdr-$(CONFIG_SOC_IMX50)    += 0x70008000
+params_phys-$(CONFIG_SOC_IMX50) := 0x70000100
+initrd_phys-$(CONFIG_SOC_IMX50) := 0x70800000
+
+zreladdr-$(CONFIG_SOC_IMX51)    += 0x90008000
+params_phys-$(CONFIG_SOC_IMX51) := 0x90000100
+initrd_phys-$(CONFIG_SOC_IMX51) := 0x90800000
+
+zreladdr-$(CONFIG_SOC_IMX53)    += 0x70008000
+params_phys-$(CONFIG_SOC_IMX53) := 0x70000100
+initrd_phys-$(CONFIG_SOC_IMX53) := 0x70800000
+
 zreladdr-$(CONFIG_SOC_IMX6Q)    += 0x10008000
 params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100
 initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c
index 9273c2a24b54..2d88f8b9a454 100644
--- a/arch/arm/mach-imx/clock-imx6q.c
+++ b/arch/arm/mach-imx/clock-imx6q.c
@@ -814,6 +814,16 @@ DEF_PFD(pll3_pfd_540m, PFD_480, PFD1, &pll3_usb_otg);
 DEF_PFD(pll3_pfd_508m, PFD_480, PFD2, &pll3_usb_otg);
 DEF_PFD(pll3_pfd_454m, PFD_480, PFD3, &pll3_usb_otg);
 
+static unsigned long twd_clk_get_rate(struct clk *clk)
+{
+        return clk_get_rate(clk->parent) / 2;
+}
+
+static struct clk twd_clk = {
+        .parent = &arm_clk,
+        .get_rate = twd_clk_get_rate,
+};
+
 static unsigned long pll2_200m_get_rate(struct clk *clk)
 {
         return clk_get_rate(clk->parent) / 2;
@@ -1894,6 +1904,7 @@ static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK("20ec000.sdma", NULL, sdma_clk),
         _REGISTER_CLOCK("20bc000.wdog", NULL, dummy_clk),
         _REGISTER_CLOCK("20c0000.wdog", NULL, dummy_clk),
+        _REGISTER_CLOCK("smp_twd", NULL, twd_clk),
         _REGISTER_CLOCK(NULL, "ckih", ckih_clk),
         _REGISTER_CLOCK(NULL, "ckil_clk", ckil_clk),
         _REGISTER_CLOCK(NULL, "aips_tz1_clk", aips_tz1_clk),
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-imx/clock-mx51-mx53.c
index 4cb276977190..08470504a088 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-imx/clock-mx51-mx53.c
@@ -23,7 +23,7 @@
 #include <mach/common.h>
 #include <mach/clock.h>
 
-#include "crm_regs.h"
+#include "crm-regs-imx5.h"
 
 /* External clock values passed-in by the board code */
 static unsigned long external_high_reference, external_low_reference;
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-imx/cpu-imx5.c
index 5e2e7a843860..5e2e7a843860 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-imx/cpu-imx5.c
diff --git a/arch/arm/mach-mx5/cpu_op-mx51.c b/arch/arm/mach-imx/cpu_op-mx51.c
index 9d34c3d4c024..9d34c3d4c024 100644
--- a/arch/arm/mach-mx5/cpu_op-mx51.c
+++ b/arch/arm/mach-imx/cpu_op-mx51.c
diff --git a/arch/arm/mach-mx5/cpu_op-mx51.h b/arch/arm/mach-imx/cpu_op-mx51.h
index 97477fecb469..97477fecb469 100644
--- a/arch/arm/mach-mx5/cpu_op-mx51.h
+++ b/arch/arm/mach-imx/cpu_op-mx51.h
diff --git a/arch/arm/mach-mx5/crm_regs.h b/arch/arm/mach-imx/crm-regs-imx5.h
index 5e11ba7daee2..5e11ba7daee2 100644
--- a/arch/arm/mach-mx5/crm_regs.h
+++ b/arch/arm/mach-imx/crm-regs-imx5.h
diff --git a/arch/arm/mach-mx5/devices-imx50.h b/arch/arm/mach-imx/devices-imx50.h
index 7216667eaafc..7216667eaafc 100644
--- a/arch/arm/mach-mx5/devices-imx50.h
+++ b/arch/arm/mach-imx/devices-imx50.h
diff --git a/arch/arm/mach-mx5/devices-imx51.h b/arch/arm/mach-imx/devices-imx51.h
index af488bc0e225..af488bc0e225 100644
--- a/arch/arm/mach-mx5/devices-imx51.h
+++ b/arch/arm/mach-imx/devices-imx51.h
diff --git a/arch/arm/mach-mx5/devices-imx53.h b/arch/arm/mach-imx/devices-imx53.h
index 6e1e5d1f8c3a..6e1e5d1f8c3a 100644
--- a/arch/arm/mach-mx5/devices-imx53.h
+++ b/arch/arm/mach-imx/devices-imx53.h
diff --git a/arch/arm/mach-mx5/efika.h b/arch/arm/mach-imx/efika.h
index 014aa985faae..014aa985faae 100644
--- a/arch/arm/mach-mx5/efika.h
+++ b/arch/arm/mach-imx/efika.h
diff --git a/arch/arm/mach-mx5/ehci.c b/arch/arm/mach-imx/ehci-imx5.c
index c17fa131728b..c17fa131728b 100644
--- a/arch/arm/mach-mx5/ehci.c
+++ b/arch/arm/mach-imx/ehci-imx5.c
diff --git a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx51-baseboard.c
index a6a3ab8f1b1c..a6a3ab8f1b1c 100644
--- a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimx51-baseboard.c
diff --git a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c
index d817fc80b986..d817fc80b986 100644
--- a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c
diff --git a/arch/arm/mach-mx5/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c
index e6bad17b908c..e6bad17b908c 100644
--- a/arch/arm/mach-mx5/imx51-dt.c
+++ b/arch/arm/mach-imx/imx51-dt.c
diff --git a/arch/arm/mach-mx5/imx53-dt.c b/arch/arm/mach-imx/imx53-dt.c
index 05ebb3e68679..05ebb3e68679 100644
--- a/arch/arm/mach-mx5/imx53-dt.c
+++ b/arch/arm/mach-imx/imx53-dt.c
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-imx/mach-cpuimx51.c
index 944025da8333..944025da8333 100644
--- a/arch/arm/mach-mx5/board-cpuimx51.c
+++ b/arch/arm/mach-imx/mach-cpuimx51.c
diff --git a/arch/arm/mach-mx5/board-cpuimx51sd.c b/arch/arm/mach-imx/mach-cpuimx51sd.c
index 9fbe923c8b08..9fbe923c8b08 100644
--- a/arch/arm/mach-mx5/board-cpuimx51sd.c
+++ b/arch/arm/mach-imx/mach-cpuimx51sd.c
diff --git a/arch/arm/mach-mx5/board-mx50_rdp.c b/arch/arm/mach-imx/mach-mx50_rdp.c
index 42b66e8d9615..42b66e8d9615 100644
--- a/arch/arm/mach-mx5/board-mx50_rdp.c
+++ b/arch/arm/mach-imx/mach-mx50_rdp.c
diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-imx/mach-mx51_3ds.c
index 83eab4176ca4..83eab4176ca4 100644
--- a/arch/arm/mach-mx5/board-mx51_3ds.c
+++ b/arch/arm/mach-imx/mach-mx51_3ds.c
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-imx/mach-mx51_babbage.c
index e4b822e9f719..e4b822e9f719 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-imx/mach-mx51_babbage.c
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-imx/mach-mx51_efikamx.c
index 3a5ed2dd885a..3a5ed2dd885a 100644
--- a/arch/arm/mach-mx5/board-mx51_efikamx.c
+++ b/arch/arm/mach-imx/mach-mx51_efikamx.c
diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-imx/mach-mx51_efikasb.c
index ea5f65b0381a..ea5f65b0381a 100644
--- a/arch/arm/mach-mx5/board-mx51_efikasb.c
+++ b/arch/arm/mach-imx/mach-mx51_efikasb.c
diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-imx/mach-mx53_ard.c
index 5f224f1c3eb6..753f4fc9ec04 100644
--- a/arch/arm/mach-mx5/board-mx53_ard.c
+++ b/arch/arm/mach-imx/mach-mx53_ard.c
@@ -32,7 +32,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
-#include "crm_regs.h"
 #include "devices-imx53.h"
 
 #define ARD_ETHERNET_INT_B      IMX_GPIO_NR(2, 31)
@@ -189,8 +188,10 @@ static int weim_cs_config(void)
                 return -ENOMEM;
 
         iomuxc_base = ioremap(MX53_IOMUXC_BASE_ADDR, SZ_4K);
-        if (!iomuxc_base)
+        if (!iomuxc_base) {
+                iounmap(weim_base);
                 return -ENOMEM;
+        }
 
         /* CS1 timings for LAN9220 */
         writel(0x20001, (weim_base + 0x18));
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-imx/mach-mx53_evk.c
index d6ce137896d6..5a72188b9cdb 100644
--- a/arch/arm/mach-mx5/board-mx53_evk.c
+++ b/arch/arm/mach-imx/mach-mx53_evk.c
@@ -37,7 +37,6 @@
 #define EVK_ECSPI1_CS1          IMX_GPIO_NR(3, 19)
 #define MX53EVK_LED             IMX_GPIO_NR(7, 7)
 
-#include "crm_regs.h"
 #include "devices-imx53.h"
 
 static iomux_v3_cfg_t mx53_evk_pads[] = {
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-imx/mach-mx53_loco.c
index fd8b524e1c58..37f67cac15a4 100644
--- a/arch/arm/mach-mx5/board-mx53_loco.c
+++ b/arch/arm/mach-imx/mach-mx53_loco.c
@@ -32,7 +32,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
-#include "crm_regs.h"
 #include "devices-imx53.h"
 
 #define MX53_LOCO_POWER                 IMX_GPIO_NR(1, 8)
diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-imx/mach-mx53_smd.c
index 22c53c9b18aa..8e972c5c3e13 100644
--- a/arch/arm/mach-mx5/board-mx53_smd.c
+++ b/arch/arm/mach-imx/mach-mx53_smd.c
@@ -31,7 +31,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
-#include "crm_regs.h"
 #include "devices-imx53.h"
 
 #define SMD_FEC_PHY_RST         IMX_GPIO_NR(7, 6)
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-imx/mm-imx5.c
index bc17dfea3817..bc17dfea3817 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-imx/mm-imx5.c
diff --git a/arch/arm/mach-mx5/mx51_efika.c b/arch/arm/mach-imx/mx51_efika.c
index ec6ca91b299b..ec6ca91b299b 100644
--- a/arch/arm/mach-mx5/mx51_efika.c
+++ b/arch/arm/mach-imx/mx51_efika.c
diff --git a/arch/arm/mach-mx5/system.c b/arch/arm/mach-imx/pm-imx5.c
index 5eebfaad1226..6dc093448057 100644
--- a/arch/arm/mach-mx5/system.c
+++ b/arch/arm/mach-imx/pm-imx5.c
@@ -1,8 +1,6 @@
 /*
- * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
- */
-
-/*
+ *  Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
  * The code contained herein is licensed under the GNU General Public
  * License. You may obtain a copy of the GNU General Public License
  * Version 2 or later at the following locations:
@@ -10,14 +8,22 @@
  * http://www.opensource.org/licenses/gpl-license.html
  * http://www.gnu.org/copyleft/gpl.html
  */
-#include <linux/platform_device.h>
+#include <linux/suspend.h>
+#include <linux/clk.h>
 #include <linux/io.h>
-#include <mach/hardware.h>
+#include <linux/err.h>
+#include <asm/cacheflush.h>
+#include <asm/tlbflush.h>
 #include <mach/common.h>
-#include "crm_regs.h"
+#include <mach/hardware.h>
+#include "crm-regs-imx5.h"
+
+static struct clk *gpc_dvfs_clk;
 
-/* set cpu low power mode before WFI instruction. This function is called
-  * mx5 because it can be used for mx50, mx51, and mx53.*/
+/*
+ * set cpu low power mode before WFI instruction. This function is called
+ * mx5 because it can be used for mx50, mx51, and mx53.
+ */
 void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode)
 {
         u32 plat_lpc, arm_srpgcr, ccm_clpcr;
@@ -80,3 +86,68 @@ void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode)
                 __raw_writel(empgc1, MXC_SRPG_EMPGC1_SRPGCR);
         }
 }
+
+static int mx5_suspend_prepare(void)
+{
+        return clk_enable(gpc_dvfs_clk);
+}
+
+static int mx5_suspend_enter(suspend_state_t state)
+{
+        switch (state) {
+        case PM_SUSPEND_MEM:
+                mx5_cpu_lp_set(STOP_POWER_OFF);
+                break;
+        case PM_SUSPEND_STANDBY:
+                mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        if (state == PM_SUSPEND_MEM) {
+                local_flush_tlb_all();
+                flush_cache_all();
+
+                /*clear the EMPGC0/1 bits */
+                __raw_writel(0, MXC_SRPG_EMPGC0_SRPGCR);
+                __raw_writel(0, MXC_SRPG_EMPGC1_SRPGCR);
+        }
+        cpu_do_idle();
+        return 0;
+}
+
+static void mx5_suspend_finish(void)
+{
+        clk_disable(gpc_dvfs_clk);
+}
+
+static int mx5_pm_valid(suspend_state_t state)
+{
+        return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX);
+}
+
+static const struct platform_suspend_ops mx5_suspend_ops = {
+        .valid = mx5_pm_valid,
+        .prepare = mx5_suspend_prepare,
+        .enter = mx5_suspend_enter,
+        .finish = mx5_suspend_finish,
+};
+
+static int __init mx5_pm_init(void)
+{
+        if (!cpu_is_mx51() && !cpu_is_mx53())
+                return 0;
+
+        if (gpc_dvfs_clk == NULL)
+                gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");
+
+        if (!IS_ERR(gpc_dvfs_clk)) {
+                if (cpu_is_mx51())
+                        suspend_set_ops(&mx5_suspend_ops);
+        } else
+                return -EPERM;
+
+        return 0;
+}
+device_initcall(mx5_pm_init);
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c
index 29bd1243781e..e15f1555c59b 100644
--- a/arch/arm/mach-imx/src.c
+++ b/arch/arm/mach-imx/src.c
@@ -15,6 +15,7 @@
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/smp.h>
+#include <asm/smp_plat.h>
 
 #define SRC_SCR                         0x000
 #define SRC_GPR1                        0x020
@@ -24,10 +25,6 @@
 
 static void __iomem *src_base;
 
-#ifndef CONFIG_SMP
-#define cpu_logical_map(cpu)            0
-#endif
-
 void imx_enable_cpu(int cpu, bool enable)
 {
         u32 mask, val;
diff --git a/arch/arm/mach-msm/hotplug.c b/arch/arm/mach-msm/hotplug.c
index 41c252de0215..a446fc14221f 100644
--- a/arch/arm/mach-msm/hotplug.c
+++ b/arch/arm/mach-msm/hotplug.c
@@ -11,6 +11,7 @@
 #include <linux/smp.h>
 
 #include <asm/cacheflush.h>
+#include <asm/smp_plat.h>
 
 extern volatile int pen_release;
 
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 0b3e357c4c8c..db0117ec55f4 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -20,6 +20,7 @@
 #include <asm/cacheflush.h>
 #include <asm/cputype.h>
 #include <asm/mach-types.h>
+#include <asm/smp_plat.h>
 
 #include <mach/msm_iomap.h>
 
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
deleted file mode 100644
index af0c212e3c7b..000000000000
--- a/arch/arm/mach-mx5/Kconfig
+++ /dev/null
@@ -1,244 +0,0 @@
-if ARCH_MX5
-
-# ARCH_MX5/50/53 are left to mark places where prevent multi-soc in single
-# image. So for most time, SOC_IMX50/51/53 should be used.
-
-config ARCH_MX51
-        bool
-
-config ARCH_MX50
-        bool
-
-config ARCH_MX53
-        bool
-
-config SOC_IMX50
-        bool
-        select CPU_V7
-        select ARM_L1_CACHE_SHIFT_6
-        select MXC_TZIC
-        select ARCH_MXC_IOMUX_V3
-        select ARCH_MXC_AUDMUX_V2
-        select ARCH_HAS_CPUFREQ
-        select ARCH_MX50
-
-config  SOC_IMX51
-        bool
-        select CPU_V7
-        select ARM_L1_CACHE_SHIFT_6
-        select MXC_TZIC
-        select ARCH_MXC_IOMUX_V3
-        select ARCH_MXC_AUDMUX_V2
-        select ARCH_HAS_CPUFREQ
-        select ARCH_MX51
-
-config  SOC_IMX53
-        bool
-        select CPU_V7
-        select ARM_L1_CACHE_SHIFT_6
-        select MXC_TZIC
-        select ARCH_MXC_IOMUX_V3
-        select ARCH_MX53
-
-#comment "i.MX50 machines:"
-
-config MACH_MX50_RDP
-        bool "Support MX50 reference design platform"
-        depends on BROKEN
-        select SOC_IMX50
-        select IMX_HAVE_PLATFORM_IMX_I2C
-        select IMX_HAVE_PLATFORM_IMX_UART
-        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
-        select IMX_HAVE_PLATFORM_SPI_IMX
-        help
-          Include support for MX50 reference design platform (RDP) board. This
-          includes specific configurations for the board and its peripherals.
-
-comment "i.MX51 machines:"
-
-config MACH_IMX51_DT
-        bool "Support i.MX51 platforms from device tree"
-        select SOC_IMX51
-        select USE_OF
-        select MACH_MX51_BABBAGE
-        help
-          Include support for Freescale i.MX51 based platforms
-          using the device tree for discovery
-
-config MACH_MX51_BABBAGE
-        bool "Support MX51 BABBAGE platforms"
-        select SOC_IMX51
-        select IMX_HAVE_PLATFORM_FSL_USB2_UDC
-        select IMX_HAVE_PLATFORM_IMX2_WDT
-        select IMX_HAVE_PLATFORM_IMX_I2C
-        select IMX_HAVE_PLATFORM_IMX_UART
-        select IMX_HAVE_PLATFORM_MXC_EHCI
-        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
-        select IMX_HAVE_PLATFORM_SPI_IMX
-        help
-          Include support for MX51 Babbage platform, also known as MX51EVK in
-          u-boot. This includes specific configurations for the board and its
-          peripherals.
-
-config MACH_MX51_3DS
-        bool "Support MX51PDK (3DS)"
-        select SOC_IMX51
-        select IMX_HAVE_PLATFORM_IMX2_WDT
-        select IMX_HAVE_PLATFORM_IMX_KEYPAD
-        select IMX_HAVE_PLATFORM_IMX_UART
-        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
-        select IMX_HAVE_PLATFORM_SPI_IMX
-        select MXC_DEBUG_BOARD
-        help
-          Include support for MX51PDK (3DS) platform. This includes specific
-          configurations for the board and its peripherals.
-
-config MACH_EUKREA_CPUIMX51
-        bool "Support Eukrea CPUIMX51 module"
-        select SOC_IMX51
-        select IMX_HAVE_PLATFORM_FSL_USB2_UDC
-        select IMX_HAVE_PLATFORM_IMX_I2C
-        select IMX_HAVE_PLATFORM_IMX_UART
-        select IMX_HAVE_PLATFORM_MXC_EHCI
-        select IMX_HAVE_PLATFORM_MXC_NAND
-        select IMX_HAVE_PLATFORM_SPI_IMX
-        help
-          Include support for Eukrea CPUIMX51 platform. This includes
-          specific configurations for the module and its peripherals.
-
-choice
-        prompt "Baseboard"
-        depends on MACH_EUKREA_CPUIMX51
-        default MACH_EUKREA_MBIMX51_BASEBOARD
-
-config MACH_EUKREA_MBIMX51_BASEBOARD
-        prompt "Eukrea MBIMX51 development board"
-        bool
-        select IMX_HAVE_PLATFORM_IMX_KEYPAD
-        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
-        select LEDS_GPIO_REGISTER
-        help
-          This adds board specific devices that can be found on Eukrea's
-          MBIMX51 evaluation board.
-
-endchoice
-
-config MACH_EUKREA_CPUIMX51SD
-        bool "Support Eukrea CPUIMX51SD module"
-        select SOC_IMX51
-        select IMX_HAVE_PLATFORM_FSL_USB2_UDC
-        select IMX_HAVE_PLATFORM_IMX_I2C
-        select IMX_HAVE_PLATFORM_IMX_UART
-        select IMX_HAVE_PLATFORM_MXC_EHCI
-        select IMX_HAVE_PLATFORM_MXC_NAND
-        select IMX_HAVE_PLATFORM_SPI_IMX
-        help
-          Include support for Eukrea CPUIMX51SD platform. This includes
-          specific configurations for the module and its peripherals.
-
-choice
-        prompt "Baseboard"
-        depends on MACH_EUKREA_CPUIMX51SD
-        default MACH_EUKREA_MBIMXSD51_BASEBOARD
-
-config MACH_EUKREA_MBIMXSD51_BASEBOARD
-        prompt "Eukrea MBIMXSD development board"
-        bool
-        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
-        select LEDS_GPIO_REGISTER
-        help
-          This adds board specific devices that can be found on Eukrea's
-          MBIMXSD evaluation board.
-
-endchoice
-
-config MX51_EFIKA_COMMON
-        bool
-        select SOC_IMX51
-        select IMX_HAVE_PLATFORM_IMX_UART
-        select IMX_HAVE_PLATFORM_MXC_EHCI
-        select IMX_HAVE_PLATFORM_PATA_IMX
-        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
-        select IMX_HAVE_PLATFORM_SPI_IMX
-        select MXC_ULPI if USB_ULPI
-
-config MACH_MX51_EFIKAMX
-        bool "Support MX51 Genesi Efika MX nettop"
-        select LEDS_GPIO_REGISTER
-        select MX51_EFIKA_COMMON
-        help
-          Include support for Genesi Efika MX nettop. This includes specific
-          configurations for the board and its peripherals.
-
-config MACH_MX51_EFIKASB
-        bool "Support MX51 Genesi Efika Smartbook"
-        select LEDS_GPIO_REGISTER
-        select MX51_EFIKA_COMMON
-        help
-          Include support for Genesi Efika Smartbook. This includes specific
-          configurations for the board and its peripherals.
-
-comment "i.MX53 machines:"
-
-config MACH_IMX53_DT
-        bool "Support i.MX53 platforms from device tree"
-        select SOC_IMX53
-        select USE_OF
-        select MACH_MX53_ARD
-        select MACH_MX53_EVK
-        select MACH_MX53_LOCO
-        select MACH_MX53_SMD
-        help
-          Include support for Freescale i.MX53 based platforms
-          using the device tree for discovery
-
-config MACH_MX53_EVK
-        bool "Support MX53 EVK platforms"
-        select SOC_IMX53
-        select IMX_HAVE_PLATFORM_IMX2_WDT
-        select IMX_HAVE_PLATFORM_IMX_UART
-        select IMX_HAVE_PLATFORM_IMX_I2C
-        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
-        select IMX_HAVE_PLATFORM_SPI_IMX
-        select LEDS_GPIO_REGISTER
-        help
-          Include support for MX53 EVK platform. This includes specific
-          configurations for the board and its peripherals.
-
-config MACH_MX53_SMD
-        bool "Support MX53 SMD platforms"
-        select SOC_IMX53
-        select IMX_HAVE_PLATFORM_IMX2_WDT
-        select IMX_HAVE_PLATFORM_IMX_I2C
-        select IMX_HAVE_PLATFORM_IMX_UART
-        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
-        help
-          Include support for MX53 SMD platform. This includes specific
-          configurations for the board and its peripherals.
-
-config MACH_MX53_LOCO
-        bool "Support MX53 LOCO platforms"
-        select SOC_IMX53
-        select IMX_HAVE_PLATFORM_IMX2_WDT
-        select IMX_HAVE_PLATFORM_IMX_I2C
-        select IMX_HAVE_PLATFORM_IMX_UART
-        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
-        select IMX_HAVE_PLATFORM_GPIO_KEYS
-        select LEDS_GPIO_REGISTER
-        help
-          Include support for MX53 LOCO platform. This includes specific
-          configurations for the board and its peripherals.
-
-config MACH_MX53_ARD
-        bool "Support MX53 ARD platforms"
-        select SOC_IMX53
-        select IMX_HAVE_PLATFORM_IMX2_WDT
-        select IMX_HAVE_PLATFORM_IMX_I2C
-        select IMX_HAVE_PLATFORM_IMX_UART
-        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
-        select IMX_HAVE_PLATFORM_GPIO_KEYS
-        help
-          Include support for MX53 ARD platform. This includes specific
-          configurations for the board and its peripherals.
-
-endif
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
deleted file mode 100644
index 0fc60807fa2b..000000000000
--- a/arch/arm/mach-mx5/Makefile
+++ /dev/null
@@ -1,26 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-
-# Object file lists.
-obj-y   := cpu.o mm.o clock-mx51-mx53.o ehci.o system.o
-
-obj-$(CONFIG_PM) += pm-imx5.o
-obj-$(CONFIG_CPU_FREQ_IMX)    += cpu_op-mx51.o
-obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o
-obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o
-obj-$(CONFIG_MACH_MX53_EVK) += board-mx53_evk.o
-obj-$(CONFIG_MACH_MX53_SMD) += board-mx53_smd.o
-obj-$(CONFIG_MACH_MX53_LOCO) += board-mx53_loco.o
-obj-$(CONFIG_MACH_MX53_ARD) += board-mx53_ard.o
-obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += board-cpuimx51.o
-obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o
-obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += board-cpuimx51sd.o
-obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd-baseboard.o
-obj-$(CONFIG_MX51_EFIKA_COMMON) += mx51_efika.o
-obj-$(CONFIG_MACH_MX51_EFIKAMX) += board-mx51_efikamx.o
-obj-$(CONFIG_MACH_MX51_EFIKASB) += board-mx51_efikasb.o
-obj-$(CONFIG_MACH_MX50_RDP) += board-mx50_rdp.o
-
-obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
-obj-$(CONFIG_MACH_IMX53_DT) += imx53-dt.o
diff --git a/arch/arm/mach-mx5/Makefile.boot b/arch/arm/mach-mx5/Makefile.boot
deleted file mode 100644
index ca207ca305ec..000000000000
--- a/arch/arm/mach-mx5/Makefile.boot
+++ /dev/null
@@ -1,9 +0,0 @@
-   zreladdr-$(CONFIG_ARCH_MX50) += 0x70008000
-params_phys-$(CONFIG_ARCH_MX50) := 0x70000100
-initrd_phys-$(CONFIG_ARCH_MX50) := 0x70800000
-   zreladdr-$(CONFIG_ARCH_MX51) += 0x90008000
-params_phys-$(CONFIG_ARCH_MX51) := 0x90000100
-initrd_phys-$(CONFIG_ARCH_MX51) := 0x90800000
-   zreladdr-$(CONFIG_ARCH_MX53) += 0x70008000
-params_phys-$(CONFIG_ARCH_MX53) := 0x70000100
-initrd_phys-$(CONFIG_ARCH_MX53) := 0x70800000
diff --git a/arch/arm/mach-mx5/pm-imx5.c b/arch/arm/mach-mx5/pm-imx5.c
deleted file mode 100644
index 98052fc852c7..000000000000
--- a/arch/arm/mach-mx5/pm-imx5.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- *  Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-#include <linux/suspend.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/err.h>
-#include <asm/cacheflush.h>
-#include <asm/tlbflush.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include "crm_regs.h"
-
-static struct clk *gpc_dvfs_clk;
-
-static int mx5_suspend_prepare(void)
-{
-        return clk_enable(gpc_dvfs_clk);
-}
-
-static int mx5_suspend_enter(suspend_state_t state)
-{
-        switch (state) {
-        case PM_SUSPEND_MEM:
-                mx5_cpu_lp_set(STOP_POWER_OFF);
-                break;
-        case PM_SUSPEND_STANDBY:
-                mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
-                break;
-        default:
-                return -EINVAL;
-        }
-
-        if (state == PM_SUSPEND_MEM) {
-                local_flush_tlb_all();
-                flush_cache_all();
-
-                /*clear the EMPGC0/1 bits */
-                __raw_writel(0, MXC_SRPG_EMPGC0_SRPGCR);
-                __raw_writel(0, MXC_SRPG_EMPGC1_SRPGCR);
-        }
-        cpu_do_idle();
-        return 0;
-}
-
-static void mx5_suspend_finish(void)
-{
-        clk_disable(gpc_dvfs_clk);
-}
-
-static int mx5_pm_valid(suspend_state_t state)
-{
-        return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX);
-}
-
-static const struct platform_suspend_ops mx5_suspend_ops = {
-        .valid = mx5_pm_valid,
-        .prepare = mx5_suspend_prepare,
-        .enter = mx5_suspend_enter,
-        .finish = mx5_suspend_finish,
-};
-
-static int __init mx5_pm_init(void)
-{
-        if (gpc_dvfs_clk == NULL)
-                gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");
-
-        if (!IS_ERR(gpc_dvfs_clk)) {
-                if (cpu_is_mx51())
-                        suspend_set_ops(&mx5_suspend_ops);
-        } else
-                return -EPERM;
-
-        return 0;
-}
-device_initcall(mx5_pm_init);
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index a8ba7b96dcd1..41e6612ecbaf 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -33,7 +33,6 @@ config ARCH_OMAP3
         default y
         select CPU_V7
         select USB_ARCH_HAS_EHCI
-        select ARM_L1_CACHE_SHIFT_6 if !ARCH_OMAP4
         select ARCH_HAS_OPP
         select PM_OPP if PM
         select ARM_CPU_SUSPEND if PM
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index 18fd177073f4..5bc13121eac5 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -415,29 +415,9 @@ static struct resource pxa_rtc_resources[] = {
         },
 };
 
-static struct resource sa1100_rtc_resources[] = {
-        [0] = {
-                .start  = 0x40900000,
-                .end    = 0x409000ff,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = IRQ_RTC1Hz,
-                .end    = IRQ_RTC1Hz,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                .start  = IRQ_RTCAlrm,
-                .end    = IRQ_RTCAlrm,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
 struct platform_device sa1100_device_rtc = {
         .name           = "sa1100-rtc",
         .id             = -1,
-        .num_resources  = ARRAY_SIZE(sa1100_rtc_resources),
-        .resource       = sa1100_rtc_resources,
 };
 
 struct platform_device pxa_device_rtc = {
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index adf058fa97ee..91e4f6c03766 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -209,8 +209,6 @@ static struct clk_lookup pxa25x_clkregs[] = {
         INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
         INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
         INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
-        INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
-        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
 };
 
 static struct clk_lookup pxa25x_hwuart_clkreg =
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 180bd8675d4b..aed6cbcf3866 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -230,8 +230,6 @@ static struct clk_lookup pxa27x_clkregs[] = {
         INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
         INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
         INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
-        INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
-        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
 };
 
 #ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c
index 0388eda7878a..40bb16501d86 100644
--- a/arch/arm/mach-pxa/pxa300.c
+++ b/arch/arm/mach-pxa/pxa300.c
@@ -89,7 +89,6 @@ static DEFINE_PXA3_CKEN(gcu, PXA300_GCU, 0, 0);
 static struct clk_lookup common_clkregs[] = {
         INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL),
         INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
-        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
 };
 
 static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0);
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c
index d487e1ff4c9a..8d614ecd8e99 100644
--- a/arch/arm/mach-pxa/pxa320.c
+++ b/arch/arm/mach-pxa/pxa320.c
@@ -83,7 +83,6 @@ static DEFINE_PXA3_CKEN(gcu, PXA320_GCU, 0, 0);
 static struct clk_lookup pxa320_clkregs[] = {
         INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL),
         INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
-        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
 };
 
 static int __init pxa320_init(void)
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index f107c71c7589..4f402afa6609 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -67,7 +67,6 @@ static struct clk_lookup pxa3xx_clkregs[] = {
         INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"),
         /* Power I2C clock is always on */
         INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
-        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
         INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL),
         INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"),
         INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"),
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index fccc644702e6..d082a583df78 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -217,7 +217,6 @@ static struct clk_lookup pxa95x_clkregs[] = {
         INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"),
         /* Power I2C clock is always on */
         INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
-        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
         INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL),
         INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL),
         INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL),
diff --git a/arch/arm/mach-realview/hotplug.c b/arch/arm/mach-realview/hotplug.c
index ac1aed2a8da4..eb55f05bef3a 100644
--- a/arch/arm/mach-realview/hotplug.c
+++ b/arch/arm/mach-realview/hotplug.c
@@ -13,6 +13,7 @@
 #include <linux/smp.h>
 
 #include <asm/cacheflush.h>
+#include <asm/smp_plat.h>
 
 extern volatile int pen_release;
 
diff --git a/arch/arm/mach-realview/include/mach/board-eb.h b/arch/arm/mach-realview/include/mach/board-eb.h
index 794a8d91a6a6..124bce6b4d7b 100644
--- a/arch/arm/mach-realview/include/mach/board-eb.h
+++ b/arch/arm/mach-realview/include/mach/board-eb.h
@@ -47,21 +47,23 @@
 #define REALVIEW_EB_USB_BASE            0x4F000000      /* USB */
 
 #ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
-#define REALVIEW_EB11MP_SCU_BASE        0x10100000      /* SCU registers */
-#define REALVIEW_EB11MP_GIC_CPU_BASE    0x10100100      /* Generic interrupt controller CPU interface */
-#define REALVIEW_EB11MP_TWD_BASE        0x10100600
-#define REALVIEW_EB11MP_GIC_DIST_BASE   0x10101000      /* Generic interrupt controller distributor */
+#define REALVIEW_EB11MP_PRIV_MEM_BASE   0x1F000000
 #define REALVIEW_EB11MP_L220_BASE       0x10102000      /* L220 registers */
 #define REALVIEW_EB11MP_SYS_PLD_CTRL1   0xD8            /* Register offset for MPCore sysctl */
 #else
-#define REALVIEW_EB11MP_SCU_BASE        0x1F000000      /* SCU registers */
-#define REALVIEW_EB11MP_GIC_CPU_BASE    0x1F000100      /* Generic interrupt controller CPU interface */
-#define REALVIEW_EB11MP_TWD_BASE        0x1F000600
-#define REALVIEW_EB11MP_GIC_DIST_BASE   0x1F001000      /* Generic interrupt controller distributor */
+#define REALVIEW_EB11MP_PRIV_MEM_BASE   0x1F000000
 #define REALVIEW_EB11MP_L220_BASE       0x1F002000      /* L220 registers */
 #define REALVIEW_EB11MP_SYS_PLD_CTRL1   0x74            /* Register offset for MPCore sysctl */
 #endif
 
+#define REALVIEW_EB11MP_PRIV_MEM_SIZE   SZ_8K
+#define REALVIEW_EB11MP_PRIV_MEM_OFF(x) (REALVIEW_EB11MP_PRIV_MEM_BASE + (x))
+
+#define REALVIEW_EB11MP_SCU_BASE        REALVIEW_EB11MP_PRIV_MEM_OFF(0)         /* SCU registers */
+#define REALVIEW_EB11MP_GIC_CPU_BASE    REALVIEW_EB11MP_PRIV_MEM_OFF(0x0100)    /* Generic interrupt controller CPU interface */
+#define REALVIEW_EB11MP_TWD_BASE        REALVIEW_EB11MP_PRIV_MEM_OFF(0x0600)
+#define REALVIEW_EB11MP_GIC_DIST_BASE   REALVIEW_EB11MP_PRIV_MEM_OFF(0x1000)    /* Generic interrupt controller distributor */
+
 /*
  * Core tile identification (REALVIEW_SYS_PROCID)
  */
diff --git a/arch/arm/mach-realview/include/mach/board-pb11mp.h b/arch/arm/mach-realview/include/mach/board-pb11mp.h
index 7abf918b77e9..aa2d4e02ea2c 100644
--- a/arch/arm/mach-realview/include/mach/board-pb11mp.h
+++ b/arch/arm/mach-realview/include/mach/board-pb11mp.h
@@ -75,6 +75,8 @@
 /*
  * Testchip peripheral and fpga gic regions
  */
+#define REALVIEW_TC11MP_PRIV_MEM_BASE           0x1F000000
+#define REALVIEW_TC11MP_PRIV_MEM_SIZE           SZ_8K
 #define REALVIEW_TC11MP_SCU_BASE                0x1F000000      /* IRQ, Test chip */
 #define REALVIEW_TC11MP_GIC_CPU_BASE            0x1F000100      /* Test chip interrupt controller CPU interface */
 #define REALVIEW_TC11MP_TWD_BASE                0x1F000600
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index e62962117763..9578145f2df0 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -91,14 +91,9 @@ static struct map_desc realview_eb_io_desc[] __initdata = {
 
 static struct map_desc realview_eb11mp_io_desc[] __initdata = {
         {
-                .virtual        = IO_ADDRESS(REALVIEW_EB11MP_SCU_BASE),
-                .pfn            = __phys_to_pfn(REALVIEW_EB11MP_SCU_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE),
-                .pfn            = __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE),
-                .length         = SZ_4K,
+                .virtual        = IO_ADDRESS(REALVIEW_EB11MP_PRIV_MEM_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_EB11MP_PRIV_MEM_BASE),
+                .length         = REALVIEW_EB11MP_PRIV_MEM_SIZE,
                 .type           = MT_DEVICE,
         }, {
                 .virtual        = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 127a3fd42ab1..2147335f66f5 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -64,15 +64,10 @@ static struct map_desc realview_pb11mp_io_desc[] __initdata = {
                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_GIC_DIST_BASE),
                 .length         = SZ_4K,
                 .type           = MT_DEVICE,
-        }, {
-                .virtual        = IO_ADDRESS(REALVIEW_TC11MP_GIC_CPU_BASE),
-                .pfn            = __phys_to_pfn(REALVIEW_TC11MP_GIC_CPU_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = IO_ADDRESS(REALVIEW_TC11MP_GIC_DIST_BASE),
-                .pfn            = __phys_to_pfn(REALVIEW_TC11MP_GIC_DIST_BASE),
-                .length         = SZ_4K,
+        }, {    /* Maps the SCU, GIC CPU interface, TWD, GIC DIST */
+                .virtual        = IO_ADDRESS(REALVIEW_TC11MP_PRIV_MEM_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_TC11MP_PRIV_MEM_BASE),
+                .length         = REALVIEW_TC11MP_PRIV_MEM_SIZE,
                 .type           = MT_DEVICE,
         }, {
                 .virtual        = IO_ADDRESS(REALVIEW_SCTL_BASE),
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
index ebafe8aa8956..0c4b76ab4d8e 100644
--- a/arch/arm/mach-sa1100/assabet.c
+++ b/arch/arm/mach-sa1100/assabet.c
@@ -202,7 +202,6 @@ static struct irda_platform_data assabet_irda_data = {
 static struct mcp_plat_data assabet_mcp_data = {
         .mccr0          = MCCR0_ADM,
         .sclk_rate      = 11981000,
-        .codec          = "ucb1x00",
 };
 
 static void __init assabet_init(void)
@@ -253,17 +252,6 @@ static void __init assabet_init(void)
         sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
                             ARRAY_SIZE(assabet_flash_resources));
         sa11x0_register_irda(&assabet_irda_data);
-
-        /*
-         * Setup the PPC unit correctly.
-         */
-        PPDR &= ~PPC_RXD4;
-        PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
-        PSDR |= PPC_RXD4;
-        PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
-        PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
-
-        ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
         sa11x0_register_mcp(&assabet_mcp_data);
 }
 
diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c
index d12d0f48b1dc..11bb6d0b9be3 100644
--- a/arch/arm/mach-sa1100/cerf.c
+++ b/arch/arm/mach-sa1100/cerf.c
@@ -124,23 +124,12 @@ static void __init cerf_map_io(void)
 static struct mcp_plat_data cerf_mcp_data = {
         .mccr0          = MCCR0_ADM,
         .sclk_rate      = 11981000,
-        .codec          = "ucb1x00",
 };
 
 static void __init cerf_init(void)
 {
         platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices));
         sa11x0_register_mtd(&cerf_flash_data, &cerf_flash_resource, 1);
-
-        /*
-         * Setup the PPC unit correctly.
-         */
-        PPDR &= ~PPC_RXD4;
-        PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
-        PSDR |= PPC_RXD4;
-        PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
-        PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
-
         sa11x0_register_mcp(&cerf_mcp_data);
 }
 
diff --git a/arch/arm/mach-sa1100/clock.c b/arch/arm/mach-sa1100/clock.c
index d6df9f6c9f7e..dab3c6347a8f 100644
--- a/arch/arm/mach-sa1100/clock.c
+++ b/arch/arm/mach-sa1100/clock.c
@@ -11,39 +11,17 @@
 #include <linux/clk.h>
 #include <linux/spinlock.h>
 #include <linux/mutex.h>
-#include <linux/io.h>
-#include <linux/clkdev.h>
 
 #include <mach/hardware.h>
 
-struct clkops {
-        void                    (*enable)(struct clk *);
-        void                    (*disable)(struct clk *);
-        unsigned long           (*getrate)(struct clk *);
-};
-
+/*
+ * Very simple clock implementation - we only have one clock to deal with.
+ */
 struct clk {
-        const struct clkops     *ops;
-        unsigned long           rate;
         unsigned int            enabled;
 };
 
-#define INIT_CLKREG(_clk, _devname, _conname)           \
-        {                                               \
-                .clk            = _clk,                 \
-                .dev_id         = _devname,             \
-                .con_id         = _conname,             \
-        }
-
-#define DEFINE_CLK(_name, _ops, _rate)                  \
-struct clk clk_##_name = {                              \
-                .ops    = _ops,                         \
-                .rate   = _rate,                        \
-        }
-
-static DEFINE_SPINLOCK(clocks_lock);
-
-static void clk_gpio27_enable(struct clk *clk)
+static void clk_gpio27_enable(void)
 {
         /*
          * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
@@ -54,22 +32,38 @@ static void clk_gpio27_enable(struct clk *clk)
         TUCR = TUCR_3_6864MHz;
 }
 
-static void clk_gpio27_disable(struct clk *clk)
+static void clk_gpio27_disable(void)
 {
         TUCR = 0;
         GPDR &= ~GPIO_32_768kHz;
         GAFR &= ~GPIO_32_768kHz;
 }
 
+static struct clk clk_gpio27;
+
+static DEFINE_SPINLOCK(clocks_lock);
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+        const char *devname = dev_name(dev);
+
+        return strcmp(devname, "sa1111.0") ? ERR_PTR(-ENOENT) : &clk_gpio27;
+}
+EXPORT_SYMBOL(clk_get);
+
+void clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_put);
+
 int clk_enable(struct clk *clk)
 {
         unsigned long flags;
 
         spin_lock_irqsave(&clocks_lock, flags);
         if (clk->enabled++ == 0)
-                clk->ops->enable(clk);
+                clk_gpio27_enable();
         spin_unlock_irqrestore(&clocks_lock, flags);
-
         return 0;
 }
 EXPORT_SYMBOL(clk_enable);
@@ -82,48 +76,13 @@ void clk_disable(struct clk *clk)
 
         spin_lock_irqsave(&clocks_lock, flags);
         if (--clk->enabled == 0)
-                clk->ops->disable(clk);
+                clk_gpio27_disable();
         spin_unlock_irqrestore(&clocks_lock, flags);
 }
 EXPORT_SYMBOL(clk_disable);
 
 unsigned long clk_get_rate(struct clk *clk)
 {
-        unsigned long rate;
-
-        rate = clk->rate;
-        if (clk->ops->getrate)
-                rate = clk->ops->getrate(clk);
-
-        return rate;
+        return 3686400;
 }
 EXPORT_SYMBOL(clk_get_rate);
-
-const struct clkops clk_gpio27_ops = {
-        .enable         = clk_gpio27_enable,
-        .disable        = clk_gpio27_disable,
-};
-
-static void clk_dummy_enable(struct clk *clk) { }
-static void clk_dummy_disable(struct clk *clk) { }
-
-const struct clkops clk_dummy_ops = {
-        .enable         = clk_dummy_enable,
-        .disable        = clk_dummy_disable,
-};
-
-static DEFINE_CLK(gpio27, &clk_gpio27_ops, 3686400);
-static DEFINE_CLK(dummy, &clk_dummy_ops, 0);
-
-static struct clk_lookup sa11xx_clkregs[] = {
-        INIT_CLKREG(&clk_gpio27, "sa1111.0", NULL),
-        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
-};
-
-static int __init sa11xx_clk_init(void)
-{
-        clkdev_add_table(sa11xx_clkregs, ARRAY_SIZE(sa11xx_clkregs));
-        return 0;
-}
-
-postcore_initcall(sa11xx_clk_init);
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index c483912d08af..fd5652118ed1 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -27,7 +27,6 @@
 #include <linux/timer.h>
 #include <linux/gpio.h>
 #include <linux/pda_power.h>
-#include <linux/mfd/ucb1x00.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
@@ -86,15 +85,10 @@ static struct scoop_pcmcia_config collie_pcmcia_config = {
         .num_devs       = 1,
 };
 
-static struct ucb1x00_plat_data collie_ucb1x00_data = {
-        .gpio_base      = COLLIE_TC35143_GPIO_BASE,
-};
-
 static struct mcp_plat_data collie_mcp_data = {
         .mccr0          = MCCR0_ADM | MCCR0_ExtClk,
         .sclk_rate      = 9216000,
-        .codec          = "ucb1x00",
-        .codec_pdata    = &collie_ucb1x00_data,
+        .gpio_base      = COLLIE_TC35143_GPIO_BASE,
 };
 
 /*
@@ -144,8 +138,6 @@ static struct pda_power_pdata collie_power_data = {
 static struct resource collie_power_resource[] = {
         {
                 .name           = "ac",
-                .start          = gpio_to_irq(COLLIE_GPIO_AC_IN),
-                .end            = gpio_to_irq(COLLIE_GPIO_AC_IN),
                 .flags          = IORESOURCE_IRQ |
                                   IORESOURCE_IRQ_HIGHEDGE |
                                   IORESOURCE_IRQ_LOWEDGE,
@@ -347,7 +339,8 @@ static void __init collie_init(void)
 
         GPSR |= _COLLIE_GPIO_UCB1x00_RESET;
 
-
+        collie_power_resource[0].start = gpio_to_irq(COLLIE_GPIO_AC_IN);
+        collie_power_resource[0].end = gpio_to_irq(COLLIE_GPIO_AC_IN);
         platform_scoop_config = &collie_pcmcia_config;
 
         ret = platform_add_devices(devices, ARRAY_SIZE(devices));
@@ -357,16 +350,6 @@ static void __init collie_init(void)
 
         sa11x0_register_mtd(&collie_flash_data, collie_flash_resources,
                             ARRAY_SIZE(collie_flash_resources));
-
-        /*
-         * Setup the PPC unit correctly.
-         */
-        PPDR &= ~PPC_RXD4;
-        PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
-        PSDR |= PPC_RXD4;
-        PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
-        PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
-
         sa11x0_register_mcp(&collie_mcp_data);
 
         sharpsl_save_param();
diff --git a/arch/arm/mach-sa1100/cpu-sa1100.c b/arch/arm/mach-sa1100/cpu-sa1100.c
index aaa8acf76b7b..19b2053f5af4 100644
--- a/arch/arm/mach-sa1100/cpu-sa1100.c
+++ b/arch/arm/mach-sa1100/cpu-sa1100.c
@@ -228,7 +228,7 @@ static int __init sa1100_cpu_init(struct cpufreq_policy *policy)
         return 0;
 }
 
-static struct cpufreq_driver sa1100_driver = {
+static struct cpufreq_driver sa1100_driver __refdata = {
         .flags          = CPUFREQ_STICKY,
         .verify         = sa11x0_verify_speed,
         .target         = sa1100_target,
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index e3a28ca2a7b7..bb10ee2cb89f 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -217,15 +217,10 @@ static struct platform_device sa11x0uart3_device = {
 static struct resource sa11x0mcp_resources[] = {
         [0] = {
                 .start  = __PREG(Ser4MCCR0),
-                .end    = __PREG(Ser4MCCR0) + 0x1C - 1,
+                .end    = __PREG(Ser4MCCR0) + 0xffff,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = __PREG(Ser4MCCR1),
-                .end    = __PREG(Ser4MCCR1) + 0x4 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [2] = {
                 .start  = IRQ_Ser4MCP,
                 .end    = IRQ_Ser4MCP,
                 .flags  = IORESOURCE_IRQ,
@@ -350,29 +345,9 @@ void sa11x0_register_irda(struct irda_platform_data *irda)
         sa11x0_register_device(&sa11x0ir_device, irda);
 }
 
-static struct resource sa11x0rtc_resources[] = {
-        [0] = {
-                .start  = 0x90010000,
-                .end    = 0x900100ff,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = IRQ_RTC1Hz,
-                .end    = IRQ_RTC1Hz,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                .start  = IRQ_RTCAlrm,
-                .end    = IRQ_RTCAlrm,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
 static struct platform_device sa11x0rtc_device = {
         .name           = "sa1100-rtc",
         .id             = -1,
-        .resource       = sa11x0rtc_resources,
-        .num_resources  = ARRAY_SIZE(sa11x0rtc_resources),
 };
 
 static struct platform_device *sa11x0_devices[] __initdata = {
diff --git a/arch/arm/mach-sa1100/include/mach/mcp.h b/arch/arm/mach-sa1100/include/mach/mcp.h
index 586cec898b35..ed1a331508a7 100644
--- a/arch/arm/mach-sa1100/include/mach/mcp.h
+++ b/arch/arm/mach-sa1100/include/mach/mcp.h
@@ -17,8 +17,6 @@ struct mcp_plat_data {
         u32 mccr1;
         unsigned int sclk_rate;
         int gpio_base;
-        const char *codec;
-        void *codec_pdata;
 };
 
 #endif
diff --git a/arch/arm/mach-sa1100/jornada720_ssp.c b/arch/arm/mach-sa1100/jornada720_ssp.c
index f50b00bd18a0..b412fc09c80c 100644
--- a/arch/arm/mach-sa1100/jornada720_ssp.c
+++ b/arch/arm/mach-sa1100/jornada720_ssp.c
@@ -198,3 +198,5 @@ static int __init jornada_ssp_init(void)
 {
         return platform_driver_register(&jornadassp_driver);
 }
+
+module_init(jornada_ssp_init);
diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c
index d117ceab6215..af4e2761f3db 100644
--- a/arch/arm/mach-sa1100/lart.c
+++ b/arch/arm/mach-sa1100/lart.c
@@ -24,20 +24,10 @@
 static struct mcp_plat_data lart_mcp_data = {
         .mccr0          = MCCR0_ADM,
         .sclk_rate      = 11981000,
-        .codec          = "ucb1x00",
 };
 
 static void __init lart_init(void)
 {
-        /*
-         * Setup the PPC unit correctly.
-         */
-        PPDR &= ~PPC_RXD4;
-        PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
-        PSDR |= PPC_RXD4;
-        PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
-        PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
-
         sa11x0_register_mcp(&lart_mcp_data);
 }
 
diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c
index 748d34435b3f..318b2b766a0b 100644
--- a/arch/arm/mach-sa1100/shannon.c
+++ b/arch/arm/mach-sa1100/shannon.c
@@ -55,22 +55,11 @@ static struct resource shannon_flash_resource = {
 static struct mcp_plat_data shannon_mcp_data = {
         .mccr0          = MCCR0_ADM,
         .sclk_rate      = 11981000,
-        .codec          = "ucb1x00",
 };
 
 static void __init shannon_init(void)
 {
         sa11x0_register_mtd(&shannon_flash_data, &shannon_flash_resource, 1);
-
-        /*
-         * Setup the PPC unit correctly.
-         */
-        PPDR &= ~PPC_RXD4;
-        PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
-        PSDR |= PPC_RXD4;
-        PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
-        PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
-
         sa11x0_register_mcp(&shannon_mcp_data);
 }
 
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
index 458ececefa58..e17c04d6e324 100644
--- a/arch/arm/mach-sa1100/simpad.c
+++ b/arch/arm/mach-sa1100/simpad.c
@@ -14,7 +14,6 @@
 #include <linux/mtd/partitions.h>
 #include <linux/io.h>
 #include <linux/gpio.h>
-#include <linux/mfd/ucb1x00.h>
 
 #include <asm/irq.h>
 #include <mach/hardware.h>
@@ -188,15 +187,10 @@ static struct resource simpad_flash_resources [] = {
         }
 };
 
-static struct ucb1x00_plat_data simpad_ucb1x00_data = {
-        .gpio_base      = SIMPAD_UCB1X00_GPIO_BASE,
-};
-
 static struct mcp_plat_data simpad_mcp_data = {
         .mccr0          = MCCR0_ADM,
         .sclk_rate      = 11981000,
-        .codec          = "ucb1300",
-        .codec_pdata    = &simpad_ucb1x00_data,
+        .gpio_base      = SIMPAD_UCB1X00_GPIO_BASE,
 };
 
 
@@ -384,16 +378,6 @@ static int __init simpad_init(void)
 
         sa11x0_register_mtd(&simpad_flash_data, simpad_flash_resources,
                               ARRAY_SIZE(simpad_flash_resources));
-
-        /*
-         * Setup the PPC unit correctly.
-         */
-        PPDR &= ~PPC_RXD4;
-        PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
-        PSDR |= PPC_RXD4;
-        PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
-        PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
-
         sa11x0_register_mcp(&simpad_mcp_data);
 
         ret = platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index cc97ef892d1b..4fe2e9eaf501 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -25,6 +25,7 @@
 #include <linux/delay.h>
 #include <mach/common.h>
 #include <mach/r8a7779.h>
+#include <asm/smp_plat.h>
 #include <asm/smp_scu.h>
 #include <asm/smp_twd.h>
 #include <asm/hardware/gic.h>
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index be1ade76ccc8..0d159d64a345 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -23,6 +23,7 @@
 #include <linux/spinlock.h>
 #include <linux/io.h>
 #include <mach/common.h>
+#include <asm/smp_plat.h>
 #include <asm/smp_scu.h>
 #include <asm/smp_twd.h>
 #include <asm/hardware/gic.h>
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index a3e0c8692f0d..52af00446a63 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -7,6 +7,7 @@ config UX500_SOC_COMMON
         select HAS_MTU
         select ARM_ERRATA_753970
         select ARM_ERRATA_754322
+        select ARM_ERRATA_764369
 
 menu "Ux500 SoC"
 
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c
index 23be34b3bb6e..5dde4d4ebe88 100644
--- a/arch/arm/mach-ux500/board-mop500-sdi.c
+++ b/arch/arm/mach-ux500/board-mop500-sdi.c
@@ -261,6 +261,8 @@ void __init mop500_sdi_init(void)
 
 void __init snowball_sdi_init(void)
 {
+        /* On Snowball MMC_CAP_SD_HIGHSPEED isn't supported (Hardware issue?) */
+        mop500_sdi0_data.capabilities &= ~MMC_CAP_SD_HIGHSPEED;
         /* On-board eMMC */
         db8500_add_sdi4(&mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
         /* External Micro SD slot */
diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c
index 122ddde00ba7..da5569d83d58 100644
--- a/arch/arm/mach-ux500/cache-l2x0.c
+++ b/arch/arm/mach-ux500/cache-l2x0.c
@@ -12,44 +12,6 @@
 
 static void __iomem *l2x0_base;
 
-static inline void ux500_cache_wait(void __iomem *reg, unsigned long mask)
-{
-        /* wait for the operation to complete */
-        while (readl_relaxed(reg) & mask)
-                cpu_relax();
-}
-
-static inline void ux500_cache_sync(void)
-{
-        writel_relaxed(0, l2x0_base + L2X0_CACHE_SYNC);
-        ux500_cache_wait(l2x0_base + L2X0_CACHE_SYNC, 1);
-}
-
-/*
- * The L2 cache cannot be turned off in the non-secure world.
- * Dummy until a secure service is in place.
- */
-static void ux500_l2x0_disable(void)
-{
-}
-
-/*
- * This is only called when doing a kexec, just after turning off the L2
- * and L1 cache, and it is surrounded by a spinlock in the generic version.
- * However, we're not really turning off the L2 cache right now and the
- * PL310 does not support exclusive accesses (used to implement the spinlock).
- * So, the invalidation needs to be done without the spinlock.
- */
-static void ux500_l2x0_inv_all(void)
-{
-        uint32_t l2x0_way_mask = (1<<16) - 1;   /* Bitmask of active ways */
-
-        /* invalidate all ways */
-        writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);
-        ux500_cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask);
-        ux500_cache_sync();
-}
-
 static int __init ux500_l2x0_unlock(void)
 {
         int i;
@@ -85,9 +47,13 @@ static int __init ux500_l2x0_init(void)
         /* 64KB way size, 8 way associativity, force WA */
         l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
 
-        /* Override invalidate function */
-        outer_cache.disable = ux500_l2x0_disable;
-        outer_cache.inv_all = ux500_l2x0_inv_all;
+        /*
+         * We can't disable l2 as we are in non secure mode, currently
+         * this seems be called only during kexec path. So let's
+         * override outer.disable with nasty assignment until we have
+         * some SMI service available.
+         */
+        outer_cache.disable = NULL;
 
         return 0;
 }
diff --git a/arch/arm/mach-ux500/hotplug.c b/arch/arm/mach-ux500/hotplug.c
index 572015e57cd9..c76f0f456f04 100644
--- a/arch/arm/mach-ux500/hotplug.c
+++ b/arch/arm/mach-ux500/hotplug.c
@@ -13,6 +13,7 @@
 #include <linux/smp.h>
 
 #include <asm/cacheflush.h>
+#include <asm/smp_plat.h>
 
 extern volatile int pen_release;
 
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index a19e398dade3..d2058ef8345f 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -19,6 +19,7 @@
 
 #include <asm/cacheflush.h>
 #include <asm/hardware/gic.h>
+#include <asm/smp_plat.h>
 #include <asm/smp_scu.h>
 #include <mach/hardware.h>
 #include <mach/setup.h>
diff --git a/arch/arm/mach-ux500/usb.c b/arch/arm/mach-ux500/usb.c
index 0a01cbdfe063..9f9e1c203061 100644
--- a/arch/arm/mach-ux500/usb.c
+++ b/arch/arm/mach-ux500/usb.c
@@ -95,13 +95,7 @@ static struct musb_hdrc_config musb_hdrc_config = {
 };
 
 static struct musb_hdrc_platform_data musb_platform_data = {
-#if defined(CONFIG_USB_MUSB_OTG)
         .mode = MUSB_OTG,
-#elif defined(CONFIG_USB_MUSB_PERIPHERAL)
-        .mode = MUSB_PERIPHERAL,
-#else /* defined(CONFIG_USB_MUSB_HOST) */
-        .mode = MUSB_HOST,
-#endif
         .config = &musb_hdrc_config,
         .board_data = &musb_board_data,
 };
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index 2b1e836a76ed..b1e87c184e54 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -217,7 +217,7 @@ static void __init ct_ca9x4_init(void)
 }
 
 #ifdef CONFIG_SMP
-static void ct_ca9x4_init_cpu_map(void)
+static void __init ct_ca9x4_init_cpu_map(void)
 {
         int i, ncores = scu_get_core_count(MMIO_P2V(A9_MPCORE_SCU));
 
@@ -233,7 +233,7 @@ static void ct_ca9x4_init_cpu_map(void)
         set_smp_cross_call(gic_raise_softirq);
 }
 
-static void ct_ca9x4_smp_enable(unsigned int max_cpus)
+static void __init ct_ca9x4_smp_enable(unsigned int max_cpus)
 {
         scu_enable(MMIO_P2V(A9_MPCORE_SCU));
 }
diff --git a/arch/arm/mach-vexpress/hotplug.c b/arch/arm/mach-vexpress/hotplug.c
index 813ee08f96e6..3034a4dab4a1 100644
--- a/arch/arm/mach-vexpress/hotplug.c
+++ b/arch/arm/mach-vexpress/hotplug.c
@@ -13,6 +13,7 @@
 #include <linux/smp.h>
 
 #include <asm/cacheflush.h>
+#include <asm/smp_plat.h>
 #include <asm/system.h>
 
 extern volatile int pen_release;
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 4cefb57d9ed2..1a3ca2488164 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -882,6 +882,7 @@ config CACHE_XSC3L2
 
 config ARM_L1_CACHE_SHIFT_6
         bool
+        default y if CPU_V7
         help
           Setting ARM L1 cache line size to 64 Bytes.
 
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 6ec1226fc62d..5dc7d127a40f 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -310,7 +310,7 @@ static void arm_memory_present(void)
 
 static bool arm_memblock_steal_permitted = true;
 
-phys_addr_t arm_memblock_steal(phys_addr_t size, phys_addr_t align)
+phys_addr_t __init arm_memblock_steal(phys_addr_t size, phys_addr_t align)
 {
         phys_addr_t phys;
 
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 80632e8d7538..ba159370fa5f 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -225,7 +225,8 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
                 if ((area->flags & VM_ARM_MTYPE_MASK) != VM_ARM_MTYPE(mtype))
                         continue;
                 if (__phys_to_pfn(area->phys_addr) > pfn ||
-                    __pfn_to_phys(pfn) + size-1 > area->phys_addr + area->size-1)
+                    __pfn_to_phys(pfn) + offset + size-1 >
+                    area->phys_addr + area->size-1)
                         continue;
                 /* we can drop the lock here as we know *area is static */
                 read_unlock(&vmlist_lock);
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 7e9b5bf910c1..0404ccbb8aa3 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -148,10 +148,6 @@ ENDPROC(cpu_v7_do_resume)
  *      Initialise TLB, Caches, and MMU state ready to switch the MMU
  *      on.  Return in r0 the new CP15 C1 control register setting.
  *
- *      We automatically detect if we have a Harvard cache, and use the
- *      Harvard cache control instructions insead of the unified cache
- *      control instructions.
- *
  *      This should be able to cover all ARMv7 cores.
  *
  *      It is assumed that:
@@ -251,9 +247,7 @@ __v7_setup:
 #endif
 
 3:      mov     r10, #0
-#ifdef HARVARD_CACHE
         mcr     p15, 0, r10, c7, c5, 0          @ I+BTB cache invalidate
-#endif
         dsb
 #ifdef CONFIG_MMU
         mcr     p15, 0, r10, c8, c7, 0          @ invalidate I + D TLBs
@@ -330,16 +324,6 @@ __v7_ca5mp_proc_info:
         .size   __v7_ca5mp_proc_info, . - __v7_ca5mp_proc_info
 
         /*
-         * ARM Ltd. Cortex A7 processor.
-         */
-        .type   __v7_ca7mp_proc_info, #object
-__v7_ca7mp_proc_info:
-        .long   0x410fc070
-        .long   0xff0ffff0
-        __v7_proc __v7_ca7mp_setup, hwcaps = HWCAP_IDIV
-        .size   __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info
-
-        /*
          * ARM Ltd. Cortex A9 processor.
          */
         .type   __v7_ca9mp_proc_info, #object
@@ -351,6 +335,16 @@ __v7_ca9mp_proc_info:
 #endif  /* CONFIG_ARM_LPAE */
 
         /*
+         * ARM Ltd. Cortex A7 processor.
+         */
+        .type   __v7_ca7mp_proc_info, #object
+__v7_ca7mp_proc_info:
+        .long   0x410fc070
+        .long   0xff0ffff0
+        __v7_proc __v7_ca7mp_setup, hwcaps = HWCAP_IDIV
+        .size   __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info
+
+        /*
          * ARM Ltd. Cortex A15 processor.
          */
         .type   __v7_ca15mp_proc_info, #object
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index b30708e28c1d..dcebb1230f7f 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -17,26 +17,17 @@ config ARCH_IMX_V4_V5
           and ARMv5 SoCs
 
 config ARCH_IMX_V6_V7
-        bool "i.MX3, i.MX6"
+        bool "i.MX3, i.MX5, i.MX6"
         select AUTO_ZRELADDR if !ZBOOT_ROM
         select ARM_PATCH_PHYS_VIRT
         select MIGHT_HAVE_CACHE_L2X0
         help
-          This enables support for systems based on the Freescale i.MX3 and i.MX6
-          family.
-
-config ARCH_MX5
-        bool "i.MX50, i.MX51, i.MX53"
-        select AUTO_ZRELADDR if !ZBOOT_ROM
-        select ARM_PATCH_PHYS_VIRT
-        help
-          This enables support for machines using Freescale's i.MX50 and i.MX53
-          processors.
+          This enables support for systems based on the Freescale i.MX3, i.MX5
+          and i.MX6 family.
 
 endchoice
 
 source "arch/arm/mach-imx/Kconfig"
-source "arch/arm/mach-mx5/Kconfig"
 
 endmenu
 
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/plat-mxc/include/mach/iomux-v1.h
index 6fa8a707b9a0..f7d18046c04f 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-v1.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-v1.h
@@ -96,6 +96,6 @@ extern int mxc_gpio_mode(int gpio_mode);
 extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
                 const char *label);
 
-extern int __init imx_iomuxv1_init(void __iomem *base, int numports);
+extern int imx_iomuxv1_init(void __iomem *base, int numports);
 
 #endif /* __MACH_IOMUX_V1_H__ */
diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c
index 92f18d372b69..49c7db48c7f1 100644
--- a/arch/arm/plat-versatile/platsmp.c
+++ b/arch/arm/plat-versatile/platsmp.c
@@ -16,6 +16,7 @@
 #include <linux/smp.h>
 
 #include <asm/cacheflush.h>
+#include <asm/smp_plat.h>
 #include <asm/hardware/gic.h>
 
 /*
diff --git a/arch/m68k/atari/config.c b/arch/m68k/atari/config.c
index 4203d101363c..c4ac15c4f065 100644
--- a/arch/m68k/atari/config.c
+++ b/arch/m68k/atari/config.c
@@ -414,9 +414,9 @@ void __init config_atari(void)
                                          * FDC val = 4 -> Supervisor only */
                 asm volatile ("\n"
                         "       .chip   68030\n"
-                        "       pmove   %0@,%/tt1\n"
+                        "       pmove   %0,%/tt1\n"
                         "       .chip   68k"
-                        : : "a" (&tt1_val));
+                        : : "m" (tt1_val));
         } else {
                 asm volatile ("\n"
                         "       .chip   68040\n"
@@ -569,10 +569,10 @@ static void atari_reset(void)
                         : "d0");
         } else
                 asm volatile ("\n"
-                        "       pmove   %0@,%%tc\n"
+                        "       pmove   %0,%%tc\n"
                         "       jmp     %1@"
                         : /* no outputs */
-                        : "a" (&tc_val), "a" (reset_addr));
+                        : "m" (tc_val), "a" (reset_addr));
 }
 
 
diff --git a/arch/m68k/include/asm/irq.h b/arch/m68k/include/asm/irq.h
index 0e89fa05de0e..c1155f0e22cc 100644
--- a/arch/m68k/include/asm/irq.h
+++ b/arch/m68k/include/asm/irq.h
@@ -50,19 +50,6 @@
 
 #define IRQ_USER        8
 
-/*
- * various flags for request_irq() - the Amiga now uses the standard
- * mechanism like all other architectures - IRQF_DISABLED and
- * IRQF_SHARED are your friends.
- */
-#ifndef MACH_AMIGA_ONLY
-#define IRQ_FLG_LOCK    (0x0001)        /* handler is not replaceable   */
-#define IRQ_FLG_REPLACE (0x0002)        /* replace existing handler     */
-#define IRQ_FLG_FAST    (0x0004)
-#define IRQ_FLG_SLOW    (0x0008)
-#define IRQ_FLG_STD     (0x8000)        /* internally used              */
-#endif
-
 struct irq_data;
 struct irq_chip;
 struct irq_desc;
diff --git a/arch/m68k/kernel/process_mm.c b/arch/m68k/kernel/process_mm.c
index 125f34e00bf0..099283ee1a8f 100644
--- a/arch/m68k/kernel/process_mm.c
+++ b/arch/m68k/kernel/process_mm.c
@@ -172,7 +172,7 @@ void flush_thread(void)
 
         current->thread.fs = __USER_DS;
         if (!FPU_IS_EMU)
-                asm volatile ("frestore %0@" : : "a" (&zero) : "memory");
+                asm volatile("frestore %0": :"m" (zero));
 }
 
 /*
diff --git a/arch/m68k/kernel/process_no.c b/arch/m68k/kernel/process_no.c
index 69c1803fcf1b..5e1078cabe0e 100644
--- a/arch/m68k/kernel/process_no.c
+++ b/arch/m68k/kernel/process_no.c
@@ -163,8 +163,8 @@ void flush_thread(void)
 #ifdef CONFIG_FPU
         if (!FPU_IS_EMU)
                 asm volatile (".chip 68k/68881\n\t"
-                              "frestore %0@\n\t"
-                              ".chip 68k" : : "a" (&zero));
+                              "frestore %0\n\t"
+                              ".chip 68k" : : "m" (zero));
 #endif
 }
 
diff --git a/arch/m68k/kernel/traps.c b/arch/m68k/kernel/traps.c
index a76452ca964e..daaa9187654c 100644
--- a/arch/m68k/kernel/traps.c
+++ b/arch/m68k/kernel/traps.c
@@ -552,13 +552,13 @@ static inline void bus_error030 (struct frame *fp)
 
 #ifdef DEBUG
                 asm volatile ("ptestr %3,%2@,#7,%0\n\t"
-                              "pmove %%psr,%1@"
-                              : "=a&" (desc)
-                              : "a" (&temp), "a" (addr), "d" (ssw));
+                              "pmove %%psr,%1"
+                              : "=a&" (desc), "=m" (temp)
+                              : "a" (addr), "d" (ssw));
 #else
                 asm volatile ("ptestr %2,%1@,#7\n\t"
-                              "pmove %%psr,%0@"
-                              : : "a" (&temp), "a" (addr), "d" (ssw));
+                              "pmove %%psr,%0"
+                              : "=m" (temp) : "a" (addr), "d" (ssw));
 #endif
                 mmusr = temp;
 
@@ -605,20 +605,18 @@ static inline void bus_error030 (struct frame *fp)
                                !(ssw & RW) ? "write" : "read", addr,
                                fp->ptregs.pc, ssw);
                         asm volatile ("ptestr #1,%1@,#0\n\t"
-                                      "pmove %%psr,%0@"
-                                      : /* no outputs */
-                                      : "a" (&temp), "a" (addr));
+                                      "pmove %%psr,%0"
+                                      : "=m" (temp)
+                                      : "a" (addr));
                         mmusr = temp;
 
                         printk ("level 0 mmusr is %#x\n", mmusr);
 #if 0
-                        asm volatile ("pmove %%tt0,%0@"
-                                      : /* no outputs */
-                                      : "a" (&tlong));
+                        asm volatile ("pmove %%tt0,%0"
+                                      : "=m" (tlong));
                         printk("tt0 is %#lx, ", tlong);
-                        asm volatile ("pmove %%tt1,%0@"
-                                      : /* no outputs */
-                                      : "a" (&tlong));
+                        asm volatile ("pmove %%tt1,%0"
+                                      : "=m" (tlong));
                         printk("tt1 is %#lx\n", tlong);
 #endif
 #ifdef DEBUG
@@ -668,13 +666,13 @@ static inline void bus_error030 (struct frame *fp)
 
 #ifdef DEBUG
         asm volatile ("ptestr #1,%2@,#7,%0\n\t"
-                      "pmove %%psr,%1@"
-                      : "=a&" (desc)
-                      : "a" (&temp), "a" (addr));
+                      "pmove %%psr,%1"
+                      : "=a&" (desc), "=m" (temp)
+                      : "a" (addr));
 #else
         asm volatile ("ptestr #1,%1@,#7\n\t"
-                      "pmove %%psr,%0@"
-                      : : "a" (&temp), "a" (addr));
+                      "pmove %%psr,%0"
+                      : "=m" (temp) : "a" (addr));
 #endif
         mmusr = temp;
 
diff --git a/arch/m68k/mm/cache.c b/arch/m68k/mm/cache.c
index 95d0bf66e2e2..3d84c1f2ffb2 100644
--- a/arch/m68k/mm/cache.c
+++ b/arch/m68k/mm/cache.c
@@ -52,9 +52,9 @@ static unsigned long virt_to_phys_slow(unsigned long vaddr)
                 unsigned long *descaddr;
 
                 asm volatile ("ptestr %3,%2@,#7,%0\n\t"
-                              "pmove %%psr,%1@"
-                              : "=a&" (descaddr)
-                              : "a" (&mmusr), "a" (vaddr), "d" (get_fs().seg));
+                              "pmove %%psr,%1"
+                              : "=a&" (descaddr), "=m" (mmusr)
+                              : "a" (vaddr), "d" (get_fs().seg));
                 if (mmusr & (MMU_I|MMU_B|MMU_L))
                         return 0;
                 descaddr = phys_to_virt((unsigned long)descaddr);
diff --git a/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
index 89af62637707..b37da56018b6 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
@@ -236,6 +236,10 @@
         };
 
 /include/ "pq3-esdhc-0.dtsi"
+        sdhc@2e000 {
+                compatible = "fsl,mpc8536-esdhc", "fsl,esdhc";
+        };
+
 /include/ "pq3-sec3.0-0.dtsi"
 /include/ "pq3-mpic.dtsi"
 /include/ "pq3-mpic-timer-B.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
index bd9e163c764b..a97d1263372c 100644
--- a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
@@ -158,7 +158,8 @@
 /include/ "pq3-usb2-dr-0.dtsi"
 /include/ "pq3-esdhc-0.dtsi"
         sdhc@2e000 {
-                fsl,sdhci-auto-cmd12;
+                compatible = "fsl,p1010-esdhc", "fsl,esdhc";
+                sdhci,auto-cmd12;
         };
 
 /include/ "pq3-sec4.4-0.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
index fc924c5ffebe..5de5fc351314 100644
--- a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
@@ -145,6 +145,10 @@
 /include/ "pq3-usb2-dr-1.dtsi"
 
 /include/ "pq3-esdhc-0.dtsi"
+        sdhc@2e000 {
+                compatible = "fsl,p1020-esdhc", "fsl,esdhc";
+                sdhci,auto-cmd12;
+        };
 /include/ "pq3-sec3.3-0.dtsi"
 
 /include/ "pq3-mpic.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
index 16239b199d0a..ff9ed1d87929 100644
--- a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
@@ -203,7 +203,8 @@
 
 /include/ "pq3-esdhc-0.dtsi"
         sdhc@2e000 {
-                fsl,sdhci-auto-cmd12;
+                compatible = "fsl,p1022-esdhc", "fsl,esdhc";
+                sdhci,auto-cmd12;
         };
 
 /include/ "pq3-sec3.3-0.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
index c041050561a7..332e9e75e6c2 100644
--- a/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
@@ -182,6 +182,10 @@
 /include/ "pq3-etsec1-1.dtsi"
 /include/ "pq3-etsec1-2.dtsi"
 /include/ "pq3-esdhc-0.dtsi"
+        sdhc@2e000 {
+                compatible = "fsl,p2020-esdhc", "fsl,esdhc";
+        };
+
 /include/ "pq3-sec3.1-0.dtsi"
 /include/ "pq3-mpic.dtsi"
 /include/ "pq3-mpic-timer-B.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020rdb.dtsi b/arch/powerpc/boot/dts/p1020rdb.dtsi
index b5bd86f4baf2..1fb7e0e0940f 100644
--- a/arch/powerpc/boot/dts/p1020rdb.dtsi
+++ b/arch/powerpc/boot/dts/p1020rdb.dtsi
@@ -1,7 +1,7 @@
 /*
  * P1020 RDB Device Tree Source stub (no addresses or top-level ranges)
  *
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -190,17 +190,16 @@
 
         usb@22000 {
                 phy_type = "ulpi";
+                dr_mode = "host";
         };
 
-        /* USB2 is shared with localbus, so it must be disabled
-           by default. We can't put 'status = "disabled";' here
-           since U-Boot doesn't clear the status property when
-           it enables USB2. OTOH, U-Boot does create a new node
-           when there isn't any. So, just comment it out.
+        /* USB2 is shared with localbus. It is used
+           only in case of SPI and SD boot after
+           appropriate device-tree fixup done by uboot */
         usb@23000 {
                 phy_type = "ulpi";
+                dr_mode = "host";
         };
-        */
 
         mdio@24000 {
                 phy0: ethernet-phy@0 {
diff --git a/arch/powerpc/boot/dts/p1021mds.dts b/arch/powerpc/boot/dts/p1021mds.dts
index d9540791e434..97116f198a37 100644
--- a/arch/powerpc/boot/dts/p1021mds.dts
+++ b/arch/powerpc/boot/dts/p1021mds.dts
@@ -1,7 +1,7 @@
 /*
  * P1021 MDS Device Tree Source
  *
- * Copyright 2010 Freescale Semiconductor Inc.
+ * Copyright 2010,2012 Freescale Semiconductor Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License as published by the
@@ -151,6 +151,7 @@
 
                 usb@22000 {
                         phy_type = "ulpi";
+                        dr_mode = "host";
                 };
 
                 mdio@24000 {
diff --git a/arch/powerpc/boot/dts/p2020ds.dtsi b/arch/powerpc/boot/dts/p2020ds.dtsi
index c1cf6cef4dd6..d3b939c573b0 100644
--- a/arch/powerpc/boot/dts/p2020ds.dtsi
+++ b/arch/powerpc/boot/dts/p2020ds.dtsi
@@ -1,7 +1,7 @@
 /*
  * P2020DS Device Tree Source stub (no addresses or top-level ranges)
  *
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -134,6 +134,7 @@
 &board_soc {
         usb@22000 {
                 phy_type = "ulpi";
+                dr_mode = "host";
         };
 
         mdio@24520 {
diff --git a/arch/powerpc/boot/dts/p2020rdb.dts b/arch/powerpc/boot/dts/p2020rdb.dts
index 26759a591712..eb8a6aa2bda5 100644
--- a/arch/powerpc/boot/dts/p2020rdb.dts
+++ b/arch/powerpc/boot/dts/p2020rdb.dts
@@ -1,7 +1,7 @@
 /*
  * P2020 RDB Device Tree Source
  *
- * Copyright 2009-2011 Freescale Semiconductor Inc.
+ * Copyright 2009-2012 Freescale Semiconductor Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -197,6 +197,7 @@
 
                 usb@22000 {
                         phy_type = "ulpi";
+                        dr_mode = "host";
                 };
 
                 mdio@24520 {
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c
index 28be3452e67a..abef75176c07 100644
--- a/arch/powerpc/kernel/crash.c
+++ b/arch/powerpc/kernel/crash.c
@@ -46,7 +46,6 @@
 
 /* This keeps a track of which one is the crashing cpu. */
 int crashing_cpu = -1;
-static atomic_t cpus_in_crash;
 static int time_to_dump;
 
 #define CRASH_HANDLER_MAX 3
@@ -66,6 +65,7 @@ static int handle_fault(struct pt_regs *regs)
 
 #ifdef CONFIG_SMP
 
+static atomic_t cpus_in_crash;
 void crash_ipi_callback(struct pt_regs *regs)
 {
         static cpumask_t cpus_state_saved = CPU_MASK_NONE;
diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c
index 3fea3689527e..bedd12e1cfbc 100644
--- a/arch/powerpc/kernel/legacy_serial.c
+++ b/arch/powerpc/kernel/legacy_serial.c
@@ -442,8 +442,10 @@ static void __init fixup_port_irq(int index,
 
         port->irq = virq;
 
+#ifdef CONFIG_SERIAL_8250_FSL
         if (of_device_is_compatible(np, "fsl,ns16550"))
                 port->handle_irq = fsl8250_handle_irq;
+#endif
 }
 
 static void __init fixup_port_pio(int index,
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c
index bb3d84f4046f..b0984ada3f83 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -25,6 +25,7 @@
 
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
+#include <asm/udbg.h>
 #include <asm/fsl_guts.h>
 #include "smp.h"
 
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index f31162cfdaa9..5e155dfc4320 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -204,11 +204,10 @@ static void __devinit pnv_ioda_offset_bus(struct pci_bus *bus,
         pr_devel("  -> OBR %s [%x] +%016llx\n",
                  bus->self ? pci_name(bus->self) : "root", flags, offset);
 
-        for (i = 0; i < 2; i++) {
-                r = bus->resource[i];
+        pci_bus_for_each_resource(bus, r, i) {
                 if (r && (r->flags & flags)) {
-                        bus->resource[i]->start += offset;
-                        bus->resource[i]->end += offset;
+                        r->start += offset;
+                        r->end += offset;
                 }
         }
         list_for_each_entry(dev, &bus->devices, bus_list)
@@ -288,12 +287,17 @@ static void __devinit pnv_ioda_calc_bus(struct pci_bus *bus, unsigned int flags,
          * assignment algorithm is going to be uber-trivial for now, we
          * can try to be smarter later at filling out holes.
          */
-        start = bus->self ? 0 : bus->resource[bres]->start;
-
-        /* Don't hand out IO 0 */
-        if ((flags & IORESOURCE_IO) && !bus->self)
-                start += 0x1000;
-
+        if (bus->self) {
+                /* No offset for downstream bridges */
+                start = 0;
+        } else {
+                /* Offset from the root */
+                if (flags & IORESOURCE_IO)
+                        /* Don't hand out IO 0 */
+                        start = hose->io_resource.start + 0x1000;
+                else
+                        start = hose->mem_resources[0].start;
+        }
         while(!list_empty(&head)) {
                 w = list_first_entry(&head, struct resource_wrap, link);
                 list_del(&w->link);
@@ -321,13 +325,20 @@ static void __devinit pnv_ioda_calc_bus(struct pci_bus *bus, unsigned int flags,
  empty:
         /* Only setup P2P's, not the PHB itself */
         if (bus->self) {
-                WARN_ON(bus->resource[bres] == NULL);
-                bus->resource[bres]->start = 0;
-                bus->resource[bres]->flags = (*size) ? flags : 0;
-                bus->resource[bres]->end = (*size) ? (*size - 1) : 0;
+                struct resource *res = bus->resource[bres];
+
+                if (WARN_ON(res == NULL))
+                        return;
 
-                /* Clear prefetch bus resources for now */
-                bus->resource[2]->flags = 0;
+                /*
+                 * FIXME: We should probably export and call
+                 * pci_bridge_check_ranges() to properly re-initialize
+                 * the PCI portion of the flags here, and to detect
+                 * what the bridge actually supports.
+                 */
+                res->start = 0;
+                res->flags = (*size) ? flags : 0;
+                res->end = (*size) ? (*size - 1) : 0;
         }
 
         pr_devel("<- CBR %s [%x] *size=%016llx *align=%016llx\n",
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig
index ae7b6d41fed3..31f22c1f657d 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -122,7 +122,7 @@ config DTL
           Say N if you are unsure.
 
 config PSERIES_IDLE
-        tristate "Cpuidle driver for pSeries platforms"
+        bool "Cpuidle driver for pSeries platforms"
         depends on CPU_IDLE
         depends on PPC_PSERIES
         default y
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 3b61e8cf3421..30eb17ecad49 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -205,12 +205,12 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
 
         if (paddr_hi == paddr_lo) {
                 pr_err("%s: No outbound window space\n", name);
-                return ;
+                goto out;
         }
 
         if (paddr_lo == 0) {
                 pr_err("%s: No space for inbound window\n", name);
-                return ;
+                goto out;
         }
 
         /* setup PCSRBAR/PEXCSRBAR */
@@ -357,6 +357,7 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
                         (u64)hose->dma_window_size);
         }
 
+out:
         iounmap(pci);
 }
 
diff --git a/arch/s390/include/asm/kexec.h b/arch/s390/include/asm/kexec.h
index cf4e47b0948c..3f30dac804ea 100644
--- a/arch/s390/include/asm/kexec.h
+++ b/arch/s390/include/asm/kexec.h
@@ -42,6 +42,24 @@
 /* The native architecture */
 #define KEXEC_ARCH KEXEC_ARCH_S390
 
+/*
+ * Size for s390x ELF notes per CPU
+ *
+ * Seven notes plus zero note at the end: prstatus, fpregset, timer,
+ * tod_cmp, tod_reg, control regs, and prefix
+ */
+#define KEXEC_NOTE_BYTES \
+        (ALIGN(sizeof(struct elf_note), 4) * 8 + \
+         ALIGN(sizeof("CORE"), 4) * 7 + \
+         ALIGN(sizeof(struct elf_prstatus), 4) + \
+         ALIGN(sizeof(elf_fpregset_t), 4) + \
+         ALIGN(sizeof(u64), 4) + \
+         ALIGN(sizeof(u64), 4) + \
+         ALIGN(sizeof(u32), 4) + \
+         ALIGN(sizeof(u64) * 16, 4) + \
+         ALIGN(sizeof(u32), 4) \
+        )
+
 /* Provide a dummy definition to avoid build failures. */
 static inline void crash_setup_regs(struct pt_regs *newregs,
                                         struct pt_regs *oldregs) { }
diff --git a/arch/score/kernel/entry.S b/arch/score/kernel/entry.S
index 577abba3fac6..83bb96079c43 100644
--- a/arch/score/kernel/entry.S
+++ b/arch/score/kernel/entry.S
@@ -408,7 +408,7 @@ ENTRY(handle_sys)
         sw      r9, [r0, PT_EPC]
 
         cmpi.c  r27, __NR_syscalls      # check syscall number
-        bgtu    illegal_syscall
+        bgeu    illegal_syscall
 
         slli    r8, r27, 2              # get syscall routine
         la      r11, sys_call_table
diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c
index 422c16dad1f6..e61165161dd3 100644
--- a/arch/sparc/kernel/sun4m_irq.c
+++ b/arch/sparc/kernel/sun4m_irq.c
@@ -399,6 +399,9 @@ static void __init sun4m_init_timers(irq_handler_t counter_fn)
         timers_global = (void __iomem *)
                 (unsigned long) addr[num_cpu_timers];
 
+        /* Every per-cpu timer works in timer mode */
+        sbus_writel(0x00000000, &timers_global->timer_config);
+
         sbus_writel((((1000000/HZ) + 1) << 10), &timers_global->l10_limit);
 
         master_l10_counter = &timers_global->l10_count;
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 864cc6e6ac8e..5bed94e189fa 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -360,7 +360,6 @@ config X86_NUMACHIP
         depends on NUMA
         depends on SMP
         depends on X86_X2APIC
-        depends on !EDAC_AMD64
         ---help---
           Adds support for Numascale NumaChip large-SMP systems. Needed to
           enable more than ~168 cores.
diff --git a/arch/x86/boot/compressed/misc.c b/arch/x86/boot/compressed/misc.c
index 3a19d04cebeb..7116dcba0c9e 100644
--- a/arch/x86/boot/compressed/misc.c
+++ b/arch/x86/boot/compressed/misc.c
@@ -321,6 +321,8 @@ static void parse_elf(void *output)
                 default: /* Ignore other PT_* */ break;
                 }
         }
+
+        free(phdrs);
 }
 
 asmlinkage void decompress_kernel(void *rmode, memptr heap,
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 17c5d4bdee5e..8d67d428b0f9 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -159,6 +159,7 @@
 #define X86_FEATURE_WDT         (6*32+13) /* Watchdog timer */
 #define X86_FEATURE_LWP         (6*32+15) /* Light Weight Profiling */
 #define X86_FEATURE_FMA4        (6*32+16) /* 4 operands MAC instructions */
+#define X86_FEATURE_TCE         (6*32+17) /* translation cache extension */
 #define X86_FEATURE_NODEID_MSR  (6*32+19) /* NodeId MSR */
 #define X86_FEATURE_TBM         (6*32+21) /* trailing bit manipulations */
 #define X86_FEATURE_TOPOEXT     (6*32+22) /* topology extensions CPUID leafs */
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 54a13aaebc40..21f7385badb8 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -318,13 +318,13 @@ uv_gpa_in_mmr_space(unsigned long gpa)
 /* UV global physical address --> socket phys RAM */
 static inline unsigned long uv_gpa_to_soc_phys_ram(unsigned long gpa)
 {
-        unsigned long paddr = gpa & uv_hub_info->gpa_mask;
+        unsigned long paddr;
         unsigned long remap_base = uv_hub_info->lowmem_remap_base;
         unsigned long remap_top =  uv_hub_info->lowmem_remap_top;
 
         gpa = ((gpa << uv_hub_info->m_shift) >> uv_hub_info->m_shift) |
                 ((gpa >> uv_hub_info->n_lshift) << uv_hub_info->m_val);
-        gpa = gpa & uv_hub_info->gpa_mask;
+        paddr = gpa & uv_hub_info->gpa_mask;
         if (paddr >= remap_base && paddr < remap_base + remap_top)
                 paddr -= remap_base;
         return paddr;
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c
index fe86493f3ed1..ac0417be9131 100644
--- a/arch/x86/kernel/microcode_amd.c
+++ b/arch/x86/kernel/microcode_amd.c
@@ -311,13 +311,33 @@ out:
         return state;
 }
 
+/*
+ * AMD microcode firmware naming convention, up to family 15h they are in
+ * the legacy file:
+ *
+ *    amd-ucode/microcode_amd.bin
+ *
+ * This legacy file is always smaller than 2K in size.
+ *
+ * Starting at family 15h they are in family specific firmware files:
+ *
+ *    amd-ucode/microcode_amd_fam15h.bin
+ *    amd-ucode/microcode_amd_fam16h.bin
+ *    ...
+ *
+ * These might be larger than 2K.
+ */
 static enum ucode_state request_microcode_amd(int cpu, struct device *device)
 {
-        const char *fw_name = "amd-ucode/microcode_amd.bin";
+        char fw_name[36] = "amd-ucode/microcode_amd.bin";
         const struct firmware *fw;
         enum ucode_state ret = UCODE_NFOUND;
+        struct cpuinfo_x86 *c = &cpu_data(cpu);
+
+        if (c->x86 >= 0x15)
+                snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86);
 
-        if (request_firmware(&fw, fw_name, device)) {
+        if (request_firmware(&fw, (const char *)fw_name, device)) {
                 pr_err("failed to load file %s\n", fw_name);
                 goto out;
         }
diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c
index 7b65f752c5f8..7c1b765ecc59 100644
--- a/arch/x86/net/bpf_jit_comp.c
+++ b/arch/x86/net/bpf_jit_comp.c
@@ -151,17 +151,18 @@ void bpf_jit_compile(struct sk_filter *fp)
         cleanup_addr = proglen; /* epilogue address */
 
         for (pass = 0; pass < 10; pass++) {
+                u8 seen_or_pass0 = (pass == 0) ? (SEEN_XREG | SEEN_DATAREF | SEEN_MEM) : seen;
                 /* no prologue/epilogue for trivial filters (RET something) */
                 proglen = 0;
                 prog = temp;
 
-                if (seen) {
+                if (seen_or_pass0) {
                         EMIT4(0x55, 0x48, 0x89, 0xe5); /* push %rbp; mov %rsp,%rbp */
                         EMIT4(0x48, 0x83, 0xec, 96);    /* subq  $96,%rsp       */
                         /* note : must save %rbx in case bpf_error is hit */
-                        if (seen & (SEEN_XREG | SEEN_DATAREF))
+                        if (seen_or_pass0 & (SEEN_XREG | SEEN_DATAREF))
                                 EMIT4(0x48, 0x89, 0x5d, 0xf8); /* mov %rbx, -8(%rbp) */
-                        if (seen & SEEN_XREG)
+                        if (seen_or_pass0 & SEEN_XREG)
                                 CLEAR_X(); /* make sure we dont leek kernel memory */
 
                         /*
@@ -170,7 +171,7 @@ void bpf_jit_compile(struct sk_filter *fp)
                          *  r9 = skb->len - skb->data_len
                          *  r8 = skb->data
                          */
-                        if (seen & SEEN_DATAREF) {
+                        if (seen_or_pass0 & SEEN_DATAREF) {
                                 if (offsetof(struct sk_buff, len) <= 127)
                                         /* mov    off8(%rdi),%r9d */
                                         EMIT4(0x44, 0x8b, 0x4f, offsetof(struct sk_buff, len));
@@ -260,9 +261,14 @@ void bpf_jit_compile(struct sk_filter *fp)
                         case BPF_S_ALU_DIV_X: /* A /= X; */
                                 seen |= SEEN_XREG;
                                 EMIT2(0x85, 0xdb);      /* test %ebx,%ebx */
-                                if (pc_ret0 != -1)
-                                        EMIT_COND_JMP(X86_JE, addrs[pc_ret0] - (addrs[i] - 4));
-                                else {
+                                if (pc_ret0 > 0) {
+                                        /* addrs[pc_ret0 - 1] is start address of target
+                                         * (addrs[i] - 4) is the address following this jmp
+                                         * ("xor %edx,%edx; div %ebx" being 4 bytes long)
+                                         */
+                                        EMIT_COND_JMP(X86_JE, addrs[pc_ret0 - 1] -
+                                                                (addrs[i] - 4));
+                                } else {
                                         EMIT_COND_JMP(X86_JNE, 2 + 5);
                                         CLEAR_A();
                                         EMIT1_off32(0xe9, cleanup_addr - (addrs[i] - 4)); /* jmp .+off32 */
@@ -335,12 +341,12 @@ void bpf_jit_compile(struct sk_filter *fp)
                                 }
                                 /* fallinto */
                         case BPF_S_RET_A:
-                                if (seen) {
+                                if (seen_or_pass0) {
                                         if (i != flen - 1) {
                                                 EMIT_JMP(cleanup_addr - addrs[i]);
                                                 break;
                                         }
-                                        if (seen & SEEN_XREG)
+                                        if (seen_or_pass0 & SEEN_XREG)
                                                 EMIT4(0x48, 0x8b, 0x5d, 0xf8);  /* mov  -8(%rbp),%rbx */
                                         EMIT1(0xc9);            /* leaveq */
                                 }
@@ -483,8 +489,9 @@ common_load:			seen |= SEEN_DATAREF;
                                 goto common_load;
                         case BPF_S_LDX_B_MSH:
                                 if ((int)K < 0) {
-                                        if (pc_ret0 != -1) {
-                                                EMIT_JMP(addrs[pc_ret0] - addrs[i]);
+                                        if (pc_ret0 > 0) {
+                                                /* addrs[pc_ret0 - 1] is the start address */
+                                                EMIT_JMP(addrs[pc_ret0 - 1] - addrs[i]);
                                                 break;
                                         }
                                         CLEAR_A();
@@ -599,13 +606,14 @@ cond_branch:			f_offset = addrs[i + filter[i].jf] - addrs[i];
                  * use it to give the cleanup instruction(s) addr
                  */
                 cleanup_addr = proglen - 1; /* ret */
-                if (seen)
+                if (seen_or_pass0)
                         cleanup_addr -= 1; /* leaveq */
-                if (seen & SEEN_XREG)
+                if (seen_or_pass0 & SEEN_XREG)
                         cleanup_addr -= 4; /* mov  -8(%rbp),%rbx */
 
                 if (image) {
-                        WARN_ON(proglen != oldproglen);
+                        if (proglen != oldproglen)
+                                pr_err("bpb_jit_compile proglen=%u != oldproglen=%u\n", proglen, oldproglen);
                         break;
                 }
                 if (proglen == oldproglen) {
diff --git a/arch/x86/platform/uv/tlb_uv.c b/arch/x86/platform/uv/tlb_uv.c
index 9be4cff00a2d..3ae0e61abd23 100644
--- a/arch/x86/platform/uv/tlb_uv.c
+++ b/arch/x86/platform/uv/tlb_uv.c
@@ -1851,6 +1851,8 @@ static void __init init_per_cpu_tunables(void)
                 bcp->cong_reps                  = congested_reps;
                 bcp->cong_period                = congested_period;
                 bcp->clocks_per_100_usec =      usec_2_cycles(100);
+                spin_lock_init(&bcp->queue_lock);
+                spin_lock_init(&bcp->uvhub_lock);
         }
 }
 
diff --git a/arch/x86/platform/uv/uv_irq.c b/arch/x86/platform/uv/uv_irq.c
index 374a05d8ad22..f25c2765a5c9 100644
--- a/arch/x86/platform/uv/uv_irq.c
+++ b/arch/x86/platform/uv/uv_irq.c
@@ -25,7 +25,7 @@ struct uv_irq_2_mmr_pnode{
         int                     irq;
 };
 
-static spinlock_t               uv_irq_lock;
+static DEFINE_SPINLOCK(uv_irq_lock);
 static struct rb_root           uv_irq_root;
 
 static int uv_set_irq_affinity(struct irq_data *, const struct cpumask *, bool);
diff --git a/arch/x86/xen/spinlock.c b/arch/x86/xen/spinlock.c
index cc9b1e182fcf..d69cc6c3f808 100644
--- a/arch/x86/xen/spinlock.c
+++ b/arch/x86/xen/spinlock.c
@@ -116,9 +116,26 @@ static inline void spin_time_accum_blocked(u64 start)
 }
 #endif  /* CONFIG_XEN_DEBUG_FS */
 
+/*
+ * Size struct xen_spinlock so it's the same as arch_spinlock_t.
+ */
+#if NR_CPUS < 256
+typedef u8 xen_spinners_t;
+# define inc_spinners(xl) \
+        asm(LOCK_PREFIX " incb %0" : "+m" ((xl)->spinners) : : "memory");
+# define dec_spinners(xl) \
+        asm(LOCK_PREFIX " decb %0" : "+m" ((xl)->spinners) : : "memory");
+#else
+typedef u16 xen_spinners_t;
+# define inc_spinners(xl) \
+        asm(LOCK_PREFIX " incw %0" : "+m" ((xl)->spinners) : : "memory");
+# define dec_spinners(xl) \
+        asm(LOCK_PREFIX " decw %0" : "+m" ((xl)->spinners) : : "memory");
+#endif
+
 struct xen_spinlock {
         unsigned char lock;             /* 0 -> free; 1 -> locked */
-        unsigned short spinners;        /* count of waiting cpus */
+        xen_spinners_t spinners;        /* count of waiting cpus */
 };
 
 static int xen_spin_is_locked(struct arch_spinlock *lock)
@@ -164,8 +181,7 @@ static inline struct xen_spinlock *spinning_lock(struct xen_spinlock *xl)
 
         wmb();                  /* set lock of interest before count */
 
-        asm(LOCK_PREFIX " incw %0"
-            : "+m" (xl->spinners) : : "memory");
+        inc_spinners(xl);
 
         return prev;
 }
@@ -176,8 +192,7 @@ static inline struct xen_spinlock *spinning_lock(struct xen_spinlock *xl)
  */
 static inline void unspinning_lock(struct xen_spinlock *xl, struct xen_spinlock *prev)
 {
-        asm(LOCK_PREFIX " decw %0"
-            : "+m" (xl->spinners) : : "memory");
+        dec_spinners(xl);
         wmb();                  /* decrement count before restoring lock */
         __this_cpu_write(lock_spinners, prev);
 }
@@ -373,6 +388,8 @@ void xen_uninit_lock_cpu(int cpu)
 
 void __init xen_init_spinlocks(void)
 {
+        BUILD_BUG_ON(sizeof(struct xen_spinlock) > sizeof(arch_spinlock_t));
+
         pv_lock_ops.spin_is_locked = xen_spin_is_locked;
         pv_lock_ops.spin_is_contended = xen_spin_is_contended;
         pv_lock_ops.spin_lock = xen_spin_lock;