3 files changed, 9 insertions, 4 deletions

diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index fbaf426d2daa..17b22e9cc2aa 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -554,7 +554,7 @@
                 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
                 clocks = <&clock CLK_PWM>;
                 clock-names = "timers";
-                #pwm-cells = <2>;
+                #pwm-cells = <3>;
                 status = "disabled";
         };
 
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index f38cf7c110cc..95cad252eb1b 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -297,7 +297,7 @@ static void __init exynos_dt_machine_init(void)
          * This is called from smp_prepare_cpus if we've built for SMP, but
          * we still need to set it up for PM and firmware ops if not.
          */
-        if (!IS_ENABLED(SMP))
+        if (!IS_ENABLED(CONFIG_SMP))
                 exynos_sysram_init();
 
         exynos_cpuidle_init();
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index eb91d2350f8c..e8797bb78871 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -57,8 +57,13 @@ static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
 
         boot_reg = sysram_ns_base_addr + 0x1c;
 
-        if (!soc_is_exynos4212() && !soc_is_exynos3250())
-                boot_reg += 4*cpu;
+        /*
+         * Almost all Exynos-series of SoCs that run in secure mode don't need
+         * additional offset for every CPU, with Exynos4412 being the only
+         * exception.
+         */
+        if (soc_is_exynos4412())
+                boot_reg += 4 * cpu;
 
         __raw_writel(boot_addr, boot_reg);
         return 0;