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-rw-r--r--arch/arm/boot/dts/am43x-epos-evm.dts4
-rw-r--r--arch/arm/boot/dts/dra7.dtsi12
-rw-r--r--arch/arm/boot/dts/dra7xx-clocks.dtsi16
-rw-r--r--arch/arm/boot/dts/omap3-beagle-xm.dts6
-rw-r--r--arch/arm/boot/dts/omap3-evm-common.dtsi7
-rw-r--r--arch/arm/boot/dts/omap3-n900.dts5
-rw-r--r--arch/arm/boot/dts/omap5.dtsi1
-rw-r--r--arch/arm/configs/bcm_defconfig2
-rw-r--r--arch/arm/configs/multi_v7_defconfig3
-rw-r--r--arch/arm/mach-mvebu/Makefile2
-rw-r--r--arch/arm/mach-mvebu/board-v7.c29
-rw-r--r--arch/arm/mach-mvebu/pmsu.c9
-rw-r--r--arch/arm/mach-mvebu/pmsu_ll.S25
-rw-r--r--arch/arm/mach-omap2/Makefile6
-rw-r--r--arch/arm/mach-omap2/cm33xx.h2
-rw-r--r--arch/arm/mach-omap2/common.h1
-rw-r--r--arch/arm/mach-omap2/id.c12
-rw-r--r--arch/arm/mach-omap2/mux.c6
-rw-r--r--arch/arm/mach-omap2/omap4-common.c20
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c6
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_54xx_data.c73
-rw-r--r--arch/arm/mach-omap2/soc.h1
-rw-r--r--arch/arm/mach-sunxi/sunxi.c77
-rw-r--r--arch/arm64/include/asm/pgtable.h2
-rw-r--r--arch/arm64/include/asm/ptrace.h4
-rw-r--r--arch/arm64/kernel/efi-entry.S3
-rw-r--r--arch/arm64/kernel/head.S3
-rw-r--r--arch/arm64/mm/flush.c3
-rw-r--r--arch/mips/kvm/kvm_mips.c1
-rw-r--r--arch/s390/include/uapi/asm/Kbuild1
-rw-r--r--arch/s390/include/uapi/asm/sie.h26
-rw-r--r--arch/x86/include/asm/kvm_host.h4
-rw-r--r--arch/x86/include/asm/ptrace.h16
-rw-r--r--arch/x86/kvm/svm.c1
-rw-r--r--arch/x86/kvm/x86.c2
35 files changed, 309 insertions, 82 deletions
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index 19f1f7e87597..90098f98a5c8 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -319,6 +319,10 @@
319 phy-mode = "rmii"; 319 phy-mode = "rmii";
320}; 320};
321 321
322&phy_sel {
323 rmii-clock-ext;
324};
325
322&i2c0 { 326&i2c0 {
323 status = "okay"; 327 status = "okay";
324 pinctrl-names = "default"; 328 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index c29945e07c5a..80127638b379 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -773,7 +773,6 @@
773 clocks = <&qspi_gfclk_div>; 773 clocks = <&qspi_gfclk_div>;
774 clock-names = "fck"; 774 clock-names = "fck";
775 num-cs = <4>; 775 num-cs = <4>;
776 interrupts = <0 343 0x4>;
777 status = "disabled"; 776 status = "disabled";
778 }; 777 };
779 778
@@ -984,6 +983,17 @@
984 #size-cells = <1>; 983 #size-cells = <1>;
985 status = "disabled"; 984 status = "disabled";
986 }; 985 };
986
987 atl: atl@4843c000 {
988 compatible = "ti,dra7-atl";
989 reg = <0x4843c000 0x3ff>;
990 ti,hwmods = "atl";
991 ti,provided-clocks = <&atl_clkin0_ck>, <&atl_clkin1_ck>,
992 <&atl_clkin2_ck>, <&atl_clkin3_ck>;
993 clocks = <&atl_gfclk_mux>;
994 clock-names = "fck";
995 status = "disabled";
996 };
987 }; 997 };
988}; 998};
989 999
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index b03cfe49d22b..c90c76de84d6 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -10,26 +10,26 @@
10&cm_core_aon_clocks { 10&cm_core_aon_clocks {
11 atl_clkin0_ck: atl_clkin0_ck { 11 atl_clkin0_ck: atl_clkin0_ck {
12 #clock-cells = <0>; 12 #clock-cells = <0>;
13 compatible = "fixed-clock"; 13 compatible = "ti,dra7-atl-clock";
14 clock-frequency = <0>; 14 clocks = <&atl_gfclk_mux>;
15 }; 15 };
16 16
17 atl_clkin1_ck: atl_clkin1_ck { 17 atl_clkin1_ck: atl_clkin1_ck {
18 #clock-cells = <0>; 18 #clock-cells = <0>;
19 compatible = "fixed-clock"; 19 compatible = "ti,dra7-atl-clock";
20 clock-frequency = <0>; 20 clocks = <&atl_gfclk_mux>;
21 }; 21 };
22 22
23 atl_clkin2_ck: atl_clkin2_ck { 23 atl_clkin2_ck: atl_clkin2_ck {
24 #clock-cells = <0>; 24 #clock-cells = <0>;
25 compatible = "fixed-clock"; 25 compatible = "ti,dra7-atl-clock";
26 clock-frequency = <0>; 26 clocks = <&atl_gfclk_mux>;
27 }; 27 };
28 28
29 atl_clkin3_ck: atl_clkin3_ck { 29 atl_clkin3_ck: atl_clkin3_ck {
30 #clock-cells = <0>; 30 #clock-cells = <0>;
31 compatible = "fixed-clock"; 31 compatible = "ti,dra7-atl-clock";
32 clock-frequency = <0>; 32 clocks = <&atl_gfclk_mux>;
33 }; 33 };
34 34
35 hdmi_clkin_ck: hdmi_clkin_ck { 35 hdmi_clkin_ck: hdmi_clkin_ck {
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index cf0be662297e..1becefce821b 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -251,6 +251,11 @@
251 codec { 251 codec {
252 }; 252 };
253 }; 253 };
254
255 twl_power: power {
256 compatible = "ti,twl4030-power-beagleboard-xm", "ti,twl4030-power-idle-osc-off";
257 ti,use_poweroff;
258 };
254 }; 259 };
255}; 260};
256 261
@@ -301,6 +306,7 @@
301}; 306};
302 307
303&uart3 { 308&uart3 {
309 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
304 pinctrl-names = "default"; 310 pinctrl-names = "default";
305 pinctrl-0 = <&uart3_pins>; 311 pinctrl-0 = <&uart3_pins>;
306}; 312};
diff --git a/arch/arm/boot/dts/omap3-evm-common.dtsi b/arch/arm/boot/dts/omap3-evm-common.dtsi
index 8ae8f007c8ad..c8747c7f1cc8 100644
--- a/arch/arm/boot/dts/omap3-evm-common.dtsi
+++ b/arch/arm/boot/dts/omap3-evm-common.dtsi
@@ -50,6 +50,13 @@
50 gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>; 50 gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>;
51}; 51};
52 52
53&twl {
54 twl_power: power {
55 compatible = "ti,twl4030-power-omap3-evm", "ti,twl4030-power-idle";
56 ti,use_poweroff;
57 };
58};
59
53&i2c2 { 60&i2c2 {
54 clock-frequency = <400000>; 61 clock-frequency = <400000>;
55}; 62};
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index ae8ae3f4f9bf..1fe45d1f75ec 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -351,6 +351,11 @@
351 compatible = "ti,twl4030-audio"; 351 compatible = "ti,twl4030-audio";
352 ti,enable-vibra = <1>; 352 ti,enable-vibra = <1>;
353 }; 353 };
354
355 twl_power: power {
356 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
357 ti,use_poweroff;
358 };
354}; 359};
355 360
356&twl_keypad { 361&twl_keypad {
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 3bfda16c8b52..a4ed54988866 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -45,7 +45,6 @@
45 45
46 operating-points = < 46 operating-points = <
47 /* kHz uV */ 47 /* kHz uV */
48 500000 880000
49 1000000 1060000 48 1000000 1060000
50 1500000 1250000 49 1500000 1250000
51 >; 50 >;
diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs/bcm_defconfig
index 9d13dae99125..4bf72264b175 100644
--- a/arch/arm/configs/bcm_defconfig
+++ b/arch/arm/configs/bcm_defconfig
@@ -94,10 +94,10 @@ CONFIG_BACKLIGHT_CLASS_DEVICE=y
94CONFIG_BACKLIGHT_PWM=y 94CONFIG_BACKLIGHT_PWM=y
95# CONFIG_USB_SUPPORT is not set 95# CONFIG_USB_SUPPORT is not set
96CONFIG_MMC=y 96CONFIG_MMC=y
97CONFIG_MMC_UNSAFE_RESUME=y
98CONFIG_MMC_BLOCK_MINORS=32 97CONFIG_MMC_BLOCK_MINORS=32
99CONFIG_MMC_TEST=y 98CONFIG_MMC_TEST=y
100CONFIG_MMC_SDHCI=y 99CONFIG_MMC_SDHCI=y
100CONFIG_MMC_SDHCI_PLTFM=y
101CONFIG_MMC_SDHCI_BCM_KONA=y 101CONFIG_MMC_SDHCI_BCM_KONA=y
102CONFIG_NEW_LEDS=y 102CONFIG_NEW_LEDS=y
103CONFIG_LEDS_CLASS=y 103CONFIG_LEDS_CLASS=y
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index be1a3455a9fe..534836497998 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -223,12 +223,12 @@ CONFIG_POWER_RESET_GPIO=y
223CONFIG_POWER_RESET_SUN6I=y 223CONFIG_POWER_RESET_SUN6I=y
224CONFIG_SENSORS_LM90=y 224CONFIG_SENSORS_LM90=y
225CONFIG_THERMAL=y 225CONFIG_THERMAL=y
226CONFIG_DOVE_THERMAL=y
227CONFIG_ARMADA_THERMAL=y 226CONFIG_ARMADA_THERMAL=y
228CONFIG_WATCHDOG=y 227CONFIG_WATCHDOG=y
229CONFIG_ORION_WATCHDOG=y 228CONFIG_ORION_WATCHDOG=y
230CONFIG_SUNXI_WATCHDOG=y 229CONFIG_SUNXI_WATCHDOG=y
231CONFIG_MFD_AS3722=y 230CONFIG_MFD_AS3722=y
231CONFIG_MFD_BCM590XX=y
232CONFIG_MFD_CROS_EC=y 232CONFIG_MFD_CROS_EC=y
233CONFIG_MFD_CROS_EC_SPI=y 233CONFIG_MFD_CROS_EC_SPI=y
234CONFIG_MFD_MAX8907=y 234CONFIG_MFD_MAX8907=y
@@ -240,6 +240,7 @@ CONFIG_MFD_TPS65910=y
240CONFIG_REGULATOR_VIRTUAL_CONSUMER=y 240CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
241CONFIG_REGULATOR_AB8500=y 241CONFIG_REGULATOR_AB8500=y
242CONFIG_REGULATOR_AS3722=y 242CONFIG_REGULATOR_AS3722=y
243CONFIG_REGULATOR_BCM590XX=y
243CONFIG_REGULATOR_GPIO=y 244CONFIG_REGULATOR_GPIO=y
244CONFIG_REGULATOR_MAX8907=y 245CONFIG_REGULATOR_MAX8907=y
245CONFIG_REGULATOR_PALMAS=y 246CONFIG_REGULATOR_PALMAS=y
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index 2ecb828e4a8b..1636cdbef01a 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -7,7 +7,7 @@ CFLAGS_pmsu.o := -march=armv7-a
7obj-y += system-controller.o mvebu-soc-id.o 7obj-y += system-controller.o mvebu-soc-id.o
8 8
9ifeq ($(CONFIG_MACH_MVEBU_V7),y) 9ifeq ($(CONFIG_MACH_MVEBU_V7),y)
10obj-y += cpu-reset.o board-v7.o coherency.o coherency_ll.o pmsu.o 10obj-y += cpu-reset.o board-v7.o coherency.o coherency_ll.o pmsu.o pmsu_ll.o
11obj-$(CONFIG_SMP) += platsmp.o headsmp.o platsmp-a9.o headsmp-a9.o 11obj-$(CONFIG_SMP) += platsmp.o headsmp.o platsmp-a9.o headsmp-a9.o
12obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 12obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
13endif 13endif
diff --git a/arch/arm/mach-mvebu/board-v7.c b/arch/arm/mach-mvebu/board-v7.c
index 8bb742fdf5ca..b2524d689f21 100644
--- a/arch/arm/mach-mvebu/board-v7.c
+++ b/arch/arm/mach-mvebu/board-v7.c
@@ -23,6 +23,7 @@
23#include <linux/mbus.h> 23#include <linux/mbus.h>
24#include <linux/signal.h> 24#include <linux/signal.h>
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include <linux/irqchip.h>
26#include <asm/hardware/cache-l2x0.h> 27#include <asm/hardware/cache-l2x0.h>
27#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
28#include <asm/mach/map.h> 29#include <asm/mach/map.h>
@@ -71,17 +72,23 @@ static int armada_375_external_abort_wa(unsigned long addr, unsigned int fsr,
71 return 1; 72 return 1;
72} 73}
73 74
74static void __init mvebu_timer_and_clk_init(void) 75static void __init mvebu_init_irq(void)
75{ 76{
76 of_clk_init(NULL); 77 irqchip_init();
77 clocksource_of_init();
78 mvebu_scu_enable(); 78 mvebu_scu_enable();
79 coherency_init(); 79 coherency_init();
80 BUG_ON(mvebu_mbus_dt_init(coherency_available())); 80 BUG_ON(mvebu_mbus_dt_init(coherency_available()));
81}
82
83static void __init external_abort_quirk(void)
84{
85 u32 dev, rev;
81 86
82 if (of_machine_is_compatible("marvell,armada375")) 87 if (mvebu_get_soc_id(&dev, &rev) == 0 && rev > ARMADA_375_Z1_REV)
83 hook_fault_code(16 + 6, armada_375_external_abort_wa, SIGBUS, 0, 88 return;
84 "imprecise external abort"); 89
90 hook_fault_code(16 + 6, armada_375_external_abort_wa, SIGBUS, 0,
91 "imprecise external abort");
85} 92}
86 93
87static void __init i2c_quirk(void) 94static void __init i2c_quirk(void)
@@ -169,8 +176,10 @@ static void __init mvebu_dt_init(void)
169{ 176{
170 if (of_machine_is_compatible("plathome,openblocks-ax3-4")) 177 if (of_machine_is_compatible("plathome,openblocks-ax3-4"))
171 i2c_quirk(); 178 i2c_quirk();
172 if (of_machine_is_compatible("marvell,a375-db")) 179 if (of_machine_is_compatible("marvell,a375-db")) {
180 external_abort_quirk();
173 thermal_quirk(); 181 thermal_quirk();
182 }
174 183
175 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 184 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
176} 185}
@@ -185,7 +194,7 @@ DT_MACHINE_START(ARMADA_370_XP_DT, "Marvell Armada 370/XP (Device Tree)")
185 .l2c_aux_mask = ~0, 194 .l2c_aux_mask = ~0,
186 .smp = smp_ops(armada_xp_smp_ops), 195 .smp = smp_ops(armada_xp_smp_ops),
187 .init_machine = mvebu_dt_init, 196 .init_machine = mvebu_dt_init,
188 .init_time = mvebu_timer_and_clk_init, 197 .init_irq = mvebu_init_irq,
189 .restart = mvebu_restart, 198 .restart = mvebu_restart,
190 .dt_compat = armada_370_xp_dt_compat, 199 .dt_compat = armada_370_xp_dt_compat,
191MACHINE_END 200MACHINE_END
@@ -198,7 +207,7 @@ static const char * const armada_375_dt_compat[] = {
198DT_MACHINE_START(ARMADA_375_DT, "Marvell Armada 375 (Device Tree)") 207DT_MACHINE_START(ARMADA_375_DT, "Marvell Armada 375 (Device Tree)")
199 .l2c_aux_val = 0, 208 .l2c_aux_val = 0,
200 .l2c_aux_mask = ~0, 209 .l2c_aux_mask = ~0,
201 .init_time = mvebu_timer_and_clk_init, 210 .init_irq = mvebu_init_irq,
202 .init_machine = mvebu_dt_init, 211 .init_machine = mvebu_dt_init,
203 .restart = mvebu_restart, 212 .restart = mvebu_restart,
204 .dt_compat = armada_375_dt_compat, 213 .dt_compat = armada_375_dt_compat,
@@ -213,7 +222,7 @@ static const char * const armada_38x_dt_compat[] = {
213DT_MACHINE_START(ARMADA_38X_DT, "Marvell Armada 380/385 (Device Tree)") 222DT_MACHINE_START(ARMADA_38X_DT, "Marvell Armada 380/385 (Device Tree)")
214 .l2c_aux_val = 0, 223 .l2c_aux_val = 0,
215 .l2c_aux_mask = ~0, 224 .l2c_aux_mask = ~0,
216 .init_time = mvebu_timer_and_clk_init, 225 .init_irq = mvebu_init_irq,
217 .restart = mvebu_restart, 226 .restart = mvebu_restart,
218 .dt_compat = armada_38x_dt_compat, 227 .dt_compat = armada_38x_dt_compat,
219MACHINE_END 228MACHINE_END
diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c
index 53a55c8520bf..a1d407c0febe 100644
--- a/arch/arm/mach-mvebu/pmsu.c
+++ b/arch/arm/mach-mvebu/pmsu.c
@@ -66,6 +66,8 @@ static void __iomem *pmsu_mp_base;
66extern void ll_disable_coherency(void); 66extern void ll_disable_coherency(void);
67extern void ll_enable_coherency(void); 67extern void ll_enable_coherency(void);
68 68
69extern void armada_370_xp_cpu_resume(void);
70
69static struct platform_device armada_xp_cpuidle_device = { 71static struct platform_device armada_xp_cpuidle_device = {
70 .name = "cpuidle-armada-370-xp", 72 .name = "cpuidle-armada-370-xp",
71}; 73};
@@ -140,13 +142,6 @@ static void armada_370_xp_pmsu_enable_l2_powerdown_onidle(void)
140 writel(reg, pmsu_mp_base + L2C_NFABRIC_PM_CTL); 142 writel(reg, pmsu_mp_base + L2C_NFABRIC_PM_CTL);
141} 143}
142 144
143static void armada_370_xp_cpu_resume(void)
144{
145 asm volatile("bl ll_add_cpu_to_smp_group\n\t"
146 "bl ll_enable_coherency\n\t"
147 "b cpu_resume\n\t");
148}
149
150/* No locking is needed because we only access per-CPU registers */ 145/* No locking is needed because we only access per-CPU registers */
151void armada_370_xp_pmsu_idle_prepare(bool deepidle) 146void armada_370_xp_pmsu_idle_prepare(bool deepidle)
152{ 147{
diff --git a/arch/arm/mach-mvebu/pmsu_ll.S b/arch/arm/mach-mvebu/pmsu_ll.S
new file mode 100644
index 000000000000..fc3de68d8c54
--- /dev/null
+++ b/arch/arm/mach-mvebu/pmsu_ll.S
@@ -0,0 +1,25 @@
1/*
2 * Copyright (C) 2014 Marvell
3 *
4 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
5 * Gregory Clement <gregory.clement@free-electrons.com>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#include <linux/linkage.h>
13#include <asm/assembler.h>
14
15/*
16 * This is the entry point through which CPUs exiting cpuidle deep
17 * idle state are going.
18 */
19ENTRY(armada_370_xp_cpu_resume)
20ARM_BE8(setend be ) @ go BE8 if entered LE
21 bl ll_add_cpu_to_smp_group
22 bl ll_enable_coherency
23 b cpu_resume
24ENDPROC(armada_370_xp_cpu_resume)
25
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 8421f38cf445..8ca99e9321e3 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -110,14 +110,16 @@ obj-y += prm_common.o cm_common.o
110obj-$(CONFIG_ARCH_OMAP2) += prm2xxx_3xxx.o prm2xxx.o cm2xxx.o 110obj-$(CONFIG_ARCH_OMAP2) += prm2xxx_3xxx.o prm2xxx.o cm2xxx.o
111obj-$(CONFIG_ARCH_OMAP3) += prm2xxx_3xxx.o prm3xxx.o cm3xxx.o 111obj-$(CONFIG_ARCH_OMAP3) += prm2xxx_3xxx.o prm3xxx.o cm3xxx.o
112obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o 112obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o
113obj-$(CONFIG_SOC_AM33XX) += prm33xx.o cm33xx.o
114omap-prcm-4-5-common = cminst44xx.o cm44xx.o prm44xx.o \ 113omap-prcm-4-5-common = cminst44xx.o cm44xx.o prm44xx.o \
115 prcm_mpu44xx.o prminst44xx.o \ 114 prcm_mpu44xx.o prminst44xx.o \
116 vc44xx_data.o vp44xx_data.o 115 vc44xx_data.o vp44xx_data.o
117obj-$(CONFIG_ARCH_OMAP4) += $(omap-prcm-4-5-common) 116obj-$(CONFIG_ARCH_OMAP4) += $(omap-prcm-4-5-common)
118obj-$(CONFIG_SOC_OMAP5) += $(omap-prcm-4-5-common) 117obj-$(CONFIG_SOC_OMAP5) += $(omap-prcm-4-5-common)
119obj-$(CONFIG_SOC_DRA7XX) += $(omap-prcm-4-5-common) 118obj-$(CONFIG_SOC_DRA7XX) += $(omap-prcm-4-5-common)
120obj-$(CONFIG_SOC_AM43XX) += $(omap-prcm-4-5-common) 119am33xx-43xx-prcm-common += prm33xx.o cm33xx.o
120obj-$(CONFIG_SOC_AM33XX) += $(am33xx-43xx-prcm-common)
121obj-$(CONFIG_SOC_AM43XX) += $(omap-prcm-4-5-common) \
122 $(am33xx-43xx-prcm-common)
121 123
122# OMAP voltage domains 124# OMAP voltage domains
123voltagedomain-common := voltage.o vc.o vp.o 125voltagedomain-common := voltage.o vc.o vp.o
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 15a778ce7707..bd2441790779 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -380,7 +380,7 @@ void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs);
380void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs); 380void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs);
381void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs); 381void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);
382 382
383#ifdef CONFIG_SOC_AM33XX 383#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
384extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs, 384extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs,
385 u16 clkctrl_offs); 385 u16 clkctrl_offs);
386extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs, 386extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index a373d508799a..b2d252bf4a53 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -248,7 +248,6 @@ static inline void __iomem *omap4_get_scu_base(void)
248} 248}
249#endif 249#endif
250 250
251extern void __init gic_init_irq(void);
252extern void gic_dist_disable(void); 251extern void gic_dist_disable(void);
253extern void gic_dist_enable(void); 252extern void gic_dist_enable(void);
254extern bool gic_dist_disabled(void); 253extern bool gic_dist_disabled(void);
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 43969da5d50b..d42022f2a71e 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -649,6 +649,18 @@ void __init dra7xxx_check_revision(void)
649 } 649 }
650 break; 650 break;
651 651
652 case 0xb9bc:
653 switch (rev) {
654 case 0:
655 omap_revision = DRA722_REV_ES1_0;
656 break;
657 default:
658 /* If we have no new revisions */
659 omap_revision = DRA722_REV_ES1_0;
660 break;
661 }
662 break;
663
652 default: 664 default:
653 /* Unknown default to latest silicon rev as default*/ 665 /* Unknown default to latest silicon rev as default*/
654 pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%d)\n", 666 pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%d)\n",
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index fd88edeb027f..f62f7537d899 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -183,8 +183,10 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition,
183 m0_entry = mux->muxnames[0]; 183 m0_entry = mux->muxnames[0];
184 184
185 /* First check for full name in mode0.muxmode format */ 185 /* First check for full name in mode0.muxmode format */
186 if (mode0_len && strncmp(muxname, m0_entry, mode0_len)) 186 if (mode0_len)
187 continue; 187 if (strncmp(muxname, m0_entry, mode0_len) ||
188 (strlen(m0_entry) != mode0_len))
189 continue;
188 190
189 /* Then check for muxmode only */ 191 /* Then check for muxmode only */
190 for (i = 0; i < OMAP_MUX_NR_MODES; i++) { 192 for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 326cd982a3cb..539e8106eb96 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -102,26 +102,6 @@ void __init omap_barriers_init(void)
102{} 102{}
103#endif 103#endif
104 104
105void __init gic_init_irq(void)
106{
107 void __iomem *omap_irq_base;
108
109 /* Static mapping, never released */
110 gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
111 BUG_ON(!gic_dist_base_addr);
112
113 twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_4K);
114 BUG_ON(!twd_base);
115
116 /* Static mapping, never released */
117 omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
118 BUG_ON(!omap_irq_base);
119
120 omap_wakeupgen_init();
121
122 gic_init(0, 29, gic_dist_base_addr, omap_irq_base);
123}
124
125void gic_dist_disable(void) 105void gic_dist_disable(void)
126{ 106{
127 if (gic_dist_base_addr) 107 if (gic_dist_base_addr)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index f7bb435bb543..6c074f37cdd2 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -4251,9 +4251,9 @@ void __init omap_hwmod_init(void)
4251 soc_ops.enable_module = _omap4_enable_module; 4251 soc_ops.enable_module = _omap4_enable_module;
4252 soc_ops.disable_module = _omap4_disable_module; 4252 soc_ops.disable_module = _omap4_disable_module;
4253 soc_ops.wait_target_ready = _omap4_wait_target_ready; 4253 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4254 soc_ops.assert_hardreset = _omap4_assert_hardreset; 4254 soc_ops.assert_hardreset = _am33xx_assert_hardreset;
4255 soc_ops.deassert_hardreset = _omap4_deassert_hardreset; 4255 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4256 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; 4256 soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
4257 soc_ops.init_clkdm = _init_clkdm; 4257 soc_ops.init_clkdm = _init_clkdm;
4258 } else if (soc_is_am33xx()) { 4258 } else if (soc_is_am33xx()) {
4259 soc_ops.enable_module = _am33xx_enable_module; 4259 soc_ops.enable_module = _am33xx_enable_module;
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index 290213f2cbe3..1103aa0e0d29 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -2020,6 +2020,77 @@ static struct omap_hwmod omap54xx_wd_timer2_hwmod = {
2020 }, 2020 },
2021}; 2021};
2022 2022
2023/*
2024 * 'ocp2scp' class
2025 * bridge to transform ocp interface protocol to scp (serial control port)
2026 * protocol
2027 */
2028/* ocp2scp3 */
2029static struct omap_hwmod omap54xx_ocp2scp3_hwmod;
2030/* l4_cfg -> ocp2scp3 */
2031static struct omap_hwmod_ocp_if omap54xx_l4_cfg__ocp2scp3 = {
2032 .master = &omap54xx_l4_cfg_hwmod,
2033 .slave = &omap54xx_ocp2scp3_hwmod,
2034 .clk = "l4_root_clk_div",
2035 .user = OCP_USER_MPU | OCP_USER_SDMA,
2036};
2037
2038static struct omap_hwmod omap54xx_ocp2scp3_hwmod = {
2039 .name = "ocp2scp3",
2040 .class = &omap54xx_ocp2scp_hwmod_class,
2041 .clkdm_name = "l3init_clkdm",
2042 .prcm = {
2043 .omap4 = {
2044 .clkctrl_offs = OMAP54XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
2045 .context_offs = OMAP54XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
2046 .modulemode = MODULEMODE_HWCTRL,
2047 },
2048 },
2049};
2050
2051/*
2052 * 'sata' class
2053 * sata: serial ata interface gen2 compliant ( 1 rx/ 1 tx)
2054 */
2055
2056static struct omap_hwmod_class_sysconfig omap54xx_sata_sysc = {
2057 .sysc_offs = 0x0000,
2058 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
2059 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
2060 SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
2061 MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
2062 .sysc_fields = &omap_hwmod_sysc_type2,
2063};
2064
2065static struct omap_hwmod_class omap54xx_sata_hwmod_class = {
2066 .name = "sata",
2067 .sysc = &omap54xx_sata_sysc,
2068};
2069
2070/* sata */
2071static struct omap_hwmod omap54xx_sata_hwmod = {
2072 .name = "sata",
2073 .class = &omap54xx_sata_hwmod_class,
2074 .clkdm_name = "l3init_clkdm",
2075 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
2076 .main_clk = "func_48m_fclk",
2077 .mpu_rt_idx = 1,
2078 .prcm = {
2079 .omap4 = {
2080 .clkctrl_offs = OMAP54XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
2081 .context_offs = OMAP54XX_RM_L3INIT_SATA_CONTEXT_OFFSET,
2082 .modulemode = MODULEMODE_SWCTRL,
2083 },
2084 },
2085};
2086
2087/* l4_cfg -> sata */
2088static struct omap_hwmod_ocp_if omap54xx_l4_cfg__sata = {
2089 .master = &omap54xx_l4_cfg_hwmod,
2090 .slave = &omap54xx_sata_hwmod,
2091 .clk = "l3_iclk_div",
2092 .user = OCP_USER_MPU | OCP_USER_SDMA,
2093};
2023 2094
2024/* 2095/*
2025 * Interfaces 2096 * Interfaces
@@ -2765,6 +2836,8 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
2765 &omap54xx_l4_cfg__usb_tll_hs, 2836 &omap54xx_l4_cfg__usb_tll_hs,
2766 &omap54xx_l4_cfg__usb_otg_ss, 2837 &omap54xx_l4_cfg__usb_otg_ss,
2767 &omap54xx_l4_wkup__wd_timer2, 2838 &omap54xx_l4_wkup__wd_timer2,
2839 &omap54xx_l4_cfg__ocp2scp3,
2840 &omap54xx_l4_cfg__sata,
2768 NULL, 2841 NULL,
2769}; 2842};
2770 2843
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index de2a34c423a7..01ca8086fb6c 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -462,6 +462,7 @@ IS_OMAP_TYPE(3430, 0x3430)
462#define DRA7XX_CLASS 0x07000000 462#define DRA7XX_CLASS 0x07000000
463#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8)) 463#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8))
464#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8)) 464#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
465#define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
465 466
466void omap2xxx_check_revision(void); 467void omap2xxx_check_revision(void);
467void omap3xxx_check_revision(void); 468void omap3xxx_check_revision(void);
diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c
index 3f9587bb51f6..b6085084e0ff 100644
--- a/arch/arm/mach-sunxi/sunxi.c
+++ b/arch/arm/mach-sunxi/sunxi.c
@@ -12,8 +12,81 @@
12 12
13#include <linux/clk-provider.h> 13#include <linux/clk-provider.h>
14#include <linux/clocksource.h> 14#include <linux/clocksource.h>
15#include <linux/delay.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/of_address.h>
19#include <linux/of_irq.h>
20#include <linux/of_platform.h>
21#include <linux/io.h>
22#include <linux/reboot.h>
15 23
16#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/mach/map.h>
26#include <asm/system_misc.h>
27
28#define SUN4I_WATCHDOG_CTRL_REG 0x00
29#define SUN4I_WATCHDOG_CTRL_RESTART BIT(0)
30#define SUN4I_WATCHDOG_MODE_REG 0x04
31#define SUN4I_WATCHDOG_MODE_ENABLE BIT(0)
32#define SUN4I_WATCHDOG_MODE_RESET_ENABLE BIT(1)
33
34#define SUN6I_WATCHDOG1_IRQ_REG 0x00
35#define SUN6I_WATCHDOG1_CTRL_REG 0x10
36#define SUN6I_WATCHDOG1_CTRL_RESTART BIT(0)
37#define SUN6I_WATCHDOG1_CONFIG_REG 0x14
38#define SUN6I_WATCHDOG1_CONFIG_RESTART BIT(0)
39#define SUN6I_WATCHDOG1_CONFIG_IRQ BIT(1)
40#define SUN6I_WATCHDOG1_MODE_REG 0x18
41#define SUN6I_WATCHDOG1_MODE_ENABLE BIT(0)
42
43static void __iomem *wdt_base;
44
45static void sun4i_restart(enum reboot_mode mode, const char *cmd)
46{
47 if (!wdt_base)
48 return;
49
50 /* Enable timer and set reset bit in the watchdog */
51 writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
52 wdt_base + SUN4I_WATCHDOG_MODE_REG);
53
54 /*
55 * Restart the watchdog. The default (and lowest) interval
56 * value for the watchdog is 0.5s.
57 */
58 writel(SUN4I_WATCHDOG_CTRL_RESTART, wdt_base + SUN4I_WATCHDOG_CTRL_REG);
59
60 while (1) {
61 mdelay(5);
62 writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
63 wdt_base + SUN4I_WATCHDOG_MODE_REG);
64 }
65}
66
67static struct of_device_id sunxi_restart_ids[] = {
68 { .compatible = "allwinner,sun4i-a10-wdt" },
69 { /*sentinel*/ }
70};
71
72static void sunxi_setup_restart(void)
73{
74 struct device_node *np;
75
76 np = of_find_matching_node(NULL, sunxi_restart_ids);
77 if (WARN(!np, "unable to setup watchdog restart"))
78 return;
79
80 wdt_base = of_iomap(np, 0);
81 WARN(!wdt_base, "failed to map watchdog base address");
82}
83
84static void __init sunxi_dt_init(void)
85{
86 sunxi_setup_restart();
87
88 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
89}
17 90
18static const char * const sunxi_board_dt_compat[] = { 91static const char * const sunxi_board_dt_compat[] = {
19 "allwinner,sun4i-a10", 92 "allwinner,sun4i-a10",
@@ -23,7 +96,9 @@ static const char * const sunxi_board_dt_compat[] = {
23}; 96};
24 97
25DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)") 98DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
99 .init_machine = sunxi_dt_init,
26 .dt_compat = sunxi_board_dt_compat, 100 .dt_compat = sunxi_board_dt_compat,
101 .restart = sun4i_restart,
27MACHINE_END 102MACHINE_END
28 103
29static const char * const sun6i_board_dt_compat[] = { 104static const char * const sun6i_board_dt_compat[] = {
@@ -51,5 +126,7 @@ static const char * const sun7i_board_dt_compat[] = {
51}; 126};
52 127
53DT_MACHINE_START(SUN7I_DT, "Allwinner sun7i (A20) Family") 128DT_MACHINE_START(SUN7I_DT, "Allwinner sun7i (A20) Family")
129 .init_machine = sunxi_dt_init,
54 .dt_compat = sun7i_board_dt_compat, 130 .dt_compat = sun7i_board_dt_compat,
131 .restart = sun4i_restart,
55MACHINE_END 132MACHINE_END
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index 579702086488..e0ccceb317d9 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -292,7 +292,7 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
292#define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \ 292#define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
293 PMD_TYPE_SECT) 293 PMD_TYPE_SECT)
294 294
295#ifdef ARM64_64K_PAGES 295#ifdef CONFIG_ARM64_64K_PAGES
296#define pud_sect(pud) (0) 296#define pud_sect(pud) (0)
297#else 297#else
298#define pud_sect(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \ 298#define pud_sect(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \
diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
index a429b5940be2..501000fadb6f 100644
--- a/arch/arm64/include/asm/ptrace.h
+++ b/arch/arm64/include/asm/ptrace.h
@@ -21,6 +21,10 @@
21 21
22#include <uapi/asm/ptrace.h> 22#include <uapi/asm/ptrace.h>
23 23
24/* Current Exception Level values, as contained in CurrentEL */
25#define CurrentEL_EL1 (1 << 2)
26#define CurrentEL_EL2 (2 << 2)
27
24/* AArch32-specific ptrace requests */ 28/* AArch32-specific ptrace requests */
25#define COMPAT_PTRACE_GETREGS 12 29#define COMPAT_PTRACE_GETREGS 12
26#define COMPAT_PTRACE_SETREGS 13 30#define COMPAT_PTRACE_SETREGS 13
diff --git a/arch/arm64/kernel/efi-entry.S b/arch/arm64/kernel/efi-entry.S
index 66716c9b9e5f..619b1dd7bcde 100644
--- a/arch/arm64/kernel/efi-entry.S
+++ b/arch/arm64/kernel/efi-entry.S
@@ -78,8 +78,7 @@ ENTRY(efi_stub_entry)
78 78
79 /* Turn off Dcache and MMU */ 79 /* Turn off Dcache and MMU */
80 mrs x0, CurrentEL 80 mrs x0, CurrentEL
81 cmp x0, #PSR_MODE_EL2t 81 cmp x0, #CurrentEL_EL2
82 ccmp x0, #PSR_MODE_EL2h, #0x4, ne
83 b.ne 1f 82 b.ne 1f
84 mrs x0, sctlr_el2 83 mrs x0, sctlr_el2
85 bic x0, x0, #1 << 0 // clear SCTLR.M 84 bic x0, x0, #1 << 0 // clear SCTLR.M
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index a96d3a6a63f6..a2c1195abb7f 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -270,8 +270,7 @@ ENDPROC(stext)
270 */ 270 */
271ENTRY(el2_setup) 271ENTRY(el2_setup)
272 mrs x0, CurrentEL 272 mrs x0, CurrentEL
273 cmp x0, #PSR_MODE_EL2t 273 cmp x0, #CurrentEL_EL2
274 ccmp x0, #PSR_MODE_EL2h, #0x4, ne
275 b.ne 1f 274 b.ne 1f
276 mrs x0, sctlr_el2 275 mrs x0, sctlr_el2
277CPU_BE( orr x0, x0, #(1 << 25) ) // Set the EE bit for EL2 276CPU_BE( orr x0, x0, #(1 << 25) ) // Set the EE bit for EL2
diff --git a/arch/arm64/mm/flush.c b/arch/arm64/mm/flush.c
index e4193e3adc7f..0d64089d28b5 100644
--- a/arch/arm64/mm/flush.c
+++ b/arch/arm64/mm/flush.c
@@ -79,7 +79,8 @@ void __sync_icache_dcache(pte_t pte, unsigned long addr)
79 return; 79 return;
80 80
81 if (!test_and_set_bit(PG_dcache_clean, &page->flags)) { 81 if (!test_and_set_bit(PG_dcache_clean, &page->flags)) {
82 __flush_dcache_area(page_address(page), PAGE_SIZE); 82 __flush_dcache_area(page_address(page),
83 PAGE_SIZE << compound_order(page));
83 __flush_icache_all(); 84 __flush_icache_all();
84 } else if (icache_is_aivivt()) { 85 } else if (icache_is_aivivt()) {
85 __flush_icache_all(); 86 __flush_icache_all();
diff --git a/arch/mips/kvm/kvm_mips.c b/arch/mips/kvm/kvm_mips.c
index cd5e4f568439..f3c56a182fd8 100644
--- a/arch/mips/kvm/kvm_mips.c
+++ b/arch/mips/kvm/kvm_mips.c
@@ -384,6 +384,7 @@ void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
384 384
385 kfree(vcpu->arch.guest_ebase); 385 kfree(vcpu->arch.guest_ebase);
386 kfree(vcpu->arch.kseg0_commpage); 386 kfree(vcpu->arch.kseg0_commpage);
387 kfree(vcpu);
387} 388}
388 389
389void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu) 390void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
diff --git a/arch/s390/include/uapi/asm/Kbuild b/arch/s390/include/uapi/asm/Kbuild
index 6a9a9eb645f5..736637363d31 100644
--- a/arch/s390/include/uapi/asm/Kbuild
+++ b/arch/s390/include/uapi/asm/Kbuild
@@ -36,6 +36,7 @@ header-y += signal.h
36header-y += socket.h 36header-y += socket.h
37header-y += sockios.h 37header-y += sockios.h
38header-y += sclp_ctl.h 38header-y += sclp_ctl.h
39header-y += sie.h
39header-y += stat.h 40header-y += stat.h
40header-y += statfs.h 41header-y += statfs.h
41header-y += swab.h 42header-y += swab.h
diff --git a/arch/s390/include/uapi/asm/sie.h b/arch/s390/include/uapi/asm/sie.h
index 3d97f610198d..5d9cc19462c4 100644
--- a/arch/s390/include/uapi/asm/sie.h
+++ b/arch/s390/include/uapi/asm/sie.h
@@ -1,8 +1,6 @@
1#ifndef _UAPI_ASM_S390_SIE_H 1#ifndef _UAPI_ASM_S390_SIE_H
2#define _UAPI_ASM_S390_SIE_H 2#define _UAPI_ASM_S390_SIE_H
3 3
4#include <asm/sigp.h>
5
6#define diagnose_codes \ 4#define diagnose_codes \
7 { 0x10, "DIAG (0x10) release pages" }, \ 5 { 0x10, "DIAG (0x10) release pages" }, \
8 { 0x44, "DIAG (0x44) time slice end" }, \ 6 { 0x44, "DIAG (0x44) time slice end" }, \
@@ -13,18 +11,18 @@
13 { 0x500, "DIAG (0x500) KVM virtio functions" }, \ 11 { 0x500, "DIAG (0x500) KVM virtio functions" }, \
14 { 0x501, "DIAG (0x501) KVM breakpoint" } 12 { 0x501, "DIAG (0x501) KVM breakpoint" }
15 13
16#define sigp_order_codes \ 14#define sigp_order_codes \
17 { SIGP_SENSE, "SIGP sense" }, \ 15 { 0x01, "SIGP sense" }, \
18 { SIGP_EXTERNAL_CALL, "SIGP external call" }, \ 16 { 0x02, "SIGP external call" }, \
19 { SIGP_EMERGENCY_SIGNAL, "SIGP emergency signal" }, \ 17 { 0x03, "SIGP emergency signal" }, \
20 { SIGP_STOP, "SIGP stop" }, \ 18 { 0x05, "SIGP stop" }, \
21 { SIGP_STOP_AND_STORE_STATUS, "SIGP stop and store status" }, \ 19 { 0x06, "SIGP restart" }, \
22 { SIGP_SET_ARCHITECTURE, "SIGP set architecture" }, \ 20 { 0x09, "SIGP stop and store status" }, \
23 { SIGP_SET_PREFIX, "SIGP set prefix" }, \ 21 { 0x0b, "SIGP initial cpu reset" }, \
24 { SIGP_SENSE_RUNNING, "SIGP sense running" }, \ 22 { 0x0d, "SIGP set prefix" }, \
25 { SIGP_RESTART, "SIGP restart" }, \ 23 { 0x0e, "SIGP store status at address" }, \
26 { SIGP_INITIAL_CPU_RESET, "SIGP initial cpu reset" }, \ 24 { 0x12, "SIGP set architecture" }, \
27 { SIGP_STORE_STATUS_AT_ADDRESS, "SIGP store status at address" } 25 { 0x15, "SIGP sense running" }
28 26
29#define icpt_prog_codes \ 27#define icpt_prog_codes \
30 { 0x0001, "Prog Operation" }, \ 28 { 0x0001, "Prog Operation" }, \
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 49314155b66c..49205d01b9ad 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -95,7 +95,7 @@ static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
95#define KVM_REFILL_PAGES 25 95#define KVM_REFILL_PAGES 25
96#define KVM_MAX_CPUID_ENTRIES 80 96#define KVM_MAX_CPUID_ENTRIES 80
97#define KVM_NR_FIXED_MTRR_REGION 88 97#define KVM_NR_FIXED_MTRR_REGION 88
98#define KVM_NR_VAR_MTRR 8 98#define KVM_NR_VAR_MTRR 10
99 99
100#define ASYNC_PF_PER_VCPU 64 100#define ASYNC_PF_PER_VCPU 64
101 101
@@ -461,7 +461,7 @@ struct kvm_vcpu_arch {
461 bool nmi_injected; /* Trying to inject an NMI this entry */ 461 bool nmi_injected; /* Trying to inject an NMI this entry */
462 462
463 struct mtrr_state_type mtrr_state; 463 struct mtrr_state_type mtrr_state;
464 u32 pat; 464 u64 pat;
465 465
466 unsigned switch_db_regs; 466 unsigned switch_db_regs;
467 unsigned long db[KVM_NR_DB_REGS]; 467 unsigned long db[KVM_NR_DB_REGS];
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
index 14fd6fd75a19..6205f0c434db 100644
--- a/arch/x86/include/asm/ptrace.h
+++ b/arch/x86/include/asm/ptrace.h
@@ -231,6 +231,22 @@ static inline unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
231 231
232#define ARCH_HAS_USER_SINGLE_STEP_INFO 232#define ARCH_HAS_USER_SINGLE_STEP_INFO
233 233
234/*
235 * When hitting ptrace_stop(), we cannot return using SYSRET because
236 * that does not restore the full CPU state, only a minimal set. The
237 * ptracer can change arbitrary register values, which is usually okay
238 * because the usual ptrace stops run off the signal delivery path which
239 * forces IRET; however, ptrace_event() stops happen in arbitrary places
240 * in the kernel and don't force IRET path.
241 *
242 * So force IRET path after a ptrace stop.
243 */
244#define arch_ptrace_stop_needed(code, info) \
245({ \
246 set_thread_flag(TIF_NOTIFY_RESUME); \
247 false; \
248})
249
234struct user_desc; 250struct user_desc;
235extern int do_get_thread_area(struct task_struct *p, int idx, 251extern int do_get_thread_area(struct task_struct *p, int idx,
236 struct user_desc __user *info); 252 struct user_desc __user *info);
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index ec8366c5cfea..b5e994ad0135 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -1462,6 +1462,7 @@ static void svm_get_segment(struct kvm_vcpu *vcpu,
1462 */ 1462 */
1463 if (var->unusable) 1463 if (var->unusable)
1464 var->db = 0; 1464 var->db = 0;
1465 var->dpl = to_svm(vcpu)->vmcb->save.cpl;
1465 break; 1466 break;
1466 } 1467 }
1467} 1468}
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index f32a02578c0d..f6449334ec45 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1898,7 +1898,7 @@ static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1898 if (!(data & HV_X64_MSR_TSC_REFERENCE_ENABLE)) 1898 if (!(data & HV_X64_MSR_TSC_REFERENCE_ENABLE))
1899 break; 1899 break;
1900 gfn = data >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT; 1900 gfn = data >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
1901 if (kvm_write_guest(kvm, data, 1901 if (kvm_write_guest(kvm, gfn << HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT,
1902 &tsc_ref, sizeof(tsc_ref))) 1902 &tsc_ref, sizeof(tsc_ref)))
1903 return 1; 1903 return 1;
1904 mark_page_dirty(kvm, gfn); 1904 mark_page_dirty(kvm, gfn);
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-22 08:57:06 -0500