diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-sa1100/time.c | 24 |
1 files changed, 0 insertions, 24 deletions
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c index 29cb0c1604ab..fdf7b016e7ad 100644 --- a/arch/arm/mach-sa1100/time.c +++ b/arch/arm/mach-sa1100/time.c | |||
@@ -21,25 +21,6 @@ | |||
21 | #define RTC_DEF_DIVIDER (32768 - 1) | 21 | #define RTC_DEF_DIVIDER (32768 - 1) |
22 | #define RTC_DEF_TRIM 0 | 22 | #define RTC_DEF_TRIM 0 |
23 | 23 | ||
24 | static unsigned long __init sa1100_get_rtc_time(void) | ||
25 | { | ||
26 | /* | ||
27 | * According to the manual we should be able to let RTTR be zero | ||
28 | * and then a default divisor for a 32.768KHz clock is used. | ||
29 | * Apparently this doesn't work, at least for my SA1110 rev 5. | ||
30 | * If the clock divider is uninitialized then reset it to the | ||
31 | * default value to get the 1Hz clock. | ||
32 | */ | ||
33 | if (RTTR == 0) { | ||
34 | RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16); | ||
35 | printk(KERN_WARNING "Warning: uninitialized Real Time Clock\n"); | ||
36 | /* The current RTC value probably doesn't make sense either */ | ||
37 | RCNR = 0; | ||
38 | return 0; | ||
39 | } | ||
40 | return RCNR; | ||
41 | } | ||
42 | |||
43 | static int sa1100_set_rtc(void) | 24 | static int sa1100_set_rtc(void) |
44 | { | 25 | { |
45 | unsigned long current_time = xtime.tv_sec; | 26 | unsigned long current_time = xtime.tv_sec; |
@@ -117,15 +98,10 @@ static struct irqaction sa1100_timer_irq = { | |||
117 | 98 | ||
118 | static void __init sa1100_timer_init(void) | 99 | static void __init sa1100_timer_init(void) |
119 | { | 100 | { |
120 | struct timespec tv; | ||
121 | unsigned long flags; | 101 | unsigned long flags; |
122 | 102 | ||
123 | set_rtc = sa1100_set_rtc; | 103 | set_rtc = sa1100_set_rtc; |
124 | 104 | ||
125 | tv.tv_nsec = 0; | ||
126 | tv.tv_sec = sa1100_get_rtc_time(); | ||
127 | do_settimeofday(&tv); | ||
128 | |||
129 | OIER = 0; /* disable any timer interrupts */ | 105 | OIER = 0; /* disable any timer interrupts */ |
130 | OSSR = 0xf; /* clear status on all timers */ | 106 | OSSR = 0xf; /* clear status on all timers */ |
131 | setup_irq(IRQ_OST0, &sa1100_timer_irq); | 107 | setup_irq(IRQ_OST0, &sa1100_timer_irq); |