diff options
Diffstat (limited to 'arch')
29 files changed, 116 insertions, 65 deletions
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 03e37af315d7..0453dcc757b4 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
@@ -839,8 +839,11 @@ static int __init topology_init(void) | |||
839 | { | 839 | { |
840 | int cpu; | 840 | int cpu; |
841 | 841 | ||
842 | for_each_possible_cpu(cpu) | 842 | for_each_possible_cpu(cpu) { |
843 | register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu); | 843 | struct cpuinfo_arm *cpuinfo = &per_cpu(cpu_data, cpu); |
844 | cpuinfo->cpu.hotpluggable = 1; | ||
845 | register_cpu(&cpuinfo->cpu, cpu); | ||
846 | } | ||
844 | 847 | ||
845 | return 0; | 848 | return 0; |
846 | } | 849 | } |
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 5f29018a6533..656f0ca52782 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -542,6 +542,8 @@ config QEMU | |||
542 | select SYS_SUPPORTS_LITTLE_ENDIAN | 542 | select SYS_SUPPORTS_LITTLE_ENDIAN |
543 | select ARCH_SPARSEMEM_ENABLE | 543 | select ARCH_SPARSEMEM_ENABLE |
544 | select GENERIC_HARDIRQS_NO__DO_IRQ | 544 | select GENERIC_HARDIRQS_NO__DO_IRQ |
545 | select NR_CPUS_DEFAULT_1 | ||
546 | select SYS_SUPPORTS_SMP | ||
545 | help | 547 | help |
546 | Qemu is a software emulator which among other architectures also | 548 | Qemu is a software emulator which among other architectures also |
547 | can simulate a MIPS32 4Kc system. This patch adds support for the | 549 | can simulate a MIPS32 4Kc system. This patch adds support for the |
@@ -1805,6 +1807,9 @@ config SMP | |||
1805 | config SYS_SUPPORTS_SMP | 1807 | config SYS_SUPPORTS_SMP |
1806 | bool | 1808 | bool |
1807 | 1809 | ||
1810 | config NR_CPUS_DEFAULT_1 | ||
1811 | bool | ||
1812 | |||
1808 | config NR_CPUS_DEFAULT_2 | 1813 | config NR_CPUS_DEFAULT_2 |
1809 | bool | 1814 | bool |
1810 | 1815 | ||
@@ -1825,8 +1830,9 @@ config NR_CPUS_DEFAULT_64 | |||
1825 | 1830 | ||
1826 | config NR_CPUS | 1831 | config NR_CPUS |
1827 | int "Maximum number of CPUs (2-64)" | 1832 | int "Maximum number of CPUs (2-64)" |
1828 | range 2 64 | 1833 | range 1 64 if NR_CPUS_DEFAULT_1 |
1829 | depends on SMP | 1834 | depends on SMP |
1835 | default "1" if NR_CPUS_DEFAULT_1 | ||
1830 | default "2" if NR_CPUS_DEFAULT_2 | 1836 | default "2" if NR_CPUS_DEFAULT_2 |
1831 | default "4" if NR_CPUS_DEFAULT_4 | 1837 | default "4" if NR_CPUS_DEFAULT_4 |
1832 | default "8" if NR_CPUS_DEFAULT_8 | 1838 | default "8" if NR_CPUS_DEFAULT_8 |
@@ -1837,10 +1843,13 @@ config NR_CPUS | |||
1837 | This allows you to specify the maximum number of CPUs which this | 1843 | This allows you to specify the maximum number of CPUs which this |
1838 | kernel will support. The maximum supported value is 32 for 32-bit | 1844 | kernel will support. The maximum supported value is 32 for 32-bit |
1839 | kernel and 64 for 64-bit kernels; the minimum value which makes | 1845 | kernel and 64 for 64-bit kernels; the minimum value which makes |
1840 | sense is 2. | 1846 | sense is 1 for Qemu (useful only for kernel debugging purposes) |
1847 | and 2 for all others. | ||
1841 | 1848 | ||
1842 | This is purely to save memory - each supported CPU adds | 1849 | This is purely to save memory - each supported CPU adds |
1843 | approximately eight kilobytes to the kernel image. | 1850 | approximately eight kilobytes to the kernel image. For best |
1851 | performance should round up your number of processors to the next | ||
1852 | power of two. | ||
1844 | 1853 | ||
1845 | # | 1854 | # |
1846 | # Timer Interrupt Frequency Configuration | 1855 | # Timer Interrupt Frequency Configuration |
diff --git a/arch/mips/ddb5xxx/ddb5477/irq.c b/arch/mips/ddb5xxx/ddb5477/irq.c index 2b23234a5b95..faa4a506bf82 100644 --- a/arch/mips/ddb5xxx/ddb5477/irq.c +++ b/arch/mips/ddb5xxx/ddb5477/irq.c | |||
@@ -194,7 +194,7 @@ static void vrc5477_irq_dispatch(void) | |||
194 | 194 | ||
195 | asmlinkage void plat_irq_dispatch(void) | 195 | asmlinkage void plat_irq_dispatch(void) |
196 | { | 196 | { |
197 | unsigned int pending = read_c0_cause() & read_c0_status(); | 197 | unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM; |
198 | 198 | ||
199 | if (pending & STATUSF_IP7) | 199 | if (pending & STATUSF_IP7) |
200 | do_IRQ(CPU_IRQ_BASE + 7); | 200 | do_IRQ(CPU_IRQ_BASE + 7); |
diff --git a/arch/mips/emma2rh/markeins/irq.c b/arch/mips/emma2rh/markeins/irq.c index e26630026375..6bcf6a06367a 100644 --- a/arch/mips/emma2rh/markeins/irq.c +++ b/arch/mips/emma2rh/markeins/irq.c | |||
@@ -115,7 +115,7 @@ void __init arch_init_irq(void) | |||
115 | 115 | ||
116 | asmlinkage void plat_irq_dispatch(void) | 116 | asmlinkage void plat_irq_dispatch(void) |
117 | { | 117 | { |
118 | unsigned int pending = read_c0_status() & read_c0_cause(); | 118 | unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; |
119 | 119 | ||
120 | if (pending & STATUSF_IP7) | 120 | if (pending & STATUSF_IP7) |
121 | do_IRQ(CPU_IRQ_BASE + 7); | 121 | do_IRQ(CPU_IRQ_BASE + 7); |
diff --git a/arch/mips/gt64120/ev64120/irq.c b/arch/mips/gt64120/ev64120/irq.c index 04572b9c9642..64e4c80b6139 100644 --- a/arch/mips/gt64120/ev64120/irq.c +++ b/arch/mips/gt64120/ev64120/irq.c | |||
@@ -48,7 +48,7 @@ | |||
48 | 48 | ||
49 | asmlinkage void plat_irq_dispatch(void) | 49 | asmlinkage void plat_irq_dispatch(void) |
50 | { | 50 | { |
51 | unsigned int pending = read_c0_status() & read_c0_cause(); | 51 | unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; |
52 | 52 | ||
53 | if (pending & STATUSF_IP4) /* int2 hardware line (timer) */ | 53 | if (pending & STATUSF_IP4) /* int2 hardware line (timer) */ |
54 | do_IRQ(4); | 54 | do_IRQ(4); |
diff --git a/arch/mips/gt64120/wrppmc/irq.c b/arch/mips/gt64120/wrppmc/irq.c index d3d96591780e..06177bf5b1d6 100644 --- a/arch/mips/gt64120/wrppmc/irq.c +++ b/arch/mips/gt64120/wrppmc/irq.c | |||
@@ -32,7 +32,7 @@ | |||
32 | 32 | ||
33 | asmlinkage void plat_irq_dispatch(void) | 33 | asmlinkage void plat_irq_dispatch(void) |
34 | { | 34 | { |
35 | unsigned int pending = read_c0_status() & read_c0_cause(); | 35 | unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; |
36 | 36 | ||
37 | if (pending & STATUSF_IP7) | 37 | if (pending & STATUSF_IP7) |
38 | do_IRQ(WRPPMC_MIPS_TIMER_IRQ); /* CPU Compare/Count internal timer */ | 38 | do_IRQ(WRPPMC_MIPS_TIMER_IRQ); /* CPU Compare/Count internal timer */ |
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c index 295892e4ce53..015cf4bb51dd 100644 --- a/arch/mips/jazz/irq.c +++ b/arch/mips/jazz/irq.c | |||
@@ -122,7 +122,7 @@ static void ll_local_dev(void) | |||
122 | 122 | ||
123 | asmlinkage void plat_irq_dispatch(void) | 123 | asmlinkage void plat_irq_dispatch(void) |
124 | { | 124 | { |
125 | unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM; | 125 | unsigned int pending = read_c0_cause() & read_c0_status(); |
126 | 126 | ||
127 | if (pending & IE_IRQ5) | 127 | if (pending & IE_IRQ5) |
128 | write_c0_compare(0); | 128 | write_c0_compare(0); |
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index aacd4a005c5f..83843a229be7 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S | |||
@@ -181,13 +181,13 @@ NESTED(except_vec_vi, 0, sp) | |||
181 | * during service by SMTC kernel, we also want to | 181 | * during service by SMTC kernel, we also want to |
182 | * pass the IM value to be cleared. | 182 | * pass the IM value to be cleared. |
183 | */ | 183 | */ |
184 | EXPORT(except_vec_vi_mori) | 184 | FEXPORT(except_vec_vi_mori) |
185 | ori a0, $0, 0 | 185 | ori a0, $0, 0 |
186 | #endif /* CONFIG_MIPS_MT_SMTC */ | 186 | #endif /* CONFIG_MIPS_MT_SMTC */ |
187 | EXPORT(except_vec_vi_lui) | 187 | FEXPORT(except_vec_vi_lui) |
188 | lui v0, 0 /* Patched */ | 188 | lui v0, 0 /* Patched */ |
189 | j except_vec_vi_handler | 189 | j except_vec_vi_handler |
190 | EXPORT(except_vec_vi_ori) | 190 | FEXPORT(except_vec_vi_ori) |
191 | ori v0, 0 /* Patched */ | 191 | ori v0, 0 /* Patched */ |
192 | .set pop | 192 | .set pop |
193 | END(except_vec_vi) | 193 | END(except_vec_vi) |
@@ -220,7 +220,17 @@ NESTED(except_vec_vi_handler, 0, sp) | |||
220 | _ehb | 220 | _ehb |
221 | #endif /* CONFIG_MIPS_MT_SMTC */ | 221 | #endif /* CONFIG_MIPS_MT_SMTC */ |
222 | CLI | 222 | CLI |
223 | #ifdef CONFIG_TRACE_IRQFLAGS | ||
224 | move s0, v0 | ||
225 | #ifdef CONFIG_MIPS_MT_SMTC | ||
226 | move s1, a0 | ||
227 | #endif | ||
223 | TRACE_IRQS_OFF | 228 | TRACE_IRQS_OFF |
229 | #ifdef CONFIG_MIPS_MT_SMTC | ||
230 | move a0, s1 | ||
231 | #endif | ||
232 | move v0, s0 | ||
233 | #endif | ||
224 | 234 | ||
225 | LONG_L s0, TI_REGS($28) | 235 | LONG_L s0, TI_REGS($28) |
226 | LONG_S sp, TI_REGS($28) | 236 | LONG_S sp, TI_REGS($28) |
diff --git a/arch/mips/mips-boards/generic/init.c b/arch/mips/mips-boards/generic/init.c index 1acdf091c258..88e9c2a7a2f9 100644 --- a/arch/mips/mips-boards/generic/init.c +++ b/arch/mips/mips-boards/generic/init.c | |||
@@ -145,7 +145,7 @@ static void __init console_config(void) | |||
145 | char parity = '\0', bits = '\0', flow = '\0'; | 145 | char parity = '\0', bits = '\0', flow = '\0'; |
146 | char *s; | 146 | char *s; |
147 | 147 | ||
148 | if ((strstr(prom_getcmdline(), "console=ttyS")) == NULL) { | 148 | if ((strstr(prom_getcmdline(), "console=")) == NULL) { |
149 | s = prom_getenv("modetty0"); | 149 | s = prom_getenv("modetty0"); |
150 | if (s) { | 150 | if (s) { |
151 | while (*s >= '0' && *s <= '9') | 151 | while (*s >= '0' && *s <= '9') |
diff --git a/arch/mips/momentum/ocelot_c/irq.c b/arch/mips/momentum/ocelot_c/irq.c index 40472f7944d7..844d566c9de3 100644 --- a/arch/mips/momentum/ocelot_c/irq.c +++ b/arch/mips/momentum/ocelot_c/irq.c | |||
@@ -64,7 +64,7 @@ extern void ll_cpci_irq(void); | |||
64 | 64 | ||
65 | asmlinkage void plat_irq_dispatch(void) | 65 | asmlinkage void plat_irq_dispatch(void) |
66 | { | 66 | { |
67 | unsigned int pending = read_c0_cause() & read_c0_status(); | 67 | unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM; |
68 | 68 | ||
69 | if (pending & STATUSF_IP0) | 69 | if (pending & STATUSF_IP0) |
70 | do_IRQ(0); | 70 | do_IRQ(0); |
diff --git a/arch/mips/philips/pnx8550/common/int.c b/arch/mips/philips/pnx8550/common/int.c index b1c4805a0b92..aad03429a5e3 100644 --- a/arch/mips/philips/pnx8550/common/int.c +++ b/arch/mips/philips/pnx8550/common/int.c | |||
@@ -83,16 +83,15 @@ static void timer_irqdispatch(int irq) | |||
83 | 83 | ||
84 | asmlinkage void plat_irq_dispatch(void) | 84 | asmlinkage void plat_irq_dispatch(void) |
85 | { | 85 | { |
86 | unsigned int pending = read_c0_status() & read_c0_cause(); | 86 | unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; |
87 | 87 | ||
88 | if (pending & STATUSF_IP2) | 88 | if (pending & STATUSF_IP2) |
89 | hw0_irqdispatch(2); | 89 | hw0_irqdispatch(2); |
90 | else if (pending & STATUSF_IP7) { | 90 | else if (pending & STATUSF_IP7) { |
91 | if (read_c0_config7() & 0x01c0) | 91 | if (read_c0_config7() & 0x01c0) |
92 | timer_irqdispatch(7); | 92 | timer_irqdispatch(7); |
93 | } | 93 | } else |
94 | 94 | spurious_interrupt(); | |
95 | spurious_interrupt(); | ||
96 | } | 95 | } |
97 | 96 | ||
98 | static inline void modify_cp0_intmask(unsigned clr_mask, unsigned set_mask) | 97 | static inline void modify_cp0_intmask(unsigned clr_mask, unsigned set_mask) |
diff --git a/arch/mips/qemu/q-smp.c b/arch/mips/qemu/q-smp.c index 5a12354cd576..786bbfa214d1 100644 --- a/arch/mips/qemu/q-smp.c +++ b/arch/mips/qemu/q-smp.c | |||
@@ -46,3 +46,10 @@ void __init prom_prepare_cpus(unsigned int max_cpus) | |||
46 | void prom_boot_secondary(int cpu, struct task_struct *idle) | 46 | void prom_boot_secondary(int cpu, struct task_struct *idle) |
47 | { | 47 | { |
48 | } | 48 | } |
49 | |||
50 | void __init plat_smp_setup(void) | ||
51 | { | ||
52 | } | ||
53 | void __init plat_prepare_cpus(unsigned int max_cpus) | ||
54 | { | ||
55 | } | ||
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c index b454924aeb56..18348321795d 100644 --- a/arch/mips/sgi-ip22/ip22-int.c +++ b/arch/mips/sgi-ip22/ip22-int.c | |||
@@ -237,7 +237,7 @@ extern void indy_8254timer_irq(void); | |||
237 | 237 | ||
238 | asmlinkage void plat_irq_dispatch(void) | 238 | asmlinkage void plat_irq_dispatch(void) |
239 | { | 239 | { |
240 | unsigned int pending = read_c0_cause(); | 240 | unsigned int pending = read_c0_status() & read_c0_cause(); |
241 | 241 | ||
242 | /* | 242 | /* |
243 | * First we check for r4k counter/timer IRQ. | 243 | * First we check for r4k counter/timer IRQ. |
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c index 8c450d9e8696..fb9da9acf53f 100644 --- a/arch/mips/sgi-ip32/ip32-irq.c +++ b/arch/mips/sgi-ip32/ip32-irq.c | |||
@@ -454,7 +454,7 @@ static void ip32_irq5(void) | |||
454 | 454 | ||
455 | asmlinkage void plat_irq_dispatch(void) | 455 | asmlinkage void plat_irq_dispatch(void) |
456 | { | 456 | { |
457 | unsigned int pending = read_c0_cause(); | 457 | unsigned int pending = read_c0_status() & read_c0_cause(); |
458 | 458 | ||
459 | if (likely(pending & IE_IRQ0)) | 459 | if (likely(pending & IE_IRQ0)) |
460 | ip32_irq0(); | 460 | ip32_irq0(); |
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index 148239446e6e..0e6a13c0bd0e 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c | |||
@@ -421,7 +421,7 @@ asmlinkage void plat_irq_dispatch(void) | |||
421 | * blasting the high 32 bits. | 421 | * blasting the high 32 bits. |
422 | */ | 422 | */ |
423 | 423 | ||
424 | pending = read_c0_cause() & read_c0_status(); | 424 | pending = read_c0_cause() & read_c0_status() & ST0_IM; |
425 | 425 | ||
426 | #ifdef CONFIG_SIBYTE_SB1250_PROF | 426 | #ifdef CONFIG_SIBYTE_SB1250_PROF |
427 | if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */ | 427 | if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */ |
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c index 39e5b4abc555..8e8593b64f6a 100644 --- a/arch/mips/sni/pcimt.c +++ b/arch/mips/sni/pcimt.c | |||
@@ -333,7 +333,7 @@ static void pcimt_hwint3(void) | |||
333 | 333 | ||
334 | static void sni_pcimt_hwint(void) | 334 | static void sni_pcimt_hwint(void) |
335 | { | 335 | { |
336 | u32 pending = (read_c0_cause() & read_c0_status()); | 336 | u32 pending = read_c0_cause() & read_c0_status(); |
337 | 337 | ||
338 | if (pending & C_IRQ5) | 338 | if (pending & C_IRQ5) |
339 | do_IRQ (MIPS_CPU_IRQ_BASE + 7); | 339 | do_IRQ (MIPS_CPU_IRQ_BASE + 7); |
diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c index 8d6b3d5b13a1..1dfc3f00bbd3 100644 --- a/arch/mips/sni/pcit.c +++ b/arch/mips/sni/pcit.c | |||
@@ -271,7 +271,7 @@ static void pcit_hwint0(void) | |||
271 | 271 | ||
272 | static void sni_pcit_hwint(void) | 272 | static void sni_pcit_hwint(void) |
273 | { | 273 | { |
274 | u32 pending = (read_c0_cause() & read_c0_status()); | 274 | u32 pending = read_c0_cause() & read_c0_status(); |
275 | 275 | ||
276 | if (pending & C_IRQ1) | 276 | if (pending & C_IRQ1) |
277 | pcit_hwint1(); | 277 | pcit_hwint1(); |
@@ -285,7 +285,7 @@ static void sni_pcit_hwint(void) | |||
285 | 285 | ||
286 | static void sni_pcit_hwint_cplus(void) | 286 | static void sni_pcit_hwint_cplus(void) |
287 | { | 287 | { |
288 | u32 pending = (read_c0_cause() & read_c0_status()); | 288 | u32 pending = read_c0_cause() & read_c0_status(); |
289 | 289 | ||
290 | if (pending & C_IRQ0) | 290 | if (pending & C_IRQ0) |
291 | pcit_hwint0(); | 291 | pcit_hwint0(); |
diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/tx4927/common/tx4927_irq.c index e7f3e5b84dcf..3d25d010f3d5 100644 --- a/arch/mips/tx4927/common/tx4927_irq.c +++ b/arch/mips/tx4927/common/tx4927_irq.c | |||
@@ -416,7 +416,7 @@ static int tx4927_irq_nested(void) | |||
416 | 416 | ||
417 | asmlinkage void plat_irq_dispatch(void) | 417 | asmlinkage void plat_irq_dispatch(void) |
418 | { | 418 | { |
419 | unsigned int pending = read_c0_status() & read_c0_cause(); | 419 | unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; |
420 | 420 | ||
421 | if (pending & STATUSF_IP7) /* cpu timer */ | 421 | if (pending & STATUSF_IP7) /* cpu timer */ |
422 | do_IRQ(TX4927_IRQ_CPU_TIMER); | 422 | do_IRQ(TX4927_IRQ_CPU_TIMER); |
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S index 97901296894e..32a69a18a796 100644 --- a/arch/s390/kernel/compat_wrapper.S +++ b/arch/s390/kernel/compat_wrapper.S | |||
@@ -1665,3 +1665,20 @@ sys_getcpu_wrapper: | |||
1665 | llgtr %r3,%r3 # unsigned * | 1665 | llgtr %r3,%r3 # unsigned * |
1666 | llgtr %r4,%r4 # struct getcpu_cache * | 1666 | llgtr %r4,%r4 # struct getcpu_cache * |
1667 | jg sys_getcpu | 1667 | jg sys_getcpu |
1668 | |||
1669 | .globl compat_sys_epoll_pwait_wrapper | ||
1670 | compat_sys_epoll_pwait_wrapper: | ||
1671 | lgfr %r2,%r2 # int | ||
1672 | llgtr %r3,%r3 # struct compat_epoll_event * | ||
1673 | lgfr %r4,%r4 # int | ||
1674 | lgfr %r5,%r5 # int | ||
1675 | llgtr %r6,%r6 # compat_sigset_t * | ||
1676 | llgf %r0,164(%r15) # compat_size_t | ||
1677 | stg %r0,160(%r15) | ||
1678 | jg compat_sys_epoll_pwait | ||
1679 | |||
1680 | .globl compat_sys_utimes_wrapper | ||
1681 | compat_sys_utimes_wrapper: | ||
1682 | llgtr %r2,%r2 # char * | ||
1683 | llgtr %r3,%r3 # struct compat_timeval * | ||
1684 | jg compat_sys_utimes | ||
diff --git a/arch/s390/kernel/debug.c b/arch/s390/kernel/debug.c index eca3fe595ff4..dca6eaf82c80 100644 --- a/arch/s390/kernel/debug.c +++ b/arch/s390/kernel/debug.c | |||
@@ -268,7 +268,7 @@ debug_info_alloc(char *name, int pages_per_area, int nr_areas, int buf_size, | |||
268 | rc->level = level; | 268 | rc->level = level; |
269 | rc->buf_size = buf_size; | 269 | rc->buf_size = buf_size; |
270 | rc->entry_size = sizeof(debug_entry_t) + buf_size; | 270 | rc->entry_size = sizeof(debug_entry_t) + buf_size; |
271 | strlcpy(rc->name, name, sizeof(rc->name)-1); | 271 | strlcpy(rc->name, name, sizeof(rc->name)); |
272 | memset(rc->views, 0, DEBUG_MAX_VIEWS * sizeof(struct debug_view *)); | 272 | memset(rc->views, 0, DEBUG_MAX_VIEWS * sizeof(struct debug_view *)); |
273 | memset(rc->debugfs_entries, 0 ,DEBUG_MAX_VIEWS * | 273 | memset(rc->debugfs_entries, 0 ,DEBUG_MAX_VIEWS * |
274 | sizeof(struct dentry*)); | 274 | sizeof(struct dentry*)); |
diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c index afca1c6f4d21..5e47936573f2 100644 --- a/arch/s390/kernel/early.c +++ b/arch/s390/kernel/early.c | |||
@@ -141,9 +141,9 @@ static noinline __init void detect_machine_type(void) | |||
141 | machine_flags |= 4; | 141 | machine_flags |= 4; |
142 | } | 142 | } |
143 | 143 | ||
144 | #ifdef CONFIG_64BIT | ||
144 | static noinline __init int memory_fast_detect(void) | 145 | static noinline __init int memory_fast_detect(void) |
145 | { | 146 | { |
146 | |||
147 | unsigned long val0 = 0; | 147 | unsigned long val0 = 0; |
148 | unsigned long val1 = 0xc; | 148 | unsigned long val1 = 0xc; |
149 | int ret = -ENOSYS; | 149 | int ret = -ENOSYS; |
@@ -161,9 +161,15 @@ static noinline __init int memory_fast_detect(void) | |||
161 | if (ret || val0 != val1) | 161 | if (ret || val0 != val1) |
162 | return -ENOSYS; | 162 | return -ENOSYS; |
163 | 163 | ||
164 | memory_chunk[0].size = val0; | 164 | memory_chunk[0].size = val0 + 1; |
165 | return 0; | 165 | return 0; |
166 | } | 166 | } |
167 | #else | ||
168 | static inline int memory_fast_detect(void) | ||
169 | { | ||
170 | return -ENOSYS; | ||
171 | } | ||
172 | #endif | ||
167 | 173 | ||
168 | #define ADDR2G (1UL << 31) | 174 | #define ADDR2G (1UL << 31) |
169 | 175 | ||
diff --git a/arch/s390/kernel/ipl.c b/arch/s390/kernel/ipl.c index d125a4ead08d..f731185bf2bd 100644 --- a/arch/s390/kernel/ipl.c +++ b/arch/s390/kernel/ipl.c | |||
@@ -839,7 +839,7 @@ static int __init reipl_ccw_init(void) | |||
839 | } | 839 | } |
840 | reipl_block_ccw->hdr.len = IPL_PARM_BLK_CCW_LEN; | 840 | reipl_block_ccw->hdr.len = IPL_PARM_BLK_CCW_LEN; |
841 | reipl_block_ccw->hdr.version = IPL_PARM_BLOCK_VERSION; | 841 | reipl_block_ccw->hdr.version = IPL_PARM_BLOCK_VERSION; |
842 | reipl_block_ccw->hdr.blk0_len = sizeof(reipl_block_ccw->ipl_info.ccw); | 842 | reipl_block_ccw->hdr.blk0_len = IPL_PARM_BLK0_CCW_LEN; |
843 | reipl_block_ccw->hdr.pbt = DIAG308_IPL_TYPE_CCW; | 843 | reipl_block_ccw->hdr.pbt = DIAG308_IPL_TYPE_CCW; |
844 | /* check if read scp info worked and set loadparm */ | 844 | /* check if read scp info worked and set loadparm */ |
845 | if (SCCB_VALID) | 845 | if (SCCB_VALID) |
@@ -880,8 +880,7 @@ static int __init reipl_fcp_init(void) | |||
880 | } else { | 880 | } else { |
881 | reipl_block_fcp->hdr.len = IPL_PARM_BLK_FCP_LEN; | 881 | reipl_block_fcp->hdr.len = IPL_PARM_BLK_FCP_LEN; |
882 | reipl_block_fcp->hdr.version = IPL_PARM_BLOCK_VERSION; | 882 | reipl_block_fcp->hdr.version = IPL_PARM_BLOCK_VERSION; |
883 | reipl_block_fcp->hdr.blk0_len = | 883 | reipl_block_fcp->hdr.blk0_len = IPL_PARM_BLK0_FCP_LEN; |
884 | sizeof(reipl_block_fcp->ipl_info.fcp); | ||
885 | reipl_block_fcp->hdr.pbt = DIAG308_IPL_TYPE_FCP; | 884 | reipl_block_fcp->hdr.pbt = DIAG308_IPL_TYPE_FCP; |
886 | reipl_block_fcp->ipl_info.fcp.opt = DIAG308_IPL_OPT_IPL; | 885 | reipl_block_fcp->ipl_info.fcp.opt = DIAG308_IPL_OPT_IPL; |
887 | } | 886 | } |
@@ -930,7 +929,7 @@ static int __init dump_ccw_init(void) | |||
930 | } | 929 | } |
931 | dump_block_ccw->hdr.len = IPL_PARM_BLK_CCW_LEN; | 930 | dump_block_ccw->hdr.len = IPL_PARM_BLK_CCW_LEN; |
932 | dump_block_ccw->hdr.version = IPL_PARM_BLOCK_VERSION; | 931 | dump_block_ccw->hdr.version = IPL_PARM_BLOCK_VERSION; |
933 | dump_block_ccw->hdr.blk0_len = sizeof(reipl_block_ccw->ipl_info.ccw); | 932 | dump_block_ccw->hdr.blk0_len = IPL_PARM_BLK0_CCW_LEN; |
934 | dump_block_ccw->hdr.pbt = DIAG308_IPL_TYPE_CCW; | 933 | dump_block_ccw->hdr.pbt = DIAG308_IPL_TYPE_CCW; |
935 | dump_capabilities |= IPL_TYPE_CCW; | 934 | dump_capabilities |= IPL_TYPE_CCW; |
936 | return 0; | 935 | return 0; |
@@ -954,7 +953,7 @@ static int __init dump_fcp_init(void) | |||
954 | } | 953 | } |
955 | dump_block_fcp->hdr.len = IPL_PARM_BLK_FCP_LEN; | 954 | dump_block_fcp->hdr.len = IPL_PARM_BLK_FCP_LEN; |
956 | dump_block_fcp->hdr.version = IPL_PARM_BLOCK_VERSION; | 955 | dump_block_fcp->hdr.version = IPL_PARM_BLOCK_VERSION; |
957 | dump_block_fcp->hdr.blk0_len = sizeof(dump_block_fcp->ipl_info.fcp); | 956 | dump_block_fcp->hdr.blk0_len = IPL_PARM_BLK0_FCP_LEN; |
958 | dump_block_fcp->hdr.pbt = DIAG308_IPL_TYPE_FCP; | 957 | dump_block_fcp->hdr.pbt = DIAG308_IPL_TYPE_FCP; |
959 | dump_block_fcp->ipl_info.fcp.opt = DIAG308_IPL_OPT_DUMP; | 958 | dump_block_fcp->ipl_info.fcp.opt = DIAG308_IPL_OPT_DUMP; |
960 | dump_capabilities |= IPL_TYPE_FCP; | 959 | dump_capabilities |= IPL_TYPE_FCP; |
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S index a52c44455bf0..c774f1069e10 100644 --- a/arch/s390/kernel/syscalls.S +++ b/arch/s390/kernel/syscalls.S | |||
@@ -320,4 +320,5 @@ SYSCALL(sys_tee,sys_tee,sys_tee_wrapper) | |||
320 | SYSCALL(sys_vmsplice,sys_vmsplice,compat_sys_vmsplice_wrapper) | 320 | SYSCALL(sys_vmsplice,sys_vmsplice,compat_sys_vmsplice_wrapper) |
321 | NI_SYSCALL /* 310 sys_move_pages */ | 321 | NI_SYSCALL /* 310 sys_move_pages */ |
322 | SYSCALL(sys_getcpu,sys_getcpu,sys_getcpu_wrapper) | 322 | SYSCALL(sys_getcpu,sys_getcpu,sys_getcpu_wrapper) |
323 | SYSCALL(sys_epoll_pwait,sys_epoll_pwait,sys_ni_syscall) | 323 | SYSCALL(sys_epoll_pwait,sys_epoll_pwait,compat_sys_epoll_pwait_wrapper) |
324 | SYSCALL(sys_utimes,sys_utimes,compat_sys_utimes_wrapper) | ||
diff --git a/arch/sh/drivers/pci/pci-auto.c b/arch/sh/drivers/pci/pci-auto.c index ecf16344f94a..224e007736fb 100644 --- a/arch/sh/drivers/pci/pci-auto.c +++ b/arch/sh/drivers/pci/pci-auto.c | |||
@@ -214,6 +214,12 @@ retry: | |||
214 | continue; | 214 | continue; |
215 | } | 215 | } |
216 | 216 | ||
217 | if (bar_value < *lower_limit || (bar_value + bar_size) >= *upper_limit) { | ||
218 | DBG(" unavailable -- skipping, value %x size %x\n", | ||
219 | bar_value, bar_size); | ||
220 | continue; | ||
221 | } | ||
222 | |||
217 | #ifdef CONFIG_PCI_AUTO_UPDATE_RESOURCES | 223 | #ifdef CONFIG_PCI_AUTO_UPDATE_RESOURCES |
218 | /* Write it out and update our limit */ | 224 | /* Write it out and update our limit */ |
219 | early_write_config_dword(hose, top_bus, current_bus, pci_devfn, | 225 | early_write_config_dword(hose, top_bus, current_bus, pci_devfn, |
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c index 4b339a640b13..726acfcb9b77 100644 --- a/arch/sh/kernel/cpu/init.c +++ b/arch/sh/kernel/cpu/init.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * | 3 | * |
4 | * CPU init code | 4 | * CPU init code |
5 | * | 5 | * |
6 | * Copyright (C) 2002 - 2006 Paul Mundt | 6 | * Copyright (C) 2002 - 2007 Paul Mundt |
7 | * Copyright (C) 2003 Richard Curnow | 7 | * Copyright (C) 2003 Richard Curnow |
8 | * | 8 | * |
9 | * This file is subject to the terms and conditions of the GNU General Public | 9 | * This file is subject to the terms and conditions of the GNU General Public |
@@ -48,8 +48,19 @@ static void __init cache_init(void) | |||
48 | { | 48 | { |
49 | unsigned long ccr, flags; | 49 | unsigned long ccr, flags; |
50 | 50 | ||
51 | if (current_cpu_data.type == CPU_SH_NONE) | 51 | /* First setup the rest of the I-cache info */ |
52 | panic("Unknown CPU"); | 52 | current_cpu_data.icache.entry_mask = current_cpu_data.icache.way_incr - |
53 | current_cpu_data.icache.linesz; | ||
54 | |||
55 | current_cpu_data.icache.way_size = current_cpu_data.icache.sets * | ||
56 | current_cpu_data.icache.linesz; | ||
57 | |||
58 | /* And the D-cache too */ | ||
59 | current_cpu_data.dcache.entry_mask = current_cpu_data.dcache.way_incr - | ||
60 | current_cpu_data.dcache.linesz; | ||
61 | |||
62 | current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets * | ||
63 | current_cpu_data.dcache.linesz; | ||
53 | 64 | ||
54 | jump_to_P2(); | 65 | jump_to_P2(); |
55 | ccr = ctrl_inl(CCR); | 66 | ccr = ctrl_inl(CCR); |
@@ -200,6 +211,9 @@ asmlinkage void __init sh_cpu_init(void) | |||
200 | /* First, probe the CPU */ | 211 | /* First, probe the CPU */ |
201 | detect_cpu_and_cache_system(); | 212 | detect_cpu_and_cache_system(); |
202 | 213 | ||
214 | if (current_cpu_data.type == CPU_SH_NONE) | ||
215 | panic("Unknown CPU"); | ||
216 | |||
203 | /* Init the cache */ | 217 | /* Init the cache */ |
204 | cache_init(); | 218 | cache_init(); |
205 | 219 | ||
diff --git a/arch/sh/kernel/cpu/sh2/entry.S b/arch/sh/kernel/cpu/sh2/entry.S index 7f7d292f36ec..c16dc8fec489 100644 --- a/arch/sh/kernel/cpu/sh2/entry.S +++ b/arch/sh/kernel/cpu/sh2/entry.S | |||
@@ -165,6 +165,7 @@ ENTRY(exception_handler) | |||
165 | 165 | ||
166 | interrupt_entry: | 166 | interrupt_entry: |
167 | mov r9,r4 | 167 | mov r9,r4 |
168 | mov r15,r5 | ||
168 | mov.l 6f,r9 | 169 | mov.l 6f,r9 |
169 | mov.l 7f,r8 | 170 | mov.l 7f,r8 |
170 | jmp @r8 | 171 | jmp @r8 |
diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S index c19205b0f2c0..f3e827f29a46 100644 --- a/arch/sh/kernel/cpu/sh3/entry.S +++ b/arch/sh/kernel/cpu/sh3/entry.S | |||
@@ -514,13 +514,16 @@ skip_save: | |||
514 | 514 | ||
515 | interrupt_exception: | 515 | interrupt_exception: |
516 | mov.l 1f, r9 | 516 | mov.l 1f, r9 |
517 | mov.l 2f, r4 | ||
518 | mov.l @r4, r4 | ||
517 | jmp @r9 | 519 | jmp @r9 |
518 | nop | 520 | mov r15, r5 |
519 | rts | 521 | rts |
520 | nop | 522 | nop |
521 | 523 | ||
522 | .align 2 | 524 | .align 2 |
523 | 1: .long do_IRQ | 525 | 1: .long do_IRQ |
526 | 2: .long INTEVT | ||
524 | 527 | ||
525 | .align 2 | 528 | .align 2 |
526 | ENTRY(exception_none) | 529 | ENTRY(exception_none) |
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c index 9d28c88d2f9d..58950de2696d 100644 --- a/arch/sh/kernel/cpu/sh4/probe.c +++ b/arch/sh/kernel/cpu/sh4/probe.c | |||
@@ -195,13 +195,6 @@ int __init detect_cpu_and_cache_system(void) | |||
195 | 195 | ||
196 | } | 196 | } |
197 | 197 | ||
198 | /* Setup the rest of the I-cache info */ | ||
199 | current_cpu_data.icache.entry_mask = current_cpu_data.icache.way_incr - | ||
200 | current_cpu_data.icache.linesz; | ||
201 | |||
202 | current_cpu_data.icache.way_size = current_cpu_data.icache.sets * | ||
203 | current_cpu_data.icache.linesz; | ||
204 | |||
205 | /* And the rest of the D-cache */ | 198 | /* And the rest of the D-cache */ |
206 | if (current_cpu_data.dcache.ways > 1) { | 199 | if (current_cpu_data.dcache.ways > 1) { |
207 | size = sizes[(cvr >> 16) & 0xf]; | 200 | size = sizes[(cvr >> 16) & 0xf]; |
@@ -209,12 +202,6 @@ int __init detect_cpu_and_cache_system(void) | |||
209 | current_cpu_data.dcache.sets = (size >> 6); | 202 | current_cpu_data.dcache.sets = (size >> 6); |
210 | } | 203 | } |
211 | 204 | ||
212 | current_cpu_data.dcache.entry_mask = current_cpu_data.dcache.way_incr - | ||
213 | current_cpu_data.dcache.linesz; | ||
214 | |||
215 | current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets * | ||
216 | current_cpu_data.dcache.linesz; | ||
217 | |||
218 | /* | 205 | /* |
219 | * Setup the L2 cache desc | 206 | * Setup the L2 cache desc |
220 | * | 207 | * |
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c index 67be2b6e8cd1..9bdd8a00cd4a 100644 --- a/arch/sh/kernel/irq.c +++ b/arch/sh/kernel/irq.c | |||
@@ -11,7 +11,6 @@ | |||
11 | #include <linux/module.h> | 11 | #include <linux/module.h> |
12 | #include <linux/kernel_stat.h> | 12 | #include <linux/kernel_stat.h> |
13 | #include <linux/seq_file.h> | 13 | #include <linux/seq_file.h> |
14 | #include <linux/io.h> | ||
15 | #include <linux/irq.h> | 14 | #include <linux/irq.h> |
16 | #include <asm/processor.h> | 15 | #include <asm/processor.h> |
17 | #include <asm/uaccess.h> | 16 | #include <asm/uaccess.h> |
@@ -82,13 +81,9 @@ static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly; | |||
82 | static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly; | 81 | static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly; |
83 | #endif | 82 | #endif |
84 | 83 | ||
85 | asmlinkage int do_IRQ(unsigned long r4, unsigned long r5, | 84 | asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs) |
86 | unsigned long r6, unsigned long r7, | ||
87 | struct pt_regs __regs) | ||
88 | { | 85 | { |
89 | struct pt_regs *regs = RELOC_HIDE(&__regs, 0); | ||
90 | struct pt_regs *old_regs = set_irq_regs(regs); | 86 | struct pt_regs *old_regs = set_irq_regs(regs); |
91 | int irq; | ||
92 | #ifdef CONFIG_4KSTACKS | 87 | #ifdef CONFIG_4KSTACKS |
93 | union irq_ctx *curctx, *irqctx; | 88 | union irq_ctx *curctx, *irqctx; |
94 | #endif | 89 | #endif |
@@ -111,13 +106,7 @@ asmlinkage int do_IRQ(unsigned long r4, unsigned long r5, | |||
111 | } | 106 | } |
112 | #endif | 107 | #endif |
113 | 108 | ||
114 | #ifdef CONFIG_CPU_HAS_INTEVT | 109 | irq = irq_demux(evt2irq(irq)); |
115 | irq = evt2irq(ctrl_inl(INTEVT)); | ||
116 | #else | ||
117 | irq = r4; | ||
118 | #endif | ||
119 | |||
120 | irq = irq_demux(irq); | ||
121 | 110 | ||
122 | #ifdef CONFIG_4KSTACKS | 111 | #ifdef CONFIG_4KSTACKS |
123 | curctx = (union irq_ctx *)current_thread_info(); | 112 | curctx = (union irq_ctx *)current_thread_info(); |