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-rw-r--r--arch/arm/mach-omap2/id.c1
-rw-r--r--arch/arm/mach-omap2/omap4-common.c2
-rw-r--r--arch/arm/mach-omap2/twl-common.c1
-rw-r--r--arch/arm/mach-s3c2440/s3c244x.c1
-rw-r--r--arch/arm/plat-omap/include/plat/irqs.h10
5 files changed, 13 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 6c5826605eae..719ee423abe2 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -343,6 +343,7 @@ static void __init omap3_check_revision(const char **cpu_rev)
343 case 0xb944: 343 case 0xb944:
344 omap_revision = AM335X_REV_ES1_0; 344 omap_revision = AM335X_REV_ES1_0;
345 *cpu_rev = "1.0"; 345 *cpu_rev = "1.0";
346 break;
346 case 0xb8f2: 347 case 0xb8f2:
347 switch (rev) { 348 switch (rev) {
348 case 0: 349 case 0:
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index ebc595091312..70de277f5c15 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -31,6 +31,7 @@
31 31
32#include "common.h" 32#include "common.h"
33#include "omap4-sar-layout.h" 33#include "omap4-sar-layout.h"
34#include <linux/export.h>
34 35
35#ifdef CONFIG_CACHE_L2X0 36#ifdef CONFIG_CACHE_L2X0
36static void __iomem *l2cache_base; 37static void __iomem *l2cache_base;
@@ -55,6 +56,7 @@ void omap_bus_sync(void)
55 isb(); 56 isb();
56 } 57 }
57} 58}
59EXPORT_SYMBOL(omap_bus_sync);
58 60
59/* Steal one page physical memory for barrier implementation */ 61/* Steal one page physical memory for barrier implementation */
60int __init omap_barrier_reserve_memblock(void) 62int __init omap_barrier_reserve_memblock(void)
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 10b20c652e5d..4b57757bf9d1 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -270,7 +270,6 @@ static struct regulator_init_data omap4_vusb_idata = {
270 .constraints = { 270 .constraints = {
271 .min_uV = 3300000, 271 .min_uV = 3300000,
272 .max_uV = 3300000, 272 .max_uV = 3300000,
273 .apply_uV = true,
274 .valid_modes_mask = REGULATOR_MODE_NORMAL 273 .valid_modes_mask = REGULATOR_MODE_NORMAL
275 | REGULATOR_MODE_STANDBY, 274 | REGULATOR_MODE_STANDBY,
276 .valid_ops_mask = REGULATOR_CHANGE_MODE 275 .valid_ops_mask = REGULATOR_CHANGE_MODE
diff --git a/arch/arm/mach-s3c2440/s3c244x.c b/arch/arm/mach-s3c2440/s3c244x.c
index 744930a870eb..d15852f642b7 100644
--- a/arch/arm/mach-s3c2440/s3c244x.c
+++ b/arch/arm/mach-s3c2440/s3c244x.c
@@ -207,3 +207,4 @@ void s3c244x_restart(char mode, const char *cmd)
207 207
208 /* we'll take a jump through zero as a poor second */ 208 /* we'll take a jump through zero as a poor second */
209 soft_restart(0); 209 soft_restart(0);
210}
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index 2efd6454bce0..37bbbbb981b2 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -428,8 +428,16 @@
428#define OMAP_GPMC_NR_IRQS 8 428#define OMAP_GPMC_NR_IRQS 8
429#define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS) 429#define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS)
430 430
431/* PRCM IRQ handler */
432#ifdef CONFIG_ARCH_OMAP2PLUS
433#define OMAP_PRCM_IRQ_BASE (OMAP_GPMC_IRQ_END)
434#define OMAP_PRCM_NR_IRQS 64
435#define OMAP_PRCM_IRQ_END (OMAP_PRCM_IRQ_BASE + OMAP_PRCM_NR_IRQS)
436#else
437#define OMAP_PRCM_IRQ_END OMAP_GPMC_IRQ_END
438#endif
431 439
432#define NR_IRQS OMAP_GPMC_IRQ_END 440#define NR_IRQS OMAP_PRCM_IRQ_END
433 441
434#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32)) 442#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32))
435 443