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-rw-r--r--arch/alpha/Makefile2
-rw-r--r--arch/alpha/include/asm/floppy.h2
-rw-r--r--arch/alpha/kernel/irq.c7
-rw-r--r--arch/alpha/kernel/irq_alpha.c10
-rw-r--r--arch/alpha/kernel/sys_nautilus.c5
-rw-r--r--arch/alpha/kernel/sys_titan.c14
-rw-r--r--arch/arc/include/asm/irqflags.h12
-rw-r--r--arch/arm/boot/dts/imx28-m28evk.dts1
-rw-r--r--arch/arm/boot/dts/imx28-sps1.dts1
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi1
-rw-r--r--arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts14
-rw-r--r--arch/arm/include/asm/glue-cache.h8
-rw-r--r--arch/arm/include/asm/hardware/iop3xx.h2
-rw-r--r--arch/arm/include/asm/pgtable-3level.h2
-rw-r--r--arch/arm/include/asm/tlbflush.h11
-rw-r--r--arch/arm/kernel/hw_breakpoint.c2
-rw-r--r--arch/arm/kernel/perf_event.c5
-rw-r--r--arch/arm/kernel/sched_clock.c4
-rw-r--r--arch/arm/kernel/setup.c3
-rw-r--r--arch/arm/kernel/tcm.c1
-rw-r--r--arch/arm/kvm/arm.c1
-rw-r--r--arch/arm/kvm/coproc.c4
-rw-r--r--arch/arm/mach-highbank/hotplug.c10
-rw-r--r--arch/arm/mach-imx/clk-imx35.c2
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c3
-rw-r--r--arch/arm/mach-kirkwood/board-iomega_ix2_200.c7
-rw-r--r--arch/arm/mach-mvebu/irq-armada-370-xp.c16
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/irqs.h4
-rw-r--r--arch/arm/mach-s3c24xx/irq.c2
-rw-r--r--arch/arm/mm/Kconfig5
-rw-r--r--arch/arm/mm/Makefile1
-rw-r--r--arch/arm/mm/cache-feroceon-l2.c1
-rw-r--r--arch/arm/mm/cache-v3.S137
-rw-r--r--arch/arm/mm/cache-v4.S2
-rw-r--r--arch/arm/mm/mmu.c2
-rw-r--r--arch/arm/mm/proc-arm740.S30
-rw-r--r--arch/arm/mm/proc-arm920.S2
-rw-r--r--arch/arm/mm/proc-arm926.S2
-rw-r--r--arch/arm/mm/proc-mohawk.S2
-rw-r--r--arch/arm/mm/proc-sa1100.S2
-rw-r--r--arch/arm/mm/proc-syms.c2
-rw-r--r--arch/arm/mm/proc-v6.S2
-rw-r--r--arch/arm/mm/proc-xsc3.S2
-rw-r--r--arch/arm/mm/proc-xscale.S2
-rw-r--r--arch/arm/mm/tcm.h (renamed from arch/arm/kernel/tcm.h)0
-rw-r--r--arch/avr32/include/asm/io.h4
-rw-r--r--arch/c6x/include/asm/irqflags.h2
-rw-r--r--arch/ia64/kernel/palinfo.c77
-rw-r--r--arch/m68k/include/asm/gpio.h20
-rw-r--r--arch/powerpc/kernel/entry_64.S4
-rw-r--r--arch/powerpc/kernel/process.c2
-rw-r--r--arch/powerpc/kernel/signal_32.c2
-rw-r--r--arch/powerpc/kernel/signal_64.c2
-rw-r--r--arch/powerpc/kernel/tm.S2
-rw-r--r--arch/powerpc/kvm/e500.h24
-rw-r--r--arch/powerpc/kvm/e500_mmu_host.c84
-rw-r--r--arch/powerpc/kvm/e500mc.c7
-rw-r--r--arch/powerpc/platforms/pseries/lpar.c8
-rw-r--r--arch/s390/include/asm/io.h4
-rw-r--r--arch/s390/include/asm/pgtable.h4
-rw-r--r--arch/sparc/include/asm/Kbuild5
-rw-r--r--arch/sparc/include/asm/cputime.h6
-rw-r--r--arch/sparc/include/asm/emergency-restart.h6
-rw-r--r--arch/sparc/include/asm/mutex.h9
-rw-r--r--arch/sparc/include/asm/pgtable_64.h1
-rw-r--r--arch/sparc/include/asm/serial.h6
-rw-r--r--arch/sparc/include/asm/smp_32.h5
-rw-r--r--arch/sparc/include/asm/switch_to_64.h3
-rw-r--r--arch/sparc/include/asm/tlbflush_64.h37
-rw-r--r--arch/sparc/include/uapi/asm/Kbuild1
-rw-r--r--arch/sparc/include/uapi/asm/types.h17
-rw-r--r--arch/sparc/kernel/smp_64.c41
-rw-r--r--arch/sparc/lib/bitext.c6
-rw-r--r--arch/sparc/mm/iommu.c2
-rw-r--r--arch/sparc/mm/srmmu.c4
-rw-r--r--arch/sparc/mm/tlb.c38
-rw-r--r--arch/sparc/mm/tsb.c57
-rw-r--r--arch/sparc/mm/ultra.S119
-rw-r--r--arch/tile/include/asm/irqflags.h10
-rw-r--r--arch/x86/Kconfig1
-rw-r--r--arch/x86/boot/compressed/Makefile5
-rw-r--r--arch/x86/boot/compressed/eboot.c47
-rw-r--r--arch/x86/include/asm/efi.h7
-rw-r--r--arch/x86/include/asm/paravirt.h5
-rw-r--r--arch/x86/include/asm/paravirt_types.h2
-rw-r--r--arch/x86/include/asm/syscall.h4
-rw-r--r--arch/x86/include/asm/tlb.h2
-rw-r--r--arch/x86/include/uapi/asm/bootparam.h1
-rw-r--r--arch/x86/kernel/cpu/mshyperv.c18
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c20
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel_ds.c3
-rw-r--r--arch/x86/kernel/microcode_core_early.c38
-rw-r--r--arch/x86/kernel/paravirt.c25
-rw-r--r--arch/x86/kernel/setup.c45
-rw-r--r--arch/x86/kvm/lapic.c2
-rw-r--r--arch/x86/kvm/x86.c13
-rw-r--r--arch/x86/lguest/boot.c1
-rw-r--r--arch/x86/mm/fault.c6
-rw-r--r--arch/x86/mm/pageattr-test.c2
-rw-r--r--arch/x86/mm/pageattr.c12
-rw-r--r--arch/x86/mm/pgtable.c7
-rw-r--r--arch/x86/platform/efi/efi.c168
-rw-r--r--arch/x86/xen/mmu.c13
103 files changed, 833 insertions, 583 deletions
diff --git a/arch/alpha/Makefile b/arch/alpha/Makefile
index 4759fe751aa1..2cc3cc519c54 100644
--- a/arch/alpha/Makefile
+++ b/arch/alpha/Makefile
@@ -12,7 +12,7 @@ NM := $(NM) -B
12 12
13LDFLAGS_vmlinux := -static -N #-relax 13LDFLAGS_vmlinux := -static -N #-relax
14CHECKFLAGS += -D__alpha__ -m64 14CHECKFLAGS += -D__alpha__ -m64
15cflags-y := -pipe -mno-fp-regs -ffixed-8 -msmall-data 15cflags-y := -pipe -mno-fp-regs -ffixed-8
16cflags-y += $(call cc-option, -fno-jump-tables) 16cflags-y += $(call cc-option, -fno-jump-tables)
17 17
18cpuflags-$(CONFIG_ALPHA_EV4) := -mcpu=ev4 18cpuflags-$(CONFIG_ALPHA_EV4) := -mcpu=ev4
diff --git a/arch/alpha/include/asm/floppy.h b/arch/alpha/include/asm/floppy.h
index 46cefbd50e73..bae97eb19d26 100644
--- a/arch/alpha/include/asm/floppy.h
+++ b/arch/alpha/include/asm/floppy.h
@@ -26,7 +26,7 @@
26#define fd_disable_irq() disable_irq(FLOPPY_IRQ) 26#define fd_disable_irq() disable_irq(FLOPPY_IRQ)
27#define fd_cacheflush(addr,size) /* nothing */ 27#define fd_cacheflush(addr,size) /* nothing */
28#define fd_request_irq() request_irq(FLOPPY_IRQ, floppy_interrupt,\ 28#define fd_request_irq() request_irq(FLOPPY_IRQ, floppy_interrupt,\
29 IRQF_DISABLED, "floppy", NULL) 29 0, "floppy", NULL)
30#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL) 30#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL)
31 31
32#ifdef CONFIG_PCI 32#ifdef CONFIG_PCI
diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c
index 2872accd2215..7b2be251c30f 100644
--- a/arch/alpha/kernel/irq.c
+++ b/arch/alpha/kernel/irq.c
@@ -117,13 +117,6 @@ handle_irq(int irq)
117 return; 117 return;
118 } 118 }
119 119
120 /*
121 * From here we must proceed with IPL_MAX. Note that we do not
122 * explicitly enable interrupts afterwards - some MILO PALcode
123 * (namely LX164 one) seems to have severe problems with RTI
124 * at IPL 0.
125 */
126 local_irq_disable();
127 irq_enter(); 120 irq_enter();
128 generic_handle_irq_desc(irq, desc); 121 generic_handle_irq_desc(irq, desc);
129 irq_exit(); 122 irq_exit();
diff --git a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c
index 772ddfdb71a8..f433fc11877a 100644
--- a/arch/alpha/kernel/irq_alpha.c
+++ b/arch/alpha/kernel/irq_alpha.c
@@ -45,6 +45,14 @@ do_entInt(unsigned long type, unsigned long vector,
45 unsigned long la_ptr, struct pt_regs *regs) 45 unsigned long la_ptr, struct pt_regs *regs)
46{ 46{
47 struct pt_regs *old_regs; 47 struct pt_regs *old_regs;
48
49 /*
50 * Disable interrupts during IRQ handling.
51 * Note that there is no matching local_irq_enable() due to
52 * severe problems with RTI at IPL0 and some MILO PALcode
53 * (namely LX164).
54 */
55 local_irq_disable();
48 switch (type) { 56 switch (type) {
49 case 0: 57 case 0:
50#ifdef CONFIG_SMP 58#ifdef CONFIG_SMP
@@ -62,7 +70,6 @@ do_entInt(unsigned long type, unsigned long vector,
62 { 70 {
63 long cpu; 71 long cpu;
64 72
65 local_irq_disable();
66 smp_percpu_timer_interrupt(regs); 73 smp_percpu_timer_interrupt(regs);
67 cpu = smp_processor_id(); 74 cpu = smp_processor_id();
68 if (cpu != boot_cpuid) { 75 if (cpu != boot_cpuid) {
@@ -222,7 +229,6 @@ process_mcheck_info(unsigned long vector, unsigned long la_ptr,
222 229
223struct irqaction timer_irqaction = { 230struct irqaction timer_irqaction = {
224 .handler = timer_interrupt, 231 .handler = timer_interrupt,
225 .flags = IRQF_DISABLED,
226 .name = "timer", 232 .name = "timer",
227}; 233};
228 234
diff --git a/arch/alpha/kernel/sys_nautilus.c b/arch/alpha/kernel/sys_nautilus.c
index 4d4c046f708d..1383f8601a93 100644
--- a/arch/alpha/kernel/sys_nautilus.c
+++ b/arch/alpha/kernel/sys_nautilus.c
@@ -188,6 +188,10 @@ nautilus_machine_check(unsigned long vector, unsigned long la_ptr)
188extern void free_reserved_mem(void *, void *); 188extern void free_reserved_mem(void *, void *);
189extern void pcibios_claim_one_bus(struct pci_bus *); 189extern void pcibios_claim_one_bus(struct pci_bus *);
190 190
191static struct resource irongate_io = {
192 .name = "Irongate PCI IO",
193 .flags = IORESOURCE_IO,
194};
191static struct resource irongate_mem = { 195static struct resource irongate_mem = {
192 .name = "Irongate PCI MEM", 196 .name = "Irongate PCI MEM",
193 .flags = IORESOURCE_MEM, 197 .flags = IORESOURCE_MEM,
@@ -209,6 +213,7 @@ nautilus_init_pci(void)
209 213
210 irongate = pci_get_bus_and_slot(0, 0); 214 irongate = pci_get_bus_and_slot(0, 0);
211 bus->self = irongate; 215 bus->self = irongate;
216 bus->resource[0] = &irongate_io;
212 bus->resource[1] = &irongate_mem; 217 bus->resource[1] = &irongate_mem;
213 218
214 pci_bus_size_bridges(bus); 219 pci_bus_size_bridges(bus);
diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c
index 5cf4a481b8c5..a53cf03f49d5 100644
--- a/arch/alpha/kernel/sys_titan.c
+++ b/arch/alpha/kernel/sys_titan.c
@@ -280,15 +280,15 @@ titan_late_init(void)
280 * all reported to the kernel as machine checks, so the handler 280 * all reported to the kernel as machine checks, so the handler
281 * is a nop so it can be called to count the individual events. 281 * is a nop so it can be called to count the individual events.
282 */ 282 */
283 titan_request_irq(63+16, titan_intr_nop, IRQF_DISABLED, 283 titan_request_irq(63+16, titan_intr_nop, 0,
284 "CChip Error", NULL); 284 "CChip Error", NULL);
285 titan_request_irq(62+16, titan_intr_nop, IRQF_DISABLED, 285 titan_request_irq(62+16, titan_intr_nop, 0,
286 "PChip 0 H_Error", NULL); 286 "PChip 0 H_Error", NULL);
287 titan_request_irq(61+16, titan_intr_nop, IRQF_DISABLED, 287 titan_request_irq(61+16, titan_intr_nop, 0,
288 "PChip 1 H_Error", NULL); 288 "PChip 1 H_Error", NULL);
289 titan_request_irq(60+16, titan_intr_nop, IRQF_DISABLED, 289 titan_request_irq(60+16, titan_intr_nop, 0,
290 "PChip 0 C_Error", NULL); 290 "PChip 0 C_Error", NULL);
291 titan_request_irq(59+16, titan_intr_nop, IRQF_DISABLED, 291 titan_request_irq(59+16, titan_intr_nop, 0,
292 "PChip 1 C_Error", NULL); 292 "PChip 1 C_Error", NULL);
293 293
294 /* 294 /*
@@ -348,9 +348,9 @@ privateer_init_pci(void)
348 * Hook a couple of extra err interrupts that the 348 * Hook a couple of extra err interrupts that the
349 * common titan code won't. 349 * common titan code won't.
350 */ 350 */
351 titan_request_irq(53+16, titan_intr_nop, IRQF_DISABLED, 351 titan_request_irq(53+16, titan_intr_nop, 0,
352 "NMI", NULL); 352 "NMI", NULL);
353 titan_request_irq(50+16, titan_intr_nop, IRQF_DISABLED, 353 titan_request_irq(50+16, titan_intr_nop, 0,
354 "Temperature Warning", NULL); 354 "Temperature Warning", NULL);
355 355
356 /* 356 /*
diff --git a/arch/arc/include/asm/irqflags.h b/arch/arc/include/asm/irqflags.h
index ccd84806b62f..eac071668201 100644
--- a/arch/arc/include/asm/irqflags.h
+++ b/arch/arc/include/asm/irqflags.h
@@ -39,7 +39,7 @@ static inline long arch_local_irq_save(void)
39 " flag.nz %0 \n" 39 " flag.nz %0 \n"
40 : "=r"(temp), "=r"(flags) 40 : "=r"(temp), "=r"(flags)
41 : "n"((STATUS_E1_MASK | STATUS_E2_MASK)) 41 : "n"((STATUS_E1_MASK | STATUS_E2_MASK))
42 : "cc"); 42 : "memory", "cc");
43 43
44 return flags; 44 return flags;
45} 45}
@@ -53,7 +53,8 @@ static inline void arch_local_irq_restore(unsigned long flags)
53 __asm__ __volatile__( 53 __asm__ __volatile__(
54 " flag %0 \n" 54 " flag %0 \n"
55 : 55 :
56 : "r"(flags)); 56 : "r"(flags)
57 : "memory");
57} 58}
58 59
59/* 60/*
@@ -73,7 +74,8 @@ static inline void arch_local_irq_disable(void)
73 " and %0, %0, %1 \n" 74 " and %0, %0, %1 \n"
74 " flag %0 \n" 75 " flag %0 \n"
75 : "=&r"(temp) 76 : "=&r"(temp)
76 : "n"(~(STATUS_E1_MASK | STATUS_E2_MASK))); 77 : "n"(~(STATUS_E1_MASK | STATUS_E2_MASK))
78 : "memory");
77} 79}
78 80
79/* 81/*
@@ -85,7 +87,9 @@ static inline long arch_local_save_flags(void)
85 87
86 __asm__ __volatile__( 88 __asm__ __volatile__(
87 " lr %0, [status32] \n" 89 " lr %0, [status32] \n"
88 : "=&r"(temp)); 90 : "=&r"(temp)
91 :
92 : "memory");
89 93
90 return temp; 94 return temp;
91} 95}
diff --git a/arch/arm/boot/dts/imx28-m28evk.dts b/arch/arm/boot/dts/imx28-m28evk.dts
index 6ce3d17c3a29..fd36e1cca104 100644
--- a/arch/arm/boot/dts/imx28-m28evk.dts
+++ b/arch/arm/boot/dts/imx28-m28evk.dts
@@ -152,7 +152,6 @@
152 i2c0: i2c@80058000 { 152 i2c0: i2c@80058000 {
153 pinctrl-names = "default"; 153 pinctrl-names = "default";
154 pinctrl-0 = <&i2c0_pins_a>; 154 pinctrl-0 = <&i2c0_pins_a>;
155 clock-frequency = <400000>;
156 status = "okay"; 155 status = "okay";
157 156
158 sgtl5000: codec@0a { 157 sgtl5000: codec@0a {
diff --git a/arch/arm/boot/dts/imx28-sps1.dts b/arch/arm/boot/dts/imx28-sps1.dts
index e6cde8aa7fff..6c6a5442800a 100644
--- a/arch/arm/boot/dts/imx28-sps1.dts
+++ b/arch/arm/boot/dts/imx28-sps1.dts
@@ -70,7 +70,6 @@
70 i2c0: i2c@80058000 { 70 i2c0: i2c@80058000 {
71 pinctrl-names = "default"; 71 pinctrl-names = "default";
72 pinctrl-0 = <&i2c0_pins_a>; 72 pinctrl-0 = <&i2c0_pins_a>;
73 clock-frequency = <400000>;
74 status = "okay"; 73 status = "okay";
75 74
76 rtc: rtc@51 { 75 rtc: rtc@51 {
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 06ec460b4581..281a223591ff 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -91,6 +91,7 @@
91 compatible = "arm,cortex-a9-twd-timer"; 91 compatible = "arm,cortex-a9-twd-timer";
92 reg = <0x00a00600 0x20>; 92 reg = <0x00a00600 0x20>;
93 interrupts = <1 13 0xf01>; 93 interrupts = <1 13 0xf01>;
94 clocks = <&clks 15>;
94 }; 95 };
95 96
96 L2: l2-cache@00a02000 { 97 L2: l2-cache@00a02000 {
diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
index 93c3afbef9ee..3694e94f6e99 100644
--- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
+++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
@@ -96,11 +96,11 @@
96 marvell,function = "gpio"; 96 marvell,function = "gpio";
97 }; 97 };
98 pmx_led_rebuild_brt_ctrl_1: pmx-led-rebuild-brt-ctrl-1 { 98 pmx_led_rebuild_brt_ctrl_1: pmx-led-rebuild-brt-ctrl-1 {
99 marvell,pins = "mpp44"; 99 marvell,pins = "mpp46";
100 marvell,function = "gpio"; 100 marvell,function = "gpio";
101 }; 101 };
102 pmx_led_rebuild_brt_ctrl_2: pmx-led-rebuild-brt-ctrl-2 { 102 pmx_led_rebuild_brt_ctrl_2: pmx-led-rebuild-brt-ctrl-2 {
103 marvell,pins = "mpp45"; 103 marvell,pins = "mpp47";
104 marvell,function = "gpio"; 104 marvell,function = "gpio";
105 }; 105 };
106 106
@@ -157,14 +157,14 @@
157 gpios = <&gpio0 16 0>; 157 gpios = <&gpio0 16 0>;
158 linux,default-trigger = "default-on"; 158 linux,default-trigger = "default-on";
159 }; 159 };
160 health_led1 { 160 rebuild_led {
161 label = "status:white:rebuild_led";
162 gpios = <&gpio1 4 0>;
163 };
164 health_led {
161 label = "status:red:health_led"; 165 label = "status:red:health_led";
162 gpios = <&gpio1 5 0>; 166 gpios = <&gpio1 5 0>;
163 }; 167 };
164 health_led2 {
165 label = "status:white:health_led";
166 gpios = <&gpio1 4 0>;
167 };
168 backup_led { 168 backup_led {
169 label = "status:blue:backup_led"; 169 label = "status:blue:backup_led";
170 gpios = <&gpio0 15 0>; 170 gpios = <&gpio0 15 0>;
diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h
index cca9f15704ed..ea289e1435e7 100644
--- a/arch/arm/include/asm/glue-cache.h
+++ b/arch/arm/include/asm/glue-cache.h
@@ -19,14 +19,6 @@
19#undef _CACHE 19#undef _CACHE
20#undef MULTI_CACHE 20#undef MULTI_CACHE
21 21
22#if defined(CONFIG_CPU_CACHE_V3)
23# ifdef _CACHE
24# define MULTI_CACHE 1
25# else
26# define _CACHE v3
27# endif
28#endif
29
30#if defined(CONFIG_CPU_CACHE_V4) 22#if defined(CONFIG_CPU_CACHE_V4)
31# ifdef _CACHE 23# ifdef _CACHE
32# define MULTI_CACHE 1 24# define MULTI_CACHE 1
diff --git a/arch/arm/include/asm/hardware/iop3xx.h b/arch/arm/include/asm/hardware/iop3xx.h
index 02fe2fbe2477..ed94b1a366ae 100644
--- a/arch/arm/include/asm/hardware/iop3xx.h
+++ b/arch/arm/include/asm/hardware/iop3xx.h
@@ -37,7 +37,7 @@ extern int iop3xx_get_init_atu(void);
37 * IOP3XX processor registers 37 * IOP3XX processor registers
38 */ 38 */
39#define IOP3XX_PERIPHERAL_PHYS_BASE 0xffffe000 39#define IOP3XX_PERIPHERAL_PHYS_BASE 0xffffe000
40#define IOP3XX_PERIPHERAL_VIRT_BASE 0xfeffe000 40#define IOP3XX_PERIPHERAL_VIRT_BASE 0xfedfe000
41#define IOP3XX_PERIPHERAL_SIZE 0x00002000 41#define IOP3XX_PERIPHERAL_SIZE 0x00002000
42#define IOP3XX_PERIPHERAL_UPPER_PA (IOP3XX_PERIPHERAL_PHYS_BASE +\ 42#define IOP3XX_PERIPHERAL_UPPER_PA (IOP3XX_PERIPHERAL_PHYS_BASE +\
43 IOP3XX_PERIPHERAL_SIZE - 1) 43 IOP3XX_PERIPHERAL_SIZE - 1)
diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h
index 6ef8afd1b64c..86b8fe398b95 100644
--- a/arch/arm/include/asm/pgtable-3level.h
+++ b/arch/arm/include/asm/pgtable-3level.h
@@ -111,7 +111,7 @@
111#define L_PTE_S2_MT_WRITETHROUGH (_AT(pteval_t, 0xa) << 2) /* MemAttr[3:0] */ 111#define L_PTE_S2_MT_WRITETHROUGH (_AT(pteval_t, 0xa) << 2) /* MemAttr[3:0] */
112#define L_PTE_S2_MT_WRITEBACK (_AT(pteval_t, 0xf) << 2) /* MemAttr[3:0] */ 112#define L_PTE_S2_MT_WRITEBACK (_AT(pteval_t, 0xf) << 2) /* MemAttr[3:0] */
113#define L_PTE_S2_RDONLY (_AT(pteval_t, 1) << 6) /* HAP[1] */ 113#define L_PTE_S2_RDONLY (_AT(pteval_t, 1) << 6) /* HAP[1] */
114#define L_PTE_S2_RDWR (_AT(pteval_t, 2) << 6) /* HAP[2:1] */ 114#define L_PTE_S2_RDWR (_AT(pteval_t, 3) << 6) /* HAP[2:1] */
115 115
116/* 116/*
117 * Hyp-mode PL2 PTE definitions for LPAE. 117 * Hyp-mode PL2 PTE definitions for LPAE.
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index 9e9c041358ca..ab865e65a84c 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -14,7 +14,6 @@
14 14
15#include <asm/glue.h> 15#include <asm/glue.h>
16 16
17#define TLB_V3_PAGE (1 << 0)
18#define TLB_V4_U_PAGE (1 << 1) 17#define TLB_V4_U_PAGE (1 << 1)
19#define TLB_V4_D_PAGE (1 << 2) 18#define TLB_V4_D_PAGE (1 << 2)
20#define TLB_V4_I_PAGE (1 << 3) 19#define TLB_V4_I_PAGE (1 << 3)
@@ -22,7 +21,6 @@
22#define TLB_V6_D_PAGE (1 << 5) 21#define TLB_V6_D_PAGE (1 << 5)
23#define TLB_V6_I_PAGE (1 << 6) 22#define TLB_V6_I_PAGE (1 << 6)
24 23
25#define TLB_V3_FULL (1 << 8)
26#define TLB_V4_U_FULL (1 << 9) 24#define TLB_V4_U_FULL (1 << 9)
27#define TLB_V4_D_FULL (1 << 10) 25#define TLB_V4_D_FULL (1 << 10)
28#define TLB_V4_I_FULL (1 << 11) 26#define TLB_V4_I_FULL (1 << 11)
@@ -52,7 +50,6 @@
52 * ============= 50 * =============
53 * 51 *
54 * We have the following to choose from: 52 * We have the following to choose from:
55 * v3 - ARMv3
56 * v4 - ARMv4 without write buffer 53 * v4 - ARMv4 without write buffer
57 * v4wb - ARMv4 with write buffer without I TLB flush entry instruction 54 * v4wb - ARMv4 with write buffer without I TLB flush entry instruction
58 * v4wbi - ARMv4 with write buffer with I TLB flush entry instruction 55 * v4wbi - ARMv4 with write buffer with I TLB flush entry instruction
@@ -330,7 +327,6 @@ static inline void local_flush_tlb_all(void)
330 if (tlb_flag(TLB_WB)) 327 if (tlb_flag(TLB_WB))
331 dsb(); 328 dsb();
332 329
333 tlb_op(TLB_V3_FULL, "c6, c0, 0", zero);
334 tlb_op(TLB_V4_U_FULL | TLB_V6_U_FULL, "c8, c7, 0", zero); 330 tlb_op(TLB_V4_U_FULL | TLB_V6_U_FULL, "c8, c7, 0", zero);
335 tlb_op(TLB_V4_D_FULL | TLB_V6_D_FULL, "c8, c6, 0", zero); 331 tlb_op(TLB_V4_D_FULL | TLB_V6_D_FULL, "c8, c6, 0", zero);
336 tlb_op(TLB_V4_I_FULL | TLB_V6_I_FULL, "c8, c5, 0", zero); 332 tlb_op(TLB_V4_I_FULL | TLB_V6_I_FULL, "c8, c5, 0", zero);
@@ -351,9 +347,8 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
351 if (tlb_flag(TLB_WB)) 347 if (tlb_flag(TLB_WB))
352 dsb(); 348 dsb();
353 349
354 if (possible_tlb_flags & (TLB_V3_FULL|TLB_V4_U_FULL|TLB_V4_D_FULL|TLB_V4_I_FULL)) { 350 if (possible_tlb_flags & (TLB_V4_U_FULL|TLB_V4_D_FULL|TLB_V4_I_FULL)) {
355 if (cpumask_test_cpu(get_cpu(), mm_cpumask(mm))) { 351 if (cpumask_test_cpu(get_cpu(), mm_cpumask(mm))) {
356 tlb_op(TLB_V3_FULL, "c6, c0, 0", zero);
357 tlb_op(TLB_V4_U_FULL, "c8, c7, 0", zero); 352 tlb_op(TLB_V4_U_FULL, "c8, c7, 0", zero);
358 tlb_op(TLB_V4_D_FULL, "c8, c6, 0", zero); 353 tlb_op(TLB_V4_D_FULL, "c8, c6, 0", zero);
359 tlb_op(TLB_V4_I_FULL, "c8, c5, 0", zero); 354 tlb_op(TLB_V4_I_FULL, "c8, c5, 0", zero);
@@ -385,9 +380,8 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
385 if (tlb_flag(TLB_WB)) 380 if (tlb_flag(TLB_WB))
386 dsb(); 381 dsb();
387 382
388 if (possible_tlb_flags & (TLB_V3_PAGE|TLB_V4_U_PAGE|TLB_V4_D_PAGE|TLB_V4_I_PAGE|TLB_V4_I_FULL) && 383 if (possible_tlb_flags & (TLB_V4_U_PAGE|TLB_V4_D_PAGE|TLB_V4_I_PAGE|TLB_V4_I_FULL) &&
389 cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) { 384 cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
390 tlb_op(TLB_V3_PAGE, "c6, c0, 0", uaddr);
391 tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", uaddr); 385 tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", uaddr);
392 tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", uaddr); 386 tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", uaddr);
393 tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", uaddr); 387 tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", uaddr);
@@ -418,7 +412,6 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
418 if (tlb_flag(TLB_WB)) 412 if (tlb_flag(TLB_WB))
419 dsb(); 413 dsb();
420 414
421 tlb_op(TLB_V3_PAGE, "c6, c0, 0", kaddr);
422 tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", kaddr); 415 tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", kaddr);
423 tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", kaddr); 416 tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", kaddr);
424 tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", kaddr); 417 tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", kaddr);
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 5dc1aa6f0f7d..1fd749ee4a1b 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -1043,7 +1043,7 @@ static int dbg_cpu_pm_notify(struct notifier_block *self, unsigned long action,
1043 return NOTIFY_OK; 1043 return NOTIFY_OK;
1044} 1044}
1045 1045
1046static struct notifier_block __cpuinitdata dbg_cpu_pm_nb = { 1046static struct notifier_block dbg_cpu_pm_nb = {
1047 .notifier_call = dbg_cpu_pm_notify, 1047 .notifier_call = dbg_cpu_pm_notify,
1048}; 1048};
1049 1049
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 146157dfe27c..8c3094d0f7b7 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -253,7 +253,10 @@ validate_event(struct pmu_hw_events *hw_events,
253 struct arm_pmu *armpmu = to_arm_pmu(event->pmu); 253 struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
254 struct pmu *leader_pmu = event->group_leader->pmu; 254 struct pmu *leader_pmu = event->group_leader->pmu;
255 255
256 if (event->pmu != leader_pmu || event->state <= PERF_EVENT_STATE_OFF) 256 if (event->pmu != leader_pmu || event->state < PERF_EVENT_STATE_OFF)
257 return 1;
258
259 if (event->state == PERF_EVENT_STATE_OFF && !event->attr.enable_on_exec)
257 return 1; 260 return 1;
258 261
259 return armpmu->get_event_idx(hw_events, event) >= 0; 262 return armpmu->get_event_idx(hw_events, event) >= 0;
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index bd6f56b9ec21..59d2adb764a9 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -45,12 +45,12 @@ static u32 notrace jiffy_sched_clock_read(void)
45 45
46static u32 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read; 46static u32 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read;
47 47
48static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift) 48static inline u64 notrace cyc_to_ns(u64 cyc, u32 mult, u32 shift)
49{ 49{
50 return (cyc * mult) >> shift; 50 return (cyc * mult) >> shift;
51} 51}
52 52
53static unsigned long long cyc_to_sched_clock(u32 cyc, u32 mask) 53static unsigned long long notrace cyc_to_sched_clock(u32 cyc, u32 mask)
54{ 54{
55 u64 epoch_ns; 55 u64 epoch_ns;
56 u32 epoch_cyc; 56 u32 epoch_cyc;
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index d343a6c3a6d1..234e339196c0 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -56,7 +56,6 @@
56#include <asm/virt.h> 56#include <asm/virt.h>
57 57
58#include "atags.h" 58#include "atags.h"
59#include "tcm.h"
60 59
61 60
62#if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE) 61#if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
@@ -798,8 +797,6 @@ void __init setup_arch(char **cmdline_p)
798 797
799 reserve_crashkernel(); 798 reserve_crashkernel();
800 799
801 tcm_init();
802
803#ifdef CONFIG_MULTI_IRQ_HANDLER 800#ifdef CONFIG_MULTI_IRQ_HANDLER
804 handle_arch_irq = mdesc->handle_irq; 801 handle_arch_irq = mdesc->handle_irq;
805#endif 802#endif
diff --git a/arch/arm/kernel/tcm.c b/arch/arm/kernel/tcm.c
index 30ae6bb4a310..f50f19e5c138 100644
--- a/arch/arm/kernel/tcm.c
+++ b/arch/arm/kernel/tcm.c
@@ -17,7 +17,6 @@
17#include <asm/mach/map.h> 17#include <asm/mach/map.h>
18#include <asm/memory.h> 18#include <asm/memory.h>
19#include <asm/system_info.h> 19#include <asm/system_info.h>
20#include "tcm.h"
21 20
22static struct gen_pool *tcm_pool; 21static struct gen_pool *tcm_pool;
23static bool dtcm_present; 22static bool dtcm_present;
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index 5a936988eb24..c1fe498983ac 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -201,6 +201,7 @@ int kvm_dev_ioctl_check_extension(long ext)
201 break; 201 break;
202 case KVM_CAP_ARM_SET_DEVICE_ADDR: 202 case KVM_CAP_ARM_SET_DEVICE_ADDR:
203 r = 1; 203 r = 1;
204 break;
204 case KVM_CAP_NR_VCPUS: 205 case KVM_CAP_NR_VCPUS:
205 r = num_online_cpus(); 206 r = num_online_cpus();
206 break; 207 break;
diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c
index 4ea9a982269c..7bed7556077a 100644
--- a/arch/arm/kvm/coproc.c
+++ b/arch/arm/kvm/coproc.c
@@ -79,11 +79,11 @@ static bool access_dcsw(struct kvm_vcpu *vcpu,
79 u32 val; 79 u32 val;
80 int cpu; 80 int cpu;
81 81
82 cpu = get_cpu();
83
84 if (!p->is_write) 82 if (!p->is_write)
85 return read_from_write_only(vcpu, p); 83 return read_from_write_only(vcpu, p);
86 84
85 cpu = get_cpu();
86
87 cpumask_setall(&vcpu->arch.require_dcache_flush); 87 cpumask_setall(&vcpu->arch.require_dcache_flush);
88 cpumask_clear_cpu(cpu, &vcpu->arch.require_dcache_flush); 88 cpumask_clear_cpu(cpu, &vcpu->arch.require_dcache_flush);
89 89
diff --git a/arch/arm/mach-highbank/hotplug.c b/arch/arm/mach-highbank/hotplug.c
index f30c52843396..890cae23c12a 100644
--- a/arch/arm/mach-highbank/hotplug.c
+++ b/arch/arm/mach-highbank/hotplug.c
@@ -28,13 +28,11 @@ extern void secondary_startup(void);
28 */ 28 */
29void __ref highbank_cpu_die(unsigned int cpu) 29void __ref highbank_cpu_die(unsigned int cpu)
30{ 30{
31 flush_cache_all();
32
33 highbank_set_cpu_jump(cpu, phys_to_virt(0)); 31 highbank_set_cpu_jump(cpu, phys_to_virt(0));
34 highbank_set_core_pwr();
35 32
36 cpu_do_idle(); 33 flush_cache_louis();
34 highbank_set_core_pwr();
37 35
38 /* We should never return from idle */ 36 while (1)
39 panic("highbank: cpu %d unexpectedly exit from shutdown\n", cpu); 37 cpu_do_idle();
40} 38}
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index e13a8fa5e62c..2193c834f55c 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -257,6 +257,7 @@ int __init mx35_clocks_init(void)
257 clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); 257 clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
258 clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0"); 258 clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0");
259 clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0"); 259 clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
260 clk_register_clkdev(clk[admux_gate], "audmux", NULL);
260 261
261 clk_prepare_enable(clk[spba_gate]); 262 clk_prepare_enable(clk[spba_gate]);
262 clk_prepare_enable(clk[gpio1_gate]); 263 clk_prepare_enable(clk[gpio1_gate]);
@@ -265,6 +266,7 @@ int __init mx35_clocks_init(void)
265 clk_prepare_enable(clk[iim_gate]); 266 clk_prepare_enable(clk[iim_gate]);
266 clk_prepare_enable(clk[emi_gate]); 267 clk_prepare_enable(clk[emi_gate]);
267 clk_prepare_enable(clk[max_gate]); 268 clk_prepare_enable(clk[max_gate]);
269 clk_prepare_enable(clk[iomuxc_gate]);
268 270
269 /* 271 /*
270 * SCC is needed to boot via mmc after a watchdog reset. The clock code 272 * SCC is needed to boot via mmc after a watchdog reset. The clock code
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 2f9ff93a4e61..d38e54f5b6d7 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -115,7 +115,7 @@ static const char *gpu2d_core_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd0_352m"
115static const char *gpu3d_core_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", }; 115static const char *gpu3d_core_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", };
116static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd9_720m", }; 116static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd9_720m", };
117static const char *ipu_sels[] = { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", }; 117static const char *ipu_sels[] = { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", };
118static const char *ldb_di_sels[] = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_pfd1_540m", }; 118static const char *ldb_di_sels[] = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_usb_otg", };
119static const char *ipu_di_pre_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", }; 119static const char *ipu_di_pre_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", };
120static const char *ipu1_di0_sels[] = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", }; 120static const char *ipu1_di0_sels[] = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
121static const char *ipu1_di1_sels[] = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", }; 121static const char *ipu1_di1_sels[] = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
@@ -443,7 +443,6 @@ int __init mx6q_clocks_init(void)
443 443
444 clk_register_clkdev(clk[gpt_ipg], "ipg", "imx-gpt.0"); 444 clk_register_clkdev(clk[gpt_ipg], "ipg", "imx-gpt.0");
445 clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0"); 445 clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
446 clk_register_clkdev(clk[twd], NULL, "smp_twd");
447 clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL); 446 clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL);
448 clk_register_clkdev(clk[ahb], "ahb", NULL); 447 clk_register_clkdev(clk[ahb], "ahb", NULL);
449 clk_register_clkdev(clk[cko1], "cko1", NULL); 448 clk_register_clkdev(clk[cko1], "cko1", NULL);
diff --git a/arch/arm/mach-kirkwood/board-iomega_ix2_200.c b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
index f655b2637b0e..e5f70415905a 100644
--- a/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
+++ b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
@@ -20,10 +20,15 @@ static struct mv643xx_eth_platform_data iomega_ix2_200_ge00_data = {
20 .duplex = DUPLEX_FULL, 20 .duplex = DUPLEX_FULL,
21}; 21};
22 22
23static struct mv643xx_eth_platform_data iomega_ix2_200_ge01_data = {
24 .phy_addr = MV643XX_ETH_PHY_ADDR(11),
25};
26
23void __init iomega_ix2_200_init(void) 27void __init iomega_ix2_200_init(void)
24{ 28{
25 /* 29 /*
26 * Basic setup. Needs to be called early. 30 * Basic setup. Needs to be called early.
27 */ 31 */
28 kirkwood_ge01_init(&iomega_ix2_200_ge00_data); 32 kirkwood_ge00_init(&iomega_ix2_200_ge00_data);
33 kirkwood_ge01_init(&iomega_ix2_200_ge01_data);
29} 34}
diff --git a/arch/arm/mach-mvebu/irq-armada-370-xp.c b/arch/arm/mach-mvebu/irq-armada-370-xp.c
index 6a9195e10579..d5970f5a1e8d 100644
--- a/arch/arm/mach-mvebu/irq-armada-370-xp.c
+++ b/arch/arm/mach-mvebu/irq-armada-370-xp.c
@@ -61,7 +61,6 @@ static struct irq_domain *armada_370_xp_mpic_domain;
61 */ 61 */
62static void armada_370_xp_irq_mask(struct irq_data *d) 62static void armada_370_xp_irq_mask(struct irq_data *d)
63{ 63{
64#ifdef CONFIG_SMP
65 irq_hw_number_t hwirq = irqd_to_hwirq(d); 64 irq_hw_number_t hwirq = irqd_to_hwirq(d);
66 65
67 if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ) 66 if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
@@ -70,15 +69,10 @@ static void armada_370_xp_irq_mask(struct irq_data *d)
70 else 69 else
71 writel(hwirq, per_cpu_int_base + 70 writel(hwirq, per_cpu_int_base +
72 ARMADA_370_XP_INT_SET_MASK_OFFS); 71 ARMADA_370_XP_INT_SET_MASK_OFFS);
73#else
74 writel(irqd_to_hwirq(d),
75 per_cpu_int_base + ARMADA_370_XP_INT_SET_MASK_OFFS);
76#endif
77} 72}
78 73
79static void armada_370_xp_irq_unmask(struct irq_data *d) 74static void armada_370_xp_irq_unmask(struct irq_data *d)
80{ 75{
81#ifdef CONFIG_SMP
82 irq_hw_number_t hwirq = irqd_to_hwirq(d); 76 irq_hw_number_t hwirq = irqd_to_hwirq(d);
83 77
84 if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ) 78 if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
@@ -87,10 +81,6 @@ static void armada_370_xp_irq_unmask(struct irq_data *d)
87 else 81 else
88 writel(hwirq, per_cpu_int_base + 82 writel(hwirq, per_cpu_int_base +
89 ARMADA_370_XP_INT_CLEAR_MASK_OFFS); 83 ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
90#else
91 writel(irqd_to_hwirq(d),
92 per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
93#endif
94} 84}
95 85
96#ifdef CONFIG_SMP 86#ifdef CONFIG_SMP
@@ -146,7 +136,11 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h,
146 unsigned int virq, irq_hw_number_t hw) 136 unsigned int virq, irq_hw_number_t hw)
147{ 137{
148 armada_370_xp_irq_mask(irq_get_irq_data(virq)); 138 armada_370_xp_irq_mask(irq_get_irq_data(virq));
149 writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS); 139 if (hw != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
140 writel(hw, per_cpu_int_base +
141 ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
142 else
143 writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS);
150 irq_set_status_flags(virq, IRQ_LEVEL); 144 irq_set_status_flags(virq, IRQ_LEVEL);
151 145
152 if (hw == ARMADA_370_XP_TIMER0_PER_CPU_IRQ) { 146 if (hw == ARMADA_370_XP_TIMER0_PER_CPU_IRQ) {
diff --git a/arch/arm/mach-s3c24xx/include/mach/irqs.h b/arch/arm/mach-s3c24xx/include/mach/irqs.h
index b7a9f4d469e8..1e73f5fa8659 100644
--- a/arch/arm/mach-s3c24xx/include/mach/irqs.h
+++ b/arch/arm/mach-s3c24xx/include/mach/irqs.h
@@ -188,10 +188,8 @@
188 188
189#if defined(CONFIG_CPU_S3C2416) 189#if defined(CONFIG_CPU_S3C2416)
190#define NR_IRQS (IRQ_S3C2416_I2S1 + 1) 190#define NR_IRQS (IRQ_S3C2416_I2S1 + 1)
191#elif defined(CONFIG_CPU_S3C2443)
192#define NR_IRQS (IRQ_S3C2443_AC97+1)
193#else 191#else
194#define NR_IRQS (IRQ_S3C2440_AC97+1) 192#define NR_IRQS (IRQ_S3C2443_AC97 + 1)
195#endif 193#endif
196 194
197/* compatibility define. */ 195/* compatibility define. */
diff --git a/arch/arm/mach-s3c24xx/irq.c b/arch/arm/mach-s3c24xx/irq.c
index cb9f5e011e73..d8ba9bee4c7e 100644
--- a/arch/arm/mach-s3c24xx/irq.c
+++ b/arch/arm/mach-s3c24xx/irq.c
@@ -500,7 +500,7 @@ struct s3c_irq_intc *s3c24xx_init_intc(struct device_node *np,
500 base = (void *)0xfd000000; 500 base = (void *)0xfd000000;
501 501
502 intc->reg_mask = base + 0xa4; 502 intc->reg_mask = base + 0xa4;
503 intc->reg_pending = base + 0x08; 503 intc->reg_pending = base + 0xa8;
504 irq_num = 20; 504 irq_num = 20;
505 irq_start = S3C2410_IRQ(32); 505 irq_start = S3C2410_IRQ(32);
506 irq_offset = 4; 506 irq_offset = 4;
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 025d17328730..4045c4931a30 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -43,7 +43,7 @@ config CPU_ARM740T
43 depends on !MMU 43 depends on !MMU
44 select CPU_32v4T 44 select CPU_32v4T
45 select CPU_ABRT_LV4T 45 select CPU_ABRT_LV4T
46 select CPU_CACHE_V3 # although the core is v4t 46 select CPU_CACHE_V4
47 select CPU_CP15_MPU 47 select CPU_CP15_MPU
48 select CPU_PABRT_LEGACY 48 select CPU_PABRT_LEGACY
49 help 49 help
@@ -469,9 +469,6 @@ config CPU_PABRT_V7
469 bool 469 bool
470 470
471# The cache model 471# The cache model
472config CPU_CACHE_V3
473 bool
474
475config CPU_CACHE_V4 472config CPU_CACHE_V4
476 bool 473 bool
477 474
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index 4e333fa2756f..9e51be96f635 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -33,7 +33,6 @@ obj-$(CONFIG_CPU_PABRT_LEGACY) += pabort-legacy.o
33obj-$(CONFIG_CPU_PABRT_V6) += pabort-v6.o 33obj-$(CONFIG_CPU_PABRT_V6) += pabort-v6.o
34obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o 34obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o
35 35
36obj-$(CONFIG_CPU_CACHE_V3) += cache-v3.o
37obj-$(CONFIG_CPU_CACHE_V4) += cache-v4.o 36obj-$(CONFIG_CPU_CACHE_V4) += cache-v4.o
38obj-$(CONFIG_CPU_CACHE_V4WT) += cache-v4wt.o 37obj-$(CONFIG_CPU_CACHE_V4WT) += cache-v4wt.o
39obj-$(CONFIG_CPU_CACHE_V4WB) += cache-v4wb.o 38obj-$(CONFIG_CPU_CACHE_V4WB) += cache-v4wb.o
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index dd3d59122cc3..48bc3c0a87ce 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -343,6 +343,7 @@ void __init feroceon_l2_init(int __l2_wt_override)
343 outer_cache.inv_range = feroceon_l2_inv_range; 343 outer_cache.inv_range = feroceon_l2_inv_range;
344 outer_cache.clean_range = feroceon_l2_clean_range; 344 outer_cache.clean_range = feroceon_l2_clean_range;
345 outer_cache.flush_range = feroceon_l2_flush_range; 345 outer_cache.flush_range = feroceon_l2_flush_range;
346 outer_cache.inv_all = l2_inv_all;
346 347
347 enable_l2(); 348 enable_l2();
348 349
diff --git a/arch/arm/mm/cache-v3.S b/arch/arm/mm/cache-v3.S
deleted file mode 100644
index 8a3fadece8d3..000000000000
--- a/arch/arm/mm/cache-v3.S
+++ /dev/null
@@ -1,137 +0,0 @@
1/*
2 * linux/arch/arm/mm/cache-v3.S
3 *
4 * Copyright (C) 1997-2002 Russell king
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/linkage.h>
11#include <linux/init.h>
12#include <asm/page.h>
13#include "proc-macros.S"
14
15/*
16 * flush_icache_all()
17 *
18 * Unconditionally clean and invalidate the entire icache.
19 */
20ENTRY(v3_flush_icache_all)
21 mov pc, lr
22ENDPROC(v3_flush_icache_all)
23
24/*
25 * flush_user_cache_all()
26 *
27 * Invalidate all cache entries in a particular address
28 * space.
29 *
30 * - mm - mm_struct describing address space
31 */
32ENTRY(v3_flush_user_cache_all)
33 /* FALLTHROUGH */
34/*
35 * flush_kern_cache_all()
36 *
37 * Clean and invalidate the entire cache.
38 */
39ENTRY(v3_flush_kern_cache_all)
40 /* FALLTHROUGH */
41
42/*
43 * flush_user_cache_range(start, end, flags)
44 *
45 * Invalidate a range of cache entries in the specified
46 * address space.
47 *
48 * - start - start address (may not be aligned)
49 * - end - end address (exclusive, may not be aligned)
50 * - flags - vma_area_struct flags describing address space
51 */
52ENTRY(v3_flush_user_cache_range)
53 mov ip, #0
54 mcreq p15, 0, ip, c7, c0, 0 @ flush ID cache
55 mov pc, lr
56
57/*
58 * coherent_kern_range(start, end)
59 *
60 * Ensure coherency between the Icache and the Dcache in the
61 * region described by start. If you have non-snooping
62 * Harvard caches, you need to implement this function.
63 *
64 * - start - virtual start address
65 * - end - virtual end address
66 */
67ENTRY(v3_coherent_kern_range)
68 /* FALLTHROUGH */
69
70/*
71 * coherent_user_range(start, end)
72 *
73 * Ensure coherency between the Icache and the Dcache in the
74 * region described by start. If you have non-snooping
75 * Harvard caches, you need to implement this function.
76 *
77 * - start - virtual start address
78 * - end - virtual end address
79 */
80ENTRY(v3_coherent_user_range)
81 mov r0, #0
82 mov pc, lr
83
84/*
85 * flush_kern_dcache_area(void *page, size_t size)
86 *
87 * Ensure no D cache aliasing occurs, either with itself or
88 * the I cache
89 *
90 * - addr - kernel address
91 * - size - region size
92 */
93ENTRY(v3_flush_kern_dcache_area)
94 /* FALLTHROUGH */
95
96/*
97 * dma_flush_range(start, end)
98 *
99 * Clean and invalidate the specified virtual address range.
100 *
101 * - start - virtual start address
102 * - end - virtual end address
103 */
104ENTRY(v3_dma_flush_range)
105 mov r0, #0
106 mcr p15, 0, r0, c7, c0, 0 @ flush ID cache
107 mov pc, lr
108
109/*
110 * dma_unmap_area(start, size, dir)
111 * - start - kernel virtual start address
112 * - size - size of region
113 * - dir - DMA direction
114 */
115ENTRY(v3_dma_unmap_area)
116 teq r2, #DMA_TO_DEVICE
117 bne v3_dma_flush_range
118 /* FALLTHROUGH */
119
120/*
121 * dma_map_area(start, size, dir)
122 * - start - kernel virtual start address
123 * - size - size of region
124 * - dir - DMA direction
125 */
126ENTRY(v3_dma_map_area)
127 mov pc, lr
128ENDPROC(v3_dma_unmap_area)
129ENDPROC(v3_dma_map_area)
130
131 .globl v3_flush_kern_cache_louis
132 .equ v3_flush_kern_cache_louis, v3_flush_kern_cache_all
133
134 __INITDATA
135
136 @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
137 define_cache_functions v3
diff --git a/arch/arm/mm/cache-v4.S b/arch/arm/mm/cache-v4.S
index 43e5d77be677..a7ba68f59f0c 100644
--- a/arch/arm/mm/cache-v4.S
+++ b/arch/arm/mm/cache-v4.S
@@ -58,7 +58,7 @@ ENTRY(v4_flush_kern_cache_all)
58ENTRY(v4_flush_user_cache_range) 58ENTRY(v4_flush_user_cache_range)
59#ifdef CONFIG_CPU_CP15 59#ifdef CONFIG_CPU_CP15
60 mov ip, #0 60 mov ip, #0
61 mcreq p15, 0, ip, c7, c7, 0 @ flush ID cache 61 mcr p15, 0, ip, c7, c7, 0 @ flush ID cache
62 mov pc, lr 62 mov pc, lr
63#else 63#else
64 /* FALLTHROUGH */ 64 /* FALLTHROUGH */
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 78978945492a..a84ff763ac39 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -34,6 +34,7 @@
34#include <asm/mach/pci.h> 34#include <asm/mach/pci.h>
35 35
36#include "mm.h" 36#include "mm.h"
37#include "tcm.h"
37 38
38/* 39/*
39 * empty_zero_page is a special page that is used for 40 * empty_zero_page is a special page that is used for
@@ -1277,6 +1278,7 @@ void __init paging_init(struct machine_desc *mdesc)
1277 dma_contiguous_remap(); 1278 dma_contiguous_remap();
1278 devicemaps_init(mdesc); 1279 devicemaps_init(mdesc);
1279 kmap_init(); 1280 kmap_init();
1281 tcm_init();
1280 1282
1281 top_pmd = pmd_off_k(0xffff0000); 1283 top_pmd = pmd_off_k(0xffff0000);
1282 1284
diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S
index dc5de5d53f20..fde2d2a794cf 100644
--- a/arch/arm/mm/proc-arm740.S
+++ b/arch/arm/mm/proc-arm740.S
@@ -77,24 +77,27 @@ __arm740_setup:
77 mcr p15, 0, r0, c6, c0 @ set area 0, default 77 mcr p15, 0, r0, c6, c0 @ set area 0, default
78 78
79 ldr r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM 79 ldr r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM
80 ldr r1, =(CONFIG_DRAM_SIZE >> 12) @ size of RAM (must be >= 4KB) 80 ldr r3, =(CONFIG_DRAM_SIZE >> 12) @ size of RAM (must be >= 4KB)
81 mov r2, #10 @ 11 is the minimum (4KB) 81 mov r4, #10 @ 11 is the minimum (4KB)
821: add r2, r2, #1 @ area size *= 2 821: add r4, r4, #1 @ area size *= 2
83 mov r1, r1, lsr #1 83 movs r3, r3, lsr #1
84 bne 1b @ count not zero r-shift 84 bne 1b @ count not zero r-shift
85 orr r0, r0, r2, lsl #1 @ the area register value 85 orr r0, r0, r4, lsl #1 @ the area register value
86 orr r0, r0, #1 @ set enable bit 86 orr r0, r0, #1 @ set enable bit
87 mcr p15, 0, r0, c6, c1 @ set area 1, RAM 87 mcr p15, 0, r0, c6, c1 @ set area 1, RAM
88 88
89 ldr r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH 89 ldr r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH
90 ldr r1, =(CONFIG_FLASH_SIZE >> 12) @ size of FLASH (must be >= 4KB) 90 ldr r3, =(CONFIG_FLASH_SIZE >> 12) @ size of FLASH (must be >= 4KB)
91 mov r2, #10 @ 11 is the minimum (4KB) 91 cmp r3, #0
921: add r2, r2, #1 @ area size *= 2 92 moveq r0, #0
93 mov r1, r1, lsr #1 93 beq 2f
94 mov r4, #10 @ 11 is the minimum (4KB)
951: add r4, r4, #1 @ area size *= 2
96 movs r3, r3, lsr #1
94 bne 1b @ count not zero r-shift 97 bne 1b @ count not zero r-shift
95 orr r0, r0, r2, lsl #1 @ the area register value 98 orr r0, r0, r4, lsl #1 @ the area register value
96 orr r0, r0, #1 @ set enable bit 99 orr r0, r0, #1 @ set enable bit
97 mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH 1002: mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH
98 101
99 mov r0, #0x06 102 mov r0, #0x06
100 mcr p15, 0, r0, c2, c0 @ Region 1&2 cacheable 103 mcr p15, 0, r0, c2, c0 @ Region 1&2 cacheable
@@ -137,13 +140,14 @@ __arm740_proc_info:
137 .long 0x41807400 140 .long 0x41807400
138 .long 0xfffffff0 141 .long 0xfffffff0
139 .long 0 142 .long 0
143 .long 0
140 b __arm740_setup 144 b __arm740_setup
141 .long cpu_arch_name 145 .long cpu_arch_name
142 .long cpu_elf_name 146 .long cpu_elf_name
143 .long HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT 147 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_26BIT
144 .long cpu_arm740_name 148 .long cpu_arm740_name
145 .long arm740_processor_functions 149 .long arm740_processor_functions
146 .long 0 150 .long 0
147 .long 0 151 .long 0
148 .long v3_cache_fns @ cache model 152 .long v4_cache_fns @ cache model
149 .size __arm740_proc_info, . - __arm740_proc_info 153 .size __arm740_proc_info, . - __arm740_proc_info
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 2c3b9421ab5e..2556cf1c2da1 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -387,7 +387,7 @@ ENTRY(cpu_arm920_set_pte_ext)
387/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */ 387/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
388.globl cpu_arm920_suspend_size 388.globl cpu_arm920_suspend_size
389.equ cpu_arm920_suspend_size, 4 * 3 389.equ cpu_arm920_suspend_size, 4 * 3
390#ifdef CONFIG_PM_SLEEP 390#ifdef CONFIG_ARM_CPU_SUSPEND
391ENTRY(cpu_arm920_do_suspend) 391ENTRY(cpu_arm920_do_suspend)
392 stmfd sp!, {r4 - r6, lr} 392 stmfd sp!, {r4 - r6, lr}
393 mrc p15, 0, r4, c13, c0, 0 @ PID 393 mrc p15, 0, r4, c13, c0, 0 @ PID
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index f1803f7e2972..344c8a548cc0 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -402,7 +402,7 @@ ENTRY(cpu_arm926_set_pte_ext)
402/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */ 402/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
403.globl cpu_arm926_suspend_size 403.globl cpu_arm926_suspend_size
404.equ cpu_arm926_suspend_size, 4 * 3 404.equ cpu_arm926_suspend_size, 4 * 3
405#ifdef CONFIG_PM_SLEEP 405#ifdef CONFIG_ARM_CPU_SUSPEND
406ENTRY(cpu_arm926_do_suspend) 406ENTRY(cpu_arm926_do_suspend)
407 stmfd sp!, {r4 - r6, lr} 407 stmfd sp!, {r4 - r6, lr}
408 mrc p15, 0, r4, c13, c0, 0 @ PID 408 mrc p15, 0, r4, c13, c0, 0 @ PID
diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S
index 82f9cdc751d6..0b60dd3d742a 100644
--- a/arch/arm/mm/proc-mohawk.S
+++ b/arch/arm/mm/proc-mohawk.S
@@ -350,7 +350,7 @@ ENTRY(cpu_mohawk_set_pte_ext)
350 350
351.globl cpu_mohawk_suspend_size 351.globl cpu_mohawk_suspend_size
352.equ cpu_mohawk_suspend_size, 4 * 6 352.equ cpu_mohawk_suspend_size, 4 * 6
353#ifdef CONFIG_PM_SLEEP 353#ifdef CONFIG_ARM_CPU_SUSPEND
354ENTRY(cpu_mohawk_do_suspend) 354ENTRY(cpu_mohawk_do_suspend)
355 stmfd sp!, {r4 - r9, lr} 355 stmfd sp!, {r4 - r9, lr}
356 mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode 356 mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index 3aa0da11fd84..d92dfd081429 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -172,7 +172,7 @@ ENTRY(cpu_sa1100_set_pte_ext)
172 172
173.globl cpu_sa1100_suspend_size 173.globl cpu_sa1100_suspend_size
174.equ cpu_sa1100_suspend_size, 4 * 3 174.equ cpu_sa1100_suspend_size, 4 * 3
175#ifdef CONFIG_PM_SLEEP 175#ifdef CONFIG_ARM_CPU_SUSPEND
176ENTRY(cpu_sa1100_do_suspend) 176ENTRY(cpu_sa1100_do_suspend)
177 stmfd sp!, {r4 - r6, lr} 177 stmfd sp!, {r4 - r6, lr}
178 mrc p15, 0, r4, c3, c0, 0 @ domain ID 178 mrc p15, 0, r4, c3, c0, 0 @ domain ID
diff --git a/arch/arm/mm/proc-syms.c b/arch/arm/mm/proc-syms.c
index 3e6210b4d6d4..054b491ff764 100644
--- a/arch/arm/mm/proc-syms.c
+++ b/arch/arm/mm/proc-syms.c
@@ -17,7 +17,9 @@
17 17
18#ifndef MULTI_CPU 18#ifndef MULTI_CPU
19EXPORT_SYMBOL(cpu_dcache_clean_area); 19EXPORT_SYMBOL(cpu_dcache_clean_area);
20#ifdef CONFIG_MMU
20EXPORT_SYMBOL(cpu_set_pte_ext); 21EXPORT_SYMBOL(cpu_set_pte_ext);
22#endif
21#else 23#else
22EXPORT_SYMBOL(processor); 24EXPORT_SYMBOL(processor);
23#endif 25#endif
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index bcaaa8de9325..5c07ee4fe3eb 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -138,7 +138,7 @@ ENTRY(cpu_v6_set_pte_ext)
138/* Suspend/resume support: taken from arch/arm/mach-s3c64xx/sleep.S */ 138/* Suspend/resume support: taken from arch/arm/mach-s3c64xx/sleep.S */
139.globl cpu_v6_suspend_size 139.globl cpu_v6_suspend_size
140.equ cpu_v6_suspend_size, 4 * 6 140.equ cpu_v6_suspend_size, 4 * 6
141#ifdef CONFIG_PM_SLEEP 141#ifdef CONFIG_ARM_CPU_SUSPEND
142ENTRY(cpu_v6_do_suspend) 142ENTRY(cpu_v6_do_suspend)
143 stmfd sp!, {r4 - r9, lr} 143 stmfd sp!, {r4 - r9, lr}
144 mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID 144 mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index eb93d6487f35..e8efd83b6f25 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -413,7 +413,7 @@ ENTRY(cpu_xsc3_set_pte_ext)
413 413
414.globl cpu_xsc3_suspend_size 414.globl cpu_xsc3_suspend_size
415.equ cpu_xsc3_suspend_size, 4 * 6 415.equ cpu_xsc3_suspend_size, 4 * 6
416#ifdef CONFIG_PM_SLEEP 416#ifdef CONFIG_ARM_CPU_SUSPEND
417ENTRY(cpu_xsc3_do_suspend) 417ENTRY(cpu_xsc3_do_suspend)
418 stmfd sp!, {r4 - r9, lr} 418 stmfd sp!, {r4 - r9, lr}
419 mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode 419 mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index 25510361aa18..e766f889bfd6 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -528,7 +528,7 @@ ENTRY(cpu_xscale_set_pte_ext)
528 528
529.globl cpu_xscale_suspend_size 529.globl cpu_xscale_suspend_size
530.equ cpu_xscale_suspend_size, 4 * 6 530.equ cpu_xscale_suspend_size, 4 * 6
531#ifdef CONFIG_PM_SLEEP 531#ifdef CONFIG_ARM_CPU_SUSPEND
532ENTRY(cpu_xscale_do_suspend) 532ENTRY(cpu_xscale_do_suspend)
533 stmfd sp!, {r4 - r9, lr} 533 stmfd sp!, {r4 - r9, lr}
534 mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode 534 mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode
diff --git a/arch/arm/kernel/tcm.h b/arch/arm/mm/tcm.h
index 8015ad434a40..8015ad434a40 100644
--- a/arch/arm/kernel/tcm.h
+++ b/arch/arm/mm/tcm.h
diff --git a/arch/avr32/include/asm/io.h b/arch/avr32/include/asm/io.h
index cf60d0a9f176..fc6483f83ccc 100644
--- a/arch/avr32/include/asm/io.h
+++ b/arch/avr32/include/asm/io.h
@@ -165,6 +165,10 @@ BUILDIO_IOPORT(l, u32)
165#define readw_be __raw_readw 165#define readw_be __raw_readw
166#define readl_be __raw_readl 166#define readl_be __raw_readl
167 167
168#define writeb_relaxed writeb
169#define writew_relaxed writew
170#define writel_relaxed writel
171
168#define writeb_be __raw_writeb 172#define writeb_be __raw_writeb
169#define writew_be __raw_writew 173#define writew_be __raw_writew
170#define writel_be __raw_writel 174#define writel_be __raw_writel
diff --git a/arch/c6x/include/asm/irqflags.h b/arch/c6x/include/asm/irqflags.h
index cf78e09e18c3..2c71d5634ec2 100644
--- a/arch/c6x/include/asm/irqflags.h
+++ b/arch/c6x/include/asm/irqflags.h
@@ -27,7 +27,7 @@ static inline unsigned long arch_local_save_flags(void)
27/* set interrupt enabled status */ 27/* set interrupt enabled status */
28static inline void arch_local_irq_restore(unsigned long flags) 28static inline void arch_local_irq_restore(unsigned long flags)
29{ 29{
30 asm volatile (" mvc .s2 %0,CSR\n" : : "b"(flags)); 30 asm volatile (" mvc .s2 %0,CSR\n" : : "b"(flags) : "memory");
31} 31}
32 32
33/* unconditionally enable interrupts */ 33/* unconditionally enable interrupts */
diff --git a/arch/ia64/kernel/palinfo.c b/arch/ia64/kernel/palinfo.c
index 77597e5ea60a..79521d5499f9 100644
--- a/arch/ia64/kernel/palinfo.c
+++ b/arch/ia64/kernel/palinfo.c
@@ -849,17 +849,6 @@ static palinfo_entry_t palinfo_entries[]={
849 849
850#define NR_PALINFO_ENTRIES (int) ARRAY_SIZE(palinfo_entries) 850#define NR_PALINFO_ENTRIES (int) ARRAY_SIZE(palinfo_entries)
851 851
852/*
853 * this array is used to keep track of the proc entries we create. This is
854 * required in the module mode when we need to remove all entries. The procfs code
855 * does not do recursion of deletion
856 *
857 * Notes:
858 * - +1 accounts for the cpuN directory entry in /proc/pal
859 */
860#define NR_PALINFO_PROC_ENTRIES (NR_CPUS*(NR_PALINFO_ENTRIES+1))
861
862static struct proc_dir_entry *palinfo_proc_entries[NR_PALINFO_PROC_ENTRIES];
863static struct proc_dir_entry *palinfo_dir; 852static struct proc_dir_entry *palinfo_dir;
864 853
865/* 854/*
@@ -971,60 +960,32 @@ palinfo_read_entry(char *page, char **start, off_t off, int count, int *eof, voi
971static void __cpuinit 960static void __cpuinit
972create_palinfo_proc_entries(unsigned int cpu) 961create_palinfo_proc_entries(unsigned int cpu)
973{ 962{
974# define CPUSTR "cpu%d"
975
976 pal_func_cpu_u_t f; 963 pal_func_cpu_u_t f;
977 struct proc_dir_entry **pdir;
978 struct proc_dir_entry *cpu_dir; 964 struct proc_dir_entry *cpu_dir;
979 int j; 965 int j;
980 char cpustr[sizeof(CPUSTR)]; 966 char cpustr[3+4+1]; /* cpu numbers are up to 4095 on itanic */
981 967 sprintf(cpustr, "cpu%d", cpu);
982
983 /*
984 * we keep track of created entries in a depth-first order for
985 * cleanup purposes. Each entry is stored into palinfo_proc_entries
986 */
987 sprintf(cpustr,CPUSTR, cpu);
988 968
989 cpu_dir = proc_mkdir(cpustr, palinfo_dir); 969 cpu_dir = proc_mkdir(cpustr, palinfo_dir);
970 if (!cpu_dir)
971 return;
990 972
991 f.req_cpu = cpu; 973 f.req_cpu = cpu;
992 974
993 /*
994 * Compute the location to store per cpu entries
995 * We dont store the top level entry in this list, but
996 * remove it finally after removing all cpu entries.
997 */
998 pdir = &palinfo_proc_entries[cpu*(NR_PALINFO_ENTRIES+1)];
999 *pdir++ = cpu_dir;
1000 for (j=0; j < NR_PALINFO_ENTRIES; j++) { 975 for (j=0; j < NR_PALINFO_ENTRIES; j++) {
1001 f.func_id = j; 976 f.func_id = j;
1002 *pdir = create_proc_read_entry( 977 create_proc_read_entry(
1003 palinfo_entries[j].name, 0, cpu_dir, 978 palinfo_entries[j].name, 0, cpu_dir,
1004 palinfo_read_entry, (void *)f.value); 979 palinfo_read_entry, (void *)f.value);
1005 pdir++;
1006 } 980 }
1007} 981}
1008 982
1009static void 983static void
1010remove_palinfo_proc_entries(unsigned int hcpu) 984remove_palinfo_proc_entries(unsigned int hcpu)
1011{ 985{
1012 int j; 986 char cpustr[3+4+1]; /* cpu numbers are up to 4095 on itanic */
1013 struct proc_dir_entry *cpu_dir, **pdir; 987 sprintf(cpustr, "cpu%d", hcpu);
1014 988 remove_proc_subtree(cpustr, palinfo_dir);
1015 pdir = &palinfo_proc_entries[hcpu*(NR_PALINFO_ENTRIES+1)];
1016 cpu_dir = *pdir;
1017 *pdir++=NULL;
1018 for (j=0; j < (NR_PALINFO_ENTRIES); j++) {
1019 if ((*pdir)) {
1020 remove_proc_entry ((*pdir)->name, cpu_dir);
1021 *pdir ++= NULL;
1022 }
1023 }
1024
1025 if (cpu_dir) {
1026 remove_proc_entry(cpu_dir->name, palinfo_dir);
1027 }
1028} 989}
1029 990
1030static int __cpuinit palinfo_cpu_callback(struct notifier_block *nfb, 991static int __cpuinit palinfo_cpu_callback(struct notifier_block *nfb,
@@ -1058,6 +1019,8 @@ palinfo_init(void)
1058 1019
1059 printk(KERN_INFO "PAL Information Facility v%s\n", PALINFO_VERSION); 1020 printk(KERN_INFO "PAL Information Facility v%s\n", PALINFO_VERSION);
1060 palinfo_dir = proc_mkdir("pal", NULL); 1021 palinfo_dir = proc_mkdir("pal", NULL);
1022 if (!palinfo_dir)
1023 return -ENOMEM;
1061 1024
1062 /* Create palinfo dirs in /proc for all online cpus */ 1025 /* Create palinfo dirs in /proc for all online cpus */
1063 for_each_online_cpu(i) { 1026 for_each_online_cpu(i) {
@@ -1073,22 +1036,8 @@ palinfo_init(void)
1073static void __exit 1036static void __exit
1074palinfo_exit(void) 1037palinfo_exit(void)
1075{ 1038{
1076 int i = 0;
1077
1078 /* remove all nodes: depth first pass. Could optimize this */
1079 for_each_online_cpu(i) {
1080 remove_palinfo_proc_entries(i);
1081 }
1082
1083 /*
1084 * Remove the top level entry finally
1085 */
1086 remove_proc_entry(palinfo_dir->name, NULL);
1087
1088 /*
1089 * Unregister from cpu notifier callbacks
1090 */
1091 unregister_hotcpu_notifier(&palinfo_cpu_notifier); 1039 unregister_hotcpu_notifier(&palinfo_cpu_notifier);
1040 remove_proc_subtree("pal", NULL);
1092} 1041}
1093 1042
1094module_init(palinfo_init); 1043module_init(palinfo_init);
diff --git a/arch/m68k/include/asm/gpio.h b/arch/m68k/include/asm/gpio.h
index 4395ffc51fdb..8cc83431805b 100644
--- a/arch/m68k/include/asm/gpio.h
+++ b/arch/m68k/include/asm/gpio.h
@@ -86,4 +86,24 @@ static inline int gpio_cansleep(unsigned gpio)
86 return gpio < MCFGPIO_PIN_MAX ? 0 : __gpio_cansleep(gpio); 86 return gpio < MCFGPIO_PIN_MAX ? 0 : __gpio_cansleep(gpio);
87} 87}
88 88
89static inline int gpio_request_one(unsigned gpio, unsigned long flags, const char *label)
90{
91 int err;
92
93 err = gpio_request(gpio, label);
94 if (err)
95 return err;
96
97 if (flags & GPIOF_DIR_IN)
98 err = gpio_direction_input(gpio);
99 else
100 err = gpio_direction_output(gpio,
101 (flags & GPIOF_INIT_HIGH) ? 1 : 0);
102
103 if (err)
104 gpio_free(gpio);
105
106 return err;
107}
108
89#endif 109#endif
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 256c5bf0adb7..04d69c4a5ac2 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -304,7 +304,7 @@ syscall_exit_work:
304 subi r12,r12,TI_FLAGS 304 subi r12,r12,TI_FLAGS
305 305
3064: /* Anything else left to do? */ 3064: /* Anything else left to do? */
307 SET_DEFAULT_THREAD_PPR(r3, r9) /* Set thread.ppr = 3 */ 307 SET_DEFAULT_THREAD_PPR(r3, r10) /* Set thread.ppr = 3 */
308 andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP) 308 andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP)
309 beq .ret_from_except_lite 309 beq .ret_from_except_lite
310 310
@@ -657,7 +657,7 @@ resume_kernel:
657 /* Clear _TIF_EMULATE_STACK_STORE flag */ 657 /* Clear _TIF_EMULATE_STACK_STORE flag */
658 lis r11,_TIF_EMULATE_STACK_STORE@h 658 lis r11,_TIF_EMULATE_STACK_STORE@h
659 addi r5,r9,TI_FLAGS 659 addi r5,r9,TI_FLAGS
660 ldarx r4,0,r5 6600: ldarx r4,0,r5
661 andc r4,r4,r11 661 andc r4,r4,r11
662 stdcx. r4,0,r5 662 stdcx. r4,0,r5
663 bne- 0b 663 bne- 0b
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 59dd545fdde1..16e77a81ab4f 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -555,10 +555,12 @@ static inline void tm_recheckpoint_new_task(struct task_struct *new)
555 new->thread.regs->msr |= 555 new->thread.regs->msr |=
556 (MSR_FP | new->thread.fpexc_mode); 556 (MSR_FP | new->thread.fpexc_mode);
557 } 557 }
558#ifdef CONFIG_ALTIVEC
558 if (msr & MSR_VEC) { 559 if (msr & MSR_VEC) {
559 do_load_up_transact_altivec(&new->thread); 560 do_load_up_transact_altivec(&new->thread);
560 new->thread.regs->msr |= MSR_VEC; 561 new->thread.regs->msr |= MSR_VEC;
561 } 562 }
563#endif
562 /* We may as well turn on VSX too since all the state is restored now */ 564 /* We may as well turn on VSX too since all the state is restored now */
563 if (msr & MSR_VSX) 565 if (msr & MSR_VSX)
564 new->thread.regs->msr |= MSR_VSX; 566 new->thread.regs->msr |= MSR_VSX;
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index 3acb28e245b4..95068bf569ad 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -866,10 +866,12 @@ static long restore_tm_user_regs(struct pt_regs *regs,
866 do_load_up_transact_fpu(&current->thread); 866 do_load_up_transact_fpu(&current->thread);
867 regs->msr |= (MSR_FP | current->thread.fpexc_mode); 867 regs->msr |= (MSR_FP | current->thread.fpexc_mode);
868 } 868 }
869#ifdef CONFIG_ALTIVEC
869 if (msr & MSR_VEC) { 870 if (msr & MSR_VEC) {
870 do_load_up_transact_altivec(&current->thread); 871 do_load_up_transact_altivec(&current->thread);
871 regs->msr |= MSR_VEC; 872 regs->msr |= MSR_VEC;
872 } 873 }
874#endif
873 875
874 return 0; 876 return 0;
875} 877}
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index 995f8543cb57..c1794286098c 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -522,10 +522,12 @@ static long restore_tm_sigcontexts(struct pt_regs *regs,
522 do_load_up_transact_fpu(&current->thread); 522 do_load_up_transact_fpu(&current->thread);
523 regs->msr |= (MSR_FP | current->thread.fpexc_mode); 523 regs->msr |= (MSR_FP | current->thread.fpexc_mode);
524 } 524 }
525#ifdef CONFIG_ALTIVEC
525 if (msr & MSR_VEC) { 526 if (msr & MSR_VEC) {
526 do_load_up_transact_altivec(&current->thread); 527 do_load_up_transact_altivec(&current->thread);
527 regs->msr |= MSR_VEC; 528 regs->msr |= MSR_VEC;
528 } 529 }
530#endif
529 531
530 return err; 532 return err;
531} 533}
diff --git a/arch/powerpc/kernel/tm.S b/arch/powerpc/kernel/tm.S
index 84dbace657ce..2da67e7a16d5 100644
--- a/arch/powerpc/kernel/tm.S
+++ b/arch/powerpc/kernel/tm.S
@@ -309,6 +309,7 @@ _GLOBAL(tm_recheckpoint)
309 or r5, r6, r5 /* Set MSR.FP+.VSX/.VEC */ 309 or r5, r6, r5 /* Set MSR.FP+.VSX/.VEC */
310 mtmsr r5 310 mtmsr r5
311 311
312#ifdef CONFIG_ALTIVEC
312 /* FP and VEC registers: These are recheckpointed from thread.fpr[] 313 /* FP and VEC registers: These are recheckpointed from thread.fpr[]
313 * and thread.vr[] respectively. The thread.transact_fpr[] version 314 * and thread.vr[] respectively. The thread.transact_fpr[] version
314 * is more modern, and will be loaded subsequently by any FPUnavailable 315 * is more modern, and will be loaded subsequently by any FPUnavailable
@@ -323,6 +324,7 @@ _GLOBAL(tm_recheckpoint)
323 REST_32VRS(0, r5, r3) /* r5 scratch, r3 THREAD ptr */ 324 REST_32VRS(0, r5, r3) /* r5 scratch, r3 THREAD ptr */
324 ld r5, THREAD_VRSAVE(r3) 325 ld r5, THREAD_VRSAVE(r3)
325 mtspr SPRN_VRSAVE, r5 326 mtspr SPRN_VRSAVE, r5
327#endif
326 328
327dont_restore_vec: 329dont_restore_vec:
328 andi. r0, r4, MSR_FP 330 andi. r0, r4, MSR_FP
diff --git a/arch/powerpc/kvm/e500.h b/arch/powerpc/kvm/e500.h
index 41cefd43655f..33db48a8ce24 100644
--- a/arch/powerpc/kvm/e500.h
+++ b/arch/powerpc/kvm/e500.h
@@ -26,17 +26,20 @@
26#define E500_PID_NUM 3 26#define E500_PID_NUM 3
27#define E500_TLB_NUM 2 27#define E500_TLB_NUM 2
28 28
29#define E500_TLB_VALID 1 29/* entry is mapped somewhere in host TLB */
30#define E500_TLB_BITMAP 2 30#define E500_TLB_VALID (1 << 0)
31/* TLB1 entry is mapped by host TLB1, tracked by bitmaps */
32#define E500_TLB_BITMAP (1 << 1)
33/* TLB1 entry is mapped by host TLB0 */
31#define E500_TLB_TLB0 (1 << 2) 34#define E500_TLB_TLB0 (1 << 2)
32 35
33struct tlbe_ref { 36struct tlbe_ref {
34 pfn_t pfn; 37 pfn_t pfn; /* valid only for TLB0, except briefly */
35 unsigned int flags; /* E500_TLB_* */ 38 unsigned int flags; /* E500_TLB_* */
36}; 39};
37 40
38struct tlbe_priv { 41struct tlbe_priv {
39 struct tlbe_ref ref; /* TLB0 only -- TLB1 uses tlb_refs */ 42 struct tlbe_ref ref;
40}; 43};
41 44
42#ifdef CONFIG_KVM_E500V2 45#ifdef CONFIG_KVM_E500V2
@@ -63,17 +66,6 @@ struct kvmppc_vcpu_e500 {
63 66
64 unsigned int gtlb_nv[E500_TLB_NUM]; 67 unsigned int gtlb_nv[E500_TLB_NUM];
65 68
66 /*
67 * information associated with each host TLB entry --
68 * TLB1 only for now. If/when guest TLB1 entries can be
69 * mapped with host TLB0, this will be used for that too.
70 *
71 * We don't want to use this for guest TLB0 because then we'd
72 * have the overhead of doing the translation again even if
73 * the entry is still in the guest TLB (e.g. we swapped out
74 * and back, and our host TLB entries got evicted).
75 */
76 struct tlbe_ref *tlb_refs[E500_TLB_NUM];
77 unsigned int host_tlb1_nv; 69 unsigned int host_tlb1_nv;
78 70
79 u32 svr; 71 u32 svr;
diff --git a/arch/powerpc/kvm/e500_mmu_host.c b/arch/powerpc/kvm/e500_mmu_host.c
index a222edfb9a9b..1c6a9d729df4 100644
--- a/arch/powerpc/kvm/e500_mmu_host.c
+++ b/arch/powerpc/kvm/e500_mmu_host.c
@@ -193,8 +193,11 @@ void inval_gtlbe_on_host(struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel,
193 struct tlbe_ref *ref = &vcpu_e500->gtlb_priv[tlbsel][esel].ref; 193 struct tlbe_ref *ref = &vcpu_e500->gtlb_priv[tlbsel][esel].ref;
194 194
195 /* Don't bother with unmapped entries */ 195 /* Don't bother with unmapped entries */
196 if (!(ref->flags & E500_TLB_VALID)) 196 if (!(ref->flags & E500_TLB_VALID)) {
197 return; 197 WARN(ref->flags & (E500_TLB_BITMAP | E500_TLB_TLB0),
198 "%s: flags %x\n", __func__, ref->flags);
199 WARN_ON(tlbsel == 1 && vcpu_e500->g2h_tlb1_map[esel]);
200 }
198 201
199 if (tlbsel == 1 && ref->flags & E500_TLB_BITMAP) { 202 if (tlbsel == 1 && ref->flags & E500_TLB_BITMAP) {
200 u64 tmp = vcpu_e500->g2h_tlb1_map[esel]; 203 u64 tmp = vcpu_e500->g2h_tlb1_map[esel];
@@ -248,7 +251,7 @@ static inline void kvmppc_e500_ref_setup(struct tlbe_ref *ref,
248 pfn_t pfn) 251 pfn_t pfn)
249{ 252{
250 ref->pfn = pfn; 253 ref->pfn = pfn;
251 ref->flags = E500_TLB_VALID; 254 ref->flags |= E500_TLB_VALID;
252 255
253 if (tlbe_is_writable(gtlbe)) 256 if (tlbe_is_writable(gtlbe))
254 kvm_set_pfn_dirty(pfn); 257 kvm_set_pfn_dirty(pfn);
@@ -257,6 +260,7 @@ static inline void kvmppc_e500_ref_setup(struct tlbe_ref *ref,
257static inline void kvmppc_e500_ref_release(struct tlbe_ref *ref) 260static inline void kvmppc_e500_ref_release(struct tlbe_ref *ref)
258{ 261{
259 if (ref->flags & E500_TLB_VALID) { 262 if (ref->flags & E500_TLB_VALID) {
263 /* FIXME: don't log bogus pfn for TLB1 */
260 trace_kvm_booke206_ref_release(ref->pfn, ref->flags); 264 trace_kvm_booke206_ref_release(ref->pfn, ref->flags);
261 ref->flags = 0; 265 ref->flags = 0;
262 } 266 }
@@ -274,36 +278,23 @@ static void clear_tlb1_bitmap(struct kvmppc_vcpu_e500 *vcpu_e500)
274 278
275static void clear_tlb_privs(struct kvmppc_vcpu_e500 *vcpu_e500) 279static void clear_tlb_privs(struct kvmppc_vcpu_e500 *vcpu_e500)
276{ 280{
277 int tlbsel = 0; 281 int tlbsel;
278 int i;
279
280 for (i = 0; i < vcpu_e500->gtlb_params[tlbsel].entries; i++) {
281 struct tlbe_ref *ref =
282 &vcpu_e500->gtlb_priv[tlbsel][i].ref;
283 kvmppc_e500_ref_release(ref);
284 }
285}
286
287static void clear_tlb_refs(struct kvmppc_vcpu_e500 *vcpu_e500)
288{
289 int stlbsel = 1;
290 int i; 282 int i;
291 283
292 kvmppc_e500_tlbil_all(vcpu_e500); 284 for (tlbsel = 0; tlbsel <= 1; tlbsel++) {
293 285 for (i = 0; i < vcpu_e500->gtlb_params[tlbsel].entries; i++) {
294 for (i = 0; i < host_tlb_params[stlbsel].entries; i++) { 286 struct tlbe_ref *ref =
295 struct tlbe_ref *ref = 287 &vcpu_e500->gtlb_priv[tlbsel][i].ref;
296 &vcpu_e500->tlb_refs[stlbsel][i]; 288 kvmppc_e500_ref_release(ref);
297 kvmppc_e500_ref_release(ref); 289 }
298 } 290 }
299
300 clear_tlb_privs(vcpu_e500);
301} 291}
302 292
303void kvmppc_core_flush_tlb(struct kvm_vcpu *vcpu) 293void kvmppc_core_flush_tlb(struct kvm_vcpu *vcpu)
304{ 294{
305 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); 295 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
306 clear_tlb_refs(vcpu_e500); 296 kvmppc_e500_tlbil_all(vcpu_e500);
297 clear_tlb_privs(vcpu_e500);
307 clear_tlb1_bitmap(vcpu_e500); 298 clear_tlb1_bitmap(vcpu_e500);
308} 299}
309 300
@@ -458,8 +449,6 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
458 gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1); 449 gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
459 } 450 }
460 451
461 /* Drop old ref and setup new one. */
462 kvmppc_e500_ref_release(ref);
463 kvmppc_e500_ref_setup(ref, gtlbe, pfn); 452 kvmppc_e500_ref_setup(ref, gtlbe, pfn);
464 453
465 kvmppc_e500_setup_stlbe(&vcpu_e500->vcpu, gtlbe, tsize, 454 kvmppc_e500_setup_stlbe(&vcpu_e500->vcpu, gtlbe, tsize,
@@ -507,14 +496,15 @@ static int kvmppc_e500_tlb1_map_tlb1(struct kvmppc_vcpu_e500 *vcpu_e500,
507 if (unlikely(vcpu_e500->host_tlb1_nv >= tlb1_max_shadow_size())) 496 if (unlikely(vcpu_e500->host_tlb1_nv >= tlb1_max_shadow_size()))
508 vcpu_e500->host_tlb1_nv = 0; 497 vcpu_e500->host_tlb1_nv = 0;
509 498
510 vcpu_e500->tlb_refs[1][sesel] = *ref;
511 vcpu_e500->g2h_tlb1_map[esel] |= (u64)1 << sesel;
512 vcpu_e500->gtlb_priv[1][esel].ref.flags |= E500_TLB_BITMAP;
513 if (vcpu_e500->h2g_tlb1_rmap[sesel]) { 499 if (vcpu_e500->h2g_tlb1_rmap[sesel]) {
514 unsigned int idx = vcpu_e500->h2g_tlb1_rmap[sesel]; 500 unsigned int idx = vcpu_e500->h2g_tlb1_rmap[sesel] - 1;
515 vcpu_e500->g2h_tlb1_map[idx] &= ~(1ULL << sesel); 501 vcpu_e500->g2h_tlb1_map[idx] &= ~(1ULL << sesel);
516 } 502 }
517 vcpu_e500->h2g_tlb1_rmap[sesel] = esel; 503
504 vcpu_e500->gtlb_priv[1][esel].ref.flags |= E500_TLB_BITMAP;
505 vcpu_e500->g2h_tlb1_map[esel] |= (u64)1 << sesel;
506 vcpu_e500->h2g_tlb1_rmap[sesel] = esel + 1;
507 WARN_ON(!(ref->flags & E500_TLB_VALID));
518 508
519 return sesel; 509 return sesel;
520} 510}
@@ -526,13 +516,12 @@ static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500,
526 u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe, 516 u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
527 struct kvm_book3e_206_tlb_entry *stlbe, int esel) 517 struct kvm_book3e_206_tlb_entry *stlbe, int esel)
528{ 518{
529 struct tlbe_ref ref; 519 struct tlbe_ref *ref = &vcpu_e500->gtlb_priv[1][esel].ref;
530 int sesel; 520 int sesel;
531 int r; 521 int r;
532 522
533 ref.flags = 0;
534 r = kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1, stlbe, 523 r = kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1, stlbe,
535 &ref); 524 ref);
536 if (r) 525 if (r)
537 return r; 526 return r;
538 527
@@ -544,7 +533,7 @@ static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500,
544 } 533 }
545 534
546 /* Otherwise map into TLB1 */ 535 /* Otherwise map into TLB1 */
547 sesel = kvmppc_e500_tlb1_map_tlb1(vcpu_e500, &ref, esel); 536 sesel = kvmppc_e500_tlb1_map_tlb1(vcpu_e500, ref, esel);
548 write_stlbe(vcpu_e500, gtlbe, stlbe, 1, sesel); 537 write_stlbe(vcpu_e500, gtlbe, stlbe, 1, sesel);
549 538
550 return 0; 539 return 0;
@@ -565,7 +554,7 @@ void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr,
565 case 0: 554 case 0:
566 priv = &vcpu_e500->gtlb_priv[tlbsel][esel]; 555 priv = &vcpu_e500->gtlb_priv[tlbsel][esel];
567 556
568 /* Triggers after clear_tlb_refs or on initial mapping */ 557 /* Triggers after clear_tlb_privs or on initial mapping */
569 if (!(priv->ref.flags & E500_TLB_VALID)) { 558 if (!(priv->ref.flags & E500_TLB_VALID)) {
570 kvmppc_e500_tlb0_map(vcpu_e500, esel, &stlbe); 559 kvmppc_e500_tlb0_map(vcpu_e500, esel, &stlbe);
571 } else { 560 } else {
@@ -665,35 +654,16 @@ int e500_mmu_host_init(struct kvmppc_vcpu_e500 *vcpu_e500)
665 host_tlb_params[0].entries / host_tlb_params[0].ways; 654 host_tlb_params[0].entries / host_tlb_params[0].ways;
666 host_tlb_params[1].sets = 1; 655 host_tlb_params[1].sets = 1;
667 656
668 vcpu_e500->tlb_refs[0] =
669 kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[0].entries,
670 GFP_KERNEL);
671 if (!vcpu_e500->tlb_refs[0])
672 goto err;
673
674 vcpu_e500->tlb_refs[1] =
675 kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[1].entries,
676 GFP_KERNEL);
677 if (!vcpu_e500->tlb_refs[1])
678 goto err;
679
680 vcpu_e500->h2g_tlb1_rmap = kzalloc(sizeof(unsigned int) * 657 vcpu_e500->h2g_tlb1_rmap = kzalloc(sizeof(unsigned int) *
681 host_tlb_params[1].entries, 658 host_tlb_params[1].entries,
682 GFP_KERNEL); 659 GFP_KERNEL);
683 if (!vcpu_e500->h2g_tlb1_rmap) 660 if (!vcpu_e500->h2g_tlb1_rmap)
684 goto err; 661 return -EINVAL;
685 662
686 return 0; 663 return 0;
687
688err:
689 kfree(vcpu_e500->tlb_refs[0]);
690 kfree(vcpu_e500->tlb_refs[1]);
691 return -EINVAL;
692} 664}
693 665
694void e500_mmu_host_uninit(struct kvmppc_vcpu_e500 *vcpu_e500) 666void e500_mmu_host_uninit(struct kvmppc_vcpu_e500 *vcpu_e500)
695{ 667{
696 kfree(vcpu_e500->h2g_tlb1_rmap); 668 kfree(vcpu_e500->h2g_tlb1_rmap);
697 kfree(vcpu_e500->tlb_refs[0]);
698 kfree(vcpu_e500->tlb_refs[1]);
699} 669}
diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c
index 1f89d26e65fb..2f4baa074b2e 100644
--- a/arch/powerpc/kvm/e500mc.c
+++ b/arch/powerpc/kvm/e500mc.c
@@ -108,6 +108,8 @@ void kvmppc_mmu_msr_notify(struct kvm_vcpu *vcpu, u32 old_msr)
108{ 108{
109} 109}
110 110
111static DEFINE_PER_CPU(struct kvm_vcpu *, last_vcpu_on_cpu);
112
111void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 113void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
112{ 114{
113 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); 115 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
@@ -136,8 +138,11 @@ void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
136 mtspr(SPRN_GDEAR, vcpu->arch.shared->dar); 138 mtspr(SPRN_GDEAR, vcpu->arch.shared->dar);
137 mtspr(SPRN_GESR, vcpu->arch.shared->esr); 139 mtspr(SPRN_GESR, vcpu->arch.shared->esr);
138 140
139 if (vcpu->arch.oldpir != mfspr(SPRN_PIR)) 141 if (vcpu->arch.oldpir != mfspr(SPRN_PIR) ||
142 __get_cpu_var(last_vcpu_on_cpu) != vcpu) {
140 kvmppc_e500_tlbil_all(vcpu_e500); 143 kvmppc_e500_tlbil_all(vcpu_e500);
144 __get_cpu_var(last_vcpu_on_cpu) = vcpu;
145 }
141 146
142 kvmppc_load_guest_fp(vcpu); 147 kvmppc_load_guest_fp(vcpu);
143} 148}
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c
index 0da39fed355a..299731e9036b 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -186,7 +186,13 @@ static long pSeries_lpar_hpte_remove(unsigned long hpte_group)
186 (0x1UL << 4), &dummy1, &dummy2); 186 (0x1UL << 4), &dummy1, &dummy2);
187 if (lpar_rc == H_SUCCESS) 187 if (lpar_rc == H_SUCCESS)
188 return i; 188 return i;
189 BUG_ON(lpar_rc != H_NOT_FOUND); 189
190 /*
191 * The test for adjunct partition is performed before the
192 * ANDCOND test. H_RESOURCE may be returned, so we need to
193 * check for that as well.
194 */
195 BUG_ON(lpar_rc != H_NOT_FOUND && lpar_rc != H_RESOURCE);
190 196
191 slot_offset++; 197 slot_offset++;
192 slot_offset &= 0x7; 198 slot_offset &= 0x7;
diff --git a/arch/s390/include/asm/io.h b/arch/s390/include/asm/io.h
index 27cb32185ce1..379d96e2105e 100644
--- a/arch/s390/include/asm/io.h
+++ b/arch/s390/include/asm/io.h
@@ -50,10 +50,6 @@ void unxlate_dev_mem_ptr(unsigned long phys, void *addr);
50#define ioremap_nocache(addr, size) ioremap(addr, size) 50#define ioremap_nocache(addr, size) ioremap(addr, size)
51#define ioremap_wc ioremap_nocache 51#define ioremap_wc ioremap_nocache
52 52
53/* TODO: s390 cannot support io_remap_pfn_range... */
54#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
55 remap_pfn_range(vma, vaddr, pfn, size, prot)
56
57static inline void __iomem *ioremap(unsigned long offset, unsigned long size) 53static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
58{ 54{
59 return (void __iomem *) offset; 55 return (void __iomem *) offset;
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index 4a5443118cfb..3cb47cf02530 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -57,6 +57,10 @@ extern unsigned long zero_page_mask;
57 (((unsigned long)(vaddr)) &zero_page_mask)))) 57 (((unsigned long)(vaddr)) &zero_page_mask))))
58#define __HAVE_COLOR_ZERO_PAGE 58#define __HAVE_COLOR_ZERO_PAGE
59 59
60/* TODO: s390 cannot support io_remap_pfn_range... */
61#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
62 remap_pfn_range(vma, vaddr, pfn, size, prot)
63
60#endif /* !__ASSEMBLY__ */ 64#endif /* !__ASSEMBLY__ */
61 65
62/* 66/*
diff --git a/arch/sparc/include/asm/Kbuild b/arch/sparc/include/asm/Kbuild
index e26d430ce2fd..ff18e3cfb6b1 100644
--- a/arch/sparc/include/asm/Kbuild
+++ b/arch/sparc/include/asm/Kbuild
@@ -2,11 +2,16 @@
2 2
3 3
4generic-y += clkdev.h 4generic-y += clkdev.h
5generic-y += cputime.h
5generic-y += div64.h 6generic-y += div64.h
7generic-y += emergency-restart.h
6generic-y += exec.h 8generic-y += exec.h
7generic-y += local64.h 9generic-y += local64.h
10generic-y += mutex.h
8generic-y += irq_regs.h 11generic-y += irq_regs.h
9generic-y += local.h 12generic-y += local.h
10generic-y += module.h 13generic-y += module.h
14generic-y += serial.h
11generic-y += trace_clock.h 15generic-y += trace_clock.h
16generic-y += types.h
12generic-y += word-at-a-time.h 17generic-y += word-at-a-time.h
diff --git a/arch/sparc/include/asm/cputime.h b/arch/sparc/include/asm/cputime.h
deleted file mode 100644
index 1a642b81e019..000000000000
--- a/arch/sparc/include/asm/cputime.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __SPARC_CPUTIME_H
2#define __SPARC_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* __SPARC_CPUTIME_H */
diff --git a/arch/sparc/include/asm/emergency-restart.h b/arch/sparc/include/asm/emergency-restart.h
deleted file mode 100644
index 108d8c48e42e..000000000000
--- a/arch/sparc/include/asm/emergency-restart.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_EMERGENCY_RESTART_H
2#define _ASM_EMERGENCY_RESTART_H
3
4#include <asm-generic/emergency-restart.h>
5
6#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/arch/sparc/include/asm/mutex.h b/arch/sparc/include/asm/mutex.h
deleted file mode 100644
index 458c1f7fbc18..000000000000
--- a/arch/sparc/include/asm/mutex.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/*
2 * Pull in the generic implementation for the mutex fastpath.
3 *
4 * TODO: implement optimized primitives instead, or leave the generic
5 * implementation in place, or pick the atomic_xchg() based generic
6 * implementation. (see asm-generic/mutex-xchg.h for details)
7 */
8
9#include <asm-generic/mutex-dec.h>
diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h
index 08fcce90316b..7619f2f792af 100644
--- a/arch/sparc/include/asm/pgtable_64.h
+++ b/arch/sparc/include/asm/pgtable_64.h
@@ -915,6 +915,7 @@ static inline int io_remap_pfn_range(struct vm_area_struct *vma,
915 return remap_pfn_range(vma, from, phys_base >> PAGE_SHIFT, size, prot); 915 return remap_pfn_range(vma, from, phys_base >> PAGE_SHIFT, size, prot);
916} 916}
917 917
918#include <asm/tlbflush.h>
918#include <asm-generic/pgtable.h> 919#include <asm-generic/pgtable.h>
919 920
920/* We provide our own get_unmapped_area to cope with VA holes and 921/* We provide our own get_unmapped_area to cope with VA holes and
diff --git a/arch/sparc/include/asm/serial.h b/arch/sparc/include/asm/serial.h
deleted file mode 100644
index f90d61c28059..000000000000
--- a/arch/sparc/include/asm/serial.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __SPARC_SERIAL_H
2#define __SPARC_SERIAL_H
3
4#define BASE_BAUD ( 1843200 / 16 )
5
6#endif /* __SPARC_SERIAL_H */
diff --git a/arch/sparc/include/asm/smp_32.h b/arch/sparc/include/asm/smp_32.h
index b73da3c5f10a..3c8917f054de 100644
--- a/arch/sparc/include/asm/smp_32.h
+++ b/arch/sparc/include/asm/smp_32.h
@@ -36,7 +36,6 @@ typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long,
36 unsigned long, unsigned long); 36 unsigned long, unsigned long);
37 37
38void cpu_panic(void); 38void cpu_panic(void);
39extern void smp4m_irq_rotate(int cpu);
40 39
41/* 40/*
42 * General functions that each host system must provide. 41 * General functions that each host system must provide.
@@ -46,7 +45,6 @@ void sun4m_init_smp(void);
46void sun4d_init_smp(void); 45void sun4d_init_smp(void);
47 46
48void smp_callin(void); 47void smp_callin(void);
49void smp_boot_cpus(void);
50void smp_store_cpu_info(int); 48void smp_store_cpu_info(int);
51 49
52void smp_resched_interrupt(void); 50void smp_resched_interrupt(void);
@@ -107,9 +105,6 @@ extern int hard_smp_processor_id(void);
107 105
108#define raw_smp_processor_id() (current_thread_info()->cpu) 106#define raw_smp_processor_id() (current_thread_info()->cpu)
109 107
110#define prof_multiplier(__cpu) cpu_data(__cpu).multiplier
111#define prof_counter(__cpu) cpu_data(__cpu).counter
112
113void smp_setup_cpu_possible_map(void); 108void smp_setup_cpu_possible_map(void);
114 109
115#endif /* !(__ASSEMBLY__) */ 110#endif /* !(__ASSEMBLY__) */
diff --git a/arch/sparc/include/asm/switch_to_64.h b/arch/sparc/include/asm/switch_to_64.h
index cad36f56fa03..c7de3323819c 100644
--- a/arch/sparc/include/asm/switch_to_64.h
+++ b/arch/sparc/include/asm/switch_to_64.h
@@ -18,8 +18,7 @@ do { \
18 * and 2 stores in this critical code path. -DaveM 18 * and 2 stores in this critical code path. -DaveM
19 */ 19 */
20#define switch_to(prev, next, last) \ 20#define switch_to(prev, next, last) \
21do { flush_tlb_pending(); \ 21do { save_and_clear_fpu(); \
22 save_and_clear_fpu(); \
23 /* If you are tempted to conditionalize the following */ \ 22 /* If you are tempted to conditionalize the following */ \
24 /* so that ASI is only written if it changes, think again. */ \ 23 /* so that ASI is only written if it changes, think again. */ \
25 __asm__ __volatile__("wr %%g0, %0, %%asi" \ 24 __asm__ __volatile__("wr %%g0, %0, %%asi" \
diff --git a/arch/sparc/include/asm/tlbflush_64.h b/arch/sparc/include/asm/tlbflush_64.h
index 2ef463494153..f0d6a9700f4c 100644
--- a/arch/sparc/include/asm/tlbflush_64.h
+++ b/arch/sparc/include/asm/tlbflush_64.h
@@ -11,24 +11,40 @@
11struct tlb_batch { 11struct tlb_batch {
12 struct mm_struct *mm; 12 struct mm_struct *mm;
13 unsigned long tlb_nr; 13 unsigned long tlb_nr;
14 unsigned long active;
14 unsigned long vaddrs[TLB_BATCH_NR]; 15 unsigned long vaddrs[TLB_BATCH_NR];
15}; 16};
16 17
17extern void flush_tsb_kernel_range(unsigned long start, unsigned long end); 18extern void flush_tsb_kernel_range(unsigned long start, unsigned long end);
18extern void flush_tsb_user(struct tlb_batch *tb); 19extern void flush_tsb_user(struct tlb_batch *tb);
20extern void flush_tsb_user_page(struct mm_struct *mm, unsigned long vaddr);
19 21
20/* TLB flush operations. */ 22/* TLB flush operations. */
21 23
22extern void flush_tlb_pending(void); 24static inline void flush_tlb_mm(struct mm_struct *mm)
25{
26}
27
28static inline void flush_tlb_page(struct vm_area_struct *vma,
29 unsigned long vmaddr)
30{
31}
32
33static inline void flush_tlb_range(struct vm_area_struct *vma,
34 unsigned long start, unsigned long end)
35{
36}
37
38#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
23 39
24#define flush_tlb_range(vma,start,end) \ 40extern void flush_tlb_pending(void);
25 do { (void)(start); flush_tlb_pending(); } while (0) 41extern void arch_enter_lazy_mmu_mode(void);
26#define flush_tlb_page(vma,addr) flush_tlb_pending() 42extern void arch_leave_lazy_mmu_mode(void);
27#define flush_tlb_mm(mm) flush_tlb_pending() 43#define arch_flush_lazy_mmu_mode() do {} while (0)
28 44
29/* Local cpu only. */ 45/* Local cpu only. */
30extern void __flush_tlb_all(void); 46extern void __flush_tlb_all(void);
31 47extern void __flush_tlb_page(unsigned long context, unsigned long vaddr);
32extern void __flush_tlb_kernel_range(unsigned long start, unsigned long end); 48extern void __flush_tlb_kernel_range(unsigned long start, unsigned long end);
33 49
34#ifndef CONFIG_SMP 50#ifndef CONFIG_SMP
@@ -38,15 +54,24 @@ do { flush_tsb_kernel_range(start,end); \
38 __flush_tlb_kernel_range(start,end); \ 54 __flush_tlb_kernel_range(start,end); \
39} while (0) 55} while (0)
40 56
57static inline void global_flush_tlb_page(struct mm_struct *mm, unsigned long vaddr)
58{
59 __flush_tlb_page(CTX_HWBITS(mm->context), vaddr);
60}
61
41#else /* CONFIG_SMP */ 62#else /* CONFIG_SMP */
42 63
43extern void smp_flush_tlb_kernel_range(unsigned long start, unsigned long end); 64extern void smp_flush_tlb_kernel_range(unsigned long start, unsigned long end);
65extern void smp_flush_tlb_page(struct mm_struct *mm, unsigned long vaddr);
44 66
45#define flush_tlb_kernel_range(start, end) \ 67#define flush_tlb_kernel_range(start, end) \
46do { flush_tsb_kernel_range(start,end); \ 68do { flush_tsb_kernel_range(start,end); \
47 smp_flush_tlb_kernel_range(start, end); \ 69 smp_flush_tlb_kernel_range(start, end); \
48} while (0) 70} while (0)
49 71
72#define global_flush_tlb_page(mm, vaddr) \
73 smp_flush_tlb_page(mm, vaddr)
74
50#endif /* ! CONFIG_SMP */ 75#endif /* ! CONFIG_SMP */
51 76
52#endif /* _SPARC64_TLBFLUSH_H */ 77#endif /* _SPARC64_TLBFLUSH_H */
diff --git a/arch/sparc/include/uapi/asm/Kbuild b/arch/sparc/include/uapi/asm/Kbuild
index ce175aff71b7..b5843ee09fb5 100644
--- a/arch/sparc/include/uapi/asm/Kbuild
+++ b/arch/sparc/include/uapi/asm/Kbuild
@@ -44,7 +44,6 @@ header-y += swab.h
44header-y += termbits.h 44header-y += termbits.h
45header-y += termios.h 45header-y += termios.h
46header-y += traps.h 46header-y += traps.h
47header-y += types.h
48header-y += uctx.h 47header-y += uctx.h
49header-y += unistd.h 48header-y += unistd.h
50header-y += utrap.h 49header-y += utrap.h
diff --git a/arch/sparc/include/uapi/asm/types.h b/arch/sparc/include/uapi/asm/types.h
deleted file mode 100644
index 383d156cde9c..000000000000
--- a/arch/sparc/include/uapi/asm/types.h
+++ /dev/null
@@ -1,17 +0,0 @@
1#ifndef _SPARC_TYPES_H
2#define _SPARC_TYPES_H
3/*
4 * This file is never included by application software unless
5 * explicitly requested (e.g., via linux/types.h) in which case the
6 * application is Linux specific so (user-) name space pollution is
7 * not a major issue. However, for interoperability, libraries still
8 * need to be careful to avoid a name clashes.
9 */
10
11#if defined(__sparc__)
12
13#include <asm-generic/int-ll64.h>
14
15#endif /* defined(__sparc__) */
16
17#endif /* defined(_SPARC_TYPES_H) */
diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c
index 537eb66abd06..ca64d2a86ec0 100644
--- a/arch/sparc/kernel/smp_64.c
+++ b/arch/sparc/kernel/smp_64.c
@@ -849,7 +849,7 @@ void smp_tsb_sync(struct mm_struct *mm)
849} 849}
850 850
851extern unsigned long xcall_flush_tlb_mm; 851extern unsigned long xcall_flush_tlb_mm;
852extern unsigned long xcall_flush_tlb_pending; 852extern unsigned long xcall_flush_tlb_page;
853extern unsigned long xcall_flush_tlb_kernel_range; 853extern unsigned long xcall_flush_tlb_kernel_range;
854extern unsigned long xcall_fetch_glob_regs; 854extern unsigned long xcall_fetch_glob_regs;
855extern unsigned long xcall_fetch_glob_pmu; 855extern unsigned long xcall_fetch_glob_pmu;
@@ -1074,23 +1074,56 @@ local_flush_and_out:
1074 put_cpu(); 1074 put_cpu();
1075} 1075}
1076 1076
1077struct tlb_pending_info {
1078 unsigned long ctx;
1079 unsigned long nr;
1080 unsigned long *vaddrs;
1081};
1082
1083static void tlb_pending_func(void *info)
1084{
1085 struct tlb_pending_info *t = info;
1086
1087 __flush_tlb_pending(t->ctx, t->nr, t->vaddrs);
1088}
1089
1077void smp_flush_tlb_pending(struct mm_struct *mm, unsigned long nr, unsigned long *vaddrs) 1090void smp_flush_tlb_pending(struct mm_struct *mm, unsigned long nr, unsigned long *vaddrs)
1078{ 1091{
1079 u32 ctx = CTX_HWBITS(mm->context); 1092 u32 ctx = CTX_HWBITS(mm->context);
1093 struct tlb_pending_info info;
1080 int cpu = get_cpu(); 1094 int cpu = get_cpu();
1081 1095
1096 info.ctx = ctx;
1097 info.nr = nr;
1098 info.vaddrs = vaddrs;
1099
1082 if (mm == current->mm && atomic_read(&mm->mm_users) == 1) 1100 if (mm == current->mm && atomic_read(&mm->mm_users) == 1)
1083 cpumask_copy(mm_cpumask(mm), cpumask_of(cpu)); 1101 cpumask_copy(mm_cpumask(mm), cpumask_of(cpu));
1084 else 1102 else
1085 smp_cross_call_masked(&xcall_flush_tlb_pending, 1103 smp_call_function_many(mm_cpumask(mm), tlb_pending_func,
1086 ctx, nr, (unsigned long) vaddrs, 1104 &info, 1);
1087 mm_cpumask(mm));
1088 1105
1089 __flush_tlb_pending(ctx, nr, vaddrs); 1106 __flush_tlb_pending(ctx, nr, vaddrs);
1090 1107
1091 put_cpu(); 1108 put_cpu();
1092} 1109}
1093 1110
1111void smp_flush_tlb_page(struct mm_struct *mm, unsigned long vaddr)
1112{
1113 unsigned long context = CTX_HWBITS(mm->context);
1114 int cpu = get_cpu();
1115
1116 if (mm == current->mm && atomic_read(&mm->mm_users) == 1)
1117 cpumask_copy(mm_cpumask(mm), cpumask_of(cpu));
1118 else
1119 smp_cross_call_masked(&xcall_flush_tlb_page,
1120 context, vaddr, 0,
1121 mm_cpumask(mm));
1122 __flush_tlb_page(context, vaddr);
1123
1124 put_cpu();
1125}
1126
1094void smp_flush_tlb_kernel_range(unsigned long start, unsigned long end) 1127void smp_flush_tlb_kernel_range(unsigned long start, unsigned long end)
1095{ 1128{
1096 start &= PAGE_MASK; 1129 start &= PAGE_MASK;
diff --git a/arch/sparc/lib/bitext.c b/arch/sparc/lib/bitext.c
index 48d00e72ce15..8ec4e9c0251a 100644
--- a/arch/sparc/lib/bitext.c
+++ b/arch/sparc/lib/bitext.c
@@ -119,11 +119,7 @@ void bit_map_clear(struct bit_map *t, int offset, int len)
119 119
120void bit_map_init(struct bit_map *t, unsigned long *map, int size) 120void bit_map_init(struct bit_map *t, unsigned long *map, int size)
121{ 121{
122 122 bitmap_zero(map, size);
123 if ((size & 07) != 0)
124 BUG();
125 memset(map, 0, size>>3);
126
127 memset(t, 0, sizeof *t); 123 memset(t, 0, sizeof *t);
128 spin_lock_init(&t->lock); 124 spin_lock_init(&t->lock);
129 t->map = map; 125 t->map = map;
diff --git a/arch/sparc/mm/iommu.c b/arch/sparc/mm/iommu.c
index 0f4f7191fbba..28f96f27c768 100644
--- a/arch/sparc/mm/iommu.c
+++ b/arch/sparc/mm/iommu.c
@@ -34,7 +34,7 @@
34#define IOMMU_RNGE IOMMU_RNGE_256MB 34#define IOMMU_RNGE IOMMU_RNGE_256MB
35#define IOMMU_START 0xF0000000 35#define IOMMU_START 0xF0000000
36#define IOMMU_WINSIZE (256*1024*1024U) 36#define IOMMU_WINSIZE (256*1024*1024U)
37#define IOMMU_NPTES (IOMMU_WINSIZE/PAGE_SIZE) /* 64K PTEs, 265KB */ 37#define IOMMU_NPTES (IOMMU_WINSIZE/PAGE_SIZE) /* 64K PTEs, 256KB */
38#define IOMMU_ORDER 6 /* 4096 * (1<<6) */ 38#define IOMMU_ORDER 6 /* 4096 * (1<<6) */
39 39
40/* srmmu.c */ 40/* srmmu.c */
diff --git a/arch/sparc/mm/srmmu.c b/arch/sparc/mm/srmmu.c
index c38bb72e3e80..036c2797dece 100644
--- a/arch/sparc/mm/srmmu.c
+++ b/arch/sparc/mm/srmmu.c
@@ -280,7 +280,9 @@ static void __init srmmu_nocache_init(void)
280 SRMMU_NOCACHE_ALIGN_MAX, 0UL); 280 SRMMU_NOCACHE_ALIGN_MAX, 0UL);
281 memset(srmmu_nocache_pool, 0, srmmu_nocache_size); 281 memset(srmmu_nocache_pool, 0, srmmu_nocache_size);
282 282
283 srmmu_nocache_bitmap = __alloc_bootmem(bitmap_bits >> 3, SMP_CACHE_BYTES, 0UL); 283 srmmu_nocache_bitmap =
284 __alloc_bootmem(BITS_TO_LONGS(bitmap_bits) * sizeof(long),
285 SMP_CACHE_BYTES, 0UL);
284 bit_map_init(&srmmu_nocache_map, srmmu_nocache_bitmap, bitmap_bits); 286 bit_map_init(&srmmu_nocache_map, srmmu_nocache_bitmap, bitmap_bits);
285 287
286 srmmu_swapper_pg_dir = __srmmu_get_nocache(SRMMU_PGD_TABLE_SIZE, SRMMU_PGD_TABLE_SIZE); 288 srmmu_swapper_pg_dir = __srmmu_get_nocache(SRMMU_PGD_TABLE_SIZE, SRMMU_PGD_TABLE_SIZE);
diff --git a/arch/sparc/mm/tlb.c b/arch/sparc/mm/tlb.c
index ba6ae7ffdc2c..272aa4f7657e 100644
--- a/arch/sparc/mm/tlb.c
+++ b/arch/sparc/mm/tlb.c
@@ -24,11 +24,17 @@ static DEFINE_PER_CPU(struct tlb_batch, tlb_batch);
24void flush_tlb_pending(void) 24void flush_tlb_pending(void)
25{ 25{
26 struct tlb_batch *tb = &get_cpu_var(tlb_batch); 26 struct tlb_batch *tb = &get_cpu_var(tlb_batch);
27 struct mm_struct *mm = tb->mm;
27 28
28 if (tb->tlb_nr) { 29 if (!tb->tlb_nr)
29 flush_tsb_user(tb); 30 goto out;
30 31
31 if (CTX_VALID(tb->mm->context)) { 32 flush_tsb_user(tb);
33
34 if (CTX_VALID(mm->context)) {
35 if (tb->tlb_nr == 1) {
36 global_flush_tlb_page(mm, tb->vaddrs[0]);
37 } else {
32#ifdef CONFIG_SMP 38#ifdef CONFIG_SMP
33 smp_flush_tlb_pending(tb->mm, tb->tlb_nr, 39 smp_flush_tlb_pending(tb->mm, tb->tlb_nr,
34 &tb->vaddrs[0]); 40 &tb->vaddrs[0]);
@@ -37,12 +43,30 @@ void flush_tlb_pending(void)
37 tb->tlb_nr, &tb->vaddrs[0]); 43 tb->tlb_nr, &tb->vaddrs[0]);
38#endif 44#endif
39 } 45 }
40 tb->tlb_nr = 0;
41 } 46 }
42 47
48 tb->tlb_nr = 0;
49
50out:
43 put_cpu_var(tlb_batch); 51 put_cpu_var(tlb_batch);
44} 52}
45 53
54void arch_enter_lazy_mmu_mode(void)
55{
56 struct tlb_batch *tb = &__get_cpu_var(tlb_batch);
57
58 tb->active = 1;
59}
60
61void arch_leave_lazy_mmu_mode(void)
62{
63 struct tlb_batch *tb = &__get_cpu_var(tlb_batch);
64
65 if (tb->tlb_nr)
66 flush_tlb_pending();
67 tb->active = 0;
68}
69
46static void tlb_batch_add_one(struct mm_struct *mm, unsigned long vaddr, 70static void tlb_batch_add_one(struct mm_struct *mm, unsigned long vaddr,
47 bool exec) 71 bool exec)
48{ 72{
@@ -60,6 +84,12 @@ static void tlb_batch_add_one(struct mm_struct *mm, unsigned long vaddr,
60 nr = 0; 84 nr = 0;
61 } 85 }
62 86
87 if (!tb->active) {
88 global_flush_tlb_page(mm, vaddr);
89 flush_tsb_user_page(mm, vaddr);
90 return;
91 }
92
63 if (nr == 0) 93 if (nr == 0)
64 tb->mm = mm; 94 tb->mm = mm;
65 95
diff --git a/arch/sparc/mm/tsb.c b/arch/sparc/mm/tsb.c
index 428982b9becf..2cc3bce5ee91 100644
--- a/arch/sparc/mm/tsb.c
+++ b/arch/sparc/mm/tsb.c
@@ -7,11 +7,10 @@
7#include <linux/preempt.h> 7#include <linux/preempt.h>
8#include <linux/slab.h> 8#include <linux/slab.h>
9#include <asm/page.h> 9#include <asm/page.h>
10#include <asm/tlbflush.h>
11#include <asm/tlb.h>
12#include <asm/mmu_context.h>
13#include <asm/pgtable.h> 10#include <asm/pgtable.h>
11#include <asm/mmu_context.h>
14#include <asm/tsb.h> 12#include <asm/tsb.h>
13#include <asm/tlb.h>
15#include <asm/oplib.h> 14#include <asm/oplib.h>
16 15
17extern struct tsb swapper_tsb[KERNEL_TSB_NENTRIES]; 16extern struct tsb swapper_tsb[KERNEL_TSB_NENTRIES];
@@ -46,23 +45,27 @@ void flush_tsb_kernel_range(unsigned long start, unsigned long end)
46 } 45 }
47} 46}
48 47
49static void __flush_tsb_one(struct tlb_batch *tb, unsigned long hash_shift, 48static void __flush_tsb_one_entry(unsigned long tsb, unsigned long v,
50 unsigned long tsb, unsigned long nentries) 49 unsigned long hash_shift,
50 unsigned long nentries)
51{ 51{
52 unsigned long i; 52 unsigned long tag, ent, hash;
53 53
54 for (i = 0; i < tb->tlb_nr; i++) { 54 v &= ~0x1UL;
55 unsigned long v = tb->vaddrs[i]; 55 hash = tsb_hash(v, hash_shift, nentries);
56 unsigned long tag, ent, hash; 56 ent = tsb + (hash * sizeof(struct tsb));
57 tag = (v >> 22UL);
57 58
58 v &= ~0x1UL; 59 tsb_flush(ent, tag);
60}
59 61
60 hash = tsb_hash(v, hash_shift, nentries); 62static void __flush_tsb_one(struct tlb_batch *tb, unsigned long hash_shift,
61 ent = tsb + (hash * sizeof(struct tsb)); 63 unsigned long tsb, unsigned long nentries)
62 tag = (v >> 22UL); 64{
65 unsigned long i;
63 66
64 tsb_flush(ent, tag); 67 for (i = 0; i < tb->tlb_nr; i++)
65 } 68 __flush_tsb_one_entry(tsb, tb->vaddrs[i], hash_shift, nentries);
66} 69}
67 70
68void flush_tsb_user(struct tlb_batch *tb) 71void flush_tsb_user(struct tlb_batch *tb)
@@ -90,6 +93,30 @@ void flush_tsb_user(struct tlb_batch *tb)
90 spin_unlock_irqrestore(&mm->context.lock, flags); 93 spin_unlock_irqrestore(&mm->context.lock, flags);
91} 94}
92 95
96void flush_tsb_user_page(struct mm_struct *mm, unsigned long vaddr)
97{
98 unsigned long nentries, base, flags;
99
100 spin_lock_irqsave(&mm->context.lock, flags);
101
102 base = (unsigned long) mm->context.tsb_block[MM_TSB_BASE].tsb;
103 nentries = mm->context.tsb_block[MM_TSB_BASE].tsb_nentries;
104 if (tlb_type == cheetah_plus || tlb_type == hypervisor)
105 base = __pa(base);
106 __flush_tsb_one_entry(base, vaddr, PAGE_SHIFT, nentries);
107
108#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
109 if (mm->context.tsb_block[MM_TSB_HUGE].tsb) {
110 base = (unsigned long) mm->context.tsb_block[MM_TSB_HUGE].tsb;
111 nentries = mm->context.tsb_block[MM_TSB_HUGE].tsb_nentries;
112 if (tlb_type == cheetah_plus || tlb_type == hypervisor)
113 base = __pa(base);
114 __flush_tsb_one_entry(base, vaddr, HPAGE_SHIFT, nentries);
115 }
116#endif
117 spin_unlock_irqrestore(&mm->context.lock, flags);
118}
119
93#define HV_PGSZ_IDX_BASE HV_PGSZ_IDX_8K 120#define HV_PGSZ_IDX_BASE HV_PGSZ_IDX_8K
94#define HV_PGSZ_MASK_BASE HV_PGSZ_MASK_8K 121#define HV_PGSZ_MASK_BASE HV_PGSZ_MASK_8K
95 122
diff --git a/arch/sparc/mm/ultra.S b/arch/sparc/mm/ultra.S
index f8e13d421fcb..432aa0cb1b38 100644
--- a/arch/sparc/mm/ultra.S
+++ b/arch/sparc/mm/ultra.S
@@ -53,6 +53,33 @@ __flush_tlb_mm: /* 18 insns */
53 nop 53 nop
54 54
55 .align 32 55 .align 32
56 .globl __flush_tlb_page
57__flush_tlb_page: /* 22 insns */
58 /* %o0 = context, %o1 = vaddr */
59 rdpr %pstate, %g7
60 andn %g7, PSTATE_IE, %g2
61 wrpr %g2, %pstate
62 mov SECONDARY_CONTEXT, %o4
63 ldxa [%o4] ASI_DMMU, %g2
64 stxa %o0, [%o4] ASI_DMMU
65 andcc %o1, 1, %g0
66 andn %o1, 1, %o3
67 be,pn %icc, 1f
68 or %o3, 0x10, %o3
69 stxa %g0, [%o3] ASI_IMMU_DEMAP
701: stxa %g0, [%o3] ASI_DMMU_DEMAP
71 membar #Sync
72 stxa %g2, [%o4] ASI_DMMU
73 sethi %hi(KERNBASE), %o4
74 flush %o4
75 retl
76 wrpr %g7, 0x0, %pstate
77 nop
78 nop
79 nop
80 nop
81
82 .align 32
56 .globl __flush_tlb_pending 83 .globl __flush_tlb_pending
57__flush_tlb_pending: /* 26 insns */ 84__flush_tlb_pending: /* 26 insns */
58 /* %o0 = context, %o1 = nr, %o2 = vaddrs[] */ 85 /* %o0 = context, %o1 = nr, %o2 = vaddrs[] */
@@ -203,6 +230,31 @@ __cheetah_flush_tlb_mm: /* 19 insns */
203 retl 230 retl
204 wrpr %g7, 0x0, %pstate 231 wrpr %g7, 0x0, %pstate
205 232
233__cheetah_flush_tlb_page: /* 22 insns */
234 /* %o0 = context, %o1 = vaddr */
235 rdpr %pstate, %g7
236 andn %g7, PSTATE_IE, %g2
237 wrpr %g2, 0x0, %pstate
238 wrpr %g0, 1, %tl
239 mov PRIMARY_CONTEXT, %o4
240 ldxa [%o4] ASI_DMMU, %g2
241 srlx %g2, CTX_PGSZ1_NUC_SHIFT, %o3
242 sllx %o3, CTX_PGSZ1_NUC_SHIFT, %o3
243 or %o0, %o3, %o0 /* Preserve nucleus page size fields */
244 stxa %o0, [%o4] ASI_DMMU
245 andcc %o1, 1, %g0
246 be,pn %icc, 1f
247 andn %o1, 1, %o3
248 stxa %g0, [%o3] ASI_IMMU_DEMAP
2491: stxa %g0, [%o3] ASI_DMMU_DEMAP
250 membar #Sync
251 stxa %g2, [%o4] ASI_DMMU
252 sethi %hi(KERNBASE), %o4
253 flush %o4
254 wrpr %g0, 0, %tl
255 retl
256 wrpr %g7, 0x0, %pstate
257
206__cheetah_flush_tlb_pending: /* 27 insns */ 258__cheetah_flush_tlb_pending: /* 27 insns */
207 /* %o0 = context, %o1 = nr, %o2 = vaddrs[] */ 259 /* %o0 = context, %o1 = nr, %o2 = vaddrs[] */
208 rdpr %pstate, %g7 260 rdpr %pstate, %g7
@@ -269,6 +321,20 @@ __hypervisor_flush_tlb_mm: /* 10 insns */
269 retl 321 retl
270 nop 322 nop
271 323
324__hypervisor_flush_tlb_page: /* 11 insns */
325 /* %o0 = context, %o1 = vaddr */
326 mov %o0, %g2
327 mov %o1, %o0 /* ARG0: vaddr + IMMU-bit */
328 mov %g2, %o1 /* ARG1: mmu context */
329 mov HV_MMU_ALL, %o2 /* ARG2: flags */
330 srlx %o0, PAGE_SHIFT, %o0
331 sllx %o0, PAGE_SHIFT, %o0
332 ta HV_MMU_UNMAP_ADDR_TRAP
333 brnz,pn %o0, __hypervisor_tlb_tl0_error
334 mov HV_MMU_UNMAP_ADDR_TRAP, %o1
335 retl
336 nop
337
272__hypervisor_flush_tlb_pending: /* 16 insns */ 338__hypervisor_flush_tlb_pending: /* 16 insns */
273 /* %o0 = context, %o1 = nr, %o2 = vaddrs[] */ 339 /* %o0 = context, %o1 = nr, %o2 = vaddrs[] */
274 sllx %o1, 3, %g1 340 sllx %o1, 3, %g1
@@ -339,6 +405,13 @@ cheetah_patch_cachetlbops:
339 call tlb_patch_one 405 call tlb_patch_one
340 mov 19, %o2 406 mov 19, %o2
341 407
408 sethi %hi(__flush_tlb_page), %o0
409 or %o0, %lo(__flush_tlb_page), %o0
410 sethi %hi(__cheetah_flush_tlb_page), %o1
411 or %o1, %lo(__cheetah_flush_tlb_page), %o1
412 call tlb_patch_one
413 mov 22, %o2
414
342 sethi %hi(__flush_tlb_pending), %o0 415 sethi %hi(__flush_tlb_pending), %o0
343 or %o0, %lo(__flush_tlb_pending), %o0 416 or %o0, %lo(__flush_tlb_pending), %o0
344 sethi %hi(__cheetah_flush_tlb_pending), %o1 417 sethi %hi(__cheetah_flush_tlb_pending), %o1
@@ -397,10 +470,9 @@ xcall_flush_tlb_mm: /* 21 insns */
397 nop 470 nop
398 nop 471 nop
399 472
400 .globl xcall_flush_tlb_pending 473 .globl xcall_flush_tlb_page
401xcall_flush_tlb_pending: /* 21 insns */ 474xcall_flush_tlb_page: /* 17 insns */
402 /* %g5=context, %g1=nr, %g7=vaddrs[] */ 475 /* %g5=context, %g1=vaddr */
403 sllx %g1, 3, %g1
404 mov PRIMARY_CONTEXT, %g4 476 mov PRIMARY_CONTEXT, %g4
405 ldxa [%g4] ASI_DMMU, %g2 477 ldxa [%g4] ASI_DMMU, %g2
406 srlx %g2, CTX_PGSZ1_NUC_SHIFT, %g4 478 srlx %g2, CTX_PGSZ1_NUC_SHIFT, %g4
@@ -408,20 +480,16 @@ xcall_flush_tlb_pending: /* 21 insns */
408 or %g5, %g4, %g5 480 or %g5, %g4, %g5
409 mov PRIMARY_CONTEXT, %g4 481 mov PRIMARY_CONTEXT, %g4
410 stxa %g5, [%g4] ASI_DMMU 482 stxa %g5, [%g4] ASI_DMMU
4111: sub %g1, (1 << 3), %g1 483 andcc %g1, 0x1, %g0
412 ldx [%g7 + %g1], %g5
413 andcc %g5, 0x1, %g0
414 be,pn %icc, 2f 484 be,pn %icc, 2f
415 485 andn %g1, 0x1, %g5
416 andn %g5, 0x1, %g5
417 stxa %g0, [%g5] ASI_IMMU_DEMAP 486 stxa %g0, [%g5] ASI_IMMU_DEMAP
4182: stxa %g0, [%g5] ASI_DMMU_DEMAP 4872: stxa %g0, [%g5] ASI_DMMU_DEMAP
419 membar #Sync 488 membar #Sync
420 brnz,pt %g1, 1b
421 nop
422 stxa %g2, [%g4] ASI_DMMU 489 stxa %g2, [%g4] ASI_DMMU
423 retry 490 retry
424 nop 491 nop
492 nop
425 493
426 .globl xcall_flush_tlb_kernel_range 494 .globl xcall_flush_tlb_kernel_range
427xcall_flush_tlb_kernel_range: /* 25 insns */ 495xcall_flush_tlb_kernel_range: /* 25 insns */
@@ -656,15 +724,13 @@ __hypervisor_xcall_flush_tlb_mm: /* 21 insns */
656 membar #Sync 724 membar #Sync
657 retry 725 retry
658 726
659 .globl __hypervisor_xcall_flush_tlb_pending 727 .globl __hypervisor_xcall_flush_tlb_page
660__hypervisor_xcall_flush_tlb_pending: /* 21 insns */ 728__hypervisor_xcall_flush_tlb_page: /* 17 insns */
661 /* %g5=ctx, %g1=nr, %g7=vaddrs[], %g2,%g3,%g4,g6=scratch */ 729 /* %g5=ctx, %g1=vaddr */
662 sllx %g1, 3, %g1
663 mov %o0, %g2 730 mov %o0, %g2
664 mov %o1, %g3 731 mov %o1, %g3
665 mov %o2, %g4 732 mov %o2, %g4
6661: sub %g1, (1 << 3), %g1 733 mov %g1, %o0 /* ARG0: virtual address */
667 ldx [%g7 + %g1], %o0 /* ARG0: virtual address */
668 mov %g5, %o1 /* ARG1: mmu context */ 734 mov %g5, %o1 /* ARG1: mmu context */
669 mov HV_MMU_ALL, %o2 /* ARG2: flags */ 735 mov HV_MMU_ALL, %o2 /* ARG2: flags */
670 srlx %o0, PAGE_SHIFT, %o0 736 srlx %o0, PAGE_SHIFT, %o0
@@ -673,8 +739,6 @@ __hypervisor_xcall_flush_tlb_pending: /* 21 insns */
673 mov HV_MMU_UNMAP_ADDR_TRAP, %g6 739 mov HV_MMU_UNMAP_ADDR_TRAP, %g6
674 brnz,a,pn %o0, __hypervisor_tlb_xcall_error 740 brnz,a,pn %o0, __hypervisor_tlb_xcall_error
675 mov %o0, %g5 741 mov %o0, %g5
676 brnz,pt %g1, 1b
677 nop
678 mov %g2, %o0 742 mov %g2, %o0
679 mov %g3, %o1 743 mov %g3, %o1
680 mov %g4, %o2 744 mov %g4, %o2
@@ -757,6 +821,13 @@ hypervisor_patch_cachetlbops:
757 call tlb_patch_one 821 call tlb_patch_one
758 mov 10, %o2 822 mov 10, %o2
759 823
824 sethi %hi(__flush_tlb_page), %o0
825 or %o0, %lo(__flush_tlb_page), %o0
826 sethi %hi(__hypervisor_flush_tlb_page), %o1
827 or %o1, %lo(__hypervisor_flush_tlb_page), %o1
828 call tlb_patch_one
829 mov 11, %o2
830
760 sethi %hi(__flush_tlb_pending), %o0 831 sethi %hi(__flush_tlb_pending), %o0
761 or %o0, %lo(__flush_tlb_pending), %o0 832 or %o0, %lo(__flush_tlb_pending), %o0
762 sethi %hi(__hypervisor_flush_tlb_pending), %o1 833 sethi %hi(__hypervisor_flush_tlb_pending), %o1
@@ -788,12 +859,12 @@ hypervisor_patch_cachetlbops:
788 call tlb_patch_one 859 call tlb_patch_one
789 mov 21, %o2 860 mov 21, %o2
790 861
791 sethi %hi(xcall_flush_tlb_pending), %o0 862 sethi %hi(xcall_flush_tlb_page), %o0
792 or %o0, %lo(xcall_flush_tlb_pending), %o0 863 or %o0, %lo(xcall_flush_tlb_page), %o0
793 sethi %hi(__hypervisor_xcall_flush_tlb_pending), %o1 864 sethi %hi(__hypervisor_xcall_flush_tlb_page), %o1
794 or %o1, %lo(__hypervisor_xcall_flush_tlb_pending), %o1 865 or %o1, %lo(__hypervisor_xcall_flush_tlb_page), %o1
795 call tlb_patch_one 866 call tlb_patch_one
796 mov 21, %o2 867 mov 17, %o2
797 868
798 sethi %hi(xcall_flush_tlb_kernel_range), %o0 869 sethi %hi(xcall_flush_tlb_kernel_range), %o0
799 or %o0, %lo(xcall_flush_tlb_kernel_range), %o0 870 or %o0, %lo(xcall_flush_tlb_kernel_range), %o0
diff --git a/arch/tile/include/asm/irqflags.h b/arch/tile/include/asm/irqflags.h
index 241c0bb60b12..c96f9bbb760d 100644
--- a/arch/tile/include/asm/irqflags.h
+++ b/arch/tile/include/asm/irqflags.h
@@ -40,7 +40,15 @@
40#include <asm/percpu.h> 40#include <asm/percpu.h>
41#include <arch/spr_def.h> 41#include <arch/spr_def.h>
42 42
43/* Set and clear kernel interrupt masks. */ 43/*
44 * Set and clear kernel interrupt masks.
45 *
46 * NOTE: __insn_mtspr() is a compiler builtin marked as a memory
47 * clobber. We rely on it being equivalent to a compiler barrier in
48 * this code since arch_local_irq_save() and friends must act as
49 * compiler barriers. This compiler semantic is baked into enough
50 * places that the compiler will maintain it going forward.
51 */
44#if CHIP_HAS_SPLIT_INTR_MASK() 52#if CHIP_HAS_SPLIT_INTR_MASK()
45#if INT_PERF_COUNT < 32 || INT_AUX_PERF_COUNT < 32 || INT_MEM_ERROR >= 32 53#if INT_PERF_COUNT < 32 || INT_AUX_PERF_COUNT < 32 || INT_MEM_ERROR >= 32
46# error Fix assumptions about which word various interrupts are in 54# error Fix assumptions about which word various interrupts are in
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 70c0f3da0476..15b5cef4aa38 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1549,6 +1549,7 @@ config X86_SMAP
1549config EFI 1549config EFI
1550 bool "EFI runtime service support" 1550 bool "EFI runtime service support"
1551 depends on ACPI 1551 depends on ACPI
1552 select UCS2_STRING
1552 ---help--- 1553 ---help---
1553 This enables the kernel to use EFI runtime services that are 1554 This enables the kernel to use EFI runtime services that are
1554 available (such as the EFI variable services). 1555 available (such as the EFI variable services).
diff --git a/arch/x86/boot/compressed/Makefile b/arch/x86/boot/compressed/Makefile
index 8a84501acb1b..5ef205c5f37b 100644
--- a/arch/x86/boot/compressed/Makefile
+++ b/arch/x86/boot/compressed/Makefile
@@ -4,7 +4,7 @@
4# create a compressed vmlinux image from the original vmlinux 4# create a compressed vmlinux image from the original vmlinux
5# 5#
6 6
7targets := vmlinux.lds vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma vmlinux.bin.xz vmlinux.bin.lzo head_$(BITS).o misc.o string.o cmdline.o early_serial_console.o piggy.o 7targets := vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma vmlinux.bin.xz vmlinux.bin.lzo
8 8
9KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2 9KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2
10KBUILD_CFLAGS += -fno-strict-aliasing -fPIC 10KBUILD_CFLAGS += -fno-strict-aliasing -fPIC
@@ -29,7 +29,6 @@ VMLINUX_OBJS = $(obj)/vmlinux.lds $(obj)/head_$(BITS).o $(obj)/misc.o \
29 $(obj)/piggy.o 29 $(obj)/piggy.o
30 30
31$(obj)/eboot.o: KBUILD_CFLAGS += -fshort-wchar -mno-red-zone 31$(obj)/eboot.o: KBUILD_CFLAGS += -fshort-wchar -mno-red-zone
32$(obj)/efi_stub_$(BITS).o: KBUILD_CLFAGS += -fshort-wchar -mno-red-zone
33 32
34ifeq ($(CONFIG_EFI_STUB), y) 33ifeq ($(CONFIG_EFI_STUB), y)
35 VMLINUX_OBJS += $(obj)/eboot.o $(obj)/efi_stub_$(BITS).o 34 VMLINUX_OBJS += $(obj)/eboot.o $(obj)/efi_stub_$(BITS).o
@@ -43,7 +42,7 @@ OBJCOPYFLAGS_vmlinux.bin := -R .comment -S
43$(obj)/vmlinux.bin: vmlinux FORCE 42$(obj)/vmlinux.bin: vmlinux FORCE
44 $(call if_changed,objcopy) 43 $(call if_changed,objcopy)
45 44
46targets += vmlinux.bin.all vmlinux.relocs 45targets += $(patsubst $(obj)/%,%,$(VMLINUX_OBJS)) vmlinux.bin.all vmlinux.relocs
47 46
48CMD_RELOCS = arch/x86/tools/relocs 47CMD_RELOCS = arch/x86/tools/relocs
49quiet_cmd_relocs = RELOCS $@ 48quiet_cmd_relocs = RELOCS $@
diff --git a/arch/x86/boot/compressed/eboot.c b/arch/x86/boot/compressed/eboot.c
index c205035a6b96..8615f7581820 100644
--- a/arch/x86/boot/compressed/eboot.c
+++ b/arch/x86/boot/compressed/eboot.c
@@ -251,6 +251,51 @@ static void find_bits(unsigned long mask, u8 *pos, u8 *size)
251 *size = len; 251 *size = len;
252} 252}
253 253
254static efi_status_t setup_efi_vars(struct boot_params *params)
255{
256 struct setup_data *data;
257 struct efi_var_bootdata *efidata;
258 u64 store_size, remaining_size, var_size;
259 efi_status_t status;
260
261 if (!sys_table->runtime->query_variable_info)
262 return EFI_UNSUPPORTED;
263
264 data = (struct setup_data *)(unsigned long)params->hdr.setup_data;
265
266 while (data && data->next)
267 data = (struct setup_data *)(unsigned long)data->next;
268
269 status = efi_call_phys4(sys_table->runtime->query_variable_info,
270 EFI_VARIABLE_NON_VOLATILE |
271 EFI_VARIABLE_BOOTSERVICE_ACCESS |
272 EFI_VARIABLE_RUNTIME_ACCESS, &store_size,
273 &remaining_size, &var_size);
274
275 if (status != EFI_SUCCESS)
276 return status;
277
278 status = efi_call_phys3(sys_table->boottime->allocate_pool,
279 EFI_LOADER_DATA, sizeof(*efidata), &efidata);
280
281 if (status != EFI_SUCCESS)
282 return status;
283
284 efidata->data.type = SETUP_EFI_VARS;
285 efidata->data.len = sizeof(struct efi_var_bootdata) -
286 sizeof(struct setup_data);
287 efidata->data.next = 0;
288 efidata->store_size = store_size;
289 efidata->remaining_size = remaining_size;
290 efidata->max_var_size = var_size;
291
292 if (data)
293 data->next = (unsigned long)efidata;
294 else
295 params->hdr.setup_data = (unsigned long)efidata;
296
297}
298
254static efi_status_t setup_efi_pci(struct boot_params *params) 299static efi_status_t setup_efi_pci(struct boot_params *params)
255{ 300{
256 efi_pci_io_protocol *pci; 301 efi_pci_io_protocol *pci;
@@ -1157,6 +1202,8 @@ struct boot_params *efi_main(void *handle, efi_system_table_t *_table,
1157 1202
1158 setup_graphics(boot_params); 1203 setup_graphics(boot_params);
1159 1204
1205 setup_efi_vars(boot_params);
1206
1160 setup_efi_pci(boot_params); 1207 setup_efi_pci(boot_params);
1161 1208
1162 status = efi_call_phys3(sys_table->boottime->allocate_pool, 1209 status = efi_call_phys3(sys_table->boottime->allocate_pool,
diff --git a/arch/x86/include/asm/efi.h b/arch/x86/include/asm/efi.h
index 60c89f30c727..2fb5d5884e23 100644
--- a/arch/x86/include/asm/efi.h
+++ b/arch/x86/include/asm/efi.h
@@ -102,6 +102,13 @@ extern void efi_call_phys_epilog(void);
102extern void efi_unmap_memmap(void); 102extern void efi_unmap_memmap(void);
103extern void efi_memory_uc(u64 addr, unsigned long size); 103extern void efi_memory_uc(u64 addr, unsigned long size);
104 104
105struct efi_var_bootdata {
106 struct setup_data data;
107 u64 store_size;
108 u64 remaining_size;
109 u64 max_var_size;
110};
111
105#ifdef CONFIG_EFI 112#ifdef CONFIG_EFI
106 113
107static inline bool efi_is_native(void) 114static inline bool efi_is_native(void)
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 5edd1742cfd0..7361e47db79f 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -703,7 +703,10 @@ static inline void arch_leave_lazy_mmu_mode(void)
703 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave); 703 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
704} 704}
705 705
706void arch_flush_lazy_mmu_mode(void); 706static inline void arch_flush_lazy_mmu_mode(void)
707{
708 PVOP_VCALL0(pv_mmu_ops.lazy_mode.flush);
709}
707 710
708static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx, 711static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
709 phys_addr_t phys, pgprot_t flags) 712 phys_addr_t phys, pgprot_t flags)
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index 142236ed83af..b3b0ec1dac86 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -91,6 +91,7 @@ struct pv_lazy_ops {
91 /* Set deferred update mode, used for batching operations. */ 91 /* Set deferred update mode, used for batching operations. */
92 void (*enter)(void); 92 void (*enter)(void);
93 void (*leave)(void); 93 void (*leave)(void);
94 void (*flush)(void);
94}; 95};
95 96
96struct pv_time_ops { 97struct pv_time_ops {
@@ -679,6 +680,7 @@ void paravirt_end_context_switch(struct task_struct *next);
679 680
680void paravirt_enter_lazy_mmu(void); 681void paravirt_enter_lazy_mmu(void);
681void paravirt_leave_lazy_mmu(void); 682void paravirt_leave_lazy_mmu(void);
683void paravirt_flush_lazy_mmu(void);
682 684
683void _paravirt_nop(void); 685void _paravirt_nop(void);
684u32 _paravirt_ident_32(u32); 686u32 _paravirt_ident_32(u32);
diff --git a/arch/x86/include/asm/syscall.h b/arch/x86/include/asm/syscall.h
index 1ace47b62592..2e188d68397c 100644
--- a/arch/x86/include/asm/syscall.h
+++ b/arch/x86/include/asm/syscall.h
@@ -29,13 +29,13 @@ extern const unsigned long sys_call_table[];
29 */ 29 */
30static inline int syscall_get_nr(struct task_struct *task, struct pt_regs *regs) 30static inline int syscall_get_nr(struct task_struct *task, struct pt_regs *regs)
31{ 31{
32 return regs->orig_ax & __SYSCALL_MASK; 32 return regs->orig_ax;
33} 33}
34 34
35static inline void syscall_rollback(struct task_struct *task, 35static inline void syscall_rollback(struct task_struct *task,
36 struct pt_regs *regs) 36 struct pt_regs *regs)
37{ 37{
38 regs->ax = regs->orig_ax & __SYSCALL_MASK; 38 regs->ax = regs->orig_ax;
39} 39}
40 40
41static inline long syscall_get_error(struct task_struct *task, 41static inline long syscall_get_error(struct task_struct *task,
diff --git a/arch/x86/include/asm/tlb.h b/arch/x86/include/asm/tlb.h
index 4fef20773b8f..c7797307fc2b 100644
--- a/arch/x86/include/asm/tlb.h
+++ b/arch/x86/include/asm/tlb.h
@@ -7,7 +7,7 @@
7 7
8#define tlb_flush(tlb) \ 8#define tlb_flush(tlb) \
9{ \ 9{ \
10 if (tlb->fullmm == 0) \ 10 if (!tlb->fullmm && !tlb->need_flush_all) \
11 flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end, 0UL); \ 11 flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end, 0UL); \
12 else \ 12 else \
13 flush_tlb_mm_range(tlb->mm, 0UL, TLB_FLUSH_ALL, 0UL); \ 13 flush_tlb_mm_range(tlb->mm, 0UL, TLB_FLUSH_ALL, 0UL); \
diff --git a/arch/x86/include/uapi/asm/bootparam.h b/arch/x86/include/uapi/asm/bootparam.h
index c15ddaf90710..08744242b8d2 100644
--- a/arch/x86/include/uapi/asm/bootparam.h
+++ b/arch/x86/include/uapi/asm/bootparam.h
@@ -6,6 +6,7 @@
6#define SETUP_E820_EXT 1 6#define SETUP_E820_EXT 1
7#define SETUP_DTB 2 7#define SETUP_DTB 2
8#define SETUP_PCI 3 8#define SETUP_PCI 3
9#define SETUP_EFI_VARS 4
9 10
10/* ram_size flags */ 11/* ram_size flags */
11#define RAMDISK_IMAGE_START_MASK 0x07FF 12#define RAMDISK_IMAGE_START_MASK 0x07FF
diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
index a7d26d83fb70..8f4be53ea04b 100644
--- a/arch/x86/kernel/cpu/mshyperv.c
+++ b/arch/x86/kernel/cpu/mshyperv.c
@@ -35,13 +35,6 @@ static bool __init ms_hyperv_platform(void)
35 if (!boot_cpu_has(X86_FEATURE_HYPERVISOR)) 35 if (!boot_cpu_has(X86_FEATURE_HYPERVISOR))
36 return false; 36 return false;
37 37
38 /*
39 * Xen emulates Hyper-V to support enlightened Windows.
40 * Check to see first if we are on a Xen Hypervisor.
41 */
42 if (xen_cpuid_base())
43 return false;
44
45 cpuid(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS, 38 cpuid(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS,
46 &eax, &hyp_signature[0], &hyp_signature[1], &hyp_signature[2]); 39 &eax, &hyp_signature[0], &hyp_signature[1], &hyp_signature[2]);
47 40
@@ -82,12 +75,6 @@ static void __init ms_hyperv_init_platform(void)
82 75
83 if (ms_hyperv.features & HV_X64_MSR_TIME_REF_COUNT_AVAILABLE) 76 if (ms_hyperv.features & HV_X64_MSR_TIME_REF_COUNT_AVAILABLE)
84 clocksource_register_hz(&hyperv_cs, NSEC_PER_SEC/100); 77 clocksource_register_hz(&hyperv_cs, NSEC_PER_SEC/100);
85#if IS_ENABLED(CONFIG_HYPERV)
86 /*
87 * Setup the IDT for hypervisor callback.
88 */
89 alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, hyperv_callback_vector);
90#endif
91} 78}
92 79
93const __refconst struct hypervisor_x86 x86_hyper_ms_hyperv = { 80const __refconst struct hypervisor_x86 x86_hyper_ms_hyperv = {
@@ -103,6 +90,11 @@ static irq_handler_t vmbus_isr;
103 90
104void hv_register_vmbus_handler(int irq, irq_handler_t handler) 91void hv_register_vmbus_handler(int irq, irq_handler_t handler)
105{ 92{
93 /*
94 * Setup the IDT for hypervisor callback.
95 */
96 alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, hyperv_callback_vector);
97
106 vmbus_irq = irq; 98 vmbus_irq = irq;
107 vmbus_isr = handler; 99 vmbus_isr = handler;
108} 100}
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index dab7580c47ae..cc45deb791b0 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -153,8 +153,14 @@ static struct event_constraint intel_gen_event_constraints[] __read_mostly =
153}; 153};
154 154
155static struct extra_reg intel_snb_extra_regs[] __read_mostly = { 155static struct extra_reg intel_snb_extra_regs[] __read_mostly = {
156 INTEL_EVENT_EXTRA_REG(0xb7, MSR_OFFCORE_RSP_0, 0x3fffffffffull, RSP_0), 156 INTEL_EVENT_EXTRA_REG(0xb7, MSR_OFFCORE_RSP_0, 0x3f807f8fffull, RSP_0),
157 INTEL_EVENT_EXTRA_REG(0xbb, MSR_OFFCORE_RSP_1, 0x3fffffffffull, RSP_1), 157 INTEL_EVENT_EXTRA_REG(0xbb, MSR_OFFCORE_RSP_1, 0x3f807f8fffull, RSP_1),
158 EVENT_EXTRA_END
159};
160
161static struct extra_reg intel_snbep_extra_regs[] __read_mostly = {
162 INTEL_EVENT_EXTRA_REG(0xb7, MSR_OFFCORE_RSP_0, 0x3fffff8fffull, RSP_0),
163 INTEL_EVENT_EXTRA_REG(0xbb, MSR_OFFCORE_RSP_1, 0x3fffff8fffull, RSP_1),
158 EVENT_EXTRA_END 164 EVENT_EXTRA_END
159}; 165};
160 166
@@ -2097,7 +2103,10 @@ __init int intel_pmu_init(void)
2097 x86_pmu.event_constraints = intel_snb_event_constraints; 2103 x86_pmu.event_constraints = intel_snb_event_constraints;
2098 x86_pmu.pebs_constraints = intel_snb_pebs_event_constraints; 2104 x86_pmu.pebs_constraints = intel_snb_pebs_event_constraints;
2099 x86_pmu.pebs_aliases = intel_pebs_aliases_snb; 2105 x86_pmu.pebs_aliases = intel_pebs_aliases_snb;
2100 x86_pmu.extra_regs = intel_snb_extra_regs; 2106 if (boot_cpu_data.x86_model == 45)
2107 x86_pmu.extra_regs = intel_snbep_extra_regs;
2108 else
2109 x86_pmu.extra_regs = intel_snb_extra_regs;
2101 /* all extra regs are per-cpu when HT is on */ 2110 /* all extra regs are per-cpu when HT is on */
2102 x86_pmu.er_flags |= ERF_HAS_RSP_1; 2111 x86_pmu.er_flags |= ERF_HAS_RSP_1;
2103 x86_pmu.er_flags |= ERF_NO_HT_SHARING; 2112 x86_pmu.er_flags |= ERF_NO_HT_SHARING;
@@ -2123,7 +2132,10 @@ __init int intel_pmu_init(void)
2123 x86_pmu.event_constraints = intel_ivb_event_constraints; 2132 x86_pmu.event_constraints = intel_ivb_event_constraints;
2124 x86_pmu.pebs_constraints = intel_ivb_pebs_event_constraints; 2133 x86_pmu.pebs_constraints = intel_ivb_pebs_event_constraints;
2125 x86_pmu.pebs_aliases = intel_pebs_aliases_snb; 2134 x86_pmu.pebs_aliases = intel_pebs_aliases_snb;
2126 x86_pmu.extra_regs = intel_snb_extra_regs; 2135 if (boot_cpu_data.x86_model == 62)
2136 x86_pmu.extra_regs = intel_snbep_extra_regs;
2137 else
2138 x86_pmu.extra_regs = intel_snb_extra_regs;
2127 /* all extra regs are per-cpu when HT is on */ 2139 /* all extra regs are per-cpu when HT is on */
2128 x86_pmu.er_flags |= ERF_HAS_RSP_1; 2140 x86_pmu.er_flags |= ERF_HAS_RSP_1;
2129 x86_pmu.er_flags |= ERF_NO_HT_SHARING; 2141 x86_pmu.er_flags |= ERF_NO_HT_SHARING;
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index b05a575d56f4..26830f3af0df 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -314,10 +314,11 @@ int intel_pmu_drain_bts_buffer(void)
314 if (top <= at) 314 if (top <= at)
315 return 0; 315 return 0;
316 316
317 memset(&regs, 0, sizeof(regs));
318
317 ds->bts_index = ds->bts_buffer_base; 319 ds->bts_index = ds->bts_buffer_base;
318 320
319 perf_sample_data_init(&data, 0, event->hw.last_period); 321 perf_sample_data_init(&data, 0, event->hw.last_period);
320 regs.ip = 0;
321 322
322 /* 323 /*
323 * Prepare a generic sample, i.e. fill in the invariant fields. 324 * Prepare a generic sample, i.e. fill in the invariant fields.
diff --git a/arch/x86/kernel/microcode_core_early.c b/arch/x86/kernel/microcode_core_early.c
index 577db8417d15..833d51d6ee06 100644
--- a/arch/x86/kernel/microcode_core_early.c
+++ b/arch/x86/kernel/microcode_core_early.c
@@ -45,9 +45,6 @@ static int __cpuinit x86_vendor(void)
45 u32 eax = 0x00000000; 45 u32 eax = 0x00000000;
46 u32 ebx, ecx = 0, edx; 46 u32 ebx, ecx = 0, edx;
47 47
48 if (!have_cpuid_p())
49 return X86_VENDOR_UNKNOWN;
50
51 native_cpuid(&eax, &ebx, &ecx, &edx); 48 native_cpuid(&eax, &ebx, &ecx, &edx);
52 49
53 if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx)) 50 if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx))
@@ -59,18 +56,45 @@ static int __cpuinit x86_vendor(void)
59 return X86_VENDOR_UNKNOWN; 56 return X86_VENDOR_UNKNOWN;
60} 57}
61 58
59static int __cpuinit x86_family(void)
60{
61 u32 eax = 0x00000001;
62 u32 ebx, ecx = 0, edx;
63 int x86;
64
65 native_cpuid(&eax, &ebx, &ecx, &edx);
66
67 x86 = (eax >> 8) & 0xf;
68 if (x86 == 15)
69 x86 += (eax >> 20) & 0xff;
70
71 return x86;
72}
73
62void __init load_ucode_bsp(void) 74void __init load_ucode_bsp(void)
63{ 75{
64 int vendor = x86_vendor(); 76 int vendor, x86;
77
78 if (!have_cpuid_p())
79 return;
65 80
66 if (vendor == X86_VENDOR_INTEL) 81 vendor = x86_vendor();
82 x86 = x86_family();
83
84 if (vendor == X86_VENDOR_INTEL && x86 >= 6)
67 load_ucode_intel_bsp(); 85 load_ucode_intel_bsp();
68} 86}
69 87
70void __cpuinit load_ucode_ap(void) 88void __cpuinit load_ucode_ap(void)
71{ 89{
72 int vendor = x86_vendor(); 90 int vendor, x86;
91
92 if (!have_cpuid_p())
93 return;
94
95 vendor = x86_vendor();
96 x86 = x86_family();
73 97
74 if (vendor == X86_VENDOR_INTEL) 98 if (vendor == X86_VENDOR_INTEL && x86 >= 6)
75 load_ucode_intel_ap(); 99 load_ucode_intel_ap();
76} 100}
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index 17fff18a1031..8bfb335f74bb 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -263,6 +263,18 @@ void paravirt_leave_lazy_mmu(void)
263 leave_lazy(PARAVIRT_LAZY_MMU); 263 leave_lazy(PARAVIRT_LAZY_MMU);
264} 264}
265 265
266void paravirt_flush_lazy_mmu(void)
267{
268 preempt_disable();
269
270 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
271 arch_leave_lazy_mmu_mode();
272 arch_enter_lazy_mmu_mode();
273 }
274
275 preempt_enable();
276}
277
266void paravirt_start_context_switch(struct task_struct *prev) 278void paravirt_start_context_switch(struct task_struct *prev)
267{ 279{
268 BUG_ON(preemptible()); 280 BUG_ON(preemptible());
@@ -292,18 +304,6 @@ enum paravirt_lazy_mode paravirt_get_lazy_mode(void)
292 return this_cpu_read(paravirt_lazy_mode); 304 return this_cpu_read(paravirt_lazy_mode);
293} 305}
294 306
295void arch_flush_lazy_mmu_mode(void)
296{
297 preempt_disable();
298
299 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
300 arch_leave_lazy_mmu_mode();
301 arch_enter_lazy_mmu_mode();
302 }
303
304 preempt_enable();
305}
306
307struct pv_info pv_info = { 307struct pv_info pv_info = {
308 .name = "bare hardware", 308 .name = "bare hardware",
309 .paravirt_enabled = 0, 309 .paravirt_enabled = 0,
@@ -475,6 +475,7 @@ struct pv_mmu_ops pv_mmu_ops = {
475 .lazy_mode = { 475 .lazy_mode = {
476 .enter = paravirt_nop, 476 .enter = paravirt_nop,
477 .leave = paravirt_nop, 477 .leave = paravirt_nop,
478 .flush = paravirt_nop,
478 }, 479 },
479 480
480 .set_fixmap = native_set_fixmap, 481 .set_fixmap = native_set_fixmap,
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 90d8cc930f5e..fae9134a2de9 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -507,11 +507,14 @@ static void __init memblock_x86_reserve_range_setup_data(void)
507/* 507/*
508 * Keep the crash kernel below this limit. On 32 bits earlier kernels 508 * Keep the crash kernel below this limit. On 32 bits earlier kernels
509 * would limit the kernel to the low 512 MiB due to mapping restrictions. 509 * would limit the kernel to the low 512 MiB due to mapping restrictions.
510 * On 64bit, old kexec-tools need to under 896MiB.
510 */ 511 */
511#ifdef CONFIG_X86_32 512#ifdef CONFIG_X86_32
512# define CRASH_KERNEL_ADDR_MAX (512 << 20) 513# define CRASH_KERNEL_ADDR_LOW_MAX (512 << 20)
514# define CRASH_KERNEL_ADDR_HIGH_MAX (512 << 20)
513#else 515#else
514# define CRASH_KERNEL_ADDR_MAX MAXMEM 516# define CRASH_KERNEL_ADDR_LOW_MAX (896UL<<20)
517# define CRASH_KERNEL_ADDR_HIGH_MAX MAXMEM
515#endif 518#endif
516 519
517static void __init reserve_crashkernel_low(void) 520static void __init reserve_crashkernel_low(void)
@@ -521,19 +524,35 @@ static void __init reserve_crashkernel_low(void)
521 unsigned long long low_base = 0, low_size = 0; 524 unsigned long long low_base = 0, low_size = 0;
522 unsigned long total_low_mem; 525 unsigned long total_low_mem;
523 unsigned long long base; 526 unsigned long long base;
527 bool auto_set = false;
524 int ret; 528 int ret;
525 529
526 total_low_mem = memblock_mem_size(1UL<<(32-PAGE_SHIFT)); 530 total_low_mem = memblock_mem_size(1UL<<(32-PAGE_SHIFT));
531 /* crashkernel=Y,low */
527 ret = parse_crashkernel_low(boot_command_line, total_low_mem, 532 ret = parse_crashkernel_low(boot_command_line, total_low_mem,
528 &low_size, &base); 533 &low_size, &base);
529 if (ret != 0 || low_size <= 0) 534 if (ret != 0) {
530 return; 535 /*
536 * two parts from lib/swiotlb.c:
537 * swiotlb size: user specified with swiotlb= or default.
538 * swiotlb overflow buffer: now is hardcoded to 32k.
539 * We round it to 8M for other buffers that
540 * may need to stay low too.
541 */
542 low_size = swiotlb_size_or_default() + (8UL<<20);
543 auto_set = true;
544 } else {
545 /* passed with crashkernel=0,low ? */
546 if (!low_size)
547 return;
548 }
531 549
532 low_base = memblock_find_in_range(low_size, (1ULL<<32), 550 low_base = memblock_find_in_range(low_size, (1ULL<<32),
533 low_size, alignment); 551 low_size, alignment);
534 552
535 if (!low_base) { 553 if (!low_base) {
536 pr_info("crashkernel low reservation failed - No suitable area found.\n"); 554 if (!auto_set)
555 pr_info("crashkernel low reservation failed - No suitable area found.\n");
537 556
538 return; 557 return;
539 } 558 }
@@ -554,14 +573,22 @@ static void __init reserve_crashkernel(void)
554 const unsigned long long alignment = 16<<20; /* 16M */ 573 const unsigned long long alignment = 16<<20; /* 16M */
555 unsigned long long total_mem; 574 unsigned long long total_mem;
556 unsigned long long crash_size, crash_base; 575 unsigned long long crash_size, crash_base;
576 bool high = false;
557 int ret; 577 int ret;
558 578
559 total_mem = memblock_phys_mem_size(); 579 total_mem = memblock_phys_mem_size();
560 580
581 /* crashkernel=XM */
561 ret = parse_crashkernel(boot_command_line, total_mem, 582 ret = parse_crashkernel(boot_command_line, total_mem,
562 &crash_size, &crash_base); 583 &crash_size, &crash_base);
563 if (ret != 0 || crash_size <= 0) 584 if (ret != 0 || crash_size <= 0) {
564 return; 585 /* crashkernel=X,high */
586 ret = parse_crashkernel_high(boot_command_line, total_mem,
587 &crash_size, &crash_base);
588 if (ret != 0 || crash_size <= 0)
589 return;
590 high = true;
591 }
565 592
566 /* 0 means: find the address automatically */ 593 /* 0 means: find the address automatically */
567 if (crash_base <= 0) { 594 if (crash_base <= 0) {
@@ -569,7 +596,9 @@ static void __init reserve_crashkernel(void)
569 * kexec want bzImage is below CRASH_KERNEL_ADDR_MAX 596 * kexec want bzImage is below CRASH_KERNEL_ADDR_MAX
570 */ 597 */
571 crash_base = memblock_find_in_range(alignment, 598 crash_base = memblock_find_in_range(alignment,
572 CRASH_KERNEL_ADDR_MAX, crash_size, alignment); 599 high ? CRASH_KERNEL_ADDR_HIGH_MAX :
600 CRASH_KERNEL_ADDR_LOW_MAX,
601 crash_size, alignment);
573 602
574 if (!crash_base) { 603 if (!crash_base) {
575 pr_info("crashkernel reservation failed - No suitable area found.\n"); 604 pr_info("crashkernel reservation failed - No suitable area found.\n");
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 02b51dd4e4ad..f77df1c5de6e 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -1857,7 +1857,7 @@ int kvm_lapic_enable_pv_eoi(struct kvm_vcpu *vcpu, u64 data)
1857 if (!pv_eoi_enabled(vcpu)) 1857 if (!pv_eoi_enabled(vcpu))
1858 return 0; 1858 return 0;
1859 return kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.pv_eoi.data, 1859 return kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.pv_eoi.data,
1860 addr); 1860 addr, sizeof(u8));
1861} 1861}
1862 1862
1863void kvm_lapic_init(void) 1863void kvm_lapic_init(void)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index f19ac0aca60d..e1721324c271 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1823,7 +1823,8 @@ static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1823 return 0; 1823 return 0;
1824 } 1824 }
1825 1825
1826 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa)) 1826 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1827 sizeof(u32)))
1827 return 1; 1828 return 1;
1828 1829
1829 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS); 1830 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
@@ -1952,12 +1953,9 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1952 1953
1953 gpa_offset = data & ~(PAGE_MASK | 1); 1954 gpa_offset = data & ~(PAGE_MASK | 1);
1954 1955
1955 /* Check that the address is 32-byte aligned. */
1956 if (gpa_offset & (sizeof(struct pvclock_vcpu_time_info) - 1))
1957 break;
1958
1959 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, 1956 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
1960 &vcpu->arch.pv_time, data & ~1ULL)) 1957 &vcpu->arch.pv_time, data & ~1ULL,
1958 sizeof(struct pvclock_vcpu_time_info)))
1961 vcpu->arch.pv_time_enabled = false; 1959 vcpu->arch.pv_time_enabled = false;
1962 else 1960 else
1963 vcpu->arch.pv_time_enabled = true; 1961 vcpu->arch.pv_time_enabled = true;
@@ -1977,7 +1975,8 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1977 return 1; 1975 return 1;
1978 1976
1979 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime, 1977 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1980 data & KVM_STEAL_VALID_BITS)) 1978 data & KVM_STEAL_VALID_BITS,
1979 sizeof(struct kvm_steal_time)))
1981 return 1; 1980 return 1;
1982 1981
1983 vcpu->arch.st.msr_val = data; 1982 vcpu->arch.st.msr_val = data;
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 1cbd89ca5569..7114c63f047d 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -1334,6 +1334,7 @@ __init void lguest_init(void)
1334 pv_mmu_ops.read_cr3 = lguest_read_cr3; 1334 pv_mmu_ops.read_cr3 = lguest_read_cr3;
1335 pv_mmu_ops.lazy_mode.enter = paravirt_enter_lazy_mmu; 1335 pv_mmu_ops.lazy_mode.enter = paravirt_enter_lazy_mmu;
1336 pv_mmu_ops.lazy_mode.leave = lguest_leave_lazy_mmu_mode; 1336 pv_mmu_ops.lazy_mode.leave = lguest_leave_lazy_mmu_mode;
1337 pv_mmu_ops.lazy_mode.flush = paravirt_flush_lazy_mmu;
1337 pv_mmu_ops.pte_update = lguest_pte_update; 1338 pv_mmu_ops.pte_update = lguest_pte_update;
1338 pv_mmu_ops.pte_update_defer = lguest_pte_update; 1339 pv_mmu_ops.pte_update_defer = lguest_pte_update;
1339 1340
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index 2b97525246d4..0e883364abb5 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -378,10 +378,12 @@ static noinline __kprobes int vmalloc_fault(unsigned long address)
378 if (pgd_none(*pgd_ref)) 378 if (pgd_none(*pgd_ref))
379 return -1; 379 return -1;
380 380
381 if (pgd_none(*pgd)) 381 if (pgd_none(*pgd)) {
382 set_pgd(pgd, *pgd_ref); 382 set_pgd(pgd, *pgd_ref);
383 else 383 arch_flush_lazy_mmu_mode();
384 } else {
384 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); 385 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
386 }
385 387
386 /* 388 /*
387 * Below here mismatches are bugs because these lower tables 389 * Below here mismatches are bugs because these lower tables
diff --git a/arch/x86/mm/pageattr-test.c b/arch/x86/mm/pageattr-test.c
index b0086567271c..0e38951e65eb 100644
--- a/arch/x86/mm/pageattr-test.c
+++ b/arch/x86/mm/pageattr-test.c
@@ -68,7 +68,7 @@ static int print_split(struct split_state *s)
68 s->gpg++; 68 s->gpg++;
69 i += GPS/PAGE_SIZE; 69 i += GPS/PAGE_SIZE;
70 } else if (level == PG_LEVEL_2M) { 70 } else if (level == PG_LEVEL_2M) {
71 if (!(pte_val(*pte) & _PAGE_PSE)) { 71 if ((pte_val(*pte) & _PAGE_PRESENT) && !(pte_val(*pte) & _PAGE_PSE)) {
72 printk(KERN_ERR 72 printk(KERN_ERR
73 "%lx level %d but not PSE %Lx\n", 73 "%lx level %d but not PSE %Lx\n",
74 addr, level, (u64)pte_val(*pte)); 74 addr, level, (u64)pte_val(*pte));
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 091934e1d0d9..fb4e73ec24d8 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -467,7 +467,7 @@ try_preserve_large_page(pte_t *kpte, unsigned long address,
467 * We are safe now. Check whether the new pgprot is the same: 467 * We are safe now. Check whether the new pgprot is the same:
468 */ 468 */
469 old_pte = *kpte; 469 old_pte = *kpte;
470 old_prot = new_prot = req_prot = pte_pgprot(old_pte); 470 old_prot = req_prot = pte_pgprot(old_pte);
471 471
472 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr); 472 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
473 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set); 473 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
@@ -478,12 +478,12 @@ try_preserve_large_page(pte_t *kpte, unsigned long address,
478 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL 478 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
479 * for the ancient hardware that doesn't support it. 479 * for the ancient hardware that doesn't support it.
480 */ 480 */
481 if (pgprot_val(new_prot) & _PAGE_PRESENT) 481 if (pgprot_val(req_prot) & _PAGE_PRESENT)
482 pgprot_val(new_prot) |= _PAGE_PSE | _PAGE_GLOBAL; 482 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
483 else 483 else
484 pgprot_val(new_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL); 484 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
485 485
486 new_prot = canon_pgprot(new_prot); 486 req_prot = canon_pgprot(req_prot);
487 487
488 /* 488 /*
489 * old_pte points to the large page base address. So we need 489 * old_pte points to the large page base address. So we need
@@ -1413,6 +1413,8 @@ void kernel_map_pages(struct page *page, int numpages, int enable)
1413 * but that can deadlock->flush only current cpu: 1413 * but that can deadlock->flush only current cpu:
1414 */ 1414 */
1415 __flush_tlb_all(); 1415 __flush_tlb_all();
1416
1417 arch_flush_lazy_mmu_mode();
1416} 1418}
1417 1419
1418#ifdef CONFIG_HIBERNATION 1420#ifdef CONFIG_HIBERNATION
diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
index 193350b51f90..17fda6a8b3c2 100644
--- a/arch/x86/mm/pgtable.c
+++ b/arch/x86/mm/pgtable.c
@@ -58,6 +58,13 @@ void ___pte_free_tlb(struct mmu_gather *tlb, struct page *pte)
58void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd) 58void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd)
59{ 59{
60 paravirt_release_pmd(__pa(pmd) >> PAGE_SHIFT); 60 paravirt_release_pmd(__pa(pmd) >> PAGE_SHIFT);
61 /*
62 * NOTE! For PAE, any changes to the top page-directory-pointer-table
63 * entries need a full cr3 reload to flush.
64 */
65#ifdef CONFIG_X86_PAE
66 tlb->need_flush_all = 1;
67#endif
61 tlb_remove_page(tlb, virt_to_page(pmd)); 68 tlb_remove_page(tlb, virt_to_page(pmd));
62} 69}
63 70
diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c
index 5f2ecaf3f9d8..e4a86a677ce1 100644
--- a/arch/x86/platform/efi/efi.c
+++ b/arch/x86/platform/efi/efi.c
@@ -41,6 +41,7 @@
41#include <linux/io.h> 41#include <linux/io.h>
42#include <linux/reboot.h> 42#include <linux/reboot.h>
43#include <linux/bcd.h> 43#include <linux/bcd.h>
44#include <linux/ucs2_string.h>
44 45
45#include <asm/setup.h> 46#include <asm/setup.h>
46#include <asm/efi.h> 47#include <asm/efi.h>
@@ -51,6 +52,13 @@
51 52
52#define EFI_DEBUG 1 53#define EFI_DEBUG 1
53 54
55/*
56 * There's some additional metadata associated with each
57 * variable. Intel's reference implementation is 60 bytes - bump that
58 * to account for potential alignment constraints
59 */
60#define VAR_METADATA_SIZE 64
61
54struct efi __read_mostly efi = { 62struct efi __read_mostly efi = {
55 .mps = EFI_INVALID_TABLE_ADDR, 63 .mps = EFI_INVALID_TABLE_ADDR,
56 .acpi = EFI_INVALID_TABLE_ADDR, 64 .acpi = EFI_INVALID_TABLE_ADDR,
@@ -69,6 +77,13 @@ struct efi_memory_map memmap;
69static struct efi efi_phys __initdata; 77static struct efi efi_phys __initdata;
70static efi_system_table_t efi_systab __initdata; 78static efi_system_table_t efi_systab __initdata;
71 79
80static u64 efi_var_store_size;
81static u64 efi_var_remaining_size;
82static u64 efi_var_max_var_size;
83static u64 boot_used_size;
84static u64 boot_var_size;
85static u64 active_size;
86
72unsigned long x86_efi_facility; 87unsigned long x86_efi_facility;
73 88
74/* 89/*
@@ -98,6 +113,15 @@ static int __init setup_add_efi_memmap(char *arg)
98} 113}
99early_param("add_efi_memmap", setup_add_efi_memmap); 114early_param("add_efi_memmap", setup_add_efi_memmap);
100 115
116static bool efi_no_storage_paranoia;
117
118static int __init setup_storage_paranoia(char *arg)
119{
120 efi_no_storage_paranoia = true;
121 return 0;
122}
123early_param("efi_no_storage_paranoia", setup_storage_paranoia);
124
101 125
102static efi_status_t virt_efi_get_time(efi_time_t *tm, efi_time_cap_t *tc) 126static efi_status_t virt_efi_get_time(efi_time_t *tm, efi_time_cap_t *tc)
103{ 127{
@@ -162,8 +186,53 @@ static efi_status_t virt_efi_get_next_variable(unsigned long *name_size,
162 efi_char16_t *name, 186 efi_char16_t *name,
163 efi_guid_t *vendor) 187 efi_guid_t *vendor)
164{ 188{
165 return efi_call_virt3(get_next_variable, 189 efi_status_t status;
166 name_size, name, vendor); 190 static bool finished = false;
191 static u64 var_size;
192
193 status = efi_call_virt3(get_next_variable,
194 name_size, name, vendor);
195
196 if (status == EFI_NOT_FOUND) {
197 finished = true;
198 if (var_size < boot_used_size) {
199 boot_var_size = boot_used_size - var_size;
200 active_size += boot_var_size;
201 } else {
202 printk(KERN_WARNING FW_BUG "efi: Inconsistent initial sizes\n");
203 }
204 }
205
206 if (boot_used_size && !finished) {
207 unsigned long size;
208 u32 attr;
209 efi_status_t s;
210 void *tmp;
211
212 s = virt_efi_get_variable(name, vendor, &attr, &size, NULL);
213
214 if (s != EFI_BUFFER_TOO_SMALL || !size)
215 return status;
216
217 tmp = kmalloc(size, GFP_ATOMIC);
218
219 if (!tmp)
220 return status;
221
222 s = virt_efi_get_variable(name, vendor, &attr, &size, tmp);
223
224 if (s == EFI_SUCCESS && (attr & EFI_VARIABLE_NON_VOLATILE)) {
225 var_size += size;
226 var_size += ucs2_strsize(name, 1024);
227 active_size += size;
228 active_size += VAR_METADATA_SIZE;
229 active_size += ucs2_strsize(name, 1024);
230 }
231
232 kfree(tmp);
233 }
234
235 return status;
167} 236}
168 237
169static efi_status_t virt_efi_set_variable(efi_char16_t *name, 238static efi_status_t virt_efi_set_variable(efi_char16_t *name,
@@ -172,9 +241,34 @@ static efi_status_t virt_efi_set_variable(efi_char16_t *name,
172 unsigned long data_size, 241 unsigned long data_size,
173 void *data) 242 void *data)
174{ 243{
175 return efi_call_virt5(set_variable, 244 efi_status_t status;
176 name, vendor, attr, 245 u32 orig_attr = 0;
177 data_size, data); 246 unsigned long orig_size = 0;
247
248 status = virt_efi_get_variable(name, vendor, &orig_attr, &orig_size,
249 NULL);
250
251 if (status != EFI_BUFFER_TOO_SMALL)
252 orig_size = 0;
253
254 status = efi_call_virt5(set_variable,
255 name, vendor, attr,
256 data_size, data);
257
258 if (status == EFI_SUCCESS) {
259 if (orig_size) {
260 active_size -= orig_size;
261 active_size -= ucs2_strsize(name, 1024);
262 active_size -= VAR_METADATA_SIZE;
263 }
264 if (data_size) {
265 active_size += data_size;
266 active_size += ucs2_strsize(name, 1024);
267 active_size += VAR_METADATA_SIZE;
268 }
269 }
270
271 return status;
178} 272}
179 273
180static efi_status_t virt_efi_query_variable_info(u32 attr, 274static efi_status_t virt_efi_query_variable_info(u32 attr,
@@ -682,6 +776,9 @@ void __init efi_init(void)
682 char vendor[100] = "unknown"; 776 char vendor[100] = "unknown";
683 int i = 0; 777 int i = 0;
684 void *tmp; 778 void *tmp;
779 struct setup_data *data;
780 struct efi_var_bootdata *efi_var_data;
781 u64 pa_data;
685 782
686#ifdef CONFIG_X86_32 783#ifdef CONFIG_X86_32
687 if (boot_params.efi_info.efi_systab_hi || 784 if (boot_params.efi_info.efi_systab_hi ||
@@ -699,6 +796,22 @@ void __init efi_init(void)
699 if (efi_systab_init(efi_phys.systab)) 796 if (efi_systab_init(efi_phys.systab))
700 return; 797 return;
701 798
799 pa_data = boot_params.hdr.setup_data;
800 while (pa_data) {
801 data = early_ioremap(pa_data, sizeof(*efi_var_data));
802 if (data->type == SETUP_EFI_VARS) {
803 efi_var_data = (struct efi_var_bootdata *)data;
804
805 efi_var_store_size = efi_var_data->store_size;
806 efi_var_remaining_size = efi_var_data->remaining_size;
807 efi_var_max_var_size = efi_var_data->max_var_size;
808 }
809 pa_data = data->next;
810 early_iounmap(data, sizeof(*efi_var_data));
811 }
812
813 boot_used_size = efi_var_store_size - efi_var_remaining_size;
814
702 set_bit(EFI_SYSTEM_TABLES, &x86_efi_facility); 815 set_bit(EFI_SYSTEM_TABLES, &x86_efi_facility);
703 816
704 /* 817 /*
@@ -999,3 +1112,48 @@ u64 efi_mem_attributes(unsigned long phys_addr)
999 } 1112 }
1000 return 0; 1113 return 0;
1001} 1114}
1115
1116/*
1117 * Some firmware has serious problems when using more than 50% of the EFI
1118 * variable store, i.e. it triggers bugs that can brick machines. Ensure that
1119 * we never use more than this safe limit.
1120 *
1121 * Return EFI_SUCCESS if it is safe to write 'size' bytes to the variable
1122 * store.
1123 */
1124efi_status_t efi_query_variable_store(u32 attributes, unsigned long size)
1125{
1126 efi_status_t status;
1127 u64 storage_size, remaining_size, max_size;
1128
1129 status = efi.query_variable_info(attributes, &storage_size,
1130 &remaining_size, &max_size);
1131 if (status != EFI_SUCCESS)
1132 return status;
1133
1134 if (!max_size && remaining_size > size)
1135 printk_once(KERN_ERR FW_BUG "Broken EFI implementation"
1136 " is returning MaxVariableSize=0\n");
1137 /*
1138 * Some firmware implementations refuse to boot if there's insufficient
1139 * space in the variable store. We account for that by refusing the
1140 * write if permitting it would reduce the available space to under
1141 * 50%. However, some firmware won't reclaim variable space until
1142 * after the used (not merely the actively used) space drops below
1143 * a threshold. We can approximate that case with the value calculated
1144 * above. If both the firmware and our calculations indicate that the
1145 * available space would drop below 50%, refuse the write.
1146 */
1147
1148 if (!storage_size || size > remaining_size ||
1149 (max_size && size > max_size))
1150 return EFI_OUT_OF_RESOURCES;
1151
1152 if (!efi_no_storage_paranoia &&
1153 ((active_size + size + VAR_METADATA_SIZE > storage_size / 2) &&
1154 (remaining_size - size < storage_size / 2)))
1155 return EFI_OUT_OF_RESOURCES;
1156
1157 return EFI_SUCCESS;
1158}
1159EXPORT_SYMBOL_GPL(efi_query_variable_store);
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 6afbb2ca9a0a..e006c18d288a 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -1748,14 +1748,18 @@ static void *m2v(phys_addr_t maddr)
1748} 1748}
1749 1749
1750/* Set the page permissions on an identity-mapped pages */ 1750/* Set the page permissions on an identity-mapped pages */
1751static void set_page_prot(void *addr, pgprot_t prot) 1751static void set_page_prot_flags(void *addr, pgprot_t prot, unsigned long flags)
1752{ 1752{
1753 unsigned long pfn = __pa(addr) >> PAGE_SHIFT; 1753 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1754 pte_t pte = pfn_pte(pfn, prot); 1754 pte_t pte = pfn_pte(pfn, prot);
1755 1755
1756 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0)) 1756 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags))
1757 BUG(); 1757 BUG();
1758} 1758}
1759static void set_page_prot(void *addr, pgprot_t prot)
1760{
1761 return set_page_prot_flags(addr, prot, UVMF_NONE);
1762}
1759#ifdef CONFIG_X86_32 1763#ifdef CONFIG_X86_32
1760static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn) 1764static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1761{ 1765{
@@ -1839,12 +1843,12 @@ static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end,
1839 unsigned long addr) 1843 unsigned long addr)
1840{ 1844{
1841 if (*pt_base == PFN_DOWN(__pa(addr))) { 1845 if (*pt_base == PFN_DOWN(__pa(addr))) {
1842 set_page_prot((void *)addr, PAGE_KERNEL); 1846 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1843 clear_page((void *)addr); 1847 clear_page((void *)addr);
1844 (*pt_base)++; 1848 (*pt_base)++;
1845 } 1849 }
1846 if (*pt_end == PFN_DOWN(__pa(addr))) { 1850 if (*pt_end == PFN_DOWN(__pa(addr))) {
1847 set_page_prot((void *)addr, PAGE_KERNEL); 1851 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1848 clear_page((void *)addr); 1852 clear_page((void *)addr);
1849 (*pt_end)--; 1853 (*pt_end)--;
1850 } 1854 }
@@ -2196,6 +2200,7 @@ static const struct pv_mmu_ops xen_mmu_ops __initconst = {
2196 .lazy_mode = { 2200 .lazy_mode = {
2197 .enter = paravirt_enter_lazy_mmu, 2201 .enter = paravirt_enter_lazy_mmu,
2198 .leave = xen_leave_lazy_mmu, 2202 .leave = xen_leave_lazy_mmu,
2203 .flush = paravirt_flush_lazy_mmu,
2199 }, 2204 },
2200 2205
2201 .set_fixmap = xen_set_fixmap, 2206 .set_fixmap = xen_set_fixmap,
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-27 03:26:26 -0500