diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-iop13xx/io.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-pxa/generic.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-pxa/time.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/dma.c | 4 | ||||
-rw-r--r-- | arch/arm/mm/copypage-v4mc.c | 6 | ||||
-rw-r--r-- | arch/arm/mm/copypage-v6.c | 4 | ||||
-rw-r--r-- | arch/arm/mm/copypage-xscale.c | 6 | ||||
-rw-r--r-- | arch/arm/vfp/vfpmodule.c | 15 | ||||
-rw-r--r-- | arch/i386/boot/compressed/head.S | 2 | ||||
-rw-r--r-- | arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c | 10 | ||||
-rw-r--r-- | arch/i386/kernel/cpu/cpufreq/longhaul.c | 120 | ||||
-rw-r--r-- | arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c | 6 | ||||
-rw-r--r-- | arch/x86_64/kernel/cpufreq/Kconfig | 1 | ||||
-rw-r--r-- | arch/x86_64/kernel/traps.c | 2 |
14 files changed, 124 insertions, 83 deletions
diff --git a/arch/arm/mach-iop13xx/io.c b/arch/arm/mach-iop13xx/io.c index fbf9f88e46ea..e79a1b62600f 100644 --- a/arch/arm/mach-iop13xx/io.c +++ b/arch/arm/mach-iop13xx/io.c | |||
@@ -21,6 +21,25 @@ | |||
21 | #include <asm/hardware.h> | 21 | #include <asm/hardware.h> |
22 | #include <asm/io.h> | 22 | #include <asm/io.h> |
23 | 23 | ||
24 | void * __iomem __iop13xx_io(unsigned long io_addr) | ||
25 | { | ||
26 | void __iomem * io_virt; | ||
27 | |||
28 | switch (io_addr) { | ||
29 | case IOP13XX_PCIE_LOWER_IO_PA ... IOP13XX_PCIE_UPPER_IO_PA: | ||
30 | io_virt = (void *) IOP13XX_PCIE_IO_PHYS_TO_VIRT(io_addr); | ||
31 | break; | ||
32 | case IOP13XX_PCIX_LOWER_IO_PA ... IOP13XX_PCIX_UPPER_IO_PA: | ||
33 | io_virt = (void *) IOP13XX_PCIX_IO_PHYS_TO_VIRT(io_addr); | ||
34 | break; | ||
35 | default: | ||
36 | BUG(); | ||
37 | } | ||
38 | |||
39 | return io_virt; | ||
40 | } | ||
41 | EXPORT_SYMBOL(__iop13xx_io); | ||
42 | |||
24 | void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size, | 43 | void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size, |
25 | unsigned long flags) | 44 | unsigned long flags) |
26 | { | 45 | { |
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index 6ae605857ca9..9de1278d234f 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c | |||
@@ -76,7 +76,9 @@ unsigned long long sched_clock(void) | |||
76 | /* | 76 | /* |
77 | * 96-bit math to perform tick * NSEC_PER_SEC / CLOCK_TICK_RATE for | 77 | * 96-bit math to perform tick * NSEC_PER_SEC / CLOCK_TICK_RATE for |
78 | * any value of CLOCK_TICK_RATE. Max value is in the 80 thousand | 78 | * any value of CLOCK_TICK_RATE. Max value is in the 80 thousand |
79 | * years range which is nice, but with higher computation cost. | 79 | * years range and truncation to unsigned long long limits it to |
80 | * sched_clock's max range of ~584 years. This is nice but with | ||
81 | * higher computation cost. | ||
80 | */ | 82 | */ |
81 | { | 83 | { |
82 | union { | 84 | union { |
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index 3775b8f38429..ee2beb400414 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c | |||
@@ -101,7 +101,7 @@ static struct irqaction pxa_timer_irq = { | |||
101 | .handler = pxa_timer_interrupt, | 101 | .handler = pxa_timer_interrupt, |
102 | }; | 102 | }; |
103 | 103 | ||
104 | cycle_t pxa_get_cycles(void) | 104 | static cycle_t pxa_get_cycles(void) |
105 | { | 105 | { |
106 | return OSCR; | 106 | return OSCR; |
107 | } | 107 | } |
@@ -134,13 +134,13 @@ static void __init pxa_timer_init(void) | |||
134 | OSMR0 = OSCR + LATCH; /* set initial match */ | 134 | OSMR0 = OSCR + LATCH; /* set initial match */ |
135 | local_irq_restore(flags); | 135 | local_irq_restore(flags); |
136 | 136 | ||
137 | /* on PXA OSCR runs continiously and is not written to, so we can use it | 137 | /* |
138 | * as clock source directly. | 138 | * OSCR runs continuously on PXA and is not written to, |
139 | * so we can use it as clock source directly. | ||
139 | */ | 140 | */ |
140 | clocksource_pxa.mult = | 141 | clocksource_pxa.mult = |
141 | clocksource_hz2mult(CLOCK_TICK_RATE, clocksource_pxa.shift); | 142 | clocksource_hz2mult(CLOCK_TICK_RATE, clocksource_pxa.shift); |
142 | clocksource_register(&clocksource_pxa); | 143 | clocksource_register(&clocksource_pxa); |
143 | |||
144 | } | 144 | } |
145 | 145 | ||
146 | #ifdef CONFIG_NO_IDLE_HZ | 146 | #ifdef CONFIG_NO_IDLE_HZ |
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c index 717322a0916b..fa860e716b4f 100644 --- a/arch/arm/mach-s3c2410/dma.c +++ b/arch/arm/mach-s3c2410/dma.c | |||
@@ -1053,11 +1053,11 @@ int s3c2410_dma_config(dmach_t channel, | |||
1053 | if (chan == NULL) | 1053 | if (chan == NULL) |
1054 | return -EINVAL; | 1054 | return -EINVAL; |
1055 | 1055 | ||
1056 | printk("Initial dcon is %08x\n", dcon); | 1056 | pr_debug("%s: Initial dcon is %08x\n", __FUNCTION__, dcon); |
1057 | 1057 | ||
1058 | dcon |= chan->dcon & dma_sel.dcon_mask; | 1058 | dcon |= chan->dcon & dma_sel.dcon_mask; |
1059 | 1059 | ||
1060 | printk("New dcon is %08x\n", dcon); | 1060 | pr_debug("%s: New dcon is %08x\n", __FUNCTION__, dcon); |
1061 | 1061 | ||
1062 | switch (xferunit) { | 1062 | switch (xferunit) { |
1063 | case 1: | 1063 | case 1: |
diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c index 408b05ae6b9b..ded0e96d069d 100644 --- a/arch/arm/mm/copypage-v4mc.c +++ b/arch/arm/mm/copypage-v4mc.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <asm/page.h> | 19 | #include <asm/page.h> |
20 | #include <asm/pgtable.h> | 20 | #include <asm/pgtable.h> |
21 | #include <asm/tlbflush.h> | 21 | #include <asm/tlbflush.h> |
22 | #include <asm/cacheflush.h> | ||
22 | 23 | ||
23 | #include "mm.h" | 24 | #include "mm.h" |
24 | 25 | ||
@@ -69,6 +70,11 @@ mc_copy_user_page(void *from, void *to) | |||
69 | 70 | ||
70 | void v4_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr) | 71 | void v4_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr) |
71 | { | 72 | { |
73 | struct page *page = virt_to_page(kfrom); | ||
74 | |||
75 | if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) | ||
76 | __flush_dcache_page(page_mapping(page), page); | ||
77 | |||
72 | spin_lock(&minicache_lock); | 78 | spin_lock(&minicache_lock); |
73 | 79 | ||
74 | set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0); | 80 | set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0); |
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c index 865777dec161..3adb79257f43 100644 --- a/arch/arm/mm/copypage-v6.c +++ b/arch/arm/mm/copypage-v6.c | |||
@@ -53,6 +53,10 @@ static void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned lo | |||
53 | { | 53 | { |
54 | unsigned int offset = CACHE_COLOUR(vaddr); | 54 | unsigned int offset = CACHE_COLOUR(vaddr); |
55 | unsigned long from, to; | 55 | unsigned long from, to; |
56 | struct page *page = virt_to_page(kfrom); | ||
57 | |||
58 | if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) | ||
59 | __flush_dcache_page(page_mapping(page), page); | ||
56 | 60 | ||
57 | /* | 61 | /* |
58 | * Discard data in the kernel mapping for the new page. | 62 | * Discard data in the kernel mapping for the new page. |
diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c index aea5da723596..2e455f82a4d5 100644 --- a/arch/arm/mm/copypage-xscale.c +++ b/arch/arm/mm/copypage-xscale.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <asm/page.h> | 19 | #include <asm/page.h> |
20 | #include <asm/pgtable.h> | 20 | #include <asm/pgtable.h> |
21 | #include <asm/tlbflush.h> | 21 | #include <asm/tlbflush.h> |
22 | #include <asm/cacheflush.h> | ||
22 | 23 | ||
23 | #include "mm.h" | 24 | #include "mm.h" |
24 | 25 | ||
@@ -91,6 +92,11 @@ mc_copy_user_page(void *from, void *to) | |||
91 | 92 | ||
92 | void xscale_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr) | 93 | void xscale_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr) |
93 | { | 94 | { |
95 | struct page *page = virt_to_page(kfrom); | ||
96 | |||
97 | if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) | ||
98 | __flush_dcache_page(page_mapping(page), page); | ||
99 | |||
94 | spin_lock(&minicache_lock); | 100 | spin_lock(&minicache_lock); |
95 | 101 | ||
96 | set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0); | 102 | set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0); |
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index e26cc1f59948..490d9d18a7d1 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c | |||
@@ -264,6 +264,18 @@ void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) | |||
264 | vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); | 264 | vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); |
265 | } | 265 | } |
266 | 266 | ||
267 | static void vfp_enable(void *unused) | ||
268 | { | ||
269 | u32 access = get_copro_access(); | ||
270 | |||
271 | /* | ||
272 | * Enable full access to VFP (cp10 and cp11) | ||
273 | */ | ||
274 | set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11)); | ||
275 | } | ||
276 | |||
277 | #include <linux/smp.h> | ||
278 | |||
267 | /* | 279 | /* |
268 | * VFP support code initialisation. | 280 | * VFP support code initialisation. |
269 | */ | 281 | */ |
@@ -288,6 +300,7 @@ static int __init vfp_init(void) | |||
288 | * we just need to read the VFPSID register. | 300 | * we just need to read the VFPSID register. |
289 | */ | 301 | */ |
290 | vfpsid = fmrx(FPSID); | 302 | vfpsid = fmrx(FPSID); |
303 | barrier(); | ||
291 | 304 | ||
292 | printk(KERN_INFO "VFP support v0.3: "); | 305 | printk(KERN_INFO "VFP support v0.3: "); |
293 | if (VFP_arch) { | 306 | if (VFP_arch) { |
@@ -301,6 +314,8 @@ static int __init vfp_init(void) | |||
301 | } else if (vfpsid & FPSID_NODOUBLE) { | 314 | } else if (vfpsid & FPSID_NODOUBLE) { |
302 | printk("no double precision support\n"); | 315 | printk("no double precision support\n"); |
303 | } else { | 316 | } else { |
317 | smp_call_function(vfp_enable, NULL, 1, 1); | ||
318 | |||
304 | VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; /* Extract the architecture version */ | 319 | VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; /* Extract the architecture version */ |
305 | printk("implementor %02x architecture %d part %02x variant %x rev %x\n", | 320 | printk("implementor %02x architecture %d part %02x variant %x rev %x\n", |
306 | (vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT, | 321 | (vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT, |
diff --git a/arch/i386/boot/compressed/head.S b/arch/i386/boot/compressed/head.S index f395a4bb38bb..3517a32aaf41 100644 --- a/arch/i386/boot/compressed/head.S +++ b/arch/i386/boot/compressed/head.S | |||
@@ -28,7 +28,7 @@ | |||
28 | #include <asm/page.h> | 28 | #include <asm/page.h> |
29 | #include <asm/boot.h> | 29 | #include <asm/boot.h> |
30 | 30 | ||
31 | .section ".text.head" | 31 | .section ".text.head","ax",@progbits |
32 | .globl startup_32 | 32 | .globl startup_32 |
33 | 33 | ||
34 | startup_32: | 34 | startup_32: |
diff --git a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c index b735458c6e3a..10baa3501ed3 100644 --- a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c +++ b/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c | |||
@@ -373,8 +373,8 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy, | |||
373 | cpumask_t online_policy_cpus; | 373 | cpumask_t online_policy_cpus; |
374 | struct drv_cmd cmd; | 374 | struct drv_cmd cmd; |
375 | unsigned int msr; | 375 | unsigned int msr; |
376 | unsigned int next_state = 0; | 376 | unsigned int next_state = 0; /* Index into freq_table */ |
377 | unsigned int next_perf_state = 0; | 377 | unsigned int next_perf_state = 0; /* Index into perf table */ |
378 | unsigned int i; | 378 | unsigned int i; |
379 | int result = 0; | 379 | int result = 0; |
380 | 380 | ||
@@ -420,6 +420,7 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy, | |||
420 | msr = | 420 | msr = |
421 | (u32) perf->states[next_perf_state]. | 421 | (u32) perf->states[next_perf_state]. |
422 | control & INTEL_MSR_RANGE; | 422 | control & INTEL_MSR_RANGE; |
423 | cmd.val = get_cur_val(online_policy_cpus); | ||
423 | cmd.val = (cmd.val & ~INTEL_MSR_RANGE) | msr; | 424 | cmd.val = (cmd.val & ~INTEL_MSR_RANGE) | msr; |
424 | break; | 425 | break; |
425 | case SYSTEM_IO_CAPABLE: | 426 | case SYSTEM_IO_CAPABLE: |
@@ -439,8 +440,8 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy, | |||
439 | else | 440 | else |
440 | cpu_set(policy->cpu, cmd.mask); | 441 | cpu_set(policy->cpu, cmd.mask); |
441 | 442 | ||
442 | freqs.old = data->freq_table[perf->state].frequency; | 443 | freqs.old = perf->states[perf->state].core_frequency * 1000; |
443 | freqs.new = data->freq_table[next_perf_state].frequency; | 444 | freqs.new = data->freq_table[next_state].frequency; |
444 | for_each_cpu_mask(i, cmd.mask) { | 445 | for_each_cpu_mask(i, cmd.mask) { |
445 | freqs.cpu = i; | 446 | freqs.cpu = i; |
446 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | 447 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); |
@@ -677,6 +678,7 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) | |||
677 | valid_states++; | 678 | valid_states++; |
678 | } | 679 | } |
679 | data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END; | 680 | data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END; |
681 | perf->state = 0; | ||
680 | 682 | ||
681 | result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table); | 683 | result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table); |
682 | if (result) | 684 | if (result) |
diff --git a/arch/i386/kernel/cpu/cpufreq/longhaul.c b/arch/i386/kernel/cpu/cpufreq/longhaul.c index 6d9c97a690fd..e940e00b96c9 100644 --- a/arch/i386/kernel/cpu/cpufreq/longhaul.c +++ b/arch/i386/kernel/cpu/cpufreq/longhaul.c | |||
@@ -52,6 +52,10 @@ | |||
52 | #define CPU_EZRA_T 4 | 52 | #define CPU_EZRA_T 4 |
53 | #define CPU_NEHEMIAH 5 | 53 | #define CPU_NEHEMIAH 5 |
54 | 54 | ||
55 | /* Flags */ | ||
56 | #define USE_ACPI_C3 (1 << 1) | ||
57 | #define USE_NORTHBRIDGE (1 << 2) | ||
58 | |||
55 | static int cpu_model; | 59 | static int cpu_model; |
56 | static unsigned int numscales=16; | 60 | static unsigned int numscales=16; |
57 | static unsigned int fsb; | 61 | static unsigned int fsb; |
@@ -68,7 +72,7 @@ static unsigned int minmult, maxmult; | |||
68 | static int can_scale_voltage; | 72 | static int can_scale_voltage; |
69 | static struct acpi_processor *pr = NULL; | 73 | static struct acpi_processor *pr = NULL; |
70 | static struct acpi_processor_cx *cx = NULL; | 74 | static struct acpi_processor_cx *cx = NULL; |
71 | static int port22_en; | 75 | static u8 longhaul_flags; |
72 | 76 | ||
73 | /* Module parameters */ | 77 | /* Module parameters */ |
74 | static int scale_voltage; | 78 | static int scale_voltage; |
@@ -80,7 +84,6 @@ static int ignore_latency; | |||
80 | /* Clock ratios multiplied by 10 */ | 84 | /* Clock ratios multiplied by 10 */ |
81 | static int clock_ratio[32]; | 85 | static int clock_ratio[32]; |
82 | static int eblcr_table[32]; | 86 | static int eblcr_table[32]; |
83 | static unsigned int highest_speed, lowest_speed; /* kHz */ | ||
84 | static int longhaul_version; | 87 | static int longhaul_version; |
85 | static struct cpufreq_frequency_table *longhaul_table; | 88 | static struct cpufreq_frequency_table *longhaul_table; |
86 | 89 | ||
@@ -178,7 +181,7 @@ static void do_powersaver(int cx_address, unsigned int clock_ratio_index) | |||
178 | safe_halt(); | 181 | safe_halt(); |
179 | /* Change frequency on next halt or sleep */ | 182 | /* Change frequency on next halt or sleep */ |
180 | wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); | 183 | wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); |
181 | if (port22_en) { | 184 | if (!cx_address) { |
182 | ACPI_FLUSH_CPU_CACHE(); | 185 | ACPI_FLUSH_CPU_CACHE(); |
183 | /* Invoke C1 */ | 186 | /* Invoke C1 */ |
184 | halt(); | 187 | halt(); |
@@ -189,7 +192,6 @@ static void do_powersaver(int cx_address, unsigned int clock_ratio_index) | |||
189 | /* Dummy op - must do something useless after P_LVL3 read */ | 192 | /* Dummy op - must do something useless after P_LVL3 read */ |
190 | t = inl(acpi_fadt.xpm_tmr_blk.address); | 193 | t = inl(acpi_fadt.xpm_tmr_blk.address); |
191 | } | 194 | } |
192 | |||
193 | /* Disable bus ratio bit */ | 195 | /* Disable bus ratio bit */ |
194 | local_irq_disable(); | 196 | local_irq_disable(); |
195 | longhaul.bits.RevisionKey = longhaul.bits.RevisionID; | 197 | longhaul.bits.RevisionKey = longhaul.bits.RevisionID; |
@@ -243,15 +245,14 @@ static void longhaul_setstate(unsigned int clock_ratio_index) | |||
243 | outb(0xFF,0xA1); /* Overkill */ | 245 | outb(0xFF,0xA1); /* Overkill */ |
244 | outb(0xFE,0x21); /* TMR0 only */ | 246 | outb(0xFE,0x21); /* TMR0 only */ |
245 | 247 | ||
246 | if (pr->flags.bm_control) { | 248 | if (longhaul_flags & USE_NORTHBRIDGE) { |
249 | /* Disable AGP and PCI arbiters */ | ||
250 | outb(3, 0x22); | ||
251 | } else if ((pr != NULL) && pr->flags.bm_control) { | ||
247 | /* Disable bus master arbitration */ | 252 | /* Disable bus master arbitration */ |
248 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1, | 253 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1, |
249 | ACPI_MTX_DO_NOT_LOCK); | 254 | ACPI_MTX_DO_NOT_LOCK); |
250 | } else if (port22_en) { | ||
251 | /* Disable AGP and PCI arbiters */ | ||
252 | outb(3, 0x22); | ||
253 | } | 255 | } |
254 | |||
255 | switch (longhaul_version) { | 256 | switch (longhaul_version) { |
256 | 257 | ||
257 | /* | 258 | /* |
@@ -278,22 +279,25 @@ static void longhaul_setstate(unsigned int clock_ratio_index) | |||
278 | * to work in practice. | 279 | * to work in practice. |
279 | */ | 280 | */ |
280 | case TYPE_POWERSAVER: | 281 | case TYPE_POWERSAVER: |
281 | /* Don't allow wakeup */ | 282 | if (longhaul_flags & USE_ACPI_C3) { |
282 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0, | 283 | /* Don't allow wakeup */ |
283 | ACPI_MTX_DO_NOT_LOCK); | 284 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0, |
284 | do_powersaver(cx->address, clock_ratio_index); | 285 | ACPI_MTX_DO_NOT_LOCK); |
286 | do_powersaver(cx->address, clock_ratio_index); | ||
287 | } else { | ||
288 | do_powersaver(0, clock_ratio_index); | ||
289 | } | ||
285 | break; | 290 | break; |
286 | } | 291 | } |
287 | 292 | ||
288 | if (pr->flags.bm_control) { | 293 | if (longhaul_flags & USE_NORTHBRIDGE) { |
294 | /* Enable arbiters */ | ||
295 | outb(0, 0x22); | ||
296 | } else if ((pr != NULL) && pr->flags.bm_control) { | ||
289 | /* Enable bus master arbitration */ | 297 | /* Enable bus master arbitration */ |
290 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0, | 298 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0, |
291 | ACPI_MTX_DO_NOT_LOCK); | 299 | ACPI_MTX_DO_NOT_LOCK); |
292 | } else if (port22_en) { | ||
293 | /* Enable arbiters */ | ||
294 | outb(0, 0x22); | ||
295 | } | 300 | } |
296 | |||
297 | outb(pic2_mask,0xA1); /* restore mask */ | 301 | outb(pic2_mask,0xA1); /* restore mask */ |
298 | outb(pic1_mask,0x21); | 302 | outb(pic1_mask,0x21); |
299 | 303 | ||
@@ -314,12 +318,12 @@ static void longhaul_setstate(unsigned int clock_ratio_index) | |||
314 | 318 | ||
315 | #define ROUNDING 0xf | 319 | #define ROUNDING 0xf |
316 | 320 | ||
317 | static int _guess(int guess) | 321 | static int _guess(int guess, int mult) |
318 | { | 322 | { |
319 | int target; | 323 | int target; |
320 | 324 | ||
321 | target = ((maxmult/10)*guess); | 325 | target = ((mult/10)*guess); |
322 | if (maxmult%10 != 0) | 326 | if (mult%10 != 0) |
323 | target += (guess/2); | 327 | target += (guess/2); |
324 | target += ROUNDING/2; | 328 | target += ROUNDING/2; |
325 | target &= ~ROUNDING; | 329 | target &= ~ROUNDING; |
@@ -327,17 +331,17 @@ static int _guess(int guess) | |||
327 | } | 331 | } |
328 | 332 | ||
329 | 333 | ||
330 | static int guess_fsb(void) | 334 | static int guess_fsb(int mult) |
331 | { | 335 | { |
332 | int speed = (cpu_khz/1000); | 336 | int speed = (cpu_khz/1000); |
333 | int i; | 337 | int i; |
334 | int speeds[3] = { 66, 100, 133 }; | 338 | int speeds[] = { 66, 100, 133, 200 }; |
335 | 339 | ||
336 | speed += ROUNDING/2; | 340 | speed += ROUNDING/2; |
337 | speed &= ~ROUNDING; | 341 | speed &= ~ROUNDING; |
338 | 342 | ||
339 | for (i=0; i<3; i++) { | 343 | for (i=0; i<4; i++) { |
340 | if (_guess(speeds[i]) == speed) | 344 | if (_guess(speeds[i], mult) == speed) |
341 | return speeds[i]; | 345 | return speeds[i]; |
342 | } | 346 | } |
343 | return 0; | 347 | return 0; |
@@ -354,9 +358,7 @@ static int __init longhaul_get_ranges(void) | |||
354 | 130, 150, 160, 140, -1, 155, -1, 145 }; | 358 | 130, 150, 160, 140, -1, 155, -1, 145 }; |
355 | unsigned int j, k = 0; | 359 | unsigned int j, k = 0; |
356 | union msr_longhaul longhaul; | 360 | union msr_longhaul longhaul; |
357 | unsigned long lo, hi; | 361 | int mult = 0; |
358 | unsigned int eblcr_fsb_table_v1[] = { 66, 133, 100, -1 }; | ||
359 | unsigned int eblcr_fsb_table_v2[] = { 133, 100, -1, 66 }; | ||
360 | 362 | ||
361 | switch (longhaul_version) { | 363 | switch (longhaul_version) { |
362 | case TYPE_LONGHAUL_V1: | 364 | case TYPE_LONGHAUL_V1: |
@@ -364,30 +366,18 @@ static int __init longhaul_get_ranges(void) | |||
364 | /* Ugh, Longhaul v1 didn't have the min/max MSRs. | 366 | /* Ugh, Longhaul v1 didn't have the min/max MSRs. |
365 | Assume min=3.0x & max = whatever we booted at. */ | 367 | Assume min=3.0x & max = whatever we booted at. */ |
366 | minmult = 30; | 368 | minmult = 30; |
367 | maxmult = longhaul_get_cpu_mult(); | 369 | maxmult = mult = longhaul_get_cpu_mult(); |
368 | rdmsr (MSR_IA32_EBL_CR_POWERON, lo, hi); | ||
369 | invalue = (lo & (1<<18|1<<19)) >>18; | ||
370 | if (cpu_model==CPU_SAMUEL || cpu_model==CPU_SAMUEL2) | ||
371 | fsb = eblcr_fsb_table_v1[invalue]; | ||
372 | else | ||
373 | fsb = guess_fsb(); | ||
374 | break; | 370 | break; |
375 | 371 | ||
376 | case TYPE_POWERSAVER: | 372 | case TYPE_POWERSAVER: |
377 | /* Ezra-T */ | 373 | /* Ezra-T */ |
378 | if (cpu_model==CPU_EZRA_T) { | 374 | if (cpu_model==CPU_EZRA_T) { |
375 | minmult = 30; | ||
379 | rdmsrl (MSR_VIA_LONGHAUL, longhaul.val); | 376 | rdmsrl (MSR_VIA_LONGHAUL, longhaul.val); |
380 | invalue = longhaul.bits.MaxMHzBR; | 377 | invalue = longhaul.bits.MaxMHzBR; |
381 | if (longhaul.bits.MaxMHzBR4) | 378 | if (longhaul.bits.MaxMHzBR4) |
382 | invalue += 16; | 379 | invalue += 16; |
383 | maxmult=ezra_t_multipliers[invalue]; | 380 | maxmult = mult = ezra_t_multipliers[invalue]; |
384 | |||
385 | invalue = longhaul.bits.MinMHzBR; | ||
386 | if (longhaul.bits.MinMHzBR4 == 1) | ||
387 | minmult = 30; | ||
388 | else | ||
389 | minmult = ezra_t_multipliers[invalue]; | ||
390 | fsb = eblcr_fsb_table_v2[longhaul.bits.MaxMHzFSB]; | ||
391 | break; | 381 | break; |
392 | } | 382 | } |
393 | 383 | ||
@@ -407,21 +397,16 @@ static int __init longhaul_get_ranges(void) | |||
407 | * But it works, so we don't grumble. | 397 | * But it works, so we don't grumble. |
408 | */ | 398 | */ |
409 | minmult=40; | 399 | minmult=40; |
410 | maxmult=longhaul_get_cpu_mult(); | 400 | maxmult = mult = longhaul_get_cpu_mult(); |
411 | |||
412 | /* Starting with the 1.2GHz parts, theres a 200MHz bus. */ | ||
413 | if ((cpu_khz/maxmult) > 13400) | ||
414 | fsb = 200; | ||
415 | else | ||
416 | fsb = eblcr_fsb_table_v2[longhaul.bits.MaxMHzFSB]; | ||
417 | break; | 401 | break; |
418 | } | 402 | } |
419 | } | 403 | } |
404 | fsb = guess_fsb(mult); | ||
420 | 405 | ||
421 | dprintk ("MinMult:%d.%dx MaxMult:%d.%dx\n", | 406 | dprintk ("MinMult:%d.%dx MaxMult:%d.%dx\n", |
422 | minmult/10, minmult%10, maxmult/10, maxmult%10); | 407 | minmult/10, minmult%10, maxmult/10, maxmult%10); |
423 | 408 | ||
424 | if (fsb == -1) { | 409 | if (fsb == 0) { |
425 | printk (KERN_INFO PFX "Invalid (reserved) FSB!\n"); | 410 | printk (KERN_INFO PFX "Invalid (reserved) FSB!\n"); |
426 | return -EINVAL; | 411 | return -EINVAL; |
427 | } | 412 | } |
@@ -691,27 +676,32 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy) | |||
691 | /* Find ACPI data for processor */ | 676 | /* Find ACPI data for processor */ |
692 | acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT, ACPI_UINT32_MAX, | 677 | acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT, ACPI_UINT32_MAX, |
693 | &longhaul_walk_callback, NULL, (void *)&pr); | 678 | &longhaul_walk_callback, NULL, (void *)&pr); |
694 | if (pr == NULL) | ||
695 | goto err_acpi; | ||
696 | 679 | ||
697 | if (longhaul_version == TYPE_POWERSAVER) { | 680 | /* Check ACPI support for C3 state */ |
698 | /* Check ACPI support for C3 state */ | 681 | if ((pr != NULL) && (longhaul_version == TYPE_POWERSAVER)) { |
699 | cx = &pr->power.states[ACPI_STATE_C3]; | 682 | cx = &pr->power.states[ACPI_STATE_C3]; |
700 | if (cx->address > 0 && | 683 | if (cx->address > 0 && |
701 | (cx->latency <= 1000 || ignore_latency != 0) ) { | 684 | (cx->latency <= 1000 || ignore_latency != 0) ) { |
685 | longhaul_flags |= USE_ACPI_C3; | ||
702 | goto print_support_type; | 686 | goto print_support_type; |
703 | } | 687 | } |
704 | } | 688 | } |
689 | /* Check if northbridge is friendly */ | ||
690 | if (enable_arbiter_disable()) { | ||
691 | longhaul_flags |= USE_NORTHBRIDGE; | ||
692 | goto print_support_type; | ||
693 | } | ||
694 | |||
695 | /* No ACPI C3 or we can't use it */ | ||
705 | /* Check ACPI support for bus master arbiter disable */ | 696 | /* Check ACPI support for bus master arbiter disable */ |
706 | if (!pr->flags.bm_control) { | 697 | if ((pr == NULL) || !(pr->flags.bm_control)) { |
707 | if (enable_arbiter_disable()) { | 698 | printk(KERN_ERR PFX |
708 | port22_en = 1; | 699 | "No ACPI support. Unsupported northbridge.\n"); |
709 | } else { | 700 | return -ENODEV; |
710 | goto err_acpi; | ||
711 | } | ||
712 | } | 701 | } |
702 | |||
713 | print_support_type: | 703 | print_support_type: |
714 | if (!port22_en) { | 704 | if (!(longhaul_flags & USE_NORTHBRIDGE)) { |
715 | printk (KERN_INFO PFX "Using ACPI support.\n"); | 705 | printk (KERN_INFO PFX "Using ACPI support.\n"); |
716 | } else { | 706 | } else { |
717 | printk (KERN_INFO PFX "Using northbridge support.\n"); | 707 | printk (KERN_INFO PFX "Using northbridge support.\n"); |
@@ -736,10 +726,6 @@ print_support_type: | |||
736 | cpufreq_frequency_table_get_attr(longhaul_table, policy->cpu); | 726 | cpufreq_frequency_table_get_attr(longhaul_table, policy->cpu); |
737 | 727 | ||
738 | return 0; | 728 | return 0; |
739 | |||
740 | err_acpi: | ||
741 | printk(KERN_ERR PFX "No ACPI support. Unsupported northbridge. Aborting.\n"); | ||
742 | return -ENODEV; | ||
743 | } | 729 | } |
744 | 730 | ||
745 | static int __devexit longhaul_cpu_exit(struct cpufreq_policy *policy) | 731 | static int __devexit longhaul_cpu_exit(struct cpufreq_policy *policy) |
@@ -774,8 +760,8 @@ static int __init longhaul_init(void) | |||
774 | 760 | ||
775 | #ifdef CONFIG_SMP | 761 | #ifdef CONFIG_SMP |
776 | if (num_online_cpus() > 1) { | 762 | if (num_online_cpus() > 1) { |
777 | return -ENODEV; | ||
778 | printk(KERN_ERR PFX "More than 1 CPU detected, longhaul disabled.\n"); | 763 | printk(KERN_ERR PFX "More than 1 CPU detected, longhaul disabled.\n"); |
764 | return -ENODEV; | ||
779 | } | 765 | } |
780 | #endif | 766 | #endif |
781 | #ifdef CONFIG_X86_IO_APIC | 767 | #ifdef CONFIG_X86_IO_APIC |
diff --git a/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c b/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c index 5113e9231634..f43b987f952b 100644 --- a/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c +++ b/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c | |||
@@ -533,9 +533,9 @@ static int centrino_cpu_init_acpi(struct cpufreq_policy *policy) | |||
533 | 533 | ||
534 | /* notify BIOS that we exist */ | 534 | /* notify BIOS that we exist */ |
535 | acpi_processor_notify_smm(THIS_MODULE); | 535 | acpi_processor_notify_smm(THIS_MODULE); |
536 | printk("speedstep-centrino with X86_SPEEDSTEP_CENTRINO_ACPI" | 536 | printk("speedstep-centrino with X86_SPEEDSTEP_CENTRINO_ACPI " |
537 | "config is deprecated.\n " | 537 | "config is deprecated.\n " |
538 | "Use X86_ACPI_CPUFREQ (acpi-cpufreq instead.\n" ); | 538 | "Use X86_ACPI_CPUFREQ (acpi-cpufreq) instead.\n" ); |
539 | 539 | ||
540 | return 0; | 540 | return 0; |
541 | 541 | ||
diff --git a/arch/x86_64/kernel/cpufreq/Kconfig b/arch/x86_64/kernel/cpufreq/Kconfig index 3abcfa3e1ed7..45a6a1fd14ac 100644 --- a/arch/x86_64/kernel/cpufreq/Kconfig +++ b/arch/x86_64/kernel/cpufreq/Kconfig | |||
@@ -49,6 +49,7 @@ config X86_SPEEDSTEP_CENTRINO_ACPI | |||
49 | 49 | ||
50 | config X86_ACPI_CPUFREQ | 50 | config X86_ACPI_CPUFREQ |
51 | tristate "ACPI Processor P-States driver" | 51 | tristate "ACPI Processor P-States driver" |
52 | select CPU_FREQ_TABLE | ||
52 | depends on ACPI_PROCESSOR | 53 | depends on ACPI_PROCESSOR |
53 | help | 54 | help |
54 | This driver adds a CPUFreq driver which utilizes the ACPI | 55 | This driver adds a CPUFreq driver which utilizes the ACPI |
diff --git a/arch/x86_64/kernel/traps.c b/arch/x86_64/kernel/traps.c index 1d9eb6db732a..09d2e8a10a49 100644 --- a/arch/x86_64/kernel/traps.c +++ b/arch/x86_64/kernel/traps.c | |||
@@ -319,7 +319,7 @@ void dump_trace(struct task_struct *tsk, struct pt_regs *regs, | |||
319 | /* | 319 | /* |
320 | * This handles the process stack: | 320 | * This handles the process stack: |
321 | */ | 321 | */ |
322 | tinfo = current_thread_info(); | 322 | tinfo = task_thread_info(tsk); |
323 | HANDLE_STACK (valid_stack_ptr(tinfo, stack)); | 323 | HANDLE_STACK (valid_stack_ptr(tinfo, stack)); |
324 | #undef HANDLE_STACK | 324 | #undef HANDLE_STACK |
325 | put_cpu(); | 325 | put_cpu(); |