diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-at91/at91sam9260.c | 13 | ||||
-rw-r--r-- | arch/arm/mach-at91/include/mach/at91sam9260.h | 4 |
2 files changed, 9 insertions, 8 deletions
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index 14882aec1d4f..4ade265be805 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c | |||
@@ -310,15 +310,12 @@ static void __init at91sam9xe_map_io(void) | |||
310 | 310 | ||
311 | static void __init at91sam9260_map_io(void) | 311 | static void __init at91sam9260_map_io(void) |
312 | { | 312 | { |
313 | if (cpu_is_at91sam9xe()) { | 313 | if (cpu_is_at91sam9xe()) |
314 | at91sam9xe_map_io(); | 314 | at91sam9xe_map_io(); |
315 | } else if (cpu_is_at91sam9g20()) { | 315 | else if (cpu_is_at91sam9g20()) |
316 | at91_init_sram(0, AT91SAM9G20_SRAM0_BASE, AT91SAM9G20_SRAM0_SIZE); | 316 | at91_init_sram(0, AT91SAM9G20_SRAM_BASE, AT91SAM9G20_SRAM_SIZE); |
317 | at91_init_sram(1, AT91SAM9G20_SRAM1_BASE, AT91SAM9G20_SRAM1_SIZE); | 317 | else |
318 | } else { | 318 | at91_init_sram(0, AT91SAM9260_SRAM_BASE, AT91SAM9260_SRAM_SIZE); |
319 | at91_init_sram(0, AT91SAM9260_SRAM0_BASE, AT91SAM9260_SRAM0_SIZE); | ||
320 | at91_init_sram(1, AT91SAM9260_SRAM1_BASE, AT91SAM9260_SRAM1_SIZE); | ||
321 | } | ||
322 | } | 319 | } |
323 | 320 | ||
324 | static void __init at91sam9260_ioremap_registers(void) | 321 | static void __init at91sam9260_ioremap_registers(void) |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h index 2e47b6d19ab9..08ae9afd00fe 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9260.h +++ b/arch/arm/mach-at91/include/mach/at91sam9260.h | |||
@@ -113,6 +113,8 @@ | |||
113 | #define AT91SAM9260_SRAM0_SIZE SZ_4K /* Internal SRAM 0 size (4Kb) */ | 113 | #define AT91SAM9260_SRAM0_SIZE SZ_4K /* Internal SRAM 0 size (4Kb) */ |
114 | #define AT91SAM9260_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */ | 114 | #define AT91SAM9260_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */ |
115 | #define AT91SAM9260_SRAM1_SIZE SZ_4K /* Internal SRAM 1 size (4Kb) */ | 115 | #define AT91SAM9260_SRAM1_SIZE SZ_4K /* Internal SRAM 1 size (4Kb) */ |
116 | #define AT91SAM9260_SRAM_BASE 0x002FF000 /* Internal SRAM base address */ | ||
117 | #define AT91SAM9260_SRAM_SIZE SZ_8K /* Internal SRAM size (8Kb) */ | ||
116 | 118 | ||
117 | #define AT91SAM9260_UHP_BASE 0x00500000 /* USB Host controller */ | 119 | #define AT91SAM9260_UHP_BASE 0x00500000 /* USB Host controller */ |
118 | 120 | ||
@@ -126,6 +128,8 @@ | |||
126 | #define AT91SAM9G20_SRAM0_SIZE SZ_16K /* Internal SRAM 0 size (16Kb) */ | 128 | #define AT91SAM9G20_SRAM0_SIZE SZ_16K /* Internal SRAM 0 size (16Kb) */ |
127 | #define AT91SAM9G20_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */ | 129 | #define AT91SAM9G20_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */ |
128 | #define AT91SAM9G20_SRAM1_SIZE SZ_16K /* Internal SRAM 1 size (16Kb) */ | 130 | #define AT91SAM9G20_SRAM1_SIZE SZ_16K /* Internal SRAM 1 size (16Kb) */ |
131 | #define AT91SAM9G20_SRAM_BASE 0x002FC000 /* Internal SRAM base address */ | ||
132 | #define AT91SAM9G20_SRAM_SIZE SZ_32K /* Internal SRAM size (32Kb) */ | ||
129 | 133 | ||
130 | #define AT91SAM9G20_UHP_BASE 0x00500000 /* USB Host controller */ | 134 | #define AT91SAM9G20_UHP_BASE 0x00500000 /* USB Host controller */ |
131 | 135 | ||