436 files changed, 4944 insertions, 2332 deletions

diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index fc95ee1bcf6f..47f63d480141 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -8,6 +8,9 @@ config ALPHA
         select HAVE_IRQ_WORK
         select HAVE_PERF_EVENTS
         select HAVE_DMA_ATTRS
+        select HAVE_GENERIC_HARDIRQS
+        select GENERIC_IRQ_PROBE
+        select AUTO_IRQ_AFFINITY if SMP
         help
           The Alpha is a 64-bit general-purpose processor designed and
           marketed by the Digital Equipment Corporation of blessed memory,
@@ -68,22 +71,6 @@ config GENERIC_IOMAP
         bool
         default n
 
-config GENERIC_HARDIRQS_NO__DO_IRQ
-        def_bool y
-
-config GENERIC_HARDIRQS
-        bool
-        default y
-
-config GENERIC_IRQ_PROBE
-        bool
-        default y
-
-config AUTO_IRQ_AFFINITY
-        bool
-        depends on SMP
-        default y
-
 source "init/Kconfig"
 source "kernel/Kconfig.freezer"
 
diff --git a/arch/arm/configs/ag5evm_defconfig b/arch/arm/configs/ag5evm_defconfig
index 2b9cf56db363..212ead354a6b 100644
--- a/arch/arm/configs/ag5evm_defconfig
+++ b/arch/arm/configs/ag5evm_defconfig
@@ -10,7 +10,7 @@ CONFIG_NAMESPACES=y
 # CONFIG_PID_NS is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_IOSCHED_DEADLINE is not set
diff --git a/arch/arm/configs/am200epdkit_defconfig b/arch/arm/configs/am200epdkit_defconfig
index 5536c488dd01..f0dea52e49c4 100644
--- a/arch/arm/configs/am200epdkit_defconfig
+++ b/arch/arm/configs/am200epdkit_defconfig
@@ -3,7 +3,7 @@ CONFIG_LOCALVERSION="gum"
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_EPOLL is not set
 # CONFIG_SHMEM is not set
diff --git a/arch/arm/configs/at572d940hfek_defconfig b/arch/arm/configs/at572d940hfek_defconfig
index 695e32d4fb58..1b1158ae8f82 100644
--- a/arch/arm/configs/at572d940hfek_defconfig
+++ b/arch/arm/configs/at572d940hfek_defconfig
@@ -17,7 +17,7 @@ CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_RELAY=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_PROFILING=y
 CONFIG_OPROFILE=m
diff --git a/arch/arm/configs/badge4_defconfig b/arch/arm/configs/badge4_defconfig
index 3a1ad15a779f..5b54abbeb0b3 100644
--- a/arch/arm/configs/badge4_defconfig
+++ b/arch/arm/configs/badge4_defconfig
@@ -1,6 +1,6 @@
 CONFIG_EXPERIMENTAL=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODVERSIONS=y
 CONFIG_ARCH_SA1100=y
diff --git a/arch/arm/configs/bcmring_defconfig b/arch/arm/configs/bcmring_defconfig
index 75984cd1e233..795374d48f81 100644
--- a/arch/arm/configs/bcmring_defconfig
+++ b/arch/arm/configs/bcmring_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 # CONFIG_HOTPLUG is not set
 # CONFIG_ELF_CORE is not set
diff --git a/arch/arm/configs/cm_x2xx_defconfig b/arch/arm/configs/cm_x2xx_defconfig
index dcfbcf3b6c3e..a93ff8da5bab 100644
--- a/arch/arm/configs/cm_x2xx_defconfig
+++ b/arch/arm/configs/cm_x2xx_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_VM_EVENT_COUNTERS is not set
 # CONFIG_SLUB_DEBUG is not set
 # CONFIG_COMPAT_BRK is not set
diff --git a/arch/arm/configs/colibri_pxa270_defconfig b/arch/arm/configs/colibri_pxa270_defconfig
index f52c64e36d8d..2ef2c5e8aaec 100644
--- a/arch/arm/configs/colibri_pxa270_defconfig
+++ b/arch/arm/configs/colibri_pxa270_defconfig
@@ -8,7 +8,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/arm/configs/collie_defconfig b/arch/arm/configs/collie_defconfig
index 310f9a6270be..6c56ad086c7c 100644
--- a/arch/arm/configs/collie_defconfig
+++ b/arch/arm/configs/collie_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_BASE_FULL is not set
 # CONFIG_EPOLL is not set
 CONFIG_SLOB=y
diff --git a/arch/arm/configs/corgi_defconfig b/arch/arm/configs/corgi_defconfig
index 4a1fa81ed37d..e53c47563845 100644
--- a/arch/arm/configs/corgi_defconfig
+++ b/arch/arm/configs/corgi_defconfig
@@ -4,7 +4,7 @@ CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_PROFILING=y
 CONFIG_OPROFILE=m
 CONFIG_MODULES=y
diff --git a/arch/arm/configs/da8xx_omapl_defconfig b/arch/arm/configs/da8xx_omapl_defconfig
index cdc40c4b8c48..88ccde058ba4 100644
--- a/arch/arm/configs/da8xx_omapl_defconfig
+++ b/arch/arm/configs/da8xx_omapl_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_MODULE_FORCE_UNLOAD=y
diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig
index 2519cc5a5f8f..889922ad229c 100644
--- a/arch/arm/configs/davinci_all_defconfig
+++ b/arch/arm/configs/davinci_all_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_MODULE_FORCE_UNLOAD=y
diff --git a/arch/arm/configs/dove_defconfig b/arch/arm/configs/dove_defconfig
index 9359e1bf32c1..54bf5eec8016 100644
--- a/arch/arm/configs/dove_defconfig
+++ b/arch/arm/configs/dove_defconfig
@@ -1,7 +1,7 @@
 CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/arm/configs/ebsa110_defconfig b/arch/arm/configs/ebsa110_defconfig
index c3194186920c..14559dbb4c2c 100644
--- a/arch/arm/configs/ebsa110_defconfig
+++ b/arch/arm/configs/ebsa110_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_ARCH_EBSA110=y
 CONFIG_PCCARD=m
diff --git a/arch/arm/configs/edb7211_defconfig b/arch/arm/configs/edb7211_defconfig
index 7b62be1561ea..d52ded350a12 100644
--- a/arch/arm/configs/edb7211_defconfig
+++ b/arch/arm/configs/edb7211_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_HOTPLUG is not set
 CONFIG_ARCH_CLPS711X=y
 CONFIG_ARCH_EDB7211=y
diff --git a/arch/arm/configs/em_x270_defconfig b/arch/arm/configs/em_x270_defconfig
index d7db34f79702..60a21e01eb70 100644
--- a/arch/arm/configs/em_x270_defconfig
+++ b/arch/arm/configs/em_x270_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_VM_EVENT_COUNTERS is not set
 # CONFIG_SLUB_DEBUG is not set
 # CONFIG_COMPAT_BRK is not set
diff --git a/arch/arm/configs/ep93xx_defconfig b/arch/arm/configs/ep93xx_defconfig
index 6d6689cdf398..8e97b2f7ceec 100644
--- a/arch/arm/configs/ep93xx_defconfig
+++ b/arch/arm/configs/ep93xx_defconfig
@@ -4,7 +4,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/arm/configs/eseries_pxa_defconfig b/arch/arm/configs/eseries_pxa_defconfig
index 1691dea582fe..d68ac67c201c 100644
--- a/arch/arm/configs/eseries_pxa_defconfig
+++ b/arch/arm/configs/eseries_pxa_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_COMPAT_BRK is not set
 CONFIG_SLAB=y
diff --git a/arch/arm/configs/ezx_defconfig b/arch/arm/configs/ezx_defconfig
index c4eeb6d1cbf0..227a477346ed 100644
--- a/arch/arm/configs/ezx_defconfig
+++ b/arch/arm/configs/ezx_defconfig
@@ -7,7 +7,7 @@ CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_RD_BZIP2=y
 CONFIG_RD_LZMA=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_COMPAT_BRK is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/arm/configs/footbridge_defconfig b/arch/arm/configs/footbridge_defconfig
index 4f925ead2617..038518ab39a8 100644
--- a/arch/arm/configs/footbridge_defconfig
+++ b/arch/arm/configs/footbridge_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_HOTPLUG is not set
 CONFIG_MODULES=y
 CONFIG_ARCH_FOOTBRIDGE=y
diff --git a/arch/arm/configs/fortunet_defconfig b/arch/arm/configs/fortunet_defconfig
index e11c7eab8ed0..840fced7529f 100644
--- a/arch/arm/configs/fortunet_defconfig
+++ b/arch/arm/configs/fortunet_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_HOTPLUG is not set
 CONFIG_ARCH_CLPS711X=y
 CONFIG_ARCH_FORTUNET=y
diff --git a/arch/arm/configs/h5000_defconfig b/arch/arm/configs/h5000_defconfig
index ac336f10000c..37903e3f0efc 100644
--- a/arch/arm/configs/h5000_defconfig
+++ b/arch/arm/configs/h5000_defconfig
@@ -4,7 +4,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=16
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_UID16 is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/arm/configs/imote2_defconfig b/arch/arm/configs/imote2_defconfig
index ade55c8c408b..176ec22af034 100644
--- a/arch/arm/configs/imote2_defconfig
+++ b/arch/arm/configs/imote2_defconfig
@@ -6,7 +6,7 @@ CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_RD_BZIP2=y
 CONFIG_RD_LZMA=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_COMPAT_BRK is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/arm/configs/ixp2000_defconfig b/arch/arm/configs/ixp2000_defconfig
index 908324684549..8405aded97a3 100644
--- a/arch/arm/configs/ixp2000_defconfig
+++ b/arch/arm/configs/ixp2000_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_HOTPLUG is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/arm/configs/ixp23xx_defconfig b/arch/arm/configs/ixp23xx_defconfig
index 7fc056a8569c..688717612e91 100644
--- a/arch/arm/configs/ixp23xx_defconfig
+++ b/arch/arm/configs/ixp23xx_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/arm/configs/ixp4xx_defconfig b/arch/arm/configs/ixp4xx_defconfig
index 5c5023934001..063e2ab2c8f1 100644
--- a/arch/arm/configs/ixp4xx_defconfig
+++ b/arch/arm/configs/ixp4xx_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODVERSIONS=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/arm/configs/loki_defconfig b/arch/arm/configs/loki_defconfig
index e1eaff7f5536..1ba752b2dc6d 100644
--- a/arch/arm/configs/loki_defconfig
+++ b/arch/arm/configs/loki_defconfig
@@ -1,7 +1,7 @@
 CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/arm/configs/lpd7a400_defconfig b/arch/arm/configs/lpd7a400_defconfig
index 20caaaba4a04..5a48f171204c 100644
--- a/arch/arm/configs/lpd7a400_defconfig
+++ b/arch/arm/configs/lpd7a400_defconfig
@@ -3,7 +3,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_HOTPLUG is not set
 # CONFIG_EPOLL is not set
 # CONFIG_IOSCHED_DEADLINE is not set
diff --git a/arch/arm/configs/lpd7a404_defconfig b/arch/arm/configs/lpd7a404_defconfig
index 1efcce97b4a7..22d0631de009 100644
--- a/arch/arm/configs/lpd7a404_defconfig
+++ b/arch/arm/configs/lpd7a404_defconfig
@@ -3,7 +3,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
 CONFIG_LOG_BUF_SHIFT=16
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_HOTPLUG is not set
 # CONFIG_EPOLL is not set
 CONFIG_SLAB=y
diff --git a/arch/arm/configs/magician_defconfig b/arch/arm/configs/magician_defconfig
index af805e8fd03d..a88e64d4e9a5 100644
--- a/arch/arm/configs/magician_defconfig
+++ b/arch/arm/configs/magician_defconfig
@@ -4,7 +4,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=16
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_UID16 is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/arm/configs/mv78xx0_defconfig b/arch/arm/configs/mv78xx0_defconfig
index b0d082422d46..7305ebddb510 100644
--- a/arch/arm/configs/mv78xx0_defconfig
+++ b/arch/arm/configs/mv78xx0_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_SLUB_DEBUG is not set
 CONFIG_PROFILING=y
diff --git a/arch/arm/configs/mx1_defconfig b/arch/arm/configs/mx1_defconfig
index 2f38d9715437..b39b5ced8a10 100644
--- a/arch/arm/configs/mx1_defconfig
+++ b/arch/arm/configs/mx1_defconfig
@@ -4,7 +4,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/arm/configs/mx21_defconfig b/arch/arm/configs/mx21_defconfig
index 6454e18e2abe..411f88dd4402 100644
--- a/arch/arm/configs/mx21_defconfig
+++ b/arch/arm/configs/mx21_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/arm/configs/mx27_defconfig b/arch/arm/configs/mx27_defconfig
index 813cfb366c18..9ad4c656c9bd 100644
--- a/arch/arm/configs/mx27_defconfig
+++ b/arch/arm/configs/mx27_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 # CONFIG_COMPAT_BRK is not set
 CONFIG_SLAB=y
diff --git a/arch/arm/configs/mx3_defconfig b/arch/arm/configs/mx3_defconfig
index e648ea3429be..7c4b30b34952 100644
--- a/arch/arm/configs/mx3_defconfig
+++ b/arch/arm/configs/mx3_defconfig
@@ -4,7 +4,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/arm/configs/mx51_defconfig b/arch/arm/configs/mx51_defconfig
index 5c7a87260fab..9cba68cfa51a 100644
--- a/arch/arm/configs/mx51_defconfig
+++ b/arch/arm/configs/mx51_defconfig
@@ -3,7 +3,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=18
 CONFIG_RELAY=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SLUB_DEBUG is not set
 # CONFIG_COMPAT_BRK is not set
 CONFIG_MODULES=y
diff --git a/arch/arm/configs/nhk8815_defconfig b/arch/arm/configs/nhk8815_defconfig
index 0e2dc26ebe66..37207d1bf44b 100644
--- a/arch/arm/configs/nhk8815_defconfig
+++ b/arch/arm/configs/nhk8815_defconfig
@@ -7,7 +7,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig
index a350cc6bfe6a..7b63462b349d 100644
--- a/arch/arm/configs/omap1_defconfig
+++ b/arch/arm/configs/omap1_defconfig
@@ -6,7 +6,7 @@ CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_IKCONFIG=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_BASE_FULL is not set
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index ccedde1371c3..ae890caa17a7 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=16
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_SLAB=y
diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig
index 439323b3b0ed..a288d7033950 100644
--- a/arch/arm/configs/orion5x_defconfig
+++ b/arch/arm/configs/orion5x_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SLUB_DEBUG is not set
 CONFIG_PROFILING=y
 CONFIG_OPROFILE=y
diff --git a/arch/arm/configs/pcm027_defconfig b/arch/arm/configs/pcm027_defconfig
index 583a0610bd00..2f136c30a989 100644
--- a/arch/arm/configs/pcm027_defconfig
+++ b/arch/arm/configs/pcm027_defconfig
@@ -7,7 +7,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/arm/configs/pcontrol_g20_defconfig b/arch/arm/configs/pcontrol_g20_defconfig
index b42ee62c4d77..c75c9fcede58 100644
--- a/arch/arm/configs/pcontrol_g20_defconfig
+++ b/arch/arm/configs/pcontrol_g20_defconfig
@@ -10,7 +10,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_NAMESPACES=y
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
 # CONFIG_VM_EVENT_COUNTERS is not set
diff --git a/arch/arm/configs/pleb_defconfig b/arch/arm/configs/pleb_defconfig
index d1efbdc1e6dc..cb08cc561da5 100644
--- a/arch/arm/configs/pleb_defconfig
+++ b/arch/arm/configs/pleb_defconfig
@@ -3,7 +3,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_HOTPLUG is not set
 # CONFIG_SHMEM is not set
 CONFIG_MODULES=y
diff --git a/arch/arm/configs/pnx4008_defconfig b/arch/arm/configs/pnx4008_defconfig
index bd481f04276f..35a31ccacc32 100644
--- a/arch/arm/configs/pnx4008_defconfig
+++ b/arch/arm/configs/pnx4008_defconfig
@@ -5,7 +5,7 @@ CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_AUDIT=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/arm/configs/simpad_defconfig b/arch/arm/configs/simpad_defconfig
index af3b12e3b464..d3358155bf8a 100644
--- a/arch/arm/configs/simpad_defconfig
+++ b/arch/arm/configs/simpad_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_LOCALVERSION="oe1"
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/arm/configs/spitz_defconfig b/arch/arm/configs/spitz_defconfig
index aebd4bb0ad01..70158273c6dd 100644
--- a/arch/arm/configs/spitz_defconfig
+++ b/arch/arm/configs/spitz_defconfig
@@ -4,7 +4,7 @@ CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_PROFILING=y
 CONFIG_OPROFILE=m
 CONFIG_MODULES=y
diff --git a/arch/arm/configs/stmp378x_defconfig b/arch/arm/configs/stmp378x_defconfig
index 94a2d904bf94..1079c2b6eb3a 100644
--- a/arch/arm/configs/stmp378x_defconfig
+++ b/arch/arm/configs/stmp378x_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/arm/configs/stmp37xx_defconfig b/arch/arm/configs/stmp37xx_defconfig
index d8ee58cfa872..564a5cc44085 100644
--- a/arch/arm/configs/stmp37xx_defconfig
+++ b/arch/arm/configs/stmp37xx_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/arm/configs/tct_hammer_defconfig b/arch/arm/configs/tct_hammer_defconfig
index e89ca19489c2..95c0f0d63db6 100644
--- a/arch/arm/configs/tct_hammer_defconfig
+++ b/arch/arm/configs/tct_hammer_defconfig
@@ -5,7 +5,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_BUG is not set
 # CONFIG_ELF_CORE is not set
diff --git a/arch/arm/configs/trizeps4_defconfig b/arch/arm/configs/trizeps4_defconfig
index 37f48342827c..3162173fa75a 100644
--- a/arch/arm/configs/trizeps4_defconfig
+++ b/arch/arm/configs/trizeps4_defconfig
@@ -7,7 +7,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/arm/configs/u300_defconfig b/arch/arm/configs/u300_defconfig
index c1c252cdca60..4a5a12681be2 100644
--- a/arch/arm/configs/u300_defconfig
+++ b/arch/arm/configs/u300_defconfig
@@ -3,7 +3,7 @@ CONFIG_EXPERIMENTAL=y
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_AIO is not set
 # CONFIG_VM_EVENT_COUNTERS is not set
 CONFIG_MODULES=y
diff --git a/arch/arm/configs/viper_defconfig b/arch/arm/configs/viper_defconfig
index 9d7bf5e0d0f5..8b0c717378fa 100644
--- a/arch/arm/configs/viper_defconfig
+++ b/arch/arm/configs/viper_defconfig
@@ -3,7 +3,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=13
 CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_ELF_CORE is not set
 # CONFIG_SHMEM is not set
 CONFIG_SLAB=y
diff --git a/arch/arm/configs/xcep_defconfig b/arch/arm/configs/xcep_defconfig
index 70d47dbae6db..5b5504143647 100644
--- a/arch/arm/configs/xcep_defconfig
+++ b/arch/arm/configs/xcep_defconfig
@@ -8,7 +8,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=16
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_UID16 is not set
 # CONFIG_SHMEM is not set
 # CONFIG_VM_EVENT_COUNTERS is not set
diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c
index 2e8391307f55..6dde8185205f 100644
--- a/arch/arm/mach-msm/board-qsd8x50.c
+++ b/arch/arm/mach-msm/board-qsd8x50.c
@@ -43,7 +43,7 @@ static const unsigned        qsd8x50_surf_smc91x_gpio __initdata = 156;
  * at run-time: they vary from board to board, and the true
  * configuration won't be known until boot.
  */
-static struct resource smc91x_resources[] __initdata = {
+static struct resource smc91x_resources[] = {
         [0] = {
                 .flags = IORESOURCE_MEM,
         },
@@ -52,7 +52,7 @@ static struct resource smc91x_resources[] __initdata = {
         },
 };
 
-static struct platform_device smc91x_device __initdata = {
+static struct platform_device smc91x_device = {
         .name           = "smc91x",
         .id             = 0,
         .num_resources  = ARRAY_SIZE(smc91x_resources),
diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c
index e69f137b0a39..eaf6b9c489ff 100644
--- a/arch/arm/mach-s5p6442/mach-smdk6442.c
+++ b/arch/arm/mach-s5p6442/mach-smdk6442.c
@@ -68,6 +68,7 @@ static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = {
 
 static struct platform_device *smdk6442_devices[] __initdata = {
         &s3c_device_i2c0,
+        &samsung_asoc_dma,
         &s5p6442_device_iis0,
         &s3c_device_wdt,
 };
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index e9802755daeb..e5beb84e2393 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -95,6 +95,7 @@ static struct platform_device *smdk6440_devices[] __initdata = {
         &s3c_device_i2c1,
         &s3c_device_ts,
         &s3c_device_wdt,
+        &samsung_asoc_dma,
         &s5p6440_device_iis,
 };
 
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index b78f56292780..3a20de0a9264 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -113,6 +113,7 @@ static struct platform_device *smdk6450_devices[] __initdata = {
         &s3c_device_i2c1,
         &s3c_device_ts,
         &s3c_device_wdt,
+        &samsung_asoc_dma,
         &s5p6450_device_iis0,
         /* s5p6450_device_spi0 will be added */
 };
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index bb20a14da100..ce11a02eabf3 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -81,6 +81,7 @@ static struct s3c_ide_platdata smdkc110_ide_pdata __initdata = {
 };
 
 static struct platform_device *smdkc110_devices[] __initdata = {
+        &samsung_asoc_dma,
         &s5pv210_device_iis0,
         &s5pv210_device_ac97,
         &s5pv210_device_spdif,
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 88e45223c8af..bc9fdb52a020 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -225,6 +225,7 @@ static struct platform_device *smdkv210_devices[] __initdata = {
         &s5pv210_device_ac97,
         &s5pv210_device_iis0,
         &s5pv210_device_spdif,
+        &samsung_asoc_dma,
         &samsung_device_keypad,
         &smdkv210_dm9000,
         &smdkv210_lcd_lte480wv,
diff --git a/arch/arm/mach-s5pv310/mach-smdkc210.c b/arch/arm/mach-s5pv310/mach-smdkc210.c
index 2d49273c0a26..d9cab02e23ca 100644
--- a/arch/arm/mach-s5pv310/mach-smdkc210.c
+++ b/arch/arm/mach-s5pv310/mach-smdkc210.c
@@ -163,8 +163,9 @@ static struct platform_device *smdkc210_devices[] __initdata = {
         &s5pv310_device_pd[PD_CAM],
         &s5pv310_device_pd[PD_TV],
         &s5pv310_device_pd[PD_GPS],
-        &smdkc210_smsc911x,
         &s5pv310_device_sysmmu,
+        &samsung_asoc_dma,
+        &smdkc210_smsc911x,
 };
 
 static void __init smdkc210_smsc911x_init(void)
diff --git a/arch/arm/mach-s5pv310/mach-smdkv310.c b/arch/arm/mach-s5pv310/mach-smdkv310.c
index 28680cf9a72c..b1cddbf3c616 100644
--- a/arch/arm/mach-s5pv310/mach-smdkv310.c
+++ b/arch/arm/mach-s5pv310/mach-smdkv310.c
@@ -163,8 +163,9 @@ static struct platform_device *smdkv310_devices[] __initdata = {
         &s5pv310_device_pd[PD_CAM],
         &s5pv310_device_pd[PD_TV],
         &s5pv310_device_pd[PD_GPS],
-        &smdkv310_smsc911x,
         &s5pv310_device_sysmmu,
+        &samsung_asoc_dma,
+        &smdkv310_smsc911x,
 };
 
 static void __init smdkv310_smsc911x_init(void)
diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
index 313b13073c54..cd2062fe0f61 100644
--- a/arch/avr32/Kconfig
+++ b/arch/avr32/Kconfig
@@ -1,8 +1,8 @@
 config AVR32
         def_bool y
-        # With EMBEDDED=n, we get lots of stuff automatically selected
+        # With EXPERT=n, we get lots of stuff automatically selected
         # that we usually don't need on AVR32.
-        select EMBEDDED
+        select EXPERT
         select HAVE_CLK
         select HAVE_OPROFILE
         select HAVE_KPROBES
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 0a221d48152d..c09577ddc3c5 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -30,6 +30,9 @@ config BLACKFIN
         select HAVE_KERNEL_LZO if RAMKERNEL
         select HAVE_OPROFILE
         select ARCH_WANT_OPTIONAL_GPIOLIB
+        select HAVE_GENERIC_HARDIRQS
+        select GENERIC_IRQ_PROBE
+        select IRQ_PER_CPU if SMP
 
 config GENERIC_CSUM
         def_bool y
@@ -44,15 +47,6 @@ config ZONE_DMA
 config GENERIC_FIND_NEXT_BIT
         def_bool y
 
-config GENERIC_HARDIRQS
-        def_bool y
-
-config GENERIC_IRQ_PROBE
-        def_bool y
-
-config GENERIC_HARDIRQS_NO__DO_IRQ
-        def_bool y
-
 config GENERIC_GPIO
         def_bool y
 
@@ -254,11 +248,6 @@ config HOTPLUG_CPU
         depends on SMP && HOTPLUG
         default y
 
-config IRQ_PER_CPU
-        bool
-        depends on SMP
-        default y
-
 config HAVE_LEGACY_PER_CPU_AREA
         def_bool y
         depends on SMP
diff --git a/arch/blackfin/configs/BF518F-EZBRD_defconfig b/arch/blackfin/configs/BF518F-EZBRD_defconfig
index c0b988ee30df..db8d38a12a9a 100644
--- a/arch/blackfin/configs/BF518F-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF518F-EZBRD_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/blackfin/configs/BF526-EZBRD_defconfig b/arch/blackfin/configs/BF526-EZBRD_defconfig
index 864af5b68874..3e50d7857c27 100644
--- a/arch/blackfin/configs/BF526-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF526-EZBRD_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/blackfin/configs/BF527-AD7160-EVAL_defconfig b/arch/blackfin/configs/BF527-AD7160-EVAL_defconfig
index 7b6a3370dbe2..362f59dd5228 100644
--- a/arch/blackfin/configs/BF527-AD7160-EVAL_defconfig
+++ b/arch/blackfin/configs/BF527-AD7160-EVAL_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_ELF_CORE is not set
 # CONFIG_AIO is not set
 CONFIG_SLAB=y
diff --git a/arch/blackfin/configs/BF527-EZKIT-V2_defconfig b/arch/blackfin/configs/BF527-EZKIT-V2_defconfig
index 4faa6b46a352..023ff0df2692 100644
--- a/arch/blackfin/configs/BF527-EZKIT-V2_defconfig
+++ b/arch/blackfin/configs/BF527-EZKIT-V2_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig
index 9d893eb68243..4e5a121b3c56 100644
--- a/arch/blackfin/configs/BF527-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF527-EZKIT_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/blackfin/configs/BF527-TLL6527M_defconfig b/arch/blackfin/configs/BF527-TLL6527M_defconfig
index 97a2767c80f8..cd0636bb24a0 100644
--- a/arch/blackfin/configs/BF527-TLL6527M_defconfig
+++ b/arch/blackfin/configs/BF527-TLL6527M_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig
index f84774360c5b..9f8fc84e4ac9 100644
--- a/arch/blackfin/configs/BF533-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF533-EZKIT_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig
index 0e7262c04cc2..ccc432b722a0 100644
--- a/arch/blackfin/configs/BF533-STAMP_defconfig
+++ b/arch/blackfin/configs/BF533-STAMP_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig
index 4d14a002e7bd..566695472a84 100644
--- a/arch/blackfin/configs/BF537-STAMP_defconfig
+++ b/arch/blackfin/configs/BF537-STAMP_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/blackfin/configs/BF538-EZKIT_defconfig b/arch/blackfin/configs/BF538-EZKIT_defconfig
index fbee9d776f56..ac22124ccb6c 100644
--- a/arch/blackfin/configs/BF538-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF538-EZKIT_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig
index 05dd11db2f7d..944404b6ff08 100644
--- a/arch/blackfin/configs/BF548-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF548-EZKIT_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/blackfin/configs/BF561-ACVILON_defconfig b/arch/blackfin/configs/BF561-ACVILON_defconfig
index bcb14d1c5664..b7c8451f26ac 100644
--- a/arch/blackfin/configs/BF561-ACVILON_defconfig
+++ b/arch/blackfin/configs/BF561-ACVILON_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig b/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig
index 4cf451024fd8..7e67ba31e991 100644
--- a/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig
+++ b/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig
index 843aaa54a9e3..141e5933e1aa 100644
--- a/arch/blackfin/configs/BF561-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF561-EZKIT_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/blackfin/configs/BlackStamp_defconfig b/arch/blackfin/configs/BlackStamp_defconfig
index dae7adf3b2a2..97ebe09a7370 100644
--- a/arch/blackfin/configs/BlackStamp_defconfig
+++ b/arch/blackfin/configs/BlackStamp_defconfig
@@ -6,7 +6,7 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/blackfin/configs/CM-BF527_defconfig b/arch/blackfin/configs/CM-BF527_defconfig
index f3414244bfed..c2457543e58c 100644
--- a/arch/blackfin/configs/CM-BF527_defconfig
+++ b/arch/blackfin/configs/CM-BF527_defconfig
@@ -8,7 +8,7 @@ CONFIG_BLK_DEV_INITRD=y
 # CONFIG_RD_GZIP is not set
 CONFIG_RD_LZMA=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/blackfin/configs/CM-BF533_defconfig b/arch/blackfin/configs/CM-BF533_defconfig
index 8c7e08f173d4..baf1c1573e5e 100644
--- a/arch/blackfin/configs/CM-BF533_defconfig
+++ b/arch/blackfin/configs/CM-BF533_defconfig
@@ -7,7 +7,7 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_RD_GZIP is not set
 CONFIG_RD_LZMA=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_UID16 is not set
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
diff --git a/arch/blackfin/configs/CM-BF537E_defconfig b/arch/blackfin/configs/CM-BF537E_defconfig
index bd3cb766d078..707cbf8a2590 100644
--- a/arch/blackfin/configs/CM-BF537E_defconfig
+++ b/arch/blackfin/configs/CM-BF537E_defconfig
@@ -8,7 +8,7 @@ CONFIG_BLK_DEV_INITRD=y
 # CONFIG_RD_GZIP is not set
 CONFIG_RD_LZMA=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_UID16 is not set
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
diff --git a/arch/blackfin/configs/CM-BF537U_defconfig b/arch/blackfin/configs/CM-BF537U_defconfig
index 82224f37c04e..4596935eadac 100644
--- a/arch/blackfin/configs/CM-BF537U_defconfig
+++ b/arch/blackfin/configs/CM-BF537U_defconfig
@@ -8,7 +8,7 @@ CONFIG_BLK_DEV_INITRD=y
 # CONFIG_RD_GZIP is not set
 CONFIG_RD_LZMA=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_UID16 is not set
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
diff --git a/arch/blackfin/configs/CM-BF548_defconfig b/arch/blackfin/configs/CM-BF548_defconfig
index 433598c6e773..df267588efec 100644
--- a/arch/blackfin/configs/CM-BF548_defconfig
+++ b/arch/blackfin/configs/CM-BF548_defconfig
@@ -8,7 +8,7 @@ CONFIG_BLK_DEV_INITRD=y
 # CONFIG_RD_GZIP is not set
 CONFIG_RD_LZMA=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_UID16 is not set
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
diff --git a/arch/blackfin/configs/CM-BF561_defconfig b/arch/blackfin/configs/CM-BF561_defconfig
index ded7d845cb39..6c7b21585a43 100644
--- a/arch/blackfin/configs/CM-BF561_defconfig
+++ b/arch/blackfin/configs/CM-BF561_defconfig
@@ -8,7 +8,7 @@ CONFIG_BLK_DEV_INITRD=y
 # CONFIG_RD_GZIP is not set
 CONFIG_RD_LZMA=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_UID16 is not set
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
diff --git a/arch/blackfin/configs/DNP5370_defconfig b/arch/blackfin/configs/DNP5370_defconfig
index 0ebc7d9aa426..f50313657f3e 100644
--- a/arch/blackfin/configs/DNP5370_defconfig
+++ b/arch/blackfin/configs/DNP5370_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLOB=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_IOSCHED_CFQ is not set
diff --git a/arch/blackfin/configs/H8606_defconfig b/arch/blackfin/configs/H8606_defconfig
index 700fb701c121..7450127b6455 100644
--- a/arch/blackfin/configs/H8606_defconfig
+++ b/arch/blackfin/configs/H8606_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/blackfin/configs/IP0X_defconfig b/arch/blackfin/configs/IP0X_defconfig
index b40156d217e3..5e797cf72043 100644
--- a/arch/blackfin/configs/IP0X_defconfig
+++ b/arch/blackfin/configs/IP0X_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_ELF_CORE is not set
diff --git a/arch/blackfin/configs/PNAV-10_defconfig b/arch/blackfin/configs/PNAV-10_defconfig
index be866d95ed76..a566a2fe6b9b 100644
--- a/arch/blackfin/configs/PNAV-10_defconfig
+++ b/arch/blackfin/configs/PNAV-10_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/blackfin/configs/SRV1_defconfig b/arch/blackfin/configs/SRV1_defconfig
index b64bdf759b82..853809510ee9 100644
--- a/arch/blackfin/configs/SRV1_defconfig
+++ b/arch/blackfin/configs/SRV1_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_ELF_CORE is not set
diff --git a/arch/blackfin/configs/TCM-BF518_defconfig b/arch/blackfin/configs/TCM-BF518_defconfig
index 1bccd9a50986..d496ae9a39b0 100644
--- a/arch/blackfin/configs/TCM-BF518_defconfig
+++ b/arch/blackfin/configs/TCM-BF518_defconfig
@@ -7,7 +7,7 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_RD_GZIP is not set
 CONFIG_RD_LZMA=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/blackfin/configs/TCM-BF537_defconfig b/arch/blackfin/configs/TCM-BF537_defconfig
index 00ce899e9e5d..65f642167a50 100644
--- a/arch/blackfin/configs/TCM-BF537_defconfig
+++ b/arch/blackfin/configs/TCM-BF537_defconfig
@@ -8,7 +8,7 @@ CONFIG_BLK_DEV_INITRD=y
 # CONFIG_RD_GZIP is not set
 CONFIG_RD_LZMA=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_UID16 is not set
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
diff --git a/arch/cris/Kconfig b/arch/cris/Kconfig
index 613e62831c55..0a7a4c11d8b1 100644
--- a/arch/cris/Kconfig
+++ b/arch/cris/Kconfig
@@ -54,6 +54,8 @@ config CRIS
         bool
         default y
         select HAVE_IDE
+        select HAVE_GENERIC_HARDIRQS
+        select GENERIC_HARDIRQS_NO_DEPRECATED
 
 config HZ
         int
@@ -67,10 +69,6 @@ menu "General setup"
 
 source "fs/Kconfig.binfmt"
 
-config GENERIC_HARDIRQS
-        bool
-        default y
-
 config ETRAX_CMDLINE
         string "Kernel command line"
         default "root=/dev/mtdblock3"
diff --git a/arch/cris/arch-v10/kernel/irq.c b/arch/cris/arch-v10/kernel/irq.c
index a0c0df8be9c8..7328a7cf7449 100644
--- a/arch/cris/arch-v10/kernel/irq.c
+++ b/arch/cris/arch-v10/kernel/irq.c
@@ -104,43 +104,21 @@ static void (*interrupt[NR_IRQS])(void) = {
         IRQ31_interrupt
 };
 
-static void enable_crisv10_irq(unsigned int irq);
-
-static unsigned int startup_crisv10_irq(unsigned int irq)
-{
-        enable_crisv10_irq(irq);
-        return 0;
-}
-
-#define shutdown_crisv10_irq    disable_crisv10_irq
-
-static void enable_crisv10_irq(unsigned int irq)
-{
-        crisv10_unmask_irq(irq);
-}
-
-static void disable_crisv10_irq(unsigned int irq)
-{
-        crisv10_mask_irq(irq);
-}
-
-static void ack_crisv10_irq(unsigned int irq)
+static void enable_crisv10_irq(struct irq_data *data)
 {
+        crisv10_unmask_irq(data->irq);
 }
 
-static void end_crisv10_irq(unsigned int irq)
+static void disable_crisv10_irq(struct irq_data *data)
 {
+        crisv10_mask_irq(data->irq);
 }
 
 static struct irq_chip crisv10_irq_type = {
-        .name =        "CRISv10",
-        .startup =     startup_crisv10_irq,
-        .shutdown =    shutdown_crisv10_irq,
-        .enable =      enable_crisv10_irq,
-        .disable =     disable_crisv10_irq,
-        .ack =         ack_crisv10_irq,
-        .end =         end_crisv10_irq,
-        .set_affinity = NULL
+        .name           = "CRISv10",
+        .irq_shutdown   = disable_crisv10_irq,
+        .irq_enable     = enable_crisv10_irq,
+        .irq_disable    = disable_crisv10_irq,
 };
 
 void weird_irq(void);
@@ -221,7 +199,8 @@ init_IRQ(void)
 
         /* Initialize IRQ handler descriptors. */
         for(i = 2; i < NR_IRQS; i++) {
-                irq_desc[i].chip = &crisv10_irq_type;
+                set_irq_desc_and_handler(i, &crisv10_irq_type,
+                                         handle_simple_irq);
                 set_int_vector(i, interrupt[i]);
         }
 
diff --git a/arch/cris/arch-v32/kernel/irq.c b/arch/cris/arch-v32/kernel/irq.c
index 2ed48ae3d313..0ad9db5126c7 100644
--- a/arch/cris/arch-v32/kernel/irq.c
+++ b/arch/cris/arch-v32/kernel/irq.c
@@ -291,54 +291,33 @@ void crisv32_unmask_irq(int irq)
 }
 
 
-static unsigned int startup_crisv32_irq(unsigned int irq)
+static void enable_crisv32_irq(struct irq_data *data)
 {
-        crisv32_unmask_irq(irq);
-        return 0;
-}
-
-static void shutdown_crisv32_irq(unsigned int irq)
-{
-        crisv32_mask_irq(irq);
+        crisv32_unmask_irq(data->irq);
 }
 
-static void enable_crisv32_irq(unsigned int irq)
+static void disable_crisv32_irq(struct irq_data *data)
 {
-        crisv32_unmask_irq(irq);
+        crisv32_mask_irq(data->irq);
 }
 
-static void disable_crisv32_irq(unsigned int irq)
-{
-        crisv32_mask_irq(irq);
-}
-
-static void ack_crisv32_irq(unsigned int irq)
-{
-}
-
-static void end_crisv32_irq(unsigned int irq)
-{
-}
-
-int set_affinity_crisv32_irq(unsigned int irq, const struct cpumask *dest)
+static int set_affinity_crisv32_irq(struct irq_data *data,
+                                    const struct cpumask *dest, bool force)
 {
         unsigned long flags;
+
         spin_lock_irqsave(&irq_lock, flags);
-        irq_allocations[irq - FIRST_IRQ].mask = *dest;
+        irq_allocations[data->irq - FIRST_IRQ].mask = *dest;
         spin_unlock_irqrestore(&irq_lock, flags);
-
         return 0;
 }
 
 static struct irq_chip crisv32_irq_type = {
-        .name =        "CRISv32",
-        .startup =     startup_crisv32_irq,
-        .shutdown =    shutdown_crisv32_irq,
-        .enable =      enable_crisv32_irq,
-        .disable =     disable_crisv32_irq,
-        .ack =         ack_crisv32_irq,
-        .end =         end_crisv32_irq,
-        .set_affinity = set_affinity_crisv32_irq
+        .name                   = "CRISv32",
+        .irq_shutdown           = disable_crisv32_irq,
+        .irq_enable             = enable_crisv32_irq,
+        .irq_disable            = disable_crisv32_irq,
+        .irq_set_affinity       = set_affinity_crisv32_irq,
 };
 
 void
@@ -472,7 +451,8 @@ init_IRQ(void)
 
         /* Point all IRQ's to bad handlers. */
         for (i = FIRST_IRQ, j = 0; j < NR_IRQS; i++, j++) {
-                irq_desc[j].chip = &crisv32_irq_type;
+                set_irq_chip_and_handler(j, &crisv32_irq_type,
+                                         handle_simple_irq);
                 set_exception_vector(i, interrupt[j]);
         }
 
diff --git a/arch/cris/configs/artpec_3_defconfig b/arch/cris/configs/artpec_3_defconfig
index 590f72c9455d..71854d41c5a0 100644
--- a/arch/cris/configs/artpec_3_defconfig
+++ b/arch/cris/configs/artpec_3_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
 # CONFIG_SWAP is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/cris/configs/etrax-100lx_v2_defconfig b/arch/cris/configs/etrax-100lx_v2_defconfig
index 1b2853e39801..a85aabf92be5 100644
--- a/arch/cris/configs/etrax-100lx_v2_defconfig
+++ b/arch/cris/configs/etrax-100lx_v2_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
 # CONFIG_SWAP is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/cris/configs/etraxfs_defconfig b/arch/cris/configs/etraxfs_defconfig
index f73d38cc9c66..87c7227fecb2 100644
--- a/arch/cris/configs/etraxfs_defconfig
+++ b/arch/cris/configs/etraxfs_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
 # CONFIG_SWAP is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/cris/kernel/irq.c b/arch/cris/kernel/irq.c
index 469f7f9d62e0..c346952f06dc 100644
--- a/arch/cris/kernel/irq.c
+++ b/arch/cris/kernel/irq.c
@@ -62,7 +62,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 for_each_online_cpu(j)
                         seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 #endif
-                seq_printf(p, " %14s", irq_desc[i].chip->name);
+                seq_printf(p, " %14s", irq_desc[i].irq_data.chip->name);
                 seq_printf(p, "  %s", action->name);
 
                 for (action=action->next; action; action = action->next)
@@ -93,8 +93,8 @@ asmlinkage void do_IRQ(int irq, struct pt_regs * regs)
                 printk("do_IRQ: stack overflow: %lX\n", sp);
                 show_stack(NULL, (unsigned long *)sp);
         }
-        __do_IRQ(irq);
-        irq_exit();
+        generic_handle_irq(irq);
+        irq_exit();
         set_irq_regs(old_regs);
 }
 
diff --git a/arch/frv/Kconfig b/arch/frv/Kconfig
index f6bcb039cd6d..747499a1b31e 100644
--- a/arch/frv/Kconfig
+++ b/arch/frv/Kconfig
@@ -5,6 +5,7 @@ config FRV
         select HAVE_ARCH_TRACEHOOK
         select HAVE_IRQ_WORK
         select HAVE_PERF_EVENTS
+        select HAVE_GENERIC_HARDIRQS
 
 config ZONE_DMA
         bool
@@ -29,14 +30,6 @@ config GENERIC_CALIBRATE_DELAY
         bool
         default n
 
-config GENERIC_HARDIRQS
-        bool
-        default y
-
-config GENERIC_HARDIRQS_NO__DO_IRQ
-        bool
-        default y
-
 config TIME_LOW_RES
         bool
         default y
diff --git a/arch/frv/defconfig b/arch/frv/defconfig
index b8ebe9e8a493..b1b792610fdf 100644
--- a/arch/frv/defconfig
+++ b/arch/frv/defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_HOTPLUG is not set
 CONFIG_MMU=y
 CONFIG_FRV_OUTOFLINE_ATOMIC_OPS=y
diff --git a/arch/h8300/Kconfig b/arch/h8300/Kconfig
index 65f897d8c1e9..6df692d1475f 100644
--- a/arch/h8300/Kconfig
+++ b/arch/h8300/Kconfig
@@ -2,6 +2,8 @@ config H8300
         bool
         default y
         select HAVE_IDE
+        select HAVE_GENERIC_HARDIRQS
+        select GENERIC_HARDIRQS_NO_DEPRECATED
 
 config SYMBOL_PREFIX
         string
@@ -47,10 +49,6 @@ config GENERIC_HWEIGHT
         bool
         default y
 
-config GENERIC_HARDIRQS
-        bool
-        default y
-
 config GENERIC_CALIBRATE_DELAY
         bool
         default y
diff --git a/arch/h8300/defconfig b/arch/h8300/defconfig
index 342f77765f02..042425a02645 100644
--- a/arch/h8300/defconfig
+++ b/arch/h8300/defconfig
@@ -1,7 +1,7 @@
 CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_UID16 is not set
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
diff --git a/arch/h8300/kernel/irq.c b/arch/h8300/kernel/irq.c
index c25dc2c2b1da..7643d39925d6 100644
--- a/arch/h8300/kernel/irq.c
+++ b/arch/h8300/kernel/irq.c
@@ -38,34 +38,30 @@ static inline int is_ext_irq(unsigned int irq)
         return (irq >= EXT_IRQ0 && irq <= (EXT_IRQ0 + EXT_IRQS));
 }
 
-static void h8300_enable_irq(unsigned int irq)
+static void h8300_enable_irq(struct irq_data *data)
 {
-        if (is_ext_irq(irq))
-                IER_REGS |= 1 << (irq - EXT_IRQ0);
+        if (is_ext_irq(data->irq))
+                IER_REGS |= 1 << (data->irq - EXT_IRQ0);
 }
 
-static void h8300_disable_irq(unsigned int irq)
+static void h8300_disable_irq(struct irq_data *data)
 {
-        if (is_ext_irq(irq))
-                IER_REGS &= ~(1 << (irq - EXT_IRQ0));
+        if (is_ext_irq(data->irq))
+                IER_REGS &= ~(1 << (data->irq - EXT_IRQ0));
 }
 
-static void h8300_end_irq(unsigned int irq)
+static unsigned int h8300_startup_irq(struct irq_data *data)
 {
-}
-
-static unsigned int h8300_startup_irq(unsigned int irq)
-{
-        if (is_ext_irq(irq))
-                return h8300_enable_irq_pin(irq);
+        if (is_ext_irq(data->irq))
+                return h8300_enable_irq_pin(data->irq);
         else
                 return 0;
 }
 
-static void h8300_shutdown_irq(unsigned int irq)
+static void h8300_shutdown_irq(struct irq_data *data)
 {
-        if (is_ext_irq(irq))
-                h8300_disable_irq_pin(irq);
+        if (is_ext_irq(data->irq))
+                h8300_disable_irq_pin(data->irq);
 }
 
 /*
@@ -73,12 +69,10 @@ static void h8300_shutdown_irq(unsigned int irq)
  */
 struct irq_chip h8300irq_chip = {
         .name           = "H8300-INTC",
-        .startup        = h8300_startup_irq,
-        .shutdown       = h8300_shutdown_irq,
-        .enable         = h8300_enable_irq,
-        .disable        = h8300_disable_irq,
-        .ack            = NULL,
-        .end            = h8300_end_irq,
+        .irq_startup    = h8300_startup_irq,
+        .irq_shutdown   = h8300_shutdown_irq,
+        .irq_enable     = h8300_enable_irq,
+        .irq_disable    = h8300_disable_irq,
 };
 
 #if defined(CONFIG_RAMKERNEL)
@@ -160,18 +154,14 @@ void __init init_IRQ(void)
 
         setup_vector();
 
-        for (c = 0; c < NR_IRQS; c++) {
-                irq_desc[c].status = IRQ_DISABLED;
-                irq_desc[c].action = NULL;
-                irq_desc[c].depth = 1;
-                irq_desc[c].chip = &h8300irq_chip;
-        }
+        for (c = 0; c < NR_IRQS; c++)
+                set_irq_chip_and_handler(c, &h8300irq_chip, handle_simple_irq);
 }
 
 asmlinkage void do_IRQ(int irq)
 {
         irq_enter();
-        __do_IRQ(irq);
+        generic_handle_irq(irq);
         irq_exit();
 }
 
@@ -192,7 +182,7 @@ int show_interrupts(struct seq_file *p, void *v)
                         goto unlock;
                 seq_printf(p, "%3d: ",i);
                 seq_printf(p, "%10u ", kstat_irqs(i));
-                seq_printf(p, " %14s", irq_desc[i].chip->name);
+                seq_printf(p, " %14s", irq_desc[i].irq_data.chip->name);
                 seq_printf(p, "-%-8s", irq_desc[i].name);
                 seq_printf(p, "  %s", action->name);
 
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index e0f5b6d7f849..fcf3b437a2d9 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -22,6 +22,10 @@ config IA64
         select HAVE_KVM
         select HAVE_ARCH_TRACEHOOK
         select HAVE_DMA_API_DEBUG
+        select HAVE_GENERIC_HARDIRQS
+        select GENERIC_IRQ_PROBE
+        select GENERIC_PENDING_IRQ if SMP
+        select IRQ_PER_CPU
         default y
         help
           The Itanium Processor Family is Intel's 64-bit successor to
@@ -678,28 +682,6 @@ source "arch/ia64/kvm/Kconfig"
 
 source "lib/Kconfig"
 
-#
-# Use the generic interrupt handling code in kernel/irq/:
-#
-config GENERIC_HARDIRQS
-        def_bool y
-
-config GENERIC_HARDIRQS_NO__DO_IRQ
-        def_bool y
-
-config GENERIC_IRQ_PROBE
-        bool
-        default y
-
-config GENERIC_PENDING_IRQ
-        bool
-        depends on GENERIC_HARDIRQS && SMP
-        default y
-
-config IRQ_PER_CPU
-        bool
-        default y
-
 config IOMMU_HELPER
         def_bool (IA64_HP_ZX1 || IA64_HP_ZX1_SWIOTLB || IA64_GENERIC || SWIOTLB)
 
diff --git a/arch/m32r/Kconfig b/arch/m32r/Kconfig
index 5c291d65196b..ef4c1e442be3 100644
--- a/arch/m32r/Kconfig
+++ b/arch/m32r/Kconfig
@@ -7,6 +7,9 @@ config M32R
         select HAVE_KERNEL_GZIP
         select HAVE_KERNEL_BZIP2
         select HAVE_KERNEL_LZMA
+        select HAVE_GENERIC_HARDIRQS
+        select GENERIC_HARDIRQS_NO_DEPRECATED
+        select GENERIC_IRQ_PROBE
 
 config SBUS
         bool
@@ -19,14 +22,6 @@ config ZONE_DMA
         bool
         default y
 
-config GENERIC_HARDIRQS
-        bool
-        default y
-
-config GENERIC_IRQ_PROBE
-        bool
-        default y
-
 config NO_IOPORT
         def_bool y
 
diff --git a/arch/m32r/configs/m32700ut.smp_defconfig b/arch/m32r/configs/m32700ut.smp_defconfig
index 816c3ecaa2aa..a3d727ed6a16 100644
--- a/arch/m32r/configs/m32700ut.smp_defconfig
+++ b/arch/m32r/configs/m32700ut.smp_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=15
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_FUTEX is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/m32r/configs/m32700ut.up_defconfig b/arch/m32r/configs/m32700ut.up_defconfig
index 84785686640a..b8334163099d 100644
--- a/arch/m32r/configs/m32700ut.up_defconfig
+++ b/arch/m32r/configs/m32700ut.up_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_FUTEX is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/m32r/configs/mappi.nommu_defconfig b/arch/m32r/configs/mappi.nommu_defconfig
index 354a964d084d..7c90ce2fc42b 100644
--- a/arch/m32r/configs/mappi.nommu_defconfig
+++ b/arch/m32r/configs/mappi.nommu_defconfig
@@ -3,7 +3,7 @@ CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_IKCONFIG=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_FUTEX is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/m32r/configs/mappi.smp_defconfig b/arch/m32r/configs/mappi.smp_defconfig
index 9022307bd073..367d07cebcd3 100644
--- a/arch/m32r/configs/mappi.smp_defconfig
+++ b/arch/m32r/configs/mappi.smp_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=15
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_FUTEX is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/m32r/configs/mappi.up_defconfig b/arch/m32r/configs/mappi.up_defconfig
index 3726068721a5..cb11384386ce 100644
--- a/arch/m32r/configs/mappi.up_defconfig
+++ b/arch/m32r/configs/mappi.up_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_FUTEX is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/m32r/configs/mappi2.opsp_defconfig b/arch/m32r/configs/mappi2.opsp_defconfig
index 6136fad048e4..3bff779259b4 100644
--- a/arch/m32r/configs/mappi2.opsp_defconfig
+++ b/arch/m32r/configs/mappi2.opsp_defconfig
@@ -4,7 +4,7 @@ CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_IKCONFIG=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_FUTEX is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/m32r/configs/mappi2.vdec2_defconfig b/arch/m32r/configs/mappi2.vdec2_defconfig
index dce1fc7d67ed..75246c9c1af8 100644
--- a/arch/m32r/configs/mappi2.vdec2_defconfig
+++ b/arch/m32r/configs/mappi2.vdec2_defconfig
@@ -4,7 +4,7 @@ CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_IKCONFIG=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_FUTEX is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/m32r/configs/mappi3.smp_defconfig b/arch/m32r/configs/mappi3.smp_defconfig
index b204e2ecd0f1..27cefd41ac1f 100644
--- a/arch/m32r/configs/mappi3.smp_defconfig
+++ b/arch/m32r/configs/mappi3.smp_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=15
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_FUTEX is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/m32r/configs/oaks32r_defconfig b/arch/m32r/configs/oaks32r_defconfig
index 5aa4ea9ebb10..5087a510ca4f 100644
--- a/arch/m32r/configs/oaks32r_defconfig
+++ b/arch/m32r/configs/oaks32r_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_FUTEX is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/m32r/configs/opsput_defconfig b/arch/m32r/configs/opsput_defconfig
index 8494c6a276e8..50c6f525db20 100644
--- a/arch/m32r/configs/opsput_defconfig
+++ b/arch/m32r/configs/opsput_defconfig
@@ -4,7 +4,7 @@ CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_IKCONFIG=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_FUTEX is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/m32r/configs/usrv_defconfig b/arch/m32r/configs/usrv_defconfig
index 1df293bc2ab9..a3cfaaedab60 100644
--- a/arch/m32r/configs/usrv_defconfig
+++ b/arch/m32r/configs/usrv_defconfig
@@ -5,7 +5,7 @@ CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_LOG_BUF_SHIFT=15
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/m32r/kernel/irq.c b/arch/m32r/kernel/irq.c
index 7db26f1f082d..f745c1287f3a 100644
--- a/arch/m32r/kernel/irq.c
+++ b/arch/m32r/kernel/irq.c
@@ -40,8 +40,10 @@ int show_interrupts(struct seq_file *p, void *v)
         }
 
         if (i < NR_IRQS) {
-                raw_spin_lock_irqsave(&irq_desc[i].lock, flags);
-                action = irq_desc[i].action;
+                struct irq_desc *desc = irq_to_desc(i);
+
+                raw_spin_lock_irqsave(&desc->lock, flags);
+                action = desc->action;
                 if (!action)
                         goto skip;
                 seq_printf(p, "%3d: ",i);
@@ -51,7 +53,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 for_each_online_cpu(j)
                         seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 #endif
-                seq_printf(p, " %14s", irq_desc[i].chip->name);
+                seq_printf(p, " %14s", desc->irq_data.chip->name);
                 seq_printf(p, "  %s", action->name);
 
                 for (action=action->next; action; action = action->next)
@@ -59,7 +61,7 @@ int show_interrupts(struct seq_file *p, void *v)
 
                 seq_putc(p, '\n');
 skip:
-                raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags);
+                raw_spin_unlock_irqrestore(&desc->lock, flags);
         }
         return 0;
 }
diff --git a/arch/m32r/platforms/m32104ut/setup.c b/arch/m32r/platforms/m32104ut/setup.c
index 402a59d7219b..4a693d02c1e1 100644
--- a/arch/m32r/platforms/m32104ut/setup.c
+++ b/arch/m32r/platforms/m32104ut/setup.c
@@ -39,39 +39,30 @@ static void enable_m32104ut_irq(unsigned int irq)
         outl(data, port);
 }
 
-static void mask_and_ack_m32104ut(unsigned int irq)
+static void mask_m32104ut_irq(struct irq_data *data)
 {
-        disable_m32104ut_irq(irq);
+        disable_m32104ut_irq(data->irq);
 }
 
-static void end_m32104ut_irq(unsigned int irq)
+static void unmask_m32104ut_irq(struct irq_data *data)
 {
-        enable_m32104ut_irq(irq);
+        enable_m32104ut_irq(data->irq);
 }
 
-static unsigned int startup_m32104ut_irq(unsigned int irq)
+static void shutdown_m32104ut_irq(struct irq_data *data)
 {
-        enable_m32104ut_irq(irq);
-        return (0);
-}
-
-static void shutdown_m32104ut_irq(unsigned int irq)
-{
-        unsigned long port;
+        unsigned int irq = data->irq;
+        unsigned long port = irq2port(irq);
 
-        port = irq2port(irq);
         outl(M32R_ICUCR_ILEVEL7, port);
 }
 
 static struct irq_chip m32104ut_irq_type =
 {
-        .name = "M32104UT-IRQ",
-        .startup = startup_m32104ut_irq,
-        .shutdown = shutdown_m32104ut_irq,
-        .enable = enable_m32104ut_irq,
-        .disable = disable_m32104ut_irq,
-        .ack = mask_and_ack_m32104ut,
-        .end = end_m32104ut_irq
+        .name           = "M32104UT-IRQ",
+        .irq_shutdown   = shutdown_m32104ut_irq,
+        .irq_unmask     = unmask_m32104ut_irq,
+        .irq_mask       = mask_m32104ut_irq,
 };
 
 void __init init_IRQ(void)
@@ -85,36 +76,29 @@ void __init init_IRQ(void)
 
 #if defined(CONFIG_SMC91X)
         /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/
-        irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT0].chip = &m32104ut_irq_type;
-        irq_desc[M32R_IRQ_INT0].action = 0;
-        irq_desc[M32R_IRQ_INT0].depth = 1;
-        icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; /* "H" level sense */
+        set_irq_chip_and_handler(M32R_IRQ_INT0, &m32104ut_irq_type,
+                                 handle_level_irq);
+        /* "H" level sense */
+        cu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11;
         disable_m32104ut_irq(M32R_IRQ_INT0);
 #endif  /* CONFIG_SMC91X */
 
         /* MFT2 : system timer */
-        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_MFT2].chip = &m32104ut_irq_type;
-        irq_desc[M32R_IRQ_MFT2].action = 0;
-        irq_desc[M32R_IRQ_MFT2].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_MFT2, &m32104ut_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
         disable_m32104ut_irq(M32R_IRQ_MFT2);
 
 #ifdef CONFIG_SERIAL_M32R_SIO
         /* SIO0_R : uart receive data */
-        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_R].chip = &m32104ut_irq_type;
-        irq_desc[M32R_IRQ_SIO0_R].action = 0;
-        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &m32104ut_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN;
         disable_m32104ut_irq(M32R_IRQ_SIO0_R);
 
         /* SIO0_S : uart send data */
-        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_S].chip = &m32104ut_irq_type;
-        irq_desc[M32R_IRQ_SIO0_S].action = 0;
-        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &m32104ut_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN;
         disable_m32104ut_irq(M32R_IRQ_SIO0_S);
 #endif /* CONFIG_SERIAL_M32R_SIO */
diff --git a/arch/m32r/platforms/m32700ut/setup.c b/arch/m32r/platforms/m32700ut/setup.c
index 80b1a026795a..2074bcc841eb 100644
--- a/arch/m32r/platforms/m32700ut/setup.c
+++ b/arch/m32r/platforms/m32700ut/setup.c
@@ -45,39 +45,30 @@ static void enable_m32700ut_irq(unsigned int irq)
         outl(data, port);
 }
 
-static void mask_and_ack_m32700ut(unsigned int irq)
+static void mask_m32700ut(struct irq_data *data)
 {
-        disable_m32700ut_irq(irq);
+        disable_m32700ut_irq(data->irq);
 }
 
-static void end_m32700ut_irq(unsigned int irq)
+static void unmask_m32700ut(struct irq_data *data)
 {
-        enable_m32700ut_irq(irq);
+        enable_m32700ut_irq(data->irq);
 }
 
-static unsigned int startup_m32700ut_irq(unsigned int irq)
-{
-        enable_m32700ut_irq(irq);
-        return (0);
-}
-
-static void shutdown_m32700ut_irq(unsigned int irq)
+static void shutdown_m32700ut(struct irq_data *data)
 {
         unsigned long port;
 
-        port = irq2port(irq);
+        port = irq2port(data->irq);
         outl(M32R_ICUCR_ILEVEL7, port);
 }
 
 static struct irq_chip m32700ut_irq_type =
 {
-        .name = "M32700UT-IRQ",
-        .startup = startup_m32700ut_irq,
-        .shutdown = shutdown_m32700ut_irq,
-        .enable = enable_m32700ut_irq,
-        .disable = disable_m32700ut_irq,
-        .ack = mask_and_ack_m32700ut,
-        .end = end_m32700ut_irq
+        .name           = "M32700UT-IRQ",
+        .irq_shutdown   = shutdown_m32700ut,
+        .irq_mask       = mask_m32700ut,
+        .irq_unmask     = unmask_m32700ut
 };
 
 /*
@@ -99,7 +90,6 @@ static void disable_m32700ut_pld_irq(unsigned int irq)
         unsigned int pldirq;
 
         pldirq = irq2pldirq(irq);
-//      disable_m32700ut_irq(M32R_IRQ_INT1);
         port = pldirq2port(pldirq);
         data = pld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
         outw(data, port);
@@ -111,50 +101,38 @@ static void enable_m32700ut_pld_irq(unsigned int irq)
         unsigned int pldirq;
 
         pldirq = irq2pldirq(irq);
-//      enable_m32700ut_irq(M32R_IRQ_INT1);
         port = pldirq2port(pldirq);
         data = pld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
         outw(data, port);
 }
 
-static void mask_and_ack_m32700ut_pld(unsigned int irq)
-{
-        disable_m32700ut_pld_irq(irq);
-//      mask_and_ack_m32700ut(M32R_IRQ_INT1);
-}
-
-static void end_m32700ut_pld_irq(unsigned int irq)
+static void mask_m32700ut_pld(struct irq_data *data)
 {
-        enable_m32700ut_pld_irq(irq);
-        end_m32700ut_irq(M32R_IRQ_INT1);
+        disable_m32700ut_pld_irq(data->irq);
 }
 
-static unsigned int startup_m32700ut_pld_irq(unsigned int irq)
+static void unmask_m32700ut_pld(struct irq_data *data)
 {
-        enable_m32700ut_pld_irq(irq);
-        return (0);
+        enable_m32700ut_pld_irq(data->irq);
+        enable_m32700ut_irq(M32R_IRQ_INT1);
 }
 
-static void shutdown_m32700ut_pld_irq(unsigned int irq)
+static void shutdown_m32700ut_pld_irq(struct irq_data *data)
 {
         unsigned long port;
         unsigned int pldirq;
 
-        pldirq = irq2pldirq(irq);
-//      shutdown_m32700ut_irq(M32R_IRQ_INT1);
+        pldirq = irq2pldirq(data->irq);
         port = pldirq2port(pldirq);
         outw(PLD_ICUCR_ILEVEL7, port);
 }
 
 static struct irq_chip m32700ut_pld_irq_type =
 {
-        .name = "M32700UT-PLD-IRQ",
-        .startup = startup_m32700ut_pld_irq,
-        .shutdown = shutdown_m32700ut_pld_irq,
-        .enable = enable_m32700ut_pld_irq,
-        .disable = disable_m32700ut_pld_irq,
-        .ack = mask_and_ack_m32700ut_pld,
-        .end = end_m32700ut_pld_irq
+        .name           = "M32700UT-PLD-IRQ",
+        .irq_shutdown   = shutdown_m32700ut_pld_irq,
+        .irq_mask       = mask_m32700ut_pld,
+        .irq_unmask     = unmask_m32700ut_pld,
 };
 
 /*
@@ -188,42 +166,33 @@ static void enable_m32700ut_lanpld_irq(unsigned int irq)
         outw(data, port);
 }
 
-static void mask_and_ack_m32700ut_lanpld(unsigned int irq)
+static void mask_m32700ut_lanpld(struct irq_data *data)
 {
-        disable_m32700ut_lanpld_irq(irq);
+        disable_m32700ut_lanpld_irq(data->irq);
 }
 
-static void end_m32700ut_lanpld_irq(unsigned int irq)
+static void unmask_m32700ut_lanpld(struct irq_data *data)
 {
-        enable_m32700ut_lanpld_irq(irq);
-        end_m32700ut_irq(M32R_IRQ_INT0);
-}
-
-static unsigned int startup_m32700ut_lanpld_irq(unsigned int irq)
-{
-        enable_m32700ut_lanpld_irq(irq);
-        return (0);
+        enable_m32700ut_lanpld_irq(data->irq);
+        enable_m32700ut_irq(M32R_IRQ_INT0);
 }
 
-static void shutdown_m32700ut_lanpld_irq(unsigned int irq)
+static void shutdown_m32700ut_lanpld(struct irq_data *data)
 {
         unsigned long port;
         unsigned int pldirq;
 
-        pldirq = irq2lanpldirq(irq);
+        pldirq = irq2lanpldirq(data->irq);
         port = lanpldirq2port(pldirq);
         outw(PLD_ICUCR_ILEVEL7, port);
 }
 
 static struct irq_chip m32700ut_lanpld_irq_type =
 {
-        .name = "M32700UT-PLD-LAN-IRQ",
-        .startup = startup_m32700ut_lanpld_irq,
-        .shutdown = shutdown_m32700ut_lanpld_irq,
-        .enable = enable_m32700ut_lanpld_irq,
-        .disable = disable_m32700ut_lanpld_irq,
-        .ack = mask_and_ack_m32700ut_lanpld,
-        .end = end_m32700ut_lanpld_irq
+        .name           = "M32700UT-PLD-LAN-IRQ",
+        .irq_shutdown   = shutdown_m32700ut_lanpld,
+        .irq_mask       = mask_m32700ut_lanpld,
+        .irq_unmask     = unmask_m32700ut_lanpld,
 };
 
 /*
@@ -257,143 +226,110 @@ static void enable_m32700ut_lcdpld_irq(unsigned int irq)
         outw(data, port);
 }
 
-static void mask_and_ack_m32700ut_lcdpld(unsigned int irq)
+static void mask_m32700ut_lcdpld(struct irq_data *data)
 {
-        disable_m32700ut_lcdpld_irq(irq);
+        disable_m32700ut_lcdpld_irq(data->irq);
 }
 
-static void end_m32700ut_lcdpld_irq(unsigned int irq)
+static void unmask_m32700ut_lcdpld(struct irq_data *data)
 {
-        enable_m32700ut_lcdpld_irq(irq);
-        end_m32700ut_irq(M32R_IRQ_INT2);
-}
-
-static unsigned int startup_m32700ut_lcdpld_irq(unsigned int irq)
-{
-        enable_m32700ut_lcdpld_irq(irq);
-        return (0);
+        enable_m32700ut_lcdpld_irq(data->irq);
+        enable_m32700ut_irq(M32R_IRQ_INT2);
 }
 
-static void shutdown_m32700ut_lcdpld_irq(unsigned int irq)
+static void shutdown_m32700ut_lcdpld(struct irq_data *data)
 {
         unsigned long port;
         unsigned int pldirq;
 
-        pldirq = irq2lcdpldirq(irq);
+        pldirq = irq2lcdpldirq(data->irq);
         port = lcdpldirq2port(pldirq);
         outw(PLD_ICUCR_ILEVEL7, port);
 }
 
 static struct irq_chip m32700ut_lcdpld_irq_type =
 {
-        .name = "M32700UT-PLD-LCD-IRQ",
-        .startup = startup_m32700ut_lcdpld_irq,
-        .shutdown = shutdown_m32700ut_lcdpld_irq,
-        .enable = enable_m32700ut_lcdpld_irq,
-        .disable = disable_m32700ut_lcdpld_irq,
-        .ack = mask_and_ack_m32700ut_lcdpld,
-        .end = end_m32700ut_lcdpld_irq
+        .name           = "M32700UT-PLD-LCD-IRQ",
+        .irq_shutdown   = shutdown_m32700ut_lcdpld,
+        .irq_mask       = mask_m32700ut_lcdpld,
+        .irq_unmask     = unmask_m32700ut_lcdpld,
 };
 
 void __init init_IRQ(void)
 {
 #if defined(CONFIG_SMC91X)
         /* INT#0: LAN controller on M32700UT-LAN (SMC91C111)*/
-        irq_desc[M32700UT_LAN_IRQ_LAN].status = IRQ_DISABLED;
-        irq_desc[M32700UT_LAN_IRQ_LAN].chip = &m32700ut_lanpld_irq_type;
-        irq_desc[M32700UT_LAN_IRQ_LAN].action = 0;
-        irq_desc[M32700UT_LAN_IRQ_LAN].depth = 1;       /* disable nested irq */
+        set_irq_chip_and_handler(M32700UT_LAN_IRQ_LAN,
+                                 &m32700ut_lanpld_irq_type, handle_level_irq);
         lanpld_icu_data[irq2lanpldirq(M32700UT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;   /* "H" edge sense */
         disable_m32700ut_lanpld_irq(M32700UT_LAN_IRQ_LAN);
 #endif  /* CONFIG_SMC91X */
 
         /* MFT2 : system timer */
-        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_MFT2].chip = &m32700ut_irq_type;
-        irq_desc[M32R_IRQ_MFT2].action = 0;
-        irq_desc[M32R_IRQ_MFT2].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_MFT2, &m32700ut_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
         disable_m32700ut_irq(M32R_IRQ_MFT2);
 
         /* SIO0 : receive */
-        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_R].chip = &m32700ut_irq_type;
-        irq_desc[M32R_IRQ_SIO0_R].action = 0;
-        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &m32700ut_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO0_R].icucr = 0;
         disable_m32700ut_irq(M32R_IRQ_SIO0_R);
 
         /* SIO0 : send */
-        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_S].chip = &m32700ut_irq_type;
-        irq_desc[M32R_IRQ_SIO0_S].action = 0;
-        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &m32700ut_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO0_S].icucr = 0;
         disable_m32700ut_irq(M32R_IRQ_SIO0_S);
 
         /* SIO1 : receive */
-        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_R].chip = &m32700ut_irq_type;
-        irq_desc[M32R_IRQ_SIO1_R].action = 0;
-        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &m32700ut_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO1_R].icucr = 0;
         disable_m32700ut_irq(M32R_IRQ_SIO1_R);
 
         /* SIO1 : send */
-        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_S].chip = &m32700ut_irq_type;
-        irq_desc[M32R_IRQ_SIO1_S].action = 0;
-        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &m32700ut_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO1_S].icucr = 0;
         disable_m32700ut_irq(M32R_IRQ_SIO1_S);
 
         /* DMA1 : */
-        irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_DMA1].chip = &m32700ut_irq_type;
-        irq_desc[M32R_IRQ_DMA1].action = 0;
-        irq_desc[M32R_IRQ_DMA1].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_DMA1, &m32700ut_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_DMA1].icucr = 0;
         disable_m32700ut_irq(M32R_IRQ_DMA1);
 
 #ifdef CONFIG_SERIAL_M32R_PLDSIO
         /* INT#1: SIO0 Receive on PLD */
-        irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_SIO0_RCV].chip = &m32700ut_pld_irq_type;
-        irq_desc[PLD_IRQ_SIO0_RCV].action = 0;
-        irq_desc[PLD_IRQ_SIO0_RCV].depth = 1;   /* disable nested irq */
+        set_irq_chip_and_handler(PLD_IRQ_SIO0_RCV, &m32700ut_pld_irq_type,
+                                 handle_level_irq);
         pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
         disable_m32700ut_pld_irq(PLD_IRQ_SIO0_RCV);
 
         /* INT#1: SIO0 Send on PLD */
-        irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_SIO0_SND].chip = &m32700ut_pld_irq_type;
-        irq_desc[PLD_IRQ_SIO0_SND].action = 0;
-        irq_desc[PLD_IRQ_SIO0_SND].depth = 1;   /* disable nested irq */
+        set_irq_chip_and_handler(PLD_IRQ_SIO0_SND, &m32700ut_pld_irq_type,
+                                 handle_level_irq);
         pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
         disable_m32700ut_pld_irq(PLD_IRQ_SIO0_SND);
 #endif  /* CONFIG_SERIAL_M32R_PLDSIO */
 
         /* INT#1: CFC IREQ on PLD */
-        irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFIREQ].chip = &m32700ut_pld_irq_type;
-        irq_desc[PLD_IRQ_CFIREQ].action = 0;
-        irq_desc[PLD_IRQ_CFIREQ].depth = 1;     /* disable nested irq */
+        set_irq_chip_and_handler(PLD_IRQ_CFIREQ, &m32700ut_pld_irq_type,
+                                 handle_level_irq);
         pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;       /* 'L' level sense */
         disable_m32700ut_pld_irq(PLD_IRQ_CFIREQ);
 
         /* INT#1: CFC Insert on PLD */
-        irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFC_INSERT].chip = &m32700ut_pld_irq_type;
-        irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
-        irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
+        set_irq_chip_and_handler(PLD_IRQ_CFC_INSERT, &m32700ut_pld_irq_type,
+                                 handle_level_irq);
         pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00;   /* 'L' edge sense */
         disable_m32700ut_pld_irq(PLD_IRQ_CFC_INSERT);
 
         /* INT#1: CFC Eject on PLD */
-        irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFC_EJECT].chip = &m32700ut_pld_irq_type;
-        irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
-        irq_desc[PLD_IRQ_CFC_EJECT].depth = 1;  /* disable nested irq */
+        set_irq_chip_and_handler(PLD_IRQ_CFC_EJECT, &m32700ut_pld_irq_type,
+                                 handle_level_irq);
         pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;    /* 'H' edge sense */
         disable_m32700ut_pld_irq(PLD_IRQ_CFC_EJECT);
 
@@ -413,13 +349,11 @@ void __init init_IRQ(void)
 
 #if defined(CONFIG_USB)
         outw(USBCR_OTGS, USBCR);        /* USBCR: non-OTG */
+        set_irq_chip_and_handler(M32700UT_LCD_IRQ_USB_INT1,
+                                 &m32700ut_lcdpld_irq_type, handle_level_irq);
 
-    irq_desc[M32700UT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED;
-    irq_desc[M32700UT_LCD_IRQ_USB_INT1].chip = &m32700ut_lcdpld_irq_type;
-    irq_desc[M32700UT_LCD_IRQ_USB_INT1].action = 0;
-    irq_desc[M32700UT_LCD_IRQ_USB_INT1].depth = 1;
-    lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;  /* "L" level sense */
-    disable_m32700ut_lcdpld_irq(M32700UT_LCD_IRQ_USB_INT1);
+        lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;      /* "L" level sense */
+        disable_m32700ut_lcdpld_irq(M32700UT_LCD_IRQ_USB_INT1);
 #endif
         /*
          * INT2# is used for BAT, USB, AUDIO
@@ -432,10 +366,8 @@ void __init init_IRQ(void)
         /*
          * INT3# is used for AR
          */
-        irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT3].chip = &m32700ut_irq_type;
-        irq_desc[M32R_IRQ_INT3].action = 0;
-        irq_desc[M32R_IRQ_INT3].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_INT3, &m32700ut_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
         disable_m32700ut_irq(M32R_IRQ_INT3);
 #endif  /* CONFIG_VIDEO_M32R_AR */
diff --git a/arch/m32r/platforms/mappi/setup.c b/arch/m32r/platforms/mappi/setup.c
index ea00c84d6b1b..cdd8c4574027 100644
--- a/arch/m32r/platforms/mappi/setup.c
+++ b/arch/m32r/platforms/mappi/setup.c
@@ -38,40 +38,30 @@ static void enable_mappi_irq(unsigned int irq)
         outl(data, port);
 }
 
-static void mask_and_ack_mappi(unsigned int irq)
+static void mask_mappi(struct irq_data *data)
 {
-        disable_mappi_irq(irq);
+        disable_mappi_irq(data->irq);
 }
 
-static void end_mappi_irq(unsigned int irq)
+static void unmask_mappi(struct irq_data *data)
 {
-        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
-                enable_mappi_irq(irq);
+        enable_mappi_irq(data->irq);
 }
 
-static unsigned int startup_mappi_irq(unsigned int irq)
-{
-        enable_mappi_irq(irq);
-        return (0);
-}
-
-static void shutdown_mappi_irq(unsigned int irq)
+static void shutdown_mappi(struct irq_data *data)
 {
         unsigned long port;
 
-        port = irq2port(irq);
+        port = irq2port(data->irq);
         outl(M32R_ICUCR_ILEVEL7, port);
 }
 
 static struct irq_chip mappi_irq_type =
 {
-        .name = "MAPPI-IRQ",
-        .startup = startup_mappi_irq,
-        .shutdown = shutdown_mappi_irq,
-        .enable = enable_mappi_irq,
-        .disable = disable_mappi_irq,
-        .ack = mask_and_ack_mappi,
-        .end = end_mappi_irq
+        .name           = "MAPPI-IRQ",
+        .irq_shutdown   = shutdown_mappi,
+        .irq_mask       = mask_mappi,
+        .irq_unmask     = unmask_mappi,
 };
 
 void __init init_IRQ(void)
@@ -85,70 +75,54 @@ void __init init_IRQ(void)
 
 #ifdef CONFIG_NE2000
         /* INT0 : LAN controller (RTL8019AS) */
-        irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT0].chip = &mappi_irq_type;
-        irq_desc[M32R_IRQ_INT0].action = NULL;
-        irq_desc[M32R_IRQ_INT0].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_INT0, &mappi_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
         disable_mappi_irq(M32R_IRQ_INT0);
 #endif /* CONFIG_M32R_NE2000 */
 
         /* MFT2 : system timer */
-        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type;
-        irq_desc[M32R_IRQ_MFT2].action = NULL;
-        irq_desc[M32R_IRQ_MFT2].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
         disable_mappi_irq(M32R_IRQ_MFT2);
 
 #ifdef CONFIG_SERIAL_M32R_SIO
         /* SIO0_R : uart receive data */
-        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type;
-        irq_desc[M32R_IRQ_SIO0_R].action = NULL;
-        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO0_R].icucr = 0;
         disable_mappi_irq(M32R_IRQ_SIO0_R);
 
         /* SIO0_S : uart send data */
-        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type;
-        irq_desc[M32R_IRQ_SIO0_S].action = NULL;
-        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO0_S].icucr = 0;
         disable_mappi_irq(M32R_IRQ_SIO0_S);
 
         /* SIO1_R : uart receive data */
-        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type;
-        irq_desc[M32R_IRQ_SIO1_R].action = NULL;
-        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO1_R].icucr = 0;
         disable_mappi_irq(M32R_IRQ_SIO1_R);
 
         /* SIO1_S : uart send data */
-        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type;
-        irq_desc[M32R_IRQ_SIO1_S].action = NULL;
-        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO1_S].icucr = 0;
         disable_mappi_irq(M32R_IRQ_SIO1_S);
 #endif /* CONFIG_SERIAL_M32R_SIO */
 
 #if defined(CONFIG_M32R_PCC)
         /* INT1 : pccard0 interrupt */
-        irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT1].chip = &mappi_irq_type;
-        irq_desc[M32R_IRQ_INT1].action = NULL;
-        irq_desc[M32R_IRQ_INT1].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_INT1, &mappi_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
         disable_mappi_irq(M32R_IRQ_INT1);
 
         /* INT2 : pccard1 interrupt */
-        irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT2].chip = &mappi_irq_type;
-        irq_desc[M32R_IRQ_INT2].action = NULL;
-        irq_desc[M32R_IRQ_INT2].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_INT2, &mappi_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
         disable_mappi_irq(M32R_IRQ_INT2);
 #endif /* CONFIG_M32RPCC */
diff --git a/arch/m32r/platforms/mappi2/setup.c b/arch/m32r/platforms/mappi2/setup.c
index c049376d0270..9117c30ea365 100644
--- a/arch/m32r/platforms/mappi2/setup.c
+++ b/arch/m32r/platforms/mappi2/setup.c
@@ -46,126 +46,97 @@ static void enable_mappi2_irq(unsigned int irq)
         outl(data, port);
 }
 
-static void mask_and_ack_mappi2(unsigned int irq)
+static void mask_mappi2(struct irq_data *data)
 {
-        disable_mappi2_irq(irq);
+        disable_mappi2_irq(data->irq);
 }
 
-static void end_mappi2_irq(unsigned int irq)
+static void unmask_mappi2(struct irq_data *data)
 {
-        enable_mappi2_irq(irq);
+        enable_mappi2_irq(data->irq);
 }
 
-static unsigned int startup_mappi2_irq(unsigned int irq)
-{
-        enable_mappi2_irq(irq);
-        return (0);
-}
-
-static void shutdown_mappi2_irq(unsigned int irq)
+static void shutdown_mappi2(struct irq_data *data)
 {
         unsigned long port;
 
-        port = irq2port(irq);
+        port = irq2port(data->irq);
         outl(M32R_ICUCR_ILEVEL7, port);
 }
 
 static struct irq_chip mappi2_irq_type =
 {
-        .name = "MAPPI2-IRQ",
-        .startup = startup_mappi2_irq,
-        .shutdown = shutdown_mappi2_irq,
-        .enable = enable_mappi2_irq,
-        .disable = disable_mappi2_irq,
-        .ack = mask_and_ack_mappi2,
-        .end = end_mappi2_irq
+        .name           = "MAPPI2-IRQ",
+        .irq_shutdown   = shutdown_mappi2,
+        .irq_mask       = mask_mappi2,
+        .irq_unmask     = unmask_mappi2,
 };
 
 void __init init_IRQ(void)
 {
 #if defined(CONFIG_SMC91X)
         /* INT0 : LAN controller (SMC91111) */
-        irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT0].chip = &mappi2_irq_type;
-        irq_desc[M32R_IRQ_INT0].action = 0;
-        irq_desc[M32R_IRQ_INT0].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_INT0, &mappi2_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
         disable_mappi2_irq(M32R_IRQ_INT0);
 #endif  /* CONFIG_SMC91X */
 
         /* MFT2 : system timer */
-        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_MFT2].chip = &mappi2_irq_type;
-        irq_desc[M32R_IRQ_MFT2].action = 0;
-        irq_desc[M32R_IRQ_MFT2].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi2_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
         disable_mappi2_irq(M32R_IRQ_MFT2);
 
 #ifdef CONFIG_SERIAL_M32R_SIO
         /* SIO0_R : uart receive data */
-        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_R].chip = &mappi2_irq_type;
-        irq_desc[M32R_IRQ_SIO0_R].action = 0;
-        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi2_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO0_R].icucr = 0;
         disable_mappi2_irq(M32R_IRQ_SIO0_R);
 
         /* SIO0_S : uart send data */
-        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_S].chip = &mappi2_irq_type;
-        irq_desc[M32R_IRQ_SIO0_S].action = 0;
-        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi2_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO0_S].icucr = 0;
         disable_mappi2_irq(M32R_IRQ_SIO0_S);
         /* SIO1_R : uart receive data */
-        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_R].chip = &mappi2_irq_type;
-        irq_desc[M32R_IRQ_SIO1_R].action = 0;
-        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi2_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO1_R].icucr = 0;
         disable_mappi2_irq(M32R_IRQ_SIO1_R);
 
         /* SIO1_S : uart send data */
-        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_S].chip = &mappi2_irq_type;
-        irq_desc[M32R_IRQ_SIO1_S].action = 0;
-        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi2_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO1_S].icucr = 0;
         disable_mappi2_irq(M32R_IRQ_SIO1_S);
 #endif  /* CONFIG_M32R_USE_DBG_CONSOLE */
 
 #if defined(CONFIG_USB)
         /* INT1 : USB Host controller interrupt */
-        irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT1].chip = &mappi2_irq_type;
-        irq_desc[M32R_IRQ_INT1].action = 0;
-        irq_desc[M32R_IRQ_INT1].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_INT1, &mappi2_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
         disable_mappi2_irq(M32R_IRQ_INT1);
 #endif /* CONFIG_USB */
 
         /* ICUCR40: CFC IREQ */
-        irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFIREQ].chip = &mappi2_irq_type;
-        irq_desc[PLD_IRQ_CFIREQ].action = 0;
-        irq_desc[PLD_IRQ_CFIREQ].depth = 1;     /* disable nested irq */
+        set_irq_chip_and_handler(PLD_IRQ_CFIREQ, &mappi2_irq_type,
+                                 handle_level_irq);
         icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
         disable_mappi2_irq(PLD_IRQ_CFIREQ);
 
 #if defined(CONFIG_M32R_CFC)
         /* ICUCR41: CFC Insert */
-        irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi2_irq_type;
-        irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
-        irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
+        set_irq_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi2_irq_type,
+                                 handle_level_irq);
         icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
         disable_mappi2_irq(PLD_IRQ_CFC_INSERT);
 
         /* ICUCR42: CFC Eject */
-        irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFC_EJECT].chip = &mappi2_irq_type;
-        irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
-        irq_desc[PLD_IRQ_CFC_EJECT].depth = 1;  /* disable nested irq */
+        set_irq_chip_and_handler(PLD_IRQ_CFC_EJECT, &mappi2_irq_type,
+                                 handle_level_irq);
         icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
         disable_mappi2_irq(PLD_IRQ_CFC_EJECT);
 #endif /* CONFIG_MAPPI2_CFC */
diff --git a/arch/m32r/platforms/mappi3/setup.c b/arch/m32r/platforms/mappi3/setup.c
index 882de25c6e8c..b44f5ded2bbe 100644
--- a/arch/m32r/platforms/mappi3/setup.c
+++ b/arch/m32r/platforms/mappi3/setup.c
@@ -46,128 +46,98 @@ static void enable_mappi3_irq(unsigned int irq)
         outl(data, port);
 }
 
-static void mask_and_ack_mappi3(unsigned int irq)
+static void mask_mappi3(struct irq_data *data)
 {
-        disable_mappi3_irq(irq);
+        disable_mappi3_irq(data->irq);
 }
 
-static void end_mappi3_irq(unsigned int irq)
+static void unmask_mappi3(struct irq_data *data)
 {
-        enable_mappi3_irq(irq);
+        enable_mappi3_irq(data->irq);
 }
 
-static unsigned int startup_mappi3_irq(unsigned int irq)
-{
-        enable_mappi3_irq(irq);
-        return (0);
-}
-
-static void shutdown_mappi3_irq(unsigned int irq)
+static void shutdown_mappi3(struct irq_data *data)
 {
         unsigned long port;
 
-        port = irq2port(irq);
+        port = irq2port(data->irq);
         outl(M32R_ICUCR_ILEVEL7, port);
 }
 
-static struct irq_chip mappi3_irq_type =
-{
-        .name = "MAPPI3-IRQ",
-        .startup = startup_mappi3_irq,
-        .shutdown = shutdown_mappi3_irq,
-        .enable = enable_mappi3_irq,
-        .disable = disable_mappi3_irq,
-        .ack = mask_and_ack_mappi3,
-        .end = end_mappi3_irq
+static struct irq_chip mappi3_irq_type = {
+        .name           = "MAPPI3-IRQ",
+        .irq_shutdown   = shutdown_mappi3,
+        .irq_mask       = mask_mappi3,
+        .irq_unmask     = unmask_mappi3,
 };
 
 void __init init_IRQ(void)
 {
 #if defined(CONFIG_SMC91X)
         /* INT0 : LAN controller (SMC91111) */
-        irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT0].chip = &mappi3_irq_type;
-        irq_desc[M32R_IRQ_INT0].action = 0;
-        irq_desc[M32R_IRQ_INT0].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_INT0, &mappi3_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
         disable_mappi3_irq(M32R_IRQ_INT0);
 #endif  /* CONFIG_SMC91X */
 
         /* MFT2 : system timer */
-        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_MFT2].chip = &mappi3_irq_type;
-        irq_desc[M32R_IRQ_MFT2].action = 0;
-        irq_desc[M32R_IRQ_MFT2].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi3_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
         disable_mappi3_irq(M32R_IRQ_MFT2);
 
 #ifdef CONFIG_SERIAL_M32R_SIO
         /* SIO0_R : uart receive data */
-        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_R].chip = &mappi3_irq_type;
-        irq_desc[M32R_IRQ_SIO0_R].action = 0;
-        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi3_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO0_R].icucr = 0;
         disable_mappi3_irq(M32R_IRQ_SIO0_R);
 
         /* SIO0_S : uart send data */
-        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_S].chip = &mappi3_irq_type;
-        irq_desc[M32R_IRQ_SIO0_S].action = 0;
-        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi3_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO0_S].icucr = 0;
         disable_mappi3_irq(M32R_IRQ_SIO0_S);
         /* SIO1_R : uart receive data */
-        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_R].chip = &mappi3_irq_type;
-        irq_desc[M32R_IRQ_SIO1_R].action = 0;
-        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi3_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO1_R].icucr = 0;
         disable_mappi3_irq(M32R_IRQ_SIO1_R);
 
         /* SIO1_S : uart send data */
-        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_S].chip = &mappi3_irq_type;
-        irq_desc[M32R_IRQ_SIO1_S].action = 0;
-        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi3_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO1_S].icucr = 0;
         disable_mappi3_irq(M32R_IRQ_SIO1_S);
 #endif  /* CONFIG_M32R_USE_DBG_CONSOLE */
 
 #if defined(CONFIG_USB)
         /* INT1 : USB Host controller interrupt */
-        irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT1].chip = &mappi3_irq_type;
-        irq_desc[M32R_IRQ_INT1].action = 0;
-        irq_desc[M32R_IRQ_INT1].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_INT1, &mappi3_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
         disable_mappi3_irq(M32R_IRQ_INT1);
 #endif /* CONFIG_USB */
 
         /* CFC IREQ */
-        irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFIREQ].chip = &mappi3_irq_type;
-        irq_desc[PLD_IRQ_CFIREQ].action = 0;
-        irq_desc[PLD_IRQ_CFIREQ].depth = 1;     /* disable nested irq */
+        set_irq_chip_and_handler(PLD_IRQ_CFIREQ, &mappi3_irq_type,
+                                 handle_level_irq);
         icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
         disable_mappi3_irq(PLD_IRQ_CFIREQ);
 
 #if defined(CONFIG_M32R_CFC)
         /* ICUCR41: CFC Insert & eject */
-        irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi3_irq_type;
-        irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
-        irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
+        set_irq_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi3_irq_type,
+                                 handle_level_irq);
         icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
         disable_mappi3_irq(PLD_IRQ_CFC_INSERT);
 
 #endif /* CONFIG_M32R_CFC */
 
         /* IDE IREQ */
-        irq_desc[PLD_IRQ_IDEIREQ].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_IDEIREQ].chip = &mappi3_irq_type;
-        irq_desc[PLD_IRQ_IDEIREQ].action = 0;
-        irq_desc[PLD_IRQ_IDEIREQ].depth = 1;    /* disable nested irq */
+        set_irq_chip_and_handler(PLD_IRQ_IDEIREQ, &mappi3_irq_type,
+                                 handle_level_irq);
         icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
         disable_mappi3_irq(PLD_IRQ_IDEIREQ);
 
diff --git a/arch/m32r/platforms/oaks32r/setup.c b/arch/m32r/platforms/oaks32r/setup.c
index d11d93bf74f5..19a02db7b818 100644
--- a/arch/m32r/platforms/oaks32r/setup.c
+++ b/arch/m32r/platforms/oaks32r/setup.c
@@ -37,39 +37,30 @@ static void enable_oaks32r_irq(unsigned int irq)
         outl(data, port);
 }
 
-static void mask_and_ack_mappi(unsigned int irq)
+static void mask_oaks32r(struct irq_data *data)
 {
-        disable_oaks32r_irq(irq);
+        disable_oaks32r_irq(data->irq);
 }
 
-static void end_oaks32r_irq(unsigned int irq)
+static void unmask_oaks32r(struct irq_data *data)
 {
-        enable_oaks32r_irq(irq);
+        enable_oaks32r_irq(data->irq);
 }
 
-static unsigned int startup_oaks32r_irq(unsigned int irq)
-{
-        enable_oaks32r_irq(irq);
-        return (0);
-}
-
-static void shutdown_oaks32r_irq(unsigned int irq)
+static void shutdown_oaks32r(struct irq_data *data)
 {
         unsigned long port;
 
-        port = irq2port(irq);
+        port = irq2port(data->irq);
         outl(M32R_ICUCR_ILEVEL7, port);
 }
 
 static struct irq_chip oaks32r_irq_type =
 {
-        .name = "OAKS32R-IRQ",
-        .startup = startup_oaks32r_irq,
-        .shutdown = shutdown_oaks32r_irq,
-        .enable = enable_oaks32r_irq,
-        .disable = disable_oaks32r_irq,
-        .ack = mask_and_ack_mappi,
-        .end = end_oaks32r_irq
+        .name           = "OAKS32R-IRQ",
+        .irq_shutdown   = shutdown_oaks32r,
+        .irq_mask       = mask_oaks32r,
+        .irq_unmask     = unmask_oaks32r,
 };
 
 void __init init_IRQ(void)
@@ -83,52 +74,40 @@ void __init init_IRQ(void)
 
 #ifdef CONFIG_NE2000
         /* INT3 : LAN controller (RTL8019AS) */
-        irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT3].chip = &oaks32r_irq_type;
-        irq_desc[M32R_IRQ_INT3].action = 0;
-        irq_desc[M32R_IRQ_INT3].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_INT3, &oaks32r_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
         disable_oaks32r_irq(M32R_IRQ_INT3);
 #endif /* CONFIG_M32R_NE2000 */
 
         /* MFT2 : system timer */
-        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_MFT2].chip = &oaks32r_irq_type;
-        irq_desc[M32R_IRQ_MFT2].action = 0;
-        irq_desc[M32R_IRQ_MFT2].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_MFT2, &oaks32r_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
         disable_oaks32r_irq(M32R_IRQ_MFT2);
 
 #ifdef CONFIG_SERIAL_M32R_SIO
         /* SIO0_R : uart receive data */
-        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_R].chip = &oaks32r_irq_type;
-        irq_desc[M32R_IRQ_SIO0_R].action = 0;
-        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &oaks32r_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO0_R].icucr = 0;
         disable_oaks32r_irq(M32R_IRQ_SIO0_R);
 
         /* SIO0_S : uart send data */
-        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_S].chip = &oaks32r_irq_type;
-        irq_desc[M32R_IRQ_SIO0_S].action = 0;
-        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &oaks32r_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO0_S].icucr = 0;
         disable_oaks32r_irq(M32R_IRQ_SIO0_S);
 
         /* SIO1_R : uart receive data */
-        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_R].chip = &oaks32r_irq_type;
-        irq_desc[M32R_IRQ_SIO1_R].action = 0;
-        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &oaks32r_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO1_R].icucr = 0;
         disable_oaks32r_irq(M32R_IRQ_SIO1_R);
 
         /* SIO1_S : uart send data */
-        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_S].chip = &oaks32r_irq_type;
-        irq_desc[M32R_IRQ_SIO1_S].action = 0;
-        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &oaks32r_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO1_S].icucr = 0;
         disable_oaks32r_irq(M32R_IRQ_SIO1_S);
 #endif /* CONFIG_SERIAL_M32R_SIO */
diff --git a/arch/m32r/platforms/opsput/setup.c b/arch/m32r/platforms/opsput/setup.c
index 5f3402a2fbaf..12731547e8bf 100644
--- a/arch/m32r/platforms/opsput/setup.c
+++ b/arch/m32r/platforms/opsput/setup.c
@@ -46,39 +46,30 @@ static void enable_opsput_irq(unsigned int irq)
         outl(data, port);
 }
 
-static void mask_and_ack_opsput(unsigned int irq)
+static void mask_opsput(struct irq_data *data)
 {
-        disable_opsput_irq(irq);
+        disable_opsput_irq(data->irq);
 }
 
-static void end_opsput_irq(unsigned int irq)
+static void unmask_opsput(struct irq_data *data)
 {
-        enable_opsput_irq(irq);
+        enable_opsput_irq(data->irq);
 }
 
-static unsigned int startup_opsput_irq(unsigned int irq)
-{
-        enable_opsput_irq(irq);
-        return (0);
-}
-
-static void shutdown_opsput_irq(unsigned int irq)
+static void shutdown_opsput(struct irq_data *data)
 {
         unsigned long port;
 
-        port = irq2port(irq);
+        port = irq2port(data->irq);
         outl(M32R_ICUCR_ILEVEL7, port);
 }
 
 static struct irq_chip opsput_irq_type =
 {
-        .name = "OPSPUT-IRQ",
-        .startup = startup_opsput_irq,
-        .shutdown = shutdown_opsput_irq,
-        .enable = enable_opsput_irq,
-        .disable = disable_opsput_irq,
-        .ack = mask_and_ack_opsput,
-        .end = end_opsput_irq
+        .name           = "OPSPUT-IRQ",
+        .irq_shutdown   = shutdown_opsput,
+        .irq_mask       = mask_opsput,
+        .irq_unmask     = unmask_opsput,
 };
 
 /*
@@ -100,7 +91,6 @@ static void disable_opsput_pld_irq(unsigned int irq)
         unsigned int pldirq;
 
         pldirq = irq2pldirq(irq);
-//      disable_opsput_irq(M32R_IRQ_INT1);
         port = pldirq2port(pldirq);
         data = pld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
         outw(data, port);
@@ -112,50 +102,38 @@ static void enable_opsput_pld_irq(unsigned int irq)
         unsigned int pldirq;
 
         pldirq = irq2pldirq(irq);
-//      enable_opsput_irq(M32R_IRQ_INT1);
         port = pldirq2port(pldirq);
         data = pld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
         outw(data, port);
 }
 
-static void mask_and_ack_opsput_pld(unsigned int irq)
-{
-        disable_opsput_pld_irq(irq);
-//      mask_and_ack_opsput(M32R_IRQ_INT1);
-}
-
-static void end_opsput_pld_irq(unsigned int irq)
+static void mask_opsput_pld(struct irq_data *data)
 {
-        enable_opsput_pld_irq(irq);
-        end_opsput_irq(M32R_IRQ_INT1);
+        disable_opsput_pld_irq(data->irq);
 }
 
-static unsigned int startup_opsput_pld_irq(unsigned int irq)
+static void unmask_opsput_pld(struct irq_data *data)
 {
-        enable_opsput_pld_irq(irq);
-        return (0);
+        enable_opsput_pld_irq(data->irq);
+        enable_opsput_irq(M32R_IRQ_INT1);
 }
 
-static void shutdown_opsput_pld_irq(unsigned int irq)
+static void shutdown_opsput_pld(struct irq_data *data)
 {
         unsigned long port;
         unsigned int pldirq;
 
-        pldirq = irq2pldirq(irq);
-//      shutdown_opsput_irq(M32R_IRQ_INT1);
+        pldirq = irq2pldirq(data->irq);
         port = pldirq2port(pldirq);
         outw(PLD_ICUCR_ILEVEL7, port);
 }
 
 static struct irq_chip opsput_pld_irq_type =
 {
-        .name = "OPSPUT-PLD-IRQ",
-        .startup = startup_opsput_pld_irq,
-        .shutdown = shutdown_opsput_pld_irq,
-        .enable = enable_opsput_pld_irq,
-        .disable = disable_opsput_pld_irq,
-        .ack = mask_and_ack_opsput_pld,
-        .end = end_opsput_pld_irq
+        .name           = "OPSPUT-PLD-IRQ",
+        .irq_shutdown   = shutdown_opsput_pld,
+        .irq_mask       = mask_opsput_pld,
+        .irq_unmask     = unmask_opsput_pld,
 };
 
 /*
@@ -189,42 +167,33 @@ static void enable_opsput_lanpld_irq(unsigned int irq)
         outw(data, port);
 }
 
-static void mask_and_ack_opsput_lanpld(unsigned int irq)
-{
-        disable_opsput_lanpld_irq(irq);
-}
-
-static void end_opsput_lanpld_irq(unsigned int irq)
+static void mask_opsput_lanpld(struct irq_data *data)
 {
-        enable_opsput_lanpld_irq(irq);
-        end_opsput_irq(M32R_IRQ_INT0);
+        disable_opsput_lanpld_irq(data->irq);
 }
 
-static unsigned int startup_opsput_lanpld_irq(unsigned int irq)
+static void unmask_opsput_lanpld(struct irq_data *data)
 {
-        enable_opsput_lanpld_irq(irq);
-        return (0);
+        enable_opsput_lanpld_irq(data->irq);
+        enable_opsput_irq(M32R_IRQ_INT0);
 }
 
-static void shutdown_opsput_lanpld_irq(unsigned int irq)
+static void shutdown_opsput_lanpld(struct irq_data *data)
 {
         unsigned long port;
         unsigned int pldirq;
 
-        pldirq = irq2lanpldirq(irq);
+        pldirq = irq2lanpldirq(data->irq);
         port = lanpldirq2port(pldirq);
         outw(PLD_ICUCR_ILEVEL7, port);
 }
 
 static struct irq_chip opsput_lanpld_irq_type =
 {
-        .name = "OPSPUT-PLD-LAN-IRQ",
-        .startup = startup_opsput_lanpld_irq,
-        .shutdown = shutdown_opsput_lanpld_irq,
-        .enable = enable_opsput_lanpld_irq,
-        .disable = disable_opsput_lanpld_irq,
-        .ack = mask_and_ack_opsput_lanpld,
-        .end = end_opsput_lanpld_irq
+        .name           = "OPSPUT-PLD-LAN-IRQ",
+        .irq_shutdown   = shutdown_opsput_lanpld,
+        .irq_mask       = mask_opsput_lanpld,
+        .irq_unmask     = unmask_opsput_lanpld,
 };
 
 /*
@@ -258,143 +227,109 @@ static void enable_opsput_lcdpld_irq(unsigned int irq)
         outw(data, port);
 }
 
-static void mask_and_ack_opsput_lcdpld(unsigned int irq)
-{
-        disable_opsput_lcdpld_irq(irq);
-}
-
-static void end_opsput_lcdpld_irq(unsigned int irq)
+static void mask_opsput_lcdpld(struct irq_data *data)
 {
-        enable_opsput_lcdpld_irq(irq);
-        end_opsput_irq(M32R_IRQ_INT2);
+        disable_opsput_lcdpld_irq(data->irq);
 }
 
-static unsigned int startup_opsput_lcdpld_irq(unsigned int irq)
+static void unmask_opsput_lcdpld(struct irq_data *data)
 {
-        enable_opsput_lcdpld_irq(irq);
-        return (0);
+        enable_opsput_lcdpld_irq(data->irq);
+        enable_opsput_irq(M32R_IRQ_INT2);
 }
 
-static void shutdown_opsput_lcdpld_irq(unsigned int irq)
+static void shutdown_opsput_lcdpld(struct irq_data *data)
 {
         unsigned long port;
         unsigned int pldirq;
 
-        pldirq = irq2lcdpldirq(irq);
+        pldirq = irq2lcdpldirq(data->irq);
         port = lcdpldirq2port(pldirq);
         outw(PLD_ICUCR_ILEVEL7, port);
 }
 
-static struct irq_chip opsput_lcdpld_irq_type =
-{
-        "OPSPUT-PLD-LCD-IRQ",
-        startup_opsput_lcdpld_irq,
-        shutdown_opsput_lcdpld_irq,
-        enable_opsput_lcdpld_irq,
-        disable_opsput_lcdpld_irq,
-        mask_and_ack_opsput_lcdpld,
-        end_opsput_lcdpld_irq
+static struct irq_chip opsput_lcdpld_irq_type = {
+        .name           = "OPSPUT-PLD-LCD-IRQ",
+        .irq_shutdown   = shutdown_opsput_lcdpld,
+        .irq_mask       = mask_opsput_lcdpld,
+        .irq_unmask     = unmask_opsput_lcdpld,
 };
 
 void __init init_IRQ(void)
 {
 #if defined(CONFIG_SMC91X)
         /* INT#0: LAN controller on OPSPUT-LAN (SMC91C111)*/
-        irq_desc[OPSPUT_LAN_IRQ_LAN].status = IRQ_DISABLED;
-        irq_desc[OPSPUT_LAN_IRQ_LAN].chip = &opsput_lanpld_irq_type;
-        irq_desc[OPSPUT_LAN_IRQ_LAN].action = 0;
-        irq_desc[OPSPUT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */
+        set_irq_chip_and_handler(OPSPUT_LAN_IRQ_LAN, &opsput_lanpld_irq_type,
+                                 handle_level_irq);
         lanpld_icu_data[irq2lanpldirq(OPSPUT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;     /* "H" edge sense */
         disable_opsput_lanpld_irq(OPSPUT_LAN_IRQ_LAN);
 #endif  /* CONFIG_SMC91X */
 
         /* MFT2 : system timer */
-        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_MFT2].chip = &opsput_irq_type;
-        irq_desc[M32R_IRQ_MFT2].action = 0;
-        irq_desc[M32R_IRQ_MFT2].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_MFT2, &opsput_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
         disable_opsput_irq(M32R_IRQ_MFT2);
 
         /* SIO0 : receive */
-        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_R].chip = &opsput_irq_type;
-        irq_desc[M32R_IRQ_SIO0_R].action = 0;
-        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &opsput_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO0_R].icucr = 0;
         disable_opsput_irq(M32R_IRQ_SIO0_R);
 
         /* SIO0 : send */
-        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_S].chip = &opsput_irq_type;
-        irq_desc[M32R_IRQ_SIO0_S].action = 0;
-        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &opsput_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO0_S].icucr = 0;
         disable_opsput_irq(M32R_IRQ_SIO0_S);
 
         /* SIO1 : receive */
-        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_R].chip = &opsput_irq_type;
-        irq_desc[M32R_IRQ_SIO1_R].action = 0;
-        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &opsput_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO1_R].icucr = 0;
         disable_opsput_irq(M32R_IRQ_SIO1_R);
 
         /* SIO1 : send */
-        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_S].chip = &opsput_irq_type;
-        irq_desc[M32R_IRQ_SIO1_S].action = 0;
-        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &opsput_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO1_S].icucr = 0;
         disable_opsput_irq(M32R_IRQ_SIO1_S);
 
         /* DMA1 : */
-        irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_DMA1].chip = &opsput_irq_type;
-        irq_desc[M32R_IRQ_DMA1].action = 0;
-        irq_desc[M32R_IRQ_DMA1].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_DMA1, &opsput_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_DMA1].icucr = 0;
         disable_opsput_irq(M32R_IRQ_DMA1);
 
 #ifdef CONFIG_SERIAL_M32R_PLDSIO
         /* INT#1: SIO0 Receive on PLD */
-        irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_SIO0_RCV].chip = &opsput_pld_irq_type;
-        irq_desc[PLD_IRQ_SIO0_RCV].action = 0;
-        irq_desc[PLD_IRQ_SIO0_RCV].depth = 1;   /* disable nested irq */
+        set_irq_chip_and_handler(PLD_IRQ_SIO0_RCV, &opsput_pld_irq_type,
+                                 handle_level_irq);
         pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
         disable_opsput_pld_irq(PLD_IRQ_SIO0_RCV);
 
         /* INT#1: SIO0 Send on PLD */
-        irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_SIO0_SND].chip = &opsput_pld_irq_type;
-        irq_desc[PLD_IRQ_SIO0_SND].action = 0;
-        irq_desc[PLD_IRQ_SIO0_SND].depth = 1;   /* disable nested irq */
+        set_irq_chip_and_handler(PLD_IRQ_SIO0_SND, &opsput_pld_irq_type,
+                                 handle_level_irq);
         pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
         disable_opsput_pld_irq(PLD_IRQ_SIO0_SND);
 #endif  /* CONFIG_SERIAL_M32R_PLDSIO */
 
         /* INT#1: CFC IREQ on PLD */
-        irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFIREQ].chip = &opsput_pld_irq_type;
-        irq_desc[PLD_IRQ_CFIREQ].action = 0;
-        irq_desc[PLD_IRQ_CFIREQ].depth = 1;     /* disable nested irq */
+        set_irq_chip_and_handler(PLD_IRQ_CFIREQ, &opsput_pld_irq_type,
+                                 handle_level_irq);
         pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;       /* 'L' level sense */
         disable_opsput_pld_irq(PLD_IRQ_CFIREQ);
 
         /* INT#1: CFC Insert on PLD */
-        irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFC_INSERT].chip = &opsput_pld_irq_type;
-        irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
-        irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
+        set_irq_chip_and_handler(PLD_IRQ_CFC_INSERT, &opsput_pld_irq_type,
+                                 handle_level_irq);
         pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00;   /* 'L' edge sense */
         disable_opsput_pld_irq(PLD_IRQ_CFC_INSERT);
 
         /* INT#1: CFC Eject on PLD */
-        irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFC_EJECT].chip = &opsput_pld_irq_type;
-        irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
-        irq_desc[PLD_IRQ_CFC_EJECT].depth = 1;  /* disable nested irq */
+        set_irq_chip_and_handler(PLD_IRQ_CFC_EJECT, &opsput_pld_irq_type,
+                                 handle_level_irq);
         pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;    /* 'H' edge sense */
         disable_opsput_pld_irq(PLD_IRQ_CFC_EJECT);
 
@@ -413,14 +348,11 @@ void __init init_IRQ(void)
         enable_opsput_irq(M32R_IRQ_INT1);
 
 #if defined(CONFIG_USB)
-        outw(USBCR_OTGS, USBCR);        /* USBCR: non-OTG */
-
-    irq_desc[OPSPUT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED;
-    irq_desc[OPSPUT_LCD_IRQ_USB_INT1].chip = &opsput_lcdpld_irq_type;
-    irq_desc[OPSPUT_LCD_IRQ_USB_INT1].action = 0;
-    irq_desc[OPSPUT_LCD_IRQ_USB_INT1].depth = 1;
-    lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;    /* "L" level sense */
-    disable_opsput_lcdpld_irq(OPSPUT_LCD_IRQ_USB_INT1);
+        outw(USBCR_OTGS, USBCR);        /* USBCR: non-OTG */
+        set_irq_chip_and_handler(OPSPUT_LCD_IRQ_USB_INT1,
+                                 &opsput_lcdpld_irq_type, handle_level_irq);
+        lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;        /* "L" level sense */
+        disable_opsput_lcdpld_irq(OPSPUT_LCD_IRQ_USB_INT1);
 #endif
         /*
          * INT2# is used for BAT, USB, AUDIO
@@ -433,10 +365,8 @@ void __init init_IRQ(void)
         /*
          * INT3# is used for AR
          */
-        irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT3].chip = &opsput_irq_type;
-        irq_desc[M32R_IRQ_INT3].action = 0;
-        irq_desc[M32R_IRQ_INT3].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_INT3, &opsput_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
         disable_opsput_irq(M32R_IRQ_INT3);
 #endif /* CONFIG_VIDEO_M32R_AR */
diff --git a/arch/m32r/platforms/usrv/setup.c b/arch/m32r/platforms/usrv/setup.c
index 1beac7a51ed4..f3cff26d6e74 100644
--- a/arch/m32r/platforms/usrv/setup.c
+++ b/arch/m32r/platforms/usrv/setup.c
@@ -37,39 +37,30 @@ static void enable_mappi_irq(unsigned int irq)
         outl(data, port);
 }
 
-static void mask_and_ack_mappi(unsigned int irq)
+static void mask_mappi(struct irq_data *data)
 {
-        disable_mappi_irq(irq);
+        disable_mappi_irq(data->irq);
 }
 
-static void end_mappi_irq(unsigned int irq)
+static void unmask_mappi(struct irq_data *data)
 {
-        enable_mappi_irq(irq);
+        enable_mappi_irq(data->irq);
 }
 
-static unsigned int startup_mappi_irq(unsigned int irq)
-{
-        enable_mappi_irq(irq);
-        return 0;
-}
-
-static void shutdown_mappi_irq(unsigned int irq)
+static void shutdown_mappi(struct irq_data *data)
 {
         unsigned long port;
 
-        port = irq2port(irq);
+        port = irq2port(data->irq);
         outl(M32R_ICUCR_ILEVEL7, port);
 }
 
 static struct irq_chip mappi_irq_type =
 {
-        .name = "M32700-IRQ",
-        .startup = startup_mappi_irq,
-        .shutdown = shutdown_mappi_irq,
-        .enable = enable_mappi_irq,
-        .disable = disable_mappi_irq,
-        .ack = mask_and_ack_mappi,
-        .end = end_mappi_irq
+        .name           = "M32700-IRQ",
+        .irq_shutdown   = shutdown_mappi,
+        .irq_mask       = mask_mappi,
+        .irq_unmask     = unmask_mappi,
 };
 
 /*
@@ -107,42 +98,33 @@ static void enable_m32700ut_pld_irq(unsigned int irq)
         outw(data, port);
 }
 
-static void mask_and_ack_m32700ut_pld(unsigned int irq)
+static void mask_m32700ut_pld(struct irq_data *data)
 {
-        disable_m32700ut_pld_irq(irq);
+        disable_m32700ut_pld_irq(data->irq);
 }
 
-static void end_m32700ut_pld_irq(unsigned int irq)
+static void unmask_m32700ut_pld(struct irq_data *data)
 {
-        enable_m32700ut_pld_irq(irq);
-        end_mappi_irq(M32R_IRQ_INT1);
-}
-
-static unsigned int startup_m32700ut_pld_irq(unsigned int irq)
-{
-        enable_m32700ut_pld_irq(irq);
-        return 0;
+        enable_m32700ut_pld_irq(data->irq);
+        enable_mappi_irq(M32R_IRQ_INT1);
 }
 
-static void shutdown_m32700ut_pld_irq(unsigned int irq)
+static void shutdown_m32700ut_pld(struct irq_data *data)
 {
         unsigned long port;
         unsigned int pldirq;
 
-        pldirq = irq2pldirq(irq);
+        pldirq = irq2pldirq(data->irq);
         port = pldirq2port(pldirq);
         outw(PLD_ICUCR_ILEVEL7, port);
 }
 
 static struct irq_chip m32700ut_pld_irq_type =
 {
-        .name = "USRV-PLD-IRQ",
-        .startup = startup_m32700ut_pld_irq,
-        .shutdown = shutdown_m32700ut_pld_irq,
-        .enable = enable_m32700ut_pld_irq,
-        .disable = disable_m32700ut_pld_irq,
-        .ack = mask_and_ack_m32700ut_pld,
-        .end = end_m32700ut_pld_irq
+        .name           = "USRV-PLD-IRQ",
+        .irq_shutdown   = shutdown_m32700ut_pld,
+        .irq_mask       = mask_m32700ut_pld,
+        .irq_unmask     = unmask_m32700ut_pld,
 };
 
 void __init init_IRQ(void)
@@ -156,53 +138,42 @@ void __init init_IRQ(void)
                 once++;
 
         /* MFT2 : system timer */
-        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type;
-        irq_desc[M32R_IRQ_MFT2].action = 0;
-        irq_desc[M32R_IRQ_MFT2].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
         disable_mappi_irq(M32R_IRQ_MFT2);
 
 #if defined(CONFIG_SERIAL_M32R_SIO)
         /* SIO0_R : uart receive data */
-        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type;
-        irq_desc[M32R_IRQ_SIO0_R].action = 0;
-        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO0_R].icucr = 0;
         disable_mappi_irq(M32R_IRQ_SIO0_R);
 
         /* SIO0_S : uart send data */
-        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type;
-        irq_desc[M32R_IRQ_SIO0_S].action = 0;
-        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO0_S].icucr = 0;
         disable_mappi_irq(M32R_IRQ_SIO0_S);
 
         /* SIO1_R : uart receive data */
-        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type;
-        irq_desc[M32R_IRQ_SIO1_R].action = 0;
-        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO1_R].icucr = 0;
         disable_mappi_irq(M32R_IRQ_SIO1_R);
 
         /* SIO1_S : uart send data */
-        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type;
-        irq_desc[M32R_IRQ_SIO1_S].action = 0;
-        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
+        set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type,
+                                 handle_level_irq);
         icu_data[M32R_IRQ_SIO1_S].icucr = 0;
         disable_mappi_irq(M32R_IRQ_SIO1_S);
 #endif  /* CONFIG_SERIAL_M32R_SIO */
 
         /* INT#67-#71: CFC#0 IREQ on PLD */
         for (i = 0 ; i < CONFIG_M32R_CFC_NUM ; i++ ) {
-                irq_desc[PLD_IRQ_CF0 + i].status = IRQ_DISABLED;
-                irq_desc[PLD_IRQ_CF0 + i].chip = &m32700ut_pld_irq_type;
-                irq_desc[PLD_IRQ_CF0 + i].action = 0;
-                irq_desc[PLD_IRQ_CF0 + i].depth = 1;    /* disable nested irq */
+                set_irq_chip_and_handler(PLD_IRQ_CF0 + i,
+                                         &m32700ut_pld_irq_type,
+                                         handle_level_irq);
                 pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr
                         = PLD_ICUCR_ISMOD01;    /* 'L' level sense */
                 disable_m32700ut_pld_irq(PLD_IRQ_CF0 + i);
@@ -210,19 +181,15 @@ void __init init_IRQ(void)
 
 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
         /* INT#76: 16552D#0 IREQ on PLD */
-        irq_desc[PLD_IRQ_UART0].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_UART0].chip = &m32700ut_pld_irq_type;
-        irq_desc[PLD_IRQ_UART0].action = 0;
-        irq_desc[PLD_IRQ_UART0].depth = 1;      /* disable nested irq */
+        set_irq_chip_and_handler(PLD_IRQ_UART0, &m32700ut_pld_irq_type,
+                                 handle_level_irq);
         pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr
                 = PLD_ICUCR_ISMOD03;    /* 'H' level sense */
         disable_m32700ut_pld_irq(PLD_IRQ_UART0);
 
         /* INT#77: 16552D#1 IREQ on PLD */
-        irq_desc[PLD_IRQ_UART1].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_UART1].chip = &m32700ut_pld_irq_type;
-        irq_desc[PLD_IRQ_UART1].action = 0;
-        irq_desc[PLD_IRQ_UART1].depth = 1;      /* disable nested irq */
+        set_irq_chip_and_handler(PLD_IRQ_UART1, &m32700ut_pld_irq_type,
+                                 handle_level_irq);
         pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr
                 = PLD_ICUCR_ISMOD03;    /* 'H' level sense */
         disable_m32700ut_pld_irq(PLD_IRQ_UART1);
@@ -230,10 +197,8 @@ void __init init_IRQ(void)
 
 #if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE)
         /* INT#80: AK4524 IREQ on PLD */
-        irq_desc[PLD_IRQ_SNDINT].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_SNDINT].chip = &m32700ut_pld_irq_type;
-        irq_desc[PLD_IRQ_SNDINT].action = 0;
-        irq_desc[PLD_IRQ_SNDINT].depth = 1;     /* disable nested irq */
+        set_irq_chip_and_handler(PLD_IRQ_SNDINT, &m32700ut_pld_irq_type,
+                                 handle_level_irq);
         pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr
                 = PLD_ICUCR_ISMOD01;    /* 'L' level sense */
         disable_m32700ut_pld_irq(PLD_IRQ_SNDINT);
diff --git a/arch/m68k/include/asm/cacheflush_no.h b/arch/m68k/include/asm/cacheflush_no.h
index 7085bd51668b..cb88aa96c4f1 100644
--- a/arch/m68k/include/asm/cacheflush_no.h
+++ b/arch/m68k/include/asm/cacheflush_no.h
@@ -2,21 +2,22 @@
 #define _M68KNOMMU_CACHEFLUSH_H
 
 /*
- * (C) Copyright 2000-2004, Greg Ungerer <gerg@snapgear.com>
+ * (C) Copyright 2000-2010, Greg Ungerer <gerg@snapgear.com>
  */
 #include <linux/mm.h>
+#include <asm/mcfsim.h>
 
 #define flush_cache_all()                       __flush_cache_all()
 #define flush_cache_mm(mm)                      do { } while (0)
 #define flush_cache_dup_mm(mm)                  do { } while (0)
-#define flush_cache_range(vma, start, end)      __flush_cache_all()
+#define flush_cache_range(vma, start, end)      do { } while (0)
 #define flush_cache_page(vma, vmaddr)           do { } while (0)
-#define flush_dcache_range(start,len)           __flush_cache_all()
+#define flush_dcache_range(start, len)          __flush_dcache_all()
 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
 #define flush_dcache_page(page)                 do { } while (0)
 #define flush_dcache_mmap_lock(mapping)         do { } while (0)
 #define flush_dcache_mmap_unlock(mapping)       do { } while (0)
-#define flush_icache_range(start,len)           __flush_cache_all()
+#define flush_icache_range(start, len)          __flush_icache_all()
 #define flush_icache_page(vma,pg)               do { } while (0)
 #define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
 #define flush_cache_vmap(start, end)            do { } while (0)
@@ -27,66 +28,52 @@
 #define copy_from_user_page(vma, page, vaddr, dst, src, len) \
         memcpy(dst, src, len)
 
+void mcf_cache_push(void);
+
 static inline void __flush_cache_all(void)
 {
-#if defined(CONFIG_M5407) || defined(CONFIG_M548x)
-        /*
-         *      Use cpushl to push and invalidate all cache lines.
-         *      Gas doesn't seem to know how to generate the ColdFire
-         *      cpushl instruction... Oh well, bit stuff it for now.
-         */
-        __asm__ __volatile__ (
-                "nop\n\t"
-                "clrl   %%d0\n\t"
-                "1:\n\t"
-                "movel  %%d0,%%a0\n\t"
-                "2:\n\t"
-                ".word  0xf468\n\t"
-                "addl   #0x10,%%a0\n\t"
-                "cmpl   #0x00000800,%%a0\n\t"
-                "blt    2b\n\t"
-                "addql  #1,%%d0\n\t"
-                "cmpil  #4,%%d0\n\t"
-                "bne    1b\n\t"
-                "movel  #0xb6088500,%%d0\n\t"
-                "movec  %%d0,%%CACR\n\t"
-                : : : "d0", "a0" );
-#endif /* CONFIG_M5407 */
-#if defined(CONFIG_M523x) || defined(CONFIG_M527x)
-        __asm__ __volatile__ (
-                "movel  #0x81400100, %%d0\n\t"
-                "movec  %%d0, %%CACR\n\t"
-                "nop\n\t"
-                : : : "d0" );
-#endif /* CONFIG_M523x || CONFIG_M527x */
-#if defined(CONFIG_M528x)
-        __asm__ __volatile__ (
-                "movel  #0x81000200, %%d0\n\t"
-                "movec  %%d0, %%CACR\n\t"
-                "nop\n\t"
-                : : : "d0" );
-#endif /* CONFIG_M528x */
-#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || defined(CONFIG_M5272)
+#ifdef CACHE_PUSH
+        mcf_cache_push();
+#endif
+#ifdef CACHE_INVALIDATE
         __asm__ __volatile__ (
-                "movel  #0x81000100, %%d0\n\t"
+                "movel  %0, %%d0\n\t"
                 "movec  %%d0, %%CACR\n\t"
                 "nop\n\t"
-                : : : "d0" );
-#endif /* CONFIG_M5206 || CONFIG_M5206e || CONFIG_M5272 */
-#ifdef CONFIG_M5249
+                : : "i" (CACHE_INVALIDATE) : "d0" );
+#endif
+}
+
+/*
+ * Some ColdFire parts implement separate instruction and data caches,
+ * on those we should just flush the appropriate cache. If we don't need
+ * to do any specific flushing then this will be optimized away.
+ */
+static inline void __flush_icache_all(void)
+{
+#ifdef CACHE_INVALIDATEI
         __asm__ __volatile__ (
-                "movel  #0xa1000200, %%d0\n\t"
+                "movel  %0, %%d0\n\t"
                 "movec  %%d0, %%CACR\n\t"
                 "nop\n\t"
-                : : : "d0" );
-#endif /* CONFIG_M5249 */
-#ifdef CONFIG_M532x
+                : : "i" (CACHE_INVALIDATEI) : "d0" );
+#endif
+}
+
+static inline void __flush_dcache_all(void)
+{
+#ifdef CACHE_PUSH
+        mcf_cache_push();
+#endif
+#ifdef CACHE_INVALIDATED
         __asm__ __volatile__ (
-                "movel  #0x81000200, %%d0\n\t"
+                "movel  %0, %%d0\n\t"
                 "movec  %%d0, %%CACR\n\t"
                 "nop\n\t"
-                : : : "d0" );
-#endif /* CONFIG_M532x */
+                : : "i" (CACHE_INVALIDATED) : "d0" );
+#else
+        /* Flush the wrtite buffer */
+        __asm__ __volatile__ ( "nop" );
+#endif
 }
-
 #endif /* _M68KNOMMU_CACHEFLUSH_H */
diff --git a/arch/m68k/include/asm/coldfire.h b/arch/m68k/include/asm/coldfire.h
index 3b0a34d0fe33..213028cbe110 100644
--- a/arch/m68k/include/asm/coldfire.h
+++ b/arch/m68k/include/asm/coldfire.h
@@ -32,7 +32,7 @@
  */
 #define MCF_MBAR        0x10000000
 #define MCF_MBAR2       0x80000000
-#if defined(CONFIG_M548x)
+#if defined(CONFIG_M54xx)
 #define MCF_IPSBAR      MCF_MBAR
 #elif defined(CONFIG_M520x)
 #define MCF_IPSBAR      0xFC000000
diff --git a/arch/m68k/include/asm/entry_no.h b/arch/m68k/include/asm/entry_no.h
index 26be277394f9..627d69bacc58 100644
--- a/arch/m68k/include/asm/entry_no.h
+++ b/arch/m68k/include/asm/entry_no.h
@@ -42,12 +42,16 @@
  */
 
 #ifdef CONFIG_COLDFIRE
+#ifdef CONFIG_COLDFIRE_SW_A7
 /*
- * This is made a little more tricky on the ColdFire. There is no
- * separate kernel and user stack pointers. Need to artificially
+ * This is made a little more tricky on older ColdFires. There is no
+ * separate supervisor and user stack pointers. Need to artificially
  * construct a usp in software... When doing this we need to disable
- * interrupts, otherwise bad things could happen.
+ * interrupts, otherwise bad things will happen.
  */
+.globl sw_usp
+.globl sw_ksp
+
 .macro SAVE_ALL
         move    #0x2700,%sr             /* disable intrs */
         btst    #5,%sp@(2)              /* from user? */
@@ -74,9 +78,7 @@
         7:
 .endm
 
-.macro RESTORE_ALL
-        btst    #5,%sp@(PT_SR)          /* going user? */
-        bnes    8f                      /* no, skip */
+.macro RESTORE_USER
         move    #0x2700,%sr             /* disable intrs */
         movel   sw_usp,%a0              /* get usp */
         movel   %sp@(PT_OFF_PC),%a0@-   /* copy exception program counter */
@@ -91,19 +93,22 @@
         subql   #8,sw_usp               /* set exception */
         movel   sw_usp,%sp              /* restore usp */
         rte
-        8:
-        moveml  %sp@,%d1-%d5/%a0-%a2
-        lea     %sp@(32),%sp            /* space for 8 regs */
-        movel   %sp@+,%d0
-        addql   #4,%sp                  /* orig d0 */
-        addl    %sp@+,%sp               /* stkadj */
-        rte
 .endm
 
+.macro RDUSP
+        movel   sw_usp,%a2
+.endm
+
+.macro WRUSP
+        movel   %a0,sw_usp
+.endm
+
+#else /* !CONFIG_COLDFIRE_SW_A7 */
 /*
- * Quick exception save, use current stack only.
+ * Modern ColdFire parts have separate supervisor and user stack
+ * pointers. Simple load and restore macros for this case.
  */
-.macro SAVE_LOCAL
+.macro SAVE_ALL
         move    #0x2700,%sr             /* disable intrs */
         clrl    %sp@-                   /* stkadj */
         movel   %d0,%sp@-               /* orig d0 */
@@ -112,7 +117,7 @@
         moveml  %d1-%d5/%a0-%a2,%sp@
 .endm
 
-.macro RESTORE_LOCAL
+.macro RESTORE_USER
         moveml  %sp@,%d1-%d5/%a0-%a2
         lea     %sp@(32),%sp            /* space for 8 regs */
         movel   %sp@+,%d0
@@ -121,6 +126,18 @@
         rte
 .endm
 
+.macro RDUSP
+        /*move  %usp,%a2*/
+        .word   0x4e6a
+.endm
+
+.macro WRUSP
+        /*move  %a0,%usp*/
+        .word   0x4e60
+.endm
+
+#endif /* !CONFIG_COLDFIRE_SW_A7 */
+
 .macro SAVE_SWITCH_STACK
         lea     %sp@(-24),%sp           /* 6 regs */
         moveml  %a3-%a6/%d6-%d7,%sp@
@@ -131,14 +148,6 @@
         lea     %sp@(24),%sp            /* 6 regs */
 .endm
 
-/*
- * Software copy of the user and kernel stack pointers... Ugh...
- * Need these to get around ColdFire not having separate kernel
- * and user stack pointers.
- */
-.globl sw_usp
-.globl sw_ksp
-
 #else /* !CONFIG_COLDFIRE */
 
 /*
@@ -167,6 +176,6 @@
         moveml  %sp@+,%a3-%a6/%d6-%d7
 .endm
 
-#endif /* !CONFIG_COLDFIRE */
+#endif /* !COLDFIRE_SW_A7 */
 #endif /* __ASSEMBLY__ */
 #endif /* __M68KNOMMU_ENTRY_H */
diff --git a/arch/m68k/include/asm/gpio.h b/arch/m68k/include/asm/gpio.h
index 1b57adbafad5..c64c7b74cf86 100644
--- a/arch/m68k/include/asm/gpio.h
+++ b/arch/m68k/include/asm/gpio.h
@@ -37,7 +37,7 @@
 #if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
     defined(CONFIG_M520x) || defined(CONFIG_M523x) || \
     defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
-    defined(CONFIG_M532x) || defined(CONFIG_M548x)
+    defined(CONFIG_M532x) || defined(CONFIG_M54xx)
 
 /* These parts have GPIO organized by 8 bit ports */
 
diff --git a/arch/m68k/include/asm/io_no.h b/arch/m68k/include/asm/io_no.h
index 6e2413e518cb..cf20f3097af6 100644
--- a/arch/m68k/include/asm/io_no.h
+++ b/arch/m68k/include/asm/io_no.h
@@ -145,7 +145,6 @@ static inline void io_insl(unsigned int addr, void *buf, int len)
 #define IOMAP_WRITETHROUGH              3
 
 extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag);
-extern void __iounmap(void *addr, unsigned long size);
 
 static inline void *ioremap(unsigned long physaddr, unsigned long size)
 {
diff --git a/arch/m68k/include/asm/m5206sim.h b/arch/m68k/include/asm/m5206sim.h
index 9c384e294af9..561b03b5ddf8 100644
--- a/arch/m68k/include/asm/m5206sim.h
+++ b/arch/m68k/include/asm/m5206sim.h
@@ -12,6 +12,10 @@
 #define m5206sim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m5206)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m52xxacr.h>
 
 /*
  *      Define the 5206 SIM register set addresses.
@@ -88,6 +92,14 @@
 #define MCFSIM_PADDR            (MCF_MBAR + 0x1c5)      /* Parallel Direction (r/w) */
 #define MCFSIM_PADAT            (MCF_MBAR + 0x1c9)      /* Parallel Port Value (r/w) */
 
+#if defined(CONFIG_NETtel)
+#define MCFUART_BASE1           0x180           /* Base address of UART1 */
+#define MCFUART_BASE2           0x140           /* Base address of UART2 */
+#else
+#define MCFUART_BASE1           0x140           /* Base address of UART1 */
+#define MCFUART_BASE2           0x180           /* Base address of UART2 */
+#endif
+
 /*
  *      Define system peripheral IRQ usage.
  */
@@ -95,7 +107,7 @@
 #define MCF_IRQ_PROFILER        31              /* Timer1, Level 7 */
 
 /*
- * Generic GPIO
+ *      Generic GPIO
  */
 #define MCFGPIO_PIN_MAX         8
 #define MCFGPIO_IRQ_VECBASE     -1
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h
index db824a4b136e..88ed8239fe4e 100644
--- a/arch/m68k/include/asm/m520xsim.h
+++ b/arch/m68k/include/asm/m520xsim.h
@@ -11,6 +11,11 @@
 #define m520xsim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m520x)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m52xxacr.h>
+
 /*
  *  Define the 520x SIM register set addresses.
  */
@@ -54,6 +59,9 @@
 #define MCFSIM_SDCS0        0x000a8110  /* SDRAM Chip Select 0 Configuration */
 #define MCFSIM_SDCS1        0x000a8114  /* SDRAM Chip Select 1 Configuration */
 
+/*
+ * EPORT and GPIO registers.
+ */
 #define MCFEPORT_EPDDR                  0xFC088002
 #define MCFEPORT_EPDR                   0xFC088004
 #define MCFEPORT_EPPDR                  0xFC088005
@@ -97,6 +105,7 @@
 #define MCFGPIO_PCLRR_UART              0xFC0A402A
 #define MCFGPIO_PCLRR_FECH              0xFC0A402B
 #define MCFGPIO_PCLRR_FECL              0xFC0A402C
+
 /*
  * Generic GPIO support
  */
@@ -109,7 +118,6 @@
 #define MCFGPIO_PIN_MAX                 80
 #define MCFGPIO_IRQ_MAX                 8
 #define MCFGPIO_IRQ_VECBASE             MCFINT_VECBASE
-/****************************************************************************/
 
 #define MCF_GPIO_PAR_UART                   (0xA4036)
 #define MCF_GPIO_PAR_FECI2C                 (0xA4033)
@@ -126,6 +134,13 @@
 #define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2   (0x04)
 
 /*
+ *  UART module.
+ */
+#define MCFUART_BASE1           0x60000         /* Base address of UART1 */
+#define MCFUART_BASE2           0x64000         /* Base address of UART2 */
+#define MCFUART_BASE3           0x68000         /* Base address of UART2 */
+
+/*
  *  Reset Controll Unit.
  */
 #define MCF_RCR                 0xFC0A0000
diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h
index e8d06b24a48e..4ad7a00257a8 100644
--- a/arch/m68k/include/asm/m523xsim.h
+++ b/arch/m68k/include/asm/m523xsim.h
@@ -11,6 +11,10 @@
 #define m523xsim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m523x)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m52xxacr.h>
 
 /*
  *      Define the 523x SIM register set addresses.
@@ -50,6 +54,13 @@
 #define MCF_RCR_SWRESET         0x80            /* Software reset bit */
 #define MCF_RCR_FRCSTOUT        0x40            /* Force external reset */
 
+/*
+ *  UART module.
+ */
+#define MCFUART_BASE1           0x200           /* Base address of UART1 */
+#define MCFUART_BASE2           0x240           /* Base address of UART2 */
+#define MCFUART_BASE3           0x280           /* Base address of UART3 */
+
 #define MCFGPIO_PODR_ADDR       (MCF_IPSBAR + 0x100000)
 #define MCFGPIO_PODR_DATAH      (MCF_IPSBAR + 0x100001)
 #define MCFGPIO_PODR_DATAL      (MCF_IPSBAR + 0x100002)
diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h
index 79b7b402f3c9..4908b118f2fd 100644
--- a/arch/m68k/include/asm/m5249sim.h
+++ b/arch/m68k/include/asm/m5249sim.h
@@ -11,6 +11,11 @@
 #define m5249sim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m5249)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m52xxacr.h>
+
 /*
  *      Define the 5249 SIM register set addresses.
  */
@@ -56,6 +61,11 @@
 #define MCFSIM_DACR1            0x110           /* DRAM 1 Addr and Ctrl (r/w) */
 #define MCFSIM_DMR1             0x114           /* DRAM 1 Mask reg (r/w) */
 
+/*
+ *      UART module.
+ */
+#define MCFUART_BASE1           0x1c0           /* Base address of UART1 */
+#define MCFUART_BASE2           0x200           /* Base address of UART2 */
 
 /*
  *      Some symbol defines for the above...
diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h
index df3332c2317d..b7cc50abc831 100644
--- a/arch/m68k/include/asm/m5272sim.h
+++ b/arch/m68k/include/asm/m5272sim.h
@@ -12,6 +12,11 @@
 #define m5272sim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m5272)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m52xxacr.h>
+
 /*
  *      Define the 5272 SIM register set addresses.
  */
@@ -62,6 +67,9 @@
 #define MCFSIM_DCMR1            0x5c            /* DRAM 1 Mask reg (r/w) */
 #define MCFSIM_DCCR1            0x63            /* DRAM 1 Control reg (r/w) */
 
+#define MCFUART_BASE1           0x100           /* Base address of UART1 */
+#define MCFUART_BASE2           0x140           /* Base address of UART2 */
+
 #define MCFSIM_PACNT            (MCF_MBAR + 0x80) /* Port A Control (r/w) */
 #define MCFSIM_PADDR            (MCF_MBAR + 0x84) /* Port A Direction (r/w) */
 #define MCFSIM_PADAT            (MCF_MBAR + 0x86) /* Port A Data (r/w) */
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index 1feb46f108ce..e8042e8bc003 100644
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -11,6 +11,10 @@
 #define m527xsim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m527x)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m52xxacr.h>
 
 /*
  *      Define the 5270/5271 SIM register set addresses.
@@ -55,6 +59,12 @@
 #define MCFSIM_DMR1             0x5c            /* SDRAM address mask 1 */
 #endif
 
+/*
+ *      UART module.
+ */
+#define MCFUART_BASE1           0x200           /* Base address of UART1 */
+#define MCFUART_BASE2           0x240           /* Base address of UART2 */
+#define MCFUART_BASE3           0x280           /* Base address of UART3 */
 
 #ifdef CONFIG_M5271
 #define MCFGPIO_PODR_ADDR       (MCF_IPSBAR + 0x100000)
diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h
index 891cbedad972..a6d2f4d9aaa0 100644
--- a/arch/m68k/include/asm/m528xsim.h
+++ b/arch/m68k/include/asm/m528xsim.h
@@ -11,6 +11,10 @@
 #define m528xsim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m528x)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m52xxacr.h>
 
 /*
  *      Define the 5280/5282 SIM register set addresses.
@@ -42,6 +46,13 @@
 #define MCFSIM_DMR1             0x54            /* SDRAM address mask 1 */
 
 /*
+ *      UART module.
+ */
+#define MCFUART_BASE1           0x200           /* Base address of UART1 */
+#define MCFUART_BASE2           0x240           /* Base address of UART2 */
+#define MCFUART_BASE3           0x280           /* Base address of UART3 */
+
+/*
  *      GPIO registers
  */
 #define MCFGPIO_PORTA           (MCF_IPSBAR + 0x00100000)
diff --git a/arch/m68k/include/asm/m52xxacr.h b/arch/m68k/include/asm/m52xxacr.h
new file mode 100644
index 000000000000..abc391a9ae8d
--- /dev/null
+++ b/arch/m68k/include/asm/m52xxacr.h
@@ -0,0 +1,94 @@
+/****************************************************************************/
+
+/*
+ * m52xxacr.h -- ColdFire version 2 core cache support
+ *
+ * (C) Copyright 2010, Greg Ungerer <gerg@snapgear.com>
+ */
+
+/****************************************************************************/
+#ifndef m52xxacr_h
+#define m52xxacr_h
+/****************************************************************************/
+
+/*
+ * All varients of the ColdFire using version 2 cores have a similar
+ * cache setup. Although not absolutely identical the cache register
+ * definitions are compatible for all of them. Mostly they support a
+ * configurable cache memory that can be instruction only, data only,
+ * or split instruction and data. The exception is the very old version 2
+ * core based parts, like the 5206(e), 5249 and 5272, which are instruction
+ * cache only. Cache size varies from 2k up to 16k.
+ */
+
+/*
+ * Define the Cache Control register flags.
+ */
+#define CACR_CENB       0x80000000      /* Enable cache */
+#define CACR_CDPI       0x10000000      /* Disable invalidation by CPUSHL */
+#define CACR_CFRZ       0x08000000      /* Cache freeze mode */
+#define CACR_CINV       0x01000000      /* Invalidate cache */
+#define CACR_DISI       0x00800000      /* Disable instruction cache */
+#define CACR_DISD       0x00400000      /* Disable data cache */
+#define CACR_INVI       0x00200000      /* Invalidate instruction cache */
+#define CACR_INVD       0x00100000      /* Invalidate data cache */
+#define CACR_CEIB       0x00000400      /* Non-cachable instruction burst */
+#define CACR_DCM        0x00000200      /* Default cache mode */
+#define CACR_DBWE       0x00000100      /* Buffered write enable */
+#define CACR_DWP        0x00000020      /* Write protection */
+#define CACR_EUSP       0x00000010      /* Enable separate user a7 */
+
+/*
+ * Define the Access Control register flags.
+ */
+#define ACR_BASE_POS    24              /* Address Base (upper 8 bits) */
+#define ACR_MASK_POS    16              /* Address Mask (next 8 bits) */
+#define ACR_ENABLE      0x00008000      /* Enable this ACR */
+#define ACR_USER        0x00000000      /* Allow only user accesses */
+#define ACR_SUPER       0x00002000      /* Allow supervisor access only */
+#define ACR_ANY         0x00004000      /* Allow any access type */
+#define ACR_CENB        0x00000000      /* Caching of region enabled */
+#define ACR_CDIS        0x00000040      /* Caching of region disabled */
+#define ACR_BWE         0x00000020      /* Write buffer enabled */
+#define ACR_WPROTECT    0x00000004      /* Write protect region */
+
+/*
+ * Set the cache controller settings we will use. On the cores that support
+ * a split cache configuration we allow all the combinations at Kconfig
+ * time. For those cores that only have an instruction cache we just set
+ * that as on.
+ */
+#if defined(CONFIG_CACHE_I)
+#define CACHE_TYPE      (CACR_DISD + CACR_EUSP)
+#define CACHE_INVTYPEI  0
+#elif defined(CONFIG_CACHE_D)
+#define CACHE_TYPE      (CACR_DISI + CACR_EUSP)
+#define CACHE_INVTYPED  0
+#elif defined(CONFIG_CACHE_BOTH)
+#define CACHE_TYPE      CACR_EUSP
+#define CACHE_INVTYPEI  CACR_INVI
+#define CACHE_INVTYPED  CACR_INVD
+#else
+/* This is the instruction cache only devices (no split cache, no eusp) */
+#define CACHE_TYPE      0
+#define CACHE_INVTYPEI  0
+#endif
+
+#define CACHE_INIT      (CACR_CINV + CACHE_TYPE)
+#define CACHE_MODE      (CACR_CENB + CACHE_TYPE + CACR_DCM)
+
+#define CACHE_INVALIDATE  (CACHE_MODE + CACR_CINV)
+#if defined(CACHE_INVTYPEI)
+#define CACHE_INVALIDATEI (CACHE_MODE + CACR_CINV + CACHE_INVTYPEI)
+#endif
+#if defined(CACHE_INVTYPED)
+#define CACHE_INVALIDATED (CACHE_MODE + CACR_CINV + CACHE_INVTYPED)
+#endif
+
+#define ACR0_MODE       ((CONFIG_RAMBASE & 0xff000000) + \
+                         (0x000f0000) + \
+                         (ACR_ENABLE + ACR_ANY + ACR_CENB + ACR_BWE))
+#define ACR1_MODE       0
+
+/****************************************************************************/
+#endif  /* m52xxsim_h */
diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h
index c6830e5b54ce..0bf57397e7a9 100644
--- a/arch/m68k/include/asm/m5307sim.h
+++ b/arch/m68k/include/asm/m5307sim.h
@@ -14,6 +14,11 @@
 #define m5307sim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m5307)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m53xxacr.h>
+
 /*
  *      Define the 5307 SIM register set addresses.
  */
@@ -94,6 +99,17 @@
 #define MCFSIM_PADAT            (MCF_MBAR + 0x248)
 
 /*
+ *  UART module.
+ */
+#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
+#define MCFUART_BASE1           0x200           /* Base address of UART1 */
+#define MCFUART_BASE2           0x1c0           /* Base address of UART2 */
+#else
+#define MCFUART_BASE1           0x1c0           /* Base address of UART1 */
+#define MCFUART_BASE2           0x200           /* Base address of UART2 */
+#endif
+
+/*
  * Generic GPIO support
  */
 #define MCFGPIO_PIN_MAX                 16
@@ -146,32 +162,5 @@
 #define MCF_IRQ_TIMER           30              /* Timer0, Level 6 */
 #define MCF_IRQ_PROFILER        31              /* Timer1, Level 7 */
 
-/*
- *      Define the Cache register flags.
- */
-#define CACR_EC                 (1<<31)
-#define CACR_ESB                (1<<29)
-#define CACR_DPI                (1<<28)
-#define CACR_HLCK               (1<<27)
-#define CACR_CINVA              (1<<24)
-#define CACR_DNFB               (1<<10)
-#define CACR_DCM_WTHRU          (0<<8)
-#define CACR_DCM_WBACK          (1<<8)
-#define CACR_DCM_OFF_PRE        (2<<8)
-#define CACR_DCM_OFF_IMP        (3<<8)
-#define CACR_DW                 (1<<5)
-
-#define ACR_BASE_POS            24
-#define ACR_MASK_POS            16
-#define ACR_ENABLE              (1<<15)
-#define ACR_USER                (0<<13)
-#define ACR_SUPER               (1<<13)
-#define ACR_ANY                 (2<<13)
-#define ACR_CM_WTHRU            (0<<5)
-#define ACR_CM_WBACK            (1<<5)
-#define ACR_CM_OFF_PRE          (2<<5)
-#define ACR_CM_OFF_IMP          (3<<5)
-#define ACR_WPROTECT            (1<<2)
-
 /****************************************************************************/
 #endif  /* m5307sim_h */
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h
index c4bf1c81e3cf..e6470f8ca324 100644
--- a/arch/m68k/include/asm/m532xsim.h
+++ b/arch/m68k/include/asm/m532xsim.h
@@ -9,6 +9,11 @@
 #define m532xsim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m532x)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m53xxacr.h>
+
 #define MCF_REG32(x) (*(volatile unsigned long  *)(x))
 #define MCF_REG16(x) (*(volatile unsigned short *)(x))
 #define MCF_REG08(x) (*(volatile unsigned char  *)(x))
@@ -74,31 +79,11 @@
 #define MCF_IRQ_PROFILER        (64 + 33)       /* Timer1 */
 
 /*
- *      Define the Cache register flags.
+ *  UART module.
  */
-#define CACR_EC                 (1<<31)
-#define CACR_ESB                (1<<29)
-#define CACR_DPI                (1<<28)
-#define CACR_HLCK               (1<<27)
-#define CACR_CINVA              (1<<24)
-#define CACR_DNFB               (1<<10)
-#define CACR_DCM_WTHRU          (0<<8)
-#define CACR_DCM_WBACK          (1<<8)
-#define CACR_DCM_OFF_PRE        (2<<8)
-#define CACR_DCM_OFF_IMP        (3<<8)
-#define CACR_DW                 (1<<5)
-
-#define ACR_BASE_POS            24
-#define ACR_MASK_POS            16
-#define ACR_ENABLE              (1<<15)
-#define ACR_USER                (0<<13)
-#define ACR_SUPER               (1<<13)
-#define ACR_ANY                 (2<<13)
-#define ACR_CM_WTHRU            (0<<5)
-#define ACR_CM_WBACK            (1<<5)
-#define ACR_CM_OFF_PRE          (2<<5)
-#define ACR_CM_OFF_IMP          (3<<5)
-#define ACR_WPROTECT            (1<<2)
+#define MCFUART_BASE1           0xFC060000      /* Base address of UART1 */
+#define MCFUART_BASE2           0xFC064000      /* Base address of UART2 */
+#define MCFUART_BASE3           0xFC068000      /* Base address of UART3 */
 
 /*********************************************************************
  *
diff --git a/arch/m68k/include/asm/m53xxacr.h b/arch/m68k/include/asm/m53xxacr.h
new file mode 100644
index 000000000000..cd952b0a8bd3
--- /dev/null
+++ b/arch/m68k/include/asm/m53xxacr.h
@@ -0,0 +1,101 @@
+/****************************************************************************/
+
+/*
+ * m53xxacr.h -- ColdFire version 3 core cache support
+ *
+ * (C) Copyright 2010, Greg Ungerer <gerg@snapgear.com>
+ */
+
+/****************************************************************************/
+#ifndef m53xxacr_h
+#define m53xxacr_h
+/****************************************************************************/
+
+/*
+ * All varients of the ColdFire using version 3 cores have a similar
+ * cache setup. They have a unified instruction and data cache, with
+ * configurable write-through or copy-back operation.
+ */
+
+/*
+ * Define the Cache Control register flags.
+ */
+#define CACR_EC         0x80000000      /* Enable cache */
+#define CACR_ESB        0x20000000      /* Enable store buffer */
+#define CACR_DPI        0x10000000      /* Disable invalidation by CPUSHL */
+#define CACR_HLCK       0x08000000      /* Half cache lock mode */
+#define CACR_CINVA      0x01000000      /* Invalidate cache */
+#define CACR_DNFB       0x00000400      /* Inhibited fill buffer */
+#define CACR_DCM_WT     0x00000000      /* Cacheable write-through */
+#define CACR_DCM_CB     0x00000100      /* Cacheable copy-back */
+#define CACR_DCM_PRE    0x00000200      /* Cache inhibited, precise */
+#define CACR_DCM_IMPRE  0x00000300      /* Cache inhibited, imprecise */
+#define CACR_WPROTECT   0x00000020      /* Write protect*/
+#define CACR_EUSP       0x00000010      /* Eanble separate user a7 */
+
+/*
+ * Define the Access Control register flags.
+ */
+#define ACR_BASE_POS    24              /* Address Base (upper 8 bits) */
+#define ACR_MASK_POS    16              /* Address Mask (next 8 bits) */
+#define ACR_ENABLE      0x00008000      /* Enable this ACR */
+#define ACR_USER        0x00000000      /* Allow only user accesses */
+#define ACR_SUPER       0x00002000      /* Allow supervisor access only */
+#define ACR_ANY         0x00004000      /* Allow any access type */
+#define ACR_CM_WT       0x00000000      /* Cacheable, write-through */
+#define ACR_CM_CB       0x00000020      /* Cacheable, copy-back */
+#define ACR_CM_PRE      0x00000040      /* Cache inhibited, precise */
+#define ACR_CM_IMPRE    0x00000060      /* Cache inhibited, imprecise */
+#define ACR_WPROTECT    0x00000004      /* Write protect region */
+
+/*
+ * Define the cache type and arrangement (needed for pushes).
+ */
+#if defined(CONFIG_M5307)
+#define CACHE_SIZE      0x2000          /* 8k of unified cache */
+#define ICACHE_SIZE     CACHE_SIZE
+#define DCACHE_SIZE     CACHE_SIZE
+#elif defined(CONFIG_M532x)
+#define CACHE_SIZE      0x4000          /* 32k of unified cache */
+#define ICACHE_SIZE     CACHE_SIZE
+#define DCACHE_SIZE     CACHE_SIZE
+#endif
+
+#define CACHE_LINE_SIZE 16              /* 16 byte line size */
+#define CACHE_WAYS      4               /* 4 ways - set associative */
+
+/*
+ * Set the cache controller settings we will use. This default in the
+ * CACR is cache inhibited, we use the ACR register to set cacheing
+ * enabled on the regions we want (eg RAM).
+ */
+#if defined(CONFIG_CACHE_COPYBACK)
+#define CACHE_TYPE      ACR_CM_CB
+#define CACHE_PUSH
+#else
+#define CACHE_TYPE      ACR_CM_WT
+#endif
+
+#ifdef CONFIG_COLDFIRE_SW_A7
+#define CACHE_MODE      (CACR_EC + CACR_ESB + CACR_DCM_PRE)
+#else
+#define CACHE_MODE      (CACR_EC + CACR_ESB + CACR_DCM_PRE + CACR_EUSP)
+#endif
+
+/*
+ * Unified cache means we will never need to flush for coherency of
+ * instruction fetch. We will need to flush to maintain memory/DMA
+ * coherency though in all cases. And for copyback caches we will need
+ * to push cached data as well.
+ */
+#define CACHE_INIT        CACR_CINVA
+#define CACHE_INVALIDATE  CACR_CINVA
+#define CACHE_INVALIDATED CACR_CINVA
+
+#define ACR0_MODE       ((CONFIG_RAMBASE & 0xff000000) + \
+                         (0x000f0000) + \
+                         (ACR_ENABLE + ACR_ANY + CACHE_TYPE))
+#define ACR1_MODE       0
+
+/****************************************************************************/
+#endif  /* m53xxsim_h */
diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h
index c399abbf953c..75f5c28a551d 100644
--- a/arch/m68k/include/asm/m5407sim.h
+++ b/arch/m68k/include/asm/m5407sim.h
@@ -14,6 +14,11 @@
 #define m5407sim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m5407)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m54xxacr.h>
+
 /*
  *      Define the 5407 SIM register set addresses.
  */
@@ -73,6 +78,9 @@
 #define MCFSIM_DACR1            0x110           /* DRAM 1 Addr and Ctrl (r/w) */
 #define MCFSIM_DMR1             0x114           /* DRAM 1 Mask reg (r/w) */
 
+#define MCFUART_BASE1           0x1c0           /* Base address of UART1 */
+#define MCFUART_BASE2           0x200           /* Base address of UART2 */
+
 #define MCFSIM_PADDR            (MCF_MBAR + 0x244)
 #define MCFSIM_PADAT            (MCF_MBAR + 0x248)
 
@@ -117,39 +125,5 @@
 #define MCF_IRQ_TIMER           30              /* Timer0, Level 6 */
 #define MCF_IRQ_PROFILER        31              /* Timer1, Level 7 */
 
-/*
- *      Define the Cache register flags.
- */
-#define CACR_DEC                0x80000000      /* Enable data cache */
-#define CACR_DWP                0x40000000      /* Data write protection */
-#define CACR_DESB               0x20000000      /* Enable data store buffer */
-#define CACR_DDPI               0x10000000      /* Disable CPUSHL */
-#define CACR_DHCLK              0x08000000      /* Half data cache lock mode */
-#define CACR_DDCM_WT            0x00000000      /* Write through cache*/
-#define CACR_DDCM_CP            0x02000000      /* Copyback cache */
-#define CACR_DDCM_P             0x04000000      /* No cache, precise */
-#define CACR_DDCM_IMP           0x06000000      /* No cache, imprecise */
-#define CACR_DCINVA             0x01000000      /* Invalidate data cache */
-#define CACR_BEC                0x00080000      /* Enable branch cache */
-#define CACR_BCINVA             0x00040000      /* Invalidate branch cache */
-#define CACR_IEC                0x00008000      /* Enable instruction cache */
-#define CACR_DNFB               0x00002000      /* Inhibited fill buffer */
-#define CACR_IDPI               0x00001000      /* Disable CPUSHL */
-#define CACR_IHLCK              0x00000800      /* Intruction cache half lock */
-#define CACR_IDCM               0x00000400      /* Intruction cache inhibit */
-#define CACR_ICINVA             0x00000100      /* Invalidate instr cache */
-
-#define ACR_BASE_POS            24              /* Address Base */
-#define ACR_MASK_POS            16              /* Address Mask */
-#define ACR_ENABLE              0x00008000      /* Enable address */
-#define ACR_USER                0x00000000      /* User mode access only */
-#define ACR_SUPER               0x00002000      /* Supervisor mode only */
-#define ACR_ANY                 0x00004000      /* Match any access mode */
-#define ACR_CM_WT               0x00000000      /* Write through mode */
-#define ACR_CM_CP               0x00000020      /* Copyback mode */
-#define ACR_CM_OFF_PRE          0x00000040      /* No cache, precise */
-#define ACR_CM_OFF_IMP          0x00000060      /* No cache, imprecise */
-#define ACR_WPROTECT            0x00000004      /* Write protect */
-
 /****************************************************************************/
 #endif  /* m5407sim_h */
diff --git a/arch/m68k/include/asm/m54xxacr.h b/arch/m68k/include/asm/m54xxacr.h
new file mode 100644
index 000000000000..16a1835f9b2a
--- /dev/null
+++ b/arch/m68k/include/asm/m54xxacr.h
@@ -0,0 +1,97 @@
+/*
+ * Bit definitions for the MCF54xx ACR and CACR registers.
+ */
+
+#ifndef m54xxacr_h
+#define m54xxacr_h
+
+/*
+ *      Define the Cache register flags.
+ */
+#define CACR_DEC        0x80000000      /* Enable data cache */
+#define CACR_DWP        0x40000000      /* Data write protection */
+#define CACR_DESB       0x20000000      /* Enable data store buffer */
+#define CACR_DDPI       0x10000000      /* Disable invalidation by CPUSHL */
+#define CACR_DHCLK      0x08000000      /* Half data cache lock mode */
+#define CACR_DDCM_WT    0x00000000      /* Write through cache*/
+#define CACR_DDCM_CP    0x02000000      /* Copyback cache */
+#define CACR_DDCM_P     0x04000000      /* No cache, precise */
+#define CACR_DDCM_IMP   0x06000000      /* No cache, imprecise */
+#define CACR_DCINVA     0x01000000      /* Invalidate data cache */
+#define CACR_BEC        0x00080000      /* Enable branch cache */
+#define CACR_BCINVA     0x00040000      /* Invalidate branch cache */
+#define CACR_IEC        0x00008000      /* Enable instruction cache */
+#define CACR_DNFB       0x00002000      /* Inhibited fill buffer */
+#define CACR_IDPI       0x00001000      /* Disable CPUSHL */
+#define CACR_IHLCK      0x00000800      /* Intruction cache half lock */
+#define CACR_IDCM       0x00000400      /* Intruction cache inhibit */
+#define CACR_ICINVA     0x00000100      /* Invalidate instr cache */
+#define CACR_EUSP       0x00000020      /* Enable separate user a7 */
+
+#define ACR_BASE_POS    24              /* Address Base */
+#define ACR_MASK_POS    16              /* Address Mask */
+#define ACR_ENABLE      0x00008000      /* Enable address */
+#define ACR_USER        0x00000000      /* User mode access only */
+#define ACR_SUPER       0x00002000      /* Supervisor mode only */
+#define ACR_ANY         0x00004000      /* Match any access mode */
+#define ACR_CM_WT       0x00000000      /* Write through mode */
+#define ACR_CM_CP       0x00000020      /* Copyback mode */
+#define ACR_CM_OFF_PRE  0x00000040      /* No cache, precise */
+#define ACR_CM_OFF_IMP  0x00000060      /* No cache, imprecise */
+#define ACR_CM          0x00000060      /* Cache mode mask */
+#define ACR_WPROTECT    0x00000004      /* Write protect */
+
+#if defined(CONFIG_M5407)
+
+#define ICACHE_SIZE 0x4000      /* instruction - 16k */
+#define DCACHE_SIZE 0x2000      /* data - 8k */
+
+#elif defined(CONFIG_M54xx)
+
+#define ICACHE_SIZE 0x8000      /* instruction - 32k */
+#define DCACHE_SIZE 0x8000      /* data - 32k */
+
+#endif
+
+#define CACHE_LINE_SIZE 0x0010  /* 16 bytes */
+#define CACHE_WAYS 4            /* 4 ways */
+
+/*
+ *      Version 4 cores have a true harvard style separate instruction
+ *      and data cache. Enable data and instruction caches, also enable write
+ *      buffers and branch accelerator.
+ */
+/* attention : enabling CACR_DESB requires a "nop" to flush the store buffer */
+/* use '+' instead of '|' for assembler's sake */
+
+        /* Enable data cache */
+        /* Enable data store buffer */
+        /* outside ACRs : No cache, precise */
+        /* Enable instruction+branch caches */
+#if defined(CONFIG_M5407)
+#define CACHE_MODE (CACR_DEC+CACR_DESB+CACR_DDCM_P+CACR_BEC+CACR_IEC)
+#else
+#define CACHE_MODE (CACR_DEC+CACR_DESB+CACR_DDCM_P+CACR_BEC+CACR_IEC+CACR_EUSP)
+#endif
+#if defined(CONFIG_CACHE_COPYBACK)
+#define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_CP)
+#else
+#define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_WT)
+#endif
+#define INSN_CACHE_MODE (ACR_ENABLE+ACR_ANY)
+
+#define CACHE_INIT      (CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)
+#define CACHE_INVALIDATE  (CACHE_MODE+CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)
+#define CACHE_INVALIDATEI (CACHE_MODE+CACR_BCINVA+CACR_ICINVA)
+#define CACHE_INVALIDATED (CACHE_MODE+CACR_DCINVA)
+#define ACR0_MODE       (0x000f0000+DATA_CACHE_MODE)
+#define ACR1_MODE       0
+#define ACR2_MODE       (0x000f0000+INSN_CACHE_MODE)
+#define ACR3_MODE       0
+
+#if ((DATA_CACHE_MODE & ACR_CM) == ACR_CM_CP)
+/* Copyback cache mode must push dirty cache lines first */
+#define CACHE_PUSH
+#endif
+
+#endif  /* m54xxacr_h */
diff --git a/arch/m68k/include/asm/m548xgpt.h b/arch/m68k/include/asm/m54xxgpt.h
index 33b2eef90f0a..df75dd87ae7a 100644
--- a/arch/m68k/include/asm/m548xgpt.h
+++ b/arch/m68k/include/asm/m54xxgpt.h
@@ -1,13 +1,13 @@
 /*
- * File:        m548xgpt.h
- * Purpose:     Register and bit definitions for the MCF548X
+ * File:        m54xxgpt.h
+ * Purpose:     Register and bit definitions for the MCF54XX
  *
  * Notes:
  *
  */
 
-#ifndef m548xgpt_h
-#define m548xgpt_h
+#ifndef m54xxgpt_h
+#define m54xxgpt_h
 
 /*********************************************************************
 *
@@ -87,4 +87,4 @@
 
 /********************************************************************/
 
-#endif /* m548xgpt_h */
+#endif /* m54xxgpt_h */
diff --git a/arch/m68k/include/asm/m548xsim.h b/arch/m68k/include/asm/m54xxsim.h
index 149135ef30d2..462ae5328441 100644
--- a/arch/m68k/include/asm/m548xsim.h
+++ b/arch/m68k/include/asm/m54xxsim.h
@@ -1,11 +1,16 @@
 /*
- *      m548xsim.h -- ColdFire 547x/548x System Integration Unit support.
+ *      m54xxsim.h -- ColdFire 547x/548x System Integration Unit support.
  */
 
-#ifndef m548xsim_h
-#define m548xsim_h
+#ifndef m54xxsim_h
+#define m54xxsim_h
 
-#define MCFINT_VECBASE      64
+#define CPU_NAME                "COLDFIRE(m54xx)"
+#define CPU_INSTR_PER_JIFFY     2
+
+#include <asm/m54xxacr.h>
+
+#define MCFINT_VECBASE          64
 
 /*
  *      Interrupt Controller Registers
@@ -22,6 +27,14 @@
 #define MCFINTC_ICR0            0x40            /* Base ICR register */
 
 /*
+ *      UART module.
+ */
+#define MCFUART_BASE1           0x8600          /* Base address of UART1 */
+#define MCFUART_BASE2           0x8700          /* Base address of UART2 */
+#define MCFUART_BASE3           0x8800          /* Base address of UART3 */
+#define MCFUART_BASE4           0x8900          /* Base address of UART4 */
+
+/*
  *      Define system peripheral IRQ usage.
  */
 #define MCF_IRQ_TIMER           (64 + 54)       /* Slice Timer 0 */
@@ -52,4 +65,4 @@
 #define MCF_PAR_PSC_RTS_RTS     (0x30)
 #define MCF_PAR_PSC_CANRX       (0x40)
 
-#endif  /* m548xsim_h */
+#endif  /* m54xxsim_h */
diff --git a/arch/m68k/include/asm/mcfcache.h b/arch/m68k/include/asm/mcfcache.h
deleted file mode 100644
index f49dfc09f70a..000000000000
--- a/arch/m68k/include/asm/mcfcache.h
+++ /dev/null
@@ -1,150 +0,0 @@
-/****************************************************************************/
-
-/*
- *      mcfcache.h -- ColdFire CPU cache support code
- *
- *      (C) Copyright 2004, Greg Ungerer <gerg@snapgear.com>
- */
-
-/****************************************************************************/
-#ifndef __M68KNOMMU_MCFCACHE_H
-#define __M68KNOMMU_MCFCACHE_H
-/****************************************************************************/
-
-
-/*
- *      The different ColdFire families have different cache arrangments.
- *      Everything from a small instruction only cache, to configurable
- *      data and/or instruction cache, to unified instruction/data, to 
- *      harvard style separate instruction and data caches.
- */
-
-#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || defined(CONFIG_M5272)
-/*
- *      Simple version 2 core cache. These have instruction cache only,
- *      we just need to invalidate it and enable it.
- */
-.macro CACHE_ENABLE
-        movel   #0x01000000,%d0         /* invalidate cache cmd */
-        movec   %d0,%CACR               /* do invalidate cache */
-        movel   #0x80000100,%d0         /* setup cache mask */
-        movec   %d0,%CACR               /* enable cache */
-.endm
-#endif /* CONFIG_M5206 || CONFIG_M5206e || CONFIG_M5272 */
-
-#if defined(CONFIG_M523x) || defined(CONFIG_M527x)
-/*
- *      New version 2 cores have a configurable split cache arrangement.
- *      For now I am just enabling instruction cache - but ultimately I
- *      think a split instruction/data cache would be better.
- */
-.macro CACHE_ENABLE
-        movel   #0x01400000,%d0
-        movec   %d0,%CACR               /* invalidate cache */
-        nop
-        movel   #0x0000c000,%d0         /* set SDRAM cached only */
-        movec   %d0,%ACR0
-        movel   #0x00000000,%d0         /* no other regions cached */
-        movec   %d0,%ACR1
-        movel   #0x80400100,%d0         /* configure cache */
-        movec   %d0,%CACR               /* enable cache */
-        nop
-.endm
-#endif /* CONFIG_M523x || CONFIG_M527x */
-
-#if defined(CONFIG_M528x)
-.macro CACHE_ENABLE
-        nop
-        movel   #0x01000000, %d0
-        movec   %d0, %CACR              /* Invalidate cache */
-        nop
-        movel   #0x0000c020, %d0        /* Set SDRAM cached only */
-        movec   %d0, %ACR0
-        movel   #0x00000000, %d0        /* No other regions cached */
-        movec   %d0, %ACR1
-        movel   #0x80000200, %d0        /* Setup cache mask */
-        movec   %d0, %CACR              /* Enable cache */
-        nop
-.endm
-#endif /* CONFIG_M528x */
-
-#if defined(CONFIG_M5249) || defined(CONFIG_M5307)
-/*
- *      The version 3 core cache. Oddly enough the version 2 core 5249
- *      has the same SDRAM and cache setup as the version 3 cores.
- *      This is a single unified instruction/data cache.
- */
-.macro CACHE_ENABLE
-        movel   #0x01000000,%d0         /* invalidate whole cache */
-        movec   %d0,%CACR
-        nop
-#if defined(DEBUGGER_COMPATIBLE_CACHE) || defined(CONFIG_SECUREEDGEMP3)
-        movel   #0x0000c000,%d0         /* set SDRAM cached (write-thru) */
-#else
-        movel   #0x0000c020,%d0         /* set SDRAM cached (copyback) */
-#endif
-        movec   %d0,%ACR0
-        movel   #0x00000000,%d0         /* no other regions cached */
-        movec   %d0,%ACR1
-        movel   #0xa0000200,%d0         /* enable cache */
-        movec   %d0,%CACR
-        nop
-.endm
-#endif /* CONFIG_M5249 || CONFIG_M5307 */
-
-#if defined(CONFIG_M532x)
-.macro CACHE_ENABLE
-        movel   #0x01000000,%d0         /* invalidate cache cmd */
-        movec   %d0,%CACR               /* do invalidate cache */
-        nop
-        movel   #0x4001C000,%d0         /* set SDRAM cached (write-thru) */
-        movec   %d0,%ACR0
-        movel   #0x00000000,%d0         /* no other regions cached */
-        movec   %d0,%ACR1
-        movel   #0x80000200,%d0         /* setup cache mask */
-        movec   %d0,%CACR               /* enable cache */
-        nop
-.endm
-#endif /* CONFIG_M532x */
-
-#if defined(CONFIG_M5407) || defined(CONFIG_M548x)
-/*
- *      Version 4 cores have a true harvard style separate instruction
- *      and data cache. Invalidate and enable cache, also enable write
- *      buffers and branch accelerator.
- */
-.macro CACHE_ENABLE
-        movel   #0x01040100,%d0         /* invalidate whole cache */
-        movec   %d0,%CACR
-        nop
-        movel   #0x000fc000,%d0         /* set SDRAM cached only */
-        movec   %d0, %ACR0
-        movel   #0x00000000,%d0         /* no other regions cached */
-        movec   %d0, %ACR1
-        movel   #0x000fc000,%d0         /* set SDRAM cached only */
-        movec   %d0, %ACR2
-        movel   #0x00000000,%d0         /* no other regions cached */
-        movec   %d0, %ACR3
-        movel   #0xb6088400,%d0         /* enable caches */
-        movec   %d0,%CACR
-        nop
-.endm
-#endif /* CONFIG_M5407 */
-
-#if defined(CONFIG_M520x)
-.macro CACHE_ENABLE
-        move.l  #0x01000000,%d0         /* invalidate whole cache */
-        movec   %d0,%CACR
-        nop
-        move.l  #0x0000c000,%d0         /* set SDRAM cached (write-thru) */
-        movec   %d0,%ACR0
-        move.l  #0x00000000,%d0         /* no other regions cached */
-        movec   %d0,%ACR1
-        move.l  #0x80400000,%d0         /* enable 8K instruction cache */
-        movec   %d0,%CACR
-        nop
-.endm
-#endif /* CONFIG_M520x */
-
-/****************************************************************************/
-#endif  /* __M68KNOMMU_MCFCACHE_H */
diff --git a/arch/m68k/include/asm/mcfsim.h b/arch/m68k/include/asm/mcfsim.h
index 6901fd68165b..ebd0304054ad 100644
--- a/arch/m68k/include/asm/mcfsim.h
+++ b/arch/m68k/include/asm/mcfsim.h
@@ -41,8 +41,8 @@
 #elif defined(CONFIG_M5407)
 #include <asm/m5407sim.h>
 #include <asm/mcfintc.h>
-#elif defined(CONFIG_M548x)
-#include <asm/m548xsim.h>
+#elif defined(CONFIG_M54xx)
+#include <asm/m54xxsim.h>
 #endif
 
 /****************************************************************************/
diff --git a/arch/m68k/include/asm/mcfuart.h b/arch/m68k/include/asm/mcfuart.h
index db72e2b889ca..2abedff0a694 100644
--- a/arch/m68k/include/asm/mcfuart.h
+++ b/arch/m68k/include/asm/mcfuart.h
@@ -12,49 +12,6 @@
 #define mcfuart_h
 /****************************************************************************/
 
-/*
- *      Define the base address of the UARTS within the MBAR address
- *      space.
- */
-#if defined(CONFIG_M5272)
-#define MCFUART_BASE1           0x100           /* Base address of UART1 */
-#define MCFUART_BASE2           0x140           /* Base address of UART2 */
-#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e)
-#if defined(CONFIG_NETtel)
-#define MCFUART_BASE1           0x180           /* Base address of UART1 */
-#define MCFUART_BASE2           0x140           /* Base address of UART2 */
-#else
-#define MCFUART_BASE1           0x140           /* Base address of UART1 */
-#define MCFUART_BASE2           0x180           /* Base address of UART2 */
-#endif
-#elif defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x)
-#define MCFUART_BASE1           0x200           /* Base address of UART1 */
-#define MCFUART_BASE2           0x240           /* Base address of UART2 */
-#define MCFUART_BASE3           0x280           /* Base address of UART3 */
-#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
-#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
-#define MCFUART_BASE1           0x200           /* Base address of UART1 */
-#define MCFUART_BASE2           0x1c0           /* Base address of UART2 */
-#else
-#define MCFUART_BASE1           0x1c0           /* Base address of UART1 */
-#define MCFUART_BASE2           0x200           /* Base address of UART2 */
-#endif
-#elif defined(CONFIG_M520x)
-#define MCFUART_BASE1           0x60000         /* Base address of UART1 */
-#define MCFUART_BASE2           0x64000         /* Base address of UART2 */
-#define MCFUART_BASE3           0x68000         /* Base address of UART2 */
-#elif defined(CONFIG_M532x)
-#define MCFUART_BASE1           0xfc060000      /* Base address of UART1 */
-#define MCFUART_BASE2           0xfc064000      /* Base address of UART2 */
-#define MCFUART_BASE3           0xfc068000      /* Base address of UART3 */
-#elif defined(CONFIG_M548x)
-#define MCFUART_BASE1           0x8600          /* on M548x */
-#define MCFUART_BASE2           0x8700          /* on M548x */
-#define MCFUART_BASE3           0x8800          /* on M548x */
-#define MCFUART_BASE4           0x8900          /* on M548x */
-#endif
-
-
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 
@@ -217,7 +174,7 @@ struct mcf_platform_uart {
 #define MCFUART_URF_RXS         0xc0            /* Receiver status */
 #endif
 
-#if defined(CONFIG_M548x)
+#if defined(CONFIG_M54xx)
 #define MCFUART_TXFIFOSIZE      512
 #elif defined(CONFIG_M5272)
 #define MCFUART_TXFIFOSIZE      25
diff --git a/arch/m68k/include/asm/processor.h b/arch/m68k/include/asm/processor.h
index 7a6a7590cc02..278c69bad57a 100644
--- a/arch/m68k/include/asm/processor.h
+++ b/arch/m68k/include/asm/processor.h
@@ -20,23 +20,26 @@
 
 static inline unsigned long rdusp(void)
 {
-#ifdef CONFIG_COLDFIRE
+#ifdef CONFIG_COLDFIRE_SW_A7
         extern unsigned int sw_usp;
         return sw_usp;
 #else
-        unsigned long usp;
-        __asm__ __volatile__("move %/usp,%0" : "=a" (usp));
+        register unsigned long usp __asm__("a0");
+        /* move %usp,%a0 */
+        __asm__ __volatile__(".word 0x4e68" : "=a" (usp));
         return usp;
 #endif
 }
 
 static inline void wrusp(unsigned long usp)
 {
-#ifdef CONFIG_COLDFIRE
+#ifdef CONFIG_COLDFIRE_SW_A7
         extern unsigned int sw_usp;
         sw_usp = usp;
 #else
-        __asm__ __volatile__("move %0,%/usp" : : "a" (usp));
+        register unsigned long a0 __asm__("a0") = usp;
+        /* move %a0,%usp */
+        __asm__ __volatile__(".word 0x4e60" : : "a" (a0) );
 #endif
 }
 
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig
index fa9f746cf4ae..8b9dacaa0f6e 100644
--- a/arch/m68knommu/Kconfig
+++ b/arch/m68knommu/Kconfig
@@ -2,6 +2,7 @@ config M68K
         bool
         default y
         select HAVE_IDE
+        select HAVE_GENERIC_HARDIRQS
 
 config MMU
         bool
@@ -48,14 +49,6 @@ config GENERIC_HWEIGHT
         bool
         default y
 
-config GENERIC_HARDIRQS
-        bool
-        default y
-
-config GENERIC_HARDIRQS_NO__DO_IRQ
-        bool
-        default y
-
 config GENERIC_CALIBRATE_DELAY
         bool
         default y
@@ -75,6 +68,16 @@ config GENERIC_CLOCKEVENTS
 config NO_IOPORT
         def_bool y
 
+config COLDFIRE_SW_A7
+        bool
+        default n
+
+config HAVE_CACHE_SPLIT
+        bool
+
+config HAVE_CACHE_CB
+        bool
+
 source "init/Kconfig"
 
 source "kernel/Kconfig.freezer"
@@ -107,69 +110,90 @@ config M68360
 
 config M5206
         bool "MCF5206"
+        select COLDFIRE_SW_A7
         help
           Motorola ColdFire 5206 processor support.
 
 config M5206e
         bool "MCF5206e"
+        select COLDFIRE_SW_A7
         help
           Motorola ColdFire 5206e processor support.
 
 config M520x
         bool "MCF520x"
         select GENERIC_CLOCKEVENTS
+        select HAVE_CACHE_SPLIT
         help
            Freescale Coldfire 5207/5208 processor support.
 
 config M523x
         bool "MCF523x"
         select GENERIC_CLOCKEVENTS
+        select HAVE_CACHE_SPLIT
         help
           Freescale Coldfire 5230/1/2/4/5 processor support
 
 config M5249
         bool "MCF5249"
+        select COLDFIRE_SW_A7
         help
           Motorola ColdFire 5249 processor support.
 
 config M5271
         bool "MCF5271"
+        select HAVE_CACHE_SPLIT
         help
           Freescale (Motorola) ColdFire 5270/5271 processor support.
 
 config M5272
         bool "MCF5272"
+        select COLDFIRE_SW_A7
         help
           Motorola ColdFire 5272 processor support.
 
 config M5275
         bool "MCF5275"
+        select HAVE_CACHE_SPLIT
         help
           Freescale (Motorola) ColdFire 5274/5275 processor support.
 
 config M528x
         bool "MCF528x"
         select GENERIC_CLOCKEVENTS
+        select HAVE_CACHE_SPLIT
         help
           Motorola ColdFire 5280/5282 processor support.
 
 config M5307
         bool "MCF5307"
+        select COLDFIRE_SW_A7
+        select HAVE_CACHE_CB
         help
           Motorola ColdFire 5307 processor support.
 
 config M532x
         bool "MCF532x"
+        select HAVE_CACHE_CB
         help
           Freescale (Motorola) ColdFire 532x processor support.
 
 config M5407
         bool "MCF5407"
+        select COLDFIRE_SW_A7
+        select HAVE_CACHE_CB
         help
           Motorola ColdFire 5407 processor support.
 
+config M547x
+        bool "MCF547x"
+        select HAVE_CACHE_CB
+        help
+          Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
+
 config M548x
         bool "MCF548x"
+        select HAVE_CACHE_CB
         help
           Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
 
@@ -181,9 +205,14 @@ config M527x
         select GENERIC_CLOCKEVENTS
         default y
 
+config M54xx
+        bool
+        depends on (M548x || M547x)
+        default y
+
 config COLDFIRE
         bool
-        depends on (M5206 || M5206e || M520x || M523x || M5249 || M527x || M5272 || M528x || M5307 || M532x || M5407 || M548x)
+        depends on (M5206 || M5206e || M520x || M523x || M5249 || M527x || M5272 || M528x || M5307 || M532x || M5407 || M54xx)
         select GENERIC_GPIO
         select ARCH_REQUIRE_GPIOLIB
         default y
@@ -230,6 +259,46 @@ config OLDMASK
           Build support for the older revision ColdFire 5307 silicon.
           Specifically this is the 1H55J mask revision.
 
+if HAVE_CACHE_SPLIT
+choice
+        prompt "Split Cache Configuration"
+        default CACHE_I
+
+config CACHE_I
+        bool "Instruction"
+        help
+          Use all of the ColdFire CPU cache memory as an instruction cache.
+
+config CACHE_D
+        bool "Data"
+        help
+          Use all of the ColdFire CPU cache memory as a data cache.
+
+config CACHE_BOTH
+        bool "Both"
+        help
+          Split the ColdFire CPU cache, and use half as an instruction cache
+          and half as a data cache.
+endchoice
+endif
+
+if HAVE_CACHE_CB
+choice
+        prompt "Data cache mode"
+        default CACHE_WRITETHRU
+
+config CACHE_WRITETHRU
+        bool "Write-through"
+        help
+          The ColdFire CPU cache is set into Write-through mode.
+
+config CACHE_COPYBACK
+        bool "Copy-back"
+        help
+          The ColdFire CPU cache is set into Copy-back mode.
+endchoice
+endif
+
 comment "Platform"
 
 config PILOT3
@@ -245,16 +314,16 @@ config XCOPILOT_BUGS
           Support the bugs of Xcopilot.
 
 config UC5272
-        bool 'Arcturus Networks uC5272 dimm board support'
-        depends on M5272
-        help
-          Support for the Arcturus Networks uC5272 dimm board.
+        bool 'Arcturus Networks uC5272 dimm board support'
+        depends on M5272
+        help
+          Support for the Arcturus Networks uC5272 dimm board.
 
 config UC5282
-       bool "Arcturus Networks uC5282 board support"
-          depends on M528x
-       help
-          Support for the Arcturus Networks uC5282 dimm board.
+        bool "Arcturus Networks uC5282 board support"
+        depends on M528x
+        help
+          Support for the Arcturus Networks uC5282 dimm board.
 
 config UCSIMM
         bool "uCsimm module support"
@@ -279,7 +348,7 @@ config DIRECT_IO_ACCESS
         depends on (UCSIMM || UCDIMM || DRAGEN2)
         help
           Disable the CPU internal registers protection in user mode,
-          to allow a user application to read/write them.
+          to allow a user application to read/write them.
 
 config INIT_LCD
         bool "Initialize LCD"
@@ -517,7 +586,7 @@ config EMAC_INC
         depends on (SOM5282EM)
 
 config SNEHA
-        bool
+        bool
         default y
         depends on CPU16B
 
diff --git a/arch/m68knommu/Makefile b/arch/m68knommu/Makefile
index 026ef16fa68e..589613fed31d 100644
--- a/arch/m68knommu/Makefile
+++ b/arch/m68knommu/Makefile
@@ -25,7 +25,7 @@ platform-$(CONFIG_M528x)	:= 528x
 platform-$(CONFIG_M5307)        := 5307
 platform-$(CONFIG_M532x)        := 532x
 platform-$(CONFIG_M5407)        := 5407
-platform-$(CONFIG_M548x)        := 548x
+platform-$(CONFIG_M54xx)        := 54xx
 PLATFORM := $(platform-y)
 
 board-$(CONFIG_PILOT)           := pilot
@@ -74,7 +74,7 @@ cpuclass-$(CONFIG_M528x)	:= coldfire
 cpuclass-$(CONFIG_M5307)        := coldfire
 cpuclass-$(CONFIG_M532x)        := coldfire
 cpuclass-$(CONFIG_M5407)        := coldfire
-cpuclass-$(CONFIG_M548x)        := coldfire
+cpuclass-$(CONFIG_M54xx)        := coldfire
 cpuclass-$(CONFIG_M68328)       := 68328
 cpuclass-$(CONFIG_M68EZ328)     := 68328
 cpuclass-$(CONFIG_M68VZ328)     := 68328
@@ -91,18 +91,18 @@ export PLATFORM BOARD MODEL CPUCLASS
 # Some CFLAG additions based on specific CPU type.
 #
 cflags-$(CONFIG_M5206)          := $(call cc-option,-mcpu=5206,-m5200)
-cflags-$(CONFIG_M5206e)         := $(call cc-option,-m5206e,-m5200)
+cflags-$(CONFIG_M5206e)         := $(call cc-option,-mcpu=5206e,-m5200)
 cflags-$(CONFIG_M520x)          := $(call cc-option,-mcpu=5208,-m5200)
 cflags-$(CONFIG_M523x)          := $(call cc-option,-mcpu=523x,-m5307)
 cflags-$(CONFIG_M5249)          := $(call cc-option,-mcpu=5249,-m5200)
 cflags-$(CONFIG_M5271)          := $(call cc-option,-mcpu=5271,-m5307)
 cflags-$(CONFIG_M5272)          := $(call cc-option,-mcpu=5272,-m5307)
 cflags-$(CONFIG_M5275)          := $(call cc-option,-mcpu=5275,-m5307)
-cflags-$(CONFIG_M528x)          := $(call cc-option,-m528x,-m5307)
-cflags-$(CONFIG_M5307)          := $(call cc-option,-m5307,-m5200)
+cflags-$(CONFIG_M528x)          := $(call cc-option,-mcpu=528x,-m5307)
+cflags-$(CONFIG_M5307)          := $(call cc-option,-mcpu=5307,-m5200)
 cflags-$(CONFIG_M532x)          := $(call cc-option,-mcpu=532x,-m5307)
-cflags-$(CONFIG_M5407)          := $(call cc-option,-m5407,-m5200)
-cflags-$(CONFIG_M548x)          := $(call cc-option,-m5407,-m5200)
+cflags-$(CONFIG_M5407)          := $(call cc-option,-mcpu=5407,-m5200)
+cflags-$(CONFIG_M54xx)          := $(call cc-option,-mcpu=5475,-m5200)
 cflags-$(CONFIG_M68328)         := -m68000
 cflags-$(CONFIG_M68EZ328)       := -m68000
 cflags-$(CONFIG_M68VZ328)       := -m68000
diff --git a/arch/m68knommu/configs/m5208evb_defconfig b/arch/m68knommu/configs/m5208evb_defconfig
index 6ac2981a2cdf..2f5655c577af 100644
--- a/arch/m68knommu/configs/m5208evb_defconfig
+++ b/arch/m68knommu/configs/m5208evb_defconfig
@@ -1,7 +1,7 @@
 CONFIG_EXPERIMENTAL=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/m68knommu/configs/m5249evb_defconfig b/arch/m68knommu/configs/m5249evb_defconfig
index 14934ff8d5c3..16df72bfbd45 100644
--- a/arch/m68knommu/configs/m5249evb_defconfig
+++ b/arch/m68knommu/configs/m5249evb_defconfig
@@ -1,7 +1,7 @@
 CONFIG_EXPERIMENTAL=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/m68knommu/configs/m5272c3_defconfig b/arch/m68knommu/configs/m5272c3_defconfig
index 5985a3b593d8..4e6ea50c7f33 100644
--- a/arch/m68knommu/configs/m5272c3_defconfig
+++ b/arch/m68knommu/configs/m5272c3_defconfig
@@ -1,7 +1,7 @@
 CONFIG_EXPERIMENTAL=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/m68knommu/configs/m5275evb_defconfig b/arch/m68knommu/configs/m5275evb_defconfig
index 5a7857efb45d..f3dd74115a34 100644
--- a/arch/m68knommu/configs/m5275evb_defconfig
+++ b/arch/m68knommu/configs/m5275evb_defconfig
@@ -1,7 +1,7 @@
 CONFIG_EXPERIMENTAL=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/m68knommu/configs/m5307c3_defconfig b/arch/m68knommu/configs/m5307c3_defconfig
index e8102018c8d4..bce0a20c3737 100644
--- a/arch/m68knommu/configs/m5307c3_defconfig
+++ b/arch/m68knommu/configs/m5307c3_defconfig
@@ -1,7 +1,7 @@
 CONFIG_EXPERIMENTAL=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/m68knommu/configs/m5407c3_defconfig b/arch/m68knommu/configs/m5407c3_defconfig
index 5c124a7ba2a7..618cc32691f2 100644
--- a/arch/m68knommu/configs/m5407c3_defconfig
+++ b/arch/m68knommu/configs/m5407c3_defconfig
@@ -1,7 +1,7 @@
 CONFIG_EXPERIMENTAL=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/m68knommu/defconfig b/arch/m68knommu/defconfig
index 6ac2981a2cdf..2f5655c577af 100644
--- a/arch/m68knommu/defconfig
+++ b/arch/m68knommu/defconfig
@@ -1,7 +1,7 @@
 CONFIG_EXPERIMENTAL=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_FUTEX is not set
diff --git a/arch/m68knommu/kernel/setup.c b/arch/m68knommu/kernel/setup.c
index c684adf5dc40..16b2de7f5101 100644
--- a/arch/m68knommu/kernel/setup.c
+++ b/arch/m68knommu/kernel/setup.c
@@ -55,55 +55,29 @@ void (*mach_halt)(void);
 void (*mach_power_off)(void);
 
 #ifdef CONFIG_M68328
-        #define CPU "MC68328"
+#define CPU_NAME        "MC68328"
 #endif
 #ifdef CONFIG_M68EZ328
-        #define CPU "MC68EZ328"
+#define CPU_NAME        "MC68EZ328"
 #endif
 #ifdef CONFIG_M68VZ328
-        #define CPU "MC68VZ328"
+#define CPU_NAME        "MC68VZ328"
 #endif
 #ifdef CONFIG_M68360
-        #define CPU "MC68360"
+#define CPU_NAME        "MC68360"
 #endif
-#if defined(CONFIG_M5206)
-        #define CPU "COLDFIRE(m5206)"
+#ifndef CPU_NAME
+#define CPU_NAME        "UNKNOWN"
 #endif
-#if defined(CONFIG_M5206e)
-        #define CPU "COLDFIRE(m5206e)"
-#endif
-#if defined(CONFIG_M520x)
-        #define CPU "COLDFIRE(m520x)"
-#endif
-#if defined(CONFIG_M523x)
-        #define CPU "COLDFIRE(m523x)"
-#endif
-#if defined(CONFIG_M5249)
-        #define CPU "COLDFIRE(m5249)"
-#endif
-#if defined(CONFIG_M5271)
-        #define CPU "COLDFIRE(m5270/5271)"
-#endif
-#if defined(CONFIG_M5272)
-        #define CPU "COLDFIRE(m5272)"
-#endif
-#if defined(CONFIG_M5275)
-        #define CPU "COLDFIRE(m5274/5275)"
-#endif
-#if defined(CONFIG_M528x)
-        #define CPU "COLDFIRE(m5280/5282)"
-#endif
-#if defined(CONFIG_M5307)
-        #define CPU "COLDFIRE(m5307)"
-#endif
-#if defined(CONFIG_M532x)
-        #define CPU "COLDFIRE(m532x)"
-#endif
-#if defined(CONFIG_M5407)
-        #define CPU "COLDFIRE(m5407)"
-#endif
-#ifndef CPU
-        #define CPU "UNKNOWN"
+
+/*
+ * Different cores have different instruction execution timings.
+ * The old/traditional 68000 cores are basically all the same, at 16.
+ * The ColdFire cores vary a little, their values are defined in their
+ * headers. We default to the standard 68000 value here.
+ */
+#ifndef CPU_INSTR_PER_JIFFY
+#define CPU_INSTR_PER_JIFFY     16
 #endif
 
 extern int _stext, _etext, _sdata, _edata, _sbss, _ebss, _end;
@@ -208,7 +182,7 @@ void __init setup_arch(char **cmdline_p)
         command_line[sizeof(command_line) - 1] = 0;
 #endif /* CONFIG_UBOOT */
 
-        printk(KERN_INFO "\x0F\r\n\nuClinux/" CPU "\n");
+        printk(KERN_INFO "\x0F\r\n\nuClinux/" CPU_NAME "\n");
 
 #ifdef CONFIG_UCDIMM
         printk(KERN_INFO "uCdimm by Lineo, Inc. <www.lineo.com>\n");
@@ -257,11 +231,6 @@ void __init setup_arch(char **cmdline_p)
         memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
         boot_command_line[COMMAND_LINE_SIZE-1] = 0;
 
-#ifdef DEBUG
-        if (strlen(*cmdline_p))
-                printk(KERN_DEBUG "Command line: '%s'\n", *cmdline_p);
-#endif
-
 #if defined(CONFIG_FRAMEBUFFER_CONSOLE) && defined(CONFIG_DUMMY_CONSOLE)
         conswitchp = &dummy_con;
 #endif
@@ -303,15 +272,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)
         char *cpu, *mmu, *fpu;
         u_long clockfreq;
 
-        cpu = CPU;
+        cpu = CPU_NAME;
         mmu = "none";
         fpu = "none";
-
-#ifdef CONFIG_COLDFIRE
-        clockfreq = (loops_per_jiffy * HZ) * 3;
-#else
-        clockfreq = (loops_per_jiffy * HZ) * 16;
-#endif
+        clockfreq = (loops_per_jiffy * HZ) * CPU_INSTR_PER_JIFFY;
 
         seq_printf(m, "CPU:\t\t%s\n"
                       "MMU:\t\t%s\n"
diff --git a/arch/m68knommu/mm/Makefile b/arch/m68knommu/mm/Makefile
index fc91f254f51b..b54ab6b4b523 100644
--- a/arch/m68knommu/mm/Makefile
+++ b/arch/m68knommu/mm/Makefile
@@ -2,4 +2,4 @@
 # Makefile for the linux m68knommu specific parts of the memory manager.
 #
 
-obj-y += init.o fault.o memory.o kmap.o
+obj-y += init.o kmap.o
diff --git a/arch/m68knommu/mm/fault.c b/arch/m68knommu/mm/fault.c
deleted file mode 100644
index bc05cf74d9c0..000000000000
--- a/arch/m68knommu/mm/fault.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- *  linux/arch/m68knommu/mm/fault.c
- *
- *  Copyright (C) 1998  D. Jeff Dionne <jeff@lineo.ca>,
- *  Copyright (C) 2000  Lineo, Inc.  (www.lineo.com)
- *
- *  Based on:
- *
- *  linux/arch/m68k/mm/fault.c
- *
- *  Copyright (C) 1995  Hamish Macdonald
- */
-
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/kernel.h>
-#include <linux/ptrace.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-
-extern void die_if_kernel(char *, struct pt_regs *, long);
-
-/*
- * This routine handles page faults.  It determines the problem, and
- * then passes it off to one of the appropriate routines.
- *
- * error_code:
- *      bit 0 == 0 means no page found, 1 means protection fault
- *      bit 1 == 0 means read, 1 means write
- *
- * If this routine detects a bad access, it returns 1, otherwise it
- * returns 0.
- */
-asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
-                              unsigned long error_code)
-{
-#ifdef DEBUG
-        printk(KERN_DEBUG "regs->sr=%#x, regs->pc=%#lx, address=%#lx, %ld\n",
-                regs->sr, regs->pc, address, error_code);
-#endif
-
-        /*
-         * Oops. The kernel tried to access some bad page. We'll have to
-         * terminate things with extreme prejudice.
-         */
-        if ((unsigned long) address < PAGE_SIZE)
-                printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference");
-        else
-                printk(KERN_ALERT "Unable to handle kernel access");
-        printk(KERN_ALERT " at virtual address %08lx\n", address);
-        die_if_kernel("Oops", regs, error_code);
-        do_exit(SIGKILL);
-
-        return 1;
-}
-
diff --git a/arch/m68knommu/mm/kmap.c b/arch/m68knommu/mm/kmap.c
index 902c1dfda9e5..ece8d5ad4e6c 100644
--- a/arch/m68knommu/mm/kmap.c
+++ b/arch/m68knommu/mm/kmap.c
@@ -36,15 +36,6 @@ void iounmap(void *addr)
 }
 
 /*
- * __iounmap unmaps nearly everything, so be careful
- * it doesn't free currently pointer/page tables anymore but it
- * wans't used anyway and might be added later.
- */
-void __iounmap(void *addr, unsigned long size)
-{
-}
-
-/*
  * Set new cache mode for some kernel address space.
  * The caller must push data for that range itself, if such data may already
  * be in the cache.
diff --git a/arch/m68knommu/mm/memory.c b/arch/m68knommu/mm/memory.c
deleted file mode 100644
index 8f7949e786d4..000000000000
--- a/arch/m68knommu/mm/memory.c
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- *  linux/arch/m68knommu/mm/memory.c
- *
- *  Copyright (C) 1998  Kenneth Albanowski <kjahds@kjahds.com>,
- *  Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
- *
- *  Based on:
- *
- *  linux/arch/m68k/mm/memory.c
- *
- *  Copyright (C) 1995  Hamish Macdonald
- */
-
-#include <linux/mm.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/types.h>
-
-#include <asm/segment.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/system.h>
-
-/*
- * Map some physical address range into the kernel address space.
- */
-
-unsigned long kernel_map(unsigned long paddr, unsigned long size,
-                         int nocacheflag, unsigned long *memavailp )
-{
-        return paddr;
-}
-
diff --git a/arch/m68knommu/platform/548x/Makefile b/arch/m68knommu/platform/54xx/Makefile
index e6035e7a2d3f..e6035e7a2d3f 100644
--- a/arch/m68knommu/platform/548x/Makefile
+++ b/arch/m68knommu/platform/54xx/Makefile
diff --git a/arch/m68knommu/platform/548x/config.c b/arch/m68knommu/platform/54xx/config.c
index 9888846bd1cf..78130984db95 100644
--- a/arch/m68knommu/platform/548x/config.c
+++ b/arch/m68knommu/platform/54xx/config.c
@@ -1,7 +1,7 @@
 /***************************************************************************/
 
 /*
- *      linux/arch/m68knommu/platform/548x/config.c
+ *      linux/arch/m68knommu/platform/54xx/config.c
  *
  *      Copyright (C) 2010, Philippe De Muyter <phdm@macqel.be>
  */
@@ -15,13 +15,13 @@
 #include <linux/io.h>
 #include <asm/machdep.h>
 #include <asm/coldfire.h>
-#include <asm/m548xsim.h>
+#include <asm/m54xxsim.h>
 #include <asm/mcfuart.h>
-#include <asm/m548xgpt.h>
+#include <asm/m54xxgpt.h>
 
 /***************************************************************************/
 
-static struct mcf_platform_uart m548x_uart_platform[] = {
+static struct mcf_platform_uart m54xx_uart_platform[] = {
         {
                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
                 .irq            = 64 + 35,
@@ -40,20 +40,20 @@ static struct mcf_platform_uart m548x_uart_platform[] = {
         },
 };
 
-static struct platform_device m548x_uart = {
+static struct platform_device m54xx_uart = {
         .name                   = "mcfuart",
         .id                     = 0,
-        .dev.platform_data      = m548x_uart_platform,
+        .dev.platform_data      = m54xx_uart_platform,
 };
 
-static struct platform_device *m548x_devices[] __initdata = {
-        &m548x_uart,
+static struct platform_device *m54xx_devices[] __initdata = {
+        &m54xx_uart,
 };
 
 
 /***************************************************************************/
 
-static void __init m548x_uart_init_line(int line, int irq)
+static void __init m54xx_uart_init_line(int line, int irq)
 {
         int rts_cts;
 
@@ -72,18 +72,18 @@ static void __init m548x_uart_init_line(int line, int irq)
                                                 MCF_MBAR + MCF_PAR_PSC(line));
 }
 
-static void __init m548x_uarts_init(void)
+static void __init m54xx_uarts_init(void)
 {
-        const int nrlines = ARRAY_SIZE(m548x_uart_platform);
+        const int nrlines = ARRAY_SIZE(m54xx_uart_platform);
         int line;
 
         for (line = 0; (line < nrlines); line++)
-                m548x_uart_init_line(line, m548x_uart_platform[line].irq);
+                m54xx_uart_init_line(line, m54xx_uart_platform[line].irq);
 }
 
 /***************************************************************************/
 
-static void mcf548x_reset(void)
+static void mcf54xx_reset(void)
 {
         /* disable interrupts and enable the watchdog */
         asm("movew #0x2700, %sr\n");
@@ -97,8 +97,8 @@ static void mcf548x_reset(void)
 
 void __init config_BSP(char *commandp, int size)
 {
-        mach_reset = mcf548x_reset;
-        m548x_uarts_init();
+        mach_reset = mcf54xx_reset;
+        m54xx_uarts_init();
 }
 
 /***************************************************************************/
@@ -106,7 +106,7 @@ void __init config_BSP(char *commandp, int size)
 static int __init init_BSP(void)
 {
 
-        platform_add_devices(m548x_devices, ARRAY_SIZE(m548x_devices));
+        platform_add_devices(m54xx_devices, ARRAY_SIZE(m54xx_devices));
         return 0;
 }
 
diff --git a/arch/m68knommu/platform/68328/ints.c b/arch/m68knommu/platform/68328/ints.c
index 865852806a17..2a3af193ccd3 100644
--- a/arch/m68knommu/platform/68328/ints.c
+++ b/arch/m68knommu/platform/68328/ints.c
@@ -179,8 +179,8 @@ void __init init_IRQ(void)
         IMR = ~0;
 
         for (i = 0; (i < NR_IRQS); i++) {
-                set_irq_chip(irq, &intc_irq_chip);
-                set_irq_handler(irq, handle_level_irq);
+                set_irq_chip(i, &intc_irq_chip);
+                set_irq_handler(i, handle_level_irq);
         }
 }
 
diff --git a/arch/m68knommu/platform/coldfire/Makefile b/arch/m68knommu/platform/coldfire/Makefile
index 45f501fa4525..a8967baabd72 100644
--- a/arch/m68knommu/platform/coldfire/Makefile
+++ b/arch/m68knommu/platform/coldfire/Makefile
@@ -14,7 +14,7 @@
 
 asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
 
-obj-$(CONFIG_COLDFIRE)  += clk.o dma.o entry.o vectors.o
+obj-$(CONFIG_COLDFIRE)  += cache.o clk.o dma.o entry.o vectors.o
 obj-$(CONFIG_M5206)     += timers.o intc.o
 obj-$(CONFIG_M5206e)    += timers.o intc.o
 obj-$(CONFIG_M520x)     += pit.o intc-simr.o
@@ -26,7 +26,7 @@ obj-$(CONFIG_M528x)	+= pit.o intc-2.o
 obj-$(CONFIG_M5307)     += timers.o intc.o
 obj-$(CONFIG_M532x)     += timers.o intc-simr.o
 obj-$(CONFIG_M5407)     += timers.o intc.o
-obj-$(CONFIG_M548x)     += sltimers.o intc-2.o
+obj-$(CONFIG_M54xx)     += sltimers.o intc-2.o
 
 obj-y                   += pinmux.o gpio.o
 extra-y := head.o
diff --git a/arch/m68knommu/platform/coldfire/cache.c b/arch/m68knommu/platform/coldfire/cache.c
new file mode 100644
index 000000000000..235d3c4f4f0f
--- /dev/null
+++ b/arch/m68knommu/platform/coldfire/cache.c
@@ -0,0 +1,48 @@
+/***************************************************************************/
+
+/*
+ *      cache.c -- general ColdFire Cache maintainence code
+ *
+ *      Copyright (C) 2010, Greg Ungerer (gerg@snapgear.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+
+/***************************************************************************/
+#ifdef CACHE_PUSH
+/***************************************************************************/
+
+/*
+ *      Use cpushl to push all dirty cache lines back to memory.
+ *      Older versions of GAS don't seem to know how to generate the
+ *      ColdFire cpushl instruction... Oh well, bit stuff it for now.
+ */
+
+void mcf_cache_push(void)
+{
+        __asm__ __volatile__ (
+                "clrl   %%d0\n\t"
+                "1:\n\t"
+                "movel  %%d0,%%a0\n\t"
+                "2:\n\t"
+                ".word  0xf468\n\t"
+                "addl   %0,%%a0\n\t"
+                "cmpl   %1,%%a0\n\t"
+                "blt    2b\n\t"
+                "addql  #1,%%d0\n\t"
+                "cmpil  %2,%%d0\n\t"
+                "bne    1b\n\t"
+                : /* No output */
+                : "i" (CACHE_LINE_SIZE),
+                  "i" (DCACHE_SIZE / CACHE_WAYS),
+                  "i" (CACHE_WAYS)
+                : "d0", "a0" );
+}
+
+/***************************************************************************/
+#endif /* CACHE_PUSH */
+/***************************************************************************/
diff --git a/arch/m68knommu/platform/coldfire/entry.S b/arch/m68knommu/platform/coldfire/entry.S
index e1debc8285ef..4ddfc3da70d8 100644
--- a/arch/m68knommu/platform/coldfire/entry.S
+++ b/arch/m68knommu/platform/coldfire/entry.S
@@ -36,13 +36,16 @@
 #include <asm/asm-offsets.h>
 #include <asm/entry.h>
 
+#ifdef CONFIG_COLDFIRE_SW_A7
+/*
+ *      Define software copies of the supervisor and user stack pointers.
+ */
 .bss
-
 sw_ksp:
 .long   0
-
 sw_usp:
 .long   0
+#endif /* CONFIG_COLDFIRE_SW_A7 */
 
 .text
 
@@ -51,7 +54,6 @@ sw_usp:
 .globl ret_from_exception
 .globl ret_from_signal
 .globl sys_call_table
-.globl ret_from_interrupt
 .globl inthandler
 .globl fasthandler
 
@@ -140,20 +142,7 @@ Luser_return:
         jne     Lwork_to_do             /* still work to do */
 
 Lreturn:
-        move    #0x2700,%sr             /* disable intrs */
-        movel   sw_usp,%a0              /* get usp */
-        movel   %sp@(PT_OFF_PC),%a0@-   /* copy exception program counter */
-        movel   %sp@(PT_OFF_FORMATVEC),%a0@- /* copy exception format/vector/sr */
-        moveml  %sp@,%d1-%d5/%a0-%a2
-        lea     %sp@(32),%sp            /* space for 8 regs */
-        movel   %sp@+,%d0
-        addql   #4,%sp                  /* orig d0 */
-        addl    %sp@+,%sp               /* stk adj */
-        addql   #8,%sp                  /* remove exception */
-        movel   %sp,sw_ksp              /* save ksp */
-        subql   #8,sw_usp               /* set exception */
-        movel   sw_usp,%sp              /* restore usp */
-        rte
+        RESTORE_USER
 
 Lwork_to_do:
         movel   %a0@(TI_FLAGS),%d1      /* get thread_info->flags */
@@ -191,31 +180,7 @@ ENTRY(inthandler)
         jbsr    do_IRQ                  /* call high level irq handler */
         lea     %sp@(8),%sp             /* pop args off stack */
 
-        bra     ret_from_interrupt      /* this was fallthrough */
-
-/*
- * This is the fast interrupt handler (for certain hardware interrupt
- * sources). Unlike the normal interrupt handler it just uses the
- * current stack (doesn't care if it is user or kernel). It also
- * doesn't bother doing the bottom half handlers.
- */
-ENTRY(fasthandler)
-        SAVE_LOCAL
-
-        movew   %sp@(PT_OFF_FORMATVEC),%d0
-        andl    #0x03fc,%d0             /* mask out vector only */
-
-        movel   %sp,%sp@-               /* push regs arg */
-        lsrl    #2,%d0                  /* calculate real vector # */
-        movel   %d0,%sp@-               /* push vector number */
-        jbsr    do_IRQ                  /* call high level irq handler */
-        lea     %sp@(8),%sp             /* pop args off stack */
-
-        RESTORE_LOCAL
-
-ENTRY(ret_from_interrupt)
-        /* the fasthandler is confusing me, haven't seen any user */
-        jmp     ret_from_exception
+        bra     ret_from_exception
 
 /*
  * Beware - when entering resume, prev (the current task) is
@@ -226,9 +191,8 @@ ENTRY(ret_from_interrupt)
  */
 ENTRY(resume)
         movel   %a0, %d1                        /* get prev thread in d1 */
-
-        movel   sw_usp,%d0                      /* save usp */
-        movel   %d0,%a0@(TASK_THREAD+THREAD_USP)
+        RDUSP
+        movel   %a2,%a0@(TASK_THREAD+THREAD_USP)
 
         SAVE_SWITCH_STACK
         movel   %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack pointer */
@@ -236,5 +200,5 @@ ENTRY(resume)
         RESTORE_SWITCH_STACK
 
         movel   %a1@(TASK_THREAD+THREAD_USP),%a0 /* restore thread user stack */
-        movel   %a0, sw_usp
+        WRUSP
         rts
diff --git a/arch/m68knommu/platform/coldfire/head.S b/arch/m68knommu/platform/coldfire/head.S
index 0b2d7c7adf79..d5977909ae5f 100644
--- a/arch/m68knommu/platform/coldfire/head.S
+++ b/arch/m68knommu/platform/coldfire/head.S
@@ -3,7 +3,7 @@
 /*
  *      head.S -- common startup code for ColdFire CPUs.
  *
- *      (C) Copyright 1999-2006, Greg Ungerer <gerg@snapgear.com>.
+ *      (C) Copyright 1999-2010, Greg Ungerer <gerg@snapgear.com>.
  */
 
 /*****************************************************************************/
@@ -13,7 +13,6 @@
 #include <linux/init.h>
 #include <asm/asm-offsets.h>
 #include <asm/coldfire.h>
-#include <asm/mcfcache.h>
 #include <asm/mcfsim.h>
 #include <asm/thread_info.h>
 
@@ -173,10 +172,27 @@ _start:
 
         /*
          *      Now that we know what the memory is, lets enable cache
-         *      and get things moving. This is Coldfire CPU specific.
+         *      and get things moving. This is Coldfire CPU specific. Not
+         *      all version cores have identical cache register setup. But
+         *      it is very similar. Define the exact settings in the headers
+         *      then the code here is the same for all.
          */
-        CACHE_ENABLE                            /* enable CPU cache */
-
+        movel   #CACHE_INIT,%d0                 /* invalidate whole cache */
+        movec   %d0,%CACR
+        nop
+        movel   #ACR0_MODE,%d0                  /* set RAM region for caching */
+        movec   %d0,%ACR0
+        movel   #ACR1_MODE,%d0                  /* anything else to cache? */
+        movec   %d0,%ACR1
+#ifdef ACR2_MODE
+        movel   #ACR2_MODE,%d0
+        movec   %d0,%ACR2
+        movel   #ACR3_MODE,%d0
+        movec   %d0,%ACR3
+#endif
+        movel   #CACHE_MODE,%d0                 /* enable cache */
+        movec   %d0,%CACR
+        nop
 
 #ifdef CONFIG_ROMFS_FS
         /*
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index 5f5018a71a3d..31680032053e 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -15,6 +15,8 @@ config MICROBLAZE
         select TRACING_SUPPORT
         select OF
         select OF_EARLY_FLATTREE
+        select HAVE_GENERIC_HARDIRQS
+        select GENERIC_IRQ_PROBE
 
 config SWAP
         def_bool n
@@ -37,12 +39,6 @@ config GENERIC_FIND_NEXT_BIT
 config GENERIC_HWEIGHT
         def_bool y
 
-config GENERIC_HARDIRQS
-        def_bool y
-
-config GENERIC_IRQ_PROBE
-        def_bool y
-
 config GENERIC_CALIBRATE_DELAY
         def_bool y
 
@@ -52,9 +48,6 @@ config GENERIC_TIME_VSYSCALL
 config GENERIC_CLOCKEVENTS
         def_bool y
 
-config GENERIC_HARDIRQS_NO__DO_IRQ
-        def_bool y
-
 config GENERIC_GPIO
         def_bool y
 
diff --git a/arch/microblaze/configs/mmu_defconfig b/arch/microblaze/configs/mmu_defconfig
index ab8fbe7ad90b..b3f5eecff2a7 100644
--- a/arch/microblaze/configs/mmu_defconfig
+++ b/arch/microblaze/configs/mmu_defconfig
@@ -7,7 +7,7 @@ CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE="rootfs.cpio"
 CONFIG_INITRAMFS_COMPRESSION_GZIP=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 # CONFIG_HOTPLUG is not set
diff --git a/arch/microblaze/configs/nommu_defconfig b/arch/microblaze/configs/nommu_defconfig
index ebc143c5368e..0249e4b7e1d3 100644
--- a/arch/microblaze/configs/nommu_defconfig
+++ b/arch/microblaze/configs/nommu_defconfig
@@ -6,7 +6,7 @@ CONFIG_BSD_PROCESS_ACCT_V3=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 # CONFIG_HOTPLUG is not set
diff --git a/arch/microblaze/include/asm/pgtable.h b/arch/microblaze/include/asm/pgtable.h
index cae268c22ba2..b23f68075879 100644
--- a/arch/microblaze/include/asm/pgtable.h
+++ b/arch/microblaze/include/asm/pgtable.h
@@ -444,8 +444,9 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
         *ptep = pte;
 }
 
-static inline int ptep_test_and_clear_young(struct mm_struct *mm,
-                unsigned long addr, pte_t *ptep)
+#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
+static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
+                unsigned long address, pte_t *ptep)
 {
         return (pte_update(ptep, _PAGE_ACCESSED, 0) & _PAGE_ACCESSED) != 0;
 }
@@ -457,6 +458,7 @@ static inline int ptep_test_and_clear_dirty(struct mm_struct *mm,
                 (_PAGE_DIRTY | _PAGE_HWWRITE), 0) & _PAGE_DIRTY) != 0;
 }
 
+#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
                 unsigned long addr, pte_t *ptep)
 {
diff --git a/arch/microblaze/include/asm/tlb.h b/arch/microblaze/include/asm/tlb.h
index e8abd4a0349c..8aa97817cc8c 100644
--- a/arch/microblaze/include/asm/tlb.h
+++ b/arch/microblaze/include/asm/tlb.h
@@ -13,6 +13,7 @@
 
 #define tlb_flush(tlb)  flush_tlb_mm((tlb)->mm)
 
+#include <linux/pagemap.h>
 #include <asm-generic/tlb.h>
 
 #ifdef CONFIG_MMU
diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
index 78439b8a83c4..7ff9b5492041 100644
--- a/arch/mips/Kbuild.platforms
+++ b/arch/mips/Kbuild.platforms
@@ -2,6 +2,7 @@
 
 platforms += alchemy
 platforms += ar7
+platforms += ath79
 platforms += bcm47xx
 platforms += bcm63xx
 platforms += cavium-octeon
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index f489ec30e071..f5ecc0566bc2 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -21,6 +21,7 @@ config MIPS
         select HAVE_DMA_API_DEBUG
         select HAVE_GENERIC_HARDIRQS
         select GENERIC_IRQ_PROBE
+        select HAVE_ARCH_JUMP_LABEL
 
 menu "Machine selection"
 
@@ -65,6 +66,22 @@ config AR7
           Support for the Texas Instruments AR7 System-on-a-Chip
           family: TNETD7100, 7200 and 7300.
 
+config ATH79
+        bool "Atheros AR71XX/AR724X/AR913X based boards"
+        select ARCH_REQUIRE_GPIOLIB
+        select BOOT_RAW
+        select CEVT_R4K
+        select CSRC_R4K
+        select DMA_NONCOHERENT
+        select IRQ_CPU
+        select MIPS_MACHINE
+        select SYS_HAS_CPU_MIPS32_R2
+        select SYS_HAS_EARLY_PRINTK
+        select SYS_SUPPORTS_32BIT_KERNEL
+        select SYS_SUPPORTS_BIG_ENDIAN
+        help
+          Support for the Atheros AR71XX/AR724X/AR913X SoCs.
+
 config BCM47XX
         bool "Broadcom BCM47XX based boards"
         select CEVT_R4K
@@ -717,6 +734,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
 endchoice
 
 source "arch/mips/alchemy/Kconfig"
+source "arch/mips/ath79/Kconfig"
 source "arch/mips/bcm63xx/Kconfig"
 source "arch/mips/jazz/Kconfig"
 source "arch/mips/jz4740/Kconfig"
@@ -775,9 +793,6 @@ config SCHED_OMIT_FRAME_POINTER
         bool
         default y
 
-config GENERIC_HARDIRQS_NO__DO_IRQ
-        def_bool y
-
 #
 # Select some configuration options automatically based on user selections.
 #
@@ -883,6 +898,9 @@ config MIPS_DISABLE_OBSOLETE_IDE
 config SYNC_R4K
         bool
 
+config MIPS_MACHINE
+        def_bool n
+
 config NO_IOPORT
         def_bool n
 
@@ -2400,4 +2418,20 @@ source "security/Kconfig"
 
 source "crypto/Kconfig"
 
+menuconfig VIRTUALIZATION
+        bool "Virtualization"
+        default n
+        ---help---
+          Say Y here to get to see options for using your Linux host to run other
+          operating systems inside virtual machines (guests).
+          This option alone does not add any kernel code.
+
+          If you say N, all options in this submenu will be skipped and disabled.
+
+if VIRTUALIZATION
+
+source drivers/virtio/Kconfig
+
+endif # VIRTUALIZATION
+
 source "lib/Kconfig"
diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug
index f437cd1fafb8..5358f90b4dd2 100644
--- a/arch/mips/Kconfig.debug
+++ b/arch/mips/Kconfig.debug
@@ -7,7 +7,7 @@ config TRACE_IRQFLAGS_SUPPORT
 source "lib/Kconfig.debug"
 
 config EARLY_PRINTK
-        bool "Early printk" if EMBEDDED
+        bool "Early printk" if EXPERT
         depends on SYS_HAS_EARLY_PRINTK
         default y
         help
diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig
new file mode 100644
index 000000000000..b05828260f7f
--- /dev/null
+++ b/arch/mips/ath79/Kconfig
@@ -0,0 +1,50 @@
+if ATH79
+
+menu "Atheros AR71XX/AR724X/AR913X machine selection"
+
+config ATH79_MACH_AP81
+        bool "Atheros AP81 reference board"
+        select SOC_AR913X
+        select ATH79_DEV_AR913X_WMAC
+        select ATH79_DEV_GPIO_BUTTONS
+        select ATH79_DEV_LEDS_GPIO
+        select ATH79_DEV_SPI
+        help
+          Say 'Y' here if you want your kernel to support the
+          Atheros AP81 reference board.
+
+config ATH79_MACH_PB44
+        bool "Atheros PB44 reference board"
+        select SOC_AR71XX
+        select ATH79_DEV_GPIO_BUTTONS
+        select ATH79_DEV_LEDS_GPIO
+        select ATH79_DEV_SPI
+        help
+          Say 'Y' here if you want your kernel to support the
+          Atheros PB44 reference board.
+
+endmenu
+
+config SOC_AR71XX
+        def_bool n
+
+config SOC_AR724X
+        def_bool n
+
+config SOC_AR913X
+        def_bool n
+
+config ATH79_DEV_AR913X_WMAC
+        depends on SOC_AR913X
+        def_bool n
+
+config ATH79_DEV_GPIO_BUTTONS
+        def_bool n
+
+config ATH79_DEV_LEDS_GPIO
+        def_bool n
+
+config ATH79_DEV_SPI
+        def_bool n
+
+endif
diff --git a/arch/mips/ath79/Makefile b/arch/mips/ath79/Makefile
new file mode 100644
index 000000000000..c33d4653007c
--- /dev/null
+++ b/arch/mips/ath79/Makefile
@@ -0,0 +1,28 @@
+#
+# Makefile for the Atheros AR71XX/AR724X/AR913X specific parts of the kernel
+#
+# Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
+# Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License version 2 as published
+# by the Free Software Foundation.
+
+obj-y   := prom.o setup.o irq.o common.o clock.o gpio.o
+
+obj-$(CONFIG_EARLY_PRINTK)              += early_printk.o
+
+#
+# Devices
+#
+obj-y                                   += dev-common.o
+obj-$(CONFIG_ATH79_DEV_AR913X_WMAC)     += dev-ar913x-wmac.o
+obj-$(CONFIG_ATH79_DEV_GPIO_BUTTONS)    += dev-gpio-buttons.o
+obj-$(CONFIG_ATH79_DEV_LEDS_GPIO)       += dev-leds-gpio.o
+obj-$(CONFIG_ATH79_DEV_SPI)             += dev-spi.o
+
+#
+# Machines
+#
+obj-$(CONFIG_ATH79_MACH_AP81)           += mach-ap81.o
+obj-$(CONFIG_ATH79_MACH_PB44)           += mach-pb44.o
diff --git a/arch/mips/ath79/Platform b/arch/mips/ath79/Platform
new file mode 100644
index 000000000000..2bd663647d27
--- /dev/null
+++ b/arch/mips/ath79/Platform
@@ -0,0 +1,7 @@
+#
+# Atheros AR71xx/AR724x/AR913x
+#
+
+platform-$(CONFIG_ATH79)        += ath79/
+cflags-$(CONFIG_ATH79)          += -I$(srctree)/arch/mips/include/asm/mach-ath79
+load-$(CONFIG_ATH79)            = 0xffffffff80060000
diff --git a/arch/mips/ath79/clock.c b/arch/mips/ath79/clock.c
new file mode 100644
index 000000000000..680bde99a26c
--- /dev/null
+++ b/arch/mips/ath79/clock.c
@@ -0,0 +1,183 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X common routines
+ *
+ *  Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include "common.h"
+
+#define AR71XX_BASE_FREQ        40000000
+#define AR724X_BASE_FREQ        5000000
+#define AR913X_BASE_FREQ        5000000
+
+struct clk {
+        unsigned long rate;
+};
+
+static struct clk ath79_ref_clk;
+static struct clk ath79_cpu_clk;
+static struct clk ath79_ddr_clk;
+static struct clk ath79_ahb_clk;
+static struct clk ath79_wdt_clk;
+static struct clk ath79_uart_clk;
+
+static void __init ar71xx_clocks_init(void)
+{
+        u32 pll;
+        u32 freq;
+        u32 div;
+
+        ath79_ref_clk.rate = AR71XX_BASE_FREQ;
+
+        pll = ath79_pll_rr(AR71XX_PLL_REG_CPU_CONFIG);
+
+        div = ((pll >> AR71XX_PLL_DIV_SHIFT) & AR71XX_PLL_DIV_MASK) + 1;
+        freq = div * ath79_ref_clk.rate;
+
+        div = ((pll >> AR71XX_CPU_DIV_SHIFT) & AR71XX_CPU_DIV_MASK) + 1;
+        ath79_cpu_clk.rate = freq / div;
+
+        div = ((pll >> AR71XX_DDR_DIV_SHIFT) & AR71XX_DDR_DIV_MASK) + 1;
+        ath79_ddr_clk.rate = freq / div;
+
+        div = (((pll >> AR71XX_AHB_DIV_SHIFT) & AR71XX_AHB_DIV_MASK) + 1) * 2;
+        ath79_ahb_clk.rate = ath79_cpu_clk.rate / div;
+
+        ath79_wdt_clk.rate = ath79_ahb_clk.rate;
+        ath79_uart_clk.rate = ath79_ahb_clk.rate;
+}
+
+static void __init ar724x_clocks_init(void)
+{
+        u32 pll;
+        u32 freq;
+        u32 div;
+
+        ath79_ref_clk.rate = AR724X_BASE_FREQ;
+        pll = ath79_pll_rr(AR724X_PLL_REG_CPU_CONFIG);
+
+        div = ((pll >> AR724X_PLL_DIV_SHIFT) & AR724X_PLL_DIV_MASK);
+        freq = div * ath79_ref_clk.rate;
+
+        div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK);
+        freq *= div;
+
+        ath79_cpu_clk.rate = freq;
+
+        div = ((pll >> AR724X_DDR_DIV_SHIFT) & AR724X_DDR_DIV_MASK) + 1;
+        ath79_ddr_clk.rate = freq / div;
+
+        div = (((pll >> AR724X_AHB_DIV_SHIFT) & AR724X_AHB_DIV_MASK) + 1) * 2;
+        ath79_ahb_clk.rate = ath79_cpu_clk.rate / div;
+
+        ath79_wdt_clk.rate = ath79_ahb_clk.rate;
+        ath79_uart_clk.rate = ath79_ahb_clk.rate;
+}
+
+static void __init ar913x_clocks_init(void)
+{
+        u32 pll;
+        u32 freq;
+        u32 div;
+
+        ath79_ref_clk.rate = AR913X_BASE_FREQ;
+        pll = ath79_pll_rr(AR913X_PLL_REG_CPU_CONFIG);
+
+        div = ((pll >> AR913X_PLL_DIV_SHIFT) & AR913X_PLL_DIV_MASK);
+        freq = div * ath79_ref_clk.rate;
+
+        ath79_cpu_clk.rate = freq;
+
+        div = ((pll >> AR913X_DDR_DIV_SHIFT) & AR913X_DDR_DIV_MASK) + 1;
+        ath79_ddr_clk.rate = freq / div;
+
+        div = (((pll >> AR913X_AHB_DIV_SHIFT) & AR913X_AHB_DIV_MASK) + 1) * 2;
+        ath79_ahb_clk.rate = ath79_cpu_clk.rate / div;
+
+        ath79_wdt_clk.rate = ath79_ahb_clk.rate;
+        ath79_uart_clk.rate = ath79_ahb_clk.rate;
+}
+
+void __init ath79_clocks_init(void)
+{
+        if (soc_is_ar71xx())
+                ar71xx_clocks_init();
+        else if (soc_is_ar724x())
+                ar724x_clocks_init();
+        else if (soc_is_ar913x())
+                ar913x_clocks_init();
+        else
+                BUG();
+
+        pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, "
+                "Ref:%lu.%03luMHz",
+                ath79_cpu_clk.rate / 1000000,
+                (ath79_cpu_clk.rate / 1000) % 1000,
+                ath79_ddr_clk.rate / 1000000,
+                (ath79_ddr_clk.rate / 1000) % 1000,
+                ath79_ahb_clk.rate / 1000000,
+                (ath79_ahb_clk.rate / 1000) % 1000,
+                ath79_ref_clk.rate / 1000000,
+                (ath79_ref_clk.rate / 1000) % 1000);
+}
+
+/*
+ * Linux clock API
+ */
+struct clk *clk_get(struct device *dev, const char *id)
+{
+        if (!strcmp(id, "ref"))
+                return &ath79_ref_clk;
+
+        if (!strcmp(id, "cpu"))
+                return &ath79_cpu_clk;
+
+        if (!strcmp(id, "ddr"))
+                return &ath79_ddr_clk;
+
+        if (!strcmp(id, "ahb"))
+                return &ath79_ahb_clk;
+
+        if (!strcmp(id, "wdt"))
+                return &ath79_wdt_clk;
+
+        if (!strcmp(id, "uart"))
+                return &ath79_uart_clk;
+
+        return ERR_PTR(-ENOENT);
+}
+EXPORT_SYMBOL(clk_get);
+
+int clk_enable(struct clk *clk)
+{
+        return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+        return clk->rate;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+void clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_put);
diff --git a/arch/mips/ath79/common.c b/arch/mips/ath79/common.c
new file mode 100644
index 000000000000..58f60e722a03
--- /dev/null
+++ b/arch/mips/ath79/common.c
@@ -0,0 +1,97 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X common routines
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/spinlock.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include "common.h"
+
+static DEFINE_SPINLOCK(ath79_device_reset_lock);
+
+u32 ath79_cpu_freq;
+EXPORT_SYMBOL_GPL(ath79_cpu_freq);
+
+u32 ath79_ahb_freq;
+EXPORT_SYMBOL_GPL(ath79_ahb_freq);
+
+u32 ath79_ddr_freq;
+EXPORT_SYMBOL_GPL(ath79_ddr_freq);
+
+enum ath79_soc_type ath79_soc;
+
+void __iomem *ath79_pll_base;
+void __iomem *ath79_reset_base;
+EXPORT_SYMBOL_GPL(ath79_reset_base);
+void __iomem *ath79_ddr_base;
+
+void ath79_ddr_wb_flush(u32 reg)
+{
+        void __iomem *flush_reg = ath79_ddr_base + reg;
+
+        /* Flush the DDR write buffer. */
+        __raw_writel(0x1, flush_reg);
+        while (__raw_readl(flush_reg) & 0x1)
+                ;
+
+        /* It must be run twice. */
+        __raw_writel(0x1, flush_reg);
+        while (__raw_readl(flush_reg) & 0x1)
+                ;
+}
+EXPORT_SYMBOL_GPL(ath79_ddr_wb_flush);
+
+void ath79_device_reset_set(u32 mask)
+{
+        unsigned long flags;
+        u32 reg;
+        u32 t;
+
+        if (soc_is_ar71xx())
+                reg = AR71XX_RESET_REG_RESET_MODULE;
+        else if (soc_is_ar724x())
+                reg = AR724X_RESET_REG_RESET_MODULE;
+        else if (soc_is_ar913x())
+                reg = AR913X_RESET_REG_RESET_MODULE;
+        else
+                BUG();
+
+        spin_lock_irqsave(&ath79_device_reset_lock, flags);
+        t = ath79_reset_rr(reg);
+        ath79_reset_wr(reg, t | mask);
+        spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
+}
+EXPORT_SYMBOL_GPL(ath79_device_reset_set);
+
+void ath79_device_reset_clear(u32 mask)
+{
+        unsigned long flags;
+        u32 reg;
+        u32 t;
+
+        if (soc_is_ar71xx())
+                reg = AR71XX_RESET_REG_RESET_MODULE;
+        else if (soc_is_ar724x())
+                reg = AR724X_RESET_REG_RESET_MODULE;
+        else if (soc_is_ar913x())
+                reg = AR913X_RESET_REG_RESET_MODULE;
+        else
+                BUG();
+
+        spin_lock_irqsave(&ath79_device_reset_lock, flags);
+        t = ath79_reset_rr(reg);
+        ath79_reset_wr(reg, t & ~mask);
+        spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
+}
+EXPORT_SYMBOL_GPL(ath79_device_reset_clear);
diff --git a/arch/mips/ath79/common.h b/arch/mips/ath79/common.h
new file mode 100644
index 000000000000..561906c2345e
--- /dev/null
+++ b/arch/mips/ath79/common.h
@@ -0,0 +1,31 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X common definitions
+ *
+ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  Parts of this file are based on Atheros' 2.6.15 BSP
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef __ATH79_COMMON_H
+#define __ATH79_COMMON_H
+
+#include <linux/types.h>
+#include <linux/init.h>
+
+#define ATH79_MEM_SIZE_MIN      (2 * 1024 * 1024)
+#define ATH79_MEM_SIZE_MAX      (128 * 1024 * 1024)
+
+void ath79_clocks_init(void);
+void ath79_ddr_wb_flush(unsigned int reg);
+
+void ath79_gpio_function_enable(u32 mask);
+void ath79_gpio_function_disable(u32 mask);
+void ath79_gpio_function_setup(u32 set, u32 clear);
+void ath79_gpio_init(void);
+
+#endif /* __ATH79_COMMON_H */
diff --git a/arch/mips/ath79/dev-ar913x-wmac.c b/arch/mips/ath79/dev-ar913x-wmac.c
new file mode 100644
index 000000000000..48f425a5ba28
--- /dev/null
+++ b/arch/mips/ath79/dev-ar913x-wmac.c
@@ -0,0 +1,60 @@
+/*
+ *  Atheros AR913X SoC built-in WMAC device support
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/ath9k_platform.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include "dev-ar913x-wmac.h"
+
+static struct ath9k_platform_data ar913x_wmac_data;
+
+static struct resource ar913x_wmac_resources[] = {
+        {
+                .start  = AR913X_WMAC_BASE,
+                .end    = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = ATH79_CPU_IRQ_IP2,
+                .end    = ATH79_CPU_IRQ_IP2,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device ar913x_wmac_device = {
+        .name           = "ath9k",
+        .id             = -1,
+        .resource       = ar913x_wmac_resources,
+        .num_resources  = ARRAY_SIZE(ar913x_wmac_resources),
+        .dev = {
+                .platform_data = &ar913x_wmac_data,
+        },
+};
+
+void __init ath79_register_ar913x_wmac(u8 *cal_data)
+{
+        if (cal_data)
+                memcpy(ar913x_wmac_data.eeprom_data, cal_data,
+                       sizeof(ar913x_wmac_data.eeprom_data));
+
+        /* reset the WMAC */
+        ath79_device_reset_set(AR913X_RESET_AMBA2WMAC);
+        mdelay(10);
+
+        ath79_device_reset_clear(AR913X_RESET_AMBA2WMAC);
+        mdelay(10);
+
+        platform_device_register(&ar913x_wmac_device);
+}
diff --git a/arch/mips/ath79/dev-ar913x-wmac.h b/arch/mips/ath79/dev-ar913x-wmac.h
new file mode 100644
index 000000000000..579d562bbda8
--- /dev/null
+++ b/arch/mips/ath79/dev-ar913x-wmac.h
@@ -0,0 +1,17 @@
+/*
+ *  Atheros AR913X SoC built-in WMAC device support
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef _ATH79_DEV_AR913X_WMAC_H
+#define _ATH79_DEV_AR913X_WMAC_H
+
+void ath79_register_ar913x_wmac(u8 *cal_data);
+
+#endif /* _ATH79_DEV_AR913X_WMAC_H */
diff --git a/arch/mips/ath79/dev-common.c b/arch/mips/ath79/dev-common.c
new file mode 100644
index 000000000000..3b82e325bebf
--- /dev/null
+++ b/arch/mips/ath79/dev-common.c
@@ -0,0 +1,77 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X common devices
+ *
+ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  Parts of this file are based on Atheros' 2.6.15 BSP
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/serial_8250.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include "common.h"
+#include "dev-common.h"
+
+static struct resource ath79_uart_resources[] = {
+        {
+                .start  = AR71XX_UART_BASE,
+                .end    = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+#define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
+static struct plat_serial8250_port ath79_uart_data[] = {
+        {
+                .mapbase        = AR71XX_UART_BASE,
+                .irq            = ATH79_MISC_IRQ_UART,
+                .flags          = AR71XX_UART_FLAGS,
+                .iotype         = UPIO_MEM32,
+                .regshift       = 2,
+        }, {
+                /* terminating entry */
+        }
+};
+
+static struct platform_device ath79_uart_device = {
+        .name           = "serial8250",
+        .id             = PLAT8250_DEV_PLATFORM,
+        .resource       = ath79_uart_resources,
+        .num_resources  = ARRAY_SIZE(ath79_uart_resources),
+        .dev = {
+                .platform_data  = ath79_uart_data
+        },
+};
+
+void __init ath79_register_uart(void)
+{
+        struct clk *clk;
+
+        clk = clk_get(NULL, "uart");
+        if (IS_ERR(clk))
+                panic("unable to get UART clock, err=%ld", PTR_ERR(clk));
+
+        ath79_uart_data[0].uartclk = clk_get_rate(clk);
+        platform_device_register(&ath79_uart_device);
+}
+
+static struct platform_device ath79_wdt_device = {
+        .name           = "ath79-wdt",
+        .id             = -1,
+};
+
+void __init ath79_register_wdt(void)
+{
+        platform_device_register(&ath79_wdt_device);
+}
diff --git a/arch/mips/ath79/dev-common.h b/arch/mips/ath79/dev-common.h
new file mode 100644
index 000000000000..0f514e1affce
--- /dev/null
+++ b/arch/mips/ath79/dev-common.h
@@ -0,0 +1,18 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X common devices
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef _ATH79_DEV_COMMON_H
+#define _ATH79_DEV_COMMON_H
+
+void ath79_register_uart(void);
+void ath79_register_wdt(void);
+
+#endif /* _ATH79_DEV_COMMON_H */
diff --git a/arch/mips/ath79/dev-gpio-buttons.c b/arch/mips/ath79/dev-gpio-buttons.c
new file mode 100644
index 000000000000..4b0168a11c01
--- /dev/null
+++ b/arch/mips/ath79/dev-gpio-buttons.c
@@ -0,0 +1,58 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X GPIO button support
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include "linux/init.h"
+#include "linux/slab.h"
+#include <linux/platform_device.h>
+
+#include "dev-gpio-buttons.h"
+
+void __init ath79_register_gpio_keys_polled(int id,
+                                            unsigned poll_interval,
+                                            unsigned nbuttons,
+                                            struct gpio_keys_button *buttons)
+{
+        struct platform_device *pdev;
+        struct gpio_keys_platform_data pdata;
+        struct gpio_keys_button *p;
+        int err;
+
+        p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);
+        if (!p)
+                return;
+
+        memcpy(p, buttons, nbuttons * sizeof(*p));
+
+        pdev = platform_device_alloc("gpio-keys-polled", id);
+        if (!pdev)
+                goto err_free_buttons;
+
+        memset(&pdata, 0, sizeof(pdata));
+        pdata.poll_interval = poll_interval;
+        pdata.nbuttons = nbuttons;
+        pdata.buttons = p;
+
+        err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
+        if (err)
+                goto err_put_pdev;
+
+        err = platform_device_add(pdev);
+        if (err)
+                goto err_put_pdev;
+
+        return;
+
+err_put_pdev:
+        platform_device_put(pdev);
+
+err_free_buttons:
+        kfree(p);
+}
diff --git a/arch/mips/ath79/dev-gpio-buttons.h b/arch/mips/ath79/dev-gpio-buttons.h
new file mode 100644
index 000000000000..481847ac1cba
--- /dev/null
+++ b/arch/mips/ath79/dev-gpio-buttons.h
@@ -0,0 +1,23 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X GPIO button support
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef _ATH79_DEV_GPIO_BUTTONS_H
+#define _ATH79_DEV_GPIO_BUTTONS_H
+
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+
+void ath79_register_gpio_keys_polled(int id,
+                                     unsigned poll_interval,
+                                     unsigned nbuttons,
+                                     struct gpio_keys_button *buttons);
+
+#endif /* _ATH79_DEV_GPIO_BUTTONS_H */
diff --git a/arch/mips/ath79/dev-leds-gpio.c b/arch/mips/ath79/dev-leds-gpio.c
new file mode 100644
index 000000000000..cdade68dcd17
--- /dev/null
+++ b/arch/mips/ath79/dev-leds-gpio.c
@@ -0,0 +1,56 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X common GPIO LEDs support
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/platform_device.h>
+
+#include "dev-leds-gpio.h"
+
+void __init ath79_register_leds_gpio(int id,
+                                     unsigned num_leds,
+                                     struct gpio_led *leds)
+{
+        struct platform_device *pdev;
+        struct gpio_led_platform_data pdata;
+        struct gpio_led *p;
+        int err;
+
+        p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
+        if (!p)
+                return;
+
+        memcpy(p, leds, num_leds * sizeof(*p));
+
+        pdev = platform_device_alloc("leds-gpio", id);
+        if (!pdev)
+                goto err_free_leds;
+
+        memset(&pdata, 0, sizeof(pdata));
+        pdata.num_leds = num_leds;
+        pdata.leds = p;
+
+        err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
+        if (err)
+                goto err_put_pdev;
+
+        err = platform_device_add(pdev);
+        if (err)
+                goto err_put_pdev;
+
+        return;
+
+err_put_pdev:
+        platform_device_put(pdev);
+
+err_free_leds:
+        kfree(p);
+}
diff --git a/arch/mips/ath79/dev-leds-gpio.h b/arch/mips/ath79/dev-leds-gpio.h
new file mode 100644
index 000000000000..6e5d8851ebcf
--- /dev/null
+++ b/arch/mips/ath79/dev-leds-gpio.h
@@ -0,0 +1,21 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X common GPIO LEDs support
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef _ATH79_DEV_LEDS_GPIO_H
+#define _ATH79_DEV_LEDS_GPIO_H
+
+#include <linux/leds.h>
+
+void ath79_register_leds_gpio(int id,
+                              unsigned num_leds,
+                              struct gpio_led *leds);
+
+#endif /* _ATH79_DEV_LEDS_GPIO_H */
diff --git a/arch/mips/ath79/dev-spi.c b/arch/mips/ath79/dev-spi.c
new file mode 100644
index 000000000000..aa30163efbfd
--- /dev/null
+++ b/arch/mips/ath79/dev-spi.c
@@ -0,0 +1,38 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X SPI controller device
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include "dev-spi.h"
+
+static struct resource ath79_spi_resources[] = {
+        {
+                .start  = AR71XX_SPI_BASE,
+                .end    = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device ath79_spi_device = {
+        .name           = "ath79-spi",
+        .id             = -1,
+        .resource       = ath79_spi_resources,
+        .num_resources  = ARRAY_SIZE(ath79_spi_resources),
+};
+
+void __init ath79_register_spi(struct ath79_spi_platform_data *pdata,
+                               struct spi_board_info const *info,
+                               unsigned n)
+{
+        spi_register_board_info(info, n);
+        ath79_spi_device.dev.platform_data = pdata;
+        platform_device_register(&ath79_spi_device);
+}
diff --git a/arch/mips/ath79/dev-spi.h b/arch/mips/ath79/dev-spi.h
new file mode 100644
index 000000000000..d732565ca736
--- /dev/null
+++ b/arch/mips/ath79/dev-spi.h
@@ -0,0 +1,22 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X SPI controller device
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef _ATH79_DEV_SPI_H
+#define _ATH79_DEV_SPI_H
+
+#include <linux/spi/spi.h>
+#include <asm/mach-ath79/ath79_spi_platform.h>
+
+void ath79_register_spi(struct ath79_spi_platform_data *pdata,
+                         struct spi_board_info const *info,
+                         unsigned n);
+
+#endif /* _ATH79_DEV_SPI_H */
diff --git a/arch/mips/ath79/early_printk.c b/arch/mips/ath79/early_printk.c
new file mode 100644
index 000000000000..7499b0e9df26
--- /dev/null
+++ b/arch/mips/ath79/early_printk.c
@@ -0,0 +1,36 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X SoC early printk support
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/io.h>
+#include <linux/serial_reg.h>
+#include <asm/addrspace.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+static inline void prom_wait_thre(void __iomem *base)
+{
+        u32 lsr;
+
+        do {
+                lsr = __raw_readl(base + UART_LSR * 4);
+                if (lsr & UART_LSR_THRE)
+                        break;
+        } while (1);
+}
+
+void prom_putchar(unsigned char ch)
+{
+        void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE));
+
+        prom_wait_thre(base);
+        __raw_writel(ch, base + UART_TX * 4);
+        prom_wait_thre(base);
+}
diff --git a/arch/mips/ath79/gpio.c b/arch/mips/ath79/gpio.c
new file mode 100644
index 000000000000..a0c426b82123
--- /dev/null
+++ b/arch/mips/ath79/gpio.c
@@ -0,0 +1,197 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X GPIO API support
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include <asm/mach-ath79/ath79.h>
+#include "common.h"
+
+static void __iomem *ath79_gpio_base;
+static unsigned long ath79_gpio_count;
+static DEFINE_SPINLOCK(ath79_gpio_lock);
+
+static void __ath79_gpio_set_value(unsigned gpio, int value)
+{
+        void __iomem *base = ath79_gpio_base;
+
+        if (value)
+                __raw_writel(1 << gpio, base + AR71XX_GPIO_REG_SET);
+        else
+                __raw_writel(1 << gpio, base + AR71XX_GPIO_REG_CLEAR);
+}
+
+static int __ath79_gpio_get_value(unsigned gpio)
+{
+        return (__raw_readl(ath79_gpio_base + AR71XX_GPIO_REG_IN) >> gpio) & 1;
+}
+
+static int ath79_gpio_get_value(struct gpio_chip *chip, unsigned offset)
+{
+        return __ath79_gpio_get_value(offset);
+}
+
+static void ath79_gpio_set_value(struct gpio_chip *chip,
+                                  unsigned offset, int value)
+{
+        __ath79_gpio_set_value(offset, value);
+}
+
+static int ath79_gpio_direction_input(struct gpio_chip *chip,
+                                       unsigned offset)
+{
+        void __iomem *base = ath79_gpio_base;
+        unsigned long flags;
+
+        spin_lock_irqsave(&ath79_gpio_lock, flags);
+
+        __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << offset),
+                     base + AR71XX_GPIO_REG_OE);
+
+        spin_unlock_irqrestore(&ath79_gpio_lock, flags);
+
+        return 0;
+}
+
+static int ath79_gpio_direction_output(struct gpio_chip *chip,
+                                        unsigned offset, int value)
+{
+        void __iomem *base = ath79_gpio_base;
+        unsigned long flags;
+
+        spin_lock_irqsave(&ath79_gpio_lock, flags);
+
+        if (value)
+                __raw_writel(1 << offset, base + AR71XX_GPIO_REG_SET);
+        else
+                __raw_writel(1 << offset, base + AR71XX_GPIO_REG_CLEAR);
+
+        __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << offset),
+                     base + AR71XX_GPIO_REG_OE);
+
+        spin_unlock_irqrestore(&ath79_gpio_lock, flags);
+
+        return 0;
+}
+
+static struct gpio_chip ath79_gpio_chip = {
+        .label                  = "ath79",
+        .get                    = ath79_gpio_get_value,
+        .set                    = ath79_gpio_set_value,
+        .direction_input        = ath79_gpio_direction_input,
+        .direction_output       = ath79_gpio_direction_output,
+        .base                   = 0,
+};
+
+void ath79_gpio_function_enable(u32 mask)
+{
+        void __iomem *base = ath79_gpio_base;
+        unsigned long flags;
+
+        spin_lock_irqsave(&ath79_gpio_lock, flags);
+
+        __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_FUNC) | mask,
+                     base + AR71XX_GPIO_REG_FUNC);
+        /* flush write */
+        __raw_readl(base + AR71XX_GPIO_REG_FUNC);
+
+        spin_unlock_irqrestore(&ath79_gpio_lock, flags);
+}
+
+void ath79_gpio_function_disable(u32 mask)
+{
+        void __iomem *base = ath79_gpio_base;
+        unsigned long flags;
+
+        spin_lock_irqsave(&ath79_gpio_lock, flags);
+
+        __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_FUNC) & ~mask,
+                     base + AR71XX_GPIO_REG_FUNC);
+        /* flush write */
+        __raw_readl(base + AR71XX_GPIO_REG_FUNC);
+
+        spin_unlock_irqrestore(&ath79_gpio_lock, flags);
+}
+
+void ath79_gpio_function_setup(u32 set, u32 clear)
+{
+        void __iomem *base = ath79_gpio_base;
+        unsigned long flags;
+
+        spin_lock_irqsave(&ath79_gpio_lock, flags);
+
+        __raw_writel((__raw_readl(base + AR71XX_GPIO_REG_FUNC) & ~clear) | set,
+                     base + AR71XX_GPIO_REG_FUNC);
+        /* flush write */
+        __raw_readl(base + AR71XX_GPIO_REG_FUNC);
+
+        spin_unlock_irqrestore(&ath79_gpio_lock, flags);
+}
+
+void __init ath79_gpio_init(void)
+{
+        int err;
+
+        if (soc_is_ar71xx())
+                ath79_gpio_count = AR71XX_GPIO_COUNT;
+        else if (soc_is_ar724x())
+                ath79_gpio_count = AR724X_GPIO_COUNT;
+        else if (soc_is_ar913x())
+                ath79_gpio_count = AR913X_GPIO_COUNT;
+        else
+                BUG();
+
+        ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);
+        ath79_gpio_chip.ngpio = ath79_gpio_count;
+
+        err = gpiochip_add(&ath79_gpio_chip);
+        if (err)
+                panic("cannot add AR71xx GPIO chip, error=%d", err);
+}
+
+int gpio_get_value(unsigned gpio)
+{
+        if (gpio < ath79_gpio_count)
+                return __ath79_gpio_get_value(gpio);
+
+        return __gpio_get_value(gpio);
+}
+EXPORT_SYMBOL(gpio_get_value);
+
+void gpio_set_value(unsigned gpio, int value)
+{
+        if (gpio < ath79_gpio_count)
+                __ath79_gpio_set_value(gpio, value);
+        else
+                __gpio_set_value(gpio, value);
+}
+EXPORT_SYMBOL(gpio_set_value);
+
+int gpio_to_irq(unsigned gpio)
+{
+        /* FIXME */
+        return -EINVAL;
+}
+EXPORT_SYMBOL(gpio_to_irq);
+
+int irq_to_gpio(unsigned irq)
+{
+        /* FIXME */
+        return -EINVAL;
+}
+EXPORT_SYMBOL(irq_to_gpio);
diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c
new file mode 100644
index 000000000000..1bf7f719ba53
--- /dev/null
+++ b/arch/mips/ath79/irq.c
@@ -0,0 +1,187 @@
+/*
+ *  Atheros AR71xx/AR724x/AR913x specific interrupt handling
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  Parts of this file are based on Atheros' 2.6.15 BSP
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+
+#include <asm/irq_cpu.h>
+#include <asm/mipsregs.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include "common.h"
+
+static unsigned int ath79_ip2_flush_reg;
+static unsigned int ath79_ip3_flush_reg;
+
+static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc)
+{
+        void __iomem *base = ath79_reset_base;
+        u32 pending;
+
+        pending = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS) &
+                  __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+
+        if (pending & MISC_INT_UART)
+                generic_handle_irq(ATH79_MISC_IRQ_UART);
+
+        else if (pending & MISC_INT_DMA)
+                generic_handle_irq(ATH79_MISC_IRQ_DMA);
+
+        else if (pending & MISC_INT_PERFC)
+                generic_handle_irq(ATH79_MISC_IRQ_PERFC);
+
+        else if (pending & MISC_INT_TIMER)
+                generic_handle_irq(ATH79_MISC_IRQ_TIMER);
+
+        else if (pending & MISC_INT_OHCI)
+                generic_handle_irq(ATH79_MISC_IRQ_OHCI);
+
+        else if (pending & MISC_INT_ERROR)
+                generic_handle_irq(ATH79_MISC_IRQ_ERROR);
+
+        else if (pending & MISC_INT_GPIO)
+                generic_handle_irq(ATH79_MISC_IRQ_GPIO);
+
+        else if (pending & MISC_INT_WDOG)
+                generic_handle_irq(ATH79_MISC_IRQ_WDOG);
+
+        else
+                spurious_interrupt();
+}
+
+static void ar71xx_misc_irq_unmask(unsigned int irq)
+{
+        void __iomem *base = ath79_reset_base;
+        u32 t;
+
+        irq -= ATH79_MISC_IRQ_BASE;
+
+        t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+        __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+
+        /* flush write */
+        __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+}
+
+static void ar71xx_misc_irq_mask(unsigned int irq)
+{
+        void __iomem *base = ath79_reset_base;
+        u32 t;
+
+        irq -= ATH79_MISC_IRQ_BASE;
+
+        t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+        __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+
+        /* flush write */
+        __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+}
+
+static void ar724x_misc_irq_ack(unsigned int irq)
+{
+        void __iomem *base = ath79_reset_base;
+        u32 t;
+
+        irq -= ATH79_MISC_IRQ_BASE;
+
+        t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS);
+        __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_STATUS);
+
+        /* flush write */
+        __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS);
+}
+
+static struct irq_chip ath79_misc_irq_chip = {
+        .name           = "MISC",
+        .unmask         = ar71xx_misc_irq_unmask,
+        .mask           = ar71xx_misc_irq_mask,
+};
+
+static void __init ath79_misc_irq_init(void)
+{
+        void __iomem *base = ath79_reset_base;
+        int i;
+
+        __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+        __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS);
+
+        if (soc_is_ar71xx() || soc_is_ar913x())
+                ath79_misc_irq_chip.mask_ack = ar71xx_misc_irq_mask;
+        else if (soc_is_ar724x())
+                ath79_misc_irq_chip.ack = ar724x_misc_irq_ack;
+        else
+                BUG();
+
+        for (i = ATH79_MISC_IRQ_BASE;
+             i < ATH79_MISC_IRQ_BASE + ATH79_MISC_IRQ_COUNT; i++) {
+                irq_desc[i].status = IRQ_DISABLED;
+                set_irq_chip_and_handler(i, &ath79_misc_irq_chip,
+                                         handle_level_irq);
+        }
+
+        set_irq_chained_handler(ATH79_CPU_IRQ_MISC, ath79_misc_irq_handler);
+}
+
+asmlinkage void plat_irq_dispatch(void)
+{
+        unsigned long pending;
+
+        pending = read_c0_status() & read_c0_cause() & ST0_IM;
+
+        if (pending & STATUSF_IP7)
+                do_IRQ(ATH79_CPU_IRQ_TIMER);
+
+        else if (pending & STATUSF_IP2) {
+                ath79_ddr_wb_flush(ath79_ip2_flush_reg);
+                do_IRQ(ATH79_CPU_IRQ_IP2);
+        }
+
+        else if (pending & STATUSF_IP4)
+                do_IRQ(ATH79_CPU_IRQ_GE0);
+
+        else if (pending & STATUSF_IP5)
+                do_IRQ(ATH79_CPU_IRQ_GE1);
+
+        else if (pending & STATUSF_IP3) {
+                ath79_ddr_wb_flush(ath79_ip3_flush_reg);
+                do_IRQ(ATH79_CPU_IRQ_USB);
+        }
+
+        else if (pending & STATUSF_IP6)
+                do_IRQ(ATH79_CPU_IRQ_MISC);
+
+        else
+                spurious_interrupt();
+}
+
+void __init arch_init_irq(void)
+{
+        if (soc_is_ar71xx()) {
+                ath79_ip2_flush_reg = AR71XX_DDR_REG_FLUSH_PCI;
+                ath79_ip3_flush_reg = AR71XX_DDR_REG_FLUSH_USB;
+        } else if (soc_is_ar724x()) {
+                ath79_ip2_flush_reg = AR724X_DDR_REG_FLUSH_PCIE;
+                ath79_ip3_flush_reg = AR724X_DDR_REG_FLUSH_USB;
+        } else if (soc_is_ar913x()) {
+                ath79_ip2_flush_reg = AR913X_DDR_REG_FLUSH_WMAC;
+                ath79_ip3_flush_reg = AR913X_DDR_REG_FLUSH_USB;
+        } else
+                BUG();
+
+        cp0_perfcount_irq = ATH79_MISC_IRQ_PERFC;
+        mips_cpu_irq_init();
+        ath79_misc_irq_init();
+}
diff --git a/arch/mips/ath79/mach-ap81.c b/arch/mips/ath79/mach-ap81.c
new file mode 100644
index 000000000000..eee4c121deb4
--- /dev/null
+++ b/arch/mips/ath79/mach-ap81.c
@@ -0,0 +1,98 @@
+/*
+ *  Atheros AP81 board support
+ *
+ *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2009 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include "machtypes.h"
+#include "dev-ar913x-wmac.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-spi.h"
+
+#define AP81_GPIO_LED_STATUS    1
+#define AP81_GPIO_LED_AOSS      3
+#define AP81_GPIO_LED_WLAN      6
+#define AP81_GPIO_LED_POWER     14
+
+#define AP81_GPIO_BTN_SW4       12
+#define AP81_GPIO_BTN_SW1       21
+
+#define AP81_KEYS_POLL_INTERVAL         20      /* msecs */
+#define AP81_KEYS_DEBOUNCE_INTERVAL     (3 * AP81_KEYS_POLL_INTERVAL)
+
+#define AP81_CAL_DATA_ADDR      0x1fff1000
+
+static struct gpio_led ap81_leds_gpio[] __initdata = {
+        {
+                .name           = "ap81:green:status",
+                .gpio           = AP81_GPIO_LED_STATUS,
+                .active_low     = 1,
+        }, {
+                .name           = "ap81:amber:aoss",
+                .gpio           = AP81_GPIO_LED_AOSS,
+                .active_low     = 1,
+        }, {
+                .name           = "ap81:green:wlan",
+                .gpio           = AP81_GPIO_LED_WLAN,
+                .active_low     = 1,
+        }, {
+                .name           = "ap81:green:power",
+                .gpio           = AP81_GPIO_LED_POWER,
+                .active_low     = 1,
+        }
+};
+
+static struct gpio_keys_button ap81_gpio_keys[] __initdata = {
+        {
+                .desc           = "sw1",
+                .type           = EV_KEY,
+                .code           = BTN_0,
+                .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL,
+                .gpio           = AP81_GPIO_BTN_SW1,
+                .active_low     = 1,
+        } , {
+                .desc           = "sw4",
+                .type           = EV_KEY,
+                .code           = BTN_1,
+                .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL,
+                .gpio           = AP81_GPIO_BTN_SW4,
+                .active_low     = 1,
+        }
+};
+
+static struct spi_board_info ap81_spi_info[] = {
+        {
+                .bus_num        = 0,
+                .chip_select    = 0,
+                .max_speed_hz   = 25000000,
+                .modalias       = "m25p64",
+        }
+};
+
+static struct ath79_spi_platform_data ap81_spi_data = {
+        .bus_num        = 0,
+        .num_chipselect = 1,
+};
+
+static void __init ap81_setup(void)
+{
+        u8 *cal_data = (u8 *) KSEG1ADDR(AP81_CAL_DATA_ADDR);
+
+        ath79_register_leds_gpio(-1, ARRAY_SIZE(ap81_leds_gpio),
+                                 ap81_leds_gpio);
+        ath79_register_gpio_keys_polled(-1, AP81_KEYS_POLL_INTERVAL,
+                                        ARRAY_SIZE(ap81_gpio_keys),
+                                        ap81_gpio_keys);
+        ath79_register_spi(&ap81_spi_data, ap81_spi_info,
+                           ARRAY_SIZE(ap81_spi_info));
+        ath79_register_ar913x_wmac(cal_data);
+}
+
+MIPS_MACHINE(ATH79_MACH_AP81, "AP81", "Atheros AP81 reference board",
+             ap81_setup);
diff --git a/arch/mips/ath79/mach-pb44.c b/arch/mips/ath79/mach-pb44.c
new file mode 100644
index 000000000000..ec7b7a135d53
--- /dev/null
+++ b/arch/mips/ath79/mach-pb44.c
@@ -0,0 +1,118 @@
+/*
+ *  Atheros PB44 reference board support
+ *
+ *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/i2c-gpio.h>
+#include <linux/i2c/pcf857x.h>
+
+#include "machtypes.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-spi.h"
+
+#define PB44_GPIO_I2C_SCL       0
+#define PB44_GPIO_I2C_SDA       1
+
+#define PB44_GPIO_EXP_BASE      16
+#define PB44_GPIO_SW_RESET      (PB44_GPIO_EXP_BASE + 6)
+#define PB44_GPIO_SW_JUMP       (PB44_GPIO_EXP_BASE + 8)
+#define PB44_GPIO_LED_JUMP1     (PB44_GPIO_EXP_BASE + 9)
+#define PB44_GPIO_LED_JUMP2     (PB44_GPIO_EXP_BASE + 10)
+
+#define PB44_KEYS_POLL_INTERVAL         20      /* msecs */
+#define PB44_KEYS_DEBOUNCE_INTERVAL     (3 * PB44_KEYS_POLL_INTERVAL)
+
+static struct i2c_gpio_platform_data pb44_i2c_gpio_data = {
+        .sda_pin        = PB44_GPIO_I2C_SDA,
+        .scl_pin        = PB44_GPIO_I2C_SCL,
+};
+
+static struct platform_device pb44_i2c_gpio_device = {
+        .name           = "i2c-gpio",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &pb44_i2c_gpio_data,
+        }
+};
+
+static struct pcf857x_platform_data pb44_pcf857x_data = {
+        .gpio_base      = PB44_GPIO_EXP_BASE,
+};
+
+static struct i2c_board_info pb44_i2c_board_info[] __initdata = {
+        {
+                I2C_BOARD_INFO("pcf8575", 0x20),
+                .platform_data  = &pb44_pcf857x_data,
+        },
+};
+
+static struct gpio_led pb44_leds_gpio[] __initdata = {
+        {
+                .name           = "pb44:amber:jump1",
+                .gpio           = PB44_GPIO_LED_JUMP1,
+                .active_low     = 1,
+        }, {
+                .name           = "pb44:green:jump2",
+                .gpio           = PB44_GPIO_LED_JUMP2,
+                .active_low     = 1,
+        },
+};
+
+static struct gpio_keys_button pb44_gpio_keys[] __initdata = {
+        {
+                .desc           = "soft_reset",
+                .type           = EV_KEY,
+                .code           = KEY_RESTART,
+                .debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL,
+                .gpio           = PB44_GPIO_SW_RESET,
+                .active_low     = 1,
+        } , {
+                .desc           = "jumpstart",
+                .type           = EV_KEY,
+                .code           = KEY_WPS_BUTTON,
+                .debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL,
+                .gpio           = PB44_GPIO_SW_JUMP,
+                .active_low     = 1,
+        }
+};
+
+static struct spi_board_info pb44_spi_info[] = {
+        {
+                .bus_num        = 0,
+                .chip_select    = 0,
+                .max_speed_hz   = 25000000,
+                .modalias       = "m25p64",
+        },
+};
+
+static struct ath79_spi_platform_data pb44_spi_data = {
+        .bus_num                = 0,
+        .num_chipselect         = 1,
+};
+
+static void __init pb44_init(void)
+{
+        i2c_register_board_info(0, pb44_i2c_board_info,
+                                ARRAY_SIZE(pb44_i2c_board_info));
+        platform_device_register(&pb44_i2c_gpio_device);
+
+        ath79_register_leds_gpio(-1, ARRAY_SIZE(pb44_leds_gpio),
+                                 pb44_leds_gpio);
+        ath79_register_gpio_keys_polled(-1, PB44_KEYS_POLL_INTERVAL,
+                                        ARRAY_SIZE(pb44_gpio_keys),
+                                        pb44_gpio_keys);
+        ath79_register_spi(&pb44_spi_data, pb44_spi_info,
+                           ARRAY_SIZE(pb44_spi_info));
+}
+
+MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board",
+             pb44_init);
diff --git a/arch/mips/ath79/machtypes.h b/arch/mips/ath79/machtypes.h
new file mode 100644
index 000000000000..3940fe470b2d
--- /dev/null
+++ b/arch/mips/ath79/machtypes.h
@@ -0,0 +1,23 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X machine type definitions
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef _ATH79_MACHTYPE_H
+#define _ATH79_MACHTYPE_H
+
+#include <asm/mips_machine.h>
+
+enum ath79_mach_type {
+        ATH79_MACH_GENERIC = 0,
+        ATH79_MACH_AP81,                /* Atheros AP81 reference board */
+        ATH79_MACH_PB44,                /* Atheros PB44 reference board */
+};
+
+#endif /* _ATH79_MACHTYPE_H */
diff --git a/arch/mips/ath79/prom.c b/arch/mips/ath79/prom.c
new file mode 100644
index 000000000000..e9cbd7c2918f
--- /dev/null
+++ b/arch/mips/ath79/prom.c
@@ -0,0 +1,57 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X specific prom routines
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/string.h>
+
+#include <asm/bootinfo.h>
+#include <asm/addrspace.h>
+
+#include "common.h"
+
+static inline int is_valid_ram_addr(void *addr)
+{
+        if (((u32) addr > KSEG0) &&
+            ((u32) addr < (KSEG0 + ATH79_MEM_SIZE_MAX)))
+                return 1;
+
+        if (((u32) addr > KSEG1) &&
+            ((u32) addr < (KSEG1 + ATH79_MEM_SIZE_MAX)))
+                return 1;
+
+        return 0;
+}
+
+static __init void ath79_prom_init_cmdline(int argc, char **argv)
+{
+        int i;
+
+        if (!is_valid_ram_addr(argv))
+                return;
+
+        for (i = 0; i < argc; i++)
+                if (is_valid_ram_addr(argv[i])) {
+                        strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline));
+                        strlcat(arcs_cmdline, argv[i], sizeof(arcs_cmdline));
+                }
+}
+
+void __init prom_init(void)
+{
+        ath79_prom_init_cmdline(fw_arg0, (char **)fw_arg1);
+}
+
+void __init prom_free_prom_memory(void)
+{
+        /* We do not have to prom memory to free */
+}
diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c
new file mode 100644
index 000000000000..159b42f106b0
--- /dev/null
+++ b/arch/mips/ath79/setup.c
@@ -0,0 +1,206 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X specific setup
+ *
+ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  Parts of this file are based on Atheros' 2.6.15 BSP
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/bootmem.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+
+#include <asm/bootinfo.h>
+#include <asm/time.h>           /* for mips_hpt_frequency */
+#include <asm/reboot.h>         /* for _machine_{restart,halt} */
+#include <asm/mips_machine.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include "common.h"
+#include "dev-common.h"
+#include "machtypes.h"
+
+#define ATH79_SYS_TYPE_LEN      64
+
+#define AR71XX_BASE_FREQ        40000000
+#define AR724X_BASE_FREQ        5000000
+#define AR913X_BASE_FREQ        5000000
+
+static char ath79_sys_type[ATH79_SYS_TYPE_LEN];
+
+static void ath79_restart(char *command)
+{
+        ath79_device_reset_set(AR71XX_RESET_FULL_CHIP);
+        for (;;)
+                if (cpu_wait)
+                        cpu_wait();
+}
+
+static void ath79_halt(void)
+{
+        while (1)
+                cpu_wait();
+}
+
+static void __init ath79_detect_mem_size(void)
+{
+        unsigned long size;
+
+        for (size = ATH79_MEM_SIZE_MIN; size < ATH79_MEM_SIZE_MAX;
+             size <<= 1) {
+                if (!memcmp(ath79_detect_mem_size,
+                            ath79_detect_mem_size + size, 1024))
+                        break;
+        }
+
+        add_memory_region(0, size, BOOT_MEM_RAM);
+}
+
+static void __init ath79_detect_sys_type(void)
+{
+        char *chip = "????";
+        u32 id;
+        u32 major;
+        u32 minor;
+        u32 rev = 0;
+
+        id = ath79_reset_rr(AR71XX_RESET_REG_REV_ID);
+        major = id & REV_ID_MAJOR_MASK;
+
+        switch (major) {
+        case REV_ID_MAJOR_AR71XX:
+                minor = id & AR71XX_REV_ID_MINOR_MASK;
+                rev = id >> AR71XX_REV_ID_REVISION_SHIFT;
+                rev &= AR71XX_REV_ID_REVISION_MASK;
+                switch (minor) {
+                case AR71XX_REV_ID_MINOR_AR7130:
+                        ath79_soc = ATH79_SOC_AR7130;
+                        chip = "7130";
+                        break;
+
+                case AR71XX_REV_ID_MINOR_AR7141:
+                        ath79_soc = ATH79_SOC_AR7141;
+                        chip = "7141";
+                        break;
+
+                case AR71XX_REV_ID_MINOR_AR7161:
+                        ath79_soc = ATH79_SOC_AR7161;
+                        chip = "7161";
+                        break;
+                }
+                break;
+
+        case REV_ID_MAJOR_AR7240:
+                ath79_soc = ATH79_SOC_AR7240;
+                chip = "7240";
+                rev = (id & AR724X_REV_ID_REVISION_MASK);
+                break;
+
+        case REV_ID_MAJOR_AR7241:
+                ath79_soc = ATH79_SOC_AR7241;
+                chip = "7241";
+                rev = (id & AR724X_REV_ID_REVISION_MASK);
+                break;
+
+        case REV_ID_MAJOR_AR7242:
+                ath79_soc = ATH79_SOC_AR7242;
+                chip = "7242";
+                rev = (id & AR724X_REV_ID_REVISION_MASK);
+                break;
+
+        case REV_ID_MAJOR_AR913X:
+                minor = id & AR913X_REV_ID_MINOR_MASK;
+                rev = id >> AR913X_REV_ID_REVISION_SHIFT;
+                rev &= AR913X_REV_ID_REVISION_MASK;
+                switch (minor) {
+                case AR913X_REV_ID_MINOR_AR9130:
+                        ath79_soc = ATH79_SOC_AR9130;
+                        chip = "9130";
+                        break;
+
+                case AR913X_REV_ID_MINOR_AR9132:
+                        ath79_soc = ATH79_SOC_AR9132;
+                        chip = "9132";
+                        break;
+                }
+                break;
+
+        default:
+                panic("ath79: unknown SoC, id:0x%08x\n", id);
+        }
+
+        sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev);
+        pr_info("SoC: %s\n", ath79_sys_type);
+}
+
+const char *get_system_type(void)
+{
+        return ath79_sys_type;
+}
+
+unsigned int __cpuinit get_c0_compare_int(void)
+{
+        return CP0_LEGACY_COMPARE_IRQ;
+}
+
+void __init plat_mem_setup(void)
+{
+        set_io_port_base(KSEG1);
+
+        ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE,
+                                           AR71XX_RESET_SIZE);
+        ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE,
+                                         AR71XX_PLL_SIZE);
+        ath79_ddr_base = ioremap_nocache(AR71XX_DDR_CTRL_BASE,
+                                         AR71XX_DDR_CTRL_SIZE);
+
+        ath79_detect_sys_type();
+        ath79_detect_mem_size();
+        ath79_clocks_init();
+
+        _machine_restart = ath79_restart;
+        _machine_halt = ath79_halt;
+        pm_power_off = ath79_halt;
+}
+
+void __init plat_time_init(void)
+{
+        struct clk *clk;
+
+        clk = clk_get(NULL, "cpu");
+        if (IS_ERR(clk))
+                panic("unable to get CPU clock, err=%ld", PTR_ERR(clk));
+
+        mips_hpt_frequency = clk_get_rate(clk) / 2;
+}
+
+static int __init ath79_setup(void)
+{
+        ath79_gpio_init();
+        ath79_register_uart();
+        ath79_register_wdt();
+
+        mips_machine_setup();
+
+        return 0;
+}
+
+arch_initcall(ath79_setup);
+
+static void __init ath79_generic_init(void)
+{
+        /* Nothing to do */
+}
+
+MIPS_MACHINE(ATH79_MACH_GENERIC,
+             "Generic",
+             "Generic AR71XX/AR724X/AR913X based board",
+             ath79_generic_init);
diff --git a/arch/mips/configs/ar7_defconfig b/arch/mips/configs/ar7_defconfig
index c78c7e7e41df..6cd5a519ce5c 100644
--- a/arch/mips/configs/ar7_defconfig
+++ b/arch/mips/configs/ar7_defconfig
@@ -14,7 +14,7 @@ CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_RELAY=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_RD_LZMA=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_PCSPKR_PLATFORM is not set
diff --git a/arch/mips/configs/bcm47xx_defconfig b/arch/mips/configs/bcm47xx_defconfig
index 927d58b2cd03..22fdf2f0cc23 100644
--- a/arch/mips/configs/bcm47xx_defconfig
+++ b/arch/mips/configs/bcm47xx_defconfig
@@ -21,7 +21,7 @@ CONFIG_CGROUP_CPUACCT=y
 CONFIG_RELAY=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_RD_LZMA=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/mips/configs/bcm63xx_defconfig b/arch/mips/configs/bcm63xx_defconfig
index b806a4e32896..919005139f5a 100644
--- a/arch/mips/configs/bcm63xx_defconfig
+++ b/arch/mips/configs/bcm63xx_defconfig
@@ -10,7 +10,7 @@ CONFIG_EXPERIMENTAL=y
 # CONFIG_SWAP is not set
 CONFIG_TINY_RCU=y
 CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_PCSPKR_PLATFORM is not set
 # CONFIG_FUTEX is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig
index 9749bc8758db..1cdff6b6327d 100644
--- a/arch/mips/configs/bigsur_defconfig
+++ b/arch/mips/configs/bigsur_defconfig
@@ -26,7 +26,7 @@ CONFIG_PID_NS=y
 CONFIG_NET_NS=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_PCSPKR_PLATFORM is not set
 CONFIG_SLAB=y
diff --git a/arch/mips/configs/capcella_defconfig b/arch/mips/configs/capcella_defconfig
index 502a8e9c084b..5135dc0b950a 100644
--- a/arch/mips/configs/capcella_defconfig
+++ b/arch/mips/configs/capcella_defconfig
@@ -4,7 +4,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/mips/configs/cavium-octeon_defconfig b/arch/mips/configs/cavium-octeon_defconfig
index 3567b6f07b37..75165dfa60c1 100644
--- a/arch/mips/configs/cavium-octeon_defconfig
+++ b/arch/mips/configs/cavium-octeon_defconfig
@@ -15,7 +15,7 @@ CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_RELAY=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_PCSPKR_PLATFORM is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig
index 6c4f7e9d3383..5419adb219a8 100644
--- a/arch/mips/configs/cobalt_defconfig
+++ b/arch/mips/configs/cobalt_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_RELAY=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig
index dda158b2c8dc..4044c9e0fb73 100644
--- a/arch/mips/configs/db1000_defconfig
+++ b/arch/mips/configs/db1000_defconfig
@@ -11,7 +11,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_TINY_RCU=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_PCSPKR_PLATFORM is not set
 # CONFIG_VM_EVENT_COUNTERS is not set
diff --git a/arch/mips/configs/db1100_defconfig b/arch/mips/configs/db1100_defconfig
index 7e4fc76df538..c6b49938ee84 100644
--- a/arch/mips/configs/db1100_defconfig
+++ b/arch/mips/configs/db1100_defconfig
@@ -11,7 +11,7 @@ CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_TINY_RCU=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
 # CONFIG_PCSPKR_PLATFORM is not set
diff --git a/arch/mips/configs/db1200_defconfig b/arch/mips/configs/db1200_defconfig
index 6fe205fa7b61..1f69249b839a 100644
--- a/arch/mips/configs/db1200_defconfig
+++ b/arch/mips/configs/db1200_defconfig
@@ -12,7 +12,7 @@ CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_TINY_RCU=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
 # CONFIG_PCSPKR_PLATFORM is not set
diff --git a/arch/mips/configs/db1500_defconfig b/arch/mips/configs/db1500_defconfig
index a741c55448d0..b6e21c7cb6bd 100644
--- a/arch/mips/configs/db1500_defconfig
+++ b/arch/mips/configs/db1500_defconfig
@@ -10,7 +10,7 @@ CONFIG_LOCALVERSION="-db1500"
 CONFIG_KERNEL_LZMA=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_PCSPKR_PLATFORM is not set
 # CONFIG_VM_EVENT_COUNTERS is not set
diff --git a/arch/mips/configs/db1550_defconfig b/arch/mips/configs/db1550_defconfig
index cd32dd8c8008..798a553c9e80 100644
--- a/arch/mips/configs/db1550_defconfig
+++ b/arch/mips/configs/db1550_defconfig
@@ -11,7 +11,7 @@ CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_TINY_RCU=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
 # CONFIG_PCSPKR_PLATFORM is not set
diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig
index b15bfd1e69c8..87d0340837aa 100644
--- a/arch/mips/configs/decstation_defconfig
+++ b/arch/mips/configs/decstation_defconfig
@@ -4,7 +4,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_HOTPLUG is not set
 CONFIG_SLAB=y
diff --git a/arch/mips/configs/e55_defconfig b/arch/mips/configs/e55_defconfig
index 0b60c06a943d..0126e66d60cb 100644
--- a/arch/mips/configs/e55_defconfig
+++ b/arch/mips/configs/e55_defconfig
@@ -4,7 +4,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_HOTPLUG is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/mips/configs/fuloong2e_defconfig b/arch/mips/configs/fuloong2e_defconfig
index 63944a14b816..e5b73de08fc5 100644
--- a/arch/mips/configs/fuloong2e_defconfig
+++ b/arch/mips/configs/fuloong2e_defconfig
@@ -17,7 +17,7 @@ CONFIG_NAMESPACES=y
 CONFIG_USER_NS=y
 CONFIG_PID_NS=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_PCSPKR_PLATFORM is not set
 # CONFIG_COMPAT_BRK is not set
 CONFIG_SLAB=y
diff --git a/arch/mips/configs/gpr_defconfig b/arch/mips/configs/gpr_defconfig
index 53edc134f274..48a40aefaf58 100644
--- a/arch/mips/configs/gpr_defconfig
+++ b/arch/mips/configs/gpr_defconfig
@@ -11,7 +11,7 @@ CONFIG_BSD_PROCESS_ACCT_V3=y
 CONFIG_RELAY=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_PROFILING=y
 CONFIG_MODULES=y
diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig
index 36de199f4c27..d1606569b001 100644
--- a/arch/mips/configs/ip22_defconfig
+++ b/arch/mips/configs/ip22_defconfig
@@ -17,7 +17,7 @@ CONFIG_IPC_NS=y
 CONFIG_USER_NS=y
 CONFIG_PID_NS=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_HOTPLUG is not set
 # CONFIG_PCSPKR_PLATFORM is not set
 # CONFIG_COMPAT_BRK is not set
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig
index 4b16c48b0c36..0e36abcd39cc 100644
--- a/arch/mips/configs/ip27_defconfig
+++ b/arch/mips/configs/ip27_defconfig
@@ -15,7 +15,7 @@ CONFIG_CGROUPS=y
 CONFIG_CPUSETS=y
 CONFIG_RELAY=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_PCSPKR_PLATFORM is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/mips/configs/ip28_defconfig b/arch/mips/configs/ip28_defconfig
index 98f2c7736e87..4dbf6269b3f9 100644
--- a/arch/mips/configs/ip28_defconfig
+++ b/arch/mips/configs/ip28_defconfig
@@ -8,7 +8,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_RELAY=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_HOTPLUG is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig
index 5bea99b26fa8..7bbd52194fc3 100644
--- a/arch/mips/configs/ip32_defconfig
+++ b/arch/mips/configs/ip32_defconfig
@@ -10,7 +10,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_RELAY=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_PROFILING=y
 CONFIG_OPROFILE=m
diff --git a/arch/mips/configs/jazz_defconfig b/arch/mips/configs/jazz_defconfig
index 6ae46bcdb20b..92a60aecad5c 100644
--- a/arch/mips/configs/jazz_defconfig
+++ b/arch/mips/configs/jazz_defconfig
@@ -10,7 +10,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_RELAY=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig
index bf24e9309b9c..db5705e18b36 100644
--- a/arch/mips/configs/jmr3927_defconfig
+++ b/arch/mips/configs/jmr3927_defconfig
@@ -4,7 +4,7 @@ CONFIG_TOSHIBA_JMR3927=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_HOTPLUG is not set
 # CONFIG_PCSPKR_PLATFORM is not set
 CONFIG_SLAB=y
diff --git a/arch/mips/configs/lasat_defconfig b/arch/mips/configs/lasat_defconfig
index 6447261c61d0..d9f3db29ab95 100644
--- a/arch/mips/configs/lasat_defconfig
+++ b/arch/mips/configs/lasat_defconfig
@@ -8,7 +8,7 @@ CONFIG_HZ_1000=y
 CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
diff --git a/arch/mips/configs/lemote2f_defconfig b/arch/mips/configs/lemote2f_defconfig
index f7033f3a5822..167c1d07b809 100644
--- a/arch/mips/configs/lemote2f_defconfig
+++ b/arch/mips/configs/lemote2f_defconfig
@@ -21,7 +21,7 @@ CONFIG_BLK_DEV_INITRD=y
 CONFIG_RD_BZIP2=y
 CONFIG_RD_LZMA=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_PROFILING=y
 CONFIG_OPROFILE=m
 CONFIG_MODULES=y
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig
index b455d0f36486..7270f3183bda 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -15,7 +15,7 @@ CONFIG_UTS_NS=y
 CONFIG_IPC_NS=y
 CONFIG_PID_NS=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_COMPAT_BRK is not set
 CONFIG_SLAB=y
@@ -369,7 +369,10 @@ CONFIG_VT_HW_CONSOLE_BINDING=y
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 # CONFIG_HWMON is not set
+CONFIG_FB=y
+CONFIG_FB_CIRRUS=y
 # CONFIG_VGA_CONSOLE is not set
+CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_HID=m
 CONFIG_LEDS_CLASS=m
 CONFIG_LEDS_TRIGGER_TIMER=m
diff --git a/arch/mips/configs/markeins_defconfig b/arch/mips/configs/markeins_defconfig
index 86bf001babe9..9c9a123016c0 100644
--- a/arch/mips/configs/markeins_defconfig
+++ b/arch/mips/configs/markeins_defconfig
@@ -9,7 +9,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/mips/configs/mipssim_defconfig b/arch/mips/configs/mipssim_defconfig
index 4925f507dc21..b5ad7387bbb0 100644
--- a/arch/mips/configs/mipssim_defconfig
+++ b/arch/mips/configs/mipssim_defconfig
@@ -7,7 +7,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/mips/configs/mpc30x_defconfig b/arch/mips/configs/mpc30x_defconfig
index efb779f8f6fe..c16de9812920 100644
--- a/arch/mips/configs/mpc30x_defconfig
+++ b/arch/mips/configs/mpc30x_defconfig
@@ -5,7 +5,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_RELAY=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/mips/configs/msp71xx_defconfig b/arch/mips/configs/msp71xx_defconfig
index ab051458452b..d1142e9cd9a1 100644
--- a/arch/mips/configs/msp71xx_defconfig
+++ b/arch/mips/configs/msp71xx_defconfig
@@ -8,7 +8,7 @@ CONFIG_LOCALVERSION="-pmc"
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SHMEM is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig
index 814699754e0d..a97a42c6b2c8 100644
--- a/arch/mips/configs/mtx1_defconfig
+++ b/arch/mips/configs/mtx1_defconfig
@@ -11,7 +11,7 @@ CONFIG_AUDIT=y
 CONFIG_RELAY=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_PROFILING=y
 CONFIG_OPROFILE=m
diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig
index 1597aa1842fa..75eb1b1f316c 100644
--- a/arch/mips/configs/pb1100_defconfig
+++ b/arch/mips/configs/pb1100_defconfig
@@ -11,7 +11,7 @@ CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_TINY_RCU=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
 # CONFIG_PCSPKR_PLATFORM is not set
diff --git a/arch/mips/configs/pb1200_defconfig b/arch/mips/configs/pb1200_defconfig
index 96f0d43cf08b..dcbe2704e5ed 100644
--- a/arch/mips/configs/pb1200_defconfig
+++ b/arch/mips/configs/pb1200_defconfig
@@ -12,7 +12,7 @@ CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_TINY_RCU=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
 # CONFIG_PCSPKR_PLATFORM is not set
diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig
index b4bfd4823458..fa00487146f8 100644
--- a/arch/mips/configs/pb1500_defconfig
+++ b/arch/mips/configs/pb1500_defconfig
@@ -11,7 +11,7 @@ CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_TINY_RCU=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
 # CONFIG_PCSPKR_PLATFORM is not set
diff --git a/arch/mips/configs/pb1550_defconfig b/arch/mips/configs/pb1550_defconfig
index 5a660024d22a..e83d6497e8b4 100644
--- a/arch/mips/configs/pb1550_defconfig
+++ b/arch/mips/configs/pb1550_defconfig
@@ -11,7 +11,7 @@ CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_TINY_RCU=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
 # CONFIG_PCSPKR_PLATFORM is not set
diff --git a/arch/mips/configs/pnx8335-stb225_defconfig b/arch/mips/configs/pnx8335-stb225_defconfig
index 39926a1a96b6..f2925769dfa3 100644
--- a/arch/mips/configs/pnx8335-stb225_defconfig
+++ b/arch/mips/configs/pnx8335-stb225_defconfig
@@ -11,7 +11,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/mips/configs/pnx8550-jbs_defconfig b/arch/mips/configs/pnx8550-jbs_defconfig
index 3376bc8616cc..1d1f2067f3e6 100644
--- a/arch/mips/configs/pnx8550-jbs_defconfig
+++ b/arch/mips/configs/pnx8550-jbs_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/mips/configs/pnx8550-stb810_defconfig b/arch/mips/configs/pnx8550-stb810_defconfig
index 6514f1bf0afb..15c66a571f99 100644
--- a/arch/mips/configs/pnx8550-stb810_defconfig
+++ b/arch/mips/configs/pnx8550-stb810_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_HOTPLUG is not set
 CONFIG_SLAB=y
diff --git a/arch/mips/configs/powertv_defconfig b/arch/mips/configs/powertv_defconfig
index f1f58e91dd80..3b0b6e8c8533 100644
--- a/arch/mips/configs/powertv_defconfig
+++ b/arch/mips/configs/powertv_defconfig
@@ -14,7 +14,7 @@ CONFIG_RELAY=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_RD_GZIP is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_PCSPKR_PLATFORM is not set
diff --git a/arch/mips/configs/rb532_defconfig b/arch/mips/configs/rb532_defconfig
index d6457bc38c71..55902d9cd0f2 100644
--- a/arch/mips/configs/rb532_defconfig
+++ b/arch/mips/configs/rb532_defconfig
@@ -13,7 +13,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_VM_EVENT_COUNTERS is not set
diff --git a/arch/mips/configs/rbtx49xx_defconfig b/arch/mips/configs/rbtx49xx_defconfig
index 29acfab31516..9cba856277ff 100644
--- a/arch/mips/configs/rbtx49xx_defconfig
+++ b/arch/mips/configs/rbtx49xx_defconfig
@@ -12,7 +12,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_HOTPLUG is not set
 # CONFIG_PCSPKR_PLATFORM is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig
index 2b3e47653f60..2c0230e76d20 100644
--- a/arch/mips/configs/rm200_defconfig
+++ b/arch/mips/configs/rm200_defconfig
@@ -12,7 +12,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_RELAY=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig
index 64840d717750..5b0463ef9389 100644
--- a/arch/mips/configs/sb1250-swarm_defconfig
+++ b/arch/mips/configs/sb1250-swarm_defconfig
@@ -15,7 +15,7 @@ CONFIG_RELAY=y
 CONFIG_NAMESPACES=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_COMPAT_BRK is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/mips/configs/tb0219_defconfig b/arch/mips/configs/tb0219_defconfig
index d9be37fc9cb7..30036b4cbeb1 100644
--- a/arch/mips/configs/tb0219_defconfig
+++ b/arch/mips/configs/tb0219_defconfig
@@ -5,7 +5,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_PCSPKR_PLATFORM is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/mips/configs/tb0226_defconfig b/arch/mips/configs/tb0226_defconfig
index 3d25dd08907b..81bfa1d4d8e3 100644
--- a/arch/mips/configs/tb0226_defconfig
+++ b/arch/mips/configs/tb0226_defconfig
@@ -5,7 +5,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_PCSPKR_PLATFORM is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/mips/configs/tb0287_defconfig b/arch/mips/configs/tb0287_defconfig
index be697c9b23c6..c415c4f0e5c2 100644
--- a/arch/mips/configs/tb0287_defconfig
+++ b/arch/mips/configs/tb0287_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_PCSPKR_PLATFORM is not set
 CONFIG_SLAB=y
diff --git a/arch/mips/configs/workpad_defconfig b/arch/mips/configs/workpad_defconfig
index 7ec9287254d8..ee4b2be43c44 100644
--- a/arch/mips/configs/workpad_defconfig
+++ b/arch/mips/configs/workpad_defconfig
@@ -4,7 +4,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/mips/configs/wrppmc_defconfig b/arch/mips/configs/wrppmc_defconfig
index a231b73b1a40..44a451be359e 100644
--- a/arch/mips/configs/wrppmc_defconfig
+++ b/arch/mips/configs/wrppmc_defconfig
@@ -7,7 +7,7 @@ CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 # CONFIG_EPOLL is not set
 CONFIG_SLAB=y
diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig
index ab3a3dcec04d..f72d305a3f08 100644
--- a/arch/mips/configs/yosemite_defconfig
+++ b/arch/mips/configs/yosemite_defconfig
@@ -8,7 +8,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_RELAY=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/mips/include/asm/cache.h b/arch/mips/include/asm/cache.h
index 37f175c42bb5..650ac9ba734c 100644
--- a/arch/mips/include/asm/cache.h
+++ b/arch/mips/include/asm/cache.h
@@ -17,4 +17,6 @@
 #define SMP_CACHE_SHIFT         L1_CACHE_SHIFT
 #define SMP_CACHE_BYTES         L1_CACHE_BYTES
 
+#define __read_mostly __attribute__((__section__(".data.read_mostly")))
+
 #endif /* _ASM_CACHE_H */
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h
index b39def3f6e03..c454550eb0c0 100644
--- a/arch/mips/include/asm/cpu-info.h
+++ b/arch/mips/include/asm/cpu-info.h
@@ -78,6 +78,7 @@ struct cpuinfo_mips {
         unsigned int            watch_reg_use_cnt; /* Usable by ptrace */
 #define NUM_WATCH_REGS 4
         u16                     watch_reg_masks[NUM_WATCH_REGS];
+        unsigned int            kscratch_mask; /* Usable KScratch mask. */
 } __attribute__((aligned(SMP_CACHE_BYTES)));
 
 extern struct cpuinfo_mips cpu_data[];
diff --git a/arch/mips/include/asm/inst.h b/arch/mips/include/asm/inst.h
index 444ff71aa0e8..7ebfc392e58d 100644
--- a/arch/mips/include/asm/inst.h
+++ b/arch/mips/include/asm/inst.h
@@ -72,6 +72,7 @@ enum spec2_op {
 enum spec3_op {
         ext_op, dextm_op, dextu_op, dext_op,
         ins_op, dinsm_op, dinsu_op, dins_op,
+        lx_op = 0x0a,
         bshfl_op = 0x20,
         dbshfl_op = 0x24,
         rdhwr_op = 0x3b
@@ -179,6 +180,19 @@ enum mad_func {
 };
 
 /*
+ * func field for special3 lx opcodes (Cavium Octeon).
+ */
+enum lx_func {
+        lwx_op  = 0x00,
+        lhx_op  = 0x04,
+        lbux_op = 0x06,
+        ldx_op  = 0x08,
+        lwux_op = 0x10,
+        lhux_op = 0x14,
+        lbx_op  = 0x16,
+};
+
+/*
  * Damn ...  bitfields depend from byteorder :-(
  */
 #ifdef __MIPSEB__
diff --git a/arch/mips/include/asm/jump_label.h b/arch/mips/include/asm/jump_label.h
new file mode 100644
index 000000000000..7622ccf75076
--- /dev/null
+++ b/arch/mips/include/asm/jump_label.h
@@ -0,0 +1,48 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 2010 Cavium Networks, Inc.
+ */
+#ifndef _ASM_MIPS_JUMP_LABEL_H
+#define _ASM_MIPS_JUMP_LABEL_H
+
+#include <linux/types.h>
+
+#ifdef __KERNEL__
+
+#define JUMP_LABEL_NOP_SIZE 4
+
+#ifdef CONFIG_64BIT
+#define WORD_INSN ".dword"
+#else
+#define WORD_INSN ".word"
+#endif
+
+#define JUMP_LABEL(key, label)                                          \
+        do {                                                            \
+                asm goto("1:\tnop\n\t"                                  \
+                        "nop\n\t"                                       \
+                        ".pushsection __jump_table,  \"a\"\n\t"         \
+                        WORD_INSN " 1b, %l[" #label "], %0\n\t"         \
+                        ".popsection\n\t"                               \
+                        : :  "i" (key) :  : label);                     \
+        } while (0)
+
+
+#endif /* __KERNEL__ */
+
+#ifdef CONFIG_64BIT
+typedef u64 jump_label_t;
+#else
+typedef u32 jump_label_t;
+#endif
+
+struct jump_entry {
+        jump_label_t code;
+        jump_label_t target;
+        jump_label_t key;
+};
+
+#endif /* _ASM_MIPS_JUMP_LABEL_H */
diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
new file mode 100644
index 000000000000..cda1c8070b27
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -0,0 +1,233 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X SoC register definitions
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  Parts of this file are based on Atheros' 2.6.15 BSP
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef __ASM_MACH_AR71XX_REGS_H
+#define __ASM_MACH_AR71XX_REGS_H
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/bitops.h>
+
+#define AR71XX_APB_BASE         0x18000000
+#define AR71XX_SPI_BASE         0x1f000000
+#define AR71XX_SPI_SIZE         0x01000000
+
+#define AR71XX_DDR_CTRL_BASE    (AR71XX_APB_BASE + 0x00000000)
+#define AR71XX_DDR_CTRL_SIZE    0x100
+#define AR71XX_UART_BASE        (AR71XX_APB_BASE + 0x00020000)
+#define AR71XX_UART_SIZE        0x100
+#define AR71XX_GPIO_BASE        (AR71XX_APB_BASE + 0x00040000)
+#define AR71XX_GPIO_SIZE        0x100
+#define AR71XX_PLL_BASE         (AR71XX_APB_BASE + 0x00050000)
+#define AR71XX_PLL_SIZE         0x100
+#define AR71XX_RESET_BASE       (AR71XX_APB_BASE + 0x00060000)
+#define AR71XX_RESET_SIZE       0x100
+
+#define AR913X_WMAC_BASE        (AR71XX_APB_BASE + 0x000C0000)
+#define AR913X_WMAC_SIZE        0x30000
+
+/*
+ * DDR_CTRL block
+ */
+#define AR71XX_DDR_REG_PCI_WIN0         0x7c
+#define AR71XX_DDR_REG_PCI_WIN1         0x80
+#define AR71XX_DDR_REG_PCI_WIN2         0x84
+#define AR71XX_DDR_REG_PCI_WIN3         0x88
+#define AR71XX_DDR_REG_PCI_WIN4         0x8c
+#define AR71XX_DDR_REG_PCI_WIN5         0x90
+#define AR71XX_DDR_REG_PCI_WIN6         0x94
+#define AR71XX_DDR_REG_PCI_WIN7         0x98
+#define AR71XX_DDR_REG_FLUSH_GE0        0x9c
+#define AR71XX_DDR_REG_FLUSH_GE1        0xa0
+#define AR71XX_DDR_REG_FLUSH_USB        0xa4
+#define AR71XX_DDR_REG_FLUSH_PCI        0xa8
+
+#define AR724X_DDR_REG_FLUSH_GE0        0x7c
+#define AR724X_DDR_REG_FLUSH_GE1        0x80
+#define AR724X_DDR_REG_FLUSH_USB        0x84
+#define AR724X_DDR_REG_FLUSH_PCIE       0x88
+
+#define AR913X_DDR_REG_FLUSH_GE0        0x7c
+#define AR913X_DDR_REG_FLUSH_GE1        0x80
+#define AR913X_DDR_REG_FLUSH_USB        0x84
+#define AR913X_DDR_REG_FLUSH_WMAC       0x88
+
+/*
+ * PLL block
+ */
+#define AR71XX_PLL_REG_CPU_CONFIG       0x00
+#define AR71XX_PLL_REG_SEC_CONFIG       0x04
+#define AR71XX_PLL_REG_ETH0_INT_CLOCK   0x10
+#define AR71XX_PLL_REG_ETH1_INT_CLOCK   0x14
+
+#define AR71XX_PLL_DIV_SHIFT            3
+#define AR71XX_PLL_DIV_MASK             0x1f
+#define AR71XX_CPU_DIV_SHIFT            16
+#define AR71XX_CPU_DIV_MASK             0x3
+#define AR71XX_DDR_DIV_SHIFT            18
+#define AR71XX_DDR_DIV_MASK             0x3
+#define AR71XX_AHB_DIV_SHIFT            20
+#define AR71XX_AHB_DIV_MASK             0x7
+
+#define AR724X_PLL_REG_CPU_CONFIG       0x00
+#define AR724X_PLL_REG_PCIE_CONFIG      0x18
+
+#define AR724X_PLL_DIV_SHIFT            0
+#define AR724X_PLL_DIV_MASK             0x3ff
+#define AR724X_PLL_REF_DIV_SHIFT        10
+#define AR724X_PLL_REF_DIV_MASK         0xf
+#define AR724X_AHB_DIV_SHIFT            19
+#define AR724X_AHB_DIV_MASK             0x1
+#define AR724X_DDR_DIV_SHIFT            22
+#define AR724X_DDR_DIV_MASK             0x3
+
+#define AR913X_PLL_REG_CPU_CONFIG       0x00
+#define AR913X_PLL_REG_ETH_CONFIG       0x04
+#define AR913X_PLL_REG_ETH0_INT_CLOCK   0x14
+#define AR913X_PLL_REG_ETH1_INT_CLOCK   0x18
+
+#define AR913X_PLL_DIV_SHIFT            0
+#define AR913X_PLL_DIV_MASK             0x3ff
+#define AR913X_DDR_DIV_SHIFT            22
+#define AR913X_DDR_DIV_MASK             0x3
+#define AR913X_AHB_DIV_SHIFT            19
+#define AR913X_AHB_DIV_MASK             0x1
+
+/*
+ * RESET block
+ */
+#define AR71XX_RESET_REG_TIMER                  0x00
+#define AR71XX_RESET_REG_TIMER_RELOAD           0x04
+#define AR71XX_RESET_REG_WDOG_CTRL              0x08
+#define AR71XX_RESET_REG_WDOG                   0x0c
+#define AR71XX_RESET_REG_MISC_INT_STATUS        0x10
+#define AR71XX_RESET_REG_MISC_INT_ENABLE        0x14
+#define AR71XX_RESET_REG_PCI_INT_STATUS         0x18
+#define AR71XX_RESET_REG_PCI_INT_ENABLE         0x1c
+#define AR71XX_RESET_REG_GLOBAL_INT_STATUS      0x20
+#define AR71XX_RESET_REG_RESET_MODULE           0x24
+#define AR71XX_RESET_REG_PERFC_CTRL             0x2c
+#define AR71XX_RESET_REG_PERFC0                 0x30
+#define AR71XX_RESET_REG_PERFC1                 0x34
+#define AR71XX_RESET_REG_REV_ID                 0x90
+
+#define AR913X_RESET_REG_GLOBAL_INT_STATUS      0x18
+#define AR913X_RESET_REG_RESET_MODULE           0x1c
+#define AR913X_RESET_REG_PERF_CTRL              0x20
+#define AR913X_RESET_REG_PERFC0                 0x24
+#define AR913X_RESET_REG_PERFC1                 0x28
+
+#define AR724X_RESET_REG_RESET_MODULE           0x1c
+
+#define MISC_INT_DMA                    BIT(7)
+#define MISC_INT_OHCI                   BIT(6)
+#define MISC_INT_PERFC                  BIT(5)
+#define MISC_INT_WDOG                   BIT(4)
+#define MISC_INT_UART                   BIT(3)
+#define MISC_INT_GPIO                   BIT(2)
+#define MISC_INT_ERROR                  BIT(1)
+#define MISC_INT_TIMER                  BIT(0)
+
+#define AR71XX_RESET_EXTERNAL           BIT(28)
+#define AR71XX_RESET_FULL_CHIP          BIT(24)
+#define AR71XX_RESET_CPU_NMI            BIT(21)
+#define AR71XX_RESET_CPU_COLD           BIT(20)
+#define AR71XX_RESET_DMA                BIT(19)
+#define AR71XX_RESET_SLIC               BIT(18)
+#define AR71XX_RESET_STEREO             BIT(17)
+#define AR71XX_RESET_DDR                BIT(16)
+#define AR71XX_RESET_GE1_MAC            BIT(13)
+#define AR71XX_RESET_GE1_PHY            BIT(12)
+#define AR71XX_RESET_USBSUS_OVERRIDE    BIT(10)
+#define AR71XX_RESET_GE0_MAC            BIT(9)
+#define AR71XX_RESET_GE0_PHY            BIT(8)
+#define AR71XX_RESET_USB_OHCI_DLL       BIT(6)
+#define AR71XX_RESET_USB_HOST           BIT(5)
+#define AR71XX_RESET_USB_PHY            BIT(4)
+#define AR71XX_RESET_PCI_BUS            BIT(1)
+#define AR71XX_RESET_PCI_CORE           BIT(0)
+
+#define AR724X_RESET_GE1_MDIO           BIT(23)
+#define AR724X_RESET_GE0_MDIO           BIT(22)
+#define AR724X_RESET_PCIE_PHY_SERIAL    BIT(10)
+#define AR724X_RESET_PCIE_PHY           BIT(7)
+#define AR724X_RESET_PCIE               BIT(6)
+#define AR724X_RESET_OHCI_DLL           BIT(3)
+
+#define AR913X_RESET_AMBA2WMAC          BIT(22)
+
+#define REV_ID_MAJOR_MASK               0xfff0
+#define REV_ID_MAJOR_AR71XX             0x00a0
+#define REV_ID_MAJOR_AR913X             0x00b0
+#define REV_ID_MAJOR_AR7240             0x00c0
+#define REV_ID_MAJOR_AR7241             0x0100
+#define REV_ID_MAJOR_AR7242             0x1100
+
+#define AR71XX_REV_ID_MINOR_MASK        0x3
+#define AR71XX_REV_ID_MINOR_AR7130      0x0
+#define AR71XX_REV_ID_MINOR_AR7141      0x1
+#define AR71XX_REV_ID_MINOR_AR7161      0x2
+#define AR71XX_REV_ID_REVISION_MASK     0x3
+#define AR71XX_REV_ID_REVISION_SHIFT    2
+
+#define AR913X_REV_ID_MINOR_MASK        0x3
+#define AR913X_REV_ID_MINOR_AR9130      0x0
+#define AR913X_REV_ID_MINOR_AR9132      0x1
+#define AR913X_REV_ID_REVISION_MASK     0x3
+#define AR913X_REV_ID_REVISION_SHIFT    2
+
+#define AR724X_REV_ID_REVISION_MASK     0x3
+
+/*
+ * SPI block
+ */
+#define AR71XX_SPI_REG_FS       0x00    /* Function Select */
+#define AR71XX_SPI_REG_CTRL     0x04    /* SPI Control */
+#define AR71XX_SPI_REG_IOC      0x08    /* SPI I/O Control */
+#define AR71XX_SPI_REG_RDS      0x0c    /* Read Data Shift */
+
+#define AR71XX_SPI_FS_GPIO      BIT(0)  /* Enable GPIO mode */
+
+#define AR71XX_SPI_CTRL_RD      BIT(6)  /* Remap Disable */
+#define AR71XX_SPI_CTRL_DIV_MASK 0x3f
+
+#define AR71XX_SPI_IOC_DO       BIT(0)  /* Data Out pin */
+#define AR71XX_SPI_IOC_CLK      BIT(8)  /* CLK pin */
+#define AR71XX_SPI_IOC_CS(n)    BIT(16 + (n))
+#define AR71XX_SPI_IOC_CS0      AR71XX_SPI_IOC_CS(0)
+#define AR71XX_SPI_IOC_CS1      AR71XX_SPI_IOC_CS(1)
+#define AR71XX_SPI_IOC_CS2      AR71XX_SPI_IOC_CS(2)
+#define AR71XX_SPI_IOC_CS_ALL   (AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1 | \
+                                 AR71XX_SPI_IOC_CS2)
+
+/*
+ * GPIO block
+ */
+#define AR71XX_GPIO_REG_OE              0x00
+#define AR71XX_GPIO_REG_IN              0x04
+#define AR71XX_GPIO_REG_OUT             0x08
+#define AR71XX_GPIO_REG_SET             0x0c
+#define AR71XX_GPIO_REG_CLEAR           0x10
+#define AR71XX_GPIO_REG_INT_MODE        0x14
+#define AR71XX_GPIO_REG_INT_TYPE        0x18
+#define AR71XX_GPIO_REG_INT_POLARITY    0x1c
+#define AR71XX_GPIO_REG_INT_PENDING     0x20
+#define AR71XX_GPIO_REG_INT_ENABLE      0x24
+#define AR71XX_GPIO_REG_FUNC            0x28
+
+#define AR71XX_GPIO_COUNT               16
+#define AR724X_GPIO_COUNT               18
+#define AR913X_GPIO_COUNT               22
+
+#endif /* __ASM_MACH_AR71XX_REGS_H */
diff --git a/arch/mips/include/asm/mach-ath79/ath79.h b/arch/mips/include/asm/mach-ath79/ath79.h
new file mode 100644
index 000000000000..6a9f168506fe
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/ath79.h
@@ -0,0 +1,96 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X common definitions
+ *
+ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  Parts of this file are based on Atheros' 2.6.15 BSP
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef __ASM_MACH_ATH79_H
+#define __ASM_MACH_ATH79_H
+
+#include <linux/types.h>
+#include <linux/io.h>
+
+enum ath79_soc_type {
+        ATH79_SOC_UNKNOWN,
+        ATH79_SOC_AR7130,
+        ATH79_SOC_AR7141,
+        ATH79_SOC_AR7161,
+        ATH79_SOC_AR7240,
+        ATH79_SOC_AR7241,
+        ATH79_SOC_AR7242,
+        ATH79_SOC_AR9130,
+        ATH79_SOC_AR9132
+};
+
+extern enum ath79_soc_type ath79_soc;
+
+static inline int soc_is_ar71xx(void)
+{
+        return (ath79_soc == ATH79_SOC_AR7130 ||
+                ath79_soc == ATH79_SOC_AR7141 ||
+                ath79_soc == ATH79_SOC_AR7161);
+}
+
+static inline int soc_is_ar724x(void)
+{
+        return (ath79_soc == ATH79_SOC_AR7240 ||
+                ath79_soc == ATH79_SOC_AR7241 ||
+                ath79_soc == ATH79_SOC_AR7242);
+}
+
+static inline int soc_is_ar7240(void)
+{
+        return (ath79_soc == ATH79_SOC_AR7240);
+}
+
+static inline int soc_is_ar7241(void)
+{
+        return (ath79_soc == ATH79_SOC_AR7241);
+}
+
+static inline int soc_is_ar7242(void)
+{
+        return (ath79_soc == ATH79_SOC_AR7242);
+}
+
+static inline int soc_is_ar913x(void)
+{
+        return (ath79_soc == ATH79_SOC_AR9130 ||
+                ath79_soc == ATH79_SOC_AR9132);
+}
+
+extern void __iomem *ath79_ddr_base;
+extern void __iomem *ath79_pll_base;
+extern void __iomem *ath79_reset_base;
+
+static inline void ath79_pll_wr(unsigned reg, u32 val)
+{
+        __raw_writel(val, ath79_pll_base + reg);
+}
+
+static inline u32 ath79_pll_rr(unsigned reg)
+{
+        return __raw_readl(ath79_pll_base + reg);
+}
+
+static inline void ath79_reset_wr(unsigned reg, u32 val)
+{
+        __raw_writel(val, ath79_reset_base + reg);
+}
+
+static inline u32 ath79_reset_rr(unsigned reg)
+{
+        return __raw_readl(ath79_reset_base + reg);
+}
+
+void ath79_device_reset_set(u32 mask);
+void ath79_device_reset_clear(u32 mask);
+
+#endif /* __ASM_MACH_ATH79_H */
diff --git a/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h b/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h
new file mode 100644
index 000000000000..aa2283e602fc
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h
@@ -0,0 +1,23 @@
+/*
+ *  Platform data definition for Atheros AR71XX/AR724X/AR913X SPI controller
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef _ATH79_SPI_PLATFORM_H
+#define _ATH79_SPI_PLATFORM_H
+
+struct ath79_spi_platform_data {
+        unsigned        bus_num;
+        unsigned        num_chipselect;
+};
+
+struct ath79_spi_controller_data {
+        unsigned        gpio;
+};
+
+#endif /* _ATH79_SPI_PLATFORM_H */
diff --git a/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
new file mode 100644
index 000000000000..4476fa03bf36
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
@@ -0,0 +1,56 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X specific CPU feature overrides
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This file was derived from: include/asm-mips/cpu-features.h
+ *      Copyright (C) 2003, 2004 Ralf Baechle
+ *      Copyright (C) 2004 Maciej W. Rozycki
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+#ifndef __ASM_MACH_ATH79_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_ATH79_CPU_FEATURE_OVERRIDES_H
+
+#define cpu_has_tlb             1
+#define cpu_has_4kex            1
+#define cpu_has_3k_cache        0
+#define cpu_has_4k_cache        1
+#define cpu_has_tx39_cache      0
+#define cpu_has_sb1_cache       0
+#define cpu_has_fpu             0
+#define cpu_has_32fpr           0
+#define cpu_has_counter         1
+#define cpu_has_watch           1
+#define cpu_has_divec           1
+
+#define cpu_has_prefetch        1
+#define cpu_has_ejtag           1
+#define cpu_has_llsc            1
+
+#define cpu_has_mips16          1
+#define cpu_has_mdmx            0
+#define cpu_has_mips3d          0
+#define cpu_has_smartmips       0
+
+#define cpu_has_mips32r1        1
+#define cpu_has_mips32r2        1
+#define cpu_has_mips64r1        0
+#define cpu_has_mips64r2        0
+
+#define cpu_has_dsp             0
+#define cpu_has_mipsmt          0
+
+#define cpu_has_64bits          0
+#define cpu_has_64bit_zero_reg  0
+#define cpu_has_64bit_gp_regs   0
+#define cpu_has_64bit_addresses 0
+
+#define cpu_dcache_line_size()  32
+#define cpu_icache_line_size()  32
+
+#endif /* __ASM_MACH_ATH79_CPU_FEATURE_OVERRIDES_H */
diff --git a/arch/mips/include/asm/mach-ath79/gpio.h b/arch/mips/include/asm/mach-ath79/gpio.h
new file mode 100644
index 000000000000..60dcb62785b4
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/gpio.h
@@ -0,0 +1,26 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X GPIO API definitions
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#ifndef __ASM_MACH_ATH79_GPIO_H
+#define __ASM_MACH_ATH79_GPIO_H
+
+#define ARCH_NR_GPIOS   64
+#include <asm-generic/gpio.h>
+
+int gpio_to_irq(unsigned gpio);
+int irq_to_gpio(unsigned irq);
+int gpio_get_value(unsigned gpio);
+void gpio_set_value(unsigned gpio, int value);
+
+#define gpio_cansleep   __gpio_cansleep
+
+#endif /* __ASM_MACH_ATH79_GPIO_H */
diff --git a/arch/mips/include/asm/mach-ath79/irq.h b/arch/mips/include/asm/mach-ath79/irq.h
new file mode 100644
index 000000000000..189bc6eb9c10
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/irq.h
@@ -0,0 +1,36 @@
+/*
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+#ifndef __ASM_MACH_ATH79_IRQ_H
+#define __ASM_MACH_ATH79_IRQ_H
+
+#define MIPS_CPU_IRQ_BASE       0
+#define NR_IRQS                 16
+
+#define ATH79_MISC_IRQ_BASE     8
+#define ATH79_MISC_IRQ_COUNT    8
+
+#define ATH79_CPU_IRQ_IP2       (MIPS_CPU_IRQ_BASE + 2)
+#define ATH79_CPU_IRQ_USB       (MIPS_CPU_IRQ_BASE + 3)
+#define ATH79_CPU_IRQ_GE0       (MIPS_CPU_IRQ_BASE + 4)
+#define ATH79_CPU_IRQ_GE1       (MIPS_CPU_IRQ_BASE + 5)
+#define ATH79_CPU_IRQ_MISC      (MIPS_CPU_IRQ_BASE + 6)
+#define ATH79_CPU_IRQ_TIMER     (MIPS_CPU_IRQ_BASE + 7)
+
+#define ATH79_MISC_IRQ_TIMER    (ATH79_MISC_IRQ_BASE + 0)
+#define ATH79_MISC_IRQ_ERROR    (ATH79_MISC_IRQ_BASE + 1)
+#define ATH79_MISC_IRQ_GPIO     (ATH79_MISC_IRQ_BASE + 2)
+#define ATH79_MISC_IRQ_UART     (ATH79_MISC_IRQ_BASE + 3)
+#define ATH79_MISC_IRQ_WDOG     (ATH79_MISC_IRQ_BASE + 4)
+#define ATH79_MISC_IRQ_PERFC    (ATH79_MISC_IRQ_BASE + 5)
+#define ATH79_MISC_IRQ_OHCI     (ATH79_MISC_IRQ_BASE + 6)
+#define ATH79_MISC_IRQ_DMA      (ATH79_MISC_IRQ_BASE + 7)
+
+#include_next <irq.h>
+
+#endif /* __ASM_MACH_ATH79_IRQ_H */
diff --git a/arch/mips/include/asm/mach-ath79/kernel-entry-init.h b/arch/mips/include/asm/mach-ath79/kernel-entry-init.h
new file mode 100644
index 000000000000..d8d046bccc8e
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/kernel-entry-init.h
@@ -0,0 +1,32 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X specific kernel entry setup
+ *
+ *  Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+#ifndef __ASM_MACH_ATH79_KERNEL_ENTRY_H
+#define __ASM_MACH_ATH79_KERNEL_ENTRY_H
+
+        /*
+         * Some bootloaders set the 'Kseg0 coherency algorithm' to
+         * 'Cacheable, noncoherent, write-through, no write allocate'
+         * and this cause performance issues. Let's go and change it to
+         * 'Cacheable, noncoherent, write-back, write allocate'
+         */
+        .macro  kernel_entry_setup
+        mfc0    t0, CP0_CONFIG
+        li      t1, ~CONF_CM_CMASK
+        and     t0, t1
+        ori     t0, CONF_CM_CACHABLE_NONCOHERENT
+        mtc0    t0, CP0_CONFIG
+        nop
+        .endm
+
+        .macro  smp_slave_setup
+        .endm
+
+#endif /* __ASM_MACH_ATH79_KERNEL_ENTRY_H */
diff --git a/arch/mips/include/asm/mach-ath79/war.h b/arch/mips/include/asm/mach-ath79/war.h
new file mode 100644
index 000000000000..323d9f1d8c45
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/war.h
@@ -0,0 +1,25 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
+ */
+#ifndef __ASM_MACH_ATH79_WAR_H
+#define __ASM_MACH_ATH79_WAR_H
+
+#define R4600_V1_INDEX_ICACHEOP_WAR     0
+#define R4600_V1_HIT_CACHEOP_WAR        0
+#define R4600_V2_HIT_CACHEOP_WAR        0
+#define R5432_CP0_INTERRUPT_WAR         0
+#define BCM1250_M3_WAR                  0
+#define SIBYTE_1956_WAR                 0
+#define MIPS4K_ICACHE_REFILL_WAR        0
+#define MIPS_CACHE_SYNC_WAR             0
+#define TX49XX_ICACHE_INDEX_INV_WAR     0
+#define RM9000_CDEX_SMP_WAR             0
+#define ICACHE_REFILLS_WORKAROUND_WAR   0
+#define R10000_LLSC_WAR                 0
+#define MIPS34K_MISSED_ITLB_WAR         0
+
+#endif /* __ASM_MACH_ATH79_WAR_H */
diff --git a/arch/mips/include/asm/mips_machine.h b/arch/mips/include/asm/mips_machine.h
new file mode 100644
index 000000000000..363bb352c7f7
--- /dev/null
+++ b/arch/mips/include/asm/mips_machine.h
@@ -0,0 +1,54 @@
+/*
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#ifndef __ASM_MIPS_MACHINE_H
+#define __ASM_MIPS_MACHINE_H
+
+#include <linux/init.h>
+#include <linux/stddef.h>
+
+#include <asm/bootinfo.h>
+
+struct mips_machine {
+        unsigned long           mach_type;
+        const char              *mach_id;
+        const char              *mach_name;
+        void                    (*mach_setup)(void);
+};
+
+#define MIPS_MACHINE(_type, _id, _name, _setup)                 \
+static const char machine_name_##_type[] __initconst            \
+                        __aligned(1) = _name;                   \
+static const char machine_id_##_type[] __initconst              \
+                        __aligned(1) = _id;                     \
+static struct mips_machine machine_##_type                      \
+                __used __section(.mips.machines.init) =         \
+{                                                               \
+        .mach_type      = _type,                                \
+        .mach_id        = machine_id_##_type,                   \
+        .mach_name      = machine_name_##_type,                 \
+        .mach_setup     = _setup,                               \
+};
+
+extern long __mips_machines_start;
+extern long __mips_machines_end;
+
+#ifdef CONFIG_MIPS_MACHINE
+int  mips_machtype_setup(char *id) __init;
+void mips_machine_setup(void) __init;
+void mips_set_machine_name(const char *name) __init;
+char *mips_get_machine_name(void);
+#else
+static inline int mips_machtype_setup(char *id) { return 1; }
+static inline void mips_machine_setup(void) { }
+static inline void mips_set_machine_name(const char *name) { }
+static inline char *mips_get_machine_name(void) { return NULL; }
+#endif /* CONFIG_MIPS_MACHINE */
+
+#endif /* __ASM_MIPS_MACHINE_H */
diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h
index d9592733a7ba..73c0d45798de 100644
--- a/arch/mips/include/asm/mmu_context.h
+++ b/arch/mips/include/asm/mmu_context.h
@@ -29,13 +29,7 @@
 #define TLBMISS_HANDLER_SETUP_PGD(pgd)                          \
         tlbmiss_handler_setup_pgd((unsigned long)(pgd))
 
-static inline void tlbmiss_handler_setup_pgd(unsigned long pgd)
-{
-        /* Check for swapper_pg_dir and convert to physical address. */
-        if ((pgd & CKSEG3) == CKSEG0)
-                pgd = CPHYSADDR(pgd);
-        write_c0_context(pgd << 11);
-}
+extern void tlbmiss_handler_setup_pgd(unsigned long pgd);
 
 #define TLBMISS_HANDLER_SETUP()                                         \
         do {                                                            \
diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h
index 892062d6d748..dcbd4bb417ec 100644
--- a/arch/mips/include/asm/uasm.h
+++ b/arch/mips/include/asm/uasm.h
@@ -115,7 +115,12 @@ Ip_0(_tlbwr);
 Ip_u3u1u2(_xor);
 Ip_u2u1u3(_xori);
 Ip_u2u1msbu3(_dins);
+Ip_u2u1msbu3(_dinsm);
 Ip_u1(_syscall);
+Ip_u1u2s3(_bbit0);
+Ip_u1u2s3(_bbit1);
+Ip_u3u1u2(_lwx);
+Ip_u3u1u2(_ldx);
 
 /* Handle labels. */
 struct uasm_label {
@@ -153,6 +158,7 @@ static inline void __uasminit uasm_l##lb(struct uasm_label **lab, u32 *addr) \
 # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_dsubu(buf, rs, rt, rd)
 # define UASM_i_LL(buf, rs, rt, off) uasm_i_lld(buf, rs, rt, off)
 # define UASM_i_SC(buf, rs, rt, off) uasm_i_scd(buf, rs, rt, off)
+# define UASM_i_LWX(buf, rs, rt, rd) uasm_i_ldx(buf, rs, rt, rd)
 #else
 # define UASM_i_LW(buf, rs, rt, off) uasm_i_lw(buf, rs, rt, off)
 # define UASM_i_SW(buf, rs, rt, off) uasm_i_sw(buf, rs, rt, off)
@@ -167,6 +173,7 @@ static inline void __uasminit uasm_l##lb(struct uasm_label **lab, u32 *addr) \
 # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_subu(buf, rs, rt, rd)
 # define UASM_i_LL(buf, rs, rt, off) uasm_i_ll(buf, rs, rt, off)
 # define UASM_i_SC(buf, rs, rt, off) uasm_i_sc(buf, rs, rt, off)
+# define UASM_i_LWX(buf, rs, rt, rd) uasm_i_lwx(buf, rs, rt, rd)
 #endif
 
 #define uasm_i_b(buf, off) uasm_i_beq(buf, 0, 0, off)
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 22b2e0e38617..cedee2bcbd18 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -95,6 +95,7 @@ obj-$(CONFIG_GPIO_TXX9)		+= gpio_txx9.o
 obj-$(CONFIG_KEXEC)             += machine_kexec.o relocate_kernel.o
 obj-$(CONFIG_EARLY_PRINTK)      += early_printk.o
 obj-$(CONFIG_SPINLOCK_TEST)     += spinlock_test.o
+obj-$(CONFIG_MIPS_MACHINE)      += mips_machine.o
 
 obj-$(CONFIG_OF)                += prom.o
 
@@ -106,4 +107,6 @@ obj-$(CONFIG_MIPS_CPUFREQ)	+= cpufreq/
 
 obj-$(CONFIG_HW_PERF_EVENTS)    += perf_event.o
 
+obj-$(CONFIG_JUMP_LABEL)        += jump_label.o
+
 CPPFLAGS_vmlinux.lds            := $(KBUILD_CFLAGS)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 68dae7b6b5db..f65d4c8c65a6 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -739,6 +739,8 @@ static inline unsigned int decode_config4(struct cpuinfo_mips *c)
             && cpu_has_tlb)
                 c->tlbsize += (config4 & MIPS_CONF4_MMUSIZEEXT) * 0x40;
 
+        c->kscratch_mask = (config4 >> 16) & 0xff;
+
         return config4 & MIPS_CONF_M;
 }
 
diff --git a/arch/mips/kernel/jump_label.c b/arch/mips/kernel/jump_label.c
new file mode 100644
index 000000000000..6001610cfe55
--- /dev/null
+++ b/arch/mips/kernel/jump_label.c
@@ -0,0 +1,54 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 2010 Cavium Networks, Inc.
+ */
+
+#include <linux/jump_label.h>
+#include <linux/kernel.h>
+#include <linux/memory.h>
+#include <linux/mutex.h>
+#include <linux/types.h>
+#include <linux/cpu.h>
+
+#include <asm/cacheflush.h>
+#include <asm/inst.h>
+
+#ifdef HAVE_JUMP_LABEL
+
+#define J_RANGE_MASK ((1ul << 28) - 1)
+
+void arch_jump_label_transform(struct jump_entry *e,
+                               enum jump_label_type type)
+{
+        union mips_instruction insn;
+        union mips_instruction *insn_p =
+                (union mips_instruction *)(unsigned long)e->code;
+
+        /* Jump only works within a 256MB aligned region. */
+        BUG_ON((e->target & ~J_RANGE_MASK) != (e->code & ~J_RANGE_MASK));
+
+        /* Target must have 4 byte alignment. */
+        BUG_ON((e->target & 3) != 0);
+
+        if (type == JUMP_LABEL_ENABLE) {
+                insn.j_format.opcode = j_op;
+                insn.j_format.target = (e->target & J_RANGE_MASK) >> 2;
+        } else {
+                insn.word = 0; /* nop */
+        }
+
+        get_online_cpus();
+        mutex_lock(&text_mutex);
+        *insn_p = insn;
+
+        flush_icache_range((unsigned long)insn_p,
+                           (unsigned long)insn_p + sizeof(*insn_p));
+
+        mutex_unlock(&text_mutex);
+        put_online_cpus();
+}
+
+#endif /* HAVE_JUMP_LABEL */
diff --git a/arch/mips/kernel/mips_machine.c b/arch/mips/kernel/mips_machine.c
new file mode 100644
index 000000000000..411a058d2c53
--- /dev/null
+++ b/arch/mips/kernel/mips_machine.c
@@ -0,0 +1,86 @@
+/*
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+#include <linux/mm.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+
+#include <asm/mips_machine.h>
+
+static struct mips_machine *mips_machine __initdata;
+static char *mips_machine_name = "Unknown";
+
+#define for_each_machine(mach) \
+        for ((mach) = (struct mips_machine *)&__mips_machines_start; \
+             (mach) && \
+             (unsigned long)(mach) < (unsigned long)&__mips_machines_end; \
+             (mach)++)
+
+__init void mips_set_machine_name(const char *name)
+{
+        char *p;
+
+        if (name == NULL)
+                return;
+
+        p = kstrdup(name, GFP_KERNEL);
+        if (!p)
+                pr_err("MIPS: no memory for machine_name\n");
+
+        mips_machine_name = p;
+}
+
+char *mips_get_machine_name(void)
+{
+        return mips_machine_name;
+}
+
+__init int mips_machtype_setup(char *id)
+{
+        struct mips_machine *mach;
+
+        for_each_machine(mach) {
+                if (mach->mach_id == NULL)
+                        continue;
+
+                if (strcmp(mach->mach_id, id) == 0) {
+                        mips_machtype = mach->mach_type;
+                        return 0;
+                }
+        }
+
+        pr_err("MIPS: no machine found for id '%s', supported machines:\n", id);
+        pr_err("%-24s %s\n", "id", "name");
+        for_each_machine(mach)
+                pr_err("%-24s %s\n", mach->mach_id, mach->mach_name);
+
+        return 1;
+}
+
+__setup("machtype=", mips_machtype_setup);
+
+__init void mips_machine_setup(void)
+{
+        struct mips_machine *mach;
+
+        for_each_machine(mach) {
+                if (mips_machtype == mach->mach_type) {
+                        mips_machine = mach;
+                        break;
+                }
+        }
+
+        if (!mips_machine)
+                return;
+
+        mips_set_machine_name(mips_machine->mach_name);
+        pr_info("MIPS: machine is %s\n", mips_machine_name);
+
+        if (mips_machine->mach_setup)
+                mips_machine->mach_setup();
+}
diff --git a/arch/mips/kernel/module.c b/arch/mips/kernel/module.c
index d87a72e9fac7..dd940b701963 100644
--- a/arch/mips/kernel/module.c
+++ b/arch/mips/kernel/module.c
@@ -30,6 +30,8 @@
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/spinlock.h>
+#include <linux/jump_label.h>
+
 #include <asm/pgtable.h>        /* MODULE_START */
 
 struct mips_hi16 {
@@ -382,6 +384,9 @@ int module_finalize(const Elf_Ehdr *hdr,
         const Elf_Shdr *s;
         char *secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
 
+        /* Make jump label nops. */
+        jump_label_apply_nops(me);
+
         INIT_LIST_HEAD(&me->arch.dbe_list);
         for (s = sechdrs; s < sechdrs + hdr->e_shnum; s++) {
                 if (strcmp("__dbe_table", secstrings + s->sh_name) != 0)
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 26109c4d5170..e309665b6c81 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -12,6 +12,7 @@
 #include <asm/cpu-features.h>
 #include <asm/mipsregs.h>
 #include <asm/processor.h>
+#include <asm/mips_machine.h>
 
 unsigned int vced_count, vcei_count;
 
@@ -31,8 +32,12 @@ static int show_cpuinfo(struct seq_file *m, void *v)
         /*
          * For the first processor also print the system type
          */
-        if (n == 0)
+        if (n == 0) {
                 seq_printf(m, "system type\t\t: %s\n", get_system_type());
+                if (mips_get_machine_name())
+                        seq_printf(m, "machine\t\t\t: %s\n",
+                                   mips_get_machine_name());
+        }
 
         seq_printf(m, "processor\t\t: %ld\n", n);
         sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
@@ -69,6 +74,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
                 );
         seq_printf(m, "shadow register sets\t: %d\n",
                        cpu_data[n].srsets);
+        seq_printf(m, "kscratch registers\t: %d\n",
+                   hweight8(cpu_data[n].kscratch_mask));
         seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core);
 
         sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index acd3f2c49c06..8ad1d5679f14 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -70,7 +70,7 @@ static char __initdata builtin_cmdline[COMMAND_LINE_SIZE] = CONFIG_CMDLINE;
  * mips_io_port_base is the begin of the address space to which x86 style
  * I/O ports are mapped.
  */
-const unsigned long mips_io_port_base __read_mostly = -1;
+const unsigned long mips_io_port_base = -1;
 EXPORT_SYMBOL(mips_io_port_base);
 
 static struct resource code_resource = { .name = "Kernel code", };
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index e97104302541..71350f7f2d88 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1592,7 +1592,6 @@ void __cpuinit per_cpu_trap_init(void)
 #endif /* CONFIG_MIPS_MT_SMTC */
 
         cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
-        TLBMISS_HANDLER_SETUP();
 
         atomic_inc(&init_mm.mm_count);
         current->active_mm = &init_mm;
@@ -1614,6 +1613,7 @@ void __cpuinit per_cpu_trap_init(void)
                 write_c0_wired(0);
         }
 #endif /* CONFIG_MIPS_MT_SMTC */
+        TLBMISS_HANDLER_SETUP();
 }
 
 /* Install CPU exception handler */
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index f25df73db923..570607b376b5 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -98,6 +98,13 @@ SECTIONS
         INIT_TEXT_SECTION(PAGE_SIZE)
         INIT_DATA_SECTION(16)
 
+        . = ALIGN(4);
+        .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
+                __mips_machines_start = .;
+                *(.mips.machines.init)
+                __mips_machines_end = .;
+        }
+
         /* .exit.text is discarded at runtime, not link time, to deal with
          * references from .rodata
          */
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 93816f3bca67..083d3412d0bc 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -26,8 +26,10 @@
 #include <linux/smp.h>
 #include <linux/string.h>
 #include <linux/init.h>
+#include <linux/cache.h>
 
-#include <asm/mmu_context.h>
+#include <asm/cacheflush.h>
+#include <asm/pgtable.h>
 #include <asm/war.h>
 #include <asm/uasm.h>
 
@@ -63,6 +65,52 @@ static inline int __maybe_unused r10000_llsc_war(void)
         return R10000_LLSC_WAR;
 }
 
+static int use_bbit_insns(void)
+{
+        switch (current_cpu_type()) {
+        case CPU_CAVIUM_OCTEON:
+        case CPU_CAVIUM_OCTEON_PLUS:
+        case CPU_CAVIUM_OCTEON2:
+                return 1;
+        default:
+                return 0;
+        }
+}
+
+static int use_lwx_insns(void)
+{
+        switch (current_cpu_type()) {
+        case CPU_CAVIUM_OCTEON2:
+                return 1;
+        default:
+                return 0;
+        }
+}
+#if defined(CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE) && \
+    CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0
+static bool scratchpad_available(void)
+{
+        return true;
+}
+static int scratchpad_offset(int i)
+{
+        /*
+         * CVMSEG starts at address -32768 and extends for
+         * CAVIUM_OCTEON_CVMSEG_SIZE 128 byte cache lines.
+         */
+        i += 1; /* Kernel use starts at the top and works down. */
+        return CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE * 128 - (8 * i) - 32768;
+}
+#else
+static bool scratchpad_available(void)
+{
+        return false;
+}
+static int scratchpad_offset(int i)
+{
+        BUG();
+}
+#endif
 /*
  * Found by experiment: At least some revisions of the 4kc throw under
  * some circumstances a machine check exception, triggered by invalid
@@ -173,11 +221,41 @@ static struct uasm_reloc relocs[128] __cpuinitdata;
 static int check_for_high_segbits __cpuinitdata;
 #endif
 
+static int check_for_high_segbits __cpuinitdata;
+
+static unsigned int kscratch_used_mask __cpuinitdata;
+
+static int __cpuinit allocate_kscratch(void)
+{
+        int r;
+        unsigned int a = cpu_data[0].kscratch_mask & ~kscratch_used_mask;
+
+        r = ffs(a);
+
+        if (r == 0)
+                return -1;
+
+        r--; /* make it zero based */
+
+        kscratch_used_mask |= (1 << r);
+
+        return r;
+}
+
+static int scratch_reg __cpuinitdata;
+static int pgd_reg __cpuinitdata;
+enum vmalloc64_mode {not_refill, refill_scratch, refill_noscratch};
+
 #ifndef CONFIG_MIPS_PGD_C0_CONTEXT
+
 /*
  * CONFIG_MIPS_PGD_C0_CONTEXT implies 64 bit and lack of pgd_current,
  * we cannot do r3000 under these circumstances.
+ *
+ * Declare pgd_current here instead of including mmu_context.h to avoid type
+ * conflicts for tlbmiss_handler_setup_pgd
  */
+extern unsigned long pgd_current[];
 
 /*
  * The R3000 TLB handler is simple.
@@ -440,21 +518,43 @@ static __cpuinit __maybe_unused void build_convert_pte_to_entrylo(u32 **p,
 static __cpuinit void build_restore_pagemask(u32 **p,
                                              struct uasm_reloc **r,
                                              unsigned int tmp,
-                                             enum label_id lid)
+                                             enum label_id lid,
+                                             int restore_scratch)
 {
-        /* Reset default page size */
-        if (PM_DEFAULT_MASK >> 16) {
-                uasm_i_lui(p, tmp, PM_DEFAULT_MASK >> 16);
-                uasm_i_ori(p, tmp, tmp, PM_DEFAULT_MASK & 0xffff);
-                uasm_il_b(p, r, lid);
-                uasm_i_mtc0(p, tmp, C0_PAGEMASK);
-        } else if (PM_DEFAULT_MASK) {
-                uasm_i_ori(p, tmp, 0, PM_DEFAULT_MASK);
-                uasm_il_b(p, r, lid);
-                uasm_i_mtc0(p, tmp, C0_PAGEMASK);
+        if (restore_scratch) {
+                /* Reset default page size */
+                if (PM_DEFAULT_MASK >> 16) {
+                        uasm_i_lui(p, tmp, PM_DEFAULT_MASK >> 16);
+                        uasm_i_ori(p, tmp, tmp, PM_DEFAULT_MASK & 0xffff);
+                        uasm_i_mtc0(p, tmp, C0_PAGEMASK);
+                        uasm_il_b(p, r, lid);
+                } else if (PM_DEFAULT_MASK) {
+                        uasm_i_ori(p, tmp, 0, PM_DEFAULT_MASK);
+                        uasm_i_mtc0(p, tmp, C0_PAGEMASK);
+                        uasm_il_b(p, r, lid);
+                } else {
+                        uasm_i_mtc0(p, 0, C0_PAGEMASK);
+                        uasm_il_b(p, r, lid);
+                }
+                if (scratch_reg > 0)
+                        UASM_i_MFC0(p, 1, 31, scratch_reg);
+                else
+                        UASM_i_LW(p, 1, scratchpad_offset(0), 0);
         } else {
-                uasm_il_b(p, r, lid);
-                uasm_i_mtc0(p, 0, C0_PAGEMASK);
+                /* Reset default page size */
+                if (PM_DEFAULT_MASK >> 16) {
+                        uasm_i_lui(p, tmp, PM_DEFAULT_MASK >> 16);
+                        uasm_i_ori(p, tmp, tmp, PM_DEFAULT_MASK & 0xffff);
+                        uasm_il_b(p, r, lid);
+                        uasm_i_mtc0(p, tmp, C0_PAGEMASK);
+                } else if (PM_DEFAULT_MASK) {
+                        uasm_i_ori(p, tmp, 0, PM_DEFAULT_MASK);
+                        uasm_il_b(p, r, lid);
+                        uasm_i_mtc0(p, tmp, C0_PAGEMASK);
+                } else {
+                        uasm_il_b(p, r, lid);
+                        uasm_i_mtc0(p, 0, C0_PAGEMASK);
+                }
         }
 }
 
@@ -462,7 +562,8 @@ static __cpuinit void build_huge_tlb_write_entry(u32 **p,
                                                  struct uasm_label **l,
                                                  struct uasm_reloc **r,
                                                  unsigned int tmp,
-                                                 enum tlb_write_entry wmode)
+                                                 enum tlb_write_entry wmode,
+                                                 int restore_scratch)
 {
         /* Set huge page tlb entry size */
         uasm_i_lui(p, tmp, PM_HUGE_MASK >> 16);
@@ -471,7 +572,7 @@ static __cpuinit void build_huge_tlb_write_entry(u32 **p,
 
         build_tlb_write_entry(p, l, r, wmode);
 
-        build_restore_pagemask(p, r, tmp, label_leave);
+        build_restore_pagemask(p, r, tmp, label_leave, restore_scratch);
 }
 
 /*
@@ -482,8 +583,12 @@ build_is_huge_pte(u32 **p, struct uasm_reloc **r, unsigned int tmp,
                 unsigned int pmd, int lid)
 {
         UASM_i_LW(p, tmp, 0, pmd);
-        uasm_i_andi(p, tmp, tmp, _PAGE_HUGE);
-        uasm_il_bnez(p, r, tmp, lid);
+        if (use_bbit_insns()) {
+                uasm_il_bbit1(p, r, tmp, ilog2(_PAGE_HUGE), lid);
+        } else {
+                uasm_i_andi(p, tmp, tmp, _PAGE_HUGE);
+                uasm_il_bnez(p, r, tmp, lid);
+        }
 }
 
 static __cpuinit void build_huge_update_entries(u32 **p,
@@ -532,7 +637,7 @@ static __cpuinit void build_huge_handler_tail(u32 **p,
         UASM_i_SW(p, pte, 0, ptr);
 #endif
         build_huge_update_entries(p, pte, ptr);
-        build_huge_tlb_write_entry(p, l, r, pte, tlb_indexed);
+        build_huge_tlb_write_entry(p, l, r, pte, tlb_indexed, 0);
 }
 #endif /* CONFIG_HUGETLB_PAGE */
 
@@ -573,13 +678,22 @@ build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
         /* No uasm_i_nop needed here, since the next insn doesn't touch TMP. */
 
 #ifdef CONFIG_MIPS_PGD_C0_CONTEXT
-        /*
-         * &pgd << 11 stored in CONTEXT [23..63].
-         */
-        UASM_i_MFC0(p, ptr, C0_CONTEXT);
-        uasm_i_dins(p, ptr, 0, 0, 23); /* Clear lower 23 bits of context. */
-        uasm_i_ori(p, ptr, ptr, 0x540); /* 1 0  1 0 1  << 6  xkphys cached */
-        uasm_i_drotr(p, ptr, ptr, 11);
+        if (pgd_reg != -1) {
+                /* pgd is in pgd_reg */
+                UASM_i_MFC0(p, ptr, 31, pgd_reg);
+        } else {
+                /*
+                 * &pgd << 11 stored in CONTEXT [23..63].
+                 */
+                UASM_i_MFC0(p, ptr, C0_CONTEXT);
+
+                /* Clear lower 23 bits of context. */
+                uasm_i_dins(p, ptr, 0, 0, 23);
+
+                /* 1 0  1 0 1  << 6  xkphys cached */
+                uasm_i_ori(p, ptr, ptr, 0x540);
+                uasm_i_drotr(p, ptr, ptr, 11);
+        }
 #elif defined(CONFIG_SMP)
 # ifdef  CONFIG_MIPS_MT_SMTC
         /*
@@ -620,7 +734,6 @@ build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
 #endif
 }
 
-enum vmalloc64_mode {not_refill, refill};
 /*
  * BVADDR is the faulting address, PTR is scratch.
  * PTR will hold the pgd for vmalloc.
@@ -638,7 +751,7 @@ build_get_pgd_vmalloc64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
 
         uasm_l_vmalloc(l, *p);
 
-        if (mode == refill && check_for_high_segbits) {
+        if (mode != not_refill && check_for_high_segbits) {
                 if (single_insn_swpd) {
                         uasm_il_bltz(p, r, bvaddr, label_vmalloc_done);
                         uasm_i_lui(p, ptr, uasm_rel_hi(swpd));
@@ -661,7 +774,7 @@ build_get_pgd_vmalloc64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
                                 uasm_i_daddiu(p, ptr, ptr, uasm_rel_lo(swpd));
                 }
         }
-        if (mode == refill && check_for_high_segbits) {
+        if (mode != not_refill && check_for_high_segbits) {
                 uasm_l_large_segbits_fault(l, *p);
                 /*
                  * We get here if we are an xsseg address, or if we are
@@ -677,7 +790,15 @@ build_get_pgd_vmalloc64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
                  */
                 UASM_i_LA(p, ptr, (unsigned long)tlb_do_page_fault_0);
                 uasm_i_jr(p, ptr);
-                uasm_i_nop(p);
+
+                if (mode == refill_scratch) {
+                        if (scratch_reg > 0)
+                                UASM_i_MFC0(p, 1, 31, scratch_reg);
+                        else
+                                UASM_i_LW(p, 1, scratchpad_offset(0), 0);
+                } else {
+                        uasm_i_nop(p);
+                }
         }
 }
 
@@ -834,6 +955,185 @@ static void __cpuinit build_update_entries(u32 **p, unsigned int tmp,
 #endif
 }
 
+struct mips_huge_tlb_info {
+        int huge_pte;
+        int restore_scratch;
+};
+
+static struct mips_huge_tlb_info __cpuinit
+build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
+                               struct uasm_reloc **r, unsigned int tmp,
+                               unsigned int ptr, int c0_scratch)
+{
+        struct mips_huge_tlb_info rv;
+        unsigned int even, odd;
+        int vmalloc_branch_delay_filled = 0;
+        const int scratch = 1; /* Our extra working register */
+
+        rv.huge_pte = scratch;
+        rv.restore_scratch = 0;
+
+        if (check_for_high_segbits) {
+                UASM_i_MFC0(p, tmp, C0_BADVADDR);
+
+                if (pgd_reg != -1)
+                        UASM_i_MFC0(p, ptr, 31, pgd_reg);
+                else
+                        UASM_i_MFC0(p, ptr, C0_CONTEXT);
+
+                if (c0_scratch >= 0)
+                        UASM_i_MTC0(p, scratch, 31, c0_scratch);
+                else
+                        UASM_i_SW(p, scratch, scratchpad_offset(0), 0);
+
+                uasm_i_dsrl_safe(p, scratch, tmp,
+                                 PGDIR_SHIFT + PGD_ORDER + PAGE_SHIFT - 3);
+                uasm_il_bnez(p, r, scratch, label_vmalloc);
+
+                if (pgd_reg == -1) {
+                        vmalloc_branch_delay_filled = 1;
+                        /* Clear lower 23 bits of context. */
+                        uasm_i_dins(p, ptr, 0, 0, 23);
+                }
+        } else {
+                if (pgd_reg != -1)
+                        UASM_i_MFC0(p, ptr, 31, pgd_reg);
+                else
+                        UASM_i_MFC0(p, ptr, C0_CONTEXT);
+
+                UASM_i_MFC0(p, tmp, C0_BADVADDR);
+
+                if (c0_scratch >= 0)
+                        UASM_i_MTC0(p, scratch, 31, c0_scratch);
+                else
+                        UASM_i_SW(p, scratch, scratchpad_offset(0), 0);
+
+                if (pgd_reg == -1)
+                        /* Clear lower 23 bits of context. */
+                        uasm_i_dins(p, ptr, 0, 0, 23);
+
+                uasm_il_bltz(p, r, tmp, label_vmalloc);
+        }
+
+        if (pgd_reg == -1) {
+                vmalloc_branch_delay_filled = 1;
+                /* 1 0  1 0 1  << 6  xkphys cached */
+                uasm_i_ori(p, ptr, ptr, 0x540);
+                uasm_i_drotr(p, ptr, ptr, 11);
+        }
+
+#ifdef __PAGETABLE_PMD_FOLDED
+#define LOC_PTEP scratch
+#else
+#define LOC_PTEP ptr
+#endif
+
+        if (!vmalloc_branch_delay_filled)
+                /* get pgd offset in bytes */
+                uasm_i_dsrl_safe(p, scratch, tmp, PGDIR_SHIFT - 3);
+
+        uasm_l_vmalloc_done(l, *p);
+
+        /*
+         *                         tmp          ptr
+         * fall-through case =   badvaddr  *pgd_current
+         * vmalloc case      =   badvaddr  swapper_pg_dir
+         */
+
+        if (vmalloc_branch_delay_filled)
+                /* get pgd offset in bytes */
+                uasm_i_dsrl_safe(p, scratch, tmp, PGDIR_SHIFT - 3);
+
+#ifdef __PAGETABLE_PMD_FOLDED
+        GET_CONTEXT(p, tmp); /* get context reg */
+#endif
+        uasm_i_andi(p, scratch, scratch, (PTRS_PER_PGD - 1) << 3);
+
+        if (use_lwx_insns()) {
+                UASM_i_LWX(p, LOC_PTEP, scratch, ptr);
+        } else {
+                uasm_i_daddu(p, ptr, ptr, scratch); /* add in pgd offset */
+                uasm_i_ld(p, LOC_PTEP, 0, ptr); /* get pmd pointer */
+        }
+
+#ifndef __PAGETABLE_PMD_FOLDED
+        /* get pmd offset in bytes */
+        uasm_i_dsrl_safe(p, scratch, tmp, PMD_SHIFT - 3);
+        uasm_i_andi(p, scratch, scratch, (PTRS_PER_PMD - 1) << 3);
+        GET_CONTEXT(p, tmp); /* get context reg */
+
+        if (use_lwx_insns()) {
+                UASM_i_LWX(p, scratch, scratch, ptr);
+        } else {
+                uasm_i_daddu(p, ptr, ptr, scratch); /* add in pmd offset */
+                UASM_i_LW(p, scratch, 0, ptr);
+        }
+#endif
+        /* Adjust the context during the load latency. */
+        build_adjust_context(p, tmp);
+
+#ifdef CONFIG_HUGETLB_PAGE
+        uasm_il_bbit1(p, r, scratch, ilog2(_PAGE_HUGE), label_tlb_huge_update);
+        /*
+         * The in the LWX case we don't want to do the load in the
+         * delay slot.  It cannot issue in the same cycle and may be
+         * speculative and unneeded.
+         */
+        if (use_lwx_insns())
+                uasm_i_nop(p);
+#endif /* CONFIG_HUGETLB_PAGE */
+
+
+        /* build_update_entries */
+        if (use_lwx_insns()) {
+                even = ptr;
+                odd = tmp;
+                UASM_i_LWX(p, even, scratch, tmp);
+                UASM_i_ADDIU(p, tmp, tmp, sizeof(pte_t));
+                UASM_i_LWX(p, odd, scratch, tmp);
+        } else {
+                UASM_i_ADDU(p, ptr, scratch, tmp); /* add in offset */
+                even = tmp;
+                odd = ptr;
+                UASM_i_LW(p, even, 0, ptr); /* get even pte */
+                UASM_i_LW(p, odd, sizeof(pte_t), ptr); /* get odd pte */
+        }
+        if (kernel_uses_smartmips_rixi) {
+                uasm_i_dsrl_safe(p, even, even, ilog2(_PAGE_NO_EXEC));
+                uasm_i_dsrl_safe(p, odd, odd, ilog2(_PAGE_NO_EXEC));
+                uasm_i_drotr(p, even, even,
+                             ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
+                UASM_i_MTC0(p, even, C0_ENTRYLO0); /* load it */
+                uasm_i_drotr(p, odd, odd,
+                             ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
+        } else {
+                uasm_i_dsrl_safe(p, even, even, ilog2(_PAGE_GLOBAL));
+                UASM_i_MTC0(p, even, C0_ENTRYLO0); /* load it */
+                uasm_i_dsrl_safe(p, odd, odd, ilog2(_PAGE_GLOBAL));
+        }
+        UASM_i_MTC0(p, odd, C0_ENTRYLO1); /* load it */
+
+        if (c0_scratch >= 0) {
+                UASM_i_MFC0(p, scratch, 31, c0_scratch);
+                build_tlb_write_entry(p, l, r, tlb_random);
+                uasm_l_leave(l, *p);
+                rv.restore_scratch = 1;
+        } else if (PAGE_SHIFT == 14 || PAGE_SHIFT == 13)  {
+                build_tlb_write_entry(p, l, r, tlb_random);
+                uasm_l_leave(l, *p);
+                UASM_i_LW(p, scratch, scratchpad_offset(0), 0);
+        } else {
+                UASM_i_LW(p, scratch, scratchpad_offset(0), 0);
+                build_tlb_write_entry(p, l, r, tlb_random);
+                uasm_l_leave(l, *p);
+                rv.restore_scratch = 1;
+        }
+
+        uasm_i_eret(p); /* return from trap */
+
+        return rv;
+}
+
 /*
  * For a 64-bit kernel, we are using the 64-bit XTLB refill exception
  * because EXL == 0.  If we wrap, we can also use the 32 instruction
@@ -849,54 +1149,67 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
         struct uasm_reloc *r = relocs;
         u32 *f;
         unsigned int final_len;
+        struct mips_huge_tlb_info htlb_info;
+        enum vmalloc64_mode vmalloc_mode;
 
         memset(tlb_handler, 0, sizeof(tlb_handler));
         memset(labels, 0, sizeof(labels));
         memset(relocs, 0, sizeof(relocs));
         memset(final_handler, 0, sizeof(final_handler));
 
-        /*
-         * create the plain linear handler
-         */
-        if (bcm1250_m3_war()) {
-                unsigned int segbits = 44;
+        if (scratch_reg == 0)
+                scratch_reg = allocate_kscratch();
 
-                uasm_i_dmfc0(&p, K0, C0_BADVADDR);
-                uasm_i_dmfc0(&p, K1, C0_ENTRYHI);
-                uasm_i_xor(&p, K0, K0, K1);
-                uasm_i_dsrl_safe(&p, K1, K0, 62);
-                uasm_i_dsrl_safe(&p, K0, K0, 12 + 1);
-                uasm_i_dsll_safe(&p, K0, K0, 64 + 12 + 1 - segbits);
-                uasm_i_or(&p, K0, K0, K1);
-                uasm_il_bnez(&p, &r, K0, label_leave);
-                /* No need for uasm_i_nop */
-        }
+        if ((scratch_reg > 0 || scratchpad_available()) && use_bbit_insns()) {
+                htlb_info = build_fast_tlb_refill_handler(&p, &l, &r, K0, K1,
+                                                          scratch_reg);
+                vmalloc_mode = refill_scratch;
+        } else {
+                htlb_info.huge_pte = K0;
+                htlb_info.restore_scratch = 0;
+                vmalloc_mode = refill_noscratch;
+                /*
+                 * create the plain linear handler
+                 */
+                if (bcm1250_m3_war()) {
+                        unsigned int segbits = 44;
+
+                        uasm_i_dmfc0(&p, K0, C0_BADVADDR);
+                        uasm_i_dmfc0(&p, K1, C0_ENTRYHI);
+                        uasm_i_xor(&p, K0, K0, K1);
+                        uasm_i_dsrl_safe(&p, K1, K0, 62);
+                        uasm_i_dsrl_safe(&p, K0, K0, 12 + 1);
+                        uasm_i_dsll_safe(&p, K0, K0, 64 + 12 + 1 - segbits);
+                        uasm_i_or(&p, K0, K0, K1);
+                        uasm_il_bnez(&p, &r, K0, label_leave);
+                        /* No need for uasm_i_nop */
+                }
 
 #ifdef CONFIG_64BIT
-        build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
+                build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
 #else
-        build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
+                build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
 #endif
 
 #ifdef CONFIG_HUGETLB_PAGE
-        build_is_huge_pte(&p, &r, K0, K1, label_tlb_huge_update);
+                build_is_huge_pte(&p, &r, K0, K1, label_tlb_huge_update);
 #endif
 
-        build_get_ptep(&p, K0, K1);
-        build_update_entries(&p, K0, K1);
-        build_tlb_write_entry(&p, &l, &r, tlb_random);
-        uasm_l_leave(&l, p);
-        uasm_i_eret(&p); /* return from trap */
-
+                build_get_ptep(&p, K0, K1);
+                build_update_entries(&p, K0, K1);
+                build_tlb_write_entry(&p, &l, &r, tlb_random);
+                uasm_l_leave(&l, p);
+                uasm_i_eret(&p); /* return from trap */
+        }
 #ifdef CONFIG_HUGETLB_PAGE
         uasm_l_tlb_huge_update(&l, p);
-        UASM_i_LW(&p, K0, 0, K1);
-        build_huge_update_entries(&p, K0, K1);
-        build_huge_tlb_write_entry(&p, &l, &r, K0, tlb_random);
+        build_huge_update_entries(&p, htlb_info.huge_pte, K1);
+        build_huge_tlb_write_entry(&p, &l, &r, K0, tlb_random,
+                                   htlb_info.restore_scratch);
 #endif
 
 #ifdef CONFIG_64BIT
-        build_get_pgd_vmalloc64(&p, &l, &r, K0, K1, refill);
+        build_get_pgd_vmalloc64(&p, &l, &r, K0, K1, vmalloc_mode);
 #endif
 
         /*
@@ -1014,6 +1327,55 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
 u32 handle_tlbl[FASTPATH_SIZE] __cacheline_aligned;
 u32 handle_tlbs[FASTPATH_SIZE] __cacheline_aligned;
 u32 handle_tlbm[FASTPATH_SIZE] __cacheline_aligned;
+#ifdef CONFIG_MIPS_PGD_C0_CONTEXT
+u32 tlbmiss_handler_setup_pgd[16] __cacheline_aligned;
+
+static void __cpuinit build_r4000_setup_pgd(void)
+{
+        const int a0 = 4;
+        const int a1 = 5;
+        u32 *p = tlbmiss_handler_setup_pgd;
+        struct uasm_label *l = labels;
+        struct uasm_reloc *r = relocs;
+
+        memset(tlbmiss_handler_setup_pgd, 0, sizeof(tlbmiss_handler_setup_pgd));
+        memset(labels, 0, sizeof(labels));
+        memset(relocs, 0, sizeof(relocs));
+
+        pgd_reg = allocate_kscratch();
+
+        if (pgd_reg == -1) {
+                /* PGD << 11 in c0_Context */
+                /*
+                 * If it is a ckseg0 address, convert to a physical
+                 * address.  Shifting right by 29 and adding 4 will
+                 * result in zero for these addresses.
+                 *
+                 */
+                UASM_i_SRA(&p, a1, a0, 29);
+                UASM_i_ADDIU(&p, a1, a1, 4);
+                uasm_il_bnez(&p, &r, a1, label_tlbl_goaround1);
+                uasm_i_nop(&p);
+                uasm_i_dinsm(&p, a0, 0, 29, 64 - 29);
+                uasm_l_tlbl_goaround1(&l, p);
+                UASM_i_SLL(&p, a0, a0, 11);
+                uasm_i_jr(&p, 31);
+                UASM_i_MTC0(&p, a0, C0_CONTEXT);
+        } else {
+                /* PGD in c0_KScratch */
+                uasm_i_jr(&p, 31);
+                UASM_i_MTC0(&p, a0, 31, pgd_reg);
+        }
+        if (p - tlbmiss_handler_setup_pgd > ARRAY_SIZE(tlbmiss_handler_setup_pgd))
+                panic("tlbmiss_handler_setup_pgd space exceeded");
+        uasm_resolve_relocs(relocs, labels);
+        pr_debug("Wrote tlbmiss_handler_setup_pgd (%u instructions).\n",
+                 (unsigned int)(p - tlbmiss_handler_setup_pgd));
+
+        dump_handler(tlbmiss_handler_setup_pgd,
+                     ARRAY_SIZE(tlbmiss_handler_setup_pgd));
+}
+#endif
 
 static void __cpuinit
 iPTE_LW(u32 **p, unsigned int pte, unsigned int ptr)
@@ -1100,14 +1462,20 @@ build_pte_present(u32 **p, struct uasm_reloc **r,
                   unsigned int pte, unsigned int ptr, enum label_id lid)
 {
         if (kernel_uses_smartmips_rixi) {
-                uasm_i_andi(p, pte, pte, _PAGE_PRESENT);
-                uasm_il_beqz(p, r, pte, lid);
+                if (use_bbit_insns()) {
+                        uasm_il_bbit0(p, r, pte, ilog2(_PAGE_PRESENT), lid);
+                        uasm_i_nop(p);
+                } else {
+                        uasm_i_andi(p, pte, pte, _PAGE_PRESENT);
+                        uasm_il_beqz(p, r, pte, lid);
+                        iPTE_LW(p, pte, ptr);
+                }
         } else {
                 uasm_i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_READ);
                 uasm_i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_READ);
                 uasm_il_bnez(p, r, pte, lid);
+                iPTE_LW(p, pte, ptr);
         }
-        iPTE_LW(p, pte, ptr);
 }
 
 /* Make PTE valid, store result in PTR. */
@@ -1128,10 +1496,17 @@ static void __cpuinit
 build_pte_writable(u32 **p, struct uasm_reloc **r,
                    unsigned int pte, unsigned int ptr, enum label_id lid)
 {
-        uasm_i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE);
-        uasm_i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE);
-        uasm_il_bnez(p, r, pte, lid);
-        iPTE_LW(p, pte, ptr);
+        if (use_bbit_insns()) {
+                uasm_il_bbit0(p, r, pte, ilog2(_PAGE_PRESENT), lid);
+                uasm_i_nop(p);
+                uasm_il_bbit0(p, r, pte, ilog2(_PAGE_WRITE), lid);
+                uasm_i_nop(p);
+        } else {
+                uasm_i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE);
+                uasm_i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE);
+                uasm_il_bnez(p, r, pte, lid);
+                iPTE_LW(p, pte, ptr);
+        }
 }
 
 /* Make PTE writable, update software status bits as well, then store
@@ -1155,12 +1530,19 @@ static void __cpuinit
 build_pte_modifiable(u32 **p, struct uasm_reloc **r,
                      unsigned int pte, unsigned int ptr, enum label_id lid)
 {
-        uasm_i_andi(p, pte, pte, _PAGE_WRITE);
-        uasm_il_beqz(p, r, pte, lid);
-        iPTE_LW(p, pte, ptr);
+        if (use_bbit_insns()) {
+                uasm_il_bbit0(p, r, pte, ilog2(_PAGE_WRITE), lid);
+                uasm_i_nop(p);
+        } else {
+                uasm_i_andi(p, pte, pte, _PAGE_WRITE);
+                uasm_il_beqz(p, r, pte, lid);
+                iPTE_LW(p, pte, ptr);
+        }
 }
 
 #ifndef CONFIG_MIPS_PGD_C0_CONTEXT
+
+
 /*
  * R3000 style TLB load/store/modify handlers.
  */
@@ -1402,14 +1784,23 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
                  * If the page is not _PAGE_VALID, RI or XI could not
                  * have triggered it.  Skip the expensive test..
                  */
-                uasm_i_andi(&p, K0, K0, _PAGE_VALID);
-                uasm_il_beqz(&p, &r, K0, label_tlbl_goaround1);
+                if (use_bbit_insns()) {
+                        uasm_il_bbit0(&p, &r, K0, ilog2(_PAGE_VALID),
+                                      label_tlbl_goaround1);
+                } else {
+                        uasm_i_andi(&p, K0, K0, _PAGE_VALID);
+                        uasm_il_beqz(&p, &r, K0, label_tlbl_goaround1);
+                }
                 uasm_i_nop(&p);
 
                 uasm_i_tlbr(&p);
                 /* Examine  entrylo 0 or 1 based on ptr. */
-                uasm_i_andi(&p, K0, K1, sizeof(pte_t));
-                uasm_i_beqz(&p, K0, 8);
+                if (use_bbit_insns()) {
+                        uasm_i_bbit0(&p, K1, ilog2(sizeof(pte_t)), 8);
+                } else {
+                        uasm_i_andi(&p, K0, K1, sizeof(pte_t));
+                        uasm_i_beqz(&p, K0, 8);
+                }
 
                 UASM_i_MFC0(&p, K0, C0_ENTRYLO0); /* load it in the delay slot*/
                 UASM_i_MFC0(&p, K0, C0_ENTRYLO1); /* load it if ptr is odd */
@@ -1417,12 +1808,18 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
                  * If the entryLo (now in K0) is valid (bit 1), RI or
                  * XI must have triggered it.
                  */
-                uasm_i_andi(&p, K0, K0, 2);
-                uasm_il_bnez(&p, &r, K0, label_nopage_tlbl);
-
-                uasm_l_tlbl_goaround1(&l, p);
-                /* Reload the PTE value */
-                iPTE_LW(&p, K0, K1);
+                if (use_bbit_insns()) {
+                        uasm_il_bbit1(&p, &r, K0, 1, label_nopage_tlbl);
+                        /* Reload the PTE value */
+                        iPTE_LW(&p, K0, K1);
+                        uasm_l_tlbl_goaround1(&l, p);
+                } else {
+                        uasm_i_andi(&p, K0, K0, 2);
+                        uasm_il_bnez(&p, &r, K0, label_nopage_tlbl);
+                        uasm_l_tlbl_goaround1(&l, p);
+                        /* Reload the PTE value */
+                        iPTE_LW(&p, K0, K1);
+                }
         }
         build_make_valid(&p, &r, K0, K1);
         build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1);
@@ -1442,23 +1839,35 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
                  * If the page is not _PAGE_VALID, RI or XI could not
                  * have triggered it.  Skip the expensive test..
                  */
-                uasm_i_andi(&p, K0, K0, _PAGE_VALID);
-                uasm_il_beqz(&p, &r, K0, label_tlbl_goaround2);
+                if (use_bbit_insns()) {
+                        uasm_il_bbit0(&p, &r, K0, ilog2(_PAGE_VALID),
+                                      label_tlbl_goaround2);
+                } else {
+                        uasm_i_andi(&p, K0, K0, _PAGE_VALID);
+                        uasm_il_beqz(&p, &r, K0, label_tlbl_goaround2);
+                }
                 uasm_i_nop(&p);
 
                 uasm_i_tlbr(&p);
                 /* Examine  entrylo 0 or 1 based on ptr. */
-                uasm_i_andi(&p, K0, K1, sizeof(pte_t));
-                uasm_i_beqz(&p, K0, 8);
-
+                if (use_bbit_insns()) {
+                        uasm_i_bbit0(&p, K1, ilog2(sizeof(pte_t)), 8);
+                } else {
+                        uasm_i_andi(&p, K0, K1, sizeof(pte_t));
+                        uasm_i_beqz(&p, K0, 8);
+                }
                 UASM_i_MFC0(&p, K0, C0_ENTRYLO0); /* load it in the delay slot*/
                 UASM_i_MFC0(&p, K0, C0_ENTRYLO1); /* load it if ptr is odd */
                 /*
                  * If the entryLo (now in K0) is valid (bit 1), RI or
                  * XI must have triggered it.
                  */
-                uasm_i_andi(&p, K0, K0, 2);
-                uasm_il_beqz(&p, &r, K0, label_tlbl_goaround2);
+                if (use_bbit_insns()) {
+                        uasm_il_bbit0(&p, &r, K0, 1, label_tlbl_goaround2);
+                } else {
+                        uasm_i_andi(&p, K0, K0, 2);
+                        uasm_il_beqz(&p, &r, K0, label_tlbl_goaround2);
+                }
                 /* Reload the PTE value */
                 iPTE_LW(&p, K0, K1);
 
@@ -1466,7 +1875,7 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
                  * We clobbered C0_PAGEMASK, restore it.  On the other branch
                  * it is restored in build_huge_tlb_write_entry.
                  */
-                build_restore_pagemask(&p, &r, K0, label_nopage_tlbl);
+                build_restore_pagemask(&p, &r, K0, label_nopage_tlbl, 0);
 
                 uasm_l_tlbl_goaround2(&l, p);
         }
@@ -1623,13 +2032,16 @@ void __cpuinit build_tlb_refill_handler(void)
                 break;
 
         default:
-                build_r4000_tlb_refill_handler();
                 if (!run_once) {
+#ifdef CONFIG_MIPS_PGD_C0_CONTEXT
+                        build_r4000_setup_pgd();
+#endif
                         build_r4000_tlb_load_handler();
                         build_r4000_tlb_store_handler();
                         build_r4000_tlb_modify_handler();
                         run_once++;
                 }
+                build_r4000_tlb_refill_handler();
         }
 }
 
@@ -1641,4 +2053,8 @@ void __cpuinit flush_tlb_handlers(void)
                            (unsigned long)handle_tlbs + sizeof(handle_tlbs));
         local_flush_icache_range((unsigned long)handle_tlbm,
                            (unsigned long)handle_tlbm + sizeof(handle_tlbm));
+#ifdef CONFIG_MIPS_PGD_C0_CONTEXT
+        local_flush_icache_range((unsigned long)tlbmiss_handler_setup_pgd,
+                           (unsigned long)tlbmiss_handler_setup_pgd + sizeof(handle_tlbm));
+#endif
 }
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index 23afdebc8e5c..5fa185151fc8 100644
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -68,7 +68,8 @@ enum opcode {
         insn_pref, insn_rfe, insn_sc, insn_scd, insn_sd, insn_sll,
         insn_sra, insn_srl, insn_rotr, insn_subu, insn_sw, insn_tlbp,
         insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori,
-        insn_dins, insn_syscall, insn_bbit0, insn_bbit1
+        insn_dins, insn_dinsm, insn_syscall, insn_bbit0, insn_bbit1,
+        insn_lwx, insn_ldx
 };
 
 struct insn {
@@ -142,9 +143,12 @@ static struct insn insn_table[] __uasminitdata = {
         { insn_xor,  M(spec_op, 0, 0, 0, 0, xor_op),  RS | RT | RD },
         { insn_xori,  M(xori_op, 0, 0, 0, 0, 0),  RS | RT | UIMM },
         { insn_dins, M(spec3_op, 0, 0, 0, 0, dins_op), RS | RT | RD | RE },
+        { insn_dinsm, M(spec3_op, 0, 0, 0, 0, dinsm_op), RS | RT | RD | RE },
         { insn_syscall, M(spec_op, 0, 0, 0, 0, syscall_op), SCIMM},
         { insn_bbit0, M(lwc2_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
         { insn_bbit1, M(swc2_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
+        { insn_lwx, M(spec3_op, 0, 0, 0, lwx_op, lx_op), RS | RT | RD },
+        { insn_ldx, M(spec3_op, 0, 0, 0, ldx_op, lx_op), RS | RT | RD },
         { insn_invalid, 0, 0 }
 };
 
@@ -152,91 +156,83 @@ static struct insn insn_table[] __uasminitdata = {
 
 static inline __uasminit u32 build_rs(u32 arg)
 {
-        if (arg & ~RS_MASK)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg & ~RS_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return (arg & RS_MASK) << RS_SH;
 }
 
 static inline __uasminit u32 build_rt(u32 arg)
 {
-        if (arg & ~RT_MASK)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg & ~RT_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return (arg & RT_MASK) << RT_SH;
 }
 
 static inline __uasminit u32 build_rd(u32 arg)
 {
-        if (arg & ~RD_MASK)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg & ~RD_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return (arg & RD_MASK) << RD_SH;
 }
 
 static inline __uasminit u32 build_re(u32 arg)
 {
-        if (arg & ~RE_MASK)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg & ~RE_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return (arg & RE_MASK) << RE_SH;
 }
 
 static inline __uasminit u32 build_simm(s32 arg)
 {
-        if (arg > 0x7fff || arg < -0x8000)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg > 0x7fff || arg < -0x8000,
+             KERN_WARNING "Micro-assembler field overflow\n");
 
         return arg & 0xffff;
 }
 
 static inline __uasminit u32 build_uimm(u32 arg)
 {
-        if (arg & ~IMM_MASK)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg & ~IMM_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return arg & IMM_MASK;
 }
 
 static inline __uasminit u32 build_bimm(s32 arg)
 {
-        if (arg > 0x1ffff || arg < -0x20000)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg > 0x1ffff || arg < -0x20000,
+             KERN_WARNING "Micro-assembler field overflow\n");
 
-        if (arg & 0x3)
-                printk(KERN_WARNING "Invalid micro-assembler branch target\n");
+        WARN(arg & 0x3, KERN_WARNING "Invalid micro-assembler branch target\n");
 
         return ((arg < 0) ? (1 << 15) : 0) | ((arg >> 2) & 0x7fff);
 }
 
 static inline __uasminit u32 build_jimm(u32 arg)
 {
-        if (arg & ~((JIMM_MASK) << 2))
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg & ~(JIMM_MASK << 2),
+             KERN_WARNING "Micro-assembler field overflow\n");
 
         return (arg >> 2) & JIMM_MASK;
 }
 
 static inline __uasminit u32 build_scimm(u32 arg)
 {
-        if (arg & ~SCIMM_MASK)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg & ~SCIMM_MASK,
+             KERN_WARNING "Micro-assembler field overflow\n");
 
         return (arg & SCIMM_MASK) << SCIMM_SH;
 }
 
 static inline __uasminit u32 build_func(u32 arg)
 {
-        if (arg & ~FUNC_MASK)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg & ~FUNC_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return arg & FUNC_MASK;
 }
 
 static inline __uasminit u32 build_set(u32 arg)
 {
-        if (arg & ~SET_MASK)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg & ~SET_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return arg & SET_MASK;
 }
@@ -340,6 +336,13 @@ Ip_u2u1msbu3(op)					\
 }                                                       \
 UASM_EXPORT_SYMBOL(uasm_i##op);
 
+#define I_u2u1msb32u3(op)                               \
+Ip_u2u1msbu3(op)                                        \
+{                                                       \
+        build_insn(buf, insn##op, b, a, c+d-33, c);     \
+}                                                       \
+UASM_EXPORT_SYMBOL(uasm_i##op);
+
 #define I_u1u2(op)                                      \
 Ip_u1u2(op)                                             \
 {                                                       \
@@ -422,9 +425,12 @@ I_0(_tlbwr)
 I_u3u1u2(_xor)
 I_u2u1u3(_xori)
 I_u2u1msbu3(_dins);
+I_u2u1msb32u3(_dinsm);
 I_u1(_syscall);
 I_u1u2s3(_bbit0);
 I_u1u2s3(_bbit1);
+I_u3u1u2(_lwx)
+I_u3u1u2(_ldx)
 
 #ifdef CONFIG_CPU_CAVIUM_OCTEON
 #include <asm/octeon/octeon.h>
diff --git a/arch/mips/sibyte/common/sb_tbprof.c b/arch/mips/sibyte/common/sb_tbprof.c
index 87ccdb4b5ac9..48853ab5bcf0 100644
--- a/arch/mips/sibyte/common/sb_tbprof.c
+++ b/arch/mips/sibyte/common/sb_tbprof.c
@@ -410,14 +410,13 @@ static int sbprof_tb_open(struct inode *inode, struct file *filp)
                 return -EBUSY;
 
         memset(&sbp, 0, sizeof(struct sbprof_tb));
-        sbp.sbprof_tbbuf = vmalloc(MAX_TBSAMPLE_BYTES);
+        sbp.sbprof_tbbuf = vzalloc(MAX_TBSAMPLE_BYTES);
         if (!sbp.sbprof_tbbuf) {
                 sbp.open = SB_CLOSED;
                 wmb();
                 return -ENOMEM;
         }
 
-        memset(sbp.sbprof_tbbuf, 0, MAX_TBSAMPLE_BYTES);
         init_waitqueue_head(&sbp.tb_sync);
         init_waitqueue_head(&sbp.tb_read);
         mutex_init(&sbp.lock);
diff --git a/arch/mips/txx9/generic/pci.c b/arch/mips/txx9/generic/pci.c
index 96e69a00ffc8..85a87de17eb4 100644
--- a/arch/mips/txx9/generic/pci.c
+++ b/arch/mips/txx9/generic/pci.c
@@ -213,11 +213,8 @@ txx9_alloc_pci_controller(struct pci_controller *pcic,
 
         pcic->mem_offset = 0;   /* busaddr == physaddr */
 
-        printk(KERN_INFO "PCI: IO 0x%08llx-0x%08llx MEM 0x%08llx-0x%08llx\n",
-               (unsigned long long)pcic->mem_resource[1].start,
-               (unsigned long long)pcic->mem_resource[1].end,
-               (unsigned long long)pcic->mem_resource[0].start,
-               (unsigned long long)pcic->mem_resource[0].end);
+        printk(KERN_INFO "PCI: IO %pR MEM %pR\n",
+               &pcic->mem_resource[1], &pcic->mem_resource[0]);
 
         /* register_pci_controller() will request MEM resource */
         release_resource(&pcic->mem_resource[0]);
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig
index 8ed41cf2b08d..243bfa23fd58 100644
--- a/arch/mn10300/Kconfig
+++ b/arch/mn10300/Kconfig
@@ -1,6 +1,7 @@
 config MN10300
         def_bool y
         select HAVE_OPROFILE
+        select GENERIC_HARDIRQS
 
 config AM33_2
         def_bool n
@@ -34,9 +35,6 @@ config RWSEM_GENERIC_SPINLOCK
 config RWSEM_XCHGADD_ALGORITHM
         bool
 
-config GENERIC_HARDIRQS_NO__DO_IRQ
-        def_bool y
-
 config GENERIC_CALIBRATE_DELAY
         def_bool y
 
@@ -79,10 +77,6 @@ config QUICKLIST
 config ARCH_HAS_ILOG2_U32
         def_bool y
 
-# Use the generic interrupt handling code in kernel/irq/
-config GENERIC_HARDIRQS
-        def_bool y
-
 config HOTPLUG_CPU
         def_bool n
 
diff --git a/arch/mn10300/configs/asb2303_defconfig b/arch/mn10300/configs/asb2303_defconfig
index 3f749b69ca71..1fd41ec1dfb5 100644
--- a/arch/mn10300/configs/asb2303_defconfig
+++ b/arch/mn10300/configs/asb2303_defconfig
@@ -4,7 +4,7 @@ CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_TINY_RCU=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_VM_EVENT_COUNTERS is not set
diff --git a/arch/mn10300/configs/asb2364_defconfig b/arch/mn10300/configs/asb2364_defconfig
index 83ce2f27b12a..31d76261a3d5 100644
--- a/arch/mn10300/configs/asb2364_defconfig
+++ b/arch/mn10300/configs/asb2364_defconfig
@@ -15,7 +15,7 @@ CONFIG_CGROUP_CPUACCT=y
 CONFIG_RESOURCE_COUNTERS=y
 CONFIG_RELAY=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_VM_EVENT_COUNTERS is not set
 CONFIG_SLAB=y
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index 0888675c98dd..fed2946f7335 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -12,7 +12,10 @@ config PARISC
         select HAVE_IRQ_WORK
         select HAVE_PERF_EVENTS
         select GENERIC_ATOMIC64 if !64BIT
-        select GENERIC_HARDIRQS_NO__DO_IRQ
+        select HAVE_GENERIC_HARDIRQS
+        select GENERIC_IRQ_PROBE
+        select IRQ_PER_CPU
+
         help
           The PA-RISC microprocessor is designed by Hewlett-Packard and used
           in many of their workstations & servers (HP9000 700 and 800 series,
@@ -66,22 +69,9 @@ config TIME_LOW_RES
         depends on SMP
         default y
 
-config GENERIC_HARDIRQS
-        def_bool y
-
-config GENERIC_IRQ_PROBE
-        def_bool y
-
 config HAVE_LATENCYTOP_SUPPORT
         def_bool y
 
-config IRQ_PER_CPU
-        bool
-        default y
-
-config GENERIC_HARDIRQS_NO__DO_IRQ
-        def_bool y
-
 # unless you want to implement ACPI on PA-RISC ... ;-)
 config PM
         bool
diff --git a/arch/parisc/configs/a500_defconfig b/arch/parisc/configs/a500_defconfig
index f9305f30603a..b647b182dacc 100644
--- a/arch/parisc/configs/a500_defconfig
+++ b/arch/parisc/configs/a500_defconfig
@@ -8,7 +8,7 @@ CONFIG_LOG_BUF_SHIFT=16
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_SLAB=y
 CONFIG_PROFILING=y
diff --git a/arch/parisc/configs/c3000_defconfig b/arch/parisc/configs/c3000_defconfig
index 628d3e022535..311ca367b622 100644
--- a/arch/parisc/configs/c3000_defconfig
+++ b/arch/parisc/configs/c3000_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=16
 CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_SLAB=y
 CONFIG_PROFILING=y
diff --git a/arch/parisc/kernel/firmware.c b/arch/parisc/kernel/firmware.c
index df971fa0c32f..4896ed090585 100644
--- a/arch/parisc/kernel/firmware.c
+++ b/arch/parisc/kernel/firmware.c
@@ -1126,15 +1126,13 @@ int pdc_iodc_print(const unsigned char *str, unsigned count)
         unsigned int i;
         unsigned long flags;
 
-        for (i = 0; i < count && i < 79;) {
+        for (i = 0; i < count;) {
                 switch(str[i]) {
                 case '\n':
                         iodc_dbuf[i+0] = '\r';
                         iodc_dbuf[i+1] = '\n';
                         i += 2;
                         goto print;
-                case '\b':      /* BS */
-                        i--; /* overwrite last */
                 default:
                         iodc_dbuf[i] = str[i];
                         i++;
@@ -1142,15 +1140,6 @@ int pdc_iodc_print(const unsigned char *str, unsigned count)
                 }
         }
 
-        /* if we're at the end of line, and not already inserting a newline,
-         * insert one anyway. iodc console doesn't claim to support >79 char
-         * lines. don't account for this in the return value.
-         */
-        if (i == 79 && iodc_dbuf[i-1] != '\n') {
-                iodc_dbuf[i+0] = '\r';
-                iodc_dbuf[i+1] = '\n';
-        }
-
 print:
         spin_lock_irqsave(&pdc_lock, flags);
         real32_call(PAGE0->mem_cons.iodc_io,
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 959f38ccb9a7..7d69e9bf5e64 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -36,24 +36,12 @@ config GENERIC_TIME_VSYSCALL
 config GENERIC_CLOCKEVENTS
         def_bool y
 
-config GENERIC_HARDIRQS
-        bool
-        default y
-
-config GENERIC_HARDIRQS_NO__DO_IRQ
-        bool
-        default y
-
 config HAVE_SETUP_PER_CPU_AREA
         def_bool PPC64
 
 config NEED_PER_CPU_EMBED_FIRST_CHUNK
         def_bool PPC64
 
-config IRQ_PER_CPU
-        bool
-        default y
-
 config NR_IRQS
         int "Number of virtual interrupt numbers"
         range 32 32768
@@ -143,6 +131,9 @@ config PPC
         select HAVE_PERF_EVENTS
         select HAVE_REGS_AND_STACK_ACCESS_API
         select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S_64
+        select HAVE_GENERIC_HARDIRQS
+        select HAVE_SPARSE_IRQ
+        select IRQ_PER_CPU
 
 config EARLY_PRINTK
         bool
@@ -392,19 +383,6 @@ config IRQ_ALL_CPUS
           CPU.  Generally saying Y is safe, although some problems have been
           reported with SMP Power Macintoshes with this option enabled.
 
-config SPARSE_IRQ
-        bool "Support sparse irq numbering"
-        default n
-        help
-          This enables support for sparse irqs. This is useful for distro
-          kernels that want to define a high CONFIG_NR_CPUS value but still
-          want to have low kernel memory footprint on smaller machines.
-
-          ( Sparse IRQs can also be beneficial on NUMA boxes, as they spread
-            out the irq_desc[] array in a more NUMA-friendly way. )
-
-          If you don't know what to do here, say N.
-
 config NUMA
         bool "NUMA support"
         depends on PPC64
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 96deec63bcf3..89178164af5e 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -368,7 +368,7 @@ INSTALL := install
 extra-installed         := $(patsubst $(obj)/%, $(DESTDIR)$(WRAPPER_OBJDIR)/%, $(extra-y))
 hostprogs-installed     := $(patsubst %, $(DESTDIR)$(WRAPPER_BINDIR)/%, $(hostprogs-y))
 wrapper-installed       := $(DESTDIR)$(WRAPPER_BINDIR)/wrapper
-dts-installed           := $(patsubst $(obj)/dts/%, $(DESTDIR)$(WRAPPER_DTSDIR)/%, $(wildcard $(obj)/dts/*.dts))
+dts-installed           := $(patsubst $(dtstree)/%, $(DESTDIR)$(WRAPPER_DTSDIR)/%, $(wildcard $(dtstree)/*.dts))
 
 all-installed           := $(extra-installed) $(hostprogs-installed) $(wrapper-installed) $(dts-installed)
 
diff --git a/arch/powerpc/boot/dts/mpc8308rdb.dts b/arch/powerpc/boot/dts/mpc8308rdb.dts
index d3db02f98ddd..a0bd1881081e 100644
--- a/arch/powerpc/boot/dts/mpc8308rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8308rdb.dts
@@ -109,7 +109,7 @@
                 #address-cells = <1>;
                 #size-cells = <1>;
                 device_type = "soc";
-                compatible = "fsl,mpc8315-immr", "simple-bus";
+                compatible = "fsl,mpc8308-immr", "simple-bus";
                 ranges = <0 0xe0000000 0x00100000>;
                 reg = <0xe0000000 0x00000200>;
                 bus-frequency = <0>;
diff --git a/arch/powerpc/boot/dts/p1022ds.dts b/arch/powerpc/boot/dts/p1022ds.dts
index 2bbecbb4cbf9..69422eb24d97 100644
--- a/arch/powerpc/boot/dts/p1022ds.dts
+++ b/arch/powerpc/boot/dts/p1022ds.dts
@@ -291,13 +291,13 @@
                         ranges = <0x0 0xc100 0x200>;
                         cell-index = <1>;
                         dma00: dma-channel@0 {
-                                compatible = "fsl,eloplus-dma-channel";
+                                compatible = "fsl,ssi-dma-channel";
                                 reg = <0x0 0x80>;
                                 cell-index = <0>;
                                 interrupts = <76 2>;
                         };
                         dma01: dma-channel@80 {
-                                compatible = "fsl,eloplus-dma-channel";
+                                compatible = "fsl,ssi-dma-channel";
                                 reg = <0x80 0x80>;
                                 cell-index = <1>;
                                 interrupts = <77 2>;
diff --git a/arch/powerpc/configs/40x/acadia_defconfig b/arch/powerpc/configs/40x/acadia_defconfig
index 97fedceaa30b..4182c772340b 100644
--- a/arch/powerpc/configs/40x/acadia_defconfig
+++ b/arch/powerpc/configs/40x/acadia_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/40x/ep405_defconfig b/arch/powerpc/configs/40x/ep405_defconfig
index 33b3c24f4edd..2dbb293163f5 100644
--- a/arch/powerpc/configs/40x/ep405_defconfig
+++ b/arch/powerpc/configs/40x/ep405_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/40x/hcu4_defconfig b/arch/powerpc/configs/40x/hcu4_defconfig
index 4613079a0ab1..ebeb4accad65 100644
--- a/arch/powerpc/configs/40x/hcu4_defconfig
+++ b/arch/powerpc/configs/40x/hcu4_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/40x/kilauea_defconfig b/arch/powerpc/configs/40x/kilauea_defconfig
index 34b8c1a1e752..532ea9d93a15 100644
--- a/arch/powerpc/configs/40x/kilauea_defconfig
+++ b/arch/powerpc/configs/40x/kilauea_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/40x/makalu_defconfig b/arch/powerpc/configs/40x/makalu_defconfig
index 651be09136fa..3c142ac1b344 100644
--- a/arch/powerpc/configs/40x/makalu_defconfig
+++ b/arch/powerpc/configs/40x/makalu_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/40x/walnut_defconfig b/arch/powerpc/configs/40x/walnut_defconfig
index ded455e18339..ff57d4828ffc 100644
--- a/arch/powerpc/configs/40x/walnut_defconfig
+++ b/arch/powerpc/configs/40x/walnut_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/44x/arches_defconfig b/arch/powerpc/configs/44x/arches_defconfig
index 63746a041d6b..3ed16d5c909d 100644
--- a/arch/powerpc/configs/44x/arches_defconfig
+++ b/arch/powerpc/configs/44x/arches_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/bamboo_defconfig b/arch/powerpc/configs/44x/bamboo_defconfig
index f5f2a4e3e21b..b1b7d2c5c059 100644
--- a/arch/powerpc/configs/44x/bamboo_defconfig
+++ b/arch/powerpc/configs/44x/bamboo_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/bluestone_defconfig b/arch/powerpc/configs/44x/bluestone_defconfig
index ac65b48b8ccd..30a0a8e08fdd 100644
--- a/arch/powerpc/configs/44x/bluestone_defconfig
+++ b/arch/powerpc/configs/44x/bluestone_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_VM_EVENT_COUNTERS is not set
 # CONFIG_PCI_QUIRKS is not set
 # CONFIG_COMPAT_BRK is not set
diff --git a/arch/powerpc/configs/44x/canyonlands_defconfig b/arch/powerpc/configs/44x/canyonlands_defconfig
index 17e4dd98eed7..a46942aac695 100644
--- a/arch/powerpc/configs/44x/canyonlands_defconfig
+++ b/arch/powerpc/configs/44x/canyonlands_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/ebony_defconfig b/arch/powerpc/configs/44x/ebony_defconfig
index fedd03fdf5d5..07d77e51f1ba 100644
--- a/arch/powerpc/configs/44x/ebony_defconfig
+++ b/arch/powerpc/configs/44x/ebony_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/44x/eiger_defconfig b/arch/powerpc/configs/44x/eiger_defconfig
index ebff7011282e..2ce7e9aff09e 100644
--- a/arch/powerpc/configs/44x/eiger_defconfig
+++ b/arch/powerpc/configs/44x/eiger_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/icon_defconfig b/arch/powerpc/configs/44x/icon_defconfig
index 865e93fb41fd..18730ff9de7c 100644
--- a/arch/powerpc/configs/44x/icon_defconfig
+++ b/arch/powerpc/configs/44x/icon_defconfig
@@ -6,7 +6,7 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/iss476-smp_defconfig b/arch/powerpc/configs/44x/iss476-smp_defconfig
index 8ece4c774415..92f863ac8443 100644
--- a/arch/powerpc/configs/44x/iss476-smp_defconfig
+++ b/arch/powerpc/configs/44x/iss476-smp_defconfig
@@ -7,7 +7,7 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_PROFILING=y
diff --git a/arch/powerpc/configs/44x/katmai_defconfig b/arch/powerpc/configs/44x/katmai_defconfig
index 4ca9b4873c51..34c09144a699 100644
--- a/arch/powerpc/configs/44x/katmai_defconfig
+++ b/arch/powerpc/configs/44x/katmai_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/rainier_defconfig b/arch/powerpc/configs/44x/rainier_defconfig
index e3b65d24207e..21c33faf61a2 100644
--- a/arch/powerpc/configs/44x/rainier_defconfig
+++ b/arch/powerpc/configs/44x/rainier_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/redwood_defconfig b/arch/powerpc/configs/44x/redwood_defconfig
index 64cd0f3421a9..01cc2b1a7f9a 100644
--- a/arch/powerpc/configs/44x/redwood_defconfig
+++ b/arch/powerpc/configs/44x/redwood_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/sam440ep_defconfig b/arch/powerpc/configs/44x/sam440ep_defconfig
index 01d03367917e..dfcffede16ad 100644
--- a/arch/powerpc/configs/44x/sam440ep_defconfig
+++ b/arch/powerpc/configs/44x/sam440ep_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/sequoia_defconfig b/arch/powerpc/configs/44x/sequoia_defconfig
index 89b2f9626137..47e399f2892f 100644
--- a/arch/powerpc/configs/44x/sequoia_defconfig
+++ b/arch/powerpc/configs/44x/sequoia_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/taishan_defconfig b/arch/powerpc/configs/44x/taishan_defconfig
index e3386cf6f5b7..a6a002ed5681 100644
--- a/arch/powerpc/configs/44x/taishan_defconfig
+++ b/arch/powerpc/configs/44x/taishan_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/warp_defconfig b/arch/powerpc/configs/44x/warp_defconfig
index 9c13b9dffafa..6cf9d6614805 100644
--- a/arch/powerpc/configs/44x/warp_defconfig
+++ b/arch/powerpc/configs/44x/warp_defconfig
@@ -8,7 +8,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/52xx/cm5200_defconfig b/arch/powerpc/configs/52xx/cm5200_defconfig
index f234c4d0b15c..69b57daf402e 100644
--- a/arch/powerpc/configs/52xx/cm5200_defconfig
+++ b/arch/powerpc/configs/52xx/cm5200_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/powerpc/configs/52xx/lite5200b_defconfig b/arch/powerpc/configs/52xx/lite5200b_defconfig
index a4a795c80740..f3638ae0a627 100644
--- a/arch/powerpc/configs/52xx/lite5200b_defconfig
+++ b/arch/powerpc/configs/52xx/lite5200b_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/powerpc/configs/52xx/motionpro_defconfig b/arch/powerpc/configs/52xx/motionpro_defconfig
index 20d53a1aa7e4..6828eda02bdc 100644
--- a/arch/powerpc/configs/52xx/motionpro_defconfig
+++ b/arch/powerpc/configs/52xx/motionpro_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/powerpc/configs/52xx/pcm030_defconfig b/arch/powerpc/configs/52xx/pcm030_defconfig
index 6bd58338bf1a..7f7e4a878602 100644
--- a/arch/powerpc/configs/52xx/pcm030_defconfig
+++ b/arch/powerpc/configs/52xx/pcm030_defconfig
@@ -8,7 +8,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_VM_EVENT_COUNTERS is not set
 CONFIG_SLAB=y
diff --git a/arch/powerpc/configs/52xx/tqm5200_defconfig b/arch/powerpc/configs/52xx/tqm5200_defconfig
index 3a1f70292d9d..959cd2cfc275 100644
--- a/arch/powerpc/configs/52xx/tqm5200_defconfig
+++ b/arch/powerpc/configs/52xx/tqm5200_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/powerpc/configs/83xx/asp8347_defconfig b/arch/powerpc/configs/83xx/asp8347_defconfig
index eed42d8919e8..d2762d9dcb8e 100644
--- a/arch/powerpc/configs/83xx/asp8347_defconfig
+++ b/arch/powerpc/configs/83xx/asp8347_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/kmeter1_defconfig b/arch/powerpc/configs/83xx/kmeter1_defconfig
index e43ecb27dfd7..7a7b731c5735 100644
--- a/arch/powerpc/configs/83xx/kmeter1_defconfig
+++ b/arch/powerpc/configs/83xx/kmeter1_defconfig
@@ -3,7 +3,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_HOTPLUG is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
index c2e6ab51d335..c683bce4c26e 100644
--- a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
+++ b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig b/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig
index 1d3b20065913..a721cd3d793f 100644
--- a/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig
+++ b/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/mpc832x_mds_defconfig b/arch/powerpc/configs/83xx/mpc832x_mds_defconfig
index 91fe73bd5ad2..a5699a1f7d0a 100644
--- a/arch/powerpc/configs/83xx/mpc832x_mds_defconfig
+++ b/arch/powerpc/configs/83xx/mpc832x_mds_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig b/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig
index 6d300f205604..b4da1a7e6449 100644
--- a/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig
+++ b/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/mpc834x_itx_defconfig b/arch/powerpc/configs/83xx/mpc834x_itx_defconfig
index b236a67e01fe..291f8221d5a6 100644
--- a/arch/powerpc/configs/83xx/mpc834x_itx_defconfig
+++ b/arch/powerpc/configs/83xx/mpc834x_itx_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig b/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig
index 001dead3cde9..f8b228aaa03a 100644
--- a/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig
+++ b/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/mpc834x_mds_defconfig b/arch/powerpc/configs/83xx/mpc834x_mds_defconfig
index 9dccefca00c3..99660c062191 100644
--- a/arch/powerpc/configs/83xx/mpc834x_mds_defconfig
+++ b/arch/powerpc/configs/83xx/mpc834x_mds_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/mpc836x_mds_defconfig b/arch/powerpc/configs/83xx/mpc836x_mds_defconfig
index d4b165d7d294..10b5c4cd0e72 100644
--- a/arch/powerpc/configs/83xx/mpc836x_mds_defconfig
+++ b/arch/powerpc/configs/83xx/mpc836x_mds_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig
index 89ba67274bda..45925d701d2a 100644
--- a/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig
+++ b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/mpc837x_mds_defconfig b/arch/powerpc/configs/83xx/mpc837x_mds_defconfig
index 2ea6b405046a..f367985be6f7 100644
--- a/arch/powerpc/configs/83xx/mpc837x_mds_defconfig
+++ b/arch/powerpc/configs/83xx/mpc837x_mds_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig b/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig
index bffe3c775030..414eda381591 100644
--- a/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig
+++ b/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/sbc834x_defconfig b/arch/powerpc/configs/83xx/sbc834x_defconfig
index fa5c9eefc9ad..6d6463fe06fc 100644
--- a/arch/powerpc/configs/83xx/sbc834x_defconfig
+++ b/arch/powerpc/configs/83xx/sbc834x_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/85xx/ksi8560_defconfig b/arch/powerpc/configs/85xx/ksi8560_defconfig
index 385b1af37d75..8f7c1061891a 100644
--- a/arch/powerpc/configs/85xx/ksi8560_defconfig
+++ b/arch/powerpc/configs/85xx/ksi8560_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_KSI8560=y
 CONFIG_CPM2=y
diff --git a/arch/powerpc/configs/85xx/mpc8540_ads_defconfig b/arch/powerpc/configs/85xx/mpc8540_ads_defconfig
index 222b704c1f4b..55e0725500dc 100644
--- a/arch/powerpc/configs/85xx/mpc8540_ads_defconfig
+++ b/arch/powerpc/configs/85xx/mpc8540_ads_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_MPC8540_ADS=y
 CONFIG_NO_HZ=y
diff --git a/arch/powerpc/configs/85xx/mpc8560_ads_defconfig b/arch/powerpc/configs/85xx/mpc8560_ads_defconfig
index 619702de9477..d724095530a6 100644
--- a/arch/powerpc/configs/85xx/mpc8560_ads_defconfig
+++ b/arch/powerpc/configs/85xx/mpc8560_ads_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_MPC8560_ADS=y
 CONFIG_BINFMT_MISC=y
diff --git a/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig b/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig
index 6bf56e83f957..4b44beaa21ae 100644
--- a/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig
+++ b/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_MPC85xx_CDS=y
 CONFIG_NO_HZ=y
diff --git a/arch/powerpc/configs/85xx/sbc8548_defconfig b/arch/powerpc/configs/85xx/sbc8548_defconfig
index a9a17d055766..5b2b651dfb98 100644
--- a/arch/powerpc/configs/85xx/sbc8548_defconfig
+++ b/arch/powerpc/configs/85xx/sbc8548_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_SBC8548=y
diff --git a/arch/powerpc/configs/85xx/sbc8560_defconfig b/arch/powerpc/configs/85xx/sbc8560_defconfig
index 820e32d8c42b..f7fdb0318e4c 100644
--- a/arch/powerpc/configs/85xx/sbc8560_defconfig
+++ b/arch/powerpc/configs/85xx/sbc8560_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_SBC8560=y
diff --git a/arch/powerpc/configs/85xx/socrates_defconfig b/arch/powerpc/configs/85xx/socrates_defconfig
index b6db3f47af99..77506b5d5a41 100644
--- a/arch/powerpc/configs/85xx/socrates_defconfig
+++ b/arch/powerpc/configs/85xx/socrates_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=16
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/powerpc/configs/85xx/stx_gp3_defconfig b/arch/powerpc/configs/85xx/stx_gp3_defconfig
index 333a41bd2a68..5d4db154bf59 100644
--- a/arch/powerpc/configs/85xx/stx_gp3_defconfig
+++ b/arch/powerpc/configs/85xx/stx_gp3_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODVERSIONS=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/85xx/tqm8540_defconfig b/arch/powerpc/configs/85xx/tqm8540_defconfig
index 33db352f847e..ddcb9f37fa1f 100644
--- a/arch/powerpc/configs/85xx/tqm8540_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8540_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/powerpc/configs/85xx/tqm8541_defconfig b/arch/powerpc/configs/85xx/tqm8541_defconfig
index f0c20dfbd4d3..981abd6d4b57 100644
--- a/arch/powerpc/configs/85xx/tqm8541_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8541_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/powerpc/configs/85xx/tqm8548_defconfig b/arch/powerpc/configs/85xx/tqm8548_defconfig
index a883450dcdfa..37b3d7227cdd 100644
--- a/arch/powerpc/configs/85xx/tqm8548_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8548_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/85xx/tqm8555_defconfig b/arch/powerpc/configs/85xx/tqm8555_defconfig
index ff95f90dc171..3593b320c97c 100644
--- a/arch/powerpc/configs/85xx/tqm8555_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8555_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/powerpc/configs/85xx/tqm8560_defconfig b/arch/powerpc/configs/85xx/tqm8560_defconfig
index 8d6c90ea4783..de413acc34d6 100644
--- a/arch/powerpc/configs/85xx/tqm8560_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8560_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig b/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig
index f53efe4a0e0c..5ea3124518fd 100644
--- a/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig
+++ b/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig
@@ -11,7 +11,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
index 432ebc28d25c..4b2441244eab 100644
--- a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
+++ b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
@@ -11,7 +11,7 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_RELAY=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/86xx/gef_sbc310_defconfig b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
index ce5e919d9b55..a360ba44b928 100644
--- a/arch/powerpc/configs/86xx/gef_sbc310_defconfig
+++ b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
@@ -11,7 +11,7 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_RELAY=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/86xx/gef_sbc610_defconfig b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
index 589e71e6dc1c..be2829dd129f 100644
--- a/arch/powerpc/configs/86xx/gef_sbc610_defconfig
+++ b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
@@ -11,7 +11,7 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_RELAY=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig b/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig
index 321fb47096d9..036bfb2d18cd 100644
--- a/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig
+++ b/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 # CONFIG_ELF_CORE is not set
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig b/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig
index b5e46399374e..0c9c7ed7ec75 100644
--- a/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig
+++ b/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig
@@ -10,7 +10,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/86xx/sbc8641d_defconfig b/arch/powerpc/configs/86xx/sbc8641d_defconfig
index 71145c3a64db..0a92ca045641 100644
--- a/arch/powerpc/configs/86xx/sbc8641d_defconfig
+++ b/arch/powerpc/configs/86xx/sbc8641d_defconfig
@@ -11,7 +11,7 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_RELAY=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/adder875_defconfig b/arch/powerpc/configs/adder875_defconfig
index ca84c7fc24d5..69128740c14d 100644
--- a/arch/powerpc/configs/adder875_defconfig
+++ b/arch/powerpc/configs/adder875_defconfig
@@ -4,7 +4,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_BASE_FULL is not set
diff --git a/arch/powerpc/configs/e55xx_smp_defconfig b/arch/powerpc/configs/e55xx_smp_defconfig
index 94d120ef99cf..06f95492afc7 100644
--- a/arch/powerpc/configs/e55xx_smp_defconfig
+++ b/arch/powerpc/configs/e55xx_smp_defconfig
@@ -12,7 +12,7 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/ep8248e_defconfig b/arch/powerpc/configs/ep8248e_defconfig
index 2677b08199e7..fceffb3cffbe 100644
--- a/arch/powerpc/configs/ep8248e_defconfig
+++ b/arch/powerpc/configs/ep8248e_defconfig
@@ -2,7 +2,7 @@ CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_SLAB=y
 # CONFIG_IOSCHED_CFQ is not set
diff --git a/arch/powerpc/configs/ep88xc_defconfig b/arch/powerpc/configs/ep88xc_defconfig
index f9a3112e5442..219fd470ed22 100644
--- a/arch/powerpc/configs/ep88xc_defconfig
+++ b/arch/powerpc/configs/ep88xc_defconfig
@@ -4,7 +4,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_BASE_FULL is not set
diff --git a/arch/powerpc/configs/gamecube_defconfig b/arch/powerpc/configs/gamecube_defconfig
index fcf0a398cd66..e74d3a483705 100644
--- a/arch/powerpc/configs/gamecube_defconfig
+++ b/arch/powerpc/configs/gamecube_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_ELF_CORE is not set
 CONFIG_PERF_COUNTERS=y
 # CONFIG_VM_EVENT_COUNTERS is not set
diff --git a/arch/powerpc/configs/holly_defconfig b/arch/powerpc/configs/holly_defconfig
index b9b63a609525..94ebfee188db 100644
--- a/arch/powerpc/configs/holly_defconfig
+++ b/arch/powerpc/configs/holly_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_PPC_CHRP is not set
diff --git a/arch/powerpc/configs/mgcoge_defconfig b/arch/powerpc/configs/mgcoge_defconfig
index c4ed255af18b..39518e91822f 100644
--- a/arch/powerpc/configs/mgcoge_defconfig
+++ b/arch/powerpc/configs/mgcoge_defconfig
@@ -3,7 +3,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_SLAB=y
 # CONFIG_IOSCHED_CFQ is not set
diff --git a/arch/powerpc/configs/mgsuvd_defconfig b/arch/powerpc/configs/mgsuvd_defconfig
index f276c7cf555b..2a490626015c 100644
--- a/arch/powerpc/configs/mgsuvd_defconfig
+++ b/arch/powerpc/configs/mgsuvd_defconfig
@@ -4,7 +4,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_BUG is not set
diff --git a/arch/powerpc/configs/mpc7448_hpc2_defconfig b/arch/powerpc/configs/mpc7448_hpc2_defconfig
index 3b9470883de5..75f0bbf0f6e8 100644
--- a/arch/powerpc/configs/mpc7448_hpc2_defconfig
+++ b/arch/powerpc/configs/mpc7448_hpc2_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_PPC_CHRP is not set
 # CONFIG_PPC_PMAC is not set
diff --git a/arch/powerpc/configs/mpc8272_ads_defconfig b/arch/powerpc/configs/mpc8272_ads_defconfig
index c7d68ff1a736..6a22400f73c1 100644
--- a/arch/powerpc/configs/mpc8272_ads_defconfig
+++ b/arch/powerpc/configs/mpc8272_ads_defconfig
@@ -2,7 +2,7 @@ CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_PPC_CHRP is not set
 # CONFIG_PPC_PMAC is not set
diff --git a/arch/powerpc/configs/mpc83xx_defconfig b/arch/powerpc/configs/mpc83xx_defconfig
index 5b1b10fd9740..5aac9a8bc53b 100644
--- a/arch/powerpc/configs/mpc83xx_defconfig
+++ b/arch/powerpc/configs/mpc83xx_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig
index 3aeb5949cfef..99a19d1e9bf8 100644
--- a/arch/powerpc/configs/mpc85xx_defconfig
+++ b/arch/powerpc/configs/mpc85xx_defconfig
@@ -10,7 +10,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig
index d62c8016f4bc..c636f23f8c92 100644
--- a/arch/powerpc/configs/mpc85xx_smp_defconfig
+++ b/arch/powerpc/configs/mpc85xx_smp_defconfig
@@ -12,7 +12,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/mpc866_ads_defconfig b/arch/powerpc/configs/mpc866_ads_defconfig
index 668215cae890..5c258823e694 100644
--- a/arch/powerpc/configs/mpc866_ads_defconfig
+++ b/arch/powerpc/configs/mpc866_ads_defconfig
@@ -4,7 +4,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_BUG is not set
diff --git a/arch/powerpc/configs/mpc86xx_defconfig b/arch/powerpc/configs/mpc86xx_defconfig
index 63b90d477889..55b54318fef6 100644
--- a/arch/powerpc/configs/mpc86xx_defconfig
+++ b/arch/powerpc/configs/mpc86xx_defconfig
@@ -10,7 +10,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/mpc885_ads_defconfig b/arch/powerpc/configs/mpc885_ads_defconfig
index f9b83481b00e..9e146cdf63de 100644
--- a/arch/powerpc/configs/mpc885_ads_defconfig
+++ b/arch/powerpc/configs/mpc885_ads_defconfig
@@ -4,7 +4,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_BASE_FULL is not set
diff --git a/arch/powerpc/configs/ppc40x_defconfig b/arch/powerpc/configs/ppc40x_defconfig
index 93d7425ce6cd..bfd634b5ada7 100644
--- a/arch/powerpc/configs/ppc40x_defconfig
+++ b/arch/powerpc/configs/ppc40x_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/ppc44x_defconfig b/arch/powerpc/configs/ppc44x_defconfig
index 2fa05f7be4cb..47133202a625 100644
--- a/arch/powerpc/configs/ppc44x_defconfig
+++ b/arch/powerpc/configs/ppc44x_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/pq2fads_defconfig b/arch/powerpc/configs/pq2fads_defconfig
index a4353bef31c5..baad8db21b61 100644
--- a/arch/powerpc/configs/pq2fads_defconfig
+++ b/arch/powerpc/configs/pq2fads_defconfig
@@ -3,7 +3,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_PPC_CHRP is not set
 # CONFIG_PPC_PMAC is not set
diff --git a/arch/powerpc/configs/ps3_defconfig b/arch/powerpc/configs/ps3_defconfig
index 49cffe003657..caba919f65d8 100644
--- a/arch/powerpc/configs/ps3_defconfig
+++ b/arch/powerpc/configs/ps3_defconfig
@@ -8,7 +8,7 @@ CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_NAMESPACES=y
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 # CONFIG_PERF_EVENTS is not set
 # CONFIG_COMPAT_BRK is not set
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index f87f0e15cfa7..9c3f22c6cde1 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -2,7 +2,7 @@ CONFIG_PPC64=y
 CONFIG_ALTIVEC=y
 CONFIG_VSX=y
 CONFIG_SMP=y
-CONFIG_NR_CPUS=128
+CONFIG_NR_CPUS=1024
 CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
@@ -45,6 +45,8 @@ CONFIG_KEXEC=y
 CONFIG_IRQ_ALL_CPUS=y
 CONFIG_MEMORY_HOTPLUG=y
 CONFIG_MEMORY_HOTREMOVE=y
+CONFIG_PPC_64K_PAGES=y
+CONFIG_PPC_SUBPAGE_PROT=y
 CONFIG_SCHED_SMT=y
 CONFIG_HOTPLUG_PCI=m
 CONFIG_HOTPLUG_PCI_RPA=m
@@ -184,6 +186,7 @@ CONFIG_ACENIC_OMIT_TIGON_I=y
 CONFIG_E1000=y
 CONFIG_E1000E=y
 CONFIG_TIGON3=y
+CONFIG_BNX2=m
 CONFIG_CHELSIO_T1=m
 CONFIG_CHELSIO_T3=m
 CONFIG_EHEA=y
@@ -311,9 +314,7 @@ CONFIG_DEBUG_KERNEL=y
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_LATENCYTOP=y
 CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_IRQSOFF_TRACER=y
 CONFIG_SCHED_TRACER=y
-CONFIG_STACK_TRACER=y
 CONFIG_BLK_DEV_IO_TRACE=y
 CONFIG_DEBUG_STACKOVERFLOW=y
 CONFIG_DEBUG_STACK_USAGE=y
diff --git a/arch/powerpc/configs/storcenter_defconfig b/arch/powerpc/configs/storcenter_defconfig
index 4f0c10a62b9d..ebb2a66c99d3 100644
--- a/arch/powerpc/configs/storcenter_defconfig
+++ b/arch/powerpc/configs/storcenter_defconfig
@@ -1,7 +1,7 @@
 CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/tqm8xx_defconfig b/arch/powerpc/configs/tqm8xx_defconfig
index d0a5b6763880..8616fde0896f 100644
--- a/arch/powerpc/configs/tqm8xx_defconfig
+++ b/arch/powerpc/configs/tqm8xx_defconfig
@@ -5,7 +5,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_BASE_FULL is not set
diff --git a/arch/powerpc/configs/wii_defconfig b/arch/powerpc/configs/wii_defconfig
index bb8ba75b7c68..175295fbf4f3 100644
--- a/arch/powerpc/configs/wii_defconfig
+++ b/arch/powerpc/configs/wii_defconfig
@@ -7,7 +7,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_ELF_CORE is not set
 CONFIG_PERF_COUNTERS=y
 # CONFIG_VM_EVENT_COUNTERS is not set
diff --git a/arch/powerpc/include/asm/feature-fixups.h b/arch/powerpc/include/asm/feature-fixups.h
index 96a7d067fbb2..921a8470e18a 100644
--- a/arch/powerpc/include/asm/feature-fixups.h
+++ b/arch/powerpc/include/asm/feature-fixups.h
@@ -37,18 +37,21 @@ label##2:						\
         .align 2;                                       \
 label##3:
 
-#define MAKE_FTR_SECTION_ENTRY(msk, val, label, sect)   \
-label##4:                                               \
-        .popsection;                                    \
-        .pushsection sect,"a";                          \
-        .align 3;                                       \
-label##5:                                               \
-        FTR_ENTRY_LONG msk;                             \
-        FTR_ENTRY_LONG val;                             \
-        FTR_ENTRY_OFFSET label##1b-label##5b;           \
-        FTR_ENTRY_OFFSET label##2b-label##5b;           \
-        FTR_ENTRY_OFFSET label##3b-label##5b;           \
-        FTR_ENTRY_OFFSET label##4b-label##5b;           \
+#define MAKE_FTR_SECTION_ENTRY(msk, val, label, sect)           \
+label##4:                                                       \
+        .popsection;                                            \
+        .pushsection sect,"a";                                  \
+        .align 3;                                               \
+label##5:                                                       \
+        FTR_ENTRY_LONG msk;                                     \
+        FTR_ENTRY_LONG val;                                     \
+        FTR_ENTRY_OFFSET label##1b-label##5b;                   \
+        FTR_ENTRY_OFFSET label##2b-label##5b;                   \
+        FTR_ENTRY_OFFSET label##3b-label##5b;                   \
+        FTR_ENTRY_OFFSET label##4b-label##5b;                   \
+        .ifgt (label##4b-label##3b)-(label##2b-label##1b);      \
+        .error "Feature section else case larger than body";    \
+        .endif;                                                 \
         .popsection;
 
 
diff --git a/arch/powerpc/include/asm/immap_qe.h b/arch/powerpc/include/asm/immap_qe.h
index 4e10f508570a..0edb6842b13d 100644
--- a/arch/powerpc/include/asm/immap_qe.h
+++ b/arch/powerpc/include/asm/immap_qe.h
@@ -467,13 +467,22 @@ struct qe_immap {
 extern struct qe_immap __iomem *qe_immr;
 extern phys_addr_t get_qe_base(void);
 
-static inline unsigned long immrbar_virt_to_phys(void *address)
+/*
+ * Returns the offset within the QE address space of the given pointer.
+ *
+ * Note that the QE does not support 36-bit physical addresses, so if
+ * get_qe_base() returns a number above 4GB, the caller will probably fail.
+ */
+static inline phys_addr_t immrbar_virt_to_phys(void *address)
 {
-        if ( ((u32)address >= (u32)qe_immr) &&
-                        ((u32)address < ((u32)qe_immr + QE_IMMAP_SIZE)) )
-                return (unsigned long)(address - (u32)qe_immr +
-                                (u32)get_qe_base());
-        return (unsigned long)virt_to_phys(address);
+        void *q = (void *)qe_immr;
+
+        /* Is it a MURAM address? */
+        if ((address >= q) && (address < (q + QE_IMMAP_SIZE)))
+                return get_qe_base() + (address - q);
+
+        /* It's an address returned by kmalloc */
+        return virt_to_phys(address);
 }
 
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/irqflags.h b/arch/powerpc/include/asm/irqflags.h
index b85d8ddbb666..b0b06d85788d 100644
--- a/arch/powerpc/include/asm/irqflags.h
+++ b/arch/powerpc/include/asm/irqflags.h
@@ -12,24 +12,44 @@
 
 #else
 #ifdef CONFIG_TRACE_IRQFLAGS
+#ifdef CONFIG_IRQSOFF_TRACER
+/*
+ * Since the ftrace irqsoff latency trace checks CALLER_ADDR1,
+ * which is the stack frame here, we need to force a stack frame
+ * in case we came from user space.
+ */
+#define TRACE_WITH_FRAME_BUFFER(func)           \
+        mflr    r0;                             \
+        stdu    r1, -32(r1);                    \
+        std     r0, 16(r1);                     \
+        stdu    r1, -32(r1);                    \
+        bl func;                                \
+        ld      r1, 0(r1);                      \
+        ld      r1, 0(r1);
+#else
+#define TRACE_WITH_FRAME_BUFFER(func)           \
+        bl func;
+#endif
+
 /*
  * Most of the CPU's IRQ-state tracing is done from assembly code; we
  * have to call a C function so call a wrapper that saves all the
  * C-clobbered registers.
  */
-#define TRACE_ENABLE_INTS       bl .trace_hardirqs_on
-#define TRACE_DISABLE_INTS      bl .trace_hardirqs_off
-#define TRACE_AND_RESTORE_IRQ_PARTIAL(en,skip)  \
-        cmpdi   en,0;                           \
-        bne     95f;                            \
-        stb     en,PACASOFTIRQEN(r13);          \
-        bl      .trace_hardirqs_off;            \
-        b       skip;                           \
-95:     bl      .trace_hardirqs_on;             \
+#define TRACE_ENABLE_INTS       TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_on)
+#define TRACE_DISABLE_INTS      TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_off)
+
+#define TRACE_AND_RESTORE_IRQ_PARTIAL(en,skip)          \
+        cmpdi   en,0;                                   \
+        bne     95f;                                    \
+        stb     en,PACASOFTIRQEN(r13);                  \
+        TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_off)    \
+        b       skip;                                   \
+95:     TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_on)     \
         li      en,1;
 #define TRACE_AND_RESTORE_IRQ(en)               \
         TRACE_AND_RESTORE_IRQ_PARTIAL(en,96f);  \
-        stb     en,PACASOFTIRQEN(r13);          \
+        stb     en,PACASOFTIRQEN(r13);          \
 96:
 #else
 #define TRACE_ENABLE_INTS
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index 8433d36619a1..991d5998d6be 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -116,9 +116,6 @@ struct machdep_calls {
          * If for some reason there is no irq, but the interrupt
          * shouldn't be counted as spurious, return NO_IRQ_IGNORE. */
         unsigned int    (*get_irq)(void);
-#ifdef CONFIG_KEXEC
-        void            (*kexec_cpu_down)(int crash_shutdown, int secondary);
-#endif
 
         /* PCI stuff */
         /* Called after scanning the bus, before allocating resources */
@@ -235,11 +232,7 @@ struct machdep_calls {
         void (*machine_shutdown)(void);
 
 #ifdef CONFIG_KEXEC
-        /* Called to do the minimal shutdown needed to run a kexec'd kernel
-         * to run successfully.
-         * XXX Should we move this one out of kexec scope?
-         */
-        void (*machine_crash_shutdown)(struct pt_regs *regs);
+        void (*kexec_cpu_down)(int crash_shutdown, int secondary);
 
         /* Called to do what every setup is needed on image and the
          * reboot code buffer. Returns 0 on success.
@@ -247,15 +240,6 @@ struct machdep_calls {
          * claims to support kexec.
          */
         int (*machine_kexec_prepare)(struct kimage *image);
-
-        /* Called to handle any machine specific cleanup on image */
-        void (*machine_kexec_cleanup)(struct kimage *image);
-
-        /* Called to perform the _real_ kexec.
-         * Do NOT allocate memory or fail here. We are past the point of
-         * no return.
-         */
-        void (*machine_kexec)(struct kimage *image);
 #endif /* CONFIG_KEXEC */
 
 #ifdef CONFIG_SUSPEND
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index ff0005eec7dd..125fc1ad665d 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -283,6 +283,7 @@
 #define HID0_NOPTI      (1<<0)          /* No-op dcbt and dcbst instr. */
 
 #define SPRN_HID1       0x3F1           /* Hardware Implementation Register 1 */
+#ifdef CONFIG_6xx
 #define HID1_EMCP       (1<<31)         /* 7450 Machine Check Pin Enable */
 #define HID1_DFS        (1<<22)         /* 7447A Dynamic Frequency Scaling */
 #define HID1_PC0        (1<<16)         /* 7450 PLL_CFG[0] */
@@ -292,6 +293,7 @@
 #define HID1_SYNCBE     (1<<11)         /* 7450 ABE for sync, eieio */
 #define HID1_ABE        (1<<10)         /* 7450 Address Broadcast Enable */
 #define HID1_PS         (1<<16)         /* 750FX PLL selection */
+#endif
 #define SPRN_HID2       0x3F8           /* Hardware Implementation Register 2 */
 #define SPRN_HID2_GEKKO 0x398           /* Gekko HID2 Register */
 #define SPRN_IABR       0x3F2   /* Instruction Address Breakpoint Register */
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 667a498eaee1..e68c69bf741a 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -246,6 +246,20 @@
                                         store or cache line push */
 #endif
 
+/* Bit definitions for the HID1 */
+#ifdef CONFIG_E500
+/* e500v1/v2 */
+#define HID1_PLL_CFG_MASK 0xfc000000    /* PLL_CFG input pins */
+#define HID1_RFXE       0x00020000      /* Read fault exception enable */
+#define HID1_R1DPE      0x00008000      /* R1 data bus parity enable */
+#define HID1_R2DPE      0x00004000      /* R2 data bus parity enable */
+#define HID1_ASTME      0x00002000      /* Address bus streaming mode enable */
+#define HID1_ABE        0x00001000      /* Address broadcast enable */
+#define HID1_MPXTT      0x00000400      /* MPX re-map transfer type */
+#define HID1_ATS        0x00000080      /* Atomic status */
+#define HID1_MID_MASK   0x0000000f      /* MID input pins */
+#endif
+
 /* Bit definitions for the DBSR. */
 /*
  * DBSR bits which have conflicting definitions on true Book E versus IBM 40x.
diff --git a/arch/powerpc/include/asm/spu.h b/arch/powerpc/include/asm/spu.h
index 0ab8d869e3d6..0c8b35d75232 100644
--- a/arch/powerpc/include/asm/spu.h
+++ b/arch/powerpc/include/asm/spu.h
@@ -203,14 +203,6 @@ void spu_irq_setaffinity(struct spu *spu, int cpu);
 void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa,
                 void *code, int code_size);
 
-#ifdef CONFIG_KEXEC
-void crash_register_spus(struct list_head *list);
-#else
-static inline void crash_register_spus(struct list_head *list)
-{
-}
-#endif
-
 extern void spu_invalidate_slbs(struct spu *spu);
 extern void spu_associate_mm(struct spu *spu, struct mm_struct *mm);
 int spu_64k_pages_available(void);
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index 894e64fa481e..5c518ad3445c 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -64,6 +64,12 @@ _GLOBAL(__setup_cpu_e500v2)
         bl      __e500_icache_setup
         bl      __e500_dcache_setup
         bl      __setup_e500_ivors
+#ifdef CONFIG_RAPIDIO
+        /* Ensure that RFXE is set */
+        mfspr   r3,SPRN_HID1
+        oris    r3,r3,HID1_RFXE@h
+        mtspr   SPRN_HID1,r3
+#endif
         mtlr    r4
         blr
 _GLOBAL(__setup_cpu_e500mc)
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index be5ab18b03b5..8d74a24c5502 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -116,7 +116,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .pmc_type               = PPC_PMC_IBM,
                 .oprofile_cpu_type      = "ppc64/power3",
                 .oprofile_type          = PPC_OPROFILE_RS64,
-                .machine_check          = machine_check_generic,
                 .platform               = "power3",
         },
         {       /* Power3+ */
@@ -132,7 +131,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .pmc_type               = PPC_PMC_IBM,
                 .oprofile_cpu_type      = "ppc64/power3",
                 .oprofile_type          = PPC_OPROFILE_RS64,
-                .machine_check          = machine_check_generic,
                 .platform               = "power3",
         },
         {       /* Northstar */
@@ -148,7 +146,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .pmc_type               = PPC_PMC_IBM,
                 .oprofile_cpu_type      = "ppc64/rs64",
                 .oprofile_type          = PPC_OPROFILE_RS64,
-                .machine_check          = machine_check_generic,
                 .platform               = "rs64",
         },
         {       /* Pulsar */
@@ -164,7 +161,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .pmc_type               = PPC_PMC_IBM,
                 .oprofile_cpu_type      = "ppc64/rs64",
                 .oprofile_type          = PPC_OPROFILE_RS64,
-                .machine_check          = machine_check_generic,
                 .platform               = "rs64",
         },
         {       /* I-star */
@@ -180,7 +176,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .pmc_type               = PPC_PMC_IBM,
                 .oprofile_cpu_type      = "ppc64/rs64",
                 .oprofile_type          = PPC_OPROFILE_RS64,
-                .machine_check          = machine_check_generic,
                 .platform               = "rs64",
         },
         {       /* S-star */
@@ -196,7 +191,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .pmc_type               = PPC_PMC_IBM,
                 .oprofile_cpu_type      = "ppc64/rs64",
                 .oprofile_type          = PPC_OPROFILE_RS64,
-                .machine_check          = machine_check_generic,
                 .platform               = "rs64",
         },
         {       /* Power4 */
@@ -212,7 +206,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .pmc_type               = PPC_PMC_IBM,
                 .oprofile_cpu_type      = "ppc64/power4",
                 .oprofile_type          = PPC_OPROFILE_POWER4,
-                .machine_check          = machine_check_generic,
                 .platform               = "power4",
         },
         {       /* Power4+ */
@@ -228,7 +221,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .pmc_type               = PPC_PMC_IBM,
                 .oprofile_cpu_type      = "ppc64/power4",
                 .oprofile_type          = PPC_OPROFILE_POWER4,
-                .machine_check          = machine_check_generic,
                 .platform               = "power4",
         },
         {       /* PPC970 */
@@ -247,7 +239,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_restore            = __restore_cpu_ppc970,
                 .oprofile_cpu_type      = "ppc64/970",
                 .oprofile_type          = PPC_OPROFILE_POWER4,
-                .machine_check          = machine_check_generic,
                 .platform               = "ppc970",
         },
         {       /* PPC970FX */
@@ -266,7 +257,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_restore            = __restore_cpu_ppc970,
                 .oprofile_cpu_type      = "ppc64/970",
                 .oprofile_type          = PPC_OPROFILE_POWER4,
-                .machine_check          = machine_check_generic,
                 .platform               = "ppc970",
         },
         {       /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
@@ -285,7 +275,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_restore            = __restore_cpu_ppc970,
                 .oprofile_cpu_type      = "ppc64/970MP",
                 .oprofile_type          = PPC_OPROFILE_POWER4,
-                .machine_check          = machine_check_generic,
                 .platform               = "ppc970",
         },
         {       /* PPC970MP */
@@ -304,7 +293,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_restore            = __restore_cpu_ppc970,
                 .oprofile_cpu_type      = "ppc64/970MP",
                 .oprofile_type          = PPC_OPROFILE_POWER4,
-                .machine_check          = machine_check_generic,
                 .platform               = "ppc970",
         },
         {       /* PPC970GX */
@@ -322,7 +310,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_setup              = __setup_cpu_ppc970,
                 .oprofile_cpu_type      = "ppc64/970",
                 .oprofile_type          = PPC_OPROFILE_POWER4,
-                .machine_check          = machine_check_generic,
                 .platform               = "ppc970",
         },
         {       /* Power5 GR */
@@ -343,7 +330,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                  */
                 .oprofile_mmcra_sihv    = MMCRA_SIHV,
                 .oprofile_mmcra_sipr    = MMCRA_SIPR,
-                .machine_check          = machine_check_generic,
                 .platform               = "power5",
         },
         {       /* Power5++ */
@@ -360,7 +346,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .oprofile_type          = PPC_OPROFILE_POWER4,
                 .oprofile_mmcra_sihv    = MMCRA_SIHV,
                 .oprofile_mmcra_sipr    = MMCRA_SIPR,
-                .machine_check          = machine_check_generic,
                 .platform               = "power5+",
         },
         {       /* Power5 GS */
@@ -378,7 +363,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .oprofile_type          = PPC_OPROFILE_POWER4,
                 .oprofile_mmcra_sihv    = MMCRA_SIHV,
                 .oprofile_mmcra_sipr    = MMCRA_SIPR,
-                .machine_check          = machine_check_generic,
                 .platform               = "power5+",
         },
         {       /* POWER6 in P5+ mode; 2.04-compliant processor */
@@ -390,7 +374,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
-                .machine_check          = machine_check_generic,
                 .oprofile_cpu_type      = "ppc64/ibm-compat-v1",
                 .oprofile_type          = PPC_OPROFILE_POWER4,
                 .platform               = "power5+",
@@ -413,7 +396,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .oprofile_mmcra_sipr    = POWER6_MMCRA_SIPR,
                 .oprofile_mmcra_clear   = POWER6_MMCRA_THRM |
                         POWER6_MMCRA_OTHER,
-                .machine_check          = machine_check_generic,
                 .platform               = "power6x",
         },
         {       /* 2.05-compliant processor, i.e. Power6 "architected" mode */
@@ -425,7 +407,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
-                .machine_check          = machine_check_generic,
                 .oprofile_cpu_type      = "ppc64/ibm-compat-v1",
                 .oprofile_type          = PPC_OPROFILE_POWER4,
                 .platform               = "power6",
@@ -440,7 +421,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                         MMU_FTR_TLBIE_206,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
-                .machine_check          = machine_check_generic,
                 .oprofile_type          = PPC_OPROFILE_POWER4,
                 .oprofile_cpu_type      = "ppc64/ibm-compat-v1",
                 .platform               = "power7",
@@ -492,7 +472,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .pmc_type               = PPC_PMC_IBM,
                 .oprofile_cpu_type      = "ppc64/cell-be",
                 .oprofile_type          = PPC_OPROFILE_CELL,
-                .machine_check          = machine_check_generic,
                 .platform               = "ppc-cell-be",
         },
         {       /* PA Semi PA6T */
@@ -510,7 +489,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_restore            = __restore_cpu_pa6t,
                 .oprofile_cpu_type      = "ppc64/pa6t",
                 .oprofile_type          = PPC_OPROFILE_PA6T,
-                .machine_check          = machine_check_generic,
                 .platform               = "pa6t",
         },
         {       /* default match */
@@ -524,7 +502,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .dcache_bsize           = 128,
                 .num_pmcs               = 6,
                 .pmc_type               = PPC_PMC_IBM,
-                .machine_check          = machine_check_generic,
                 .platform               = "power4",
         }
 #endif  /* CONFIG_PPC_BOOK3S_64 */
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c
index 832c8c4db254..3d569e2aff18 100644
--- a/arch/powerpc/kernel/crash.c
+++ b/arch/powerpc/kernel/crash.c
@@ -48,7 +48,7 @@ int crashing_cpu = -1;
 static cpumask_t cpus_in_crash = CPU_MASK_NONE;
 cpumask_t cpus_in_sr = CPU_MASK_NONE;
 
-#define CRASH_HANDLER_MAX 2
+#define CRASH_HANDLER_MAX 3
 /* NULL terminated list of shutdown handles */
 static crash_shutdown_t crash_shutdown_handles[CRASH_HANDLER_MAX+1];
 static DEFINE_SPINLOCK(crash_handlers_lock);
@@ -125,7 +125,7 @@ static void crash_kexec_prepare_cpus(int cpu)
         smp_wmb();
 
         /*
-         * FIXME: Until we will have the way to stop other CPUSs reliabally,
+         * FIXME: Until we will have the way to stop other CPUs reliably,
          * the crash CPU will send an IPI and wait for other CPUs to
          * respond.
          * Delay of at least 10 seconds.
@@ -254,72 +254,6 @@ void crash_kexec_secondary(struct pt_regs *regs)
         cpus_in_sr = CPU_MASK_NONE;
 }
 #endif
-#ifdef CONFIG_SPU_BASE
-
-#include <asm/spu.h>
-#include <asm/spu_priv1.h>
-
-struct crash_spu_info {
-        struct spu *spu;
-        u32 saved_spu_runcntl_RW;
-        u32 saved_spu_status_R;
-        u32 saved_spu_npc_RW;
-        u64 saved_mfc_sr1_RW;
-        u64 saved_mfc_dar;
-        u64 saved_mfc_dsisr;
-};
-
-#define CRASH_NUM_SPUS  16      /* Enough for current hardware */
-static struct crash_spu_info crash_spu_info[CRASH_NUM_SPUS];
-
-static void crash_kexec_stop_spus(void)
-{
-        struct spu *spu;
-        int i;
-        u64 tmp;
-
-        for (i = 0; i < CRASH_NUM_SPUS; i++) {
-                if (!crash_spu_info[i].spu)
-                        continue;
-
-                spu = crash_spu_info[i].spu;
-
-                crash_spu_info[i].saved_spu_runcntl_RW =
-                        in_be32(&spu->problem->spu_runcntl_RW);
-                crash_spu_info[i].saved_spu_status_R =
-                        in_be32(&spu->problem->spu_status_R);
-                crash_spu_info[i].saved_spu_npc_RW =
-                        in_be32(&spu->problem->spu_npc_RW);
-
-                crash_spu_info[i].saved_mfc_dar    = spu_mfc_dar_get(spu);
-                crash_spu_info[i].saved_mfc_dsisr  = spu_mfc_dsisr_get(spu);
-                tmp = spu_mfc_sr1_get(spu);
-                crash_spu_info[i].saved_mfc_sr1_RW = tmp;
-
-                tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
-                spu_mfc_sr1_set(spu, tmp);
-
-                __delay(200);
-        }
-}
-
-void crash_register_spus(struct list_head *list)
-{
-        struct spu *spu;
-
-        list_for_each_entry(spu, list, full_list) {
-                if (WARN_ON(spu->number >= CRASH_NUM_SPUS))
-                        continue;
-
-                crash_spu_info[spu->number].spu = spu;
-        }
-}
-
-#else
-static inline void crash_kexec_stop_spus(void)
-{
-}
-#endif /* CONFIG_SPU_BASE */
 
 /*
  * Register a function to be called on shutdown.  Only use this if you
@@ -439,8 +373,6 @@ void default_machine_crash_shutdown(struct pt_regs *regs)
         crash_shutdown_cpu = -1;
         __debugger_fault_handler = old_handler;
 
-        crash_kexec_stop_spus();
-
         if (ppc_md.kexec_cpu_down)
                 ppc_md.kexec_cpu_down(1, 0);
 }
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index c22dc1ec1c94..56212bc0ab08 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -880,7 +880,18 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_TYPE_47x)
          */
         andi.   r10,r9,MSR_EE
         beq     1f
+        /*
+         * Since the ftrace irqsoff latency trace checks CALLER_ADDR1,
+         * which is the stack frame here, we need to force a stack frame
+         * in case we came from user space.
+         */
+        stwu    r1,-32(r1)
+        mflr    r0
+        stw     r0,4(r1)
+        stwu    r1,-32(r1)
         bl      trace_hardirqs_on
+        lwz     r1,0(r1)
+        lwz     r1,0(r1)
         lwz     r9,_MSR(r1)
 1:
 #endif /* CONFIG_TRACE_IRQFLAGS */
diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c
index df7e20c191cd..49a170af8145 100644
--- a/arch/powerpc/kernel/machine_kexec.c
+++ b/arch/powerpc/kernel/machine_kexec.c
@@ -15,6 +15,7 @@
 #include <linux/memblock.h>
 #include <linux/of.h>
 #include <linux/irq.h>
+#include <linux/ftrace.h>
 
 #include <asm/machdep.h>
 #include <asm/prom.h>
@@ -44,10 +45,7 @@ void machine_kexec_mask_interrupts(void) {
 
 void machine_crash_shutdown(struct pt_regs *regs)
 {
-        if (ppc_md.machine_crash_shutdown)
-                ppc_md.machine_crash_shutdown(regs);
-        else
-                default_machine_crash_shutdown(regs);
+        default_machine_crash_shutdown(regs);
 }
 
 /*
@@ -65,8 +63,6 @@ int machine_kexec_prepare(struct kimage *image)
 
 void machine_kexec_cleanup(struct kimage *image)
 {
-        if (ppc_md.machine_kexec_cleanup)
-                ppc_md.machine_kexec_cleanup(image);
 }
 
 void arch_crash_save_vmcoreinfo(void)
@@ -87,10 +83,13 @@ void arch_crash_save_vmcoreinfo(void)
  */
 void machine_kexec(struct kimage *image)
 {
-        if (ppc_md.machine_kexec)
-                ppc_md.machine_kexec(image);
-        else
-                default_machine_kexec(image);
+        int save_ftrace_enabled;
+
+        save_ftrace_enabled = __ftrace_enabled_save();
+
+        default_machine_kexec(image);
+
+        __ftrace_enabled_restore(save_ftrace_enabled);
 
         /* Fall back to normal restart if we're still alive. */
         machine_restart(NULL);
diff --git a/arch/powerpc/kernel/perf_event.c b/arch/powerpc/kernel/perf_event.c
index 567480705789..ab6f6beadb57 100644
--- a/arch/powerpc/kernel/perf_event.c
+++ b/arch/powerpc/kernel/perf_event.c
@@ -1212,6 +1212,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
                         if (left <= 0)
                                 left = period;
                         record = 1;
+                        event->hw.last_period = event->hw.sample_period;
                 }
                 if (left < 0x80000000LL)
                         val = 0x80000000LL - left;
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 84906d3fc860..7a1d5cb76932 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -631,7 +631,7 @@ void show_regs(struct pt_regs * regs)
 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
                 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
 #else
-                printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr);
+                printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr);
 #endif
         printk("TASK = %p[%d] '%s' THREAD: %p",
                current, task_pid_nr(current), current->comm, task_thread_info(current));
diff --git a/arch/powerpc/kernel/rtas_flash.c b/arch/powerpc/kernel/rtas_flash.c
index 2b442e6c21e6..bf5f5ce3a7bd 100644
--- a/arch/powerpc/kernel/rtas_flash.c
+++ b/arch/powerpc/kernel/rtas_flash.c
@@ -256,31 +256,16 @@ static ssize_t rtas_flash_read(struct file *file, char __user *buf,
         struct proc_dir_entry *dp = PDE(file->f_path.dentry->d_inode);
         struct rtas_update_flash_t *uf;
         char msg[RTAS_MSG_MAXLEN];
-        int msglen;
 
-        uf = (struct rtas_update_flash_t *) dp->data;
+        uf = dp->data;
 
         if (!strcmp(dp->name, FIRMWARE_FLASH_NAME)) {
                 get_flash_status_msg(uf->status, msg);
         } else {           /* FIRMWARE_UPDATE_NAME */
                 sprintf(msg, "%d\n", uf->status);
         }
-        msglen = strlen(msg);
-        if (msglen > count)
-                msglen = count;
-
-        if (ppos && *ppos != 0)
-                return 0;       /* be cheap */
-
-        if (!access_ok(VERIFY_WRITE, buf, msglen))
-                return -EINVAL;
 
-        if (copy_to_user(buf, msg, msglen))
-                return -EFAULT;
-
-        if (ppos)
-                *ppos = msglen;
-        return msglen;
+        return simple_read_from_buffer(buf, count, ppos, msg, strlen(msg));
 }
 
 /* constructor for flash_block_cache */
@@ -394,26 +379,13 @@ static ssize_t manage_flash_read(struct file *file, char __user *buf,
         char msg[RTAS_MSG_MAXLEN];
         int msglen;
 
-        args_buf = (struct rtas_manage_flash_t *) dp->data;
+        args_buf = dp->data;
         if (args_buf == NULL)
                 return 0;
 
         msglen = sprintf(msg, "%d\n", args_buf->status);
-        if (msglen > count)
-                msglen = count;
 
-        if (ppos && *ppos != 0)
-                return 0;       /* be cheap */
-
-        if (!access_ok(VERIFY_WRITE, buf, msglen))
-                return -EINVAL;
-
-        if (copy_to_user(buf, msg, msglen))
-                return -EFAULT;
-
-        if (ppos)
-                *ppos = msglen;
-        return msglen;
+        return simple_read_from_buffer(buf, count, ppos, msg, msglen);
 }
 
 static ssize_t manage_flash_write(struct file *file, const char __user *buf,
@@ -495,24 +467,11 @@ static ssize_t validate_flash_read(struct file *file, char __user *buf,
         char msg[RTAS_MSG_MAXLEN];
         int msglen;
 
-        args_buf = (struct rtas_validate_flash_t *) dp->data;
+        args_buf = dp->data;
 
-        if (ppos && *ppos != 0)
-                return 0;       /* be cheap */
-        
         msglen = get_validate_flash_msg(args_buf, msg);
-        if (msglen > count)
-                msglen = count;
-
-        if (!access_ok(VERIFY_WRITE, buf, msglen))
-                return -EINVAL;
-
-        if (copy_to_user(buf, msg, msglen))
-                return -EFAULT;
 
-        if (ppos)
-                *ppos = msglen;
-        return msglen;
+        return simple_read_from_buffer(buf, count, ppos, msg, msglen);
 }
 
 static ssize_t validate_flash_write(struct file *file, const char __user *buf,
diff --git a/arch/powerpc/kernel/rtasd.c b/arch/powerpc/kernel/rtasd.c
index 0438f819fe6b..049dbecb5dbc 100644
--- a/arch/powerpc/kernel/rtasd.c
+++ b/arch/powerpc/kernel/rtasd.c
@@ -160,7 +160,7 @@ static int log_rtas_len(char * buf)
         /* rtas fixed header */
         len = 8;
         err = (struct rtas_error_log *)buf;
-        if (err->extended_log_length) {
+        if (err->extended && err->extended_log_length) {
 
                 /* extended header */
                 len += err->extended_log_length;
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 09e4dea4a85a..09d31dbf43f9 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -265,11 +265,26 @@ void accumulate_stolen_time(void)
 {
         u64 sst, ust;
 
-        sst = scan_dispatch_log(get_paca()->starttime_user);
-        ust = scan_dispatch_log(get_paca()->starttime);
-        get_paca()->system_time -= sst;
-        get_paca()->user_time -= ust;
-        get_paca()->stolen_time += ust + sst;
+        u8 save_soft_enabled = local_paca->soft_enabled;
+        u8 save_hard_enabled = local_paca->hard_enabled;
+
+        /* We are called early in the exception entry, before
+         * soft/hard_enabled are sync'ed to the expected state
+         * for the exception. We are hard disabled but the PACA
+         * needs to reflect that so various debug stuff doesn't
+         * complain
+         */
+        local_paca->soft_enabled = 0;
+        local_paca->hard_enabled = 0;
+
+        sst = scan_dispatch_log(local_paca->starttime_user);
+        ust = scan_dispatch_log(local_paca->starttime);
+        local_paca->system_time -= sst;
+        local_paca->user_time -= ust;
+        local_paca->stolen_time += ust + sst;
+
+        local_paca->soft_enabled = save_soft_enabled;
+        local_paca->hard_enabled = save_hard_enabled;
 }
 
 static inline u64 calculate_stolen_time(u64 stop_tb)
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 1b2cdc8eec90..bd74fac169be 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -626,12 +626,6 @@ void machine_check_exception(struct pt_regs *regs)
         if (recover > 0)
                 return;
 
-        if (user_mode(regs)) {
-                regs->msr |= MSR_RI;
-                _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
-                return;
-        }
-
 #if defined(CONFIG_8xx) && defined(CONFIG_PCI)
         /* the qspan pci read routines can cause machine checks -- Cort
          *
@@ -643,16 +637,12 @@ void machine_check_exception(struct pt_regs *regs)
         return;
 #endif
 
-        if (debugger_fault_handler(regs)) {
-                regs->msr |= MSR_RI;
+        if (debugger_fault_handler(regs))
                 return;
-        }
 
         if (check_io_access(regs))
                 return;
 
-        if (debugger_fault_handler(regs))
-                return;
         die("Machine check", regs, SIGBUS);
 
         /* Must die if the interrupt is not recoverable */
diff --git a/arch/powerpc/lib/feature-fixups-test.S b/arch/powerpc/lib/feature-fixups-test.S
index cb737484c5aa..f4613118132e 100644
--- a/arch/powerpc/lib/feature-fixups-test.S
+++ b/arch/powerpc/lib/feature-fixups-test.S
@@ -172,6 +172,25 @@ globl(ftr_fixup_test6_expected)
 3:      or      3,3,3
 
 
+#if 0
+/* Test that if we have a larger else case the assembler spots it and
+ * reports an error. #if 0'ed so as not to break the build normally.
+ */
+ftr_fixup_test7:
+        or      1,1,1
+BEGIN_FTR_SECTION
+        or      2,2,2
+        or      2,2,2
+        or      2,2,2
+FTR_SECTION_ELSE
+        or      3,3,3
+        or      3,3,3
+        or      3,3,3
+        or      3,3,3
+ALT_FTR_SECTION_END(0, 1)
+        or      1,1,1
+#endif
+
 #define MAKE_MACRO_TEST(TYPE)                                           \
 globl(ftr_fixup_test_ ##TYPE##_macros)                                  \
         or      1,1,1;                                                  \
diff --git a/arch/powerpc/platforms/83xx/mpc830x_rdb.c b/arch/powerpc/platforms/83xx/mpc830x_rdb.c
index 661d354e4ff2..d0c4e15b7794 100644
--- a/arch/powerpc/platforms/83xx/mpc830x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc830x_rdb.c
@@ -57,12 +57,12 @@ static void __init mpc830x_rdb_init_IRQ(void)
         ipic_set_default_priority();
 }
 
-struct const char *board[] __initdata = {
+static const char *board[] __initdata = {
         "MPC8308RDB",
         "fsl,mpc8308rdb",
         "denx,mpc8308_p1m",
         NULL
-}
+};
 
 /*
  * Called very early, MMU is off, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/83xx/mpc831x_rdb.c b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
index b54cd736a895..f859ead49a8d 100644
--- a/arch/powerpc/platforms/83xx/mpc831x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
@@ -60,11 +60,11 @@ static void __init mpc831x_rdb_init_IRQ(void)
         ipic_set_default_priority();
 }
 
-struct const char *board[] __initdata = {
+static const char *board[] __initdata = {
         "MPC8313ERDB",
         "fsl,mpc8315erdb",
         NULL
-}
+};
 
 /*
  * Called very early, MMU is off, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h
index 0fea8811d45b..82a434510d83 100644
--- a/arch/powerpc/platforms/83xx/mpc83xx.h
+++ b/arch/powerpc/platforms/83xx/mpc83xx.h
@@ -35,6 +35,8 @@
 
 /* system i/o configuration register high */
 #define MPC83XX_SICRH_OFFS         0x118
+#define MPC8308_SICRH_USB_MASK     0x000c0000
+#define MPC8308_SICRH_USB_ULPI     0x00040000
 #define MPC834X_SICRH_USB_UTMI     0x00020000
 #define MPC831X_SICRH_USB_MASK     0x000000e0
 #define MPC831X_SICRH_USB_ULPI     0x000000a0
diff --git a/arch/powerpc/platforms/83xx/usb.c b/arch/powerpc/platforms/83xx/usb.c
index 3ba4bb7d41bb..2c64164722d0 100644
--- a/arch/powerpc/platforms/83xx/usb.c
+++ b/arch/powerpc/platforms/83xx/usb.c
@@ -127,7 +127,8 @@ int mpc831x_usb_cfg(void)
 
         /* Configure clock */
         immr_node = of_get_parent(np);
-        if (immr_node && of_device_is_compatible(immr_node, "fsl,mpc8315-immr"))
+        if (immr_node && (of_device_is_compatible(immr_node, "fsl,mpc8315-immr") ||
+                        of_device_is_compatible(immr_node, "fsl,mpc8308-immr")))
                 clrsetbits_be32(immap + MPC83XX_SCCR_OFFS,
                                 MPC8315_SCCR_USB_MASK,
                                 MPC8315_SCCR_USB_DRCM_01);
@@ -138,7 +139,11 @@ int mpc831x_usb_cfg(void)
 
         /* Configure pin mux for ULPI.  There is no pin mux for UTMI */
         if (prop && !strcmp(prop, "ulpi")) {
-                if (of_device_is_compatible(immr_node, "fsl,mpc8315-immr")) {
+                if (of_device_is_compatible(immr_node, "fsl,mpc8308-immr")) {
+                        clrsetbits_be32(immap + MPC83XX_SICRH_OFFS,
+                                        MPC8308_SICRH_USB_MASK,
+                                        MPC8308_SICRH_USB_ULPI);
+                } else if (of_device_is_compatible(immr_node, "fsl,mpc8315-immr")) {
                         clrsetbits_be32(immap + MPC83XX_SICRL_OFFS,
                                         MPC8315_SICRL_USB_MASK,
                                         MPC8315_SICRL_USB_ULPI);
@@ -173,6 +178,9 @@ int mpc831x_usb_cfg(void)
                      !strcmp(prop, "utmi"))) {
                 u32 refsel;
 
+                if (of_device_is_compatible(immr_node, "fsl,mpc8308-immr"))
+                        goto out;
+
                 if (of_device_is_compatible(immr_node, "fsl,mpc8315-immr"))
                         refsel = CONTROL_REFSEL_24MHZ;
                 else
@@ -186,9 +194,11 @@ int mpc831x_usb_cfg(void)
                 temp = CONTROL_PHY_CLK_SEL_ULPI;
 #ifdef CONFIG_USB_OTG
                 /* Set OTG_PORT */
-                dr_mode = of_get_property(np, "dr_mode", NULL);
-                if (dr_mode && !strcmp(dr_mode, "otg"))
-                        temp |= CONTROL_OTG_PORT;
+                if (!of_device_is_compatible(immr_node, "fsl,mpc8308-immr")) {
+                        dr_mode = of_get_property(np, "dr_mode", NULL);
+                        if (dr_mode && !strcmp(dr_mode, "otg"))
+                                temp |= CONTROL_OTG_PORT;
+                }
 #endif /* CONFIG_USB_OTG */
                 out_be32(usb_regs + FSL_USB2_CONTROL_OFFS, temp);
         } else {
@@ -196,6 +206,7 @@ int mpc831x_usb_cfg(void)
                 ret = -EINVAL;
         }
 
+out:
         iounmap(usb_regs);
         of_node_put(np);
         return ret;
diff --git a/arch/powerpc/platforms/cell/cpufreq_spudemand.c b/arch/powerpc/platforms/cell/cpufreq_spudemand.c
index 968c1c0b4d5b..d809836bcf5f 100644
--- a/arch/powerpc/platforms/cell/cpufreq_spudemand.c
+++ b/arch/powerpc/platforms/cell/cpufreq_spudemand.c
@@ -39,8 +39,6 @@ struct spu_gov_info_struct {
 };
 static DEFINE_PER_CPU(struct spu_gov_info_struct, spu_gov_info);
 
-static struct workqueue_struct *kspugov_wq;
-
 static int calc_freq(struct spu_gov_info_struct *info)
 {
         int cpu;
@@ -71,14 +69,14 @@ static void spu_gov_work(struct work_struct *work)
         __cpufreq_driver_target(info->policy, target_freq, CPUFREQ_RELATION_H);
 
         delay = usecs_to_jiffies(info->poll_int);
-        queue_delayed_work_on(info->policy->cpu, kspugov_wq, &info->work, delay);
+        schedule_delayed_work_on(info->policy->cpu, &info->work, delay);
 }
 
 static void spu_gov_init_work(struct spu_gov_info_struct *info)
 {
         int delay = usecs_to_jiffies(info->poll_int);
         INIT_DELAYED_WORK_DEFERRABLE(&info->work, spu_gov_work);
-        queue_delayed_work_on(info->policy->cpu, kspugov_wq, &info->work, delay);
+        schedule_delayed_work_on(info->policy->cpu, &info->work, delay);
 }
 
 static void spu_gov_cancel_work(struct spu_gov_info_struct *info)
@@ -152,27 +150,15 @@ static int __init spu_gov_init(void)
 {
         int ret;
 
-        kspugov_wq = create_workqueue("kspugov");
-        if (!kspugov_wq) {
-                printk(KERN_ERR "creation of kspugov failed\n");
-                ret = -EFAULT;
-                goto out;
-        }
-
         ret = cpufreq_register_governor(&spu_governor);
-        if (ret) {
+        if (ret)
                 printk(KERN_ERR "registration of governor failed\n");
-                destroy_workqueue(kspugov_wq);
-                goto out;
-        }
-out:
         return ret;
 }
 
 static void __exit spu_gov_exit(void)
 {
         cpufreq_unregister_governor(&spu_governor);
-        destroy_workqueue(kspugov_wq);
 }
 
 
diff --git a/arch/powerpc/platforms/cell/qpace_setup.c b/arch/powerpc/platforms/cell/qpace_setup.c
index 1b5749042756..d31c594cfdf3 100644
--- a/arch/powerpc/platforms/cell/qpace_setup.c
+++ b/arch/powerpc/platforms/cell/qpace_setup.c
@@ -145,9 +145,4 @@ define_machine(qpace) {
         .calibrate_decr         = generic_calibrate_decr,
         .progress               = qpace_progress,
         .init_IRQ               = iic_init_IRQ,
-#ifdef CONFIG_KEXEC
-        .machine_kexec          = default_machine_kexec,
-        .machine_kexec_prepare  = default_machine_kexec_prepare,
-        .machine_crash_shutdown = default_machine_crash_shutdown,
-#endif
 };
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index 8547e86bfb42..acfaccea5f4f 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -37,6 +37,7 @@
 #include <asm/spu_csa.h>
 #include <asm/xmon.h>
 #include <asm/prom.h>
+#include <asm/kexec.h>
 
 const struct spu_management_ops *spu_management_ops;
 EXPORT_SYMBOL_GPL(spu_management_ops);
@@ -727,6 +728,75 @@ static ssize_t spu_stat_show(struct sys_device *sysdev,
 
 static SYSDEV_ATTR(stat, 0644, spu_stat_show, NULL);
 
+#ifdef CONFIG_KEXEC
+
+struct crash_spu_info {
+        struct spu *spu;
+        u32 saved_spu_runcntl_RW;
+        u32 saved_spu_status_R;
+        u32 saved_spu_npc_RW;
+        u64 saved_mfc_sr1_RW;
+        u64 saved_mfc_dar;
+        u64 saved_mfc_dsisr;
+};
+
+#define CRASH_NUM_SPUS  16      /* Enough for current hardware */
+static struct crash_spu_info crash_spu_info[CRASH_NUM_SPUS];
+
+static void crash_kexec_stop_spus(void)
+{
+        struct spu *spu;
+        int i;
+        u64 tmp;
+
+        for (i = 0; i < CRASH_NUM_SPUS; i++) {
+                if (!crash_spu_info[i].spu)
+                        continue;
+
+                spu = crash_spu_info[i].spu;
+
+                crash_spu_info[i].saved_spu_runcntl_RW =
+                        in_be32(&spu->problem->spu_runcntl_RW);
+                crash_spu_info[i].saved_spu_status_R =
+                        in_be32(&spu->problem->spu_status_R);
+                crash_spu_info[i].saved_spu_npc_RW =
+                        in_be32(&spu->problem->spu_npc_RW);
+
+                crash_spu_info[i].saved_mfc_dar    = spu_mfc_dar_get(spu);
+                crash_spu_info[i].saved_mfc_dsisr  = spu_mfc_dsisr_get(spu);
+                tmp = spu_mfc_sr1_get(spu);
+                crash_spu_info[i].saved_mfc_sr1_RW = tmp;
+
+                tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
+                spu_mfc_sr1_set(spu, tmp);
+
+                __delay(200);
+        }
+}
+
+static void crash_register_spus(struct list_head *list)
+{
+        struct spu *spu;
+        int ret;
+
+        list_for_each_entry(spu, list, full_list) {
+                if (WARN_ON(spu->number >= CRASH_NUM_SPUS))
+                        continue;
+
+                crash_spu_info[spu->number].spu = spu;
+        }
+
+        ret = crash_shutdown_register(&crash_kexec_stop_spus);
+        if (ret)
+                printk(KERN_ERR "Could not register SPU crash handler");
+}
+
+#else
+static inline void crash_register_spus(struct list_head *list)
+{
+}
+#endif
+
 static int __init init_spu_base(void)
 {
         int i, ret = 0;
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c
index 02f7b113a31b..3c7c3f82d842 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -219,24 +219,17 @@ spufs_mem_write(struct file *file, const char __user *buffer,
         loff_t pos = *ppos;
         int ret;
 
-        if (pos < 0)
-                return -EINVAL;
         if (pos > LS_SIZE)
                 return -EFBIG;
-        if (size > LS_SIZE - pos)
-                size = LS_SIZE - pos;
 
         ret = spu_acquire(ctx);
         if (ret)
                 return ret;
 
         local_store = ctx->ops->get_ls(ctx);
-        ret = copy_from_user(local_store + pos, buffer, size);
+        size = simple_write_to_buffer(local_store, LS_SIZE, ppos, buffer, size);
         spu_release(ctx);
 
-        if (ret)
-                return -EFAULT;
-        *ppos = pos + size;
         return size;
 }
 
@@ -574,18 +567,15 @@ spufs_regs_write(struct file *file, const char __user *buffer,
         if (*pos >= sizeof(lscsa->gprs))
                 return -EFBIG;
 
-        size = min_t(ssize_t, sizeof(lscsa->gprs) - *pos, size);
-        *pos += size;
-
         ret = spu_acquire_saved(ctx);
         if (ret)
                 return ret;
 
-        ret = copy_from_user((char *)lscsa->gprs + *pos - size,
-                             buffer, size) ? -EFAULT : size;
+        size = simple_write_to_buffer(lscsa->gprs, sizeof(lscsa->gprs), pos,
+                                        buffer, size);
 
         spu_release_saved(ctx);
-        return ret;
+        return size;
 }
 
 static const struct file_operations spufs_regs_fops = {
@@ -630,18 +620,15 @@ spufs_fpcr_write(struct file *file, const char __user * buffer,
         if (*pos >= sizeof(lscsa->fpcr))
                 return -EFBIG;
 
-        size = min_t(ssize_t, sizeof(lscsa->fpcr) - *pos, size);
-
         ret = spu_acquire_saved(ctx);
         if (ret)
                 return ret;
 
-        *pos += size;
-        ret = copy_from_user((char *)&lscsa->fpcr + *pos - size,
-                             buffer, size) ? -EFAULT : size;
+        size = simple_write_to_buffer(&lscsa->fpcr, sizeof(lscsa->fpcr), pos,
+                                        buffer, size);
 
         spu_release_saved(ctx);
-        return ret;
+        return size;
 }
 
 static const struct file_operations spufs_fpcr_fops = {
diff --git a/arch/powerpc/platforms/embedded6xx/gamecube.c b/arch/powerpc/platforms/embedded6xx/gamecube.c
index 1106fd99627f..a138e14bad2e 100644
--- a/arch/powerpc/platforms/embedded6xx/gamecube.c
+++ b/arch/powerpc/platforms/embedded6xx/gamecube.c
@@ -75,14 +75,6 @@ static void gamecube_shutdown(void)
         flipper_quiesce();
 }
 
-#ifdef CONFIG_KEXEC
-static int gamecube_kexec_prepare(struct kimage *image)
-{
-        return 0;
-}
-#endif /* CONFIG_KEXEC */
-
-
 define_machine(gamecube) {
         .name                   = "gamecube",
         .probe                  = gamecube_probe,
@@ -95,9 +87,6 @@ define_machine(gamecube) {
         .calibrate_decr         = generic_calibrate_decr,
         .progress               = udbg_progress,
         .machine_shutdown       = gamecube_shutdown,
-#ifdef CONFIG_KEXEC
-        .machine_kexec_prepare  = gamecube_kexec_prepare,
-#endif
 };
 
 
diff --git a/arch/powerpc/platforms/embedded6xx/wii.c b/arch/powerpc/platforms/embedded6xx/wii.c
index 649473a729b8..1b5dc1a2e145 100644
--- a/arch/powerpc/platforms/embedded6xx/wii.c
+++ b/arch/powerpc/platforms/embedded6xx/wii.c
@@ -18,7 +18,6 @@
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/seq_file.h>
-#include <linux/kexec.h>
 #include <linux/of_platform.h>
 #include <linux/memblock.h>
 #include <mm/mmu_decl.h>
@@ -226,13 +225,6 @@ static void wii_shutdown(void)
         flipper_quiesce();
 }
 
-#ifdef CONFIG_KEXEC
-static int wii_machine_kexec_prepare(struct kimage *image)
-{
-        return 0;
-}
-#endif /* CONFIG_KEXEC */
-
 define_machine(wii) {
         .name                   = "wii",
         .probe                  = wii_probe,
@@ -246,9 +238,6 @@ define_machine(wii) {
         .calibrate_decr         = generic_calibrate_decr,
         .progress               = udbg_progress,
         .machine_shutdown       = wii_shutdown,
-#ifdef CONFIG_KEXEC
-        .machine_kexec_prepare  = wii_machine_kexec_prepare,
-#endif
 };
 
 static struct of_device_id wii_of_bus[] = {
diff --git a/arch/powerpc/platforms/iseries/Kconfig b/arch/powerpc/platforms/iseries/Kconfig
index 47a20cfb4486..e5bc9f75d474 100644
--- a/arch/powerpc/platforms/iseries/Kconfig
+++ b/arch/powerpc/platforms/iseries/Kconfig
@@ -2,7 +2,7 @@ config PPC_ISERIES
         bool "IBM Legacy iSeries"
         depends on PPC64 && PPC_BOOK3S
         select PPC_INDIRECT_IO
-        select PPC_PCI_CHOICE if EMBEDDED
+        select PPC_PCI_CHOICE if EXPERT
 
 menu "iSeries device drivers"
         depends on PPC_ISERIES
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig
index 5d1b743dbe7e..5b3da4b4ea79 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -10,7 +10,7 @@ config PPC_PSERIES
         select RTAS_ERROR_LOGGING
         select PPC_UDBG_16550
         select PPC_NATIVE
-        select PPC_PCI_CHOICE if EMBEDDED
+        select PPC_PCI_CHOICE if EXPERT
         default y
 
 config PPC_SPLPAR
@@ -24,9 +24,9 @@ config PPC_SPLPAR
           two or more partitions.
 
 config EEH
-        bool "PCI Extended Error Handling (EEH)" if EMBEDDED
+        bool "PCI Extended Error Handling (EEH)" if EXPERT
         depends on PPC_PSERIES && PCI
-        default y if !EMBEDDED
+        default y if !EXPERT
 
 config PSERIES_MSI
        bool
diff --git a/arch/powerpc/platforms/pseries/kexec.c b/arch/powerpc/platforms/pseries/kexec.c
index 53cbd53d8740..77d38a5e2ff9 100644
--- a/arch/powerpc/platforms/pseries/kexec.c
+++ b/arch/powerpc/platforms/pseries/kexec.c
@@ -61,13 +61,3 @@ void __init setup_kexec_cpu_down_xics(void)
 {
         ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_xics;
 }
-
-static int __init pseries_kexec_setup(void)
-{
-        ppc_md.machine_kexec = default_machine_kexec;
-        ppc_md.machine_kexec_prepare = default_machine_kexec_prepare;
-        ppc_md.machine_crash_shutdown = default_machine_crash_shutdown;
-
-        return 0;
-}
-machine_device_initcall(pseries, pseries_kexec_setup);
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
index a4fc6da87c2e..c55d7ad9c648 100644
--- a/arch/powerpc/platforms/pseries/ras.c
+++ b/arch/powerpc/platforms/pseries/ras.c
@@ -54,7 +54,8 @@
 static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX];
 static DEFINE_SPINLOCK(ras_log_buf_lock);
 
-static char mce_data_buf[RTAS_ERROR_LOG_MAX];
+static char global_mce_data_buf[RTAS_ERROR_LOG_MAX];
+static DEFINE_PER_CPU(__u64, mce_data_buf);
 
 static int ras_get_sensor_state_token;
 static int ras_check_exception_token;
@@ -196,12 +197,24 @@ static irqreturn_t ras_error_interrupt(int irq, void *dev_id)
         return IRQ_HANDLED;
 }
 
-/* Get the error information for errors coming through the
+/*
+ * Some versions of FWNMI place the buffer inside the 4kB page starting at
+ * 0x7000. Other versions place it inside the rtas buffer. We check both.
+ */
+#define VALID_FWNMI_BUFFER(A) \
+        ((((A) >= 0x7000) && ((A) < 0x7ff0)) || \
+        (((A) >= rtas.base) && ((A) < (rtas.base + rtas.size - 16))))
+
+/*
+ * Get the error information for errors coming through the
  * FWNMI vectors.  The pt_regs' r3 will be updated to reflect
  * the actual r3 if possible, and a ptr to the error log entry
  * will be returned if found.
  *
- * The mce_data_buf does not have any locks or protection around it,
+ * If the RTAS error is not of the extended type, then we put it in a per
+ * cpu 64bit buffer. If it is the extended type we use global_mce_data_buf.
+ *
+ * The global_mce_data_buf does not have any locks or protection around it,
  * if a second machine check comes in, or a system reset is done
  * before we have logged the error, then we will get corruption in the
  * error log.  This is preferable over holding off on calling
@@ -210,20 +223,31 @@ static irqreturn_t ras_error_interrupt(int irq, void *dev_id)
  */
 static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs)
 {
-        unsigned long errdata = regs->gpr[3];
-        struct rtas_error_log *errhdr = NULL;
         unsigned long *savep;
+        struct rtas_error_log *h, *errhdr = NULL;
+
+        if (!VALID_FWNMI_BUFFER(regs->gpr[3])) {
+                printk(KERN_ERR "FWNMI: corrupt r3\n");
+                return NULL;
+        }
 
-        if ((errdata >= 0x7000 && errdata < 0x7fff0) ||
-            (errdata >= rtas.base && errdata < rtas.base + rtas.size - 16)) {
-                savep = __va(errdata);
-                regs->gpr[3] = savep[0];        /* restore original r3 */
-                memset(mce_data_buf, 0, RTAS_ERROR_LOG_MAX);
-                memcpy(mce_data_buf, (char *)(savep + 1), RTAS_ERROR_LOG_MAX);
-                errhdr = (struct rtas_error_log *)mce_data_buf;
+        savep = __va(regs->gpr[3]);
+        regs->gpr[3] = savep[0];        /* restore original r3 */
+
+        /* If it isn't an extended log we can use the per cpu 64bit buffer */
+        h = (struct rtas_error_log *)&savep[1];
+        if (!h->extended) {
+                memcpy(&__get_cpu_var(mce_data_buf), h, sizeof(__u64));
+                errhdr = (struct rtas_error_log *)&__get_cpu_var(mce_data_buf);
         } else {
-                printk("FWNMI: corrupt r3\n");
+                int len;
+
+                len = max_t(int, 8+h->extended_log_length, RTAS_ERROR_LOG_MAX);
+                memset(global_mce_data_buf, 0, RTAS_ERROR_LOG_MAX);
+                memcpy(global_mce_data_buf, h, len);
+                errhdr = (struct rtas_error_log *)global_mce_data_buf;
         }
+
         return errhdr;
 }
 
@@ -235,7 +259,7 @@ static void fwnmi_release_errinfo(void)
 {
         int ret = rtas_call(rtas_token("ibm,nmi-interlock"), 0, 1, NULL);
         if (ret != 0)
-                printk("FWNMI: nmi-interlock failed: %d\n", ret);
+                printk(KERN_ERR "FWNMI: nmi-interlock failed: %d\n", ret);
 }
 
 int pSeries_system_reset_exception(struct pt_regs *regs)
@@ -259,31 +283,43 @@ int pSeries_system_reset_exception(struct pt_regs *regs)
  * Return 1 if corrected (or delivered a signal).
  * Return 0 if there is nothing we can do.
  */
-static int recover_mce(struct pt_regs *regs, struct rtas_error_log * err)
+static int recover_mce(struct pt_regs *regs, struct rtas_error_log *err)
 {
-        int nonfatal = 0;
+        int recovered = 0;
 
-        if (err->disposition == RTAS_DISP_FULLY_RECOVERED) {
+        if (!(regs->msr & MSR_RI)) {
+                /* If MSR_RI isn't set, we cannot recover */
+                recovered = 0;
+
+        } else if (err->disposition == RTAS_DISP_FULLY_RECOVERED) {
                 /* Platform corrected itself */
-                nonfatal = 1;
-        } else if ((regs->msr & MSR_RI) &&
-                   user_mode(regs) &&
-                   err->severity == RTAS_SEVERITY_ERROR_SYNC &&
-                   err->disposition == RTAS_DISP_NOT_RECOVERED &&
-                   err->target == RTAS_TARGET_MEMORY &&
-                   err->type == RTAS_TYPE_ECC_UNCORR &&
-                   !(current->pid == 0 || is_global_init(current))) {
-                /* Kill off a user process with an ECC error */
-                printk(KERN_ERR "MCE: uncorrectable ecc error for pid %d\n",
-                       current->pid);
-                /* XXX something better for ECC error? */
-                _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
-                nonfatal = 1;
+                recovered = 1;
+
+        } else if (err->disposition == RTAS_DISP_LIMITED_RECOVERY) {
+                /* Platform corrected itself but could be degraded */
+                printk(KERN_ERR "MCE: limited recovery, system may "
+                       "be degraded\n");
+                recovered = 1;
+
+        } else if (user_mode(regs) && !is_global_init(current) &&
+                   err->severity == RTAS_SEVERITY_ERROR_SYNC) {
+
+                /*
+                 * If we received a synchronous error when in userspace
+                 * kill the task. Firmware may report details of the fail
+                 * asynchronously, so we can't rely on the target and type
+                 * fields being valid here.
+                 */
+                printk(KERN_ERR "MCE: uncorrectable error, killing task "
+                       "%s:%d\n", current->comm, current->pid);
+
+                _exception(SIGBUS, regs, BUS_MCEERR_AR, regs->nip);
+                recovered = 1;
         }
 
-        log_error((char *)err, ERR_TYPE_RTAS_LOG, !nonfatal);
+        log_error((char *)err, ERR_TYPE_RTAS_LOG, 0);
 
-        return nonfatal;
+        return recovered;
 }
 
 /*
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index 9f99bef2adec..8c6cab013278 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -1555,8 +1555,6 @@ int fsl_rio_setup(struct platform_device *dev)
         saved_mcheck_exception = ppc_md.machine_check_exception;
         ppc_md.machine_check_exception = fsl_rio_mcheck_exception;
 #endif
-        /* Ensure that RFXE is set */
-        mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000));
 
         return 0;
 err:
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 7c1342618a30..b0c8469e5ddd 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -674,7 +674,8 @@ void mpic_unmask_irq(unsigned int irq)
         /* make sure mask gets to controller before we return to user */
         do {
                 if (!loops--) {
-                        printk(KERN_ERR "mpic_enable_irq timeout\n");
+                        printk(KERN_ERR "%s: timeout on hwirq %u\n",
+                               __func__, src);
                         break;
                 }
         } while(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK);
@@ -695,7 +696,8 @@ void mpic_mask_irq(unsigned int irq)
         /* make sure mask gets to controller before we return to user */
         do {
                 if (!loops--) {
-                        printk(KERN_ERR "mpic_enable_irq timeout\n");
+                        printk(KERN_ERR "%s: timeout on hwirq %u\n",
+                               __func__, src);
                         break;
                 }
         } while(!(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK));
diff --git a/arch/score/Kconfig b/arch/score/Kconfig
index 4293fdcb5398..27b2295f41f3 100644
--- a/arch/score/Kconfig
+++ b/arch/score/Kconfig
@@ -1,5 +1,9 @@
 menu "Machine selection"
 
+config SCORE
+       def_bool y
+       select HAVE_GENERIC_HARDIRQS
+
 choice
         prompt "System type"
         default MACH_SPCT6600
@@ -53,9 +57,6 @@ config GENERIC_CLOCKEVENTS
 config SCHED_NO_NO_OMIT_FRAME_POINTER
         def_bool y
 
-config GENERIC_HARDIRQS_NO__DO_IRQ
-        def_bool y
-
 config GENERIC_SYSCALL_TABLE
         def_bool y
 
@@ -68,9 +69,6 @@ menu "Kernel type"
 config 32BIT
         def_bool y
 
-config GENERIC_HARDIRQS
-        def_bool y
-
 config ARCH_FLATMEM_ENABLE
         def_bool y
 
diff --git a/arch/score/configs/spct6600_defconfig b/arch/score/configs/spct6600_defconfig
index 9883c50e4636..df1edbf507a2 100644
--- a/arch/score/configs/spct6600_defconfig
+++ b/arch/score/configs/spct6600_defconfig
@@ -9,7 +9,7 @@ CONFIG_LOG_BUF_SHIFT=12
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 CONFIG_SLAB=y
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index fff252209f63..ae555569823b 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -1,6 +1,6 @@
 config SUPERH
         def_bool y
-        select EMBEDDED
+        select EXPERT
         select CLKDEV_LOOKUP
         select HAVE_IDE if HAS_IOPORT
         select HAVE_MEMBLOCK
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index 45d9c87d083a..95695e97703e 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -50,6 +50,7 @@ config SPARC64
         select RTC_DRV_STARFIRE
         select HAVE_PERF_EVENTS
         select PERF_USE_VMALLOC
+        select HAVE_GENERIC_HARDIRQS
 
 config ARCH_DEFCONFIG
         string
@@ -107,10 +108,6 @@ config NEED_PER_CPU_EMBED_FIRST_CHUNK
 config NEED_PER_CPU_PAGE_FIRST_CHUNK
         def_bool y if SPARC64
 
-config GENERIC_HARDIRQS_NO__DO_IRQ
-        bool
-        def_bool y if SPARC64
-
 config MMU
         bool
         default y
@@ -276,10 +273,6 @@ config HOTPLUG_CPU
           can be controlled through /sys/devices/system/cpu/cpu#.
           Say N if you want to disable CPU hotplug.
 
-config GENERIC_HARDIRQS
-        bool
-        default y if SPARC64
-
 source "kernel/time/Kconfig"
 
 if SPARC64
diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig
index e11b5fcb70eb..08948e4e1503 100644
--- a/arch/tile/Kconfig
+++ b/arch/tile/Kconfig
@@ -1,24 +1,33 @@
 # For a description of the syntax of this configuration file,
 # see Documentation/kbuild/config-language.txt.
 
-config MMU
-        def_bool y
-
-config GENERIC_CSUM
-        def_bool y
-
-config GENERIC_HARDIRQS
+config TILE
         def_bool y
+        select HAVE_KVM if !TILEGX
+        select GENERIC_FIND_FIRST_BIT
+        select GENERIC_FIND_NEXT_BIT
+        select USE_GENERIC_SMP_HELPERS
+        select CC_OPTIMIZE_FOR_SIZE
+        select HAVE_GENERIC_HARDIRQS
+        select GENERIC_IRQ_PROBE
+        select GENERIC_PENDING_IRQ if SMP
 
-config GENERIC_HARDIRQS_NO__DO_IRQ
-        def_bool y
+# FIXME: investigate whether we need/want these options.
+#       select HAVE_IOREMAP_PROT
+#       select HAVE_OPTPROBES
+#       select HAVE_REGS_AND_STACK_ACCESS_API
+#       select HAVE_HW_BREAKPOINT
+#       select PERF_EVENTS
+#       select HAVE_USER_RETURN_NOTIFIER
+#       config NO_BOOTMEM
+#       config ARCH_SUPPORTS_DEBUG_PAGEALLOC
+#       config HUGETLB_PAGE_SIZE_VARIABLE
 
-config GENERIC_IRQ_PROBE
+config MMU
         def_bool y
 
-config GENERIC_PENDING_IRQ
+config GENERIC_CSUM
         def_bool y
-        depends on GENERIC_HARDIRQS && SMP
 
 config SEMAPHORE_SLEEPERS
         def_bool y
@@ -97,26 +106,6 @@ config HVC_TILE
         select HVC_DRIVER
         def_bool y
 
-config TILE
-        def_bool y
-        select HAVE_KVM if !TILEGX
-        select GENERIC_FIND_FIRST_BIT
-        select GENERIC_FIND_NEXT_BIT
-        select USE_GENERIC_SMP_HELPERS
-        select CC_OPTIMIZE_FOR_SIZE
-
-# FIXME: investigate whether we need/want these options.
-#       select HAVE_IOREMAP_PROT
-#       select HAVE_OPTPROBES
-#       select HAVE_REGS_AND_STACK_ACCESS_API
-#       select HAVE_HW_BREAKPOINT
-#       select PERF_EVENTS
-#       select HAVE_USER_RETURN_NOTIFIER
-#       config NO_BOOTMEM
-#       config ARCH_SUPPORTS_DEBUG_PAGEALLOC
-#       config HUGETLB_PAGE_SIZE_VARIABLE
-
-
 # Please note: TILE-Gx support is not yet finalized; this is
 # the preliminary support.  TILE-Gx drivers are only provided
 # with the alpha or beta test versions for Tilera customers.
@@ -220,7 +209,7 @@ config FORCE_MAX_ZONEORDER
 
 choice
         depends on !TILEGX
-        prompt "Memory split" if EMBEDDED
+        prompt "Memory split" if EXPERT
         default VMSPLIT_3G
         ---help---
           Select the desired split between kernel and user memory.
diff --git a/arch/tile/Kconfig.debug b/arch/tile/Kconfig.debug
index a81f0fbf7e60..9bc161a02c71 100644
--- a/arch/tile/Kconfig.debug
+++ b/arch/tile/Kconfig.debug
@@ -3,7 +3,7 @@ menu "Kernel hacking"
 source "lib/Kconfig.debug"
 
 config EARLY_PRINTK
-        bool "Early printk" if EMBEDDED && DEBUG_KERNEL
+        bool "Early printk" if EXPERT && DEBUG_KERNEL
         default y
         help
           Write kernel log output directly via the hypervisor console.
diff --git a/arch/tile/configs/tile_defconfig b/arch/tile/configs/tile_defconfig
index 919c54afd981..0fe54445fda5 100644
--- a/arch/tile/configs/tile_defconfig
+++ b/arch/tile/configs/tile_defconfig
@@ -3,7 +3,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE="usr/contents.txt"
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_COMPAT_BRK is not set
 CONFIG_PROFILING=y
 CONFIG_MODULES=y
diff --git a/arch/um/Kconfig.common b/arch/um/Kconfig.common
index 049d048b070d..e351e14b4339 100644
--- a/arch/um/Kconfig.common
+++ b/arch/um/Kconfig.common
@@ -3,14 +3,10 @@ config DEFCONFIG_LIST
         option defconfig_list
         default "arch/$ARCH/defconfig"
 
-# UML uses the generic IRQ subsystem
-config GENERIC_HARDIRQS
-        bool
-        default y
-
 config UML
         bool
         default y
+        select HAVE_GENERIC_HARDIRQS
 
 config MMU
         bool
diff --git a/arch/um/Kconfig.um b/arch/um/Kconfig.um
index f8d1d0d47fe6..90a438acbfaf 100644
--- a/arch/um/Kconfig.um
+++ b/arch/um/Kconfig.um
@@ -120,9 +120,6 @@ config SMP
 
           If you don't know what to do, say N.
 
-config GENERIC_HARDIRQS_NO__DO_IRQ
-        def_bool y
-
 config NR_CPUS
         int "Maximum number of CPUs (2-32)"
         range 2 32
diff --git a/arch/um/defconfig b/arch/um/defconfig
index 564f3de65b4a..9f7634f08cf3 100644
--- a/arch/um/defconfig
+++ b/arch/um/defconfig
@@ -133,7 +133,7 @@ CONFIG_SYSFS_DEPRECATED=y
 # CONFIG_BLK_DEV_INITRD is not set
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
-# CONFIG_EMBEDDED is not set
+# CONFIG_EXPERT is not set
 CONFIG_UID16=y
 CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 3ed5ad92b029..d5ed94d30aad 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -627,11 +627,11 @@ config APB_TIMER
          as it is off-chip. APB timers are always running regardless of CPU
          C states, they are used as per CPU clockevent device when possible.
 
-# Mark as embedded because too many people got it wrong.
+# Mark as expert because too many people got it wrong.
 # The code disables itself when not needed.
 config DMI
         default y
-        bool "Enable DMI scanning" if EMBEDDED
+        bool "Enable DMI scanning" if EXPERT
         ---help---
           Enabled scanning of DMI to identify machine quirks. Say Y
           here unless you have verified that your setup is not
@@ -639,7 +639,7 @@ config DMI
           BIOS code.
 
 config GART_IOMMU
-        bool "GART IOMMU support" if EMBEDDED
+        bool "GART IOMMU support" if EXPERT
         default y
         select SWIOTLB
         depends on X86_64 && PCI && AMD_NB
@@ -889,7 +889,7 @@ config X86_THERMAL_VECTOR
         depends on X86_MCE_INTEL
 
 config VM86
-        bool "Enable VM86 support" if EMBEDDED
+        bool "Enable VM86 support" if EXPERT
         default y
         depends on X86_32
         ---help---
@@ -1073,7 +1073,7 @@ endchoice
 
 choice
         depends on EXPERIMENTAL
-        prompt "Memory split" if EMBEDDED
+        prompt "Memory split" if EXPERT
         default VMSPLIT_3G
         depends on X86_32
         ---help---
@@ -1135,7 +1135,7 @@ config ARCH_DMA_ADDR_T_64BIT
         def_bool X86_64 || HIGHMEM64G
 
 config DIRECT_GBPAGES
-        bool "Enable 1GB pages for kernel pagetables" if EMBEDDED
+        bool "Enable 1GB pages for kernel pagetables" if EXPERT
         default y
         depends on X86_64
         ---help---
@@ -1369,7 +1369,7 @@ config MATH_EMULATION
 
 config MTRR
         def_bool y
-        prompt "MTRR (Memory Type Range Register) support" if EMBEDDED
+        prompt "MTRR (Memory Type Range Register) support" if EXPERT
         ---help---
           On Intel P6 family processors (Pentium Pro, Pentium II and later)
           the Memory Type Range Registers (MTRRs) may be used to control
@@ -1435,7 +1435,7 @@ config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT
 
 config X86_PAT
         def_bool y
-        prompt "x86 PAT support" if EMBEDDED
+        prompt "x86 PAT support" if EXPERT
         depends on MTRR
         ---help---
           Use PAT attributes to setup page level cache control.
@@ -1539,7 +1539,7 @@ config KEXEC_JUMP
           code in physical address mode via KEXEC
 
 config PHYSICAL_START
-        hex "Physical address where the kernel is loaded" if (EMBEDDED || CRASH_DUMP)
+        hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
         default "0x1000000"
         ---help---
           This gives the physical address where the kernel is loaded.
@@ -1934,7 +1934,7 @@ config PCI_MMCONFIG
         depends on X86_64 && PCI && ACPI
 
 config PCI_CNB20LE_QUIRK
-        bool "Read CNB20LE Host Bridge Windows" if EMBEDDED
+        bool "Read CNB20LE Host Bridge Windows" if EXPERT
         default n
         depends on PCI && EXPERIMENTAL
         help
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 15588a0ef466..283c5a6a03a6 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -424,7 +424,7 @@ config X86_DEBUGCTLMSR
         depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486 || M386) && !UML
 
 menuconfig PROCESSOR_SELECT
-        bool "Supported processor vendors" if EMBEDDED
+        bool "Supported processor vendors" if EXPERT
         ---help---
           This lets you choose what x86 vendor support code your kernel
           will include.
diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug
index 45143bbcfe5e..615e18810f48 100644
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -31,7 +31,7 @@ config X86_VERBOSE_BOOTUP
           see errors. Disable this if you want silent bootup.
 
 config EARLY_PRINTK
-        bool "Early printk" if EMBEDDED
+        bool "Early printk" if EXPERT
         default y
         ---help---
           Write kernel log output directly into the VGA buffer or to a serial
@@ -138,7 +138,7 @@ config DEBUG_NX_TEST
 
 config DOUBLEFAULT
         default y
-        bool "Enable doublefault exception handler" if EMBEDDED
+        bool "Enable doublefault exception handler" if EXPERT
         depends on X86_32
         ---help---
           This option allows trapping of rare doublefault exceptions that
diff --git a/arch/x86/include/asm/numa_32.h b/arch/x86/include/asm/numa_32.h
index a37229011b56..b0ef2b449a9d 100644
--- a/arch/x86/include/asm/numa_32.h
+++ b/arch/x86/include/asm/numa_32.h
@@ -1,6 +1,8 @@
 #ifndef _ASM_X86_NUMA_32_H
 #define _ASM_X86_NUMA_32_H
 
+extern int numa_off;
+
 extern int pxm_to_nid(int pxm);
 extern void numa_remove_cpu(int cpu);
 
diff --git a/arch/x86/include/asm/numa_64.h b/arch/x86/include/asm/numa_64.h
index 5ae87285a502..0493be39607c 100644
--- a/arch/x86/include/asm/numa_64.h
+++ b/arch/x86/include/asm/numa_64.h
@@ -40,6 +40,7 @@ extern void __cpuinit numa_remove_cpu(int cpu);
 #ifdef CONFIG_NUMA_EMU
 #define FAKE_NODE_MIN_SIZE      ((u64)32 << 20)
 #define FAKE_NODE_MIN_HASH_MASK (~(FAKE_NODE_MIN_SIZE - 1UL))
+void numa_emu_cmdline(char *);
 #endif /* CONFIG_NUMA_EMU */
 #else
 static inline void init_cpu_to_node(void)               { }
diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h
index 8ee45167e817..3788f4649db4 100644
--- a/arch/x86/include/asm/percpu.h
+++ b/arch/x86/include/asm/percpu.h
@@ -414,8 +414,6 @@ do {									\
 #define this_cpu_xchg_1(pcp, nval)      percpu_xchg_op(pcp, nval)
 #define this_cpu_xchg_2(pcp, nval)      percpu_xchg_op(pcp, nval)
 #define this_cpu_xchg_4(pcp, nval)      percpu_xchg_op(pcp, nval)
-#define this_cpu_xchg_8(pcp, nval)      percpu_xchg_op(pcp, nval)
-#define this_cpu_cmpxchg_8(pcp, oval, nval)     percpu_cmpxchg_op(pcp, oval, nval)
 
 #define irqsafe_cpu_add_1(pcp, val)     percpu_add_op((pcp), val)
 #define irqsafe_cpu_add_2(pcp, val)     percpu_add_op((pcp), val)
@@ -432,8 +430,6 @@ do {									\
 #define irqsafe_cpu_xchg_1(pcp, nval)   percpu_xchg_op(pcp, nval)
 #define irqsafe_cpu_xchg_2(pcp, nval)   percpu_xchg_op(pcp, nval)
 #define irqsafe_cpu_xchg_4(pcp, nval)   percpu_xchg_op(pcp, nval)
-#define irqsafe_cpu_xchg_8(pcp, nval)   percpu_xchg_op(pcp, nval)
-#define irqsafe_cpu_cmpxchg_8(pcp, oval, nval)  percpu_cmpxchg_op(pcp, oval, nval)
 
 #ifndef CONFIG_M386
 #define __this_cpu_add_return_1(pcp, val) percpu_add_return_op(pcp, val)
@@ -475,11 +471,15 @@ do {									\
 #define this_cpu_or_8(pcp, val)         percpu_to_op("or", (pcp), val)
 #define this_cpu_xor_8(pcp, val)        percpu_to_op("xor", (pcp), val)
 #define this_cpu_add_return_8(pcp, val) percpu_add_return_op(pcp, val)
+#define this_cpu_xchg_8(pcp, nval)      percpu_xchg_op(pcp, nval)
+#define this_cpu_cmpxchg_8(pcp, oval, nval)     percpu_cmpxchg_op(pcp, oval, nval)
 
 #define irqsafe_cpu_add_8(pcp, val)     percpu_add_op((pcp), val)
 #define irqsafe_cpu_and_8(pcp, val)     percpu_to_op("and", (pcp), val)
 #define irqsafe_cpu_or_8(pcp, val)      percpu_to_op("or", (pcp), val)
 #define irqsafe_cpu_xor_8(pcp, val)     percpu_to_op("xor", (pcp), val)
+#define irqsafe_cpu_xchg_8(pcp, nval)   percpu_xchg_op(pcp, nval)
+#define irqsafe_cpu_cmpxchg_8(pcp, oval, nval)  percpu_cmpxchg_op(pcp, oval, nval)
 #endif
 
 /* This is not atomic against other CPUs -- CPU preemption needs to be off */
diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c
index 48ff6dcffa02..9974d21048fd 100644
--- a/arch/x86/kernel/irq_32.c
+++ b/arch/x86/kernel/irq_32.c
@@ -129,8 +129,7 @@ void __cpuinit irq_ctx_init(int cpu)
         irqctx = page_address(alloc_pages_node(cpu_to_node(cpu),
                                                THREAD_FLAGS,
                                                THREAD_ORDER));
-        irqctx->tinfo.task              = NULL;
-        irqctx->tinfo.exec_domain       = NULL;
+        memset(&irqctx->tinfo, 0, sizeof(struct thread_info));
         irqctx->tinfo.cpu               = cpu;
         irqctx->tinfo.preempt_count     = HARDIRQ_OFFSET;
         irqctx->tinfo.addr_limit        = MAKE_MM_SEG(0);
@@ -140,10 +139,8 @@ void __cpuinit irq_ctx_init(int cpu)
         irqctx = page_address(alloc_pages_node(cpu_to_node(cpu),
                                                THREAD_FLAGS,
                                                THREAD_ORDER));
-        irqctx->tinfo.task              = NULL;
-        irqctx->tinfo.exec_domain       = NULL;
+        memset(&irqctx->tinfo, 0, sizeof(struct thread_info));
         irqctx->tinfo.cpu               = cpu;
-        irqctx->tinfo.preempt_count     = 0;
         irqctx->tinfo.addr_limit        = MAKE_MM_SEG(0);
 
         per_cpu(softirq_ctx, cpu) = irqctx;
diff --git a/arch/x86/lguest/Kconfig b/arch/x86/lguest/Kconfig
index 38718041efc3..6e121a2a49e1 100644
--- a/arch/x86/lguest/Kconfig
+++ b/arch/x86/lguest/Kconfig
@@ -2,6 +2,7 @@ config LGUEST_GUEST
         bool "Lguest guest support"
         select PARAVIRT
         depends on X86_32
+        select VIRTUALIZATION
         select VIRTIO
         select VIRTIO_RING
         select VIRTIO_CONSOLE
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 4996cf5f73a0..eba687f0cc0c 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -824,7 +824,7 @@ static void __init lguest_init_IRQ(void)
 
         for (i = FIRST_EXTERNAL_VECTOR; i < NR_VECTORS; i++) {
                 /* Some systems map "vectors" to interrupts weirdly.  Not us! */
-                __get_cpu_var(vector_irq)[i] = i - FIRST_EXTERNAL_VECTOR;
+                __this_cpu_write(vector_irq[i], i - FIRST_EXTERNAL_VECTOR);
                 if (i != SYSCALL_VECTOR)
                         set_intr_gate(i, interrupt[i - FIRST_EXTERNAL_VECTOR]);
         }
diff --git a/arch/x86/mm/numa.c b/arch/x86/mm/numa.c
index 787c52ca49c3..ebf6d7887a38 100644
--- a/arch/x86/mm/numa.c
+++ b/arch/x86/mm/numa.c
@@ -2,6 +2,28 @@
 #include <linux/topology.h>
 #include <linux/module.h>
 #include <linux/bootmem.h>
+#include <asm/numa.h>
+#include <asm/acpi.h>
+
+int __initdata numa_off;
+
+static __init int numa_setup(char *opt)
+{
+        if (!opt)
+                return -EINVAL;
+        if (!strncmp(opt, "off", 3))
+                numa_off = 1;
+#ifdef CONFIG_NUMA_EMU
+        if (!strncmp(opt, "fake=", 5))
+                numa_emu_cmdline(opt + 5);
+#endif
+#ifdef CONFIG_ACPI_NUMA
+        if (!strncmp(opt, "noacpi", 6))
+                acpi_numa = -1;
+#endif
+        return 0;
+}
+early_param("numa", numa_setup);
 
 /*
  * Which logical CPUs are on which nodes
diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c
index 1e72102e80c9..95ea1551eebc 100644
--- a/arch/x86/mm/numa_64.c
+++ b/arch/x86/mm/numa_64.c
@@ -30,7 +30,6 @@ s16 apicid_to_node[MAX_LOCAL_APIC] __cpuinitdata = {
         [0 ... MAX_LOCAL_APIC-1] = NUMA_NO_NODE
 };
 
-int numa_off __initdata;
 static unsigned long __initdata nodemap_addr;
 static unsigned long __initdata nodemap_size;
 
@@ -263,6 +262,11 @@ static struct bootnode nodes[MAX_NUMNODES] __initdata;
 static struct bootnode physnodes[MAX_NUMNODES] __cpuinitdata;
 static char *cmdline __initdata;
 
+void __init numa_emu_cmdline(char *str)
+{
+        cmdline = str;
+}
+
 static int __init setup_physnodes(unsigned long start, unsigned long end,
                                         int acpi, int amd)
 {
@@ -670,24 +674,6 @@ unsigned long __init numa_free_all_bootmem(void)
         return pages;
 }
 
-static __init int numa_setup(char *opt)
-{
-        if (!opt)
-                return -EINVAL;
-        if (!strncmp(opt, "off", 3))
-                numa_off = 1;
-#ifdef CONFIG_NUMA_EMU
-        if (!strncmp(opt, "fake=", 5))
-                cmdline = opt + 5;
-#endif
-#ifdef CONFIG_ACPI_NUMA
-        if (!strncmp(opt, "noacpi", 6))
-                acpi_numa = -1;
-#endif
-        return 0;
-}
-early_param("numa", numa_setup);
-
 #ifdef CONFIG_NUMA
 
 static __init int find_near_online_node(int node)
diff --git a/arch/x86/mm/srat_32.c b/arch/x86/mm/srat_32.c
index f16434568a51..ae96e7b8051d 100644
--- a/arch/x86/mm/srat_32.c
+++ b/arch/x86/mm/srat_32.c
@@ -59,7 +59,6 @@ static struct node_memory_chunk_s __initdata node_memory_chunk[MAXCHUNKS];
 static int __initdata num_memory_chunks; /* total number of memory chunks */
 static u8 __initdata apicid_to_pxm[MAX_APICID];
 
-int numa_off __initdata;
 int acpi_numa __initdata;
 
 static __init void bad_srat(void)
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 7e8d3bc80af6..50542efe45fb 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1194,7 +1194,7 @@ asmlinkage void __init xen_start_kernel(void)
         per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
 
         local_irq_disable();
-        early_boot_irqs_off();
+        early_boot_irqs_disabled = true;
 
         memblock_init();
 
diff --git a/arch/x86/xen/irq.c b/arch/x86/xen/irq.c
index 9d30105a0c4a..6a6fe8939645 100644
--- a/arch/x86/xen/irq.c
+++ b/arch/x86/xen/irq.c
@@ -126,7 +126,7 @@ static const struct pv_irq_ops xen_irq_ops __initdata = {
 #endif
 };
 
-void __init xen_init_irq_ops()
+void __init xen_init_irq_ops(void)
 {
         pv_irq_ops = xen_irq_ops;
         x86_init.irqs.intr_init = xen_init_IRQ;
diff --git a/arch/x86/xen/p2m.c b/arch/x86/xen/p2m.c
index 8f2251d2a3f8..ddc81a06edb9 100644
--- a/arch/x86/xen/p2m.c
+++ b/arch/x86/xen/p2m.c
@@ -237,7 +237,25 @@ void __init xen_build_dynamic_phys_to_machine(void)
                         p2m_top[topidx] = mid;
                 }
 
-                p2m_top[topidx][mididx] = &mfn_list[pfn];
+                /*
+                 * As long as the mfn_list has enough entries to completely
+                 * fill a p2m page, pointing into the array is ok. But if
+                 * not the entries beyond the last pfn will be undefined.
+                 * And guessing that the 'what-ever-there-is' does not take it
+                 * too kindly when changing it to invalid markers, a new page
+                 * is allocated, initialized and filled with the valid part.
+                 */
+                if (unlikely(pfn + P2M_PER_PAGE > max_pfn)) {
+                        unsigned long p2midx;
+                        unsigned long *p2m = extend_brk(PAGE_SIZE, PAGE_SIZE);
+                        p2m_init(p2m);
+
+                        for (p2midx = 0; pfn + p2midx < max_pfn; p2midx++) {
+                                p2m[p2midx] = mfn_list[pfn + p2midx];
+                        }
+                        p2m_top[topidx][mididx] = p2m;
+                } else
+                        p2m_top[topidx][mididx] = &mfn_list[pfn];
         }
 
         m2p_override_init();
diff --git a/arch/xtensa/configs/common_defconfig b/arch/xtensa/configs/common_defconfig
index 1d230ee081b4..b90038e40dd3 100644
--- a/arch/xtensa/configs/common_defconfig
+++ b/arch/xtensa/configs/common_defconfig
@@ -32,7 +32,7 @@ CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_HOTPLUG is not set
 CONFIG_KOBJECT_UEVENT=y
 # CONFIG_IKCONFIG is not set
-# CONFIG_EMBEDDED is not set
+# CONFIG_EXPERT is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
diff --git a/arch/xtensa/configs/iss_defconfig b/arch/xtensa/configs/iss_defconfig
index 7368164843b9..0234cd198c54 100644
--- a/arch/xtensa/configs/iss_defconfig
+++ b/arch/xtensa/configs/iss_defconfig
@@ -55,7 +55,7 @@ CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
diff --git a/arch/xtensa/configs/s6105_defconfig b/arch/xtensa/configs/s6105_defconfig
index bb84fbc9921f..095cd8084164 100644
--- a/arch/xtensa/configs/s6105_defconfig
+++ b/arch/xtensa/configs/s6105_defconfig
@@ -55,7 +55,7 @@ CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set