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-rw-r--r--arch/arm/mach-u300/Kconfig12
-rw-r--r--arch/arm/mach-u300/Makefile3
-rw-r--r--arch/arm/mach-u300/core.c14
-rw-r--r--arch/arm/mach-u300/dummyspichip.c290
-rw-r--r--arch/arm/mach-u300/gpio.c13
-rw-r--r--arch/arm/mach-u300/i2c.c43
-rw-r--r--arch/arm/mach-u300/i2c.h23
-rw-r--r--arch/arm/mach-u300/include/mach/syscon.h120
-rw-r--r--arch/arm/mach-u300/mmc.c16
-rw-r--r--arch/arm/mach-u300/padmux.c395
-rw-r--r--arch/arm/mach-u300/padmux.h28
-rw-r--r--arch/arm/mach-u300/spi.c124
-rw-r--r--arch/arm/mach-u300/spi.h26
-rw-r--r--arch/arm/mach-u300/timer.c15
14 files changed, 1053 insertions, 69 deletions
diff --git a/arch/arm/mach-u300/Kconfig b/arch/arm/mach-u300/Kconfig
index 337b9aabce49..801b21e7f677 100644
--- a/arch/arm/mach-u300/Kconfig
+++ b/arch/arm/mach-u300/Kconfig
@@ -81,6 +81,18 @@ config MACH_U300_SEMI_IS_SHARED
81 Memory Interface) from both from access and application 81 Memory Interface) from both from access and application
82 side. 82 side.
83 83
84config MACH_U300_SPIDUMMY
85 bool "SSP/SPI dummy chip"
86 select SPI
87 select SPI_MASTER
88 select SPI_PL022
89 help
90 This creates a small kernel module that creates a dummy
91 SPI device to be used for loopback tests. Regularly used
92 to test reference designs. If you're not testing SPI,
93 you don't need it. Selecting this will activate the
94 SPI framework and ARM PL022 support.
95
84comment "All the settings below must match the bootloader's settings" 96comment "All the settings below must match the bootloader's settings"
85 97
86config MACH_U300_ACCESS_MEM_SIZE 98config MACH_U300_ACCESS_MEM_SIZE
diff --git a/arch/arm/mach-u300/Makefile b/arch/arm/mach-u300/Makefile
index 24950e0df4b4..885b5c027c1e 100644
--- a/arch/arm/mach-u300/Makefile
+++ b/arch/arm/mach-u300/Makefile
@@ -9,3 +9,6 @@ obj- :=
9 9
10obj-$(CONFIG_ARCH_U300) += u300.o 10obj-$(CONFIG_ARCH_U300) += u300.o
11obj-$(CONFIG_MMC) += mmc.o 11obj-$(CONFIG_MMC) += mmc.o
12obj-$(CONFIG_SPI_PL022) += spi.o
13obj-$(CONFIG_MACH_U300_SPIDUMMY) += dummyspichip.o
14obj-$(CONFIG_I2C_STU300) += i2c.o
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 2e9b8ccd8ec2..be60d6deee8b 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -32,6 +32,8 @@
32 32
33#include "clock.h" 33#include "clock.h"
34#include "mmc.h" 34#include "mmc.h"
35#include "spi.h"
36#include "i2c.h"
35 37
36/* 38/*
37 * Static I/O mappings that are needed for booting the U300 platforms. The 39 * Static I/O mappings that are needed for booting the U300 platforms. The
@@ -378,14 +380,14 @@ static struct platform_device wdog_device = {
378}; 380};
379 381
380static struct platform_device i2c0_device = { 382static struct platform_device i2c0_device = {
381 .name = "stddci2c", 383 .name = "stu300",
382 .id = 0, 384 .id = 0,
383 .num_resources = ARRAY_SIZE(i2c0_resources), 385 .num_resources = ARRAY_SIZE(i2c0_resources),
384 .resource = i2c0_resources, 386 .resource = i2c0_resources,
385}; 387};
386 388
387static struct platform_device i2c1_device = { 389static struct platform_device i2c1_device = {
388 .name = "stddci2c", 390 .name = "stu300",
389 .id = 1, 391 .id = 1,
390 .num_resources = ARRAY_SIZE(i2c1_resources), 392 .num_resources = ARRAY_SIZE(i2c1_resources),
391 .resource = i2c1_resources, 393 .resource = i2c1_resources,
@@ -611,6 +613,8 @@ void __init u300_init_devices(void)
611 /* Wait for the PLL208 to lock if not locked in yet */ 613 /* Wait for the PLL208 to lock if not locked in yet */
612 while (!(readw(U300_SYSCON_VBASE + U300_SYSCON_CSR) & 614 while (!(readw(U300_SYSCON_VBASE + U300_SYSCON_CSR) &
613 U300_SYSCON_CSR_PLL208_LOCK_IND)); 615 U300_SYSCON_CSR_PLL208_LOCK_IND));
616 /* Initialize SPI device with some board specifics */
617 u300_spi_init(&pl022_device);
614 618
615 /* Register the AMBA devices in the AMBA bus abstraction layer */ 619 /* Register the AMBA devices in the AMBA bus abstraction layer */
616 u300_clock_primecells(); 620 u300_clock_primecells();
@@ -622,6 +626,12 @@ void __init u300_init_devices(void)
622 626
623 u300_assign_physmem(); 627 u300_assign_physmem();
624 628
629 /* Register subdevices on the I2C buses */
630 u300_i2c_register_board_devices();
631
632 /* Register subdevices on the SPI bus */
633 u300_spi_register_board_devices();
634
625 /* Register the platform devices */ 635 /* Register the platform devices */
626 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); 636 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
627 637
diff --git a/arch/arm/mach-u300/dummyspichip.c b/arch/arm/mach-u300/dummyspichip.c
new file mode 100644
index 000000000000..962f9de454de
--- /dev/null
+++ b/arch/arm/mach-u300/dummyspichip.c
@@ -0,0 +1,290 @@
1/*
2 * arch/arm/mach-u300/dummyspichip.c
3 *
4 * Copyright (C) 2007-2009 ST-Ericsson AB
5 * License terms: GNU General Public License (GPL) version 2
6 * This is a dummy loopback SPI "chip" used for testing SPI.
7 * Author: Linus Walleij <linus.walleij@stericsson.com>
8 */
9#include <linux/init.h>
10#include <linux/module.h>
11#include <linux/kernel.h>
12#include <linux/device.h>
13#include <linux/err.h>
14#include <linux/sysfs.h>
15#include <linux/mutex.h>
16#include <linux/spi/spi.h>
17#include <linux/dma-mapping.h>
18/*
19 * WARNING! Do not include this pl022-specific controller header
20 * for any generic driver. It is only done in this dummy chip
21 * because we alter the chip configuration in order to test some
22 * different settings on the loopback device. Normal chip configs
23 * shall be STATIC and not altered by the driver!
24 */
25#include <linux/amba/pl022.h>
26
27struct dummy {
28 struct device *dev;
29 struct mutex lock;
30};
31
32#define DMA_TEST_SIZE 2048
33
34/* When we cat /sys/bus/spi/devices/spi0.0/looptest this will be triggered */
35static ssize_t dummy_looptest(struct device *dev,
36 struct device_attribute *attr, char *buf)
37{
38 struct spi_device *spi = to_spi_device(dev);
39 struct dummy *p_dummy = dev_get_drvdata(&spi->dev);
40
41 /*
42 * WARNING! Do not dereference the chip-specific data in any normal
43 * driver for a chip. It is usually STATIC and shall not be read
44 * or written to. Your chip driver should NOT depend on fields in this
45 * struct, this is just used here to alter the behaviour of the chip
46 * in order to perform tests.
47 */
48 struct pl022_config_chip *chip_info = spi->controller_data;
49 int status;
50 u8 txbuf[14] = {0xDE, 0xAD, 0xBE, 0xEF, 0x2B, 0xAD,
51 0xCA, 0xFE, 0xBA, 0xBE, 0xB1, 0x05,
52 0xF0, 0x0D};
53 u8 rxbuf[14];
54 u8 *bigtxbuf_virtual;
55 u8 *bigrxbuf_virtual;
56
57 if (mutex_lock_interruptible(&p_dummy->lock))
58 return -ERESTARTSYS;
59
60 bigtxbuf_virtual = kmalloc(DMA_TEST_SIZE, GFP_KERNEL);
61 if (bigtxbuf_virtual == NULL) {
62 status = -ENOMEM;
63 goto out;
64 }
65 bigrxbuf_virtual = kmalloc(DMA_TEST_SIZE, GFP_KERNEL);
66
67 /* Fill TXBUF with some happy pattern */
68 memset(bigtxbuf_virtual, 0xAA, DMA_TEST_SIZE);
69
70 /*
71 * Force chip to 8 bit mode
72 * WARNING: NEVER DO THIS IN REAL DRIVER CODE, THIS SHOULD BE STATIC!
73 */
74 chip_info->data_size = SSP_DATA_BITS_8;
75 /* You should NOT DO THIS EITHER */
76 spi->master->setup(spi);
77
78 /* Now run the tests for 8bit mode */
79 pr_info("Simple test 1: write 0xAA byte, read back garbage byte "
80 "in 8bit mode\n");
81 status = spi_w8r8(spi, 0xAA);
82 if (status < 0)
83 pr_warning("Siple test 1: FAILURE: spi_write_then_read "
84 "failed with status %d\n", status);
85 else
86 pr_info("Simple test 1: SUCCESS!\n");
87
88 pr_info("Simple test 2: write 8 bytes, read back 8 bytes garbage "
89 "in 8bit mode (full FIFO)\n");
90 status = spi_write_then_read(spi, &txbuf[0], 8, &rxbuf[0], 8);
91 if (status < 0)
92 pr_warning("Simple test 2: FAILURE: spi_write_then_read() "
93 "failed with status %d\n", status);
94 else
95 pr_info("Simple test 2: SUCCESS!\n");
96
97 pr_info("Simple test 3: write 14 bytes, read back 14 bytes garbage "
98 "in 8bit mode (see if we overflow FIFO)\n");
99 status = spi_write_then_read(spi, &txbuf[0], 14, &rxbuf[0], 14);
100 if (status < 0)
101 pr_warning("Simple test 3: FAILURE: failed with status %d "
102 "(probably FIFO overrun)\n", status);
103 else
104 pr_info("Simple test 3: SUCCESS!\n");
105
106 pr_info("Simple test 4: write 8 bytes with spi_write(), read 8 "
107 "bytes garbage with spi_read() in 8bit mode\n");
108 status = spi_write(spi, &txbuf[0], 8);
109 if (status < 0)
110 pr_warning("Simple test 4 step 1: FAILURE: spi_write() "
111 "failed with status %d\n", status);
112 else
113 pr_info("Simple test 4 step 1: SUCCESS!\n");
114 status = spi_read(spi, &rxbuf[0], 8);
115 if (status < 0)
116 pr_warning("Simple test 4 step 2: FAILURE: spi_read() "
117 "failed with status %d\n", status);
118 else
119 pr_info("Simple test 4 step 2: SUCCESS!\n");
120
121 pr_info("Simple test 5: write 14 bytes with spi_write(), read "
122 "14 bytes garbage with spi_read() in 8bit mode\n");
123 status = spi_write(spi, &txbuf[0], 14);
124 if (status < 0)
125 pr_warning("Simple test 5 step 1: FAILURE: spi_write() "
126 "failed with status %d (probably FIFO overrun)\n",
127 status);
128 else
129 pr_info("Simple test 5 step 1: SUCCESS!\n");
130 status = spi_read(spi, &rxbuf[0], 14);
131 if (status < 0)
132 pr_warning("Simple test 5 step 2: FAILURE: spi_read() "
133 "failed with status %d (probably FIFO overrun)\n",
134 status);
135 else
136 pr_info("Simple test 5: SUCCESS!\n");
137
138 pr_info("Simple test 6: write %d bytes with spi_write(), "
139 "read %d bytes garbage with spi_read() in 8bit mode\n",
140 DMA_TEST_SIZE, DMA_TEST_SIZE);
141 status = spi_write(spi, &bigtxbuf_virtual[0], DMA_TEST_SIZE);
142 if (status < 0)
143 pr_warning("Simple test 6 step 1: FAILURE: spi_write() "
144 "failed with status %d (probably FIFO overrun)\n",
145 status);
146 else
147 pr_info("Simple test 6 step 1: SUCCESS!\n");
148 status = spi_read(spi, &bigrxbuf_virtual[0], DMA_TEST_SIZE);
149 if (status < 0)
150 pr_warning("Simple test 6 step 2: FAILURE: spi_read() "
151 "failed with status %d (probably FIFO overrun)\n",
152 status);
153 else
154 pr_info("Simple test 6: SUCCESS!\n");
155
156
157 /*
158 * Force chip to 16 bit mode
159 * WARNING: NEVER DO THIS IN REAL DRIVER CODE, THIS SHOULD BE STATIC!
160 */
161 chip_info->data_size = SSP_DATA_BITS_16;
162 /* You should NOT DO THIS EITHER */
163 spi->master->setup(spi);
164
165 pr_info("Simple test 7: write 0xAA byte, read back garbage byte "
166 "in 16bit bus mode\n");
167 status = spi_w8r8(spi, 0xAA);
168 if (status == -EIO)
169 pr_info("Simple test 7: SUCCESS! (expected failure with "
170 "status EIO)\n");
171 else if (status < 0)
172 pr_warning("Siple test 7: FAILURE: spi_write_then_read "
173 "failed with status %d\n", status);
174 else
175 pr_warning("Siple test 7: FAILURE: spi_write_then_read "
176 "succeeded but it was expected to fail!\n");
177
178 pr_info("Simple test 8: write 8 bytes, read back 8 bytes garbage "
179 "in 16bit mode (full FIFO)\n");
180 status = spi_write_then_read(spi, &txbuf[0], 8, &rxbuf[0], 8);
181 if (status < 0)
182 pr_warning("Simple test 8: FAILURE: spi_write_then_read() "
183 "failed with status %d\n", status);
184 else
185 pr_info("Simple test 8: SUCCESS!\n");
186
187 pr_info("Simple test 9: write 14 bytes, read back 14 bytes garbage "
188 "in 16bit mode (see if we overflow FIFO)\n");
189 status = spi_write_then_read(spi, &txbuf[0], 14, &rxbuf[0], 14);
190 if (status < 0)
191 pr_warning("Simple test 9: FAILURE: failed with status %d "
192 "(probably FIFO overrun)\n", status);
193 else
194 pr_info("Simple test 9: SUCCESS!\n");
195
196 pr_info("Simple test 10: write %d bytes with spi_write(), "
197 "read %d bytes garbage with spi_read() in 16bit mode\n",
198 DMA_TEST_SIZE, DMA_TEST_SIZE);
199 status = spi_write(spi, &bigtxbuf_virtual[0], DMA_TEST_SIZE);
200 if (status < 0)
201 pr_warning("Simple test 10 step 1: FAILURE: spi_write() "
202 "failed with status %d (probably FIFO overrun)\n",
203 status);
204 else
205 pr_info("Simple test 10 step 1: SUCCESS!\n");
206
207 status = spi_read(spi, &bigrxbuf_virtual[0], DMA_TEST_SIZE);
208 if (status < 0)
209 pr_warning("Simple test 10 step 2: FAILURE: spi_read() "
210 "failed with status %d (probably FIFO overrun)\n",
211 status);
212 else
213 pr_info("Simple test 10: SUCCESS!\n");
214
215 status = sprintf(buf, "loop test complete\n");
216 kfree(bigrxbuf_virtual);
217 kfree(bigtxbuf_virtual);
218 out:
219 mutex_unlock(&p_dummy->lock);
220 return status;
221}
222
223static DEVICE_ATTR(looptest, S_IRUGO, dummy_looptest, NULL);
224
225static int __devinit pl022_dummy_probe(struct spi_device *spi)
226{
227 struct dummy *p_dummy;
228 int status;
229
230 dev_info(&spi->dev, "probing dummy SPI device\n");
231
232 p_dummy = kzalloc(sizeof *p_dummy, GFP_KERNEL);
233 if (!p_dummy)
234 return -ENOMEM;
235
236 dev_set_drvdata(&spi->dev, p_dummy);
237 mutex_init(&p_dummy->lock);
238
239 /* sysfs hook */
240 status = device_create_file(&spi->dev, &dev_attr_looptest);
241 if (status) {
242 dev_dbg(&spi->dev, "device_create_file looptest failure.\n");
243 goto out_dev_create_looptest_failed;
244 }
245
246 return 0;
247
248out_dev_create_looptest_failed:
249 dev_set_drvdata(&spi->dev, NULL);
250 kfree(p_dummy);
251 return status;
252}
253
254static int __devexit pl022_dummy_remove(struct spi_device *spi)
255{
256 struct dummy *p_dummy = dev_get_drvdata(&spi->dev);
257
258 dev_info(&spi->dev, "removing dummy SPI device\n");
259 device_remove_file(&spi->dev, &dev_attr_looptest);
260 dev_set_drvdata(&spi->dev, NULL);
261 kfree(p_dummy);
262
263 return 0;
264}
265
266static struct spi_driver pl022_dummy_driver = {
267 .driver = {
268 .name = "spi-dummy",
269 .owner = THIS_MODULE,
270 },
271 .probe = pl022_dummy_probe,
272 .remove = __devexit_p(pl022_dummy_remove),
273};
274
275static int __init pl022_init_dummy(void)
276{
277 return spi_register_driver(&pl022_dummy_driver);
278}
279
280static void __exit pl022_exit_dummy(void)
281{
282 spi_unregister_driver(&pl022_dummy_driver);
283}
284
285module_init(pl022_init_dummy);
286module_exit(pl022_exit_dummy);
287
288MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
289MODULE_DESCRIPTION("PL022 SSP/SPI DUMMY Linux driver");
290MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-u300/gpio.c b/arch/arm/mach-u300/gpio.c
index 308cdb197a92..63c8f27fb15a 100644
--- a/arch/arm/mach-u300/gpio.c
+++ b/arch/arm/mach-u300/gpio.c
@@ -25,11 +25,6 @@
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/gpio.h> 26#include <linux/gpio.h>
27 27
28/* Need access to SYSCON registers for PADmuxing */
29#include <mach/syscon.h>
30
31#include "padmux.h"
32
33/* Reference to GPIO block clock */ 28/* Reference to GPIO block clock */
34static struct clk *clk; 29static struct clk *clk;
35 30
@@ -606,14 +601,6 @@ static int __init gpio_probe(struct platform_device *pdev)
606 writel(U300_GPIO_CR_BLOCK_CLKRQ_ENABLE, virtbase + U300_GPIO_CR); 601 writel(U300_GPIO_CR_BLOCK_CLKRQ_ENABLE, virtbase + U300_GPIO_CR);
607#endif 602#endif
608 603
609 /* Set up some padmuxing here */
610#ifdef CONFIG_MMC
611 pmx_set_mission_mode_mmc();
612#endif
613#ifdef CONFIG_SPI_PL022
614 pmx_set_mission_mode_spi();
615#endif
616
617 gpio_set_initial_values(); 604 gpio_set_initial_values();
618 605
619 for (num_irqs = 0 ; num_irqs < U300_GPIO_NUM_PORTS; num_irqs++) { 606 for (num_irqs = 0 ; num_irqs < U300_GPIO_NUM_PORTS; num_irqs++) {
diff --git a/arch/arm/mach-u300/i2c.c b/arch/arm/mach-u300/i2c.c
new file mode 100644
index 000000000000..10be1f888b27
--- /dev/null
+++ b/arch/arm/mach-u300/i2c.c
@@ -0,0 +1,43 @@
1/*
2 * arch/arm/mach-u300/i2c.c
3 *
4 * Copyright (C) 2009 ST-Ericsson AB
5 * License terms: GNU General Public License (GPL) version 2
6 *
7 * Register board i2c devices
8 * Author: Linus Walleij <linus.walleij@stericsson.com>
9 */
10#include <linux/kernel.h>
11#include <linux/i2c.h>
12#include <mach/irqs.h>
13
14static struct i2c_board_info __initdata bus0_i2c_board_info[] = {
15 {
16 .type = "ab3100",
17 .addr = 0x48,
18 .irq = IRQ_U300_IRQ0_EXT,
19 },
20};
21
22static struct i2c_board_info __initdata bus1_i2c_board_info[] = {
23#ifdef CONFIG_MACH_U300_BS335
24 {
25 .type = "fwcam",
26 .addr = 0x10,
27 },
28 {
29 .type = "fwcam",
30 .addr = 0x5d,
31 },
32#else
33 { },
34#endif
35};
36
37void __init u300_i2c_register_board_devices(void)
38{
39 i2c_register_board_info(0, bus0_i2c_board_info,
40 ARRAY_SIZE(bus0_i2c_board_info));
41 i2c_register_board_info(1, bus1_i2c_board_info,
42 ARRAY_SIZE(bus1_i2c_board_info));
43}
diff --git a/arch/arm/mach-u300/i2c.h b/arch/arm/mach-u300/i2c.h
new file mode 100644
index 000000000000..485c02e5c06d
--- /dev/null
+++ b/arch/arm/mach-u300/i2c.h
@@ -0,0 +1,23 @@
1/*
2 * arch/arm/mach-u300/i2c.h
3 *
4 * Copyright (C) 2009 ST-Ericsson AB
5 * License terms: GNU General Public License (GPL) version 2
6 *
7 * Register board i2c devices
8 * Author: Linus Walleij <linus.walleij@stericsson.com>
9 */
10
11#ifndef MACH_U300_I2C_H
12#define MACH_U300_I2C_H
13
14#ifdef CONFIG_I2C_STU300
15void __init u300_i2c_register_board_devices(void);
16#else
17/* Compile out this stuff if no I2C adapter is available */
18static inline void __init u300_i2c_register_board_devices(void)
19{
20}
21#endif
22
23#endif
diff --git a/arch/arm/mach-u300/include/mach/syscon.h b/arch/arm/mach-u300/include/mach/syscon.h
index 1c90d1b1ccb6..7444f5c7da97 100644
--- a/arch/arm/mach-u300/include/mach/syscon.h
+++ b/arch/arm/mach-u300/include/mach/syscon.h
@@ -240,8 +240,13 @@
240#define U300_SYSCON_PMC1LR_CDI_MASK (0xC000) 240#define U300_SYSCON_PMC1LR_CDI_MASK (0xC000)
241#define U300_SYSCON_PMC1LR_CDI_CDI (0x0000) 241#define U300_SYSCON_PMC1LR_CDI_CDI (0x0000)
242#define U300_SYSCON_PMC1LR_CDI_EMIF (0x4000) 242#define U300_SYSCON_PMC1LR_CDI_EMIF (0x4000)
243#ifdef CONFIG_MACH_U300_BS335
244#define U300_SYSCON_PMC1LR_CDI_CDI2 (0x8000)
245#define U300_SYSCON_PMC1LR_CDI_WCDMA_APP_GPIO (0xC000)
246#elif CONFIG_MACH_U300_BS365
243#define U300_SYSCON_PMC1LR_CDI_GPIO (0x8000) 247#define U300_SYSCON_PMC1LR_CDI_GPIO (0x8000)
244#define U300_SYSCON_PMC1LR_CDI_WCDMA (0xC000) 248#define U300_SYSCON_PMC1LR_CDI_WCDMA (0xC000)
249#endif
245#define U300_SYSCON_PMC1LR_PDI_MASK (0x3000) 250#define U300_SYSCON_PMC1LR_PDI_MASK (0x3000)
246#define U300_SYSCON_PMC1LR_PDI_PDI (0x0000) 251#define U300_SYSCON_PMC1LR_PDI_PDI (0x0000)
247#define U300_SYSCON_PMC1LR_PDI_EGG (0x1000) 252#define U300_SYSCON_PMC1LR_PDI_EGG (0x1000)
@@ -345,19 +350,69 @@
345#define U300_SYSCON_MMCR_MASK (0x0003) 350#define U300_SYSCON_MMCR_MASK (0x0003)
346#define U300_SYSCON_MMCR_MMC_FB_CLK_SEL_ENABLE (0x0002) 351#define U300_SYSCON_MMCR_MMC_FB_CLK_SEL_ENABLE (0x0002)
347#define U300_SYSCON_MMCR_MSPRO_FREQSEL_ENABLE (0x0001) 352#define U300_SYSCON_MMCR_MSPRO_FREQSEL_ENABLE (0x0001)
348 353/* Pull up/down control (R/W) */
354#define U300_SYSCON_PUCR (0x104)
355#define U300_SYSCON_PUCR_EMIF_1_WAIT_N_PU_ENABLE (0x0200)
356#define U300_SYSCON_PUCR_EMIF_1_NFIF_READY_PU_ENABLE (0x0100)
357#define U300_SYSCON_PUCR_EMIF_1_16BIT_PU_ENABLE (0x0080)
358#define U300_SYSCON_PUCR_EMIF_1_8BIT_PU_ENABLE (0x0040)
359#define U300_SYSCON_PUCR_KEY_IN_PU_EN_MASK (0x003F)
360/* Padmux 2 control */
361#define U300_SYSCON_PMC2R (0x100)
362#define U300_SYSCON_PMC2R_APP_MISC_0_MASK (0x00C0)
363#define U300_SYSCON_PMC2R_APP_MISC_0_APP_GPIO (0x0000)
364#define U300_SYSCON_PMC2R_APP_MISC_0_EMIF_SDRAM (0x0040)
365#define U300_SYSCON_PMC2R_APP_MISC_0_MMC (0x0080)
366#define U300_SYSCON_PMC2R_APP_MISC_0_CDI2 (0x00C0)
367#define U300_SYSCON_PMC2R_APP_MISC_1_MASK (0x0300)
368#define U300_SYSCON_PMC2R_APP_MISC_1_APP_GPIO (0x0000)
369#define U300_SYSCON_PMC2R_APP_MISC_1_EMIF_SDRAM (0x0100)
370#define U300_SYSCON_PMC2R_APP_MISC_1_MMC (0x0200)
371#define U300_SYSCON_PMC2R_APP_MISC_1_CDI2 (0x0300)
372#define U300_SYSCON_PMC2R_APP_MISC_2_MASK (0x0C00)
373#define U300_SYSCON_PMC2R_APP_MISC_2_APP_GPIO (0x0000)
374#define U300_SYSCON_PMC2R_APP_MISC_2_EMIF_SDRAM (0x0400)
375#define U300_SYSCON_PMC2R_APP_MISC_2_MMC (0x0800)
376#define U300_SYSCON_PMC2R_APP_MISC_2_CDI2 (0x0C00)
377#define U300_SYSCON_PMC2R_APP_MISC_3_MASK (0x3000)
378#define U300_SYSCON_PMC2R_APP_MISC_3_APP_GPIO (0x0000)
379#define U300_SYSCON_PMC2R_APP_MISC_3_EMIF_SDRAM (0x1000)
380#define U300_SYSCON_PMC2R_APP_MISC_3_MMC (0x2000)
381#define U300_SYSCON_PMC2R_APP_MISC_3_CDI2 (0x3000)
382#define U300_SYSCON_PMC2R_APP_MISC_4_MASK (0xC000)
383#define U300_SYSCON_PMC2R_APP_MISC_4_APP_GPIO (0x0000)
384#define U300_SYSCON_PMC2R_APP_MISC_4_EMIF_SDRAM (0x4000)
385#define U300_SYSCON_PMC2R_APP_MISC_4_MMC (0x8000)
386#define U300_SYSCON_PMC2R_APP_MISC_4_ACC_GPIO (0xC000)
349/* TODO: More SYSCON registers missing */ 387/* TODO: More SYSCON registers missing */
350#define U300_SYSCON_PMC3R (0x10c) 388#define U300_SYSCON_PMC3R (0x10c)
351#define U300_SYSCON_PMC3R_APP_MISC_11_MASK (0xc000) 389#define U300_SYSCON_PMC3R_APP_MISC_11_MASK (0xc000)
352#define U300_SYSCON_PMC3R_APP_MISC_11_SPI (0x4000) 390#define U300_SYSCON_PMC3R_APP_MISC_11_SPI (0x4000)
353#define U300_SYSCON_PMC3R_APP_MISC_10_MASK (0x3000) 391#define U300_SYSCON_PMC3R_APP_MISC_10_MASK (0x3000)
354#define U300_SYSCON_PMC3R_APP_MISC_10_SPI (0x1000) 392#define U300_SYSCON_PMC3R_APP_MISC_10_SPI (0x1000)
355/* TODO: Missing other configs, I just added the SPI stuff */ 393/* TODO: Missing other configs */
356 394#define U300_SYSCON_PMC4R (0x168)
395#define U300_SYSCON_PMC4R_APP_MISC_12_MASK (0x0003)
396#define U300_SYSCON_PMC4R_APP_MISC_12_APP_GPIO (0x0000)
397#define U300_SYSCON_PMC4R_APP_MISC_13_MASK (0x000C)
398#define U300_SYSCON_PMC4R_APP_MISC_13_CDI (0x0000)
399#define U300_SYSCON_PMC4R_APP_MISC_13_SMIA (0x0004)
400#define U300_SYSCON_PMC4R_APP_MISC_13_SMIA2 (0x0008)
401#define U300_SYSCON_PMC4R_APP_MISC_13_APP_GPIO (0x000C)
402#define U300_SYSCON_PMC4R_APP_MISC_14_MASK (0x0030)
403#define U300_SYSCON_PMC4R_APP_MISC_14_CDI (0x0000)
404#define U300_SYSCON_PMC4R_APP_MISC_14_SMIA (0x0010)
405#define U300_SYSCON_PMC4R_APP_MISC_14_CDI2 (0x0020)
406#define U300_SYSCON_PMC4R_APP_MISC_14_APP_GPIO (0x0030)
407#define U300_SYSCON_PMC4R_APP_MISC_16_MASK (0x0300)
408#define U300_SYSCON_PMC4R_APP_MISC_16_APP_GPIO_13 (0x0000)
409#define U300_SYSCON_PMC4R_APP_MISC_16_APP_UART1_CTS (0x0100)
410#define U300_SYSCON_PMC4R_APP_MISC_16_EMIF_1_STATIC_CS5_N (0x0200)
357/* SYS_0_CLK_CONTROL first clock control 16bit (R/W) */ 411/* SYS_0_CLK_CONTROL first clock control 16bit (R/W) */
358#define U300_SYSCON_S0CCR (0x120) 412#define U300_SYSCON_S0CCR (0x120)
359#define U300_SYSCON_S0CCR_FIELD_MASK (0x43FF) 413#define U300_SYSCON_S0CCR_FIELD_MASK (0x43FF)
360#define U300_SYSCON_S0CCR_CLOCK_REQ (0x4000) 414#define U300_SYSCON_S0CCR_CLOCK_REQ (0x4000)
415#define U300_SYSCON_S0CCR_CLOCK_REQ_MONITOR (0x2000)
361#define U300_SYSCON_S0CCR_CLOCK_INV (0x0200) 416#define U300_SYSCON_S0CCR_CLOCK_INV (0x0200)
362#define U300_SYSCON_S0CCR_CLOCK_FREQ_MASK (0x01E0) 417#define U300_SYSCON_S0CCR_CLOCK_FREQ_MASK (0x01E0)
363#define U300_SYSCON_S0CCR_CLOCK_SELECT_MASK (0x001E) 418#define U300_SYSCON_S0CCR_CLOCK_SELECT_MASK (0x001E)
@@ -375,6 +430,7 @@
375#define U300_SYSCON_S1CCR (0x124) 430#define U300_SYSCON_S1CCR (0x124)
376#define U300_SYSCON_S1CCR_FIELD_MASK (0x43FF) 431#define U300_SYSCON_S1CCR_FIELD_MASK (0x43FF)
377#define U300_SYSCON_S1CCR_CLOCK_REQ (0x4000) 432#define U300_SYSCON_S1CCR_CLOCK_REQ (0x4000)
433#define U300_SYSCON_S1CCR_CLOCK_REQ_MONITOR (0x2000)
378#define U300_SYSCON_S1CCR_CLOCK_INV (0x0200) 434#define U300_SYSCON_S1CCR_CLOCK_INV (0x0200)
379#define U300_SYSCON_S1CCR_CLOCK_FREQ_MASK (0x01E0) 435#define U300_SYSCON_S1CCR_CLOCK_FREQ_MASK (0x01E0)
380#define U300_SYSCON_S1CCR_CLOCK_SELECT_MASK (0x001E) 436#define U300_SYSCON_S1CCR_CLOCK_SELECT_MASK (0x001E)
@@ -393,6 +449,7 @@
393#define U300_SYSCON_S2CCR_FIELD_MASK (0xC3FF) 449#define U300_SYSCON_S2CCR_FIELD_MASK (0xC3FF)
394#define U300_SYSCON_S2CCR_CLK_STEAL (0x8000) 450#define U300_SYSCON_S2CCR_CLK_STEAL (0x8000)
395#define U300_SYSCON_S2CCR_CLOCK_REQ (0x4000) 451#define U300_SYSCON_S2CCR_CLOCK_REQ (0x4000)
452#define U300_SYSCON_S2CCR_CLOCK_REQ_MONITOR (0x2000)
396#define U300_SYSCON_S2CCR_CLOCK_INV (0x0200) 453#define U300_SYSCON_S2CCR_CLOCK_INV (0x0200)
397#define U300_SYSCON_S2CCR_CLOCK_FREQ_MASK (0x01E0) 454#define U300_SYSCON_S2CCR_CLOCK_FREQ_MASK (0x01E0)
398#define U300_SYSCON_S2CCR_CLOCK_SELECT_MASK (0x001E) 455#define U300_SYSCON_S2CCR_CLOCK_SELECT_MASK (0x001E)
@@ -425,6 +482,44 @@
425#define U300_SYSCON_MCR_PMGEN_CR_0_EMIF_0_SDRAM (0x000C) 482#define U300_SYSCON_MCR_PMGEN_CR_0_EMIF_0_SDRAM (0x000C)
426#define U300_SYSCON_MCR_PM1G_MODE_ENABLE (0x0002) 483#define U300_SYSCON_MCR_PM1G_MODE_ENABLE (0x0002)
427#define U300_SYSCON_MCR_PMTG5_MODE_ENABLE (0x0001) 484#define U300_SYSCON_MCR_PMTG5_MODE_ENABLE (0x0001)
485/* SC_PLL_IRQ_CONTROL 16bit (R/W) */
486#define U300_SYSCON_PICR (0x0130)
487#define U300_SYSCON_PICR_MASK (0x00FF)
488#define U300_SYSCON_PICR_FORCE_PLL208_LOCK_LOW_ENABLE (0x0080)
489#define U300_SYSCON_PICR_FORCE_PLL208_LOCK_HIGH_ENABLE (0x0040)
490#define U300_SYSCON_PICR_FORCE_PLL13_LOCK_LOW_ENABLE (0x0020)
491#define U300_SYSCON_PICR_FORCE_PLL13_LOCK_HIGH_ENABLE (0x0010)
492#define U300_SYSCON_PICR_IRQMASK_PLL13_UNLOCK_ENABLE (0x0008)
493#define U300_SYSCON_PICR_IRQMASK_PLL13_LOCK_ENABLE (0x0004)
494#define U300_SYSCON_PICR_IRQMASK_PLL208_UNLOCK_ENABLE (0x0002)
495#define U300_SYSCON_PICR_IRQMASK_PLL208_LOCK_ENABLE (0x0001)
496/* SC_PLL_IRQ_STATUS 16 bit (R/-) */
497#define U300_SYSCON_PISR (0x0134)
498#define U300_SYSCON_PISR_MASK (0x000F)
499#define U300_SYSCON_PISR_PLL13_UNLOCK_IND (0x0008)
500#define U300_SYSCON_PISR_PLL13_LOCK_IND (0x0004)
501#define U300_SYSCON_PISR_PLL208_UNLOCK_IND (0x0002)
502#define U300_SYSCON_PISR_PLL208_LOCK_IND (0x0001)
503/* SC_PLL_IRQ_CLEAR 16 bit (-/W) */
504#define U300_SYSCON_PICLR (0x0138)
505#define U300_SYSCON_PICLR_MASK (0x000F)
506#define U300_SYSCON_PICLR_RWMASK (0x0000)
507#define U300_SYSCON_PICLR_PLL13_UNLOCK_SC (0x0008)
508#define U300_SYSCON_PICLR_PLL13_LOCK_SC (0x0004)
509#define U300_SYSCON_PICLR_PLL208_UNLOCK_SC (0x0002)
510#define U300_SYSCON_PICLR_PLL208_LOCK_SC (0x0001)
511/* CAMIF_CONTROL 16 bit (-/W) */
512#define U300_SYSCON_CICR (0x013C)
513#define U300_SYSCON_CICR_MASK (0x0FFF)
514#define U300_SYSCON_CICR_APP_SUBLVDS_TESTMODE_MASK (0x0F00)
515#define U300_SYSCON_CICR_APP_SUBLVDS_TESTMODE_PORT1 (0x0C00)
516#define U300_SYSCON_CICR_APP_SUBLVDS_TESTMODE_PORT0 (0x0300)
517#define U300_SYSCON_CICR_APP_SUBLVDS_RESCON_MASK (0x00F0)
518#define U300_SYSCON_CICR_APP_SUBLVDS_RESCON_PORT1 (0x00C0)
519#define U300_SYSCON_CICR_APP_SUBLVDS_RESCON_PORT0 (0x0030)
520#define U300_SYSCON_CICR_APP_SUBLVDS_PWR_DWN_N_MASK (0x000F)
521#define U300_SYSCON_CICR_APP_SUBLVDS_PWR_DWN_N_PORT1 (0x000C)
522#define U300_SYSCON_CICR_APP_SUBLVDS_PWR_DWN_N_PORT0 (0x0003)
428/* Clock activity observability register 0 */ 523/* Clock activity observability register 0 */
429#define U300_SYSCON_C0OAR (0x140) 524#define U300_SYSCON_C0OAR (0x140)
430#define U300_SYSCON_C0OAR_MASK (0xFFFF) 525#define U300_SYSCON_C0OAR_MASK (0xFFFF)
@@ -513,7 +608,7 @@
513/** 608/**
514 * CPU medium frequency in MHz 609 * CPU medium frequency in MHz
515 */ 610 */
516#define SYSCON_CPU_CLOCK_MEDIUM 104 611#define SYSCON_CPU_CLOCK_MEDIUM 52
517/** 612/**
518 * CPU low frequency in MHz 613 * CPU low frequency in MHz
519 */ 614 */
@@ -527,7 +622,7 @@
527/** 622/**
528 * EMIF medium frequency in MHz 623 * EMIF medium frequency in MHz
529 */ 624 */
530#define SYSCON_EMIF_CLOCK_MEDIUM 104 625#define SYSCON_EMIF_CLOCK_MEDIUM 52
531/** 626/**
532 * EMIF low frequency in MHz 627 * EMIF low frequency in MHz
533 */ 628 */
@@ -541,7 +636,7 @@
541/** 636/**
542 * AHB medium frequency in MHz 637 * AHB medium frequency in MHz
543 */ 638 */
544#define SYSCON_AHB_CLOCK_MEDIUM 52 639#define SYSCON_AHB_CLOCK_MEDIUM 26
545/** 640/**
546 * AHB low frequency in MHz 641 * AHB low frequency in MHz
547 */ 642 */
@@ -553,6 +648,15 @@ enum syscon_busmaster {
553 SYSCON_BM_VIDEO_ENC 648 SYSCON_BM_VIDEO_ENC
554}; 649};
555 650
651/* Selectr a resistor or a set of resistors */
652enum syscon_pull_up_down {
653 SYSCON_PU_KEY_IN_EN,
654 SYSCON_PU_EMIF_1_8_BIT_EN,
655 SYSCON_PU_EMIF_1_16_BIT_EN,
656 SYSCON_PU_EMIF_1_NFIF_READY_EN,
657 SYSCON_PU_EMIF_1_NFIF_WAIT_N_EN,
658};
659
556/* 660/*
557 * Note that this array must match the order of the array "clk_reg" 661 * Note that this array must match the order of the array "clk_reg"
558 * in syscon.c 662 * in syscon.c
@@ -575,6 +679,7 @@ enum syscon_clk {
575 SYSCON_CLKCONTROL_SPI, 679 SYSCON_CLKCONTROL_SPI,
576 SYSCON_CLKCONTROL_I2S0_CORE, 680 SYSCON_CLKCONTROL_I2S0_CORE,
577 SYSCON_CLKCONTROL_I2S1_CORE, 681 SYSCON_CLKCONTROL_I2S1_CORE,
682 SYSCON_CLKCONTROL_UART1,
578 SYSCON_CLKCONTROL_AAIF, 683 SYSCON_CLKCONTROL_AAIF,
579 SYSCON_CLKCONTROL_AHB, 684 SYSCON_CLKCONTROL_AHB,
580 SYSCON_CLKCONTROL_APEX, 685 SYSCON_CLKCONTROL_APEX,
@@ -604,7 +709,8 @@ enum syscon_sysclk_mode {
604 709
605enum syscon_sysclk_req { 710enum syscon_sysclk_req {
606 SYSCON_SYSCLKREQ_DISABLED, 711 SYSCON_SYSCLKREQ_DISABLED,
607 SYSCON_SYSCLKREQ_ACTIVE_LOW 712 SYSCON_SYSCLKREQ_ACTIVE_LOW,
713 SYSCON_SYSCLKREQ_MONITOR
608}; 714};
609 715
610enum syscon_clk_mode { 716enum syscon_clk_mode {
diff --git a/arch/arm/mach-u300/mmc.c b/arch/arm/mach-u300/mmc.c
index 089b9957b6a4..82af247760e6 100644
--- a/arch/arm/mach-u300/mmc.c
+++ b/arch/arm/mach-u300/mmc.c
@@ -22,6 +22,7 @@
22 22
23#include <asm/mach/mmc.h> 23#include <asm/mach/mmc.h>
24#include "mmc.h" 24#include "mmc.h"
25#include "padmux.h"
25 26
26struct mmci_card_event { 27struct mmci_card_event {
27 struct input_dev *mmc_input; 28 struct input_dev *mmc_input;
@@ -146,6 +147,7 @@ int __devinit mmc_init(struct amba_device *adev)
146{ 147{
147 struct mmci_card_event *mmci_card; 148 struct mmci_card_event *mmci_card;
148 struct device *mmcsd_device = &adev->dev; 149 struct device *mmcsd_device = &adev->dev;
150 struct pmx *pmx;
149 int ret = 0; 151 int ret = 0;
150 152
151 mmci_card = kzalloc(sizeof(struct mmci_card_event), GFP_KERNEL); 153 mmci_card = kzalloc(sizeof(struct mmci_card_event), GFP_KERNEL);
@@ -209,6 +211,20 @@ int __devinit mmc_init(struct amba_device *adev)
209 211
210 input_set_drvdata(mmci_card->mmc_input, mmci_card); 212 input_set_drvdata(mmci_card->mmc_input, mmci_card);
211 213
214 /*
215 * Setup padmuxing for MMC. Since this must always be
216 * compiled into the kernel, pmx is never released.
217 */
218 pmx = pmx_get(mmcsd_device, U300_APP_PMX_MMC_SETTING);
219
220 if (IS_ERR(pmx))
221 pr_warning("Could not get padmux handle\n");
222 else {
223 ret = pmx_activate(mmcsd_device, pmx);
224 if (IS_ERR_VALUE(ret))
225 pr_warning("Could not activate padmuxing\n");
226 }
227
212 ret = gpio_register_callback(U300_GPIO_PIN_MMC_CD, mmci_callback, 228 ret = gpio_register_callback(U300_GPIO_PIN_MMC_CD, mmci_callback,
213 mmci_card); 229 mmci_card);
214 230
diff --git a/arch/arm/mach-u300/padmux.c b/arch/arm/mach-u300/padmux.c
index f3664564f086..4c93c6cefd37 100644
--- a/arch/arm/mach-u300/padmux.c
+++ b/arch/arm/mach-u300/padmux.c
@@ -6,53 +6,362 @@
6 * Copyright (C) 2009 ST-Ericsson AB 6 * Copyright (C) 2009 ST-Ericsson AB
7 * License terms: GNU General Public License (GPL) version 2 7 * License terms: GNU General Public License (GPL) version 2
8 * U300 PADMUX functions 8 * U300 PADMUX functions
9 * Author: Linus Walleij <linus.walleij@stericsson.com> 9 * Author: Martin Persson <martin.persson@stericsson.com>
10 *
11 */ 10 */
12#include <linux/io.h> 11
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/device.h>
13#include <linux/err.h> 15#include <linux/err.h>
16#include <linux/errno.h>
17#include <linux/io.h>
18#include <linux/mutex.h>
19#include <linux/string.h>
20#include <linux/bug.h>
21#include <linux/debugfs.h>
22#include <linux/seq_file.h>
14#include <mach/u300-regs.h> 23#include <mach/u300-regs.h>
15#include <mach/syscon.h> 24#include <mach/syscon.h>
16
17#include "padmux.h" 25#include "padmux.h"
18 26
19/* Set the PAD MUX to route the MMC reader correctly to GPIO0. */ 27static DEFINE_MUTEX(pmx_mutex);
20void pmx_set_mission_mode_mmc(void) 28
21{ 29const u32 pmx_registers[] = {
22 u16 val; 30 (U300_SYSCON_VBASE + U300_SYSCON_PMC1LR),
23 31 (U300_SYSCON_VBASE + U300_SYSCON_PMC1HR),
24 val = readw(U300_SYSCON_VBASE + U300_SYSCON_PMC1LR); 32 (U300_SYSCON_VBASE + U300_SYSCON_PMC2R),
25 val &= ~U300_SYSCON_PMC1LR_MMCSD_MASK; 33 (U300_SYSCON_VBASE + U300_SYSCON_PMC3R),
26 writew(val, U300_SYSCON_VBASE + U300_SYSCON_PMC1LR); 34 (U300_SYSCON_VBASE + U300_SYSCON_PMC4R)
27 val = readw(U300_SYSCON_VBASE + U300_SYSCON_PMC1HR); 35};
28 val &= ~U300_SYSCON_PMC1HR_APP_GPIO_1_MASK; 36
29 val |= U300_SYSCON_PMC1HR_APP_GPIO_1_MMC; 37/* High level functionality */
30 writew(val, U300_SYSCON_VBASE + U300_SYSCON_PMC1HR); 38
31} 39/* Lazy dog:
32 40 * onmask = {
33void pmx_set_mission_mode_spi(void) 41 * {"PMC1LR" mask, "PMC1LR" value},
34{ 42 * {"PMC1HR" mask, "PMC1HR" value},
35 u16 val; 43 * {"PMC2R" mask, "PMC2R" value},
36 44 * {"PMC3R" mask, "PMC3R" value},
37 /* Set up padmuxing so the SPI port and its chipselects are active */ 45 * {"PMC4R" mask, "PMC4R" value}
38 val = readw(U300_SYSCON_VBASE + U300_SYSCON_PMC1HR); 46 * }
39 /* 47 */
40 * Activate the SPI port (disable the use of these pins for generic 48static struct pmx mmc_setting = {
41 * GPIO, DSP, AAIF 49 .setting = U300_APP_PMX_MMC_SETTING,
42 */ 50 .default_on = false,
43 val &= ~U300_SYSCON_PMC1HR_APP_SPI_2_MASK; 51 .activated = false,
44 val |= U300_SYSCON_PMC1HR_APP_SPI_2_SPI; 52 .name = "MMC",
45 /* 53 .onmask = {
46 * Use GPIO pin SPI CS1 for CS1 actually (it can be used for other 54 {U300_SYSCON_PMC1LR_MMCSD_MASK,
47 * things also) 55 U300_SYSCON_PMC1LR_MMCSD_MMCSD},
48 */ 56 {0, 0},
49 val &= ~U300_SYSCON_PMC1HR_APP_SPI_CS_1_MASK; 57 {0, 0},
50 val |= U300_SYSCON_PMC1HR_APP_SPI_CS_1_SPI; 58 {0, 0},
51 /* 59 {U300_SYSCON_PMC4R_APP_MISC_12_MASK,
52 * Use GPIO pin SPI CS2 for CS2 actually (it can be used for other 60 U300_SYSCON_PMC4R_APP_MISC_12_APP_GPIO}
53 * things also) 61 },
54 */ 62};
55 val &= ~U300_SYSCON_PMC1HR_APP_SPI_CS_2_MASK; 63
56 val |= U300_SYSCON_PMC1HR_APP_SPI_CS_2_SPI; 64static struct pmx spi_setting = {
57 writew(val, U300_SYSCON_VBASE + U300_SYSCON_PMC1HR); 65 .setting = U300_APP_PMX_SPI_SETTING,
66 .default_on = false,
67 .activated = false,
68 .name = "SPI",
69 .onmask = {{0, 0},
70 {U300_SYSCON_PMC1HR_APP_SPI_2_MASK |
71 U300_SYSCON_PMC1HR_APP_SPI_CS_1_MASK |
72 U300_SYSCON_PMC1HR_APP_SPI_CS_2_MASK,
73 U300_SYSCON_PMC1HR_APP_SPI_2_SPI |
74 U300_SYSCON_PMC1HR_APP_SPI_CS_1_SPI |
75 U300_SYSCON_PMC1HR_APP_SPI_CS_2_SPI},
76 {0, 0},
77 {0, 0},
78 {0, 0}
79 },
80};
81
82/* Available padmux settings */
83static struct pmx *pmx_settings[] = {
84 &mmc_setting,
85 &spi_setting,
86};
87
88static void update_registers(struct pmx *pmx, bool activate)
89{
90 u16 regval, val, mask;
91 int i;
92
93 for (i = 0; i < ARRAY_SIZE(pmx_registers); i++) {
94 if (activate)
95 val = pmx->onmask[i].val;
96 else
97 val = 0;
98
99 mask = pmx->onmask[i].mask;
100 if (mask != 0) {
101 regval = readw(pmx_registers[i]);
102 regval &= ~mask;
103 regval |= val;
104 writew(regval, pmx_registers[i]);
105 }
106 }
107}
108
109struct pmx *pmx_get(struct device *dev, enum pmx_settings setting)
110{
111 int i;
112 struct pmx *pmx = ERR_PTR(-ENOENT);
113
114 if (dev == NULL)
115 return ERR_PTR(-EINVAL);
116
117 mutex_lock(&pmx_mutex);
118 for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
119
120 if (setting == pmx_settings[i]->setting) {
121
122 if (pmx_settings[i]->dev != NULL) {
123 WARN(1, "padmux: required setting "
124 "in use by another consumer\n");
125 } else {
126 pmx = pmx_settings[i];
127 pmx->dev = dev;
128 dev_dbg(dev, "padmux: setting nr %d is now "
129 "bound to %s and ready to use\n",
130 setting, dev_name(dev));
131 break;
132 }
133 }
134 }
135 mutex_unlock(&pmx_mutex);
136
137 return pmx;
138}
139EXPORT_SYMBOL(pmx_get);
140
141int pmx_put(struct device *dev, struct pmx *pmx)
142{
143 int i;
144 int ret = -ENOENT;
145
146 if (pmx == NULL || dev == NULL)
147 return -EINVAL;
148
149 mutex_lock(&pmx_mutex);
150 for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
151
152 if (pmx->setting == pmx_settings[i]->setting) {
153
154 if (dev != pmx->dev) {
155 WARN(1, "padmux: cannot release handle as "
156 "it is bound to another consumer\n");
157 ret = -EINVAL;
158 break;
159 } else {
160 pmx_settings[i]->dev = NULL;
161 ret = 0;
162 break;
163 }
164 }
165 }
166 mutex_unlock(&pmx_mutex);
167
168 return ret;
169}
170EXPORT_SYMBOL(pmx_put);
171
172int pmx_activate(struct device *dev, struct pmx *pmx)
173{
174 int i, j, ret;
175 ret = 0;
176
177 if (pmx == NULL || dev == NULL)
178 return -EINVAL;
179
180 mutex_lock(&pmx_mutex);
181
182 /* Make sure the required bits are not used */
183 for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
184
185 if (pmx_settings[i]->dev == NULL || pmx_settings[i] == pmx)
186 continue;
187
188 for (j = 0; j < ARRAY_SIZE(pmx_registers); j++) {
189
190 if (pmx_settings[i]->onmask[j].mask & pmx->
191 onmask[j].mask) {
192 /* More than one entry on the same bits */
193 WARN(1, "padmux: cannot activate "
194 "setting. Bit conflict with "
195 "an active setting\n");
196
197 ret = -EUSERS;
198 goto exit;
199 }
200 }
201 }
202 update_registers(pmx, true);
203 pmx->activated = true;
204 dev_dbg(dev, "padmux: setting nr %d is activated\n",
205 pmx->setting);
206
207exit:
208 mutex_unlock(&pmx_mutex);
209 return ret;
210}
211EXPORT_SYMBOL(pmx_activate);
212
213int pmx_deactivate(struct device *dev, struct pmx *pmx)
214{
215 int i;
216 int ret = -ENOENT;
217
218 if (pmx == NULL || dev == NULL)
219 return -EINVAL;
220
221 mutex_lock(&pmx_mutex);
222 for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
223
224 if (pmx_settings[i]->dev == NULL)
225 continue;
226
227 if (pmx->setting == pmx_settings[i]->setting) {
228
229 if (dev != pmx->dev) {
230 WARN(1, "padmux: cannot deactivate "
231 "pmx setting as it was activated "
232 "by another consumer\n");
233
234 ret = -EBUSY;
235 continue;
236 } else {
237 update_registers(pmx, false);
238 pmx_settings[i]->dev = NULL;
239 pmx->activated = false;
240 ret = 0;
241 dev_dbg(dev, "padmux: setting nr %d is deactivated",
242 pmx->setting);
243 break;
244 }
245 }
246 }
247 mutex_unlock(&pmx_mutex);
248
249 return ret;
250}
251EXPORT_SYMBOL(pmx_deactivate);
252
253/*
254 * For internal use only. If it is to be exported,
255 * it should be reentrant. Notice that pmx_activate
256 * (i.e. runtime settings) always override default settings.
257 */
258static int pmx_set_default(void)
259{
260 /* Used to identify several entries on the same bits */
261 u16 modbits[ARRAY_SIZE(pmx_registers)];
262
263 int i, j;
264
265 memset(modbits, 0, ARRAY_SIZE(pmx_registers) * sizeof(u16));
266
267 for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
268
269 if (!pmx_settings[i]->default_on)
270 continue;
271
272 for (j = 0; j < ARRAY_SIZE(pmx_registers); j++) {
273
274 /* Make sure there is only one entry on the same bits */
275 if (modbits[j] & pmx_settings[i]->onmask[j].mask) {
276 BUG();
277 return -EUSERS;
278 }
279 modbits[j] |= pmx_settings[i]->onmask[j].mask;
280 }
281 update_registers(pmx_settings[i], true);
282 }
283 return 0;
58} 284}
285
286#if (defined(CONFIG_DEBUG_FS) && defined(CONFIG_U300_DEBUG))
287static int pmx_show(struct seq_file *s, void *data)
288{
289 int i;
290 seq_printf(s, "-------------------------------------------------\n");
291 seq_printf(s, "SETTING BOUND TO DEVICE STATE\n");
292 seq_printf(s, "-------------------------------------------------\n");
293 mutex_lock(&pmx_mutex);
294 for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
295 /* Format pmx and device name nicely */
296 char cdp[33];
297 int chars;
298
299 chars = snprintf(&cdp[0], 17, "%s", pmx_settings[i]->name);
300 while (chars < 16) {
301 cdp[chars] = ' ';
302 chars++;
303 }
304 chars = snprintf(&cdp[16], 17, "%s", pmx_settings[i]->dev ?
305 dev_name(pmx_settings[i]->dev) : "N/A");
306 while (chars < 16) {
307 cdp[chars+16] = ' ';
308 chars++;
309 }
310 cdp[32] = '\0';
311
312 seq_printf(s,
313 "%s\t%s\n",
314 &cdp[0],
315 pmx_settings[i]->activated ?
316 "ACTIVATED" : "DEACTIVATED"
317 );
318
319 }
320 mutex_unlock(&pmx_mutex);
321 return 0;
322}
323
324static int pmx_open(struct inode *inode, struct file *file)
325{
326 return single_open(file, pmx_show, NULL);
327}
328
329static const struct file_operations pmx_operations = {
330 .owner = THIS_MODULE,
331 .open = pmx_open,
332 .read = seq_read,
333 .llseek = seq_lseek,
334 .release = single_release,
335};
336
337static int __init init_pmx_read_debugfs(void)
338{
339 /* Expose a simple debugfs interface to view pmx settings */
340 (void) debugfs_create_file("padmux", S_IFREG | S_IRUGO,
341 NULL, NULL,
342 &pmx_operations);
343 return 0;
344}
345
346/*
347 * This needs to come in after the core_initcall(),
348 * because debugfs is not available until
349 * the subsystems come up.
350 */
351module_init(init_pmx_read_debugfs);
352#endif
353
354static int __init pmx_init(void)
355{
356 int ret;
357
358 ret = pmx_set_default();
359
360 if (IS_ERR_VALUE(ret))
361 pr_crit("padmux: default settings could not be set\n");
362
363 return 0;
364}
365
366/* Should be initialized before consumers */
367core_initcall(pmx_init);
diff --git a/arch/arm/mach-u300/padmux.h b/arch/arm/mach-u300/padmux.h
index 8c2099ac5046..6e8b86064097 100644
--- a/arch/arm/mach-u300/padmux.h
+++ b/arch/arm/mach-u300/padmux.h
@@ -6,14 +6,34 @@
6 * Copyright (C) 2009 ST-Ericsson AB 6 * Copyright (C) 2009 ST-Ericsson AB
7 * License terms: GNU General Public License (GPL) version 2 7 * License terms: GNU General Public License (GPL) version 2
8 * U300 PADMUX API 8 * U300 PADMUX API
9 * Author: Linus Walleij <linus.walleij@stericsson.com> 9 * Author: Martin Persson <martin.persson@stericsson.com>
10 *
11 */ 10 */
12 11
13#ifndef __MACH_U300_PADMUX_H 12#ifndef __MACH_U300_PADMUX_H
14#define __MACH_U300_PADMUX_H 13#define __MACH_U300_PADMUX_H
15 14
16void pmx_set_mission_mode_mmc(void); 15enum pmx_settings {
17void pmx_set_mission_mode_spi(void); 16 U300_APP_PMX_MMC_SETTING,
17 U300_APP_PMX_SPI_SETTING
18};
19
20struct pmx_onmask {
21 u16 mask; /* Mask bits */
22 u16 val; /* Value when active */
23};
24
25struct pmx {
26 struct device *dev;
27 enum pmx_settings setting;
28 char *name;
29 bool activated;
30 bool default_on;
31 struct pmx_onmask onmask[];
32};
33
34struct pmx *pmx_get(struct device *dev, enum pmx_settings setting);
35int pmx_put(struct device *dev, struct pmx *pmx);
36int pmx_activate(struct device *dev, struct pmx *pmx);
37int pmx_deactivate(struct device *dev, struct pmx *pmx);
18 38
19#endif 39#endif
diff --git a/arch/arm/mach-u300/spi.c b/arch/arm/mach-u300/spi.c
new file mode 100644
index 000000000000..f0e887bea30e
--- /dev/null
+++ b/arch/arm/mach-u300/spi.c
@@ -0,0 +1,124 @@
1/*
2 * arch/arm/mach-u300/spi.c
3 *
4 * Copyright (C) 2009 ST-Ericsson AB
5 * License terms: GNU General Public License (GPL) version 2
6 *
7 * Author: Linus Walleij <linus.walleij@stericsson.com>
8 */
9#include <linux/device.h>
10#include <linux/amba/bus.h>
11#include <linux/spi/spi.h>
12#include <linux/amba/pl022.h>
13#include <linux/err.h>
14#include "padmux.h"
15
16/*
17 * The following is for the actual devices on the SSP/SPI bus
18 */
19#ifdef CONFIG_MACH_U300_SPIDUMMY
20static void select_dummy_chip(u32 chipselect)
21{
22 pr_debug("CORE: %s called with CS=0x%x (%s)\n",
23 __func__,
24 chipselect,
25 chipselect ? "unselect chip" : "select chip");
26 /*
27 * Here you would write the chip select value to the GPIO pins if
28 * this was a real chip (but this is a loopback dummy).
29 */
30}
31
32struct pl022_config_chip dummy_chip_info = {
33 /* Nominally this is LOOPBACK_DISABLED, but this is our dummy chip! */
34 .lbm = LOOPBACK_ENABLED,
35 /*
36 * available POLLING_TRANSFER and INTERRUPT_TRANSFER,
37 * DMA_TRANSFER does not work
38 */
39 .com_mode = INTERRUPT_TRANSFER,
40 .iface = SSP_INTERFACE_MOTOROLA_SPI,
41 /* We can only act as master but SSP_SLAVE is possible in theory */
42 .hierarchy = SSP_MASTER,
43 /* 0 = drive TX even as slave, 1 = do not drive TX as slave */
44 .slave_tx_disable = 0,
45 /* LSB first */
46 .endian_tx = SSP_TX_LSB,
47 .endian_rx = SSP_RX_LSB,
48 .data_size = SSP_DATA_BITS_8, /* used to be 12 in some default */
49 .rx_lev_trig = SSP_RX_1_OR_MORE_ELEM,
50 .tx_lev_trig = SSP_TX_1_OR_MORE_EMPTY_LOC,
51 .clk_phase = SSP_CLK_SECOND_EDGE,
52 .clk_pol = SSP_CLK_POL_IDLE_LOW,
53 .ctrl_len = SSP_BITS_12,
54 .wait_state = SSP_MWIRE_WAIT_ZERO,
55 .duplex = SSP_MICROWIRE_CHANNEL_FULL_DUPLEX,
56 /*
57 * This is where you insert a call to a function to enable CS
58 * (usually GPIO) for a certain chip.
59 */
60 .cs_control = select_dummy_chip,
61};
62#endif
63
64static struct spi_board_info u300_spi_devices[] = {
65#ifdef CONFIG_MACH_U300_SPIDUMMY
66 {
67 /* A dummy chip used for loopback tests */
68 .modalias = "spi-dummy",
69 /* Really dummy, pass in additional chip config here */
70 .platform_data = NULL,
71 /* This defines how the controller shall handle the device */
72 .controller_data = &dummy_chip_info,
73 /* .irq - no external IRQ routed from this device */
74 .max_speed_hz = 1000000,
75 .bus_num = 0, /* Only one bus on this chip */
76 .chip_select = 0,
77 /* Means SPI_CS_HIGH, change if e.g low CS */
78 .mode = 0,
79 },
80#endif
81};
82
83static struct pl022_ssp_controller ssp_platform_data = {
84 /* If you have several SPI buses this varies, we have only bus 0 */
85 .bus_id = 0,
86 /* Set this to 1 when we think we got DMA working */
87 .enable_dma = 0,
88 /*
89 * On the APP CPU GPIO 4, 5 and 6 are connected as generic
90 * chip selects for SPI. (Same on U330, U335 and U365.)
91 * TODO: make sure the GPIO driver can select these properly
92 * and do padmuxing accordingly too.
93 */
94 .num_chipselect = 3,
95};
96
97
98void __init u300_spi_init(struct amba_device *adev)
99{
100 struct pmx *pmx;
101
102 adev->dev.platform_data = &ssp_platform_data;
103 /*
104 * Setup padmuxing for SPI. Since this must always be
105 * compiled into the kernel, pmx is never released.
106 */
107 pmx = pmx_get(&adev->dev, U300_APP_PMX_SPI_SETTING);
108
109 if (IS_ERR(pmx))
110 dev_warn(&adev->dev, "Could not get padmux handle\n");
111 else {
112 int ret;
113
114 ret = pmx_activate(&adev->dev, pmx);
115 if (IS_ERR_VALUE(ret))
116 dev_warn(&adev->dev, "Could not activate padmuxing\n");
117 }
118
119}
120void __init u300_spi_register_board_devices(void)
121{
122 /* Register any SPI devices */
123 spi_register_board_info(u300_spi_devices, ARRAY_SIZE(u300_spi_devices));
124}
diff --git a/arch/arm/mach-u300/spi.h b/arch/arm/mach-u300/spi.h
new file mode 100644
index 000000000000..bd3d867e240f
--- /dev/null
+++ b/arch/arm/mach-u300/spi.h
@@ -0,0 +1,26 @@
1/*
2 * arch/arm/mach-u300/spi.h
3 *
4 * Copyright (C) 2009 ST-Ericsson AB
5 * License terms: GNU General Public License (GPL) version 2
6 *
7 * Author: Linus Walleij <linus.walleij@stericsson.com>
8 */
9#ifndef SPI_H
10#define SPI_H
11#include <linux/amba/bus.h>
12
13#ifdef CONFIG_SPI_PL022
14void __init u300_spi_init(struct amba_device *adev);
15void __init u300_spi_register_board_devices(void);
16#else
17/* Compile out SPI support if PL022 is not selected */
18static inline void __init u300_spi_init(struct amba_device *adev)
19{
20}
21static inline void __init u300_spi_register_board_devices(void)
22{
23}
24#endif
25
26#endif
diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c
index cce53204880e..26d26f5100fe 100644
--- a/arch/arm/mach-u300/timer.c
+++ b/arch/arm/mach-u300/timer.c
@@ -346,6 +346,21 @@ static struct clocksource clocksource_u300_1mhz = {
346 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 346 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
347}; 347};
348 348
349/*
350 * Override the global weak sched_clock symbol with this
351 * local implementation which uses the clocksource to get some
352 * better resolution when scheduling the kernel. We accept that
353 * this wraps around for now, since it is just a relative time
354 * stamp. (Inspired by OMAP implementation.)
355 */
356unsigned long long notrace sched_clock(void)
357{
358 return clocksource_cyc2ns(clocksource_u300_1mhz.read(
359 &clocksource_u300_1mhz),
360 clocksource_u300_1mhz.mult,
361 clocksource_u300_1mhz.shift);
362}
363
349 364
350/* 365/*
351 * This sets up the system timers, clock source and clock event. 366 * This sets up the system timers, clock source and clock event.
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-11 19:40:55 -0500