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-rw-r--r--arch/arm/common/timer-sp.c16
-rw-r--r--arch/arm/mach-vexpress/ct-ca9x4.c4
-rw-r--r--arch/arm/mach-vexpress/v2m.c4
3 files changed, 16 insertions, 8 deletions
diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c
index 5b7e8c9046be..41df47875122 100644
--- a/arch/arm/common/timer-sp.c
+++ b/arch/arm/common/timer-sp.c
@@ -28,12 +28,6 @@
28 28
29#include <asm/hardware/arm_timer.h> 29#include <asm/hardware/arm_timer.h>
30 30
31/*
32 * These timers are currently always setup to be clocked at 1MHz.
33 */
34#define TIMER_FREQ_KHZ (1000)
35#define TIMER_RELOAD (TIMER_FREQ_KHZ * 1000 / HZ)
36
37static long __init sp804_get_clock_rate(const char *name) 31static long __init sp804_get_clock_rate(const char *name)
38{ 32{
39 struct clk *clk; 33 struct clk *clk;
@@ -84,6 +78,7 @@ void __init sp804_clocksource_init(void __iomem *base, const char *name)
84 78
85 79
86static void __iomem *clkevt_base; 80static void __iomem *clkevt_base;
81static unsigned long clkevt_reload;
87 82
88/* 83/*
89 * IRQ handler for the timer 84 * IRQ handler for the timer
@@ -109,7 +104,7 @@ static void sp804_set_mode(enum clock_event_mode mode,
109 104
110 switch (mode) { 105 switch (mode) {
111 case CLOCK_EVT_MODE_PERIODIC: 106 case CLOCK_EVT_MODE_PERIODIC:
112 writel(TIMER_RELOAD, clkevt_base + TIMER_LOAD); 107 writel(clkevt_reload, clkevt_base + TIMER_LOAD);
113 ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE; 108 ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE;
114 break; 109 break;
115 110
@@ -158,12 +153,17 @@ void __init sp804_clockevents_init(void __iomem *base, unsigned int irq,
158 const char *name) 153 const char *name)
159{ 154{
160 struct clock_event_device *evt = &sp804_clockevent; 155 struct clock_event_device *evt = &sp804_clockevent;
156 long rate = sp804_get_clock_rate(name);
157
158 if (rate < 0)
159 return;
161 160
162 clkevt_base = base; 161 clkevt_base = base;
162 clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ);
163 163
164 evt->name = name; 164 evt->name = name;
165 evt->irq = irq; 165 evt->irq = irq;
166 evt->mult = div_sc(TIMER_FREQ_KHZ, NSEC_PER_MSEC, evt->shift); 166 evt->mult = div_sc(rate, NSEC_PER_SEC, evt->shift);
167 evt->max_delta_ns = clockevent_delta2ns(0xffffffff, evt); 167 evt->max_delta_ns = clockevent_delta2ns(0xffffffff, evt);
168 evt->min_delta_ns = clockevent_delta2ns(0xf, evt); 168 evt->min_delta_ns = clockevent_delta2ns(0xf, evt);
169 169
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index 271213384203..2023a9e5211c 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -152,6 +152,10 @@ static struct clk_lookup lookups[] = {
152 .clk = &osc1_clk, 152 .clk = &osc1_clk,
153 }, { /* SP804 timers */ 153 }, { /* SP804 timers */
154 .dev_id = "sp804", 154 .dev_id = "sp804",
155 .con_id = "ct-timer0",
156 .clk = &ct_sp804_clk,
157 }, { /* SP804 timers */
158 .dev_id = "sp804",
155 .con_id = "ct-timer1", 159 .con_id = "ct-timer1",
156 .clk = &ct_sp804_clk, 160 .clk = &ct_sp804_clk,
157 }, 161 },
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index f6fecdd0fbe8..9d9d4af384e2 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -370,6 +370,10 @@ static struct clk_lookup v2m_lookups[] = {
370 .clk = &osc1_clk, 370 .clk = &osc1_clk,
371 }, { /* SP804 timers */ 371 }, { /* SP804 timers */
372 .dev_id = "sp804", 372 .dev_id = "sp804",
373 .con_id = "v2m-timer0",
374 .clk = &v2m_sp804_clk,
375 }, { /* SP804 timers */
376 .dev_id = "sp804",
373 .con_id = "v2m-timer1", 377 .con_id = "v2m-timer1",
374 .clk = &v2m_sp804_clk, 378 .clk = &v2m_sp804_clk,
375 }, 379 },