diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/i386/kernel/nmi.c | 9 | ||||
-rw-r--r-- | arch/x86_64/kernel/nmi.c | 10 |
2 files changed, 11 insertions, 8 deletions
diff --git a/arch/i386/kernel/nmi.c b/arch/i386/kernel/nmi.c index a98ba88a8c0c..9f1e8c1afab7 100644 --- a/arch/i386/kernel/nmi.c +++ b/arch/i386/kernel/nmi.c | |||
@@ -41,16 +41,17 @@ int nmi_watchdog_enabled; | |||
41 | * different subsystems this reservation system just tries to coordinate | 41 | * different subsystems this reservation system just tries to coordinate |
42 | * things a little | 42 | * things a little |
43 | */ | 43 | */ |
44 | static DEFINE_PER_CPU(unsigned long, perfctr_nmi_owner); | ||
45 | static DEFINE_PER_CPU(unsigned long, evntsel_nmi_owner[3]); | ||
46 | |||
47 | static cpumask_t backtrace_mask = CPU_MASK_NONE; | ||
48 | 44 | ||
49 | /* this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's | 45 | /* this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's |
50 | * offset from MSR_P4_BSU_ESCR0. It will be the max for all platforms (for now) | 46 | * offset from MSR_P4_BSU_ESCR0. It will be the max for all platforms (for now) |
51 | */ | 47 | */ |
52 | #define NMI_MAX_COUNTER_BITS 66 | 48 | #define NMI_MAX_COUNTER_BITS 66 |
49 | #define NMI_MAX_COUNTER_LONGS BITS_TO_LONGS(NMI_MAX_COUNTER_BITS) | ||
53 | 50 | ||
51 | static DEFINE_PER_CPU(unsigned long, perfctr_nmi_owner[NMI_MAX_COUNTER_LONGS]); | ||
52 | static DEFINE_PER_CPU(unsigned long, evntsel_nmi_owner[NMI_MAX_COUNTER_LONGS]); | ||
53 | |||
54 | static cpumask_t backtrace_mask = CPU_MASK_NONE; | ||
54 | /* nmi_active: | 55 | /* nmi_active: |
55 | * >0: the lapic NMI watchdog is active, but can be disabled | 56 | * >0: the lapic NMI watchdog is active, but can be disabled |
56 | * <0: the lapic NMI watchdog has not been set up, and cannot | 57 | * <0: the lapic NMI watchdog has not been set up, and cannot |
diff --git a/arch/x86_64/kernel/nmi.c b/arch/x86_64/kernel/nmi.c index a90996c27dc8..dfab9f167366 100644 --- a/arch/x86_64/kernel/nmi.c +++ b/arch/x86_64/kernel/nmi.c | |||
@@ -39,15 +39,17 @@ int panic_on_unrecovered_nmi; | |||
39 | * different subsystems this reservation system just tries to coordinate | 39 | * different subsystems this reservation system just tries to coordinate |
40 | * things a little | 40 | * things a little |
41 | */ | 41 | */ |
42 | static DEFINE_PER_CPU(unsigned, perfctr_nmi_owner); | ||
43 | static DEFINE_PER_CPU(unsigned, evntsel_nmi_owner[2]); | ||
44 | |||
45 | static cpumask_t backtrace_mask = CPU_MASK_NONE; | ||
46 | 42 | ||
47 | /* this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's | 43 | /* this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's |
48 | * offset from MSR_P4_BSU_ESCR0. It will be the max for all platforms (for now) | 44 | * offset from MSR_P4_BSU_ESCR0. It will be the max for all platforms (for now) |
49 | */ | 45 | */ |
50 | #define NMI_MAX_COUNTER_BITS 66 | 46 | #define NMI_MAX_COUNTER_BITS 66 |
47 | #define NMI_MAX_COUNTER_LONGS BITS_TO_LONGS(NMI_MAX_COUNTER_BITS) | ||
48 | |||
49 | static DEFINE_PER_CPU(unsigned, perfctr_nmi_owner[NMI_MAX_COUNTER_LONGS]); | ||
50 | static DEFINE_PER_CPU(unsigned, evntsel_nmi_owner[NMI_MAX_COUNTER_LONGS]); | ||
51 | |||
52 | static cpumask_t backtrace_mask = CPU_MASK_NONE; | ||
51 | 53 | ||
52 | /* nmi_active: | 54 | /* nmi_active: |
53 | * >0: the lapic NMI watchdog is active, but can be disabled | 55 | * >0: the lapic NMI watchdog is active, but can be disabled |