diff options
Diffstat (limited to 'arch')
110 files changed, 1630 insertions, 915 deletions
diff --git a/arch/arm/configs/kirkwood_defconfig b/arch/arm/configs/kirkwood_defconfig index 0a1abb978d7e..af74cc2de8b6 100644 --- a/arch/arm/configs/kirkwood_defconfig +++ b/arch/arm/configs/kirkwood_defconfig | |||
@@ -629,7 +629,7 @@ CONFIG_SCSI_LOWLEVEL=y | |||
629 | CONFIG_ATA=y | 629 | CONFIG_ATA=y |
630 | # CONFIG_ATA_NONSTANDARD is not set | 630 | # CONFIG_ATA_NONSTANDARD is not set |
631 | CONFIG_SATA_PMP=y | 631 | CONFIG_SATA_PMP=y |
632 | # CONFIG_SATA_AHCI is not set | 632 | CONFIG_SATA_AHCI=y |
633 | # CONFIG_SATA_SIL24 is not set | 633 | # CONFIG_SATA_SIL24 is not set |
634 | CONFIG_ATA_SFF=y | 634 | CONFIG_ATA_SFF=y |
635 | # CONFIG_SATA_SVW is not set | 635 | # CONFIG_SATA_SVW is not set |
diff --git a/arch/arm/configs/rx51_defconfig b/arch/arm/configs/rx51_defconfig index eb2cb31825c0..f238df66efd4 100644 --- a/arch/arm/configs/rx51_defconfig +++ b/arch/arm/configs/rx51_defconfig | |||
@@ -282,7 +282,7 @@ CONFIG_ALIGNMENT_TRAP=y | |||
282 | # | 282 | # |
283 | CONFIG_ZBOOT_ROM_TEXT=0x0 | 283 | CONFIG_ZBOOT_ROM_TEXT=0x0 |
284 | CONFIG_ZBOOT_ROM_BSS=0x0 | 284 | CONFIG_ZBOOT_ROM_BSS=0x0 |
285 | CONFIG_CMDLINE="init=/sbin/preinit ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs rootflags=bulk_read,no_chk_data_crc rw console=ttyMTD,log console=tty0" | 285 | CONFIG_CMDLINE="init=/sbin/preinit ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs rootflags=bulk_read,no_chk_data_crc rw console=ttyMTD,log console=tty0 console=ttyS2,115200n8" |
286 | # CONFIG_XIP_KERNEL is not set | 286 | # CONFIG_XIP_KERNEL is not set |
287 | # CONFIG_KEXEC is not set | 287 | # CONFIG_KEXEC is not set |
288 | 288 | ||
@@ -1354,7 +1354,7 @@ CONFIG_USB_OTG_UTILS=y | |||
1354 | # CONFIG_USB_GPIO_VBUS is not set | 1354 | # CONFIG_USB_GPIO_VBUS is not set |
1355 | # CONFIG_ISP1301_OMAP is not set | 1355 | # CONFIG_ISP1301_OMAP is not set |
1356 | CONFIG_TWL4030_USB=y | 1356 | CONFIG_TWL4030_USB=y |
1357 | CONFIG_MMC=m | 1357 | CONFIG_MMC=y |
1358 | # CONFIG_MMC_DEBUG is not set | 1358 | # CONFIG_MMC_DEBUG is not set |
1359 | # CONFIG_MMC_UNSAFE_RESUME is not set | 1359 | # CONFIG_MMC_UNSAFE_RESUME is not set |
1360 | 1360 | ||
@@ -1449,7 +1449,8 @@ CONFIG_RTC_DRV_TWL4030=m | |||
1449 | # on-CPU RTC drivers | 1449 | # on-CPU RTC drivers |
1450 | # | 1450 | # |
1451 | # CONFIG_DMADEVICES is not set | 1451 | # CONFIG_DMADEVICES is not set |
1452 | # CONFIG_REGULATOR is not set | 1452 | CONFIG_REGULATOR=y |
1453 | CONFIG_REGULATOR_TWL4030=y | ||
1453 | # CONFIG_UIO is not set | 1454 | # CONFIG_UIO is not set |
1454 | # CONFIG_STAGING is not set | 1455 | # CONFIG_STAGING is not set |
1455 | 1456 | ||
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h index ee1304f22f94..5ccce0a9b03c 100644 --- a/arch/arm/include/asm/setup.h +++ b/arch/arm/include/asm/setup.h | |||
@@ -201,7 +201,8 @@ static struct tagtable __tagtable_##fn __tag = { tag, fn } | |||
201 | struct membank { | 201 | struct membank { |
202 | unsigned long start; | 202 | unsigned long start; |
203 | unsigned long size; | 203 | unsigned long size; |
204 | int node; | 204 | unsigned short node; |
205 | unsigned short highmem; | ||
205 | }; | 206 | }; |
206 | 207 | ||
207 | struct meminfo { | 208 | struct meminfo { |
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h index ce63048d45eb..8a947d42a6f1 100644 --- a/arch/arm/mach-ixp4xx/include/mach/io.h +++ b/arch/arm/mach-ixp4xx/include/mach/io.h | |||
@@ -17,7 +17,7 @@ | |||
17 | 17 | ||
18 | #include <mach/hardware.h> | 18 | #include <mach/hardware.h> |
19 | 19 | ||
20 | #define IO_SPACE_LIMIT 0xffff0000 | 20 | #define IO_SPACE_LIMIT 0x0000ffff |
21 | 21 | ||
22 | extern int (*ixp4xx_pci_read)(u32 addr, u32 cmd, u32* data); | 22 | extern int (*ixp4xx_pci_read)(u32 addr, u32 cmd, u32* data); |
23 | extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); | 23 | extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); |
diff --git a/arch/arm/mach-kirkwood/ts219-setup.c b/arch/arm/mach-kirkwood/ts219-setup.c index 01aa213c0a6f..ec1a64f263d2 100644 --- a/arch/arm/mach-kirkwood/ts219-setup.c +++ b/arch/arm/mach-kirkwood/ts219-setup.c | |||
@@ -206,6 +206,15 @@ static void __init qnap_ts219_init(void) | |||
206 | 206 | ||
207 | } | 207 | } |
208 | 208 | ||
209 | static int __init ts219_pci_init(void) | ||
210 | { | ||
211 | if (machine_is_ts219()) | ||
212 | kirkwood_pcie_init(); | ||
213 | |||
214 | return 0; | ||
215 | } | ||
216 | subsys_initcall(ts219_pci_init); | ||
217 | |||
209 | MACHINE_START(TS219, "QNAP TS-119/TS-219") | 218 | MACHINE_START(TS219, "QNAP TS-119/TS-219") |
210 | /* Maintainer: Martin Michlmayr <tbm@cyrius.com> */ | 219 | /* Maintainer: Martin Michlmayr <tbm@cyrius.com> */ |
211 | .phys_io = KIRKWOOD_REGS_PHYS_BASE, | 220 | .phys_io = KIRKWOOD_REGS_PHYS_BASE, |
diff --git a/arch/arm/mach-mx3/mx31moboard-devboard.c b/arch/arm/mach-mx3/mx31moboard-devboard.c index 4704405165a1..b48581e7dedd 100644 --- a/arch/arm/mach-mx3/mx31moboard-devboard.c +++ b/arch/arm/mach-mx3/mx31moboard-devboard.c | |||
@@ -63,7 +63,7 @@ static struct imxuart_platform_data uart_pdata = { | |||
63 | 63 | ||
64 | static int devboard_sdhc2_get_ro(struct device *dev) | 64 | static int devboard_sdhc2_get_ro(struct device *dev) |
65 | { | 65 | { |
66 | return gpio_get_value(SDHC2_WP); | 66 | return !gpio_get_value(SDHC2_WP); |
67 | } | 67 | } |
68 | 68 | ||
69 | static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq, | 69 | static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq, |
diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c index 641c3d6153ae..901fb0166c0e 100644 --- a/arch/arm/mach-mx3/mx31moboard-marxbot.c +++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c | |||
@@ -67,7 +67,7 @@ static unsigned int marxbot_pins[] = { | |||
67 | 67 | ||
68 | static int marxbot_sdhc2_get_ro(struct device *dev) | 68 | static int marxbot_sdhc2_get_ro(struct device *dev) |
69 | { | 69 | { |
70 | return gpio_get_value(SDHC2_WP); | 70 | return !gpio_get_value(SDHC2_WP); |
71 | } | 71 | } |
72 | 72 | ||
73 | static int marxbot_sdhc2_init(struct device *dev, irq_handler_t detect_irq, | 73 | static int marxbot_sdhc2_init(struct device *dev, irq_handler_t detect_irq, |
diff --git a/arch/arm/mach-mx3/mx31moboard.c b/arch/arm/mach-mx3/mx31moboard.c index a17f2e411609..2a2da4739ecf 100644 --- a/arch/arm/mach-mx3/mx31moboard.c +++ b/arch/arm/mach-mx3/mx31moboard.c | |||
@@ -94,7 +94,7 @@ static struct imxi2c_platform_data moboard_i2c1_pdata = { | |||
94 | 94 | ||
95 | static int moboard_sdhc1_get_ro(struct device *dev) | 95 | static int moboard_sdhc1_get_ro(struct device *dev) |
96 | { | 96 | { |
97 | return gpio_get_value(SDHC1_WP); | 97 | return !gpio_get_value(SDHC1_WP); |
98 | } | 98 | } |
99 | 99 | ||
100 | static int moboard_sdhc1_init(struct device *dev, irq_handler_t detect_irq, | 100 | static int moboard_sdhc1_init(struct device *dev, irq_handler_t detect_irq, |
diff --git a/arch/arm/mach-mx3/pcm037_eet.c b/arch/arm/mach-mx3/pcm037_eet.c index fe52fb1bb8b7..8d386000fc40 100644 --- a/arch/arm/mach-mx3/pcm037_eet.c +++ b/arch/arm/mach-mx3/pcm037_eet.c | |||
@@ -24,15 +24,6 @@ | |||
24 | #include "devices.h" | 24 | #include "devices.h" |
25 | 25 | ||
26 | static unsigned int pcm037_eet_pins[] = { | 26 | static unsigned int pcm037_eet_pins[] = { |
27 | /* SPI #1 */ | ||
28 | MX31_PIN_CSPI1_MISO__MISO, | ||
29 | MX31_PIN_CSPI1_MOSI__MOSI, | ||
30 | MX31_PIN_CSPI1_SCLK__SCLK, | ||
31 | MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, | ||
32 | MX31_PIN_CSPI1_SS0__SS0, | ||
33 | MX31_PIN_CSPI1_SS1__SS1, | ||
34 | MX31_PIN_CSPI1_SS2__SS2, | ||
35 | |||
36 | /* Reserve and hardwire GPIO 57 high - S6E63D6 chipselect */ | 27 | /* Reserve and hardwire GPIO 57 high - S6E63D6 chipselect */ |
37 | IOMUX_MODE(MX31_PIN_KEY_COL7, IOMUX_CONFIG_GPIO), | 28 | IOMUX_MODE(MX31_PIN_KEY_COL7, IOMUX_CONFIG_GPIO), |
38 | /* GPIO keys */ | 29 | /* GPIO keys */ |
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 9c3fdcdf76c3..8ec2a132904d 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c | |||
@@ -141,7 +141,7 @@ static inline void board_smc91x_init(void) | |||
141 | 141 | ||
142 | static void __init omap_2430sdp_init_irq(void) | 142 | static void __init omap_2430sdp_init_irq(void) |
143 | { | 143 | { |
144 | omap2_init_common_hw(NULL); | 144 | omap2_init_common_hw(NULL, NULL); |
145 | omap_init_irq(); | 145 | omap_init_irq(); |
146 | omap_gpio_init(); | 146 | omap_gpio_init(); |
147 | } | 147 | } |
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index 496a90e4ea7a..ac262cd74503 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c | |||
@@ -169,7 +169,7 @@ static struct platform_device *sdp3430_devices[] __initdata = { | |||
169 | 169 | ||
170 | static void __init omap_3430sdp_init_irq(void) | 170 | static void __init omap_3430sdp_init_irq(void) |
171 | { | 171 | { |
172 | omap2_init_common_hw(hyb18m512160af6_sdrc_params); | 172 | omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL); |
173 | omap_init_irq(); | 173 | omap_init_irq(); |
174 | omap_gpio_init(); | 174 | omap_gpio_init(); |
175 | } | 175 | } |
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 57e477bd89c6..b0c7402248f7 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c | |||
@@ -59,7 +59,7 @@ static void __init gic_init_irq(void) | |||
59 | 59 | ||
60 | static void __init omap_4430sdp_init_irq(void) | 60 | static void __init omap_4430sdp_init_irq(void) |
61 | { | 61 | { |
62 | omap2_init_common_hw(NULL); | 62 | omap2_init_common_hw(NULL, NULL); |
63 | #ifdef CONFIG_OMAP_32K_TIMER | 63 | #ifdef CONFIG_OMAP_32K_TIMER |
64 | omap2_gp_clockevent_set_gptimer(1); | 64 | omap2_gp_clockevent_set_gptimer(1); |
65 | #endif | 65 | #endif |
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index 06dfba888b0c..dcfc20d03894 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c | |||
@@ -250,7 +250,7 @@ out: | |||
250 | 250 | ||
251 | static void __init omap_apollon_init_irq(void) | 251 | static void __init omap_apollon_init_irq(void) |
252 | { | 252 | { |
253 | omap2_init_common_hw(NULL); | 253 | omap2_init_common_hw(NULL, NULL); |
254 | omap_init_irq(); | 254 | omap_init_irq(); |
255 | omap_gpio_init(); | 255 | omap_gpio_init(); |
256 | apollon_init_smc91x(); | 256 | apollon_init_smc91x(); |
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 3492162a65c3..fd00aa03690c 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c | |||
@@ -33,7 +33,7 @@ | |||
33 | 33 | ||
34 | static void __init omap_generic_init_irq(void) | 34 | static void __init omap_generic_init_irq(void) |
35 | { | 35 | { |
36 | omap2_init_common_hw(NULL); | 36 | omap2_init_common_hw(NULL, NULL); |
37 | omap_init_irq(); | 37 | omap_init_irq(); |
38 | } | 38 | } |
39 | 39 | ||
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index e7d017cdc438..7b1d61d5bb2c 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c | |||
@@ -270,7 +270,7 @@ static void __init h4_init_flash(void) | |||
270 | 270 | ||
271 | static void __init omap_h4_init_irq(void) | 271 | static void __init omap_h4_init_irq(void) |
272 | { | 272 | { |
273 | omap2_init_common_hw(NULL); | 273 | omap2_init_common_hw(NULL, NULL); |
274 | omap_init_irq(); | 274 | omap_init_irq(); |
275 | omap_gpio_init(); | 275 | omap_gpio_init(); |
276 | h4_init_flash(); | 276 | h4_init_flash(); |
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index d8bc0a7dcb8d..ea383f88cb1b 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c | |||
@@ -270,7 +270,7 @@ static inline void __init ldp_init_smsc911x(void) | |||
270 | 270 | ||
271 | static void __init omap_ldp_init_irq(void) | 271 | static void __init omap_ldp_init_irq(void) |
272 | { | 272 | { |
273 | omap2_init_common_hw(NULL); | 273 | omap2_init_common_hw(NULL, NULL); |
274 | omap_init_irq(); | 274 | omap_init_irq(); |
275 | omap_gpio_init(); | 275 | omap_gpio_init(); |
276 | ldp_init_smsc911x(); | 276 | ldp_init_smsc911x(); |
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 991ac9c38032..e00ba128cece 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c | |||
@@ -282,7 +282,8 @@ static int __init omap3_beagle_i2c_init(void) | |||
282 | 282 | ||
283 | static void __init omap3_beagle_init_irq(void) | 283 | static void __init omap3_beagle_init_irq(void) |
284 | { | 284 | { |
285 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params); | 285 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, |
286 | mt46h32m32lf6_sdrc_params); | ||
286 | omap_init_irq(); | 287 | omap_init_irq(); |
287 | #ifdef CONFIG_OMAP_32K_TIMER | 288 | #ifdef CONFIG_OMAP_32K_TIMER |
288 | omap2_gp_clockevent_set_gptimer(12); | 289 | omap2_gp_clockevent_set_gptimer(12); |
@@ -408,6 +409,10 @@ static void __init omap3_beagle_init(void) | |||
408 | 409 | ||
409 | usb_musb_init(); | 410 | usb_musb_init(); |
410 | omap3beagle_flash_init(); | 411 | omap3beagle_flash_init(); |
412 | |||
413 | /* Ensure SDRC pins are mux'd for self-refresh */ | ||
414 | omap_cfg_reg(H16_34XX_SDRC_CKE0); | ||
415 | omap_cfg_reg(H17_34XX_SDRC_CKE1); | ||
411 | } | 416 | } |
412 | 417 | ||
413 | static void __init omap3_beagle_map_io(void) | 418 | static void __init omap3_beagle_map_io(void) |
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index cf3dd771a678..c4b144647dc5 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c | |||
@@ -280,7 +280,7 @@ struct spi_board_info omap3evm_spi_board_info[] = { | |||
280 | 280 | ||
281 | static void __init omap3_evm_init_irq(void) | 281 | static void __init omap3_evm_init_irq(void) |
282 | { | 282 | { |
283 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params); | 283 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, NULL); |
284 | omap_init_irq(); | 284 | omap_init_irq(); |
285 | omap_gpio_init(); | 285 | omap_gpio_init(); |
286 | omap3evm_init_smc911x(); | 286 | omap3evm_init_smc911x(); |
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index e32aa23ce962..864ee3d021f7 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c | |||
@@ -40,6 +40,7 @@ | |||
40 | #include <mach/mcspi.h> | 40 | #include <mach/mcspi.h> |
41 | #include <mach/usb.h> | 41 | #include <mach/usb.h> |
42 | #include <mach/keypad.h> | 42 | #include <mach/keypad.h> |
43 | #include <mach/mux.h> | ||
43 | 44 | ||
44 | #include "sdram-micron-mt46h32m32lf-6.h" | 45 | #include "sdram-micron-mt46h32m32lf-6.h" |
45 | #include "mmc-twl4030.h" | 46 | #include "mmc-twl4030.h" |
@@ -310,7 +311,8 @@ static int __init omap3pandora_i2c_init(void) | |||
310 | 311 | ||
311 | static void __init omap3pandora_init_irq(void) | 312 | static void __init omap3pandora_init_irq(void) |
312 | { | 313 | { |
313 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params); | 314 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, |
315 | mt46h32m32lf6_sdrc_params); | ||
314 | omap_init_irq(); | 316 | omap_init_irq(); |
315 | omap_gpio_init(); | 317 | omap_gpio_init(); |
316 | } | 318 | } |
@@ -397,6 +399,10 @@ static void __init omap3pandora_init(void) | |||
397 | omap3pandora_ads7846_init(); | 399 | omap3pandora_ads7846_init(); |
398 | pandora_keys_gpio_init(); | 400 | pandora_keys_gpio_init(); |
399 | usb_musb_init(); | 401 | usb_musb_init(); |
402 | |||
403 | /* Ensure SDRC pins are mux'd for self-refresh */ | ||
404 | omap_cfg_reg(H16_34XX_SDRC_CKE0); | ||
405 | omap_cfg_reg(H17_34XX_SDRC_CKE1); | ||
400 | } | 406 | } |
401 | 407 | ||
402 | static void __init omap3pandora_map_io(void) | 408 | static void __init omap3pandora_map_io(void) |
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index dff5528fbfb5..6bce23004aa4 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c | |||
@@ -44,6 +44,7 @@ | |||
44 | #include <mach/gpmc.h> | 44 | #include <mach/gpmc.h> |
45 | #include <mach/hardware.h> | 45 | #include <mach/hardware.h> |
46 | #include <mach/nand.h> | 46 | #include <mach/nand.h> |
47 | #include <mach/mux.h> | ||
47 | #include <mach/usb.h> | 48 | #include <mach/usb.h> |
48 | 49 | ||
49 | #include "sdram-micron-mt46h32m32lf-6.h" | 50 | #include "sdram-micron-mt46h32m32lf-6.h" |
@@ -51,6 +52,7 @@ | |||
51 | 52 | ||
52 | #define OVERO_GPIO_BT_XGATE 15 | 53 | #define OVERO_GPIO_BT_XGATE 15 |
53 | #define OVERO_GPIO_W2W_NRESET 16 | 54 | #define OVERO_GPIO_W2W_NRESET 16 |
55 | #define OVERO_GPIO_PENDOWN 114 | ||
54 | #define OVERO_GPIO_BT_NRESET 164 | 56 | #define OVERO_GPIO_BT_NRESET 164 |
55 | #define OVERO_GPIO_USBH_CPEN 168 | 57 | #define OVERO_GPIO_USBH_CPEN 168 |
56 | #define OVERO_GPIO_USBH_NRESET 183 | 58 | #define OVERO_GPIO_USBH_NRESET 183 |
@@ -146,7 +148,7 @@ static struct platform_device overo_smsc911x_device = { | |||
146 | .name = "smsc911x", | 148 | .name = "smsc911x", |
147 | .id = -1, | 149 | .id = -1, |
148 | .num_resources = ARRAY_SIZE(overo_smsc911x_resources), | 150 | .num_resources = ARRAY_SIZE(overo_smsc911x_resources), |
149 | .resource = &overo_smsc911x_resources, | 151 | .resource = overo_smsc911x_resources, |
150 | .dev = { | 152 | .dev = { |
151 | .platform_data = &overo_smsc911x_config, | 153 | .platform_data = &overo_smsc911x_config, |
152 | }, | 154 | }, |
@@ -360,7 +362,8 @@ static int __init overo_i2c_init(void) | |||
360 | 362 | ||
361 | static void __init overo_init_irq(void) | 363 | static void __init overo_init_irq(void) |
362 | { | 364 | { |
363 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params); | 365 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, |
366 | mt46h32m32lf6_sdrc_params); | ||
364 | omap_init_irq(); | 367 | omap_init_irq(); |
365 | omap_gpio_init(); | 368 | omap_gpio_init(); |
366 | } | 369 | } |
@@ -395,6 +398,10 @@ static void __init overo_init(void) | |||
395 | overo_ads7846_init(); | 398 | overo_ads7846_init(); |
396 | overo_init_smsc911x(); | 399 | overo_init_smsc911x(); |
397 | 400 | ||
401 | /* Ensure SDRC pins are mux'd for self-refresh */ | ||
402 | omap_cfg_reg(H16_34XX_SDRC_CKE0); | ||
403 | omap_cfg_reg(H17_34XX_SDRC_CKE1); | ||
404 | |||
398 | if ((gpio_request(OVERO_GPIO_W2W_NRESET, | 405 | if ((gpio_request(OVERO_GPIO_W2W_NRESET, |
399 | "OVERO_GPIO_W2W_NRESET") == 0) && | 406 | "OVERO_GPIO_W2W_NRESET") == 0) && |
400 | (gpio_direction_output(OVERO_GPIO_W2W_NRESET, 1) == 0)) { | 407 | (gpio_direction_output(OVERO_GPIO_W2W_NRESET, 1) == 0)) { |
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 9a0bf6744a05..56d931a425f7 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c | |||
@@ -278,6 +278,10 @@ static struct twl4030_gpio_platform_data rx51_gpio_data = { | |||
278 | .setup = rx51_twlgpio_setup, | 278 | .setup = rx51_twlgpio_setup, |
279 | }; | 279 | }; |
280 | 280 | ||
281 | static struct twl4030_usb_data rx51_usb_data = { | ||
282 | .usb_mode = T2_USB_MODE_ULPI, | ||
283 | }; | ||
284 | |||
281 | static struct twl4030_platform_data rx51_twldata = { | 285 | static struct twl4030_platform_data rx51_twldata = { |
282 | .irq_base = TWL4030_IRQ_BASE, | 286 | .irq_base = TWL4030_IRQ_BASE, |
283 | .irq_end = TWL4030_IRQ_END, | 287 | .irq_end = TWL4030_IRQ_END, |
@@ -286,6 +290,7 @@ static struct twl4030_platform_data rx51_twldata = { | |||
286 | .gpio = &rx51_gpio_data, | 290 | .gpio = &rx51_gpio_data, |
287 | .keypad = &rx51_kp_data, | 291 | .keypad = &rx51_kp_data, |
288 | .madc = &rx51_madc_data, | 292 | .madc = &rx51_madc_data, |
293 | .usb = &rx51_usb_data, | ||
289 | 294 | ||
290 | .vaux1 = &rx51_vaux1, | 295 | .vaux1 = &rx51_vaux1, |
291 | .vaux2 = &rx51_vaux2, | 296 | .vaux2 = &rx51_vaux2, |
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index 374ff63c3eb2..1c9e07fe8266 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c | |||
@@ -61,7 +61,7 @@ static struct omap_board_config_kernel rx51_config[] = { | |||
61 | 61 | ||
62 | static void __init rx51_init_irq(void) | 62 | static void __init rx51_init_irq(void) |
63 | { | 63 | { |
64 | omap2_init_common_hw(NULL); | 64 | omap2_init_common_hw(NULL, NULL); |
65 | omap_init_irq(); | 65 | omap_init_irq(); |
66 | omap_gpio_init(); | 66 | omap_gpio_init(); |
67 | } | 67 | } |
@@ -75,6 +75,10 @@ static void __init rx51_init(void) | |||
75 | omap_serial_init(); | 75 | omap_serial_init(); |
76 | usb_musb_init(); | 76 | usb_musb_init(); |
77 | rx51_peripherals_init(); | 77 | rx51_peripherals_init(); |
78 | |||
79 | /* Ensure SDRC pins are mux'd for self-refresh */ | ||
80 | omap_cfg_reg(H16_34XX_SDRC_CKE0); | ||
81 | omap_cfg_reg(H17_34XX_SDRC_CKE1); | ||
78 | } | 82 | } |
79 | 83 | ||
80 | static void __init rx51_map_io(void) | 84 | static void __init rx51_map_io(void) |
diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c index bcc0f7632dea..427b7b8b1237 100644 --- a/arch/arm/mach-omap2/board-zoom2.c +++ b/arch/arm/mach-omap2/board-zoom2.c | |||
@@ -25,7 +25,7 @@ | |||
25 | 25 | ||
26 | static void __init omap_zoom2_init_irq(void) | 26 | static void __init omap_zoom2_init_irq(void) |
27 | { | 27 | { |
28 | omap2_init_common_hw(NULL); | 28 | omap2_init_common_hw(NULL, NULL); |
29 | omap_init_irq(); | 29 | omap_init_irq(); |
30 | omap_gpio_init(); | 30 | omap_gpio_init(); |
31 | } | 31 | } |
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index b0665f161c03..456e2ad5f621 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <mach/clock.h> | 27 | #include <mach/clock.h> |
28 | #include <mach/clockdomain.h> | 28 | #include <mach/clockdomain.h> |
29 | #include <mach/cpu.h> | 29 | #include <mach/cpu.h> |
30 | #include <mach/prcm.h> | ||
30 | #include <asm/div64.h> | 31 | #include <asm/div64.h> |
31 | 32 | ||
32 | #include <mach/sdrc.h> | 33 | #include <mach/sdrc.h> |
@@ -38,8 +39,6 @@ | |||
38 | #include "cm-regbits-24xx.h" | 39 | #include "cm-regbits-24xx.h" |
39 | #include "cm-regbits-34xx.h" | 40 | #include "cm-regbits-34xx.h" |
40 | 41 | ||
41 | #define MAX_CLOCK_ENABLE_WAIT 100000 | ||
42 | |||
43 | /* DPLL rate rounding: minimum DPLL multiplier, divider values */ | 42 | /* DPLL rate rounding: minimum DPLL multiplier, divider values */ |
44 | #define DPLL_MIN_MULTIPLIER 1 | 43 | #define DPLL_MIN_MULTIPLIER 1 |
45 | #define DPLL_MIN_DIVIDER 1 | 44 | #define DPLL_MIN_DIVIDER 1 |
@@ -274,83 +273,97 @@ unsigned long omap2_fixed_divisor_recalc(struct clk *clk) | |||
274 | } | 273 | } |
275 | 274 | ||
276 | /** | 275 | /** |
277 | * omap2_wait_clock_ready - wait for clock to enable | 276 | * omap2_clk_dflt_find_companion - find companion clock to @clk |
278 | * @reg: physical address of clock IDLEST register | 277 | * @clk: struct clk * to find the companion clock of |
279 | * @mask: value to mask against to determine if the clock is active | 278 | * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in |
280 | * @name: name of the clock (for printk) | 279 | * @other_bit: u8 ** to return the companion clock bit shift in |
280 | * | ||
281 | * Note: We don't need special code here for INVERT_ENABLE for the | ||
282 | * time being since INVERT_ENABLE only applies to clocks enabled by | ||
283 | * CM_CLKEN_PLL | ||
281 | * | 284 | * |
282 | * Returns 1 if the clock enabled in time, or 0 if it failed to enable | 285 | * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes it's |
283 | * in roughly MAX_CLOCK_ENABLE_WAIT microseconds. | 286 | * just a matter of XORing the bits. |
287 | * | ||
288 | * Some clocks don't have companion clocks. For example, modules with | ||
289 | * only an interface clock (such as MAILBOXES) don't have a companion | ||
290 | * clock. Right now, this code relies on the hardware exporting a bit | ||
291 | * in the correct companion register that indicates that the | ||
292 | * nonexistent 'companion clock' is active. Future patches will | ||
293 | * associate this type of code with per-module data structures to | ||
294 | * avoid this issue, and remove the casts. No return value. | ||
284 | */ | 295 | */ |
285 | int omap2_wait_clock_ready(void __iomem *reg, u32 mask, const char *name) | 296 | void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg, |
297 | u8 *other_bit) | ||
286 | { | 298 | { |
287 | int i = 0; | 299 | u32 r; |
288 | int ena = 0; | ||
289 | 300 | ||
290 | /* | 301 | /* |
291 | * 24xx uses 0 to indicate not ready, and 1 to indicate ready. | 302 | * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes |
292 | * 34xx reverses this, just to keep us on our toes | 303 | * it's just a matter of XORing the bits. |
293 | */ | 304 | */ |
294 | if (cpu_mask & (RATE_IN_242X | RATE_IN_243X)) | 305 | r = ((__force u32)clk->enable_reg ^ (CM_FCLKEN ^ CM_ICLKEN)); |
295 | ena = mask; | ||
296 | else if (cpu_mask & RATE_IN_343X) | ||
297 | ena = 0; | ||
298 | |||
299 | /* Wait for lock */ | ||
300 | while (((__raw_readl(reg) & mask) != ena) && | ||
301 | (i++ < MAX_CLOCK_ENABLE_WAIT)) { | ||
302 | udelay(1); | ||
303 | } | ||
304 | |||
305 | if (i <= MAX_CLOCK_ENABLE_WAIT) | ||
306 | pr_debug("Clock %s stable after %d loops\n", name, i); | ||
307 | else | ||
308 | printk(KERN_ERR "Clock %s didn't enable in %d tries\n", | ||
309 | name, MAX_CLOCK_ENABLE_WAIT); | ||
310 | |||
311 | |||
312 | return (i < MAX_CLOCK_ENABLE_WAIT) ? 1 : 0; | ||
313 | }; | ||
314 | 306 | ||
307 | *other_reg = (__force void __iomem *)r; | ||
308 | *other_bit = clk->enable_bit; | ||
309 | } | ||
315 | 310 | ||
316 | /* | 311 | /** |
317 | * Note: We don't need special code here for INVERT_ENABLE | 312 | * omap2_clk_dflt_find_idlest - find CM_IDLEST reg va, bit shift for @clk |
318 | * for the time being since INVERT_ENABLE only applies to clocks enabled by | 313 | * @clk: struct clk * to find IDLEST info for |
319 | * CM_CLKEN_PLL | 314 | * @idlest_reg: void __iomem ** to return the CM_IDLEST va in |
315 | * @idlest_bit: u8 ** to return the CM_IDLEST bit shift in | ||
316 | * | ||
317 | * Return the CM_IDLEST register address and bit shift corresponding | ||
318 | * to the module that "owns" this clock. This default code assumes | ||
319 | * that the CM_IDLEST bit shift is the CM_*CLKEN bit shift, and that | ||
320 | * the IDLEST register address ID corresponds to the CM_*CLKEN | ||
321 | * register address ID (e.g., that CM_FCLKEN2 corresponds to | ||
322 | * CM_IDLEST2). This is not true for all modules. No return value. | ||
320 | */ | 323 | */ |
321 | static void omap2_clk_wait_ready(struct clk *clk) | 324 | void omap2_clk_dflt_find_idlest(struct clk *clk, void __iomem **idlest_reg, |
325 | u8 *idlest_bit) | ||
322 | { | 326 | { |
323 | void __iomem *reg, *other_reg, *st_reg; | 327 | u32 r; |
324 | u32 bit; | ||
325 | 328 | ||
326 | /* | 329 | r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20); |
327 | * REVISIT: This code is pretty ugly. It would be nice to generalize | 330 | *idlest_reg = (__force void __iomem *)r; |
328 | * it and pull it into struct clk itself somehow. | 331 | *idlest_bit = clk->enable_bit; |
329 | */ | 332 | } |
330 | reg = clk->enable_reg; | ||
331 | 333 | ||
332 | /* | 334 | /** |
333 | * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes | 335 | * omap2_module_wait_ready - wait for an OMAP module to leave IDLE |
334 | * it's just a matter of XORing the bits. | 336 | * @clk: struct clk * belonging to the module |
335 | */ | 337 | * |
336 | other_reg = (void __iomem *)((u32)reg ^ (CM_FCLKEN ^ CM_ICLKEN)); | 338 | * If the necessary clocks for the OMAP hardware IP block that |
339 | * corresponds to clock @clk are enabled, then wait for the module to | ||
340 | * indicate readiness (i.e., to leave IDLE). This code does not | ||
341 | * belong in the clock code and will be moved in the medium term to | ||
342 | * module-dependent code. No return value. | ||
343 | */ | ||
344 | static void omap2_module_wait_ready(struct clk *clk) | ||
345 | { | ||
346 | void __iomem *companion_reg, *idlest_reg; | ||
347 | u8 other_bit, idlest_bit; | ||
348 | |||
349 | /* Not all modules have multiple clocks that their IDLEST depends on */ | ||
350 | if (clk->ops->find_companion) { | ||
351 | clk->ops->find_companion(clk, &companion_reg, &other_bit); | ||
352 | if (!(__raw_readl(companion_reg) & (1 << other_bit))) | ||
353 | return; | ||
354 | } | ||
337 | 355 | ||
338 | /* Check if both functional and interface clocks | 356 | clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit); |
339 | * are running. */ | ||
340 | bit = 1 << clk->enable_bit; | ||
341 | if (!(__raw_readl(other_reg) & bit)) | ||
342 | return; | ||
343 | st_reg = (void __iomem *)(((u32)other_reg & ~0xf0) | 0x20); /* CM_IDLEST* */ | ||
344 | 357 | ||
345 | omap2_wait_clock_ready(st_reg, bit, clk->name); | 358 | omap2_cm_wait_idlest(idlest_reg, (1 << idlest_bit), clk->name); |
346 | } | 359 | } |
347 | 360 | ||
348 | static int omap2_dflt_clk_enable(struct clk *clk) | 361 | int omap2_dflt_clk_enable(struct clk *clk) |
349 | { | 362 | { |
350 | u32 v; | 363 | u32 v; |
351 | 364 | ||
352 | if (unlikely(clk->enable_reg == NULL)) { | 365 | if (unlikely(clk->enable_reg == NULL)) { |
353 | printk(KERN_ERR "clock.c: Enable for %s without enable code\n", | 366 | pr_err("clock.c: Enable for %s without enable code\n", |
354 | clk->name); | 367 | clk->name); |
355 | return 0; /* REVISIT: -EINVAL */ | 368 | return 0; /* REVISIT: -EINVAL */ |
356 | } | 369 | } |
@@ -363,26 +376,13 @@ static int omap2_dflt_clk_enable(struct clk *clk) | |||
363 | __raw_writel(v, clk->enable_reg); | 376 | __raw_writel(v, clk->enable_reg); |
364 | v = __raw_readl(clk->enable_reg); /* OCP barrier */ | 377 | v = __raw_readl(clk->enable_reg); /* OCP barrier */ |
365 | 378 | ||
366 | return 0; | 379 | if (clk->ops->find_idlest) |
367 | } | 380 | omap2_module_wait_ready(clk); |
368 | 381 | ||
369 | static int omap2_dflt_clk_enable_wait(struct clk *clk) | 382 | return 0; |
370 | { | ||
371 | int ret; | ||
372 | |||
373 | if (!clk->enable_reg) { | ||
374 | printk(KERN_ERR "clock.c: Enable for %s without enable code\n", | ||
375 | clk->name); | ||
376 | return 0; /* REVISIT: -EINVAL */ | ||
377 | } | ||
378 | |||
379 | ret = omap2_dflt_clk_enable(clk); | ||
380 | if (ret == 0) | ||
381 | omap2_clk_wait_ready(clk); | ||
382 | return ret; | ||
383 | } | 383 | } |
384 | 384 | ||
385 | static void omap2_dflt_clk_disable(struct clk *clk) | 385 | void omap2_dflt_clk_disable(struct clk *clk) |
386 | { | 386 | { |
387 | u32 v; | 387 | u32 v; |
388 | 388 | ||
@@ -406,8 +406,10 @@ static void omap2_dflt_clk_disable(struct clk *clk) | |||
406 | } | 406 | } |
407 | 407 | ||
408 | const struct clkops clkops_omap2_dflt_wait = { | 408 | const struct clkops clkops_omap2_dflt_wait = { |
409 | .enable = omap2_dflt_clk_enable_wait, | 409 | .enable = omap2_dflt_clk_enable, |
410 | .disable = omap2_dflt_clk_disable, | 410 | .disable = omap2_dflt_clk_disable, |
411 | .find_companion = omap2_clk_dflt_find_companion, | ||
412 | .find_idlest = omap2_clk_dflt_find_idlest, | ||
411 | }; | 413 | }; |
412 | 414 | ||
413 | const struct clkops clkops_omap2_dflt = { | 415 | const struct clkops clkops_omap2_dflt = { |
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index 2679ddfa6424..9ae7540f8af2 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h | |||
@@ -65,6 +65,12 @@ int omap2_clksel_set_rate(struct clk *clk, unsigned long rate); | |||
65 | u32 omap2_get_dpll_rate(struct clk *clk); | 65 | u32 omap2_get_dpll_rate(struct clk *clk); |
66 | int omap2_wait_clock_ready(void __iomem *reg, u32 cval, const char *name); | 66 | int omap2_wait_clock_ready(void __iomem *reg, u32 cval, const char *name); |
67 | void omap2_clk_prepare_for_reboot(void); | 67 | void omap2_clk_prepare_for_reboot(void); |
68 | int omap2_dflt_clk_enable(struct clk *clk); | ||
69 | void omap2_dflt_clk_disable(struct clk *clk); | ||
70 | void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg, | ||
71 | u8 *other_bit); | ||
72 | void omap2_clk_dflt_find_idlest(struct clk *clk, void __iomem **idlest_reg, | ||
73 | u8 *idlest_bit); | ||
68 | 74 | ||
69 | extern const struct clkops clkops_omap2_dflt_wait; | 75 | extern const struct clkops clkops_omap2_dflt_wait; |
70 | extern const struct clkops clkops_omap2_dflt; | 76 | extern const struct clkops clkops_omap2_dflt; |
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c index 44de0271fc2f..bc5d3ac66611 100644 --- a/arch/arm/mach-omap2/clock24xx.c +++ b/arch/arm/mach-omap2/clock24xx.c | |||
@@ -30,6 +30,7 @@ | |||
30 | 30 | ||
31 | #include <mach/clock.h> | 31 | #include <mach/clock.h> |
32 | #include <mach/sram.h> | 32 | #include <mach/sram.h> |
33 | #include <mach/prcm.h> | ||
33 | #include <asm/div64.h> | 34 | #include <asm/div64.h> |
34 | #include <asm/clkdev.h> | 35 | #include <asm/clkdev.h> |
35 | 36 | ||
@@ -43,6 +44,18 @@ | |||
43 | static const struct clkops clkops_oscck; | 44 | static const struct clkops clkops_oscck; |
44 | static const struct clkops clkops_fixed; | 45 | static const struct clkops clkops_fixed; |
45 | 46 | ||
47 | static void omap2430_clk_i2chs_find_idlest(struct clk *clk, | ||
48 | void __iomem **idlest_reg, | ||
49 | u8 *idlest_bit); | ||
50 | |||
51 | /* 2430 I2CHS has non-standard IDLEST register */ | ||
52 | static const struct clkops clkops_omap2430_i2chs_wait = { | ||
53 | .enable = omap2_dflt_clk_enable, | ||
54 | .disable = omap2_dflt_clk_disable, | ||
55 | .find_idlest = omap2430_clk_i2chs_find_idlest, | ||
56 | .find_companion = omap2_clk_dflt_find_companion, | ||
57 | }; | ||
58 | |||
46 | #include "clock24xx.h" | 59 | #include "clock24xx.h" |
47 | 60 | ||
48 | struct omap_clk { | 61 | struct omap_clk { |
@@ -240,6 +253,26 @@ static void __iomem *prcm_clksrc_ctrl; | |||
240 | *-------------------------------------------------------------------------*/ | 253 | *-------------------------------------------------------------------------*/ |
241 | 254 | ||
242 | /** | 255 | /** |
256 | * omap2430_clk_i2chs_find_idlest - return CM_IDLEST info for 2430 I2CHS | ||
257 | * @clk: struct clk * being enabled | ||
258 | * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into | ||
259 | * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into | ||
260 | * | ||
261 | * OMAP2430 I2CHS CM_IDLEST bits are in CM_IDLEST1_CORE, but the | ||
262 | * CM_*CLKEN bits are in CM_{I,F}CLKEN2_CORE. This custom function | ||
263 | * passes back the correct CM_IDLEST register address for I2CHS | ||
264 | * modules. No return value. | ||
265 | */ | ||
266 | static void omap2430_clk_i2chs_find_idlest(struct clk *clk, | ||
267 | void __iomem **idlest_reg, | ||
268 | u8 *idlest_bit) | ||
269 | { | ||
270 | *idlest_reg = OMAP_CM_REGADDR(CORE_MOD, CM_IDLEST); | ||
271 | *idlest_bit = clk->enable_bit; | ||
272 | } | ||
273 | |||
274 | |||
275 | /** | ||
243 | * omap2xxx_clk_get_core_rate - return the CORE_CLK rate | 276 | * omap2xxx_clk_get_core_rate - return the CORE_CLK rate |
244 | * @clk: pointer to the combined dpll_ck + core_ck (currently "dpll_ck") | 277 | * @clk: pointer to the combined dpll_ck + core_ck (currently "dpll_ck") |
245 | * | 278 | * |
@@ -325,8 +358,8 @@ static int omap2_clk_fixed_enable(struct clk *clk) | |||
325 | else if (clk == &apll54_ck) | 358 | else if (clk == &apll54_ck) |
326 | cval = OMAP24XX_ST_54M_APLL; | 359 | cval = OMAP24XX_ST_54M_APLL; |
327 | 360 | ||
328 | omap2_wait_clock_ready(OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), cval, | 361 | omap2_cm_wait_idlest(OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), cval, |
329 | clk->name); | 362 | clk->name); |
330 | 363 | ||
331 | /* | 364 | /* |
332 | * REVISIT: Should we return an error code if omap2_wait_clock_ready() | 365 | * REVISIT: Should we return an error code if omap2_wait_clock_ready() |
diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h index 458f00cdcbea..d19cf7a7d8db 100644 --- a/arch/arm/mach-omap2/clock24xx.h +++ b/arch/arm/mach-omap2/clock24xx.h | |||
@@ -2337,7 +2337,7 @@ static struct clk i2c2_fck = { | |||
2337 | 2337 | ||
2338 | static struct clk i2chs2_fck = { | 2338 | static struct clk i2chs2_fck = { |
2339 | .name = "i2c_fck", | 2339 | .name = "i2c_fck", |
2340 | .ops = &clkops_omap2_dflt_wait, | 2340 | .ops = &clkops_omap2430_i2chs_wait, |
2341 | .id = 2, | 2341 | .id = 2, |
2342 | .parent = &func_96m_ck, | 2342 | .parent = &func_96m_ck, |
2343 | .clkdm_name = "core_l4_clkdm", | 2343 | .clkdm_name = "core_l4_clkdm", |
@@ -2370,7 +2370,7 @@ static struct clk i2c1_fck = { | |||
2370 | 2370 | ||
2371 | static struct clk i2chs1_fck = { | 2371 | static struct clk i2chs1_fck = { |
2372 | .name = "i2c_fck", | 2372 | .name = "i2c_fck", |
2373 | .ops = &clkops_omap2_dflt_wait, | 2373 | .ops = &clkops_omap2430_i2chs_wait, |
2374 | .id = 1, | 2374 | .id = 1, |
2375 | .parent = &func_96m_ck, | 2375 | .parent = &func_96m_ck, |
2376 | .clkdm_name = "core_l4_clkdm", | 2376 | .clkdm_name = "core_l4_clkdm", |
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index 045da923e75b..cd7819cc0c9e 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * OMAP3-specific clock framework functions | 2 | * OMAP3-specific clock framework functions |
3 | * | 3 | * |
4 | * Copyright (C) 2007-2008 Texas Instruments, Inc. | 4 | * Copyright (C) 2007-2008 Texas Instruments, Inc. |
5 | * Copyright (C) 2007-2008 Nokia Corporation | 5 | * Copyright (C) 2007-2009 Nokia Corporation |
6 | * | 6 | * |
7 | * Written by Paul Walmsley | 7 | * Written by Paul Walmsley |
8 | * Testing and integration fixes by Jouni Högander | 8 | * Testing and integration fixes by Jouni Högander |
@@ -41,6 +41,37 @@ | |||
41 | 41 | ||
42 | static const struct clkops clkops_noncore_dpll_ops; | 42 | static const struct clkops clkops_noncore_dpll_ops; |
43 | 43 | ||
44 | static void omap3430es2_clk_ssi_find_idlest(struct clk *clk, | ||
45 | void __iomem **idlest_reg, | ||
46 | u8 *idlest_bit); | ||
47 | static void omap3430es2_clk_hsotgusb_find_idlest(struct clk *clk, | ||
48 | void __iomem **idlest_reg, | ||
49 | u8 *idlest_bit); | ||
50 | static void omap3430es2_clk_dss_usbhost_find_idlest(struct clk *clk, | ||
51 | void __iomem **idlest_reg, | ||
52 | u8 *idlest_bit); | ||
53 | |||
54 | static const struct clkops clkops_omap3430es2_ssi_wait = { | ||
55 | .enable = omap2_dflt_clk_enable, | ||
56 | .disable = omap2_dflt_clk_disable, | ||
57 | .find_idlest = omap3430es2_clk_ssi_find_idlest, | ||
58 | .find_companion = omap2_clk_dflt_find_companion, | ||
59 | }; | ||
60 | |||
61 | static const struct clkops clkops_omap3430es2_hsotgusb_wait = { | ||
62 | .enable = omap2_dflt_clk_enable, | ||
63 | .disable = omap2_dflt_clk_disable, | ||
64 | .find_idlest = omap3430es2_clk_hsotgusb_find_idlest, | ||
65 | .find_companion = omap2_clk_dflt_find_companion, | ||
66 | }; | ||
67 | |||
68 | static const struct clkops clkops_omap3430es2_dss_usbhost_wait = { | ||
69 | .enable = omap2_dflt_clk_enable, | ||
70 | .disable = omap2_dflt_clk_disable, | ||
71 | .find_idlest = omap3430es2_clk_dss_usbhost_find_idlest, | ||
72 | .find_companion = omap2_clk_dflt_find_companion, | ||
73 | }; | ||
74 | |||
44 | #include "clock34xx.h" | 75 | #include "clock34xx.h" |
45 | 76 | ||
46 | struct omap_clk { | 77 | struct omap_clk { |
@@ -157,10 +188,13 @@ static struct omap_clk omap34xx_clks[] = { | |||
157 | CLK(NULL, "fshostusb_fck", &fshostusb_fck, CK_3430ES1), | 188 | CLK(NULL, "fshostusb_fck", &fshostusb_fck, CK_3430ES1), |
158 | CLK(NULL, "core_12m_fck", &core_12m_fck, CK_343X), | 189 | CLK(NULL, "core_12m_fck", &core_12m_fck, CK_343X), |
159 | CLK("omap_hdq.0", "fck", &hdq_fck, CK_343X), | 190 | CLK("omap_hdq.0", "fck", &hdq_fck, CK_343X), |
160 | CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck, CK_343X), | 191 | CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es1, CK_3430ES1), |
161 | CLK(NULL, "ssi_sst_fck", &ssi_sst_fck, CK_343X), | 192 | CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es2, CK_3430ES2), |
193 | CLK(NULL, "ssi_sst_fck", &ssi_sst_fck_3430es1, CK_3430ES1), | ||
194 | CLK(NULL, "ssi_sst_fck", &ssi_sst_fck_3430es2, CK_3430ES2), | ||
162 | CLK(NULL, "core_l3_ick", &core_l3_ick, CK_343X), | 195 | CLK(NULL, "core_l3_ick", &core_l3_ick, CK_343X), |
163 | CLK("musb_hdrc", "ick", &hsotgusb_ick, CK_343X), | 196 | CLK("musb_hdrc", "ick", &hsotgusb_ick_3430es1, CK_3430ES1), |
197 | CLK("musb_hdrc", "ick", &hsotgusb_ick_3430es2, CK_3430ES2), | ||
164 | CLK(NULL, "sdrc_ick", &sdrc_ick, CK_343X), | 198 | CLK(NULL, "sdrc_ick", &sdrc_ick, CK_343X), |
165 | CLK(NULL, "gpmc_fck", &gpmc_fck, CK_343X), | 199 | CLK(NULL, "gpmc_fck", &gpmc_fck, CK_343X), |
166 | CLK(NULL, "security_l3_ick", &security_l3_ick, CK_343X), | 200 | CLK(NULL, "security_l3_ick", &security_l3_ick, CK_343X), |
@@ -193,18 +227,21 @@ static struct omap_clk omap34xx_clks[] = { | |||
193 | CLK(NULL, "mailboxes_ick", &mailboxes_ick, CK_343X), | 227 | CLK(NULL, "mailboxes_ick", &mailboxes_ick, CK_343X), |
194 | CLK(NULL, "omapctrl_ick", &omapctrl_ick, CK_343X), | 228 | CLK(NULL, "omapctrl_ick", &omapctrl_ick, CK_343X), |
195 | CLK(NULL, "ssi_l4_ick", &ssi_l4_ick, CK_343X), | 229 | CLK(NULL, "ssi_l4_ick", &ssi_l4_ick, CK_343X), |
196 | CLK(NULL, "ssi_ick", &ssi_ick, CK_343X), | 230 | CLK(NULL, "ssi_ick", &ssi_ick_3430es1, CK_3430ES1), |
231 | CLK(NULL, "ssi_ick", &ssi_ick_3430es2, CK_3430ES2), | ||
197 | CLK(NULL, "usb_l4_ick", &usb_l4_ick, CK_3430ES1), | 232 | CLK(NULL, "usb_l4_ick", &usb_l4_ick, CK_3430ES1), |
198 | CLK(NULL, "security_l4_ick2", &security_l4_ick2, CK_343X), | 233 | CLK(NULL, "security_l4_ick2", &security_l4_ick2, CK_343X), |
199 | CLK(NULL, "aes1_ick", &aes1_ick, CK_343X), | 234 | CLK(NULL, "aes1_ick", &aes1_ick, CK_343X), |
200 | CLK("omap_rng", "ick", &rng_ick, CK_343X), | 235 | CLK("omap_rng", "ick", &rng_ick, CK_343X), |
201 | CLK(NULL, "sha11_ick", &sha11_ick, CK_343X), | 236 | CLK(NULL, "sha11_ick", &sha11_ick, CK_343X), |
202 | CLK(NULL, "des1_ick", &des1_ick, CK_343X), | 237 | CLK(NULL, "des1_ick", &des1_ick, CK_343X), |
203 | CLK("omapfb", "dss1_fck", &dss1_alwon_fck, CK_343X), | 238 | CLK("omapfb", "dss1_fck", &dss1_alwon_fck_3430es1, CK_3430ES1), |
239 | CLK("omapfb", "dss1_fck", &dss1_alwon_fck_3430es2, CK_3430ES2), | ||
204 | CLK("omapfb", "tv_fck", &dss_tv_fck, CK_343X), | 240 | CLK("omapfb", "tv_fck", &dss_tv_fck, CK_343X), |
205 | CLK("omapfb", "video_fck", &dss_96m_fck, CK_343X), | 241 | CLK("omapfb", "video_fck", &dss_96m_fck, CK_343X), |
206 | CLK("omapfb", "dss2_fck", &dss2_alwon_fck, CK_343X), | 242 | CLK("omapfb", "dss2_fck", &dss2_alwon_fck, CK_343X), |
207 | CLK("omapfb", "ick", &dss_ick, CK_343X), | 243 | CLK("omapfb", "ick", &dss_ick_3430es1, CK_3430ES1), |
244 | CLK("omapfb", "ick", &dss_ick_3430es2, CK_3430ES2), | ||
208 | CLK(NULL, "cam_mclk", &cam_mclk, CK_343X), | 245 | CLK(NULL, "cam_mclk", &cam_mclk, CK_343X), |
209 | CLK(NULL, "cam_ick", &cam_ick, CK_343X), | 246 | CLK(NULL, "cam_ick", &cam_ick, CK_343X), |
210 | CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_343X), | 247 | CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_343X), |
@@ -301,6 +338,73 @@ static struct omap_clk omap34xx_clks[] = { | |||
301 | #define SDRC_MPURATE_LOOPS 96 | 338 | #define SDRC_MPURATE_LOOPS 96 |
302 | 339 | ||
303 | /** | 340 | /** |
341 | * omap3430es2_clk_ssi_find_idlest - return CM_IDLEST info for SSI | ||
342 | * @clk: struct clk * being enabled | ||
343 | * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into | ||
344 | * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into | ||
345 | * | ||
346 | * The OMAP3430ES2 SSI target CM_IDLEST bit is at a different shift | ||
347 | * from the CM_{I,F}CLKEN bit. Pass back the correct info via | ||
348 | * @idlest_reg and @idlest_bit. No return value. | ||
349 | */ | ||
350 | static void omap3430es2_clk_ssi_find_idlest(struct clk *clk, | ||
351 | void __iomem **idlest_reg, | ||
352 | u8 *idlest_bit) | ||
353 | { | ||
354 | u32 r; | ||
355 | |||
356 | r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20); | ||
357 | *idlest_reg = (__force void __iomem *)r; | ||
358 | *idlest_bit = OMAP3430ES2_ST_SSI_IDLE_SHIFT; | ||
359 | } | ||
360 | |||
361 | /** | ||
362 | * omap3430es2_clk_dss_usbhost_find_idlest - CM_IDLEST info for DSS, USBHOST | ||
363 | * @clk: struct clk * being enabled | ||
364 | * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into | ||
365 | * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into | ||
366 | * | ||
367 | * Some OMAP modules on OMAP3 ES2+ chips have both initiator and | ||
368 | * target IDLEST bits. For our purposes, we are concerned with the | ||
369 | * target IDLEST bits, which exist at a different bit position than | ||
370 | * the *CLKEN bit position for these modules (DSS and USBHOST) (The | ||
371 | * default find_idlest code assumes that they are at the same | ||
372 | * position.) No return value. | ||
373 | */ | ||
374 | static void omap3430es2_clk_dss_usbhost_find_idlest(struct clk *clk, | ||
375 | void __iomem **idlest_reg, | ||
376 | u8 *idlest_bit) | ||
377 | { | ||
378 | u32 r; | ||
379 | |||
380 | r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20); | ||
381 | *idlest_reg = (__force void __iomem *)r; | ||
382 | /* USBHOST_IDLE has same shift */ | ||
383 | *idlest_bit = OMAP3430ES2_ST_DSS_IDLE_SHIFT; | ||
384 | } | ||
385 | |||
386 | /** | ||
387 | * omap3430es2_clk_hsotgusb_find_idlest - return CM_IDLEST info for HSOTGUSB | ||
388 | * @clk: struct clk * being enabled | ||
389 | * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into | ||
390 | * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into | ||
391 | * | ||
392 | * The OMAP3430ES2 HSOTGUSB target CM_IDLEST bit is at a different | ||
393 | * shift from the CM_{I,F}CLKEN bit. Pass back the correct info via | ||
394 | * @idlest_reg and @idlest_bit. No return value. | ||
395 | */ | ||
396 | static void omap3430es2_clk_hsotgusb_find_idlest(struct clk *clk, | ||
397 | void __iomem **idlest_reg, | ||
398 | u8 *idlest_bit) | ||
399 | { | ||
400 | u32 r; | ||
401 | |||
402 | r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20); | ||
403 | *idlest_reg = (__force void __iomem *)r; | ||
404 | *idlest_bit = OMAP3430ES2_ST_HSOTGUSB_IDLE_SHIFT; | ||
405 | } | ||
406 | |||
407 | /** | ||
304 | * omap3_dpll_recalc - recalculate DPLL rate | 408 | * omap3_dpll_recalc - recalculate DPLL rate |
305 | * @clk: DPLL struct clk | 409 | * @clk: DPLL struct clk |
306 | * | 410 | * |
@@ -725,7 +829,9 @@ static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate) | |||
725 | u32 unlock_dll = 0; | 829 | u32 unlock_dll = 0; |
726 | u32 c; | 830 | u32 c; |
727 | unsigned long validrate, sdrcrate, mpurate; | 831 | unsigned long validrate, sdrcrate, mpurate; |
728 | struct omap_sdrc_params *sp; | 832 | struct omap_sdrc_params *sdrc_cs0; |
833 | struct omap_sdrc_params *sdrc_cs1; | ||
834 | int ret; | ||
729 | 835 | ||
730 | if (!clk || !rate) | 836 | if (!clk || !rate) |
731 | return -EINVAL; | 837 | return -EINVAL; |
@@ -743,8 +849,8 @@ static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate) | |||
743 | else | 849 | else |
744 | sdrcrate >>= ((clk->rate / rate) >> 1); | 850 | sdrcrate >>= ((clk->rate / rate) >> 1); |
745 | 851 | ||
746 | sp = omap2_sdrc_get_params(sdrcrate); | 852 | ret = omap2_sdrc_get_params(sdrcrate, &sdrc_cs0, &sdrc_cs1); |
747 | if (!sp) | 853 | if (ret) |
748 | return -EINVAL; | 854 | return -EINVAL; |
749 | 855 | ||
750 | if (sdrcrate < MIN_SDRC_DLL_LOCK_FREQ) { | 856 | if (sdrcrate < MIN_SDRC_DLL_LOCK_FREQ) { |
@@ -765,12 +871,29 @@ static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate) | |||
765 | 871 | ||
766 | pr_debug("clock: changing CORE DPLL rate from %lu to %lu\n", clk->rate, | 872 | pr_debug("clock: changing CORE DPLL rate from %lu to %lu\n", clk->rate, |
767 | validrate); | 873 | validrate); |
768 | pr_debug("clock: SDRC timing params used: %08x %08x %08x\n", | 874 | pr_debug("clock: SDRC CS0 timing params used:" |
769 | sp->rfr_ctrl, sp->actim_ctrla, sp->actim_ctrlb); | 875 | " RFR %08x CTRLA %08x CTRLB %08x MR %08x\n", |
770 | 876 | sdrc_cs0->rfr_ctrl, sdrc_cs0->actim_ctrla, | |
771 | omap3_configure_core_dpll(sp->rfr_ctrl, sp->actim_ctrla, | 877 | sdrc_cs0->actim_ctrlb, sdrc_cs0->mr); |
772 | sp->actim_ctrlb, new_div, unlock_dll, c, | 878 | if (sdrc_cs1) |
773 | sp->mr, rate > clk->rate); | 879 | pr_debug("clock: SDRC CS1 timing params used: " |
880 | " RFR %08x CTRLA %08x CTRLB %08x MR %08x\n", | ||
881 | sdrc_cs1->rfr_ctrl, sdrc_cs1->actim_ctrla, | ||
882 | sdrc_cs1->actim_ctrlb, sdrc_cs1->mr); | ||
883 | |||
884 | if (sdrc_cs1) | ||
885 | omap3_configure_core_dpll( | ||
886 | new_div, unlock_dll, c, rate > clk->rate, | ||
887 | sdrc_cs0->rfr_ctrl, sdrc_cs0->actim_ctrla, | ||
888 | sdrc_cs0->actim_ctrlb, sdrc_cs0->mr, | ||
889 | sdrc_cs1->rfr_ctrl, sdrc_cs1->actim_ctrla, | ||
890 | sdrc_cs1->actim_ctrlb, sdrc_cs1->mr); | ||
891 | else | ||
892 | omap3_configure_core_dpll( | ||
893 | new_div, unlock_dll, c, rate > clk->rate, | ||
894 | sdrc_cs0->rfr_ctrl, sdrc_cs0->actim_ctrla, | ||
895 | sdrc_cs0->actim_ctrlb, sdrc_cs0->mr, | ||
896 | 0, 0, 0, 0); | ||
774 | 897 | ||
775 | return 0; | 898 | return 0; |
776 | } | 899 | } |
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index e433aec4efdd..57cc2725b923 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h | |||
@@ -1568,7 +1568,7 @@ static const struct clksel ssi_ssr_clksel[] = { | |||
1568 | { .parent = NULL } | 1568 | { .parent = NULL } |
1569 | }; | 1569 | }; |
1570 | 1570 | ||
1571 | static struct clk ssi_ssr_fck = { | 1571 | static struct clk ssi_ssr_fck_3430es1 = { |
1572 | .name = "ssi_ssr_fck", | 1572 | .name = "ssi_ssr_fck", |
1573 | .ops = &clkops_omap2_dflt, | 1573 | .ops = &clkops_omap2_dflt, |
1574 | .init = &omap2_init_clksel_parent, | 1574 | .init = &omap2_init_clksel_parent, |
@@ -1581,10 +1581,31 @@ static struct clk ssi_ssr_fck = { | |||
1581 | .recalc = &omap2_clksel_recalc, | 1581 | .recalc = &omap2_clksel_recalc, |
1582 | }; | 1582 | }; |
1583 | 1583 | ||
1584 | static struct clk ssi_sst_fck = { | 1584 | static struct clk ssi_ssr_fck_3430es2 = { |
1585 | .name = "ssi_ssr_fck", | ||
1586 | .ops = &clkops_omap3430es2_ssi_wait, | ||
1587 | .init = &omap2_init_clksel_parent, | ||
1588 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), | ||
1589 | .enable_bit = OMAP3430_EN_SSI_SHIFT, | ||
1590 | .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL), | ||
1591 | .clksel_mask = OMAP3430_CLKSEL_SSI_MASK, | ||
1592 | .clksel = ssi_ssr_clksel, | ||
1593 | .clkdm_name = "core_l4_clkdm", | ||
1594 | .recalc = &omap2_clksel_recalc, | ||
1595 | }; | ||
1596 | |||
1597 | static struct clk ssi_sst_fck_3430es1 = { | ||
1585 | .name = "ssi_sst_fck", | 1598 | .name = "ssi_sst_fck", |
1586 | .ops = &clkops_null, | 1599 | .ops = &clkops_null, |
1587 | .parent = &ssi_ssr_fck, | 1600 | .parent = &ssi_ssr_fck_3430es1, |
1601 | .fixed_div = 2, | ||
1602 | .recalc = &omap2_fixed_divisor_recalc, | ||
1603 | }; | ||
1604 | |||
1605 | static struct clk ssi_sst_fck_3430es2 = { | ||
1606 | .name = "ssi_sst_fck", | ||
1607 | .ops = &clkops_null, | ||
1608 | .parent = &ssi_ssr_fck_3430es2, | ||
1588 | .fixed_div = 2, | 1609 | .fixed_div = 2, |
1589 | .recalc = &omap2_fixed_divisor_recalc, | 1610 | .recalc = &omap2_fixed_divisor_recalc, |
1590 | }; | 1611 | }; |
@@ -1606,9 +1627,19 @@ static struct clk core_l3_ick = { | |||
1606 | .recalc = &followparent_recalc, | 1627 | .recalc = &followparent_recalc, |
1607 | }; | 1628 | }; |
1608 | 1629 | ||
1609 | static struct clk hsotgusb_ick = { | 1630 | static struct clk hsotgusb_ick_3430es1 = { |
1610 | .name = "hsotgusb_ick", | 1631 | .name = "hsotgusb_ick", |
1611 | .ops = &clkops_omap2_dflt_wait, | 1632 | .ops = &clkops_omap2_dflt, |
1633 | .parent = &core_l3_ick, | ||
1634 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), | ||
1635 | .enable_bit = OMAP3430_EN_HSOTGUSB_SHIFT, | ||
1636 | .clkdm_name = "core_l3_clkdm", | ||
1637 | .recalc = &followparent_recalc, | ||
1638 | }; | ||
1639 | |||
1640 | static struct clk hsotgusb_ick_3430es2 = { | ||
1641 | .name = "hsotgusb_ick", | ||
1642 | .ops = &clkops_omap3430es2_hsotgusb_wait, | ||
1612 | .parent = &core_l3_ick, | 1643 | .parent = &core_l3_ick, |
1613 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), | 1644 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), |
1614 | .enable_bit = OMAP3430_EN_HSOTGUSB_SHIFT, | 1645 | .enable_bit = OMAP3430_EN_HSOTGUSB_SHIFT, |
@@ -1947,7 +1978,7 @@ static struct clk ssi_l4_ick = { | |||
1947 | .recalc = &followparent_recalc, | 1978 | .recalc = &followparent_recalc, |
1948 | }; | 1979 | }; |
1949 | 1980 | ||
1950 | static struct clk ssi_ick = { | 1981 | static struct clk ssi_ick_3430es1 = { |
1951 | .name = "ssi_ick", | 1982 | .name = "ssi_ick", |
1952 | .ops = &clkops_omap2_dflt, | 1983 | .ops = &clkops_omap2_dflt, |
1953 | .parent = &ssi_l4_ick, | 1984 | .parent = &ssi_l4_ick, |
@@ -1957,6 +1988,16 @@ static struct clk ssi_ick = { | |||
1957 | .recalc = &followparent_recalc, | 1988 | .recalc = &followparent_recalc, |
1958 | }; | 1989 | }; |
1959 | 1990 | ||
1991 | static struct clk ssi_ick_3430es2 = { | ||
1992 | .name = "ssi_ick", | ||
1993 | .ops = &clkops_omap3430es2_ssi_wait, | ||
1994 | .parent = &ssi_l4_ick, | ||
1995 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), | ||
1996 | .enable_bit = OMAP3430_EN_SSI_SHIFT, | ||
1997 | .clkdm_name = "core_l4_clkdm", | ||
1998 | .recalc = &followparent_recalc, | ||
1999 | }; | ||
2000 | |||
1960 | /* REVISIT: Technically the TRM claims that this is CORE_CLK based, | 2001 | /* REVISIT: Technically the TRM claims that this is CORE_CLK based, |
1961 | * but l4_ick makes more sense to me */ | 2002 | * but l4_ick makes more sense to me */ |
1962 | 2003 | ||
@@ -2024,7 +2065,7 @@ static struct clk des1_ick = { | |||
2024 | }; | 2065 | }; |
2025 | 2066 | ||
2026 | /* DSS */ | 2067 | /* DSS */ |
2027 | static struct clk dss1_alwon_fck = { | 2068 | static struct clk dss1_alwon_fck_3430es1 = { |
2028 | .name = "dss1_alwon_fck", | 2069 | .name = "dss1_alwon_fck", |
2029 | .ops = &clkops_omap2_dflt, | 2070 | .ops = &clkops_omap2_dflt, |
2030 | .parent = &dpll4_m4x2_ck, | 2071 | .parent = &dpll4_m4x2_ck, |
@@ -2034,6 +2075,16 @@ static struct clk dss1_alwon_fck = { | |||
2034 | .recalc = &followparent_recalc, | 2075 | .recalc = &followparent_recalc, |
2035 | }; | 2076 | }; |
2036 | 2077 | ||
2078 | static struct clk dss1_alwon_fck_3430es2 = { | ||
2079 | .name = "dss1_alwon_fck", | ||
2080 | .ops = &clkops_omap3430es2_dss_usbhost_wait, | ||
2081 | .parent = &dpll4_m4x2_ck, | ||
2082 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), | ||
2083 | .enable_bit = OMAP3430_EN_DSS1_SHIFT, | ||
2084 | .clkdm_name = "dss_clkdm", | ||
2085 | .recalc = &followparent_recalc, | ||
2086 | }; | ||
2087 | |||
2037 | static struct clk dss_tv_fck = { | 2088 | static struct clk dss_tv_fck = { |
2038 | .name = "dss_tv_fck", | 2089 | .name = "dss_tv_fck", |
2039 | .ops = &clkops_omap2_dflt, | 2090 | .ops = &clkops_omap2_dflt, |
@@ -2067,7 +2118,7 @@ static struct clk dss2_alwon_fck = { | |||
2067 | .recalc = &followparent_recalc, | 2118 | .recalc = &followparent_recalc, |
2068 | }; | 2119 | }; |
2069 | 2120 | ||
2070 | static struct clk dss_ick = { | 2121 | static struct clk dss_ick_3430es1 = { |
2071 | /* Handles both L3 and L4 clocks */ | 2122 | /* Handles both L3 and L4 clocks */ |
2072 | .name = "dss_ick", | 2123 | .name = "dss_ick", |
2073 | .ops = &clkops_omap2_dflt, | 2124 | .ops = &clkops_omap2_dflt, |
@@ -2079,6 +2130,18 @@ static struct clk dss_ick = { | |||
2079 | .recalc = &followparent_recalc, | 2130 | .recalc = &followparent_recalc, |
2080 | }; | 2131 | }; |
2081 | 2132 | ||
2133 | static struct clk dss_ick_3430es2 = { | ||
2134 | /* Handles both L3 and L4 clocks */ | ||
2135 | .name = "dss_ick", | ||
2136 | .ops = &clkops_omap3430es2_dss_usbhost_wait, | ||
2137 | .parent = &l4_ick, | ||
2138 | .init = &omap2_init_clk_clkdm, | ||
2139 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN), | ||
2140 | .enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT, | ||
2141 | .clkdm_name = "dss_clkdm", | ||
2142 | .recalc = &followparent_recalc, | ||
2143 | }; | ||
2144 | |||
2082 | /* CAM */ | 2145 | /* CAM */ |
2083 | 2146 | ||
2084 | static struct clk cam_mclk = { | 2147 | static struct clk cam_mclk = { |
@@ -2118,7 +2181,7 @@ static struct clk csi2_96m_fck = { | |||
2118 | 2181 | ||
2119 | static struct clk usbhost_120m_fck = { | 2182 | static struct clk usbhost_120m_fck = { |
2120 | .name = "usbhost_120m_fck", | 2183 | .name = "usbhost_120m_fck", |
2121 | .ops = &clkops_omap2_dflt_wait, | 2184 | .ops = &clkops_omap2_dflt, |
2122 | .parent = &dpll5_m2_ck, | 2185 | .parent = &dpll5_m2_ck, |
2123 | .init = &omap2_init_clk_clkdm, | 2186 | .init = &omap2_init_clk_clkdm, |
2124 | .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), | 2187 | .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), |
@@ -2129,7 +2192,7 @@ static struct clk usbhost_120m_fck = { | |||
2129 | 2192 | ||
2130 | static struct clk usbhost_48m_fck = { | 2193 | static struct clk usbhost_48m_fck = { |
2131 | .name = "usbhost_48m_fck", | 2194 | .name = "usbhost_48m_fck", |
2132 | .ops = &clkops_omap2_dflt_wait, | 2195 | .ops = &clkops_omap3430es2_dss_usbhost_wait, |
2133 | .parent = &omap_48m_fck, | 2196 | .parent = &omap_48m_fck, |
2134 | .init = &omap2_init_clk_clkdm, | 2197 | .init = &omap2_init_clk_clkdm, |
2135 | .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), | 2198 | .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), |
@@ -2141,7 +2204,7 @@ static struct clk usbhost_48m_fck = { | |||
2141 | static struct clk usbhost_ick = { | 2204 | static struct clk usbhost_ick = { |
2142 | /* Handles both L3 and L4 clocks */ | 2205 | /* Handles both L3 and L4 clocks */ |
2143 | .name = "usbhost_ick", | 2206 | .name = "usbhost_ick", |
2144 | .ops = &clkops_omap2_dflt_wait, | 2207 | .ops = &clkops_omap3430es2_dss_usbhost_wait, |
2145 | .parent = &l4_ick, | 2208 | .parent = &l4_ick, |
2146 | .init = &omap2_init_clk_clkdm, | 2209 | .init = &omap2_init_clk_clkdm, |
2147 | .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN), | 2210 | .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN), |
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h index 1d3c93bf86d3..f3c91a1ca391 100644 --- a/arch/arm/mach-omap2/cm.h +++ b/arch/arm/mach-omap2/cm.h | |||
@@ -29,9 +29,9 @@ | |||
29 | * These registers appear once per CM module. | 29 | * These registers appear once per CM module. |
30 | */ | 30 | */ |
31 | 31 | ||
32 | #define OMAP3430_CM_REVISION OMAP_CM_REGADDR(OCP_MOD, 0x0000) | 32 | #define OMAP3430_CM_REVISION OMAP34XX_CM_REGADDR(OCP_MOD, 0x0000) |
33 | #define OMAP3430_CM_SYSCONFIG OMAP_CM_REGADDR(OCP_MOD, 0x0010) | 33 | #define OMAP3430_CM_SYSCONFIG OMAP34XX_CM_REGADDR(OCP_MOD, 0x0010) |
34 | #define OMAP3430_CM_POLCTRL OMAP_CM_REGADDR(OCP_MOD, 0x009c) | 34 | #define OMAP3430_CM_POLCTRL OMAP34XX_CM_REGADDR(OCP_MOD, 0x009c) |
35 | 35 | ||
36 | #define OMAP3_CM_CLKOUT_CTRL_OFFSET 0x0070 | 36 | #define OMAP3_CM_CLKOUT_CTRL_OFFSET 0x0070 |
37 | #define OMAP3430_CM_CLKOUT_CTRL OMAP_CM_REGADDR(OMAP3430_CCR_MOD, 0x0070) | 37 | #define OMAP3430_CM_CLKOUT_CTRL OMAP_CM_REGADDR(OMAP3430_CCR_MOD, 0x0070) |
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 3a86b0f66031..e9b9bcb19b4e 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
@@ -276,14 +276,15 @@ static int __init _omap2_init_reprogram_sdrc(void) | |||
276 | return v; | 276 | return v; |
277 | } | 277 | } |
278 | 278 | ||
279 | void __init omap2_init_common_hw(struct omap_sdrc_params *sp) | 279 | void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0, |
280 | struct omap_sdrc_params *sdrc_cs1) | ||
280 | { | 281 | { |
281 | omap2_mux_init(); | 282 | omap2_mux_init(); |
282 | #ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */ | 283 | #ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */ |
283 | pwrdm_init(powerdomains_omap); | 284 | pwrdm_init(powerdomains_omap); |
284 | clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps); | 285 | clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps); |
285 | omap2_clk_init(); | 286 | omap2_clk_init(); |
286 | omap2_sdrc_init(sp); | 287 | omap2_sdrc_init(sdrc_cs0, sdrc_cs1); |
287 | _omap2_init_reprogram_sdrc(); | 288 | _omap2_init_reprogram_sdrc(); |
288 | #endif | 289 | #endif |
289 | gpmc_init(); | 290 | gpmc_init(); |
diff --git a/arch/arm/mach-omap2/mmc-twl4030.c b/arch/arm/mach-omap2/mmc-twl4030.c index 1541fd4c8d0f..3c04c2f1b23f 100644 --- a/arch/arm/mach-omap2/mmc-twl4030.c +++ b/arch/arm/mach-omap2/mmc-twl4030.c | |||
@@ -119,6 +119,7 @@ static int twl_mmc_late_init(struct device *dev) | |||
119 | if (i != 0) | 119 | if (i != 0) |
120 | break; | 120 | break; |
121 | ret = PTR_ERR(reg); | 121 | ret = PTR_ERR(reg); |
122 | hsmmc[i].vcc = NULL; | ||
122 | goto err; | 123 | goto err; |
123 | } | 124 | } |
124 | hsmmc[i].vcc = reg; | 125 | hsmmc[i].vcc = reg; |
@@ -165,8 +166,13 @@ done: | |||
165 | static void twl_mmc_cleanup(struct device *dev) | 166 | static void twl_mmc_cleanup(struct device *dev) |
166 | { | 167 | { |
167 | struct omap_mmc_platform_data *mmc = dev->platform_data; | 168 | struct omap_mmc_platform_data *mmc = dev->platform_data; |
169 | int i; | ||
168 | 170 | ||
169 | gpio_free(mmc->slots[0].switch_pin); | 171 | gpio_free(mmc->slots[0].switch_pin); |
172 | for(i = 0; i < ARRAY_SIZE(hsmmc); i++) { | ||
173 | regulator_put(hsmmc[i].vcc); | ||
174 | regulator_put(hsmmc[i].vcc_aux); | ||
175 | } | ||
170 | } | 176 | } |
171 | 177 | ||
172 | #ifdef CONFIG_PM | 178 | #ifdef CONFIG_PM |
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 026c4fc883a7..43d6b92b65f2 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c | |||
@@ -486,6 +486,12 @@ MUX_CFG_34XX("H19_34XX_GPIO164_OUT", 0x19c, | |||
486 | OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT) | 486 | OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT) |
487 | MUX_CFG_34XX("J25_34XX_GPIO170", 0x1c6, | 487 | MUX_CFG_34XX("J25_34XX_GPIO170", 0x1c6, |
488 | OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT) | 488 | OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT) |
489 | |||
490 | /* OMAP3 SDRC CKE signals to SDR/DDR ram chips */ | ||
491 | MUX_CFG_34XX("H16_34XX_SDRC_CKE0", 0x262, | ||
492 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT) | ||
493 | MUX_CFG_34XX("H17_34XX_SDRC_CKE1", 0x264, | ||
494 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT) | ||
489 | }; | 495 | }; |
490 | 496 | ||
491 | #define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins) | 497 | #define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins) |
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index f7b3baf76678..21201cd4117b 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h | |||
@@ -11,9 +11,6 @@ | |||
11 | #ifndef __ARCH_ARM_MACH_OMAP2_PM_H | 11 | #ifndef __ARCH_ARM_MACH_OMAP2_PM_H |
12 | #define __ARCH_ARM_MACH_OMAP2_PM_H | 12 | #define __ARCH_ARM_MACH_OMAP2_PM_H |
13 | 13 | ||
14 | extern int omap2_pm_init(void); | ||
15 | extern int omap3_pm_init(void); | ||
16 | |||
17 | #ifdef CONFIG_PM_DEBUG | 14 | #ifdef CONFIG_PM_DEBUG |
18 | extern void omap2_pm_dump(int mode, int resume, unsigned int us); | 15 | extern void omap2_pm_dump(int mode, int resume, unsigned int us); |
19 | extern int omap2_pm_debug; | 16 | extern int omap2_pm_debug; |
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index db1025562fb0..528dbdc26e23 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c | |||
@@ -470,7 +470,7 @@ static void __init prcm_setup_regs(void) | |||
470 | WKUP_MOD, PM_WKEN); | 470 | WKUP_MOD, PM_WKEN); |
471 | } | 471 | } |
472 | 472 | ||
473 | int __init omap2_pm_init(void) | 473 | static int __init omap2_pm_init(void) |
474 | { | 474 | { |
475 | u32 l; | 475 | u32 l; |
476 | 476 | ||
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 841d4c5ed8be..488d595d8e4b 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
@@ -39,7 +39,9 @@ | |||
39 | struct power_state { | 39 | struct power_state { |
40 | struct powerdomain *pwrdm; | 40 | struct powerdomain *pwrdm; |
41 | u32 next_state; | 41 | u32 next_state; |
42 | #ifdef CONFIG_SUSPEND | ||
42 | u32 saved_state; | 43 | u32 saved_state; |
44 | #endif | ||
43 | struct list_head node; | 45 | struct list_head node; |
44 | }; | 46 | }; |
45 | 47 | ||
@@ -293,6 +295,9 @@ out: | |||
293 | local_irq_enable(); | 295 | local_irq_enable(); |
294 | } | 296 | } |
295 | 297 | ||
298 | #ifdef CONFIG_SUSPEND | ||
299 | static suspend_state_t suspend_state; | ||
300 | |||
296 | static int omap3_pm_prepare(void) | 301 | static int omap3_pm_prepare(void) |
297 | { | 302 | { |
298 | disable_hlt(); | 303 | disable_hlt(); |
@@ -321,7 +326,6 @@ static int omap3_pm_suspend(void) | |||
321 | restore: | 326 | restore: |
322 | /* Restore next_pwrsts */ | 327 | /* Restore next_pwrsts */ |
323 | list_for_each_entry(pwrst, &pwrst_list, node) { | 328 | list_for_each_entry(pwrst, &pwrst_list, node) { |
324 | set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state); | ||
325 | state = pwrdm_read_prev_pwrst(pwrst->pwrdm); | 329 | state = pwrdm_read_prev_pwrst(pwrst->pwrdm); |
326 | if (state > pwrst->next_state) { | 330 | if (state > pwrst->next_state) { |
327 | printk(KERN_INFO "Powerdomain (%s) didn't enter " | 331 | printk(KERN_INFO "Powerdomain (%s) didn't enter " |
@@ -329,6 +333,7 @@ restore: | |||
329 | pwrst->pwrdm->name, pwrst->next_state); | 333 | pwrst->pwrdm->name, pwrst->next_state); |
330 | ret = -1; | 334 | ret = -1; |
331 | } | 335 | } |
336 | set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state); | ||
332 | } | 337 | } |
333 | if (ret) | 338 | if (ret) |
334 | printk(KERN_ERR "Could not enter target state in pm_suspend\n"); | 339 | printk(KERN_ERR "Could not enter target state in pm_suspend\n"); |
@@ -339,11 +344,11 @@ restore: | |||
339 | return ret; | 344 | return ret; |
340 | } | 345 | } |
341 | 346 | ||
342 | static int omap3_pm_enter(suspend_state_t state) | 347 | static int omap3_pm_enter(suspend_state_t unused) |
343 | { | 348 | { |
344 | int ret = 0; | 349 | int ret = 0; |
345 | 350 | ||
346 | switch (state) { | 351 | switch (suspend_state) { |
347 | case PM_SUSPEND_STANDBY: | 352 | case PM_SUSPEND_STANDBY: |
348 | case PM_SUSPEND_MEM: | 353 | case PM_SUSPEND_MEM: |
349 | ret = omap3_pm_suspend(); | 354 | ret = omap3_pm_suspend(); |
@@ -360,12 +365,30 @@ static void omap3_pm_finish(void) | |||
360 | enable_hlt(); | 365 | enable_hlt(); |
361 | } | 366 | } |
362 | 367 | ||
368 | /* Hooks to enable / disable UART interrupts during suspend */ | ||
369 | static int omap3_pm_begin(suspend_state_t state) | ||
370 | { | ||
371 | suspend_state = state; | ||
372 | omap_uart_enable_irqs(0); | ||
373 | return 0; | ||
374 | } | ||
375 | |||
376 | static void omap3_pm_end(void) | ||
377 | { | ||
378 | suspend_state = PM_SUSPEND_ON; | ||
379 | omap_uart_enable_irqs(1); | ||
380 | return; | ||
381 | } | ||
382 | |||
363 | static struct platform_suspend_ops omap_pm_ops = { | 383 | static struct platform_suspend_ops omap_pm_ops = { |
384 | .begin = omap3_pm_begin, | ||
385 | .end = omap3_pm_end, | ||
364 | .prepare = omap3_pm_prepare, | 386 | .prepare = omap3_pm_prepare, |
365 | .enter = omap3_pm_enter, | 387 | .enter = omap3_pm_enter, |
366 | .finish = omap3_pm_finish, | 388 | .finish = omap3_pm_finish, |
367 | .valid = suspend_valid_only_mem, | 389 | .valid = suspend_valid_only_mem, |
368 | }; | 390 | }; |
391 | #endif /* CONFIG_SUSPEND */ | ||
369 | 392 | ||
370 | 393 | ||
371 | /** | 394 | /** |
@@ -613,6 +636,24 @@ static void __init prcm_setup_regs(void) | |||
613 | /* Clear any pending PRCM interrupts */ | 636 | /* Clear any pending PRCM interrupts */ |
614 | prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); | 637 | prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); |
615 | 638 | ||
639 | /* Don't attach IVA interrupts */ | ||
640 | prm_write_mod_reg(0, WKUP_MOD, OMAP3430_PM_IVAGRPSEL); | ||
641 | prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1); | ||
642 | prm_write_mod_reg(0, CORE_MOD, OMAP3430ES2_PM_IVAGRPSEL3); | ||
643 | prm_write_mod_reg(0, OMAP3430_PER_MOD, OMAP3430_PM_IVAGRPSEL); | ||
644 | |||
645 | /* Clear any pending 'reset' flags */ | ||
646 | prm_write_mod_reg(0xffffffff, MPU_MOD, RM_RSTST); | ||
647 | prm_write_mod_reg(0xffffffff, CORE_MOD, RM_RSTST); | ||
648 | prm_write_mod_reg(0xffffffff, OMAP3430_PER_MOD, RM_RSTST); | ||
649 | prm_write_mod_reg(0xffffffff, OMAP3430_EMU_MOD, RM_RSTST); | ||
650 | prm_write_mod_reg(0xffffffff, OMAP3430_NEON_MOD, RM_RSTST); | ||
651 | prm_write_mod_reg(0xffffffff, OMAP3430_DSS_MOD, RM_RSTST); | ||
652 | prm_write_mod_reg(0xffffffff, OMAP3430ES2_USBHOST_MOD, RM_RSTST); | ||
653 | |||
654 | /* Clear any pending PRCM interrupts */ | ||
655 | prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); | ||
656 | |||
616 | omap3_iva_idle(); | 657 | omap3_iva_idle(); |
617 | omap3_d2d_idle(); | 658 | omap3_d2d_idle(); |
618 | } | 659 | } |
@@ -652,7 +693,7 @@ static int __init clkdms_setup(struct clockdomain *clkdm) | |||
652 | return 0; | 693 | return 0; |
653 | } | 694 | } |
654 | 695 | ||
655 | int __init omap3_pm_init(void) | 696 | static int __init omap3_pm_init(void) |
656 | { | 697 | { |
657 | struct power_state *pwrst, *tmp; | 698 | struct power_state *pwrst, *tmp; |
658 | int ret; | 699 | int ret; |
@@ -692,7 +733,9 @@ int __init omap3_pm_init(void) | |||
692 | _omap_sram_idle = omap_sram_push(omap34xx_cpu_suspend, | 733 | _omap_sram_idle = omap_sram_push(omap34xx_cpu_suspend, |
693 | omap34xx_cpu_suspend_sz); | 734 | omap34xx_cpu_suspend_sz); |
694 | 735 | ||
736 | #ifdef CONFIG_SUSPEND | ||
695 | suspend_set_ops(&omap_pm_ops); | 737 | suspend_set_ops(&omap_pm_ops); |
738 | #endif /* CONFIG_SUSPEND */ | ||
696 | 739 | ||
697 | pm_idle = omap3_pm_idle; | 740 | pm_idle = omap3_pm_idle; |
698 | 741 | ||
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index f945156d5585..ced555a4cd1a 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | #include <linux/clk.h> | 18 | #include <linux/clk.h> |
19 | #include <linux/io.h> | 19 | #include <linux/io.h> |
20 | #include <linux/delay.h> | ||
20 | 21 | ||
21 | #include <mach/common.h> | 22 | #include <mach/common.h> |
22 | #include <mach/prcm.h> | 23 | #include <mach/prcm.h> |
@@ -28,6 +29,8 @@ | |||
28 | static void __iomem *prm_base; | 29 | static void __iomem *prm_base; |
29 | static void __iomem *cm_base; | 30 | static void __iomem *cm_base; |
30 | 31 | ||
32 | #define MAX_MODULE_ENABLE_WAIT 100000 | ||
33 | |||
31 | u32 omap_prcm_get_reset_sources(void) | 34 | u32 omap_prcm_get_reset_sources(void) |
32 | { | 35 | { |
33 | /* XXX This presumably needs modification for 34XX */ | 36 | /* XXX This presumably needs modification for 34XX */ |
@@ -120,6 +123,46 @@ u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx) | |||
120 | } | 123 | } |
121 | EXPORT_SYMBOL(cm_rmw_mod_reg_bits); | 124 | EXPORT_SYMBOL(cm_rmw_mod_reg_bits); |
122 | 125 | ||
126 | /** | ||
127 | * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness | ||
128 | * @reg: physical address of module IDLEST register | ||
129 | * @mask: value to mask against to determine if the module is active | ||
130 | * @name: name of the clock (for printk) | ||
131 | * | ||
132 | * Returns 1 if the module indicated readiness in time, or 0 if it | ||
133 | * failed to enable in roughly MAX_MODULE_ENABLE_WAIT microseconds. | ||
134 | */ | ||
135 | int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, const char *name) | ||
136 | { | ||
137 | int i = 0; | ||
138 | int ena = 0; | ||
139 | |||
140 | /* | ||
141 | * 24xx uses 0 to indicate not ready, and 1 to indicate ready. | ||
142 | * 34xx reverses this, just to keep us on our toes | ||
143 | */ | ||
144 | if (cpu_is_omap24xx()) | ||
145 | ena = mask; | ||
146 | else if (cpu_is_omap34xx()) | ||
147 | ena = 0; | ||
148 | else | ||
149 | BUG(); | ||
150 | |||
151 | /* Wait for lock */ | ||
152 | while (((__raw_readl(reg) & mask) != ena) && | ||
153 | (i++ < MAX_MODULE_ENABLE_WAIT)) | ||
154 | udelay(1); | ||
155 | |||
156 | if (i < MAX_MODULE_ENABLE_WAIT) | ||
157 | pr_debug("cm: Module associated with clock %s ready after %d " | ||
158 | "loops\n", name, i); | ||
159 | else | ||
160 | pr_err("cm: Module associated with clock %s didn't enable in " | ||
161 | "%d tries\n", name, MAX_MODULE_ENABLE_WAIT); | ||
162 | |||
163 | return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0; | ||
164 | }; | ||
165 | |||
123 | void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals) | 166 | void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals) |
124 | { | 167 | { |
125 | prm_base = omap2_globals->prm; | 168 | prm_base = omap2_globals->prm; |
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c index 2045441e8385..9e3bd4fa7810 100644 --- a/arch/arm/mach-omap2/sdrc.c +++ b/arch/arm/mach-omap2/sdrc.c | |||
@@ -32,7 +32,7 @@ | |||
32 | #include <mach/sdrc.h> | 32 | #include <mach/sdrc.h> |
33 | #include "sdrc.h" | 33 | #include "sdrc.h" |
34 | 34 | ||
35 | static struct omap_sdrc_params *sdrc_init_params; | 35 | static struct omap_sdrc_params *sdrc_init_params_cs0, *sdrc_init_params_cs1; |
36 | 36 | ||
37 | void __iomem *omap2_sdrc_base; | 37 | void __iomem *omap2_sdrc_base; |
38 | void __iomem *omap2_sms_base; | 38 | void __iomem *omap2_sms_base; |
@@ -45,33 +45,49 @@ void __iomem *omap2_sms_base; | |||
45 | /** | 45 | /** |
46 | * omap2_sdrc_get_params - return SDRC register values for a given clock rate | 46 | * omap2_sdrc_get_params - return SDRC register values for a given clock rate |
47 | * @r: SDRC clock rate (in Hz) | 47 | * @r: SDRC clock rate (in Hz) |
48 | * @sdrc_cs0: chip select 0 ram timings ** | ||
49 | * @sdrc_cs1: chip select 1 ram timings ** | ||
48 | * | 50 | * |
49 | * Return pre-calculated values for the SDRC_ACTIM_CTRLA, | 51 | * Return pre-calculated values for the SDRC_ACTIM_CTRLA, |
50 | * SDRC_ACTIM_CTRLB, SDRC_RFR_CTRL, and SDRC_MR registers, for a given | 52 | * SDRC_ACTIM_CTRLB, SDRC_RFR_CTRL and SDRC_MR registers in sdrc_cs[01] |
51 | * SDRC clock rate 'r'. These parameters control various timing | 53 | * structs,for a given SDRC clock rate 'r'. |
52 | * delays in the SDRAM controller that are expressed in terms of the | 54 | * These parameters control various timing delays in the SDRAM controller |
53 | * number of SDRC clock cycles to wait; hence the clock rate | 55 | * that are expressed in terms of the number of SDRC clock cycles to |
54 | * dependency. Note that sdrc_init_params must be sorted rate | 56 | * wait; hence the clock rate dependency. |
55 | * descending. Also assumes that both chip-selects use the same | 57 | * |
56 | * timing parameters. Returns a struct omap_sdrc_params * upon | 58 | * Supports 2 different timing parameters for both chip selects. |
57 | * success, or NULL upon failure. | 59 | * |
60 | * Note 1: the sdrc_init_params_cs[01] must be sorted rate descending. | ||
61 | * Note 2: If sdrc_init_params_cs_1 is not NULL it must be of same size | ||
62 | * as sdrc_init_params_cs_0. | ||
63 | * | ||
64 | * Fills in the struct omap_sdrc_params * for each chip select. | ||
65 | * Returns 0 upon success or -1 upon failure. | ||
58 | */ | 66 | */ |
59 | struct omap_sdrc_params *omap2_sdrc_get_params(unsigned long r) | 67 | int omap2_sdrc_get_params(unsigned long r, |
68 | struct omap_sdrc_params **sdrc_cs0, | ||
69 | struct omap_sdrc_params **sdrc_cs1) | ||
60 | { | 70 | { |
61 | struct omap_sdrc_params *sp; | 71 | struct omap_sdrc_params *sp0, *sp1; |
62 | 72 | ||
63 | if (!sdrc_init_params) | 73 | if (!sdrc_init_params_cs0) |
64 | return NULL; | 74 | return -1; |
65 | 75 | ||
66 | sp = sdrc_init_params; | 76 | sp0 = sdrc_init_params_cs0; |
77 | sp1 = sdrc_init_params_cs1; | ||
67 | 78 | ||
68 | while (sp->rate && sp->rate != r) | 79 | while (sp0->rate && sp0->rate != r) { |
69 | sp++; | 80 | sp0++; |
81 | if (sdrc_init_params_cs1) | ||
82 | sp1++; | ||
83 | } | ||
70 | 84 | ||
71 | if (!sp->rate) | 85 | if (!sp0->rate) |
72 | return NULL; | 86 | return -1; |
73 | 87 | ||
74 | return sp; | 88 | *sdrc_cs0 = sp0; |
89 | *sdrc_cs1 = sp1; | ||
90 | return 0; | ||
75 | } | 91 | } |
76 | 92 | ||
77 | 93 | ||
@@ -83,13 +99,15 @@ void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals) | |||
83 | 99 | ||
84 | /** | 100 | /** |
85 | * omap2_sdrc_init - initialize SMS, SDRC devices on boot | 101 | * omap2_sdrc_init - initialize SMS, SDRC devices on boot |
86 | * @sp: pointer to a null-terminated list of struct omap_sdrc_params | 102 | * @sdrc_cs[01]: pointers to a null-terminated list of struct omap_sdrc_params |
103 | * Support for 2 chip selects timings | ||
87 | * | 104 | * |
88 | * Turn on smart idle modes for SDRAM scheduler and controller. | 105 | * Turn on smart idle modes for SDRAM scheduler and controller. |
89 | * Program a known-good configuration for the SDRC to deal with buggy | 106 | * Program a known-good configuration for the SDRC to deal with buggy |
90 | * bootloaders. | 107 | * bootloaders. |
91 | */ | 108 | */ |
92 | void __init omap2_sdrc_init(struct omap_sdrc_params *sp) | 109 | void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0, |
110 | struct omap_sdrc_params *sdrc_cs1) | ||
93 | { | 111 | { |
94 | u32 l; | 112 | u32 l; |
95 | 113 | ||
@@ -103,11 +121,15 @@ void __init omap2_sdrc_init(struct omap_sdrc_params *sp) | |||
103 | l |= (0x2 << 3); | 121 | l |= (0x2 << 3); |
104 | sdrc_write_reg(l, SDRC_SYSCONFIG); | 122 | sdrc_write_reg(l, SDRC_SYSCONFIG); |
105 | 123 | ||
106 | sdrc_init_params = sp; | 124 | sdrc_init_params_cs0 = sdrc_cs0; |
125 | sdrc_init_params_cs1 = sdrc_cs1; | ||
107 | 126 | ||
108 | /* XXX Enable SRFRONIDLEREQ here also? */ | 127 | /* XXX Enable SRFRONIDLEREQ here also? */ |
128 | /* | ||
129 | * PWDENA should not be set due to 34xx erratum 1.150 - PWDENA | ||
130 | * can cause random memory corruption | ||
131 | */ | ||
109 | l = (1 << SDRC_POWER_EXTCLKDIS_SHIFT) | | 132 | l = (1 << SDRC_POWER_EXTCLKDIS_SHIFT) | |
110 | (1 << SDRC_POWER_PWDENA_SHIFT) | | ||
111 | (1 << SDRC_POWER_PAGEPOLICY_SHIFT); | 133 | (1 << SDRC_POWER_PAGEPOLICY_SHIFT); |
112 | sdrc_write_reg(l, SDRC_POWER); | 134 | sdrc_write_reg(l, SDRC_POWER); |
113 | } | 135 | } |
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index b094c15bfe47..a7421a50410b 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
@@ -54,6 +54,7 @@ struct omap_uart_state { | |||
54 | 54 | ||
55 | struct plat_serial8250_port *p; | 55 | struct plat_serial8250_port *p; |
56 | struct list_head node; | 56 | struct list_head node; |
57 | struct platform_device pdev; | ||
57 | 58 | ||
58 | #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) | 59 | #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) |
59 | int context_valid; | 60 | int context_valid; |
@@ -68,10 +69,9 @@ struct omap_uart_state { | |||
68 | #endif | 69 | #endif |
69 | }; | 70 | }; |
70 | 71 | ||
71 | static struct omap_uart_state omap_uart[OMAP_MAX_NR_PORTS]; | ||
72 | static LIST_HEAD(uart_list); | 72 | static LIST_HEAD(uart_list); |
73 | 73 | ||
74 | static struct plat_serial8250_port serial_platform_data[] = { | 74 | static struct plat_serial8250_port serial_platform_data0[] = { |
75 | { | 75 | { |
76 | .membase = IO_ADDRESS(OMAP_UART1_BASE), | 76 | .membase = IO_ADDRESS(OMAP_UART1_BASE), |
77 | .mapbase = OMAP_UART1_BASE, | 77 | .mapbase = OMAP_UART1_BASE, |
@@ -81,6 +81,12 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
81 | .regshift = 2, | 81 | .regshift = 2, |
82 | .uartclk = OMAP24XX_BASE_BAUD * 16, | 82 | .uartclk = OMAP24XX_BASE_BAUD * 16, |
83 | }, { | 83 | }, { |
84 | .flags = 0 | ||
85 | } | ||
86 | }; | ||
87 | |||
88 | static struct plat_serial8250_port serial_platform_data1[] = { | ||
89 | { | ||
84 | .membase = IO_ADDRESS(OMAP_UART2_BASE), | 90 | .membase = IO_ADDRESS(OMAP_UART2_BASE), |
85 | .mapbase = OMAP_UART2_BASE, | 91 | .mapbase = OMAP_UART2_BASE, |
86 | .irq = 73, | 92 | .irq = 73, |
@@ -89,6 +95,12 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
89 | .regshift = 2, | 95 | .regshift = 2, |
90 | .uartclk = OMAP24XX_BASE_BAUD * 16, | 96 | .uartclk = OMAP24XX_BASE_BAUD * 16, |
91 | }, { | 97 | }, { |
98 | .flags = 0 | ||
99 | } | ||
100 | }; | ||
101 | |||
102 | static struct plat_serial8250_port serial_platform_data2[] = { | ||
103 | { | ||
92 | .membase = IO_ADDRESS(OMAP_UART3_BASE), | 104 | .membase = IO_ADDRESS(OMAP_UART3_BASE), |
93 | .mapbase = OMAP_UART3_BASE, | 105 | .mapbase = OMAP_UART3_BASE, |
94 | .irq = 74, | 106 | .irq = 74, |
@@ -217,6 +229,40 @@ static inline void omap_uart_disable_clocks(struct omap_uart_state *uart) | |||
217 | clk_disable(uart->fck); | 229 | clk_disable(uart->fck); |
218 | } | 230 | } |
219 | 231 | ||
232 | static void omap_uart_enable_wakeup(struct omap_uart_state *uart) | ||
233 | { | ||
234 | /* Set wake-enable bit */ | ||
235 | if (uart->wk_en && uart->wk_mask) { | ||
236 | u32 v = __raw_readl(uart->wk_en); | ||
237 | v |= uart->wk_mask; | ||
238 | __raw_writel(v, uart->wk_en); | ||
239 | } | ||
240 | |||
241 | /* Ensure IOPAD wake-enables are set */ | ||
242 | if (cpu_is_omap34xx() && uart->padconf) { | ||
243 | u16 v = omap_ctrl_readw(uart->padconf); | ||
244 | v |= OMAP3_PADCONF_WAKEUPENABLE0; | ||
245 | omap_ctrl_writew(v, uart->padconf); | ||
246 | } | ||
247 | } | ||
248 | |||
249 | static void omap_uart_disable_wakeup(struct omap_uart_state *uart) | ||
250 | { | ||
251 | /* Clear wake-enable bit */ | ||
252 | if (uart->wk_en && uart->wk_mask) { | ||
253 | u32 v = __raw_readl(uart->wk_en); | ||
254 | v &= ~uart->wk_mask; | ||
255 | __raw_writel(v, uart->wk_en); | ||
256 | } | ||
257 | |||
258 | /* Ensure IOPAD wake-enables are cleared */ | ||
259 | if (cpu_is_omap34xx() && uart->padconf) { | ||
260 | u16 v = omap_ctrl_readw(uart->padconf); | ||
261 | v &= ~OMAP3_PADCONF_WAKEUPENABLE0; | ||
262 | omap_ctrl_writew(v, uart->padconf); | ||
263 | } | ||
264 | } | ||
265 | |||
220 | static void omap_uart_smart_idle_enable(struct omap_uart_state *uart, | 266 | static void omap_uart_smart_idle_enable(struct omap_uart_state *uart, |
221 | int enable) | 267 | int enable) |
222 | { | 268 | { |
@@ -246,6 +292,11 @@ static void omap_uart_block_sleep(struct omap_uart_state *uart) | |||
246 | 292 | ||
247 | static void omap_uart_allow_sleep(struct omap_uart_state *uart) | 293 | static void omap_uart_allow_sleep(struct omap_uart_state *uart) |
248 | { | 294 | { |
295 | if (device_may_wakeup(&uart->pdev.dev)) | ||
296 | omap_uart_enable_wakeup(uart); | ||
297 | else | ||
298 | omap_uart_disable_wakeup(uart); | ||
299 | |||
249 | if (!uart->clocked) | 300 | if (!uart->clocked) |
250 | return; | 301 | return; |
251 | 302 | ||
@@ -292,7 +343,6 @@ void omap_uart_resume_idle(int num) | |||
292 | /* Check for normal UART wakeup */ | 343 | /* Check for normal UART wakeup */ |
293 | if (__raw_readl(uart->wk_st) & uart->wk_mask) | 344 | if (__raw_readl(uart->wk_st) & uart->wk_mask) |
294 | omap_uart_block_sleep(uart); | 345 | omap_uart_block_sleep(uart); |
295 | |||
296 | return; | 346 | return; |
297 | } | 347 | } |
298 | } | 348 | } |
@@ -346,16 +396,13 @@ static irqreturn_t omap_uart_interrupt(int irq, void *dev_id) | |||
346 | return IRQ_NONE; | 396 | return IRQ_NONE; |
347 | } | 397 | } |
348 | 398 | ||
349 | static u32 sleep_timeout = DEFAULT_TIMEOUT; | ||
350 | |||
351 | static void omap_uart_idle_init(struct omap_uart_state *uart) | 399 | static void omap_uart_idle_init(struct omap_uart_state *uart) |
352 | { | 400 | { |
353 | u32 v; | ||
354 | struct plat_serial8250_port *p = uart->p; | 401 | struct plat_serial8250_port *p = uart->p; |
355 | int ret; | 402 | int ret; |
356 | 403 | ||
357 | uart->can_sleep = 0; | 404 | uart->can_sleep = 0; |
358 | uart->timeout = sleep_timeout; | 405 | uart->timeout = DEFAULT_TIMEOUT; |
359 | setup_timer(&uart->timer, omap_uart_idle_timer, | 406 | setup_timer(&uart->timer, omap_uart_idle_timer, |
360 | (unsigned long) uart); | 407 | (unsigned long) uart); |
361 | mod_timer(&uart->timer, jiffies + uart->timeout); | 408 | mod_timer(&uart->timer, jiffies + uart->timeout); |
@@ -413,76 +460,101 @@ static void omap_uart_idle_init(struct omap_uart_state *uart) | |||
413 | uart->padconf = 0; | 460 | uart->padconf = 0; |
414 | } | 461 | } |
415 | 462 | ||
416 | /* Set wake-enable bit */ | ||
417 | if (uart->wk_en && uart->wk_mask) { | ||
418 | v = __raw_readl(uart->wk_en); | ||
419 | v |= uart->wk_mask; | ||
420 | __raw_writel(v, uart->wk_en); | ||
421 | } | ||
422 | |||
423 | /* Ensure IOPAD wake-enables are set */ | ||
424 | if (cpu_is_omap34xx() && uart->padconf) { | ||
425 | u16 v; | ||
426 | |||
427 | v = omap_ctrl_readw(uart->padconf); | ||
428 | v |= OMAP3_PADCONF_WAKEUPENABLE0; | ||
429 | omap_ctrl_writew(v, uart->padconf); | ||
430 | } | ||
431 | |||
432 | p->flags |= UPF_SHARE_IRQ; | 463 | p->flags |= UPF_SHARE_IRQ; |
433 | ret = request_irq(p->irq, omap_uart_interrupt, IRQF_SHARED, | 464 | ret = request_irq(p->irq, omap_uart_interrupt, IRQF_SHARED, |
434 | "serial idle", (void *)uart); | 465 | "serial idle", (void *)uart); |
435 | WARN_ON(ret); | 466 | WARN_ON(ret); |
436 | } | 467 | } |
437 | 468 | ||
438 | static ssize_t sleep_timeout_show(struct kobject *kobj, | 469 | void omap_uart_enable_irqs(int enable) |
439 | struct kobj_attribute *attr, | 470 | { |
471 | int ret; | ||
472 | struct omap_uart_state *uart; | ||
473 | |||
474 | list_for_each_entry(uart, &uart_list, node) { | ||
475 | if (enable) | ||
476 | ret = request_irq(uart->p->irq, omap_uart_interrupt, | ||
477 | IRQF_SHARED, "serial idle", (void *)uart); | ||
478 | else | ||
479 | free_irq(uart->p->irq, (void *)uart); | ||
480 | } | ||
481 | } | ||
482 | |||
483 | static ssize_t sleep_timeout_show(struct device *dev, | ||
484 | struct device_attribute *attr, | ||
440 | char *buf) | 485 | char *buf) |
441 | { | 486 | { |
442 | return sprintf(buf, "%u\n", sleep_timeout / HZ); | 487 | struct platform_device *pdev = container_of(dev, |
488 | struct platform_device, dev); | ||
489 | struct omap_uart_state *uart = container_of(pdev, | ||
490 | struct omap_uart_state, pdev); | ||
491 | |||
492 | return sprintf(buf, "%u\n", uart->timeout / HZ); | ||
443 | } | 493 | } |
444 | 494 | ||
445 | static ssize_t sleep_timeout_store(struct kobject *kobj, | 495 | static ssize_t sleep_timeout_store(struct device *dev, |
446 | struct kobj_attribute *attr, | 496 | struct device_attribute *attr, |
447 | const char *buf, size_t n) | 497 | const char *buf, size_t n) |
448 | { | 498 | { |
449 | struct omap_uart_state *uart; | 499 | struct platform_device *pdev = container_of(dev, |
500 | struct platform_device, dev); | ||
501 | struct omap_uart_state *uart = container_of(pdev, | ||
502 | struct omap_uart_state, pdev); | ||
450 | unsigned int value; | 503 | unsigned int value; |
451 | 504 | ||
452 | if (sscanf(buf, "%u", &value) != 1) { | 505 | if (sscanf(buf, "%u", &value) != 1) { |
453 | printk(KERN_ERR "sleep_timeout_store: Invalid value\n"); | 506 | printk(KERN_ERR "sleep_timeout_store: Invalid value\n"); |
454 | return -EINVAL; | 507 | return -EINVAL; |
455 | } | 508 | } |
456 | sleep_timeout = value * HZ; | 509 | |
457 | list_for_each_entry(uart, &uart_list, node) { | 510 | uart->timeout = value * HZ; |
458 | uart->timeout = sleep_timeout; | 511 | if (uart->timeout) |
459 | if (uart->timeout) | 512 | mod_timer(&uart->timer, jiffies + uart->timeout); |
460 | mod_timer(&uart->timer, jiffies + uart->timeout); | 513 | else |
461 | else | 514 | /* A zero value means disable timeout feature */ |
462 | /* A zero value means disable timeout feature */ | 515 | omap_uart_block_sleep(uart); |
463 | omap_uart_block_sleep(uart); | 516 | |
464 | } | ||
465 | return n; | 517 | return n; |
466 | } | 518 | } |
467 | 519 | ||
468 | static struct kobj_attribute sleep_timeout_attr = | 520 | DEVICE_ATTR(sleep_timeout, 0644, sleep_timeout_show, sleep_timeout_store); |
469 | __ATTR(sleep_timeout, 0644, sleep_timeout_show, sleep_timeout_store); | 521 | #define DEV_CREATE_FILE(dev, attr) WARN_ON(device_create_file(dev, attr)) |
470 | |||
471 | #else | 522 | #else |
472 | static inline void omap_uart_idle_init(struct omap_uart_state *uart) {} | 523 | static inline void omap_uart_idle_init(struct omap_uart_state *uart) {} |
524 | #define DEV_CREATE_FILE(dev, attr) | ||
473 | #endif /* CONFIG_PM */ | 525 | #endif /* CONFIG_PM */ |
474 | 526 | ||
475 | static struct platform_device serial_device = { | 527 | static struct omap_uart_state omap_uart[OMAP_MAX_NR_PORTS] = { |
476 | .name = "serial8250", | 528 | { |
477 | .id = PLAT8250_DEV_PLATFORM, | 529 | .pdev = { |
478 | .dev = { | 530 | .name = "serial8250", |
479 | .platform_data = serial_platform_data, | 531 | .id = PLAT8250_DEV_PLATFORM, |
532 | .dev = { | ||
533 | .platform_data = serial_platform_data0, | ||
534 | }, | ||
535 | }, | ||
536 | }, { | ||
537 | .pdev = { | ||
538 | .name = "serial8250", | ||
539 | .id = PLAT8250_DEV_PLATFORM1, | ||
540 | .dev = { | ||
541 | .platform_data = serial_platform_data1, | ||
542 | }, | ||
543 | }, | ||
544 | }, { | ||
545 | .pdev = { | ||
546 | .name = "serial8250", | ||
547 | .id = PLAT8250_DEV_PLATFORM2, | ||
548 | .dev = { | ||
549 | .platform_data = serial_platform_data2, | ||
550 | }, | ||
551 | }, | ||
480 | }, | 552 | }, |
481 | }; | 553 | }; |
482 | 554 | ||
483 | void __init omap_serial_init(void) | 555 | void __init omap_serial_init(void) |
484 | { | 556 | { |
485 | int i, err; | 557 | int i; |
486 | const struct omap_uart_config *info; | 558 | const struct omap_uart_config *info; |
487 | char name[16]; | 559 | char name[16]; |
488 | 560 | ||
@@ -496,14 +568,12 @@ void __init omap_serial_init(void) | |||
496 | 568 | ||
497 | if (info == NULL) | 569 | if (info == NULL) |
498 | return; | 570 | return; |
499 | if (cpu_is_omap44xx()) { | ||
500 | for (i = 0; i < OMAP_MAX_NR_PORTS; i++) | ||
501 | serial_platform_data[i].irq += 32; | ||
502 | } | ||
503 | 571 | ||
504 | for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { | 572 | for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { |
505 | struct plat_serial8250_port *p = serial_platform_data + i; | ||
506 | struct omap_uart_state *uart = &omap_uart[i]; | 573 | struct omap_uart_state *uart = &omap_uart[i]; |
574 | struct platform_device *pdev = &uart->pdev; | ||
575 | struct device *dev = &pdev->dev; | ||
576 | struct plat_serial8250_port *p = dev->platform_data; | ||
507 | 577 | ||
508 | if (!(info->enabled_uarts & (1 << i))) { | 578 | if (!(info->enabled_uarts & (1 << i))) { |
509 | p->membase = NULL; | 579 | p->membase = NULL; |
@@ -531,20 +601,21 @@ void __init omap_serial_init(void) | |||
531 | uart->num = i; | 601 | uart->num = i; |
532 | p->private_data = uart; | 602 | p->private_data = uart; |
533 | uart->p = p; | 603 | uart->p = p; |
534 | list_add(&uart->node, &uart_list); | 604 | list_add_tail(&uart->node, &uart_list); |
605 | |||
606 | if (cpu_is_omap44xx()) | ||
607 | p->irq += 32; | ||
535 | 608 | ||
536 | omap_uart_enable_clocks(uart); | 609 | omap_uart_enable_clocks(uart); |
537 | omap_uart_reset(uart); | 610 | omap_uart_reset(uart); |
538 | omap_uart_idle_init(uart); | 611 | omap_uart_idle_init(uart); |
539 | } | ||
540 | |||
541 | err = platform_device_register(&serial_device); | ||
542 | |||
543 | #ifdef CONFIG_PM | ||
544 | if (!err) | ||
545 | err = sysfs_create_file(&serial_device.dev.kobj, | ||
546 | &sleep_timeout_attr.attr); | ||
547 | #endif | ||
548 | 612 | ||
613 | if (WARN_ON(platform_device_register(pdev))) | ||
614 | continue; | ||
615 | if ((cpu_is_omap34xx() && uart->padconf) || | ||
616 | (uart->wk_en && uart->wk_mask)) { | ||
617 | device_init_wakeup(dev, true); | ||
618 | DEV_CREATE_FILE(dev, &dev_attr_sleep_timeout); | ||
619 | } | ||
620 | } | ||
549 | } | 621 | } |
550 | |||
diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S index f41f8d96ddba..82aa4a3d160c 100644 --- a/arch/arm/mach-omap2/sram34xx.S +++ b/arch/arm/mach-omap2/sram34xx.S | |||
@@ -36,7 +36,7 @@ | |||
36 | 36 | ||
37 | .text | 37 | .text |
38 | 38 | ||
39 | /* r4 parameters */ | 39 | /* r1 parameters */ |
40 | #define SDRC_NO_UNLOCK_DLL 0x0 | 40 | #define SDRC_NO_UNLOCK_DLL 0x0 |
41 | #define SDRC_UNLOCK_DLL 0x1 | 41 | #define SDRC_UNLOCK_DLL 0x1 |
42 | 42 | ||
@@ -58,7 +58,6 @@ | |||
58 | 58 | ||
59 | /* SDRC_POWER bit settings */ | 59 | /* SDRC_POWER bit settings */ |
60 | #define SRFRONIDLEREQ_MASK 0x40 | 60 | #define SRFRONIDLEREQ_MASK 0x40 |
61 | #define PWDENA_MASK 0x4 | ||
62 | 61 | ||
63 | /* CM_IDLEST1_CORE bit settings */ | 62 | /* CM_IDLEST1_CORE bit settings */ |
64 | #define ST_SDRC_MASK 0x2 | 63 | #define ST_SDRC_MASK 0x2 |
@@ -71,41 +70,72 @@ | |||
71 | 70 | ||
72 | /* | 71 | /* |
73 | * omap3_sram_configure_core_dpll - change DPLL3 M2 divider | 72 | * omap3_sram_configure_core_dpll - change DPLL3 M2 divider |
74 | * r0 = new SDRC_RFR_CTRL register contents | 73 | * |
75 | * r1 = new SDRC_ACTIM_CTRLA register contents | 74 | * Params passed in registers: |
76 | * r2 = new SDRC_ACTIM_CTRLB register contents | 75 | * r0 = new M2 divider setting (only 1 and 2 supported right now) |
77 | * r3 = new M2 divider setting (only 1 and 2 supported right now) | 76 | * r1 = unlock SDRC DLL? (1 = yes, 0 = no). Only unlock DLL for |
78 | * r4 = unlock SDRC DLL? (1 = yes, 0 = no). Only unlock DLL for | ||
79 | * SDRC rates < 83MHz | 77 | * SDRC rates < 83MHz |
80 | * r5 = number of MPU cycles to wait for SDRC to stabilize after | 78 | * r2 = number of MPU cycles to wait for SDRC to stabilize after |
81 | * reprogramming the SDRC when switching to a slower MPU speed | 79 | * reprogramming the SDRC when switching to a slower MPU speed |
82 | * r6 = new SDRC_MR_0 register value | 80 | * r3 = increasing SDRC rate? (1 = yes, 0 = no) |
83 | * r7 = increasing SDRC rate? (1 = yes, 0 = no) | 81 | * |
82 | * Params passed via the stack. The needed params will be copied in SRAM | ||
83 | * before use by the code in SRAM (SDRAM is not accessible during SDRC | ||
84 | * reconfiguration): | ||
85 | * new SDRC_RFR_CTRL_0 register contents | ||
86 | * new SDRC_ACTIM_CTRL_A_0 register contents | ||
87 | * new SDRC_ACTIM_CTRL_B_0 register contents | ||
88 | * new SDRC_MR_0 register value | ||
89 | * new SDRC_RFR_CTRL_1 register contents | ||
90 | * new SDRC_ACTIM_CTRL_A_1 register contents | ||
91 | * new SDRC_ACTIM_CTRL_B_1 register contents | ||
92 | * new SDRC_MR_1 register value | ||
84 | * | 93 | * |
94 | * If the param SDRC_RFR_CTRL_1 is 0, the parameters | ||
95 | * are not programmed into the SDRC CS1 registers | ||
85 | */ | 96 | */ |
86 | ENTRY(omap3_sram_configure_core_dpll) | 97 | ENTRY(omap3_sram_configure_core_dpll) |
87 | stmfd sp!, {r1-r12, lr} @ store regs to stack | 98 | stmfd sp!, {r1-r12, lr} @ store regs to stack |
88 | ldr r4, [sp, #52] @ pull extra args off the stack | 99 | |
89 | ldr r5, [sp, #56] @ load extra args from the stack | 100 | @ pull the extra args off the stack |
90 | ldr r6, [sp, #60] @ load extra args from the stack | 101 | @ and store them in SRAM |
91 | ldr r7, [sp, #64] @ load extra args from the stack | 102 | ldr r4, [sp, #52] |
103 | str r4, omap_sdrc_rfr_ctrl_0_val | ||
104 | ldr r4, [sp, #56] | ||
105 | str r4, omap_sdrc_actim_ctrl_a_0_val | ||
106 | ldr r4, [sp, #60] | ||
107 | str r4, omap_sdrc_actim_ctrl_b_0_val | ||
108 | ldr r4, [sp, #64] | ||
109 | str r4, omap_sdrc_mr_0_val | ||
110 | ldr r4, [sp, #68] | ||
111 | str r4, omap_sdrc_rfr_ctrl_1_val | ||
112 | cmp r4, #0 @ if SDRC_RFR_CTRL_1 is 0, | ||
113 | beq skip_cs1_params @ do not use cs1 params | ||
114 | ldr r4, [sp, #72] | ||
115 | str r4, omap_sdrc_actim_ctrl_a_1_val | ||
116 | ldr r4, [sp, #76] | ||
117 | str r4, omap_sdrc_actim_ctrl_b_1_val | ||
118 | ldr r4, [sp, #80] | ||
119 | str r4, omap_sdrc_mr_1_val | ||
120 | skip_cs1_params: | ||
92 | dsb @ flush buffered writes to interconnect | 121 | dsb @ flush buffered writes to interconnect |
93 | cmp r7, #1 @ if increasing SDRC clk rate, | 122 | |
123 | cmp r3, #1 @ if increasing SDRC clk rate, | ||
94 | bleq configure_sdrc @ program the SDRC regs early (for RFR) | 124 | bleq configure_sdrc @ program the SDRC regs early (for RFR) |
95 | cmp r4, #SDRC_UNLOCK_DLL @ set the intended DLL state | 125 | cmp r1, #SDRC_UNLOCK_DLL @ set the intended DLL state |
96 | bleq unlock_dll | 126 | bleq unlock_dll |
97 | blne lock_dll | 127 | blne lock_dll |
98 | bl sdram_in_selfrefresh @ put SDRAM in self refresh, idle SDRC | 128 | bl sdram_in_selfrefresh @ put SDRAM in self refresh, idle SDRC |
99 | bl configure_core_dpll @ change the DPLL3 M2 divider | 129 | bl configure_core_dpll @ change the DPLL3 M2 divider |
130 | mov r12, r2 | ||
131 | bl wait_clk_stable @ wait for SDRC to stabilize | ||
100 | bl enable_sdrc @ take SDRC out of idle | 132 | bl enable_sdrc @ take SDRC out of idle |
101 | cmp r4, #SDRC_UNLOCK_DLL @ wait for DLL status to change | 133 | cmp r1, #SDRC_UNLOCK_DLL @ wait for DLL status to change |
102 | bleq wait_dll_unlock | 134 | bleq wait_dll_unlock |
103 | blne wait_dll_lock | 135 | blne wait_dll_lock |
104 | cmp r7, #1 @ if increasing SDRC clk rate, | 136 | cmp r3, #1 @ if increasing SDRC clk rate, |
105 | beq return_to_sdram @ return to SDRAM code, otherwise, | 137 | beq return_to_sdram @ return to SDRAM code, otherwise, |
106 | bl configure_sdrc @ reprogram SDRC regs now | 138 | bl configure_sdrc @ reprogram SDRC regs now |
107 | mov r12, r5 | ||
108 | bl wait_clk_stable @ wait for SDRC to stabilize | ||
109 | return_to_sdram: | 139 | return_to_sdram: |
110 | isb @ prevent speculative exec past here | 140 | isb @ prevent speculative exec past here |
111 | mov r0, #0 @ return value | 141 | mov r0, #0 @ return value |
@@ -113,7 +143,7 @@ return_to_sdram: | |||
113 | unlock_dll: | 143 | unlock_dll: |
114 | ldr r11, omap3_sdrc_dlla_ctrl | 144 | ldr r11, omap3_sdrc_dlla_ctrl |
115 | ldr r12, [r11] | 145 | ldr r12, [r11] |
116 | and r12, r12, #FIXEDDELAY_MASK | 146 | bic r12, r12, #FIXEDDELAY_MASK |
117 | orr r12, r12, #FIXEDDELAY_DEFAULT | 147 | orr r12, r12, #FIXEDDELAY_DEFAULT |
118 | orr r12, r12, #DLLIDLE_MASK | 148 | orr r12, r12, #DLLIDLE_MASK |
119 | str r12, [r11] @ (no OCP barrier needed) | 149 | str r12, [r11] @ (no OCP barrier needed) |
@@ -129,7 +159,6 @@ sdram_in_selfrefresh: | |||
129 | ldr r12, [r11] @ read the contents of SDRC_POWER | 159 | ldr r12, [r11] @ read the contents of SDRC_POWER |
130 | mov r9, r12 @ keep a copy of SDRC_POWER bits | 160 | mov r9, r12 @ keep a copy of SDRC_POWER bits |
131 | orr r12, r12, #SRFRONIDLEREQ_MASK @ enable self refresh on idle | 161 | orr r12, r12, #SRFRONIDLEREQ_MASK @ enable self refresh on idle |
132 | bic r12, r12, #PWDENA_MASK @ clear PWDENA | ||
133 | str r12, [r11] @ write back to SDRC_POWER register | 162 | str r12, [r11] @ write back to SDRC_POWER register |
134 | ldr r12, [r11] @ posted-write barrier for SDRC | 163 | ldr r12, [r11] @ posted-write barrier for SDRC |
135 | idle_sdrc: | 164 | idle_sdrc: |
@@ -149,7 +178,7 @@ configure_core_dpll: | |||
149 | ldr r12, [r11] | 178 | ldr r12, [r11] |
150 | ldr r10, core_m2_mask_val @ modify m2 for core dpll | 179 | ldr r10, core_m2_mask_val @ modify m2 for core dpll |
151 | and r12, r12, r10 | 180 | and r12, r12, r10 |
152 | orr r12, r12, r3, lsl #CORE_DPLL_CLKOUT_DIV_SHIFT | 181 | orr r12, r12, r0, lsl #CORE_DPLL_CLKOUT_DIV_SHIFT |
153 | str r12, [r11] | 182 | str r12, [r11] |
154 | ldr r12, [r11] @ posted-write barrier for CM | 183 | ldr r12, [r11] @ posted-write barrier for CM |
155 | bx lr | 184 | bx lr |
@@ -187,15 +216,34 @@ wait_dll_unlock: | |||
187 | bne wait_dll_unlock | 216 | bne wait_dll_unlock |
188 | bx lr | 217 | bx lr |
189 | configure_sdrc: | 218 | configure_sdrc: |
190 | ldr r11, omap3_sdrc_rfr_ctrl | 219 | ldr r12, omap_sdrc_rfr_ctrl_0_val @ fetch value from SRAM |
191 | str r0, [r11] | 220 | ldr r11, omap3_sdrc_rfr_ctrl_0 @ fetch addr from SRAM |
192 | ldr r11, omap3_sdrc_actim_ctrla | 221 | str r12, [r11] @ store |
193 | str r1, [r11] | 222 | ldr r12, omap_sdrc_actim_ctrl_a_0_val |
194 | ldr r11, omap3_sdrc_actim_ctrlb | 223 | ldr r11, omap3_sdrc_actim_ctrl_a_0 |
195 | str r2, [r11] | 224 | str r12, [r11] |
225 | ldr r12, omap_sdrc_actim_ctrl_b_0_val | ||
226 | ldr r11, omap3_sdrc_actim_ctrl_b_0 | ||
227 | str r12, [r11] | ||
228 | ldr r12, omap_sdrc_mr_0_val | ||
196 | ldr r11, omap3_sdrc_mr_0 | 229 | ldr r11, omap3_sdrc_mr_0 |
197 | str r6, [r11] | 230 | str r12, [r11] |
198 | ldr r6, [r11] @ posted-write barrier for SDRC | 231 | ldr r12, omap_sdrc_rfr_ctrl_1_val |
232 | cmp r12, #0 @ if SDRC_RFR_CTRL_1 is 0, | ||
233 | beq skip_cs1_prog @ do not program cs1 params | ||
234 | ldr r11, omap3_sdrc_rfr_ctrl_1 | ||
235 | str r12, [r11] | ||
236 | ldr r12, omap_sdrc_actim_ctrl_a_1_val | ||
237 | ldr r11, omap3_sdrc_actim_ctrl_a_1 | ||
238 | str r12, [r11] | ||
239 | ldr r12, omap_sdrc_actim_ctrl_b_1_val | ||
240 | ldr r11, omap3_sdrc_actim_ctrl_b_1 | ||
241 | str r12, [r11] | ||
242 | ldr r12, omap_sdrc_mr_1_val | ||
243 | ldr r11, omap3_sdrc_mr_1 | ||
244 | str r12, [r11] | ||
245 | skip_cs1_prog: | ||
246 | ldr r12, [r11] @ posted-write barrier for SDRC | ||
199 | bx lr | 247 | bx lr |
200 | 248 | ||
201 | omap3_sdrc_power: | 249 | omap3_sdrc_power: |
@@ -206,14 +254,40 @@ omap3_cm_idlest1_core: | |||
206 | .word OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST) | 254 | .word OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST) |
207 | omap3_cm_iclken1_core: | 255 | omap3_cm_iclken1_core: |
208 | .word OMAP34XX_CM_REGADDR(CORE_MOD, CM_ICLKEN1) | 256 | .word OMAP34XX_CM_REGADDR(CORE_MOD, CM_ICLKEN1) |
209 | omap3_sdrc_rfr_ctrl: | 257 | |
258 | omap3_sdrc_rfr_ctrl_0: | ||
210 | .word OMAP34XX_SDRC_REGADDR(SDRC_RFR_CTRL_0) | 259 | .word OMAP34XX_SDRC_REGADDR(SDRC_RFR_CTRL_0) |
211 | omap3_sdrc_actim_ctrla: | 260 | omap3_sdrc_rfr_ctrl_1: |
261 | .word OMAP34XX_SDRC_REGADDR(SDRC_RFR_CTRL_1) | ||
262 | omap3_sdrc_actim_ctrl_a_0: | ||
212 | .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_A_0) | 263 | .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_A_0) |
213 | omap3_sdrc_actim_ctrlb: | 264 | omap3_sdrc_actim_ctrl_a_1: |
265 | .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_A_1) | ||
266 | omap3_sdrc_actim_ctrl_b_0: | ||
214 | .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_B_0) | 267 | .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_B_0) |
268 | omap3_sdrc_actim_ctrl_b_1: | ||
269 | .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_B_1) | ||
215 | omap3_sdrc_mr_0: | 270 | omap3_sdrc_mr_0: |
216 | .word OMAP34XX_SDRC_REGADDR(SDRC_MR_0) | 271 | .word OMAP34XX_SDRC_REGADDR(SDRC_MR_0) |
272 | omap3_sdrc_mr_1: | ||
273 | .word OMAP34XX_SDRC_REGADDR(SDRC_MR_1) | ||
274 | omap_sdrc_rfr_ctrl_0_val: | ||
275 | .word 0xDEADBEEF | ||
276 | omap_sdrc_rfr_ctrl_1_val: | ||
277 | .word 0xDEADBEEF | ||
278 | omap_sdrc_actim_ctrl_a_0_val: | ||
279 | .word 0xDEADBEEF | ||
280 | omap_sdrc_actim_ctrl_a_1_val: | ||
281 | .word 0xDEADBEEF | ||
282 | omap_sdrc_actim_ctrl_b_0_val: | ||
283 | .word 0xDEADBEEF | ||
284 | omap_sdrc_actim_ctrl_b_1_val: | ||
285 | .word 0xDEADBEEF | ||
286 | omap_sdrc_mr_0_val: | ||
287 | .word 0xDEADBEEF | ||
288 | omap_sdrc_mr_1_val: | ||
289 | .word 0xDEADBEEF | ||
290 | |||
217 | omap3_sdrc_dlla_status: | 291 | omap3_sdrc_dlla_status: |
218 | .word OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS) | 292 | .word OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS) |
219 | omap3_sdrc_dlla_ctrl: | 293 | omap3_sdrc_dlla_ctrl: |
@@ -223,3 +297,4 @@ core_m2_mask_val: | |||
223 | 297 | ||
224 | ENTRY(omap3_sram_configure_core_dpll_sz) | 298 | ENTRY(omap3_sram_configure_core_dpll_sz) |
225 | .word . - omap3_sram_configure_core_dpll | 299 | .word . - omap3_sram_configure_core_dpll |
300 | |||
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index 7936085dd758..2e9b8ccd8ec2 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c | |||
@@ -510,7 +510,7 @@ static struct db_chip db_chips[] __initdata = { | |||
510 | } | 510 | } |
511 | }; | 511 | }; |
512 | 512 | ||
513 | static void u300_init_check_chip(void) | 513 | static void __init u300_init_check_chip(void) |
514 | { | 514 | { |
515 | 515 | ||
516 | u16 val; | 516 | u16 val; |
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 8277802ec859..3a7279c1ce5e 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c | |||
@@ -120,6 +120,32 @@ void show_mem(void) | |||
120 | printk("%d pages swap cached\n", cached); | 120 | printk("%d pages swap cached\n", cached); |
121 | } | 121 | } |
122 | 122 | ||
123 | static void __init find_node_limits(int node, struct meminfo *mi, | ||
124 | unsigned long *min, unsigned long *max_low, unsigned long *max_high) | ||
125 | { | ||
126 | int i; | ||
127 | |||
128 | *min = -1UL; | ||
129 | *max_low = *max_high = 0; | ||
130 | |||
131 | for_each_nodebank(i, mi, node) { | ||
132 | struct membank *bank = &mi->bank[i]; | ||
133 | unsigned long start, end; | ||
134 | |||
135 | start = bank_pfn_start(bank); | ||
136 | end = bank_pfn_end(bank); | ||
137 | |||
138 | if (*min > start) | ||
139 | *min = start; | ||
140 | if (*max_high < end) | ||
141 | *max_high = end; | ||
142 | if (bank->highmem) | ||
143 | continue; | ||
144 | if (*max_low < end) | ||
145 | *max_low = end; | ||
146 | } | ||
147 | } | ||
148 | |||
123 | /* | 149 | /* |
124 | * FIXME: We really want to avoid allocating the bootmap bitmap | 150 | * FIXME: We really want to avoid allocating the bootmap bitmap |
125 | * over the top of the initrd. Hopefully, this is located towards | 151 | * over the top of the initrd. Hopefully, this is located towards |
@@ -210,41 +236,25 @@ static inline void map_memory_bank(struct membank *bank) | |||
210 | #endif | 236 | #endif |
211 | } | 237 | } |
212 | 238 | ||
213 | static unsigned long __init bootmem_init_node(int node, struct meminfo *mi) | 239 | static void __init bootmem_init_node(int node, struct meminfo *mi, |
240 | unsigned long start_pfn, unsigned long end_pfn) | ||
214 | { | 241 | { |
215 | unsigned long start_pfn, end_pfn, boot_pfn; | 242 | unsigned long boot_pfn; |
216 | unsigned int boot_pages; | 243 | unsigned int boot_pages; |
217 | pg_data_t *pgdat; | 244 | pg_data_t *pgdat; |
218 | int i; | 245 | int i; |
219 | 246 | ||
220 | start_pfn = -1UL; | ||
221 | end_pfn = 0; | ||
222 | |||
223 | /* | 247 | /* |
224 | * Calculate the pfn range, and map the memory banks for this node. | 248 | * Map the memory banks for this node. |
225 | */ | 249 | */ |
226 | for_each_nodebank(i, mi, node) { | 250 | for_each_nodebank(i, mi, node) { |
227 | struct membank *bank = &mi->bank[i]; | 251 | struct membank *bank = &mi->bank[i]; |
228 | unsigned long start, end; | ||
229 | 252 | ||
230 | start = bank_pfn_start(bank); | 253 | if (!bank->highmem) |
231 | end = bank_pfn_end(bank); | 254 | map_memory_bank(bank); |
232 | |||
233 | if (start_pfn > start) | ||
234 | start_pfn = start; | ||
235 | if (end_pfn < end) | ||
236 | end_pfn = end; | ||
237 | |||
238 | map_memory_bank(bank); | ||
239 | } | 255 | } |
240 | 256 | ||
241 | /* | 257 | /* |
242 | * If there is no memory in this node, ignore it. | ||
243 | */ | ||
244 | if (end_pfn == 0) | ||
245 | return end_pfn; | ||
246 | |||
247 | /* | ||
248 | * Allocate the bootmem bitmap page. | 258 | * Allocate the bootmem bitmap page. |
249 | */ | 259 | */ |
250 | boot_pages = bootmem_bootmap_pages(end_pfn - start_pfn); | 260 | boot_pages = bootmem_bootmap_pages(end_pfn - start_pfn); |
@@ -260,7 +270,8 @@ static unsigned long __init bootmem_init_node(int node, struct meminfo *mi) | |||
260 | 270 | ||
261 | for_each_nodebank(i, mi, node) { | 271 | for_each_nodebank(i, mi, node) { |
262 | struct membank *bank = &mi->bank[i]; | 272 | struct membank *bank = &mi->bank[i]; |
263 | free_bootmem_node(pgdat, bank_phys_start(bank), bank_phys_size(bank)); | 273 | if (!bank->highmem) |
274 | free_bootmem_node(pgdat, bank_phys_start(bank), bank_phys_size(bank)); | ||
264 | memory_present(node, bank_pfn_start(bank), bank_pfn_end(bank)); | 275 | memory_present(node, bank_pfn_start(bank), bank_pfn_end(bank)); |
265 | } | 276 | } |
266 | 277 | ||
@@ -269,8 +280,6 @@ static unsigned long __init bootmem_init_node(int node, struct meminfo *mi) | |||
269 | */ | 280 | */ |
270 | reserve_bootmem_node(pgdat, boot_pfn << PAGE_SHIFT, | 281 | reserve_bootmem_node(pgdat, boot_pfn << PAGE_SHIFT, |
271 | boot_pages << PAGE_SHIFT, BOOTMEM_DEFAULT); | 282 | boot_pages << PAGE_SHIFT, BOOTMEM_DEFAULT); |
272 | |||
273 | return end_pfn; | ||
274 | } | 283 | } |
275 | 284 | ||
276 | static void __init bootmem_reserve_initrd(int node) | 285 | static void __init bootmem_reserve_initrd(int node) |
@@ -297,33 +306,39 @@ static void __init bootmem_reserve_initrd(int node) | |||
297 | static void __init bootmem_free_node(int node, struct meminfo *mi) | 306 | static void __init bootmem_free_node(int node, struct meminfo *mi) |
298 | { | 307 | { |
299 | unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES]; | 308 | unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES]; |
300 | unsigned long start_pfn, end_pfn; | 309 | unsigned long min, max_low, max_high; |
301 | pg_data_t *pgdat = NODE_DATA(node); | ||
302 | int i; | 310 | int i; |
303 | 311 | ||
304 | start_pfn = pgdat->bdata->node_min_pfn; | 312 | find_node_limits(node, mi, &min, &max_low, &max_high); |
305 | end_pfn = pgdat->bdata->node_low_pfn; | ||
306 | 313 | ||
307 | /* | 314 | /* |
308 | * initialise the zones within this node. | 315 | * initialise the zones within this node. |
309 | */ | 316 | */ |
310 | memset(zone_size, 0, sizeof(zone_size)); | 317 | memset(zone_size, 0, sizeof(zone_size)); |
311 | memset(zhole_size, 0, sizeof(zhole_size)); | ||
312 | 318 | ||
313 | /* | 319 | /* |
314 | * The size of this node has already been determined. If we need | 320 | * The size of this node has already been determined. If we need |
315 | * to do anything fancy with the allocation of this memory to the | 321 | * to do anything fancy with the allocation of this memory to the |
316 | * zones, now is the time to do it. | 322 | * zones, now is the time to do it. |
317 | */ | 323 | */ |
318 | zone_size[0] = end_pfn - start_pfn; | 324 | zone_size[0] = max_low - min; |
325 | #ifdef CONFIG_HIGHMEM | ||
326 | zone_size[ZONE_HIGHMEM] = max_high - max_low; | ||
327 | #endif | ||
319 | 328 | ||
320 | /* | 329 | /* |
321 | * For each bank in this node, calculate the size of the holes. | 330 | * For each bank in this node, calculate the size of the holes. |
322 | * holes = node_size - sum(bank_sizes_in_node) | 331 | * holes = node_size - sum(bank_sizes_in_node) |
323 | */ | 332 | */ |
324 | zhole_size[0] = zone_size[0]; | 333 | memcpy(zhole_size, zone_size, sizeof(zhole_size)); |
325 | for_each_nodebank(i, mi, node) | 334 | for_each_nodebank(i, mi, node) { |
326 | zhole_size[0] -= bank_pfn_size(&mi->bank[i]); | 335 | int idx = 0; |
336 | #ifdef CONFIG_HIGHMEM | ||
337 | if (mi->bank[i].highmem) | ||
338 | idx = ZONE_HIGHMEM; | ||
339 | #endif | ||
340 | zhole_size[idx] -= bank_pfn_size(&mi->bank[i]); | ||
341 | } | ||
327 | 342 | ||
328 | /* | 343 | /* |
329 | * Adjust the sizes according to any special requirements for | 344 | * Adjust the sizes according to any special requirements for |
@@ -331,13 +346,13 @@ static void __init bootmem_free_node(int node, struct meminfo *mi) | |||
331 | */ | 346 | */ |
332 | arch_adjust_zones(node, zone_size, zhole_size); | 347 | arch_adjust_zones(node, zone_size, zhole_size); |
333 | 348 | ||
334 | free_area_init_node(node, zone_size, start_pfn, zhole_size); | 349 | free_area_init_node(node, zone_size, min, zhole_size); |
335 | } | 350 | } |
336 | 351 | ||
337 | void __init bootmem_init(void) | 352 | void __init bootmem_init(void) |
338 | { | 353 | { |
339 | struct meminfo *mi = &meminfo; | 354 | struct meminfo *mi = &meminfo; |
340 | unsigned long memend_pfn = 0; | 355 | unsigned long min, max_low, max_high; |
341 | int node, initrd_node; | 356 | int node, initrd_node; |
342 | 357 | ||
343 | /* | 358 | /* |
@@ -345,11 +360,29 @@ void __init bootmem_init(void) | |||
345 | */ | 360 | */ |
346 | initrd_node = check_initrd(mi); | 361 | initrd_node = check_initrd(mi); |
347 | 362 | ||
363 | max_low = max_high = 0; | ||
364 | |||
348 | /* | 365 | /* |
349 | * Run through each node initialising the bootmem allocator. | 366 | * Run through each node initialising the bootmem allocator. |
350 | */ | 367 | */ |
351 | for_each_node(node) { | 368 | for_each_node(node) { |
352 | unsigned long end_pfn = bootmem_init_node(node, mi); | 369 | unsigned long node_low, node_high; |
370 | |||
371 | find_node_limits(node, mi, &min, &node_low, &node_high); | ||
372 | |||
373 | if (node_low > max_low) | ||
374 | max_low = node_low; | ||
375 | if (node_high > max_high) | ||
376 | max_high = node_high; | ||
377 | |||
378 | /* | ||
379 | * If there is no memory in this node, ignore it. | ||
380 | * (We can't have nodes which have no lowmem) | ||
381 | */ | ||
382 | if (node_low == 0) | ||
383 | continue; | ||
384 | |||
385 | bootmem_init_node(node, mi, min, node_low); | ||
353 | 386 | ||
354 | /* | 387 | /* |
355 | * Reserve any special node zero regions. | 388 | * Reserve any special node zero regions. |
@@ -362,12 +395,6 @@ void __init bootmem_init(void) | |||
362 | */ | 395 | */ |
363 | if (node == initrd_node) | 396 | if (node == initrd_node) |
364 | bootmem_reserve_initrd(node); | 397 | bootmem_reserve_initrd(node); |
365 | |||
366 | /* | ||
367 | * Remember the highest memory PFN. | ||
368 | */ | ||
369 | if (end_pfn > memend_pfn) | ||
370 | memend_pfn = end_pfn; | ||
371 | } | 398 | } |
372 | 399 | ||
373 | /* | 400 | /* |
@@ -383,7 +410,7 @@ void __init bootmem_init(void) | |||
383 | for_each_node(node) | 410 | for_each_node(node) |
384 | bootmem_free_node(node, mi); | 411 | bootmem_free_node(node, mi); |
385 | 412 | ||
386 | high_memory = __va((memend_pfn << PAGE_SHIFT) - 1) + 1; | 413 | high_memory = __va((max_low << PAGE_SHIFT) - 1) + 1; |
387 | 414 | ||
388 | /* | 415 | /* |
389 | * This doesn't seem to be used by the Linux memory manager any | 416 | * This doesn't seem to be used by the Linux memory manager any |
@@ -393,7 +420,8 @@ void __init bootmem_init(void) | |||
393 | * Note: max_low_pfn and max_pfn reflect the number of _pages_ in | 420 | * Note: max_low_pfn and max_pfn reflect the number of _pages_ in |
394 | * the system, not the maximum PFN. | 421 | * the system, not the maximum PFN. |
395 | */ | 422 | */ |
396 | max_pfn = max_low_pfn = memend_pfn - PHYS_PFN_OFFSET; | 423 | max_low_pfn = max_low - PHYS_PFN_OFFSET; |
424 | max_pfn = max_high - PHYS_PFN_OFFSET; | ||
397 | } | 425 | } |
398 | 426 | ||
399 | static inline int free_area(unsigned long pfn, unsigned long end, char *s) | 427 | static inline int free_area(unsigned long pfn, unsigned long end, char *s) |
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 4722582b17b8..4426ee67ceca 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c | |||
@@ -687,13 +687,19 @@ __early_param("vmalloc=", early_vmalloc); | |||
687 | 687 | ||
688 | static void __init sanity_check_meminfo(void) | 688 | static void __init sanity_check_meminfo(void) |
689 | { | 689 | { |
690 | int i, j; | 690 | int i, j, highmem = 0; |
691 | 691 | ||
692 | for (i = 0, j = 0; i < meminfo.nr_banks; i++) { | 692 | for (i = 0, j = 0; i < meminfo.nr_banks; i++) { |
693 | struct membank *bank = &meminfo.bank[j]; | 693 | struct membank *bank = &meminfo.bank[j]; |
694 | *bank = meminfo.bank[i]; | 694 | *bank = meminfo.bank[i]; |
695 | 695 | ||
696 | #ifdef CONFIG_HIGHMEM | 696 | #ifdef CONFIG_HIGHMEM |
697 | if (__va(bank->start) > VMALLOC_MIN || | ||
698 | __va(bank->start) < (void *)PAGE_OFFSET) | ||
699 | highmem = 1; | ||
700 | |||
701 | bank->highmem = highmem; | ||
702 | |||
697 | /* | 703 | /* |
698 | * Split those memory banks which are partially overlapping | 704 | * Split those memory banks which are partially overlapping |
699 | * the vmalloc area greatly simplifying things later. | 705 | * the vmalloc area greatly simplifying things later. |
@@ -714,6 +720,7 @@ static void __init sanity_check_meminfo(void) | |||
714 | i++; | 720 | i++; |
715 | bank[1].size -= VMALLOC_MIN - __va(bank->start); | 721 | bank[1].size -= VMALLOC_MIN - __va(bank->start); |
716 | bank[1].start = __pa(VMALLOC_MIN - 1) + 1; | 722 | bank[1].start = __pa(VMALLOC_MIN - 1) + 1; |
723 | bank[1].highmem = highmem = 1; | ||
717 | j++; | 724 | j++; |
718 | } | 725 | } |
719 | bank->size = VMALLOC_MIN - __va(bank->start); | 726 | bank->size = VMALLOC_MIN - __va(bank->start); |
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c index 843e8af64066..1868c0d8f9b5 100644 --- a/arch/arm/plat-omap/cpu-omap.c +++ b/arch/arm/plat-omap/cpu-omap.c | |||
@@ -78,10 +78,10 @@ static int omap_target(struct cpufreq_policy *policy, | |||
78 | 78 | ||
79 | /* Ensure desired rate is within allowed range. Some govenors | 79 | /* Ensure desired rate is within allowed range. Some govenors |
80 | * (ondemand) will just pass target_freq=0 to get the minimum. */ | 80 | * (ondemand) will just pass target_freq=0 to get the minimum. */ |
81 | if (target_freq < policy->cpuinfo.min_freq) | 81 | if (target_freq < policy->min) |
82 | target_freq = policy->cpuinfo.min_freq; | 82 | target_freq = policy->min; |
83 | if (target_freq > policy->cpuinfo.max_freq) | 83 | if (target_freq > policy->max) |
84 | target_freq = policy->cpuinfo.max_freq; | 84 | target_freq = policy->max; |
85 | 85 | ||
86 | freqs.old = omap_getspeed(0); | 86 | freqs.old = omap_getspeed(0); |
87 | freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; | 87 | freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; |
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 7677a4a1cef2..e3ac94f09006 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
@@ -946,7 +946,9 @@ void omap_start_dma(int lch) | |||
946 | 946 | ||
947 | cur_lch = next_lch; | 947 | cur_lch = next_lch; |
948 | } while (next_lch != -1); | 948 | } while (next_lch != -1); |
949 | } else if (cpu_class_is_omap2()) { | 949 | } else if (cpu_is_omap242x() || |
950 | (cpu_is_omap243x() && omap_type() <= OMAP2430_REV_ES1_0)) { | ||
951 | |||
950 | /* Errata: Need to write lch even if not using chaining */ | 952 | /* Errata: Need to write lch even if not using chaining */ |
951 | dma_write(lch, CLNK_CTRL(lch)); | 953 | dma_write(lch, CLNK_CTRL(lch)); |
952 | } | 954 | } |
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 26b387c12423..9298bc0ab171 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -476,14 +476,12 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) | |||
476 | __raw_writel(l, reg); | 476 | __raw_writel(l, reg); |
477 | } | 477 | } |
478 | 478 | ||
479 | static int __omap_get_gpio_datain(int gpio) | 479 | static int _get_gpio_datain(struct gpio_bank *bank, int gpio) |
480 | { | 480 | { |
481 | struct gpio_bank *bank; | ||
482 | void __iomem *reg; | 481 | void __iomem *reg; |
483 | 482 | ||
484 | if (check_gpio(gpio) < 0) | 483 | if (check_gpio(gpio) < 0) |
485 | return -EINVAL; | 484 | return -EINVAL; |
486 | bank = get_gpio_bank(gpio); | ||
487 | reg = bank->base; | 485 | reg = bank->base; |
488 | switch (bank->method) { | 486 | switch (bank->method) { |
489 | #ifdef CONFIG_ARCH_OMAP1 | 487 | #ifdef CONFIG_ARCH_OMAP1 |
@@ -524,6 +522,53 @@ static int __omap_get_gpio_datain(int gpio) | |||
524 | & (1 << get_gpio_index(gpio))) != 0; | 522 | & (1 << get_gpio_index(gpio))) != 0; |
525 | } | 523 | } |
526 | 524 | ||
525 | static int _get_gpio_dataout(struct gpio_bank *bank, int gpio) | ||
526 | { | ||
527 | void __iomem *reg; | ||
528 | |||
529 | if (check_gpio(gpio) < 0) | ||
530 | return -EINVAL; | ||
531 | reg = bank->base; | ||
532 | |||
533 | switch (bank->method) { | ||
534 | #ifdef CONFIG_ARCH_OMAP1 | ||
535 | case METHOD_MPUIO: | ||
536 | reg += OMAP_MPUIO_OUTPUT; | ||
537 | break; | ||
538 | #endif | ||
539 | #ifdef CONFIG_ARCH_OMAP15XX | ||
540 | case METHOD_GPIO_1510: | ||
541 | reg += OMAP1510_GPIO_DATA_OUTPUT; | ||
542 | break; | ||
543 | #endif | ||
544 | #ifdef CONFIG_ARCH_OMAP16XX | ||
545 | case METHOD_GPIO_1610: | ||
546 | reg += OMAP1610_GPIO_DATAOUT; | ||
547 | break; | ||
548 | #endif | ||
549 | #ifdef CONFIG_ARCH_OMAP730 | ||
550 | case METHOD_GPIO_730: | ||
551 | reg += OMAP730_GPIO_DATA_OUTPUT; | ||
552 | break; | ||
553 | #endif | ||
554 | #ifdef CONFIG_ARCH_OMAP850 | ||
555 | case METHOD_GPIO_850: | ||
556 | reg += OMAP850_GPIO_DATA_OUTPUT; | ||
557 | break; | ||
558 | #endif | ||
559 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | ||
560 | defined(CONFIG_ARCH_OMAP4) | ||
561 | case METHOD_GPIO_24XX: | ||
562 | reg += OMAP24XX_GPIO_DATAOUT; | ||
563 | break; | ||
564 | #endif | ||
565 | default: | ||
566 | return -EINVAL; | ||
567 | } | ||
568 | |||
569 | return (__raw_readl(reg) & (1 << get_gpio_index(gpio))) != 0; | ||
570 | } | ||
571 | |||
527 | #define MOD_REG_BIT(reg, bit_mask, set) \ | 572 | #define MOD_REG_BIT(reg, bit_mask, set) \ |
528 | do { \ | 573 | do { \ |
529 | int l = __raw_readl(base + reg); \ | 574 | int l = __raw_readl(base + reg); \ |
@@ -1189,6 +1234,7 @@ static void gpio_mask_irq(unsigned int irq) | |||
1189 | struct gpio_bank *bank = get_irq_chip_data(irq); | 1234 | struct gpio_bank *bank = get_irq_chip_data(irq); |
1190 | 1235 | ||
1191 | _set_gpio_irqenable(bank, gpio, 0); | 1236 | _set_gpio_irqenable(bank, gpio, 0); |
1237 | _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE); | ||
1192 | } | 1238 | } |
1193 | 1239 | ||
1194 | static void gpio_unmask_irq(unsigned int irq) | 1240 | static void gpio_unmask_irq(unsigned int irq) |
@@ -1196,6 +1242,11 @@ static void gpio_unmask_irq(unsigned int irq) | |||
1196 | unsigned int gpio = irq - IH_GPIO_BASE; | 1242 | unsigned int gpio = irq - IH_GPIO_BASE; |
1197 | struct gpio_bank *bank = get_irq_chip_data(irq); | 1243 | struct gpio_bank *bank = get_irq_chip_data(irq); |
1198 | unsigned int irq_mask = 1 << get_gpio_index(gpio); | 1244 | unsigned int irq_mask = 1 << get_gpio_index(gpio); |
1245 | struct irq_desc *desc = irq_to_desc(irq); | ||
1246 | u32 trigger = desc->status & IRQ_TYPE_SENSE_MASK; | ||
1247 | |||
1248 | if (trigger) | ||
1249 | _set_gpio_triggering(bank, get_gpio_index(gpio), trigger); | ||
1199 | 1250 | ||
1200 | /* For level-triggered GPIOs, the clearing must be done after | 1251 | /* For level-triggered GPIOs, the clearing must be done after |
1201 | * the HW source is cleared, thus after the handler has run */ | 1252 | * the HW source is cleared, thus after the handler has run */ |
@@ -1350,9 +1401,49 @@ static int gpio_input(struct gpio_chip *chip, unsigned offset) | |||
1350 | return 0; | 1401 | return 0; |
1351 | } | 1402 | } |
1352 | 1403 | ||
1404 | static int gpio_is_input(struct gpio_bank *bank, int mask) | ||
1405 | { | ||
1406 | void __iomem *reg = bank->base; | ||
1407 | |||
1408 | switch (bank->method) { | ||
1409 | case METHOD_MPUIO: | ||
1410 | reg += OMAP_MPUIO_IO_CNTL; | ||
1411 | break; | ||
1412 | case METHOD_GPIO_1510: | ||
1413 | reg += OMAP1510_GPIO_DIR_CONTROL; | ||
1414 | break; | ||
1415 | case METHOD_GPIO_1610: | ||
1416 | reg += OMAP1610_GPIO_DIRECTION; | ||
1417 | break; | ||
1418 | case METHOD_GPIO_730: | ||
1419 | reg += OMAP730_GPIO_DIR_CONTROL; | ||
1420 | break; | ||
1421 | case METHOD_GPIO_850: | ||
1422 | reg += OMAP850_GPIO_DIR_CONTROL; | ||
1423 | break; | ||
1424 | case METHOD_GPIO_24XX: | ||
1425 | reg += OMAP24XX_GPIO_OE; | ||
1426 | break; | ||
1427 | } | ||
1428 | return __raw_readl(reg) & mask; | ||
1429 | } | ||
1430 | |||
1353 | static int gpio_get(struct gpio_chip *chip, unsigned offset) | 1431 | static int gpio_get(struct gpio_chip *chip, unsigned offset) |
1354 | { | 1432 | { |
1355 | return __omap_get_gpio_datain(chip->base + offset); | 1433 | struct gpio_bank *bank; |
1434 | void __iomem *reg; | ||
1435 | int gpio; | ||
1436 | u32 mask; | ||
1437 | |||
1438 | gpio = chip->base + offset; | ||
1439 | bank = get_gpio_bank(gpio); | ||
1440 | reg = bank->base; | ||
1441 | mask = 1 << get_gpio_index(gpio); | ||
1442 | |||
1443 | if (gpio_is_input(bank, mask)) | ||
1444 | return _get_gpio_datain(bank, gpio); | ||
1445 | else | ||
1446 | return _get_gpio_dataout(bank, gpio); | ||
1356 | } | 1447 | } |
1357 | 1448 | ||
1358 | static int gpio_output(struct gpio_chip *chip, unsigned offset, int value) | 1449 | static int gpio_output(struct gpio_chip *chip, unsigned offset, int value) |
@@ -1886,34 +1977,6 @@ arch_initcall(omap_gpio_sysinit); | |||
1886 | #include <linux/debugfs.h> | 1977 | #include <linux/debugfs.h> |
1887 | #include <linux/seq_file.h> | 1978 | #include <linux/seq_file.h> |
1888 | 1979 | ||
1889 | static int gpio_is_input(struct gpio_bank *bank, int mask) | ||
1890 | { | ||
1891 | void __iomem *reg = bank->base; | ||
1892 | |||
1893 | switch (bank->method) { | ||
1894 | case METHOD_MPUIO: | ||
1895 | reg += OMAP_MPUIO_IO_CNTL; | ||
1896 | break; | ||
1897 | case METHOD_GPIO_1510: | ||
1898 | reg += OMAP1510_GPIO_DIR_CONTROL; | ||
1899 | break; | ||
1900 | case METHOD_GPIO_1610: | ||
1901 | reg += OMAP1610_GPIO_DIRECTION; | ||
1902 | break; | ||
1903 | case METHOD_GPIO_730: | ||
1904 | reg += OMAP730_GPIO_DIR_CONTROL; | ||
1905 | break; | ||
1906 | case METHOD_GPIO_850: | ||
1907 | reg += OMAP850_GPIO_DIR_CONTROL; | ||
1908 | break; | ||
1909 | case METHOD_GPIO_24XX: | ||
1910 | reg += OMAP24XX_GPIO_OE; | ||
1911 | break; | ||
1912 | } | ||
1913 | return __raw_readl(reg) & mask; | ||
1914 | } | ||
1915 | |||
1916 | |||
1917 | static int dbg_gpio_show(struct seq_file *s, void *unused) | 1980 | static int dbg_gpio_show(struct seq_file *s, void *unused) |
1918 | { | 1981 | { |
1919 | unsigned i, j, gpio; | 1982 | unsigned i, j, gpio; |
diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/mach/clock.h index f9f65e1ba3f1..4b8b0d65cbf2 100644 --- a/arch/arm/plat-omap/include/mach/clock.h +++ b/arch/arm/plat-omap/include/mach/clock.h | |||
@@ -20,6 +20,8 @@ struct clockdomain; | |||
20 | struct clkops { | 20 | struct clkops { |
21 | int (*enable)(struct clk *); | 21 | int (*enable)(struct clk *); |
22 | void (*disable)(struct clk *); | 22 | void (*disable)(struct clk *); |
23 | void (*find_idlest)(struct clk *, void __iomem **, u8 *); | ||
24 | void (*find_companion)(struct clk *, void __iomem **, u8 *); | ||
23 | }; | 25 | }; |
24 | 26 | ||
25 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | 27 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ |
diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h index 285eaa3a8275..11e73d9e8928 100644 --- a/arch/arm/plat-omap/include/mach/cpu.h +++ b/arch/arm/plat-omap/include/mach/cpu.h | |||
@@ -378,9 +378,6 @@ IS_OMAP_TYPE(3430, 0x3430) | |||
378 | #define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx() || \ | 378 | #define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx() || \ |
379 | cpu_is_omap44xx()) | 379 | cpu_is_omap44xx()) |
380 | 380 | ||
381 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | ||
382 | defined(CONFIG_ARCH_OMAP4) | ||
383 | |||
384 | /* Various silicon revisions for omap2 */ | 381 | /* Various silicon revisions for omap2 */ |
385 | #define OMAP242X_CLASS 0x24200024 | 382 | #define OMAP242X_CLASS 0x24200024 |
386 | #define OMAP2420_REV_ES1_0 0x24200024 | 383 | #define OMAP2420_REV_ES1_0 0x24200024 |
@@ -436,5 +433,3 @@ IS_OMAP_TYPE(3430, 0x3430) | |||
436 | 433 | ||
437 | int omap_chip_is(struct omap_chip_id oci); | 434 | int omap_chip_is(struct omap_chip_id oci); |
438 | void omap2_check_revision(void); | 435 | void omap2_check_revision(void); |
439 | |||
440 | #endif /* defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) */ | ||
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h index 73f483d56ca6..21fb0efdda86 100644 --- a/arch/arm/plat-omap/include/mach/io.h +++ b/arch/arm/plat-omap/include/mach/io.h | |||
@@ -228,7 +228,8 @@ extern void omap1_map_common_io(void); | |||
228 | extern void omap1_init_common_hw(void); | 228 | extern void omap1_init_common_hw(void); |
229 | 229 | ||
230 | extern void omap2_map_common_io(void); | 230 | extern void omap2_map_common_io(void); |
231 | extern void omap2_init_common_hw(struct omap_sdrc_params *sp); | 231 | extern void omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0, |
232 | struct omap_sdrc_params *sdrc_cs1); | ||
232 | 233 | ||
233 | #define __arch_ioremap(p,s,t) omap_ioremap(p,s,t) | 234 | #define __arch_ioremap(p,s,t) omap_ioremap(p,s,t) |
234 | #define __arch_iounmap(v) omap_iounmap(v) | 235 | #define __arch_iounmap(v) omap_iounmap(v) |
diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h index 85a621705766..80281c458baf 100644 --- a/arch/arm/plat-omap/include/mach/mux.h +++ b/arch/arm/plat-omap/include/mach/mux.h | |||
@@ -853,6 +853,10 @@ enum omap34xx_index { | |||
853 | AE5_34XX_GPIO143, | 853 | AE5_34XX_GPIO143, |
854 | H19_34XX_GPIO164_OUT, | 854 | H19_34XX_GPIO164_OUT, |
855 | J25_34XX_GPIO170, | 855 | J25_34XX_GPIO170, |
856 | |||
857 | /* OMAP3 SDRC CKE signals to SDR/DDR ram chips */ | ||
858 | H16_34XX_SDRC_CKE0, | ||
859 | H17_34XX_SDRC_CKE1, | ||
856 | }; | 860 | }; |
857 | 861 | ||
858 | struct omap_mux_cfg { | 862 | struct omap_mux_cfg { |
diff --git a/arch/arm/plat-omap/include/mach/prcm.h b/arch/arm/plat-omap/include/mach/prcm.h index 24ac3c715912..cda2a70397b4 100644 --- a/arch/arm/plat-omap/include/mach/prcm.h +++ b/arch/arm/plat-omap/include/mach/prcm.h | |||
@@ -25,6 +25,7 @@ | |||
25 | 25 | ||
26 | u32 omap_prcm_get_reset_sources(void); | 26 | u32 omap_prcm_get_reset_sources(void); |
27 | void omap_prcm_arch_reset(char mode); | 27 | void omap_prcm_arch_reset(char mode); |
28 | int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, const char *name); | ||
28 | 29 | ||
29 | #endif | 30 | #endif |
30 | 31 | ||
diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h index adc73522491f..0be18e4ff182 100644 --- a/arch/arm/plat-omap/include/mach/sdrc.h +++ b/arch/arm/plat-omap/include/mach/sdrc.h | |||
@@ -30,6 +30,10 @@ | |||
30 | #define SDRC_ACTIM_CTRL_A_0 0x09c | 30 | #define SDRC_ACTIM_CTRL_A_0 0x09c |
31 | #define SDRC_ACTIM_CTRL_B_0 0x0a0 | 31 | #define SDRC_ACTIM_CTRL_B_0 0x0a0 |
32 | #define SDRC_RFR_CTRL_0 0x0a4 | 32 | #define SDRC_RFR_CTRL_0 0x0a4 |
33 | #define SDRC_MR_1 0x0B4 | ||
34 | #define SDRC_ACTIM_CTRL_A_1 0x0C4 | ||
35 | #define SDRC_ACTIM_CTRL_B_1 0x0C8 | ||
36 | #define SDRC_RFR_CTRL_1 0x0D4 | ||
33 | 37 | ||
34 | /* | 38 | /* |
35 | * These values represent the number of memory clock cycles between | 39 | * These values represent the number of memory clock cycles between |
@@ -102,8 +106,11 @@ struct omap_sdrc_params { | |||
102 | u32 mr; | 106 | u32 mr; |
103 | }; | 107 | }; |
104 | 108 | ||
105 | void __init omap2_sdrc_init(struct omap_sdrc_params *sp); | 109 | void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0, |
106 | struct omap_sdrc_params *omap2_sdrc_get_params(unsigned long r); | 110 | struct omap_sdrc_params *sdrc_cs1); |
111 | int omap2_sdrc_get_params(unsigned long r, | ||
112 | struct omap_sdrc_params **sdrc_cs0, | ||
113 | struct omap_sdrc_params **sdrc_cs1); | ||
107 | 114 | ||
108 | #ifdef CONFIG_ARCH_OMAP2 | 115 | #ifdef CONFIG_ARCH_OMAP2 |
109 | 116 | ||
diff --git a/arch/arm/plat-omap/include/mach/serial.h b/arch/arm/plat-omap/include/mach/serial.h index 13abd02d1527..def0529c75eb 100644 --- a/arch/arm/plat-omap/include/mach/serial.h +++ b/arch/arm/plat-omap/include/mach/serial.h | |||
@@ -59,6 +59,7 @@ extern void omap_uart_check_wakeup(void); | |||
59 | extern void omap_uart_prepare_suspend(void); | 59 | extern void omap_uart_prepare_suspend(void); |
60 | extern void omap_uart_prepare_idle(int num); | 60 | extern void omap_uart_prepare_idle(int num); |
61 | extern void omap_uart_resume_idle(int num); | 61 | extern void omap_uart_resume_idle(int num); |
62 | extern void omap_uart_enable_irqs(int enable); | ||
62 | #endif | 63 | #endif |
63 | 64 | ||
64 | #endif | 65 | #endif |
diff --git a/arch/arm/plat-omap/include/mach/sram.h b/arch/arm/plat-omap/include/mach/sram.h index 4d53cc59d7a3..8974e3fc2691 100644 --- a/arch/arm/plat-omap/include/mach/sram.h +++ b/arch/arm/plat-omap/include/mach/sram.h | |||
@@ -21,11 +21,12 @@ extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, | |||
21 | u32 mem_type); | 21 | u32 mem_type); |
22 | extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); | 22 | extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); |
23 | 23 | ||
24 | extern u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl, | 24 | extern u32 omap3_configure_core_dpll( |
25 | u32 sdrc_actim_ctrla, | 25 | u32 m2, u32 unlock_dll, u32 f, u32 inc, |
26 | u32 sdrc_actim_ctrlb, u32 m2, | 26 | u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, |
27 | u32 unlock_dll, u32 f, u32 sdrc_mr, | 27 | u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, |
28 | u32 inc); | 28 | u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, |
29 | u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); | ||
29 | 30 | ||
30 | /* Do not use these */ | 31 | /* Do not use these */ |
31 | extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); | 32 | extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); |
@@ -59,12 +60,12 @@ extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, | |||
59 | u32 mem_type); | 60 | u32 mem_type); |
60 | extern unsigned long omap243x_sram_reprogram_sdrc_sz; | 61 | extern unsigned long omap243x_sram_reprogram_sdrc_sz; |
61 | 62 | ||
62 | 63 | extern u32 omap3_sram_configure_core_dpll( | |
63 | extern u32 omap3_sram_configure_core_dpll(u32 sdrc_rfr_ctrl, | 64 | u32 m2, u32 unlock_dll, u32 f, u32 inc, |
64 | u32 sdrc_actim_ctrla, | 65 | u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, |
65 | u32 sdrc_actim_ctrlb, u32 m2, | 66 | u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, |
66 | u32 unlock_dll, u32 f, u32 sdrc_mr, | 67 | u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, |
67 | u32 inc); | 68 | u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); |
68 | extern unsigned long omap3_sram_configure_core_dpll_sz; | 69 | extern unsigned long omap3_sram_configure_core_dpll_sz; |
69 | 70 | ||
70 | #endif | 71 | #endif |
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index 4ea73804d21e..5eae7876979c 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c | |||
@@ -44,9 +44,9 @@ | |||
44 | #define OMAP2_SRAM_VA 0xe3000000 | 44 | #define OMAP2_SRAM_VA 0xe3000000 |
45 | #define OMAP2_SRAM_PUB_VA (OMAP2_SRAM_VA + 0x800) | 45 | #define OMAP2_SRAM_PUB_VA (OMAP2_SRAM_VA + 0x800) |
46 | #define OMAP3_SRAM_PA 0x40200000 | 46 | #define OMAP3_SRAM_PA 0x40200000 |
47 | #define OMAP3_SRAM_VA 0xd7000000 | 47 | #define OMAP3_SRAM_VA 0xe3000000 |
48 | #define OMAP3_SRAM_PUB_PA 0x40208000 | 48 | #define OMAP3_SRAM_PUB_PA 0x40208000 |
49 | #define OMAP3_SRAM_PUB_VA 0xd7008000 | 49 | #define OMAP3_SRAM_PUB_VA (OMAP3_SRAM_VA + 0x8000) |
50 | #define OMAP4_SRAM_PA 0x40200000 /*0x402f0000*/ | 50 | #define OMAP4_SRAM_PA 0x40200000 /*0x402f0000*/ |
51 | #define OMAP4_SRAM_VA 0xd7000000 /*0xd70f0000*/ | 51 | #define OMAP4_SRAM_VA 0xd7000000 /*0xd70f0000*/ |
52 | 52 | ||
@@ -373,20 +373,26 @@ static inline int omap243x_sram_init(void) | |||
373 | 373 | ||
374 | #ifdef CONFIG_ARCH_OMAP3 | 374 | #ifdef CONFIG_ARCH_OMAP3 |
375 | 375 | ||
376 | static u32 (*_omap3_sram_configure_core_dpll)(u32 sdrc_rfr_ctrl, | 376 | static u32 (*_omap3_sram_configure_core_dpll)( |
377 | u32 sdrc_actim_ctrla, | 377 | u32 m2, u32 unlock_dll, u32 f, u32 inc, |
378 | u32 sdrc_actim_ctrlb, | 378 | u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, |
379 | u32 m2, u32 unlock_dll, | 379 | u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, |
380 | u32 f, u32 sdrc_mr, u32 inc); | 380 | u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, |
381 | u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl, u32 sdrc_actim_ctrla, | 381 | u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); |
382 | u32 sdrc_actim_ctrlb, u32 m2, u32 unlock_dll, | 382 | |
383 | u32 f, u32 sdrc_mr, u32 inc) | 383 | u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc, |
384 | u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, | ||
385 | u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, | ||
386 | u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, | ||
387 | u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1) | ||
384 | { | 388 | { |
385 | BUG_ON(!_omap3_sram_configure_core_dpll); | 389 | BUG_ON(!_omap3_sram_configure_core_dpll); |
386 | return _omap3_sram_configure_core_dpll(sdrc_rfr_ctrl, | 390 | return _omap3_sram_configure_core_dpll( |
387 | sdrc_actim_ctrla, | 391 | m2, unlock_dll, f, inc, |
388 | sdrc_actim_ctrlb, m2, | 392 | sdrc_rfr_ctrl_0, sdrc_actim_ctrl_a_0, |
389 | unlock_dll, f, sdrc_mr, inc); | 393 | sdrc_actim_ctrl_b_0, sdrc_mr_0, |
394 | sdrc_rfr_ctrl_1, sdrc_actim_ctrl_a_1, | ||
395 | sdrc_actim_ctrl_b_1, sdrc_mr_1); | ||
390 | } | 396 | } |
391 | 397 | ||
392 | /* REVISIT: Should this be same as omap34xx_sram_init() after off-idle? */ | 398 | /* REVISIT: Should this be same as omap34xx_sram_init() after off-idle? */ |
diff --git a/arch/arm/plat-orion/include/plat/gpio.h b/arch/arm/plat-orion/include/plat/gpio.h index 9646a94ed3d0..07c430fdc9ef 100644 --- a/arch/arm/plat-orion/include/plat/gpio.h +++ b/arch/arm/plat-orion/include/plat/gpio.h | |||
@@ -11,6 +11,8 @@ | |||
11 | #ifndef __PLAT_GPIO_H | 11 | #ifndef __PLAT_GPIO_H |
12 | #define __PLAT_GPIO_H | 12 | #define __PLAT_GPIO_H |
13 | 13 | ||
14 | #include <linux/init.h> | ||
15 | |||
14 | /* | 16 | /* |
15 | * GENERIC_GPIO primitives. | 17 | * GENERIC_GPIO primitives. |
16 | */ | 18 | */ |
diff --git a/arch/arm/plat-s3c24xx/clock-dclk.c b/arch/arm/plat-s3c24xx/clock-dclk.c index 5b75a797b5ab..0afb217a775e 100644 --- a/arch/arm/plat-s3c24xx/clock-dclk.c +++ b/arch/arm/plat-s3c24xx/clock-dclk.c | |||
@@ -129,7 +129,7 @@ static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent) | |||
129 | 129 | ||
130 | /* calculate the MISCCR setting for the clock */ | 130 | /* calculate the MISCCR setting for the clock */ |
131 | 131 | ||
132 | if (parent == &clk_xtal) | 132 | if (parent == &clk_mpll) |
133 | source = S3C2410_MISCCR_CLK0_MPLL; | 133 | source = S3C2410_MISCCR_CLK0_MPLL; |
134 | else if (parent == &clk_upll) | 134 | else if (parent == &clk_upll) |
135 | source = S3C2410_MISCCR_CLK0_UPLL; | 135 | source = S3C2410_MISCCR_CLK0_UPLL; |
diff --git a/arch/avr32/boards/favr-32/setup.c b/arch/avr32/boards/favr-32/setup.c index 46c9b0a224cf..75f19f47fb2f 100644 --- a/arch/avr32/boards/favr-32/setup.c +++ b/arch/avr32/boards/favr-32/setup.c | |||
@@ -72,6 +72,10 @@ static struct ads7846_platform_data ads7843_data = { | |||
72 | .debounce_max = 20, | 72 | .debounce_max = 20, |
73 | .debounce_rep = 4, | 73 | .debounce_rep = 4, |
74 | .debounce_tol = 5, | 74 | .debounce_tol = 5, |
75 | |||
76 | .keep_vref_on = true, | ||
77 | .settle_delay_usecs = 500, | ||
78 | .penirq_recheck_delay_usecs = 100, | ||
75 | }; | 79 | }; |
76 | 80 | ||
77 | static struct spi_board_info __initdata spi1_board_info[] = { | 81 | static struct spi_board_info __initdata spi1_board_info[] = { |
diff --git a/arch/avr32/lib/memcpy.S b/arch/avr32/lib/memcpy.S index 0abb26142b64..c2ca49d705af 100644 --- a/arch/avr32/lib/memcpy.S +++ b/arch/avr32/lib/memcpy.S | |||
@@ -24,8 +24,8 @@ memcpy: | |||
24 | brne 1f | 24 | brne 1f |
25 | 25 | ||
26 | /* At this point, "from" is word-aligned */ | 26 | /* At this point, "from" is word-aligned */ |
27 | 2: sub r10, 4 | 27 | 2: mov r9, r12 |
28 | mov r9, r12 | 28 | 5: sub r10, 4 |
29 | brlt 4f | 29 | brlt 4f |
30 | 30 | ||
31 | 3: ld.w r8, r11++ | 31 | 3: ld.w r8, r11++ |
@@ -49,6 +49,7 @@ memcpy: | |||
49 | 49 | ||
50 | /* Handle unaligned "from" pointer */ | 50 | /* Handle unaligned "from" pointer */ |
51 | 1: sub r10, 4 | 51 | 1: sub r10, 4 |
52 | movlt r9, r12 | ||
52 | brlt 4b | 53 | brlt 4b |
53 | add r10, r9 | 54 | add r10, r9 |
54 | lsl r9, 2 | 55 | lsl r9, 2 |
@@ -59,4 +60,13 @@ memcpy: | |||
59 | st.b r12++, r8 | 60 | st.b r12++, r8 |
60 | ld.ub r8, r11++ | 61 | ld.ub r8, r11++ |
61 | st.b r12++, r8 | 62 | st.b r12++, r8 |
62 | rjmp 2b | 63 | mov r8, r12 |
64 | add pc, pc, r9 | ||
65 | sub r8, 1 | ||
66 | nop | ||
67 | sub r8, 1 | ||
68 | nop | ||
69 | sub r8, 1 | ||
70 | nop | ||
71 | mov r9, r8 | ||
72 | rjmp 5b | ||
diff --git a/arch/m68k/amiga/config.c b/arch/m68k/amiga/config.c index 6e562751ad51..6c74751c7b82 100644 --- a/arch/m68k/amiga/config.c +++ b/arch/m68k/amiga/config.c | |||
@@ -574,10 +574,11 @@ static int a2000_hwclk(int op, struct rtc_time *t) | |||
574 | 574 | ||
575 | tod_2000.cntrl1 = TOD2000_CNTRL1_HOLD; | 575 | tod_2000.cntrl1 = TOD2000_CNTRL1_HOLD; |
576 | 576 | ||
577 | while ((tod_2000.cntrl1 & TOD2000_CNTRL1_BUSY) && cnt--) { | 577 | while ((tod_2000.cntrl1 & TOD2000_CNTRL1_BUSY) && cnt) { |
578 | tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD; | 578 | tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD; |
579 | udelay(70); | 579 | udelay(70); |
580 | tod_2000.cntrl1 |= TOD2000_CNTRL1_HOLD; | 580 | tod_2000.cntrl1 |= TOD2000_CNTRL1_HOLD; |
581 | --cnt; | ||
581 | } | 582 | } |
582 | 583 | ||
583 | if (!cnt) | 584 | if (!cnt) |
@@ -649,10 +650,11 @@ static int amiga_set_clock_mmss(unsigned long nowtime) | |||
649 | 650 | ||
650 | tod_2000.cntrl1 |= TOD2000_CNTRL1_HOLD; | 651 | tod_2000.cntrl1 |= TOD2000_CNTRL1_HOLD; |
651 | 652 | ||
652 | while ((tod_2000.cntrl1 & TOD2000_CNTRL1_BUSY) && cnt--) { | 653 | while ((tod_2000.cntrl1 & TOD2000_CNTRL1_BUSY) && cnt) { |
653 | tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD; | 654 | tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD; |
654 | udelay(70); | 655 | udelay(70); |
655 | tod_2000.cntrl1 |= TOD2000_CNTRL1_HOLD; | 656 | tod_2000.cntrl1 |= TOD2000_CNTRL1_HOLD; |
657 | --cnt; | ||
656 | } | 658 | } |
657 | 659 | ||
658 | if (!cnt) | 660 | if (!cnt) |
diff --git a/arch/m68k/include/asm/motorola_pgalloc.h b/arch/m68k/include/asm/motorola_pgalloc.h index 15ee4c74a9f0..2f02f264e694 100644 --- a/arch/m68k/include/asm/motorola_pgalloc.h +++ b/arch/m68k/include/asm/motorola_pgalloc.h | |||
@@ -36,12 +36,10 @@ static inline pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addres | |||
36 | return NULL; | 36 | return NULL; |
37 | 37 | ||
38 | pte = kmap(page); | 38 | pte = kmap(page); |
39 | if (pte) { | 39 | __flush_page_to_ram(pte); |
40 | __flush_page_to_ram(pte); | 40 | flush_tlb_kernel_page(pte); |
41 | flush_tlb_kernel_page(pte); | 41 | nocache_page(pte); |
42 | nocache_page(pte); | 42 | kunmap(page); |
43 | } | ||
44 | kunmap(pte); | ||
45 | pgtable_page_ctor(page); | 43 | pgtable_page_ctor(page); |
46 | return page; | 44 | return page; |
47 | } | 45 | } |
diff --git a/arch/m68k/include/asm/pgtable_mm.h b/arch/m68k/include/asm/pgtable_mm.h index 0b604f0f192d..fe60e1abaee8 100644 --- a/arch/m68k/include/asm/pgtable_mm.h +++ b/arch/m68k/include/asm/pgtable_mm.h | |||
@@ -135,8 +135,6 @@ static inline void update_mmu_cache(struct vm_area_struct *vma, | |||
135 | #endif | 135 | #endif |
136 | 136 | ||
137 | #ifndef __ASSEMBLY__ | 137 | #ifndef __ASSEMBLY__ |
138 | #include <asm-generic/pgtable.h> | ||
139 | |||
140 | /* | 138 | /* |
141 | * Macro to mark a page protection value as "uncacheable". | 139 | * Macro to mark a page protection value as "uncacheable". |
142 | */ | 140 | */ |
@@ -154,6 +152,7 @@ static inline void update_mmu_cache(struct vm_area_struct *vma, | |||
154 | ? (__pgprot((pgprot_val(prot) & _CACHEMASK040) | _PAGE_NOCACHE_S)) \ | 152 | ? (__pgprot((pgprot_val(prot) & _CACHEMASK040) | _PAGE_NOCACHE_S)) \ |
155 | : (prot))) | 153 | : (prot))) |
156 | 154 | ||
155 | #include <asm-generic/pgtable.h> | ||
157 | #endif /* !__ASSEMBLY__ */ | 156 | #endif /* !__ASSEMBLY__ */ |
158 | 157 | ||
159 | /* | 158 | /* |
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h index aa29a8640f74..946d8691f2b0 100644 --- a/arch/m68k/include/asm/unistd.h +++ b/arch/m68k/include/asm/unistd.h | |||
@@ -334,10 +334,12 @@ | |||
334 | #define __NR_inotify_init1 328 | 334 | #define __NR_inotify_init1 328 |
335 | #define __NR_preadv 329 | 335 | #define __NR_preadv 329 |
336 | #define __NR_pwritev 330 | 336 | #define __NR_pwritev 330 |
337 | #define __NR_rt_tgsigqueueinfo 331 | ||
338 | #define __NR_perf_counter_open 332 | ||
337 | 339 | ||
338 | #ifdef __KERNEL__ | 340 | #ifdef __KERNEL__ |
339 | 341 | ||
340 | #define NR_syscalls 331 | 342 | #define NR_syscalls 333 |
341 | 343 | ||
342 | #define __ARCH_WANT_IPC_PARSE_VERSION | 344 | #define __ARCH_WANT_IPC_PARSE_VERSION |
343 | #define __ARCH_WANT_OLD_READDIR | 345 | #define __ARCH_WANT_OLD_READDIR |
diff --git a/arch/m68k/kernel/entry.S b/arch/m68k/kernel/entry.S index 8744f60c07a9..c3735cd6207e 100644 --- a/arch/m68k/kernel/entry.S +++ b/arch/m68k/kernel/entry.S | |||
@@ -755,4 +755,6 @@ sys_call_table: | |||
755 | .long sys_inotify_init1 | 755 | .long sys_inotify_init1 |
756 | .long sys_preadv | 756 | .long sys_preadv |
757 | .long sys_pwritev /* 330 */ | 757 | .long sys_pwritev /* 330 */ |
758 | .long sys_rt_tgsigqueueinfo | ||
759 | .long sys_perf_counter_open | ||
758 | 760 | ||
diff --git a/arch/m68knommu/kernel/syscalltable.S b/arch/m68knommu/kernel/syscalltable.S index c0b8782832fd..0ae123e08985 100644 --- a/arch/m68knommu/kernel/syscalltable.S +++ b/arch/m68knommu/kernel/syscalltable.S | |||
@@ -349,6 +349,8 @@ ENTRY(sys_call_table) | |||
349 | .long sys_inotify_init1 | 349 | .long sys_inotify_init1 |
350 | .long sys_preadv | 350 | .long sys_preadv |
351 | .long sys_pwritev /* 330 */ | 351 | .long sys_pwritev /* 330 */ |
352 | .long sys_rt_tgsigqueueinfo | ||
353 | .long sys_perf_counter_open | ||
352 | 354 | ||
353 | .rept NR_syscalls-(.-sys_call_table)/4 | 355 | .rept NR_syscalls-(.-sys_call_table)/4 |
354 | .long sys_ni_syscall | 356 | .long sys_ni_syscall |
diff --git a/arch/microblaze/configs/mmu_defconfig b/arch/microblaze/configs/mmu_defconfig index bd0b85ec38f5..09c32962b66f 100644 --- a/arch/microblaze/configs/mmu_defconfig +++ b/arch/microblaze/configs/mmu_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.30-rc6 | 3 | # Linux kernel version: 2.6.31-rc6 |
4 | # Fri May 22 10:02:33 2009 | 4 | # Tue Aug 18 11:00:02 2009 |
5 | # | 5 | # |
6 | CONFIG_MICROBLAZE=y | 6 | CONFIG_MICROBLAZE=y |
7 | # CONFIG_SWAP is not set | 7 | # CONFIG_SWAP is not set |
@@ -18,7 +18,11 @@ CONFIG_GENERIC_TIME=y | |||
18 | CONFIG_GENERIC_CLOCKEVENTS=y | 18 | CONFIG_GENERIC_CLOCKEVENTS=y |
19 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 19 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
20 | CONFIG_GENERIC_GPIO=y | 20 | CONFIG_GENERIC_GPIO=y |
21 | CONFIG_GENERIC_CSUM=y | ||
22 | # CONFIG_PCI is not set | ||
23 | CONFIG_NO_DMA=y | ||
21 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 24 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
25 | CONFIG_CONSTRUCTORS=y | ||
22 | 26 | ||
23 | # | 27 | # |
24 | # General setup | 28 | # General setup |
@@ -59,8 +63,8 @@ CONFIG_INITRAMFS_ROOT_GID=0 | |||
59 | CONFIG_RD_GZIP=y | 63 | CONFIG_RD_GZIP=y |
60 | # CONFIG_RD_BZIP2 is not set | 64 | # CONFIG_RD_BZIP2 is not set |
61 | # CONFIG_RD_LZMA is not set | 65 | # CONFIG_RD_LZMA is not set |
62 | CONFIG_INITRAMFS_COMPRESSION_NONE=y | 66 | # CONFIG_INITRAMFS_COMPRESSION_NONE is not set |
63 | # CONFIG_INITRAMFS_COMPRESSION_GZIP is not set | 67 | CONFIG_INITRAMFS_COMPRESSION_GZIP=y |
64 | # CONFIG_INITRAMFS_COMPRESSION_BZIP2 is not set | 68 | # CONFIG_INITRAMFS_COMPRESSION_BZIP2 is not set |
65 | # CONFIG_INITRAMFS_COMPRESSION_LZMA is not set | 69 | # CONFIG_INITRAMFS_COMPRESSION_LZMA is not set |
66 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 70 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set |
@@ -71,7 +75,6 @@ CONFIG_SYSCTL_SYSCALL=y | |||
71 | CONFIG_KALLSYMS=y | 75 | CONFIG_KALLSYMS=y |
72 | CONFIG_KALLSYMS_ALL=y | 76 | CONFIG_KALLSYMS_ALL=y |
73 | CONFIG_KALLSYMS_EXTRA_PASS=y | 77 | CONFIG_KALLSYMS_EXTRA_PASS=y |
74 | # CONFIG_STRIP_ASM_SYMS is not set | ||
75 | # CONFIG_HOTPLUG is not set | 78 | # CONFIG_HOTPLUG is not set |
76 | CONFIG_PRINTK=y | 79 | CONFIG_PRINTK=y |
77 | CONFIG_BUG=y | 80 | CONFIG_BUG=y |
@@ -84,13 +87,22 @@ CONFIG_TIMERFD=y | |||
84 | CONFIG_EVENTFD=y | 87 | CONFIG_EVENTFD=y |
85 | # CONFIG_SHMEM is not set | 88 | # CONFIG_SHMEM is not set |
86 | CONFIG_AIO=y | 89 | CONFIG_AIO=y |
90 | |||
91 | # | ||
92 | # Performance Counters | ||
93 | # | ||
87 | CONFIG_VM_EVENT_COUNTERS=y | 94 | CONFIG_VM_EVENT_COUNTERS=y |
95 | # CONFIG_STRIP_ASM_SYMS is not set | ||
88 | CONFIG_COMPAT_BRK=y | 96 | CONFIG_COMPAT_BRK=y |
89 | CONFIG_SLAB=y | 97 | CONFIG_SLAB=y |
90 | # CONFIG_SLUB is not set | 98 | # CONFIG_SLUB is not set |
91 | # CONFIG_SLOB is not set | 99 | # CONFIG_SLOB is not set |
92 | # CONFIG_PROFILING is not set | 100 | # CONFIG_PROFILING is not set |
93 | # CONFIG_MARKERS is not set | 101 | # CONFIG_MARKERS is not set |
102 | |||
103 | # | ||
104 | # GCOV-based kernel profiling | ||
105 | # | ||
94 | # CONFIG_SLOW_WORK is not set | 106 | # CONFIG_SLOW_WORK is not set |
95 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 107 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
96 | CONFIG_SLABINFO=y | 108 | CONFIG_SLABINFO=y |
@@ -102,7 +114,7 @@ CONFIG_MODULE_UNLOAD=y | |||
102 | # CONFIG_MODVERSIONS is not set | 114 | # CONFIG_MODVERSIONS is not set |
103 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 115 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
104 | CONFIG_BLOCK=y | 116 | CONFIG_BLOCK=y |
105 | # CONFIG_LBD is not set | 117 | CONFIG_LBDAF=y |
106 | # CONFIG_BLK_DEV_BSG is not set | 118 | # CONFIG_BLK_DEV_BSG is not set |
107 | # CONFIG_BLK_DEV_INTEGRITY is not set | 119 | # CONFIG_BLK_DEV_INTEGRITY is not set |
108 | 120 | ||
@@ -194,9 +206,9 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 | |||
194 | # CONFIG_PHYS_ADDR_T_64BIT is not set | 206 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
195 | CONFIG_ZONE_DMA_FLAG=0 | 207 | CONFIG_ZONE_DMA_FLAG=0 |
196 | CONFIG_VIRT_TO_BUS=y | 208 | CONFIG_VIRT_TO_BUS=y |
197 | CONFIG_UNEVICTABLE_LRU=y | ||
198 | CONFIG_HAVE_MLOCK=y | 209 | CONFIG_HAVE_MLOCK=y |
199 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | 210 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y |
211 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
200 | 212 | ||
201 | # | 213 | # |
202 | # Exectuable file formats | 214 | # Exectuable file formats |
@@ -262,6 +274,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
262 | # CONFIG_ECONET is not set | 274 | # CONFIG_ECONET is not set |
263 | # CONFIG_WAN_ROUTER is not set | 275 | # CONFIG_WAN_ROUTER is not set |
264 | # CONFIG_PHONET is not set | 276 | # CONFIG_PHONET is not set |
277 | # CONFIG_IEEE802154 is not set | ||
265 | # CONFIG_NET_SCHED is not set | 278 | # CONFIG_NET_SCHED is not set |
266 | # CONFIG_DCB is not set | 279 | # CONFIG_DCB is not set |
267 | 280 | ||
@@ -325,7 +338,6 @@ CONFIG_MISC_DEVICES=y | |||
325 | # CONFIG_ATA is not set | 338 | # CONFIG_ATA is not set |
326 | # CONFIG_MD is not set | 339 | # CONFIG_MD is not set |
327 | CONFIG_NETDEVICES=y | 340 | CONFIG_NETDEVICES=y |
328 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
329 | # CONFIG_DUMMY is not set | 341 | # CONFIG_DUMMY is not set |
330 | # CONFIG_BONDING is not set | 342 | # CONFIG_BONDING is not set |
331 | # CONFIG_MACVLAN is not set | 343 | # CONFIG_MACVLAN is not set |
@@ -344,7 +356,7 @@ CONFIG_NET_ETHERNET=y | |||
344 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | 356 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set |
345 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | 357 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set |
346 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | 358 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set |
347 | # CONFIG_B44 is not set | 359 | # CONFIG_KS8842 is not set |
348 | CONFIG_NETDEV_1000=y | 360 | CONFIG_NETDEV_1000=y |
349 | CONFIG_NETDEV_10000=y | 361 | CONFIG_NETDEV_10000=y |
350 | 362 | ||
@@ -410,6 +422,11 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
410 | # CONFIG_TCG_TPM is not set | 422 | # CONFIG_TCG_TPM is not set |
411 | # CONFIG_I2C is not set | 423 | # CONFIG_I2C is not set |
412 | # CONFIG_SPI is not set | 424 | # CONFIG_SPI is not set |
425 | |||
426 | # | ||
427 | # PPS support | ||
428 | # | ||
429 | # CONFIG_PPS is not set | ||
413 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 430 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
414 | # CONFIG_GPIOLIB is not set | 431 | # CONFIG_GPIOLIB is not set |
415 | # CONFIG_W1 is not set | 432 | # CONFIG_W1 is not set |
@@ -418,12 +435,6 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | |||
418 | # CONFIG_THERMAL is not set | 435 | # CONFIG_THERMAL is not set |
419 | # CONFIG_THERMAL_HWMON is not set | 436 | # CONFIG_THERMAL_HWMON is not set |
420 | # CONFIG_WATCHDOG is not set | 437 | # CONFIG_WATCHDOG is not set |
421 | CONFIG_SSB_POSSIBLE=y | ||
422 | |||
423 | # | ||
424 | # Sonics Silicon Backplane | ||
425 | # | ||
426 | # CONFIG_SSB is not set | ||
427 | 438 | ||
428 | # | 439 | # |
429 | # Multifunction device drivers | 440 | # Multifunction device drivers |
@@ -433,22 +444,7 @@ CONFIG_SSB_POSSIBLE=y | |||
433 | # CONFIG_HTC_PASIC3 is not set | 444 | # CONFIG_HTC_PASIC3 is not set |
434 | # CONFIG_MFD_TMIO is not set | 445 | # CONFIG_MFD_TMIO is not set |
435 | # CONFIG_REGULATOR is not set | 446 | # CONFIG_REGULATOR is not set |
436 | 447 | # CONFIG_MEDIA_SUPPORT is not set | |
437 | # | ||
438 | # Multimedia devices | ||
439 | # | ||
440 | |||
441 | # | ||
442 | # Multimedia core support | ||
443 | # | ||
444 | # CONFIG_VIDEO_DEV is not set | ||
445 | # CONFIG_DVB_CORE is not set | ||
446 | # CONFIG_VIDEO_MEDIA is not set | ||
447 | |||
448 | # | ||
449 | # Multimedia drivers | ||
450 | # | ||
451 | # CONFIG_DAB is not set | ||
452 | 448 | ||
453 | # | 449 | # |
454 | # Graphics support | 450 | # Graphics support |
@@ -469,9 +465,12 @@ CONFIG_SSB_POSSIBLE=y | |||
469 | # CONFIG_NEW_LEDS is not set | 465 | # CONFIG_NEW_LEDS is not set |
470 | # CONFIG_ACCESSIBILITY is not set | 466 | # CONFIG_ACCESSIBILITY is not set |
471 | # CONFIG_RTC_CLASS is not set | 467 | # CONFIG_RTC_CLASS is not set |
472 | # CONFIG_DMADEVICES is not set | ||
473 | # CONFIG_AUXDISPLAY is not set | 468 | # CONFIG_AUXDISPLAY is not set |
474 | # CONFIG_UIO is not set | 469 | # CONFIG_UIO is not set |
470 | |||
471 | # | ||
472 | # TI VLYNQ | ||
473 | # | ||
475 | # CONFIG_STAGING is not set | 474 | # CONFIG_STAGING is not set |
476 | 475 | ||
477 | # | 476 | # |
@@ -485,12 +484,15 @@ CONFIG_EXT2_FS=y | |||
485 | # CONFIG_REISERFS_FS is not set | 484 | # CONFIG_REISERFS_FS is not set |
486 | # CONFIG_JFS_FS is not set | 485 | # CONFIG_JFS_FS is not set |
487 | # CONFIG_FS_POSIX_ACL is not set | 486 | # CONFIG_FS_POSIX_ACL is not set |
488 | CONFIG_FILE_LOCKING=y | ||
489 | # CONFIG_XFS_FS is not set | 487 | # CONFIG_XFS_FS is not set |
488 | # CONFIG_GFS2_FS is not set | ||
490 | # CONFIG_OCFS2_FS is not set | 489 | # CONFIG_OCFS2_FS is not set |
491 | # CONFIG_BTRFS_FS is not set | 490 | # CONFIG_BTRFS_FS is not set |
491 | CONFIG_FILE_LOCKING=y | ||
492 | CONFIG_FSNOTIFY=y | ||
492 | # CONFIG_DNOTIFY is not set | 493 | # CONFIG_DNOTIFY is not set |
493 | # CONFIG_INOTIFY is not set | 494 | # CONFIG_INOTIFY is not set |
495 | CONFIG_INOTIFY_USER=y | ||
494 | # CONFIG_QUOTA is not set | 496 | # CONFIG_QUOTA is not set |
495 | # CONFIG_AUTOFS_FS is not set | 497 | # CONFIG_AUTOFS_FS is not set |
496 | # CONFIG_AUTOFS4_FS is not set | 498 | # CONFIG_AUTOFS4_FS is not set |
@@ -678,6 +680,7 @@ CONFIG_DEBUG_INFO=y | |||
678 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | 680 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set |
679 | # CONFIG_PAGE_POISONING is not set | 681 | # CONFIG_PAGE_POISONING is not set |
680 | # CONFIG_SAMPLES is not set | 682 | # CONFIG_SAMPLES is not set |
683 | # CONFIG_KMEMCHECK is not set | ||
681 | CONFIG_EARLY_PRINTK=y | 684 | CONFIG_EARLY_PRINTK=y |
682 | CONFIG_HEART_BEAT=y | 685 | CONFIG_HEART_BEAT=y |
683 | CONFIG_DEBUG_BOOTMEM=y | 686 | CONFIG_DEBUG_BOOTMEM=y |
@@ -793,6 +796,5 @@ CONFIG_ZLIB_INFLATE=y | |||
793 | CONFIG_DECOMPRESS_GZIP=y | 796 | CONFIG_DECOMPRESS_GZIP=y |
794 | CONFIG_HAS_IOMEM=y | 797 | CONFIG_HAS_IOMEM=y |
795 | CONFIG_HAS_IOPORT=y | 798 | CONFIG_HAS_IOPORT=y |
796 | CONFIG_HAS_DMA=y | ||
797 | CONFIG_HAVE_LMB=y | 799 | CONFIG_HAVE_LMB=y |
798 | CONFIG_NLATTR=y | 800 | CONFIG_NLATTR=y |
diff --git a/arch/microblaze/configs/nommu_defconfig b/arch/microblaze/configs/nommu_defconfig index 4ef6af0a8f31..8b638615a972 100644 --- a/arch/microblaze/configs/nommu_defconfig +++ b/arch/microblaze/configs/nommu_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.30-rc5 | 3 | # Linux kernel version: 2.6.31-rc6 |
4 | # Mon May 11 09:01:02 2009 | 4 | # Tue Aug 18 10:35:30 2009 |
5 | # | 5 | # |
6 | CONFIG_MICROBLAZE=y | 6 | CONFIG_MICROBLAZE=y |
7 | # CONFIG_SWAP is not set | 7 | # CONFIG_SWAP is not set |
@@ -17,9 +17,12 @@ CONFIG_GENERIC_TIME=y | |||
17 | # CONFIG_GENERIC_TIME_VSYSCALL is not set | 17 | # CONFIG_GENERIC_TIME_VSYSCALL is not set |
18 | CONFIG_GENERIC_CLOCKEVENTS=y | 18 | CONFIG_GENERIC_CLOCKEVENTS=y |
19 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 19 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
20 | CONFIG_GENERIC_GPIO=y | ||
21 | CONFIG_GENERIC_CSUM=y | ||
20 | # CONFIG_PCI is not set | 22 | # CONFIG_PCI is not set |
21 | # CONFIG_NO_DMA is not set | 23 | CONFIG_NO_DMA=y |
22 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 24 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
25 | CONFIG_CONSTRUCTORS=y | ||
23 | 26 | ||
24 | # | 27 | # |
25 | # General setup | 28 | # General setup |
@@ -64,7 +67,6 @@ CONFIG_SYSCTL_SYSCALL=y | |||
64 | CONFIG_KALLSYMS=y | 67 | CONFIG_KALLSYMS=y |
65 | CONFIG_KALLSYMS_ALL=y | 68 | CONFIG_KALLSYMS_ALL=y |
66 | CONFIG_KALLSYMS_EXTRA_PASS=y | 69 | CONFIG_KALLSYMS_EXTRA_PASS=y |
67 | # CONFIG_STRIP_ASM_SYMS is not set | ||
68 | # CONFIG_HOTPLUG is not set | 70 | # CONFIG_HOTPLUG is not set |
69 | CONFIG_PRINTK=y | 71 | CONFIG_PRINTK=y |
70 | CONFIG_BUG=y | 72 | CONFIG_BUG=y |
@@ -76,13 +78,23 @@ CONFIG_SIGNALFD=y | |||
76 | CONFIG_TIMERFD=y | 78 | CONFIG_TIMERFD=y |
77 | CONFIG_EVENTFD=y | 79 | CONFIG_EVENTFD=y |
78 | CONFIG_AIO=y | 80 | CONFIG_AIO=y |
81 | |||
82 | # | ||
83 | # Performance Counters | ||
84 | # | ||
79 | CONFIG_VM_EVENT_COUNTERS=y | 85 | CONFIG_VM_EVENT_COUNTERS=y |
86 | # CONFIG_STRIP_ASM_SYMS is not set | ||
80 | CONFIG_COMPAT_BRK=y | 87 | CONFIG_COMPAT_BRK=y |
81 | CONFIG_SLAB=y | 88 | CONFIG_SLAB=y |
82 | # CONFIG_SLUB is not set | 89 | # CONFIG_SLUB is not set |
83 | # CONFIG_SLOB is not set | 90 | # CONFIG_SLOB is not set |
84 | # CONFIG_PROFILING is not set | 91 | # CONFIG_PROFILING is not set |
85 | # CONFIG_MARKERS is not set | 92 | # CONFIG_MARKERS is not set |
93 | |||
94 | # | ||
95 | # GCOV-based kernel profiling | ||
96 | # | ||
97 | # CONFIG_GCOV_KERNEL is not set | ||
86 | # CONFIG_SLOW_WORK is not set | 98 | # CONFIG_SLOW_WORK is not set |
87 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 99 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
88 | CONFIG_SLABINFO=y | 100 | CONFIG_SLABINFO=y |
@@ -95,7 +107,7 @@ CONFIG_MODULE_UNLOAD=y | |||
95 | # CONFIG_MODVERSIONS is not set | 107 | # CONFIG_MODVERSIONS is not set |
96 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 108 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
97 | CONFIG_BLOCK=y | 109 | CONFIG_BLOCK=y |
98 | # CONFIG_LBD is not set | 110 | CONFIG_LBDAF=y |
99 | # CONFIG_BLK_DEV_BSG is not set | 111 | # CONFIG_BLK_DEV_BSG is not set |
100 | # CONFIG_BLK_DEV_INTEGRITY is not set | 112 | # CONFIG_BLK_DEV_INTEGRITY is not set |
101 | 113 | ||
@@ -156,8 +168,16 @@ CONFIG_CMDLINE_BOOL=y | |||
156 | CONFIG_CMDLINE="console=ttyUL0,115200" | 168 | CONFIG_CMDLINE="console=ttyUL0,115200" |
157 | # CONFIG_CMDLINE_FORCE is not set | 169 | # CONFIG_CMDLINE_FORCE is not set |
158 | CONFIG_OF=y | 170 | CONFIG_OF=y |
159 | CONFIG_OF_DEVICE=y | ||
160 | CONFIG_PROC_DEVICETREE=y | 171 | CONFIG_PROC_DEVICETREE=y |
172 | |||
173 | # | ||
174 | # Advanced setup | ||
175 | # | ||
176 | |||
177 | # | ||
178 | # Default settings for advanced configuration options are used | ||
179 | # | ||
180 | CONFIG_KERNEL_START=0x90000000 | ||
161 | CONFIG_SELECT_MEMORY_MODEL=y | 181 | CONFIG_SELECT_MEMORY_MODEL=y |
162 | CONFIG_FLATMEM_MANUAL=y | 182 | CONFIG_FLATMEM_MANUAL=y |
163 | # CONFIG_DISCONTIGMEM_MANUAL is not set | 183 | # CONFIG_DISCONTIGMEM_MANUAL is not set |
@@ -169,7 +189,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 | |||
169 | # CONFIG_PHYS_ADDR_T_64BIT is not set | 189 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
170 | CONFIG_ZONE_DMA_FLAG=0 | 190 | CONFIG_ZONE_DMA_FLAG=0 |
171 | CONFIG_VIRT_TO_BUS=y | 191 | CONFIG_VIRT_TO_BUS=y |
172 | CONFIG_UNEVICTABLE_LRU=y | 192 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 |
173 | CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1 | 193 | CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1 |
174 | 194 | ||
175 | # | 195 | # |
@@ -237,6 +257,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
237 | # CONFIG_ECONET is not set | 257 | # CONFIG_ECONET is not set |
238 | # CONFIG_WAN_ROUTER is not set | 258 | # CONFIG_WAN_ROUTER is not set |
239 | # CONFIG_PHONET is not set | 259 | # CONFIG_PHONET is not set |
260 | # CONFIG_IEEE802154 is not set | ||
240 | # CONFIG_NET_SCHED is not set | 261 | # CONFIG_NET_SCHED is not set |
241 | # CONFIG_DCB is not set | 262 | # CONFIG_DCB is not set |
242 | 263 | ||
@@ -254,7 +275,11 @@ CONFIG_WIRELESS=y | |||
254 | CONFIG_WIRELESS_OLD_REGULATORY=y | 275 | CONFIG_WIRELESS_OLD_REGULATORY=y |
255 | # CONFIG_WIRELESS_EXT is not set | 276 | # CONFIG_WIRELESS_EXT is not set |
256 | # CONFIG_LIB80211 is not set | 277 | # CONFIG_LIB80211 is not set |
257 | # CONFIG_MAC80211 is not set | 278 | |
279 | # | ||
280 | # CFG80211 needs to be enabled for MAC80211 | ||
281 | # | ||
282 | CONFIG_MAC80211_DEFAULT_PS_VALUE=0 | ||
258 | # CONFIG_WIMAX is not set | 283 | # CONFIG_WIMAX is not set |
259 | # CONFIG_RFKILL is not set | 284 | # CONFIG_RFKILL is not set |
260 | # CONFIG_NET_9P is not set | 285 | # CONFIG_NET_9P is not set |
@@ -353,6 +378,7 @@ CONFIG_MTD_UCLINUX=y | |||
353 | # UBI - Unsorted block images | 378 | # UBI - Unsorted block images |
354 | # | 379 | # |
355 | # CONFIG_MTD_UBI is not set | 380 | # CONFIG_MTD_UBI is not set |
381 | CONFIG_OF_DEVICE=y | ||
356 | # CONFIG_PARPORT is not set | 382 | # CONFIG_PARPORT is not set |
357 | CONFIG_BLK_DEV=y | 383 | CONFIG_BLK_DEV=y |
358 | # CONFIG_BLK_DEV_COW_COMMON is not set | 384 | # CONFIG_BLK_DEV_COW_COMMON is not set |
@@ -364,6 +390,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 | |||
364 | # CONFIG_BLK_DEV_XIP is not set | 390 | # CONFIG_BLK_DEV_XIP is not set |
365 | # CONFIG_CDROM_PKTCDVD is not set | 391 | # CONFIG_CDROM_PKTCDVD is not set |
366 | # CONFIG_ATA_OVER_ETH is not set | 392 | # CONFIG_ATA_OVER_ETH is not set |
393 | # CONFIG_XILINX_SYSACE is not set | ||
367 | CONFIG_MISC_DEVICES=y | 394 | CONFIG_MISC_DEVICES=y |
368 | # CONFIG_ENCLOSURE_SERVICES is not set | 395 | # CONFIG_ENCLOSURE_SERVICES is not set |
369 | # CONFIG_C2PORT is not set | 396 | # CONFIG_C2PORT is not set |
@@ -383,7 +410,6 @@ CONFIG_MISC_DEVICES=y | |||
383 | # CONFIG_ATA is not set | 410 | # CONFIG_ATA is not set |
384 | # CONFIG_MD is not set | 411 | # CONFIG_MD is not set |
385 | CONFIG_NETDEVICES=y | 412 | CONFIG_NETDEVICES=y |
386 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
387 | # CONFIG_DUMMY is not set | 413 | # CONFIG_DUMMY is not set |
388 | # CONFIG_BONDING is not set | 414 | # CONFIG_BONDING is not set |
389 | # CONFIG_MACVLAN is not set | 415 | # CONFIG_MACVLAN is not set |
@@ -402,7 +428,7 @@ CONFIG_NET_ETHERNET=y | |||
402 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | 428 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set |
403 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | 429 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set |
404 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | 430 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set |
405 | # CONFIG_B44 is not set | 431 | # CONFIG_KS8842 is not set |
406 | CONFIG_NETDEV_1000=y | 432 | CONFIG_NETDEV_1000=y |
407 | CONFIG_NETDEV_10000=y | 433 | CONFIG_NETDEV_10000=y |
408 | 434 | ||
@@ -463,23 +489,25 @@ CONFIG_HW_RANDOM=y | |||
463 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | 489 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set |
464 | # CONFIG_RTC is not set | 490 | # CONFIG_RTC is not set |
465 | # CONFIG_GEN_RTC is not set | 491 | # CONFIG_GEN_RTC is not set |
492 | # CONFIG_XILINX_HWICAP is not set | ||
466 | # CONFIG_R3964 is not set | 493 | # CONFIG_R3964 is not set |
467 | # CONFIG_RAW_DRIVER is not set | 494 | # CONFIG_RAW_DRIVER is not set |
468 | # CONFIG_TCG_TPM is not set | 495 | # CONFIG_TCG_TPM is not set |
469 | # CONFIG_I2C is not set | 496 | # CONFIG_I2C is not set |
470 | # CONFIG_SPI is not set | 497 | # CONFIG_SPI is not set |
498 | |||
499 | # | ||
500 | # PPS support | ||
501 | # | ||
502 | # CONFIG_PPS is not set | ||
503 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | ||
504 | # CONFIG_GPIOLIB is not set | ||
471 | # CONFIG_W1 is not set | 505 | # CONFIG_W1 is not set |
472 | # CONFIG_POWER_SUPPLY is not set | 506 | # CONFIG_POWER_SUPPLY is not set |
473 | # CONFIG_HWMON is not set | 507 | # CONFIG_HWMON is not set |
474 | # CONFIG_THERMAL is not set | 508 | # CONFIG_THERMAL is not set |
475 | # CONFIG_THERMAL_HWMON is not set | 509 | # CONFIG_THERMAL_HWMON is not set |
476 | # CONFIG_WATCHDOG is not set | 510 | # CONFIG_WATCHDOG is not set |
477 | CONFIG_SSB_POSSIBLE=y | ||
478 | |||
479 | # | ||
480 | # Sonics Silicon Backplane | ||
481 | # | ||
482 | # CONFIG_SSB is not set | ||
483 | 511 | ||
484 | # | 512 | # |
485 | # Multifunction device drivers | 513 | # Multifunction device drivers |
@@ -489,22 +517,7 @@ CONFIG_SSB_POSSIBLE=y | |||
489 | # CONFIG_HTC_PASIC3 is not set | 517 | # CONFIG_HTC_PASIC3 is not set |
490 | # CONFIG_MFD_TMIO is not set | 518 | # CONFIG_MFD_TMIO is not set |
491 | # CONFIG_REGULATOR is not set | 519 | # CONFIG_REGULATOR is not set |
492 | 520 | # CONFIG_MEDIA_SUPPORT is not set | |
493 | # | ||
494 | # Multimedia devices | ||
495 | # | ||
496 | |||
497 | # | ||
498 | # Multimedia core support | ||
499 | # | ||
500 | # CONFIG_VIDEO_DEV is not set | ||
501 | # CONFIG_DVB_CORE is not set | ||
502 | # CONFIG_VIDEO_MEDIA is not set | ||
503 | |||
504 | # | ||
505 | # Multimedia drivers | ||
506 | # | ||
507 | CONFIG_DAB=y | ||
508 | 521 | ||
509 | # | 522 | # |
510 | # Graphics support | 523 | # Graphics support |
@@ -520,9 +533,10 @@ CONFIG_VIDEO_OUTPUT_CONTROL=y | |||
520 | # CONFIG_DISPLAY_SUPPORT is not set | 533 | # CONFIG_DISPLAY_SUPPORT is not set |
521 | # CONFIG_SOUND is not set | 534 | # CONFIG_SOUND is not set |
522 | CONFIG_USB_SUPPORT=y | 535 | CONFIG_USB_SUPPORT=y |
523 | # CONFIG_USB_ARCH_HAS_HCD is not set | 536 | CONFIG_USB_ARCH_HAS_HCD=y |
524 | # CONFIG_USB_ARCH_HAS_OHCI is not set | 537 | # CONFIG_USB_ARCH_HAS_OHCI is not set |
525 | # CONFIG_USB_ARCH_HAS_EHCI is not set | 538 | # CONFIG_USB_ARCH_HAS_EHCI is not set |
539 | # CONFIG_USB is not set | ||
526 | # CONFIG_USB_OTG_WHITELIST is not set | 540 | # CONFIG_USB_OTG_WHITELIST is not set |
527 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | 541 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set |
528 | 542 | ||
@@ -543,9 +557,12 @@ CONFIG_USB_SUPPORT=y | |||
543 | # CONFIG_NEW_LEDS is not set | 557 | # CONFIG_NEW_LEDS is not set |
544 | # CONFIG_ACCESSIBILITY is not set | 558 | # CONFIG_ACCESSIBILITY is not set |
545 | # CONFIG_RTC_CLASS is not set | 559 | # CONFIG_RTC_CLASS is not set |
546 | # CONFIG_DMADEVICES is not set | ||
547 | # CONFIG_AUXDISPLAY is not set | 560 | # CONFIG_AUXDISPLAY is not set |
548 | # CONFIG_UIO is not set | 561 | # CONFIG_UIO is not set |
562 | |||
563 | # | ||
564 | # TI VLYNQ | ||
565 | # | ||
549 | # CONFIG_STAGING is not set | 566 | # CONFIG_STAGING is not set |
550 | 567 | ||
551 | # | 568 | # |
@@ -558,12 +575,15 @@ CONFIG_EXT2_FS=y | |||
558 | # CONFIG_REISERFS_FS is not set | 575 | # CONFIG_REISERFS_FS is not set |
559 | # CONFIG_JFS_FS is not set | 576 | # CONFIG_JFS_FS is not set |
560 | CONFIG_FS_POSIX_ACL=y | 577 | CONFIG_FS_POSIX_ACL=y |
561 | CONFIG_FILE_LOCKING=y | ||
562 | # CONFIG_XFS_FS is not set | 578 | # CONFIG_XFS_FS is not set |
579 | # CONFIG_GFS2_FS is not set | ||
563 | # CONFIG_OCFS2_FS is not set | 580 | # CONFIG_OCFS2_FS is not set |
564 | # CONFIG_BTRFS_FS is not set | 581 | # CONFIG_BTRFS_FS is not set |
582 | CONFIG_FILE_LOCKING=y | ||
583 | CONFIG_FSNOTIFY=y | ||
565 | # CONFIG_DNOTIFY is not set | 584 | # CONFIG_DNOTIFY is not set |
566 | # CONFIG_INOTIFY is not set | 585 | # CONFIG_INOTIFY is not set |
586 | CONFIG_INOTIFY_USER=y | ||
567 | # CONFIG_QUOTA is not set | 587 | # CONFIG_QUOTA is not set |
568 | # CONFIG_AUTOFS_FS is not set | 588 | # CONFIG_AUTOFS_FS is not set |
569 | # CONFIG_AUTOFS4_FS is not set | 589 | # CONFIG_AUTOFS4_FS is not set |
@@ -813,6 +833,5 @@ CONFIG_GENERIC_FIND_LAST_BIT=y | |||
813 | CONFIG_ZLIB_INFLATE=y | 833 | CONFIG_ZLIB_INFLATE=y |
814 | CONFIG_HAS_IOMEM=y | 834 | CONFIG_HAS_IOMEM=y |
815 | CONFIG_HAS_IOPORT=y | 835 | CONFIG_HAS_IOPORT=y |
816 | CONFIG_HAS_DMA=y | ||
817 | CONFIG_HAVE_LMB=y | 836 | CONFIG_HAVE_LMB=y |
818 | CONFIG_NLATTR=y | 837 | CONFIG_NLATTR=y |
diff --git a/arch/microblaze/include/asm/hardirq.h b/arch/microblaze/include/asm/hardirq.h index 41e1e1aa36ac..cd1ac9aad56c 100644 --- a/arch/microblaze/include/asm/hardirq.h +++ b/arch/microblaze/include/asm/hardirq.h | |||
@@ -12,8 +12,6 @@ | |||
12 | /* should be defined in each interrupt controller driver */ | 12 | /* should be defined in each interrupt controller driver */ |
13 | extern unsigned int get_irq(struct pt_regs *regs); | 13 | extern unsigned int get_irq(struct pt_regs *regs); |
14 | 14 | ||
15 | #define ack_bad_irq ack_bad_irq | ||
16 | void ack_bad_irq(unsigned int irq); | ||
17 | #include <asm-generic/hardirq.h> | 15 | #include <asm-generic/hardirq.h> |
18 | 16 | ||
19 | #endif /* _ASM_MICROBLAZE_HARDIRQ_H */ | 17 | #endif /* _ASM_MICROBLAZE_HARDIRQ_H */ |
diff --git a/arch/microblaze/kernel/intc.c b/arch/microblaze/kernel/intc.c index b15605299a57..6eea6f92b84e 100644 --- a/arch/microblaze/kernel/intc.c +++ b/arch/microblaze/kernel/intc.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/irq.h> | 12 | #include <linux/irq.h> |
13 | #include <asm/page.h> | 13 | #include <asm/page.h> |
14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
15 | #include <linux/bug.h> | ||
15 | 16 | ||
16 | #include <asm/prom.h> | 17 | #include <asm/prom.h> |
17 | #include <asm/irq.h> | 18 | #include <asm/irq.h> |
@@ -130,6 +131,7 @@ void __init init_IRQ(void) | |||
130 | if (intc) | 131 | if (intc) |
131 | break; | 132 | break; |
132 | } | 133 | } |
134 | BUG_ON(!intc); | ||
133 | 135 | ||
134 | intc_baseaddr = *(int *) of_get_property(intc, "reg", NULL); | 136 | intc_baseaddr = *(int *) of_get_property(intc, "reg", NULL); |
135 | intc_baseaddr = (unsigned long) ioremap(intc_baseaddr, PAGE_SIZE); | 137 | intc_baseaddr = (unsigned long) ioremap(intc_baseaddr, PAGE_SIZE); |
diff --git a/arch/microblaze/kernel/irq.c b/arch/microblaze/kernel/irq.c index f688ee93e3b9..7d5ddd62d4d2 100644 --- a/arch/microblaze/kernel/irq.c +++ b/arch/microblaze/kernel/irq.c | |||
@@ -30,15 +30,6 @@ unsigned int irq_of_parse_and_map(struct device_node *dev, int index) | |||
30 | } | 30 | } |
31 | EXPORT_SYMBOL_GPL(irq_of_parse_and_map); | 31 | EXPORT_SYMBOL_GPL(irq_of_parse_and_map); |
32 | 32 | ||
33 | /* | ||
34 | * 'what should we do if we get a hw irq event on an illegal vector'. | ||
35 | * each architecture has to answer this themselves. | ||
36 | */ | ||
37 | void ack_bad_irq(unsigned int irq) | ||
38 | { | ||
39 | printk(KERN_WARNING "unexpected IRQ trap at vector %02x\n", irq); | ||
40 | } | ||
41 | |||
42 | static u32 concurrent_irq; | 33 | static u32 concurrent_irq; |
43 | 34 | ||
44 | void do_IRQ(struct pt_regs *regs) | 35 | void do_IRQ(struct pt_regs *regs) |
diff --git a/arch/microblaze/kernel/syscall_table.S b/arch/microblaze/kernel/syscall_table.S index 216db817beb6..457216097dfd 100644 --- a/arch/microblaze/kernel/syscall_table.S +++ b/arch/microblaze/kernel/syscall_table.S | |||
@@ -313,7 +313,7 @@ ENTRY(sys_call_table) | |||
313 | .long sys_fchmodat | 313 | .long sys_fchmodat |
314 | .long sys_faccessat | 314 | .long sys_faccessat |
315 | .long sys_ni_syscall /* pselect6 */ | 315 | .long sys_ni_syscall /* pselect6 */ |
316 | .long sys_ni_syscall /* sys_ppoll */ | 316 | .long sys_ppoll |
317 | .long sys_unshare /* 310 */ | 317 | .long sys_unshare /* 310 */ |
318 | .long sys_set_robust_list | 318 | .long sys_set_robust_list |
319 | .long sys_get_robust_list | 319 | .long sys_get_robust_list |
diff --git a/arch/microblaze/kernel/timer.c b/arch/microblaze/kernel/timer.c index bdfa2f9f0c81..5499deae7fa6 100644 --- a/arch/microblaze/kernel/timer.c +++ b/arch/microblaze/kernel/timer.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/clocksource.h> | 22 | #include <linux/clocksource.h> |
23 | #include <linux/clockchips.h> | 23 | #include <linux/clockchips.h> |
24 | #include <linux/io.h> | 24 | #include <linux/io.h> |
25 | #include <linux/bug.h> | ||
25 | #include <asm/cpuinfo.h> | 26 | #include <asm/cpuinfo.h> |
26 | #include <asm/setup.h> | 27 | #include <asm/setup.h> |
27 | #include <asm/prom.h> | 28 | #include <asm/prom.h> |
@@ -234,6 +235,7 @@ void __init time_init(void) | |||
234 | if (timer) | 235 | if (timer) |
235 | break; | 236 | break; |
236 | } | 237 | } |
238 | BUG_ON(!timer); | ||
237 | 239 | ||
238 | timer_baseaddr = *(int *) of_get_property(timer, "reg", NULL); | 240 | timer_baseaddr = *(int *) of_get_property(timer, "reg", NULL); |
239 | timer_baseaddr = (unsigned long) ioremap(timer_baseaddr, PAGE_SIZE); | 241 | timer_baseaddr = (unsigned long) ioremap(timer_baseaddr, PAGE_SIZE); |
diff --git a/arch/microblaze/mm/init.c b/arch/microblaze/mm/init.c index 8d92c4efe9a4..f207f1a94dbc 100644 --- a/arch/microblaze/mm/init.c +++ b/arch/microblaze/mm/init.c | |||
@@ -130,13 +130,13 @@ void __init setup_memory(void) | |||
130 | * (in case the address isn't page-aligned). | 130 | * (in case the address isn't page-aligned). |
131 | */ | 131 | */ |
132 | #ifndef CONFIG_MMU | 132 | #ifndef CONFIG_MMU |
133 | map_size = init_bootmem_node(NODE_DATA(0), PFN_UP(TOPHYS((u32)_end)), | 133 | map_size = init_bootmem_node(NODE_DATA(0), PFN_UP(TOPHYS((u32)klimit)), |
134 | min_low_pfn, max_low_pfn); | 134 | min_low_pfn, max_low_pfn); |
135 | #else | 135 | #else |
136 | map_size = init_bootmem_node(&contig_page_data, | 136 | map_size = init_bootmem_node(&contig_page_data, |
137 | PFN_UP(TOPHYS((u32)_end)), min_low_pfn, max_low_pfn); | 137 | PFN_UP(TOPHYS((u32)klimit)), min_low_pfn, max_low_pfn); |
138 | #endif | 138 | #endif |
139 | lmb_reserve(PFN_UP(TOPHYS((u32)_end)) << PAGE_SHIFT, map_size); | 139 | lmb_reserve(PFN_UP(TOPHYS((u32)klimit)) << PAGE_SHIFT, map_size); |
140 | 140 | ||
141 | /* free bootmem is whole main memory */ | 141 | /* free bootmem is whole main memory */ |
142 | free_bootmem(memory_start, memory_size); | 142 | free_bootmem(memory_start, memory_size); |
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h index 96a14a426a7c..4320239cf4ef 100644 --- a/arch/mips/include/asm/page.h +++ b/arch/mips/include/asm/page.h | |||
@@ -32,10 +32,12 @@ | |||
32 | #define PAGE_SIZE (1UL << PAGE_SHIFT) | 32 | #define PAGE_SIZE (1UL << PAGE_SHIFT) |
33 | #define PAGE_MASK (~((1 << PAGE_SHIFT) - 1)) | 33 | #define PAGE_MASK (~((1 << PAGE_SHIFT) - 1)) |
34 | 34 | ||
35 | #ifdef CONFIG_HUGETLB_PAGE | ||
35 | #define HPAGE_SHIFT (PAGE_SHIFT + PAGE_SHIFT - 3) | 36 | #define HPAGE_SHIFT (PAGE_SHIFT + PAGE_SHIFT - 3) |
36 | #define HPAGE_SIZE ((1UL) << HPAGE_SHIFT) | 37 | #define HPAGE_SIZE ((1UL) << HPAGE_SHIFT) |
37 | #define HPAGE_MASK (~(HPAGE_SIZE - 1)) | 38 | #define HPAGE_MASK (~(HPAGE_SIZE - 1)) |
38 | #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) | 39 | #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) |
40 | #endif /* CONFIG_HUGETLB_PAGE */ | ||
39 | 41 | ||
40 | #ifndef __ASSEMBLY__ | 42 | #ifndef __ASSEMBLY__ |
41 | 43 | ||
diff --git a/arch/powerpc/configs/ps3_defconfig b/arch/powerpc/configs/ps3_defconfig index e28e65e7a0e1..7de127e4ceef 100644 --- a/arch/powerpc/configs/ps3_defconfig +++ b/arch/powerpc/configs/ps3_defconfig | |||
@@ -1,13 +1,14 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.30-rc5 | 3 | # Linux kernel version: 2.6.31-rc7 |
4 | # Fri May 15 10:37:00 2009 | 4 | # Mon Aug 24 17:38:50 2009 |
5 | # | 5 | # |
6 | CONFIG_PPC64=y | 6 | CONFIG_PPC64=y |
7 | 7 | ||
8 | # | 8 | # |
9 | # Processor support | 9 | # Processor support |
10 | # | 10 | # |
11 | CONFIG_PPC_BOOK3S_64=y | ||
11 | CONFIG_PPC_BOOK3S=y | 12 | CONFIG_PPC_BOOK3S=y |
12 | # CONFIG_POWER4_ONLY is not set | 13 | # CONFIG_POWER4_ONLY is not set |
13 | CONFIG_POWER3=y | 14 | CONFIG_POWER3=y |
@@ -20,6 +21,7 @@ CONFIG_PPC_STD_MMU=y | |||
20 | CONFIG_PPC_STD_MMU_64=y | 21 | CONFIG_PPC_STD_MMU_64=y |
21 | CONFIG_PPC_MM_SLICES=y | 22 | CONFIG_PPC_MM_SLICES=y |
22 | CONFIG_VIRT_CPU_ACCOUNTING=y | 23 | CONFIG_VIRT_CPU_ACCOUNTING=y |
24 | CONFIG_PPC_HAVE_PMU_SUPPORT=y | ||
23 | CONFIG_SMP=y | 25 | CONFIG_SMP=y |
24 | CONFIG_NR_CPUS=2 | 26 | CONFIG_NR_CPUS=2 |
25 | CONFIG_64BIT=y | 27 | CONFIG_64BIT=y |
@@ -31,6 +33,7 @@ CONFIG_GENERIC_TIME=y | |||
31 | CONFIG_GENERIC_TIME_VSYSCALL=y | 33 | CONFIG_GENERIC_TIME_VSYSCALL=y |
32 | CONFIG_GENERIC_CLOCKEVENTS=y | 34 | CONFIG_GENERIC_CLOCKEVENTS=y |
33 | CONFIG_GENERIC_HARDIRQS=y | 35 | CONFIG_GENERIC_HARDIRQS=y |
36 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
34 | CONFIG_HAVE_SETUP_PER_CPU_AREA=y | 37 | CONFIG_HAVE_SETUP_PER_CPU_AREA=y |
35 | CONFIG_IRQ_PER_CPU=y | 38 | CONFIG_IRQ_PER_CPU=y |
36 | CONFIG_STACKTRACE_SUPPORT=y | 39 | CONFIG_STACKTRACE_SUPPORT=y |
@@ -41,7 +44,6 @@ CONFIG_RWSEM_XCHGADD_ALGORITHM=y | |||
41 | CONFIG_ARCH_HAS_ILOG2_U32=y | 44 | CONFIG_ARCH_HAS_ILOG2_U32=y |
42 | CONFIG_ARCH_HAS_ILOG2_U64=y | 45 | CONFIG_ARCH_HAS_ILOG2_U64=y |
43 | CONFIG_GENERIC_HWEIGHT=y | 46 | CONFIG_GENERIC_HWEIGHT=y |
44 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
45 | CONFIG_GENERIC_FIND_NEXT_BIT=y | 47 | CONFIG_GENERIC_FIND_NEXT_BIT=y |
46 | CONFIG_ARCH_NO_VIRT_TO_BUS=y | 48 | CONFIG_ARCH_NO_VIRT_TO_BUS=y |
47 | CONFIG_PPC=y | 49 | CONFIG_PPC=y |
@@ -62,6 +64,7 @@ CONFIG_DTC=y | |||
62 | # CONFIG_PPC_DCR_MMIO is not set | 64 | # CONFIG_PPC_DCR_MMIO is not set |
63 | CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y | 65 | CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y |
64 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 66 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
67 | CONFIG_CONSTRUCTORS=y | ||
65 | 68 | ||
66 | # | 69 | # |
67 | # General setup | 70 | # General setup |
@@ -113,7 +116,6 @@ CONFIG_SYSCTL_SYSCALL=y | |||
113 | CONFIG_KALLSYMS=y | 116 | CONFIG_KALLSYMS=y |
114 | CONFIG_KALLSYMS_ALL=y | 117 | CONFIG_KALLSYMS_ALL=y |
115 | CONFIG_KALLSYMS_EXTRA_PASS=y | 118 | CONFIG_KALLSYMS_EXTRA_PASS=y |
116 | # CONFIG_STRIP_ASM_SYMS is not set | ||
117 | CONFIG_HOTPLUG=y | 119 | CONFIG_HOTPLUG=y |
118 | CONFIG_PRINTK=y | 120 | CONFIG_PRINTK=y |
119 | CONFIG_BUG=y | 121 | CONFIG_BUG=y |
@@ -126,7 +128,14 @@ CONFIG_TIMERFD=y | |||
126 | CONFIG_EVENTFD=y | 128 | CONFIG_EVENTFD=y |
127 | CONFIG_SHMEM=y | 129 | CONFIG_SHMEM=y |
128 | CONFIG_AIO=y | 130 | CONFIG_AIO=y |
131 | CONFIG_HAVE_PERF_COUNTERS=y | ||
132 | |||
133 | # | ||
134 | # Performance Counters | ||
135 | # | ||
136 | # CONFIG_PERF_COUNTERS is not set | ||
129 | CONFIG_VM_EVENT_COUNTERS=y | 137 | CONFIG_VM_EVENT_COUNTERS=y |
138 | # CONFIG_STRIP_ASM_SYMS is not set | ||
130 | # CONFIG_COMPAT_BRK is not set | 139 | # CONFIG_COMPAT_BRK is not set |
131 | CONFIG_SLAB=y | 140 | CONFIG_SLAB=y |
132 | # CONFIG_SLUB is not set | 141 | # CONFIG_SLUB is not set |
@@ -145,6 +154,11 @@ CONFIG_HAVE_KRETPROBES=y | |||
145 | CONFIG_HAVE_ARCH_TRACEHOOK=y | 154 | CONFIG_HAVE_ARCH_TRACEHOOK=y |
146 | CONFIG_HAVE_DMA_ATTRS=y | 155 | CONFIG_HAVE_DMA_ATTRS=y |
147 | CONFIG_USE_GENERIC_SMP_HELPERS=y | 156 | CONFIG_USE_GENERIC_SMP_HELPERS=y |
157 | |||
158 | # | ||
159 | # GCOV-based kernel profiling | ||
160 | # | ||
161 | # CONFIG_GCOV_KERNEL is not set | ||
148 | # CONFIG_SLOW_WORK is not set | 162 | # CONFIG_SLOW_WORK is not set |
149 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 163 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
150 | CONFIG_SLABINFO=y | 164 | CONFIG_SLABINFO=y |
@@ -210,7 +224,7 @@ CONFIG_PPC_CELL=y | |||
210 | # | 224 | # |
211 | # Cell Broadband Engine options | 225 | # Cell Broadband Engine options |
212 | # | 226 | # |
213 | CONFIG_SPU_FS=y | 227 | CONFIG_SPU_FS=m |
214 | CONFIG_SPU_FS_64K_LS=y | 228 | CONFIG_SPU_FS_64K_LS=y |
215 | # CONFIG_SPU_TRACE is not set | 229 | # CONFIG_SPU_TRACE is not set |
216 | CONFIG_SPU_BASE=y | 230 | CONFIG_SPU_BASE=y |
@@ -255,6 +269,7 @@ CONFIG_BINFMT_MISC=y | |||
255 | CONFIG_HUGETLB_PAGE_SIZE_VARIABLE=y | 269 | CONFIG_HUGETLB_PAGE_SIZE_VARIABLE=y |
256 | # CONFIG_IOMMU_VMERGE is not set | 270 | # CONFIG_IOMMU_VMERGE is not set |
257 | CONFIG_IOMMU_HELPER=y | 271 | CONFIG_IOMMU_HELPER=y |
272 | # CONFIG_SWIOTLB is not set | ||
258 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | 273 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y |
259 | CONFIG_ARCH_HAS_WALK_MEMORY=y | 274 | CONFIG_ARCH_HAS_WALK_MEMORY=y |
260 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | 275 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y |
@@ -285,9 +300,9 @@ CONFIG_MIGRATION=y | |||
285 | CONFIG_PHYS_ADDR_T_64BIT=y | 300 | CONFIG_PHYS_ADDR_T_64BIT=y |
286 | CONFIG_ZONE_DMA_FLAG=1 | 301 | CONFIG_ZONE_DMA_FLAG=1 |
287 | CONFIG_BOUNCE=y | 302 | CONFIG_BOUNCE=y |
288 | CONFIG_UNEVICTABLE_LRU=y | ||
289 | CONFIG_HAVE_MLOCK=y | 303 | CONFIG_HAVE_MLOCK=y |
290 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | 304 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y |
305 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
291 | CONFIG_ARCH_MEMORY_PROBE=y | 306 | CONFIG_ARCH_MEMORY_PROBE=y |
292 | CONFIG_PPC_HAS_HASH_64K=y | 307 | CONFIG_PPC_HAS_HASH_64K=y |
293 | CONFIG_PPC_4K_PAGES=y | 308 | CONFIG_PPC_4K_PAGES=y |
@@ -399,6 +414,7 @@ CONFIG_IPV6_NDISC_NODETYPE=y | |||
399 | # CONFIG_ECONET is not set | 414 | # CONFIG_ECONET is not set |
400 | # CONFIG_WAN_ROUTER is not set | 415 | # CONFIG_WAN_ROUTER is not set |
401 | # CONFIG_PHONET is not set | 416 | # CONFIG_PHONET is not set |
417 | # CONFIG_IEEE802154 is not set | ||
402 | # CONFIG_NET_SCHED is not set | 418 | # CONFIG_NET_SCHED is not set |
403 | # CONFIG_DCB is not set | 419 | # CONFIG_DCB is not set |
404 | 420 | ||
@@ -433,11 +449,14 @@ CONFIG_BT_HCIBTUSB=m | |||
433 | CONFIG_WIRELESS=y | 449 | CONFIG_WIRELESS=y |
434 | CONFIG_CFG80211=m | 450 | CONFIG_CFG80211=m |
435 | # CONFIG_CFG80211_REG_DEBUG is not set | 451 | # CONFIG_CFG80211_REG_DEBUG is not set |
452 | # CONFIG_CFG80211_DEBUGFS is not set | ||
436 | # CONFIG_WIRELESS_OLD_REGULATORY is not set | 453 | # CONFIG_WIRELESS_OLD_REGULATORY is not set |
437 | CONFIG_WIRELESS_EXT=y | 454 | CONFIG_WIRELESS_EXT=y |
438 | # CONFIG_WIRELESS_EXT_SYSFS is not set | 455 | # CONFIG_WIRELESS_EXT_SYSFS is not set |
439 | # CONFIG_LIB80211 is not set | 456 | # CONFIG_LIB80211 is not set |
440 | CONFIG_MAC80211=m | 457 | CONFIG_MAC80211=m |
458 | CONFIG_MAC80211_DEFAULT_PS=y | ||
459 | CONFIG_MAC80211_DEFAULT_PS_VALUE=1 | ||
441 | 460 | ||
442 | # | 461 | # |
443 | # Rate control algorithm selection | 462 | # Rate control algorithm selection |
@@ -447,7 +466,6 @@ CONFIG_MAC80211_RC_PID=y | |||
447 | CONFIG_MAC80211_RC_DEFAULT_PID=y | 466 | CONFIG_MAC80211_RC_DEFAULT_PID=y |
448 | # CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set | 467 | # CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set |
449 | CONFIG_MAC80211_RC_DEFAULT="pid" | 468 | CONFIG_MAC80211_RC_DEFAULT="pid" |
450 | # CONFIG_MAC80211_MESH is not set | ||
451 | # CONFIG_MAC80211_LEDS is not set | 469 | # CONFIG_MAC80211_LEDS is not set |
452 | # CONFIG_MAC80211_DEBUGFS is not set | 470 | # CONFIG_MAC80211_DEBUGFS is not set |
453 | # CONFIG_MAC80211_DEBUG_MENU is not set | 471 | # CONFIG_MAC80211_DEBUG_MENU is not set |
@@ -472,77 +490,7 @@ CONFIG_EXTRA_FIRMWARE="" | |||
472 | # CONFIG_DEBUG_DEVRES is not set | 490 | # CONFIG_DEBUG_DEVRES is not set |
473 | # CONFIG_SYS_HYPERVISOR is not set | 491 | # CONFIG_SYS_HYPERVISOR is not set |
474 | # CONFIG_CONNECTOR is not set | 492 | # CONFIG_CONNECTOR is not set |
475 | CONFIG_MTD=y | 493 | # CONFIG_MTD is not set |
476 | CONFIG_MTD_DEBUG=y | ||
477 | CONFIG_MTD_DEBUG_VERBOSE=0 | ||
478 | # CONFIG_MTD_CONCAT is not set | ||
479 | # CONFIG_MTD_PARTITIONS is not set | ||
480 | # CONFIG_MTD_TESTS is not set | ||
481 | |||
482 | # | ||
483 | # User Modules And Translation Layers | ||
484 | # | ||
485 | # CONFIG_MTD_CHAR is not set | ||
486 | CONFIG_MTD_BLKDEVS=y | ||
487 | CONFIG_MTD_BLOCK=y | ||
488 | # CONFIG_FTL is not set | ||
489 | # CONFIG_NFTL is not set | ||
490 | # CONFIG_INFTL is not set | ||
491 | # CONFIG_RFD_FTL is not set | ||
492 | # CONFIG_SSFDC is not set | ||
493 | # CONFIG_MTD_OOPS is not set | ||
494 | |||
495 | # | ||
496 | # RAM/ROM/Flash chip drivers | ||
497 | # | ||
498 | # CONFIG_MTD_CFI is not set | ||
499 | # CONFIG_MTD_JEDECPROBE is not set | ||
500 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
501 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
502 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
503 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
504 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
505 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
506 | CONFIG_MTD_CFI_I1=y | ||
507 | CONFIG_MTD_CFI_I2=y | ||
508 | # CONFIG_MTD_CFI_I4 is not set | ||
509 | # CONFIG_MTD_CFI_I8 is not set | ||
510 | # CONFIG_MTD_RAM is not set | ||
511 | # CONFIG_MTD_ROM is not set | ||
512 | # CONFIG_MTD_ABSENT is not set | ||
513 | |||
514 | # | ||
515 | # Mapping drivers for chip access | ||
516 | # | ||
517 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
518 | # CONFIG_MTD_PLATRAM is not set | ||
519 | |||
520 | # | ||
521 | # Self-contained MTD device drivers | ||
522 | # | ||
523 | # CONFIG_MTD_SLRAM is not set | ||
524 | # CONFIG_MTD_PHRAM is not set | ||
525 | # CONFIG_MTD_MTDRAM is not set | ||
526 | # CONFIG_MTD_BLOCK2MTD is not set | ||
527 | |||
528 | # | ||
529 | # Disk-On-Chip Device Drivers | ||
530 | # | ||
531 | # CONFIG_MTD_DOC2000 is not set | ||
532 | # CONFIG_MTD_DOC2001 is not set | ||
533 | # CONFIG_MTD_DOC2001PLUS is not set | ||
534 | # CONFIG_MTD_NAND is not set | ||
535 | # CONFIG_MTD_ONENAND is not set | ||
536 | |||
537 | # | ||
538 | # LPDDR flash memory drivers | ||
539 | # | ||
540 | # CONFIG_MTD_LPDDR is not set | ||
541 | |||
542 | # | ||
543 | # UBI - Unsorted block images | ||
544 | # | ||
545 | # CONFIG_MTD_UBI is not set | ||
546 | CONFIG_OF_DEVICE=y | 494 | CONFIG_OF_DEVICE=y |
547 | # CONFIG_PARPORT is not set | 495 | # CONFIG_PARPORT is not set |
548 | CONFIG_BLK_DEV=y | 496 | CONFIG_BLK_DEV=y |
@@ -590,10 +538,6 @@ CONFIG_BLK_DEV_SR=y | |||
590 | # CONFIG_BLK_DEV_SR_VENDOR is not set | 538 | # CONFIG_BLK_DEV_SR_VENDOR is not set |
591 | CONFIG_CHR_DEV_SG=m | 539 | CONFIG_CHR_DEV_SG=m |
592 | # CONFIG_CHR_DEV_SCH is not set | 540 | # CONFIG_CHR_DEV_SCH is not set |
593 | |||
594 | # | ||
595 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
596 | # | ||
597 | CONFIG_SCSI_MULTI_LUN=y | 541 | CONFIG_SCSI_MULTI_LUN=y |
598 | # CONFIG_SCSI_CONSTANTS is not set | 542 | # CONFIG_SCSI_CONSTANTS is not set |
599 | # CONFIG_SCSI_LOGGING is not set | 543 | # CONFIG_SCSI_LOGGING is not set |
@@ -626,7 +570,6 @@ CONFIG_BLK_DEV_DM=m | |||
626 | # CONFIG_DM_UEVENT is not set | 570 | # CONFIG_DM_UEVENT is not set |
627 | # CONFIG_MACINTOSH_DRIVERS is not set | 571 | # CONFIG_MACINTOSH_DRIVERS is not set |
628 | CONFIG_NETDEVICES=y | 572 | CONFIG_NETDEVICES=y |
629 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
630 | # CONFIG_DUMMY is not set | 573 | # CONFIG_DUMMY is not set |
631 | # CONFIG_BONDING is not set | 574 | # CONFIG_BONDING is not set |
632 | # CONFIG_MACVLAN is not set | 575 | # CONFIG_MACVLAN is not set |
@@ -646,10 +589,11 @@ CONFIG_MII=m | |||
646 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | 589 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set |
647 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | 590 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set |
648 | # CONFIG_B44 is not set | 591 | # CONFIG_B44 is not set |
592 | # CONFIG_KS8842 is not set | ||
649 | CONFIG_NETDEV_1000=y | 593 | CONFIG_NETDEV_1000=y |
650 | CONFIG_GELIC_NET=y | 594 | CONFIG_GELIC_NET=y |
651 | CONFIG_GELIC_WIRELESS=y | 595 | CONFIG_GELIC_WIRELESS=y |
652 | CONFIG_GELIC_WIRELESS_OLD_PSK_INTERFACE=y | 596 | # CONFIG_GELIC_WIRELESS_OLD_PSK_INTERFACE is not set |
653 | # CONFIG_NETDEV_10000 is not set | 597 | # CONFIG_NETDEV_10000 is not set |
654 | 598 | ||
655 | # | 599 | # |
@@ -669,8 +613,7 @@ CONFIG_WLAN_80211=y | |||
669 | # CONFIG_HOSTAP is not set | 613 | # CONFIG_HOSTAP is not set |
670 | # CONFIG_B43 is not set | 614 | # CONFIG_B43 is not set |
671 | # CONFIG_B43LEGACY is not set | 615 | # CONFIG_B43LEGACY is not set |
672 | CONFIG_ZD1211RW=m | 616 | # CONFIG_ZD1211RW is not set |
673 | # CONFIG_ZD1211RW_DEBUG is not set | ||
674 | # CONFIG_RT2X00 is not set | 617 | # CONFIG_RT2X00 is not set |
675 | 618 | ||
676 | # | 619 | # |
@@ -682,7 +625,7 @@ CONFIG_ZD1211RW=m | |||
682 | # | 625 | # |
683 | # CONFIG_USB_CATC is not set | 626 | # CONFIG_USB_CATC is not set |
684 | # CONFIG_USB_KAWETH is not set | 627 | # CONFIG_USB_KAWETH is not set |
685 | CONFIG_USB_PEGASUS=m | 628 | # CONFIG_USB_PEGASUS is not set |
686 | # CONFIG_USB_RTL8150 is not set | 629 | # CONFIG_USB_RTL8150 is not set |
687 | CONFIG_USB_USBNET=m | 630 | CONFIG_USB_USBNET=m |
688 | CONFIG_USB_NET_AX8817X=m | 631 | CONFIG_USB_NET_AX8817X=m |
@@ -693,10 +636,11 @@ CONFIG_USB_NET_AX8817X=m | |||
693 | # CONFIG_USB_NET_GL620A is not set | 636 | # CONFIG_USB_NET_GL620A is not set |
694 | # CONFIG_USB_NET_NET1080 is not set | 637 | # CONFIG_USB_NET_NET1080 is not set |
695 | # CONFIG_USB_NET_PLUSB is not set | 638 | # CONFIG_USB_NET_PLUSB is not set |
696 | CONFIG_USB_NET_MCS7830=m | 639 | # CONFIG_USB_NET_MCS7830 is not set |
697 | # CONFIG_USB_NET_RNDIS_HOST is not set | 640 | # CONFIG_USB_NET_RNDIS_HOST is not set |
698 | # CONFIG_USB_NET_CDC_SUBSET is not set | 641 | # CONFIG_USB_NET_CDC_SUBSET is not set |
699 | # CONFIG_USB_NET_ZAURUS is not set | 642 | # CONFIG_USB_NET_ZAURUS is not set |
643 | # CONFIG_USB_NET_INT51X1 is not set | ||
700 | # CONFIG_WAN is not set | 644 | # CONFIG_WAN is not set |
701 | CONFIG_PPP=m | 645 | CONFIG_PPP=m |
702 | CONFIG_PPP_MULTILINK=y | 646 | CONFIG_PPP_MULTILINK=y |
@@ -771,8 +715,7 @@ CONFIG_DEVKMEM=y | |||
771 | # | 715 | # |
772 | CONFIG_UNIX98_PTYS=y | 716 | CONFIG_UNIX98_PTYS=y |
773 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 717 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
774 | CONFIG_LEGACY_PTYS=y | 718 | # CONFIG_LEGACY_PTYS is not set |
775 | CONFIG_LEGACY_PTY_COUNT=16 | ||
776 | # CONFIG_HVC_UDBG is not set | 719 | # CONFIG_HVC_UDBG is not set |
777 | # CONFIG_IPMI_HANDLER is not set | 720 | # CONFIG_IPMI_HANDLER is not set |
778 | # CONFIG_HW_RANDOM is not set | 721 | # CONFIG_HW_RANDOM is not set |
@@ -782,6 +725,11 @@ CONFIG_LEGACY_PTY_COUNT=16 | |||
782 | # CONFIG_TCG_TPM is not set | 725 | # CONFIG_TCG_TPM is not set |
783 | # CONFIG_I2C is not set | 726 | # CONFIG_I2C is not set |
784 | # CONFIG_SPI is not set | 727 | # CONFIG_SPI is not set |
728 | |||
729 | # | ||
730 | # PPS support | ||
731 | # | ||
732 | # CONFIG_PPS is not set | ||
785 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 733 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
786 | # CONFIG_GPIOLIB is not set | 734 | # CONFIG_GPIOLIB is not set |
787 | # CONFIG_W1 is not set | 735 | # CONFIG_W1 is not set |
@@ -805,22 +753,7 @@ CONFIG_SSB_POSSIBLE=y | |||
805 | # CONFIG_HTC_PASIC3 is not set | 753 | # CONFIG_HTC_PASIC3 is not set |
806 | # CONFIG_MFD_TMIO is not set | 754 | # CONFIG_MFD_TMIO is not set |
807 | # CONFIG_REGULATOR is not set | 755 | # CONFIG_REGULATOR is not set |
808 | 756 | # CONFIG_MEDIA_SUPPORT is not set | |
809 | # | ||
810 | # Multimedia devices | ||
811 | # | ||
812 | |||
813 | # | ||
814 | # Multimedia core support | ||
815 | # | ||
816 | # CONFIG_VIDEO_DEV is not set | ||
817 | # CONFIG_DVB_CORE is not set | ||
818 | # CONFIG_VIDEO_MEDIA is not set | ||
819 | |||
820 | # | ||
821 | # Multimedia drivers | ||
822 | # | ||
823 | # CONFIG_DAB is not set | ||
824 | 757 | ||
825 | # | 758 | # |
826 | # Graphics support | 759 | # Graphics support |
@@ -898,6 +831,11 @@ CONFIG_SND_SUPPORT_OLD_API=y | |||
898 | CONFIG_SND_VERBOSE_PROCFS=y | 831 | CONFIG_SND_VERBOSE_PROCFS=y |
899 | # CONFIG_SND_VERBOSE_PRINTK is not set | 832 | # CONFIG_SND_VERBOSE_PRINTK is not set |
900 | # CONFIG_SND_DEBUG is not set | 833 | # CONFIG_SND_DEBUG is not set |
834 | # CONFIG_SND_RAWMIDI_SEQ is not set | ||
835 | # CONFIG_SND_OPL3_LIB_SEQ is not set | ||
836 | # CONFIG_SND_OPL4_LIB_SEQ is not set | ||
837 | # CONFIG_SND_SBAWE_SEQ is not set | ||
838 | # CONFIG_SND_EMU10K1_SEQ is not set | ||
901 | # CONFIG_SND_DRIVERS is not set | 839 | # CONFIG_SND_DRIVERS is not set |
902 | CONFIG_SND_PPC=y | 840 | CONFIG_SND_PPC=y |
903 | CONFIG_SND_PS3=m | 841 | CONFIG_SND_PS3=m |
@@ -930,29 +868,34 @@ CONFIG_USB_HIDDEV=y | |||
930 | # Special HID drivers | 868 | # Special HID drivers |
931 | # | 869 | # |
932 | # CONFIG_HID_A4TECH is not set | 870 | # CONFIG_HID_A4TECH is not set |
933 | # CONFIG_HID_APPLE is not set | 871 | CONFIG_HID_APPLE=m |
934 | # CONFIG_HID_BELKIN is not set | 872 | CONFIG_HID_BELKIN=m |
935 | # CONFIG_HID_CHERRY is not set | 873 | CONFIG_HID_CHERRY=m |
936 | # CONFIG_HID_CHICONY is not set | 874 | # CONFIG_HID_CHICONY is not set |
937 | # CONFIG_HID_CYPRESS is not set | 875 | # CONFIG_HID_CYPRESS is not set |
938 | # CONFIG_DRAGONRISE_FF is not set | 876 | # CONFIG_HID_DRAGONRISE is not set |
939 | # CONFIG_HID_EZKEY is not set | 877 | CONFIG_HID_EZKEY=m |
940 | # CONFIG_HID_KYE is not set | 878 | # CONFIG_HID_KYE is not set |
941 | # CONFIG_HID_GYRATION is not set | 879 | # CONFIG_HID_GYRATION is not set |
942 | # CONFIG_HID_KENSINGTON is not set | 880 | # CONFIG_HID_KENSINGTON is not set |
943 | # CONFIG_HID_LOGITECH is not set | 881 | CONFIG_HID_LOGITECH=m |
944 | # CONFIG_HID_MICROSOFT is not set | 882 | # CONFIG_LOGITECH_FF is not set |
883 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | ||
884 | CONFIG_HID_MICROSOFT=m | ||
945 | # CONFIG_HID_MONTEREY is not set | 885 | # CONFIG_HID_MONTEREY is not set |
946 | # CONFIG_HID_NTRIG is not set | 886 | # CONFIG_HID_NTRIG is not set |
947 | # CONFIG_HID_PANTHERLORD is not set | 887 | # CONFIG_HID_PANTHERLORD is not set |
948 | # CONFIG_HID_PETALYNX is not set | 888 | # CONFIG_HID_PETALYNX is not set |
949 | # CONFIG_HID_SAMSUNG is not set | 889 | # CONFIG_HID_SAMSUNG is not set |
950 | CONFIG_HID_SONY=m | 890 | CONFIG_HID_SONY=m |
951 | # CONFIG_HID_SUNPLUS is not set | 891 | CONFIG_HID_SUNPLUS=m |
952 | # CONFIG_GREENASIA_FF is not set | 892 | # CONFIG_HID_GREENASIA is not set |
893 | CONFIG_HID_SMARTJOYPLUS=m | ||
894 | # CONFIG_SMARTJOYPLUS_FF is not set | ||
953 | # CONFIG_HID_TOPSEED is not set | 895 | # CONFIG_HID_TOPSEED is not set |
954 | # CONFIG_THRUSTMASTER_FF is not set | 896 | # CONFIG_HID_THRUSTMASTER is not set |
955 | # CONFIG_ZEROPLUS_FF is not set | 897 | # CONFIG_HID_WACOM is not set |
898 | # CONFIG_HID_ZEROPLUS is not set | ||
956 | CONFIG_USB_SUPPORT=y | 899 | CONFIG_USB_SUPPORT=y |
957 | CONFIG_USB_ARCH_HAS_HCD=y | 900 | CONFIG_USB_ARCH_HAS_HCD=y |
958 | CONFIG_USB_ARCH_HAS_OHCI=y | 901 | CONFIG_USB_ARCH_HAS_OHCI=y |
@@ -988,6 +931,8 @@ CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y | |||
988 | # CONFIG_USB_ISP116X_HCD is not set | 931 | # CONFIG_USB_ISP116X_HCD is not set |
989 | # CONFIG_USB_ISP1760_HCD is not set | 932 | # CONFIG_USB_ISP1760_HCD is not set |
990 | CONFIG_USB_OHCI_HCD=m | 933 | CONFIG_USB_OHCI_HCD=m |
934 | # CONFIG_USB_OHCI_HCD_PPC_OF_BE is not set | ||
935 | # CONFIG_USB_OHCI_HCD_PPC_OF_LE is not set | ||
991 | # CONFIG_USB_OHCI_HCD_PPC_OF is not set | 936 | # CONFIG_USB_OHCI_HCD_PPC_OF is not set |
992 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | 937 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set |
993 | CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y | 938 | CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y |
@@ -1115,6 +1060,10 @@ CONFIG_RTC_DRV_PS3=m | |||
1115 | # CONFIG_DMADEVICES is not set | 1060 | # CONFIG_DMADEVICES is not set |
1116 | # CONFIG_AUXDISPLAY is not set | 1061 | # CONFIG_AUXDISPLAY is not set |
1117 | # CONFIG_UIO is not set | 1062 | # CONFIG_UIO is not set |
1063 | |||
1064 | # | ||
1065 | # TI VLYNQ | ||
1066 | # | ||
1118 | # CONFIG_STAGING is not set | 1067 | # CONFIG_STAGING is not set |
1119 | 1068 | ||
1120 | # | 1069 | # |
@@ -1141,11 +1090,12 @@ CONFIG_FS_MBCACHE=y | |||
1141 | # CONFIG_REISERFS_FS is not set | 1090 | # CONFIG_REISERFS_FS is not set |
1142 | # CONFIG_JFS_FS is not set | 1091 | # CONFIG_JFS_FS is not set |
1143 | # CONFIG_FS_POSIX_ACL is not set | 1092 | # CONFIG_FS_POSIX_ACL is not set |
1144 | CONFIG_FILE_LOCKING=y | ||
1145 | # CONFIG_XFS_FS is not set | 1093 | # CONFIG_XFS_FS is not set |
1146 | # CONFIG_GFS2_FS is not set | 1094 | # CONFIG_GFS2_FS is not set |
1147 | # CONFIG_OCFS2_FS is not set | 1095 | # CONFIG_OCFS2_FS is not set |
1148 | # CONFIG_BTRFS_FS is not set | 1096 | # CONFIG_BTRFS_FS is not set |
1097 | CONFIG_FILE_LOCKING=y | ||
1098 | CONFIG_FSNOTIFY=y | ||
1149 | CONFIG_DNOTIFY=y | 1099 | CONFIG_DNOTIFY=y |
1150 | CONFIG_INOTIFY=y | 1100 | CONFIG_INOTIFY=y |
1151 | CONFIG_INOTIFY_USER=y | 1101 | CONFIG_INOTIFY_USER=y |
@@ -1205,7 +1155,6 @@ CONFIG_MISC_FILESYSTEMS=y | |||
1205 | # CONFIG_BEFS_FS is not set | 1155 | # CONFIG_BEFS_FS is not set |
1206 | # CONFIG_BFS_FS is not set | 1156 | # CONFIG_BFS_FS is not set |
1207 | # CONFIG_EFS_FS is not set | 1157 | # CONFIG_EFS_FS is not set |
1208 | # CONFIG_JFFS2_FS is not set | ||
1209 | # CONFIG_CRAMFS is not set | 1158 | # CONFIG_CRAMFS is not set |
1210 | # CONFIG_SQUASHFS is not set | 1159 | # CONFIG_SQUASHFS is not set |
1211 | # CONFIG_VXFS_FS is not set | 1160 | # CONFIG_VXFS_FS is not set |
@@ -1222,6 +1171,7 @@ CONFIG_NFS_FS=y | |||
1222 | CONFIG_NFS_V3=y | 1171 | CONFIG_NFS_V3=y |
1223 | # CONFIG_NFS_V3_ACL is not set | 1172 | # CONFIG_NFS_V3_ACL is not set |
1224 | CONFIG_NFS_V4=y | 1173 | CONFIG_NFS_V4=y |
1174 | # CONFIG_NFS_V4_1 is not set | ||
1225 | CONFIG_ROOT_NFS=y | 1175 | CONFIG_ROOT_NFS=y |
1226 | # CONFIG_NFSD is not set | 1176 | # CONFIG_NFSD is not set |
1227 | CONFIG_LOCKD=y | 1177 | CONFIG_LOCKD=y |
@@ -1359,7 +1309,6 @@ CONFIG_DEBUG_MEMORY_INIT=y | |||
1359 | CONFIG_DEBUG_LIST=y | 1309 | CONFIG_DEBUG_LIST=y |
1360 | # CONFIG_DEBUG_SG is not set | 1310 | # CONFIG_DEBUG_SG is not set |
1361 | # CONFIG_DEBUG_NOTIFIERS is not set | 1311 | # CONFIG_DEBUG_NOTIFIERS is not set |
1362 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
1363 | # CONFIG_RCU_TORTURE_TEST is not set | 1312 | # CONFIG_RCU_TORTURE_TEST is not set |
1364 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | 1313 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set |
1365 | # CONFIG_BACKTRACE_SELF_TEST is not set | 1314 | # CONFIG_BACKTRACE_SELF_TEST is not set |
@@ -1374,31 +1323,21 @@ CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | |||
1374 | CONFIG_HAVE_DYNAMIC_FTRACE=y | 1323 | CONFIG_HAVE_DYNAMIC_FTRACE=y |
1375 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | 1324 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y |
1376 | CONFIG_RING_BUFFER=y | 1325 | CONFIG_RING_BUFFER=y |
1326 | CONFIG_EVENT_TRACING=y | ||
1327 | CONFIG_CONTEXT_SWITCH_TRACER=y | ||
1377 | CONFIG_TRACING=y | 1328 | CONFIG_TRACING=y |
1378 | CONFIG_TRACING_SUPPORT=y | 1329 | CONFIG_TRACING_SUPPORT=y |
1379 | 1330 | # CONFIG_FTRACE is not set | |
1380 | # | ||
1381 | # Tracers | ||
1382 | # | ||
1383 | # CONFIG_FUNCTION_TRACER is not set | ||
1384 | # CONFIG_IRQSOFF_TRACER is not set | ||
1385 | # CONFIG_SCHED_TRACER is not set | ||
1386 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
1387 | # CONFIG_EVENT_TRACER is not set | ||
1388 | # CONFIG_BOOT_TRACER is not set | ||
1389 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
1390 | # CONFIG_STACK_TRACER is not set | ||
1391 | # CONFIG_KMEMTRACE is not set | ||
1392 | # CONFIG_WORKQUEUE_TRACER is not set | ||
1393 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
1394 | # CONFIG_FTRACE_STARTUP_TEST is not set | ||
1395 | # CONFIG_DYNAMIC_DEBUG is not set | 1331 | # CONFIG_DYNAMIC_DEBUG is not set |
1396 | # CONFIG_SAMPLES is not set | 1332 | # CONFIG_SAMPLES is not set |
1397 | CONFIG_HAVE_ARCH_KGDB=y | 1333 | CONFIG_HAVE_ARCH_KGDB=y |
1398 | # CONFIG_KGDB is not set | 1334 | # CONFIG_KGDB is not set |
1335 | # CONFIG_PPC_DISABLE_WERROR is not set | ||
1336 | CONFIG_PPC_WERROR=y | ||
1399 | CONFIG_PRINT_STACK_DEPTH=64 | 1337 | CONFIG_PRINT_STACK_DEPTH=64 |
1400 | CONFIG_DEBUG_STACKOVERFLOW=y | 1338 | CONFIG_DEBUG_STACKOVERFLOW=y |
1401 | # CONFIG_DEBUG_STACK_USAGE is not set | 1339 | # CONFIG_DEBUG_STACK_USAGE is not set |
1340 | # CONFIG_PPC_EMULATED_STATS is not set | ||
1402 | # CONFIG_CODE_PATCHING_SELFTEST is not set | 1341 | # CONFIG_CODE_PATCHING_SELFTEST is not set |
1403 | # CONFIG_FTR_FIXUP_SELFTEST is not set | 1342 | # CONFIG_FTR_FIXUP_SELFTEST is not set |
1404 | # CONFIG_MSI_BITMAP_SELFTEST is not set | 1343 | # CONFIG_MSI_BITMAP_SELFTEST is not set |
diff --git a/arch/powerpc/platforms/ps3/time.c b/arch/powerpc/platforms/ps3/time.c index b178a1e66c91..40b5cb433005 100644 --- a/arch/powerpc/platforms/ps3/time.c +++ b/arch/powerpc/platforms/ps3/time.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/kernel.h> | 21 | #include <linux/kernel.h> |
22 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
23 | 23 | ||
24 | #include <asm/firmware.h> | ||
24 | #include <asm/rtc.h> | 25 | #include <asm/rtc.h> |
25 | #include <asm/lv1call.h> | 26 | #include <asm/lv1call.h> |
26 | #include <asm/ps3.h> | 27 | #include <asm/ps3.h> |
@@ -84,6 +85,9 @@ static int __init ps3_rtc_init(void) | |||
84 | { | 85 | { |
85 | struct platform_device *pdev; | 86 | struct platform_device *pdev; |
86 | 87 | ||
88 | if (!firmware_has_feature(FW_FEATURE_PS3_LV1)) | ||
89 | return -ENODEV; | ||
90 | |||
87 | pdev = platform_device_register_simple("rtc-ps3", -1, NULL, 0); | 91 | pdev = platform_device_register_simple("rtc-ps3", -1, NULL, 0); |
88 | if (IS_ERR(pdev)) | 92 | if (IS_ERR(pdev)) |
89 | return PTR_ERR(pdev); | 93 | return PTR_ERR(pdev); |
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c index 9717717c6fea..cbb897bc50bd 100644 --- a/arch/s390/kernel/setup.c +++ b/arch/s390/kernel/setup.c | |||
@@ -154,6 +154,20 @@ static int __init condev_setup(char *str) | |||
154 | 154 | ||
155 | __setup("condev=", condev_setup); | 155 | __setup("condev=", condev_setup); |
156 | 156 | ||
157 | static void __init set_preferred_console(void) | ||
158 | { | ||
159 | if (MACHINE_IS_KVM) { | ||
160 | add_preferred_console("hvc", 0, NULL); | ||
161 | s390_virtio_console_init(); | ||
162 | return; | ||
163 | } | ||
164 | |||
165 | if (CONSOLE_IS_3215 || CONSOLE_IS_SCLP) | ||
166 | add_preferred_console("ttyS", 0, NULL); | ||
167 | if (CONSOLE_IS_3270) | ||
168 | add_preferred_console("tty3270", 0, NULL); | ||
169 | } | ||
170 | |||
157 | static int __init conmode_setup(char *str) | 171 | static int __init conmode_setup(char *str) |
158 | { | 172 | { |
159 | #if defined(CONFIG_SCLP_CONSOLE) || defined(CONFIG_SCLP_VT220_CONSOLE) | 173 | #if defined(CONFIG_SCLP_CONSOLE) || defined(CONFIG_SCLP_VT220_CONSOLE) |
@@ -168,6 +182,7 @@ static int __init conmode_setup(char *str) | |||
168 | if (strncmp(str, "3270", 5) == 0) | 182 | if (strncmp(str, "3270", 5) == 0) |
169 | SET_CONSOLE_3270; | 183 | SET_CONSOLE_3270; |
170 | #endif | 184 | #endif |
185 | set_preferred_console(); | ||
171 | return 1; | 186 | return 1; |
172 | } | 187 | } |
173 | 188 | ||
@@ -780,9 +795,6 @@ static void __init setup_hwcaps(void) | |||
780 | void __init | 795 | void __init |
781 | setup_arch(char **cmdline_p) | 796 | setup_arch(char **cmdline_p) |
782 | { | 797 | { |
783 | /* set up preferred console */ | ||
784 | add_preferred_console("ttyS", 0, NULL); | ||
785 | |||
786 | /* | 798 | /* |
787 | * print what head.S has found out about the machine | 799 | * print what head.S has found out about the machine |
788 | */ | 800 | */ |
@@ -802,11 +814,9 @@ setup_arch(char **cmdline_p) | |||
802 | if (MACHINE_IS_VM) | 814 | if (MACHINE_IS_VM) |
803 | pr_info("Linux is running as a z/VM " | 815 | pr_info("Linux is running as a z/VM " |
804 | "guest operating system in 64-bit mode\n"); | 816 | "guest operating system in 64-bit mode\n"); |
805 | else if (MACHINE_IS_KVM) { | 817 | else if (MACHINE_IS_KVM) |
806 | pr_info("Linux is running under KVM in 64-bit mode\n"); | 818 | pr_info("Linux is running under KVM in 64-bit mode\n"); |
807 | add_preferred_console("hvc", 0, NULL); | 819 | else |
808 | s390_virtio_console_init(); | ||
809 | } else | ||
810 | pr_info("Linux is running natively in 64-bit mode\n"); | 820 | pr_info("Linux is running natively in 64-bit mode\n"); |
811 | #endif /* CONFIG_64BIT */ | 821 | #endif /* CONFIG_64BIT */ |
812 | 822 | ||
@@ -851,6 +861,7 @@ setup_arch(char **cmdline_p) | |||
851 | 861 | ||
852 | /* Setup default console */ | 862 | /* Setup default console */ |
853 | conmode_default(); | 863 | conmode_default(); |
864 | set_preferred_console(); | ||
854 | 865 | ||
855 | /* Setup zfcpdump support */ | 866 | /* Setup zfcpdump support */ |
856 | setup_zfcpdump(console_devno); | 867 | setup_zfcpdump(console_devno); |
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c index 8fed45a2fb85..15456a0773bf 100644 --- a/arch/sh/boards/mach-se/7724/setup.c +++ b/arch/sh/boards/mach-se/7724/setup.c | |||
@@ -238,7 +238,7 @@ static struct platform_device ceu1_device = { | |||
238 | }, | 238 | }, |
239 | }; | 239 | }; |
240 | 240 | ||
241 | /* KEYSC */ | 241 | /* KEYSC in SoC (Needs SW33-2 set to ON) */ |
242 | static struct sh_keysc_info keysc_info = { | 242 | static struct sh_keysc_info keysc_info = { |
243 | .mode = SH_KEYSC_MODE_1, | 243 | .mode = SH_KEYSC_MODE_1, |
244 | .scan_timing = 10, | 244 | .scan_timing = 10, |
@@ -255,12 +255,13 @@ static struct sh_keysc_info keysc_info = { | |||
255 | 255 | ||
256 | static struct resource keysc_resources[] = { | 256 | static struct resource keysc_resources[] = { |
257 | [0] = { | 257 | [0] = { |
258 | .start = 0x1a204000, | 258 | .name = "KEYSC", |
259 | .end = 0x1a20400f, | 259 | .start = 0x044b0000, |
260 | .end = 0x044b000f, | ||
260 | .flags = IORESOURCE_MEM, | 261 | .flags = IORESOURCE_MEM, |
261 | }, | 262 | }, |
262 | [1] = { | 263 | [1] = { |
263 | .start = IRQ0_KEY, | 264 | .start = 79, |
264 | .flags = IORESOURCE_IRQ, | 265 | .flags = IORESOURCE_IRQ, |
265 | }, | 266 | }, |
266 | }; | 267 | }; |
diff --git a/arch/sh/kernel/cpu/shmobile/sleep.S b/arch/sh/kernel/cpu/shmobile/sleep.S index 5d888ef53d82..baf2d7d46b05 100644 --- a/arch/sh/kernel/cpu/shmobile/sleep.S +++ b/arch/sh/kernel/cpu/shmobile/sleep.S | |||
@@ -26,8 +26,30 @@ ENTRY(sh_mobile_standby) | |||
26 | 26 | ||
27 | tst #SUSP_SH_SF, r0 | 27 | tst #SUSP_SH_SF, r0 |
28 | bt skip_set_sf | 28 | bt skip_set_sf |
29 | #ifdef CONFIG_CPU_SUBTYPE_SH7724 | ||
30 | /* DBSC: put memory in self-refresh mode */ | ||
29 | 31 | ||
30 | /* SDRAM: disable power down and put in self-refresh mode */ | 32 | mov.l dben_reg, r4 |
33 | mov.l dben_data0, r1 | ||
34 | mov.l r1, @r4 | ||
35 | |||
36 | mov.l dbrfpdn0_reg, r4 | ||
37 | mov.l dbrfpdn0_data0, r1 | ||
38 | mov.l r1, @r4 | ||
39 | |||
40 | mov.l dbcmdcnt_reg, r4 | ||
41 | mov.l dbcmdcnt_data0, r1 | ||
42 | mov.l r1, @r4 | ||
43 | |||
44 | mov.l dbcmdcnt_reg, r4 | ||
45 | mov.l dbcmdcnt_data1, r1 | ||
46 | mov.l r1, @r4 | ||
47 | |||
48 | mov.l dbrfpdn0_reg, r4 | ||
49 | mov.l dbrfpdn0_data1, r1 | ||
50 | mov.l r1, @r4 | ||
51 | #else | ||
52 | /* SBSC: disable power down and put in self-refresh mode */ | ||
31 | mov.l 1f, r4 | 53 | mov.l 1f, r4 |
32 | mov.l 2f, r1 | 54 | mov.l 2f, r1 |
33 | mov.l @r4, r2 | 55 | mov.l @r4, r2 |
@@ -35,6 +57,7 @@ ENTRY(sh_mobile_standby) | |||
35 | mov.l 3f, r3 | 57 | mov.l 3f, r3 |
36 | and r3, r2 | 58 | and r3, r2 |
37 | mov.l r2, @r4 | 59 | mov.l r2, @r4 |
60 | #endif | ||
38 | 61 | ||
39 | skip_set_sf: | 62 | skip_set_sf: |
40 | tst #SUSP_SH_SLEEP, r0 | 63 | tst #SUSP_SH_SLEEP, r0 |
@@ -84,7 +107,36 @@ done_sleep: | |||
84 | tst #SUSP_SH_SF, r0 | 107 | tst #SUSP_SH_SF, r0 |
85 | bt skip_restore_sf | 108 | bt skip_restore_sf |
86 | 109 | ||
87 | /* SDRAM: set auto-refresh mode */ | 110 | #ifdef CONFIG_CPU_SUBTYPE_SH7724 |
111 | /* DBSC: put memory in auto-refresh mode */ | ||
112 | |||
113 | mov.l dbrfpdn0_reg, r4 | ||
114 | mov.l dbrfpdn0_data0, r1 | ||
115 | mov.l r1, @r4 | ||
116 | |||
117 | /* sleep 140 ns */ | ||
118 | nop | ||
119 | nop | ||
120 | nop | ||
121 | nop | ||
122 | |||
123 | mov.l dbcmdcnt_reg, r4 | ||
124 | mov.l dbcmdcnt_data0, r1 | ||
125 | mov.l r1, @r4 | ||
126 | |||
127 | mov.l dbcmdcnt_reg, r4 | ||
128 | mov.l dbcmdcnt_data1, r1 | ||
129 | mov.l r1, @r4 | ||
130 | |||
131 | mov.l dben_reg, r4 | ||
132 | mov.l dben_data1, r1 | ||
133 | mov.l r1, @r4 | ||
134 | |||
135 | mov.l dbrfpdn0_reg, r4 | ||
136 | mov.l dbrfpdn0_data2, r1 | ||
137 | mov.l r1, @r4 | ||
138 | #else | ||
139 | /* SBSC: set auto-refresh mode */ | ||
88 | mov.l 1f, r4 | 140 | mov.l 1f, r4 |
89 | mov.l @r4, r2 | 141 | mov.l @r4, r2 |
90 | mov.l 4f, r3 | 142 | mov.l 4f, r3 |
@@ -98,15 +150,29 @@ done_sleep: | |||
98 | add r4, r3 | 150 | add r4, r3 |
99 | or r2, r3 | 151 | or r2, r3 |
100 | mov.l r3, @r1 | 152 | mov.l r3, @r1 |
153 | #endif | ||
101 | skip_restore_sf: | 154 | skip_restore_sf: |
102 | rts | 155 | rts |
103 | nop | 156 | nop |
104 | 157 | ||
105 | .balign 4 | 158 | .balign 4 |
159 | #ifdef CONFIG_CPU_SUBTYPE_SH7724 | ||
160 | dben_reg: .long 0xfd000010 /* DBEN */ | ||
161 | dben_data0: .long 0 | ||
162 | dben_data1: .long 1 | ||
163 | dbrfpdn0_reg: .long 0xfd000040 /* DBRFPDN0 */ | ||
164 | dbrfpdn0_data0: .long 0 | ||
165 | dbrfpdn0_data1: .long 1 | ||
166 | dbrfpdn0_data2: .long 0x00010000 | ||
167 | dbcmdcnt_reg: .long 0xfd000014 /* DBCMDCNT */ | ||
168 | dbcmdcnt_data0: .long 2 | ||
169 | dbcmdcnt_data1: .long 4 | ||
170 | #else | ||
106 | 1: .long 0xfe400008 /* SDCR0 */ | 171 | 1: .long 0xfe400008 /* SDCR0 */ |
107 | 2: .long 0x00000400 | 172 | 2: .long 0x00000400 |
108 | 3: .long 0xffff7fff | 173 | 3: .long 0xffff7fff |
109 | 4: .long 0xfffffbff | 174 | 4: .long 0xfffffbff |
175 | #endif | ||
110 | 5: .long 0xa4150020 /* STBCR */ | 176 | 5: .long 0xa4150020 /* STBCR */ |
111 | 6: .long 0xfe40001c /* RTCOR */ | 177 | 6: .long 0xfe40001c /* RTCOR */ |
112 | 7: .long 0xfe400018 /* RTCNT */ | 178 | 7: .long 0xfe400018 /* RTCNT */ |
diff --git a/arch/sparc/configs/sparc32_defconfig b/arch/sparc/configs/sparc32_defconfig index 8bcd27af724b..a0f62a808edb 100644 --- a/arch/sparc/configs/sparc32_defconfig +++ b/arch/sparc/configs/sparc32_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.30-rc2 | 3 | # Linux kernel version: 2.6.31-rc1 |
4 | # Fri Apr 17 04:04:46 2009 | 4 | # Tue Aug 18 23:45:52 2009 |
5 | # | 5 | # |
6 | # CONFIG_64BIT is not set | 6 | # CONFIG_64BIT is not set |
7 | CONFIG_SPARC=y | 7 | CONFIG_SPARC=y |
@@ -17,6 +17,7 @@ CONFIG_GENERIC_ISA_DMA=y | |||
17 | CONFIG_ARCH_NO_VIRT_TO_BUS=y | 17 | CONFIG_ARCH_NO_VIRT_TO_BUS=y |
18 | CONFIG_OF=y | 18 | CONFIG_OF=y |
19 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 19 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
20 | CONFIG_CONSTRUCTORS=y | ||
20 | 21 | ||
21 | # | 22 | # |
22 | # General setup | 23 | # General setup |
@@ -74,7 +75,6 @@ CONFIG_SYSCTL_SYSCALL=y | |||
74 | CONFIG_KALLSYMS=y | 75 | CONFIG_KALLSYMS=y |
75 | # CONFIG_KALLSYMS_ALL is not set | 76 | # CONFIG_KALLSYMS_ALL is not set |
76 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 77 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
77 | # CONFIG_STRIP_ASM_SYMS is not set | ||
78 | CONFIG_HOTPLUG=y | 78 | CONFIG_HOTPLUG=y |
79 | CONFIG_PRINTK=y | 79 | CONFIG_PRINTK=y |
80 | CONFIG_BUG=y | 80 | CONFIG_BUG=y |
@@ -87,8 +87,13 @@ CONFIG_TIMERFD=y | |||
87 | CONFIG_EVENTFD=y | 87 | CONFIG_EVENTFD=y |
88 | CONFIG_SHMEM=y | 88 | CONFIG_SHMEM=y |
89 | CONFIG_AIO=y | 89 | CONFIG_AIO=y |
90 | |||
91 | # | ||
92 | # Performance Counters | ||
93 | # | ||
90 | CONFIG_VM_EVENT_COUNTERS=y | 94 | CONFIG_VM_EVENT_COUNTERS=y |
91 | CONFIG_PCI_QUIRKS=y | 95 | CONFIG_PCI_QUIRKS=y |
96 | # CONFIG_STRIP_ASM_SYMS is not set | ||
92 | CONFIG_COMPAT_BRK=y | 97 | CONFIG_COMPAT_BRK=y |
93 | CONFIG_SLAB=y | 98 | CONFIG_SLAB=y |
94 | # CONFIG_SLUB is not set | 99 | # CONFIG_SLUB is not set |
@@ -97,6 +102,10 @@ CONFIG_SLAB=y | |||
97 | # CONFIG_MARKERS is not set | 102 | # CONFIG_MARKERS is not set |
98 | CONFIG_HAVE_OPROFILE=y | 103 | CONFIG_HAVE_OPROFILE=y |
99 | CONFIG_HAVE_ARCH_TRACEHOOK=y | 104 | CONFIG_HAVE_ARCH_TRACEHOOK=y |
105 | |||
106 | # | ||
107 | # GCOV-based kernel profiling | ||
108 | # | ||
100 | # CONFIG_SLOW_WORK is not set | 109 | # CONFIG_SLOW_WORK is not set |
101 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 110 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
102 | CONFIG_SLABINFO=y | 111 | CONFIG_SLABINFO=y |
@@ -109,7 +118,7 @@ CONFIG_MODULE_UNLOAD=y | |||
109 | # CONFIG_MODVERSIONS is not set | 118 | # CONFIG_MODVERSIONS is not set |
110 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 119 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
111 | CONFIG_BLOCK=y | 120 | CONFIG_BLOCK=y |
112 | # CONFIG_LBD is not set | 121 | CONFIG_LBDAF=y |
113 | # CONFIG_BLK_DEV_BSG is not set | 122 | # CONFIG_BLK_DEV_BSG is not set |
114 | # CONFIG_BLK_DEV_INTEGRITY is not set | 123 | # CONFIG_BLK_DEV_INTEGRITY is not set |
115 | 124 | ||
@@ -154,9 +163,9 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 | |||
154 | # CONFIG_PHYS_ADDR_T_64BIT is not set | 163 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
155 | CONFIG_ZONE_DMA_FLAG=1 | 164 | CONFIG_ZONE_DMA_FLAG=1 |
156 | CONFIG_BOUNCE=y | 165 | CONFIG_BOUNCE=y |
157 | CONFIG_UNEVICTABLE_LRU=y | ||
158 | CONFIG_HAVE_MLOCK=y | 166 | CONFIG_HAVE_MLOCK=y |
159 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | 167 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y |
168 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
160 | CONFIG_SUN_PM=y | 169 | CONFIG_SUN_PM=y |
161 | # CONFIG_SPARC_LED is not set | 170 | # CONFIG_SPARC_LED is not set |
162 | CONFIG_SERIAL_CONSOLE=y | 171 | CONFIG_SERIAL_CONSOLE=y |
@@ -264,6 +273,7 @@ CONFIG_IPV6_TUNNEL=m | |||
264 | # CONFIG_ECONET is not set | 273 | # CONFIG_ECONET is not set |
265 | # CONFIG_WAN_ROUTER is not set | 274 | # CONFIG_WAN_ROUTER is not set |
266 | # CONFIG_PHONET is not set | 275 | # CONFIG_PHONET is not set |
276 | # CONFIG_IEEE802154 is not set | ||
267 | # CONFIG_NET_SCHED is not set | 277 | # CONFIG_NET_SCHED is not set |
268 | # CONFIG_DCB is not set | 278 | # CONFIG_DCB is not set |
269 | 279 | ||
@@ -281,7 +291,11 @@ CONFIG_WIRELESS=y | |||
281 | CONFIG_WIRELESS_OLD_REGULATORY=y | 291 | CONFIG_WIRELESS_OLD_REGULATORY=y |
282 | # CONFIG_WIRELESS_EXT is not set | 292 | # CONFIG_WIRELESS_EXT is not set |
283 | # CONFIG_LIB80211 is not set | 293 | # CONFIG_LIB80211 is not set |
284 | # CONFIG_MAC80211 is not set | 294 | |
295 | # | ||
296 | # CFG80211 needs to be enabled for MAC80211 | ||
297 | # | ||
298 | CONFIG_MAC80211_DEFAULT_PS_VALUE=0 | ||
285 | # CONFIG_WIMAX is not set | 299 | # CONFIG_WIMAX is not set |
286 | # CONFIG_RFKILL is not set | 300 | # CONFIG_RFKILL is not set |
287 | # CONFIG_NET_9P is not set | 301 | # CONFIG_NET_9P is not set |
@@ -335,6 +349,7 @@ CONFIG_MISC_DEVICES=y | |||
335 | # EEPROM support | 349 | # EEPROM support |
336 | # | 350 | # |
337 | # CONFIG_EEPROM_93CX6 is not set | 351 | # CONFIG_EEPROM_93CX6 is not set |
352 | # CONFIG_CB710_CORE is not set | ||
338 | CONFIG_HAVE_IDE=y | 353 | CONFIG_HAVE_IDE=y |
339 | # CONFIG_IDE is not set | 354 | # CONFIG_IDE is not set |
340 | 355 | ||
@@ -358,10 +373,6 @@ CONFIG_BLK_DEV_SR=m | |||
358 | # CONFIG_BLK_DEV_SR_VENDOR is not set | 373 | # CONFIG_BLK_DEV_SR_VENDOR is not set |
359 | CONFIG_CHR_DEV_SG=m | 374 | CONFIG_CHR_DEV_SG=m |
360 | # CONFIG_CHR_DEV_SCH is not set | 375 | # CONFIG_CHR_DEV_SCH is not set |
361 | |||
362 | # | ||
363 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
364 | # | ||
365 | # CONFIG_SCSI_MULTI_LUN is not set | 376 | # CONFIG_SCSI_MULTI_LUN is not set |
366 | # CONFIG_SCSI_CONSTANTS is not set | 377 | # CONFIG_SCSI_CONSTANTS is not set |
367 | # CONFIG_SCSI_LOGGING is not set | 378 | # CONFIG_SCSI_LOGGING is not set |
@@ -379,6 +390,7 @@ CONFIG_SCSI_SPI_ATTRS=y | |||
379 | CONFIG_SCSI_LOWLEVEL=y | 390 | CONFIG_SCSI_LOWLEVEL=y |
380 | # CONFIG_ISCSI_TCP is not set | 391 | # CONFIG_ISCSI_TCP is not set |
381 | # CONFIG_SCSI_CXGB3_ISCSI is not set | 392 | # CONFIG_SCSI_CXGB3_ISCSI is not set |
393 | # CONFIG_SCSI_BNX2_ISCSI is not set | ||
382 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | 394 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set |
383 | # CONFIG_SCSI_3W_9XXX is not set | 395 | # CONFIG_SCSI_3W_9XXX is not set |
384 | # CONFIG_SCSI_ACARD is not set | 396 | # CONFIG_SCSI_ACARD is not set |
@@ -387,6 +399,7 @@ CONFIG_SCSI_LOWLEVEL=y | |||
387 | # CONFIG_SCSI_AIC7XXX_OLD is not set | 399 | # CONFIG_SCSI_AIC7XXX_OLD is not set |
388 | # CONFIG_SCSI_AIC79XX is not set | 400 | # CONFIG_SCSI_AIC79XX is not set |
389 | # CONFIG_SCSI_AIC94XX is not set | 401 | # CONFIG_SCSI_AIC94XX is not set |
402 | # CONFIG_SCSI_MVSAS is not set | ||
390 | # CONFIG_SCSI_ARCMSR is not set | 403 | # CONFIG_SCSI_ARCMSR is not set |
391 | # CONFIG_MEGARAID_NEWGEN is not set | 404 | # CONFIG_MEGARAID_NEWGEN is not set |
392 | # CONFIG_MEGARAID_LEGACY is not set | 405 | # CONFIG_MEGARAID_LEGACY is not set |
@@ -401,7 +414,6 @@ CONFIG_SCSI_LOWLEVEL=y | |||
401 | # CONFIG_SCSI_IPS is not set | 414 | # CONFIG_SCSI_IPS is not set |
402 | # CONFIG_SCSI_INITIO is not set | 415 | # CONFIG_SCSI_INITIO is not set |
403 | # CONFIG_SCSI_INIA100 is not set | 416 | # CONFIG_SCSI_INIA100 is not set |
404 | # CONFIG_SCSI_MVSAS is not set | ||
405 | # CONFIG_SCSI_STEX is not set | 417 | # CONFIG_SCSI_STEX is not set |
406 | # CONFIG_SCSI_SYM53C8XX_2 is not set | 418 | # CONFIG_SCSI_SYM53C8XX_2 is not set |
407 | # CONFIG_SCSI_QLOGIC_1280 is not set | 419 | # CONFIG_SCSI_QLOGIC_1280 is not set |
@@ -426,13 +438,16 @@ CONFIG_SCSI_SUNESP=y | |||
426 | # | 438 | # |
427 | 439 | ||
428 | # | 440 | # |
429 | # Enable only one of the two stacks, unless you know what you are doing | 441 | # You can enable one or both FireWire driver stacks. |
442 | # | ||
443 | |||
444 | # | ||
445 | # See the help texts for more information. | ||
430 | # | 446 | # |
431 | # CONFIG_FIREWIRE is not set | 447 | # CONFIG_FIREWIRE is not set |
432 | # CONFIG_IEEE1394 is not set | 448 | # CONFIG_IEEE1394 is not set |
433 | # CONFIG_I2O is not set | 449 | # CONFIG_I2O is not set |
434 | CONFIG_NETDEVICES=y | 450 | CONFIG_NETDEVICES=y |
435 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
436 | CONFIG_DUMMY=m | 451 | CONFIG_DUMMY=m |
437 | # CONFIG_BONDING is not set | 452 | # CONFIG_BONDING is not set |
438 | # CONFIG_MACVLAN is not set | 453 | # CONFIG_MACVLAN is not set |
@@ -463,6 +478,7 @@ CONFIG_SUNQE=m | |||
463 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | 478 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set |
464 | # CONFIG_NET_PCI is not set | 479 | # CONFIG_NET_PCI is not set |
465 | # CONFIG_B44 is not set | 480 | # CONFIG_B44 is not set |
481 | # CONFIG_KS8842 is not set | ||
466 | # CONFIG_ATL2 is not set | 482 | # CONFIG_ATL2 is not set |
467 | CONFIG_NETDEV_1000=y | 483 | CONFIG_NETDEV_1000=y |
468 | # CONFIG_ACENIC is not set | 484 | # CONFIG_ACENIC is not set |
@@ -482,6 +498,7 @@ CONFIG_NETDEV_1000=y | |||
482 | # CONFIG_VIA_VELOCITY is not set | 498 | # CONFIG_VIA_VELOCITY is not set |
483 | # CONFIG_TIGON3 is not set | 499 | # CONFIG_TIGON3 is not set |
484 | # CONFIG_BNX2 is not set | 500 | # CONFIG_BNX2 is not set |
501 | # CONFIG_CNIC is not set | ||
485 | # CONFIG_QLA3XXX is not set | 502 | # CONFIG_QLA3XXX is not set |
486 | # CONFIG_ATL1 is not set | 503 | # CONFIG_ATL1 is not set |
487 | # CONFIG_ATL1E is not set | 504 | # CONFIG_ATL1E is not set |
@@ -629,6 +646,11 @@ CONFIG_HW_RANDOM=m | |||
629 | CONFIG_DEVPORT=y | 646 | CONFIG_DEVPORT=y |
630 | # CONFIG_I2C is not set | 647 | # CONFIG_I2C is not set |
631 | # CONFIG_SPI is not set | 648 | # CONFIG_SPI is not set |
649 | |||
650 | # | ||
651 | # PPS support | ||
652 | # | ||
653 | # CONFIG_PPS is not set | ||
632 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 654 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
633 | # CONFIG_GPIOLIB is not set | 655 | # CONFIG_GPIOLIB is not set |
634 | # CONFIG_W1 is not set | 656 | # CONFIG_W1 is not set |
@@ -668,22 +690,7 @@ CONFIG_SSB_POSSIBLE=y | |||
668 | # CONFIG_HTC_PASIC3 is not set | 690 | # CONFIG_HTC_PASIC3 is not set |
669 | # CONFIG_MFD_TMIO is not set | 691 | # CONFIG_MFD_TMIO is not set |
670 | # CONFIG_REGULATOR is not set | 692 | # CONFIG_REGULATOR is not set |
671 | 693 | # CONFIG_MEDIA_SUPPORT is not set | |
672 | # | ||
673 | # Multimedia devices | ||
674 | # | ||
675 | |||
676 | # | ||
677 | # Multimedia core support | ||
678 | # | ||
679 | # CONFIG_VIDEO_DEV is not set | ||
680 | # CONFIG_DVB_CORE is not set | ||
681 | # CONFIG_VIDEO_MEDIA is not set | ||
682 | |||
683 | # | ||
684 | # Multimedia drivers | ||
685 | # | ||
686 | # CONFIG_DAB is not set | ||
687 | 694 | ||
688 | # | 695 | # |
689 | # Graphics support | 696 | # Graphics support |
@@ -776,6 +783,10 @@ CONFIG_RTC_DRV_M48T59=y | |||
776 | # CONFIG_DMADEVICES is not set | 783 | # CONFIG_DMADEVICES is not set |
777 | # CONFIG_AUXDISPLAY is not set | 784 | # CONFIG_AUXDISPLAY is not set |
778 | # CONFIG_UIO is not set | 785 | # CONFIG_UIO is not set |
786 | |||
787 | # | ||
788 | # TI VLYNQ | ||
789 | # | ||
779 | # CONFIG_STAGING is not set | 790 | # CONFIG_STAGING is not set |
780 | 791 | ||
781 | # | 792 | # |
@@ -799,10 +810,12 @@ CONFIG_FS_MBCACHE=y | |||
799 | # CONFIG_REISERFS_FS is not set | 810 | # CONFIG_REISERFS_FS is not set |
800 | # CONFIG_JFS_FS is not set | 811 | # CONFIG_JFS_FS is not set |
801 | CONFIG_FS_POSIX_ACL=y | 812 | CONFIG_FS_POSIX_ACL=y |
802 | CONFIG_FILE_LOCKING=y | ||
803 | # CONFIG_XFS_FS is not set | 813 | # CONFIG_XFS_FS is not set |
814 | # CONFIG_GFS2_FS is not set | ||
804 | # CONFIG_OCFS2_FS is not set | 815 | # CONFIG_OCFS2_FS is not set |
805 | # CONFIG_BTRFS_FS is not set | 816 | # CONFIG_BTRFS_FS is not set |
817 | CONFIG_FILE_LOCKING=y | ||
818 | CONFIG_FSNOTIFY=y | ||
806 | CONFIG_DNOTIFY=y | 819 | CONFIG_DNOTIFY=y |
807 | CONFIG_INOTIFY=y | 820 | CONFIG_INOTIFY=y |
808 | CONFIG_INOTIFY_USER=y | 821 | CONFIG_INOTIFY_USER=y |
@@ -985,6 +998,7 @@ CONFIG_KGDB=y | |||
985 | CONFIG_KGDB_SERIAL_CONSOLE=y | 998 | CONFIG_KGDB_SERIAL_CONSOLE=y |
986 | CONFIG_KGDB_TESTS=y | 999 | CONFIG_KGDB_TESTS=y |
987 | # CONFIG_KGDB_TESTS_ON_BOOT is not set | 1000 | # CONFIG_KGDB_TESTS_ON_BOOT is not set |
1001 | # CONFIG_KMEMCHECK is not set | ||
988 | # CONFIG_DEBUG_STACK_USAGE is not set | 1002 | # CONFIG_DEBUG_STACK_USAGE is not set |
989 | # CONFIG_STACK_DEBUG is not set | 1003 | # CONFIG_STACK_DEBUG is not set |
990 | 1004 | ||
diff --git a/arch/sparc/configs/sparc64_defconfig b/arch/sparc/configs/sparc64_defconfig index 0123a4c596ce..fdddf7a6f725 100644 --- a/arch/sparc/configs/sparc64_defconfig +++ b/arch/sparc/configs/sparc64_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.30 | 3 | # Linux kernel version: 2.6.31-rc1 |
4 | # Tue Jun 16 04:59:36 2009 | 4 | # Tue Aug 18 23:56:02 2009 |
5 | # | 5 | # |
6 | CONFIG_64BIT=y | 6 | CONFIG_64BIT=y |
7 | CONFIG_SPARC=y | 7 | CONFIG_SPARC=y |
@@ -26,6 +26,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y | |||
26 | CONFIG_OF=y | 26 | CONFIG_OF=y |
27 | CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y | 27 | CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y |
28 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 28 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
29 | CONFIG_CONSTRUCTORS=y | ||
29 | 30 | ||
30 | # | 31 | # |
31 | # General setup | 32 | # General setup |
@@ -119,6 +120,11 @@ CONFIG_HAVE_KPROBES=y | |||
119 | CONFIG_HAVE_KRETPROBES=y | 120 | CONFIG_HAVE_KRETPROBES=y |
120 | CONFIG_HAVE_ARCH_TRACEHOOK=y | 121 | CONFIG_HAVE_ARCH_TRACEHOOK=y |
121 | CONFIG_USE_GENERIC_SMP_HELPERS=y | 122 | CONFIG_USE_GENERIC_SMP_HELPERS=y |
123 | |||
124 | # | ||
125 | # GCOV-based kernel profiling | ||
126 | # | ||
127 | # CONFIG_GCOV_KERNEL is not set | ||
122 | # CONFIG_SLOW_WORK is not set | 128 | # CONFIG_SLOW_WORK is not set |
123 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 129 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
124 | CONFIG_SLABINFO=y | 130 | CONFIG_SLABINFO=y |
@@ -204,7 +210,6 @@ CONFIG_MIGRATION=y | |||
204 | CONFIG_PHYS_ADDR_T_64BIT=y | 210 | CONFIG_PHYS_ADDR_T_64BIT=y |
205 | CONFIG_ZONE_DMA_FLAG=0 | 211 | CONFIG_ZONE_DMA_FLAG=0 |
206 | CONFIG_NR_QUICK=1 | 212 | CONFIG_NR_QUICK=1 |
207 | CONFIG_UNEVICTABLE_LRU=y | ||
208 | CONFIG_HAVE_MLOCK=y | 213 | CONFIG_HAVE_MLOCK=y |
209 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | 214 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y |
210 | CONFIG_DEFAULT_MMAP_MIN_ADDR=8192 | 215 | CONFIG_DEFAULT_MMAP_MIN_ADDR=8192 |
@@ -410,6 +415,7 @@ CONFIG_MISC_DEVICES=y | |||
410 | # | 415 | # |
411 | # CONFIG_EEPROM_AT24 is not set | 416 | # CONFIG_EEPROM_AT24 is not set |
412 | # CONFIG_EEPROM_LEGACY is not set | 417 | # CONFIG_EEPROM_LEGACY is not set |
418 | # CONFIG_EEPROM_MAX6875 is not set | ||
413 | # CONFIG_EEPROM_93CX6 is not set | 419 | # CONFIG_EEPROM_93CX6 is not set |
414 | # CONFIG_CB710_CORE is not set | 420 | # CONFIG_CB710_CORE is not set |
415 | CONFIG_HAVE_IDE=y | 421 | CONFIG_HAVE_IDE=y |
@@ -562,6 +568,7 @@ CONFIG_BLK_DEV_DM=m | |||
562 | CONFIG_DM_CRYPT=m | 568 | CONFIG_DM_CRYPT=m |
563 | CONFIG_DM_SNAPSHOT=m | 569 | CONFIG_DM_SNAPSHOT=m |
564 | CONFIG_DM_MIRROR=m | 570 | CONFIG_DM_MIRROR=m |
571 | # CONFIG_DM_LOG_USERSPACE is not set | ||
565 | CONFIG_DM_ZERO=m | 572 | CONFIG_DM_ZERO=m |
566 | # CONFIG_DM_MULTIPATH is not set | 573 | # CONFIG_DM_MULTIPATH is not set |
567 | # CONFIG_DM_DELAY is not set | 574 | # CONFIG_DM_DELAY is not set |
@@ -573,7 +580,11 @@ CONFIG_DM_ZERO=m | |||
573 | # | 580 | # |
574 | 581 | ||
575 | # | 582 | # |
576 | # Enable only one of the two stacks, unless you know what you are doing | 583 | # You can enable one or both FireWire driver stacks. |
584 | # | ||
585 | |||
586 | # | ||
587 | # See the help texts for more information. | ||
577 | # | 588 | # |
578 | # CONFIG_FIREWIRE is not set | 589 | # CONFIG_FIREWIRE is not set |
579 | # CONFIG_IEEE1394 is not set | 590 | # CONFIG_IEEE1394 is not set |
@@ -667,6 +678,7 @@ CONFIG_E1000E=m | |||
667 | # CONFIG_VIA_VELOCITY is not set | 678 | # CONFIG_VIA_VELOCITY is not set |
668 | CONFIG_TIGON3=m | 679 | CONFIG_TIGON3=m |
669 | CONFIG_BNX2=m | 680 | CONFIG_BNX2=m |
681 | # CONFIG_CNIC is not set | ||
670 | # CONFIG_QLA3XXX is not set | 682 | # CONFIG_QLA3XXX is not set |
671 | # CONFIG_ATL1 is not set | 683 | # CONFIG_ATL1 is not set |
672 | # CONFIG_ATL1E is not set | 684 | # CONFIG_ATL1E is not set |
@@ -773,6 +785,7 @@ CONFIG_MOUSE_SERIAL=y | |||
773 | # CONFIG_MOUSE_APPLETOUCH is not set | 785 | # CONFIG_MOUSE_APPLETOUCH is not set |
774 | # CONFIG_MOUSE_BCM5974 is not set | 786 | # CONFIG_MOUSE_BCM5974 is not set |
775 | # CONFIG_MOUSE_VSXXXAA is not set | 787 | # CONFIG_MOUSE_VSXXXAA is not set |
788 | # CONFIG_MOUSE_SYNAPTICS_I2C is not set | ||
776 | # CONFIG_INPUT_JOYSTICK is not set | 789 | # CONFIG_INPUT_JOYSTICK is not set |
777 | # CONFIG_INPUT_TABLET is not set | 790 | # CONFIG_INPUT_TABLET is not set |
778 | # CONFIG_INPUT_TOUCHSCREEN is not set | 791 | # CONFIG_INPUT_TOUCHSCREEN is not set |
@@ -870,6 +883,7 @@ CONFIG_I2C_ALGOBIT=y | |||
870 | # | 883 | # |
871 | # I2C system bus drivers (mostly embedded / system-on-chip) | 884 | # I2C system bus drivers (mostly embedded / system-on-chip) |
872 | # | 885 | # |
886 | # CONFIG_I2C_DESIGNWARE is not set | ||
873 | # CONFIG_I2C_OCORES is not set | 887 | # CONFIG_I2C_OCORES is not set |
874 | # CONFIG_I2C_SIMTEC is not set | 888 | # CONFIG_I2C_SIMTEC is not set |
875 | 889 | ||
@@ -898,13 +912,17 @@ CONFIG_I2C_ALGOBIT=y | |||
898 | # CONFIG_SENSORS_PCF8574 is not set | 912 | # CONFIG_SENSORS_PCF8574 is not set |
899 | # CONFIG_PCF8575 is not set | 913 | # CONFIG_PCF8575 is not set |
900 | # CONFIG_SENSORS_PCA9539 is not set | 914 | # CONFIG_SENSORS_PCA9539 is not set |
901 | # CONFIG_SENSORS_MAX6875 is not set | ||
902 | # CONFIG_SENSORS_TSL2550 is not set | 915 | # CONFIG_SENSORS_TSL2550 is not set |
903 | # CONFIG_I2C_DEBUG_CORE is not set | 916 | # CONFIG_I2C_DEBUG_CORE is not set |
904 | # CONFIG_I2C_DEBUG_ALGO is not set | 917 | # CONFIG_I2C_DEBUG_ALGO is not set |
905 | # CONFIG_I2C_DEBUG_BUS is not set | 918 | # CONFIG_I2C_DEBUG_BUS is not set |
906 | # CONFIG_I2C_DEBUG_CHIP is not set | 919 | # CONFIG_I2C_DEBUG_CHIP is not set |
907 | # CONFIG_SPI is not set | 920 | # CONFIG_SPI is not set |
921 | |||
922 | # | ||
923 | # PPS support | ||
924 | # | ||
925 | # CONFIG_PPS is not set | ||
908 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 926 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
909 | # CONFIG_GPIOLIB is not set | 927 | # CONFIG_GPIOLIB is not set |
910 | # CONFIG_W1 is not set | 928 | # CONFIG_W1 is not set |
@@ -959,6 +977,7 @@ CONFIG_HWMON=y | |||
959 | # CONFIG_SENSORS_SMSC47B397 is not set | 977 | # CONFIG_SENSORS_SMSC47B397 is not set |
960 | # CONFIG_SENSORS_ADS7828 is not set | 978 | # CONFIG_SENSORS_ADS7828 is not set |
961 | # CONFIG_SENSORS_THMC50 is not set | 979 | # CONFIG_SENSORS_THMC50 is not set |
980 | # CONFIG_SENSORS_TMP401 is not set | ||
962 | # CONFIG_SENSORS_VIA686A is not set | 981 | # CONFIG_SENSORS_VIA686A is not set |
963 | # CONFIG_SENSORS_VT1211 is not set | 982 | # CONFIG_SENSORS_VT1211 is not set |
964 | # CONFIG_SENSORS_VT8231 is not set | 983 | # CONFIG_SENSORS_VT8231 is not set |
@@ -994,23 +1013,9 @@ CONFIG_SSB_POSSIBLE=y | |||
994 | # CONFIG_MFD_WM8400 is not set | 1013 | # CONFIG_MFD_WM8400 is not set |
995 | # CONFIG_MFD_WM8350_I2C is not set | 1014 | # CONFIG_MFD_WM8350_I2C is not set |
996 | # CONFIG_MFD_PCF50633 is not set | 1015 | # CONFIG_MFD_PCF50633 is not set |
1016 | # CONFIG_AB3100_CORE is not set | ||
997 | # CONFIG_REGULATOR is not set | 1017 | # CONFIG_REGULATOR is not set |
998 | 1018 | # CONFIG_MEDIA_SUPPORT is not set | |
999 | # | ||
1000 | # Multimedia devices | ||
1001 | # | ||
1002 | |||
1003 | # | ||
1004 | # Multimedia core support | ||
1005 | # | ||
1006 | # CONFIG_VIDEO_DEV is not set | ||
1007 | # CONFIG_DVB_CORE is not set | ||
1008 | # CONFIG_VIDEO_MEDIA is not set | ||
1009 | |||
1010 | # | ||
1011 | # Multimedia drivers | ||
1012 | # | ||
1013 | # CONFIG_DAB is not set | ||
1014 | 1019 | ||
1015 | # | 1020 | # |
1016 | # Graphics support | 1021 | # Graphics support |
@@ -1284,7 +1289,6 @@ CONFIG_USB=y | |||
1284 | # | 1289 | # |
1285 | # Miscellaneous USB options | 1290 | # Miscellaneous USB options |
1286 | # | 1291 | # |
1287 | CONFIG_USB_DEVICEFS=y | ||
1288 | # CONFIG_USB_DEVICE_CLASS is not set | 1292 | # CONFIG_USB_DEVICE_CLASS is not set |
1289 | # CONFIG_USB_DYNAMIC_MINORS is not set | 1293 | # CONFIG_USB_DYNAMIC_MINORS is not set |
1290 | # CONFIG_USB_OTG is not set | 1294 | # CONFIG_USB_OTG is not set |
@@ -1296,6 +1300,7 @@ CONFIG_USB_DEVICEFS=y | |||
1296 | # USB Host Controller Drivers | 1300 | # USB Host Controller Drivers |
1297 | # | 1301 | # |
1298 | # CONFIG_USB_C67X00_HCD is not set | 1302 | # CONFIG_USB_C67X00_HCD is not set |
1303 | # CONFIG_USB_XHCI_HCD is not set | ||
1299 | CONFIG_USB_EHCI_HCD=m | 1304 | CONFIG_USB_EHCI_HCD=m |
1300 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | 1305 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set |
1301 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | 1306 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set |
@@ -1374,7 +1379,6 @@ CONFIG_USB_STORAGE=m | |||
1374 | # CONFIG_USB_LD is not set | 1379 | # CONFIG_USB_LD is not set |
1375 | # CONFIG_USB_TRANCEVIBRATOR is not set | 1380 | # CONFIG_USB_TRANCEVIBRATOR is not set |
1376 | # CONFIG_USB_IOWARRIOR is not set | 1381 | # CONFIG_USB_IOWARRIOR is not set |
1377 | # CONFIG_USB_TEST is not set | ||
1378 | # CONFIG_USB_ISIGHTFW is not set | 1382 | # CONFIG_USB_ISIGHTFW is not set |
1379 | # CONFIG_USB_VST is not set | 1383 | # CONFIG_USB_VST is not set |
1380 | # CONFIG_USB_GADGET is not set | 1384 | # CONFIG_USB_GADGET is not set |
@@ -1420,6 +1424,7 @@ CONFIG_RTC_INTF_DEV=y | |||
1420 | # CONFIG_RTC_DRV_S35390A is not set | 1424 | # CONFIG_RTC_DRV_S35390A is not set |
1421 | # CONFIG_RTC_DRV_FM3130 is not set | 1425 | # CONFIG_RTC_DRV_FM3130 is not set |
1422 | # CONFIG_RTC_DRV_RX8581 is not set | 1426 | # CONFIG_RTC_DRV_RX8581 is not set |
1427 | # CONFIG_RTC_DRV_RX8025 is not set | ||
1423 | 1428 | ||
1424 | # | 1429 | # |
1425 | # SPI RTC drivers | 1430 | # SPI RTC drivers |
@@ -1448,6 +1453,10 @@ CONFIG_RTC_DRV_STARFIRE=y | |||
1448 | # CONFIG_DMADEVICES is not set | 1453 | # CONFIG_DMADEVICES is not set |
1449 | # CONFIG_AUXDISPLAY is not set | 1454 | # CONFIG_AUXDISPLAY is not set |
1450 | # CONFIG_UIO is not set | 1455 | # CONFIG_UIO is not set |
1456 | |||
1457 | # | ||
1458 | # TI VLYNQ | ||
1459 | # | ||
1451 | # CONFIG_STAGING is not set | 1460 | # CONFIG_STAGING is not set |
1452 | 1461 | ||
1453 | # | 1462 | # |
@@ -1480,11 +1489,11 @@ CONFIG_FS_MBCACHE=y | |||
1480 | # CONFIG_REISERFS_FS is not set | 1489 | # CONFIG_REISERFS_FS is not set |
1481 | # CONFIG_JFS_FS is not set | 1490 | # CONFIG_JFS_FS is not set |
1482 | CONFIG_FS_POSIX_ACL=y | 1491 | CONFIG_FS_POSIX_ACL=y |
1483 | CONFIG_FILE_LOCKING=y | ||
1484 | # CONFIG_XFS_FS is not set | 1492 | # CONFIG_XFS_FS is not set |
1485 | # CONFIG_GFS2_FS is not set | 1493 | # CONFIG_GFS2_FS is not set |
1486 | # CONFIG_OCFS2_FS is not set | 1494 | # CONFIG_OCFS2_FS is not set |
1487 | # CONFIG_BTRFS_FS is not set | 1495 | # CONFIG_BTRFS_FS is not set |
1496 | CONFIG_FILE_LOCKING=y | ||
1488 | CONFIG_FSNOTIFY=y | 1497 | CONFIG_FSNOTIFY=y |
1489 | CONFIG_DNOTIFY=y | 1498 | CONFIG_DNOTIFY=y |
1490 | CONFIG_INOTIFY=y | 1499 | CONFIG_INOTIFY=y |
@@ -1560,7 +1569,7 @@ CONFIG_NETWORK_FILESYSTEMS=y | |||
1560 | # CONFIG_PARTITION_ADVANCED is not set | 1569 | # CONFIG_PARTITION_ADVANCED is not set |
1561 | CONFIG_MSDOS_PARTITION=y | 1570 | CONFIG_MSDOS_PARTITION=y |
1562 | CONFIG_SUN_PARTITION=y | 1571 | CONFIG_SUN_PARTITION=y |
1563 | CONFIG_NLS=m | 1572 | CONFIG_NLS=y |
1564 | CONFIG_NLS_DEFAULT="iso8859-1" | 1573 | CONFIG_NLS_DEFAULT="iso8859-1" |
1565 | # CONFIG_NLS_CODEPAGE_437 is not set | 1574 | # CONFIG_NLS_CODEPAGE_437 is not set |
1566 | # CONFIG_NLS_CODEPAGE_737 is not set | 1575 | # CONFIG_NLS_CODEPAGE_737 is not set |
diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h index b049abf9902f..0ff92fa22064 100644 --- a/arch/sparc/include/asm/pgtable_64.h +++ b/arch/sparc/include/asm/pgtable_64.h | |||
@@ -726,11 +726,17 @@ extern unsigned long pte_file(pte_t); | |||
726 | extern pte_t pgoff_to_pte(unsigned long); | 726 | extern pte_t pgoff_to_pte(unsigned long); |
727 | #define PTE_FILE_MAX_BITS (64UL - PAGE_SHIFT - 1UL) | 727 | #define PTE_FILE_MAX_BITS (64UL - PAGE_SHIFT - 1UL) |
728 | 728 | ||
729 | extern unsigned long *sparc64_valid_addr_bitmap; | 729 | extern unsigned long sparc64_valid_addr_bitmap[]; |
730 | 730 | ||
731 | /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ | 731 | /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ |
732 | #define kern_addr_valid(addr) \ | 732 | static inline bool kern_addr_valid(unsigned long addr) |
733 | (test_bit(__pa((unsigned long)(addr))>>22, sparc64_valid_addr_bitmap)) | 733 | { |
734 | unsigned long paddr = __pa(addr); | ||
735 | |||
736 | if ((paddr >> 41UL) != 0UL) | ||
737 | return false; | ||
738 | return test_bit(paddr >> 22, sparc64_valid_addr_bitmap); | ||
739 | } | ||
734 | 740 | ||
735 | extern int page_in_phys_avail(unsigned long paddr); | 741 | extern int page_in_phys_avail(unsigned long paddr); |
736 | 742 | ||
diff --git a/arch/sparc/kernel/ktlb.S b/arch/sparc/kernel/ktlb.S index cef8defcd7a9..3ea6e8cde8c5 100644 --- a/arch/sparc/kernel/ktlb.S +++ b/arch/sparc/kernel/ktlb.S | |||
@@ -151,12 +151,46 @@ kvmap_dtlb_4v: | |||
151 | * Must preserve %g1 and %g6 (TAG). | 151 | * Must preserve %g1 and %g6 (TAG). |
152 | */ | 152 | */ |
153 | kvmap_dtlb_tsb4m_miss: | 153 | kvmap_dtlb_tsb4m_miss: |
154 | sethi %hi(kpte_linear_bitmap), %g2 | 154 | /* Clear the PAGE_OFFSET top virtual bits, shift |
155 | or %g2, %lo(kpte_linear_bitmap), %g2 | 155 | * down to get PFN, and make sure PFN is in range. |
156 | */ | ||
157 | sllx %g4, 21, %g5 | ||
156 | 158 | ||
157 | /* Clear the PAGE_OFFSET top virtual bits, then shift | 159 | /* Check to see if we know about valid memory at the 4MB |
158 | * down to get a 256MB physical address index. | 160 | * chunk this physical address will reside within. |
159 | */ | 161 | */ |
162 | srlx %g5, 21 + 41, %g2 | ||
163 | brnz,pn %g2, kvmap_dtlb_longpath | ||
164 | nop | ||
165 | |||
166 | /* This unconditional branch and delay-slot nop gets patched | ||
167 | * by the sethi sequence once the bitmap is properly setup. | ||
168 | */ | ||
169 | .globl valid_addr_bitmap_insn | ||
170 | valid_addr_bitmap_insn: | ||
171 | ba,pt %xcc, 2f | ||
172 | nop | ||
173 | .subsection 2 | ||
174 | .globl valid_addr_bitmap_patch | ||
175 | valid_addr_bitmap_patch: | ||
176 | sethi %hi(sparc64_valid_addr_bitmap), %g7 | ||
177 | or %g7, %lo(sparc64_valid_addr_bitmap), %g7 | ||
178 | .previous | ||
179 | |||
180 | srlx %g5, 21 + 22, %g2 | ||
181 | srlx %g2, 6, %g5 | ||
182 | and %g2, 63, %g2 | ||
183 | sllx %g5, 3, %g5 | ||
184 | ldx [%g7 + %g5], %g5 | ||
185 | mov 1, %g7 | ||
186 | sllx %g7, %g2, %g7 | ||
187 | andcc %g5, %g7, %g0 | ||
188 | be,pn %xcc, kvmap_dtlb_longpath | ||
189 | |||
190 | 2: sethi %hi(kpte_linear_bitmap), %g2 | ||
191 | or %g2, %lo(kpte_linear_bitmap), %g2 | ||
192 | |||
193 | /* Get the 256MB physical address index. */ | ||
160 | sllx %g4, 21, %g5 | 194 | sllx %g4, 21, %g5 |
161 | mov 1, %g7 | 195 | mov 1, %g7 |
162 | srlx %g5, 21 + 28, %g5 | 196 | srlx %g5, 21 + 28, %g5 |
diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c index fa44eaf8d897..3691907a43b4 100644 --- a/arch/sparc/kernel/smp_64.c +++ b/arch/sparc/kernel/smp_64.c | |||
@@ -1499,7 +1499,7 @@ void __init setup_per_cpu_areas(void) | |||
1499 | dyn_size = pcpur_size - static_size - PERCPU_MODULE_RESERVE; | 1499 | dyn_size = pcpur_size - static_size - PERCPU_MODULE_RESERVE; |
1500 | 1500 | ||
1501 | 1501 | ||
1502 | ptrs_size = PFN_ALIGN(num_possible_cpus() * sizeof(pcpur_ptrs[0])); | 1502 | ptrs_size = PFN_ALIGN(nr_cpu_ids * sizeof(pcpur_ptrs[0])); |
1503 | pcpur_ptrs = alloc_bootmem(ptrs_size); | 1503 | pcpur_ptrs = alloc_bootmem(ptrs_size); |
1504 | 1504 | ||
1505 | for_each_possible_cpu(cpu) { | 1505 | for_each_possible_cpu(cpu) { |
@@ -1514,7 +1514,7 @@ void __init setup_per_cpu_areas(void) | |||
1514 | 1514 | ||
1515 | /* allocate address and map */ | 1515 | /* allocate address and map */ |
1516 | vm.flags = VM_ALLOC; | 1516 | vm.flags = VM_ALLOC; |
1517 | vm.size = num_possible_cpus() * PCPU_CHUNK_SIZE; | 1517 | vm.size = nr_cpu_ids * PCPU_CHUNK_SIZE; |
1518 | vm_area_register_early(&vm, PCPU_CHUNK_SIZE); | 1518 | vm_area_register_early(&vm, PCPU_CHUNK_SIZE); |
1519 | 1519 | ||
1520 | for_each_possible_cpu(cpu) { | 1520 | for_each_possible_cpu(cpu) { |
diff --git a/arch/sparc/kernel/sun4d_smp.c b/arch/sparc/kernel/sun4d_smp.c index 54fb02468f0d..68791cad7b74 100644 --- a/arch/sparc/kernel/sun4d_smp.c +++ b/arch/sparc/kernel/sun4d_smp.c | |||
@@ -162,9 +162,6 @@ extern void cpu_panic(void); | |||
162 | */ | 162 | */ |
163 | 163 | ||
164 | extern struct linux_prom_registers smp_penguin_ctable; | 164 | extern struct linux_prom_registers smp_penguin_ctable; |
165 | extern unsigned long trapbase_cpu1[]; | ||
166 | extern unsigned long trapbase_cpu2[]; | ||
167 | extern unsigned long trapbase_cpu3[]; | ||
168 | 165 | ||
169 | void __init smp4d_boot_cpus(void) | 166 | void __init smp4d_boot_cpus(void) |
170 | { | 167 | { |
@@ -235,25 +232,6 @@ void __init smp4d_smp_done(void) | |||
235 | *prev = first; | 232 | *prev = first; |
236 | local_flush_cache_all(); | 233 | local_flush_cache_all(); |
237 | 234 | ||
238 | /* Free unneeded trap tables */ | ||
239 | ClearPageReserved(virt_to_page(trapbase_cpu1)); | ||
240 | init_page_count(virt_to_page(trapbase_cpu1)); | ||
241 | free_page((unsigned long)trapbase_cpu1); | ||
242 | totalram_pages++; | ||
243 | num_physpages++; | ||
244 | |||
245 | ClearPageReserved(virt_to_page(trapbase_cpu2)); | ||
246 | init_page_count(virt_to_page(trapbase_cpu2)); | ||
247 | free_page((unsigned long)trapbase_cpu2); | ||
248 | totalram_pages++; | ||
249 | num_physpages++; | ||
250 | |||
251 | ClearPageReserved(virt_to_page(trapbase_cpu3)); | ||
252 | init_page_count(virt_to_page(trapbase_cpu3)); | ||
253 | free_page((unsigned long)trapbase_cpu3); | ||
254 | totalram_pages++; | ||
255 | num_physpages++; | ||
256 | |||
257 | /* Ok, they are spinning and ready to go. */ | 235 | /* Ok, they are spinning and ready to go. */ |
258 | smp_processors_ready = 1; | 236 | smp_processors_ready = 1; |
259 | sun4d_distribute_irqs(); | 237 | sun4d_distribute_irqs(); |
diff --git a/arch/sparc/kernel/sun4m_smp.c b/arch/sparc/kernel/sun4m_smp.c index 960b113d0006..762d6eedd944 100644 --- a/arch/sparc/kernel/sun4m_smp.c +++ b/arch/sparc/kernel/sun4m_smp.c | |||
@@ -121,9 +121,6 @@ void __cpuinit smp4m_callin(void) | |||
121 | */ | 121 | */ |
122 | 122 | ||
123 | extern struct linux_prom_registers smp_penguin_ctable; | 123 | extern struct linux_prom_registers smp_penguin_ctable; |
124 | extern unsigned long trapbase_cpu1[]; | ||
125 | extern unsigned long trapbase_cpu2[]; | ||
126 | extern unsigned long trapbase_cpu3[]; | ||
127 | 124 | ||
128 | void __init smp4m_boot_cpus(void) | 125 | void __init smp4m_boot_cpus(void) |
129 | { | 126 | { |
@@ -193,29 +190,6 @@ void __init smp4m_smp_done(void) | |||
193 | *prev = first; | 190 | *prev = first; |
194 | local_flush_cache_all(); | 191 | local_flush_cache_all(); |
195 | 192 | ||
196 | /* Free unneeded trap tables */ | ||
197 | if (!cpu_isset(1, cpu_present_map)) { | ||
198 | ClearPageReserved(virt_to_page(trapbase_cpu1)); | ||
199 | init_page_count(virt_to_page(trapbase_cpu1)); | ||
200 | free_page((unsigned long)trapbase_cpu1); | ||
201 | totalram_pages++; | ||
202 | num_physpages++; | ||
203 | } | ||
204 | if (!cpu_isset(2, cpu_present_map)) { | ||
205 | ClearPageReserved(virt_to_page(trapbase_cpu2)); | ||
206 | init_page_count(virt_to_page(trapbase_cpu2)); | ||
207 | free_page((unsigned long)trapbase_cpu2); | ||
208 | totalram_pages++; | ||
209 | num_physpages++; | ||
210 | } | ||
211 | if (!cpu_isset(3, cpu_present_map)) { | ||
212 | ClearPageReserved(virt_to_page(trapbase_cpu3)); | ||
213 | init_page_count(virt_to_page(trapbase_cpu3)); | ||
214 | free_page((unsigned long)trapbase_cpu3); | ||
215 | totalram_pages++; | ||
216 | num_physpages++; | ||
217 | } | ||
218 | |||
219 | /* Ok, they are spinning and ready to go. */ | 193 | /* Ok, they are spinning and ready to go. */ |
220 | } | 194 | } |
221 | 195 | ||
diff --git a/arch/sparc/kernel/sys32.S b/arch/sparc/kernel/sys32.S index f061c4dda9ef..aed94869ad6a 100644 --- a/arch/sparc/kernel/sys32.S +++ b/arch/sparc/kernel/sys32.S | |||
@@ -134,10 +134,12 @@ SIGN1(sys32_getpeername, sys_getpeername, %o0) | |||
134 | SIGN1(sys32_getsockname, sys_getsockname, %o0) | 134 | SIGN1(sys32_getsockname, sys_getsockname, %o0) |
135 | SIGN2(sys32_ioprio_get, sys_ioprio_get, %o0, %o1) | 135 | SIGN2(sys32_ioprio_get, sys_ioprio_get, %o0, %o1) |
136 | SIGN3(sys32_ioprio_set, sys_ioprio_set, %o0, %o1, %o2) | 136 | SIGN3(sys32_ioprio_set, sys_ioprio_set, %o0, %o1, %o2) |
137 | SIGN2(sys32_splice, sys_splice, %o0, %o1) | 137 | SIGN2(sys32_splice, sys_splice, %o0, %o2) |
138 | SIGN2(sys32_sync_file_range, compat_sync_file_range, %o0, %o5) | 138 | SIGN2(sys32_sync_file_range, compat_sync_file_range, %o0, %o5) |
139 | SIGN2(sys32_tee, sys_tee, %o0, %o1) | 139 | SIGN2(sys32_tee, sys_tee, %o0, %o1) |
140 | SIGN1(sys32_vmsplice, compat_sys_vmsplice, %o0) | 140 | SIGN1(sys32_vmsplice, compat_sys_vmsplice, %o0) |
141 | SIGN1(sys32_truncate, sys_truncate, %o1) | ||
142 | SIGN1(sys32_ftruncate, sys_ftruncate, %o1) | ||
141 | 143 | ||
142 | .globl sys32_mmap2 | 144 | .globl sys32_mmap2 |
143 | sys32_mmap2: | 145 | sys32_mmap2: |
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S index 6b3ee88e253c..2ee7250ba7ae 100644 --- a/arch/sparc/kernel/systbls_64.S +++ b/arch/sparc/kernel/systbls_64.S | |||
@@ -43,8 +43,8 @@ sys_call_table32: | |||
43 | /*110*/ .word sys_setresgid, sys_getresgid, sys_setregid, sys_nis_syscall, sys_nis_syscall | 43 | /*110*/ .word sys_setresgid, sys_getresgid, sys_setregid, sys_nis_syscall, sys_nis_syscall |
44 | .word sys32_getgroups, compat_sys_gettimeofday, sys32_getrusage, sys_nis_syscall, sys_getcwd | 44 | .word sys32_getgroups, compat_sys_gettimeofday, sys32_getrusage, sys_nis_syscall, sys_getcwd |
45 | /*120*/ .word compat_sys_readv, compat_sys_writev, compat_sys_settimeofday, sys_fchown16, sys_fchmod | 45 | /*120*/ .word compat_sys_readv, compat_sys_writev, compat_sys_settimeofday, sys_fchown16, sys_fchmod |
46 | .word sys_nis_syscall, sys_setreuid16, sys_setregid16, sys_rename, sys_truncate | 46 | .word sys_nis_syscall, sys_setreuid16, sys_setregid16, sys_rename, sys32_truncate |
47 | /*130*/ .word sys_ftruncate, sys_flock, compat_sys_lstat64, sys_nis_syscall, sys_nis_syscall | 47 | /*130*/ .word sys32_ftruncate, sys_flock, compat_sys_lstat64, sys_nis_syscall, sys_nis_syscall |
48 | .word sys_nis_syscall, sys32_mkdir, sys_rmdir, compat_sys_utimes, compat_sys_stat64 | 48 | .word sys_nis_syscall, sys32_mkdir, sys_rmdir, compat_sys_utimes, compat_sys_stat64 |
49 | /*140*/ .word sys32_sendfile64, sys_nis_syscall, sys32_futex, sys_gettid, compat_sys_getrlimit | 49 | /*140*/ .word sys32_sendfile64, sys_nis_syscall, sys32_futex, sys_gettid, compat_sys_getrlimit |
50 | .word compat_sys_setrlimit, sys_pivot_root, sys32_prctl, sys_pciconfig_read, sys_pciconfig_write | 50 | .word compat_sys_setrlimit, sys_pivot_root, sys32_prctl, sys_pciconfig_read, sys_pciconfig_write |
diff --git a/arch/sparc/mm/fault_32.c b/arch/sparc/mm/fault_32.c index a5e30c642ee3..b99f81c4906f 100644 --- a/arch/sparc/mm/fault_32.c +++ b/arch/sparc/mm/fault_32.c | |||
@@ -319,9 +319,10 @@ no_context: | |||
319 | */ | 319 | */ |
320 | out_of_memory: | 320 | out_of_memory: |
321 | up_read(&mm->mmap_sem); | 321 | up_read(&mm->mmap_sem); |
322 | printk("VM: killing process %s\n", tsk->comm); | 322 | if (from_user) { |
323 | if (from_user) | 323 | pagefault_out_of_memory(); |
324 | do_group_exit(SIGKILL); | 324 | return; |
325 | } | ||
325 | goto no_context; | 326 | goto no_context; |
326 | 327 | ||
327 | do_sigbus: | 328 | do_sigbus: |
diff --git a/arch/sparc/mm/fault_64.c b/arch/sparc/mm/fault_64.c index e5620b27c8bf..43b0da96a4fb 100644 --- a/arch/sparc/mm/fault_64.c +++ b/arch/sparc/mm/fault_64.c | |||
@@ -447,9 +447,10 @@ handle_kernel_fault: | |||
447 | out_of_memory: | 447 | out_of_memory: |
448 | insn = get_fault_insn(regs, insn); | 448 | insn = get_fault_insn(regs, insn); |
449 | up_read(&mm->mmap_sem); | 449 | up_read(&mm->mmap_sem); |
450 | printk("VM: killing process %s\n", current->comm); | 450 | if (!(regs->tstate & TSTATE_PRIV)) { |
451 | if (!(regs->tstate & TSTATE_PRIV)) | 451 | pagefault_out_of_memory(); |
452 | do_group_exit(SIGKILL); | 452 | return; |
453 | } | ||
453 | goto handle_kernel_fault; | 454 | goto handle_kernel_fault; |
454 | 455 | ||
455 | intr_or_no_mm: | 456 | intr_or_no_mm: |
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c index ed6be6ba2f4e..a70a5e1904d9 100644 --- a/arch/sparc/mm/init_64.c +++ b/arch/sparc/mm/init_64.c | |||
@@ -145,7 +145,8 @@ static void __init read_obp_memory(const char *property, | |||
145 | cmp_p64, NULL); | 145 | cmp_p64, NULL); |
146 | } | 146 | } |
147 | 147 | ||
148 | unsigned long *sparc64_valid_addr_bitmap __read_mostly; | 148 | unsigned long sparc64_valid_addr_bitmap[VALID_ADDR_BITMAP_BYTES / |
149 | sizeof(unsigned long)]; | ||
149 | EXPORT_SYMBOL(sparc64_valid_addr_bitmap); | 150 | EXPORT_SYMBOL(sparc64_valid_addr_bitmap); |
150 | 151 | ||
151 | /* Kernel physical address base and size in bytes. */ | 152 | /* Kernel physical address base and size in bytes. */ |
@@ -1874,7 +1875,7 @@ static int pavail_rescan_ents __initdata; | |||
1874 | * memory list again, and make sure it provides at least as much | 1875 | * memory list again, and make sure it provides at least as much |
1875 | * memory as 'pavail' does. | 1876 | * memory as 'pavail' does. |
1876 | */ | 1877 | */ |
1877 | static void __init setup_valid_addr_bitmap_from_pavail(void) | 1878 | static void __init setup_valid_addr_bitmap_from_pavail(unsigned long *bitmap) |
1878 | { | 1879 | { |
1879 | int i; | 1880 | int i; |
1880 | 1881 | ||
@@ -1897,8 +1898,7 @@ static void __init setup_valid_addr_bitmap_from_pavail(void) | |||
1897 | 1898 | ||
1898 | if (new_start <= old_start && | 1899 | if (new_start <= old_start && |
1899 | new_end >= (old_start + PAGE_SIZE)) { | 1900 | new_end >= (old_start + PAGE_SIZE)) { |
1900 | set_bit(old_start >> 22, | 1901 | set_bit(old_start >> 22, bitmap); |
1901 | sparc64_valid_addr_bitmap); | ||
1902 | goto do_next_page; | 1902 | goto do_next_page; |
1903 | } | 1903 | } |
1904 | } | 1904 | } |
@@ -1919,20 +1919,21 @@ static void __init setup_valid_addr_bitmap_from_pavail(void) | |||
1919 | } | 1919 | } |
1920 | } | 1920 | } |
1921 | 1921 | ||
1922 | static void __init patch_tlb_miss_handler_bitmap(void) | ||
1923 | { | ||
1924 | extern unsigned int valid_addr_bitmap_insn[]; | ||
1925 | extern unsigned int valid_addr_bitmap_patch[]; | ||
1926 | |||
1927 | valid_addr_bitmap_insn[1] = valid_addr_bitmap_patch[1]; | ||
1928 | mb(); | ||
1929 | valid_addr_bitmap_insn[0] = valid_addr_bitmap_patch[0]; | ||
1930 | flushi(&valid_addr_bitmap_insn[0]); | ||
1931 | } | ||
1932 | |||
1922 | void __init mem_init(void) | 1933 | void __init mem_init(void) |
1923 | { | 1934 | { |
1924 | unsigned long codepages, datapages, initpages; | 1935 | unsigned long codepages, datapages, initpages; |
1925 | unsigned long addr, last; | 1936 | unsigned long addr, last; |
1926 | int i; | ||
1927 | |||
1928 | i = last_valid_pfn >> ((22 - PAGE_SHIFT) + 6); | ||
1929 | i += 1; | ||
1930 | sparc64_valid_addr_bitmap = (unsigned long *) alloc_bootmem(i << 3); | ||
1931 | if (sparc64_valid_addr_bitmap == NULL) { | ||
1932 | prom_printf("mem_init: Cannot alloc valid_addr_bitmap.\n"); | ||
1933 | prom_halt(); | ||
1934 | } | ||
1935 | memset(sparc64_valid_addr_bitmap, 0, i << 3); | ||
1936 | 1937 | ||
1937 | addr = PAGE_OFFSET + kern_base; | 1938 | addr = PAGE_OFFSET + kern_base; |
1938 | last = PAGE_ALIGN(kern_size) + addr; | 1939 | last = PAGE_ALIGN(kern_size) + addr; |
@@ -1941,15 +1942,19 @@ void __init mem_init(void) | |||
1941 | addr += PAGE_SIZE; | 1942 | addr += PAGE_SIZE; |
1942 | } | 1943 | } |
1943 | 1944 | ||
1944 | setup_valid_addr_bitmap_from_pavail(); | 1945 | setup_valid_addr_bitmap_from_pavail(sparc64_valid_addr_bitmap); |
1946 | patch_tlb_miss_handler_bitmap(); | ||
1945 | 1947 | ||
1946 | high_memory = __va(last_valid_pfn << PAGE_SHIFT); | 1948 | high_memory = __va(last_valid_pfn << PAGE_SHIFT); |
1947 | 1949 | ||
1948 | #ifdef CONFIG_NEED_MULTIPLE_NODES | 1950 | #ifdef CONFIG_NEED_MULTIPLE_NODES |
1949 | for_each_online_node(i) { | 1951 | { |
1950 | if (NODE_DATA(i)->node_spanned_pages != 0) { | 1952 | int i; |
1951 | totalram_pages += | 1953 | for_each_online_node(i) { |
1952 | free_all_bootmem_node(NODE_DATA(i)); | 1954 | if (NODE_DATA(i)->node_spanned_pages != 0) { |
1955 | totalram_pages += | ||
1956 | free_all_bootmem_node(NODE_DATA(i)); | ||
1957 | } | ||
1953 | } | 1958 | } |
1954 | } | 1959 | } |
1955 | #else | 1960 | #else |
diff --git a/arch/sparc/mm/init_64.h b/arch/sparc/mm/init_64.h index 16063870a489..c2f772dbd556 100644 --- a/arch/sparc/mm/init_64.h +++ b/arch/sparc/mm/init_64.h | |||
@@ -5,10 +5,13 @@ | |||
5 | * marked non-static so that assembler code can get at them. | 5 | * marked non-static so that assembler code can get at them. |
6 | */ | 6 | */ |
7 | 7 | ||
8 | #define MAX_PHYS_ADDRESS (1UL << 42UL) | 8 | #define MAX_PHYS_ADDRESS (1UL << 41UL) |
9 | #define KPTE_BITMAP_CHUNK_SZ (256UL * 1024UL * 1024UL) | 9 | #define KPTE_BITMAP_CHUNK_SZ (256UL * 1024UL * 1024UL) |
10 | #define KPTE_BITMAP_BYTES \ | 10 | #define KPTE_BITMAP_BYTES \ |
11 | ((MAX_PHYS_ADDRESS / KPTE_BITMAP_CHUNK_SZ) / 8) | 11 | ((MAX_PHYS_ADDRESS / KPTE_BITMAP_CHUNK_SZ) / 8) |
12 | #define VALID_ADDR_BITMAP_CHUNK_SZ (4UL * 1024UL * 1024UL) | ||
13 | #define VALID_ADDR_BITMAP_BYTES \ | ||
14 | ((MAX_PHYS_ADDRESS / VALID_ADDR_BITMAP_CHUNK_SZ) / 8) | ||
12 | 15 | ||
13 | extern unsigned long kern_linear_pte_xor[2]; | 16 | extern unsigned long kern_linear_pte_xor[2]; |
14 | extern unsigned long kpte_linear_bitmap[KPTE_BITMAP_BYTES / sizeof(unsigned long)]; | 17 | extern unsigned long kpte_linear_bitmap[KPTE_BITMAP_BYTES / sizeof(unsigned long)]; |
diff --git a/arch/x86/boot/compressed/Makefile b/arch/x86/boot/compressed/Makefile index e2ff504b4ddc..f8ed0658404c 100644 --- a/arch/x86/boot/compressed/Makefile +++ b/arch/x86/boot/compressed/Makefile | |||
@@ -4,7 +4,7 @@ | |||
4 | # create a compressed vmlinux image from the original vmlinux | 4 | # create a compressed vmlinux image from the original vmlinux |
5 | # | 5 | # |
6 | 6 | ||
7 | targets := vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma head_$(BITS).o misc.o piggy.o | 7 | targets := vmlinux.lds vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma head_$(BITS).o misc.o piggy.o |
8 | 8 | ||
9 | KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2 | 9 | KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2 |
10 | KBUILD_CFLAGS += -fno-strict-aliasing -fPIC | 10 | KBUILD_CFLAGS += -fno-strict-aliasing -fPIC |
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h index 3cc06e3fceb8..16748077559a 100644 --- a/arch/x86/include/asm/pgtable.h +++ b/arch/x86/include/asm/pgtable.h | |||
@@ -2,6 +2,7 @@ | |||
2 | #define _ASM_X86_PGTABLE_H | 2 | #define _ASM_X86_PGTABLE_H |
3 | 3 | ||
4 | #include <asm/page.h> | 4 | #include <asm/page.h> |
5 | #include <asm/e820.h> | ||
5 | 6 | ||
6 | #include <asm/pgtable_types.h> | 7 | #include <asm/pgtable_types.h> |
7 | 8 | ||
@@ -269,10 +270,17 @@ static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) | |||
269 | 270 | ||
270 | #define canon_pgprot(p) __pgprot(massage_pgprot(p)) | 271 | #define canon_pgprot(p) __pgprot(massage_pgprot(p)) |
271 | 272 | ||
272 | static inline int is_new_memtype_allowed(unsigned long flags, | 273 | static inline int is_new_memtype_allowed(u64 paddr, unsigned long size, |
273 | unsigned long new_flags) | 274 | unsigned long flags, |
275 | unsigned long new_flags) | ||
274 | { | 276 | { |
275 | /* | 277 | /* |
278 | * PAT type is always WB for ISA. So no need to check. | ||
279 | */ | ||
280 | if (is_ISA_range(paddr, paddr + size - 1)) | ||
281 | return 1; | ||
282 | |||
283 | /* | ||
276 | * Certain new memtypes are not allowed with certain | 284 | * Certain new memtypes are not allowed with certain |
277 | * requested memtype: | 285 | * requested memtype: |
278 | * - request is uncached, return cannot be write-back | 286 | * - request is uncached, return cannot be write-back |
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h index bddd44f2f0ab..80e2984f521c 100644 --- a/arch/x86/include/asm/uv/uv_bau.h +++ b/arch/x86/include/asm/uv/uv_bau.h | |||
@@ -133,7 +133,7 @@ struct bau_msg_payload { | |||
133 | * see table 4.2.3.0.1 in broacast_assist spec. | 133 | * see table 4.2.3.0.1 in broacast_assist spec. |
134 | */ | 134 | */ |
135 | struct bau_msg_header { | 135 | struct bau_msg_header { |
136 | unsigned int dest_subnodeid:6; /* must be zero */ | 136 | unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */ |
137 | /* bits 5:0 */ | 137 | /* bits 5:0 */ |
138 | unsigned int base_dest_nodeid:15; /* nasid>>1 (pnode) of */ | 138 | unsigned int base_dest_nodeid:15; /* nasid>>1 (pnode) of */ |
139 | /* bits 20:6 */ /* first bit in node_map */ | 139 | /* bits 20:6 */ /* first bit in node_map */ |
diff --git a/arch/x86/kernel/apic/ipi.c b/arch/x86/kernel/apic/ipi.c index dbf5445727a9..6ef00ba4c886 100644 --- a/arch/x86/kernel/apic/ipi.c +++ b/arch/x86/kernel/apic/ipi.c | |||
@@ -106,6 +106,9 @@ void default_send_IPI_mask_logical(const struct cpumask *cpumask, int vector) | |||
106 | unsigned long mask = cpumask_bits(cpumask)[0]; | 106 | unsigned long mask = cpumask_bits(cpumask)[0]; |
107 | unsigned long flags; | 107 | unsigned long flags; |
108 | 108 | ||
109 | if (WARN_ONCE(!mask, "empty IPI mask")) | ||
110 | return; | ||
111 | |||
109 | local_irq_save(flags); | 112 | local_irq_save(flags); |
110 | WARN_ON(mask & ~cpumask_bits(cpu_online_mask)[0]); | 113 | WARN_ON(mask & ~cpumask_bits(cpu_online_mask)[0]); |
111 | __default_send_IPI_dest_field(mask, vector, apic->dest_logical); | 114 | __default_send_IPI_dest_field(mask, vector, apic->dest_logical); |
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index 832e908adcb5..601159374e87 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c | |||
@@ -46,7 +46,7 @@ static int early_get_nodeid(void) | |||
46 | return node_id.s.node_id; | 46 | return node_id.s.node_id; |
47 | } | 47 | } |
48 | 48 | ||
49 | static int uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | 49 | static int __init uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
50 | { | 50 | { |
51 | if (!strcmp(oem_id, "SGI")) { | 51 | if (!strcmp(oem_id, "SGI")) { |
52 | if (!strcmp(oem_table_id, "UVL")) | 52 | if (!strcmp(oem_table_id, "UVL")) |
@@ -253,7 +253,7 @@ static void uv_send_IPI_self(int vector) | |||
253 | apic_write(APIC_SELF_IPI, vector); | 253 | apic_write(APIC_SELF_IPI, vector); |
254 | } | 254 | } |
255 | 255 | ||
256 | struct apic apic_x2apic_uv_x = { | 256 | struct apic __refdata apic_x2apic_uv_x = { |
257 | 257 | ||
258 | .name = "UV large system", | 258 | .name = "UV large system", |
259 | .probe = NULL, | 259 | .probe = NULL, |
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile index 3efcb2b96a15..c1f253dac155 100644 --- a/arch/x86/kernel/cpu/Makefile +++ b/arch/x86/kernel/cpu/Makefile | |||
@@ -7,6 +7,10 @@ ifdef CONFIG_FUNCTION_TRACER | |||
7 | CFLAGS_REMOVE_common.o = -pg | 7 | CFLAGS_REMOVE_common.o = -pg |
8 | endif | 8 | endif |
9 | 9 | ||
10 | # Make sure load_percpu_segment has no stackprotector | ||
11 | nostackp := $(call cc-option, -fno-stack-protector) | ||
12 | CFLAGS_common.o := $(nostackp) | ||
13 | |||
10 | obj-y := intel_cacheinfo.o addon_cpuid_features.o | 14 | obj-y := intel_cacheinfo.o addon_cpuid_features.o |
11 | obj-y += proc.o capflags.o powerflags.o common.o | 15 | obj-y += proc.o capflags.o powerflags.o common.o |
12 | obj-y += vmware.o hypervisor.o | 16 | obj-y += vmware.o hypervisor.o |
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index 1cfb623ce11c..01213048f62f 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c | |||
@@ -1226,8 +1226,13 @@ static void mce_init(void) | |||
1226 | } | 1226 | } |
1227 | 1227 | ||
1228 | /* Add per CPU specific workarounds here */ | 1228 | /* Add per CPU specific workarounds here */ |
1229 | static void mce_cpu_quirks(struct cpuinfo_x86 *c) | 1229 | static int mce_cpu_quirks(struct cpuinfo_x86 *c) |
1230 | { | 1230 | { |
1231 | if (c->x86_vendor == X86_VENDOR_UNKNOWN) { | ||
1232 | pr_info("MCE: unknown CPU type - not enabling MCE support.\n"); | ||
1233 | return -EOPNOTSUPP; | ||
1234 | } | ||
1235 | |||
1231 | /* This should be disabled by the BIOS, but isn't always */ | 1236 | /* This should be disabled by the BIOS, but isn't always */ |
1232 | if (c->x86_vendor == X86_VENDOR_AMD) { | 1237 | if (c->x86_vendor == X86_VENDOR_AMD) { |
1233 | if (c->x86 == 15 && banks > 4) { | 1238 | if (c->x86 == 15 && banks > 4) { |
@@ -1273,11 +1278,20 @@ static void mce_cpu_quirks(struct cpuinfo_x86 *c) | |||
1273 | if ((c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xe)) && | 1278 | if ((c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xe)) && |
1274 | monarch_timeout < 0) | 1279 | monarch_timeout < 0) |
1275 | monarch_timeout = USEC_PER_SEC; | 1280 | monarch_timeout = USEC_PER_SEC; |
1281 | |||
1282 | /* | ||
1283 | * There are also broken BIOSes on some Pentium M and | ||
1284 | * earlier systems: | ||
1285 | */ | ||
1286 | if (c->x86 == 6 && c->x86_model <= 13 && mce_bootlog < 0) | ||
1287 | mce_bootlog = 0; | ||
1276 | } | 1288 | } |
1277 | if (monarch_timeout < 0) | 1289 | if (monarch_timeout < 0) |
1278 | monarch_timeout = 0; | 1290 | monarch_timeout = 0; |
1279 | if (mce_bootlog != 0) | 1291 | if (mce_bootlog != 0) |
1280 | mce_panic_timeout = 30; | 1292 | mce_panic_timeout = 30; |
1293 | |||
1294 | return 0; | ||
1281 | } | 1295 | } |
1282 | 1296 | ||
1283 | static void __cpuinit mce_ancient_init(struct cpuinfo_x86 *c) | 1297 | static void __cpuinit mce_ancient_init(struct cpuinfo_x86 *c) |
@@ -1338,11 +1352,10 @@ void __cpuinit mcheck_init(struct cpuinfo_x86 *c) | |||
1338 | if (!mce_available(c)) | 1352 | if (!mce_available(c)) |
1339 | return; | 1353 | return; |
1340 | 1354 | ||
1341 | if (mce_cap_init() < 0) { | 1355 | if (mce_cap_init() < 0 || mce_cpu_quirks(c) < 0) { |
1342 | mce_disabled = 1; | 1356 | mce_disabled = 1; |
1343 | return; | 1357 | return; |
1344 | } | 1358 | } |
1345 | mce_cpu_quirks(c); | ||
1346 | 1359 | ||
1347 | machine_check_vector = do_machine_check; | 1360 | machine_check_vector = do_machine_check; |
1348 | 1361 | ||
diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c index 8bc64cfbe936..5957a93e5173 100644 --- a/arch/x86/kernel/cpu/mcheck/therm_throt.c +++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c | |||
@@ -116,11 +116,14 @@ static int therm_throt_process(int curr) | |||
116 | cpu, __get_cpu_var(thermal_throttle_count)); | 116 | cpu, __get_cpu_var(thermal_throttle_count)); |
117 | 117 | ||
118 | add_taint(TAINT_MACHINE_CHECK); | 118 | add_taint(TAINT_MACHINE_CHECK); |
119 | } else if (was_throttled) { | 119 | return 1; |
120 | } | ||
121 | if (was_throttled) { | ||
120 | printk(KERN_INFO "CPU%d: Temperature/speed normal\n", cpu); | 122 | printk(KERN_INFO "CPU%d: Temperature/speed normal\n", cpu); |
123 | return 1; | ||
121 | } | 124 | } |
122 | 125 | ||
123 | return 1; | 126 | return 0; |
124 | } | 127 | } |
125 | 128 | ||
126 | #ifdef CONFIG_SYSFS | 129 | #ifdef CONFIG_SYSFS |
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S index 0d98a01cbdb2..cc827ac9e8d3 100644 --- a/arch/x86/kernel/head_32.S +++ b/arch/x86/kernel/head_32.S | |||
@@ -261,9 +261,7 @@ page_pde_offset = (__PAGE_OFFSET >> 20); | |||
261 | * which will be freed later | 261 | * which will be freed later |
262 | */ | 262 | */ |
263 | 263 | ||
264 | #ifndef CONFIG_HOTPLUG_CPU | 264 | __CPUINIT |
265 | .section .init.text,"ax",@progbits | ||
266 | #endif | ||
267 | 265 | ||
268 | #ifdef CONFIG_SMP | 266 | #ifdef CONFIG_SMP |
269 | ENTRY(startup_32_smp) | 267 | ENTRY(startup_32_smp) |
@@ -602,11 +600,7 @@ ignore_int: | |||
602 | #endif | 600 | #endif |
603 | iret | 601 | iret |
604 | 602 | ||
605 | #ifndef CONFIG_HOTPLUG_CPU | ||
606 | __CPUINITDATA | ||
607 | #else | ||
608 | __REFDATA | 603 | __REFDATA |
609 | #endif | ||
610 | .align 4 | 604 | .align 4 |
611 | ENTRY(initial_code) | 605 | ENTRY(initial_code) |
612 | .long i386_start_kernel | 606 | .long i386_start_kernel |
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index 994dd6a4a2a0..071166a4ba83 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c | |||
@@ -519,16 +519,12 @@ static void c1e_idle(void) | |||
519 | if (!cpumask_test_cpu(cpu, c1e_mask)) { | 519 | if (!cpumask_test_cpu(cpu, c1e_mask)) { |
520 | cpumask_set_cpu(cpu, c1e_mask); | 520 | cpumask_set_cpu(cpu, c1e_mask); |
521 | /* | 521 | /* |
522 | * Force broadcast so ACPI can not interfere. Needs | 522 | * Force broadcast so ACPI can not interfere. |
523 | * to run with interrupts enabled as it uses | ||
524 | * smp_function_call. | ||
525 | */ | 523 | */ |
526 | local_irq_enable(); | ||
527 | clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE, | 524 | clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE, |
528 | &cpu); | 525 | &cpu); |
529 | printk(KERN_INFO "Switch to broadcast mode on CPU%d\n", | 526 | printk(KERN_INFO "Switch to broadcast mode on CPU%d\n", |
530 | cpu); | 527 | cpu); |
531 | local_irq_disable(); | ||
532 | } | 528 | } |
533 | clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu); | 529 | clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu); |
534 | 530 | ||
diff --git a/arch/x86/kernel/setup_percpu.c b/arch/x86/kernel/setup_percpu.c index 29a3eef7cf4a..07d81916f212 100644 --- a/arch/x86/kernel/setup_percpu.c +++ b/arch/x86/kernel/setup_percpu.c | |||
@@ -165,7 +165,7 @@ static ssize_t __init setup_pcpu_lpage(size_t static_size, bool chosen) | |||
165 | 165 | ||
166 | if (!chosen) { | 166 | if (!chosen) { |
167 | size_t vm_size = VMALLOC_END - VMALLOC_START; | 167 | size_t vm_size = VMALLOC_END - VMALLOC_START; |
168 | size_t tot_size = num_possible_cpus() * PMD_SIZE; | 168 | size_t tot_size = nr_cpu_ids * PMD_SIZE; |
169 | 169 | ||
170 | /* on non-NUMA, embedding is better */ | 170 | /* on non-NUMA, embedding is better */ |
171 | if (!pcpu_need_numa()) | 171 | if (!pcpu_need_numa()) |
@@ -199,7 +199,7 @@ static ssize_t __init setup_pcpu_lpage(size_t static_size, bool chosen) | |||
199 | dyn_size = pcpul_size - static_size - PERCPU_FIRST_CHUNK_RESERVE; | 199 | dyn_size = pcpul_size - static_size - PERCPU_FIRST_CHUNK_RESERVE; |
200 | 200 | ||
201 | /* allocate pointer array and alloc large pages */ | 201 | /* allocate pointer array and alloc large pages */ |
202 | map_size = PFN_ALIGN(num_possible_cpus() * sizeof(pcpul_map[0])); | 202 | map_size = PFN_ALIGN(nr_cpu_ids * sizeof(pcpul_map[0])); |
203 | pcpul_map = alloc_bootmem(map_size); | 203 | pcpul_map = alloc_bootmem(map_size); |
204 | 204 | ||
205 | for_each_possible_cpu(cpu) { | 205 | for_each_possible_cpu(cpu) { |
@@ -228,7 +228,7 @@ static ssize_t __init setup_pcpu_lpage(size_t static_size, bool chosen) | |||
228 | 228 | ||
229 | /* allocate address and map */ | 229 | /* allocate address and map */ |
230 | pcpul_vm.flags = VM_ALLOC; | 230 | pcpul_vm.flags = VM_ALLOC; |
231 | pcpul_vm.size = num_possible_cpus() * PMD_SIZE; | 231 | pcpul_vm.size = nr_cpu_ids * PMD_SIZE; |
232 | vm_area_register_early(&pcpul_vm, PMD_SIZE); | 232 | vm_area_register_early(&pcpul_vm, PMD_SIZE); |
233 | 233 | ||
234 | for_each_possible_cpu(cpu) { | 234 | for_each_possible_cpu(cpu) { |
@@ -250,8 +250,8 @@ static ssize_t __init setup_pcpu_lpage(size_t static_size, bool chosen) | |||
250 | PMD_SIZE, pcpul_vm.addr, NULL); | 250 | PMD_SIZE, pcpul_vm.addr, NULL); |
251 | 251 | ||
252 | /* sort pcpul_map array for pcpu_lpage_remapped() */ | 252 | /* sort pcpul_map array for pcpu_lpage_remapped() */ |
253 | for (i = 0; i < num_possible_cpus() - 1; i++) | 253 | for (i = 0; i < nr_cpu_ids - 1; i++) |
254 | for (j = i + 1; j < num_possible_cpus(); j++) | 254 | for (j = i + 1; j < nr_cpu_ids; j++) |
255 | if (pcpul_map[i].ptr > pcpul_map[j].ptr) { | 255 | if (pcpul_map[i].ptr > pcpul_map[j].ptr) { |
256 | struct pcpul_ent tmp = pcpul_map[i]; | 256 | struct pcpul_ent tmp = pcpul_map[i]; |
257 | pcpul_map[i] = pcpul_map[j]; | 257 | pcpul_map[i] = pcpul_map[j]; |
@@ -288,7 +288,7 @@ void *pcpu_lpage_remapped(void *kaddr) | |||
288 | { | 288 | { |
289 | void *pmd_addr = (void *)((unsigned long)kaddr & PMD_MASK); | 289 | void *pmd_addr = (void *)((unsigned long)kaddr & PMD_MASK); |
290 | unsigned long offset = (unsigned long)kaddr & ~PMD_MASK; | 290 | unsigned long offset = (unsigned long)kaddr & ~PMD_MASK; |
291 | int left = 0, right = num_possible_cpus() - 1; | 291 | int left = 0, right = nr_cpu_ids - 1; |
292 | int pos; | 292 | int pos; |
293 | 293 | ||
294 | /* pcpul in use at all? */ | 294 | /* pcpul in use at all? */ |
@@ -377,7 +377,7 @@ static ssize_t __init setup_pcpu_4k(size_t static_size) | |||
377 | pcpu4k_nr_static_pages = PFN_UP(static_size); | 377 | pcpu4k_nr_static_pages = PFN_UP(static_size); |
378 | 378 | ||
379 | /* unaligned allocations can't be freed, round up to page size */ | 379 | /* unaligned allocations can't be freed, round up to page size */ |
380 | pages_size = PFN_ALIGN(pcpu4k_nr_static_pages * num_possible_cpus() | 380 | pages_size = PFN_ALIGN(pcpu4k_nr_static_pages * nr_cpu_ids |
381 | * sizeof(pcpu4k_pages[0])); | 381 | * sizeof(pcpu4k_pages[0])); |
382 | pcpu4k_pages = alloc_bootmem(pages_size); | 382 | pcpu4k_pages = alloc_bootmem(pages_size); |
383 | 383 | ||
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c index 8ccabb8a2f6a..77b9689f8edb 100644 --- a/arch/x86/kernel/tlb_uv.c +++ b/arch/x86/kernel/tlb_uv.c | |||
@@ -744,6 +744,7 @@ uv_activation_descriptor_init(int node, int pnode) | |||
744 | * note that base_dest_nodeid is actually a nasid. | 744 | * note that base_dest_nodeid is actually a nasid. |
745 | */ | 745 | */ |
746 | ad2->header.base_dest_nodeid = uv_partition_base_pnode << 1; | 746 | ad2->header.base_dest_nodeid = uv_partition_base_pnode << 1; |
747 | ad2->header.dest_subnodeid = 0x10; /* the LB */ | ||
747 | ad2->header.command = UV_NET_ENDPOINT_INTD; | 748 | ad2->header.command = UV_NET_ENDPOINT_INTD; |
748 | ad2->header.int_both = 1; | 749 | ad2->header.int_both = 1; |
749 | /* | 750 | /* |
diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S index 78d185d797de..9fc178255c04 100644 --- a/arch/x86/kernel/vmlinux.lds.S +++ b/arch/x86/kernel/vmlinux.lds.S | |||
@@ -46,11 +46,10 @@ PHDRS { | |||
46 | data PT_LOAD FLAGS(7); /* RWE */ | 46 | data PT_LOAD FLAGS(7); /* RWE */ |
47 | #ifdef CONFIG_X86_64 | 47 | #ifdef CONFIG_X86_64 |
48 | user PT_LOAD FLAGS(7); /* RWE */ | 48 | user PT_LOAD FLAGS(7); /* RWE */ |
49 | data.init PT_LOAD FLAGS(7); /* RWE */ | ||
50 | #ifdef CONFIG_SMP | 49 | #ifdef CONFIG_SMP |
51 | percpu PT_LOAD FLAGS(7); /* RWE */ | 50 | percpu PT_LOAD FLAGS(7); /* RWE */ |
52 | #endif | 51 | #endif |
53 | data.init2 PT_LOAD FLAGS(7); /* RWE */ | 52 | init PT_LOAD FLAGS(7); /* RWE */ |
54 | #endif | 53 | #endif |
55 | note PT_NOTE FLAGS(0); /* ___ */ | 54 | note PT_NOTE FLAGS(0); /* ___ */ |
56 | } | 55 | } |
@@ -103,65 +102,43 @@ SECTIONS | |||
103 | __stop___ex_table = .; | 102 | __stop___ex_table = .; |
104 | } :text = 0x9090 | 103 | } :text = 0x9090 |
105 | 104 | ||
106 | RODATA | 105 | RO_DATA(PAGE_SIZE) |
107 | 106 | ||
108 | /* Data */ | 107 | /* Data */ |
109 | . = ALIGN(PAGE_SIZE); | ||
110 | .data : AT(ADDR(.data) - LOAD_OFFSET) { | 108 | .data : AT(ADDR(.data) - LOAD_OFFSET) { |
111 | /* Start of data section */ | 109 | /* Start of data section */ |
112 | _sdata = .; | 110 | _sdata = .; |
113 | DATA_DATA | 111 | |
114 | CONSTRUCTORS | 112 | /* init_task */ |
115 | } :data | 113 | INIT_TASK_DATA(THREAD_SIZE) |
116 | 114 | ||
117 | #ifdef CONFIG_X86_32 | 115 | #ifdef CONFIG_X86_32 |
118 | /* 32 bit has nosave before _edata */ | 116 | /* 32 bit has nosave before _edata */ |
119 | . = ALIGN(PAGE_SIZE); | 117 | NOSAVE_DATA |
120 | .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { | ||
121 | __nosave_begin = .; | ||
122 | *(.data.nosave) | ||
123 | . = ALIGN(PAGE_SIZE); | ||
124 | __nosave_end = .; | ||
125 | } | ||
126 | #endif | 118 | #endif |
127 | 119 | ||
128 | . = ALIGN(PAGE_SIZE); | 120 | PAGE_ALIGNED_DATA(PAGE_SIZE) |
129 | .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET) { | ||
130 | *(.data.page_aligned) | ||
131 | *(.data.idt) | 121 | *(.data.idt) |
132 | } | ||
133 | 122 | ||
134 | #ifdef CONFIG_X86_32 | 123 | CACHELINE_ALIGNED_DATA(CONFIG_X86_L1_CACHE_BYTES) |
135 | . = ALIGN(32); | ||
136 | #else | ||
137 | . = ALIGN(PAGE_SIZE); | ||
138 | . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); | ||
139 | #endif | ||
140 | .data.cacheline_aligned : | ||
141 | AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) { | ||
142 | *(.data.cacheline_aligned) | ||
143 | } | ||
144 | 124 | ||
145 | /* rarely changed data like cpu maps */ | 125 | DATA_DATA |
146 | #ifdef CONFIG_X86_32 | 126 | CONSTRUCTORS |
147 | . = ALIGN(32); | 127 | |
148 | #else | 128 | /* rarely changed data like cpu maps */ |
149 | . = ALIGN(CONFIG_X86_INTERNODE_CACHE_BYTES); | 129 | READ_MOSTLY_DATA(CONFIG_X86_INTERNODE_CACHE_BYTES) |
150 | #endif | ||
151 | .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET) { | ||
152 | *(.data.read_mostly) | ||
153 | 130 | ||
154 | /* End of data section */ | 131 | /* End of data section */ |
155 | _edata = .; | 132 | _edata = .; |
156 | } | 133 | } :data |
157 | 134 | ||
158 | #ifdef CONFIG_X86_64 | 135 | #ifdef CONFIG_X86_64 |
159 | 136 | ||
160 | #define VSYSCALL_ADDR (-10*1024*1024) | 137 | #define VSYSCALL_ADDR (-10*1024*1024) |
161 | #define VSYSCALL_PHYS_ADDR ((LOADADDR(.data.read_mostly) + \ | 138 | #define VSYSCALL_PHYS_ADDR ((LOADADDR(.data) + SIZEOF(.data) + \ |
162 | SIZEOF(.data.read_mostly) + 4095) & ~(4095)) | 139 | PAGE_SIZE - 1) & ~(PAGE_SIZE - 1)) |
163 | #define VSYSCALL_VIRT_ADDR ((ADDR(.data.read_mostly) + \ | 140 | #define VSYSCALL_VIRT_ADDR ((ADDR(.data) + SIZEOF(.data) + \ |
164 | SIZEOF(.data.read_mostly) + 4095) & ~(4095)) | 141 | PAGE_SIZE - 1) & ~(PAGE_SIZE - 1)) |
165 | 142 | ||
166 | #define VLOAD_OFFSET (VSYSCALL_ADDR - VSYSCALL_PHYS_ADDR) | 143 | #define VLOAD_OFFSET (VSYSCALL_ADDR - VSYSCALL_PHYS_ADDR) |
167 | #define VLOAD(x) (ADDR(x) - VLOAD_OFFSET) | 144 | #define VLOAD(x) (ADDR(x) - VLOAD_OFFSET) |
@@ -227,35 +204,29 @@ SECTIONS | |||
227 | 204 | ||
228 | #endif /* CONFIG_X86_64 */ | 205 | #endif /* CONFIG_X86_64 */ |
229 | 206 | ||
230 | /* init_task */ | 207 | /* Init code and data - will be freed after init */ |
231 | . = ALIGN(THREAD_SIZE); | 208 | . = ALIGN(PAGE_SIZE); |
232 | .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) { | 209 | .init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) { |
233 | *(.data.init_task) | 210 | __init_begin = .; /* paired with __init_end */ |
234 | } | 211 | } |
235 | #ifdef CONFIG_X86_64 | ||
236 | :data.init | ||
237 | #endif | ||
238 | 212 | ||
213 | #if defined(CONFIG_X86_64) && defined(CONFIG_SMP) | ||
239 | /* | 214 | /* |
240 | * smp_locks might be freed after init | 215 | * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the |
241 | * start/end must be page aligned | 216 | * output PHDR, so the next output section - .init.text - should |
217 | * start another segment - init. | ||
242 | */ | 218 | */ |
243 | . = ALIGN(PAGE_SIZE); | 219 | PERCPU_VADDR(0, :percpu) |
244 | .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) { | 220 | #endif |
245 | __smp_locks = .; | ||
246 | *(.smp_locks) | ||
247 | __smp_locks_end = .; | ||
248 | . = ALIGN(PAGE_SIZE); | ||
249 | } | ||
250 | 221 | ||
251 | /* Init code and data - will be freed after init */ | ||
252 | . = ALIGN(PAGE_SIZE); | ||
253 | .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) { | 222 | .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) { |
254 | __init_begin = .; /* paired with __init_end */ | ||
255 | _sinittext = .; | 223 | _sinittext = .; |
256 | INIT_TEXT | 224 | INIT_TEXT |
257 | _einittext = .; | 225 | _einittext = .; |
258 | } | 226 | } |
227 | #ifdef CONFIG_X86_64 | ||
228 | :init | ||
229 | #endif | ||
259 | 230 | ||
260 | .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) { | 231 | .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) { |
261 | INIT_DATA | 232 | INIT_DATA |
@@ -326,17 +297,7 @@ SECTIONS | |||
326 | } | 297 | } |
327 | #endif | 298 | #endif |
328 | 299 | ||
329 | #if defined(CONFIG_X86_64) && defined(CONFIG_SMP) | 300 | #if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP) |
330 | /* | ||
331 | * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the | ||
332 | * output PHDR, so the next output section - __data_nosave - should | ||
333 | * start another section data.init2. Also, pda should be at the head of | ||
334 | * percpu area. Preallocate it and define the percpu offset symbol | ||
335 | * so that it can be accessed as a percpu variable. | ||
336 | */ | ||
337 | . = ALIGN(PAGE_SIZE); | ||
338 | PERCPU_VADDR(0, :percpu) | ||
339 | #else | ||
340 | PERCPU(PAGE_SIZE) | 301 | PERCPU(PAGE_SIZE) |
341 | #endif | 302 | #endif |
342 | 303 | ||
@@ -347,15 +308,22 @@ SECTIONS | |||
347 | __init_end = .; | 308 | __init_end = .; |
348 | } | 309 | } |
349 | 310 | ||
311 | /* | ||
312 | * smp_locks might be freed after init | ||
313 | * start/end must be page aligned | ||
314 | */ | ||
315 | . = ALIGN(PAGE_SIZE); | ||
316 | .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) { | ||
317 | __smp_locks = .; | ||
318 | *(.smp_locks) | ||
319 | __smp_locks_end = .; | ||
320 | . = ALIGN(PAGE_SIZE); | ||
321 | } | ||
322 | |||
350 | #ifdef CONFIG_X86_64 | 323 | #ifdef CONFIG_X86_64 |
351 | .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { | 324 | .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { |
352 | . = ALIGN(PAGE_SIZE); | 325 | NOSAVE_DATA |
353 | __nosave_begin = .; | 326 | } |
354 | *(.data.nosave) | ||
355 | . = ALIGN(PAGE_SIZE); | ||
356 | __nosave_end = .; | ||
357 | } :data.init2 | ||
358 | /* use another section data.init2, see PERCPU_VADDR() above */ | ||
359 | #endif | 327 | #endif |
360 | 328 | ||
361 | /* BSS */ | 329 | /* BSS */ |
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c index 6176fe8f29e0..ea56b8cbb6a6 100644 --- a/arch/x86/mm/init_64.c +++ b/arch/x86/mm/init_64.c | |||
@@ -796,7 +796,7 @@ int __init reserve_bootmem_generic(unsigned long phys, unsigned long len, | |||
796 | return ret; | 796 | return ret; |
797 | 797 | ||
798 | #else | 798 | #else |
799 | reserve_bootmem(phys, len, BOOTMEM_DEFAULT); | 799 | reserve_bootmem(phys, len, flags); |
800 | #endif | 800 | #endif |
801 | 801 | ||
802 | if (phys+len <= MAX_DMA_PFN*PAGE_SIZE) { | 802 | if (phys+len <= MAX_DMA_PFN*PAGE_SIZE) { |
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c index e6718bb28065..352aa9e927e2 100644 --- a/arch/x86/mm/pat.c +++ b/arch/x86/mm/pat.c | |||
@@ -623,7 +623,8 @@ static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot, | |||
623 | return ret; | 623 | return ret; |
624 | 624 | ||
625 | if (flags != want_flags) { | 625 | if (flags != want_flags) { |
626 | if (strict_prot || !is_new_memtype_allowed(want_flags, flags)) { | 626 | if (strict_prot || |
627 | !is_new_memtype_allowed(paddr, size, want_flags, flags)) { | ||
627 | free_memtype(paddr, paddr + size); | 628 | free_memtype(paddr, paddr + size); |
628 | printk(KERN_ERR "%s:%d map pfn expected mapping type %s" | 629 | printk(KERN_ERR "%s:%d map pfn expected mapping type %s" |
629 | " for %Lx-%Lx, got %s\n", | 630 | " for %Lx-%Lx, got %s\n", |
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c index 821e97017e95..c814e144a3f0 100644 --- a/arch/x86/mm/tlb.c +++ b/arch/x86/mm/tlb.c | |||
@@ -183,18 +183,17 @@ static void flush_tlb_others_ipi(const struct cpumask *cpumask, | |||
183 | 183 | ||
184 | f->flush_mm = mm; | 184 | f->flush_mm = mm; |
185 | f->flush_va = va; | 185 | f->flush_va = va; |
186 | cpumask_andnot(to_cpumask(f->flush_cpumask), | 186 | if (cpumask_andnot(to_cpumask(f->flush_cpumask), cpumask, cpumask_of(smp_processor_id()))) { |
187 | cpumask, cpumask_of(smp_processor_id())); | 187 | /* |
188 | 188 | * We have to send the IPI only to | |
189 | /* | 189 | * CPUs affected. |
190 | * We have to send the IPI only to | 190 | */ |
191 | * CPUs affected. | 191 | apic->send_IPI_mask(to_cpumask(f->flush_cpumask), |
192 | */ | 192 | INVALIDATE_TLB_VECTOR_START + sender); |
193 | apic->send_IPI_mask(to_cpumask(f->flush_cpumask), | ||
194 | INVALIDATE_TLB_VECTOR_START + sender); | ||
195 | 193 | ||
196 | while (!cpumask_empty(to_cpumask(f->flush_cpumask))) | 194 | while (!cpumask_empty(to_cpumask(f->flush_cpumask))) |
197 | cpu_relax(); | 195 | cpu_relax(); |
196 | } | ||
198 | 197 | ||
199 | f->flush_mm = NULL; | 198 | f->flush_mm = NULL; |
200 | f->flush_va = 0; | 199 | f->flush_va = 0; |
diff --git a/arch/x86/xen/Makefile b/arch/x86/xen/Makefile index 172438f86a02..7410640db173 100644 --- a/arch/x86/xen/Makefile +++ b/arch/x86/xen/Makefile | |||
@@ -5,6 +5,10 @@ CFLAGS_REMOVE_time.o = -pg | |||
5 | CFLAGS_REMOVE_irq.o = -pg | 5 | CFLAGS_REMOVE_irq.o = -pg |
6 | endif | 6 | endif |
7 | 7 | ||
8 | # Make sure early boot has no stackprotector | ||
9 | nostackp := $(call cc-option, -fno-stack-protector) | ||
10 | CFLAGS_enlighten.o := $(nostackp) | ||
11 | |||
8 | obj-y := enlighten.o setup.o multicalls.o mmu.o irq.o \ | 12 | obj-y := enlighten.o setup.o multicalls.o mmu.o irq.o \ |
9 | time.o xen-asm.o xen-asm_$(BITS).o \ | 13 | time.o xen-asm.o xen-asm_$(BITS).o \ |
10 | grant-table.o suspend.o | 14 | grant-table.o suspend.o |
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c index 0a1700a2be9c..e90540a46a0b 100644 --- a/arch/x86/xen/enlighten.c +++ b/arch/x86/xen/enlighten.c | |||
@@ -974,10 +974,6 @@ asmlinkage void __init xen_start_kernel(void) | |||
974 | 974 | ||
975 | xen_domain_type = XEN_PV_DOMAIN; | 975 | xen_domain_type = XEN_PV_DOMAIN; |
976 | 976 | ||
977 | BUG_ON(memcmp(xen_start_info->magic, "xen-3", 5) != 0); | ||
978 | |||
979 | xen_setup_features(); | ||
980 | |||
981 | /* Install Xen paravirt ops */ | 977 | /* Install Xen paravirt ops */ |
982 | pv_info = xen_info; | 978 | pv_info = xen_info; |
983 | pv_init_ops = xen_init_ops; | 979 | pv_init_ops = xen_init_ops; |
@@ -986,8 +982,15 @@ asmlinkage void __init xen_start_kernel(void) | |||
986 | pv_apic_ops = xen_apic_ops; | 982 | pv_apic_ops = xen_apic_ops; |
987 | pv_mmu_ops = xen_mmu_ops; | 983 | pv_mmu_ops = xen_mmu_ops; |
988 | 984 | ||
989 | xen_init_irq_ops(); | 985 | #ifdef CONFIG_X86_64 |
986 | /* | ||
987 | * Setup percpu state. We only need to do this for 64-bit | ||
988 | * because 32-bit already has %fs set properly. | ||
989 | */ | ||
990 | load_percpu_segment(0); | ||
991 | #endif | ||
990 | 992 | ||
993 | xen_init_irq_ops(); | ||
991 | xen_init_cpuid_mask(); | 994 | xen_init_cpuid_mask(); |
992 | 995 | ||
993 | #ifdef CONFIG_X86_LOCAL_APIC | 996 | #ifdef CONFIG_X86_LOCAL_APIC |
@@ -997,6 +1000,8 @@ asmlinkage void __init xen_start_kernel(void) | |||
997 | set_xen_basic_apic_ops(); | 1000 | set_xen_basic_apic_ops(); |
998 | #endif | 1001 | #endif |
999 | 1002 | ||
1003 | xen_setup_features(); | ||
1004 | |||
1000 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { | 1005 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { |
1001 | pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; | 1006 | pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; |
1002 | pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; | 1007 | pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; |
@@ -1004,13 +1009,6 @@ asmlinkage void __init xen_start_kernel(void) | |||
1004 | 1009 | ||
1005 | machine_ops = xen_machine_ops; | 1010 | machine_ops = xen_machine_ops; |
1006 | 1011 | ||
1007 | #ifdef CONFIG_X86_64 | ||
1008 | /* | ||
1009 | * Setup percpu state. We only need to do this for 64-bit | ||
1010 | * because 32-bit already has %fs set properly. | ||
1011 | */ | ||
1012 | load_percpu_segment(0); | ||
1013 | #endif | ||
1014 | /* | 1012 | /* |
1015 | * The only reliable way to retain the initial address of the | 1013 | * The only reliable way to retain the initial address of the |
1016 | * percpu gdt_page is to remember it here, so we can go and | 1014 | * percpu gdt_page is to remember it here, so we can go and |