diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/boot/dts/canyonlands.dts | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts index 0c6d3184dada..8b5ba8261a36 100644 --- a/arch/powerpc/boot/dts/canyonlands.dts +++ b/arch/powerpc/boot/dts/canyonlands.dts | |||
@@ -40,6 +40,7 @@ | |||
40 | d-cache-size = <32768>; | 40 | d-cache-size = <32768>; |
41 | dcr-controller; | 41 | dcr-controller; |
42 | dcr-access-method = "native"; | 42 | dcr-access-method = "native"; |
43 | next-level-cache = <&L2C0>; | ||
43 | }; | 44 | }; |
44 | }; | 45 | }; |
45 | 46 | ||
@@ -104,6 +105,16 @@ | |||
104 | dcr-reg = <0x00c 0x002>; | 105 | dcr-reg = <0x00c 0x002>; |
105 | }; | 106 | }; |
106 | 107 | ||
108 | L2C0: l2c { | ||
109 | compatible = "ibm,l2-cache-460ex", "ibm,l2-cache"; | ||
110 | dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */ | ||
111 | 0x030 0x008>; /* L2 cache DCR's */ | ||
112 | cache-line-size = <32>; /* 32 bytes */ | ||
113 | cache-size = <262144>; /* L2, 256K */ | ||
114 | interrupt-parent = <&UIC1>; | ||
115 | interrupts = <11 1>; | ||
116 | }; | ||
117 | |||
107 | plb { | 118 | plb { |
108 | compatible = "ibm,plb-460ex", "ibm,plb4"; | 119 | compatible = "ibm,plb-460ex", "ibm,plb4"; |
109 | #address-cells = <2>; | 120 | #address-cells = <2>; |