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-rw-r--r--arch/x86/oprofile/op_model_amd.c75
1 files changed, 41 insertions, 34 deletions
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c
index 67f830d12e0e..644980f03924 100644
--- a/arch/x86/oprofile/op_model_amd.c
+++ b/arch/x86/oprofile/op_model_amd.c
@@ -74,6 +74,45 @@ static struct op_ibs_config ibs_config;
74 74
75#endif 75#endif
76 76
77#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
78
79static void op_mux_fill_in_addresses(struct op_msrs * const msrs)
80{
81 int i;
82
83 for (i = 0; i < NUM_VIRT_COUNTERS; i++) {
84 int hw_counter = i % NUM_COUNTERS;
85 if (reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i))
86 msrs->multiplex[i].addr = MSR_K7_PERFCTR0 + hw_counter;
87 else
88 msrs->multiplex[i].addr = 0;
89 }
90}
91
92static void op_mux_switch_ctrl(struct op_x86_model_spec const *model,
93 struct op_msrs const * const msrs)
94{
95 u64 val;
96 int i;
97
98 /* enable active counters */
99 for (i = 0; i < NUM_COUNTERS; ++i) {
100 int virt = op_x86_phys_to_virt(i);
101 if (!counter_config[virt].enabled)
102 continue;
103 rdmsrl(msrs->controls[i].addr, val);
104 val &= model->reserved;
105 val |= op_x86_get_ctrl(model, &counter_config[virt]);
106 wrmsrl(msrs->controls[i].addr, val);
107 }
108}
109
110#else
111
112static inline void op_mux_fill_in_addresses(struct op_msrs * const msrs) { }
113
114#endif
115
77/* functions for op_amd_spec */ 116/* functions for op_amd_spec */
78 117
79static void op_amd_fill_in_addresses(struct op_msrs * const msrs) 118static void op_amd_fill_in_addresses(struct op_msrs * const msrs)
@@ -94,15 +133,7 @@ static void op_amd_fill_in_addresses(struct op_msrs * const msrs)
94 msrs->controls[i].addr = 0; 133 msrs->controls[i].addr = 0;
95 } 134 }
96 135
97#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX 136 op_mux_fill_in_addresses(msrs);
98 for (i = 0; i < NUM_VIRT_COUNTERS; i++) {
99 int hw_counter = i % NUM_COUNTERS;
100 if (reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i))
101 msrs->multiplex[i].addr = MSR_K7_PERFCTR0 + hw_counter;
102 else
103 msrs->multiplex[i].addr = 0;
104 }
105#endif
106} 137}
107 138
108static void op_amd_setup_ctrs(struct op_x86_model_spec const *model, 139static void op_amd_setup_ctrs(struct op_x86_model_spec const *model,
@@ -155,30 +186,6 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model,
155 } 186 }
156} 187}
157 188
158
159#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
160
161static void op_amd_switch_ctrl(struct op_x86_model_spec const *model,
162 struct op_msrs const * const msrs)
163{
164 u64 val;
165 int i;
166
167 /* enable active counters */
168 for (i = 0; i < NUM_COUNTERS; ++i) {
169 int virt = op_x86_phys_to_virt(i);
170 if (!counter_config[virt].enabled)
171 continue;
172 rdmsrl(msrs->controls[i].addr, val);
173 val &= model->reserved;
174 val |= op_x86_get_ctrl(model, &counter_config[virt]);
175 wrmsrl(msrs->controls[i].addr, val);
176 }
177}
178
179#endif
180
181
182#ifdef CONFIG_OPROFILE_IBS 189#ifdef CONFIG_OPROFILE_IBS
183 190
184static inline int 191static inline int
@@ -535,6 +542,6 @@ struct op_x86_model_spec const op_amd_spec = {
535 .stop = &op_amd_stop, 542 .stop = &op_amd_stop,
536 .shutdown = &op_amd_shutdown, 543 .shutdown = &op_amd_shutdown,
537#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX 544#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
538 .switch_ctrl = &op_amd_switch_ctrl, 545 .switch_ctrl = &op_mux_switch_ctrl,
539#endif 546#endif
540}; 547};