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-rw-r--r--arch/arm/mach-mx2/clock_imx21.c5
-rw-r--r--arch/arm/mach-mx2/clock_imx27.c5
-rw-r--r--arch/arm/mach-mx2/cpu_imx27.c2
-rw-r--r--arch/arm/mach-mx2/eukrea_cpuimx27.c12
-rw-r--r--arch/arm/mach-mx2/mx21ads.c10
-rw-r--r--arch/arm/mach-mx2/mx27ads.c6
-rw-r--r--arch/arm/mach-mx2/mx27lite.c4
-rw-r--r--arch/arm/mach-mx2/mx27pdk.c4
-rw-r--r--arch/arm/mach-mx2/mxt_td60.c4
-rw-r--r--arch/arm/mach-mx2/pca100.c4
-rw-r--r--arch/arm/mach-mx2/pcm038.c8
-rw-r--r--arch/arm/mach-mx2/pcm970-baseboard.c4
12 files changed, 35 insertions, 33 deletions
diff --git a/arch/arm/mach-mx2/clock_imx21.c b/arch/arm/mach-mx2/clock_imx21.c
index 1922e531ba46..6ab3c729a456 100644
--- a/arch/arm/mach-mx2/clock_imx21.c
+++ b/arch/arm/mach-mx2/clock_imx21.c
@@ -28,7 +28,7 @@
28#include <asm/clkdev.h> 28#include <asm/clkdev.h>
29#include <asm/div64.h> 29#include <asm/div64.h>
30 30
31#define IO_ADDR_CCM(off) (IO_ADDRESS(CCM_BASE_ADDR) + (off)) 31#define IO_ADDR_CCM(off) (IO_ADDRESS(MX21_CCM_BASE_ADDR) + (off))
32 32
33/* Register offsets */ 33/* Register offsets */
34#define CCM_CSCR IO_ADDR_CCM(0x0) 34#define CCM_CSCR IO_ADDR_CCM(0x0)
@@ -1235,6 +1235,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
1235 clk_enable(&uart_clk[0]); 1235 clk_enable(&uart_clk[0]);
1236#endif 1236#endif
1237 1237
1238 mxc_timer_init(&gpt_clk[0], IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT1); 1238 mxc_timer_init(&gpt_clk[0], IO_ADDRESS(MX21_GPT1_BASE_ADDR),
1239 MX21_INT_GPT1);
1239 return 0; 1240 return 0;
1240} 1241}
diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c
index a53320860986..6db98566a720 100644
--- a/arch/arm/mach-mx2/clock_imx27.c
+++ b/arch/arm/mach-mx2/clock_imx27.c
@@ -29,7 +29,7 @@
29#include <mach/common.h> 29#include <mach/common.h>
30#include <mach/hardware.h> 30#include <mach/hardware.h>
31 31
32#define IO_ADDR_CCM(off) (IO_ADDRESS(CCM_BASE_ADDR) + (off)) 32#define IO_ADDR_CCM(off) (IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off))
33 33
34/* Register offsets */ 34/* Register offsets */
35#define CCM_CSCR IO_ADDR_CCM(0x0) 35#define CCM_CSCR IO_ADDR_CCM(0x0)
@@ -757,7 +757,8 @@ int __init mx27_clocks_init(unsigned long fref)
757 clk_enable(&uart1_clk); 757 clk_enable(&uart1_clk);
758#endif 758#endif
759 759
760 mxc_timer_init(&gpt1_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT1); 760 mxc_timer_init(&gpt1_clk, IO_ADDRESS(MX27_GPT1_BASE_ADDR),
761 MX27_INT_GPT1);
761 762
762 return 0; 763 return 0;
763} 764}
diff --git a/arch/arm/mach-mx2/cpu_imx27.c b/arch/arm/mach-mx2/cpu_imx27.c
index d9e3bf9644c9..8c50c5e7c033 100644
--- a/arch/arm/mach-mx2/cpu_imx27.c
+++ b/arch/arm/mach-mx2/cpu_imx27.c
@@ -39,7 +39,7 @@ static void query_silicon_parameter(void)
39 * the silicon revision very early we read it here to 39 * the silicon revision very early we read it here to
40 * avoid any further hooks 40 * avoid any further hooks
41 */ 41 */
42 val = __raw_readl(IO_ADDRESS(SYSCTRL_BASE_ADDR) + SYS_CHIP_ID); 42 val = __raw_readl(IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR) + SYS_CHIP_ID);
43 43
44 cpu_silicon_rev = (int)(val >> 28); 44 cpu_silicon_rev = (int)(val >> 28);
45 cpu_partnumber = (int)((val >> 12) & 0xFFFF); 45 cpu_partnumber = (int)((val >> 12) & 0xFFFF);
diff --git a/arch/arm/mach-mx2/eukrea_cpuimx27.c b/arch/arm/mach-mx2/eukrea_cpuimx27.c
index 7b187606682c..8e4f3d08e32c 100644
--- a/arch/arm/mach-mx2/eukrea_cpuimx27.c
+++ b/arch/arm/mach-mx2/eukrea_cpuimx27.c
@@ -142,28 +142,28 @@ static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
142#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) 142#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
143static struct plat_serial8250_port serial_platform_data[] = { 143static struct plat_serial8250_port serial_platform_data[] = {
144 { 144 {
145 .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x200000), 145 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
146 .irq = IRQ_GPIOB(23), 146 .irq = IRQ_GPIOB(23),
147 .uartclk = 14745600, 147 .uartclk = 14745600,
148 .regshift = 1, 148 .regshift = 1,
149 .iotype = UPIO_MEM, 149 .iotype = UPIO_MEM,
150 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, 150 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
151 }, { 151 }, {
152 .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x400000), 152 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
153 .irq = IRQ_GPIOB(22), 153 .irq = IRQ_GPIOB(22),
154 .uartclk = 14745600, 154 .uartclk = 14745600,
155 .regshift = 1, 155 .regshift = 1,
156 .iotype = UPIO_MEM, 156 .iotype = UPIO_MEM,
157 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, 157 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
158 }, { 158 }, {
159 .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x800000), 159 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
160 .irq = IRQ_GPIOB(27), 160 .irq = IRQ_GPIOB(27),
161 .uartclk = 14745600, 161 .uartclk = 14745600,
162 .regshift = 1, 162 .regshift = 1,
163 .iotype = UPIO_MEM, 163 .iotype = UPIO_MEM,
164 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, 164 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
165 }, { 165 }, {
166 .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x1000000), 166 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
167 .irq = IRQ_GPIOB(30), 167 .irq = IRQ_GPIOB(30),
168 .uartclk = 14745600, 168 .uartclk = 14745600,
169 .regshift = 1, 169 .regshift = 1,
@@ -224,8 +224,8 @@ static struct sys_timer eukrea_cpuimx27_timer = {
224}; 224};
225 225
226MACHINE_START(CPUIMX27, "EUKREA CPUIMX27") 226MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
227 .phys_io = AIPI_BASE_ADDR, 227 .phys_io = MX27_AIPI_BASE_ADDR,
228 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, 228 .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
229 .boot_params = PHYS_OFFSET + 0x100, 229 .boot_params = PHYS_OFFSET + 0x100,
230 .map_io = mx27_map_io, 230 .map_io = mx27_map_io,
231 .init_irq = mx27_init_irq, 231 .init_irq = mx27_init_irq,
diff --git a/arch/arm/mach-mx2/mx21ads.c b/arch/arm/mach-mx2/mx21ads.c
index cf5f77cbc2f1..eb4a6e855595 100644
--- a/arch/arm/mach-mx2/mx21ads.c
+++ b/arch/arm/mach-mx2/mx21ads.c
@@ -118,8 +118,8 @@ static struct physmap_flash_data mx21ads_flash_data = {
118}; 118};
119 119
120static struct resource mx21ads_flash_resource = { 120static struct resource mx21ads_flash_resource = {
121 .start = CS0_BASE_ADDR, 121 .start = MX21_CS0_BASE_ADDR,
122 .end = CS0_BASE_ADDR + 0x02000000 - 1, 122 .end = MX21_CS0_BASE_ADDR + 0x02000000 - 1,
123 .flags = IORESOURCE_MEM, 123 .flags = IORESOURCE_MEM,
124}; 124};
125 125
@@ -242,7 +242,7 @@ static struct map_desc mx21ads_io_desc[] __initdata = {
242 */ 242 */
243 { 243 {
244 .virtual = MX21ADS_MMIO_BASE_ADDR, 244 .virtual = MX21ADS_MMIO_BASE_ADDR,
245 .pfn = __phys_to_pfn(CS1_BASE_ADDR), 245 .pfn = __phys_to_pfn(MX21_CS1_BASE_ADDR),
246 .length = MX21ADS_MMIO_SIZE, 246 .length = MX21ADS_MMIO_SIZE,
247 .type = MT_DEVICE, 247 .type = MT_DEVICE,
248 }, 248 },
@@ -284,8 +284,8 @@ static struct sys_timer mx21ads_timer = {
284 284
285MACHINE_START(MX21ADS, "Freescale i.MX21ADS") 285MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
286 /* maintainer: Freescale Semiconductor, Inc. */ 286 /* maintainer: Freescale Semiconductor, Inc. */
287 .phys_io = AIPI_BASE_ADDR, 287 .phys_io = MX21_AIPI_BASE_ADDR,
288 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, 288 .io_pg_offst = ((MX21_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
289 .boot_params = PHYS_OFFSET + 0x100, 289 .boot_params = PHYS_OFFSET + 0x100,
290 .map_io = mx21ads_map_io, 290 .map_io = mx21ads_map_io,
291 .init_irq = mx21_init_irq, 291 .init_irq = mx21_init_irq,
diff --git a/arch/arm/mach-mx2/mx27ads.c b/arch/arm/mach-mx2/mx27ads.c
index 83e412b713e6..385fc1c9ad38 100644
--- a/arch/arm/mach-mx2/mx27ads.c
+++ b/arch/arm/mach-mx2/mx27ads.c
@@ -320,7 +320,7 @@ static struct sys_timer mx27ads_timer = {
320static struct map_desc mx27ads_io_desc[] __initdata = { 320static struct map_desc mx27ads_io_desc[] __initdata = {
321 { 321 {
322 .virtual = PBC_BASE_ADDRESS, 322 .virtual = PBC_BASE_ADDRESS,
323 .pfn = __phys_to_pfn(CS4_BASE_ADDR), 323 .pfn = __phys_to_pfn(MX27_CS4_BASE_ADDR),
324 .length = SZ_1M, 324 .length = SZ_1M,
325 .type = MT_DEVICE, 325 .type = MT_DEVICE,
326 }, 326 },
@@ -334,8 +334,8 @@ static void __init mx27ads_map_io(void)
334 334
335MACHINE_START(MX27ADS, "Freescale i.MX27ADS") 335MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
336 /* maintainer: Freescale Semiconductor, Inc. */ 336 /* maintainer: Freescale Semiconductor, Inc. */
337 .phys_io = AIPI_BASE_ADDR, 337 .phys_io = MX27_AIPI_BASE_ADDR,
338 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, 338 .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
339 .boot_params = PHYS_OFFSET + 0x100, 339 .boot_params = PHYS_OFFSET + 0x100,
340 .map_io = mx27ads_map_io, 340 .map_io = mx27ads_map_io,
341 .init_irq = mx27_init_irq, 341 .init_irq = mx27_init_irq,
diff --git a/arch/arm/mach-mx2/mx27lite.c b/arch/arm/mach-mx2/mx27lite.c
index 82ea227ea0cf..ca6ab1265f3e 100644
--- a/arch/arm/mach-mx2/mx27lite.c
+++ b/arch/arm/mach-mx2/mx27lite.c
@@ -85,8 +85,8 @@ static struct sys_timer mx27lite_timer = {
85}; 85};
86 86
87MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE") 87MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE")
88 .phys_io = AIPI_BASE_ADDR, 88 .phys_io = MX27_AIPI_BASE_ADDR,
89 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, 89 .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
90 .boot_params = PHYS_OFFSET + 0x100, 90 .boot_params = PHYS_OFFSET + 0x100,
91 .map_io = mx27_map_io, 91 .map_io = mx27_map_io,
92 .init_irq = mx27_init_irq, 92 .init_irq = mx27_init_irq,
diff --git a/arch/arm/mach-mx2/mx27pdk.c b/arch/arm/mach-mx2/mx27pdk.c
index 6761d1b79e43..595fea46b6f7 100644
--- a/arch/arm/mach-mx2/mx27pdk.c
+++ b/arch/arm/mach-mx2/mx27pdk.c
@@ -85,8 +85,8 @@ static struct sys_timer mx27pdk_timer = {
85 85
86MACHINE_START(MX27_3DS, "Freescale MX27PDK") 86MACHINE_START(MX27_3DS, "Freescale MX27PDK")
87 /* maintainer: Freescale Semiconductor, Inc. */ 87 /* maintainer: Freescale Semiconductor, Inc. */
88 .phys_io = AIPI_BASE_ADDR, 88 .phys_io = MX27_AIPI_BASE_ADDR,
89 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, 89 .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
90 .boot_params = PHYS_OFFSET + 0x100, 90 .boot_params = PHYS_OFFSET + 0x100,
91 .map_io = mx27_map_io, 91 .map_io = mx27_map_io,
92 .init_irq = mx27_init_irq, 92 .init_irq = mx27_init_irq,
diff --git a/arch/arm/mach-mx2/mxt_td60.c b/arch/arm/mach-mx2/mxt_td60.c
index 8bcc1a5b8829..9ed4e492fc73 100644
--- a/arch/arm/mach-mx2/mxt_td60.c
+++ b/arch/arm/mach-mx2/mxt_td60.c
@@ -284,8 +284,8 @@ static struct sys_timer mxt_td60_timer = {
284 284
285MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60") 285MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
286 /* maintainer: Maxtrack Industrial */ 286 /* maintainer: Maxtrack Industrial */
287 .phys_io = AIPI_BASE_ADDR, 287 .phys_io = MX27_AIPI_BASE_ADDR,
288 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, 288 .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
289 .boot_params = PHYS_OFFSET + 0x100, 289 .boot_params = PHYS_OFFSET + 0x100,
290 .map_io = mx27_map_io, 290 .map_io = mx27_map_io,
291 .init_irq = mx27_init_irq, 291 .init_irq = mx27_init_irq,
diff --git a/arch/arm/mach-mx2/pca100.c b/arch/arm/mach-mx2/pca100.c
index aea3d340d2e1..55dbf5a64e00 100644
--- a/arch/arm/mach-mx2/pca100.c
+++ b/arch/arm/mach-mx2/pca100.c
@@ -233,8 +233,8 @@ static struct sys_timer pca100_timer = {
233}; 233};
234 234
235MACHINE_START(PCA100, "phyCARD-i.MX27") 235MACHINE_START(PCA100, "phyCARD-i.MX27")
236 .phys_io = AIPI_BASE_ADDR, 236 .phys_io = MX27_AIPI_BASE_ADDR,
237 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, 237 .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
238 .boot_params = PHYS_OFFSET + 0x100, 238 .boot_params = PHYS_OFFSET + 0x100,
239 .map_io = mx27_map_io, 239 .map_io = mx27_map_io,
240 .init_irq = mx27_init_irq, 240 .init_irq = mx27_init_irq,
diff --git a/arch/arm/mach-mx2/pcm038.c b/arch/arm/mach-mx2/pcm038.c
index 906d59b0a7aa..a2e2ea16c136 100644
--- a/arch/arm/mach-mx2/pcm038.c
+++ b/arch/arm/mach-mx2/pcm038.c
@@ -108,8 +108,8 @@ static struct platdata_mtd_ram pcm038_sram_data = {
108}; 108};
109 109
110static struct resource pcm038_sram_resource = { 110static struct resource pcm038_sram_resource = {
111 .start = CS1_BASE_ADDR, 111 .start = MX27_CS1_BASE_ADDR,
112 .end = CS1_BASE_ADDR + 512 * 1024 - 1, 112 .end = MX27_CS1_BASE_ADDR + 512 * 1024 - 1,
113 .flags = IORESOURCE_MEM, 113 .flags = IORESOURCE_MEM,
114}; 114};
115 115
@@ -328,8 +328,8 @@ static struct sys_timer pcm038_timer = {
328}; 328};
329 329
330MACHINE_START(PCM038, "phyCORE-i.MX27") 330MACHINE_START(PCM038, "phyCORE-i.MX27")
331 .phys_io = AIPI_BASE_ADDR, 331 .phys_io = MX27_AIPI_BASE_ADDR,
332 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, 332 .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
333 .boot_params = PHYS_OFFSET + 0x100, 333 .boot_params = PHYS_OFFSET + 0x100,
334 .map_io = mx27_map_io, 334 .map_io = mx27_map_io,
335 .init_irq = mx27_init_irq, 335 .init_irq = mx27_init_irq,
diff --git a/arch/arm/mach-mx2/pcm970-baseboard.c b/arch/arm/mach-mx2/pcm970-baseboard.c
index 3cb7f457e5d0..60d54465ada1 100644
--- a/arch/arm/mach-mx2/pcm970-baseboard.c
+++ b/arch/arm/mach-mx2/pcm970-baseboard.c
@@ -190,8 +190,8 @@ static struct imx_fb_platform_data pcm038_fb_data = {
190 190
191static struct resource pcm970_sja1000_resources[] = { 191static struct resource pcm970_sja1000_resources[] = {
192 { 192 {
193 .start = CS4_BASE_ADDR, 193 .start = MX27_CS4_BASE_ADDR,
194 .end = CS4_BASE_ADDR + 0x100 - 1, 194 .end = MX27_CS4_BASE_ADDR + 0x100 - 1,
195 .flags = IORESOURCE_MEM, 195 .flags = IORESOURCE_MEM,
196 }, { 196 }, {
197 .start = IRQ_GPIOE(19), 197 .start = IRQ_GPIOE(19),