3 files changed, 19 insertions, 34 deletions

diff --git a/arch/sh/include/cpu-sh2a/cpu/cacheflush.h b/arch/sh/include/cpu-sh2a/cpu/cacheflush.h
deleted file mode 100644
index 32a529187a38..000000000000
--- a/arch/sh/include/cpu-sh2a/cpu/cacheflush.h
+++ /dev/null
@@ -1,30 +0,0 @@
-#ifndef __ASM_CPU_SH2A_CACHEFLUSH_H
-#define __ASM_CPU_SH2A_CACHEFLUSH_H
-
-/* 
- * Cache flushing:
- *
- *  - flush_cache_all() flushes entire cache
- *  - flush_cache_mm(mm) flushes the specified mm context's cache lines
- *  - flush_cache_dup mm(mm) handles cache flushing when forking
- *  - flush_cache_page(mm, vmaddr, pfn) flushes a single page
- *  - flush_cache_range(vma, start, end) flushes a range of pages
- *
- *  - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
- *  - flush_icache_range(start, end) flushes(invalidates) a range for icache
- *  - flush_icache_page(vma, pg) flushes(invalidates) a page for icache
- *
- *  Caches are indexed (effectively) by physical address on SH-2, so
- *  we don't need them.
- */
-#define flush_cache_all()                       do { } while (0)
-#define flush_cache_mm(mm)                      do { } while (0)
-#define flush_cache_dup_mm(mm)                  do { } while (0)
-#define flush_cache_range(vma, start, end)      do { } while (0)
-#define flush_cache_page(vma, vmaddr, pfn)      do { } while (0)
-#define flush_dcache_page(page)                 do { } while (0)
-void flush_icache_range(unsigned long start, unsigned long end);
-#define flush_icache_page(vma,pg)               do { } while (0)
-#define flush_cache_sigtramp(vaddr)             do { } while (0)
-
-#endif /* __ASM_CPU_SH2A_CACHEFLUSH_H */
diff --git a/arch/sh/mm/cache-sh2a.c b/arch/sh/mm/cache-sh2a.c
index 24d86a794065..96a41872dfd3 100644
--- a/arch/sh/mm/cache-sh2a.c
+++ b/arch/sh/mm/cache-sh2a.c
@@ -15,7 +15,7 @@
 #include <asm/cacheflush.h>
 #include <asm/io.h>
 
-void __flush_wback_region(void *start, int size)
+static void sh2a__flush_wback_region(void *start, int size)
 {
         unsigned long v;
         unsigned long begin, end;
@@ -44,7 +44,7 @@ void __flush_wback_region(void *start, int size)
         local_irq_restore(flags);
 }
 
-void __flush_purge_region(void *start, int size)
+static void sh2a__flush_purge_region(void *start, int size)
 {
         unsigned long v;
         unsigned long begin, end;
@@ -65,7 +65,7 @@ void __flush_purge_region(void *start, int size)
         local_irq_restore(flags);
 }
 
-void __flush_invalidate_region(void *start, int size)
+static void sh2a__flush_invalidate_region(void *start, int size)
 {
         unsigned long v;
         unsigned long begin, end;
@@ -97,7 +97,7 @@ void __flush_invalidate_region(void *start, int size)
 }
 
 /* WBack O-Cache and flush I-Cache */
-void flush_icache_range(unsigned long start, unsigned long end)
+static void sh2a_flush_icache_range(unsigned long start, unsigned long end)
 {
         unsigned long v;
         unsigned long flags;
@@ -127,3 +127,12 @@ void flush_icache_range(unsigned long start, unsigned long end)
         back_to_cached();
         local_irq_restore(flags);
 }
+
+void __init sh2a_cache_init(void)
+{
+        flush_icache_range              = sh2a_flush_icache_range;
+
+        __flush_wback_region            = sh2a__flush_wback_region;
+        __flush_purge_region            = sh2a__flush_purge_region;
+        __flush_invalidate_region       = sh2a__flush_invalidate_region;
+}
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c
index 5ac299d6604e..b56cce408912 100644
--- a/arch/sh/mm/cache.c
+++ b/arch/sh/mm/cache.c
@@ -250,6 +250,12 @@ void __init cpu_cache_init(void)
                 sh2_cache_init();
         }
 
+        if (boot_cpu_data.family == CPU_FAMILY_SH2A) {
+                extern void __weak sh2a_cache_init(void);
+
+                sh2a_cache_init();
+        }
+
         if ((boot_cpu_data.family == CPU_FAMILY_SH4) ||
             (boot_cpu_data.family == CPU_FAMILY_SH4A) ||
             (boot_cpu_data.family == CPU_FAMILY_SH4AL_DSP)) {