12 files changed, 74 insertions, 45 deletions

diff --git a/arch/m68k/include/asm/m5206sim.h b/arch/m68k/include/asm/m5206sim.h
index b882a210ee6e..aa7ee48d5059 100644
--- a/arch/m68k/include/asm/m5206sim.h
+++ b/arch/m68k/include/asm/m5206sim.h
@@ -90,6 +90,14 @@
 #define MCFSIM_PADDR            (MCF_MBAR + 0x1c5)      /* Parallel Direction (r/w) */
 #define MCFSIM_PADAT            (MCF_MBAR + 0x1c9)      /* Parallel Port Value (r/w) */
 
+#if defined(CONFIG_NETtel)
+#define MCFUART_BASE1           0x180           /* Base address of UART1 */
+#define MCFUART_BASE2           0x140           /* Base address of UART2 */
+#else
+#define MCFUART_BASE1           0x140           /* Base address of UART1 */
+#define MCFUART_BASE2           0x180           /* Base address of UART2 */
+#endif
+
 /*
  *      Define system peripheral IRQ usage.
  */
@@ -97,7 +105,7 @@
 #define MCF_IRQ_PROFILER        31              /* Timer1, Level 7 */
 
 /*
- * Generic GPIO
+ *      Generic GPIO
  */
 #define MCFGPIO_PIN_MAX         8
 #define MCFGPIO_IRQ_VECBASE     -1
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h
index 85b39edf41a0..8cd8bce38594 100644
--- a/arch/m68k/include/asm/m520xsim.h
+++ b/arch/m68k/include/asm/m520xsim.h
@@ -100,6 +100,7 @@
 #define MCFGPIO_PCLRR_UART              0xFC0A402A
 #define MCFGPIO_PCLRR_FECH              0xFC0A402B
 #define MCFGPIO_PCLRR_FECL              0xFC0A402C
+
 /*
  * Generic GPIO support
  */
@@ -112,7 +113,6 @@
 #define MCFGPIO_PIN_MAX                 80
 #define MCFGPIO_IRQ_MAX                 8
 #define MCFGPIO_IRQ_VECBASE             MCFINT_VECBASE
-/****************************************************************************/
 
 #define MCF_GPIO_PAR_UART                   (0xA4036)
 #define MCF_GPIO_PAR_FECI2C                 (0xA4033)
@@ -129,6 +129,13 @@
 #define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2   (0x04)
 
 /*
+ *  UART module.
+ */
+#define MCFUART_BASE1           0x60000         /* Base address of UART1 */
+#define MCFUART_BASE2           0x64000         /* Base address of UART2 */
+#define MCFUART_BASE3           0x68000         /* Base address of UART2 */
+
+/*
  *  Reset Controll Unit.
  */
 #define MCF_RCR                 0xFC0A0000
diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h
index 9d597dcb29c0..4ec0f93a7ece 100644
--- a/arch/m68k/include/asm/m523xsim.h
+++ b/arch/m68k/include/asm/m523xsim.h
@@ -52,6 +52,13 @@
 #define MCF_RCR_SWRESET         0x80            /* Software reset bit */
 #define MCF_RCR_FRCSTOUT        0x40            /* Force external reset */
 
+/*
+ *  UART module.
+ */
+#define MCFUART_BASE1           0x200           /* Base address of UART1 */
+#define MCFUART_BASE2           0x240           /* Base address of UART2 */
+#define MCFUART_BASE3           0x280           /* Base address of UART3 */
+
 #define MCFGPIO_PODR_ADDR       (MCF_IPSBAR + 0x100000)
 #define MCFGPIO_PODR_DATAH      (MCF_IPSBAR + 0x100001)
 #define MCFGPIO_PODR_DATAL      (MCF_IPSBAR + 0x100002)
diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h
index c107228728db..21d0bbfbc0c9 100644
--- a/arch/m68k/include/asm/m5249sim.h
+++ b/arch/m68k/include/asm/m5249sim.h
@@ -59,6 +59,11 @@
 #define MCFSIM_DACR1            0x110           /* DRAM 1 Addr and Ctrl (r/w) */
 #define MCFSIM_DMR1             0x114           /* DRAM 1 Mask reg (r/w) */
 
+/*
+ *      UART module.
+ */
+#define MCFUART_BASE1           0x1c0           /* Base address of UART1 */
+#define MCFUART_BASE2           0x200           /* Base address of UART2 */
 
 /*
  *      Some symbol defines for the above...
diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h
index 8cea714dee46..974c448c098e 100644
--- a/arch/m68k/include/asm/m5272sim.h
+++ b/arch/m68k/include/asm/m5272sim.h
@@ -65,6 +65,9 @@
 #define MCFSIM_DCMR1            0x5c            /* DRAM 1 Mask reg (r/w) */
 #define MCFSIM_DCCR1            0x63            /* DRAM 1 Control reg (r/w) */
 
+#define MCFUART_BASE1           0x100           /* Base address of UART1 */
+#define MCFUART_BASE2           0x140           /* Base address of UART2 */
+
 #define MCFSIM_PACNT            (MCF_MBAR + 0x80) /* Port A Control (r/w) */
 #define MCFSIM_PADDR            (MCF_MBAR + 0x84) /* Port A Direction (r/w) */
 #define MCFSIM_PADAT            (MCF_MBAR + 0x86) /* Port A Data (r/w) */
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index 5223b71d3432..8a5a1ab57d01 100644
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -58,6 +58,12 @@
 #define MCFSIM_DMR1             0x5c            /* SDRAM address mask 1 */
 #endif
 
+/*
+ *      UART module.
+ */
+#define MCFUART_BASE1           0x200           /* Base address of UART1 */
+#define MCFUART_BASE2           0x240           /* Base address of UART2 */
+#define MCFUART_BASE3           0x280           /* Base address of UART3 */
 
 #ifdef CONFIG_M5271
 #define MCFGPIO_PODR_ADDR       (MCF_IPSBAR + 0x100000)
diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h
index 4e35f970f662..47c851ef78d3 100644
--- a/arch/m68k/include/asm/m528xsim.h
+++ b/arch/m68k/include/asm/m528xsim.h
@@ -44,6 +44,13 @@
 #define MCFSIM_DMR1             0x54            /* SDRAM address mask 1 */
 
 /*
+ *      UART module.
+ */
+#define MCFUART_BASE1           0x200           /* Base address of UART1 */
+#define MCFUART_BASE2           0x240           /* Base address of UART2 */
+#define MCFUART_BASE3           0x280           /* Base address of UART3 */
+
+/*
  *      GPIO registers
  */
 #define MCFGPIO_PORTA           (MCF_IPSBAR + 0x00100000)
diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h
index 008f36bd66c3..7003d7268ae8 100644
--- a/arch/m68k/include/asm/m5307sim.h
+++ b/arch/m68k/include/asm/m5307sim.h
@@ -97,6 +97,17 @@
 #define MCFSIM_PADAT            (MCF_MBAR + 0x248)
 
 /*
+ *  UART module.
+ */
+#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
+#define MCFUART_BASE1           0x200           /* Base address of UART1 */
+#define MCFUART_BASE2           0x1c0           /* Base address of UART2 */
+#else
+#define MCFUART_BASE1           0x1c0           /* Base address of UART1 */
+#define MCFUART_BASE2           0x200           /* Base address of UART2 */
+#endif
+
+/*
  * Generic GPIO support
  */
 #define MCFGPIO_PIN_MAX                 16
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h
index b8126d3253e1..45c119c072db 100644
--- a/arch/m68k/include/asm/m532xsim.h
+++ b/arch/m68k/include/asm/m532xsim.h
@@ -103,6 +103,13 @@
 #define ACR_CM_OFF_IMP          (3<<5)
 #define ACR_WPROTECT            (1<<2)
 
+/*
+ *  UART module.
+ */
+#define MCFUART_BASE1           0xFC060000      /* Base address of UART1 */
+#define MCFUART_BASE2           0xFC064000      /* Base address of UART2 */
+#define MCFUART_BASE3           0xFC068000      /* Base address of UART3 */
+
 /*********************************************************************
  *
  * Reset Controller Module
diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h
index e07d4d8cf31f..ddfff88629fe 100644
--- a/arch/m68k/include/asm/m5407sim.h
+++ b/arch/m68k/include/asm/m5407sim.h
@@ -76,6 +76,9 @@
 #define MCFSIM_DACR1            0x110           /* DRAM 1 Addr and Ctrl (r/w) */
 #define MCFSIM_DMR1             0x114           /* DRAM 1 Mask reg (r/w) */
 
+#define MCFUART_BASE1           0x1c0           /* Base address of UART1 */
+#define MCFUART_BASE2           0x200           /* Base address of UART2 */
+
 #define MCFSIM_PADDR            (MCF_MBAR + 0x244)
 #define MCFSIM_PADAT            (MCF_MBAR + 0x248)
 
diff --git a/arch/m68k/include/asm/m54xxsim.h b/arch/m68k/include/asm/m54xxsim.h
index 6072248916ac..a08a7ae776b1 100644
--- a/arch/m68k/include/asm/m54xxsim.h
+++ b/arch/m68k/include/asm/m54xxsim.h
@@ -25,6 +25,14 @@
 #define MCFINTC_ICR0            0x40            /* Base ICR register */
 
 /*
+ *      UART module.
+ */
+#define MCFUART_BASE1           0x8600          /* Base address of UART1 */
+#define MCFUART_BASE2           0x8700          /* Base address of UART2 */
+#define MCFUART_BASE3           0x8800          /* Base address of UART3 */
+#define MCFUART_BASE4           0x8900          /* Base address of UART4 */
+
+/*
  *      Define system peripheral IRQ usage.
  */
 #define MCF_IRQ_TIMER           (64 + 54)       /* Slice Timer 0 */
diff --git a/arch/m68k/include/asm/mcfuart.h b/arch/m68k/include/asm/mcfuart.h
index c67dacad7c1c..2abedff0a694 100644
--- a/arch/m68k/include/asm/mcfuart.h
+++ b/arch/m68k/include/asm/mcfuart.h
@@ -12,49 +12,6 @@
 #define mcfuart_h
 /****************************************************************************/
 
-/*
- *      Define the base address of the UARTS within the MBAR address
- *      space.
- */
-#if defined(CONFIG_M5272)
-#define MCFUART_BASE1           0x100           /* Base address of UART1 */
-#define MCFUART_BASE2           0x140           /* Base address of UART2 */
-#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e)
-#if defined(CONFIG_NETtel)
-#define MCFUART_BASE1           0x180           /* Base address of UART1 */
-#define MCFUART_BASE2           0x140           /* Base address of UART2 */
-#else
-#define MCFUART_BASE1           0x140           /* Base address of UART1 */
-#define MCFUART_BASE2           0x180           /* Base address of UART2 */
-#endif
-#elif defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x)
-#define MCFUART_BASE1           0x200           /* Base address of UART1 */
-#define MCFUART_BASE2           0x240           /* Base address of UART2 */
-#define MCFUART_BASE3           0x280           /* Base address of UART3 */
-#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
-#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
-#define MCFUART_BASE1           0x200           /* Base address of UART1 */
-#define MCFUART_BASE2           0x1c0           /* Base address of UART2 */
-#else
-#define MCFUART_BASE1           0x1c0           /* Base address of UART1 */
-#define MCFUART_BASE2           0x200           /* Base address of UART2 */
-#endif
-#elif defined(CONFIG_M520x)
-#define MCFUART_BASE1           0x60000         /* Base address of UART1 */
-#define MCFUART_BASE2           0x64000         /* Base address of UART2 */
-#define MCFUART_BASE3           0x68000         /* Base address of UART2 */
-#elif defined(CONFIG_M532x)
-#define MCFUART_BASE1           0xfc060000      /* Base address of UART1 */
-#define MCFUART_BASE2           0xfc064000      /* Base address of UART2 */
-#define MCFUART_BASE3           0xfc068000      /* Base address of UART3 */
-#elif defined(CONFIG_M54xx)
-#define MCFUART_BASE1           0x8600          /* on M54xx */
-#define MCFUART_BASE2           0x8700          /* on M54xx */
-#define MCFUART_BASE3           0x8800          /* on M54xx */
-#define MCFUART_BASE4           0x8900          /* on M54xx */
-#endif
-
-
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>