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-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c105
-rw-r--r--arch/arm/mach-at91/include/mach/board.h3
-rw-r--r--arch/arm/mach-omap2/board-ldp.c2
-rw-r--r--arch/blackfin/Kconfig7
-rw-r--r--arch/blackfin/Kconfig.debug6
-rw-r--r--arch/blackfin/configs/BF518F-EZBRD_defconfig63
-rw-r--r--arch/blackfin/configs/BF527-EZKIT_defconfig4
-rw-r--r--arch/blackfin/configs/BF533-EZKIT_defconfig4
-rw-r--r--arch/blackfin/configs/BF533-STAMP_defconfig4
-rw-r--r--arch/blackfin/configs/BF537-STAMP_defconfig14
-rw-r--r--arch/blackfin/configs/BF538-EZKIT_defconfig4
-rw-r--r--arch/blackfin/configs/BF548-EZKIT_defconfig6
-rw-r--r--arch/blackfin/configs/BF561-EZKIT_defconfig4
-rw-r--r--arch/blackfin/configs/BlackStamp_defconfig4
-rw-r--r--arch/blackfin/configs/CM-BF527_defconfig4
-rw-r--r--arch/blackfin/configs/CM-BF548_defconfig6
-rw-r--r--arch/blackfin/configs/IP0X_defconfig2
-rw-r--r--arch/blackfin/configs/SRV1_defconfig4
-rw-r--r--arch/blackfin/include/asm/Kbuild1
-rw-r--r--arch/blackfin/include/asm/bfin_sport.h45
-rw-r--r--arch/blackfin/include/asm/ipipe.h100
-rw-r--r--arch/blackfin/include/asm/ipipe_base.h12
-rw-r--r--arch/blackfin/include/asm/irq.h36
-rw-r--r--arch/blackfin/include/asm/thread_info.h2
-rw-r--r--arch/blackfin/kernel/Makefile8
-rw-r--r--arch/blackfin/kernel/cplb-nompu/cplbinit.c4
-rw-r--r--arch/blackfin/kernel/ipipe.c176
-rw-r--r--arch/blackfin/kernel/irqchip.c14
-rw-r--r--arch/blackfin/kernel/kgdb_test.c9
-rw-r--r--arch/blackfin/kernel/ptrace.c5
-rw-r--r--arch/blackfin/kernel/setup.c10
-rw-r--r--arch/blackfin/kernel/time.c5
-rw-r--r--arch/blackfin/mach-bf518/boards/ezbrd.c33
-rw-r--r--arch/blackfin/mach-bf518/include/mach/anomaly.h17
-rw-r--r--arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h4
-rw-r--r--arch/blackfin/mach-bf527/boards/cm_bf527.c26
-rw-r--r--arch/blackfin/mach-bf527/boards/ezbrd.c24
-rw-r--r--arch/blackfin/mach-bf527/include/mach/anomaly.h6
-rw-r--r--arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h4
-rw-r--r--arch/blackfin/mach-bf533/boards/Kconfig5
-rw-r--r--arch/blackfin/mach-bf533/boards/Makefile1
-rw-r--r--arch/blackfin/mach-bf533/boards/blackstamp.c24
-rw-r--r--arch/blackfin/mach-bf533/boards/cm_bf533.c24
-rw-r--r--arch/blackfin/mach-bf533/boards/generic_board.c126
-rw-r--r--arch/blackfin/mach-bf533/boards/ip0x.c13
-rw-r--r--arch/blackfin/mach-bf533/include/mach/anomaly.h7
-rw-r--r--arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h2
-rw-r--r--arch/blackfin/mach-bf537/boards/Kconfig5
-rw-r--r--arch/blackfin/mach-bf537/boards/Makefile1
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537.c26
-rw-r--r--arch/blackfin/mach-bf537/boards/generic_board.c745
-rw-r--r--arch/blackfin/mach-bf537/boards/minotaur.c24
-rw-r--r--arch/blackfin/mach-bf537/boards/pnav10.c24
-rw-r--r--arch/blackfin/mach-bf537/boards/tcm_bf537.c24
-rw-r--r--arch/blackfin/mach-bf537/include/mach/anomaly.h7
-rw-r--r--arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h4
-rw-r--r--arch/blackfin/mach-bf538/include/mach/anomaly.h6
-rw-r--r--arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h4
-rw-r--r--arch/blackfin/mach-bf548/include/mach/anomaly.h22
-rw-r--r--arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h22
-rw-r--r--arch/blackfin/mach-bf548/include/mach/irq.h8
-rw-r--r--arch/blackfin/mach-bf561/boards/Kconfig5
-rw-r--r--arch/blackfin/mach-bf561/boards/Makefile1
-rw-r--r--arch/blackfin/mach-bf561/boards/cm_bf561.c15
-rw-r--r--arch/blackfin/mach-bf561/boards/generic_board.c113
-rw-r--r--arch/blackfin/mach-bf561/include/mach/anomaly.h7
-rw-r--r--arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h2
-rw-r--r--arch/blackfin/mach-common/arch_checks.c9
-rw-r--r--arch/blackfin/mach-common/cache.S22
-rw-r--r--arch/blackfin/mach-common/clocks-init.c2
-rw-r--r--arch/blackfin/mach-common/dpmc_modes.S24
-rw-r--r--arch/blackfin/mach-common/entry.S61
-rw-r--r--arch/blackfin/mach-common/interrupt.S12
-rw-r--r--arch/blackfin/mach-common/ints-priority.c126
-rw-r--r--arch/blackfin/mach-common/smp.c6
-rw-r--r--arch/blackfin/mm/init.c2
-rw-r--r--arch/ia64/sn/pci/pcibr/pcibr_dma.c7
-rw-r--r--arch/m68knommu/platform/5206e/config.c1
-rw-r--r--arch/m68knommu/platform/528x/config.c228
-rw-r--r--arch/mips/configs/ip27_defconfig2
-rw-r--r--arch/mips/configs/jmr3927_defconfig265
-rw-r--r--arch/mips/configs/rbtx49xx_defconfig319
-rw-r--r--arch/mips/include/asm/compat.h7
-rw-r--r--arch/mips/include/asm/hazards.h3
-rw-r--r--arch/mips/include/asm/prefetch.h2
-rw-r--r--arch/mips/kernel/cpu-probe.c1
-rw-r--r--arch/mips/kernel/linux32.c2
-rw-r--r--arch/mips/mm/page.c3
-rw-r--r--arch/mips/mm/tlbex.c1
-rw-r--r--arch/powerpc/configs/40x/virtex_defconfig2
-rw-r--r--arch/powerpc/configs/44x/virtex5_defconfig2
-rw-r--r--arch/powerpc/configs/linkstation_defconfig36
-rw-r--r--arch/powerpc/configs/storcenter_defconfig35
-rw-r--r--arch/powerpc/platforms/86xx/gef_sbc610.c4
-rw-r--r--arch/powerpc/platforms/embedded6xx/linkstation.c38
-rw-r--r--arch/powerpc/platforms/embedded6xx/storcenter.c32
-rw-r--r--arch/sh/boards/board-ap325rxa.c1
-rw-r--r--arch/sparc/kernel/irq_64.c29
-rw-r--r--arch/um/kernel/ptrace.c5
-rw-r--r--arch/um/os-Linux/user_syms.c5
-rw-r--r--arch/x86/include/asm/efi.h2
-rw-r--r--arch/x86/include/asm/fixmap_64.h4
-rw-r--r--arch/x86/include/asm/i387.h8
-rw-r--r--arch/x86/kernel/cpu/cpufreq/p4-clockmod.c1
-rw-r--r--arch/x86/kernel/ds.c3
-rw-r--r--arch/x86/kernel/efi.c7
-rw-r--r--arch/x86/kernel/efi_64.c21
-rw-r--r--arch/x86/kernel/i387.c2
-rw-r--r--arch/x86/kernel/reboot.c8
-rw-r--r--arch/x86/kernel/setup.c5
-rw-r--r--arch/x86/lguest/boot.c21
-rw-r--r--arch/x86/math-emu/fpu_aux.c31
-rw-r--r--arch/x86/mm/kmmio.c15
-rw-r--r--arch/x86/mm/pageattr.c11
-rw-r--r--arch/xtensa/Kconfig3
-rw-r--r--arch/xtensa/kernel/setup.c2
-rw-r--r--arch/xtensa/kernel/traps.c1
-rw-r--r--arch/xtensa/mm/fault.c1
-rw-r--r--arch/xtensa/platforms/iss/console.c6
119 files changed, 1350 insertions, 2150 deletions
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 134af97ff340..b7f233242315 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -347,6 +347,111 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
347void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} 347void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
348#endif 348#endif
349 349
350/* --------------------------------------------------------------------
351 * Compact Flash (PCMCIA or IDE)
352 * -------------------------------------------------------------------- */
353
354#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) || \
355 defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
356
357static struct at91_cf_data cf0_data;
358
359static struct resource cf0_resources[] = {
360 [0] = {
361 .start = AT91_CHIPSELECT_4,
362 .end = AT91_CHIPSELECT_4 + SZ_256M - 1,
363 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
364 }
365};
366
367static struct platform_device cf0_device = {
368 .id = 0,
369 .dev = {
370 .platform_data = &cf0_data,
371 },
372 .resource = cf0_resources,
373 .num_resources = ARRAY_SIZE(cf0_resources),
374};
375
376static struct at91_cf_data cf1_data;
377
378static struct resource cf1_resources[] = {
379 [0] = {
380 .start = AT91_CHIPSELECT_5,
381 .end = AT91_CHIPSELECT_5 + SZ_256M - 1,
382 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
383 }
384};
385
386static struct platform_device cf1_device = {
387 .id = 1,
388 .dev = {
389 .platform_data = &cf1_data,
390 },
391 .resource = cf1_resources,
392 .num_resources = ARRAY_SIZE(cf1_resources),
393};
394
395void __init at91_add_device_cf(struct at91_cf_data *data)
396{
397 unsigned long ebi0_csa;
398 struct platform_device *pdev;
399
400 if (!data)
401 return;
402
403 /*
404 * assign CS4 or CS5 to SMC with Compact Flash logic support,
405 * we assume SMC timings are configured by board code,
406 * except True IDE where timings are controlled by driver
407 */
408 ebi0_csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
409 switch (data->chipselect) {
410 case 4:
411 at91_set_A_periph(AT91_PIN_PD6, 0); /* EBI0_NCS4/CFCS0 */
412 ebi0_csa |= AT91_MATRIX_EBI0_CS4A_SMC_CF1;
413 cf0_data = *data;
414 pdev = &cf0_device;
415 break;
416 case 5:
417 at91_set_A_periph(AT91_PIN_PD7, 0); /* EBI0_NCS5/CFCS1 */
418 ebi0_csa |= AT91_MATRIX_EBI0_CS5A_SMC_CF2;
419 cf1_data = *data;
420 pdev = &cf1_device;
421 break;
422 default:
423 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
424 data->chipselect);
425 return;
426 }
427 at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
428
429 if (data->det_pin) {
430 at91_set_gpio_input(data->det_pin, 1);
431 at91_set_deglitch(data->det_pin, 1);
432 }
433
434 if (data->irq_pin) {
435 at91_set_gpio_input(data->irq_pin, 1);
436 at91_set_deglitch(data->irq_pin, 1);
437 }
438
439 if (data->vcc_pin)
440 /* initially off */
441 at91_set_gpio_output(data->vcc_pin, 0);
442
443 /* enable EBI controlled pins */
444 at91_set_A_periph(AT91_PIN_PD5, 1); /* NWAIT */
445 at91_set_A_periph(AT91_PIN_PD8, 0); /* CFCE1 */
446 at91_set_A_periph(AT91_PIN_PD9, 0); /* CFCE2 */
447 at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */
448
449 pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "at91_ide" : "at91_cf";
450 platform_device_register(pdev);
451}
452#else
453void __init at91_add_device_cf(struct at91_cf_data *data) {}
454#endif
350 455
351/* -------------------------------------------------------------------- 456/* --------------------------------------------------------------------
352 * NAND / SmartMedia 457 * NAND / SmartMedia
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index 0b3ae21b4565..793fe7b25f36 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -56,6 +56,9 @@ struct at91_cf_data {
56 u8 vcc_pin; /* power switching */ 56 u8 vcc_pin; /* power switching */
57 u8 rst_pin; /* card reset */ 57 u8 rst_pin; /* card reset */
58 u8 chipselect; /* EBI Chip Select number */ 58 u8 chipselect; /* EBI Chip Select number */
59 u8 flags;
60#define AT91_CF_TRUE_IDE 0x01
61#define AT91_IDE_SWAP_A0_A2 0x02
59}; 62};
60extern void __init at91_add_device_cf(struct at91_cf_data *data); 63extern void __init at91_add_device_cf(struct at91_cf_data *data);
61 64
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index f6a13451d1fd..6031e179926b 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -81,7 +81,7 @@ static inline void __init ldp_init_smc911x(void)
81 } 81 }
82 82
83 ldp_smc911x_resources[0].start = cs_mem_base + 0x0; 83 ldp_smc911x_resources[0].start = cs_mem_base + 0x0;
84 ldp_smc911x_resources[0].end = cs_mem_base + 0xf; 84 ldp_smc911x_resources[0].end = cs_mem_base + 0xff;
85 udelay(100); 85 udelay(100);
86 86
87 eth_gpio = LDP_SMC911X_GPIO; 87 eth_gpio = LDP_SMC911X_GPIO;
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 8f1f97d56e1e..0c1f86e3e44a 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -1129,6 +1129,7 @@ endchoice
1129 1129
1130config PM_WAKEUP_BY_GPIO 1130config PM_WAKEUP_BY_GPIO
1131 bool "Allow Wakeup from Standby by GPIO" 1131 bool "Allow Wakeup from Standby by GPIO"
1132 depends on PM && !BF54x
1132 1133
1133config PM_WAKEUP_GPIO_NUMBER 1134config PM_WAKEUP_GPIO_NUMBER
1134 int "GPIO number" 1135 int "GPIO number"
@@ -1168,6 +1169,12 @@ config PM_BFIN_WAKE_GP
1168 default n 1169 default n
1169 help 1170 help
1170 Enable General-Purpose Wake-Up (Voltage Regulator Power-Up) 1171 Enable General-Purpose Wake-Up (Voltage Regulator Power-Up)
1172 (all processors, except ADSP-BF549). This option sets
1173 the general-purpose wake-up enable (GPWE) control bit to enable
1174 wake-up upon detection of an active low signal on the /GPW (PH7) pin.
1175 On ADSP-BF549 this option enables the the same functionality on the
1176 /MRXON pin also PH7.
1177
1171endmenu 1178endmenu
1172 1179
1173menu "CPU Frequency scaling" 1180menu "CPU Frequency scaling"
diff --git a/arch/blackfin/Kconfig.debug b/arch/blackfin/Kconfig.debug
index 5f981d9ca625..79e7e63ab709 100644
--- a/arch/blackfin/Kconfig.debug
+++ b/arch/blackfin/Kconfig.debug
@@ -21,12 +21,6 @@ config DEBUG_STACK_USAGE
21config HAVE_ARCH_KGDB 21config HAVE_ARCH_KGDB
22 def_bool y 22 def_bool y
23 23
24config KGDB_TESTCASE
25 tristate "KGDB: for test case in expect"
26 default n
27 help
28 This is a kgdb test case for automated testing.
29
30config DEBUG_VERBOSE 24config DEBUG_VERBOSE
31 bool "Verbose fault messages" 25 bool "Verbose fault messages"
32 default y 26 default y
diff --git a/arch/blackfin/configs/BF518F-EZBRD_defconfig b/arch/blackfin/configs/BF518F-EZBRD_defconfig
index 4fdb9e04759f..281f4b60e603 100644
--- a/arch/blackfin/configs/BF518F-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF518F-EZBRD_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28-rc2 3# Linux kernel version: 2.6.28
4# Fri Jan 9 17:58:41 2009 4# Fri Feb 20 10:01:44 2009
5# 5#
6# CONFIG_MMU is not set 6# CONFIG_MMU is not set
7# CONFIG_FPU is not set 7# CONFIG_FPU is not set
@@ -133,10 +133,15 @@ CONFIG_BF518=y
133# CONFIG_BF538 is not set 133# CONFIG_BF538 is not set
134# CONFIG_BF539 is not set 134# CONFIG_BF539 is not set
135# CONFIG_BF542 is not set 135# CONFIG_BF542 is not set
136# CONFIG_BF542M is not set
136# CONFIG_BF544 is not set 137# CONFIG_BF544 is not set
138# CONFIG_BF544M is not set
137# CONFIG_BF547 is not set 139# CONFIG_BF547 is not set
140# CONFIG_BF547M is not set
138# CONFIG_BF548 is not set 141# CONFIG_BF548 is not set
142# CONFIG_BF548M is not set
139# CONFIG_BF549 is not set 143# CONFIG_BF549 is not set
144# CONFIG_BF549M is not set
140# CONFIG_BF561 is not set 145# CONFIG_BF561 is not set
141CONFIG_BF_REV_MIN=0 146CONFIG_BF_REV_MIN=0
142CONFIG_BF_REV_MAX=2 147CONFIG_BF_REV_MAX=2
@@ -426,7 +431,17 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
426# CONFIG_TIPC is not set 431# CONFIG_TIPC is not set
427# CONFIG_ATM is not set 432# CONFIG_ATM is not set
428# CONFIG_BRIDGE is not set 433# CONFIG_BRIDGE is not set
429# CONFIG_NET_DSA is not set 434CONFIG_NET_DSA=y
435# CONFIG_NET_DSA_TAG_DSA is not set
436# CONFIG_NET_DSA_TAG_EDSA is not set
437# CONFIG_NET_DSA_TAG_TRAILER is not set
438CONFIG_NET_DSA_TAG_STPID=y
439# CONFIG_NET_DSA_MV88E6XXX is not set
440# CONFIG_NET_DSA_MV88E6060 is not set
441# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
442# CONFIG_NET_DSA_MV88E6131 is not set
443# CONFIG_NET_DSA_MV88E6123_61_65 is not set
444CONFIG_NET_DSA_KSZ8893M=y
430# CONFIG_VLAN_8021Q is not set 445# CONFIG_VLAN_8021Q is not set
431# CONFIG_DECNET is not set 446# CONFIG_DECNET is not set
432# CONFIG_LLC2 is not set 447# CONFIG_LLC2 is not set
@@ -529,6 +544,8 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
529# 544#
530# Self-contained MTD device drivers 545# Self-contained MTD device drivers
531# 546#
547# CONFIG_MTD_DATAFLASH is not set
548# CONFIG_MTD_M25P80 is not set
532# CONFIG_MTD_SLRAM is not set 549# CONFIG_MTD_SLRAM is not set
533# CONFIG_MTD_PHRAM is not set 550# CONFIG_MTD_PHRAM is not set
534# CONFIG_MTD_MTDRAM is not set 551# CONFIG_MTD_MTDRAM is not set
@@ -561,7 +578,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
561# CONFIG_BLK_DEV_HD is not set 578# CONFIG_BLK_DEV_HD is not set
562CONFIG_MISC_DEVICES=y 579CONFIG_MISC_DEVICES=y
563# CONFIG_EEPROM_93CX6 is not set 580# CONFIG_EEPROM_93CX6 is not set
581# CONFIG_ICS932S401 is not set
564# CONFIG_ENCLOSURE_SERVICES is not set 582# CONFIG_ENCLOSURE_SERVICES is not set
583# CONFIG_C2PORT is not set
565CONFIG_HAVE_IDE=y 584CONFIG_HAVE_IDE=y
566# CONFIG_IDE is not set 585# CONFIG_IDE is not set
567 586
@@ -607,6 +626,7 @@ CONFIG_BFIN_RX_DESC_NUM=20
607# CONFIG_SMC91X is not set 626# CONFIG_SMC91X is not set
608# CONFIG_SMSC911X is not set 627# CONFIG_SMSC911X is not set
609# CONFIG_DM9000 is not set 628# CONFIG_DM9000 is not set
629# CONFIG_ENC28J60 is not set
610# CONFIG_IBM_NEW_EMAC_ZMII is not set 630# CONFIG_IBM_NEW_EMAC_ZMII is not set
611# CONFIG_IBM_NEW_EMAC_RGMII is not set 631# CONFIG_IBM_NEW_EMAC_RGMII is not set
612# CONFIG_IBM_NEW_EMAC_TAH is not set 632# CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -764,7 +784,23 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
764# CONFIG_I2C_DEBUG_ALGO is not set 784# CONFIG_I2C_DEBUG_ALGO is not set
765# CONFIG_I2C_DEBUG_BUS is not set 785# CONFIG_I2C_DEBUG_BUS is not set
766# CONFIG_I2C_DEBUG_CHIP is not set 786# CONFIG_I2C_DEBUG_CHIP is not set
767# CONFIG_SPI is not set 787CONFIG_SPI=y
788# CONFIG_SPI_DEBUG is not set
789CONFIG_SPI_MASTER=y
790
791#
792# SPI Master Controller Drivers
793#
794CONFIG_SPI_BFIN=y
795# CONFIG_SPI_BFIN_LOCK is not set
796# CONFIG_SPI_BITBANG is not set
797
798#
799# SPI Protocol Masters
800#
801# CONFIG_SPI_AT25 is not set
802# CONFIG_SPI_SPIDEV is not set
803# CONFIG_SPI_TLE62X0 is not set
768CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y 804CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
769# CONFIG_GPIOLIB is not set 805# CONFIG_GPIOLIB is not set
770# CONFIG_W1 is not set 806# CONFIG_W1 is not set
@@ -788,8 +824,10 @@ CONFIG_BFIN_WDT=y
788# CONFIG_MFD_SM501 is not set 824# CONFIG_MFD_SM501 is not set
789# CONFIG_HTC_PASIC3 is not set 825# CONFIG_HTC_PASIC3 is not set
790# CONFIG_MFD_TMIO is not set 826# CONFIG_MFD_TMIO is not set
827# CONFIG_PMIC_DA903X is not set
791# CONFIG_MFD_WM8400 is not set 828# CONFIG_MFD_WM8400 is not set
792# CONFIG_MFD_WM8350_I2C is not set 829# CONFIG_MFD_WM8350_I2C is not set
830# CONFIG_REGULATOR is not set
793 831
794# 832#
795# Multimedia devices 833# Multimedia devices
@@ -861,10 +899,18 @@ CONFIG_RTC_INTF_DEV=y
861# CONFIG_RTC_DRV_M41T80 is not set 899# CONFIG_RTC_DRV_M41T80 is not set
862# CONFIG_RTC_DRV_S35390A is not set 900# CONFIG_RTC_DRV_S35390A is not set
863# CONFIG_RTC_DRV_FM3130 is not set 901# CONFIG_RTC_DRV_FM3130 is not set
902# CONFIG_RTC_DRV_RX8581 is not set
864 903
865# 904#
866# SPI RTC drivers 905# SPI RTC drivers
867# 906#
907# CONFIG_RTC_DRV_M41T94 is not set
908# CONFIG_RTC_DRV_DS1305 is not set
909# CONFIG_RTC_DRV_DS1390 is not set
910# CONFIG_RTC_DRV_MAX6902 is not set
911# CONFIG_RTC_DRV_R9701 is not set
912# CONFIG_RTC_DRV_RS5C348 is not set
913# CONFIG_RTC_DRV_DS3234 is not set
868 914
869# 915#
870# Platform RTC drivers 916# Platform RTC drivers
@@ -1062,12 +1108,20 @@ CONFIG_DEBUG_INFO=y
1062# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1108# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1063# CONFIG_FAULT_INJECTION is not set 1109# CONFIG_FAULT_INJECTION is not set
1064CONFIG_SYSCTL_SYSCALL_CHECK=y 1110CONFIG_SYSCTL_SYSCALL_CHECK=y
1111
1112#
1113# Tracers
1114#
1115# CONFIG_SCHED_TRACER is not set
1116# CONFIG_CONTEXT_SWITCH_TRACER is not set
1117# CONFIG_BOOT_TRACER is not set
1065# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1118# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1066# CONFIG_SAMPLES is not set 1119# CONFIG_SAMPLES is not set
1067CONFIG_HAVE_ARCH_KGDB=y 1120CONFIG_HAVE_ARCH_KGDB=y
1068# CONFIG_KGDB is not set 1121# CONFIG_KGDB is not set
1069# CONFIG_DEBUG_STACKOVERFLOW is not set 1122# CONFIG_DEBUG_STACKOVERFLOW is not set
1070# CONFIG_DEBUG_STACK_USAGE is not set 1123# CONFIG_DEBUG_STACK_USAGE is not set
1124# CONFIG_KGDB_TESTCASE is not set
1071CONFIG_DEBUG_VERBOSE=y 1125CONFIG_DEBUG_VERBOSE=y
1072CONFIG_DEBUG_MMRS=y 1126CONFIG_DEBUG_MMRS=y
1073# CONFIG_DEBUG_HWERR is not set 1127# CONFIG_DEBUG_HWERR is not set
@@ -1100,6 +1154,7 @@ CONFIG_CRYPTO=y
1100# 1154#
1101# CONFIG_CRYPTO_FIPS is not set 1155# CONFIG_CRYPTO_FIPS is not set
1102# CONFIG_CRYPTO_MANAGER is not set 1156# CONFIG_CRYPTO_MANAGER is not set
1157# CONFIG_CRYPTO_MANAGER2 is not set
1103# CONFIG_CRYPTO_GF128MUL is not set 1158# CONFIG_CRYPTO_GF128MUL is not set
1104# CONFIG_CRYPTO_NULL is not set 1159# CONFIG_CRYPTO_NULL is not set
1105# CONFIG_CRYPTO_CRYPTD is not set 1160# CONFIG_CRYPTO_CRYPTD is not set
diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig
index 833128b39724..a50050f17706 100644
--- a/arch/blackfin/configs/BF527-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF527-EZKIT_defconfig
@@ -327,8 +327,8 @@ CONFIG_BFIN_ICACHE=y
327CONFIG_BFIN_DCACHE=y 327CONFIG_BFIN_DCACHE=y
328# CONFIG_BFIN_DCACHE_BANKA is not set 328# CONFIG_BFIN_DCACHE_BANKA is not set
329# CONFIG_BFIN_ICACHE_LOCK is not set 329# CONFIG_BFIN_ICACHE_LOCK is not set
330# CONFIG_BFIN_WB is not set 330CONFIG_BFIN_WB=y
331CONFIG_BFIN_WT=y 331# CONFIG_BFIN_WT is not set
332# CONFIG_MPU is not set 332# CONFIG_MPU is not set
333 333
334# 334#
diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig
index 334c94b51c40..0a2a00d63887 100644
--- a/arch/blackfin/configs/BF533-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF533-EZKIT_defconfig
@@ -290,8 +290,8 @@ CONFIG_BFIN_ICACHE=y
290CONFIG_BFIN_DCACHE=y 290CONFIG_BFIN_DCACHE=y
291# CONFIG_BFIN_DCACHE_BANKA is not set 291# CONFIG_BFIN_DCACHE_BANKA is not set
292# CONFIG_BFIN_ICACHE_LOCK is not set 292# CONFIG_BFIN_ICACHE_LOCK is not set
293# CONFIG_BFIN_WB is not set 293CONFIG_BFIN_WB=y
294CONFIG_BFIN_WT=y 294# CONFIG_BFIN_WT is not set
295# CONFIG_MPU is not set 295# CONFIG_MPU is not set
296 296
297# 297#
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig
index 9d733436e300..eb027587a355 100644
--- a/arch/blackfin/configs/BF533-STAMP_defconfig
+++ b/arch/blackfin/configs/BF533-STAMP_defconfig
@@ -290,8 +290,8 @@ CONFIG_BFIN_ICACHE=y
290CONFIG_BFIN_DCACHE=y 290CONFIG_BFIN_DCACHE=y
291# CONFIG_BFIN_DCACHE_BANKA is not set 291# CONFIG_BFIN_DCACHE_BANKA is not set
292# CONFIG_BFIN_ICACHE_LOCK is not set 292# CONFIG_BFIN_ICACHE_LOCK is not set
293# CONFIG_BFIN_WB is not set 293CONFIG_BFIN_WB=y
294CONFIG_BFIN_WT=y 294# CONFIG_BFIN_WT is not set
295# CONFIG_MPU is not set 295# CONFIG_MPU is not set
296 296
297# 297#
diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig
index 4fb4108d3103..9e62b9f40eb1 100644
--- a/arch/blackfin/configs/BF537-STAMP_defconfig
+++ b/arch/blackfin/configs/BF537-STAMP_defconfig
@@ -298,8 +298,8 @@ CONFIG_BFIN_ICACHE=y
298CONFIG_BFIN_DCACHE=y 298CONFIG_BFIN_DCACHE=y
299# CONFIG_BFIN_DCACHE_BANKA is not set 299# CONFIG_BFIN_DCACHE_BANKA is not set
300# CONFIG_BFIN_ICACHE_LOCK is not set 300# CONFIG_BFIN_ICACHE_LOCK is not set
301# CONFIG_BFIN_WB is not set 301CONFIG_BFIN_WB=y
302CONFIG_BFIN_WT=y 302# CONFIG_BFIN_WT is not set
303# CONFIG_MPU is not set 303# CONFIG_MPU is not set
304 304
305# 305#
@@ -568,15 +568,7 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
568# CONFIG_MTD_DOC2000 is not set 568# CONFIG_MTD_DOC2000 is not set
569# CONFIG_MTD_DOC2001 is not set 569# CONFIG_MTD_DOC2001 is not set
570# CONFIG_MTD_DOC2001PLUS is not set 570# CONFIG_MTD_DOC2001PLUS is not set
571CONFIG_MTD_NAND=m 571# CONFIG_MTD_NAND is not set
572# CONFIG_MTD_NAND_VERIFY_WRITE is not set
573# CONFIG_MTD_NAND_ECC_SMC is not set
574# CONFIG_MTD_NAND_MUSEUM_IDS is not set
575# CONFIG_MTD_NAND_BFIN is not set
576CONFIG_MTD_NAND_IDS=m
577# CONFIG_MTD_NAND_DISKONCHIP is not set
578# CONFIG_MTD_NAND_NANDSIM is not set
579CONFIG_MTD_NAND_PLATFORM=m
580# CONFIG_MTD_ONENAND is not set 572# CONFIG_MTD_ONENAND is not set
581 573
582# 574#
diff --git a/arch/blackfin/configs/BF538-EZKIT_defconfig b/arch/blackfin/configs/BF538-EZKIT_defconfig
index cb32f5624a1b..dd6ad6be1c87 100644
--- a/arch/blackfin/configs/BF538-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF538-EZKIT_defconfig
@@ -306,8 +306,8 @@ CONFIG_BFIN_ICACHE=y
306CONFIG_BFIN_DCACHE=y 306CONFIG_BFIN_DCACHE=y
307# CONFIG_BFIN_DCACHE_BANKA is not set 307# CONFIG_BFIN_DCACHE_BANKA is not set
308# CONFIG_BFIN_ICACHE_LOCK is not set 308# CONFIG_BFIN_ICACHE_LOCK is not set
309# CONFIG_BFIN_WB is not set 309CONFIG_BFIN_WB=y
310CONFIG_BFIN_WT=y 310# CONFIG_BFIN_WT is not set
311# CONFIG_MPU is not set 311# CONFIG_MPU is not set
312 312
313# 313#
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig
index 0f8697618aa5..6bc2fb1b2a70 100644
--- a/arch/blackfin/configs/BF548-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF548-EZKIT_defconfig
@@ -361,8 +361,8 @@ CONFIG_BFIN_ICACHE=y
361CONFIG_BFIN_DCACHE=y 361CONFIG_BFIN_DCACHE=y
362# CONFIG_BFIN_DCACHE_BANKA is not set 362# CONFIG_BFIN_DCACHE_BANKA is not set
363# CONFIG_BFIN_ICACHE_LOCK is not set 363# CONFIG_BFIN_ICACHE_LOCK is not set
364# CONFIG_BFIN_WB is not set 364CONFIG_BFIN_WB=y
365CONFIG_BFIN_WT=y 365# CONFIG_BFIN_WT is not set
366# CONFIG_BFIN_L2_CACHEABLE is not set 366# CONFIG_BFIN_L2_CACHEABLE is not set
367# CONFIG_MPU is not set 367# CONFIG_MPU is not set
368 368
@@ -680,7 +680,7 @@ CONFIG_SCSI=y
680CONFIG_SCSI_DMA=y 680CONFIG_SCSI_DMA=y
681# CONFIG_SCSI_TGT is not set 681# CONFIG_SCSI_TGT is not set
682# CONFIG_SCSI_NETLINK is not set 682# CONFIG_SCSI_NETLINK is not set
683CONFIG_SCSI_PROC_FS=y 683# CONFIG_SCSI_PROC_FS is not set
684 684
685# 685#
686# SCSI support type (disk, tape, CD-ROM) 686# SCSI support type (disk, tape, CD-ROM)
diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig
index 042c7adfccfa..69714fb3e608 100644
--- a/arch/blackfin/configs/BF561-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF561-EZKIT_defconfig
@@ -329,8 +329,8 @@ CONFIG_BFIN_ICACHE=y
329CONFIG_BFIN_DCACHE=y 329CONFIG_BFIN_DCACHE=y
330# CONFIG_BFIN_DCACHE_BANKA is not set 330# CONFIG_BFIN_DCACHE_BANKA is not set
331# CONFIG_BFIN_ICACHE_LOCK is not set 331# CONFIG_BFIN_ICACHE_LOCK is not set
332# CONFIG_BFIN_WB is not set 332CONFIG_BFIN_WB=y
333CONFIG_BFIN_WT=y 333# CONFIG_BFIN_WT is not set
334# CONFIG_BFIN_L2_CACHEABLE is not set 334# CONFIG_BFIN_L2_CACHEABLE is not set
335# CONFIG_MPU is not set 335# CONFIG_MPU is not set
336 336
diff --git a/arch/blackfin/configs/BlackStamp_defconfig b/arch/blackfin/configs/BlackStamp_defconfig
index 3a20e281d23c..017c6ea071b5 100644
--- a/arch/blackfin/configs/BlackStamp_defconfig
+++ b/arch/blackfin/configs/BlackStamp_defconfig
@@ -288,8 +288,8 @@ CONFIG_BFIN_ICACHE=y
288CONFIG_BFIN_DCACHE=y 288CONFIG_BFIN_DCACHE=y
289# CONFIG_BFIN_DCACHE_BANKA is not set 289# CONFIG_BFIN_DCACHE_BANKA is not set
290# CONFIG_BFIN_ICACHE_LOCK is not set 290# CONFIG_BFIN_ICACHE_LOCK is not set
291# CONFIG_BFIN_WB is not set 291CONFIG_BFIN_WB=y
292CONFIG_BFIN_WT=y 292# CONFIG_BFIN_WT is not set
293# CONFIG_MPU is not set 293# CONFIG_MPU is not set
294 294
295# 295#
diff --git a/arch/blackfin/configs/CM-BF527_defconfig b/arch/blackfin/configs/CM-BF527_defconfig
index 865ed85a5760..d880ef786770 100644
--- a/arch/blackfin/configs/CM-BF527_defconfig
+++ b/arch/blackfin/configs/CM-BF527_defconfig
@@ -332,8 +332,8 @@ CONFIG_BFIN_ICACHE=y
332CONFIG_BFIN_DCACHE=y 332CONFIG_BFIN_DCACHE=y
333# CONFIG_BFIN_DCACHE_BANKA is not set 333# CONFIG_BFIN_DCACHE_BANKA is not set
334# CONFIG_BFIN_ICACHE_LOCK is not set 334# CONFIG_BFIN_ICACHE_LOCK is not set
335# CONFIG_BFIN_WB is not set 335CONFIG_BFIN_WB=y
336CONFIG_BFIN_WT=y 336# CONFIG_BFIN_WT is not set
337# CONFIG_MPU is not set 337# CONFIG_MPU is not set
338 338
339# 339#
diff --git a/arch/blackfin/configs/CM-BF548_defconfig b/arch/blackfin/configs/CM-BF548_defconfig
index efe9741b1f14..f410430b4e3d 100644
--- a/arch/blackfin/configs/CM-BF548_defconfig
+++ b/arch/blackfin/configs/CM-BF548_defconfig
@@ -336,8 +336,8 @@ CONFIG_BFIN_ICACHE=y
336CONFIG_BFIN_DCACHE=y 336CONFIG_BFIN_DCACHE=y
337# CONFIG_BFIN_DCACHE_BANKA is not set 337# CONFIG_BFIN_DCACHE_BANKA is not set
338# CONFIG_BFIN_ICACHE_LOCK is not set 338# CONFIG_BFIN_ICACHE_LOCK is not set
339# CONFIG_BFIN_WB is not set 339CONFIG_BFIN_WB=y
340CONFIG_BFIN_WT=y 340# CONFIG_BFIN_WT is not set
341CONFIG_L1_MAX_PIECE=16 341CONFIG_L1_MAX_PIECE=16
342# CONFIG_MPU is not set 342# CONFIG_MPU is not set
343 343
@@ -595,7 +595,7 @@ CONFIG_SCSI=y
595CONFIG_SCSI_DMA=y 595CONFIG_SCSI_DMA=y
596# CONFIG_SCSI_TGT is not set 596# CONFIG_SCSI_TGT is not set
597# CONFIG_SCSI_NETLINK is not set 597# CONFIG_SCSI_NETLINK is not set
598CONFIG_SCSI_PROC_FS=y 598# CONFIG_SCSI_PROC_FS is not set
599 599
600# 600#
601# SCSI support type (disk, tape, CD-ROM) 601# SCSI support type (disk, tape, CD-ROM)
diff --git a/arch/blackfin/configs/IP0X_defconfig b/arch/blackfin/configs/IP0X_defconfig
index eae83b5de92f..7db93874c987 100644
--- a/arch/blackfin/configs/IP0X_defconfig
+++ b/arch/blackfin/configs/IP0X_defconfig
@@ -612,7 +612,7 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
612CONFIG_SCSI=y 612CONFIG_SCSI=y
613# CONFIG_SCSI_TGT is not set 613# CONFIG_SCSI_TGT is not set
614# CONFIG_SCSI_NETLINK is not set 614# CONFIG_SCSI_NETLINK is not set
615CONFIG_SCSI_PROC_FS=y 615# CONFIG_SCSI_PROC_FS is not set
616 616
617# 617#
618# SCSI support type (disk, tape, CD-ROM) 618# SCSI support type (disk, tape, CD-ROM)
diff --git a/arch/blackfin/configs/SRV1_defconfig b/arch/blackfin/configs/SRV1_defconfig
index fa580affc9d6..a46529c6ade3 100644
--- a/arch/blackfin/configs/SRV1_defconfig
+++ b/arch/blackfin/configs/SRV1_defconfig
@@ -282,8 +282,8 @@ CONFIG_BFIN_ICACHE=y
282CONFIG_BFIN_DCACHE=y 282CONFIG_BFIN_DCACHE=y
283# CONFIG_BFIN_DCACHE_BANKA is not set 283# CONFIG_BFIN_DCACHE_BANKA is not set
284# CONFIG_BFIN_ICACHE_LOCK is not set 284# CONFIG_BFIN_ICACHE_LOCK is not set
285# CONFIG_BFIN_WB is not set 285CONFIG_BFIN_WB=y
286CONFIG_BFIN_WT=y 286# CONFIG_BFIN_WT is not set
287CONFIG_L1_MAX_PIECE=16 287CONFIG_L1_MAX_PIECE=16
288 288
289# 289#
diff --git a/arch/blackfin/include/asm/Kbuild b/arch/blackfin/include/asm/Kbuild
index 606ecfdcc962..09c31418cc08 100644
--- a/arch/blackfin/include/asm/Kbuild
+++ b/arch/blackfin/include/asm/Kbuild
@@ -1,3 +1,4 @@
1include include/asm-generic/Kbuild.asm 1include include/asm-generic/Kbuild.asm
2 2
3unifdef-y += bfin_sport.h
3unifdef-y += fixed_code.h 4unifdef-y += fixed_code.h
diff --git a/arch/blackfin/include/asm/bfin_sport.h b/arch/blackfin/include/asm/bfin_sport.h
index fe88a2c19213..65a651db5b07 100644
--- a/arch/blackfin/include/asm/bfin_sport.h
+++ b/arch/blackfin/include/asm/bfin_sport.h
@@ -1,30 +1,9 @@
1/* 1/*
2 * File: include/asm-blackfin/bfin_sport.h 2 * bfin_sport.h - userspace header for bfin sport driver
3 * Based on:
4 * Author: Roy Huang (roy.huang@analog.com)
5 * 3 *
6 * Created: Thu Aug. 24 2006 4 * Copyright 2004-2008 Analog Devices Inc.
7 * Description:
8 * 5 *
9 * Modified: 6 * Licensed under the GPL-2 or later.
10 * Copyright 2004-2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */ 7 */
29 8
30#ifndef __BFIN_SPORT_H__ 9#ifndef __BFIN_SPORT_H__
@@ -42,11 +21,10 @@
42#define NORM_FORMAT 0x0 21#define NORM_FORMAT 0x0
43#define ALAW_FORMAT 0x2 22#define ALAW_FORMAT 0x2
44#define ULAW_FORMAT 0x3 23#define ULAW_FORMAT 0x3
45struct sport_register;
46 24
47/* Function driver which use sport must initialize the structure */ 25/* Function driver which use sport must initialize the structure */
48struct sport_config { 26struct sport_config {
49 /*TDM (multichannels), I2S or other mode */ 27 /* TDM (multichannels), I2S or other mode */
50 unsigned int mode:3; 28 unsigned int mode:3;
51 29
52 /* if TDM mode is selected, channels must be set */ 30 /* if TDM mode is selected, channels must be set */
@@ -72,12 +50,18 @@ struct sport_config {
72 int serial_clk; 50 int serial_clk;
73 int fsync_clk; 51 int fsync_clk;
74 52
75 unsigned int data_format:2; /*Normal, u-law or a-law */ 53 unsigned int data_format:2; /* Normal, u-law or a-law */
76 54
77 int word_len; /* How length of the word in bits, 3-32 bits */ 55 int word_len; /* How length of the word in bits, 3-32 bits */
78 int dma_enabled; 56 int dma_enabled;
79}; 57};
80 58
59/* Userspace interface */
60#define SPORT_IOC_MAGIC 'P'
61#define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config)
62
63#ifdef __KERNEL__
64
81struct sport_register { 65struct sport_register {
82 unsigned short tcr1; 66 unsigned short tcr1;
83 unsigned short reserved0; 67 unsigned short reserved0;
@@ -117,9 +101,6 @@ struct sport_register {
117 unsigned long mrcs3; 101 unsigned long mrcs3;
118}; 102};
119 103
120#define SPORT_IOC_MAGIC 'P'
121#define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config)
122
123struct sport_dev { 104struct sport_dev {
124 struct cdev cdev; /* Char device structure */ 105 struct cdev cdev; /* Char device structure */
125 106
@@ -149,6 +130,8 @@ struct sport_dev {
149 struct sport_config config; 130 struct sport_config config;
150}; 131};
151 132
133#endif
134
152#define SPORT_TCR1 0 135#define SPORT_TCR1 0
153#define SPORT_TCR2 1 136#define SPORT_TCR2 1
154#define SPORT_TCLKDIV 2 137#define SPORT_TCLKDIV 2
@@ -169,4 +152,4 @@ struct sport_dev {
169#define SPORT_MRCS2 22 152#define SPORT_MRCS2 22
170#define SPORT_MRCS3 23 153#define SPORT_MRCS3 23
171 154
172#endif /*__BFIN_SPORT_H__*/ 155#endif
diff --git a/arch/blackfin/include/asm/ipipe.h b/arch/blackfin/include/asm/ipipe.h
index 76f53d8b9a0d..343b56361ec9 100644
--- a/arch/blackfin/include/asm/ipipe.h
+++ b/arch/blackfin/include/asm/ipipe.h
@@ -35,9 +35,9 @@
35#include <asm/atomic.h> 35#include <asm/atomic.h>
36#include <asm/traps.h> 36#include <asm/traps.h>
37 37
38#define IPIPE_ARCH_STRING "1.8-00" 38#define IPIPE_ARCH_STRING "1.9-00"
39#define IPIPE_MAJOR_NUMBER 1 39#define IPIPE_MAJOR_NUMBER 1
40#define IPIPE_MINOR_NUMBER 8 40#define IPIPE_MINOR_NUMBER 9
41#define IPIPE_PATCH_NUMBER 0 41#define IPIPE_PATCH_NUMBER 0
42 42
43#ifdef CONFIG_SMP 43#ifdef CONFIG_SMP
@@ -83,9 +83,9 @@ struct ipipe_sysinfo {
83 "%2 = CYCLES2\n" \ 83 "%2 = CYCLES2\n" \
84 "CC = %2 == %0\n" \ 84 "CC = %2 == %0\n" \
85 "if ! CC jump 1b\n" \ 85 "if ! CC jump 1b\n" \
86 : "=r" (((unsigned long *)&t)[1]), \ 86 : "=d,a" (((unsigned long *)&t)[1]), \
87 "=r" (((unsigned long *)&t)[0]), \ 87 "=d,a" (((unsigned long *)&t)[0]), \
88 "=r" (__cy2) \ 88 "=d,a" (__cy2) \
89 : /*no input*/ : "CC"); \ 89 : /*no input*/ : "CC"); \
90 t; \ 90 t; \
91 }) 91 })
@@ -118,35 +118,40 @@ void __ipipe_disable_irqdesc(struct ipipe_domain *ipd,
118 118
119#define __ipipe_disable_irq(irq) (irq_desc[irq].chip->mask(irq)) 119#define __ipipe_disable_irq(irq) (irq_desc[irq].chip->mask(irq))
120 120
121#define __ipipe_lock_root() \ 121static inline int __ipipe_check_tickdev(const char *devname)
122 set_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags) 122{
123 return 1;
124}
123 125
124#define __ipipe_unlock_root() \ 126static inline void __ipipe_lock_root(void)
125 clear_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags) 127{
128 set_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status));
129}
130
131static inline void __ipipe_unlock_root(void)
132{
133 clear_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status));
134}
126 135
127void __ipipe_enable_pipeline(void); 136void __ipipe_enable_pipeline(void);
128 137
129#define __ipipe_hook_critical_ipi(ipd) do { } while (0) 138#define __ipipe_hook_critical_ipi(ipd) do { } while (0)
130 139
131#define __ipipe_sync_pipeline(syncmask) \ 140#define __ipipe_sync_pipeline ___ipipe_sync_pipeline
132 do { \ 141void ___ipipe_sync_pipeline(unsigned long syncmask);
133 struct ipipe_domain *ipd = ipipe_current_domain; \
134 if (likely(ipd != ipipe_root_domain || !test_bit(IPIPE_ROOTLOCK_FLAG, &ipd->flags))) \
135 __ipipe_sync_stage(syncmask); \
136 } while (0)
137 142
138void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs); 143void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs);
139 144
140int __ipipe_get_irq_priority(unsigned irq); 145int __ipipe_get_irq_priority(unsigned irq);
141 146
142int __ipipe_get_irqthread_priority(unsigned irq);
143
144void __ipipe_stall_root_raw(void); 147void __ipipe_stall_root_raw(void);
145 148
146void __ipipe_unstall_root_raw(void); 149void __ipipe_unstall_root_raw(void);
147 150
148void __ipipe_serial_debug(const char *fmt, ...); 151void __ipipe_serial_debug(const char *fmt, ...);
149 152
153asmlinkage void __ipipe_call_irqtail(unsigned long addr);
154
150DECLARE_PER_CPU(struct pt_regs, __ipipe_tick_regs); 155DECLARE_PER_CPU(struct pt_regs, __ipipe_tick_regs);
151 156
152extern unsigned long __ipipe_core_clock; 157extern unsigned long __ipipe_core_clock;
@@ -162,42 +167,25 @@ static inline unsigned long __ipipe_ffnz(unsigned long ul)
162 167
163#define __ipipe_run_irqtail() /* Must be a macro */ \ 168#define __ipipe_run_irqtail() /* Must be a macro */ \
164 do { \ 169 do { \
165 asmlinkage void __ipipe_call_irqtail(void); \
166 unsigned long __pending; \ 170 unsigned long __pending; \
167 CSYNC(); \ 171 CSYNC(); \
168 __pending = bfin_read_IPEND(); \ 172 __pending = bfin_read_IPEND(); \
169 if (__pending & 0x8000) { \ 173 if (__pending & 0x8000) { \
170 __pending &= ~0x8010; \ 174 __pending &= ~0x8010; \
171 if (__pending && (__pending & (__pending - 1)) == 0) \ 175 if (__pending && (__pending & (__pending - 1)) == 0) \
172 __ipipe_call_irqtail(); \ 176 __ipipe_call_irqtail(__ipipe_irq_tail_hook); \
173 } \ 177 } \
174 } while (0) 178 } while (0)
175 179
176#define __ipipe_run_isr(ipd, irq) \ 180#define __ipipe_run_isr(ipd, irq) \
177 do { \ 181 do { \
178 if (ipd == ipipe_root_domain) { \ 182 if (ipd == ipipe_root_domain) { \
179 /* \ 183 local_irq_enable_hw(); \
180 * Note: the I-pipe implements a threaded interrupt model on \ 184 if (ipipe_virtual_irq_p(irq)) \
181 * this arch for Linux external IRQs. The interrupt handler we \
182 * call here only wakes up the associated IRQ thread. \
183 */ \
184 if (ipipe_virtual_irq_p(irq)) { \
185 /* No irqtail here; virtual interrupts have no effect \
186 on IPEND so there is no need for processing \
187 deferral. */ \
188 local_irq_enable_nohead(ipd); \
189 ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \ 185 ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \
190 local_irq_disable_nohead(ipd); \ 186 else \
191 } else \
192 /* \
193 * No need to run the irqtail here either; \
194 * we can't be preempted by hw IRQs, so \
195 * non-Linux IRQs cannot stack over the short \
196 * thread wakeup code. Which in turn means \
197 * that no irqtail condition could be pending \
198 * for domains above Linux in the pipeline. \
199 */ \
200 ipd->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); \ 187 ipd->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); \
188 local_irq_disable_hw(); \
201 } else { \ 189 } else { \
202 __clear_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \ 190 __clear_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \
203 local_irq_enable_nohead(ipd); \ 191 local_irq_enable_nohead(ipd); \
@@ -217,42 +205,24 @@ void ipipe_init_irq_threads(void);
217 205
218int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc); 206int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc);
219 207
220#define IS_SYSIRQ(irq) ((irq) > IRQ_CORETMR && (irq) <= SYS_IRQS) 208#ifdef CONFIG_GENERIC_CLOCKEVENTS
221#define IS_GPIOIRQ(irq) ((irq) >= GPIO_IRQ_BASE && (irq) < NR_IRQS) 209#define IRQ_SYSTMR IRQ_CORETMR
222 210#define IRQ_PRIOTMR IRQ_CORETMR
211#else
223#define IRQ_SYSTMR IRQ_TIMER0 212#define IRQ_SYSTMR IRQ_TIMER0
224#define IRQ_PRIOTMR CONFIG_IRQ_TIMER0 213#define IRQ_PRIOTMR CONFIG_IRQ_TIMER0
214#endif
225 215
226#if defined(CONFIG_BF531) || defined(CONFIG_BF532) || defined(CONFIG_BF533) 216#ifdef CONFIG_BF561
227#define PRIO_GPIODEMUX(irq) CONFIG_PFA
228#elif defined(CONFIG_BF534) || defined(CONFIG_BF536) || defined(CONFIG_BF537)
229#define PRIO_GPIODEMUX(irq) CONFIG_IRQ_PROG_INTA
230#elif defined(CONFIG_BF52x)
231#define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PORTF_INTA ? CONFIG_IRQ_PORTF_INTA : \
232 (irq) == IRQ_PORTG_INTA ? CONFIG_IRQ_PORTG_INTA : \
233 (irq) == IRQ_PORTH_INTA ? CONFIG_IRQ_PORTH_INTA : \
234 -1)
235#elif defined(CONFIG_BF561)
236#define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PROG0_INTA ? CONFIG_IRQ_PROG0_INTA : \
237 (irq) == IRQ_PROG1_INTA ? CONFIG_IRQ_PROG1_INTA : \
238 (irq) == IRQ_PROG2_INTA ? CONFIG_IRQ_PROG2_INTA : \
239 -1)
240#define bfin_write_TIMER_DISABLE(val) bfin_write_TMRS8_DISABLE(val) 217#define bfin_write_TIMER_DISABLE(val) bfin_write_TMRS8_DISABLE(val)
241#define bfin_write_TIMER_ENABLE(val) bfin_write_TMRS8_ENABLE(val) 218#define bfin_write_TIMER_ENABLE(val) bfin_write_TMRS8_ENABLE(val)
242#define bfin_write_TIMER_STATUS(val) bfin_write_TMRS8_STATUS(val) 219#define bfin_write_TIMER_STATUS(val) bfin_write_TMRS8_STATUS(val)
243#define bfin_read_TIMER_STATUS() bfin_read_TMRS8_STATUS() 220#define bfin_read_TIMER_STATUS() bfin_read_TMRS8_STATUS()
244#elif defined(CONFIG_BF54x) 221#elif defined(CONFIG_BF54x)
245#define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PINT0 ? CONFIG_IRQ_PINT0 : \
246 (irq) == IRQ_PINT1 ? CONFIG_IRQ_PINT1 : \
247 (irq) == IRQ_PINT2 ? CONFIG_IRQ_PINT2 : \
248 (irq) == IRQ_PINT3 ? CONFIG_IRQ_PINT3 : \
249 -1)
250#define bfin_write_TIMER_DISABLE(val) bfin_write_TIMER_DISABLE0(val) 222#define bfin_write_TIMER_DISABLE(val) bfin_write_TIMER_DISABLE0(val)
251#define bfin_write_TIMER_ENABLE(val) bfin_write_TIMER_ENABLE0(val) 223#define bfin_write_TIMER_ENABLE(val) bfin_write_TIMER_ENABLE0(val)
252#define bfin_write_TIMER_STATUS(val) bfin_write_TIMER_STATUS0(val) 224#define bfin_write_TIMER_STATUS(val) bfin_write_TIMER_STATUS0(val)
253#define bfin_read_TIMER_STATUS(val) bfin_read_TIMER_STATUS0(val) 225#define bfin_read_TIMER_STATUS(val) bfin_read_TIMER_STATUS0(val)
254#else
255# error "no PRIO_GPIODEMUX() for this part"
256#endif 226#endif
257 227
258#define __ipipe_root_tick_p(regs) ((regs->ipend & 0x10) != 0) 228#define __ipipe_root_tick_p(regs) ((regs->ipend & 0x10) != 0)
@@ -275,4 +245,6 @@ int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc);
275 245
276#endif /* !CONFIG_IPIPE */ 246#endif /* !CONFIG_IPIPE */
277 247
248#define ipipe_update_tick_evtdev(evtdev) do { } while (0)
249
278#endif /* !__ASM_BLACKFIN_IPIPE_H */ 250#endif /* !__ASM_BLACKFIN_IPIPE_H */
diff --git a/arch/blackfin/include/asm/ipipe_base.h b/arch/blackfin/include/asm/ipipe_base.h
index cb1025aeabcf..3e8acbd1a3be 100644
--- a/arch/blackfin/include/asm/ipipe_base.h
+++ b/arch/blackfin/include/asm/ipipe_base.h
@@ -1,5 +1,5 @@
1/* -*- linux-c -*- 1/* -*- linux-c -*-
2 * include/asm-blackfin/_baseipipe.h 2 * include/asm-blackfin/ipipe_base.h
3 * 3 *
4 * Copyright (C) 2007 Philippe Gerum. 4 * Copyright (C) 2007 Philippe Gerum.
5 * 5 *
@@ -27,8 +27,9 @@
27#define IPIPE_NR_XIRQS NR_IRQS 27#define IPIPE_NR_XIRQS NR_IRQS
28#define IPIPE_IRQ_ISHIFT 5 /* 2^5 for 32bits arch. */ 28#define IPIPE_IRQ_ISHIFT 5 /* 2^5 for 32bits arch. */
29 29
30/* Blackfin-specific, global domain flags */ 30/* Blackfin-specific, per-cpu pipeline status */
31#define IPIPE_ROOTLOCK_FLAG 1 /* Lock pipeline for root */ 31#define IPIPE_SYNCDEFER_FLAG 15
32#define IPIPE_SYNCDEFER_MASK (1L << IPIPE_SYNCDEFER_MASK)
32 33
33 /* Blackfin traps -- i.e. exception vector numbers */ 34 /* Blackfin traps -- i.e. exception vector numbers */
34#define IPIPE_NR_FAULTS 52 /* We leave a gap after VEC_ILL_RES. */ 35#define IPIPE_NR_FAULTS 52 /* We leave a gap after VEC_ILL_RES. */
@@ -48,11 +49,6 @@
48 49
49#ifndef __ASSEMBLY__ 50#ifndef __ASSEMBLY__
50 51
51#include <linux/bitops.h>
52
53extern int test_bit(int nr, const void *addr);
54
55
56extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */ 52extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */
57 53
58static inline void __ipipe_stall_root(void) 54static inline void __ipipe_stall_root(void)
diff --git a/arch/blackfin/include/asm/irq.h b/arch/blackfin/include/asm/irq.h
index 3d977909ce7d..7645e85a5f6f 100644
--- a/arch/blackfin/include/asm/irq.h
+++ b/arch/blackfin/include/asm/irq.h
@@ -61,20 +61,38 @@ void __ipipe_restore_root(unsigned long flags);
61#define raw_irqs_disabled_flags(flags) (!irqs_enabled_from_flags_hw(flags)) 61#define raw_irqs_disabled_flags(flags) (!irqs_enabled_from_flags_hw(flags))
62#define local_test_iflag_hw(x) irqs_enabled_from_flags_hw(x) 62#define local_test_iflag_hw(x) irqs_enabled_from_flags_hw(x)
63 63
64#define local_save_flags(x) \ 64#define local_save_flags(x) \
65 do { \ 65 do { \
66 (x) = __ipipe_test_root() ? \ 66 (x) = __ipipe_test_root() ? \
67 __all_masked_irq_flags : bfin_irq_flags; \ 67 __all_masked_irq_flags : bfin_irq_flags; \
68 barrier(); \
68 } while (0) 69 } while (0)
69 70
70#define local_irq_save(x) \ 71#define local_irq_save(x) \
71 do { \ 72 do { \
72 (x) = __ipipe_test_and_stall_root(); \ 73 (x) = __ipipe_test_and_stall_root() ? \
74 __all_masked_irq_flags : bfin_irq_flags; \
75 barrier(); \
76 } while (0)
77
78static inline void local_irq_restore(unsigned long x)
79{
80 barrier();
81 __ipipe_restore_root(x == __all_masked_irq_flags);
82}
83
84#define local_irq_disable() \
85 do { \
86 __ipipe_stall_root(); \
87 barrier(); \
73 } while (0) 88 } while (0)
74 89
75#define local_irq_restore(x) __ipipe_restore_root(x) 90static inline void local_irq_enable(void)
76#define local_irq_disable() __ipipe_stall_root() 91{
77#define local_irq_enable() __ipipe_unstall_root() 92 barrier();
93 __ipipe_unstall_root();
94}
95
78#define irqs_disabled() __ipipe_test_root() 96#define irqs_disabled() __ipipe_test_root()
79 97
80#define local_save_flags_hw(x) \ 98#define local_save_flags_hw(x) \
diff --git a/arch/blackfin/include/asm/thread_info.h b/arch/blackfin/include/asm/thread_info.h
index e721ce55956c..2920087516f2 100644
--- a/arch/blackfin/include/asm/thread_info.h
+++ b/arch/blackfin/include/asm/thread_info.h
@@ -122,6 +122,7 @@ static inline struct thread_info *current_thread_info(void)
122#define TIF_MEMDIE 4 122#define TIF_MEMDIE 4
123#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */ 123#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */
124#define TIF_FREEZE 6 /* is freezing for suspend */ 124#define TIF_FREEZE 6 /* is freezing for suspend */
125#define TIF_IRQ_SYNC 7 /* sync pipeline stage */
125 126
126/* as above, but as bit values */ 127/* as above, but as bit values */
127#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 128#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
@@ -130,6 +131,7 @@ static inline struct thread_info *current_thread_info(void)
130#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 131#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
131#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) 132#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
132#define _TIF_FREEZE (1<<TIF_FREEZE) 133#define _TIF_FREEZE (1<<TIF_FREEZE)
134#define _TIF_IRQ_SYNC (1<<TIF_IRQ_SYNC)
133 135
134#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */ 136#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
135 137
diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile
index 4a92a86824b7..fd4d4328a0f2 100644
--- a/arch/blackfin/kernel/Makefile
+++ b/arch/blackfin/kernel/Makefile
@@ -15,13 +15,15 @@ else
15 obj-y += time.o 15 obj-y += time.o
16endif 16endif
17 17
18CFLAGS_kgdb_test.o := -mlong-calls -O0
19
20obj-$(CONFIG_IPIPE) += ipipe.o 18obj-$(CONFIG_IPIPE) += ipipe.o
21obj-$(CONFIG_IPIPE_TRACE_MCOUNT) += mcount.o 19obj-$(CONFIG_IPIPE_TRACE_MCOUNT) += mcount.o
22obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o 20obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o
23obj-$(CONFIG_CPLB_INFO) += cplbinfo.o 21obj-$(CONFIG_CPLB_INFO) += cplbinfo.o
24obj-$(CONFIG_MODULES) += module.o 22obj-$(CONFIG_MODULES) += module.o
25obj-$(CONFIG_KGDB) += kgdb.o 23obj-$(CONFIG_KGDB) += kgdb.o
26obj-$(CONFIG_KGDB_TESTCASE) += kgdb_test.o 24obj-$(CONFIG_KGDB_TESTS) += kgdb_test.o
27obj-$(CONFIG_EARLY_PRINTK) += early_printk.o 25obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
26
27# the kgdb test puts code into L2 and without linker
28# relaxation, we need to force long calls to/from it
29CFLAGS_kgdb_test.o := -mlong-calls -O0
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
index 0e28f7595733..d6c067782e63 100644
--- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
@@ -53,9 +53,13 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
53 53
54 i_d = i_i = 0; 54 i_d = i_i = 0;
55 55
56#ifdef CONFIG_DEBUG_HUNT_FOR_ZERO
56 /* Set up the zero page. */ 57 /* Set up the zero page. */
57 d_tbl[i_d].addr = 0; 58 d_tbl[i_d].addr = 0;
58 d_tbl[i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; 59 d_tbl[i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB;
60 i_tbl[i_i].addr = 0;
61 i_tbl[i_i++].data = SDRAM_OOPS | PAGE_SIZE_1KB;
62#endif
59 63
60 /* Cover kernel memory with 4M pages. */ 64 /* Cover kernel memory with 4M pages. */
61 addr = 0; 65 addr = 0;
diff --git a/arch/blackfin/kernel/ipipe.c b/arch/blackfin/kernel/ipipe.c
index 339be5a3ae6a..a5de8d45424c 100644
--- a/arch/blackfin/kernel/ipipe.c
+++ b/arch/blackfin/kernel/ipipe.c
@@ -35,14 +35,8 @@
35#include <asm/atomic.h> 35#include <asm/atomic.h>
36#include <asm/io.h> 36#include <asm/io.h>
37 37
38static int create_irq_threads;
39
40DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs); 38DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs);
41 39
42static DEFINE_PER_CPU(unsigned long, pending_irqthread_mask);
43
44static DEFINE_PER_CPU(int [IVG13 + 1], pending_irq_count);
45
46asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs); 40asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs);
47 41
48static void __ipipe_no_irqtail(void); 42static void __ipipe_no_irqtail(void);
@@ -93,6 +87,7 @@ void __ipipe_enable_pipeline(void)
93 */ 87 */
94void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) 88void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
95{ 89{
90 struct ipipe_percpu_domain_data *p = ipipe_root_cpudom_ptr();
96 struct ipipe_domain *this_domain, *next_domain; 91 struct ipipe_domain *this_domain, *next_domain;
97 struct list_head *head, *pos; 92 struct list_head *head, *pos;
98 int m_ack, s = -1; 93 int m_ack, s = -1;
@@ -104,7 +99,6 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
104 * interrupt. 99 * interrupt.
105 */ 100 */
106 m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR); 101 m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR);
107
108 this_domain = ipipe_current_domain; 102 this_domain = ipipe_current_domain;
109 103
110 if (unlikely(test_bit(IPIPE_STICKY_FLAG, &this_domain->irqs[irq].control))) 104 if (unlikely(test_bit(IPIPE_STICKY_FLAG, &this_domain->irqs[irq].control)))
@@ -114,49 +108,28 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
114 next_domain = list_entry(head, struct ipipe_domain, p_link); 108 next_domain = list_entry(head, struct ipipe_domain, p_link);
115 if (likely(test_bit(IPIPE_WIRED_FLAG, &next_domain->irqs[irq].control))) { 109 if (likely(test_bit(IPIPE_WIRED_FLAG, &next_domain->irqs[irq].control))) {
116 if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) 110 if (!m_ack && next_domain->irqs[irq].acknowledge != NULL)
117 next_domain->irqs[irq].acknowledge(irq, irq_desc + irq); 111 next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq));
118 if (test_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags)) 112 if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status))
119 s = __test_and_set_bit(IPIPE_STALL_FLAG, 113 s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status);
120 &ipipe_root_cpudom_var(status));
121 __ipipe_dispatch_wired(next_domain, irq); 114 __ipipe_dispatch_wired(next_domain, irq);
122 goto finalize; 115 goto out;
123 return;
124 } 116 }
125 } 117 }
126 118
127 /* Ack the interrupt. */ 119 /* Ack the interrupt. */
128 120
129 pos = head; 121 pos = head;
130
131 while (pos != &__ipipe_pipeline) { 122 while (pos != &__ipipe_pipeline) {
132 next_domain = list_entry(pos, struct ipipe_domain, p_link); 123 next_domain = list_entry(pos, struct ipipe_domain, p_link);
133 /*
134 * For each domain handling the incoming IRQ, mark it
135 * as pending in its log.
136 */
137 if (test_bit(IPIPE_HANDLE_FLAG, &next_domain->irqs[irq].control)) { 124 if (test_bit(IPIPE_HANDLE_FLAG, &next_domain->irqs[irq].control)) {
138 /*
139 * Domains that handle this IRQ are polled for
140 * acknowledging it by decreasing priority
141 * order. The interrupt must be made pending
142 * _first_ in the domain's status flags before
143 * the PIC is unlocked.
144 */
145 __ipipe_set_irq_pending(next_domain, irq); 125 __ipipe_set_irq_pending(next_domain, irq);
146
147 if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) { 126 if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) {
148 next_domain->irqs[irq].acknowledge(irq, irq_desc + irq); 127 next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq));
149 m_ack = 1; 128 m_ack = 1;
150 } 129 }
151 } 130 }
152
153 /*
154 * If the domain does not want the IRQ to be passed
155 * down the interrupt pipe, exit the loop now.
156 */
157 if (!test_bit(IPIPE_PASS_FLAG, &next_domain->irqs[irq].control)) 131 if (!test_bit(IPIPE_PASS_FLAG, &next_domain->irqs[irq].control))
158 break; 132 break;
159
160 pos = next_domain->p_link.next; 133 pos = next_domain->p_link.next;
161 } 134 }
162 135
@@ -166,18 +139,24 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
166 * immediately to the current domain if the interrupt has been 139 * immediately to the current domain if the interrupt has been
167 * marked as 'sticky'. This search does not go beyond the 140 * marked as 'sticky'. This search does not go beyond the
168 * current domain in the pipeline. We also enforce the 141 * current domain in the pipeline. We also enforce the
169 * additional root stage lock (blackfin-specific). */ 142 * additional root stage lock (blackfin-specific).
143 */
144 if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status))
145 s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status);
170 146
171 if (test_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags)) 147 /*
172 s = __test_and_set_bit(IPIPE_STALL_FLAG, 148 * If the interrupt preempted the head domain, then do not
173 &ipipe_root_cpudom_var(status)); 149 * even try to walk the pipeline, unless an interrupt is
174finalize: 150 * pending for it.
151 */
152 if (test_bit(IPIPE_AHEAD_FLAG, &this_domain->flags) &&
153 ipipe_head_cpudom_var(irqpend_himask) == 0)
154 goto out;
175 155
176 __ipipe_walk_pipeline(head); 156 __ipipe_walk_pipeline(head);
177 157out:
178 if (!s) 158 if (!s)
179 __clear_bit(IPIPE_STALL_FLAG, 159 __clear_bit(IPIPE_STALL_FLAG, &p->status);
180 &ipipe_root_cpudom_var(status));
181} 160}
182 161
183int __ipipe_check_root(void) 162int __ipipe_check_root(void)
@@ -187,7 +166,7 @@ int __ipipe_check_root(void)
187 166
188void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq) 167void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
189{ 168{
190 struct irq_desc *desc = irq_desc + irq; 169 struct irq_desc *desc = irq_to_desc(irq);
191 int prio = desc->ic_prio; 170 int prio = desc->ic_prio;
192 171
193 desc->depth = 0; 172 desc->depth = 0;
@@ -199,7 +178,7 @@ EXPORT_SYMBOL(__ipipe_enable_irqdesc);
199 178
200void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq) 179void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
201{ 180{
202 struct irq_desc *desc = irq_desc + irq; 181 struct irq_desc *desc = irq_to_desc(irq);
203 int prio = desc->ic_prio; 182 int prio = desc->ic_prio;
204 183
205 if (ipd != &ipipe_root && 184 if (ipd != &ipipe_root &&
@@ -236,15 +215,18 @@ int __ipipe_syscall_root(struct pt_regs *regs)
236{ 215{
237 unsigned long flags; 216 unsigned long flags;
238 217
239 /* We need to run the IRQ tail hook whenever we don't 218 /*
219 * We need to run the IRQ tail hook whenever we don't
240 * propagate a syscall to higher domains, because we know that 220 * propagate a syscall to higher domains, because we know that
241 * important operations might be pending there (e.g. Xenomai 221 * important operations might be pending there (e.g. Xenomai
242 * deferred rescheduling). */ 222 * deferred rescheduling).
223 */
243 224
244 if (!__ipipe_syscall_watched_p(current, regs->orig_p0)) { 225 if (regs->orig_p0 < NR_syscalls) {
245 void (*hook)(void) = (void (*)(void))__ipipe_irq_tail_hook; 226 void (*hook)(void) = (void (*)(void))__ipipe_irq_tail_hook;
246 hook(); 227 hook();
247 return 0; 228 if ((current->flags & PF_EVNOTIFY) == 0)
229 return 0;
248 } 230 }
249 231
250 /* 232 /*
@@ -312,112 +294,46 @@ int ipipe_trigger_irq(unsigned irq)
312{ 294{
313 unsigned long flags; 295 unsigned long flags;
314 296
297#ifdef CONFIG_IPIPE_DEBUG
315 if (irq >= IPIPE_NR_IRQS || 298 if (irq >= IPIPE_NR_IRQS ||
316 (ipipe_virtual_irq_p(irq) 299 (ipipe_virtual_irq_p(irq)
317 && !test_bit(irq - IPIPE_VIRQ_BASE, &__ipipe_virtual_irq_map))) 300 && !test_bit(irq - IPIPE_VIRQ_BASE, &__ipipe_virtual_irq_map)))
318 return -EINVAL; 301 return -EINVAL;
302#endif
319 303
320 local_irq_save_hw(flags); 304 local_irq_save_hw(flags);
321
322 __ipipe_handle_irq(irq, NULL); 305 __ipipe_handle_irq(irq, NULL);
323
324 local_irq_restore_hw(flags); 306 local_irq_restore_hw(flags);
325 307
326 return 1; 308 return 1;
327} 309}
328 310
329/* Move Linux IRQ to threads. */ 311asmlinkage void __ipipe_sync_root(void)
330
331static int do_irqd(void *__desc)
332{ 312{
333 struct irq_desc *desc = __desc; 313 unsigned long flags;
334 unsigned irq = desc - irq_desc;
335 int thrprio = desc->thr_prio;
336 int thrmask = 1 << thrprio;
337 int cpu = smp_processor_id();
338 cpumask_t cpumask;
339
340 sigfillset(&current->blocked);
341 current->flags |= PF_NOFREEZE;
342 cpumask = cpumask_of_cpu(cpu);
343 set_cpus_allowed(current, cpumask);
344 ipipe_setscheduler_root(current, SCHED_FIFO, 50 + thrprio);
345
346 while (!kthread_should_stop()) {
347 local_irq_disable();
348 if (!(desc->status & IRQ_SCHEDULED)) {
349 set_current_state(TASK_INTERRUPTIBLE);
350resched:
351 local_irq_enable();
352 schedule();
353 local_irq_disable();
354 }
355 __set_current_state(TASK_RUNNING);
356 /*
357 * If higher priority interrupt servers are ready to
358 * run, reschedule immediately. We need this for the
359 * GPIO demux IRQ handler to unmask the interrupt line
360 * _last_, after all GPIO IRQs have run.
361 */
362 if (per_cpu(pending_irqthread_mask, cpu) & ~(thrmask|(thrmask-1)))
363 goto resched;
364 if (--per_cpu(pending_irq_count[thrprio], cpu) == 0)
365 per_cpu(pending_irqthread_mask, cpu) &= ~thrmask;
366 desc->status &= ~IRQ_SCHEDULED;
367 desc->thr_handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs));
368 local_irq_enable();
369 }
370 __set_current_state(TASK_RUNNING);
371 return 0;
372}
373 314
374static void kick_irqd(unsigned irq, void *cookie) 315 BUG_ON(irqs_disabled());
375{
376 struct irq_desc *desc = irq_desc + irq;
377 int thrprio = desc->thr_prio;
378 int thrmask = 1 << thrprio;
379 int cpu = smp_processor_id();
380
381 if (!(desc->status & IRQ_SCHEDULED)) {
382 desc->status |= IRQ_SCHEDULED;
383 per_cpu(pending_irqthread_mask, cpu) |= thrmask;
384 ++per_cpu(pending_irq_count[thrprio], cpu);
385 wake_up_process(desc->thread);
386 }
387}
388 316
389int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc) 317 local_irq_save_hw(flags);
390{
391 if (desc->thread || !create_irq_threads)
392 return 0;
393
394 desc->thread = kthread_create(do_irqd, desc, "IRQ %d", irq);
395 if (desc->thread == NULL) {
396 printk(KERN_ERR "irqd: could not create IRQ thread %d!\n", irq);
397 return -ENOMEM;
398 }
399 318
400 wake_up_process(desc->thread); 319 clear_thread_flag(TIF_IRQ_SYNC);
401 320
402 desc->thr_handler = ipipe_root_domain->irqs[irq].handler; 321 if (ipipe_root_cpudom_var(irqpend_himask) != 0)
403 ipipe_root_domain->irqs[irq].handler = &kick_irqd; 322 __ipipe_sync_pipeline(IPIPE_IRQMASK_ANY);
404 323
405 return 0; 324 local_irq_restore_hw(flags);
406} 325}
407 326
408void __init ipipe_init_irq_threads(void) 327void ___ipipe_sync_pipeline(unsigned long syncmask)
409{ 328{
410 unsigned irq; 329 struct ipipe_domain *ipd = ipipe_current_domain;
411 struct irq_desc *desc;
412
413 create_irq_threads = 1;
414 330
415 for (irq = 0; irq < NR_IRQS; irq++) { 331 if (ipd == ipipe_root_domain) {
416 desc = irq_desc + irq; 332 if (test_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status)))
417 if (desc->action != NULL || 333 return;
418 (desc->status & IRQ_NOREQUEST) != 0)
419 ipipe_start_irq_thread(irq, desc);
420 } 334 }
335
336 __ipipe_sync_stage(syncmask);
421} 337}
422 338
423EXPORT_SYMBOL(show_stack); 339EXPORT_SYMBOL(show_stack);
diff --git a/arch/blackfin/kernel/irqchip.c b/arch/blackfin/kernel/irqchip.c
index 75724eee6494..7fd126564846 100644
--- a/arch/blackfin/kernel/irqchip.c
+++ b/arch/blackfin/kernel/irqchip.c
@@ -144,11 +144,15 @@ asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
144#endif 144#endif
145 generic_handle_irq(irq); 145 generic_handle_irq(irq);
146 146
147#ifndef CONFIG_IPIPE /* Useless and bugous over the I-pipe: IRQs are threaded. */ 147#ifndef CONFIG_IPIPE
148 /* If we're the only interrupt running (ignoring IRQ15 which is for 148 /*
149 syscalls), lower our priority to IRQ14 so that softirqs run at 149 * If we're the only interrupt running (ignoring IRQ15 which
150 that level. If there's another, lower-level interrupt, irq_exit 150 * is for syscalls), lower our priority to IRQ14 so that
151 will defer softirqs to that. */ 151 * softirqs run at that level. If there's another,
152 * lower-level interrupt, irq_exit will defer softirqs to
153 * that. If the interrupt pipeline is enabled, we are already
154 * running at IRQ14 priority, so we don't need this code.
155 */
152 CSYNC(); 156 CSYNC();
153 pending = bfin_read_IPEND() & ~0x8000; 157 pending = bfin_read_IPEND() & ~0x8000;
154 other_ints = pending & (pending - 1); 158 other_ints = pending & (pending - 1);
diff --git a/arch/blackfin/kernel/kgdb_test.c b/arch/blackfin/kernel/kgdb_test.c
index 3dba9c17304a..dbcf3e45cb0b 100644
--- a/arch/blackfin/kernel/kgdb_test.c
+++ b/arch/blackfin/kernel/kgdb_test.c
@@ -20,6 +20,7 @@
20static char cmdline[256]; 20static char cmdline[256];
21static unsigned long len; 21static unsigned long len;
22 22
23#ifndef CONFIG_SMP
23static int num1 __attribute__((l1_data)); 24static int num1 __attribute__((l1_data));
24 25
25void kgdb_l1_test(void) __attribute__((l1_text)); 26void kgdb_l1_test(void) __attribute__((l1_text));
@@ -32,6 +33,8 @@ void kgdb_l1_test(void)
32 printk(KERN_ALERT "L1(after change) : data variable addr = 0x%p, data value is %d\n", &num1, num1); 33 printk(KERN_ALERT "L1(after change) : data variable addr = 0x%p, data value is %d\n", &num1, num1);
33 return ; 34 return ;
34} 35}
36#endif
37
35#if L2_LENGTH 38#if L2_LENGTH
36 39
37static int num2 __attribute__((l2)); 40static int num2 __attribute__((l2));
@@ -59,10 +62,12 @@ int kgdb_test(char *name, int len, int count, int z)
59static int test_proc_output(char *buf) 62static int test_proc_output(char *buf)
60{ 63{
61 kgdb_test("hello world!", 12, 0x55, 0x10); 64 kgdb_test("hello world!", 12, 0x55, 0x10);
65#ifndef CONFIG_SMP
62 kgdb_l1_test(); 66 kgdb_l1_test();
63 #if L2_LENGTH 67#endif
68#if L2_LENGTH
64 kgdb_l2_test(); 69 kgdb_l2_test();
65 #endif 70#endif
66 71
67 return 0; 72 return 0;
68} 73}
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c
index 594e325b40e4..d76618db50df 100644
--- a/arch/blackfin/kernel/ptrace.c
+++ b/arch/blackfin/kernel/ptrace.c
@@ -45,6 +45,7 @@
45#include <asm/asm-offsets.h> 45#include <asm/asm-offsets.h>
46#include <asm/dma.h> 46#include <asm/dma.h>
47#include <asm/fixed_code.h> 47#include <asm/fixed_code.h>
48#include <asm/cacheflush.h>
48#include <asm/mem_map.h> 49#include <asm/mem_map.h>
49 50
50#define TEXT_OFFSET 0 51#define TEXT_OFFSET 0
@@ -240,7 +241,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
240 241
241 } else if (addr >= FIXED_CODE_START 242 } else if (addr >= FIXED_CODE_START
242 && addr + sizeof(tmp) <= FIXED_CODE_END) { 243 && addr + sizeof(tmp) <= FIXED_CODE_END) {
243 memcpy(&tmp, (const void *)(addr), sizeof(tmp)); 244 copy_from_user_page(0, 0, 0, &tmp, (const void *)(addr), sizeof(tmp));
244 copied = sizeof(tmp); 245 copied = sizeof(tmp);
245 246
246 } else 247 } else
@@ -320,7 +321,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
320 321
321 } else if (addr >= FIXED_CODE_START 322 } else if (addr >= FIXED_CODE_START
322 && addr + sizeof(data) <= FIXED_CODE_END) { 323 && addr + sizeof(data) <= FIXED_CODE_END) {
323 memcpy((void *)(addr), &data, sizeof(data)); 324 copy_to_user_page(0, 0, 0, (void *)(addr), &data, sizeof(data));
324 copied = sizeof(data); 325 copied = sizeof(data);
325 326
326 } else 327 } else
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index e5c116230800..a58687bdee6a 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -889,6 +889,10 @@ void __init setup_arch(char **cmdline_p)
889 CPU, bfin_revid()); 889 CPU, bfin_revid());
890 } 890 }
891 891
892 /* We can't run on BF548-0.1 due to ANOMALY 05000448 */
893 if (bfin_cpuid() == 0x27de && bfin_revid() == 1)
894 panic("You can't run on this processor due to 05000448\n");
895
892 printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n"); 896 printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
893 897
894 printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n", 898 printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
@@ -1141,12 +1145,12 @@ static int show_cpuinfo(struct seq_file *m, void *v)
1141 icache_size = 0; 1145 icache_size = 0;
1142 1146
1143 seq_printf(m, "cache size\t: %d KB(L1 icache) " 1147 seq_printf(m, "cache size\t: %d KB(L1 icache) "
1144 "%d KB(L1 dcache-%s) %d KB(L2 cache)\n", 1148 "%d KB(L1 dcache%s) %d KB(L2 cache)\n",
1145 icache_size, dcache_size, 1149 icache_size, dcache_size,
1146#if defined CONFIG_BFIN_WB 1150#if defined CONFIG_BFIN_WB
1147 "wb" 1151 "-wb"
1148#elif defined CONFIG_BFIN_WT 1152#elif defined CONFIG_BFIN_WT
1149 "wt" 1153 "-wt"
1150#endif 1154#endif
1151 "", 0); 1155 "", 0);
1152 1156
diff --git a/arch/blackfin/kernel/time.c b/arch/blackfin/kernel/time.c
index 172b4c588467..1bbacfbd4c5d 100644
--- a/arch/blackfin/kernel/time.c
+++ b/arch/blackfin/kernel/time.c
@@ -134,7 +134,10 @@ irqreturn_t timer_interrupt(int irq, void *dummy)
134 134
135 write_seqlock(&xtime_lock); 135 write_seqlock(&xtime_lock);
136#if defined(CONFIG_TICK_SOURCE_SYSTMR0) && !defined(CONFIG_IPIPE) 136#if defined(CONFIG_TICK_SOURCE_SYSTMR0) && !defined(CONFIG_IPIPE)
137/* FIXME: Here TIMIL0 is not set when IPIPE enabled, why? */ 137 /*
138 * TIMIL0 is latched in __ipipe_grab_irq() when the I-Pipe is
139 * enabled.
140 */
138 if (get_gptimer_status(0) & TIMER_STATUS_TIMIL0) { 141 if (get_gptimer_status(0) & TIMER_STATUS_TIMIL0) {
139#endif 142#endif
140 do_timer(1); 143 do_timer(1);
diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c
index 0e175342112e..41f2eacfef20 100644
--- a/arch/blackfin/mach-bf518/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf518/boards/ezbrd.c
@@ -113,7 +113,6 @@ static struct platform_device bfin_mac_device = {
113 .name = "bfin_mac", 113 .name = "bfin_mac",
114 .dev.platform_data = &bfin_mii_bus, 114 .dev.platform_data = &bfin_mii_bus,
115}; 115};
116#endif
117 116
118#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) 117#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
119static struct dsa_platform_data ksz8893m_switch_data = { 118static struct dsa_platform_data ksz8893m_switch_data = {
@@ -132,6 +131,7 @@ static struct platform_device ksz8893m_switch_device = {
132 .dev.platform_data = &ksz8893m_switch_data, 131 .dev.platform_data = &ksz8893m_switch_data,
133}; 132};
134#endif 133#endif
134#endif
135 135
136#if defined(CONFIG_MTD_M25P80) \ 136#if defined(CONFIG_MTD_M25P80) \
137 || defined(CONFIG_MTD_M25P80_MODULE) 137 || defined(CONFIG_MTD_M25P80_MODULE)
@@ -171,6 +171,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
171}; 171};
172#endif 172#endif
173 173
174#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
174#if defined(CONFIG_NET_DSA_KSZ8893M) \ 175#if defined(CONFIG_NET_DSA_KSZ8893M) \
175 || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) 176 || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
176/* SPI SWITCH CHIP */ 177/* SPI SWITCH CHIP */
@@ -179,10 +180,11 @@ static struct bfin5xx_spi_chip spi_switch_info = {
179 .bits_per_word = 8, 180 .bits_per_word = 8,
180}; 181};
181#endif 182#endif
183#endif
182 184
183#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 185#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
184static struct bfin5xx_spi_chip spi_mmc_chip_info = { 186static struct bfin5xx_spi_chip mmc_spi_chip_info = {
185 .enable_dma = 1, 187 .enable_dma = 0,
186 .bits_per_word = 8, 188 .bits_per_word = 8,
187}; 189};
188#endif 190#endif
@@ -259,6 +261,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
259 }, 261 },
260#endif 262#endif
261 263
264#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
262#if defined(CONFIG_NET_DSA_KSZ8893M) \ 265#if defined(CONFIG_NET_DSA_KSZ8893M) \
263 || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) 266 || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
264 { 267 {
@@ -271,24 +274,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
271 .mode = SPI_MODE_3, 274 .mode = SPI_MODE_3,
272 }, 275 },
273#endif 276#endif
277#endif
274 278
275#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 279#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
276 { 280 {
277 .modalias = "spi_mmc_dummy", 281 .modalias = "mmc_spi",
278 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 282 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
279 .bus_num = 0, 283 .bus_num = 0,
280 .chip_select = 0, 284 .chip_select = 5,
281 .platform_data = NULL, 285 .controller_data = &mmc_spi_chip_info,
282 .controller_data = &spi_mmc_chip_info,
283 .mode = SPI_MODE_3,
284 },
285 {
286 .modalias = "spi_mmc",
287 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
288 .bus_num = 0,
289 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
290 .platform_data = NULL,
291 .controller_data = &spi_mmc_chip_info,
292 .mode = SPI_MODE_3, 286 .mode = SPI_MODE_3,
293 }, 287 },
294#endif 288#endif
@@ -630,11 +624,10 @@ static struct platform_device *stamp_devices[] __initdata = {
630#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 624#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
631 &bfin_mii_bus, 625 &bfin_mii_bus,
632 &bfin_mac_device, 626 &bfin_mac_device,
633#endif
634
635#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) 627#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
636 &ksz8893m_switch_device, 628 &ksz8893m_switch_device,
637#endif 629#endif
630#endif
638 631
639#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 632#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
640 &bfin_spi0_device, 633 &bfin_spi0_device,
diff --git a/arch/blackfin/mach-bf518/include/mach/anomaly.h b/arch/blackfin/mach-bf518/include/mach/anomaly.h
index e5b4bef0edae..c847bb101076 100644
--- a/arch/blackfin/mach-bf518/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf518/include/mach/anomaly.h
@@ -2,12 +2,12 @@
2 * File: include/asm-blackfin/mach-bf518/anomaly.h 2 * File: include/asm-blackfin/mach-bf518/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2008 Analog Devices Inc. 5 * Copyright (C) 2004-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
9/* This file shoule be up to date with: 9/* This file shoule be up to date with:
10 * - ???? 10 * - Revision B, 02/03/2009; ADSP-BF512/BF514/BF516/BF518 Blackfin Processor Anomaly List
11 */ 11 */
12 12
13#ifndef _MACH_ANOMALY_H_ 13#ifndef _MACH_ANOMALY_H_
@@ -19,6 +19,8 @@
19#define ANOMALY_05000122 (1) 19#define ANOMALY_05000122 (1)
20/* False Hardware Error from an Access in the Shadow of a Conditional Branch */ 20/* False Hardware Error from an Access in the Shadow of a Conditional Branch */
21#define ANOMALY_05000245 (1) 21#define ANOMALY_05000245 (1)
22/* Incorrect Timer Pulse Width in Single-Shot PWM_OUT Mode with External Clock */
23#define ANOMALY_05000254 (1)
22/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ 24/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
23#define ANOMALY_05000265 (1) 25#define ANOMALY_05000265 (1)
24/* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ 26/* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */
@@ -53,6 +55,12 @@
53#define ANOMALY_05000443 (1) 55#define ANOMALY_05000443 (1)
54/* Incorrect L1 Instruction Bank B Memory Map Location */ 56/* Incorrect L1 Instruction Bank B Memory Map Location */
55#define ANOMALY_05000444 (1) 57#define ANOMALY_05000444 (1)
58/* Incorrect Default Hysteresis Setting for RESET, NMI, and BMODE Signals */
59#define ANOMALY_05000452 (1)
60/* PWM_TRIPB Signal Not Available on PG10 */
61#define ANOMALY_05000453 (1)
62/* PPI_FS3 is Driven One Half Cycle Later Than PPI Data */
63#define ANOMALY_05000455 (1)
56 64
57/* Anomalies that don't exist on this proc */ 65/* Anomalies that don't exist on this proc */
58#define ANOMALY_05000125 (0) 66#define ANOMALY_05000125 (0)
@@ -65,15 +73,20 @@
65#define ANOMALY_05000263 (0) 73#define ANOMALY_05000263 (0)
66#define ANOMALY_05000266 (0) 74#define ANOMALY_05000266 (0)
67#define ANOMALY_05000273 (0) 75#define ANOMALY_05000273 (0)
76#define ANOMALY_05000278 (0)
68#define ANOMALY_05000285 (0) 77#define ANOMALY_05000285 (0)
78#define ANOMALY_05000305 (0)
69#define ANOMALY_05000307 (0) 79#define ANOMALY_05000307 (0)
70#define ANOMALY_05000311 (0) 80#define ANOMALY_05000311 (0)
71#define ANOMALY_05000312 (0) 81#define ANOMALY_05000312 (0)
72#define ANOMALY_05000323 (0) 82#define ANOMALY_05000323 (0)
73#define ANOMALY_05000353 (0) 83#define ANOMALY_05000353 (0)
74#define ANOMALY_05000363 (0) 84#define ANOMALY_05000363 (0)
85#define ANOMALY_05000380 (0)
75#define ANOMALY_05000386 (0) 86#define ANOMALY_05000386 (0)
76#define ANOMALY_05000412 (0) 87#define ANOMALY_05000412 (0)
77#define ANOMALY_05000432 (0) 88#define ANOMALY_05000432 (0)
89#define ANOMALY_05000447 (0)
90#define ANOMALY_05000448 (0)
78 91
79#endif 92#endif
diff --git a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h
index b50a63b975a2..e21c1c3e4ec7 100644
--- a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h
@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
144 CH_UART0_TX, 144 CH_UART0_TX,
145 CH_UART0_RX, 145 CH_UART0_RX,
146#endif 146#endif
147#ifdef CONFIG_BFIN_UART0_CTSRTS 147#ifdef CONFIG_SERIAL_BFIN_CTSRTS
148 CONFIG_UART0_CTS_PIN, 148 CONFIG_UART0_CTS_PIN,
149 CONFIG_UART0_RTS_PIN, 149 CONFIG_UART0_RTS_PIN,
150#endif 150#endif
@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
158 CH_UART1_TX, 158 CH_UART1_TX,
159 CH_UART1_RX, 159 CH_UART1_RX,
160#endif 160#endif
161#ifdef CONFIG_BFIN_UART1_CTSRTS 161#ifdef CONFIG_SERIAL_BFIN_CTSRTS
162 CONFIG_UART1_CTS_PIN, 162 CONFIG_UART1_CTS_PIN,
163 CONFIG_UART1_RTS_PIN, 163 CONFIG_UART1_RTS_PIN,
164#endif 164#endif
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c
index 856c097b5317..48e69eecdba4 100644
--- a/arch/blackfin/mach-bf527/boards/cm_bf527.c
+++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c
@@ -487,9 +487,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
487}; 487};
488#endif 488#endif
489 489
490#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 490#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
491static struct bfin5xx_spi_chip spi_mmc_chip_info = { 491static struct bfin5xx_spi_chip mmc_spi_chip_info = {
492 .enable_dma = 1, 492 .enable_dma = 0,
493 .bits_per_word = 8, 493 .bits_per_word = 8,
494}; 494};
495#endif 495#endif
@@ -585,23 +585,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
585 .controller_data = &ad9960_spi_chip_info, 585 .controller_data = &ad9960_spi_chip_info,
586 }, 586 },
587#endif 587#endif
588#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 588#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
589 { 589 {
590 .modalias = "spi_mmc_dummy", 590 .modalias = "mmc_spi",
591 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 591 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
592 .bus_num = 0,
593 .chip_select = 0,
594 .platform_data = NULL,
595 .controller_data = &spi_mmc_chip_info,
596 .mode = SPI_MODE_3,
597 },
598 {
599 .modalias = "spi_mmc",
600 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
601 .bus_num = 0, 592 .bus_num = 0,
602 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 593 .chip_select = 5,
603 .platform_data = NULL, 594 .controller_data = &mmc_spi_chip_info,
604 .controller_data = &spi_mmc_chip_info,
605 .mode = SPI_MODE_3, 595 .mode = SPI_MODE_3,
606 }, 596 },
607#endif 597#endif
diff --git a/arch/blackfin/mach-bf527/boards/ezbrd.c b/arch/blackfin/mach-bf527/boards/ezbrd.c
index 83606fcdde27..7fe480e4ebe8 100644
--- a/arch/blackfin/mach-bf527/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf527/boards/ezbrd.c
@@ -256,9 +256,9 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
256}; 256};
257#endif 257#endif
258 258
259#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 259#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
260static struct bfin5xx_spi_chip spi_mmc_chip_info = { 260static struct bfin5xx_spi_chip mmc_spi_chip_info = {
261 .enable_dma = 1, 261 .enable_dma = 0,
262 .bits_per_word = 8, 262 .bits_per_word = 8,
263}; 263};
264#endif 264#endif
@@ -366,23 +366,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
366 }, 366 },
367#endif 367#endif
368 368
369#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 369#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
370 { 370 {
371 .modalias = "spi_mmc_dummy", 371 .modalias = "mmc_spi",
372 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 372 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
373 .bus_num = 0, 373 .bus_num = 0,
374 .chip_select = 0, 374 .chip_select = 5,
375 .platform_data = NULL, 375 .controller_data = &mmc_spi_chip_info,
376 .controller_data = &spi_mmc_chip_info,
377 .mode = SPI_MODE_3,
378 },
379 {
380 .modalias = "spi_mmc",
381 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
382 .bus_num = 0,
383 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
384 .platform_data = NULL,
385 .controller_data = &spi_mmc_chip_info,
386 .mode = SPI_MODE_3, 376 .mode = SPI_MODE_3,
387 }, 377 },
388#endif 378#endif
diff --git a/arch/blackfin/mach-bf527/include/mach/anomaly.h b/arch/blackfin/mach-bf527/include/mach/anomaly.h
index 035e8d835058..df6808d8a6ef 100644
--- a/arch/blackfin/mach-bf527/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf527/include/mach/anomaly.h
@@ -2,7 +2,7 @@
2 * File: include/asm-blackfin/mach-bf527/anomaly.h 2 * File: include/asm-blackfin/mach-bf527/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2008 Analog Devices Inc. 5 * Copyright (C) 2004-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
@@ -167,12 +167,16 @@
167#define ANOMALY_05000263 (0) 167#define ANOMALY_05000263 (0)
168#define ANOMALY_05000266 (0) 168#define ANOMALY_05000266 (0)
169#define ANOMALY_05000273 (0) 169#define ANOMALY_05000273 (0)
170#define ANOMALY_05000278 (0)
170#define ANOMALY_05000285 (0) 171#define ANOMALY_05000285 (0)
172#define ANOMALY_05000305 (0)
171#define ANOMALY_05000307 (0) 173#define ANOMALY_05000307 (0)
172#define ANOMALY_05000311 (0) 174#define ANOMALY_05000311 (0)
173#define ANOMALY_05000312 (0) 175#define ANOMALY_05000312 (0)
174#define ANOMALY_05000323 (0) 176#define ANOMALY_05000323 (0)
175#define ANOMALY_05000363 (0) 177#define ANOMALY_05000363 (0)
176#define ANOMALY_05000412 (0) 178#define ANOMALY_05000412 (0)
179#define ANOMALY_05000447 (0)
180#define ANOMALY_05000448 (0)
177 181
178#endif 182#endif
diff --git a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
index 75722d6008b0..e8c41fd842b5 100644
--- a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
144 CH_UART0_TX, 144 CH_UART0_TX,
145 CH_UART0_RX, 145 CH_UART0_RX,
146#endif 146#endif
147#ifdef CONFIG_BFIN_UART0_CTSRTS 147#ifdef CONFIG_SERIAL_BFIN_CTSRTS
148 CONFIG_UART0_CTS_PIN, 148 CONFIG_UART0_CTS_PIN,
149 CONFIG_UART0_RTS_PIN, 149 CONFIG_UART0_RTS_PIN,
150#endif 150#endif
@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
158 CH_UART1_TX, 158 CH_UART1_TX,
159 CH_UART1_RX, 159 CH_UART1_RX,
160#endif 160#endif
161#ifdef CONFIG_BFIN_UART1_CTSRTS 161#ifdef CONFIG_SERIAL_BFIN_CTSRTS
162 CONFIG_UART1_CTS_PIN, 162 CONFIG_UART1_CTS_PIN,
163 CONFIG_UART1_RTS_PIN, 163 CONFIG_UART1_RTS_PIN,
164#endif 164#endif
diff --git a/arch/blackfin/mach-bf533/boards/Kconfig b/arch/blackfin/mach-bf533/boards/Kconfig
index 308c98dc5aba..8d8b3e7321e6 100644
--- a/arch/blackfin/mach-bf533/boards/Kconfig
+++ b/arch/blackfin/mach-bf533/boards/Kconfig
@@ -38,9 +38,4 @@ config BFIN532_IP0X
38 help 38 help
39 Core support for IP04/IP04 open hardware IP-PBX. 39 Core support for IP04/IP04 open hardware IP-PBX.
40 40
41config GENERIC_BF533_BOARD
42 bool "Generic"
43 help
44 Generic or Custom board support.
45
46endchoice 41endchoice
diff --git a/arch/blackfin/mach-bf533/boards/Makefile b/arch/blackfin/mach-bf533/boards/Makefile
index 9afbe72b484f..ff1e832f80d2 100644
--- a/arch/blackfin/mach-bf533/boards/Makefile
+++ b/arch/blackfin/mach-bf533/boards/Makefile
@@ -2,7 +2,6 @@
2# arch/blackfin/mach-bf533/boards/Makefile 2# arch/blackfin/mach-bf533/boards/Makefile
3# 3#
4 4
5obj-$(CONFIG_GENERIC_BF533_BOARD) += generic_board.o
6obj-$(CONFIG_BFIN533_STAMP) += stamp.o 5obj-$(CONFIG_BFIN533_STAMP) += stamp.o
7obj-$(CONFIG_BFIN532_IP0X) += ip0x.o 6obj-$(CONFIG_BFIN532_IP0X) += ip0x.o
8obj-$(CONFIG_BFIN533_EZKIT) += ezkit.o 7obj-$(CONFIG_BFIN533_EZKIT) += ezkit.o
diff --git a/arch/blackfin/mach-bf533/boards/blackstamp.c b/arch/blackfin/mach-bf533/boards/blackstamp.c
index 015c18f85e7f..0765872a8ada 100644
--- a/arch/blackfin/mach-bf533/boards/blackstamp.c
+++ b/arch/blackfin/mach-bf533/boards/blackstamp.c
@@ -101,9 +101,9 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
101}; 101};
102#endif 102#endif
103 103
104#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 104#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
105static struct bfin5xx_spi_chip spi_mmc_chip_info = { 105static struct bfin5xx_spi_chip mmc_spi_chip_info = {
106 .enable_dma = 1, 106 .enable_dma = 0,
107 .bits_per_word = 8, 107 .bits_per_word = 8,
108}; 108};
109#endif 109#endif
@@ -129,23 +129,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
129 }, 129 },
130#endif 130#endif
131 131
132#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 132#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
133 {
134 .modalias = "spi_mmc_dummy",
135 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
136 .bus_num = 0,
137 .chip_select = 0,
138 .platform_data = NULL,
139 .controller_data = &spi_mmc_chip_info,
140 .mode = SPI_MODE_3,
141 },
142 { 133 {
143 .modalias = "spi_mmc", 134 .modalias = "mmc_spi",
144 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ 135 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
145 .bus_num = 0, 136 .bus_num = 0,
146 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 137 .chip_select = 5,
147 .platform_data = NULL, 138 .controller_data = &mmc_spi_chip_info,
148 .controller_data = &spi_mmc_chip_info,
149 .mode = SPI_MODE_3, 139 .mode = SPI_MODE_3,
150 }, 140 },
151#endif 141#endif
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c
index e7061c7e8c42..e8974878d8c2 100644
--- a/arch/blackfin/mach-bf533/boards/cm_bf533.c
+++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c
@@ -96,9 +96,9 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
96}; 96};
97#endif 97#endif
98 98
99#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 99#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
100static struct bfin5xx_spi_chip spi_mmc_chip_info = { 100static struct bfin5xx_spi_chip mmc_spi_chip_info = {
101 .enable_dma = 1, 101 .enable_dma = 0,
102 .bits_per_word = 8, 102 .bits_per_word = 8,
103}; 103};
104#endif 104#endif
@@ -138,23 +138,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
138 }, 138 },
139#endif 139#endif
140 140
141#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 141#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
142 {
143 .modalias = "spi_mmc_dummy",
144 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
145 .bus_num = 0,
146 .chip_select = 0,
147 .platform_data = NULL,
148 .controller_data = &spi_mmc_chip_info,
149 .mode = SPI_MODE_3,
150 },
151 { 142 {
152 .modalias = "spi_mmc", 143 .modalias = "mmc_spi",
153 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 144 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
154 .bus_num = 0, 145 .bus_num = 0,
155 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 146 .chip_select = 5,
156 .platform_data = NULL, 147 .controller_data = &mmc_spi_chip_info,
157 .controller_data = &spi_mmc_chip_info,
158 .mode = SPI_MODE_3, 148 .mode = SPI_MODE_3,
159 }, 149 },
160#endif 150#endif
diff --git a/arch/blackfin/mach-bf533/boards/generic_board.c b/arch/blackfin/mach-bf533/boards/generic_board.c
deleted file mode 100644
index 986eeec53b1f..000000000000
--- a/arch/blackfin/mach-bf533/boards/generic_board.c
+++ /dev/null
@@ -1,126 +0,0 @@
1/*
2 * File: arch/blackfin/mach-bf533/generic_board.c
3 * Based on: arch/blackfin/mach-bf533/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created: 2005
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/irq.h>
34
35/*
36 * Name the Board for the /proc/cpuinfo
37 */
38const char bfin_board_name[] = "UNKNOWN BOARD";
39
40#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
41static struct platform_device rtc_device = {
42 .name = "rtc-bfin",
43 .id = -1,
44};
45#endif
46
47/*
48 * Driver needs to know address, irq and flag pin.
49 */
50#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
51static struct resource smc91x_resources[] = {
52 {
53 .start = 0x20300300,
54 .end = 0x20300300 + 16,
55 .flags = IORESOURCE_MEM,
56 }, {
57 .start = IRQ_PROG_INTB,
58 .end = IRQ_PROG_INTB,
59 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
60 }, {
61 .start = IRQ_PF7,
62 .end = IRQ_PF7,
63 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
64 },
65};
66
67static struct platform_device smc91x_device = {
68 .name = "smc91x",
69 .id = 0,
70 .num_resources = ARRAY_SIZE(smc91x_resources),
71 .resource = smc91x_resources,
72};
73#endif
74
75#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
76#ifdef CONFIG_BFIN_SIR0
77static struct resource bfin_sir0_resources[] = {
78 {
79 .start = 0xFFC00400,
80 .end = 0xFFC004FF,
81 .flags = IORESOURCE_MEM,
82 },
83 {
84 .start = IRQ_UART0_RX,
85 .end = IRQ_UART0_RX+1,
86 .flags = IORESOURCE_IRQ,
87 },
88 {
89 .start = CH_UART0_RX,
90 .end = CH_UART0_RX+1,
91 .flags = IORESOURCE_DMA,
92 },
93};
94
95static struct platform_device bfin_sir0_device = {
96 .name = "bfin_sir",
97 .id = 0,
98 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
99 .resource = bfin_sir0_resources,
100};
101#endif
102#endif
103
104static struct platform_device *generic_board_devices[] __initdata = {
105#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
106 &rtc_device,
107#endif
108
109#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
110 &smc91x_device,
111#endif
112
113#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
114#ifdef CONFIG_BFIN_SIR0
115 &bfin_sir0_device,
116#endif
117#endif
118};
119
120static int __init generic_board_init(void)
121{
122 printk(KERN_INFO "%s(): registering device resources\n", __func__);
123 return platform_add_devices(generic_board_devices, ARRAY_SIZE(generic_board_devices));
124}
125
126arch_initcall(generic_board_init);
diff --git a/arch/blackfin/mach-bf533/boards/ip0x.c b/arch/blackfin/mach-bf533/boards/ip0x.c
index e30b1b7d1442..f19b63378b12 100644
--- a/arch/blackfin/mach-bf533/boards/ip0x.c
+++ b/arch/blackfin/mach-bf533/boards/ip0x.c
@@ -127,8 +127,8 @@ static struct platform_device dm9000_device2 = {
127#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 127#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
128/* all SPI peripherals info goes here */ 128/* all SPI peripherals info goes here */
129 129
130#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 130#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
131static struct bfin5xx_spi_chip spi_mmc_chip_info = { 131static struct bfin5xx_spi_chip mmc_spi_chip_info = {
132/* 132/*
133 * CPOL (Clock Polarity) 133 * CPOL (Clock Polarity)
134 * 0 - Active high SCK 134 * 0 - Active high SCK
@@ -152,14 +152,13 @@ static struct bfin5xx_spi_chip spi_mmc_chip_info = {
152/* Notice: for blackfin, the speed_hz is the value of register 152/* Notice: for blackfin, the speed_hz is the value of register
153 * SPI_BAUD, not the real baudrate */ 153 * SPI_BAUD, not the real baudrate */
154static struct spi_board_info bfin_spi_board_info[] __initdata = { 154static struct spi_board_info bfin_spi_board_info[] __initdata = {
155#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 155#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
156 { 156 {
157 .modalias = "spi_mmc", 157 .modalias = "mmc_spi",
158 .max_speed_hz = 2, 158 .max_speed_hz = 2,
159 .bus_num = 1, 159 .bus_num = 1,
160 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 160 .chip_select = 5,
161 .platform_data = NULL, 161 .controller_data = &mmc_spi_chip_info,
162 .controller_data = &spi_mmc_chip_info,
163 }, 162 },
164#endif 163#endif
165}; 164};
diff --git a/arch/blackfin/mach-bf533/include/mach/anomaly.h b/arch/blackfin/mach-bf533/include/mach/anomaly.h
index 0d3a03429fb9..1cf893e2e55b 100644
--- a/arch/blackfin/mach-bf533/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf533/include/mach/anomaly.h
@@ -2,7 +2,7 @@
2 * File: include/asm-blackfin/mach-bf533/anomaly.h 2 * File: include/asm-blackfin/mach-bf533/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2008 Analog Devices Inc. 5 * Copyright (C) 2004-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
@@ -160,7 +160,7 @@
160#define ANOMALY_05000301 (__SILICON_REVISION__ < 6) 160#define ANOMALY_05000301 (__SILICON_REVISION__ < 6)
161/* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */ 161/* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */
162#define ANOMALY_05000302 (__SILICON_REVISION__ < 5) 162#define ANOMALY_05000302 (__SILICON_REVISION__ < 5)
163/* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */ 163/* SPORT_HYS Bit in PLL_CTL Register Is Not Functional */
164#define ANOMALY_05000305 (__SILICON_REVISION__ < 5) 164#define ANOMALY_05000305 (__SILICON_REVISION__ < 5)
165/* New Feature: Additional PPI Frame Sync Sampling Options (Not Available On Older Silicon) */ 165/* New Feature: Additional PPI Frame Sync Sampling Options (Not Available On Older Silicon) */
166#define ANOMALY_05000306 (__SILICON_REVISION__ < 5) 166#define ANOMALY_05000306 (__SILICON_REVISION__ < 5)
@@ -278,9 +278,12 @@
278#define ANOMALY_05000266 (0) 278#define ANOMALY_05000266 (0)
279#define ANOMALY_05000323 (0) 279#define ANOMALY_05000323 (0)
280#define ANOMALY_05000353 (1) 280#define ANOMALY_05000353 (1)
281#define ANOMALY_05000380 (0)
281#define ANOMALY_05000386 (1) 282#define ANOMALY_05000386 (1)
282#define ANOMALY_05000412 (0) 283#define ANOMALY_05000412 (0)
283#define ANOMALY_05000432 (0) 284#define ANOMALY_05000432 (0)
284#define ANOMALY_05000435 (0) 285#define ANOMALY_05000435 (0)
286#define ANOMALY_05000447 (0)
287#define ANOMALY_05000448 (0)
285 288
286#endif 289#endif
diff --git a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
index f3d9e495230c..5f517f53b0fd 100644
--- a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
@@ -134,7 +134,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
134 CH_UART_TX, 134 CH_UART_TX,
135 CH_UART_RX, 135 CH_UART_RX,
136#endif 136#endif
137#ifdef CONFIG_BFIN_UART0_CTSRTS 137#ifdef CONFIG_SERIAL_BFIN_CTSRTS
138 CONFIG_UART0_CTS_PIN, 138 CONFIG_UART0_CTS_PIN,
139 CONFIG_UART0_RTS_PIN, 139 CONFIG_UART0_RTS_PIN,
140#endif 140#endif
diff --git a/arch/blackfin/mach-bf537/boards/Kconfig b/arch/blackfin/mach-bf537/boards/Kconfig
index 42a57b0acb29..77c59da87e85 100644
--- a/arch/blackfin/mach-bf537/boards/Kconfig
+++ b/arch/blackfin/mach-bf537/boards/Kconfig
@@ -33,9 +33,4 @@ config CAMSIG_MINOTAUR
33 help 33 help
34 Board supply package for CSP Minotaur 34 Board supply package for CSP Minotaur
35 35
36config GENERIC_BF537_BOARD
37 bool "Generic"
38 help
39 Generic or Custom board support.
40
41endchoice 36endchoice
diff --git a/arch/blackfin/mach-bf537/boards/Makefile b/arch/blackfin/mach-bf537/boards/Makefile
index 7168cc14afd8..68b98a7af6a6 100644
--- a/arch/blackfin/mach-bf537/boards/Makefile
+++ b/arch/blackfin/mach-bf537/boards/Makefile
@@ -2,7 +2,6 @@
2# arch/blackfin/mach-bf537/boards/Makefile 2# arch/blackfin/mach-bf537/boards/Makefile
3# 3#
4 4
5obj-$(CONFIG_GENERIC_BF537_BOARD) += generic_board.o
6obj-$(CONFIG_BFIN537_STAMP) += stamp.o 5obj-$(CONFIG_BFIN537_STAMP) += stamp.o
7obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o 6obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o
8obj-$(CONFIG_BFIN537_BLUETECHNIX_TCM) += tcm_bf537.o 7obj-$(CONFIG_BFIN537_BLUETECHNIX_TCM) += tcm_bf537.o
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c
index 9cd8fb2a30d3..41c75b9bfac0 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c
@@ -108,9 +108,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
108}; 108};
109#endif 109#endif
110 110
111#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 111#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
112static struct bfin5xx_spi_chip spi_mmc_chip_info = { 112static struct bfin5xx_spi_chip mmc_spi_chip_info = {
113 .enable_dma = 1, 113 .enable_dma = 0,
114 .bits_per_word = 8, 114 .bits_per_word = 8,
115}; 115};
116#endif 116#endif
@@ -160,23 +160,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
160 }, 160 },
161#endif 161#endif
162 162
163#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 163#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
164 {
165 .modalias = "spi_mmc_dummy",
166 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
167 .bus_num = 0,
168 .chip_select = 7,
169 .platform_data = NULL,
170 .controller_data = &spi_mmc_chip_info,
171 .mode = SPI_MODE_3,
172 },
173 { 164 {
174 .modalias = "spi_mmc", 165 .modalias = "mmc_spi",
175 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 166 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
176 .bus_num = 0, 167 .bus_num = 0,
177 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 168 .chip_select = 1,
178 .platform_data = NULL, 169 .controller_data = &mmc_spi_chip_info,
179 .controller_data = &spi_mmc_chip_info,
180 .mode = SPI_MODE_3, 170 .mode = SPI_MODE_3,
181 }, 171 },
182#endif 172#endif
diff --git a/arch/blackfin/mach-bf537/boards/generic_board.c b/arch/blackfin/mach-bf537/boards/generic_board.c
deleted file mode 100644
index da710fdc4569..000000000000
--- a/arch/blackfin/mach-bf537/boards/generic_board.c
+++ /dev/null
@@ -1,745 +0,0 @@
1/*
2 * File: arch/blackfin/mach-bf537/boards/generic_board.c
3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2008 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/etherdevice.h>
33#include <linux/platform_device.h>
34#include <linux/mtd/mtd.h>
35#include <linux/mtd/partitions.h>
36#include <linux/spi/spi.h>
37#include <linux/spi/flash.h>
38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
39#include <linux/usb/isp1362.h>
40#endif
41#include <linux/irq.h>
42#include <linux/interrupt.h>
43#include <linux/usb/sl811.h>
44#include <asm/dma.h>
45#include <asm/bfin5xx_spi.h>
46#include <asm/reboot.h>
47#include <asm/portmux.h>
48#include <linux/spi/ad7877.h>
49
50/*
51 * Name the Board for the /proc/cpuinfo
52 */
53const char bfin_board_name[] = "UNKNOWN BOARD";
54
55/*
56 * Driver needs to know address, irq and flag pin.
57 */
58
59#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
60#include <linux/usb/isp1760.h>
61static struct resource bfin_isp1760_resources[] = {
62 [0] = {
63 .start = 0x203C0000,
64 .end = 0x203C0000 + 0x000fffff,
65 .flags = IORESOURCE_MEM,
66 },
67 [1] = {
68 .start = IRQ_PF7,
69 .end = IRQ_PF7,
70 .flags = IORESOURCE_IRQ,
71 },
72};
73
74static struct isp1760_platform_data isp1760_priv = {
75 .is_isp1761 = 0,
76 .port1_disable = 0,
77 .bus_width_16 = 1,
78 .port1_otg = 0,
79 .analog_oc = 0,
80 .dack_polarity_high = 0,
81 .dreq_polarity_high = 0,
82};
83
84static struct platform_device bfin_isp1760_device = {
85 .name = "isp1760-hcd",
86 .id = 0,
87 .dev = {
88 .platform_data = &isp1760_priv,
89 },
90 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
91 .resource = bfin_isp1760_resources,
92};
93#endif
94
95#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
96static struct resource bfin_pcmcia_cf_resources[] = {
97 {
98 .start = 0x20310000, /* IO PORT */
99 .end = 0x20312000,
100 .flags = IORESOURCE_MEM,
101 }, {
102 .start = 0x20311000, /* Attribute Memory */
103 .end = 0x20311FFF,
104 .flags = IORESOURCE_MEM,
105 }, {
106 .start = IRQ_PF4,
107 .end = IRQ_PF4,
108 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
109 }, {
110 .start = 6, /* Card Detect PF6 */
111 .end = 6,
112 .flags = IORESOURCE_IRQ,
113 },
114};
115
116static struct platform_device bfin_pcmcia_cf_device = {
117 .name = "bfin_cf_pcmcia",
118 .id = -1,
119 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
120 .resource = bfin_pcmcia_cf_resources,
121};
122#endif
123
124#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
125static struct platform_device rtc_device = {
126 .name = "rtc-bfin",
127 .id = -1,
128};
129#endif
130
131#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
132static struct resource smc91x_resources[] = {
133 {
134 .name = "smc91x-regs",
135 .start = 0x20300300,
136 .end = 0x20300300 + 16,
137 .flags = IORESOURCE_MEM,
138 }, {
139
140 .start = IRQ_PF7,
141 .end = IRQ_PF7,
142 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
143 },
144};
145static struct platform_device smc91x_device = {
146 .name = "smc91x",
147 .id = 0,
148 .num_resources = ARRAY_SIZE(smc91x_resources),
149 .resource = smc91x_resources,
150};
151#endif
152
153#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
154static struct resource dm9000_resources[] = {
155 [0] = {
156 .start = 0x203FB800,
157 .end = 0x203FB800 + 1,
158 .flags = IORESOURCE_MEM,
159 },
160 [1] = {
161 .start = 0x203FB800 + 4,
162 .end = 0x203FB800 + 5,
163 .flags = IORESOURCE_MEM,
164 },
165 [2] = {
166 .start = IRQ_PF9,
167 .end = IRQ_PF9,
168 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
169 },
170};
171
172static struct platform_device dm9000_device = {
173 .name = "dm9000",
174 .id = -1,
175 .num_resources = ARRAY_SIZE(dm9000_resources),
176 .resource = dm9000_resources,
177};
178#endif
179
180#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
181static struct resource sl811_hcd_resources[] = {
182 {
183 .start = 0x20340000,
184 .end = 0x20340000,
185 .flags = IORESOURCE_MEM,
186 }, {
187 .start = 0x20340004,
188 .end = 0x20340004,
189 .flags = IORESOURCE_MEM,
190 }, {
191 .start = CONFIG_USB_SL811_BFIN_IRQ,
192 .end = CONFIG_USB_SL811_BFIN_IRQ,
193 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
194 },
195};
196
197#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
198void sl811_port_power(struct device *dev, int is_on)
199{
200 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
201 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
202
203}
204#endif
205
206static struct sl811_platform_data sl811_priv = {
207 .potpg = 10,
208 .power = 250, /* == 500mA */
209#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
210 .port_power = &sl811_port_power,
211#endif
212};
213
214static struct platform_device sl811_hcd_device = {
215 .name = "sl811-hcd",
216 .id = 0,
217 .dev = {
218 .platform_data = &sl811_priv,
219 },
220 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
221 .resource = sl811_hcd_resources,
222};
223#endif
224
225#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
226static struct resource isp1362_hcd_resources[] = {
227 {
228 .start = 0x20360000,
229 .end = 0x20360000,
230 .flags = IORESOURCE_MEM,
231 }, {
232 .start = 0x20360004,
233 .end = 0x20360004,
234 .flags = IORESOURCE_MEM,
235 }, {
236 .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
237 .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
238 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
239 },
240};
241
242static struct isp1362_platform_data isp1362_priv = {
243 .sel15Kres = 1,
244 .clknotstop = 0,
245 .oc_enable = 0,
246 .int_act_high = 0,
247 .int_edge_triggered = 0,
248 .remote_wakeup_connected = 0,
249 .no_power_switching = 1,
250 .power_switching_mode = 0,
251};
252
253static struct platform_device isp1362_hcd_device = {
254 .name = "isp1362-hcd",
255 .id = 0,
256 .dev = {
257 .platform_data = &isp1362_priv,
258 },
259 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
260 .resource = isp1362_hcd_resources,
261};
262#endif
263
264#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
265static struct platform_device bfin_mii_bus = {
266 .name = "bfin_mii_bus",
267};
268
269static struct platform_device bfin_mac_device = {
270 .name = "bfin_mac",
271 .dev.platform_data = &bfin_mii_bus,
272};
273#endif
274
275#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
276static struct resource net2272_bfin_resources[] = {
277 {
278 .start = 0x20300000,
279 .end = 0x20300000 + 0x100,
280 .flags = IORESOURCE_MEM,
281 }, {
282 .start = IRQ_PF7,
283 .end = IRQ_PF7,
284 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
285 },
286};
287
288static struct platform_device net2272_bfin_device = {
289 .name = "net2272",
290 .id = -1,
291 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
292 .resource = net2272_bfin_resources,
293};
294#endif
295
296#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
297/* all SPI peripherals info goes here */
298
299#if defined(CONFIG_MTD_M25P80) \
300 || defined(CONFIG_MTD_M25P80_MODULE)
301static struct mtd_partition bfin_spi_flash_partitions[] = {
302 {
303 .name = "bootloader(spi)",
304 .size = 0x00020000,
305 .offset = 0,
306 .mask_flags = MTD_CAP_ROM
307 }, {
308 .name = "linux kernel(spi)",
309 .size = 0xe0000,
310 .offset = 0x20000
311 }, {
312 .name = "file system(spi)",
313 .size = 0x700000,
314 .offset = 0x00100000,
315 }
316};
317
318static struct flash_platform_data bfin_spi_flash_data = {
319 .name = "m25p80",
320 .parts = bfin_spi_flash_partitions,
321 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
322 .type = "m25p64",
323};
324
325/* SPI flash chip (m25p64) */
326static struct bfin5xx_spi_chip spi_flash_chip_info = {
327 .enable_dma = 0, /* use dma transfer with this chip*/
328 .bits_per_word = 8,
329};
330#endif
331
332#if defined(CONFIG_SPI_ADC_BF533) \
333 || defined(CONFIG_SPI_ADC_BF533_MODULE)
334/* SPI ADC chip */
335static struct bfin5xx_spi_chip spi_adc_chip_info = {
336 .enable_dma = 1, /* use dma transfer with this chip*/
337 .bits_per_word = 16,
338};
339#endif
340
341#if defined(CONFIG_SND_BLACKFIN_AD1836) \
342 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
343static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
344 .enable_dma = 0,
345 .bits_per_word = 16,
346};
347#endif
348
349#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
350static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
351 .enable_dma = 0,
352 .bits_per_word = 16,
353};
354#endif
355
356#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
357static struct bfin5xx_spi_chip spi_mmc_chip_info = {
358 .enable_dma = 1,
359 .bits_per_word = 8,
360};
361#endif
362
363#if defined(CONFIG_PBX)
364static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
365 .ctl_reg = 0x4, /* send zero */
366 .enable_dma = 0,
367 .bits_per_word = 8,
368 .cs_change_per_word = 1,
369};
370#endif
371
372#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
373static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
374 .enable_dma = 0,
375 .bits_per_word = 16,
376};
377
378static const struct ad7877_platform_data bfin_ad7877_ts_info = {
379 .model = 7877,
380 .vref_delay_usecs = 50, /* internal, no capacitor */
381 .x_plate_ohms = 419,
382 .y_plate_ohms = 486,
383 .pressure_max = 1000,
384 .pressure_min = 0,
385 .stopacq_polarity = 1,
386 .first_conversion_delay = 3,
387 .acquisition_time = 1,
388 .averaging = 1,
389 .pen_down_acc_interval = 1,
390};
391#endif
392
393static struct spi_board_info bfin_spi_board_info[] __initdata = {
394#if defined(CONFIG_MTD_M25P80) \
395 || defined(CONFIG_MTD_M25P80_MODULE)
396 {
397 /* the modalias must be the same as spi device driver name */
398 .modalias = "m25p80", /* Name of spi_driver for this device */
399 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
400 .bus_num = 0, /* Framework bus number */
401 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
402 .platform_data = &bfin_spi_flash_data,
403 .controller_data = &spi_flash_chip_info,
404 .mode = SPI_MODE_3,
405 },
406#endif
407
408#if defined(CONFIG_SPI_ADC_BF533) \
409 || defined(CONFIG_SPI_ADC_BF533_MODULE)
410 {
411 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
412 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
413 .bus_num = 0, /* Framework bus number */
414 .chip_select = 1, /* Framework chip select. */
415 .platform_data = NULL, /* No spi_driver specific config */
416 .controller_data = &spi_adc_chip_info,
417 },
418#endif
419
420#if defined(CONFIG_SND_BLACKFIN_AD1836) \
421 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
422 {
423 .modalias = "ad1836-spi",
424 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
425 .bus_num = 0,
426 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
427 .controller_data = &ad1836_spi_chip_info,
428 },
429#endif
430#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
431 {
432 .modalias = "ad9960-spi",
433 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
434 .bus_num = 0,
435 .chip_select = 1,
436 .controller_data = &ad9960_spi_chip_info,
437 },
438#endif
439#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
440 {
441 .modalias = "spi_mmc_dummy",
442 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
443 .bus_num = 0,
444 .chip_select = 0,
445 .platform_data = NULL,
446 .controller_data = &spi_mmc_chip_info,
447 .mode = SPI_MODE_3,
448 },
449 {
450 .modalias = "spi_mmc",
451 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
452 .bus_num = 0,
453 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
454 .platform_data = NULL,
455 .controller_data = &spi_mmc_chip_info,
456 .mode = SPI_MODE_3,
457 },
458#endif
459#if defined(CONFIG_PBX)
460 {
461 .modalias = "fxs-spi",
462 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
463 .bus_num = 0,
464 .chip_select = 8 - CONFIG_J11_JUMPER,
465 .controller_data = &spi_si3xxx_chip_info,
466 .mode = SPI_MODE_3,
467 },
468 {
469 .modalias = "fxo-spi",
470 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
471 .bus_num = 0,
472 .chip_select = 8 - CONFIG_J19_JUMPER,
473 .controller_data = &spi_si3xxx_chip_info,
474 .mode = SPI_MODE_3,
475 },
476#endif
477#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
478 {
479 .modalias = "ad7877",
480 .platform_data = &bfin_ad7877_ts_info,
481 .irq = IRQ_PF6,
482 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
483 .bus_num = 0,
484 .chip_select = 1,
485 .controller_data = &spi_ad7877_chip_info,
486 },
487#endif
488};
489
490/* SPI controller data */
491static struct bfin5xx_spi_master bfin_spi0_info = {
492 .num_chipselect = 8,
493 .enable_dma = 1, /* master has the ability to do dma transfer */
494 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
495};
496
497/* SPI (0) */
498static struct resource bfin_spi0_resource[] = {
499 [0] = {
500 .start = SPI0_REGBASE,
501 .end = SPI0_REGBASE + 0xFF,
502 .flags = IORESOURCE_MEM,
503 },
504 [1] = {
505 .start = CH_SPI,
506 .end = CH_SPI,
507 .flags = IORESOURCE_IRQ,
508 },
509};
510
511static struct platform_device bfin_spi0_device = {
512 .name = "bfin-spi",
513 .id = 0, /* Bus number */
514 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
515 .resource = bfin_spi0_resource,
516 .dev = {
517 .platform_data = &bfin_spi0_info, /* Passed to driver */
518 },
519};
520#endif /* spi master and devices */
521
522#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
523static struct platform_device bfin_fb_device = {
524 .name = "bf537-lq035",
525};
526#endif
527
528#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
529static struct platform_device bfin_fb_adv7393_device = {
530 .name = "bfin-adv7393",
531};
532#endif
533
534#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
535static struct resource bfin_uart_resources[] = {
536 {
537 .start = 0xFFC00400,
538 .end = 0xFFC004FF,
539 .flags = IORESOURCE_MEM,
540 }, {
541 .start = 0xFFC02000,
542 .end = 0xFFC020FF,
543 .flags = IORESOURCE_MEM,
544 },
545};
546
547static struct platform_device bfin_uart_device = {
548 .name = "bfin-uart",
549 .id = 1,
550 .num_resources = ARRAY_SIZE(bfin_uart_resources),
551 .resource = bfin_uart_resources,
552};
553#endif
554
555#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
556#ifdef CONFIG_BFIN_SIR0
557static struct resource bfin_sir0_resources[] = {
558 {
559 .start = 0xFFC00400,
560 .end = 0xFFC004FF,
561 .flags = IORESOURCE_MEM,
562 },
563 {
564 .start = IRQ_UART0_RX,
565 .end = IRQ_UART0_RX+1,
566 .flags = IORESOURCE_IRQ,
567 },
568 {
569 .start = CH_UART0_RX,
570 .end = CH_UART0_RX+1,
571 .flags = IORESOURCE_DMA,
572 },
573};
574
575static struct platform_device bfin_sir0_device = {
576 .name = "bfin_sir",
577 .id = 0,
578 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
579 .resource = bfin_sir0_resources,
580};
581#endif
582#ifdef CONFIG_BFIN_SIR1
583static struct resource bfin_sir1_resources[] = {
584 {
585 .start = 0xFFC02000,
586 .end = 0xFFC020FF,
587 .flags = IORESOURCE_MEM,
588 },
589 {
590 .start = IRQ_UART1_RX,
591 .end = IRQ_UART1_RX+1,
592 .flags = IORESOURCE_IRQ,
593 },
594 {
595 .start = CH_UART1_RX,
596 .end = CH_UART1_RX+1,
597 .flags = IORESOURCE_DMA,
598 },
599};
600
601static struct platform_device bfin_sir1_device = {
602 .name = "bfin_sir",
603 .id = 1,
604 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
605 .resource = bfin_sir1_resources,
606};
607#endif
608#endif
609
610#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
611static struct resource bfin_twi0_resource[] = {
612 [0] = {
613 .start = TWI0_REGBASE,
614 .end = TWI0_REGBASE + 0xFF,
615 .flags = IORESOURCE_MEM,
616 },
617 [1] = {
618 .start = IRQ_TWI,
619 .end = IRQ_TWI,
620 .flags = IORESOURCE_IRQ,
621 },
622};
623
624static struct platform_device i2c_bfin_twi_device = {
625 .name = "i2c-bfin-twi",
626 .id = 0,
627 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
628 .resource = bfin_twi0_resource,
629};
630#endif
631
632#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
633static struct platform_device bfin_sport0_uart_device = {
634 .name = "bfin-sport-uart",
635 .id = 0,
636};
637
638static struct platform_device bfin_sport1_uart_device = {
639 .name = "bfin-sport-uart",
640 .id = 1,
641};
642#endif
643
644static struct platform_device *stamp_devices[] __initdata = {
645#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
646 &bfin_pcmcia_cf_device,
647#endif
648
649#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
650 &rtc_device,
651#endif
652
653#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
654 &sl811_hcd_device,
655#endif
656
657#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
658 &isp1362_hcd_device,
659#endif
660
661#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
662 &smc91x_device,
663#endif
664
665#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
666 &dm9000_device,
667#endif
668
669#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
670 &bfin_mii_bus,
671 &bfin_mac_device,
672#endif
673
674#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
675 &net2272_bfin_device,
676#endif
677
678#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
679 &bfin_isp1760_device,
680#endif
681
682#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
683 &bfin_spi0_device,
684#endif
685
686#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
687 &bfin_fb_device,
688#endif
689
690#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
691 &bfin_fb_adv7393_device,
692#endif
693
694#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
695 &bfin_uart_device,
696#endif
697
698#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
699#ifdef CONFIG_BFIN_SIR0
700 &bfin_sir0_device,
701#endif
702#ifdef CONFIG_BFIN_SIR1
703 &bfin_sir1_device,
704#endif
705#endif
706
707#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
708 &i2c_bfin_twi_device,
709#endif
710
711#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
712 &bfin_sport0_uart_device,
713 &bfin_sport1_uart_device,
714#endif
715};
716
717static int __init generic_init(void)
718{
719 printk(KERN_INFO "%s(): registering device resources\n", __func__);
720 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
721#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
722 spi_register_board_info(bfin_spi_board_info,
723 ARRAY_SIZE(bfin_spi_board_info));
724#endif
725
726 return 0;
727}
728
729arch_initcall(generic_init);
730
731void native_machine_restart(char *cmd)
732{
733 /* workaround reboot hang when booting from SPI */
734 if ((bfin_read_SYSCR() & 0x7) == 0x3)
735 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
736}
737
738#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
739void bfin_get_ether_addr(char *addr)
740{
741 random_ether_addr(addr);
742 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
743}
744EXPORT_SYMBOL(bfin_get_ether_addr);
745#endif
diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c
index db7d3a385e4b..3c159819e555 100644
--- a/arch/blackfin/mach-bf537/boards/minotaur.c
+++ b/arch/blackfin/mach-bf537/boards/minotaur.c
@@ -134,9 +134,9 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
134}; 134};
135#endif 135#endif
136 136
137#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 137#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
138static struct bfin5xx_spi_chip spi_mmc_chip_info = { 138static struct bfin5xx_spi_chip mmc_spi_chip_info = {
139 .enable_dma = 1, 139 .enable_dma = 0,
140 .bits_per_word = 8, 140 .bits_per_word = 8,
141}; 141};
142#endif 142#endif
@@ -156,23 +156,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
156 }, 156 },
157#endif 157#endif
158 158
159#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 159#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
160 { 160 {
161 .modalias = "spi_mmc_dummy", 161 .modalias = "mmc_spi",
162 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ 162 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
163 .bus_num = 0, 163 .bus_num = 0,
164 .chip_select = 0, 164 .chip_select = 5,
165 .platform_data = NULL, 165 .controller_data = &mmc_spi_chip_info,
166 .controller_data = &spi_mmc_chip_info,
167 .mode = SPI_MODE_3,
168 },
169 {
170 .modalias = "spi_mmc",
171 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
172 .bus_num = 0,
173 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
174 .platform_data = NULL,
175 .controller_data = &spi_mmc_chip_info,
176 .mode = SPI_MODE_3, 166 .mode = SPI_MODE_3,
177 }, 167 },
178#endif 168#endif
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c
index 590eb3a139b7..4e1de1e53f89 100644
--- a/arch/blackfin/mach-bf537/boards/pnav10.c
+++ b/arch/blackfin/mach-bf537/boards/pnav10.c
@@ -289,9 +289,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
289}; 289};
290#endif 290#endif
291 291
292#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 292#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
293static struct bfin5xx_spi_chip spi_mmc_chip_info = { 293static struct bfin5xx_spi_chip mmc_spi_chip_info = {
294 .enable_dma = 1, 294 .enable_dma = 0,
295 .bits_per_word = 8, 295 .bits_per_word = 8,
296}; 296};
297#endif 297#endif
@@ -364,23 +364,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
364 .controller_data = &ad9960_spi_chip_info, 364 .controller_data = &ad9960_spi_chip_info,
365 }, 365 },
366#endif 366#endif
367#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 367#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
368 {
369 .modalias = "spi_mmc_dummy",
370 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
371 .bus_num = 0,
372 .chip_select = 7,
373 .platform_data = NULL,
374 .controller_data = &spi_mmc_chip_info,
375 .mode = SPI_MODE_3,
376 },
377 { 368 {
378 .modalias = "spi_mmc", 369 .modalias = "mmc_spi",
379 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 370 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
380 .bus_num = 0, 371 .bus_num = 0,
381 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 372 .chip_select = 5,
382 .platform_data = NULL, 373 .controller_data = &mmc_spi_chip_info,
383 .controller_data = &spi_mmc_chip_info,
384 .mode = SPI_MODE_3, 374 .mode = SPI_MODE_3,
385 }, 375 },
386#endif 376#endif
diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
index 3f4f203a06ec..53ad10f3cd76 100644
--- a/arch/blackfin/mach-bf537/boards/tcm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
@@ -108,9 +108,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
108}; 108};
109#endif 109#endif
110 110
111#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 111#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
112static struct bfin5xx_spi_chip spi_mmc_chip_info = { 112static struct bfin5xx_spi_chip mmc_spi_chip_info = {
113 .enable_dma = 1, 113 .enable_dma = 0,
114 .bits_per_word = 8, 114 .bits_per_word = 8,
115}; 115};
116#endif 116#endif
@@ -160,23 +160,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
160 }, 160 },
161#endif 161#endif
162 162
163#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 163#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
164 {
165 .modalias = "spi_mmc_dummy",
166 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
167 .bus_num = 0,
168 .chip_select = 7,
169 .platform_data = NULL,
170 .controller_data = &spi_mmc_chip_info,
171 .mode = SPI_MODE_3,
172 },
173 { 164 {
174 .modalias = "spi_mmc", 165 .modalias = "mmc_spi",
175 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 166 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
176 .bus_num = 0, 167 .bus_num = 0,
177 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 168 .chip_select = 5,
178 .platform_data = NULL, 169 .controller_data = &mmc_spi_chip_info,
179 .controller_data = &spi_mmc_chip_info,
180 .mode = SPI_MODE_3, 170 .mode = SPI_MODE_3,
181 }, 171 },
182#endif 172#endif
diff --git a/arch/blackfin/mach-bf537/include/mach/anomaly.h b/arch/blackfin/mach-bf537/include/mach/anomaly.h
index 9cb39121d1cb..1bfd80c26c90 100644
--- a/arch/blackfin/mach-bf537/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf537/include/mach/anomaly.h
@@ -2,7 +2,7 @@
2 * File: include/asm-blackfin/mach-bf537/anomaly.h 2 * File: include/asm-blackfin/mach-bf537/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2008 Analog Devices Inc. 5 * Copyright (C) 2004-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
@@ -110,7 +110,7 @@
110#define ANOMALY_05000301 (1) 110#define ANOMALY_05000301 (1)
111/* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */ 111/* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */
112#define ANOMALY_05000304 (__SILICON_REVISION__ < 3) 112#define ANOMALY_05000304 (__SILICON_REVISION__ < 3)
113/* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */ 113/* SPORT_HYS Bit in PLL_CTL Register Is Not Functional */
114#define ANOMALY_05000305 (__SILICON_REVISION__ < 3) 114#define ANOMALY_05000305 (__SILICON_REVISION__ < 3)
115/* SCKELOW Bit Does Not Maintain State Through Hibernate */ 115/* SCKELOW Bit Does Not Maintain State Through Hibernate */
116#define ANOMALY_05000307 (__SILICON_REVISION__ < 3) 116#define ANOMALY_05000307 (__SILICON_REVISION__ < 3)
@@ -168,9 +168,12 @@
168#define ANOMALY_05000323 (0) 168#define ANOMALY_05000323 (0)
169#define ANOMALY_05000353 (1) 169#define ANOMALY_05000353 (1)
170#define ANOMALY_05000363 (0) 170#define ANOMALY_05000363 (0)
171#define ANOMALY_05000380 (0)
171#define ANOMALY_05000386 (1) 172#define ANOMALY_05000386 (1)
172#define ANOMALY_05000412 (0) 173#define ANOMALY_05000412 (0)
173#define ANOMALY_05000432 (0) 174#define ANOMALY_05000432 (0)
174#define ANOMALY_05000435 (0) 175#define ANOMALY_05000435 (0)
176#define ANOMALY_05000447 (0)
177#define ANOMALY_05000448 (0)
175 178
176#endif 179#endif
diff --git a/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h
index b3f87e1d16a2..9e34700844a2 100644
--- a/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h
@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
144 CH_UART0_TX, 144 CH_UART0_TX,
145 CH_UART0_RX, 145 CH_UART0_RX,
146#endif 146#endif
147#ifdef CONFIG_BFIN_UART0_CTSRTS 147#ifdef CONFIG_SERIAL_BFIN_CTSRTS
148 CONFIG_UART0_CTS_PIN, 148 CONFIG_UART0_CTS_PIN,
149 CONFIG_UART0_RTS_PIN, 149 CONFIG_UART0_RTS_PIN,
150#endif 150#endif
@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
158 CH_UART1_TX, 158 CH_UART1_TX,
159 CH_UART1_RX, 159 CH_UART1_RX,
160#endif 160#endif
161#ifdef CONFIG_BFIN_UART1_CTSRTS 161#ifdef CONFIG_SERIAL_BFIN_CTSRTS
162 CONFIG_UART1_CTS_PIN, 162 CONFIG_UART1_CTS_PIN,
163 CONFIG_UART1_RTS_PIN, 163 CONFIG_UART1_RTS_PIN,
164#endif 164#endif
diff --git a/arch/blackfin/mach-bf538/include/mach/anomaly.h b/arch/blackfin/mach-bf538/include/mach/anomaly.h
index e130b4f8a05d..3a5699827363 100644
--- a/arch/blackfin/mach-bf538/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf538/include/mach/anomaly.h
@@ -2,7 +2,7 @@
2 * File: include/asm-blackfin/mach-bf538/anomaly.h 2 * File: include/asm-blackfin/mach-bf538/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2008 Analog Devices Inc. 5 * Copyright (C) 2004-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
@@ -120,13 +120,17 @@
120#define ANOMALY_05000198 (0) 120#define ANOMALY_05000198 (0)
121#define ANOMALY_05000230 (0) 121#define ANOMALY_05000230 (0)
122#define ANOMALY_05000263 (0) 122#define ANOMALY_05000263 (0)
123#define ANOMALY_05000305 (0)
123#define ANOMALY_05000311 (0) 124#define ANOMALY_05000311 (0)
124#define ANOMALY_05000323 (0) 125#define ANOMALY_05000323 (0)
125#define ANOMALY_05000353 (1) 126#define ANOMALY_05000353 (1)
126#define ANOMALY_05000363 (0) 127#define ANOMALY_05000363 (0)
128#define ANOMALY_05000380 (0)
127#define ANOMALY_05000386 (1) 129#define ANOMALY_05000386 (1)
128#define ANOMALY_05000412 (0) 130#define ANOMALY_05000412 (0)
129#define ANOMALY_05000432 (0) 131#define ANOMALY_05000432 (0)
130#define ANOMALY_05000435 (0) 132#define ANOMALY_05000435 (0)
133#define ANOMALY_05000447 (0)
134#define ANOMALY_05000448 (0)
131 135
132#endif 136#endif
diff --git a/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h
index 40503b6b89a3..3c2811ebecdd 100644
--- a/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h
@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
144 CH_UART0_TX, 144 CH_UART0_TX,
145 CH_UART0_RX, 145 CH_UART0_RX,
146#endif 146#endif
147#ifdef CONFIG_BFIN_UART0_CTSRTS 147#ifdef CONFIG_SERIAL_BFIN_CTSRTS
148 CONFIG_UART0_CTS_PIN, 148 CONFIG_UART0_CTS_PIN,
149 CONFIG_UART0_RTS_PIN, 149 CONFIG_UART0_RTS_PIN,
150#endif 150#endif
@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
158 CH_UART1_TX, 158 CH_UART1_TX,
159 CH_UART1_RX, 159 CH_UART1_RX,
160#endif 160#endif
161#ifdef CONFIG_BFIN_UART1_CTSRTS 161#ifdef CONFIG_SERIAL_BFIN_CTSRTS
162 CONFIG_UART1_CTS_PIN, 162 CONFIG_UART1_CTS_PIN,
163 CONFIG_UART1_RTS_PIN, 163 CONFIG_UART1_RTS_PIN,
164#endif 164#endif
diff --git a/arch/blackfin/mach-bf548/include/mach/anomaly.h b/arch/blackfin/mach-bf548/include/mach/anomaly.h
index 23d03c52f4b4..882e40ccf0d1 100644
--- a/arch/blackfin/mach-bf548/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf548/include/mach/anomaly.h
@@ -2,12 +2,12 @@
2 * File: include/asm-blackfin/mach-bf548/anomaly.h 2 * File: include/asm-blackfin/mach-bf548/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2008 Analog Devices Inc. 5 * Copyright (C) 2004-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
9/* This file shoule be up to date with: 9/* This file shoule be up to date with:
10 * - Revision G, 08/07/2008; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List 10 * - Revision H, 01/16/2009; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List
11 */ 11 */
12 12
13#ifndef _MACH_ANOMALY_H_ 13#ifndef _MACH_ANOMALY_H_
@@ -91,8 +91,6 @@
91#define ANOMALY_05000371 (__SILICON_REVISION__ < 2) 91#define ANOMALY_05000371 (__SILICON_REVISION__ < 2)
92/* USB DP/DM Data Pins May Lose State When Entering Hibernate */ 92/* USB DP/DM Data Pins May Lose State When Entering Hibernate */
93#define ANOMALY_05000372 (__SILICON_REVISION__ < 1) 93#define ANOMALY_05000372 (__SILICON_REVISION__ < 1)
94/* Mobile DDR Operation Not Functional */
95#define ANOMALY_05000377 (1)
96/* Security/Authentication Speedpath Causes Authentication To Fail To Initiate */ 94/* Security/Authentication Speedpath Causes Authentication To Fail To Initiate */
97#define ANOMALY_05000378 (__SILICON_REVISION__ < 2) 95#define ANOMALY_05000378 (__SILICON_REVISION__ < 2)
98/* 16-Bit NAND FLASH Boot Mode Is Not Functional */ 96/* 16-Bit NAND FLASH Boot Mode Is Not Functional */
@@ -157,8 +155,22 @@
157#define ANOMALY_05000429 (__SILICON_REVISION__ < 2) 155#define ANOMALY_05000429 (__SILICON_REVISION__ < 2)
158/* Software System Reset Corrupts PLL_LOCKCNT Register */ 156/* Software System Reset Corrupts PLL_LOCKCNT Register */
159#define ANOMALY_05000430 (__SILICON_REVISION__ >= 2) 157#define ANOMALY_05000430 (__SILICON_REVISION__ >= 2)
158/* Incorrect Use of Stack in Lockbox Firmware During Authentication */
159#define ANOMALY_05000431 (__SILICON_REVISION__ < 3)
160/* OTP Write Accesses Not Supported */
161#define ANOMALY_05000442 (__SILICON_REVISION__ < 1)
160/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ 162/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
161#define ANOMALY_05000443 (1) 163#define ANOMALY_05000443 (1)
164/* CDMAPRIO and L2DMAPRIO Bits in the SYSCR Register Are Not Functional */
165#define ANOMALY_05000446 (1)
166/* UART IrDA Receiver Fails on Extended Bit Pulses */
167#define ANOMALY_05000447 (1)
168/* DDR Clock Duty Cycle Spec Violation (tCH, tCL) */
169#define ANOMALY_05000448 (__SILICON_REVISION__ == 1)
170/* Reduced Timing Margins on DDR Output Setup and Hold (tDS and tDH) */
171#define ANOMALY_05000449 (__SILICON_REVISION__ == 1)
172/* USB DMA Mode 1 Short Packet Data Corruption */
173#define ANOMALY_05000450 (1
162 174
163/* Anomalies that don't exist on this proc */ 175/* Anomalies that don't exist on this proc */
164#define ANOMALY_05000125 (0) 176#define ANOMALY_05000125 (0)
@@ -171,6 +183,8 @@
171#define ANOMALY_05000263 (0) 183#define ANOMALY_05000263 (0)
172#define ANOMALY_05000266 (0) 184#define ANOMALY_05000266 (0)
173#define ANOMALY_05000273 (0) 185#define ANOMALY_05000273 (0)
186#define ANOMALY_05000278 (0)
187#define ANOMALY_05000305 (0)
174#define ANOMALY_05000307 (0) 188#define ANOMALY_05000307 (0)
175#define ANOMALY_05000311 (0) 189#define ANOMALY_05000311 (0)
176#define ANOMALY_05000323 (0) 190#define ANOMALY_05000323 (0)
diff --git a/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h
index e4cf35e7ab9f..c05e79cba257 100644
--- a/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h
@@ -63,7 +63,7 @@
63#define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v) 63#define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v)
64#define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF) 64#define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF)
65 65
66#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) 66#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART2_CTSRTS)
67# define CONFIG_SERIAL_BFIN_CTSRTS 67# define CONFIG_SERIAL_BFIN_CTSRTS
68 68
69# ifndef CONFIG_UART0_CTS_PIN 69# ifndef CONFIG_UART0_CTS_PIN
@@ -74,12 +74,12 @@
74# define CONFIG_UART0_RTS_PIN -1 74# define CONFIG_UART0_RTS_PIN -1
75# endif 75# endif
76 76
77# ifndef CONFIG_UART1_CTS_PIN 77# ifndef CONFIG_UART2_CTS_PIN
78# define CONFIG_UART1_CTS_PIN -1 78# define CONFIG_UART2_CTS_PIN -1
79# endif 79# endif
80 80
81# ifndef CONFIG_UART1_RTS_PIN 81# ifndef CONFIG_UART2_RTS_PIN
82# define CONFIG_UART1_RTS_PIN -1 82# define CONFIG_UART2_RTS_PIN -1
83# endif 83# endif
84#endif 84#endif
85 85
@@ -130,7 +130,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
130 CH_UART0_TX, 130 CH_UART0_TX,
131 CH_UART0_RX, 131 CH_UART0_RX,
132#endif 132#endif
133#ifdef CONFIG_BFIN_UART0_CTSRTS 133#ifdef CONFIG_SERIAL_BFIN_CTSRTS
134 CONFIG_UART0_CTS_PIN, 134 CONFIG_UART0_CTS_PIN,
135 CONFIG_UART0_RTS_PIN, 135 CONFIG_UART0_RTS_PIN,
136#endif 136#endif
@@ -144,6 +144,10 @@ struct bfin_serial_res bfin_serial_resource[] = {
144 CH_UART1_TX, 144 CH_UART1_TX,
145 CH_UART1_RX, 145 CH_UART1_RX,
146#endif 146#endif
147#ifdef CONFIG_SERIAL_BFIN_CTSRTS
148 0,
149 0,
150#endif
147 }, 151 },
148#endif 152#endif
149#ifdef CONFIG_SERIAL_BFIN_UART2 153#ifdef CONFIG_SERIAL_BFIN_UART2
@@ -154,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
154 CH_UART2_TX, 158 CH_UART2_TX,
155 CH_UART2_RX, 159 CH_UART2_RX,
156#endif 160#endif
157#ifdef CONFIG_BFIN_UART2_CTSRTS 161#ifdef CONFIG_SERIAL_BFIN_CTSRTS
158 CONFIG_UART2_CTS_PIN, 162 CONFIG_UART2_CTS_PIN,
159 CONFIG_UART2_RTS_PIN, 163 CONFIG_UART2_RTS_PIN,
160#endif 164#endif
@@ -168,6 +172,10 @@ struct bfin_serial_res bfin_serial_resource[] = {
168 CH_UART3_TX, 172 CH_UART3_TX,
169 CH_UART3_RX, 173 CH_UART3_RX,
170#endif 174#endif
175#ifdef CONFIG_SERIAL_BFIN_CTSRTS
176 0,
177 0,
178#endif
171 }, 179 },
172#endif 180#endif
173}; 181};
diff --git a/arch/blackfin/mach-bf548/include/mach/irq.h b/arch/blackfin/mach-bf548/include/mach/irq.h
index 60299a71e090..f194625f6821 100644
--- a/arch/blackfin/mach-bf548/include/mach/irq.h
+++ b/arch/blackfin/mach-bf548/include/mach/irq.h
@@ -123,8 +123,8 @@ Events (highest priority) EMU 0
123#define IRQ_MXVR_ERROR BFIN_IRQ(51) /* MXVR Status (Error) Interrupt */ 123#define IRQ_MXVR_ERROR BFIN_IRQ(51) /* MXVR Status (Error) Interrupt */
124#define IRQ_MXVR_MSG BFIN_IRQ(52) /* MXVR Message Interrupt */ 124#define IRQ_MXVR_MSG BFIN_IRQ(52) /* MXVR Message Interrupt */
125#define IRQ_MXVR_PKT BFIN_IRQ(53) /* MXVR Packet Interrupt */ 125#define IRQ_MXVR_PKT BFIN_IRQ(53) /* MXVR Packet Interrupt */
126#define IRQ_EPP1_ERROR BFIN_IRQ(54) /* EPPI1 Error Interrupt */ 126#define IRQ_EPPI1_ERROR BFIN_IRQ(54) /* EPPI1 Error Interrupt */
127#define IRQ_EPP2_ERROR BFIN_IRQ(55) /* EPPI2 Error Interrupt */ 127#define IRQ_EPPI2_ERROR BFIN_IRQ(55) /* EPPI2 Error Interrupt */
128#define IRQ_UART3_ERROR BFIN_IRQ(56) /* UART3 Status (Error) Interrupt */ 128#define IRQ_UART3_ERROR BFIN_IRQ(56) /* UART3 Status (Error) Interrupt */
129#define IRQ_HOST_ERROR BFIN_IRQ(57) /* HOST Status (Error) Interrupt */ 129#define IRQ_HOST_ERROR BFIN_IRQ(57) /* HOST Status (Error) Interrupt */
130#define IRQ_PIXC_ERROR BFIN_IRQ(59) /* PIXC Status (Error) Interrupt */ 130#define IRQ_PIXC_ERROR BFIN_IRQ(59) /* PIXC Status (Error) Interrupt */
@@ -361,8 +361,8 @@ Events (highest priority) EMU 0
361#define IRQ_UART2_ERR IRQ_UART2_ERROR 361#define IRQ_UART2_ERR IRQ_UART2_ERROR
362#define IRQ_CAN0_ERR IRQ_CAN0_ERROR 362#define IRQ_CAN0_ERR IRQ_CAN0_ERROR
363#define IRQ_MXVR_ERR IRQ_MXVR_ERROR 363#define IRQ_MXVR_ERR IRQ_MXVR_ERROR
364#define IRQ_EPP1_ERR IRQ_EPP1_ERROR 364#define IRQ_EPPI1_ERR IRQ_EPPI1_ERROR
365#define IRQ_EPP2_ERR IRQ_EPP2_ERROR 365#define IRQ_EPPI2_ERR IRQ_EPPI2_ERROR
366#define IRQ_UART3_ERR IRQ_UART3_ERROR 366#define IRQ_UART3_ERR IRQ_UART3_ERROR
367#define IRQ_HOST_ERR IRQ_HOST_ERROR 367#define IRQ_HOST_ERR IRQ_HOST_ERROR
368#define IRQ_PIXC_ERR IRQ_PIXC_ERROR 368#define IRQ_PIXC_ERR IRQ_PIXC_ERROR
diff --git a/arch/blackfin/mach-bf561/boards/Kconfig b/arch/blackfin/mach-bf561/boards/Kconfig
index e41a67b1fb53..e4bc6d7c5a6a 100644
--- a/arch/blackfin/mach-bf561/boards/Kconfig
+++ b/arch/blackfin/mach-bf561/boards/Kconfig
@@ -19,9 +19,4 @@ config BFIN561_BLUETECHNIX_CM
19 help 19 help
20 CM-BF561 support for EVAL- and DEV-Board. 20 CM-BF561 support for EVAL- and DEV-Board.
21 21
22config GENERIC_BF561_BOARD
23 bool "Generic"
24 help
25 Generic or Custom board support.
26
27endchoice 22endchoice
diff --git a/arch/blackfin/mach-bf561/boards/Makefile b/arch/blackfin/mach-bf561/boards/Makefile
index 04add010b568..3a152559e957 100644
--- a/arch/blackfin/mach-bf561/boards/Makefile
+++ b/arch/blackfin/mach-bf561/boards/Makefile
@@ -2,7 +2,6 @@
2# arch/blackfin/mach-bf561/boards/Makefile 2# arch/blackfin/mach-bf561/boards/Makefile
3# 3#
4 4
5obj-$(CONFIG_GENERIC_BF561_BOARD) += generic_board.o
6obj-$(CONFIG_BFIN561_BLUETECHNIX_CM) += cm_bf561.o 5obj-$(CONFIG_BFIN561_BLUETECHNIX_CM) += cm_bf561.o
7obj-$(CONFIG_BFIN561_EZKIT) += ezkit.o 6obj-$(CONFIG_BFIN561_EZKIT) += ezkit.o
8obj-$(CONFIG_BFIN561_TEPLA) += tepla.o 7obj-$(CONFIG_BFIN561_TEPLA) += tepla.o
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c
index 6880d1ebfe60..f623c6b0719f 100644
--- a/arch/blackfin/mach-bf561/boards/cm_bf561.c
+++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c
@@ -105,9 +105,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
105}; 105};
106#endif 106#endif
107 107
108#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 108#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
109static struct bfin5xx_spi_chip spi_mmc_chip_info = { 109static struct bfin5xx_spi_chip mmc_spi_chip_info = {
110 .enable_dma = 1, 110 .enable_dma = 0,
111 .bits_per_word = 8, 111 .bits_per_word = 8,
112}; 112};
113#endif 113#endif
@@ -155,14 +155,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
155 .controller_data = &ad9960_spi_chip_info, 155 .controller_data = &ad9960_spi_chip_info,
156 }, 156 },
157#endif 157#endif
158#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 158#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
159 { 159 {
160 .modalias = "spi_mmc", 160 .modalias = "mmc_spi",
161 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 161 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
162 .bus_num = 0, 162 .bus_num = 0,
163 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 163 .chip_select = 5,
164 .platform_data = NULL, 164 .controller_data = &mmc_spi_chip_info,
165 .controller_data = &spi_mmc_chip_info,
166 .mode = SPI_MODE_3, 165 .mode = SPI_MODE_3,
167 }, 166 },
168#endif 167#endif
diff --git a/arch/blackfin/mach-bf561/boards/generic_board.c b/arch/blackfin/mach-bf561/boards/generic_board.c
deleted file mode 100644
index 0ba366a0e696..000000000000
--- a/arch/blackfin/mach-bf561/boards/generic_board.c
+++ /dev/null
@@ -1,113 +0,0 @@
1/*
2 * File: arch/blackfin/mach-bf561/generic_board.c
3 * Based on: arch/blackfin/mach-bf533/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/irq.h>
34
35const char bfin_board_name[] = "UNKNOWN BOARD";
36
37/*
38 * Driver needs to know address, irq and flag pin.
39 */
40#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
41static struct resource smc91x_resources[] = {
42 {
43 .start = 0x2C010300,
44 .end = 0x2C010300 + 16,
45 .flags = IORESOURCE_MEM,
46 }, {
47 .start = IRQ_PROG_INTB,
48 .end = IRQ_PROG_INTB,
49 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
50 }, {
51 .start = IRQ_PF9,
52 .end = IRQ_PF9,
53 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
54 },
55};
56
57static struct platform_device smc91x_device = {
58 .name = "smc91x",
59 .id = 0,
60 .num_resources = ARRAY_SIZE(smc91x_resources),
61 .resource = smc91x_resources,
62};
63#endif
64
65#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
66#ifdef CONFIG_BFIN_SIR0
67static struct resource bfin_sir0_resources[] = {
68 {
69 .start = 0xFFC00400,
70 .end = 0xFFC004FF,
71 .flags = IORESOURCE_MEM,
72 },
73 {
74 .start = IRQ_UART0_RX,
75 .end = IRQ_UART0_RX+1,
76 .flags = IORESOURCE_IRQ,
77 },
78 {
79 .start = CH_UART0_RX,
80 .end = CH_UART0_RX+1,
81 .flags = IORESOURCE_DMA,
82 },
83};
84
85static struct platform_device bfin_sir0_device = {
86 .name = "bfin_sir",
87 .id = 0,
88 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
89 .resource = bfin_sir0_resources,
90};
91#endif
92#endif
93
94static struct platform_device *generic_board_devices[] __initdata = {
95#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
96 &smc91x_device,
97#endif
98
99#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
100#ifdef CONFIG_BFIN_SIR0
101 &bfin_sir0_device,
102#endif
103#endif
104};
105
106static int __init generic_board_init(void)
107{
108 printk(KERN_INFO "%s(): registering device resources\n", __func__);
109 return platform_add_devices(generic_board_devices,
110 ARRAY_SIZE(generic_board_devices));
111}
112
113arch_initcall(generic_board_init);
diff --git a/arch/blackfin/mach-bf561/include/mach/anomaly.h b/arch/blackfin/mach-bf561/include/mach/anomaly.h
index 1a9e17562821..d0b0b3506440 100644
--- a/arch/blackfin/mach-bf561/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf561/include/mach/anomaly.h
@@ -2,7 +2,7 @@
2 * File: include/asm-blackfin/mach-bf561/anomaly.h 2 * File: include/asm-blackfin/mach-bf561/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2008 Analog Devices Inc. 5 * Copyright (C) 2004-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
@@ -224,7 +224,7 @@
224#define ANOMALY_05000301 (1) 224#define ANOMALY_05000301 (1)
225/* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */ 225/* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */
226#define ANOMALY_05000302 (1) 226#define ANOMALY_05000302 (1)
227/* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */ 227/* SPORT_HYS Bit in PLL_CTL Register Is Not Functional */
228#define ANOMALY_05000305 (__SILICON_REVISION__ < 5) 228#define ANOMALY_05000305 (__SILICON_REVISION__ < 5)
229/* SCKELOW Bit Does Not Maintain State Through Hibernate */ 229/* SCKELOW Bit Does Not Maintain State Through Hibernate */
230#define ANOMALY_05000307 (__SILICON_REVISION__ < 5) 230#define ANOMALY_05000307 (__SILICON_REVISION__ < 5)
@@ -283,8 +283,11 @@
283#define ANOMALY_05000273 (0) 283#define ANOMALY_05000273 (0)
284#define ANOMALY_05000311 (0) 284#define ANOMALY_05000311 (0)
285#define ANOMALY_05000353 (1) 285#define ANOMALY_05000353 (1)
286#define ANOMALY_05000380 (0)
286#define ANOMALY_05000386 (1) 287#define ANOMALY_05000386 (1)
287#define ANOMALY_05000432 (0) 288#define ANOMALY_05000432 (0)
288#define ANOMALY_05000435 (0) 289#define ANOMALY_05000435 (0)
290#define ANOMALY_05000447 (0)
291#define ANOMALY_05000448 (0)
289 292
290#endif 293#endif
diff --git a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
index 043bfcf26c52..ca8c5f645209 100644
--- a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
@@ -134,7 +134,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
134 CH_UART_TX, 134 CH_UART_TX,
135 CH_UART_RX, 135 CH_UART_RX,
136#endif 136#endif
137#ifdef CONFIG_BFIN_UART0_CTSRTS 137#ifdef CONFIG_SERIAL_BFIN_CTSRTS
138 CONFIG_UART0_CTS_PIN, 138 CONFIG_UART0_CTS_PIN,
139 CONFIG_UART0_RTS_PIN, 139 CONFIG_UART0_RTS_PIN,
140#endif 140#endif
diff --git a/arch/blackfin/mach-common/arch_checks.c b/arch/blackfin/mach-common/arch_checks.c
index 98133b968f7b..80d39b2f9db2 100644
--- a/arch/blackfin/mach-common/arch_checks.c
+++ b/arch/blackfin/mach-common/arch_checks.c
@@ -62,3 +62,12 @@
62#if (CONFIG_BOOT_LOAD & 0x3) 62#if (CONFIG_BOOT_LOAD & 0x3)
63# error "The kernel load address must be 4 byte aligned" 63# error "The kernel load address must be 4 byte aligned"
64#endif 64#endif
65
66/* The entire kernel must be able to make a 24bit pcrel call to start of L1 */
67#if ((0xffffffff - L1_CODE_START + 1) + CONFIG_BOOT_LOAD) > 0x1000000
68# error "The kernel load address is too high; keep it below 10meg for safety"
69#endif
70
71#if ANOMALY_05000448
72# error You are using a part with anomaly 05000448, this issue causes random memory read/write failures - that means random crashes.
73#endif
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S
index 3c98dacbf289..aa0648c6a9fe 100644
--- a/arch/blackfin/mach-common/cache.S
+++ b/arch/blackfin/mach-common/cache.S
@@ -66,11 +66,33 @@
66 66
67/* Invalidate all instruction cache lines assocoiated with this memory area */ 67/* Invalidate all instruction cache lines assocoiated with this memory area */
68ENTRY(_blackfin_icache_flush_range) 68ENTRY(_blackfin_icache_flush_range)
69/*
70 * Walkaround to avoid loading wrong instruction after invalidating icache
71 * and following sequence is met.
72 *
73 * 1) One instruction address is cached in the instruction cache.
74 * 2) This instruction in SDRAM is changed.
75 * 3) IFLASH[P0] is executed only once in blackfin_icache_flush_range().
76 * 4) This instruction is executed again, but the old one is loaded.
77 */
78 P0 = R0;
79 IFLUSH[P0];
69 do_flush IFLUSH, , nop 80 do_flush IFLUSH, , nop
70ENDPROC(_blackfin_icache_flush_range) 81ENDPROC(_blackfin_icache_flush_range)
71 82
72/* Flush all cache lines assocoiated with this area of memory. */ 83/* Flush all cache lines assocoiated with this area of memory. */
73ENTRY(_blackfin_icache_dcache_flush_range) 84ENTRY(_blackfin_icache_dcache_flush_range)
85/*
86 * Walkaround to avoid loading wrong instruction after invalidating icache
87 * and following sequence is met.
88 *
89 * 1) One instruction address is cached in the instruction cache.
90 * 2) This instruction in SDRAM is changed.
91 * 3) IFLASH[P0] is executed only once in blackfin_icache_flush_range().
92 * 4) This instruction is executed again, but the old one is loaded.
93 */
94 P0 = R0;
95 IFLUSH[P0];
74 do_flush FLUSH, IFLUSH 96 do_flush FLUSH, IFLUSH
75ENDPROC(_blackfin_icache_dcache_flush_range) 97ENDPROC(_blackfin_icache_dcache_flush_range)
76 98
diff --git a/arch/blackfin/mach-common/clocks-init.c b/arch/blackfin/mach-common/clocks-init.c
index 9dddb6f8cc85..35393651359b 100644
--- a/arch/blackfin/mach-common/clocks-init.c
+++ b/arch/blackfin/mach-common/clocks-init.c
@@ -17,7 +17,7 @@
17#define SDGCTL_WIDTH (1 << 31) /* SDRAM external data path width */ 17#define SDGCTL_WIDTH (1 << 31) /* SDRAM external data path width */
18#define PLL_CTL_VAL \ 18#define PLL_CTL_VAL \
19 (((CONFIG_VCO_MULT & 63) << 9) | CLKIN_HALF | \ 19 (((CONFIG_VCO_MULT & 63) << 9) | CLKIN_HALF | \
20 (PLL_BYPASS << 8) | (ANOMALY_05000265 ? 0x8000 : 0)) 20 (PLL_BYPASS << 8) | (ANOMALY_05000305 ? 0 : 0x8000))
21 21
22__attribute__((l1_text)) 22__attribute__((l1_text))
23static void do_sync(void) 23static void do_sync(void)
diff --git a/arch/blackfin/mach-common/dpmc_modes.S b/arch/blackfin/mach-common/dpmc_modes.S
index 4da50bcd9300..8009a512fb11 100644
--- a/arch/blackfin/mach-common/dpmc_modes.S
+++ b/arch/blackfin/mach-common/dpmc_modes.S
@@ -376,10 +376,22 @@ ENTRY(_do_hibernate)
376#endif 376#endif
377 377
378#ifdef PINT0_ASSIGN 378#ifdef PINT0_ASSIGN
379 PM_SYS_PUSH(PINT0_MASK_SET)
380 PM_SYS_PUSH(PINT1_MASK_SET)
381 PM_SYS_PUSH(PINT2_MASK_SET)
382 PM_SYS_PUSH(PINT3_MASK_SET)
379 PM_SYS_PUSH(PINT0_ASSIGN) 383 PM_SYS_PUSH(PINT0_ASSIGN)
380 PM_SYS_PUSH(PINT1_ASSIGN) 384 PM_SYS_PUSH(PINT1_ASSIGN)
381 PM_SYS_PUSH(PINT2_ASSIGN) 385 PM_SYS_PUSH(PINT2_ASSIGN)
382 PM_SYS_PUSH(PINT3_ASSIGN) 386 PM_SYS_PUSH(PINT3_ASSIGN)
387 PM_SYS_PUSH(PINT0_INVERT_SET)
388 PM_SYS_PUSH(PINT1_INVERT_SET)
389 PM_SYS_PUSH(PINT2_INVERT_SET)
390 PM_SYS_PUSH(PINT3_INVERT_SET)
391 PM_SYS_PUSH(PINT0_EDGE_SET)
392 PM_SYS_PUSH(PINT1_EDGE_SET)
393 PM_SYS_PUSH(PINT2_EDGE_SET)
394 PM_SYS_PUSH(PINT3_EDGE_SET)
383#endif 395#endif
384 396
385 PM_SYS_PUSH(EBIU_AMBCTL0) 397 PM_SYS_PUSH(EBIU_AMBCTL0)
@@ -714,10 +726,22 @@ ENTRY(_do_hibernate)
714 PM_SYS_POP(EBIU_AMBCTL0) 726 PM_SYS_POP(EBIU_AMBCTL0)
715 727
716#ifdef PINT0_ASSIGN 728#ifdef PINT0_ASSIGN
729 PM_SYS_POP(PINT3_EDGE_SET)
730 PM_SYS_POP(PINT2_EDGE_SET)
731 PM_SYS_POP(PINT1_EDGE_SET)
732 PM_SYS_POP(PINT0_EDGE_SET)
733 PM_SYS_POP(PINT3_INVERT_SET)
734 PM_SYS_POP(PINT2_INVERT_SET)
735 PM_SYS_POP(PINT1_INVERT_SET)
736 PM_SYS_POP(PINT0_INVERT_SET)
717 PM_SYS_POP(PINT3_ASSIGN) 737 PM_SYS_POP(PINT3_ASSIGN)
718 PM_SYS_POP(PINT2_ASSIGN) 738 PM_SYS_POP(PINT2_ASSIGN)
719 PM_SYS_POP(PINT1_ASSIGN) 739 PM_SYS_POP(PINT1_ASSIGN)
720 PM_SYS_POP(PINT0_ASSIGN) 740 PM_SYS_POP(PINT0_ASSIGN)
741 PM_SYS_POP(PINT3_MASK_SET)
742 PM_SYS_POP(PINT2_MASK_SET)
743 PM_SYS_POP(PINT1_MASK_SET)
744 PM_SYS_POP(PINT0_MASK_SET)
721#endif 745#endif
722 746
723#ifdef SICA_IWR1 747#ifdef SICA_IWR1
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index 88de053bbe8e..21e65a339a22 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -600,6 +600,19 @@ ENTRY(_system_call)
600 p2 = [p2]; 600 p2 = [p2];
601 601
602 [p2+(TASK_THREAD+THREAD_KSP)] = sp; 602 [p2+(TASK_THREAD+THREAD_KSP)] = sp;
603#ifdef CONFIG_IPIPE
604 r0 = sp;
605 SP += -12;
606 call ___ipipe_syscall_root;
607 SP += 12;
608 cc = r0 == 1;
609 if cc jump .Lsyscall_really_exit;
610 cc = r0 == -1;
611 if cc jump .Lresume_userspace;
612 r3 = [sp + PT_R3];
613 r4 = [sp + PT_R4];
614 p0 = [sp + PT_ORIG_P0];
615#endif /* CONFIG_IPIPE */
603 616
604 /* Check the System Call */ 617 /* Check the System Call */
605 r7 = __NR_syscall; 618 r7 = __NR_syscall;
@@ -654,6 +667,17 @@ ENTRY(_system_call)
654 r7 = r7 & r4; 667 r7 = r7 & r4;
655 668
656.Lsyscall_resched: 669.Lsyscall_resched:
670#ifdef CONFIG_IPIPE
671 cc = BITTST(r7, TIF_IRQ_SYNC);
672 if !cc jump .Lsyscall_no_irqsync;
673 [--sp] = reti;
674 r0 = [sp++];
675 SP += -12;
676 call ___ipipe_sync_root;
677 SP += 12;
678 jump .Lresume_userspace_1;
679.Lsyscall_no_irqsync:
680#endif
657 cc = BITTST(r7, TIF_NEED_RESCHED); 681 cc = BITTST(r7, TIF_NEED_RESCHED);
658 if !cc jump .Lsyscall_sigpending; 682 if !cc jump .Lsyscall_sigpending;
659 683
@@ -685,6 +709,10 @@ ENTRY(_system_call)
685.Lsyscall_really_exit: 709.Lsyscall_really_exit:
686 r5 = [sp + PT_RESERVED]; 710 r5 = [sp + PT_RESERVED];
687 rets = r5; 711 rets = r5;
712#ifdef CONFIG_IPIPE
713 [--sp] = reti;
714 r5 = [sp++];
715#endif /* CONFIG_IPIPE */
688 rts; 716 rts;
689ENDPROC(_system_call) 717ENDPROC(_system_call)
690 718
@@ -771,6 +799,15 @@ _new_old_task:
771ENDPROC(_resume) 799ENDPROC(_resume)
772 800
773ENTRY(_ret_from_exception) 801ENTRY(_ret_from_exception)
802#ifdef CONFIG_IPIPE
803 [--sp] = rets;
804 SP += -12;
805 call ___ipipe_check_root
806 SP += 12
807 rets = [sp++];
808 cc = r0 == 0;
809 if cc jump 4f; /* not on behalf of Linux, get out */
810#endif /* CONFIG_IPIPE */
774 p2.l = lo(IPEND); 811 p2.l = lo(IPEND);
775 p2.h = hi(IPEND); 812 p2.h = hi(IPEND);
776 813
@@ -827,6 +864,28 @@ ENTRY(_ret_from_exception)
827 rts; 864 rts;
828ENDPROC(_ret_from_exception) 865ENDPROC(_ret_from_exception)
829 866
867#ifdef CONFIG_IPIPE
868
869_sync_root_irqs:
870 [--sp] = reti; /* Reenable interrupts */
871 r0 = [sp++];
872 jump.l ___ipipe_sync_root
873
874_resume_kernel_from_int:
875 r0.l = _sync_root_irqs
876 r0.h = _sync_root_irqs
877 [--sp] = rets;
878 [--sp] = ( r7:4, p5:3 );
879 SP += -12;
880 call ___ipipe_call_irqtail
881 SP += 12;
882 ( r7:4, p5:3 ) = [sp++];
883 rets = [sp++];
884 rts
885#else
886#define _resume_kernel_from_int 2f
887#endif
888
830ENTRY(_return_from_int) 889ENTRY(_return_from_int)
831 /* If someone else already raised IRQ 15, do nothing. */ 890 /* If someone else already raised IRQ 15, do nothing. */
832 csync; 891 csync;
@@ -848,7 +907,7 @@ ENTRY(_return_from_int)
848 r1 = r0 - r1; 907 r1 = r0 - r1;
849 r2 = r0 & r1; 908 r2 = r0 & r1;
850 cc = r2 == 0; 909 cc = r2 == 0;
851 if !cc jump 2f; 910 if !cc jump _resume_kernel_from_int;
852 911
853 /* Lower the interrupt level to 15. */ 912 /* Lower the interrupt level to 15. */
854 p0.l = lo(EVT15); 913 p0.l = lo(EVT15);
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S
index 43c4eb9acb65..0069c2dd4625 100644
--- a/arch/blackfin/mach-common/interrupt.S
+++ b/arch/blackfin/mach-common/interrupt.S
@@ -235,6 +235,7 @@ ENDPROC(_evt_system_call)
235 235
236#ifdef CONFIG_IPIPE 236#ifdef CONFIG_IPIPE
237ENTRY(___ipipe_call_irqtail) 237ENTRY(___ipipe_call_irqtail)
238 p0 = r0;
238 r0.l = 1f; 239 r0.l = 1f;
239 r0.h = 1f; 240 r0.h = 1f;
240 reti = r0; 241 reti = r0;
@@ -242,9 +243,6 @@ ENTRY(___ipipe_call_irqtail)
2421: 2431:
243 [--sp] = rets; 244 [--sp] = rets;
244 [--sp] = ( r7:4, p5:3 ); 245 [--sp] = ( r7:4, p5:3 );
245 p0.l = ___ipipe_irq_tail_hook;
246 p0.h = ___ipipe_irq_tail_hook;
247 p0 = [p0];
248 sp += -12; 246 sp += -12;
249 call (p0); 247 call (p0);
250 sp += 12; 248 sp += 12;
@@ -259,7 +257,7 @@ ENTRY(___ipipe_call_irqtail)
259 p0.h = hi(EVT14); 257 p0.h = hi(EVT14);
260 [p0] = r0; 258 [p0] = r0;
261 csync; 259 csync;
262 r0 = 0x401f; 260 r0 = 0x401f (z);
263 sti r0; 261 sti r0;
264 raise 14; 262 raise 14;
265 [--sp] = reti; /* IRQs on. */ 263 [--sp] = reti; /* IRQs on. */
@@ -277,11 +275,7 @@ ENTRY(___ipipe_call_irqtail)
277 p0.h = _bfin_irq_flags; 275 p0.h = _bfin_irq_flags;
278 r0 = [p0]; 276 r0 = [p0];
279 sti r0; 277 sti r0;
280#if 0 /* FIXME: this actually raises scheduling latencies */
281 /* Reenable interrupts */
282 [--sp] = reti;
283 r0 = [sp++];
284#endif
285 rts; 278 rts;
286ENDPROC(___ipipe_call_irqtail) 279ENDPROC(___ipipe_call_irqtail)
280
287#endif /* CONFIG_IPIPE */ 281#endif /* CONFIG_IPIPE */
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 202494568c6c..a7d7b2dd4059 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -161,11 +161,15 @@ static void bfin_core_unmask_irq(unsigned int irq)
161 161
162static void bfin_internal_mask_irq(unsigned int irq) 162static void bfin_internal_mask_irq(unsigned int irq)
163{ 163{
164 unsigned long flags;
165
164#ifdef CONFIG_BF53x 166#ifdef CONFIG_BF53x
167 local_irq_save_hw(flags);
165 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() & 168 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() &
166 ~(1 << SIC_SYSIRQ(irq))); 169 ~(1 << SIC_SYSIRQ(irq)));
167#else 170#else
168 unsigned mask_bank, mask_bit; 171 unsigned mask_bank, mask_bit;
172 local_irq_save_hw(flags);
169 mask_bank = SIC_SYSIRQ(irq) / 32; 173 mask_bank = SIC_SYSIRQ(irq) / 32;
170 mask_bit = SIC_SYSIRQ(irq) % 32; 174 mask_bit = SIC_SYSIRQ(irq) % 32;
171 bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) & 175 bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) &
@@ -175,15 +179,20 @@ static void bfin_internal_mask_irq(unsigned int irq)
175 ~(1 << mask_bit)); 179 ~(1 << mask_bit));
176#endif 180#endif
177#endif 181#endif
182 local_irq_restore_hw(flags);
178} 183}
179 184
180static void bfin_internal_unmask_irq(unsigned int irq) 185static void bfin_internal_unmask_irq(unsigned int irq)
181{ 186{
187 unsigned long flags;
188
182#ifdef CONFIG_BF53x 189#ifdef CONFIG_BF53x
190 local_irq_save_hw(flags);
183 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() | 191 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() |
184 (1 << SIC_SYSIRQ(irq))); 192 (1 << SIC_SYSIRQ(irq)));
185#else 193#else
186 unsigned mask_bank, mask_bit; 194 unsigned mask_bank, mask_bit;
195 local_irq_save_hw(flags);
187 mask_bank = SIC_SYSIRQ(irq) / 32; 196 mask_bank = SIC_SYSIRQ(irq) / 32;
188 mask_bit = SIC_SYSIRQ(irq) % 32; 197 mask_bit = SIC_SYSIRQ(irq) % 32;
189 bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) | 198 bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) |
@@ -193,6 +202,7 @@ static void bfin_internal_unmask_irq(unsigned int irq)
193 (1 << mask_bit)); 202 (1 << mask_bit));
194#endif 203#endif
195#endif 204#endif
205 local_irq_restore_hw(flags);
196} 206}
197 207
198#ifdef CONFIG_PM 208#ifdef CONFIG_PM
@@ -390,7 +400,7 @@ static void bfin_demux_error_irq(unsigned int int_err_irq,
390static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle) 400static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle)
391{ 401{
392#ifdef CONFIG_IPIPE 402#ifdef CONFIG_IPIPE
393 _set_irq_handler(irq, handle_edge_irq); 403 _set_irq_handler(irq, handle_level_irq);
394#else 404#else
395 struct irq_desc *desc = irq_desc + irq; 405 struct irq_desc *desc = irq_desc + irq;
396 /* May not call generic set_irq_handler() due to spinlock 406 /* May not call generic set_irq_handler() due to spinlock
@@ -1055,13 +1065,18 @@ int __init init_arch_irq(void)
1055#endif 1065#endif
1056 default: 1066 default:
1057#ifdef CONFIG_IPIPE 1067#ifdef CONFIG_IPIPE
1058 /* 1068 /*
1059 * We want internal interrupt sources to be masked, because 1069 * We want internal interrupt sources to be
1060 * ISRs may trigger interrupts recursively (e.g. DMA), but 1070 * masked, because ISRs may trigger interrupts
1061 * interrupts are _not_ masked at CPU level. So let's handle 1071 * recursively (e.g. DMA), but interrupts are
1062 * them as level interrupts. 1072 * _not_ masked at CPU level. So let's handle
1063 */ 1073 * most of them as level interrupts, except
1064 set_irq_handler(irq, handle_level_irq); 1074 * the timer interrupt which is special.
1075 */
1076 if (irq == IRQ_SYSTMR || irq == IRQ_CORETMR)
1077 set_irq_handler(irq, handle_simple_irq);
1078 else
1079 set_irq_handler(irq, handle_level_irq);
1065#else /* !CONFIG_IPIPE */ 1080#else /* !CONFIG_IPIPE */
1066 set_irq_handler(irq, handle_simple_irq); 1081 set_irq_handler(irq, handle_simple_irq);
1067#endif /* !CONFIG_IPIPE */ 1082#endif /* !CONFIG_IPIPE */
@@ -1123,9 +1138,8 @@ int __init init_arch_irq(void)
1123 1138
1124#ifdef CONFIG_IPIPE 1139#ifdef CONFIG_IPIPE
1125 for (irq = 0; irq < NR_IRQS; irq++) { 1140 for (irq = 0; irq < NR_IRQS; irq++) {
1126 struct irq_desc *desc = irq_desc + irq; 1141 struct irq_desc *desc = irq_to_desc(irq);
1127 desc->ic_prio = __ipipe_get_irq_priority(irq); 1142 desc->ic_prio = __ipipe_get_irq_priority(irq);
1128 desc->thr_prio = __ipipe_get_irqthread_priority(irq);
1129 } 1143 }
1130#endif /* CONFIG_IPIPE */ 1144#endif /* CONFIG_IPIPE */
1131 1145
@@ -1208,76 +1222,21 @@ int __ipipe_get_irq_priority(unsigned irq)
1208 return IVG15; 1222 return IVG15;
1209} 1223}
1210 1224
1211int __ipipe_get_irqthread_priority(unsigned irq)
1212{
1213 int ient, prio;
1214 int demux_irq;
1215
1216 /* The returned priority value is rescaled to [0..IVG13+1]
1217 * with 0 being the lowest effective priority level. */
1218
1219 if (irq <= IRQ_CORETMR)
1220 return IVG13 - irq + 1;
1221
1222 /* GPIO IRQs are given the priority of the demux
1223 * interrupt. */
1224 if (IS_GPIOIRQ(irq)) {
1225#if defined(CONFIG_BF54x)
1226 u32 bank = PINT_2_BANK(irq2pint_lut[irq - SYS_IRQS]);
1227 demux_irq = (bank == 0 ? IRQ_PINT0 :
1228 bank == 1 ? IRQ_PINT1 :
1229 bank == 2 ? IRQ_PINT2 :
1230 IRQ_PINT3);
1231#elif defined(CONFIG_BF561)
1232 demux_irq = (irq >= IRQ_PF32 ? IRQ_PROG2_INTA :
1233 irq >= IRQ_PF16 ? IRQ_PROG1_INTA :
1234 IRQ_PROG0_INTA);
1235#elif defined(CONFIG_BF52x)
1236 demux_irq = (irq >= IRQ_PH0 ? IRQ_PORTH_INTA :
1237 irq >= IRQ_PG0 ? IRQ_PORTG_INTA :
1238 IRQ_PORTF_INTA);
1239#else
1240 demux_irq = irq;
1241#endif
1242 return IVG13 - PRIO_GPIODEMUX(demux_irq) + 1;
1243 }
1244
1245 /* The GPIO demux interrupt is given a lower priority
1246 * than the GPIO IRQs, so that its threaded handler
1247 * unmasks the interrupt line after the decoded IRQs
1248 * have been processed. */
1249 prio = PRIO_GPIODEMUX(irq);
1250 /* demux irq? */
1251 if (prio != -1)
1252 return IVG13 - prio;
1253
1254 for (ient = 0; ient < NR_PERI_INTS; ient++) {
1255 struct ivgx *ivg = ivg_table + ient;
1256 if (ivg->irqno == irq) {
1257 for (prio = 0; prio <= IVG13-IVG7; prio++) {
1258 if (ivg7_13[prio].ifirst <= ivg &&
1259 ivg7_13[prio].istop > ivg)
1260 return IVG7 - prio;
1261 }
1262 }
1263 }
1264
1265 return 0;
1266}
1267
1268/* Hw interrupts are disabled on entry (check SAVE_CONTEXT). */ 1225/* Hw interrupts are disabled on entry (check SAVE_CONTEXT). */
1269#ifdef CONFIG_DO_IRQ_L1 1226#ifdef CONFIG_DO_IRQ_L1
1270__attribute__((l1_text)) 1227__attribute__((l1_text))
1271#endif 1228#endif
1272asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) 1229asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs)
1273{ 1230{
1231 struct ipipe_percpu_domain_data *p = ipipe_root_cpudom_ptr();
1232 struct ipipe_domain *this_domain = ipipe_current_domain;
1274 struct ivgx *ivg_stop = ivg7_13[vec-IVG7].istop; 1233 struct ivgx *ivg_stop = ivg7_13[vec-IVG7].istop;
1275 struct ivgx *ivg = ivg7_13[vec-IVG7].ifirst; 1234 struct ivgx *ivg = ivg7_13[vec-IVG7].ifirst;
1276 int irq; 1235 int irq, s;
1277 1236
1278 if (likely(vec == EVT_IVTMR_P)) { 1237 if (likely(vec == EVT_IVTMR_P)) {
1279 irq = IRQ_CORETMR; 1238 irq = IRQ_CORETMR;
1280 goto handle_irq; 1239 goto core_tick;
1281 } 1240 }
1282 1241
1283 SSYNC(); 1242 SSYNC();
@@ -1319,24 +1278,39 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs)
1319 irq = ivg->irqno; 1278 irq = ivg->irqno;
1320 1279
1321 if (irq == IRQ_SYSTMR) { 1280 if (irq == IRQ_SYSTMR) {
1281#ifdef CONFIG_GENERIC_CLOCKEVENTS
1282core_tick:
1283#else
1322 bfin_write_TIMER_STATUS(1); /* Latch TIMIL0 */ 1284 bfin_write_TIMER_STATUS(1); /* Latch TIMIL0 */
1285#endif
1323 /* This is basically what we need from the register frame. */ 1286 /* This is basically what we need from the register frame. */
1324 __raw_get_cpu_var(__ipipe_tick_regs).ipend = regs->ipend; 1287 __raw_get_cpu_var(__ipipe_tick_regs).ipend = regs->ipend;
1325 __raw_get_cpu_var(__ipipe_tick_regs).pc = regs->pc; 1288 __raw_get_cpu_var(__ipipe_tick_regs).pc = regs->pc;
1326 if (!ipipe_root_domain_p) 1289 if (this_domain != ipipe_root_domain)
1327 __raw_get_cpu_var(__ipipe_tick_regs).ipend |= 0x10;
1328 else
1329 __raw_get_cpu_var(__ipipe_tick_regs).ipend &= ~0x10; 1290 __raw_get_cpu_var(__ipipe_tick_regs).ipend &= ~0x10;
1291 else
1292 __raw_get_cpu_var(__ipipe_tick_regs).ipend |= 0x10;
1330 } 1293 }
1331 1294
1332handle_irq: 1295#ifndef CONFIG_GENERIC_CLOCKEVENTS
1296core_tick:
1297#endif
1298 if (this_domain == ipipe_root_domain) {
1299 s = __test_and_set_bit(IPIPE_SYNCDEFER_FLAG, &p->status);
1300 barrier();
1301 }
1333 1302
1334 ipipe_trace_irq_entry(irq); 1303 ipipe_trace_irq_entry(irq);
1335 __ipipe_handle_irq(irq, regs); 1304 __ipipe_handle_irq(irq, regs);
1336 ipipe_trace_irq_exit(irq); 1305 ipipe_trace_irq_exit(irq);
1337 1306
1338 if (ipipe_root_domain_p) 1307 if (this_domain == ipipe_root_domain) {
1339 return !test_bit(IPIPE_STALL_FLAG, &ipipe_root_cpudom_var(status)); 1308 set_thread_flag(TIF_IRQ_SYNC);
1309 if (!s) {
1310 __clear_bit(IPIPE_SYNCDEFER_FLAG, &p->status);
1311 return !test_bit(IPIPE_STALL_FLAG, &p->status);
1312 }
1313 }
1340 1314
1341 return 0; 1315 return 0;
1342} 1316}
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c
index 77c992847094..93eab6146079 100644
--- a/arch/blackfin/mach-common/smp.c
+++ b/arch/blackfin/mach-common/smp.c
@@ -158,10 +158,14 @@ static irqreturn_t ipi_handler(int irq, void *dev_instance)
158 kfree(msg); 158 kfree(msg);
159 break; 159 break;
160 case BFIN_IPI_CALL_FUNC: 160 case BFIN_IPI_CALL_FUNC:
161 spin_unlock(&msg_queue->lock);
161 ipi_call_function(cpu, msg); 162 ipi_call_function(cpu, msg);
163 spin_lock(&msg_queue->lock);
162 break; 164 break;
163 case BFIN_IPI_CPU_STOP: 165 case BFIN_IPI_CPU_STOP:
166 spin_unlock(&msg_queue->lock);
164 ipi_cpu_stop(cpu); 167 ipi_cpu_stop(cpu);
168 spin_lock(&msg_queue->lock);
165 kfree(msg); 169 kfree(msg);
166 break; 170 break;
167 default: 171 default:
@@ -457,7 +461,7 @@ void smp_icache_flush_range_others(unsigned long start, unsigned long end)
457 smp_flush_data.start = start; 461 smp_flush_data.start = start;
458 smp_flush_data.end = end; 462 smp_flush_data.end = end;
459 463
460 if (smp_call_function(&ipi_flush_icache, &smp_flush_data, 1)) 464 if (smp_call_function(&ipi_flush_icache, &smp_flush_data, 0))
461 printk(KERN_WARNING "SMP: failed to run I-cache flush request on other CPUs\n"); 465 printk(KERN_WARNING "SMP: failed to run I-cache flush request on other CPUs\n");
462} 466}
463EXPORT_SYMBOL_GPL(smp_icache_flush_range_others); 467EXPORT_SYMBOL_GPL(smp_icache_flush_range_others);
diff --git a/arch/blackfin/mm/init.c b/arch/blackfin/mm/init.c
index d0532b72bba5..9c3629b9a689 100644
--- a/arch/blackfin/mm/init.c
+++ b/arch/blackfin/mm/init.c
@@ -104,7 +104,7 @@ void __init paging_init(void)
104 } 104 }
105} 105}
106 106
107asmlinkage void init_pda(void) 107asmlinkage void __init init_pda(void)
108{ 108{
109 unsigned int cpu = raw_smp_processor_id(); 109 unsigned int cpu = raw_smp_processor_id();
110 110
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_dma.c b/arch/ia64/sn/pci/pcibr/pcibr_dma.c
index e626e50a938a..060df4aa9916 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_dma.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_dma.c
@@ -135,11 +135,10 @@ pcibr_dmatrans_direct64(struct pcidev_info * info, u64 paddr,
135 if (SN_DMA_ADDRTYPE(dma_flags) == SN_DMA_ADDR_PHYS) 135 if (SN_DMA_ADDRTYPE(dma_flags) == SN_DMA_ADDR_PHYS)
136 pci_addr = IS_PIC_SOFT(pcibus_info) ? 136 pci_addr = IS_PIC_SOFT(pcibus_info) ?
137 PHYS_TO_DMA(paddr) : 137 PHYS_TO_DMA(paddr) :
138 PHYS_TO_TIODMA(paddr) | dma_attributes; 138 PHYS_TO_TIODMA(paddr);
139 else 139 else
140 pci_addr = IS_PIC_SOFT(pcibus_info) ? 140 pci_addr = paddr;
141 paddr : 141 pci_addr |= dma_attributes;
142 paddr | dma_attributes;
143 142
144 /* Handle Bus mode */ 143 /* Handle Bus mode */
145 if (IS_PCIX(pcibus_info)) 144 if (IS_PCIX(pcibus_info))
diff --git a/arch/m68knommu/platform/5206e/config.c b/arch/m68knommu/platform/5206e/config.c
index d01a5d2b7557..db902540bf2c 100644
--- a/arch/m68knommu/platform/5206e/config.c
+++ b/arch/m68knommu/platform/5206e/config.c
@@ -17,6 +17,7 @@
17#include <asm/coldfire.h> 17#include <asm/coldfire.h>
18#include <asm/mcfsim.h> 18#include <asm/mcfsim.h>
19#include <asm/mcfdma.h> 19#include <asm/mcfdma.h>
20#include <asm/mcfuart.h>
20 21
21/***************************************************************************/ 22/***************************************************************************/
22 23
diff --git a/arch/m68knommu/platform/528x/config.c b/arch/m68knommu/platform/528x/config.c
index dfdb5c2ed8e6..44baeb225dc7 100644
--- a/arch/m68knommu/platform/528x/config.c
+++ b/arch/m68knommu/platform/528x/config.c
@@ -24,7 +24,6 @@
24#include <asm/coldfire.h> 24#include <asm/coldfire.h>
25#include <asm/mcfsim.h> 25#include <asm/mcfsim.h>
26#include <asm/mcfuart.h> 26#include <asm/mcfuart.h>
27#include <asm/mcfqspi.h>
28 27
29#ifdef CONFIG_MTD_PARTITIONS 28#ifdef CONFIG_MTD_PARTITIONS
30#include <linux/mtd/partitions.h> 29#include <linux/mtd/partitions.h>
@@ -33,233 +32,6 @@
33/***************************************************************************/ 32/***************************************************************************/
34 33
35void coldfire_reset(void); 34void coldfire_reset(void);
36static void coldfire_qspi_cs_control(u8 cs, u8 command);
37
38/***************************************************************************/
39
40#if defined(CONFIG_SPI)
41
42#if defined(CONFIG_WILDFIRE)
43#define SPI_NUM_CHIPSELECTS 0x02
44#define SPI_PAR_VAL 0x07 /* Enable DIN, DOUT, CLK */
45#define SPI_CS_MASK 0x18
46
47#define FLASH_BLOCKSIZE (1024*64)
48#define FLASH_NUMBLOCKS 16
49#define FLASH_TYPE "m25p80"
50
51#define M25P80_CS 0
52#define MMC_CS 1
53
54#ifdef CONFIG_MTD_PARTITIONS
55static struct mtd_partition stm25p_partitions[] = {
56 /* sflash */
57 [0] = {
58 .name = "stm25p80",
59 .offset = 0x00000000,
60 .size = FLASH_BLOCKSIZE * FLASH_NUMBLOCKS,
61 .mask_flags = 0
62 }
63};
64
65#endif
66
67#elif defined(CONFIG_WILDFIREMOD)
68
69#define SPI_NUM_CHIPSELECTS 0x08
70#define SPI_PAR_VAL 0x07 /* Enable DIN, DOUT, CLK */
71#define SPI_CS_MASK 0x78
72
73#define FLASH_BLOCKSIZE (1024*64)
74#define FLASH_NUMBLOCKS 64
75#define FLASH_TYPE "m25p32"
76/* Reserve 1M for the kernel parition */
77#define FLASH_KERNEL_SIZE (1024 * 1024)
78
79#define M25P80_CS 5
80#define MMC_CS 6
81
82#ifdef CONFIG_MTD_PARTITIONS
83static struct mtd_partition stm25p_partitions[] = {
84 /* sflash */
85 [0] = {
86 .name = "kernel",
87 .offset = FLASH_BLOCKSIZE * FLASH_NUMBLOCKS - FLASH_KERNEL_SIZE,
88 .size = FLASH_KERNEL_SIZE,
89 .mask_flags = 0
90 },
91 [1] = {
92 .name = "image",
93 .offset = 0x00000000,
94 .size = FLASH_BLOCKSIZE * FLASH_NUMBLOCKS - FLASH_KERNEL_SIZE,
95 .mask_flags = 0
96 },
97 [2] = {
98 .name = "all",
99 .offset = 0x00000000,
100 .size = FLASH_BLOCKSIZE * FLASH_NUMBLOCKS,
101 .mask_flags = 0
102 }
103};
104#endif
105
106#else
107#define SPI_NUM_CHIPSELECTS 0x04
108#define SPI_PAR_VAL 0x7F /* Enable DIN, DOUT, CLK, CS0 - CS4 */
109#endif
110
111#ifdef MMC_CS
112static struct coldfire_spi_chip flash_chip_info = {
113 .mode = SPI_MODE_0,
114 .bits_per_word = 16,
115 .del_cs_to_clk = 17,
116 .del_after_trans = 1,
117 .void_write_data = 0
118};
119
120static struct coldfire_spi_chip mmc_chip_info = {
121 .mode = SPI_MODE_0,
122 .bits_per_word = 16,
123 .del_cs_to_clk = 17,
124 .del_after_trans = 1,
125 .void_write_data = 0xFFFF
126};
127#endif
128
129#ifdef M25P80_CS
130static struct flash_platform_data stm25p80_platform_data = {
131 .name = "ST M25P80 SPI Flash chip",
132#ifdef CONFIG_MTD_PARTITIONS
133 .parts = stm25p_partitions,
134 .nr_parts = sizeof(stm25p_partitions) / sizeof(*stm25p_partitions),
135#endif
136 .type = FLASH_TYPE
137};
138#endif
139
140static struct spi_board_info spi_board_info[] __initdata = {
141#ifdef M25P80_CS
142 {
143 .modalias = "m25p80",
144 .max_speed_hz = 16000000,
145 .bus_num = 1,
146 .chip_select = M25P80_CS,
147 .platform_data = &stm25p80_platform_data,
148 .controller_data = &flash_chip_info
149 },
150#endif
151#ifdef MMC_CS
152 {
153 .modalias = "mmc_spi",
154 .max_speed_hz = 16000000,
155 .bus_num = 1,
156 .chip_select = MMC_CS,
157 .controller_data = &mmc_chip_info
158 }
159#endif
160};
161
162static struct coldfire_spi_master coldfire_master_info = {
163 .bus_num = 1,
164 .num_chipselect = SPI_NUM_CHIPSELECTS,
165 .irq_source = MCF5282_QSPI_IRQ_SOURCE,
166 .irq_vector = MCF5282_QSPI_IRQ_VECTOR,
167 .irq_mask = ((0x01 << MCF5282_QSPI_IRQ_SOURCE) | 0x01),
168 .irq_lp = 0x2B, /* Level 5 and Priority 3 */
169 .par_val = SPI_PAR_VAL,
170 .cs_control = coldfire_qspi_cs_control,
171};
172
173static struct resource coldfire_spi_resources[] = {
174 [0] = {
175 .name = "qspi-par",
176 .start = MCF5282_QSPI_PAR,
177 .end = MCF5282_QSPI_PAR,
178 .flags = IORESOURCE_MEM
179 },
180
181 [1] = {
182 .name = "qspi-module",
183 .start = MCF5282_QSPI_QMR,
184 .end = MCF5282_QSPI_QMR + 0x18,
185 .flags = IORESOURCE_MEM
186 },
187
188 [2] = {
189 .name = "qspi-int-level",
190 .start = MCF5282_INTC0 + MCFINTC_ICR0 + MCF5282_QSPI_IRQ_SOURCE,
191 .end = MCF5282_INTC0 + MCFINTC_ICR0 + MCF5282_QSPI_IRQ_SOURCE,
192 .flags = IORESOURCE_MEM
193 },
194
195 [3] = {
196 .name = "qspi-int-mask",
197 .start = MCF5282_INTC0 + MCFINTC_IMRL,
198 .end = MCF5282_INTC0 + MCFINTC_IMRL,
199 .flags = IORESOURCE_MEM
200 }
201};
202
203static struct platform_device coldfire_spi = {
204 .name = "spi_coldfire",
205 .id = -1,
206 .resource = coldfire_spi_resources,
207 .num_resources = ARRAY_SIZE(coldfire_spi_resources),
208 .dev = {
209 .platform_data = &coldfire_master_info,
210 }
211};
212
213static void coldfire_qspi_cs_control(u8 cs, u8 command)
214{
215 u8 cs_bit = ((0x01 << cs) << 3) & SPI_CS_MASK;
216
217#if defined(CONFIG_WILDFIRE)
218 u8 cs_mask = ~(((0x01 << cs) << 3) & SPI_CS_MASK);
219#endif
220#if defined(CONFIG_WILDFIREMOD)
221 u8 cs_mask = (cs << 3) & SPI_CS_MASK;
222#endif
223
224 /*
225 * Don't do anything if the chip select is not
226 * one of the port qs pins.
227 */
228 if (command & QSPI_CS_INIT) {
229#if defined(CONFIG_WILDFIRE)
230 MCF5282_GPIO_DDRQS |= cs_bit;
231 MCF5282_GPIO_PQSPAR &= ~cs_bit;
232#endif
233
234#if defined(CONFIG_WILDFIREMOD)
235 MCF5282_GPIO_DDRQS |= SPI_CS_MASK;
236 MCF5282_GPIO_PQSPAR &= ~SPI_CS_MASK;
237#endif
238 }
239
240 if (command & QSPI_CS_ASSERT) {
241 MCF5282_GPIO_PORTQS &= ~SPI_CS_MASK;
242 MCF5282_GPIO_PORTQS |= cs_mask;
243 } else if (command & QSPI_CS_DROP) {
244 MCF5282_GPIO_PORTQS |= SPI_CS_MASK;
245 }
246}
247
248static int __init spi_dev_init(void)
249{
250 int retval;
251
252 retval = platform_device_register(&coldfire_spi);
253 if (retval < 0)
254 return retval;
255
256 if (ARRAY_SIZE(spi_board_info))
257 retval = spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
258
259 return retval;
260}
261
262#endif /* CONFIG_SPI */
263 35
264/***************************************************************************/ 36/***************************************************************************/
265 37
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig
index f2baea3039bb..0208723adf28 100644
--- a/arch/mips/configs/ip27_defconfig
+++ b/arch/mips/configs/ip27_defconfig
@@ -512,7 +512,7 @@ CONFIG_MD_LINEAR=m
512CONFIG_MD_RAID0=y 512CONFIG_MD_RAID0=y
513CONFIG_MD_RAID1=y 513CONFIG_MD_RAID1=y
514CONFIG_MD_RAID10=m 514CONFIG_MD_RAID10=m
515CONFIG_MD_RAID456=m 515CONFIG_MD_RAID456=y
516CONFIG_MD_RAID5_RESHAPE=y 516CONFIG_MD_RAID5_RESHAPE=y
517CONFIG_MD_MULTIPATH=m 517CONFIG_MD_MULTIPATH=m
518CONFIG_MD_FAULTY=m 518CONFIG_MD_FAULTY=m
diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig
index 9d5bd2a0af3d..5380f1f582d9 100644
--- a/arch/mips/configs/jmr3927_defconfig
+++ b/arch/mips/configs/jmr3927_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc9 3# Linux kernel version: 2.6.29-rc7
4# Fri Jul 11 23:01:36 2008 4# Wed Mar 4 23:07:16 2009
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -18,8 +18,10 @@ CONFIG_MIPS=y
18# CONFIG_LEMOTE_FULONG is not set 18# CONFIG_LEMOTE_FULONG is not set
19# CONFIG_MIPS_MALTA is not set 19# CONFIG_MIPS_MALTA is not set
20# CONFIG_MIPS_SIM is not set 20# CONFIG_MIPS_SIM is not set
21# CONFIG_MARKEINS is not set 21# CONFIG_MACH_EMMA is not set
22# CONFIG_MACH_VR41XX is not set 22# CONFIG_MACH_VR41XX is not set
23# CONFIG_NXP_STB220 is not set
24# CONFIG_NXP_STB225 is not set
23# CONFIG_PNX8550_JBS is not set 25# CONFIG_PNX8550_JBS is not set
24# CONFIG_PNX8550_STB810 is not set 26# CONFIG_PNX8550_STB810 is not set
25# CONFIG_PMC_MSP is not set 27# CONFIG_PMC_MSP is not set
@@ -39,7 +41,11 @@ CONFIG_MIPS=y
39# CONFIG_SNI_RM is not set 41# CONFIG_SNI_RM is not set
40CONFIG_MACH_TX39XX=y 42CONFIG_MACH_TX39XX=y
41# CONFIG_MACH_TX49XX is not set 43# CONFIG_MACH_TX49XX is not set
44# CONFIG_MIKROTIK_RB532 is not set
42# CONFIG_WR_PPMC is not set 45# CONFIG_WR_PPMC is not set
46# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
47# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
48CONFIG_MACH_TXX9=y
43CONFIG_TOSHIBA_JMR3927=y 49CONFIG_TOSHIBA_JMR3927=y
44CONFIG_SOC_TX3927=y 50CONFIG_SOC_TX3927=y
45# CONFIG_TOSHIBA_FPCIB0 is not set 51# CONFIG_TOSHIBA_FPCIB0 is not set
@@ -54,12 +60,14 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y
54CONFIG_GENERIC_CLOCKEVENTS=y 60CONFIG_GENERIC_CLOCKEVENTS=y
55CONFIG_GENERIC_TIME=y 61CONFIG_GENERIC_TIME=y
56CONFIG_GENERIC_CMOS_UPDATE=y 62CONFIG_GENERIC_CMOS_UPDATE=y
57CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 63CONFIG_SCHED_OMIT_FRAME_POINTER=y
58CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 64CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
59CONFIG_CEVT_TXX9=y 65CONFIG_CEVT_TXX9=y
60CONFIG_GPIO_TXX9=y 66CONFIG_GPIO_TXX9=y
61CONFIG_DMA_NONCOHERENT=y 67CONFIG_DMA_NONCOHERENT=y
62CONFIG_DMA_NEED_PCI_MAP_STATE=y 68CONFIG_DMA_NEED_PCI_MAP_STATE=y
69CONFIG_EARLY_PRINTK=y
70CONFIG_SYS_HAS_EARLY_PRINTK=y
63# CONFIG_HOTPLUG_CPU is not set 71# CONFIG_HOTPLUG_CPU is not set
64# CONFIG_NO_IOPORT is not set 72# CONFIG_NO_IOPORT is not set
65CONFIG_GENERIC_GPIO=y 73CONFIG_GENERIC_GPIO=y
@@ -87,6 +95,7 @@ CONFIG_CPU_TX39XX=y
87# CONFIG_CPU_TX49XX is not set 95# CONFIG_CPU_TX49XX is not set
88# CONFIG_CPU_R5000 is not set 96# CONFIG_CPU_R5000 is not set
89# CONFIG_CPU_R5432 is not set 97# CONFIG_CPU_R5432 is not set
98# CONFIG_CPU_R5500 is not set
90# CONFIG_CPU_R6000 is not set 99# CONFIG_CPU_R6000 is not set
91# CONFIG_CPU_NEVADA is not set 100# CONFIG_CPU_NEVADA is not set
92# CONFIG_CPU_R8000 is not set 101# CONFIG_CPU_R8000 is not set
@@ -94,6 +103,7 @@ CONFIG_CPU_TX39XX=y
94# CONFIG_CPU_RM7000 is not set 103# CONFIG_CPU_RM7000 is not set
95# CONFIG_CPU_RM9000 is not set 104# CONFIG_CPU_RM9000 is not set
96# CONFIG_CPU_SB1 is not set 105# CONFIG_CPU_SB1 is not set
106# CONFIG_CPU_CAVIUM_OCTEON is not set
97CONFIG_SYS_HAS_CPU_TX39XX=y 107CONFIG_SYS_HAS_CPU_TX39XX=y
98CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y 108CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
99CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y 109CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
@@ -117,14 +127,12 @@ CONFIG_ARCH_FLATMEM_ENABLE=y
117CONFIG_ARCH_POPULATES_NODE_MAP=y 127CONFIG_ARCH_POPULATES_NODE_MAP=y
118CONFIG_FLATMEM=y 128CONFIG_FLATMEM=y
119CONFIG_FLAT_NODE_MEM_MAP=y 129CONFIG_FLAT_NODE_MEM_MAP=y
120# CONFIG_SPARSEMEM_STATIC is not set
121# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
122CONFIG_PAGEFLAGS_EXTENDED=y 130CONFIG_PAGEFLAGS_EXTENDED=y
123CONFIG_SPLIT_PTLOCK_CPUS=4 131CONFIG_SPLIT_PTLOCK_CPUS=4
124# CONFIG_RESOURCES_64BIT is not set 132# CONFIG_PHYS_ADDR_T_64BIT is not set
125CONFIG_ZONE_DMA_FLAG=0 133CONFIG_ZONE_DMA_FLAG=0
126CONFIG_VIRT_TO_BUS=y 134CONFIG_VIRT_TO_BUS=y
127# CONFIG_TICK_ONESHOT is not set 135CONFIG_UNEVICTABLE_LRU=y
128# CONFIG_NO_HZ is not set 136# CONFIG_NO_HZ is not set
129# CONFIG_HIGH_RES_TIMERS is not set 137# CONFIG_HIGH_RES_TIMERS is not set
130CONFIG_GENERIC_CLOCKEVENTS_BUILD=y 138CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
@@ -159,6 +167,15 @@ CONFIG_SYSVIPC_SYSCTL=y
159# CONFIG_BSD_PROCESS_ACCT is not set 167# CONFIG_BSD_PROCESS_ACCT is not set
160# CONFIG_TASKSTATS is not set 168# CONFIG_TASKSTATS is not set
161# CONFIG_AUDIT is not set 169# CONFIG_AUDIT is not set
170
171#
172# RCU Subsystem
173#
174CONFIG_CLASSIC_RCU=y
175# CONFIG_TREE_RCU is not set
176# CONFIG_PREEMPT_RCU is not set
177# CONFIG_TREE_RCU_TRACE is not set
178# CONFIG_PREEMPT_RCU_TRACE is not set
162# CONFIG_IKCONFIG is not set 179# CONFIG_IKCONFIG is not set
163CONFIG_LOG_BUF_SHIFT=14 180CONFIG_LOG_BUF_SHIFT=14
164# CONFIG_CGROUPS is not set 181# CONFIG_CGROUPS is not set
@@ -171,7 +188,6 @@ CONFIG_CC_OPTIMIZE_FOR_SIZE=y
171CONFIG_SYSCTL=y 188CONFIG_SYSCTL=y
172CONFIG_EMBEDDED=y 189CONFIG_EMBEDDED=y
173CONFIG_SYSCTL_SYSCALL=y 190CONFIG_SYSCTL_SYSCALL=y
174CONFIG_SYSCTL_SYSCALL_CHECK=y
175CONFIG_KALLSYMS=y 191CONFIG_KALLSYMS=y
176# CONFIG_KALLSYMS_EXTRA_PASS is not set 192# CONFIG_KALLSYMS_EXTRA_PASS is not set
177# CONFIG_HOTPLUG is not set 193# CONFIG_HOTPLUG is not set
@@ -188,26 +204,23 @@ CONFIG_SIGNALFD=y
188CONFIG_TIMERFD=y 204CONFIG_TIMERFD=y
189CONFIG_EVENTFD=y 205CONFIG_EVENTFD=y
190CONFIG_SHMEM=y 206CONFIG_SHMEM=y
207CONFIG_AIO=y
191CONFIG_VM_EVENT_COUNTERS=y 208CONFIG_VM_EVENT_COUNTERS=y
209CONFIG_PCI_QUIRKS=y
192CONFIG_SLAB=y 210CONFIG_SLAB=y
193# CONFIG_SLUB is not set 211# CONFIG_SLUB is not set
194# CONFIG_SLOB is not set 212# CONFIG_SLOB is not set
195# CONFIG_PROFILING is not set 213# CONFIG_PROFILING is not set
196# CONFIG_MARKERS is not set
197CONFIG_HAVE_OPROFILE=y 214CONFIG_HAVE_OPROFILE=y
198# CONFIG_HAVE_KPROBES is not set 215# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
199# CONFIG_HAVE_KRETPROBES is not set
200# CONFIG_HAVE_DMA_ATTRS is not set
201CONFIG_PROC_PAGE_MONITOR=y
202CONFIG_SLABINFO=y 216CONFIG_SLABINFO=y
203CONFIG_RT_MUTEXES=y 217CONFIG_RT_MUTEXES=y
204# CONFIG_TINY_SHMEM is not set
205CONFIG_BASE_SMALL=0 218CONFIG_BASE_SMALL=0
206# CONFIG_MODULES is not set 219# CONFIG_MODULES is not set
207CONFIG_BLOCK=y 220CONFIG_BLOCK=y
208# CONFIG_LBD is not set 221# CONFIG_LBD is not set
209# CONFIG_BLK_DEV_IO_TRACE is not set 222# CONFIG_BLK_DEV_IO_TRACE is not set
210# CONFIG_LSF is not set 223# CONFIG_BLK_DEV_INTEGRITY is not set
211 224
212# 225#
213# IO Schedulers 226# IO Schedulers
@@ -221,7 +234,7 @@ CONFIG_IOSCHED_CFQ=y
221CONFIG_DEFAULT_CFQ=y 234CONFIG_DEFAULT_CFQ=y
222# CONFIG_DEFAULT_NOOP is not set 235# CONFIG_DEFAULT_NOOP is not set
223CONFIG_DEFAULT_IOSCHED="cfq" 236CONFIG_DEFAULT_IOSCHED="cfq"
224CONFIG_CLASSIC_RCU=y 237# CONFIG_FREEZER is not set
225 238
226# 239#
227# Bus options (PCI, PCMCIA, EISA, ISA, TC) 240# Bus options (PCI, PCMCIA, EISA, ISA, TC)
@@ -231,12 +244,15 @@ CONFIG_PCI=y
231CONFIG_PCI_DOMAINS=y 244CONFIG_PCI_DOMAINS=y
232# CONFIG_ARCH_SUPPORTS_MSI is not set 245# CONFIG_ARCH_SUPPORTS_MSI is not set
233CONFIG_PCI_LEGACY=y 246CONFIG_PCI_LEGACY=y
247# CONFIG_PCI_STUB is not set
234CONFIG_MMU=y 248CONFIG_MMU=y
235 249
236# 250#
237# Executable file formats 251# Executable file formats
238# 252#
239CONFIG_BINFMT_ELF=y 253CONFIG_BINFMT_ELF=y
254# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
255# CONFIG_HAVE_AOUT is not set
240# CONFIG_BINFMT_MISC is not set 256# CONFIG_BINFMT_MISC is not set
241CONFIG_TRAD_SIGNALS=y 257CONFIG_TRAD_SIGNALS=y
242 258
@@ -245,15 +261,12 @@ CONFIG_TRAD_SIGNALS=y
245# 261#
246CONFIG_ARCH_SUSPEND_POSSIBLE=y 262CONFIG_ARCH_SUSPEND_POSSIBLE=y
247# CONFIG_PM is not set 263# CONFIG_PM is not set
248
249#
250# Networking
251#
252CONFIG_NET=y 264CONFIG_NET=y
253 265
254# 266#
255# Networking options 267# Networking options
256# 268#
269CONFIG_COMPAT_NET_DEV_OPS=y
257CONFIG_PACKET=y 270CONFIG_PACKET=y
258# CONFIG_PACKET_MMAP is not set 271# CONFIG_PACKET_MMAP is not set
259CONFIG_UNIX=y 272CONFIG_UNIX=y
@@ -293,6 +306,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
293# CONFIG_IPX is not set 306# CONFIG_IPX is not set
294# CONFIG_ATALK is not set 307# CONFIG_ATALK is not set
295# CONFIG_NET_SCHED is not set 308# CONFIG_NET_SCHED is not set
309# CONFIG_DCB is not set
296 310
297# 311#
298# Network testing 312# Network testing
@@ -302,14 +316,9 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
302# CONFIG_CAN is not set 316# CONFIG_CAN is not set
303# CONFIG_IRDA is not set 317# CONFIG_IRDA is not set
304# CONFIG_BT is not set 318# CONFIG_BT is not set
305 319# CONFIG_PHONET is not set
306# 320# CONFIG_WIRELESS is not set
307# Wireless 321# CONFIG_WIMAX is not set
308#
309# CONFIG_CFG80211 is not set
310# CONFIG_WIRELESS_EXT is not set
311# CONFIG_MAC80211 is not set
312# CONFIG_IEEE80211 is not set
313# CONFIG_RFKILL is not set 322# CONFIG_RFKILL is not set
314 323
315# 324#
@@ -323,7 +332,89 @@ CONFIG_STANDALONE=y
323CONFIG_PREVENT_FIRMWARE_BUILD=y 332CONFIG_PREVENT_FIRMWARE_BUILD=y
324# CONFIG_SYS_HYPERVISOR is not set 333# CONFIG_SYS_HYPERVISOR is not set
325# CONFIG_CONNECTOR is not set 334# CONFIG_CONNECTOR is not set
326# CONFIG_MTD is not set 335CONFIG_MTD=y
336# CONFIG_MTD_DEBUG is not set
337# CONFIG_MTD_CONCAT is not set
338CONFIG_MTD_PARTITIONS=y
339# CONFIG_MTD_REDBOOT_PARTS is not set
340CONFIG_MTD_CMDLINE_PARTS=y
341# CONFIG_MTD_AR7_PARTS is not set
342
343#
344# User Modules And Translation Layers
345#
346CONFIG_MTD_CHAR=y
347# CONFIG_MTD_BLKDEVS is not set
348# CONFIG_MTD_BLOCK is not set
349# CONFIG_MTD_BLOCK_RO is not set
350# CONFIG_FTL is not set
351# CONFIG_NFTL is not set
352# CONFIG_INFTL is not set
353# CONFIG_RFD_FTL is not set
354# CONFIG_SSFDC is not set
355# CONFIG_MTD_OOPS is not set
356
357#
358# RAM/ROM/Flash chip drivers
359#
360CONFIG_MTD_CFI=y
361CONFIG_MTD_JEDECPROBE=y
362CONFIG_MTD_GEN_PROBE=y
363# CONFIG_MTD_CFI_ADV_OPTIONS is not set
364CONFIG_MTD_MAP_BANK_WIDTH_1=y
365CONFIG_MTD_MAP_BANK_WIDTH_2=y
366CONFIG_MTD_MAP_BANK_WIDTH_4=y
367# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
368# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
369# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
370CONFIG_MTD_CFI_I1=y
371CONFIG_MTD_CFI_I2=y
372# CONFIG_MTD_CFI_I4 is not set
373# CONFIG_MTD_CFI_I8 is not set
374# CONFIG_MTD_CFI_INTELEXT is not set
375CONFIG_MTD_CFI_AMDSTD=y
376# CONFIG_MTD_CFI_STAA is not set
377CONFIG_MTD_CFI_UTIL=y
378# CONFIG_MTD_RAM is not set
379# CONFIG_MTD_ROM is not set
380# CONFIG_MTD_ABSENT is not set
381
382#
383# Mapping drivers for chip access
384#
385# CONFIG_MTD_COMPLEX_MAPPINGS is not set
386CONFIG_MTD_PHYSMAP=y
387# CONFIG_MTD_PHYSMAP_COMPAT is not set
388# CONFIG_MTD_INTEL_VR_NOR is not set
389# CONFIG_MTD_PLATRAM is not set
390
391#
392# Self-contained MTD device drivers
393#
394# CONFIG_MTD_PMC551 is not set
395# CONFIG_MTD_SLRAM is not set
396# CONFIG_MTD_PHRAM is not set
397# CONFIG_MTD_MTDRAM is not set
398# CONFIG_MTD_BLOCK2MTD is not set
399
400#
401# Disk-On-Chip Device Drivers
402#
403# CONFIG_MTD_DOC2000 is not set
404# CONFIG_MTD_DOC2001 is not set
405# CONFIG_MTD_DOC2001PLUS is not set
406# CONFIG_MTD_NAND is not set
407# CONFIG_MTD_ONENAND is not set
408
409#
410# LPDDR flash memory drivers
411#
412# CONFIG_MTD_LPDDR is not set
413
414#
415# UBI - Unsorted block images
416#
417# CONFIG_MTD_UBI is not set
327# CONFIG_PARPORT is not set 418# CONFIG_PARPORT is not set
328CONFIG_BLK_DEV=y 419CONFIG_BLK_DEV=y
329# CONFIG_BLK_CPQ_DA is not set 420# CONFIG_BLK_CPQ_DA is not set
@@ -336,6 +427,7 @@ CONFIG_BLK_DEV=y
336# CONFIG_BLK_DEV_RAM is not set 427# CONFIG_BLK_DEV_RAM is not set
337# CONFIG_CDROM_PKTCDVD is not set 428# CONFIG_CDROM_PKTCDVD is not set
338# CONFIG_ATA_OVER_ETH is not set 429# CONFIG_ATA_OVER_ETH is not set
430# CONFIG_BLK_DEV_HD is not set
339# CONFIG_MISC_DEVICES is not set 431# CONFIG_MISC_DEVICES is not set
340CONFIG_HAVE_IDE=y 432CONFIG_HAVE_IDE=y
341# CONFIG_IDE is not set 433# CONFIG_IDE is not set
@@ -361,7 +453,6 @@ CONFIG_HAVE_IDE=y
361# CONFIG_IEEE1394 is not set 453# CONFIG_IEEE1394 is not set
362# CONFIG_I2O is not set 454# CONFIG_I2O is not set
363CONFIG_NETDEVICES=y 455CONFIG_NETDEVICES=y
364# CONFIG_NETDEVICES_MULTIQUEUE is not set
365# CONFIG_DUMMY is not set 456# CONFIG_DUMMY is not set
366# CONFIG_BONDING is not set 457# CONFIG_BONDING is not set
367# CONFIG_EQUALIZER is not set 458# CONFIG_EQUALIZER is not set
@@ -383,6 +474,9 @@ CONFIG_PHYLIB=y
383# CONFIG_BROADCOM_PHY is not set 474# CONFIG_BROADCOM_PHY is not set
384# CONFIG_ICPLUS_PHY is not set 475# CONFIG_ICPLUS_PHY is not set
385# CONFIG_REALTEK_PHY is not set 476# CONFIG_REALTEK_PHY is not set
477# CONFIG_NATIONAL_PHY is not set
478# CONFIG_STE10XP is not set
479# CONFIG_LSI_ET1011C_PHY is not set
386# CONFIG_FIXED_PHY is not set 480# CONFIG_FIXED_PHY is not set
387# CONFIG_MDIO_BITBANG is not set 481# CONFIG_MDIO_BITBANG is not set
388CONFIG_NET_ETHERNET=y 482CONFIG_NET_ETHERNET=y
@@ -392,6 +486,7 @@ CONFIG_NET_ETHERNET=y
392# CONFIG_SUNGEM is not set 486# CONFIG_SUNGEM is not set
393# CONFIG_CASSINI is not set 487# CONFIG_CASSINI is not set
394# CONFIG_NET_VENDOR_3COM is not set 488# CONFIG_NET_VENDOR_3COM is not set
489# CONFIG_SMC91X is not set
395# CONFIG_DM9000 is not set 490# CONFIG_DM9000 is not set
396# CONFIG_NET_TULIP is not set 491# CONFIG_NET_TULIP is not set
397# CONFIG_HP100 is not set 492# CONFIG_HP100 is not set
@@ -399,6 +494,9 @@ CONFIG_NET_ETHERNET=y
399# CONFIG_IBM_NEW_EMAC_RGMII is not set 494# CONFIG_IBM_NEW_EMAC_RGMII is not set
400# CONFIG_IBM_NEW_EMAC_TAH is not set 495# CONFIG_IBM_NEW_EMAC_TAH is not set
401# CONFIG_IBM_NEW_EMAC_EMAC4 is not set 496# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
497# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
498# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
499# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
402CONFIG_NET_PCI=y 500CONFIG_NET_PCI=y
403# CONFIG_PCNET32 is not set 501# CONFIG_PCNET32 is not set
404# CONFIG_AMD8111_ETH is not set 502# CONFIG_AMD8111_ETH is not set
@@ -406,7 +504,6 @@ CONFIG_NET_PCI=y
406# CONFIG_B44 is not set 504# CONFIG_B44 is not set
407# CONFIG_FORCEDETH is not set 505# CONFIG_FORCEDETH is not set
408CONFIG_TC35815=y 506CONFIG_TC35815=y
409# CONFIG_EEPRO100 is not set
410# CONFIG_E100 is not set 507# CONFIG_E100 is not set
411# CONFIG_FEALNX is not set 508# CONFIG_FEALNX is not set
412# CONFIG_NATSEMI is not set 509# CONFIG_NATSEMI is not set
@@ -415,9 +512,11 @@ CONFIG_TC35815=y
415# CONFIG_R6040 is not set 512# CONFIG_R6040 is not set
416# CONFIG_SIS900 is not set 513# CONFIG_SIS900 is not set
417# CONFIG_EPIC100 is not set 514# CONFIG_EPIC100 is not set
515# CONFIG_SMSC9420 is not set
418# CONFIG_SUNDANCE is not set 516# CONFIG_SUNDANCE is not set
419# CONFIG_TLAN is not set 517# CONFIG_TLAN is not set
420# CONFIG_VIA_RHINE is not set 518# CONFIG_VIA_RHINE is not set
519# CONFIG_ATL2 is not set
421# CONFIG_NETDEV_1000 is not set 520# CONFIG_NETDEV_1000 is not set
422# CONFIG_NETDEV_10000 is not set 521# CONFIG_NETDEV_10000 is not set
423# CONFIG_TR is not set 522# CONFIG_TR is not set
@@ -428,6 +527,10 @@ CONFIG_TC35815=y
428# CONFIG_WLAN_PRE80211 is not set 527# CONFIG_WLAN_PRE80211 is not set
429# CONFIG_WLAN_80211 is not set 528# CONFIG_WLAN_80211 is not set
430# CONFIG_IWLWIFI_LEDS is not set 529# CONFIG_IWLWIFI_LEDS is not set
530
531#
532# Enable WiMAX (Networking options) to see the WiMAX drivers
533#
431# CONFIG_WAN is not set 534# CONFIG_WAN is not set
432# CONFIG_FDDI is not set 535# CONFIG_FDDI is not set
433# CONFIG_PPP is not set 536# CONFIG_PPP is not set
@@ -440,27 +543,7 @@ CONFIG_TC35815=y
440# 543#
441# Input device support 544# Input device support
442# 545#
443CONFIG_INPUT=y 546# CONFIG_INPUT is not set
444# CONFIG_INPUT_FF_MEMLESS is not set
445# CONFIG_INPUT_POLLDEV is not set
446
447#
448# Userland interfaces
449#
450# CONFIG_INPUT_MOUSEDEV is not set
451# CONFIG_INPUT_JOYDEV is not set
452# CONFIG_INPUT_EVDEV is not set
453# CONFIG_INPUT_EVBUG is not set
454
455#
456# Input Device Drivers
457#
458# CONFIG_INPUT_KEYBOARD is not set
459# CONFIG_INPUT_MOUSE is not set
460# CONFIG_INPUT_JOYSTICK is not set
461# CONFIG_INPUT_TABLET is not set
462# CONFIG_INPUT_TOUCHSCREEN is not set
463# CONFIG_INPUT_MISC is not set
464 547
465# 548#
466# Hardware I/O ports 549# Hardware I/O ports
@@ -517,10 +600,11 @@ CONFIG_LEGACY_PTY_COUNT=256
517CONFIG_DEVPORT=y 600CONFIG_DEVPORT=y
518# CONFIG_I2C is not set 601# CONFIG_I2C is not set
519# CONFIG_SPI is not set 602# CONFIG_SPI is not set
520CONFIG_HAVE_GPIO_LIB=y 603CONFIG_ARCH_REQUIRE_GPIOLIB=y
604CONFIG_GPIOLIB=y
521 605
522# 606#
523# GPIO Support 607# Memory mapped GPIO expanders:
524# 608#
525 609
526# 610#
@@ -528,6 +612,11 @@ CONFIG_HAVE_GPIO_LIB=y
528# 612#
529 613
530# 614#
615# PCI GPIO expanders:
616#
617# CONFIG_GPIO_BT8XX is not set
618
619#
531# SPI GPIO expanders: 620# SPI GPIO expanders:
532# 621#
533# CONFIG_W1 is not set 622# CONFIG_W1 is not set
@@ -542,6 +631,7 @@ CONFIG_WATCHDOG=y
542# Watchdog Device Drivers 631# Watchdog Device Drivers
543# 632#
544# CONFIG_SOFT_WATCHDOG is not set 633# CONFIG_SOFT_WATCHDOG is not set
634# CONFIG_ALIM7101_WDT is not set
545CONFIG_TXX9_WDT=y 635CONFIG_TXX9_WDT=y
546 636
547# 637#
@@ -549,18 +639,21 @@ CONFIG_TXX9_WDT=y
549# 639#
550# CONFIG_PCIPCWATCHDOG is not set 640# CONFIG_PCIPCWATCHDOG is not set
551# CONFIG_WDTPCI is not set 641# CONFIG_WDTPCI is not set
642CONFIG_SSB_POSSIBLE=y
552 643
553# 644#
554# Sonics Silicon Backplane 645# Sonics Silicon Backplane
555# 646#
556CONFIG_SSB_POSSIBLE=y
557# CONFIG_SSB is not set 647# CONFIG_SSB is not set
558 648
559# 649#
560# Multifunction device drivers 650# Multifunction device drivers
561# 651#
652# CONFIG_MFD_CORE is not set
562# CONFIG_MFD_SM501 is not set 653# CONFIG_MFD_SM501 is not set
563# CONFIG_HTC_PASIC3 is not set 654# CONFIG_HTC_PASIC3 is not set
655# CONFIG_MFD_TMIO is not set
656# CONFIG_REGULATOR is not set
564 657
565# 658#
566# Multimedia devices 659# Multimedia devices
@@ -591,16 +684,26 @@ CONFIG_SSB_POSSIBLE=y
591# Display device support 684# Display device support
592# 685#
593# CONFIG_DISPLAY_SUPPORT is not set 686# CONFIG_DISPLAY_SUPPORT is not set
594
595#
596# Sound
597#
598# CONFIG_SOUND is not set 687# CONFIG_SOUND is not set
599# CONFIG_HID_SUPPORT is not set
600# CONFIG_USB_SUPPORT is not set 688# CONFIG_USB_SUPPORT is not set
601# CONFIG_MMC is not set 689# CONFIG_MMC is not set
602# CONFIG_MEMSTICK is not set 690# CONFIG_MEMSTICK is not set
603# CONFIG_NEW_LEDS is not set 691CONFIG_NEW_LEDS=y
692CONFIG_LEDS_CLASS=y
693
694#
695# LED drivers
696#
697CONFIG_LEDS_GPIO=y
698
699#
700# LED Triggers
701#
702CONFIG_LEDS_TRIGGERS=y
703# CONFIG_LEDS_TRIGGER_TIMER is not set
704CONFIG_LEDS_TRIGGER_HEARTBEAT=y
705# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
706# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
604# CONFIG_ACCESSIBILITY is not set 707# CONFIG_ACCESSIBILITY is not set
605# CONFIG_INFINIBAND is not set 708# CONFIG_INFINIBAND is not set
606CONFIG_RTC_LIB=y 709CONFIG_RTC_LIB=y
@@ -626,27 +729,34 @@ CONFIG_RTC_INTF_DEV=y
626# Platform RTC drivers 729# Platform RTC drivers
627# 730#
628# CONFIG_RTC_DRV_CMOS is not set 731# CONFIG_RTC_DRV_CMOS is not set
732# CONFIG_RTC_DRV_DS1286 is not set
629# CONFIG_RTC_DRV_DS1511 is not set 733# CONFIG_RTC_DRV_DS1511 is not set
630# CONFIG_RTC_DRV_DS1553 is not set 734# CONFIG_RTC_DRV_DS1553 is not set
631CONFIG_RTC_DRV_DS1742=y 735CONFIG_RTC_DRV_DS1742=y
632# CONFIG_RTC_DRV_STK17TA8 is not set 736# CONFIG_RTC_DRV_STK17TA8 is not set
633# CONFIG_RTC_DRV_M48T86 is not set 737# CONFIG_RTC_DRV_M48T86 is not set
738# CONFIG_RTC_DRV_M48T35 is not set
634# CONFIG_RTC_DRV_M48T59 is not set 739# CONFIG_RTC_DRV_M48T59 is not set
740# CONFIG_RTC_DRV_BQ4802 is not set
635# CONFIG_RTC_DRV_V3020 is not set 741# CONFIG_RTC_DRV_V3020 is not set
636 742
637# 743#
638# on-CPU RTC drivers 744# on-CPU RTC drivers
639# 745#
746# CONFIG_DMADEVICES is not set
640# CONFIG_UIO is not set 747# CONFIG_UIO is not set
748# CONFIG_STAGING is not set
641 749
642# 750#
643# File systems 751# File systems
644# 752#
645# CONFIG_EXT2_FS is not set 753# CONFIG_EXT2_FS is not set
646# CONFIG_EXT3_FS is not set 754# CONFIG_EXT3_FS is not set
755# CONFIG_EXT4_FS is not set
647# CONFIG_REISERFS_FS is not set 756# CONFIG_REISERFS_FS is not set
648# CONFIG_JFS_FS is not set 757# CONFIG_JFS_FS is not set
649# CONFIG_FS_POSIX_ACL is not set 758# CONFIG_FS_POSIX_ACL is not set
759CONFIG_FILE_LOCKING=y
650# CONFIG_XFS_FS is not set 760# CONFIG_XFS_FS is not set
651# CONFIG_OCFS2_FS is not set 761# CONFIG_OCFS2_FS is not set
652CONFIG_DNOTIFY=y 762CONFIG_DNOTIFY=y
@@ -676,28 +786,17 @@ CONFIG_INOTIFY_USER=y
676CONFIG_PROC_FS=y 786CONFIG_PROC_FS=y
677CONFIG_PROC_KCORE=y 787CONFIG_PROC_KCORE=y
678CONFIG_PROC_SYSCTL=y 788CONFIG_PROC_SYSCTL=y
789CONFIG_PROC_PAGE_MONITOR=y
679CONFIG_SYSFS=y 790CONFIG_SYSFS=y
680# CONFIG_TMPFS is not set 791# CONFIG_TMPFS is not set
681# CONFIG_HUGETLB_PAGE is not set 792# CONFIG_HUGETLB_PAGE is not set
682# CONFIG_CONFIGFS_FS is not set 793# CONFIG_CONFIGFS_FS is not set
683 794# CONFIG_MISC_FILESYSTEMS is not set
684#
685# Miscellaneous filesystems
686#
687# CONFIG_HFSPLUS_FS is not set
688# CONFIG_CRAMFS is not set
689# CONFIG_VXFS_FS is not set
690# CONFIG_MINIX_FS is not set
691# CONFIG_HPFS_FS is not set
692# CONFIG_QNX4FS_FS is not set
693# CONFIG_ROMFS_FS is not set
694# CONFIG_SYSV_FS is not set
695# CONFIG_UFS_FS is not set
696CONFIG_NETWORK_FILESYSTEMS=y 795CONFIG_NETWORK_FILESYSTEMS=y
697CONFIG_NFS_FS=y 796CONFIG_NFS_FS=y
698# CONFIG_NFS_V3 is not set 797# CONFIG_NFS_V3 is not set
699# CONFIG_NFSD is not set
700CONFIG_ROOT_NFS=y 798CONFIG_ROOT_NFS=y
799# CONFIG_NFSD is not set
701CONFIG_LOCKD=y 800CONFIG_LOCKD=y
702CONFIG_NFS_COMMON=y 801CONFIG_NFS_COMMON=y
703CONFIG_SUNRPC=y 802CONFIG_SUNRPC=y
@@ -726,7 +825,16 @@ CONFIG_FRAME_WARN=1024
726# CONFIG_DEBUG_FS is not set 825# CONFIG_DEBUG_FS is not set
727# CONFIG_HEADERS_CHECK is not set 826# CONFIG_HEADERS_CHECK is not set
728# CONFIG_DEBUG_KERNEL is not set 827# CONFIG_DEBUG_KERNEL is not set
828# CONFIG_DEBUG_MEMORY_INIT is not set
829# CONFIG_RCU_CPU_STALL_DETECTOR is not set
830CONFIG_SYSCTL_SYSCALL_CHECK=y
831
832#
833# Tracers
834#
835# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
729# CONFIG_SAMPLES is not set 836# CONFIG_SAMPLES is not set
837CONFIG_HAVE_ARCH_KGDB=y
730CONFIG_CMDLINE="" 838CONFIG_CMDLINE=""
731 839
732# 840#
@@ -734,15 +842,18 @@ CONFIG_CMDLINE=""
734# 842#
735# CONFIG_KEYS is not set 843# CONFIG_KEYS is not set
736# CONFIG_SECURITY is not set 844# CONFIG_SECURITY is not set
845# CONFIG_SECURITYFS is not set
846# CONFIG_SECURITY_FILE_CAPABILITIES is not set
737# CONFIG_CRYPTO is not set 847# CONFIG_CRYPTO is not set
738 848
739# 849#
740# Library routines 850# Library routines
741# 851#
742CONFIG_BITREVERSE=y 852CONFIG_BITREVERSE=y
743# CONFIG_GENERIC_FIND_FIRST_BIT is not set 853CONFIG_GENERIC_FIND_LAST_BIT=y
744# CONFIG_CRC_CCITT is not set 854# CONFIG_CRC_CCITT is not set
745# CONFIG_CRC16 is not set 855# CONFIG_CRC16 is not set
856# CONFIG_CRC_T10DIF is not set
746# CONFIG_CRC_ITU_T is not set 857# CONFIG_CRC_ITU_T is not set
747CONFIG_CRC32=y 858CONFIG_CRC32=y
748# CONFIG_CRC7 is not set 859# CONFIG_CRC7 is not set
diff --git a/arch/mips/configs/rbtx49xx_defconfig b/arch/mips/configs/rbtx49xx_defconfig
index 83d5c58662c8..1efe977497dd 100644
--- a/arch/mips/configs/rbtx49xx_defconfig
+++ b/arch/mips/configs/rbtx49xx_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc9 3# Linux kernel version: 2.6.29-rc7
4# Fri Jul 11 23:03:21 2008 4# Wed Mar 4 23:08:06 2009
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -18,8 +18,10 @@ CONFIG_MIPS=y
18# CONFIG_LEMOTE_FULONG is not set 18# CONFIG_LEMOTE_FULONG is not set
19# CONFIG_MIPS_MALTA is not set 19# CONFIG_MIPS_MALTA is not set
20# CONFIG_MIPS_SIM is not set 20# CONFIG_MIPS_SIM is not set
21# CONFIG_MARKEINS is not set 21# CONFIG_MACH_EMMA is not set
22# CONFIG_MACH_VR41XX is not set 22# CONFIG_MACH_VR41XX is not set
23# CONFIG_NXP_STB220 is not set
24# CONFIG_NXP_STB225 is not set
23# CONFIG_PNX8550_JBS is not set 25# CONFIG_PNX8550_JBS is not set
24# CONFIG_PNX8550_STB810 is not set 26# CONFIG_PNX8550_STB810 is not set
25# CONFIG_PMC_MSP is not set 27# CONFIG_PMC_MSP is not set
@@ -39,20 +41,28 @@ CONFIG_MIPS=y
39# CONFIG_SNI_RM is not set 41# CONFIG_SNI_RM is not set
40# CONFIG_MACH_TX39XX is not set 42# CONFIG_MACH_TX39XX is not set
41CONFIG_MACH_TX49XX=y 43CONFIG_MACH_TX49XX=y
44# CONFIG_MIKROTIK_RB532 is not set
42# CONFIG_WR_PPMC is not set 45# CONFIG_WR_PPMC is not set
46# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
47# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
48CONFIG_MACH_TXX9=y
43CONFIG_TOSHIBA_RBTX4927=y 49CONFIG_TOSHIBA_RBTX4927=y
44CONFIG_TOSHIBA_RBTX4938=y 50CONFIG_TOSHIBA_RBTX4938=y
51CONFIG_TOSHIBA_RBTX4939=y
45CONFIG_SOC_TX4927=y 52CONFIG_SOC_TX4927=y
46CONFIG_SOC_TX4938=y 53CONFIG_SOC_TX4938=y
54CONFIG_SOC_TX4939=y
55CONFIG_TXX9_7SEGLED=y
47# CONFIG_TOSHIBA_FPCIB0 is not set 56# CONFIG_TOSHIBA_FPCIB0 is not set
48CONFIG_PICMG_PCI_BACKPLANE_DEFAULT=y 57CONFIG_PICMG_PCI_BACKPLANE_DEFAULT=y
49 58
50# 59#
51# Multiplex Pin Select 60# Multiplex Pin Select
52# 61#
53CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61=y 62# CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61 is not set
54# CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND is not set 63# CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND is not set
55# CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA is not set 64# CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA is not set
65CONFIG_TOSHIBA_RBTX4938_MPLEX_KEEP=y
56CONFIG_PCI_TX4927=y 66CONFIG_PCI_TX4927=y
57CONFIG_RWSEM_GENERIC_SPINLOCK=y 67CONFIG_RWSEM_GENERIC_SPINLOCK=y
58# CONFIG_ARCH_HAS_ILOG2_U32 is not set 68# CONFIG_ARCH_HAS_ILOG2_U32 is not set
@@ -64,14 +74,18 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y
64CONFIG_GENERIC_CLOCKEVENTS=y 74CONFIG_GENERIC_CLOCKEVENTS=y
65CONFIG_GENERIC_TIME=y 75CONFIG_GENERIC_TIME=y
66CONFIG_GENERIC_CMOS_UPDATE=y 76CONFIG_GENERIC_CMOS_UPDATE=y
67CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 77CONFIG_SCHED_OMIT_FRAME_POINTER=y
68CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 78CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
79CONFIG_CEVT_R4K_LIB=y
69CONFIG_CEVT_R4K=y 80CONFIG_CEVT_R4K=y
70CONFIG_CEVT_TXX9=y 81CONFIG_CEVT_TXX9=y
82CONFIG_CSRC_R4K_LIB=y
71CONFIG_CSRC_R4K=y 83CONFIG_CSRC_R4K=y
72CONFIG_GPIO_TXX9=y 84CONFIG_GPIO_TXX9=y
73CONFIG_DMA_NONCOHERENT=y 85CONFIG_DMA_NONCOHERENT=y
74CONFIG_DMA_NEED_PCI_MAP_STATE=y 86CONFIG_DMA_NEED_PCI_MAP_STATE=y
87CONFIG_EARLY_PRINTK=y
88CONFIG_SYS_HAS_EARLY_PRINTK=y
75# CONFIG_HOTPLUG_CPU is not set 89# CONFIG_HOTPLUG_CPU is not set
76# CONFIG_NO_IOPORT is not set 90# CONFIG_NO_IOPORT is not set
77CONFIG_GENERIC_GPIO=y 91CONFIG_GENERIC_GPIO=y
@@ -100,6 +114,7 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
100CONFIG_CPU_TX49XX=y 114CONFIG_CPU_TX49XX=y
101# CONFIG_CPU_R5000 is not set 115# CONFIG_CPU_R5000 is not set
102# CONFIG_CPU_R5432 is not set 116# CONFIG_CPU_R5432 is not set
117# CONFIG_CPU_R5500 is not set
103# CONFIG_CPU_R6000 is not set 118# CONFIG_CPU_R6000 is not set
104# CONFIG_CPU_NEVADA is not set 119# CONFIG_CPU_NEVADA is not set
105# CONFIG_CPU_R8000 is not set 120# CONFIG_CPU_R8000 is not set
@@ -107,6 +122,7 @@ CONFIG_CPU_TX49XX=y
107# CONFIG_CPU_RM7000 is not set 122# CONFIG_CPU_RM7000 is not set
108# CONFIG_CPU_RM9000 is not set 123# CONFIG_CPU_RM9000 is not set
109# CONFIG_CPU_SB1 is not set 124# CONFIG_CPU_SB1 is not set
125# CONFIG_CPU_CAVIUM_OCTEON is not set
110CONFIG_SYS_HAS_CPU_TX49XX=y 126CONFIG_SYS_HAS_CPU_TX49XX=y
111CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y 127CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
112CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y 128CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
@@ -134,13 +150,12 @@ CONFIG_ARCH_FLATMEM_ENABLE=y
134CONFIG_ARCH_POPULATES_NODE_MAP=y 150CONFIG_ARCH_POPULATES_NODE_MAP=y
135CONFIG_FLATMEM=y 151CONFIG_FLATMEM=y
136CONFIG_FLAT_NODE_MEM_MAP=y 152CONFIG_FLAT_NODE_MEM_MAP=y
137# CONFIG_SPARSEMEM_STATIC is not set
138# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
139CONFIG_PAGEFLAGS_EXTENDED=y 153CONFIG_PAGEFLAGS_EXTENDED=y
140CONFIG_SPLIT_PTLOCK_CPUS=4 154CONFIG_SPLIT_PTLOCK_CPUS=4
141# CONFIG_RESOURCES_64BIT is not set 155# CONFIG_PHYS_ADDR_T_64BIT is not set
142CONFIG_ZONE_DMA_FLAG=0 156CONFIG_ZONE_DMA_FLAG=0
143CONFIG_VIRT_TO_BUS=y 157CONFIG_VIRT_TO_BUS=y
158CONFIG_UNEVICTABLE_LRU=y
144CONFIG_TICK_ONESHOT=y 159CONFIG_TICK_ONESHOT=y
145CONFIG_NO_HZ=y 160CONFIG_NO_HZ=y
146CONFIG_HIGH_RES_TIMERS=y 161CONFIG_HIGH_RES_TIMERS=y
@@ -176,6 +191,15 @@ CONFIG_SYSVIPC_SYSCTL=y
176# CONFIG_BSD_PROCESS_ACCT is not set 191# CONFIG_BSD_PROCESS_ACCT is not set
177# CONFIG_TASKSTATS is not set 192# CONFIG_TASKSTATS is not set
178# CONFIG_AUDIT is not set 193# CONFIG_AUDIT is not set
194
195#
196# RCU Subsystem
197#
198CONFIG_CLASSIC_RCU=y
199# CONFIG_TREE_RCU is not set
200# CONFIG_PREEMPT_RCU is not set
201# CONFIG_TREE_RCU_TRACE is not set
202# CONFIG_PREEMPT_RCU_TRACE is not set
179CONFIG_IKCONFIG=y 203CONFIG_IKCONFIG=y
180CONFIG_IKCONFIG_PROC=y 204CONFIG_IKCONFIG_PROC=y
181CONFIG_LOG_BUF_SHIFT=14 205CONFIG_LOG_BUF_SHIFT=14
@@ -190,7 +214,6 @@ CONFIG_CC_OPTIMIZE_FOR_SIZE=y
190CONFIG_SYSCTL=y 214CONFIG_SYSCTL=y
191CONFIG_EMBEDDED=y 215CONFIG_EMBEDDED=y
192CONFIG_SYSCTL_SYSCALL=y 216CONFIG_SYSCTL_SYSCALL=y
193CONFIG_SYSCTL_SYSCALL_CHECK=y
194CONFIG_KALLSYMS=y 217CONFIG_KALLSYMS=y
195# CONFIG_KALLSYMS_EXTRA_PASS is not set 218# CONFIG_KALLSYMS_EXTRA_PASS is not set
196# CONFIG_HOTPLUG is not set 219# CONFIG_HOTPLUG is not set
@@ -207,30 +230,26 @@ CONFIG_SIGNALFD=y
207CONFIG_TIMERFD=y 230CONFIG_TIMERFD=y
208CONFIG_EVENTFD=y 231CONFIG_EVENTFD=y
209CONFIG_SHMEM=y 232CONFIG_SHMEM=y
233CONFIG_AIO=y
210CONFIG_VM_EVENT_COUNTERS=y 234CONFIG_VM_EVENT_COUNTERS=y
235CONFIG_PCI_QUIRKS=y
211CONFIG_SLAB=y 236CONFIG_SLAB=y
212# CONFIG_SLUB is not set 237# CONFIG_SLUB is not set
213# CONFIG_SLOB is not set 238# CONFIG_SLOB is not set
214# CONFIG_PROFILING is not set 239# CONFIG_PROFILING is not set
215# CONFIG_MARKERS is not set
216CONFIG_HAVE_OPROFILE=y 240CONFIG_HAVE_OPROFILE=y
217# CONFIG_HAVE_KPROBES is not set 241# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
218# CONFIG_HAVE_KRETPROBES is not set
219# CONFIG_HAVE_DMA_ATTRS is not set
220CONFIG_PROC_PAGE_MONITOR=y
221CONFIG_SLABINFO=y 242CONFIG_SLABINFO=y
222# CONFIG_TINY_SHMEM is not set
223CONFIG_BASE_SMALL=0 243CONFIG_BASE_SMALL=0
224CONFIG_MODULES=y 244CONFIG_MODULES=y
225# CONFIG_MODULE_FORCE_LOAD is not set 245# CONFIG_MODULE_FORCE_LOAD is not set
226# CONFIG_MODULE_UNLOAD is not set 246CONFIG_MODULE_UNLOAD=y
227# CONFIG_MODVERSIONS is not set 247# CONFIG_MODVERSIONS is not set
228# CONFIG_MODULE_SRCVERSION_ALL is not set 248# CONFIG_MODULE_SRCVERSION_ALL is not set
229CONFIG_KMOD=y
230CONFIG_BLOCK=y 249CONFIG_BLOCK=y
231# CONFIG_LBD is not set 250# CONFIG_LBD is not set
232# CONFIG_BLK_DEV_IO_TRACE is not set 251# CONFIG_BLK_DEV_IO_TRACE is not set
233# CONFIG_LSF is not set 252# CONFIG_BLK_DEV_INTEGRITY is not set
234 253
235# 254#
236# IO Schedulers 255# IO Schedulers
@@ -244,7 +263,8 @@ CONFIG_DEFAULT_AS=y
244# CONFIG_DEFAULT_CFQ is not set 263# CONFIG_DEFAULT_CFQ is not set
245# CONFIG_DEFAULT_NOOP is not set 264# CONFIG_DEFAULT_NOOP is not set
246CONFIG_DEFAULT_IOSCHED="anticipatory" 265CONFIG_DEFAULT_IOSCHED="anticipatory"
247CONFIG_CLASSIC_RCU=y 266# CONFIG_PROBE_INITRD_HEADER is not set
267# CONFIG_FREEZER is not set
248 268
249# 269#
250# Bus options (PCI, PCMCIA, EISA, ISA, TC) 270# Bus options (PCI, PCMCIA, EISA, ISA, TC)
@@ -254,12 +274,15 @@ CONFIG_PCI=y
254CONFIG_PCI_DOMAINS=y 274CONFIG_PCI_DOMAINS=y
255# CONFIG_ARCH_SUPPORTS_MSI is not set 275# CONFIG_ARCH_SUPPORTS_MSI is not set
256# CONFIG_PCI_LEGACY is not set 276# CONFIG_PCI_LEGACY is not set
277# CONFIG_PCI_STUB is not set
257CONFIG_MMU=y 278CONFIG_MMU=y
258 279
259# 280#
260# Executable file formats 281# Executable file formats
261# 282#
262CONFIG_BINFMT_ELF=y 283CONFIG_BINFMT_ELF=y
284# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
285# CONFIG_HAVE_AOUT is not set
263# CONFIG_BINFMT_MISC is not set 286# CONFIG_BINFMT_MISC is not set
264CONFIG_TRAD_SIGNALS=y 287CONFIG_TRAD_SIGNALS=y
265 288
@@ -268,15 +291,12 @@ CONFIG_TRAD_SIGNALS=y
268# 291#
269CONFIG_ARCH_SUSPEND_POSSIBLE=y 292CONFIG_ARCH_SUSPEND_POSSIBLE=y
270# CONFIG_PM is not set 293# CONFIG_PM is not set
271
272#
273# Networking
274#
275CONFIG_NET=y 294CONFIG_NET=y
276 295
277# 296#
278# Networking options 297# Networking options
279# 298#
299CONFIG_COMPAT_NET_DEV_OPS=y
280CONFIG_PACKET=y 300CONFIG_PACKET=y
281# CONFIG_PACKET_MMAP is not set 301# CONFIG_PACKET_MMAP is not set
282CONFIG_UNIX=y 302CONFIG_UNIX=y
@@ -318,6 +338,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
318# CONFIG_IPX is not set 338# CONFIG_IPX is not set
319# CONFIG_ATALK is not set 339# CONFIG_ATALK is not set
320# CONFIG_NET_SCHED is not set 340# CONFIG_NET_SCHED is not set
341# CONFIG_DCB is not set
321 342
322# 343#
323# Network testing 344# Network testing
@@ -327,14 +348,9 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
327# CONFIG_CAN is not set 348# CONFIG_CAN is not set
328# CONFIG_IRDA is not set 349# CONFIG_IRDA is not set
329# CONFIG_BT is not set 350# CONFIG_BT is not set
330 351# CONFIG_PHONET is not set
331# 352# CONFIG_WIRELESS is not set
332# Wireless 353# CONFIG_WIMAX is not set
333#
334# CONFIG_CFG80211 is not set
335# CONFIG_WIRELESS_EXT is not set
336# CONFIG_MAC80211 is not set
337# CONFIG_IEEE80211 is not set
338# CONFIG_RFKILL is not set 354# CONFIG_RFKILL is not set
339 355
340# 356#
@@ -348,7 +364,90 @@ CONFIG_STANDALONE=y
348CONFIG_PREVENT_FIRMWARE_BUILD=y 364CONFIG_PREVENT_FIRMWARE_BUILD=y
349# CONFIG_SYS_HYPERVISOR is not set 365# CONFIG_SYS_HYPERVISOR is not set
350# CONFIG_CONNECTOR is not set 366# CONFIG_CONNECTOR is not set
351# CONFIG_MTD is not set 367CONFIG_MTD=y
368# CONFIG_MTD_DEBUG is not set
369# CONFIG_MTD_CONCAT is not set
370CONFIG_MTD_PARTITIONS=y
371# CONFIG_MTD_TESTS is not set
372# CONFIG_MTD_REDBOOT_PARTS is not set
373CONFIG_MTD_CMDLINE_PARTS=y
374# CONFIG_MTD_AR7_PARTS is not set
375
376#
377# User Modules And Translation Layers
378#
379CONFIG_MTD_CHAR=y
380# CONFIG_MTD_BLKDEVS is not set
381# CONFIG_MTD_BLOCK is not set
382# CONFIG_MTD_BLOCK_RO is not set
383# CONFIG_FTL is not set
384# CONFIG_NFTL is not set
385# CONFIG_INFTL is not set
386# CONFIG_RFD_FTL is not set
387# CONFIG_SSFDC is not set
388# CONFIG_MTD_OOPS is not set
389
390#
391# RAM/ROM/Flash chip drivers
392#
393CONFIG_MTD_CFI=y
394CONFIG_MTD_JEDECPROBE=y
395CONFIG_MTD_GEN_PROBE=y
396# CONFIG_MTD_CFI_ADV_OPTIONS is not set
397CONFIG_MTD_MAP_BANK_WIDTH_1=y
398CONFIG_MTD_MAP_BANK_WIDTH_2=y
399CONFIG_MTD_MAP_BANK_WIDTH_4=y
400# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
401# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
402# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
403CONFIG_MTD_CFI_I1=y
404CONFIG_MTD_CFI_I2=y
405# CONFIG_MTD_CFI_I4 is not set
406# CONFIG_MTD_CFI_I8 is not set
407# CONFIG_MTD_CFI_INTELEXT is not set
408CONFIG_MTD_CFI_AMDSTD=y
409# CONFIG_MTD_CFI_STAA is not set
410CONFIG_MTD_CFI_UTIL=y
411# CONFIG_MTD_RAM is not set
412# CONFIG_MTD_ROM is not set
413# CONFIG_MTD_ABSENT is not set
414
415#
416# Mapping drivers for chip access
417#
418# CONFIG_MTD_COMPLEX_MAPPINGS is not set
419CONFIG_MTD_PHYSMAP=y
420# CONFIG_MTD_PHYSMAP_COMPAT is not set
421# CONFIG_MTD_INTEL_VR_NOR is not set
422# CONFIG_MTD_PLATRAM is not set
423
424#
425# Self-contained MTD device drivers
426#
427# CONFIG_MTD_PMC551 is not set
428# CONFIG_MTD_SLRAM is not set
429# CONFIG_MTD_PHRAM is not set
430# CONFIG_MTD_MTDRAM is not set
431# CONFIG_MTD_BLOCK2MTD is not set
432
433#
434# Disk-On-Chip Device Drivers
435#
436# CONFIG_MTD_DOC2000 is not set
437# CONFIG_MTD_DOC2001 is not set
438# CONFIG_MTD_DOC2001PLUS is not set
439# CONFIG_MTD_NAND is not set
440# CONFIG_MTD_ONENAND is not set
441
442#
443# LPDDR flash memory drivers
444#
445# CONFIG_MTD_LPDDR is not set
446
447#
448# UBI - Unsorted block images
449#
450# CONFIG_MTD_UBI is not set
352# CONFIG_PARPORT is not set 451# CONFIG_PARPORT is not set
353CONFIG_BLK_DEV=y 452CONFIG_BLK_DEV=y
354# CONFIG_BLK_CPQ_DA is not set 453# CONFIG_BLK_CPQ_DA is not set
@@ -365,9 +464,60 @@ CONFIG_BLK_DEV_RAM_SIZE=8192
365# CONFIG_BLK_DEV_XIP is not set 464# CONFIG_BLK_DEV_XIP is not set
366# CONFIG_CDROM_PKTCDVD is not set 465# CONFIG_CDROM_PKTCDVD is not set
367# CONFIG_ATA_OVER_ETH is not set 466# CONFIG_ATA_OVER_ETH is not set
467# CONFIG_BLK_DEV_HD is not set
368# CONFIG_MISC_DEVICES is not set 468# CONFIG_MISC_DEVICES is not set
369CONFIG_HAVE_IDE=y 469CONFIG_HAVE_IDE=y
370# CONFIG_IDE is not set 470CONFIG_IDE=y
471
472#
473# Please see Documentation/ide/ide.txt for help/info on IDE drives
474#
475CONFIG_IDE_TIMINGS=y
476# CONFIG_BLK_DEV_IDE_SATA is not set
477CONFIG_IDE_GD=y
478CONFIG_IDE_GD_ATA=y
479# CONFIG_IDE_GD_ATAPI is not set
480# CONFIG_BLK_DEV_IDECD is not set
481# CONFIG_BLK_DEV_IDETAPE is not set
482# CONFIG_IDE_TASK_IOCTL is not set
483CONFIG_IDE_PROC_FS=y
484
485#
486# IDE chipset support/bugfixes
487#
488# CONFIG_IDE_GENERIC is not set
489# CONFIG_BLK_DEV_PLATFORM is not set
490CONFIG_BLK_DEV_IDEDMA_SFF=y
491
492#
493# PCI IDE chipsets support
494#
495# CONFIG_BLK_DEV_GENERIC is not set
496# CONFIG_BLK_DEV_AEC62XX is not set
497# CONFIG_BLK_DEV_ALI15X3 is not set
498# CONFIG_BLK_DEV_AMD74XX is not set
499# CONFIG_BLK_DEV_CMD64X is not set
500# CONFIG_BLK_DEV_TRIFLEX is not set
501# CONFIG_BLK_DEV_CS5530 is not set
502# CONFIG_BLK_DEV_HPT366 is not set
503# CONFIG_BLK_DEV_JMICRON is not set
504# CONFIG_BLK_DEV_SC1200 is not set
505# CONFIG_BLK_DEV_PIIX is not set
506# CONFIG_BLK_DEV_IT8172 is not set
507# CONFIG_BLK_DEV_IT8213 is not set
508# CONFIG_BLK_DEV_IT821X is not set
509# CONFIG_BLK_DEV_NS87415 is not set
510# CONFIG_BLK_DEV_PDC202XX_OLD is not set
511# CONFIG_BLK_DEV_PDC202XX_NEW is not set
512# CONFIG_BLK_DEV_SVWKS is not set
513# CONFIG_BLK_DEV_SIIMAGE is not set
514# CONFIG_BLK_DEV_SLC90E66 is not set
515# CONFIG_BLK_DEV_TRM290 is not set
516# CONFIG_BLK_DEV_VIA82CXXX is not set
517# CONFIG_BLK_DEV_TC86C001 is not set
518CONFIG_BLK_DEV_IDE_TX4938=y
519CONFIG_BLK_DEV_IDE_TX4939=y
520CONFIG_BLK_DEV_IDEDMA=y
371 521
372# 522#
373# SCSI device support 523# SCSI device support
@@ -390,7 +540,6 @@ CONFIG_HAVE_IDE=y
390# CONFIG_IEEE1394 is not set 540# CONFIG_IEEE1394 is not set
391# CONFIG_I2O is not set 541# CONFIG_I2O is not set
392CONFIG_NETDEVICES=y 542CONFIG_NETDEVICES=y
393# CONFIG_NETDEVICES_MULTIQUEUE is not set
394# CONFIG_DUMMY is not set 543# CONFIG_DUMMY is not set
395# CONFIG_BONDING is not set 544# CONFIG_BONDING is not set
396# CONFIG_EQUALIZER is not set 545# CONFIG_EQUALIZER is not set
@@ -412,15 +561,19 @@ CONFIG_PHYLIB=y
412# CONFIG_BROADCOM_PHY is not set 561# CONFIG_BROADCOM_PHY is not set
413# CONFIG_ICPLUS_PHY is not set 562# CONFIG_ICPLUS_PHY is not set
414# CONFIG_REALTEK_PHY is not set 563# CONFIG_REALTEK_PHY is not set
564# CONFIG_NATIONAL_PHY is not set
565# CONFIG_STE10XP is not set
566# CONFIG_LSI_ET1011C_PHY is not set
415# CONFIG_FIXED_PHY is not set 567# CONFIG_FIXED_PHY is not set
416# CONFIG_MDIO_BITBANG is not set 568# CONFIG_MDIO_BITBANG is not set
417CONFIG_NET_ETHERNET=y 569CONFIG_NET_ETHERNET=y
418# CONFIG_MII is not set 570CONFIG_MII=y
419# CONFIG_AX88796 is not set 571# CONFIG_AX88796 is not set
420# CONFIG_HAPPYMEAL is not set 572# CONFIG_HAPPYMEAL is not set
421# CONFIG_SUNGEM is not set 573# CONFIG_SUNGEM is not set
422# CONFIG_CASSINI is not set 574# CONFIG_CASSINI is not set
423# CONFIG_NET_VENDOR_3COM is not set 575# CONFIG_NET_VENDOR_3COM is not set
576CONFIG_SMC91X=y
424# CONFIG_DM9000 is not set 577# CONFIG_DM9000 is not set
425# CONFIG_NET_TULIP is not set 578# CONFIG_NET_TULIP is not set
426# CONFIG_HP100 is not set 579# CONFIG_HP100 is not set
@@ -429,6 +582,9 @@ CONFIG_NE2000=y
429# CONFIG_IBM_NEW_EMAC_RGMII is not set 582# CONFIG_IBM_NEW_EMAC_RGMII is not set
430# CONFIG_IBM_NEW_EMAC_TAH is not set 583# CONFIG_IBM_NEW_EMAC_TAH is not set
431# CONFIG_IBM_NEW_EMAC_EMAC4 is not set 584# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
585# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
586# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
587# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
432CONFIG_NET_PCI=y 588CONFIG_NET_PCI=y
433# CONFIG_PCNET32 is not set 589# CONFIG_PCNET32 is not set
434# CONFIG_AMD8111_ETH is not set 590# CONFIG_AMD8111_ETH is not set
@@ -436,7 +592,6 @@ CONFIG_NET_PCI=y
436# CONFIG_B44 is not set 592# CONFIG_B44 is not set
437# CONFIG_FORCEDETH is not set 593# CONFIG_FORCEDETH is not set
438CONFIG_TC35815=y 594CONFIG_TC35815=y
439# CONFIG_EEPRO100 is not set
440# CONFIG_E100 is not set 595# CONFIG_E100 is not set
441# CONFIG_FEALNX is not set 596# CONFIG_FEALNX is not set
442# CONFIG_NATSEMI is not set 597# CONFIG_NATSEMI is not set
@@ -445,9 +600,11 @@ CONFIG_TC35815=y
445# CONFIG_R6040 is not set 600# CONFIG_R6040 is not set
446# CONFIG_SIS900 is not set 601# CONFIG_SIS900 is not set
447# CONFIG_EPIC100 is not set 602# CONFIG_EPIC100 is not set
603# CONFIG_SMSC9420 is not set
448# CONFIG_SUNDANCE is not set 604# CONFIG_SUNDANCE is not set
449# CONFIG_TLAN is not set 605# CONFIG_TLAN is not set
450# CONFIG_VIA_RHINE is not set 606# CONFIG_VIA_RHINE is not set
607# CONFIG_ATL2 is not set
451# CONFIG_NETDEV_1000 is not set 608# CONFIG_NETDEV_1000 is not set
452# CONFIG_NETDEV_10000 is not set 609# CONFIG_NETDEV_10000 is not set
453# CONFIG_TR is not set 610# CONFIG_TR is not set
@@ -458,6 +615,10 @@ CONFIG_TC35815=y
458# CONFIG_WLAN_PRE80211 is not set 615# CONFIG_WLAN_PRE80211 is not set
459# CONFIG_WLAN_80211 is not set 616# CONFIG_WLAN_80211 is not set
460# CONFIG_IWLWIFI_LEDS is not set 617# CONFIG_IWLWIFI_LEDS is not set
618
619#
620# Enable WiMAX (Networking options) to see the WiMAX drivers
621#
461# CONFIG_WAN is not set 622# CONFIG_WAN is not set
462# CONFIG_FDDI is not set 623# CONFIG_FDDI is not set
463# CONFIG_PPP is not set 624# CONFIG_PPP is not set
@@ -502,6 +663,7 @@ CONFIG_SERIAL_TXX9_CONSOLE=y
502CONFIG_SERIAL_TXX9_STDSERIAL=y 663CONFIG_SERIAL_TXX9_STDSERIAL=y
503# CONFIG_SERIAL_JSM is not set 664# CONFIG_SERIAL_JSM is not set
504CONFIG_UNIX98_PTYS=y 665CONFIG_UNIX98_PTYS=y
666# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
505CONFIG_LEGACY_PTYS=y 667CONFIG_LEGACY_PTYS=y
506CONFIG_LEGACY_PTY_COUNT=256 668CONFIG_LEGACY_PTY_COUNT=256
507# CONFIG_IPMI_HANDLER is not set 669# CONFIG_IPMI_HANDLER is not set
@@ -517,17 +679,19 @@ CONFIG_SPI_MASTER=y
517# 679#
518# SPI Master Controller Drivers 680# SPI Master Controller Drivers
519# 681#
682# CONFIG_SPI_BITBANG is not set
683# CONFIG_SPI_GPIO is not set
520CONFIG_SPI_TXX9=y 684CONFIG_SPI_TXX9=y
521 685
522# 686#
523# SPI Protocol Masters 687# SPI Protocol Masters
524# 688#
525CONFIG_EEPROM_AT25=y
526# CONFIG_SPI_TLE62X0 is not set 689# CONFIG_SPI_TLE62X0 is not set
527CONFIG_HAVE_GPIO_LIB=y 690CONFIG_ARCH_REQUIRE_GPIOLIB=y
691CONFIG_GPIOLIB=y
528 692
529# 693#
530# GPIO Support 694# Memory mapped GPIO expanders:
531# 695#
532 696
533# 697#
@@ -535,8 +699,14 @@ CONFIG_HAVE_GPIO_LIB=y
535# 699#
536 700
537# 701#
702# PCI GPIO expanders:
703#
704# CONFIG_GPIO_BT8XX is not set
705
706#
538# SPI GPIO expanders: 707# SPI GPIO expanders:
539# 708#
709# CONFIG_GPIO_MAX7301 is not set
540# CONFIG_GPIO_MCP23S08 is not set 710# CONFIG_GPIO_MCP23S08 is not set
541# CONFIG_W1 is not set 711# CONFIG_W1 is not set
542# CONFIG_POWER_SUPPLY is not set 712# CONFIG_POWER_SUPPLY is not set
@@ -550,6 +720,7 @@ CONFIG_WATCHDOG=y
550# Watchdog Device Drivers 720# Watchdog Device Drivers
551# 721#
552# CONFIG_SOFT_WATCHDOG is not set 722# CONFIG_SOFT_WATCHDOG is not set
723# CONFIG_ALIM7101_WDT is not set
553CONFIG_TXX9_WDT=m 724CONFIG_TXX9_WDT=m
554 725
555# 726#
@@ -557,18 +728,21 @@ CONFIG_TXX9_WDT=m
557# 728#
558# CONFIG_PCIPCWATCHDOG is not set 729# CONFIG_PCIPCWATCHDOG is not set
559# CONFIG_WDTPCI is not set 730# CONFIG_WDTPCI is not set
731CONFIG_SSB_POSSIBLE=y
560 732
561# 733#
562# Sonics Silicon Backplane 734# Sonics Silicon Backplane
563# 735#
564CONFIG_SSB_POSSIBLE=y
565# CONFIG_SSB is not set 736# CONFIG_SSB is not set
566 737
567# 738#
568# Multifunction device drivers 739# Multifunction device drivers
569# 740#
741# CONFIG_MFD_CORE is not set
570# CONFIG_MFD_SM501 is not set 742# CONFIG_MFD_SM501 is not set
571# CONFIG_HTC_PASIC3 is not set 743# CONFIG_HTC_PASIC3 is not set
744# CONFIG_MFD_TMIO is not set
745# CONFIG_REGULATOR is not set
572 746
573# 747#
574# Multimedia devices 748# Multimedia devices
@@ -599,15 +773,27 @@ CONFIG_SSB_POSSIBLE=y
599# Display device support 773# Display device support
600# 774#
601# CONFIG_DISPLAY_SUPPORT is not set 775# CONFIG_DISPLAY_SUPPORT is not set
602
603#
604# Sound
605#
606# CONFIG_SOUND is not set 776# CONFIG_SOUND is not set
607# CONFIG_USB_SUPPORT is not set 777# CONFIG_USB_SUPPORT is not set
608# CONFIG_MMC is not set 778# CONFIG_MMC is not set
609# CONFIG_MEMSTICK is not set 779# CONFIG_MEMSTICK is not set
610# CONFIG_NEW_LEDS is not set 780CONFIG_NEW_LEDS=y
781CONFIG_LEDS_CLASS=y
782
783#
784# LED drivers
785#
786CONFIG_LEDS_GPIO=y
787
788#
789# LED Triggers
790#
791CONFIG_LEDS_TRIGGERS=y
792# CONFIG_LEDS_TRIGGER_TIMER is not set
793CONFIG_LEDS_TRIGGER_IDE_DISK=y
794CONFIG_LEDS_TRIGGER_HEARTBEAT=y
795# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
796# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
611# CONFIG_ACCESSIBILITY is not set 797# CONFIG_ACCESSIBILITY is not set
612# CONFIG_INFINIBAND is not set 798# CONFIG_INFINIBAND is not set
613CONFIG_RTC_LIB=y 799CONFIG_RTC_LIB=y
@@ -628,35 +814,47 @@ CONFIG_RTC_INTF_DEV_UIE_EMUL=y
628# 814#
629# SPI RTC drivers 815# SPI RTC drivers
630# 816#
817# CONFIG_RTC_DRV_M41T94 is not set
818# CONFIG_RTC_DRV_DS1305 is not set
819# CONFIG_RTC_DRV_DS1390 is not set
631# CONFIG_RTC_DRV_MAX6902 is not set 820# CONFIG_RTC_DRV_MAX6902 is not set
632# CONFIG_RTC_DRV_R9701 is not set 821# CONFIG_RTC_DRV_R9701 is not set
633CONFIG_RTC_DRV_RS5C348=y 822CONFIG_RTC_DRV_RS5C348=y
823# CONFIG_RTC_DRV_DS3234 is not set
634 824
635# 825#
636# Platform RTC drivers 826# Platform RTC drivers
637# 827#
638# CONFIG_RTC_DRV_CMOS is not set 828# CONFIG_RTC_DRV_CMOS is not set
829# CONFIG_RTC_DRV_DS1286 is not set
639# CONFIG_RTC_DRV_DS1511 is not set 830# CONFIG_RTC_DRV_DS1511 is not set
640# CONFIG_RTC_DRV_DS1553 is not set 831# CONFIG_RTC_DRV_DS1553 is not set
641CONFIG_RTC_DRV_DS1742=y 832CONFIG_RTC_DRV_DS1742=y
642# CONFIG_RTC_DRV_STK17TA8 is not set 833# CONFIG_RTC_DRV_STK17TA8 is not set
643# CONFIG_RTC_DRV_M48T86 is not set 834# CONFIG_RTC_DRV_M48T86 is not set
835# CONFIG_RTC_DRV_M48T35 is not set
644# CONFIG_RTC_DRV_M48T59 is not set 836# CONFIG_RTC_DRV_M48T59 is not set
837# CONFIG_RTC_DRV_BQ4802 is not set
645# CONFIG_RTC_DRV_V3020 is not set 838# CONFIG_RTC_DRV_V3020 is not set
646 839
647# 840#
648# on-CPU RTC drivers 841# on-CPU RTC drivers
649# 842#
843CONFIG_RTC_DRV_TX4939=y
844# CONFIG_DMADEVICES is not set
650# CONFIG_UIO is not set 845# CONFIG_UIO is not set
846# CONFIG_STAGING is not set
651 847
652# 848#
653# File systems 849# File systems
654# 850#
655# CONFIG_EXT2_FS is not set 851# CONFIG_EXT2_FS is not set
656# CONFIG_EXT3_FS is not set 852# CONFIG_EXT3_FS is not set
853# CONFIG_EXT4_FS is not set
657# CONFIG_REISERFS_FS is not set 854# CONFIG_REISERFS_FS is not set
658# CONFIG_JFS_FS is not set 855# CONFIG_JFS_FS is not set
659CONFIG_FS_POSIX_ACL=y 856CONFIG_FS_POSIX_ACL=y
857CONFIG_FILE_LOCKING=y
660# CONFIG_XFS_FS is not set 858# CONFIG_XFS_FS is not set
661# CONFIG_OCFS2_FS is not set 859# CONFIG_OCFS2_FS is not set
662# CONFIG_DNOTIFY is not set 860# CONFIG_DNOTIFY is not set
@@ -687,30 +885,19 @@ CONFIG_GENERIC_ACL=y
687CONFIG_PROC_FS=y 885CONFIG_PROC_FS=y
688# CONFIG_PROC_KCORE is not set 886# CONFIG_PROC_KCORE is not set
689CONFIG_PROC_SYSCTL=y 887CONFIG_PROC_SYSCTL=y
888CONFIG_PROC_PAGE_MONITOR=y
690CONFIG_SYSFS=y 889CONFIG_SYSFS=y
691CONFIG_TMPFS=y 890CONFIG_TMPFS=y
692CONFIG_TMPFS_POSIX_ACL=y 891CONFIG_TMPFS_POSIX_ACL=y
693# CONFIG_HUGETLB_PAGE is not set 892# CONFIG_HUGETLB_PAGE is not set
694# CONFIG_CONFIGFS_FS is not set 893# CONFIG_CONFIGFS_FS is not set
695 894# CONFIG_MISC_FILESYSTEMS is not set
696#
697# Miscellaneous filesystems
698#
699# CONFIG_HFSPLUS_FS is not set
700# CONFIG_CRAMFS is not set
701# CONFIG_VXFS_FS is not set
702# CONFIG_MINIX_FS is not set
703# CONFIG_HPFS_FS is not set
704# CONFIG_QNX4FS_FS is not set
705# CONFIG_ROMFS_FS is not set
706# CONFIG_SYSV_FS is not set
707# CONFIG_UFS_FS is not set
708CONFIG_NETWORK_FILESYSTEMS=y 895CONFIG_NETWORK_FILESYSTEMS=y
709CONFIG_NFS_FS=y 896CONFIG_NFS_FS=y
710CONFIG_NFS_V3=y 897CONFIG_NFS_V3=y
711# CONFIG_NFS_V3_ACL is not set 898# CONFIG_NFS_V3_ACL is not set
712# CONFIG_NFSD is not set
713CONFIG_ROOT_NFS=y 899CONFIG_ROOT_NFS=y
900# CONFIG_NFSD is not set
714CONFIG_LOCKD=y 901CONFIG_LOCKD=y
715CONFIG_LOCKD_V4=y 902CONFIG_LOCKD_V4=y
716CONFIG_NFS_COMMON=y 903CONFIG_NFS_COMMON=y
@@ -740,7 +927,16 @@ CONFIG_FRAME_WARN=1024
740CONFIG_DEBUG_FS=y 927CONFIG_DEBUG_FS=y
741# CONFIG_HEADERS_CHECK is not set 928# CONFIG_HEADERS_CHECK is not set
742# CONFIG_DEBUG_KERNEL is not set 929# CONFIG_DEBUG_KERNEL is not set
930# CONFIG_DEBUG_MEMORY_INIT is not set
931# CONFIG_RCU_CPU_STALL_DETECTOR is not set
932CONFIG_SYSCTL_SYSCALL_CHECK=y
933
934#
935# Tracers
936#
937# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
743# CONFIG_SAMPLES is not set 938# CONFIG_SAMPLES is not set
939CONFIG_HAVE_ARCH_KGDB=y
744CONFIG_CMDLINE="" 940CONFIG_CMDLINE=""
745 941
746# 942#
@@ -748,15 +944,18 @@ CONFIG_CMDLINE=""
748# 944#
749# CONFIG_KEYS is not set 945# CONFIG_KEYS is not set
750# CONFIG_SECURITY is not set 946# CONFIG_SECURITY is not set
947# CONFIG_SECURITYFS is not set
948# CONFIG_SECURITY_FILE_CAPABILITIES is not set
751# CONFIG_CRYPTO is not set 949# CONFIG_CRYPTO is not set
752 950
753# 951#
754# Library routines 952# Library routines
755# 953#
756CONFIG_BITREVERSE=y 954CONFIG_BITREVERSE=y
757# CONFIG_GENERIC_FIND_FIRST_BIT is not set 955CONFIG_GENERIC_FIND_LAST_BIT=y
758# CONFIG_CRC_CCITT is not set 956# CONFIG_CRC_CCITT is not set
759# CONFIG_CRC16 is not set 957# CONFIG_CRC16 is not set
958# CONFIG_CRC_T10DIF is not set
760# CONFIG_CRC_ITU_T is not set 959# CONFIG_CRC_ITU_T is not set
761CONFIG_CRC32=y 960CONFIG_CRC32=y
762# CONFIG_CRC7 is not set 961# CONFIG_CRC7 is not set
diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h
index ac5d541368e9..6c5b40905dd6 100644
--- a/arch/mips/include/asm/compat.h
+++ b/arch/mips/include/asm/compat.h
@@ -3,6 +3,8 @@
3/* 3/*
4 * Architecture specific compatibility types 4 * Architecture specific compatibility types
5 */ 5 */
6#include <linux/seccomp.h>
7#include <linux/thread_info.h>
6#include <linux/types.h> 8#include <linux/types.h>
7#include <asm/page.h> 9#include <asm/page.h>
8#include <asm/ptrace.h> 10#include <asm/ptrace.h>
@@ -218,4 +220,9 @@ struct compat_shmid64_ds {
218 compat_ulong_t __unused2; 220 compat_ulong_t __unused2;
219}; 221};
220 222
223static inline int is_compat_task(void)
224{
225 return test_thread_flag(TIF_32BIT);
226}
227
221#endif /* _ASM_COMPAT_H */ 228#endif /* _ASM_COMPAT_H */
diff --git a/arch/mips/include/asm/hazards.h b/arch/mips/include/asm/hazards.h
index 43baed16a109..134e1fc8f4d6 100644
--- a/arch/mips/include/asm/hazards.h
+++ b/arch/mips/include/asm/hazards.h
@@ -138,7 +138,8 @@ do { \
138 __instruction_hazard(); \ 138 __instruction_hazard(); \
139} while (0) 139} while (0)
140 140
141#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_CAVIUM_OCTEON) 141#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \
142 defined(CONFIG_CPU_R5500)
142 143
143/* 144/*
144 * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. 145 * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
diff --git a/arch/mips/include/asm/prefetch.h b/arch/mips/include/asm/prefetch.h
index 17850834ccb0..a56594f360ee 100644
--- a/arch/mips/include/asm/prefetch.h
+++ b/arch/mips/include/asm/prefetch.h
@@ -26,7 +26,7 @@
26 * Pref_WriteBackInvalidate is a nop and Pref_PrepareForStore is broken in 26 * Pref_WriteBackInvalidate is a nop and Pref_PrepareForStore is broken in
27 * current versions due to erratum G105. 27 * current versions due to erratum G105.
28 * 28 *
29 * VR7701 only implements the Load prefetch. 29 * VR5500 (including VR5701 and VR7701) only implement load prefetch.
30 * 30 *
31 * Finally MIPS32 and MIPS64 implement all of the following hints. 31 * Finally MIPS32 and MIPS64 implement all of the following hints.
32 */ 32 */
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index a7162a4484cf..1bdbcad3bb74 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -149,6 +149,7 @@ void __init check_wait(void)
149 case CPU_R4650: 149 case CPU_R4650:
150 case CPU_R4700: 150 case CPU_R4700:
151 case CPU_R5000: 151 case CPU_R5000:
152 case CPU_R5500:
152 case CPU_NEVADA: 153 case CPU_NEVADA:
153 case CPU_4KC: 154 case CPU_4KC:
154 case CPU_4KEC: 155 case CPU_4KEC:
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index 2f8452b404c7..1a86f84fa947 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -235,7 +235,7 @@ SYSCALL_DEFINE6(32_ipc, u32, call, long, first, long, second, long, third,
235#else 235#else
236 236
237SYSCALL_DEFINE6(32_ipc, u32, call, int, first, int, second, int, third, 237SYSCALL_DEFINE6(32_ipc, u32, call, int, first, int, second, int, third,
238 u32, ptr, u32 fifth) 238 u32, ptr, u32, fifth)
239{ 239{
240 return -ENOSYS; 240 return -ENOSYS;
241} 241}
diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c
index 1417c6494858..48060c635acd 100644
--- a/arch/mips/mm/page.c
+++ b/arch/mips/mm/page.c
@@ -172,8 +172,9 @@ static void __cpuinit set_prefetch_parameters(void)
172 */ 172 */
173 cache_line_size = cpu_dcache_line_size(); 173 cache_line_size = cpu_dcache_line_size();
174 switch (current_cpu_type()) { 174 switch (current_cpu_type()) {
175 case CPU_R5500:
175 case CPU_TX49XX: 176 case CPU_TX49XX:
176 /* TX49 supports only Pref_Load */ 177 /* These processors only support the Pref_Load. */
177 pref_bias_copy_load = 256; 178 pref_bias_copy_load = 256;
178 break; 179 break;
179 180
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 42942038d0fd..f335cf6cdd78 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -318,6 +318,7 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,
318 case CPU_BCM4710: 318 case CPU_BCM4710:
319 case CPU_LOONGSON2: 319 case CPU_LOONGSON2:
320 case CPU_CAVIUM_OCTEON: 320 case CPU_CAVIUM_OCTEON:
321 case CPU_R5500:
321 if (m4kc_tlbp_war()) 322 if (m4kc_tlbp_war())
322 uasm_i_nop(p); 323 uasm_i_nop(p);
323 tlbw(p); 324 tlbw(p);
diff --git a/arch/powerpc/configs/40x/virtex_defconfig b/arch/powerpc/configs/40x/virtex_defconfig
index b6888384dd74..f5698f962e58 100644
--- a/arch/powerpc/configs/40x/virtex_defconfig
+++ b/arch/powerpc/configs/40x/virtex_defconfig
@@ -686,7 +686,7 @@ CONFIG_SERIAL_UARTLITE_CONSOLE=y
686CONFIG_SERIAL_CORE=y 686CONFIG_SERIAL_CORE=y
687CONFIG_SERIAL_CORE_CONSOLE=y 687CONFIG_SERIAL_CORE_CONSOLE=y
688# CONFIG_SERIAL_JSM is not set 688# CONFIG_SERIAL_JSM is not set
689# CONFIG_SERIAL_OF_PLATFORM is not set 689CONFIG_SERIAL_OF_PLATFORM=y
690# CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL is not set 690# CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL is not set
691CONFIG_UNIX98_PTYS=y 691CONFIG_UNIX98_PTYS=y
692# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 692# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
diff --git a/arch/powerpc/configs/44x/virtex5_defconfig b/arch/powerpc/configs/44x/virtex5_defconfig
index 15aab1ca6384..1bf0a63614b1 100644
--- a/arch/powerpc/configs/44x/virtex5_defconfig
+++ b/arch/powerpc/configs/44x/virtex5_defconfig
@@ -691,7 +691,7 @@ CONFIG_SERIAL_UARTLITE_CONSOLE=y
691CONFIG_SERIAL_CORE=y 691CONFIG_SERIAL_CORE=y
692CONFIG_SERIAL_CORE_CONSOLE=y 692CONFIG_SERIAL_CORE_CONSOLE=y
693# CONFIG_SERIAL_JSM is not set 693# CONFIG_SERIAL_JSM is not set
694# CONFIG_SERIAL_OF_PLATFORM is not set 694CONFIG_SERIAL_OF_PLATFORM=y
695# CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL is not set 695# CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL is not set
696CONFIG_UNIX98_PTYS=y 696CONFIG_UNIX98_PTYS=y
697# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 697# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
diff --git a/arch/powerpc/configs/linkstation_defconfig b/arch/powerpc/configs/linkstation_defconfig
index aa5855a156de..15900dcf0bfa 100644
--- a/arch/powerpc/configs/linkstation_defconfig
+++ b/arch/powerpc/configs/linkstation_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.29-rc2 3# Linux kernel version: 2.6.29-rc6
4# Mon Jan 26 15:35:29 2009 4# Fri Mar 6 00:07:38 2009
5# 5#
6# CONFIG_PPC64 is not set 6# CONFIG_PPC64 is not set
7 7
@@ -71,6 +71,15 @@ CONFIG_POSIX_MQUEUE=y
71# CONFIG_BSD_PROCESS_ACCT is not set 71# CONFIG_BSD_PROCESS_ACCT is not set
72# CONFIG_TASKSTATS is not set 72# CONFIG_TASKSTATS is not set
73# CONFIG_AUDIT is not set 73# CONFIG_AUDIT is not set
74
75#
76# RCU Subsystem
77#
78CONFIG_CLASSIC_RCU=y
79# CONFIG_TREE_RCU is not set
80# CONFIG_PREEMPT_RCU is not set
81# CONFIG_TREE_RCU_TRACE is not set
82# CONFIG_PREEMPT_RCU_TRACE is not set
74CONFIG_IKCONFIG=y 83CONFIG_IKCONFIG=y
75CONFIG_IKCONFIG_PROC=y 84CONFIG_IKCONFIG_PROC=y
76CONFIG_LOG_BUF_SHIFT=14 85CONFIG_LOG_BUF_SHIFT=14
@@ -88,6 +97,7 @@ CONFIG_NAMESPACES=y
88# CONFIG_IPC_NS is not set 97# CONFIG_IPC_NS is not set
89# CONFIG_USER_NS is not set 98# CONFIG_USER_NS is not set
90# CONFIG_PID_NS is not set 99# CONFIG_PID_NS is not set
100# CONFIG_NET_NS is not set
91CONFIG_BLK_DEV_INITRD=y 101CONFIG_BLK_DEV_INITRD=y
92CONFIG_INITRAMFS_SOURCE="" 102CONFIG_INITRAMFS_SOURCE=""
93CONFIG_CC_OPTIMIZE_FOR_SIZE=y 103CONFIG_CC_OPTIMIZE_FOR_SIZE=y
@@ -153,11 +163,6 @@ CONFIG_DEFAULT_AS=y
153# CONFIG_DEFAULT_CFQ is not set 163# CONFIG_DEFAULT_CFQ is not set
154# CONFIG_DEFAULT_NOOP is not set 164# CONFIG_DEFAULT_NOOP is not set
155CONFIG_DEFAULT_IOSCHED="anticipatory" 165CONFIG_DEFAULT_IOSCHED="anticipatory"
156CONFIG_CLASSIC_RCU=y
157# CONFIG_TREE_RCU is not set
158# CONFIG_PREEMPT_RCU is not set
159# CONFIG_TREE_RCU_TRACE is not set
160# CONFIG_PREEMPT_RCU_TRACE is not set
161# CONFIG_FREEZER is not set 166# CONFIG_FREEZER is not set
162 167
163# 168#
@@ -294,7 +299,6 @@ CONFIG_NET=y
294# 299#
295# Networking options 300# Networking options
296# 301#
297# CONFIG_NET_NS is not set
298CONFIG_COMPAT_NET_DEV_OPS=y 302CONFIG_COMPAT_NET_DEV_OPS=y
299CONFIG_PACKET=y 303CONFIG_PACKET=y
300CONFIG_PACKET_MMAP=y 304CONFIG_PACKET_MMAP=y
@@ -508,8 +512,8 @@ CONFIG_MTD_CONCAT=y
508CONFIG_MTD_PARTITIONS=y 512CONFIG_MTD_PARTITIONS=y
509# CONFIG_MTD_TESTS is not set 513# CONFIG_MTD_TESTS is not set
510# CONFIG_MTD_REDBOOT_PARTS is not set 514# CONFIG_MTD_REDBOOT_PARTS is not set
511# CONFIG_MTD_CMDLINE_PARTS is not set 515CONFIG_MTD_CMDLINE_PARTS=y
512# CONFIG_MTD_OF_PARTS is not set 516CONFIG_MTD_OF_PARTS=y
513# CONFIG_MTD_AR7_PARTS is not set 517# CONFIG_MTD_AR7_PARTS is not set
514 518
515# 519#
@@ -587,7 +591,6 @@ CONFIG_MTD_PHYSMAP=y
587# LPDDR flash memory drivers 591# LPDDR flash memory drivers
588# 592#
589# CONFIG_MTD_LPDDR is not set 593# CONFIG_MTD_LPDDR is not set
590# CONFIG_MTD_QINFO_PROBE is not set
591 594
592# 595#
593# UBI - Unsorted block images 596# UBI - Unsorted block images
@@ -617,13 +620,19 @@ CONFIG_BLK_DEV_RAM_SIZE=8192
617# CONFIG_BLK_DEV_HD is not set 620# CONFIG_BLK_DEV_HD is not set
618CONFIG_MISC_DEVICES=y 621CONFIG_MISC_DEVICES=y
619# CONFIG_PHANTOM is not set 622# CONFIG_PHANTOM is not set
620# CONFIG_EEPROM_93CX6 is not set
621# CONFIG_SGI_IOC4 is not set 623# CONFIG_SGI_IOC4 is not set
622# CONFIG_TIFM_CORE is not set 624# CONFIG_TIFM_CORE is not set
623# CONFIG_ICS932S401 is not set 625# CONFIG_ICS932S401 is not set
624# CONFIG_ENCLOSURE_SERVICES is not set 626# CONFIG_ENCLOSURE_SERVICES is not set
625# CONFIG_HP_ILO is not set 627# CONFIG_HP_ILO is not set
626# CONFIG_C2PORT is not set 628# CONFIG_C2PORT is not set
629
630#
631# EEPROM support
632#
633# CONFIG_EEPROM_AT24 is not set
634CONFIG_EEPROM_LEGACY=m
635# CONFIG_EEPROM_93CX6 is not set
627CONFIG_HAVE_IDE=y 636CONFIG_HAVE_IDE=y
628# CONFIG_IDE is not set 637# CONFIG_IDE is not set
629 638
@@ -839,6 +848,7 @@ CONFIG_R8169=y
839# CONFIG_QLA3XXX is not set 848# CONFIG_QLA3XXX is not set
840# CONFIG_ATL1 is not set 849# CONFIG_ATL1 is not set
841# CONFIG_ATL1E is not set 850# CONFIG_ATL1E is not set
851# CONFIG_ATL1C is not set
842# CONFIG_JME is not set 852# CONFIG_JME is not set
843CONFIG_NETDEV_10000=y 853CONFIG_NETDEV_10000=y
844# CONFIG_CHELSIO_T1 is not set 854# CONFIG_CHELSIO_T1 is not set
@@ -1037,8 +1047,6 @@ CONFIG_I2C_MPC=y
1037# Miscellaneous I2C Chip support 1047# Miscellaneous I2C Chip support
1038# 1048#
1039# CONFIG_DS1682 is not set 1049# CONFIG_DS1682 is not set
1040# CONFIG_EEPROM_AT24 is not set
1041CONFIG_EEPROM_LEGACY=m
1042# CONFIG_SENSORS_PCF8574 is not set 1050# CONFIG_SENSORS_PCF8574 is not set
1043# CONFIG_PCF8575 is not set 1051# CONFIG_PCF8575 is not set
1044# CONFIG_SENSORS_PCA9539 is not set 1052# CONFIG_SENSORS_PCA9539 is not set
diff --git a/arch/powerpc/configs/storcenter_defconfig b/arch/powerpc/configs/storcenter_defconfig
index 86512c8790d1..94903465ea12 100644
--- a/arch/powerpc/configs/storcenter_defconfig
+++ b/arch/powerpc/configs/storcenter_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.29-rc2 3# Linux kernel version: 2.6.29-rc6
4# Mon Jan 26 15:35:46 2009 4# Fri Mar 6 00:09:08 2009
5# 5#
6# CONFIG_PPC64 is not set 6# CONFIG_PPC64 is not set
7 7
@@ -71,6 +71,15 @@ CONFIG_SYSVIPC_SYSCTL=y
71# CONFIG_BSD_PROCESS_ACCT is not set 71# CONFIG_BSD_PROCESS_ACCT is not set
72# CONFIG_TASKSTATS is not set 72# CONFIG_TASKSTATS is not set
73# CONFIG_AUDIT is not set 73# CONFIG_AUDIT is not set
74
75#
76# RCU Subsystem
77#
78CONFIG_CLASSIC_RCU=y
79# CONFIG_TREE_RCU is not set
80# CONFIG_PREEMPT_RCU is not set
81# CONFIG_TREE_RCU_TRACE is not set
82# CONFIG_PREEMPT_RCU_TRACE is not set
74# CONFIG_IKCONFIG is not set 83# CONFIG_IKCONFIG is not set
75CONFIG_LOG_BUF_SHIFT=14 84CONFIG_LOG_BUF_SHIFT=14
76CONFIG_GROUP_SCHED=y 85CONFIG_GROUP_SCHED=y
@@ -144,11 +153,6 @@ CONFIG_IOSCHED_CFQ=y
144CONFIG_DEFAULT_CFQ=y 153CONFIG_DEFAULT_CFQ=y
145# CONFIG_DEFAULT_NOOP is not set 154# CONFIG_DEFAULT_NOOP is not set
146CONFIG_DEFAULT_IOSCHED="cfq" 155CONFIG_DEFAULT_IOSCHED="cfq"
147CONFIG_CLASSIC_RCU=y
148# CONFIG_TREE_RCU is not set
149# CONFIG_PREEMPT_RCU is not set
150# CONFIG_TREE_RCU_TRACE is not set
151# CONFIG_PREEMPT_RCU_TRACE is not set
152# CONFIG_FREEZER is not set 156# CONFIG_FREEZER is not set
153 157
154# 158#
@@ -377,8 +381,8 @@ CONFIG_MTD=y
377CONFIG_MTD_PARTITIONS=y 381CONFIG_MTD_PARTITIONS=y
378# CONFIG_MTD_TESTS is not set 382# CONFIG_MTD_TESTS is not set
379# CONFIG_MTD_REDBOOT_PARTS is not set 383# CONFIG_MTD_REDBOOT_PARTS is not set
380# CONFIG_MTD_CMDLINE_PARTS is not set 384CONFIG_MTD_CMDLINE_PARTS=y
381# CONFIG_MTD_OF_PARTS is not set 385CONFIG_MTD_OF_PARTS=y
382# CONFIG_MTD_AR7_PARTS is not set 386# CONFIG_MTD_AR7_PARTS is not set
383 387
384# 388#
@@ -452,7 +456,6 @@ CONFIG_MTD_PHYSMAP=y
452# LPDDR flash memory drivers 456# LPDDR flash memory drivers
453# 457#
454# CONFIG_MTD_LPDDR is not set 458# CONFIG_MTD_LPDDR is not set
455# CONFIG_MTD_QINFO_PROBE is not set
456 459
457# 460#
458# UBI - Unsorted block images 461# UBI - Unsorted block images
@@ -478,13 +481,19 @@ CONFIG_BLK_DEV=y
478# CONFIG_BLK_DEV_HD is not set 481# CONFIG_BLK_DEV_HD is not set
479CONFIG_MISC_DEVICES=y 482CONFIG_MISC_DEVICES=y
480# CONFIG_PHANTOM is not set 483# CONFIG_PHANTOM is not set
481# CONFIG_EEPROM_93CX6 is not set
482# CONFIG_SGI_IOC4 is not set 484# CONFIG_SGI_IOC4 is not set
483# CONFIG_TIFM_CORE is not set 485# CONFIG_TIFM_CORE is not set
484# CONFIG_ICS932S401 is not set 486# CONFIG_ICS932S401 is not set
485# CONFIG_ENCLOSURE_SERVICES is not set 487# CONFIG_ENCLOSURE_SERVICES is not set
486# CONFIG_HP_ILO is not set 488# CONFIG_HP_ILO is not set
487# CONFIG_C2PORT is not set 489# CONFIG_C2PORT is not set
490
491#
492# EEPROM support
493#
494# CONFIG_EEPROM_AT24 is not set
495# CONFIG_EEPROM_LEGACY is not set
496# CONFIG_EEPROM_93CX6 is not set
488CONFIG_HAVE_IDE=y 497CONFIG_HAVE_IDE=y
489CONFIG_IDE=y 498CONFIG_IDE=y
490 499
@@ -677,6 +686,7 @@ CONFIG_R8169=y
677# CONFIG_QLA3XXX is not set 686# CONFIG_QLA3XXX is not set
678# CONFIG_ATL1 is not set 687# CONFIG_ATL1 is not set
679# CONFIG_ATL1E is not set 688# CONFIG_ATL1E is not set
689# CONFIG_ATL1C is not set
680# CONFIG_JME is not set 690# CONFIG_JME is not set
681# CONFIG_NETDEV_10000 is not set 691# CONFIG_NETDEV_10000 is not set
682# CONFIG_TR is not set 692# CONFIG_TR is not set
@@ -818,8 +828,6 @@ CONFIG_I2C_MPC=y
818# Miscellaneous I2C Chip support 828# Miscellaneous I2C Chip support
819# 829#
820# CONFIG_DS1682 is not set 830# CONFIG_DS1682 is not set
821# CONFIG_EEPROM_AT24 is not set
822# CONFIG_EEPROM_LEGACY is not set
823# CONFIG_SENSORS_PCF8574 is not set 831# CONFIG_SENSORS_PCF8574 is not set
824# CONFIG_PCF8575 is not set 832# CONFIG_PCF8575 is not set
825# CONFIG_SENSORS_PCA9539 is not set 833# CONFIG_SENSORS_PCA9539 is not set
@@ -1159,6 +1167,7 @@ CONFIG_JFFS2_RTIME=y
1159# CONFIG_SYSV_FS is not set 1167# CONFIG_SYSV_FS is not set
1160# CONFIG_UFS_FS is not set 1168# CONFIG_UFS_FS is not set
1161# CONFIG_NETWORK_FILESYSTEMS is not set 1169# CONFIG_NETWORK_FILESYSTEMS is not set
1170CONFIG_EXPORTFS=m
1162 1171
1163# 1172#
1164# Partition Types 1173# Partition Types
diff --git a/arch/powerpc/platforms/86xx/gef_sbc610.c b/arch/powerpc/platforms/86xx/gef_sbc610.c
index fb371f5ce132..d6b772ba3b8f 100644
--- a/arch/powerpc/platforms/86xx/gef_sbc610.c
+++ b/arch/powerpc/platforms/86xx/gef_sbc610.c
@@ -142,6 +142,10 @@ static void __init gef_sbc610_nec_fixup(struct pci_dev *pdev)
142{ 142{
143 unsigned int val; 143 unsigned int val;
144 144
145 /* Do not do the fixup on other platforms! */
146 if (!machine_is(gef_sbc610))
147 return;
148
145 printk(KERN_INFO "Running NEC uPD720101 Fixup\n"); 149 printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
146 150
147 /* Ensure ports 1, 2, 3, 4 & 5 are enabled */ 151 /* Ensure ports 1, 2, 3, 4 & 5 are enabled */
diff --git a/arch/powerpc/platforms/embedded6xx/linkstation.c b/arch/powerpc/platforms/embedded6xx/linkstation.c
index 2ca7be65c2d2..244f997de791 100644
--- a/arch/powerpc/platforms/embedded6xx/linkstation.c
+++ b/arch/powerpc/platforms/embedded6xx/linkstation.c
@@ -12,7 +12,6 @@
12 12
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/initrd.h> 14#include <linux/initrd.h>
15#include <linux/mtd/physmap.h>
16#include <linux/of_platform.h> 15#include <linux/of_platform.h>
17 16
18#include <asm/time.h> 17#include <asm/time.h>
@@ -22,39 +21,6 @@
22 21
23#include "mpc10x.h" 22#include "mpc10x.h"
24 23
25static struct mtd_partition linkstation_physmap_partitions[] = {
26 {
27 .name = "mtd_firmimg",
28 .offset = 0x000000,
29 .size = 0x300000,
30 },
31 {
32 .name = "mtd_bootcode",
33 .offset = 0x300000,
34 .size = 0x070000,
35 },
36 {
37 .name = "mtd_status",
38 .offset = 0x370000,
39 .size = 0x010000,
40 },
41 {
42 .name = "mtd_conf",
43 .offset = 0x380000,
44 .size = 0x080000,
45 },
46 {
47 .name = "mtd_allflash",
48 .offset = 0x000000,
49 .size = 0x400000,
50 },
51 {
52 .name = "mtd_data",
53 .offset = 0x310000,
54 .size = 0x0f0000,
55 },
56};
57
58static __initdata struct of_device_id of_bus_ids[] = { 24static __initdata struct of_device_id of_bus_ids[] = {
59 { .type = "soc", }, 25 { .type = "soc", },
60 { .compatible = "simple-bus", }, 26 { .compatible = "simple-bus", },
@@ -99,10 +65,6 @@ static int __init linkstation_add_bridge(struct device_node *dev)
99static void __init linkstation_setup_arch(void) 65static void __init linkstation_setup_arch(void)
100{ 66{
101 struct device_node *np; 67 struct device_node *np;
102#ifdef CONFIG_MTD_PHYSMAP
103 physmap_set_partitions(linkstation_physmap_partitions,
104 ARRAY_SIZE(linkstation_physmap_partitions));
105#endif
106 68
107 /* Lookup PCI host bridges */ 69 /* Lookup PCI host bridges */
108 for_each_compatible_node(np, "pci", "mpc10x-pci") 70 for_each_compatible_node(np, "pci", "mpc10x-pci")
diff --git a/arch/powerpc/platforms/embedded6xx/storcenter.c b/arch/powerpc/platforms/embedded6xx/storcenter.c
index 8864e4884980..613070e9ddbe 100644
--- a/arch/powerpc/platforms/embedded6xx/storcenter.c
+++ b/arch/powerpc/platforms/embedded6xx/storcenter.c
@@ -14,7 +14,6 @@
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/pci.h> 15#include <linux/pci.h>
16#include <linux/initrd.h> 16#include <linux/initrd.h>
17#include <linux/mtd/physmap.h>
18#include <linux/of_platform.h> 17#include <linux/of_platform.h>
19 18
20#include <asm/system.h> 19#include <asm/system.h>
@@ -26,32 +25,6 @@
26#include "mpc10x.h" 25#include "mpc10x.h"
27 26
28 27
29#ifdef CONFIG_MTD_PHYSMAP
30static struct mtd_partition storcenter_physmap_partitions[] = {
31 {
32 .name = "kernel",
33 .offset = 0x000000,
34 .size = 0x170000,
35 },
36 {
37 .name = "rootfs",
38 .offset = 0x170000,
39 .size = 0x590000,
40 },
41 {
42 .name = "uboot",
43 .offset = 0x700000,
44 .size = 0x040000,
45 },
46 {
47 .name = "config",
48 .offset = 0x740000,
49 .size = 0x0c0000,
50 },
51};
52#endif
53
54
55static __initdata struct of_device_id storcenter_of_bus[] = { 28static __initdata struct of_device_id storcenter_of_bus[] = {
56 { .name = "soc", }, 29 { .name = "soc", },
57 {}, 30 {},
@@ -96,11 +69,6 @@ static void __init storcenter_setup_arch(void)
96{ 69{
97 struct device_node *np; 70 struct device_node *np;
98 71
99#ifdef CONFIG_MTD_PHYSMAP
100 physmap_set_partitions(storcenter_physmap_partitions,
101 ARRAY_SIZE(storcenter_physmap_partitions));
102#endif
103
104 /* Lookup PCI host bridges */ 72 /* Lookup PCI host bridges */
105 for_each_compatible_node(np, "pci", "mpc10x-pci") 73 for_each_compatible_node(np, "pci", "mpc10x-pci")
106 storcenter_add_bridge(np); 74 storcenter_add_bridge(np);
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c
index 72da416f6162..15b6d450fbf0 100644
--- a/arch/sh/boards/board-ap325rxa.c
+++ b/arch/sh/boards/board-ap325rxa.c
@@ -22,6 +22,7 @@
22#include <linux/gpio.h> 22#include <linux/gpio.h>
23#include <linux/spi/spi.h> 23#include <linux/spi/spi.h>
24#include <linux/spi/spi_gpio.h> 24#include <linux/spi/spi_gpio.h>
25#include <media/soc_camera.h>
25#include <media/soc_camera_platform.h> 26#include <media/soc_camera_platform.h>
26#include <media/sh_mobile_ceu.h> 27#include <media/sh_mobile_ceu.h>
27#include <video/sh_mobile_lcdc.h> 28#include <video/sh_mobile_lcdc.h>
diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c
index e289376198eb..1c378d8e90c5 100644
--- a/arch/sparc/kernel/irq_64.c
+++ b/arch/sparc/kernel/irq_64.c
@@ -323,17 +323,25 @@ static void sun4u_set_affinity(unsigned int virt_irq,
323 sun4u_irq_enable(virt_irq); 323 sun4u_irq_enable(virt_irq);
324} 324}
325 325
326/* Don't do anything. The desc->status check for IRQ_DISABLED in
327 * handler_irq() will skip the handler call and that will leave the
328 * interrupt in the sent state. The next ->enable() call will hit the
329 * ICLR register to reset the state machine.
330 *
331 * This scheme is necessary, instead of clearing the Valid bit in the
332 * IMAP register, to handle the case of IMAP registers being shared by
333 * multiple INOs (and thus ICLR registers). Since we use a different
334 * virtual IRQ for each shared IMAP instance, the generic code thinks
335 * there is only one user so it prematurely calls ->disable() on
336 * free_irq().
337 *
338 * We have to provide an explicit ->disable() method instead of using
339 * NULL to get the default. The reason is that if the generic code
340 * sees that, it also hooks up a default ->shutdown method which
341 * invokes ->mask() which we do not want. See irq_chip_set_defaults().
342 */
326static void sun4u_irq_disable(unsigned int virt_irq) 343static void sun4u_irq_disable(unsigned int virt_irq)
327{ 344{
328 struct irq_handler_data *data = get_irq_chip_data(virt_irq);
329
330 if (likely(data)) {
331 unsigned long imap = data->imap;
332 unsigned long tmp = upa_readq(imap);
333
334 tmp &= ~IMAP_VALID;
335 upa_writeq(tmp, imap);
336 }
337} 345}
338 346
339static void sun4u_irq_eoi(unsigned int virt_irq) 347static void sun4u_irq_eoi(unsigned int virt_irq)
@@ -746,7 +754,8 @@ void handler_irq(int irq, struct pt_regs *regs)
746 754
747 desc = irq_desc + virt_irq; 755 desc = irq_desc + virt_irq;
748 756
749 desc->handle_irq(virt_irq, desc); 757 if (!(desc->status & IRQ_DISABLED))
758 desc->handle_irq(virt_irq, desc);
750 759
751 bucket_pa = next_pa; 760 bucket_pa = next_pa;
752 } 761 }
diff --git a/arch/um/kernel/ptrace.c b/arch/um/kernel/ptrace.c
index 15e8b7c4de13..8e3d69e4fcb5 100644
--- a/arch/um/kernel/ptrace.c
+++ b/arch/um/kernel/ptrace.c
@@ -64,6 +64,11 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
64 ret = poke_user(child, addr, data); 64 ret = poke_user(child, addr, data);
65 break; 65 break;
66 66
67 case PTRACE_SYSEMU:
68 case PTRACE_SYSEMU_SINGLESTEP:
69 ret = -EIO;
70 break;
71
67 /* continue and stop at next (return from) syscall */ 72 /* continue and stop at next (return from) syscall */
68 case PTRACE_SYSCALL: 73 case PTRACE_SYSCALL:
69 /* restart after signal. */ 74 /* restart after signal. */
diff --git a/arch/um/os-Linux/user_syms.c b/arch/um/os-Linux/user_syms.c
index 74f49bb9b125..89b48a116a89 100644
--- a/arch/um/os-Linux/user_syms.c
+++ b/arch/um/os-Linux/user_syms.c
@@ -14,7 +14,6 @@
14#undef memset 14#undef memset
15 15
16extern size_t strlen(const char *); 16extern size_t strlen(const char *);
17extern void *memcpy(void *, const void *, size_t);
18extern void *memmove(void *, const void *, size_t); 17extern void *memmove(void *, const void *, size_t);
19extern void *memset(void *, int, size_t); 18extern void *memset(void *, int, size_t);
20extern int printf(const char *, ...); 19extern int printf(const char *, ...);
@@ -24,7 +23,11 @@ extern int printf(const char *, ...);
24EXPORT_SYMBOL(strstr); 23EXPORT_SYMBOL(strstr);
25#endif 24#endif
26 25
26#ifndef __x86_64__
27extern void *memcpy(void *, const void *, size_t);
27EXPORT_SYMBOL(memcpy); 28EXPORT_SYMBOL(memcpy);
29#endif
30
28EXPORT_SYMBOL(memmove); 31EXPORT_SYMBOL(memmove);
29EXPORT_SYMBOL(memset); 32EXPORT_SYMBOL(memset);
30EXPORT_SYMBOL(printf); 33EXPORT_SYMBOL(printf);
diff --git a/arch/x86/include/asm/efi.h b/arch/x86/include/asm/efi.h
index ca5ffb2856b6..edc90f23e708 100644
--- a/arch/x86/include/asm/efi.h
+++ b/arch/x86/include/asm/efi.h
@@ -37,8 +37,6 @@ extern unsigned long asmlinkage efi_call_phys(void *, ...);
37 37
38#else /* !CONFIG_X86_32 */ 38#else /* !CONFIG_X86_32 */
39 39
40#define MAX_EFI_IO_PAGES 100
41
42extern u64 efi_call0(void *fp); 40extern u64 efi_call0(void *fp);
43extern u64 efi_call1(void *fp, u64 arg1); 41extern u64 efi_call1(void *fp, u64 arg1);
44extern u64 efi_call2(void *fp, u64 arg1, u64 arg2); 42extern u64 efi_call2(void *fp, u64 arg1, u64 arg2);
diff --git a/arch/x86/include/asm/fixmap_64.h b/arch/x86/include/asm/fixmap_64.h
index 00a30ab9b1a5..8be740977db8 100644
--- a/arch/x86/include/asm/fixmap_64.h
+++ b/arch/x86/include/asm/fixmap_64.h
@@ -16,7 +16,6 @@
16#include <asm/apicdef.h> 16#include <asm/apicdef.h>
17#include <asm/page.h> 17#include <asm/page.h>
18#include <asm/vsyscall.h> 18#include <asm/vsyscall.h>
19#include <asm/efi.h>
20 19
21/* 20/*
22 * Here we define all the compile-time 'special' virtual 21 * Here we define all the compile-time 'special' virtual
@@ -43,9 +42,6 @@ enum fixed_addresses {
43 FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */ 42 FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */
44 FIX_IO_APIC_BASE_0, 43 FIX_IO_APIC_BASE_0,
45 FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS - 1, 44 FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS - 1,
46 FIX_EFI_IO_MAP_LAST_PAGE,
47 FIX_EFI_IO_MAP_FIRST_PAGE = FIX_EFI_IO_MAP_LAST_PAGE
48 + MAX_EFI_IO_PAGES - 1,
49#ifdef CONFIG_PARAVIRT 45#ifdef CONFIG_PARAVIRT
50 FIX_PARAVIRT_BOOTMAP, 46 FIX_PARAVIRT_BOOTMAP,
51#endif 47#endif
diff --git a/arch/x86/include/asm/i387.h b/arch/x86/include/asm/i387.h
index 48f0004db8c9..71c9e5183982 100644
--- a/arch/x86/include/asm/i387.h
+++ b/arch/x86/include/asm/i387.h
@@ -172,7 +172,13 @@ static inline void __save_init_fpu(struct task_struct *tsk)
172 172
173#else /* CONFIG_X86_32 */ 173#else /* CONFIG_X86_32 */
174 174
175extern void finit(void); 175#ifdef CONFIG_MATH_EMULATION
176extern void finit_task(struct task_struct *tsk);
177#else
178static inline void finit_task(struct task_struct *tsk)
179{
180}
181#endif
176 182
177static inline void tolerant_fwait(void) 183static inline void tolerant_fwait(void)
178{ 184{
diff --git a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
index b585e04cbc9e..3178c3acd97e 100644
--- a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
+++ b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
@@ -277,7 +277,6 @@ static struct cpufreq_driver p4clockmod_driver = {
277 .name = "p4-clockmod", 277 .name = "p4-clockmod",
278 .owner = THIS_MODULE, 278 .owner = THIS_MODULE,
279 .attr = p4clockmod_attr, 279 .attr = p4clockmod_attr,
280 .hide_interface = 1,
281}; 280};
282 281
283 282
diff --git a/arch/x86/kernel/ds.c b/arch/x86/kernel/ds.c
index 169a120587be..87b67e3a765a 100644
--- a/arch/x86/kernel/ds.c
+++ b/arch/x86/kernel/ds.c
@@ -729,7 +729,7 @@ struct pebs_tracer *ds_request_pebs(struct task_struct *task,
729 729
730 spin_unlock_irqrestore(&ds_lock, irq); 730 spin_unlock_irqrestore(&ds_lock, irq);
731 731
732 ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_bts); 732 ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_pebs);
733 ds_resume_pebs(tracer); 733 ds_resume_pebs(tracer);
734 734
735 return tracer; 735 return tracer;
@@ -1029,5 +1029,4 @@ void ds_copy_thread(struct task_struct *tsk, struct task_struct *father)
1029 1029
1030void ds_exit_thread(struct task_struct *tsk) 1030void ds_exit_thread(struct task_struct *tsk)
1031{ 1031{
1032 WARN_ON(tsk->thread.ds_ctx);
1033} 1032}
diff --git a/arch/x86/kernel/efi.c b/arch/x86/kernel/efi.c
index 1119d247fe11..eb1ef3b67dd5 100644
--- a/arch/x86/kernel/efi.c
+++ b/arch/x86/kernel/efi.c
@@ -467,7 +467,7 @@ void __init efi_enter_virtual_mode(void)
467 efi_memory_desc_t *md; 467 efi_memory_desc_t *md;
468 efi_status_t status; 468 efi_status_t status;
469 unsigned long size; 469 unsigned long size;
470 u64 end, systab, addr, npages; 470 u64 end, systab, addr, npages, end_pfn;
471 void *p, *va; 471 void *p, *va;
472 472
473 efi.systab = NULL; 473 efi.systab = NULL;
@@ -479,7 +479,10 @@ void __init efi_enter_virtual_mode(void)
479 size = md->num_pages << EFI_PAGE_SHIFT; 479 size = md->num_pages << EFI_PAGE_SHIFT;
480 end = md->phys_addr + size; 480 end = md->phys_addr + size;
481 481
482 if (PFN_UP(end) <= max_low_pfn_mapped) 482 end_pfn = PFN_UP(end);
483 if (end_pfn <= max_low_pfn_mapped
484 || (end_pfn > (1UL << (32 - PAGE_SHIFT))
485 && end_pfn <= max_pfn_mapped))
483 va = __va(md->phys_addr); 486 va = __va(md->phys_addr);
484 else 487 else
485 va = efi_ioremap(md->phys_addr, size); 488 va = efi_ioremap(md->phys_addr, size);
diff --git a/arch/x86/kernel/efi_64.c b/arch/x86/kernel/efi_64.c
index 652c5287215f..cb783b92c50c 100644
--- a/arch/x86/kernel/efi_64.c
+++ b/arch/x86/kernel/efi_64.c
@@ -99,24 +99,11 @@ void __init efi_call_phys_epilog(void)
99 99
100void __iomem *__init efi_ioremap(unsigned long phys_addr, unsigned long size) 100void __iomem *__init efi_ioremap(unsigned long phys_addr, unsigned long size)
101{ 101{
102 static unsigned pages_mapped __initdata; 102 unsigned long last_map_pfn;
103 unsigned i, pages;
104 unsigned long offset;
105 103
106 pages = PFN_UP(phys_addr + size) - PFN_DOWN(phys_addr); 104 last_map_pfn = init_memory_mapping(phys_addr, phys_addr + size);
107 offset = phys_addr & ~PAGE_MASK; 105 if ((last_map_pfn << PAGE_SHIFT) < phys_addr + size)
108 phys_addr &= PAGE_MASK;
109
110 if (pages_mapped + pages > MAX_EFI_IO_PAGES)
111 return NULL; 106 return NULL;
112 107
113 for (i = 0; i < pages; i++) { 108 return (void __iomem *)__va(phys_addr);
114 __set_fixmap(FIX_EFI_IO_MAP_FIRST_PAGE - pages_mapped,
115 phys_addr, PAGE_KERNEL);
116 phys_addr += PAGE_SIZE;
117 pages_mapped++;
118 }
119
120 return (void __iomem *)__fix_to_virt(FIX_EFI_IO_MAP_FIRST_PAGE - \
121 (pages_mapped - pages)) + offset;
122} 109}
diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c
index b0f61f0dcd0a..f2f8540a7f3d 100644
--- a/arch/x86/kernel/i387.c
+++ b/arch/x86/kernel/i387.c
@@ -136,7 +136,7 @@ int init_fpu(struct task_struct *tsk)
136#ifdef CONFIG_X86_32 136#ifdef CONFIG_X86_32
137 if (!HAVE_HWFP) { 137 if (!HAVE_HWFP) {
138 memset(tsk->thread.xstate, 0, xstate_size); 138 memset(tsk->thread.xstate, 0, xstate_size);
139 finit(); 139 finit_task(tsk);
140 set_stopped_child_used_math(tsk); 140 set_stopped_child_used_math(tsk);
141 return 0; 141 return 0;
142 } 142 }
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index 2b46eb41643b..4526b3a75ed2 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -217,6 +217,14 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
217 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"), 217 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"),
218 }, 218 },
219 }, 219 },
220 { /* Handle problems with rebooting on Dell XPS710 */
221 .callback = set_bios_reboot,
222 .ident = "Dell XPS710",
223 .matches = {
224 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
225 DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"),
226 },
227 },
220 { } 228 { }
221}; 229};
222 230
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index c461f6d69074..6a8811a69324 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -770,6 +770,9 @@ void __init setup_arch(char **cmdline_p)
770 770
771 finish_e820_parsing(); 771 finish_e820_parsing();
772 772
773 if (efi_enabled)
774 efi_init();
775
773 dmi_scan_machine(); 776 dmi_scan_machine();
774 777
775 dmi_check_system(bad_bios_dmi_table); 778 dmi_check_system(bad_bios_dmi_table);
@@ -789,8 +792,6 @@ void __init setup_arch(char **cmdline_p)
789 insert_resource(&iomem_resource, &data_resource); 792 insert_resource(&iomem_resource, &data_resource);
790 insert_resource(&iomem_resource, &bss_resource); 793 insert_resource(&iomem_resource, &bss_resource);
791 794
792 if (efi_enabled)
793 efi_init();
794 795
795#ifdef CONFIG_X86_32 796#ifdef CONFIG_X86_32
796 if (ppro_with_ram_bug()) { 797 if (ppro_with_ram_bug()) {
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 92f1c6f3e19d..960a8d9c049c 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -343,6 +343,11 @@ static void lguest_cpuid(unsigned int *ax, unsigned int *bx,
343 * flush_tlb_user() for both user and kernel mappings unless 343 * flush_tlb_user() for both user and kernel mappings unless
344 * the Page Global Enable (PGE) feature bit is set. */ 344 * the Page Global Enable (PGE) feature bit is set. */
345 *dx |= 0x00002000; 345 *dx |= 0x00002000;
346 /* We also lie, and say we're family id 5. 6 or greater
347 * leads to a rdmsr in early_init_intel which we can't handle.
348 * Family ID is returned as bits 8-12 in ax. */
349 *ax &= 0xFFFFF0FF;
350 *ax |= 0x00000500;
346 break; 351 break;
347 case 0x80000000: 352 case 0x80000000:
348 /* Futureproof this a little: if they ask how much extended 353 /* Futureproof this a little: if they ask how much extended
@@ -589,19 +594,21 @@ static void __init lguest_init_IRQ(void)
589 /* Some systems map "vectors" to interrupts weirdly. Lguest has 594 /* Some systems map "vectors" to interrupts weirdly. Lguest has
590 * a straightforward 1 to 1 mapping, so force that here. */ 595 * a straightforward 1 to 1 mapping, so force that here. */
591 __get_cpu_var(vector_irq)[vector] = i; 596 __get_cpu_var(vector_irq)[vector] = i;
592 if (vector != SYSCALL_VECTOR) { 597 if (vector != SYSCALL_VECTOR)
593 set_intr_gate(vector, 598 set_intr_gate(vector, interrupt[i]);
594 interrupt[vector-FIRST_EXTERNAL_VECTOR]);
595 set_irq_chip_and_handler_name(i, &lguest_irq_controller,
596 handle_level_irq,
597 "level");
598 }
599 } 599 }
600 /* This call is required to set up for 4k stacks, where we have 600 /* This call is required to set up for 4k stacks, where we have
601 * separate stacks for hard and soft interrupts. */ 601 * separate stacks for hard and soft interrupts. */
602 irq_ctx_init(smp_processor_id()); 602 irq_ctx_init(smp_processor_id());
603} 603}
604 604
605void lguest_setup_irq(unsigned int irq)
606{
607 irq_to_desc_alloc_cpu(irq, 0);
608 set_irq_chip_and_handler_name(irq, &lguest_irq_controller,
609 handle_level_irq, "level");
610}
611
605/* 612/*
606 * Time. 613 * Time.
607 * 614 *
diff --git a/arch/x86/math-emu/fpu_aux.c b/arch/x86/math-emu/fpu_aux.c
index 491e737ce547..aa0987088774 100644
--- a/arch/x86/math-emu/fpu_aux.c
+++ b/arch/x86/math-emu/fpu_aux.c
@@ -30,20 +30,29 @@ static void fclex(void)
30} 30}
31 31
32/* Needs to be externally visible */ 32/* Needs to be externally visible */
33void finit(void) 33void finit_task(struct task_struct *tsk)
34{ 34{
35 control_word = 0x037f; 35 struct i387_soft_struct *soft = &tsk->thread.xstate->soft;
36 partial_status = 0; 36 struct address *oaddr, *iaddr;
37 top = 0; /* We don't keep top in the status word internally. */ 37 soft->cwd = 0x037f;
38 fpu_tag_word = 0xffff; 38 soft->swd = 0;
39 soft->ftop = 0; /* We don't keep top in the status word internally. */
40 soft->twd = 0xffff;
39 /* The behaviour is different from that detailed in 41 /* The behaviour is different from that detailed in
40 Section 15.1.6 of the Intel manual */ 42 Section 15.1.6 of the Intel manual */
41 operand_address.offset = 0; 43 oaddr = (struct address *)&soft->foo;
42 operand_address.selector = 0; 44 oaddr->offset = 0;
43 instruction_address.offset = 0; 45 oaddr->selector = 0;
44 instruction_address.selector = 0; 46 iaddr = (struct address *)&soft->fip;
45 instruction_address.opcode = 0; 47 iaddr->offset = 0;
46 no_ip_update = 1; 48 iaddr->selector = 0;
49 iaddr->opcode = 0;
50 soft->no_update = 1;
51}
52
53void finit(void)
54{
55 finit_task(current);
47} 56}
48 57
49/* 58/*
diff --git a/arch/x86/mm/kmmio.c b/arch/x86/mm/kmmio.c
index 9f205030d9aa..6a518dd08a36 100644
--- a/arch/x86/mm/kmmio.c
+++ b/arch/x86/mm/kmmio.c
@@ -451,23 +451,24 @@ static void rcu_free_kmmio_fault_pages(struct rcu_head *head)
451 451
452static void remove_kmmio_fault_pages(struct rcu_head *head) 452static void remove_kmmio_fault_pages(struct rcu_head *head)
453{ 453{
454 struct kmmio_delayed_release *dr = container_of( 454 struct kmmio_delayed_release *dr =
455 head, 455 container_of(head, struct kmmio_delayed_release, rcu);
456 struct kmmio_delayed_release,
457 rcu);
458 struct kmmio_fault_page *p = dr->release_list; 456 struct kmmio_fault_page *p = dr->release_list;
459 struct kmmio_fault_page **prevp = &dr->release_list; 457 struct kmmio_fault_page **prevp = &dr->release_list;
460 unsigned long flags; 458 unsigned long flags;
459
461 spin_lock_irqsave(&kmmio_lock, flags); 460 spin_lock_irqsave(&kmmio_lock, flags);
462 while (p) { 461 while (p) {
463 if (!p->count) 462 if (!p->count) {
464 list_del_rcu(&p->list); 463 list_del_rcu(&p->list);
465 else 464 prevp = &p->release_next;
465 } else {
466 *prevp = p->release_next; 466 *prevp = p->release_next;
467 prevp = &p->release_next; 467 }
468 p = p->release_next; 468 p = p->release_next;
469 } 469 }
470 spin_unlock_irqrestore(&kmmio_lock, flags); 470 spin_unlock_irqrestore(&kmmio_lock, flags);
471
471 /* This is the real RCU destroy call. */ 472 /* This is the real RCU destroy call. */
472 call_rcu(&dr->rcu, rcu_free_kmmio_fault_pages); 473 call_rcu(&dr->rcu, rcu_free_kmmio_fault_pages);
473} 474}
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 7be47d1a97e4..7233bd7e357b 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -515,6 +515,17 @@ static int split_large_page(pte_t *kpte, unsigned long address)
515 * primary protection behavior: 515 * primary protection behavior:
516 */ 516 */
517 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE))); 517 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
518
519 /*
520 * Intel Atom errata AAH41 workaround.
521 *
522 * The real fix should be in hw or in a microcode update, but
523 * we also probabilistically try to reduce the window of having
524 * a large TLB mixed with 4K TLBs while instruction fetches are
525 * going on.
526 */
527 __flush_tlb_all();
528
518 base = NULL; 529 base = NULL;
519 530
520out_unlock: 531out_unlock:
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index 6c873dceb177..981200830432 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -103,9 +103,6 @@ config MATH_EMULATION
103 help 103 help
104 Can we use information of configuration file? 104 Can we use information of configuration file?
105 105
106config HIGHMEM
107 bool "High memory support"
108
109endmenu 106endmenu
110 107
111menu "Platform options" 108menu "Platform options"
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c
index 9606d2bd1dd9..4ec1633c2941 100644
--- a/arch/xtensa/kernel/setup.c
+++ b/arch/xtensa/kernel/setup.c
@@ -44,6 +44,8 @@
44#include <asm/setup.h> 44#include <asm/setup.h>
45#include <asm/param.h> 45#include <asm/param.h>
46 46
47#include <platform/hardware.h>
48
47#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE) 49#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
48struct screen_info screen_info = { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16}; 50struct screen_info screen_info = { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16};
49#endif 51#endif
diff --git a/arch/xtensa/kernel/traps.c b/arch/xtensa/kernel/traps.c
index c7a021d9f696..c44f830b6c7a 100644
--- a/arch/xtensa/kernel/traps.c
+++ b/arch/xtensa/kernel/traps.c
@@ -30,6 +30,7 @@
30#include <linux/stringify.h> 30#include <linux/stringify.h>
31#include <linux/kallsyms.h> 31#include <linux/kallsyms.h>
32#include <linux/delay.h> 32#include <linux/delay.h>
33#include <linux/hardirq.h>
33 34
34#include <asm/ptrace.h> 35#include <asm/ptrace.h>
35#include <asm/timex.h> 36#include <asm/timex.h>
diff --git a/arch/xtensa/mm/fault.c b/arch/xtensa/mm/fault.c
index 33f366be323f..bdd860d93f72 100644
--- a/arch/xtensa/mm/fault.c
+++ b/arch/xtensa/mm/fault.c
@@ -14,6 +14,7 @@
14 14
15#include <linux/mm.h> 15#include <linux/mm.h>
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/hardirq.h>
17#include <asm/mmu_context.h> 18#include <asm/mmu_context.h>
18#include <asm/cacheflush.h> 19#include <asm/cacheflush.h>
19#include <asm/hardirq.h> 20#include <asm/hardirq.h>
diff --git a/arch/xtensa/platforms/iss/console.c b/arch/xtensa/platforms/iss/console.c
index efed8897bef3..25d46c84eb08 100644
--- a/arch/xtensa/platforms/iss/console.c
+++ b/arch/xtensa/platforms/iss/console.c
@@ -140,16 +140,14 @@ static void rs_poll(unsigned long priv)
140} 140}
141 141
142 142
143static void rs_put_char(struct tty_struct *tty, unsigned char ch) 143static int rs_put_char(struct tty_struct *tty, unsigned char ch)
144{ 144{
145 char buf[2]; 145 char buf[2];
146 146
147 if (!tty)
148 return;
149
150 buf[0] = ch; 147 buf[0] = ch;
151 buf[1] = '\0'; /* Is this NULL necessary? */ 148 buf[1] = '\0'; /* Is this NULL necessary? */
152 __simc (SYS_write, 1, (unsigned long) buf, 1, 0, 0); 149 __simc (SYS_write, 1, (unsigned long) buf, 1, 0, 0);
150 return 1;
153} 151}
154 152
155static void rs_flush_chars(struct tty_struct *tty) 153static void rs_flush_chars(struct tty_struct *tty)
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-20 00:24:40 -0500