3 files changed, 67 insertions, 18 deletions

diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index 6a0ad196aeb3..f085369301b1 100644
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -508,7 +508,7 @@ static void __spu_add_to_rq(struct spu_context *ctx)
                 list_add_tail(&ctx->rq, &spu_prio->runq[ctx->prio]);
                 set_bit(ctx->prio, spu_prio->bitmap);
                 if (!spu_prio->nr_waiting++)
-                        __mod_timer(&spusched_timer, jiffies + SPUSCHED_TICK);
+                        mod_timer(&spusched_timer, jiffies + SPUSCHED_TICK);
         }
 }
 
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index a00545fe5cdd..648b3a2a3a44 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -80,6 +80,7 @@ static inline void hpet_clear_mapping(void)
  */
 static int boot_hpet_disable;
 int hpet_force_user;
+static int hpet_verbose;
 
 static int __init hpet_setup(char *str)
 {
@@ -88,6 +89,8 @@ static int __init hpet_setup(char *str)
                         boot_hpet_disable = 1;
                 if (!strncmp("force", str, 5))
                         hpet_force_user = 1;
+                if (!strncmp("verbose", str, 7))
+                        hpet_verbose = 1;
         }
         return 1;
 }
@@ -119,6 +122,43 @@ int is_hpet_enabled(void)
 }
 EXPORT_SYMBOL_GPL(is_hpet_enabled);
 
+static void _hpet_print_config(const char *function, int line)
+{
+        u32 i, timers, l, h;
+        printk(KERN_INFO "hpet: %s(%d):\n", function, line);
+        l = hpet_readl(HPET_ID);
+        h = hpet_readl(HPET_PERIOD);
+        timers = ((l & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1;
+        printk(KERN_INFO "hpet: ID: 0x%x, PERIOD: 0x%x\n", l, h);
+        l = hpet_readl(HPET_CFG);
+        h = hpet_readl(HPET_STATUS);
+        printk(KERN_INFO "hpet: CFG: 0x%x, STATUS: 0x%x\n", l, h);
+        l = hpet_readl(HPET_COUNTER);
+        h = hpet_readl(HPET_COUNTER+4);
+        printk(KERN_INFO "hpet: COUNTER_l: 0x%x, COUNTER_h: 0x%x\n", l, h);
+
+        for (i = 0; i < timers; i++) {
+                l = hpet_readl(HPET_Tn_CFG(i));
+                h = hpet_readl(HPET_Tn_CFG(i)+4);
+                printk(KERN_INFO "hpet: T%d: CFG_l: 0x%x, CFG_h: 0x%x\n",
+                       i, l, h);
+                l = hpet_readl(HPET_Tn_CMP(i));
+                h = hpet_readl(HPET_Tn_CMP(i)+4);
+                printk(KERN_INFO "hpet: T%d: CMP_l: 0x%x, CMP_h: 0x%x\n",
+                       i, l, h);
+                l = hpet_readl(HPET_Tn_ROUTE(i));
+                h = hpet_readl(HPET_Tn_ROUTE(i)+4);
+                printk(KERN_INFO "hpet: T%d ROUTE_l: 0x%x, ROUTE_h: 0x%x\n",
+                       i, l, h);
+        }
+}
+
+#define hpet_print_config()                                     \
+do {                                                            \
+        if (hpet_verbose)                                       \
+                _hpet_print_config(__FUNCTION__, __LINE__);     \
+} while (0)
+
 /*
  * When the hpet driver (/dev/hpet) is enabled, we need to reserve
  * timer 0 and timer 1 in case of RTC emulation.
@@ -191,27 +231,37 @@ static struct clock_event_device hpet_clockevent = {
         .rating         = 50,
 };
 
-static void hpet_start_counter(void)
+static void hpet_stop_counter(void)
 {
         unsigned long cfg = hpet_readl(HPET_CFG);
-
         cfg &= ~HPET_CFG_ENABLE;
         hpet_writel(cfg, HPET_CFG);
         hpet_writel(0, HPET_COUNTER);
         hpet_writel(0, HPET_COUNTER + 4);
+}
+
+static void hpet_start_counter(void)
+{
+        unsigned long cfg = hpet_readl(HPET_CFG);
         cfg |= HPET_CFG_ENABLE;
         hpet_writel(cfg, HPET_CFG);
 }
 
+static void hpet_restart_counter(void)
+{
+        hpet_stop_counter();
+        hpet_start_counter();
+}
+
 static void hpet_resume_device(void)
 {
         force_hpet_resume();
 }
 
-static void hpet_restart_counter(void)
+static void hpet_resume_counter(void)
 {
         hpet_resume_device();
-        hpet_start_counter();
+        hpet_restart_counter();
 }
 
 static void hpet_enable_legacy_int(void)
@@ -259,29 +309,23 @@ static int hpet_setup_msi_irq(unsigned int irq);
 static void hpet_set_mode(enum clock_event_mode mode,
                           struct clock_event_device *evt, int timer)
 {
-        unsigned long cfg, cmp, now;
+        unsigned long cfg;
         uint64_t delta;
 
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
+                hpet_stop_counter();
                 delta = ((uint64_t)(NSEC_PER_SEC/HZ)) * evt->mult;
                 delta >>= evt->shift;
-                now = hpet_readl(HPET_COUNTER);
-                cmp = now + (unsigned long) delta;
                 cfg = hpet_readl(HPET_Tn_CFG(timer));
                 /* Make sure we use edge triggered interrupts */
                 cfg &= ~HPET_TN_LEVEL;
                 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
                        HPET_TN_SETVAL | HPET_TN_32BIT;
                 hpet_writel(cfg, HPET_Tn_CFG(timer));
-                /*
-                 * The first write after writing TN_SETVAL to the
-                 * config register sets the counter value, the second
-                 * write sets the period.
-                 */
-                hpet_writel(cmp, HPET_Tn_CMP(timer));
-                udelay(1);
                 hpet_writel((unsigned long) delta, HPET_Tn_CMP(timer));
+                hpet_start_counter();
+                hpet_print_config();
                 break;
 
         case CLOCK_EVT_MODE_ONESHOT:
@@ -308,6 +352,7 @@ static void hpet_set_mode(enum clock_event_mode mode,
                         irq_set_affinity(hdev->irq, cpumask_of(hdev->cpu));
                         enable_irq(hdev->irq);
                 }
+                hpet_print_config();
                 break;
         }
 }
@@ -526,6 +571,7 @@ static void hpet_msi_capability_lookup(unsigned int start_timer)
 
         num_timers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT);
         num_timers++; /* Value read out starts from 0 */
+        hpet_print_config();
 
         hpet_devs = kzalloc(sizeof(struct hpet_dev) * num_timers, GFP_KERNEL);
         if (!hpet_devs)
@@ -695,7 +741,7 @@ static struct clocksource clocksource_hpet = {
         .mask           = HPET_MASK,
         .shift          = HPET_SHIFT,
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
-        .resume         = hpet_restart_counter,
+        .resume         = hpet_resume_counter,
 #ifdef CONFIG_X86_64
         .vread          = vread_hpet,
 #endif
@@ -707,7 +753,7 @@ static int hpet_clocksource_register(void)
         cycle_t t1;
 
         /* Start the counter */
-        hpet_start_counter();
+        hpet_restart_counter();
 
         /* Verify whether hpet counter works */
         t1 = read_hpet();
@@ -793,6 +839,7 @@ int __init hpet_enable(void)
          * information and the number of channels
          */
         id = hpet_readl(HPET_ID);
+        hpet_print_config();
 
 #ifdef CONFIG_HPET_EMULATE_RTC
         /*
@@ -845,6 +892,7 @@ static __init int hpet_late_init(void)
                 return -ENODEV;
 
         hpet_reserve_platform_timers(hpet_readl(HPET_ID));
+        hpet_print_config();
 
         for_each_online_cpu(cpu) {
                 hpet_cpuhp_notify(NULL, CPU_ONLINE, (void *)(long)cpu);
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index 309949e9e1c1..697d1b78cfbf 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -172,7 +172,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_4,
                          ich_force_enable_hpet);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_7,
                          ich_force_enable_hpet);
-
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x3a16,   /* ICH10 */
+                         ich_force_enable_hpet);
 
 static struct pci_dev *cached_dev;