diff options
Diffstat (limited to 'arch')
376 files changed, 3836 insertions, 10264 deletions
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig index e3a82775f9da..60219bf94198 100644 --- a/arch/alpha/Kconfig +++ b/arch/alpha/Kconfig | |||
@@ -41,10 +41,6 @@ config ARCH_HAS_ILOG2_U64 | |||
41 | bool | 41 | bool |
42 | default n | 42 | default n |
43 | 43 | ||
44 | config GENERIC_FIND_NEXT_BIT | ||
45 | bool | ||
46 | default y | ||
47 | |||
48 | config GENERIC_CALIBRATE_DELAY | 44 | config GENERIC_CALIBRATE_DELAY |
49 | bool | 45 | bool |
50 | default y | 46 | default y |
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7275009686e6..9adc278a22ab 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -294,6 +294,8 @@ config ARCH_AT91 | |||
294 | bool "Atmel AT91" | 294 | bool "Atmel AT91" |
295 | select ARCH_REQUIRE_GPIOLIB | 295 | select ARCH_REQUIRE_GPIOLIB |
296 | select HAVE_CLK | 296 | select HAVE_CLK |
297 | select CLKDEV_LOOKUP | ||
298 | select ARM_PATCH_PHYS_VIRT if MMU | ||
297 | help | 299 | help |
298 | This enables support for systems based on the Atmel AT91RM9200, | 300 | This enables support for systems based on the Atmel AT91RM9200, |
299 | AT91SAM9 and AT91CAP9 processors. | 301 | AT91SAM9 and AT91CAP9 processors. |
@@ -730,16 +732,6 @@ config ARCH_S5P64X0 | |||
730 | Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, | 732 | Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, |
731 | SMDK6450. | 733 | SMDK6450. |
732 | 734 | ||
733 | config ARCH_S5P6442 | ||
734 | bool "Samsung S5P6442" | ||
735 | select CPU_V6 | ||
736 | select GENERIC_GPIO | ||
737 | select HAVE_CLK | ||
738 | select ARCH_USES_GETTIMEOFFSET | ||
739 | select HAVE_S3C2410_WATCHDOG if WATCHDOG | ||
740 | help | ||
741 | Samsung S5P6442 CPU based systems | ||
742 | |||
743 | config ARCH_S5PC100 | 735 | config ARCH_S5PC100 |
744 | bool "Samsung S5PC100" | 736 | bool "Samsung S5PC100" |
745 | select GENERIC_GPIO | 737 | select GENERIC_GPIO |
@@ -991,8 +983,6 @@ endif | |||
991 | 983 | ||
992 | source "arch/arm/mach-s5p64x0/Kconfig" | 984 | source "arch/arm/mach-s5p64x0/Kconfig" |
993 | 985 | ||
994 | source "arch/arm/mach-s5p6442/Kconfig" | ||
995 | |||
996 | source "arch/arm/mach-s5pc100/Kconfig" | 986 | source "arch/arm/mach-s5pc100/Kconfig" |
997 | 987 | ||
998 | source "arch/arm/mach-s5pv210/Kconfig" | 988 | source "arch/arm/mach-s5pv210/Kconfig" |
@@ -1399,7 +1389,6 @@ config NR_CPUS | |||
1399 | config HOTPLUG_CPU | 1389 | config HOTPLUG_CPU |
1400 | bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" | 1390 | bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" |
1401 | depends on SMP && HOTPLUG && EXPERIMENTAL | 1391 | depends on SMP && HOTPLUG && EXPERIMENTAL |
1402 | depends on !ARCH_MSM | ||
1403 | help | 1392 | help |
1404 | Say Y here to experiment with turning CPUs off and on. CPUs | 1393 | Say Y here to experiment with turning CPUs off and on. CPUs |
1405 | can be controlled through /sys/devices/system/cpu. | 1394 | can be controlled through /sys/devices/system/cpu. |
@@ -1420,7 +1409,7 @@ source kernel/Kconfig.preempt | |||
1420 | config HZ | 1409 | config HZ |
1421 | int | 1410 | int |
1422 | default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ | 1411 | default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ |
1423 | ARCH_S5P6442 || ARCH_S5PV210 || ARCH_EXYNOS4 | 1412 | ARCH_S5PV210 || ARCH_EXYNOS4 |
1424 | default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER | 1413 | default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER |
1425 | default AT91_TIMER_HZ if ARCH_AT91 | 1414 | default AT91_TIMER_HZ if ARCH_AT91 |
1426 | default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE | 1415 | default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE |
@@ -1516,6 +1505,9 @@ config ARCH_SPARSEMEM_DEFAULT | |||
1516 | config ARCH_SELECT_MEMORY_MODEL | 1505 | config ARCH_SELECT_MEMORY_MODEL |
1517 | def_bool ARCH_SPARSEMEM_ENABLE | 1506 | def_bool ARCH_SPARSEMEM_ENABLE |
1518 | 1507 | ||
1508 | config HAVE_ARCH_PFN_VALID | ||
1509 | def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM | ||
1510 | |||
1519 | config HIGHMEM | 1511 | config HIGHMEM |
1520 | bool "High Memory Support" | 1512 | bool "High Memory Support" |
1521 | depends on MMU | 1513 | depends on MMU |
@@ -1683,6 +1675,13 @@ endmenu | |||
1683 | 1675 | ||
1684 | menu "Boot options" | 1676 | menu "Boot options" |
1685 | 1677 | ||
1678 | config USE_OF | ||
1679 | bool "Flattened Device Tree support" | ||
1680 | select OF | ||
1681 | select OF_EARLY_FLATTREE | ||
1682 | help | ||
1683 | Include support for flattened device tree machine descriptions. | ||
1684 | |||
1686 | # Compressed boot loader in ROM. Yes, we really want to ask about | 1685 | # Compressed boot loader in ROM. Yes, we really want to ask about |
1687 | # TEXT and BSS so we preserve their values in the config files. | 1686 | # TEXT and BSS so we preserve their values in the config files. |
1688 | config ZBOOT_ROM_TEXT | 1687 | config ZBOOT_ROM_TEXT |
@@ -2021,7 +2020,7 @@ menu "Power management options" | |||
2021 | source "kernel/power/Kconfig" | 2020 | source "kernel/power/Kconfig" |
2022 | 2021 | ||
2023 | config ARCH_SUSPEND_POSSIBLE | 2022 | config ARCH_SUSPEND_POSSIBLE |
2024 | depends on !ARCH_S5P64X0 && !ARCH_S5P6442 && !ARCH_S5PC100 | 2023 | depends on !ARCH_S5P64X0 && !ARCH_S5PC100 |
2025 | depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \ | 2024 | depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \ |
2026 | CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE | 2025 | CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE |
2027 | def_bool y | 2026 | def_bool y |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 25750bcb3397..f5b2b390c8f2 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -176,7 +176,6 @@ machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2416 s3c2440 s3c24 | |||
176 | machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0 | 176 | machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0 |
177 | machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx | 177 | machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx |
178 | machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0 | 178 | machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0 |
179 | machine-$(CONFIG_ARCH_S5P6442) := s5p6442 | ||
180 | machine-$(CONFIG_ARCH_S5PC100) := s5pc100 | 179 | machine-$(CONFIG_ARCH_S5PC100) := s5pc100 |
181 | machine-$(CONFIG_ARCH_S5PV210) := s5pv210 | 180 | machine-$(CONFIG_ARCH_S5PV210) := s5pv210 |
182 | machine-$(CONFIG_ARCH_EXYNOS4) := exynos4 | 181 | machine-$(CONFIG_ARCH_EXYNOS4) := exynos4 |
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig index ea5ee4d067f3..4b71766fb21d 100644 --- a/arch/arm/common/Kconfig +++ b/arch/arm/common/Kconfig | |||
@@ -7,7 +7,7 @@ config ARM_VIC | |||
7 | config ARM_VIC_NR | 7 | config ARM_VIC_NR |
8 | int | 8 | int |
9 | default 4 if ARCH_S5PV210 | 9 | default 4 if ARCH_S5PV210 |
10 | default 3 if ARCH_S5P6442 || ARCH_S5PC100 | 10 | default 3 if ARCH_S5PC100 |
11 | default 2 | 11 | default 2 |
12 | depends on ARM_VIC | 12 | depends on ARM_VIC |
13 | help | 13 | help |
diff --git a/arch/arm/configs/at572d940hfek_defconfig b/arch/arm/configs/at572d940hfek_defconfig deleted file mode 100644 index 1b1158ae8f82..000000000000 --- a/arch/arm/configs/at572d940hfek_defconfig +++ /dev/null | |||
@@ -1,358 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | CONFIG_LOCALVERSION="-AT572D940HF" | ||
3 | # CONFIG_LOCALVERSION_AUTO is not set | ||
4 | CONFIG_SYSVIPC=y | ||
5 | CONFIG_POSIX_MQUEUE=y | ||
6 | CONFIG_BSD_PROCESS_ACCT=y | ||
7 | CONFIG_BSD_PROCESS_ACCT_V3=y | ||
8 | CONFIG_TASKSTATS=y | ||
9 | CONFIG_TASK_XACCT=y | ||
10 | CONFIG_TASK_IO_ACCOUNTING=y | ||
11 | CONFIG_AUDIT=y | ||
12 | CONFIG_CGROUPS=y | ||
13 | CONFIG_CGROUP_CPUACCT=y | ||
14 | CONFIG_CGROUP_SCHED=y | ||
15 | CONFIG_RT_GROUP_SCHED=y | ||
16 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
17 | CONFIG_RELAY=y | ||
18 | CONFIG_BLK_DEV_INITRD=y | ||
19 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
20 | CONFIG_EXPERT=y | ||
21 | CONFIG_SLAB=y | ||
22 | CONFIG_PROFILING=y | ||
23 | CONFIG_OPROFILE=m | ||
24 | CONFIG_KPROBES=y | ||
25 | CONFIG_MODULES=y | ||
26 | CONFIG_MODULE_UNLOAD=y | ||
27 | CONFIG_MODVERSIONS=y | ||
28 | CONFIG_MODULE_SRCVERSION_ALL=y | ||
29 | # CONFIG_BLK_DEV_BSG is not set | ||
30 | CONFIG_ARCH_AT91=y | ||
31 | CONFIG_ARCH_AT572D940HF=y | ||
32 | CONFIG_MACH_AT572D940HFEB=y | ||
33 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
34 | CONFIG_NO_HZ=y | ||
35 | CONFIG_HIGH_RES_TIMERS=y | ||
36 | CONFIG_PREEMPT=y | ||
37 | CONFIG_CMDLINE="mem=48M console=ttyS0 initrd=0x21100000,3145728 root=/dev/ram0 rw ip=172.16.1.181" | ||
38 | CONFIG_KEXEC=y | ||
39 | CONFIG_FPE_NWFPE=y | ||
40 | CONFIG_FPE_NWFPE_XP=y | ||
41 | CONFIG_NET=y | ||
42 | CONFIG_PACKET=m | ||
43 | CONFIG_UNIX=y | ||
44 | CONFIG_INET=y | ||
45 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
46 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
47 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
48 | # CONFIG_INET_LRO is not set | ||
49 | # CONFIG_INET_DIAG is not set | ||
50 | # CONFIG_IPV6 is not set | ||
51 | CONFIG_NET_PKTGEN=m | ||
52 | CONFIG_NET_TCPPROBE=m | ||
53 | CONFIG_CAN=m | ||
54 | CONFIG_CAN_RAW=m | ||
55 | CONFIG_CAN_BCM=m | ||
56 | CONFIG_CAN_VCAN=m | ||
57 | CONFIG_CAN_DEBUG_DEVICES=y | ||
58 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
59 | CONFIG_CONNECTOR=m | ||
60 | CONFIG_MTD=m | ||
61 | CONFIG_MTD_DEBUG=y | ||
62 | CONFIG_MTD_DEBUG_VERBOSE=1 | ||
63 | CONFIG_MTD_CONCAT=m | ||
64 | CONFIG_MTD_PARTITIONS=y | ||
65 | CONFIG_MTD_CHAR=m | ||
66 | CONFIG_MTD_BLOCK=m | ||
67 | CONFIG_MTD_BLOCK_RO=m | ||
68 | CONFIG_FTL=m | ||
69 | CONFIG_NFTL=m | ||
70 | CONFIG_NFTL_RW=y | ||
71 | CONFIG_INFTL=m | ||
72 | CONFIG_RFD_FTL=m | ||
73 | CONFIG_SSFDC=m | ||
74 | CONFIG_MTD_OOPS=m | ||
75 | CONFIG_MTD_CFI=m | ||
76 | CONFIG_MTD_JEDECPROBE=m | ||
77 | CONFIG_MTD_CFI_INTELEXT=m | ||
78 | CONFIG_MTD_CFI_AMDSTD=m | ||
79 | CONFIG_MTD_CFI_STAA=m | ||
80 | CONFIG_MTD_ROM=m | ||
81 | CONFIG_MTD_ABSENT=m | ||
82 | CONFIG_MTD_COMPLEX_MAPPINGS=y | ||
83 | CONFIG_MTD_PHYSMAP=m | ||
84 | CONFIG_MTD_PLATRAM=m | ||
85 | CONFIG_MTD_DATAFLASH=m | ||
86 | CONFIG_MTD_M25P80=m | ||
87 | CONFIG_MTD_SLRAM=m | ||
88 | CONFIG_MTD_PHRAM=m | ||
89 | CONFIG_MTD_MTDRAM=m | ||
90 | CONFIG_MTD_BLOCK2MTD=m | ||
91 | CONFIG_MTD_NAND=m | ||
92 | CONFIG_MTD_NAND_VERIFY_WRITE=y | ||
93 | CONFIG_MTD_NAND_DISKONCHIP=m | ||
94 | CONFIG_MTD_NAND_NANDSIM=m | ||
95 | CONFIG_MTD_NAND_PLATFORM=m | ||
96 | CONFIG_MTD_ALAUDA=m | ||
97 | CONFIG_MTD_UBI=m | ||
98 | CONFIG_MTD_UBI_GLUEBI=m | ||
99 | CONFIG_BLK_DEV_LOOP=y | ||
100 | CONFIG_BLK_DEV_CRYPTOLOOP=m | ||
101 | CONFIG_BLK_DEV_NBD=m | ||
102 | CONFIG_BLK_DEV_RAM=y | ||
103 | CONFIG_BLK_DEV_RAM_SIZE=65536 | ||
104 | CONFIG_ATMEL_TCLIB=y | ||
105 | CONFIG_ATMEL_SSC=m | ||
106 | CONFIG_SENSORS_TSL2550=m | ||
107 | CONFIG_DS1682=m | ||
108 | CONFIG_RAID_ATTRS=m | ||
109 | CONFIG_SCSI=m | ||
110 | CONFIG_SCSI_TGT=m | ||
111 | # CONFIG_SCSI_PROC_FS is not set | ||
112 | CONFIG_BLK_DEV_SD=m | ||
113 | CONFIG_BLK_DEV_SR=m | ||
114 | CONFIG_CHR_DEV_SG=m | ||
115 | CONFIG_CHR_DEV_SCH=m | ||
116 | CONFIG_SCSI_MULTI_LUN=y | ||
117 | CONFIG_SCSI_CONSTANTS=y | ||
118 | CONFIG_SCSI_LOGGING=y | ||
119 | CONFIG_SCSI_SCAN_ASYNC=y | ||
120 | CONFIG_SCSI_ISCSI_ATTRS=m | ||
121 | CONFIG_NETDEVICES=y | ||
122 | CONFIG_DUMMY=m | ||
123 | CONFIG_BONDING=m | ||
124 | CONFIG_MACVLAN=m | ||
125 | CONFIG_EQUALIZER=m | ||
126 | CONFIG_TUN=m | ||
127 | CONFIG_VETH=m | ||
128 | CONFIG_PHYLIB=y | ||
129 | CONFIG_MARVELL_PHY=m | ||
130 | CONFIG_DAVICOM_PHY=m | ||
131 | CONFIG_QSEMI_PHY=m | ||
132 | CONFIG_LXT_PHY=m | ||
133 | CONFIG_CICADA_PHY=m | ||
134 | CONFIG_VITESSE_PHY=m | ||
135 | CONFIG_SMSC_PHY=m | ||
136 | CONFIG_BROADCOM_PHY=m | ||
137 | CONFIG_ICPLUS_PHY=m | ||
138 | CONFIG_MDIO_BITBANG=m | ||
139 | CONFIG_NET_ETHERNET=y | ||
140 | # CONFIG_NETDEV_1000 is not set | ||
141 | # CONFIG_NETDEV_10000 is not set | ||
142 | CONFIG_USB_ZD1201=m | ||
143 | CONFIG_HOSTAP=m | ||
144 | CONFIG_HOSTAP_FIRMWARE=y | ||
145 | CONFIG_HOSTAP_FIRMWARE_NVRAM=y | ||
146 | CONFIG_USB_CATC=m | ||
147 | CONFIG_USB_KAWETH=m | ||
148 | CONFIG_USB_PEGASUS=m | ||
149 | CONFIG_USB_RTL8150=m | ||
150 | CONFIG_USB_USBNET=m | ||
151 | CONFIG_USB_NET_DM9601=m | ||
152 | CONFIG_USB_NET_GL620A=m | ||
153 | CONFIG_USB_NET_PLUSB=m | ||
154 | CONFIG_USB_NET_MCS7830=m | ||
155 | CONFIG_USB_NET_RNDIS_HOST=m | ||
156 | CONFIG_USB_ALI_M5632=y | ||
157 | CONFIG_USB_AN2720=y | ||
158 | CONFIG_USB_EPSON2888=y | ||
159 | CONFIG_USB_KC2190=y | ||
160 | # CONFIG_USB_NET_ZAURUS is not set | ||
161 | CONFIG_INPUT_MOUSEDEV=m | ||
162 | CONFIG_INPUT_EVDEV=m | ||
163 | CONFIG_INPUT_EVBUG=m | ||
164 | CONFIG_KEYBOARD_LKKBD=m | ||
165 | CONFIG_KEYBOARD_GPIO=m | ||
166 | CONFIG_KEYBOARD_NEWTON=m | ||
167 | CONFIG_KEYBOARD_STOWAWAY=m | ||
168 | CONFIG_KEYBOARD_SUNKBD=m | ||
169 | CONFIG_KEYBOARD_XTKBD=m | ||
170 | CONFIG_MOUSE_PS2=m | ||
171 | CONFIG_MOUSE_SERIAL=m | ||
172 | CONFIG_MOUSE_APPLETOUCH=m | ||
173 | CONFIG_MOUSE_VSXXXAA=m | ||
174 | CONFIG_MOUSE_GPIO=m | ||
175 | CONFIG_INPUT_MISC=y | ||
176 | CONFIG_INPUT_UINPUT=m | ||
177 | CONFIG_SERIO_SERPORT=m | ||
178 | CONFIG_SERIO_RAW=m | ||
179 | CONFIG_VT_HW_CONSOLE_BINDING=y | ||
180 | CONFIG_SERIAL_NONSTANDARD=y | ||
181 | CONFIG_N_HDLC=m | ||
182 | CONFIG_SPECIALIX=m | ||
183 | CONFIG_STALDRV=y | ||
184 | CONFIG_SERIAL_ATMEL=y | ||
185 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
186 | CONFIG_IPMI_HANDLER=m | ||
187 | CONFIG_IPMI_DEVICE_INTERFACE=m | ||
188 | CONFIG_IPMI_SI=m | ||
189 | CONFIG_IPMI_WATCHDOG=m | ||
190 | CONFIG_IPMI_POWEROFF=m | ||
191 | CONFIG_HW_RANDOM=y | ||
192 | CONFIG_R3964=m | ||
193 | CONFIG_RAW_DRIVER=m | ||
194 | CONFIG_TCG_TPM=m | ||
195 | CONFIG_TCG_NSC=m | ||
196 | CONFIG_TCG_ATMEL=m | ||
197 | CONFIG_I2C=m | ||
198 | CONFIG_I2C_CHARDEV=m | ||
199 | CONFIG_SPI=y | ||
200 | CONFIG_SPI_ATMEL=y | ||
201 | CONFIG_SPI_BITBANG=m | ||
202 | CONFIG_SPI_SPIDEV=m | ||
203 | # CONFIG_HWMON is not set | ||
204 | # CONFIG_VGA_CONSOLE is not set | ||
205 | CONFIG_SOUND=m | ||
206 | CONFIG_SND=m | ||
207 | CONFIG_SND_SEQUENCER=m | ||
208 | CONFIG_SND_SEQ_DUMMY=m | ||
209 | CONFIG_SND_MIXER_OSS=m | ||
210 | CONFIG_SND_PCM_OSS=m | ||
211 | # CONFIG_SND_PCM_OSS_PLUGINS is not set | ||
212 | CONFIG_SND_SEQUENCER_OSS=y | ||
213 | CONFIG_SND_DYNAMIC_MINORS=y | ||
214 | # CONFIG_SND_VERBOSE_PROCFS is not set | ||
215 | CONFIG_SND_DUMMY=m | ||
216 | CONFIG_SND_VIRMIDI=m | ||
217 | CONFIG_SND_USB_AUDIO=m | ||
218 | CONFIG_SND_USB_CAIAQ=m | ||
219 | CONFIG_SND_USB_CAIAQ_INPUT=y | ||
220 | CONFIG_HID=m | ||
221 | CONFIG_HIDRAW=y | ||
222 | CONFIG_USB_HID=m | ||
223 | CONFIG_USB_HIDDEV=y | ||
224 | CONFIG_USB_KBD=m | ||
225 | CONFIG_USB_MOUSE=m | ||
226 | CONFIG_HID_A4TECH=m | ||
227 | CONFIG_HID_APPLE=m | ||
228 | CONFIG_HID_BELKIN=m | ||
229 | CONFIG_HID_CHERRY=m | ||
230 | CONFIG_HID_CHICONY=m | ||
231 | CONFIG_HID_CYPRESS=m | ||
232 | CONFIG_HID_EZKEY=m | ||
233 | CONFIG_HID_GYRATION=m | ||
234 | CONFIG_HID_LOGITECH=m | ||
235 | CONFIG_HID_MICROSOFT=m | ||
236 | CONFIG_HID_MONTEREY=m | ||
237 | CONFIG_HID_PANTHERLORD=m | ||
238 | CONFIG_HID_PETALYNX=m | ||
239 | CONFIG_HID_SAMSUNG=m | ||
240 | CONFIG_HID_SONY=m | ||
241 | CONFIG_HID_SUNPLUS=m | ||
242 | CONFIG_USB=y | ||
243 | CONFIG_USB_DEVICEFS=y | ||
244 | # CONFIG_USB_DEVICE_CLASS is not set | ||
245 | CONFIG_USB_DYNAMIC_MINORS=y | ||
246 | CONFIG_USB_MON=y | ||
247 | CONFIG_USB_OHCI_HCD=y | ||
248 | CONFIG_USB_STORAGE=m | ||
249 | CONFIG_USB_STORAGE_DATAFAB=m | ||
250 | CONFIG_USB_STORAGE_FREECOM=m | ||
251 | CONFIG_USB_STORAGE_ISD200=m | ||
252 | CONFIG_USB_STORAGE_USBAT=m | ||
253 | CONFIG_USB_STORAGE_SDDR09=m | ||
254 | CONFIG_USB_STORAGE_SDDR55=m | ||
255 | CONFIG_USB_STORAGE_JUMPSHOT=m | ||
256 | CONFIG_USB_STORAGE_ALAUDA=m | ||
257 | CONFIG_USB_STORAGE_KARMA=m | ||
258 | CONFIG_USB_LIBUSUAL=y | ||
259 | CONFIG_USB_SERIAL=m | ||
260 | CONFIG_USB_EZUSB=y | ||
261 | CONFIG_USB_SERIAL_GENERIC=y | ||
262 | CONFIG_USB_SERIAL_PL2303=m | ||
263 | CONFIG_USB_SERIAL_SPCP8X5=m | ||
264 | CONFIG_USB_SERIAL_DEBUG=m | ||
265 | CONFIG_USB_EMI62=m | ||
266 | CONFIG_USB_EMI26=m | ||
267 | CONFIG_USB_ADUTUX=m | ||
268 | CONFIG_USB_TEST=m | ||
269 | CONFIG_USB_GADGET=m | ||
270 | CONFIG_USB_GADGET_DEBUG_FILES=y | ||
271 | CONFIG_USB_GADGET_DEBUG_FS=y | ||
272 | CONFIG_USB_ZERO=m | ||
273 | CONFIG_USB_ETH=m | ||
274 | CONFIG_USB_GADGETFS=m | ||
275 | CONFIG_USB_FILE_STORAGE=m | ||
276 | CONFIG_USB_G_SERIAL=m | ||
277 | CONFIG_USB_MIDI_GADGET=m | ||
278 | CONFIG_MMC=y | ||
279 | CONFIG_SDIO_UART=m | ||
280 | CONFIG_MMC_AT91=m | ||
281 | CONFIG_MMC_SPI=m | ||
282 | CONFIG_NEW_LEDS=y | ||
283 | CONFIG_LEDS_CLASS=m | ||
284 | CONFIG_LEDS_GPIO=m | ||
285 | CONFIG_LEDS_TRIGGERS=y | ||
286 | CONFIG_LEDS_TRIGGER_TIMER=m | ||
287 | CONFIG_LEDS_TRIGGER_HEARTBEAT=m | ||
288 | CONFIG_RTC_CLASS=y | ||
289 | CONFIG_RTC_INTF_DEV_UIE_EMUL=y | ||
290 | CONFIG_RTC_DRV_DS1307=m | ||
291 | CONFIG_RTC_DRV_DS1305=y | ||
292 | CONFIG_EXT2_FS=y | ||
293 | CONFIG_EXT2_FS_XATTR=y | ||
294 | CONFIG_EXT2_FS_POSIX_ACL=y | ||
295 | CONFIG_EXT2_FS_SECURITY=y | ||
296 | CONFIG_EXT3_FS=y | ||
297 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
298 | CONFIG_EXT3_FS_SECURITY=y | ||
299 | CONFIG_JBD_DEBUG=y | ||
300 | CONFIG_REISERFS_FS=m | ||
301 | CONFIG_REISERFS_CHECK=y | ||
302 | CONFIG_REISERFS_PROC_INFO=y | ||
303 | CONFIG_REISERFS_FS_XATTR=y | ||
304 | CONFIG_REISERFS_FS_POSIX_ACL=y | ||
305 | CONFIG_REISERFS_FS_SECURITY=y | ||
306 | CONFIG_INOTIFY=y | ||
307 | CONFIG_FUSE_FS=m | ||
308 | CONFIG_MSDOS_FS=m | ||
309 | CONFIG_VFAT_FS=y | ||
310 | CONFIG_NTFS_FS=m | ||
311 | CONFIG_NTFS_RW=y | ||
312 | CONFIG_TMPFS=y | ||
313 | CONFIG_TMPFS_POSIX_ACL=y | ||
314 | CONFIG_JFFS2_FS=m | ||
315 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
316 | CONFIG_JFFS2_LZO=y | ||
317 | CONFIG_JFFS2_CMODE_FAVOURLZO=y | ||
318 | CONFIG_CRAMFS=m | ||
319 | CONFIG_NFS_FS=m | ||
320 | CONFIG_NFS_V3=y | ||
321 | CONFIG_NFS_V3_ACL=y | ||
322 | CONFIG_NFS_V4=y | ||
323 | CONFIG_NFSD=m | ||
324 | CONFIG_NFSD_V3_ACL=y | ||
325 | CONFIG_NFSD_V4=y | ||
326 | CONFIG_CIFS=m | ||
327 | CONFIG_CIFS_WEAK_PW_HASH=y | ||
328 | CONFIG_PARTITION_ADVANCED=y | ||
329 | CONFIG_MAC_PARTITION=y | ||
330 | CONFIG_BSD_DISKLABEL=y | ||
331 | CONFIG_MINIX_SUBPARTITION=y | ||
332 | CONFIG_SOLARIS_X86_PARTITION=y | ||
333 | CONFIG_UNIXWARE_DISKLABEL=y | ||
334 | CONFIG_LDM_PARTITION=y | ||
335 | CONFIG_LDM_DEBUG=y | ||
336 | CONFIG_SGI_PARTITION=y | ||
337 | CONFIG_SUN_PARTITION=y | ||
338 | CONFIG_NLS_DEFAULT="cp437" | ||
339 | CONFIG_NLS_CODEPAGE_437=y | ||
340 | CONFIG_NLS_CODEPAGE_850=m | ||
341 | CONFIG_NLS_ASCII=y | ||
342 | CONFIG_NLS_ISO8859_1=y | ||
343 | CONFIG_NLS_UTF8=m | ||
344 | CONFIG_DLM=m | ||
345 | CONFIG_PRINTK_TIME=y | ||
346 | CONFIG_MAGIC_SYSRQ=y | ||
347 | CONFIG_UNUSED_SYMBOLS=y | ||
348 | CONFIG_DEBUG_FS=y | ||
349 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
350 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
351 | CONFIG_CRYPTO=y | ||
352 | CONFIG_CRYPTO_GF128MUL=m | ||
353 | CONFIG_CRYPTO_HMAC=y | ||
354 | CONFIG_CRYPTO_MD5=y | ||
355 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
356 | # CONFIG_CRYPTO_HW is not set | ||
357 | CONFIG_CRC_CCITT=m | ||
358 | CONFIG_CRC16=m | ||
diff --git a/arch/arm/configs/at91sam9261ek_defconfig b/arch/arm/configs/at91sam9261_defconfig index b46025b66b64..ade6b2f23116 100644 --- a/arch/arm/configs/at91sam9261ek_defconfig +++ b/arch/arm/configs/at91sam9261_defconfig | |||
@@ -1,9 +1,13 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | 1 | CONFIG_EXPERIMENTAL=y |
2 | # CONFIG_LOCALVERSION_AUTO is not set | 2 | # CONFIG_LOCALVERSION_AUTO is not set |
3 | CONFIG_KERNEL_LZMA=y | ||
3 | # CONFIG_SWAP is not set | 4 | # CONFIG_SWAP is not set |
4 | CONFIG_SYSVIPC=y | 5 | CONFIG_SYSVIPC=y |
6 | CONFIG_IKCONFIG=y | ||
7 | CONFIG_IKCONFIG_PROC=y | ||
5 | CONFIG_LOG_BUF_SHIFT=14 | 8 | CONFIG_LOG_BUF_SHIFT=14 |
6 | CONFIG_BLK_DEV_INITRD=y | 9 | CONFIG_NAMESPACES=y |
10 | CONFIG_EMBEDDED=y | ||
7 | CONFIG_SLAB=y | 11 | CONFIG_SLAB=y |
8 | CONFIG_MODULES=y | 12 | CONFIG_MODULES=y |
9 | CONFIG_MODULE_UNLOAD=y | 13 | CONFIG_MODULE_UNLOAD=y |
@@ -15,18 +19,27 @@ CONFIG_ARCH_AT91SAM9261=y | |||
15 | CONFIG_MACH_AT91SAM9261EK=y | 19 | CONFIG_MACH_AT91SAM9261EK=y |
16 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | 20 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y |
17 | # CONFIG_ARM_THUMB is not set | 21 | # CONFIG_ARM_THUMB is not set |
22 | CONFIG_AEABI=y | ||
23 | # CONFIG_OABI_COMPAT is not set | ||
18 | CONFIG_ZBOOT_ROM_TEXT=0x0 | 24 | CONFIG_ZBOOT_ROM_TEXT=0x0 |
19 | CONFIG_ZBOOT_ROM_BSS=0x0 | 25 | CONFIG_ZBOOT_ROM_BSS=0x0 |
20 | CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw" | 26 | CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw" |
21 | CONFIG_FPE_NWFPE=y | 27 | CONFIG_AUTO_ZRELADDR=y |
28 | CONFIG_VFP=y | ||
29 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
22 | CONFIG_NET=y | 30 | CONFIG_NET=y |
23 | CONFIG_PACKET=y | 31 | CONFIG_PACKET=y |
24 | CONFIG_UNIX=y | 32 | CONFIG_UNIX=y |
25 | CONFIG_INET=y | 33 | CONFIG_INET=y |
34 | CONFIG_IP_MULTICAST=y | ||
26 | CONFIG_IP_PNP=y | 35 | CONFIG_IP_PNP=y |
36 | CONFIG_IP_PNP_DHCP=y | ||
27 | CONFIG_IP_PNP_BOOTP=y | 37 | CONFIG_IP_PNP_BOOTP=y |
28 | # CONFIG_INET_LRO is not set | 38 | # CONFIG_INET_LRO is not set |
29 | # CONFIG_IPV6 is not set | 39 | # CONFIG_IPV6 is not set |
40 | CONFIG_CFG80211=y | ||
41 | CONFIG_LIB80211=y | ||
42 | CONFIG_MAC80211=y | ||
30 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 43 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
31 | CONFIG_MTD=y | 44 | CONFIG_MTD=y |
32 | CONFIG_MTD_PARTITIONS=y | 45 | CONFIG_MTD_PARTITIONS=y |
@@ -34,8 +47,12 @@ CONFIG_MTD_CMDLINE_PARTS=y | |||
34 | CONFIG_MTD_BLOCK=y | 47 | CONFIG_MTD_BLOCK=y |
35 | CONFIG_MTD_NAND=y | 48 | CONFIG_MTD_NAND=y |
36 | CONFIG_MTD_NAND_ATMEL=y | 49 | CONFIG_MTD_NAND_ATMEL=y |
50 | CONFIG_MTD_UBI=y | ||
51 | CONFIG_MTD_UBI_GLUEBI=y | ||
37 | CONFIG_BLK_DEV_RAM=y | 52 | CONFIG_BLK_DEV_RAM=y |
38 | CONFIG_BLK_DEV_RAM_SIZE=8192 | 53 | CONFIG_BLK_DEV_RAM_SIZE=8192 |
54 | CONFIG_MISC_DEVICES=y | ||
55 | CONFIG_ATMEL_TCLIB=y | ||
39 | CONFIG_ATMEL_SSC=y | 56 | CONFIG_ATMEL_SSC=y |
40 | CONFIG_SCSI=y | 57 | CONFIG_SCSI=y |
41 | CONFIG_BLK_DEV_SD=y | 58 | CONFIG_BLK_DEV_SD=y |
@@ -45,12 +62,27 @@ CONFIG_NET_ETHERNET=y | |||
45 | CONFIG_DM9000=y | 62 | CONFIG_DM9000=y |
46 | # CONFIG_NETDEV_1000 is not set | 63 | # CONFIG_NETDEV_1000 is not set |
47 | # CONFIG_NETDEV_10000 is not set | 64 | # CONFIG_NETDEV_10000 is not set |
65 | CONFIG_USB_ZD1201=m | ||
66 | CONFIG_RTL8187=m | ||
67 | CONFIG_LIBERTAS=m | ||
68 | CONFIG_LIBERTAS_USB=m | ||
69 | CONFIG_LIBERTAS_SDIO=m | ||
70 | CONFIG_LIBERTAS_SPI=m | ||
71 | CONFIG_RT2X00=m | ||
72 | CONFIG_RT2500USB=m | ||
73 | CONFIG_RT73USB=m | ||
74 | CONFIG_ZD1211RW=m | ||
75 | CONFIG_INPUT_POLLDEV=m | ||
48 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | 76 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set |
77 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=240 | ||
78 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=320 | ||
79 | CONFIG_INPUT_EVDEV=y | ||
49 | # CONFIG_KEYBOARD_ATKBD is not set | 80 | # CONFIG_KEYBOARD_ATKBD is not set |
50 | CONFIG_KEYBOARD_GPIO=y | 81 | CONFIG_KEYBOARD_GPIO=y |
51 | # CONFIG_INPUT_MOUSE is not set | 82 | # CONFIG_INPUT_MOUSE is not set |
52 | CONFIG_INPUT_TOUCHSCREEN=y | 83 | CONFIG_INPUT_TOUCHSCREEN=y |
53 | CONFIG_TOUCHSCREEN_ADS7846=y | 84 | CONFIG_TOUCHSCREEN_ADS7846=y |
85 | CONFIG_DEVPTS_MULTIPLE_INSTANCES=y | ||
54 | CONFIG_SERIAL_ATMEL=y | 86 | CONFIG_SERIAL_ATMEL=y |
55 | CONFIG_SERIAL_ATMEL_CONSOLE=y | 87 | CONFIG_SERIAL_ATMEL_CONSOLE=y |
56 | CONFIG_HW_RANDOM=y | 88 | CONFIG_HW_RANDOM=y |
@@ -65,31 +97,62 @@ CONFIG_WATCHDOG_NOWAYOUT=y | |||
65 | CONFIG_AT91SAM9X_WATCHDOG=y | 97 | CONFIG_AT91SAM9X_WATCHDOG=y |
66 | CONFIG_FB=y | 98 | CONFIG_FB=y |
67 | CONFIG_FB_ATMEL=y | 99 | CONFIG_FB_ATMEL=y |
68 | # CONFIG_VGA_CONSOLE is not set | 100 | CONFIG_BACKLIGHT_LCD_SUPPORT=y |
101 | # CONFIG_LCD_CLASS_DEVICE is not set | ||
102 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
103 | CONFIG_BACKLIGHT_ATMEL_LCDC=y | ||
104 | # CONFIG_BACKLIGHT_GENERIC is not set | ||
105 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
106 | CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y | ||
107 | CONFIG_LOGO=y | ||
108 | CONFIG_SOUND=y | ||
109 | CONFIG_SND=y | ||
110 | CONFIG_SND_SEQUENCER=y | ||
111 | CONFIG_SND_MIXER_OSS=y | ||
112 | CONFIG_SND_PCM_OSS=y | ||
113 | # CONFIG_SND_SUPPORT_OLD_API is not set | ||
114 | # CONFIG_SND_VERBOSE_PROCFS is not set | ||
115 | # CONFIG_SND_DRIVERS is not set | ||
116 | # CONFIG_SND_ARM is not set | ||
117 | CONFIG_SND_AT73C213=y | ||
118 | CONFIG_SND_USB_AUDIO=m | ||
69 | # CONFIG_USB_HID is not set | 119 | # CONFIG_USB_HID is not set |
70 | CONFIG_USB=y | 120 | CONFIG_USB=y |
71 | CONFIG_USB_DEVICEFS=y | 121 | CONFIG_USB_DEVICEFS=y |
72 | CONFIG_USB_MON=y | ||
73 | CONFIG_USB_OHCI_HCD=y | 122 | CONFIG_USB_OHCI_HCD=y |
74 | CONFIG_USB_STORAGE=y | 123 | CONFIG_USB_STORAGE=y |
75 | CONFIG_USB_STORAGE_DEBUG=y | ||
76 | CONFIG_USB_GADGET=y | 124 | CONFIG_USB_GADGET=y |
77 | CONFIG_USB_ZERO=m | 125 | CONFIG_USB_ZERO=m |
126 | CONFIG_USB_ETH=m | ||
78 | CONFIG_USB_GADGETFS=m | 127 | CONFIG_USB_GADGETFS=m |
79 | CONFIG_USB_FILE_STORAGE=m | 128 | CONFIG_USB_FILE_STORAGE=m |
80 | CONFIG_USB_G_SERIAL=m | 129 | CONFIG_USB_G_SERIAL=m |
81 | CONFIG_MMC=y | 130 | CONFIG_MMC=y |
82 | CONFIG_MMC_AT91=m | 131 | CONFIG_MMC_AT91=m |
132 | CONFIG_NEW_LEDS=y | ||
133 | CONFIG_LEDS_CLASS=y | ||
134 | CONFIG_LEDS_GPIO=y | ||
135 | CONFIG_LEDS_TRIGGERS=y | ||
136 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
137 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
138 | CONFIG_LEDS_TRIGGER_GPIO=y | ||
83 | CONFIG_RTC_CLASS=y | 139 | CONFIG_RTC_CLASS=y |
84 | CONFIG_RTC_DRV_AT91SAM9=y | 140 | CONFIG_RTC_DRV_AT91SAM9=y |
85 | CONFIG_EXT2_FS=y | 141 | CONFIG_MSDOS_FS=y |
86 | CONFIG_INOTIFY=y | ||
87 | CONFIG_VFAT_FS=y | 142 | CONFIG_VFAT_FS=y |
88 | CONFIG_TMPFS=y | 143 | CONFIG_TMPFS=y |
89 | CONFIG_CRAMFS=y | 144 | CONFIG_UBIFS_FS=y |
145 | CONFIG_UBIFS_FS_ADVANCED_COMPR=y | ||
146 | CONFIG_SQUASHFS=y | ||
147 | CONFIG_SQUASHFS_LZO=y | ||
148 | CONFIG_SQUASHFS_XZ=y | ||
149 | CONFIG_NFS_FS=y | ||
150 | CONFIG_NFS_V3=y | ||
151 | CONFIG_ROOT_NFS=y | ||
90 | CONFIG_NLS_CODEPAGE_437=y | 152 | CONFIG_NLS_CODEPAGE_437=y |
91 | CONFIG_NLS_CODEPAGE_850=y | 153 | CONFIG_NLS_CODEPAGE_850=y |
92 | CONFIG_NLS_ISO8859_1=y | 154 | CONFIG_NLS_ISO8859_1=y |
93 | CONFIG_DEBUG_KERNEL=y | 155 | CONFIG_NLS_ISO8859_15=y |
94 | CONFIG_DEBUG_USER=y | 156 | CONFIG_NLS_UTF8=y |
95 | CONFIG_DEBUG_LL=y | 157 | CONFIG_FTRACE=y |
158 | CONFIG_CRC_CCITT=m | ||
diff --git a/arch/arm/configs/at91sam9263ek_defconfig b/arch/arm/configs/at91sam9263_defconfig index 8a04d6f4e065..1cf96264cba1 100644 --- a/arch/arm/configs/at91sam9263ek_defconfig +++ b/arch/arm/configs/at91sam9263_defconfig | |||
@@ -1,9 +1,13 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | 1 | CONFIG_EXPERIMENTAL=y |
2 | # CONFIG_LOCALVERSION_AUTO is not set | 2 | # CONFIG_LOCALVERSION_AUTO is not set |
3 | CONFIG_KERNEL_LZMA=y | ||
3 | # CONFIG_SWAP is not set | 4 | # CONFIG_SWAP is not set |
4 | CONFIG_SYSVIPC=y | 5 | CONFIG_SYSVIPC=y |
6 | CONFIG_IKCONFIG=y | ||
7 | CONFIG_IKCONFIG_PROC=y | ||
5 | CONFIG_LOG_BUF_SHIFT=14 | 8 | CONFIG_LOG_BUF_SHIFT=14 |
6 | CONFIG_BLK_DEV_INITRD=y | 9 | CONFIG_NAMESPACES=y |
10 | CONFIG_EMBEDDED=y | ||
7 | CONFIG_SLAB=y | 11 | CONFIG_SLAB=y |
8 | CONFIG_MODULES=y | 12 | CONFIG_MODULES=y |
9 | CONFIG_MODULE_UNLOAD=y | 13 | CONFIG_MODULE_UNLOAD=y |
@@ -13,53 +17,81 @@ CONFIG_MODULE_UNLOAD=y | |||
13 | CONFIG_ARCH_AT91=y | 17 | CONFIG_ARCH_AT91=y |
14 | CONFIG_ARCH_AT91SAM9263=y | 18 | CONFIG_ARCH_AT91SAM9263=y |
15 | CONFIG_MACH_AT91SAM9263EK=y | 19 | CONFIG_MACH_AT91SAM9263EK=y |
20 | CONFIG_MACH_USB_A9263=y | ||
21 | CONFIG_MACH_NEOCORE926=y | ||
16 | CONFIG_MTD_AT91_DATAFLASH_CARD=y | 22 | CONFIG_MTD_AT91_DATAFLASH_CARD=y |
17 | # CONFIG_ARM_THUMB is not set | 23 | # CONFIG_ARM_THUMB is not set |
24 | CONFIG_AEABI=y | ||
25 | # CONFIG_OABI_COMPAT is not set | ||
18 | CONFIG_ZBOOT_ROM_TEXT=0x0 | 26 | CONFIG_ZBOOT_ROM_TEXT=0x0 |
19 | CONFIG_ZBOOT_ROM_BSS=0x0 | 27 | CONFIG_ZBOOT_ROM_BSS=0x0 |
20 | CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw" | 28 | CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw" |
21 | CONFIG_FPE_NWFPE=y | 29 | CONFIG_AUTO_ZRELADDR=y |
22 | CONFIG_NET=y | 30 | CONFIG_NET=y |
23 | CONFIG_PACKET=y | 31 | CONFIG_PACKET=y |
24 | CONFIG_UNIX=y | 32 | CONFIG_UNIX=y |
33 | CONFIG_NET_KEY=y | ||
25 | CONFIG_INET=y | 34 | CONFIG_INET=y |
35 | CONFIG_IP_MULTICAST=y | ||
36 | CONFIG_IP_ADVANCED_ROUTER=y | ||
37 | CONFIG_IP_ROUTE_VERBOSE=y | ||
26 | CONFIG_IP_PNP=y | 38 | CONFIG_IP_PNP=y |
39 | CONFIG_IP_PNP_DHCP=y | ||
27 | CONFIG_IP_PNP_BOOTP=y | 40 | CONFIG_IP_PNP_BOOTP=y |
28 | CONFIG_IP_PNP_RARP=y | 41 | CONFIG_IP_PNP_RARP=y |
42 | CONFIG_NET_IPIP=y | ||
43 | CONFIG_IP_MROUTE=y | ||
44 | CONFIG_IP_PIMSM_V1=y | ||
45 | CONFIG_IP_PIMSM_V2=y | ||
29 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 46 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
30 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 47 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
31 | # CONFIG_INET_XFRM_MODE_BEET is not set | 48 | # CONFIG_INET_XFRM_MODE_BEET is not set |
32 | # CONFIG_INET_LRO is not set | 49 | # CONFIG_INET_LRO is not set |
33 | # CONFIG_INET_DIAG is not set | 50 | # CONFIG_INET_DIAG is not set |
34 | # CONFIG_IPV6 is not set | 51 | CONFIG_IPV6=y |
35 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 52 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
36 | CONFIG_MTD=y | 53 | CONFIG_MTD=y |
37 | CONFIG_MTD_PARTITIONS=y | 54 | CONFIG_MTD_PARTITIONS=y |
38 | CONFIG_MTD_CMDLINE_PARTS=y | 55 | CONFIG_MTD_CMDLINE_PARTS=y |
39 | CONFIG_MTD_CHAR=y | 56 | CONFIG_MTD_CHAR=y |
40 | CONFIG_MTD_BLOCK=y | 57 | CONFIG_MTD_BLOCK=y |
58 | CONFIG_NFTL=y | ||
59 | CONFIG_NFTL_RW=y | ||
41 | CONFIG_MTD_DATAFLASH=y | 60 | CONFIG_MTD_DATAFLASH=y |
61 | CONFIG_MTD_BLOCK2MTD=y | ||
42 | CONFIG_MTD_NAND=y | 62 | CONFIG_MTD_NAND=y |
43 | CONFIG_MTD_NAND_ATMEL=y | 63 | CONFIG_MTD_NAND_ATMEL=y |
64 | CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y | ||
65 | CONFIG_MTD_UBI=y | ||
66 | CONFIG_MTD_UBI_GLUEBI=y | ||
44 | CONFIG_BLK_DEV_LOOP=y | 67 | CONFIG_BLK_DEV_LOOP=y |
45 | CONFIG_BLK_DEV_RAM=y | 68 | CONFIG_BLK_DEV_RAM=y |
46 | CONFIG_BLK_DEV_RAM_SIZE=8192 | 69 | CONFIG_BLK_DEV_RAM_SIZE=8192 |
47 | CONFIG_ATMEL_SSC=y | 70 | CONFIG_MISC_DEVICES=y |
71 | CONFIG_ATMEL_PWM=y | ||
72 | CONFIG_ATMEL_TCLIB=y | ||
48 | CONFIG_SCSI=y | 73 | CONFIG_SCSI=y |
49 | CONFIG_BLK_DEV_SD=y | 74 | CONFIG_BLK_DEV_SD=y |
50 | CONFIG_SCSI_MULTI_LUN=y | 75 | CONFIG_SCSI_MULTI_LUN=y |
51 | CONFIG_NETDEVICES=y | 76 | CONFIG_NETDEVICES=y |
52 | CONFIG_NET_ETHERNET=y | ||
53 | CONFIG_MII=y | 77 | CONFIG_MII=y |
78 | CONFIG_SMSC_PHY=y | ||
79 | CONFIG_NET_ETHERNET=y | ||
54 | CONFIG_MACB=y | 80 | CONFIG_MACB=y |
81 | # CONFIG_NETDEV_1000 is not set | ||
82 | # CONFIG_NETDEV_10000 is not set | ||
83 | CONFIG_USB_ZD1201=m | ||
84 | CONFIG_INPUT_POLLDEV=m | ||
55 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | 85 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set |
86 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=240 | ||
87 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=320 | ||
56 | CONFIG_INPUT_EVDEV=y | 88 | CONFIG_INPUT_EVDEV=y |
57 | # CONFIG_KEYBOARD_ATKBD is not set | 89 | # CONFIG_KEYBOARD_ATKBD is not set |
58 | CONFIG_KEYBOARD_GPIO=y | 90 | CONFIG_KEYBOARD_GPIO=y |
59 | # CONFIG_INPUT_MOUSE is not set | 91 | # CONFIG_INPUT_MOUSE is not set |
60 | CONFIG_INPUT_TOUCHSCREEN=y | 92 | CONFIG_INPUT_TOUCHSCREEN=y |
61 | CONFIG_TOUCHSCREEN_ADS7846=y | 93 | CONFIG_TOUCHSCREEN_ADS7846=y |
62 | # CONFIG_SERIO is not set | 94 | CONFIG_LEGACY_PTY_COUNT=4 |
63 | CONFIG_SERIAL_ATMEL=y | 95 | CONFIG_SERIAL_ATMEL=y |
64 | CONFIG_SERIAL_ATMEL_CONSOLE=y | 96 | CONFIG_SERIAL_ATMEL_CONSOLE=y |
65 | CONFIG_HW_RANDOM=y | 97 | CONFIG_HW_RANDOM=y |
@@ -74,8 +106,25 @@ CONFIG_WATCHDOG_NOWAYOUT=y | |||
74 | CONFIG_AT91SAM9X_WATCHDOG=y | 106 | CONFIG_AT91SAM9X_WATCHDOG=y |
75 | CONFIG_FB=y | 107 | CONFIG_FB=y |
76 | CONFIG_FB_ATMEL=y | 108 | CONFIG_FB_ATMEL=y |
77 | # CONFIG_VGA_CONSOLE is not set | 109 | CONFIG_BACKLIGHT_LCD_SUPPORT=y |
78 | # CONFIG_USB_HID is not set | 110 | CONFIG_LCD_CLASS_DEVICE=y |
111 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
112 | CONFIG_BACKLIGHT_ATMEL_LCDC=y | ||
113 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
114 | CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y | ||
115 | CONFIG_LOGO=y | ||
116 | CONFIG_SOUND=y | ||
117 | CONFIG_SND=y | ||
118 | CONFIG_SND_SEQUENCER=y | ||
119 | CONFIG_SND_MIXER_OSS=y | ||
120 | CONFIG_SND_PCM_OSS=y | ||
121 | # CONFIG_SND_SUPPORT_OLD_API is not set | ||
122 | # CONFIG_SND_VERBOSE_PROCFS is not set | ||
123 | # CONFIG_SND_DRIVERS is not set | ||
124 | # CONFIG_SND_ARM is not set | ||
125 | CONFIG_SND_ATMEL_AC97C=y | ||
126 | # CONFIG_SND_SPI is not set | ||
127 | CONFIG_SND_USB_AUDIO=m | ||
79 | CONFIG_USB=y | 128 | CONFIG_USB=y |
80 | CONFIG_USB_DEVICEFS=y | 129 | CONFIG_USB_DEVICEFS=y |
81 | CONFIG_USB_MON=y | 130 | CONFIG_USB_MON=y |
@@ -83,24 +132,37 @@ CONFIG_USB_OHCI_HCD=y | |||
83 | CONFIG_USB_STORAGE=y | 132 | CONFIG_USB_STORAGE=y |
84 | CONFIG_USB_GADGET=y | 133 | CONFIG_USB_GADGET=y |
85 | CONFIG_USB_ZERO=m | 134 | CONFIG_USB_ZERO=m |
135 | CONFIG_USB_ETH=m | ||
86 | CONFIG_USB_GADGETFS=m | 136 | CONFIG_USB_GADGETFS=m |
87 | CONFIG_USB_FILE_STORAGE=m | 137 | CONFIG_USB_FILE_STORAGE=m |
88 | CONFIG_USB_G_SERIAL=m | 138 | CONFIG_USB_G_SERIAL=m |
89 | CONFIG_MMC=y | 139 | CONFIG_MMC=y |
140 | CONFIG_SDIO_UART=m | ||
90 | CONFIG_MMC_AT91=m | 141 | CONFIG_MMC_AT91=m |
142 | CONFIG_NEW_LEDS=y | ||
143 | CONFIG_LEDS_CLASS=y | ||
144 | CONFIG_LEDS_ATMEL_PWM=y | ||
145 | CONFIG_LEDS_GPIO=y | ||
146 | CONFIG_LEDS_TRIGGERS=y | ||
147 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
91 | CONFIG_RTC_CLASS=y | 148 | CONFIG_RTC_CLASS=y |
92 | CONFIG_RTC_DRV_AT91SAM9=y | 149 | CONFIG_RTC_DRV_AT91SAM9=y |
93 | CONFIG_EXT2_FS=y | 150 | CONFIG_EXT2_FS=y |
94 | CONFIG_INOTIFY=y | 151 | CONFIG_FUSE_FS=m |
95 | CONFIG_VFAT_FS=y | 152 | CONFIG_VFAT_FS=y |
96 | CONFIG_TMPFS=y | 153 | CONFIG_TMPFS=y |
97 | CONFIG_JFFS2_FS=y | 154 | CONFIG_JFFS2_FS=y |
155 | CONFIG_UBIFS_FS=y | ||
156 | CONFIG_UBIFS_FS_ADVANCED_COMPR=y | ||
98 | CONFIG_CRAMFS=y | 157 | CONFIG_CRAMFS=y |
99 | CONFIG_NFS_FS=y | 158 | CONFIG_NFS_FS=y |
159 | CONFIG_NFS_V3=y | ||
160 | CONFIG_NFS_V3_ACL=y | ||
161 | CONFIG_NFS_V4=y | ||
100 | CONFIG_ROOT_NFS=y | 162 | CONFIG_ROOT_NFS=y |
101 | CONFIG_NLS_CODEPAGE_437=y | 163 | CONFIG_NLS_CODEPAGE_437=y |
102 | CONFIG_NLS_CODEPAGE_850=y | 164 | CONFIG_NLS_CODEPAGE_850=y |
103 | CONFIG_NLS_ISO8859_1=y | 165 | CONFIG_NLS_ISO8859_1=y |
104 | CONFIG_DEBUG_KERNEL=y | 166 | CONFIG_FTRACE=y |
105 | CONFIG_DEBUG_USER=y | 167 | CONFIG_DEBUG_USER=y |
106 | CONFIG_DEBUG_LL=y | 168 | CONFIG_XZ_DEC=y |
diff --git a/arch/arm/configs/exynos4_defconfig b/arch/arm/configs/exynos4_defconfig index 2ffba24d2e2a..da53ff3b4d70 100644 --- a/arch/arm/configs/exynos4_defconfig +++ b/arch/arm/configs/exynos4_defconfig | |||
@@ -8,7 +8,9 @@ CONFIG_ARCH_EXYNOS4=y | |||
8 | CONFIG_S3C_LOWLEVEL_UART_PORT=1 | 8 | CONFIG_S3C_LOWLEVEL_UART_PORT=1 |
9 | CONFIG_MACH_SMDKC210=y | 9 | CONFIG_MACH_SMDKC210=y |
10 | CONFIG_MACH_SMDKV310=y | 10 | CONFIG_MACH_SMDKV310=y |
11 | CONFIG_MACH_ARMLEX4210=y | ||
11 | CONFIG_MACH_UNIVERSAL_C210=y | 12 | CONFIG_MACH_UNIVERSAL_C210=y |
13 | CONFIG_MACH_NURI=y | ||
12 | CONFIG_NO_HZ=y | 14 | CONFIG_NO_HZ=y |
13 | CONFIG_HIGH_RES_TIMERS=y | 15 | CONFIG_HIGH_RES_TIMERS=y |
14 | CONFIG_SMP=y | 16 | CONFIG_SMP=y |
diff --git a/arch/arm/configs/neocore926_defconfig b/arch/arm/configs/neocore926_defconfig deleted file mode 100644 index 462dd1850d15..000000000000 --- a/arch/arm/configs/neocore926_defconfig +++ /dev/null | |||
@@ -1,104 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_LOCALVERSION_AUTO is not set | ||
3 | # CONFIG_SWAP is not set | ||
4 | CONFIG_SYSVIPC=y | ||
5 | CONFIG_BLK_DEV_INITRD=y | ||
6 | # CONFIG_COMPAT_BRK is not set | ||
7 | CONFIG_MODULES=y | ||
8 | CONFIG_MODULE_UNLOAD=y | ||
9 | # CONFIG_BLK_DEV_BSG is not set | ||
10 | # CONFIG_IOSCHED_DEADLINE is not set | ||
11 | # CONFIG_IOSCHED_CFQ is not set | ||
12 | CONFIG_ARCH_AT91=y | ||
13 | CONFIG_ARCH_AT91SAM9263=y | ||
14 | CONFIG_MACH_NEOCORE926=y | ||
15 | CONFIG_MTD_AT91_DATAFLASH_CARD=y | ||
16 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
17 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
18 | CONFIG_FPE_NWFPE=y | ||
19 | CONFIG_NET=y | ||
20 | CONFIG_PACKET=y | ||
21 | CONFIG_UNIX=y | ||
22 | CONFIG_NET_KEY=y | ||
23 | CONFIG_INET=y | ||
24 | CONFIG_IP_PNP=y | ||
25 | CONFIG_IP_PNP_DHCP=y | ||
26 | CONFIG_IP_PNP_BOOTP=y | ||
27 | CONFIG_IP_PNP_RARP=y | ||
28 | CONFIG_NET_IPIP=y | ||
29 | # CONFIG_INET_LRO is not set | ||
30 | CONFIG_IPV6=y | ||
31 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
32 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
33 | CONFIG_MTD=y | ||
34 | CONFIG_MTD_PARTITIONS=y | ||
35 | CONFIG_MTD_CHAR=y | ||
36 | CONFIG_MTD_BLOCK=y | ||
37 | CONFIG_NFTL=y | ||
38 | CONFIG_NFTL_RW=y | ||
39 | CONFIG_MTD_BLOCK2MTD=y | ||
40 | CONFIG_MTD_NAND=y | ||
41 | CONFIG_MTD_NAND_ECC_SMC=y | ||
42 | CONFIG_MTD_NAND_VERIFY_WRITE=y | ||
43 | CONFIG_MTD_NAND_ATMEL=y | ||
44 | CONFIG_MTD_NAND_PLATFORM=y | ||
45 | CONFIG_BLK_DEV_LOOP=y | ||
46 | CONFIG_BLK_DEV_NBD=y | ||
47 | CONFIG_ATMEL_PWM=y | ||
48 | CONFIG_ATMEL_TCLIB=y | ||
49 | CONFIG_SCSI=y | ||
50 | CONFIG_CHR_DEV_SG=y | ||
51 | CONFIG_NETDEVICES=y | ||
52 | CONFIG_SMSC_PHY=y | ||
53 | CONFIG_NET_ETHERNET=y | ||
54 | CONFIG_MACB=y | ||
55 | # CONFIG_NETDEV_1000 is not set | ||
56 | # CONFIG_NETDEV_10000 is not set | ||
57 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
58 | CONFIG_INPUT_EVDEV=y | ||
59 | CONFIG_INPUT_TOUCHSCREEN=y | ||
60 | CONFIG_TOUCHSCREEN_ADS7846=y | ||
61 | CONFIG_VT_HW_CONSOLE_BINDING=y | ||
62 | # CONFIG_DEVKMEM is not set | ||
63 | CONFIG_SERIAL_NONSTANDARD=y | ||
64 | CONFIG_SERIAL_ATMEL=y | ||
65 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
66 | # CONFIG_SERIAL_ATMEL_PDC is not set | ||
67 | # CONFIG_HW_RANDOM is not set | ||
68 | CONFIG_I2C=y | ||
69 | CONFIG_I2C_CHARDEV=y | ||
70 | CONFIG_SPI=y | ||
71 | CONFIG_SPI_ATMEL=y | ||
72 | # CONFIG_HWMON is not set | ||
73 | CONFIG_VIDEO_OUTPUT_CONTROL=y | ||
74 | CONFIG_FB=y | ||
75 | CONFIG_FB_ATMEL=y | ||
76 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
77 | CONFIG_LCD_CLASS_DEVICE=y | ||
78 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
79 | CONFIG_BACKLIGHT_ATMEL_LCDC=y | ||
80 | # CONFIG_VGA_CONSOLE is not set | ||
81 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
82 | CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y | ||
83 | CONFIG_LOGO=y | ||
84 | CONFIG_USB=y | ||
85 | CONFIG_USB_DEVICEFS=y | ||
86 | CONFIG_USB_MON=y | ||
87 | CONFIG_USB_OHCI_HCD=y | ||
88 | CONFIG_USB_STORAGE=y | ||
89 | CONFIG_MMC=y | ||
90 | CONFIG_SDIO_UART=y | ||
91 | CONFIG_MMC_AT91=m | ||
92 | CONFIG_EXT2_FS=y | ||
93 | # CONFIG_DNOTIFY is not set | ||
94 | CONFIG_AUTOFS_FS=y | ||
95 | CONFIG_VFAT_FS=y | ||
96 | CONFIG_TMPFS=y | ||
97 | CONFIG_JFFS2_FS=y | ||
98 | CONFIG_JFFS2_FS_WBUF_VERIFY=y | ||
99 | CONFIG_NFS_FS=y | ||
100 | CONFIG_ROOT_NFS=y | ||
101 | # CONFIG_ENABLE_WARN_DEPRECATED is not set | ||
102 | # CONFIG_ENABLE_MUST_CHECK is not set | ||
103 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
104 | # CONFIG_CRYPTO_HW is not set | ||
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index 076db52ff672..d5f00d7eb075 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig | |||
@@ -21,58 +21,22 @@ CONFIG_MODVERSIONS=y | |||
21 | CONFIG_MODULE_SRCVERSION_ALL=y | 21 | CONFIG_MODULE_SRCVERSION_ALL=y |
22 | # CONFIG_BLK_DEV_BSG is not set | 22 | # CONFIG_BLK_DEV_BSG is not set |
23 | CONFIG_ARCH_OMAP=y | 23 | CONFIG_ARCH_OMAP=y |
24 | CONFIG_ARCH_OMAP2=y | ||
25 | CONFIG_ARCH_OMAP3=y | ||
26 | CONFIG_ARCH_OMAP4=y | ||
27 | CONFIG_OMAP_RESET_CLOCKS=y | 24 | CONFIG_OMAP_RESET_CLOCKS=y |
28 | CONFIG_OMAP_MUX_DEBUG=y | 25 | CONFIG_OMAP_MUX_DEBUG=y |
29 | CONFIG_OMAP_32K_TIMER=y | ||
30 | CONFIG_MACH_OMAP_GENERIC=y | ||
31 | CONFIG_ARCH_OMAP2420=y | ||
32 | CONFIG_ARCH_OMAP2430=y | ||
33 | CONFIG_ARCH_OMAP3430=y | ||
34 | CONFIG_MACH_OMAP_H4=y | ||
35 | CONFIG_MACH_OMAP_APOLLON=y | ||
36 | CONFIG_MACH_OMAP_2430SDP=y | ||
37 | CONFIG_MACH_OMAP3_BEAGLE=y | ||
38 | CONFIG_MACH_DEVKIT8000=y | ||
39 | CONFIG_MACH_OMAP_LDP=y | ||
40 | CONFIG_MACH_OVERO=y | ||
41 | CONFIG_MACH_OMAP3EVM=y | ||
42 | CONFIG_MACH_OMAP3517EVM=y | ||
43 | CONFIG_MACH_OMAP3_PANDORA=y | ||
44 | CONFIG_MACH_OMAP3_TOUCHBOOK=y | ||
45 | CONFIG_MACH_OMAP_3430SDP=y | ||
46 | CONFIG_MACH_NOKIA_N8X0=y | ||
47 | CONFIG_MACH_NOKIA_RX51=y | ||
48 | CONFIG_MACH_OMAP_ZOOM2=y | ||
49 | CONFIG_MACH_OMAP_ZOOM3=y | ||
50 | CONFIG_MACH_CM_T35=y | ||
51 | CONFIG_MACH_IGEP0020=y | ||
52 | CONFIG_MACH_SBC3530=y | ||
53 | CONFIG_MACH_OMAP_3630SDP=y | ||
54 | CONFIG_MACH_OMAP_4430SDP=y | ||
55 | CONFIG_ARM_THUMBEE=y | 26 | CONFIG_ARM_THUMBEE=y |
56 | CONFIG_ARM_L1_CACHE_SHIFT=5 | ||
57 | CONFIG_ARM_ERRATA_411920=y | 27 | CONFIG_ARM_ERRATA_411920=y |
58 | CONFIG_NO_HZ=y | 28 | CONFIG_NO_HZ=y |
59 | CONFIG_HIGH_RES_TIMERS=y | 29 | CONFIG_HIGH_RES_TIMERS=y |
60 | CONFIG_SMP=y | 30 | CONFIG_SMP=y |
61 | CONFIG_NR_CPUS=2 | 31 | CONFIG_NR_CPUS=2 |
62 | # CONFIG_LOCAL_TIMERS is not set | ||
63 | CONFIG_AEABI=y | ||
64 | CONFIG_LEDS=y | 32 | CONFIG_LEDS=y |
65 | CONFIG_ZBOOT_ROM_TEXT=0x0 | 33 | CONFIG_ZBOOT_ROM_TEXT=0x0 |
66 | CONFIG_ZBOOT_ROM_BSS=0x0 | 34 | CONFIG_ZBOOT_ROM_BSS=0x0 |
67 | CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO2,115200" | 35 | CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO2,115200" |
68 | CONFIG_KEXEC=y | 36 | CONFIG_KEXEC=y |
69 | CONFIG_FPE_NWFPE=y | 37 | CONFIG_FPE_NWFPE=y |
70 | CONFIG_VFP=y | ||
71 | CONFIG_NEON=y | ||
72 | CONFIG_BINFMT_MISC=y | 38 | CONFIG_BINFMT_MISC=y |
73 | CONFIG_PM=y | ||
74 | CONFIG_PM_DEBUG=y | 39 | CONFIG_PM_DEBUG=y |
75 | CONFIG_PM_RUNTIME=y | ||
76 | CONFIG_NET=y | 40 | CONFIG_NET=y |
77 | CONFIG_PACKET=y | 41 | CONFIG_PACKET=y |
78 | CONFIG_UNIX=y | 42 | CONFIG_UNIX=y |
@@ -89,14 +53,6 @@ CONFIG_IP_PNP_RARP=y | |||
89 | # CONFIG_IPV6 is not set | 53 | # CONFIG_IPV6 is not set |
90 | CONFIG_NETFILTER=y | 54 | CONFIG_NETFILTER=y |
91 | CONFIG_BT=m | 55 | CONFIG_BT=m |
92 | CONFIG_BT_L2CAP=m | ||
93 | CONFIG_BT_SCO=m | ||
94 | CONFIG_BT_RFCOMM=y | ||
95 | CONFIG_BT_RFCOMM_TTY=y | ||
96 | CONFIG_BT_BNEP=m | ||
97 | CONFIG_BT_BNEP_MC_FILTER=y | ||
98 | CONFIG_BT_BNEP_PROTO_FILTER=y | ||
99 | CONFIG_BT_HIDP=m | ||
100 | CONFIG_BT_HCIUART=m | 56 | CONFIG_BT_HCIUART=m |
101 | CONFIG_BT_HCIUART_H4=y | 57 | CONFIG_BT_HCIUART_H4=y |
102 | CONFIG_BT_HCIUART_BCSP=y | 58 | CONFIG_BT_HCIUART_BCSP=y |
@@ -107,11 +63,9 @@ CONFIG_CFG80211=m | |||
107 | CONFIG_MAC80211=m | 63 | CONFIG_MAC80211=m |
108 | CONFIG_MAC80211_RC_PID=y | 64 | CONFIG_MAC80211_RC_PID=y |
109 | CONFIG_MAC80211_RC_DEFAULT_PID=y | 65 | CONFIG_MAC80211_RC_DEFAULT_PID=y |
110 | CONFIG_MAC80211_LEDS=y | ||
111 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 66 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
112 | CONFIG_CONNECTOR=y | 67 | CONFIG_CONNECTOR=y |
113 | CONFIG_MTD=y | 68 | CONFIG_MTD=y |
114 | CONFIG_MTD_CONCAT=y | ||
115 | CONFIG_MTD_CMDLINE_PARTS=y | 69 | CONFIG_MTD_CMDLINE_PARTS=y |
116 | CONFIG_MTD_CHAR=y | 70 | CONFIG_MTD_CHAR=y |
117 | CONFIG_MTD_BLOCK=y | 71 | CONFIG_MTD_BLOCK=y |
@@ -127,7 +81,6 @@ CONFIG_MTD_UBI=y | |||
127 | CONFIG_BLK_DEV_LOOP=y | 81 | CONFIG_BLK_DEV_LOOP=y |
128 | CONFIG_BLK_DEV_RAM=y | 82 | CONFIG_BLK_DEV_RAM=y |
129 | CONFIG_BLK_DEV_RAM_SIZE=16384 | 83 | CONFIG_BLK_DEV_RAM_SIZE=16384 |
130 | CONFIG_EEPROM_LEGACY=y | ||
131 | CONFIG_SCSI=y | 84 | CONFIG_SCSI=y |
132 | CONFIG_BLK_DEV_SD=y | 85 | CONFIG_BLK_DEV_SD=y |
133 | CONFIG_SCSI_MULTI_LUN=y | 86 | CONFIG_SCSI_MULTI_LUN=y |
@@ -158,19 +111,15 @@ CONFIG_TOUCHSCREEN_ADS7846=y | |||
158 | CONFIG_INPUT_MISC=y | 111 | CONFIG_INPUT_MISC=y |
159 | CONFIG_INPUT_TWL4030_PWRBUTTON=y | 112 | CONFIG_INPUT_TWL4030_PWRBUTTON=y |
160 | CONFIG_VT_HW_CONSOLE_BINDING=y | 113 | CONFIG_VT_HW_CONSOLE_BINDING=y |
161 | CONFIG_SERIAL_8250=y | 114 | # CONFIG_LEGACY_PTYS is not set |
162 | CONFIG_SERIAL_8250_CONSOLE=y | ||
163 | CONFIG_SERIAL_8250_NR_UARTS=32 | 115 | CONFIG_SERIAL_8250_NR_UARTS=32 |
164 | CONFIG_SERIAL_8250_EXTENDED=y | 116 | CONFIG_SERIAL_8250_EXTENDED=y |
165 | CONFIG_SERIAL_8250_MANY_PORTS=y | 117 | CONFIG_SERIAL_8250_MANY_PORTS=y |
166 | CONFIG_SERIAL_8250_SHARE_IRQ=y | 118 | CONFIG_SERIAL_8250_SHARE_IRQ=y |
167 | CONFIG_SERIAL_8250_DETECT_IRQ=y | 119 | CONFIG_SERIAL_8250_DETECT_IRQ=y |
168 | CONFIG_SERIAL_8250_RSA=y | 120 | CONFIG_SERIAL_8250_RSA=y |
169 | # CONFIG_LEGACY_PTYS is not set | ||
170 | CONFIG_HW_RANDOM=y | 121 | CONFIG_HW_RANDOM=y |
171 | CONFIG_I2C=y | ||
172 | CONFIG_I2C_CHARDEV=y | 122 | CONFIG_I2C_CHARDEV=y |
173 | CONFIG_I2C_OMAP=y | ||
174 | CONFIG_SPI=y | 123 | CONFIG_SPI=y |
175 | CONFIG_SPI_OMAP24XX=y | 124 | CONFIG_SPI_OMAP24XX=y |
176 | CONFIG_DEBUG_GPIO=y | 125 | CONFIG_DEBUG_GPIO=y |
@@ -181,10 +130,6 @@ CONFIG_POWER_SUPPLY=y | |||
181 | CONFIG_WATCHDOG=y | 130 | CONFIG_WATCHDOG=y |
182 | CONFIG_OMAP_WATCHDOG=y | 131 | CONFIG_OMAP_WATCHDOG=y |
183 | CONFIG_TWL4030_WATCHDOG=y | 132 | CONFIG_TWL4030_WATCHDOG=y |
184 | CONFIG_MENELAUS=y | ||
185 | CONFIG_TWL4030_CORE=y | ||
186 | CONFIG_TWL4030_POWER=y | ||
187 | CONFIG_REGULATOR=y | ||
188 | CONFIG_REGULATOR_TWL4030=y | 133 | CONFIG_REGULATOR_TWL4030=y |
189 | CONFIG_REGULATOR_TPS65023=y | 134 | CONFIG_REGULATOR_TPS65023=y |
190 | CONFIG_REGULATOR_TPS6507X=y | 135 | CONFIG_REGULATOR_TPS6507X=y |
@@ -208,7 +153,6 @@ CONFIG_BACKLIGHT_LCD_SUPPORT=y | |||
208 | CONFIG_LCD_CLASS_DEVICE=y | 153 | CONFIG_LCD_CLASS_DEVICE=y |
209 | CONFIG_LCD_PLATFORM=y | 154 | CONFIG_LCD_PLATFORM=y |
210 | CONFIG_DISPLAY_SUPPORT=y | 155 | CONFIG_DISPLAY_SUPPORT=y |
211 | # CONFIG_VGA_CONSOLE is not set | ||
212 | CONFIG_FRAMEBUFFER_CONSOLE=y | 156 | CONFIG_FRAMEBUFFER_CONSOLE=y |
213 | CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y | 157 | CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y |
214 | CONFIG_FONTS=y | 158 | CONFIG_FONTS=y |
@@ -217,25 +161,20 @@ CONFIG_FONT_8x16=y | |||
217 | CONFIG_LOGO=y | 161 | CONFIG_LOGO=y |
218 | CONFIG_SOUND=m | 162 | CONFIG_SOUND=m |
219 | CONFIG_SND=m | 163 | CONFIG_SND=m |
220 | CONFIG_SND_MIXER_OSS=y | 164 | CONFIG_SND_MIXER_OSS=m |
221 | CONFIG_SND_PCM_OSS=y | 165 | CONFIG_SND_PCM_OSS=m |
222 | CONFIG_SND_VERBOSE_PRINTK=y | 166 | CONFIG_SND_VERBOSE_PRINTK=y |
223 | CONFIG_SND_DEBUG=y | 167 | CONFIG_SND_DEBUG=y |
224 | CONFIG_SND_USB_AUDIO=y | 168 | CONFIG_SND_USB_AUDIO=m |
225 | CONFIG_SND_SOC=y | 169 | CONFIG_SND_SOC=m |
226 | CONFIG_SND_OMAP_SOC=y | 170 | CONFIG_SND_OMAP_SOC=m |
227 | CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=y | 171 | CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=m |
228 | CONFIG_USB=y | 172 | CONFIG_USB=y |
229 | CONFIG_USB_DEBUG=y | 173 | CONFIG_USB_DEBUG=y |
230 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | 174 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y |
231 | CONFIG_USB_DEVICEFS=y | 175 | CONFIG_USB_DEVICEFS=y |
232 | CONFIG_USB_SUSPEND=y | 176 | CONFIG_USB_SUSPEND=y |
233 | # CONFIG_USB_OTG_WHITELIST is not set | ||
234 | CONFIG_USB_MON=y | 177 | CONFIG_USB_MON=y |
235 | # CONFIG_USB_MUSB_HDRC is not set | ||
236 | # CONFIG_USB_MUSB_OTG is not set | ||
237 | # CONFIG_USB_GADGET_MUSB_HDRC is not set | ||
238 | CONFIG_USB_MUSB_DEBUG=y | ||
239 | CONFIG_USB_WDM=y | 178 | CONFIG_USB_WDM=y |
240 | CONFIG_USB_STORAGE=y | 179 | CONFIG_USB_STORAGE=y |
241 | CONFIG_USB_LIBUSUAL=y | 180 | CONFIG_USB_LIBUSUAL=y |
@@ -250,18 +189,12 @@ CONFIG_MMC_UNSAFE_RESUME=y | |||
250 | CONFIG_SDIO_UART=y | 189 | CONFIG_SDIO_UART=y |
251 | CONFIG_MMC_OMAP=y | 190 | CONFIG_MMC_OMAP=y |
252 | CONFIG_MMC_OMAP_HS=y | 191 | CONFIG_MMC_OMAP_HS=y |
253 | CONFIG_LEDS_CLASS=y | ||
254 | CONFIG_LEDS_GPIO=y | ||
255 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
256 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
257 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | ||
258 | CONFIG_RTC_CLASS=y | 192 | CONFIG_RTC_CLASS=y |
259 | CONFIG_RTC_DRV_TWL92330=y | 193 | CONFIG_RTC_DRV_TWL92330=y |
260 | CONFIG_RTC_DRV_TWL4030=y | 194 | CONFIG_RTC_DRV_TWL4030=y |
261 | CONFIG_EXT2_FS=y | 195 | CONFIG_EXT2_FS=y |
262 | CONFIG_EXT3_FS=y | 196 | CONFIG_EXT3_FS=y |
263 | # CONFIG_EXT3_FS_XATTR is not set | 197 | # CONFIG_EXT3_FS_XATTR is not set |
264 | CONFIG_INOTIFY=y | ||
265 | CONFIG_QUOTA=y | 198 | CONFIG_QUOTA=y |
266 | CONFIG_QFMT_V2=y | 199 | CONFIG_QFMT_V2=y |
267 | CONFIG_MSDOS_FS=y | 200 | CONFIG_MSDOS_FS=y |
@@ -285,12 +218,10 @@ CONFIG_NLS_CODEPAGE_437=y | |||
285 | CONFIG_NLS_ISO8859_1=y | 218 | CONFIG_NLS_ISO8859_1=y |
286 | CONFIG_PRINTK_TIME=y | 219 | CONFIG_PRINTK_TIME=y |
287 | CONFIG_MAGIC_SYSRQ=y | 220 | CONFIG_MAGIC_SYSRQ=y |
288 | CONFIG_DEBUG_FS=y | ||
289 | CONFIG_DEBUG_KERNEL=y | 221 | CONFIG_DEBUG_KERNEL=y |
290 | CONFIG_SCHEDSTATS=y | 222 | CONFIG_SCHEDSTATS=y |
291 | CONFIG_TIMER_STATS=y | 223 | CONFIG_TIMER_STATS=y |
292 | CONFIG_PROVE_LOCKING=y | 224 | CONFIG_PROVE_LOCKING=y |
293 | # CONFIG_LOCK_STAT is not set | ||
294 | CONFIG_DEBUG_SPINLOCK_SLEEP=y | 225 | CONFIG_DEBUG_SPINLOCK_SLEEP=y |
295 | # CONFIG_DEBUG_BUGVERBOSE is not set | 226 | # CONFIG_DEBUG_BUGVERBOSE is not set |
296 | CONFIG_DEBUG_INFO=y | 227 | CONFIG_DEBUG_INFO=y |
diff --git a/arch/arm/configs/s5p6442_defconfig b/arch/arm/configs/s5p6442_defconfig deleted file mode 100644 index 0e92a784af66..000000000000 --- a/arch/arm/configs/s5p6442_defconfig +++ /dev/null | |||
@@ -1,65 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
3 | CONFIG_BLK_DEV_INITRD=y | ||
4 | CONFIG_KALLSYMS_ALL=y | ||
5 | CONFIG_MODULES=y | ||
6 | CONFIG_MODULE_UNLOAD=y | ||
7 | # CONFIG_BLK_DEV_BSG is not set | ||
8 | CONFIG_ARCH_S5P6442=y | ||
9 | CONFIG_S3C_LOWLEVEL_UART_PORT=1 | ||
10 | CONFIG_MACH_SMDK6442=y | ||
11 | CONFIG_CPU_32v6K=y | ||
12 | CONFIG_AEABI=y | ||
13 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" | ||
14 | CONFIG_FPE_NWFPE=y | ||
15 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
16 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
17 | CONFIG_BLK_DEV_LOOP=y | ||
18 | CONFIG_BLK_DEV_RAM=y | ||
19 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
20 | # CONFIG_MISC_DEVICES is not set | ||
21 | CONFIG_SCSI=y | ||
22 | CONFIG_BLK_DEV_SD=y | ||
23 | CONFIG_CHR_DEV_SG=y | ||
24 | CONFIG_INPUT_EVDEV=y | ||
25 | # CONFIG_INPUT_KEYBOARD is not set | ||
26 | # CONFIG_INPUT_MOUSE is not set | ||
27 | CONFIG_INPUT_TOUCHSCREEN=y | ||
28 | CONFIG_SERIAL_8250=y | ||
29 | CONFIG_SERIAL_8250_NR_UARTS=3 | ||
30 | CONFIG_SERIAL_SAMSUNG=y | ||
31 | CONFIG_SERIAL_SAMSUNG_CONSOLE=y | ||
32 | CONFIG_HW_RANDOM=y | ||
33 | # CONFIG_HWMON is not set | ||
34 | # CONFIG_VGA_CONSOLE is not set | ||
35 | # CONFIG_HID_SUPPORT is not set | ||
36 | # CONFIG_USB_SUPPORT is not set | ||
37 | CONFIG_EXT2_FS=y | ||
38 | CONFIG_INOTIFY=y | ||
39 | CONFIG_MSDOS_FS=y | ||
40 | CONFIG_VFAT_FS=y | ||
41 | CONFIG_TMPFS=y | ||
42 | CONFIG_TMPFS_POSIX_ACL=y | ||
43 | CONFIG_CRAMFS=y | ||
44 | CONFIG_ROMFS_FS=y | ||
45 | CONFIG_PARTITION_ADVANCED=y | ||
46 | CONFIG_BSD_DISKLABEL=y | ||
47 | CONFIG_SOLARIS_X86_PARTITION=y | ||
48 | CONFIG_NLS_CODEPAGE_437=y | ||
49 | CONFIG_NLS_ASCII=y | ||
50 | CONFIG_NLS_ISO8859_1=y | ||
51 | CONFIG_MAGIC_SYSRQ=y | ||
52 | CONFIG_DEBUG_KERNEL=y | ||
53 | CONFIG_DEBUG_RT_MUTEXES=y | ||
54 | CONFIG_DEBUG_SPINLOCK=y | ||
55 | CONFIG_DEBUG_MUTEXES=y | ||
56 | CONFIG_DEBUG_SPINLOCK_SLEEP=y | ||
57 | CONFIG_DEBUG_INFO=y | ||
58 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
59 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
60 | # CONFIG_ARM_UNWIND is not set | ||
61 | CONFIG_DEBUG_USER=y | ||
62 | CONFIG_DEBUG_ERRORS=y | ||
63 | CONFIG_DEBUG_LL=y | ||
64 | CONFIG_DEBUG_S3C_UART=1 | ||
65 | CONFIG_CRC_CCITT=y | ||
diff --git a/arch/arm/configs/usb-a9263_defconfig b/arch/arm/configs/usb-a9263_defconfig deleted file mode 100644 index ee82d09249c6..000000000000 --- a/arch/arm/configs/usb-a9263_defconfig +++ /dev/null | |||
@@ -1,106 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_LOCALVERSION_AUTO is not set | ||
3 | # CONFIG_SWAP is not set | ||
4 | CONFIG_SYSVIPC=y | ||
5 | CONFIG_LOG_BUF_SHIFT=14 | ||
6 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
7 | CONFIG_SLAB=y | ||
8 | CONFIG_MODULES=y | ||
9 | CONFIG_MODULE_UNLOAD=y | ||
10 | # CONFIG_BLK_DEV_BSG is not set | ||
11 | # CONFIG_IOSCHED_DEADLINE is not set | ||
12 | # CONFIG_IOSCHED_CFQ is not set | ||
13 | CONFIG_ARCH_AT91=y | ||
14 | CONFIG_ARCH_AT91SAM9263=y | ||
15 | CONFIG_MACH_USB_A9263=y | ||
16 | CONFIG_AT91_SLOW_CLOCK=y | ||
17 | # CONFIG_ARM_THUMB is not set | ||
18 | CONFIG_AEABI=y | ||
19 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
20 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
21 | CONFIG_CMDLINE="mem=64M console=ttyS0,115200" | ||
22 | CONFIG_FPE_NWFPE=y | ||
23 | CONFIG_PM=y | ||
24 | CONFIG_NET=y | ||
25 | CONFIG_PACKET=y | ||
26 | CONFIG_UNIX=y | ||
27 | CONFIG_INET=y | ||
28 | CONFIG_IP_MULTICAST=y | ||
29 | CONFIG_IP_ADVANCED_ROUTER=y | ||
30 | CONFIG_IP_ROUTE_VERBOSE=y | ||
31 | CONFIG_IP_PNP=y | ||
32 | CONFIG_IP_PNP_BOOTP=y | ||
33 | CONFIG_IP_PNP_RARP=y | ||
34 | CONFIG_IP_MROUTE=y | ||
35 | CONFIG_IP_PIMSM_V1=y | ||
36 | CONFIG_IP_PIMSM_V2=y | ||
37 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
38 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
39 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
40 | # CONFIG_INET_LRO is not set | ||
41 | # CONFIG_INET_DIAG is not set | ||
42 | # CONFIG_IPV6 is not set | ||
43 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
44 | CONFIG_MTD=y | ||
45 | CONFIG_MTD_PARTITIONS=y | ||
46 | CONFIG_MTD_CMDLINE_PARTS=y | ||
47 | CONFIG_MTD_CHAR=y | ||
48 | CONFIG_MTD_BLOCK=y | ||
49 | CONFIG_MTD_DATAFLASH=y | ||
50 | CONFIG_MTD_NAND=y | ||
51 | CONFIG_MTD_NAND_ATMEL=y | ||
52 | CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y | ||
53 | CONFIG_BLK_DEV_LOOP=y | ||
54 | # CONFIG_MISC_DEVICES is not set | ||
55 | CONFIG_SCSI=y | ||
56 | CONFIG_BLK_DEV_SD=y | ||
57 | CONFIG_SCSI_MULTI_LUN=y | ||
58 | CONFIG_NETDEVICES=y | ||
59 | CONFIG_NET_ETHERNET=y | ||
60 | CONFIG_MII=y | ||
61 | CONFIG_MACB=y | ||
62 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
63 | CONFIG_INPUT_EVDEV=y | ||
64 | CONFIG_INPUT_EVBUG=y | ||
65 | # CONFIG_KEYBOARD_ATKBD is not set | ||
66 | CONFIG_KEYBOARD_GPIO=y | ||
67 | # CONFIG_INPUT_MOUSE is not set | ||
68 | # CONFIG_SERIO is not set | ||
69 | CONFIG_SERIAL_ATMEL=y | ||
70 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
71 | CONFIG_HW_RANDOM=y | ||
72 | CONFIG_SPI=y | ||
73 | CONFIG_SPI_ATMEL=y | ||
74 | # CONFIG_HWMON is not set | ||
75 | # CONFIG_VGA_CONSOLE is not set | ||
76 | # CONFIG_USB_HID is not set | ||
77 | CONFIG_USB=y | ||
78 | CONFIG_USB_DEVICEFS=y | ||
79 | CONFIG_USB_MON=y | ||
80 | CONFIG_USB_OHCI_HCD=y | ||
81 | CONFIG_USB_STORAGE=y | ||
82 | CONFIG_USB_GADGET=y | ||
83 | CONFIG_USB_ETH=m | ||
84 | CONFIG_NEW_LEDS=y | ||
85 | CONFIG_LEDS_CLASS=y | ||
86 | CONFIG_LEDS_GPIO=y | ||
87 | CONFIG_LEDS_TRIGGERS=y | ||
88 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
89 | CONFIG_EXT2_FS=y | ||
90 | CONFIG_INOTIFY=y | ||
91 | CONFIG_FUSE_FS=m | ||
92 | CONFIG_VFAT_FS=y | ||
93 | CONFIG_TMPFS=y | ||
94 | CONFIG_JFFS2_FS=y | ||
95 | CONFIG_NFS_FS=y | ||
96 | CONFIG_NFS_V3=y | ||
97 | CONFIG_NFS_V3_ACL=y | ||
98 | CONFIG_NFS_V4=y | ||
99 | CONFIG_ROOT_NFS=y | ||
100 | CONFIG_NLS_CODEPAGE_437=y | ||
101 | CONFIG_NLS_CODEPAGE_850=y | ||
102 | CONFIG_NLS_ISO8859_1=y | ||
103 | CONFIG_DEBUG_KERNEL=y | ||
104 | CONFIG_DEBUG_USER=y | ||
105 | CONFIG_DEBUG_LL=y | ||
106 | # CONFIG_CRYPTO_HW is not set | ||
diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h index 6b7403fd8f54..b4892a06442c 100644 --- a/arch/arm/include/asm/bitops.h +++ b/arch/arm/include/asm/bitops.h | |||
@@ -203,8 +203,6 @@ extern int _find_next_bit_be(const unsigned long *p, int size, int offset); | |||
203 | #define find_first_bit(p,sz) _find_first_bit_le(p,sz) | 203 | #define find_first_bit(p,sz) _find_first_bit_le(p,sz) |
204 | #define find_next_bit(p,sz,off) _find_next_bit_le(p,sz,off) | 204 | #define find_next_bit(p,sz,off) _find_next_bit_le(p,sz,off) |
205 | 205 | ||
206 | #define WORD_BITOFF_TO_LE(x) ((x)) | ||
207 | |||
208 | #else | 206 | #else |
209 | /* | 207 | /* |
210 | * These are the big endian, atomic definitions. | 208 | * These are the big endian, atomic definitions. |
@@ -214,8 +212,6 @@ extern int _find_next_bit_be(const unsigned long *p, int size, int offset); | |||
214 | #define find_first_bit(p,sz) _find_first_bit_be(p,sz) | 212 | #define find_first_bit(p,sz) _find_first_bit_be(p,sz) |
215 | #define find_next_bit(p,sz,off) _find_next_bit_be(p,sz,off) | 213 | #define find_next_bit(p,sz,off) _find_next_bit_be(p,sz,off) |
216 | 214 | ||
217 | #define WORD_BITOFF_TO_LE(x) ((x) ^ 0x18) | ||
218 | |||
219 | #endif | 215 | #endif |
220 | 216 | ||
221 | #if __LINUX_ARM_ARCH__ < 5 | 217 | #if __LINUX_ARM_ARCH__ < 5 |
@@ -287,55 +283,29 @@ static inline int fls(int x) | |||
287 | #include <asm-generic/bitops/hweight.h> | 283 | #include <asm-generic/bitops/hweight.h> |
288 | #include <asm-generic/bitops/lock.h> | 284 | #include <asm-generic/bitops/lock.h> |
289 | 285 | ||
290 | static inline void __set_bit_le(int nr, void *addr) | 286 | #ifdef __ARMEB__ |
291 | { | ||
292 | __set_bit(WORD_BITOFF_TO_LE(nr), addr); | ||
293 | } | ||
294 | |||
295 | static inline void __clear_bit_le(int nr, void *addr) | ||
296 | { | ||
297 | __clear_bit(WORD_BITOFF_TO_LE(nr), addr); | ||
298 | } | ||
299 | |||
300 | static inline int __test_and_set_bit_le(int nr, void *addr) | ||
301 | { | ||
302 | return __test_and_set_bit(WORD_BITOFF_TO_LE(nr), addr); | ||
303 | } | ||
304 | |||
305 | static inline int test_and_set_bit_le(int nr, void *addr) | ||
306 | { | ||
307 | return test_and_set_bit(WORD_BITOFF_TO_LE(nr), addr); | ||
308 | } | ||
309 | |||
310 | static inline int __test_and_clear_bit_le(int nr, void *addr) | ||
311 | { | ||
312 | return __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), addr); | ||
313 | } | ||
314 | |||
315 | static inline int test_and_clear_bit_le(int nr, void *addr) | ||
316 | { | ||
317 | return test_and_clear_bit(WORD_BITOFF_TO_LE(nr), addr); | ||
318 | } | ||
319 | |||
320 | static inline int test_bit_le(int nr, const void *addr) | ||
321 | { | ||
322 | return test_bit(WORD_BITOFF_TO_LE(nr), addr); | ||
323 | } | ||
324 | 287 | ||
325 | static inline int find_first_zero_bit_le(const void *p, unsigned size) | 288 | static inline int find_first_zero_bit_le(const void *p, unsigned size) |
326 | { | 289 | { |
327 | return _find_first_zero_bit_le(p, size); | 290 | return _find_first_zero_bit_le(p, size); |
328 | } | 291 | } |
292 | #define find_first_zero_bit_le find_first_zero_bit_le | ||
329 | 293 | ||
330 | static inline int find_next_zero_bit_le(const void *p, int size, int offset) | 294 | static inline int find_next_zero_bit_le(const void *p, int size, int offset) |
331 | { | 295 | { |
332 | return _find_next_zero_bit_le(p, size, offset); | 296 | return _find_next_zero_bit_le(p, size, offset); |
333 | } | 297 | } |
298 | #define find_next_zero_bit_le find_next_zero_bit_le | ||
334 | 299 | ||
335 | static inline int find_next_bit_le(const void *p, int size, int offset) | 300 | static inline int find_next_bit_le(const void *p, int size, int offset) |
336 | { | 301 | { |
337 | return _find_next_bit_le(p, size, offset); | 302 | return _find_next_bit_le(p, size, offset); |
338 | } | 303 | } |
304 | #define find_next_bit_le find_next_bit_le | ||
305 | |||
306 | #endif | ||
307 | |||
308 | #include <asm-generic/bitops/le.h> | ||
339 | 309 | ||
340 | /* | 310 | /* |
341 | * Ext2 is defined to use little-endian byte ordering. | 311 | * Ext2 is defined to use little-endian byte ordering. |
diff --git a/arch/arm/include/asm/fiq.h b/arch/arm/include/asm/fiq.h index 2242ce22ec6c..d493d0b742a1 100644 --- a/arch/arm/include/asm/fiq.h +++ b/arch/arm/include/asm/fiq.h | |||
@@ -4,6 +4,13 @@ | |||
4 | * Support for FIQ on ARM architectures. | 4 | * Support for FIQ on ARM architectures. |
5 | * Written by Philip Blundell <philb@gnu.org>, 1998 | 5 | * Written by Philip Blundell <philb@gnu.org>, 1998 |
6 | * Re-written by Russell King | 6 | * Re-written by Russell King |
7 | * | ||
8 | * NOTE: The FIQ mode registers are not magically preserved across | ||
9 | * suspend/resume. | ||
10 | * | ||
11 | * Drivers which require these registers to be preserved across power | ||
12 | * management operations must implement appropriate suspend/resume handlers to | ||
13 | * save and restore them. | ||
7 | */ | 14 | */ |
8 | 15 | ||
9 | #ifndef __ASM_FIQ_H | 16 | #ifndef __ASM_FIQ_H |
@@ -29,9 +36,21 @@ struct fiq_handler { | |||
29 | extern int claim_fiq(struct fiq_handler *f); | 36 | extern int claim_fiq(struct fiq_handler *f); |
30 | extern void release_fiq(struct fiq_handler *f); | 37 | extern void release_fiq(struct fiq_handler *f); |
31 | extern void set_fiq_handler(void *start, unsigned int length); | 38 | extern void set_fiq_handler(void *start, unsigned int length); |
32 | extern void set_fiq_regs(struct pt_regs *regs); | ||
33 | extern void get_fiq_regs(struct pt_regs *regs); | ||
34 | extern void enable_fiq(int fiq); | 39 | extern void enable_fiq(int fiq); |
35 | extern void disable_fiq(int fiq); | 40 | extern void disable_fiq(int fiq); |
36 | 41 | ||
42 | /* helpers defined in fiqasm.S: */ | ||
43 | extern void __set_fiq_regs(unsigned long const *regs); | ||
44 | extern void __get_fiq_regs(unsigned long *regs); | ||
45 | |||
46 | static inline void set_fiq_regs(struct pt_regs const *regs) | ||
47 | { | ||
48 | __set_fiq_regs(®s->ARM_r8); | ||
49 | } | ||
50 | |||
51 | static inline void get_fiq_regs(struct pt_regs *regs) | ||
52 | { | ||
53 | __get_fiq_regs(®s->ARM_r8); | ||
54 | } | ||
55 | |||
37 | #endif | 56 | #endif |
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h index bf13b814c1b8..946f4d778f71 100644 --- a/arch/arm/include/asm/mach/arch.h +++ b/arch/arm/include/asm/mach/arch.h | |||
@@ -18,6 +18,8 @@ struct machine_desc { | |||
18 | unsigned int nr; /* architecture number */ | 18 | unsigned int nr; /* architecture number */ |
19 | const char *name; /* architecture name */ | 19 | const char *name; /* architecture name */ |
20 | unsigned long boot_params; /* tagged list */ | 20 | unsigned long boot_params; /* tagged list */ |
21 | const char **dt_compat; /* array of device tree | ||
22 | * 'compatible' strings */ | ||
21 | 23 | ||
22 | unsigned int nr_irqs; /* number of IRQs */ | 24 | unsigned int nr_irqs; /* number of IRQs */ |
23 | 25 | ||
@@ -48,6 +50,13 @@ struct machine_desc { | |||
48 | extern struct machine_desc *machine_desc; | 50 | extern struct machine_desc *machine_desc; |
49 | 51 | ||
50 | /* | 52 | /* |
53 | * Machine type table - also only accessible during boot | ||
54 | */ | ||
55 | extern struct machine_desc __arch_info_begin[], __arch_info_end[]; | ||
56 | #define for_each_machine_desc(p) \ | ||
57 | for (p = __arch_info_begin; p < __arch_info_end; p++) | ||
58 | |||
59 | /* | ||
51 | * Set of macros to define architecture features. This is built into | 60 | * Set of macros to define architecture features. This is built into |
52 | * a table by the linker. | 61 | * a table by the linker. |
53 | */ | 62 | */ |
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h index f51a69595f6e..ac75d0848889 100644 --- a/arch/arm/include/asm/page.h +++ b/arch/arm/include/asm/page.h | |||
@@ -197,7 +197,7 @@ typedef unsigned long pgprot_t; | |||
197 | 197 | ||
198 | typedef struct page *pgtable_t; | 198 | typedef struct page *pgtable_t; |
199 | 199 | ||
200 | #ifndef CONFIG_SPARSEMEM | 200 | #ifdef CONFIG_HAVE_ARCH_PFN_VALID |
201 | extern int pfn_valid(unsigned long); | 201 | extern int pfn_valid(unsigned long); |
202 | #endif | 202 | #endif |
203 | 203 | ||
diff --git a/arch/arm/include/asm/prom.h b/arch/arm/include/asm/prom.h new file mode 100644 index 000000000000..11b8708fc4db --- /dev/null +++ b/arch/arm/include/asm/prom.h | |||
@@ -0,0 +1,37 @@ | |||
1 | /* | ||
2 | * arch/arm/include/asm/prom.h | ||
3 | * | ||
4 | * Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | */ | ||
11 | #ifndef __ASMARM_PROM_H | ||
12 | #define __ASMARM_PROM_H | ||
13 | |||
14 | #ifdef CONFIG_OF | ||
15 | |||
16 | #include <asm/setup.h> | ||
17 | #include <asm/irq.h> | ||
18 | |||
19 | static inline void irq_dispose_mapping(unsigned int virq) | ||
20 | { | ||
21 | return; | ||
22 | } | ||
23 | |||
24 | extern struct machine_desc *setup_machine_fdt(unsigned int dt_phys); | ||
25 | extern void arm_dt_memblock_reserve(void); | ||
26 | |||
27 | #else /* CONFIG_OF */ | ||
28 | |||
29 | static inline struct machine_desc *setup_machine_fdt(unsigned int dt_phys) | ||
30 | { | ||
31 | return NULL; | ||
32 | } | ||
33 | |||
34 | static inline void arm_dt_memblock_reserve(void) { } | ||
35 | |||
36 | #endif /* CONFIG_OF */ | ||
37 | #endif /* ASMARM_PROM_H */ | ||
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h index 95176af3df8c..ee2ad8ae07af 100644 --- a/arch/arm/include/asm/setup.h +++ b/arch/arm/include/asm/setup.h | |||
@@ -217,6 +217,10 @@ extern struct meminfo meminfo; | |||
217 | #define bank_phys_end(bank) ((bank)->start + (bank)->size) | 217 | #define bank_phys_end(bank) ((bank)->start + (bank)->size) |
218 | #define bank_phys_size(bank) (bank)->size | 218 | #define bank_phys_size(bank) (bank)->size |
219 | 219 | ||
220 | extern int arm_add_memory(phys_addr_t start, unsigned long size); | ||
221 | extern void early_print(const char *str, ...); | ||
222 | extern void dump_machine_table(void); | ||
223 | |||
220 | #endif /* __KERNEL__ */ | 224 | #endif /* __KERNEL__ */ |
221 | 225 | ||
222 | #endif | 226 | #endif |
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h index d2b514fd76f4..e42d96a45d3e 100644 --- a/arch/arm/include/asm/smp.h +++ b/arch/arm/include/asm/smp.h | |||
@@ -70,6 +70,7 @@ extern void platform_smp_prepare_cpus(unsigned int); | |||
70 | */ | 70 | */ |
71 | struct secondary_data { | 71 | struct secondary_data { |
72 | unsigned long pgdir; | 72 | unsigned long pgdir; |
73 | unsigned long swapper_pg_dir; | ||
73 | void *stack; | 74 | void *stack; |
74 | }; | 75 | }; |
75 | extern struct secondary_data secondary_data; | 76 | extern struct secondary_data secondary_data; |
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h index 0c5fc55ad800..2c04ed5efeb5 100644 --- a/arch/arm/include/asm/unistd.h +++ b/arch/arm/include/asm/unistd.h | |||
@@ -400,7 +400,8 @@ | |||
400 | #define __NR_open_by_handle_at (__NR_SYSCALL_BASE+371) | 400 | #define __NR_open_by_handle_at (__NR_SYSCALL_BASE+371) |
401 | #define __NR_clock_adjtime (__NR_SYSCALL_BASE+372) | 401 | #define __NR_clock_adjtime (__NR_SYSCALL_BASE+372) |
402 | #define __NR_syncfs (__NR_SYSCALL_BASE+373) | 402 | #define __NR_syncfs (__NR_SYSCALL_BASE+373) |
403 | #define __NR_setns (__NR_SYSCALL_BASE+374) | 403 | #define __NR_sendmmsg (__NR_SYSCALL_BASE+374) |
404 | #define __NR_setns (__NR_SYSCALL_BASE+375) | ||
404 | 405 | ||
405 | /* | 406 | /* |
406 | * The following SWIs are ARM private. | 407 | * The following SWIs are ARM private. |
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 8d95446150a3..a5b31af5c2b8 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile | |||
@@ -24,7 +24,7 @@ obj-$(CONFIG_OC_ETM) += etm.o | |||
24 | 24 | ||
25 | obj-$(CONFIG_ISA_DMA_API) += dma.o | 25 | obj-$(CONFIG_ISA_DMA_API) += dma.o |
26 | obj-$(CONFIG_ARCH_ACORN) += ecard.o | 26 | obj-$(CONFIG_ARCH_ACORN) += ecard.o |
27 | obj-$(CONFIG_FIQ) += fiq.o | 27 | obj-$(CONFIG_FIQ) += fiq.o fiqasm.o |
28 | obj-$(CONFIG_MODULES) += armksyms.o module.o | 28 | obj-$(CONFIG_MODULES) += armksyms.o module.o |
29 | obj-$(CONFIG_ARTHUR) += arthur.o | 29 | obj-$(CONFIG_ARTHUR) += arthur.o |
30 | obj-$(CONFIG_ISA_DMA) += dma-isa.o | 30 | obj-$(CONFIG_ISA_DMA) += dma-isa.o |
@@ -44,6 +44,7 @@ obj-$(CONFIG_ARM_THUMBEE) += thumbee.o | |||
44 | obj-$(CONFIG_KGDB) += kgdb.o | 44 | obj-$(CONFIG_KGDB) += kgdb.o |
45 | obj-$(CONFIG_ARM_UNWIND) += unwind.o | 45 | obj-$(CONFIG_ARM_UNWIND) += unwind.o |
46 | obj-$(CONFIG_HAVE_TCM) += tcm.o | 46 | obj-$(CONFIG_HAVE_TCM) += tcm.o |
47 | obj-$(CONFIG_OF) += devtree.o | ||
47 | obj-$(CONFIG_CRASH_DUMP) += crash_dump.o | 48 | obj-$(CONFIG_CRASH_DUMP) += crash_dump.o |
48 | obj-$(CONFIG_SWP_EMULATE) += swp_emulate.o | 49 | obj-$(CONFIG_SWP_EMULATE) += swp_emulate.o |
49 | CFLAGS_swp_emulate.o := -Wa,-march=armv7-a | 50 | CFLAGS_swp_emulate.o := -Wa,-march=armv7-a |
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S index a05f75928bea..80f7896cc016 100644 --- a/arch/arm/kernel/calls.S +++ b/arch/arm/kernel/calls.S | |||
@@ -383,7 +383,8 @@ | |||
383 | CALL(sys_open_by_handle_at) | 383 | CALL(sys_open_by_handle_at) |
384 | CALL(sys_clock_adjtime) | 384 | CALL(sys_clock_adjtime) |
385 | CALL(sys_syncfs) | 385 | CALL(sys_syncfs) |
386 | CALL(sys_setns) | 386 | CALL(sys_sendmmsg) |
387 | /* 375 */ CALL(sys_setns) | ||
387 | #ifndef syscalls_counted | 388 | #ifndef syscalls_counted |
388 | .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls | 389 | .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls |
389 | #define syscalls_counted | 390 | #define syscalls_counted |
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c new file mode 100644 index 000000000000..a701e4226a6c --- /dev/null +++ b/arch/arm/kernel/devtree.c | |||
@@ -0,0 +1,145 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/kernel/devtree.c | ||
3 | * | ||
4 | * Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/init.h> | ||
12 | #include <linux/module.h> | ||
13 | #include <linux/errno.h> | ||
14 | #include <linux/types.h> | ||
15 | #include <linux/bootmem.h> | ||
16 | #include <linux/memblock.h> | ||
17 | #include <linux/of.h> | ||
18 | #include <linux/of_fdt.h> | ||
19 | #include <linux/of_irq.h> | ||
20 | #include <linux/of_platform.h> | ||
21 | |||
22 | #include <asm/setup.h> | ||
23 | #include <asm/page.h> | ||
24 | #include <asm/mach/arch.h> | ||
25 | #include <asm/mach-types.h> | ||
26 | |||
27 | void __init early_init_dt_add_memory_arch(u64 base, u64 size) | ||
28 | { | ||
29 | arm_add_memory(base, size); | ||
30 | } | ||
31 | |||
32 | void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align) | ||
33 | { | ||
34 | return alloc_bootmem_align(size, align); | ||
35 | } | ||
36 | |||
37 | void __init arm_dt_memblock_reserve(void) | ||
38 | { | ||
39 | u64 *reserve_map, base, size; | ||
40 | |||
41 | if (!initial_boot_params) | ||
42 | return; | ||
43 | |||
44 | /* Reserve the dtb region */ | ||
45 | memblock_reserve(virt_to_phys(initial_boot_params), | ||
46 | be32_to_cpu(initial_boot_params->totalsize)); | ||
47 | |||
48 | /* | ||
49 | * Process the reserve map. This will probably overlap the initrd | ||
50 | * and dtb locations which are already reserved, but overlaping | ||
51 | * doesn't hurt anything | ||
52 | */ | ||
53 | reserve_map = ((void*)initial_boot_params) + | ||
54 | be32_to_cpu(initial_boot_params->off_mem_rsvmap); | ||
55 | while (1) { | ||
56 | base = be64_to_cpup(reserve_map++); | ||
57 | size = be64_to_cpup(reserve_map++); | ||
58 | if (!size) | ||
59 | break; | ||
60 | memblock_reserve(base, size); | ||
61 | } | ||
62 | } | ||
63 | |||
64 | /** | ||
65 | * setup_machine_fdt - Machine setup when an dtb was passed to the kernel | ||
66 | * @dt_phys: physical address of dt blob | ||
67 | * | ||
68 | * If a dtb was passed to the kernel in r2, then use it to choose the | ||
69 | * correct machine_desc and to setup the system. | ||
70 | */ | ||
71 | struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys) | ||
72 | { | ||
73 | struct boot_param_header *devtree; | ||
74 | struct machine_desc *mdesc, *mdesc_best = NULL; | ||
75 | unsigned int score, mdesc_score = ~1; | ||
76 | unsigned long dt_root; | ||
77 | const char *model; | ||
78 | |||
79 | devtree = phys_to_virt(dt_phys); | ||
80 | |||
81 | /* check device tree validity */ | ||
82 | if (be32_to_cpu(devtree->magic) != OF_DT_HEADER) | ||
83 | return NULL; | ||
84 | |||
85 | /* Search the mdescs for the 'best' compatible value match */ | ||
86 | initial_boot_params = devtree; | ||
87 | dt_root = of_get_flat_dt_root(); | ||
88 | for_each_machine_desc(mdesc) { | ||
89 | score = of_flat_dt_match(dt_root, mdesc->dt_compat); | ||
90 | if (score > 0 && score < mdesc_score) { | ||
91 | mdesc_best = mdesc; | ||
92 | mdesc_score = score; | ||
93 | } | ||
94 | } | ||
95 | if (!mdesc_best) { | ||
96 | const char *prop; | ||
97 | long size; | ||
98 | |||
99 | early_print("\nError: unrecognized/unsupported " | ||
100 | "device tree compatible list:\n[ "); | ||
101 | |||
102 | prop = of_get_flat_dt_prop(dt_root, "compatible", &size); | ||
103 | while (size > 0) { | ||
104 | early_print("'%s' ", prop); | ||
105 | size -= strlen(prop) + 1; | ||
106 | prop += strlen(prop) + 1; | ||
107 | } | ||
108 | early_print("]\n\n"); | ||
109 | |||
110 | dump_machine_table(); /* does not return */ | ||
111 | } | ||
112 | |||
113 | model = of_get_flat_dt_prop(dt_root, "model", NULL); | ||
114 | if (!model) | ||
115 | model = of_get_flat_dt_prop(dt_root, "compatible", NULL); | ||
116 | if (!model) | ||
117 | model = "<unknown>"; | ||
118 | pr_info("Machine: %s, model: %s\n", mdesc_best->name, model); | ||
119 | |||
120 | /* Retrieve various information from the /chosen node */ | ||
121 | of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line); | ||
122 | /* Initialize {size,address}-cells info */ | ||
123 | of_scan_flat_dt(early_init_dt_scan_root, NULL); | ||
124 | /* Setup memory, calling early_init_dt_add_memory_arch */ | ||
125 | of_scan_flat_dt(early_init_dt_scan_memory, NULL); | ||
126 | |||
127 | /* Change machine number to match the mdesc we're using */ | ||
128 | __machine_arch_type = mdesc_best->nr; | ||
129 | |||
130 | return mdesc_best; | ||
131 | } | ||
132 | |||
133 | /** | ||
134 | * irq_create_of_mapping - Hook to resolve OF irq specifier into a Linux irq# | ||
135 | * | ||
136 | * Currently the mapping mechanism is trivial; simple flat hwirq numbers are | ||
137 | * mapped 1:1 onto Linux irq numbers. Cascaded irq controllers are not | ||
138 | * supported. | ||
139 | */ | ||
140 | unsigned int irq_create_of_mapping(struct device_node *controller, | ||
141 | const u32 *intspec, unsigned int intsize) | ||
142 | { | ||
143 | return intspec[0]; | ||
144 | } | ||
145 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); | ||
diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c index e72dc34eea1c..4c164ece5891 100644 --- a/arch/arm/kernel/fiq.c +++ b/arch/arm/kernel/fiq.c | |||
@@ -89,47 +89,6 @@ void set_fiq_handler(void *start, unsigned int length) | |||
89 | flush_icache_range(0x1c, 0x1c + length); | 89 | flush_icache_range(0x1c, 0x1c + length); |
90 | } | 90 | } |
91 | 91 | ||
92 | /* | ||
93 | * Taking an interrupt in FIQ mode is death, so both these functions | ||
94 | * disable irqs for the duration. Note - these functions are almost | ||
95 | * entirely coded in assembly. | ||
96 | */ | ||
97 | void __naked set_fiq_regs(struct pt_regs *regs) | ||
98 | { | ||
99 | register unsigned long tmp; | ||
100 | asm volatile ( | ||
101 | "mov ip, sp\n\ | ||
102 | stmfd sp!, {fp, ip, lr, pc}\n\ | ||
103 | sub fp, ip, #4\n\ | ||
104 | mrs %0, cpsr\n\ | ||
105 | msr cpsr_c, %2 @ select FIQ mode\n\ | ||
106 | mov r0, r0\n\ | ||
107 | ldmia %1, {r8 - r14}\n\ | ||
108 | msr cpsr_c, %0 @ return to SVC mode\n\ | ||
109 | mov r0, r0\n\ | ||
110 | ldmfd sp, {fp, sp, pc}" | ||
111 | : "=&r" (tmp) | ||
112 | : "r" (®s->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE)); | ||
113 | } | ||
114 | |||
115 | void __naked get_fiq_regs(struct pt_regs *regs) | ||
116 | { | ||
117 | register unsigned long tmp; | ||
118 | asm volatile ( | ||
119 | "mov ip, sp\n\ | ||
120 | stmfd sp!, {fp, ip, lr, pc}\n\ | ||
121 | sub fp, ip, #4\n\ | ||
122 | mrs %0, cpsr\n\ | ||
123 | msr cpsr_c, %2 @ select FIQ mode\n\ | ||
124 | mov r0, r0\n\ | ||
125 | stmia %1, {r8 - r14}\n\ | ||
126 | msr cpsr_c, %0 @ return to SVC mode\n\ | ||
127 | mov r0, r0\n\ | ||
128 | ldmfd sp, {fp, sp, pc}" | ||
129 | : "=&r" (tmp) | ||
130 | : "r" (®s->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE)); | ||
131 | } | ||
132 | |||
133 | int claim_fiq(struct fiq_handler *f) | 92 | int claim_fiq(struct fiq_handler *f) |
134 | { | 93 | { |
135 | int ret = 0; | 94 | int ret = 0; |
@@ -174,8 +133,8 @@ void disable_fiq(int fiq) | |||
174 | } | 133 | } |
175 | 134 | ||
176 | EXPORT_SYMBOL(set_fiq_handler); | 135 | EXPORT_SYMBOL(set_fiq_handler); |
177 | EXPORT_SYMBOL(set_fiq_regs); | 136 | EXPORT_SYMBOL(__set_fiq_regs); /* defined in fiqasm.S */ |
178 | EXPORT_SYMBOL(get_fiq_regs); | 137 | EXPORT_SYMBOL(__get_fiq_regs); /* defined in fiqasm.S */ |
179 | EXPORT_SYMBOL(claim_fiq); | 138 | EXPORT_SYMBOL(claim_fiq); |
180 | EXPORT_SYMBOL(release_fiq); | 139 | EXPORT_SYMBOL(release_fiq); |
181 | EXPORT_SYMBOL(enable_fiq); | 140 | EXPORT_SYMBOL(enable_fiq); |
diff --git a/arch/arm/kernel/fiqasm.S b/arch/arm/kernel/fiqasm.S new file mode 100644 index 000000000000..207f9d652010 --- /dev/null +++ b/arch/arm/kernel/fiqasm.S | |||
@@ -0,0 +1,49 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/kernel/fiqasm.S | ||
3 | * | ||
4 | * Derived from code originally in linux/arch/arm/kernel/fiq.c: | ||
5 | * | ||
6 | * Copyright (C) 1998 Russell King | ||
7 | * Copyright (C) 1998, 1999 Phil Blundell | ||
8 | * Copyright (C) 2011, Linaro Limited | ||
9 | * | ||
10 | * FIQ support written by Philip Blundell <philb@gnu.org>, 1998. | ||
11 | * | ||
12 | * FIQ support re-written by Russell King to be more generic | ||
13 | * | ||
14 | * v7/Thumb-2 compatibility modifications by Linaro Limited, 2011. | ||
15 | */ | ||
16 | |||
17 | #include <linux/linkage.h> | ||
18 | #include <asm/assembler.h> | ||
19 | |||
20 | /* | ||
21 | * Taking an interrupt in FIQ mode is death, so both these functions | ||
22 | * disable irqs for the duration. | ||
23 | */ | ||
24 | |||
25 | ENTRY(__set_fiq_regs) | ||
26 | mov r2, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE | ||
27 | mrs r1, cpsr | ||
28 | msr cpsr_c, r2 @ select FIQ mode | ||
29 | mov r0, r0 @ avoid hazard prior to ARMv4 | ||
30 | ldmia r0!, {r8 - r12} | ||
31 | ldr sp, [r0], #4 | ||
32 | ldr lr, [r0] | ||
33 | msr cpsr_c, r1 @ return to SVC mode | ||
34 | mov r0, r0 @ avoid hazard prior to ARMv4 | ||
35 | mov pc, lr | ||
36 | ENDPROC(__set_fiq_regs) | ||
37 | |||
38 | ENTRY(__get_fiq_regs) | ||
39 | mov r2, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE | ||
40 | mrs r1, cpsr | ||
41 | msr cpsr_c, r2 @ select FIQ mode | ||
42 | mov r0, r0 @ avoid hazard prior to ARMv4 | ||
43 | stmia r0!, {r8 - r12} | ||
44 | str sp, [r0], #4 | ||
45 | str lr, [r0] | ||
46 | msr cpsr_c, r1 @ return to SVC mode | ||
47 | mov r0, r0 @ avoid hazard prior to ARMv4 | ||
48 | mov pc, lr | ||
49 | ENDPROC(__get_fiq_regs) | ||
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S index c84b57d27d07..854bd22380d3 100644 --- a/arch/arm/kernel/head-common.S +++ b/arch/arm/kernel/head-common.S | |||
@@ -15,6 +15,12 @@ | |||
15 | #define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2) | 15 | #define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2) |
16 | #define ATAG_CORE_SIZE_EMPTY ((2*4) >> 2) | 16 | #define ATAG_CORE_SIZE_EMPTY ((2*4) >> 2) |
17 | 17 | ||
18 | #ifdef CONFIG_CPU_BIG_ENDIAN | ||
19 | #define OF_DT_MAGIC 0xd00dfeed | ||
20 | #else | ||
21 | #define OF_DT_MAGIC 0xedfe0dd0 /* 0xd00dfeed in big-endian */ | ||
22 | #endif | ||
23 | |||
18 | /* | 24 | /* |
19 | * Exception handling. Something went wrong and we can't proceed. We | 25 | * Exception handling. Something went wrong and we can't proceed. We |
20 | * ought to tell the user, but since we don't have any guarantee that | 26 | * ought to tell the user, but since we don't have any guarantee that |
@@ -28,20 +34,26 @@ | |||
28 | 34 | ||
29 | /* Determine validity of the r2 atags pointer. The heuristic requires | 35 | /* Determine validity of the r2 atags pointer. The heuristic requires |
30 | * that the pointer be aligned, in the first 16k of physical RAM and | 36 | * that the pointer be aligned, in the first 16k of physical RAM and |
31 | * that the ATAG_CORE marker is first and present. Future revisions | 37 | * that the ATAG_CORE marker is first and present. If CONFIG_OF_FLATTREE |
38 | * is selected, then it will also accept a dtb pointer. Future revisions | ||
32 | * of this function may be more lenient with the physical address and | 39 | * of this function may be more lenient with the physical address and |
33 | * may also be able to move the ATAGS block if necessary. | 40 | * may also be able to move the ATAGS block if necessary. |
34 | * | 41 | * |
35 | * Returns: | 42 | * Returns: |
36 | * r2 either valid atags pointer, or zero | 43 | * r2 either valid atags pointer, valid dtb pointer, or zero |
37 | * r5, r6 corrupted | 44 | * r5, r6 corrupted |
38 | */ | 45 | */ |
39 | __vet_atags: | 46 | __vet_atags: |
40 | tst r2, #0x3 @ aligned? | 47 | tst r2, #0x3 @ aligned? |
41 | bne 1f | 48 | bne 1f |
42 | 49 | ||
43 | ldr r5, [r2, #0] @ is first tag ATAG_CORE? | 50 | ldr r5, [r2, #0] |
44 | cmp r5, #ATAG_CORE_SIZE | 51 | #ifdef CONFIG_OF_FLATTREE |
52 | ldr r6, =OF_DT_MAGIC @ is it a DTB? | ||
53 | cmp r5, r6 | ||
54 | beq 2f | ||
55 | #endif | ||
56 | cmp r5, #ATAG_CORE_SIZE @ is first tag ATAG_CORE? | ||
45 | cmpne r5, #ATAG_CORE_SIZE_EMPTY | 57 | cmpne r5, #ATAG_CORE_SIZE_EMPTY |
46 | bne 1f | 58 | bne 1f |
47 | ldr r5, [r2, #4] | 59 | ldr r5, [r2, #4] |
@@ -49,7 +61,7 @@ __vet_atags: | |||
49 | cmp r5, r6 | 61 | cmp r5, r6 |
50 | bne 1f | 62 | bne 1f |
51 | 63 | ||
52 | mov pc, lr @ atag pointer is ok | 64 | 2: mov pc, lr @ atag/dtb pointer is ok |
53 | 65 | ||
54 | 1: mov r2, #0 | 66 | 1: mov r2, #0 |
55 | mov pc, lr | 67 | mov pc, lr |
@@ -61,7 +73,7 @@ ENDPROC(__vet_atags) | |||
61 | * | 73 | * |
62 | * r0 = cp#15 control register | 74 | * r0 = cp#15 control register |
63 | * r1 = machine ID | 75 | * r1 = machine ID |
64 | * r2 = atags pointer | 76 | * r2 = atags/dtb pointer |
65 | * r9 = processor ID | 77 | * r9 = processor ID |
66 | */ | 78 | */ |
67 | __INIT | 79 | __INIT |
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index c9173cfbbc74..278c1b0ebb2e 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S | |||
@@ -59,7 +59,7 @@ | |||
59 | * | 59 | * |
60 | * This is normally called from the decompressor code. The requirements | 60 | * This is normally called from the decompressor code. The requirements |
61 | * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0, | 61 | * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0, |
62 | * r1 = machine nr, r2 = atags pointer. | 62 | * r1 = machine nr, r2 = atags or dtb pointer. |
63 | * | 63 | * |
64 | * This code is mostly position independent, so if you link the kernel at | 64 | * This code is mostly position independent, so if you link the kernel at |
65 | * 0xc0008000, you call this at __pa(0xc0008000). | 65 | * 0xc0008000, you call this at __pa(0xc0008000). |
@@ -91,7 +91,7 @@ ENTRY(stext) | |||
91 | #endif | 91 | #endif |
92 | 92 | ||
93 | /* | 93 | /* |
94 | * r1 = machine no, r2 = atags, | 94 | * r1 = machine no, r2 = atags or dtb, |
95 | * r8 = phys_offset, r9 = cpuid, r10 = procinfo | 95 | * r8 = phys_offset, r9 = cpuid, r10 = procinfo |
96 | */ | 96 | */ |
97 | bl __vet_atags | 97 | bl __vet_atags |
@@ -113,6 +113,7 @@ ENTRY(stext) | |||
113 | ldr r13, =__mmap_switched @ address to jump to after | 113 | ldr r13, =__mmap_switched @ address to jump to after |
114 | @ mmu has been enabled | 114 | @ mmu has been enabled |
115 | adr lr, BSYM(1f) @ return (PIC) address | 115 | adr lr, BSYM(1f) @ return (PIC) address |
116 | mov r8, r4 @ set TTBR1 to swapper_pg_dir | ||
116 | ARM( add pc, r10, #PROCINFO_INITFUNC ) | 117 | ARM( add pc, r10, #PROCINFO_INITFUNC ) |
117 | THUMB( add r12, r10, #PROCINFO_INITFUNC ) | 118 | THUMB( add r12, r10, #PROCINFO_INITFUNC ) |
118 | THUMB( mov pc, r12 ) | 119 | THUMB( mov pc, r12 ) |
@@ -302,8 +303,10 @@ ENTRY(secondary_startup) | |||
302 | */ | 303 | */ |
303 | adr r4, __secondary_data | 304 | adr r4, __secondary_data |
304 | ldmia r4, {r5, r7, r12} @ address to jump to after | 305 | ldmia r4, {r5, r7, r12} @ address to jump to after |
305 | sub r4, r4, r5 @ mmu has been enabled | 306 | sub lr, r4, r5 @ mmu has been enabled |
306 | ldr r4, [r7, r4] @ get secondary_data.pgdir | 307 | ldr r4, [r7, lr] @ get secondary_data.pgdir |
308 | add r7, r7, #4 | ||
309 | ldr r8, [r7, lr] @ get secondary_data.swapper_pg_dir | ||
307 | adr lr, BSYM(__enable_mmu) @ return address | 310 | adr lr, BSYM(__enable_mmu) @ return address |
308 | mov r13, r12 @ __secondary_switched address | 311 | mov r13, r12 @ __secondary_switched address |
309 | ARM( add pc, r10, #PROCINFO_INITFUNC ) @ initialise processor | 312 | ARM( add pc, r10, #PROCINFO_INITFUNC ) @ initialise processor |
@@ -339,7 +342,7 @@ __secondary_data: | |||
339 | * | 342 | * |
340 | * r0 = cp#15 control register | 343 | * r0 = cp#15 control register |
341 | * r1 = machine ID | 344 | * r1 = machine ID |
342 | * r2 = atags pointer | 345 | * r2 = atags or dtb pointer |
343 | * r4 = page table pointer | 346 | * r4 = page table pointer |
344 | * r9 = processor ID | 347 | * r9 = processor ID |
345 | * r13 = *virtual* address to jump to upon completion | 348 | * r13 = *virtual* address to jump to upon completion |
@@ -376,7 +379,7 @@ ENDPROC(__enable_mmu) | |||
376 | * | 379 | * |
377 | * r0 = cp#15 control register | 380 | * r0 = cp#15 control register |
378 | * r1 = machine ID | 381 | * r1 = machine ID |
379 | * r2 = atags pointer | 382 | * r2 = atags or dtb pointer |
380 | * r9 = processor ID | 383 | * r9 = processor ID |
381 | * r13 = *virtual* address to jump to upon completion | 384 | * r13 = *virtual* address to jump to upon completion |
382 | * | 385 | * |
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 6dce209a623b..ed11fb08b05a 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/screen_info.h> | 20 | #include <linux/screen_info.h> |
21 | #include <linux/init.h> | 21 | #include <linux/init.h> |
22 | #include <linux/kexec.h> | 22 | #include <linux/kexec.h> |
23 | #include <linux/of_fdt.h> | ||
23 | #include <linux/crash_dump.h> | 24 | #include <linux/crash_dump.h> |
24 | #include <linux/root_dev.h> | 25 | #include <linux/root_dev.h> |
25 | #include <linux/cpu.h> | 26 | #include <linux/cpu.h> |
@@ -42,6 +43,7 @@ | |||
42 | #include <asm/cachetype.h> | 43 | #include <asm/cachetype.h> |
43 | #include <asm/tlbflush.h> | 44 | #include <asm/tlbflush.h> |
44 | 45 | ||
46 | #include <asm/prom.h> | ||
45 | #include <asm/mach/arch.h> | 47 | #include <asm/mach/arch.h> |
46 | #include <asm/mach/irq.h> | 48 | #include <asm/mach/irq.h> |
47 | #include <asm/mach/time.h> | 49 | #include <asm/mach/time.h> |
@@ -309,7 +311,7 @@ static void __init cacheid_init(void) | |||
309 | */ | 311 | */ |
310 | extern struct proc_info_list *lookup_processor_type(unsigned int); | 312 | extern struct proc_info_list *lookup_processor_type(unsigned int); |
311 | 313 | ||
312 | static void __init early_print(const char *str, ...) | 314 | void __init early_print(const char *str, ...) |
313 | { | 315 | { |
314 | extern void printascii(const char *); | 316 | extern void printascii(const char *); |
315 | char buf[256]; | 317 | char buf[256]; |
@@ -439,25 +441,12 @@ void cpu_init(void) | |||
439 | : "r14"); | 441 | : "r14"); |
440 | } | 442 | } |
441 | 443 | ||
442 | static struct machine_desc * __init setup_machine(unsigned int nr) | 444 | void __init dump_machine_table(void) |
443 | { | 445 | { |
444 | extern struct machine_desc __arch_info_begin[], __arch_info_end[]; | ||
445 | struct machine_desc *p; | 446 | struct machine_desc *p; |
446 | 447 | ||
447 | /* | 448 | early_print("Available machine support:\n\nID (hex)\tNAME\n"); |
448 | * locate machine in the list of supported machines. | 449 | for_each_machine_desc(p) |
449 | */ | ||
450 | for (p = __arch_info_begin; p < __arch_info_end; p++) | ||
451 | if (nr == p->nr) { | ||
452 | printk("Machine: %s\n", p->name); | ||
453 | return p; | ||
454 | } | ||
455 | |||
456 | early_print("\n" | ||
457 | "Error: unrecognized/unsupported machine ID (r1 = 0x%08x).\n\n" | ||
458 | "Available machine support:\n\nID (hex)\tNAME\n", nr); | ||
459 | |||
460 | for (p = __arch_info_begin; p < __arch_info_end; p++) | ||
461 | early_print("%08x\t%s\n", p->nr, p->name); | 450 | early_print("%08x\t%s\n", p->nr, p->name); |
462 | 451 | ||
463 | early_print("\nPlease check your kernel config and/or bootloader.\n"); | 452 | early_print("\nPlease check your kernel config and/or bootloader.\n"); |
@@ -466,7 +455,7 @@ static struct machine_desc * __init setup_machine(unsigned int nr) | |||
466 | /* can't use cpu_relax() here as it may require MMU setup */; | 455 | /* can't use cpu_relax() here as it may require MMU setup */; |
467 | } | 456 | } |
468 | 457 | ||
469 | static int __init arm_add_memory(phys_addr_t start, unsigned long size) | 458 | int __init arm_add_memory(phys_addr_t start, unsigned long size) |
470 | { | 459 | { |
471 | struct membank *bank = &meminfo.bank[meminfo.nr_banks]; | 460 | struct membank *bank = &meminfo.bank[meminfo.nr_banks]; |
472 | 461 | ||
@@ -801,23 +790,29 @@ static void __init squash_mem_tags(struct tag *tag) | |||
801 | tag->hdr.tag = ATAG_NONE; | 790 | tag->hdr.tag = ATAG_NONE; |
802 | } | 791 | } |
803 | 792 | ||
804 | void __init setup_arch(char **cmdline_p) | 793 | static struct machine_desc * __init setup_machine_tags(unsigned int nr) |
805 | { | 794 | { |
806 | struct tag *tags = (struct tag *)&init_tags; | 795 | struct tag *tags = (struct tag *)&init_tags; |
807 | struct machine_desc *mdesc; | 796 | struct machine_desc *mdesc = NULL, *p; |
808 | char *from = default_command_line; | 797 | char *from = default_command_line; |
809 | 798 | ||
810 | init_tags.mem.start = PHYS_OFFSET; | 799 | init_tags.mem.start = PHYS_OFFSET; |
811 | 800 | ||
812 | unwind_init(); | 801 | /* |
813 | 802 | * locate machine in the list of supported machines. | |
814 | setup_processor(); | 803 | */ |
815 | mdesc = setup_machine(machine_arch_type); | 804 | for_each_machine_desc(p) |
816 | machine_desc = mdesc; | 805 | if (nr == p->nr) { |
817 | machine_name = mdesc->name; | 806 | printk("Machine: %s\n", p->name); |
807 | mdesc = p; | ||
808 | break; | ||
809 | } | ||
818 | 810 | ||
819 | if (mdesc->soft_reboot) | 811 | if (!mdesc) { |
820 | reboot_setup("s"); | 812 | early_print("\nError: unrecognized/unsupported machine ID" |
813 | " (r1 = 0x%08x).\n\n", nr); | ||
814 | dump_machine_table(); /* does not return */ | ||
815 | } | ||
821 | 816 | ||
822 | if (__atags_pointer) | 817 | if (__atags_pointer) |
823 | tags = phys_to_virt(__atags_pointer); | 818 | tags = phys_to_virt(__atags_pointer); |
@@ -849,8 +844,17 @@ void __init setup_arch(char **cmdline_p) | |||
849 | if (tags->hdr.tag != ATAG_CORE) | 844 | if (tags->hdr.tag != ATAG_CORE) |
850 | convert_to_tag_list(tags); | 845 | convert_to_tag_list(tags); |
851 | #endif | 846 | #endif |
852 | if (tags->hdr.tag != ATAG_CORE) | 847 | |
848 | if (tags->hdr.tag != ATAG_CORE) { | ||
849 | #if defined(CONFIG_OF) | ||
850 | /* | ||
851 | * If CONFIG_OF is set, then assume this is a reasonably | ||
852 | * modern system that should pass boot parameters | ||
853 | */ | ||
854 | early_print("Warning: Neither atags nor dtb found\n"); | ||
855 | #endif | ||
853 | tags = (struct tag *)&init_tags; | 856 | tags = (struct tag *)&init_tags; |
857 | } | ||
854 | 858 | ||
855 | if (mdesc->fixup) | 859 | if (mdesc->fixup) |
856 | mdesc->fixup(mdesc, tags, &from, &meminfo); | 860 | mdesc->fixup(mdesc, tags, &from, &meminfo); |
@@ -862,14 +866,34 @@ void __init setup_arch(char **cmdline_p) | |||
862 | parse_tags(tags); | 866 | parse_tags(tags); |
863 | } | 867 | } |
864 | 868 | ||
869 | /* parse_early_param needs a boot_command_line */ | ||
870 | strlcpy(boot_command_line, from, COMMAND_LINE_SIZE); | ||
871 | |||
872 | return mdesc; | ||
873 | } | ||
874 | |||
875 | |||
876 | void __init setup_arch(char **cmdline_p) | ||
877 | { | ||
878 | struct machine_desc *mdesc; | ||
879 | |||
880 | unwind_init(); | ||
881 | |||
882 | setup_processor(); | ||
883 | mdesc = setup_machine_fdt(__atags_pointer); | ||
884 | if (!mdesc) | ||
885 | mdesc = setup_machine_tags(machine_arch_type); | ||
886 | machine_desc = mdesc; | ||
887 | machine_name = mdesc->name; | ||
888 | |||
889 | if (mdesc->soft_reboot) | ||
890 | reboot_setup("s"); | ||
891 | |||
865 | init_mm.start_code = (unsigned long) _text; | 892 | init_mm.start_code = (unsigned long) _text; |
866 | init_mm.end_code = (unsigned long) _etext; | 893 | init_mm.end_code = (unsigned long) _etext; |
867 | init_mm.end_data = (unsigned long) _edata; | 894 | init_mm.end_data = (unsigned long) _edata; |
868 | init_mm.brk = (unsigned long) _end; | 895 | init_mm.brk = (unsigned long) _end; |
869 | 896 | ||
870 | /* parse_early_param needs a boot_command_line */ | ||
871 | strlcpy(boot_command_line, from, COMMAND_LINE_SIZE); | ||
872 | |||
873 | /* populate cmd_line too for later use, preserving boot_command_line */ | 897 | /* populate cmd_line too for later use, preserving boot_command_line */ |
874 | strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE); | 898 | strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE); |
875 | *cmdline_p = cmd_line; | 899 | *cmdline_p = cmd_line; |
@@ -881,6 +905,8 @@ void __init setup_arch(char **cmdline_p) | |||
881 | paging_init(mdesc); | 905 | paging_init(mdesc); |
882 | request_standard_resources(mdesc); | 906 | request_standard_resources(mdesc); |
883 | 907 | ||
908 | unflatten_device_tree(); | ||
909 | |||
884 | #ifdef CONFIG_SMP | 910 | #ifdef CONFIG_SMP |
885 | if (is_smp()) | 911 | if (is_smp()) |
886 | smp_init_cpus(); | 912 | smp_init_cpus(); |
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index d439a8f4c078..344e52b16c8c 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c | |||
@@ -105,6 +105,7 @@ int __cpuinit __cpu_up(unsigned int cpu) | |||
105 | */ | 105 | */ |
106 | secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; | 106 | secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; |
107 | secondary_data.pgdir = virt_to_phys(pgd); | 107 | secondary_data.pgdir = virt_to_phys(pgd); |
108 | secondary_data.swapper_pg_dir = virt_to_phys(swapper_pg_dir); | ||
108 | __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data)); | 109 | __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data)); |
109 | outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1)); | 110 | outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1)); |
110 | 111 | ||
diff --git a/arch/arm/lib/lib1funcs.S b/arch/arm/lib/lib1funcs.S index 6dc06487f3c3..c562f649734c 100644 --- a/arch/arm/lib/lib1funcs.S +++ b/arch/arm/lib/lib1funcs.S | |||
@@ -35,7 +35,7 @@ Boston, MA 02111-1307, USA. */ | |||
35 | 35 | ||
36 | #include <linux/linkage.h> | 36 | #include <linux/linkage.h> |
37 | #include <asm/assembler.h> | 37 | #include <asm/assembler.h> |
38 | 38 | #include <asm/unwind.h> | |
39 | 39 | ||
40 | .macro ARM_DIV_BODY dividend, divisor, result, curbit | 40 | .macro ARM_DIV_BODY dividend, divisor, result, curbit |
41 | 41 | ||
@@ -207,6 +207,7 @@ Boston, MA 02111-1307, USA. */ | |||
207 | 207 | ||
208 | ENTRY(__udivsi3) | 208 | ENTRY(__udivsi3) |
209 | ENTRY(__aeabi_uidiv) | 209 | ENTRY(__aeabi_uidiv) |
210 | UNWIND(.fnstart) | ||
210 | 211 | ||
211 | subs r2, r1, #1 | 212 | subs r2, r1, #1 |
212 | moveq pc, lr | 213 | moveq pc, lr |
@@ -230,10 +231,12 @@ ENTRY(__aeabi_uidiv) | |||
230 | mov r0, r0, lsr r2 | 231 | mov r0, r0, lsr r2 |
231 | mov pc, lr | 232 | mov pc, lr |
232 | 233 | ||
234 | UNWIND(.fnend) | ||
233 | ENDPROC(__udivsi3) | 235 | ENDPROC(__udivsi3) |
234 | ENDPROC(__aeabi_uidiv) | 236 | ENDPROC(__aeabi_uidiv) |
235 | 237 | ||
236 | ENTRY(__umodsi3) | 238 | ENTRY(__umodsi3) |
239 | UNWIND(.fnstart) | ||
237 | 240 | ||
238 | subs r2, r1, #1 @ compare divisor with 1 | 241 | subs r2, r1, #1 @ compare divisor with 1 |
239 | bcc Ldiv0 | 242 | bcc Ldiv0 |
@@ -247,10 +250,12 @@ ENTRY(__umodsi3) | |||
247 | 250 | ||
248 | mov pc, lr | 251 | mov pc, lr |
249 | 252 | ||
253 | UNWIND(.fnend) | ||
250 | ENDPROC(__umodsi3) | 254 | ENDPROC(__umodsi3) |
251 | 255 | ||
252 | ENTRY(__divsi3) | 256 | ENTRY(__divsi3) |
253 | ENTRY(__aeabi_idiv) | 257 | ENTRY(__aeabi_idiv) |
258 | UNWIND(.fnstart) | ||
254 | 259 | ||
255 | cmp r1, #0 | 260 | cmp r1, #0 |
256 | eor ip, r0, r1 @ save the sign of the result. | 261 | eor ip, r0, r1 @ save the sign of the result. |
@@ -287,10 +292,12 @@ ENTRY(__aeabi_idiv) | |||
287 | rsbmi r0, r0, #0 | 292 | rsbmi r0, r0, #0 |
288 | mov pc, lr | 293 | mov pc, lr |
289 | 294 | ||
295 | UNWIND(.fnend) | ||
290 | ENDPROC(__divsi3) | 296 | ENDPROC(__divsi3) |
291 | ENDPROC(__aeabi_idiv) | 297 | ENDPROC(__aeabi_idiv) |
292 | 298 | ||
293 | ENTRY(__modsi3) | 299 | ENTRY(__modsi3) |
300 | UNWIND(.fnstart) | ||
294 | 301 | ||
295 | cmp r1, #0 | 302 | cmp r1, #0 |
296 | beq Ldiv0 | 303 | beq Ldiv0 |
@@ -310,11 +317,14 @@ ENTRY(__modsi3) | |||
310 | rsbmi r0, r0, #0 | 317 | rsbmi r0, r0, #0 |
311 | mov pc, lr | 318 | mov pc, lr |
312 | 319 | ||
320 | UNWIND(.fnend) | ||
313 | ENDPROC(__modsi3) | 321 | ENDPROC(__modsi3) |
314 | 322 | ||
315 | #ifdef CONFIG_AEABI | 323 | #ifdef CONFIG_AEABI |
316 | 324 | ||
317 | ENTRY(__aeabi_uidivmod) | 325 | ENTRY(__aeabi_uidivmod) |
326 | UNWIND(.fnstart) | ||
327 | UNWIND(.save {r0, r1, ip, lr} ) | ||
318 | 328 | ||
319 | stmfd sp!, {r0, r1, ip, lr} | 329 | stmfd sp!, {r0, r1, ip, lr} |
320 | bl __aeabi_uidiv | 330 | bl __aeabi_uidiv |
@@ -323,10 +333,12 @@ ENTRY(__aeabi_uidivmod) | |||
323 | sub r1, r1, r3 | 333 | sub r1, r1, r3 |
324 | mov pc, lr | 334 | mov pc, lr |
325 | 335 | ||
336 | UNWIND(.fnend) | ||
326 | ENDPROC(__aeabi_uidivmod) | 337 | ENDPROC(__aeabi_uidivmod) |
327 | 338 | ||
328 | ENTRY(__aeabi_idivmod) | 339 | ENTRY(__aeabi_idivmod) |
329 | 340 | UNWIND(.fnstart) | |
341 | UNWIND(.save {r0, r1, ip, lr} ) | ||
330 | stmfd sp!, {r0, r1, ip, lr} | 342 | stmfd sp!, {r0, r1, ip, lr} |
331 | bl __aeabi_idiv | 343 | bl __aeabi_idiv |
332 | ldmfd sp!, {r1, r2, ip, lr} | 344 | ldmfd sp!, {r1, r2, ip, lr} |
@@ -334,15 +346,18 @@ ENTRY(__aeabi_idivmod) | |||
334 | sub r1, r1, r3 | 346 | sub r1, r1, r3 |
335 | mov pc, lr | 347 | mov pc, lr |
336 | 348 | ||
349 | UNWIND(.fnend) | ||
337 | ENDPROC(__aeabi_idivmod) | 350 | ENDPROC(__aeabi_idivmod) |
338 | 351 | ||
339 | #endif | 352 | #endif |
340 | 353 | ||
341 | Ldiv0: | 354 | Ldiv0: |
342 | 355 | UNWIND(.fnstart) | |
356 | UNWIND(.pad #4) | ||
357 | UNWIND(.save {lr}) | ||
343 | str lr, [sp, #-8]! | 358 | str lr, [sp, #-8]! |
344 | bl __div0 | 359 | bl __div0 |
345 | mov r0, #0 @ About as wrong as it could be. | 360 | mov r0, #0 @ About as wrong as it could be. |
346 | ldr pc, [sp], #8 | 361 | ldr pc, [sp], #8 |
347 | 362 | UNWIND(.fnend) | |
348 | 363 | ENDPROC(Ldiv0) | |
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 2d299bf5d72f..22484670e7ba 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig | |||
@@ -3,9 +3,6 @@ if ARCH_AT91 | |||
3 | config HAVE_AT91_DATAFLASH_CARD | 3 | config HAVE_AT91_DATAFLASH_CARD |
4 | bool | 4 | bool |
5 | 5 | ||
6 | config HAVE_NAND_ATMEL_BUSWIDTH_16 | ||
7 | bool | ||
8 | |||
9 | config HAVE_AT91_USART3 | 6 | config HAVE_AT91_USART3 |
10 | bool | 7 | bool |
11 | 8 | ||
@@ -85,11 +82,6 @@ config ARCH_AT91CAP9 | |||
85 | select HAVE_FB_ATMEL | 82 | select HAVE_FB_ATMEL |
86 | select HAVE_NET_MACB | 83 | select HAVE_NET_MACB |
87 | 84 | ||
88 | config ARCH_AT572D940HF | ||
89 | bool "AT572D940HF" | ||
90 | select CPU_ARM926T | ||
91 | select GENERIC_CLOCKEVENTS | ||
92 | |||
93 | config ARCH_AT91X40 | 85 | config ARCH_AT91X40 |
94 | bool "AT91x40" | 86 | bool "AT91x40" |
95 | select ARCH_USES_GETTIMEOFFSET | 87 | select ARCH_USES_GETTIMEOFFSET |
@@ -209,7 +201,6 @@ comment "AT91SAM9260 / AT91SAM9XE Board Type" | |||
209 | config MACH_AT91SAM9260EK | 201 | config MACH_AT91SAM9260EK |
210 | bool "Atmel AT91SAM9260-EK / AT91SAM9XE Evaluation Kit" | 202 | bool "Atmel AT91SAM9260-EK / AT91SAM9XE Evaluation Kit" |
211 | select HAVE_AT91_DATAFLASH_CARD | 203 | select HAVE_AT91_DATAFLASH_CARD |
212 | select HAVE_NAND_ATMEL_BUSWIDTH_16 | ||
213 | help | 204 | help |
214 | Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit | 205 | Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit |
215 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933> | 206 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933> |
@@ -270,7 +261,6 @@ comment "AT91SAM9261 Board Type" | |||
270 | config MACH_AT91SAM9261EK | 261 | config MACH_AT91SAM9261EK |
271 | bool "Atmel AT91SAM9261-EK Evaluation Kit" | 262 | bool "Atmel AT91SAM9261-EK Evaluation Kit" |
272 | select HAVE_AT91_DATAFLASH_CARD | 263 | select HAVE_AT91_DATAFLASH_CARD |
273 | select HAVE_NAND_ATMEL_BUSWIDTH_16 | ||
274 | help | 264 | help |
275 | Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit. | 265 | Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit. |
276 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820> | 266 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820> |
@@ -286,7 +276,6 @@ comment "AT91SAM9G10 Board Type" | |||
286 | config MACH_AT91SAM9G10EK | 276 | config MACH_AT91SAM9G10EK |
287 | bool "Atmel AT91SAM9G10-EK Evaluation Kit" | 277 | bool "Atmel AT91SAM9G10-EK Evaluation Kit" |
288 | select HAVE_AT91_DATAFLASH_CARD | 278 | select HAVE_AT91_DATAFLASH_CARD |
289 | select HAVE_NAND_ATMEL_BUSWIDTH_16 | ||
290 | help | 279 | help |
291 | Select this if you are using Atmel's AT91SAM9G10-EK Evaluation Kit. | 280 | Select this if you are using Atmel's AT91SAM9G10-EK Evaluation Kit. |
292 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4588> | 281 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4588> |
@@ -302,7 +291,6 @@ comment "AT91SAM9263 Board Type" | |||
302 | config MACH_AT91SAM9263EK | 291 | config MACH_AT91SAM9263EK |
303 | bool "Atmel AT91SAM9263-EK Evaluation Kit" | 292 | bool "Atmel AT91SAM9263-EK Evaluation Kit" |
304 | select HAVE_AT91_DATAFLASH_CARD | 293 | select HAVE_AT91_DATAFLASH_CARD |
305 | select HAVE_NAND_ATMEL_BUSWIDTH_16 | ||
306 | help | 294 | help |
307 | Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit. | 295 | Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit. |
308 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057> | 296 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057> |
@@ -343,7 +331,6 @@ comment "AT91SAM9G20 Board Type" | |||
343 | config MACH_AT91SAM9G20EK | 331 | config MACH_AT91SAM9G20EK |
344 | bool "Atmel AT91SAM9G20-EK Evaluation Kit" | 332 | bool "Atmel AT91SAM9G20-EK Evaluation Kit" |
345 | select HAVE_AT91_DATAFLASH_CARD | 333 | select HAVE_AT91_DATAFLASH_CARD |
346 | select HAVE_NAND_ATMEL_BUSWIDTH_16 | ||
347 | help | 334 | help |
348 | Select this if you are using Atmel's AT91SAM9G20-EK Evaluation Kit | 335 | Select this if you are using Atmel's AT91SAM9G20-EK Evaluation Kit |
349 | that embeds only one SD/MMC slot. | 336 | that embeds only one SD/MMC slot. |
@@ -351,7 +338,6 @@ config MACH_AT91SAM9G20EK | |||
351 | config MACH_AT91SAM9G20EK_2MMC | 338 | config MACH_AT91SAM9G20EK_2MMC |
352 | depends on MACH_AT91SAM9G20EK | 339 | depends on MACH_AT91SAM9G20EK |
353 | bool "Atmel AT91SAM9G20-EK Evaluation Kit with 2 SD/MMC Slots" | 340 | bool "Atmel AT91SAM9G20-EK Evaluation Kit with 2 SD/MMC Slots" |
354 | select HAVE_NAND_ATMEL_BUSWIDTH_16 | ||
355 | help | 341 | help |
356 | Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit | 342 | Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit |
357 | with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and | 343 | with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and |
@@ -416,7 +402,6 @@ comment "AT91SAM9G45 Board Type" | |||
416 | 402 | ||
417 | config MACH_AT91SAM9M10G45EK | 403 | config MACH_AT91SAM9M10G45EK |
418 | bool "Atmel AT91SAM9M10G45-EK Evaluation Kits" | 404 | bool "Atmel AT91SAM9M10G45-EK Evaluation Kits" |
419 | select HAVE_NAND_ATMEL_BUSWIDTH_16 | ||
420 | help | 405 | help |
421 | Select this if you are using Atmel's AT91SAM9G45-EKES Evaluation Kit. | 406 | Select this if you are using Atmel's AT91SAM9G45-EKES Evaluation Kit. |
422 | "ES" at the end of the name means that this board is an | 407 | "ES" at the end of the name means that this board is an |
@@ -433,7 +418,6 @@ comment "AT91CAP9 Board Type" | |||
433 | config MACH_AT91CAP9ADK | 418 | config MACH_AT91CAP9ADK |
434 | bool "Atmel AT91CAP9A-DK Evaluation Kit" | 419 | bool "Atmel AT91CAP9A-DK Evaluation Kit" |
435 | select HAVE_AT91_DATAFLASH_CARD | 420 | select HAVE_AT91_DATAFLASH_CARD |
436 | select HAVE_NAND_ATMEL_BUSWIDTH_16 | ||
437 | help | 421 | help |
438 | Select this if you are using Atmel's AT91CAP9A-DK Evaluation Kit. | 422 | Select this if you are using Atmel's AT91CAP9A-DK Evaluation Kit. |
439 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4138> | 423 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4138> |
@@ -442,23 +426,6 @@ endif | |||
442 | 426 | ||
443 | # ---------------------------------------------------------- | 427 | # ---------------------------------------------------------- |
444 | 428 | ||
445 | if ARCH_AT572D940HF | ||
446 | |||
447 | comment "AT572D940HF Board Type" | ||
448 | |||
449 | config MACH_AT572D940HFEB | ||
450 | bool "AT572D940HF-EK" | ||
451 | depends on ARCH_AT572D940HF | ||
452 | select HAVE_AT91_DATAFLASH_CARD | ||
453 | select HAVE_NAND_ATMEL_BUSWIDTH_16 | ||
454 | help | ||
455 | Select this if you are using Atmel's AT572D940HF-EK evaluation kit. | ||
456 | <http://www.atmel.com/products/diopsis/default.asp> | ||
457 | |||
458 | endif | ||
459 | |||
460 | # ---------------------------------------------------------- | ||
461 | |||
462 | if ARCH_AT91X40 | 429 | if ARCH_AT91X40 |
463 | 430 | ||
464 | comment "AT91X40 Board Type" | 431 | comment "AT91X40 Board Type" |
@@ -483,13 +450,6 @@ config MTD_AT91_DATAFLASH_CARD | |||
483 | help | 450 | help |
484 | Enable support for the DataFlash card. | 451 | Enable support for the DataFlash card. |
485 | 452 | ||
486 | config MTD_NAND_ATMEL_BUSWIDTH_16 | ||
487 | bool "Enable 16-bit data bus interface to NAND flash" | ||
488 | depends on HAVE_NAND_ATMEL_BUSWIDTH_16 | ||
489 | help | ||
490 | On AT91SAM926x boards both types of NAND flash can be present | ||
491 | (8 and 16 bit data bus width). | ||
492 | |||
493 | # ---------------------------------------------------------- | 453 | # ---------------------------------------------------------- |
494 | 454 | ||
495 | comment "AT91 Feature Selections" | 455 | comment "AT91 Feature Selections" |
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index a83835e0c185..96966231920c 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile | |||
@@ -19,7 +19,6 @@ obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devi | |||
19 | obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o | 19 | obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o |
20 | obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o | 20 | obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o |
21 | obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o | 21 | obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o |
22 | obj-$(CONFIG_ARCH_AT572D940HF) += at572d940hf.o at91sam926x_time.o at572d940hf_devices.o sam9_smc.o | ||
23 | obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o | 22 | obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o |
24 | 23 | ||
25 | # AT91RM9200 board-specific support | 24 | # AT91RM9200 board-specific support |
@@ -78,9 +77,6 @@ obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o | |||
78 | # AT91CAP9 board-specific support | 77 | # AT91CAP9 board-specific support |
79 | obj-$(CONFIG_MACH_AT91CAP9ADK) += board-cap9adk.o | 78 | obj-$(CONFIG_MACH_AT91CAP9ADK) += board-cap9adk.o |
80 | 79 | ||
81 | # AT572D940HF board-specific support | ||
82 | obj-$(CONFIG_MACH_AT572D940HFEB) += board-at572d940hf_ek.o | ||
83 | |||
84 | # AT91X40 board-specific support | 80 | # AT91X40 board-specific support |
85 | obj-$(CONFIG_MACH_AT91EB01) += board-eb01.o | 81 | obj-$(CONFIG_MACH_AT91EB01) += board-eb01.o |
86 | 82 | ||
diff --git a/arch/arm/mach-at91/at572d940hf.c b/arch/arm/mach-at91/at572d940hf.c deleted file mode 100644 index a6b9c68c003a..000000000000 --- a/arch/arm/mach-at91/at572d940hf.c +++ /dev/null | |||
@@ -1,377 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-at91/at572d940hf.c | ||
3 | * | ||
4 | * Antonio R. Costa <costa.antonior@gmail.com> | ||
5 | * Copyright (C) 2008 Atmel | ||
6 | * | ||
7 | * Copyright (C) 2005 SAN People | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
22 | * | ||
23 | */ | ||
24 | |||
25 | #include <linux/module.h> | ||
26 | |||
27 | #include <asm/mach/irq.h> | ||
28 | #include <asm/mach/arch.h> | ||
29 | #include <asm/mach/map.h> | ||
30 | #include <mach/at572d940hf.h> | ||
31 | #include <mach/at91_pmc.h> | ||
32 | #include <mach/at91_rstc.h> | ||
33 | |||
34 | #include "generic.h" | ||
35 | #include "clock.h" | ||
36 | |||
37 | static struct map_desc at572d940hf_io_desc[] __initdata = { | ||
38 | { | ||
39 | .virtual = AT91_VA_BASE_SYS, | ||
40 | .pfn = __phys_to_pfn(AT91_BASE_SYS), | ||
41 | .length = SZ_16K, | ||
42 | .type = MT_DEVICE, | ||
43 | }, { | ||
44 | .virtual = AT91_IO_VIRT_BASE - AT572D940HF_SRAM_SIZE, | ||
45 | .pfn = __phys_to_pfn(AT572D940HF_SRAM_BASE), | ||
46 | .length = AT572D940HF_SRAM_SIZE, | ||
47 | .type = MT_DEVICE, | ||
48 | }, | ||
49 | }; | ||
50 | |||
51 | /* -------------------------------------------------------------------- | ||
52 | * Clocks | ||
53 | * -------------------------------------------------------------------- */ | ||
54 | |||
55 | /* | ||
56 | * The peripheral clocks. | ||
57 | */ | ||
58 | static struct clk pioA_clk = { | ||
59 | .name = "pioA_clk", | ||
60 | .pmc_mask = 1 << AT572D940HF_ID_PIOA, | ||
61 | .type = CLK_TYPE_PERIPHERAL, | ||
62 | }; | ||
63 | static struct clk pioB_clk = { | ||
64 | .name = "pioB_clk", | ||
65 | .pmc_mask = 1 << AT572D940HF_ID_PIOB, | ||
66 | .type = CLK_TYPE_PERIPHERAL, | ||
67 | }; | ||
68 | static struct clk pioC_clk = { | ||
69 | .name = "pioC_clk", | ||
70 | .pmc_mask = 1 << AT572D940HF_ID_PIOC, | ||
71 | .type = CLK_TYPE_PERIPHERAL, | ||
72 | }; | ||
73 | static struct clk macb_clk = { | ||
74 | .name = "macb_clk", | ||
75 | .pmc_mask = 1 << AT572D940HF_ID_EMAC, | ||
76 | .type = CLK_TYPE_PERIPHERAL, | ||
77 | }; | ||
78 | static struct clk usart0_clk = { | ||
79 | .name = "usart0_clk", | ||
80 | .pmc_mask = 1 << AT572D940HF_ID_US0, | ||
81 | .type = CLK_TYPE_PERIPHERAL, | ||
82 | }; | ||
83 | static struct clk usart1_clk = { | ||
84 | .name = "usart1_clk", | ||
85 | .pmc_mask = 1 << AT572D940HF_ID_US1, | ||
86 | .type = CLK_TYPE_PERIPHERAL, | ||
87 | }; | ||
88 | static struct clk usart2_clk = { | ||
89 | .name = "usart2_clk", | ||
90 | .pmc_mask = 1 << AT572D940HF_ID_US2, | ||
91 | .type = CLK_TYPE_PERIPHERAL, | ||
92 | }; | ||
93 | static struct clk mmc_clk = { | ||
94 | .name = "mci_clk", | ||
95 | .pmc_mask = 1 << AT572D940HF_ID_MCI, | ||
96 | .type = CLK_TYPE_PERIPHERAL, | ||
97 | }; | ||
98 | static struct clk udc_clk = { | ||
99 | .name = "udc_clk", | ||
100 | .pmc_mask = 1 << AT572D940HF_ID_UDP, | ||
101 | .type = CLK_TYPE_PERIPHERAL, | ||
102 | }; | ||
103 | static struct clk twi0_clk = { | ||
104 | .name = "twi0_clk", | ||
105 | .pmc_mask = 1 << AT572D940HF_ID_TWI0, | ||
106 | .type = CLK_TYPE_PERIPHERAL, | ||
107 | }; | ||
108 | static struct clk spi0_clk = { | ||
109 | .name = "spi0_clk", | ||
110 | .pmc_mask = 1 << AT572D940HF_ID_SPI0, | ||
111 | .type = CLK_TYPE_PERIPHERAL, | ||
112 | }; | ||
113 | static struct clk spi1_clk = { | ||
114 | .name = "spi1_clk", | ||
115 | .pmc_mask = 1 << AT572D940HF_ID_SPI1, | ||
116 | .type = CLK_TYPE_PERIPHERAL, | ||
117 | }; | ||
118 | static struct clk ssc0_clk = { | ||
119 | .name = "ssc0_clk", | ||
120 | .pmc_mask = 1 << AT572D940HF_ID_SSC0, | ||
121 | .type = CLK_TYPE_PERIPHERAL, | ||
122 | }; | ||
123 | static struct clk ssc1_clk = { | ||
124 | .name = "ssc1_clk", | ||
125 | .pmc_mask = 1 << AT572D940HF_ID_SSC1, | ||
126 | .type = CLK_TYPE_PERIPHERAL, | ||
127 | }; | ||
128 | static struct clk ssc2_clk = { | ||
129 | .name = "ssc2_clk", | ||
130 | .pmc_mask = 1 << AT572D940HF_ID_SSC2, | ||
131 | .type = CLK_TYPE_PERIPHERAL, | ||
132 | }; | ||
133 | static struct clk tc0_clk = { | ||
134 | .name = "tc0_clk", | ||
135 | .pmc_mask = 1 << AT572D940HF_ID_TC0, | ||
136 | .type = CLK_TYPE_PERIPHERAL, | ||
137 | }; | ||
138 | static struct clk tc1_clk = { | ||
139 | .name = "tc1_clk", | ||
140 | .pmc_mask = 1 << AT572D940HF_ID_TC1, | ||
141 | .type = CLK_TYPE_PERIPHERAL, | ||
142 | }; | ||
143 | static struct clk tc2_clk = { | ||
144 | .name = "tc2_clk", | ||
145 | .pmc_mask = 1 << AT572D940HF_ID_TC2, | ||
146 | .type = CLK_TYPE_PERIPHERAL, | ||
147 | }; | ||
148 | static struct clk ohci_clk = { | ||
149 | .name = "ohci_clk", | ||
150 | .pmc_mask = 1 << AT572D940HF_ID_UHP, | ||
151 | .type = CLK_TYPE_PERIPHERAL, | ||
152 | }; | ||
153 | static struct clk ssc3_clk = { | ||
154 | .name = "ssc3_clk", | ||
155 | .pmc_mask = 1 << AT572D940HF_ID_SSC3, | ||
156 | .type = CLK_TYPE_PERIPHERAL, | ||
157 | }; | ||
158 | static struct clk twi1_clk = { | ||
159 | .name = "twi1_clk", | ||
160 | .pmc_mask = 1 << AT572D940HF_ID_TWI1, | ||
161 | .type = CLK_TYPE_PERIPHERAL, | ||
162 | }; | ||
163 | static struct clk can0_clk = { | ||
164 | .name = "can0_clk", | ||
165 | .pmc_mask = 1 << AT572D940HF_ID_CAN0, | ||
166 | .type = CLK_TYPE_PERIPHERAL, | ||
167 | }; | ||
168 | static struct clk can1_clk = { | ||
169 | .name = "can1_clk", | ||
170 | .pmc_mask = 1 << AT572D940HF_ID_CAN1, | ||
171 | .type = CLK_TYPE_PERIPHERAL, | ||
172 | }; | ||
173 | static struct clk mAgicV_clk = { | ||
174 | .name = "mAgicV_clk", | ||
175 | .pmc_mask = 1 << AT572D940HF_ID_MSIRQ0, | ||
176 | .type = CLK_TYPE_PERIPHERAL, | ||
177 | }; | ||
178 | |||
179 | |||
180 | static struct clk *periph_clocks[] __initdata = { | ||
181 | &pioA_clk, | ||
182 | &pioB_clk, | ||
183 | &pioC_clk, | ||
184 | &macb_clk, | ||
185 | &usart0_clk, | ||
186 | &usart1_clk, | ||
187 | &usart2_clk, | ||
188 | &mmc_clk, | ||
189 | &udc_clk, | ||
190 | &twi0_clk, | ||
191 | &spi0_clk, | ||
192 | &spi1_clk, | ||
193 | &ssc0_clk, | ||
194 | &ssc1_clk, | ||
195 | &ssc2_clk, | ||
196 | &tc0_clk, | ||
197 | &tc1_clk, | ||
198 | &tc2_clk, | ||
199 | &ohci_clk, | ||
200 | &ssc3_clk, | ||
201 | &twi1_clk, | ||
202 | &can0_clk, | ||
203 | &can1_clk, | ||
204 | &mAgicV_clk, | ||
205 | /* irq0 .. irq2 */ | ||
206 | }; | ||
207 | |||
208 | /* | ||
209 | * The five programmable clocks. | ||
210 | * You must configure pin multiplexing to bring these signals out. | ||
211 | */ | ||
212 | static struct clk pck0 = { | ||
213 | .name = "pck0", | ||
214 | .pmc_mask = AT91_PMC_PCK0, | ||
215 | .type = CLK_TYPE_PROGRAMMABLE, | ||
216 | .id = 0, | ||
217 | }; | ||
218 | static struct clk pck1 = { | ||
219 | .name = "pck1", | ||
220 | .pmc_mask = AT91_PMC_PCK1, | ||
221 | .type = CLK_TYPE_PROGRAMMABLE, | ||
222 | .id = 1, | ||
223 | }; | ||
224 | static struct clk pck2 = { | ||
225 | .name = "pck2", | ||
226 | .pmc_mask = AT91_PMC_PCK2, | ||
227 | .type = CLK_TYPE_PROGRAMMABLE, | ||
228 | .id = 2, | ||
229 | }; | ||
230 | static struct clk pck3 = { | ||
231 | .name = "pck3", | ||
232 | .pmc_mask = AT91_PMC_PCK3, | ||
233 | .type = CLK_TYPE_PROGRAMMABLE, | ||
234 | .id = 3, | ||
235 | }; | ||
236 | |||
237 | static struct clk mAgicV_mem_clk = { | ||
238 | .name = "mAgicV_mem_clk", | ||
239 | .pmc_mask = AT91_PMC_PCK4, | ||
240 | .type = CLK_TYPE_PROGRAMMABLE, | ||
241 | .id = 4, | ||
242 | }; | ||
243 | |||
244 | /* HClocks */ | ||
245 | static struct clk hck0 = { | ||
246 | .name = "hck0", | ||
247 | .pmc_mask = AT91_PMC_HCK0, | ||
248 | .type = CLK_TYPE_SYSTEM, | ||
249 | .id = 0, | ||
250 | }; | ||
251 | static struct clk hck1 = { | ||
252 | .name = "hck1", | ||
253 | .pmc_mask = AT91_PMC_HCK1, | ||
254 | .type = CLK_TYPE_SYSTEM, | ||
255 | .id = 1, | ||
256 | }; | ||
257 | |||
258 | static void __init at572d940hf_register_clocks(void) | ||
259 | { | ||
260 | int i; | ||
261 | |||
262 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) | ||
263 | clk_register(periph_clocks[i]); | ||
264 | |||
265 | clk_register(&pck0); | ||
266 | clk_register(&pck1); | ||
267 | clk_register(&pck2); | ||
268 | clk_register(&pck3); | ||
269 | clk_register(&mAgicV_mem_clk); | ||
270 | |||
271 | clk_register(&hck0); | ||
272 | clk_register(&hck1); | ||
273 | } | ||
274 | |||
275 | /* -------------------------------------------------------------------- | ||
276 | * GPIO | ||
277 | * -------------------------------------------------------------------- */ | ||
278 | |||
279 | static struct at91_gpio_bank at572d940hf_gpio[] = { | ||
280 | { | ||
281 | .id = AT572D940HF_ID_PIOA, | ||
282 | .offset = AT91_PIOA, | ||
283 | .clock = &pioA_clk, | ||
284 | }, { | ||
285 | .id = AT572D940HF_ID_PIOB, | ||
286 | .offset = AT91_PIOB, | ||
287 | .clock = &pioB_clk, | ||
288 | }, { | ||
289 | .id = AT572D940HF_ID_PIOC, | ||
290 | .offset = AT91_PIOC, | ||
291 | .clock = &pioC_clk, | ||
292 | } | ||
293 | }; | ||
294 | |||
295 | static void at572d940hf_reset(void) | ||
296 | { | ||
297 | at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); | ||
298 | } | ||
299 | |||
300 | |||
301 | /* -------------------------------------------------------------------- | ||
302 | * AT572D940HF processor initialization | ||
303 | * -------------------------------------------------------------------- */ | ||
304 | |||
305 | void __init at572d940hf_initialize(unsigned long main_clock) | ||
306 | { | ||
307 | /* Map peripherals */ | ||
308 | iotable_init(at572d940hf_io_desc, ARRAY_SIZE(at572d940hf_io_desc)); | ||
309 | |||
310 | at91_arch_reset = at572d940hf_reset; | ||
311 | at91_extern_irq = (1 << AT572D940HF_ID_IRQ0) | (1 << AT572D940HF_ID_IRQ1) | ||
312 | | (1 << AT572D940HF_ID_IRQ2); | ||
313 | |||
314 | /* Init clock subsystem */ | ||
315 | at91_clock_init(main_clock); | ||
316 | |||
317 | /* Register the processor-specific clocks */ | ||
318 | at572d940hf_register_clocks(); | ||
319 | |||
320 | /* Register GPIO subsystem */ | ||
321 | at91_gpio_init(at572d940hf_gpio, 3); | ||
322 | } | ||
323 | |||
324 | /* -------------------------------------------------------------------- | ||
325 | * Interrupt initialization | ||
326 | * -------------------------------------------------------------------- */ | ||
327 | |||
328 | /* | ||
329 | * The default interrupt priority levels (0 = lowest, 7 = highest). | ||
330 | */ | ||
331 | static unsigned int at572d940hf_default_irq_priority[NR_AIC_IRQS] __initdata = { | ||
332 | 7, /* Advanced Interrupt Controller */ | ||
333 | 7, /* System Peripherals */ | ||
334 | 0, /* Parallel IO Controller A */ | ||
335 | 0, /* Parallel IO Controller B */ | ||
336 | 0, /* Parallel IO Controller C */ | ||
337 | 3, /* Ethernet */ | ||
338 | 6, /* USART 0 */ | ||
339 | 6, /* USART 1 */ | ||
340 | 6, /* USART 2 */ | ||
341 | 0, /* Multimedia Card Interface */ | ||
342 | 4, /* USB Device Port */ | ||
343 | 0, /* Two-Wire Interface 0 */ | ||
344 | 6, /* Serial Peripheral Interface 0 */ | ||
345 | 6, /* Serial Peripheral Interface 1 */ | ||
346 | 5, /* Serial Synchronous Controller 0 */ | ||
347 | 5, /* Serial Synchronous Controller 1 */ | ||
348 | 5, /* Serial Synchronous Controller 2 */ | ||
349 | 0, /* Timer Counter 0 */ | ||
350 | 0, /* Timer Counter 1 */ | ||
351 | 0, /* Timer Counter 2 */ | ||
352 | 3, /* USB Host port */ | ||
353 | 3, /* Serial Synchronous Controller 3 */ | ||
354 | 0, /* Two-Wire Interface 1 */ | ||
355 | 0, /* CAN Controller 0 */ | ||
356 | 0, /* CAN Controller 1 */ | ||
357 | 0, /* mAgicV HALT line */ | ||
358 | 0, /* mAgicV SIRQ0 line */ | ||
359 | 0, /* mAgicV exception line */ | ||
360 | 0, /* mAgicV end of DMA line */ | ||
361 | 0, /* Advanced Interrupt Controller */ | ||
362 | 0, /* Advanced Interrupt Controller */ | ||
363 | 0, /* Advanced Interrupt Controller */ | ||
364 | }; | ||
365 | |||
366 | void __init at572d940hf_init_interrupts(unsigned int priority[NR_AIC_IRQS]) | ||
367 | { | ||
368 | if (!priority) | ||
369 | priority = at572d940hf_default_irq_priority; | ||
370 | |||
371 | /* Initialize the AIC interrupt controller */ | ||
372 | at91_aic_init(priority); | ||
373 | |||
374 | /* Enable GPIO interrupts */ | ||
375 | at91_gpio_irq_setup(); | ||
376 | } | ||
377 | |||
diff --git a/arch/arm/mach-at91/at572d940hf_devices.c b/arch/arm/mach-at91/at572d940hf_devices.c deleted file mode 100644 index 0fc20a240782..000000000000 --- a/arch/arm/mach-at91/at572d940hf_devices.c +++ /dev/null | |||
@@ -1,970 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-at91/at572d940hf_devices.c | ||
3 | * | ||
4 | * Copyright (C) 2008 Atmel Antonio R. Costa <costa.antonior@gmail.com> | ||
5 | * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org> | ||
6 | * Copyright (C) 2005 David Brownell | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
21 | * | ||
22 | */ | ||
23 | |||
24 | #include <asm/mach/arch.h> | ||
25 | #include <asm/mach/map.h> | ||
26 | |||
27 | #include <linux/dma-mapping.h> | ||
28 | #include <linux/platform_device.h> | ||
29 | |||
30 | #include <mach/board.h> | ||
31 | #include <mach/gpio.h> | ||
32 | #include <mach/at572d940hf.h> | ||
33 | #include <mach/at572d940hf_matrix.h> | ||
34 | #include <mach/at91sam9_smc.h> | ||
35 | |||
36 | #include "generic.h" | ||
37 | #include "sam9_smc.h" | ||
38 | |||
39 | |||
40 | /* -------------------------------------------------------------------- | ||
41 | * USB Host | ||
42 | * -------------------------------------------------------------------- */ | ||
43 | |||
44 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | ||
45 | static u64 ohci_dmamask = DMA_BIT_MASK(32); | ||
46 | static struct at91_usbh_data usbh_data; | ||
47 | |||
48 | static struct resource usbh_resources[] = { | ||
49 | [0] = { | ||
50 | .start = AT572D940HF_UHP_BASE, | ||
51 | .end = AT572D940HF_UHP_BASE + SZ_1M - 1, | ||
52 | .flags = IORESOURCE_MEM, | ||
53 | }, | ||
54 | [1] = { | ||
55 | .start = AT572D940HF_ID_UHP, | ||
56 | .end = AT572D940HF_ID_UHP, | ||
57 | .flags = IORESOURCE_IRQ, | ||
58 | }, | ||
59 | }; | ||
60 | |||
61 | static struct platform_device at572d940hf_usbh_device = { | ||
62 | .name = "at91_ohci", | ||
63 | .id = -1, | ||
64 | .dev = { | ||
65 | .dma_mask = &ohci_dmamask, | ||
66 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
67 | .platform_data = &usbh_data, | ||
68 | }, | ||
69 | .resource = usbh_resources, | ||
70 | .num_resources = ARRAY_SIZE(usbh_resources), | ||
71 | }; | ||
72 | |||
73 | void __init at91_add_device_usbh(struct at91_usbh_data *data) | ||
74 | { | ||
75 | if (!data) | ||
76 | return; | ||
77 | |||
78 | usbh_data = *data; | ||
79 | platform_device_register(&at572d940hf_usbh_device); | ||
80 | |||
81 | } | ||
82 | #else | ||
83 | void __init at91_add_device_usbh(struct at91_usbh_data *data) {} | ||
84 | #endif | ||
85 | |||
86 | |||
87 | /* -------------------------------------------------------------------- | ||
88 | * USB Device (Gadget) | ||
89 | * -------------------------------------------------------------------- */ | ||
90 | |||
91 | #ifdef CONFIG_USB_GADGET_AT91 | ||
92 | static struct at91_udc_data udc_data; | ||
93 | |||
94 | static struct resource udc_resources[] = { | ||
95 | [0] = { | ||
96 | .start = AT572D940HF_BASE_UDP, | ||
97 | .end = AT572D940HF_BASE_UDP + SZ_16K - 1, | ||
98 | .flags = IORESOURCE_MEM, | ||
99 | }, | ||
100 | [1] = { | ||
101 | .start = AT572D940HF_ID_UDP, | ||
102 | .end = AT572D940HF_ID_UDP, | ||
103 | .flags = IORESOURCE_IRQ, | ||
104 | }, | ||
105 | }; | ||
106 | |||
107 | static struct platform_device at572d940hf_udc_device = { | ||
108 | .name = "at91_udc", | ||
109 | .id = -1, | ||
110 | .dev = { | ||
111 | .platform_data = &udc_data, | ||
112 | }, | ||
113 | .resource = udc_resources, | ||
114 | .num_resources = ARRAY_SIZE(udc_resources), | ||
115 | }; | ||
116 | |||
117 | void __init at91_add_device_udc(struct at91_udc_data *data) | ||
118 | { | ||
119 | if (!data) | ||
120 | return; | ||
121 | |||
122 | if (data->vbus_pin) { | ||
123 | at91_set_gpio_input(data->vbus_pin, 0); | ||
124 | at91_set_deglitch(data->vbus_pin, 1); | ||
125 | } | ||
126 | |||
127 | /* Pullup pin is handled internally */ | ||
128 | |||
129 | udc_data = *data; | ||
130 | platform_device_register(&at572d940hf_udc_device); | ||
131 | } | ||
132 | #else | ||
133 | void __init at91_add_device_udc(struct at91_udc_data *data) {} | ||
134 | #endif | ||
135 | |||
136 | |||
137 | /* -------------------------------------------------------------------- | ||
138 | * Ethernet | ||
139 | * -------------------------------------------------------------------- */ | ||
140 | |||
141 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) | ||
142 | static u64 eth_dmamask = DMA_BIT_MASK(32); | ||
143 | static struct at91_eth_data eth_data; | ||
144 | |||
145 | static struct resource eth_resources[] = { | ||
146 | [0] = { | ||
147 | .start = AT572D940HF_BASE_EMAC, | ||
148 | .end = AT572D940HF_BASE_EMAC + SZ_16K - 1, | ||
149 | .flags = IORESOURCE_MEM, | ||
150 | }, | ||
151 | [1] = { | ||
152 | .start = AT572D940HF_ID_EMAC, | ||
153 | .end = AT572D940HF_ID_EMAC, | ||
154 | .flags = IORESOURCE_IRQ, | ||
155 | }, | ||
156 | }; | ||
157 | |||
158 | static struct platform_device at572d940hf_eth_device = { | ||
159 | .name = "macb", | ||
160 | .id = -1, | ||
161 | .dev = { | ||
162 | .dma_mask = ð_dmamask, | ||
163 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
164 | .platform_data = ð_data, | ||
165 | }, | ||
166 | .resource = eth_resources, | ||
167 | .num_resources = ARRAY_SIZE(eth_resources), | ||
168 | }; | ||
169 | |||
170 | void __init at91_add_device_eth(struct at91_eth_data *data) | ||
171 | { | ||
172 | if (!data) | ||
173 | return; | ||
174 | |||
175 | if (data->phy_irq_pin) { | ||
176 | at91_set_gpio_input(data->phy_irq_pin, 0); | ||
177 | at91_set_deglitch(data->phy_irq_pin, 1); | ||
178 | } | ||
179 | |||
180 | /* Only RMII is supported */ | ||
181 | data->is_rmii = 1; | ||
182 | |||
183 | /* Pins used for RMII */ | ||
184 | at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXCK_EREFCK */ | ||
185 | at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */ | ||
186 | at91_set_A_periph(AT91_PIN_PA18, 0); /* ERX0 */ | ||
187 | at91_set_A_periph(AT91_PIN_PA19, 0); /* ERX1 */ | ||
188 | at91_set_A_periph(AT91_PIN_PA20, 0); /* ERXER */ | ||
189 | at91_set_A_periph(AT91_PIN_PA23, 0); /* ETXEN */ | ||
190 | at91_set_A_periph(AT91_PIN_PA21, 0); /* ETX0 */ | ||
191 | at91_set_A_periph(AT91_PIN_PA22, 0); /* ETX1 */ | ||
192 | at91_set_A_periph(AT91_PIN_PA13, 0); /* EMDIO */ | ||
193 | at91_set_A_periph(AT91_PIN_PA14, 0); /* EMDC */ | ||
194 | |||
195 | eth_data = *data; | ||
196 | platform_device_register(&at572d940hf_eth_device); | ||
197 | } | ||
198 | #else | ||
199 | void __init at91_add_device_eth(struct at91_eth_data *data) {} | ||
200 | #endif | ||
201 | |||
202 | |||
203 | /* -------------------------------------------------------------------- | ||
204 | * MMC / SD | ||
205 | * -------------------------------------------------------------------- */ | ||
206 | |||
207 | #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) | ||
208 | static u64 mmc_dmamask = DMA_BIT_MASK(32); | ||
209 | static struct at91_mmc_data mmc_data; | ||
210 | |||
211 | static struct resource mmc_resources[] = { | ||
212 | [0] = { | ||
213 | .start = AT572D940HF_BASE_MCI, | ||
214 | .end = AT572D940HF_BASE_MCI + SZ_16K - 1, | ||
215 | .flags = IORESOURCE_MEM, | ||
216 | }, | ||
217 | [1] = { | ||
218 | .start = AT572D940HF_ID_MCI, | ||
219 | .end = AT572D940HF_ID_MCI, | ||
220 | .flags = IORESOURCE_IRQ, | ||
221 | }, | ||
222 | }; | ||
223 | |||
224 | static struct platform_device at572d940hf_mmc_device = { | ||
225 | .name = "at91_mci", | ||
226 | .id = -1, | ||
227 | .dev = { | ||
228 | .dma_mask = &mmc_dmamask, | ||
229 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
230 | .platform_data = &mmc_data, | ||
231 | }, | ||
232 | .resource = mmc_resources, | ||
233 | .num_resources = ARRAY_SIZE(mmc_resources), | ||
234 | }; | ||
235 | |||
236 | void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | ||
237 | { | ||
238 | if (!data) | ||
239 | return; | ||
240 | |||
241 | /* input/irq */ | ||
242 | if (data->det_pin) { | ||
243 | at91_set_gpio_input(data->det_pin, 1); | ||
244 | at91_set_deglitch(data->det_pin, 1); | ||
245 | } | ||
246 | if (data->wp_pin) | ||
247 | at91_set_gpio_input(data->wp_pin, 1); | ||
248 | if (data->vcc_pin) | ||
249 | at91_set_gpio_output(data->vcc_pin, 0); | ||
250 | |||
251 | /* CLK */ | ||
252 | at91_set_A_periph(AT91_PIN_PC22, 0); | ||
253 | |||
254 | /* CMD */ | ||
255 | at91_set_A_periph(AT91_PIN_PC23, 1); | ||
256 | |||
257 | /* DAT0, maybe DAT1..DAT3 */ | ||
258 | at91_set_A_periph(AT91_PIN_PC24, 1); | ||
259 | if (data->wire4) { | ||
260 | at91_set_A_periph(AT91_PIN_PC25, 1); | ||
261 | at91_set_A_periph(AT91_PIN_PC26, 1); | ||
262 | at91_set_A_periph(AT91_PIN_PC27, 1); | ||
263 | } | ||
264 | |||
265 | mmc_data = *data; | ||
266 | platform_device_register(&at572d940hf_mmc_device); | ||
267 | } | ||
268 | #else | ||
269 | void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} | ||
270 | #endif | ||
271 | |||
272 | |||
273 | /* -------------------------------------------------------------------- | ||
274 | * NAND / SmartMedia | ||
275 | * -------------------------------------------------------------------- */ | ||
276 | |||
277 | #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE) | ||
278 | static struct atmel_nand_data nand_data; | ||
279 | |||
280 | #define NAND_BASE AT91_CHIPSELECT_3 | ||
281 | |||
282 | static struct resource nand_resources[] = { | ||
283 | { | ||
284 | .start = NAND_BASE, | ||
285 | .end = NAND_BASE + SZ_256M - 1, | ||
286 | .flags = IORESOURCE_MEM, | ||
287 | } | ||
288 | }; | ||
289 | |||
290 | static struct platform_device at572d940hf_nand_device = { | ||
291 | .name = "atmel_nand", | ||
292 | .id = -1, | ||
293 | .dev = { | ||
294 | .platform_data = &nand_data, | ||
295 | }, | ||
296 | .resource = nand_resources, | ||
297 | .num_resources = ARRAY_SIZE(nand_resources), | ||
298 | }; | ||
299 | |||
300 | void __init at91_add_device_nand(struct atmel_nand_data *data) | ||
301 | { | ||
302 | unsigned long csa; | ||
303 | |||
304 | if (!data) | ||
305 | return; | ||
306 | |||
307 | csa = at91_sys_read(AT91_MATRIX_EBICSA); | ||
308 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); | ||
309 | |||
310 | /* enable pin */ | ||
311 | if (data->enable_pin) | ||
312 | at91_set_gpio_output(data->enable_pin, 1); | ||
313 | |||
314 | /* ready/busy pin */ | ||
315 | if (data->rdy_pin) | ||
316 | at91_set_gpio_input(data->rdy_pin, 1); | ||
317 | |||
318 | /* card detect pin */ | ||
319 | if (data->det_pin) | ||
320 | at91_set_gpio_input(data->det_pin, 1); | ||
321 | |||
322 | at91_set_A_periph(AT91_PIN_PB28, 0); /* A[22] */ | ||
323 | at91_set_B_periph(AT91_PIN_PA28, 0); /* NANDOE */ | ||
324 | at91_set_B_periph(AT91_PIN_PA29, 0); /* NANDWE */ | ||
325 | |||
326 | nand_data = *data; | ||
327 | platform_device_register(&at572d940hf_nand_device); | ||
328 | } | ||
329 | |||
330 | #else | ||
331 | void __init at91_add_device_nand(struct atmel_nand_data *data) {} | ||
332 | #endif | ||
333 | |||
334 | |||
335 | /* -------------------------------------------------------------------- | ||
336 | * TWI (i2c) | ||
337 | * -------------------------------------------------------------------- */ | ||
338 | |||
339 | /* | ||
340 | * Prefer the GPIO code since the TWI controller isn't robust | ||
341 | * (gets overruns and underruns under load) and can only issue | ||
342 | * repeated STARTs in one scenario (the driver doesn't yet handle them). | ||
343 | */ | ||
344 | |||
345 | #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) | ||
346 | |||
347 | static struct i2c_gpio_platform_data pdata = { | ||
348 | .sda_pin = AT91_PIN_PC7, | ||
349 | .sda_is_open_drain = 1, | ||
350 | .scl_pin = AT91_PIN_PC8, | ||
351 | .scl_is_open_drain = 1, | ||
352 | .udelay = 2, /* ~100 kHz */ | ||
353 | }; | ||
354 | |||
355 | static struct platform_device at572d940hf_twi_device { | ||
356 | .name = "i2c-gpio", | ||
357 | .id = -1, | ||
358 | .dev.platform_data = &pdata, | ||
359 | }; | ||
360 | |||
361 | void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) | ||
362 | { | ||
363 | at91_set_GPIO_periph(AT91_PIN_PC7, 1); /* TWD (SDA) */ | ||
364 | at91_set_multi_drive(AT91_PIN_PC7, 1); | ||
365 | |||
366 | at91_set_GPIO_periph(AT91_PIN_PA8, 1); /* TWCK (SCL) */ | ||
367 | at91_set_multi_drive(AT91_PIN_PC8, 1); | ||
368 | |||
369 | i2c_register_board_info(0, devices, nr_devices); | ||
370 | platform_device_register(&at572d940hf_twi_device); | ||
371 | } | ||
372 | |||
373 | #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE) | ||
374 | |||
375 | static struct resource twi0_resources[] = { | ||
376 | [0] = { | ||
377 | .start = AT572D940HF_BASE_TWI0, | ||
378 | .end = AT572D940HF_BASE_TWI0 + SZ_16K - 1, | ||
379 | .flags = IORESOURCE_MEM, | ||
380 | }, | ||
381 | [1] = { | ||
382 | .start = AT572D940HF_ID_TWI0, | ||
383 | .end = AT572D940HF_ID_TWI0, | ||
384 | .flags = IORESOURCE_IRQ, | ||
385 | }, | ||
386 | }; | ||
387 | |||
388 | static struct platform_device at572d940hf_twi0_device = { | ||
389 | .name = "at91_i2c", | ||
390 | .id = 0, | ||
391 | .resource = twi0_resources, | ||
392 | .num_resources = ARRAY_SIZE(twi0_resources), | ||
393 | }; | ||
394 | |||
395 | static struct resource twi1_resources[] = { | ||
396 | [0] = { | ||
397 | .start = AT572D940HF_BASE_TWI1, | ||
398 | .end = AT572D940HF_BASE_TWI1 + SZ_16K - 1, | ||
399 | .flags = IORESOURCE_MEM, | ||
400 | }, | ||
401 | [1] = { | ||
402 | .start = AT572D940HF_ID_TWI1, | ||
403 | .end = AT572D940HF_ID_TWI1, | ||
404 | .flags = IORESOURCE_IRQ, | ||
405 | }, | ||
406 | }; | ||
407 | |||
408 | static struct platform_device at572d940hf_twi1_device = { | ||
409 | .name = "at91_i2c", | ||
410 | .id = 1, | ||
411 | .resource = twi1_resources, | ||
412 | .num_resources = ARRAY_SIZE(twi1_resources), | ||
413 | }; | ||
414 | |||
415 | void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) | ||
416 | { | ||
417 | /* pins used for TWI0 interface */ | ||
418 | at91_set_A_periph(AT91_PIN_PC7, 0); /* TWD */ | ||
419 | at91_set_multi_drive(AT91_PIN_PC7, 1); | ||
420 | |||
421 | at91_set_A_periph(AT91_PIN_PC8, 0); /* TWCK */ | ||
422 | at91_set_multi_drive(AT91_PIN_PC8, 1); | ||
423 | |||
424 | /* pins used for TWI1 interface */ | ||
425 | at91_set_A_periph(AT91_PIN_PC20, 0); /* TWD */ | ||
426 | at91_set_multi_drive(AT91_PIN_PC20, 1); | ||
427 | |||
428 | at91_set_A_periph(AT91_PIN_PC21, 0); /* TWCK */ | ||
429 | at91_set_multi_drive(AT91_PIN_PC21, 1); | ||
430 | |||
431 | i2c_register_board_info(0, devices, nr_devices); | ||
432 | platform_device_register(&at572d940hf_twi0_device); | ||
433 | platform_device_register(&at572d940hf_twi1_device); | ||
434 | } | ||
435 | #else | ||
436 | void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {} | ||
437 | #endif | ||
438 | |||
439 | |||
440 | /* -------------------------------------------------------------------- | ||
441 | * SPI | ||
442 | * -------------------------------------------------------------------- */ | ||
443 | |||
444 | #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) | ||
445 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
446 | |||
447 | static struct resource spi0_resources[] = { | ||
448 | [0] = { | ||
449 | .start = AT572D940HF_BASE_SPI0, | ||
450 | .end = AT572D940HF_BASE_SPI0 + SZ_16K - 1, | ||
451 | .flags = IORESOURCE_MEM, | ||
452 | }, | ||
453 | [1] = { | ||
454 | .start = AT572D940HF_ID_SPI0, | ||
455 | .end = AT572D940HF_ID_SPI0, | ||
456 | .flags = IORESOURCE_IRQ, | ||
457 | }, | ||
458 | }; | ||
459 | |||
460 | static struct platform_device at572d940hf_spi0_device = { | ||
461 | .name = "atmel_spi", | ||
462 | .id = 0, | ||
463 | .dev = { | ||
464 | .dma_mask = &spi_dmamask, | ||
465 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
466 | }, | ||
467 | .resource = spi0_resources, | ||
468 | .num_resources = ARRAY_SIZE(spi0_resources), | ||
469 | }; | ||
470 | |||
471 | static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 }; | ||
472 | |||
473 | static struct resource spi1_resources[] = { | ||
474 | [0] = { | ||
475 | .start = AT572D940HF_BASE_SPI1, | ||
476 | .end = AT572D940HF_BASE_SPI1 + SZ_16K - 1, | ||
477 | .flags = IORESOURCE_MEM, | ||
478 | }, | ||
479 | [1] = { | ||
480 | .start = AT572D940HF_ID_SPI1, | ||
481 | .end = AT572D940HF_ID_SPI1, | ||
482 | .flags = IORESOURCE_IRQ, | ||
483 | }, | ||
484 | }; | ||
485 | |||
486 | static struct platform_device at572d940hf_spi1_device = { | ||
487 | .name = "atmel_spi", | ||
488 | .id = 1, | ||
489 | .dev = { | ||
490 | .dma_mask = &spi_dmamask, | ||
491 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
492 | }, | ||
493 | .resource = spi1_resources, | ||
494 | .num_resources = ARRAY_SIZE(spi1_resources), | ||
495 | }; | ||
496 | |||
497 | static const unsigned spi1_standard_cs[4] = { AT91_PIN_PC3, AT91_PIN_PC4, AT91_PIN_PC5, AT91_PIN_PC6 }; | ||
498 | |||
499 | void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | ||
500 | { | ||
501 | int i; | ||
502 | unsigned long cs_pin; | ||
503 | short enable_spi0 = 0; | ||
504 | short enable_spi1 = 0; | ||
505 | |||
506 | /* Choose SPI chip-selects */ | ||
507 | for (i = 0; i < nr_devices; i++) { | ||
508 | if (devices[i].controller_data) | ||
509 | cs_pin = (unsigned long) devices[i].controller_data; | ||
510 | else if (devices[i].bus_num == 0) | ||
511 | cs_pin = spi0_standard_cs[devices[i].chip_select]; | ||
512 | else | ||
513 | cs_pin = spi1_standard_cs[devices[i].chip_select]; | ||
514 | |||
515 | if (devices[i].bus_num == 0) | ||
516 | enable_spi0 = 1; | ||
517 | else | ||
518 | enable_spi1 = 1; | ||
519 | |||
520 | /* enable chip-select pin */ | ||
521 | at91_set_gpio_output(cs_pin, 1); | ||
522 | |||
523 | /* pass chip-select pin to driver */ | ||
524 | devices[i].controller_data = (void *) cs_pin; | ||
525 | } | ||
526 | |||
527 | spi_register_board_info(devices, nr_devices); | ||
528 | |||
529 | /* Configure SPI bus(es) */ | ||
530 | if (enable_spi0) { | ||
531 | at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ | ||
532 | at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ | ||
533 | at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ | ||
534 | |||
535 | at91_clock_associate("spi0_clk", &at572d940hf_spi0_device.dev, "spi_clk"); | ||
536 | platform_device_register(&at572d940hf_spi0_device); | ||
537 | } | ||
538 | if (enable_spi1) { | ||
539 | at91_set_A_periph(AT91_PIN_PC0, 0); /* SPI1_MISO */ | ||
540 | at91_set_A_periph(AT91_PIN_PC1, 0); /* SPI1_MOSI */ | ||
541 | at91_set_A_periph(AT91_PIN_PC2, 0); /* SPI1_SPCK */ | ||
542 | |||
543 | at91_clock_associate("spi1_clk", &at572d940hf_spi1_device.dev, "spi_clk"); | ||
544 | platform_device_register(&at572d940hf_spi1_device); | ||
545 | } | ||
546 | } | ||
547 | #else | ||
548 | void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {} | ||
549 | #endif | ||
550 | |||
551 | |||
552 | /* -------------------------------------------------------------------- | ||
553 | * Timer/Counter blocks | ||
554 | * -------------------------------------------------------------------- */ | ||
555 | |||
556 | #ifdef CONFIG_ATMEL_TCLIB | ||
557 | |||
558 | static struct resource tcb_resources[] = { | ||
559 | [0] = { | ||
560 | .start = AT572D940HF_BASE_TCB, | ||
561 | .end = AT572D940HF_BASE_TCB + SZ_16K - 1, | ||
562 | .flags = IORESOURCE_MEM, | ||
563 | }, | ||
564 | [1] = { | ||
565 | .start = AT572D940HF_ID_TC0, | ||
566 | .end = AT572D940HF_ID_TC0, | ||
567 | .flags = IORESOURCE_IRQ, | ||
568 | }, | ||
569 | [2] = { | ||
570 | .start = AT572D940HF_ID_TC1, | ||
571 | .end = AT572D940HF_ID_TC1, | ||
572 | .flags = IORESOURCE_IRQ, | ||
573 | }, | ||
574 | [3] = { | ||
575 | .start = AT572D940HF_ID_TC2, | ||
576 | .end = AT572D940HF_ID_TC2, | ||
577 | .flags = IORESOURCE_IRQ, | ||
578 | }, | ||
579 | }; | ||
580 | |||
581 | static struct platform_device at572d940hf_tcb_device = { | ||
582 | .name = "atmel_tcb", | ||
583 | .id = 0, | ||
584 | .resource = tcb_resources, | ||
585 | .num_resources = ARRAY_SIZE(tcb_resources), | ||
586 | }; | ||
587 | |||
588 | static void __init at91_add_device_tc(void) | ||
589 | { | ||
590 | /* this chip has a separate clock and irq for each TC channel */ | ||
591 | at91_clock_associate("tc0_clk", &at572d940hf_tcb_device.dev, "t0_clk"); | ||
592 | at91_clock_associate("tc1_clk", &at572d940hf_tcb_device.dev, "t1_clk"); | ||
593 | at91_clock_associate("tc2_clk", &at572d940hf_tcb_device.dev, "t2_clk"); | ||
594 | platform_device_register(&at572d940hf_tcb_device); | ||
595 | } | ||
596 | #else | ||
597 | static void __init at91_add_device_tc(void) { } | ||
598 | #endif | ||
599 | |||
600 | |||
601 | /* -------------------------------------------------------------------- | ||
602 | * RTT | ||
603 | * -------------------------------------------------------------------- */ | ||
604 | |||
605 | static struct resource rtt_resources[] = { | ||
606 | { | ||
607 | .start = AT91_BASE_SYS + AT91_RTT, | ||
608 | .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, | ||
609 | .flags = IORESOURCE_MEM, | ||
610 | } | ||
611 | }; | ||
612 | |||
613 | static struct platform_device at572d940hf_rtt_device = { | ||
614 | .name = "at91_rtt", | ||
615 | .id = 0, | ||
616 | .resource = rtt_resources, | ||
617 | .num_resources = ARRAY_SIZE(rtt_resources), | ||
618 | }; | ||
619 | |||
620 | static void __init at91_add_device_rtt(void) | ||
621 | { | ||
622 | platform_device_register(&at572d940hf_rtt_device); | ||
623 | } | ||
624 | |||
625 | |||
626 | /* -------------------------------------------------------------------- | ||
627 | * Watchdog | ||
628 | * -------------------------------------------------------------------- */ | ||
629 | |||
630 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) | ||
631 | static struct platform_device at572d940hf_wdt_device = { | ||
632 | .name = "at91_wdt", | ||
633 | .id = -1, | ||
634 | .num_resources = 0, | ||
635 | }; | ||
636 | |||
637 | static void __init at91_add_device_watchdog(void) | ||
638 | { | ||
639 | platform_device_register(&at572d940hf_wdt_device); | ||
640 | } | ||
641 | #else | ||
642 | static void __init at91_add_device_watchdog(void) {} | ||
643 | #endif | ||
644 | |||
645 | |||
646 | /* -------------------------------------------------------------------- | ||
647 | * UART | ||
648 | * -------------------------------------------------------------------- */ | ||
649 | |||
650 | #if defined(CONFIG_SERIAL_ATMEL) | ||
651 | static struct resource dbgu_resources[] = { | ||
652 | [0] = { | ||
653 | .start = AT91_VA_BASE_SYS + AT91_DBGU, | ||
654 | .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, | ||
655 | .flags = IORESOURCE_MEM, | ||
656 | }, | ||
657 | [1] = { | ||
658 | .start = AT91_ID_SYS, | ||
659 | .end = AT91_ID_SYS, | ||
660 | .flags = IORESOURCE_IRQ, | ||
661 | }, | ||
662 | }; | ||
663 | |||
664 | static struct atmel_uart_data dbgu_data = { | ||
665 | .use_dma_tx = 0, | ||
666 | .use_dma_rx = 0, /* DBGU not capable of receive DMA */ | ||
667 | .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), | ||
668 | }; | ||
669 | |||
670 | static u64 dbgu_dmamask = DMA_BIT_MASK(32); | ||
671 | |||
672 | static struct platform_device at572d940hf_dbgu_device = { | ||
673 | .name = "atmel_usart", | ||
674 | .id = 0, | ||
675 | .dev = { | ||
676 | .dma_mask = &dbgu_dmamask, | ||
677 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
678 | .platform_data = &dbgu_data, | ||
679 | }, | ||
680 | .resource = dbgu_resources, | ||
681 | .num_resources = ARRAY_SIZE(dbgu_resources), | ||
682 | }; | ||
683 | |||
684 | static inline void configure_dbgu_pins(void) | ||
685 | { | ||
686 | at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ | ||
687 | at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ | ||
688 | } | ||
689 | |||
690 | static struct resource uart0_resources[] = { | ||
691 | [0] = { | ||
692 | .start = AT572D940HF_BASE_US0, | ||
693 | .end = AT572D940HF_BASE_US0 + SZ_16K - 1, | ||
694 | .flags = IORESOURCE_MEM, | ||
695 | }, | ||
696 | [1] = { | ||
697 | .start = AT572D940HF_ID_US0, | ||
698 | .end = AT572D940HF_ID_US0, | ||
699 | .flags = IORESOURCE_IRQ, | ||
700 | }, | ||
701 | }; | ||
702 | |||
703 | static struct atmel_uart_data uart0_data = { | ||
704 | .use_dma_tx = 1, | ||
705 | .use_dma_rx = 1, | ||
706 | }; | ||
707 | |||
708 | static u64 uart0_dmamask = DMA_BIT_MASK(32); | ||
709 | |||
710 | static struct platform_device at572d940hf_uart0_device = { | ||
711 | .name = "atmel_usart", | ||
712 | .id = 1, | ||
713 | .dev = { | ||
714 | .dma_mask = &uart0_dmamask, | ||
715 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
716 | .platform_data = &uart0_data, | ||
717 | }, | ||
718 | .resource = uart0_resources, | ||
719 | .num_resources = ARRAY_SIZE(uart0_resources), | ||
720 | }; | ||
721 | |||
722 | static inline void configure_usart0_pins(unsigned pins) | ||
723 | { | ||
724 | at91_set_A_periph(AT91_PIN_PA8, 1); /* TXD0 */ | ||
725 | at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */ | ||
726 | |||
727 | if (pins & ATMEL_UART_RTS) | ||
728 | at91_set_A_periph(AT91_PIN_PA10, 0); /* RTS0 */ | ||
729 | if (pins & ATMEL_UART_CTS) | ||
730 | at91_set_A_periph(AT91_PIN_PA9, 0); /* CTS0 */ | ||
731 | } | ||
732 | |||
733 | static struct resource uart1_resources[] = { | ||
734 | [0] = { | ||
735 | .start = AT572D940HF_BASE_US1, | ||
736 | .end = AT572D940HF_BASE_US1 + SZ_16K - 1, | ||
737 | .flags = IORESOURCE_MEM, | ||
738 | }, | ||
739 | [1] = { | ||
740 | .start = AT572D940HF_ID_US1, | ||
741 | .end = AT572D940HF_ID_US1, | ||
742 | .flags = IORESOURCE_IRQ, | ||
743 | }, | ||
744 | }; | ||
745 | |||
746 | static struct atmel_uart_data uart1_data = { | ||
747 | .use_dma_tx = 1, | ||
748 | .use_dma_rx = 1, | ||
749 | }; | ||
750 | |||
751 | static u64 uart1_dmamask = DMA_BIT_MASK(32); | ||
752 | |||
753 | static struct platform_device at572d940hf_uart1_device = { | ||
754 | .name = "atmel_usart", | ||
755 | .id = 2, | ||
756 | .dev = { | ||
757 | .dma_mask = &uart1_dmamask, | ||
758 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
759 | .platform_data = &uart1_data, | ||
760 | }, | ||
761 | .resource = uart1_resources, | ||
762 | .num_resources = ARRAY_SIZE(uart1_resources), | ||
763 | }; | ||
764 | |||
765 | static inline void configure_usart1_pins(unsigned pins) | ||
766 | { | ||
767 | at91_set_A_periph(AT91_PIN_PC10, 1); /* TXD1 */ | ||
768 | at91_set_A_periph(AT91_PIN_PC9 , 0); /* RXD1 */ | ||
769 | |||
770 | if (pins & ATMEL_UART_RTS) | ||
771 | at91_set_A_periph(AT91_PIN_PC12, 0); /* RTS1 */ | ||
772 | if (pins & ATMEL_UART_CTS) | ||
773 | at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS1 */ | ||
774 | } | ||
775 | |||
776 | static struct resource uart2_resources[] = { | ||
777 | [0] = { | ||
778 | .start = AT572D940HF_BASE_US2, | ||
779 | .end = AT572D940HF_BASE_US2 + SZ_16K - 1, | ||
780 | .flags = IORESOURCE_MEM, | ||
781 | }, | ||
782 | [1] = { | ||
783 | .start = AT572D940HF_ID_US2, | ||
784 | .end = AT572D940HF_ID_US2, | ||
785 | .flags = IORESOURCE_IRQ, | ||
786 | }, | ||
787 | }; | ||
788 | |||
789 | static struct atmel_uart_data uart2_data = { | ||
790 | .use_dma_tx = 1, | ||
791 | .use_dma_rx = 1, | ||
792 | }; | ||
793 | |||
794 | static u64 uart2_dmamask = DMA_BIT_MASK(32); | ||
795 | |||
796 | static struct platform_device at572d940hf_uart2_device = { | ||
797 | .name = "atmel_usart", | ||
798 | .id = 3, | ||
799 | .dev = { | ||
800 | .dma_mask = &uart2_dmamask, | ||
801 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
802 | .platform_data = &uart2_data, | ||
803 | }, | ||
804 | .resource = uart2_resources, | ||
805 | .num_resources = ARRAY_SIZE(uart2_resources), | ||
806 | }; | ||
807 | |||
808 | static inline void configure_usart2_pins(unsigned pins) | ||
809 | { | ||
810 | at91_set_A_periph(AT91_PIN_PC15, 1); /* TXD2 */ | ||
811 | at91_set_A_periph(AT91_PIN_PC14, 0); /* RXD2 */ | ||
812 | |||
813 | if (pins & ATMEL_UART_RTS) | ||
814 | at91_set_A_periph(AT91_PIN_PC17, 0); /* RTS2 */ | ||
815 | if (pins & ATMEL_UART_CTS) | ||
816 | at91_set_A_periph(AT91_PIN_PC16, 0); /* CTS2 */ | ||
817 | } | ||
818 | |||
819 | static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ | ||
820 | struct platform_device *atmel_default_console_device; /* the serial console device */ | ||
821 | |||
822 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | ||
823 | { | ||
824 | struct platform_device *pdev; | ||
825 | |||
826 | switch (id) { | ||
827 | case 0: /* DBGU */ | ||
828 | pdev = &at572d940hf_dbgu_device; | ||
829 | configure_dbgu_pins(); | ||
830 | at91_clock_associate("mck", &pdev->dev, "usart"); | ||
831 | break; | ||
832 | case AT572D940HF_ID_US0: | ||
833 | pdev = &at572d940hf_uart0_device; | ||
834 | configure_usart0_pins(pins); | ||
835 | at91_clock_associate("usart0_clk", &pdev->dev, "usart"); | ||
836 | break; | ||
837 | case AT572D940HF_ID_US1: | ||
838 | pdev = &at572d940hf_uart1_device; | ||
839 | configure_usart1_pins(pins); | ||
840 | at91_clock_associate("usart1_clk", &pdev->dev, "usart"); | ||
841 | break; | ||
842 | case AT572D940HF_ID_US2: | ||
843 | pdev = &at572d940hf_uart2_device; | ||
844 | configure_usart2_pins(pins); | ||
845 | at91_clock_associate("usart2_clk", &pdev->dev, "usart"); | ||
846 | break; | ||
847 | default: | ||
848 | return; | ||
849 | } | ||
850 | pdev->id = portnr; /* update to mapped ID */ | ||
851 | |||
852 | if (portnr < ATMEL_MAX_UART) | ||
853 | at91_uarts[portnr] = pdev; | ||
854 | } | ||
855 | |||
856 | void __init at91_set_serial_console(unsigned portnr) | ||
857 | { | ||
858 | if (portnr < ATMEL_MAX_UART) | ||
859 | atmel_default_console_device = at91_uarts[portnr]; | ||
860 | } | ||
861 | |||
862 | void __init at91_add_device_serial(void) | ||
863 | { | ||
864 | int i; | ||
865 | |||
866 | for (i = 0; i < ATMEL_MAX_UART; i++) { | ||
867 | if (at91_uarts[i]) | ||
868 | platform_device_register(at91_uarts[i]); | ||
869 | } | ||
870 | |||
871 | if (!atmel_default_console_device) | ||
872 | printk(KERN_INFO "AT91: No default serial console defined.\n"); | ||
873 | } | ||
874 | |||
875 | #else | ||
876 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} | ||
877 | void __init at91_set_serial_console(unsigned portnr) {} | ||
878 | void __init at91_add_device_serial(void) {} | ||
879 | #endif | ||
880 | |||
881 | |||
882 | /* -------------------------------------------------------------------- | ||
883 | * mAgic | ||
884 | * -------------------------------------------------------------------- */ | ||
885 | |||
886 | #ifdef CONFIG_MAGICV | ||
887 | static struct resource mAgic_resources[] = { | ||
888 | { | ||
889 | .start = AT91_MAGIC_PM_BASE, | ||
890 | .end = AT91_MAGIC_PM_BASE + AT91_MAGIC_PM_SIZE - 1, | ||
891 | .flags = IORESOURCE_MEM, | ||
892 | }, | ||
893 | { | ||
894 | .start = AT91_MAGIC_DM_I_BASE, | ||
895 | .end = AT91_MAGIC_DM_I_BASE + AT91_MAGIC_DM_I_SIZE - 1, | ||
896 | .flags = IORESOURCE_MEM, | ||
897 | }, | ||
898 | { | ||
899 | .start = AT91_MAGIC_DM_F_BASE, | ||
900 | .end = AT91_MAGIC_DM_F_BASE + AT91_MAGIC_DM_F_SIZE - 1, | ||
901 | .flags = IORESOURCE_MEM, | ||
902 | }, | ||
903 | { | ||
904 | .start = AT91_MAGIC_DM_DB_BASE, | ||
905 | .end = AT91_MAGIC_DM_DB_BASE + AT91_MAGIC_DM_DB_SIZE - 1, | ||
906 | .flags = IORESOURCE_MEM, | ||
907 | }, | ||
908 | { | ||
909 | .start = AT91_MAGIC_REGS_BASE, | ||
910 | .end = AT91_MAGIC_REGS_BASE + AT91_MAGIC_REGS_SIZE - 1, | ||
911 | .flags = IORESOURCE_MEM, | ||
912 | }, | ||
913 | { | ||
914 | .start = AT91_MAGIC_EXTPAGE_BASE, | ||
915 | .end = AT91_MAGIC_EXTPAGE_BASE + AT91_MAGIC_EXTPAGE_SIZE - 1, | ||
916 | .flags = IORESOURCE_MEM, | ||
917 | }, | ||
918 | { | ||
919 | .start = AT572D940HF_ID_MSIRQ0, | ||
920 | .end = AT572D940HF_ID_MSIRQ0, | ||
921 | .flags = IORESOURCE_IRQ, | ||
922 | }, | ||
923 | { | ||
924 | .start = AT572D940HF_ID_MHALT, | ||
925 | .end = AT572D940HF_ID_MHALT, | ||
926 | .flags = IORESOURCE_IRQ, | ||
927 | }, | ||
928 | { | ||
929 | .start = AT572D940HF_ID_MEXC, | ||
930 | .end = AT572D940HF_ID_MEXC, | ||
931 | .flags = IORESOURCE_IRQ, | ||
932 | }, | ||
933 | { | ||
934 | .start = AT572D940HF_ID_MEDMA, | ||
935 | .end = AT572D940HF_ID_MEDMA, | ||
936 | .flags = IORESOURCE_IRQ, | ||
937 | }, | ||
938 | }; | ||
939 | |||
940 | static struct platform_device mAgic_device = { | ||
941 | .name = "mAgic", | ||
942 | .id = -1, | ||
943 | .num_resources = ARRAY_SIZE(mAgic_resources), | ||
944 | .resource = mAgic_resources, | ||
945 | }; | ||
946 | |||
947 | void __init at91_add_device_mAgic(void) | ||
948 | { | ||
949 | platform_device_register(&mAgic_device); | ||
950 | } | ||
951 | #else | ||
952 | void __init at91_add_device_mAgic(void) {} | ||
953 | #endif | ||
954 | |||
955 | |||
956 | /* -------------------------------------------------------------------- */ | ||
957 | |||
958 | /* | ||
959 | * These devices are always present and don't need any board-specific | ||
960 | * setup. | ||
961 | */ | ||
962 | static int __init at91_add_standard_devices(void) | ||
963 | { | ||
964 | at91_add_device_rtt(); | ||
965 | at91_add_device_watchdog(); | ||
966 | at91_add_device_tc(); | ||
967 | return 0; | ||
968 | } | ||
969 | |||
970 | arch_initcall(at91_add_standard_devices); | ||
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c index 73376170fb91..17fae4a42ab5 100644 --- a/arch/arm/mach-at91/at91cap9.c +++ b/arch/arm/mach-at91/at91cap9.c | |||
@@ -222,6 +222,25 @@ static struct clk *periph_clocks[] __initdata = { | |||
222 | // irq0 .. irq1 | 222 | // irq0 .. irq1 |
223 | }; | 223 | }; |
224 | 224 | ||
225 | static struct clk_lookup periph_clocks_lookups[] = { | ||
226 | CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc.0", &utmi_clk), | ||
227 | CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc.0", &udphs_clk), | ||
228 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), | ||
229 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk), | ||
230 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), | ||
231 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), | ||
232 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), | ||
233 | CLKDEV_CON_DEV_ID("ssc", "ssc.0", &ssc0_clk), | ||
234 | CLKDEV_CON_DEV_ID("ssc", "ssc.1", &ssc1_clk), | ||
235 | }; | ||
236 | |||
237 | static struct clk_lookup usart_clocks_lookups[] = { | ||
238 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck), | ||
239 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk), | ||
240 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk), | ||
241 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk), | ||
242 | }; | ||
243 | |||
225 | /* | 244 | /* |
226 | * The four programmable clocks. | 245 | * The four programmable clocks. |
227 | * You must configure pin multiplexing to bring these signals out. | 246 | * You must configure pin multiplexing to bring these signals out. |
@@ -258,12 +277,29 @@ static void __init at91cap9_register_clocks(void) | |||
258 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) | 277 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) |
259 | clk_register(periph_clocks[i]); | 278 | clk_register(periph_clocks[i]); |
260 | 279 | ||
280 | clkdev_add_table(periph_clocks_lookups, | ||
281 | ARRAY_SIZE(periph_clocks_lookups)); | ||
282 | clkdev_add_table(usart_clocks_lookups, | ||
283 | ARRAY_SIZE(usart_clocks_lookups)); | ||
284 | |||
261 | clk_register(&pck0); | 285 | clk_register(&pck0); |
262 | clk_register(&pck1); | 286 | clk_register(&pck1); |
263 | clk_register(&pck2); | 287 | clk_register(&pck2); |
264 | clk_register(&pck3); | 288 | clk_register(&pck3); |
265 | } | 289 | } |
266 | 290 | ||
291 | static struct clk_lookup console_clock_lookup; | ||
292 | |||
293 | void __init at91cap9_set_console_clock(int id) | ||
294 | { | ||
295 | if (id >= ARRAY_SIZE(usart_clocks_lookups)) | ||
296 | return; | ||
297 | |||
298 | console_clock_lookup.con_id = "usart"; | ||
299 | console_clock_lookup.clk = usart_clocks_lookups[id].clk; | ||
300 | clkdev_add(&console_clock_lookup); | ||
301 | } | ||
302 | |||
267 | /* -------------------------------------------------------------------- | 303 | /* -------------------------------------------------------------------- |
268 | * GPIO | 304 | * GPIO |
269 | * -------------------------------------------------------------------- */ | 305 | * -------------------------------------------------------------------- */ |
@@ -303,11 +339,14 @@ static void at91cap9_poweroff(void) | |||
303 | * AT91CAP9 processor initialization | 339 | * AT91CAP9 processor initialization |
304 | * -------------------------------------------------------------------- */ | 340 | * -------------------------------------------------------------------- */ |
305 | 341 | ||
306 | void __init at91cap9_initialize(unsigned long main_clock) | 342 | void __init at91cap9_map_io(void) |
307 | { | 343 | { |
308 | /* Map peripherals */ | 344 | /* Map peripherals */ |
309 | iotable_init(at91cap9_io_desc, ARRAY_SIZE(at91cap9_io_desc)); | 345 | iotable_init(at91cap9_io_desc, ARRAY_SIZE(at91cap9_io_desc)); |
346 | } | ||
310 | 347 | ||
348 | void __init at91cap9_initialize(unsigned long main_clock) | ||
349 | { | ||
311 | at91_arch_reset = at91cap9_reset; | 350 | at91_arch_reset = at91cap9_reset; |
312 | pm_power_off = at91cap9_poweroff; | 351 | pm_power_off = at91cap9_poweroff; |
313 | at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); | 352 | at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); |
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c index 21020ceb2f3a..cd850ed6f335 100644 --- a/arch/arm/mach-at91/at91cap9_devices.c +++ b/arch/arm/mach-at91/at91cap9_devices.c | |||
@@ -181,10 +181,6 @@ void __init at91_add_device_usba(struct usba_platform_data *data) | |||
181 | 181 | ||
182 | /* Pullup pin is handled internally by USB device peripheral */ | 182 | /* Pullup pin is handled internally by USB device peripheral */ |
183 | 183 | ||
184 | /* Clocks */ | ||
185 | at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk"); | ||
186 | at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk"); | ||
187 | |||
188 | platform_device_register(&at91_usba_udc_device); | 184 | platform_device_register(&at91_usba_udc_device); |
189 | } | 185 | } |
190 | #else | 186 | #else |
@@ -355,7 +351,6 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | |||
355 | } | 351 | } |
356 | 352 | ||
357 | mmc0_data = *data; | 353 | mmc0_data = *data; |
358 | at91_clock_associate("mci0_clk", &at91cap9_mmc0_device.dev, "mci_clk"); | ||
359 | platform_device_register(&at91cap9_mmc0_device); | 354 | platform_device_register(&at91cap9_mmc0_device); |
360 | } else { /* MCI1 */ | 355 | } else { /* MCI1 */ |
361 | /* CLK */ | 356 | /* CLK */ |
@@ -373,7 +368,6 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | |||
373 | } | 368 | } |
374 | 369 | ||
375 | mmc1_data = *data; | 370 | mmc1_data = *data; |
376 | at91_clock_associate("mci1_clk", &at91cap9_mmc1_device.dev, "mci_clk"); | ||
377 | platform_device_register(&at91cap9_mmc1_device); | 371 | platform_device_register(&at91cap9_mmc1_device); |
378 | } | 372 | } |
379 | } | 373 | } |
@@ -614,7 +608,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | |||
614 | at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ | 608 | at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ |
615 | at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ | 609 | at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ |
616 | 610 | ||
617 | at91_clock_associate("spi0_clk", &at91cap9_spi0_device.dev, "spi_clk"); | ||
618 | platform_device_register(&at91cap9_spi0_device); | 611 | platform_device_register(&at91cap9_spi0_device); |
619 | } | 612 | } |
620 | if (enable_spi1) { | 613 | if (enable_spi1) { |
@@ -622,7 +615,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | |||
622 | at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */ | 615 | at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */ |
623 | at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */ | 616 | at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */ |
624 | 617 | ||
625 | at91_clock_associate("spi1_clk", &at91cap9_spi1_device.dev, "spi_clk"); | ||
626 | platform_device_register(&at91cap9_spi1_device); | 618 | platform_device_register(&at91cap9_spi1_device); |
627 | } | 619 | } |
628 | } | 620 | } |
@@ -659,8 +651,6 @@ static struct platform_device at91cap9_tcb_device = { | |||
659 | 651 | ||
660 | static void __init at91_add_device_tc(void) | 652 | static void __init at91_add_device_tc(void) |
661 | { | 653 | { |
662 | /* this chip has one clock and irq for all three TC channels */ | ||
663 | at91_clock_associate("tcb_clk", &at91cap9_tcb_device.dev, "t0_clk"); | ||
664 | platform_device_register(&at91cap9_tcb_device); | 654 | platform_device_register(&at91cap9_tcb_device); |
665 | } | 655 | } |
666 | #else | 656 | #else |
@@ -1001,12 +991,10 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) | |||
1001 | case AT91CAP9_ID_SSC0: | 991 | case AT91CAP9_ID_SSC0: |
1002 | pdev = &at91cap9_ssc0_device; | 992 | pdev = &at91cap9_ssc0_device; |
1003 | configure_ssc0_pins(pins); | 993 | configure_ssc0_pins(pins); |
1004 | at91_clock_associate("ssc0_clk", &pdev->dev, "ssc"); | ||
1005 | break; | 994 | break; |
1006 | case AT91CAP9_ID_SSC1: | 995 | case AT91CAP9_ID_SSC1: |
1007 | pdev = &at91cap9_ssc1_device; | 996 | pdev = &at91cap9_ssc1_device; |
1008 | configure_ssc1_pins(pins); | 997 | configure_ssc1_pins(pins); |
1009 | at91_clock_associate("ssc1_clk", &pdev->dev, "ssc"); | ||
1010 | break; | 998 | break; |
1011 | default: | 999 | default: |
1012 | return; | 1000 | return; |
@@ -1199,32 +1187,30 @@ struct platform_device *atmel_default_console_device; /* the serial console devi | |||
1199 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | 1187 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) |
1200 | { | 1188 | { |
1201 | struct platform_device *pdev; | 1189 | struct platform_device *pdev; |
1190 | struct atmel_uart_data *pdata; | ||
1202 | 1191 | ||
1203 | switch (id) { | 1192 | switch (id) { |
1204 | case 0: /* DBGU */ | 1193 | case 0: /* DBGU */ |
1205 | pdev = &at91cap9_dbgu_device; | 1194 | pdev = &at91cap9_dbgu_device; |
1206 | configure_dbgu_pins(); | 1195 | configure_dbgu_pins(); |
1207 | at91_clock_associate("mck", &pdev->dev, "usart"); | ||
1208 | break; | 1196 | break; |
1209 | case AT91CAP9_ID_US0: | 1197 | case AT91CAP9_ID_US0: |
1210 | pdev = &at91cap9_uart0_device; | 1198 | pdev = &at91cap9_uart0_device; |
1211 | configure_usart0_pins(pins); | 1199 | configure_usart0_pins(pins); |
1212 | at91_clock_associate("usart0_clk", &pdev->dev, "usart"); | ||
1213 | break; | 1200 | break; |
1214 | case AT91CAP9_ID_US1: | 1201 | case AT91CAP9_ID_US1: |
1215 | pdev = &at91cap9_uart1_device; | 1202 | pdev = &at91cap9_uart1_device; |
1216 | configure_usart1_pins(pins); | 1203 | configure_usart1_pins(pins); |
1217 | at91_clock_associate("usart1_clk", &pdev->dev, "usart"); | ||
1218 | break; | 1204 | break; |
1219 | case AT91CAP9_ID_US2: | 1205 | case AT91CAP9_ID_US2: |
1220 | pdev = &at91cap9_uart2_device; | 1206 | pdev = &at91cap9_uart2_device; |
1221 | configure_usart2_pins(pins); | 1207 | configure_usart2_pins(pins); |
1222 | at91_clock_associate("usart2_clk", &pdev->dev, "usart"); | ||
1223 | break; | 1208 | break; |
1224 | default: | 1209 | default: |
1225 | return; | 1210 | return; |
1226 | } | 1211 | } |
1227 | pdev->id = portnr; /* update to mapped ID */ | 1212 | pdata = pdev->dev.platform_data; |
1213 | pdata->num = portnr; /* update to mapped ID */ | ||
1228 | 1214 | ||
1229 | if (portnr < ATMEL_MAX_UART) | 1215 | if (portnr < ATMEL_MAX_UART) |
1230 | at91_uarts[portnr] = pdev; | 1216 | at91_uarts[portnr] = pdev; |
@@ -1232,8 +1218,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | |||
1232 | 1218 | ||
1233 | void __init at91_set_serial_console(unsigned portnr) | 1219 | void __init at91_set_serial_console(unsigned portnr) |
1234 | { | 1220 | { |
1235 | if (portnr < ATMEL_MAX_UART) | 1221 | if (portnr < ATMEL_MAX_UART) { |
1236 | atmel_default_console_device = at91_uarts[portnr]; | 1222 | atmel_default_console_device = at91_uarts[portnr]; |
1223 | at91cap9_set_console_clock(portnr); | ||
1224 | } | ||
1237 | } | 1225 | } |
1238 | 1226 | ||
1239 | void __init at91_add_device_serial(void) | 1227 | void __init at91_add_device_serial(void) |
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 2e9ecad97f3d..b228ce9e21a1 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <mach/at91rm9200.h> | 18 | #include <mach/at91rm9200.h> |
19 | #include <mach/at91_pmc.h> | 19 | #include <mach/at91_pmc.h> |
20 | #include <mach/at91_st.h> | 20 | #include <mach/at91_st.h> |
21 | #include <mach/cpu.h> | ||
21 | 22 | ||
22 | #include "generic.h" | 23 | #include "generic.h" |
23 | #include "clock.h" | 24 | #include "clock.h" |
@@ -191,6 +192,26 @@ static struct clk *periph_clocks[] __initdata = { | |||
191 | // irq0 .. irq6 | 192 | // irq0 .. irq6 |
192 | }; | 193 | }; |
193 | 194 | ||
195 | static struct clk_lookup periph_clocks_lookups[] = { | ||
196 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk), | ||
197 | CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk), | ||
198 | CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), | ||
199 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk), | ||
200 | CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk), | ||
201 | CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk), | ||
202 | CLKDEV_CON_DEV_ID("ssc", "ssc.0", &ssc0_clk), | ||
203 | CLKDEV_CON_DEV_ID("ssc", "ssc.1", &ssc1_clk), | ||
204 | CLKDEV_CON_DEV_ID("ssc", "ssc.2", &ssc2_clk), | ||
205 | }; | ||
206 | |||
207 | static struct clk_lookup usart_clocks_lookups[] = { | ||
208 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck), | ||
209 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk), | ||
210 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk), | ||
211 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk), | ||
212 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk), | ||
213 | }; | ||
214 | |||
194 | /* | 215 | /* |
195 | * The four programmable clocks. | 216 | * The four programmable clocks. |
196 | * You must configure pin multiplexing to bring these signals out. | 217 | * You must configure pin multiplexing to bring these signals out. |
@@ -227,12 +248,29 @@ static void __init at91rm9200_register_clocks(void) | |||
227 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) | 248 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) |
228 | clk_register(periph_clocks[i]); | 249 | clk_register(periph_clocks[i]); |
229 | 250 | ||
251 | clkdev_add_table(periph_clocks_lookups, | ||
252 | ARRAY_SIZE(periph_clocks_lookups)); | ||
253 | clkdev_add_table(usart_clocks_lookups, | ||
254 | ARRAY_SIZE(usart_clocks_lookups)); | ||
255 | |||
230 | clk_register(&pck0); | 256 | clk_register(&pck0); |
231 | clk_register(&pck1); | 257 | clk_register(&pck1); |
232 | clk_register(&pck2); | 258 | clk_register(&pck2); |
233 | clk_register(&pck3); | 259 | clk_register(&pck3); |
234 | } | 260 | } |
235 | 261 | ||
262 | static struct clk_lookup console_clock_lookup; | ||
263 | |||
264 | void __init at91rm9200_set_console_clock(int id) | ||
265 | { | ||
266 | if (id >= ARRAY_SIZE(usart_clocks_lookups)) | ||
267 | return; | ||
268 | |||
269 | console_clock_lookup.con_id = "usart"; | ||
270 | console_clock_lookup.clk = usart_clocks_lookups[id].clk; | ||
271 | clkdev_add(&console_clock_lookup); | ||
272 | } | ||
273 | |||
236 | /* -------------------------------------------------------------------- | 274 | /* -------------------------------------------------------------------- |
237 | * GPIO | 275 | * GPIO |
238 | * -------------------------------------------------------------------- */ | 276 | * -------------------------------------------------------------------- */ |
@@ -266,15 +304,25 @@ static void at91rm9200_reset(void) | |||
266 | at91_sys_write(AT91_ST_CR, AT91_ST_WDRST); | 304 | at91_sys_write(AT91_ST_CR, AT91_ST_WDRST); |
267 | } | 305 | } |
268 | 306 | ||
307 | int rm9200_type; | ||
308 | EXPORT_SYMBOL(rm9200_type); | ||
309 | |||
310 | void __init at91rm9200_set_type(int type) | ||
311 | { | ||
312 | rm9200_type = type; | ||
313 | } | ||
269 | 314 | ||
270 | /* -------------------------------------------------------------------- | 315 | /* -------------------------------------------------------------------- |
271 | * AT91RM9200 processor initialization | 316 | * AT91RM9200 processor initialization |
272 | * -------------------------------------------------------------------- */ | 317 | * -------------------------------------------------------------------- */ |
273 | void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks) | 318 | void __init at91rm9200_map_io(void) |
274 | { | 319 | { |
275 | /* Map peripherals */ | 320 | /* Map peripherals */ |
276 | iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); | 321 | iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); |
322 | } | ||
277 | 323 | ||
324 | void __init at91rm9200_initialize(unsigned long main_clock) | ||
325 | { | ||
278 | at91_arch_reset = at91rm9200_reset; | 326 | at91_arch_reset = at91rm9200_reset; |
279 | at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) | 327 | at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) |
280 | | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) | 328 | | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) |
@@ -288,7 +336,8 @@ void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks | |||
288 | at91rm9200_register_clocks(); | 336 | at91rm9200_register_clocks(); |
289 | 337 | ||
290 | /* Initialize GPIO subsystem */ | 338 | /* Initialize GPIO subsystem */ |
291 | at91_gpio_init(at91rm9200_gpio, banks); | 339 | at91_gpio_init(at91rm9200_gpio, |
340 | cpu_is_at91rm9200_bga() ? AT91RM9200_BGA : AT91RM9200_PQFP); | ||
292 | } | 341 | } |
293 | 342 | ||
294 | 343 | ||
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index 7b539228e0ef..a0ba475be04c 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c | |||
@@ -644,15 +644,7 @@ static struct platform_device at91rm9200_tcb1_device = { | |||
644 | 644 | ||
645 | static void __init at91_add_device_tc(void) | 645 | static void __init at91_add_device_tc(void) |
646 | { | 646 | { |
647 | /* this chip has a separate clock and irq for each TC channel */ | ||
648 | at91_clock_associate("tc0_clk", &at91rm9200_tcb0_device.dev, "t0_clk"); | ||
649 | at91_clock_associate("tc1_clk", &at91rm9200_tcb0_device.dev, "t1_clk"); | ||
650 | at91_clock_associate("tc2_clk", &at91rm9200_tcb0_device.dev, "t2_clk"); | ||
651 | platform_device_register(&at91rm9200_tcb0_device); | 647 | platform_device_register(&at91rm9200_tcb0_device); |
652 | |||
653 | at91_clock_associate("tc3_clk", &at91rm9200_tcb1_device.dev, "t0_clk"); | ||
654 | at91_clock_associate("tc4_clk", &at91rm9200_tcb1_device.dev, "t1_clk"); | ||
655 | at91_clock_associate("tc5_clk", &at91rm9200_tcb1_device.dev, "t2_clk"); | ||
656 | platform_device_register(&at91rm9200_tcb1_device); | 648 | platform_device_register(&at91rm9200_tcb1_device); |
657 | } | 649 | } |
658 | #else | 650 | #else |
@@ -849,17 +841,14 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) | |||
849 | case AT91RM9200_ID_SSC0: | 841 | case AT91RM9200_ID_SSC0: |
850 | pdev = &at91rm9200_ssc0_device; | 842 | pdev = &at91rm9200_ssc0_device; |
851 | configure_ssc0_pins(pins); | 843 | configure_ssc0_pins(pins); |
852 | at91_clock_associate("ssc0_clk", &pdev->dev, "ssc"); | ||
853 | break; | 844 | break; |
854 | case AT91RM9200_ID_SSC1: | 845 | case AT91RM9200_ID_SSC1: |
855 | pdev = &at91rm9200_ssc1_device; | 846 | pdev = &at91rm9200_ssc1_device; |
856 | configure_ssc1_pins(pins); | 847 | configure_ssc1_pins(pins); |
857 | at91_clock_associate("ssc1_clk", &pdev->dev, "ssc"); | ||
858 | break; | 848 | break; |
859 | case AT91RM9200_ID_SSC2: | 849 | case AT91RM9200_ID_SSC2: |
860 | pdev = &at91rm9200_ssc2_device; | 850 | pdev = &at91rm9200_ssc2_device; |
861 | configure_ssc2_pins(pins); | 851 | configure_ssc2_pins(pins); |
862 | at91_clock_associate("ssc2_clk", &pdev->dev, "ssc"); | ||
863 | break; | 852 | break; |
864 | default: | 853 | default: |
865 | return; | 854 | return; |
@@ -1109,37 +1098,34 @@ struct platform_device *atmel_default_console_device; /* the serial console devi | |||
1109 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | 1098 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) |
1110 | { | 1099 | { |
1111 | struct platform_device *pdev; | 1100 | struct platform_device *pdev; |
1101 | struct atmel_uart_data *pdata; | ||
1112 | 1102 | ||
1113 | switch (id) { | 1103 | switch (id) { |
1114 | case 0: /* DBGU */ | 1104 | case 0: /* DBGU */ |
1115 | pdev = &at91rm9200_dbgu_device; | 1105 | pdev = &at91rm9200_dbgu_device; |
1116 | configure_dbgu_pins(); | 1106 | configure_dbgu_pins(); |
1117 | at91_clock_associate("mck", &pdev->dev, "usart"); | ||
1118 | break; | 1107 | break; |
1119 | case AT91RM9200_ID_US0: | 1108 | case AT91RM9200_ID_US0: |
1120 | pdev = &at91rm9200_uart0_device; | 1109 | pdev = &at91rm9200_uart0_device; |
1121 | configure_usart0_pins(pins); | 1110 | configure_usart0_pins(pins); |
1122 | at91_clock_associate("usart0_clk", &pdev->dev, "usart"); | ||
1123 | break; | 1111 | break; |
1124 | case AT91RM9200_ID_US1: | 1112 | case AT91RM9200_ID_US1: |
1125 | pdev = &at91rm9200_uart1_device; | 1113 | pdev = &at91rm9200_uart1_device; |
1126 | configure_usart1_pins(pins); | 1114 | configure_usart1_pins(pins); |
1127 | at91_clock_associate("usart1_clk", &pdev->dev, "usart"); | ||
1128 | break; | 1115 | break; |
1129 | case AT91RM9200_ID_US2: | 1116 | case AT91RM9200_ID_US2: |
1130 | pdev = &at91rm9200_uart2_device; | 1117 | pdev = &at91rm9200_uart2_device; |
1131 | configure_usart2_pins(pins); | 1118 | configure_usart2_pins(pins); |
1132 | at91_clock_associate("usart2_clk", &pdev->dev, "usart"); | ||
1133 | break; | 1119 | break; |
1134 | case AT91RM9200_ID_US3: | 1120 | case AT91RM9200_ID_US3: |
1135 | pdev = &at91rm9200_uart3_device; | 1121 | pdev = &at91rm9200_uart3_device; |
1136 | configure_usart3_pins(pins); | 1122 | configure_usart3_pins(pins); |
1137 | at91_clock_associate("usart3_clk", &pdev->dev, "usart"); | ||
1138 | break; | 1123 | break; |
1139 | default: | 1124 | default: |
1140 | return; | 1125 | return; |
1141 | } | 1126 | } |
1142 | pdev->id = portnr; /* update to mapped ID */ | 1127 | pdata = pdev->dev.platform_data; |
1128 | pdata->num = portnr; /* update to mapped ID */ | ||
1143 | 1129 | ||
1144 | if (portnr < ATMEL_MAX_UART) | 1130 | if (portnr < ATMEL_MAX_UART) |
1145 | at91_uarts[portnr] = pdev; | 1131 | at91_uarts[portnr] = pdev; |
@@ -1147,8 +1133,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | |||
1147 | 1133 | ||
1148 | void __init at91_set_serial_console(unsigned portnr) | 1134 | void __init at91_set_serial_console(unsigned portnr) |
1149 | { | 1135 | { |
1150 | if (portnr < ATMEL_MAX_UART) | 1136 | if (portnr < ATMEL_MAX_UART) { |
1151 | atmel_default_console_device = at91_uarts[portnr]; | 1137 | atmel_default_console_device = at91_uarts[portnr]; |
1138 | at91rm9200_set_console_clock(portnr); | ||
1139 | } | ||
1152 | } | 1140 | } |
1153 | 1141 | ||
1154 | void __init at91_add_device_serial(void) | 1142 | void __init at91_add_device_serial(void) |
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index 195208b30024..7d606b04d313 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c | |||
@@ -231,6 +231,28 @@ static struct clk *periph_clocks[] __initdata = { | |||
231 | // irq0 .. irq2 | 231 | // irq0 .. irq2 |
232 | }; | 232 | }; |
233 | 233 | ||
234 | static struct clk_lookup periph_clocks_lookups[] = { | ||
235 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), | ||
236 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), | ||
237 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk), | ||
238 | CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk), | ||
239 | CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), | ||
240 | CLKDEV_CON_DEV_ID("t3_clk", "atmel_tcb.1", &tc3_clk), | ||
241 | CLKDEV_CON_DEV_ID("t4_clk", "atmel_tcb.1", &tc4_clk), | ||
242 | CLKDEV_CON_DEV_ID("t5_clk", "atmel_tcb.1", &tc5_clk), | ||
243 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk), | ||
244 | }; | ||
245 | |||
246 | static struct clk_lookup usart_clocks_lookups[] = { | ||
247 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck), | ||
248 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk), | ||
249 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk), | ||
250 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk), | ||
251 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk), | ||
252 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.5", &usart4_clk), | ||
253 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.6", &usart5_clk), | ||
254 | }; | ||
255 | |||
234 | /* | 256 | /* |
235 | * The two programmable clocks. | 257 | * The two programmable clocks. |
236 | * You must configure pin multiplexing to bring these signals out. | 258 | * You must configure pin multiplexing to bring these signals out. |
@@ -255,10 +277,27 @@ static void __init at91sam9260_register_clocks(void) | |||
255 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) | 277 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) |
256 | clk_register(periph_clocks[i]); | 278 | clk_register(periph_clocks[i]); |
257 | 279 | ||
280 | clkdev_add_table(periph_clocks_lookups, | ||
281 | ARRAY_SIZE(periph_clocks_lookups)); | ||
282 | clkdev_add_table(usart_clocks_lookups, | ||
283 | ARRAY_SIZE(usart_clocks_lookups)); | ||
284 | |||
258 | clk_register(&pck0); | 285 | clk_register(&pck0); |
259 | clk_register(&pck1); | 286 | clk_register(&pck1); |
260 | } | 287 | } |
261 | 288 | ||
289 | static struct clk_lookup console_clock_lookup; | ||
290 | |||
291 | void __init at91sam9260_set_console_clock(int id) | ||
292 | { | ||
293 | if (id >= ARRAY_SIZE(usart_clocks_lookups)) | ||
294 | return; | ||
295 | |||
296 | console_clock_lookup.con_id = "usart"; | ||
297 | console_clock_lookup.clk = usart_clocks_lookups[id].clk; | ||
298 | clkdev_add(&console_clock_lookup); | ||
299 | } | ||
300 | |||
262 | /* -------------------------------------------------------------------- | 301 | /* -------------------------------------------------------------------- |
263 | * GPIO | 302 | * GPIO |
264 | * -------------------------------------------------------------------- */ | 303 | * -------------------------------------------------------------------- */ |
@@ -289,7 +328,7 @@ static void at91sam9260_poweroff(void) | |||
289 | * AT91SAM9260 processor initialization | 328 | * AT91SAM9260 processor initialization |
290 | * -------------------------------------------------------------------- */ | 329 | * -------------------------------------------------------------------- */ |
291 | 330 | ||
292 | static void __init at91sam9xe_initialize(void) | 331 | static void __init at91sam9xe_map_io(void) |
293 | { | 332 | { |
294 | unsigned long cidr, sram_size; | 333 | unsigned long cidr, sram_size; |
295 | 334 | ||
@@ -310,18 +349,21 @@ static void __init at91sam9xe_initialize(void) | |||
310 | iotable_init(at91sam9xe_sram_desc, ARRAY_SIZE(at91sam9xe_sram_desc)); | 349 | iotable_init(at91sam9xe_sram_desc, ARRAY_SIZE(at91sam9xe_sram_desc)); |
311 | } | 350 | } |
312 | 351 | ||
313 | void __init at91sam9260_initialize(unsigned long main_clock) | 352 | void __init at91sam9260_map_io(void) |
314 | { | 353 | { |
315 | /* Map peripherals */ | 354 | /* Map peripherals */ |
316 | iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc)); | 355 | iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc)); |
317 | 356 | ||
318 | if (cpu_is_at91sam9xe()) | 357 | if (cpu_is_at91sam9xe()) |
319 | at91sam9xe_initialize(); | 358 | at91sam9xe_map_io(); |
320 | else if (cpu_is_at91sam9g20()) | 359 | else if (cpu_is_at91sam9g20()) |
321 | iotable_init(at91sam9g20_sram_desc, ARRAY_SIZE(at91sam9g20_sram_desc)); | 360 | iotable_init(at91sam9g20_sram_desc, ARRAY_SIZE(at91sam9g20_sram_desc)); |
322 | else | 361 | else |
323 | iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc)); | 362 | iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc)); |
363 | } | ||
324 | 364 | ||
365 | void __init at91sam9260_initialize(unsigned long main_clock) | ||
366 | { | ||
325 | at91_arch_reset = at91sam9_alt_reset; | 367 | at91_arch_reset = at91sam9_alt_reset; |
326 | pm_power_off = at91sam9260_poweroff; | 368 | pm_power_off = at91sam9260_poweroff; |
327 | at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) | 369 | at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) |
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index 07eb7b07e442..1fdeb9058a76 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c | |||
@@ -609,7 +609,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | |||
609 | at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ | 609 | at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ |
610 | at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */ | 610 | at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */ |
611 | 611 | ||
612 | at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk"); | ||
613 | platform_device_register(&at91sam9260_spi0_device); | 612 | platform_device_register(&at91sam9260_spi0_device); |
614 | } | 613 | } |
615 | if (enable_spi1) { | 614 | if (enable_spi1) { |
@@ -617,7 +616,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | |||
617 | at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */ | 616 | at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */ |
618 | at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */ | 617 | at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */ |
619 | 618 | ||
620 | at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk"); | ||
621 | platform_device_register(&at91sam9260_spi1_device); | 619 | platform_device_register(&at91sam9260_spi1_device); |
622 | } | 620 | } |
623 | } | 621 | } |
@@ -694,15 +692,7 @@ static struct platform_device at91sam9260_tcb1_device = { | |||
694 | 692 | ||
695 | static void __init at91_add_device_tc(void) | 693 | static void __init at91_add_device_tc(void) |
696 | { | 694 | { |
697 | /* this chip has a separate clock and irq for each TC channel */ | ||
698 | at91_clock_associate("tc0_clk", &at91sam9260_tcb0_device.dev, "t0_clk"); | ||
699 | at91_clock_associate("tc1_clk", &at91sam9260_tcb0_device.dev, "t1_clk"); | ||
700 | at91_clock_associate("tc2_clk", &at91sam9260_tcb0_device.dev, "t2_clk"); | ||
701 | platform_device_register(&at91sam9260_tcb0_device); | 695 | platform_device_register(&at91sam9260_tcb0_device); |
702 | |||
703 | at91_clock_associate("tc3_clk", &at91sam9260_tcb1_device.dev, "t0_clk"); | ||
704 | at91_clock_associate("tc4_clk", &at91sam9260_tcb1_device.dev, "t1_clk"); | ||
705 | at91_clock_associate("tc5_clk", &at91sam9260_tcb1_device.dev, "t2_clk"); | ||
706 | platform_device_register(&at91sam9260_tcb1_device); | 696 | platform_device_register(&at91sam9260_tcb1_device); |
707 | } | 697 | } |
708 | #else | 698 | #else |
@@ -820,7 +810,6 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) | |||
820 | case AT91SAM9260_ID_SSC: | 810 | case AT91SAM9260_ID_SSC: |
821 | pdev = &at91sam9260_ssc_device; | 811 | pdev = &at91sam9260_ssc_device; |
822 | configure_ssc_pins(pins); | 812 | configure_ssc_pins(pins); |
823 | at91_clock_associate("ssc_clk", &pdev->dev, "pclk"); | ||
824 | break; | 813 | break; |
825 | default: | 814 | default: |
826 | return; | 815 | return; |
@@ -1139,47 +1128,42 @@ struct platform_device *atmel_default_console_device; /* the serial console devi | |||
1139 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | 1128 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) |
1140 | { | 1129 | { |
1141 | struct platform_device *pdev; | 1130 | struct platform_device *pdev; |
1131 | struct atmel_uart_data *pdata; | ||
1142 | 1132 | ||
1143 | switch (id) { | 1133 | switch (id) { |
1144 | case 0: /* DBGU */ | 1134 | case 0: /* DBGU */ |
1145 | pdev = &at91sam9260_dbgu_device; | 1135 | pdev = &at91sam9260_dbgu_device; |
1146 | configure_dbgu_pins(); | 1136 | configure_dbgu_pins(); |
1147 | at91_clock_associate("mck", &pdev->dev, "usart"); | ||
1148 | break; | 1137 | break; |
1149 | case AT91SAM9260_ID_US0: | 1138 | case AT91SAM9260_ID_US0: |
1150 | pdev = &at91sam9260_uart0_device; | 1139 | pdev = &at91sam9260_uart0_device; |
1151 | configure_usart0_pins(pins); | 1140 | configure_usart0_pins(pins); |
1152 | at91_clock_associate("usart0_clk", &pdev->dev, "usart"); | ||
1153 | break; | 1141 | break; |
1154 | case AT91SAM9260_ID_US1: | 1142 | case AT91SAM9260_ID_US1: |
1155 | pdev = &at91sam9260_uart1_device; | 1143 | pdev = &at91sam9260_uart1_device; |
1156 | configure_usart1_pins(pins); | 1144 | configure_usart1_pins(pins); |
1157 | at91_clock_associate("usart1_clk", &pdev->dev, "usart"); | ||
1158 | break; | 1145 | break; |
1159 | case AT91SAM9260_ID_US2: | 1146 | case AT91SAM9260_ID_US2: |
1160 | pdev = &at91sam9260_uart2_device; | 1147 | pdev = &at91sam9260_uart2_device; |
1161 | configure_usart2_pins(pins); | 1148 | configure_usart2_pins(pins); |
1162 | at91_clock_associate("usart2_clk", &pdev->dev, "usart"); | ||
1163 | break; | 1149 | break; |
1164 | case AT91SAM9260_ID_US3: | 1150 | case AT91SAM9260_ID_US3: |
1165 | pdev = &at91sam9260_uart3_device; | 1151 | pdev = &at91sam9260_uart3_device; |
1166 | configure_usart3_pins(pins); | 1152 | configure_usart3_pins(pins); |
1167 | at91_clock_associate("usart3_clk", &pdev->dev, "usart"); | ||
1168 | break; | 1153 | break; |
1169 | case AT91SAM9260_ID_US4: | 1154 | case AT91SAM9260_ID_US4: |
1170 | pdev = &at91sam9260_uart4_device; | 1155 | pdev = &at91sam9260_uart4_device; |
1171 | configure_usart4_pins(); | 1156 | configure_usart4_pins(); |
1172 | at91_clock_associate("usart4_clk", &pdev->dev, "usart"); | ||
1173 | break; | 1157 | break; |
1174 | case AT91SAM9260_ID_US5: | 1158 | case AT91SAM9260_ID_US5: |
1175 | pdev = &at91sam9260_uart5_device; | 1159 | pdev = &at91sam9260_uart5_device; |
1176 | configure_usart5_pins(); | 1160 | configure_usart5_pins(); |
1177 | at91_clock_associate("usart5_clk", &pdev->dev, "usart"); | ||
1178 | break; | 1161 | break; |
1179 | default: | 1162 | default: |
1180 | return; | 1163 | return; |
1181 | } | 1164 | } |
1182 | pdev->id = portnr; /* update to mapped ID */ | 1165 | pdata = pdev->dev.platform_data; |
1166 | pdata->num = portnr; /* update to mapped ID */ | ||
1183 | 1167 | ||
1184 | if (portnr < ATMEL_MAX_UART) | 1168 | if (portnr < ATMEL_MAX_UART) |
1185 | at91_uarts[portnr] = pdev; | 1169 | at91_uarts[portnr] = pdev; |
@@ -1187,8 +1171,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | |||
1187 | 1171 | ||
1188 | void __init at91_set_serial_console(unsigned portnr) | 1172 | void __init at91_set_serial_console(unsigned portnr) |
1189 | { | 1173 | { |
1190 | if (portnr < ATMEL_MAX_UART) | 1174 | if (portnr < ATMEL_MAX_UART) { |
1191 | atmel_default_console_device = at91_uarts[portnr]; | 1175 | atmel_default_console_device = at91_uarts[portnr]; |
1176 | at91sam9260_set_console_clock(portnr); | ||
1177 | } | ||
1192 | } | 1178 | } |
1193 | 1179 | ||
1194 | void __init at91_add_device_serial(void) | 1180 | void __init at91_add_device_serial(void) |
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index fcad88668504..c1483168c97a 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c | |||
@@ -178,6 +178,24 @@ static struct clk *periph_clocks[] __initdata = { | |||
178 | // irq0 .. irq2 | 178 | // irq0 .. irq2 |
179 | }; | 179 | }; |
180 | 180 | ||
181 | static struct clk_lookup periph_clocks_lookups[] = { | ||
182 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), | ||
183 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), | ||
184 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk), | ||
185 | CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk), | ||
186 | CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc1_clk), | ||
187 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), | ||
188 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), | ||
189 | CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), | ||
190 | }; | ||
191 | |||
192 | static struct clk_lookup usart_clocks_lookups[] = { | ||
193 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck), | ||
194 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk), | ||
195 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk), | ||
196 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk), | ||
197 | }; | ||
198 | |||
181 | /* | 199 | /* |
182 | * The four programmable clocks. | 200 | * The four programmable clocks. |
183 | * You must configure pin multiplexing to bring these signals out. | 201 | * You must configure pin multiplexing to bring these signals out. |
@@ -228,6 +246,11 @@ static void __init at91sam9261_register_clocks(void) | |||
228 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) | 246 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) |
229 | clk_register(periph_clocks[i]); | 247 | clk_register(periph_clocks[i]); |
230 | 248 | ||
249 | clkdev_add_table(periph_clocks_lookups, | ||
250 | ARRAY_SIZE(periph_clocks_lookups)); | ||
251 | clkdev_add_table(usart_clocks_lookups, | ||
252 | ARRAY_SIZE(usart_clocks_lookups)); | ||
253 | |||
231 | clk_register(&pck0); | 254 | clk_register(&pck0); |
232 | clk_register(&pck1); | 255 | clk_register(&pck1); |
233 | clk_register(&pck2); | 256 | clk_register(&pck2); |
@@ -237,6 +260,18 @@ static void __init at91sam9261_register_clocks(void) | |||
237 | clk_register(&hck1); | 260 | clk_register(&hck1); |
238 | } | 261 | } |
239 | 262 | ||
263 | static struct clk_lookup console_clock_lookup; | ||
264 | |||
265 | void __init at91sam9261_set_console_clock(int id) | ||
266 | { | ||
267 | if (id >= ARRAY_SIZE(usart_clocks_lookups)) | ||
268 | return; | ||
269 | |||
270 | console_clock_lookup.con_id = "usart"; | ||
271 | console_clock_lookup.clk = usart_clocks_lookups[id].clk; | ||
272 | clkdev_add(&console_clock_lookup); | ||
273 | } | ||
274 | |||
240 | /* -------------------------------------------------------------------- | 275 | /* -------------------------------------------------------------------- |
241 | * GPIO | 276 | * GPIO |
242 | * -------------------------------------------------------------------- */ | 277 | * -------------------------------------------------------------------- */ |
@@ -267,7 +302,7 @@ static void at91sam9261_poweroff(void) | |||
267 | * AT91SAM9261 processor initialization | 302 | * AT91SAM9261 processor initialization |
268 | * -------------------------------------------------------------------- */ | 303 | * -------------------------------------------------------------------- */ |
269 | 304 | ||
270 | void __init at91sam9261_initialize(unsigned long main_clock) | 305 | void __init at91sam9261_map_io(void) |
271 | { | 306 | { |
272 | /* Map peripherals */ | 307 | /* Map peripherals */ |
273 | iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc)); | 308 | iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc)); |
@@ -276,8 +311,10 @@ void __init at91sam9261_initialize(unsigned long main_clock) | |||
276 | iotable_init(at91sam9g10_sram_desc, ARRAY_SIZE(at91sam9g10_sram_desc)); | 311 | iotable_init(at91sam9g10_sram_desc, ARRAY_SIZE(at91sam9g10_sram_desc)); |
277 | else | 312 | else |
278 | iotable_init(at91sam9261_sram_desc, ARRAY_SIZE(at91sam9261_sram_desc)); | 313 | iotable_init(at91sam9261_sram_desc, ARRAY_SIZE(at91sam9261_sram_desc)); |
314 | } | ||
279 | 315 | ||
280 | 316 | void __init at91sam9261_initialize(unsigned long main_clock) | |
317 | { | ||
281 | at91_arch_reset = at91sam9_alt_reset; | 318 | at91_arch_reset = at91sam9_alt_reset; |
282 | pm_power_off = at91sam9261_poweroff; | 319 | pm_power_off = at91sam9261_poweroff; |
283 | at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) | 320 | at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) |
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index 59fc48311fb0..3eb4538fceeb 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c | |||
@@ -426,7 +426,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | |||
426 | at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ | 426 | at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ |
427 | at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ | 427 | at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ |
428 | 428 | ||
429 | at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk"); | ||
430 | platform_device_register(&at91sam9261_spi0_device); | 429 | platform_device_register(&at91sam9261_spi0_device); |
431 | } | 430 | } |
432 | if (enable_spi1) { | 431 | if (enable_spi1) { |
@@ -434,7 +433,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | |||
434 | at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */ | 433 | at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */ |
435 | at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */ | 434 | at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */ |
436 | 435 | ||
437 | at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk"); | ||
438 | platform_device_register(&at91sam9261_spi1_device); | 436 | platform_device_register(&at91sam9261_spi1_device); |
439 | } | 437 | } |
440 | } | 438 | } |
@@ -581,10 +579,6 @@ static struct platform_device at91sam9261_tcb_device = { | |||
581 | 579 | ||
582 | static void __init at91_add_device_tc(void) | 580 | static void __init at91_add_device_tc(void) |
583 | { | 581 | { |
584 | /* this chip has a separate clock and irq for each TC channel */ | ||
585 | at91_clock_associate("tc0_clk", &at91sam9261_tcb_device.dev, "t0_clk"); | ||
586 | at91_clock_associate("tc1_clk", &at91sam9261_tcb_device.dev, "t1_clk"); | ||
587 | at91_clock_associate("tc2_clk", &at91sam9261_tcb_device.dev, "t2_clk"); | ||
588 | platform_device_register(&at91sam9261_tcb_device); | 582 | platform_device_register(&at91sam9261_tcb_device); |
589 | } | 583 | } |
590 | #else | 584 | #else |
@@ -786,17 +780,14 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) | |||
786 | case AT91SAM9261_ID_SSC0: | 780 | case AT91SAM9261_ID_SSC0: |
787 | pdev = &at91sam9261_ssc0_device; | 781 | pdev = &at91sam9261_ssc0_device; |
788 | configure_ssc0_pins(pins); | 782 | configure_ssc0_pins(pins); |
789 | at91_clock_associate("ssc0_clk", &pdev->dev, "pclk"); | ||
790 | break; | 783 | break; |
791 | case AT91SAM9261_ID_SSC1: | 784 | case AT91SAM9261_ID_SSC1: |
792 | pdev = &at91sam9261_ssc1_device; | 785 | pdev = &at91sam9261_ssc1_device; |
793 | configure_ssc1_pins(pins); | 786 | configure_ssc1_pins(pins); |
794 | at91_clock_associate("ssc1_clk", &pdev->dev, "pclk"); | ||
795 | break; | 787 | break; |
796 | case AT91SAM9261_ID_SSC2: | 788 | case AT91SAM9261_ID_SSC2: |
797 | pdev = &at91sam9261_ssc2_device; | 789 | pdev = &at91sam9261_ssc2_device; |
798 | configure_ssc2_pins(pins); | 790 | configure_ssc2_pins(pins); |
799 | at91_clock_associate("ssc2_clk", &pdev->dev, "pclk"); | ||
800 | break; | 791 | break; |
801 | default: | 792 | default: |
802 | return; | 793 | return; |
@@ -989,32 +980,30 @@ struct platform_device *atmel_default_console_device; /* the serial console devi | |||
989 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | 980 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) |
990 | { | 981 | { |
991 | struct platform_device *pdev; | 982 | struct platform_device *pdev; |
983 | struct atmel_uart_data *pdata; | ||
992 | 984 | ||
993 | switch (id) { | 985 | switch (id) { |
994 | case 0: /* DBGU */ | 986 | case 0: /* DBGU */ |
995 | pdev = &at91sam9261_dbgu_device; | 987 | pdev = &at91sam9261_dbgu_device; |
996 | configure_dbgu_pins(); | 988 | configure_dbgu_pins(); |
997 | at91_clock_associate("mck", &pdev->dev, "usart"); | ||
998 | break; | 989 | break; |
999 | case AT91SAM9261_ID_US0: | 990 | case AT91SAM9261_ID_US0: |
1000 | pdev = &at91sam9261_uart0_device; | 991 | pdev = &at91sam9261_uart0_device; |
1001 | configure_usart0_pins(pins); | 992 | configure_usart0_pins(pins); |
1002 | at91_clock_associate("usart0_clk", &pdev->dev, "usart"); | ||
1003 | break; | 993 | break; |
1004 | case AT91SAM9261_ID_US1: | 994 | case AT91SAM9261_ID_US1: |
1005 | pdev = &at91sam9261_uart1_device; | 995 | pdev = &at91sam9261_uart1_device; |
1006 | configure_usart1_pins(pins); | 996 | configure_usart1_pins(pins); |
1007 | at91_clock_associate("usart1_clk", &pdev->dev, "usart"); | ||
1008 | break; | 997 | break; |
1009 | case AT91SAM9261_ID_US2: | 998 | case AT91SAM9261_ID_US2: |
1010 | pdev = &at91sam9261_uart2_device; | 999 | pdev = &at91sam9261_uart2_device; |
1011 | configure_usart2_pins(pins); | 1000 | configure_usart2_pins(pins); |
1012 | at91_clock_associate("usart2_clk", &pdev->dev, "usart"); | ||
1013 | break; | 1001 | break; |
1014 | default: | 1002 | default: |
1015 | return; | 1003 | return; |
1016 | } | 1004 | } |
1017 | pdev->id = portnr; /* update to mapped ID */ | 1005 | pdata = pdev->dev.platform_data; |
1006 | pdata->num = portnr; /* update to mapped ID */ | ||
1018 | 1007 | ||
1019 | if (portnr < ATMEL_MAX_UART) | 1008 | if (portnr < ATMEL_MAX_UART) |
1020 | at91_uarts[portnr] = pdev; | 1009 | at91_uarts[portnr] = pdev; |
@@ -1022,8 +1011,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | |||
1022 | 1011 | ||
1023 | void __init at91_set_serial_console(unsigned portnr) | 1012 | void __init at91_set_serial_console(unsigned portnr) |
1024 | { | 1013 | { |
1025 | if (portnr < ATMEL_MAX_UART) | 1014 | if (portnr < ATMEL_MAX_UART) { |
1026 | atmel_default_console_device = at91_uarts[portnr]; | 1015 | atmel_default_console_device = at91_uarts[portnr]; |
1016 | at91sam9261_set_console_clock(portnr); | ||
1017 | } | ||
1027 | } | 1018 | } |
1028 | 1019 | ||
1029 | void __init at91_add_device_serial(void) | 1020 | void __init at91_add_device_serial(void) |
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 249f900954d8..dc28477d14ff 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c | |||
@@ -199,6 +199,23 @@ static struct clk *periph_clocks[] __initdata = { | |||
199 | // irq0 .. irq1 | 199 | // irq0 .. irq1 |
200 | }; | 200 | }; |
201 | 201 | ||
202 | static struct clk_lookup periph_clocks_lookups[] = { | ||
203 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), | ||
204 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), | ||
205 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), | ||
206 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk), | ||
207 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), | ||
208 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), | ||
209 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), | ||
210 | }; | ||
211 | |||
212 | static struct clk_lookup usart_clocks_lookups[] = { | ||
213 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck), | ||
214 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk), | ||
215 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk), | ||
216 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk), | ||
217 | }; | ||
218 | |||
202 | /* | 219 | /* |
203 | * The four programmable clocks. | 220 | * The four programmable clocks. |
204 | * You must configure pin multiplexing to bring these signals out. | 221 | * You must configure pin multiplexing to bring these signals out. |
@@ -235,12 +252,29 @@ static void __init at91sam9263_register_clocks(void) | |||
235 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) | 252 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) |
236 | clk_register(periph_clocks[i]); | 253 | clk_register(periph_clocks[i]); |
237 | 254 | ||
255 | clkdev_add_table(periph_clocks_lookups, | ||
256 | ARRAY_SIZE(periph_clocks_lookups)); | ||
257 | clkdev_add_table(usart_clocks_lookups, | ||
258 | ARRAY_SIZE(usart_clocks_lookups)); | ||
259 | |||
238 | clk_register(&pck0); | 260 | clk_register(&pck0); |
239 | clk_register(&pck1); | 261 | clk_register(&pck1); |
240 | clk_register(&pck2); | 262 | clk_register(&pck2); |
241 | clk_register(&pck3); | 263 | clk_register(&pck3); |
242 | } | 264 | } |
243 | 265 | ||
266 | static struct clk_lookup console_clock_lookup; | ||
267 | |||
268 | void __init at91sam9263_set_console_clock(int id) | ||
269 | { | ||
270 | if (id >= ARRAY_SIZE(usart_clocks_lookups)) | ||
271 | return; | ||
272 | |||
273 | console_clock_lookup.con_id = "usart"; | ||
274 | console_clock_lookup.clk = usart_clocks_lookups[id].clk; | ||
275 | clkdev_add(&console_clock_lookup); | ||
276 | } | ||
277 | |||
244 | /* -------------------------------------------------------------------- | 278 | /* -------------------------------------------------------------------- |
245 | * GPIO | 279 | * GPIO |
246 | * -------------------------------------------------------------------- */ | 280 | * -------------------------------------------------------------------- */ |
@@ -279,11 +313,14 @@ static void at91sam9263_poweroff(void) | |||
279 | * AT91SAM9263 processor initialization | 313 | * AT91SAM9263 processor initialization |
280 | * -------------------------------------------------------------------- */ | 314 | * -------------------------------------------------------------------- */ |
281 | 315 | ||
282 | void __init at91sam9263_initialize(unsigned long main_clock) | 316 | void __init at91sam9263_map_io(void) |
283 | { | 317 | { |
284 | /* Map peripherals */ | 318 | /* Map peripherals */ |
285 | iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc)); | 319 | iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc)); |
320 | } | ||
286 | 321 | ||
322 | void __init at91sam9263_initialize(unsigned long main_clock) | ||
323 | { | ||
287 | at91_arch_reset = at91sam9_alt_reset; | 324 | at91_arch_reset = at91sam9_alt_reset; |
288 | pm_power_off = at91sam9263_poweroff; | 325 | pm_power_off = at91sam9263_poweroff; |
289 | at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); | 326 | at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); |
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index fb5c23af1017..ffe081b77ed0 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c | |||
@@ -308,7 +308,6 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | |||
308 | } | 308 | } |
309 | 309 | ||
310 | mmc0_data = *data; | 310 | mmc0_data = *data; |
311 | at91_clock_associate("mci0_clk", &at91sam9263_mmc0_device.dev, "mci_clk"); | ||
312 | platform_device_register(&at91sam9263_mmc0_device); | 311 | platform_device_register(&at91sam9263_mmc0_device); |
313 | } else { /* MCI1 */ | 312 | } else { /* MCI1 */ |
314 | /* CLK */ | 313 | /* CLK */ |
@@ -339,7 +338,6 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | |||
339 | } | 338 | } |
340 | 339 | ||
341 | mmc1_data = *data; | 340 | mmc1_data = *data; |
342 | at91_clock_associate("mci1_clk", &at91sam9263_mmc1_device.dev, "mci_clk"); | ||
343 | platform_device_register(&at91sam9263_mmc1_device); | 341 | platform_device_register(&at91sam9263_mmc1_device); |
344 | } | 342 | } |
345 | } | 343 | } |
@@ -686,7 +684,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | |||
686 | at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ | 684 | at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ |
687 | at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ | 685 | at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ |
688 | 686 | ||
689 | at91_clock_associate("spi0_clk", &at91sam9263_spi0_device.dev, "spi_clk"); | ||
690 | platform_device_register(&at91sam9263_spi0_device); | 687 | platform_device_register(&at91sam9263_spi0_device); |
691 | } | 688 | } |
692 | if (enable_spi1) { | 689 | if (enable_spi1) { |
@@ -694,7 +691,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | |||
694 | at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */ | 691 | at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */ |
695 | at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */ | 692 | at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */ |
696 | 693 | ||
697 | at91_clock_associate("spi1_clk", &at91sam9263_spi1_device.dev, "spi_clk"); | ||
698 | platform_device_register(&at91sam9263_spi1_device); | 694 | platform_device_register(&at91sam9263_spi1_device); |
699 | } | 695 | } |
700 | } | 696 | } |
@@ -941,8 +937,6 @@ static struct platform_device at91sam9263_tcb_device = { | |||
941 | 937 | ||
942 | static void __init at91_add_device_tc(void) | 938 | static void __init at91_add_device_tc(void) |
943 | { | 939 | { |
944 | /* this chip has one clock and irq for all three TC channels */ | ||
945 | at91_clock_associate("tcb_clk", &at91sam9263_tcb_device.dev, "t0_clk"); | ||
946 | platform_device_register(&at91sam9263_tcb_device); | 940 | platform_device_register(&at91sam9263_tcb_device); |
947 | } | 941 | } |
948 | #else | 942 | #else |
@@ -1171,12 +1165,10 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) | |||
1171 | case AT91SAM9263_ID_SSC0: | 1165 | case AT91SAM9263_ID_SSC0: |
1172 | pdev = &at91sam9263_ssc0_device; | 1166 | pdev = &at91sam9263_ssc0_device; |
1173 | configure_ssc0_pins(pins); | 1167 | configure_ssc0_pins(pins); |
1174 | at91_clock_associate("ssc0_clk", &pdev->dev, "pclk"); | ||
1175 | break; | 1168 | break; |
1176 | case AT91SAM9263_ID_SSC1: | 1169 | case AT91SAM9263_ID_SSC1: |
1177 | pdev = &at91sam9263_ssc1_device; | 1170 | pdev = &at91sam9263_ssc1_device; |
1178 | configure_ssc1_pins(pins); | 1171 | configure_ssc1_pins(pins); |
1179 | at91_clock_associate("ssc1_clk", &pdev->dev, "pclk"); | ||
1180 | break; | 1172 | break; |
1181 | default: | 1173 | default: |
1182 | return; | 1174 | return; |
@@ -1370,32 +1362,30 @@ struct platform_device *atmel_default_console_device; /* the serial console devi | |||
1370 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | 1362 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) |
1371 | { | 1363 | { |
1372 | struct platform_device *pdev; | 1364 | struct platform_device *pdev; |
1365 | struct atmel_uart_data *pdata; | ||
1373 | 1366 | ||
1374 | switch (id) { | 1367 | switch (id) { |
1375 | case 0: /* DBGU */ | 1368 | case 0: /* DBGU */ |
1376 | pdev = &at91sam9263_dbgu_device; | 1369 | pdev = &at91sam9263_dbgu_device; |
1377 | configure_dbgu_pins(); | 1370 | configure_dbgu_pins(); |
1378 | at91_clock_associate("mck", &pdev->dev, "usart"); | ||
1379 | break; | 1371 | break; |
1380 | case AT91SAM9263_ID_US0: | 1372 | case AT91SAM9263_ID_US0: |
1381 | pdev = &at91sam9263_uart0_device; | 1373 | pdev = &at91sam9263_uart0_device; |
1382 | configure_usart0_pins(pins); | 1374 | configure_usart0_pins(pins); |
1383 | at91_clock_associate("usart0_clk", &pdev->dev, "usart"); | ||
1384 | break; | 1375 | break; |
1385 | case AT91SAM9263_ID_US1: | 1376 | case AT91SAM9263_ID_US1: |
1386 | pdev = &at91sam9263_uart1_device; | 1377 | pdev = &at91sam9263_uart1_device; |
1387 | configure_usart1_pins(pins); | 1378 | configure_usart1_pins(pins); |
1388 | at91_clock_associate("usart1_clk", &pdev->dev, "usart"); | ||
1389 | break; | 1379 | break; |
1390 | case AT91SAM9263_ID_US2: | 1380 | case AT91SAM9263_ID_US2: |
1391 | pdev = &at91sam9263_uart2_device; | 1381 | pdev = &at91sam9263_uart2_device; |
1392 | configure_usart2_pins(pins); | 1382 | configure_usart2_pins(pins); |
1393 | at91_clock_associate("usart2_clk", &pdev->dev, "usart"); | ||
1394 | break; | 1383 | break; |
1395 | default: | 1384 | default: |
1396 | return; | 1385 | return; |
1397 | } | 1386 | } |
1398 | pdev->id = portnr; /* update to mapped ID */ | 1387 | pdata = pdev->dev.platform_data; |
1388 | pdata->num = portnr; /* update to mapped ID */ | ||
1399 | 1389 | ||
1400 | if (portnr < ATMEL_MAX_UART) | 1390 | if (portnr < ATMEL_MAX_UART) |
1401 | at91_uarts[portnr] = pdev; | 1391 | at91_uarts[portnr] = pdev; |
@@ -1403,8 +1393,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | |||
1403 | 1393 | ||
1404 | void __init at91_set_serial_console(unsigned portnr) | 1394 | void __init at91_set_serial_console(unsigned portnr) |
1405 | { | 1395 | { |
1406 | if (portnr < ATMEL_MAX_UART) | 1396 | if (portnr < ATMEL_MAX_UART) { |
1407 | atmel_default_console_device = at91_uarts[portnr]; | 1397 | atmel_default_console_device = at91_uarts[portnr]; |
1398 | at91sam9263_set_console_clock(portnr); | ||
1399 | } | ||
1408 | } | 1400 | } |
1409 | 1401 | ||
1410 | void __init at91_add_device_serial(void) | 1402 | void __init at91_add_device_serial(void) |
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index c67b47f1c0fd..2bb6ff9af1c7 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c | |||
@@ -184,22 +184,6 @@ static struct clk vdec_clk = { | |||
184 | .type = CLK_TYPE_PERIPHERAL, | 184 | .type = CLK_TYPE_PERIPHERAL, |
185 | }; | 185 | }; |
186 | 186 | ||
187 | /* One additional fake clock for ohci */ | ||
188 | static struct clk ohci_clk = { | ||
189 | .name = "ohci_clk", | ||
190 | .pmc_mask = 0, | ||
191 | .type = CLK_TYPE_PERIPHERAL, | ||
192 | .parent = &uhphs_clk, | ||
193 | }; | ||
194 | |||
195 | /* One additional fake clock for second TC block */ | ||
196 | static struct clk tcb1_clk = { | ||
197 | .name = "tcb1_clk", | ||
198 | .pmc_mask = 0, | ||
199 | .type = CLK_TYPE_PERIPHERAL, | ||
200 | .parent = &tcb0_clk, | ||
201 | }; | ||
202 | |||
203 | static struct clk *periph_clocks[] __initdata = { | 187 | static struct clk *periph_clocks[] __initdata = { |
204 | &pioA_clk, | 188 | &pioA_clk, |
205 | &pioB_clk, | 189 | &pioB_clk, |
@@ -228,8 +212,30 @@ static struct clk *periph_clocks[] __initdata = { | |||
228 | &udphs_clk, | 212 | &udphs_clk, |
229 | &mmc1_clk, | 213 | &mmc1_clk, |
230 | // irq0 | 214 | // irq0 |
231 | &ohci_clk, | 215 | }; |
232 | &tcb1_clk, | 216 | |
217 | static struct clk_lookup periph_clocks_lookups[] = { | ||
218 | /* One additional fake clock for ohci */ | ||
219 | CLKDEV_CON_ID("ohci_clk", &uhphs_clk), | ||
220 | CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci.0", &uhphs_clk), | ||
221 | CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc.0", &utmi_clk), | ||
222 | CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc.0", &udphs_clk), | ||
223 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), | ||
224 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk), | ||
225 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), | ||
226 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), | ||
227 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb0_clk), | ||
228 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tcb0_clk), | ||
229 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), | ||
230 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), | ||
231 | }; | ||
232 | |||
233 | static struct clk_lookup usart_clocks_lookups[] = { | ||
234 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck), | ||
235 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk), | ||
236 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk), | ||
237 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk), | ||
238 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk), | ||
233 | }; | 239 | }; |
234 | 240 | ||
235 | /* | 241 | /* |
@@ -256,6 +262,11 @@ static void __init at91sam9g45_register_clocks(void) | |||
256 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) | 262 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) |
257 | clk_register(periph_clocks[i]); | 263 | clk_register(periph_clocks[i]); |
258 | 264 | ||
265 | clkdev_add_table(periph_clocks_lookups, | ||
266 | ARRAY_SIZE(periph_clocks_lookups)); | ||
267 | clkdev_add_table(usart_clocks_lookups, | ||
268 | ARRAY_SIZE(usart_clocks_lookups)); | ||
269 | |||
259 | if (cpu_is_at91sam9m10() || cpu_is_at91sam9m11()) | 270 | if (cpu_is_at91sam9m10() || cpu_is_at91sam9m11()) |
260 | clk_register(&vdec_clk); | 271 | clk_register(&vdec_clk); |
261 | 272 | ||
@@ -263,6 +274,18 @@ static void __init at91sam9g45_register_clocks(void) | |||
263 | clk_register(&pck1); | 274 | clk_register(&pck1); |
264 | } | 275 | } |
265 | 276 | ||
277 | static struct clk_lookup console_clock_lookup; | ||
278 | |||
279 | void __init at91sam9g45_set_console_clock(int id) | ||
280 | { | ||
281 | if (id >= ARRAY_SIZE(usart_clocks_lookups)) | ||
282 | return; | ||
283 | |||
284 | console_clock_lookup.con_id = "usart"; | ||
285 | console_clock_lookup.clk = usart_clocks_lookups[id].clk; | ||
286 | clkdev_add(&console_clock_lookup); | ||
287 | } | ||
288 | |||
266 | /* -------------------------------------------------------------------- | 289 | /* -------------------------------------------------------------------- |
267 | * GPIO | 290 | * GPIO |
268 | * -------------------------------------------------------------------- */ | 291 | * -------------------------------------------------------------------- */ |
@@ -306,11 +329,14 @@ static void at91sam9g45_poweroff(void) | |||
306 | * AT91SAM9G45 processor initialization | 329 | * AT91SAM9G45 processor initialization |
307 | * -------------------------------------------------------------------- */ | 330 | * -------------------------------------------------------------------- */ |
308 | 331 | ||
309 | void __init at91sam9g45_initialize(unsigned long main_clock) | 332 | void __init at91sam9g45_map_io(void) |
310 | { | 333 | { |
311 | /* Map peripherals */ | 334 | /* Map peripherals */ |
312 | iotable_init(at91sam9g45_io_desc, ARRAY_SIZE(at91sam9g45_io_desc)); | 335 | iotable_init(at91sam9g45_io_desc, ARRAY_SIZE(at91sam9g45_io_desc)); |
336 | } | ||
313 | 337 | ||
338 | void __init at91sam9g45_initialize(unsigned long main_clock) | ||
339 | { | ||
314 | at91_arch_reset = at91sam9g45_reset; | 340 | at91_arch_reset = at91sam9g45_reset; |
315 | pm_power_off = at91sam9g45_poweroff; | 341 | pm_power_off = at91sam9g45_poweroff; |
316 | at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); | 342 | at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); |
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index 5e9f8a4c38df..05674865bc21 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c | |||
@@ -180,7 +180,6 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) | |||
180 | } | 180 | } |
181 | 181 | ||
182 | usbh_ehci_data = *data; | 182 | usbh_ehci_data = *data; |
183 | at91_clock_associate("uhphs_clk", &at91_usbh_ehci_device.dev, "ehci_clk"); | ||
184 | platform_device_register(&at91_usbh_ehci_device); | 183 | platform_device_register(&at91_usbh_ehci_device); |
185 | } | 184 | } |
186 | #else | 185 | #else |
@@ -266,10 +265,6 @@ void __init at91_add_device_usba(struct usba_platform_data *data) | |||
266 | 265 | ||
267 | /* Pullup pin is handled internally by USB device peripheral */ | 266 | /* Pullup pin is handled internally by USB device peripheral */ |
268 | 267 | ||
269 | /* Clocks */ | ||
270 | at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk"); | ||
271 | at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk"); | ||
272 | |||
273 | platform_device_register(&at91_usba_udc_device); | 268 | platform_device_register(&at91_usba_udc_device); |
274 | } | 269 | } |
275 | #else | 270 | #else |
@@ -478,7 +473,6 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) | |||
478 | } | 473 | } |
479 | 474 | ||
480 | mmc0_data = *data; | 475 | mmc0_data = *data; |
481 | at91_clock_associate("mci0_clk", &at91sam9g45_mmc0_device.dev, "mci_clk"); | ||
482 | platform_device_register(&at91sam9g45_mmc0_device); | 476 | platform_device_register(&at91sam9g45_mmc0_device); |
483 | 477 | ||
484 | } else { /* MCI1 */ | 478 | } else { /* MCI1 */ |
@@ -504,7 +498,6 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) | |||
504 | } | 498 | } |
505 | 499 | ||
506 | mmc1_data = *data; | 500 | mmc1_data = *data; |
507 | at91_clock_associate("mci1_clk", &at91sam9g45_mmc1_device.dev, "mci_clk"); | ||
508 | platform_device_register(&at91sam9g45_mmc1_device); | 501 | platform_device_register(&at91sam9g45_mmc1_device); |
509 | 502 | ||
510 | } | 503 | } |
@@ -801,7 +794,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | |||
801 | at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI0_MOSI */ | 794 | at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI0_MOSI */ |
802 | at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI0_SPCK */ | 795 | at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI0_SPCK */ |
803 | 796 | ||
804 | at91_clock_associate("spi0_clk", &at91sam9g45_spi0_device.dev, "spi_clk"); | ||
805 | platform_device_register(&at91sam9g45_spi0_device); | 797 | platform_device_register(&at91sam9g45_spi0_device); |
806 | } | 798 | } |
807 | if (enable_spi1) { | 799 | if (enable_spi1) { |
@@ -809,7 +801,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | |||
809 | at91_set_A_periph(AT91_PIN_PB15, 0); /* SPI1_MOSI */ | 801 | at91_set_A_periph(AT91_PIN_PB15, 0); /* SPI1_MOSI */ |
810 | at91_set_A_periph(AT91_PIN_PB16, 0); /* SPI1_SPCK */ | 802 | at91_set_A_periph(AT91_PIN_PB16, 0); /* SPI1_SPCK */ |
811 | 803 | ||
812 | at91_clock_associate("spi1_clk", &at91sam9g45_spi1_device.dev, "spi_clk"); | ||
813 | platform_device_register(&at91sam9g45_spi1_device); | 804 | platform_device_register(&at91sam9g45_spi1_device); |
814 | } | 805 | } |
815 | } | 806 | } |
@@ -999,10 +990,7 @@ static struct platform_device at91sam9g45_tcb1_device = { | |||
999 | 990 | ||
1000 | static void __init at91_add_device_tc(void) | 991 | static void __init at91_add_device_tc(void) |
1001 | { | 992 | { |
1002 | /* this chip has one clock and irq for all six TC channels */ | ||
1003 | at91_clock_associate("tcb0_clk", &at91sam9g45_tcb0_device.dev, "t0_clk"); | ||
1004 | platform_device_register(&at91sam9g45_tcb0_device); | 993 | platform_device_register(&at91sam9g45_tcb0_device); |
1005 | at91_clock_associate("tcb1_clk", &at91sam9g45_tcb1_device.dev, "t0_clk"); | ||
1006 | platform_device_register(&at91sam9g45_tcb1_device); | 994 | platform_device_register(&at91sam9g45_tcb1_device); |
1007 | } | 995 | } |
1008 | #else | 996 | #else |
@@ -1286,12 +1274,10 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) | |||
1286 | case AT91SAM9G45_ID_SSC0: | 1274 | case AT91SAM9G45_ID_SSC0: |
1287 | pdev = &at91sam9g45_ssc0_device; | 1275 | pdev = &at91sam9g45_ssc0_device; |
1288 | configure_ssc0_pins(pins); | 1276 | configure_ssc0_pins(pins); |
1289 | at91_clock_associate("ssc0_clk", &pdev->dev, "pclk"); | ||
1290 | break; | 1277 | break; |
1291 | case AT91SAM9G45_ID_SSC1: | 1278 | case AT91SAM9G45_ID_SSC1: |
1292 | pdev = &at91sam9g45_ssc1_device; | 1279 | pdev = &at91sam9g45_ssc1_device; |
1293 | configure_ssc1_pins(pins); | 1280 | configure_ssc1_pins(pins); |
1294 | at91_clock_associate("ssc1_clk", &pdev->dev, "pclk"); | ||
1295 | break; | 1281 | break; |
1296 | default: | 1282 | default: |
1297 | return; | 1283 | return; |
@@ -1527,37 +1513,34 @@ struct platform_device *atmel_default_console_device; /* the serial console devi | |||
1527 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | 1513 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) |
1528 | { | 1514 | { |
1529 | struct platform_device *pdev; | 1515 | struct platform_device *pdev; |
1516 | struct atmel_uart_data *pdata; | ||
1530 | 1517 | ||
1531 | switch (id) { | 1518 | switch (id) { |
1532 | case 0: /* DBGU */ | 1519 | case 0: /* DBGU */ |
1533 | pdev = &at91sam9g45_dbgu_device; | 1520 | pdev = &at91sam9g45_dbgu_device; |
1534 | configure_dbgu_pins(); | 1521 | configure_dbgu_pins(); |
1535 | at91_clock_associate("mck", &pdev->dev, "usart"); | ||
1536 | break; | 1522 | break; |
1537 | case AT91SAM9G45_ID_US0: | 1523 | case AT91SAM9G45_ID_US0: |
1538 | pdev = &at91sam9g45_uart0_device; | 1524 | pdev = &at91sam9g45_uart0_device; |
1539 | configure_usart0_pins(pins); | 1525 | configure_usart0_pins(pins); |
1540 | at91_clock_associate("usart0_clk", &pdev->dev, "usart"); | ||
1541 | break; | 1526 | break; |
1542 | case AT91SAM9G45_ID_US1: | 1527 | case AT91SAM9G45_ID_US1: |
1543 | pdev = &at91sam9g45_uart1_device; | 1528 | pdev = &at91sam9g45_uart1_device; |
1544 | configure_usart1_pins(pins); | 1529 | configure_usart1_pins(pins); |
1545 | at91_clock_associate("usart1_clk", &pdev->dev, "usart"); | ||
1546 | break; | 1530 | break; |
1547 | case AT91SAM9G45_ID_US2: | 1531 | case AT91SAM9G45_ID_US2: |
1548 | pdev = &at91sam9g45_uart2_device; | 1532 | pdev = &at91sam9g45_uart2_device; |
1549 | configure_usart2_pins(pins); | 1533 | configure_usart2_pins(pins); |
1550 | at91_clock_associate("usart2_clk", &pdev->dev, "usart"); | ||
1551 | break; | 1534 | break; |
1552 | case AT91SAM9G45_ID_US3: | 1535 | case AT91SAM9G45_ID_US3: |
1553 | pdev = &at91sam9g45_uart3_device; | 1536 | pdev = &at91sam9g45_uart3_device; |
1554 | configure_usart3_pins(pins); | 1537 | configure_usart3_pins(pins); |
1555 | at91_clock_associate("usart3_clk", &pdev->dev, "usart"); | ||
1556 | break; | 1538 | break; |
1557 | default: | 1539 | default: |
1558 | return; | 1540 | return; |
1559 | } | 1541 | } |
1560 | pdev->id = portnr; /* update to mapped ID */ | 1542 | pdata = pdev->dev.platform_data; |
1543 | pdata->num = portnr; /* update to mapped ID */ | ||
1561 | 1544 | ||
1562 | if (portnr < ATMEL_MAX_UART) | 1545 | if (portnr < ATMEL_MAX_UART) |
1563 | at91_uarts[portnr] = pdev; | 1546 | at91_uarts[portnr] = pdev; |
@@ -1565,8 +1548,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | |||
1565 | 1548 | ||
1566 | void __init at91_set_serial_console(unsigned portnr) | 1549 | void __init at91_set_serial_console(unsigned portnr) |
1567 | { | 1550 | { |
1568 | if (portnr < ATMEL_MAX_UART) | 1551 | if (portnr < ATMEL_MAX_UART) { |
1569 | atmel_default_console_device = at91_uarts[portnr]; | 1552 | atmel_default_console_device = at91_uarts[portnr]; |
1553 | at91sam9g45_set_console_clock(portnr); | ||
1554 | } | ||
1570 | } | 1555 | } |
1571 | 1556 | ||
1572 | void __init at91_add_device_serial(void) | 1557 | void __init at91_add_device_serial(void) |
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index 6a9d24e5ed8e..1a40f16b66c8 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c | |||
@@ -190,6 +190,24 @@ static struct clk *periph_clocks[] __initdata = { | |||
190 | // irq0 | 190 | // irq0 |
191 | }; | 191 | }; |
192 | 192 | ||
193 | static struct clk_lookup periph_clocks_lookups[] = { | ||
194 | CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc.0", &utmi_clk), | ||
195 | CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc.0", &udphs_clk), | ||
196 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk), | ||
197 | CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk), | ||
198 | CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), | ||
199 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), | ||
200 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), | ||
201 | }; | ||
202 | |||
203 | static struct clk_lookup usart_clocks_lookups[] = { | ||
204 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck), | ||
205 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk), | ||
206 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk), | ||
207 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk), | ||
208 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk), | ||
209 | }; | ||
210 | |||
193 | /* | 211 | /* |
194 | * The two programmable clocks. | 212 | * The two programmable clocks. |
195 | * You must configure pin multiplexing to bring these signals out. | 213 | * You must configure pin multiplexing to bring these signals out. |
@@ -214,10 +232,27 @@ static void __init at91sam9rl_register_clocks(void) | |||
214 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) | 232 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) |
215 | clk_register(periph_clocks[i]); | 233 | clk_register(periph_clocks[i]); |
216 | 234 | ||
235 | clkdev_add_table(periph_clocks_lookups, | ||
236 | ARRAY_SIZE(periph_clocks_lookups)); | ||
237 | clkdev_add_table(usart_clocks_lookups, | ||
238 | ARRAY_SIZE(usart_clocks_lookups)); | ||
239 | |||
217 | clk_register(&pck0); | 240 | clk_register(&pck0); |
218 | clk_register(&pck1); | 241 | clk_register(&pck1); |
219 | } | 242 | } |
220 | 243 | ||
244 | static struct clk_lookup console_clock_lookup; | ||
245 | |||
246 | void __init at91sam9rl_set_console_clock(int id) | ||
247 | { | ||
248 | if (id >= ARRAY_SIZE(usart_clocks_lookups)) | ||
249 | return; | ||
250 | |||
251 | console_clock_lookup.con_id = "usart"; | ||
252 | console_clock_lookup.clk = usart_clocks_lookups[id].clk; | ||
253 | clkdev_add(&console_clock_lookup); | ||
254 | } | ||
255 | |||
221 | /* -------------------------------------------------------------------- | 256 | /* -------------------------------------------------------------------- |
222 | * GPIO | 257 | * GPIO |
223 | * -------------------------------------------------------------------- */ | 258 | * -------------------------------------------------------------------- */ |
@@ -252,7 +287,7 @@ static void at91sam9rl_poweroff(void) | |||
252 | * AT91SAM9RL processor initialization | 287 | * AT91SAM9RL processor initialization |
253 | * -------------------------------------------------------------------- */ | 288 | * -------------------------------------------------------------------- */ |
254 | 289 | ||
255 | void __init at91sam9rl_initialize(unsigned long main_clock) | 290 | void __init at91sam9rl_map_io(void) |
256 | { | 291 | { |
257 | unsigned long cidr, sram_size; | 292 | unsigned long cidr, sram_size; |
258 | 293 | ||
@@ -275,7 +310,10 @@ void __init at91sam9rl_initialize(unsigned long main_clock) | |||
275 | 310 | ||
276 | /* Map SRAM */ | 311 | /* Map SRAM */ |
277 | iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc)); | 312 | iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc)); |
313 | } | ||
278 | 314 | ||
315 | void __init at91sam9rl_initialize(unsigned long main_clock) | ||
316 | { | ||
279 | at91_arch_reset = at91sam9_alt_reset; | 317 | at91_arch_reset = at91sam9_alt_reset; |
280 | pm_power_off = at91sam9rl_poweroff; | 318 | pm_power_off = at91sam9rl_poweroff; |
281 | at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); | 319 | at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); |
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index c49262bddd85..c296045f2b6a 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c | |||
@@ -155,10 +155,6 @@ void __init at91_add_device_usba(struct usba_platform_data *data) | |||
155 | 155 | ||
156 | /* Pullup pin is handled internally by USB device peripheral */ | 156 | /* Pullup pin is handled internally by USB device peripheral */ |
157 | 157 | ||
158 | /* Clocks */ | ||
159 | at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk"); | ||
160 | at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk"); | ||
161 | |||
162 | platform_device_register(&at91_usba_udc_device); | 158 | platform_device_register(&at91_usba_udc_device); |
163 | } | 159 | } |
164 | #else | 160 | #else |
@@ -605,10 +601,6 @@ static struct platform_device at91sam9rl_tcb_device = { | |||
605 | 601 | ||
606 | static void __init at91_add_device_tc(void) | 602 | static void __init at91_add_device_tc(void) |
607 | { | 603 | { |
608 | /* this chip has a separate clock and irq for each TC channel */ | ||
609 | at91_clock_associate("tc0_clk", &at91sam9rl_tcb_device.dev, "t0_clk"); | ||
610 | at91_clock_associate("tc1_clk", &at91sam9rl_tcb_device.dev, "t1_clk"); | ||
611 | at91_clock_associate("tc2_clk", &at91sam9rl_tcb_device.dev, "t2_clk"); | ||
612 | platform_device_register(&at91sam9rl_tcb_device); | 604 | platform_device_register(&at91sam9rl_tcb_device); |
613 | } | 605 | } |
614 | #else | 606 | #else |
@@ -892,12 +884,10 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) | |||
892 | case AT91SAM9RL_ID_SSC0: | 884 | case AT91SAM9RL_ID_SSC0: |
893 | pdev = &at91sam9rl_ssc0_device; | 885 | pdev = &at91sam9rl_ssc0_device; |
894 | configure_ssc0_pins(pins); | 886 | configure_ssc0_pins(pins); |
895 | at91_clock_associate("ssc0_clk", &pdev->dev, "pclk"); | ||
896 | break; | 887 | break; |
897 | case AT91SAM9RL_ID_SSC1: | 888 | case AT91SAM9RL_ID_SSC1: |
898 | pdev = &at91sam9rl_ssc1_device; | 889 | pdev = &at91sam9rl_ssc1_device; |
899 | configure_ssc1_pins(pins); | 890 | configure_ssc1_pins(pins); |
900 | at91_clock_associate("ssc1_clk", &pdev->dev, "pclk"); | ||
901 | break; | 891 | break; |
902 | default: | 892 | default: |
903 | return; | 893 | return; |
@@ -1141,37 +1131,34 @@ struct platform_device *atmel_default_console_device; /* the serial console devi | |||
1141 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | 1131 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) |
1142 | { | 1132 | { |
1143 | struct platform_device *pdev; | 1133 | struct platform_device *pdev; |
1134 | struct atmel_uart_data *pdata; | ||
1144 | 1135 | ||
1145 | switch (id) { | 1136 | switch (id) { |
1146 | case 0: /* DBGU */ | 1137 | case 0: /* DBGU */ |
1147 | pdev = &at91sam9rl_dbgu_device; | 1138 | pdev = &at91sam9rl_dbgu_device; |
1148 | configure_dbgu_pins(); | 1139 | configure_dbgu_pins(); |
1149 | at91_clock_associate("mck", &pdev->dev, "usart"); | ||
1150 | break; | 1140 | break; |
1151 | case AT91SAM9RL_ID_US0: | 1141 | case AT91SAM9RL_ID_US0: |
1152 | pdev = &at91sam9rl_uart0_device; | 1142 | pdev = &at91sam9rl_uart0_device; |
1153 | configure_usart0_pins(pins); | 1143 | configure_usart0_pins(pins); |
1154 | at91_clock_associate("usart0_clk", &pdev->dev, "usart"); | ||
1155 | break; | 1144 | break; |
1156 | case AT91SAM9RL_ID_US1: | 1145 | case AT91SAM9RL_ID_US1: |
1157 | pdev = &at91sam9rl_uart1_device; | 1146 | pdev = &at91sam9rl_uart1_device; |
1158 | configure_usart1_pins(pins); | 1147 | configure_usart1_pins(pins); |
1159 | at91_clock_associate("usart1_clk", &pdev->dev, "usart"); | ||
1160 | break; | 1148 | break; |
1161 | case AT91SAM9RL_ID_US2: | 1149 | case AT91SAM9RL_ID_US2: |
1162 | pdev = &at91sam9rl_uart2_device; | 1150 | pdev = &at91sam9rl_uart2_device; |
1163 | configure_usart2_pins(pins); | 1151 | configure_usart2_pins(pins); |
1164 | at91_clock_associate("usart2_clk", &pdev->dev, "usart"); | ||
1165 | break; | 1152 | break; |
1166 | case AT91SAM9RL_ID_US3: | 1153 | case AT91SAM9RL_ID_US3: |
1167 | pdev = &at91sam9rl_uart3_device; | 1154 | pdev = &at91sam9rl_uart3_device; |
1168 | configure_usart3_pins(pins); | 1155 | configure_usart3_pins(pins); |
1169 | at91_clock_associate("usart3_clk", &pdev->dev, "usart"); | ||
1170 | break; | 1156 | break; |
1171 | default: | 1157 | default: |
1172 | return; | 1158 | return; |
1173 | } | 1159 | } |
1174 | pdev->id = portnr; /* update to mapped ID */ | 1160 | pdata = pdev->dev.platform_data; |
1161 | pdata->num = portnr; /* update to mapped ID */ | ||
1175 | 1162 | ||
1176 | if (portnr < ATMEL_MAX_UART) | 1163 | if (portnr < ATMEL_MAX_UART) |
1177 | at91_uarts[portnr] = pdev; | 1164 | at91_uarts[portnr] = pdev; |
@@ -1179,8 +1166,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | |||
1179 | 1166 | ||
1180 | void __init at91_set_serial_console(unsigned portnr) | 1167 | void __init at91_set_serial_console(unsigned portnr) |
1181 | { | 1168 | { |
1182 | if (portnr < ATMEL_MAX_UART) | 1169 | if (portnr < ATMEL_MAX_UART) { |
1183 | atmel_default_console_device = at91_uarts[portnr]; | 1170 | atmel_default_console_device = at91_uarts[portnr]; |
1171 | at91sam9rl_set_console_clock(portnr); | ||
1172 | } | ||
1184 | } | 1173 | } |
1185 | 1174 | ||
1186 | void __init at91_add_device_serial(void) | 1175 | void __init at91_add_device_serial(void) |
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c index ad3ec85b2790..56ba3bd035ae 100644 --- a/arch/arm/mach-at91/at91x40.c +++ b/arch/arm/mach-at91/at91x40.c | |||
@@ -37,11 +37,6 @@ unsigned long clk_get_rate(struct clk *clk) | |||
37 | return AT91X40_MASTER_CLOCK; | 37 | return AT91X40_MASTER_CLOCK; |
38 | } | 38 | } |
39 | 39 | ||
40 | struct clk *clk_get(struct device *dev, const char *id) | ||
41 | { | ||
42 | return NULL; | ||
43 | } | ||
44 | |||
45 | void __init at91x40_initialize(unsigned long main_clock) | 40 | void __init at91x40_initialize(unsigned long main_clock) |
46 | { | 41 | { |
47 | at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1) | 42 | at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1) |
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c index 8a3fc84847c1..ab1d463aa47d 100644 --- a/arch/arm/mach-at91/board-1arm.c +++ b/arch/arm/mach-at91/board-1arm.c | |||
@@ -35,14 +35,18 @@ | |||
35 | 35 | ||
36 | #include <mach/board.h> | 36 | #include <mach/board.h> |
37 | #include <mach/gpio.h> | 37 | #include <mach/gpio.h> |
38 | #include <mach/cpu.h> | ||
38 | 39 | ||
39 | #include "generic.h" | 40 | #include "generic.h" |
40 | 41 | ||
41 | 42 | ||
42 | static void __init onearm_map_io(void) | 43 | static void __init onearm_init_early(void) |
43 | { | 44 | { |
45 | /* Set cpu type: PQFP */ | ||
46 | at91rm9200_set_type(ARCH_REVISON_9200_PQFP); | ||
47 | |||
44 | /* Initialize processor: 18.432 MHz crystal */ | 48 | /* Initialize processor: 18.432 MHz crystal */ |
45 | at91rm9200_initialize(18432000, AT91RM9200_PQFP); | 49 | at91rm9200_initialize(18432000); |
46 | 50 | ||
47 | /* DBGU on ttyS0. (Rx & Tx only) */ | 51 | /* DBGU on ttyS0. (Rx & Tx only) */ |
48 | at91_register_uart(0, 0, 0); | 52 | at91_register_uart(0, 0, 0); |
@@ -92,9 +96,9 @@ static void __init onearm_board_init(void) | |||
92 | 96 | ||
93 | MACHINE_START(ONEARM, "Ajeco 1ARM single board computer") | 97 | MACHINE_START(ONEARM, "Ajeco 1ARM single board computer") |
94 | /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ | 98 | /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ |
95 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
96 | .timer = &at91rm9200_timer, | 99 | .timer = &at91rm9200_timer, |
97 | .map_io = onearm_map_io, | 100 | .map_io = at91rm9200_map_io, |
101 | .init_early = onearm_init_early, | ||
98 | .init_irq = onearm_init_irq, | 102 | .init_irq = onearm_init_irq, |
99 | .init_machine = onearm_board_init, | 103 | .init_machine = onearm_board_init, |
100 | MACHINE_END | 104 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c index cba7f7771fee..a4924de48c36 100644 --- a/arch/arm/mach-at91/board-afeb-9260v1.c +++ b/arch/arm/mach-at91/board-afeb-9260v1.c | |||
@@ -48,7 +48,7 @@ | |||
48 | #include "generic.h" | 48 | #include "generic.h" |
49 | 49 | ||
50 | 50 | ||
51 | static void __init afeb9260_map_io(void) | 51 | static void __init afeb9260_init_early(void) |
52 | { | 52 | { |
53 | /* Initialize processor: 18.432 MHz crystal */ | 53 | /* Initialize processor: 18.432 MHz crystal */ |
54 | at91sam9260_initialize(18432000); | 54 | at91sam9260_initialize(18432000); |
@@ -218,9 +218,9 @@ static void __init afeb9260_board_init(void) | |||
218 | 218 | ||
219 | MACHINE_START(AFEB9260, "Custom afeb9260 board") | 219 | MACHINE_START(AFEB9260, "Custom afeb9260 board") |
220 | /* Maintainer: Sergey Lapin <slapin@ossfans.org> */ | 220 | /* Maintainer: Sergey Lapin <slapin@ossfans.org> */ |
221 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
222 | .timer = &at91sam926x_timer, | 221 | .timer = &at91sam926x_timer, |
223 | .map_io = afeb9260_map_io, | 222 | .map_io = at91sam9260_map_io, |
223 | .init_early = afeb9260_init_early, | ||
224 | .init_irq = afeb9260_init_irq, | 224 | .init_irq = afeb9260_init_irq, |
225 | .init_machine = afeb9260_board_init, | 225 | .init_machine = afeb9260_board_init, |
226 | MACHINE_END | 226 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-at572d940hf_ek.c b/arch/arm/mach-at91/board-at572d940hf_ek.c deleted file mode 100644 index 3929f1c9e4e5..000000000000 --- a/arch/arm/mach-at91/board-at572d940hf_ek.c +++ /dev/null | |||
@@ -1,326 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-at91/board-at572d940hf_ek.c | ||
3 | * | ||
4 | * Copyright (C) 2008 Atmel Antonio R. Costa <costa.antonior@gmail.com> | ||
5 | * Copyright (C) 2005 SAN People | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | |||
22 | #include <linux/types.h> | ||
23 | #include <linux/init.h> | ||
24 | #include <linux/mm.h> | ||
25 | #include <linux/module.h> | ||
26 | #include <linux/platform_device.h> | ||
27 | #include <linux/spi/spi.h> | ||
28 | #include <linux/spi/ds1305.h> | ||
29 | #include <linux/irq.h> | ||
30 | #include <linux/mtd/physmap.h> | ||
31 | |||
32 | #include <mach/hardware.h> | ||
33 | #include <asm/setup.h> | ||
34 | #include <asm/mach-types.h> | ||
35 | #include <asm/irq.h> | ||
36 | |||
37 | #include <asm/mach/arch.h> | ||
38 | #include <asm/mach/map.h> | ||
39 | #include <asm/mach/irq.h> | ||
40 | |||
41 | #include <mach/board.h> | ||
42 | #include <mach/gpio.h> | ||
43 | #include <mach/at91sam9_smc.h> | ||
44 | |||
45 | #include "sam9_smc.h" | ||
46 | #include "generic.h" | ||
47 | |||
48 | |||
49 | static void __init eb_map_io(void) | ||
50 | { | ||
51 | /* Initialize processor: 12.500 MHz crystal */ | ||
52 | at572d940hf_initialize(12000000); | ||
53 | |||
54 | /* DBGU on ttyS0. (Rx & Tx only) */ | ||
55 | at91_register_uart(0, 0, 0); | ||
56 | |||
57 | /* USART0 on ttyS1. (Rx & Tx only) */ | ||
58 | at91_register_uart(AT572D940HF_ID_US0, 1, 0); | ||
59 | |||
60 | /* USART1 on ttyS2. (Rx & Tx only) */ | ||
61 | at91_register_uart(AT572D940HF_ID_US1, 2, 0); | ||
62 | |||
63 | /* USART2 on ttyS3. (Tx & Rx only */ | ||
64 | at91_register_uart(AT572D940HF_ID_US2, 3, 0); | ||
65 | |||
66 | /* set serial console to ttyS0 (ie, DBGU) */ | ||
67 | at91_set_serial_console(0); | ||
68 | } | ||
69 | |||
70 | static void __init eb_init_irq(void) | ||
71 | { | ||
72 | at572d940hf_init_interrupts(NULL); | ||
73 | } | ||
74 | |||
75 | |||
76 | /* | ||
77 | * USB Host Port | ||
78 | */ | ||
79 | static struct at91_usbh_data __initdata eb_usbh_data = { | ||
80 | .ports = 2, | ||
81 | }; | ||
82 | |||
83 | |||
84 | /* | ||
85 | * USB Device Port | ||
86 | */ | ||
87 | static struct at91_udc_data __initdata eb_udc_data = { | ||
88 | .vbus_pin = 0, /* no VBUS detection,UDC always on */ | ||
89 | .pullup_pin = 0, /* pull-up driven by UDC */ | ||
90 | }; | ||
91 | |||
92 | |||
93 | /* | ||
94 | * MCI (SD/MMC) | ||
95 | */ | ||
96 | static struct at91_mmc_data __initdata eb_mmc_data = { | ||
97 | .wire4 = 1, | ||
98 | /* .det_pin = ... not connected */ | ||
99 | /* .wp_pin = ... not connected */ | ||
100 | /* .vcc_pin = ... not connected */ | ||
101 | }; | ||
102 | |||
103 | |||
104 | /* | ||
105 | * MACB Ethernet device | ||
106 | */ | ||
107 | static struct at91_eth_data __initdata eb_eth_data = { | ||
108 | .phy_irq_pin = AT91_PIN_PB25, | ||
109 | .is_rmii = 1, | ||
110 | }; | ||
111 | |||
112 | /* | ||
113 | * NOR flash | ||
114 | */ | ||
115 | |||
116 | static struct mtd_partition eb_nor_partitions[] = { | ||
117 | { | ||
118 | .name = "Raw Environment", | ||
119 | .offset = 0, | ||
120 | .size = SZ_4M, | ||
121 | .mask_flags = 0, | ||
122 | }, | ||
123 | { | ||
124 | .name = "OS FS", | ||
125 | .offset = MTDPART_OFS_APPEND, | ||
126 | .size = 3 * SZ_1M, | ||
127 | .mask_flags = 0, | ||
128 | }, | ||
129 | { | ||
130 | .name = "APP FS", | ||
131 | .offset = MTDPART_OFS_APPEND, | ||
132 | .size = MTDPART_SIZ_FULL, | ||
133 | .mask_flags = 0, | ||
134 | }, | ||
135 | }; | ||
136 | |||
137 | static void nor_flash_set_vpp(struct map_info* mi, int i) { | ||
138 | }; | ||
139 | |||
140 | static struct physmap_flash_data nor_flash_data = { | ||
141 | .width = 4, | ||
142 | .parts = eb_nor_partitions, | ||
143 | .nr_parts = ARRAY_SIZE(eb_nor_partitions), | ||
144 | .set_vpp = nor_flash_set_vpp, | ||
145 | }; | ||
146 | |||
147 | static struct resource nor_flash_resources[] = { | ||
148 | { | ||
149 | .start = AT91_CHIPSELECT_0, | ||
150 | .end = AT91_CHIPSELECT_0 + SZ_16M - 1, | ||
151 | .flags = IORESOURCE_MEM, | ||
152 | }, | ||
153 | }; | ||
154 | |||
155 | static struct platform_device nor_flash = { | ||
156 | .name = "physmap-flash", | ||
157 | .id = 0, | ||
158 | .dev = { | ||
159 | .platform_data = &nor_flash_data, | ||
160 | }, | ||
161 | .resource = nor_flash_resources, | ||
162 | .num_resources = ARRAY_SIZE(nor_flash_resources), | ||
163 | }; | ||
164 | |||
165 | static struct sam9_smc_config __initdata eb_nor_smc_config = { | ||
166 | .ncs_read_setup = 1, | ||
167 | .nrd_setup = 1, | ||
168 | .ncs_write_setup = 1, | ||
169 | .nwe_setup = 1, | ||
170 | |||
171 | .ncs_read_pulse = 7, | ||
172 | .nrd_pulse = 7, | ||
173 | .ncs_write_pulse = 7, | ||
174 | .nwe_pulse = 7, | ||
175 | |||
176 | .read_cycle = 9, | ||
177 | .write_cycle = 9, | ||
178 | |||
179 | .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_32, | ||
180 | .tdf_cycles = 1, | ||
181 | }; | ||
182 | |||
183 | static void __init eb_add_device_nor(void) | ||
184 | { | ||
185 | /* configure chip-select 0 (NOR) */ | ||
186 | sam9_smc_configure(0, &eb_nor_smc_config); | ||
187 | platform_device_register(&nor_flash); | ||
188 | } | ||
189 | |||
190 | /* | ||
191 | * NAND flash | ||
192 | */ | ||
193 | static struct mtd_partition __initdata eb_nand_partition[] = { | ||
194 | { | ||
195 | .name = "Partition 1", | ||
196 | .offset = 0, | ||
197 | .size = SZ_16M, | ||
198 | }, | ||
199 | { | ||
200 | .name = "Partition 2", | ||
201 | .offset = MTDPART_OFS_NXTBLK, | ||
202 | .size = MTDPART_SIZ_FULL, | ||
203 | } | ||
204 | }; | ||
205 | |||
206 | static struct mtd_partition * __init nand_partitions(int size, int *num_partitions) | ||
207 | { | ||
208 | *num_partitions = ARRAY_SIZE(eb_nand_partition); | ||
209 | return eb_nand_partition; | ||
210 | } | ||
211 | |||
212 | static struct atmel_nand_data __initdata eb_nand_data = { | ||
213 | .ale = 22, | ||
214 | .cle = 21, | ||
215 | /* .det_pin = ... not connected */ | ||
216 | /* .rdy_pin = AT91_PIN_PC16, */ | ||
217 | .enable_pin = AT91_PIN_PA15, | ||
218 | .partition_info = nand_partitions, | ||
219 | #if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16) | ||
220 | .bus_width_16 = 1, | ||
221 | #else | ||
222 | .bus_width_16 = 0, | ||
223 | #endif | ||
224 | }; | ||
225 | |||
226 | static struct sam9_smc_config __initdata eb_nand_smc_config = { | ||
227 | .ncs_read_setup = 0, | ||
228 | .nrd_setup = 0, | ||
229 | .ncs_write_setup = 1, | ||
230 | .nwe_setup = 1, | ||
231 | |||
232 | .ncs_read_pulse = 3, | ||
233 | .nrd_pulse = 3, | ||
234 | .ncs_write_pulse = 3, | ||
235 | .nwe_pulse = 3, | ||
236 | |||
237 | .read_cycle = 5, | ||
238 | .write_cycle = 5, | ||
239 | |||
240 | .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE, | ||
241 | .tdf_cycles = 12, | ||
242 | }; | ||
243 | |||
244 | static void __init eb_add_device_nand(void) | ||
245 | { | ||
246 | /* setup bus-width (8 or 16) */ | ||
247 | if (eb_nand_data.bus_width_16) | ||
248 | eb_nand_smc_config.mode |= AT91_SMC_DBW_16; | ||
249 | else | ||
250 | eb_nand_smc_config.mode |= AT91_SMC_DBW_8; | ||
251 | |||
252 | /* configure chip-select 3 (NAND) */ | ||
253 | sam9_smc_configure(3, &eb_nand_smc_config); | ||
254 | |||
255 | at91_add_device_nand(&eb_nand_data); | ||
256 | } | ||
257 | |||
258 | |||
259 | /* | ||
260 | * SPI devices | ||
261 | */ | ||
262 | static struct resource rtc_resources[] = { | ||
263 | [0] = { | ||
264 | .start = AT572D940HF_ID_IRQ1, | ||
265 | .end = AT572D940HF_ID_IRQ1, | ||
266 | .flags = IORESOURCE_IRQ, | ||
267 | }, | ||
268 | }; | ||
269 | |||
270 | static struct ds1305_platform_data ds1306_data = { | ||
271 | .is_ds1306 = true, | ||
272 | .en_1hz = false, | ||
273 | }; | ||
274 | |||
275 | static struct spi_board_info eb_spi_devices[] = { | ||
276 | { /* RTC Dallas DS1306 */ | ||
277 | .modalias = "rtc-ds1305", | ||
278 | .chip_select = 3, | ||
279 | .mode = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA, | ||
280 | .max_speed_hz = 500000, | ||
281 | .bus_num = 0, | ||
282 | .irq = AT572D940HF_ID_IRQ1, | ||
283 | .platform_data = (void *) &ds1306_data, | ||
284 | }, | ||
285 | #if defined(CONFIG_MTD_AT91_DATAFLASH_CARD) | ||
286 | { /* Dataflash card */ | ||
287 | .modalias = "mtd_dataflash", | ||
288 | .chip_select = 0, | ||
289 | .max_speed_hz = 15 * 1000 * 1000, | ||
290 | .bus_num = 0, | ||
291 | }, | ||
292 | #endif | ||
293 | }; | ||
294 | |||
295 | static void __init eb_board_init(void) | ||
296 | { | ||
297 | /* Serial */ | ||
298 | at91_add_device_serial(); | ||
299 | /* USB Host */ | ||
300 | at91_add_device_usbh(&eb_usbh_data); | ||
301 | /* USB Device */ | ||
302 | at91_add_device_udc(&eb_udc_data); | ||
303 | /* I2C */ | ||
304 | at91_add_device_i2c(NULL, 0); | ||
305 | /* NOR */ | ||
306 | eb_add_device_nor(); | ||
307 | /* NAND */ | ||
308 | eb_add_device_nand(); | ||
309 | /* SPI */ | ||
310 | at91_add_device_spi(eb_spi_devices, ARRAY_SIZE(eb_spi_devices)); | ||
311 | /* MMC */ | ||
312 | at91_add_device_mmc(0, &eb_mmc_data); | ||
313 | /* Ethernet */ | ||
314 | at91_add_device_eth(&eb_eth_data); | ||
315 | /* mAgic */ | ||
316 | at91_add_device_mAgic(); | ||
317 | } | ||
318 | |||
319 | MACHINE_START(AT572D940HFEB, "Atmel AT91D940HF-EB") | ||
320 | /* Maintainer: Atmel <costa.antonior@gmail.com> */ | ||
321 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
322 | .timer = &at91sam926x_timer, | ||
323 | .map_io = eb_map_io, | ||
324 | .init_irq = eb_init_irq, | ||
325 | .init_machine = eb_board_init, | ||
326 | MACHINE_END | ||
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c index b54e3e6fceb6..148fccb9a25a 100644 --- a/arch/arm/mach-at91/board-cam60.c +++ b/arch/arm/mach-at91/board-cam60.c | |||
@@ -45,7 +45,7 @@ | |||
45 | #include "generic.h" | 45 | #include "generic.h" |
46 | 46 | ||
47 | 47 | ||
48 | static void __init cam60_map_io(void) | 48 | static void __init cam60_init_early(void) |
49 | { | 49 | { |
50 | /* Initialize processor: 10 MHz crystal */ | 50 | /* Initialize processor: 10 MHz crystal */ |
51 | at91sam9260_initialize(10000000); | 51 | at91sam9260_initialize(10000000); |
@@ -198,9 +198,9 @@ static void __init cam60_board_init(void) | |||
198 | 198 | ||
199 | MACHINE_START(CAM60, "KwikByte CAM60") | 199 | MACHINE_START(CAM60, "KwikByte CAM60") |
200 | /* Maintainer: KwikByte */ | 200 | /* Maintainer: KwikByte */ |
201 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
202 | .timer = &at91sam926x_timer, | 201 | .timer = &at91sam926x_timer, |
203 | .map_io = cam60_map_io, | 202 | .map_io = at91sam9260_map_io, |
203 | .init_early = cam60_init_early, | ||
204 | .init_irq = cam60_init_irq, | 204 | .init_irq = cam60_init_irq, |
205 | .init_machine = cam60_board_init, | 205 | .init_machine = cam60_board_init, |
206 | MACHINE_END | 206 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c index e7274440ead9..1904fdf87613 100644 --- a/arch/arm/mach-at91/board-cap9adk.c +++ b/arch/arm/mach-at91/board-cap9adk.c | |||
@@ -44,12 +44,13 @@ | |||
44 | #include <mach/gpio.h> | 44 | #include <mach/gpio.h> |
45 | #include <mach/at91cap9_matrix.h> | 45 | #include <mach/at91cap9_matrix.h> |
46 | #include <mach/at91sam9_smc.h> | 46 | #include <mach/at91sam9_smc.h> |
47 | #include <mach/system_rev.h> | ||
47 | 48 | ||
48 | #include "sam9_smc.h" | 49 | #include "sam9_smc.h" |
49 | #include "generic.h" | 50 | #include "generic.h" |
50 | 51 | ||
51 | 52 | ||
52 | static void __init cap9adk_map_io(void) | 53 | static void __init cap9adk_init_early(void) |
53 | { | 54 | { |
54 | /* Initialize processor: 12 MHz crystal */ | 55 | /* Initialize processor: 12 MHz crystal */ |
55 | at91cap9_initialize(12000000); | 56 | at91cap9_initialize(12000000); |
@@ -187,11 +188,6 @@ static struct atmel_nand_data __initdata cap9adk_nand_data = { | |||
187 | // .rdy_pin = ... not connected | 188 | // .rdy_pin = ... not connected |
188 | .enable_pin = AT91_PIN_PD15, | 189 | .enable_pin = AT91_PIN_PD15, |
189 | .partition_info = nand_partitions, | 190 | .partition_info = nand_partitions, |
190 | #if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16) | ||
191 | .bus_width_16 = 1, | ||
192 | #else | ||
193 | .bus_width_16 = 0, | ||
194 | #endif | ||
195 | }; | 191 | }; |
196 | 192 | ||
197 | static struct sam9_smc_config __initdata cap9adk_nand_smc_config = { | 193 | static struct sam9_smc_config __initdata cap9adk_nand_smc_config = { |
@@ -219,6 +215,7 @@ static void __init cap9adk_add_device_nand(void) | |||
219 | csa = at91_sys_read(AT91_MATRIX_EBICSA); | 215 | csa = at91_sys_read(AT91_MATRIX_EBICSA); |
220 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); | 216 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); |
221 | 217 | ||
218 | cap9adk_nand_data.bus_width_16 = !board_have_nand_8bit(); | ||
222 | /* setup bus-width (8 or 16) */ | 219 | /* setup bus-width (8 or 16) */ |
223 | if (cap9adk_nand_data.bus_width_16) | 220 | if (cap9adk_nand_data.bus_width_16) |
224 | cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16; | 221 | cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16; |
@@ -399,9 +396,9 @@ static void __init cap9adk_board_init(void) | |||
399 | 396 | ||
400 | MACHINE_START(AT91CAP9ADK, "Atmel AT91CAP9A-DK") | 397 | MACHINE_START(AT91CAP9ADK, "Atmel AT91CAP9A-DK") |
401 | /* Maintainer: Stelian Pop <stelian.pop@leadtechdesign.com> */ | 398 | /* Maintainer: Stelian Pop <stelian.pop@leadtechdesign.com> */ |
402 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
403 | .timer = &at91sam926x_timer, | 399 | .timer = &at91sam926x_timer, |
404 | .map_io = cap9adk_map_io, | 400 | .map_io = at91cap9_map_io, |
401 | .init_early = cap9adk_init_early, | ||
405 | .init_irq = cap9adk_init_irq, | 402 | .init_irq = cap9adk_init_irq, |
406 | .init_machine = cap9adk_board_init, | 403 | .init_machine = cap9adk_board_init, |
407 | MACHINE_END | 404 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c index 295e1e77fa60..f36b18687494 100644 --- a/arch/arm/mach-at91/board-carmeva.c +++ b/arch/arm/mach-at91/board-carmeva.c | |||
@@ -40,10 +40,10 @@ | |||
40 | #include "generic.h" | 40 | #include "generic.h" |
41 | 41 | ||
42 | 42 | ||
43 | static void __init carmeva_map_io(void) | 43 | static void __init carmeva_init_early(void) |
44 | { | 44 | { |
45 | /* Initialize processor: 20.000 MHz crystal */ | 45 | /* Initialize processor: 20.000 MHz crystal */ |
46 | at91rm9200_initialize(20000000, AT91RM9200_BGA); | 46 | at91rm9200_initialize(20000000); |
47 | 47 | ||
48 | /* DBGU on ttyS0. (Rx & Tx only) */ | 48 | /* DBGU on ttyS0. (Rx & Tx only) */ |
49 | at91_register_uart(0, 0, 0); | 49 | at91_register_uart(0, 0, 0); |
@@ -162,9 +162,9 @@ static void __init carmeva_board_init(void) | |||
162 | 162 | ||
163 | MACHINE_START(CARMEVA, "Carmeva") | 163 | MACHINE_START(CARMEVA, "Carmeva") |
164 | /* Maintainer: Conitec Datasystems */ | 164 | /* Maintainer: Conitec Datasystems */ |
165 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
166 | .timer = &at91rm9200_timer, | 165 | .timer = &at91rm9200_timer, |
167 | .map_io = carmeva_map_io, | 166 | .map_io = at91rm9200_map_io, |
167 | .init_early = carmeva_init_early, | ||
168 | .init_irq = carmeva_init_irq, | 168 | .init_irq = carmeva_init_irq, |
169 | .init_machine = carmeva_board_init, | 169 | .init_machine = carmeva_board_init, |
170 | MACHINE_END | 170 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c index 3838594578f3..980511084fe4 100644 --- a/arch/arm/mach-at91/board-cpu9krea.c +++ b/arch/arm/mach-at91/board-cpu9krea.c | |||
@@ -47,7 +47,7 @@ | |||
47 | #include "sam9_smc.h" | 47 | #include "sam9_smc.h" |
48 | #include "generic.h" | 48 | #include "generic.h" |
49 | 49 | ||
50 | static void __init cpu9krea_map_io(void) | 50 | static void __init cpu9krea_init_early(void) |
51 | { | 51 | { |
52 | /* Initialize processor: 18.432 MHz crystal */ | 52 | /* Initialize processor: 18.432 MHz crystal */ |
53 | at91sam9260_initialize(18432000); | 53 | at91sam9260_initialize(18432000); |
@@ -375,9 +375,9 @@ MACHINE_START(CPUAT9260, "Eukrea CPU9260") | |||
375 | MACHINE_START(CPUAT9G20, "Eukrea CPU9G20") | 375 | MACHINE_START(CPUAT9G20, "Eukrea CPU9G20") |
376 | #endif | 376 | #endif |
377 | /* Maintainer: Eric Benard - EUKREA Electromatique */ | 377 | /* Maintainer: Eric Benard - EUKREA Electromatique */ |
378 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
379 | .timer = &at91sam926x_timer, | 378 | .timer = &at91sam926x_timer, |
380 | .map_io = cpu9krea_map_io, | 379 | .map_io = at91sam9260_map_io, |
380 | .init_early = cpu9krea_init_early, | ||
381 | .init_irq = cpu9krea_init_irq, | 381 | .init_irq = cpu9krea_init_irq, |
382 | .init_machine = cpu9krea_board_init, | 382 | .init_machine = cpu9krea_board_init, |
383 | MACHINE_END | 383 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c index 2f4dd8cdd484..6daabe3907a1 100644 --- a/arch/arm/mach-at91/board-cpuat91.c +++ b/arch/arm/mach-at91/board-cpuat91.c | |||
@@ -38,6 +38,7 @@ | |||
38 | #include <mach/board.h> | 38 | #include <mach/board.h> |
39 | #include <mach/gpio.h> | 39 | #include <mach/gpio.h> |
40 | #include <mach/at91rm9200_mc.h> | 40 | #include <mach/at91rm9200_mc.h> |
41 | #include <mach/cpu.h> | ||
41 | 42 | ||
42 | #include "generic.h" | 43 | #include "generic.h" |
43 | 44 | ||
@@ -50,10 +51,13 @@ static struct gpio_led cpuat91_leds[] = { | |||
50 | }, | 51 | }, |
51 | }; | 52 | }; |
52 | 53 | ||
53 | static void __init cpuat91_map_io(void) | 54 | static void __init cpuat91_init_early(void) |
54 | { | 55 | { |
56 | /* Set cpu type: PQFP */ | ||
57 | at91rm9200_set_type(ARCH_REVISON_9200_PQFP); | ||
58 | |||
55 | /* Initialize processor: 18.432 MHz crystal */ | 59 | /* Initialize processor: 18.432 MHz crystal */ |
56 | at91rm9200_initialize(18432000, AT91RM9200_PQFP); | 60 | at91rm9200_initialize(18432000); |
57 | 61 | ||
58 | /* DBGU on ttyS0. (Rx & Tx only) */ | 62 | /* DBGU on ttyS0. (Rx & Tx only) */ |
59 | at91_register_uart(0, 0, 0); | 63 | at91_register_uart(0, 0, 0); |
@@ -175,9 +179,9 @@ static void __init cpuat91_board_init(void) | |||
175 | 179 | ||
176 | MACHINE_START(CPUAT91, "Eukrea") | 180 | MACHINE_START(CPUAT91, "Eukrea") |
177 | /* Maintainer: Eric Benard - EUKREA Electromatique */ | 181 | /* Maintainer: Eric Benard - EUKREA Electromatique */ |
178 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
179 | .timer = &at91rm9200_timer, | 182 | .timer = &at91rm9200_timer, |
180 | .map_io = cpuat91_map_io, | 183 | .map_io = at91rm9200_map_io, |
184 | .init_early = cpuat91_init_early, | ||
181 | .init_irq = cpuat91_init_irq, | 185 | .init_irq = cpuat91_init_irq, |
182 | .init_machine = cpuat91_board_init, | 186 | .init_machine = cpuat91_board_init, |
183 | MACHINE_END | 187 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c index 464839dc39bd..d98bcec1dfe0 100644 --- a/arch/arm/mach-at91/board-csb337.c +++ b/arch/arm/mach-at91/board-csb337.c | |||
@@ -43,10 +43,10 @@ | |||
43 | #include "generic.h" | 43 | #include "generic.h" |
44 | 44 | ||
45 | 45 | ||
46 | static void __init csb337_map_io(void) | 46 | static void __init csb337_init_early(void) |
47 | { | 47 | { |
48 | /* Initialize processor: 3.6864 MHz crystal */ | 48 | /* Initialize processor: 3.6864 MHz crystal */ |
49 | at91rm9200_initialize(3686400, AT91RM9200_BGA); | 49 | at91rm9200_initialize(3686400); |
50 | 50 | ||
51 | /* Setup the LEDs */ | 51 | /* Setup the LEDs */ |
52 | at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1); | 52 | at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1); |
@@ -257,9 +257,9 @@ static void __init csb337_board_init(void) | |||
257 | 257 | ||
258 | MACHINE_START(CSB337, "Cogent CSB337") | 258 | MACHINE_START(CSB337, "Cogent CSB337") |
259 | /* Maintainer: Bill Gatliff */ | 259 | /* Maintainer: Bill Gatliff */ |
260 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
261 | .timer = &at91rm9200_timer, | 260 | .timer = &at91rm9200_timer, |
262 | .map_io = csb337_map_io, | 261 | .map_io = at91rm9200_map_io, |
262 | .init_early = csb337_init_early, | ||
263 | .init_irq = csb337_init_irq, | 263 | .init_irq = csb337_init_irq, |
264 | .init_machine = csb337_board_init, | 264 | .init_machine = csb337_board_init, |
265 | MACHINE_END | 265 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c index 431688c61412..019aab4e20b0 100644 --- a/arch/arm/mach-at91/board-csb637.c +++ b/arch/arm/mach-at91/board-csb637.c | |||
@@ -40,10 +40,10 @@ | |||
40 | #include "generic.h" | 40 | #include "generic.h" |
41 | 41 | ||
42 | 42 | ||
43 | static void __init csb637_map_io(void) | 43 | static void __init csb637_init_early(void) |
44 | { | 44 | { |
45 | /* Initialize processor: 3.6864 MHz crystal */ | 45 | /* Initialize processor: 3.6864 MHz crystal */ |
46 | at91rm9200_initialize(3686400, AT91RM9200_BGA); | 46 | at91rm9200_initialize(3686400); |
47 | 47 | ||
48 | /* DBGU on ttyS0. (Rx & Tx only) */ | 48 | /* DBGU on ttyS0. (Rx & Tx only) */ |
49 | at91_register_uart(0, 0, 0); | 49 | at91_register_uart(0, 0, 0); |
@@ -138,9 +138,9 @@ static void __init csb637_board_init(void) | |||
138 | 138 | ||
139 | MACHINE_START(CSB637, "Cogent CSB637") | 139 | MACHINE_START(CSB637, "Cogent CSB637") |
140 | /* Maintainer: Bill Gatliff */ | 140 | /* Maintainer: Bill Gatliff */ |
141 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
142 | .timer = &at91rm9200_timer, | 141 | .timer = &at91rm9200_timer, |
143 | .map_io = csb637_map_io, | 142 | .map_io = at91rm9200_map_io, |
143 | .init_early = csb637_init_early, | ||
144 | .init_irq = csb637_init_irq, | 144 | .init_irq = csb637_init_irq, |
145 | .init_machine = csb637_board_init, | 145 | .init_machine = csb637_board_init, |
146 | MACHINE_END | 146 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-eb01.c b/arch/arm/mach-at91/board-eb01.c index d8df59a3426d..d2023f27c652 100644 --- a/arch/arm/mach-at91/board-eb01.c +++ b/arch/arm/mach-at91/board-eb01.c | |||
@@ -35,7 +35,7 @@ static void __init at91eb01_init_irq(void) | |||
35 | at91x40_init_interrupts(NULL); | 35 | at91x40_init_interrupts(NULL); |
36 | } | 36 | } |
37 | 37 | ||
38 | static void __init at91eb01_map_io(void) | 38 | static void __init at91eb01_init_early(void) |
39 | { | 39 | { |
40 | at91x40_initialize(40000000); | 40 | at91x40_initialize(40000000); |
41 | } | 41 | } |
@@ -43,7 +43,7 @@ static void __init at91eb01_map_io(void) | |||
43 | MACHINE_START(AT91EB01, "Atmel AT91 EB01") | 43 | MACHINE_START(AT91EB01, "Atmel AT91 EB01") |
44 | /* Maintainer: Greg Ungerer <gerg@snapgear.com> */ | 44 | /* Maintainer: Greg Ungerer <gerg@snapgear.com> */ |
45 | .timer = &at91x40_timer, | 45 | .timer = &at91x40_timer, |
46 | .init_early = at91eb01_init_early, | ||
46 | .init_irq = at91eb01_init_irq, | 47 | .init_irq = at91eb01_init_irq, |
47 | .map_io = at91eb01_map_io, | ||
48 | MACHINE_END | 48 | MACHINE_END |
49 | 49 | ||
diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c index 6cf6566ae346..e9484535cbc8 100644 --- a/arch/arm/mach-at91/board-eb9200.c +++ b/arch/arm/mach-at91/board-eb9200.c | |||
@@ -40,10 +40,10 @@ | |||
40 | #include "generic.h" | 40 | #include "generic.h" |
41 | 41 | ||
42 | 42 | ||
43 | static void __init eb9200_map_io(void) | 43 | static void __init eb9200_init_early(void) |
44 | { | 44 | { |
45 | /* Initialize processor: 18.432 MHz crystal */ | 45 | /* Initialize processor: 18.432 MHz crystal */ |
46 | at91rm9200_initialize(18432000, AT91RM9200_BGA); | 46 | at91rm9200_initialize(18432000); |
47 | 47 | ||
48 | /* DBGU on ttyS0. (Rx & Tx only) */ | 48 | /* DBGU on ttyS0. (Rx & Tx only) */ |
49 | at91_register_uart(0, 0, 0); | 49 | at91_register_uart(0, 0, 0); |
@@ -120,9 +120,9 @@ static void __init eb9200_board_init(void) | |||
120 | } | 120 | } |
121 | 121 | ||
122 | MACHINE_START(ATEB9200, "Embest ATEB9200") | 122 | MACHINE_START(ATEB9200, "Embest ATEB9200") |
123 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
124 | .timer = &at91rm9200_timer, | 123 | .timer = &at91rm9200_timer, |
125 | .map_io = eb9200_map_io, | 124 | .map_io = at91rm9200_map_io, |
125 | .init_early = eb9200_init_early, | ||
126 | .init_irq = eb9200_init_irq, | 126 | .init_irq = eb9200_init_irq, |
127 | .init_machine = eb9200_board_init, | 127 | .init_machine = eb9200_board_init, |
128 | MACHINE_END | 128 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c index de2fd04e7c8a..a6f57faa10a7 100644 --- a/arch/arm/mach-at91/board-ecbat91.c +++ b/arch/arm/mach-at91/board-ecbat91.c | |||
@@ -38,14 +38,18 @@ | |||
38 | 38 | ||
39 | #include <mach/board.h> | 39 | #include <mach/board.h> |
40 | #include <mach/gpio.h> | 40 | #include <mach/gpio.h> |
41 | #include <mach/cpu.h> | ||
41 | 42 | ||
42 | #include "generic.h" | 43 | #include "generic.h" |
43 | 44 | ||
44 | 45 | ||
45 | static void __init ecb_at91map_io(void) | 46 | static void __init ecb_at91init_early(void) |
46 | { | 47 | { |
48 | /* Set cpu type: PQFP */ | ||
49 | at91rm9200_set_type(ARCH_REVISON_9200_PQFP); | ||
50 | |||
47 | /* Initialize processor: 18.432 MHz crystal */ | 51 | /* Initialize processor: 18.432 MHz crystal */ |
48 | at91rm9200_initialize(18432000, AT91RM9200_PQFP); | 52 | at91rm9200_initialize(18432000); |
49 | 53 | ||
50 | /* Setup the LEDs */ | 54 | /* Setup the LEDs */ |
51 | at91_init_leds(AT91_PIN_PC7, AT91_PIN_PC7); | 55 | at91_init_leds(AT91_PIN_PC7, AT91_PIN_PC7); |
@@ -168,9 +172,9 @@ static void __init ecb_at91board_init(void) | |||
168 | 172 | ||
169 | MACHINE_START(ECBAT91, "emQbit's ECB_AT91") | 173 | MACHINE_START(ECBAT91, "emQbit's ECB_AT91") |
170 | /* Maintainer: emQbit.com */ | 174 | /* Maintainer: emQbit.com */ |
171 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
172 | .timer = &at91rm9200_timer, | 175 | .timer = &at91rm9200_timer, |
173 | .map_io = ecb_at91map_io, | 176 | .map_io = at91rm9200_map_io, |
177 | .init_early = ecb_at91init_early, | ||
174 | .init_irq = ecb_at91init_irq, | 178 | .init_irq = ecb_at91init_irq, |
175 | .init_machine = ecb_at91board_init, | 179 | .init_machine = ecb_at91board_init, |
176 | MACHINE_END | 180 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c index a158a0ce458f..bfc0062d1483 100644 --- a/arch/arm/mach-at91/board-eco920.c +++ b/arch/arm/mach-at91/board-eco920.c | |||
@@ -26,11 +26,16 @@ | |||
26 | 26 | ||
27 | #include <mach/board.h> | 27 | #include <mach/board.h> |
28 | #include <mach/at91rm9200_mc.h> | 28 | #include <mach/at91rm9200_mc.h> |
29 | #include <mach/cpu.h> | ||
30 | |||
29 | #include "generic.h" | 31 | #include "generic.h" |
30 | 32 | ||
31 | static void __init eco920_map_io(void) | 33 | static void __init eco920_init_early(void) |
32 | { | 34 | { |
33 | at91rm9200_initialize(18432000, AT91RM9200_PQFP); | 35 | /* Set cpu type: PQFP */ |
36 | at91rm9200_set_type(ARCH_REVISON_9200_PQFP); | ||
37 | |||
38 | at91rm9200_initialize(18432000); | ||
34 | 39 | ||
35 | /* Setup the LEDs */ | 40 | /* Setup the LEDs */ |
36 | at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1); | 41 | at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1); |
@@ -86,21 +91,6 @@ static struct platform_device eco920_flash = { | |||
86 | .num_resources = 1, | 91 | .num_resources = 1, |
87 | }; | 92 | }; |
88 | 93 | ||
89 | static struct resource at91_beeper_resources[] = { | ||
90 | [0] = { | ||
91 | .start = AT91RM9200_BASE_TC3, | ||
92 | .end = AT91RM9200_BASE_TC3 + 0x39, | ||
93 | .flags = IORESOURCE_MEM, | ||
94 | }, | ||
95 | }; | ||
96 | |||
97 | static struct platform_device at91_beeper = { | ||
98 | .name = "at91_beeper", | ||
99 | .id = 0, | ||
100 | .resource = at91_beeper_resources, | ||
101 | .num_resources = ARRAY_SIZE(at91_beeper_resources), | ||
102 | }; | ||
103 | |||
104 | static struct spi_board_info eco920_spi_devices[] = { | 94 | static struct spi_board_info eco920_spi_devices[] = { |
105 | { /* CAN controller */ | 95 | { /* CAN controller */ |
106 | .modalias = "tlv5638", | 96 | .modalias = "tlv5638", |
@@ -139,18 +129,14 @@ static void __init eco920_board_init(void) | |||
139 | AT91_SMC_TDF_(1) /* float time */ | 129 | AT91_SMC_TDF_(1) /* float time */ |
140 | ); | 130 | ); |
141 | 131 | ||
142 | at91_clock_associate("tc3_clk", &at91_beeper.dev, "at91_beeper"); | ||
143 | at91_set_B_periph(AT91_PIN_PB6, 0); | ||
144 | platform_device_register(&at91_beeper); | ||
145 | |||
146 | at91_add_device_spi(eco920_spi_devices, ARRAY_SIZE(eco920_spi_devices)); | 132 | at91_add_device_spi(eco920_spi_devices, ARRAY_SIZE(eco920_spi_devices)); |
147 | } | 133 | } |
148 | 134 | ||
149 | MACHINE_START(ECO920, "eco920") | 135 | MACHINE_START(ECO920, "eco920") |
150 | /* Maintainer: Sascha Hauer */ | 136 | /* Maintainer: Sascha Hauer */ |
151 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
152 | .timer = &at91rm9200_timer, | 137 | .timer = &at91rm9200_timer, |
153 | .map_io = eco920_map_io, | 138 | .map_io = at91rm9200_map_io, |
139 | .init_early = eco920_init_early, | ||
154 | .init_irq = eco920_init_irq, | 140 | .init_irq = eco920_init_irq, |
155 | .init_machine = eco920_board_init, | 141 | .init_machine = eco920_board_init, |
156 | MACHINE_END | 142 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c index c8a62dc8fa65..466c063b8d21 100644 --- a/arch/arm/mach-at91/board-flexibity.c +++ b/arch/arm/mach-at91/board-flexibity.c | |||
@@ -37,7 +37,7 @@ | |||
37 | 37 | ||
38 | #include "generic.h" | 38 | #include "generic.h" |
39 | 39 | ||
40 | static void __init flexibity_map_io(void) | 40 | static void __init flexibity_init_early(void) |
41 | { | 41 | { |
42 | /* Initialize processor: 18.432 MHz crystal */ | 42 | /* Initialize processor: 18.432 MHz crystal */ |
43 | at91sam9260_initialize(18432000); | 43 | at91sam9260_initialize(18432000); |
@@ -154,9 +154,9 @@ static void __init flexibity_board_init(void) | |||
154 | 154 | ||
155 | MACHINE_START(FLEXIBITY, "Flexibity Connect") | 155 | MACHINE_START(FLEXIBITY, "Flexibity Connect") |
156 | /* Maintainer: Maxim Osipov */ | 156 | /* Maintainer: Maxim Osipov */ |
157 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
158 | .timer = &at91sam926x_timer, | 157 | .timer = &at91sam926x_timer, |
159 | .map_io = flexibity_map_io, | 158 | .map_io = at91sam9260_map_io, |
159 | .init_early = flexibity_init_early, | ||
160 | .init_irq = flexibity_init_irq, | 160 | .init_irq = flexibity_init_irq, |
161 | .init_machine = flexibity_board_init, | 161 | .init_machine = flexibity_board_init, |
162 | MACHINE_END | 162 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c index dfc7dfe738e4..e2d1dc9eff45 100644 --- a/arch/arm/mach-at91/board-foxg20.c +++ b/arch/arm/mach-at91/board-foxg20.c | |||
@@ -57,7 +57,7 @@ | |||
57 | */ | 57 | */ |
58 | 58 | ||
59 | 59 | ||
60 | static void __init foxg20_map_io(void) | 60 | static void __init foxg20_init_early(void) |
61 | { | 61 | { |
62 | /* Initialize processor: 18.432 MHz crystal */ | 62 | /* Initialize processor: 18.432 MHz crystal */ |
63 | at91sam9260_initialize(18432000); | 63 | at91sam9260_initialize(18432000); |
@@ -266,9 +266,9 @@ static void __init foxg20_board_init(void) | |||
266 | 266 | ||
267 | MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20") | 267 | MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20") |
268 | /* Maintainer: Sergio Tanzilli */ | 268 | /* Maintainer: Sergio Tanzilli */ |
269 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
270 | .timer = &at91sam926x_timer, | 269 | .timer = &at91sam926x_timer, |
271 | .map_io = foxg20_map_io, | 270 | .map_io = at91sam9260_map_io, |
271 | .init_early = foxg20_init_early, | ||
272 | .init_irq = foxg20_init_irq, | 272 | .init_irq = foxg20_init_irq, |
273 | .init_machine = foxg20_board_init, | 273 | .init_machine = foxg20_board_init, |
274 | MACHINE_END | 274 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c index bc28136ee249..1d4f36b3cb27 100644 --- a/arch/arm/mach-at91/board-gsia18s.c +++ b/arch/arm/mach-at91/board-gsia18s.c | |||
@@ -38,9 +38,9 @@ | |||
38 | #include "sam9_smc.h" | 38 | #include "sam9_smc.h" |
39 | #include "generic.h" | 39 | #include "generic.h" |
40 | 40 | ||
41 | static void __init gsia18s_map_io(void) | 41 | static void __init gsia18s_init_early(void) |
42 | { | 42 | { |
43 | stamp9g20_map_io(); | 43 | stamp9g20_init_early(); |
44 | 44 | ||
45 | /* | 45 | /* |
46 | * USART0 on ttyS1 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI). | 46 | * USART0 on ttyS1 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI). |
@@ -576,9 +576,9 @@ static void __init gsia18s_board_init(void) | |||
576 | } | 576 | } |
577 | 577 | ||
578 | MACHINE_START(GSIA18S, "GS_IA18_S") | 578 | MACHINE_START(GSIA18S, "GS_IA18_S") |
579 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
580 | .timer = &at91sam926x_timer, | 579 | .timer = &at91sam926x_timer, |
581 | .map_io = gsia18s_map_io, | 580 | .map_io = at91sam9260_map_io, |
581 | .init_early = gsia18s_init_early, | ||
582 | .init_irq = init_irq, | 582 | .init_irq = init_irq, |
583 | .init_machine = gsia18s_board_init, | 583 | .init_machine = gsia18s_board_init, |
584 | MACHINE_END | 584 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c index d2e1f4ec1fcc..9b003ff744ba 100644 --- a/arch/arm/mach-at91/board-kafa.c +++ b/arch/arm/mach-at91/board-kafa.c | |||
@@ -35,14 +35,18 @@ | |||
35 | 35 | ||
36 | #include <mach/board.h> | 36 | #include <mach/board.h> |
37 | #include <mach/gpio.h> | 37 | #include <mach/gpio.h> |
38 | #include <mach/cpu.h> | ||
38 | 39 | ||
39 | #include "generic.h" | 40 | #include "generic.h" |
40 | 41 | ||
41 | 42 | ||
42 | static void __init kafa_map_io(void) | 43 | static void __init kafa_init_early(void) |
43 | { | 44 | { |
45 | /* Set cpu type: PQFP */ | ||
46 | at91rm9200_set_type(ARCH_REVISON_9200_PQFP); | ||
47 | |||
44 | /* Initialize processor: 18.432 MHz crystal */ | 48 | /* Initialize processor: 18.432 MHz crystal */ |
45 | at91rm9200_initialize(18432000, AT91RM9200_PQFP); | 49 | at91rm9200_initialize(18432000); |
46 | 50 | ||
47 | /* Set up the LEDs */ | 51 | /* Set up the LEDs */ |
48 | at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4); | 52 | at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4); |
@@ -94,9 +98,9 @@ static void __init kafa_board_init(void) | |||
94 | 98 | ||
95 | MACHINE_START(KAFA, "Sperry-Sun KAFA") | 99 | MACHINE_START(KAFA, "Sperry-Sun KAFA") |
96 | /* Maintainer: Sergei Sharonov */ | 100 | /* Maintainer: Sergei Sharonov */ |
97 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
98 | .timer = &at91rm9200_timer, | 101 | .timer = &at91rm9200_timer, |
99 | .map_io = kafa_map_io, | 102 | .map_io = at91rm9200_map_io, |
103 | .init_early = kafa_init_early, | ||
100 | .init_irq = kafa_init_irq, | 104 | .init_irq = kafa_init_irq, |
101 | .init_machine = kafa_board_init, | 105 | .init_machine = kafa_board_init, |
102 | MACHINE_END | 106 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c index a13d2063faff..a813a74b65f9 100644 --- a/arch/arm/mach-at91/board-kb9202.c +++ b/arch/arm/mach-at91/board-kb9202.c | |||
@@ -36,16 +36,19 @@ | |||
36 | 36 | ||
37 | #include <mach/board.h> | 37 | #include <mach/board.h> |
38 | #include <mach/gpio.h> | 38 | #include <mach/gpio.h> |
39 | 39 | #include <mach/cpu.h> | |
40 | #include <mach/at91rm9200_mc.h> | 40 | #include <mach/at91rm9200_mc.h> |
41 | 41 | ||
42 | #include "generic.h" | 42 | #include "generic.h" |
43 | 43 | ||
44 | 44 | ||
45 | static void __init kb9202_map_io(void) | 45 | static void __init kb9202_init_early(void) |
46 | { | 46 | { |
47 | /* Set cpu type: PQFP */ | ||
48 | at91rm9200_set_type(ARCH_REVISON_9200_PQFP); | ||
49 | |||
47 | /* Initialize processor: 10 MHz crystal */ | 50 | /* Initialize processor: 10 MHz crystal */ |
48 | at91rm9200_initialize(10000000, AT91RM9200_PQFP); | 51 | at91rm9200_initialize(10000000); |
49 | 52 | ||
50 | /* Set up the LEDs */ | 53 | /* Set up the LEDs */ |
51 | at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18); | 54 | at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18); |
@@ -136,9 +139,9 @@ static void __init kb9202_board_init(void) | |||
136 | 139 | ||
137 | MACHINE_START(KB9200, "KB920x") | 140 | MACHINE_START(KB9200, "KB920x") |
138 | /* Maintainer: KwikByte, Inc. */ | 141 | /* Maintainer: KwikByte, Inc. */ |
139 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
140 | .timer = &at91rm9200_timer, | 142 | .timer = &at91rm9200_timer, |
141 | .map_io = kb9202_map_io, | 143 | .map_io = at91rm9200_map_io, |
144 | .init_early = kb9202_init_early, | ||
142 | .init_irq = kb9202_init_irq, | 145 | .init_irq = kb9202_init_irq, |
143 | .init_machine = kb9202_board_init, | 146 | .init_machine = kb9202_board_init, |
144 | MACHINE_END | 147 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c index fe5f1d47e6e2..961e805db68c 100644 --- a/arch/arm/mach-at91/board-neocore926.c +++ b/arch/arm/mach-at91/board-neocore926.c | |||
@@ -51,7 +51,7 @@ | |||
51 | #include "generic.h" | 51 | #include "generic.h" |
52 | 52 | ||
53 | 53 | ||
54 | static void __init neocore926_map_io(void) | 54 | static void __init neocore926_init_early(void) |
55 | { | 55 | { |
56 | /* Initialize processor: 20 MHz crystal */ | 56 | /* Initialize processor: 20 MHz crystal */ |
57 | at91sam9263_initialize(20000000); | 57 | at91sam9263_initialize(20000000); |
@@ -387,9 +387,9 @@ static void __init neocore926_board_init(void) | |||
387 | 387 | ||
388 | MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926") | 388 | MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926") |
389 | /* Maintainer: ADENEO */ | 389 | /* Maintainer: ADENEO */ |
390 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
391 | .timer = &at91sam926x_timer, | 390 | .timer = &at91sam926x_timer, |
392 | .map_io = neocore926_map_io, | 391 | .map_io = at91sam9263_map_io, |
392 | .init_early = neocore926_init_early, | ||
393 | .init_irq = neocore926_init_irq, | 393 | .init_irq = neocore926_init_irq, |
394 | .init_machine = neocore926_board_init, | 394 | .init_machine = neocore926_board_init, |
395 | MACHINE_END | 395 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c index feb65787c30b..21a21af25878 100644 --- a/arch/arm/mach-at91/board-pcontrol-g20.c +++ b/arch/arm/mach-at91/board-pcontrol-g20.c | |||
@@ -37,9 +37,9 @@ | |||
37 | #include "generic.h" | 37 | #include "generic.h" |
38 | 38 | ||
39 | 39 | ||
40 | static void __init pcontrol_g20_map_io(void) | 40 | static void __init pcontrol_g20_init_early(void) |
41 | { | 41 | { |
42 | stamp9g20_map_io(); | 42 | stamp9g20_init_early(); |
43 | 43 | ||
44 | /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback A2 */ | 44 | /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback A2 */ |
45 | at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | 45 | at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS |
@@ -222,9 +222,9 @@ static void __init pcontrol_g20_board_init(void) | |||
222 | 222 | ||
223 | MACHINE_START(PCONTROL_G20, "PControl G20") | 223 | MACHINE_START(PCONTROL_G20, "PControl G20") |
224 | /* Maintainer: pgsellmann@portner-elektronik.at */ | 224 | /* Maintainer: pgsellmann@portner-elektronik.at */ |
225 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
226 | .timer = &at91sam926x_timer, | 225 | .timer = &at91sam926x_timer, |
227 | .map_io = pcontrol_g20_map_io, | 226 | .map_io = at91sam9260_map_io, |
227 | .init_early = pcontrol_g20_init_early, | ||
228 | .init_irq = init_irq, | 228 | .init_irq = init_irq, |
229 | .init_machine = pcontrol_g20_board_init, | 229 | .init_machine = pcontrol_g20_board_init, |
230 | MACHINE_END | 230 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c index 55dad3a46547..756cc2a745dd 100644 --- a/arch/arm/mach-at91/board-picotux200.c +++ b/arch/arm/mach-at91/board-picotux200.c | |||
@@ -43,10 +43,10 @@ | |||
43 | #include "generic.h" | 43 | #include "generic.h" |
44 | 44 | ||
45 | 45 | ||
46 | static void __init picotux200_map_io(void) | 46 | static void __init picotux200_init_early(void) |
47 | { | 47 | { |
48 | /* Initialize processor: 18.432 MHz crystal */ | 48 | /* Initialize processor: 18.432 MHz crystal */ |
49 | at91rm9200_initialize(18432000, AT91RM9200_BGA); | 49 | at91rm9200_initialize(18432000); |
50 | 50 | ||
51 | /* DBGU on ttyS0. (Rx & Tx only) */ | 51 | /* DBGU on ttyS0. (Rx & Tx only) */ |
52 | at91_register_uart(0, 0, 0); | 52 | at91_register_uart(0, 0, 0); |
@@ -123,9 +123,9 @@ static void __init picotux200_board_init(void) | |||
123 | 123 | ||
124 | MACHINE_START(PICOTUX2XX, "picotux 200") | 124 | MACHINE_START(PICOTUX2XX, "picotux 200") |
125 | /* Maintainer: Kleinhenz Elektronik GmbH */ | 125 | /* Maintainer: Kleinhenz Elektronik GmbH */ |
126 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
127 | .timer = &at91rm9200_timer, | 126 | .timer = &at91rm9200_timer, |
128 | .map_io = picotux200_map_io, | 127 | .map_io = at91rm9200_map_io, |
128 | .init_early = picotux200_init_early, | ||
129 | .init_irq = picotux200_init_irq, | 129 | .init_irq = picotux200_init_irq, |
130 | .init_machine = picotux200_board_init, | 130 | .init_machine = picotux200_board_init, |
131 | MACHINE_END | 131 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c index 69d15a875b66..d1a6001b0bd8 100644 --- a/arch/arm/mach-at91/board-qil-a9260.c +++ b/arch/arm/mach-at91/board-qil-a9260.c | |||
@@ -48,7 +48,7 @@ | |||
48 | #include "generic.h" | 48 | #include "generic.h" |
49 | 49 | ||
50 | 50 | ||
51 | static void __init ek_map_io(void) | 51 | static void __init ek_init_early(void) |
52 | { | 52 | { |
53 | /* Initialize processor: 12.000 MHz crystal */ | 53 | /* Initialize processor: 12.000 MHz crystal */ |
54 | at91sam9260_initialize(12000000); | 54 | at91sam9260_initialize(12000000); |
@@ -268,9 +268,9 @@ static void __init ek_board_init(void) | |||
268 | 268 | ||
269 | MACHINE_START(QIL_A9260, "CALAO QIL_A9260") | 269 | MACHINE_START(QIL_A9260, "CALAO QIL_A9260") |
270 | /* Maintainer: calao-systems */ | 270 | /* Maintainer: calao-systems */ |
271 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
272 | .timer = &at91sam926x_timer, | 271 | .timer = &at91sam926x_timer, |
273 | .map_io = ek_map_io, | 272 | .map_io = at91sam9260_map_io, |
273 | .init_early = ek_init_early, | ||
274 | .init_irq = ek_init_irq, | 274 | .init_irq = ek_init_irq, |
275 | .init_machine = ek_board_init, | 275 | .init_machine = ek_board_init, |
276 | MACHINE_END | 276 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c index 4c1047c8200d..aef9627710b0 100644 --- a/arch/arm/mach-at91/board-rm9200dk.c +++ b/arch/arm/mach-at91/board-rm9200dk.c | |||
@@ -45,10 +45,10 @@ | |||
45 | #include "generic.h" | 45 | #include "generic.h" |
46 | 46 | ||
47 | 47 | ||
48 | static void __init dk_map_io(void) | 48 | static void __init dk_init_early(void) |
49 | { | 49 | { |
50 | /* Initialize processor: 18.432 MHz crystal */ | 50 | /* Initialize processor: 18.432 MHz crystal */ |
51 | at91rm9200_initialize(18432000, AT91RM9200_BGA); | 51 | at91rm9200_initialize(18432000); |
52 | 52 | ||
53 | /* Setup the LEDs */ | 53 | /* Setup the LEDs */ |
54 | at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2); | 54 | at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2); |
@@ -227,9 +227,9 @@ static void __init dk_board_init(void) | |||
227 | 227 | ||
228 | MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK") | 228 | MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK") |
229 | /* Maintainer: SAN People/Atmel */ | 229 | /* Maintainer: SAN People/Atmel */ |
230 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
231 | .timer = &at91rm9200_timer, | 230 | .timer = &at91rm9200_timer, |
232 | .map_io = dk_map_io, | 231 | .map_io = at91rm9200_map_io, |
232 | .init_early = dk_init_early, | ||
233 | .init_irq = dk_init_irq, | 233 | .init_irq = dk_init_irq, |
234 | .init_machine = dk_board_init, | 234 | .init_machine = dk_board_init, |
235 | MACHINE_END | 235 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c index 9df1be8818c0..015a02183080 100644 --- a/arch/arm/mach-at91/board-rm9200ek.c +++ b/arch/arm/mach-at91/board-rm9200ek.c | |||
@@ -45,10 +45,10 @@ | |||
45 | #include "generic.h" | 45 | #include "generic.h" |
46 | 46 | ||
47 | 47 | ||
48 | static void __init ek_map_io(void) | 48 | static void __init ek_init_early(void) |
49 | { | 49 | { |
50 | /* Initialize processor: 18.432 MHz crystal */ | 50 | /* Initialize processor: 18.432 MHz crystal */ |
51 | at91rm9200_initialize(18432000, AT91RM9200_BGA); | 51 | at91rm9200_initialize(18432000); |
52 | 52 | ||
53 | /* Setup the LEDs */ | 53 | /* Setup the LEDs */ |
54 | at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2); | 54 | at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2); |
@@ -193,9 +193,9 @@ static void __init ek_board_init(void) | |||
193 | 193 | ||
194 | MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK") | 194 | MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK") |
195 | /* Maintainer: SAN People/Atmel */ | 195 | /* Maintainer: SAN People/Atmel */ |
196 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
197 | .timer = &at91rm9200_timer, | 196 | .timer = &at91rm9200_timer, |
198 | .map_io = ek_map_io, | 197 | .map_io = at91rm9200_map_io, |
198 | .init_early = ek_init_early, | ||
199 | .init_irq = ek_init_irq, | 199 | .init_irq = ek_init_irq, |
200 | .init_machine = ek_board_init, | 200 | .init_machine = ek_board_init, |
201 | MACHINE_END | 201 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c index 25a26beaa728..aaf1bf0989b3 100644 --- a/arch/arm/mach-at91/board-sam9-l9260.c +++ b/arch/arm/mach-at91/board-sam9-l9260.c | |||
@@ -44,7 +44,7 @@ | |||
44 | #include "generic.h" | 44 | #include "generic.h" |
45 | 45 | ||
46 | 46 | ||
47 | static void __init ek_map_io(void) | 47 | static void __init ek_init_early(void) |
48 | { | 48 | { |
49 | /* Initialize processor: 18.432 MHz crystal */ | 49 | /* Initialize processor: 18.432 MHz crystal */ |
50 | at91sam9260_initialize(18432000); | 50 | at91sam9260_initialize(18432000); |
@@ -212,9 +212,9 @@ static void __init ek_board_init(void) | |||
212 | 212 | ||
213 | MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260") | 213 | MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260") |
214 | /* Maintainer: Olimex */ | 214 | /* Maintainer: Olimex */ |
215 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
216 | .timer = &at91sam926x_timer, | 215 | .timer = &at91sam926x_timer, |
217 | .map_io = ek_map_io, | 216 | .map_io = at91sam9260_map_io, |
217 | .init_early = ek_init_early, | ||
218 | .init_irq = ek_init_irq, | 218 | .init_irq = ek_init_irq, |
219 | .init_machine = ek_board_init, | 219 | .init_machine = ek_board_init, |
220 | MACHINE_END | 220 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c index de1816e0e1d9..d600dc123227 100644 --- a/arch/arm/mach-at91/board-sam9260ek.c +++ b/arch/arm/mach-at91/board-sam9260ek.c | |||
@@ -44,12 +44,13 @@ | |||
44 | #include <mach/gpio.h> | 44 | #include <mach/gpio.h> |
45 | #include <mach/at91sam9_smc.h> | 45 | #include <mach/at91sam9_smc.h> |
46 | #include <mach/at91_shdwc.h> | 46 | #include <mach/at91_shdwc.h> |
47 | #include <mach/system_rev.h> | ||
47 | 48 | ||
48 | #include "sam9_smc.h" | 49 | #include "sam9_smc.h" |
49 | #include "generic.h" | 50 | #include "generic.h" |
50 | 51 | ||
51 | 52 | ||
52 | static void __init ek_map_io(void) | 53 | static void __init ek_init_early(void) |
53 | { | 54 | { |
54 | /* Initialize processor: 18.432 MHz crystal */ | 55 | /* Initialize processor: 18.432 MHz crystal */ |
55 | at91sam9260_initialize(18432000); | 56 | at91sam9260_initialize(18432000); |
@@ -191,11 +192,6 @@ static struct atmel_nand_data __initdata ek_nand_data = { | |||
191 | .rdy_pin = AT91_PIN_PC13, | 192 | .rdy_pin = AT91_PIN_PC13, |
192 | .enable_pin = AT91_PIN_PC14, | 193 | .enable_pin = AT91_PIN_PC14, |
193 | .partition_info = nand_partitions, | 194 | .partition_info = nand_partitions, |
194 | #if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16) | ||
195 | .bus_width_16 = 1, | ||
196 | #else | ||
197 | .bus_width_16 = 0, | ||
198 | #endif | ||
199 | }; | 195 | }; |
200 | 196 | ||
201 | static struct sam9_smc_config __initdata ek_nand_smc_config = { | 197 | static struct sam9_smc_config __initdata ek_nand_smc_config = { |
@@ -218,6 +214,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = { | |||
218 | 214 | ||
219 | static void __init ek_add_device_nand(void) | 215 | static void __init ek_add_device_nand(void) |
220 | { | 216 | { |
217 | ek_nand_data.bus_width_16 = !board_have_nand_8bit(); | ||
221 | /* setup bus-width (8 or 16) */ | 218 | /* setup bus-width (8 or 16) */ |
222 | if (ek_nand_data.bus_width_16) | 219 | if (ek_nand_data.bus_width_16) |
223 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; | 220 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; |
@@ -356,9 +353,9 @@ static void __init ek_board_init(void) | |||
356 | 353 | ||
357 | MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK") | 354 | MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK") |
358 | /* Maintainer: Atmel */ | 355 | /* Maintainer: Atmel */ |
359 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
360 | .timer = &at91sam926x_timer, | 356 | .timer = &at91sam926x_timer, |
361 | .map_io = ek_map_io, | 357 | .map_io = at91sam9260_map_io, |
358 | .init_early = ek_init_early, | ||
362 | .init_irq = ek_init_irq, | 359 | .init_irq = ek_init_irq, |
363 | .init_machine = ek_board_init, | 360 | .init_machine = ek_board_init, |
364 | MACHINE_END | 361 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c index 14acc901e24c..f897f84d43dc 100644 --- a/arch/arm/mach-at91/board-sam9261ek.c +++ b/arch/arm/mach-at91/board-sam9261ek.c | |||
@@ -48,12 +48,13 @@ | |||
48 | #include <mach/gpio.h> | 48 | #include <mach/gpio.h> |
49 | #include <mach/at91sam9_smc.h> | 49 | #include <mach/at91sam9_smc.h> |
50 | #include <mach/at91_shdwc.h> | 50 | #include <mach/at91_shdwc.h> |
51 | #include <mach/system_rev.h> | ||
51 | 52 | ||
52 | #include "sam9_smc.h" | 53 | #include "sam9_smc.h" |
53 | #include "generic.h" | 54 | #include "generic.h" |
54 | 55 | ||
55 | 56 | ||
56 | static void __init ek_map_io(void) | 57 | static void __init ek_init_early(void) |
57 | { | 58 | { |
58 | /* Initialize processor: 18.432 MHz crystal */ | 59 | /* Initialize processor: 18.432 MHz crystal */ |
59 | at91sam9261_initialize(18432000); | 60 | at91sam9261_initialize(18432000); |
@@ -197,11 +198,6 @@ static struct atmel_nand_data __initdata ek_nand_data = { | |||
197 | .rdy_pin = AT91_PIN_PC15, | 198 | .rdy_pin = AT91_PIN_PC15, |
198 | .enable_pin = AT91_PIN_PC14, | 199 | .enable_pin = AT91_PIN_PC14, |
199 | .partition_info = nand_partitions, | 200 | .partition_info = nand_partitions, |
200 | #if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16) | ||
201 | .bus_width_16 = 1, | ||
202 | #else | ||
203 | .bus_width_16 = 0, | ||
204 | #endif | ||
205 | }; | 201 | }; |
206 | 202 | ||
207 | static struct sam9_smc_config __initdata ek_nand_smc_config = { | 203 | static struct sam9_smc_config __initdata ek_nand_smc_config = { |
@@ -224,6 +220,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = { | |||
224 | 220 | ||
225 | static void __init ek_add_device_nand(void) | 221 | static void __init ek_add_device_nand(void) |
226 | { | 222 | { |
223 | ek_nand_data.bus_width_16 = !board_have_nand_8bit(); | ||
227 | /* setup bus-width (8 or 16) */ | 224 | /* setup bus-width (8 or 16) */ |
228 | if (ek_nand_data.bus_width_16) | 225 | if (ek_nand_data.bus_width_16) |
229 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; | 226 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; |
@@ -623,9 +620,9 @@ MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK") | |||
623 | MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK") | 620 | MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK") |
624 | #endif | 621 | #endif |
625 | /* Maintainer: Atmel */ | 622 | /* Maintainer: Atmel */ |
626 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
627 | .timer = &at91sam926x_timer, | 623 | .timer = &at91sam926x_timer, |
628 | .map_io = ek_map_io, | 624 | .map_io = at91sam9261_map_io, |
625 | .init_early = ek_init_early, | ||
629 | .init_irq = ek_init_irq, | 626 | .init_irq = ek_init_irq, |
630 | .init_machine = ek_board_init, | 627 | .init_machine = ek_board_init, |
631 | MACHINE_END | 628 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c index bfe490df58be..605b26f40a4c 100644 --- a/arch/arm/mach-at91/board-sam9263ek.c +++ b/arch/arm/mach-at91/board-sam9263ek.c | |||
@@ -47,12 +47,13 @@ | |||
47 | #include <mach/gpio.h> | 47 | #include <mach/gpio.h> |
48 | #include <mach/at91sam9_smc.h> | 48 | #include <mach/at91sam9_smc.h> |
49 | #include <mach/at91_shdwc.h> | 49 | #include <mach/at91_shdwc.h> |
50 | #include <mach/system_rev.h> | ||
50 | 51 | ||
51 | #include "sam9_smc.h" | 52 | #include "sam9_smc.h" |
52 | #include "generic.h" | 53 | #include "generic.h" |
53 | 54 | ||
54 | 55 | ||
55 | static void __init ek_map_io(void) | 56 | static void __init ek_init_early(void) |
56 | { | 57 | { |
57 | /* Initialize processor: 16.367 MHz crystal */ | 58 | /* Initialize processor: 16.367 MHz crystal */ |
58 | at91sam9263_initialize(16367660); | 59 | at91sam9263_initialize(16367660); |
@@ -198,11 +199,6 @@ static struct atmel_nand_data __initdata ek_nand_data = { | |||
198 | .rdy_pin = AT91_PIN_PA22, | 199 | .rdy_pin = AT91_PIN_PA22, |
199 | .enable_pin = AT91_PIN_PD15, | 200 | .enable_pin = AT91_PIN_PD15, |
200 | .partition_info = nand_partitions, | 201 | .partition_info = nand_partitions, |
201 | #if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16) | ||
202 | .bus_width_16 = 1, | ||
203 | #else | ||
204 | .bus_width_16 = 0, | ||
205 | #endif | ||
206 | }; | 202 | }; |
207 | 203 | ||
208 | static struct sam9_smc_config __initdata ek_nand_smc_config = { | 204 | static struct sam9_smc_config __initdata ek_nand_smc_config = { |
@@ -225,6 +221,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = { | |||
225 | 221 | ||
226 | static void __init ek_add_device_nand(void) | 222 | static void __init ek_add_device_nand(void) |
227 | { | 223 | { |
224 | ek_nand_data.bus_width_16 = !board_have_nand_8bit(); | ||
228 | /* setup bus-width (8 or 16) */ | 225 | /* setup bus-width (8 or 16) */ |
229 | if (ek_nand_data.bus_width_16) | 226 | if (ek_nand_data.bus_width_16) |
230 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; | 227 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; |
@@ -454,9 +451,9 @@ static void __init ek_board_init(void) | |||
454 | 451 | ||
455 | MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") | 452 | MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") |
456 | /* Maintainer: Atmel */ | 453 | /* Maintainer: Atmel */ |
457 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
458 | .timer = &at91sam926x_timer, | 454 | .timer = &at91sam926x_timer, |
459 | .map_io = ek_map_io, | 455 | .map_io = at91sam9263_map_io, |
456 | .init_early = ek_init_early, | ||
460 | .init_irq = ek_init_irq, | 457 | .init_irq = ek_init_irq, |
461 | .init_machine = ek_board_init, | 458 | .init_machine = ek_board_init, |
462 | MACHINE_END | 459 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c index ca8198b3c168..7624cf0d006b 100644 --- a/arch/arm/mach-at91/board-sam9g20ek.c +++ b/arch/arm/mach-at91/board-sam9g20ek.c | |||
@@ -43,6 +43,7 @@ | |||
43 | #include <mach/board.h> | 43 | #include <mach/board.h> |
44 | #include <mach/gpio.h> | 44 | #include <mach/gpio.h> |
45 | #include <mach/at91sam9_smc.h> | 45 | #include <mach/at91sam9_smc.h> |
46 | #include <mach/system_rev.h> | ||
46 | 47 | ||
47 | #include "sam9_smc.h" | 48 | #include "sam9_smc.h" |
48 | #include "generic.h" | 49 | #include "generic.h" |
@@ -60,7 +61,7 @@ static int inline ek_have_2mmc(void) | |||
60 | } | 61 | } |
61 | 62 | ||
62 | 63 | ||
63 | static void __init ek_map_io(void) | 64 | static void __init ek_init_early(void) |
64 | { | 65 | { |
65 | /* Initialize processor: 18.432 MHz crystal */ | 66 | /* Initialize processor: 18.432 MHz crystal */ |
66 | at91sam9260_initialize(18432000); | 67 | at91sam9260_initialize(18432000); |
@@ -175,11 +176,6 @@ static struct atmel_nand_data __initdata ek_nand_data = { | |||
175 | .rdy_pin = AT91_PIN_PC13, | 176 | .rdy_pin = AT91_PIN_PC13, |
176 | .enable_pin = AT91_PIN_PC14, | 177 | .enable_pin = AT91_PIN_PC14, |
177 | .partition_info = nand_partitions, | 178 | .partition_info = nand_partitions, |
178 | #if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16) | ||
179 | .bus_width_16 = 1, | ||
180 | #else | ||
181 | .bus_width_16 = 0, | ||
182 | #endif | ||
183 | }; | 179 | }; |
184 | 180 | ||
185 | static struct sam9_smc_config __initdata ek_nand_smc_config = { | 181 | static struct sam9_smc_config __initdata ek_nand_smc_config = { |
@@ -202,6 +198,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = { | |||
202 | 198 | ||
203 | static void __init ek_add_device_nand(void) | 199 | static void __init ek_add_device_nand(void) |
204 | { | 200 | { |
201 | ek_nand_data.bus_width_16 = !board_have_nand_8bit(); | ||
205 | /* setup bus-width (8 or 16) */ | 202 | /* setup bus-width (8 or 16) */ |
206 | if (ek_nand_data.bus_width_16) | 203 | if (ek_nand_data.bus_width_16) |
207 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; | 204 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; |
@@ -406,18 +403,18 @@ static void __init ek_board_init(void) | |||
406 | 403 | ||
407 | MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK") | 404 | MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK") |
408 | /* Maintainer: Atmel */ | 405 | /* Maintainer: Atmel */ |
409 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
410 | .timer = &at91sam926x_timer, | 406 | .timer = &at91sam926x_timer, |
411 | .map_io = ek_map_io, | 407 | .map_io = at91sam9260_map_io, |
408 | .init_early = ek_init_early, | ||
412 | .init_irq = ek_init_irq, | 409 | .init_irq = ek_init_irq, |
413 | .init_machine = ek_board_init, | 410 | .init_machine = ek_board_init, |
414 | MACHINE_END | 411 | MACHINE_END |
415 | 412 | ||
416 | MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod") | 413 | MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod") |
417 | /* Maintainer: Atmel */ | 414 | /* Maintainer: Atmel */ |
418 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
419 | .timer = &at91sam926x_timer, | 415 | .timer = &at91sam926x_timer, |
420 | .map_io = ek_map_io, | 416 | .map_io = at91sam9260_map_io, |
417 | .init_early = ek_init_early, | ||
421 | .init_irq = ek_init_irq, | 418 | .init_irq = ek_init_irq, |
422 | .init_machine = ek_board_init, | 419 | .init_machine = ek_board_init, |
423 | MACHINE_END | 420 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index 6c999dbd2bcf..063c95d0e8f0 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c | |||
@@ -41,12 +41,13 @@ | |||
41 | #include <mach/gpio.h> | 41 | #include <mach/gpio.h> |
42 | #include <mach/at91sam9_smc.h> | 42 | #include <mach/at91sam9_smc.h> |
43 | #include <mach/at91_shdwc.h> | 43 | #include <mach/at91_shdwc.h> |
44 | #include <mach/system_rev.h> | ||
44 | 45 | ||
45 | #include "sam9_smc.h" | 46 | #include "sam9_smc.h" |
46 | #include "generic.h" | 47 | #include "generic.h" |
47 | 48 | ||
48 | 49 | ||
49 | static void __init ek_map_io(void) | 50 | static void __init ek_init_early(void) |
50 | { | 51 | { |
51 | /* Initialize processor: 12.000 MHz crystal */ | 52 | /* Initialize processor: 12.000 MHz crystal */ |
52 | at91sam9g45_initialize(12000000); | 53 | at91sam9g45_initialize(12000000); |
@@ -155,11 +156,6 @@ static struct atmel_nand_data __initdata ek_nand_data = { | |||
155 | .rdy_pin = AT91_PIN_PC8, | 156 | .rdy_pin = AT91_PIN_PC8, |
156 | .enable_pin = AT91_PIN_PC14, | 157 | .enable_pin = AT91_PIN_PC14, |
157 | .partition_info = nand_partitions, | 158 | .partition_info = nand_partitions, |
158 | #if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16) | ||
159 | .bus_width_16 = 1, | ||
160 | #else | ||
161 | .bus_width_16 = 0, | ||
162 | #endif | ||
163 | }; | 159 | }; |
164 | 160 | ||
165 | static struct sam9_smc_config __initdata ek_nand_smc_config = { | 161 | static struct sam9_smc_config __initdata ek_nand_smc_config = { |
@@ -182,6 +178,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = { | |||
182 | 178 | ||
183 | static void __init ek_add_device_nand(void) | 179 | static void __init ek_add_device_nand(void) |
184 | { | 180 | { |
181 | ek_nand_data.bus_width_16 = !board_have_nand_8bit(); | ||
185 | /* setup bus-width (8 or 16) */ | 182 | /* setup bus-width (8 or 16) */ |
186 | if (ek_nand_data.bus_width_16) | 183 | if (ek_nand_data.bus_width_16) |
187 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; | 184 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; |
@@ -424,9 +421,9 @@ static void __init ek_board_init(void) | |||
424 | 421 | ||
425 | MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK") | 422 | MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK") |
426 | /* Maintainer: Atmel */ | 423 | /* Maintainer: Atmel */ |
427 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
428 | .timer = &at91sam926x_timer, | 424 | .timer = &at91sam926x_timer, |
429 | .map_io = ek_map_io, | 425 | .map_io = at91sam9g45_map_io, |
426 | .init_early = ek_init_early, | ||
430 | .init_irq = ek_init_irq, | 427 | .init_irq = ek_init_irq, |
431 | .init_machine = ek_board_init, | 428 | .init_machine = ek_board_init, |
432 | MACHINE_END | 429 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c index 3bf3408e94c1..effb399a80a6 100644 --- a/arch/arm/mach-at91/board-sam9rlek.c +++ b/arch/arm/mach-at91/board-sam9rlek.c | |||
@@ -38,7 +38,7 @@ | |||
38 | #include "generic.h" | 38 | #include "generic.h" |
39 | 39 | ||
40 | 40 | ||
41 | static void __init ek_map_io(void) | 41 | static void __init ek_init_early(void) |
42 | { | 42 | { |
43 | /* Initialize processor: 12.000 MHz crystal */ | 43 | /* Initialize processor: 12.000 MHz crystal */ |
44 | at91sam9rl_initialize(12000000); | 44 | at91sam9rl_initialize(12000000); |
@@ -329,9 +329,9 @@ static void __init ek_board_init(void) | |||
329 | 329 | ||
330 | MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK") | 330 | MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK") |
331 | /* Maintainer: Atmel */ | 331 | /* Maintainer: Atmel */ |
332 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
333 | .timer = &at91sam926x_timer, | 332 | .timer = &at91sam926x_timer, |
334 | .map_io = ek_map_io, | 333 | .map_io = at91sam9rl_map_io, |
334 | .init_early = ek_init_early, | ||
335 | .init_irq = ek_init_irq, | 335 | .init_irq = ek_init_irq, |
336 | .init_machine = ek_board_init, | 336 | .init_machine = ek_board_init, |
337 | MACHINE_END | 337 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c index 17f7d9b32142..3eb0a1153cc8 100644 --- a/arch/arm/mach-at91/board-snapper9260.c +++ b/arch/arm/mach-at91/board-snapper9260.c | |||
@@ -40,7 +40,7 @@ | |||
40 | 40 | ||
41 | #define SNAPPER9260_IO_EXP_GPIO(x) (NR_BUILTIN_GPIO + (x)) | 41 | #define SNAPPER9260_IO_EXP_GPIO(x) (NR_BUILTIN_GPIO + (x)) |
42 | 42 | ||
43 | static void __init snapper9260_map_io(void) | 43 | static void __init snapper9260_init_early(void) |
44 | { | 44 | { |
45 | at91sam9260_initialize(18432000); | 45 | at91sam9260_initialize(18432000); |
46 | 46 | ||
@@ -178,9 +178,9 @@ static void __init snapper9260_board_init(void) | |||
178 | } | 178 | } |
179 | 179 | ||
180 | MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module") | 180 | MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module") |
181 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
182 | .timer = &at91sam926x_timer, | 181 | .timer = &at91sam926x_timer, |
183 | .map_io = snapper9260_map_io, | 182 | .map_io = at91sam9260_map_io, |
183 | .init_early = snapper9260_init_early, | ||
184 | .init_irq = snapper9260_init_irq, | 184 | .init_irq = snapper9260_init_irq, |
185 | .init_machine = snapper9260_board_init, | 185 | .init_machine = snapper9260_board_init, |
186 | MACHINE_END | 186 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c index f8902b118960..5e5c85688f5f 100644 --- a/arch/arm/mach-at91/board-stamp9g20.c +++ b/arch/arm/mach-at91/board-stamp9g20.c | |||
@@ -32,7 +32,7 @@ | |||
32 | #include "generic.h" | 32 | #include "generic.h" |
33 | 33 | ||
34 | 34 | ||
35 | void __init stamp9g20_map_io(void) | 35 | void __init stamp9g20_init_early(void) |
36 | { | 36 | { |
37 | /* Initialize processor: 18.432 MHz crystal */ | 37 | /* Initialize processor: 18.432 MHz crystal */ |
38 | at91sam9260_initialize(18432000); | 38 | at91sam9260_initialize(18432000); |
@@ -44,9 +44,9 @@ void __init stamp9g20_map_io(void) | |||
44 | at91_set_serial_console(0); | 44 | at91_set_serial_console(0); |
45 | } | 45 | } |
46 | 46 | ||
47 | static void __init stamp9g20evb_map_io(void) | 47 | static void __init stamp9g20evb_init_early(void) |
48 | { | 48 | { |
49 | stamp9g20_map_io(); | 49 | stamp9g20_init_early(); |
50 | 50 | ||
51 | /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ | 51 | /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ |
52 | at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS | 52 | at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS |
@@ -54,9 +54,9 @@ static void __init stamp9g20evb_map_io(void) | |||
54 | | ATMEL_UART_DCD | ATMEL_UART_RI); | 54 | | ATMEL_UART_DCD | ATMEL_UART_RI); |
55 | } | 55 | } |
56 | 56 | ||
57 | static void __init portuxg20_map_io(void) | 57 | static void __init portuxg20_init_early(void) |
58 | { | 58 | { |
59 | stamp9g20_map_io(); | 59 | stamp9g20_init_early(); |
60 | 60 | ||
61 | /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ | 61 | /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ |
62 | at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS | 62 | at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS |
@@ -298,18 +298,18 @@ static void __init stamp9g20evb_board_init(void) | |||
298 | 298 | ||
299 | MACHINE_START(PORTUXG20, "taskit PortuxG20") | 299 | MACHINE_START(PORTUXG20, "taskit PortuxG20") |
300 | /* Maintainer: taskit GmbH */ | 300 | /* Maintainer: taskit GmbH */ |
301 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
302 | .timer = &at91sam926x_timer, | 301 | .timer = &at91sam926x_timer, |
303 | .map_io = portuxg20_map_io, | 302 | .map_io = at91sam9260_map_io, |
303 | .init_early = portuxg20_init_early, | ||
304 | .init_irq = init_irq, | 304 | .init_irq = init_irq, |
305 | .init_machine = portuxg20_board_init, | 305 | .init_machine = portuxg20_board_init, |
306 | MACHINE_END | 306 | MACHINE_END |
307 | 307 | ||
308 | MACHINE_START(STAMP9G20, "taskit Stamp9G20") | 308 | MACHINE_START(STAMP9G20, "taskit Stamp9G20") |
309 | /* Maintainer: taskit GmbH */ | 309 | /* Maintainer: taskit GmbH */ |
310 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
311 | .timer = &at91sam926x_timer, | 310 | .timer = &at91sam926x_timer, |
312 | .map_io = stamp9g20evb_map_io, | 311 | .map_io = at91sam9260_map_io, |
312 | .init_early = stamp9g20evb_init_early, | ||
313 | .init_irq = init_irq, | 313 | .init_irq = init_irq, |
314 | .init_machine = stamp9g20evb_board_init, | 314 | .init_machine = stamp9g20evb_board_init, |
315 | MACHINE_END | 315 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-usb-a9260.c b/arch/arm/mach-at91/board-usb-a9260.c index 07784baeae84..0e784e6fedec 100644 --- a/arch/arm/mach-at91/board-usb-a9260.c +++ b/arch/arm/mach-at91/board-usb-a9260.c | |||
@@ -48,7 +48,7 @@ | |||
48 | #include "generic.h" | 48 | #include "generic.h" |
49 | 49 | ||
50 | 50 | ||
51 | static void __init ek_map_io(void) | 51 | static void __init ek_init_early(void) |
52 | { | 52 | { |
53 | /* Initialize processor: 12.000 MHz crystal */ | 53 | /* Initialize processor: 12.000 MHz crystal */ |
54 | at91sam9260_initialize(12000000); | 54 | at91sam9260_initialize(12000000); |
@@ -228,9 +228,9 @@ static void __init ek_board_init(void) | |||
228 | 228 | ||
229 | MACHINE_START(USB_A9260, "CALAO USB_A9260") | 229 | MACHINE_START(USB_A9260, "CALAO USB_A9260") |
230 | /* Maintainer: calao-systems */ | 230 | /* Maintainer: calao-systems */ |
231 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
232 | .timer = &at91sam926x_timer, | 231 | .timer = &at91sam926x_timer, |
233 | .map_io = ek_map_io, | 232 | .map_io = at91sam9260_map_io, |
233 | .init_early = ek_init_early, | ||
234 | .init_irq = ek_init_irq, | 234 | .init_irq = ek_init_irq, |
235 | .init_machine = ek_board_init, | 235 | .init_machine = ek_board_init, |
236 | MACHINE_END | 236 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-usb-a9263.c b/arch/arm/mach-at91/board-usb-a9263.c index b614508931fd..cf626dd14b2c 100644 --- a/arch/arm/mach-at91/board-usb-a9263.c +++ b/arch/arm/mach-at91/board-usb-a9263.c | |||
@@ -47,7 +47,7 @@ | |||
47 | #include "generic.h" | 47 | #include "generic.h" |
48 | 48 | ||
49 | 49 | ||
50 | static void __init ek_map_io(void) | 50 | static void __init ek_init_early(void) |
51 | { | 51 | { |
52 | /* Initialize processor: 12.00 MHz crystal */ | 52 | /* Initialize processor: 12.00 MHz crystal */ |
53 | at91sam9263_initialize(12000000); | 53 | at91sam9263_initialize(12000000); |
@@ -244,9 +244,9 @@ static void __init ek_board_init(void) | |||
244 | 244 | ||
245 | MACHINE_START(USB_A9263, "CALAO USB_A9263") | 245 | MACHINE_START(USB_A9263, "CALAO USB_A9263") |
246 | /* Maintainer: calao-systems */ | 246 | /* Maintainer: calao-systems */ |
247 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
248 | .timer = &at91sam926x_timer, | 247 | .timer = &at91sam926x_timer, |
249 | .map_io = ek_map_io, | 248 | .map_io = at91sam9263_map_io, |
249 | .init_early = ek_init_early, | ||
250 | .init_irq = ek_init_irq, | 250 | .init_irq = ek_init_irq, |
251 | .init_machine = ek_board_init, | 251 | .init_machine = ek_board_init, |
252 | MACHINE_END | 252 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c index e0f0080eb639..c208cc334d7d 100644 --- a/arch/arm/mach-at91/board-yl-9200.c +++ b/arch/arm/mach-at91/board-yl-9200.c | |||
@@ -45,14 +45,18 @@ | |||
45 | #include <mach/board.h> | 45 | #include <mach/board.h> |
46 | #include <mach/gpio.h> | 46 | #include <mach/gpio.h> |
47 | #include <mach/at91rm9200_mc.h> | 47 | #include <mach/at91rm9200_mc.h> |
48 | #include <mach/cpu.h> | ||
48 | 49 | ||
49 | #include "generic.h" | 50 | #include "generic.h" |
50 | 51 | ||
51 | 52 | ||
52 | static void __init yl9200_map_io(void) | 53 | static void __init yl9200_init_early(void) |
53 | { | 54 | { |
55 | /* Set cpu type: PQFP */ | ||
56 | at91rm9200_set_type(ARCH_REVISON_9200_PQFP); | ||
57 | |||
54 | /* Initialize processor: 18.432 MHz crystal */ | 58 | /* Initialize processor: 18.432 MHz crystal */ |
55 | at91rm9200_initialize(18432000, AT91RM9200_PQFP); | 59 | at91rm9200_initialize(18432000); |
56 | 60 | ||
57 | /* Setup the LEDs D2=PB17 (timer), D3=PB16 (cpu) */ | 61 | /* Setup the LEDs D2=PB17 (timer), D3=PB16 (cpu) */ |
58 | at91_init_leds(AT91_PIN_PB16, AT91_PIN_PB17); | 62 | at91_init_leds(AT91_PIN_PB16, AT91_PIN_PB17); |
@@ -594,9 +598,9 @@ static void __init yl9200_board_init(void) | |||
594 | 598 | ||
595 | MACHINE_START(YL9200, "uCdragon YL-9200") | 599 | MACHINE_START(YL9200, "uCdragon YL-9200") |
596 | /* Maintainer: S.Birtles */ | 600 | /* Maintainer: S.Birtles */ |
597 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
598 | .timer = &at91rm9200_timer, | 601 | .timer = &at91rm9200_timer, |
599 | .map_io = yl9200_map_io, | 602 | .map_io = at91rm9200_map_io, |
603 | .init_early = yl9200_init_early, | ||
600 | .init_irq = yl9200_init_irq, | 604 | .init_irq = yl9200_init_irq, |
601 | .init_machine = yl9200_board_init, | 605 | .init_machine = yl9200_board_init, |
602 | MACHINE_END | 606 | MACHINE_END |
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 9113da6845f1..61873f3aa92d 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c | |||
@@ -163,7 +163,7 @@ static struct clk udpck = { | |||
163 | .parent = &pllb, | 163 | .parent = &pllb, |
164 | .mode = pmc_sys_mode, | 164 | .mode = pmc_sys_mode, |
165 | }; | 165 | }; |
166 | static struct clk utmi_clk = { | 166 | struct clk utmi_clk = { |
167 | .name = "utmi_clk", | 167 | .name = "utmi_clk", |
168 | .parent = &main_clk, | 168 | .parent = &main_clk, |
169 | .pmc_mask = AT91_PMC_UPLLEN, /* in CKGR_UCKR */ | 169 | .pmc_mask = AT91_PMC_UPLLEN, /* in CKGR_UCKR */ |
@@ -182,7 +182,7 @@ static struct clk uhpck = { | |||
182 | * memory, interfaces to on-chip peripherals, the AIC, and sometimes more | 182 | * memory, interfaces to on-chip peripherals, the AIC, and sometimes more |
183 | * (e.g baud rate generation). It's sourced from one of the primary clocks. | 183 | * (e.g baud rate generation). It's sourced from one of the primary clocks. |
184 | */ | 184 | */ |
185 | static struct clk mck = { | 185 | struct clk mck = { |
186 | .name = "mck", | 186 | .name = "mck", |
187 | .pmc_mask = AT91_PMC_MCKRDY, /* in PMC_SR */ | 187 | .pmc_mask = AT91_PMC_MCKRDY, /* in PMC_SR */ |
188 | }; | 188 | }; |
@@ -215,43 +215,6 @@ static struct clk __init *at91_css_to_clk(unsigned long css) | |||
215 | return NULL; | 215 | return NULL; |
216 | } | 216 | } |
217 | 217 | ||
218 | /* | ||
219 | * Associate a particular clock with a function (eg, "uart") and device. | ||
220 | * The drivers can then request the same 'function' with several different | ||
221 | * devices and not care about which clock name to use. | ||
222 | */ | ||
223 | void __init at91_clock_associate(const char *id, struct device *dev, const char *func) | ||
224 | { | ||
225 | struct clk *clk = clk_get(NULL, id); | ||
226 | |||
227 | if (!dev || !clk || !IS_ERR(clk_get(dev, func))) | ||
228 | return; | ||
229 | |||
230 | clk->function = func; | ||
231 | clk->dev = dev; | ||
232 | } | ||
233 | |||
234 | /* clocks cannot be de-registered no refcounting necessary */ | ||
235 | struct clk *clk_get(struct device *dev, const char *id) | ||
236 | { | ||
237 | struct clk *clk; | ||
238 | |||
239 | list_for_each_entry(clk, &clocks, node) { | ||
240 | if (strcmp(id, clk->name) == 0) | ||
241 | return clk; | ||
242 | if (clk->function && (dev == clk->dev) && strcmp(id, clk->function) == 0) | ||
243 | return clk; | ||
244 | } | ||
245 | |||
246 | return ERR_PTR(-ENOENT); | ||
247 | } | ||
248 | EXPORT_SYMBOL(clk_get); | ||
249 | |||
250 | void clk_put(struct clk *clk) | ||
251 | { | ||
252 | } | ||
253 | EXPORT_SYMBOL(clk_put); | ||
254 | |||
255 | static void __clk_enable(struct clk *clk) | 218 | static void __clk_enable(struct clk *clk) |
256 | { | 219 | { |
257 | if (clk->parent) | 220 | if (clk->parent) |
@@ -498,32 +461,38 @@ postcore_initcall(at91_clk_debugfs_init); | |||
498 | /*------------------------------------------------------------------------*/ | 461 | /*------------------------------------------------------------------------*/ |
499 | 462 | ||
500 | /* Register a new clock */ | 463 | /* Register a new clock */ |
464 | static void __init at91_clk_add(struct clk *clk) | ||
465 | { | ||
466 | list_add_tail(&clk->node, &clocks); | ||
467 | |||
468 | clk->cl.con_id = clk->name; | ||
469 | clk->cl.clk = clk; | ||
470 | clkdev_add(&clk->cl); | ||
471 | } | ||
472 | |||
501 | int __init clk_register(struct clk *clk) | 473 | int __init clk_register(struct clk *clk) |
502 | { | 474 | { |
503 | if (clk_is_peripheral(clk)) { | 475 | if (clk_is_peripheral(clk)) { |
504 | if (!clk->parent) | 476 | if (!clk->parent) |
505 | clk->parent = &mck; | 477 | clk->parent = &mck; |
506 | clk->mode = pmc_periph_mode; | 478 | clk->mode = pmc_periph_mode; |
507 | list_add_tail(&clk->node, &clocks); | ||
508 | } | 479 | } |
509 | else if (clk_is_sys(clk)) { | 480 | else if (clk_is_sys(clk)) { |
510 | clk->parent = &mck; | 481 | clk->parent = &mck; |
511 | clk->mode = pmc_sys_mode; | 482 | clk->mode = pmc_sys_mode; |
512 | |||
513 | list_add_tail(&clk->node, &clocks); | ||
514 | } | 483 | } |
515 | #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS | 484 | #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS |
516 | else if (clk_is_programmable(clk)) { | 485 | else if (clk_is_programmable(clk)) { |
517 | clk->mode = pmc_sys_mode; | 486 | clk->mode = pmc_sys_mode; |
518 | init_programmable_clock(clk); | 487 | init_programmable_clock(clk); |
519 | list_add_tail(&clk->node, &clocks); | ||
520 | } | 488 | } |
521 | #endif | 489 | #endif |
522 | 490 | ||
491 | at91_clk_add(clk); | ||
492 | |||
523 | return 0; | 493 | return 0; |
524 | } | 494 | } |
525 | 495 | ||
526 | |||
527 | /*------------------------------------------------------------------------*/ | 496 | /*------------------------------------------------------------------------*/ |
528 | 497 | ||
529 | static u32 __init at91_pll_rate(struct clk *pll, u32 freq, u32 reg) | 498 | static u32 __init at91_pll_rate(struct clk *pll, u32 freq, u32 reg) |
@@ -630,7 +599,7 @@ static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock) | |||
630 | at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP); | 599 | at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP); |
631 | } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || | 600 | } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || |
632 | cpu_is_at91sam9263() || cpu_is_at91sam9g20() || | 601 | cpu_is_at91sam9263() || cpu_is_at91sam9g20() || |
633 | cpu_is_at91sam9g10() || cpu_is_at572d940hf()) { | 602 | cpu_is_at91sam9g10()) { |
634 | uhpck.pmc_mask = AT91SAM926x_PMC_UHP; | 603 | uhpck.pmc_mask = AT91SAM926x_PMC_UHP; |
635 | udpck.pmc_mask = AT91SAM926x_PMC_UDP; | 604 | udpck.pmc_mask = AT91SAM926x_PMC_UDP; |
636 | } else if (cpu_is_at91cap9()) { | 605 | } else if (cpu_is_at91cap9()) { |
@@ -754,19 +723,19 @@ int __init at91_clock_init(unsigned long main_clock) | |||
754 | 723 | ||
755 | /* Register the PMC's standard clocks */ | 724 | /* Register the PMC's standard clocks */ |
756 | for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++) | 725 | for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++) |
757 | list_add_tail(&standard_pmc_clocks[i]->node, &clocks); | 726 | at91_clk_add(standard_pmc_clocks[i]); |
758 | 727 | ||
759 | if (cpu_has_pllb()) | 728 | if (cpu_has_pllb()) |
760 | list_add_tail(&pllb.node, &clocks); | 729 | at91_clk_add(&pllb); |
761 | 730 | ||
762 | if (cpu_has_uhp()) | 731 | if (cpu_has_uhp()) |
763 | list_add_tail(&uhpck.node, &clocks); | 732 | at91_clk_add(&uhpck); |
764 | 733 | ||
765 | if (cpu_has_udpfs()) | 734 | if (cpu_has_udpfs()) |
766 | list_add_tail(&udpck.node, &clocks); | 735 | at91_clk_add(&udpck); |
767 | 736 | ||
768 | if (cpu_has_utmi()) | 737 | if (cpu_has_utmi()) |
769 | list_add_tail(&utmi_clk.node, &clocks); | 738 | at91_clk_add(&utmi_clk); |
770 | 739 | ||
771 | /* MCK and CPU clock are "always on" */ | 740 | /* MCK and CPU clock are "always on" */ |
772 | clk_enable(&mck); | 741 | clk_enable(&mck); |
diff --git a/arch/arm/mach-at91/clock.h b/arch/arm/mach-at91/clock.h index 6cf4b78e175d..c2e63e47dcbe 100644 --- a/arch/arm/mach-at91/clock.h +++ b/arch/arm/mach-at91/clock.h | |||
@@ -6,6 +6,8 @@ | |||
6 | * published by the Free Software Foundation. | 6 | * published by the Free Software Foundation. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #include <linux/clkdev.h> | ||
10 | |||
9 | #define CLK_TYPE_PRIMARY 0x1 | 11 | #define CLK_TYPE_PRIMARY 0x1 |
10 | #define CLK_TYPE_PLL 0x2 | 12 | #define CLK_TYPE_PLL 0x2 |
11 | #define CLK_TYPE_PROGRAMMABLE 0x4 | 13 | #define CLK_TYPE_PROGRAMMABLE 0x4 |
@@ -16,8 +18,7 @@ | |||
16 | struct clk { | 18 | struct clk { |
17 | struct list_head node; | 19 | struct list_head node; |
18 | const char *name; /* unique clock name */ | 20 | const char *name; /* unique clock name */ |
19 | const char *function; /* function of the clock */ | 21 | struct clk_lookup cl; |
20 | struct device *dev; /* device associated with function */ | ||
21 | unsigned long rate_hz; | 22 | unsigned long rate_hz; |
22 | struct clk *parent; | 23 | struct clk *parent; |
23 | u32 pmc_mask; | 24 | u32 pmc_mask; |
@@ -29,3 +30,18 @@ struct clk { | |||
29 | 30 | ||
30 | 31 | ||
31 | extern int __init clk_register(struct clk *clk); | 32 | extern int __init clk_register(struct clk *clk); |
33 | extern struct clk mck; | ||
34 | extern struct clk utmi_clk; | ||
35 | |||
36 | #define CLKDEV_CON_ID(_id, _clk) \ | ||
37 | { \ | ||
38 | .con_id = _id, \ | ||
39 | .clk = _clk, \ | ||
40 | } | ||
41 | |||
42 | #define CLKDEV_CON_DEV_ID(_con_id, _dev_id, _clk) \ | ||
43 | { \ | ||
44 | .con_id = _con_id, \ | ||
45 | .dev_id = _dev_id, \ | ||
46 | .clk = _clk, \ | ||
47 | } | ||
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index 0c66deb2db39..8ff3418f3430 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h | |||
@@ -8,8 +8,21 @@ | |||
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <linux/clkdev.h> | ||
12 | |||
13 | /* Map io */ | ||
14 | extern void __init at91rm9200_map_io(void); | ||
15 | extern void __init at91sam9260_map_io(void); | ||
16 | extern void __init at91sam9261_map_io(void); | ||
17 | extern void __init at91sam9263_map_io(void); | ||
18 | extern void __init at91sam9rl_map_io(void); | ||
19 | extern void __init at91sam9g45_map_io(void); | ||
20 | extern void __init at91x40_map_io(void); | ||
21 | extern void __init at91cap9_map_io(void); | ||
22 | |||
11 | /* Processors */ | 23 | /* Processors */ |
12 | extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks); | 24 | extern void __init at91rm9200_set_type(int type); |
25 | extern void __init at91rm9200_initialize(unsigned long main_clock); | ||
13 | extern void __init at91sam9260_initialize(unsigned long main_clock); | 26 | extern void __init at91sam9260_initialize(unsigned long main_clock); |
14 | extern void __init at91sam9261_initialize(unsigned long main_clock); | 27 | extern void __init at91sam9261_initialize(unsigned long main_clock); |
15 | extern void __init at91sam9263_initialize(unsigned long main_clock); | 28 | extern void __init at91sam9263_initialize(unsigned long main_clock); |
@@ -17,7 +30,6 @@ extern void __init at91sam9rl_initialize(unsigned long main_clock); | |||
17 | extern void __init at91sam9g45_initialize(unsigned long main_clock); | 30 | extern void __init at91sam9g45_initialize(unsigned long main_clock); |
18 | extern void __init at91x40_initialize(unsigned long main_clock); | 31 | extern void __init at91x40_initialize(unsigned long main_clock); |
19 | extern void __init at91cap9_initialize(unsigned long main_clock); | 32 | extern void __init at91cap9_initialize(unsigned long main_clock); |
20 | extern void __init at572d940hf_initialize(unsigned long main_clock); | ||
21 | 33 | ||
22 | /* Interrupts */ | 34 | /* Interrupts */ |
23 | extern void __init at91rm9200_init_interrupts(unsigned int priority[]); | 35 | extern void __init at91rm9200_init_interrupts(unsigned int priority[]); |
@@ -28,7 +40,6 @@ extern void __init at91sam9rl_init_interrupts(unsigned int priority[]); | |||
28 | extern void __init at91sam9g45_init_interrupts(unsigned int priority[]); | 40 | extern void __init at91sam9g45_init_interrupts(unsigned int priority[]); |
29 | extern void __init at91x40_init_interrupts(unsigned int priority[]); | 41 | extern void __init at91x40_init_interrupts(unsigned int priority[]); |
30 | extern void __init at91cap9_init_interrupts(unsigned int priority[]); | 42 | extern void __init at91cap9_init_interrupts(unsigned int priority[]); |
31 | extern void __init at572d940hf_init_interrupts(unsigned int priority[]); | ||
32 | extern void __init at91_aic_init(unsigned int priority[]); | 43 | extern void __init at91_aic_init(unsigned int priority[]); |
33 | 44 | ||
34 | /* Timer */ | 45 | /* Timer */ |
@@ -39,8 +50,19 @@ extern struct sys_timer at91x40_timer; | |||
39 | 50 | ||
40 | /* Clocks */ | 51 | /* Clocks */ |
41 | extern int __init at91_clock_init(unsigned long main_clock); | 52 | extern int __init at91_clock_init(unsigned long main_clock); |
53 | /* | ||
54 | * function to specify the clock of the default console. As we do not | ||
55 | * use the device/driver bus, the dev_name is not intialize. So we need | ||
56 | * to link the clock to a specific con_id only "usart" | ||
57 | */ | ||
58 | extern void __init at91rm9200_set_console_clock(int id); | ||
59 | extern void __init at91sam9260_set_console_clock(int id); | ||
60 | extern void __init at91sam9261_set_console_clock(int id); | ||
61 | extern void __init at91sam9263_set_console_clock(int id); | ||
62 | extern void __init at91sam9rl_set_console_clock(int id); | ||
63 | extern void __init at91sam9g45_set_console_clock(int id); | ||
64 | extern void __init at91cap9_set_console_clock(int id); | ||
42 | struct device; | 65 | struct device; |
43 | extern void __init at91_clock_associate(const char *id, struct device *dev, const char *func); | ||
44 | 66 | ||
45 | /* Power Management */ | 67 | /* Power Management */ |
46 | extern void at91_irq_suspend(void); | 68 | extern void at91_irq_suspend(void); |
diff --git a/arch/arm/mach-at91/include/mach/at572d940hf.h b/arch/arm/mach-at91/include/mach/at572d940hf.h deleted file mode 100644 index be510cfc56be..000000000000 --- a/arch/arm/mach-at91/include/mach/at572d940hf.h +++ /dev/null | |||
@@ -1,123 +0,0 @@ | |||
1 | /* | ||
2 | * include/mach/at572d940hf.h | ||
3 | * | ||
4 | * Antonio R. Costa <costa.antonior@gmail.com> | ||
5 | * Copyright (C) 2008 Atmel | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | * | ||
21 | */ | ||
22 | |||
23 | #ifndef AT572D940HF_H | ||
24 | #define AT572D940HF_H | ||
25 | |||
26 | /* | ||
27 | * Peripheral identifiers/interrupts. | ||
28 | */ | ||
29 | #define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ | ||
30 | #define AT91_ID_SYS 1 /* System Peripherals */ | ||
31 | #define AT572D940HF_ID_PIOA 2 /* Parallel IO Controller A */ | ||
32 | #define AT572D940HF_ID_PIOB 3 /* Parallel IO Controller B */ | ||
33 | #define AT572D940HF_ID_PIOC 4 /* Parallel IO Controller C */ | ||
34 | #define AT572D940HF_ID_EMAC 5 /* MACB ethernet controller */ | ||
35 | #define AT572D940HF_ID_US0 6 /* USART 0 */ | ||
36 | #define AT572D940HF_ID_US1 7 /* USART 1 */ | ||
37 | #define AT572D940HF_ID_US2 8 /* USART 2 */ | ||
38 | #define AT572D940HF_ID_MCI 9 /* Multimedia Card Interface */ | ||
39 | #define AT572D940HF_ID_UDP 10 /* USB Device Port */ | ||
40 | #define AT572D940HF_ID_TWI0 11 /* Two-Wire Interface 0 */ | ||
41 | #define AT572D940HF_ID_SPI0 12 /* Serial Peripheral Interface 0 */ | ||
42 | #define AT572D940HF_ID_SPI1 13 /* Serial Peripheral Interface 1 */ | ||
43 | #define AT572D940HF_ID_SSC0 14 /* Serial Synchronous Controller 0 */ | ||
44 | #define AT572D940HF_ID_SSC1 15 /* Serial Synchronous Controller 1 */ | ||
45 | #define AT572D940HF_ID_SSC2 16 /* Serial Synchronous Controller 2 */ | ||
46 | #define AT572D940HF_ID_TC0 17 /* Timer Counter 0 */ | ||
47 | #define AT572D940HF_ID_TC1 18 /* Timer Counter 1 */ | ||
48 | #define AT572D940HF_ID_TC2 19 /* Timer Counter 2 */ | ||
49 | #define AT572D940HF_ID_UHP 20 /* USB Host port */ | ||
50 | #define AT572D940HF_ID_SSC3 21 /* Serial Synchronous Controller 3 */ | ||
51 | #define AT572D940HF_ID_TWI1 22 /* Two-Wire Interface 1 */ | ||
52 | #define AT572D940HF_ID_CAN0 23 /* CAN Controller 0 */ | ||
53 | #define AT572D940HF_ID_CAN1 24 /* CAN Controller 1 */ | ||
54 | #define AT572D940HF_ID_MHALT 25 /* mAgicV HALT line */ | ||
55 | #define AT572D940HF_ID_MSIRQ0 26 /* mAgicV SIRQ0 line */ | ||
56 | #define AT572D940HF_ID_MEXC 27 /* mAgicV exception line */ | ||
57 | #define AT572D940HF_ID_MEDMA 28 /* mAgicV end of DMA line */ | ||
58 | #define AT572D940HF_ID_IRQ0 29 /* External Interrupt Source (IRQ0) */ | ||
59 | #define AT572D940HF_ID_IRQ1 30 /* External Interrupt Source (IRQ1) */ | ||
60 | #define AT572D940HF_ID_IRQ2 31 /* External Interrupt Source (IRQ2) */ | ||
61 | |||
62 | |||
63 | /* | ||
64 | * User Peripheral physical base addresses. | ||
65 | */ | ||
66 | #define AT572D940HF_BASE_TCB 0xfffa0000 | ||
67 | #define AT572D940HF_BASE_TC0 0xfffa0000 | ||
68 | #define AT572D940HF_BASE_TC1 0xfffa0040 | ||
69 | #define AT572D940HF_BASE_TC2 0xfffa0080 | ||
70 | #define AT572D940HF_BASE_UDP 0xfffa4000 | ||
71 | #define AT572D940HF_BASE_MCI 0xfffa8000 | ||
72 | #define AT572D940HF_BASE_TWI0 0xfffac000 | ||
73 | #define AT572D940HF_BASE_US0 0xfffb0000 | ||
74 | #define AT572D940HF_BASE_US1 0xfffb4000 | ||
75 | #define AT572D940HF_BASE_US2 0xfffb8000 | ||
76 | #define AT572D940HF_BASE_SSC0 0xfffbc000 | ||
77 | #define AT572D940HF_BASE_SSC1 0xfffc0000 | ||
78 | #define AT572D940HF_BASE_SSC2 0xfffc4000 | ||
79 | #define AT572D940HF_BASE_SPI0 0xfffc8000 | ||
80 | #define AT572D940HF_BASE_SPI1 0xfffcc000 | ||
81 | #define AT572D940HF_BASE_SSC3 0xfffd0000 | ||
82 | #define AT572D940HF_BASE_TWI1 0xfffd4000 | ||
83 | #define AT572D940HF_BASE_EMAC 0xfffd8000 | ||
84 | #define AT572D940HF_BASE_CAN0 0xfffdc000 | ||
85 | #define AT572D940HF_BASE_CAN1 0xfffe0000 | ||
86 | #define AT91_BASE_SYS 0xffffea00 | ||
87 | |||
88 | |||
89 | /* | ||
90 | * System Peripherals (offset from AT91_BASE_SYS) | ||
91 | */ | ||
92 | #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) | ||
93 | #define AT91_SMC (0xffffec00 - AT91_BASE_SYS) | ||
94 | #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) | ||
95 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) | ||
96 | #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) | ||
97 | #define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) | ||
98 | #define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) | ||
99 | #define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) | ||
100 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | ||
101 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | ||
102 | #define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) | ||
103 | #define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) | ||
104 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | ||
105 | |||
106 | #define AT91_USART0 AT572D940HF_ID_US0 | ||
107 | #define AT91_USART1 AT572D940HF_ID_US1 | ||
108 | #define AT91_USART2 AT572D940HF_ID_US2 | ||
109 | |||
110 | |||
111 | /* | ||
112 | * Internal Memory. | ||
113 | */ | ||
114 | #define AT572D940HF_SRAM_BASE 0x00300000 /* Internal SRAM base address */ | ||
115 | #define AT572D940HF_SRAM_SIZE (48 * SZ_1K) /* Internal SRAM size (48Kb) */ | ||
116 | |||
117 | #define AT572D940HF_ROM_BASE 0x00400000 /* Internal ROM base address */ | ||
118 | #define AT572D940HF_ROM_SIZE SZ_32K /* Internal ROM size (32Kb) */ | ||
119 | |||
120 | #define AT572D940HF_UHP_BASE 0x00500000 /* USB Host controller */ | ||
121 | |||
122 | |||
123 | #endif | ||
diff --git a/arch/arm/mach-at91/include/mach/at572d940hf_matrix.h b/arch/arm/mach-at91/include/mach/at572d940hf_matrix.h deleted file mode 100644 index b6751df09488..000000000000 --- a/arch/arm/mach-at91/include/mach/at572d940hf_matrix.h +++ /dev/null | |||
@@ -1,123 +0,0 @@ | |||
1 | /* | ||
2 | * include/mach//at572d940hf_matrix.h | ||
3 | * | ||
4 | * Antonio R. Costa <costa.antonior@gmail.com> | ||
5 | * Copyright (C) 2008 Atmel | ||
6 | * | ||
7 | * Copyright (C) 2005 SAN People | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
22 | */ | ||
23 | |||
24 | #ifndef AT572D940HF_MATRIX_H | ||
25 | #define AT572D940HF_MATRIX_H | ||
26 | |||
27 | #define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ | ||
28 | #define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ | ||
29 | #define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ | ||
30 | #define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ | ||
31 | #define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ | ||
32 | #define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ | ||
33 | |||
34 | #define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ | ||
35 | #define AT91_MATRIX_ULBT_INFINITE (0 << 0) | ||
36 | #define AT91_MATRIX_ULBT_SINGLE (1 << 0) | ||
37 | #define AT91_MATRIX_ULBT_FOUR (2 << 0) | ||
38 | #define AT91_MATRIX_ULBT_EIGHT (3 << 0) | ||
39 | #define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) | ||
40 | |||
41 | #define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ | ||
42 | #define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ | ||
43 | #define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ | ||
44 | #define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ | ||
45 | #define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ | ||
46 | #define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ | ||
47 | #define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ | ||
48 | #define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) | ||
49 | #define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) | ||
50 | #define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) | ||
51 | #define AT91_MATRIX_FIXED_DEFMSTR (0x7 << 18) /* Fixed Index of Default Master */ | ||
52 | #define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ | ||
53 | #define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) | ||
54 | #define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) | ||
55 | |||
56 | #define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ | ||
57 | #define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ | ||
58 | #define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ | ||
59 | #define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ | ||
60 | #define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ | ||
61 | |||
62 | #define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ | ||
63 | #define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ | ||
64 | #define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ | ||
65 | #define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ | ||
66 | #define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ | ||
67 | #define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ | ||
68 | #define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */ | ||
69 | |||
70 | #define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ | ||
71 | #define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ | ||
72 | #define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ | ||
73 | |||
74 | #define AT91_MATRIX_SFR0 (AT91_MATRIX + 0x110) /* Special Function Register 0 */ | ||
75 | #define AT91_MATRIX_SFR1 (AT91_MATRIX + 0x114) /* Special Function Register 1 */ | ||
76 | #define AT91_MATRIX_SFR2 (AT91_MATRIX + 0x118) /* Special Function Register 2 */ | ||
77 | #define AT91_MATRIX_SFR3 (AT91_MATRIX + 0x11C) /* Special Function Register 3 */ | ||
78 | #define AT91_MATRIX_SFR4 (AT91_MATRIX + 0x120) /* Special Function Register 4 */ | ||
79 | #define AT91_MATRIX_SFR5 (AT91_MATRIX + 0x124) /* Special Function Register 5 */ | ||
80 | #define AT91_MATRIX_SFR6 (AT91_MATRIX + 0x128) /* Special Function Register 6 */ | ||
81 | #define AT91_MATRIX_SFR7 (AT91_MATRIX + 0x12C) /* Special Function Register 7 */ | ||
82 | #define AT91_MATRIX_SFR8 (AT91_MATRIX + 0x130) /* Special Function Register 8 */ | ||
83 | #define AT91_MATRIX_SFR9 (AT91_MATRIX + 0x134) /* Special Function Register 9 */ | ||
84 | #define AT91_MATRIX_SFR10 (AT91_MATRIX + 0x138) /* Special Function Register 10 */ | ||
85 | #define AT91_MATRIX_SFR11 (AT91_MATRIX + 0x13C) /* Special Function Register 11 */ | ||
86 | #define AT91_MATRIX_SFR12 (AT91_MATRIX + 0x140) /* Special Function Register 12 */ | ||
87 | #define AT91_MATRIX_SFR13 (AT91_MATRIX + 0x144) /* Special Function Register 13 */ | ||
88 | #define AT91_MATRIX_SFR14 (AT91_MATRIX + 0x148) /* Special Function Register 14 */ | ||
89 | #define AT91_MATRIX_SFR15 (AT91_MATRIX + 0x14C) /* Special Function Register 15 */ | ||
90 | |||
91 | |||
92 | /* | ||
93 | * The following registers / bits are not defined in the Datasheet (Revision A) | ||
94 | */ | ||
95 | |||
96 | #define AT91_MATRIX_TCR (AT91_MATRIX + 0x100) /* TCM Configuration Register */ | ||
97 | #define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ | ||
98 | #define AT91_MATRIX_ITCM_0 (0 << 0) | ||
99 | #define AT91_MATRIX_ITCM_16 (5 << 0) | ||
100 | #define AT91_MATRIX_ITCM_32 (6 << 0) | ||
101 | #define AT91_MATRIX_ITCM_64 (7 << 0) | ||
102 | #define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ | ||
103 | #define AT91_MATRIX_DTCM_0 (0 << 4) | ||
104 | #define AT91_MATRIX_DTCM_16 (5 << 4) | ||
105 | #define AT91_MATRIX_DTCM_32 (6 << 4) | ||
106 | #define AT91_MATRIX_DTCM_64 (7 << 4) | ||
107 | |||
108 | #define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x11C) /* EBI Chip Select Assignment Register */ | ||
109 | #define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ | ||
110 | #define AT91_MATRIX_CS1A_SMC (0 << 1) | ||
111 | #define AT91_MATRIX_CS1A_SDRAMC (1 << 1) | ||
112 | #define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ | ||
113 | #define AT91_MATRIX_CS3A_SMC (0 << 3) | ||
114 | #define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) | ||
115 | #define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ | ||
116 | #define AT91_MATRIX_CS4A_SMC (0 << 4) | ||
117 | #define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) | ||
118 | #define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ | ||
119 | #define AT91_MATRIX_CS5A_SMC (0 << 5) | ||
120 | #define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) | ||
121 | #define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ | ||
122 | |||
123 | #endif | ||
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h index 9c6af9737485..665993849a7b 100644 --- a/arch/arm/mach-at91/include/mach/at91cap9.h +++ b/arch/arm/mach-at91/include/mach/at91cap9.h | |||
@@ -20,8 +20,6 @@ | |||
20 | /* | 20 | /* |
21 | * Peripheral identifiers/interrupts. | 21 | * Peripheral identifiers/interrupts. |
22 | */ | 22 | */ |
23 | #define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ | ||
24 | #define AT91_ID_SYS 1 /* System Peripherals */ | ||
25 | #define AT91CAP9_ID_PIOABCD 2 /* Parallel IO Controller A, B, C and D */ | 23 | #define AT91CAP9_ID_PIOABCD 2 /* Parallel IO Controller A, B, C and D */ |
26 | #define AT91CAP9_ID_MPB0 3 /* MP Block Peripheral 0 */ | 24 | #define AT91CAP9_ID_MPB0 3 /* MP Block Peripheral 0 */ |
27 | #define AT91CAP9_ID_MPB1 4 /* MP Block Peripheral 1 */ | 25 | #define AT91CAP9_ID_MPB1 4 /* MP Block Peripheral 1 */ |
@@ -123,6 +121,4 @@ | |||
123 | #define AT91CAP9_UDPHS_FIFO 0x00600000 /* USB High Speed Device Port */ | 121 | #define AT91CAP9_UDPHS_FIFO 0x00600000 /* USB High Speed Device Port */ |
124 | #define AT91CAP9_UHP_BASE 0x00700000 /* USB Host controller */ | 122 | #define AT91CAP9_UHP_BASE 0x00700000 /* USB Host controller */ |
125 | 123 | ||
126 | #define CONFIG_DRAM_BASE AT91_CHIPSELECT_6 | ||
127 | |||
128 | #endif | 124 | #endif |
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h index 78983155a074..99e0f8d02d7b 100644 --- a/arch/arm/mach-at91/include/mach/at91rm9200.h +++ b/arch/arm/mach-at91/include/mach/at91rm9200.h | |||
@@ -19,8 +19,6 @@ | |||
19 | /* | 19 | /* |
20 | * Peripheral identifiers/interrupts. | 20 | * Peripheral identifiers/interrupts. |
21 | */ | 21 | */ |
22 | #define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ | ||
23 | #define AT91_ID_SYS 1 /* System Peripheral */ | ||
24 | #define AT91RM9200_ID_PIOA 2 /* Parallel IO Controller A */ | 22 | #define AT91RM9200_ID_PIOA 2 /* Parallel IO Controller A */ |
25 | #define AT91RM9200_ID_PIOB 3 /* Parallel IO Controller B */ | 23 | #define AT91RM9200_ID_PIOB 3 /* Parallel IO Controller B */ |
26 | #define AT91RM9200_ID_PIOC 4 /* Parallel IO Controller C */ | 24 | #define AT91RM9200_ID_PIOC 4 /* Parallel IO Controller C */ |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h index 4e79036d3b80..8b6bf835cd73 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9260.h +++ b/arch/arm/mach-at91/include/mach/at91sam9260.h | |||
@@ -20,8 +20,6 @@ | |||
20 | /* | 20 | /* |
21 | * Peripheral identifiers/interrupts. | 21 | * Peripheral identifiers/interrupts. |
22 | */ | 22 | */ |
23 | #define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ | ||
24 | #define AT91_ID_SYS 1 /* System Peripherals */ | ||
25 | #define AT91SAM9260_ID_PIOA 2 /* Parallel IO Controller A */ | 23 | #define AT91SAM9260_ID_PIOA 2 /* Parallel IO Controller A */ |
26 | #define AT91SAM9260_ID_PIOB 3 /* Parallel IO Controller B */ | 24 | #define AT91SAM9260_ID_PIOB 3 /* Parallel IO Controller B */ |
27 | #define AT91SAM9260_ID_PIOC 4 /* Parallel IO Controller C */ | 25 | #define AT91SAM9260_ID_PIOC 4 /* Parallel IO Controller C */ |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h index 2b5618518129..eafbddaf523c 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9261.h +++ b/arch/arm/mach-at91/include/mach/at91sam9261.h | |||
@@ -18,8 +18,6 @@ | |||
18 | /* | 18 | /* |
19 | * Peripheral identifiers/interrupts. | 19 | * Peripheral identifiers/interrupts. |
20 | */ | 20 | */ |
21 | #define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ | ||
22 | #define AT91_ID_SYS 1 /* System Peripherals */ | ||
23 | #define AT91SAM9261_ID_PIOA 2 /* Parallel IO Controller A */ | 21 | #define AT91SAM9261_ID_PIOA 2 /* Parallel IO Controller A */ |
24 | #define AT91SAM9261_ID_PIOB 3 /* Parallel IO Controller B */ | 22 | #define AT91SAM9261_ID_PIOB 3 /* Parallel IO Controller B */ |
25 | #define AT91SAM9261_ID_PIOC 4 /* Parallel IO Controller C */ | 23 | #define AT91SAM9261_ID_PIOC 4 /* Parallel IO Controller C */ |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h index 2091f1e42d43..e2d348213a7b 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9263.h +++ b/arch/arm/mach-at91/include/mach/at91sam9263.h | |||
@@ -18,8 +18,6 @@ | |||
18 | /* | 18 | /* |
19 | * Peripheral identifiers/interrupts. | 19 | * Peripheral identifiers/interrupts. |
20 | */ | 20 | */ |
21 | #define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ | ||
22 | #define AT91_ID_SYS 1 /* System Peripherals */ | ||
23 | #define AT91SAM9263_ID_PIOA 2 /* Parallel IO Controller A */ | 21 | #define AT91SAM9263_ID_PIOA 2 /* Parallel IO Controller A */ |
24 | #define AT91SAM9263_ID_PIOB 3 /* Parallel IO Controller B */ | 22 | #define AT91SAM9263_ID_PIOB 3 /* Parallel IO Controller B */ |
25 | #define AT91SAM9263_ID_PIOCDE 4 /* Parallel IO Controller C, D and E */ | 23 | #define AT91SAM9263_ID_PIOCDE 4 /* Parallel IO Controller C, D and E */ |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h index a526869aee37..659304aa73d9 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9g45.h +++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h | |||
@@ -18,8 +18,6 @@ | |||
18 | /* | 18 | /* |
19 | * Peripheral identifiers/interrupts. | 19 | * Peripheral identifiers/interrupts. |
20 | */ | 20 | */ |
21 | #define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ | ||
22 | #define AT91_ID_SYS 1 /* System Controller Interrupt */ | ||
23 | #define AT91SAM9G45_ID_PIOA 2 /* Parallel I/O Controller A */ | 21 | #define AT91SAM9G45_ID_PIOA 2 /* Parallel I/O Controller A */ |
24 | #define AT91SAM9G45_ID_PIOB 3 /* Parallel I/O Controller B */ | 22 | #define AT91SAM9G45_ID_PIOB 3 /* Parallel I/O Controller B */ |
25 | #define AT91SAM9G45_ID_PIOC 4 /* Parallel I/O Controller C */ | 23 | #define AT91SAM9G45_ID_PIOC 4 /* Parallel I/O Controller C */ |
@@ -131,8 +129,6 @@ | |||
131 | #define AT91SAM9G45_EHCI_BASE 0x00800000 /* USB Host controller (EHCI) */ | 129 | #define AT91SAM9G45_EHCI_BASE 0x00800000 /* USB Host controller (EHCI) */ |
132 | #define AT91SAM9G45_VDEC_BASE 0x00900000 /* Video Decoder Controller */ | 130 | #define AT91SAM9G45_VDEC_BASE 0x00900000 /* Video Decoder Controller */ |
133 | 131 | ||
134 | #define CONFIG_DRAM_BASE AT91_CHIPSELECT_6 | ||
135 | |||
136 | #define CONSISTENT_DMA_SIZE SZ_4M | 132 | #define CONSISTENT_DMA_SIZE SZ_4M |
137 | 133 | ||
138 | /* | 134 | /* |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h index 87ba8517ad98..41dbbe61055c 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9rl.h +++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h | |||
@@ -17,8 +17,6 @@ | |||
17 | /* | 17 | /* |
18 | * Peripheral identifiers/interrupts. | 18 | * Peripheral identifiers/interrupts. |
19 | */ | 19 | */ |
20 | #define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ | ||
21 | #define AT91_ID_SYS 1 /* System Controller */ | ||
22 | #define AT91SAM9RL_ID_PIOA 2 /* Parallel IO Controller A */ | 20 | #define AT91SAM9RL_ID_PIOA 2 /* Parallel IO Controller A */ |
23 | #define AT91SAM9RL_ID_PIOB 3 /* Parallel IO Controller B */ | 21 | #define AT91SAM9RL_ID_PIOB 3 /* Parallel IO Controller B */ |
24 | #define AT91SAM9RL_ID_PIOC 4 /* Parallel IO Controller C */ | 22 | #define AT91SAM9RL_ID_PIOC 4 /* Parallel IO Controller C */ |
diff --git a/arch/arm/mach-at91/include/mach/at91x40.h b/arch/arm/mach-at91/include/mach/at91x40.h index 063ac44a0204..a152ff87e688 100644 --- a/arch/arm/mach-at91/include/mach/at91x40.h +++ b/arch/arm/mach-at91/include/mach/at91x40.h | |||
@@ -15,8 +15,6 @@ | |||
15 | /* | 15 | /* |
16 | * IRQ list. | 16 | * IRQ list. |
17 | */ | 17 | */ |
18 | #define AT91_ID_FIQ 0 /* FIQ */ | ||
19 | #define AT91_ID_SYS 1 /* System Peripheral */ | ||
20 | #define AT91X40_ID_USART0 2 /* USART port 0 */ | 18 | #define AT91X40_ID_USART0 2 /* USART port 0 */ |
21 | #define AT91X40_ID_USART1 3 /* USART port 1 */ | 19 | #define AT91X40_ID_USART1 3 /* USART port 1 */ |
22 | #define AT91X40_ID_TC0 4 /* Timer/Counter 0 */ | 20 | #define AT91X40_ID_TC0 4 /* Timer/Counter 0 */ |
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h index 2b499eb343a1..ed544a0d5a1d 100644 --- a/arch/arm/mach-at91/include/mach/board.h +++ b/arch/arm/mach-at91/include/mach/board.h | |||
@@ -90,7 +90,7 @@ struct at91_eth_data { | |||
90 | extern void __init at91_add_device_eth(struct at91_eth_data *data); | 90 | extern void __init at91_add_device_eth(struct at91_eth_data *data); |
91 | 91 | ||
92 | #if defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91SAM9G20) || defined(CONFIG_ARCH_AT91CAP9) \ | 92 | #if defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91SAM9G20) || defined(CONFIG_ARCH_AT91CAP9) \ |
93 | || defined(CONFIG_ARCH_AT91SAM9G45) || defined(CONFIG_ARCH_AT572D940HF) | 93 | || defined(CONFIG_ARCH_AT91SAM9G45) |
94 | #define eth_platform_data at91_eth_data | 94 | #define eth_platform_data at91_eth_data |
95 | #endif | 95 | #endif |
96 | 96 | ||
@@ -140,6 +140,7 @@ extern void __init at91_set_serial_console(unsigned portnr); | |||
140 | extern struct platform_device *atmel_default_console_device; | 140 | extern struct platform_device *atmel_default_console_device; |
141 | 141 | ||
142 | struct atmel_uart_data { | 142 | struct atmel_uart_data { |
143 | int num; /* port num */ | ||
143 | short use_dma_tx; /* use transmit DMA? */ | 144 | short use_dma_tx; /* use transmit DMA? */ |
144 | short use_dma_rx; /* use receive DMA? */ | 145 | short use_dma_rx; /* use receive DMA? */ |
145 | void __iomem *regs; /* virt. base address, if any */ | 146 | void __iomem *regs; /* virt. base address, if any */ |
@@ -203,9 +204,6 @@ extern void __init at91_init_leds(u8 cpu_led, u8 timer_led); | |||
203 | extern void __init at91_gpio_leds(struct gpio_led *leds, int nr); | 204 | extern void __init at91_gpio_leds(struct gpio_led *leds, int nr); |
204 | extern void __init at91_pwm_leds(struct gpio_led *leds, int nr); | 205 | extern void __init at91_pwm_leds(struct gpio_led *leds, int nr); |
205 | 206 | ||
206 | /* AT572D940HF DSP */ | ||
207 | extern void __init at91_add_device_mAgic(void); | ||
208 | |||
209 | /* FIXME: this needs a better location, but gets stuff building again */ | 207 | /* FIXME: this needs a better location, but gets stuff building again */ |
210 | extern int at91_suspend_entering_slow_clock(void); | 208 | extern int at91_suspend_entering_slow_clock(void); |
211 | 209 | ||
diff --git a/arch/arm/mach-at91/include/mach/clkdev.h b/arch/arm/mach-at91/include/mach/clkdev.h new file mode 100644 index 000000000000..04b37a89801c --- /dev/null +++ b/arch/arm/mach-at91/include/mach/clkdev.h | |||
@@ -0,0 +1,7 @@ | |||
1 | #ifndef __ASM_MACH_CLKDEV_H | ||
2 | #define __ASM_MACH_CLKDEV_H | ||
3 | |||
4 | #define __clk_get(clk) ({ 1; }) | ||
5 | #define __clk_put(clk) do { } while (0) | ||
6 | |||
7 | #endif | ||
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h index 0700f2125305..df966c2bc2d4 100644 --- a/arch/arm/mach-at91/include/mach/cpu.h +++ b/arch/arm/mach-at91/include/mach/cpu.h | |||
@@ -34,8 +34,6 @@ | |||
34 | #define ARCH_ID_AT91SAM9XE256 0x329a93a0 | 34 | #define ARCH_ID_AT91SAM9XE256 0x329a93a0 |
35 | #define ARCH_ID_AT91SAM9XE512 0x329aa3a0 | 35 | #define ARCH_ID_AT91SAM9XE512 0x329aa3a0 |
36 | 36 | ||
37 | #define ARCH_ID_AT572D940HF 0x0e0303e0 | ||
38 | |||
39 | #define ARCH_ID_AT91M40800 0x14080044 | 37 | #define ARCH_ID_AT91M40800 0x14080044 |
40 | #define ARCH_ID_AT91R40807 0x44080746 | 38 | #define ARCH_ID_AT91R40807 0x44080746 |
41 | #define ARCH_ID_AT91M40807 0x14080745 | 39 | #define ARCH_ID_AT91M40807 0x14080745 |
@@ -90,9 +88,16 @@ static inline unsigned long at91cap9_rev_identify(void) | |||
90 | #endif | 88 | #endif |
91 | 89 | ||
92 | #ifdef CONFIG_ARCH_AT91RM9200 | 90 | #ifdef CONFIG_ARCH_AT91RM9200 |
91 | extern int rm9200_type; | ||
92 | #define ARCH_REVISON_9200_BGA (0 << 0) | ||
93 | #define ARCH_REVISON_9200_PQFP (1 << 0) | ||
93 | #define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200) | 94 | #define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200) |
95 | #define cpu_is_at91rm9200_bga() (!cpu_is_at91rm9200_pqfp()) | ||
96 | #define cpu_is_at91rm9200_pqfp() (cpu_is_at91rm9200() && rm9200_type & ARCH_REVISON_9200_PQFP) | ||
94 | #else | 97 | #else |
95 | #define cpu_is_at91rm9200() (0) | 98 | #define cpu_is_at91rm9200() (0) |
99 | #define cpu_is_at91rm9200_bga() (0) | ||
100 | #define cpu_is_at91rm9200_pqfp() (0) | ||
96 | #endif | 101 | #endif |
97 | 102 | ||
98 | #ifdef CONFIG_ARCH_AT91SAM9260 | 103 | #ifdef CONFIG_ARCH_AT91SAM9260 |
@@ -181,12 +186,6 @@ static inline unsigned long at91cap9_rev_identify(void) | |||
181 | #define cpu_is_at91cap9_revC() (0) | 186 | #define cpu_is_at91cap9_revC() (0) |
182 | #endif | 187 | #endif |
183 | 188 | ||
184 | #ifdef CONFIG_ARCH_AT572D940HF | ||
185 | #define cpu_is_at572d940hf() (at91_cpu_identify() == ARCH_ID_AT572D940HF) | ||
186 | #else | ||
187 | #define cpu_is_at572d940hf() (0) | ||
188 | #endif | ||
189 | |||
190 | /* | 189 | /* |
191 | * Since this is ARM, we will never run on any AVR32 CPU. But these | 190 | * Since this is ARM, we will never run on any AVR32 CPU. But these |
192 | * definitions may reduce clutter in common drivers. | 191 | * definitions may reduce clutter in common drivers. |
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h index 3d64a75e3ed5..1008b9fb5074 100644 --- a/arch/arm/mach-at91/include/mach/hardware.h +++ b/arch/arm/mach-at91/include/mach/hardware.h | |||
@@ -32,13 +32,17 @@ | |||
32 | #include <mach/at91cap9.h> | 32 | #include <mach/at91cap9.h> |
33 | #elif defined(CONFIG_ARCH_AT91X40) | 33 | #elif defined(CONFIG_ARCH_AT91X40) |
34 | #include <mach/at91x40.h> | 34 | #include <mach/at91x40.h> |
35 | #elif defined(CONFIG_ARCH_AT572D940HF) | ||
36 | #include <mach/at572d940hf.h> | ||
37 | #else | 35 | #else |
38 | #error "Unsupported AT91 processor" | 36 | #error "Unsupported AT91 processor" |
39 | #endif | 37 | #endif |
40 | 38 | ||
41 | 39 | ||
40 | /* | ||
41 | * Peripheral identifiers/interrupts. | ||
42 | */ | ||
43 | #define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ | ||
44 | #define AT91_ID_SYS 1 /* System Peripherals */ | ||
45 | |||
42 | #ifdef CONFIG_MMU | 46 | #ifdef CONFIG_MMU |
43 | /* | 47 | /* |
44 | * Remap the peripherals from address 0xFFF78000 .. 0xFFFFFFFF | 48 | * Remap the peripherals from address 0xFFF78000 .. 0xFFFFFFFF |
@@ -82,13 +86,6 @@ | |||
82 | #define AT91_CHIPSELECT_6 0x70000000 | 86 | #define AT91_CHIPSELECT_6 0x70000000 |
83 | #define AT91_CHIPSELECT_7 0x80000000 | 87 | #define AT91_CHIPSELECT_7 0x80000000 |
84 | 88 | ||
85 | /* SDRAM */ | ||
86 | #ifdef CONFIG_DRAM_BASE | ||
87 | #define AT91_SDRAM_BASE CONFIG_DRAM_BASE | ||
88 | #else | ||
89 | #define AT91_SDRAM_BASE AT91_CHIPSELECT_1 | ||
90 | #endif | ||
91 | |||
92 | /* Clocks */ | 89 | /* Clocks */ |
93 | #define AT91_SLOW_CLOCK 32768 /* slow clock */ | 90 | #define AT91_SLOW_CLOCK 32768 /* slow clock */ |
94 | 91 | ||
diff --git a/arch/arm/mach-at91/include/mach/memory.h b/arch/arm/mach-at91/include/mach/memory.h index c2cfe5040642..401c207f2f39 100644 --- a/arch/arm/mach-at91/include/mach/memory.h +++ b/arch/arm/mach-at91/include/mach/memory.h | |||
@@ -23,6 +23,4 @@ | |||
23 | 23 | ||
24 | #include <mach/hardware.h> | 24 | #include <mach/hardware.h> |
25 | 25 | ||
26 | #define PLAT_PHYS_OFFSET (AT91_SDRAM_BASE) | ||
27 | |||
28 | #endif | 26 | #endif |
diff --git a/arch/arm/mach-at91/include/mach/stamp9g20.h b/arch/arm/mach-at91/include/mach/stamp9g20.h index 6120f9c46d59..f62c0abca4b4 100644 --- a/arch/arm/mach-at91/include/mach/stamp9g20.h +++ b/arch/arm/mach-at91/include/mach/stamp9g20.h | |||
@@ -1,7 +1,7 @@ | |||
1 | #ifndef __MACH_STAMP9G20_H | 1 | #ifndef __MACH_STAMP9G20_H |
2 | #define __MACH_STAMP9G20_H | 2 | #define __MACH_STAMP9G20_H |
3 | 3 | ||
4 | void stamp9g20_map_io(void); | 4 | void stamp9g20_init_early(void); |
5 | void stamp9g20_board_init(void); | 5 | void stamp9g20_board_init(void); |
6 | 6 | ||
7 | #endif | 7 | #endif |
diff --git a/arch/arm/mach-at91/include/mach/system_rev.h b/arch/arm/mach-at91/include/mach/system_rev.h new file mode 100644 index 000000000000..b855ee75f72c --- /dev/null +++ b/arch/arm/mach-at91/include/mach/system_rev.h | |||
@@ -0,0 +1,25 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | ||
3 | * | ||
4 | * Under GPLv2 only | ||
5 | */ | ||
6 | |||
7 | #ifndef __ARCH_SYSTEM_REV_H__ | ||
8 | #define __ARCH_SYSTEM_REV_H__ | ||
9 | |||
10 | /* | ||
11 | * board revision encoding | ||
12 | * mach specific | ||
13 | * the 16-31 bit are reserved for at91 generic information | ||
14 | * | ||
15 | * bit 31: | ||
16 | * 0 => nand 16 bit | ||
17 | * 1 => nand 8 bit | ||
18 | */ | ||
19 | #define BOARD_HAVE_NAND_8BIT (1 << 31) | ||
20 | static int inline board_have_nand_8bit(void) | ||
21 | { | ||
22 | return system_rev & BOARD_HAVE_NAND_8BIT; | ||
23 | } | ||
24 | |||
25 | #endif /* __ARCH_SYSTEM_REV_H__ */ | ||
diff --git a/arch/arm/mach-at91/include/mach/timex.h b/arch/arm/mach-at91/include/mach/timex.h index 05a6e8af80c4..31ac2d97f14c 100644 --- a/arch/arm/mach-at91/include/mach/timex.h +++ b/arch/arm/mach-at91/include/mach/timex.h | |||
@@ -82,11 +82,6 @@ | |||
82 | #define AT91X40_MASTER_CLOCK 40000000 | 82 | #define AT91X40_MASTER_CLOCK 40000000 |
83 | #define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK) | 83 | #define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK) |
84 | 84 | ||
85 | #elif defined(CONFIG_ARCH_AT572D940HF) | ||
86 | |||
87 | #define AT572D940HF_MASTER_CLOCK 80000000 | ||
88 | #define CLOCK_TICK_RATE (AT572D940HF_MASTER_CLOCK/16) | ||
89 | |||
90 | #endif | 85 | #endif |
91 | 86 | ||
92 | #endif | 87 | #endif |
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index b95b9196deed..133aac405853 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c | |||
@@ -1055,7 +1055,7 @@ int da850_register_pm(struct platform_device *pdev) | |||
1055 | if (!pdata->cpupll_reg_base) | 1055 | if (!pdata->cpupll_reg_base) |
1056 | return -ENOMEM; | 1056 | return -ENOMEM; |
1057 | 1057 | ||
1058 | pdata->ddrpll_reg_base = ioremap(DA8XX_PLL1_BASE, SZ_4K); | 1058 | pdata->ddrpll_reg_base = ioremap(DA850_PLL1_BASE, SZ_4K); |
1059 | if (!pdata->ddrpll_reg_base) { | 1059 | if (!pdata->ddrpll_reg_base) { |
1060 | ret = -ENOMEM; | 1060 | ret = -ENOMEM; |
1061 | goto no_ddrpll_mem; | 1061 | goto no_ddrpll_mem; |
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 58a02dc7b15a..4e66881c7aee 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c | |||
@@ -24,23 +24,25 @@ | |||
24 | #include "clock.h" | 24 | #include "clock.h" |
25 | 25 | ||
26 | #define DA8XX_TPCC_BASE 0x01c00000 | 26 | #define DA8XX_TPCC_BASE 0x01c00000 |
27 | #define DA850_MMCSD1_BASE 0x01e1b000 | ||
28 | #define DA850_TPCC1_BASE 0x01e30000 | ||
29 | #define DA8XX_TPTC0_BASE 0x01c08000 | 27 | #define DA8XX_TPTC0_BASE 0x01c08000 |
30 | #define DA8XX_TPTC1_BASE 0x01c08400 | 28 | #define DA8XX_TPTC1_BASE 0x01c08400 |
31 | #define DA850_TPTC2_BASE 0x01e38000 | ||
32 | #define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */ | 29 | #define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */ |
33 | #define DA8XX_I2C0_BASE 0x01c22000 | 30 | #define DA8XX_I2C0_BASE 0x01c22000 |
34 | #define DA8XX_RTC_BASE 0x01C23000 | 31 | #define DA8XX_RTC_BASE 0x01c23000 |
32 | #define DA8XX_MMCSD0_BASE 0x01c40000 | ||
33 | #define DA8XX_SPI0_BASE 0x01c41000 | ||
34 | #define DA830_SPI1_BASE 0x01e12000 | ||
35 | #define DA8XX_LCD_CNTRL_BASE 0x01e13000 | ||
36 | #define DA850_MMCSD1_BASE 0x01e1b000 | ||
35 | #define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000 | 37 | #define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000 |
36 | #define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000 | 38 | #define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000 |
37 | #define DA8XX_EMAC_CPGMAC_BASE 0x01e23000 | 39 | #define DA8XX_EMAC_CPGMAC_BASE 0x01e23000 |
38 | #define DA8XX_EMAC_MDIO_BASE 0x01e24000 | 40 | #define DA8XX_EMAC_MDIO_BASE 0x01e24000 |
39 | #define DA8XX_GPIO_BASE 0x01e26000 | ||
40 | #define DA8XX_I2C1_BASE 0x01e28000 | 41 | #define DA8XX_I2C1_BASE 0x01e28000 |
41 | #define DA8XX_SPI0_BASE 0x01c41000 | 42 | #define DA850_TPCC1_BASE 0x01e30000 |
42 | #define DA830_SPI1_BASE 0x01e12000 | 43 | #define DA850_TPTC2_BASE 0x01e38000 |
43 | #define DA850_SPI1_BASE 0x01f0e000 | 44 | #define DA850_SPI1_BASE 0x01f0e000 |
45 | #define DA8XX_DDR2_CTL_BASE 0xb0000000 | ||
44 | 46 | ||
45 | #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 | 47 | #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 |
46 | #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 | 48 | #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 |
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c index 22ebc64bc9d9..8f4f736aa267 100644 --- a/arch/arm/mach-davinci/devices.c +++ b/arch/arm/mach-davinci/devices.c | |||
@@ -33,6 +33,9 @@ | |||
33 | #define DM365_MMCSD0_BASE 0x01D11000 | 33 | #define DM365_MMCSD0_BASE 0x01D11000 |
34 | #define DM365_MMCSD1_BASE 0x01D00000 | 34 | #define DM365_MMCSD1_BASE 0x01D00000 |
35 | 35 | ||
36 | /* System control register offsets */ | ||
37 | #define DM64XX_VDD3P3V_PWDN 0x48 | ||
38 | |||
36 | static struct resource i2c_resources[] = { | 39 | static struct resource i2c_resources[] = { |
37 | { | 40 | { |
38 | .start = DAVINCI_I2C_BASE, | 41 | .start = DAVINCI_I2C_BASE, |
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index e4fc1af8500e..ad64da713fc8 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h | |||
@@ -64,13 +64,9 @@ extern unsigned int da850_max_speed; | |||
64 | #define DA8XX_TIMER64P1_BASE 0x01c21000 | 64 | #define DA8XX_TIMER64P1_BASE 0x01c21000 |
65 | #define DA8XX_GPIO_BASE 0x01e26000 | 65 | #define DA8XX_GPIO_BASE 0x01e26000 |
66 | #define DA8XX_PSC1_BASE 0x01e27000 | 66 | #define DA8XX_PSC1_BASE 0x01e27000 |
67 | #define DA8XX_LCD_CNTRL_BASE 0x01e13000 | ||
68 | #define DA8XX_PLL1_BASE 0x01e1a000 | ||
69 | #define DA8XX_MMCSD0_BASE 0x01c40000 | ||
70 | #define DA8XX_AEMIF_CS2_BASE 0x60000000 | 67 | #define DA8XX_AEMIF_CS2_BASE 0x60000000 |
71 | #define DA8XX_AEMIF_CS3_BASE 0x62000000 | 68 | #define DA8XX_AEMIF_CS3_BASE 0x62000000 |
72 | #define DA8XX_AEMIF_CTL_BASE 0x68000000 | 69 | #define DA8XX_AEMIF_CTL_BASE 0x68000000 |
73 | #define DA8XX_DDR2_CTL_BASE 0xb0000000 | ||
74 | #define DA8XX_ARM_RAM_BASE 0xffff0000 | 70 | #define DA8XX_ARM_RAM_BASE 0xffff0000 |
75 | 71 | ||
76 | void __init da830_init(void); | 72 | void __init da830_init(void); |
diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h index c45ba1f62a11..414e0b93e741 100644 --- a/arch/arm/mach-davinci/include/mach/hardware.h +++ b/arch/arm/mach-davinci/include/mach/hardware.h | |||
@@ -21,9 +21,6 @@ | |||
21 | */ | 21 | */ |
22 | #define DAVINCI_SYSTEM_MODULE_BASE 0x01C40000 | 22 | #define DAVINCI_SYSTEM_MODULE_BASE 0x01C40000 |
23 | 23 | ||
24 | /* System control register offsets */ | ||
25 | #define DM64XX_VDD3P3V_PWDN 0x48 | ||
26 | |||
27 | /* | 24 | /* |
28 | * I/O mapping | 25 | * I/O mapping |
29 | */ | 26 | */ |
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig index 805196207ce8..b92c1e557145 100644 --- a/arch/arm/mach-exynos4/Kconfig +++ b/arch/arm/mach-exynos4/Kconfig | |||
@@ -169,9 +169,11 @@ config MACH_NURI | |||
169 | select S3C_DEV_HSMMC2 | 169 | select S3C_DEV_HSMMC2 |
170 | select S3C_DEV_HSMMC3 | 170 | select S3C_DEV_HSMMC3 |
171 | select S3C_DEV_I2C1 | 171 | select S3C_DEV_I2C1 |
172 | select S3C_DEV_I2C3 | ||
172 | select S3C_DEV_I2C5 | 173 | select S3C_DEV_I2C5 |
173 | select S5P_DEV_USB_EHCI | 174 | select S5P_DEV_USB_EHCI |
174 | select EXYNOS4_SETUP_I2C1 | 175 | select EXYNOS4_SETUP_I2C1 |
176 | select EXYNOS4_SETUP_I2C3 | ||
175 | select EXYNOS4_SETUP_I2C5 | 177 | select EXYNOS4_SETUP_I2C5 |
176 | select EXYNOS4_SETUP_SDHCI | 178 | select EXYNOS4_SETUP_SDHCI |
177 | select SAMSUNG_DEV_PWM | 179 | select SAMSUNG_DEV_PWM |
diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile index 777897551e42..683fc387c8af 100644 --- a/arch/arm/mach-exynos4/Makefile +++ b/arch/arm/mach-exynos4/Makefile | |||
@@ -16,6 +16,7 @@ obj-$(CONFIG_CPU_EXYNOS4210) += cpu.o init.o clock.o irq-combiner.o | |||
16 | obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o gpiolib.o irq-eint.o dma.o | 16 | obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o gpiolib.o irq-eint.o dma.o |
17 | obj-$(CONFIG_PM) += pm.o sleep.o | 17 | obj-$(CONFIG_PM) += pm.o sleep.o |
18 | obj-$(CONFIG_CPU_FREQ) += cpufreq.o | 18 | obj-$(CONFIG_CPU_FREQ) += cpufreq.o |
19 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o | ||
19 | 20 | ||
20 | obj-$(CONFIG_SMP) += platsmp.o headsmp.o | 21 | obj-$(CONFIG_SMP) += platsmp.o headsmp.o |
21 | 22 | ||
diff --git a/arch/arm/mach-exynos4/cpuidle.c b/arch/arm/mach-exynos4/cpuidle.c new file mode 100644 index 000000000000..bf7e96f2793a --- /dev/null +++ b/arch/arm/mach-exynos4/cpuidle.c | |||
@@ -0,0 +1,86 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/cpuidle.c | ||
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/cpuidle.h> | ||
14 | #include <linux/io.h> | ||
15 | |||
16 | #include <asm/proc-fns.h> | ||
17 | |||
18 | static int exynos4_enter_idle(struct cpuidle_device *dev, | ||
19 | struct cpuidle_state *state); | ||
20 | |||
21 | static struct cpuidle_state exynos4_cpuidle_set[] = { | ||
22 | [0] = { | ||
23 | .enter = exynos4_enter_idle, | ||
24 | .exit_latency = 1, | ||
25 | .target_residency = 100000, | ||
26 | .flags = CPUIDLE_FLAG_TIME_VALID, | ||
27 | .name = "IDLE", | ||
28 | .desc = "ARM clock gating(WFI)", | ||
29 | }, | ||
30 | }; | ||
31 | |||
32 | static DEFINE_PER_CPU(struct cpuidle_device, exynos4_cpuidle_device); | ||
33 | |||
34 | static struct cpuidle_driver exynos4_idle_driver = { | ||
35 | .name = "exynos4_idle", | ||
36 | .owner = THIS_MODULE, | ||
37 | }; | ||
38 | |||
39 | static int exynos4_enter_idle(struct cpuidle_device *dev, | ||
40 | struct cpuidle_state *state) | ||
41 | { | ||
42 | struct timeval before, after; | ||
43 | int idle_time; | ||
44 | |||
45 | local_irq_disable(); | ||
46 | do_gettimeofday(&before); | ||
47 | |||
48 | cpu_do_idle(); | ||
49 | |||
50 | do_gettimeofday(&after); | ||
51 | local_irq_enable(); | ||
52 | idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC + | ||
53 | (after.tv_usec - before.tv_usec); | ||
54 | |||
55 | return idle_time; | ||
56 | } | ||
57 | |||
58 | static int __init exynos4_init_cpuidle(void) | ||
59 | { | ||
60 | int i, max_cpuidle_state, cpu_id; | ||
61 | struct cpuidle_device *device; | ||
62 | |||
63 | cpuidle_register_driver(&exynos4_idle_driver); | ||
64 | |||
65 | for_each_cpu(cpu_id, cpu_online_mask) { | ||
66 | device = &per_cpu(exynos4_cpuidle_device, cpu_id); | ||
67 | device->cpu = cpu_id; | ||
68 | |||
69 | device->state_count = (sizeof(exynos4_cpuidle_set) / | ||
70 | sizeof(struct cpuidle_state)); | ||
71 | |||
72 | max_cpuidle_state = device->state_count; | ||
73 | |||
74 | for (i = 0; i < max_cpuidle_state; i++) { | ||
75 | memcpy(&device->states[i], &exynos4_cpuidle_set[i], | ||
76 | sizeof(struct cpuidle_state)); | ||
77 | } | ||
78 | |||
79 | if (cpuidle_register_device(device)) { | ||
80 | printk(KERN_ERR "CPUidle register device failed\n,"); | ||
81 | return -EIO; | ||
82 | } | ||
83 | } | ||
84 | return 0; | ||
85 | } | ||
86 | device_initcall(exynos4_init_cpuidle); | ||
diff --git a/arch/arm/mach-exynos4/mach-nuri.c b/arch/arm/mach-exynos4/mach-nuri.c index bb5d12f43af8..642702bb5b12 100644 --- a/arch/arm/mach-exynos4/mach-nuri.c +++ b/arch/arm/mach-exynos4/mach-nuri.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/serial_core.h> | 12 | #include <linux/serial_core.h> |
13 | #include <linux/input.h> | 13 | #include <linux/input.h> |
14 | #include <linux/i2c.h> | 14 | #include <linux/i2c.h> |
15 | #include <linux/i2c/atmel_mxt_ts.h> | ||
15 | #include <linux/gpio_keys.h> | 16 | #include <linux/gpio_keys.h> |
16 | #include <linux/gpio.h> | 17 | #include <linux/gpio.h> |
17 | #include <linux/regulator/machine.h> | 18 | #include <linux/regulator/machine.h> |
@@ -32,6 +33,8 @@ | |||
32 | #include <plat/sdhci.h> | 33 | #include <plat/sdhci.h> |
33 | #include <plat/ehci.h> | 34 | #include <plat/ehci.h> |
34 | #include <plat/clock.h> | 35 | #include <plat/clock.h> |
36 | #include <plat/gpio-cfg.h> | ||
37 | #include <plat/iic.h> | ||
35 | 38 | ||
36 | #include <mach/map.h> | 39 | #include <mach/map.h> |
37 | 40 | ||
@@ -259,6 +262,88 @@ static struct i2c_board_info i2c1_devs[] __initdata = { | |||
259 | /* Gyro, To be updated */ | 262 | /* Gyro, To be updated */ |
260 | }; | 263 | }; |
261 | 264 | ||
265 | /* TSP */ | ||
266 | static u8 mxt_init_vals[] = { | ||
267 | /* MXT_GEN_COMMAND(6) */ | ||
268 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
269 | /* MXT_GEN_POWER(7) */ | ||
270 | 0x20, 0xff, 0x32, | ||
271 | /* MXT_GEN_ACQUIRE(8) */ | ||
272 | 0x0a, 0x00, 0x05, 0x00, 0x00, 0x00, 0x09, 0x23, | ||
273 | /* MXT_TOUCH_MULTI(9) */ | ||
274 | 0x00, 0x00, 0x00, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x02, 0x00, | ||
275 | 0x00, 0x01, 0x01, 0x0e, 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00, | ||
276 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
277 | 0x00, | ||
278 | /* MXT_TOUCH_KEYARRAY(15) */ | ||
279 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, | ||
280 | 0x00, | ||
281 | /* MXT_SPT_GPIOPWM(19) */ | ||
282 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
283 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
284 | /* MXT_PROCI_GRIPFACE(20) */ | ||
285 | 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x28, 0x04, | ||
286 | 0x0f, 0x0a, | ||
287 | /* MXT_PROCG_NOISE(22) */ | ||
288 | 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x23, 0x00, | ||
289 | 0x00, 0x05, 0x0f, 0x19, 0x23, 0x2d, 0x03, | ||
290 | /* MXT_TOUCH_PROXIMITY(23) */ | ||
291 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
292 | 0x00, 0x00, 0x00, 0x00, 0x00, | ||
293 | /* MXT_PROCI_ONETOUCH(24) */ | ||
294 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
295 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
296 | /* MXT_SPT_SELFTEST(25) */ | ||
297 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
298 | 0x00, 0x00, 0x00, 0x00, | ||
299 | /* MXT_PROCI_TWOTOUCH(27) */ | ||
300 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
301 | /* MXT_SPT_CTECONFIG(28) */ | ||
302 | 0x00, 0x00, 0x02, 0x08, 0x10, 0x00, | ||
303 | }; | ||
304 | |||
305 | static struct mxt_platform_data mxt_platform_data = { | ||
306 | .config = mxt_init_vals, | ||
307 | .config_length = ARRAY_SIZE(mxt_init_vals), | ||
308 | |||
309 | .x_line = 18, | ||
310 | .y_line = 11, | ||
311 | .x_size = 1024, | ||
312 | .y_size = 600, | ||
313 | .blen = 0x1, | ||
314 | .threshold = 0x28, | ||
315 | .voltage = 2800000, /* 2.8V */ | ||
316 | .orient = MXT_DIAGONAL_COUNTER, | ||
317 | .irqflags = IRQF_TRIGGER_FALLING, | ||
318 | }; | ||
319 | |||
320 | static struct s3c2410_platform_i2c i2c3_data __initdata = { | ||
321 | .flags = 0, | ||
322 | .bus_num = 3, | ||
323 | .slave_addr = 0x10, | ||
324 | .frequency = 400 * 1000, | ||
325 | .sda_delay = 100, | ||
326 | }; | ||
327 | |||
328 | static struct i2c_board_info i2c3_devs[] __initdata = { | ||
329 | { | ||
330 | I2C_BOARD_INFO("atmel_mxt_ts", 0x4a), | ||
331 | .platform_data = &mxt_platform_data, | ||
332 | .irq = IRQ_EINT(4), | ||
333 | }, | ||
334 | }; | ||
335 | |||
336 | static void __init nuri_tsp_init(void) | ||
337 | { | ||
338 | int gpio; | ||
339 | |||
340 | /* TOUCH_INT: XEINT_4 */ | ||
341 | gpio = EXYNOS4_GPX0(4); | ||
342 | gpio_request(gpio, "TOUCH_INT"); | ||
343 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf)); | ||
344 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); | ||
345 | } | ||
346 | |||
262 | /* GPIO I2C 5 (PMIC) */ | 347 | /* GPIO I2C 5 (PMIC) */ |
263 | static struct i2c_board_info i2c5_devs[] __initdata = { | 348 | static struct i2c_board_info i2c5_devs[] __initdata = { |
264 | /* max8997, To be updated */ | 349 | /* max8997, To be updated */ |
@@ -283,6 +368,7 @@ static struct platform_device *nuri_devices[] __initdata = { | |||
283 | &s3c_device_wdt, | 368 | &s3c_device_wdt, |
284 | &s3c_device_timer[0], | 369 | &s3c_device_timer[0], |
285 | &s5p_device_ehci, | 370 | &s5p_device_ehci, |
371 | &s3c_device_i2c3, | ||
286 | 372 | ||
287 | /* NURI Devices */ | 373 | /* NURI Devices */ |
288 | &nuri_gpio_keys, | 374 | &nuri_gpio_keys, |
@@ -300,8 +386,11 @@ static void __init nuri_map_io(void) | |||
300 | static void __init nuri_machine_init(void) | 386 | static void __init nuri_machine_init(void) |
301 | { | 387 | { |
302 | nuri_sdhci_init(); | 388 | nuri_sdhci_init(); |
389 | nuri_tsp_init(); | ||
303 | 390 | ||
304 | i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); | 391 | i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); |
392 | s3c_i2c3_set_platdata(&i2c3_data); | ||
393 | i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs)); | ||
305 | i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs)); | 394 | i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs)); |
306 | 395 | ||
307 | nuri_ehci_init(); | 396 | nuri_ehci_init(); |
diff --git a/arch/arm/mach-gemini/board-wbd111.c b/arch/arm/mach-gemini/board-wbd111.c index af7b68a6b258..88cc422ee444 100644 --- a/arch/arm/mach-gemini/board-wbd111.c +++ b/arch/arm/mach-gemini/board-wbd111.c | |||
@@ -84,7 +84,6 @@ static struct sys_timer wbd111_timer = { | |||
84 | .init = gemini_timer_init, | 84 | .init = gemini_timer_init, |
85 | }; | 85 | }; |
86 | 86 | ||
87 | #ifdef CONFIG_MTD_PARTITIONS | ||
88 | static struct mtd_partition wbd111_partitions[] = { | 87 | static struct mtd_partition wbd111_partitions[] = { |
89 | { | 88 | { |
90 | .name = "RedBoot", | 89 | .name = "RedBoot", |
@@ -116,11 +115,7 @@ static struct mtd_partition wbd111_partitions[] = { | |||
116 | .mask_flags = MTD_WRITEABLE, | 115 | .mask_flags = MTD_WRITEABLE, |
117 | } | 116 | } |
118 | }; | 117 | }; |
119 | #define wbd111_num_partitions ARRAY_SIZE(wbd111_partitions) | 118 | #define wbd111_num_partitions ARRAY_SIZE(wbd111_partitions) |
120 | #else | ||
121 | #define wbd111_partitions NULL | ||
122 | #define wbd111_num_partitions 0 | ||
123 | #endif /* CONFIG_MTD_PARTITIONS */ | ||
124 | 119 | ||
125 | static void __init wbd111_init(void) | 120 | static void __init wbd111_init(void) |
126 | { | 121 | { |
diff --git a/arch/arm/mach-gemini/board-wbd222.c b/arch/arm/mach-gemini/board-wbd222.c index 99e5bbecf923..3a220347bc88 100644 --- a/arch/arm/mach-gemini/board-wbd222.c +++ b/arch/arm/mach-gemini/board-wbd222.c | |||
@@ -84,7 +84,6 @@ static struct sys_timer wbd222_timer = { | |||
84 | .init = gemini_timer_init, | 84 | .init = gemini_timer_init, |
85 | }; | 85 | }; |
86 | 86 | ||
87 | #ifdef CONFIG_MTD_PARTITIONS | ||
88 | static struct mtd_partition wbd222_partitions[] = { | 87 | static struct mtd_partition wbd222_partitions[] = { |
89 | { | 88 | { |
90 | .name = "RedBoot", | 89 | .name = "RedBoot", |
@@ -116,11 +115,7 @@ static struct mtd_partition wbd222_partitions[] = { | |||
116 | .mask_flags = MTD_WRITEABLE, | 115 | .mask_flags = MTD_WRITEABLE, |
117 | } | 116 | } |
118 | }; | 117 | }; |
119 | #define wbd222_num_partitions ARRAY_SIZE(wbd222_partitions) | 118 | #define wbd222_num_partitions ARRAY_SIZE(wbd222_partitions) |
120 | #else | ||
121 | #define wbd222_partitions NULL | ||
122 | #define wbd222_num_partitions 0 | ||
123 | #endif /* CONFIG_MTD_PARTITIONS */ | ||
124 | 119 | ||
125 | static void __init wbd222_init(void) | 120 | static void __init wbd222_init(void) |
126 | { | 121 | { |
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c index 140783386785..dca4f7f9f4f7 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-setup.c +++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c | |||
@@ -60,7 +60,6 @@ static struct platform_device ixdp425_flash = { | |||
60 | #if defined(CONFIG_MTD_NAND_PLATFORM) || \ | 60 | #if defined(CONFIG_MTD_NAND_PLATFORM) || \ |
61 | defined(CONFIG_MTD_NAND_PLATFORM_MODULE) | 61 | defined(CONFIG_MTD_NAND_PLATFORM_MODULE) |
62 | 62 | ||
63 | #ifdef CONFIG_MTD_PARTITIONS | ||
64 | const char *part_probes[] = { "cmdlinepart", NULL }; | 63 | const char *part_probes[] = { "cmdlinepart", NULL }; |
65 | 64 | ||
66 | static struct mtd_partition ixdp425_partitions[] = { | 65 | static struct mtd_partition ixdp425_partitions[] = { |
@@ -74,7 +73,6 @@ static struct mtd_partition ixdp425_partitions[] = { | |||
74 | .size = MTDPART_SIZ_FULL | 73 | .size = MTDPART_SIZ_FULL |
75 | }, | 74 | }, |
76 | }; | 75 | }; |
77 | #endif | ||
78 | 76 | ||
79 | static void | 77 | static void |
80 | ixdp425_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) | 78 | ixdp425_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) |
@@ -103,11 +101,9 @@ static struct platform_nand_data ixdp425_flash_nand_data = { | |||
103 | .nr_chips = 1, | 101 | .nr_chips = 1, |
104 | .chip_delay = 30, | 102 | .chip_delay = 30, |
105 | .options = NAND_NO_AUTOINCR, | 103 | .options = NAND_NO_AUTOINCR, |
106 | #ifdef CONFIG_MTD_PARTITIONS | ||
107 | .part_probe_types = part_probes, | 104 | .part_probe_types = part_probes, |
108 | .partitions = ixdp425_partitions, | 105 | .partitions = ixdp425_partitions, |
109 | .nr_partitions = ARRAY_SIZE(ixdp425_partitions), | 106 | .nr_partitions = ARRAY_SIZE(ixdp425_partitions), |
110 | #endif | ||
111 | }, | 107 | }, |
112 | .ctrl = { | 108 | .ctrl = { |
113 | .cmd_ctrl = ixdp425_flash_nand_cmd_ctrl | 109 | .cmd_ctrl = ixdp425_flash_nand_cmd_ctrl |
diff --git a/arch/arm/mach-netx/fb.c b/arch/arm/mach-netx/fb.c index 5b84bcd30271..b9913234bbf6 100644 --- a/arch/arm/mach-netx/fb.c +++ b/arch/arm/mach-netx/fb.c | |||
@@ -103,7 +103,6 @@ static struct amba_device fb_device = { | |||
103 | .flags = IORESOURCE_MEM, | 103 | .flags = IORESOURCE_MEM, |
104 | }, | 104 | }, |
105 | .irq = { NETX_IRQ_LCD, NO_IRQ }, | 105 | .irq = { NETX_IRQ_LCD, NO_IRQ }, |
106 | .periphid = 0x10112400, | ||
107 | }; | 106 | }; |
108 | 107 | ||
109 | int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel) | 108 | int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel) |
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index b997a35830fc..19d5891c48e3 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig | |||
@@ -288,6 +288,7 @@ config MACH_IGEP0030 | |||
288 | depends on ARCH_OMAP3 | 288 | depends on ARCH_OMAP3 |
289 | default y | 289 | default y |
290 | select OMAP_PACKAGE_CBB | 290 | select OMAP_PACKAGE_CBB |
291 | select MACH_IGEP0020 | ||
291 | 292 | ||
292 | config MACH_SBC3530 | 293 | config MACH_SBC3530 |
293 | bool "OMAP3 SBC STALKER board" | 294 | bool "OMAP3 SBC STALKER board" |
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 66dfbccacd25..b14807794401 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile | |||
@@ -229,8 +229,6 @@ obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o \ | |||
229 | obj-$(CONFIG_MACH_CM_T3517) += board-cm-t3517.o | 229 | obj-$(CONFIG_MACH_CM_T3517) += board-cm-t3517.o |
230 | obj-$(CONFIG_MACH_IGEP0020) += board-igep0020.o \ | 230 | obj-$(CONFIG_MACH_IGEP0020) += board-igep0020.o \ |
231 | hsmmc.o | 231 | hsmmc.o |
232 | obj-$(CONFIG_MACH_IGEP0030) += board-igep0030.o \ | ||
233 | hsmmc.o | ||
234 | obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK) += board-omap3touchbook.o \ | 232 | obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK) += board-omap3touchbook.o \ |
235 | hsmmc.o | 233 | hsmmc.o |
236 | obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o \ | 234 | obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o \ |
@@ -270,3 +268,5 @@ obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o | |||
270 | 268 | ||
271 | disp-$(CONFIG_OMAP2_DSS) := display.o | 269 | disp-$(CONFIG_OMAP2_DSS) := display.o |
272 | obj-y += $(disp-m) $(disp-y) | 270 | obj-y += $(disp-m) $(disp-y) |
271 | |||
272 | obj-y += common-board-devices.o | ||
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 1fa6bb896f41..d54969be0a54 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c | |||
@@ -41,6 +41,7 @@ | |||
41 | 41 | ||
42 | #include "mux.h" | 42 | #include "mux.h" |
43 | #include "hsmmc.h" | 43 | #include "hsmmc.h" |
44 | #include "common-board-devices.h" | ||
44 | 45 | ||
45 | #define SDP2430_CS0_BASE 0x04000000 | 46 | #define SDP2430_CS0_BASE 0x04000000 |
46 | #define SECONDARY_LCD_GPIO 147 | 47 | #define SECONDARY_LCD_GPIO 147 |
@@ -180,15 +181,6 @@ static struct twl4030_platform_data sdp2430_twldata = { | |||
180 | .vmmc1 = &sdp2430_vmmc1, | 181 | .vmmc1 = &sdp2430_vmmc1, |
181 | }; | 182 | }; |
182 | 183 | ||
183 | static struct i2c_board_info __initdata sdp2430_i2c_boardinfo[] = { | ||
184 | { | ||
185 | I2C_BOARD_INFO("twl4030", 0x48), | ||
186 | .flags = I2C_CLIENT_WAKE, | ||
187 | .irq = INT_24XX_SYS_NIRQ, | ||
188 | .platform_data = &sdp2430_twldata, | ||
189 | }, | ||
190 | }; | ||
191 | |||
192 | static struct i2c_board_info __initdata sdp2430_i2c1_boardinfo[] = { | 184 | static struct i2c_board_info __initdata sdp2430_i2c1_boardinfo[] = { |
193 | { | 185 | { |
194 | I2C_BOARD_INFO("isp1301_omap", 0x2D), | 186 | I2C_BOARD_INFO("isp1301_omap", 0x2D), |
@@ -201,8 +193,7 @@ static int __init omap2430_i2c_init(void) | |||
201 | { | 193 | { |
202 | omap_register_i2c_bus(1, 100, sdp2430_i2c1_boardinfo, | 194 | omap_register_i2c_bus(1, 100, sdp2430_i2c1_boardinfo, |
203 | ARRAY_SIZE(sdp2430_i2c1_boardinfo)); | 195 | ARRAY_SIZE(sdp2430_i2c1_boardinfo)); |
204 | omap_register_i2c_bus(2, 2600, sdp2430_i2c_boardinfo, | 196 | omap2_pmic_init("twl4030", &sdp2430_twldata); |
205 | ARRAY_SIZE(sdp2430_i2c_boardinfo)); | ||
206 | return 0; | 197 | return 0; |
207 | } | 198 | } |
208 | 199 | ||
@@ -217,11 +208,6 @@ static struct omap2_hsmmc_info mmc[] __initdata = { | |||
217 | {} /* Terminator */ | 208 | {} /* Terminator */ |
218 | }; | 209 | }; |
219 | 210 | ||
220 | static struct omap_musb_board_data musb_board_data = { | ||
221 | .interface_type = MUSB_INTERFACE_ULPI, | ||
222 | .mode = MUSB_OTG, | ||
223 | .power = 100, | ||
224 | }; | ||
225 | static struct omap_usb_config sdp2430_usb_config __initdata = { | 211 | static struct omap_usb_config sdp2430_usb_config __initdata = { |
226 | .otg = 1, | 212 | .otg = 1, |
227 | #ifdef CONFIG_USB_GADGET_OMAP | 213 | #ifdef CONFIG_USB_GADGET_OMAP |
@@ -240,8 +226,6 @@ static struct omap_board_mux board_mux[] __initdata = { | |||
240 | 226 | ||
241 | static void __init omap_2430sdp_init(void) | 227 | static void __init omap_2430sdp_init(void) |
242 | { | 228 | { |
243 | int ret; | ||
244 | |||
245 | omap2430_mux_init(board_mux, OMAP_PACKAGE_ZAC); | 229 | omap2430_mux_init(board_mux, OMAP_PACKAGE_ZAC); |
246 | 230 | ||
247 | omap_board_config = sdp2430_config; | 231 | omap_board_config = sdp2430_config; |
@@ -255,14 +239,13 @@ static void __init omap_2430sdp_init(void) | |||
255 | omap2_usbfs_init(&sdp2430_usb_config); | 239 | omap2_usbfs_init(&sdp2430_usb_config); |
256 | 240 | ||
257 | omap_mux_init_signal("usb0hs_stp", OMAP_PULL_ENA | OMAP_PULL_UP); | 241 | omap_mux_init_signal("usb0hs_stp", OMAP_PULL_ENA | OMAP_PULL_UP); |
258 | usb_musb_init(&musb_board_data); | 242 | usb_musb_init(NULL); |
259 | 243 | ||
260 | board_smc91x_init(); | 244 | board_smc91x_init(); |
261 | 245 | ||
262 | /* Turn off secondary LCD backlight */ | 246 | /* Turn off secondary LCD backlight */ |
263 | ret = gpio_request(SECONDARY_LCD_GPIO, "Secondary LCD backlight"); | 247 | gpio_request_one(SECONDARY_LCD_GPIO, GPIOF_OUT_INIT_LOW, |
264 | if (ret == 0) | 248 | "Secondary LCD backlight"); |
265 | gpio_direction_output(SECONDARY_LCD_GPIO, 0); | ||
266 | } | 249 | } |
267 | 250 | ||
268 | static void __init omap_2430sdp_map_io(void) | 251 | static void __init omap_2430sdp_map_io(void) |
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index 23244cd0a5b6..ae2963a98041 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c | |||
@@ -19,7 +19,6 @@ | |||
19 | #include <linux/input.h> | 19 | #include <linux/input.h> |
20 | #include <linux/input/matrix_keypad.h> | 20 | #include <linux/input/matrix_keypad.h> |
21 | #include <linux/spi/spi.h> | 21 | #include <linux/spi/spi.h> |
22 | #include <linux/spi/ads7846.h> | ||
23 | #include <linux/i2c/twl.h> | 22 | #include <linux/i2c/twl.h> |
24 | #include <linux/regulator/machine.h> | 23 | #include <linux/regulator/machine.h> |
25 | #include <linux/io.h> | 24 | #include <linux/io.h> |
@@ -48,6 +47,7 @@ | |||
48 | #include "hsmmc.h" | 47 | #include "hsmmc.h" |
49 | #include "pm.h" | 48 | #include "pm.h" |
50 | #include "control.h" | 49 | #include "control.h" |
50 | #include "common-board-devices.h" | ||
51 | 51 | ||
52 | #define CONFIG_DISABLE_HFCLK 1 | 52 | #define CONFIG_DISABLE_HFCLK 1 |
53 | 53 | ||
@@ -59,24 +59,6 @@ | |||
59 | 59 | ||
60 | #define TWL4030_MSECURE_GPIO 22 | 60 | #define TWL4030_MSECURE_GPIO 22 |
61 | 61 | ||
62 | /* FIXME: These values need to be updated based on more profiling on 3430sdp*/ | ||
63 | static struct cpuidle_params omap3_cpuidle_params_table[] = { | ||
64 | /* C1 */ | ||
65 | {1, 2, 2, 5}, | ||
66 | /* C2 */ | ||
67 | {1, 10, 10, 30}, | ||
68 | /* C3 */ | ||
69 | {1, 50, 50, 300}, | ||
70 | /* C4 */ | ||
71 | {1, 1500, 1800, 4000}, | ||
72 | /* C5 */ | ||
73 | {1, 2500, 7500, 12000}, | ||
74 | /* C6 */ | ||
75 | {1, 3000, 8500, 15000}, | ||
76 | /* C7 */ | ||
77 | {1, 10000, 30000, 300000}, | ||
78 | }; | ||
79 | |||
80 | static uint32_t board_keymap[] = { | 62 | static uint32_t board_keymap[] = { |
81 | KEY(0, 0, KEY_LEFT), | 63 | KEY(0, 0, KEY_LEFT), |
82 | KEY(0, 1, KEY_RIGHT), | 64 | KEY(0, 1, KEY_RIGHT), |
@@ -123,63 +105,14 @@ static struct twl4030_keypad_data sdp3430_kp_data = { | |||
123 | .rep = 1, | 105 | .rep = 1, |
124 | }; | 106 | }; |
125 | 107 | ||
126 | static int ts_gpio; /* Needed for ads7846_get_pendown_state */ | ||
127 | |||
128 | /** | ||
129 | * @brief ads7846_dev_init : Requests & sets GPIO line for pen-irq | ||
130 | * | ||
131 | * @return - void. If request gpio fails then Flag KERN_ERR. | ||
132 | */ | ||
133 | static void ads7846_dev_init(void) | ||
134 | { | ||
135 | if (gpio_request(ts_gpio, "ADS7846 pendown") < 0) { | ||
136 | printk(KERN_ERR "can't get ads746 pen down GPIO\n"); | ||
137 | return; | ||
138 | } | ||
139 | |||
140 | gpio_direction_input(ts_gpio); | ||
141 | gpio_set_debounce(ts_gpio, 310); | ||
142 | } | ||
143 | |||
144 | static int ads7846_get_pendown_state(void) | ||
145 | { | ||
146 | return !gpio_get_value(ts_gpio); | ||
147 | } | ||
148 | |||
149 | static struct ads7846_platform_data tsc2046_config __initdata = { | ||
150 | .get_pendown_state = ads7846_get_pendown_state, | ||
151 | .keep_vref_on = 1, | ||
152 | .wakeup = true, | ||
153 | }; | ||
154 | |||
155 | |||
156 | static struct omap2_mcspi_device_config tsc2046_mcspi_config = { | ||
157 | .turbo_mode = 0, | ||
158 | .single_channel = 1, /* 0: slave, 1: master */ | ||
159 | }; | ||
160 | |||
161 | static struct spi_board_info sdp3430_spi_board_info[] __initdata = { | ||
162 | [0] = { | ||
163 | /* | ||
164 | * TSC2046 operates at a max freqency of 2MHz, so | ||
165 | * operate slightly below at 1.5MHz | ||
166 | */ | ||
167 | .modalias = "ads7846", | ||
168 | .bus_num = 1, | ||
169 | .chip_select = 0, | ||
170 | .max_speed_hz = 1500000, | ||
171 | .controller_data = &tsc2046_mcspi_config, | ||
172 | .irq = 0, | ||
173 | .platform_data = &tsc2046_config, | ||
174 | }, | ||
175 | }; | ||
176 | |||
177 | |||
178 | #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8 | 108 | #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8 |
179 | #define SDP3430_LCD_PANEL_ENABLE_GPIO 5 | 109 | #define SDP3430_LCD_PANEL_ENABLE_GPIO 5 |
180 | 110 | ||
181 | static unsigned backlight_gpio; | 111 | static struct gpio sdp3430_dss_gpios[] __initdata = { |
182 | static unsigned enable_gpio; | 112 | {SDP3430_LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, "LCD reset" }, |
113 | {SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"}, | ||
114 | }; | ||
115 | |||
183 | static int lcd_enabled; | 116 | static int lcd_enabled; |
184 | static int dvi_enabled; | 117 | static int dvi_enabled; |
185 | 118 | ||
@@ -187,29 +120,11 @@ static void __init sdp3430_display_init(void) | |||
187 | { | 120 | { |
188 | int r; | 121 | int r; |
189 | 122 | ||
190 | enable_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO; | 123 | r = gpio_request_array(sdp3430_dss_gpios, |
191 | backlight_gpio = SDP3430_LCD_PANEL_BACKLIGHT_GPIO; | 124 | ARRAY_SIZE(sdp3430_dss_gpios)); |
192 | 125 | if (r) | |
193 | r = gpio_request(enable_gpio, "LCD reset"); | 126 | printk(KERN_ERR "failed to get LCD control GPIOs\n"); |
194 | if (r) { | ||
195 | printk(KERN_ERR "failed to get LCD reset GPIO\n"); | ||
196 | goto err0; | ||
197 | } | ||
198 | |||
199 | r = gpio_request(backlight_gpio, "LCD Backlight"); | ||
200 | if (r) { | ||
201 | printk(KERN_ERR "failed to get LCD backlight GPIO\n"); | ||
202 | goto err1; | ||
203 | } | ||
204 | |||
205 | gpio_direction_output(enable_gpio, 0); | ||
206 | gpio_direction_output(backlight_gpio, 0); | ||
207 | 127 | ||
208 | return; | ||
209 | err1: | ||
210 | gpio_free(enable_gpio); | ||
211 | err0: | ||
212 | return; | ||
213 | } | 128 | } |
214 | 129 | ||
215 | static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev) | 130 | static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev) |
@@ -219,8 +134,8 @@ static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev) | |||
219 | return -EINVAL; | 134 | return -EINVAL; |
220 | } | 135 | } |
221 | 136 | ||
222 | gpio_direction_output(enable_gpio, 1); | 137 | gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1); |
223 | gpio_direction_output(backlight_gpio, 1); | 138 | gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1); |
224 | 139 | ||
225 | lcd_enabled = 1; | 140 | lcd_enabled = 1; |
226 | 141 | ||
@@ -231,8 +146,8 @@ static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev) | |||
231 | { | 146 | { |
232 | lcd_enabled = 0; | 147 | lcd_enabled = 0; |
233 | 148 | ||
234 | gpio_direction_output(enable_gpio, 0); | 149 | gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0); |
235 | gpio_direction_output(backlight_gpio, 0); | 150 | gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0); |
236 | } | 151 | } |
237 | 152 | ||
238 | static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev) | 153 | static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev) |
@@ -360,12 +275,10 @@ static int sdp3430_twl_gpio_setup(struct device *dev, | |||
360 | omap2_hsmmc_init(mmc); | 275 | omap2_hsmmc_init(mmc); |
361 | 276 | ||
362 | /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */ | 277 | /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */ |
363 | gpio_request(gpio + 7, "sub_lcd_en_bkl"); | 278 | gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl"); |
364 | gpio_direction_output(gpio + 7, 0); | ||
365 | 279 | ||
366 | /* gpio + 15 is "sub_lcd_nRST" (output) */ | 280 | /* gpio + 15 is "sub_lcd_nRST" (output) */ |
367 | gpio_request(gpio + 15, "sub_lcd_nRST"); | 281 | gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST"); |
368 | gpio_direction_output(gpio + 15, 0); | ||
369 | 282 | ||
370 | return 0; | 283 | return 0; |
371 | } | 284 | } |
@@ -580,20 +493,10 @@ static struct twl4030_platform_data sdp3430_twldata = { | |||
580 | .vpll2 = &sdp3430_vpll2, | 493 | .vpll2 = &sdp3430_vpll2, |
581 | }; | 494 | }; |
582 | 495 | ||
583 | static struct i2c_board_info __initdata sdp3430_i2c_boardinfo[] = { | ||
584 | { | ||
585 | I2C_BOARD_INFO("twl4030", 0x48), | ||
586 | .flags = I2C_CLIENT_WAKE, | ||
587 | .irq = INT_34XX_SYS_NIRQ, | ||
588 | .platform_data = &sdp3430_twldata, | ||
589 | }, | ||
590 | }; | ||
591 | |||
592 | static int __init omap3430_i2c_init(void) | 496 | static int __init omap3430_i2c_init(void) |
593 | { | 497 | { |
594 | /* i2c1 for PMIC only */ | 498 | /* i2c1 for PMIC only */ |
595 | omap_register_i2c_bus(1, 2600, sdp3430_i2c_boardinfo, | 499 | omap3_pmic_init("twl4030", &sdp3430_twldata); |
596 | ARRAY_SIZE(sdp3430_i2c_boardinfo)); | ||
597 | /* i2c2 on camera connector (for sensor control) and optional isp1301 */ | 500 | /* i2c2 on camera connector (for sensor control) and optional isp1301 */ |
598 | omap_register_i2c_bus(2, 400, NULL, 0); | 501 | omap_register_i2c_bus(2, 400, NULL, 0); |
599 | /* i2c3 on display connector (for DVI, tfp410) */ | 502 | /* i2c3 on display connector (for DVI, tfp410) */ |
@@ -872,30 +775,22 @@ static struct flash_partitions sdp_flash_partitions[] = { | |||
872 | }, | 775 | }, |
873 | }; | 776 | }; |
874 | 777 | ||
875 | static struct omap_musb_board_data musb_board_data = { | ||
876 | .interface_type = MUSB_INTERFACE_ULPI, | ||
877 | .mode = MUSB_OTG, | ||
878 | .power = 100, | ||
879 | }; | ||
880 | |||
881 | static void __init omap_3430sdp_init(void) | 778 | static void __init omap_3430sdp_init(void) |
882 | { | 779 | { |
780 | int gpio_pendown; | ||
781 | |||
883 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); | 782 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
884 | omap_board_config = sdp3430_config; | 783 | omap_board_config = sdp3430_config; |
885 | omap_board_config_size = ARRAY_SIZE(sdp3430_config); | 784 | omap_board_config_size = ARRAY_SIZE(sdp3430_config); |
886 | omap3_pm_init_cpuidle(omap3_cpuidle_params_table); | ||
887 | omap3430_i2c_init(); | 785 | omap3430_i2c_init(); |
888 | omap_display_init(&sdp3430_dss_data); | 786 | omap_display_init(&sdp3430_dss_data); |
889 | if (omap_rev() > OMAP3430_REV_ES1_0) | 787 | if (omap_rev() > OMAP3430_REV_ES1_0) |
890 | ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2; | 788 | gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2; |
891 | else | 789 | else |
892 | ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV1; | 790 | gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1; |
893 | sdp3430_spi_board_info[0].irq = gpio_to_irq(ts_gpio); | 791 | omap_ads7846_init(1, gpio_pendown, 310, NULL); |
894 | spi_register_board_info(sdp3430_spi_board_info, | ||
895 | ARRAY_SIZE(sdp3430_spi_board_info)); | ||
896 | ads7846_dev_init(); | ||
897 | board_serial_init(); | 792 | board_serial_init(); |
898 | usb_musb_init(&musb_board_data); | 793 | usb_musb_init(NULL); |
899 | board_smc91x_init(); | 794 | board_smc91x_init(); |
900 | board_flash_init(sdp_flash_partitions, chip_sel_3430, 0); | 795 | board_flash_init(sdp_flash_partitions, chip_sel_3430, 0); |
901 | sdp3430_display_init(); | 796 | sdp3430_display_init(); |
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 93edd7fcf451..73fa90bb6953 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c | |||
@@ -42,6 +42,7 @@ | |||
42 | #include "hsmmc.h" | 42 | #include "hsmmc.h" |
43 | #include "timer-gp.h" | 43 | #include "timer-gp.h" |
44 | #include "control.h" | 44 | #include "control.h" |
45 | #include "common-board-devices.h" | ||
45 | 46 | ||
46 | #define ETH_KS8851_IRQ 34 | 47 | #define ETH_KS8851_IRQ 34 |
47 | #define ETH_KS8851_POWER_ON 48 | 48 | #define ETH_KS8851_POWER_ON 48 |
@@ -251,58 +252,22 @@ static struct spi_board_info sdp4430_spi_board_info[] __initdata = { | |||
251 | }, | 252 | }, |
252 | }; | 253 | }; |
253 | 254 | ||
255 | static struct gpio sdp4430_eth_gpios[] __initdata = { | ||
256 | { ETH_KS8851_POWER_ON, GPIOF_OUT_INIT_HIGH, "eth_power" }, | ||
257 | { ETH_KS8851_QUART, GPIOF_OUT_INIT_HIGH, "quart" }, | ||
258 | { ETH_KS8851_IRQ, GPIOF_IN, "eth_irq" }, | ||
259 | }; | ||
260 | |||
254 | static int omap_ethernet_init(void) | 261 | static int omap_ethernet_init(void) |
255 | { | 262 | { |
256 | int status; | 263 | int status; |
257 | 264 | ||
258 | /* Request of GPIO lines */ | 265 | /* Request of GPIO lines */ |
266 | status = gpio_request_array(sdp4430_eth_gpios, | ||
267 | ARRAY_SIZE(sdp4430_eth_gpios)); | ||
268 | if (status) | ||
269 | pr_err("Cannot request ETH GPIOs\n"); | ||
259 | 270 | ||
260 | status = gpio_request(ETH_KS8851_POWER_ON, "eth_power"); | ||
261 | if (status) { | ||
262 | pr_err("Cannot request GPIO %d\n", ETH_KS8851_POWER_ON); | ||
263 | return status; | ||
264 | } | ||
265 | |||
266 | status = gpio_request(ETH_KS8851_QUART, "quart"); | ||
267 | if (status) { | ||
268 | pr_err("Cannot request GPIO %d\n", ETH_KS8851_QUART); | ||
269 | goto error1; | ||
270 | } | ||
271 | |||
272 | status = gpio_request(ETH_KS8851_IRQ, "eth_irq"); | ||
273 | if (status) { | ||
274 | pr_err("Cannot request GPIO %d\n", ETH_KS8851_IRQ); | ||
275 | goto error2; | ||
276 | } | ||
277 | |||
278 | /* Configuration of requested GPIO lines */ | ||
279 | |||
280 | status = gpio_direction_output(ETH_KS8851_POWER_ON, 1); | ||
281 | if (status) { | ||
282 | pr_err("Cannot set output GPIO %d\n", ETH_KS8851_IRQ); | ||
283 | goto error3; | ||
284 | } | ||
285 | |||
286 | status = gpio_direction_output(ETH_KS8851_QUART, 1); | ||
287 | if (status) { | ||
288 | pr_err("Cannot set output GPIO %d\n", ETH_KS8851_QUART); | ||
289 | goto error3; | ||
290 | } | ||
291 | |||
292 | status = gpio_direction_input(ETH_KS8851_IRQ); | ||
293 | if (status) { | ||
294 | pr_err("Cannot set input GPIO %d\n", ETH_KS8851_IRQ); | ||
295 | goto error3; | ||
296 | } | ||
297 | |||
298 | return 0; | ||
299 | |||
300 | error3: | ||
301 | gpio_free(ETH_KS8851_IRQ); | ||
302 | error2: | ||
303 | gpio_free(ETH_KS8851_QUART); | ||
304 | error1: | ||
305 | gpio_free(ETH_KS8851_POWER_ON); | ||
306 | return status; | 271 | return status; |
307 | } | 272 | } |
308 | 273 | ||
@@ -575,14 +540,6 @@ static struct twl4030_platform_data sdp4430_twldata = { | |||
575 | .usb = &omap4_usbphy_data | 540 | .usb = &omap4_usbphy_data |
576 | }; | 541 | }; |
577 | 542 | ||
578 | static struct i2c_board_info __initdata sdp4430_i2c_boardinfo[] = { | ||
579 | { | ||
580 | I2C_BOARD_INFO("twl6030", 0x48), | ||
581 | .flags = I2C_CLIENT_WAKE, | ||
582 | .irq = OMAP44XX_IRQ_SYS_1N, | ||
583 | .platform_data = &sdp4430_twldata, | ||
584 | }, | ||
585 | }; | ||
586 | static struct i2c_board_info __initdata sdp4430_i2c_3_boardinfo[] = { | 543 | static struct i2c_board_info __initdata sdp4430_i2c_3_boardinfo[] = { |
587 | { | 544 | { |
588 | I2C_BOARD_INFO("tmp105", 0x48), | 545 | I2C_BOARD_INFO("tmp105", 0x48), |
@@ -598,12 +555,7 @@ static struct i2c_board_info __initdata sdp4430_i2c_4_boardinfo[] = { | |||
598 | }; | 555 | }; |
599 | static int __init omap4_i2c_init(void) | 556 | static int __init omap4_i2c_init(void) |
600 | { | 557 | { |
601 | /* | 558 | omap4_pmic_init("twl6030", &sdp4430_twldata); |
602 | * Phoenix Audio IC needs I2C1 to | ||
603 | * start with 400 KHz or less | ||
604 | */ | ||
605 | omap_register_i2c_bus(1, 400, sdp4430_i2c_boardinfo, | ||
606 | ARRAY_SIZE(sdp4430_i2c_boardinfo)); | ||
607 | omap_register_i2c_bus(2, 400, NULL, 0); | 559 | omap_register_i2c_bus(2, 400, NULL, 0); |
608 | omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo, | 560 | omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo, |
609 | ARRAY_SIZE(sdp4430_i2c_3_boardinfo)); | 561 | ARRAY_SIZE(sdp4430_i2c_3_boardinfo)); |
@@ -614,21 +566,13 @@ static int __init omap4_i2c_init(void) | |||
614 | 566 | ||
615 | static void __init omap_sfh7741prox_init(void) | 567 | static void __init omap_sfh7741prox_init(void) |
616 | { | 568 | { |
617 | int error; | 569 | int error; |
618 | 570 | ||
619 | error = gpio_request(OMAP4_SFH7741_ENABLE_GPIO, "sfh7741"); | 571 | error = gpio_request_one(OMAP4_SFH7741_ENABLE_GPIO, |
620 | if (error < 0) { | 572 | GPIOF_OUT_INIT_LOW, "sfh7741"); |
573 | if (error < 0) | ||
621 | pr_err("%s:failed to request GPIO %d, error %d\n", | 574 | pr_err("%s:failed to request GPIO %d, error %d\n", |
622 | __func__, OMAP4_SFH7741_ENABLE_GPIO, error); | 575 | __func__, OMAP4_SFH7741_ENABLE_GPIO, error); |
623 | return; | ||
624 | } | ||
625 | |||
626 | error = gpio_direction_output(OMAP4_SFH7741_ENABLE_GPIO , 0); | ||
627 | if (error < 0) { | ||
628 | pr_err("%s: GPIO configuration failed: GPIO %d,error %d\n", | ||
629 | __func__, OMAP4_SFH7741_ENABLE_GPIO, error); | ||
630 | gpio_free(OMAP4_SFH7741_ENABLE_GPIO); | ||
631 | } | ||
632 | } | 576 | } |
633 | 577 | ||
634 | static void sdp4430_hdmi_mux_init(void) | 578 | static void sdp4430_hdmi_mux_init(void) |
@@ -645,27 +589,19 @@ static void sdp4430_hdmi_mux_init(void) | |||
645 | OMAP_PIN_INPUT_PULLUP); | 589 | OMAP_PIN_INPUT_PULLUP); |
646 | } | 590 | } |
647 | 591 | ||
592 | static struct gpio sdp4430_hdmi_gpios[] = { | ||
593 | { HDMI_GPIO_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_hpd" }, | ||
594 | { HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ls_oe" }, | ||
595 | }; | ||
596 | |||
648 | static int sdp4430_panel_enable_hdmi(struct omap_dss_device *dssdev) | 597 | static int sdp4430_panel_enable_hdmi(struct omap_dss_device *dssdev) |
649 | { | 598 | { |
650 | int status; | 599 | int status; |
651 | 600 | ||
652 | status = gpio_request_one(HDMI_GPIO_HPD, GPIOF_OUT_INIT_HIGH, | 601 | status = gpio_request_array(sdp4430_hdmi_gpios, |
653 | "hdmi_gpio_hpd"); | 602 | ARRAY_SIZE(sdp4430_hdmi_gpios)); |
654 | if (status) { | 603 | if (status) |
655 | pr_err("Cannot request GPIO %d\n", HDMI_GPIO_HPD); | 604 | pr_err("%s: Cannot request HDMI GPIOs\n", __func__); |
656 | return status; | ||
657 | } | ||
658 | status = gpio_request_one(HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, | ||
659 | "hdmi_gpio_ls_oe"); | ||
660 | if (status) { | ||
661 | pr_err("Cannot request GPIO %d\n", HDMI_GPIO_LS_OE); | ||
662 | goto error1; | ||
663 | } | ||
664 | |||
665 | return 0; | ||
666 | |||
667 | error1: | ||
668 | gpio_free(HDMI_GPIO_HPD); | ||
669 | 605 | ||
670 | return status; | 606 | return status; |
671 | } | 607 | } |
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c index a890d244fec6..5e438a77cd72 100644 --- a/arch/arm/mach-omap2/board-am3517crane.c +++ b/arch/arm/mach-omap2/board-am3517crane.c | |||
@@ -89,19 +89,13 @@ static void __init am3517_crane_init(void) | |||
89 | return; | 89 | return; |
90 | } | 90 | } |
91 | 91 | ||
92 | ret = gpio_request(GPIO_USB_POWER, "usb_ehci_enable"); | 92 | ret = gpio_request_one(GPIO_USB_POWER, GPIOF_OUT_INIT_HIGH, |
93 | "usb_ehci_enable"); | ||
93 | if (ret < 0) { | 94 | if (ret < 0) { |
94 | pr_err("Can not request GPIO %d\n", GPIO_USB_POWER); | 95 | pr_err("Can not request GPIO %d\n", GPIO_USB_POWER); |
95 | return; | 96 | return; |
96 | } | 97 | } |
97 | 98 | ||
98 | ret = gpio_direction_output(GPIO_USB_POWER, 1); | ||
99 | if (ret < 0) { | ||
100 | gpio_free(GPIO_USB_POWER); | ||
101 | pr_err("Unable to initialize EHCI power\n"); | ||
102 | return; | ||
103 | } | ||
104 | |||
105 | usbhs_init(&usbhs_bdata); | 99 | usbhs_init(&usbhs_bdata); |
106 | } | 100 | } |
107 | 101 | ||
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index ff8c59be36e5..63af4171c043 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c | |||
@@ -174,19 +174,14 @@ static void __init am3517_evm_rtc_init(void) | |||
174 | int r; | 174 | int r; |
175 | 175 | ||
176 | omap_mux_init_gpio(GPIO_RTCS35390A_IRQ, OMAP_PIN_INPUT_PULLUP); | 176 | omap_mux_init_gpio(GPIO_RTCS35390A_IRQ, OMAP_PIN_INPUT_PULLUP); |
177 | r = gpio_request(GPIO_RTCS35390A_IRQ, "rtcs35390a-irq"); | 177 | |
178 | r = gpio_request_one(GPIO_RTCS35390A_IRQ, GPIOF_IN, "rtcs35390a-irq"); | ||
178 | if (r < 0) { | 179 | if (r < 0) { |
179 | printk(KERN_WARNING "failed to request GPIO#%d\n", | 180 | printk(KERN_WARNING "failed to request GPIO#%d\n", |
180 | GPIO_RTCS35390A_IRQ); | 181 | GPIO_RTCS35390A_IRQ); |
181 | return; | 182 | return; |
182 | } | 183 | } |
183 | r = gpio_direction_input(GPIO_RTCS35390A_IRQ); | 184 | |
184 | if (r < 0) { | ||
185 | printk(KERN_WARNING "GPIO#%d cannot be configured as input\n", | ||
186 | GPIO_RTCS35390A_IRQ); | ||
187 | gpio_free(GPIO_RTCS35390A_IRQ); | ||
188 | return; | ||
189 | } | ||
190 | am3517evm_i2c1_boardinfo[0].irq = gpio_to_irq(GPIO_RTCS35390A_IRQ); | 185 | am3517evm_i2c1_boardinfo[0].irq = gpio_to_irq(GPIO_RTCS35390A_IRQ); |
191 | } | 186 | } |
192 | 187 | ||
@@ -242,6 +237,15 @@ static int dvi_enabled; | |||
242 | 237 | ||
243 | #if defined(CONFIG_PANEL_SHARP_LQ043T1DG01) || \ | 238 | #if defined(CONFIG_PANEL_SHARP_LQ043T1DG01) || \ |
244 | defined(CONFIG_PANEL_SHARP_LQ043T1DG01_MODULE) | 239 | defined(CONFIG_PANEL_SHARP_LQ043T1DG01_MODULE) |
240 | static struct gpio am3517_evm_dss_gpios[] __initdata = { | ||
241 | /* GPIO 182 = LCD Backlight Power */ | ||
242 | { LCD_PANEL_BKLIGHT_PWR, GPIOF_OUT_INIT_HIGH, "lcd_backlight_pwr" }, | ||
243 | /* GPIO 181 = LCD Panel PWM */ | ||
244 | { LCD_PANEL_PWM, GPIOF_OUT_INIT_HIGH, "lcd bl enable" }, | ||
245 | /* GPIO 176 = LCD Panel Power enable pin */ | ||
246 | { LCD_PANEL_PWR, GPIOF_OUT_INIT_HIGH, "dvi enable" }, | ||
247 | }; | ||
248 | |||
245 | static void __init am3517_evm_display_init(void) | 249 | static void __init am3517_evm_display_init(void) |
246 | { | 250 | { |
247 | int r; | 251 | int r; |
@@ -249,41 +253,15 @@ static void __init am3517_evm_display_init(void) | |||
249 | omap_mux_init_gpio(LCD_PANEL_PWR, OMAP_PIN_INPUT_PULLUP); | 253 | omap_mux_init_gpio(LCD_PANEL_PWR, OMAP_PIN_INPUT_PULLUP); |
250 | omap_mux_init_gpio(LCD_PANEL_BKLIGHT_PWR, OMAP_PIN_INPUT_PULLDOWN); | 254 | omap_mux_init_gpio(LCD_PANEL_BKLIGHT_PWR, OMAP_PIN_INPUT_PULLDOWN); |
251 | omap_mux_init_gpio(LCD_PANEL_PWM, OMAP_PIN_INPUT_PULLDOWN); | 255 | omap_mux_init_gpio(LCD_PANEL_PWM, OMAP_PIN_INPUT_PULLDOWN); |
252 | /* | 256 | |
253 | * Enable GPIO 182 = LCD Backlight Power | 257 | r = gpio_request_array(am3517_evm_dss_gpios, |
254 | */ | 258 | ARRAY_SIZE(am3517_evm_dss_gpios)); |
255 | r = gpio_request(LCD_PANEL_BKLIGHT_PWR, "lcd_backlight_pwr"); | ||
256 | if (r) { | 259 | if (r) { |
257 | printk(KERN_ERR "failed to get lcd_backlight_pwr\n"); | 260 | printk(KERN_ERR "failed to get DSS panel control GPIOs\n"); |
258 | return; | 261 | return; |
259 | } | 262 | } |
260 | gpio_direction_output(LCD_PANEL_BKLIGHT_PWR, 1); | ||
261 | /* | ||
262 | * Enable GPIO 181 = LCD Panel PWM | ||
263 | */ | ||
264 | r = gpio_request(LCD_PANEL_PWM, "lcd_pwm"); | ||
265 | if (r) { | ||
266 | printk(KERN_ERR "failed to get lcd_pwm\n"); | ||
267 | goto err_1; | ||
268 | } | ||
269 | gpio_direction_output(LCD_PANEL_PWM, 1); | ||
270 | /* | ||
271 | * Enable GPIO 176 = LCD Panel Power enable pin | ||
272 | */ | ||
273 | r = gpio_request(LCD_PANEL_PWR, "lcd_panel_pwr"); | ||
274 | if (r) { | ||
275 | printk(KERN_ERR "failed to get lcd_panel_pwr\n"); | ||
276 | goto err_2; | ||
277 | } | ||
278 | gpio_direction_output(LCD_PANEL_PWR, 1); | ||
279 | 263 | ||
280 | printk(KERN_INFO "Display initialized successfully\n"); | 264 | printk(KERN_INFO "Display initialized successfully\n"); |
281 | return; | ||
282 | |||
283 | err_2: | ||
284 | gpio_free(LCD_PANEL_PWM); | ||
285 | err_1: | ||
286 | gpio_free(LCD_PANEL_BKLIGHT_PWR); | ||
287 | } | 265 | } |
288 | #else | 266 | #else |
289 | static void __init am3517_evm_display_init(void) {} | 267 | static void __init am3517_evm_display_init(void) {} |
@@ -396,7 +374,7 @@ static struct omap_musb_board_data musb_board_data = { | |||
396 | .power = 500, | 374 | .power = 500, |
397 | .set_phy_power = am35x_musb_phy_power, | 375 | .set_phy_power = am35x_musb_phy_power, |
398 | .clear_irq = am35x_musb_clear_irq, | 376 | .clear_irq = am35x_musb_clear_irq, |
399 | .set_mode = am35x_musb_set_mode, | 377 | .set_mode = am35x_set_mode, |
400 | .reset = am35x_musb_reset, | 378 | .reset = am35x_musb_reset, |
401 | }; | 379 | }; |
402 | 380 | ||
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index f4f8374a0298..f3beb8eeef77 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c | |||
@@ -202,6 +202,7 @@ static inline void __init apollon_init_smc91x(void) | |||
202 | unsigned int rate; | 202 | unsigned int rate; |
203 | struct clk *gpmc_fck; | 203 | struct clk *gpmc_fck; |
204 | int eth_cs; | 204 | int eth_cs; |
205 | int err; | ||
205 | 206 | ||
206 | gpmc_fck = clk_get(NULL, "gpmc_fck"); /* Always on ENABLE_ON_INIT */ | 207 | gpmc_fck = clk_get(NULL, "gpmc_fck"); /* Always on ENABLE_ON_INIT */ |
207 | if (IS_ERR(gpmc_fck)) { | 208 | if (IS_ERR(gpmc_fck)) { |
@@ -245,15 +246,13 @@ static inline void __init apollon_init_smc91x(void) | |||
245 | apollon_smc91x_resources[0].end = base + 0x30f; | 246 | apollon_smc91x_resources[0].end = base + 0x30f; |
246 | udelay(100); | 247 | udelay(100); |
247 | 248 | ||
248 | omap_mux_init_gpio(74, 0); | 249 | omap_mux_init_gpio(APOLLON_ETHR_GPIO_IRQ, 0); |
249 | if (gpio_request(APOLLON_ETHR_GPIO_IRQ, "SMC91x irq") < 0) { | 250 | err = gpio_request_one(APOLLON_ETHR_GPIO_IRQ, GPIOF_IN, "SMC91x irq"); |
251 | if (err) { | ||
250 | printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n", | 252 | printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n", |
251 | APOLLON_ETHR_GPIO_IRQ); | 253 | APOLLON_ETHR_GPIO_IRQ); |
252 | gpmc_cs_free(APOLLON_ETH_CS); | 254 | gpmc_cs_free(APOLLON_ETH_CS); |
253 | goto out; | ||
254 | } | 255 | } |
255 | gpio_direction_input(APOLLON_ETHR_GPIO_IRQ); | ||
256 | |||
257 | out: | 256 | out: |
258 | clk_disable(gpmc_fck); | 257 | clk_disable(gpmc_fck); |
259 | clk_put(gpmc_fck); | 258 | clk_put(gpmc_fck); |
@@ -280,20 +279,19 @@ static void __init omap_apollon_init_early(void) | |||
280 | omap2_init_common_devices(NULL, NULL); | 279 | omap2_init_common_devices(NULL, NULL); |
281 | } | 280 | } |
282 | 281 | ||
282 | static struct gpio apollon_gpio_leds[] __initdata = { | ||
283 | { LED0_GPIO13, GPIOF_OUT_INIT_LOW, "LED0" }, /* LED0 - AA10 */ | ||
284 | { LED1_GPIO14, GPIOF_OUT_INIT_LOW, "LED1" }, /* LED1 - AA6 */ | ||
285 | { LED2_GPIO15, GPIOF_OUT_INIT_LOW, "LED2" }, /* LED2 - AA4 */ | ||
286 | }; | ||
287 | |||
283 | static void __init apollon_led_init(void) | 288 | static void __init apollon_led_init(void) |
284 | { | 289 | { |
285 | /* LED0 - AA10 */ | ||
286 | omap_mux_init_signal("vlynq_clk.gpio_13", 0); | 290 | omap_mux_init_signal("vlynq_clk.gpio_13", 0); |
287 | gpio_request(LED0_GPIO13, "LED0"); | ||
288 | gpio_direction_output(LED0_GPIO13, 0); | ||
289 | /* LED1 - AA6 */ | ||
290 | omap_mux_init_signal("vlynq_rx1.gpio_14", 0); | 291 | omap_mux_init_signal("vlynq_rx1.gpio_14", 0); |
291 | gpio_request(LED1_GPIO14, "LED1"); | ||
292 | gpio_direction_output(LED1_GPIO14, 0); | ||
293 | /* LED2 - AA4 */ | ||
294 | omap_mux_init_signal("vlynq_rx0.gpio_15", 0); | 292 | omap_mux_init_signal("vlynq_rx0.gpio_15", 0); |
295 | gpio_request(LED2_GPIO15, "LED2"); | 293 | |
296 | gpio_direction_output(LED2_GPIO15, 0); | 294 | gpio_request_array(apollon_gpio_leds, ARRAY_SIZE(apollon_gpio_leds)); |
297 | } | 295 | } |
298 | 296 | ||
299 | static void __init apollon_usb_init(void) | 297 | static void __init apollon_usb_init(void) |
@@ -301,8 +299,7 @@ static void __init apollon_usb_init(void) | |||
301 | /* USB device */ | 299 | /* USB device */ |
302 | /* DEVICE_SUSPEND */ | 300 | /* DEVICE_SUSPEND */ |
303 | omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0); | 301 | omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0); |
304 | gpio_request(12, "USB suspend"); | 302 | gpio_request_one(12, GPIOF_OUT_INIT_LOW, "USB suspend"); |
305 | gpio_direction_output(12, 0); | ||
306 | omap2_usbfs_init(&apollon_usb_config); | 303 | omap2_usbfs_init(&apollon_usb_config); |
307 | } | 304 | } |
308 | 305 | ||
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index 9340f6a06f4a..c63115bc1536 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c | |||
@@ -54,6 +54,7 @@ | |||
54 | #include "mux.h" | 54 | #include "mux.h" |
55 | #include "sdram-micron-mt46h32m32lf-6.h" | 55 | #include "sdram-micron-mt46h32m32lf-6.h" |
56 | #include "hsmmc.h" | 56 | #include "hsmmc.h" |
57 | #include "common-board-devices.h" | ||
57 | 58 | ||
58 | #define CM_T35_GPIO_PENDOWN 57 | 59 | #define CM_T35_GPIO_PENDOWN 57 |
59 | 60 | ||
@@ -66,86 +67,28 @@ | |||
66 | 67 | ||
67 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) | 68 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) |
68 | #include <linux/smsc911x.h> | 69 | #include <linux/smsc911x.h> |
70 | #include <plat/gpmc-smsc911x.h> | ||
69 | 71 | ||
70 | static struct smsc911x_platform_config cm_t35_smsc911x_config = { | 72 | static struct omap_smsc911x_platform_data cm_t35_smsc911x_cfg = { |
71 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | ||
72 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | ||
73 | .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS, | ||
74 | .phy_interface = PHY_INTERFACE_MODE_MII, | ||
75 | }; | ||
76 | |||
77 | static struct resource cm_t35_smsc911x_resources[] = { | ||
78 | { | ||
79 | .flags = IORESOURCE_MEM, | ||
80 | }, | ||
81 | { | ||
82 | .start = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO), | ||
83 | .end = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO), | ||
84 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | ||
85 | }, | ||
86 | }; | ||
87 | |||
88 | static struct platform_device cm_t35_smsc911x_device = { | ||
89 | .name = "smsc911x", | ||
90 | .id = 0, | 73 | .id = 0, |
91 | .num_resources = ARRAY_SIZE(cm_t35_smsc911x_resources), | 74 | .cs = CM_T35_SMSC911X_CS, |
92 | .resource = cm_t35_smsc911x_resources, | 75 | .gpio_irq = CM_T35_SMSC911X_GPIO, |
93 | .dev = { | 76 | .gpio_reset = -EINVAL, |
94 | .platform_data = &cm_t35_smsc911x_config, | 77 | .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS, |
95 | }, | ||
96 | }; | ||
97 | |||
98 | static struct resource sb_t35_smsc911x_resources[] = { | ||
99 | { | ||
100 | .flags = IORESOURCE_MEM, | ||
101 | }, | ||
102 | { | ||
103 | .start = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO), | ||
104 | .end = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO), | ||
105 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | ||
106 | }, | ||
107 | }; | 78 | }; |
108 | 79 | ||
109 | static struct platform_device sb_t35_smsc911x_device = { | 80 | static struct omap_smsc911x_platform_data sb_t35_smsc911x_cfg = { |
110 | .name = "smsc911x", | ||
111 | .id = 1, | 81 | .id = 1, |
112 | .num_resources = ARRAY_SIZE(sb_t35_smsc911x_resources), | 82 | .cs = SB_T35_SMSC911X_CS, |
113 | .resource = sb_t35_smsc911x_resources, | 83 | .gpio_irq = SB_T35_SMSC911X_GPIO, |
114 | .dev = { | 84 | .gpio_reset = -EINVAL, |
115 | .platform_data = &cm_t35_smsc911x_config, | 85 | .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS, |
116 | }, | ||
117 | }; | 86 | }; |
118 | 87 | ||
119 | static void __init cm_t35_init_smsc911x(struct platform_device *dev, | ||
120 | int cs, int irq_gpio) | ||
121 | { | ||
122 | unsigned long cs_mem_base; | ||
123 | |||
124 | if (gpmc_cs_request(cs, SZ_16M, &cs_mem_base) < 0) { | ||
125 | pr_err("CM-T35: Failed request for GPMC mem for smsc911x\n"); | ||
126 | return; | ||
127 | } | ||
128 | |||
129 | dev->resource[0].start = cs_mem_base + 0x0; | ||
130 | dev->resource[0].end = cs_mem_base + 0xff; | ||
131 | |||
132 | if ((gpio_request(irq_gpio, "ETH IRQ") == 0) && | ||
133 | (gpio_direction_input(irq_gpio) == 0)) { | ||
134 | gpio_export(irq_gpio, 0); | ||
135 | } else { | ||
136 | pr_err("CM-T35: could not obtain gpio for SMSC911X IRQ\n"); | ||
137 | return; | ||
138 | } | ||
139 | |||
140 | platform_device_register(dev); | ||
141 | } | ||
142 | |||
143 | static void __init cm_t35_init_ethernet(void) | 88 | static void __init cm_t35_init_ethernet(void) |
144 | { | 89 | { |
145 | cm_t35_init_smsc911x(&cm_t35_smsc911x_device, | 90 | gpmc_smsc911x_init(&cm_t35_smsc911x_cfg); |
146 | CM_T35_SMSC911X_CS, CM_T35_SMSC911X_GPIO); | 91 | gpmc_smsc911x_init(&sb_t35_smsc911x_cfg); |
147 | cm_t35_init_smsc911x(&sb_t35_smsc911x_device, | ||
148 | SB_T35_SMSC911X_CS, SB_T35_SMSC911X_GPIO); | ||
149 | } | 92 | } |
150 | #else | 93 | #else |
151 | static inline void __init cm_t35_init_ethernet(void) { return; } | 94 | static inline void __init cm_t35_init_ethernet(void) { return; } |
@@ -235,69 +178,10 @@ static void __init cm_t35_init_nand(void) | |||
235 | static inline void cm_t35_init_nand(void) {} | 178 | static inline void cm_t35_init_nand(void) {} |
236 | #endif | 179 | #endif |
237 | 180 | ||
238 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ | ||
239 | defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | ||
240 | #include <linux/spi/ads7846.h> | ||
241 | |||
242 | static struct omap2_mcspi_device_config ads7846_mcspi_config = { | ||
243 | .turbo_mode = 0, | ||
244 | .single_channel = 1, /* 0: slave, 1: master */ | ||
245 | }; | ||
246 | |||
247 | static int ads7846_get_pendown_state(void) | ||
248 | { | ||
249 | return !gpio_get_value(CM_T35_GPIO_PENDOWN); | ||
250 | } | ||
251 | |||
252 | static struct ads7846_platform_data ads7846_config = { | ||
253 | .x_max = 0x0fff, | ||
254 | .y_max = 0x0fff, | ||
255 | .x_plate_ohms = 180, | ||
256 | .pressure_max = 255, | ||
257 | .debounce_max = 10, | ||
258 | .debounce_tol = 3, | ||
259 | .debounce_rep = 1, | ||
260 | .get_pendown_state = ads7846_get_pendown_state, | ||
261 | .keep_vref_on = 1, | ||
262 | }; | ||
263 | |||
264 | static struct spi_board_info cm_t35_spi_board_info[] __initdata = { | ||
265 | { | ||
266 | .modalias = "ads7846", | ||
267 | .bus_num = 1, | ||
268 | .chip_select = 0, | ||
269 | .max_speed_hz = 1500000, | ||
270 | .controller_data = &ads7846_mcspi_config, | ||
271 | .irq = OMAP_GPIO_IRQ(CM_T35_GPIO_PENDOWN), | ||
272 | .platform_data = &ads7846_config, | ||
273 | }, | ||
274 | }; | ||
275 | |||
276 | static void __init cm_t35_init_ads7846(void) | ||
277 | { | ||
278 | if ((gpio_request(CM_T35_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) && | ||
279 | (gpio_direction_input(CM_T35_GPIO_PENDOWN) == 0)) { | ||
280 | gpio_export(CM_T35_GPIO_PENDOWN, 0); | ||
281 | } else { | ||
282 | pr_err("CM-T35: could not obtain gpio for ADS7846_PENDOWN\n"); | ||
283 | return; | ||
284 | } | ||
285 | |||
286 | spi_register_board_info(cm_t35_spi_board_info, | ||
287 | ARRAY_SIZE(cm_t35_spi_board_info)); | ||
288 | } | ||
289 | #else | ||
290 | static inline void cm_t35_init_ads7846(void) {} | ||
291 | #endif | ||
292 | |||
293 | #define CM_T35_LCD_EN_GPIO 157 | 181 | #define CM_T35_LCD_EN_GPIO 157 |
294 | #define CM_T35_LCD_BL_GPIO 58 | 182 | #define CM_T35_LCD_BL_GPIO 58 |
295 | #define CM_T35_DVI_EN_GPIO 54 | 183 | #define CM_T35_DVI_EN_GPIO 54 |
296 | 184 | ||
297 | static int lcd_bl_gpio; | ||
298 | static int lcd_en_gpio; | ||
299 | static int dvi_en_gpio; | ||
300 | |||
301 | static int lcd_enabled; | 185 | static int lcd_enabled; |
302 | static int dvi_enabled; | 186 | static int dvi_enabled; |
303 | 187 | ||
@@ -308,8 +192,8 @@ static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev) | |||
308 | return -EINVAL; | 192 | return -EINVAL; |
309 | } | 193 | } |
310 | 194 | ||
311 | gpio_set_value(lcd_en_gpio, 1); | 195 | gpio_set_value(CM_T35_LCD_EN_GPIO, 1); |
312 | gpio_set_value(lcd_bl_gpio, 1); | 196 | gpio_set_value(CM_T35_LCD_BL_GPIO, 1); |
313 | 197 | ||
314 | lcd_enabled = 1; | 198 | lcd_enabled = 1; |
315 | 199 | ||
@@ -320,8 +204,8 @@ static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev) | |||
320 | { | 204 | { |
321 | lcd_enabled = 0; | 205 | lcd_enabled = 0; |
322 | 206 | ||
323 | gpio_set_value(lcd_bl_gpio, 0); | 207 | gpio_set_value(CM_T35_LCD_BL_GPIO, 0); |
324 | gpio_set_value(lcd_en_gpio, 0); | 208 | gpio_set_value(CM_T35_LCD_EN_GPIO, 0); |
325 | } | 209 | } |
326 | 210 | ||
327 | static int cm_t35_panel_enable_dvi(struct omap_dss_device *dssdev) | 211 | static int cm_t35_panel_enable_dvi(struct omap_dss_device *dssdev) |
@@ -331,7 +215,7 @@ static int cm_t35_panel_enable_dvi(struct omap_dss_device *dssdev) | |||
331 | return -EINVAL; | 215 | return -EINVAL; |
332 | } | 216 | } |
333 | 217 | ||
334 | gpio_set_value(dvi_en_gpio, 0); | 218 | gpio_set_value(CM_T35_DVI_EN_GPIO, 0); |
335 | dvi_enabled = 1; | 219 | dvi_enabled = 1; |
336 | 220 | ||
337 | return 0; | 221 | return 0; |
@@ -339,7 +223,7 @@ static int cm_t35_panel_enable_dvi(struct omap_dss_device *dssdev) | |||
339 | 223 | ||
340 | static void cm_t35_panel_disable_dvi(struct omap_dss_device *dssdev) | 224 | static void cm_t35_panel_disable_dvi(struct omap_dss_device *dssdev) |
341 | { | 225 | { |
342 | gpio_set_value(dvi_en_gpio, 1); | 226 | gpio_set_value(CM_T35_DVI_EN_GPIO, 1); |
343 | dvi_enabled = 0; | 227 | dvi_enabled = 0; |
344 | } | 228 | } |
345 | 229 | ||
@@ -421,62 +305,38 @@ static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = { | |||
421 | }, | 305 | }, |
422 | }; | 306 | }; |
423 | 307 | ||
308 | static struct gpio cm_t35_dss_gpios[] __initdata = { | ||
309 | { CM_T35_LCD_EN_GPIO, GPIOF_OUT_INIT_LOW, "lcd enable" }, | ||
310 | { CM_T35_LCD_BL_GPIO, GPIOF_OUT_INIT_LOW, "lcd bl enable" }, | ||
311 | { CM_T35_DVI_EN_GPIO, GPIOF_OUT_INIT_HIGH, "dvi enable" }, | ||
312 | }; | ||
313 | |||
424 | static void __init cm_t35_init_display(void) | 314 | static void __init cm_t35_init_display(void) |
425 | { | 315 | { |
426 | int err; | 316 | int err; |
427 | 317 | ||
428 | lcd_en_gpio = CM_T35_LCD_EN_GPIO; | ||
429 | lcd_bl_gpio = CM_T35_LCD_BL_GPIO; | ||
430 | dvi_en_gpio = CM_T35_DVI_EN_GPIO; | ||
431 | |||
432 | spi_register_board_info(cm_t35_lcd_spi_board_info, | 318 | spi_register_board_info(cm_t35_lcd_spi_board_info, |
433 | ARRAY_SIZE(cm_t35_lcd_spi_board_info)); | 319 | ARRAY_SIZE(cm_t35_lcd_spi_board_info)); |
434 | 320 | ||
435 | err = gpio_request(lcd_en_gpio, "LCD RST"); | 321 | err = gpio_request_array(cm_t35_dss_gpios, |
436 | if (err) { | 322 | ARRAY_SIZE(cm_t35_dss_gpios)); |
437 | pr_err("CM-T35: failed to get LCD reset GPIO\n"); | ||
438 | goto out; | ||
439 | } | ||
440 | |||
441 | err = gpio_request(lcd_bl_gpio, "LCD BL"); | ||
442 | if (err) { | 323 | if (err) { |
443 | pr_err("CM-T35: failed to get LCD backlight control GPIO\n"); | 324 | pr_err("CM-T35: failed to request DSS control GPIOs\n"); |
444 | goto err_lcd_bl; | 325 | return; |
445 | } | ||
446 | |||
447 | err = gpio_request(dvi_en_gpio, "DVI EN"); | ||
448 | if (err) { | ||
449 | pr_err("CM-T35: failed to get DVI reset GPIO\n"); | ||
450 | goto err_dvi_en; | ||
451 | } | 326 | } |
452 | 327 | ||
453 | gpio_export(lcd_en_gpio, 0); | 328 | gpio_export(CM_T35_LCD_EN_GPIO, 0); |
454 | gpio_export(lcd_bl_gpio, 0); | 329 | gpio_export(CM_T35_LCD_BL_GPIO, 0); |
455 | gpio_export(dvi_en_gpio, 0); | 330 | gpio_export(CM_T35_DVI_EN_GPIO, 0); |
456 | gpio_direction_output(lcd_en_gpio, 0); | ||
457 | gpio_direction_output(lcd_bl_gpio, 0); | ||
458 | gpio_direction_output(dvi_en_gpio, 1); | ||
459 | 331 | ||
460 | msleep(50); | 332 | msleep(50); |
461 | gpio_set_value(lcd_en_gpio, 1); | 333 | gpio_set_value(CM_T35_LCD_EN_GPIO, 1); |
462 | 334 | ||
463 | err = omap_display_init(&cm_t35_dss_data); | 335 | err = omap_display_init(&cm_t35_dss_data); |
464 | if (err) { | 336 | if (err) { |
465 | pr_err("CM-T35: failed to register DSS device\n"); | 337 | pr_err("CM-T35: failed to register DSS device\n"); |
466 | goto err_dev_reg; | 338 | gpio_free_array(cm_t35_dss_gpios, ARRAY_SIZE(cm_t35_dss_gpios)); |
467 | } | 339 | } |
468 | |||
469 | return; | ||
470 | |||
471 | err_dev_reg: | ||
472 | gpio_free(dvi_en_gpio); | ||
473 | err_dvi_en: | ||
474 | gpio_free(lcd_bl_gpio); | ||
475 | err_lcd_bl: | ||
476 | gpio_free(lcd_en_gpio); | ||
477 | out: | ||
478 | |||
479 | return; | ||
480 | } | 340 | } |
481 | 341 | ||
482 | static struct regulator_consumer_supply cm_t35_vmmc1_supply = { | 342 | static struct regulator_consumer_supply cm_t35_vmmc1_supply = { |
@@ -609,10 +469,8 @@ static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio, | |||
609 | { | 469 | { |
610 | int wlan_rst = gpio + 2; | 470 | int wlan_rst = gpio + 2; |
611 | 471 | ||
612 | if ((gpio_request(wlan_rst, "WLAN RST") == 0) && | 472 | if (gpio_request_one(wlan_rst, GPIOF_OUT_INIT_HIGH, "WLAN RST") == 0) { |
613 | (gpio_direction_output(wlan_rst, 1) == 0)) { | ||
614 | gpio_export(wlan_rst, 0); | 473 | gpio_export(wlan_rst, 0); |
615 | |||
616 | udelay(10); | 474 | udelay(10); |
617 | gpio_set_value(wlan_rst, 0); | 475 | gpio_set_value(wlan_rst, 0); |
618 | udelay(10); | 476 | udelay(10); |
@@ -653,19 +511,9 @@ static struct twl4030_platform_data cm_t35_twldata = { | |||
653 | .vpll2 = &cm_t35_vpll2, | 511 | .vpll2 = &cm_t35_vpll2, |
654 | }; | 512 | }; |
655 | 513 | ||
656 | static struct i2c_board_info __initdata cm_t35_i2c_boardinfo[] = { | ||
657 | { | ||
658 | I2C_BOARD_INFO("tps65930", 0x48), | ||
659 | .flags = I2C_CLIENT_WAKE, | ||
660 | .irq = INT_34XX_SYS_NIRQ, | ||
661 | .platform_data = &cm_t35_twldata, | ||
662 | }, | ||
663 | }; | ||
664 | |||
665 | static void __init cm_t35_init_i2c(void) | 514 | static void __init cm_t35_init_i2c(void) |
666 | { | 515 | { |
667 | omap_register_i2c_bus(1, 2600, cm_t35_i2c_boardinfo, | 516 | omap3_pmic_init("tps65930", &cm_t35_twldata); |
668 | ARRAY_SIZE(cm_t35_i2c_boardinfo)); | ||
669 | } | 517 | } |
670 | 518 | ||
671 | static void __init cm_t35_init_early(void) | 519 | static void __init cm_t35_init_early(void) |
@@ -775,12 +623,6 @@ static struct omap_board_mux board_mux[] __initdata = { | |||
775 | }; | 623 | }; |
776 | #endif | 624 | #endif |
777 | 625 | ||
778 | static struct omap_musb_board_data musb_board_data = { | ||
779 | .interface_type = MUSB_INTERFACE_ULPI, | ||
780 | .mode = MUSB_OTG, | ||
781 | .power = 100, | ||
782 | }; | ||
783 | |||
784 | static struct omap_board_config_kernel cm_t35_config[] __initdata = { | 626 | static struct omap_board_config_kernel cm_t35_config[] __initdata = { |
785 | }; | 627 | }; |
786 | 628 | ||
@@ -792,12 +634,12 @@ static void __init cm_t35_init(void) | |||
792 | omap_serial_init(); | 634 | omap_serial_init(); |
793 | cm_t35_init_i2c(); | 635 | cm_t35_init_i2c(); |
794 | cm_t35_init_nand(); | 636 | cm_t35_init_nand(); |
795 | cm_t35_init_ads7846(); | 637 | omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL); |
796 | cm_t35_init_ethernet(); | 638 | cm_t35_init_ethernet(); |
797 | cm_t35_init_led(); | 639 | cm_t35_init_led(); |
798 | cm_t35_init_display(); | 640 | cm_t35_init_display(); |
799 | 641 | ||
800 | usb_musb_init(&musb_board_data); | 642 | usb_musb_init(NULL); |
801 | usbhs_init(&usbhs_bdata); | 643 | usbhs_init(&usbhs_bdata); |
802 | } | 644 | } |
803 | 645 | ||
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c index a27e3eee8292..08f08e812492 100644 --- a/arch/arm/mach-omap2/board-cm-t3517.c +++ b/arch/arm/mach-omap2/board-cm-t3517.c | |||
@@ -148,14 +148,13 @@ static void __init cm_t3517_init_rtc(void) | |||
148 | { | 148 | { |
149 | int err; | 149 | int err; |
150 | 150 | ||
151 | err = gpio_request(RTC_CS_EN_GPIO, "rtc cs en"); | 151 | err = gpio_request_one(RTC_CS_EN_GPIO, GPIOF_OUT_INIT_HIGH, |
152 | "rtc cs en"); | ||
152 | if (err) { | 153 | if (err) { |
153 | pr_err("CM-T3517: rtc cs en gpio request failed: %d\n", err); | 154 | pr_err("CM-T3517: rtc cs en gpio request failed: %d\n", err); |
154 | return; | 155 | return; |
155 | } | 156 | } |
156 | 157 | ||
157 | gpio_direction_output(RTC_CS_EN_GPIO, 1); | ||
158 | |||
159 | platform_device_register(&cm_t3517_rtc_device); | 158 | platform_device_register(&cm_t3517_rtc_device); |
160 | } | 159 | } |
161 | #else | 160 | #else |
@@ -182,11 +181,11 @@ static int cm_t3517_init_usbh(void) | |||
182 | { | 181 | { |
183 | int err; | 182 | int err; |
184 | 183 | ||
185 | err = gpio_request(USB_HUB_RESET_GPIO, "usb hub rst"); | 184 | err = gpio_request_one(USB_HUB_RESET_GPIO, GPIOF_OUT_INIT_LOW, |
185 | "usb hub rst"); | ||
186 | if (err) { | 186 | if (err) { |
187 | pr_err("CM-T3517: usb hub rst gpio request failed: %d\n", err); | 187 | pr_err("CM-T3517: usb hub rst gpio request failed: %d\n", err); |
188 | } else { | 188 | } else { |
189 | gpio_direction_output(USB_HUB_RESET_GPIO, 0); | ||
190 | udelay(10); | 189 | udelay(10); |
191 | gpio_set_value(USB_HUB_RESET_GPIO, 1); | 190 | gpio_set_value(USB_HUB_RESET_GPIO, 1); |
192 | msleep(1); | 191 | msleep(1); |
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index 1d1b56a29fb1..cf520d7dd614 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c | |||
@@ -51,7 +51,6 @@ | |||
51 | #include <plat/mcspi.h> | 51 | #include <plat/mcspi.h> |
52 | #include <linux/input/matrix_keypad.h> | 52 | #include <linux/input/matrix_keypad.h> |
53 | #include <linux/spi/spi.h> | 53 | #include <linux/spi/spi.h> |
54 | #include <linux/spi/ads7846.h> | ||
55 | #include <linux/dm9000.h> | 54 | #include <linux/dm9000.h> |
56 | #include <linux/interrupt.h> | 55 | #include <linux/interrupt.h> |
57 | 56 | ||
@@ -60,6 +59,7 @@ | |||
60 | #include "mux.h" | 59 | #include "mux.h" |
61 | #include "hsmmc.h" | 60 | #include "hsmmc.h" |
62 | #include "timer-gp.h" | 61 | #include "timer-gp.h" |
62 | #include "common-board-devices.h" | ||
63 | 63 | ||
64 | #define NAND_BLOCK_SIZE SZ_128K | 64 | #define NAND_BLOCK_SIZE SZ_128K |
65 | 65 | ||
@@ -97,13 +97,6 @@ static struct mtd_partition devkit8000_nand_partitions[] = { | |||
97 | }, | 97 | }, |
98 | }; | 98 | }; |
99 | 99 | ||
100 | static struct omap_nand_platform_data devkit8000_nand_data = { | ||
101 | .options = NAND_BUSWIDTH_16, | ||
102 | .parts = devkit8000_nand_partitions, | ||
103 | .nr_parts = ARRAY_SIZE(devkit8000_nand_partitions), | ||
104 | .dma_channel = -1, /* disable DMA in OMAP NAND driver */ | ||
105 | }; | ||
106 | |||
107 | static struct omap2_hsmmc_info mmc[] = { | 100 | static struct omap2_hsmmc_info mmc[] = { |
108 | { | 101 | { |
109 | .mmc = 1, | 102 | .mmc = 1, |
@@ -249,7 +242,7 @@ static int devkit8000_twl_gpio_setup(struct device *dev, | |||
249 | /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */ | 242 | /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */ |
250 | devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0; | 243 | devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0; |
251 | ret = gpio_request_one(devkit8000_lcd_device.reset_gpio, | 244 | ret = gpio_request_one(devkit8000_lcd_device.reset_gpio, |
252 | GPIOF_DIR_OUT | GPIOF_INIT_LOW, "LCD_PWREN"); | 245 | GPIOF_OUT_INIT_LOW, "LCD_PWREN"); |
253 | if (ret < 0) { | 246 | if (ret < 0) { |
254 | devkit8000_lcd_device.reset_gpio = -EINVAL; | 247 | devkit8000_lcd_device.reset_gpio = -EINVAL; |
255 | printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n"); | 248 | printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n"); |
@@ -258,7 +251,7 @@ static int devkit8000_twl_gpio_setup(struct device *dev, | |||
258 | /* gpio + 7 is "DVI_PD" (out, active low) */ | 251 | /* gpio + 7 is "DVI_PD" (out, active low) */ |
259 | devkit8000_dvi_device.reset_gpio = gpio + 7; | 252 | devkit8000_dvi_device.reset_gpio = gpio + 7; |
260 | ret = gpio_request_one(devkit8000_dvi_device.reset_gpio, | 253 | ret = gpio_request_one(devkit8000_dvi_device.reset_gpio, |
261 | GPIOF_DIR_OUT | GPIOF_INIT_LOW, "DVI PowerDown"); | 254 | GPIOF_OUT_INIT_LOW, "DVI PowerDown"); |
262 | if (ret < 0) { | 255 | if (ret < 0) { |
263 | devkit8000_dvi_device.reset_gpio = -EINVAL; | 256 | devkit8000_dvi_device.reset_gpio = -EINVAL; |
264 | printk(KERN_ERR "Failed to request GPIO for DVI PowerDown\n"); | 257 | printk(KERN_ERR "Failed to request GPIO for DVI PowerDown\n"); |
@@ -366,19 +359,9 @@ static struct twl4030_platform_data devkit8000_twldata = { | |||
366 | .keypad = &devkit8000_kp_data, | 359 | .keypad = &devkit8000_kp_data, |
367 | }; | 360 | }; |
368 | 361 | ||
369 | static struct i2c_board_info __initdata devkit8000_i2c_boardinfo[] = { | ||
370 | { | ||
371 | I2C_BOARD_INFO("tps65930", 0x48), | ||
372 | .flags = I2C_CLIENT_WAKE, | ||
373 | .irq = INT_34XX_SYS_NIRQ, | ||
374 | .platform_data = &devkit8000_twldata, | ||
375 | }, | ||
376 | }; | ||
377 | |||
378 | static int __init devkit8000_i2c_init(void) | 362 | static int __init devkit8000_i2c_init(void) |
379 | { | 363 | { |
380 | omap_register_i2c_bus(1, 2600, devkit8000_i2c_boardinfo, | 364 | omap3_pmic_init("tps65930", &devkit8000_twldata); |
381 | ARRAY_SIZE(devkit8000_i2c_boardinfo)); | ||
382 | /* Bus 3 is attached to the DVI port where devices like the pico DLP | 365 | /* Bus 3 is attached to the DVI port where devices like the pico DLP |
383 | * projector don't work reliably with 400kHz */ | 366 | * projector don't work reliably with 400kHz */ |
384 | omap_register_i2c_bus(3, 400, NULL, 0); | 367 | omap_register_i2c_bus(3, 400, NULL, 0); |
@@ -463,56 +446,6 @@ static void __init devkit8000_init_irq(void) | |||
463 | #endif | 446 | #endif |
464 | } | 447 | } |
465 | 448 | ||
466 | static void __init devkit8000_ads7846_init(void) | ||
467 | { | ||
468 | int gpio = OMAP3_DEVKIT_TS_GPIO; | ||
469 | int ret; | ||
470 | |||
471 | ret = gpio_request(gpio, "ads7846_pen_down"); | ||
472 | if (ret < 0) { | ||
473 | printk(KERN_ERR "Failed to request GPIO %d for " | ||
474 | "ads7846 pen down IRQ\n", gpio); | ||
475 | return; | ||
476 | } | ||
477 | |||
478 | gpio_direction_input(gpio); | ||
479 | } | ||
480 | |||
481 | static int ads7846_get_pendown_state(void) | ||
482 | { | ||
483 | return !gpio_get_value(OMAP3_DEVKIT_TS_GPIO); | ||
484 | } | ||
485 | |||
486 | static struct ads7846_platform_data ads7846_config = { | ||
487 | .x_max = 0x0fff, | ||
488 | .y_max = 0x0fff, | ||
489 | .x_plate_ohms = 180, | ||
490 | .pressure_max = 255, | ||
491 | .debounce_max = 10, | ||
492 | .debounce_tol = 5, | ||
493 | .debounce_rep = 1, | ||
494 | .get_pendown_state = ads7846_get_pendown_state, | ||
495 | .keep_vref_on = 1, | ||
496 | .settle_delay_usecs = 150, | ||
497 | }; | ||
498 | |||
499 | static struct omap2_mcspi_device_config ads7846_mcspi_config = { | ||
500 | .turbo_mode = 0, | ||
501 | .single_channel = 1, /* 0: slave, 1: master */ | ||
502 | }; | ||
503 | |||
504 | static struct spi_board_info devkit8000_spi_board_info[] __initdata = { | ||
505 | { | ||
506 | .modalias = "ads7846", | ||
507 | .bus_num = 2, | ||
508 | .chip_select = 0, | ||
509 | .max_speed_hz = 1500000, | ||
510 | .controller_data = &ads7846_mcspi_config, | ||
511 | .irq = OMAP_GPIO_IRQ(OMAP3_DEVKIT_TS_GPIO), | ||
512 | .platform_data = &ads7846_config, | ||
513 | } | ||
514 | }; | ||
515 | |||
516 | #define OMAP_DM9000_BASE 0x2c000000 | 449 | #define OMAP_DM9000_BASE 0x2c000000 |
517 | 450 | ||
518 | static struct resource omap_dm9000_resources[] = { | 451 | static struct resource omap_dm9000_resources[] = { |
@@ -550,14 +483,14 @@ static void __init omap_dm9000_init(void) | |||
550 | { | 483 | { |
551 | unsigned char *eth_addr = omap_dm9000_platdata.dev_addr; | 484 | unsigned char *eth_addr = omap_dm9000_platdata.dev_addr; |
552 | struct omap_die_id odi; | 485 | struct omap_die_id odi; |
486 | int ret; | ||
553 | 487 | ||
554 | if (gpio_request(OMAP_DM9000_GPIO_IRQ, "dm9000 irq") < 0) { | 488 | ret = gpio_request_one(OMAP_DM9000_GPIO_IRQ, GPIOF_IN, "dm9000 irq"); |
489 | if (ret < 0) { | ||
555 | printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n", | 490 | printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n", |
556 | OMAP_DM9000_GPIO_IRQ); | 491 | OMAP_DM9000_GPIO_IRQ); |
557 | return; | 492 | return; |
558 | } | 493 | } |
559 | |||
560 | gpio_direction_input(OMAP_DM9000_GPIO_IRQ); | ||
561 | 494 | ||
562 | /* init the mac address using DIE id */ | 495 | /* init the mac address using DIE id */ |
563 | omap_get_die_id(&odi); | 496 | omap_get_die_id(&odi); |
@@ -576,45 +509,6 @@ static struct platform_device *devkit8000_devices[] __initdata = { | |||
576 | &omap_dm9000_dev, | 509 | &omap_dm9000_dev, |
577 | }; | 510 | }; |
578 | 511 | ||
579 | static void __init devkit8000_flash_init(void) | ||
580 | { | ||
581 | u8 cs = 0; | ||
582 | u8 nandcs = GPMC_CS_NUM + 1; | ||
583 | |||
584 | /* find out the chip-select on which NAND exists */ | ||
585 | while (cs < GPMC_CS_NUM) { | ||
586 | u32 ret = 0; | ||
587 | ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); | ||
588 | |||
589 | if ((ret & 0xC00) == 0x800) { | ||
590 | printk(KERN_INFO "Found NAND on CS%d\n", cs); | ||
591 | if (nandcs > GPMC_CS_NUM) | ||
592 | nandcs = cs; | ||
593 | } | ||
594 | cs++; | ||
595 | } | ||
596 | |||
597 | if (nandcs > GPMC_CS_NUM) { | ||
598 | printk(KERN_INFO "NAND: Unable to find configuration " | ||
599 | "in GPMC\n "); | ||
600 | return; | ||
601 | } | ||
602 | |||
603 | if (nandcs < GPMC_CS_NUM) { | ||
604 | devkit8000_nand_data.cs = nandcs; | ||
605 | |||
606 | printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); | ||
607 | if (gpmc_nand_init(&devkit8000_nand_data) < 0) | ||
608 | printk(KERN_ERR "Unable to register NAND device\n"); | ||
609 | } | ||
610 | } | ||
611 | |||
612 | static struct omap_musb_board_data musb_board_data = { | ||
613 | .interface_type = MUSB_INTERFACE_ULPI, | ||
614 | .mode = MUSB_OTG, | ||
615 | .power = 100, | ||
616 | }; | ||
617 | |||
618 | static const struct usbhs_omap_board_data usbhs_bdata __initconst = { | 512 | static const struct usbhs_omap_board_data usbhs_bdata __initconst = { |
619 | 513 | ||
620 | .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, | 514 | .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, |
@@ -795,14 +689,13 @@ static void __init devkit8000_init(void) | |||
795 | ARRAY_SIZE(devkit8000_devices)); | 689 | ARRAY_SIZE(devkit8000_devices)); |
796 | 690 | ||
797 | omap_display_init(&devkit8000_dss_data); | 691 | omap_display_init(&devkit8000_dss_data); |
798 | spi_register_board_info(devkit8000_spi_board_info, | ||
799 | ARRAY_SIZE(devkit8000_spi_board_info)); | ||
800 | 692 | ||
801 | devkit8000_ads7846_init(); | 693 | omap_ads7846_init(2, OMAP3_DEVKIT_TS_GPIO, 0, NULL); |
802 | 694 | ||
803 | usb_musb_init(&musb_board_data); | 695 | usb_musb_init(NULL); |
804 | usbhs_init(&usbhs_bdata); | 696 | usbhs_init(&usbhs_bdata); |
805 | devkit8000_flash_init(); | 697 | omap_nand_flash_init(NAND_BUSWIDTH_16, devkit8000_nand_partitions, |
698 | ARRAY_SIZE(devkit8000_nand_partitions)); | ||
806 | 699 | ||
807 | /* Ensure SDRC pins are mux'd for self-refresh */ | 700 | /* Ensure SDRC pins are mux'd for self-refresh */ |
808 | omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); | 701 | omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); |
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index 3da64d361651..0c1bfca3f731 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c | |||
@@ -38,6 +38,7 @@ | |||
38 | #include "mux.h" | 38 | #include "mux.h" |
39 | #include "hsmmc.h" | 39 | #include "hsmmc.h" |
40 | #include "sdram-numonyx-m65kxxxxam.h" | 40 | #include "sdram-numonyx-m65kxxxxam.h" |
41 | #include "common-board-devices.h" | ||
41 | 42 | ||
42 | #define IGEP2_SMSC911X_CS 5 | 43 | #define IGEP2_SMSC911X_CS 5 |
43 | #define IGEP2_SMSC911X_GPIO 176 | 44 | #define IGEP2_SMSC911X_GPIO 176 |
@@ -54,6 +55,11 @@ | |||
54 | #define IGEP2_RC_GPIO_WIFI_NRESET 139 | 55 | #define IGEP2_RC_GPIO_WIFI_NRESET 139 |
55 | #define IGEP2_RC_GPIO_BT_NRESET 137 | 56 | #define IGEP2_RC_GPIO_BT_NRESET 137 |
56 | 57 | ||
58 | #define IGEP3_GPIO_LED0_GREEN 54 | ||
59 | #define IGEP3_GPIO_LED0_RED 53 | ||
60 | #define IGEP3_GPIO_LED1_RED 16 | ||
61 | #define IGEP3_GPIO_USBH_NRESET 183 | ||
62 | |||
57 | /* | 63 | /* |
58 | * IGEP2 Hardware Revision Table | 64 | * IGEP2 Hardware Revision Table |
59 | * | 65 | * |
@@ -68,6 +74,7 @@ | |||
68 | 74 | ||
69 | #define IGEP2_BOARD_HWREV_B 0 | 75 | #define IGEP2_BOARD_HWREV_B 0 |
70 | #define IGEP2_BOARD_HWREV_C 1 | 76 | #define IGEP2_BOARD_HWREV_C 1 |
77 | #define IGEP3_BOARD_HWREV 2 | ||
71 | 78 | ||
72 | static u8 hwrev; | 79 | static u8 hwrev; |
73 | 80 | ||
@@ -75,24 +82,29 @@ static void __init igep2_get_revision(void) | |||
75 | { | 82 | { |
76 | u8 ret; | 83 | u8 ret; |
77 | 84 | ||
85 | if (machine_is_igep0030()) { | ||
86 | hwrev = IGEP3_BOARD_HWREV; | ||
87 | return; | ||
88 | } | ||
89 | |||
78 | omap_mux_init_gpio(IGEP2_GPIO_LED1_RED, OMAP_PIN_INPUT); | 90 | omap_mux_init_gpio(IGEP2_GPIO_LED1_RED, OMAP_PIN_INPUT); |
79 | 91 | ||
80 | if ((gpio_request(IGEP2_GPIO_LED1_RED, "GPIO_HW0_REV") == 0) && | 92 | if (gpio_request_one(IGEP2_GPIO_LED1_RED, GPIOF_IN, "GPIO_HW0_REV")) { |
81 | (gpio_direction_input(IGEP2_GPIO_LED1_RED) == 0)) { | ||
82 | ret = gpio_get_value(IGEP2_GPIO_LED1_RED); | ||
83 | if (ret == 0) { | ||
84 | pr_info("IGEP2: Hardware Revision C (B-NON compatible)\n"); | ||
85 | hwrev = IGEP2_BOARD_HWREV_C; | ||
86 | } else if (ret == 1) { | ||
87 | pr_info("IGEP2: Hardware Revision B/C (B compatible)\n"); | ||
88 | hwrev = IGEP2_BOARD_HWREV_B; | ||
89 | } else { | ||
90 | pr_err("IGEP2: Unknown Hardware Revision\n"); | ||
91 | hwrev = -1; | ||
92 | } | ||
93 | } else { | ||
94 | pr_warning("IGEP2: Could not obtain gpio GPIO_HW0_REV\n"); | 93 | pr_warning("IGEP2: Could not obtain gpio GPIO_HW0_REV\n"); |
95 | pr_err("IGEP2: Unknown Hardware Revision\n"); | 94 | pr_err("IGEP2: Unknown Hardware Revision\n"); |
95 | return; | ||
96 | } | ||
97 | |||
98 | ret = gpio_get_value(IGEP2_GPIO_LED1_RED); | ||
99 | if (ret == 0) { | ||
100 | pr_info("IGEP2: Hardware Revision C (B-NON compatible)\n"); | ||
101 | hwrev = IGEP2_BOARD_HWREV_C; | ||
102 | } else if (ret == 1) { | ||
103 | pr_info("IGEP2: Hardware Revision B/C (B compatible)\n"); | ||
104 | hwrev = IGEP2_BOARD_HWREV_B; | ||
105 | } else { | ||
106 | pr_err("IGEP2: Unknown Hardware Revision\n"); | ||
107 | hwrev = -1; | ||
96 | } | 108 | } |
97 | 109 | ||
98 | gpio_free(IGEP2_GPIO_LED1_RED); | 110 | gpio_free(IGEP2_GPIO_LED1_RED); |
@@ -111,7 +123,7 @@ static void __init igep2_get_revision(void) | |||
111 | * So MTD regards it as 4KiB page size and 256KiB block size 64*(2*2048) | 123 | * So MTD regards it as 4KiB page size and 256KiB block size 64*(2*2048) |
112 | */ | 124 | */ |
113 | 125 | ||
114 | static struct mtd_partition igep2_onenand_partitions[] = { | 126 | static struct mtd_partition igep_onenand_partitions[] = { |
115 | { | 127 | { |
116 | .name = "X-Loader", | 128 | .name = "X-Loader", |
117 | .offset = 0, | 129 | .offset = 0, |
@@ -139,21 +151,21 @@ static struct mtd_partition igep2_onenand_partitions[] = { | |||
139 | }, | 151 | }, |
140 | }; | 152 | }; |
141 | 153 | ||
142 | static struct omap_onenand_platform_data igep2_onenand_data = { | 154 | static struct omap_onenand_platform_data igep_onenand_data = { |
143 | .parts = igep2_onenand_partitions, | 155 | .parts = igep_onenand_partitions, |
144 | .nr_parts = ARRAY_SIZE(igep2_onenand_partitions), | 156 | .nr_parts = ARRAY_SIZE(igep_onenand_partitions), |
145 | .dma_channel = -1, /* disable DMA in OMAP OneNAND driver */ | 157 | .dma_channel = -1, /* disable DMA in OMAP OneNAND driver */ |
146 | }; | 158 | }; |
147 | 159 | ||
148 | static struct platform_device igep2_onenand_device = { | 160 | static struct platform_device igep_onenand_device = { |
149 | .name = "omap2-onenand", | 161 | .name = "omap2-onenand", |
150 | .id = -1, | 162 | .id = -1, |
151 | .dev = { | 163 | .dev = { |
152 | .platform_data = &igep2_onenand_data, | 164 | .platform_data = &igep_onenand_data, |
153 | }, | 165 | }, |
154 | }; | 166 | }; |
155 | 167 | ||
156 | static void __init igep2_flash_init(void) | 168 | static void __init igep_flash_init(void) |
157 | { | 169 | { |
158 | u8 cs = 0; | 170 | u8 cs = 0; |
159 | u8 onenandcs = GPMC_CS_NUM + 1; | 171 | u8 onenandcs = GPMC_CS_NUM + 1; |
@@ -165,7 +177,7 @@ static void __init igep2_flash_init(void) | |||
165 | /* Check if NAND/oneNAND is configured */ | 177 | /* Check if NAND/oneNAND is configured */ |
166 | if ((ret & 0xC00) == 0x800) | 178 | if ((ret & 0xC00) == 0x800) |
167 | /* NAND found */ | 179 | /* NAND found */ |
168 | pr_err("IGEP2: Unsupported NAND found\n"); | 180 | pr_err("IGEP: Unsupported NAND found\n"); |
169 | else { | 181 | else { |
170 | ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); | 182 | ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); |
171 | if ((ret & 0x3F) == (ONENAND_MAP >> 24)) | 183 | if ((ret & 0x3F) == (ONENAND_MAP >> 24)) |
@@ -175,85 +187,46 @@ static void __init igep2_flash_init(void) | |||
175 | } | 187 | } |
176 | 188 | ||
177 | if (onenandcs > GPMC_CS_NUM) { | 189 | if (onenandcs > GPMC_CS_NUM) { |
178 | pr_err("IGEP2: Unable to find configuration in GPMC\n"); | 190 | pr_err("IGEP: Unable to find configuration in GPMC\n"); |
179 | return; | 191 | return; |
180 | } | 192 | } |
181 | 193 | ||
182 | igep2_onenand_data.cs = onenandcs; | 194 | igep_onenand_data.cs = onenandcs; |
183 | 195 | ||
184 | if (platform_device_register(&igep2_onenand_device) < 0) | 196 | if (platform_device_register(&igep_onenand_device) < 0) |
185 | pr_err("IGEP2: Unable to register OneNAND device\n"); | 197 | pr_err("IGEP: Unable to register OneNAND device\n"); |
186 | } | 198 | } |
187 | 199 | ||
188 | #else | 200 | #else |
189 | static void __init igep2_flash_init(void) {} | 201 | static void __init igep_flash_init(void) {} |
190 | #endif | 202 | #endif |
191 | 203 | ||
192 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) | 204 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) |
193 | 205 | ||
194 | #include <linux/smsc911x.h> | 206 | #include <linux/smsc911x.h> |
207 | #include <plat/gpmc-smsc911x.h> | ||
195 | 208 | ||
196 | static struct smsc911x_platform_config igep2_smsc911x_config = { | 209 | static struct omap_smsc911x_platform_data smsc911x_cfg = { |
197 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | 210 | .cs = IGEP2_SMSC911X_CS, |
198 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | 211 | .gpio_irq = IGEP2_SMSC911X_GPIO, |
199 | .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS , | 212 | .gpio_reset = -EINVAL, |
200 | .phy_interface = PHY_INTERFACE_MODE_MII, | 213 | .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS, |
201 | }; | ||
202 | |||
203 | static struct resource igep2_smsc911x_resources[] = { | ||
204 | { | ||
205 | .flags = IORESOURCE_MEM, | ||
206 | }, | ||
207 | { | ||
208 | .start = OMAP_GPIO_IRQ(IGEP2_SMSC911X_GPIO), | ||
209 | .end = OMAP_GPIO_IRQ(IGEP2_SMSC911X_GPIO), | ||
210 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | ||
211 | }, | ||
212 | }; | ||
213 | |||
214 | static struct platform_device igep2_smsc911x_device = { | ||
215 | .name = "smsc911x", | ||
216 | .id = 0, | ||
217 | .num_resources = ARRAY_SIZE(igep2_smsc911x_resources), | ||
218 | .resource = igep2_smsc911x_resources, | ||
219 | .dev = { | ||
220 | .platform_data = &igep2_smsc911x_config, | ||
221 | }, | ||
222 | }; | 214 | }; |
223 | 215 | ||
224 | static inline void __init igep2_init_smsc911x(void) | 216 | static inline void __init igep2_init_smsc911x(void) |
225 | { | 217 | { |
226 | unsigned long cs_mem_base; | 218 | gpmc_smsc911x_init(&smsc911x_cfg); |
227 | |||
228 | if (gpmc_cs_request(IGEP2_SMSC911X_CS, SZ_16M, &cs_mem_base) < 0) { | ||
229 | pr_err("IGEP v2: Failed request for GPMC mem for smsc911x\n"); | ||
230 | gpmc_cs_free(IGEP2_SMSC911X_CS); | ||
231 | return; | ||
232 | } | ||
233 | |||
234 | igep2_smsc911x_resources[0].start = cs_mem_base + 0x0; | ||
235 | igep2_smsc911x_resources[0].end = cs_mem_base + 0xff; | ||
236 | |||
237 | if ((gpio_request(IGEP2_SMSC911X_GPIO, "SMSC911X IRQ") == 0) && | ||
238 | (gpio_direction_input(IGEP2_SMSC911X_GPIO) == 0)) { | ||
239 | gpio_export(IGEP2_SMSC911X_GPIO, 0); | ||
240 | } else { | ||
241 | pr_err("IGEP v2: Could not obtain gpio for for SMSC911X IRQ\n"); | ||
242 | return; | ||
243 | } | ||
244 | |||
245 | platform_device_register(&igep2_smsc911x_device); | ||
246 | } | 219 | } |
247 | 220 | ||
248 | #else | 221 | #else |
249 | static inline void __init igep2_init_smsc911x(void) { } | 222 | static inline void __init igep2_init_smsc911x(void) { } |
250 | #endif | 223 | #endif |
251 | 224 | ||
252 | static struct regulator_consumer_supply igep2_vmmc1_supply = | 225 | static struct regulator_consumer_supply igep_vmmc1_supply = |
253 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); | 226 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); |
254 | 227 | ||
255 | /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ | 228 | /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ |
256 | static struct regulator_init_data igep2_vmmc1 = { | 229 | static struct regulator_init_data igep_vmmc1 = { |
257 | .constraints = { | 230 | .constraints = { |
258 | .min_uV = 1850000, | 231 | .min_uV = 1850000, |
259 | .max_uV = 3150000, | 232 | .max_uV = 3150000, |
@@ -264,13 +237,13 @@ static struct regulator_init_data igep2_vmmc1 = { | |||
264 | | REGULATOR_CHANGE_STATUS, | 237 | | REGULATOR_CHANGE_STATUS, |
265 | }, | 238 | }, |
266 | .num_consumer_supplies = 1, | 239 | .num_consumer_supplies = 1, |
267 | .consumer_supplies = &igep2_vmmc1_supply, | 240 | .consumer_supplies = &igep_vmmc1_supply, |
268 | }; | 241 | }; |
269 | 242 | ||
270 | static struct regulator_consumer_supply igep2_vio_supply = | 243 | static struct regulator_consumer_supply igep_vio_supply = |
271 | REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"); | 244 | REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"); |
272 | 245 | ||
273 | static struct regulator_init_data igep2_vio = { | 246 | static struct regulator_init_data igep_vio = { |
274 | .constraints = { | 247 | .constraints = { |
275 | .min_uV = 1800000, | 248 | .min_uV = 1800000, |
276 | .max_uV = 1800000, | 249 | .max_uV = 1800000, |
@@ -282,34 +255,34 @@ static struct regulator_init_data igep2_vio = { | |||
282 | | REGULATOR_CHANGE_STATUS, | 255 | | REGULATOR_CHANGE_STATUS, |
283 | }, | 256 | }, |
284 | .num_consumer_supplies = 1, | 257 | .num_consumer_supplies = 1, |
285 | .consumer_supplies = &igep2_vio_supply, | 258 | .consumer_supplies = &igep_vio_supply, |
286 | }; | 259 | }; |
287 | 260 | ||
288 | static struct regulator_consumer_supply igep2_vmmc2_supply = | 261 | static struct regulator_consumer_supply igep_vmmc2_supply = |
289 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); | 262 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); |
290 | 263 | ||
291 | static struct regulator_init_data igep2_vmmc2 = { | 264 | static struct regulator_init_data igep_vmmc2 = { |
292 | .constraints = { | 265 | .constraints = { |
293 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | 266 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
294 | .always_on = 1, | 267 | .always_on = 1, |
295 | }, | 268 | }, |
296 | .num_consumer_supplies = 1, | 269 | .num_consumer_supplies = 1, |
297 | .consumer_supplies = &igep2_vmmc2_supply, | 270 | .consumer_supplies = &igep_vmmc2_supply, |
298 | }; | 271 | }; |
299 | 272 | ||
300 | static struct fixed_voltage_config igep2_vwlan = { | 273 | static struct fixed_voltage_config igep_vwlan = { |
301 | .supply_name = "vwlan", | 274 | .supply_name = "vwlan", |
302 | .microvolts = 3300000, | 275 | .microvolts = 3300000, |
303 | .gpio = -EINVAL, | 276 | .gpio = -EINVAL, |
304 | .enabled_at_boot = 1, | 277 | .enabled_at_boot = 1, |
305 | .init_data = &igep2_vmmc2, | 278 | .init_data = &igep_vmmc2, |
306 | }; | 279 | }; |
307 | 280 | ||
308 | static struct platform_device igep2_vwlan_device = { | 281 | static struct platform_device igep_vwlan_device = { |
309 | .name = "reg-fixed-voltage", | 282 | .name = "reg-fixed-voltage", |
310 | .id = 0, | 283 | .id = 0, |
311 | .dev = { | 284 | .dev = { |
312 | .platform_data = &igep2_vwlan, | 285 | .platform_data = &igep_vwlan, |
313 | }, | 286 | }, |
314 | }; | 287 | }; |
315 | 288 | ||
@@ -334,20 +307,17 @@ static struct omap2_hsmmc_info mmc[] = { | |||
334 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | 307 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) |
335 | #include <linux/leds.h> | 308 | #include <linux/leds.h> |
336 | 309 | ||
337 | static struct gpio_led igep2_gpio_leds[] = { | 310 | static struct gpio_led igep_gpio_leds[] = { |
338 | [0] = { | 311 | [0] = { |
339 | .name = "gpio-led:red:d0", | 312 | .name = "gpio-led:red:d0", |
340 | .gpio = IGEP2_GPIO_LED0_RED, | ||
341 | .default_trigger = "default-off" | 313 | .default_trigger = "default-off" |
342 | }, | 314 | }, |
343 | [1] = { | 315 | [1] = { |
344 | .name = "gpio-led:green:d0", | 316 | .name = "gpio-led:green:d0", |
345 | .gpio = IGEP2_GPIO_LED0_GREEN, | ||
346 | .default_trigger = "default-off", | 317 | .default_trigger = "default-off", |
347 | }, | 318 | }, |
348 | [2] = { | 319 | [2] = { |
349 | .name = "gpio-led:red:d1", | 320 | .name = "gpio-led:red:d1", |
350 | .gpio = IGEP2_GPIO_LED1_RED, | ||
351 | .default_trigger = "default-off", | 321 | .default_trigger = "default-off", |
352 | }, | 322 | }, |
353 | [3] = { | 323 | [3] = { |
@@ -358,94 +328,119 @@ static struct gpio_led igep2_gpio_leds[] = { | |||
358 | }, | 328 | }, |
359 | }; | 329 | }; |
360 | 330 | ||
361 | static struct gpio_led_platform_data igep2_led_pdata = { | 331 | static struct gpio_led_platform_data igep_led_pdata = { |
362 | .leds = igep2_gpio_leds, | 332 | .leds = igep_gpio_leds, |
363 | .num_leds = ARRAY_SIZE(igep2_gpio_leds), | 333 | .num_leds = ARRAY_SIZE(igep_gpio_leds), |
364 | }; | 334 | }; |
365 | 335 | ||
366 | static struct platform_device igep2_led_device = { | 336 | static struct platform_device igep_led_device = { |
367 | .name = "leds-gpio", | 337 | .name = "leds-gpio", |
368 | .id = -1, | 338 | .id = -1, |
369 | .dev = { | 339 | .dev = { |
370 | .platform_data = &igep2_led_pdata, | 340 | .platform_data = &igep_led_pdata, |
371 | }, | 341 | }, |
372 | }; | 342 | }; |
373 | 343 | ||
374 | static void __init igep2_leds_init(void) | 344 | static void __init igep_leds_init(void) |
375 | { | 345 | { |
376 | platform_device_register(&igep2_led_device); | 346 | if (machine_is_igep0020()) { |
347 | igep_gpio_leds[0].gpio = IGEP2_GPIO_LED0_RED; | ||
348 | igep_gpio_leds[1].gpio = IGEP2_GPIO_LED0_GREEN; | ||
349 | igep_gpio_leds[2].gpio = IGEP2_GPIO_LED1_RED; | ||
350 | } else { | ||
351 | igep_gpio_leds[0].gpio = IGEP3_GPIO_LED0_RED; | ||
352 | igep_gpio_leds[1].gpio = IGEP3_GPIO_LED0_GREEN; | ||
353 | igep_gpio_leds[2].gpio = IGEP3_GPIO_LED1_RED; | ||
354 | } | ||
355 | |||
356 | platform_device_register(&igep_led_device); | ||
377 | } | 357 | } |
378 | 358 | ||
379 | #else | 359 | #else |
380 | static inline void igep2_leds_init(void) | 360 | static struct gpio igep_gpio_leds[] __initdata = { |
361 | { -EINVAL, GPIOF_OUT_INIT_LOW, "gpio-led:red:d0" }, | ||
362 | { -EINVAL, GPIOF_OUT_INIT_LOW, "gpio-led:green:d0" }, | ||
363 | { -EINVAL, GPIOF_OUT_INIT_LOW, "gpio-led:red:d1" }, | ||
364 | }; | ||
365 | |||
366 | static inline void igep_leds_init(void) | ||
381 | { | 367 | { |
382 | if ((gpio_request(IGEP2_GPIO_LED0_RED, "gpio-led:red:d0") == 0) && | 368 | int i; |
383 | (gpio_direction_output(IGEP2_GPIO_LED0_RED, 0) == 0)) | ||
384 | gpio_export(IGEP2_GPIO_LED0_RED, 0); | ||
385 | else | ||
386 | pr_warning("IGEP v2: Could not obtain gpio GPIO_LED0_RED\n"); | ||
387 | 369 | ||
388 | if ((gpio_request(IGEP2_GPIO_LED0_GREEN, "gpio-led:green:d0") == 0) && | 370 | if (machine_is_igep0020()) { |
389 | (gpio_direction_output(IGEP2_GPIO_LED0_GREEN, 0) == 0)) | 371 | igep_gpio_leds[0].gpio = IGEP2_GPIO_LED0_RED; |
390 | gpio_export(IGEP2_GPIO_LED0_GREEN, 0); | 372 | igep_gpio_leds[1].gpio = IGEP2_GPIO_LED0_GREEN; |
391 | else | 373 | igep_gpio_leds[2].gpio = IGEP2_GPIO_LED1_RED; |
392 | pr_warning("IGEP v2: Could not obtain gpio GPIO_LED0_GREEN\n"); | 374 | } else { |
375 | igep_gpio_leds[0].gpio = IGEP3_GPIO_LED0_RED; | ||
376 | igep_gpio_leds[1].gpio = IGEP3_GPIO_LED0_GREEN; | ||
377 | igep_gpio_leds[2].gpio = IGEP3_GPIO_LED1_RED; | ||
378 | } | ||
393 | 379 | ||
394 | if ((gpio_request(IGEP2_GPIO_LED1_RED, "gpio-led:red:d1") == 0) && | 380 | if (gpio_request_array(igep_gpio_leds, ARRAY_SIZE(igep_gpio_leds))) { |
395 | (gpio_direction_output(IGEP2_GPIO_LED1_RED, 0) == 0)) | 381 | pr_warning("IGEP v2: Could not obtain leds gpios\n"); |
396 | gpio_export(IGEP2_GPIO_LED1_RED, 0); | 382 | return; |
397 | else | 383 | } |
398 | pr_warning("IGEP v2: Could not obtain gpio GPIO_LED1_RED\n"); | ||
399 | 384 | ||
385 | for (i = 0; i < ARRAY_SIZE(igep_gpio_leds); i++) | ||
386 | gpio_export(igep_gpio_leds[i].gpio, 0); | ||
400 | } | 387 | } |
401 | #endif | 388 | #endif |
402 | 389 | ||
403 | static int igep2_twl_gpio_setup(struct device *dev, | 390 | static struct gpio igep2_twl_gpios[] = { |
391 | { -EINVAL, GPIOF_IN, "GPIO_EHCI_NOC" }, | ||
392 | { -EINVAL, GPIOF_OUT_INIT_LOW, "GPIO_USBH_CPEN" }, | ||
393 | }; | ||
394 | |||
395 | static int igep_twl_gpio_setup(struct device *dev, | ||
404 | unsigned gpio, unsigned ngpio) | 396 | unsigned gpio, unsigned ngpio) |
405 | { | 397 | { |
398 | int ret; | ||
399 | |||
406 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | 400 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ |
407 | mmc[0].gpio_cd = gpio + 0; | 401 | mmc[0].gpio_cd = gpio + 0; |
408 | omap2_hsmmc_init(mmc); | 402 | omap2_hsmmc_init(mmc); |
409 | 403 | ||
410 | /* | ||
411 | * REVISIT: need ehci-omap hooks for external VBUS | ||
412 | * power switch and overcurrent detect | ||
413 | */ | ||
414 | if ((gpio_request(gpio + 1, "GPIO_EHCI_NOC") < 0) || | ||
415 | (gpio_direction_input(gpio + 1) < 0)) | ||
416 | pr_err("IGEP2: Could not obtain gpio for EHCI NOC"); | ||
417 | |||
418 | /* | ||
419 | * TWL4030_GPIO_MAX + 0 == ledA, GPIO_USBH_CPEN | ||
420 | * (out, active low) | ||
421 | */ | ||
422 | if ((gpio_request(gpio + TWL4030_GPIO_MAX, "GPIO_USBH_CPEN") < 0) || | ||
423 | (gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0) < 0)) | ||
424 | pr_err("IGEP2: Could not obtain gpio for USBH_CPEN"); | ||
425 | |||
426 | /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */ | 404 | /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */ |
427 | #if !defined(CONFIG_LEDS_GPIO) && !defined(CONFIG_LEDS_GPIO_MODULE) | 405 | #if !defined(CONFIG_LEDS_GPIO) && !defined(CONFIG_LEDS_GPIO_MODULE) |
428 | if ((gpio_request(gpio+TWL4030_GPIO_MAX+1, "gpio-led:green:d1") == 0) | 406 | ret = gpio_request_one(gpio + TWL4030_GPIO_MAX + 1, GPIOF_OUT_INIT_HIGH, |
429 | && (gpio_direction_output(gpio + TWL4030_GPIO_MAX + 1, 1) == 0)) | 407 | "gpio-led:green:d1"); |
408 | if (ret == 0) | ||
430 | gpio_export(gpio + TWL4030_GPIO_MAX + 1, 0); | 409 | gpio_export(gpio + TWL4030_GPIO_MAX + 1, 0); |
431 | else | 410 | else |
432 | pr_warning("IGEP v2: Could not obtain gpio GPIO_LED1_GREEN\n"); | 411 | pr_warning("IGEP: Could not obtain gpio GPIO_LED1_GREEN\n"); |
433 | #else | 412 | #else |
434 | igep2_gpio_leds[3].gpio = gpio + TWL4030_GPIO_MAX + 1; | 413 | igep_gpio_leds[3].gpio = gpio + TWL4030_GPIO_MAX + 1; |
435 | #endif | 414 | #endif |
436 | 415 | ||
416 | if (machine_is_igep0030()) | ||
417 | return 0; | ||
418 | |||
419 | /* | ||
420 | * REVISIT: need ehci-omap hooks for external VBUS | ||
421 | * power switch and overcurrent detect | ||
422 | */ | ||
423 | igep2_twl_gpios[0].gpio = gpio + 1; | ||
424 | |||
425 | /* TWL4030_GPIO_MAX + 0 == ledA, GPIO_USBH_CPEN (out, active low) */ | ||
426 | igep2_twl_gpios[1].gpio = gpio + TWL4030_GPIO_MAX; | ||
427 | |||
428 | ret = gpio_request_array(igep2_twl_gpios, ARRAY_SIZE(igep2_twl_gpios)); | ||
429 | if (ret < 0) | ||
430 | pr_err("IGEP2: Could not obtain gpio for USBH_CPEN"); | ||
431 | |||
437 | return 0; | 432 | return 0; |
438 | }; | 433 | }; |
439 | 434 | ||
440 | static struct twl4030_gpio_platform_data igep2_twl4030_gpio_pdata = { | 435 | static struct twl4030_gpio_platform_data igep_twl4030_gpio_pdata = { |
441 | .gpio_base = OMAP_MAX_GPIO_LINES, | 436 | .gpio_base = OMAP_MAX_GPIO_LINES, |
442 | .irq_base = TWL4030_GPIO_IRQ_BASE, | 437 | .irq_base = TWL4030_GPIO_IRQ_BASE, |
443 | .irq_end = TWL4030_GPIO_IRQ_END, | 438 | .irq_end = TWL4030_GPIO_IRQ_END, |
444 | .use_leds = true, | 439 | .use_leds = true, |
445 | .setup = igep2_twl_gpio_setup, | 440 | .setup = igep_twl_gpio_setup, |
446 | }; | 441 | }; |
447 | 442 | ||
448 | static struct twl4030_usb_data igep2_usb_data = { | 443 | static struct twl4030_usb_data igep_usb_data = { |
449 | .usb_mode = T2_USB_MODE_ULPI, | 444 | .usb_mode = T2_USB_MODE_ULPI, |
450 | }; | 445 | }; |
451 | 446 | ||
@@ -507,16 +502,17 @@ static struct regulator_init_data igep2_vpll2 = { | |||
507 | 502 | ||
508 | static void __init igep2_display_init(void) | 503 | static void __init igep2_display_init(void) |
509 | { | 504 | { |
510 | if (gpio_request(IGEP2_GPIO_DVI_PUP, "GPIO_DVI_PUP") && | 505 | int err = gpio_request_one(IGEP2_GPIO_DVI_PUP, GPIOF_OUT_INIT_HIGH, |
511 | gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1)) | 506 | "GPIO_DVI_PUP"); |
507 | if (err) | ||
512 | pr_err("IGEP v2: Could not obtain gpio GPIO_DVI_PUP\n"); | 508 | pr_err("IGEP v2: Could not obtain gpio GPIO_DVI_PUP\n"); |
513 | } | 509 | } |
514 | 510 | ||
515 | static struct platform_device *igep2_devices[] __initdata = { | 511 | static struct platform_device *igep_devices[] __initdata = { |
516 | &igep2_vwlan_device, | 512 | &igep_vwlan_device, |
517 | }; | 513 | }; |
518 | 514 | ||
519 | static void __init igep2_init_early(void) | 515 | static void __init igep_init_early(void) |
520 | { | 516 | { |
521 | omap2_init_common_infrastructure(); | 517 | omap2_init_common_infrastructure(); |
522 | omap2_init_common_devices(m65kxxxxam_sdrc_params, | 518 | omap2_init_common_devices(m65kxxxxam_sdrc_params, |
@@ -561,27 +557,15 @@ static struct twl4030_keypad_data igep2_keypad_pdata = { | |||
561 | .rep = 1, | 557 | .rep = 1, |
562 | }; | 558 | }; |
563 | 559 | ||
564 | static struct twl4030_platform_data igep2_twldata = { | 560 | static struct twl4030_platform_data igep_twldata = { |
565 | .irq_base = TWL4030_IRQ_BASE, | 561 | .irq_base = TWL4030_IRQ_BASE, |
566 | .irq_end = TWL4030_IRQ_END, | 562 | .irq_end = TWL4030_IRQ_END, |
567 | 563 | ||
568 | /* platform_data for children goes here */ | 564 | /* platform_data for children goes here */ |
569 | .usb = &igep2_usb_data, | 565 | .usb = &igep_usb_data, |
570 | .codec = &igep2_codec_data, | 566 | .gpio = &igep_twl4030_gpio_pdata, |
571 | .gpio = &igep2_twl4030_gpio_pdata, | 567 | .vmmc1 = &igep_vmmc1, |
572 | .keypad = &igep2_keypad_pdata, | 568 | .vio = &igep_vio, |
573 | .vmmc1 = &igep2_vmmc1, | ||
574 | .vpll2 = &igep2_vpll2, | ||
575 | .vio = &igep2_vio, | ||
576 | }; | ||
577 | |||
578 | static struct i2c_board_info __initdata igep2_i2c1_boardinfo[] = { | ||
579 | { | ||
580 | I2C_BOARD_INFO("twl4030", 0x48), | ||
581 | .flags = I2C_CLIENT_WAKE, | ||
582 | .irq = INT_34XX_SYS_NIRQ, | ||
583 | .platform_data = &igep2_twldata, | ||
584 | }, | ||
585 | }; | 569 | }; |
586 | 570 | ||
587 | static struct i2c_board_info __initdata igep2_i2c3_boardinfo[] = { | 571 | static struct i2c_board_info __initdata igep2_i2c3_boardinfo[] = { |
@@ -590,32 +574,29 @@ static struct i2c_board_info __initdata igep2_i2c3_boardinfo[] = { | |||
590 | }, | 574 | }, |
591 | }; | 575 | }; |
592 | 576 | ||
593 | static void __init igep2_i2c_init(void) | 577 | static void __init igep_i2c_init(void) |
594 | { | 578 | { |
595 | int ret; | 579 | int ret; |
596 | 580 | ||
597 | ret = omap_register_i2c_bus(1, 2600, igep2_i2c1_boardinfo, | 581 | if (machine_is_igep0020()) { |
598 | ARRAY_SIZE(igep2_i2c1_boardinfo)); | 582 | /* |
599 | if (ret) | 583 | * Bus 3 is attached to the DVI port where devices like the |
600 | pr_warning("IGEP2: Could not register I2C1 bus (%d)\n", ret); | 584 | * pico DLP projector don't work reliably with 400kHz |
585 | */ | ||
586 | ret = omap_register_i2c_bus(3, 100, igep2_i2c3_boardinfo, | ||
587 | ARRAY_SIZE(igep2_i2c3_boardinfo)); | ||
588 | if (ret) | ||
589 | pr_warning("IGEP2: Could not register I2C3 bus (%d)\n", ret); | ||
590 | |||
591 | igep_twldata.codec = &igep2_codec_data; | ||
592 | igep_twldata.keypad = &igep2_keypad_pdata; | ||
593 | igep_twldata.vpll2 = &igep2_vpll2; | ||
594 | } | ||
601 | 595 | ||
602 | /* | 596 | omap3_pmic_init("twl4030", &igep_twldata); |
603 | * Bus 3 is attached to the DVI port where devices like the pico DLP | ||
604 | * projector don't work reliably with 400kHz | ||
605 | */ | ||
606 | ret = omap_register_i2c_bus(3, 100, igep2_i2c3_boardinfo, | ||
607 | ARRAY_SIZE(igep2_i2c3_boardinfo)); | ||
608 | if (ret) | ||
609 | pr_warning("IGEP2: Could not register I2C3 bus (%d)\n", ret); | ||
610 | } | 597 | } |
611 | 598 | ||
612 | static struct omap_musb_board_data musb_board_data = { | 599 | static const struct usbhs_omap_board_data igep2_usbhs_bdata __initconst = { |
613 | .interface_type = MUSB_INTERFACE_ULPI, | ||
614 | .mode = MUSB_OTG, | ||
615 | .power = 100, | ||
616 | }; | ||
617 | |||
618 | static const struct usbhs_omap_board_data usbhs_bdata __initconst = { | ||
619 | .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, | 600 | .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, |
620 | .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, | 601 | .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, |
621 | .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, | 602 | .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, |
@@ -626,6 +607,17 @@ static const struct usbhs_omap_board_data usbhs_bdata __initconst = { | |||
626 | .reset_gpio_port[2] = -EINVAL, | 607 | .reset_gpio_port[2] = -EINVAL, |
627 | }; | 608 | }; |
628 | 609 | ||
610 | static const struct usbhs_omap_board_data igep3_usbhs_bdata __initconst = { | ||
611 | .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, | ||
612 | .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, | ||
613 | .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, | ||
614 | |||
615 | .phy_reset = true, | ||
616 | .reset_gpio_port[0] = -EINVAL, | ||
617 | .reset_gpio_port[1] = IGEP3_GPIO_USBH_NRESET, | ||
618 | .reset_gpio_port[2] = -EINVAL, | ||
619 | }; | ||
620 | |||
629 | #ifdef CONFIG_OMAP_MUX | 621 | #ifdef CONFIG_OMAP_MUX |
630 | static struct omap_board_mux board_mux[] __initdata = { | 622 | static struct omap_board_mux board_mux[] __initdata = { |
631 | { .reg_offset = OMAP_MUX_TERMINATOR }, | 623 | { .reg_offset = OMAP_MUX_TERMINATOR }, |
@@ -633,82 +625,95 @@ static struct omap_board_mux board_mux[] __initdata = { | |||
633 | #endif | 625 | #endif |
634 | 626 | ||
635 | #if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE) | 627 | #if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE) |
628 | static struct gpio igep_wlan_bt_gpios[] __initdata = { | ||
629 | { -EINVAL, GPIOF_OUT_INIT_HIGH, "GPIO_WIFI_NPD" }, | ||
630 | { -EINVAL, GPIOF_OUT_INIT_HIGH, "GPIO_WIFI_NRESET" }, | ||
631 | { -EINVAL, GPIOF_OUT_INIT_HIGH, "GPIO_BT_NRESET" }, | ||
632 | }; | ||
636 | 633 | ||
637 | static void __init igep2_wlan_bt_init(void) | 634 | static void __init igep_wlan_bt_init(void) |
638 | { | 635 | { |
639 | unsigned npd, wreset, btreset; | 636 | int err; |
640 | 637 | ||
641 | /* GPIO's for WLAN-BT combo depends on hardware revision */ | 638 | /* GPIO's for WLAN-BT combo depends on hardware revision */ |
642 | if (hwrev == IGEP2_BOARD_HWREV_B) { | 639 | if (hwrev == IGEP2_BOARD_HWREV_B) { |
643 | npd = IGEP2_RB_GPIO_WIFI_NPD; | 640 | igep_wlan_bt_gpios[0].gpio = IGEP2_RB_GPIO_WIFI_NPD; |
644 | wreset = IGEP2_RB_GPIO_WIFI_NRESET; | 641 | igep_wlan_bt_gpios[1].gpio = IGEP2_RB_GPIO_WIFI_NRESET; |
645 | btreset = IGEP2_RB_GPIO_BT_NRESET; | 642 | igep_wlan_bt_gpios[2].gpio = IGEP2_RB_GPIO_BT_NRESET; |
646 | } else if (hwrev == IGEP2_BOARD_HWREV_C) { | 643 | } else if (hwrev == IGEP2_BOARD_HWREV_C || machine_is_igep0030()) { |
647 | npd = IGEP2_RC_GPIO_WIFI_NPD; | 644 | igep_wlan_bt_gpios[0].gpio = IGEP2_RC_GPIO_WIFI_NPD; |
648 | wreset = IGEP2_RC_GPIO_WIFI_NRESET; | 645 | igep_wlan_bt_gpios[1].gpio = IGEP2_RC_GPIO_WIFI_NRESET; |
649 | btreset = IGEP2_RC_GPIO_BT_NRESET; | 646 | igep_wlan_bt_gpios[2].gpio = IGEP2_RC_GPIO_BT_NRESET; |
650 | } else | 647 | } else |
651 | return; | 648 | return; |
652 | 649 | ||
653 | /* Set GPIO's for WLAN-BT combo module */ | 650 | err = gpio_request_array(igep_wlan_bt_gpios, |
654 | if ((gpio_request(npd, "GPIO_WIFI_NPD") == 0) && | 651 | ARRAY_SIZE(igep_wlan_bt_gpios)); |
655 | (gpio_direction_output(npd, 1) == 0)) { | 652 | if (err) { |
656 | gpio_export(npd, 0); | 653 | pr_warning("IGEP2: Could not obtain WIFI/BT gpios\n"); |
657 | } else | 654 | return; |
658 | pr_warning("IGEP2: Could not obtain gpio GPIO_WIFI_NPD\n"); | 655 | } |
659 | 656 | ||
660 | if ((gpio_request(wreset, "GPIO_WIFI_NRESET") == 0) && | 657 | gpio_export(igep_wlan_bt_gpios[0].gpio, 0); |
661 | (gpio_direction_output(wreset, 1) == 0)) { | 658 | gpio_export(igep_wlan_bt_gpios[1].gpio, 0); |
662 | gpio_export(wreset, 0); | 659 | gpio_export(igep_wlan_bt_gpios[2].gpio, 0); |
663 | gpio_set_value(wreset, 0); | 660 | |
664 | udelay(10); | 661 | gpio_set_value(igep_wlan_bt_gpios[1].gpio, 0); |
665 | gpio_set_value(wreset, 1); | 662 | udelay(10); |
666 | } else | 663 | gpio_set_value(igep_wlan_bt_gpios[1].gpio, 1); |
667 | pr_warning("IGEP2: Could not obtain gpio GPIO_WIFI_NRESET\n"); | ||
668 | 664 | ||
669 | if ((gpio_request(btreset, "GPIO_BT_NRESET") == 0) && | ||
670 | (gpio_direction_output(btreset, 1) == 0)) { | ||
671 | gpio_export(btreset, 0); | ||
672 | } else | ||
673 | pr_warning("IGEP2: Could not obtain gpio GPIO_BT_NRESET\n"); | ||
674 | } | 665 | } |
675 | #else | 666 | #else |
676 | static inline void __init igep2_wlan_bt_init(void) { } | 667 | static inline void __init igep_wlan_bt_init(void) { } |
677 | #endif | 668 | #endif |
678 | 669 | ||
679 | static void __init igep2_init(void) | 670 | static void __init igep_init(void) |
680 | { | 671 | { |
681 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); | 672 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
682 | 673 | ||
683 | /* Get IGEP2 hardware revision */ | 674 | /* Get IGEP2 hardware revision */ |
684 | igep2_get_revision(); | 675 | igep2_get_revision(); |
685 | /* Register I2C busses and drivers */ | 676 | /* Register I2C busses and drivers */ |
686 | igep2_i2c_init(); | 677 | igep_i2c_init(); |
687 | platform_add_devices(igep2_devices, ARRAY_SIZE(igep2_devices)); | 678 | platform_add_devices(igep_devices, ARRAY_SIZE(igep_devices)); |
688 | omap_display_init(&igep2_dss_data); | ||
689 | omap_serial_init(); | 679 | omap_serial_init(); |
690 | usb_musb_init(&musb_board_data); | 680 | usb_musb_init(NULL); |
691 | usbhs_init(&usbhs_bdata); | ||
692 | 681 | ||
693 | igep2_flash_init(); | 682 | igep_flash_init(); |
694 | igep2_leds_init(); | 683 | igep_leds_init(); |
695 | igep2_display_init(); | ||
696 | igep2_init_smsc911x(); | ||
697 | 684 | ||
698 | /* | 685 | /* |
699 | * WLAN-BT combo module from MuRata which has a Marvell WLAN | 686 | * WLAN-BT combo module from MuRata which has a Marvell WLAN |
700 | * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface. | 687 | * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface. |
701 | */ | 688 | */ |
702 | igep2_wlan_bt_init(); | 689 | igep_wlan_bt_init(); |
703 | 690 | ||
691 | if (machine_is_igep0020()) { | ||
692 | omap_display_init(&igep2_dss_data); | ||
693 | igep2_display_init(); | ||
694 | igep2_init_smsc911x(); | ||
695 | usbhs_init(&igep2_usbhs_bdata); | ||
696 | } else { | ||
697 | usbhs_init(&igep3_usbhs_bdata); | ||
698 | } | ||
704 | } | 699 | } |
705 | 700 | ||
706 | MACHINE_START(IGEP0020, "IGEP v2 board") | 701 | MACHINE_START(IGEP0020, "IGEP v2 board") |
707 | .boot_params = 0x80000100, | 702 | .boot_params = 0x80000100, |
708 | .reserve = omap_reserve, | 703 | .reserve = omap_reserve, |
709 | .map_io = omap3_map_io, | 704 | .map_io = omap3_map_io, |
710 | .init_early = igep2_init_early, | 705 | .init_early = igep_init_early, |
706 | .init_irq = omap_init_irq, | ||
707 | .init_machine = igep_init, | ||
708 | .timer = &omap_timer, | ||
709 | MACHINE_END | ||
710 | |||
711 | MACHINE_START(IGEP0030, "IGEP OMAP3 module") | ||
712 | .boot_params = 0x80000100, | ||
713 | .reserve = omap_reserve, | ||
714 | .map_io = omap3_map_io, | ||
715 | .init_early = igep_init_early, | ||
711 | .init_irq = omap_init_irq, | 716 | .init_irq = omap_init_irq, |
712 | .init_machine = igep2_init, | 717 | .init_machine = igep_init, |
713 | .timer = &omap_timer, | 718 | .timer = &omap_timer, |
714 | MACHINE_END | 719 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-igep0030.c b/arch/arm/mach-omap2/board-igep0030.c deleted file mode 100644 index 2cf86c3cb1a3..000000000000 --- a/arch/arm/mach-omap2/board-igep0030.c +++ /dev/null | |||
@@ -1,458 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2010 - ISEE 2007 SL | ||
3 | * | ||
4 | * Modified from mach-omap2/board-generic.c | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/delay.h> | ||
15 | #include <linux/err.h> | ||
16 | #include <linux/clk.h> | ||
17 | #include <linux/io.h> | ||
18 | #include <linux/gpio.h> | ||
19 | #include <linux/interrupt.h> | ||
20 | |||
21 | #include <linux/regulator/machine.h> | ||
22 | #include <linux/regulator/fixed.h> | ||
23 | #include <linux/i2c/twl.h> | ||
24 | #include <linux/mmc/host.h> | ||
25 | |||
26 | #include <asm/mach-types.h> | ||
27 | #include <asm/mach/arch.h> | ||
28 | |||
29 | #include <plat/board.h> | ||
30 | #include <plat/common.h> | ||
31 | #include <plat/gpmc.h> | ||
32 | #include <plat/usb.h> | ||
33 | #include <plat/onenand.h> | ||
34 | |||
35 | #include "mux.h" | ||
36 | #include "hsmmc.h" | ||
37 | #include "sdram-numonyx-m65kxxxxam.h" | ||
38 | |||
39 | #define IGEP3_GPIO_LED0_GREEN 54 | ||
40 | #define IGEP3_GPIO_LED0_RED 53 | ||
41 | #define IGEP3_GPIO_LED1_RED 16 | ||
42 | |||
43 | #define IGEP3_GPIO_WIFI_NPD 138 | ||
44 | #define IGEP3_GPIO_WIFI_NRESET 139 | ||
45 | #define IGEP3_GPIO_BT_NRESET 137 | ||
46 | |||
47 | #define IGEP3_GPIO_USBH_NRESET 183 | ||
48 | |||
49 | |||
50 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ | ||
51 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) | ||
52 | |||
53 | #define ONENAND_MAP 0x20000000 | ||
54 | |||
55 | /* | ||
56 | * x2 Flash built-in COMBO POP MEMORY | ||
57 | * Since the device is equipped with two DataRAMs, and two-plane NAND | ||
58 | * Flash memory array, these two component enables simultaneous program | ||
59 | * of 4KiB. Plane1 has only even blocks such as block0, block2, block4 | ||
60 | * while Plane2 has only odd blocks such as block1, block3, block5. | ||
61 | * So MTD regards it as 4KiB page size and 256KiB block size 64*(2*2048) | ||
62 | */ | ||
63 | |||
64 | static struct mtd_partition igep3_onenand_partitions[] = { | ||
65 | { | ||
66 | .name = "X-Loader", | ||
67 | .offset = 0, | ||
68 | .size = 2 * (64*(2*2048)) | ||
69 | }, | ||
70 | { | ||
71 | .name = "U-Boot", | ||
72 | .offset = MTDPART_OFS_APPEND, | ||
73 | .size = 6 * (64*(2*2048)), | ||
74 | }, | ||
75 | { | ||
76 | .name = "Environment", | ||
77 | .offset = MTDPART_OFS_APPEND, | ||
78 | .size = 2 * (64*(2*2048)), | ||
79 | }, | ||
80 | { | ||
81 | .name = "Kernel", | ||
82 | .offset = MTDPART_OFS_APPEND, | ||
83 | .size = 12 * (64*(2*2048)), | ||
84 | }, | ||
85 | { | ||
86 | .name = "File System", | ||
87 | .offset = MTDPART_OFS_APPEND, | ||
88 | .size = MTDPART_SIZ_FULL, | ||
89 | }, | ||
90 | }; | ||
91 | |||
92 | static struct omap_onenand_platform_data igep3_onenand_pdata = { | ||
93 | .parts = igep3_onenand_partitions, | ||
94 | .nr_parts = ARRAY_SIZE(igep3_onenand_partitions), | ||
95 | .onenand_setup = NULL, | ||
96 | .dma_channel = -1, /* disable DMA in OMAP OneNAND driver */ | ||
97 | }; | ||
98 | |||
99 | static struct platform_device igep3_onenand_device = { | ||
100 | .name = "omap2-onenand", | ||
101 | .id = -1, | ||
102 | .dev = { | ||
103 | .platform_data = &igep3_onenand_pdata, | ||
104 | }, | ||
105 | }; | ||
106 | |||
107 | static void __init igep3_flash_init(void) | ||
108 | { | ||
109 | u8 cs = 0; | ||
110 | u8 onenandcs = GPMC_CS_NUM + 1; | ||
111 | |||
112 | for (cs = 0; cs < GPMC_CS_NUM; cs++) { | ||
113 | u32 ret; | ||
114 | ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); | ||
115 | |||
116 | /* Check if NAND/oneNAND is configured */ | ||
117 | if ((ret & 0xC00) == 0x800) | ||
118 | /* NAND found */ | ||
119 | pr_err("IGEP3: Unsupported NAND found\n"); | ||
120 | else { | ||
121 | ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); | ||
122 | |||
123 | if ((ret & 0x3F) == (ONENAND_MAP >> 24)) | ||
124 | /* OneNAND found */ | ||
125 | onenandcs = cs; | ||
126 | } | ||
127 | } | ||
128 | |||
129 | if (onenandcs > GPMC_CS_NUM) { | ||
130 | pr_err("IGEP3: Unable to find configuration in GPMC\n"); | ||
131 | return; | ||
132 | } | ||
133 | |||
134 | igep3_onenand_pdata.cs = onenandcs; | ||
135 | |||
136 | if (platform_device_register(&igep3_onenand_device) < 0) | ||
137 | pr_err("IGEP3: Unable to register OneNAND device\n"); | ||
138 | } | ||
139 | |||
140 | #else | ||
141 | static void __init igep3_flash_init(void) {} | ||
142 | #endif | ||
143 | |||
144 | static struct regulator_consumer_supply igep3_vmmc1_supply = | ||
145 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); | ||
146 | |||
147 | /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ | ||
148 | static struct regulator_init_data igep3_vmmc1 = { | ||
149 | .constraints = { | ||
150 | .min_uV = 1850000, | ||
151 | .max_uV = 3150000, | ||
152 | .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
153 | | REGULATOR_MODE_STANDBY, | ||
154 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
155 | | REGULATOR_CHANGE_MODE | ||
156 | | REGULATOR_CHANGE_STATUS, | ||
157 | }, | ||
158 | .num_consumer_supplies = 1, | ||
159 | .consumer_supplies = &igep3_vmmc1_supply, | ||
160 | }; | ||
161 | |||
162 | static struct regulator_consumer_supply igep3_vio_supply = | ||
163 | REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"); | ||
164 | |||
165 | static struct regulator_init_data igep3_vio = { | ||
166 | .constraints = { | ||
167 | .min_uV = 1800000, | ||
168 | .max_uV = 1800000, | ||
169 | .apply_uV = 1, | ||
170 | .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
171 | | REGULATOR_MODE_STANDBY, | ||
172 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
173 | | REGULATOR_CHANGE_MODE | ||
174 | | REGULATOR_CHANGE_STATUS, | ||
175 | }, | ||
176 | .num_consumer_supplies = 1, | ||
177 | .consumer_supplies = &igep3_vio_supply, | ||
178 | }; | ||
179 | |||
180 | static struct regulator_consumer_supply igep3_vmmc2_supply = | ||
181 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); | ||
182 | |||
183 | static struct regulator_init_data igep3_vmmc2 = { | ||
184 | .constraints = { | ||
185 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
186 | .always_on = 1, | ||
187 | }, | ||
188 | .num_consumer_supplies = 1, | ||
189 | .consumer_supplies = &igep3_vmmc2_supply, | ||
190 | }; | ||
191 | |||
192 | static struct fixed_voltage_config igep3_vwlan = { | ||
193 | .supply_name = "vwlan", | ||
194 | .microvolts = 3300000, | ||
195 | .gpio = -EINVAL, | ||
196 | .enabled_at_boot = 1, | ||
197 | .init_data = &igep3_vmmc2, | ||
198 | }; | ||
199 | |||
200 | static struct platform_device igep3_vwlan_device = { | ||
201 | .name = "reg-fixed-voltage", | ||
202 | .id = 0, | ||
203 | .dev = { | ||
204 | .platform_data = &igep3_vwlan, | ||
205 | }, | ||
206 | }; | ||
207 | |||
208 | static struct omap2_hsmmc_info mmc[] = { | ||
209 | [0] = { | ||
210 | .mmc = 1, | ||
211 | .caps = MMC_CAP_4_BIT_DATA, | ||
212 | .gpio_cd = -EINVAL, | ||
213 | .gpio_wp = -EINVAL, | ||
214 | }, | ||
215 | #if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE) | ||
216 | [1] = { | ||
217 | .mmc = 2, | ||
218 | .caps = MMC_CAP_4_BIT_DATA, | ||
219 | .gpio_cd = -EINVAL, | ||
220 | .gpio_wp = -EINVAL, | ||
221 | }, | ||
222 | #endif | ||
223 | {} /* Terminator */ | ||
224 | }; | ||
225 | |||
226 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | ||
227 | #include <linux/leds.h> | ||
228 | |||
229 | static struct gpio_led igep3_gpio_leds[] = { | ||
230 | [0] = { | ||
231 | .name = "gpio-led:red:d0", | ||
232 | .gpio = IGEP3_GPIO_LED0_RED, | ||
233 | .default_trigger = "default-off" | ||
234 | }, | ||
235 | [1] = { | ||
236 | .name = "gpio-led:green:d0", | ||
237 | .gpio = IGEP3_GPIO_LED0_GREEN, | ||
238 | .default_trigger = "default-off", | ||
239 | }, | ||
240 | [2] = { | ||
241 | .name = "gpio-led:red:d1", | ||
242 | .gpio = IGEP3_GPIO_LED1_RED, | ||
243 | .default_trigger = "default-off", | ||
244 | }, | ||
245 | [3] = { | ||
246 | .name = "gpio-led:green:d1", | ||
247 | .default_trigger = "heartbeat", | ||
248 | .gpio = -EINVAL, /* gets replaced */ | ||
249 | }, | ||
250 | }; | ||
251 | |||
252 | static struct gpio_led_platform_data igep3_led_pdata = { | ||
253 | .leds = igep3_gpio_leds, | ||
254 | .num_leds = ARRAY_SIZE(igep3_gpio_leds), | ||
255 | }; | ||
256 | |||
257 | static struct platform_device igep3_led_device = { | ||
258 | .name = "leds-gpio", | ||
259 | .id = -1, | ||
260 | .dev = { | ||
261 | .platform_data = &igep3_led_pdata, | ||
262 | }, | ||
263 | }; | ||
264 | |||
265 | static void __init igep3_leds_init(void) | ||
266 | { | ||
267 | platform_device_register(&igep3_led_device); | ||
268 | } | ||
269 | |||
270 | #else | ||
271 | static inline void igep3_leds_init(void) | ||
272 | { | ||
273 | if ((gpio_request(IGEP3_GPIO_LED0_RED, "gpio-led:red:d0") == 0) && | ||
274 | (gpio_direction_output(IGEP3_GPIO_LED0_RED, 1) == 0)) { | ||
275 | gpio_export(IGEP3_GPIO_LED0_RED, 0); | ||
276 | gpio_set_value(IGEP3_GPIO_LED0_RED, 1); | ||
277 | } else | ||
278 | pr_warning("IGEP3: Could not obtain gpio GPIO_LED0_RED\n"); | ||
279 | |||
280 | if ((gpio_request(IGEP3_GPIO_LED0_GREEN, "gpio-led:green:d0") == 0) && | ||
281 | (gpio_direction_output(IGEP3_GPIO_LED0_GREEN, 1) == 0)) { | ||
282 | gpio_export(IGEP3_GPIO_LED0_GREEN, 0); | ||
283 | gpio_set_value(IGEP3_GPIO_LED0_GREEN, 1); | ||
284 | } else | ||
285 | pr_warning("IGEP3: Could not obtain gpio GPIO_LED0_GREEN\n"); | ||
286 | |||
287 | if ((gpio_request(IGEP3_GPIO_LED1_RED, "gpio-led:red:d1") == 0) && | ||
288 | (gpio_direction_output(IGEP3_GPIO_LED1_RED, 1) == 0)) { | ||
289 | gpio_export(IGEP3_GPIO_LED1_RED, 0); | ||
290 | gpio_set_value(IGEP3_GPIO_LED1_RED, 1); | ||
291 | } else | ||
292 | pr_warning("IGEP3: Could not obtain gpio GPIO_LED1_RED\n"); | ||
293 | } | ||
294 | #endif | ||
295 | |||
296 | static int igep3_twl4030_gpio_setup(struct device *dev, | ||
297 | unsigned gpio, unsigned ngpio) | ||
298 | { | ||
299 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | ||
300 | mmc[0].gpio_cd = gpio + 0; | ||
301 | omap2_hsmmc_init(mmc); | ||
302 | |||
303 | /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */ | ||
304 | #if !defined(CONFIG_LEDS_GPIO) && !defined(CONFIG_LEDS_GPIO_MODULE) | ||
305 | if ((gpio_request(gpio+TWL4030_GPIO_MAX+1, "gpio-led:green:d1") == 0) | ||
306 | && (gpio_direction_output(gpio + TWL4030_GPIO_MAX + 1, 1) == 0)) { | ||
307 | gpio_export(gpio + TWL4030_GPIO_MAX + 1, 0); | ||
308 | gpio_set_value(gpio + TWL4030_GPIO_MAX + 1, 0); | ||
309 | } else | ||
310 | pr_warning("IGEP3: Could not obtain gpio GPIO_LED1_GREEN\n"); | ||
311 | #else | ||
312 | igep3_gpio_leds[3].gpio = gpio + TWL4030_GPIO_MAX + 1; | ||
313 | #endif | ||
314 | |||
315 | return 0; | ||
316 | }; | ||
317 | |||
318 | static struct twl4030_gpio_platform_data igep3_twl4030_gpio_pdata = { | ||
319 | .gpio_base = OMAP_MAX_GPIO_LINES, | ||
320 | .irq_base = TWL4030_GPIO_IRQ_BASE, | ||
321 | .irq_end = TWL4030_GPIO_IRQ_END, | ||
322 | .use_leds = true, | ||
323 | .setup = igep3_twl4030_gpio_setup, | ||
324 | }; | ||
325 | |||
326 | static struct twl4030_usb_data igep3_twl4030_usb_data = { | ||
327 | .usb_mode = T2_USB_MODE_ULPI, | ||
328 | }; | ||
329 | |||
330 | static struct platform_device *igep3_devices[] __initdata = { | ||
331 | &igep3_vwlan_device, | ||
332 | }; | ||
333 | |||
334 | static void __init igep3_init_early(void) | ||
335 | { | ||
336 | omap2_init_common_infrastructure(); | ||
337 | omap2_init_common_devices(m65kxxxxam_sdrc_params, | ||
338 | m65kxxxxam_sdrc_params); | ||
339 | } | ||
340 | |||
341 | static struct twl4030_platform_data igep3_twl4030_pdata = { | ||
342 | .irq_base = TWL4030_IRQ_BASE, | ||
343 | .irq_end = TWL4030_IRQ_END, | ||
344 | |||
345 | /* platform_data for children goes here */ | ||
346 | .usb = &igep3_twl4030_usb_data, | ||
347 | .gpio = &igep3_twl4030_gpio_pdata, | ||
348 | .vmmc1 = &igep3_vmmc1, | ||
349 | .vio = &igep3_vio, | ||
350 | }; | ||
351 | |||
352 | static struct i2c_board_info __initdata igep3_i2c_boardinfo[] = { | ||
353 | { | ||
354 | I2C_BOARD_INFO("twl4030", 0x48), | ||
355 | .flags = I2C_CLIENT_WAKE, | ||
356 | .irq = INT_34XX_SYS_NIRQ, | ||
357 | .platform_data = &igep3_twl4030_pdata, | ||
358 | }, | ||
359 | }; | ||
360 | |||
361 | static int __init igep3_i2c_init(void) | ||
362 | { | ||
363 | omap_register_i2c_bus(1, 2600, igep3_i2c_boardinfo, | ||
364 | ARRAY_SIZE(igep3_i2c_boardinfo)); | ||
365 | |||
366 | return 0; | ||
367 | } | ||
368 | |||
369 | static struct omap_musb_board_data musb_board_data = { | ||
370 | .interface_type = MUSB_INTERFACE_ULPI, | ||
371 | .mode = MUSB_OTG, | ||
372 | .power = 100, | ||
373 | }; | ||
374 | |||
375 | #if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE) | ||
376 | |||
377 | static void __init igep3_wifi_bt_init(void) | ||
378 | { | ||
379 | /* Configure MUX values for W-LAN + Bluetooth GPIO's */ | ||
380 | omap_mux_init_gpio(IGEP3_GPIO_WIFI_NPD, OMAP_PIN_OUTPUT); | ||
381 | omap_mux_init_gpio(IGEP3_GPIO_WIFI_NRESET, OMAP_PIN_OUTPUT); | ||
382 | omap_mux_init_gpio(IGEP3_GPIO_BT_NRESET, OMAP_PIN_OUTPUT); | ||
383 | |||
384 | /* Set GPIO's for W-LAN + Bluetooth combo module */ | ||
385 | if ((gpio_request(IGEP3_GPIO_WIFI_NPD, "GPIO_WIFI_NPD") == 0) && | ||
386 | (gpio_direction_output(IGEP3_GPIO_WIFI_NPD, 1) == 0)) { | ||
387 | gpio_export(IGEP3_GPIO_WIFI_NPD, 0); | ||
388 | } else | ||
389 | pr_warning("IGEP3: Could not obtain gpio GPIO_WIFI_NPD\n"); | ||
390 | |||
391 | if ((gpio_request(IGEP3_GPIO_WIFI_NRESET, "GPIO_WIFI_NRESET") == 0) && | ||
392 | (gpio_direction_output(IGEP3_GPIO_WIFI_NRESET, 1) == 0)) { | ||
393 | gpio_export(IGEP3_GPIO_WIFI_NRESET, 0); | ||
394 | gpio_set_value(IGEP3_GPIO_WIFI_NRESET, 0); | ||
395 | udelay(10); | ||
396 | gpio_set_value(IGEP3_GPIO_WIFI_NRESET, 1); | ||
397 | } else | ||
398 | pr_warning("IGEP3: Could not obtain gpio GPIO_WIFI_NRESET\n"); | ||
399 | |||
400 | if ((gpio_request(IGEP3_GPIO_BT_NRESET, "GPIO_BT_NRESET") == 0) && | ||
401 | (gpio_direction_output(IGEP3_GPIO_BT_NRESET, 1) == 0)) { | ||
402 | gpio_export(IGEP3_GPIO_BT_NRESET, 0); | ||
403 | } else | ||
404 | pr_warning("IGEP3: Could not obtain gpio GPIO_BT_NRESET\n"); | ||
405 | } | ||
406 | #else | ||
407 | void __init igep3_wifi_bt_init(void) {} | ||
408 | #endif | ||
409 | |||
410 | static const struct usbhs_omap_board_data usbhs_bdata __initconst = { | ||
411 | .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, | ||
412 | .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, | ||
413 | .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, | ||
414 | |||
415 | .phy_reset = true, | ||
416 | .reset_gpio_port[0] = -EINVAL, | ||
417 | .reset_gpio_port[1] = IGEP3_GPIO_USBH_NRESET, | ||
418 | .reset_gpio_port[2] = -EINVAL, | ||
419 | }; | ||
420 | |||
421 | #ifdef CONFIG_OMAP_MUX | ||
422 | static struct omap_board_mux board_mux[] __initdata = { | ||
423 | OMAP3_MUX(I2C2_SDA, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | ||
424 | { .reg_offset = OMAP_MUX_TERMINATOR }, | ||
425 | }; | ||
426 | #endif | ||
427 | |||
428 | static void __init igep3_init(void) | ||
429 | { | ||
430 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); | ||
431 | |||
432 | /* Register I2C busses and drivers */ | ||
433 | igep3_i2c_init(); | ||
434 | platform_add_devices(igep3_devices, ARRAY_SIZE(igep3_devices)); | ||
435 | omap_serial_init(); | ||
436 | usb_musb_init(&musb_board_data); | ||
437 | usbhs_init(&usbhs_bdata); | ||
438 | |||
439 | igep3_flash_init(); | ||
440 | igep3_leds_init(); | ||
441 | |||
442 | /* | ||
443 | * WLAN-BT combo module from MuRata which has a Marvell WLAN | ||
444 | * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface. | ||
445 | */ | ||
446 | igep3_wifi_bt_init(); | ||
447 | |||
448 | } | ||
449 | |||
450 | MACHINE_START(IGEP0030, "IGEP OMAP3 module") | ||
451 | .boot_params = 0x80000100, | ||
452 | .reserve = omap_reserve, | ||
453 | .map_io = omap3_map_io, | ||
454 | .init_early = igep3_init_early, | ||
455 | .init_irq = omap_init_irq, | ||
456 | .init_machine = igep3_init, | ||
457 | .timer = &omap_timer, | ||
458 | MACHINE_END | ||
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index e2ba77957a8c..f7d6038075f0 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c | |||
@@ -22,7 +22,6 @@ | |||
22 | #include <linux/err.h> | 22 | #include <linux/err.h> |
23 | #include <linux/clk.h> | 23 | #include <linux/clk.h> |
24 | #include <linux/spi/spi.h> | 24 | #include <linux/spi/spi.h> |
25 | #include <linux/spi/ads7846.h> | ||
26 | #include <linux/regulator/machine.h> | 25 | #include <linux/regulator/machine.h> |
27 | #include <linux/i2c/twl.h> | 26 | #include <linux/i2c/twl.h> |
28 | #include <linux/io.h> | 27 | #include <linux/io.h> |
@@ -43,47 +42,19 @@ | |||
43 | 42 | ||
44 | #include <asm/delay.h> | 43 | #include <asm/delay.h> |
45 | #include <plat/usb.h> | 44 | #include <plat/usb.h> |
45 | #include <plat/gpmc-smsc911x.h> | ||
46 | 46 | ||
47 | #include "board-flash.h" | 47 | #include "board-flash.h" |
48 | #include "mux.h" | 48 | #include "mux.h" |
49 | #include "hsmmc.h" | 49 | #include "hsmmc.h" |
50 | #include "control.h" | 50 | #include "control.h" |
51 | #include "common-board-devices.h" | ||
51 | 52 | ||
52 | #define LDP_SMSC911X_CS 1 | 53 | #define LDP_SMSC911X_CS 1 |
53 | #define LDP_SMSC911X_GPIO 152 | 54 | #define LDP_SMSC911X_GPIO 152 |
54 | #define DEBUG_BASE 0x08000000 | 55 | #define DEBUG_BASE 0x08000000 |
55 | #define LDP_ETHR_START DEBUG_BASE | 56 | #define LDP_ETHR_START DEBUG_BASE |
56 | 57 | ||
57 | static struct resource ldp_smsc911x_resources[] = { | ||
58 | [0] = { | ||
59 | .start = LDP_ETHR_START, | ||
60 | .end = LDP_ETHR_START + SZ_4K, | ||
61 | .flags = IORESOURCE_MEM, | ||
62 | }, | ||
63 | [1] = { | ||
64 | .start = 0, | ||
65 | .end = 0, | ||
66 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | ||
67 | }, | ||
68 | }; | ||
69 | |||
70 | static struct smsc911x_platform_config ldp_smsc911x_config = { | ||
71 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | ||
72 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | ||
73 | .flags = SMSC911X_USE_32BIT, | ||
74 | .phy_interface = PHY_INTERFACE_MODE_MII, | ||
75 | }; | ||
76 | |||
77 | static struct platform_device ldp_smsc911x_device = { | ||
78 | .name = "smsc911x", | ||
79 | .id = -1, | ||
80 | .num_resources = ARRAY_SIZE(ldp_smsc911x_resources), | ||
81 | .resource = ldp_smsc911x_resources, | ||
82 | .dev = { | ||
83 | .platform_data = &ldp_smsc911x_config, | ||
84 | }, | ||
85 | }; | ||
86 | |||
87 | static uint32_t board_keymap[] = { | 58 | static uint32_t board_keymap[] = { |
88 | KEY(0, 0, KEY_1), | 59 | KEY(0, 0, KEY_1), |
89 | KEY(1, 0, KEY_2), | 60 | KEY(1, 0, KEY_2), |
@@ -197,82 +168,16 @@ static struct platform_device ldp_gpio_keys_device = { | |||
197 | }, | 168 | }, |
198 | }; | 169 | }; |
199 | 170 | ||
200 | static int ts_gpio; | 171 | static struct omap_smsc911x_platform_data smsc911x_cfg = { |
201 | 172 | .cs = LDP_SMSC911X_CS, | |
202 | /** | 173 | .gpio_irq = LDP_SMSC911X_GPIO, |
203 | * @brief ads7846_dev_init : Requests & sets GPIO line for pen-irq | 174 | .gpio_reset = -EINVAL, |
204 | * | 175 | .flags = SMSC911X_USE_32BIT, |
205 | * @return - void. If request gpio fails then Flag KERN_ERR. | ||
206 | */ | ||
207 | static void ads7846_dev_init(void) | ||
208 | { | ||
209 | if (gpio_request(ts_gpio, "ads7846 irq") < 0) { | ||
210 | printk(KERN_ERR "can't get ads746 pen down GPIO\n"); | ||
211 | return; | ||
212 | } | ||
213 | |||
214 | gpio_direction_input(ts_gpio); | ||
215 | gpio_set_debounce(ts_gpio, 310); | ||
216 | } | ||
217 | |||
218 | static int ads7846_get_pendown_state(void) | ||
219 | { | ||
220 | return !gpio_get_value(ts_gpio); | ||
221 | } | ||
222 | |||
223 | static struct ads7846_platform_data tsc2046_config __initdata = { | ||
224 | .get_pendown_state = ads7846_get_pendown_state, | ||
225 | .keep_vref_on = 1, | ||
226 | }; | ||
227 | |||
228 | static struct omap2_mcspi_device_config tsc2046_mcspi_config = { | ||
229 | .turbo_mode = 0, | ||
230 | .single_channel = 1, /* 0: slave, 1: master */ | ||
231 | }; | ||
232 | |||
233 | static struct spi_board_info ldp_spi_board_info[] __initdata = { | ||
234 | [0] = { | ||
235 | /* | ||
236 | * TSC2046 operates at a max freqency of 2MHz, so | ||
237 | * operate slightly below at 1.5MHz | ||
238 | */ | ||
239 | .modalias = "ads7846", | ||
240 | .bus_num = 1, | ||
241 | .chip_select = 0, | ||
242 | .max_speed_hz = 1500000, | ||
243 | .controller_data = &tsc2046_mcspi_config, | ||
244 | .irq = 0, | ||
245 | .platform_data = &tsc2046_config, | ||
246 | }, | ||
247 | }; | 176 | }; |
248 | 177 | ||
249 | static inline void __init ldp_init_smsc911x(void) | 178 | static inline void __init ldp_init_smsc911x(void) |
250 | { | 179 | { |
251 | int eth_cs; | 180 | gpmc_smsc911x_init(&smsc911x_cfg); |
252 | unsigned long cs_mem_base; | ||
253 | int eth_gpio = 0; | ||
254 | |||
255 | eth_cs = LDP_SMSC911X_CS; | ||
256 | |||
257 | if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) { | ||
258 | printk(KERN_ERR "Failed to request GPMC mem for smsc911x\n"); | ||
259 | return; | ||
260 | } | ||
261 | |||
262 | ldp_smsc911x_resources[0].start = cs_mem_base + 0x0; | ||
263 | ldp_smsc911x_resources[0].end = cs_mem_base + 0xff; | ||
264 | udelay(100); | ||
265 | |||
266 | eth_gpio = LDP_SMSC911X_GPIO; | ||
267 | |||
268 | ldp_smsc911x_resources[1].start = OMAP_GPIO_IRQ(eth_gpio); | ||
269 | |||
270 | if (gpio_request(eth_gpio, "smsc911x irq") < 0) { | ||
271 | printk(KERN_ERR "Failed to request GPIO%d for smsc911x IRQ\n", | ||
272 | eth_gpio); | ||
273 | return; | ||
274 | } | ||
275 | gpio_direction_input(eth_gpio); | ||
276 | } | 181 | } |
277 | 182 | ||
278 | static struct platform_device ldp_lcd_device = { | 183 | static struct platform_device ldp_lcd_device = { |
@@ -360,19 +265,9 @@ static struct twl4030_platform_data ldp_twldata = { | |||
360 | .keypad = &ldp_kp_twl4030_data, | 265 | .keypad = &ldp_kp_twl4030_data, |
361 | }; | 266 | }; |
362 | 267 | ||
363 | static struct i2c_board_info __initdata ldp_i2c_boardinfo[] = { | ||
364 | { | ||
365 | I2C_BOARD_INFO("twl4030", 0x48), | ||
366 | .flags = I2C_CLIENT_WAKE, | ||
367 | .irq = INT_34XX_SYS_NIRQ, | ||
368 | .platform_data = &ldp_twldata, | ||
369 | }, | ||
370 | }; | ||
371 | |||
372 | static int __init omap_i2c_init(void) | 268 | static int __init omap_i2c_init(void) |
373 | { | 269 | { |
374 | omap_register_i2c_bus(1, 2600, ldp_i2c_boardinfo, | 270 | omap3_pmic_init("twl4030", &ldp_twldata); |
375 | ARRAY_SIZE(ldp_i2c_boardinfo)); | ||
376 | omap_register_i2c_bus(2, 400, NULL, 0); | 271 | omap_register_i2c_bus(2, 400, NULL, 0); |
377 | omap_register_i2c_bus(3, 400, NULL, 0); | 272 | omap_register_i2c_bus(3, 400, NULL, 0); |
378 | return 0; | 273 | return 0; |
@@ -389,7 +284,6 @@ static struct omap2_hsmmc_info mmc[] __initdata = { | |||
389 | }; | 284 | }; |
390 | 285 | ||
391 | static struct platform_device *ldp_devices[] __initdata = { | 286 | static struct platform_device *ldp_devices[] __initdata = { |
392 | &ldp_smsc911x_device, | ||
393 | &ldp_lcd_device, | 287 | &ldp_lcd_device, |
394 | &ldp_gpio_keys_device, | 288 | &ldp_gpio_keys_device, |
395 | }; | 289 | }; |
@@ -400,12 +294,6 @@ static struct omap_board_mux board_mux[] __initdata = { | |||
400 | }; | 294 | }; |
401 | #endif | 295 | #endif |
402 | 296 | ||
403 | static struct omap_musb_board_data musb_board_data = { | ||
404 | .interface_type = MUSB_INTERFACE_ULPI, | ||
405 | .mode = MUSB_OTG, | ||
406 | .power = 100, | ||
407 | }; | ||
408 | |||
409 | static struct mtd_partition ldp_nand_partitions[] = { | 297 | static struct mtd_partition ldp_nand_partitions[] = { |
410 | /* All the partition sizes are listed in terms of NAND block size */ | 298 | /* All the partition sizes are listed in terms of NAND block size */ |
411 | { | 299 | { |
@@ -446,13 +334,9 @@ static void __init omap_ldp_init(void) | |||
446 | ldp_init_smsc911x(); | 334 | ldp_init_smsc911x(); |
447 | omap_i2c_init(); | 335 | omap_i2c_init(); |
448 | platform_add_devices(ldp_devices, ARRAY_SIZE(ldp_devices)); | 336 | platform_add_devices(ldp_devices, ARRAY_SIZE(ldp_devices)); |
449 | ts_gpio = 54; | 337 | omap_ads7846_init(1, 54, 310, NULL); |
450 | ldp_spi_board_info[0].irq = gpio_to_irq(ts_gpio); | ||
451 | spi_register_board_info(ldp_spi_board_info, | ||
452 | ARRAY_SIZE(ldp_spi_board_info)); | ||
453 | ads7846_dev_init(); | ||
454 | omap_serial_init(); | 338 | omap_serial_init(); |
455 | usb_musb_init(&musb_board_data); | 339 | usb_musb_init(NULL); |
456 | board_nand_init(ldp_nand_partitions, | 340 | board_nand_init(ldp_nand_partitions, |
457 | ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0); | 341 | ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0); |
458 | 342 | ||
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index e710cd9e079b..8d74318ed495 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c | |||
@@ -106,14 +106,13 @@ static void __init n8x0_usb_init(void) | |||
106 | static char announce[] __initdata = KERN_INFO "TUSB 6010\n"; | 106 | static char announce[] __initdata = KERN_INFO "TUSB 6010\n"; |
107 | 107 | ||
108 | /* PM companion chip power control pin */ | 108 | /* PM companion chip power control pin */ |
109 | ret = gpio_request(TUSB6010_GPIO_ENABLE, "TUSB6010 enable"); | 109 | ret = gpio_request_one(TUSB6010_GPIO_ENABLE, GPIOF_OUT_INIT_LOW, |
110 | "TUSB6010 enable"); | ||
110 | if (ret != 0) { | 111 | if (ret != 0) { |
111 | printk(KERN_ERR "Could not get TUSB power GPIO%i\n", | 112 | printk(KERN_ERR "Could not get TUSB power GPIO%i\n", |
112 | TUSB6010_GPIO_ENABLE); | 113 | TUSB6010_GPIO_ENABLE); |
113 | return; | 114 | return; |
114 | } | 115 | } |
115 | gpio_direction_output(TUSB6010_GPIO_ENABLE, 0); | ||
116 | |||
117 | tusb_set_power(0); | 116 | tusb_set_power(0); |
118 | 117 | ||
119 | ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2, | 118 | ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2, |
@@ -494,8 +493,12 @@ static struct omap_mmc_platform_data mmc1_data = { | |||
494 | 493 | ||
495 | static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC]; | 494 | static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC]; |
496 | 495 | ||
497 | static void __init n8x0_mmc_init(void) | 496 | static struct gpio n810_emmc_gpios[] __initdata = { |
497 | { N810_EMMC_VSD_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vddf" }, | ||
498 | { N810_EMMC_VIO_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vdd" }, | ||
499 | }; | ||
498 | 500 | ||
501 | static void __init n8x0_mmc_init(void) | ||
499 | { | 502 | { |
500 | int err; | 503 | int err; |
501 | 504 | ||
@@ -512,27 +515,18 @@ static void __init n8x0_mmc_init(void) | |||
512 | mmc1_data.slots[1].ban_openended = 1; | 515 | mmc1_data.slots[1].ban_openended = 1; |
513 | } | 516 | } |
514 | 517 | ||
515 | err = gpio_request(N8X0_SLOT_SWITCH_GPIO, "MMC slot switch"); | 518 | err = gpio_request_one(N8X0_SLOT_SWITCH_GPIO, GPIOF_OUT_INIT_LOW, |
519 | "MMC slot switch"); | ||
516 | if (err) | 520 | if (err) |
517 | return; | 521 | return; |
518 | 522 | ||
519 | gpio_direction_output(N8X0_SLOT_SWITCH_GPIO, 0); | ||
520 | |||
521 | if (machine_is_nokia_n810()) { | 523 | if (machine_is_nokia_n810()) { |
522 | err = gpio_request(N810_EMMC_VSD_GPIO, "MMC slot 2 Vddf"); | 524 | err = gpio_request_array(n810_emmc_gpios, |
523 | if (err) { | 525 | ARRAY_SIZE(n810_emmc_gpios)); |
524 | gpio_free(N8X0_SLOT_SWITCH_GPIO); | ||
525 | return; | ||
526 | } | ||
527 | gpio_direction_output(N810_EMMC_VSD_GPIO, 0); | ||
528 | |||
529 | err = gpio_request(N810_EMMC_VIO_GPIO, "MMC slot 2 Vdd"); | ||
530 | if (err) { | 526 | if (err) { |
531 | gpio_free(N8X0_SLOT_SWITCH_GPIO); | 527 | gpio_free(N8X0_SLOT_SWITCH_GPIO); |
532 | gpio_free(N810_EMMC_VSD_GPIO); | ||
533 | return; | 528 | return; |
534 | } | 529 | } |
535 | gpio_direction_output(N810_EMMC_VIO_GPIO, 0); | ||
536 | } | 530 | } |
537 | 531 | ||
538 | mmc_data[0] = &mmc1_data; | 532 | mmc_data[0] = &mmc1_data; |
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 97750d483a70..be71426359f2 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c | |||
@@ -52,6 +52,7 @@ | |||
52 | #include "hsmmc.h" | 52 | #include "hsmmc.h" |
53 | #include "timer-gp.h" | 53 | #include "timer-gp.h" |
54 | #include "pm.h" | 54 | #include "pm.h" |
55 | #include "common-board-devices.h" | ||
55 | 56 | ||
56 | #define NAND_BLOCK_SIZE SZ_128K | 57 | #define NAND_BLOCK_SIZE SZ_128K |
57 | 58 | ||
@@ -79,6 +80,12 @@ static u8 omap3_beagle_get_rev(void) | |||
79 | return omap3_beagle_version; | 80 | return omap3_beagle_version; |
80 | } | 81 | } |
81 | 82 | ||
83 | static struct gpio omap3_beagle_rev_gpios[] __initdata = { | ||
84 | { 171, GPIOF_IN, "rev_id_0" }, | ||
85 | { 172, GPIOF_IN, "rev_id_1" }, | ||
86 | { 173, GPIOF_IN, "rev_id_2" }, | ||
87 | }; | ||
88 | |||
82 | static void __init omap3_beagle_init_rev(void) | 89 | static void __init omap3_beagle_init_rev(void) |
83 | { | 90 | { |
84 | int ret; | 91 | int ret; |
@@ -88,21 +95,13 @@ static void __init omap3_beagle_init_rev(void) | |||
88 | omap_mux_init_gpio(172, OMAP_PIN_INPUT_PULLUP); | 95 | omap_mux_init_gpio(172, OMAP_PIN_INPUT_PULLUP); |
89 | omap_mux_init_gpio(173, OMAP_PIN_INPUT_PULLUP); | 96 | omap_mux_init_gpio(173, OMAP_PIN_INPUT_PULLUP); |
90 | 97 | ||
91 | ret = gpio_request(171, "rev_id_0"); | 98 | ret = gpio_request_array(omap3_beagle_rev_gpios, |
92 | if (ret < 0) | 99 | ARRAY_SIZE(omap3_beagle_rev_gpios)); |
93 | goto fail0; | 100 | if (ret < 0) { |
94 | 101 | printk(KERN_ERR "Unable to get revision detection GPIO pins\n"); | |
95 | ret = gpio_request(172, "rev_id_1"); | 102 | omap3_beagle_version = OMAP3BEAGLE_BOARD_UNKN; |
96 | if (ret < 0) | 103 | return; |
97 | goto fail1; | 104 | } |
98 | |||
99 | ret = gpio_request(173, "rev_id_2"); | ||
100 | if (ret < 0) | ||
101 | goto fail2; | ||
102 | |||
103 | gpio_direction_input(171); | ||
104 | gpio_direction_input(172); | ||
105 | gpio_direction_input(173); | ||
106 | 105 | ||
107 | beagle_rev = gpio_get_value(171) | (gpio_get_value(172) << 1) | 106 | beagle_rev = gpio_get_value(171) | (gpio_get_value(172) << 1) |
108 | | (gpio_get_value(173) << 2); | 107 | | (gpio_get_value(173) << 2); |
@@ -128,18 +127,6 @@ static void __init omap3_beagle_init_rev(void) | |||
128 | printk(KERN_INFO "OMAP3 Beagle Rev: unknown %hd\n", beagle_rev); | 127 | printk(KERN_INFO "OMAP3 Beagle Rev: unknown %hd\n", beagle_rev); |
129 | omap3_beagle_version = OMAP3BEAGLE_BOARD_UNKN; | 128 | omap3_beagle_version = OMAP3BEAGLE_BOARD_UNKN; |
130 | } | 129 | } |
131 | |||
132 | return; | ||
133 | |||
134 | fail2: | ||
135 | gpio_free(172); | ||
136 | fail1: | ||
137 | gpio_free(171); | ||
138 | fail0: | ||
139 | printk(KERN_ERR "Unable to get revision detection GPIO pins\n"); | ||
140 | omap3_beagle_version = OMAP3BEAGLE_BOARD_UNKN; | ||
141 | |||
142 | return; | ||
143 | } | 130 | } |
144 | 131 | ||
145 | static struct mtd_partition omap3beagle_nand_partitions[] = { | 132 | static struct mtd_partition omap3beagle_nand_partitions[] = { |
@@ -173,15 +160,6 @@ static struct mtd_partition omap3beagle_nand_partitions[] = { | |||
173 | }, | 160 | }, |
174 | }; | 161 | }; |
175 | 162 | ||
176 | static struct omap_nand_platform_data omap3beagle_nand_data = { | ||
177 | .options = NAND_BUSWIDTH_16, | ||
178 | .parts = omap3beagle_nand_partitions, | ||
179 | .nr_parts = ARRAY_SIZE(omap3beagle_nand_partitions), | ||
180 | .dma_channel = -1, /* disable DMA in OMAP NAND driver */ | ||
181 | .nand_setup = NULL, | ||
182 | .dev_ready = NULL, | ||
183 | }; | ||
184 | |||
185 | /* DSS */ | 163 | /* DSS */ |
186 | 164 | ||
187 | static int beagle_enable_dvi(struct omap_dss_device *dssdev) | 165 | static int beagle_enable_dvi(struct omap_dss_device *dssdev) |
@@ -243,13 +221,10 @@ static void __init beagle_display_init(void) | |||
243 | { | 221 | { |
244 | int r; | 222 | int r; |
245 | 223 | ||
246 | r = gpio_request(beagle_dvi_device.reset_gpio, "DVI reset"); | 224 | r = gpio_request_one(beagle_dvi_device.reset_gpio, GPIOF_OUT_INIT_LOW, |
247 | if (r < 0) { | 225 | "DVI reset"); |
226 | if (r < 0) | ||
248 | printk(KERN_ERR "Unable to get DVI reset GPIO\n"); | 227 | printk(KERN_ERR "Unable to get DVI reset GPIO\n"); |
249 | return; | ||
250 | } | ||
251 | |||
252 | gpio_direction_output(beagle_dvi_device.reset_gpio, 0); | ||
253 | } | 228 | } |
254 | 229 | ||
255 | #include "sdram-micron-mt46h32m32lf-6.h" | 230 | #include "sdram-micron-mt46h32m32lf-6.h" |
@@ -276,7 +251,7 @@ static struct gpio_led gpio_leds[]; | |||
276 | static int beagle_twl_gpio_setup(struct device *dev, | 251 | static int beagle_twl_gpio_setup(struct device *dev, |
277 | unsigned gpio, unsigned ngpio) | 252 | unsigned gpio, unsigned ngpio) |
278 | { | 253 | { |
279 | int r; | 254 | int r, usb_pwr_level; |
280 | 255 | ||
281 | if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { | 256 | if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { |
282 | mmc[0].gpio_wp = -EINVAL; | 257 | mmc[0].gpio_wp = -EINVAL; |
@@ -295,66 +270,46 @@ static int beagle_twl_gpio_setup(struct device *dev, | |||
295 | beagle_vmmc1_supply.dev = mmc[0].dev; | 270 | beagle_vmmc1_supply.dev = mmc[0].dev; |
296 | beagle_vsim_supply.dev = mmc[0].dev; | 271 | beagle_vsim_supply.dev = mmc[0].dev; |
297 | 272 | ||
298 | /* REVISIT: need ehci-omap hooks for external VBUS | ||
299 | * power switch and overcurrent detect | ||
300 | */ | ||
301 | if (omap3_beagle_get_rev() != OMAP3BEAGLE_BOARD_XM) { | ||
302 | r = gpio_request(gpio + 1, "EHCI_nOC"); | ||
303 | if (!r) { | ||
304 | r = gpio_direction_input(gpio + 1); | ||
305 | if (r) | ||
306 | gpio_free(gpio + 1); | ||
307 | } | ||
308 | if (r) | ||
309 | pr_err("%s: unable to configure EHCI_nOC\n", __func__); | ||
310 | } | ||
311 | |||
312 | /* | 273 | /* |
313 | * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active | 274 | * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active |
314 | * high / others active low) | 275 | * high / others active low) |
315 | */ | 276 | * DVI reset GPIO is different between beagle revisions |
316 | gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR"); | ||
317 | if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) | ||
318 | gpio_direction_output(gpio + TWL4030_GPIO_MAX, 1); | ||
319 | else | ||
320 | gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0); | ||
321 | |||
322 | /* DVI reset GPIO is different between beagle revisions */ | ||
323 | if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) | ||
324 | beagle_dvi_device.reset_gpio = 129; | ||
325 | else | ||
326 | beagle_dvi_device.reset_gpio = 170; | ||
327 | |||
328 | /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ | ||
329 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; | ||
330 | |||
331 | /* | ||
332 | * gpio + 1 on Xm controls the TFP410's enable line (active low) | ||
333 | * gpio + 2 control varies depending on the board rev as follows: | ||
334 | * P7/P8 revisions(prototype): Camera EN | ||
335 | * A2+ revisions (production): LDO (supplies DVI, serial, led blocks) | ||
336 | */ | 277 | */ |
337 | if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { | 278 | if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { |
338 | r = gpio_request(gpio + 1, "nDVI_PWR_EN"); | 279 | usb_pwr_level = GPIOF_OUT_INIT_HIGH; |
339 | if (!r) { | 280 | beagle_dvi_device.reset_gpio = 129; |
340 | r = gpio_direction_output(gpio + 1, 0); | 281 | /* |
341 | if (r) | 282 | * gpio + 1 on Xm controls the TFP410's enable line (active low) |
342 | gpio_free(gpio + 1); | 283 | * gpio + 2 control varies depending on the board rev as below: |
343 | } | 284 | * P7/P8 revisions(prototype): Camera EN |
285 | * A2+ revisions (production): LDO (DVI, serial, led blocks) | ||
286 | */ | ||
287 | r = gpio_request_one(gpio + 1, GPIOF_OUT_INIT_LOW, | ||
288 | "nDVI_PWR_EN"); | ||
344 | if (r) | 289 | if (r) |
345 | pr_err("%s: unable to configure nDVI_PWR_EN\n", | 290 | pr_err("%s: unable to configure nDVI_PWR_EN\n", |
346 | __func__); | 291 | __func__); |
347 | r = gpio_request(gpio + 2, "DVI_LDO_EN"); | 292 | r = gpio_request_one(gpio + 2, GPIOF_OUT_INIT_HIGH, |
348 | if (!r) { | 293 | "DVI_LDO_EN"); |
349 | r = gpio_direction_output(gpio + 2, 1); | ||
350 | if (r) | ||
351 | gpio_free(gpio + 2); | ||
352 | } | ||
353 | if (r) | 294 | if (r) |
354 | pr_err("%s: unable to configure DVI_LDO_EN\n", | 295 | pr_err("%s: unable to configure DVI_LDO_EN\n", |
355 | __func__); | 296 | __func__); |
297 | } else { | ||
298 | usb_pwr_level = GPIOF_OUT_INIT_LOW; | ||
299 | beagle_dvi_device.reset_gpio = 170; | ||
300 | /* | ||
301 | * REVISIT: need ehci-omap hooks for external VBUS | ||
302 | * power switch and overcurrent detect | ||
303 | */ | ||
304 | if (gpio_request_one(gpio + 1, GPIOF_IN, "EHCI_nOC")) | ||
305 | pr_err("%s: unable to configure EHCI_nOC\n", __func__); | ||
356 | } | 306 | } |
357 | 307 | ||
308 | gpio_request_one(gpio + TWL4030_GPIO_MAX, usb_pwr_level, "nEN_USB_PWR"); | ||
309 | |||
310 | /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ | ||
311 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; | ||
312 | |||
358 | return 0; | 313 | return 0; |
359 | } | 314 | } |
360 | 315 | ||
@@ -453,15 +408,6 @@ static struct twl4030_platform_data beagle_twldata = { | |||
453 | .vpll2 = &beagle_vpll2, | 408 | .vpll2 = &beagle_vpll2, |
454 | }; | 409 | }; |
455 | 410 | ||
456 | static struct i2c_board_info __initdata beagle_i2c_boardinfo[] = { | ||
457 | { | ||
458 | I2C_BOARD_INFO("twl4030", 0x48), | ||
459 | .flags = I2C_CLIENT_WAKE, | ||
460 | .irq = INT_34XX_SYS_NIRQ, | ||
461 | .platform_data = &beagle_twldata, | ||
462 | }, | ||
463 | }; | ||
464 | |||
465 | static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { | 411 | static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { |
466 | { | 412 | { |
467 | I2C_BOARD_INFO("eeprom", 0x50), | 413 | I2C_BOARD_INFO("eeprom", 0x50), |
@@ -470,8 +416,7 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { | |||
470 | 416 | ||
471 | static int __init omap3_beagle_i2c_init(void) | 417 | static int __init omap3_beagle_i2c_init(void) |
472 | { | 418 | { |
473 | omap_register_i2c_bus(1, 2600, beagle_i2c_boardinfo, | 419 | omap3_pmic_init("twl4030", &beagle_twldata); |
474 | ARRAY_SIZE(beagle_i2c_boardinfo)); | ||
475 | /* Bus 3 is attached to the DVI port where devices like the pico DLP | 420 | /* Bus 3 is attached to the DVI port where devices like the pico DLP |
476 | * projector don't work reliably with 400kHz */ | 421 | * projector don't work reliably with 400kHz */ |
477 | omap_register_i2c_bus(3, 100, beagle_i2c_eeprom, ARRAY_SIZE(beagle_i2c_eeprom)); | 422 | omap_register_i2c_bus(3, 100, beagle_i2c_eeprom, ARRAY_SIZE(beagle_i2c_eeprom)); |
@@ -551,39 +496,6 @@ static struct platform_device *omap3_beagle_devices[] __initdata = { | |||
551 | &keys_gpio, | 496 | &keys_gpio, |
552 | }; | 497 | }; |
553 | 498 | ||
554 | static void __init omap3beagle_flash_init(void) | ||
555 | { | ||
556 | u8 cs = 0; | ||
557 | u8 nandcs = GPMC_CS_NUM + 1; | ||
558 | |||
559 | /* find out the chip-select on which NAND exists */ | ||
560 | while (cs < GPMC_CS_NUM) { | ||
561 | u32 ret = 0; | ||
562 | ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); | ||
563 | |||
564 | if ((ret & 0xC00) == 0x800) { | ||
565 | printk(KERN_INFO "Found NAND on CS%d\n", cs); | ||
566 | if (nandcs > GPMC_CS_NUM) | ||
567 | nandcs = cs; | ||
568 | } | ||
569 | cs++; | ||
570 | } | ||
571 | |||
572 | if (nandcs > GPMC_CS_NUM) { | ||
573 | printk(KERN_INFO "NAND: Unable to find configuration " | ||
574 | "in GPMC\n "); | ||
575 | return; | ||
576 | } | ||
577 | |||
578 | if (nandcs < GPMC_CS_NUM) { | ||
579 | omap3beagle_nand_data.cs = nandcs; | ||
580 | |||
581 | printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); | ||
582 | if (gpmc_nand_init(&omap3beagle_nand_data) < 0) | ||
583 | printk(KERN_ERR "Unable to register NAND device\n"); | ||
584 | } | ||
585 | } | ||
586 | |||
587 | static const struct usbhs_omap_board_data usbhs_bdata __initconst = { | 499 | static const struct usbhs_omap_board_data usbhs_bdata __initconst = { |
588 | 500 | ||
589 | .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, | 501 | .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, |
@@ -602,12 +514,6 @@ static struct omap_board_mux board_mux[] __initdata = { | |||
602 | }; | 514 | }; |
603 | #endif | 515 | #endif |
604 | 516 | ||
605 | static struct omap_musb_board_data musb_board_data = { | ||
606 | .interface_type = MUSB_INTERFACE_ULPI, | ||
607 | .mode = MUSB_OTG, | ||
608 | .power = 100, | ||
609 | }; | ||
610 | |||
611 | static void __init beagle_opp_init(void) | 517 | static void __init beagle_opp_init(void) |
612 | { | 518 | { |
613 | int r = 0; | 519 | int r = 0; |
@@ -665,13 +571,13 @@ static void __init omap3_beagle_init(void) | |||
665 | omap_serial_init(); | 571 | omap_serial_init(); |
666 | 572 | ||
667 | omap_mux_init_gpio(170, OMAP_PIN_INPUT); | 573 | omap_mux_init_gpio(170, OMAP_PIN_INPUT); |
668 | gpio_request(170, "DVI_nPD"); | ||
669 | /* REVISIT leave DVI powered down until it's needed ... */ | 574 | /* REVISIT leave DVI powered down until it's needed ... */ |
670 | gpio_direction_output(170, true); | 575 | gpio_request_one(170, GPIOF_OUT_INIT_HIGH, "DVI_nPD"); |
671 | 576 | ||
672 | usb_musb_init(&musb_board_data); | 577 | usb_musb_init(NULL); |
673 | usbhs_init(&usbhs_bdata); | 578 | usbhs_init(&usbhs_bdata); |
674 | omap3beagle_flash_init(); | 579 | omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions, |
580 | ARRAY_SIZE(omap3beagle_nand_partitions)); | ||
675 | 581 | ||
676 | /* Ensure SDRC pins are mux'd for self-refresh */ | 582 | /* Ensure SDRC pins are mux'd for self-refresh */ |
677 | omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); | 583 | omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); |
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 7f94cccdb076..b4d43464a303 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c | |||
@@ -50,6 +50,7 @@ | |||
50 | #include "mux.h" | 50 | #include "mux.h" |
51 | #include "sdram-micron-mt46h32m32lf-6.h" | 51 | #include "sdram-micron-mt46h32m32lf-6.h" |
52 | #include "hsmmc.h" | 52 | #include "hsmmc.h" |
53 | #include "common-board-devices.h" | ||
53 | 54 | ||
54 | #define OMAP3_EVM_TS_GPIO 175 | 55 | #define OMAP3_EVM_TS_GPIO 175 |
55 | #define OMAP3_EVM_EHCI_VBUS 22 | 56 | #define OMAP3_EVM_EHCI_VBUS 22 |
@@ -101,49 +102,20 @@ static void __init omap3_evm_get_revision(void) | |||
101 | } | 102 | } |
102 | 103 | ||
103 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) | 104 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) |
104 | static struct resource omap3evm_smsc911x_resources[] = { | 105 | #include <plat/gpmc-smsc911x.h> |
105 | [0] = { | ||
106 | .start = OMAP3EVM_ETHR_START, | ||
107 | .end = (OMAP3EVM_ETHR_START + OMAP3EVM_ETHR_SIZE - 1), | ||
108 | .flags = IORESOURCE_MEM, | ||
109 | }, | ||
110 | [1] = { | ||
111 | .start = OMAP_GPIO_IRQ(OMAP3EVM_ETHR_GPIO_IRQ), | ||
112 | .end = OMAP_GPIO_IRQ(OMAP3EVM_ETHR_GPIO_IRQ), | ||
113 | .flags = (IORESOURCE_IRQ | IRQF_TRIGGER_LOW), | ||
114 | }, | ||
115 | }; | ||
116 | 106 | ||
117 | static struct smsc911x_platform_config smsc911x_config = { | 107 | static struct omap_smsc911x_platform_data smsc911x_cfg = { |
118 | .phy_interface = PHY_INTERFACE_MODE_MII, | 108 | .cs = OMAP3EVM_SMSC911X_CS, |
119 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | 109 | .gpio_irq = OMAP3EVM_ETHR_GPIO_IRQ, |
120 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | 110 | .gpio_reset = -EINVAL, |
121 | .flags = (SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS), | 111 | .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS, |
122 | }; | ||
123 | |||
124 | static struct platform_device omap3evm_smsc911x_device = { | ||
125 | .name = "smsc911x", | ||
126 | .id = -1, | ||
127 | .num_resources = ARRAY_SIZE(omap3evm_smsc911x_resources), | ||
128 | .resource = &omap3evm_smsc911x_resources[0], | ||
129 | .dev = { | ||
130 | .platform_data = &smsc911x_config, | ||
131 | }, | ||
132 | }; | 112 | }; |
133 | 113 | ||
134 | static inline void __init omap3evm_init_smsc911x(void) | 114 | static inline void __init omap3evm_init_smsc911x(void) |
135 | { | 115 | { |
136 | int eth_cs, eth_rst; | ||
137 | struct clk *l3ck; | 116 | struct clk *l3ck; |
138 | unsigned int rate; | 117 | unsigned int rate; |
139 | 118 | ||
140 | if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) | ||
141 | eth_rst = OMAP3EVM_GEN1_ETHR_GPIO_RST; | ||
142 | else | ||
143 | eth_rst = OMAP3EVM_GEN2_ETHR_GPIO_RST; | ||
144 | |||
145 | eth_cs = OMAP3EVM_SMSC911X_CS; | ||
146 | |||
147 | l3ck = clk_get(NULL, "l3_ck"); | 119 | l3ck = clk_get(NULL, "l3_ck"); |
148 | if (IS_ERR(l3ck)) | 120 | if (IS_ERR(l3ck)) |
149 | rate = 100000000; | 121 | rate = 100000000; |
@@ -152,33 +124,13 @@ static inline void __init omap3evm_init_smsc911x(void) | |||
152 | 124 | ||
153 | /* Configure ethernet controller reset gpio */ | 125 | /* Configure ethernet controller reset gpio */ |
154 | if (cpu_is_omap3430()) { | 126 | if (cpu_is_omap3430()) { |
155 | if (gpio_request(eth_rst, "SMSC911x gpio") < 0) { | 127 | if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) |
156 | pr_err(KERN_ERR "Failed to request %d for smsc911x\n", | 128 | smsc911x_cfg.gpio_reset = OMAP3EVM_GEN1_ETHR_GPIO_RST; |
157 | eth_rst); | 129 | else |
158 | return; | 130 | smsc911x_cfg.gpio_reset = OMAP3EVM_GEN2_ETHR_GPIO_RST; |
159 | } | ||
160 | |||
161 | if (gpio_direction_output(eth_rst, 1) < 0) { | ||
162 | pr_err(KERN_ERR "Failed to set direction of %d for" \ | ||
163 | " smsc911x\n", eth_rst); | ||
164 | return; | ||
165 | } | ||
166 | /* reset pulse to ethernet controller*/ | ||
167 | usleep_range(150, 220); | ||
168 | gpio_set_value(eth_rst, 0); | ||
169 | usleep_range(150, 220); | ||
170 | gpio_set_value(eth_rst, 1); | ||
171 | usleep_range(1, 2); | ||
172 | } | ||
173 | |||
174 | if (gpio_request(OMAP3EVM_ETHR_GPIO_IRQ, "SMSC911x irq") < 0) { | ||
175 | printk(KERN_ERR "Failed to request GPIO%d for smsc911x IRQ\n", | ||
176 | OMAP3EVM_ETHR_GPIO_IRQ); | ||
177 | return; | ||
178 | } | 131 | } |
179 | 132 | ||
180 | gpio_direction_input(OMAP3EVM_ETHR_GPIO_IRQ); | 133 | gpmc_smsc911x_init(&smsc911x_cfg); |
181 | platform_device_register(&omap3evm_smsc911x_device); | ||
182 | } | 134 | } |
183 | 135 | ||
184 | #else | 136 | #else |
@@ -197,6 +149,15 @@ static inline void __init omap3evm_init_smsc911x(void) { return; } | |||
197 | #define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210 | 149 | #define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210 |
198 | #define OMAP3EVM_DVI_PANEL_EN_GPIO 199 | 150 | #define OMAP3EVM_DVI_PANEL_EN_GPIO 199 |
199 | 151 | ||
152 | static struct gpio omap3_evm_dss_gpios[] __initdata = { | ||
153 | { OMAP3EVM_LCD_PANEL_RESB, GPIOF_OUT_INIT_HIGH, "lcd_panel_resb" }, | ||
154 | { OMAP3EVM_LCD_PANEL_INI, GPIOF_OUT_INIT_HIGH, "lcd_panel_ini" }, | ||
155 | { OMAP3EVM_LCD_PANEL_QVGA, GPIOF_OUT_INIT_LOW, "lcd_panel_qvga" }, | ||
156 | { OMAP3EVM_LCD_PANEL_LR, GPIOF_OUT_INIT_HIGH, "lcd_panel_lr" }, | ||
157 | { OMAP3EVM_LCD_PANEL_UD, GPIOF_OUT_INIT_HIGH, "lcd_panel_ud" }, | ||
158 | { OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW, "lcd_panel_envdd" }, | ||
159 | }; | ||
160 | |||
200 | static int lcd_enabled; | 161 | static int lcd_enabled; |
201 | static int dvi_enabled; | 162 | static int dvi_enabled; |
202 | 163 | ||
@@ -204,61 +165,10 @@ static void __init omap3_evm_display_init(void) | |||
204 | { | 165 | { |
205 | int r; | 166 | int r; |
206 | 167 | ||
207 | r = gpio_request(OMAP3EVM_LCD_PANEL_RESB, "lcd_panel_resb"); | 168 | r = gpio_request_array(omap3_evm_dss_gpios, |
208 | if (r) { | 169 | ARRAY_SIZE(omap3_evm_dss_gpios)); |
209 | printk(KERN_ERR "failed to get lcd_panel_resb\n"); | 170 | if (r) |
210 | return; | 171 | printk(KERN_ERR "failed to get lcd_panel_* gpios\n"); |
211 | } | ||
212 | gpio_direction_output(OMAP3EVM_LCD_PANEL_RESB, 1); | ||
213 | |||
214 | r = gpio_request(OMAP3EVM_LCD_PANEL_INI, "lcd_panel_ini"); | ||
215 | if (r) { | ||
216 | printk(KERN_ERR "failed to get lcd_panel_ini\n"); | ||
217 | goto err_1; | ||
218 | } | ||
219 | gpio_direction_output(OMAP3EVM_LCD_PANEL_INI, 1); | ||
220 | |||
221 | r = gpio_request(OMAP3EVM_LCD_PANEL_QVGA, "lcd_panel_qvga"); | ||
222 | if (r) { | ||
223 | printk(KERN_ERR "failed to get lcd_panel_qvga\n"); | ||
224 | goto err_2; | ||
225 | } | ||
226 | gpio_direction_output(OMAP3EVM_LCD_PANEL_QVGA, 0); | ||
227 | |||
228 | r = gpio_request(OMAP3EVM_LCD_PANEL_LR, "lcd_panel_lr"); | ||
229 | if (r) { | ||
230 | printk(KERN_ERR "failed to get lcd_panel_lr\n"); | ||
231 | goto err_3; | ||
232 | } | ||
233 | gpio_direction_output(OMAP3EVM_LCD_PANEL_LR, 1); | ||
234 | |||
235 | r = gpio_request(OMAP3EVM_LCD_PANEL_UD, "lcd_panel_ud"); | ||
236 | if (r) { | ||
237 | printk(KERN_ERR "failed to get lcd_panel_ud\n"); | ||
238 | goto err_4; | ||
239 | } | ||
240 | gpio_direction_output(OMAP3EVM_LCD_PANEL_UD, 1); | ||
241 | |||
242 | r = gpio_request(OMAP3EVM_LCD_PANEL_ENVDD, "lcd_panel_envdd"); | ||
243 | if (r) { | ||
244 | printk(KERN_ERR "failed to get lcd_panel_envdd\n"); | ||
245 | goto err_5; | ||
246 | } | ||
247 | gpio_direction_output(OMAP3EVM_LCD_PANEL_ENVDD, 0); | ||
248 | |||
249 | return; | ||
250 | |||
251 | err_5: | ||
252 | gpio_free(OMAP3EVM_LCD_PANEL_UD); | ||
253 | err_4: | ||
254 | gpio_free(OMAP3EVM_LCD_PANEL_LR); | ||
255 | err_3: | ||
256 | gpio_free(OMAP3EVM_LCD_PANEL_QVGA); | ||
257 | err_2: | ||
258 | gpio_free(OMAP3EVM_LCD_PANEL_INI); | ||
259 | err_1: | ||
260 | gpio_free(OMAP3EVM_LCD_PANEL_RESB); | ||
261 | |||
262 | } | 172 | } |
263 | 173 | ||
264 | static int omap3_evm_enable_lcd(struct omap_dss_device *dssdev) | 174 | static int omap3_evm_enable_lcd(struct omap_dss_device *dssdev) |
@@ -448,7 +358,7 @@ static struct platform_device leds_gpio = { | |||
448 | static int omap3evm_twl_gpio_setup(struct device *dev, | 358 | static int omap3evm_twl_gpio_setup(struct device *dev, |
449 | unsigned gpio, unsigned ngpio) | 359 | unsigned gpio, unsigned ngpio) |
450 | { | 360 | { |
451 | int r; | 361 | int r, lcd_bl_en; |
452 | 362 | ||
453 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | 363 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ |
454 | omap_mux_init_gpio(63, OMAP_PIN_INPUT); | 364 | omap_mux_init_gpio(63, OMAP_PIN_INPUT); |
@@ -465,16 +375,14 @@ static int omap3evm_twl_gpio_setup(struct device *dev, | |||
465 | */ | 375 | */ |
466 | 376 | ||
467 | /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */ | 377 | /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */ |
468 | r = gpio_request(gpio + TWL4030_GPIO_MAX, "EN_LCD_BKL"); | 378 | lcd_bl_en = get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2 ? |
469 | if (!r) | 379 | GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW; |
470 | r = gpio_direction_output(gpio + TWL4030_GPIO_MAX, | 380 | r = gpio_request_one(gpio + TWL4030_GPIO_MAX, lcd_bl_en, "EN_LCD_BKL"); |
471 | (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) ? 1 : 0); | ||
472 | if (r) | 381 | if (r) |
473 | printk(KERN_ERR "failed to get/set lcd_bkl gpio\n"); | 382 | printk(KERN_ERR "failed to get/set lcd_bkl gpio\n"); |
474 | 383 | ||
475 | /* gpio + 7 == DVI Enable */ | 384 | /* gpio + 7 == DVI Enable */ |
476 | gpio_request(gpio + 7, "EN_DVI"); | 385 | gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI"); |
477 | gpio_direction_output(gpio + 7, 0); | ||
478 | 386 | ||
479 | /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */ | 387 | /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */ |
480 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; | 388 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; |
@@ -652,78 +560,18 @@ static struct twl4030_platform_data omap3evm_twldata = { | |||
652 | .vdac = &omap3_evm_vdac, | 560 | .vdac = &omap3_evm_vdac, |
653 | .vpll2 = &omap3_evm_vpll2, | 561 | .vpll2 = &omap3_evm_vpll2, |
654 | .vio = &omap3evm_vio, | 562 | .vio = &omap3evm_vio, |
655 | }; | 563 | .vmmc1 = &omap3evm_vmmc1, |
656 | 564 | .vsim = &omap3evm_vsim, | |
657 | static struct i2c_board_info __initdata omap3evm_i2c_boardinfo[] = { | ||
658 | { | ||
659 | I2C_BOARD_INFO("twl4030", 0x48), | ||
660 | .flags = I2C_CLIENT_WAKE, | ||
661 | .irq = INT_34XX_SYS_NIRQ, | ||
662 | .platform_data = &omap3evm_twldata, | ||
663 | }, | ||
664 | }; | 565 | }; |
665 | 566 | ||
666 | static int __init omap3_evm_i2c_init(void) | 567 | static int __init omap3_evm_i2c_init(void) |
667 | { | 568 | { |
668 | /* | 569 | omap3_pmic_init("twl4030", &omap3evm_twldata); |
669 | * REVISIT: These entries can be set in omap3evm_twl_data | ||
670 | * after a merge with MFD tree | ||
671 | */ | ||
672 | omap3evm_twldata.vmmc1 = &omap3evm_vmmc1; | ||
673 | omap3evm_twldata.vsim = &omap3evm_vsim; | ||
674 | |||
675 | omap_register_i2c_bus(1, 2600, omap3evm_i2c_boardinfo, | ||
676 | ARRAY_SIZE(omap3evm_i2c_boardinfo)); | ||
677 | omap_register_i2c_bus(2, 400, NULL, 0); | 570 | omap_register_i2c_bus(2, 400, NULL, 0); |
678 | omap_register_i2c_bus(3, 400, NULL, 0); | 571 | omap_register_i2c_bus(3, 400, NULL, 0); |
679 | return 0; | 572 | return 0; |
680 | } | 573 | } |
681 | 574 | ||
682 | static void ads7846_dev_init(void) | ||
683 | { | ||
684 | if (gpio_request(OMAP3_EVM_TS_GPIO, "ADS7846 pendown") < 0) | ||
685 | printk(KERN_ERR "can't get ads7846 pen down GPIO\n"); | ||
686 | |||
687 | gpio_direction_input(OMAP3_EVM_TS_GPIO); | ||
688 | gpio_set_debounce(OMAP3_EVM_TS_GPIO, 310); | ||
689 | } | ||
690 | |||
691 | static int ads7846_get_pendown_state(void) | ||
692 | { | ||
693 | return !gpio_get_value(OMAP3_EVM_TS_GPIO); | ||
694 | } | ||
695 | |||
696 | static struct ads7846_platform_data ads7846_config = { | ||
697 | .x_max = 0x0fff, | ||
698 | .y_max = 0x0fff, | ||
699 | .x_plate_ohms = 180, | ||
700 | .pressure_max = 255, | ||
701 | .debounce_max = 10, | ||
702 | .debounce_tol = 3, | ||
703 | .debounce_rep = 1, | ||
704 | .get_pendown_state = ads7846_get_pendown_state, | ||
705 | .keep_vref_on = 1, | ||
706 | .settle_delay_usecs = 150, | ||
707 | .wakeup = true, | ||
708 | }; | ||
709 | |||
710 | static struct omap2_mcspi_device_config ads7846_mcspi_config = { | ||
711 | .turbo_mode = 0, | ||
712 | .single_channel = 1, /* 0: slave, 1: master */ | ||
713 | }; | ||
714 | |||
715 | static struct spi_board_info omap3evm_spi_board_info[] = { | ||
716 | [0] = { | ||
717 | .modalias = "ads7846", | ||
718 | .bus_num = 1, | ||
719 | .chip_select = 0, | ||
720 | .max_speed_hz = 1500000, | ||
721 | .controller_data = &ads7846_mcspi_config, | ||
722 | .irq = OMAP_GPIO_IRQ(OMAP3_EVM_TS_GPIO), | ||
723 | .platform_data = &ads7846_config, | ||
724 | }, | ||
725 | }; | ||
726 | |||
727 | static struct omap_board_config_kernel omap3_evm_config[] __initdata = { | 575 | static struct omap_board_config_kernel omap3_evm_config[] __initdata = { |
728 | }; | 576 | }; |
729 | 577 | ||
@@ -825,6 +673,11 @@ static struct omap_musb_board_data musb_board_data = { | |||
825 | .power = 100, | 673 | .power = 100, |
826 | }; | 674 | }; |
827 | 675 | ||
676 | static struct gpio omap3_evm_ehci_gpios[] __initdata = { | ||
677 | { OMAP3_EVM_EHCI_VBUS, GPIOF_OUT_INIT_HIGH, "enable EHCI VBUS" }, | ||
678 | { OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" }, | ||
679 | }; | ||
680 | |||
828 | static void __init omap3_evm_init(void) | 681 | static void __init omap3_evm_init(void) |
829 | { | 682 | { |
830 | omap3_evm_get_revision(); | 683 | omap3_evm_get_revision(); |
@@ -841,9 +694,6 @@ static void __init omap3_evm_init(void) | |||
841 | 694 | ||
842 | omap_display_init(&omap3_evm_dss_data); | 695 | omap_display_init(&omap3_evm_dss_data); |
843 | 696 | ||
844 | spi_register_board_info(omap3evm_spi_board_info, | ||
845 | ARRAY_SIZE(omap3evm_spi_board_info)); | ||
846 | |||
847 | omap_serial_init(); | 697 | omap_serial_init(); |
848 | 698 | ||
849 | /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */ | 699 | /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */ |
@@ -851,16 +701,12 @@ static void __init omap3_evm_init(void) | |||
851 | 701 | ||
852 | if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) { | 702 | if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) { |
853 | /* enable EHCI VBUS using GPIO22 */ | 703 | /* enable EHCI VBUS using GPIO22 */ |
854 | omap_mux_init_gpio(22, OMAP_PIN_INPUT_PULLUP); | 704 | omap_mux_init_gpio(OMAP3_EVM_EHCI_VBUS, OMAP_PIN_INPUT_PULLUP); |
855 | gpio_request(OMAP3_EVM_EHCI_VBUS, "enable EHCI VBUS"); | ||
856 | gpio_direction_output(OMAP3_EVM_EHCI_VBUS, 0); | ||
857 | gpio_set_value(OMAP3_EVM_EHCI_VBUS, 1); | ||
858 | |||
859 | /* Select EHCI port on main board */ | 705 | /* Select EHCI port on main board */ |
860 | omap_mux_init_gpio(61, OMAP_PIN_INPUT_PULLUP); | 706 | omap_mux_init_gpio(OMAP3_EVM_EHCI_SELECT, |
861 | gpio_request(OMAP3_EVM_EHCI_SELECT, "select EHCI port"); | 707 | OMAP_PIN_INPUT_PULLUP); |
862 | gpio_direction_output(OMAP3_EVM_EHCI_SELECT, 0); | 708 | gpio_request_array(omap3_evm_ehci_gpios, |
863 | gpio_set_value(OMAP3_EVM_EHCI_SELECT, 0); | 709 | ARRAY_SIZE(omap3_evm_ehci_gpios)); |
864 | 710 | ||
865 | /* setup EHCI phy reset config */ | 711 | /* setup EHCI phy reset config */ |
866 | omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP); | 712 | omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP); |
@@ -876,7 +722,7 @@ static void __init omap3_evm_init(void) | |||
876 | } | 722 | } |
877 | usb_musb_init(&musb_board_data); | 723 | usb_musb_init(&musb_board_data); |
878 | usbhs_init(&usbhs_bdata); | 724 | usbhs_init(&usbhs_bdata); |
879 | ads7846_dev_init(); | 725 | omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL); |
880 | omap3evm_init_smsc911x(); | 726 | omap3evm_init_smsc911x(); |
881 | omap3_evm_display_init(); | 727 | omap3_evm_display_init(); |
882 | 728 | ||
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c index b726943d7c93..60d9be49dbab 100644 --- a/arch/arm/mach-omap2/board-omap3logic.c +++ b/arch/arm/mach-omap2/board-omap3logic.c | |||
@@ -37,6 +37,7 @@ | |||
37 | #include "hsmmc.h" | 37 | #include "hsmmc.h" |
38 | #include "timer-gp.h" | 38 | #include "timer-gp.h" |
39 | #include "control.h" | 39 | #include "control.h" |
40 | #include "common-board-devices.h" | ||
40 | 41 | ||
41 | #include <plat/mux.h> | 42 | #include <plat/mux.h> |
42 | #include <plat/board.h> | 43 | #include <plat/board.h> |
@@ -93,19 +94,9 @@ static struct twl4030_platform_data omap3logic_twldata = { | |||
93 | .vmmc1 = &omap3logic_vmmc1, | 94 | .vmmc1 = &omap3logic_vmmc1, |
94 | }; | 95 | }; |
95 | 96 | ||
96 | static struct i2c_board_info __initdata omap3logic_i2c_boardinfo[] = { | ||
97 | { | ||
98 | I2C_BOARD_INFO("twl4030", 0x48), | ||
99 | .flags = I2C_CLIENT_WAKE, | ||
100 | .irq = INT_34XX_SYS_NIRQ, | ||
101 | .platform_data = &omap3logic_twldata, | ||
102 | }, | ||
103 | }; | ||
104 | |||
105 | static int __init omap3logic_i2c_init(void) | 97 | static int __init omap3logic_i2c_init(void) |
106 | { | 98 | { |
107 | omap_register_i2c_bus(1, 2600, omap3logic_i2c_boardinfo, | 99 | omap3_pmic_init("twl4030", &omap3logic_twldata); |
108 | ARRAY_SIZE(omap3logic_i2c_boardinfo)); | ||
109 | return 0; | 100 | return 0; |
110 | } | 101 | } |
111 | 102 | ||
@@ -147,7 +138,6 @@ static struct omap_smsc911x_platform_data __initdata board_smsc911x_data = { | |||
147 | .cs = OMAP3LOGIC_SMSC911X_CS, | 138 | .cs = OMAP3LOGIC_SMSC911X_CS, |
148 | .gpio_irq = -EINVAL, | 139 | .gpio_irq = -EINVAL, |
149 | .gpio_reset = -EINVAL, | 140 | .gpio_reset = -EINVAL, |
150 | .flags = IORESOURCE_IRQ_LOWLEVEL, | ||
151 | }; | 141 | }; |
152 | 142 | ||
153 | /* TODO/FIXME (comment by Peter Barada, LogicPD): | 143 | /* TODO/FIXME (comment by Peter Barada, LogicPD): |
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 1db15492d82b..1d10736c6d3c 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c | |||
@@ -22,7 +22,6 @@ | |||
22 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
23 | 23 | ||
24 | #include <linux/spi/spi.h> | 24 | #include <linux/spi/spi.h> |
25 | #include <linux/spi/ads7846.h> | ||
26 | #include <linux/regulator/machine.h> | 25 | #include <linux/regulator/machine.h> |
27 | #include <linux/i2c/twl.h> | 26 | #include <linux/i2c/twl.h> |
28 | #include <linux/wl12xx.h> | 27 | #include <linux/wl12xx.h> |
@@ -52,6 +51,7 @@ | |||
52 | #include "mux.h" | 51 | #include "mux.h" |
53 | #include "sdram-micron-mt46h32m32lf-6.h" | 52 | #include "sdram-micron-mt46h32m32lf-6.h" |
54 | #include "hsmmc.h" | 53 | #include "hsmmc.h" |
54 | #include "common-board-devices.h" | ||
55 | 55 | ||
56 | #define PANDORA_WIFI_IRQ_GPIO 21 | 56 | #define PANDORA_WIFI_IRQ_GPIO 21 |
57 | #define PANDORA_WIFI_NRESET_GPIO 23 | 57 | #define PANDORA_WIFI_NRESET_GPIO 23 |
@@ -305,24 +305,13 @@ static int omap3pandora_twl_gpio_setup(struct device *dev, | |||
305 | 305 | ||
306 | /* gpio + 13 drives 32kHz buffer for wifi module */ | 306 | /* gpio + 13 drives 32kHz buffer for wifi module */ |
307 | gpio_32khz = gpio + 13; | 307 | gpio_32khz = gpio + 13; |
308 | ret = gpio_request(gpio_32khz, "wifi 32kHz"); | 308 | ret = gpio_request_one(gpio_32khz, GPIOF_OUT_INIT_HIGH, "wifi 32kHz"); |
309 | if (ret < 0) { | 309 | if (ret < 0) { |
310 | pr_err("Cannot get GPIO line %d, ret=%d\n", gpio_32khz, ret); | 310 | pr_err("Cannot get GPIO line %d, ret=%d\n", gpio_32khz, ret); |
311 | goto fail; | 311 | return -ENODEV; |
312 | } | ||
313 | |||
314 | ret = gpio_direction_output(gpio_32khz, 1); | ||
315 | if (ret < 0) { | ||
316 | pr_err("Cannot set GPIO line %d, ret=%d\n", gpio_32khz, ret); | ||
317 | goto fail_direction; | ||
318 | } | 312 | } |
319 | 313 | ||
320 | return 0; | 314 | return 0; |
321 | |||
322 | fail_direction: | ||
323 | gpio_free(gpio_32khz); | ||
324 | fail: | ||
325 | return -ENODEV; | ||
326 | } | 315 | } |
327 | 316 | ||
328 | static struct twl4030_gpio_platform_data omap3pandora_gpio_data = { | 317 | static struct twl4030_gpio_platform_data omap3pandora_gpio_data = { |
@@ -544,15 +533,6 @@ static struct twl4030_platform_data omap3pandora_twldata = { | |||
544 | .bci = &pandora_bci_data, | 533 | .bci = &pandora_bci_data, |
545 | }; | 534 | }; |
546 | 535 | ||
547 | static struct i2c_board_info __initdata omap3pandora_i2c_boardinfo[] = { | ||
548 | { | ||
549 | I2C_BOARD_INFO("tps65950", 0x48), | ||
550 | .flags = I2C_CLIENT_WAKE, | ||
551 | .irq = INT_34XX_SYS_NIRQ, | ||
552 | .platform_data = &omap3pandora_twldata, | ||
553 | }, | ||
554 | }; | ||
555 | |||
556 | static struct i2c_board_info __initdata omap3pandora_i2c3_boardinfo[] = { | 536 | static struct i2c_board_info __initdata omap3pandora_i2c3_boardinfo[] = { |
557 | { | 537 | { |
558 | I2C_BOARD_INFO("bq27500", 0x55), | 538 | I2C_BOARD_INFO("bq27500", 0x55), |
@@ -562,61 +542,15 @@ static struct i2c_board_info __initdata omap3pandora_i2c3_boardinfo[] = { | |||
562 | 542 | ||
563 | static int __init omap3pandora_i2c_init(void) | 543 | static int __init omap3pandora_i2c_init(void) |
564 | { | 544 | { |
565 | omap_register_i2c_bus(1, 2600, omap3pandora_i2c_boardinfo, | 545 | omap3_pmic_init("tps65950", &omap3pandora_twldata); |
566 | ARRAY_SIZE(omap3pandora_i2c_boardinfo)); | ||
567 | /* i2c2 pins are not connected */ | 546 | /* i2c2 pins are not connected */ |
568 | omap_register_i2c_bus(3, 100, omap3pandora_i2c3_boardinfo, | 547 | omap_register_i2c_bus(3, 100, omap3pandora_i2c3_boardinfo, |
569 | ARRAY_SIZE(omap3pandora_i2c3_boardinfo)); | 548 | ARRAY_SIZE(omap3pandora_i2c3_boardinfo)); |
570 | return 0; | 549 | return 0; |
571 | } | 550 | } |
572 | 551 | ||
573 | static void __init omap3pandora_ads7846_init(void) | ||
574 | { | ||
575 | int gpio = OMAP3_PANDORA_TS_GPIO; | ||
576 | int ret; | ||
577 | |||
578 | ret = gpio_request(gpio, "ads7846_pen_down"); | ||
579 | if (ret < 0) { | ||
580 | printk(KERN_ERR "Failed to request GPIO %d for " | ||
581 | "ads7846 pen down IRQ\n", gpio); | ||
582 | return; | ||
583 | } | ||
584 | |||
585 | gpio_direction_input(gpio); | ||
586 | } | ||
587 | |||
588 | static int ads7846_get_pendown_state(void) | ||
589 | { | ||
590 | return !gpio_get_value(OMAP3_PANDORA_TS_GPIO); | ||
591 | } | ||
592 | |||
593 | static struct ads7846_platform_data ads7846_config = { | ||
594 | .x_max = 0x0fff, | ||
595 | .y_max = 0x0fff, | ||
596 | .x_plate_ohms = 180, | ||
597 | .pressure_max = 255, | ||
598 | .debounce_max = 10, | ||
599 | .debounce_tol = 3, | ||
600 | .debounce_rep = 1, | ||
601 | .get_pendown_state = ads7846_get_pendown_state, | ||
602 | .keep_vref_on = 1, | ||
603 | }; | ||
604 | |||
605 | static struct omap2_mcspi_device_config ads7846_mcspi_config = { | ||
606 | .turbo_mode = 0, | ||
607 | .single_channel = 1, /* 0: slave, 1: master */ | ||
608 | }; | ||
609 | |||
610 | static struct spi_board_info omap3pandora_spi_board_info[] __initdata = { | 552 | static struct spi_board_info omap3pandora_spi_board_info[] __initdata = { |
611 | { | 553 | { |
612 | .modalias = "ads7846", | ||
613 | .bus_num = 1, | ||
614 | .chip_select = 0, | ||
615 | .max_speed_hz = 1500000, | ||
616 | .controller_data = &ads7846_mcspi_config, | ||
617 | .irq = OMAP_GPIO_IRQ(OMAP3_PANDORA_TS_GPIO), | ||
618 | .platform_data = &ads7846_config, | ||
619 | }, { | ||
620 | .modalias = "tpo_td043mtea1_panel_spi", | 554 | .modalias = "tpo_td043mtea1_panel_spi", |
621 | .bus_num = 1, | 555 | .bus_num = 1, |
622 | .chip_select = 1, | 556 | .chip_select = 1, |
@@ -639,14 +573,10 @@ static void __init pandora_wl1251_init(void) | |||
639 | 573 | ||
640 | memset(&pandora_wl1251_pdata, 0, sizeof(pandora_wl1251_pdata)); | 574 | memset(&pandora_wl1251_pdata, 0, sizeof(pandora_wl1251_pdata)); |
641 | 575 | ||
642 | ret = gpio_request(PANDORA_WIFI_IRQ_GPIO, "wl1251 irq"); | 576 | ret = gpio_request_one(PANDORA_WIFI_IRQ_GPIO, GPIOF_IN, "wl1251 irq"); |
643 | if (ret < 0) | 577 | if (ret < 0) |
644 | goto fail; | 578 | goto fail; |
645 | 579 | ||
646 | ret = gpio_direction_input(PANDORA_WIFI_IRQ_GPIO); | ||
647 | if (ret < 0) | ||
648 | goto fail_irq; | ||
649 | |||
650 | pandora_wl1251_pdata.irq = gpio_to_irq(PANDORA_WIFI_IRQ_GPIO); | 580 | pandora_wl1251_pdata.irq = gpio_to_irq(PANDORA_WIFI_IRQ_GPIO); |
651 | if (pandora_wl1251_pdata.irq < 0) | 581 | if (pandora_wl1251_pdata.irq < 0) |
652 | goto fail_irq; | 582 | goto fail_irq; |
@@ -688,12 +618,6 @@ static struct omap_board_mux board_mux[] __initdata = { | |||
688 | }; | 618 | }; |
689 | #endif | 619 | #endif |
690 | 620 | ||
691 | static struct omap_musb_board_data musb_board_data = { | ||
692 | .interface_type = MUSB_INTERFACE_ULPI, | ||
693 | .mode = MUSB_OTG, | ||
694 | .power = 100, | ||
695 | }; | ||
696 | |||
697 | static void __init omap3pandora_init(void) | 621 | static void __init omap3pandora_init(void) |
698 | { | 622 | { |
699 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); | 623 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
@@ -705,9 +629,9 @@ static void __init omap3pandora_init(void) | |||
705 | omap_serial_init(); | 629 | omap_serial_init(); |
706 | spi_register_board_info(omap3pandora_spi_board_info, | 630 | spi_register_board_info(omap3pandora_spi_board_info, |
707 | ARRAY_SIZE(omap3pandora_spi_board_info)); | 631 | ARRAY_SIZE(omap3pandora_spi_board_info)); |
708 | omap3pandora_ads7846_init(); | 632 | omap_ads7846_init(1, OMAP3_PANDORA_TS_GPIO, 0, NULL); |
709 | usbhs_init(&usbhs_bdata); | 633 | usbhs_init(&usbhs_bdata); |
710 | usb_musb_init(&musb_board_data); | 634 | usb_musb_init(NULL); |
711 | gpmc_nand_init(&pandora_nand_data); | 635 | gpmc_nand_init(&pandora_nand_data); |
712 | 636 | ||
713 | /* Ensure SDRC pins are mux'd for self-refresh */ | 637 | /* Ensure SDRC pins are mux'd for self-refresh */ |
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index a72c90a08c8a..0c108a212ea2 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c | |||
@@ -45,7 +45,6 @@ | |||
45 | #include <plat/mcspi.h> | 45 | #include <plat/mcspi.h> |
46 | #include <linux/input/matrix_keypad.h> | 46 | #include <linux/input/matrix_keypad.h> |
47 | #include <linux/spi/spi.h> | 47 | #include <linux/spi/spi.h> |
48 | #include <linux/spi/ads7846.h> | ||
49 | #include <linux/interrupt.h> | 48 | #include <linux/interrupt.h> |
50 | #include <linux/smsc911x.h> | 49 | #include <linux/smsc911x.h> |
51 | #include <linux/i2c/at24.h> | 50 | #include <linux/i2c/at24.h> |
@@ -54,52 +53,28 @@ | |||
54 | #include "mux.h" | 53 | #include "mux.h" |
55 | #include "hsmmc.h" | 54 | #include "hsmmc.h" |
56 | #include "timer-gp.h" | 55 | #include "timer-gp.h" |
56 | #include "common-board-devices.h" | ||
57 | 57 | ||
58 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) | 58 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) |
59 | #include <plat/gpmc-smsc911x.h> | ||
60 | |||
59 | #define OMAP3STALKER_ETHR_START 0x2c000000 | 61 | #define OMAP3STALKER_ETHR_START 0x2c000000 |
60 | #define OMAP3STALKER_ETHR_SIZE 1024 | 62 | #define OMAP3STALKER_ETHR_SIZE 1024 |
61 | #define OMAP3STALKER_ETHR_GPIO_IRQ 19 | 63 | #define OMAP3STALKER_ETHR_GPIO_IRQ 19 |
62 | #define OMAP3STALKER_SMC911X_CS 5 | 64 | #define OMAP3STALKER_SMC911X_CS 5 |
63 | 65 | ||
64 | static struct resource omap3stalker_smsc911x_resources[] = { | 66 | static struct omap_smsc911x_platform_data smsc911x_cfg = { |
65 | [0] = { | 67 | .cs = OMAP3STALKER_SMC911X_CS, |
66 | .start = OMAP3STALKER_ETHR_START, | 68 | .gpio_irq = OMAP3STALKER_ETHR_GPIO_IRQ, |
67 | .end = | 69 | .gpio_reset = -EINVAL, |
68 | (OMAP3STALKER_ETHR_START + OMAP3STALKER_ETHR_SIZE - 1), | ||
69 | .flags = IORESOURCE_MEM, | ||
70 | }, | ||
71 | [1] = { | ||
72 | .start = OMAP_GPIO_IRQ(OMAP3STALKER_ETHR_GPIO_IRQ), | ||
73 | .end = OMAP_GPIO_IRQ(OMAP3STALKER_ETHR_GPIO_IRQ), | ||
74 | .flags = (IORESOURCE_IRQ | IRQF_TRIGGER_LOW), | ||
75 | }, | ||
76 | }; | ||
77 | |||
78 | static struct smsc911x_platform_config smsc911x_config = { | ||
79 | .phy_interface = PHY_INTERFACE_MODE_MII, | ||
80 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | ||
81 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | ||
82 | .flags = (SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS), | 70 | .flags = (SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS), |
83 | }; | 71 | }; |
84 | 72 | ||
85 | static struct platform_device omap3stalker_smsc911x_device = { | ||
86 | .name = "smsc911x", | ||
87 | .id = -1, | ||
88 | .num_resources = ARRAY_SIZE(omap3stalker_smsc911x_resources), | ||
89 | .resource = &omap3stalker_smsc911x_resources[0], | ||
90 | .dev = { | ||
91 | .platform_data = &smsc911x_config, | ||
92 | }, | ||
93 | }; | ||
94 | |||
95 | static inline void __init omap3stalker_init_eth(void) | 73 | static inline void __init omap3stalker_init_eth(void) |
96 | { | 74 | { |
97 | int eth_cs; | ||
98 | struct clk *l3ck; | 75 | struct clk *l3ck; |
99 | unsigned int rate; | 76 | unsigned int rate; |
100 | 77 | ||
101 | eth_cs = OMAP3STALKER_SMC911X_CS; | ||
102 | |||
103 | l3ck = clk_get(NULL, "l3_ck"); | 78 | l3ck = clk_get(NULL, "l3_ck"); |
104 | if (IS_ERR(l3ck)) | 79 | if (IS_ERR(l3ck)) |
105 | rate = 100000000; | 80 | rate = 100000000; |
@@ -107,16 +82,7 @@ static inline void __init omap3stalker_init_eth(void) | |||
107 | rate = clk_get_rate(l3ck); | 82 | rate = clk_get_rate(l3ck); |
108 | 83 | ||
109 | omap_mux_init_gpio(19, OMAP_PIN_INPUT_PULLUP); | 84 | omap_mux_init_gpio(19, OMAP_PIN_INPUT_PULLUP); |
110 | if (gpio_request(OMAP3STALKER_ETHR_GPIO_IRQ, "SMC911x irq") < 0) { | 85 | gpmc_smsc911x_init(&smsc911x_cfg); |
111 | printk(KERN_ERR | ||
112 | "Failed to request GPIO%d for smc911x IRQ\n", | ||
113 | OMAP3STALKER_ETHR_GPIO_IRQ); | ||
114 | return; | ||
115 | } | ||
116 | |||
117 | gpio_direction_input(OMAP3STALKER_ETHR_GPIO_IRQ); | ||
118 | |||
119 | platform_device_register(&omap3stalker_smsc911x_device); | ||
120 | } | 86 | } |
121 | 87 | ||
122 | #else | 88 | #else |
@@ -365,12 +331,11 @@ omap3stalker_twl_gpio_setup(struct device *dev, | |||
365 | */ | 331 | */ |
366 | 332 | ||
367 | /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */ | 333 | /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */ |
368 | gpio_request(gpio + TWL4030_GPIO_MAX, "EN_LCD_BKL"); | 334 | gpio_request_one(gpio + TWL4030_GPIO_MAX, GPIOF_OUT_INIT_LOW, |
369 | gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0); | 335 | "EN_LCD_BKL"); |
370 | 336 | ||
371 | /* gpio + 7 == DVI Enable */ | 337 | /* gpio + 7 == DVI Enable */ |
372 | gpio_request(gpio + 7, "EN_DVI"); | 338 | gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI"); |
373 | gpio_direction_output(gpio + 7, 0); | ||
374 | 339 | ||
375 | /* TWL4030_GPIO_MAX + 1 == ledB (out, mmc0) */ | 340 | /* TWL4030_GPIO_MAX + 1 == ledB (out, mmc0) */ |
376 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; | 341 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; |
@@ -489,15 +454,8 @@ static struct twl4030_platform_data omap3stalker_twldata = { | |||
489 | .codec = &omap3stalker_codec_data, | 454 | .codec = &omap3stalker_codec_data, |
490 | .vdac = &omap3_stalker_vdac, | 455 | .vdac = &omap3_stalker_vdac, |
491 | .vpll2 = &omap3_stalker_vpll2, | 456 | .vpll2 = &omap3_stalker_vpll2, |
492 | }; | 457 | .vmmc1 = &omap3stalker_vmmc1, |
493 | 458 | .vsim = &omap3stalker_vsim, | |
494 | static struct i2c_board_info __initdata omap3stalker_i2c_boardinfo[] = { | ||
495 | { | ||
496 | I2C_BOARD_INFO("twl4030", 0x48), | ||
497 | .flags = I2C_CLIENT_WAKE, | ||
498 | .irq = INT_34XX_SYS_NIRQ, | ||
499 | .platform_data = &omap3stalker_twldata, | ||
500 | }, | ||
501 | }; | 459 | }; |
502 | 460 | ||
503 | static struct at24_platform_data fram_info = { | 461 | static struct at24_platform_data fram_info = { |
@@ -516,15 +474,7 @@ static struct i2c_board_info __initdata omap3stalker_i2c_boardinfo3[] = { | |||
516 | 474 | ||
517 | static int __init omap3_stalker_i2c_init(void) | 475 | static int __init omap3_stalker_i2c_init(void) |
518 | { | 476 | { |
519 | /* | 477 | omap3_pmic_init("twl4030", &omap3stalker_twldata); |
520 | * REVISIT: These entries can be set in omap3evm_twl_data | ||
521 | * after a merge with MFD tree | ||
522 | */ | ||
523 | omap3stalker_twldata.vmmc1 = &omap3stalker_vmmc1; | ||
524 | omap3stalker_twldata.vsim = &omap3stalker_vsim; | ||
525 | |||
526 | omap_register_i2c_bus(1, 2600, omap3stalker_i2c_boardinfo, | ||
527 | ARRAY_SIZE(omap3stalker_i2c_boardinfo)); | ||
528 | omap_register_i2c_bus(2, 400, NULL, 0); | 478 | omap_register_i2c_bus(2, 400, NULL, 0); |
529 | omap_register_i2c_bus(3, 400, omap3stalker_i2c_boardinfo3, | 479 | omap_register_i2c_bus(3, 400, omap3stalker_i2c_boardinfo3, |
530 | ARRAY_SIZE(omap3stalker_i2c_boardinfo3)); | 480 | ARRAY_SIZE(omap3stalker_i2c_boardinfo3)); |
@@ -532,49 +482,6 @@ static int __init omap3_stalker_i2c_init(void) | |||
532 | } | 482 | } |
533 | 483 | ||
534 | #define OMAP3_STALKER_TS_GPIO 175 | 484 | #define OMAP3_STALKER_TS_GPIO 175 |
535 | static void ads7846_dev_init(void) | ||
536 | { | ||
537 | if (gpio_request(OMAP3_STALKER_TS_GPIO, "ADS7846 pendown") < 0) | ||
538 | printk(KERN_ERR "can't get ads7846 pen down GPIO\n"); | ||
539 | |||
540 | gpio_direction_input(OMAP3_STALKER_TS_GPIO); | ||
541 | gpio_set_debounce(OMAP3_STALKER_TS_GPIO, 310); | ||
542 | } | ||
543 | |||
544 | static int ads7846_get_pendown_state(void) | ||
545 | { | ||
546 | return !gpio_get_value(OMAP3_STALKER_TS_GPIO); | ||
547 | } | ||
548 | |||
549 | static struct ads7846_platform_data ads7846_config = { | ||
550 | .x_max = 0x0fff, | ||
551 | .y_max = 0x0fff, | ||
552 | .x_plate_ohms = 180, | ||
553 | .pressure_max = 255, | ||
554 | .debounce_max = 10, | ||
555 | .debounce_tol = 3, | ||
556 | .debounce_rep = 1, | ||
557 | .get_pendown_state = ads7846_get_pendown_state, | ||
558 | .keep_vref_on = 1, | ||
559 | .settle_delay_usecs = 150, | ||
560 | }; | ||
561 | |||
562 | static struct omap2_mcspi_device_config ads7846_mcspi_config = { | ||
563 | .turbo_mode = 0, | ||
564 | .single_channel = 1, /* 0: slave, 1: master */ | ||
565 | }; | ||
566 | |||
567 | static struct spi_board_info omap3stalker_spi_board_info[] = { | ||
568 | [0] = { | ||
569 | .modalias = "ads7846", | ||
570 | .bus_num = 1, | ||
571 | .chip_select = 0, | ||
572 | .max_speed_hz = 1500000, | ||
573 | .controller_data = &ads7846_mcspi_config, | ||
574 | .irq = OMAP_GPIO_IRQ(OMAP3_STALKER_TS_GPIO), | ||
575 | .platform_data = &ads7846_config, | ||
576 | }, | ||
577 | }; | ||
578 | 485 | ||
579 | static struct omap_board_config_kernel omap3_stalker_config[] __initdata = { | 486 | static struct omap_board_config_kernel omap3_stalker_config[] __initdata = { |
580 | }; | 487 | }; |
@@ -618,12 +525,6 @@ static struct omap_board_mux board_mux[] __initdata = { | |||
618 | }; | 525 | }; |
619 | #endif | 526 | #endif |
620 | 527 | ||
621 | static struct omap_musb_board_data musb_board_data = { | ||
622 | .interface_type = MUSB_INTERFACE_ULPI, | ||
623 | .mode = MUSB_OTG, | ||
624 | .power = 100, | ||
625 | }; | ||
626 | |||
627 | static void __init omap3_stalker_init(void) | 528 | static void __init omap3_stalker_init(void) |
628 | { | 529 | { |
629 | omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); | 530 | omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); |
@@ -636,13 +537,11 @@ static void __init omap3_stalker_init(void) | |||
636 | ARRAY_SIZE(omap3_stalker_devices)); | 537 | ARRAY_SIZE(omap3_stalker_devices)); |
637 | 538 | ||
638 | omap_display_init(&omap3_stalker_dss_data); | 539 | omap_display_init(&omap3_stalker_dss_data); |
639 | spi_register_board_info(omap3stalker_spi_board_info, | ||
640 | ARRAY_SIZE(omap3stalker_spi_board_info)); | ||
641 | 540 | ||
642 | omap_serial_init(); | 541 | omap_serial_init(); |
643 | usb_musb_init(&musb_board_data); | 542 | usb_musb_init(NULL); |
644 | usbhs_init(&usbhs_bdata); | 543 | usbhs_init(&usbhs_bdata); |
645 | ads7846_dev_init(); | 544 | omap_ads7846_init(1, OMAP3_STALKER_TS_GPIO, 310, NULL); |
646 | 545 | ||
647 | omap_mux_init_gpio(21, OMAP_PIN_OUTPUT); | 546 | omap_mux_init_gpio(21, OMAP_PIN_OUTPUT); |
648 | omap_mux_init_gpio(18, OMAP_PIN_INPUT_PULLUP); | 547 | omap_mux_init_gpio(18, OMAP_PIN_INPUT_PULLUP); |
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index 127cb1752bdd..82872d7d313b 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c | |||
@@ -52,6 +52,7 @@ | |||
52 | #include "mux.h" | 52 | #include "mux.h" |
53 | #include "hsmmc.h" | 53 | #include "hsmmc.h" |
54 | #include "timer-gp.h" | 54 | #include "timer-gp.h" |
55 | #include "common-board-devices.h" | ||
55 | 56 | ||
56 | #include <asm/setup.h> | 57 | #include <asm/setup.h> |
57 | 58 | ||
@@ -95,15 +96,6 @@ static struct mtd_partition omap3touchbook_nand_partitions[] = { | |||
95 | }, | 96 | }, |
96 | }; | 97 | }; |
97 | 98 | ||
98 | static struct omap_nand_platform_data omap3touchbook_nand_data = { | ||
99 | .options = NAND_BUSWIDTH_16, | ||
100 | .parts = omap3touchbook_nand_partitions, | ||
101 | .nr_parts = ARRAY_SIZE(omap3touchbook_nand_partitions), | ||
102 | .dma_channel = -1, /* disable DMA in OMAP NAND driver */ | ||
103 | .nand_setup = NULL, | ||
104 | .dev_ready = NULL, | ||
105 | }; | ||
106 | |||
107 | #include "sdram-micron-mt46h32m32lf-6.h" | 99 | #include "sdram-micron-mt46h32m32lf-6.h" |
108 | 100 | ||
109 | static struct omap2_hsmmc_info mmc[] = { | 101 | static struct omap2_hsmmc_info mmc[] = { |
@@ -154,13 +146,11 @@ static int touchbook_twl_gpio_setup(struct device *dev, | |||
154 | /* REVISIT: need ehci-omap hooks for external VBUS | 146 | /* REVISIT: need ehci-omap hooks for external VBUS |
155 | * power switch and overcurrent detect | 147 | * power switch and overcurrent detect |
156 | */ | 148 | */ |
157 | 149 | gpio_request_one(gpio + 1, GPIOF_IN, "EHCI_nOC"); | |
158 | gpio_request(gpio + 1, "EHCI_nOC"); | ||
159 | gpio_direction_input(gpio + 1); | ||
160 | 150 | ||
161 | /* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */ | 151 | /* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */ |
162 | gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR"); | 152 | gpio_request_one(gpio + TWL4030_GPIO_MAX, GPIOF_OUT_INIT_LOW, |
163 | gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0); | 153 | "nEN_USB_PWR"); |
164 | 154 | ||
165 | /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ | 155 | /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ |
166 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; | 156 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; |
@@ -273,15 +263,6 @@ static struct twl4030_platform_data touchbook_twldata = { | |||
273 | .vpll2 = &touchbook_vpll2, | 263 | .vpll2 = &touchbook_vpll2, |
274 | }; | 264 | }; |
275 | 265 | ||
276 | static struct i2c_board_info __initdata touchbook_i2c_boardinfo[] = { | ||
277 | { | ||
278 | I2C_BOARD_INFO("twl4030", 0x48), | ||
279 | .flags = I2C_CLIENT_WAKE, | ||
280 | .irq = INT_34XX_SYS_NIRQ, | ||
281 | .platform_data = &touchbook_twldata, | ||
282 | }, | ||
283 | }; | ||
284 | |||
285 | static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = { | 266 | static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = { |
286 | { | 267 | { |
287 | I2C_BOARD_INFO("bq27200", 0x55), | 268 | I2C_BOARD_INFO("bq27200", 0x55), |
@@ -291,8 +272,7 @@ static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = { | |||
291 | static int __init omap3_touchbook_i2c_init(void) | 272 | static int __init omap3_touchbook_i2c_init(void) |
292 | { | 273 | { |
293 | /* Standard TouchBook bus */ | 274 | /* Standard TouchBook bus */ |
294 | omap_register_i2c_bus(1, 2600, touchbook_i2c_boardinfo, | 275 | omap3_pmic_init("twl4030", &touchbook_twldata); |
295 | ARRAY_SIZE(touchbook_i2c_boardinfo)); | ||
296 | 276 | ||
297 | /* Additional TouchBook bus */ | 277 | /* Additional TouchBook bus */ |
298 | omap_register_i2c_bus(3, 100, touchBook_i2c_boardinfo, | 278 | omap_register_i2c_bus(3, 100, touchBook_i2c_boardinfo, |
@@ -301,19 +281,7 @@ static int __init omap3_touchbook_i2c_init(void) | |||
301 | return 0; | 281 | return 0; |
302 | } | 282 | } |
303 | 283 | ||
304 | static void __init omap3_ads7846_init(void) | 284 | static struct ads7846_platform_data ads7846_pdata = { |
305 | { | ||
306 | if (gpio_request(OMAP3_TS_GPIO, "ads7846_pen_down")) { | ||
307 | printk(KERN_ERR "Failed to request GPIO %d for " | ||
308 | "ads7846 pen down IRQ\n", OMAP3_TS_GPIO); | ||
309 | return; | ||
310 | } | ||
311 | |||
312 | gpio_direction_input(OMAP3_TS_GPIO); | ||
313 | gpio_set_debounce(OMAP3_TS_GPIO, 310); | ||
314 | } | ||
315 | |||
316 | static struct ads7846_platform_data ads7846_config = { | ||
317 | .x_min = 100, | 285 | .x_min = 100, |
318 | .y_min = 265, | 286 | .y_min = 265, |
319 | .x_max = 3950, | 287 | .x_max = 3950, |
@@ -327,23 +295,6 @@ static struct ads7846_platform_data ads7846_config = { | |||
327 | .keep_vref_on = 1, | 295 | .keep_vref_on = 1, |
328 | }; | 296 | }; |
329 | 297 | ||
330 | static struct omap2_mcspi_device_config ads7846_mcspi_config = { | ||
331 | .turbo_mode = 0, | ||
332 | .single_channel = 1, /* 0: slave, 1: master */ | ||
333 | }; | ||
334 | |||
335 | static struct spi_board_info omap3_ads7846_spi_board_info[] __initdata = { | ||
336 | { | ||
337 | .modalias = "ads7846", | ||
338 | .bus_num = 4, | ||
339 | .chip_select = 0, | ||
340 | .max_speed_hz = 1500000, | ||
341 | .controller_data = &ads7846_mcspi_config, | ||
342 | .irq = OMAP_GPIO_IRQ(OMAP3_TS_GPIO), | ||
343 | .platform_data = &ads7846_config, | ||
344 | } | ||
345 | }; | ||
346 | |||
347 | static struct gpio_led gpio_leds[] = { | 298 | static struct gpio_led gpio_leds[] = { |
348 | { | 299 | { |
349 | .name = "touchbook::usr0", | 300 | .name = "touchbook::usr0", |
@@ -434,39 +385,6 @@ static struct platform_device *omap3_touchbook_devices[] __initdata = { | |||
434 | &keys_gpio, | 385 | &keys_gpio, |
435 | }; | 386 | }; |
436 | 387 | ||
437 | static void __init omap3touchbook_flash_init(void) | ||
438 | { | ||
439 | u8 cs = 0; | ||
440 | u8 nandcs = GPMC_CS_NUM + 1; | ||
441 | |||
442 | /* find out the chip-select on which NAND exists */ | ||
443 | while (cs < GPMC_CS_NUM) { | ||
444 | u32 ret = 0; | ||
445 | ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); | ||
446 | |||
447 | if ((ret & 0xC00) == 0x800) { | ||
448 | printk(KERN_INFO "Found NAND on CS%d\n", cs); | ||
449 | if (nandcs > GPMC_CS_NUM) | ||
450 | nandcs = cs; | ||
451 | } | ||
452 | cs++; | ||
453 | } | ||
454 | |||
455 | if (nandcs > GPMC_CS_NUM) { | ||
456 | printk(KERN_INFO "NAND: Unable to find configuration " | ||
457 | "in GPMC\n "); | ||
458 | return; | ||
459 | } | ||
460 | |||
461 | if (nandcs < GPMC_CS_NUM) { | ||
462 | omap3touchbook_nand_data.cs = nandcs; | ||
463 | |||
464 | printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); | ||
465 | if (gpmc_nand_init(&omap3touchbook_nand_data) < 0) | ||
466 | printk(KERN_ERR "Unable to register NAND device\n"); | ||
467 | } | ||
468 | } | ||
469 | |||
470 | static const struct usbhs_omap_board_data usbhs_bdata __initconst = { | 388 | static const struct usbhs_omap_board_data usbhs_bdata __initconst = { |
471 | 389 | ||
472 | .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, | 390 | .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, |
@@ -481,15 +399,10 @@ static const struct usbhs_omap_board_data usbhs_bdata __initconst = { | |||
481 | 399 | ||
482 | static void omap3_touchbook_poweroff(void) | 400 | static void omap3_touchbook_poweroff(void) |
483 | { | 401 | { |
484 | int r; | 402 | int pwr_off = TB_KILL_POWER_GPIO; |
485 | 403 | ||
486 | r = gpio_request(TB_KILL_POWER_GPIO, "DVI reset"); | 404 | if (gpio_request_one(pwr_off, GPIOF_OUT_INIT_LOW, "DVI reset") < 0) |
487 | if (r < 0) { | ||
488 | printk(KERN_ERR "Unable to get kill power GPIO\n"); | 405 | printk(KERN_ERR "Unable to get kill power GPIO\n"); |
489 | return; | ||
490 | } | ||
491 | |||
492 | gpio_direction_output(TB_KILL_POWER_GPIO, 0); | ||
493 | } | 406 | } |
494 | 407 | ||
495 | static int __init early_touchbook_revision(char *p) | 408 | static int __init early_touchbook_revision(char *p) |
@@ -501,12 +414,6 @@ static int __init early_touchbook_revision(char *p) | |||
501 | } | 414 | } |
502 | early_param("tbr", early_touchbook_revision); | 415 | early_param("tbr", early_touchbook_revision); |
503 | 416 | ||
504 | static struct omap_musb_board_data musb_board_data = { | ||
505 | .interface_type = MUSB_INTERFACE_ULPI, | ||
506 | .mode = MUSB_OTG, | ||
507 | .power = 100, | ||
508 | }; | ||
509 | |||
510 | static void __init omap3_touchbook_init(void) | 417 | static void __init omap3_touchbook_init(void) |
511 | { | 418 | { |
512 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); | 419 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
@@ -521,17 +428,15 @@ static void __init omap3_touchbook_init(void) | |||
521 | omap_serial_init(); | 428 | omap_serial_init(); |
522 | 429 | ||
523 | omap_mux_init_gpio(170, OMAP_PIN_INPUT); | 430 | omap_mux_init_gpio(170, OMAP_PIN_INPUT); |
524 | gpio_request(176, "DVI_nPD"); | ||
525 | /* REVISIT leave DVI powered down until it's needed ... */ | 431 | /* REVISIT leave DVI powered down until it's needed ... */ |
526 | gpio_direction_output(176, true); | 432 | gpio_request_one(176, GPIOF_OUT_INIT_HIGH, "DVI_nPD"); |
527 | 433 | ||
528 | /* Touchscreen and accelerometer */ | 434 | /* Touchscreen and accelerometer */ |
529 | spi_register_board_info(omap3_ads7846_spi_board_info, | 435 | omap_ads7846_init(4, OMAP3_TS_GPIO, 310, &ads7846_pdata); |
530 | ARRAY_SIZE(omap3_ads7846_spi_board_info)); | 436 | usb_musb_init(NULL); |
531 | omap3_ads7846_init(); | ||
532 | usb_musb_init(&musb_board_data); | ||
533 | usbhs_init(&usbhs_bdata); | 437 | usbhs_init(&usbhs_bdata); |
534 | omap3touchbook_flash_init(); | 438 | omap_nand_flash_init(NAND_BUSWIDTH_16, omap3touchbook_nand_partitions, |
439 | ARRAY_SIZE(omap3touchbook_nand_partitions)); | ||
535 | 440 | ||
536 | /* Ensure SDRC pins are mux'd for self-refresh */ | 441 | /* Ensure SDRC pins are mux'd for self-refresh */ |
537 | omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); | 442 | omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); |
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index e4973ac77cbc..90485fced973 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c | |||
@@ -46,6 +46,7 @@ | |||
46 | #include "hsmmc.h" | 46 | #include "hsmmc.h" |
47 | #include "control.h" | 47 | #include "control.h" |
48 | #include "mux.h" | 48 | #include "mux.h" |
49 | #include "common-board-devices.h" | ||
49 | 50 | ||
50 | #define GPIO_HUB_POWER 1 | 51 | #define GPIO_HUB_POWER 1 |
51 | #define GPIO_HUB_NRESET 62 | 52 | #define GPIO_HUB_NRESET 62 |
@@ -111,6 +112,11 @@ static const struct usbhs_omap_board_data usbhs_bdata __initconst = { | |||
111 | .reset_gpio_port[2] = -EINVAL | 112 | .reset_gpio_port[2] = -EINVAL |
112 | }; | 113 | }; |
113 | 114 | ||
115 | static struct gpio panda_ehci_gpios[] __initdata = { | ||
116 | { GPIO_HUB_POWER, GPIOF_OUT_INIT_LOW, "hub_power" }, | ||
117 | { GPIO_HUB_NRESET, GPIOF_OUT_INIT_LOW, "hub_nreset" }, | ||
118 | }; | ||
119 | |||
114 | static void __init omap4_ehci_init(void) | 120 | static void __init omap4_ehci_init(void) |
115 | { | 121 | { |
116 | int ret; | 122 | int ret; |
@@ -120,44 +126,27 @@ static void __init omap4_ehci_init(void) | |||
120 | phy_ref_clk = clk_get(NULL, "auxclk3_ck"); | 126 | phy_ref_clk = clk_get(NULL, "auxclk3_ck"); |
121 | if (IS_ERR(phy_ref_clk)) { | 127 | if (IS_ERR(phy_ref_clk)) { |
122 | pr_err("Cannot request auxclk3\n"); | 128 | pr_err("Cannot request auxclk3\n"); |
123 | goto error1; | 129 | return; |
124 | } | 130 | } |
125 | clk_set_rate(phy_ref_clk, 19200000); | 131 | clk_set_rate(phy_ref_clk, 19200000); |
126 | clk_enable(phy_ref_clk); | 132 | clk_enable(phy_ref_clk); |
127 | 133 | ||
128 | /* disable the power to the usb hub prior to init */ | 134 | /* disable the power to the usb hub prior to init and reset phy+hub */ |
129 | ret = gpio_request(GPIO_HUB_POWER, "hub_power"); | 135 | ret = gpio_request_array(panda_ehci_gpios, |
136 | ARRAY_SIZE(panda_ehci_gpios)); | ||
130 | if (ret) { | 137 | if (ret) { |
131 | pr_err("Cannot request GPIO %d\n", GPIO_HUB_POWER); | 138 | pr_err("Unable to initialize EHCI power/reset\n"); |
132 | goto error1; | 139 | return; |
133 | } | 140 | } |
134 | gpio_export(GPIO_HUB_POWER, 0); | ||
135 | gpio_direction_output(GPIO_HUB_POWER, 0); | ||
136 | gpio_set_value(GPIO_HUB_POWER, 0); | ||
137 | 141 | ||
138 | /* reset phy+hub */ | 142 | gpio_export(GPIO_HUB_POWER, 0); |
139 | ret = gpio_request(GPIO_HUB_NRESET, "hub_nreset"); | ||
140 | if (ret) { | ||
141 | pr_err("Cannot request GPIO %d\n", GPIO_HUB_NRESET); | ||
142 | goto error2; | ||
143 | } | ||
144 | gpio_export(GPIO_HUB_NRESET, 0); | 143 | gpio_export(GPIO_HUB_NRESET, 0); |
145 | gpio_direction_output(GPIO_HUB_NRESET, 0); | ||
146 | gpio_set_value(GPIO_HUB_NRESET, 0); | ||
147 | gpio_set_value(GPIO_HUB_NRESET, 1); | 144 | gpio_set_value(GPIO_HUB_NRESET, 1); |
148 | 145 | ||
149 | usbhs_init(&usbhs_bdata); | 146 | usbhs_init(&usbhs_bdata); |
150 | 147 | ||
151 | /* enable power to hub */ | 148 | /* enable power to hub */ |
152 | gpio_set_value(GPIO_HUB_POWER, 1); | 149 | gpio_set_value(GPIO_HUB_POWER, 1); |
153 | return; | ||
154 | |||
155 | error2: | ||
156 | gpio_free(GPIO_HUB_POWER); | ||
157 | error1: | ||
158 | pr_err("Unable to initialize EHCI power/reset\n"); | ||
159 | return; | ||
160 | |||
161 | } | 150 | } |
162 | 151 | ||
163 | static struct omap_musb_board_data musb_board_data = { | 152 | static struct omap_musb_board_data musb_board_data = { |
@@ -408,15 +397,6 @@ static struct twl4030_platform_data omap4_panda_twldata = { | |||
408 | .usb = &omap4_usbphy_data, | 397 | .usb = &omap4_usbphy_data, |
409 | }; | 398 | }; |
410 | 399 | ||
411 | static struct i2c_board_info __initdata omap4_panda_i2c_boardinfo[] = { | ||
412 | { | ||
413 | I2C_BOARD_INFO("twl6030", 0x48), | ||
414 | .flags = I2C_CLIENT_WAKE, | ||
415 | .irq = OMAP44XX_IRQ_SYS_1N, | ||
416 | .platform_data = &omap4_panda_twldata, | ||
417 | }, | ||
418 | }; | ||
419 | |||
420 | /* | 400 | /* |
421 | * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM | 401 | * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM |
422 | * is connected as I2C slave device, and can be accessed at address 0x50 | 402 | * is connected as I2C slave device, and can be accessed at address 0x50 |
@@ -429,12 +409,7 @@ static struct i2c_board_info __initdata panda_i2c_eeprom[] = { | |||
429 | 409 | ||
430 | static int __init omap4_panda_i2c_init(void) | 410 | static int __init omap4_panda_i2c_init(void) |
431 | { | 411 | { |
432 | /* | 412 | omap4_pmic_init("twl6030", &omap4_panda_twldata); |
433 | * Phoenix Audio IC needs I2C1 to | ||
434 | * start with 400 KHz or less | ||
435 | */ | ||
436 | omap_register_i2c_bus(1, 400, omap4_panda_i2c_boardinfo, | ||
437 | ARRAY_SIZE(omap4_panda_i2c_boardinfo)); | ||
438 | omap_register_i2c_bus(2, 400, NULL, 0); | 413 | omap_register_i2c_bus(2, 400, NULL, 0); |
439 | /* | 414 | /* |
440 | * Bus 3 is attached to the DVI port where devices like the pico DLP | 415 | * Bus 3 is attached to the DVI port where devices like the pico DLP |
@@ -651,27 +626,19 @@ static void omap4_panda_hdmi_mux_init(void) | |||
651 | OMAP_PIN_INPUT_PULLUP); | 626 | OMAP_PIN_INPUT_PULLUP); |
652 | } | 627 | } |
653 | 628 | ||
629 | static struct gpio panda_hdmi_gpios[] = { | ||
630 | { HDMI_GPIO_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_hpd" }, | ||
631 | { HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ls_oe" }, | ||
632 | }; | ||
633 | |||
654 | static int omap4_panda_panel_enable_hdmi(struct omap_dss_device *dssdev) | 634 | static int omap4_panda_panel_enable_hdmi(struct omap_dss_device *dssdev) |
655 | { | 635 | { |
656 | int status; | 636 | int status; |
657 | 637 | ||
658 | status = gpio_request_one(HDMI_GPIO_HPD, GPIOF_OUT_INIT_HIGH, | 638 | status = gpio_request_array(panda_hdmi_gpios, |
659 | "hdmi_gpio_hpd"); | 639 | ARRAY_SIZE(panda_hdmi_gpios)); |
660 | if (status) { | 640 | if (status) |
661 | pr_err("Cannot request GPIO %d\n", HDMI_GPIO_HPD); | 641 | pr_err("Cannot request HDMI GPIOs\n"); |
662 | return status; | ||
663 | } | ||
664 | status = gpio_request_one(HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, | ||
665 | "hdmi_gpio_ls_oe"); | ||
666 | if (status) { | ||
667 | pr_err("Cannot request GPIO %d\n", HDMI_GPIO_LS_OE); | ||
668 | goto error1; | ||
669 | } | ||
670 | |||
671 | return 0; | ||
672 | |||
673 | error1: | ||
674 | gpio_free(HDMI_GPIO_HPD); | ||
675 | 642 | ||
676 | return status; | 643 | return status; |
677 | } | 644 | } |
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index 9d192ff3b9ac..1555918e3ffa 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c | |||
@@ -56,6 +56,7 @@ | |||
56 | #include "mux.h" | 56 | #include "mux.h" |
57 | #include "sdram-micron-mt46h32m32lf-6.h" | 57 | #include "sdram-micron-mt46h32m32lf-6.h" |
58 | #include "hsmmc.h" | 58 | #include "hsmmc.h" |
59 | #include "common-board-devices.h" | ||
59 | 60 | ||
60 | #define OVERO_GPIO_BT_XGATE 15 | 61 | #define OVERO_GPIO_BT_XGATE 15 |
61 | #define OVERO_GPIO_W2W_NRESET 16 | 62 | #define OVERO_GPIO_W2W_NRESET 16 |
@@ -74,30 +75,6 @@ | |||
74 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ | 75 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ |
75 | defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | 76 | defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) |
76 | 77 | ||
77 | #include <linux/spi/ads7846.h> | ||
78 | |||
79 | static struct omap2_mcspi_device_config ads7846_mcspi_config = { | ||
80 | .turbo_mode = 0, | ||
81 | .single_channel = 1, /* 0: slave, 1: master */ | ||
82 | }; | ||
83 | |||
84 | static int ads7846_get_pendown_state(void) | ||
85 | { | ||
86 | return !gpio_get_value(OVERO_GPIO_PENDOWN); | ||
87 | } | ||
88 | |||
89 | static struct ads7846_platform_data ads7846_config = { | ||
90 | .x_max = 0x0fff, | ||
91 | .y_max = 0x0fff, | ||
92 | .x_plate_ohms = 180, | ||
93 | .pressure_max = 255, | ||
94 | .debounce_max = 10, | ||
95 | .debounce_tol = 3, | ||
96 | .debounce_rep = 1, | ||
97 | .get_pendown_state = ads7846_get_pendown_state, | ||
98 | .keep_vref_on = 1, | ||
99 | }; | ||
100 | |||
101 | /* fixed regulator for ads7846 */ | 78 | /* fixed regulator for ads7846 */ |
102 | static struct regulator_consumer_supply ads7846_supply = | 79 | static struct regulator_consumer_supply ads7846_supply = |
103 | REGULATOR_SUPPLY("vcc", "spi1.0"); | 80 | REGULATOR_SUPPLY("vcc", "spi1.0"); |
@@ -128,14 +105,7 @@ static struct platform_device vads7846_device = { | |||
128 | 105 | ||
129 | static void __init overo_ads7846_init(void) | 106 | static void __init overo_ads7846_init(void) |
130 | { | 107 | { |
131 | if ((gpio_request(OVERO_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) && | 108 | omap_ads7846_init(1, OVERO_GPIO_PENDOWN, 0, NULL); |
132 | (gpio_direction_input(OVERO_GPIO_PENDOWN) == 0)) { | ||
133 | gpio_export(OVERO_GPIO_PENDOWN, 0); | ||
134 | } else { | ||
135 | printk(KERN_ERR "could not obtain gpio for ADS7846_PENDOWN\n"); | ||
136 | return; | ||
137 | } | ||
138 | |||
139 | platform_device_register(&vads7846_device); | 109 | platform_device_register(&vads7846_device); |
140 | } | 110 | } |
141 | 111 | ||
@@ -146,106 +116,28 @@ static inline void __init overo_ads7846_init(void) { return; } | |||
146 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) | 116 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) |
147 | 117 | ||
148 | #include <linux/smsc911x.h> | 118 | #include <linux/smsc911x.h> |
119 | #include <plat/gpmc-smsc911x.h> | ||
149 | 120 | ||
150 | static struct resource overo_smsc911x_resources[] = { | 121 | static struct omap_smsc911x_platform_data smsc911x_cfg = { |
151 | { | ||
152 | .name = "smsc911x-memory", | ||
153 | .flags = IORESOURCE_MEM, | ||
154 | }, | ||
155 | { | ||
156 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | ||
157 | }, | ||
158 | }; | ||
159 | |||
160 | static struct resource overo_smsc911x2_resources[] = { | ||
161 | { | ||
162 | .name = "smsc911x2-memory", | ||
163 | .flags = IORESOURCE_MEM, | ||
164 | }, | ||
165 | { | ||
166 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | ||
167 | }, | ||
168 | }; | ||
169 | |||
170 | static struct smsc911x_platform_config overo_smsc911x_config = { | ||
171 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | ||
172 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | ||
173 | .flags = SMSC911X_USE_32BIT , | ||
174 | .phy_interface = PHY_INTERFACE_MODE_MII, | ||
175 | }; | ||
176 | |||
177 | static struct platform_device overo_smsc911x_device = { | ||
178 | .name = "smsc911x", | ||
179 | .id = 0, | 122 | .id = 0, |
180 | .num_resources = ARRAY_SIZE(overo_smsc911x_resources), | 123 | .cs = OVERO_SMSC911X_CS, |
181 | .resource = overo_smsc911x_resources, | 124 | .gpio_irq = OVERO_SMSC911X_GPIO, |
182 | .dev = { | 125 | .gpio_reset = -EINVAL, |
183 | .platform_data = &overo_smsc911x_config, | 126 | .flags = SMSC911X_USE_32BIT, |
184 | }, | ||
185 | }; | 127 | }; |
186 | 128 | ||
187 | static struct platform_device overo_smsc911x2_device = { | 129 | static struct omap_smsc911x_platform_data smsc911x2_cfg = { |
188 | .name = "smsc911x", | ||
189 | .id = 1, | 130 | .id = 1, |
190 | .num_resources = ARRAY_SIZE(overo_smsc911x2_resources), | 131 | .cs = OVERO_SMSC911X2_CS, |
191 | .resource = overo_smsc911x2_resources, | 132 | .gpio_irq = OVERO_SMSC911X2_GPIO, |
192 | .dev = { | 133 | .gpio_reset = -EINVAL, |
193 | .platform_data = &overo_smsc911x_config, | 134 | .flags = SMSC911X_USE_32BIT, |
194 | }, | ||
195 | }; | 135 | }; |
196 | 136 | ||
197 | static struct platform_device *smsc911x_devices[] = { | 137 | static void __init overo_init_smsc911x(void) |
198 | &overo_smsc911x_device, | ||
199 | &overo_smsc911x2_device, | ||
200 | }; | ||
201 | |||
202 | static inline void __init overo_init_smsc911x(void) | ||
203 | { | 138 | { |
204 | unsigned long cs_mem_base, cs_mem_base2; | 139 | gpmc_smsc911x_init(&smsc911x_cfg); |
205 | 140 | gpmc_smsc911x_init(&smsc911x2_cfg); | |
206 | /* set up first smsc911x chip */ | ||
207 | |||
208 | if (gpmc_cs_request(OVERO_SMSC911X_CS, SZ_16M, &cs_mem_base) < 0) { | ||
209 | printk(KERN_ERR "Failed request for GPMC mem for smsc911x\n"); | ||
210 | return; | ||
211 | } | ||
212 | |||
213 | overo_smsc911x_resources[0].start = cs_mem_base + 0x0; | ||
214 | overo_smsc911x_resources[0].end = cs_mem_base + 0xff; | ||
215 | |||
216 | if ((gpio_request(OVERO_SMSC911X_GPIO, "SMSC911X IRQ") == 0) && | ||
217 | (gpio_direction_input(OVERO_SMSC911X_GPIO) == 0)) { | ||
218 | gpio_export(OVERO_SMSC911X_GPIO, 0); | ||
219 | } else { | ||
220 | printk(KERN_ERR "could not obtain gpio for SMSC911X IRQ\n"); | ||
221 | return; | ||
222 | } | ||
223 | |||
224 | overo_smsc911x_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X_GPIO); | ||
225 | overo_smsc911x_resources[1].end = 0; | ||
226 | |||
227 | /* set up second smsc911x chip */ | ||
228 | |||
229 | if (gpmc_cs_request(OVERO_SMSC911X2_CS, SZ_16M, &cs_mem_base2) < 0) { | ||
230 | printk(KERN_ERR "Failed request for GPMC mem for smsc911x2\n"); | ||
231 | return; | ||
232 | } | ||
233 | |||
234 | overo_smsc911x2_resources[0].start = cs_mem_base2 + 0x0; | ||
235 | overo_smsc911x2_resources[0].end = cs_mem_base2 + 0xff; | ||
236 | |||
237 | if ((gpio_request(OVERO_SMSC911X2_GPIO, "SMSC911X2 IRQ") == 0) && | ||
238 | (gpio_direction_input(OVERO_SMSC911X2_GPIO) == 0)) { | ||
239 | gpio_export(OVERO_SMSC911X2_GPIO, 0); | ||
240 | } else { | ||
241 | printk(KERN_ERR "could not obtain gpio for SMSC911X2 IRQ\n"); | ||
242 | return; | ||
243 | } | ||
244 | |||
245 | overo_smsc911x2_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X2_GPIO); | ||
246 | overo_smsc911x2_resources[1].end = 0; | ||
247 | |||
248 | platform_add_devices(smsc911x_devices, ARRAY_SIZE(smsc911x_devices)); | ||
249 | } | 141 | } |
250 | 142 | ||
251 | #else | 143 | #else |
@@ -259,21 +151,20 @@ static int dvi_enabled; | |||
259 | #define OVERO_GPIO_LCD_EN 144 | 151 | #define OVERO_GPIO_LCD_EN 144 |
260 | #define OVERO_GPIO_LCD_BL 145 | 152 | #define OVERO_GPIO_LCD_BL 145 |
261 | 153 | ||
154 | static struct gpio overo_dss_gpios[] __initdata = { | ||
155 | { OVERO_GPIO_LCD_EN, GPIOF_OUT_INIT_HIGH, "OVERO_GPIO_LCD_EN" }, | ||
156 | { OVERO_GPIO_LCD_BL, GPIOF_OUT_INIT_HIGH, "OVERO_GPIO_LCD_BL" }, | ||
157 | }; | ||
158 | |||
262 | static void __init overo_display_init(void) | 159 | static void __init overo_display_init(void) |
263 | { | 160 | { |
264 | if ((gpio_request(OVERO_GPIO_LCD_EN, "OVERO_GPIO_LCD_EN") == 0) && | 161 | if (gpio_request_array(overo_dss_gpios, ARRAY_SIZE(overo_dss_gpios))) { |
265 | (gpio_direction_output(OVERO_GPIO_LCD_EN, 1) == 0)) | 162 | printk(KERN_ERR "could not obtain DSS control GPIOs\n"); |
266 | gpio_export(OVERO_GPIO_LCD_EN, 0); | 163 | return; |
267 | else | 164 | } |
268 | printk(KERN_ERR "could not obtain gpio for " | ||
269 | "OVERO_GPIO_LCD_EN\n"); | ||
270 | 165 | ||
271 | if ((gpio_request(OVERO_GPIO_LCD_BL, "OVERO_GPIO_LCD_BL") == 0) && | 166 | gpio_export(OVERO_GPIO_LCD_EN, 0); |
272 | (gpio_direction_output(OVERO_GPIO_LCD_BL, 1) == 0)) | 167 | gpio_export(OVERO_GPIO_LCD_BL, 0); |
273 | gpio_export(OVERO_GPIO_LCD_BL, 0); | ||
274 | else | ||
275 | printk(KERN_ERR "could not obtain gpio for " | ||
276 | "OVERO_GPIO_LCD_BL\n"); | ||
277 | } | 168 | } |
278 | 169 | ||
279 | static int overo_panel_enable_dvi(struct omap_dss_device *dssdev) | 170 | static int overo_panel_enable_dvi(struct omap_dss_device *dssdev) |
@@ -412,45 +303,6 @@ static struct mtd_partition overo_nand_partitions[] = { | |||
412 | }, | 303 | }, |
413 | }; | 304 | }; |
414 | 305 | ||
415 | static struct omap_nand_platform_data overo_nand_data = { | ||
416 | .parts = overo_nand_partitions, | ||
417 | .nr_parts = ARRAY_SIZE(overo_nand_partitions), | ||
418 | .dma_channel = -1, /* disable DMA in OMAP NAND driver */ | ||
419 | }; | ||
420 | |||
421 | static void __init overo_flash_init(void) | ||
422 | { | ||
423 | u8 cs = 0; | ||
424 | u8 nandcs = GPMC_CS_NUM + 1; | ||
425 | |||
426 | /* find out the chip-select on which NAND exists */ | ||
427 | while (cs < GPMC_CS_NUM) { | ||
428 | u32 ret = 0; | ||
429 | ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); | ||
430 | |||
431 | if ((ret & 0xC00) == 0x800) { | ||
432 | printk(KERN_INFO "Found NAND on CS%d\n", cs); | ||
433 | if (nandcs > GPMC_CS_NUM) | ||
434 | nandcs = cs; | ||
435 | } | ||
436 | cs++; | ||
437 | } | ||
438 | |||
439 | if (nandcs > GPMC_CS_NUM) { | ||
440 | printk(KERN_INFO "NAND: Unable to find configuration " | ||
441 | "in GPMC\n "); | ||
442 | return; | ||
443 | } | ||
444 | |||
445 | if (nandcs < GPMC_CS_NUM) { | ||
446 | overo_nand_data.cs = nandcs; | ||
447 | |||
448 | printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); | ||
449 | if (gpmc_nand_init(&overo_nand_data) < 0) | ||
450 | printk(KERN_ERR "Unable to register NAND device\n"); | ||
451 | } | ||
452 | } | ||
453 | |||
454 | static struct omap2_hsmmc_info mmc[] = { | 306 | static struct omap2_hsmmc_info mmc[] = { |
455 | { | 307 | { |
456 | .mmc = 1, | 308 | .mmc = 1, |
@@ -648,37 +500,15 @@ static struct twl4030_platform_data overo_twldata = { | |||
648 | .vpll2 = &overo_vpll2, | 500 | .vpll2 = &overo_vpll2, |
649 | }; | 501 | }; |
650 | 502 | ||
651 | static struct i2c_board_info __initdata overo_i2c_boardinfo[] = { | ||
652 | { | ||
653 | I2C_BOARD_INFO("tps65950", 0x48), | ||
654 | .flags = I2C_CLIENT_WAKE, | ||
655 | .irq = INT_34XX_SYS_NIRQ, | ||
656 | .platform_data = &overo_twldata, | ||
657 | }, | ||
658 | }; | ||
659 | |||
660 | static int __init overo_i2c_init(void) | 503 | static int __init overo_i2c_init(void) |
661 | { | 504 | { |
662 | omap_register_i2c_bus(1, 2600, overo_i2c_boardinfo, | 505 | omap3_pmic_init("tps65950", &overo_twldata); |
663 | ARRAY_SIZE(overo_i2c_boardinfo)); | ||
664 | /* i2c2 pins are used for gpio */ | 506 | /* i2c2 pins are used for gpio */ |
665 | omap_register_i2c_bus(3, 400, NULL, 0); | 507 | omap_register_i2c_bus(3, 400, NULL, 0); |
666 | return 0; | 508 | return 0; |
667 | } | 509 | } |
668 | 510 | ||
669 | static struct spi_board_info overo_spi_board_info[] __initdata = { | 511 | static struct spi_board_info overo_spi_board_info[] __initdata = { |
670 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ | ||
671 | defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | ||
672 | { | ||
673 | .modalias = "ads7846", | ||
674 | .bus_num = 1, | ||
675 | .chip_select = 0, | ||
676 | .max_speed_hz = 1500000, | ||
677 | .controller_data = &ads7846_mcspi_config, | ||
678 | .irq = OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN), | ||
679 | .platform_data = &ads7846_config, | ||
680 | }, | ||
681 | #endif | ||
682 | #if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \ | 512 | #if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \ |
683 | defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE) | 513 | defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE) |
684 | { | 514 | { |
@@ -722,20 +552,22 @@ static struct omap_board_mux board_mux[] __initdata = { | |||
722 | }; | 552 | }; |
723 | #endif | 553 | #endif |
724 | 554 | ||
725 | static struct omap_musb_board_data musb_board_data = { | 555 | static struct gpio overo_bt_gpios[] __initdata = { |
726 | .interface_type = MUSB_INTERFACE_ULPI, | 556 | { OVERO_GPIO_BT_XGATE, GPIOF_OUT_INIT_LOW, "lcd enable" }, |
727 | .mode = MUSB_OTG, | 557 | { OVERO_GPIO_BT_NRESET, GPIOF_OUT_INIT_HIGH, "lcd bl enable" }, |
728 | .power = 100, | ||
729 | }; | 558 | }; |
730 | 559 | ||
731 | static void __init overo_init(void) | 560 | static void __init overo_init(void) |
732 | { | 561 | { |
562 | int ret; | ||
563 | |||
733 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); | 564 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
734 | overo_i2c_init(); | 565 | overo_i2c_init(); |
735 | omap_display_init(&overo_dss_data); | 566 | omap_display_init(&overo_dss_data); |
736 | omap_serial_init(); | 567 | omap_serial_init(); |
737 | overo_flash_init(); | 568 | omap_nand_flash_init(0, overo_nand_partitions, |
738 | usb_musb_init(&musb_board_data); | 569 | ARRAY_SIZE(overo_nand_partitions)); |
570 | usb_musb_init(NULL); | ||
739 | usbhs_init(&usbhs_bdata); | 571 | usbhs_init(&usbhs_bdata); |
740 | overo_spi_init(); | 572 | overo_spi_init(); |
741 | overo_ads7846_init(); | 573 | overo_ads7846_init(); |
@@ -748,9 +580,9 @@ static void __init overo_init(void) | |||
748 | omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); | 580 | omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); |
749 | omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); | 581 | omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); |
750 | 582 | ||
751 | if ((gpio_request(OVERO_GPIO_W2W_NRESET, | 583 | ret = gpio_request_one(OVERO_GPIO_W2W_NRESET, GPIOF_OUT_INIT_HIGH, |
752 | "OVERO_GPIO_W2W_NRESET") == 0) && | 584 | "OVERO_GPIO_W2W_NRESET"); |
753 | (gpio_direction_output(OVERO_GPIO_W2W_NRESET, 1) == 0)) { | 585 | if (ret == 0) { |
754 | gpio_export(OVERO_GPIO_W2W_NRESET, 0); | 586 | gpio_export(OVERO_GPIO_W2W_NRESET, 0); |
755 | gpio_set_value(OVERO_GPIO_W2W_NRESET, 0); | 587 | gpio_set_value(OVERO_GPIO_W2W_NRESET, 0); |
756 | udelay(10); | 588 | udelay(10); |
@@ -760,25 +592,20 @@ static void __init overo_init(void) | |||
760 | "OVERO_GPIO_W2W_NRESET\n"); | 592 | "OVERO_GPIO_W2W_NRESET\n"); |
761 | } | 593 | } |
762 | 594 | ||
763 | if ((gpio_request(OVERO_GPIO_BT_XGATE, "OVERO_GPIO_BT_XGATE") == 0) && | 595 | ret = gpio_request_array(overo_bt_gpios, ARRAY_SIZE(overo_bt_gpios)); |
764 | (gpio_direction_output(OVERO_GPIO_BT_XGATE, 0) == 0)) | 596 | if (ret) { |
597 | pr_err("%s: could not obtain BT gpios\n", __func__); | ||
598 | } else { | ||
765 | gpio_export(OVERO_GPIO_BT_XGATE, 0); | 599 | gpio_export(OVERO_GPIO_BT_XGATE, 0); |
766 | else | ||
767 | printk(KERN_ERR "could not obtain gpio for OVERO_GPIO_BT_XGATE\n"); | ||
768 | |||
769 | if ((gpio_request(OVERO_GPIO_BT_NRESET, "OVERO_GPIO_BT_NRESET") == 0) && | ||
770 | (gpio_direction_output(OVERO_GPIO_BT_NRESET, 1) == 0)) { | ||
771 | gpio_export(OVERO_GPIO_BT_NRESET, 0); | 600 | gpio_export(OVERO_GPIO_BT_NRESET, 0); |
772 | gpio_set_value(OVERO_GPIO_BT_NRESET, 0); | 601 | gpio_set_value(OVERO_GPIO_BT_NRESET, 0); |
773 | mdelay(6); | 602 | mdelay(6); |
774 | gpio_set_value(OVERO_GPIO_BT_NRESET, 1); | 603 | gpio_set_value(OVERO_GPIO_BT_NRESET, 1); |
775 | } else { | ||
776 | printk(KERN_ERR "could not obtain gpio for " | ||
777 | "OVERO_GPIO_BT_NRESET\n"); | ||
778 | } | 604 | } |
779 | 605 | ||
780 | if ((gpio_request(OVERO_GPIO_USBH_CPEN, "OVERO_GPIO_USBH_CPEN") == 0) && | 606 | ret = gpio_request_one(OVERO_GPIO_USBH_CPEN, GPIOF_OUT_INIT_HIGH, |
781 | (gpio_direction_output(OVERO_GPIO_USBH_CPEN, 1) == 0)) | 607 | "OVERO_GPIO_USBH_CPEN"); |
608 | if (ret == 0) | ||
782 | gpio_export(OVERO_GPIO_USBH_CPEN, 0); | 609 | gpio_export(OVERO_GPIO_USBH_CPEN, 0); |
783 | else | 610 | else |
784 | printk(KERN_ERR "could not obtain gpio for " | 611 | printk(KERN_ERR "could not obtain gpio for " |
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c index 2af8b05e786d..42d10b12da3c 100644 --- a/arch/arm/mach-omap2/board-rm680.c +++ b/arch/arm/mach-omap2/board-rm680.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include "mux.h" | 31 | #include "mux.h" |
32 | #include "hsmmc.h" | 32 | #include "hsmmc.h" |
33 | #include "sdram-nokia.h" | 33 | #include "sdram-nokia.h" |
34 | #include "common-board-devices.h" | ||
34 | 35 | ||
35 | static struct regulator_consumer_supply rm680_vemmc_consumers[] = { | 36 | static struct regulator_consumer_supply rm680_vemmc_consumers[] = { |
36 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), | 37 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), |
@@ -90,19 +91,9 @@ static struct twl4030_platform_data rm680_twl_data = { | |||
90 | /* add rest of the children here */ | 91 | /* add rest of the children here */ |
91 | }; | 92 | }; |
92 | 93 | ||
93 | static struct i2c_board_info __initdata rm680_twl_i2c_board_info[] = { | ||
94 | { | ||
95 | I2C_BOARD_INFO("twl5031", 0x48), | ||
96 | .flags = I2C_CLIENT_WAKE, | ||
97 | .irq = INT_34XX_SYS_NIRQ, | ||
98 | .platform_data = &rm680_twl_data, | ||
99 | }, | ||
100 | }; | ||
101 | |||
102 | static void __init rm680_i2c_init(void) | 94 | static void __init rm680_i2c_init(void) |
103 | { | 95 | { |
104 | omap_register_i2c_bus(1, 2900, rm680_twl_i2c_board_info, | 96 | omap_pmic_init(1, 2900, "twl5031", INT_34XX_SYS_NIRQ, &rm680_twl_data); |
105 | ARRAY_SIZE(rm680_twl_i2c_board_info)); | ||
106 | omap_register_i2c_bus(2, 400, NULL, 0); | 97 | omap_register_i2c_bus(2, 400, NULL, 0); |
107 | omap_register_i2c_bus(3, 400, NULL, 0); | 98 | omap_register_i2c_bus(3, 400, NULL, 0); |
108 | } | 99 | } |
@@ -153,17 +144,11 @@ static struct omap_board_mux board_mux[] __initdata = { | |||
153 | }; | 144 | }; |
154 | #endif | 145 | #endif |
155 | 146 | ||
156 | static struct omap_musb_board_data rm680_musb_data = { | ||
157 | .interface_type = MUSB_INTERFACE_ULPI, | ||
158 | .mode = MUSB_PERIPHERAL, | ||
159 | .power = 100, | ||
160 | }; | ||
161 | |||
162 | static void __init rm680_init(void) | 147 | static void __init rm680_init(void) |
163 | { | 148 | { |
164 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); | 149 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
165 | omap_serial_init(); | 150 | omap_serial_init(); |
166 | usb_musb_init(&rm680_musb_data); | 151 | usb_musb_init(NULL); |
167 | rm680_peripherals_init(); | 152 | rm680_peripherals_init(); |
168 | } | 153 | } |
169 | 154 | ||
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index bbcb6775a6a3..f6247e71a194 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/gpio.h> | 23 | #include <linux/gpio.h> |
24 | #include <linux/gpio_keys.h> | 24 | #include <linux/gpio_keys.h> |
25 | #include <linux/mmc/host.h> | 25 | #include <linux/mmc/host.h> |
26 | #include <linux/power/isp1704_charger.h> | ||
26 | 27 | ||
27 | #include <plat/mcspi.h> | 28 | #include <plat/mcspi.h> |
28 | #include <plat/board.h> | 29 | #include <plat/board.h> |
@@ -43,6 +44,7 @@ | |||
43 | 44 | ||
44 | #include "mux.h" | 45 | #include "mux.h" |
45 | #include "hsmmc.h" | 46 | #include "hsmmc.h" |
47 | #include "common-board-devices.h" | ||
46 | 48 | ||
47 | #define SYSTEM_REV_B_USES_VAUX3 0x1699 | 49 | #define SYSTEM_REV_B_USES_VAUX3 0x1699 |
48 | #define SYSTEM_REV_S_USES_VAUX3 0x8 | 50 | #define SYSTEM_REV_S_USES_VAUX3 0x8 |
@@ -52,6 +54,8 @@ | |||
52 | #define RX51_FMTX_RESET_GPIO 163 | 54 | #define RX51_FMTX_RESET_GPIO 163 |
53 | #define RX51_FMTX_IRQ 53 | 55 | #define RX51_FMTX_IRQ 53 |
54 | 56 | ||
57 | #define RX51_USB_TRANSCEIVER_RST_GPIO 67 | ||
58 | |||
55 | /* list all spi devices here */ | 59 | /* list all spi devices here */ |
56 | enum { | 60 | enum { |
57 | RX51_SPI_WL1251, | 61 | RX51_SPI_WL1251, |
@@ -110,10 +114,30 @@ static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { | |||
110 | }, | 114 | }, |
111 | }; | 115 | }; |
112 | 116 | ||
117 | static void rx51_charger_set_power(bool on) | ||
118 | { | ||
119 | gpio_set_value(RX51_USB_TRANSCEIVER_RST_GPIO, on); | ||
120 | } | ||
121 | |||
122 | static struct isp1704_charger_data rx51_charger_data = { | ||
123 | .set_power = rx51_charger_set_power, | ||
124 | }; | ||
125 | |||
113 | static struct platform_device rx51_charger_device = { | 126 | static struct platform_device rx51_charger_device = { |
114 | .name = "isp1704_charger", | 127 | .name = "isp1704_charger", |
128 | .dev = { | ||
129 | .platform_data = &rx51_charger_data, | ||
130 | }, | ||
115 | }; | 131 | }; |
116 | 132 | ||
133 | static void __init rx51_charger_init(void) | ||
134 | { | ||
135 | WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO, | ||
136 | GPIOF_OUT_INIT_LOW, "isp1704_reset")); | ||
137 | |||
138 | platform_device_register(&rx51_charger_device); | ||
139 | } | ||
140 | |||
117 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | 141 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
118 | 142 | ||
119 | #define RX51_GPIO_CAMERA_LENS_COVER 110 | 143 | #define RX51_GPIO_CAMERA_LENS_COVER 110 |
@@ -557,10 +581,8 @@ static __init void rx51_init_si4713(void) | |||
557 | static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n) | 581 | static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n) |
558 | { | 582 | { |
559 | /* FIXME this gpio setup is just a placeholder for now */ | 583 | /* FIXME this gpio setup is just a placeholder for now */ |
560 | gpio_request(gpio + 6, "backlight_pwm"); | 584 | gpio_request_one(gpio + 6, GPIOF_OUT_INIT_LOW, "backlight_pwm"); |
561 | gpio_direction_output(gpio + 6, 0); | 585 | gpio_request_one(gpio + 7, GPIOF_OUT_INIT_HIGH, "speaker_en"); |
562 | gpio_request(gpio + 7, "speaker_en"); | ||
563 | gpio_direction_output(gpio + 7, 1); | ||
564 | 586 | ||
565 | return 0; | 587 | return 0; |
566 | } | 588 | } |
@@ -730,7 +752,7 @@ static struct twl4030_resconfig twl4030_rconfig[] __initdata = { | |||
730 | { .resource = RES_RESET, .devgroup = -1, | 752 | { .resource = RES_RESET, .devgroup = -1, |
731 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | 753 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 |
732 | }, | 754 | }, |
733 | { .resource = RES_Main_Ref, .devgroup = -1, | 755 | { .resource = RES_MAIN_REF, .devgroup = -1, |
734 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | 756 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 |
735 | }, | 757 | }, |
736 | { 0, 0}, | 758 | { 0, 0}, |
@@ -777,15 +799,6 @@ static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata_or_module = | |||
777 | .power_gpio = 98, | 799 | .power_gpio = 98, |
778 | }; | 800 | }; |
779 | 801 | ||
780 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = { | ||
781 | { | ||
782 | I2C_BOARD_INFO("twl5030", 0x48), | ||
783 | .flags = I2C_CLIENT_WAKE, | ||
784 | .irq = INT_34XX_SYS_NIRQ, | ||
785 | .platform_data = &rx51_twldata, | ||
786 | }, | ||
787 | }; | ||
788 | |||
789 | /* Audio setup data */ | 802 | /* Audio setup data */ |
790 | static struct aic3x_setup_data rx51_aic34_setup = { | 803 | static struct aic3x_setup_data rx51_aic34_setup = { |
791 | .gpio_func[0] = AIC3X_GPIO1_FUNC_DISABLED, | 804 | .gpio_func[0] = AIC3X_GPIO1_FUNC_DISABLED, |
@@ -833,8 +846,7 @@ static int __init rx51_i2c_init(void) | |||
833 | rx51_twldata.vaux3 = &rx51_vaux3_cam; | 846 | rx51_twldata.vaux3 = &rx51_vaux3_cam; |
834 | } | 847 | } |
835 | rx51_twldata.vmmc2 = &rx51_vmmc2; | 848 | rx51_twldata.vmmc2 = &rx51_vmmc2; |
836 | omap_register_i2c_bus(1, 2200, rx51_peripherals_i2c_board_info_1, | 849 | omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata); |
837 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_1)); | ||
838 | omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, | 850 | omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, |
839 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); | 851 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); |
840 | omap_register_i2c_bus(3, 400, NULL, 0); | 852 | omap_register_i2c_bus(3, 400, NULL, 0); |
@@ -921,26 +933,20 @@ static void rx51_wl1251_set_power(bool enable) | |||
921 | gpio_set_value(RX51_WL1251_POWER_GPIO, enable); | 933 | gpio_set_value(RX51_WL1251_POWER_GPIO, enable); |
922 | } | 934 | } |
923 | 935 | ||
936 | static struct gpio rx51_wl1251_gpios[] __initdata = { | ||
937 | { RX51_WL1251_POWER_GPIO, GPIOF_OUT_INIT_LOW, "wl1251 power" }, | ||
938 | { RX51_WL1251_IRQ_GPIO, GPIOF_IN, "wl1251 irq" }, | ||
939 | }; | ||
940 | |||
924 | static void __init rx51_init_wl1251(void) | 941 | static void __init rx51_init_wl1251(void) |
925 | { | 942 | { |
926 | int irq, ret; | 943 | int irq, ret; |
927 | 944 | ||
928 | ret = gpio_request(RX51_WL1251_POWER_GPIO, "wl1251 power"); | 945 | ret = gpio_request_array(rx51_wl1251_gpios, |
946 | ARRAY_SIZE(rx51_wl1251_gpios)); | ||
929 | if (ret < 0) | 947 | if (ret < 0) |
930 | goto error; | 948 | goto error; |
931 | 949 | ||
932 | ret = gpio_direction_output(RX51_WL1251_POWER_GPIO, 0); | ||
933 | if (ret < 0) | ||
934 | goto err_power; | ||
935 | |||
936 | ret = gpio_request(RX51_WL1251_IRQ_GPIO, "wl1251 irq"); | ||
937 | if (ret < 0) | ||
938 | goto err_power; | ||
939 | |||
940 | ret = gpio_direction_input(RX51_WL1251_IRQ_GPIO); | ||
941 | if (ret < 0) | ||
942 | goto err_irq; | ||
943 | |||
944 | irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO); | 950 | irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO); |
945 | if (irq < 0) | 951 | if (irq < 0) |
946 | goto err_irq; | 952 | goto err_irq; |
@@ -952,10 +958,7 @@ static void __init rx51_init_wl1251(void) | |||
952 | 958 | ||
953 | err_irq: | 959 | err_irq: |
954 | gpio_free(RX51_WL1251_IRQ_GPIO); | 960 | gpio_free(RX51_WL1251_IRQ_GPIO); |
955 | |||
956 | err_power: | ||
957 | gpio_free(RX51_WL1251_POWER_GPIO); | 961 | gpio_free(RX51_WL1251_POWER_GPIO); |
958 | |||
959 | error: | 962 | error: |
960 | printk(KERN_ERR "wl1251 board initialisation failed\n"); | 963 | printk(KERN_ERR "wl1251 board initialisation failed\n"); |
961 | wl1251_pdata.set_power = NULL; | 964 | wl1251_pdata.set_power = NULL; |
@@ -981,6 +984,6 @@ void __init rx51_peripherals_init(void) | |||
981 | if (partition) | 984 | if (partition) |
982 | omap2_hsmmc_init(mmc); | 985 | omap2_hsmmc_init(mmc); |
983 | 986 | ||
984 | platform_device_register(&rx51_charger_device); | 987 | rx51_charger_init(); |
985 | } | 988 | } |
986 | 989 | ||
diff --git a/arch/arm/mach-omap2/board-rx51-video.c b/arch/arm/mach-omap2/board-rx51-video.c index 2df10b6a5940..2c1289bd5e6a 100644 --- a/arch/arm/mach-omap2/board-rx51-video.c +++ b/arch/arm/mach-omap2/board-rx51-video.c | |||
@@ -76,13 +76,12 @@ static int __init rx51_video_init(void) | |||
76 | return 0; | 76 | return 0; |
77 | } | 77 | } |
78 | 78 | ||
79 | if (gpio_request(RX51_LCD_RESET_GPIO, "LCD ACX565AKM reset")) { | 79 | if (gpio_request_one(RX51_LCD_RESET_GPIO, GPIOF_OUT_INIT_HIGH, |
80 | "LCD ACX565AKM reset")) { | ||
80 | pr_err("%s failed to get LCD Reset GPIO\n", __func__); | 81 | pr_err("%s failed to get LCD Reset GPIO\n", __func__); |
81 | return 0; | 82 | return 0; |
82 | } | 83 | } |
83 | 84 | ||
84 | gpio_direction_output(RX51_LCD_RESET_GPIO, 1); | ||
85 | |||
86 | omap_display_init(&rx51_dss_board_info); | 85 | omap_display_init(&rx51_dss_board_info); |
87 | return 0; | 86 | return 0; |
88 | } | 87 | } |
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index f8ba20a14e62..fec4cac8fa0a 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c | |||
@@ -58,21 +58,25 @@ static struct platform_device leds_gpio = { | |||
58 | }, | 58 | }, |
59 | }; | 59 | }; |
60 | 60 | ||
61 | /* | ||
62 | * cpuidle C-states definition override from the default values. | ||
63 | * The 'exit_latency' field is the sum of sleep and wake-up latencies. | ||
64 | */ | ||
61 | static struct cpuidle_params rx51_cpuidle_params[] = { | 65 | static struct cpuidle_params rx51_cpuidle_params[] = { |
62 | /* C1 */ | 66 | /* C1 */ |
63 | {1, 110, 162, 5}, | 67 | {110 + 162, 5 , 1}, |
64 | /* C2 */ | 68 | /* C2 */ |
65 | {1, 106, 180, 309}, | 69 | {106 + 180, 309, 1}, |
66 | /* C3 */ | 70 | /* C3 */ |
67 | {0, 107, 410, 46057}, | 71 | {107 + 410, 46057, 0}, |
68 | /* C4 */ | 72 | /* C4 */ |
69 | {0, 121, 3374, 46057}, | 73 | {121 + 3374, 46057, 0}, |
70 | /* C5 */ | 74 | /* C5 */ |
71 | {1, 855, 1146, 46057}, | 75 | {855 + 1146, 46057, 1}, |
72 | /* C6 */ | 76 | /* C6 */ |
73 | {0, 7580, 4134, 484329}, | 77 | {7580 + 4134, 484329, 0}, |
74 | /* C7 */ | 78 | /* C7 */ |
75 | {1, 7505, 15274, 484329}, | 79 | {7505 + 15274, 484329, 1}, |
76 | }; | 80 | }; |
77 | 81 | ||
78 | static struct omap_lcd_config rx51_lcd_config = { | 82 | static struct omap_lcd_config rx51_lcd_config = { |
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c index 007ebdc6c993..6402e781c458 100644 --- a/arch/arm/mach-omap2/board-zoom-debugboard.c +++ b/arch/arm/mach-omap2/board-zoom-debugboard.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/interrupt.h> | 15 | #include <linux/interrupt.h> |
16 | 16 | ||
17 | #include <plat/gpmc.h> | 17 | #include <plat/gpmc.h> |
18 | #include <plat/gpmc-smsc911x.h> | ||
18 | 19 | ||
19 | #include <mach/board-zoom.h> | 20 | #include <mach/board-zoom.h> |
20 | 21 | ||
@@ -26,60 +27,16 @@ | |||
26 | #define DEBUG_BASE 0x08000000 | 27 | #define DEBUG_BASE 0x08000000 |
27 | #define ZOOM_ETHR_START DEBUG_BASE | 28 | #define ZOOM_ETHR_START DEBUG_BASE |
28 | 29 | ||
29 | static struct resource zoom_smsc911x_resources[] = { | 30 | static struct omap_smsc911x_platform_data zoom_smsc911x_cfg = { |
30 | [0] = { | 31 | .cs = ZOOM_SMSC911X_CS, |
31 | .start = ZOOM_ETHR_START, | 32 | .gpio_irq = ZOOM_SMSC911X_GPIO, |
32 | .end = ZOOM_ETHR_START + SZ_4K, | 33 | .gpio_reset = -EINVAL, |
33 | .flags = IORESOURCE_MEM, | ||
34 | }, | ||
35 | [1] = { | ||
36 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | ||
37 | }, | ||
38 | }; | ||
39 | |||
40 | static struct smsc911x_platform_config zoom_smsc911x_config = { | ||
41 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | ||
42 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | ||
43 | .flags = SMSC911X_USE_32BIT, | 34 | .flags = SMSC911X_USE_32BIT, |
44 | .phy_interface = PHY_INTERFACE_MODE_MII, | ||
45 | }; | ||
46 | |||
47 | static struct platform_device zoom_smsc911x_device = { | ||
48 | .name = "smsc911x", | ||
49 | .id = -1, | ||
50 | .num_resources = ARRAY_SIZE(zoom_smsc911x_resources), | ||
51 | .resource = zoom_smsc911x_resources, | ||
52 | .dev = { | ||
53 | .platform_data = &zoom_smsc911x_config, | ||
54 | }, | ||
55 | }; | 35 | }; |
56 | 36 | ||
57 | static inline void __init zoom_init_smsc911x(void) | 37 | static inline void __init zoom_init_smsc911x(void) |
58 | { | 38 | { |
59 | int eth_cs; | 39 | gpmc_smsc911x_init(&zoom_smsc911x_cfg); |
60 | unsigned long cs_mem_base; | ||
61 | int eth_gpio = 0; | ||
62 | |||
63 | eth_cs = ZOOM_SMSC911X_CS; | ||
64 | |||
65 | if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) { | ||
66 | printk(KERN_ERR "Failed to request GPMC mem for smsc911x\n"); | ||
67 | return; | ||
68 | } | ||
69 | |||
70 | zoom_smsc911x_resources[0].start = cs_mem_base + 0x0; | ||
71 | zoom_smsc911x_resources[0].end = cs_mem_base + 0xff; | ||
72 | |||
73 | eth_gpio = ZOOM_SMSC911X_GPIO; | ||
74 | |||
75 | zoom_smsc911x_resources[1].start = OMAP_GPIO_IRQ(eth_gpio); | ||
76 | |||
77 | if (gpio_request(eth_gpio, "smsc911x irq") < 0) { | ||
78 | printk(KERN_ERR "Failed to request GPIO%d for smsc911x IRQ\n", | ||
79 | eth_gpio); | ||
80 | return; | ||
81 | } | ||
82 | gpio_direction_input(eth_gpio); | ||
83 | } | 40 | } |
84 | 41 | ||
85 | static struct plat_serial8250_port serial_platform_data[] = { | 42 | static struct plat_serial8250_port serial_platform_data[] = { |
@@ -120,12 +77,9 @@ static inline void __init zoom_init_quaduart(void) | |||
120 | 77 | ||
121 | quart_gpio = ZOOM_QUADUART_GPIO; | 78 | quart_gpio = ZOOM_QUADUART_GPIO; |
122 | 79 | ||
123 | if (gpio_request(quart_gpio, "TL16CP754C GPIO") < 0) { | 80 | if (gpio_request_one(quart_gpio, GPIOF_IN, "TL16CP754C GPIO") < 0) |
124 | printk(KERN_ERR "Failed to request GPIO%d for TL16CP754C\n", | 81 | printk(KERN_ERR "Failed to request GPIO%d for TL16CP754C\n", |
125 | quart_gpio); | 82 | quart_gpio); |
126 | return; | ||
127 | } | ||
128 | gpio_direction_input(quart_gpio); | ||
129 | } | 83 | } |
130 | 84 | ||
131 | static inline int omap_zoom_debugboard_detect(void) | 85 | static inline int omap_zoom_debugboard_detect(void) |
@@ -135,12 +89,12 @@ static inline int omap_zoom_debugboard_detect(void) | |||
135 | 89 | ||
136 | debug_board_detect = ZOOM_SMSC911X_GPIO; | 90 | debug_board_detect = ZOOM_SMSC911X_GPIO; |
137 | 91 | ||
138 | if (gpio_request(debug_board_detect, "Zoom debug board detect") < 0) { | 92 | if (gpio_request_one(debug_board_detect, GPIOF_IN, |
93 | "Zoom debug board detect") < 0) { | ||
139 | printk(KERN_ERR "Failed to request GPIO%d for Zoom debug" | 94 | printk(KERN_ERR "Failed to request GPIO%d for Zoom debug" |
140 | "board detect\n", debug_board_detect); | 95 | "board detect\n", debug_board_detect); |
141 | return 0; | 96 | return 0; |
142 | } | 97 | } |
143 | gpio_direction_input(debug_board_detect); | ||
144 | 98 | ||
145 | if (!gpio_get_value(debug_board_detect)) { | 99 | if (!gpio_get_value(debug_board_detect)) { |
146 | ret = 0; | 100 | ret = 0; |
@@ -150,7 +104,6 @@ static inline int omap_zoom_debugboard_detect(void) | |||
150 | } | 104 | } |
151 | 105 | ||
152 | static struct platform_device *zoom_devices[] __initdata = { | 106 | static struct platform_device *zoom_devices[] __initdata = { |
153 | &zoom_smsc911x_device, | ||
154 | &zoom_debugboard_serial_device, | 107 | &zoom_debugboard_serial_device, |
155 | }; | 108 | }; |
156 | 109 | ||
diff --git a/arch/arm/mach-omap2/board-zoom-display.c b/arch/arm/mach-omap2/board-zoom-display.c index 60e8645db59d..c7c6beb1ec24 100644 --- a/arch/arm/mach-omap2/board-zoom-display.c +++ b/arch/arm/mach-omap2/board-zoom-display.c | |||
@@ -21,34 +21,19 @@ | |||
21 | #define LCD_PANEL_RESET_GPIO_PILOT 55 | 21 | #define LCD_PANEL_RESET_GPIO_PILOT 55 |
22 | #define LCD_PANEL_QVGA_GPIO 56 | 22 | #define LCD_PANEL_QVGA_GPIO 56 |
23 | 23 | ||
24 | static struct gpio zoom_lcd_gpios[] __initdata = { | ||
25 | { -EINVAL, GPIOF_OUT_INIT_HIGH, "lcd reset" }, | ||
26 | { LCD_PANEL_QVGA_GPIO, GPIOF_OUT_INIT_HIGH, "lcd qvga" }, | ||
27 | }; | ||
28 | |||
24 | static void zoom_lcd_panel_init(void) | 29 | static void zoom_lcd_panel_init(void) |
25 | { | 30 | { |
26 | int ret; | 31 | zoom_lcd_gpios[0].gpio = (omap_rev() > OMAP3430_REV_ES3_0) ? |
27 | unsigned char lcd_panel_reset_gpio; | ||
28 | |||
29 | lcd_panel_reset_gpio = (omap_rev() > OMAP3430_REV_ES3_0) ? | ||
30 | LCD_PANEL_RESET_GPIO_PROD : | 32 | LCD_PANEL_RESET_GPIO_PROD : |
31 | LCD_PANEL_RESET_GPIO_PILOT; | 33 | LCD_PANEL_RESET_GPIO_PILOT; |
32 | 34 | ||
33 | ret = gpio_request(lcd_panel_reset_gpio, "lcd reset"); | 35 | if (gpio_request_array(zoom_lcd_gpios, ARRAY_SIZE(zoom_lcd_gpios))) |
34 | if (ret) { | 36 | pr_err("%s: Failed to get LCD GPIOs.\n", __func__); |
35 | pr_err("Failed to get LCD reset GPIO (gpio%d).\n", | ||
36 | lcd_panel_reset_gpio); | ||
37 | return; | ||
38 | } | ||
39 | gpio_direction_output(lcd_panel_reset_gpio, 1); | ||
40 | |||
41 | ret = gpio_request(LCD_PANEL_QVGA_GPIO, "lcd qvga"); | ||
42 | if (ret) { | ||
43 | pr_err("Failed to get LCD_PANEL_QVGA_GPIO (gpio%d).\n", | ||
44 | LCD_PANEL_QVGA_GPIO); | ||
45 | goto err0; | ||
46 | } | ||
47 | gpio_direction_output(LCD_PANEL_QVGA_GPIO, 1); | ||
48 | |||
49 | return; | ||
50 | err0: | ||
51 | gpio_free(lcd_panel_reset_gpio); | ||
52 | } | 37 | } |
53 | 38 | ||
54 | static int zoom_panel_enable_lcd(struct omap_dss_device *dssdev) | 39 | static int zoom_panel_enable_lcd(struct omap_dss_device *dssdev) |
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c index 8dee7549fbdf..118c6f53c5eb 100644 --- a/arch/arm/mach-omap2/board-zoom-peripherals.c +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c | |||
@@ -31,6 +31,7 @@ | |||
31 | 31 | ||
32 | #include "mux.h" | 32 | #include "mux.h" |
33 | #include "hsmmc.h" | 33 | #include "hsmmc.h" |
34 | #include "common-board-devices.h" | ||
34 | 35 | ||
35 | #define OMAP_ZOOM_WLAN_PMENA_GPIO (101) | 36 | #define OMAP_ZOOM_WLAN_PMENA_GPIO (101) |
36 | #define OMAP_ZOOM_WLAN_IRQ_GPIO (162) | 37 | #define OMAP_ZOOM_WLAN_IRQ_GPIO (162) |
@@ -276,13 +277,11 @@ static int zoom_twl_gpio_setup(struct device *dev, | |||
276 | zoom_vsim_supply.dev = mmc[0].dev; | 277 | zoom_vsim_supply.dev = mmc[0].dev; |
277 | zoom_vmmc2_supply.dev = mmc[1].dev; | 278 | zoom_vmmc2_supply.dev = mmc[1].dev; |
278 | 279 | ||
279 | ret = gpio_request(LCD_PANEL_ENABLE_GPIO, "lcd enable"); | 280 | ret = gpio_request_one(LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, |
280 | if (ret) { | 281 | "lcd enable"); |
282 | if (ret) | ||
281 | pr_err("Failed to get LCD_PANEL_ENABLE_GPIO (gpio%d).\n", | 283 | pr_err("Failed to get LCD_PANEL_ENABLE_GPIO (gpio%d).\n", |
282 | LCD_PANEL_ENABLE_GPIO); | 284 | LCD_PANEL_ENABLE_GPIO); |
283 | return ret; | ||
284 | } | ||
285 | gpio_direction_output(LCD_PANEL_ENABLE_GPIO, 0); | ||
286 | 285 | ||
287 | return ret; | 286 | return ret; |
288 | } | 287 | } |
@@ -349,15 +348,6 @@ static struct twl4030_platform_data zoom_twldata = { | |||
349 | .vdac = &zoom_vdac, | 348 | .vdac = &zoom_vdac, |
350 | }; | 349 | }; |
351 | 350 | ||
352 | static struct i2c_board_info __initdata zoom_i2c_boardinfo[] = { | ||
353 | { | ||
354 | I2C_BOARD_INFO("twl5030", 0x48), | ||
355 | .flags = I2C_CLIENT_WAKE, | ||
356 | .irq = INT_34XX_SYS_NIRQ, | ||
357 | .platform_data = &zoom_twldata, | ||
358 | }, | ||
359 | }; | ||
360 | |||
361 | static int __init omap_i2c_init(void) | 351 | static int __init omap_i2c_init(void) |
362 | { | 352 | { |
363 | if (machine_is_omap_zoom2()) { | 353 | if (machine_is_omap_zoom2()) { |
@@ -365,19 +355,12 @@ static int __init omap_i2c_init(void) | |||
365 | zoom_audio_data.hs_extmute = 1; | 355 | zoom_audio_data.hs_extmute = 1; |
366 | zoom_audio_data.set_hs_extmute = zoom2_set_hs_extmute; | 356 | zoom_audio_data.set_hs_extmute = zoom2_set_hs_extmute; |
367 | } | 357 | } |
368 | omap_register_i2c_bus(1, 2400, zoom_i2c_boardinfo, | 358 | omap_pmic_init(1, 2400, "twl5030", INT_34XX_SYS_NIRQ, &zoom_twldata); |
369 | ARRAY_SIZE(zoom_i2c_boardinfo)); | ||
370 | omap_register_i2c_bus(2, 400, NULL, 0); | 359 | omap_register_i2c_bus(2, 400, NULL, 0); |
371 | omap_register_i2c_bus(3, 400, NULL, 0); | 360 | omap_register_i2c_bus(3, 400, NULL, 0); |
372 | return 0; | 361 | return 0; |
373 | } | 362 | } |
374 | 363 | ||
375 | static struct omap_musb_board_data musb_board_data = { | ||
376 | .interface_type = MUSB_INTERFACE_ULPI, | ||
377 | .mode = MUSB_OTG, | ||
378 | .power = 100, | ||
379 | }; | ||
380 | |||
381 | static void enable_board_wakeup_source(void) | 364 | static void enable_board_wakeup_source(void) |
382 | { | 365 | { |
383 | /* T2 interrupt line (keypad) */ | 366 | /* T2 interrupt line (keypad) */ |
@@ -392,7 +375,7 @@ void __init zoom_peripherals_init(void) | |||
392 | 375 | ||
393 | omap_i2c_init(); | 376 | omap_i2c_init(); |
394 | platform_device_register(&omap_vwlan_device); | 377 | platform_device_register(&omap_vwlan_device); |
395 | usb_musb_init(&musb_board_data); | 378 | usb_musb_init(NULL); |
396 | enable_board_wakeup_source(); | 379 | enable_board_wakeup_source(); |
397 | omap_serial_init(); | 380 | omap_serial_init(); |
398 | } | 381 | } |
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c new file mode 100644 index 000000000000..e94903b2c65b --- /dev/null +++ b/arch/arm/mach-omap2/common-board-devices.c | |||
@@ -0,0 +1,163 @@ | |||
1 | /* | ||
2 | * common-board-devices.c | ||
3 | * | ||
4 | * Copyright (C) 2011 CompuLab, Ltd. | ||
5 | * Author: Mike Rapoport <mike@compulab.co.il> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * version 2 as published by the Free Software Foundation. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, but | ||
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
14 | * General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
19 | * 02110-1301 USA | ||
20 | * | ||
21 | */ | ||
22 | |||
23 | #include <linux/i2c.h> | ||
24 | #include <linux/i2c/twl.h> | ||
25 | |||
26 | #include <linux/gpio.h> | ||
27 | #include <linux/spi/spi.h> | ||
28 | #include <linux/spi/ads7846.h> | ||
29 | |||
30 | #include <plat/i2c.h> | ||
31 | #include <plat/mcspi.h> | ||
32 | #include <plat/nand.h> | ||
33 | |||
34 | #include "common-board-devices.h" | ||
35 | |||
36 | static struct i2c_board_info __initdata pmic_i2c_board_info = { | ||
37 | .addr = 0x48, | ||
38 | .flags = I2C_CLIENT_WAKE, | ||
39 | }; | ||
40 | |||
41 | void __init omap_pmic_init(int bus, u32 clkrate, | ||
42 | const char *pmic_type, int pmic_irq, | ||
43 | struct twl4030_platform_data *pmic_data) | ||
44 | { | ||
45 | strncpy(pmic_i2c_board_info.type, pmic_type, | ||
46 | sizeof(pmic_i2c_board_info.type)); | ||
47 | pmic_i2c_board_info.irq = pmic_irq; | ||
48 | pmic_i2c_board_info.platform_data = pmic_data; | ||
49 | |||
50 | omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); | ||
51 | } | ||
52 | |||
53 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ | ||
54 | defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | ||
55 | static struct omap2_mcspi_device_config ads7846_mcspi_config = { | ||
56 | .turbo_mode = 0, | ||
57 | .single_channel = 1, /* 0: slave, 1: master */ | ||
58 | }; | ||
59 | |||
60 | static struct ads7846_platform_data ads7846_config = { | ||
61 | .x_max = 0x0fff, | ||
62 | .y_max = 0x0fff, | ||
63 | .x_plate_ohms = 180, | ||
64 | .pressure_max = 255, | ||
65 | .debounce_max = 10, | ||
66 | .debounce_tol = 3, | ||
67 | .debounce_rep = 1, | ||
68 | .gpio_pendown = -EINVAL, | ||
69 | .keep_vref_on = 1, | ||
70 | }; | ||
71 | |||
72 | static struct spi_board_info ads7846_spi_board_info __initdata = { | ||
73 | .modalias = "ads7846", | ||
74 | .bus_num = -EINVAL, | ||
75 | .chip_select = 0, | ||
76 | .max_speed_hz = 1500000, | ||
77 | .controller_data = &ads7846_mcspi_config, | ||
78 | .irq = -EINVAL, | ||
79 | .platform_data = &ads7846_config, | ||
80 | }; | ||
81 | |||
82 | void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, | ||
83 | struct ads7846_platform_data *board_pdata) | ||
84 | { | ||
85 | struct spi_board_info *spi_bi = &ads7846_spi_board_info; | ||
86 | int err; | ||
87 | |||
88 | err = gpio_request(gpio_pendown, "TS PenDown"); | ||
89 | if (err) { | ||
90 | pr_err("Could not obtain gpio for TS PenDown: %d\n", err); | ||
91 | return; | ||
92 | } | ||
93 | |||
94 | gpio_direction_input(gpio_pendown); | ||
95 | gpio_export(gpio_pendown, 0); | ||
96 | |||
97 | if (gpio_debounce) | ||
98 | gpio_set_debounce(gpio_pendown, gpio_debounce); | ||
99 | |||
100 | ads7846_config.gpio_pendown = gpio_pendown; | ||
101 | |||
102 | spi_bi->bus_num = bus_num; | ||
103 | spi_bi->irq = OMAP_GPIO_IRQ(gpio_pendown); | ||
104 | |||
105 | if (board_pdata) | ||
106 | spi_bi->platform_data = board_pdata; | ||
107 | |||
108 | spi_register_board_info(&ads7846_spi_board_info, 1); | ||
109 | } | ||
110 | #else | ||
111 | void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, | ||
112 | struct ads7846_platform_data *board_pdata) | ||
113 | { | ||
114 | } | ||
115 | #endif | ||
116 | |||
117 | #if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE) | ||
118 | static struct omap_nand_platform_data nand_data = { | ||
119 | .dma_channel = -1, /* disable DMA in OMAP NAND driver */ | ||
120 | }; | ||
121 | |||
122 | void __init omap_nand_flash_init(int options, struct mtd_partition *parts, | ||
123 | int nr_parts) | ||
124 | { | ||
125 | u8 cs = 0; | ||
126 | u8 nandcs = GPMC_CS_NUM + 1; | ||
127 | |||
128 | /* find out the chip-select on which NAND exists */ | ||
129 | while (cs < GPMC_CS_NUM) { | ||
130 | u32 ret = 0; | ||
131 | ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); | ||
132 | |||
133 | if ((ret & 0xC00) == 0x800) { | ||
134 | printk(KERN_INFO "Found NAND on CS%d\n", cs); | ||
135 | if (nandcs > GPMC_CS_NUM) | ||
136 | nandcs = cs; | ||
137 | } | ||
138 | cs++; | ||
139 | } | ||
140 | |||
141 | if (nandcs > GPMC_CS_NUM) { | ||
142 | printk(KERN_INFO "NAND: Unable to find configuration " | ||
143 | "in GPMC\n "); | ||
144 | return; | ||
145 | } | ||
146 | |||
147 | if (nandcs < GPMC_CS_NUM) { | ||
148 | nand_data.cs = nandcs; | ||
149 | nand_data.parts = parts; | ||
150 | nand_data.nr_parts = nr_parts; | ||
151 | nand_data.options = options; | ||
152 | |||
153 | printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); | ||
154 | if (gpmc_nand_init(&nand_data) < 0) | ||
155 | printk(KERN_ERR "Unable to register NAND device\n"); | ||
156 | } | ||
157 | } | ||
158 | #else | ||
159 | void __init omap_nand_flash_init(int options, struct mtd_partition *parts, | ||
160 | int nr_parts) | ||
161 | { | ||
162 | } | ||
163 | #endif | ||
diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h new file mode 100644 index 000000000000..eb80b3b0ef47 --- /dev/null +++ b/arch/arm/mach-omap2/common-board-devices.h | |||
@@ -0,0 +1,35 @@ | |||
1 | #ifndef __OMAP_COMMON_BOARD_DEVICES__ | ||
2 | #define __OMAP_COMMON_BOARD_DEVICES__ | ||
3 | |||
4 | struct twl4030_platform_data; | ||
5 | struct mtd_partition; | ||
6 | |||
7 | void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, | ||
8 | struct twl4030_platform_data *pmic_data); | ||
9 | |||
10 | static inline void omap2_pmic_init(const char *pmic_type, | ||
11 | struct twl4030_platform_data *pmic_data) | ||
12 | { | ||
13 | omap_pmic_init(2, 2600, pmic_type, INT_24XX_SYS_NIRQ, pmic_data); | ||
14 | } | ||
15 | |||
16 | static inline void omap3_pmic_init(const char *pmic_type, | ||
17 | struct twl4030_platform_data *pmic_data) | ||
18 | { | ||
19 | omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data); | ||
20 | } | ||
21 | |||
22 | static inline void omap4_pmic_init(const char *pmic_type, | ||
23 | struct twl4030_platform_data *pmic_data) | ||
24 | { | ||
25 | /* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */ | ||
26 | omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data); | ||
27 | } | ||
28 | |||
29 | struct ads7846_platform_data; | ||
30 | |||
31 | void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, | ||
32 | struct ads7846_platform_data *board_pdata); | ||
33 | void omap_nand_flash_init(int opts, struct mtd_partition *parts, int n_parts); | ||
34 | |||
35 | #endif /* __OMAP_COMMON_BOARD_DEVICES__ */ | ||
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 1c240eff3918..4bf6e6e8b100 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c | |||
@@ -36,36 +36,6 @@ | |||
36 | 36 | ||
37 | #ifdef CONFIG_CPU_IDLE | 37 | #ifdef CONFIG_CPU_IDLE |
38 | 38 | ||
39 | #define OMAP3_MAX_STATES 7 | ||
40 | #define OMAP3_STATE_C1 0 /* C1 - MPU WFI + Core active */ | ||
41 | #define OMAP3_STATE_C2 1 /* C2 - MPU WFI + Core inactive */ | ||
42 | #define OMAP3_STATE_C3 2 /* C3 - MPU CSWR + Core inactive */ | ||
43 | #define OMAP3_STATE_C4 3 /* C4 - MPU OFF + Core iactive */ | ||
44 | #define OMAP3_STATE_C5 4 /* C5 - MPU RET + Core RET */ | ||
45 | #define OMAP3_STATE_C6 5 /* C6 - MPU OFF + Core RET */ | ||
46 | #define OMAP3_STATE_C7 6 /* C7 - MPU OFF + Core OFF */ | ||
47 | |||
48 | #define OMAP3_STATE_MAX OMAP3_STATE_C7 | ||
49 | |||
50 | #define CPUIDLE_FLAG_CHECK_BM 0x10000 /* use omap3_enter_idle_bm() */ | ||
51 | |||
52 | struct omap3_processor_cx { | ||
53 | u8 valid; | ||
54 | u8 type; | ||
55 | u32 sleep_latency; | ||
56 | u32 wakeup_latency; | ||
57 | u32 mpu_state; | ||
58 | u32 core_state; | ||
59 | u32 threshold; | ||
60 | u32 flags; | ||
61 | const char *desc; | ||
62 | }; | ||
63 | |||
64 | struct omap3_processor_cx omap3_power_states[OMAP3_MAX_STATES]; | ||
65 | struct omap3_processor_cx current_cx_state; | ||
66 | struct powerdomain *mpu_pd, *core_pd, *per_pd; | ||
67 | struct powerdomain *cam_pd; | ||
68 | |||
69 | /* | 39 | /* |
70 | * The latencies/thresholds for various C states have | 40 | * The latencies/thresholds for various C states have |
71 | * to be configured from the respective board files. | 41 | * to be configured from the respective board files. |
@@ -75,27 +45,31 @@ struct powerdomain *cam_pd; | |||
75 | */ | 45 | */ |
76 | static struct cpuidle_params cpuidle_params_table[] = { | 46 | static struct cpuidle_params cpuidle_params_table[] = { |
77 | /* C1 */ | 47 | /* C1 */ |
78 | {1, 2, 2, 5}, | 48 | {2 + 2, 5, 1}, |
79 | /* C2 */ | 49 | /* C2 */ |
80 | {1, 10, 10, 30}, | 50 | {10 + 10, 30, 1}, |
81 | /* C3 */ | 51 | /* C3 */ |
82 | {1, 50, 50, 300}, | 52 | {50 + 50, 300, 1}, |
83 | /* C4 */ | 53 | /* C4 */ |
84 | {1, 1500, 1800, 4000}, | 54 | {1500 + 1800, 4000, 1}, |
85 | /* C5 */ | 55 | /* C5 */ |
86 | {1, 2500, 7500, 12000}, | 56 | {2500 + 7500, 12000, 1}, |
87 | /* C6 */ | 57 | /* C6 */ |
88 | {1, 3000, 8500, 15000}, | 58 | {3000 + 8500, 15000, 1}, |
89 | /* C7 */ | 59 | /* C7 */ |
90 | {1, 10000, 30000, 300000}, | 60 | {10000 + 30000, 300000, 1}, |
91 | }; | 61 | }; |
62 | #define OMAP3_NUM_STATES ARRAY_SIZE(cpuidle_params_table) | ||
92 | 63 | ||
93 | static int omap3_idle_bm_check(void) | 64 | /* Mach specific information to be recorded in the C-state driver_data */ |
94 | { | 65 | struct omap3_idle_statedata { |
95 | if (!omap3_can_sleep()) | 66 | u32 mpu_state; |
96 | return 1; | 67 | u32 core_state; |
97 | return 0; | 68 | u8 valid; |
98 | } | 69 | }; |
70 | struct omap3_idle_statedata omap3_idle_data[OMAP3_NUM_STATES]; | ||
71 | |||
72 | struct powerdomain *mpu_pd, *core_pd, *per_pd, *cam_pd; | ||
99 | 73 | ||
100 | static int _cpuidle_allow_idle(struct powerdomain *pwrdm, | 74 | static int _cpuidle_allow_idle(struct powerdomain *pwrdm, |
101 | struct clockdomain *clkdm) | 75 | struct clockdomain *clkdm) |
@@ -122,12 +96,10 @@ static int _cpuidle_deny_idle(struct powerdomain *pwrdm, | |||
122 | static int omap3_enter_idle(struct cpuidle_device *dev, | 96 | static int omap3_enter_idle(struct cpuidle_device *dev, |
123 | struct cpuidle_state *state) | 97 | struct cpuidle_state *state) |
124 | { | 98 | { |
125 | struct omap3_processor_cx *cx = cpuidle_get_statedata(state); | 99 | struct omap3_idle_statedata *cx = cpuidle_get_statedata(state); |
126 | struct timespec ts_preidle, ts_postidle, ts_idle; | 100 | struct timespec ts_preidle, ts_postidle, ts_idle; |
127 | u32 mpu_state = cx->mpu_state, core_state = cx->core_state; | 101 | u32 mpu_state = cx->mpu_state, core_state = cx->core_state; |
128 | 102 | ||
129 | current_cx_state = *cx; | ||
130 | |||
131 | /* Used to keep track of the total time in idle */ | 103 | /* Used to keep track of the total time in idle */ |
132 | getnstimeofday(&ts_preidle); | 104 | getnstimeofday(&ts_preidle); |
133 | 105 | ||
@@ -140,7 +112,8 @@ static int omap3_enter_idle(struct cpuidle_device *dev, | |||
140 | if (omap_irq_pending() || need_resched()) | 112 | if (omap_irq_pending() || need_resched()) |
141 | goto return_sleep_time; | 113 | goto return_sleep_time; |
142 | 114 | ||
143 | if (cx->type == OMAP3_STATE_C1) { | 115 | /* Deny idle for C1 */ |
116 | if (state == &dev->states[0]) { | ||
144 | pwrdm_for_each_clkdm(mpu_pd, _cpuidle_deny_idle); | 117 | pwrdm_for_each_clkdm(mpu_pd, _cpuidle_deny_idle); |
145 | pwrdm_for_each_clkdm(core_pd, _cpuidle_deny_idle); | 118 | pwrdm_for_each_clkdm(core_pd, _cpuidle_deny_idle); |
146 | } | 119 | } |
@@ -148,7 +121,8 @@ static int omap3_enter_idle(struct cpuidle_device *dev, | |||
148 | /* Execute ARM wfi */ | 121 | /* Execute ARM wfi */ |
149 | omap_sram_idle(); | 122 | omap_sram_idle(); |
150 | 123 | ||
151 | if (cx->type == OMAP3_STATE_C1) { | 124 | /* Re-allow idle for C1 */ |
125 | if (state == &dev->states[0]) { | ||
152 | pwrdm_for_each_clkdm(mpu_pd, _cpuidle_allow_idle); | 126 | pwrdm_for_each_clkdm(mpu_pd, _cpuidle_allow_idle); |
153 | pwrdm_for_each_clkdm(core_pd, _cpuidle_allow_idle); | 127 | pwrdm_for_each_clkdm(core_pd, _cpuidle_allow_idle); |
154 | } | 128 | } |
@@ -164,41 +138,53 @@ return_sleep_time: | |||
164 | } | 138 | } |
165 | 139 | ||
166 | /** | 140 | /** |
167 | * next_valid_state - Find next valid c-state | 141 | * next_valid_state - Find next valid C-state |
168 | * @dev: cpuidle device | 142 | * @dev: cpuidle device |
169 | * @state: Currently selected c-state | 143 | * @state: Currently selected C-state |
170 | * | 144 | * |
171 | * If the current state is valid, it is returned back to the caller. | 145 | * If the current state is valid, it is returned back to the caller. |
172 | * Else, this function searches for a lower c-state which is still | 146 | * Else, this function searches for a lower c-state which is still |
173 | * valid (as defined in omap3_power_states[]). | 147 | * valid. |
148 | * | ||
149 | * A state is valid if the 'valid' field is enabled and | ||
150 | * if it satisfies the enable_off_mode condition. | ||
174 | */ | 151 | */ |
175 | static struct cpuidle_state *next_valid_state(struct cpuidle_device *dev, | 152 | static struct cpuidle_state *next_valid_state(struct cpuidle_device *dev, |
176 | struct cpuidle_state *curr) | 153 | struct cpuidle_state *curr) |
177 | { | 154 | { |
178 | struct cpuidle_state *next = NULL; | 155 | struct cpuidle_state *next = NULL; |
179 | struct omap3_processor_cx *cx; | 156 | struct omap3_idle_statedata *cx = cpuidle_get_statedata(curr); |
157 | u32 mpu_deepest_state = PWRDM_POWER_RET; | ||
158 | u32 core_deepest_state = PWRDM_POWER_RET; | ||
180 | 159 | ||
181 | cx = (struct omap3_processor_cx *)cpuidle_get_statedata(curr); | 160 | if (enable_off_mode) { |
161 | mpu_deepest_state = PWRDM_POWER_OFF; | ||
162 | /* | ||
163 | * Erratum i583: valable for ES rev < Es1.2 on 3630. | ||
164 | * CORE OFF mode is not supported in a stable form, restrict | ||
165 | * instead the CORE state to RET. | ||
166 | */ | ||
167 | if (!IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583)) | ||
168 | core_deepest_state = PWRDM_POWER_OFF; | ||
169 | } | ||
182 | 170 | ||
183 | /* Check if current state is valid */ | 171 | /* Check if current state is valid */ |
184 | if (cx->valid) { | 172 | if ((cx->valid) && |
173 | (cx->mpu_state >= mpu_deepest_state) && | ||
174 | (cx->core_state >= core_deepest_state)) { | ||
185 | return curr; | 175 | return curr; |
186 | } else { | 176 | } else { |
187 | u8 idx = OMAP3_STATE_MAX; | 177 | int idx = OMAP3_NUM_STATES - 1; |
188 | 178 | ||
189 | /* | 179 | /* Reach the current state starting at highest C-state */ |
190 | * Reach the current state starting at highest C-state | 180 | for (; idx >= 0; idx--) { |
191 | */ | ||
192 | for (; idx >= OMAP3_STATE_C1; idx--) { | ||
193 | if (&dev->states[idx] == curr) { | 181 | if (&dev->states[idx] == curr) { |
194 | next = &dev->states[idx]; | 182 | next = &dev->states[idx]; |
195 | break; | 183 | break; |
196 | } | 184 | } |
197 | } | 185 | } |
198 | 186 | ||
199 | /* | 187 | /* Should never hit this condition */ |
200 | * Should never hit this condition. | ||
201 | */ | ||
202 | WARN_ON(next == NULL); | 188 | WARN_ON(next == NULL); |
203 | 189 | ||
204 | /* | 190 | /* |
@@ -206,17 +192,17 @@ static struct cpuidle_state *next_valid_state(struct cpuidle_device *dev, | |||
206 | * Start search from the next (lower) state. | 192 | * Start search from the next (lower) state. |
207 | */ | 193 | */ |
208 | idx--; | 194 | idx--; |
209 | for (; idx >= OMAP3_STATE_C1; idx--) { | 195 | for (; idx >= 0; idx--) { |
210 | struct omap3_processor_cx *cx; | ||
211 | |||
212 | cx = cpuidle_get_statedata(&dev->states[idx]); | 196 | cx = cpuidle_get_statedata(&dev->states[idx]); |
213 | if (cx->valid) { | 197 | if ((cx->valid) && |
198 | (cx->mpu_state >= mpu_deepest_state) && | ||
199 | (cx->core_state >= core_deepest_state)) { | ||
214 | next = &dev->states[idx]; | 200 | next = &dev->states[idx]; |
215 | break; | 201 | break; |
216 | } | 202 | } |
217 | } | 203 | } |
218 | /* | 204 | /* |
219 | * C1 and C2 are always valid. | 205 | * C1 is always valid. |
220 | * So, no need to check for 'next==NULL' outside this loop. | 206 | * So, no need to check for 'next==NULL' outside this loop. |
221 | */ | 207 | */ |
222 | } | 208 | } |
@@ -229,36 +215,22 @@ static struct cpuidle_state *next_valid_state(struct cpuidle_device *dev, | |||
229 | * @dev: cpuidle device | 215 | * @dev: cpuidle device |
230 | * @state: The target state to be programmed | 216 | * @state: The target state to be programmed |
231 | * | 217 | * |
232 | * Used for C states with CPUIDLE_FLAG_CHECK_BM flag set. This | 218 | * This function checks for any pending activity and then programs |
233 | * function checks for any pending activity and then programs the | 219 | * the device to the specified or a safer state. |
234 | * device to the specified or a safer state. | ||
235 | */ | 220 | */ |
236 | static int omap3_enter_idle_bm(struct cpuidle_device *dev, | 221 | static int omap3_enter_idle_bm(struct cpuidle_device *dev, |
237 | struct cpuidle_state *state) | 222 | struct cpuidle_state *state) |
238 | { | 223 | { |
239 | struct cpuidle_state *new_state = next_valid_state(dev, state); | 224 | struct cpuidle_state *new_state; |
240 | u32 core_next_state, per_next_state = 0, per_saved_state = 0; | 225 | u32 core_next_state, per_next_state = 0, per_saved_state = 0, cam_state; |
241 | u32 cam_state; | 226 | struct omap3_idle_statedata *cx; |
242 | struct omap3_processor_cx *cx; | ||
243 | int ret; | 227 | int ret; |
244 | 228 | ||
245 | if ((state->flags & CPUIDLE_FLAG_CHECK_BM) && omap3_idle_bm_check()) { | 229 | if (!omap3_can_sleep()) { |
246 | BUG_ON(!dev->safe_state); | ||
247 | new_state = dev->safe_state; | 230 | new_state = dev->safe_state; |
248 | goto select_state; | 231 | goto select_state; |
249 | } | 232 | } |
250 | 233 | ||
251 | cx = cpuidle_get_statedata(state); | ||
252 | core_next_state = cx->core_state; | ||
253 | |||
254 | /* | ||
255 | * FIXME: we currently manage device-specific idle states | ||
256 | * for PER and CORE in combination with CPU-specific | ||
257 | * idle states. This is wrong, and device-specific | ||
258 | * idle management needs to be separated out into | ||
259 | * its own code. | ||
260 | */ | ||
261 | |||
262 | /* | 234 | /* |
263 | * Prevent idle completely if CAM is active. | 235 | * Prevent idle completely if CAM is active. |
264 | * CAM does not have wakeup capability in OMAP3. | 236 | * CAM does not have wakeup capability in OMAP3. |
@@ -270,9 +242,19 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev, | |||
270 | } | 242 | } |
271 | 243 | ||
272 | /* | 244 | /* |
245 | * FIXME: we currently manage device-specific idle states | ||
246 | * for PER and CORE in combination with CPU-specific | ||
247 | * idle states. This is wrong, and device-specific | ||
248 | * idle management needs to be separated out into | ||
249 | * its own code. | ||
250 | */ | ||
251 | |||
252 | /* | ||
273 | * Prevent PER off if CORE is not in retention or off as this | 253 | * Prevent PER off if CORE is not in retention or off as this |
274 | * would disable PER wakeups completely. | 254 | * would disable PER wakeups completely. |
275 | */ | 255 | */ |
256 | cx = cpuidle_get_statedata(state); | ||
257 | core_next_state = cx->core_state; | ||
276 | per_next_state = per_saved_state = pwrdm_read_next_pwrst(per_pd); | 258 | per_next_state = per_saved_state = pwrdm_read_next_pwrst(per_pd); |
277 | if ((per_next_state == PWRDM_POWER_OFF) && | 259 | if ((per_next_state == PWRDM_POWER_OFF) && |
278 | (core_next_state > PWRDM_POWER_RET)) | 260 | (core_next_state > PWRDM_POWER_RET)) |
@@ -282,6 +264,8 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev, | |||
282 | if (per_next_state != per_saved_state) | 264 | if (per_next_state != per_saved_state) |
283 | pwrdm_set_next_pwrst(per_pd, per_next_state); | 265 | pwrdm_set_next_pwrst(per_pd, per_next_state); |
284 | 266 | ||
267 | new_state = next_valid_state(dev, state); | ||
268 | |||
285 | select_state: | 269 | select_state: |
286 | dev->last_state = new_state; | 270 | dev->last_state = new_state; |
287 | ret = omap3_enter_idle(dev, new_state); | 271 | ret = omap3_enter_idle(dev, new_state); |
@@ -295,31 +279,6 @@ select_state: | |||
295 | 279 | ||
296 | DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev); | 280 | DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev); |
297 | 281 | ||
298 | /** | ||
299 | * omap3_cpuidle_update_states() - Update the cpuidle states | ||
300 | * @mpu_deepest_state: Enable states up to and including this for mpu domain | ||
301 | * @core_deepest_state: Enable states up to and including this for core domain | ||
302 | * | ||
303 | * This goes through the list of states available and enables and disables the | ||
304 | * validity of C states based on deepest state that can be achieved for the | ||
305 | * variable domain | ||
306 | */ | ||
307 | void omap3_cpuidle_update_states(u32 mpu_deepest_state, u32 core_deepest_state) | ||
308 | { | ||
309 | int i; | ||
310 | |||
311 | for (i = OMAP3_STATE_C1; i < OMAP3_MAX_STATES; i++) { | ||
312 | struct omap3_processor_cx *cx = &omap3_power_states[i]; | ||
313 | |||
314 | if ((cx->mpu_state >= mpu_deepest_state) && | ||
315 | (cx->core_state >= core_deepest_state)) { | ||
316 | cx->valid = 1; | ||
317 | } else { | ||
318 | cx->valid = 0; | ||
319 | } | ||
320 | } | ||
321 | } | ||
322 | |||
323 | void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params) | 282 | void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params) |
324 | { | 283 | { |
325 | int i; | 284 | int i; |
@@ -327,212 +286,109 @@ void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params) | |||
327 | if (!cpuidle_board_params) | 286 | if (!cpuidle_board_params) |
328 | return; | 287 | return; |
329 | 288 | ||
330 | for (i = OMAP3_STATE_C1; i < OMAP3_MAX_STATES; i++) { | 289 | for (i = 0; i < OMAP3_NUM_STATES; i++) { |
331 | cpuidle_params_table[i].valid = | 290 | cpuidle_params_table[i].valid = cpuidle_board_params[i].valid; |
332 | cpuidle_board_params[i].valid; | 291 | cpuidle_params_table[i].exit_latency = |
333 | cpuidle_params_table[i].sleep_latency = | 292 | cpuidle_board_params[i].exit_latency; |
334 | cpuidle_board_params[i].sleep_latency; | 293 | cpuidle_params_table[i].target_residency = |
335 | cpuidle_params_table[i].wake_latency = | 294 | cpuidle_board_params[i].target_residency; |
336 | cpuidle_board_params[i].wake_latency; | ||
337 | cpuidle_params_table[i].threshold = | ||
338 | cpuidle_board_params[i].threshold; | ||
339 | } | 295 | } |
340 | return; | 296 | return; |
341 | } | 297 | } |
342 | 298 | ||
343 | /* omap3_init_power_states - Initialises the OMAP3 specific C states. | ||
344 | * | ||
345 | * Below is the desciption of each C state. | ||
346 | * C1 . MPU WFI + Core active | ||
347 | * C2 . MPU WFI + Core inactive | ||
348 | * C3 . MPU CSWR + Core inactive | ||
349 | * C4 . MPU OFF + Core inactive | ||
350 | * C5 . MPU CSWR + Core CSWR | ||
351 | * C6 . MPU OFF + Core CSWR | ||
352 | * C7 . MPU OFF + Core OFF | ||
353 | */ | ||
354 | void omap_init_power_states(void) | ||
355 | { | ||
356 | /* C1 . MPU WFI + Core active */ | ||
357 | omap3_power_states[OMAP3_STATE_C1].valid = | ||
358 | cpuidle_params_table[OMAP3_STATE_C1].valid; | ||
359 | omap3_power_states[OMAP3_STATE_C1].type = OMAP3_STATE_C1; | ||
360 | omap3_power_states[OMAP3_STATE_C1].sleep_latency = | ||
361 | cpuidle_params_table[OMAP3_STATE_C1].sleep_latency; | ||
362 | omap3_power_states[OMAP3_STATE_C1].wakeup_latency = | ||
363 | cpuidle_params_table[OMAP3_STATE_C1].wake_latency; | ||
364 | omap3_power_states[OMAP3_STATE_C1].threshold = | ||
365 | cpuidle_params_table[OMAP3_STATE_C1].threshold; | ||
366 | omap3_power_states[OMAP3_STATE_C1].mpu_state = PWRDM_POWER_ON; | ||
367 | omap3_power_states[OMAP3_STATE_C1].core_state = PWRDM_POWER_ON; | ||
368 | omap3_power_states[OMAP3_STATE_C1].flags = CPUIDLE_FLAG_TIME_VALID; | ||
369 | omap3_power_states[OMAP3_STATE_C1].desc = "MPU ON + CORE ON"; | ||
370 | |||
371 | /* C2 . MPU WFI + Core inactive */ | ||
372 | omap3_power_states[OMAP3_STATE_C2].valid = | ||
373 | cpuidle_params_table[OMAP3_STATE_C2].valid; | ||
374 | omap3_power_states[OMAP3_STATE_C2].type = OMAP3_STATE_C2; | ||
375 | omap3_power_states[OMAP3_STATE_C2].sleep_latency = | ||
376 | cpuidle_params_table[OMAP3_STATE_C2].sleep_latency; | ||
377 | omap3_power_states[OMAP3_STATE_C2].wakeup_latency = | ||
378 | cpuidle_params_table[OMAP3_STATE_C2].wake_latency; | ||
379 | omap3_power_states[OMAP3_STATE_C2].threshold = | ||
380 | cpuidle_params_table[OMAP3_STATE_C2].threshold; | ||
381 | omap3_power_states[OMAP3_STATE_C2].mpu_state = PWRDM_POWER_ON; | ||
382 | omap3_power_states[OMAP3_STATE_C2].core_state = PWRDM_POWER_ON; | ||
383 | omap3_power_states[OMAP3_STATE_C2].flags = CPUIDLE_FLAG_TIME_VALID | | ||
384 | CPUIDLE_FLAG_CHECK_BM; | ||
385 | omap3_power_states[OMAP3_STATE_C2].desc = "MPU ON + CORE ON"; | ||
386 | |||
387 | /* C3 . MPU CSWR + Core inactive */ | ||
388 | omap3_power_states[OMAP3_STATE_C3].valid = | ||
389 | cpuidle_params_table[OMAP3_STATE_C3].valid; | ||
390 | omap3_power_states[OMAP3_STATE_C3].type = OMAP3_STATE_C3; | ||
391 | omap3_power_states[OMAP3_STATE_C3].sleep_latency = | ||
392 | cpuidle_params_table[OMAP3_STATE_C3].sleep_latency; | ||
393 | omap3_power_states[OMAP3_STATE_C3].wakeup_latency = | ||
394 | cpuidle_params_table[OMAP3_STATE_C3].wake_latency; | ||
395 | omap3_power_states[OMAP3_STATE_C3].threshold = | ||
396 | cpuidle_params_table[OMAP3_STATE_C3].threshold; | ||
397 | omap3_power_states[OMAP3_STATE_C3].mpu_state = PWRDM_POWER_RET; | ||
398 | omap3_power_states[OMAP3_STATE_C3].core_state = PWRDM_POWER_ON; | ||
399 | omap3_power_states[OMAP3_STATE_C3].flags = CPUIDLE_FLAG_TIME_VALID | | ||
400 | CPUIDLE_FLAG_CHECK_BM; | ||
401 | omap3_power_states[OMAP3_STATE_C3].desc = "MPU RET + CORE ON"; | ||
402 | |||
403 | /* C4 . MPU OFF + Core inactive */ | ||
404 | omap3_power_states[OMAP3_STATE_C4].valid = | ||
405 | cpuidle_params_table[OMAP3_STATE_C4].valid; | ||
406 | omap3_power_states[OMAP3_STATE_C4].type = OMAP3_STATE_C4; | ||
407 | omap3_power_states[OMAP3_STATE_C4].sleep_latency = | ||
408 | cpuidle_params_table[OMAP3_STATE_C4].sleep_latency; | ||
409 | omap3_power_states[OMAP3_STATE_C4].wakeup_latency = | ||
410 | cpuidle_params_table[OMAP3_STATE_C4].wake_latency; | ||
411 | omap3_power_states[OMAP3_STATE_C4].threshold = | ||
412 | cpuidle_params_table[OMAP3_STATE_C4].threshold; | ||
413 | omap3_power_states[OMAP3_STATE_C4].mpu_state = PWRDM_POWER_OFF; | ||
414 | omap3_power_states[OMAP3_STATE_C4].core_state = PWRDM_POWER_ON; | ||
415 | omap3_power_states[OMAP3_STATE_C4].flags = CPUIDLE_FLAG_TIME_VALID | | ||
416 | CPUIDLE_FLAG_CHECK_BM; | ||
417 | omap3_power_states[OMAP3_STATE_C4].desc = "MPU OFF + CORE ON"; | ||
418 | |||
419 | /* C5 . MPU CSWR + Core CSWR*/ | ||
420 | omap3_power_states[OMAP3_STATE_C5].valid = | ||
421 | cpuidle_params_table[OMAP3_STATE_C5].valid; | ||
422 | omap3_power_states[OMAP3_STATE_C5].type = OMAP3_STATE_C5; | ||
423 | omap3_power_states[OMAP3_STATE_C5].sleep_latency = | ||
424 | cpuidle_params_table[OMAP3_STATE_C5].sleep_latency; | ||
425 | omap3_power_states[OMAP3_STATE_C5].wakeup_latency = | ||
426 | cpuidle_params_table[OMAP3_STATE_C5].wake_latency; | ||
427 | omap3_power_states[OMAP3_STATE_C5].threshold = | ||
428 | cpuidle_params_table[OMAP3_STATE_C5].threshold; | ||
429 | omap3_power_states[OMAP3_STATE_C5].mpu_state = PWRDM_POWER_RET; | ||
430 | omap3_power_states[OMAP3_STATE_C5].core_state = PWRDM_POWER_RET; | ||
431 | omap3_power_states[OMAP3_STATE_C5].flags = CPUIDLE_FLAG_TIME_VALID | | ||
432 | CPUIDLE_FLAG_CHECK_BM; | ||
433 | omap3_power_states[OMAP3_STATE_C5].desc = "MPU RET + CORE RET"; | ||
434 | |||
435 | /* C6 . MPU OFF + Core CSWR */ | ||
436 | omap3_power_states[OMAP3_STATE_C6].valid = | ||
437 | cpuidle_params_table[OMAP3_STATE_C6].valid; | ||
438 | omap3_power_states[OMAP3_STATE_C6].type = OMAP3_STATE_C6; | ||
439 | omap3_power_states[OMAP3_STATE_C6].sleep_latency = | ||
440 | cpuidle_params_table[OMAP3_STATE_C6].sleep_latency; | ||
441 | omap3_power_states[OMAP3_STATE_C6].wakeup_latency = | ||
442 | cpuidle_params_table[OMAP3_STATE_C6].wake_latency; | ||
443 | omap3_power_states[OMAP3_STATE_C6].threshold = | ||
444 | cpuidle_params_table[OMAP3_STATE_C6].threshold; | ||
445 | omap3_power_states[OMAP3_STATE_C6].mpu_state = PWRDM_POWER_OFF; | ||
446 | omap3_power_states[OMAP3_STATE_C6].core_state = PWRDM_POWER_RET; | ||
447 | omap3_power_states[OMAP3_STATE_C6].flags = CPUIDLE_FLAG_TIME_VALID | | ||
448 | CPUIDLE_FLAG_CHECK_BM; | ||
449 | omap3_power_states[OMAP3_STATE_C6].desc = "MPU OFF + CORE RET"; | ||
450 | |||
451 | /* C7 . MPU OFF + Core OFF */ | ||
452 | omap3_power_states[OMAP3_STATE_C7].valid = | ||
453 | cpuidle_params_table[OMAP3_STATE_C7].valid; | ||
454 | omap3_power_states[OMAP3_STATE_C7].type = OMAP3_STATE_C7; | ||
455 | omap3_power_states[OMAP3_STATE_C7].sleep_latency = | ||
456 | cpuidle_params_table[OMAP3_STATE_C7].sleep_latency; | ||
457 | omap3_power_states[OMAP3_STATE_C7].wakeup_latency = | ||
458 | cpuidle_params_table[OMAP3_STATE_C7].wake_latency; | ||
459 | omap3_power_states[OMAP3_STATE_C7].threshold = | ||
460 | cpuidle_params_table[OMAP3_STATE_C7].threshold; | ||
461 | omap3_power_states[OMAP3_STATE_C7].mpu_state = PWRDM_POWER_OFF; | ||
462 | omap3_power_states[OMAP3_STATE_C7].core_state = PWRDM_POWER_OFF; | ||
463 | omap3_power_states[OMAP3_STATE_C7].flags = CPUIDLE_FLAG_TIME_VALID | | ||
464 | CPUIDLE_FLAG_CHECK_BM; | ||
465 | omap3_power_states[OMAP3_STATE_C7].desc = "MPU OFF + CORE OFF"; | ||
466 | |||
467 | /* | ||
468 | * Erratum i583: implementation for ES rev < Es1.2 on 3630. We cannot | ||
469 | * enable OFF mode in a stable form for previous revisions. | ||
470 | * we disable C7 state as a result. | ||
471 | */ | ||
472 | if (IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583)) { | ||
473 | omap3_power_states[OMAP3_STATE_C7].valid = 0; | ||
474 | cpuidle_params_table[OMAP3_STATE_C7].valid = 0; | ||
475 | pr_warn("%s: core off state C7 disabled due to i583\n", | ||
476 | __func__); | ||
477 | } | ||
478 | } | ||
479 | |||
480 | struct cpuidle_driver omap3_idle_driver = { | 299 | struct cpuidle_driver omap3_idle_driver = { |
481 | .name = "omap3_idle", | 300 | .name = "omap3_idle", |
482 | .owner = THIS_MODULE, | 301 | .owner = THIS_MODULE, |
483 | }; | 302 | }; |
484 | 303 | ||
304 | /* Helper to fill the C-state common data and register the driver_data */ | ||
305 | static inline struct omap3_idle_statedata *_fill_cstate( | ||
306 | struct cpuidle_device *dev, | ||
307 | int idx, const char *descr) | ||
308 | { | ||
309 | struct omap3_idle_statedata *cx = &omap3_idle_data[idx]; | ||
310 | struct cpuidle_state *state = &dev->states[idx]; | ||
311 | |||
312 | state->exit_latency = cpuidle_params_table[idx].exit_latency; | ||
313 | state->target_residency = cpuidle_params_table[idx].target_residency; | ||
314 | state->flags = CPUIDLE_FLAG_TIME_VALID; | ||
315 | state->enter = omap3_enter_idle_bm; | ||
316 | cx->valid = cpuidle_params_table[idx].valid; | ||
317 | sprintf(state->name, "C%d", idx + 1); | ||
318 | strncpy(state->desc, descr, CPUIDLE_DESC_LEN); | ||
319 | cpuidle_set_statedata(state, cx); | ||
320 | |||
321 | return cx; | ||
322 | } | ||
323 | |||
485 | /** | 324 | /** |
486 | * omap3_idle_init - Init routine for OMAP3 idle | 325 | * omap3_idle_init - Init routine for OMAP3 idle |
487 | * | 326 | * |
488 | * Registers the OMAP3 specific cpuidle driver with the cpuidle | 327 | * Registers the OMAP3 specific cpuidle driver to the cpuidle |
489 | * framework with the valid set of states. | 328 | * framework with the valid set of states. |
490 | */ | 329 | */ |
491 | int __init omap3_idle_init(void) | 330 | int __init omap3_idle_init(void) |
492 | { | 331 | { |
493 | int i, count = 0; | ||
494 | struct omap3_processor_cx *cx; | ||
495 | struct cpuidle_state *state; | ||
496 | struct cpuidle_device *dev; | 332 | struct cpuidle_device *dev; |
333 | struct omap3_idle_statedata *cx; | ||
497 | 334 | ||
498 | mpu_pd = pwrdm_lookup("mpu_pwrdm"); | 335 | mpu_pd = pwrdm_lookup("mpu_pwrdm"); |
499 | core_pd = pwrdm_lookup("core_pwrdm"); | 336 | core_pd = pwrdm_lookup("core_pwrdm"); |
500 | per_pd = pwrdm_lookup("per_pwrdm"); | 337 | per_pd = pwrdm_lookup("per_pwrdm"); |
501 | cam_pd = pwrdm_lookup("cam_pwrdm"); | 338 | cam_pd = pwrdm_lookup("cam_pwrdm"); |
502 | 339 | ||
503 | omap_init_power_states(); | ||
504 | cpuidle_register_driver(&omap3_idle_driver); | 340 | cpuidle_register_driver(&omap3_idle_driver); |
505 | |||
506 | dev = &per_cpu(omap3_idle_dev, smp_processor_id()); | 341 | dev = &per_cpu(omap3_idle_dev, smp_processor_id()); |
507 | 342 | ||
508 | for (i = OMAP3_STATE_C1; i < OMAP3_MAX_STATES; i++) { | 343 | /* C1 . MPU WFI + Core active */ |
509 | cx = &omap3_power_states[i]; | 344 | cx = _fill_cstate(dev, 0, "MPU ON + CORE ON"); |
510 | state = &dev->states[count]; | 345 | (&dev->states[0])->enter = omap3_enter_idle; |
511 | 346 | dev->safe_state = &dev->states[0]; | |
512 | if (!cx->valid) | 347 | cx->valid = 1; /* C1 is always valid */ |
513 | continue; | 348 | cx->mpu_state = PWRDM_POWER_ON; |
514 | cpuidle_set_statedata(state, cx); | 349 | cx->core_state = PWRDM_POWER_ON; |
515 | state->exit_latency = cx->sleep_latency + cx->wakeup_latency; | ||
516 | state->target_residency = cx->threshold; | ||
517 | state->flags = cx->flags; | ||
518 | state->enter = (state->flags & CPUIDLE_FLAG_CHECK_BM) ? | ||
519 | omap3_enter_idle_bm : omap3_enter_idle; | ||
520 | if (cx->type == OMAP3_STATE_C1) | ||
521 | dev->safe_state = state; | ||
522 | sprintf(state->name, "C%d", count+1); | ||
523 | strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN); | ||
524 | count++; | ||
525 | } | ||
526 | 350 | ||
527 | if (!count) | 351 | /* C2 . MPU WFI + Core inactive */ |
528 | return -EINVAL; | 352 | cx = _fill_cstate(dev, 1, "MPU ON + CORE ON"); |
529 | dev->state_count = count; | 353 | cx->mpu_state = PWRDM_POWER_ON; |
354 | cx->core_state = PWRDM_POWER_ON; | ||
355 | |||
356 | /* C3 . MPU CSWR + Core inactive */ | ||
357 | cx = _fill_cstate(dev, 2, "MPU RET + CORE ON"); | ||
358 | cx->mpu_state = PWRDM_POWER_RET; | ||
359 | cx->core_state = PWRDM_POWER_ON; | ||
530 | 360 | ||
531 | if (enable_off_mode) | 361 | /* C4 . MPU OFF + Core inactive */ |
532 | omap3_cpuidle_update_states(PWRDM_POWER_OFF, PWRDM_POWER_OFF); | 362 | cx = _fill_cstate(dev, 3, "MPU OFF + CORE ON"); |
533 | else | 363 | cx->mpu_state = PWRDM_POWER_OFF; |
534 | omap3_cpuidle_update_states(PWRDM_POWER_RET, PWRDM_POWER_RET); | 364 | cx->core_state = PWRDM_POWER_ON; |
365 | |||
366 | /* C5 . MPU RET + Core RET */ | ||
367 | cx = _fill_cstate(dev, 4, "MPU RET + CORE RET"); | ||
368 | cx->mpu_state = PWRDM_POWER_RET; | ||
369 | cx->core_state = PWRDM_POWER_RET; | ||
370 | |||
371 | /* C6 . MPU OFF + Core RET */ | ||
372 | cx = _fill_cstate(dev, 5, "MPU OFF + CORE RET"); | ||
373 | cx->mpu_state = PWRDM_POWER_OFF; | ||
374 | cx->core_state = PWRDM_POWER_RET; | ||
375 | |||
376 | /* C7 . MPU OFF + Core OFF */ | ||
377 | cx = _fill_cstate(dev, 6, "MPU OFF + CORE OFF"); | ||
378 | /* | ||
379 | * Erratum i583: implementation for ES rev < Es1.2 on 3630. We cannot | ||
380 | * enable OFF mode in a stable form for previous revisions. | ||
381 | * We disable C7 state as a result. | ||
382 | */ | ||
383 | if (IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583)) { | ||
384 | cx->valid = 0; | ||
385 | pr_warn("%s: core off state C7 disabled due to i583\n", | ||
386 | __func__); | ||
387 | } | ||
388 | cx->mpu_state = PWRDM_POWER_OFF; | ||
389 | cx->core_state = PWRDM_POWER_OFF; | ||
535 | 390 | ||
391 | dev->state_count = OMAP3_NUM_STATES; | ||
536 | if (cpuidle_register_device(dev)) { | 392 | if (cpuidle_register_device(dev)) { |
537 | printk(KERN_ERR "%s: CPUidle register device failed\n", | 393 | printk(KERN_ERR "%s: CPUidle register device failed\n", |
538 | __func__); | 394 | __func__); |
diff --git a/arch/arm/mach-omap2/gpmc-smc91x.c b/arch/arm/mach-omap2/gpmc-smc91x.c index 877c6f5807b7..ba10c24f3d8d 100644 --- a/arch/arm/mach-omap2/gpmc-smc91x.c +++ b/arch/arm/mach-omap2/gpmc-smc91x.c | |||
@@ -147,25 +147,24 @@ void __init gpmc_smc91x_init(struct omap_smc91x_platform_data *board_data) | |||
147 | goto free1; | 147 | goto free1; |
148 | } | 148 | } |
149 | 149 | ||
150 | if (gpio_request(gpmc_cfg->gpio_irq, "SMC91X irq") < 0) | 150 | if (gpio_request_one(gpmc_cfg->gpio_irq, GPIOF_IN, "SMC91X irq") < 0) |
151 | goto free1; | 151 | goto free1; |
152 | 152 | ||
153 | gpio_direction_input(gpmc_cfg->gpio_irq); | ||
154 | gpmc_smc91x_resources[1].start = gpio_to_irq(gpmc_cfg->gpio_irq); | 153 | gpmc_smc91x_resources[1].start = gpio_to_irq(gpmc_cfg->gpio_irq); |
155 | 154 | ||
156 | if (gpmc_cfg->gpio_pwrdwn) { | 155 | if (gpmc_cfg->gpio_pwrdwn) { |
157 | ret = gpio_request(gpmc_cfg->gpio_pwrdwn, "SMC91X powerdown"); | 156 | ret = gpio_request_one(gpmc_cfg->gpio_pwrdwn, |
157 | GPIOF_OUT_INIT_LOW, "SMC91X powerdown"); | ||
158 | if (ret) | 158 | if (ret) |
159 | goto free2; | 159 | goto free2; |
160 | gpio_direction_output(gpmc_cfg->gpio_pwrdwn, 0); | ||
161 | } | 160 | } |
162 | 161 | ||
163 | if (gpmc_cfg->gpio_reset) { | 162 | if (gpmc_cfg->gpio_reset) { |
164 | ret = gpio_request(gpmc_cfg->gpio_reset, "SMC91X reset"); | 163 | ret = gpio_request_one(gpmc_cfg->gpio_reset, |
164 | GPIOF_OUT_INIT_LOW, "SMC91X reset"); | ||
165 | if (ret) | 165 | if (ret) |
166 | goto free3; | 166 | goto free3; |
167 | 167 | ||
168 | gpio_direction_output(gpmc_cfg->gpio_reset, 0); | ||
169 | gpio_set_value(gpmc_cfg->gpio_reset, 1); | 168 | gpio_set_value(gpmc_cfg->gpio_reset, 1); |
170 | msleep(100); | 169 | msleep(100); |
171 | gpio_set_value(gpmc_cfg->gpio_reset, 0); | 170 | gpio_set_value(gpmc_cfg->gpio_reset, 0); |
diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c b/arch/arm/mach-omap2/gpmc-smsc911x.c index 703f150dd01d..997033129d26 100644 --- a/arch/arm/mach-omap2/gpmc-smsc911x.c +++ b/arch/arm/mach-omap2/gpmc-smsc911x.c | |||
@@ -10,6 +10,7 @@ | |||
10 | * it under the terms of the GNU General Public License version 2 as | 10 | * it under the terms of the GNU General Public License version 2 as |
11 | * published by the Free Software Foundation. | 11 | * published by the Free Software Foundation. |
12 | */ | 12 | */ |
13 | #define pr_fmt(fmt) "%s: " fmt, __func__ | ||
13 | 14 | ||
14 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
15 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
@@ -30,7 +31,7 @@ static struct resource gpmc_smsc911x_resources[] = { | |||
30 | .flags = IORESOURCE_MEM, | 31 | .flags = IORESOURCE_MEM, |
31 | }, | 32 | }, |
32 | [1] = { | 33 | [1] = { |
33 | .flags = IORESOURCE_IRQ, | 34 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, |
34 | }, | 35 | }, |
35 | }; | 36 | }; |
36 | 37 | ||
@@ -41,16 +42,6 @@ static struct smsc911x_platform_config gpmc_smsc911x_config = { | |||
41 | .flags = SMSC911X_USE_16BIT, | 42 | .flags = SMSC911X_USE_16BIT, |
42 | }; | 43 | }; |
43 | 44 | ||
44 | static struct platform_device gpmc_smsc911x_device = { | ||
45 | .name = "smsc911x", | ||
46 | .id = -1, | ||
47 | .num_resources = ARRAY_SIZE(gpmc_smsc911x_resources), | ||
48 | .resource = gpmc_smsc911x_resources, | ||
49 | .dev = { | ||
50 | .platform_data = &gpmc_smsc911x_config, | ||
51 | }, | ||
52 | }; | ||
53 | |||
54 | /* | 45 | /* |
55 | * Initialize smsc911x device connected to the GPMC. Note that we | 46 | * Initialize smsc911x device connected to the GPMC. Note that we |
56 | * assume that pin multiplexing is done in the board-*.c file, | 47 | * assume that pin multiplexing is done in the board-*.c file, |
@@ -58,46 +49,49 @@ static struct platform_device gpmc_smsc911x_device = { | |||
58 | */ | 49 | */ |
59 | void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data) | 50 | void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data) |
60 | { | 51 | { |
52 | struct platform_device *pdev; | ||
61 | unsigned long cs_mem_base; | 53 | unsigned long cs_mem_base; |
62 | int ret; | 54 | int ret; |
63 | 55 | ||
64 | gpmc_cfg = board_data; | 56 | gpmc_cfg = board_data; |
65 | 57 | ||
66 | if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) { | 58 | if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) { |
67 | printk(KERN_ERR "Failed to request GPMC mem for smsc911x\n"); | 59 | pr_err("Failed to request GPMC mem region\n"); |
68 | return; | 60 | return; |
69 | } | 61 | } |
70 | 62 | ||
71 | gpmc_smsc911x_resources[0].start = cs_mem_base + 0x0; | 63 | gpmc_smsc911x_resources[0].start = cs_mem_base + 0x0; |
72 | gpmc_smsc911x_resources[0].end = cs_mem_base + 0xff; | 64 | gpmc_smsc911x_resources[0].end = cs_mem_base + 0xff; |
73 | 65 | ||
74 | if (gpio_request(gpmc_cfg->gpio_irq, "smsc911x irq") < 0) { | 66 | if (gpio_request_one(gpmc_cfg->gpio_irq, GPIOF_IN, "smsc911x irq")) { |
75 | printk(KERN_ERR "Failed to request GPIO%d for smsc911x IRQ\n", | 67 | pr_err("Failed to request IRQ GPIO%d\n", gpmc_cfg->gpio_irq); |
76 | gpmc_cfg->gpio_irq); | ||
77 | goto free1; | 68 | goto free1; |
78 | } | 69 | } |
79 | 70 | ||
80 | gpio_direction_input(gpmc_cfg->gpio_irq); | ||
81 | gpmc_smsc911x_resources[1].start = gpio_to_irq(gpmc_cfg->gpio_irq); | 71 | gpmc_smsc911x_resources[1].start = gpio_to_irq(gpmc_cfg->gpio_irq); |
82 | gpmc_smsc911x_resources[1].flags |= | ||
83 | (gpmc_cfg->flags & IRQF_TRIGGER_MASK); | ||
84 | 72 | ||
85 | if (gpio_is_valid(gpmc_cfg->gpio_reset)) { | 73 | if (gpio_is_valid(gpmc_cfg->gpio_reset)) { |
86 | ret = gpio_request(gpmc_cfg->gpio_reset, "smsc911x reset"); | 74 | ret = gpio_request_one(gpmc_cfg->gpio_reset, |
75 | GPIOF_OUT_INIT_HIGH, "smsc911x reset"); | ||
87 | if (ret) { | 76 | if (ret) { |
88 | printk(KERN_ERR "Failed to request GPIO%d for smsc911x reset\n", | 77 | pr_err("Failed to request reset GPIO%d\n", |
89 | gpmc_cfg->gpio_reset); | 78 | gpmc_cfg->gpio_reset); |
90 | goto free2; | 79 | goto free2; |
91 | } | 80 | } |
92 | 81 | ||
93 | gpio_direction_output(gpmc_cfg->gpio_reset, 1); | ||
94 | gpio_set_value(gpmc_cfg->gpio_reset, 0); | 82 | gpio_set_value(gpmc_cfg->gpio_reset, 0); |
95 | msleep(100); | 83 | msleep(100); |
96 | gpio_set_value(gpmc_cfg->gpio_reset, 1); | 84 | gpio_set_value(gpmc_cfg->gpio_reset, 1); |
97 | } | 85 | } |
98 | 86 | ||
99 | if (platform_device_register(&gpmc_smsc911x_device) < 0) { | 87 | if (gpmc_cfg->flags) |
100 | printk(KERN_ERR "Unable to register smsc911x device\n"); | 88 | gpmc_smsc911x_config.flags = gpmc_cfg->flags; |
89 | |||
90 | pdev = platform_device_register_resndata(NULL, "smsc911x", gpmc_cfg->id, | ||
91 | gpmc_smsc911x_resources, ARRAY_SIZE(gpmc_smsc911x_resources), | ||
92 | &gpmc_smsc911x_config, sizeof(gpmc_smsc911x_config)); | ||
93 | if (!pdev) { | ||
94 | pr_err("Unable to register platform device\n"); | ||
101 | gpio_free(gpmc_cfg->gpio_reset); | 95 | gpio_free(gpmc_cfg->gpio_reset); |
102 | goto free2; | 96 | goto free2; |
103 | } | 97 | } |
@@ -109,5 +103,5 @@ free2: | |||
109 | free1: | 103 | free1: |
110 | gpmc_cs_free(gpmc_cfg->cs); | 104 | gpmc_cs_free(gpmc_cfg->cs); |
111 | 105 | ||
112 | printk(KERN_ERR "Could not initialize smsc911x\n"); | 106 | pr_err("Could not initialize smsc911x device\n"); |
113 | } | 107 | } |
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c index 82632c24076f..7b9f1909ddb2 100644 --- a/arch/arm/mach-omap2/omap_l3_noc.c +++ b/arch/arm/mach-omap2/omap_l3_noc.c | |||
@@ -63,10 +63,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) | |||
63 | char *source_name; | 63 | char *source_name; |
64 | 64 | ||
65 | /* Get the Type of interrupt */ | 65 | /* Get the Type of interrupt */ |
66 | if (irq == l3->app_irq) | 66 | inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR; |
67 | inttype = L3_APPLICATION_ERROR; | ||
68 | else | ||
69 | inttype = L3_DEBUG_ERROR; | ||
70 | 67 | ||
71 | for (i = 0; i < L3_MODULES; i++) { | 68 | for (i = 0; i < L3_MODULES; i++) { |
72 | /* | 69 | /* |
@@ -84,10 +81,10 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) | |||
84 | 81 | ||
85 | err_src = j; | 82 | err_src = j; |
86 | /* Read the stderrlog_main_source from clk domain */ | 83 | /* Read the stderrlog_main_source from clk domain */ |
87 | std_err_main_addr = base + (*(l3_targ[i] + err_src)); | 84 | std_err_main_addr = base + *(l3_targ[i] + err_src); |
88 | std_err_main = readl(std_err_main_addr); | 85 | std_err_main = readl(std_err_main_addr); |
89 | 86 | ||
90 | switch ((std_err_main & CUSTOM_ERROR)) { | 87 | switch (std_err_main & CUSTOM_ERROR) { |
91 | case STANDARD_ERROR: | 88 | case STANDARD_ERROR: |
92 | source_name = | 89 | source_name = |
93 | l3_targ_stderrlog_main_name[i][err_src]; | 90 | l3_targ_stderrlog_main_name[i][err_src]; |
@@ -132,49 +129,49 @@ static int __init omap4_l3_probe(struct platform_device *pdev) | |||
132 | 129 | ||
133 | l3 = kzalloc(sizeof(*l3), GFP_KERNEL); | 130 | l3 = kzalloc(sizeof(*l3), GFP_KERNEL); |
134 | if (!l3) | 131 | if (!l3) |
135 | ret = -ENOMEM; | 132 | return -ENOMEM; |
136 | 133 | ||
137 | platform_set_drvdata(pdev, l3); | 134 | platform_set_drvdata(pdev, l3); |
138 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 135 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
139 | if (!res) { | 136 | if (!res) { |
140 | dev_err(&pdev->dev, "couldn't find resource 0\n"); | 137 | dev_err(&pdev->dev, "couldn't find resource 0\n"); |
141 | ret = -ENODEV; | 138 | ret = -ENODEV; |
142 | goto err1; | 139 | goto err0; |
143 | } | 140 | } |
144 | 141 | ||
145 | l3->l3_base[0] = ioremap(res->start, resource_size(res)); | 142 | l3->l3_base[0] = ioremap(res->start, resource_size(res)); |
146 | if (!(l3->l3_base[0])) { | 143 | if (!l3->l3_base[0]) { |
147 | dev_err(&pdev->dev, "ioremap failed\n"); | 144 | dev_err(&pdev->dev, "ioremap failed\n"); |
148 | ret = -ENOMEM; | 145 | ret = -ENOMEM; |
149 | goto err2; | 146 | goto err0; |
150 | } | 147 | } |
151 | 148 | ||
152 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | 149 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
153 | if (!res) { | 150 | if (!res) { |
154 | dev_err(&pdev->dev, "couldn't find resource 1\n"); | 151 | dev_err(&pdev->dev, "couldn't find resource 1\n"); |
155 | ret = -ENODEV; | 152 | ret = -ENODEV; |
156 | goto err3; | 153 | goto err1; |
157 | } | 154 | } |
158 | 155 | ||
159 | l3->l3_base[1] = ioremap(res->start, resource_size(res)); | 156 | l3->l3_base[1] = ioremap(res->start, resource_size(res)); |
160 | if (!(l3->l3_base[1])) { | 157 | if (!l3->l3_base[1]) { |
161 | dev_err(&pdev->dev, "ioremap failed\n"); | 158 | dev_err(&pdev->dev, "ioremap failed\n"); |
162 | ret = -ENOMEM; | 159 | ret = -ENOMEM; |
163 | goto err4; | 160 | goto err1; |
164 | } | 161 | } |
165 | 162 | ||
166 | res = platform_get_resource(pdev, IORESOURCE_MEM, 2); | 163 | res = platform_get_resource(pdev, IORESOURCE_MEM, 2); |
167 | if (!res) { | 164 | if (!res) { |
168 | dev_err(&pdev->dev, "couldn't find resource 2\n"); | 165 | dev_err(&pdev->dev, "couldn't find resource 2\n"); |
169 | ret = -ENODEV; | 166 | ret = -ENODEV; |
170 | goto err5; | 167 | goto err2; |
171 | } | 168 | } |
172 | 169 | ||
173 | l3->l3_base[2] = ioremap(res->start, resource_size(res)); | 170 | l3->l3_base[2] = ioremap(res->start, resource_size(res)); |
174 | if (!(l3->l3_base[2])) { | 171 | if (!l3->l3_base[2]) { |
175 | dev_err(&pdev->dev, "ioremap failed\n"); | 172 | dev_err(&pdev->dev, "ioremap failed\n"); |
176 | ret = -ENOMEM; | 173 | ret = -ENOMEM; |
177 | goto err6; | 174 | goto err2; |
178 | } | 175 | } |
179 | 176 | ||
180 | /* | 177 | /* |
@@ -187,7 +184,7 @@ static int __init omap4_l3_probe(struct platform_device *pdev) | |||
187 | if (ret) { | 184 | if (ret) { |
188 | pr_crit("L3: request_irq failed to register for 0x%x\n", | 185 | pr_crit("L3: request_irq failed to register for 0x%x\n", |
189 | OMAP44XX_IRQ_L3_DBG); | 186 | OMAP44XX_IRQ_L3_DBG); |
190 | goto err7; | 187 | goto err3; |
191 | } | 188 | } |
192 | l3->debug_irq = irq; | 189 | l3->debug_irq = irq; |
193 | 190 | ||
@@ -198,24 +195,22 @@ static int __init omap4_l3_probe(struct platform_device *pdev) | |||
198 | if (ret) { | 195 | if (ret) { |
199 | pr_crit("L3: request_irq failed to register for 0x%x\n", | 196 | pr_crit("L3: request_irq failed to register for 0x%x\n", |
200 | OMAP44XX_IRQ_L3_APP); | 197 | OMAP44XX_IRQ_L3_APP); |
201 | goto err8; | 198 | goto err4; |
202 | } | 199 | } |
203 | l3->app_irq = irq; | 200 | l3->app_irq = irq; |
204 | 201 | ||
205 | goto err0; | 202 | return 0; |
206 | err8: | 203 | |
207 | err7: | ||
208 | iounmap(l3->l3_base[2]); | ||
209 | err6: | ||
210 | err5: | ||
211 | iounmap(l3->l3_base[1]); | ||
212 | err4: | 204 | err4: |
205 | free_irq(l3->debug_irq, l3); | ||
213 | err3: | 206 | err3: |
214 | iounmap(l3->l3_base[0]); | 207 | iounmap(l3->l3_base[2]); |
215 | err2: | 208 | err2: |
209 | iounmap(l3->l3_base[1]); | ||
216 | err1: | 210 | err1: |
217 | kfree(l3); | 211 | iounmap(l3->l3_base[0]); |
218 | err0: | 212 | err0: |
213 | kfree(l3); | ||
219 | return ret; | 214 | return ret; |
220 | } | 215 | } |
221 | 216 | ||
diff --git a/arch/arm/mach-omap2/omap_l3_smx.c b/arch/arm/mach-omap2/omap_l3_smx.c index 4321e7938929..873c0e33b512 100644 --- a/arch/arm/mach-omap2/omap_l3_smx.c +++ b/arch/arm/mach-omap2/omap_l3_smx.c | |||
@@ -155,7 +155,7 @@ static irqreturn_t omap3_l3_block_irq(struct omap3_l3 *l3, | |||
155 | u8 multi = error & L3_ERROR_LOG_MULTI; | 155 | u8 multi = error & L3_ERROR_LOG_MULTI; |
156 | u32 address = omap3_l3_decode_addr(error_addr); | 156 | u32 address = omap3_l3_decode_addr(error_addr); |
157 | 157 | ||
158 | WARN(true, "%s Error seen by %s %s at address %x\n", | 158 | WARN(true, "%s seen by %s %s at address %x\n", |
159 | omap3_l3_code_string(code), | 159 | omap3_l3_code_string(code), |
160 | omap3_l3_initiator_string(initid), | 160 | omap3_l3_initiator_string(initid), |
161 | multi ? "Multiple Errors" : "", | 161 | multi ? "Multiple Errors" : "", |
@@ -167,21 +167,15 @@ static irqreturn_t omap3_l3_block_irq(struct omap3_l3 *l3, | |||
167 | static irqreturn_t omap3_l3_app_irq(int irq, void *_l3) | 167 | static irqreturn_t omap3_l3_app_irq(int irq, void *_l3) |
168 | { | 168 | { |
169 | struct omap3_l3 *l3 = _l3; | 169 | struct omap3_l3 *l3 = _l3; |
170 | |||
171 | u64 status, clear; | 170 | u64 status, clear; |
172 | u64 error; | 171 | u64 error; |
173 | u64 error_addr; | 172 | u64 error_addr; |
174 | u64 err_source = 0; | 173 | u64 err_source = 0; |
175 | void __iomem *base; | 174 | void __iomem *base; |
176 | int int_type; | 175 | int int_type; |
177 | |||
178 | irqreturn_t ret = IRQ_NONE; | 176 | irqreturn_t ret = IRQ_NONE; |
179 | 177 | ||
180 | if (irq == l3->app_irq) | 178 | int_type = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR; |
181 | int_type = L3_APPLICATION_ERROR; | ||
182 | else | ||
183 | int_type = L3_DEBUG_ERROR; | ||
184 | |||
185 | if (!int_type) { | 179 | if (!int_type) { |
186 | status = omap3_l3_readll(l3->rt, L3_SI_FLAG_STATUS_0); | 180 | status = omap3_l3_readll(l3->rt, L3_SI_FLAG_STATUS_0); |
187 | /* | 181 | /* |
@@ -202,7 +196,6 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3) | |||
202 | 196 | ||
203 | base = l3->rt + *(omap3_l3_bases[int_type] + err_source); | 197 | base = l3->rt + *(omap3_l3_bases[int_type] + err_source); |
204 | error = omap3_l3_readll(base, L3_ERROR_LOG); | 198 | error = omap3_l3_readll(base, L3_ERROR_LOG); |
205 | |||
206 | if (error) { | 199 | if (error) { |
207 | error_addr = omap3_l3_readll(base, L3_ERROR_LOG_ADDR); | 200 | error_addr = omap3_l3_readll(base, L3_ERROR_LOG_ADDR); |
208 | 201 | ||
@@ -210,9 +203,8 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3) | |||
210 | } | 203 | } |
211 | 204 | ||
212 | /* Clear the status register */ | 205 | /* Clear the status register */ |
213 | clear = ((L3_AGENT_STATUS_CLEAR_IA << int_type) | | 206 | clear = (L3_AGENT_STATUS_CLEAR_IA << int_type) | |
214 | (L3_AGENT_STATUS_CLEAR_TA)); | 207 | L3_AGENT_STATUS_CLEAR_TA; |
215 | |||
216 | omap3_l3_writell(base, L3_AGENT_STATUS, clear); | 208 | omap3_l3_writell(base, L3_AGENT_STATUS, clear); |
217 | 209 | ||
218 | /* clear the error log register */ | 210 | /* clear the error log register */ |
@@ -228,10 +220,8 @@ static int __init omap3_l3_probe(struct platform_device *pdev) | |||
228 | int ret; | 220 | int ret; |
229 | 221 | ||
230 | l3 = kzalloc(sizeof(*l3), GFP_KERNEL); | 222 | l3 = kzalloc(sizeof(*l3), GFP_KERNEL); |
231 | if (!l3) { | 223 | if (!l3) |
232 | ret = -ENOMEM; | 224 | return -ENOMEM; |
233 | goto err0; | ||
234 | } | ||
235 | 225 | ||
236 | platform_set_drvdata(pdev, l3); | 226 | platform_set_drvdata(pdev, l3); |
237 | 227 | ||
@@ -239,13 +229,13 @@ static int __init omap3_l3_probe(struct platform_device *pdev) | |||
239 | if (!res) { | 229 | if (!res) { |
240 | dev_err(&pdev->dev, "couldn't find resource\n"); | 230 | dev_err(&pdev->dev, "couldn't find resource\n"); |
241 | ret = -ENODEV; | 231 | ret = -ENODEV; |
242 | goto err1; | 232 | goto err0; |
243 | } | 233 | } |
244 | l3->rt = ioremap(res->start, resource_size(res)); | 234 | l3->rt = ioremap(res->start, resource_size(res)); |
245 | if (!(l3->rt)) { | 235 | if (!l3->rt) { |
246 | dev_err(&pdev->dev, "ioremap failed\n"); | 236 | dev_err(&pdev->dev, "ioremap failed\n"); |
247 | ret = -ENOMEM; | 237 | ret = -ENOMEM; |
248 | goto err2; | 238 | goto err0; |
249 | } | 239 | } |
250 | 240 | ||
251 | l3->debug_irq = platform_get_irq(pdev, 0); | 241 | l3->debug_irq = platform_get_irq(pdev, 0); |
@@ -254,28 +244,26 @@ static int __init omap3_l3_probe(struct platform_device *pdev) | |||
254 | "l3-debug-irq", l3); | 244 | "l3-debug-irq", l3); |
255 | if (ret) { | 245 | if (ret) { |
256 | dev_err(&pdev->dev, "couldn't request debug irq\n"); | 246 | dev_err(&pdev->dev, "couldn't request debug irq\n"); |
257 | goto err3; | 247 | goto err1; |
258 | } | 248 | } |
259 | 249 | ||
260 | l3->app_irq = platform_get_irq(pdev, 1); | 250 | l3->app_irq = platform_get_irq(pdev, 1); |
261 | ret = request_irq(l3->app_irq, omap3_l3_app_irq, | 251 | ret = request_irq(l3->app_irq, omap3_l3_app_irq, |
262 | IRQF_DISABLED | IRQF_TRIGGER_RISING, | 252 | IRQF_DISABLED | IRQF_TRIGGER_RISING, |
263 | "l3-app-irq", l3); | 253 | "l3-app-irq", l3); |
264 | |||
265 | if (ret) { | 254 | if (ret) { |
266 | dev_err(&pdev->dev, "couldn't request app irq\n"); | 255 | dev_err(&pdev->dev, "couldn't request app irq\n"); |
267 | goto err4; | 256 | goto err2; |
268 | } | 257 | } |
269 | 258 | ||
270 | goto err0; | 259 | return 0; |
271 | 260 | ||
272 | err4: | ||
273 | err3: | ||
274 | iounmap(l3->rt); | ||
275 | err2: | 261 | err2: |
262 | free_irq(l3->debug_irq, l3); | ||
276 | err1: | 263 | err1: |
277 | kfree(l3); | 264 | iounmap(l3->rt); |
278 | err0: | 265 | err0: |
266 | kfree(l3); | ||
279 | return ret; | 267 | return ret; |
280 | } | 268 | } |
281 | 269 | ||
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c index 05f6abc96b0d..f47813edd951 100644 --- a/arch/arm/mach-omap2/omap_phy_internal.c +++ b/arch/arm/mach-omap2/omap_phy_internal.c | |||
@@ -50,13 +50,16 @@ int omap4430_phy_init(struct device *dev) | |||
50 | { | 50 | { |
51 | ctrl_base = ioremap(OMAP443X_SCM_BASE, SZ_1K); | 51 | ctrl_base = ioremap(OMAP443X_SCM_BASE, SZ_1K); |
52 | if (!ctrl_base) { | 52 | if (!ctrl_base) { |
53 | dev_err(dev, "control module ioremap failed\n"); | 53 | pr_err("control module ioremap failed\n"); |
54 | return -ENOMEM; | 54 | return -ENOMEM; |
55 | } | 55 | } |
56 | /* Power down the phy */ | 56 | /* Power down the phy */ |
57 | __raw_writel(PHY_PD, ctrl_base + CONTROL_DEV_CONF); | 57 | __raw_writel(PHY_PD, ctrl_base + CONTROL_DEV_CONF); |
58 | phyclk = clk_get(dev, "ocp2scp_usb_phy_ick"); | ||
59 | 58 | ||
59 | if (!dev) | ||
60 | return 0; | ||
61 | |||
62 | phyclk = clk_get(dev, "ocp2scp_usb_phy_ick"); | ||
60 | if (IS_ERR(phyclk)) { | 63 | if (IS_ERR(phyclk)) { |
61 | dev_err(dev, "cannot clk_get ocp2scp_usb_phy_ick\n"); | 64 | dev_err(dev, "cannot clk_get ocp2scp_usb_phy_ick\n"); |
62 | iounmap(ctrl_base); | 65 | iounmap(ctrl_base); |
@@ -228,7 +231,7 @@ void am35x_musb_clear_irq(void) | |||
228 | regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); | 231 | regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); |
229 | } | 232 | } |
230 | 233 | ||
231 | void am35x_musb_set_mode(u8 musb_mode) | 234 | void am35x_set_mode(u8 musb_mode) |
232 | { | 235 | { |
233 | u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); | 236 | u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); |
234 | 237 | ||
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 797bfd12b643..45bcfce77352 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h | |||
@@ -36,11 +36,16 @@ static inline int omap4_opp_init(void) | |||
36 | } | 36 | } |
37 | #endif | 37 | #endif |
38 | 38 | ||
39 | /* | ||
40 | * cpuidle mach specific parameters | ||
41 | * | ||
42 | * The board code can override the default C-states definition using | ||
43 | * omap3_pm_init_cpuidle | ||
44 | */ | ||
39 | struct cpuidle_params { | 45 | struct cpuidle_params { |
40 | u8 valid; | 46 | u32 exit_latency; /* exit_latency = sleep + wake-up latencies */ |
41 | u32 sleep_latency; | 47 | u32 target_residency; |
42 | u32 wake_latency; | 48 | u8 valid; /* validates the C-state */ |
43 | u32 threshold; | ||
44 | }; | 49 | }; |
45 | 50 | ||
46 | #if defined(CONFIG_PM) && defined(CONFIG_CPU_IDLE) | 51 | #if defined(CONFIG_PM) && defined(CONFIG_CPU_IDLE) |
@@ -73,10 +78,6 @@ extern u32 sleep_while_idle; | |||
73 | #define sleep_while_idle 0 | 78 | #define sleep_while_idle 0 |
74 | #endif | 79 | #endif |
75 | 80 | ||
76 | #if defined(CONFIG_CPU_IDLE) | ||
77 | extern void omap3_cpuidle_update_states(u32, u32); | ||
78 | #endif | ||
79 | |||
80 | #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) | 81 | #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) |
81 | extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev); | 82 | extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev); |
82 | extern int pm_dbg_regset_save(int reg_set); | 83 | extern int pm_dbg_regset_save(int reg_set); |
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 0c5e3a46a3ad..c155c9d1c82c 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
@@ -779,18 +779,6 @@ void omap3_pm_off_mode_enable(int enable) | |||
779 | else | 779 | else |
780 | state = PWRDM_POWER_RET; | 780 | state = PWRDM_POWER_RET; |
781 | 781 | ||
782 | #ifdef CONFIG_CPU_IDLE | ||
783 | /* | ||
784 | * Erratum i583: implementation for ES rev < Es1.2 on 3630. We cannot | ||
785 | * enable OFF mode in a stable form for previous revisions, restrict | ||
786 | * instead to RET | ||
787 | */ | ||
788 | if (IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583)) | ||
789 | omap3_cpuidle_update_states(state, PWRDM_POWER_RET); | ||
790 | else | ||
791 | omap3_cpuidle_update_states(state, state); | ||
792 | #endif | ||
793 | |||
794 | list_for_each_entry(pwrst, &pwrst_list, node) { | 782 | list_for_each_entry(pwrst, &pwrst_list, node) { |
795 | if (IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583) && | 783 | if (IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583) && |
796 | pwrst->pwrdm == core_pwrdm && | 784 | pwrst->pwrdm == core_pwrdm && |
@@ -895,8 +883,6 @@ static int __init omap3_pm_init(void) | |||
895 | 883 | ||
896 | pm_errata_configure(); | 884 | pm_errata_configure(); |
897 | 885 | ||
898 | printk(KERN_ERR "Power Management for TI OMAP3.\n"); | ||
899 | |||
900 | /* XXX prcm_setup_regs needs to be before enabling hw | 886 | /* XXX prcm_setup_regs needs to be before enabling hw |
901 | * supervised mode for powerdomains */ | 887 | * supervised mode for powerdomains */ |
902 | prcm_setup_regs(); | 888 | prcm_setup_regs(); |
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c index 76cfff2db514..59a870be8390 100644 --- a/arch/arm/mach-omap2/pm44xx.c +++ b/arch/arm/mach-omap2/pm44xx.c | |||
@@ -105,13 +105,11 @@ static int __init omap4_pm_init(void) | |||
105 | 105 | ||
106 | pr_err("Power Management for TI OMAP4.\n"); | 106 | pr_err("Power Management for TI OMAP4.\n"); |
107 | 107 | ||
108 | #ifdef CONFIG_PM | ||
109 | ret = pwrdm_for_each(pwrdms_setup, NULL); | 108 | ret = pwrdm_for_each(pwrdms_setup, NULL); |
110 | if (ret) { | 109 | if (ret) { |
111 | pr_err("Failed to setup powerdomains\n"); | 110 | pr_err("Failed to setup powerdomains\n"); |
112 | goto err2; | 111 | goto err2; |
113 | } | 112 | } |
114 | #endif | ||
115 | 113 | ||
116 | #ifdef CONFIG_SUSPEND | 114 | #ifdef CONFIG_SUSPEND |
117 | suspend_set_ops(&omap_pm_ops); | 115 | suspend_set_ops(&omap_pm_ops); |
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index 13e24f913dd4..fb7dc52394a8 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c | |||
@@ -847,6 +847,14 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
847 | goto err_free_devinfo; | 847 | goto err_free_devinfo; |
848 | } | 848 | } |
849 | 849 | ||
850 | mem = request_mem_region(mem->start, resource_size(mem), | ||
851 | dev_name(&pdev->dev)); | ||
852 | if (!mem) { | ||
853 | dev_err(&pdev->dev, "%s: no mem region\n", __func__); | ||
854 | ret = -EBUSY; | ||
855 | goto err_free_devinfo; | ||
856 | } | ||
857 | |||
850 | irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | 858 | irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
851 | 859 | ||
852 | pm_runtime_enable(&pdev->dev); | 860 | pm_runtime_enable(&pdev->dev); |
@@ -883,7 +891,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
883 | ret = sr_late_init(sr_info); | 891 | ret = sr_late_init(sr_info); |
884 | if (ret) { | 892 | if (ret) { |
885 | pr_warning("%s: Error in SR late init\n", __func__); | 893 | pr_warning("%s: Error in SR late init\n", __func__); |
886 | goto err_release_region; | 894 | return ret; |
887 | } | 895 | } |
888 | } | 896 | } |
889 | 897 | ||
@@ -896,7 +904,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
896 | vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm); | 904 | vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm); |
897 | if (!vdd_dbg_dir) { | 905 | if (!vdd_dbg_dir) { |
898 | ret = -EINVAL; | 906 | ret = -EINVAL; |
899 | goto err_release_region; | 907 | goto err_iounmap; |
900 | } | 908 | } |
901 | 909 | ||
902 | sr_info->dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir); | 910 | sr_info->dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir); |
@@ -904,7 +912,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
904 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", | 912 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", |
905 | __func__); | 913 | __func__); |
906 | ret = PTR_ERR(sr_info->dbg_dir); | 914 | ret = PTR_ERR(sr_info->dbg_dir); |
907 | goto err_release_region; | 915 | goto err_iounmap; |
908 | } | 916 | } |
909 | 917 | ||
910 | (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, | 918 | (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, |
@@ -921,7 +929,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
921 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory" | 929 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory" |
922 | "for n-values\n", __func__); | 930 | "for n-values\n", __func__); |
923 | ret = PTR_ERR(nvalue_dir); | 931 | ret = PTR_ERR(nvalue_dir); |
924 | goto err_release_region; | 932 | goto err_debugfs; |
925 | } | 933 | } |
926 | 934 | ||
927 | omap_voltage_get_volttable(sr_info->voltdm, &volt_data); | 935 | omap_voltage_get_volttable(sr_info->voltdm, &volt_data); |
@@ -931,7 +939,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
931 | "entries for n-values\n", | 939 | "entries for n-values\n", |
932 | __func__, sr_info->voltdm->name); | 940 | __func__, sr_info->voltdm->name); |
933 | ret = -ENODATA; | 941 | ret = -ENODATA; |
934 | goto err_release_region; | 942 | goto err_debugfs; |
935 | } | 943 | } |
936 | 944 | ||
937 | for (i = 0; i < sr_info->nvalue_count; i++) { | 945 | for (i = 0; i < sr_info->nvalue_count; i++) { |
@@ -945,6 +953,11 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
945 | 953 | ||
946 | return ret; | 954 | return ret; |
947 | 955 | ||
956 | err_debugfs: | ||
957 | debugfs_remove_recursive(sr_info->dbg_dir); | ||
958 | err_iounmap: | ||
959 | list_del(&sr_info->node); | ||
960 | iounmap(sr_info->base); | ||
948 | err_release_region: | 961 | err_release_region: |
949 | release_mem_region(mem->start, resource_size(mem)); | 962 | release_mem_region(mem->start, resource_size(mem)); |
950 | err_free_devinfo: | 963 | err_free_devinfo: |
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c index 35559f77e2de..c7ed540d868d 100644 --- a/arch/arm/mach-omap2/usb-musb.c +++ b/arch/arm/mach-omap2/usb-musb.c | |||
@@ -108,7 +108,13 @@ static void usb_musb_mux_init(struct omap_musb_board_data *board_data) | |||
108 | } | 108 | } |
109 | } | 109 | } |
110 | 110 | ||
111 | void __init usb_musb_init(struct omap_musb_board_data *board_data) | 111 | static struct omap_musb_board_data musb_default_board_data = { |
112 | .interface_type = MUSB_INTERFACE_ULPI, | ||
113 | .mode = MUSB_OTG, | ||
114 | .power = 100, | ||
115 | }; | ||
116 | |||
117 | void __init usb_musb_init(struct omap_musb_board_data *musb_board_data) | ||
112 | { | 118 | { |
113 | struct omap_hwmod *oh; | 119 | struct omap_hwmod *oh; |
114 | struct omap_device *od; | 120 | struct omap_device *od; |
@@ -116,11 +122,12 @@ void __init usb_musb_init(struct omap_musb_board_data *board_data) | |||
116 | struct device *dev; | 122 | struct device *dev; |
117 | int bus_id = -1; | 123 | int bus_id = -1; |
118 | const char *oh_name, *name; | 124 | const char *oh_name, *name; |
125 | struct omap_musb_board_data *board_data; | ||
119 | 126 | ||
120 | if (cpu_is_omap3517() || cpu_is_omap3505()) { | 127 | if (musb_board_data) |
121 | } else if (cpu_is_omap44xx()) { | 128 | board_data = musb_board_data; |
122 | usb_musb_mux_init(board_data); | 129 | else |
123 | } | 130 | board_data = &musb_default_board_data; |
124 | 131 | ||
125 | /* | 132 | /* |
126 | * REVISIT: This line can be removed once all the platforms using | 133 | * REVISIT: This line can be removed once all the platforms using |
@@ -164,10 +171,15 @@ void __init usb_musb_init(struct omap_musb_board_data *board_data) | |||
164 | dev->dma_mask = &musb_dmamask; | 171 | dev->dma_mask = &musb_dmamask; |
165 | dev->coherent_dma_mask = musb_dmamask; | 172 | dev->coherent_dma_mask = musb_dmamask; |
166 | put_device(dev); | 173 | put_device(dev); |
174 | |||
175 | if (cpu_is_omap44xx()) | ||
176 | omap4430_phy_init(dev); | ||
167 | } | 177 | } |
168 | 178 | ||
169 | #else | 179 | #else |
170 | void __init usb_musb_init(struct omap_musb_board_data *board_data) | 180 | void __init usb_musb_init(struct omap_musb_board_data *board_data) |
171 | { | 181 | { |
182 | if (cpu_is_omap44xx()) | ||
183 | omap4430_phy_init(NULL); | ||
172 | } | 184 | } |
173 | #endif /* CONFIG_USB_MUSB_SOC */ | 185 | #endif /* CONFIG_USB_MUSB_SOC */ |
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c index 8a3c05f3c1d6..8dd26b765b7d 100644 --- a/arch/arm/mach-omap2/usb-tusb6010.c +++ b/arch/arm/mach-omap2/usb-tusb6010.c | |||
@@ -293,12 +293,11 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data *data, | |||
293 | ); | 293 | ); |
294 | 294 | ||
295 | /* IRQ */ | 295 | /* IRQ */ |
296 | status = gpio_request(irq, "TUSB6010 irq"); | 296 | status = gpio_request_one(irq, GPIOF_IN, "TUSB6010 irq"); |
297 | if (status < 0) { | 297 | if (status < 0) { |
298 | printk(error, 3, status); | 298 | printk(error, 3, status); |
299 | return status; | 299 | return status; |
300 | } | 300 | } |
301 | gpio_direction_input(irq); | ||
302 | tusb_resources[2].start = irq + IH_GPIO_BASE; | 301 | tusb_resources[2].start = irq + IH_GPIO_BASE; |
303 | 302 | ||
304 | /* set up memory timings ... can speed them up later */ | 303 | /* set up memory timings ... can speed them up later */ |
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 0c1552d9d995..9ef3789ded4b 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c | |||
@@ -148,7 +148,6 @@ static int vp_volt_debug_get(void *data, u64 *val) | |||
148 | } | 148 | } |
149 | 149 | ||
150 | vsel = vdd->read_reg(prm_mod_offs, vdd->vp_data->voltage); | 150 | vsel = vdd->read_reg(prm_mod_offs, vdd->vp_data->voltage); |
151 | pr_notice("curr_vsel = %x\n", vsel); | ||
152 | 151 | ||
153 | if (!vdd->pmic_info->vsel_to_uv) { | 152 | if (!vdd->pmic_info->vsel_to_uv) { |
154 | pr_warning("PMIC function to convert vsel to voltage" | 153 | pr_warning("PMIC function to convert vsel to voltage" |
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 2fc9f94cdd29..cd19309fd3b8 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig | |||
@@ -153,7 +153,6 @@ config MACH_XCEP | |||
153 | bool "Iskratel Electronics XCEP" | 153 | bool "Iskratel Electronics XCEP" |
154 | select PXA25x | 154 | select PXA25x |
155 | select MTD | 155 | select MTD |
156 | select MTD_PARTITIONS | ||
157 | select MTD_PHYSMAP | 156 | select MTD_PHYSMAP |
158 | select MTD_CFI_INTELEXT | 157 | select MTD_CFI_INTELEXT |
159 | select MTD_CFI | 158 | select MTD_CFI |
diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c index 44440cbd7620..dabc141243f3 100644 --- a/arch/arm/mach-s3c2410/mach-amlm5900.c +++ b/arch/arm/mach-s3c2410/mach-amlm5900.c | |||
@@ -58,8 +58,6 @@ | |||
58 | #include <plat/cpu.h> | 58 | #include <plat/cpu.h> |
59 | #include <plat/gpio-cfg.h> | 59 | #include <plat/gpio-cfg.h> |
60 | 60 | ||
61 | #ifdef CONFIG_MTD_PARTITIONS | ||
62 | |||
63 | #include <linux/mtd/mtd.h> | 61 | #include <linux/mtd/mtd.h> |
64 | #include <linux/mtd/partitions.h> | 62 | #include <linux/mtd/partitions.h> |
65 | #include <linux/mtd/map.h> | 63 | #include <linux/mtd/map.h> |
@@ -113,7 +111,6 @@ static struct platform_device amlm5900_device_nor = { | |||
113 | .num_resources = 1, | 111 | .num_resources = 1, |
114 | .resource = &amlm5900_nor_resource, | 112 | .resource = &amlm5900_nor_resource, |
115 | }; | 113 | }; |
116 | #endif | ||
117 | 114 | ||
118 | static struct map_desc amlm5900_iodesc[] __initdata = { | 115 | static struct map_desc amlm5900_iodesc[] __initdata = { |
119 | }; | 116 | }; |
@@ -158,9 +155,7 @@ static struct platform_device *amlm5900_devices[] __initdata = { | |||
158 | &s3c_device_rtc, | 155 | &s3c_device_rtc, |
159 | &s3c_device_usbgadget, | 156 | &s3c_device_usbgadget, |
160 | &s3c_device_sdi, | 157 | &s3c_device_sdi, |
161 | #ifdef CONFIG_MTD_PARTITIONS | ||
162 | &amlm5900_device_nor, | 158 | &amlm5900_device_nor, |
163 | #endif | ||
164 | }; | 159 | }; |
165 | 160 | ||
166 | static void __init amlm5900_map_io(void) | 161 | static void __init amlm5900_map_io(void) |
diff --git a/arch/arm/mach-s3c2410/mach-tct_hammer.c b/arch/arm/mach-s3c2410/mach-tct_hammer.c index a15d0621c22f..43c2b831b9e8 100644 --- a/arch/arm/mach-s3c2410/mach-tct_hammer.c +++ b/arch/arm/mach-s3c2410/mach-tct_hammer.c | |||
@@ -49,8 +49,6 @@ | |||
49 | #include <plat/devs.h> | 49 | #include <plat/devs.h> |
50 | #include <plat/cpu.h> | 50 | #include <plat/cpu.h> |
51 | 51 | ||
52 | #ifdef CONFIG_MTD_PARTITIONS | ||
53 | |||
54 | #include <linux/mtd/mtd.h> | 52 | #include <linux/mtd/mtd.h> |
55 | #include <linux/mtd/partitions.h> | 53 | #include <linux/mtd/partitions.h> |
56 | #include <linux/mtd/map.h> | 54 | #include <linux/mtd/map.h> |
@@ -91,8 +89,6 @@ static struct platform_device tct_hammer_device_nor = { | |||
91 | .resource = &tct_hammer_nor_resource, | 89 | .resource = &tct_hammer_nor_resource, |
92 | }; | 90 | }; |
93 | 91 | ||
94 | #endif | ||
95 | |||
96 | static struct map_desc tct_hammer_iodesc[] __initdata = { | 92 | static struct map_desc tct_hammer_iodesc[] __initdata = { |
97 | }; | 93 | }; |
98 | 94 | ||
@@ -133,9 +129,7 @@ static struct platform_device *tct_hammer_devices[] __initdata = { | |||
133 | &s3c_device_rtc, | 129 | &s3c_device_rtc, |
134 | &s3c_device_usbgadget, | 130 | &s3c_device_usbgadget, |
135 | &s3c_device_sdi, | 131 | &s3c_device_sdi, |
136 | #ifdef CONFIG_MTD_PARTITIONS | ||
137 | &tct_hammer_device_nor, | 132 | &tct_hammer_device_nor, |
138 | #endif | ||
139 | }; | 133 | }; |
140 | 134 | ||
141 | static void __init tct_hammer_map_io(void) | 135 | static void __init tct_hammer_map_io(void) |
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c index 405e62128917..82db072cb836 100644 --- a/arch/arm/mach-s3c64xx/dev-spi.c +++ b/arch/arm/mach-s3c64xx/dev-spi.c | |||
@@ -16,7 +16,6 @@ | |||
16 | 16 | ||
17 | #include <mach/dma.h> | 17 | #include <mach/dma.h> |
18 | #include <mach/map.h> | 18 | #include <mach/map.h> |
19 | #include <mach/gpio-bank-c.h> | ||
20 | #include <mach/spi-clocks.h> | 19 | #include <mach/spi-clocks.h> |
21 | #include <mach/irqs.h> | 20 | #include <mach/irqs.h> |
22 | 21 | ||
@@ -40,23 +39,15 @@ static char *spi_src_clks[] = { | |||
40 | */ | 39 | */ |
41 | static int s3c64xx_spi_cfg_gpio(struct platform_device *pdev) | 40 | static int s3c64xx_spi_cfg_gpio(struct platform_device *pdev) |
42 | { | 41 | { |
42 | unsigned int base; | ||
43 | |||
43 | switch (pdev->id) { | 44 | switch (pdev->id) { |
44 | case 0: | 45 | case 0: |
45 | s3c_gpio_cfgpin(S3C64XX_GPC(0), S3C64XX_GPC0_SPI_MISO0); | 46 | base = S3C64XX_GPC(0); |
46 | s3c_gpio_cfgpin(S3C64XX_GPC(1), S3C64XX_GPC1_SPI_CLKO); | ||
47 | s3c_gpio_cfgpin(S3C64XX_GPC(2), S3C64XX_GPC2_SPI_MOSIO); | ||
48 | s3c_gpio_setpull(S3C64XX_GPC(0), S3C_GPIO_PULL_UP); | ||
49 | s3c_gpio_setpull(S3C64XX_GPC(1), S3C_GPIO_PULL_UP); | ||
50 | s3c_gpio_setpull(S3C64XX_GPC(2), S3C_GPIO_PULL_UP); | ||
51 | break; | 47 | break; |
52 | 48 | ||
53 | case 1: | 49 | case 1: |
54 | s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_SPI_MISO1); | 50 | base = S3C64XX_GPC(4); |
55 | s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_SPI_CLK1); | ||
56 | s3c_gpio_cfgpin(S3C64XX_GPC(6), S3C64XX_GPC6_SPI_MOSI1); | ||
57 | s3c_gpio_setpull(S3C64XX_GPC(4), S3C_GPIO_PULL_UP); | ||
58 | s3c_gpio_setpull(S3C64XX_GPC(5), S3C_GPIO_PULL_UP); | ||
59 | s3c_gpio_setpull(S3C64XX_GPC(6), S3C_GPIO_PULL_UP); | ||
60 | break; | 51 | break; |
61 | 52 | ||
62 | default: | 53 | default: |
@@ -64,6 +55,9 @@ static int s3c64xx_spi_cfg_gpio(struct platform_device *pdev) | |||
64 | return -EINVAL; | 55 | return -EINVAL; |
65 | } | 56 | } |
66 | 57 | ||
58 | s3c_gpio_cfgall_range(base, 3, | ||
59 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
60 | |||
67 | return 0; | 61 | return 0; |
68 | } | 62 | } |
69 | 63 | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h deleted file mode 100644 index 34212e1a7e81..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h +++ /dev/null | |||
@@ -1,48 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * GPIO Bank A register and configuration definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #define S3C64XX_GPACON (S3C64XX_GPA_BASE + 0x00) | ||
16 | #define S3C64XX_GPADAT (S3C64XX_GPA_BASE + 0x04) | ||
17 | #define S3C64XX_GPAPUD (S3C64XX_GPA_BASE + 0x08) | ||
18 | #define S3C64XX_GPACONSLP (S3C64XX_GPA_BASE + 0x0c) | ||
19 | #define S3C64XX_GPAPUDSLP (S3C64XX_GPA_BASE + 0x10) | ||
20 | |||
21 | #define S3C64XX_GPA_CONMASK(__gpio) (0xf << ((__gpio) * 4)) | ||
22 | #define S3C64XX_GPA_INPUT(__gpio) (0x0 << ((__gpio) * 4)) | ||
23 | #define S3C64XX_GPA_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) | ||
24 | |||
25 | #define S3C64XX_GPA0_UART_RXD0 (0x02 << 0) | ||
26 | #define S3C64XX_GPA0_EINT_G1_0 (0x07 << 0) | ||
27 | |||
28 | #define S3C64XX_GPA1_UART_TXD0 (0x02 << 4) | ||
29 | #define S3C64XX_GPA1_EINT_G1_1 (0x07 << 4) | ||
30 | |||
31 | #define S3C64XX_GPA2_UART_nCTS0 (0x02 << 8) | ||
32 | #define S3C64XX_GPA2_EINT_G1_2 (0x07 << 8) | ||
33 | |||
34 | #define S3C64XX_GPA3_UART_nRTS0 (0x02 << 12) | ||
35 | #define S3C64XX_GPA3_EINT_G1_3 (0x07 << 12) | ||
36 | |||
37 | #define S3C64XX_GPA4_UART_RXD1 (0x02 << 16) | ||
38 | #define S3C64XX_GPA4_EINT_G1_4 (0x07 << 16) | ||
39 | |||
40 | #define S3C64XX_GPA5_UART_TXD1 (0x02 << 20) | ||
41 | #define S3C64XX_GPA5_EINT_G1_5 (0x07 << 20) | ||
42 | |||
43 | #define S3C64XX_GPA6_UART_nCTS1 (0x02 << 24) | ||
44 | #define S3C64XX_GPA6_EINT_G1_6 (0x07 << 24) | ||
45 | |||
46 | #define S3C64XX_GPA7_UART_nRTS1 (0x02 << 28) | ||
47 | #define S3C64XX_GPA7_EINT_G1_7 (0x07 << 28) | ||
48 | |||
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h deleted file mode 100644 index 7232c037e642..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * GPIO Bank B register and configuration definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #define S3C64XX_GPBCON (S3C64XX_GPB_BASE + 0x00) | ||
16 | #define S3C64XX_GPBDAT (S3C64XX_GPB_BASE + 0x04) | ||
17 | #define S3C64XX_GPBPUD (S3C64XX_GPB_BASE + 0x08) | ||
18 | #define S3C64XX_GPBCONSLP (S3C64XX_GPB_BASE + 0x0c) | ||
19 | #define S3C64XX_GPBPUDSLP (S3C64XX_GPB_BASE + 0x10) | ||
20 | |||
21 | #define S3C64XX_GPB_CONMASK(__gpio) (0xf << ((__gpio) * 4)) | ||
22 | #define S3C64XX_GPB_INPUT(__gpio) (0x0 << ((__gpio) * 4)) | ||
23 | #define S3C64XX_GPB_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) | ||
24 | |||
25 | #define S3C64XX_GPB0_UART_RXD2 (0x02 << 0) | ||
26 | #define S3C64XX_GPB0_EXTDMA_REQ (0x03 << 0) | ||
27 | #define S3C64XX_GPB0_IrDA_RXD (0x04 << 0) | ||
28 | #define S3C64XX_GPB0_ADDR_CF0 (0x05 << 0) | ||
29 | #define S3C64XX_GPB0_EINT_G1_8 (0x07 << 0) | ||
30 | |||
31 | #define S3C64XX_GPB1_UART_TXD2 (0x02 << 4) | ||
32 | #define S3C64XX_GPB1_EXTDMA_ACK (0x03 << 4) | ||
33 | #define S3C64XX_GPB1_IrDA_TXD (0x04 << 4) | ||
34 | #define S3C64XX_GPB1_ADDR_CF1 (0x05 << 4) | ||
35 | #define S3C64XX_GPB1_EINT_G1_9 (0x07 << 4) | ||
36 | |||
37 | #define S3C64XX_GPB2_UART_RXD3 (0x02 << 8) | ||
38 | #define S3C64XX_GPB2_IrDA_RXD (0x03 << 8) | ||
39 | #define S3C64XX_GPB2_EXTDMA_REQ (0x04 << 8) | ||
40 | #define S3C64XX_GPB2_ADDR_CF2 (0x05 << 8) | ||
41 | #define S3C64XX_GPB2_I2C_SCL1 (0x06 << 8) | ||
42 | #define S3C64XX_GPB2_EINT_G1_10 (0x07 << 8) | ||
43 | |||
44 | #define S3C64XX_GPB3_UART_TXD3 (0x02 << 12) | ||
45 | #define S3C64XX_GPB3_IrDA_TXD (0x03 << 12) | ||
46 | #define S3C64XX_GPB3_EXTDMA_ACK (0x04 << 12) | ||
47 | #define S3C64XX_GPB3_I2C_SDA1 (0x06 << 12) | ||
48 | #define S3C64XX_GPB3_EINT_G1_11 (0x07 << 12) | ||
49 | |||
50 | #define S3C64XX_GPB4_IrDA_SDBW (0x02 << 16) | ||
51 | #define S3C64XX_GPB4_CAM_FIELD (0x03 << 16) | ||
52 | #define S3C64XX_GPB4_CF_DATA_DIR (0x04 << 16) | ||
53 | #define S3C64XX_GPB4_EINT_G1_12 (0x07 << 16) | ||
54 | |||
55 | #define S3C64XX_GPB5_I2C_SCL0 (0x02 << 20) | ||
56 | #define S3C64XX_GPB5_EINT_G1_13 (0x07 << 20) | ||
57 | |||
58 | #define S3C64XX_GPB6_I2C_SDA0 (0x02 << 24) | ||
59 | #define S3C64XX_GPB6_EINT_G1_14 (0x07 << 24) | ||
60 | |||
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h deleted file mode 100644 index db189ab1639a..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h +++ /dev/null | |||
@@ -1,53 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * GPIO Bank C register and configuration definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #define S3C64XX_GPCCON (S3C64XX_GPC_BASE + 0x00) | ||
16 | #define S3C64XX_GPCDAT (S3C64XX_GPC_BASE + 0x04) | ||
17 | #define S3C64XX_GPCPUD (S3C64XX_GPC_BASE + 0x08) | ||
18 | #define S3C64XX_GPCCONSLP (S3C64XX_GPC_BASE + 0x0c) | ||
19 | #define S3C64XX_GPCPUDSLP (S3C64XX_GPC_BASE + 0x10) | ||
20 | |||
21 | #define S3C64XX_GPC_CONMASK(__gpio) (0xf << ((__gpio) * 4)) | ||
22 | #define S3C64XX_GPC_INPUT(__gpio) (0x0 << ((__gpio) * 4)) | ||
23 | #define S3C64XX_GPC_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) | ||
24 | |||
25 | #define S3C64XX_GPC0_SPI_MISO0 (0x02 << 0) | ||
26 | #define S3C64XX_GPC0_EINT_G2_0 (0x07 << 0) | ||
27 | |||
28 | #define S3C64XX_GPC1_SPI_CLKO (0x02 << 4) | ||
29 | #define S3C64XX_GPC1_EINT_G2_1 (0x07 << 4) | ||
30 | |||
31 | #define S3C64XX_GPC2_SPI_MOSIO (0x02 << 8) | ||
32 | #define S3C64XX_GPC2_EINT_G2_2 (0x07 << 8) | ||
33 | |||
34 | #define S3C64XX_GPC3_SPI_nCSO (0x02 << 12) | ||
35 | #define S3C64XX_GPC3_EINT_G2_3 (0x07 << 12) | ||
36 | |||
37 | #define S3C64XX_GPC4_SPI_MISO1 (0x02 << 16) | ||
38 | #define S3C64XX_GPC4_MMC2_CMD (0x03 << 16) | ||
39 | #define S3C64XX_GPC4_I2S_V40_DO0 (0x05 << 16) | ||
40 | #define S3C64XX_GPC4_EINT_G2_4 (0x07 << 16) | ||
41 | |||
42 | #define S3C64XX_GPC5_SPI_CLK1 (0x02 << 20) | ||
43 | #define S3C64XX_GPC5_MMC2_CLK (0x03 << 20) | ||
44 | #define S3C64XX_GPC5_I2S_V40_DO1 (0x05 << 20) | ||
45 | #define S3C64XX_GPC5_EINT_G2_5 (0x07 << 20) | ||
46 | |||
47 | #define S3C64XX_GPC6_SPI_MOSI1 (0x02 << 24) | ||
48 | #define S3C64XX_GPC6_EINT_G2_6 (0x07 << 24) | ||
49 | |||
50 | #define S3C64XX_GPC7_SPI_nCS1 (0x02 << 28) | ||
51 | #define S3C64XX_GPC7_I2S_V40_DO2 (0x05 << 28) | ||
52 | #define S3C64XX_GPC7_EINT_G2_7 (0x07 << 28) | ||
53 | |||
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h deleted file mode 100644 index 1a01cee7aca3..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h +++ /dev/null | |||
@@ -1,49 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * GPIO Bank D register and configuration definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #define S3C64XX_GPDCON (S3C64XX_GPD_BASE + 0x00) | ||
16 | #define S3C64XX_GPDDAT (S3C64XX_GPD_BASE + 0x04) | ||
17 | #define S3C64XX_GPDPUD (S3C64XX_GPD_BASE + 0x08) | ||
18 | #define S3C64XX_GPDCONSLP (S3C64XX_GPD_BASE + 0x0c) | ||
19 | #define S3C64XX_GPDPUDSLP (S3C64XX_GPD_BASE + 0x10) | ||
20 | |||
21 | #define S3C64XX_GPD_CONMASK(__gpio) (0xf << ((__gpio) * 4)) | ||
22 | #define S3C64XX_GPD_INPUT(__gpio) (0x0 << ((__gpio) * 4)) | ||
23 | #define S3C64XX_GPD_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) | ||
24 | |||
25 | #define S3C64XX_GPD0_PCM0_SCLK (0x02 << 0) | ||
26 | #define S3C64XX_GPD0_I2S0_CLK (0x03 << 0) | ||
27 | #define S3C64XX_GPD0_AC97_BITCLK (0x04 << 0) | ||
28 | #define S3C64XX_GPD0_EINT_G3_0 (0x07 << 0) | ||
29 | |||
30 | #define S3C64XX_GPD1_PCM0_EXTCLK (0x02 << 4) | ||
31 | #define S3C64XX_GPD1_I2S0_CDCLK (0x03 << 4) | ||
32 | #define S3C64XX_GPD1_AC97_nRESET (0x04 << 4) | ||
33 | #define S3C64XX_GPD1_EINT_G3_1 (0x07 << 4) | ||
34 | |||
35 | #define S3C64XX_GPD2_PCM0_FSYNC (0x02 << 8) | ||
36 | #define S3C64XX_GPD2_I2S0_LRCLK (0x03 << 8) | ||
37 | #define S3C64XX_GPD2_AC97_SYNC (0x04 << 8) | ||
38 | #define S3C64XX_GPD2_EINT_G3_2 (0x07 << 8) | ||
39 | |||
40 | #define S3C64XX_GPD3_PCM0_SIN (0x02 << 12) | ||
41 | #define S3C64XX_GPD3_I2S0_DI (0x03 << 12) | ||
42 | #define S3C64XX_GPD3_AC97_SDI (0x04 << 12) | ||
43 | #define S3C64XX_GPD3_EINT_G3_3 (0x07 << 12) | ||
44 | |||
45 | #define S3C64XX_GPD4_PCM0_SOUT (0x02 << 16) | ||
46 | #define S3C64XX_GPD4_I2S0_D0 (0x03 << 16) | ||
47 | #define S3C64XX_GPD4_AC97_SDO (0x04 << 16) | ||
48 | #define S3C64XX_GPD4_EINT_G3_4 (0x07 << 16) | ||
49 | |||
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h deleted file mode 100644 index f057adb627dd..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * GPIO Bank E register and configuration definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #define S3C64XX_GPECON (S3C64XX_GPE_BASE + 0x00) | ||
16 | #define S3C64XX_GPEDAT (S3C64XX_GPE_BASE + 0x04) | ||
17 | #define S3C64XX_GPEPUD (S3C64XX_GPE_BASE + 0x08) | ||
18 | #define S3C64XX_GPECONSLP (S3C64XX_GPE_BASE + 0x0c) | ||
19 | #define S3C64XX_GPEPUDSLP (S3C64XX_GPE_BASE + 0x10) | ||
20 | |||
21 | #define S3C64XX_GPE_CONMASK(__gpio) (0xf << ((__gpio) * 4)) | ||
22 | #define S3C64XX_GPE_INPUT(__gpio) (0x0 << ((__gpio) * 4)) | ||
23 | #define S3C64XX_GPE_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) | ||
24 | |||
25 | #define S3C64XX_GPE0_PCM1_SCLK (0x02 << 0) | ||
26 | #define S3C64XX_GPE0_I2S1_CLK (0x03 << 0) | ||
27 | #define S3C64XX_GPE0_AC97_BITCLK (0x04 << 0) | ||
28 | |||
29 | #define S3C64XX_GPE1_PCM1_EXTCLK (0x02 << 4) | ||
30 | #define S3C64XX_GPE1_I2S1_CDCLK (0x03 << 4) | ||
31 | #define S3C64XX_GPE1_AC97_nRESET (0x04 << 4) | ||
32 | |||
33 | #define S3C64XX_GPE2_PCM1_FSYNC (0x02 << 8) | ||
34 | #define S3C64XX_GPE2_I2S1_LRCLK (0x03 << 8) | ||
35 | #define S3C64XX_GPE2_AC97_SYNC (0x04 << 8) | ||
36 | |||
37 | #define S3C64XX_GPE3_PCM1_SIN (0x02 << 12) | ||
38 | #define S3C64XX_GPE3_I2S1_DI (0x03 << 12) | ||
39 | #define S3C64XX_GPE3_AC97_SDI (0x04 << 12) | ||
40 | |||
41 | #define S3C64XX_GPE4_PCM1_SOUT (0x02 << 16) | ||
42 | #define S3C64XX_GPE4_I2S1_D0 (0x03 << 16) | ||
43 | #define S3C64XX_GPE4_AC97_SDO (0x04 << 16) | ||
44 | |||
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h deleted file mode 100644 index 62ab8f5e7835..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h +++ /dev/null | |||
@@ -1,71 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * GPIO Bank F register and configuration definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #define S3C64XX_GPFCON (S3C64XX_GPF_BASE + 0x00) | ||
16 | #define S3C64XX_GPFDAT (S3C64XX_GPF_BASE + 0x04) | ||
17 | #define S3C64XX_GPFPUD (S3C64XX_GPF_BASE + 0x08) | ||
18 | #define S3C64XX_GPFCONSLP (S3C64XX_GPF_BASE + 0x0c) | ||
19 | #define S3C64XX_GPFPUDSLP (S3C64XX_GPF_BASE + 0x10) | ||
20 | |||
21 | #define S3C64XX_GPF_CONMASK(__gpio) (0x3 << ((__gpio) * 2)) | ||
22 | #define S3C64XX_GPF_INPUT(__gpio) (0x0 << ((__gpio) * 2)) | ||
23 | #define S3C64XX_GPF_OUTPUT(__gpio) (0x1 << ((__gpio) * 2)) | ||
24 | |||
25 | #define S3C64XX_GPF0_CAMIF_CLK (0x02 << 0) | ||
26 | #define S3C64XX_GPF0_EINT_G4_0 (0x03 << 0) | ||
27 | |||
28 | #define S3C64XX_GPF1_CAMIF_HREF (0x02 << 2) | ||
29 | #define S3C64XX_GPF1_EINT_G4_1 (0x03 << 2) | ||
30 | |||
31 | #define S3C64XX_GPF2_CAMIF_PCLK (0x02 << 4) | ||
32 | #define S3C64XX_GPF2_EINT_G4_2 (0x03 << 4) | ||
33 | |||
34 | #define S3C64XX_GPF3_CAMIF_nRST (0x02 << 6) | ||
35 | #define S3C64XX_GPF3_EINT_G4_3 (0x03 << 6) | ||
36 | |||
37 | #define S3C64XX_GPF4_CAMIF_VSYNC (0x02 << 8) | ||
38 | #define S3C64XX_GPF4_EINT_G4_4 (0x03 << 8) | ||
39 | |||
40 | #define S3C64XX_GPF5_CAMIF_YDATA0 (0x02 << 10) | ||
41 | #define S3C64XX_GPF5_EINT_G4_5 (0x03 << 10) | ||
42 | |||
43 | #define S3C64XX_GPF6_CAMIF_YDATA1 (0x02 << 12) | ||
44 | #define S3C64XX_GPF6_EINT_G4_6 (0x03 << 12) | ||
45 | |||
46 | #define S3C64XX_GPF7_CAMIF_YDATA2 (0x02 << 14) | ||
47 | #define S3C64XX_GPF7_EINT_G4_7 (0x03 << 14) | ||
48 | |||
49 | #define S3C64XX_GPF8_CAMIF_YDATA3 (0x02 << 16) | ||
50 | #define S3C64XX_GPF8_EINT_G4_8 (0x03 << 16) | ||
51 | |||
52 | #define S3C64XX_GPF9_CAMIF_YDATA4 (0x02 << 18) | ||
53 | #define S3C64XX_GPF9_EINT_G4_9 (0x03 << 18) | ||
54 | |||
55 | #define S3C64XX_GPF10_CAMIF_YDATA5 (0x02 << 20) | ||
56 | #define S3C64XX_GPF10_EINT_G4_10 (0x03 << 20) | ||
57 | |||
58 | #define S3C64XX_GPF11_CAMIF_YDATA6 (0x02 << 22) | ||
59 | #define S3C64XX_GPF11_EINT_G4_11 (0x03 << 22) | ||
60 | |||
61 | #define S3C64XX_GPF12_CAMIF_YDATA7 (0x02 << 24) | ||
62 | #define S3C64XX_GPF12_EINT_G4_12 (0x03 << 24) | ||
63 | |||
64 | #define S3C64XX_GPF13_PWM_ECLK (0x02 << 26) | ||
65 | #define S3C64XX_GPF13_EINT_G4_13 (0x03 << 26) | ||
66 | |||
67 | #define S3C64XX_GPF14_PWM_TOUT0 (0x02 << 28) | ||
68 | #define S3C64XX_GPF14_CLKOUT0 (0x03 << 28) | ||
69 | |||
70 | #define S3C64XX_GPF15_PWM_TOUT1 (0x02 << 30) | ||
71 | |||
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h deleted file mode 100644 index b94954af1598..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h +++ /dev/null | |||
@@ -1,42 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * GPIO Bank G register and configuration definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #define S3C64XX_GPGCON (S3C64XX_GPG_BASE + 0x00) | ||
16 | #define S3C64XX_GPGDAT (S3C64XX_GPG_BASE + 0x04) | ||
17 | #define S3C64XX_GPGPUD (S3C64XX_GPG_BASE + 0x08) | ||
18 | #define S3C64XX_GPGCONSLP (S3C64XX_GPG_BASE + 0x0c) | ||
19 | #define S3C64XX_GPGPUDSLP (S3C64XX_GPG_BASE + 0x10) | ||
20 | |||
21 | #define S3C64XX_GPG_CONMASK(__gpio) (0xf << ((__gpio) * 4)) | ||
22 | #define S3C64XX_GPG_INPUT(__gpio) (0x0 << ((__gpio) * 4)) | ||
23 | #define S3C64XX_GPG_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) | ||
24 | |||
25 | #define S3C64XX_GPG0_MMC0_CLK (0x02 << 0) | ||
26 | #define S3C64XX_GPG0_EINT_G5_0 (0x07 << 0) | ||
27 | |||
28 | #define S3C64XX_GPG1_MMC0_CMD (0x02 << 4) | ||
29 | #define S3C64XX_GPG1_EINT_G5_1 (0x07 << 4) | ||
30 | |||
31 | #define S3C64XX_GPG2_MMC0_DATA0 (0x02 << 8) | ||
32 | #define S3C64XX_GPG2_EINT_G5_2 (0x07 << 8) | ||
33 | |||
34 | #define S3C64XX_GPG3_MMC0_DATA1 (0x02 << 12) | ||
35 | #define S3C64XX_GPG3_EINT_G5_3 (0x07 << 12) | ||
36 | |||
37 | #define S3C64XX_GPG4_MMC0_DATA2 (0x02 << 16) | ||
38 | #define S3C64XX_GPG4_EINT_G5_4 (0x07 << 16) | ||
39 | |||
40 | #define S3C64XX_GPG5_MMC0_DATA3 (0x02 << 20) | ||
41 | #define S3C64XX_GPG5_EINT_G5_5 (0x07 << 20) | ||
42 | |||
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h deleted file mode 100644 index 5d75aaad865e..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h +++ /dev/null | |||
@@ -1,74 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * GPIO Bank H register and configuration definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #define S3C64XX_GPHCON0 (S3C64XX_GPH_BASE + 0x00) | ||
16 | #define S3C64XX_GPHCON1 (S3C64XX_GPH_BASE + 0x04) | ||
17 | #define S3C64XX_GPHDAT (S3C64XX_GPH_BASE + 0x08) | ||
18 | #define S3C64XX_GPHPUD (S3C64XX_GPH_BASE + 0x0c) | ||
19 | #define S3C64XX_GPHCONSLP (S3C64XX_GPH_BASE + 0x10) | ||
20 | #define S3C64XX_GPHPUDSLP (S3C64XX_GPH_BASE + 0x14) | ||
21 | |||
22 | #define S3C64XX_GPH_CONMASK(__gpio) (0xf << ((__gpio) * 4)) | ||
23 | #define S3C64XX_GPH_INPUT(__gpio) (0x0 << ((__gpio) * 4)) | ||
24 | #define S3C64XX_GPH_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) | ||
25 | |||
26 | #define S3C64XX_GPH0_MMC1_CLK (0x02 << 0) | ||
27 | #define S3C64XX_GPH0_KP_COL0 (0x04 << 0) | ||
28 | #define S3C64XX_GPH0_EINT_G6_0 (0x07 << 0) | ||
29 | |||
30 | #define S3C64XX_GPH1_MMC1_CMD (0x02 << 4) | ||
31 | #define S3C64XX_GPH1_KP_COL1 (0x04 << 4) | ||
32 | #define S3C64XX_GPH1_EINT_G6_1 (0x07 << 4) | ||
33 | |||
34 | #define S3C64XX_GPH2_MMC1_DATA0 (0x02 << 8) | ||
35 | #define S3C64XX_GPH2_KP_COL2 (0x04 << 8) | ||
36 | #define S3C64XX_GPH2_EINT_G6_2 (0x07 << 8) | ||
37 | |||
38 | #define S3C64XX_GPH3_MMC1_DATA1 (0x02 << 12) | ||
39 | #define S3C64XX_GPH3_KP_COL3 (0x04 << 12) | ||
40 | #define S3C64XX_GPH3_EINT_G6_3 (0x07 << 12) | ||
41 | |||
42 | #define S3C64XX_GPH4_MMC1_DATA2 (0x02 << 16) | ||
43 | #define S3C64XX_GPH4_KP_COL4 (0x04 << 16) | ||
44 | #define S3C64XX_GPH4_EINT_G6_4 (0x07 << 16) | ||
45 | |||
46 | #define S3C64XX_GPH5_MMC1_DATA3 (0x02 << 20) | ||
47 | #define S3C64XX_GPH5_KP_COL5 (0x04 << 20) | ||
48 | #define S3C64XX_GPH5_EINT_G6_5 (0x07 << 20) | ||
49 | |||
50 | #define S3C64XX_GPH6_MMC1_DATA4 (0x02 << 24) | ||
51 | #define S3C64XX_GPH6_MMC2_DATA0 (0x03 << 24) | ||
52 | #define S3C64XX_GPH6_KP_COL6 (0x04 << 24) | ||
53 | #define S3C64XX_GPH6_I2S_V40_BCLK (0x05 << 24) | ||
54 | #define S3C64XX_GPH6_ADDR_CF0 (0x06 << 24) | ||
55 | #define S3C64XX_GPH6_EINT_G6_6 (0x07 << 24) | ||
56 | |||
57 | #define S3C64XX_GPH7_MMC1_DATA5 (0x02 << 28) | ||
58 | #define S3C64XX_GPH7_MMC2_DATA1 (0x03 << 28) | ||
59 | #define S3C64XX_GPH7_KP_COL7 (0x04 << 28) | ||
60 | #define S3C64XX_GPH7_I2S_V40_CDCLK (0x05 << 28) | ||
61 | #define S3C64XX_GPH7_ADDR_CF1 (0x06 << 28) | ||
62 | #define S3C64XX_GPH7_EINT_G6_7 (0x07 << 28) | ||
63 | |||
64 | #define S3C64XX_GPH8_MMC1_DATA6 (0x02 << 0) | ||
65 | #define S3C64XX_GPH8_MMC2_DATA2 (0x03 << 0) | ||
66 | #define S3C64XX_GPH8_I2S_V40_LRCLK (0x05 << 0) | ||
67 | #define S3C64XX_GPH8_ADDR_CF2 (0x06 << 0) | ||
68 | #define S3C64XX_GPH8_EINT_G6_8 (0x07 << 0) | ||
69 | |||
70 | #define S3C64XX_GPH9_OUTPUT (0x01 << 4) | ||
71 | #define S3C64XX_GPH9_MMC1_DATA7 (0x02 << 4) | ||
72 | #define S3C64XX_GPH9_MMC2_DATA3 (0x03 << 4) | ||
73 | #define S3C64XX_GPH9_I2S_V40_DI (0x05 << 4) | ||
74 | #define S3C64XX_GPH9_EINT_G6_9 (0x07 << 4) | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h deleted file mode 100644 index 4ceaa6098bc7..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * GPIO Bank I register and configuration definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #define S3C64XX_GPICON (S3C64XX_GPI_BASE + 0x00) | ||
16 | #define S3C64XX_GPIDAT (S3C64XX_GPI_BASE + 0x04) | ||
17 | #define S3C64XX_GPIPUD (S3C64XX_GPI_BASE + 0x08) | ||
18 | #define S3C64XX_GPICONSLP (S3C64XX_GPI_BASE + 0x0c) | ||
19 | #define S3C64XX_GPIPUDSLP (S3C64XX_GPI_BASE + 0x10) | ||
20 | |||
21 | #define S3C64XX_GPI_CONMASK(__gpio) (0x3 << ((__gpio) * 2)) | ||
22 | #define S3C64XX_GPI_INPUT(__gpio) (0x0 << ((__gpio) * 2)) | ||
23 | #define S3C64XX_GPI_OUTPUT(__gpio) (0x1 << ((__gpio) * 2)) | ||
24 | |||
25 | #define S3C64XX_GPI0_VD0 (0x02 << 0) | ||
26 | #define S3C64XX_GPI1_VD1 (0x02 << 2) | ||
27 | #define S3C64XX_GPI2_VD2 (0x02 << 4) | ||
28 | #define S3C64XX_GPI3_VD3 (0x02 << 6) | ||
29 | #define S3C64XX_GPI4_VD4 (0x02 << 8) | ||
30 | #define S3C64XX_GPI5_VD5 (0x02 << 10) | ||
31 | #define S3C64XX_GPI6_VD6 (0x02 << 12) | ||
32 | #define S3C64XX_GPI7_VD7 (0x02 << 14) | ||
33 | #define S3C64XX_GPI8_VD8 (0x02 << 16) | ||
34 | #define S3C64XX_GPI9_VD9 (0x02 << 18) | ||
35 | #define S3C64XX_GPI10_VD10 (0x02 << 20) | ||
36 | #define S3C64XX_GPI11_VD11 (0x02 << 22) | ||
37 | #define S3C64XX_GPI12_VD12 (0x02 << 24) | ||
38 | #define S3C64XX_GPI13_VD13 (0x02 << 26) | ||
39 | #define S3C64XX_GPI14_VD14 (0x02 << 28) | ||
40 | #define S3C64XX_GPI15_VD15 (0x02 << 30) | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h deleted file mode 100644 index 6f25cd079a40..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * GPIO Bank J register and configuration definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #define S3C64XX_GPJCON (S3C64XX_GPJ_BASE + 0x00) | ||
16 | #define S3C64XX_GPJDAT (S3C64XX_GPJ_BASE + 0x04) | ||
17 | #define S3C64XX_GPJPUD (S3C64XX_GPJ_BASE + 0x08) | ||
18 | #define S3C64XX_GPJCONSLP (S3C64XX_GPJ_BASE + 0x0c) | ||
19 | #define S3C64XX_GPJPUDSLP (S3C64XX_GPJ_BASE + 0x10) | ||
20 | |||
21 | #define S3C64XX_GPJ_CONMASK(__gpio) (0x3 << ((__gpio) * 2)) | ||
22 | #define S3C64XX_GPJ_INPUT(__gpio) (0x0 << ((__gpio) * 2)) | ||
23 | #define S3C64XX_GPJ_OUTPUT(__gpio) (0x1 << ((__gpio) * 2)) | ||
24 | |||
25 | #define S3C64XX_GPJ0_VD16 (0x02 << 0) | ||
26 | #define S3C64XX_GPJ1_VD17 (0x02 << 2) | ||
27 | #define S3C64XX_GPJ2_VD18 (0x02 << 4) | ||
28 | #define S3C64XX_GPJ3_VD19 (0x02 << 6) | ||
29 | #define S3C64XX_GPJ4_VD20 (0x02 << 8) | ||
30 | #define S3C64XX_GPJ5_VD21 (0x02 << 10) | ||
31 | #define S3C64XX_GPJ6_VD22 (0x02 << 12) | ||
32 | #define S3C64XX_GPJ7_VD23 (0x02 << 14) | ||
33 | #define S3C64XX_GPJ8_LCD_HSYNC (0x02 << 16) | ||
34 | #define S3C64XX_GPJ9_LCD_VSYNC (0x02 << 18) | ||
35 | #define S3C64XX_GPJ10_LCD_VDEN (0x02 << 20) | ||
36 | #define S3C64XX_GPJ11_LCD_VCLK (0x02 << 22) | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h deleted file mode 100644 index d0aeda1cd9de..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h +++ /dev/null | |||
@@ -1,54 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * GPIO Bank N register and configuration definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #define S3C64XX_GPNCON (S3C64XX_GPN_BASE + 0x00) | ||
16 | #define S3C64XX_GPNDAT (S3C64XX_GPN_BASE + 0x04) | ||
17 | #define S3C64XX_GPNPUD (S3C64XX_GPN_BASE + 0x08) | ||
18 | |||
19 | #define S3C64XX_GPN_CONMASK(__gpio) (0x3 << ((__gpio) * 2)) | ||
20 | #define S3C64XX_GPN_INPUT(__gpio) (0x0 << ((__gpio) * 2)) | ||
21 | #define S3C64XX_GPN_OUTPUT(__gpio) (0x1 << ((__gpio) * 2)) | ||
22 | |||
23 | #define S3C64XX_GPN0_EINT0 (0x02 << 0) | ||
24 | #define S3C64XX_GPN0_KP_ROW0 (0x03 << 0) | ||
25 | |||
26 | #define S3C64XX_GPN1_EINT1 (0x02 << 2) | ||
27 | #define S3C64XX_GPN1_KP_ROW1 (0x03 << 2) | ||
28 | |||
29 | #define S3C64XX_GPN2_EINT2 (0x02 << 4) | ||
30 | #define S3C64XX_GPN2_KP_ROW2 (0x03 << 4) | ||
31 | |||
32 | #define S3C64XX_GPN3_EINT3 (0x02 << 6) | ||
33 | #define S3C64XX_GPN3_KP_ROW3 (0x03 << 6) | ||
34 | |||
35 | #define S3C64XX_GPN4_EINT4 (0x02 << 8) | ||
36 | #define S3C64XX_GPN4_KP_ROW4 (0x03 << 8) | ||
37 | |||
38 | #define S3C64XX_GPN5_EINT5 (0x02 << 10) | ||
39 | #define S3C64XX_GPN5_KP_ROW5 (0x03 << 10) | ||
40 | |||
41 | #define S3C64XX_GPN6_EINT6 (0x02 << 12) | ||
42 | #define S3C64XX_GPN6_KP_ROW6 (0x03 << 12) | ||
43 | |||
44 | #define S3C64XX_GPN7_EINT7 (0x02 << 14) | ||
45 | #define S3C64XX_GPN7_KP_ROW7 (0x03 << 14) | ||
46 | |||
47 | #define S3C64XX_GPN8_EINT8 (0x02 << 16) | ||
48 | #define S3C64XX_GPN9_EINT9 (0x02 << 18) | ||
49 | #define S3C64XX_GPN10_EINT10 (0x02 << 20) | ||
50 | #define S3C64XX_GPN11_EINT11 (0x02 << 22) | ||
51 | #define S3C64XX_GPN12_EINT12 (0x02 << 24) | ||
52 | #define S3C64XX_GPN13_EINT13 (0x02 << 26) | ||
53 | #define S3C64XX_GPN14_EINT14 (0x02 << 28) | ||
54 | #define S3C64XX_GPN15_EINT15 (0x02 << 30) | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h deleted file mode 100644 index 21868fa102d0..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h +++ /dev/null | |||
@@ -1,70 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * GPIO Bank O register and configuration definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #define S3C64XX_GPOCON (S3C64XX_GPO_BASE + 0x00) | ||
16 | #define S3C64XX_GPODAT (S3C64XX_GPO_BASE + 0x04) | ||
17 | #define S3C64XX_GPOPUD (S3C64XX_GPO_BASE + 0x08) | ||
18 | #define S3C64XX_GPOCONSLP (S3C64XX_GPO_BASE + 0x0c) | ||
19 | #define S3C64XX_GPOPUDSLP (S3C64XX_GPO_BASE + 0x10) | ||
20 | |||
21 | #define S3C64XX_GPO_CONMASK(__gpio) (0x3 << ((__gpio) * 2)) | ||
22 | #define S3C64XX_GPO_INPUT(__gpio) (0x0 << ((__gpio) * 2)) | ||
23 | #define S3C64XX_GPO_OUTPUT(__gpio) (0x1 << ((__gpio) * 2)) | ||
24 | |||
25 | #define S3C64XX_GPO0_MEM0_nCS2 (0x02 << 0) | ||
26 | #define S3C64XX_GPO0_EINT_G7_0 (0x03 << 0) | ||
27 | |||
28 | #define S3C64XX_GPO1_MEM0_nCS3 (0x02 << 2) | ||
29 | #define S3C64XX_GPO1_EINT_G7_1 (0x03 << 2) | ||
30 | |||
31 | #define S3C64XX_GPO2_MEM0_nCS4 (0x02 << 4) | ||
32 | #define S3C64XX_GPO2_EINT_G7_2 (0x03 << 4) | ||
33 | |||
34 | #define S3C64XX_GPO3_MEM0_nCS5 (0x02 << 6) | ||
35 | #define S3C64XX_GPO3_EINT_G7_3 (0x03 << 6) | ||
36 | |||
37 | #define S3C64XX_GPO4_EINT_G7_4 (0x03 << 8) | ||
38 | |||
39 | #define S3C64XX_GPO5_EINT_G7_5 (0x03 << 10) | ||
40 | |||
41 | #define S3C64XX_GPO6_MEM0_ADDR6 (0x02 << 12) | ||
42 | #define S3C64XX_GPO6_EINT_G7_6 (0x03 << 12) | ||
43 | |||
44 | #define S3C64XX_GPO7_MEM0_ADDR7 (0x02 << 14) | ||
45 | #define S3C64XX_GPO7_EINT_G7_7 (0x03 << 14) | ||
46 | |||
47 | #define S3C64XX_GPO8_MEM0_ADDR8 (0x02 << 16) | ||
48 | #define S3C64XX_GPO8_EINT_G7_8 (0x03 << 16) | ||
49 | |||
50 | #define S3C64XX_GPO9_MEM0_ADDR9 (0x02 << 18) | ||
51 | #define S3C64XX_GPO9_EINT_G7_9 (0x03 << 18) | ||
52 | |||
53 | #define S3C64XX_GPO10_MEM0_ADDR10 (0x02 << 20) | ||
54 | #define S3C64XX_GPO10_EINT_G7_10 (0x03 << 20) | ||
55 | |||
56 | #define S3C64XX_GPO11_MEM0_ADDR11 (0x02 << 22) | ||
57 | #define S3C64XX_GPO11_EINT_G7_11 (0x03 << 22) | ||
58 | |||
59 | #define S3C64XX_GPO12_MEM0_ADDR12 (0x02 << 24) | ||
60 | #define S3C64XX_GPO12_EINT_G7_12 (0x03 << 24) | ||
61 | |||
62 | #define S3C64XX_GPO13_MEM0_ADDR13 (0x02 << 26) | ||
63 | #define S3C64XX_GPO13_EINT_G7_13 (0x03 << 26) | ||
64 | |||
65 | #define S3C64XX_GPO14_MEM0_ADDR14 (0x02 << 28) | ||
66 | #define S3C64XX_GPO14_EINT_G7_14 (0x03 << 28) | ||
67 | |||
68 | #define S3C64XX_GPO15_MEM0_ADDR15 (0x02 << 30) | ||
69 | #define S3C64XX_GPO15_EINT_G7_15 (0x03 << 30) | ||
70 | |||
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h deleted file mode 100644 index 46bcfb63b8de..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h +++ /dev/null | |||
@@ -1,69 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * GPIO Bank P register and configuration definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #define S3C64XX_GPPCON (S3C64XX_GPP_BASE + 0x00) | ||
16 | #define S3C64XX_GPPDAT (S3C64XX_GPP_BASE + 0x04) | ||
17 | #define S3C64XX_GPPPUD (S3C64XX_GPP_BASE + 0x08) | ||
18 | #define S3C64XX_GPPCONSLP (S3C64XX_GPP_BASE + 0x0c) | ||
19 | #define S3C64XX_GPPPUDSLP (S3C64XX_GPP_BASE + 0x10) | ||
20 | |||
21 | #define S3C64XX_GPP_CONMASK(__gpio) (0x3 << ((__gpio) * 2)) | ||
22 | #define S3C64XX_GPP_INPUT(__gpio) (0x0 << ((__gpio) * 2)) | ||
23 | #define S3C64XX_GPP_OUTPUT(__gpio) (0x1 << ((__gpio) * 2)) | ||
24 | |||
25 | #define S3C64XX_GPP0_MEM0_ADDRV (0x02 << 0) | ||
26 | #define S3C64XX_GPP0_EINT_G8_0 (0x03 << 0) | ||
27 | |||
28 | #define S3C64XX_GPP1_MEM0_SMCLK (0x02 << 2) | ||
29 | #define S3C64XX_GPP1_EINT_G8_1 (0x03 << 2) | ||
30 | |||
31 | #define S3C64XX_GPP2_MEM0_nWAIT (0x02 << 4) | ||
32 | #define S3C64XX_GPP2_EINT_G8_2 (0x03 << 4) | ||
33 | |||
34 | #define S3C64XX_GPP3_MEM0_RDY0_ALE (0x02 << 6) | ||
35 | #define S3C64XX_GPP3_EINT_G8_3 (0x03 << 6) | ||
36 | |||
37 | #define S3C64XX_GPP4_MEM0_RDY1_CLE (0x02 << 8) | ||
38 | #define S3C64XX_GPP4_EINT_G8_4 (0x03 << 8) | ||
39 | |||
40 | #define S3C64XX_GPP5_MEM0_INTsm0_FWE (0x02 << 10) | ||
41 | #define S3C64XX_GPP5_EINT_G8_5 (0x03 << 10) | ||
42 | |||
43 | #define S3C64XX_GPP6_MEM0_(null) (0x02 << 12) | ||
44 | #define S3C64XX_GPP6_EINT_G8_6 (0x03 << 12) | ||
45 | |||
46 | #define S3C64XX_GPP7_MEM0_INTsm1_FRE (0x02 << 14) | ||
47 | #define S3C64XX_GPP7_EINT_G8_7 (0x03 << 14) | ||
48 | |||
49 | #define S3C64XX_GPP8_MEM0_RPn_RnB (0x02 << 16) | ||
50 | #define S3C64XX_GPP8_EINT_G8_8 (0x03 << 16) | ||
51 | |||
52 | #define S3C64XX_GPP9_MEM0_ATA_RESET (0x02 << 18) | ||
53 | #define S3C64XX_GPP9_EINT_G8_9 (0x03 << 18) | ||
54 | |||
55 | #define S3C64XX_GPP10_MEM0_ATA_INPACK (0x02 << 20) | ||
56 | #define S3C64XX_GPP10_EINT_G8_10 (0x03 << 20) | ||
57 | |||
58 | #define S3C64XX_GPP11_MEM0_ATA_REG (0x02 << 22) | ||
59 | #define S3C64XX_GPP11_EINT_G8_11 (0x03 << 22) | ||
60 | |||
61 | #define S3C64XX_GPP12_MEM0_ATA_WE (0x02 << 24) | ||
62 | #define S3C64XX_GPP12_EINT_G8_12 (0x03 << 24) | ||
63 | |||
64 | #define S3C64XX_GPP13_MEM0_ATA_OE (0x02 << 26) | ||
65 | #define S3C64XX_GPP13_EINT_G8_13 (0x03 << 26) | ||
66 | |||
67 | #define S3C64XX_GPP14_MEM0_ATA_CD (0x02 << 28) | ||
68 | #define S3C64XX_GPP14_EINT_G8_14 (0x03 << 28) | ||
69 | |||
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h deleted file mode 100644 index 1712223487b0..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h +++ /dev/null | |||
@@ -1,46 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * GPIO Bank Q register and configuration definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #define S3C64XX_GPQCON (S3C64XX_GPQ_BASE + 0x00) | ||
16 | #define S3C64XX_GPQDAT (S3C64XX_GPQ_BASE + 0x04) | ||
17 | #define S3C64XX_GPQPUD (S3C64XX_GPQ_BASE + 0x08) | ||
18 | #define S3C64XX_GPQCONSLP (S3C64XX_GPQ_BASE + 0x0c) | ||
19 | #define S3C64XX_GPQPUDSLP (S3C64XX_GPQ_BASE + 0x10) | ||
20 | |||
21 | #define S3C64XX_GPQ_CONMASK(__gpio) (0x3 << ((__gpio) * 2)) | ||
22 | #define S3C64XX_GPQ_INPUT(__gpio) (0x0 << ((__gpio) * 2)) | ||
23 | #define S3C64XX_GPQ_OUTPUT(__gpio) (0x1 << ((__gpio) * 2)) | ||
24 | |||
25 | #define S3C64XX_GPQ0_MEM0_ADDR18_RAS (0x02 << 0) | ||
26 | #define S3C64XX_GPQ0_EINT_G9_0 (0x03 << 0) | ||
27 | |||
28 | #define S3C64XX_GPQ1_MEM0_ADDR19_CAS (0x02 << 2) | ||
29 | #define S3C64XX_GPQ1_EINT_G9_1 (0x03 << 2) | ||
30 | |||
31 | #define S3C64XX_GPQ2_EINT_G9_2 (0x03 << 4) | ||
32 | |||
33 | #define S3C64XX_GPQ3_EINT_G9_3 (0x03 << 6) | ||
34 | |||
35 | #define S3C64XX_GPQ4_EINT_G9_4 (0x03 << 8) | ||
36 | |||
37 | #define S3C64XX_GPQ5_EINT_G9_5 (0x03 << 10) | ||
38 | |||
39 | #define S3C64XX_GPQ6_EINT_G9_6 (0x03 << 12) | ||
40 | |||
41 | #define S3C64XX_GPQ7_MEM0_ADDR17_WENDMC (0x02 << 14) | ||
42 | #define S3C64XX_GPQ7_EINT_G9_7 (0x03 << 14) | ||
43 | |||
44 | #define S3C64XX_GPQ8_MEM0_ADDR16_APDMC (0x02 << 16) | ||
45 | #define S3C64XX_GPQ8_EINT_G9_8 (0x03 << 16) | ||
46 | |||
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index 686a4f270b12..2c0353a80906 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c | |||
@@ -50,7 +50,6 @@ | |||
50 | #include <mach/hardware.h> | 50 | #include <mach/hardware.h> |
51 | #include <mach/regs-fb.h> | 51 | #include <mach/regs-fb.h> |
52 | #include <mach/map.h> | 52 | #include <mach/map.h> |
53 | #include <mach/gpio-bank-f.h> | ||
54 | 53 | ||
55 | #include <asm/irq.h> | 54 | #include <asm/irq.h> |
56 | #include <asm/mach-types.h> | 55 | #include <asm/mach-types.h> |
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c index 79412f735a8d..bc1c470b7de6 100644 --- a/arch/arm/mach-s3c64xx/pm.c +++ b/arch/arm/mach-s3c64xx/pm.c | |||
@@ -30,26 +30,18 @@ | |||
30 | #include <mach/regs-gpio-memport.h> | 30 | #include <mach/regs-gpio-memport.h> |
31 | 31 | ||
32 | #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK | 32 | #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK |
33 | #include <mach/gpio-bank-n.h> | ||
34 | |||
35 | void s3c_pm_debug_smdkled(u32 set, u32 clear) | 33 | void s3c_pm_debug_smdkled(u32 set, u32 clear) |
36 | { | 34 | { |
37 | unsigned long flags; | 35 | unsigned long flags; |
38 | u32 reg; | 36 | int i; |
39 | 37 | ||
40 | local_irq_save(flags); | 38 | local_irq_save(flags); |
41 | reg = __raw_readl(S3C64XX_GPNCON); | 39 | for (i = 0; i < 4; i++) { |
42 | reg &= ~(S3C64XX_GPN_CONMASK(12) | S3C64XX_GPN_CONMASK(13) | | 40 | if (clear & (1 << i)) |
43 | S3C64XX_GPN_CONMASK(14) | S3C64XX_GPN_CONMASK(15)); | 41 | gpio_set_value(S3C64XX_GPN(12 + i), 0); |
44 | reg |= S3C64XX_GPN_OUTPUT(12) | S3C64XX_GPN_OUTPUT(13) | | 42 | if (set & (1 << i)) |
45 | S3C64XX_GPN_OUTPUT(14) | S3C64XX_GPN_OUTPUT(15); | 43 | gpio_set_value(S3C64XX_GPN(12 + i), 1); |
46 | __raw_writel(reg, S3C64XX_GPNCON); | 44 | } |
47 | |||
48 | reg = __raw_readl(S3C64XX_GPNDAT); | ||
49 | reg &= ~(clear << 12); | ||
50 | reg |= set << 12; | ||
51 | __raw_writel(reg, S3C64XX_GPNDAT); | ||
52 | |||
53 | local_irq_restore(flags); | 45 | local_irq_restore(flags); |
54 | } | 46 | } |
55 | #endif | 47 | #endif |
@@ -187,6 +179,18 @@ static int s3c64xx_pm_init(void) | |||
187 | pm_cpu_prep = s3c64xx_pm_prepare; | 179 | pm_cpu_prep = s3c64xx_pm_prepare; |
188 | pm_cpu_sleep = s3c64xx_cpu_suspend; | 180 | pm_cpu_sleep = s3c64xx_cpu_suspend; |
189 | pm_uart_udivslot = 1; | 181 | pm_uart_udivslot = 1; |
182 | |||
183 | #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK | ||
184 | gpio_request(S3C64XX_GPN(12), "DEBUG_LED0"); | ||
185 | gpio_request(S3C64XX_GPN(13), "DEBUG_LED1"); | ||
186 | gpio_request(S3C64XX_GPN(14), "DEBUG_LED2"); | ||
187 | gpio_request(S3C64XX_GPN(15), "DEBUG_LED3"); | ||
188 | gpio_direction_output(S3C64XX_GPN(12), 0); | ||
189 | gpio_direction_output(S3C64XX_GPN(13), 0); | ||
190 | gpio_direction_output(S3C64XX_GPN(14), 0); | ||
191 | gpio_direction_output(S3C64XX_GPN(15), 0); | ||
192 | #endif | ||
193 | |||
190 | return 0; | 194 | return 0; |
191 | } | 195 | } |
192 | 196 | ||
diff --git a/arch/arm/mach-s3c64xx/setup-i2c0.c b/arch/arm/mach-s3c64xx/setup-i2c0.c index 406192a43c6e..241af94a9e70 100644 --- a/arch/arm/mach-s3c64xx/setup-i2c0.c +++ b/arch/arm/mach-s3c64xx/setup-i2c0.c | |||
@@ -18,14 +18,11 @@ | |||
18 | 18 | ||
19 | struct platform_device; /* don't need the contents */ | 19 | struct platform_device; /* don't need the contents */ |
20 | 20 | ||
21 | #include <mach/gpio-bank-b.h> | ||
22 | #include <plat/iic.h> | 21 | #include <plat/iic.h> |
23 | #include <plat/gpio-cfg.h> | 22 | #include <plat/gpio-cfg.h> |
24 | 23 | ||
25 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) | 24 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) |
26 | { | 25 | { |
27 | s3c_gpio_cfgpin(S3C64XX_GPB(5), S3C64XX_GPB5_I2C_SCL0); | 26 | s3c_gpio_cfgall_range(S3C64XX_GPB(5), 2, |
28 | s3c_gpio_cfgpin(S3C64XX_GPB(6), S3C64XX_GPB6_I2C_SDA0); | 27 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); |
29 | s3c_gpio_setpull(S3C64XX_GPB(5), S3C_GPIO_PULL_UP); | ||
30 | s3c_gpio_setpull(S3C64XX_GPB(6), S3C_GPIO_PULL_UP); | ||
31 | } | 28 | } |
diff --git a/arch/arm/mach-s3c64xx/setup-i2c1.c b/arch/arm/mach-s3c64xx/setup-i2c1.c index 1ee62c97cd7f..3d13a961986d 100644 --- a/arch/arm/mach-s3c64xx/setup-i2c1.c +++ b/arch/arm/mach-s3c64xx/setup-i2c1.c | |||
@@ -18,14 +18,11 @@ | |||
18 | 18 | ||
19 | struct platform_device; /* don't need the contents */ | 19 | struct platform_device; /* don't need the contents */ |
20 | 20 | ||
21 | #include <mach/gpio-bank-b.h> | ||
22 | #include <plat/iic.h> | 21 | #include <plat/iic.h> |
23 | #include <plat/gpio-cfg.h> | 22 | #include <plat/gpio-cfg.h> |
24 | 23 | ||
25 | void s3c_i2c1_cfg_gpio(struct platform_device *dev) | 24 | void s3c_i2c1_cfg_gpio(struct platform_device *dev) |
26 | { | 25 | { |
27 | s3c_gpio_cfgpin(S3C64XX_GPB(2), S3C64XX_GPB2_I2C_SCL1); | 26 | s3c_gpio_cfgall_range(S3C64XX_GPB(2), 2, |
28 | s3c_gpio_cfgpin(S3C64XX_GPB(3), S3C64XX_GPB3_I2C_SDA1); | 27 | S3C_GPIO_SFN(6), S3C_GPIO_PULL_UP); |
29 | s3c_gpio_setpull(S3C64XX_GPB(2), S3C_GPIO_PULL_UP); | ||
30 | s3c_gpio_setpull(S3C64XX_GPB(3), S3C_GPIO_PULL_UP); | ||
31 | } | 28 | } |
diff --git a/arch/arm/mach-s3c64xx/sleep.S b/arch/arm/mach-s3c64xx/sleep.S index afe5a762f46e..1f87732b2320 100644 --- a/arch/arm/mach-s3c64xx/sleep.S +++ b/arch/arm/mach-s3c64xx/sleep.S | |||
@@ -20,7 +20,6 @@ | |||
20 | #define S3C64XX_VA_GPIO (0x0) | 20 | #define S3C64XX_VA_GPIO (0x0) |
21 | 21 | ||
22 | #include <mach/regs-gpio.h> | 22 | #include <mach/regs-gpio.h> |
23 | #include <mach/gpio-bank-n.h> | ||
24 | 23 | ||
25 | #define LL_UART (S3C_PA_UART + (0x400 * CONFIG_S3C_LOWLEVEL_UART_PORT)) | 24 | #define LL_UART (S3C_PA_UART + (0x400 * CONFIG_S3C_LOWLEVEL_UART_PORT)) |
26 | 25 | ||
@@ -68,6 +67,13 @@ ENTRY(s3c_cpu_resume) | |||
68 | ldr r2, =LL_UART /* for debug */ | 67 | ldr r2, =LL_UART /* for debug */ |
69 | 68 | ||
70 | #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK | 69 | #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK |
70 | |||
71 | #define S3C64XX_GPNCON (S3C64XX_GPN_BASE + 0x00) | ||
72 | #define S3C64XX_GPNDAT (S3C64XX_GPN_BASE + 0x04) | ||
73 | |||
74 | #define S3C64XX_GPN_CONMASK(__gpio) (0x3 << ((__gpio) * 2)) | ||
75 | #define S3C64XX_GPN_OUTPUT(__gpio) (0x1 << ((__gpio) * 2)) | ||
76 | |||
71 | /* Initialise the GPIO state if we are debugging via the SMDK LEDs, | 77 | /* Initialise the GPIO state if we are debugging via the SMDK LEDs, |
72 | * as the uboot version supplied resets these to inputs during the | 78 | * as the uboot version supplied resets these to inputs during the |
73 | * resume checks. | 79 | * resume checks. |
diff --git a/arch/arm/mach-s5p6442/Kconfig b/arch/arm/mach-s5p6442/Kconfig deleted file mode 100644 index 33569e4007c4..000000000000 --- a/arch/arm/mach-s5p6442/Kconfig +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | # arch/arm/mach-s5p6442/Kconfig | ||
2 | # | ||
3 | # Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | # http://www.samsung.com/ | ||
5 | # | ||
6 | # Licensed under GPLv2 | ||
7 | |||
8 | # Configuration options for the S5P6442 | ||
9 | |||
10 | if ARCH_S5P6442 | ||
11 | |||
12 | config CPU_S5P6442 | ||
13 | bool | ||
14 | select S3C_PL330_DMA | ||
15 | help | ||
16 | Enable S5P6442 CPU support | ||
17 | |||
18 | config MACH_SMDK6442 | ||
19 | bool "SMDK6442" | ||
20 | select CPU_S5P6442 | ||
21 | select S3C_DEV_WDT | ||
22 | help | ||
23 | Machine support for Samsung SMDK6442 | ||
24 | |||
25 | endif | ||
diff --git a/arch/arm/mach-s5p6442/Makefile b/arch/arm/mach-s5p6442/Makefile deleted file mode 100644 index 90a3d8373416..000000000000 --- a/arch/arm/mach-s5p6442/Makefile +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | # arch/arm/mach-s5p6442/Makefile | ||
2 | # | ||
3 | # Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | # http://www.samsung.com/ | ||
5 | # | ||
6 | # Licensed under GPLv2 | ||
7 | |||
8 | obj-y := | ||
9 | obj-m := | ||
10 | obj-n := | ||
11 | obj- := | ||
12 | |||
13 | # Core support for S5P6442 system | ||
14 | |||
15 | obj-$(CONFIG_CPU_S5P6442) += cpu.o init.o clock.o dma.o | ||
16 | obj-$(CONFIG_CPU_S5P6442) += setup-i2c0.o | ||
17 | |||
18 | # machine support | ||
19 | |||
20 | obj-$(CONFIG_MACH_SMDK6442) += mach-smdk6442.o | ||
21 | |||
22 | # device support | ||
23 | obj-y += dev-audio.o | ||
24 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | ||
diff --git a/arch/arm/mach-s5p6442/Makefile.boot b/arch/arm/mach-s5p6442/Makefile.boot deleted file mode 100644 index ff90aa13bd67..000000000000 --- a/arch/arm/mach-s5p6442/Makefile.boot +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | zreladdr-y := 0x20008000 | ||
2 | params_phys-y := 0x20000100 | ||
diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c deleted file mode 100644 index fbbc7bede685..000000000000 --- a/arch/arm/mach-s5p6442/clock.c +++ /dev/null | |||
@@ -1,420 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/clock.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - Clock support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/init.h> | ||
14 | #include <linux/module.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/list.h> | ||
17 | #include <linux/err.h> | ||
18 | #include <linux/clk.h> | ||
19 | #include <linux/io.h> | ||
20 | |||
21 | #include <mach/map.h> | ||
22 | |||
23 | #include <plat/cpu-freq.h> | ||
24 | #include <mach/regs-clock.h> | ||
25 | #include <plat/clock.h> | ||
26 | #include <plat/cpu.h> | ||
27 | #include <plat/pll.h> | ||
28 | #include <plat/s5p-clock.h> | ||
29 | #include <plat/clock-clksrc.h> | ||
30 | #include <plat/s5p6442.h> | ||
31 | |||
32 | static struct clksrc_clk clk_mout_apll = { | ||
33 | .clk = { | ||
34 | .name = "mout_apll", | ||
35 | .id = -1, | ||
36 | }, | ||
37 | .sources = &clk_src_apll, | ||
38 | .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 }, | ||
39 | }; | ||
40 | |||
41 | static struct clksrc_clk clk_mout_mpll = { | ||
42 | .clk = { | ||
43 | .name = "mout_mpll", | ||
44 | .id = -1, | ||
45 | }, | ||
46 | .sources = &clk_src_mpll, | ||
47 | .reg_src = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 }, | ||
48 | }; | ||
49 | |||
50 | static struct clksrc_clk clk_mout_epll = { | ||
51 | .clk = { | ||
52 | .name = "mout_epll", | ||
53 | .id = -1, | ||
54 | }, | ||
55 | .sources = &clk_src_epll, | ||
56 | .reg_src = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 }, | ||
57 | }; | ||
58 | |||
59 | /* Possible clock sources for ARM Mux */ | ||
60 | static struct clk *clk_src_arm_list[] = { | ||
61 | [1] = &clk_mout_apll.clk, | ||
62 | [2] = &clk_mout_mpll.clk, | ||
63 | }; | ||
64 | |||
65 | static struct clksrc_sources clk_src_arm = { | ||
66 | .sources = clk_src_arm_list, | ||
67 | .nr_sources = ARRAY_SIZE(clk_src_arm_list), | ||
68 | }; | ||
69 | |||
70 | static struct clksrc_clk clk_mout_arm = { | ||
71 | .clk = { | ||
72 | .name = "mout_arm", | ||
73 | .id = -1, | ||
74 | }, | ||
75 | .sources = &clk_src_arm, | ||
76 | .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 16, .size = 3 }, | ||
77 | }; | ||
78 | |||
79 | static struct clk clk_dout_a2m = { | ||
80 | .name = "dout_a2m", | ||
81 | .id = -1, | ||
82 | .parent = &clk_mout_apll.clk, | ||
83 | }; | ||
84 | |||
85 | /* Possible clock sources for D0 Mux */ | ||
86 | static struct clk *clk_src_d0_list[] = { | ||
87 | [1] = &clk_mout_mpll.clk, | ||
88 | [2] = &clk_dout_a2m, | ||
89 | }; | ||
90 | |||
91 | static struct clksrc_sources clk_src_d0 = { | ||
92 | .sources = clk_src_d0_list, | ||
93 | .nr_sources = ARRAY_SIZE(clk_src_d0_list), | ||
94 | }; | ||
95 | |||
96 | static struct clksrc_clk clk_mout_d0 = { | ||
97 | .clk = { | ||
98 | .name = "mout_d0", | ||
99 | .id = -1, | ||
100 | }, | ||
101 | .sources = &clk_src_d0, | ||
102 | .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 20, .size = 3 }, | ||
103 | }; | ||
104 | |||
105 | static struct clk clk_dout_apll = { | ||
106 | .name = "dout_apll", | ||
107 | .id = -1, | ||
108 | .parent = &clk_mout_arm.clk, | ||
109 | }; | ||
110 | |||
111 | /* Possible clock sources for D0SYNC Mux */ | ||
112 | static struct clk *clk_src_d0sync_list[] = { | ||
113 | [1] = &clk_mout_d0.clk, | ||
114 | [2] = &clk_dout_apll, | ||
115 | }; | ||
116 | |||
117 | static struct clksrc_sources clk_src_d0sync = { | ||
118 | .sources = clk_src_d0sync_list, | ||
119 | .nr_sources = ARRAY_SIZE(clk_src_d0sync_list), | ||
120 | }; | ||
121 | |||
122 | static struct clksrc_clk clk_mout_d0sync = { | ||
123 | .clk = { | ||
124 | .name = "mout_d0sync", | ||
125 | .id = -1, | ||
126 | }, | ||
127 | .sources = &clk_src_d0sync, | ||
128 | .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 }, | ||
129 | }; | ||
130 | |||
131 | /* Possible clock sources for D1 Mux */ | ||
132 | static struct clk *clk_src_d1_list[] = { | ||
133 | [1] = &clk_mout_mpll.clk, | ||
134 | [2] = &clk_dout_a2m, | ||
135 | }; | ||
136 | |||
137 | static struct clksrc_sources clk_src_d1 = { | ||
138 | .sources = clk_src_d1_list, | ||
139 | .nr_sources = ARRAY_SIZE(clk_src_d1_list), | ||
140 | }; | ||
141 | |||
142 | static struct clksrc_clk clk_mout_d1 = { | ||
143 | .clk = { | ||
144 | .name = "mout_d1", | ||
145 | .id = -1, | ||
146 | }, | ||
147 | .sources = &clk_src_d1, | ||
148 | .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 24, .size = 3 }, | ||
149 | }; | ||
150 | |||
151 | /* Possible clock sources for D1SYNC Mux */ | ||
152 | static struct clk *clk_src_d1sync_list[] = { | ||
153 | [1] = &clk_mout_d1.clk, | ||
154 | [2] = &clk_dout_apll, | ||
155 | }; | ||
156 | |||
157 | static struct clksrc_sources clk_src_d1sync = { | ||
158 | .sources = clk_src_d1sync_list, | ||
159 | .nr_sources = ARRAY_SIZE(clk_src_d1sync_list), | ||
160 | }; | ||
161 | |||
162 | static struct clksrc_clk clk_mout_d1sync = { | ||
163 | .clk = { | ||
164 | .name = "mout_d1sync", | ||
165 | .id = -1, | ||
166 | }, | ||
167 | .sources = &clk_src_d1sync, | ||
168 | .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 }, | ||
169 | }; | ||
170 | |||
171 | static struct clk clk_hclkd0 = { | ||
172 | .name = "hclkd0", | ||
173 | .id = -1, | ||
174 | .parent = &clk_mout_d0sync.clk, | ||
175 | }; | ||
176 | |||
177 | static struct clk clk_hclkd1 = { | ||
178 | .name = "hclkd1", | ||
179 | .id = -1, | ||
180 | .parent = &clk_mout_d1sync.clk, | ||
181 | }; | ||
182 | |||
183 | static struct clk clk_pclkd0 = { | ||
184 | .name = "pclkd0", | ||
185 | .id = -1, | ||
186 | .parent = &clk_hclkd0, | ||
187 | }; | ||
188 | |||
189 | static struct clk clk_pclkd1 = { | ||
190 | .name = "pclkd1", | ||
191 | .id = -1, | ||
192 | .parent = &clk_hclkd1, | ||
193 | }; | ||
194 | |||
195 | int s5p6442_clk_ip0_ctrl(struct clk *clk, int enable) | ||
196 | { | ||
197 | return s5p_gatectrl(S5P_CLKGATE_IP0, clk, enable); | ||
198 | } | ||
199 | |||
200 | int s5p6442_clk_ip3_ctrl(struct clk *clk, int enable) | ||
201 | { | ||
202 | return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable); | ||
203 | } | ||
204 | |||
205 | static struct clksrc_clk clksrcs[] = { | ||
206 | { | ||
207 | .clk = { | ||
208 | .name = "dout_a2m", | ||
209 | .id = -1, | ||
210 | .parent = &clk_mout_apll.clk, | ||
211 | }, | ||
212 | .sources = &clk_src_apll, | ||
213 | .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 }, | ||
214 | .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 3 }, | ||
215 | }, { | ||
216 | .clk = { | ||
217 | .name = "dout_apll", | ||
218 | .id = -1, | ||
219 | .parent = &clk_mout_arm.clk, | ||
220 | }, | ||
221 | .sources = &clk_src_arm, | ||
222 | .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 16, .size = 3 }, | ||
223 | .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 3 }, | ||
224 | }, { | ||
225 | .clk = { | ||
226 | .name = "hclkd1", | ||
227 | .id = -1, | ||
228 | .parent = &clk_mout_d1sync.clk, | ||
229 | }, | ||
230 | .sources = &clk_src_d1sync, | ||
231 | .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 }, | ||
232 | .reg_div = { .reg = S5P_CLK_DIV0, .shift = 24, .size = 4 }, | ||
233 | }, { | ||
234 | .clk = { | ||
235 | .name = "hclkd0", | ||
236 | .id = -1, | ||
237 | .parent = &clk_mout_d0sync.clk, | ||
238 | }, | ||
239 | .sources = &clk_src_d0sync, | ||
240 | .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 }, | ||
241 | .reg_div = { .reg = S5P_CLK_DIV0, .shift = 16, .size = 4 }, | ||
242 | }, { | ||
243 | .clk = { | ||
244 | .name = "pclkd0", | ||
245 | .id = -1, | ||
246 | .parent = &clk_hclkd0, | ||
247 | }, | ||
248 | .sources = &clk_src_d0sync, | ||
249 | .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 }, | ||
250 | .reg_div = { .reg = S5P_CLK_DIV0, .shift = 20, .size = 3 }, | ||
251 | }, { | ||
252 | .clk = { | ||
253 | .name = "pclkd1", | ||
254 | .id = -1, | ||
255 | .parent = &clk_hclkd1, | ||
256 | }, | ||
257 | .sources = &clk_src_d1sync, | ||
258 | .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 }, | ||
259 | .reg_div = { .reg = S5P_CLK_DIV0, .shift = 28, .size = 3 }, | ||
260 | } | ||
261 | }; | ||
262 | |||
263 | /* Clock initialisation code */ | ||
264 | static struct clksrc_clk *init_parents[] = { | ||
265 | &clk_mout_apll, | ||
266 | &clk_mout_mpll, | ||
267 | &clk_mout_epll, | ||
268 | &clk_mout_arm, | ||
269 | &clk_mout_d0, | ||
270 | &clk_mout_d0sync, | ||
271 | &clk_mout_d1, | ||
272 | &clk_mout_d1sync, | ||
273 | }; | ||
274 | |||
275 | void __init_or_cpufreq s5p6442_setup_clocks(void) | ||
276 | { | ||
277 | struct clk *pclkd0_clk; | ||
278 | struct clk *pclkd1_clk; | ||
279 | |||
280 | unsigned long xtal; | ||
281 | unsigned long arm; | ||
282 | unsigned long hclkd0 = 0; | ||
283 | unsigned long hclkd1 = 0; | ||
284 | unsigned long pclkd0 = 0; | ||
285 | unsigned long pclkd1 = 0; | ||
286 | |||
287 | unsigned long apll; | ||
288 | unsigned long mpll; | ||
289 | unsigned long epll; | ||
290 | unsigned int ptr; | ||
291 | |||
292 | printk(KERN_DEBUG "%s: registering clocks\n", __func__); | ||
293 | |||
294 | xtal = clk_get_rate(&clk_xtal); | ||
295 | |||
296 | printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); | ||
297 | |||
298 | apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508); | ||
299 | mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502); | ||
300 | epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500); | ||
301 | |||
302 | printk(KERN_INFO "S5P6442: PLL settings, A=%ld, M=%ld, E=%ld", | ||
303 | apll, mpll, epll); | ||
304 | |||
305 | clk_fout_apll.rate = apll; | ||
306 | clk_fout_mpll.rate = mpll; | ||
307 | clk_fout_epll.rate = epll; | ||
308 | |||
309 | for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++) | ||
310 | s3c_set_clksrc(init_parents[ptr], true); | ||
311 | |||
312 | for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) | ||
313 | s3c_set_clksrc(&clksrcs[ptr], true); | ||
314 | |||
315 | arm = clk_get_rate(&clk_dout_apll); | ||
316 | hclkd0 = clk_get_rate(&clk_hclkd0); | ||
317 | hclkd1 = clk_get_rate(&clk_hclkd1); | ||
318 | |||
319 | pclkd0_clk = clk_get(NULL, "pclkd0"); | ||
320 | BUG_ON(IS_ERR(pclkd0_clk)); | ||
321 | |||
322 | pclkd0 = clk_get_rate(pclkd0_clk); | ||
323 | clk_put(pclkd0_clk); | ||
324 | |||
325 | pclkd1_clk = clk_get(NULL, "pclkd1"); | ||
326 | BUG_ON(IS_ERR(pclkd1_clk)); | ||
327 | |||
328 | pclkd1 = clk_get_rate(pclkd1_clk); | ||
329 | clk_put(pclkd1_clk); | ||
330 | |||
331 | printk(KERN_INFO "S5P6442: HCLKD0=%ld, HCLKD1=%ld, PCLKD0=%ld, PCLKD1=%ld\n", | ||
332 | hclkd0, hclkd1, pclkd0, pclkd1); | ||
333 | |||
334 | /* For backward compatibility */ | ||
335 | clk_f.rate = arm; | ||
336 | clk_h.rate = hclkd1; | ||
337 | clk_p.rate = pclkd1; | ||
338 | |||
339 | clk_pclkd0.rate = pclkd0; | ||
340 | clk_pclkd1.rate = pclkd1; | ||
341 | } | ||
342 | |||
343 | static struct clk init_clocks_off[] = { | ||
344 | { | ||
345 | .name = "pdma", | ||
346 | .id = -1, | ||
347 | .parent = &clk_pclkd1, | ||
348 | .enable = s5p6442_clk_ip0_ctrl, | ||
349 | .ctrlbit = (1 << 3), | ||
350 | }, | ||
351 | }; | ||
352 | |||
353 | static struct clk init_clocks[] = { | ||
354 | { | ||
355 | .name = "systimer", | ||
356 | .id = -1, | ||
357 | .parent = &clk_pclkd1, | ||
358 | .enable = s5p6442_clk_ip3_ctrl, | ||
359 | .ctrlbit = (1<<16), | ||
360 | }, { | ||
361 | .name = "uart", | ||
362 | .id = 0, | ||
363 | .parent = &clk_pclkd1, | ||
364 | .enable = s5p6442_clk_ip3_ctrl, | ||
365 | .ctrlbit = (1<<17), | ||
366 | }, { | ||
367 | .name = "uart", | ||
368 | .id = 1, | ||
369 | .parent = &clk_pclkd1, | ||
370 | .enable = s5p6442_clk_ip3_ctrl, | ||
371 | .ctrlbit = (1<<18), | ||
372 | }, { | ||
373 | .name = "uart", | ||
374 | .id = 2, | ||
375 | .parent = &clk_pclkd1, | ||
376 | .enable = s5p6442_clk_ip3_ctrl, | ||
377 | .ctrlbit = (1<<19), | ||
378 | }, { | ||
379 | .name = "watchdog", | ||
380 | .id = -1, | ||
381 | .parent = &clk_pclkd1, | ||
382 | .enable = s5p6442_clk_ip3_ctrl, | ||
383 | .ctrlbit = (1 << 22), | ||
384 | }, { | ||
385 | .name = "timers", | ||
386 | .id = -1, | ||
387 | .parent = &clk_pclkd1, | ||
388 | .enable = s5p6442_clk_ip3_ctrl, | ||
389 | .ctrlbit = (1<<23), | ||
390 | }, | ||
391 | }; | ||
392 | |||
393 | static struct clk *clks[] __initdata = { | ||
394 | &clk_ext, | ||
395 | &clk_epll, | ||
396 | &clk_mout_apll.clk, | ||
397 | &clk_mout_mpll.clk, | ||
398 | &clk_mout_epll.clk, | ||
399 | &clk_mout_d0.clk, | ||
400 | &clk_mout_d0sync.clk, | ||
401 | &clk_mout_d1.clk, | ||
402 | &clk_mout_d1sync.clk, | ||
403 | &clk_hclkd0, | ||
404 | &clk_pclkd0, | ||
405 | &clk_hclkd1, | ||
406 | &clk_pclkd1, | ||
407 | }; | ||
408 | |||
409 | void __init s5p6442_register_clocks(void) | ||
410 | { | ||
411 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); | ||
412 | |||
413 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | ||
414 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | ||
415 | |||
416 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | ||
417 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | ||
418 | |||
419 | s3c_pwmclk_init(); | ||
420 | } | ||
diff --git a/arch/arm/mach-s5p6442/cpu.c b/arch/arm/mach-s5p6442/cpu.c deleted file mode 100644 index 842af86bda6d..000000000000 --- a/arch/arm/mach-s5p6442/cpu.c +++ /dev/null | |||
@@ -1,143 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/cpu.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/types.h> | ||
13 | #include <linux/interrupt.h> | ||
14 | #include <linux/list.h> | ||
15 | #include <linux/timer.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/clk.h> | ||
18 | #include <linux/io.h> | ||
19 | #include <linux/sysdev.h> | ||
20 | #include <linux/serial_core.h> | ||
21 | #include <linux/platform_device.h> | ||
22 | #include <linux/sched.h> | ||
23 | |||
24 | #include <asm/mach/arch.h> | ||
25 | #include <asm/mach/map.h> | ||
26 | #include <asm/mach/irq.h> | ||
27 | |||
28 | #include <asm/proc-fns.h> | ||
29 | |||
30 | #include <mach/hardware.h> | ||
31 | #include <mach/map.h> | ||
32 | #include <asm/irq.h> | ||
33 | |||
34 | #include <plat/regs-serial.h> | ||
35 | #include <mach/regs-clock.h> | ||
36 | |||
37 | #include <plat/cpu.h> | ||
38 | #include <plat/devs.h> | ||
39 | #include <plat/clock.h> | ||
40 | #include <plat/s5p6442.h> | ||
41 | |||
42 | /* Initial IO mappings */ | ||
43 | |||
44 | static struct map_desc s5p6442_iodesc[] __initdata = { | ||
45 | { | ||
46 | .virtual = (unsigned long)S5P_VA_SYSTIMER, | ||
47 | .pfn = __phys_to_pfn(S5P6442_PA_SYSTIMER), | ||
48 | .length = SZ_16K, | ||
49 | .type = MT_DEVICE, | ||
50 | }, { | ||
51 | .virtual = (unsigned long)S5P_VA_GPIO, | ||
52 | .pfn = __phys_to_pfn(S5P6442_PA_GPIO), | ||
53 | .length = SZ_4K, | ||
54 | .type = MT_DEVICE, | ||
55 | }, { | ||
56 | .virtual = (unsigned long)VA_VIC0, | ||
57 | .pfn = __phys_to_pfn(S5P6442_PA_VIC0), | ||
58 | .length = SZ_16K, | ||
59 | .type = MT_DEVICE, | ||
60 | }, { | ||
61 | .virtual = (unsigned long)VA_VIC1, | ||
62 | .pfn = __phys_to_pfn(S5P6442_PA_VIC1), | ||
63 | .length = SZ_16K, | ||
64 | .type = MT_DEVICE, | ||
65 | }, { | ||
66 | .virtual = (unsigned long)VA_VIC2, | ||
67 | .pfn = __phys_to_pfn(S5P6442_PA_VIC2), | ||
68 | .length = SZ_16K, | ||
69 | .type = MT_DEVICE, | ||
70 | }, { | ||
71 | .virtual = (unsigned long)S3C_VA_UART, | ||
72 | .pfn = __phys_to_pfn(S3C_PA_UART), | ||
73 | .length = SZ_512K, | ||
74 | .type = MT_DEVICE, | ||
75 | } | ||
76 | }; | ||
77 | |||
78 | static void s5p6442_idle(void) | ||
79 | { | ||
80 | if (!need_resched()) | ||
81 | cpu_do_idle(); | ||
82 | |||
83 | local_irq_enable(); | ||
84 | } | ||
85 | |||
86 | /* | ||
87 | * s5p6442_map_io | ||
88 | * | ||
89 | * register the standard cpu IO areas | ||
90 | */ | ||
91 | |||
92 | void __init s5p6442_map_io(void) | ||
93 | { | ||
94 | iotable_init(s5p6442_iodesc, ARRAY_SIZE(s5p6442_iodesc)); | ||
95 | } | ||
96 | |||
97 | void __init s5p6442_init_clocks(int xtal) | ||
98 | { | ||
99 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); | ||
100 | |||
101 | s3c24xx_register_baseclocks(xtal); | ||
102 | s5p_register_clocks(xtal); | ||
103 | s5p6442_register_clocks(); | ||
104 | s5p6442_setup_clocks(); | ||
105 | } | ||
106 | |||
107 | void __init s5p6442_init_irq(void) | ||
108 | { | ||
109 | /* S5P6442 supports 3 VIC */ | ||
110 | u32 vic[3]; | ||
111 | |||
112 | /* VIC0, VIC1, and VIC2: some interrupt reserved */ | ||
113 | vic[0] = 0x7fefffff; | ||
114 | vic[1] = 0X7f389c81; | ||
115 | vic[2] = 0X1bbbcfff; | ||
116 | |||
117 | s5p_init_irq(vic, ARRAY_SIZE(vic)); | ||
118 | } | ||
119 | |||
120 | struct sysdev_class s5p6442_sysclass = { | ||
121 | .name = "s5p6442-core", | ||
122 | }; | ||
123 | |||
124 | static struct sys_device s5p6442_sysdev = { | ||
125 | .cls = &s5p6442_sysclass, | ||
126 | }; | ||
127 | |||
128 | static int __init s5p6442_core_init(void) | ||
129 | { | ||
130 | return sysdev_class_register(&s5p6442_sysclass); | ||
131 | } | ||
132 | |||
133 | core_initcall(s5p6442_core_init); | ||
134 | |||
135 | int __init s5p6442_init(void) | ||
136 | { | ||
137 | printk(KERN_INFO "S5P6442: Initializing architecture\n"); | ||
138 | |||
139 | /* set idle function */ | ||
140 | pm_idle = s5p6442_idle; | ||
141 | |||
142 | return sysdev_register(&s5p6442_sysdev); | ||
143 | } | ||
diff --git a/arch/arm/mach-s5p6442/dev-audio.c b/arch/arm/mach-s5p6442/dev-audio.c deleted file mode 100644 index 8719dc41fe32..000000000000 --- a/arch/arm/mach-s5p6442/dev-audio.c +++ /dev/null | |||
@@ -1,217 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/dev-audio.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co. Ltd | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/dma-mapping.h> | ||
13 | #include <linux/gpio.h> | ||
14 | |||
15 | #include <plat/gpio-cfg.h> | ||
16 | #include <plat/audio.h> | ||
17 | |||
18 | #include <mach/map.h> | ||
19 | #include <mach/dma.h> | ||
20 | #include <mach/irqs.h> | ||
21 | |||
22 | static int s5p6442_cfg_i2s(struct platform_device *pdev) | ||
23 | { | ||
24 | unsigned int base; | ||
25 | |||
26 | /* configure GPIO for i2s port */ | ||
27 | switch (pdev->id) { | ||
28 | case 1: | ||
29 | base = S5P6442_GPC1(0); | ||
30 | break; | ||
31 | |||
32 | case 0: | ||
33 | base = S5P6442_GPC0(0); | ||
34 | break; | ||
35 | |||
36 | default: | ||
37 | printk(KERN_ERR "Invalid Device %d\n", pdev->id); | ||
38 | return -EINVAL; | ||
39 | } | ||
40 | |||
41 | s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(2)); | ||
42 | return 0; | ||
43 | } | ||
44 | |||
45 | static const char *rclksrc_v35[] = { | ||
46 | [0] = "busclk", | ||
47 | [1] = "i2sclk", | ||
48 | }; | ||
49 | |||
50 | static struct s3c_audio_pdata i2sv35_pdata = { | ||
51 | .cfg_gpio = s5p6442_cfg_i2s, | ||
52 | .type = { | ||
53 | .i2s = { | ||
54 | .quirks = QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR, | ||
55 | .src_clk = rclksrc_v35, | ||
56 | }, | ||
57 | }, | ||
58 | }; | ||
59 | |||
60 | static struct resource s5p6442_iis0_resource[] = { | ||
61 | [0] = { | ||
62 | .start = S5P6442_PA_I2S0, | ||
63 | .end = S5P6442_PA_I2S0 + 0x100 - 1, | ||
64 | .flags = IORESOURCE_MEM, | ||
65 | }, | ||
66 | [1] = { | ||
67 | .start = DMACH_I2S0_TX, | ||
68 | .end = DMACH_I2S0_TX, | ||
69 | .flags = IORESOURCE_DMA, | ||
70 | }, | ||
71 | [2] = { | ||
72 | .start = DMACH_I2S0_RX, | ||
73 | .end = DMACH_I2S0_RX, | ||
74 | .flags = IORESOURCE_DMA, | ||
75 | }, | ||
76 | [3] = { | ||
77 | .start = DMACH_I2S0S_TX, | ||
78 | .end = DMACH_I2S0S_TX, | ||
79 | .flags = IORESOURCE_DMA, | ||
80 | }, | ||
81 | }; | ||
82 | |||
83 | struct platform_device s5p6442_device_iis0 = { | ||
84 | .name = "samsung-i2s", | ||
85 | .id = 0, | ||
86 | .num_resources = ARRAY_SIZE(s5p6442_iis0_resource), | ||
87 | .resource = s5p6442_iis0_resource, | ||
88 | .dev = { | ||
89 | .platform_data = &i2sv35_pdata, | ||
90 | }, | ||
91 | }; | ||
92 | |||
93 | static const char *rclksrc_v3[] = { | ||
94 | [0] = "iis", | ||
95 | [1] = "sclk_audio", | ||
96 | }; | ||
97 | |||
98 | static struct s3c_audio_pdata i2sv3_pdata = { | ||
99 | .cfg_gpio = s5p6442_cfg_i2s, | ||
100 | .type = { | ||
101 | .i2s = { | ||
102 | .src_clk = rclksrc_v3, | ||
103 | }, | ||
104 | }, | ||
105 | }; | ||
106 | |||
107 | static struct resource s5p6442_iis1_resource[] = { | ||
108 | [0] = { | ||
109 | .start = S5P6442_PA_I2S1, | ||
110 | .end = S5P6442_PA_I2S1 + 0x100 - 1, | ||
111 | .flags = IORESOURCE_MEM, | ||
112 | }, | ||
113 | [1] = { | ||
114 | .start = DMACH_I2S1_TX, | ||
115 | .end = DMACH_I2S1_TX, | ||
116 | .flags = IORESOURCE_DMA, | ||
117 | }, | ||
118 | [2] = { | ||
119 | .start = DMACH_I2S1_RX, | ||
120 | .end = DMACH_I2S1_RX, | ||
121 | .flags = IORESOURCE_DMA, | ||
122 | }, | ||
123 | }; | ||
124 | |||
125 | struct platform_device s5p6442_device_iis1 = { | ||
126 | .name = "samsung-i2s", | ||
127 | .id = 1, | ||
128 | .num_resources = ARRAY_SIZE(s5p6442_iis1_resource), | ||
129 | .resource = s5p6442_iis1_resource, | ||
130 | .dev = { | ||
131 | .platform_data = &i2sv3_pdata, | ||
132 | }, | ||
133 | }; | ||
134 | |||
135 | /* PCM Controller platform_devices */ | ||
136 | |||
137 | static int s5p6442_pcm_cfg_gpio(struct platform_device *pdev) | ||
138 | { | ||
139 | unsigned int base; | ||
140 | |||
141 | switch (pdev->id) { | ||
142 | case 0: | ||
143 | base = S5P6442_GPC0(0); | ||
144 | break; | ||
145 | |||
146 | case 1: | ||
147 | base = S5P6442_GPC1(0); | ||
148 | break; | ||
149 | |||
150 | default: | ||
151 | printk(KERN_DEBUG "Invalid PCM Controller number!"); | ||
152 | return -EINVAL; | ||
153 | } | ||
154 | |||
155 | s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(3)); | ||
156 | return 0; | ||
157 | } | ||
158 | |||
159 | static struct s3c_audio_pdata s3c_pcm_pdata = { | ||
160 | .cfg_gpio = s5p6442_pcm_cfg_gpio, | ||
161 | }; | ||
162 | |||
163 | static struct resource s5p6442_pcm0_resource[] = { | ||
164 | [0] = { | ||
165 | .start = S5P6442_PA_PCM0, | ||
166 | .end = S5P6442_PA_PCM0 + 0x100 - 1, | ||
167 | .flags = IORESOURCE_MEM, | ||
168 | }, | ||
169 | [1] = { | ||
170 | .start = DMACH_PCM0_TX, | ||
171 | .end = DMACH_PCM0_TX, | ||
172 | .flags = IORESOURCE_DMA, | ||
173 | }, | ||
174 | [2] = { | ||
175 | .start = DMACH_PCM0_RX, | ||
176 | .end = DMACH_PCM0_RX, | ||
177 | .flags = IORESOURCE_DMA, | ||
178 | }, | ||
179 | }; | ||
180 | |||
181 | struct platform_device s5p6442_device_pcm0 = { | ||
182 | .name = "samsung-pcm", | ||
183 | .id = 0, | ||
184 | .num_resources = ARRAY_SIZE(s5p6442_pcm0_resource), | ||
185 | .resource = s5p6442_pcm0_resource, | ||
186 | .dev = { | ||
187 | .platform_data = &s3c_pcm_pdata, | ||
188 | }, | ||
189 | }; | ||
190 | |||
191 | static struct resource s5p6442_pcm1_resource[] = { | ||
192 | [0] = { | ||
193 | .start = S5P6442_PA_PCM1, | ||
194 | .end = S5P6442_PA_PCM1 + 0x100 - 1, | ||
195 | .flags = IORESOURCE_MEM, | ||
196 | }, | ||
197 | [1] = { | ||
198 | .start = DMACH_PCM1_TX, | ||
199 | .end = DMACH_PCM1_TX, | ||
200 | .flags = IORESOURCE_DMA, | ||
201 | }, | ||
202 | [2] = { | ||
203 | .start = DMACH_PCM1_RX, | ||
204 | .end = DMACH_PCM1_RX, | ||
205 | .flags = IORESOURCE_DMA, | ||
206 | }, | ||
207 | }; | ||
208 | |||
209 | struct platform_device s5p6442_device_pcm1 = { | ||
210 | .name = "samsung-pcm", | ||
211 | .id = 1, | ||
212 | .num_resources = ARRAY_SIZE(s5p6442_pcm1_resource), | ||
213 | .resource = s5p6442_pcm1_resource, | ||
214 | .dev = { | ||
215 | .platform_data = &s3c_pcm_pdata, | ||
216 | }, | ||
217 | }; | ||
diff --git a/arch/arm/mach-s5p6442/dev-spi.c b/arch/arm/mach-s5p6442/dev-spi.c deleted file mode 100644 index cce8c2470709..000000000000 --- a/arch/arm/mach-s5p6442/dev-spi.c +++ /dev/null | |||
@@ -1,121 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/dev-spi.c | ||
2 | * | ||
3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/dma-mapping.h> | ||
13 | #include <linux/gpio.h> | ||
14 | |||
15 | #include <mach/dma.h> | ||
16 | #include <mach/map.h> | ||
17 | #include <mach/irqs.h> | ||
18 | #include <mach/spi-clocks.h> | ||
19 | |||
20 | #include <plat/s3c64xx-spi.h> | ||
21 | #include <plat/gpio-cfg.h> | ||
22 | |||
23 | static char *spi_src_clks[] = { | ||
24 | [S5P6442_SPI_SRCCLK_PCLK] = "pclk", | ||
25 | [S5P6442_SPI_SRCCLK_SCLK] = "spi_epll", | ||
26 | }; | ||
27 | |||
28 | /* SPI Controller platform_devices */ | ||
29 | |||
30 | /* Since we emulate multi-cs capability, we do not touch the CS. | ||
31 | * The emulated CS is toggled by board specific mechanism, as it can | ||
32 | * be either some immediate GPIO or some signal out of some other | ||
33 | * chip in between ... or some yet another way. | ||
34 | * We simply do not assume anything about CS. | ||
35 | */ | ||
36 | static int s5p6442_spi_cfg_gpio(struct platform_device *pdev) | ||
37 | { | ||
38 | switch (pdev->id) { | ||
39 | case 0: | ||
40 | s3c_gpio_cfgpin(S5P6442_GPB(0), S3C_GPIO_SFN(2)); | ||
41 | s3c_gpio_setpull(S5P6442_GPB(0), S3C_GPIO_PULL_UP); | ||
42 | s3c_gpio_cfgall_range(S5P6442_GPB(2), 2, | ||
43 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
44 | break; | ||
45 | |||
46 | default: | ||
47 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
48 | return -EINVAL; | ||
49 | } | ||
50 | |||
51 | return 0; | ||
52 | } | ||
53 | |||
54 | static struct resource s5p6442_spi0_resource[] = { | ||
55 | [0] = { | ||
56 | .start = S5P6442_PA_SPI, | ||
57 | .end = S5P6442_PA_SPI + 0x100 - 1, | ||
58 | .flags = IORESOURCE_MEM, | ||
59 | }, | ||
60 | [1] = { | ||
61 | .start = DMACH_SPI0_TX, | ||
62 | .end = DMACH_SPI0_TX, | ||
63 | .flags = IORESOURCE_DMA, | ||
64 | }, | ||
65 | [2] = { | ||
66 | .start = DMACH_SPI0_RX, | ||
67 | .end = DMACH_SPI0_RX, | ||
68 | .flags = IORESOURCE_DMA, | ||
69 | }, | ||
70 | [3] = { | ||
71 | .start = IRQ_SPI0, | ||
72 | .end = IRQ_SPI0, | ||
73 | .flags = IORESOURCE_IRQ, | ||
74 | }, | ||
75 | }; | ||
76 | |||
77 | static struct s3c64xx_spi_info s5p6442_spi0_pdata = { | ||
78 | .cfg_gpio = s5p6442_spi_cfg_gpio, | ||
79 | .fifo_lvl_mask = 0x1ff, | ||
80 | .rx_lvl_offset = 15, | ||
81 | }; | ||
82 | |||
83 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
84 | |||
85 | struct platform_device s5p6442_device_spi = { | ||
86 | .name = "s3c64xx-spi", | ||
87 | .id = 0, | ||
88 | .num_resources = ARRAY_SIZE(s5p6442_spi0_resource), | ||
89 | .resource = s5p6442_spi0_resource, | ||
90 | .dev = { | ||
91 | .dma_mask = &spi_dmamask, | ||
92 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
93 | .platform_data = &s5p6442_spi0_pdata, | ||
94 | }, | ||
95 | }; | ||
96 | |||
97 | void __init s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
98 | { | ||
99 | struct s3c64xx_spi_info *pd; | ||
100 | |||
101 | /* Reject invalid configuration */ | ||
102 | if (!num_cs || src_clk_nr < 0 | ||
103 | || src_clk_nr > S5P6442_SPI_SRCCLK_SCLK) { | ||
104 | printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
105 | return; | ||
106 | } | ||
107 | |||
108 | switch (cntrlr) { | ||
109 | case 0: | ||
110 | pd = &s5p6442_spi0_pdata; | ||
111 | break; | ||
112 | default: | ||
113 | printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
114 | __func__, cntrlr); | ||
115 | return; | ||
116 | } | ||
117 | |||
118 | pd->num_cs = num_cs; | ||
119 | pd->src_clk_nr = src_clk_nr; | ||
120 | pd->src_clk_name = spi_src_clks[src_clk_nr]; | ||
121 | } | ||
diff --git a/arch/arm/mach-s5p6442/dma.c b/arch/arm/mach-s5p6442/dma.c deleted file mode 100644 index 7dfb13654f8a..000000000000 --- a/arch/arm/mach-s5p6442/dma.c +++ /dev/null | |||
@@ -1,105 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
3 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
18 | */ | ||
19 | |||
20 | #include <linux/platform_device.h> | ||
21 | #include <linux/dma-mapping.h> | ||
22 | |||
23 | #include <plat/devs.h> | ||
24 | #include <plat/irqs.h> | ||
25 | |||
26 | #include <mach/map.h> | ||
27 | #include <mach/irqs.h> | ||
28 | |||
29 | #include <plat/s3c-pl330-pdata.h> | ||
30 | |||
31 | static u64 dma_dmamask = DMA_BIT_MASK(32); | ||
32 | |||
33 | static struct resource s5p6442_pdma_resource[] = { | ||
34 | [0] = { | ||
35 | .start = S5P6442_PA_PDMA, | ||
36 | .end = S5P6442_PA_PDMA + SZ_4K, | ||
37 | .flags = IORESOURCE_MEM, | ||
38 | }, | ||
39 | [1] = { | ||
40 | .start = IRQ_PDMA, | ||
41 | .end = IRQ_PDMA, | ||
42 | .flags = IORESOURCE_IRQ, | ||
43 | }, | ||
44 | }; | ||
45 | |||
46 | static struct s3c_pl330_platdata s5p6442_pdma_pdata = { | ||
47 | .peri = { | ||
48 | [0] = DMACH_UART0_RX, | ||
49 | [1] = DMACH_UART0_TX, | ||
50 | [2] = DMACH_UART1_RX, | ||
51 | [3] = DMACH_UART1_TX, | ||
52 | [4] = DMACH_UART2_RX, | ||
53 | [5] = DMACH_UART2_TX, | ||
54 | [6] = DMACH_MAX, | ||
55 | [7] = DMACH_MAX, | ||
56 | [8] = DMACH_MAX, | ||
57 | [9] = DMACH_I2S0_RX, | ||
58 | [10] = DMACH_I2S0_TX, | ||
59 | [11] = DMACH_I2S0S_TX, | ||
60 | [12] = DMACH_I2S1_RX, | ||
61 | [13] = DMACH_I2S1_TX, | ||
62 | [14] = DMACH_MAX, | ||
63 | [15] = DMACH_MAX, | ||
64 | [16] = DMACH_SPI0_RX, | ||
65 | [17] = DMACH_SPI0_TX, | ||
66 | [18] = DMACH_MAX, | ||
67 | [19] = DMACH_MAX, | ||
68 | [20] = DMACH_PCM0_RX, | ||
69 | [21] = DMACH_PCM0_TX, | ||
70 | [22] = DMACH_PCM1_RX, | ||
71 | [23] = DMACH_PCM1_TX, | ||
72 | [24] = DMACH_MAX, | ||
73 | [25] = DMACH_MAX, | ||
74 | [26] = DMACH_MAX, | ||
75 | [27] = DMACH_MSM_REQ0, | ||
76 | [28] = DMACH_MSM_REQ1, | ||
77 | [29] = DMACH_MSM_REQ2, | ||
78 | [30] = DMACH_MSM_REQ3, | ||
79 | [31] = DMACH_MAX, | ||
80 | }, | ||
81 | }; | ||
82 | |||
83 | static struct platform_device s5p6442_device_pdma = { | ||
84 | .name = "s3c-pl330", | ||
85 | .id = -1, | ||
86 | .num_resources = ARRAY_SIZE(s5p6442_pdma_resource), | ||
87 | .resource = s5p6442_pdma_resource, | ||
88 | .dev = { | ||
89 | .dma_mask = &dma_dmamask, | ||
90 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
91 | .platform_data = &s5p6442_pdma_pdata, | ||
92 | }, | ||
93 | }; | ||
94 | |||
95 | static struct platform_device *s5p6442_dmacs[] __initdata = { | ||
96 | &s5p6442_device_pdma, | ||
97 | }; | ||
98 | |||
99 | static int __init s5p6442_dma_init(void) | ||
100 | { | ||
101 | platform_add_devices(s5p6442_dmacs, ARRAY_SIZE(s5p6442_dmacs)); | ||
102 | |||
103 | return 0; | ||
104 | } | ||
105 | arch_initcall(s5p6442_dma_init); | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/debug-macro.S b/arch/arm/mach-s5p6442/include/mach/debug-macro.S deleted file mode 100644 index e2213205d780..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/debug-macro.S +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/debug-macro.S | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* pull in the relevant register and map files. */ | ||
14 | |||
15 | #include <mach/map.h> | ||
16 | #include <plat/regs-serial.h> | ||
17 | |||
18 | .macro addruart, rp, rv | ||
19 | ldr \rp, = S3C_PA_UART | ||
20 | ldr \rv, = S3C_VA_UART | ||
21 | #if CONFIG_DEBUG_S3C_UART != 0 | ||
22 | add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART) | ||
23 | add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART) | ||
24 | #endif | ||
25 | .endm | ||
26 | |||
27 | #define fifo_full fifo_full_s5pv210 | ||
28 | #define fifo_level fifo_level_s5pv210 | ||
29 | |||
30 | /* include the reset of the code which will do the work, we're only | ||
31 | * compiling for a single cpu processor type so the default of s3c2440 | ||
32 | * will be fine with us. | ||
33 | */ | ||
34 | |||
35 | #include <plat/debug-macro.S> | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/dma.h b/arch/arm/mach-s5p6442/include/mach/dma.h deleted file mode 100644 index 81209eb1409b..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/dma.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
3 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
18 | */ | ||
19 | |||
20 | #ifndef __MACH_DMA_H | ||
21 | #define __MACH_DMA_H | ||
22 | |||
23 | /* This platform uses the common S3C DMA API driver for PL330 */ | ||
24 | #include <plat/s3c-dma-pl330.h> | ||
25 | |||
26 | #endif /* __MACH_DMA_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/entry-macro.S b/arch/arm/mach-s5p6442/include/mach/entry-macro.S deleted file mode 100644 index 6d574edbf1ae..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,48 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Low-level IRQ helper macros for the Samsung S5P6442 | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <asm/hardware/vic.h> | ||
14 | #include <mach/map.h> | ||
15 | #include <plat/irqs.h> | ||
16 | |||
17 | .macro disable_fiq | ||
18 | .endm | ||
19 | |||
20 | .macro get_irqnr_preamble, base, tmp | ||
21 | ldr \base, =VA_VIC0 | ||
22 | .endm | ||
23 | |||
24 | .macro arch_ret_to_user, tmp1, tmp2 | ||
25 | .endm | ||
26 | |||
27 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
28 | |||
29 | @ check the vic0 | ||
30 | mov \irqnr, # S5P_IRQ_OFFSET + 31 | ||
31 | ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] | ||
32 | teq \irqstat, #0 | ||
33 | |||
34 | @ otherwise try vic1 | ||
35 | addeq \tmp, \base, #(VA_VIC1 - VA_VIC0) | ||
36 | addeq \irqnr, \irqnr, #32 | ||
37 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] | ||
38 | teqeq \irqstat, #0 | ||
39 | |||
40 | @ otherwise try vic2 | ||
41 | addeq \tmp, \base, #(VA_VIC2 - VA_VIC0) | ||
42 | addeq \irqnr, \irqnr, #32 | ||
43 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] | ||
44 | teqeq \irqstat, #0 | ||
45 | |||
46 | clzne \irqstat, \irqstat | ||
47 | subne \irqnr, \irqnr, \irqstat | ||
48 | .endm | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/gpio.h b/arch/arm/mach-s5p6442/include/mach/gpio.h deleted file mode 100644 index b8715df2fdab..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/gpio.h +++ /dev/null | |||
@@ -1,123 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/gpio.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - GPIO lib support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_GPIO_H | ||
14 | #define __ASM_ARCH_GPIO_H __FILE__ | ||
15 | |||
16 | #define gpio_get_value __gpio_get_value | ||
17 | #define gpio_set_value __gpio_set_value | ||
18 | #define gpio_cansleep __gpio_cansleep | ||
19 | #define gpio_to_irq __gpio_to_irq | ||
20 | |||
21 | /* GPIO bank sizes */ | ||
22 | #define S5P6442_GPIO_A0_NR (8) | ||
23 | #define S5P6442_GPIO_A1_NR (2) | ||
24 | #define S5P6442_GPIO_B_NR (4) | ||
25 | #define S5P6442_GPIO_C0_NR (5) | ||
26 | #define S5P6442_GPIO_C1_NR (5) | ||
27 | #define S5P6442_GPIO_D0_NR (2) | ||
28 | #define S5P6442_GPIO_D1_NR (6) | ||
29 | #define S5P6442_GPIO_E0_NR (8) | ||
30 | #define S5P6442_GPIO_E1_NR (5) | ||
31 | #define S5P6442_GPIO_F0_NR (8) | ||
32 | #define S5P6442_GPIO_F1_NR (8) | ||
33 | #define S5P6442_GPIO_F2_NR (8) | ||
34 | #define S5P6442_GPIO_F3_NR (6) | ||
35 | #define S5P6442_GPIO_G0_NR (7) | ||
36 | #define S5P6442_GPIO_G1_NR (7) | ||
37 | #define S5P6442_GPIO_G2_NR (7) | ||
38 | #define S5P6442_GPIO_H0_NR (8) | ||
39 | #define S5P6442_GPIO_H1_NR (8) | ||
40 | #define S5P6442_GPIO_H2_NR (8) | ||
41 | #define S5P6442_GPIO_H3_NR (8) | ||
42 | #define S5P6442_GPIO_J0_NR (8) | ||
43 | #define S5P6442_GPIO_J1_NR (6) | ||
44 | #define S5P6442_GPIO_J2_NR (8) | ||
45 | #define S5P6442_GPIO_J3_NR (8) | ||
46 | #define S5P6442_GPIO_J4_NR (5) | ||
47 | |||
48 | /* GPIO bank numbers */ | ||
49 | |||
50 | /* CONFIG_S3C_GPIO_SPACE allows the user to select extra | ||
51 | * space for debugging purposes so that any accidental | ||
52 | * change from one gpio bank to another can be caught. | ||
53 | */ | ||
54 | |||
55 | #define S5P6442_GPIO_NEXT(__gpio) \ | ||
56 | ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) | ||
57 | |||
58 | enum s5p_gpio_number { | ||
59 | S5P6442_GPIO_A0_START = 0, | ||
60 | S5P6442_GPIO_A1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_A0), | ||
61 | S5P6442_GPIO_B_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_A1), | ||
62 | S5P6442_GPIO_C0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_B), | ||
63 | S5P6442_GPIO_C1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_C0), | ||
64 | S5P6442_GPIO_D0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_C1), | ||
65 | S5P6442_GPIO_D1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_D0), | ||
66 | S5P6442_GPIO_E0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_D1), | ||
67 | S5P6442_GPIO_E1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_E0), | ||
68 | S5P6442_GPIO_F0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_E1), | ||
69 | S5P6442_GPIO_F1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F0), | ||
70 | S5P6442_GPIO_F2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F1), | ||
71 | S5P6442_GPIO_F3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F2), | ||
72 | S5P6442_GPIO_G0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F3), | ||
73 | S5P6442_GPIO_G1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G0), | ||
74 | S5P6442_GPIO_G2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G1), | ||
75 | S5P6442_GPIO_H0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G2), | ||
76 | S5P6442_GPIO_H1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H0), | ||
77 | S5P6442_GPIO_H2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H1), | ||
78 | S5P6442_GPIO_H3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H2), | ||
79 | S5P6442_GPIO_J0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H3), | ||
80 | S5P6442_GPIO_J1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J0), | ||
81 | S5P6442_GPIO_J2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J1), | ||
82 | S5P6442_GPIO_J3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J2), | ||
83 | S5P6442_GPIO_J4_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J3), | ||
84 | }; | ||
85 | |||
86 | /* S5P6442 GPIO number definitions. */ | ||
87 | #define S5P6442_GPA0(_nr) (S5P6442_GPIO_A0_START + (_nr)) | ||
88 | #define S5P6442_GPA1(_nr) (S5P6442_GPIO_A1_START + (_nr)) | ||
89 | #define S5P6442_GPB(_nr) (S5P6442_GPIO_B_START + (_nr)) | ||
90 | #define S5P6442_GPC0(_nr) (S5P6442_GPIO_C0_START + (_nr)) | ||
91 | #define S5P6442_GPC1(_nr) (S5P6442_GPIO_C1_START + (_nr)) | ||
92 | #define S5P6442_GPD0(_nr) (S5P6442_GPIO_D0_START + (_nr)) | ||
93 | #define S5P6442_GPD1(_nr) (S5P6442_GPIO_D1_START + (_nr)) | ||
94 | #define S5P6442_GPE0(_nr) (S5P6442_GPIO_E0_START + (_nr)) | ||
95 | #define S5P6442_GPE1(_nr) (S5P6442_GPIO_E1_START + (_nr)) | ||
96 | #define S5P6442_GPF0(_nr) (S5P6442_GPIO_F0_START + (_nr)) | ||
97 | #define S5P6442_GPF1(_nr) (S5P6442_GPIO_F1_START + (_nr)) | ||
98 | #define S5P6442_GPF2(_nr) (S5P6442_GPIO_F2_START + (_nr)) | ||
99 | #define S5P6442_GPF3(_nr) (S5P6442_GPIO_F3_START + (_nr)) | ||
100 | #define S5P6442_GPG0(_nr) (S5P6442_GPIO_G0_START + (_nr)) | ||
101 | #define S5P6442_GPG1(_nr) (S5P6442_GPIO_G1_START + (_nr)) | ||
102 | #define S5P6442_GPG2(_nr) (S5P6442_GPIO_G2_START + (_nr)) | ||
103 | #define S5P6442_GPH0(_nr) (S5P6442_GPIO_H0_START + (_nr)) | ||
104 | #define S5P6442_GPH1(_nr) (S5P6442_GPIO_H1_START + (_nr)) | ||
105 | #define S5P6442_GPH2(_nr) (S5P6442_GPIO_H2_START + (_nr)) | ||
106 | #define S5P6442_GPH3(_nr) (S5P6442_GPIO_H3_START + (_nr)) | ||
107 | #define S5P6442_GPJ0(_nr) (S5P6442_GPIO_J0_START + (_nr)) | ||
108 | #define S5P6442_GPJ1(_nr) (S5P6442_GPIO_J1_START + (_nr)) | ||
109 | #define S5P6442_GPJ2(_nr) (S5P6442_GPIO_J2_START + (_nr)) | ||
110 | #define S5P6442_GPJ3(_nr) (S5P6442_GPIO_J3_START + (_nr)) | ||
111 | #define S5P6442_GPJ4(_nr) (S5P6442_GPIO_J4_START + (_nr)) | ||
112 | |||
113 | /* the end of the S5P6442 specific gpios */ | ||
114 | #define S5P6442_GPIO_END (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) + 1) | ||
115 | #define S3C_GPIO_END S5P6442_GPIO_END | ||
116 | |||
117 | /* define the number of gpios we need to the one after the GPJ4() range */ | ||
118 | #define ARCH_NR_GPIOS (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) + \ | ||
119 | CONFIG_SAMSUNG_GPIO_EXTRA + 1) | ||
120 | |||
121 | #include <asm-generic/gpio.h> | ||
122 | |||
123 | #endif /* __ASM_ARCH_GPIO_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/hardware.h b/arch/arm/mach-s5p6442/include/mach/hardware.h deleted file mode 100644 index 8cd7b67b49d4..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/hardware.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/hardware.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - Hardware support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_HARDWARE_H | ||
14 | #define __ASM_ARCH_HARDWARE_H __FILE__ | ||
15 | |||
16 | /* currently nothing here, placeholder */ | ||
17 | |||
18 | #endif /* __ASM_ARCH_HARDWARE_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/io.h b/arch/arm/mach-s5p6442/include/mach/io.h deleted file mode 100644 index 5d2195ad0b67..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/io.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* arch/arm/mach-s5p6442/include/mach/io.h | ||
2 | * | ||
3 | * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org> | ||
4 | * | ||
5 | * Default IO routines for S5P6442 | ||
6 | */ | ||
7 | |||
8 | #ifndef __ASM_ARM_ARCH_IO_H | ||
9 | #define __ASM_ARM_ARCH_IO_H | ||
10 | |||
11 | /* No current ISA/PCI bus support. */ | ||
12 | #define __io(a) __typesafe_io(a) | ||
13 | #define __mem_pci(a) (a) | ||
14 | |||
15 | #define IO_SPACE_LIMIT (0xFFFFFFFF) | ||
16 | |||
17 | #endif | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/irqs.h b/arch/arm/mach-s5p6442/include/mach/irqs.h deleted file mode 100644 index 3fbc6c3ad2da..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/irqs.h +++ /dev/null | |||
@@ -1,87 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/irqs.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - IRQ definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_IRQS_H | ||
14 | #define __ASM_ARCH_IRQS_H __FILE__ | ||
15 | |||
16 | #include <plat/irqs.h> | ||
17 | |||
18 | /* VIC0 */ | ||
19 | #define IRQ_EINT16_31 S5P_IRQ_VIC0(16) | ||
20 | #define IRQ_BATF S5P_IRQ_VIC0(17) | ||
21 | #define IRQ_MDMA S5P_IRQ_VIC0(18) | ||
22 | #define IRQ_PDMA S5P_IRQ_VIC0(19) | ||
23 | #define IRQ_TIMER0_VIC S5P_IRQ_VIC0(21) | ||
24 | #define IRQ_TIMER1_VIC S5P_IRQ_VIC0(22) | ||
25 | #define IRQ_TIMER2_VIC S5P_IRQ_VIC0(23) | ||
26 | #define IRQ_TIMER3_VIC S5P_IRQ_VIC0(24) | ||
27 | #define IRQ_TIMER4_VIC S5P_IRQ_VIC0(25) | ||
28 | #define IRQ_SYSTIMER S5P_IRQ_VIC0(26) | ||
29 | #define IRQ_WDT S5P_IRQ_VIC0(27) | ||
30 | #define IRQ_RTC_ALARM S5P_IRQ_VIC0(28) | ||
31 | #define IRQ_RTC_TIC S5P_IRQ_VIC0(29) | ||
32 | #define IRQ_GPIOINT S5P_IRQ_VIC0(30) | ||
33 | |||
34 | /* VIC1 */ | ||
35 | #define IRQ_PMU S5P_IRQ_VIC1(0) | ||
36 | #define IRQ_ONENAND S5P_IRQ_VIC1(7) | ||
37 | #define IRQ_UART0 S5P_IRQ_VIC1(10) | ||
38 | #define IRQ_UART1 S5P_IRQ_VIC1(11) | ||
39 | #define IRQ_UART2 S5P_IRQ_VIC1(12) | ||
40 | #define IRQ_SPI0 S5P_IRQ_VIC1(15) | ||
41 | #define IRQ_IIC S5P_IRQ_VIC1(19) | ||
42 | #define IRQ_IIC1 S5P_IRQ_VIC1(20) | ||
43 | #define IRQ_IIC2 S5P_IRQ_VIC1(21) | ||
44 | #define IRQ_OTG S5P_IRQ_VIC1(24) | ||
45 | #define IRQ_MSM S5P_IRQ_VIC1(25) | ||
46 | #define IRQ_HSMMC0 S5P_IRQ_VIC1(26) | ||
47 | #define IRQ_HSMMC1 S5P_IRQ_VIC1(27) | ||
48 | #define IRQ_HSMMC2 S5P_IRQ_VIC1(28) | ||
49 | #define IRQ_COMMRX S5P_IRQ_VIC1(29) | ||
50 | #define IRQ_COMMTX S5P_IRQ_VIC1(30) | ||
51 | |||
52 | /* VIC2 */ | ||
53 | #define IRQ_LCD0 S5P_IRQ_VIC2(0) | ||
54 | #define IRQ_LCD1 S5P_IRQ_VIC2(1) | ||
55 | #define IRQ_LCD2 S5P_IRQ_VIC2(2) | ||
56 | #define IRQ_LCD3 S5P_IRQ_VIC2(3) | ||
57 | #define IRQ_ROTATOR S5P_IRQ_VIC2(4) | ||
58 | #define IRQ_FIMC0 S5P_IRQ_VIC2(5) | ||
59 | #define IRQ_FIMC1 S5P_IRQ_VIC2(6) | ||
60 | #define IRQ_FIMC2 S5P_IRQ_VIC2(7) | ||
61 | #define IRQ_JPEG S5P_IRQ_VIC2(8) | ||
62 | #define IRQ_3D S5P_IRQ_VIC2(10) | ||
63 | #define IRQ_Mixer S5P_IRQ_VIC2(11) | ||
64 | #define IRQ_MFC S5P_IRQ_VIC2(14) | ||
65 | #define IRQ_TVENC S5P_IRQ_VIC2(15) | ||
66 | #define IRQ_I2S0 S5P_IRQ_VIC2(16) | ||
67 | #define IRQ_I2S1 S5P_IRQ_VIC2(17) | ||
68 | #define IRQ_RP S5P_IRQ_VIC2(19) | ||
69 | #define IRQ_PCM0 S5P_IRQ_VIC2(20) | ||
70 | #define IRQ_PCM1 S5P_IRQ_VIC2(21) | ||
71 | #define IRQ_ADC S5P_IRQ_VIC2(23) | ||
72 | #define IRQ_PENDN S5P_IRQ_VIC2(24) | ||
73 | #define IRQ_KEYPAD S5P_IRQ_VIC2(25) | ||
74 | #define IRQ_SSS_INT S5P_IRQ_VIC2(27) | ||
75 | #define IRQ_SSS_HASH S5P_IRQ_VIC2(28) | ||
76 | #define IRQ_VIC_END S5P_IRQ_VIC2(31) | ||
77 | |||
78 | #define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1) | ||
79 | |||
80 | #define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) | ||
81 | #define S5P_EINT_BASE2 (S5P_IRQ_EINT_BASE) | ||
82 | |||
83 | /* Set the default NR_IRQS */ | ||
84 | |||
85 | #define NR_IRQS (IRQ_EINT(31) + 1) | ||
86 | |||
87 | #endif /* __ASM_ARCH_IRQS_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h deleted file mode 100644 index 058dab4482a1..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/map.h +++ /dev/null | |||
@@ -1,76 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/map.h | ||
2 | * | ||
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - Memory map definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_MAP_H | ||
14 | #define __ASM_ARCH_MAP_H __FILE__ | ||
15 | |||
16 | #include <plat/map-base.h> | ||
17 | #include <plat/map-s5p.h> | ||
18 | |||
19 | #define S5P6442_PA_SDRAM 0x20000000 | ||
20 | |||
21 | #define S5P6442_PA_I2S0 0xC0B00000 | ||
22 | #define S5P6442_PA_I2S1 0xF2200000 | ||
23 | |||
24 | #define S5P6442_PA_CHIPID 0xE0000000 | ||
25 | |||
26 | #define S5P6442_PA_SYSCON 0xE0100000 | ||
27 | |||
28 | #define S5P6442_PA_GPIO 0xE0200000 | ||
29 | |||
30 | #define S5P6442_PA_VIC0 0xE4000000 | ||
31 | #define S5P6442_PA_VIC1 0xE4100000 | ||
32 | #define S5P6442_PA_VIC2 0xE4200000 | ||
33 | |||
34 | #define S5P6442_PA_SROMC 0xE7000000 | ||
35 | |||
36 | #define S5P6442_PA_MDMA 0xE8000000 | ||
37 | #define S5P6442_PA_PDMA 0xE9000000 | ||
38 | |||
39 | #define S5P6442_PA_TIMER 0xEA000000 | ||
40 | |||
41 | #define S5P6442_PA_SYSTIMER 0xEA100000 | ||
42 | |||
43 | #define S5P6442_PA_WATCHDOG 0xEA200000 | ||
44 | |||
45 | #define S5P6442_PA_UART 0xEC000000 | ||
46 | |||
47 | #define S5P6442_PA_IIC0 0xEC100000 | ||
48 | |||
49 | #define S5P6442_PA_SPI 0xEC300000 | ||
50 | |||
51 | #define S5P6442_PA_PCM0 0xF2400000 | ||
52 | #define S5P6442_PA_PCM1 0xF2500000 | ||
53 | |||
54 | /* Compatibiltiy Defines */ | ||
55 | |||
56 | #define S3C_PA_IIC S5P6442_PA_IIC0 | ||
57 | #define S3C_PA_WDT S5P6442_PA_WATCHDOG | ||
58 | |||
59 | #define S5P_PA_CHIPID S5P6442_PA_CHIPID | ||
60 | #define S5P_PA_SDRAM S5P6442_PA_SDRAM | ||
61 | #define S5P_PA_SROMC S5P6442_PA_SROMC | ||
62 | #define S5P_PA_SYSCON S5P6442_PA_SYSCON | ||
63 | #define S5P_PA_TIMER S5P6442_PA_TIMER | ||
64 | |||
65 | /* UART */ | ||
66 | |||
67 | #define S3C_PA_UART S5P6442_PA_UART | ||
68 | |||
69 | #define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) | ||
70 | #define S5P_PA_UART0 S5P_PA_UART(0) | ||
71 | #define S5P_PA_UART1 S5P_PA_UART(1) | ||
72 | #define S5P_PA_UART2 S5P_PA_UART(2) | ||
73 | |||
74 | #define S5P_SZ_UART SZ_256 | ||
75 | |||
76 | #endif /* __ASM_ARCH_MAP_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/memory.h b/arch/arm/mach-s5p6442/include/mach/memory.h deleted file mode 100644 index cfe259dded33..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/memory.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/memory.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - Memory definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_MEMORY_H | ||
14 | #define __ASM_ARCH_MEMORY_H | ||
15 | |||
16 | #define PLAT_PHYS_OFFSET UL(0x20000000) | ||
17 | #define CONSISTENT_DMA_SIZE SZ_8M | ||
18 | |||
19 | #endif /* __ASM_ARCH_MEMORY_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h deleted file mode 100644 index 2724b37def31..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h +++ /dev/null | |||
@@ -1,70 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Copyright 2008 Openmoko, Inc. | ||
7 | * Copyright 2008 Simtec Electronics | ||
8 | * Ben Dooks <ben@simtec.co.uk> | ||
9 | * http://armlinux.simtec.co.uk/ | ||
10 | * | ||
11 | * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h | ||
12 | * | ||
13 | * S5P6442 - pwm clock and timer support | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or modify | ||
16 | * it under the terms of the GNU General Public License version 2 as | ||
17 | * published by the Free Software Foundation. | ||
18 | */ | ||
19 | |||
20 | #ifndef __ASM_ARCH_PWMCLK_H | ||
21 | #define __ASM_ARCH_PWMCLK_H __FILE__ | ||
22 | |||
23 | /** | ||
24 | * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk | ||
25 | * @tcfg: The timer TCFG1 register bits shifted down to 0. | ||
26 | * | ||
27 | * Return true if the given configuration from TCFG1 is a TCLK instead | ||
28 | * any of the TDIV clocks. | ||
29 | */ | ||
30 | static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) | ||
31 | { | ||
32 | return tcfg == S3C64XX_TCFG1_MUX_TCLK; | ||
33 | } | ||
34 | |||
35 | /** | ||
36 | * tcfg_to_divisor() - convert tcfg1 setting to a divisor | ||
37 | * @tcfg1: The tcfg1 setting, shifted down. | ||
38 | * | ||
39 | * Get the divisor value for the given tcfg1 setting. We assume the | ||
40 | * caller has already checked to see if this is not a TCLK source. | ||
41 | */ | ||
42 | static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) | ||
43 | { | ||
44 | return 1 << tcfg1; | ||
45 | } | ||
46 | |||
47 | /** | ||
48 | * pwm_tdiv_has_div1() - does the tdiv setting have a /1 | ||
49 | * | ||
50 | * Return true if we have a /1 in the tdiv setting. | ||
51 | */ | ||
52 | static inline unsigned int pwm_tdiv_has_div1(void) | ||
53 | { | ||
54 | return 1; | ||
55 | } | ||
56 | |||
57 | /** | ||
58 | * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. | ||
59 | * @div: The divisor to calculate the bit information for. | ||
60 | * | ||
61 | * Turn a divisor into the necessary bit field for TCFG1. | ||
62 | */ | ||
63 | static inline unsigned long pwm_tdiv_div_bits(unsigned int div) | ||
64 | { | ||
65 | return ilog2(div); | ||
66 | } | ||
67 | |||
68 | #define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK | ||
69 | |||
70 | #endif /* __ASM_ARCH_PWMCLK_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/regs-clock.h b/arch/arm/mach-s5p6442/include/mach/regs-clock.h deleted file mode 100644 index 00828a336991..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/regs-clock.h +++ /dev/null | |||
@@ -1,104 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/regs-clock.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - Clock register definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_REGS_CLOCK_H | ||
14 | #define __ASM_ARCH_REGS_CLOCK_H __FILE__ | ||
15 | |||
16 | #include <mach/map.h> | ||
17 | |||
18 | #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) | ||
19 | |||
20 | #define S5P_APLL_LOCK S5P_CLKREG(0x00) | ||
21 | #define S5P_MPLL_LOCK S5P_CLKREG(0x08) | ||
22 | #define S5P_EPLL_LOCK S5P_CLKREG(0x10) | ||
23 | #define S5P_VPLL_LOCK S5P_CLKREG(0x20) | ||
24 | |||
25 | #define S5P_APLL_CON S5P_CLKREG(0x100) | ||
26 | #define S5P_MPLL_CON S5P_CLKREG(0x108) | ||
27 | #define S5P_EPLL_CON S5P_CLKREG(0x110) | ||
28 | #define S5P_VPLL_CON S5P_CLKREG(0x120) | ||
29 | |||
30 | #define S5P_CLK_SRC0 S5P_CLKREG(0x200) | ||
31 | #define S5P_CLK_SRC1 S5P_CLKREG(0x204) | ||
32 | #define S5P_CLK_SRC2 S5P_CLKREG(0x208) | ||
33 | #define S5P_CLK_SRC3 S5P_CLKREG(0x20C) | ||
34 | #define S5P_CLK_SRC4 S5P_CLKREG(0x210) | ||
35 | #define S5P_CLK_SRC5 S5P_CLKREG(0x214) | ||
36 | #define S5P_CLK_SRC6 S5P_CLKREG(0x218) | ||
37 | |||
38 | #define S5P_CLK_SRC_MASK0 S5P_CLKREG(0x280) | ||
39 | #define S5P_CLK_SRC_MASK1 S5P_CLKREG(0x284) | ||
40 | |||
41 | #define S5P_CLK_DIV0 S5P_CLKREG(0x300) | ||
42 | #define S5P_CLK_DIV1 S5P_CLKREG(0x304) | ||
43 | #define S5P_CLK_DIV2 S5P_CLKREG(0x308) | ||
44 | #define S5P_CLK_DIV3 S5P_CLKREG(0x30C) | ||
45 | #define S5P_CLK_DIV4 S5P_CLKREG(0x310) | ||
46 | #define S5P_CLK_DIV5 S5P_CLKREG(0x314) | ||
47 | #define S5P_CLK_DIV6 S5P_CLKREG(0x318) | ||
48 | |||
49 | #define S5P_CLKGATE_IP0 S5P_CLKREG(0x460) | ||
50 | #define S5P_CLKGATE_IP3 S5P_CLKREG(0x46C) | ||
51 | |||
52 | /* CLK_OUT */ | ||
53 | #define S5P_CLK_OUT_SHIFT (12) | ||
54 | #define S5P_CLK_OUT_MASK (0x1F << S5P_CLK_OUT_SHIFT) | ||
55 | #define S5P_CLK_OUT S5P_CLKREG(0x500) | ||
56 | |||
57 | #define S5P_CLK_DIV_STAT0 S5P_CLKREG(0x1000) | ||
58 | #define S5P_CLK_DIV_STAT1 S5P_CLKREG(0x1004) | ||
59 | |||
60 | #define S5P_CLK_MUX_STAT0 S5P_CLKREG(0x1100) | ||
61 | #define S5P_CLK_MUX_STAT1 S5P_CLKREG(0x1104) | ||
62 | |||
63 | #define S5P_MDNIE_SEL S5P_CLKREG(0x7008) | ||
64 | |||
65 | /* Register Bit definition */ | ||
66 | #define S5P_EPLL_EN (1<<31) | ||
67 | #define S5P_EPLL_MASK 0xffffffff | ||
68 | #define S5P_EPLLVAL(_m, _p, _s) ((_m) << 16 | ((_p) << 8) | ((_s))) | ||
69 | |||
70 | /* CLKDIV0 */ | ||
71 | #define S5P_CLKDIV0_APLL_SHIFT (0) | ||
72 | #define S5P_CLKDIV0_APLL_MASK (0x7 << S5P_CLKDIV0_APLL_SHIFT) | ||
73 | #define S5P_CLKDIV0_A2M_SHIFT (4) | ||
74 | #define S5P_CLKDIV0_A2M_MASK (0x7 << S5P_CLKDIV0_A2M_SHIFT) | ||
75 | #define S5P_CLKDIV0_D0CLK_SHIFT (16) | ||
76 | #define S5P_CLKDIV0_D0CLK_MASK (0xF << S5P_CLKDIV0_D0CLK_SHIFT) | ||
77 | #define S5P_CLKDIV0_P0CLK_SHIFT (20) | ||
78 | #define S5P_CLKDIV0_P0CLK_MASK (0x7 << S5P_CLKDIV0_P0CLK_SHIFT) | ||
79 | #define S5P_CLKDIV0_D1CLK_SHIFT (24) | ||
80 | #define S5P_CLKDIV0_D1CLK_MASK (0xF << S5P_CLKDIV0_D1CLK_SHIFT) | ||
81 | #define S5P_CLKDIV0_P1CLK_SHIFT (28) | ||
82 | #define S5P_CLKDIV0_P1CLK_MASK (0x7 << S5P_CLKDIV0_P1CLK_SHIFT) | ||
83 | |||
84 | /* Clock MUX status Registers */ | ||
85 | #define S5P_CLK_MUX_STAT0_APLL_SHIFT (0) | ||
86 | #define S5P_CLK_MUX_STAT0_APLL_MASK (0x7 << S5P_CLK_MUX_STAT0_APLL_SHIFT) | ||
87 | #define S5P_CLK_MUX_STAT0_MPLL_SHIFT (4) | ||
88 | #define S5P_CLK_MUX_STAT0_MPLL_MASK (0x7 << S5P_CLK_MUX_STAT0_MPLL_SHIFT) | ||
89 | #define S5P_CLK_MUX_STAT0_EPLL_SHIFT (8) | ||
90 | #define S5P_CLK_MUX_STAT0_EPLL_MASK (0x7 << S5P_CLK_MUX_STAT0_EPLL_SHIFT) | ||
91 | #define S5P_CLK_MUX_STAT0_VPLL_SHIFT (12) | ||
92 | #define S5P_CLK_MUX_STAT0_VPLL_MASK (0x7 << S5P_CLK_MUX_STAT0_VPLL_SHIFT) | ||
93 | #define S5P_CLK_MUX_STAT0_MUXARM_SHIFT (16) | ||
94 | #define S5P_CLK_MUX_STAT0_MUXARM_MASK (0x7 << S5P_CLK_MUX_STAT0_MUXARM_SHIFT) | ||
95 | #define S5P_CLK_MUX_STAT0_MUXD0_SHIFT (20) | ||
96 | #define S5P_CLK_MUX_STAT0_MUXD0_MASK (0x7 << S5P_CLK_MUX_STAT0_MUXD0_SHIFT) | ||
97 | #define S5P_CLK_MUX_STAT0_MUXD1_SHIFT (24) | ||
98 | #define S5P_CLK_MUX_STAT0_MUXD1_MASK (0x7 << S5P_CLK_MUX_STAT0_MUXD1_SHIFT) | ||
99 | #define S5P_CLK_MUX_STAT1_D1SYNC_SHIFT (24) | ||
100 | #define S5P_CLK_MUX_STAT1_D1SYNC_MASK (0x7 << S5P_CLK_MUX_STAT1_D1SYNC_SHIFT) | ||
101 | #define S5P_CLK_MUX_STAT1_D0SYNC_SHIFT (28) | ||
102 | #define S5P_CLK_MUX_STAT1_D0SYNC_MASK (0x7 << S5P_CLK_MUX_STAT1_D0SYNC_SHIFT) | ||
103 | |||
104 | #endif /* __ASM_ARCH_REGS_CLOCK_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/regs-irq.h b/arch/arm/mach-s5p6442/include/mach/regs-irq.h deleted file mode 100644 index 73782b52a83b..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/regs-irq.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/regs-irq.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - IRQ register definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_REGS_IRQ_H | ||
14 | #define __ASM_ARCH_REGS_IRQ_H __FILE__ | ||
15 | |||
16 | #include <asm/hardware/vic.h> | ||
17 | #include <mach/map.h> | ||
18 | |||
19 | #endif /* __ASM_ARCH_REGS_IRQ_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/spi-clocks.h b/arch/arm/mach-s5p6442/include/mach/spi-clocks.h deleted file mode 100644 index 7fd88205a97c..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/spi-clocks.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/spi-clocks.h | ||
2 | * | ||
3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __S5P6442_PLAT_SPI_CLKS_H | ||
12 | #define __S5P6442_PLAT_SPI_CLKS_H __FILE__ | ||
13 | |||
14 | #define S5P6442_SPI_SRCCLK_PCLK 0 | ||
15 | #define S5P6442_SPI_SRCCLK_SCLK 1 | ||
16 | |||
17 | #endif /* __S5P6442_PLAT_SPI_CLKS_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/system.h b/arch/arm/mach-s5p6442/include/mach/system.h deleted file mode 100644 index c30c1cc1b97e..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/system.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/system.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - system support header | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | ||
14 | #define __ASM_ARCH_SYSTEM_H __FILE__ | ||
15 | |||
16 | #include <plat/system-reset.h> | ||
17 | |||
18 | static void arch_idle(void) | ||
19 | { | ||
20 | /* nothing here yet */ | ||
21 | } | ||
22 | |||
23 | #endif /* __ASM_ARCH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/tick.h b/arch/arm/mach-s5p6442/include/mach/tick.h deleted file mode 100644 index e1d4cabf8297..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/tick.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/tick.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Based on arch/arm/mach-s3c6400/include/mach/tick.h | ||
7 | * | ||
8 | * S5P6442 - Timer tick support definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #ifndef __ASM_ARCH_TICK_H | ||
16 | #define __ASM_ARCH_TICK_H __FILE__ | ||
17 | |||
18 | static inline u32 s3c24xx_ostimer_pending(void) | ||
19 | { | ||
20 | u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS); | ||
21 | return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0))); | ||
22 | } | ||
23 | |||
24 | #define TICK_MAX (0xffffffff) | ||
25 | |||
26 | #endif /* __ASM_ARCH_TICK_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/timex.h b/arch/arm/mach-s5p6442/include/mach/timex.h deleted file mode 100644 index ff8f2fcadeb7..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/timex.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* arch/arm/mach-s5p6442/include/mach/timex.h | ||
2 | * | ||
3 | * Copyright (c) 2003-2010 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * S5P6442 - time parameters | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_TIMEX_H | ||
14 | #define __ASM_ARCH_TIMEX_H | ||
15 | |||
16 | /* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it | ||
17 | * a variable is useless. It seems as long as we make our timers an | ||
18 | * exact multiple of HZ, any value that makes a 1->1 correspondence | ||
19 | * for the time conversion functions to/from jiffies is acceptable. | ||
20 | */ | ||
21 | |||
22 | #define CLOCK_TICK_RATE 12000000 | ||
23 | |||
24 | #endif /* __ASM_ARCH_TIMEX_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/uncompress.h b/arch/arm/mach-s5p6442/include/mach/uncompress.h deleted file mode 100644 index 5ac7cbeeb987..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/uncompress.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/uncompress.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - uncompress code | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_UNCOMPRESS_H | ||
14 | #define __ASM_ARCH_UNCOMPRESS_H | ||
15 | |||
16 | #include <mach/map.h> | ||
17 | #include <plat/uncompress.h> | ||
18 | |||
19 | static void arch_detect_cpu(void) | ||
20 | { | ||
21 | /* we do not need to do any cpu detection here at the moment. */ | ||
22 | } | ||
23 | |||
24 | #endif /* __ASM_ARCH_UNCOMPRESS_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/vmalloc.h b/arch/arm/mach-s5p6442/include/mach/vmalloc.h deleted file mode 100644 index 4aa55e55ac47..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/vmalloc.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* arch/arm/mach-s5p6442/include/mach/vmalloc.h | ||
2 | * | ||
3 | * Copyright 2010 Ben Dooks <ben-linux@fluff.org> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 as | ||
7 | * published by the Free Software Foundation. | ||
8 | * | ||
9 | * S5P6442 vmalloc definition | ||
10 | */ | ||
11 | |||
12 | #ifndef __ASM_ARCH_VMALLOC_H | ||
13 | #define __ASM_ARCH_VMALLOC_H | ||
14 | |||
15 | #define VMALLOC_END 0xF6000000UL | ||
16 | |||
17 | #endif /* __ASM_ARCH_VMALLOC_H */ | ||
diff --git a/arch/arm/mach-s5p6442/init.c b/arch/arm/mach-s5p6442/init.c deleted file mode 100644 index 1874bdb71e1d..000000000000 --- a/arch/arm/mach-s5p6442/init.c +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/s5p6442-init.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/types.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/serial_core.h> | ||
15 | |||
16 | #include <plat/cpu.h> | ||
17 | #include <plat/devs.h> | ||
18 | #include <plat/s5p6442.h> | ||
19 | #include <plat/regs-serial.h> | ||
20 | |||
21 | static struct s3c24xx_uart_clksrc s5p6442_serial_clocks[] = { | ||
22 | [0] = { | ||
23 | .name = "pclk", | ||
24 | .divisor = 1, | ||
25 | .min_baud = 0, | ||
26 | .max_baud = 0, | ||
27 | }, | ||
28 | }; | ||
29 | |||
30 | /* uart registration process */ | ||
31 | void __init s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
32 | { | ||
33 | struct s3c2410_uartcfg *tcfg = cfg; | ||
34 | u32 ucnt; | ||
35 | |||
36 | for (ucnt = 0; ucnt < no; ucnt++, tcfg++) { | ||
37 | if (!tcfg->clocks) { | ||
38 | tcfg->clocks = s5p6442_serial_clocks; | ||
39 | tcfg->clocks_size = ARRAY_SIZE(s5p6442_serial_clocks); | ||
40 | } | ||
41 | } | ||
42 | |||
43 | s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); | ||
44 | } | ||
diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c deleted file mode 100644 index eaf6b9c489ff..000000000000 --- a/arch/arm/mach-s5p6442/mach-smdk6442.c +++ /dev/null | |||
@@ -1,102 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/mach-smdk6442.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/types.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/serial_core.h> | ||
15 | #include <linux/i2c.h> | ||
16 | |||
17 | #include <asm/mach/arch.h> | ||
18 | #include <asm/mach/map.h> | ||
19 | #include <asm/setup.h> | ||
20 | #include <asm/mach-types.h> | ||
21 | |||
22 | #include <mach/map.h> | ||
23 | #include <mach/regs-clock.h> | ||
24 | |||
25 | #include <plat/regs-serial.h> | ||
26 | #include <plat/s5p6442.h> | ||
27 | #include <plat/devs.h> | ||
28 | #include <plat/cpu.h> | ||
29 | #include <plat/iic.h> | ||
30 | |||
31 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | ||
32 | #define SMDK6442_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
33 | S3C2410_UCON_RXILEVEL | \ | ||
34 | S3C2410_UCON_TXIRQMODE | \ | ||
35 | S3C2410_UCON_RXIRQMODE | \ | ||
36 | S3C2410_UCON_RXFIFO_TOI | \ | ||
37 | S3C2443_UCON_RXERR_IRQEN) | ||
38 | |||
39 | #define SMDK6442_ULCON_DEFAULT S3C2410_LCON_CS8 | ||
40 | |||
41 | #define SMDK6442_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
42 | S5PV210_UFCON_TXTRIG4 | \ | ||
43 | S5PV210_UFCON_RXTRIG4) | ||
44 | |||
45 | static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = { | ||
46 | [0] = { | ||
47 | .hwport = 0, | ||
48 | .flags = 0, | ||
49 | .ucon = SMDK6442_UCON_DEFAULT, | ||
50 | .ulcon = SMDK6442_ULCON_DEFAULT, | ||
51 | .ufcon = SMDK6442_UFCON_DEFAULT, | ||
52 | }, | ||
53 | [1] = { | ||
54 | .hwport = 1, | ||
55 | .flags = 0, | ||
56 | .ucon = SMDK6442_UCON_DEFAULT, | ||
57 | .ulcon = SMDK6442_ULCON_DEFAULT, | ||
58 | .ufcon = SMDK6442_UFCON_DEFAULT, | ||
59 | }, | ||
60 | [2] = { | ||
61 | .hwport = 2, | ||
62 | .flags = 0, | ||
63 | .ucon = SMDK6442_UCON_DEFAULT, | ||
64 | .ulcon = SMDK6442_ULCON_DEFAULT, | ||
65 | .ufcon = SMDK6442_UFCON_DEFAULT, | ||
66 | }, | ||
67 | }; | ||
68 | |||
69 | static struct platform_device *smdk6442_devices[] __initdata = { | ||
70 | &s3c_device_i2c0, | ||
71 | &samsung_asoc_dma, | ||
72 | &s5p6442_device_iis0, | ||
73 | &s3c_device_wdt, | ||
74 | }; | ||
75 | |||
76 | static struct i2c_board_info smdk6442_i2c_devs0[] __initdata = { | ||
77 | { I2C_BOARD_INFO("wm8580", 0x1b), }, | ||
78 | }; | ||
79 | |||
80 | static void __init smdk6442_map_io(void) | ||
81 | { | ||
82 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | ||
83 | s3c24xx_init_clocks(12000000); | ||
84 | s3c24xx_init_uarts(smdk6442_uartcfgs, ARRAY_SIZE(smdk6442_uartcfgs)); | ||
85 | } | ||
86 | |||
87 | static void __init smdk6442_machine_init(void) | ||
88 | { | ||
89 | s3c_i2c0_set_platdata(NULL); | ||
90 | i2c_register_board_info(0, smdk6442_i2c_devs0, | ||
91 | ARRAY_SIZE(smdk6442_i2c_devs0)); | ||
92 | platform_add_devices(smdk6442_devices, ARRAY_SIZE(smdk6442_devices)); | ||
93 | } | ||
94 | |||
95 | MACHINE_START(SMDK6442, "SMDK6442") | ||
96 | /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ | ||
97 | .boot_params = S5P_PA_SDRAM + 0x100, | ||
98 | .init_irq = s5p6442_init_irq, | ||
99 | .map_io = smdk6442_map_io, | ||
100 | .init_machine = smdk6442_machine_init, | ||
101 | .timer = &s3c24xx_timer, | ||
102 | MACHINE_END | ||
diff --git a/arch/arm/mach-s5p6442/setup-i2c0.c b/arch/arm/mach-s5p6442/setup-i2c0.c deleted file mode 100644 index aad85656b0cc..000000000000 --- a/arch/arm/mach-s5p6442/setup-i2c0.c +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/setup-i2c0.c | ||
2 | * | ||
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * I2C0 GPIO configuration. | ||
7 | * | ||
8 | * Based on plat-s3c64xx/setup-i2c0.c | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/types.h> | ||
17 | #include <linux/gpio.h> | ||
18 | |||
19 | struct platform_device; /* don't need the contents */ | ||
20 | |||
21 | #include <plat/gpio-cfg.h> | ||
22 | #include <plat/iic.h> | ||
23 | |||
24 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) | ||
25 | { | ||
26 | s3c_gpio_cfgall_range(S5P6442_GPD1(0), 2, | ||
27 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
28 | } | ||
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c index bf0b02414e5b..7c6cb4fa47a9 100644 --- a/arch/arm/mach-ux500/board-mop500-sdi.c +++ b/arch/arm/mach-ux500/board-mop500-sdi.c | |||
@@ -99,8 +99,11 @@ static void sdi0_configure(void) | |||
99 | gpio_direction_output(sdi0_vsel, 0); | 99 | gpio_direction_output(sdi0_vsel, 0); |
100 | gpio_direction_output(sdi0_en, 1); | 100 | gpio_direction_output(sdi0_en, 1); |
101 | 101 | ||
102 | /* Add the device */ | 102 | /* Add the device, force v2 to subrevision 1 */ |
103 | db8500_add_sdi0(&mop500_sdi0_data); | 103 | if (cpu_is_u8500v2()) |
104 | db8500_add_sdi0(&mop500_sdi0_data, 0x10480180); | ||
105 | else | ||
106 | db8500_add_sdi0(&mop500_sdi0_data, 0); | ||
104 | } | 107 | } |
105 | 108 | ||
106 | void mop500_sdi_tc35892_init(void) | 109 | void mop500_sdi_tc35892_init(void) |
@@ -188,13 +191,18 @@ static struct mmci_platform_data mop500_sdi4_data = { | |||
188 | 191 | ||
189 | void __init mop500_sdi_init(void) | 192 | void __init mop500_sdi_init(void) |
190 | { | 193 | { |
194 | u32 periphid = 0; | ||
195 | |||
196 | /* v2 has a new version of this block that need to be forced */ | ||
197 | if (cpu_is_u8500v2()) | ||
198 | periphid = 0x10480180; | ||
191 | /* PoP:ed eMMC on top of DB8500 v1.0 has problems with high speed */ | 199 | /* PoP:ed eMMC on top of DB8500 v1.0 has problems with high speed */ |
192 | if (!cpu_is_u8500v10()) | 200 | if (!cpu_is_u8500v10()) |
193 | mop500_sdi2_data.capabilities |= MMC_CAP_MMC_HIGHSPEED; | 201 | mop500_sdi2_data.capabilities |= MMC_CAP_MMC_HIGHSPEED; |
194 | db8500_add_sdi2(&mop500_sdi2_data); | 202 | db8500_add_sdi2(&mop500_sdi2_data, periphid); |
195 | 203 | ||
196 | /* On-board eMMC */ | 204 | /* On-board eMMC */ |
197 | db8500_add_sdi4(&mop500_sdi4_data); | 205 | db8500_add_sdi4(&mop500_sdi4_data, periphid); |
198 | 206 | ||
199 | if (machine_is_hrefv60()) { | 207 | if (machine_is_hrefv60()) { |
200 | mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO; | 208 | mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO; |
diff --git a/arch/arm/mach-ux500/devices-common.h b/arch/arm/mach-ux500/devices-common.h index c719b5a1d913..7825705033bf 100644 --- a/arch/arm/mach-ux500/devices-common.h +++ b/arch/arm/mach-ux500/devices-common.h | |||
@@ -28,18 +28,20 @@ dbx500_add_msp_spi(const char *name, resource_size_t base, int irq, | |||
28 | 28 | ||
29 | static inline struct amba_device * | 29 | static inline struct amba_device * |
30 | dbx500_add_spi(const char *name, resource_size_t base, int irq, | 30 | dbx500_add_spi(const char *name, resource_size_t base, int irq, |
31 | struct spi_master_cntlr *pdata) | 31 | struct spi_master_cntlr *pdata, |
32 | u32 periphid) | ||
32 | { | 33 | { |
33 | return dbx500_add_amba_device(name, base, irq, pdata, 0); | 34 | return dbx500_add_amba_device(name, base, irq, pdata, periphid); |
34 | } | 35 | } |
35 | 36 | ||
36 | struct mmci_platform_data; | 37 | struct mmci_platform_data; |
37 | 38 | ||
38 | static inline struct amba_device * | 39 | static inline struct amba_device * |
39 | dbx500_add_sdi(const char *name, resource_size_t base, int irq, | 40 | dbx500_add_sdi(const char *name, resource_size_t base, int irq, |
40 | struct mmci_platform_data *pdata) | 41 | struct mmci_platform_data *pdata, |
42 | u32 periphid) | ||
41 | { | 43 | { |
42 | return dbx500_add_amba_device(name, base, irq, pdata, 0); | 44 | return dbx500_add_amba_device(name, base, irq, pdata, periphid); |
43 | } | 45 | } |
44 | 46 | ||
45 | struct amba_pl011_data; | 47 | struct amba_pl011_data; |
diff --git a/arch/arm/mach-ux500/devices-db5500.h b/arch/arm/mach-ux500/devices-db5500.h index 94627f7783b0..0c4bccd02b90 100644 --- a/arch/arm/mach-ux500/devices-db5500.h +++ b/arch/arm/mach-ux500/devices-db5500.h | |||
@@ -38,24 +38,34 @@ | |||
38 | ux500_add_usb(U5500_USBOTG_BASE, IRQ_DB5500_USBOTG, rx_cfg, tx_cfg) | 38 | ux500_add_usb(U5500_USBOTG_BASE, IRQ_DB5500_USBOTG, rx_cfg, tx_cfg) |
39 | 39 | ||
40 | #define db5500_add_sdi0(pdata) \ | 40 | #define db5500_add_sdi0(pdata) \ |
41 | dbx500_add_sdi("sdi0", U5500_SDI0_BASE, IRQ_DB5500_SDMMC0, pdata) | 41 | dbx500_add_sdi("sdi0", U5500_SDI0_BASE, IRQ_DB5500_SDMMC0, pdata, \ |
42 | 0x10480180) | ||
42 | #define db5500_add_sdi1(pdata) \ | 43 | #define db5500_add_sdi1(pdata) \ |
43 | dbx500_add_sdi("sdi1", U5500_SDI1_BASE, IRQ_DB5500_SDMMC1, pdata) | 44 | dbx500_add_sdi("sdi1", U5500_SDI1_BASE, IRQ_DB5500_SDMMC1, pdata, \ |
45 | 0x10480180) | ||
44 | #define db5500_add_sdi2(pdata) \ | 46 | #define db5500_add_sdi2(pdata) \ |
45 | dbx500_add_sdi("sdi2", U5500_SDI2_BASE, IRQ_DB5500_SDMMC2, pdata) | 47 | dbx500_add_sdi("sdi2", U5500_SDI2_BASE, IRQ_DB5500_SDMMC2, pdata \ |
48 | 0x10480180) | ||
46 | #define db5500_add_sdi3(pdata) \ | 49 | #define db5500_add_sdi3(pdata) \ |
47 | dbx500_add_sdi("sdi3", U5500_SDI3_BASE, IRQ_DB5500_SDMMC3, pdata) | 50 | dbx500_add_sdi("sdi3", U5500_SDI3_BASE, IRQ_DB5500_SDMMC3, pdata \ |
51 | 0x10480180) | ||
48 | #define db5500_add_sdi4(pdata) \ | 52 | #define db5500_add_sdi4(pdata) \ |
49 | dbx500_add_sdi("sdi4", U5500_SDI4_BASE, IRQ_DB5500_SDMMC4, pdata) | 53 | dbx500_add_sdi("sdi4", U5500_SDI4_BASE, IRQ_DB5500_SDMMC4, pdata \ |
54 | 0x10480180) | ||
50 | 55 | ||
56 | /* This one has a bad peripheral ID in the U5500 silicon */ | ||
51 | #define db5500_add_spi0(pdata) \ | 57 | #define db5500_add_spi0(pdata) \ |
52 | dbx500_add_spi("spi0", U5500_SPI0_BASE, IRQ_DB5500_SPI0, pdata) | 58 | dbx500_add_spi("spi0", U5500_SPI0_BASE, IRQ_DB5500_SPI0, pdata, \ |
59 | 0x10080023) | ||
53 | #define db5500_add_spi1(pdata) \ | 60 | #define db5500_add_spi1(pdata) \ |
54 | dbx500_add_spi("spi1", U5500_SPI1_BASE, IRQ_DB5500_SPI1, pdata) | 61 | dbx500_add_spi("spi1", U5500_SPI1_BASE, IRQ_DB5500_SPI1, pdata, \ |
62 | 0x10080023) | ||
55 | #define db5500_add_spi2(pdata) \ | 63 | #define db5500_add_spi2(pdata) \ |
56 | dbx500_add_spi("spi2", U5500_SPI2_BASE, IRQ_DB5500_SPI2, pdata) | 64 | dbx500_add_spi("spi2", U5500_SPI2_BASE, IRQ_DB5500_SPI2, pdata \ |
65 | 0x10080023) | ||
57 | #define db5500_add_spi3(pdata) \ | 66 | #define db5500_add_spi3(pdata) \ |
58 | dbx500_add_spi("spi3", U5500_SPI3_BASE, IRQ_DB5500_SPI3, pdata) | 67 | dbx500_add_spi("spi3", U5500_SPI3_BASE, IRQ_DB5500_SPI3, pdata \ |
68 | 0x10080023) | ||
59 | 69 | ||
60 | #define db5500_add_uart0(plat) \ | 70 | #define db5500_add_uart0(plat) \ |
61 | dbx500_add_uart("uart0", U5500_UART0_BASE, IRQ_DB5500_UART0, plat) | 71 | dbx500_add_uart("uart0", U5500_UART0_BASE, IRQ_DB5500_UART0, plat) |
diff --git a/arch/arm/mach-ux500/devices-db8500.h b/arch/arm/mach-ux500/devices-db8500.h index 9cc6f8f5d3e6..cbd4a9ae8109 100644 --- a/arch/arm/mach-ux500/devices-db8500.h +++ b/arch/arm/mach-ux500/devices-db8500.h | |||
@@ -25,7 +25,7 @@ static inline struct amba_device * | |||
25 | db8500_add_ssp(const char *name, resource_size_t base, int irq, | 25 | db8500_add_ssp(const char *name, resource_size_t base, int irq, |
26 | struct pl022_ssp_controller *pdata) | 26 | struct pl022_ssp_controller *pdata) |
27 | { | 27 | { |
28 | return dbx500_add_amba_device(name, base, irq, pdata, SSP_PER_ID); | 28 | return dbx500_add_amba_device(name, base, irq, pdata, 0); |
29 | } | 29 | } |
30 | 30 | ||
31 | 31 | ||
@@ -64,18 +64,18 @@ db8500_add_ssp(const char *name, resource_size_t base, int irq, | |||
64 | #define db8500_add_usb(rx_cfg, tx_cfg) \ | 64 | #define db8500_add_usb(rx_cfg, tx_cfg) \ |
65 | ux500_add_usb(U8500_USBOTG_BASE, IRQ_DB8500_USBOTG, rx_cfg, tx_cfg) | 65 | ux500_add_usb(U8500_USBOTG_BASE, IRQ_DB8500_USBOTG, rx_cfg, tx_cfg) |
66 | 66 | ||
67 | #define db8500_add_sdi0(pdata) \ | 67 | #define db8500_add_sdi0(pdata, pid) \ |
68 | dbx500_add_sdi("sdi0", U8500_SDI0_BASE, IRQ_DB8500_SDMMC0, pdata) | 68 | dbx500_add_sdi("sdi0", U8500_SDI0_BASE, IRQ_DB8500_SDMMC0, pdata, pid) |
69 | #define db8500_add_sdi1(pdata) \ | 69 | #define db8500_add_sdi1(pdata, pid) \ |
70 | dbx500_add_sdi("sdi1", U8500_SDI1_BASE, IRQ_DB8500_SDMMC1, pdata) | 70 | dbx500_add_sdi("sdi1", U8500_SDI1_BASE, IRQ_DB8500_SDMMC1, pdata, pid) |
71 | #define db8500_add_sdi2(pdata) \ | 71 | #define db8500_add_sdi2(pdata, pid) \ |
72 | dbx500_add_sdi("sdi2", U8500_SDI2_BASE, IRQ_DB8500_SDMMC2, pdata) | 72 | dbx500_add_sdi("sdi2", U8500_SDI2_BASE, IRQ_DB8500_SDMMC2, pdata, pid) |
73 | #define db8500_add_sdi3(pdata) \ | 73 | #define db8500_add_sdi3(pdata, pid) \ |
74 | dbx500_add_sdi("sdi3", U8500_SDI3_BASE, IRQ_DB8500_SDMMC3, pdata) | 74 | dbx500_add_sdi("sdi3", U8500_SDI3_BASE, IRQ_DB8500_SDMMC3, pdata, pid) |
75 | #define db8500_add_sdi4(pdata) \ | 75 | #define db8500_add_sdi4(pdata, pid) \ |
76 | dbx500_add_sdi("sdi4", U8500_SDI4_BASE, IRQ_DB8500_SDMMC4, pdata) | 76 | dbx500_add_sdi("sdi4", U8500_SDI4_BASE, IRQ_DB8500_SDMMC4, pdata, pid) |
77 | #define db8500_add_sdi5(pdata) \ | 77 | #define db8500_add_sdi5(pdata, pid) \ |
78 | dbx500_add_sdi("sdi5", U8500_SDI5_BASE, IRQ_DB8500_SDMMC5, pdata) | 78 | dbx500_add_sdi("sdi5", U8500_SDI5_BASE, IRQ_DB8500_SDMMC5, pdata, pid) |
79 | 79 | ||
80 | #define db8500_add_ssp0(pdata) \ | 80 | #define db8500_add_ssp0(pdata) \ |
81 | db8500_add_ssp("ssp0", U8500_SSP0_BASE, IRQ_DB8500_SSP0, pdata) | 81 | db8500_add_ssp("ssp0", U8500_SSP0_BASE, IRQ_DB8500_SSP0, pdata) |
@@ -83,13 +83,13 @@ db8500_add_ssp(const char *name, resource_size_t base, int irq, | |||
83 | db8500_add_ssp("ssp1", U8500_SSP1_BASE, IRQ_DB8500_SSP1, pdata) | 83 | db8500_add_ssp("ssp1", U8500_SSP1_BASE, IRQ_DB8500_SSP1, pdata) |
84 | 84 | ||
85 | #define db8500_add_spi0(pdata) \ | 85 | #define db8500_add_spi0(pdata) \ |
86 | dbx500_add_spi("spi0", U8500_SPI0_BASE, IRQ_DB8500_SPI0, pdata) | 86 | dbx500_add_spi("spi0", U8500_SPI0_BASE, IRQ_DB8500_SPI0, pdata, 0) |
87 | #define db8500_add_spi1(pdata) \ | 87 | #define db8500_add_spi1(pdata) \ |
88 | dbx500_add_spi("spi1", U8500_SPI1_BASE, IRQ_DB8500_SPI1, pdata) | 88 | dbx500_add_spi("spi1", U8500_SPI1_BASE, IRQ_DB8500_SPI1, pdata, 0) |
89 | #define db8500_add_spi2(pdata) \ | 89 | #define db8500_add_spi2(pdata) \ |
90 | dbx500_add_spi("spi2", U8500_SPI2_BASE, IRQ_DB8500_SPI2, pdata) | 90 | dbx500_add_spi("spi2", U8500_SPI2_BASE, IRQ_DB8500_SPI2, pdata, 0) |
91 | #define db8500_add_spi3(pdata) \ | 91 | #define db8500_add_spi3(pdata) \ |
92 | dbx500_add_spi("spi3", U8500_SPI3_BASE, IRQ_DB8500_SPI3, pdata) | 92 | dbx500_add_spi("spi3", U8500_SPI3_BASE, IRQ_DB8500_SPI3, pdata, 0) |
93 | 93 | ||
94 | #define db8500_add_uart0(pdata) \ | 94 | #define db8500_add_uart0(pdata) \ |
95 | dbx500_add_uart("uart0", U8500_UART0_BASE, IRQ_DB8500_UART0, pdata) | 95 | dbx500_add_uart("uart0", U8500_UART0_BASE, IRQ_DB8500_UART0, pdata) |
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h index 2c6f71049f2e..470ac52663d6 100644 --- a/arch/arm/mach-ux500/include/mach/hardware.h +++ b/arch/arm/mach-ux500/include/mach/hardware.h | |||
@@ -29,9 +29,6 @@ | |||
29 | #include <mach/db8500-regs.h> | 29 | #include <mach/db8500-regs.h> |
30 | #include <mach/db5500-regs.h> | 30 | #include <mach/db5500-regs.h> |
31 | 31 | ||
32 | /* ST-Ericsson modified pl022 id */ | ||
33 | #define SSP_PER_ID 0x01080022 | ||
34 | |||
35 | #ifndef __ASSEMBLY__ | 32 | #ifndef __ASSEMBLY__ |
36 | 33 | ||
37 | #include <mach/id.h> | 34 | #include <mach/id.h> |
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S index c96fa1b3f49f..73b4a8b66a57 100644 --- a/arch/arm/mm/cache-v6.S +++ b/arch/arm/mm/cache-v6.S | |||
@@ -176,6 +176,7 @@ ENDPROC(v6_coherent_kern_range) | |||
176 | */ | 176 | */ |
177 | ENTRY(v6_flush_kern_dcache_area) | 177 | ENTRY(v6_flush_kern_dcache_area) |
178 | add r1, r0, r1 | 178 | add r1, r0, r1 |
179 | bic r0, r0, #D_CACHE_LINE_SIZE - 1 | ||
179 | 1: | 180 | 1: |
180 | #ifdef HARVARD_CACHE | 181 | #ifdef HARVARD_CACHE |
181 | mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line | 182 | mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line |
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index dc18d81ef8ce..d32f02b61866 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S | |||
@@ -221,6 +221,8 @@ ENDPROC(v7_coherent_user_range) | |||
221 | ENTRY(v7_flush_kern_dcache_area) | 221 | ENTRY(v7_flush_kern_dcache_area) |
222 | dcache_line_size r2, r3 | 222 | dcache_line_size r2, r3 |
223 | add r1, r0, r1 | 223 | add r1, r0, r1 |
224 | sub r3, r2, #1 | ||
225 | bic r0, r0, r3 | ||
224 | 1: | 226 | 1: |
225 | mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line / unified line | 227 | mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line / unified line |
226 | add r0, r0, r2 | 228 | add r0, r0, r2 |
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c index b0ee9ba3cfab..8bfae964b133 100644 --- a/arch/arm/mm/context.c +++ b/arch/arm/mm/context.c | |||
@@ -24,9 +24,7 @@ DEFINE_PER_CPU(struct mm_struct *, current_mm); | |||
24 | 24 | ||
25 | /* | 25 | /* |
26 | * We fork()ed a process, and we need a new context for the child | 26 | * We fork()ed a process, and we need a new context for the child |
27 | * to run in. We reserve version 0 for initial tasks so we will | 27 | * to run in. |
28 | * always allocate an ASID. The ASID 0 is reserved for the TTBR | ||
29 | * register changing sequence. | ||
30 | */ | 28 | */ |
31 | void __init_new_context(struct task_struct *tsk, struct mm_struct *mm) | 29 | void __init_new_context(struct task_struct *tsk, struct mm_struct *mm) |
32 | { | 30 | { |
@@ -36,8 +34,11 @@ void __init_new_context(struct task_struct *tsk, struct mm_struct *mm) | |||
36 | 34 | ||
37 | static void flush_context(void) | 35 | static void flush_context(void) |
38 | { | 36 | { |
39 | /* set the reserved ASID before flushing the TLB */ | 37 | u32 ttb; |
40 | asm("mcr p15, 0, %0, c13, c0, 1\n" : : "r" (0)); | 38 | /* Copy TTBR1 into TTBR0 */ |
39 | asm volatile("mrc p15, 0, %0, c2, c0, 1\n" | ||
40 | "mcr p15, 0, %0, c2, c0, 0" | ||
41 | : "=r" (ttb)); | ||
41 | isb(); | 42 | isb(); |
42 | local_flush_tlb_all(); | 43 | local_flush_tlb_all(); |
43 | if (icache_is_vivt_asid_tagged()) { | 44 | if (icache_is_vivt_asid_tagged()) { |
@@ -93,7 +94,7 @@ static void reset_context(void *info) | |||
93 | return; | 94 | return; |
94 | 95 | ||
95 | smp_rmb(); | 96 | smp_rmb(); |
96 | asid = cpu_last_asid + cpu + 1; | 97 | asid = cpu_last_asid + cpu; |
97 | 98 | ||
98 | flush_context(); | 99 | flush_context(); |
99 | set_mm_context(mm, asid); | 100 | set_mm_context(mm, asid); |
@@ -143,13 +144,13 @@ void __new_context(struct mm_struct *mm) | |||
143 | * to start a new version and flush the TLB. | 144 | * to start a new version and flush the TLB. |
144 | */ | 145 | */ |
145 | if (unlikely((asid & ~ASID_MASK) == 0)) { | 146 | if (unlikely((asid & ~ASID_MASK) == 0)) { |
146 | asid = cpu_last_asid + smp_processor_id() + 1; | 147 | asid = cpu_last_asid + smp_processor_id(); |
147 | flush_context(); | 148 | flush_context(); |
148 | #ifdef CONFIG_SMP | 149 | #ifdef CONFIG_SMP |
149 | smp_wmb(); | 150 | smp_wmb(); |
150 | smp_call_function(reset_context, NULL, 1); | 151 | smp_call_function(reset_context, NULL, 1); |
151 | #endif | 152 | #endif |
152 | cpu_last_asid += NR_CPUS; | 153 | cpu_last_asid += NR_CPUS - 1; |
153 | } | 154 | } |
154 | 155 | ||
155 | set_mm_context(mm, asid); | 156 | set_mm_context(mm, asid); |
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 3f17ea146f0e..2c2cce9cd8c8 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c | |||
@@ -15,12 +15,14 @@ | |||
15 | #include <linux/mman.h> | 15 | #include <linux/mman.h> |
16 | #include <linux/nodemask.h> | 16 | #include <linux/nodemask.h> |
17 | #include <linux/initrd.h> | 17 | #include <linux/initrd.h> |
18 | #include <linux/of_fdt.h> | ||
18 | #include <linux/highmem.h> | 19 | #include <linux/highmem.h> |
19 | #include <linux/gfp.h> | 20 | #include <linux/gfp.h> |
20 | #include <linux/memblock.h> | 21 | #include <linux/memblock.h> |
21 | #include <linux/sort.h> | 22 | #include <linux/sort.h> |
22 | 23 | ||
23 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
25 | #include <asm/prom.h> | ||
24 | #include <asm/sections.h> | 26 | #include <asm/sections.h> |
25 | #include <asm/setup.h> | 27 | #include <asm/setup.h> |
26 | #include <asm/sizes.h> | 28 | #include <asm/sizes.h> |
@@ -71,6 +73,14 @@ static int __init parse_tag_initrd2(const struct tag *tag) | |||
71 | 73 | ||
72 | __tagtable(ATAG_INITRD2, parse_tag_initrd2); | 74 | __tagtable(ATAG_INITRD2, parse_tag_initrd2); |
73 | 75 | ||
76 | #ifdef CONFIG_OF_FLATTREE | ||
77 | void __init early_init_dt_setup_initrd_arch(unsigned long start, unsigned long end) | ||
78 | { | ||
79 | phys_initrd_start = start; | ||
80 | phys_initrd_size = end - start; | ||
81 | } | ||
82 | #endif /* CONFIG_OF_FLATTREE */ | ||
83 | |||
74 | /* | 84 | /* |
75 | * This keeps memory configuration data used by a couple memory | 85 | * This keeps memory configuration data used by a couple memory |
76 | * initialization functions, as well as show_mem() for the skipping | 86 | * initialization functions, as well as show_mem() for the skipping |
@@ -273,13 +283,15 @@ static void __init arm_bootmem_free(unsigned long min, unsigned long max_low, | |||
273 | free_area_init_node(0, zone_size, min, zhole_size); | 283 | free_area_init_node(0, zone_size, min, zhole_size); |
274 | } | 284 | } |
275 | 285 | ||
276 | #ifndef CONFIG_SPARSEMEM | 286 | #ifdef CONFIG_HAVE_ARCH_PFN_VALID |
277 | int pfn_valid(unsigned long pfn) | 287 | int pfn_valid(unsigned long pfn) |
278 | { | 288 | { |
279 | return memblock_is_memory(pfn << PAGE_SHIFT); | 289 | return memblock_is_memory(pfn << PAGE_SHIFT); |
280 | } | 290 | } |
281 | EXPORT_SYMBOL(pfn_valid); | 291 | EXPORT_SYMBOL(pfn_valid); |
292 | #endif | ||
282 | 293 | ||
294 | #ifndef CONFIG_SPARSEMEM | ||
283 | static void arm_memory_present(void) | 295 | static void arm_memory_present(void) |
284 | { | 296 | { |
285 | } | 297 | } |
@@ -334,6 +346,7 @@ void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc) | |||
334 | #endif | 346 | #endif |
335 | 347 | ||
336 | arm_mm_memblock_reserve(); | 348 | arm_mm_memblock_reserve(); |
349 | arm_dt_memblock_reserve(); | ||
337 | 350 | ||
338 | /* reserve any platform specific memblock areas */ | 351 | /* reserve any platform specific memblock areas */ |
339 | if (mdesc->reserve) | 352 | if (mdesc->reserve) |
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h index d2384106af9c..5b3d7d543659 100644 --- a/arch/arm/mm/mm.h +++ b/arch/arm/mm/mm.h | |||
@@ -5,14 +5,9 @@ extern pmd_t *top_pmd; | |||
5 | 5 | ||
6 | #define TOP_PTE(x) pte_offset_kernel(top_pmd, x) | 6 | #define TOP_PTE(x) pte_offset_kernel(top_pmd, x) |
7 | 7 | ||
8 | static inline pmd_t *pmd_off(pgd_t *pgd, unsigned long virt) | ||
9 | { | ||
10 | return pmd_offset(pud_offset(pgd, virt), virt); | ||
11 | } | ||
12 | |||
13 | static inline pmd_t *pmd_off_k(unsigned long virt) | 8 | static inline pmd_t *pmd_off_k(unsigned long virt) |
14 | { | 9 | { |
15 | return pmd_off(pgd_offset_k(virt), virt); | 10 | return pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt); |
16 | } | 11 | } |
17 | 12 | ||
18 | struct mem_type { | 13 | struct mem_type { |
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 08a92368d9d3..9d9e736c2b4f 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c | |||
@@ -763,15 +763,12 @@ static void __init sanity_check_meminfo(void) | |||
763 | { | 763 | { |
764 | int i, j, highmem = 0; | 764 | int i, j, highmem = 0; |
765 | 765 | ||
766 | lowmem_limit = __pa(vmalloc_min - 1) + 1; | ||
767 | memblock_set_current_limit(lowmem_limit); | ||
768 | |||
769 | for (i = 0, j = 0; i < meminfo.nr_banks; i++) { | 766 | for (i = 0, j = 0; i < meminfo.nr_banks; i++) { |
770 | struct membank *bank = &meminfo.bank[j]; | 767 | struct membank *bank = &meminfo.bank[j]; |
771 | *bank = meminfo.bank[i]; | 768 | *bank = meminfo.bank[i]; |
772 | 769 | ||
773 | #ifdef CONFIG_HIGHMEM | 770 | #ifdef CONFIG_HIGHMEM |
774 | if (__va(bank->start) > vmalloc_min || | 771 | if (__va(bank->start) >= vmalloc_min || |
775 | __va(bank->start) < (void *)PAGE_OFFSET) | 772 | __va(bank->start) < (void *)PAGE_OFFSET) |
776 | highmem = 1; | 773 | highmem = 1; |
777 | 774 | ||
@@ -829,6 +826,9 @@ static void __init sanity_check_meminfo(void) | |||
829 | bank->size = newsize; | 826 | bank->size = newsize; |
830 | } | 827 | } |
831 | #endif | 828 | #endif |
829 | if (!bank->highmem && bank->start + bank->size > lowmem_limit) | ||
830 | lowmem_limit = bank->start + bank->size; | ||
831 | |||
832 | j++; | 832 | j++; |
833 | } | 833 | } |
834 | #ifdef CONFIG_HIGHMEM | 834 | #ifdef CONFIG_HIGHMEM |
@@ -852,6 +852,7 @@ static void __init sanity_check_meminfo(void) | |||
852 | } | 852 | } |
853 | #endif | 853 | #endif |
854 | meminfo.nr_banks = j; | 854 | meminfo.nr_banks = j; |
855 | memblock_set_current_limit(lowmem_limit); | ||
855 | } | 856 | } |
856 | 857 | ||
857 | static inline void prepare_page_table(void) | 858 | static inline void prepare_page_table(void) |
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index ab17cc0d3fa7..1d2b8451bf25 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S | |||
@@ -213,7 +213,9 @@ __v6_setup: | |||
213 | mcr p15, 0, r0, c2, c0, 2 @ TTB control register | 213 | mcr p15, 0, r0, c2, c0, 2 @ TTB control register |
214 | ALT_SMP(orr r4, r4, #TTB_FLAGS_SMP) | 214 | ALT_SMP(orr r4, r4, #TTB_FLAGS_SMP) |
215 | ALT_UP(orr r4, r4, #TTB_FLAGS_UP) | 215 | ALT_UP(orr r4, r4, #TTB_FLAGS_UP) |
216 | mcr p15, 0, r4, c2, c0, 1 @ load TTB1 | 216 | ALT_SMP(orr r8, r8, #TTB_FLAGS_SMP) |
217 | ALT_UP(orr r8, r8, #TTB_FLAGS_UP) | ||
218 | mcr p15, 0, r8, c2, c0, 1 @ load TTB1 | ||
217 | #endif /* CONFIG_MMU */ | 219 | #endif /* CONFIG_MMU */ |
218 | adr r5, v6_crval | 220 | adr r5, v6_crval |
219 | ldmia r5, {r5, r6} | 221 | ldmia r5, {r5, r6} |
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index babfba09c89f..b3b566ec83d3 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -108,18 +108,16 @@ ENTRY(cpu_v7_switch_mm) | |||
108 | #ifdef CONFIG_ARM_ERRATA_430973 | 108 | #ifdef CONFIG_ARM_ERRATA_430973 |
109 | mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB | 109 | mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB |
110 | #endif | 110 | #endif |
111 | #ifdef CONFIG_ARM_ERRATA_754322 | 111 | mrc p15, 0, r2, c2, c0, 1 @ load TTB 1 |
112 | dsb | 112 | mcr p15, 0, r2, c2, c0, 0 @ into TTB 0 |
113 | #endif | ||
114 | mcr p15, 0, r2, c13, c0, 1 @ set reserved context ID | ||
115 | isb | ||
116 | 1: mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 | ||
117 | isb | 113 | isb |
118 | #ifdef CONFIG_ARM_ERRATA_754322 | 114 | #ifdef CONFIG_ARM_ERRATA_754322 |
119 | dsb | 115 | dsb |
120 | #endif | 116 | #endif |
121 | mcr p15, 0, r1, c13, c0, 1 @ set context ID | 117 | mcr p15, 0, r1, c13, c0, 1 @ set context ID |
122 | isb | 118 | isb |
119 | mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 | ||
120 | isb | ||
123 | #endif | 121 | #endif |
124 | mov pc, lr | 122 | mov pc, lr |
125 | ENDPROC(cpu_v7_switch_mm) | 123 | ENDPROC(cpu_v7_switch_mm) |
@@ -368,7 +366,9 @@ __v7_setup: | |||
368 | mcr p15, 0, r10, c2, c0, 2 @ TTB control register | 366 | mcr p15, 0, r10, c2, c0, 2 @ TTB control register |
369 | ALT_SMP(orr r4, r4, #TTB_FLAGS_SMP) | 367 | ALT_SMP(orr r4, r4, #TTB_FLAGS_SMP) |
370 | ALT_UP(orr r4, r4, #TTB_FLAGS_UP) | 368 | ALT_UP(orr r4, r4, #TTB_FLAGS_UP) |
371 | mcr p15, 0, r4, c2, c0, 1 @ load TTB1 | 369 | ALT_SMP(orr r8, r8, #TTB_FLAGS_SMP) |
370 | ALT_UP(orr r8, r8, #TTB_FLAGS_UP) | ||
371 | mcr p15, 0, r8, c2, c0, 1 @ load TTB1 | ||
372 | ldr r5, =PRRR @ PRRR | 372 | ldr r5, =PRRR @ PRRR |
373 | ldr r6, =NMRR @ NMRR | 373 | ldr r6, =NMRR @ NMRR |
374 | mcr p15, 0, r5, c10, c2, 0 @ write PRRR | 374 | mcr p15, 0, r5, c10, c2, 0 @ write PRRR |
diff --git a/arch/arm/plat-omap/include/plat/gpmc-smsc911x.h b/arch/arm/plat-omap/include/plat/gpmc-smsc911x.h index 872de0bf1e6b..ea6c9c88c725 100644 --- a/arch/arm/plat-omap/include/plat/gpmc-smsc911x.h +++ b/arch/arm/plat-omap/include/plat/gpmc-smsc911x.h | |||
@@ -14,14 +14,14 @@ | |||
14 | #ifndef __ASM_ARCH_OMAP_GPMC_SMSC911X_H__ | 14 | #ifndef __ASM_ARCH_OMAP_GPMC_SMSC911X_H__ |
15 | 15 | ||
16 | struct omap_smsc911x_platform_data { | 16 | struct omap_smsc911x_platform_data { |
17 | int id; | ||
17 | int cs; | 18 | int cs; |
18 | int gpio_irq; | 19 | int gpio_irq; |
19 | int gpio_reset; | 20 | int gpio_reset; |
20 | u32 flags; | 21 | u32 flags; |
21 | }; | 22 | }; |
22 | 23 | ||
23 | #if defined(CONFIG_SMSC911X) || \ | 24 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) |
24 | defined(CONFIG_SMSC911X_MODULE) | ||
25 | 25 | ||
26 | extern void gpmc_smsc911x_init(struct omap_smsc911x_platform_data *d); | 26 | extern void gpmc_smsc911x_init(struct omap_smsc911x_platform_data *d); |
27 | 27 | ||
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h index 565d2664f5a7..ac4b60d9aa29 100644 --- a/arch/arm/plat-omap/include/plat/uncompress.h +++ b/arch/arm/plat-omap/include/plat/uncompress.h | |||
@@ -129,7 +129,6 @@ static inline void __arch_decomp_setup(unsigned long arch_id) | |||
129 | DEBUG_LL_OMAP1(3, sx1); | 129 | DEBUG_LL_OMAP1(3, sx1); |
130 | 130 | ||
131 | /* omap2 based boards using UART1 */ | 131 | /* omap2 based boards using UART1 */ |
132 | DEBUG_LL_OMAP2(1, omap2evm); | ||
133 | DEBUG_LL_OMAP2(1, omap_2430sdp); | 132 | DEBUG_LL_OMAP2(1, omap_2430sdp); |
134 | DEBUG_LL_OMAP2(1, omap_apollon); | 133 | DEBUG_LL_OMAP2(1, omap_apollon); |
135 | DEBUG_LL_OMAP2(1, omap_h4); | 134 | DEBUG_LL_OMAP2(1, omap_h4); |
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h index 02b96c8f6a17..17d3c939775c 100644 --- a/arch/arm/plat-omap/include/plat/usb.h +++ b/arch/arm/plat-omap/include/plat/usb.h | |||
@@ -113,7 +113,7 @@ extern int omap4430_phy_suspend(struct device *dev, int suspend); | |||
113 | extern void am35x_musb_reset(void); | 113 | extern void am35x_musb_reset(void); |
114 | extern void am35x_musb_phy_power(u8 on); | 114 | extern void am35x_musb_phy_power(u8 on); |
115 | extern void am35x_musb_clear_irq(void); | 115 | extern void am35x_musb_clear_irq(void); |
116 | extern void am35x_musb_set_mode(u8 musb_mode); | 116 | extern void am35x_set_mode(u8 musb_mode); |
117 | 117 | ||
118 | /* | 118 | /* |
119 | * FIXME correct answer depends on hmc_mode, | 119 | * FIXME correct answer depends on hmc_mode, |
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig index 6751bcf7b888..e98f5c5c7879 100644 --- a/arch/arm/plat-s5p/Kconfig +++ b/arch/arm/plat-s5p/Kconfig | |||
@@ -7,7 +7,7 @@ | |||
7 | 7 | ||
8 | config PLAT_S5P | 8 | config PLAT_S5P |
9 | bool | 9 | bool |
10 | depends on (ARCH_S5P64X0 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS4) | 10 | depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS4) |
11 | default y | 11 | default y |
12 | select ARM_VIC if !ARCH_EXYNOS4 | 12 | select ARM_VIC if !ARCH_EXYNOS4 |
13 | select ARM_GIC if ARCH_EXYNOS4 | 13 | select ARM_GIC if ARCH_EXYNOS4 |
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c index 5cf5e721e6ca..bbc2aa7449ca 100644 --- a/arch/arm/plat-s5p/cpu.c +++ b/arch/arm/plat-s5p/cpu.c | |||
@@ -21,7 +21,6 @@ | |||
21 | 21 | ||
22 | #include <plat/cpu.h> | 22 | #include <plat/cpu.h> |
23 | #include <plat/s5p6440.h> | 23 | #include <plat/s5p6440.h> |
24 | #include <plat/s5p6442.h> | ||
25 | #include <plat/s5p6450.h> | 24 | #include <plat/s5p6450.h> |
26 | #include <plat/s5pc100.h> | 25 | #include <plat/s5pc100.h> |
27 | #include <plat/s5pv210.h> | 26 | #include <plat/s5pv210.h> |
@@ -30,7 +29,6 @@ | |||
30 | /* table of supported CPUs */ | 29 | /* table of supported CPUs */ |
31 | 30 | ||
32 | static const char name_s5p6440[] = "S5P6440"; | 31 | static const char name_s5p6440[] = "S5P6440"; |
33 | static const char name_s5p6442[] = "S5P6442"; | ||
34 | static const char name_s5p6450[] = "S5P6450"; | 32 | static const char name_s5p6450[] = "S5P6450"; |
35 | static const char name_s5pc100[] = "S5PC100"; | 33 | static const char name_s5pc100[] = "S5PC100"; |
36 | static const char name_s5pv210[] = "S5PV210/S5PC110"; | 34 | static const char name_s5pv210[] = "S5PV210/S5PC110"; |
@@ -46,14 +44,6 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
46 | .init = s5p64x0_init, | 44 | .init = s5p64x0_init, |
47 | .name = name_s5p6440, | 45 | .name = name_s5p6440, |
48 | }, { | 46 | }, { |
49 | .idcode = 0x36442000, | ||
50 | .idmask = 0xfffff000, | ||
51 | .map_io = s5p6442_map_io, | ||
52 | .init_clocks = s5p6442_init_clocks, | ||
53 | .init_uarts = s5p6442_init_uarts, | ||
54 | .init = s5p6442_init, | ||
55 | .name = name_s5p6442, | ||
56 | }, { | ||
57 | .idcode = 0x36450000, | 47 | .idcode = 0x36450000, |
58 | .idmask = 0xfffff000, | 48 | .idmask = 0xfffff000, |
59 | .map_io = s5p6450_map_io, | 49 | .map_io = s5p6450_map_io, |
diff --git a/arch/arm/plat-s5p/include/plat/s5p6442.h b/arch/arm/plat-s5p/include/plat/s5p6442.h deleted file mode 100644 index 7b8801349c94..000000000000 --- a/arch/arm/plat-s5p/include/plat/s5p6442.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* arch/arm/plat-s5p/include/plat/s5p6442.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Header file for s5p6442 cpu support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* Common init code for S5P6442 related SoCs */ | ||
14 | |||
15 | extern void s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
16 | extern void s5p6442_register_clocks(void); | ||
17 | extern void s5p6442_setup_clocks(void); | ||
18 | |||
19 | #ifdef CONFIG_CPU_S5P6442 | ||
20 | |||
21 | extern int s5p6442_init(void); | ||
22 | extern void s5p6442_init_irq(void); | ||
23 | extern void s5p6442_map_io(void); | ||
24 | extern void s5p6442_init_clocks(int xtal); | ||
25 | |||
26 | #define s5p6442_init_uarts s5p6442_common_init_uarts | ||
27 | |||
28 | #else | ||
29 | #define s5p6442_init_clocks NULL | ||
30 | #define s5p6442_init_uarts NULL | ||
31 | #define s5p6442_map_io NULL | ||
32 | #define s5p6442_init NULL | ||
33 | #endif | ||
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h index 3aedac0034ba..c0a5741b23e6 100644 --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ b/arch/arm/plat-samsung/include/plat/cpu.h | |||
@@ -86,7 +86,6 @@ extern struct sysdev_class s3c2443_sysclass; | |||
86 | extern struct sysdev_class s3c6410_sysclass; | 86 | extern struct sysdev_class s3c6410_sysclass; |
87 | extern struct sysdev_class s3c64xx_sysclass; | 87 | extern struct sysdev_class s3c64xx_sysclass; |
88 | extern struct sysdev_class s5p64x0_sysclass; | 88 | extern struct sysdev_class s5p64x0_sysclass; |
89 | extern struct sysdev_class s5p6442_sysclass; | ||
90 | extern struct sysdev_class s5pv210_sysclass; | 89 | extern struct sysdev_class s5pv210_sysclass; |
91 | extern struct sysdev_class exynos4_sysclass; | 90 | extern struct sysdev_class exynos4_sysclass; |
92 | 91 | ||
diff --git a/arch/arm/plat-samsung/include/plat/debug-macro.S b/arch/arm/plat-samsung/include/plat/debug-macro.S index dc6efd90e8ff..207e275362a8 100644 --- a/arch/arm/plat-samsung/include/plat/debug-macro.S +++ b/arch/arm/plat-samsung/include/plat/debug-macro.S | |||
@@ -11,7 +11,7 @@ | |||
11 | 11 | ||
12 | #include <plat/regs-serial.h> | 12 | #include <plat/regs-serial.h> |
13 | 13 | ||
14 | /* The S5PV210/S5PC110 and S5P6442 implementations are as belows. */ | 14 | /* The S5PV210/S5PC110 implementations are as belows. */ |
15 | 15 | ||
16 | .macro fifo_level_s5pv210 rd, rx | 16 | .macro fifo_level_s5pv210 rd, rx |
17 | ldr \rd, [ \rx, # S3C2410_UFSTAT ] | 17 | ldr \rd, [ \rx, # S3C2410_UFSTAT ] |
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index 39818d8da420..b61b8ee7cc52 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h | |||
@@ -111,12 +111,6 @@ extern struct platform_device exynos4_device_spdif; | |||
111 | extern struct platform_device exynos4_device_pd[]; | 111 | extern struct platform_device exynos4_device_pd[]; |
112 | extern struct platform_device exynos4_device_ahci; | 112 | extern struct platform_device exynos4_device_ahci; |
113 | 113 | ||
114 | extern struct platform_device s5p6442_device_pcm0; | ||
115 | extern struct platform_device s5p6442_device_pcm1; | ||
116 | extern struct platform_device s5p6442_device_iis0; | ||
117 | extern struct platform_device s5p6442_device_iis1; | ||
118 | extern struct platform_device s5p6442_device_spi; | ||
119 | |||
120 | extern struct platform_device s5p6440_device_pcm; | 114 | extern struct platform_device s5p6440_device_pcm; |
121 | extern struct platform_device s5p6440_device_iis; | 115 | extern struct platform_device s5p6440_device_iis; |
122 | 116 | ||
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h index 788837e99cb3..c151c5f94a87 100644 --- a/arch/arm/plat-samsung/include/plat/regs-serial.h +++ b/arch/arm/plat-samsung/include/plat/regs-serial.h | |||
@@ -194,7 +194,7 @@ | |||
194 | #define S3C64XX_UINTSP 0x34 | 194 | #define S3C64XX_UINTSP 0x34 |
195 | #define S3C64XX_UINTM 0x38 | 195 | #define S3C64XX_UINTM 0x38 |
196 | 196 | ||
197 | /* Following are specific to S5PV210 and S5P6442 */ | 197 | /* Following are specific to S5PV210 */ |
198 | #define S5PV210_UCON_CLKMASK (1<<10) | 198 | #define S5PV210_UCON_CLKMASK (1<<10) |
199 | #define S5PV210_UCON_PCLK (0<<10) | 199 | #define S5PV210_UCON_PCLK (0<<10) |
200 | #define S5PV210_UCON_UCLK (1<<10) | 200 | #define S5PV210_UCON_UCLK (1<<10) |
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h index ff1a561b326e..0ffe34a21554 100644 --- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h +++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h | |||
@@ -69,6 +69,5 @@ extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | |||
69 | extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 69 | extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); |
70 | extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 70 | extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); |
71 | extern void s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 71 | extern void s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); |
72 | extern void s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | ||
73 | 72 | ||
74 | #endif /* __S3C64XX_PLAT_SPI_H */ | 73 | #endif /* __S3C64XX_PLAT_SPI_H */ |
diff --git a/arch/avr32/include/asm/bitops.h b/arch/avr32/include/asm/bitops.h index 72444d97f80c..b70c19bab63a 100644 --- a/arch/avr32/include/asm/bitops.h +++ b/arch/avr32/include/asm/bitops.h | |||
@@ -270,14 +270,21 @@ static inline int __fls(unsigned long word) | |||
270 | 270 | ||
271 | unsigned long find_first_zero_bit(const unsigned long *addr, | 271 | unsigned long find_first_zero_bit(const unsigned long *addr, |
272 | unsigned long size); | 272 | unsigned long size); |
273 | #define find_first_zero_bit find_first_zero_bit | ||
274 | |||
273 | unsigned long find_next_zero_bit(const unsigned long *addr, | 275 | unsigned long find_next_zero_bit(const unsigned long *addr, |
274 | unsigned long size, | 276 | unsigned long size, |
275 | unsigned long offset); | 277 | unsigned long offset); |
278 | #define find_next_zero_bit find_next_zero_bit | ||
279 | |||
276 | unsigned long find_first_bit(const unsigned long *addr, | 280 | unsigned long find_first_bit(const unsigned long *addr, |
277 | unsigned long size); | 281 | unsigned long size); |
282 | #define find_first_bit find_first_bit | ||
283 | |||
278 | unsigned long find_next_bit(const unsigned long *addr, | 284 | unsigned long find_next_bit(const unsigned long *addr, |
279 | unsigned long size, | 285 | unsigned long size, |
280 | unsigned long offset); | 286 | unsigned long offset); |
287 | #define find_next_bit find_next_bit | ||
281 | 288 | ||
282 | /* | 289 | /* |
283 | * ffs: find first bit set. This is defined the same way as | 290 | * ffs: find first bit set. This is defined the same way as |
@@ -299,6 +306,14 @@ static inline int ffs(unsigned long word) | |||
299 | #include <asm-generic/bitops/hweight.h> | 306 | #include <asm-generic/bitops/hweight.h> |
300 | #include <asm-generic/bitops/lock.h> | 307 | #include <asm-generic/bitops/lock.h> |
301 | 308 | ||
309 | extern unsigned long find_next_zero_bit_le(const void *addr, | ||
310 | unsigned long size, unsigned long offset); | ||
311 | #define find_next_zero_bit_le find_next_zero_bit_le | ||
312 | |||
313 | extern unsigned long find_next_bit_le(const void *addr, | ||
314 | unsigned long size, unsigned long offset); | ||
315 | #define find_next_bit_le find_next_bit_le | ||
316 | |||
302 | #include <asm-generic/bitops/le.h> | 317 | #include <asm-generic/bitops/le.h> |
303 | #include <asm-generic/bitops/ext2-atomic.h> | 318 | #include <asm-generic/bitops/ext2-atomic.h> |
304 | 319 | ||
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c index bfc9d071db9b..aa677e2a3823 100644 --- a/arch/avr32/mach-at32ap/at32ap700x.c +++ b/arch/avr32/mach-at32ap/at32ap700x.c | |||
@@ -1014,6 +1014,7 @@ static struct platform_device *__initdata at32_usarts[4]; | |||
1014 | void __init at32_map_usart(unsigned int hw_id, unsigned int line, int flags) | 1014 | void __init at32_map_usart(unsigned int hw_id, unsigned int line, int flags) |
1015 | { | 1015 | { |
1016 | struct platform_device *pdev; | 1016 | struct platform_device *pdev; |
1017 | struct atmel_uart_data *pdata; | ||
1017 | 1018 | ||
1018 | switch (hw_id) { | 1019 | switch (hw_id) { |
1019 | case 0: | 1020 | case 0: |
@@ -1042,7 +1043,8 @@ void __init at32_map_usart(unsigned int hw_id, unsigned int line, int flags) | |||
1042 | data->regs = (void __iomem *)pdev->resource[0].start; | 1043 | data->regs = (void __iomem *)pdev->resource[0].start; |
1043 | } | 1044 | } |
1044 | 1045 | ||
1045 | pdev->id = line; | 1046 | pdata = pdev->dev.platform_data; |
1047 | pdata->num = portnr; | ||
1046 | at32_usarts[line] = pdev; | 1048 | at32_usarts[line] = pdev; |
1047 | } | 1049 | } |
1048 | 1050 | ||
diff --git a/arch/avr32/mach-at32ap/include/mach/board.h b/arch/avr32/mach-at32ap/include/mach/board.h index 61740201b311..679458d9a622 100644 --- a/arch/avr32/mach-at32ap/include/mach/board.h +++ b/arch/avr32/mach-at32ap/include/mach/board.h | |||
@@ -33,6 +33,7 @@ extern struct platform_device *atmel_default_console_device; | |||
33 | #define ATMEL_USART_CLK 0x04 | 33 | #define ATMEL_USART_CLK 0x04 |
34 | 34 | ||
35 | struct atmel_uart_data { | 35 | struct atmel_uart_data { |
36 | int num; /* port num */ | ||
36 | short use_dma_tx; /* use transmit DMA? */ | 37 | short use_dma_tx; /* use transmit DMA? */ |
37 | short use_dma_rx; /* use receive DMA? */ | 38 | short use_dma_rx; /* use receive DMA? */ |
38 | void __iomem *regs; /* virtual base address, if any */ | 39 | void __iomem *regs; /* virtual base address, if any */ |
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index a18180f2d007..d619b17c4413 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig | |||
@@ -47,9 +47,6 @@ config GENERIC_BUG | |||
47 | config ZONE_DMA | 47 | config ZONE_DMA |
48 | def_bool y | 48 | def_bool y |
49 | 49 | ||
50 | config GENERIC_FIND_NEXT_BIT | ||
51 | def_bool y | ||
52 | |||
53 | config GENERIC_GPIO | 50 | config GENERIC_GPIO |
54 | def_bool y | 51 | def_bool y |
55 | 52 | ||
diff --git a/arch/blackfin/include/asm/kgdb.h b/arch/blackfin/include/asm/kgdb.h index 3ac0c72e9fee..aaf884591b07 100644 --- a/arch/blackfin/include/asm/kgdb.h +++ b/arch/blackfin/include/asm/kgdb.h | |||
@@ -108,6 +108,7 @@ static inline void arch_kgdb_breakpoint(void) | |||
108 | #else | 108 | #else |
109 | # define CACHE_FLUSH_IS_SAFE 1 | 109 | # define CACHE_FLUSH_IS_SAFE 1 |
110 | #endif | 110 | #endif |
111 | #define GDB_ADJUSTS_BREAK_OFFSET | ||
111 | #define HW_INST_WATCHPOINT_NUM 6 | 112 | #define HW_INST_WATCHPOINT_NUM 6 |
112 | #define HW_WATCHPOINT_NUM 8 | 113 | #define HW_WATCHPOINT_NUM 8 |
113 | #define TYPE_INST_WATCHPOINT 0 | 114 | #define TYPE_INST_WATCHPOINT 0 |
diff --git a/arch/blackfin/include/asm/ptrace.h b/arch/blackfin/include/asm/ptrace.h index 1066d63e62b5..7854d4367c15 100644 --- a/arch/blackfin/include/asm/ptrace.h +++ b/arch/blackfin/include/asm/ptrace.h | |||
@@ -102,9 +102,6 @@ struct pt_regs { | |||
102 | /* user_mode returns true if only one bit is set in IPEND, other than the | 102 | /* user_mode returns true if only one bit is set in IPEND, other than the |
103 | master interrupt enable. */ | 103 | master interrupt enable. */ |
104 | #define user_mode(regs) (!(((regs)->ipend & ~0x10) & (((regs)->ipend & ~0x10) - 1))) | 104 | #define user_mode(regs) (!(((regs)->ipend & ~0x10) & (((regs)->ipend & ~0x10) - 1))) |
105 | #define instruction_pointer(regs) ((regs)->pc) | ||
106 | #define user_stack_pointer(regs) ((regs)->usp) | ||
107 | #define profile_pc(regs) instruction_pointer(regs) | ||
108 | extern void show_regs(struct pt_regs *); | 105 | extern void show_regs(struct pt_regs *); |
109 | 106 | ||
110 | #define arch_has_single_step() (1) | 107 | #define arch_has_single_step() (1) |
@@ -128,6 +125,8 @@ extern int is_user_addr_valid(struct task_struct *child, | |||
128 | ((unsigned long)task_stack_page(task) + \ | 125 | ((unsigned long)task_stack_page(task) + \ |
129 | (THREAD_SIZE - sizeof(struct pt_regs))) | 126 | (THREAD_SIZE - sizeof(struct pt_regs))) |
130 | 127 | ||
128 | #include <asm-generic/ptrace.h> | ||
129 | |||
131 | #endif /* __KERNEL__ */ | 130 | #endif /* __KERNEL__ */ |
132 | 131 | ||
133 | #endif /* __ASSEMBLY__ */ | 132 | #endif /* __ASSEMBLY__ */ |
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c index e16dc4560048..76db1d483173 100644 --- a/arch/blackfin/mach-bf537/boards/stamp.c +++ b/arch/blackfin/mach-bf537/boards/stamp.c | |||
@@ -382,7 +382,6 @@ static struct platform_device net2272_bfin_device = { | |||
382 | #endif | 382 | #endif |
383 | 383 | ||
384 | #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE) | 384 | #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE) |
385 | #ifdef CONFIG_MTD_PARTITIONS | ||
386 | const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL }; | 385 | const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL }; |
387 | 386 | ||
388 | static struct mtd_partition bfin_plat_nand_partitions[] = { | 387 | static struct mtd_partition bfin_plat_nand_partitions[] = { |
@@ -396,7 +395,6 @@ static struct mtd_partition bfin_plat_nand_partitions[] = { | |||
396 | .offset = MTDPART_OFS_APPEND, | 395 | .offset = MTDPART_OFS_APPEND, |
397 | }, | 396 | }, |
398 | }; | 397 | }; |
399 | #endif | ||
400 | 398 | ||
401 | #define BFIN_NAND_PLAT_CLE 2 | 399 | #define BFIN_NAND_PLAT_CLE 2 |
402 | #define BFIN_NAND_PLAT_ALE 1 | 400 | #define BFIN_NAND_PLAT_ALE 1 |
@@ -423,11 +421,9 @@ static struct platform_nand_data bfin_plat_nand_data = { | |||
423 | .chip = { | 421 | .chip = { |
424 | .nr_chips = 1, | 422 | .nr_chips = 1, |
425 | .chip_delay = 30, | 423 | .chip_delay = 30, |
426 | #ifdef CONFIG_MTD_PARTITIONS | ||
427 | .part_probe_types = part_probes, | 424 | .part_probe_types = part_probes, |
428 | .partitions = bfin_plat_nand_partitions, | 425 | .partitions = bfin_plat_nand_partitions, |
429 | .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions), | 426 | .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions), |
430 | #endif | ||
431 | }, | 427 | }, |
432 | .ctrl = { | 428 | .ctrl = { |
433 | .cmd_ctrl = bfin_plat_nand_cmd_ctrl, | 429 | .cmd_ctrl = bfin_plat_nand_cmd_ctrl, |
diff --git a/arch/blackfin/mach-bf561/boards/acvilon.c b/arch/blackfin/mach-bf561/boards/acvilon.c index 3926cd909b66..9231a942892b 100644 --- a/arch/blackfin/mach-bf561/boards/acvilon.c +++ b/arch/blackfin/mach-bf561/boards/acvilon.c | |||
@@ -243,7 +243,6 @@ static struct platform_device bfin_uart0_device = { | |||
243 | 243 | ||
244 | #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE) | 244 | #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE) |
245 | 245 | ||
246 | #ifdef CONFIG_MTD_PARTITIONS | ||
247 | const char *part_probes[] = { "cmdlinepart", NULL }; | 246 | const char *part_probes[] = { "cmdlinepart", NULL }; |
248 | 247 | ||
249 | static struct mtd_partition bfin_plat_nand_partitions[] = { | 248 | static struct mtd_partition bfin_plat_nand_partitions[] = { |
@@ -257,7 +256,6 @@ static struct mtd_partition bfin_plat_nand_partitions[] = { | |||
257 | .offset = MTDPART_OFS_APPEND, | 256 | .offset = MTDPART_OFS_APPEND, |
258 | }, | 257 | }, |
259 | }; | 258 | }; |
260 | #endif | ||
261 | 259 | ||
262 | #define BFIN_NAND_PLAT_CLE 2 | 260 | #define BFIN_NAND_PLAT_CLE 2 |
263 | #define BFIN_NAND_PLAT_ALE 3 | 261 | #define BFIN_NAND_PLAT_ALE 3 |
@@ -286,11 +284,9 @@ static struct platform_nand_data bfin_plat_nand_data = { | |||
286 | .chip = { | 284 | .chip = { |
287 | .nr_chips = 1, | 285 | .nr_chips = 1, |
288 | .chip_delay = 30, | 286 | .chip_delay = 30, |
289 | #ifdef CONFIG_MTD_PARTITIONS | ||
290 | .part_probe_types = part_probes, | 287 | .part_probe_types = part_probes, |
291 | .partitions = bfin_plat_nand_partitions, | 288 | .partitions = bfin_plat_nand_partitions, |
292 | .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions), | 289 | .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions), |
293 | #endif | ||
294 | }, | 290 | }, |
295 | .ctrl = { | 291 | .ctrl = { |
296 | .cmd_ctrl = bfin_plat_nand_cmd_ctrl, | 292 | .cmd_ctrl = bfin_plat_nand_cmd_ctrl, |
diff --git a/arch/cris/Kconfig b/arch/cris/Kconfig index a6d03069d0ff..17addacb169e 100644 --- a/arch/cris/Kconfig +++ b/arch/cris/Kconfig | |||
@@ -31,10 +31,6 @@ config ARCH_HAS_ILOG2_U64 | |||
31 | bool | 31 | bool |
32 | default n | 32 | default n |
33 | 33 | ||
34 | config GENERIC_FIND_NEXT_BIT | ||
35 | bool | ||
36 | default y | ||
37 | |||
38 | config GENERIC_HWEIGHT | 34 | config GENERIC_HWEIGHT |
39 | bool | 35 | bool |
40 | default y | 36 | default y |
@@ -274,7 +270,6 @@ config ETRAX_AXISFLASHMAP | |||
274 | select MTD_JEDECPROBE if ETRAX_ARCH_V32 | 270 | select MTD_JEDECPROBE if ETRAX_ARCH_V32 |
275 | select MTD_CHAR | 271 | select MTD_CHAR |
276 | select MTD_BLOCK | 272 | select MTD_BLOCK |
277 | select MTD_PARTITIONS | ||
278 | select MTD_COMPLEX_MAPPINGS | 273 | select MTD_COMPLEX_MAPPINGS |
279 | help | 274 | help |
280 | This option enables MTD mapping of flash devices. Needed to use | 275 | This option enables MTD mapping of flash devices. Needed to use |
diff --git a/arch/cris/arch-v10/drivers/axisflashmap.c b/arch/cris/arch-v10/drivers/axisflashmap.c index ed708e19d09e..a4bbdfd37bd8 100644 --- a/arch/cris/arch-v10/drivers/axisflashmap.c +++ b/arch/cris/arch-v10/drivers/axisflashmap.c | |||
@@ -372,7 +372,7 @@ static int __init init_axis_flash(void) | |||
372 | #ifdef CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE | 372 | #ifdef CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE |
373 | if (mymtd) { | 373 | if (mymtd) { |
374 | main_partition.size = mymtd->size; | 374 | main_partition.size = mymtd->size; |
375 | err = add_mtd_partitions(mymtd, &main_partition, 1); | 375 | err = mtd_device_register(mymtd, &main_partition, 1); |
376 | if (err) | 376 | if (err) |
377 | panic("axisflashmap: Could not initialize " | 377 | panic("axisflashmap: Could not initialize " |
378 | "partition for whole main mtd device!\n"); | 378 | "partition for whole main mtd device!\n"); |
@@ -382,10 +382,12 @@ static int __init init_axis_flash(void) | |||
382 | if (mymtd) { | 382 | if (mymtd) { |
383 | if (use_default_ptable) { | 383 | if (use_default_ptable) { |
384 | printk(KERN_INFO " Using default partition table.\n"); | 384 | printk(KERN_INFO " Using default partition table.\n"); |
385 | err = add_mtd_partitions(mymtd, axis_default_partitions, | 385 | err = mtd_device_register(mymtd, |
386 | NUM_DEFAULT_PARTITIONS); | 386 | axis_default_partitions, |
387 | NUM_DEFAULT_PARTITIONS); | ||
387 | } else { | 388 | } else { |
388 | err = add_mtd_partitions(mymtd, axis_partitions, pidx); | 389 | err = mtd_device_register(mymtd, axis_partitions, |
390 | pidx); | ||
389 | } | 391 | } |
390 | 392 | ||
391 | if (err) | 393 | if (err) |
diff --git a/arch/cris/arch-v32/drivers/Kconfig b/arch/cris/arch-v32/drivers/Kconfig index 1633b120aa81..41a2732e8b9c 100644 --- a/arch/cris/arch-v32/drivers/Kconfig +++ b/arch/cris/arch-v32/drivers/Kconfig | |||
@@ -405,7 +405,6 @@ config ETRAX_AXISFLASHMAP | |||
405 | select MTD_JEDECPROBE | 405 | select MTD_JEDECPROBE |
406 | select MTD_CHAR | 406 | select MTD_CHAR |
407 | select MTD_BLOCK | 407 | select MTD_BLOCK |
408 | select MTD_PARTITIONS | ||
409 | select MTD_COMPLEX_MAPPINGS | 408 | select MTD_COMPLEX_MAPPINGS |
410 | help | 409 | help |
411 | This option enables MTD mapping of flash devices. Needed to use | 410 | This option enables MTD mapping of flash devices. Needed to use |
diff --git a/arch/cris/arch-v32/drivers/axisflashmap.c b/arch/cris/arch-v32/drivers/axisflashmap.c index 7b155f8203b8..a2bde3744622 100644 --- a/arch/cris/arch-v32/drivers/axisflashmap.c +++ b/arch/cris/arch-v32/drivers/axisflashmap.c | |||
@@ -561,7 +561,7 @@ static int __init init_axis_flash(void) | |||
561 | #ifdef CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE | 561 | #ifdef CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE |
562 | if (main_mtd) { | 562 | if (main_mtd) { |
563 | main_partition.size = main_mtd->size; | 563 | main_partition.size = main_mtd->size; |
564 | err = add_mtd_partitions(main_mtd, &main_partition, 1); | 564 | err = mtd_device_register(main_mtd, &main_partition, 1); |
565 | if (err) | 565 | if (err) |
566 | panic("axisflashmap: Could not initialize " | 566 | panic("axisflashmap: Could not initialize " |
567 | "partition for whole main mtd device!\n"); | 567 | "partition for whole main mtd device!\n"); |
@@ -597,7 +597,8 @@ static int __init init_axis_flash(void) | |||
597 | mtd_ram->erasesize = (main_mtd ? main_mtd->erasesize : | 597 | mtd_ram->erasesize = (main_mtd ? main_mtd->erasesize : |
598 | CONFIG_ETRAX_PTABLE_SECTOR); | 598 | CONFIG_ETRAX_PTABLE_SECTOR); |
599 | } else { | 599 | } else { |
600 | err = add_mtd_partitions(main_mtd, &partition[part], 1); | 600 | err = mtd_device_register(main_mtd, &partition[part], |
601 | 1); | ||
601 | if (err) | 602 | if (err) |
602 | panic("axisflashmap: Could not add mtd " | 603 | panic("axisflashmap: Could not add mtd " |
603 | "partition %d\n", part); | 604 | "partition %d\n", part); |
@@ -633,7 +634,7 @@ static int __init init_axis_flash(void) | |||
633 | #ifndef CONFIG_ETRAX_VCS_SIM | 634 | #ifndef CONFIG_ETRAX_VCS_SIM |
634 | if (aux_mtd) { | 635 | if (aux_mtd) { |
635 | aux_partition.size = aux_mtd->size; | 636 | aux_partition.size = aux_mtd->size; |
636 | err = add_mtd_partitions(aux_mtd, &aux_partition, 1); | 637 | err = mtd_device_register(aux_mtd, &aux_partition, 1); |
637 | if (err) | 638 | if (err) |
638 | panic("axisflashmap: Could not initialize " | 639 | panic("axisflashmap: Could not initialize " |
639 | "aux mtd device!\n"); | 640 | "aux mtd device!\n"); |
diff --git a/arch/frv/Kconfig b/arch/frv/Kconfig index 064f62196745..cb884e489425 100644 --- a/arch/frv/Kconfig +++ b/arch/frv/Kconfig | |||
@@ -19,14 +19,6 @@ config RWSEM_GENERIC_SPINLOCK | |||
19 | config RWSEM_XCHGADD_ALGORITHM | 19 | config RWSEM_XCHGADD_ALGORITHM |
20 | bool | 20 | bool |
21 | 21 | ||
22 | config GENERIC_FIND_NEXT_BIT | ||
23 | bool | ||
24 | default y | ||
25 | |||
26 | config GENERIC_FIND_BIT_LE | ||
27 | bool | ||
28 | default y | ||
29 | |||
30 | config GENERIC_HWEIGHT | 22 | config GENERIC_HWEIGHT |
31 | bool | 23 | bool |
32 | default y | 24 | default y |
diff --git a/arch/frv/include/asm/suspend.h b/arch/frv/include/asm/suspend.h deleted file mode 100644 index 5fa7b5a6ee40..000000000000 --- a/arch/frv/include/asm/suspend.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* suspend.h: suspension stuff | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_SUSPEND_H | ||
13 | #define _ASM_SUSPEND_H | ||
14 | |||
15 | static inline int arch_prepare_suspend(void) | ||
16 | { | ||
17 | return 0; | ||
18 | } | ||
19 | |||
20 | #endif /* _ASM_SUSPEND_H */ | ||
diff --git a/arch/h8300/Kconfig b/arch/h8300/Kconfig index e20322ffcaf8..091ed6192ae8 100644 --- a/arch/h8300/Kconfig +++ b/arch/h8300/Kconfig | |||
@@ -41,14 +41,6 @@ config ARCH_HAS_ILOG2_U64 | |||
41 | bool | 41 | bool |
42 | default n | 42 | default n |
43 | 43 | ||
44 | config GENERIC_FIND_NEXT_BIT | ||
45 | bool | ||
46 | default y | ||
47 | |||
48 | config GENERIC_FIND_BIT_LE | ||
49 | bool | ||
50 | default y | ||
51 | |||
52 | config GENERIC_HWEIGHT | 44 | config GENERIC_HWEIGHT |
53 | bool | 45 | bool |
54 | default y | 46 | default y |
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index e5cc56ae6ce3..38280ef4a2af 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig | |||
@@ -78,10 +78,6 @@ config HUGETLB_PAGE_SIZE_VARIABLE | |||
78 | depends on HUGETLB_PAGE | 78 | depends on HUGETLB_PAGE |
79 | default y | 79 | default y |
80 | 80 | ||
81 | config GENERIC_FIND_NEXT_BIT | ||
82 | bool | ||
83 | default y | ||
84 | |||
85 | config GENERIC_CALIBRATE_DELAY | 81 | config GENERIC_CALIBRATE_DELAY |
86 | bool | 82 | bool |
87 | default y | 83 | default y |
diff --git a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c index 04440cc09b40..85118dfe9bb5 100644 --- a/arch/ia64/kernel/time.c +++ b/arch/ia64/kernel/time.c | |||
@@ -36,7 +36,7 @@ | |||
36 | static cycle_t itc_get_cycles(struct clocksource *cs); | 36 | static cycle_t itc_get_cycles(struct clocksource *cs); |
37 | 37 | ||
38 | struct fsyscall_gtod_data_t fsyscall_gtod_data = { | 38 | struct fsyscall_gtod_data_t fsyscall_gtod_data = { |
39 | .lock = SEQLOCK_UNLOCKED, | 39 | .lock = __SEQLOCK_UNLOCKED(fsyscall_gtod_data.lock), |
40 | }; | 40 | }; |
41 | 41 | ||
42 | struct itc_jitter_data_t itc_jitter_data; | 42 | struct itc_jitter_data_t itc_jitter_data; |
diff --git a/arch/m32r/Kconfig b/arch/m32r/Kconfig index 736b808d2291..85b44e858225 100644 --- a/arch/m32r/Kconfig +++ b/arch/m32r/Kconfig | |||
@@ -256,14 +256,6 @@ config ARCH_HAS_ILOG2_U64 | |||
256 | bool | 256 | bool |
257 | default n | 257 | default n |
258 | 258 | ||
259 | config GENERIC_FIND_NEXT_BIT | ||
260 | bool | ||
261 | default y | ||
262 | |||
263 | config GENERIC_FIND_BIT_LE | ||
264 | bool | ||
265 | default y | ||
266 | |||
267 | config GENERIC_HWEIGHT | 259 | config GENERIC_HWEIGHT |
268 | bool | 260 | bool |
269 | default y | 261 | default y |
diff --git a/arch/m32r/include/asm/smp.h b/arch/m32r/include/asm/smp.h index 8accc1bb0263..cf7829a61551 100644 --- a/arch/m32r/include/asm/smp.h +++ b/arch/m32r/include/asm/smp.h | |||
@@ -81,11 +81,11 @@ static __inline__ int cpu_number_map(int cpu) | |||
81 | 81 | ||
82 | static __inline__ unsigned int num_booting_cpus(void) | 82 | static __inline__ unsigned int num_booting_cpus(void) |
83 | { | 83 | { |
84 | return cpus_weight(cpu_callout_map); | 84 | return cpumask_weight(&cpu_callout_map); |
85 | } | 85 | } |
86 | 86 | ||
87 | extern void smp_send_timer(void); | 87 | extern void smp_send_timer(void); |
88 | extern unsigned long send_IPI_mask_phys(cpumask_t, int, int); | 88 | extern unsigned long send_IPI_mask_phys(const cpumask_t*, int, int); |
89 | 89 | ||
90 | extern void arch_send_call_function_single_ipi(int cpu); | 90 | extern void arch_send_call_function_single_ipi(int cpu); |
91 | extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); | 91 | extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); |
diff --git a/arch/m32r/kernel/smp.c b/arch/m32r/kernel/smp.c index fc10b39893d4..092d40a6708e 100644 --- a/arch/m32r/kernel/smp.c +++ b/arch/m32r/kernel/smp.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <asm/io.h> | 30 | #include <asm/io.h> |
31 | #include <asm/mmu_context.h> | 31 | #include <asm/mmu_context.h> |
32 | #include <asm/m32r.h> | 32 | #include <asm/m32r.h> |
33 | #include <asm/tlbflush.h> | ||
33 | 34 | ||
34 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | 35 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ |
35 | /* Data structures and variables */ | 36 | /* Data structures and variables */ |
@@ -61,33 +62,22 @@ extern spinlock_t ipi_lock[]; | |||
61 | /* Function Prototypes */ | 62 | /* Function Prototypes */ |
62 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | 63 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ |
63 | 64 | ||
64 | void smp_send_reschedule(int); | ||
65 | void smp_reschedule_interrupt(void); | 65 | void smp_reschedule_interrupt(void); |
66 | |||
67 | void smp_flush_cache_all(void); | ||
68 | void smp_flush_cache_all_interrupt(void); | 66 | void smp_flush_cache_all_interrupt(void); |
69 | 67 | ||
70 | void smp_flush_tlb_all(void); | ||
71 | static void flush_tlb_all_ipi(void *); | 68 | static void flush_tlb_all_ipi(void *); |
72 | |||
73 | void smp_flush_tlb_mm(struct mm_struct *); | ||
74 | void smp_flush_tlb_range(struct vm_area_struct *, unsigned long, \ | ||
75 | unsigned long); | ||
76 | void smp_flush_tlb_page(struct vm_area_struct *, unsigned long); | ||
77 | static void flush_tlb_others(cpumask_t, struct mm_struct *, | 69 | static void flush_tlb_others(cpumask_t, struct mm_struct *, |
78 | struct vm_area_struct *, unsigned long); | 70 | struct vm_area_struct *, unsigned long); |
71 | |||
79 | void smp_invalidate_interrupt(void); | 72 | void smp_invalidate_interrupt(void); |
80 | 73 | ||
81 | void smp_send_stop(void); | ||
82 | static void stop_this_cpu(void *); | 74 | static void stop_this_cpu(void *); |
83 | 75 | ||
84 | void smp_send_timer(void); | ||
85 | void smp_ipi_timer_interrupt(struct pt_regs *); | 76 | void smp_ipi_timer_interrupt(struct pt_regs *); |
86 | void smp_local_timer_interrupt(void); | 77 | void smp_local_timer_interrupt(void); |
87 | 78 | ||
88 | static void send_IPI_allbutself(int, int); | 79 | static void send_IPI_allbutself(int, int); |
89 | static void send_IPI_mask(const struct cpumask *, int, int); | 80 | static void send_IPI_mask(const struct cpumask *, int, int); |
90 | unsigned long send_IPI_mask_phys(cpumask_t, int, int); | ||
91 | 81 | ||
92 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | 82 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ |
93 | /* Rescheduling request Routines */ | 83 | /* Rescheduling request Routines */ |
@@ -162,10 +152,10 @@ void smp_flush_cache_all(void) | |||
162 | unsigned long *mask; | 152 | unsigned long *mask; |
163 | 153 | ||
164 | preempt_disable(); | 154 | preempt_disable(); |
165 | cpumask = cpu_online_map; | 155 | cpumask_copy(&cpumask, cpu_online_mask); |
166 | cpu_clear(smp_processor_id(), cpumask); | 156 | cpumask_clear_cpu(smp_processor_id(), &cpumask); |
167 | spin_lock(&flushcache_lock); | 157 | spin_lock(&flushcache_lock); |
168 | mask=cpus_addr(cpumask); | 158 | mask=cpumask_bits(&cpumask); |
169 | atomic_set_mask(*mask, (atomic_t *)&flushcache_cpumask); | 159 | atomic_set_mask(*mask, (atomic_t *)&flushcache_cpumask); |
170 | send_IPI_mask(&cpumask, INVALIDATE_CACHE_IPI, 0); | 160 | send_IPI_mask(&cpumask, INVALIDATE_CACHE_IPI, 0); |
171 | _flush_cache_copyback_all(); | 161 | _flush_cache_copyback_all(); |
@@ -263,8 +253,8 @@ void smp_flush_tlb_mm(struct mm_struct *mm) | |||
263 | preempt_disable(); | 253 | preempt_disable(); |
264 | cpu_id = smp_processor_id(); | 254 | cpu_id = smp_processor_id(); |
265 | mmc = &mm->context[cpu_id]; | 255 | mmc = &mm->context[cpu_id]; |
266 | cpu_mask = *mm_cpumask(mm); | 256 | cpumask_copy(&cpu_mask, mm_cpumask(mm)); |
267 | cpu_clear(cpu_id, cpu_mask); | 257 | cpumask_clear_cpu(cpu_id, &cpu_mask); |
268 | 258 | ||
269 | if (*mmc != NO_CONTEXT) { | 259 | if (*mmc != NO_CONTEXT) { |
270 | local_irq_save(flags); | 260 | local_irq_save(flags); |
@@ -275,7 +265,7 @@ void smp_flush_tlb_mm(struct mm_struct *mm) | |||
275 | cpumask_clear_cpu(cpu_id, mm_cpumask(mm)); | 265 | cpumask_clear_cpu(cpu_id, mm_cpumask(mm)); |
276 | local_irq_restore(flags); | 266 | local_irq_restore(flags); |
277 | } | 267 | } |
278 | if (!cpus_empty(cpu_mask)) | 268 | if (!cpumask_empty(&cpu_mask)) |
279 | flush_tlb_others(cpu_mask, mm, NULL, FLUSH_ALL); | 269 | flush_tlb_others(cpu_mask, mm, NULL, FLUSH_ALL); |
280 | 270 | ||
281 | preempt_enable(); | 271 | preempt_enable(); |
@@ -333,8 +323,8 @@ void smp_flush_tlb_page(struct vm_area_struct *vma, unsigned long va) | |||
333 | preempt_disable(); | 323 | preempt_disable(); |
334 | cpu_id = smp_processor_id(); | 324 | cpu_id = smp_processor_id(); |
335 | mmc = &mm->context[cpu_id]; | 325 | mmc = &mm->context[cpu_id]; |
336 | cpu_mask = *mm_cpumask(mm); | 326 | cpumask_copy(&cpu_mask, mm_cpumask(mm)); |
337 | cpu_clear(cpu_id, cpu_mask); | 327 | cpumask_clear_cpu(cpu_id, &cpu_mask); |
338 | 328 | ||
339 | #ifdef DEBUG_SMP | 329 | #ifdef DEBUG_SMP |
340 | if (!mm) | 330 | if (!mm) |
@@ -348,7 +338,7 @@ void smp_flush_tlb_page(struct vm_area_struct *vma, unsigned long va) | |||
348 | __flush_tlb_page(va); | 338 | __flush_tlb_page(va); |
349 | local_irq_restore(flags); | 339 | local_irq_restore(flags); |
350 | } | 340 | } |
351 | if (!cpus_empty(cpu_mask)) | 341 | if (!cpumask_empty(&cpu_mask)) |
352 | flush_tlb_others(cpu_mask, mm, vma, va); | 342 | flush_tlb_others(cpu_mask, mm, vma, va); |
353 | 343 | ||
354 | preempt_enable(); | 344 | preempt_enable(); |
@@ -395,14 +385,14 @@ static void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm, | |||
395 | * - current CPU must not be in mask | 385 | * - current CPU must not be in mask |
396 | * - mask must exist :) | 386 | * - mask must exist :) |
397 | */ | 387 | */ |
398 | BUG_ON(cpus_empty(cpumask)); | 388 | BUG_ON(cpumask_empty(&cpumask)); |
399 | 389 | ||
400 | BUG_ON(cpu_isset(smp_processor_id(), cpumask)); | 390 | BUG_ON(cpumask_test_cpu(smp_processor_id(), &cpumask)); |
401 | BUG_ON(!mm); | 391 | BUG_ON(!mm); |
402 | 392 | ||
403 | /* If a CPU which we ran on has gone down, OK. */ | 393 | /* If a CPU which we ran on has gone down, OK. */ |
404 | cpus_and(cpumask, cpumask, cpu_online_map); | 394 | cpumask_and(&cpumask, &cpumask, cpu_online_mask); |
405 | if (cpus_empty(cpumask)) | 395 | if (cpumask_empty(&cpumask)) |
406 | return; | 396 | return; |
407 | 397 | ||
408 | /* | 398 | /* |
@@ -416,7 +406,7 @@ static void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm, | |||
416 | flush_mm = mm; | 406 | flush_mm = mm; |
417 | flush_vma = vma; | 407 | flush_vma = vma; |
418 | flush_va = va; | 408 | flush_va = va; |
419 | mask=cpus_addr(cpumask); | 409 | mask=cpumask_bits(&cpumask); |
420 | atomic_set_mask(*mask, (atomic_t *)&flush_cpumask); | 410 | atomic_set_mask(*mask, (atomic_t *)&flush_cpumask); |
421 | 411 | ||
422 | /* | 412 | /* |
@@ -425,7 +415,7 @@ static void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm, | |||
425 | */ | 415 | */ |
426 | send_IPI_mask(&cpumask, INVALIDATE_TLB_IPI, 0); | 416 | send_IPI_mask(&cpumask, INVALIDATE_TLB_IPI, 0); |
427 | 417 | ||
428 | while (!cpus_empty(flush_cpumask)) { | 418 | while (!cpumask_empty((cpumask_t*)&flush_cpumask)) { |
429 | /* nothing. lockup detection does not belong here */ | 419 | /* nothing. lockup detection does not belong here */ |
430 | mb(); | 420 | mb(); |
431 | } | 421 | } |
@@ -460,7 +450,7 @@ void smp_invalidate_interrupt(void) | |||
460 | int cpu_id = smp_processor_id(); | 450 | int cpu_id = smp_processor_id(); |
461 | unsigned long *mmc = &flush_mm->context[cpu_id]; | 451 | unsigned long *mmc = &flush_mm->context[cpu_id]; |
462 | 452 | ||
463 | if (!cpu_isset(cpu_id, flush_cpumask)) | 453 | if (!cpumask_test_cpu(cpu_id, &flush_cpumask)) |
464 | return; | 454 | return; |
465 | 455 | ||
466 | if (flush_va == FLUSH_ALL) { | 456 | if (flush_va == FLUSH_ALL) { |
@@ -478,7 +468,7 @@ void smp_invalidate_interrupt(void) | |||
478 | __flush_tlb_page(va); | 468 | __flush_tlb_page(va); |
479 | } | 469 | } |
480 | } | 470 | } |
481 | cpu_clear(cpu_id, flush_cpumask); | 471 | cpumask_clear_cpu(cpu_id, (cpumask_t*)&flush_cpumask); |
482 | } | 472 | } |
483 | 473 | ||
484 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | 474 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ |
@@ -530,7 +520,7 @@ static void stop_this_cpu(void *dummy) | |||
530 | /* | 520 | /* |
531 | * Remove this CPU: | 521 | * Remove this CPU: |
532 | */ | 522 | */ |
533 | cpu_clear(cpu_id, cpu_online_map); | 523 | set_cpu_online(cpu_id, false); |
534 | 524 | ||
535 | /* | 525 | /* |
536 | * PSW IE = 1; | 526 | * PSW IE = 1; |
@@ -725,8 +715,8 @@ static void send_IPI_allbutself(int ipi_num, int try) | |||
725 | { | 715 | { |
726 | cpumask_t cpumask; | 716 | cpumask_t cpumask; |
727 | 717 | ||
728 | cpumask = cpu_online_map; | 718 | cpumask_copy(&cpumask, cpu_online_mask); |
729 | cpu_clear(smp_processor_id(), cpumask); | 719 | cpumask_clear_cpu(smp_processor_id(), &cpumask); |
730 | 720 | ||
731 | send_IPI_mask(&cpumask, ipi_num, try); | 721 | send_IPI_mask(&cpumask, ipi_num, try); |
732 | } | 722 | } |
@@ -763,13 +753,13 @@ static void send_IPI_mask(const struct cpumask *cpumask, int ipi_num, int try) | |||
763 | cpumask_and(&tmp, cpumask, cpu_online_mask); | 753 | cpumask_and(&tmp, cpumask, cpu_online_mask); |
764 | BUG_ON(!cpumask_equal(cpumask, &tmp)); | 754 | BUG_ON(!cpumask_equal(cpumask, &tmp)); |
765 | 755 | ||
766 | physid_mask = CPU_MASK_NONE; | 756 | cpumask_clear(&physid_mask); |
767 | for_each_cpu(cpu_id, cpumask) { | 757 | for_each_cpu(cpu_id, cpumask) { |
768 | if ((phys_id = cpu_to_physid(cpu_id)) != -1) | 758 | if ((phys_id = cpu_to_physid(cpu_id)) != -1) |
769 | cpu_set(phys_id, physid_mask); | 759 | cpumask_set_cpu(phys_id, &physid_mask); |
770 | } | 760 | } |
771 | 761 | ||
772 | send_IPI_mask_phys(physid_mask, ipi_num, try); | 762 | send_IPI_mask_phys(&physid_mask, ipi_num, try); |
773 | } | 763 | } |
774 | 764 | ||
775 | /*==========================================================================* | 765 | /*==========================================================================* |
@@ -792,14 +782,14 @@ static void send_IPI_mask(const struct cpumask *cpumask, int ipi_num, int try) | |||
792 | * ---------- --- -------------------------------------------------------- | 782 | * ---------- --- -------------------------------------------------------- |
793 | * | 783 | * |
794 | *==========================================================================*/ | 784 | *==========================================================================*/ |
795 | unsigned long send_IPI_mask_phys(cpumask_t physid_mask, int ipi_num, | 785 | unsigned long send_IPI_mask_phys(const cpumask_t *physid_mask, int ipi_num, |
796 | int try) | 786 | int try) |
797 | { | 787 | { |
798 | spinlock_t *ipilock; | 788 | spinlock_t *ipilock; |
799 | volatile unsigned long *ipicr_addr; | 789 | volatile unsigned long *ipicr_addr; |
800 | unsigned long ipicr_val; | 790 | unsigned long ipicr_val; |
801 | unsigned long my_physid_mask; | 791 | unsigned long my_physid_mask; |
802 | unsigned long mask = cpus_addr(physid_mask)[0]; | 792 | unsigned long mask = cpumask_bits(physid_mask)[0]; |
803 | 793 | ||
804 | 794 | ||
805 | if (mask & ~physids_coerce(phys_cpu_present_map)) | 795 | if (mask & ~physids_coerce(phys_cpu_present_map)) |
diff --git a/arch/m32r/kernel/smpboot.c b/arch/m32r/kernel/smpboot.c index e034844cfc0d..cfdbe5d15002 100644 --- a/arch/m32r/kernel/smpboot.c +++ b/arch/m32r/kernel/smpboot.c | |||
@@ -135,9 +135,9 @@ void __devinit smp_prepare_boot_cpu(void) | |||
135 | { | 135 | { |
136 | bsp_phys_id = hard_smp_processor_id(); | 136 | bsp_phys_id = hard_smp_processor_id(); |
137 | physid_set(bsp_phys_id, phys_cpu_present_map); | 137 | physid_set(bsp_phys_id, phys_cpu_present_map); |
138 | cpu_set(0, cpu_online_map); /* BSP's cpu_id == 0 */ | 138 | set_cpu_online(0, true); /* BSP's cpu_id == 0 */ |
139 | cpu_set(0, cpu_callout_map); | 139 | cpumask_set_cpu(0, &cpu_callout_map); |
140 | cpu_set(0, cpu_callin_map); | 140 | cpumask_set_cpu(0, &cpu_callin_map); |
141 | 141 | ||
142 | /* | 142 | /* |
143 | * Initialize the logical to physical CPU number mapping | 143 | * Initialize the logical to physical CPU number mapping |
@@ -178,7 +178,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus) | |||
178 | for (phys_id = 0 ; phys_id < nr_cpu ; phys_id++) | 178 | for (phys_id = 0 ; phys_id < nr_cpu ; phys_id++) |
179 | physid_set(phys_id, phys_cpu_present_map); | 179 | physid_set(phys_id, phys_cpu_present_map); |
180 | #ifndef CONFIG_HOTPLUG_CPU | 180 | #ifndef CONFIG_HOTPLUG_CPU |
181 | init_cpu_present(&cpu_possible_map); | 181 | init_cpu_present(cpu_possible_mask); |
182 | #endif | 182 | #endif |
183 | 183 | ||
184 | show_mp_info(nr_cpu); | 184 | show_mp_info(nr_cpu); |
@@ -294,10 +294,10 @@ static void __init do_boot_cpu(int phys_id) | |||
294 | send_status = 0; | 294 | send_status = 0; |
295 | boot_status = 0; | 295 | boot_status = 0; |
296 | 296 | ||
297 | cpu_set(phys_id, cpu_bootout_map); | 297 | cpumask_set_cpu(phys_id, &cpu_bootout_map); |
298 | 298 | ||
299 | /* Send Startup IPI */ | 299 | /* Send Startup IPI */ |
300 | send_IPI_mask_phys(cpumask_of_cpu(phys_id), CPU_BOOT_IPI, 0); | 300 | send_IPI_mask_phys(cpumask_of(phys_id), CPU_BOOT_IPI, 0); |
301 | 301 | ||
302 | Dprintk("Waiting for send to finish...\n"); | 302 | Dprintk("Waiting for send to finish...\n"); |
303 | timeout = 0; | 303 | timeout = 0; |
@@ -306,7 +306,7 @@ static void __init do_boot_cpu(int phys_id) | |||
306 | do { | 306 | do { |
307 | Dprintk("+"); | 307 | Dprintk("+"); |
308 | udelay(1000); | 308 | udelay(1000); |
309 | send_status = !cpu_isset(phys_id, cpu_bootin_map); | 309 | send_status = !cpumask_test_cpu(phys_id, &cpu_bootin_map); |
310 | } while (send_status && (timeout++ < 100)); | 310 | } while (send_status && (timeout++ < 100)); |
311 | 311 | ||
312 | Dprintk("After Startup.\n"); | 312 | Dprintk("After Startup.\n"); |
@@ -316,19 +316,19 @@ static void __init do_boot_cpu(int phys_id) | |||
316 | * allow APs to start initializing. | 316 | * allow APs to start initializing. |
317 | */ | 317 | */ |
318 | Dprintk("Before Callout %d.\n", cpu_id); | 318 | Dprintk("Before Callout %d.\n", cpu_id); |
319 | cpu_set(cpu_id, cpu_callout_map); | 319 | cpumask_set_cpu(cpu_id, &cpu_callout_map); |
320 | Dprintk("After Callout %d.\n", cpu_id); | 320 | Dprintk("After Callout %d.\n", cpu_id); |
321 | 321 | ||
322 | /* | 322 | /* |
323 | * Wait 5s total for a response | 323 | * Wait 5s total for a response |
324 | */ | 324 | */ |
325 | for (timeout = 0; timeout < 5000; timeout++) { | 325 | for (timeout = 0; timeout < 5000; timeout++) { |
326 | if (cpu_isset(cpu_id, cpu_callin_map)) | 326 | if (cpumask_test_cpu(cpu_id, &cpu_callin_map)) |
327 | break; /* It has booted */ | 327 | break; /* It has booted */ |
328 | udelay(1000); | 328 | udelay(1000); |
329 | } | 329 | } |
330 | 330 | ||
331 | if (cpu_isset(cpu_id, cpu_callin_map)) { | 331 | if (cpumask_test_cpu(cpu_id, &cpu_callin_map)) { |
332 | /* number CPUs logically, starting from 1 (BSP is 0) */ | 332 | /* number CPUs logically, starting from 1 (BSP is 0) */ |
333 | Dprintk("OK.\n"); | 333 | Dprintk("OK.\n"); |
334 | } else { | 334 | } else { |
@@ -340,9 +340,9 @@ static void __init do_boot_cpu(int phys_id) | |||
340 | 340 | ||
341 | if (send_status || boot_status) { | 341 | if (send_status || boot_status) { |
342 | unmap_cpu_to_physid(cpu_id, phys_id); | 342 | unmap_cpu_to_physid(cpu_id, phys_id); |
343 | cpu_clear(cpu_id, cpu_callout_map); | 343 | cpumask_clear_cpu(cpu_id, &cpu_callout_map); |
344 | cpu_clear(cpu_id, cpu_callin_map); | 344 | cpumask_clear_cpu(cpu_id, &cpu_callin_map); |
345 | cpu_clear(cpu_id, cpu_initialized); | 345 | cpumask_clear_cpu(cpu_id, &cpu_initialized); |
346 | cpucount--; | 346 | cpucount--; |
347 | } | 347 | } |
348 | } | 348 | } |
@@ -351,17 +351,17 @@ int __cpuinit __cpu_up(unsigned int cpu_id) | |||
351 | { | 351 | { |
352 | int timeout; | 352 | int timeout; |
353 | 353 | ||
354 | cpu_set(cpu_id, smp_commenced_mask); | 354 | cpumask_set_cpu(cpu_id, &smp_commenced_mask); |
355 | 355 | ||
356 | /* | 356 | /* |
357 | * Wait 5s total for a response | 357 | * Wait 5s total for a response |
358 | */ | 358 | */ |
359 | for (timeout = 0; timeout < 5000; timeout++) { | 359 | for (timeout = 0; timeout < 5000; timeout++) { |
360 | if (cpu_isset(cpu_id, cpu_online_map)) | 360 | if (cpu_online(cpu_id)) |
361 | break; | 361 | break; |
362 | udelay(1000); | 362 | udelay(1000); |
363 | } | 363 | } |
364 | if (!cpu_isset(cpu_id, cpu_online_map)) | 364 | if (!cpu_online(cpu_id)) |
365 | BUG(); | 365 | BUG(); |
366 | 366 | ||
367 | return 0; | 367 | return 0; |
@@ -373,11 +373,11 @@ void __init smp_cpus_done(unsigned int max_cpus) | |||
373 | unsigned long bogosum = 0; | 373 | unsigned long bogosum = 0; |
374 | 374 | ||
375 | for (timeout = 0; timeout < 5000; timeout++) { | 375 | for (timeout = 0; timeout < 5000; timeout++) { |
376 | if (cpus_equal(cpu_callin_map, cpu_online_map)) | 376 | if (cpumask_equal(&cpu_callin_map, cpu_online_mask)) |
377 | break; | 377 | break; |
378 | udelay(1000); | 378 | udelay(1000); |
379 | } | 379 | } |
380 | if (!cpus_equal(cpu_callin_map, cpu_online_map)) | 380 | if (!cpumask_equal(&cpu_callin_map, cpu_online_mask)) |
381 | BUG(); | 381 | BUG(); |
382 | 382 | ||
383 | for (cpu_id = 0 ; cpu_id < num_online_cpus() ; cpu_id++) | 383 | for (cpu_id = 0 ; cpu_id < num_online_cpus() ; cpu_id++) |
@@ -388,7 +388,7 @@ void __init smp_cpus_done(unsigned int max_cpus) | |||
388 | */ | 388 | */ |
389 | Dprintk("Before bogomips.\n"); | 389 | Dprintk("Before bogomips.\n"); |
390 | if (cpucount) { | 390 | if (cpucount) { |
391 | for_each_cpu_mask(cpu_id, cpu_online_map) | 391 | for_each_cpu(cpu_id,cpu_online_mask) |
392 | bogosum += cpu_data[cpu_id].loops_per_jiffy; | 392 | bogosum += cpu_data[cpu_id].loops_per_jiffy; |
393 | 393 | ||
394 | printk(KERN_INFO "Total of %d processors activated " \ | 394 | printk(KERN_INFO "Total of %d processors activated " \ |
@@ -425,7 +425,7 @@ int __init start_secondary(void *unused) | |||
425 | cpu_init(); | 425 | cpu_init(); |
426 | preempt_disable(); | 426 | preempt_disable(); |
427 | smp_callin(); | 427 | smp_callin(); |
428 | while (!cpu_isset(smp_processor_id(), smp_commenced_mask)) | 428 | while (!cpumask_test_cpu(smp_processor_id(), &smp_commenced_mask)) |
429 | cpu_relax(); | 429 | cpu_relax(); |
430 | 430 | ||
431 | smp_online(); | 431 | smp_online(); |
@@ -463,7 +463,7 @@ static void __init smp_callin(void) | |||
463 | int cpu_id = smp_processor_id(); | 463 | int cpu_id = smp_processor_id(); |
464 | unsigned long timeout; | 464 | unsigned long timeout; |
465 | 465 | ||
466 | if (cpu_isset(cpu_id, cpu_callin_map)) { | 466 | if (cpumask_test_cpu(cpu_id, &cpu_callin_map)) { |
467 | printk("huh, phys CPU#%d, CPU#%d already present??\n", | 467 | printk("huh, phys CPU#%d, CPU#%d already present??\n", |
468 | phys_id, cpu_id); | 468 | phys_id, cpu_id); |
469 | BUG(); | 469 | BUG(); |
@@ -474,7 +474,7 @@ static void __init smp_callin(void) | |||
474 | timeout = jiffies + (2 * HZ); | 474 | timeout = jiffies + (2 * HZ); |
475 | while (time_before(jiffies, timeout)) { | 475 | while (time_before(jiffies, timeout)) { |
476 | /* Has the boot CPU finished it's STARTUP sequence ? */ | 476 | /* Has the boot CPU finished it's STARTUP sequence ? */ |
477 | if (cpu_isset(cpu_id, cpu_callout_map)) | 477 | if (cpumask_test_cpu(cpu_id, &cpu_callout_map)) |
478 | break; | 478 | break; |
479 | cpu_relax(); | 479 | cpu_relax(); |
480 | } | 480 | } |
@@ -486,7 +486,7 @@ static void __init smp_callin(void) | |||
486 | } | 486 | } |
487 | 487 | ||
488 | /* Allow the master to continue. */ | 488 | /* Allow the master to continue. */ |
489 | cpu_set(cpu_id, cpu_callin_map); | 489 | cpumask_set_cpu(cpu_id, &cpu_callin_map); |
490 | } | 490 | } |
491 | 491 | ||
492 | static void __init smp_online(void) | 492 | static void __init smp_online(void) |
@@ -503,7 +503,7 @@ static void __init smp_online(void) | |||
503 | /* Save our processor parameters */ | 503 | /* Save our processor parameters */ |
504 | smp_store_cpu_info(cpu_id); | 504 | smp_store_cpu_info(cpu_id); |
505 | 505 | ||
506 | cpu_set(cpu_id, cpu_online_map); | 506 | set_cpu_online(cpu_id, true); |
507 | } | 507 | } |
508 | 508 | ||
509 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | 509 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ |
diff --git a/arch/m68k/Kconfig.nommu b/arch/m68k/Kconfig.nommu index 273bccab9517..fc98f9b9d4d2 100644 --- a/arch/m68k/Kconfig.nommu +++ b/arch/m68k/Kconfig.nommu | |||
@@ -2,10 +2,6 @@ config FPU | |||
2 | bool | 2 | bool |
3 | default n | 3 | default n |
4 | 4 | ||
5 | config GENERIC_FIND_NEXT_BIT | ||
6 | bool | ||
7 | default y | ||
8 | |||
9 | config GENERIC_GPIO | 5 | config GENERIC_GPIO |
10 | bool | 6 | bool |
11 | default n | 7 | default n |
diff --git a/arch/m68k/include/asm/bitops_mm.h b/arch/m68k/include/asm/bitops_mm.h index e9020f88a748..89cf5b814a4d 100644 --- a/arch/m68k/include/asm/bitops_mm.h +++ b/arch/m68k/include/asm/bitops_mm.h | |||
@@ -200,6 +200,7 @@ out: | |||
200 | res += ((long)p - (long)vaddr - 4) * 8; | 200 | res += ((long)p - (long)vaddr - 4) * 8; |
201 | return res < size ? res : size; | 201 | return res < size ? res : size; |
202 | } | 202 | } |
203 | #define find_first_zero_bit find_first_zero_bit | ||
203 | 204 | ||
204 | static inline int find_next_zero_bit(const unsigned long *vaddr, int size, | 205 | static inline int find_next_zero_bit(const unsigned long *vaddr, int size, |
205 | int offset) | 206 | int offset) |
@@ -229,6 +230,7 @@ static inline int find_next_zero_bit(const unsigned long *vaddr, int size, | |||
229 | /* No zero yet, search remaining full bytes for a zero */ | 230 | /* No zero yet, search remaining full bytes for a zero */ |
230 | return offset + find_first_zero_bit(p, size - offset); | 231 | return offset + find_first_zero_bit(p, size - offset); |
231 | } | 232 | } |
233 | #define find_next_zero_bit find_next_zero_bit | ||
232 | 234 | ||
233 | static inline int find_first_bit(const unsigned long *vaddr, unsigned size) | 235 | static inline int find_first_bit(const unsigned long *vaddr, unsigned size) |
234 | { | 236 | { |
@@ -253,6 +255,7 @@ out: | |||
253 | res += ((long)p - (long)vaddr - 4) * 8; | 255 | res += ((long)p - (long)vaddr - 4) * 8; |
254 | return res < size ? res : size; | 256 | return res < size ? res : size; |
255 | } | 257 | } |
258 | #define find_first_bit find_first_bit | ||
256 | 259 | ||
257 | static inline int find_next_bit(const unsigned long *vaddr, int size, | 260 | static inline int find_next_bit(const unsigned long *vaddr, int size, |
258 | int offset) | 261 | int offset) |
@@ -282,6 +285,7 @@ static inline int find_next_bit(const unsigned long *vaddr, int size, | |||
282 | /* No one yet, search remaining full bytes for a one */ | 285 | /* No one yet, search remaining full bytes for a one */ |
283 | return offset + find_first_bit(p, size - offset); | 286 | return offset + find_first_bit(p, size - offset); |
284 | } | 287 | } |
288 | #define find_next_bit find_next_bit | ||
285 | 289 | ||
286 | /* | 290 | /* |
287 | * ffz = Find First Zero in word. Undefined if no zero exists, | 291 | * ffz = Find First Zero in word. Undefined if no zero exists, |
@@ -398,6 +402,7 @@ out: | |||
398 | res += (p - addr) * 32; | 402 | res += (p - addr) * 32; |
399 | return res < size ? res : size; | 403 | return res < size ? res : size; |
400 | } | 404 | } |
405 | #define find_first_zero_bit_le find_first_zero_bit_le | ||
401 | 406 | ||
402 | static inline unsigned long find_next_zero_bit_le(const void *addr, | 407 | static inline unsigned long find_next_zero_bit_le(const void *addr, |
403 | unsigned long size, unsigned long offset) | 408 | unsigned long size, unsigned long offset) |
@@ -427,6 +432,7 @@ static inline unsigned long find_next_zero_bit_le(const void *addr, | |||
427 | /* No zero yet, search remaining full bytes for a zero */ | 432 | /* No zero yet, search remaining full bytes for a zero */ |
428 | return offset + find_first_zero_bit_le(p, size - offset); | 433 | return offset + find_first_zero_bit_le(p, size - offset); |
429 | } | 434 | } |
435 | #define find_next_zero_bit_le find_next_zero_bit_le | ||
430 | 436 | ||
431 | static inline int find_first_bit_le(const void *vaddr, unsigned size) | 437 | static inline int find_first_bit_le(const void *vaddr, unsigned size) |
432 | { | 438 | { |
@@ -451,6 +457,7 @@ out: | |||
451 | res += (p - addr) * 32; | 457 | res += (p - addr) * 32; |
452 | return res < size ? res : size; | 458 | return res < size ? res : size; |
453 | } | 459 | } |
460 | #define find_first_bit_le find_first_bit_le | ||
454 | 461 | ||
455 | static inline unsigned long find_next_bit_le(const void *addr, | 462 | static inline unsigned long find_next_bit_le(const void *addr, |
456 | unsigned long size, unsigned long offset) | 463 | unsigned long size, unsigned long offset) |
@@ -480,6 +487,7 @@ static inline unsigned long find_next_bit_le(const void *addr, | |||
480 | /* No set bit yet, search remaining full bytes for a set bit */ | 487 | /* No set bit yet, search remaining full bytes for a set bit */ |
481 | return offset + find_first_bit_le(p, size - offset); | 488 | return offset + find_first_bit_le(p, size - offset); |
482 | } | 489 | } |
490 | #define find_next_bit_le find_next_bit_le | ||
483 | 491 | ||
484 | /* Bitmap functions for the ext2 filesystem. */ | 492 | /* Bitmap functions for the ext2 filesystem. */ |
485 | 493 | ||
diff --git a/arch/m68k/include/asm/bitops_no.h b/arch/m68k/include/asm/bitops_no.h index 6b0e2d349f0e..72e85acdd7bd 100644 --- a/arch/m68k/include/asm/bitops_no.h +++ b/arch/m68k/include/asm/bitops_no.h | |||
@@ -319,6 +319,10 @@ found_first: | |||
319 | found_middle: | 319 | found_middle: |
320 | return result + ffz(__swab32(tmp)); | 320 | return result + ffz(__swab32(tmp)); |
321 | } | 321 | } |
322 | #define find_next_zero_bit_le find_next_zero_bit_le | ||
323 | |||
324 | extern unsigned long find_next_bit_le(const void *addr, | ||
325 | unsigned long size, unsigned long offset); | ||
322 | 326 | ||
323 | #endif /* __KERNEL__ */ | 327 | #endif /* __KERNEL__ */ |
324 | 328 | ||
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index eccdefe70d4e..e446bab2427b 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig | |||
@@ -33,12 +33,6 @@ config ARCH_HAS_ILOG2_U32 | |||
33 | config ARCH_HAS_ILOG2_U64 | 33 | config ARCH_HAS_ILOG2_U64 |
34 | def_bool n | 34 | def_bool n |
35 | 35 | ||
36 | config GENERIC_FIND_NEXT_BIT | ||
37 | def_bool y | ||
38 | |||
39 | config GENERIC_FIND_BIT_LE | ||
40 | def_bool y | ||
41 | |||
42 | config GENERIC_HWEIGHT | 36 | config GENERIC_HWEIGHT |
43 | def_bool y | 37 | def_bool y |
44 | 38 | ||
diff --git a/arch/microblaze/kernel/prom.c b/arch/microblaze/kernel/prom.c index 00ee90f08343..b15cc219b1d9 100644 --- a/arch/microblaze/kernel/prom.c +++ b/arch/microblaze/kernel/prom.c | |||
@@ -130,7 +130,7 @@ void __init early_init_devtree(void *params) | |||
130 | * device-tree, including the platform type, initrd location and | 130 | * device-tree, including the platform type, initrd location and |
131 | * size, TCE reserve, and more ... | 131 | * size, TCE reserve, and more ... |
132 | */ | 132 | */ |
133 | of_scan_flat_dt(early_init_dt_scan_chosen, NULL); | 133 | of_scan_flat_dt(early_init_dt_scan_chosen, cmd_line); |
134 | 134 | ||
135 | /* Scan memory nodes and rebuild MEMBLOCKs */ | 135 | /* Scan memory nodes and rebuild MEMBLOCKs */ |
136 | memblock_init(); | 136 | memblock_init(); |
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index cef1a854487d..653da62d0682 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -821,14 +821,6 @@ config ARCH_SUPPORTS_OPROFILE | |||
821 | bool | 821 | bool |
822 | default y if !MIPS_MT_SMTC | 822 | default y if !MIPS_MT_SMTC |
823 | 823 | ||
824 | config GENERIC_FIND_NEXT_BIT | ||
825 | bool | ||
826 | default y | ||
827 | |||
828 | config GENERIC_FIND_BIT_LE | ||
829 | bool | ||
830 | default y | ||
831 | |||
832 | config GENERIC_HWEIGHT | 824 | config GENERIC_HWEIGHT |
833 | bool | 825 | bool |
834 | default y | 826 | default y |
diff --git a/arch/mips/cavium-octeon/flash_setup.c b/arch/mips/cavium-octeon/flash_setup.c index 008f657116eb..0ee02f5e51cc 100644 --- a/arch/mips/cavium-octeon/flash_setup.c +++ b/arch/mips/cavium-octeon/flash_setup.c | |||
@@ -16,7 +16,6 @@ | |||
16 | 16 | ||
17 | static struct map_info flash_map; | 17 | static struct map_info flash_map; |
18 | static struct mtd_info *mymtd; | 18 | static struct mtd_info *mymtd; |
19 | #ifdef CONFIG_MTD_PARTITIONS | ||
20 | static int nr_parts; | 19 | static int nr_parts; |
21 | static struct mtd_partition *parts; | 20 | static struct mtd_partition *parts; |
22 | static const char *part_probe_types[] = { | 21 | static const char *part_probe_types[] = { |
@@ -26,7 +25,6 @@ static const char *part_probe_types[] = { | |||
26 | #endif | 25 | #endif |
27 | NULL | 26 | NULL |
28 | }; | 27 | }; |
29 | #endif | ||
30 | 28 | ||
31 | /** | 29 | /** |
32 | * Module/ driver initialization. | 30 | * Module/ driver initialization. |
@@ -63,17 +61,10 @@ static int __init flash_init(void) | |||
63 | if (mymtd) { | 61 | if (mymtd) { |
64 | mymtd->owner = THIS_MODULE; | 62 | mymtd->owner = THIS_MODULE; |
65 | 63 | ||
66 | #ifdef CONFIG_MTD_PARTITIONS | ||
67 | nr_parts = parse_mtd_partitions(mymtd, | 64 | nr_parts = parse_mtd_partitions(mymtd, |
68 | part_probe_types, | 65 | part_probe_types, |
69 | &parts, 0); | 66 | &parts, 0); |
70 | if (nr_parts > 0) | 67 | mtd_device_register(mymtd, parts, nr_parts); |
71 | add_mtd_partitions(mymtd, parts, nr_parts); | ||
72 | else | ||
73 | add_mtd_device(mymtd); | ||
74 | #else | ||
75 | add_mtd_device(mymtd); | ||
76 | #endif | ||
77 | } else { | 68 | } else { |
78 | pr_err("Failed to register MTD device for flash\n"); | 69 | pr_err("Failed to register MTD device for flash\n"); |
79 | } | 70 | } |
diff --git a/arch/mips/configs/bcm47xx_defconfig b/arch/mips/configs/bcm47xx_defconfig index 22fdf2f0cc23..ad15fb10322b 100644 --- a/arch/mips/configs/bcm47xx_defconfig +++ b/arch/mips/configs/bcm47xx_defconfig | |||
@@ -16,7 +16,6 @@ CONFIG_TASK_IO_ACCOUNTING=y | |||
16 | CONFIG_AUDIT=y | 16 | CONFIG_AUDIT=y |
17 | CONFIG_TINY_RCU=y | 17 | CONFIG_TINY_RCU=y |
18 | CONFIG_CGROUPS=y | 18 | CONFIG_CGROUPS=y |
19 | CONFIG_CGROUP_NS=y | ||
20 | CONFIG_CGROUP_CPUACCT=y | 19 | CONFIG_CGROUP_CPUACCT=y |
21 | CONFIG_RELAY=y | 20 | CONFIG_RELAY=y |
22 | CONFIG_BLK_DEV_INITRD=y | 21 | CONFIG_BLK_DEV_INITRD=y |
diff --git a/arch/mips/include/asm/prom.h b/arch/mips/include/asm/prom.h index f29b862d9db3..857d9b7858ad 100644 --- a/arch/mips/include/asm/prom.h +++ b/arch/mips/include/asm/prom.h | |||
@@ -14,9 +14,6 @@ | |||
14 | #ifdef CONFIG_OF | 14 | #ifdef CONFIG_OF |
15 | #include <asm/bootinfo.h> | 15 | #include <asm/bootinfo.h> |
16 | 16 | ||
17 | /* which is compatible with the flattened device tree (FDT) */ | ||
18 | #define cmd_line arcs_cmdline | ||
19 | |||
20 | extern int early_init_dt_scan_memory_arch(unsigned long node, | 17 | extern int early_init_dt_scan_memory_arch(unsigned long node, |
21 | const char *uname, int depth, void *data); | 18 | const char *uname, int depth, void *data); |
22 | 19 | ||
diff --git a/arch/mips/include/asm/suspend.h b/arch/mips/include/asm/suspend.h index 294cdb66c5fc..3adac3b53d19 100644 --- a/arch/mips/include/asm/suspend.h +++ b/arch/mips/include/asm/suspend.h | |||
@@ -1,8 +1,6 @@ | |||
1 | #ifndef __ASM_SUSPEND_H | 1 | #ifndef __ASM_SUSPEND_H |
2 | #define __ASM_SUSPEND_H | 2 | #define __ASM_SUSPEND_H |
3 | 3 | ||
4 | static inline int arch_prepare_suspend(void) { return 0; } | ||
5 | |||
6 | /* References to section boundaries */ | 4 | /* References to section boundaries */ |
7 | extern const void __nosave_begin, __nosave_end; | 5 | extern const void __nosave_begin, __nosave_end; |
8 | 6 | ||
diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c index a19811e98a41..5b7eade41fa3 100644 --- a/arch/mips/kernel/prom.c +++ b/arch/mips/kernel/prom.c | |||
@@ -83,7 +83,8 @@ void __init early_init_devtree(void *params) | |||
83 | * device-tree, including the platform type, initrd location and | 83 | * device-tree, including the platform type, initrd location and |
84 | * size, and more ... | 84 | * size, and more ... |
85 | */ | 85 | */ |
86 | of_scan_flat_dt(early_init_dt_scan_chosen, NULL); | 86 | of_scan_flat_dt(early_init_dt_scan_chosen, arcs_cmdline); |
87 | |||
87 | 88 | ||
88 | /* Scan memory nodes */ | 89 | /* Scan memory nodes */ |
89 | of_scan_flat_dt(early_init_dt_scan_root, NULL); | 90 | of_scan_flat_dt(early_init_dt_scan_root, NULL); |
diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index 812816c45662..ec38e00b2559 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c | |||
@@ -639,7 +639,6 @@ void __init txx9_physmap_flash_init(int no, unsigned long addr, | |||
639 | .flags = IORESOURCE_MEM, | 639 | .flags = IORESOURCE_MEM, |
640 | }; | 640 | }; |
641 | struct platform_device *pdev; | 641 | struct platform_device *pdev; |
642 | #ifdef CONFIG_MTD_PARTITIONS | ||
643 | static struct mtd_partition parts[2]; | 642 | static struct mtd_partition parts[2]; |
644 | struct physmap_flash_data pdata_part; | 643 | struct physmap_flash_data pdata_part; |
645 | 644 | ||
@@ -658,7 +657,7 @@ void __init txx9_physmap_flash_init(int no, unsigned long addr, | |||
658 | pdata_part.parts = parts; | 657 | pdata_part.parts = parts; |
659 | pdata = &pdata_part; | 658 | pdata = &pdata_part; |
660 | } | 659 | } |
661 | #endif | 660 | |
662 | pdev = platform_device_alloc("physmap-flash", no); | 661 | pdev = platform_device_alloc("physmap-flash", no); |
663 | if (!pdev || | 662 | if (!pdev || |
664 | platform_device_add_resources(pdev, &res, 1) || | 663 | platform_device_add_resources(pdev, &res, 1) || |
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig index feaf09cc8632..1f870340ebdd 100644 --- a/arch/mn10300/Kconfig +++ b/arch/mn10300/Kconfig | |||
@@ -44,9 +44,6 @@ config GENERIC_CALIBRATE_DELAY | |||
44 | config GENERIC_CMOS_UPDATE | 44 | config GENERIC_CMOS_UPDATE |
45 | def_bool n | 45 | def_bool n |
46 | 46 | ||
47 | config GENERIC_FIND_NEXT_BIT | ||
48 | def_bool y | ||
49 | |||
50 | config GENERIC_HWEIGHT | 47 | config GENERIC_HWEIGHT |
51 | def_bool y | 48 | def_bool y |
52 | 49 | ||
diff --git a/arch/mn10300/configs/asb2364_defconfig b/arch/mn10300/configs/asb2364_defconfig index 31d76261a3d5..fbb96ae3122a 100644 --- a/arch/mn10300/configs/asb2364_defconfig +++ b/arch/mn10300/configs/asb2364_defconfig | |||
@@ -8,7 +8,6 @@ CONFIG_TASK_XACCT=y | |||
8 | CONFIG_TASK_IO_ACCOUNTING=y | 8 | CONFIG_TASK_IO_ACCOUNTING=y |
9 | CONFIG_LOG_BUF_SHIFT=14 | 9 | CONFIG_LOG_BUF_SHIFT=14 |
10 | CONFIG_CGROUPS=y | 10 | CONFIG_CGROUPS=y |
11 | CONFIG_CGROUP_NS=y | ||
12 | CONFIG_CGROUP_FREEZER=y | 11 | CONFIG_CGROUP_FREEZER=y |
13 | CONFIG_CGROUP_DEVICE=y | 12 | CONFIG_CGROUP_DEVICE=y |
14 | CONFIG_CGROUP_CPUACCT=y | 13 | CONFIG_CGROUP_CPUACCT=y |
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig index 69ff049c8571..65adc86a230e 100644 --- a/arch/parisc/Kconfig +++ b/arch/parisc/Kconfig | |||
@@ -47,14 +47,6 @@ config ARCH_HAS_ILOG2_U64 | |||
47 | bool | 47 | bool |
48 | default n | 48 | default n |
49 | 49 | ||
50 | config GENERIC_FIND_NEXT_BIT | ||
51 | bool | ||
52 | default y | ||
53 | |||
54 | config GENERIC_FIND_BIT_LE | ||
55 | bool | ||
56 | default y | ||
57 | |||
58 | config GENERIC_BUG | 50 | config GENERIC_BUG |
59 | bool | 51 | bool |
60 | default y | 52 | default y |
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 423145a6f7ba..2729c6663d8a 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig | |||
@@ -91,14 +91,6 @@ config GENERIC_HWEIGHT | |||
91 | bool | 91 | bool |
92 | default y | 92 | default y |
93 | 93 | ||
94 | config GENERIC_FIND_NEXT_BIT | ||
95 | bool | ||
96 | default y | ||
97 | |||
98 | config GENERIC_FIND_BIT_LE | ||
99 | bool | ||
100 | default y | ||
101 | |||
102 | config GENERIC_GPIO | 94 | config GENERIC_GPIO |
103 | bool | 95 | bool |
104 | help | 96 | help |
@@ -141,6 +133,7 @@ config PPC | |||
141 | select GENERIC_IRQ_SHOW | 133 | select GENERIC_IRQ_SHOW |
142 | select GENERIC_IRQ_SHOW_LEVEL | 134 | select GENERIC_IRQ_SHOW_LEVEL |
143 | select HAVE_RCU_TABLE_FREE if SMP | 135 | select HAVE_RCU_TABLE_FREE if SMP |
136 | select HAVE_SYSCALL_TRACEPOINTS | ||
144 | 137 | ||
145 | config EARLY_PRINTK | 138 | config EARLY_PRINTK |
146 | bool | 139 | bool |
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts index 2779f08313a5..22dd6ae84da0 100644 --- a/arch/powerpc/boot/dts/canyonlands.dts +++ b/arch/powerpc/boot/dts/canyonlands.dts | |||
@@ -530,5 +530,23 @@ | |||
530 | 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */ | 530 | 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */ |
531 | 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>; | 531 | 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>; |
532 | }; | 532 | }; |
533 | |||
534 | MSI: ppc4xx-msi@C10000000 { | ||
535 | compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; | ||
536 | reg = < 0xC 0x10000000 0x100>; | ||
537 | sdr-base = <0x36C>; | ||
538 | msi-data = <0x00000000>; | ||
539 | msi-mask = <0x44440000>; | ||
540 | interrupt-count = <3>; | ||
541 | interrupts = <0 1 2 3>; | ||
542 | interrupt-parent = <&UIC3>; | ||
543 | #interrupt-cells = <1>; | ||
544 | #address-cells = <0>; | ||
545 | #size-cells = <0>; | ||
546 | interrupt-map = <0 &UIC3 0x18 1 | ||
547 | 1 &UIC3 0x19 1 | ||
548 | 2 &UIC3 0x1A 1 | ||
549 | 3 &UIC3 0x1B 1>; | ||
550 | }; | ||
533 | }; | 551 | }; |
534 | }; | 552 | }; |
diff --git a/arch/powerpc/boot/dts/katmai.dts b/arch/powerpc/boot/dts/katmai.dts index 7c3be5e45748..f913dbe25d35 100644 --- a/arch/powerpc/boot/dts/katmai.dts +++ b/arch/powerpc/boot/dts/katmai.dts | |||
@@ -442,6 +442,24 @@ | |||
442 | 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>; | 442 | 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>; |
443 | }; | 443 | }; |
444 | 444 | ||
445 | MSI: ppc4xx-msi@400300000 { | ||
446 | compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; | ||
447 | reg = < 0x4 0x00300000 0x100>; | ||
448 | sdr-base = <0x3B0>; | ||
449 | msi-data = <0x00000000>; | ||
450 | msi-mask = <0x44440000>; | ||
451 | interrupt-count = <3>; | ||
452 | interrupts =<0 1 2 3>; | ||
453 | interrupt-parent = <&UIC0>; | ||
454 | #interrupt-cells = <1>; | ||
455 | #address-cells = <0>; | ||
456 | #size-cells = <0>; | ||
457 | interrupt-map = <0 &UIC0 0xC 1 | ||
458 | 1 &UIC0 0x0D 1 | ||
459 | 2 &UIC0 0x0E 1 | ||
460 | 3 &UIC0 0x0F 1>; | ||
461 | }; | ||
462 | |||
445 | I2O: i2o@400100000 { | 463 | I2O: i2o@400100000 { |
446 | compatible = "ibm,i2o-440spe"; | 464 | compatible = "ibm,i2o-440spe"; |
447 | reg = <0x00000004 0x00100000 0x100>; | 465 | reg = <0x00000004 0x00100000 0x100>; |
diff --git a/arch/powerpc/boot/dts/kilauea.dts b/arch/powerpc/boot/dts/kilauea.dts index 89edb16649c3..1613d6e4049e 100644 --- a/arch/powerpc/boot/dts/kilauea.dts +++ b/arch/powerpc/boot/dts/kilauea.dts | |||
@@ -403,5 +403,33 @@ | |||
403 | 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */ | 403 | 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */ |
404 | 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>; | 404 | 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>; |
405 | }; | 405 | }; |
406 | |||
407 | MSI: ppc4xx-msi@C10000000 { | ||
408 | compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; | ||
409 | reg = < 0x0 0xEF620000 0x100>; | ||
410 | sdr-base = <0x4B0>; | ||
411 | msi-data = <0x00000000>; | ||
412 | msi-mask = <0x44440000>; | ||
413 | interrupt-count = <12>; | ||
414 | interrupts = <0 1 2 3 4 5 6 7 8 9 0xA 0xB 0xC 0xD>; | ||
415 | interrupt-parent = <&UIC2>; | ||
416 | #interrupt-cells = <1>; | ||
417 | #address-cells = <0>; | ||
418 | #size-cells = <0>; | ||
419 | interrupt-map = <0 &UIC2 0x10 1 | ||
420 | 1 &UIC2 0x11 1 | ||
421 | 2 &UIC2 0x12 1 | ||
422 | 2 &UIC2 0x13 1 | ||
423 | 2 &UIC2 0x14 1 | ||
424 | 2 &UIC2 0x15 1 | ||
425 | 2 &UIC2 0x16 1 | ||
426 | 2 &UIC2 0x17 1 | ||
427 | 2 &UIC2 0x18 1 | ||
428 | 2 &UIC2 0x19 1 | ||
429 | 2 &UIC2 0x1A 1 | ||
430 | 2 &UIC2 0x1B 1 | ||
431 | 2 &UIC2 0x1C 1 | ||
432 | 3 &UIC2 0x1D 1>; | ||
433 | }; | ||
406 | }; | 434 | }; |
407 | }; | 435 | }; |
diff --git a/arch/powerpc/boot/dts/redwood.dts b/arch/powerpc/boot/dts/redwood.dts index 81636c01d906..d86a3a498118 100644 --- a/arch/powerpc/boot/dts/redwood.dts +++ b/arch/powerpc/boot/dts/redwood.dts | |||
@@ -358,8 +358,28 @@ | |||
358 | 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>; | 358 | 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>; |
359 | }; | 359 | }; |
360 | 360 | ||
361 | MSI: ppc4xx-msi@400300000 { | ||
362 | compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; | ||
363 | reg = < 0x4 0x00300000 0x100 | ||
364 | 0x4 0x00300000 0x100>; | ||
365 | sdr-base = <0x3B0>; | ||
366 | msi-data = <0x00000000>; | ||
367 | msi-mask = <0x44440000>; | ||
368 | interrupt-count = <3>; | ||
369 | interrupts =<0 1 2 3>; | ||
370 | interrupt-parent = <&UIC0>; | ||
371 | #interrupt-cells = <1>; | ||
372 | #address-cells = <0>; | ||
373 | #size-cells = <0>; | ||
374 | interrupt-map = <0 &UIC0 0xC 1 | ||
375 | 1 &UIC0 0x0D 1 | ||
376 | 2 &UIC0 0x0E 1 | ||
377 | 3 &UIC0 0x0F 1>; | ||
378 | }; | ||
379 | |||
361 | }; | 380 | }; |
362 | 381 | ||
382 | |||
363 | chosen { | 383 | chosen { |
364 | linux,stdout-path = "/plb/opb/serial@ef600200"; | 384 | linux,stdout-path = "/plb/opb/serial@ef600200"; |
365 | }; | 385 | }; |
diff --git a/arch/powerpc/configs/ppc6xx_defconfig b/arch/powerpc/configs/ppc6xx_defconfig index 214208924a9c..04360f9b0109 100644 --- a/arch/powerpc/configs/ppc6xx_defconfig +++ b/arch/powerpc/configs/ppc6xx_defconfig | |||
@@ -10,7 +10,6 @@ CONFIG_TASK_XACCT=y | |||
10 | CONFIG_TASK_IO_ACCOUNTING=y | 10 | CONFIG_TASK_IO_ACCOUNTING=y |
11 | CONFIG_AUDIT=y | 11 | CONFIG_AUDIT=y |
12 | CONFIG_CGROUPS=y | 12 | CONFIG_CGROUPS=y |
13 | CONFIG_CGROUP_NS=y | ||
14 | CONFIG_CGROUP_DEVICE=y | 13 | CONFIG_CGROUP_DEVICE=y |
15 | CONFIG_CGROUP_CPUACCT=y | 14 | CONFIG_CGROUP_CPUACCT=y |
16 | CONFIG_RESOURCE_COUNTERS=y | 15 | CONFIG_RESOURCE_COUNTERS=y |
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig index 7de13865508c..c9f212b5f3de 100644 --- a/arch/powerpc/configs/pseries_defconfig +++ b/arch/powerpc/configs/pseries_defconfig | |||
@@ -15,7 +15,6 @@ CONFIG_AUDITSYSCALL=y | |||
15 | CONFIG_IKCONFIG=y | 15 | CONFIG_IKCONFIG=y |
16 | CONFIG_IKCONFIG_PROC=y | 16 | CONFIG_IKCONFIG_PROC=y |
17 | CONFIG_CGROUPS=y | 17 | CONFIG_CGROUPS=y |
18 | CONFIG_CGROUP_NS=y | ||
19 | CONFIG_CGROUP_FREEZER=y | 18 | CONFIG_CGROUP_FREEZER=y |
20 | CONFIG_CGROUP_DEVICE=y | 19 | CONFIG_CGROUP_DEVICE=y |
21 | CONFIG_CPUSETS=y | 20 | CONFIG_CPUSETS=y |
diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h index 5c1bf3466749..8a0b5ece8f76 100644 --- a/arch/powerpc/include/asm/fsl_lbc.h +++ b/arch/powerpc/include/asm/fsl_lbc.h | |||
@@ -157,6 +157,8 @@ struct fsl_lbc_regs { | |||
157 | #define LBCR_EPAR_SHIFT 16 | 157 | #define LBCR_EPAR_SHIFT 16 |
158 | #define LBCR_BMT 0x0000FF00 | 158 | #define LBCR_BMT 0x0000FF00 |
159 | #define LBCR_BMT_SHIFT 8 | 159 | #define LBCR_BMT_SHIFT 8 |
160 | #define LBCR_BMTPS 0x0000000F | ||
161 | #define LBCR_BMTPS_SHIFT 0 | ||
160 | #define LBCR_INIT 0x00040000 | 162 | #define LBCR_INIT 0x00040000 |
161 | __be32 lcrr; /**< Clock Ratio Register */ | 163 | __be32 lcrr; /**< Clock Ratio Register */ |
162 | #define LCRR_DBYP 0x80000000 | 164 | #define LCRR_DBYP 0x80000000 |
diff --git a/arch/powerpc/include/asm/ftrace.h b/arch/powerpc/include/asm/ftrace.h index dde1296b8b41..169d039ed402 100644 --- a/arch/powerpc/include/asm/ftrace.h +++ b/arch/powerpc/include/asm/ftrace.h | |||
@@ -60,4 +60,18 @@ struct dyn_arch_ftrace { | |||
60 | 60 | ||
61 | #endif | 61 | #endif |
62 | 62 | ||
63 | #if defined(CONFIG_FTRACE_SYSCALLS) && defined(CONFIG_PPC64) && !defined(__ASSEMBLY__) | ||
64 | #define ARCH_HAS_SYSCALL_MATCH_SYM_NAME | ||
65 | static inline bool arch_syscall_match_sym_name(const char *sym, const char *name) | ||
66 | { | ||
67 | /* | ||
68 | * Compare the symbol name with the system call name. Skip the .sys or .SyS | ||
69 | * prefix from the symbol name and the sys prefix from the system call name and | ||
70 | * just match the rest. This is only needed on ppc64 since symbol names on | ||
71 | * 32bit do not start with a period so the generic function will work. | ||
72 | */ | ||
73 | return !strcmp(sym + 4, name + 3); | ||
74 | } | ||
75 | #endif /* CONFIG_FTRACE_SYSCALLS && CONFIG_PPC64 && !__ASSEMBLY__ */ | ||
76 | |||
63 | #endif /* _ASM_POWERPC_FTRACE */ | 77 | #endif /* _ASM_POWERPC_FTRACE */ |
diff --git a/arch/powerpc/include/asm/hvcall.h b/arch/powerpc/include/asm/hvcall.h index 852b8c1c09db..fd8201dddd4b 100644 --- a/arch/powerpc/include/asm/hvcall.h +++ b/arch/powerpc/include/asm/hvcall.h | |||
@@ -236,7 +236,7 @@ | |||
236 | #define H_HOME_NODE_ASSOCIATIVITY 0x2EC | 236 | #define H_HOME_NODE_ASSOCIATIVITY 0x2EC |
237 | #define H_BEST_ENERGY 0x2F4 | 237 | #define H_BEST_ENERGY 0x2F4 |
238 | #define H_GET_MPP_X 0x314 | 238 | #define H_GET_MPP_X 0x314 |
239 | #define MAX_HCALL_OPCODE H_BEST_ENERGY | 239 | #define MAX_HCALL_OPCODE H_GET_MPP_X |
240 | 240 | ||
241 | #ifndef __ASSEMBLY__ | 241 | #ifndef __ASSEMBLY__ |
242 | 242 | ||
diff --git a/arch/powerpc/include/asm/rio.h b/arch/powerpc/include/asm/rio.h index 0018bf80cb25..d902abd33995 100644 --- a/arch/powerpc/include/asm/rio.h +++ b/arch/powerpc/include/asm/rio.h | |||
@@ -14,5 +14,10 @@ | |||
14 | #define ASM_PPC_RIO_H | 14 | #define ASM_PPC_RIO_H |
15 | 15 | ||
16 | extern void platform_rio_init(void); | 16 | extern void platform_rio_init(void); |
17 | #ifdef CONFIG_RAPIDIO | ||
18 | extern int fsl_rio_mcheck_exception(struct pt_regs *); | ||
19 | #else | ||
20 | static inline int fsl_rio_mcheck_exception(struct pt_regs *regs) {return 0; } | ||
21 | #endif | ||
17 | 22 | ||
18 | #endif /* ASM_PPC_RIO_H */ | 23 | #endif /* ASM_PPC_RIO_H */ |
diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h index 880b8c1e6e53..11eb404b5606 100644 --- a/arch/powerpc/include/asm/smp.h +++ b/arch/powerpc/include/asm/smp.h | |||
@@ -191,8 +191,6 @@ extern unsigned long __secondary_hold_spinloop; | |||
191 | extern unsigned long __secondary_hold_acknowledge; | 191 | extern unsigned long __secondary_hold_acknowledge; |
192 | extern char __secondary_hold; | 192 | extern char __secondary_hold; |
193 | 193 | ||
194 | extern irqreturn_t debug_ipi_action(int irq, void *data); | ||
195 | |||
196 | #endif /* __ASSEMBLY__ */ | 194 | #endif /* __ASSEMBLY__ */ |
197 | 195 | ||
198 | #endif /* __KERNEL__ */ | 196 | #endif /* __KERNEL__ */ |
diff --git a/arch/powerpc/include/asm/suspend.h b/arch/powerpc/include/asm/suspend.h deleted file mode 100644 index c6efc3466aa6..000000000000 --- a/arch/powerpc/include/asm/suspend.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ASM_POWERPC_SUSPEND_H | ||
2 | #define __ASM_POWERPC_SUSPEND_H | ||
3 | |||
4 | static inline int arch_prepare_suspend(void) { return 0; } | ||
5 | |||
6 | #endif /* __ASM_POWERPC_SUSPEND_H */ | ||
diff --git a/arch/powerpc/include/asm/syscall.h b/arch/powerpc/include/asm/syscall.h index 23913e902fc3..b54b2add07be 100644 --- a/arch/powerpc/include/asm/syscall.h +++ b/arch/powerpc/include/asm/syscall.h | |||
@@ -15,6 +15,11 @@ | |||
15 | 15 | ||
16 | #include <linux/sched.h> | 16 | #include <linux/sched.h> |
17 | 17 | ||
18 | /* ftrace syscalls requires exporting the sys_call_table */ | ||
19 | #ifdef CONFIG_FTRACE_SYSCALLS | ||
20 | extern const unsigned long *sys_call_table; | ||
21 | #endif /* CONFIG_FTRACE_SYSCALLS */ | ||
22 | |||
18 | static inline long syscall_get_nr(struct task_struct *task, | 23 | static inline long syscall_get_nr(struct task_struct *task, |
19 | struct pt_regs *regs) | 24 | struct pt_regs *regs) |
20 | { | 25 | { |
diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h index 37c353e8af7c..836f231ec1f0 100644 --- a/arch/powerpc/include/asm/thread_info.h +++ b/arch/powerpc/include/asm/thread_info.h | |||
@@ -110,7 +110,8 @@ static inline struct thread_info *current_thread_info(void) | |||
110 | #define TIF_NOERROR 12 /* Force successful syscall return */ | 110 | #define TIF_NOERROR 12 /* Force successful syscall return */ |
111 | #define TIF_NOTIFY_RESUME 13 /* callback before returning to user */ | 111 | #define TIF_NOTIFY_RESUME 13 /* callback before returning to user */ |
112 | #define TIF_FREEZE 14 /* Freezing for suspend */ | 112 | #define TIF_FREEZE 14 /* Freezing for suspend */ |
113 | #define TIF_RUNLATCH 15 /* Is the runlatch enabled? */ | 113 | #define TIF_SYSCALL_TRACEPOINT 15 /* syscall tracepoint instrumentation */ |
114 | #define TIF_RUNLATCH 16 /* Is the runlatch enabled? */ | ||
114 | 115 | ||
115 | /* as above, but as bit values */ | 116 | /* as above, but as bit values */ |
116 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) | 117 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) |
@@ -127,8 +128,10 @@ static inline struct thread_info *current_thread_info(void) | |||
127 | #define _TIF_NOERROR (1<<TIF_NOERROR) | 128 | #define _TIF_NOERROR (1<<TIF_NOERROR) |
128 | #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) | 129 | #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) |
129 | #define _TIF_FREEZE (1<<TIF_FREEZE) | 130 | #define _TIF_FREEZE (1<<TIF_FREEZE) |
131 | #define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT) | ||
130 | #define _TIF_RUNLATCH (1<<TIF_RUNLATCH) | 132 | #define _TIF_RUNLATCH (1<<TIF_RUNLATCH) |
131 | #define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP) | 133 | #define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \ |
134 | _TIF_SECCOMP | _TIF_SYSCALL_TRACEPOINT) | ||
132 | 135 | ||
133 | #define _TIF_USER_WORK_MASK (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \ | 136 | #define _TIF_USER_WORK_MASK (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \ |
134 | _TIF_NOTIFY_RESUME) | 137 | _TIF_NOTIFY_RESUME) |
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile index 9aab36312572..e8b981897d44 100644 --- a/arch/powerpc/kernel/Makefile +++ b/arch/powerpc/kernel/Makefile | |||
@@ -109,6 +109,7 @@ obj-$(CONFIG_PPC_IO_WORKAROUNDS) += io-workarounds.o | |||
109 | 109 | ||
110 | obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o | 110 | obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o |
111 | obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o | 111 | obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o |
112 | obj-$(CONFIG_FTRACE_SYSCALLS) += ftrace.o | ||
112 | obj-$(CONFIG_PERF_EVENTS) += perf_callchain.o | 113 | obj-$(CONFIG_PERF_EVENTS) += perf_callchain.o |
113 | 114 | ||
114 | obj-$(CONFIG_PPC_PERF_CTRS) += perf_event.o | 115 | obj-$(CONFIG_PPC_PERF_CTRS) += perf_event.o |
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c index ce1f3e44c24f..bf99cfa6bbfe 100644 --- a/arch/powerpc/kernel/ftrace.c +++ b/arch/powerpc/kernel/ftrace.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <asm/cacheflush.h> | 22 | #include <asm/cacheflush.h> |
23 | #include <asm/code-patching.h> | 23 | #include <asm/code-patching.h> |
24 | #include <asm/ftrace.h> | 24 | #include <asm/ftrace.h> |
25 | #include <asm/syscall.h> | ||
25 | 26 | ||
26 | 27 | ||
27 | #ifdef CONFIG_DYNAMIC_FTRACE | 28 | #ifdef CONFIG_DYNAMIC_FTRACE |
@@ -600,3 +601,10 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr) | |||
600 | } | 601 | } |
601 | } | 602 | } |
602 | #endif /* CONFIG_FUNCTION_GRAPH_TRACER */ | 603 | #endif /* CONFIG_FUNCTION_GRAPH_TRACER */ |
604 | |||
605 | #if defined(CONFIG_FTRACE_SYSCALLS) && defined(CONFIG_PPC64) | ||
606 | unsigned long __init arch_syscall_addr(int nr) | ||
607 | { | ||
608 | return sys_call_table[nr*2]; | ||
609 | } | ||
610 | #endif /* CONFIG_FTRACE_SYSCALLS && CONFIG_PPC64 */ | ||
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index a24d37d4cf51..5b428e308666 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c | |||
@@ -295,17 +295,20 @@ static inline void handle_one_irq(unsigned int irq) | |||
295 | unsigned long saved_sp_limit; | 295 | unsigned long saved_sp_limit; |
296 | struct irq_desc *desc; | 296 | struct irq_desc *desc; |
297 | 297 | ||
298 | desc = irq_to_desc(irq); | ||
299 | if (!desc) | ||
300 | return; | ||
301 | |||
298 | /* Switch to the irq stack to handle this */ | 302 | /* Switch to the irq stack to handle this */ |
299 | curtp = current_thread_info(); | 303 | curtp = current_thread_info(); |
300 | irqtp = hardirq_ctx[smp_processor_id()]; | 304 | irqtp = hardirq_ctx[smp_processor_id()]; |
301 | 305 | ||
302 | if (curtp == irqtp) { | 306 | if (curtp == irqtp) { |
303 | /* We're already on the irq stack, just handle it */ | 307 | /* We're already on the irq stack, just handle it */ |
304 | generic_handle_irq(irq); | 308 | desc->handle_irq(irq, desc); |
305 | return; | 309 | return; |
306 | } | 310 | } |
307 | 311 | ||
308 | desc = irq_to_desc(irq); | ||
309 | saved_sp_limit = current->thread.ksp_limit; | 312 | saved_sp_limit = current->thread.ksp_limit; |
310 | 313 | ||
311 | irqtp->task = curtp->task; | 314 | irqtp->task = curtp->task; |
@@ -557,15 +560,8 @@ struct irq_host *irq_alloc_host(struct device_node *of_node, | |||
557 | if (revmap_type == IRQ_HOST_MAP_LEGACY) { | 560 | if (revmap_type == IRQ_HOST_MAP_LEGACY) { |
558 | if (irq_map[0].host != NULL) { | 561 | if (irq_map[0].host != NULL) { |
559 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); | 562 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
560 | /* If we are early boot, we can't free the structure, | 563 | of_node_put(host->of_node); |
561 | * too bad... | 564 | kfree(host); |
562 | * this will be fixed once slab is made available early | ||
563 | * instead of the current cruft | ||
564 | */ | ||
565 | if (mem_init_done) { | ||
566 | of_node_put(host->of_node); | ||
567 | kfree(host); | ||
568 | } | ||
569 | return NULL; | 565 | return NULL; |
570 | } | 566 | } |
571 | irq_map[0].host = host; | 567 | irq_map[0].host = host; |
@@ -727,9 +723,7 @@ unsigned int irq_create_mapping(struct irq_host *host, | |||
727 | } | 723 | } |
728 | pr_debug("irq: -> using host @%p\n", host); | 724 | pr_debug("irq: -> using host @%p\n", host); |
729 | 725 | ||
730 | /* Check if mapping already exist, if it does, call | 726 | /* Check if mapping already exists */ |
731 | * host->ops->map() to update the flags | ||
732 | */ | ||
733 | virq = irq_find_mapping(host, hwirq); | 727 | virq = irq_find_mapping(host, hwirq); |
734 | if (virq != NO_IRQ) { | 728 | if (virq != NO_IRQ) { |
735 | pr_debug("irq: -> existing mapping on virq %d\n", virq); | 729 | pr_debug("irq: -> existing mapping on virq %d\n", virq); |
@@ -899,10 +893,13 @@ unsigned int irq_radix_revmap_lookup(struct irq_host *host, | |||
899 | return irq_find_mapping(host, hwirq); | 893 | return irq_find_mapping(host, hwirq); |
900 | 894 | ||
901 | /* | 895 | /* |
902 | * No rcu_read_lock(ing) needed, the ptr returned can't go under us | 896 | * The ptr returned references the static global irq_map. |
903 | * as it's referencing an entry in the static irq_map table. | 897 | * but freeing an irq can delete nodes along the path to |
898 | * do the lookup via call_rcu. | ||
904 | */ | 899 | */ |
900 | rcu_read_lock(); | ||
905 | ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq); | 901 | ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq); |
902 | rcu_read_unlock(); | ||
906 | 903 | ||
907 | /* | 904 | /* |
908 | * If found in radix tree, then fine. | 905 | * If found in radix tree, then fine. |
@@ -1010,14 +1007,23 @@ void irq_free_virt(unsigned int virq, unsigned int count) | |||
1010 | WARN_ON (virq < NUM_ISA_INTERRUPTS); | 1007 | WARN_ON (virq < NUM_ISA_INTERRUPTS); |
1011 | WARN_ON (count == 0 || (virq + count) > irq_virq_count); | 1008 | WARN_ON (count == 0 || (virq + count) > irq_virq_count); |
1012 | 1009 | ||
1010 | if (virq < NUM_ISA_INTERRUPTS) { | ||
1011 | if (virq + count < NUM_ISA_INTERRUPTS) | ||
1012 | return; | ||
1013 | count =- NUM_ISA_INTERRUPTS - virq; | ||
1014 | virq = NUM_ISA_INTERRUPTS; | ||
1015 | } | ||
1016 | |||
1017 | if (count > irq_virq_count || virq > irq_virq_count - count) { | ||
1018 | if (virq > irq_virq_count) | ||
1019 | return; | ||
1020 | count = irq_virq_count - virq; | ||
1021 | } | ||
1022 | |||
1013 | raw_spin_lock_irqsave(&irq_big_lock, flags); | 1023 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
1014 | for (i = virq; i < (virq + count); i++) { | 1024 | for (i = virq; i < (virq + count); i++) { |
1015 | struct irq_host *host; | 1025 | struct irq_host *host; |
1016 | 1026 | ||
1017 | if (i < NUM_ISA_INTERRUPTS || | ||
1018 | (virq + count) > irq_virq_count) | ||
1019 | continue; | ||
1020 | |||
1021 | host = irq_map[i].host; | 1027 | host = irq_map[i].host; |
1022 | irq_map[i].hwirq = host->inval_irq; | 1028 | irq_map[i].hwirq = host->inval_irq; |
1023 | smp_wmb(); | 1029 | smp_wmb(); |
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index 48aeb55faae9..f2c906b1d8d3 100644 --- a/arch/powerpc/kernel/prom.c +++ b/arch/powerpc/kernel/prom.c | |||
@@ -694,7 +694,7 @@ void __init early_init_devtree(void *params) | |||
694 | * device-tree, including the platform type, initrd location and | 694 | * device-tree, including the platform type, initrd location and |
695 | * size, TCE reserve, and more ... | 695 | * size, TCE reserve, and more ... |
696 | */ | 696 | */ |
697 | of_scan_flat_dt(early_init_dt_scan_chosen_ppc, NULL); | 697 | of_scan_flat_dt(early_init_dt_scan_chosen_ppc, cmd_line); |
698 | 698 | ||
699 | /* Scan memory nodes and rebuild MEMBLOCKs */ | 699 | /* Scan memory nodes and rebuild MEMBLOCKs */ |
700 | memblock_init(); | 700 | memblock_init(); |
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c index a6ae1cfad86c..cb22024f2b42 100644 --- a/arch/powerpc/kernel/ptrace.c +++ b/arch/powerpc/kernel/ptrace.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/signal.h> | 29 | #include <linux/signal.h> |
30 | #include <linux/seccomp.h> | 30 | #include <linux/seccomp.h> |
31 | #include <linux/audit.h> | 31 | #include <linux/audit.h> |
32 | #include <trace/syscall.h> | ||
32 | #ifdef CONFIG_PPC32 | 33 | #ifdef CONFIG_PPC32 |
33 | #include <linux/module.h> | 34 | #include <linux/module.h> |
34 | #endif | 35 | #endif |
@@ -40,6 +41,9 @@ | |||
40 | #include <asm/pgtable.h> | 41 | #include <asm/pgtable.h> |
41 | #include <asm/system.h> | 42 | #include <asm/system.h> |
42 | 43 | ||
44 | #define CREATE_TRACE_POINTS | ||
45 | #include <trace/events/syscalls.h> | ||
46 | |||
43 | /* | 47 | /* |
44 | * The parameter save area on the stack is used to store arguments being passed | 48 | * The parameter save area on the stack is used to store arguments being passed |
45 | * to callee function and is located at fixed offset from stack pointer. | 49 | * to callee function and is located at fixed offset from stack pointer. |
@@ -1710,6 +1714,9 @@ long do_syscall_trace_enter(struct pt_regs *regs) | |||
1710 | */ | 1714 | */ |
1711 | ret = -1L; | 1715 | ret = -1L; |
1712 | 1716 | ||
1717 | if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) | ||
1718 | trace_sys_enter(regs, regs->gpr[0]); | ||
1719 | |||
1713 | if (unlikely(current->audit_context)) { | 1720 | if (unlikely(current->audit_context)) { |
1714 | #ifdef CONFIG_PPC64 | 1721 | #ifdef CONFIG_PPC64 |
1715 | if (!is_32bit_task()) | 1722 | if (!is_32bit_task()) |
@@ -1738,6 +1745,9 @@ void do_syscall_trace_leave(struct pt_regs *regs) | |||
1738 | audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS, | 1745 | audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS, |
1739 | regs->result); | 1746 | regs->result); |
1740 | 1747 | ||
1748 | if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) | ||
1749 | trace_sys_exit(regs, regs->result); | ||
1750 | |||
1741 | step = test_thread_flag(TIF_SINGLESTEP); | 1751 | step = test_thread_flag(TIF_SINGLESTEP); |
1742 | if (step || test_thread_flag(TIF_SYSCALL_TRACE)) | 1752 | if (step || test_thread_flag(TIF_SYSCALL_TRACE)) |
1743 | tracehook_report_syscall_exit(regs, step); | 1753 | tracehook_report_syscall_exit(regs, step); |
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 4a6f2ec7e761..8ebc6700b98d 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c | |||
@@ -129,7 +129,7 @@ static irqreturn_t call_function_single_action(int irq, void *data) | |||
129 | return IRQ_HANDLED; | 129 | return IRQ_HANDLED; |
130 | } | 130 | } |
131 | 131 | ||
132 | irqreturn_t debug_ipi_action(int irq, void *data) | 132 | static irqreturn_t debug_ipi_action(int irq, void *data) |
133 | { | 133 | { |
134 | if (crash_ipi_function_ptr) { | 134 | if (crash_ipi_function_ptr) { |
135 | crash_ipi_function_ptr(get_irq_regs()); | 135 | crash_ipi_function_ptr(get_irq_regs()); |
diff --git a/arch/powerpc/kernel/swsusp.c b/arch/powerpc/kernel/swsusp.c index 560c96119501..aa17b76dd427 100644 --- a/arch/powerpc/kernel/swsusp.c +++ b/arch/powerpc/kernel/swsusp.c | |||
@@ -10,7 +10,6 @@ | |||
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/sched.h> | 12 | #include <linux/sched.h> |
13 | #include <asm/suspend.h> | ||
14 | #include <asm/system.h> | 13 | #include <asm/system.h> |
15 | #include <asm/current.h> | 14 | #include <asm/current.h> |
16 | #include <asm/mmu_context.h> | 15 | #include <asm/mmu_context.h> |
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index b13306b0d925..0ff4ab98d50c 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c | |||
@@ -55,6 +55,7 @@ | |||
55 | #endif | 55 | #endif |
56 | #include <asm/kexec.h> | 56 | #include <asm/kexec.h> |
57 | #include <asm/ppc-opcode.h> | 57 | #include <asm/ppc-opcode.h> |
58 | #include <asm/rio.h> | ||
58 | 59 | ||
59 | #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) | 60 | #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) |
60 | int (*__debugger)(struct pt_regs *regs) __read_mostly; | 61 | int (*__debugger)(struct pt_regs *regs) __read_mostly; |
@@ -424,6 +425,12 @@ int machine_check_e500mc(struct pt_regs *regs) | |||
424 | unsigned long reason = mcsr; | 425 | unsigned long reason = mcsr; |
425 | int recoverable = 1; | 426 | int recoverable = 1; |
426 | 427 | ||
428 | if (reason & MCSR_BUS_RBERR) { | ||
429 | recoverable = fsl_rio_mcheck_exception(regs); | ||
430 | if (recoverable == 1) | ||
431 | goto silent_out; | ||
432 | } | ||
433 | |||
427 | printk("Machine check in kernel mode.\n"); | 434 | printk("Machine check in kernel mode.\n"); |
428 | printk("Caused by (from MCSR=%lx): ", reason); | 435 | printk("Caused by (from MCSR=%lx): ", reason); |
429 | 436 | ||
@@ -499,6 +506,7 @@ int machine_check_e500mc(struct pt_regs *regs) | |||
499 | reason & MCSR_MEA ? "Effective" : "Physical", addr); | 506 | reason & MCSR_MEA ? "Effective" : "Physical", addr); |
500 | } | 507 | } |
501 | 508 | ||
509 | silent_out: | ||
502 | mtspr(SPRN_MCSR, mcsr); | 510 | mtspr(SPRN_MCSR, mcsr); |
503 | return mfspr(SPRN_MCSR) == 0 && recoverable; | 511 | return mfspr(SPRN_MCSR) == 0 && recoverable; |
504 | } | 512 | } |
@@ -507,6 +515,11 @@ int machine_check_e500(struct pt_regs *regs) | |||
507 | { | 515 | { |
508 | unsigned long reason = get_mc_reason(regs); | 516 | unsigned long reason = get_mc_reason(regs); |
509 | 517 | ||
518 | if (reason & MCSR_BUS_RBERR) { | ||
519 | if (fsl_rio_mcheck_exception(regs)) | ||
520 | return 1; | ||
521 | } | ||
522 | |||
510 | printk("Machine check in kernel mode.\n"); | 523 | printk("Machine check in kernel mode.\n"); |
511 | printk("Caused by (from MCSR=%lx): ", reason); | 524 | printk("Caused by (from MCSR=%lx): ", reason); |
512 | 525 | ||
diff --git a/arch/powerpc/oprofile/op_model_power4.c b/arch/powerpc/oprofile/op_model_power4.c index 8ee51a252cf1..e6bec74be131 100644 --- a/arch/powerpc/oprofile/op_model_power4.c +++ b/arch/powerpc/oprofile/op_model_power4.c | |||
@@ -261,6 +261,28 @@ static int get_kernel(unsigned long pc, unsigned long mmcra) | |||
261 | return is_kernel; | 261 | return is_kernel; |
262 | } | 262 | } |
263 | 263 | ||
264 | static bool pmc_overflow(unsigned long val) | ||
265 | { | ||
266 | if ((int)val < 0) | ||
267 | return true; | ||
268 | |||
269 | /* | ||
270 | * Events on POWER7 can roll back if a speculative event doesn't | ||
271 | * eventually complete. Unfortunately in some rare cases they will | ||
272 | * raise a performance monitor exception. We need to catch this to | ||
273 | * ensure we reset the PMC. In all cases the PMC will be 256 or less | ||
274 | * cycles from overflow. | ||
275 | * | ||
276 | * We only do this if the first pass fails to find any overflowing | ||
277 | * PMCs because a user might set a period of less than 256 and we | ||
278 | * don't want to mistakenly reset them. | ||
279 | */ | ||
280 | if (__is_processor(PV_POWER7) && ((0x80000000 - val) <= 256)) | ||
281 | return true; | ||
282 | |||
283 | return false; | ||
284 | } | ||
285 | |||
264 | static void power4_handle_interrupt(struct pt_regs *regs, | 286 | static void power4_handle_interrupt(struct pt_regs *regs, |
265 | struct op_counter_config *ctr) | 287 | struct op_counter_config *ctr) |
266 | { | 288 | { |
@@ -281,7 +303,7 @@ static void power4_handle_interrupt(struct pt_regs *regs, | |||
281 | 303 | ||
282 | for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) { | 304 | for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) { |
283 | val = classic_ctr_read(i); | 305 | val = classic_ctr_read(i); |
284 | if (val < 0) { | 306 | if (pmc_overflow(val)) { |
285 | if (oprofile_running && ctr[i].enabled) { | 307 | if (oprofile_running && ctr[i].enabled) { |
286 | oprofile_add_ext_sample(pc, regs, i, is_kernel); | 308 | oprofile_add_ext_sample(pc, regs, i, is_kernel); |
287 | classic_ctr_write(i, reset_value[i]); | 309 | classic_ctr_write(i, reset_value[i]); |
diff --git a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig index b72176434ebe..d733d7ca939c 100644 --- a/arch/powerpc/platforms/40x/Kconfig +++ b/arch/powerpc/platforms/40x/Kconfig | |||
@@ -57,6 +57,8 @@ config KILAUEA | |||
57 | select 405EX | 57 | select 405EX |
58 | select PPC40x_SIMPLE | 58 | select PPC40x_SIMPLE |
59 | select PPC4xx_PCI_EXPRESS | 59 | select PPC4xx_PCI_EXPRESS |
60 | select PCI_MSI | ||
61 | select PPC4xx_MSI | ||
60 | help | 62 | help |
61 | This option enables support for the AMCC PPC405EX evaluation board. | 63 | This option enables support for the AMCC PPC405EX evaluation board. |
62 | 64 | ||
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig index f485fc5f6d5e..e958b6f48ec2 100644 --- a/arch/powerpc/platforms/44x/Kconfig +++ b/arch/powerpc/platforms/44x/Kconfig | |||
@@ -74,6 +74,8 @@ config KATMAI | |||
74 | select 440SPe | 74 | select 440SPe |
75 | select PCI | 75 | select PCI |
76 | select PPC4xx_PCI_EXPRESS | 76 | select PPC4xx_PCI_EXPRESS |
77 | select PCI_MSI | ||
78 | select PCC4xx_MSI | ||
77 | help | 79 | help |
78 | This option enables support for the AMCC PPC440SPe evaluation board. | 80 | This option enables support for the AMCC PPC440SPe evaluation board. |
79 | 81 | ||
@@ -118,6 +120,8 @@ config CANYONLANDS | |||
118 | select 460EX | 120 | select 460EX |
119 | select PCI | 121 | select PCI |
120 | select PPC4xx_PCI_EXPRESS | 122 | select PPC4xx_PCI_EXPRESS |
123 | select PCI_MSI | ||
124 | select PPC4xx_MSI | ||
121 | select IBM_NEW_EMAC_RGMII | 125 | select IBM_NEW_EMAC_RGMII |
122 | select IBM_NEW_EMAC_ZMII | 126 | select IBM_NEW_EMAC_ZMII |
123 | help | 127 | help |
@@ -144,6 +148,8 @@ config REDWOOD | |||
144 | select 460SX | 148 | select 460SX |
145 | select PCI | 149 | select PCI |
146 | select PPC4xx_PCI_EXPRESS | 150 | select PPC4xx_PCI_EXPRESS |
151 | select PCI_MSI | ||
152 | select PPC4xx_MSI | ||
147 | help | 153 | help |
148 | This option enables support for the AMCC PPC460SX Redwood board. | 154 | This option enables support for the AMCC PPC460SX Redwood board. |
149 | 155 | ||
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c index 449c08c15862..3e4eba603e6b 100644 --- a/arch/powerpc/platforms/cell/interrupt.c +++ b/arch/powerpc/platforms/cell/interrupt.c | |||
@@ -176,14 +176,14 @@ EXPORT_SYMBOL_GPL(iic_get_target_id); | |||
176 | #ifdef CONFIG_SMP | 176 | #ifdef CONFIG_SMP |
177 | 177 | ||
178 | /* Use the highest interrupt priorities for IPI */ | 178 | /* Use the highest interrupt priorities for IPI */ |
179 | static inline int iic_ipi_to_irq(int ipi) | 179 | static inline int iic_msg_to_irq(int msg) |
180 | { | 180 | { |
181 | return IIC_IRQ_TYPE_IPI + 0xf - ipi; | 181 | return IIC_IRQ_TYPE_IPI + 0xf - msg; |
182 | } | 182 | } |
183 | 183 | ||
184 | void iic_cause_IPI(int cpu, int mesg) | 184 | void iic_message_pass(int cpu, int msg) |
185 | { | 185 | { |
186 | out_be64(&per_cpu(cpu_iic, cpu).regs->generate, (0xf - mesg) << 4); | 186 | out_be64(&per_cpu(cpu_iic, cpu).regs->generate, (0xf - msg) << 4); |
187 | } | 187 | } |
188 | 188 | ||
189 | struct irq_host *iic_get_irq_host(int node) | 189 | struct irq_host *iic_get_irq_host(int node) |
@@ -192,50 +192,31 @@ struct irq_host *iic_get_irq_host(int node) | |||
192 | } | 192 | } |
193 | EXPORT_SYMBOL_GPL(iic_get_irq_host); | 193 | EXPORT_SYMBOL_GPL(iic_get_irq_host); |
194 | 194 | ||
195 | static irqreturn_t iic_ipi_action(int irq, void *dev_id) | 195 | static void iic_request_ipi(int msg) |
196 | { | ||
197 | int ipi = (int)(long)dev_id; | ||
198 | |||
199 | switch(ipi) { | ||
200 | case PPC_MSG_CALL_FUNCTION: | ||
201 | generic_smp_call_function_interrupt(); | ||
202 | break; | ||
203 | case PPC_MSG_RESCHEDULE: | ||
204 | scheduler_ipi(); | ||
205 | break; | ||
206 | case PPC_MSG_CALL_FUNC_SINGLE: | ||
207 | generic_smp_call_function_single_interrupt(); | ||
208 | break; | ||
209 | case PPC_MSG_DEBUGGER_BREAK: | ||
210 | debug_ipi_action(0, NULL); | ||
211 | break; | ||
212 | } | ||
213 | return IRQ_HANDLED; | ||
214 | } | ||
215 | static void iic_request_ipi(int ipi, const char *name) | ||
216 | { | 196 | { |
217 | int virq; | 197 | int virq; |
218 | 198 | ||
219 | virq = irq_create_mapping(iic_host, iic_ipi_to_irq(ipi)); | 199 | virq = irq_create_mapping(iic_host, iic_msg_to_irq(msg)); |
220 | if (virq == NO_IRQ) { | 200 | if (virq == NO_IRQ) { |
221 | printk(KERN_ERR | 201 | printk(KERN_ERR |
222 | "iic: failed to map IPI %s\n", name); | 202 | "iic: failed to map IPI %s\n", smp_ipi_name[msg]); |
223 | return; | 203 | return; |
224 | } | 204 | } |
225 | if (request_irq(virq, iic_ipi_action, IRQF_DISABLED, name, | 205 | |
226 | (void *)(long)ipi)) | 206 | /* |
227 | printk(KERN_ERR | 207 | * If smp_request_message_ipi encounters an error it will notify |
228 | "iic: failed to request IPI %s\n", name); | 208 | * the error. If a message is not needed it will return non-zero. |
209 | */ | ||
210 | if (smp_request_message_ipi(virq, msg)) | ||
211 | irq_dispose_mapping(virq); | ||
229 | } | 212 | } |
230 | 213 | ||
231 | void iic_request_IPIs(void) | 214 | void iic_request_IPIs(void) |
232 | { | 215 | { |
233 | iic_request_ipi(PPC_MSG_CALL_FUNCTION, "IPI-call"); | 216 | iic_request_ipi(PPC_MSG_CALL_FUNCTION); |
234 | iic_request_ipi(PPC_MSG_RESCHEDULE, "IPI-resched"); | 217 | iic_request_ipi(PPC_MSG_RESCHEDULE); |
235 | iic_request_ipi(PPC_MSG_CALL_FUNC_SINGLE, "IPI-call-single"); | 218 | iic_request_ipi(PPC_MSG_CALL_FUNC_SINGLE); |
236 | #ifdef CONFIG_DEBUGGER | 219 | iic_request_ipi(PPC_MSG_DEBUGGER_BREAK); |
237 | iic_request_ipi(PPC_MSG_DEBUGGER_BREAK, "IPI-debug"); | ||
238 | #endif /* CONFIG_DEBUGGER */ | ||
239 | } | 220 | } |
240 | 221 | ||
241 | #endif /* CONFIG_SMP */ | 222 | #endif /* CONFIG_SMP */ |
diff --git a/arch/powerpc/platforms/cell/interrupt.h b/arch/powerpc/platforms/cell/interrupt.h index 942dc39d6045..4f60ae6ca358 100644 --- a/arch/powerpc/platforms/cell/interrupt.h +++ b/arch/powerpc/platforms/cell/interrupt.h | |||
@@ -75,7 +75,7 @@ enum { | |||
75 | }; | 75 | }; |
76 | 76 | ||
77 | extern void iic_init_IRQ(void); | 77 | extern void iic_init_IRQ(void); |
78 | extern void iic_cause_IPI(int cpu, int mesg); | 78 | extern void iic_message_pass(int cpu, int msg); |
79 | extern void iic_request_IPIs(void); | 79 | extern void iic_request_IPIs(void); |
80 | extern void iic_setup_cpu(void); | 80 | extern void iic_setup_cpu(void); |
81 | 81 | ||
diff --git a/arch/powerpc/platforms/cell/smp.c b/arch/powerpc/platforms/cell/smp.c index d176e6148e3f..dbb641ea90dd 100644 --- a/arch/powerpc/platforms/cell/smp.c +++ b/arch/powerpc/platforms/cell/smp.c | |||
@@ -152,7 +152,7 @@ static int smp_cell_cpu_bootable(unsigned int nr) | |||
152 | return 1; | 152 | return 1; |
153 | } | 153 | } |
154 | static struct smp_ops_t bpa_iic_smp_ops = { | 154 | static struct smp_ops_t bpa_iic_smp_ops = { |
155 | .message_pass = iic_cause_IPI, | 155 | .message_pass = iic_message_pass, |
156 | .probe = smp_iic_probe, | 156 | .probe = smp_iic_probe, |
157 | .kick_cpu = smp_cell_kick_cpu, | 157 | .kick_cpu = smp_cell_kick_cpu, |
158 | .setup_cpu = smp_cell_setup_cpu, | 158 | .setup_cpu = smp_cell_setup_cpu, |
diff --git a/arch/powerpc/sysdev/Kconfig b/arch/powerpc/sysdev/Kconfig index d775fd148d13..7b4df37ac381 100644 --- a/arch/powerpc/sysdev/Kconfig +++ b/arch/powerpc/sysdev/Kconfig | |||
@@ -7,11 +7,18 @@ config PPC4xx_PCI_EXPRESS | |||
7 | depends on PCI && 4xx | 7 | depends on PCI && 4xx |
8 | default n | 8 | default n |
9 | 9 | ||
10 | config PPC4xx_MSI | ||
11 | bool | ||
12 | depends on PCI_MSI | ||
13 | depends on PCI && 4xx | ||
14 | default n | ||
15 | |||
10 | config PPC_MSI_BITMAP | 16 | config PPC_MSI_BITMAP |
11 | bool | 17 | bool |
12 | depends on PCI_MSI | 18 | depends on PCI_MSI |
13 | default y if MPIC | 19 | default y if MPIC |
14 | default y if FSL_PCI | 20 | default y if FSL_PCI |
21 | default y if PPC4xx_MSI | ||
15 | 22 | ||
16 | source "arch/powerpc/sysdev/xics/Kconfig" | 23 | source "arch/powerpc/sysdev/xics/Kconfig" |
17 | 24 | ||
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index 6076e0074a87..0efa990e3344 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile | |||
@@ -41,6 +41,7 @@ obj-$(CONFIG_OF_RTC) += of_rtc.o | |||
41 | ifeq ($(CONFIG_PCI),y) | 41 | ifeq ($(CONFIG_PCI),y) |
42 | obj-$(CONFIG_4xx) += ppc4xx_pci.o | 42 | obj-$(CONFIG_4xx) += ppc4xx_pci.o |
43 | endif | 43 | endif |
44 | obj-$(CONFIG_PPC4xx_MSI) += ppc4xx_msi.o | ||
44 | obj-$(CONFIG_PPC4xx_CPM) += ppc4xx_cpm.o | 45 | obj-$(CONFIG_PPC4xx_CPM) += ppc4xx_cpm.o |
45 | obj-$(CONFIG_PPC4xx_GPIO) += ppc4xx_gpio.o | 46 | obj-$(CONFIG_PPC4xx_GPIO) += ppc4xx_gpio.o |
46 | 47 | ||
diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c index 4fcb5a4e60dd..0608b1657da4 100644 --- a/arch/powerpc/sysdev/fsl_lbc.c +++ b/arch/powerpc/sysdev/fsl_lbc.c | |||
@@ -184,7 +184,8 @@ int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base, u32 mar) | |||
184 | } | 184 | } |
185 | EXPORT_SYMBOL(fsl_upm_run_pattern); | 185 | EXPORT_SYMBOL(fsl_upm_run_pattern); |
186 | 186 | ||
187 | static int __devinit fsl_lbc_ctrl_init(struct fsl_lbc_ctrl *ctrl) | 187 | static int __devinit fsl_lbc_ctrl_init(struct fsl_lbc_ctrl *ctrl, |
188 | struct device_node *node) | ||
188 | { | 189 | { |
189 | struct fsl_lbc_regs __iomem *lbc = ctrl->regs; | 190 | struct fsl_lbc_regs __iomem *lbc = ctrl->regs; |
190 | 191 | ||
@@ -198,6 +199,10 @@ static int __devinit fsl_lbc_ctrl_init(struct fsl_lbc_ctrl *ctrl) | |||
198 | /* Enable interrupts for any detected events */ | 199 | /* Enable interrupts for any detected events */ |
199 | out_be32(&lbc->lteir, LTEIR_ENABLE); | 200 | out_be32(&lbc->lteir, LTEIR_ENABLE); |
200 | 201 | ||
202 | /* Set the monitor timeout value to the maximum for erratum A001 */ | ||
203 | if (of_device_is_compatible(node, "fsl,elbc")) | ||
204 | clrsetbits_be32(&lbc->lbcr, LBCR_BMT, LBCR_BMTPS); | ||
205 | |||
201 | return 0; | 206 | return 0; |
202 | } | 207 | } |
203 | 208 | ||
@@ -304,7 +309,7 @@ static int __devinit fsl_lbc_ctrl_probe(struct platform_device *dev) | |||
304 | 309 | ||
305 | fsl_lbc_ctrl_dev->dev = &dev->dev; | 310 | fsl_lbc_ctrl_dev->dev = &dev->dev; |
306 | 311 | ||
307 | ret = fsl_lbc_ctrl_init(fsl_lbc_ctrl_dev); | 312 | ret = fsl_lbc_ctrl_init(fsl_lbc_ctrl_dev, dev->dev.of_node); |
308 | if (ret < 0) | 313 | if (ret < 0) |
309 | goto err; | 314 | goto err; |
310 | 315 | ||
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c index 49798532b477..5b206a2fe17c 100644 --- a/arch/powerpc/sysdev/fsl_rio.c +++ b/arch/powerpc/sysdev/fsl_rio.c | |||
@@ -10,7 +10,7 @@ | |||
10 | * - Added Port-Write message handling | 10 | * - Added Port-Write message handling |
11 | * - Added Machine Check exception handling | 11 | * - Added Machine Check exception handling |
12 | * | 12 | * |
13 | * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc. | 13 | * Copyright (C) 2007, 2008, 2010 Freescale Semiconductor, Inc. |
14 | * Zhang Wei <wei.zhang@freescale.com> | 14 | * Zhang Wei <wei.zhang@freescale.com> |
15 | * | 15 | * |
16 | * Copyright 2005 MontaVista Software, Inc. | 16 | * Copyright 2005 MontaVista Software, Inc. |
@@ -47,15 +47,33 @@ | |||
47 | #define IRQ_RIO_RX(m) (((struct rio_priv *)(m->priv))->rxirq) | 47 | #define IRQ_RIO_RX(m) (((struct rio_priv *)(m->priv))->rxirq) |
48 | #define IRQ_RIO_PW(m) (((struct rio_priv *)(m->priv))->pwirq) | 48 | #define IRQ_RIO_PW(m) (((struct rio_priv *)(m->priv))->pwirq) |
49 | 49 | ||
50 | #define IPWSR_CLEAR 0x98 | ||
51 | #define OMSR_CLEAR 0x1cb3 | ||
52 | #define IMSR_CLEAR 0x491 | ||
53 | #define IDSR_CLEAR 0x91 | ||
54 | #define ODSR_CLEAR 0x1c00 | ||
55 | #define LTLEECSR_ENABLE_ALL 0xFFC000FC | ||
56 | #define ESCSR_CLEAR 0x07120204 | ||
57 | |||
58 | #define RIO_PORT1_EDCSR 0x0640 | ||
59 | #define RIO_PORT2_EDCSR 0x0680 | ||
60 | #define RIO_PORT1_IECSR 0x10130 | ||
61 | #define RIO_PORT2_IECSR 0x101B0 | ||
62 | #define RIO_IM0SR 0x13064 | ||
63 | #define RIO_IM1SR 0x13164 | ||
64 | #define RIO_OM0SR 0x13004 | ||
65 | #define RIO_OM1SR 0x13104 | ||
66 | |||
50 | #define RIO_ATMU_REGS_OFFSET 0x10c00 | 67 | #define RIO_ATMU_REGS_OFFSET 0x10c00 |
51 | #define RIO_P_MSG_REGS_OFFSET 0x11000 | 68 | #define RIO_P_MSG_REGS_OFFSET 0x11000 |
52 | #define RIO_S_MSG_REGS_OFFSET 0x13000 | 69 | #define RIO_S_MSG_REGS_OFFSET 0x13000 |
53 | #define RIO_GCCSR 0x13c | 70 | #define RIO_GCCSR 0x13c |
54 | #define RIO_ESCSR 0x158 | 71 | #define RIO_ESCSR 0x158 |
72 | #define RIO_PORT2_ESCSR 0x178 | ||
55 | #define RIO_CCSR 0x15c | 73 | #define RIO_CCSR 0x15c |
56 | #define RIO_LTLEDCSR 0x0608 | 74 | #define RIO_LTLEDCSR 0x0608 |
57 | #define RIO_LTLEDCSR_IER 0x80000000 | 75 | #define RIO_LTLEDCSR_IER 0x80000000 |
58 | #define RIO_LTLEDCSR_PRT 0x01000000 | 76 | #define RIO_LTLEDCSR_PRT 0x01000000 |
59 | #define RIO_LTLEECSR 0x060c | 77 | #define RIO_LTLEECSR 0x060c |
60 | #define RIO_EPWISR 0x10010 | 78 | #define RIO_EPWISR 0x10010 |
61 | #define RIO_ISR_AACR 0x10120 | 79 | #define RIO_ISR_AACR 0x10120 |
@@ -88,7 +106,10 @@ | |||
88 | #define RIO_IPWSR_PWD 0x00000008 | 106 | #define RIO_IPWSR_PWD 0x00000008 |
89 | #define RIO_IPWSR_PWB 0x00000004 | 107 | #define RIO_IPWSR_PWB 0x00000004 |
90 | 108 | ||
91 | #define RIO_EPWISR_PINT 0x80000000 | 109 | /* EPWISR Error match value */ |
110 | #define RIO_EPWISR_PINT1 0x80000000 | ||
111 | #define RIO_EPWISR_PINT2 0x40000000 | ||
112 | #define RIO_EPWISR_MU 0x00000002 | ||
92 | #define RIO_EPWISR_PW 0x00000001 | 113 | #define RIO_EPWISR_PW 0x00000001 |
93 | 114 | ||
94 | #define RIO_MSG_DESC_SIZE 32 | 115 | #define RIO_MSG_DESC_SIZE 32 |
@@ -260,9 +281,7 @@ struct rio_priv { | |||
260 | static void __iomem *rio_regs_win; | 281 | static void __iomem *rio_regs_win; |
261 | 282 | ||
262 | #ifdef CONFIG_E500 | 283 | #ifdef CONFIG_E500 |
263 | static int (*saved_mcheck_exception)(struct pt_regs *regs); | 284 | int fsl_rio_mcheck_exception(struct pt_regs *regs) |
264 | |||
265 | static int fsl_rio_mcheck_exception(struct pt_regs *regs) | ||
266 | { | 285 | { |
267 | const struct exception_table_entry *entry = NULL; | 286 | const struct exception_table_entry *entry = NULL; |
268 | unsigned long reason = mfspr(SPRN_MCSR); | 287 | unsigned long reason = mfspr(SPRN_MCSR); |
@@ -284,11 +303,9 @@ static int fsl_rio_mcheck_exception(struct pt_regs *regs) | |||
284 | } | 303 | } |
285 | } | 304 | } |
286 | 305 | ||
287 | if (saved_mcheck_exception) | 306 | return 0; |
288 | return saved_mcheck_exception(regs); | ||
289 | else | ||
290 | return cur_cpu_spec->machine_check(regs); | ||
291 | } | 307 | } |
308 | EXPORT_SYMBOL_GPL(fsl_rio_mcheck_exception); | ||
292 | #endif | 309 | #endif |
293 | 310 | ||
294 | /** | 311 | /** |
@@ -1064,6 +1081,40 @@ static int fsl_rio_doorbell_init(struct rio_mport *mport) | |||
1064 | return rc; | 1081 | return rc; |
1065 | } | 1082 | } |
1066 | 1083 | ||
1084 | static void port_error_handler(struct rio_mport *port, int offset) | ||
1085 | { | ||
1086 | /*XXX: Error recovery is not implemented, we just clear errors */ | ||
1087 | out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), 0); | ||
1088 | |||
1089 | if (offset == 0) { | ||
1090 | out_be32((u32 *)(rio_regs_win + RIO_PORT1_EDCSR), 0); | ||
1091 | out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), 0); | ||
1092 | out_be32((u32 *)(rio_regs_win + RIO_ESCSR), ESCSR_CLEAR); | ||
1093 | } else { | ||
1094 | out_be32((u32 *)(rio_regs_win + RIO_PORT2_EDCSR), 0); | ||
1095 | out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), 0); | ||
1096 | out_be32((u32 *)(rio_regs_win + RIO_PORT2_ESCSR), ESCSR_CLEAR); | ||
1097 | } | ||
1098 | } | ||
1099 | |||
1100 | static void msg_unit_error_handler(struct rio_mport *port) | ||
1101 | { | ||
1102 | struct rio_priv *priv = port->priv; | ||
1103 | |||
1104 | /*XXX: Error recovery is not implemented, we just clear errors */ | ||
1105 | out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), 0); | ||
1106 | |||
1107 | out_be32((u32 *)(rio_regs_win + RIO_IM0SR), IMSR_CLEAR); | ||
1108 | out_be32((u32 *)(rio_regs_win + RIO_IM1SR), IMSR_CLEAR); | ||
1109 | out_be32((u32 *)(rio_regs_win + RIO_OM0SR), OMSR_CLEAR); | ||
1110 | out_be32((u32 *)(rio_regs_win + RIO_OM1SR), OMSR_CLEAR); | ||
1111 | |||
1112 | out_be32(&priv->msg_regs->odsr, ODSR_CLEAR); | ||
1113 | out_be32(&priv->msg_regs->dsr, IDSR_CLEAR); | ||
1114 | |||
1115 | out_be32(&priv->msg_regs->pwsr, IPWSR_CLEAR); | ||
1116 | } | ||
1117 | |||
1067 | /** | 1118 | /** |
1068 | * fsl_rio_port_write_handler - MPC85xx port write interrupt handler | 1119 | * fsl_rio_port_write_handler - MPC85xx port write interrupt handler |
1069 | * @irq: Linux interrupt number | 1120 | * @irq: Linux interrupt number |
@@ -1144,10 +1195,22 @@ fsl_rio_port_write_handler(int irq, void *dev_instance) | |||
1144 | } | 1195 | } |
1145 | 1196 | ||
1146 | pw_done: | 1197 | pw_done: |
1147 | if (epwisr & RIO_EPWISR_PINT) { | 1198 | if (epwisr & RIO_EPWISR_PINT1) { |
1199 | tmp = in_be32(priv->regs_win + RIO_LTLEDCSR); | ||
1200 | pr_debug("RIO_LTLEDCSR = 0x%x\n", tmp); | ||
1201 | port_error_handler(port, 0); | ||
1202 | } | ||
1203 | |||
1204 | if (epwisr & RIO_EPWISR_PINT2) { | ||
1148 | tmp = in_be32(priv->regs_win + RIO_LTLEDCSR); | 1205 | tmp = in_be32(priv->regs_win + RIO_LTLEDCSR); |
1149 | pr_debug("RIO_LTLEDCSR = 0x%x\n", tmp); | 1206 | pr_debug("RIO_LTLEDCSR = 0x%x\n", tmp); |
1150 | out_be32(priv->regs_win + RIO_LTLEDCSR, 0); | 1207 | port_error_handler(port, 1); |
1208 | } | ||
1209 | |||
1210 | if (epwisr & RIO_EPWISR_MU) { | ||
1211 | tmp = in_be32(priv->regs_win + RIO_LTLEDCSR); | ||
1212 | pr_debug("RIO_LTLEDCSR = 0x%x\n", tmp); | ||
1213 | msg_unit_error_handler(port); | ||
1151 | } | 1214 | } |
1152 | 1215 | ||
1153 | return IRQ_HANDLED; | 1216 | return IRQ_HANDLED; |
@@ -1258,12 +1321,14 @@ static int fsl_rio_port_write_init(struct rio_mport *mport) | |||
1258 | 1321 | ||
1259 | 1322 | ||
1260 | /* Hook up port-write handler */ | 1323 | /* Hook up port-write handler */ |
1261 | rc = request_irq(IRQ_RIO_PW(mport), fsl_rio_port_write_handler, 0, | 1324 | rc = request_irq(IRQ_RIO_PW(mport), fsl_rio_port_write_handler, |
1262 | "port-write", (void *)mport); | 1325 | IRQF_SHARED, "port-write", (void *)mport); |
1263 | if (rc < 0) { | 1326 | if (rc < 0) { |
1264 | pr_err("MPC85xx RIO: unable to request inbound doorbell irq"); | 1327 | pr_err("MPC85xx RIO: unable to request inbound doorbell irq"); |
1265 | goto err_out; | 1328 | goto err_out; |
1266 | } | 1329 | } |
1330 | /* Enable Error Interrupt */ | ||
1331 | out_be32((u32 *)(rio_regs_win + RIO_LTLEECSR), LTLEECSR_ENABLE_ALL); | ||
1267 | 1332 | ||
1268 | INIT_WORK(&priv->pw_work, fsl_pw_dpc); | 1333 | INIT_WORK(&priv->pw_work, fsl_pw_dpc); |
1269 | spin_lock_init(&priv->pw_fifo_lock); | 1334 | spin_lock_init(&priv->pw_fifo_lock); |
@@ -1538,11 +1603,6 @@ int fsl_rio_setup(struct platform_device *dev) | |||
1538 | fsl_rio_doorbell_init(port); | 1603 | fsl_rio_doorbell_init(port); |
1539 | fsl_rio_port_write_init(port); | 1604 | fsl_rio_port_write_init(port); |
1540 | 1605 | ||
1541 | #ifdef CONFIG_E500 | ||
1542 | saved_mcheck_exception = ppc_md.machine_check_exception; | ||
1543 | ppc_md.machine_check_exception = fsl_rio_mcheck_exception; | ||
1544 | #endif | ||
1545 | |||
1546 | return 0; | 1606 | return 0; |
1547 | err: | 1607 | err: |
1548 | iounmap(priv->regs_win); | 1608 | iounmap(priv->regs_win); |
diff --git a/arch/powerpc/sysdev/ppc4xx_msi.c b/arch/powerpc/sysdev/ppc4xx_msi.c new file mode 100644 index 000000000000..367af0241851 --- /dev/null +++ b/arch/powerpc/sysdev/ppc4xx_msi.c | |||
@@ -0,0 +1,276 @@ | |||
1 | /* | ||
2 | * Adding PCI-E MSI support for PPC4XX SoCs. | ||
3 | * | ||
4 | * Copyright (c) 2010, Applied Micro Circuits Corporation | ||
5 | * Authors: Tirumala R Marri <tmarri@apm.com> | ||
6 | * Feng Kan <fkan@apm.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License as | ||
10 | * published by the Free Software Foundation; either version 2 of | ||
11 | * the License, or (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | ||
21 | * MA 02111-1307 USA | ||
22 | */ | ||
23 | |||
24 | #include <linux/irq.h> | ||
25 | #include <linux/bootmem.h> | ||
26 | #include <linux/pci.h> | ||
27 | #include <linux/msi.h> | ||
28 | #include <linux/of_platform.h> | ||
29 | #include <linux/interrupt.h> | ||
30 | #include <asm/prom.h> | ||
31 | #include <asm/hw_irq.h> | ||
32 | #include <asm/ppc-pci.h> | ||
33 | #include <boot/dcr.h> | ||
34 | #include <asm/dcr-regs.h> | ||
35 | #include <asm/msi_bitmap.h> | ||
36 | |||
37 | #define PEIH_TERMADH 0x00 | ||
38 | #define PEIH_TERMADL 0x08 | ||
39 | #define PEIH_MSIED 0x10 | ||
40 | #define PEIH_MSIMK 0x18 | ||
41 | #define PEIH_MSIASS 0x20 | ||
42 | #define PEIH_FLUSH0 0x30 | ||
43 | #define PEIH_FLUSH1 0x38 | ||
44 | #define PEIH_CNTRST 0x48 | ||
45 | #define NR_MSI_IRQS 4 | ||
46 | |||
47 | struct ppc4xx_msi { | ||
48 | u32 msi_addr_lo; | ||
49 | u32 msi_addr_hi; | ||
50 | void __iomem *msi_regs; | ||
51 | int msi_virqs[NR_MSI_IRQS]; | ||
52 | struct msi_bitmap bitmap; | ||
53 | struct device_node *msi_dev; | ||
54 | }; | ||
55 | |||
56 | static struct ppc4xx_msi ppc4xx_msi; | ||
57 | |||
58 | static int ppc4xx_msi_init_allocator(struct platform_device *dev, | ||
59 | struct ppc4xx_msi *msi_data) | ||
60 | { | ||
61 | int err; | ||
62 | |||
63 | err = msi_bitmap_alloc(&msi_data->bitmap, NR_MSI_IRQS, | ||
64 | dev->dev.of_node); | ||
65 | if (err) | ||
66 | return err; | ||
67 | |||
68 | err = msi_bitmap_reserve_dt_hwirqs(&msi_data->bitmap); | ||
69 | if (err < 0) { | ||
70 | msi_bitmap_free(&msi_data->bitmap); | ||
71 | return err; | ||
72 | } | ||
73 | |||
74 | return 0; | ||
75 | } | ||
76 | |||
77 | static int ppc4xx_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | ||
78 | { | ||
79 | int int_no = -ENOMEM; | ||
80 | unsigned int virq; | ||
81 | struct msi_msg msg; | ||
82 | struct msi_desc *entry; | ||
83 | struct ppc4xx_msi *msi_data = &ppc4xx_msi; | ||
84 | |||
85 | list_for_each_entry(entry, &dev->msi_list, list) { | ||
86 | int_no = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1); | ||
87 | if (int_no >= 0) | ||
88 | break; | ||
89 | if (int_no < 0) { | ||
90 | pr_debug("%s: fail allocating msi interrupt\n", | ||
91 | __func__); | ||
92 | } | ||
93 | virq = irq_of_parse_and_map(msi_data->msi_dev, int_no); | ||
94 | if (virq == NO_IRQ) { | ||
95 | dev_err(&dev->dev, "%s: fail mapping irq\n", __func__); | ||
96 | msi_bitmap_free_hwirqs(&msi_data->bitmap, int_no, 1); | ||
97 | return -ENOSPC; | ||
98 | } | ||
99 | dev_dbg(&dev->dev, "%s: virq = %d\n", __func__, virq); | ||
100 | |||
101 | /* Setup msi address space */ | ||
102 | msg.address_hi = msi_data->msi_addr_hi; | ||
103 | msg.address_lo = msi_data->msi_addr_lo; | ||
104 | |||
105 | irq_set_msi_desc(virq, entry); | ||
106 | msg.data = int_no; | ||
107 | write_msi_msg(virq, &msg); | ||
108 | } | ||
109 | return 0; | ||
110 | } | ||
111 | |||
112 | void ppc4xx_teardown_msi_irqs(struct pci_dev *dev) | ||
113 | { | ||
114 | struct msi_desc *entry; | ||
115 | struct ppc4xx_msi *msi_data = &ppc4xx_msi; | ||
116 | |||
117 | dev_dbg(&dev->dev, "PCIE-MSI: tearing down msi irqs\n"); | ||
118 | |||
119 | list_for_each_entry(entry, &dev->msi_list, list) { | ||
120 | if (entry->irq == NO_IRQ) | ||
121 | continue; | ||
122 | irq_set_msi_desc(entry->irq, NULL); | ||
123 | msi_bitmap_free_hwirqs(&msi_data->bitmap, | ||
124 | virq_to_hw(entry->irq), 1); | ||
125 | irq_dispose_mapping(entry->irq); | ||
126 | } | ||
127 | } | ||
128 | |||
129 | static int ppc4xx_msi_check_device(struct pci_dev *pdev, int nvec, int type) | ||
130 | { | ||
131 | dev_dbg(&pdev->dev, "PCIE-MSI:%s called. vec %x type %d\n", | ||
132 | __func__, nvec, type); | ||
133 | if (type == PCI_CAP_ID_MSIX) | ||
134 | pr_debug("ppc4xx msi: MSI-X untested, trying anyway.\n"); | ||
135 | |||
136 | return 0; | ||
137 | } | ||
138 | |||
139 | static int ppc4xx_setup_pcieh_hw(struct platform_device *dev, | ||
140 | struct resource res, struct ppc4xx_msi *msi) | ||
141 | { | ||
142 | const u32 *msi_data; | ||
143 | const u32 *msi_mask; | ||
144 | const u32 *sdr_addr; | ||
145 | dma_addr_t msi_phys; | ||
146 | void *msi_virt; | ||
147 | |||
148 | sdr_addr = of_get_property(dev->dev.of_node, "sdr-base", NULL); | ||
149 | if (!sdr_addr) | ||
150 | return -1; | ||
151 | |||
152 | SDR0_WRITE(sdr_addr, (u64)res.start >> 32); /*HIGH addr */ | ||
153 | SDR0_WRITE(sdr_addr + 1, res.start & 0xFFFFFFFF); /* Low addr */ | ||
154 | |||
155 | |||
156 | msi->msi_dev = of_find_node_by_name(NULL, "ppc4xx-msi"); | ||
157 | if (msi->msi_dev) | ||
158 | return -ENODEV; | ||
159 | |||
160 | msi->msi_regs = of_iomap(msi->msi_dev, 0); | ||
161 | if (!msi->msi_regs) { | ||
162 | dev_err(&dev->dev, "of_iomap problem failed\n"); | ||
163 | return -ENOMEM; | ||
164 | } | ||
165 | dev_dbg(&dev->dev, "PCIE-MSI: msi register mapped 0x%x 0x%x\n", | ||
166 | (u32) (msi->msi_regs + PEIH_TERMADH), (u32) (msi->msi_regs)); | ||
167 | |||
168 | msi_virt = dma_alloc_coherent(&dev->dev, 64, &msi_phys, GFP_KERNEL); | ||
169 | msi->msi_addr_hi = 0x0; | ||
170 | msi->msi_addr_lo = (u32) msi_phys; | ||
171 | dev_dbg(&dev->dev, "PCIE-MSI: msi address 0x%x\n", msi->msi_addr_lo); | ||
172 | |||
173 | /* Progam the Interrupt handler Termination addr registers */ | ||
174 | out_be32(msi->msi_regs + PEIH_TERMADH, msi->msi_addr_hi); | ||
175 | out_be32(msi->msi_regs + PEIH_TERMADL, msi->msi_addr_lo); | ||
176 | |||
177 | msi_data = of_get_property(dev->dev.of_node, "msi-data", NULL); | ||
178 | if (!msi_data) | ||
179 | return -1; | ||
180 | msi_mask = of_get_property(dev->dev.of_node, "msi-mask", NULL); | ||
181 | if (!msi_mask) | ||
182 | return -1; | ||
183 | /* Program MSI Expected data and Mask bits */ | ||
184 | out_be32(msi->msi_regs + PEIH_MSIED, *msi_data); | ||
185 | out_be32(msi->msi_regs + PEIH_MSIMK, *msi_mask); | ||
186 | |||
187 | return 0; | ||
188 | } | ||
189 | |||
190 | static int ppc4xx_of_msi_remove(struct platform_device *dev) | ||
191 | { | ||
192 | struct ppc4xx_msi *msi = dev->dev.platform_data; | ||
193 | int i; | ||
194 | int virq; | ||
195 | |||
196 | for (i = 0; i < NR_MSI_IRQS; i++) { | ||
197 | virq = msi->msi_virqs[i]; | ||
198 | if (virq != NO_IRQ) | ||
199 | irq_dispose_mapping(virq); | ||
200 | } | ||
201 | |||
202 | if (msi->bitmap.bitmap) | ||
203 | msi_bitmap_free(&msi->bitmap); | ||
204 | iounmap(msi->msi_regs); | ||
205 | of_node_put(msi->msi_dev); | ||
206 | kfree(msi); | ||
207 | |||
208 | return 0; | ||
209 | } | ||
210 | |||
211 | static int __devinit ppc4xx_msi_probe(struct platform_device *dev) | ||
212 | { | ||
213 | struct ppc4xx_msi *msi; | ||
214 | struct resource res; | ||
215 | int err = 0; | ||
216 | |||
217 | msi = &ppc4xx_msi;/*keep the msi data for further use*/ | ||
218 | |||
219 | dev_dbg(&dev->dev, "PCIE-MSI: Setting up MSI support...\n"); | ||
220 | |||
221 | msi = kzalloc(sizeof(struct ppc4xx_msi), GFP_KERNEL); | ||
222 | if (!msi) { | ||
223 | dev_err(&dev->dev, "No memory for MSI structure\n"); | ||
224 | return -ENOMEM; | ||
225 | } | ||
226 | dev->dev.platform_data = msi; | ||
227 | |||
228 | /* Get MSI ranges */ | ||
229 | err = of_address_to_resource(dev->dev.of_node, 0, &res); | ||
230 | if (err) { | ||
231 | dev_err(&dev->dev, "%s resource error!\n", | ||
232 | dev->dev.of_node->full_name); | ||
233 | goto error_out; | ||
234 | } | ||
235 | |||
236 | if (ppc4xx_setup_pcieh_hw(dev, res, msi)) | ||
237 | goto error_out; | ||
238 | |||
239 | err = ppc4xx_msi_init_allocator(dev, msi); | ||
240 | if (err) { | ||
241 | dev_err(&dev->dev, "Error allocating MSI bitmap\n"); | ||
242 | goto error_out; | ||
243 | } | ||
244 | |||
245 | ppc_md.setup_msi_irqs = ppc4xx_setup_msi_irqs; | ||
246 | ppc_md.teardown_msi_irqs = ppc4xx_teardown_msi_irqs; | ||
247 | ppc_md.msi_check_device = ppc4xx_msi_check_device; | ||
248 | return err; | ||
249 | |||
250 | error_out: | ||
251 | ppc4xx_of_msi_remove(dev); | ||
252 | return err; | ||
253 | } | ||
254 | static const struct of_device_id ppc4xx_msi_ids[] = { | ||
255 | { | ||
256 | .compatible = "amcc,ppc4xx-msi", | ||
257 | }, | ||
258 | {} | ||
259 | }; | ||
260 | static struct platform_driver ppc4xx_msi_driver = { | ||
261 | .probe = ppc4xx_msi_probe, | ||
262 | .remove = ppc4xx_of_msi_remove, | ||
263 | .driver = { | ||
264 | .name = "ppc4xx-msi", | ||
265 | .owner = THIS_MODULE, | ||
266 | .of_match_table = ppc4xx_msi_ids, | ||
267 | }, | ||
268 | |||
269 | }; | ||
270 | |||
271 | static __init int ppc4xx_msi_init(void) | ||
272 | { | ||
273 | return platform_driver_register(&ppc4xx_msi_driver); | ||
274 | } | ||
275 | |||
276 | subsys_initcall(ppc4xx_msi_init); | ||
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig index ff2d2371b2e9..9fab2aa9c2c8 100644 --- a/arch/s390/Kconfig +++ b/arch/s390/Kconfig | |||
@@ -2,7 +2,7 @@ config MMU | |||
2 | def_bool y | 2 | def_bool y |
3 | 3 | ||
4 | config ZONE_DMA | 4 | config ZONE_DMA |
5 | def_bool y if 64BIT | 5 | def_bool y |
6 | 6 | ||
7 | config LOCKDEP_SUPPORT | 7 | config LOCKDEP_SUPPORT |
8 | def_bool y | 8 | def_bool y |
diff --git a/arch/s390/appldata/appldata_mem.c b/arch/s390/appldata/appldata_mem.c index e43fe7537031..f7d3dc555bdb 100644 --- a/arch/s390/appldata/appldata_mem.c +++ b/arch/s390/appldata/appldata_mem.c | |||
@@ -92,9 +92,7 @@ static void appldata_get_mem_data(void *data) | |||
92 | mem_data->pswpin = ev[PSWPIN]; | 92 | mem_data->pswpin = ev[PSWPIN]; |
93 | mem_data->pswpout = ev[PSWPOUT]; | 93 | mem_data->pswpout = ev[PSWPOUT]; |
94 | mem_data->pgalloc = ev[PGALLOC_NORMAL]; | 94 | mem_data->pgalloc = ev[PGALLOC_NORMAL]; |
95 | #ifdef CONFIG_ZONE_DMA | ||
96 | mem_data->pgalloc += ev[PGALLOC_DMA]; | 95 | mem_data->pgalloc += ev[PGALLOC_DMA]; |
97 | #endif | ||
98 | mem_data->pgfault = ev[PGFAULT]; | 96 | mem_data->pgfault = ev[PGFAULT]; |
99 | mem_data->pgmajfault = ev[PGMAJFAULT]; | 97 | mem_data->pgmajfault = ev[PGMAJFAULT]; |
100 | 98 | ||
diff --git a/arch/s390/include/asm/bitops.h b/arch/s390/include/asm/bitops.h index e1c8f3a49884..667c6e9f6a34 100644 --- a/arch/s390/include/asm/bitops.h +++ b/arch/s390/include/asm/bitops.h | |||
@@ -621,6 +621,7 @@ static inline unsigned long find_first_zero_bit(const unsigned long *addr, | |||
621 | bits = __ffz_word(bytes*8, __load_ulong_be(addr, bytes)); | 621 | bits = __ffz_word(bytes*8, __load_ulong_be(addr, bytes)); |
622 | return (bits < size) ? bits : size; | 622 | return (bits < size) ? bits : size; |
623 | } | 623 | } |
624 | #define find_first_zero_bit find_first_zero_bit | ||
624 | 625 | ||
625 | /** | 626 | /** |
626 | * find_first_bit - find the first set bit in a memory region | 627 | * find_first_bit - find the first set bit in a memory region |
@@ -641,6 +642,7 @@ static inline unsigned long find_first_bit(const unsigned long * addr, | |||
641 | bits = __ffs_word(bytes*8, __load_ulong_be(addr, bytes)); | 642 | bits = __ffs_word(bytes*8, __load_ulong_be(addr, bytes)); |
642 | return (bits < size) ? bits : size; | 643 | return (bits < size) ? bits : size; |
643 | } | 644 | } |
645 | #define find_first_bit find_first_bit | ||
644 | 646 | ||
645 | /** | 647 | /** |
646 | * find_next_zero_bit - find the first zero bit in a memory region | 648 | * find_next_zero_bit - find the first zero bit in a memory region |
@@ -677,6 +679,7 @@ static inline int find_next_zero_bit (const unsigned long * addr, | |||
677 | } | 679 | } |
678 | return offset + find_first_zero_bit(p, size); | 680 | return offset + find_first_zero_bit(p, size); |
679 | } | 681 | } |
682 | #define find_next_zero_bit find_next_zero_bit | ||
680 | 683 | ||
681 | /** | 684 | /** |
682 | * find_next_bit - find the first set bit in a memory region | 685 | * find_next_bit - find the first set bit in a memory region |
@@ -713,6 +716,7 @@ static inline int find_next_bit (const unsigned long * addr, | |||
713 | } | 716 | } |
714 | return offset + find_first_bit(p, size); | 717 | return offset + find_first_bit(p, size); |
715 | } | 718 | } |
719 | #define find_next_bit find_next_bit | ||
716 | 720 | ||
717 | /* | 721 | /* |
718 | * Every architecture must define this function. It's the fastest | 722 | * Every architecture must define this function. It's the fastest |
@@ -742,41 +746,6 @@ static inline int sched_find_first_bit(unsigned long *b) | |||
742 | * 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24 | 746 | * 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24 |
743 | */ | 747 | */ |
744 | 748 | ||
745 | static inline void __set_bit_le(unsigned long nr, void *addr) | ||
746 | { | ||
747 | __set_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr); | ||
748 | } | ||
749 | |||
750 | static inline void __clear_bit_le(unsigned long nr, void *addr) | ||
751 | { | ||
752 | __clear_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr); | ||
753 | } | ||
754 | |||
755 | static inline int __test_and_set_bit_le(unsigned long nr, void *addr) | ||
756 | { | ||
757 | return __test_and_set_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr); | ||
758 | } | ||
759 | |||
760 | static inline int test_and_set_bit_le(unsigned long nr, void *addr) | ||
761 | { | ||
762 | return test_and_set_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr); | ||
763 | } | ||
764 | |||
765 | static inline int __test_and_clear_bit_le(unsigned long nr, void *addr) | ||
766 | { | ||
767 | return __test_and_clear_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr); | ||
768 | } | ||
769 | |||
770 | static inline int test_and_clear_bit_le(unsigned long nr, void *addr) | ||
771 | { | ||
772 | return test_and_clear_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr); | ||
773 | } | ||
774 | |||
775 | static inline int test_bit_le(unsigned long nr, const void *addr) | ||
776 | { | ||
777 | return test_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr); | ||
778 | } | ||
779 | |||
780 | static inline int find_first_zero_bit_le(void *vaddr, unsigned int size) | 749 | static inline int find_first_zero_bit_le(void *vaddr, unsigned int size) |
781 | { | 750 | { |
782 | unsigned long bytes, bits; | 751 | unsigned long bytes, bits; |
@@ -787,6 +756,7 @@ static inline int find_first_zero_bit_le(void *vaddr, unsigned int size) | |||
787 | bits = __ffz_word(bytes*8, __load_ulong_le(vaddr, bytes)); | 756 | bits = __ffz_word(bytes*8, __load_ulong_le(vaddr, bytes)); |
788 | return (bits < size) ? bits : size; | 757 | return (bits < size) ? bits : size; |
789 | } | 758 | } |
759 | #define find_first_zero_bit_le find_first_zero_bit_le | ||
790 | 760 | ||
791 | static inline int find_next_zero_bit_le(void *vaddr, unsigned long size, | 761 | static inline int find_next_zero_bit_le(void *vaddr, unsigned long size, |
792 | unsigned long offset) | 762 | unsigned long offset) |
@@ -816,6 +786,7 @@ static inline int find_next_zero_bit_le(void *vaddr, unsigned long size, | |||
816 | } | 786 | } |
817 | return offset + find_first_zero_bit_le(p, size); | 787 | return offset + find_first_zero_bit_le(p, size); |
818 | } | 788 | } |
789 | #define find_next_zero_bit_le find_next_zero_bit_le | ||
819 | 790 | ||
820 | static inline unsigned long find_first_bit_le(void *vaddr, unsigned long size) | 791 | static inline unsigned long find_first_bit_le(void *vaddr, unsigned long size) |
821 | { | 792 | { |
@@ -827,6 +798,7 @@ static inline unsigned long find_first_bit_le(void *vaddr, unsigned long size) | |||
827 | bits = __ffs_word(bytes*8, __load_ulong_le(vaddr, bytes)); | 798 | bits = __ffs_word(bytes*8, __load_ulong_le(vaddr, bytes)); |
828 | return (bits < size) ? bits : size; | 799 | return (bits < size) ? bits : size; |
829 | } | 800 | } |
801 | #define find_first_bit_le find_first_bit_le | ||
830 | 802 | ||
831 | static inline int find_next_bit_le(void *vaddr, unsigned long size, | 803 | static inline int find_next_bit_le(void *vaddr, unsigned long size, |
832 | unsigned long offset) | 804 | unsigned long offset) |
@@ -856,6 +828,9 @@ static inline int find_next_bit_le(void *vaddr, unsigned long size, | |||
856 | } | 828 | } |
857 | return offset + find_first_bit_le(p, size); | 829 | return offset + find_first_bit_le(p, size); |
858 | } | 830 | } |
831 | #define find_next_bit_le find_next_bit_le | ||
832 | |||
833 | #include <asm-generic/bitops/le.h> | ||
859 | 834 | ||
860 | #define ext2_set_bit_atomic(lock, nr, addr) \ | 835 | #define ext2_set_bit_atomic(lock, nr, addr) \ |
861 | test_and_set_bit_le(nr, addr) | 836 | test_and_set_bit_le(nr, addr) |
diff --git a/arch/s390/include/asm/delay.h b/arch/s390/include/asm/delay.h index 8a096b83f51f..0e3b35f96be1 100644 --- a/arch/s390/include/asm/delay.h +++ b/arch/s390/include/asm/delay.h | |||
@@ -14,10 +14,12 @@ | |||
14 | #ifndef _S390_DELAY_H | 14 | #ifndef _S390_DELAY_H |
15 | #define _S390_DELAY_H | 15 | #define _S390_DELAY_H |
16 | 16 | ||
17 | extern void __udelay(unsigned long long usecs); | 17 | void __ndelay(unsigned long long nsecs); |
18 | extern void udelay_simple(unsigned long long usecs); | 18 | void __udelay(unsigned long long usecs); |
19 | extern void __delay(unsigned long loops); | 19 | void udelay_simple(unsigned long long usecs); |
20 | void __delay(unsigned long loops); | ||
20 | 21 | ||
22 | #define ndelay(n) __ndelay((unsigned long long) (n)) | ||
21 | #define udelay(n) __udelay((unsigned long long) (n)) | 23 | #define udelay(n) __udelay((unsigned long long) (n)) |
22 | #define mdelay(n) __udelay((unsigned long long) (n) * 1000) | 24 | #define mdelay(n) __udelay((unsigned long long) (n) * 1000) |
23 | 25 | ||
diff --git a/arch/s390/include/asm/irq.h b/arch/s390/include/asm/irq.h index 1544b90bd6d6..ba7b01c726a3 100644 --- a/arch/s390/include/asm/irq.h +++ b/arch/s390/include/asm/irq.h | |||
@@ -2,6 +2,7 @@ | |||
2 | #define _ASM_IRQ_H | 2 | #define _ASM_IRQ_H |
3 | 3 | ||
4 | #include <linux/hardirq.h> | 4 | #include <linux/hardirq.h> |
5 | #include <linux/types.h> | ||
5 | 6 | ||
6 | enum interruption_class { | 7 | enum interruption_class { |
7 | EXTERNAL_INTERRUPT, | 8 | EXTERNAL_INTERRUPT, |
@@ -31,4 +32,11 @@ enum interruption_class { | |||
31 | NR_IRQS, | 32 | NR_IRQS, |
32 | }; | 33 | }; |
33 | 34 | ||
35 | typedef void (*ext_int_handler_t)(unsigned int, unsigned int, unsigned long); | ||
36 | |||
37 | int register_external_interrupt(u16 code, ext_int_handler_t handler); | ||
38 | int unregister_external_interrupt(u16 code, ext_int_handler_t handler); | ||
39 | void service_subclass_irq_register(void); | ||
40 | void service_subclass_irq_unregister(void); | ||
41 | |||
34 | #endif /* _ASM_IRQ_H */ | 42 | #endif /* _ASM_IRQ_H */ |
diff --git a/arch/s390/include/asm/s390_ext.h b/arch/s390/include/asm/s390_ext.h deleted file mode 100644 index 080876d5f196..000000000000 --- a/arch/s390/include/asm/s390_ext.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright IBM Corp. 1999,2010 | ||
3 | * Author(s): Holger Smolinski <Holger.Smolinski@de.ibm.com>, | ||
4 | * Martin Schwidefsky <schwidefsky@de.ibm.com>, | ||
5 | */ | ||
6 | |||
7 | #ifndef _S390_EXTINT_H | ||
8 | #define _S390_EXTINT_H | ||
9 | |||
10 | #include <linux/types.h> | ||
11 | |||
12 | typedef void (*ext_int_handler_t)(unsigned int, unsigned int, unsigned long); | ||
13 | |||
14 | int register_external_interrupt(__u16 code, ext_int_handler_t handler); | ||
15 | int unregister_external_interrupt(__u16 code, ext_int_handler_t handler); | ||
16 | |||
17 | #endif /* _S390_EXTINT_H */ | ||
diff --git a/arch/s390/include/asm/suspend.h b/arch/s390/include/asm/suspend.h deleted file mode 100644 index dc75c616eafe..000000000000 --- a/arch/s390/include/asm/suspend.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | #ifndef __ASM_S390_SUSPEND_H | ||
2 | #define __ASM_S390_SUSPEND_H | ||
3 | |||
4 | static inline int arch_prepare_suspend(void) | ||
5 | { | ||
6 | return 0; | ||
7 | } | ||
8 | |||
9 | #endif | ||
10 | |||
diff --git a/arch/s390/include/asm/topology.h b/arch/s390/include/asm/topology.h index c5338834ddbd..005d77d8ae2a 100644 --- a/arch/s390/include/asm/topology.h +++ b/arch/s390/include/asm/topology.h | |||
@@ -7,7 +7,7 @@ | |||
7 | extern unsigned char cpu_core_id[NR_CPUS]; | 7 | extern unsigned char cpu_core_id[NR_CPUS]; |
8 | extern cpumask_t cpu_core_map[NR_CPUS]; | 8 | extern cpumask_t cpu_core_map[NR_CPUS]; |
9 | 9 | ||
10 | static inline const struct cpumask *cpu_coregroup_mask(unsigned int cpu) | 10 | static inline const struct cpumask *cpu_coregroup_mask(int cpu) |
11 | { | 11 | { |
12 | return &cpu_core_map[cpu]; | 12 | return &cpu_core_map[cpu]; |
13 | } | 13 | } |
@@ -21,7 +21,7 @@ static inline const struct cpumask *cpu_coregroup_mask(unsigned int cpu) | |||
21 | extern unsigned char cpu_book_id[NR_CPUS]; | 21 | extern unsigned char cpu_book_id[NR_CPUS]; |
22 | extern cpumask_t cpu_book_map[NR_CPUS]; | 22 | extern cpumask_t cpu_book_map[NR_CPUS]; |
23 | 23 | ||
24 | static inline const struct cpumask *cpu_book_mask(unsigned int cpu) | 24 | static inline const struct cpumask *cpu_book_mask(int cpu) |
25 | { | 25 | { |
26 | return &cpu_book_map[cpu]; | 26 | return &cpu_book_map[cpu]; |
27 | } | 27 | } |
diff --git a/arch/s390/include/asm/uaccess.h b/arch/s390/include/asm/uaccess.h index 2d9ea11f919a..2b23885e81e9 100644 --- a/arch/s390/include/asm/uaccess.h +++ b/arch/s390/include/asm/uaccess.h | |||
@@ -49,12 +49,13 @@ | |||
49 | 49 | ||
50 | #define segment_eq(a,b) ((a).ar4 == (b).ar4) | 50 | #define segment_eq(a,b) ((a).ar4 == (b).ar4) |
51 | 51 | ||
52 | #define __access_ok(addr, size) \ | ||
53 | ({ \ | ||
54 | __chk_user_ptr(addr); \ | ||
55 | 1; \ | ||
56 | }) | ||
52 | 57 | ||
53 | static inline int __access_ok(const void __user *addr, unsigned long size) | 58 | #define access_ok(type, addr, size) __access_ok(addr, size) |
54 | { | ||
55 | return 1; | ||
56 | } | ||
57 | #define access_ok(type,addr,size) __access_ok(addr,size) | ||
58 | 59 | ||
59 | /* | 60 | /* |
60 | * The exception table consists of pairs of addresses: the first is the | 61 | * The exception table consists of pairs of addresses: the first is the |
diff --git a/arch/s390/kernel/Makefile b/arch/s390/kernel/Makefile index 5ff15dacb571..df3732249baa 100644 --- a/arch/s390/kernel/Makefile +++ b/arch/s390/kernel/Makefile | |||
@@ -20,10 +20,10 @@ CFLAGS_ptrace.o += -DUTS_MACHINE='"$(UTS_MACHINE)"' | |||
20 | 20 | ||
21 | CFLAGS_sysinfo.o += -Iinclude/math-emu -Iarch/s390/math-emu -w | 21 | CFLAGS_sysinfo.o += -Iinclude/math-emu -Iarch/s390/math-emu -w |
22 | 22 | ||
23 | obj-y := bitmap.o traps.o time.o process.o base.o early.o setup.o \ | 23 | obj-y := bitmap.o traps.o time.o process.o base.o early.o setup.o vtime.o \ |
24 | processor.o sys_s390.o ptrace.o signal.o cpcmd.o ebcdic.o \ | 24 | processor.o sys_s390.o ptrace.o signal.o cpcmd.o ebcdic.o nmi.o \ |
25 | s390_ext.o debug.o irq.o ipl.o dis.o diag.o mem_detect.o \ | 25 | debug.o irq.o ipl.o dis.o diag.o mem_detect.o sclp.o vdso.o \ |
26 | vdso.o vtime.o sysinfo.o nmi.o sclp.o jump_label.o | 26 | sysinfo.o jump_label.o |
27 | 27 | ||
28 | obj-y += $(if $(CONFIG_64BIT),entry64.o,entry.o) | 28 | obj-y += $(if $(CONFIG_64BIT),entry64.o,entry.o) |
29 | obj-y += $(if $(CONFIG_64BIT),reipl64.o,reipl.o) | 29 | obj-y += $(if $(CONFIG_64BIT),reipl64.o,reipl.o) |
diff --git a/arch/s390/kernel/dis.c b/arch/s390/kernel/dis.c index 3d4a78fc1adc..1ca3d1d6a86c 100644 --- a/arch/s390/kernel/dis.c +++ b/arch/s390/kernel/dis.c | |||
@@ -30,9 +30,9 @@ | |||
30 | #include <asm/atomic.h> | 30 | #include <asm/atomic.h> |
31 | #include <asm/mathemu.h> | 31 | #include <asm/mathemu.h> |
32 | #include <asm/cpcmd.h> | 32 | #include <asm/cpcmd.h> |
33 | #include <asm/s390_ext.h> | ||
34 | #include <asm/lowcore.h> | 33 | #include <asm/lowcore.h> |
35 | #include <asm/debug.h> | 34 | #include <asm/debug.h> |
35 | #include <asm/irq.h> | ||
36 | 36 | ||
37 | #ifndef CONFIG_64BIT | 37 | #ifndef CONFIG_64BIT |
38 | #define ONELONG "%08lx: " | 38 | #define ONELONG "%08lx: " |
diff --git a/arch/s390/kernel/irq.c b/arch/s390/kernel/irq.c index e204f9597aaf..e3264f6a9720 100644 --- a/arch/s390/kernel/irq.c +++ b/arch/s390/kernel/irq.c | |||
@@ -1,19 +1,28 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright IBM Corp. 2004,2010 | 2 | * Copyright IBM Corp. 2004,2011 |
3 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), | 3 | * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>, |
4 | * Thomas Spatzier (tspat@de.ibm.com) | 4 | * Holger Smolinski <Holger.Smolinski@de.ibm.com>, |
5 | * Thomas Spatzier <tspat@de.ibm.com>, | ||
5 | * | 6 | * |
6 | * This file contains interrupt related functions. | 7 | * This file contains interrupt related functions. |
7 | */ | 8 | */ |
8 | 9 | ||
9 | #include <linux/module.h> | ||
10 | #include <linux/kernel.h> | ||
11 | #include <linux/kernel_stat.h> | 10 | #include <linux/kernel_stat.h> |
12 | #include <linux/interrupt.h> | 11 | #include <linux/interrupt.h> |
13 | #include <linux/seq_file.h> | 12 | #include <linux/seq_file.h> |
14 | #include <linux/cpu.h> | ||
15 | #include <linux/proc_fs.h> | 13 | #include <linux/proc_fs.h> |
16 | #include <linux/profile.h> | 14 | #include <linux/profile.h> |
15 | #include <linux/module.h> | ||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/ftrace.h> | ||
18 | #include <linux/errno.h> | ||
19 | #include <linux/slab.h> | ||
20 | #include <linux/cpu.h> | ||
21 | #include <asm/irq_regs.h> | ||
22 | #include <asm/cputime.h> | ||
23 | #include <asm/lowcore.h> | ||
24 | #include <asm/irq.h> | ||
25 | #include "entry.h" | ||
17 | 26 | ||
18 | struct irq_class { | 27 | struct irq_class { |
19 | char *name; | 28 | char *name; |
@@ -82,8 +91,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
82 | * For compatibilty only. S/390 specific setup of interrupts et al. is done | 91 | * For compatibilty only. S/390 specific setup of interrupts et al. is done |
83 | * much later in init_channel_subsystem(). | 92 | * much later in init_channel_subsystem(). |
84 | */ | 93 | */ |
85 | void __init | 94 | void __init init_IRQ(void) |
86 | init_IRQ(void) | ||
87 | { | 95 | { |
88 | /* nothing... */ | 96 | /* nothing... */ |
89 | } | 97 | } |
@@ -134,3 +142,116 @@ void init_irq_proc(void) | |||
134 | create_prof_cpu_mask(root_irq_dir); | 142 | create_prof_cpu_mask(root_irq_dir); |
135 | } | 143 | } |
136 | #endif | 144 | #endif |
145 | |||
146 | /* | ||
147 | * ext_int_hash[index] is the start of the list for all external interrupts | ||
148 | * that hash to this index. With the current set of external interrupts | ||
149 | * (0x1202 external call, 0x1004 cpu timer, 0x2401 hwc console, 0x4000 | ||
150 | * iucv and 0x2603 pfault) this is always the first element. | ||
151 | */ | ||
152 | |||
153 | struct ext_int_info { | ||
154 | struct ext_int_info *next; | ||
155 | ext_int_handler_t handler; | ||
156 | u16 code; | ||
157 | }; | ||
158 | |||
159 | static struct ext_int_info *ext_int_hash[256]; | ||
160 | |||
161 | static inline int ext_hash(u16 code) | ||
162 | { | ||
163 | return (code + (code >> 9)) & 0xff; | ||
164 | } | ||
165 | |||
166 | int register_external_interrupt(u16 code, ext_int_handler_t handler) | ||
167 | { | ||
168 | struct ext_int_info *p; | ||
169 | int index; | ||
170 | |||
171 | p = kmalloc(sizeof(*p), GFP_ATOMIC); | ||
172 | if (!p) | ||
173 | return -ENOMEM; | ||
174 | p->code = code; | ||
175 | p->handler = handler; | ||
176 | index = ext_hash(code); | ||
177 | p->next = ext_int_hash[index]; | ||
178 | ext_int_hash[index] = p; | ||
179 | return 0; | ||
180 | } | ||
181 | EXPORT_SYMBOL(register_external_interrupt); | ||
182 | |||
183 | int unregister_external_interrupt(u16 code, ext_int_handler_t handler) | ||
184 | { | ||
185 | struct ext_int_info *p, *q; | ||
186 | int index; | ||
187 | |||
188 | index = ext_hash(code); | ||
189 | q = NULL; | ||
190 | p = ext_int_hash[index]; | ||
191 | while (p) { | ||
192 | if (p->code == code && p->handler == handler) | ||
193 | break; | ||
194 | q = p; | ||
195 | p = p->next; | ||
196 | } | ||
197 | if (!p) | ||
198 | return -ENOENT; | ||
199 | if (q) | ||
200 | q->next = p->next; | ||
201 | else | ||
202 | ext_int_hash[index] = p->next; | ||
203 | kfree(p); | ||
204 | return 0; | ||
205 | } | ||
206 | EXPORT_SYMBOL(unregister_external_interrupt); | ||
207 | |||
208 | void __irq_entry do_extint(struct pt_regs *regs, unsigned int ext_int_code, | ||
209 | unsigned int param32, unsigned long param64) | ||
210 | { | ||
211 | struct pt_regs *old_regs; | ||
212 | unsigned short code; | ||
213 | struct ext_int_info *p; | ||
214 | int index; | ||
215 | |||
216 | code = (unsigned short) ext_int_code; | ||
217 | old_regs = set_irq_regs(regs); | ||
218 | s390_idle_check(regs, S390_lowcore.int_clock, | ||
219 | S390_lowcore.async_enter_timer); | ||
220 | irq_enter(); | ||
221 | if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) | ||
222 | /* Serve timer interrupts first. */ | ||
223 | clock_comparator_work(); | ||
224 | kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++; | ||
225 | if (code != 0x1004) | ||
226 | __get_cpu_var(s390_idle).nohz_delay = 1; | ||
227 | index = ext_hash(code); | ||
228 | for (p = ext_int_hash[index]; p; p = p->next) { | ||
229 | if (likely(p->code == code)) | ||
230 | p->handler(ext_int_code, param32, param64); | ||
231 | } | ||
232 | irq_exit(); | ||
233 | set_irq_regs(old_regs); | ||
234 | } | ||
235 | |||
236 | static DEFINE_SPINLOCK(sc_irq_lock); | ||
237 | static int sc_irq_refcount; | ||
238 | |||
239 | void service_subclass_irq_register(void) | ||
240 | { | ||
241 | spin_lock(&sc_irq_lock); | ||
242 | if (!sc_irq_refcount) | ||
243 | ctl_set_bit(0, 9); | ||
244 | sc_irq_refcount++; | ||
245 | spin_unlock(&sc_irq_lock); | ||
246 | } | ||
247 | EXPORT_SYMBOL(service_subclass_irq_register); | ||
248 | |||
249 | void service_subclass_irq_unregister(void) | ||
250 | { | ||
251 | spin_lock(&sc_irq_lock); | ||
252 | sc_irq_refcount--; | ||
253 | if (!sc_irq_refcount) | ||
254 | ctl_clear_bit(0, 9); | ||
255 | spin_unlock(&sc_irq_lock); | ||
256 | } | ||
257 | EXPORT_SYMBOL(service_subclass_irq_unregister); | ||
diff --git a/arch/s390/kernel/s390_ext.c b/arch/s390/kernel/s390_ext.c deleted file mode 100644 index 185029919c4d..000000000000 --- a/arch/s390/kernel/s390_ext.c +++ /dev/null | |||
@@ -1,108 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright IBM Corp. 1999,2010 | ||
3 | * Author(s): Holger Smolinski <Holger.Smolinski@de.ibm.com>, | ||
4 | * Martin Schwidefsky <schwidefsky@de.ibm.com>, | ||
5 | */ | ||
6 | |||
7 | #include <linux/kernel_stat.h> | ||
8 | #include <linux/interrupt.h> | ||
9 | #include <linux/module.h> | ||
10 | #include <linux/kernel.h> | ||
11 | #include <linux/ftrace.h> | ||
12 | #include <linux/errno.h> | ||
13 | #include <linux/slab.h> | ||
14 | #include <asm/s390_ext.h> | ||
15 | #include <asm/irq_regs.h> | ||
16 | #include <asm/cputime.h> | ||
17 | #include <asm/lowcore.h> | ||
18 | #include <asm/irq.h> | ||
19 | #include "entry.h" | ||
20 | |||
21 | struct ext_int_info { | ||
22 | struct ext_int_info *next; | ||
23 | ext_int_handler_t handler; | ||
24 | __u16 code; | ||
25 | }; | ||
26 | |||
27 | /* | ||
28 | * ext_int_hash[index] is the start of the list for all external interrupts | ||
29 | * that hash to this index. With the current set of external interrupts | ||
30 | * (0x1202 external call, 0x1004 cpu timer, 0x2401 hwc console, 0x4000 | ||
31 | * iucv and 0x2603 pfault) this is always the first element. | ||
32 | */ | ||
33 | static struct ext_int_info *ext_int_hash[256]; | ||
34 | |||
35 | static inline int ext_hash(__u16 code) | ||
36 | { | ||
37 | return (code + (code >> 9)) & 0xff; | ||
38 | } | ||
39 | |||
40 | int register_external_interrupt(__u16 code, ext_int_handler_t handler) | ||
41 | { | ||
42 | struct ext_int_info *p; | ||
43 | int index; | ||
44 | |||
45 | p = kmalloc(sizeof(*p), GFP_ATOMIC); | ||
46 | if (!p) | ||
47 | return -ENOMEM; | ||
48 | p->code = code; | ||
49 | p->handler = handler; | ||
50 | index = ext_hash(code); | ||
51 | p->next = ext_int_hash[index]; | ||
52 | ext_int_hash[index] = p; | ||
53 | return 0; | ||
54 | } | ||
55 | EXPORT_SYMBOL(register_external_interrupt); | ||
56 | |||
57 | int unregister_external_interrupt(__u16 code, ext_int_handler_t handler) | ||
58 | { | ||
59 | struct ext_int_info *p, *q; | ||
60 | int index; | ||
61 | |||
62 | index = ext_hash(code); | ||
63 | q = NULL; | ||
64 | p = ext_int_hash[index]; | ||
65 | while (p) { | ||
66 | if (p->code == code && p->handler == handler) | ||
67 | break; | ||
68 | q = p; | ||
69 | p = p->next; | ||
70 | } | ||
71 | if (!p) | ||
72 | return -ENOENT; | ||
73 | if (q) | ||
74 | q->next = p->next; | ||
75 | else | ||
76 | ext_int_hash[index] = p->next; | ||
77 | kfree(p); | ||
78 | return 0; | ||
79 | } | ||
80 | EXPORT_SYMBOL(unregister_external_interrupt); | ||
81 | |||
82 | void __irq_entry do_extint(struct pt_regs *regs, unsigned int ext_int_code, | ||
83 | unsigned int param32, unsigned long param64) | ||
84 | { | ||
85 | struct pt_regs *old_regs; | ||
86 | unsigned short code; | ||
87 | struct ext_int_info *p; | ||
88 | int index; | ||
89 | |||
90 | code = (unsigned short) ext_int_code; | ||
91 | old_regs = set_irq_regs(regs); | ||
92 | s390_idle_check(regs, S390_lowcore.int_clock, | ||
93 | S390_lowcore.async_enter_timer); | ||
94 | irq_enter(); | ||
95 | if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) | ||
96 | /* Serve timer interrupts first. */ | ||
97 | clock_comparator_work(); | ||
98 | kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++; | ||
99 | if (code != 0x1004) | ||
100 | __get_cpu_var(s390_idle).nohz_delay = 1; | ||
101 | index = ext_hash(code); | ||
102 | for (p = ext_int_hash[index]; p; p = p->next) { | ||
103 | if (likely(p->code == code)) | ||
104 | p->handler(ext_int_code, param32, param64); | ||
105 | } | ||
106 | irq_exit(); | ||
107 | set_irq_regs(old_regs); | ||
108 | } | ||
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c index f8e85ecbc459..52420d2785b3 100644 --- a/arch/s390/kernel/smp.c +++ b/arch/s390/kernel/smp.c | |||
@@ -44,7 +44,6 @@ | |||
44 | #include <asm/sigp.h> | 44 | #include <asm/sigp.h> |
45 | #include <asm/pgalloc.h> | 45 | #include <asm/pgalloc.h> |
46 | #include <asm/irq.h> | 46 | #include <asm/irq.h> |
47 | #include <asm/s390_ext.h> | ||
48 | #include <asm/cpcmd.h> | 47 | #include <asm/cpcmd.h> |
49 | #include <asm/tlbflush.h> | 48 | #include <asm/tlbflush.h> |
50 | #include <asm/timer.h> | 49 | #include <asm/timer.h> |
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c index a59557f1fb5f..dff933065ab6 100644 --- a/arch/s390/kernel/time.c +++ b/arch/s390/kernel/time.c | |||
@@ -41,7 +41,6 @@ | |||
41 | #include <linux/kprobes.h> | 41 | #include <linux/kprobes.h> |
42 | #include <asm/uaccess.h> | 42 | #include <asm/uaccess.h> |
43 | #include <asm/delay.h> | 43 | #include <asm/delay.h> |
44 | #include <asm/s390_ext.h> | ||
45 | #include <asm/div64.h> | 44 | #include <asm/div64.h> |
46 | #include <asm/vdso.h> | 45 | #include <asm/vdso.h> |
47 | #include <asm/irq.h> | 46 | #include <asm/irq.h> |
diff --git a/arch/s390/kernel/topology.c b/arch/s390/kernel/topology.c index 2eafb8c7a746..0cd340b72632 100644 --- a/arch/s390/kernel/topology.c +++ b/arch/s390/kernel/topology.c | |||
@@ -17,7 +17,6 @@ | |||
17 | #include <linux/smp.h> | 17 | #include <linux/smp.h> |
18 | #include <linux/cpuset.h> | 18 | #include <linux/cpuset.h> |
19 | #include <asm/delay.h> | 19 | #include <asm/delay.h> |
20 | #include <asm/s390_ext.h> | ||
21 | 20 | ||
22 | #define PTF_HORIZONTAL (0UL) | 21 | #define PTF_HORIZONTAL (0UL) |
23 | #define PTF_VERTICAL (1UL) | 22 | #define PTF_VERTICAL (1UL) |
diff --git a/arch/s390/kernel/traps.c b/arch/s390/kernel/traps.c index b5a4a739b477..a65d2e82f61d 100644 --- a/arch/s390/kernel/traps.c +++ b/arch/s390/kernel/traps.c | |||
@@ -39,7 +39,6 @@ | |||
39 | #include <asm/atomic.h> | 39 | #include <asm/atomic.h> |
40 | #include <asm/mathemu.h> | 40 | #include <asm/mathemu.h> |
41 | #include <asm/cpcmd.h> | 41 | #include <asm/cpcmd.h> |
42 | #include <asm/s390_ext.h> | ||
43 | #include <asm/lowcore.h> | 42 | #include <asm/lowcore.h> |
44 | #include <asm/debug.h> | 43 | #include <asm/debug.h> |
45 | #include "entry.h" | 44 | #include "entry.h" |
diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c index 5e8ead4b4aba..2d6228f60cd6 100644 --- a/arch/s390/kernel/vtime.c +++ b/arch/s390/kernel/vtime.c | |||
@@ -22,10 +22,10 @@ | |||
22 | #include <linux/cpu.h> | 22 | #include <linux/cpu.h> |
23 | #include <linux/kprobes.h> | 23 | #include <linux/kprobes.h> |
24 | 24 | ||
25 | #include <asm/s390_ext.h> | ||
26 | #include <asm/timer.h> | 25 | #include <asm/timer.h> |
27 | #include <asm/irq_regs.h> | 26 | #include <asm/irq_regs.h> |
28 | #include <asm/cputime.h> | 27 | #include <asm/cputime.h> |
28 | #include <asm/irq.h> | ||
29 | 29 | ||
30 | static DEFINE_PER_CPU(struct vtimer_queue, virt_cpu_timer); | 30 | static DEFINE_PER_CPU(struct vtimer_queue, virt_cpu_timer); |
31 | 31 | ||
diff --git a/arch/s390/lib/delay.c b/arch/s390/lib/delay.c index 0f53110e1d09..a65229d91c92 100644 --- a/arch/s390/lib/delay.c +++ b/arch/s390/lib/delay.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
13 | #include <linux/irqflags.h> | 13 | #include <linux/irqflags.h> |
14 | #include <linux/interrupt.h> | 14 | #include <linux/interrupt.h> |
15 | #include <asm/div64.h> | ||
15 | 16 | ||
16 | void __delay(unsigned long loops) | 17 | void __delay(unsigned long loops) |
17 | { | 18 | { |
@@ -116,3 +117,17 @@ void udelay_simple(unsigned long long usecs) | |||
116 | while (get_clock() < end) | 117 | while (get_clock() < end) |
117 | cpu_relax(); | 118 | cpu_relax(); |
118 | } | 119 | } |
120 | |||
121 | void __ndelay(unsigned long long nsecs) | ||
122 | { | ||
123 | u64 end; | ||
124 | |||
125 | nsecs <<= 9; | ||
126 | do_div(nsecs, 125); | ||
127 | end = get_clock() + nsecs; | ||
128 | if (nsecs & ~0xfffUL) | ||
129 | __udelay(nsecs >> 12); | ||
130 | while (get_clock() < end) | ||
131 | barrier(); | ||
132 | } | ||
133 | EXPORT_SYMBOL(__ndelay); | ||
diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c index a0f9e730f26a..fe103e891e7a 100644 --- a/arch/s390/mm/fault.c +++ b/arch/s390/mm/fault.c | |||
@@ -34,7 +34,7 @@ | |||
34 | #include <asm/asm-offsets.h> | 34 | #include <asm/asm-offsets.h> |
35 | #include <asm/system.h> | 35 | #include <asm/system.h> |
36 | #include <asm/pgtable.h> | 36 | #include <asm/pgtable.h> |
37 | #include <asm/s390_ext.h> | 37 | #include <asm/irq.h> |
38 | #include <asm/mmu_context.h> | 38 | #include <asm/mmu_context.h> |
39 | #include <asm/compat.h> | 39 | #include <asm/compat.h> |
40 | #include "../kernel/entry.h" | 40 | #include "../kernel/entry.h" |
@@ -245,9 +245,12 @@ static noinline void do_fault_error(struct pt_regs *regs, long int_code, | |||
245 | do_no_context(regs, int_code, trans_exc_code); | 245 | do_no_context(regs, int_code, trans_exc_code); |
246 | break; | 246 | break; |
247 | default: /* fault & VM_FAULT_ERROR */ | 247 | default: /* fault & VM_FAULT_ERROR */ |
248 | if (fault & VM_FAULT_OOM) | 248 | if (fault & VM_FAULT_OOM) { |
249 | pagefault_out_of_memory(); | 249 | if (!(regs->psw.mask & PSW_MASK_PSTATE)) |
250 | else if (fault & VM_FAULT_SIGBUS) { | 250 | do_no_context(regs, int_code, trans_exc_code); |
251 | else | ||
252 | pagefault_out_of_memory(); | ||
253 | } else if (fault & VM_FAULT_SIGBUS) { | ||
251 | /* Kernel mode? Handle exceptions or die */ | 254 | /* Kernel mode? Handle exceptions or die */ |
252 | if (!(regs->psw.mask & PSW_MASK_PSTATE)) | 255 | if (!(regs->psw.mask & PSW_MASK_PSTATE)) |
253 | do_no_context(regs, int_code, trans_exc_code); | 256 | do_no_context(regs, int_code, trans_exc_code); |
@@ -277,7 +280,8 @@ static inline int do_exception(struct pt_regs *regs, int access, | |||
277 | struct mm_struct *mm; | 280 | struct mm_struct *mm; |
278 | struct vm_area_struct *vma; | 281 | struct vm_area_struct *vma; |
279 | unsigned long address; | 282 | unsigned long address; |
280 | int fault, write; | 283 | unsigned int flags; |
284 | int fault; | ||
281 | 285 | ||
282 | if (notify_page_fault(regs)) | 286 | if (notify_page_fault(regs)) |
283 | return 0; | 287 | return 0; |
@@ -296,6 +300,10 @@ static inline int do_exception(struct pt_regs *regs, int access, | |||
296 | 300 | ||
297 | address = trans_exc_code & __FAIL_ADDR_MASK; | 301 | address = trans_exc_code & __FAIL_ADDR_MASK; |
298 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address); | 302 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address); |
303 | flags = FAULT_FLAG_ALLOW_RETRY; | ||
304 | if (access == VM_WRITE || (trans_exc_code & store_indication) == 0x400) | ||
305 | flags |= FAULT_FLAG_WRITE; | ||
306 | retry: | ||
299 | down_read(&mm->mmap_sem); | 307 | down_read(&mm->mmap_sem); |
300 | 308 | ||
301 | fault = VM_FAULT_BADMAP; | 309 | fault = VM_FAULT_BADMAP; |
@@ -325,21 +333,31 @@ static inline int do_exception(struct pt_regs *regs, int access, | |||
325 | * make sure we exit gracefully rather than endlessly redo | 333 | * make sure we exit gracefully rather than endlessly redo |
326 | * the fault. | 334 | * the fault. |
327 | */ | 335 | */ |
328 | write = (access == VM_WRITE || | 336 | fault = handle_mm_fault(mm, vma, address, flags); |
329 | (trans_exc_code & store_indication) == 0x400) ? | ||
330 | FAULT_FLAG_WRITE : 0; | ||
331 | fault = handle_mm_fault(mm, vma, address, write); | ||
332 | if (unlikely(fault & VM_FAULT_ERROR)) | 337 | if (unlikely(fault & VM_FAULT_ERROR)) |
333 | goto out_up; | 338 | goto out_up; |
334 | 339 | ||
335 | if (fault & VM_FAULT_MAJOR) { | 340 | /* |
336 | tsk->maj_flt++; | 341 | * Major/minor page fault accounting is only done on the |
337 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0, | 342 | * initial attempt. If we go through a retry, it is extremely |
338 | regs, address); | 343 | * likely that the page will be found in page cache at that point. |
339 | } else { | 344 | */ |
340 | tsk->min_flt++; | 345 | if (flags & FAULT_FLAG_ALLOW_RETRY) { |
341 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0, | 346 | if (fault & VM_FAULT_MAJOR) { |
342 | regs, address); | 347 | tsk->maj_flt++; |
348 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0, | ||
349 | regs, address); | ||
350 | } else { | ||
351 | tsk->min_flt++; | ||
352 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0, | ||
353 | regs, address); | ||
354 | } | ||
355 | if (fault & VM_FAULT_RETRY) { | ||
356 | /* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk | ||
357 | * of starvation. */ | ||
358 | flags &= ~FAULT_FLAG_ALLOW_RETRY; | ||
359 | goto retry; | ||
360 | } | ||
343 | } | 361 | } |
344 | /* | 362 | /* |
345 | * The instruction that caused the program check will | 363 | * The instruction that caused the program check will |
@@ -429,10 +447,9 @@ int __handle_fault(unsigned long uaddr, unsigned long pgm_int_code, int write) | |||
429 | access = write ? VM_WRITE : VM_READ; | 447 | access = write ? VM_WRITE : VM_READ; |
430 | fault = do_exception(®s, access, uaddr | 2); | 448 | fault = do_exception(®s, access, uaddr | 2); |
431 | if (unlikely(fault)) { | 449 | if (unlikely(fault)) { |
432 | if (fault & VM_FAULT_OOM) { | 450 | if (fault & VM_FAULT_OOM) |
433 | pagefault_out_of_memory(); | 451 | return -EFAULT; |
434 | fault = 0; | 452 | else if (fault & VM_FAULT_SIGBUS) |
435 | } else if (fault & VM_FAULT_SIGBUS) | ||
436 | do_sigbus(®s, pgm_int_code, uaddr); | 453 | do_sigbus(®s, pgm_int_code, uaddr); |
437 | } | 454 | } |
438 | return fault ? -EFAULT : 0; | 455 | return fault ? -EFAULT : 0; |
@@ -485,7 +502,6 @@ int pfault_init(void) | |||
485 | "2:\n" | 502 | "2:\n" |
486 | EX_TABLE(0b,1b) | 503 | EX_TABLE(0b,1b) |
487 | : "=d" (rc) : "a" (&refbk), "m" (refbk) : "cc"); | 504 | : "=d" (rc) : "a" (&refbk), "m" (refbk) : "cc"); |
488 | __ctl_set_bit(0, 9); | ||
489 | return rc; | 505 | return rc; |
490 | } | 506 | } |
491 | 507 | ||
@@ -500,7 +516,6 @@ void pfault_fini(void) | |||
500 | 516 | ||
501 | if (!MACHINE_IS_VM || pfault_disable) | 517 | if (!MACHINE_IS_VM || pfault_disable) |
502 | return; | 518 | return; |
503 | __ctl_clear_bit(0,9); | ||
504 | asm volatile( | 519 | asm volatile( |
505 | " diag %0,0,0x258\n" | 520 | " diag %0,0,0x258\n" |
506 | "0:\n" | 521 | "0:\n" |
@@ -615,6 +630,7 @@ static int __init pfault_irq_init(void) | |||
615 | rc = pfault_init() == 0 ? 0 : -EOPNOTSUPP; | 630 | rc = pfault_init() == 0 ? 0 : -EOPNOTSUPP; |
616 | if (rc) | 631 | if (rc) |
617 | goto out_pfault; | 632 | goto out_pfault; |
633 | service_subclass_irq_register(); | ||
618 | hotcpu_notifier(pfault_cpu_notify, 0); | 634 | hotcpu_notifier(pfault_cpu_notify, 0); |
619 | return 0; | 635 | return 0; |
620 | 636 | ||
diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c index dfefc2171691..59b663109d90 100644 --- a/arch/s390/mm/init.c +++ b/arch/s390/mm/init.c | |||
@@ -119,9 +119,7 @@ void __init paging_init(void) | |||
119 | sparse_memory_present_with_active_regions(MAX_NUMNODES); | 119 | sparse_memory_present_with_active_regions(MAX_NUMNODES); |
120 | sparse_init(); | 120 | sparse_init(); |
121 | memset(max_zone_pfns, 0, sizeof(max_zone_pfns)); | 121 | memset(max_zone_pfns, 0, sizeof(max_zone_pfns)); |
122 | #ifdef CONFIG_ZONE_DMA | ||
123 | max_zone_pfns[ZONE_DMA] = PFN_DOWN(MAX_DMA_ADDRESS); | 122 | max_zone_pfns[ZONE_DMA] = PFN_DOWN(MAX_DMA_ADDRESS); |
124 | #endif | ||
125 | max_zone_pfns[ZONE_NORMAL] = max_low_pfn; | 123 | max_zone_pfns[ZONE_NORMAL] = max_low_pfn; |
126 | free_area_init_nodes(max_zone_pfns); | 124 | free_area_init_nodes(max_zone_pfns); |
127 | fault_init(); | 125 | fault_init(); |
diff --git a/arch/s390/oprofile/hwsampler.c b/arch/s390/oprofile/hwsampler.c index 053caa0fd276..4552ce40c81a 100644 --- a/arch/s390/oprofile/hwsampler.c +++ b/arch/s390/oprofile/hwsampler.c | |||
@@ -19,7 +19,7 @@ | |||
19 | #include <linux/oprofile.h> | 19 | #include <linux/oprofile.h> |
20 | 20 | ||
21 | #include <asm/lowcore.h> | 21 | #include <asm/lowcore.h> |
22 | #include <asm/s390_ext.h> | 22 | #include <asm/irq.h> |
23 | 23 | ||
24 | #include "hwsampler.h" | 24 | #include "hwsampler.h" |
25 | 25 | ||
@@ -580,7 +580,7 @@ static int hws_cpu_callback(struct notifier_block *nfb, | |||
580 | { | 580 | { |
581 | /* We do not have sampler space available for all possible CPUs. | 581 | /* We do not have sampler space available for all possible CPUs. |
582 | All CPUs should be online when hw sampling is activated. */ | 582 | All CPUs should be online when hw sampling is activated. */ |
583 | return NOTIFY_BAD; | 583 | return (hws_state <= HWS_DEALLOCATED) ? NOTIFY_OK : NOTIFY_BAD; |
584 | } | 584 | } |
585 | 585 | ||
586 | static struct notifier_block hws_cpu_notifier = { | 586 | static struct notifier_block hws_cpu_notifier = { |
diff --git a/arch/score/Kconfig b/arch/score/Kconfig index e73bc781cc14..288add8d168f 100644 --- a/arch/score/Kconfig +++ b/arch/score/Kconfig | |||
@@ -43,9 +43,6 @@ config NO_DMA | |||
43 | config RWSEM_GENERIC_SPINLOCK | 43 | config RWSEM_GENERIC_SPINLOCK |
44 | def_bool y | 44 | def_bool y |
45 | 45 | ||
46 | config GENERIC_FIND_NEXT_BIT | ||
47 | def_bool y | ||
48 | |||
49 | config GENERIC_HWEIGHT | 46 | config GENERIC_HWEIGHT |
50 | def_bool y | 47 | def_bool y |
51 | 48 | ||
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index b44e37753b9a..74495a5ea027 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig | |||
@@ -71,12 +71,6 @@ config GENERIC_CSUM | |||
71 | def_bool y | 71 | def_bool y |
72 | depends on SUPERH64 | 72 | depends on SUPERH64 |
73 | 73 | ||
74 | config GENERIC_FIND_NEXT_BIT | ||
75 | def_bool y | ||
76 | |||
77 | config GENERIC_FIND_BIT_LE | ||
78 | def_bool y | ||
79 | |||
80 | config GENERIC_HWEIGHT | 74 | config GENERIC_HWEIGHT |
81 | def_bool y | 75 | def_bool y |
82 | 76 | ||
diff --git a/arch/sh/configs/apsh4ad0a_defconfig b/arch/sh/configs/apsh4ad0a_defconfig index 77ec0e7b8ddf..e7583484cc07 100644 --- a/arch/sh/configs/apsh4ad0a_defconfig +++ b/arch/sh/configs/apsh4ad0a_defconfig | |||
@@ -7,7 +7,6 @@ CONFIG_IKCONFIG=y | |||
7 | CONFIG_IKCONFIG_PROC=y | 7 | CONFIG_IKCONFIG_PROC=y |
8 | CONFIG_LOG_BUF_SHIFT=14 | 8 | CONFIG_LOG_BUF_SHIFT=14 |
9 | CONFIG_CGROUPS=y | 9 | CONFIG_CGROUPS=y |
10 | CONFIG_CGROUP_NS=y | ||
11 | CONFIG_CGROUP_FREEZER=y | 10 | CONFIG_CGROUP_FREEZER=y |
12 | CONFIG_CGROUP_DEVICE=y | 11 | CONFIG_CGROUP_DEVICE=y |
13 | CONFIG_CGROUP_CPUACCT=y | 12 | CONFIG_CGROUP_CPUACCT=y |
diff --git a/arch/sh/configs/sdk7786_defconfig b/arch/sh/configs/sdk7786_defconfig index c41650572d79..8a7dd7b59c5c 100644 --- a/arch/sh/configs/sdk7786_defconfig +++ b/arch/sh/configs/sdk7786_defconfig | |||
@@ -12,7 +12,6 @@ CONFIG_IKCONFIG=y | |||
12 | CONFIG_IKCONFIG_PROC=y | 12 | CONFIG_IKCONFIG_PROC=y |
13 | CONFIG_CGROUPS=y | 13 | CONFIG_CGROUPS=y |
14 | CONFIG_CGROUP_DEBUG=y | 14 | CONFIG_CGROUP_DEBUG=y |
15 | CONFIG_CGROUP_NS=y | ||
16 | CONFIG_CGROUP_FREEZER=y | 15 | CONFIG_CGROUP_FREEZER=y |
17 | CONFIG_CGROUP_DEVICE=y | 16 | CONFIG_CGROUP_DEVICE=y |
18 | CONFIG_CPUSETS=y | 17 | CONFIG_CPUSETS=y |
diff --git a/arch/sh/configs/se7206_defconfig b/arch/sh/configs/se7206_defconfig index a468ff227fc6..72c3fad7383f 100644 --- a/arch/sh/configs/se7206_defconfig +++ b/arch/sh/configs/se7206_defconfig | |||
@@ -8,7 +8,6 @@ CONFIG_RCU_TRACE=y | |||
8 | CONFIG_LOG_BUF_SHIFT=14 | 8 | CONFIG_LOG_BUF_SHIFT=14 |
9 | CONFIG_CGROUPS=y | 9 | CONFIG_CGROUPS=y |
10 | CONFIG_CGROUP_DEBUG=y | 10 | CONFIG_CGROUP_DEBUG=y |
11 | CONFIG_CGROUP_NS=y | ||
12 | CONFIG_CGROUP_DEVICE=y | 11 | CONFIG_CGROUP_DEVICE=y |
13 | CONFIG_CGROUP_CPUACCT=y | 12 | CONFIG_CGROUP_CPUACCT=y |
14 | CONFIG_RESOURCE_COUNTERS=y | 13 | CONFIG_RESOURCE_COUNTERS=y |
diff --git a/arch/sh/configs/shx3_defconfig b/arch/sh/configs/shx3_defconfig index 3f92d37c6374..6bb413036892 100644 --- a/arch/sh/configs/shx3_defconfig +++ b/arch/sh/configs/shx3_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_IKCONFIG=y | |||
9 | CONFIG_IKCONFIG_PROC=y | 9 | CONFIG_IKCONFIG_PROC=y |
10 | CONFIG_LOG_BUF_SHIFT=14 | 10 | CONFIG_LOG_BUF_SHIFT=14 |
11 | CONFIG_CGROUPS=y | 11 | CONFIG_CGROUPS=y |
12 | CONFIG_CGROUP_NS=y | ||
13 | CONFIG_CGROUP_FREEZER=y | 12 | CONFIG_CGROUP_FREEZER=y |
14 | CONFIG_CGROUP_DEVICE=y | 13 | CONFIG_CGROUP_DEVICE=y |
15 | CONFIG_CGROUP_CPUACCT=y | 14 | CONFIG_CGROUP_CPUACCT=y |
diff --git a/arch/sh/configs/urquell_defconfig b/arch/sh/configs/urquell_defconfig index 7b3daec6fefe..8bfa4d056d7a 100644 --- a/arch/sh/configs/urquell_defconfig +++ b/arch/sh/configs/urquell_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_IKCONFIG_PROC=y | |||
9 | CONFIG_LOG_BUF_SHIFT=14 | 9 | CONFIG_LOG_BUF_SHIFT=14 |
10 | CONFIG_CGROUPS=y | 10 | CONFIG_CGROUPS=y |
11 | CONFIG_CGROUP_DEBUG=y | 11 | CONFIG_CGROUP_DEBUG=y |
12 | CONFIG_CGROUP_NS=y | ||
13 | CONFIG_CGROUP_FREEZER=y | 12 | CONFIG_CGROUP_FREEZER=y |
14 | CONFIG_CGROUP_DEVICE=y | 13 | CONFIG_CGROUP_DEVICE=y |
15 | CONFIG_CPUSETS=y | 14 | CONFIG_CPUSETS=y |
diff --git a/arch/sh/include/asm/kgdb.h b/arch/sh/include/asm/kgdb.h index 4235e228d921..f3613952d1ae 100644 --- a/arch/sh/include/asm/kgdb.h +++ b/arch/sh/include/asm/kgdb.h | |||
@@ -34,5 +34,6 @@ static inline void arch_kgdb_breakpoint(void) | |||
34 | 34 | ||
35 | #define CACHE_FLUSH_IS_SAFE 1 | 35 | #define CACHE_FLUSH_IS_SAFE 1 |
36 | #define BREAK_INSTR_SIZE 2 | 36 | #define BREAK_INSTR_SIZE 2 |
37 | #define GDB_ADJUSTS_BREAK_OFFSET | ||
37 | 38 | ||
38 | #endif /* __ASM_SH_KGDB_H */ | 39 | #endif /* __ASM_SH_KGDB_H */ |
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h index de167d3a1a80..40725b4a8018 100644 --- a/arch/sh/include/asm/ptrace.h +++ b/arch/sh/include/asm/ptrace.h | |||
@@ -40,9 +40,8 @@ | |||
40 | #include <asm/system.h> | 40 | #include <asm/system.h> |
41 | 41 | ||
42 | #define user_mode(regs) (((regs)->sr & 0x40000000)==0) | 42 | #define user_mode(regs) (((regs)->sr & 0x40000000)==0) |
43 | #define user_stack_pointer(_regs) ((unsigned long)(_regs)->regs[15]) | ||
44 | #define kernel_stack_pointer(_regs) ((unsigned long)(_regs)->regs[15]) | 43 | #define kernel_stack_pointer(_regs) ((unsigned long)(_regs)->regs[15]) |
45 | #define instruction_pointer(regs) ((unsigned long)(regs)->pc) | 44 | #define GET_USP(regs) ((regs)->regs[15]) |
46 | 45 | ||
47 | extern void show_regs(struct pt_regs *); | 46 | extern void show_regs(struct pt_regs *); |
48 | 47 | ||
@@ -139,6 +138,9 @@ static inline unsigned long profile_pc(struct pt_regs *regs) | |||
139 | 138 | ||
140 | return pc; | 139 | return pc; |
141 | } | 140 | } |
141 | #define profile_pc profile_pc | ||
142 | |||
143 | #include <asm-generic/ptrace.h> | ||
142 | #endif /* __KERNEL__ */ | 144 | #endif /* __KERNEL__ */ |
143 | 145 | ||
144 | #endif /* __ASM_SH_PTRACE_H */ | 146 | #endif /* __ASM_SH_PTRACE_H */ |
diff --git a/arch/sh/include/asm/suspend.h b/arch/sh/include/asm/suspend.h index 64eb41a063e8..e14567a7e9a1 100644 --- a/arch/sh/include/asm/suspend.h +++ b/arch/sh/include/asm/suspend.h | |||
@@ -3,7 +3,6 @@ | |||
3 | 3 | ||
4 | #ifndef __ASSEMBLY__ | 4 | #ifndef __ASSEMBLY__ |
5 | #include <linux/notifier.h> | 5 | #include <linux/notifier.h> |
6 | static inline int arch_prepare_suspend(void) { return 0; } | ||
7 | 6 | ||
8 | #include <asm/ptrace.h> | 7 | #include <asm/ptrace.h> |
9 | 8 | ||
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index 63a027c9ada5..af32e17fa170 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig | |||
@@ -190,14 +190,6 @@ config RWSEM_XCHGADD_ALGORITHM | |||
190 | bool | 190 | bool |
191 | default y if SPARC64 | 191 | default y if SPARC64 |
192 | 192 | ||
193 | config GENERIC_FIND_NEXT_BIT | ||
194 | bool | ||
195 | default y | ||
196 | |||
197 | config GENERIC_FIND_BIT_LE | ||
198 | bool | ||
199 | default y | ||
200 | |||
201 | config GENERIC_HWEIGHT | 193 | config GENERIC_HWEIGHT |
202 | bool | 194 | bool |
203 | default y if !ULTRA_HAS_POPULATION_COUNT | 195 | default y if !ULTRA_HAS_POPULATION_COUNT |
diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig index 635e1bfb1c5d..e1e50101b3bb 100644 --- a/arch/tile/Kconfig +++ b/arch/tile/Kconfig | |||
@@ -5,7 +5,6 @@ config TILE | |||
5 | def_bool y | 5 | def_bool y |
6 | select HAVE_KVM if !TILEGX | 6 | select HAVE_KVM if !TILEGX |
7 | select GENERIC_FIND_FIRST_BIT | 7 | select GENERIC_FIND_FIRST_BIT |
8 | select GENERIC_FIND_NEXT_BIT | ||
9 | select USE_GENERIC_SMP_HELPERS | 8 | select USE_GENERIC_SMP_HELPERS |
10 | select CC_OPTIMIZE_FOR_SIZE | 9 | select CC_OPTIMIZE_FOR_SIZE |
11 | select HAVE_GENERIC_HARDIRQS | 10 | select HAVE_GENERIC_HARDIRQS |
diff --git a/arch/um/Kconfig.x86 b/arch/um/Kconfig.x86 index 795ea8e869f4..8aae429a56e2 100644 --- a/arch/um/Kconfig.x86 +++ b/arch/um/Kconfig.x86 | |||
@@ -15,7 +15,6 @@ endmenu | |||
15 | config UML_X86 | 15 | config UML_X86 |
16 | def_bool y | 16 | def_bool y |
17 | select GENERIC_FIND_FIRST_BIT | 17 | select GENERIC_FIND_FIRST_BIT |
18 | select GENERIC_FIND_NEXT_BIT | ||
19 | 18 | ||
20 | config 64BIT | 19 | config 64BIT |
21 | bool | 20 | bool |
diff --git a/arch/unicore32/include/asm/suspend.h b/arch/unicore32/include/asm/suspend.h index 88a9c0f32b21..65bad75c7e96 100644 --- a/arch/unicore32/include/asm/suspend.h +++ b/arch/unicore32/include/asm/suspend.h | |||
@@ -14,7 +14,6 @@ | |||
14 | #define __UNICORE_SUSPEND_H__ | 14 | #define __UNICORE_SUSPEND_H__ |
15 | 15 | ||
16 | #ifndef __ASSEMBLY__ | 16 | #ifndef __ASSEMBLY__ |
17 | static inline int arch_prepare_suspend(void) { return 0; } | ||
18 | 17 | ||
19 | #include <asm/ptrace.h> | 18 | #include <asm/ptrace.h> |
20 | 19 | ||
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 483775f42d2a..da349723d411 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig | |||
@@ -64,7 +64,6 @@ config X86 | |||
64 | select HAVE_GENERIC_HARDIRQS | 64 | select HAVE_GENERIC_HARDIRQS |
65 | select HAVE_SPARSE_IRQ | 65 | select HAVE_SPARSE_IRQ |
66 | select GENERIC_FIND_FIRST_BIT | 66 | select GENERIC_FIND_FIRST_BIT |
67 | select GENERIC_FIND_NEXT_BIT | ||
68 | select GENERIC_IRQ_PROBE | 67 | select GENERIC_IRQ_PROBE |
69 | select GENERIC_PENDING_IRQ if SMP | 68 | select GENERIC_PENDING_IRQ if SMP |
70 | select GENERIC_IRQ_SHOW | 69 | select GENERIC_IRQ_SHOW |
diff --git a/arch/x86/configs/i386_defconfig b/arch/x86/configs/i386_defconfig index 6f9872658dd2..2bf18059fbea 100644 --- a/arch/x86/configs/i386_defconfig +++ b/arch/x86/configs/i386_defconfig | |||
@@ -10,7 +10,6 @@ CONFIG_TASK_IO_ACCOUNTING=y | |||
10 | CONFIG_AUDIT=y | 10 | CONFIG_AUDIT=y |
11 | CONFIG_LOG_BUF_SHIFT=18 | 11 | CONFIG_LOG_BUF_SHIFT=18 |
12 | CONFIG_CGROUPS=y | 12 | CONFIG_CGROUPS=y |
13 | CONFIG_CGROUP_NS=y | ||
14 | CONFIG_CGROUP_FREEZER=y | 13 | CONFIG_CGROUP_FREEZER=y |
15 | CONFIG_CPUSETS=y | 14 | CONFIG_CPUSETS=y |
16 | CONFIG_CGROUP_CPUACCT=y | 15 | CONFIG_CGROUP_CPUACCT=y |
diff --git a/arch/x86/configs/x86_64_defconfig b/arch/x86/configs/x86_64_defconfig index ee01a9d5d4f0..22a0dc8e51dd 100644 --- a/arch/x86/configs/x86_64_defconfig +++ b/arch/x86/configs/x86_64_defconfig | |||
@@ -11,7 +11,6 @@ CONFIG_TASK_IO_ACCOUNTING=y | |||
11 | CONFIG_AUDIT=y | 11 | CONFIG_AUDIT=y |
12 | CONFIG_LOG_BUF_SHIFT=18 | 12 | CONFIG_LOG_BUF_SHIFT=18 |
13 | CONFIG_CGROUPS=y | 13 | CONFIG_CGROUPS=y |
14 | CONFIG_CGROUP_NS=y | ||
15 | CONFIG_CGROUP_FREEZER=y | 14 | CONFIG_CGROUP_FREEZER=y |
16 | CONFIG_CPUSETS=y | 15 | CONFIG_CPUSETS=y |
17 | CONFIG_CGROUP_CPUACCT=y | 16 | CONFIG_CGROUP_CPUACCT=y |
diff --git a/arch/x86/include/asm/kgdb.h b/arch/x86/include/asm/kgdb.h index 396f5b5fc4d7..77e95f54570a 100644 --- a/arch/x86/include/asm/kgdb.h +++ b/arch/x86/include/asm/kgdb.h | |||
@@ -77,6 +77,7 @@ static inline void arch_kgdb_breakpoint(void) | |||
77 | } | 77 | } |
78 | #define BREAK_INSTR_SIZE 1 | 78 | #define BREAK_INSTR_SIZE 1 |
79 | #define CACHE_FLUSH_IS_SAFE 1 | 79 | #define CACHE_FLUSH_IS_SAFE 1 |
80 | #define GDB_ADJUSTS_BREAK_OFFSET | ||
80 | 81 | ||
81 | extern int kgdb_ll_trap(int cmd, const char *str, | 82 | extern int kgdb_ll_trap(int cmd, const char *str, |
82 | struct pt_regs *regs, long err, int trap, int sig); | 83 | struct pt_regs *regs, long err, int trap, int sig); |
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h index 1babf8adecdf..94e7618fcac8 100644 --- a/arch/x86/include/asm/ptrace.h +++ b/arch/x86/include/asm/ptrace.h | |||
@@ -136,6 +136,7 @@ struct cpuinfo_x86; | |||
136 | struct task_struct; | 136 | struct task_struct; |
137 | 137 | ||
138 | extern unsigned long profile_pc(struct pt_regs *regs); | 138 | extern unsigned long profile_pc(struct pt_regs *regs); |
139 | #define profile_pc profile_pc | ||
139 | 140 | ||
140 | extern unsigned long | 141 | extern unsigned long |
141 | convert_ip_to_linear(struct task_struct *child, struct pt_regs *regs); | 142 | convert_ip_to_linear(struct task_struct *child, struct pt_regs *regs); |
@@ -202,20 +203,11 @@ static inline unsigned long kernel_stack_pointer(struct pt_regs *regs) | |||
202 | #endif | 203 | #endif |
203 | } | 204 | } |
204 | 205 | ||
205 | static inline unsigned long instruction_pointer(struct pt_regs *regs) | 206 | #define GET_IP(regs) ((regs)->ip) |
206 | { | 207 | #define GET_FP(regs) ((regs)->bp) |
207 | return regs->ip; | 208 | #define GET_USP(regs) ((regs)->sp) |
208 | } | ||
209 | |||
210 | static inline unsigned long frame_pointer(struct pt_regs *regs) | ||
211 | { | ||
212 | return regs->bp; | ||
213 | } | ||
214 | 209 | ||
215 | static inline unsigned long user_stack_pointer(struct pt_regs *regs) | 210 | #include <asm-generic/ptrace.h> |
216 | { | ||
217 | return regs->sp; | ||
218 | } | ||
219 | 211 | ||
220 | /* Query offset/name of register from its name/offset */ | 212 | /* Query offset/name of register from its name/offset */ |
221 | extern int regs_query_register_offset(const char *name); | 213 | extern int regs_query_register_offset(const char *name); |
diff --git a/arch/x86/include/asm/suspend_32.h b/arch/x86/include/asm/suspend_32.h index fd921c3a6841..487055c8c1aa 100644 --- a/arch/x86/include/asm/suspend_32.h +++ b/arch/x86/include/asm/suspend_32.h | |||
@@ -9,8 +9,6 @@ | |||
9 | #include <asm/desc.h> | 9 | #include <asm/desc.h> |
10 | #include <asm/i387.h> | 10 | #include <asm/i387.h> |
11 | 11 | ||
12 | static inline int arch_prepare_suspend(void) { return 0; } | ||
13 | |||
14 | /* image of the saved processor state */ | 12 | /* image of the saved processor state */ |
15 | struct saved_context { | 13 | struct saved_context { |
16 | u16 es, fs, gs, ss; | 14 | u16 es, fs, gs, ss; |
diff --git a/arch/x86/include/asm/suspend_64.h b/arch/x86/include/asm/suspend_64.h index 8d942afae681..09b0bf104156 100644 --- a/arch/x86/include/asm/suspend_64.h +++ b/arch/x86/include/asm/suspend_64.h | |||
@@ -9,11 +9,6 @@ | |||
9 | #include <asm/desc.h> | 9 | #include <asm/desc.h> |
10 | #include <asm/i387.h> | 10 | #include <asm/i387.h> |
11 | 11 | ||
12 | static inline int arch_prepare_suspend(void) | ||
13 | { | ||
14 | return 0; | ||
15 | } | ||
16 | |||
17 | /* | 12 | /* |
18 | * Image of the saved processor state, used by the low level ACPI suspend to | 13 | * Image of the saved processor state, used by the low level ACPI suspend to |
19 | * RAM code and by the low level hibernation code. | 14 | * RAM code and by the low level hibernation code. |
diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h index 83e2efd181e2..9db5583b6d38 100644 --- a/arch/x86/include/asm/tsc.h +++ b/arch/x86/include/asm/tsc.h | |||
@@ -51,6 +51,10 @@ extern int unsynchronized_tsc(void); | |||
51 | extern int check_tsc_unstable(void); | 51 | extern int check_tsc_unstable(void); |
52 | extern unsigned long native_calibrate_tsc(void); | 52 | extern unsigned long native_calibrate_tsc(void); |
53 | 53 | ||
54 | #ifdef CONFIG_X86_64 | ||
55 | extern cycles_t vread_tsc(void); | ||
56 | #endif | ||
57 | |||
54 | /* | 58 | /* |
55 | * Boot-time check whether the TSCs are synchronized across | 59 | * Boot-time check whether the TSCs are synchronized across |
56 | * all CPUs/cores: | 60 | * all CPUs/cores: |
diff --git a/arch/x86/include/asm/vdso.h b/arch/x86/include/asm/vdso.h index 9064052b73de..bb0522850b74 100644 --- a/arch/x86/include/asm/vdso.h +++ b/arch/x86/include/asm/vdso.h | |||
@@ -1,20 +1,6 @@ | |||
1 | #ifndef _ASM_X86_VDSO_H | 1 | #ifndef _ASM_X86_VDSO_H |
2 | #define _ASM_X86_VDSO_H | 2 | #define _ASM_X86_VDSO_H |
3 | 3 | ||
4 | #ifdef CONFIG_X86_64 | ||
5 | extern const char VDSO64_PRELINK[]; | ||
6 | |||
7 | /* | ||
8 | * Given a pointer to the vDSO image, find the pointer to VDSO64_name | ||
9 | * as that symbol is defined in the vDSO sources or linker script. | ||
10 | */ | ||
11 | #define VDSO64_SYMBOL(base, name) \ | ||
12 | ({ \ | ||
13 | extern const char VDSO64_##name[]; \ | ||
14 | (void *)(VDSO64_##name - VDSO64_PRELINK + (unsigned long)(base)); \ | ||
15 | }) | ||
16 | #endif | ||
17 | |||
18 | #if defined CONFIG_X86_32 || defined CONFIG_COMPAT | 4 | #if defined CONFIG_X86_32 || defined CONFIG_COMPAT |
19 | extern const char VDSO32_PRELINK[]; | 5 | extern const char VDSO32_PRELINK[]; |
20 | 6 | ||
diff --git a/arch/x86/include/asm/vgtod.h b/arch/x86/include/asm/vgtod.h index 3d61e204826f..646b4c1ca695 100644 --- a/arch/x86/include/asm/vgtod.h +++ b/arch/x86/include/asm/vgtod.h | |||
@@ -23,8 +23,6 @@ struct vsyscall_gtod_data { | |||
23 | struct timespec wall_to_monotonic; | 23 | struct timespec wall_to_monotonic; |
24 | struct timespec wall_time_coarse; | 24 | struct timespec wall_time_coarse; |
25 | }; | 25 | }; |
26 | extern struct vsyscall_gtod_data __vsyscall_gtod_data | ||
27 | __section_vsyscall_gtod_data; | ||
28 | extern struct vsyscall_gtod_data vsyscall_gtod_data; | 26 | extern struct vsyscall_gtod_data vsyscall_gtod_data; |
29 | 27 | ||
30 | #endif /* _ASM_X86_VGTOD_H */ | 28 | #endif /* _ASM_X86_VGTOD_H */ |
diff --git a/arch/x86/include/asm/vsyscall.h b/arch/x86/include/asm/vsyscall.h index d0983d255fbd..d55597351f6a 100644 --- a/arch/x86/include/asm/vsyscall.h +++ b/arch/x86/include/asm/vsyscall.h | |||
@@ -16,27 +16,19 @@ enum vsyscall_num { | |||
16 | #ifdef __KERNEL__ | 16 | #ifdef __KERNEL__ |
17 | #include <linux/seqlock.h> | 17 | #include <linux/seqlock.h> |
18 | 18 | ||
19 | #define __section_vgetcpu_mode __attribute__ ((unused, __section__ (".vgetcpu_mode"), aligned(16))) | ||
20 | #define __section_jiffies __attribute__ ((unused, __section__ (".jiffies"), aligned(16))) | ||
21 | |||
22 | /* Definitions for CONFIG_GENERIC_TIME definitions */ | 19 | /* Definitions for CONFIG_GENERIC_TIME definitions */ |
23 | #define __section_vsyscall_gtod_data __attribute__ \ | ||
24 | ((unused, __section__ (".vsyscall_gtod_data"),aligned(16))) | ||
25 | #define __section_vsyscall_clock __attribute__ \ | ||
26 | ((unused, __section__ (".vsyscall_clock"),aligned(16))) | ||
27 | #define __vsyscall_fn \ | 20 | #define __vsyscall_fn \ |
28 | __attribute__ ((unused, __section__(".vsyscall_fn"))) notrace | 21 | __attribute__ ((unused, __section__(".vsyscall_fn"))) notrace |
29 | 22 | ||
30 | #define VGETCPU_RDTSCP 1 | 23 | #define VGETCPU_RDTSCP 1 |
31 | #define VGETCPU_LSL 2 | 24 | #define VGETCPU_LSL 2 |
32 | 25 | ||
33 | extern int __vgetcpu_mode; | ||
34 | extern volatile unsigned long __jiffies; | ||
35 | |||
36 | /* kernel space (writeable) */ | 26 | /* kernel space (writeable) */ |
37 | extern int vgetcpu_mode; | 27 | extern int vgetcpu_mode; |
38 | extern struct timezone sys_tz; | 28 | extern struct timezone sys_tz; |
39 | 29 | ||
30 | #include <asm/vvar.h> | ||
31 | |||
40 | extern void map_vsyscall(void); | 32 | extern void map_vsyscall(void); |
41 | 33 | ||
42 | #endif /* __KERNEL__ */ | 34 | #endif /* __KERNEL__ */ |
diff --git a/arch/x86/include/asm/vvar.h b/arch/x86/include/asm/vvar.h new file mode 100644 index 000000000000..341b3559452b --- /dev/null +++ b/arch/x86/include/asm/vvar.h | |||
@@ -0,0 +1,52 @@ | |||
1 | /* | ||
2 | * vvar.h: Shared vDSO/kernel variable declarations | ||
3 | * Copyright (c) 2011 Andy Lutomirski | ||
4 | * Subject to the GNU General Public License, version 2 | ||
5 | * | ||
6 | * A handful of variables are accessible (read-only) from userspace | ||
7 | * code in the vsyscall page and the vdso. They are declared here. | ||
8 | * Some other file must define them with DEFINE_VVAR. | ||
9 | * | ||
10 | * In normal kernel code, they are used like any other variable. | ||
11 | * In user code, they are accessed through the VVAR macro. | ||
12 | * | ||
13 | * Each of these variables lives in the vsyscall page, and each | ||
14 | * one needs a unique offset within the little piece of the page | ||
15 | * reserved for vvars. Specify that offset in DECLARE_VVAR. | ||
16 | * (There are 896 bytes available. If you mess up, the linker will | ||
17 | * catch it.) | ||
18 | */ | ||
19 | |||
20 | /* Offset of vars within vsyscall page */ | ||
21 | #define VSYSCALL_VARS_OFFSET (3072 + 128) | ||
22 | |||
23 | #if defined(__VVAR_KERNEL_LDS) | ||
24 | |||
25 | /* The kernel linker script defines its own magic to put vvars in the | ||
26 | * right place. | ||
27 | */ | ||
28 | #define DECLARE_VVAR(offset, type, name) \ | ||
29 | EMIT_VVAR(name, VSYSCALL_VARS_OFFSET + offset) | ||
30 | |||
31 | #else | ||
32 | |||
33 | #define DECLARE_VVAR(offset, type, name) \ | ||
34 | static type const * const vvaraddr_ ## name = \ | ||
35 | (void *)(VSYSCALL_START + VSYSCALL_VARS_OFFSET + (offset)); | ||
36 | |||
37 | #define DEFINE_VVAR(type, name) \ | ||
38 | type __vvar_ ## name \ | ||
39 | __attribute__((section(".vsyscall_var_" #name), aligned(16))) | ||
40 | |||
41 | #define VVAR(name) (*vvaraddr_ ## name) | ||
42 | |||
43 | #endif | ||
44 | |||
45 | /* DECLARE_VVAR(offset, type, name) */ | ||
46 | |||
47 | DECLARE_VVAR(0, volatile unsigned long, jiffies) | ||
48 | DECLARE_VVAR(8, int, vgetcpu_mode) | ||
49 | DECLARE_VVAR(128, struct vsyscall_gtod_data, vsyscall_gtod_data) | ||
50 | |||
51 | #undef DECLARE_VVAR | ||
52 | #undef VSYSCALL_VARS_OFFSET | ||
diff --git a/arch/x86/include/asm/xen/hypercall.h b/arch/x86/include/asm/xen/hypercall.h index 8508bfe52296..d240ea950519 100644 --- a/arch/x86/include/asm/xen/hypercall.h +++ b/arch/x86/include/asm/xen/hypercall.h | |||
@@ -447,6 +447,13 @@ HYPERVISOR_hvm_op(int op, void *arg) | |||
447 | return _hypercall2(unsigned long, hvm_op, op, arg); | 447 | return _hypercall2(unsigned long, hvm_op, op, arg); |
448 | } | 448 | } |
449 | 449 | ||
450 | static inline int | ||
451 | HYPERVISOR_tmem_op( | ||
452 | struct tmem_op *op) | ||
453 | { | ||
454 | return _hypercall1(int, tmem_op, op); | ||
455 | } | ||
456 | |||
450 | static inline void | 457 | static inline void |
451 | MULTI_fpu_taskswitch(struct multicall_entry *mcl, int set) | 458 | MULTI_fpu_taskswitch(struct multicall_entry *mcl, int set) |
452 | { | 459 | { |
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile index 250806472a7e..f5abe3a245b8 100644 --- a/arch/x86/kernel/Makefile +++ b/arch/x86/kernel/Makefile | |||
@@ -8,7 +8,6 @@ CPPFLAGS_vmlinux.lds += -U$(UTS_MACHINE) | |||
8 | 8 | ||
9 | ifdef CONFIG_FUNCTION_TRACER | 9 | ifdef CONFIG_FUNCTION_TRACER |
10 | # Do not profile debug and lowlevel utilities | 10 | # Do not profile debug and lowlevel utilities |
11 | CFLAGS_REMOVE_tsc.o = -pg | ||
12 | CFLAGS_REMOVE_rtc.o = -pg | 11 | CFLAGS_REMOVE_rtc.o = -pg |
13 | CFLAGS_REMOVE_paravirt-spinlocks.o = -pg | 12 | CFLAGS_REMOVE_paravirt-spinlocks.o = -pg |
14 | CFLAGS_REMOVE_pvclock.o = -pg | 13 | CFLAGS_REMOVE_pvclock.o = -pg |
@@ -24,13 +23,16 @@ endif | |||
24 | nostackp := $(call cc-option, -fno-stack-protector) | 23 | nostackp := $(call cc-option, -fno-stack-protector) |
25 | CFLAGS_vsyscall_64.o := $(PROFILING) -g0 $(nostackp) | 24 | CFLAGS_vsyscall_64.o := $(PROFILING) -g0 $(nostackp) |
26 | CFLAGS_hpet.o := $(nostackp) | 25 | CFLAGS_hpet.o := $(nostackp) |
27 | CFLAGS_tsc.o := $(nostackp) | 26 | CFLAGS_vread_tsc_64.o := $(nostackp) |
28 | CFLAGS_paravirt.o := $(nostackp) | 27 | CFLAGS_paravirt.o := $(nostackp) |
29 | GCOV_PROFILE_vsyscall_64.o := n | 28 | GCOV_PROFILE_vsyscall_64.o := n |
30 | GCOV_PROFILE_hpet.o := n | 29 | GCOV_PROFILE_hpet.o := n |
31 | GCOV_PROFILE_tsc.o := n | 30 | GCOV_PROFILE_tsc.o := n |
32 | GCOV_PROFILE_paravirt.o := n | 31 | GCOV_PROFILE_paravirt.o := n |
33 | 32 | ||
33 | # vread_tsc_64 is hot and should be fully optimized: | ||
34 | CFLAGS_REMOVE_vread_tsc_64.o = -pg -fno-optimize-sibling-calls | ||
35 | |||
34 | obj-y := process_$(BITS).o signal.o entry_$(BITS).o | 36 | obj-y := process_$(BITS).o signal.o entry_$(BITS).o |
35 | obj-y += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o | 37 | obj-y += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o |
36 | obj-y += time.o ioport.o ldt.o dumpstack.o | 38 | obj-y += time.o ioport.o ldt.o dumpstack.o |
@@ -39,7 +41,7 @@ obj-$(CONFIG_IRQ_WORK) += irq_work.o | |||
39 | obj-y += probe_roms.o | 41 | obj-y += probe_roms.o |
40 | obj-$(CONFIG_X86_32) += sys_i386_32.o i386_ksyms_32.o | 42 | obj-$(CONFIG_X86_32) += sys_i386_32.o i386_ksyms_32.o |
41 | obj-$(CONFIG_X86_64) += sys_x86_64.o x8664_ksyms_64.o | 43 | obj-$(CONFIG_X86_64) += sys_x86_64.o x8664_ksyms_64.o |
42 | obj-$(CONFIG_X86_64) += syscall_64.o vsyscall_64.o | 44 | obj-$(CONFIG_X86_64) += syscall_64.o vsyscall_64.o vread_tsc_64.o |
43 | obj-y += bootflag.o e820.o | 45 | obj-y += bootflag.o e820.o |
44 | obj-y += pci-dma.o quirks.o topology.o kdebugfs.o | 46 | obj-y += pci-dma.o quirks.o topology.o kdebugfs.o |
45 | obj-y += alternative.o i8253.o pci-nommu.o hw_breakpoint.o | 47 | obj-y += alternative.o i8253.o pci-nommu.o hw_breakpoint.o |
diff --git a/arch/x86/kernel/time.c b/arch/x86/kernel/time.c index 25a28a245937..00cbb272627f 100644 --- a/arch/x86/kernel/time.c +++ b/arch/x86/kernel/time.c | |||
@@ -23,7 +23,7 @@ | |||
23 | #include <asm/time.h> | 23 | #include <asm/time.h> |
24 | 24 | ||
25 | #ifdef CONFIG_X86_64 | 25 | #ifdef CONFIG_X86_64 |
26 | volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES; | 26 | DEFINE_VVAR(volatile unsigned long, jiffies) = INITIAL_JIFFIES; |
27 | #endif | 27 | #endif |
28 | 28 | ||
29 | unsigned long profile_pc(struct pt_regs *regs) | 29 | unsigned long profile_pc(struct pt_regs *regs) |
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 9335bf7dd2e7..6cc6922262af 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c | |||
@@ -763,25 +763,6 @@ static cycle_t read_tsc(struct clocksource *cs) | |||
763 | ret : clocksource_tsc.cycle_last; | 763 | ret : clocksource_tsc.cycle_last; |
764 | } | 764 | } |
765 | 765 | ||
766 | #ifdef CONFIG_X86_64 | ||
767 | static cycle_t __vsyscall_fn vread_tsc(void) | ||
768 | { | ||
769 | cycle_t ret; | ||
770 | |||
771 | /* | ||
772 | * Surround the RDTSC by barriers, to make sure it's not | ||
773 | * speculated to outside the seqlock critical section and | ||
774 | * does not cause time warps: | ||
775 | */ | ||
776 | rdtsc_barrier(); | ||
777 | ret = (cycle_t)vget_cycles(); | ||
778 | rdtsc_barrier(); | ||
779 | |||
780 | return ret >= __vsyscall_gtod_data.clock.cycle_last ? | ||
781 | ret : __vsyscall_gtod_data.clock.cycle_last; | ||
782 | } | ||
783 | #endif | ||
784 | |||
785 | static void resume_tsc(struct clocksource *cs) | 766 | static void resume_tsc(struct clocksource *cs) |
786 | { | 767 | { |
787 | clocksource_tsc.cycle_last = 0; | 768 | clocksource_tsc.cycle_last = 0; |
diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S index 61682f0ac264..89aed99aafce 100644 --- a/arch/x86/kernel/vmlinux.lds.S +++ b/arch/x86/kernel/vmlinux.lds.S | |||
@@ -161,6 +161,12 @@ SECTIONS | |||
161 | 161 | ||
162 | #define VVIRT_OFFSET (VSYSCALL_ADDR - __vsyscall_0) | 162 | #define VVIRT_OFFSET (VSYSCALL_ADDR - __vsyscall_0) |
163 | #define VVIRT(x) (ADDR(x) - VVIRT_OFFSET) | 163 | #define VVIRT(x) (ADDR(x) - VVIRT_OFFSET) |
164 | #define EMIT_VVAR(x, offset) .vsyscall_var_ ## x \ | ||
165 | ADDR(.vsyscall_0) + offset \ | ||
166 | : AT(VLOAD(.vsyscall_var_ ## x)) { \ | ||
167 | *(.vsyscall_var_ ## x) \ | ||
168 | } \ | ||
169 | x = VVIRT(.vsyscall_var_ ## x); | ||
164 | 170 | ||
165 | . = ALIGN(4096); | 171 | . = ALIGN(4096); |
166 | __vsyscall_0 = .; | 172 | __vsyscall_0 = .; |
@@ -175,18 +181,6 @@ SECTIONS | |||
175 | *(.vsyscall_fn) | 181 | *(.vsyscall_fn) |
176 | } | 182 | } |
177 | 183 | ||
178 | . = ALIGN(L1_CACHE_BYTES); | ||
179 | .vsyscall_gtod_data : AT(VLOAD(.vsyscall_gtod_data)) { | ||
180 | *(.vsyscall_gtod_data) | ||
181 | } | ||
182 | |||
183 | vsyscall_gtod_data = VVIRT(.vsyscall_gtod_data); | ||
184 | .vsyscall_clock : AT(VLOAD(.vsyscall_clock)) { | ||
185 | *(.vsyscall_clock) | ||
186 | } | ||
187 | vsyscall_clock = VVIRT(.vsyscall_clock); | ||
188 | |||
189 | |||
190 | .vsyscall_1 ADDR(.vsyscall_0) + 1024: AT(VLOAD(.vsyscall_1)) { | 184 | .vsyscall_1 ADDR(.vsyscall_0) + 1024: AT(VLOAD(.vsyscall_1)) { |
191 | *(.vsyscall_1) | 185 | *(.vsyscall_1) |
192 | } | 186 | } |
@@ -194,21 +188,14 @@ SECTIONS | |||
194 | *(.vsyscall_2) | 188 | *(.vsyscall_2) |
195 | } | 189 | } |
196 | 190 | ||
197 | .vgetcpu_mode : AT(VLOAD(.vgetcpu_mode)) { | ||
198 | *(.vgetcpu_mode) | ||
199 | } | ||
200 | vgetcpu_mode = VVIRT(.vgetcpu_mode); | ||
201 | |||
202 | . = ALIGN(L1_CACHE_BYTES); | ||
203 | .jiffies : AT(VLOAD(.jiffies)) { | ||
204 | *(.jiffies) | ||
205 | } | ||
206 | jiffies = VVIRT(.jiffies); | ||
207 | |||
208 | .vsyscall_3 ADDR(.vsyscall_0) + 3072: AT(VLOAD(.vsyscall_3)) { | 191 | .vsyscall_3 ADDR(.vsyscall_0) + 3072: AT(VLOAD(.vsyscall_3)) { |
209 | *(.vsyscall_3) | 192 | *(.vsyscall_3) |
210 | } | 193 | } |
211 | 194 | ||
195 | #define __VVAR_KERNEL_LDS | ||
196 | #include <asm/vvar.h> | ||
197 | #undef __VVAR_KERNEL_LDS | ||
198 | |||
212 | . = __vsyscall_0 + PAGE_SIZE; | 199 | . = __vsyscall_0 + PAGE_SIZE; |
213 | 200 | ||
214 | #undef VSYSCALL_ADDR | 201 | #undef VSYSCALL_ADDR |
@@ -216,6 +203,7 @@ SECTIONS | |||
216 | #undef VLOAD | 203 | #undef VLOAD |
217 | #undef VVIRT_OFFSET | 204 | #undef VVIRT_OFFSET |
218 | #undef VVIRT | 205 | #undef VVIRT |
206 | #undef EMIT_VVAR | ||
219 | 207 | ||
220 | #endif /* CONFIG_X86_64 */ | 208 | #endif /* CONFIG_X86_64 */ |
221 | 209 | ||
diff --git a/arch/x86/kernel/vread_tsc_64.c b/arch/x86/kernel/vread_tsc_64.c new file mode 100644 index 000000000000..a81aa9e9894c --- /dev/null +++ b/arch/x86/kernel/vread_tsc_64.c | |||
@@ -0,0 +1,36 @@ | |||
1 | /* This code runs in userspace. */ | ||
2 | |||
3 | #define DISABLE_BRANCH_PROFILING | ||
4 | #include <asm/vgtod.h> | ||
5 | |||
6 | notrace cycle_t __vsyscall_fn vread_tsc(void) | ||
7 | { | ||
8 | cycle_t ret; | ||
9 | u64 last; | ||
10 | |||
11 | /* | ||
12 | * Empirically, a fence (of type that depends on the CPU) | ||
13 | * before rdtsc is enough to ensure that rdtsc is ordered | ||
14 | * with respect to loads. The various CPU manuals are unclear | ||
15 | * as to whether rdtsc can be reordered with later loads, | ||
16 | * but no one has ever seen it happen. | ||
17 | */ | ||
18 | rdtsc_barrier(); | ||
19 | ret = (cycle_t)vget_cycles(); | ||
20 | |||
21 | last = VVAR(vsyscall_gtod_data).clock.cycle_last; | ||
22 | |||
23 | if (likely(ret >= last)) | ||
24 | return ret; | ||
25 | |||
26 | /* | ||
27 | * GCC likes to generate cmov here, but this branch is extremely | ||
28 | * predictable (it's just a funciton of time and the likely is | ||
29 | * very likely) and there's a data dependence, so force GCC | ||
30 | * to generate a branch instead. I don't barrier() because | ||
31 | * we don't actually need a barrier, and if this function | ||
32 | * ever gets inlined it will generate worse code. | ||
33 | */ | ||
34 | asm volatile (""); | ||
35 | return last; | ||
36 | } | ||
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c index dcbb28c4b694..3e682184d76c 100644 --- a/arch/x86/kernel/vsyscall_64.c +++ b/arch/x86/kernel/vsyscall_64.c | |||
@@ -49,17 +49,10 @@ | |||
49 | __attribute__ ((unused, __section__(".vsyscall_" #nr))) notrace | 49 | __attribute__ ((unused, __section__(".vsyscall_" #nr))) notrace |
50 | #define __syscall_clobber "r11","cx","memory" | 50 | #define __syscall_clobber "r11","cx","memory" |
51 | 51 | ||
52 | /* | 52 | DEFINE_VVAR(int, vgetcpu_mode); |
53 | * vsyscall_gtod_data contains data that is : | 53 | DEFINE_VVAR(struct vsyscall_gtod_data, vsyscall_gtod_data) = |
54 | * - readonly from vsyscalls | ||
55 | * - written by timer interrupt or systcl (/proc/sys/kernel/vsyscall64) | ||
56 | * Try to keep this structure as small as possible to avoid cache line ping pongs | ||
57 | */ | ||
58 | int __vgetcpu_mode __section_vgetcpu_mode; | ||
59 | |||
60 | struct vsyscall_gtod_data __vsyscall_gtod_data __section_vsyscall_gtod_data = | ||
61 | { | 54 | { |
62 | .lock = SEQLOCK_UNLOCKED, | 55 | .lock = __SEQLOCK_UNLOCKED(__vsyscall_gtod_data.lock), |
63 | .sysctl_enabled = 1, | 56 | .sysctl_enabled = 1, |
64 | }; | 57 | }; |
65 | 58 | ||
@@ -97,7 +90,7 @@ void update_vsyscall(struct timespec *wall_time, struct timespec *wtm, | |||
97 | */ | 90 | */ |
98 | static __always_inline void do_get_tz(struct timezone * tz) | 91 | static __always_inline void do_get_tz(struct timezone * tz) |
99 | { | 92 | { |
100 | *tz = __vsyscall_gtod_data.sys_tz; | 93 | *tz = VVAR(vsyscall_gtod_data).sys_tz; |
101 | } | 94 | } |
102 | 95 | ||
103 | static __always_inline int gettimeofday(struct timeval *tv, struct timezone *tz) | 96 | static __always_inline int gettimeofday(struct timeval *tv, struct timezone *tz) |
@@ -126,23 +119,24 @@ static __always_inline void do_vgettimeofday(struct timeval * tv) | |||
126 | unsigned long mult, shift, nsec; | 119 | unsigned long mult, shift, nsec; |
127 | cycle_t (*vread)(void); | 120 | cycle_t (*vread)(void); |
128 | do { | 121 | do { |
129 | seq = read_seqbegin(&__vsyscall_gtod_data.lock); | 122 | seq = read_seqbegin(&VVAR(vsyscall_gtod_data).lock); |
130 | 123 | ||
131 | vread = __vsyscall_gtod_data.clock.vread; | 124 | vread = VVAR(vsyscall_gtod_data).clock.vread; |
132 | if (unlikely(!__vsyscall_gtod_data.sysctl_enabled || !vread)) { | 125 | if (unlikely(!VVAR(vsyscall_gtod_data).sysctl_enabled || |
126 | !vread)) { | ||
133 | gettimeofday(tv,NULL); | 127 | gettimeofday(tv,NULL); |
134 | return; | 128 | return; |
135 | } | 129 | } |
136 | 130 | ||
137 | now = vread(); | 131 | now = vread(); |
138 | base = __vsyscall_gtod_data.clock.cycle_last; | 132 | base = VVAR(vsyscall_gtod_data).clock.cycle_last; |
139 | mask = __vsyscall_gtod_data.clock.mask; | 133 | mask = VVAR(vsyscall_gtod_data).clock.mask; |
140 | mult = __vsyscall_gtod_data.clock.mult; | 134 | mult = VVAR(vsyscall_gtod_data).clock.mult; |
141 | shift = __vsyscall_gtod_data.clock.shift; | 135 | shift = VVAR(vsyscall_gtod_data).clock.shift; |
142 | 136 | ||
143 | tv->tv_sec = __vsyscall_gtod_data.wall_time_sec; | 137 | tv->tv_sec = VVAR(vsyscall_gtod_data).wall_time_sec; |
144 | nsec = __vsyscall_gtod_data.wall_time_nsec; | 138 | nsec = VVAR(vsyscall_gtod_data).wall_time_nsec; |
145 | } while (read_seqretry(&__vsyscall_gtod_data.lock, seq)); | 139 | } while (read_seqretry(&VVAR(vsyscall_gtod_data).lock, seq)); |
146 | 140 | ||
147 | /* calculate interval: */ | 141 | /* calculate interval: */ |
148 | cycle_delta = (now - base) & mask; | 142 | cycle_delta = (now - base) & mask; |
@@ -171,15 +165,15 @@ time_t __vsyscall(1) vtime(time_t *t) | |||
171 | { | 165 | { |
172 | unsigned seq; | 166 | unsigned seq; |
173 | time_t result; | 167 | time_t result; |
174 | if (unlikely(!__vsyscall_gtod_data.sysctl_enabled)) | 168 | if (unlikely(!VVAR(vsyscall_gtod_data).sysctl_enabled)) |
175 | return time_syscall(t); | 169 | return time_syscall(t); |
176 | 170 | ||
177 | do { | 171 | do { |
178 | seq = read_seqbegin(&__vsyscall_gtod_data.lock); | 172 | seq = read_seqbegin(&VVAR(vsyscall_gtod_data).lock); |
179 | 173 | ||
180 | result = __vsyscall_gtod_data.wall_time_sec; | 174 | result = VVAR(vsyscall_gtod_data).wall_time_sec; |
181 | 175 | ||
182 | } while (read_seqretry(&__vsyscall_gtod_data.lock, seq)); | 176 | } while (read_seqretry(&VVAR(vsyscall_gtod_data).lock, seq)); |
183 | 177 | ||
184 | if (t) | 178 | if (t) |
185 | *t = result; | 179 | *t = result; |
@@ -208,9 +202,9 @@ vgetcpu(unsigned *cpu, unsigned *node, struct getcpu_cache *tcache) | |||
208 | We do this here because otherwise user space would do it on | 202 | We do this here because otherwise user space would do it on |
209 | its own in a likely inferior way (no access to jiffies). | 203 | its own in a likely inferior way (no access to jiffies). |
210 | If you don't like it pass NULL. */ | 204 | If you don't like it pass NULL. */ |
211 | if (tcache && tcache->blob[0] == (j = __jiffies)) { | 205 | if (tcache && tcache->blob[0] == (j = VVAR(jiffies))) { |
212 | p = tcache->blob[1]; | 206 | p = tcache->blob[1]; |
213 | } else if (__vgetcpu_mode == VGETCPU_RDTSCP) { | 207 | } else if (VVAR(vgetcpu_mode) == VGETCPU_RDTSCP) { |
214 | /* Load per CPU data from RDTSCP */ | 208 | /* Load per CPU data from RDTSCP */ |
215 | native_read_tscp(&p); | 209 | native_read_tscp(&p); |
216 | } else { | 210 | } else { |
diff --git a/arch/x86/vdso/Makefile b/arch/x86/vdso/Makefile index b6552b189bcd..bef0bc962400 100644 --- a/arch/x86/vdso/Makefile +++ b/arch/x86/vdso/Makefile | |||
@@ -11,7 +11,7 @@ vdso-install-$(VDSO32-y) += $(vdso32-images) | |||
11 | 11 | ||
12 | 12 | ||
13 | # files to link into the vdso | 13 | # files to link into the vdso |
14 | vobjs-y := vdso-note.o vclock_gettime.o vgetcpu.o vvar.o | 14 | vobjs-y := vdso-note.o vclock_gettime.o vgetcpu.o |
15 | 15 | ||
16 | # files to link into kernel | 16 | # files to link into kernel |
17 | obj-$(VDSO64-y) += vma.o vdso.o | 17 | obj-$(VDSO64-y) += vma.o vdso.o |
@@ -37,11 +37,24 @@ $(obj)/%.so: OBJCOPYFLAGS := -S | |||
37 | $(obj)/%.so: $(obj)/%.so.dbg FORCE | 37 | $(obj)/%.so: $(obj)/%.so.dbg FORCE |
38 | $(call if_changed,objcopy) | 38 | $(call if_changed,objcopy) |
39 | 39 | ||
40 | # | ||
41 | # Don't omit frame pointers for ease of userspace debugging, but do | ||
42 | # optimize sibling calls. | ||
43 | # | ||
40 | CFL := $(PROFILING) -mcmodel=small -fPIC -O2 -fasynchronous-unwind-tables -m64 \ | 44 | CFL := $(PROFILING) -mcmodel=small -fPIC -O2 -fasynchronous-unwind-tables -m64 \ |
41 | $(filter -g%,$(KBUILD_CFLAGS)) $(call cc-option, -fno-stack-protector) | 45 | $(filter -g%,$(KBUILD_CFLAGS)) $(call cc-option, -fno-stack-protector) \ |
46 | -fno-omit-frame-pointer -foptimize-sibling-calls | ||
42 | 47 | ||
43 | $(vobjs): KBUILD_CFLAGS += $(CFL) | 48 | $(vobjs): KBUILD_CFLAGS += $(CFL) |
44 | 49 | ||
50 | # | ||
51 | # vDSO code runs in userspace and -pg doesn't help with profiling anyway. | ||
52 | # | ||
53 | CFLAGS_REMOVE_vdso-note.o = -pg | ||
54 | CFLAGS_REMOVE_vclock_gettime.o = -pg | ||
55 | CFLAGS_REMOVE_vgetcpu.o = -pg | ||
56 | CFLAGS_REMOVE_vvar.o = -pg | ||
57 | |||
45 | targets += vdso-syms.lds | 58 | targets += vdso-syms.lds |
46 | obj-$(VDSO64-y) += vdso-syms.lds | 59 | obj-$(VDSO64-y) += vdso-syms.lds |
47 | 60 | ||
diff --git a/arch/x86/vdso/vclock_gettime.c b/arch/x86/vdso/vclock_gettime.c index ee55754cc3c5..a724905fdae7 100644 --- a/arch/x86/vdso/vclock_gettime.c +++ b/arch/x86/vdso/vclock_gettime.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * Copyright 2006 Andi Kleen, SUSE Labs. | 2 | * Copyright 2006 Andi Kleen, SUSE Labs. |
3 | * Subject to the GNU Public License, v.2 | 3 | * Subject to the GNU Public License, v.2 |
4 | * | 4 | * |
5 | * Fast user context implementation of clock_gettime and gettimeofday. | 5 | * Fast user context implementation of clock_gettime, gettimeofday, and time. |
6 | * | 6 | * |
7 | * The code should have no internal unresolved relocations. | 7 | * The code should have no internal unresolved relocations. |
8 | * Check with readelf after changing. | 8 | * Check with readelf after changing. |
@@ -22,9 +22,8 @@ | |||
22 | #include <asm/hpet.h> | 22 | #include <asm/hpet.h> |
23 | #include <asm/unistd.h> | 23 | #include <asm/unistd.h> |
24 | #include <asm/io.h> | 24 | #include <asm/io.h> |
25 | #include "vextern.h" | ||
26 | 25 | ||
27 | #define gtod vdso_vsyscall_gtod_data | 26 | #define gtod (&VVAR(vsyscall_gtod_data)) |
28 | 27 | ||
29 | notrace static long vdso_fallback_gettime(long clock, struct timespec *ts) | 28 | notrace static long vdso_fallback_gettime(long clock, struct timespec *ts) |
30 | { | 29 | { |
@@ -56,22 +55,6 @@ notrace static noinline int do_realtime(struct timespec *ts) | |||
56 | return 0; | 55 | return 0; |
57 | } | 56 | } |
58 | 57 | ||
59 | /* Copy of the version in kernel/time.c which we cannot directly access */ | ||
60 | notrace static void | ||
61 | vset_normalized_timespec(struct timespec *ts, long sec, long nsec) | ||
62 | { | ||
63 | while (nsec >= NSEC_PER_SEC) { | ||
64 | nsec -= NSEC_PER_SEC; | ||
65 | ++sec; | ||
66 | } | ||
67 | while (nsec < 0) { | ||
68 | nsec += NSEC_PER_SEC; | ||
69 | --sec; | ||
70 | } | ||
71 | ts->tv_sec = sec; | ||
72 | ts->tv_nsec = nsec; | ||
73 | } | ||
74 | |||
75 | notrace static noinline int do_monotonic(struct timespec *ts) | 58 | notrace static noinline int do_monotonic(struct timespec *ts) |
76 | { | 59 | { |
77 | unsigned long seq, ns, secs; | 60 | unsigned long seq, ns, secs; |
@@ -82,7 +65,17 @@ notrace static noinline int do_monotonic(struct timespec *ts) | |||
82 | secs += gtod->wall_to_monotonic.tv_sec; | 65 | secs += gtod->wall_to_monotonic.tv_sec; |
83 | ns += gtod->wall_to_monotonic.tv_nsec; | 66 | ns += gtod->wall_to_monotonic.tv_nsec; |
84 | } while (unlikely(read_seqretry(>od->lock, seq))); | 67 | } while (unlikely(read_seqretry(>od->lock, seq))); |
85 | vset_normalized_timespec(ts, secs, ns); | 68 | |
69 | /* wall_time_nsec, vgetns(), and wall_to_monotonic.tv_nsec | ||
70 | * are all guaranteed to be nonnegative. | ||
71 | */ | ||
72 | while (ns >= NSEC_PER_SEC) { | ||
73 | ns -= NSEC_PER_SEC; | ||
74 | ++secs; | ||
75 | } | ||
76 | ts->tv_sec = secs; | ||
77 | ts->tv_nsec = ns; | ||
78 | |||
86 | return 0; | 79 | return 0; |
87 | } | 80 | } |
88 | 81 | ||
@@ -107,7 +100,17 @@ notrace static noinline int do_monotonic_coarse(struct timespec *ts) | |||
107 | secs += gtod->wall_to_monotonic.tv_sec; | 100 | secs += gtod->wall_to_monotonic.tv_sec; |
108 | ns += gtod->wall_to_monotonic.tv_nsec; | 101 | ns += gtod->wall_to_monotonic.tv_nsec; |
109 | } while (unlikely(read_seqretry(>od->lock, seq))); | 102 | } while (unlikely(read_seqretry(>od->lock, seq))); |
110 | vset_normalized_timespec(ts, secs, ns); | 103 | |
104 | /* wall_time_nsec and wall_to_monotonic.tv_nsec are | ||
105 | * guaranteed to be between 0 and NSEC_PER_SEC. | ||
106 | */ | ||
107 | if (ns >= NSEC_PER_SEC) { | ||
108 | ns -= NSEC_PER_SEC; | ||
109 | ++secs; | ||
110 | } | ||
111 | ts->tv_sec = secs; | ||
112 | ts->tv_nsec = ns; | ||
113 | |||
111 | return 0; | 114 | return 0; |
112 | } | 115 | } |
113 | 116 | ||
@@ -157,3 +160,32 @@ notrace int __vdso_gettimeofday(struct timeval *tv, struct timezone *tz) | |||
157 | } | 160 | } |
158 | int gettimeofday(struct timeval *, struct timezone *) | 161 | int gettimeofday(struct timeval *, struct timezone *) |
159 | __attribute__((weak, alias("__vdso_gettimeofday"))); | 162 | __attribute__((weak, alias("__vdso_gettimeofday"))); |
163 | |||
164 | /* This will break when the xtime seconds get inaccurate, but that is | ||
165 | * unlikely */ | ||
166 | |||
167 | static __always_inline long time_syscall(long *t) | ||
168 | { | ||
169 | long secs; | ||
170 | asm volatile("syscall" | ||
171 | : "=a" (secs) | ||
172 | : "0" (__NR_time), "D" (t) : "cc", "r11", "cx", "memory"); | ||
173 | return secs; | ||
174 | } | ||
175 | |||
176 | notrace time_t __vdso_time(time_t *t) | ||
177 | { | ||
178 | time_t result; | ||
179 | |||
180 | if (unlikely(!VVAR(vsyscall_gtod_data).sysctl_enabled)) | ||
181 | return time_syscall(t); | ||
182 | |||
183 | /* This is atomic on x86_64 so we don't need any locks. */ | ||
184 | result = ACCESS_ONCE(VVAR(vsyscall_gtod_data).wall_time_sec); | ||
185 | |||
186 | if (t) | ||
187 | *t = result; | ||
188 | return result; | ||
189 | } | ||
190 | int time(time_t *t) | ||
191 | __attribute__((weak, alias("__vdso_time"))); | ||
diff --git a/arch/x86/vdso/vdso.lds.S b/arch/x86/vdso/vdso.lds.S index 4e5dd3b4de7f..b96b2677cad8 100644 --- a/arch/x86/vdso/vdso.lds.S +++ b/arch/x86/vdso/vdso.lds.S | |||
@@ -23,15 +23,10 @@ VERSION { | |||
23 | __vdso_gettimeofday; | 23 | __vdso_gettimeofday; |
24 | getcpu; | 24 | getcpu; |
25 | __vdso_getcpu; | 25 | __vdso_getcpu; |
26 | time; | ||
27 | __vdso_time; | ||
26 | local: *; | 28 | local: *; |
27 | }; | 29 | }; |
28 | } | 30 | } |
29 | 31 | ||
30 | VDSO64_PRELINK = VDSO_PRELINK; | 32 | VDSO64_PRELINK = VDSO_PRELINK; |
31 | |||
32 | /* | ||
33 | * Define VDSO64_x for each VEXTERN(x), for use via VDSO64_SYMBOL. | ||
34 | */ | ||
35 | #define VEXTERN(x) VDSO64_ ## x = vdso_ ## x; | ||
36 | #include "vextern.h" | ||
37 | #undef VEXTERN | ||
diff --git a/arch/x86/vdso/vextern.h b/arch/x86/vdso/vextern.h deleted file mode 100644 index 1683ba2ae3e8..000000000000 --- a/arch/x86/vdso/vextern.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | #ifndef VEXTERN | ||
2 | #include <asm/vsyscall.h> | ||
3 | #define VEXTERN(x) \ | ||
4 | extern typeof(x) *vdso_ ## x __attribute__((visibility("hidden"))); | ||
5 | #endif | ||
6 | |||
7 | #define VMAGIC 0xfeedbabeabcdefabUL | ||
8 | |||
9 | /* Any kernel variables used in the vDSO must be exported in the main | ||
10 | kernel's vmlinux.lds.S/vsyscall.h/proper __section and | ||
11 | put into vextern.h and be referenced as a pointer with vdso prefix. | ||
12 | The main kernel later fills in the values. */ | ||
13 | |||
14 | VEXTERN(jiffies) | ||
15 | VEXTERN(vgetcpu_mode) | ||
16 | VEXTERN(vsyscall_gtod_data) | ||
diff --git a/arch/x86/vdso/vgetcpu.c b/arch/x86/vdso/vgetcpu.c index 9fbc6b20026b..5463ad558573 100644 --- a/arch/x86/vdso/vgetcpu.c +++ b/arch/x86/vdso/vgetcpu.c | |||
@@ -11,14 +11,13 @@ | |||
11 | #include <linux/time.h> | 11 | #include <linux/time.h> |
12 | #include <asm/vsyscall.h> | 12 | #include <asm/vsyscall.h> |
13 | #include <asm/vgtod.h> | 13 | #include <asm/vgtod.h> |
14 | #include "vextern.h" | ||
15 | 14 | ||
16 | notrace long | 15 | notrace long |
17 | __vdso_getcpu(unsigned *cpu, unsigned *node, struct getcpu_cache *unused) | 16 | __vdso_getcpu(unsigned *cpu, unsigned *node, struct getcpu_cache *unused) |
18 | { | 17 | { |
19 | unsigned int p; | 18 | unsigned int p; |
20 | 19 | ||
21 | if (*vdso_vgetcpu_mode == VGETCPU_RDTSCP) { | 20 | if (VVAR(vgetcpu_mode) == VGETCPU_RDTSCP) { |
22 | /* Load per CPU data from RDTSCP */ | 21 | /* Load per CPU data from RDTSCP */ |
23 | native_read_tscp(&p); | 22 | native_read_tscp(&p); |
24 | } else { | 23 | } else { |
diff --git a/arch/x86/vdso/vma.c b/arch/x86/vdso/vma.c index 4b5d26f108bb..7abd2be0f9b9 100644 --- a/arch/x86/vdso/vma.c +++ b/arch/x86/vdso/vma.c | |||
@@ -15,9 +15,6 @@ | |||
15 | #include <asm/proto.h> | 15 | #include <asm/proto.h> |
16 | #include <asm/vdso.h> | 16 | #include <asm/vdso.h> |
17 | 17 | ||
18 | #include "vextern.h" /* Just for VMAGIC. */ | ||
19 | #undef VEXTERN | ||
20 | |||
21 | unsigned int __read_mostly vdso_enabled = 1; | 18 | unsigned int __read_mostly vdso_enabled = 1; |
22 | 19 | ||
23 | extern char vdso_start[], vdso_end[]; | 20 | extern char vdso_start[], vdso_end[]; |
@@ -26,20 +23,10 @@ extern unsigned short vdso_sync_cpuid; | |||
26 | static struct page **vdso_pages; | 23 | static struct page **vdso_pages; |
27 | static unsigned vdso_size; | 24 | static unsigned vdso_size; |
28 | 25 | ||
29 | static inline void *var_ref(void *p, char *name) | ||
30 | { | ||
31 | if (*(void **)p != (void *)VMAGIC) { | ||
32 | printk("VDSO: variable %s broken\n", name); | ||
33 | vdso_enabled = 0; | ||
34 | } | ||
35 | return p; | ||
36 | } | ||
37 | |||
38 | static int __init init_vdso_vars(void) | 26 | static int __init init_vdso_vars(void) |
39 | { | 27 | { |
40 | int npages = (vdso_end - vdso_start + PAGE_SIZE - 1) / PAGE_SIZE; | 28 | int npages = (vdso_end - vdso_start + PAGE_SIZE - 1) / PAGE_SIZE; |
41 | int i; | 29 | int i; |
42 | char *vbase; | ||
43 | 30 | ||
44 | vdso_size = npages << PAGE_SHIFT; | 31 | vdso_size = npages << PAGE_SHIFT; |
45 | vdso_pages = kmalloc(sizeof(struct page *) * npages, GFP_KERNEL); | 32 | vdso_pages = kmalloc(sizeof(struct page *) * npages, GFP_KERNEL); |
@@ -54,20 +41,6 @@ static int __init init_vdso_vars(void) | |||
54 | copy_page(page_address(p), vdso_start + i*PAGE_SIZE); | 41 | copy_page(page_address(p), vdso_start + i*PAGE_SIZE); |
55 | } | 42 | } |
56 | 43 | ||
57 | vbase = vmap(vdso_pages, npages, 0, PAGE_KERNEL); | ||
58 | if (!vbase) | ||
59 | goto oom; | ||
60 | |||
61 | if (memcmp(vbase, "\177ELF", 4)) { | ||
62 | printk("VDSO: I'm broken; not ELF\n"); | ||
63 | vdso_enabled = 0; | ||
64 | } | ||
65 | |||
66 | #define VEXTERN(x) \ | ||
67 | *(typeof(__ ## x) **) var_ref(VDSO64_SYMBOL(vbase, x), #x) = &__ ## x; | ||
68 | #include "vextern.h" | ||
69 | #undef VEXTERN | ||
70 | vunmap(vbase); | ||
71 | return 0; | 44 | return 0; |
72 | 45 | ||
73 | oom: | 46 | oom: |
diff --git a/arch/x86/vdso/vvar.c b/arch/x86/vdso/vvar.c deleted file mode 100644 index 1b7e703684f9..000000000000 --- a/arch/x86/vdso/vvar.c +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | /* Define pointer to external vDSO variables. | ||
2 | These are part of the vDSO. The kernel fills in the real addresses | ||
3 | at boot time. This is done because when the vdso is linked the | ||
4 | kernel isn't yet and we don't know the final addresses. */ | ||
5 | #include <linux/kernel.h> | ||
6 | #include <linux/time.h> | ||
7 | #include <asm/vsyscall.h> | ||
8 | #include <asm/timex.h> | ||
9 | #include <asm/vgtod.h> | ||
10 | |||
11 | #define VEXTERN(x) typeof (__ ## x) *const vdso_ ## x = (void *)VMAGIC; | ||
12 | #include "vextern.h" | ||
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c index 02d752460371..dc708dcc62f1 100644 --- a/arch/x86/xen/mmu.c +++ b/arch/x86/xen/mmu.c | |||
@@ -75,67 +75,12 @@ | |||
75 | #include "mmu.h" | 75 | #include "mmu.h" |
76 | #include "debugfs.h" | 76 | #include "debugfs.h" |
77 | 77 | ||
78 | #define MMU_UPDATE_HISTO 30 | ||
79 | |||
80 | /* | 78 | /* |
81 | * Protects atomic reservation decrease/increase against concurrent increases. | 79 | * Protects atomic reservation decrease/increase against concurrent increases. |
82 | * Also protects non-atomic updates of current_pages and balloon lists. | 80 | * Also protects non-atomic updates of current_pages and balloon lists. |
83 | */ | 81 | */ |
84 | DEFINE_SPINLOCK(xen_reservation_lock); | 82 | DEFINE_SPINLOCK(xen_reservation_lock); |
85 | 83 | ||
86 | #ifdef CONFIG_XEN_DEBUG_FS | ||
87 | |||
88 | static struct { | ||
89 | u32 pgd_update; | ||
90 | u32 pgd_update_pinned; | ||
91 | u32 pgd_update_batched; | ||
92 | |||
93 | u32 pud_update; | ||
94 | u32 pud_update_pinned; | ||
95 | u32 pud_update_batched; | ||
96 | |||
97 | u32 pmd_update; | ||
98 | u32 pmd_update_pinned; | ||
99 | u32 pmd_update_batched; | ||
100 | |||
101 | u32 pte_update; | ||
102 | u32 pte_update_pinned; | ||
103 | u32 pte_update_batched; | ||
104 | |||
105 | u32 mmu_update; | ||
106 | u32 mmu_update_extended; | ||
107 | u32 mmu_update_histo[MMU_UPDATE_HISTO]; | ||
108 | |||
109 | u32 prot_commit; | ||
110 | u32 prot_commit_batched; | ||
111 | |||
112 | u32 set_pte_at; | ||
113 | u32 set_pte_at_batched; | ||
114 | u32 set_pte_at_pinned; | ||
115 | u32 set_pte_at_current; | ||
116 | u32 set_pte_at_kernel; | ||
117 | } mmu_stats; | ||
118 | |||
119 | static u8 zero_stats; | ||
120 | |||
121 | static inline void check_zero(void) | ||
122 | { | ||
123 | if (unlikely(zero_stats)) { | ||
124 | memset(&mmu_stats, 0, sizeof(mmu_stats)); | ||
125 | zero_stats = 0; | ||
126 | } | ||
127 | } | ||
128 | |||
129 | #define ADD_STATS(elem, val) \ | ||
130 | do { check_zero(); mmu_stats.elem += (val); } while(0) | ||
131 | |||
132 | #else /* !CONFIG_XEN_DEBUG_FS */ | ||
133 | |||
134 | #define ADD_STATS(elem, val) do { (void)(val); } while(0) | ||
135 | |||
136 | #endif /* CONFIG_XEN_DEBUG_FS */ | ||
137 | |||
138 | |||
139 | /* | 84 | /* |
140 | * Identity map, in addition to plain kernel map. This needs to be | 85 | * Identity map, in addition to plain kernel map. This needs to be |
141 | * large enough to allocate page table pages to allocate the rest. | 86 | * large enough to allocate page table pages to allocate the rest. |
@@ -243,11 +188,6 @@ static bool xen_page_pinned(void *ptr) | |||
243 | return PagePinned(page); | 188 | return PagePinned(page); |
244 | } | 189 | } |
245 | 190 | ||
246 | static bool xen_iomap_pte(pte_t pte) | ||
247 | { | ||
248 | return pte_flags(pte) & _PAGE_IOMAP; | ||
249 | } | ||
250 | |||
251 | void xen_set_domain_pte(pte_t *ptep, pte_t pteval, unsigned domid) | 191 | void xen_set_domain_pte(pte_t *ptep, pte_t pteval, unsigned domid) |
252 | { | 192 | { |
253 | struct multicall_space mcs; | 193 | struct multicall_space mcs; |
@@ -257,7 +197,7 @@ void xen_set_domain_pte(pte_t *ptep, pte_t pteval, unsigned domid) | |||
257 | u = mcs.args; | 197 | u = mcs.args; |
258 | 198 | ||
259 | /* ptep might be kmapped when using 32-bit HIGHPTE */ | 199 | /* ptep might be kmapped when using 32-bit HIGHPTE */ |
260 | u->ptr = arbitrary_virt_to_machine(ptep).maddr; | 200 | u->ptr = virt_to_machine(ptep).maddr; |
261 | u->val = pte_val_ma(pteval); | 201 | u->val = pte_val_ma(pteval); |
262 | 202 | ||
263 | MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, domid); | 203 | MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, domid); |
@@ -266,11 +206,6 @@ void xen_set_domain_pte(pte_t *ptep, pte_t pteval, unsigned domid) | |||
266 | } | 206 | } |
267 | EXPORT_SYMBOL_GPL(xen_set_domain_pte); | 207 | EXPORT_SYMBOL_GPL(xen_set_domain_pte); |
268 | 208 | ||
269 | static void xen_set_iomap_pte(pte_t *ptep, pte_t pteval) | ||
270 | { | ||
271 | xen_set_domain_pte(ptep, pteval, DOMID_IO); | ||
272 | } | ||
273 | |||
274 | static void xen_extend_mmu_update(const struct mmu_update *update) | 209 | static void xen_extend_mmu_update(const struct mmu_update *update) |
275 | { | 210 | { |
276 | struct multicall_space mcs; | 211 | struct multicall_space mcs; |
@@ -279,27 +214,17 @@ static void xen_extend_mmu_update(const struct mmu_update *update) | |||
279 | mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u)); | 214 | mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u)); |
280 | 215 | ||
281 | if (mcs.mc != NULL) { | 216 | if (mcs.mc != NULL) { |
282 | ADD_STATS(mmu_update_extended, 1); | ||
283 | ADD_STATS(mmu_update_histo[mcs.mc->args[1]], -1); | ||
284 | |||
285 | mcs.mc->args[1]++; | 217 | mcs.mc->args[1]++; |
286 | |||
287 | if (mcs.mc->args[1] < MMU_UPDATE_HISTO) | ||
288 | ADD_STATS(mmu_update_histo[mcs.mc->args[1]], 1); | ||
289 | else | ||
290 | ADD_STATS(mmu_update_histo[0], 1); | ||
291 | } else { | 218 | } else { |
292 | ADD_STATS(mmu_update, 1); | ||
293 | mcs = __xen_mc_entry(sizeof(*u)); | 219 | mcs = __xen_mc_entry(sizeof(*u)); |
294 | MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF); | 220 | MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF); |
295 | ADD_STATS(mmu_update_histo[1], 1); | ||
296 | } | 221 | } |
297 | 222 | ||
298 | u = mcs.args; | 223 | u = mcs.args; |
299 | *u = *update; | 224 | *u = *update; |
300 | } | 225 | } |
301 | 226 | ||
302 | void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val) | 227 | static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val) |
303 | { | 228 | { |
304 | struct mmu_update u; | 229 | struct mmu_update u; |
305 | 230 | ||
@@ -312,17 +237,13 @@ void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val) | |||
312 | u.val = pmd_val_ma(val); | 237 | u.val = pmd_val_ma(val); |
313 | xen_extend_mmu_update(&u); | 238 | xen_extend_mmu_update(&u); |
314 | 239 | ||
315 | ADD_STATS(pmd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); | ||
316 | |||
317 | xen_mc_issue(PARAVIRT_LAZY_MMU); | 240 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
318 | 241 | ||
319 | preempt_enable(); | 242 | preempt_enable(); |
320 | } | 243 | } |
321 | 244 | ||
322 | void xen_set_pmd(pmd_t *ptr, pmd_t val) | 245 | static void xen_set_pmd(pmd_t *ptr, pmd_t val) |
323 | { | 246 | { |
324 | ADD_STATS(pmd_update, 1); | ||
325 | |||
326 | /* If page is not pinned, we can just update the entry | 247 | /* If page is not pinned, we can just update the entry |
327 | directly */ | 248 | directly */ |
328 | if (!xen_page_pinned(ptr)) { | 249 | if (!xen_page_pinned(ptr)) { |
@@ -330,8 +251,6 @@ void xen_set_pmd(pmd_t *ptr, pmd_t val) | |||
330 | return; | 251 | return; |
331 | } | 252 | } |
332 | 253 | ||
333 | ADD_STATS(pmd_update_pinned, 1); | ||
334 | |||
335 | xen_set_pmd_hyper(ptr, val); | 254 | xen_set_pmd_hyper(ptr, val); |
336 | } | 255 | } |
337 | 256 | ||
@@ -344,35 +263,34 @@ void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags) | |||
344 | set_pte_vaddr(vaddr, mfn_pte(mfn, flags)); | 263 | set_pte_vaddr(vaddr, mfn_pte(mfn, flags)); |
345 | } | 264 | } |
346 | 265 | ||
347 | void xen_set_pte_at(struct mm_struct *mm, unsigned long addr, | 266 | static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval) |
348 | pte_t *ptep, pte_t pteval) | ||
349 | { | 267 | { |
350 | if (xen_iomap_pte(pteval)) { | 268 | struct mmu_update u; |
351 | xen_set_iomap_pte(ptep, pteval); | ||
352 | goto out; | ||
353 | } | ||
354 | 269 | ||
355 | ADD_STATS(set_pte_at, 1); | 270 | if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU) |
356 | // ADD_STATS(set_pte_at_pinned, xen_page_pinned(ptep)); | 271 | return false; |
357 | ADD_STATS(set_pte_at_current, mm == current->mm); | ||
358 | ADD_STATS(set_pte_at_kernel, mm == &init_mm); | ||
359 | 272 | ||
360 | if (mm == current->mm || mm == &init_mm) { | 273 | xen_mc_batch(); |
361 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) { | ||
362 | struct multicall_space mcs; | ||
363 | mcs = xen_mc_entry(0); | ||
364 | 274 | ||
365 | MULTI_update_va_mapping(mcs.mc, addr, pteval, 0); | 275 | u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE; |
366 | ADD_STATS(set_pte_at_batched, 1); | 276 | u.val = pte_val_ma(pteval); |
367 | xen_mc_issue(PARAVIRT_LAZY_MMU); | 277 | xen_extend_mmu_update(&u); |
368 | goto out; | 278 | |
369 | } else | 279 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
370 | if (HYPERVISOR_update_va_mapping(addr, pteval, 0) == 0) | ||
371 | goto out; | ||
372 | } | ||
373 | xen_set_pte(ptep, pteval); | ||
374 | 280 | ||
375 | out: return; | 281 | return true; |
282 | } | ||
283 | |||
284 | static void xen_set_pte(pte_t *ptep, pte_t pteval) | ||
285 | { | ||
286 | if (!xen_batched_set_pte(ptep, pteval)) | ||
287 | native_set_pte(ptep, pteval); | ||
288 | } | ||
289 | |||
290 | static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr, | ||
291 | pte_t *ptep, pte_t pteval) | ||
292 | { | ||
293 | xen_set_pte(ptep, pteval); | ||
376 | } | 294 | } |
377 | 295 | ||
378 | pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, | 296 | pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, |
@@ -389,13 +307,10 @@ void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr, | |||
389 | 307 | ||
390 | xen_mc_batch(); | 308 | xen_mc_batch(); |
391 | 309 | ||
392 | u.ptr = arbitrary_virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD; | 310 | u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD; |
393 | u.val = pte_val_ma(pte); | 311 | u.val = pte_val_ma(pte); |
394 | xen_extend_mmu_update(&u); | 312 | xen_extend_mmu_update(&u); |
395 | 313 | ||
396 | ADD_STATS(prot_commit, 1); | ||
397 | ADD_STATS(prot_commit_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); | ||
398 | |||
399 | xen_mc_issue(PARAVIRT_LAZY_MMU); | 314 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
400 | } | 315 | } |
401 | 316 | ||
@@ -463,7 +378,7 @@ static pteval_t iomap_pte(pteval_t val) | |||
463 | return val; | 378 | return val; |
464 | } | 379 | } |
465 | 380 | ||
466 | pteval_t xen_pte_val(pte_t pte) | 381 | static pteval_t xen_pte_val(pte_t pte) |
467 | { | 382 | { |
468 | pteval_t pteval = pte.pte; | 383 | pteval_t pteval = pte.pte; |
469 | 384 | ||
@@ -480,7 +395,7 @@ pteval_t xen_pte_val(pte_t pte) | |||
480 | } | 395 | } |
481 | PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val); | 396 | PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val); |
482 | 397 | ||
483 | pgdval_t xen_pgd_val(pgd_t pgd) | 398 | static pgdval_t xen_pgd_val(pgd_t pgd) |
484 | { | 399 | { |
485 | return pte_mfn_to_pfn(pgd.pgd); | 400 | return pte_mfn_to_pfn(pgd.pgd); |
486 | } | 401 | } |
@@ -511,7 +426,7 @@ void xen_set_pat(u64 pat) | |||
511 | WARN_ON(pat != 0x0007010600070106ull); | 426 | WARN_ON(pat != 0x0007010600070106ull); |
512 | } | 427 | } |
513 | 428 | ||
514 | pte_t xen_make_pte(pteval_t pte) | 429 | static pte_t xen_make_pte(pteval_t pte) |
515 | { | 430 | { |
516 | phys_addr_t addr = (pte & PTE_PFN_MASK); | 431 | phys_addr_t addr = (pte & PTE_PFN_MASK); |
517 | 432 | ||
@@ -581,20 +496,20 @@ pte_t xen_make_pte_debug(pteval_t pte) | |||
581 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_debug); | 496 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_debug); |
582 | #endif | 497 | #endif |
583 | 498 | ||
584 | pgd_t xen_make_pgd(pgdval_t pgd) | 499 | static pgd_t xen_make_pgd(pgdval_t pgd) |
585 | { | 500 | { |
586 | pgd = pte_pfn_to_mfn(pgd); | 501 | pgd = pte_pfn_to_mfn(pgd); |
587 | return native_make_pgd(pgd); | 502 | return native_make_pgd(pgd); |
588 | } | 503 | } |
589 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd); | 504 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd); |
590 | 505 | ||
591 | pmdval_t xen_pmd_val(pmd_t pmd) | 506 | static pmdval_t xen_pmd_val(pmd_t pmd) |
592 | { | 507 | { |
593 | return pte_mfn_to_pfn(pmd.pmd); | 508 | return pte_mfn_to_pfn(pmd.pmd); |
594 | } | 509 | } |
595 | PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val); | 510 | PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val); |
596 | 511 | ||
597 | void xen_set_pud_hyper(pud_t *ptr, pud_t val) | 512 | static void xen_set_pud_hyper(pud_t *ptr, pud_t val) |
598 | { | 513 | { |
599 | struct mmu_update u; | 514 | struct mmu_update u; |
600 | 515 | ||
@@ -607,17 +522,13 @@ void xen_set_pud_hyper(pud_t *ptr, pud_t val) | |||
607 | u.val = pud_val_ma(val); | 522 | u.val = pud_val_ma(val); |
608 | xen_extend_mmu_update(&u); | 523 | xen_extend_mmu_update(&u); |
609 | 524 | ||
610 | ADD_STATS(pud_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); | ||
611 | |||
612 | xen_mc_issue(PARAVIRT_LAZY_MMU); | 525 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
613 | 526 | ||
614 | preempt_enable(); | 527 | preempt_enable(); |
615 | } | 528 | } |
616 | 529 | ||
617 | void xen_set_pud(pud_t *ptr, pud_t val) | 530 | static void xen_set_pud(pud_t *ptr, pud_t val) |
618 | { | 531 | { |
619 | ADD_STATS(pud_update, 1); | ||
620 | |||
621 | /* If page is not pinned, we can just update the entry | 532 | /* If page is not pinned, we can just update the entry |
622 | directly */ | 533 | directly */ |
623 | if (!xen_page_pinned(ptr)) { | 534 | if (!xen_page_pinned(ptr)) { |
@@ -625,56 +536,28 @@ void xen_set_pud(pud_t *ptr, pud_t val) | |||
625 | return; | 536 | return; |
626 | } | 537 | } |
627 | 538 | ||
628 | ADD_STATS(pud_update_pinned, 1); | ||
629 | |||
630 | xen_set_pud_hyper(ptr, val); | 539 | xen_set_pud_hyper(ptr, val); |
631 | } | 540 | } |
632 | 541 | ||
633 | void xen_set_pte(pte_t *ptep, pte_t pte) | ||
634 | { | ||
635 | if (xen_iomap_pte(pte)) { | ||
636 | xen_set_iomap_pte(ptep, pte); | ||
637 | return; | ||
638 | } | ||
639 | |||
640 | ADD_STATS(pte_update, 1); | ||
641 | // ADD_STATS(pte_update_pinned, xen_page_pinned(ptep)); | ||
642 | ADD_STATS(pte_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); | ||
643 | |||
644 | #ifdef CONFIG_X86_PAE | 542 | #ifdef CONFIG_X86_PAE |
645 | ptep->pte_high = pte.pte_high; | 543 | static void xen_set_pte_atomic(pte_t *ptep, pte_t pte) |
646 | smp_wmb(); | ||
647 | ptep->pte_low = pte.pte_low; | ||
648 | #else | ||
649 | *ptep = pte; | ||
650 | #endif | ||
651 | } | ||
652 | |||
653 | #ifdef CONFIG_X86_PAE | ||
654 | void xen_set_pte_atomic(pte_t *ptep, pte_t pte) | ||
655 | { | 544 | { |
656 | if (xen_iomap_pte(pte)) { | ||
657 | xen_set_iomap_pte(ptep, pte); | ||
658 | return; | ||
659 | } | ||
660 | |||
661 | set_64bit((u64 *)ptep, native_pte_val(pte)); | 545 | set_64bit((u64 *)ptep, native_pte_val(pte)); |
662 | } | 546 | } |
663 | 547 | ||
664 | void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | 548 | static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) |
665 | { | 549 | { |
666 | ptep->pte_low = 0; | 550 | if (!xen_batched_set_pte(ptep, native_make_pte(0))) |
667 | smp_wmb(); /* make sure low gets written first */ | 551 | native_pte_clear(mm, addr, ptep); |
668 | ptep->pte_high = 0; | ||
669 | } | 552 | } |
670 | 553 | ||
671 | void xen_pmd_clear(pmd_t *pmdp) | 554 | static void xen_pmd_clear(pmd_t *pmdp) |
672 | { | 555 | { |
673 | set_pmd(pmdp, __pmd(0)); | 556 | set_pmd(pmdp, __pmd(0)); |
674 | } | 557 | } |
675 | #endif /* CONFIG_X86_PAE */ | 558 | #endif /* CONFIG_X86_PAE */ |
676 | 559 | ||
677 | pmd_t xen_make_pmd(pmdval_t pmd) | 560 | static pmd_t xen_make_pmd(pmdval_t pmd) |
678 | { | 561 | { |
679 | pmd = pte_pfn_to_mfn(pmd); | 562 | pmd = pte_pfn_to_mfn(pmd); |
680 | return native_make_pmd(pmd); | 563 | return native_make_pmd(pmd); |
@@ -682,13 +565,13 @@ pmd_t xen_make_pmd(pmdval_t pmd) | |||
682 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd); | 565 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd); |
683 | 566 | ||
684 | #if PAGETABLE_LEVELS == 4 | 567 | #if PAGETABLE_LEVELS == 4 |
685 | pudval_t xen_pud_val(pud_t pud) | 568 | static pudval_t xen_pud_val(pud_t pud) |
686 | { | 569 | { |
687 | return pte_mfn_to_pfn(pud.pud); | 570 | return pte_mfn_to_pfn(pud.pud); |
688 | } | 571 | } |
689 | PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val); | 572 | PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val); |
690 | 573 | ||
691 | pud_t xen_make_pud(pudval_t pud) | 574 | static pud_t xen_make_pud(pudval_t pud) |
692 | { | 575 | { |
693 | pud = pte_pfn_to_mfn(pud); | 576 | pud = pte_pfn_to_mfn(pud); |
694 | 577 | ||
@@ -696,7 +579,7 @@ pud_t xen_make_pud(pudval_t pud) | |||
696 | } | 579 | } |
697 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud); | 580 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud); |
698 | 581 | ||
699 | pgd_t *xen_get_user_pgd(pgd_t *pgd) | 582 | static pgd_t *xen_get_user_pgd(pgd_t *pgd) |
700 | { | 583 | { |
701 | pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK); | 584 | pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK); |
702 | unsigned offset = pgd - pgd_page; | 585 | unsigned offset = pgd - pgd_page; |
@@ -728,7 +611,7 @@ static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val) | |||
728 | * 2. It is always pinned | 611 | * 2. It is always pinned |
729 | * 3. It has no user pagetable attached to it | 612 | * 3. It has no user pagetable attached to it |
730 | */ | 613 | */ |
731 | void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val) | 614 | static void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val) |
732 | { | 615 | { |
733 | preempt_disable(); | 616 | preempt_disable(); |
734 | 617 | ||
@@ -741,12 +624,10 @@ void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val) | |||
741 | preempt_enable(); | 624 | preempt_enable(); |
742 | } | 625 | } |
743 | 626 | ||
744 | void xen_set_pgd(pgd_t *ptr, pgd_t val) | 627 | static void xen_set_pgd(pgd_t *ptr, pgd_t val) |
745 | { | 628 | { |
746 | pgd_t *user_ptr = xen_get_user_pgd(ptr); | 629 | pgd_t *user_ptr = xen_get_user_pgd(ptr); |
747 | 630 | ||
748 | ADD_STATS(pgd_update, 1); | ||
749 | |||
750 | /* If page is not pinned, we can just update the entry | 631 | /* If page is not pinned, we can just update the entry |
751 | directly */ | 632 | directly */ |
752 | if (!xen_page_pinned(ptr)) { | 633 | if (!xen_page_pinned(ptr)) { |
@@ -758,9 +639,6 @@ void xen_set_pgd(pgd_t *ptr, pgd_t val) | |||
758 | return; | 639 | return; |
759 | } | 640 | } |
760 | 641 | ||
761 | ADD_STATS(pgd_update_pinned, 1); | ||
762 | ADD_STATS(pgd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); | ||
763 | |||
764 | /* If it's pinned, then we can at least batch the kernel and | 642 | /* If it's pinned, then we can at least batch the kernel and |
765 | user updates together. */ | 643 | user updates together. */ |
766 | xen_mc_batch(); | 644 | xen_mc_batch(); |
@@ -1162,14 +1040,14 @@ void xen_mm_unpin_all(void) | |||
1162 | spin_unlock(&pgd_lock); | 1040 | spin_unlock(&pgd_lock); |
1163 | } | 1041 | } |
1164 | 1042 | ||
1165 | void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next) | 1043 | static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next) |
1166 | { | 1044 | { |
1167 | spin_lock(&next->page_table_lock); | 1045 | spin_lock(&next->page_table_lock); |
1168 | xen_pgd_pin(next); | 1046 | xen_pgd_pin(next); |
1169 | spin_unlock(&next->page_table_lock); | 1047 | spin_unlock(&next->page_table_lock); |
1170 | } | 1048 | } |
1171 | 1049 | ||
1172 | void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm) | 1050 | static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm) |
1173 | { | 1051 | { |
1174 | spin_lock(&mm->page_table_lock); | 1052 | spin_lock(&mm->page_table_lock); |
1175 | xen_pgd_pin(mm); | 1053 | xen_pgd_pin(mm); |
@@ -1256,7 +1134,7 @@ static void xen_drop_mm_ref(struct mm_struct *mm) | |||
1256 | * pagetable because of lazy tlb flushing. This means we need need to | 1134 | * pagetable because of lazy tlb flushing. This means we need need to |
1257 | * switch all CPUs off this pagetable before we can unpin it. | 1135 | * switch all CPUs off this pagetable before we can unpin it. |
1258 | */ | 1136 | */ |
1259 | void xen_exit_mmap(struct mm_struct *mm) | 1137 | static void xen_exit_mmap(struct mm_struct *mm) |
1260 | { | 1138 | { |
1261 | get_cpu(); /* make sure we don't move around */ | 1139 | get_cpu(); /* make sure we don't move around */ |
1262 | xen_drop_mm_ref(mm); | 1140 | xen_drop_mm_ref(mm); |
@@ -2371,7 +2249,7 @@ static int remap_area_mfn_pte_fn(pte_t *ptep, pgtable_t token, | |||
2371 | struct remap_data *rmd = data; | 2249 | struct remap_data *rmd = data; |
2372 | pte_t pte = pte_mkspecial(pfn_pte(rmd->mfn++, rmd->prot)); | 2250 | pte_t pte = pte_mkspecial(pfn_pte(rmd->mfn++, rmd->prot)); |
2373 | 2251 | ||
2374 | rmd->mmu_update->ptr = arbitrary_virt_to_machine(ptep).maddr; | 2252 | rmd->mmu_update->ptr = virt_to_machine(ptep).maddr; |
2375 | rmd->mmu_update->val = pte_val_ma(pte); | 2253 | rmd->mmu_update->val = pte_val_ma(pte); |
2376 | rmd->mmu_update++; | 2254 | rmd->mmu_update++; |
2377 | 2255 | ||
@@ -2425,7 +2303,6 @@ out: | |||
2425 | EXPORT_SYMBOL_GPL(xen_remap_domain_mfn_range); | 2303 | EXPORT_SYMBOL_GPL(xen_remap_domain_mfn_range); |
2426 | 2304 | ||
2427 | #ifdef CONFIG_XEN_DEBUG_FS | 2305 | #ifdef CONFIG_XEN_DEBUG_FS |
2428 | |||
2429 | static int p2m_dump_open(struct inode *inode, struct file *filp) | 2306 | static int p2m_dump_open(struct inode *inode, struct file *filp) |
2430 | { | 2307 | { |
2431 | return single_open(filp, p2m_dump_show, NULL); | 2308 | return single_open(filp, p2m_dump_show, NULL); |
@@ -2437,65 +2314,4 @@ static const struct file_operations p2m_dump_fops = { | |||
2437 | .llseek = seq_lseek, | 2314 | .llseek = seq_lseek, |
2438 | .release = single_release, | 2315 | .release = single_release, |
2439 | }; | 2316 | }; |
2440 | 2317 | #endif /* CONFIG_XEN_DEBUG_FS */ | |
2441 | static struct dentry *d_mmu_debug; | ||
2442 | |||
2443 | static int __init xen_mmu_debugfs(void) | ||
2444 | { | ||
2445 | struct dentry *d_xen = xen_init_debugfs(); | ||
2446 | |||
2447 | if (d_xen == NULL) | ||
2448 | return -ENOMEM; | ||
2449 | |||
2450 | d_mmu_debug = debugfs_create_dir("mmu", d_xen); | ||
2451 | |||
2452 | debugfs_create_u8("zero_stats", 0644, d_mmu_debug, &zero_stats); | ||
2453 | |||
2454 | debugfs_create_u32("pgd_update", 0444, d_mmu_debug, &mmu_stats.pgd_update); | ||
2455 | debugfs_create_u32("pgd_update_pinned", 0444, d_mmu_debug, | ||
2456 | &mmu_stats.pgd_update_pinned); | ||
2457 | debugfs_create_u32("pgd_update_batched", 0444, d_mmu_debug, | ||
2458 | &mmu_stats.pgd_update_pinned); | ||
2459 | |||
2460 | debugfs_create_u32("pud_update", 0444, d_mmu_debug, &mmu_stats.pud_update); | ||
2461 | debugfs_create_u32("pud_update_pinned", 0444, d_mmu_debug, | ||
2462 | &mmu_stats.pud_update_pinned); | ||
2463 | debugfs_create_u32("pud_update_batched", 0444, d_mmu_debug, | ||
2464 | &mmu_stats.pud_update_pinned); | ||
2465 | |||
2466 | debugfs_create_u32("pmd_update", 0444, d_mmu_debug, &mmu_stats.pmd_update); | ||
2467 | debugfs_create_u32("pmd_update_pinned", 0444, d_mmu_debug, | ||
2468 | &mmu_stats.pmd_update_pinned); | ||
2469 | debugfs_create_u32("pmd_update_batched", 0444, d_mmu_debug, | ||
2470 | &mmu_stats.pmd_update_pinned); | ||
2471 | |||
2472 | debugfs_create_u32("pte_update", 0444, d_mmu_debug, &mmu_stats.pte_update); | ||
2473 | // debugfs_create_u32("pte_update_pinned", 0444, d_mmu_debug, | ||
2474 | // &mmu_stats.pte_update_pinned); | ||
2475 | debugfs_create_u32("pte_update_batched", 0444, d_mmu_debug, | ||
2476 | &mmu_stats.pte_update_pinned); | ||
2477 | |||
2478 | debugfs_create_u32("mmu_update", 0444, d_mmu_debug, &mmu_stats.mmu_update); | ||
2479 | debugfs_create_u32("mmu_update_extended", 0444, d_mmu_debug, | ||
2480 | &mmu_stats.mmu_update_extended); | ||
2481 | xen_debugfs_create_u32_array("mmu_update_histo", 0444, d_mmu_debug, | ||
2482 | mmu_stats.mmu_update_histo, 20); | ||
2483 | |||
2484 | debugfs_create_u32("set_pte_at", 0444, d_mmu_debug, &mmu_stats.set_pte_at); | ||
2485 | debugfs_create_u32("set_pte_at_batched", 0444, d_mmu_debug, | ||
2486 | &mmu_stats.set_pte_at_batched); | ||
2487 | debugfs_create_u32("set_pte_at_current", 0444, d_mmu_debug, | ||
2488 | &mmu_stats.set_pte_at_current); | ||
2489 | debugfs_create_u32("set_pte_at_kernel", 0444, d_mmu_debug, | ||
2490 | &mmu_stats.set_pte_at_kernel); | ||
2491 | |||
2492 | debugfs_create_u32("prot_commit", 0444, d_mmu_debug, &mmu_stats.prot_commit); | ||
2493 | debugfs_create_u32("prot_commit_batched", 0444, d_mmu_debug, | ||
2494 | &mmu_stats.prot_commit_batched); | ||
2495 | |||
2496 | debugfs_create_file("p2m", 0600, d_mmu_debug, NULL, &p2m_dump_fops); | ||
2497 | return 0; | ||
2498 | } | ||
2499 | fs_initcall(xen_mmu_debugfs); | ||
2500 | |||
2501 | #endif /* CONFIG_XEN_DEBUG_FS */ | ||
diff --git a/arch/x86/xen/mmu.h b/arch/x86/xen/mmu.h index 537bb9aab777..73809bb951b4 100644 --- a/arch/x86/xen/mmu.h +++ b/arch/x86/xen/mmu.h | |||
@@ -15,43 +15,6 @@ bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn); | |||
15 | 15 | ||
16 | void set_pte_mfn(unsigned long vaddr, unsigned long pfn, pgprot_t flags); | 16 | void set_pte_mfn(unsigned long vaddr, unsigned long pfn, pgprot_t flags); |
17 | 17 | ||
18 | |||
19 | void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next); | ||
20 | void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm); | ||
21 | void xen_exit_mmap(struct mm_struct *mm); | ||
22 | |||
23 | pteval_t xen_pte_val(pte_t); | ||
24 | pmdval_t xen_pmd_val(pmd_t); | ||
25 | pgdval_t xen_pgd_val(pgd_t); | ||
26 | |||
27 | pte_t xen_make_pte(pteval_t); | ||
28 | pmd_t xen_make_pmd(pmdval_t); | ||
29 | pgd_t xen_make_pgd(pgdval_t); | ||
30 | |||
31 | void xen_set_pte(pte_t *ptep, pte_t pteval); | ||
32 | void xen_set_pte_at(struct mm_struct *mm, unsigned long addr, | ||
33 | pte_t *ptep, pte_t pteval); | ||
34 | |||
35 | #ifdef CONFIG_X86_PAE | ||
36 | void xen_set_pte_atomic(pte_t *ptep, pte_t pte); | ||
37 | void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep); | ||
38 | void xen_pmd_clear(pmd_t *pmdp); | ||
39 | #endif /* CONFIG_X86_PAE */ | ||
40 | |||
41 | void xen_set_pmd(pmd_t *pmdp, pmd_t pmdval); | ||
42 | void xen_set_pud(pud_t *ptr, pud_t val); | ||
43 | void xen_set_pmd_hyper(pmd_t *pmdp, pmd_t pmdval); | ||
44 | void xen_set_pud_hyper(pud_t *ptr, pud_t val); | ||
45 | |||
46 | #if PAGETABLE_LEVELS == 4 | ||
47 | pudval_t xen_pud_val(pud_t pud); | ||
48 | pud_t xen_make_pud(pudval_t pudval); | ||
49 | void xen_set_pgd(pgd_t *pgdp, pgd_t pgd); | ||
50 | void xen_set_pgd_hyper(pgd_t *pgdp, pgd_t pgd); | ||
51 | #endif | ||
52 | |||
53 | pgd_t *xen_get_user_pgd(pgd_t *pgd); | ||
54 | |||
55 | pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr, pte_t *ptep); | 18 | pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr, pte_t *ptep); |
56 | void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr, | 19 | void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr, |
57 | pte_t *ptep, pte_t pte); | 20 | pte_t *ptep, pte_t pte); |
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index 7c275f5d0df0..5d43c1f8ada8 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig | |||
@@ -20,12 +20,6 @@ config XTENSA | |||
20 | config RWSEM_XCHGADD_ALGORITHM | 20 | config RWSEM_XCHGADD_ALGORITHM |
21 | def_bool y | 21 | def_bool y |
22 | 22 | ||
23 | config GENERIC_FIND_NEXT_BIT | ||
24 | def_bool y | ||
25 | |||
26 | config GENERIC_FIND_BIT_LE | ||
27 | def_bool y | ||
28 | |||
29 | config GENERIC_HWEIGHT | 23 | config GENERIC_HWEIGHT |
30 | def_bool y | 24 | def_bool y |
31 | 25 | ||