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-rw-r--r--arch/blackfin/mach-bf537/include/mach/bf537.h10
-rw-r--r--arch/blackfin/mach-common/ints-priority.c14
2 files changed, 10 insertions, 14 deletions
diff --git a/arch/blackfin/mach-bf537/include/mach/bf537.h b/arch/blackfin/mach-bf537/include/mach/bf537.h
index 17fab4474669..8b291418ca32 100644
--- a/arch/blackfin/mach-bf537/include/mach/bf537.h
+++ b/arch/blackfin/mach-bf537/include/mach/bf537.h
@@ -9,16 +9,6 @@
9#ifndef __MACH_BF537_H__ 9#ifndef __MACH_BF537_H__
10#define __MACH_BF537_H__ 10#define __MACH_BF537_H__
11 11
12/* Masks for generic ERROR IRQ demultiplexing used in int-priority-sc.c */
13
14#define SPI_ERR_MASK (TXCOL | RBSY | MODF | TXE) /* SPI_STAT */
15#define SPORT_ERR_MASK (ROVF | RUVF | TOVF | TUVF) /* SPORTx_STAT */
16#define PPI_ERR_MASK (0xFFFF & ~FLD) /* PPI_STATUS */
17#define EMAC_ERR_MASK (PHYINT | MMCINT | RXFSINT | TXFSINT | WAKEDET | RXDMAERR | TXDMAERR | STMDONE) /* EMAC_SYSTAT */
18#define UART_ERR_MASK_STAT1 (0x4) /* UARTx_IIR */
19#define UART_ERR_MASK_STAT0 (0x2) /* UARTx_IIR */
20#define CAN_ERR_MASK (EWTIF | EWRIF | EPIF | BOIF | WUIF | UIAIF | AAIF | RMLIF | UCEIF | EXTIF | ADIF) /* CAN_GIF */
21
22#define OFFSET_(x) ((x) & 0x0000FFFF) 12#define OFFSET_(x) ((x) & 0x0000FFFF)
23 13
24/*some misc defines*/ 14/*some misc defines*/
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 0d84fb28233d..1873b2c1fede 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -26,11 +26,19 @@
26#include <asm/gpio.h> 26#include <asm/gpio.h>
27#include <asm/irq_handler.h> 27#include <asm/irq_handler.h>
28#include <asm/dpmc.h> 28#include <asm/dpmc.h>
29#include <asm/bfin5xx_spi.h>
30#include <asm/bfin_sport.h>
29 31
30#define SIC_SYSIRQ(irq) (irq - (IRQ_CORETMR + 1)) 32#define SIC_SYSIRQ(irq) (irq - (IRQ_CORETMR + 1))
31 33
32#ifdef BF537_FAMILY 34#ifdef BF537_FAMILY
33# define BF537_GENERIC_ERROR_INT_DEMUX 35# define BF537_GENERIC_ERROR_INT_DEMUX
36# define SPI_ERR_MASK (BIT_STAT_TXCOL | BIT_STAT_RBSY | BIT_STAT_MODF | BIT_STAT_TXE) /* SPI_STAT */
37# define SPORT_ERR_MASK (ROVF | RUVF | TOVF | TUVF) /* SPORT_STAT */
38# define PPI_ERR_MASK (0xFFFF & ~FLD) /* PPI_STATUS */
39# define EMAC_ERR_MASK (PHYINT | MMCINT | RXFSINT | TXFSINT | WAKEDET | RXDMAERR | TXDMAERR | STMDONE) /* EMAC_SYSTAT */
40# define UART_ERR_MASK (0x6) /* UART_IIR */
41# define CAN_ERR_MASK (EWTIF | EWRIF | EPIF | BOIF | WUIF | UIAIF | AAIF | RMLIF | UCEIF | EXTIF | ADIF) /* CAN_GIF */
34#else 42#else
35# undef BF537_GENERIC_ERROR_INT_DEMUX 43# undef BF537_GENERIC_ERROR_INT_DEMUX
36#endif 44#endif
@@ -325,11 +333,9 @@ static void bfin_demux_error_irq(unsigned int int_err_irq,
325 irq = IRQ_CAN_ERROR; 333 irq = IRQ_CAN_ERROR;
326 else if (bfin_read_SPI_STAT() & SPI_ERR_MASK) 334 else if (bfin_read_SPI_STAT() & SPI_ERR_MASK)
327 irq = IRQ_SPI_ERROR; 335 irq = IRQ_SPI_ERROR;
328 else if ((bfin_read_UART0_IIR() & UART_ERR_MASK_STAT1) && 336 else if ((bfin_read_UART0_IIR() & UART_ERR_MASK) == UART_ERR_MASK)
329 (bfin_read_UART0_IIR() & UART_ERR_MASK_STAT0))
330 irq = IRQ_UART0_ERROR; 337 irq = IRQ_UART0_ERROR;
331 else if ((bfin_read_UART1_IIR() & UART_ERR_MASK_STAT1) && 338 else if ((bfin_read_UART1_IIR() & UART_ERR_MASK) == UART_ERR_MASK)
332 (bfin_read_UART1_IIR() & UART_ERR_MASK_STAT0))
333 irq = IRQ_UART1_ERROR; 339 irq = IRQ_UART1_ERROR;
334 340
335 if (irq) { 341 if (irq) {