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-rw-r--r--arch/sh/Kconfig5
-rw-r--r--arch/sh/configs/sh7757lcr_defconfig8
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7757.c106
-rw-r--r--arch/sh/kernel/irq.c6
-rw-r--r--arch/sh/mm/alignment.c9
5 files changed, 94 insertions, 40 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index f03338c2f088..bbdeb48bbf8e 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -348,6 +348,7 @@ config CPU_SUBTYPE_SH7720
348 select SYS_SUPPORTS_CMT 348 select SYS_SUPPORTS_CMT
349 select ARCH_WANT_OPTIONAL_GPIOLIB 349 select ARCH_WANT_OPTIONAL_GPIOLIB
350 select USB_ARCH_HAS_OHCI 350 select USB_ARCH_HAS_OHCI
351 select USB_OHCI_SH if USB_OHCI_HCD
351 help 352 help
352 Select SH7720 if you have a SH3-DSP SH7720 CPU. 353 Select SH7720 if you have a SH3-DSP SH7720 CPU.
353 354
@@ -357,6 +358,7 @@ config CPU_SUBTYPE_SH7721
357 select CPU_HAS_DSP 358 select CPU_HAS_DSP
358 select SYS_SUPPORTS_CMT 359 select SYS_SUPPORTS_CMT
359 select USB_ARCH_HAS_OHCI 360 select USB_ARCH_HAS_OHCI
361 select USB_OHCI_SH if USB_OHCI_HCD
360 help 362 help
361 Select SH7721 if you have a SH3-DSP SH7721 CPU. 363 Select SH7721 if you have a SH3-DSP SH7721 CPU.
362 364
@@ -440,6 +442,7 @@ config CPU_SUBTYPE_SH7763
440 bool "Support SH7763 processor" 442 bool "Support SH7763 processor"
441 select CPU_SH4A 443 select CPU_SH4A
442 select USB_ARCH_HAS_OHCI 444 select USB_ARCH_HAS_OHCI
445 select USB_OHCI_SH if USB_OHCI_HCD
443 help 446 help
444 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU. 447 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
445 448
@@ -467,7 +470,9 @@ config CPU_SUBTYPE_SH7786
467 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 470 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
468 select ARCH_WANT_OPTIONAL_GPIOLIB 471 select ARCH_WANT_OPTIONAL_GPIOLIB
469 select USB_ARCH_HAS_OHCI 472 select USB_ARCH_HAS_OHCI
473 select USB_OHCI_SH if USB_OHCI_HCD
470 select USB_ARCH_HAS_EHCI 474 select USB_ARCH_HAS_EHCI
475 select USB_EHCI_SH if USB_EHCI_HCD
471 476
472config CPU_SUBTYPE_SHX3 477config CPU_SUBTYPE_SHX3
473 bool "Support SH-X3 processor" 478 bool "Support SH-X3 processor"
diff --git a/arch/sh/configs/sh7757lcr_defconfig b/arch/sh/configs/sh7757lcr_defconfig
index 33ddb130a7c8..cfde98ddb29d 100644
--- a/arch/sh/configs/sh7757lcr_defconfig
+++ b/arch/sh/configs/sh7757lcr_defconfig
@@ -9,7 +9,6 @@ CONFIG_TASK_XACCT=y
9CONFIG_TASK_IO_ACCOUNTING=y 9CONFIG_TASK_IO_ACCOUNTING=y
10CONFIG_LOG_BUF_SHIFT=14 10CONFIG_LOG_BUF_SHIFT=14
11CONFIG_BLK_DEV_INITRD=y 11CONFIG_BLK_DEV_INITRD=y
12# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
13# CONFIG_SYSCTL_SYSCALL is not set 12# CONFIG_SYSCTL_SYSCALL is not set
14CONFIG_KALLSYMS_ALL=y 13CONFIG_KALLSYMS_ALL=y
15CONFIG_SLAB=y 14CONFIG_SLAB=y
@@ -39,8 +38,6 @@ CONFIG_IPV6=y
39CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 38CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
40# CONFIG_FW_LOADER is not set 39# CONFIG_FW_LOADER is not set
41CONFIG_MTD=y 40CONFIG_MTD=y
42CONFIG_MTD_CONCAT=y
43CONFIG_MTD_PARTITIONS=y
44CONFIG_MTD_CHAR=y 41CONFIG_MTD_CHAR=y
45CONFIG_MTD_BLOCK=y 42CONFIG_MTD_BLOCK=y
46CONFIG_MTD_M25P80=y 43CONFIG_MTD_M25P80=y
@@ -56,18 +53,19 @@ CONFIG_SH_ETH=y
56# CONFIG_KEYBOARD_ATKBD is not set 53# CONFIG_KEYBOARD_ATKBD is not set
57# CONFIG_MOUSE_PS2 is not set 54# CONFIG_MOUSE_PS2 is not set
58# CONFIG_SERIO is not set 55# CONFIG_SERIO is not set
56# CONFIG_LEGACY_PTYS is not set
59CONFIG_SERIAL_SH_SCI=y 57CONFIG_SERIAL_SH_SCI=y
60CONFIG_SERIAL_SH_SCI_NR_UARTS=3 58CONFIG_SERIAL_SH_SCI_NR_UARTS=3
61CONFIG_SERIAL_SH_SCI_CONSOLE=y 59CONFIG_SERIAL_SH_SCI_CONSOLE=y
62# CONFIG_LEGACY_PTYS is not set
63# CONFIG_HW_RANDOM is not set 60# CONFIG_HW_RANDOM is not set
64CONFIG_SPI=y 61CONFIG_SPI=y
65CONFIG_SPI_SH=y 62CONFIG_SPI_SH=y
66# CONFIG_HWMON is not set 63# CONFIG_HWMON is not set
67CONFIG_MFD_SH_MOBILE_SDHI=y
68CONFIG_USB=y 64CONFIG_USB=y
69CONFIG_USB_EHCI_HCD=y 65CONFIG_USB_EHCI_HCD=y
66CONFIG_USB_EHCI_SH=y
70CONFIG_USB_OHCI_HCD=y 67CONFIG_USB_OHCI_HCD=y
68CONFIG_USB_OHCI_SH=y
71CONFIG_USB_STORAGE=y 69CONFIG_USB_STORAGE=y
72CONFIG_MMC=y 70CONFIG_MMC=y
73CONFIG_MMC_SDHI=y 71CONFIG_MMC_SDHI=y
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index 423dabf542d3..e915deafac89 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -183,7 +183,7 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = {
183 { 183 {
184 .slave_id = SHDMA_SLAVE_SCIF2_RX, 184 .slave_id = SHDMA_SLAVE_SCIF2_RX,
185 .addr = 0x1f4b0014, 185 .addr = 0x1f4b0014,
186 .chcr = SM_INC | 0x800 | 0x40000000 | 186 .chcr = DM_INC | 0x800 | 0x40000000 |
187 TS_INDEX2VAL(XMIT_SZ_8BIT), 187 TS_INDEX2VAL(XMIT_SZ_8BIT),
188 .mid_rid = 0x22, 188 .mid_rid = 0x22,
189 }, 189 },
@@ -197,7 +197,7 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = {
197 { 197 {
198 .slave_id = SHDMA_SLAVE_SCIF3_RX, 198 .slave_id = SHDMA_SLAVE_SCIF3_RX,
199 .addr = 0x1f4c0014, 199 .addr = 0x1f4c0014,
200 .chcr = SM_INC | 0x800 | 0x40000000 | 200 .chcr = DM_INC | 0x800 | 0x40000000 |
201 TS_INDEX2VAL(XMIT_SZ_8BIT), 201 TS_INDEX2VAL(XMIT_SZ_8BIT),
202 .mid_rid = 0x2a, 202 .mid_rid = 0x2a,
203 }, 203 },
@@ -211,7 +211,7 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = {
211 { 211 {
212 .slave_id = SHDMA_SLAVE_SCIF4_RX, 212 .slave_id = SHDMA_SLAVE_SCIF4_RX,
213 .addr = 0x1f4d0014, 213 .addr = 0x1f4d0014,
214 .chcr = SM_INC | 0x800 | 0x40000000 | 214 .chcr = DM_INC | 0x800 | 0x40000000 |
215 TS_INDEX2VAL(XMIT_SZ_8BIT), 215 TS_INDEX2VAL(XMIT_SZ_8BIT),
216 .mid_rid = 0x42, 216 .mid_rid = 0x42,
217 }, 217 },
@@ -228,7 +228,7 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
228 { 228 {
229 .slave_id = SHDMA_SLAVE_RIIC0_RX, 229 .slave_id = SHDMA_SLAVE_RIIC0_RX,
230 .addr = 0x1e500013, 230 .addr = 0x1e500013,
231 .chcr = SM_INC | 0x800 | 0x40000000 | 231 .chcr = DM_INC | 0x800 | 0x40000000 |
232 TS_INDEX2VAL(XMIT_SZ_8BIT), 232 TS_INDEX2VAL(XMIT_SZ_8BIT),
233 .mid_rid = 0x22, 233 .mid_rid = 0x22,
234 }, 234 },
@@ -242,7 +242,7 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
242 { 242 {
243 .slave_id = SHDMA_SLAVE_RIIC1_RX, 243 .slave_id = SHDMA_SLAVE_RIIC1_RX,
244 .addr = 0x1e510013, 244 .addr = 0x1e510013,
245 .chcr = SM_INC | 0x800 | 0x40000000 | 245 .chcr = DM_INC | 0x800 | 0x40000000 |
246 TS_INDEX2VAL(XMIT_SZ_8BIT), 246 TS_INDEX2VAL(XMIT_SZ_8BIT),
247 .mid_rid = 0x2a, 247 .mid_rid = 0x2a,
248 }, 248 },
@@ -256,7 +256,7 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
256 { 256 {
257 .slave_id = SHDMA_SLAVE_RIIC2_RX, 257 .slave_id = SHDMA_SLAVE_RIIC2_RX,
258 .addr = 0x1e520013, 258 .addr = 0x1e520013,
259 .chcr = SM_INC | 0x800 | 0x40000000 | 259 .chcr = DM_INC | 0x800 | 0x40000000 |
260 TS_INDEX2VAL(XMIT_SZ_8BIT), 260 TS_INDEX2VAL(XMIT_SZ_8BIT),
261 .mid_rid = 0xa2, 261 .mid_rid = 0xa2,
262 }, 262 },
@@ -265,12 +265,12 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
265 .addr = 0x1e530012, 265 .addr = 0x1e530012,
266 .chcr = SM_INC | 0x800 | 0x40000000 | 266 .chcr = SM_INC | 0x800 | 0x40000000 |
267 TS_INDEX2VAL(XMIT_SZ_8BIT), 267 TS_INDEX2VAL(XMIT_SZ_8BIT),
268 .mid_rid = 0xab, 268 .mid_rid = 0xa9,
269 }, 269 },
270 { 270 {
271 .slave_id = SHDMA_SLAVE_RIIC3_RX, 271 .slave_id = SHDMA_SLAVE_RIIC3_RX,
272 .addr = 0x1e530013, 272 .addr = 0x1e530013,
273 .chcr = SM_INC | 0x800 | 0x40000000 | 273 .chcr = DM_INC | 0x800 | 0x40000000 |
274 TS_INDEX2VAL(XMIT_SZ_8BIT), 274 TS_INDEX2VAL(XMIT_SZ_8BIT),
275 .mid_rid = 0xaf, 275 .mid_rid = 0xaf,
276 }, 276 },
@@ -279,14 +279,14 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
279 .addr = 0x1e540012, 279 .addr = 0x1e540012,
280 .chcr = SM_INC | 0x800 | 0x40000000 | 280 .chcr = SM_INC | 0x800 | 0x40000000 |
281 TS_INDEX2VAL(XMIT_SZ_8BIT), 281 TS_INDEX2VAL(XMIT_SZ_8BIT),
282 .mid_rid = 0xc1, 282 .mid_rid = 0xc5,
283 }, 283 },
284 { 284 {
285 .slave_id = SHDMA_SLAVE_RIIC4_RX, 285 .slave_id = SHDMA_SLAVE_RIIC4_RX,
286 .addr = 0x1e540013, 286 .addr = 0x1e540013,
287 .chcr = SM_INC | 0x800 | 0x40000000 | 287 .chcr = DM_INC | 0x800 | 0x40000000 |
288 TS_INDEX2VAL(XMIT_SZ_8BIT), 288 TS_INDEX2VAL(XMIT_SZ_8BIT),
289 .mid_rid = 0xc2, 289 .mid_rid = 0xc6,
290 }, 290 },
291}; 291};
292 292
@@ -301,7 +301,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
301 { 301 {
302 .slave_id = SHDMA_SLAVE_RIIC5_RX, 302 .slave_id = SHDMA_SLAVE_RIIC5_RX,
303 .addr = 0x1e550013, 303 .addr = 0x1e550013,
304 .chcr = SM_INC | 0x800 | 0x40000000 | 304 .chcr = DM_INC | 0x800 | 0x40000000 |
305 TS_INDEX2VAL(XMIT_SZ_8BIT), 305 TS_INDEX2VAL(XMIT_SZ_8BIT),
306 .mid_rid = 0x22, 306 .mid_rid = 0x22,
307 }, 307 },
@@ -315,7 +315,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
315 { 315 {
316 .slave_id = SHDMA_SLAVE_RIIC6_RX, 316 .slave_id = SHDMA_SLAVE_RIIC6_RX,
317 .addr = 0x1e560013, 317 .addr = 0x1e560013,
318 .chcr = SM_INC | 0x800 | 0x40000000 | 318 .chcr = DM_INC | 0x800 | 0x40000000 |
319 TS_INDEX2VAL(XMIT_SZ_8BIT), 319 TS_INDEX2VAL(XMIT_SZ_8BIT),
320 .mid_rid = 0x2a, 320 .mid_rid = 0x2a,
321 }, 321 },
@@ -329,7 +329,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
329 { 329 {
330 .slave_id = SHDMA_SLAVE_RIIC7_RX, 330 .slave_id = SHDMA_SLAVE_RIIC7_RX,
331 .addr = 0x1e570013, 331 .addr = 0x1e570013,
332 .chcr = SM_INC | 0x800 | 0x40000000 | 332 .chcr = DM_INC | 0x800 | 0x40000000 |
333 TS_INDEX2VAL(XMIT_SZ_8BIT), 333 TS_INDEX2VAL(XMIT_SZ_8BIT),
334 .mid_rid = 0x42, 334 .mid_rid = 0x42,
335 }, 335 },
@@ -343,7 +343,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
343 { 343 {
344 .slave_id = SHDMA_SLAVE_RIIC8_RX, 344 .slave_id = SHDMA_SLAVE_RIIC8_RX,
345 .addr = 0x1e580013, 345 .addr = 0x1e580013,
346 .chcr = SM_INC | 0x800 | 0x40000000 | 346 .chcr = DM_INC | 0x800 | 0x40000000 |
347 TS_INDEX2VAL(XMIT_SZ_8BIT), 347 TS_INDEX2VAL(XMIT_SZ_8BIT),
348 .mid_rid = 0x46, 348 .mid_rid = 0x46,
349 }, 349 },
@@ -357,7 +357,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
357 { 357 {
358 .slave_id = SHDMA_SLAVE_RIIC9_RX, 358 .slave_id = SHDMA_SLAVE_RIIC9_RX,
359 .addr = 0x1e590013, 359 .addr = 0x1e590013,
360 .chcr = SM_INC | 0x800 | 0x40000000 | 360 .chcr = DM_INC | 0x800 | 0x40000000 |
361 TS_INDEX2VAL(XMIT_SZ_8BIT), 361 TS_INDEX2VAL(XMIT_SZ_8BIT),
362 .mid_rid = 0x52, 362 .mid_rid = 0x52,
363 }, 363 },
@@ -659,6 +659,54 @@ static struct platform_device spi0_device = {
659 .resource = spi0_resources, 659 .resource = spi0_resources,
660}; 660};
661 661
662static struct resource usb_ehci_resources[] = {
663 [0] = {
664 .start = 0xfe4f1000,
665 .end = 0xfe4f10ff,
666 .flags = IORESOURCE_MEM,
667 },
668 [1] = {
669 .start = 57,
670 .end = 57,
671 .flags = IORESOURCE_IRQ,
672 },
673};
674
675static struct platform_device usb_ehci_device = {
676 .name = "sh_ehci",
677 .id = -1,
678 .dev = {
679 .dma_mask = &usb_ehci_device.dev.coherent_dma_mask,
680 .coherent_dma_mask = DMA_BIT_MASK(32),
681 },
682 .num_resources = ARRAY_SIZE(usb_ehci_resources),
683 .resource = usb_ehci_resources,
684};
685
686static struct resource usb_ohci_resources[] = {
687 [0] = {
688 .start = 0xfe4f1800,
689 .end = 0xfe4f18ff,
690 .flags = IORESOURCE_MEM,
691 },
692 [1] = {
693 .start = 57,
694 .end = 57,
695 .flags = IORESOURCE_IRQ,
696 },
697};
698
699static struct platform_device usb_ohci_device = {
700 .name = "sh_ohci",
701 .id = -1,
702 .dev = {
703 .dma_mask = &usb_ohci_device.dev.coherent_dma_mask,
704 .coherent_dma_mask = DMA_BIT_MASK(32),
705 },
706 .num_resources = ARRAY_SIZE(usb_ohci_resources),
707 .resource = usb_ohci_resources,
708};
709
662static struct platform_device *sh7757_devices[] __initdata = { 710static struct platform_device *sh7757_devices[] __initdata = {
663 &scif2_device, 711 &scif2_device,
664 &scif3_device, 712 &scif3_device,
@@ -670,6 +718,8 @@ static struct platform_device *sh7757_devices[] __initdata = {
670 &dma2_device, 718 &dma2_device,
671 &dma3_device, 719 &dma3_device,
672 &spi0_device, 720 &spi0_device,
721 &usb_ehci_device,
722 &usb_ohci_device,
673}; 723};
674 724
675static int __init sh7757_devices_setup(void) 725static int __init sh7757_devices_setup(void)
@@ -1039,13 +1089,13 @@ static DECLARE_INTC_DESC(intc_desc, "sh7757", vectors, groups,
1039 1089
1040/* Support for external interrupt pins in IRQ mode */ 1090/* Support for external interrupt pins in IRQ mode */
1041static struct intc_vect vectors_irq0123[] __initdata = { 1091static struct intc_vect vectors_irq0123[] __initdata = {
1042 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280), 1092 INTC_VECT(IRQ0, 0x200), INTC_VECT(IRQ1, 0x240),
1043 INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300), 1093 INTC_VECT(IRQ2, 0x280), INTC_VECT(IRQ3, 0x2c0),
1044}; 1094};
1045 1095
1046static struct intc_vect vectors_irq4567[] __initdata = { 1096static struct intc_vect vectors_irq4567[] __initdata = {
1047 INTC_VECT(IRQ4, 0x340), INTC_VECT(IRQ5, 0x380), 1097 INTC_VECT(IRQ4, 0x300), INTC_VECT(IRQ5, 0x340),
1048 INTC_VECT(IRQ6, 0x3c0), INTC_VECT(IRQ7, 0x200), 1098 INTC_VECT(IRQ6, 0x380), INTC_VECT(IRQ7, 0x3c0),
1049}; 1099};
1050 1100
1051static struct intc_sense_reg sense_registers[] __initdata = { 1101static struct intc_sense_reg sense_registers[] __initdata = {
@@ -1079,14 +1129,14 @@ static struct intc_vect vectors_irl0123[] __initdata = {
1079}; 1129};
1080 1130
1081static struct intc_vect vectors_irl4567[] __initdata = { 1131static struct intc_vect vectors_irl4567[] __initdata = {
1082 INTC_VECT(IRL4_LLLL, 0xb00), INTC_VECT(IRL4_LLLH, 0xb20), 1132 INTC_VECT(IRL4_LLLL, 0x200), INTC_VECT(IRL4_LLLH, 0x220),
1083 INTC_VECT(IRL4_LLHL, 0xb40), INTC_VECT(IRL4_LLHH, 0xb60), 1133 INTC_VECT(IRL4_LLHL, 0x240), INTC_VECT(IRL4_LLHH, 0x260),
1084 INTC_VECT(IRL4_LHLL, 0xb80), INTC_VECT(IRL4_LHLH, 0xba0), 1134 INTC_VECT(IRL4_LHLL, 0x280), INTC_VECT(IRL4_LHLH, 0x2a0),
1085 INTC_VECT(IRL4_LHHL, 0xbc0), INTC_VECT(IRL4_LHHH, 0xbe0), 1135 INTC_VECT(IRL4_LHHL, 0x2c0), INTC_VECT(IRL4_LHHH, 0x2e0),
1086 INTC_VECT(IRL4_HLLL, 0xc00), INTC_VECT(IRL4_HLLH, 0xc20), 1136 INTC_VECT(IRL4_HLLL, 0x300), INTC_VECT(IRL4_HLLH, 0x320),
1087 INTC_VECT(IRL4_HLHL, 0xc40), INTC_VECT(IRL4_HLHH, 0xc60), 1137 INTC_VECT(IRL4_HLHL, 0x340), INTC_VECT(IRL4_HLHH, 0x360),
1088 INTC_VECT(IRL4_HHLL, 0xc80), INTC_VECT(IRL4_HHLH, 0xca0), 1138 INTC_VECT(IRL4_HHLL, 0x380), INTC_VECT(IRL4_HHLH, 0x3a0),
1089 INTC_VECT(IRL4_HHHL, 0xcc0), 1139 INTC_VECT(IRL4_HHHL, 0x3c0),
1090}; 1140};
1091 1141
1092static DECLARE_INTC_DESC(intc_desc_irl0123, "sh7757-irl0123", vectors_irl0123, 1142static DECLARE_INTC_DESC(intc_desc_irl0123, "sh7757-irl0123", vectors_irl0123,
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index 91971103b62b..a3ee91971129 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -13,6 +13,7 @@
13#include <linux/seq_file.h> 13#include <linux/seq_file.h>
14#include <linux/ftrace.h> 14#include <linux/ftrace.h>
15#include <linux/delay.h> 15#include <linux/delay.h>
16#include <linux/ratelimit.h>
16#include <asm/processor.h> 17#include <asm/processor.h>
17#include <asm/machvec.h> 18#include <asm/machvec.h>
18#include <asm/uaccess.h> 19#include <asm/uaccess.h>
@@ -268,9 +269,8 @@ void migrate_irqs(void)
268 unsigned int newcpu = cpumask_any_and(data->affinity, 269 unsigned int newcpu = cpumask_any_and(data->affinity,
269 cpu_online_mask); 270 cpu_online_mask);
270 if (newcpu >= nr_cpu_ids) { 271 if (newcpu >= nr_cpu_ids) {
271 if (printk_ratelimit()) 272 pr_info_ratelimited("IRQ%u no longer affine to CPU%u\n",
272 printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n", 273 irq, cpu);
273 irq, cpu);
274 274
275 cpumask_setall(data->affinity); 275 cpumask_setall(data->affinity);
276 newcpu = cpumask_any_and(data->affinity, 276 newcpu = cpumask_any_and(data->affinity,
diff --git a/arch/sh/mm/alignment.c b/arch/sh/mm/alignment.c
index b2595b8548ee..620fa7ff9eec 100644
--- a/arch/sh/mm/alignment.c
+++ b/arch/sh/mm/alignment.c
@@ -13,6 +13,7 @@
13#include <linux/seq_file.h> 13#include <linux/seq_file.h>
14#include <linux/proc_fs.h> 14#include <linux/proc_fs.h>
15#include <linux/uaccess.h> 15#include <linux/uaccess.h>
16#include <linux/ratelimit.h>
16#include <asm/alignment.h> 17#include <asm/alignment.h>
17#include <asm/processor.h> 18#include <asm/processor.h>
18 19
@@ -95,13 +96,13 @@ int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
95void unaligned_fixups_notify(struct task_struct *tsk, insn_size_t insn, 96void unaligned_fixups_notify(struct task_struct *tsk, insn_size_t insn,
96 struct pt_regs *regs) 97 struct pt_regs *regs)
97{ 98{
98 if (user_mode(regs) && (se_usermode & UM_WARN) && printk_ratelimit()) 99 if (user_mode(regs) && (se_usermode & UM_WARN))
99 pr_notice("Fixing up unaligned userspace access " 100 pr_notice_ratelimited("Fixing up unaligned userspace access "
100 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", 101 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
101 tsk->comm, task_pid_nr(tsk), 102 tsk->comm, task_pid_nr(tsk),
102 (void *)instruction_pointer(regs), insn); 103 (void *)instruction_pointer(regs), insn);
103 else if (se_kernmode_warn && printk_ratelimit()) 104 else if (se_kernmode_warn)
104 pr_notice("Fixing up unaligned kernel access " 105 pr_notice_ratelimited("Fixing up unaligned kernel access "
105 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", 106 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
106 tsk->comm, task_pid_nr(tsk), 107 tsk->comm, task_pid_nr(tsk),
107 (void *)instruction_pointer(regs), insn); 108 (void *)instruction_pointer(regs), insn);