diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/kernel/entry_32.S | 6 | ||||
-rw-r--r-- | arch/powerpc/kernel/process.c | 8 | ||||
-rw-r--r-- | arch/powerpc/kernel/ptrace.c | 7 | ||||
-rw-r--r-- | arch/powerpc/kernel/signal.c | 2 |
4 files changed, 12 insertions, 11 deletions
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S index 81c8324a4a3c..da52269aec1e 100644 --- a/arch/powerpc/kernel/entry_32.S +++ b/arch/powerpc/kernel/entry_32.S | |||
@@ -148,7 +148,7 @@ transfer_to_handler: | |||
148 | /* Check to see if the dbcr0 register is set up to debug. Use the | 148 | /* Check to see if the dbcr0 register is set up to debug. Use the |
149 | internal debug mode bit to do this. */ | 149 | internal debug mode bit to do this. */ |
150 | lwz r12,THREAD_DBCR0(r12) | 150 | lwz r12,THREAD_DBCR0(r12) |
151 | andis. r12,r12,(DBCR0_IDM | DBSR_DAC1R | DBSR_DAC1W)@h | 151 | andis. r12,r12,DBCR0_IDM@h |
152 | beq+ 3f | 152 | beq+ 3f |
153 | /* From user and task is ptraced - load up global dbcr0 */ | 153 | /* From user and task is ptraced - load up global dbcr0 */ |
154 | li r12,-1 /* clear all pending debug events */ | 154 | li r12,-1 /* clear all pending debug events */ |
@@ -292,7 +292,7 @@ syscall_exit_cont: | |||
292 | /* If the process has its own DBCR0 value, load it up. The internal | 292 | /* If the process has its own DBCR0 value, load it up. The internal |
293 | debug mode bit tells us that dbcr0 should be loaded. */ | 293 | debug mode bit tells us that dbcr0 should be loaded. */ |
294 | lwz r0,THREAD+THREAD_DBCR0(r2) | 294 | lwz r0,THREAD+THREAD_DBCR0(r2) |
295 | andis. r10,r0,(DBCR0_IDM | DBSR_DAC1R | DBSR_DAC1W)@h | 295 | andis. r10,r0,DBCR0_IDM@h |
296 | bnel- load_dbcr0 | 296 | bnel- load_dbcr0 |
297 | #endif | 297 | #endif |
298 | #ifdef CONFIG_44x | 298 | #ifdef CONFIG_44x |
@@ -720,7 +720,7 @@ restore_user: | |||
720 | /* Check whether this process has its own DBCR0 value. The internal | 720 | /* Check whether this process has its own DBCR0 value. The internal |
721 | debug mode bit tells us that dbcr0 should be loaded. */ | 721 | debug mode bit tells us that dbcr0 should be loaded. */ |
722 | lwz r0,THREAD+THREAD_DBCR0(r2) | 722 | lwz r0,THREAD+THREAD_DBCR0(r2) |
723 | andis. r10,r0,(DBCR0_IDM | DBSR_DAC1R | DBSR_DAC1W)@h | 723 | andis. r10,r0,DBCR0_IDM@h |
724 | bnel- load_dbcr0 | 724 | bnel- load_dbcr0 |
725 | #endif | 725 | #endif |
726 | 726 | ||
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index db2497ccc111..e030f3bd5024 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c | |||
@@ -254,7 +254,7 @@ void do_dabr(struct pt_regs *regs, unsigned long address, | |||
254 | return; | 254 | return; |
255 | 255 | ||
256 | /* Clear the DAC and struct entries. One shot trigger */ | 256 | /* Clear the DAC and struct entries. One shot trigger */ |
257 | #if (defined(CONFIG_44x) || defined(CONFIG_BOOKE)) | 257 | #if defined(CONFIG_BOOKE) |
258 | mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~(DBSR_DAC1R | DBSR_DAC1W | 258 | mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~(DBSR_DAC1R | DBSR_DAC1W |
259 | | DBCR0_IDM)); | 259 | | DBCR0_IDM)); |
260 | #endif | 260 | #endif |
@@ -286,7 +286,7 @@ int set_dabr(unsigned long dabr) | |||
286 | mtspr(SPRN_DABR, dabr); | 286 | mtspr(SPRN_DABR, dabr); |
287 | #endif | 287 | #endif |
288 | 288 | ||
289 | #if defined(CONFIG_44x) || defined(CONFIG_BOOKE) | 289 | #if defined(CONFIG_BOOKE) |
290 | mtspr(SPRN_DAC1, dabr); | 290 | mtspr(SPRN_DAC1, dabr); |
291 | #endif | 291 | #endif |
292 | 292 | ||
@@ -373,7 +373,7 @@ struct task_struct *__switch_to(struct task_struct *prev, | |||
373 | if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr)) | 373 | if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr)) |
374 | set_dabr(new->thread.dabr); | 374 | set_dabr(new->thread.dabr); |
375 | 375 | ||
376 | #if defined(CONFIG_44x) || defined(CONFIG_BOOKE) | 376 | #if defined(CONFIG_BOOKE) |
377 | /* If new thread DAC (HW breakpoint) is the same then leave it */ | 377 | /* If new thread DAC (HW breakpoint) is the same then leave it */ |
378 | if (new->thread.dabr) | 378 | if (new->thread.dabr) |
379 | set_dabr(new->thread.dabr); | 379 | set_dabr(new->thread.dabr); |
@@ -568,7 +568,7 @@ void flush_thread(void) | |||
568 | current->thread.dabr = 0; | 568 | current->thread.dabr = 0; |
569 | set_dabr(0); | 569 | set_dabr(0); |
570 | 570 | ||
571 | #if defined(CONFIG_44x) || defined(CONFIG_BOOKE) | 571 | #if defined(CONFIG_BOOKE) |
572 | current->thread.dbcr0 &= ~(DBSR_DAC1R | DBSR_DAC1W); | 572 | current->thread.dbcr0 &= ~(DBSR_DAC1R | DBSR_DAC1W); |
573 | #endif | 573 | #endif |
574 | } | 574 | } |
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c index a5d0e78779c8..66204cb51a1a 100644 --- a/arch/powerpc/kernel/ptrace.c +++ b/arch/powerpc/kernel/ptrace.c | |||
@@ -717,7 +717,7 @@ void user_disable_single_step(struct task_struct *task) | |||
717 | struct pt_regs *regs = task->thread.regs; | 717 | struct pt_regs *regs = task->thread.regs; |
718 | 718 | ||
719 | 719 | ||
720 | #if defined(CONFIG_44x) || defined(CONFIG_BOOKE) | 720 | #if defined(CONFIG_BOOKE) |
721 | /* If DAC then do not single step, skip */ | 721 | /* If DAC then do not single step, skip */ |
722 | if (task->thread.dabr) | 722 | if (task->thread.dabr) |
723 | return; | 723 | return; |
@@ -744,10 +744,11 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr, | |||
744 | if (addr > 0) | 744 | if (addr > 0) |
745 | return -EINVAL; | 745 | return -EINVAL; |
746 | 746 | ||
747 | /* The bottom 3 bits in dabr are flags */ | ||
747 | if ((data & ~0x7UL) >= TASK_SIZE) | 748 | if ((data & ~0x7UL) >= TASK_SIZE) |
748 | return -EIO; | 749 | return -EIO; |
749 | 750 | ||
750 | #ifdef CONFIG_PPC64 | 751 | #ifndef CONFIG_BOOKE |
751 | 752 | ||
752 | /* For processors using DABR (i.e. 970), the bottom 3 bits are flags. | 753 | /* For processors using DABR (i.e. 970), the bottom 3 bits are flags. |
753 | * It was assumed, on previous implementations, that 3 bits were | 754 | * It was assumed, on previous implementations, that 3 bits were |
@@ -769,7 +770,7 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr, | |||
769 | task->thread.dabr = data; | 770 | task->thread.dabr = data; |
770 | 771 | ||
771 | #endif | 772 | #endif |
772 | #if defined(CONFIG_44x) || defined(CONFIG_BOOKE) | 773 | #if defined(CONFIG_BOOKE) |
773 | 774 | ||
774 | /* As described above, it was assumed 3 bits were passed with the data | 775 | /* As described above, it was assumed 3 bits were passed with the data |
775 | * address, but we will assume only the mode bits will be passed | 776 | * address, but we will assume only the mode bits will be passed |
diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c index 7aada783ec6a..2b5eaa6c8f33 100644 --- a/arch/powerpc/kernel/signal.c +++ b/arch/powerpc/kernel/signal.c | |||
@@ -147,7 +147,7 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs) | |||
147 | */ | 147 | */ |
148 | if (current->thread.dabr) { | 148 | if (current->thread.dabr) { |
149 | set_dabr(current->thread.dabr); | 149 | set_dabr(current->thread.dabr); |
150 | #if defined(CONFIG_44x) || defined(CONFIG_BOOKE) | 150 | #if defined(CONFIG_BOOKE) |
151 | mtspr(SPRN_DBCR0, current->thread.dbcr0); | 151 | mtspr(SPRN_DBCR0, current->thread.dbcr0); |
152 | #endif | 152 | #endif |
153 | } | 153 | } |