61 files changed, 591 insertions, 196 deletions

diff --git a/arch/arm/include/asm/hardware/sp810.h b/arch/arm/include/asm/hardware/sp810.h
index a101f10bb5b1..721847dc68ab 100644
--- a/arch/arm/include/asm/hardware/sp810.h
+++ b/arch/arm/include/asm/hardware/sp810.h
@@ -50,6 +50,12 @@
 #define SCPCELLID2              0xFF8
 #define SCPCELLID3              0xFFC
 
+#define SCCTRL_TIMEREN0SEL_REFCLK       (0 << 15)
+#define SCCTRL_TIMEREN0SEL_TIMCLK       (1 << 15)
+
+#define SCCTRL_TIMEREN1SEL_REFCLK       (0 << 17)
+#define SCCTRL_TIMEREN1SEL_TIMCLK       (1 << 17)
+
 static inline void sysctl_soft_reset(void __iomem *base)
 {
         /* writing any value to SCSYSSTAT reg will reset system */
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 23c2e8e5c0fa..d0ee74b7cf86 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -188,7 +188,7 @@
  * translation for translating DMA addresses.  Use the driver
  * DMA support - see dma-mapping.h.
  */
-static inline unsigned long virt_to_phys(void *x)
+static inline unsigned long virt_to_phys(const volatile void *x)
 {
         return __virt_to_phys((unsigned long)(x));
 }
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index fd9156698ab9..60636f499cb3 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -36,6 +36,7 @@ static void twd_set_mode(enum clock_event_mode mode,
                 /* timer load already set up */
                 ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE
                         | TWD_TIMER_CONTROL_PERIODIC;
+                __raw_writel(twd_timer_rate / HZ, twd_base + TWD_TIMER_LOAD);
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
                 /* period set, and timer enabled in 'next_event' hook */
@@ -81,7 +82,7 @@ int twd_timer_ack(void)
 
 static void __cpuinit twd_calibrate_rate(void)
 {
-        unsigned long load, count;
+        unsigned long count;
         u64 waitjiffies;
 
         /*
@@ -116,10 +117,6 @@ static void __cpuinit twd_calibrate_rate(void)
                 printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000,
                         (twd_timer_rate / 1000000) % 100);
         }
-
-        load = twd_timer_rate / HZ;
-
-        __raw_writel(load, twd_base + TWD_TIMER_LOAD);
 }
 
 /*
diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c
index f3dc76fdcea8..bec34b834958 100644
--- a/arch/arm/mach-ep93xx/gpio.c
+++ b/arch/arm/mach-ep93xx/gpio.c
@@ -427,6 +427,13 @@ void __init ep93xx_gpio_init(void)
 {
         int i;
 
+        /* Set Ports C, D, E, G, and H for GPIO use */
+        ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
+                                 EP93XX_SYSCON_DEVCFG_GONK |
+                                 EP93XX_SYSCON_DEVCFG_EONIDE |
+                                 EP93XX_SYSCON_DEVCFG_GONIDE |
+                                 EP93XX_SYSCON_DEVCFG_HONIDE);
+
         for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_banks); i++)
                 gpiochip_add(&ep93xx_gpio_banks[i].chip);
 }
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index 8d2f2daba0c0..e0a028161dde 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -9,6 +9,7 @@ config ARCH_OMAP730
         depends on ARCH_OMAP1
         bool "OMAP730 Based System"
         select CPU_ARM926T
+        select OMAP_MPU_TIMER
         select ARCH_OMAP_OTG
 
 config ARCH_OMAP850
@@ -22,6 +23,7 @@ config ARCH_OMAP15XX
         default y
         bool "OMAP15xx Based System"
         select CPU_ARM925T
+        select OMAP_MPU_TIMER
 
 config ARCH_OMAP16XX
         depends on ARCH_OMAP1
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index 6ee19504845f..ba6009f27677 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -3,12 +3,11 @@
 #
 
 # Common support
-obj-y := io.o id.o sram.o irq.o mux.o flash.o serial.o devices.o dma.o
+obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o
 obj-y += clock.o clock_data.o opp_data.o
 
 obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
 
-obj-$(CONFIG_OMAP_MPU_TIMER)    += time.o
 obj-$(CONFIG_OMAP_32K_TIMER)    += timer32k.o
 
 # Power Management
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index ed7a61ff916a..f83fc335c613 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -44,16 +44,21 @@
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
 #include <linux/io.h>
+#include <linux/sched.h>
 
 #include <asm/system.h>
 #include <mach/hardware.h>
 #include <asm/leds.h>
 #include <asm/irq.h>
+#include <asm/sched_clock.h>
+
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
 
 #include <plat/common.h>
 
+#ifdef CONFIG_OMAP_MPU_TIMER
+
 #define OMAP_MPU_TIMER_BASE             OMAP_MPU_TIMER1_BASE
 #define OMAP_MPU_TIMER_OFFSET           0x100
 
@@ -67,7 +72,7 @@ typedef struct {
 ((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE +        \
                                  (n)*OMAP_MPU_TIMER_OFFSET))
 
-static inline unsigned long omap_mpu_timer_read(int nr)
+static inline unsigned long notrace omap_mpu_timer_read(int nr)
 {
         volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
         return timer->read_tim;
@@ -212,6 +217,32 @@ static struct clocksource clocksource_mpu = {
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
+static DEFINE_CLOCK_DATA(cd);
+
+static inline unsigned long long notrace _omap_mpu_sched_clock(void)
+{
+        u32 cyc = mpu_read(&clocksource_mpu);
+        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
+}
+
+#ifndef CONFIG_OMAP_32K_TIMER
+unsigned long long notrace sched_clock(void)
+{
+        return _omap_mpu_sched_clock();
+}
+#else
+static unsigned long long notrace omap_mpu_sched_clock(void)
+{
+        return _omap_mpu_sched_clock();
+}
+#endif
+
+static void notrace mpu_update_sched_clock(void)
+{
+        u32 cyc = mpu_read(&clocksource_mpu);
+        update_sched_clock(&cd, cyc, (u32)~0);
+}
+
 static void __init omap_init_clocksource(unsigned long rate)
 {
         static char err[] __initdata = KERN_ERR
@@ -219,17 +250,13 @@ static void __init omap_init_clocksource(unsigned long rate)
 
         setup_irq(INT_TIMER2, &omap_mpu_timer2_irq);
         omap_mpu_timer_start(1, ~0, 1);
+        init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
 
         if (clocksource_register_hz(&clocksource_mpu, rate))
                 printk(err, clocksource_mpu.name);
 }
 
-/*
- * ---------------------------------------------------------------------------
- * Timer initialization
- * ---------------------------------------------------------------------------
- */
-static void __init omap_timer_init(void)
+static void __init omap_mpu_timer_init(void)
 {
         struct clk      *ck_ref = clk_get(NULL, "ck_ref");
         unsigned long   rate;
@@ -246,6 +273,66 @@ static void __init omap_timer_init(void)
         omap_init_clocksource(rate);
 }
 
+#else
+static inline void omap_mpu_timer_init(void)
+{
+        pr_err("Bogus timer, should not happen\n");
+}
+#endif  /* CONFIG_OMAP_MPU_TIMER */
+
+#if defined(CONFIG_OMAP_MPU_TIMER) && defined(CONFIG_OMAP_32K_TIMER)
+static unsigned long long (*preferred_sched_clock)(void);
+
+unsigned long long notrace sched_clock(void)
+{
+        if (!preferred_sched_clock)
+                return 0;
+
+        return preferred_sched_clock();
+}
+
+static inline void preferred_sched_clock_init(bool use_32k_sched_clock)
+{
+        if (use_32k_sched_clock)
+                preferred_sched_clock = omap_32k_sched_clock;
+        else
+                preferred_sched_clock = omap_mpu_sched_clock;
+}
+#else
+static inline void preferred_sched_clock_init(bool use_32k_sched_clcok)
+{
+}
+#endif
+
+static inline int omap_32k_timer_usable(void)
+{
+        int res = false;
+
+        if (cpu_is_omap730() || cpu_is_omap15xx())
+                return res;
+
+#ifdef CONFIG_OMAP_32K_TIMER
+        res = omap_32k_timer_init();
+#endif
+
+        return res;
+}
+
+/*
+ * ---------------------------------------------------------------------------
+ * Timer initialization
+ * ---------------------------------------------------------------------------
+ */
+static void __init omap_timer_init(void)
+{
+        if (omap_32k_timer_usable()) {
+                preferred_sched_clock_init(1);
+        } else {
+                omap_mpu_timer_init();
+                preferred_sched_clock_init(0);
+        }
+}
+
 struct sys_timer omap_timer = {
         .init           = omap_timer_init,
 };
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 20cfbcc6c60c..13d7b8f145bd 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -52,10 +52,9 @@
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
+#include <plat/common.h>
 #include <plat/dmtimer.h>
 
-struct sys_timer omap_timer;
-
 /*
  * ---------------------------------------------------------------------------
  * 32KHz OS timer
@@ -181,14 +180,14 @@ static __init void omap_init_32k_timer(void)
  * Timer initialization
  * ---------------------------------------------------------------------------
  */
-static void __init omap_timer_init(void)
+bool __init omap_32k_timer_init(void)
 {
+        omap_init_clocksource_32k();
+
 #ifdef CONFIG_OMAP_DM_TIMER
         omap_dm_timer_init();
 #endif
         omap_init_32k_timer();
-}
 
-struct sys_timer omap_timer = {
-        .init           = omap_timer_init,
-};
+        return true;
+}
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 5b0c77732dfc..8f9a64d650ee 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -124,8 +124,9 @@ static inline void cm_t3517_init_hecc(void) {}
 #if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
 #define RTC_IO_GPIO             (153)
 #define RTC_WR_GPIO             (154)
-#define RTC_RD_GPIO             (160)
+#define RTC_RD_GPIO             (53)
 #define RTC_CS_GPIO             (163)
+#define RTC_CS_EN_GPIO          (160)
 
 struct v3020_platform_data cm_t3517_v3020_pdata = {
         .use_gpio       = 1,
@@ -145,6 +146,16 @@ static struct platform_device cm_t3517_rtc_device = {
 
 static void __init cm_t3517_init_rtc(void)
 {
+        int err;
+
+        err = gpio_request(RTC_CS_EN_GPIO, "rtc cs en");
+        if (err) {
+                pr_err("CM-T3517: rtc cs en gpio request failed: %d\n", err);
+                return;
+        }
+
+        gpio_direction_output(RTC_CS_EN_GPIO, 1);
+
         platform_device_register(&cm_t3517_rtc_device);
 }
 #else
@@ -214,12 +225,12 @@ static struct mtd_partition cm_t3517_nand_partitions[] = {
         },
         {
                 .name           = "linux",
-                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x280000 */
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x2A0000 */
                 .size           = 32 * NAND_BLOCK_SIZE,
         },
         {
                 .name           = "rootfs",
-                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x680000 */
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x6A0000 */
                 .size           = MTDPART_SIZ_FULL,
         },
 };
@@ -256,11 +267,19 @@ static void __init cm_t3517_init_irq(void)
 static struct omap_board_mux board_mux[] __initdata = {
         /* GPIO186 - Green LED */
         OMAP3_MUX(SYS_CLKOUT2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
-        /* RTC GPIOs: IO, WR#, RD#, CS# */
+
+        /* RTC GPIOs: */
+        /* IO - GPIO153 */
         OMAP3_MUX(MCBSP4_DR, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
+        /* WR# - GPIO154 */
         OMAP3_MUX(MCBSP4_DX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
-        OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
+        /* RD# - GPIO53 */
+        OMAP3_MUX(GPMC_NCS2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
+        /* CS# - GPIO163 */
         OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
+        /* CS EN - GPIO160 */
+        OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
+
         /* HSUSB1 RESET */
         OMAP3_MUX(UART2_TX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
         /* HSUSB2 RESET */
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 00bb1fc5e017..e906e05bb41b 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -275,8 +275,7 @@ static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
         .irq_base       = TWL4030_GPIO_IRQ_BASE,
         .irq_end        = TWL4030_GPIO_IRQ_END,
         .use_leds       = true,
-        .pullups        = BIT(1),
-        .pulldowns      = BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13)
+        .pulldowns      = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13)
                                 | BIT(15) | BIT(16) | BIT(17),
         .setup          = devkit8000_twl_gpio_setup,
 };
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index e8cb32fd7f13..de9ec8ddd2ae 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -34,7 +34,6 @@
 #include "cm2_44xx.h"
 #include "cm-regbits-44xx.h"
 #include "prm44xx.h"
-#include "prm44xx.h"
 #include "prm-regbits-44xx.h"
 #include "control.h"
 #include "scrm44xx.h"
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index e20b98636ab4..58e42f76603f 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -423,6 +423,12 @@ int clkdm_add_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
 {
         struct clkdm_dep *cd;
 
+        if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
+                pr_err("clockdomain: %s/%s: %s: not yet implemented\n",
+                       clkdm1->name, clkdm2->name, __func__);
+                return -EINVAL;
+        }
+
         if (!clkdm1 || !clkdm2)
                 return -EINVAL;
 
@@ -458,6 +464,12 @@ int clkdm_del_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
 {
         struct clkdm_dep *cd;
 
+        if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
+                pr_err("clockdomain: %s/%s: %s: not yet implemented\n",
+                       clkdm1->name, clkdm2->name, __func__);
+                return -EINVAL;
+        }
+
         if (!clkdm1 || !clkdm2)
                 return -EINVAL;
 
@@ -500,6 +512,12 @@ int clkdm_read_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
         if (!clkdm1 || !clkdm2)
                 return -EINVAL;
 
+        if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
+                pr_err("clockdomain: %s/%s: %s: not yet implemented\n",
+                       clkdm1->name, clkdm2->name, __func__);
+                return -EINVAL;
+        }
+
         cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs);
         if (IS_ERR(cd)) {
                 pr_debug("clockdomain: hardware cannot set/clear wake up of "
@@ -527,6 +545,12 @@ int clkdm_clear_all_wkdeps(struct clockdomain *clkdm)
         struct clkdm_dep *cd;
         u32 mask = 0;
 
+        if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
+                pr_err("clockdomain: %s: %s: not yet implemented\n",
+                       clkdm->name, __func__);
+                return -EINVAL;
+        }
+
         if (!clkdm)
                 return -EINVAL;
 
@@ -830,8 +854,7 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
          * dependency code and data for OMAP4.
          */
         if (cpu_is_omap44xx()) {
-                WARN_ONCE(1, "clockdomain: OMAP4 wakeup/sleep dependency "
-                          "support is not yet implemented\n");
+                pr_err("clockdomain: %s: OMAP4 wakeup/sleep dependency support: not yet implemented\n", clkdm->name);
         } else {
                 if (atomic_read(&clkdm->usecount) > 0)
                         _clkdm_add_autodeps(clkdm);
@@ -872,8 +895,7 @@ void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
          * dependency code and data for OMAP4.
          */
         if (cpu_is_omap44xx()) {
-                WARN_ONCE(1, "clockdomain: OMAP4 wakeup/sleep dependency "
-                          "support is not yet implemented\n");
+                pr_err("clockdomain: %s: OMAP4 wakeup/sleep dependency support: not yet implemented\n", clkdm->name);
         } else {
                 if (atomic_read(&clkdm->usecount) > 0)
                         _clkdm_del_autodeps(clkdm);
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index 51920fc7fc52..10622c914abc 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -30,8 +30,6 @@
 #include "cm1_44xx.h"
 #include "cm2_44xx.h"
 
-#include "cm1_44xx.h"
-#include "cm2_44xx.h"
 #include "cm-regbits-44xx.h"
 #include "prm44xx.h"
 #include "prcm44xx.h"
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 9e5dc8ed51e9..97feb3ab6a69 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -134,7 +134,7 @@ static void omap2_enter_full_retention(void)
 
         /* Block console output in case it is on one of the OMAP UARTs */
         if (!is_suspending())
-                if (try_acquire_console_sem())
+                if (!console_trylock())
                         goto no_sleep;
 
         omap_uart_prepare_idle(0);
@@ -151,7 +151,7 @@ static void omap2_enter_full_retention(void)
         omap_uart_resume_idle(0);
 
         if (!is_suspending())
-                release_console_sem();
+                console_unlock();
 
 no_sleep:
         if (omap2_pm_debug) {
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 8cbbeade4b8a..a4aa1920a75c 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -398,7 +398,7 @@ void omap_sram_idle(void)
         if (!is_suspending())
                 if (per_next_state < PWRDM_POWER_ON ||
                     core_next_state < PWRDM_POWER_ON)
-                        if (try_acquire_console_sem())
+                        if (!console_trylock())
                                 goto console_still_active;
 
         /* PER */
@@ -481,7 +481,7 @@ void omap_sram_idle(void)
         }
 
         if (!is_suspending())
-                release_console_sem();
+                console_unlock();
 
 console_still_active:
         /* Disable IO-PAD and IO-CHAIN wakeup */
diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
index d5233890370c..cf600e22bf8e 100644
--- a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
@@ -19,7 +19,6 @@
 #include <plat/prcm.h>
 
 #include "powerdomain.h"
-#include "prm-regbits-34xx.h"
 #include "prm.h"
 #include "prm-regbits-24xx.h"
 #include "prm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 302da7403a10..32e91a9c8b6b 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -812,7 +812,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
 
         oh->dev_attr = uart;
 
-        acquire_console_sem(); /* in case the earlycon is on the UART */
+        console_lock(); /* in case the earlycon is on the UART */
 
         /*
          * Because of early UART probing, UART did not get idled
@@ -838,7 +838,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
         omap_uart_block_sleep(uart);
         uart->timeout = DEFAULT_TIMEOUT;
 
-        release_console_sem();
+        console_unlock();
 
         if ((cpu_is_omap34xx() && uart->padconf) ||
             (uart->wk_en && uart->wk_mask)) {
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 4e48e786bec7..7b7c2683ae7b 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -42,6 +42,8 @@
 
 #include "timer-gp.h"
 
+#include <plat/common.h>
+
 /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
 #define MAX_GPTIMER_ID          12
 
@@ -176,10 +178,14 @@ static void __init omap2_gp_clockevent_init(void)
 /* 
  * When 32k-timer is enabled, don't use GPTimer for clocksource
  * instead, just leave default clocksource which uses the 32k
- * sync counter.  See clocksource setup in see plat-omap/common.c. 
+ * sync counter.  See clocksource setup in plat-omap/counter_32k.c
  */
 
-static inline void __init omap2_gp_clocksource_init(void) {}
+static void __init omap2_gp_clocksource_init(void)
+{
+        omap_init_clocksource_32k();
+}
+
 #else
 /*
  * clocksource
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index b4575ae9648e..7ca138a943a9 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -2,52 +2,56 @@ menu "RealView platform type"
         depends on ARCH_REALVIEW
 
 config MACH_REALVIEW_EB
-        bool "Support RealView/EB platform"
+        bool "Support RealView(R) Emulation Baseboard"
         select ARM_GIC
         help
-          Include support for the ARM(R) RealView Emulation Baseboard platform.
+          Include support for the ARM(R) RealView(R) Emulation Baseboard
+          platform.
 
 config REALVIEW_EB_A9MP
-        bool "Support Multicore Cortex-A9"
+        bool "Support Multicore Cortex-A9 Tile"
         depends on MACH_REALVIEW_EB
         select CPU_V7
         help
-          Enable support for the Cortex-A9MPCore tile on the Realview platform.
+          Enable support for the Cortex-A9MPCore tile fitted to the
+          Realview(R) Emulation Baseboard platform.
 
 config REALVIEW_EB_ARM11MP
-        bool "Support ARM11MPCore tile"
+        bool "Support ARM11MPCore Tile"
         depends on MACH_REALVIEW_EB
         select CPU_V6
         select ARCH_HAS_BARRIERS if SMP
         help
-          Enable support for the ARM11MPCore tile on the Realview platform.
+          Enable support for the ARM11MPCore tile fitted to the Realview(R)
+          Emulation Baseboard platform.
 
 config REALVIEW_EB_ARM11MP_REVB
-        bool "Support ARM11MPCore RevB tile"
+        bool "Support ARM11MPCore RevB Tile"
         depends on REALVIEW_EB_ARM11MP
         help
-          Enable support for the ARM11MPCore RevB tile on the Realview
-          platform. Since there are device address differences, a
-          kernel built with this option enabled is not compatible with
-          other revisions of the ARM11MPCore tile.
+          Enable support for the ARM11MPCore Revision B tile on the
+          Realview(R) Emulation Baseboard platform. Since there are device
+          address differences, a kernel built with this option enabled is
+          not compatible with other revisions of the ARM11MPCore tile.
 
 config MACH_REALVIEW_PB11MP
-        bool "Support RealView/PB11MPCore platform"
+        bool "Support RealView(R) Platform Baseboard for ARM11MPCore"
         select CPU_V6
         select ARM_GIC
         select HAVE_PATA_PLATFORM
         select ARCH_HAS_BARRIERS if SMP
         help
-          Include support for the ARM(R) RealView MPCore Platform Baseboard.
-          PB11MPCore is a platform with an on-board ARM11MPCore and has
+          Include support for the ARM(R) RealView(R) Platform Baseboard for
+          the ARM11MPCore.  This platform has an on-board ARM11MPCore and has
           support for PCI-E and Compact Flash.
 
 config MACH_REALVIEW_PB1176
-        bool "Support RealView/PB1176 platform"
+        bool "Support RealView(R) Platform Baseboard for ARM1176JZF-S"
         select CPU_V6
         select ARM_GIC
         help
-          Include support for the ARM(R) RealView ARM1176 Platform Baseboard.
+          Include support for the ARM(R) RealView(R) Platform Baseboard for
+          ARM1176JZF-S.
 
 config REALVIEW_PB1176_SECURE_FLASH
         bool "Allow access to the secure flash memory block"
@@ -59,23 +63,24 @@ config REALVIEW_PB1176_SECURE_FLASH
           block (64MB @ 0x3c000000) is required.
 
 config MACH_REALVIEW_PBA8
-        bool "Support RealView/PB-A8 platform"
+        bool "Support RealView(R) Platform Baseboard for Cortex(tm)-A8 platform"
         select CPU_V7
         select ARM_GIC
         select HAVE_PATA_PLATFORM
         help
-          Include support for the ARM(R) RealView Cortex-A8 Platform Baseboard.
-          PB-A8 is a platform with an on-board Cortex-A8 and has support for
-          PCI-E and Compact Flash.
+          Include support for the ARM(R) RealView Platform Baseboard for
+          Cortex(tm)-A8.  This platform has an on-board Cortex-A8 and has
+          support for PCI-E and Compact Flash.
 
 config MACH_REALVIEW_PBX
-        bool "Support RealView/PBX platform"
+        bool "Support RealView(R) Platform Baseboard Explore"
         select ARM_GIC
         select HAVE_PATA_PLATFORM
         select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET
         select ZONE_DMA if SPARSEMEM
         help
-          Include support for the ARM(R) RealView PBX platform.
+          Include support for the ARM(R) RealView(R) Platform Baseboard
+          Explore.
 
 config REALVIEW_HIGH_PHYS_OFFSET
         bool "High physical base address for the RealView platform"
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index a22bf67f2f78..6959d13d908a 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -41,7 +41,7 @@ volatile int __cpuinitdata pen_release = -1;
  * observers, irrespective of whether they're taking part in coherency
  * or not.  This is necessary for the hotplug code to work reliably.
  */
-static void write_pen_release(int val)
+static void __cpuinit write_pen_release(int val)
 {
         pen_release = val;
         smp_wmb();
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 4d1b4c5c9389..0c8f6cf3e948 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -60,6 +60,8 @@ endchoice
 
 config MACH_AG5EVM
         bool "AG5EVM board"
+        select ARCH_REQUIRE_GPIOLIB
+        select SH_LCD_MIPI_DSI
         depends on ARCH_SH73A0
 
 config MACH_MACKEREL
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index c18a740a4159..2123b96b5638 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -34,9 +34,10 @@
 #include <linux/input/sh_keysc.h>
 #include <linux/mmc/host.h>
 #include <linux/mmc/sh_mmcif.h>
-
+#include <linux/sh_clk.h>
+#include <video/sh_mobile_lcdc.h>
+#include <video/sh_mipi_dsi.h>
 #include <sound/sh_fsi.h>
-
 #include <mach/hardware.h>
 #include <mach/sh73a0.h>
 #include <mach/common.h>
@@ -183,11 +184,165 @@ static struct platform_device mmc_device = {
         .resource       = sh_mmcif_resources,
 };
 
+/* IrDA */
+static struct resource irda_resources[] = {
+        [0] = {
+                .start  = 0xE6D00000,
+                .end    = 0xE6D01FD4 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = gic_spi(95),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device irda_device = {
+        .name           = "sh_irda",
+        .id             = 0,
+        .resource       = irda_resources,
+        .num_resources  = ARRAY_SIZE(irda_resources),
+};
+
+static unsigned char lcd_backlight_seq[3][2] = {
+        { 0x04, 0x07 },
+        { 0x23, 0x80 },
+        { 0x03, 0x01 },
+};
+
+static void lcd_backlight_on(void)
+{
+        struct i2c_adapter *a;
+        struct i2c_msg msg;
+        int k;
+
+        a = i2c_get_adapter(1);
+        for (k = 0; a && k < 3; k++) {
+                msg.addr = 0x6d;
+                msg.buf = &lcd_backlight_seq[k][0];
+                msg.len = 2;
+                msg.flags = 0;
+                if (i2c_transfer(a, &msg, 1) != 1)
+                        break;
+        }
+}
+
+static void lcd_backlight_reset(void)
+{
+        gpio_set_value(GPIO_PORT235, 0);
+        mdelay(24);
+        gpio_set_value(GPIO_PORT235, 1);
+}
+
+static void lcd_on(void *board_data, struct fb_info *info)
+{
+        lcd_backlight_on();
+}
+
+static void lcd_off(void *board_data)
+{
+        lcd_backlight_reset();
+}
+
+/* LCDC0 */
+static const struct fb_videomode lcdc0_modes[] = {
+        {
+                .name           = "R63302(QHD)",
+                .xres           = 544,
+                .yres           = 961,
+                .left_margin    = 72,
+                .right_margin   = 600,
+                .hsync_len      = 16,
+                .upper_margin   = 8,
+                .lower_margin   = 8,
+                .vsync_len      = 2,
+                .sync           = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
+        },
+};
+
+static struct sh_mobile_lcdc_info lcdc0_info = {
+        .clock_source = LCDC_CLK_PERIPHERAL,
+        .ch[0] = {
+                .chan = LCDC_CHAN_MAINLCD,
+                .interface_type = RGB24,
+                .clock_divider = 1,
+                .flags = LCDC_FLAGS_DWPOL,
+                .lcd_size_cfg.width = 44,
+                .lcd_size_cfg.height = 79,
+                .bpp = 16,
+                .lcd_cfg = lcdc0_modes,
+                .num_cfg = ARRAY_SIZE(lcdc0_modes),
+                .board_cfg = {
+                        .display_on = lcd_on,
+                        .display_off = lcd_off,
+                },
+        }
+};
+
+static struct resource lcdc0_resources[] = {
+        [0] = {
+                .name   = "LCDC0",
+                .start  = 0xfe940000, /* P4-only space */
+                .end    = 0xfe943fff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = intcs_evt2irq(0x580),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device lcdc0_device = {
+        .name           = "sh_mobile_lcdc_fb",
+        .num_resources  = ARRAY_SIZE(lcdc0_resources),
+        .resource       = lcdc0_resources,
+        .id             = 0,
+        .dev    = {
+                .platform_data  = &lcdc0_info,
+                .coherent_dma_mask = ~0,
+        },
+};
+
+/* MIPI-DSI */
+static struct resource mipidsi0_resources[] = {
+        [0] = {
+                .start  = 0xfeab0000,
+                .end    = 0xfeab3fff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 0xfeab4000,
+                .end    = 0xfeab7fff,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct sh_mipi_dsi_info mipidsi0_info = {
+        .data_format    = MIPI_RGB888,
+        .lcd_chan       = &lcdc0_info.ch[0],
+        .vsynw_offset   = 20,
+        .clksrc         = 1,
+        .flags          = SH_MIPI_DSI_HSABM,
+};
+
+static struct platform_device mipidsi0_device = {
+        .name           = "sh-mipi-dsi",
+        .num_resources  = ARRAY_SIZE(mipidsi0_resources),
+        .resource       = mipidsi0_resources,
+        .id             = 0,
+        .dev    = {
+                .platform_data  = &mipidsi0_info,
+        },
+};
+
 static struct platform_device *ag5evm_devices[] __initdata = {
         &eth_device,
         &keysc_device,
         &fsi_device,
         &mmc_device,
+        &irda_device,
+        &lcdc0_device,
+        &mipidsi0_device,
 };
 
 static struct map_desc ag5evm_io_desc[] __initdata = {
@@ -224,6 +379,8 @@ void __init ag5evm_init_irq(void)
         __raw_writew(__raw_readw(PINTCR0A) | (2<<10), PINTCR0A);
 }
 
+#define DSI0PHYCR       0xe615006c
+
 static void __init ag5evm_init(void)
 {
         sh73a0_pinmux_init();
@@ -287,6 +444,25 @@ static void __init ag5evm_init(void)
         gpio_request(GPIO_FN_FSIAISLD, NULL);
         gpio_request(GPIO_FN_FSIAOSLD, NULL);
 
+        /* IrDA */
+        gpio_request(GPIO_FN_PORT241_IRDA_OUT, NULL);
+        gpio_request(GPIO_FN_PORT242_IRDA_IN,  NULL);
+        gpio_request(GPIO_FN_PORT243_IRDA_FIRSEL, NULL);
+
+        /* LCD panel */
+        gpio_request(GPIO_PORT217, NULL); /* RESET */
+        gpio_direction_output(GPIO_PORT217, 0);
+        mdelay(1);
+        gpio_set_value(GPIO_PORT217, 1);
+
+        /* LCD backlight controller */
+        gpio_request(GPIO_PORT235, NULL); /* RESET */
+        gpio_direction_output(GPIO_PORT235, 0);
+        lcd_backlight_reset();
+
+        /* MIPI-DSI clock setup */
+        __raw_writel(0x2a809010, DSI0PHYCR);
+
 #ifdef CONFIG_CACHE_L2X0
         /* Shared attribute override enable, 64K*8way */
         l2x0_init(__io(0xf0100000), 0x00460000, 0xc2000fff);
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c
index 686b304a7708..ef4613b993a2 100644
--- a/arch/arm/mach-shmobile/board-g3evm.c
+++ b/arch/arm/mach-shmobile/board-g3evm.c
@@ -347,7 +347,6 @@ static void __init g3evm_init(void)
         gpio_request(GPIO_FN_IRDA_OUT, NULL);
         gpio_request(GPIO_FN_IRDA_IN, NULL);
         gpio_request(GPIO_FN_IRDA_FIRSEL, NULL);
-        set_irq_type(evt2irq(0x480), IRQ_TYPE_LEVEL_LOW);
 
         sh7367_add_standard_devices();
 
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 7b15d21f0f68..fb4213a4e15a 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -169,9 +169,8 @@
  *      SW1     |       SW33
  *              | bit1 | bit2 | bit3 | bit4
  * -------------+------+------+------+-------
- * MMC0   OFF   |  OFF |  ON  |  ON  |  X
- * MMC1   ON    |  OFF |  ON  |  X   | ON
- * SDHI1  OFF   |  ON  |   X  |  OFF | ON
+ * MMC0   OFF   |  OFF |   X  |  ON  |  X       (Use MMCIF)
+ * SDHI1  OFF   |  ON  |   X  |  OFF |  X       (Use MFD_SH_MOBILE_SDHI)
  *
  */
 
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 9aa8d68d1a9c..e9731b5a73ed 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -234,7 +234,9 @@ static int pllc2_set_rate(struct clk *clk, unsigned long rate)
 
         value = __raw_readl(PLLC2CR) & ~(0x3f << 24);
 
-        __raw_writel((value & ~0x80000000) | ((idx + 19) << 24), PLLC2CR);
+        __raw_writel(value | ((idx + 19) << 24), PLLC2CR);
+
+        clk->rate = clk->freq_table[idx].frequency;
 
         return 0;
 }
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 720a71433be6..ddd4a1b775f0 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -118,8 +118,16 @@ static unsigned long pll_recalc(struct clk *clk)
 {
         unsigned long mult = 1;
 
-        if (__raw_readl(PLLECR) & (1 << clk->enable_bit))
+        if (__raw_readl(PLLECR) & (1 << clk->enable_bit)) {
                 mult = (((__raw_readl(clk->enable_reg) >> 24) & 0x3f) + 1);
+                /* handle CFG bit for PLL1 and PLL2 */
+                switch (clk->enable_bit) {
+                case 1:
+                case 2:
+                        if (__raw_readl(clk->enable_reg) & (1 << 20))
+                                mult *= 2;
+                }
+        }
 
         return clk->parent->rate * mult;
 }
@@ -212,7 +220,7 @@ enum { DIV4_I, DIV4_ZG, DIV4_M3, DIV4_B, DIV4_M1, DIV4_M2,
 static struct clk div4_clks[DIV4_NR] = {
         [DIV4_I] = DIV4(FRQCRA, 20, 0xfff, CLK_ENABLE_ON_INIT),
         [DIV4_ZG] = DIV4(FRQCRA, 16, 0xbff, CLK_ENABLE_ON_INIT),
-        [DIV4_M3] = DIV4(FRQCRA, 8, 0xfff, CLK_ENABLE_ON_INIT),
+        [DIV4_M3] = DIV4(FRQCRA, 12, 0xfff, CLK_ENABLE_ON_INIT),
         [DIV4_B] = DIV4(FRQCRA, 8, 0xfff, CLK_ENABLE_ON_INIT),
         [DIV4_M1] = DIV4(FRQCRA, 4, 0xfff, 0),
         [DIV4_M2] = DIV4(FRQCRA, 0, 0xfff, 0),
@@ -255,10 +263,10 @@ static struct clk div6_clks[DIV6_NR] = {
 };
 
 enum { MSTP001,
-        MSTP125, MSTP116,
+        MSTP125, MSTP118, MSTP116, MSTP100,
         MSTP219,
         MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
-        MSTP331, MSTP329, MSTP323, MSTP312,
+        MSTP331, MSTP329, MSTP325, MSTP323, MSTP312,
         MSTP411, MSTP410, MSTP403,
         MSTP_NR };
 
@@ -268,7 +276,9 @@ enum { MSTP001,
 static struct clk mstp_clks[MSTP_NR] = {
         [MSTP001] = MSTP(&div4_clks[DIV4_HP], SMSTPCR0, 1, 0), /* IIC2 */
         [MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
+        [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX0 */
         [MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
+        [MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */
         [MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */
         [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
         [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
@@ -279,6 +289,7 @@ static struct clk mstp_clks[MSTP_NR] = {
         [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
         [MSTP331] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 31, 0), /* SCIFA6 */
         [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
+        [MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */
         [MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
         [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
         [MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */
@@ -288,16 +299,25 @@ static struct clk mstp_clks[MSTP_NR] = {
 
 #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
 #define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
+#define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk }
 
 static struct clk_lookup lookups[] = {
         /* main clocks */
         CLKDEV_CON_ID("r_clk", &r_clk),
 
+        /* DIV6 clocks */
+        CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
+        CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
+        CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
+        CLKDEV_ICK_ID("dsi1p_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
+
         /* MSTP32 clocks */
         CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
+        CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
         CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
         CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
         CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
+        CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
         CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
         CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
         CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
@@ -308,6 +328,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
         CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
         CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
+        CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
         CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
         CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
         CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index f78a1ead71a5..ca5f9d17b39a 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -365,6 +365,7 @@ static struct intc_desc intca_desc __initdata = {
 
 enum {
         UNUSED_INTCS = 0,
+        ENABLED_INTCS,
 
         INTCS,
 
@@ -413,7 +414,7 @@ enum {
         CMT4,
         DSITX1_DSITX1_0,
         DSITX1_DSITX1_1,
-        /* MFIS2 */
+        MFIS2_INTCS, /* Priority always enabled using ENABLED_INTCS */
         CPORTS2R,
         /* CEC */
         JPU6E,
@@ -477,7 +478,7 @@ static struct intc_vect intcs_vectors[] = {
         INTCS_VECT(CMT4, 0x1980),
         INTCS_VECT(DSITX1_DSITX1_0, 0x19a0),
         INTCS_VECT(DSITX1_DSITX1_1, 0x19c0),
-        /* MFIS2 */
+        INTCS_VECT(MFIS2_INTCS, 0x1a00),
         INTCS_VECT(CPORTS2R, 0x1a20),
         /* CEC */
         INTCS_VECT(JPU6E, 0x1a80),
@@ -543,7 +544,7 @@ static struct intc_mask_reg intcs_mask_registers[] = {
           { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
             CMT4, DSITX1_DSITX1_0, DSITX1_DSITX1_1, 0 } },
         { 0xffd5019c, 0xffd501dc, 8, /* IMR7SA3 / IMCR7SA3 */
-          { 0, CPORTS2R, 0, 0,
+          { MFIS2_INTCS, CPORTS2R, 0, 0,
             JPU6E, 0, 0, 0 } },
         { 0xffd20104, 0, 16, /* INTAMASK */
           { 0, 0, 0, 0, 0, 0, 0, 0,
@@ -571,7 +572,8 @@ static struct intc_prio_reg intcs_prio_registers[] = {
         { 0xffd50030, 0, 16, 4, /* IPRMS3 */ { TMU1, 0, 0, 0 } },
         { 0xffd50034, 0, 16, 4, /* IPRNS3 */ { CMT4, DSITX1_DSITX1_0,
                                                DSITX1_DSITX1_1, 0 } },
-        { 0xffd50038, 0, 16, 4, /* IPROS3 */ { 0, CPORTS2R, 0, 0 } },
+        { 0xffd50038, 0, 16, 4, /* IPROS3 */ { ENABLED_INTCS, CPORTS2R,
+                                               0, 0 } },
         { 0xffd5003c, 0, 16, 4, /* IPRPS3 */ { JPU6E, 0, 0, 0 } },
 };
 
@@ -590,6 +592,7 @@ static struct resource intcs_resources[] __initdata = {
 
 static struct intc_desc intcs_desc __initdata = {
         .name = "sh7372-intcs",
+        .force_enable = ENABLED_INTCS,
         .resource = intcs_resources,
         .num_resources = ARRAY_SIZE(intcs_resources),
         .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, intcs_mask_registers,
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index 322d8d57cbcf..5d0e1503ece6 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -252,10 +252,11 @@ static irqreturn_t sh73a0_intcs_demux(int irq, void *dev_id)
 
 void __init sh73a0_init_irq(void)
 {
-        void __iomem *gic_base = __io(0xf0001000);
+        void __iomem *gic_dist_base = __io(0xf0001000);
+        void __iomem *gic_cpu_base = __io(0xf0000100);
         void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
 
-        gic_init(0, 29, gic_base, gic_base);
+        gic_init(0, 29, gic_dist_base, gic_cpu_base);
 
         register_intc_controller(&intcs_desc);
 
diff --git a/arch/arm/mach-tegra/include/mach/kbc.h b/arch/arm/mach-tegra/include/mach/kbc.h
new file mode 100644
index 000000000000..66ad2760c621
--- /dev/null
+++ b/arch/arm/mach-tegra/include/mach/kbc.h
@@ -0,0 +1,61 @@
+/*
+ * Platform definitions for tegra-kbc keyboard input driver
+ *
+ * Copyright (c) 2010-2011, NVIDIA Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ */
+
+#ifndef ASMARM_ARCH_TEGRA_KBC_H
+#define ASMARM_ARCH_TEGRA_KBC_H
+
+#include <linux/types.h>
+#include <linux/input/matrix_keypad.h>
+
+#ifdef CONFIG_ARCH_TEGRA_2x_SOC
+#define KBC_MAX_GPIO    24
+#define KBC_MAX_KPENT   8
+#else
+#define KBC_MAX_GPIO    20
+#define KBC_MAX_KPENT   7
+#endif
+
+#define KBC_MAX_ROW     16
+#define KBC_MAX_COL     8
+#define KBC_MAX_KEY     (KBC_MAX_ROW * KBC_MAX_COL)
+
+struct tegra_kbc_pin_cfg {
+        bool is_row;
+        unsigned char num;
+};
+
+struct tegra_kbc_wake_key {
+        u8 row:4;
+        u8 col:4;
+};
+
+struct tegra_kbc_platform_data {
+        unsigned int debounce_cnt;
+        unsigned int repeat_cnt;
+
+        unsigned int wake_cnt; /* 0:wake on any key >1:wake on wake_cfg */
+        const struct tegra_kbc_wake_key *wake_cfg;
+
+        struct tegra_kbc_pin_cfg pin_cfg[KBC_MAX_GPIO];
+        const struct matrix_keymap_data *keymap_data;
+
+        bool wakeup;
+};
+#endif
diff --git a/arch/arm/mach-versatile/Kconfig b/arch/arm/mach-versatile/Kconfig
index 3f7b5e9d83c5..9cdec5aa04a0 100644
--- a/arch/arm/mach-versatile/Kconfig
+++ b/arch/arm/mach-versatile/Kconfig
@@ -2,17 +2,19 @@ menu "Versatile platform type"
         depends on ARCH_VERSATILE
 
 config ARCH_VERSATILE_PB
-        bool "Support Versatile/PB platform"
+        bool "Support Versatile Platform Baseboard for ARM926EJ-S"
         select CPU_ARM926T
         select MIGHT_HAVE_PCI
         default y
         help
-          Include support for the ARM(R) Versatile/PB platform.
+          Include support for the ARM(R) Versatile Platform Baseboard
+          for the ARM926EJ-S.
 
 config MACH_VERSATILE_AB
-        bool "Support Versatile/AB platform"
+        bool "Support Versatile Application Baseboard for ARM926EJ-S"
         select CPU_ARM926T
         help
-          Include support for the ARM(R) Versatile/AP platform.
+          Include support for the ARM(R) Versatile Application Baseboard
+          for the ARM926EJ-S.
 
 endmenu
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
index b1687b6abe63..634bf1d3a311 100644
--- a/arch/arm/mach-vexpress/platsmp.c
+++ b/arch/arm/mach-vexpress/platsmp.c
@@ -39,7 +39,7 @@ volatile int __cpuinitdata pen_release = -1;
  * observers, irrespective of whether they're taking part in coherency
  * or not.  This is necessary for the hotplug code to work reliably.
  */
-static void write_pen_release(int val)
+static void __cpuinit write_pen_release(int val)
 {
         pen_release = val;
         smp_wmb();
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index a9ed3428a2fa..1edae65a0e72 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -19,6 +19,7 @@
 #include <asm/mach/time.h>
 #include <asm/hardware/arm_timer.h>
 #include <asm/hardware/timer-sp.h>
+#include <asm/hardware/sp810.h>
 
 #include <mach/motherboard.h>
 
@@ -50,8 +51,16 @@ void __init v2m_map_io(struct map_desc *tile, size_t num)
 
 static void __init v2m_timer_init(void)
 {
+        u32 scctrl;
+
         versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000);
 
+        /* Select 1MHz TIMCLK as the reference clock for SP804 timers */
+        scctrl = readl(MMIO_P2V(V2M_SYSCTL + SCCTRL));
+        scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
+        scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK;
+        writel(scctrl, MMIO_P2V(V2M_SYSCTL + SCCTRL));
+
         writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL);
         writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL);
 
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 18fe3cb195dc..b6333ae3f92a 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -144,12 +144,9 @@ config OMAP_IOMMU_DEBUG
 config OMAP_IOMMU_IVA2
         bool
 
-choice
-        prompt "System timer"
-        default OMAP_32K_TIMER if !ARCH_OMAP15XX
-
 config OMAP_MPU_TIMER
         bool "Use mpu timer"
+        depends on ARCH_OMAP1
         help
           Select this option if you want to use the OMAP mpu timer. This
           timer provides more intra-tick resolution than the 32KHz timer,
@@ -158,6 +155,7 @@ config OMAP_MPU_TIMER
 config OMAP_32K_TIMER
         bool "Use 32KHz timer"
         depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS
+        default y if (ARCH_OMAP16XX || ARCH_OMAP2PLUS)
         help
           Select this option if you want to enable the OMAP 32KHz timer.
           This timer saves power compared to the OMAP_MPU_TIMER, and has
@@ -165,8 +163,6 @@ config OMAP_32K_TIMER
           intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
           currently only available for OMAP16XX, 24XX, 34XX and OMAP4.
 
-endchoice
-
 config OMAP3_L2_AUX_SECURE_SAVE_RESTORE
         bool "OMAP3 HS/EMU save and restore for L2 AUX control register"
         depends on ARCH_OMAP3 && PM
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index ea4644021fb9..862dda95d61d 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -36,8 +36,6 @@
 
 #define OMAP16XX_TIMER_32K_SYNCHRONIZED         0xfffbc410
 
-#if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))
-
 #include <linux/clocksource.h>
 
 /*
@@ -122,12 +120,24 @@ static DEFINE_CLOCK_DATA(cd);
 #define SC_MULT         4000000000u
 #define SC_SHIFT        17
 
-unsigned long long notrace sched_clock(void)
+static inline unsigned long long notrace _omap_32k_sched_clock(void)
 {
         u32 cyc = clocksource_32k.read(&clocksource_32k);
         return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
 }
 
+#ifndef CONFIG_OMAP_MPU_TIMER
+unsigned long long notrace sched_clock(void)
+{
+        return _omap_32k_sched_clock();
+}
+#else
+unsigned long long notrace omap_32k_sched_clock(void)
+{
+        return _omap_32k_sched_clock();
+}
+#endif
+
 static void notrace omap_update_sched_clock(void)
 {
         u32 cyc = clocksource_32k.read(&clocksource_32k);
@@ -160,7 +170,7 @@ void read_persistent_clock(struct timespec *ts)
         *ts = *tsp;
 }
 
-static int __init omap_init_clocksource_32k(void)
+int __init omap_init_clocksource_32k(void)
 {
         static char err[] __initdata = KERN_ERR
                         "%s: can't register clocksource!\n";
@@ -195,7 +205,3 @@ static int __init omap_init_clocksource_32k(void)
         }
         return 0;
 }
-arch_initcall(omap_init_clocksource_32k);
-
-#endif  /* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
-
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index c4b2b478b1a5..85363084cc1a 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -53,7 +53,7 @@ enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOTSTARTED };
 #endif
 
 #define OMAP_DMA_ACTIVE                 0x01
-#define OMAP2_DMA_CSR_CLEAR_MASK        0xffe
+#define OMAP2_DMA_CSR_CLEAR_MASK        0xffffffff
 
 #define OMAP_FUNC_MUX_ARM_BASE          (0xfffe1000 + 0xec)
 
@@ -1873,7 +1873,7 @@ static int omap2_dma_handle_ch(int ch)
                 printk(KERN_INFO "DMA misaligned error with device %d\n",
                        dma_chan[ch].dev_id);
 
-        p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, ch);
+        p->dma_write(status, CSR, ch);
         p->dma_write(1 << ch, IRQSTATUS_L0, ch);
         /* read back the register to flush the write */
         p->dma_read(IRQSTATUS_L0, ch);
@@ -1893,10 +1893,9 @@ static int omap2_dma_handle_ch(int ch)
                         OMAP_DMA_CHAIN_INCQHEAD(chain_id);
 
                 status = p->dma_read(CSR, ch);
+                p->dma_write(status, CSR, ch);
         }
 
-        p->dma_write(status, CSR, ch);
-
         if (likely(dma_chan[ch].callback != NULL))
                 dma_chan[ch].callback(ch, status, dma_chan[ch].data);
 
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 6b8088ec74af..29b2afb4288f 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -35,6 +35,9 @@ struct sys_timer;
 
 extern void omap_map_common_io(void);
 extern struct sys_timer omap_timer;
+extern bool omap_32k_timer_init(void);
+extern int __init omap_init_clocksource_32k(void);
+extern unsigned long long notrace omap_32k_sched_clock(void);
 
 extern void omap_reserve(void);
 
diff --git a/arch/m68k/amiga/config.c b/arch/m68k/amiga/config.c
index b1577f741fa8..82a4bb51d5d8 100644
--- a/arch/m68k/amiga/config.c
+++ b/arch/m68k/amiga/config.c
@@ -610,17 +610,17 @@ static void amiga_mem_console_write(struct console *co, const char *s,
 
 static int __init amiga_savekmsg_setup(char *arg)
 {
-        static struct resource debug_res = { .name = "Debug" };
-
         if (!MACH_IS_AMIGA || strcmp(arg, "mem"))
-                goto done;
+                return 0;
 
-        if (!AMIGAHW_PRESENT(CHIP_RAM)) {
-                printk("Warning: no chipram present for debugging\n");
-                goto done;
+        if (amiga_chip_size < SAVEKMSG_MAXMEM) {
+                pr_err("Not enough chipram for debugging\n");
+                return -ENOMEM;
         }
 
-        savekmsg = amiga_chip_alloc_res(SAVEKMSG_MAXMEM, &debug_res);
+        /* Just steal the block, the chipram allocator isn't functional yet */
+        amiga_chip_size -= SAVEKMSG_MAXMEM;
+        savekmsg = (void *)ZTWO_VADDR(CHIP_PHYSADDR + amiga_chip_size);
         savekmsg->magic1 = SAVEKMSG_MAGIC1;
         savekmsg->magic2 = SAVEKMSG_MAGIC2;
         savekmsg->magicptr = ZTWO_PADDR(savekmsg);
@@ -628,8 +628,6 @@ static int __init amiga_savekmsg_setup(char *arg)
 
         amiga_console_driver.write = amiga_mem_console_write;
         register_console(&amiga_console_driver);
-
-done:
         return 0;
 }
 
diff --git a/arch/m68k/atari/ataints.c b/arch/m68k/atari/ataints.c
index 39478dd08e67..26a804e67bce 100644
--- a/arch/m68k/atari/ataints.c
+++ b/arch/m68k/atari/ataints.c
@@ -388,9 +388,9 @@ void __init atari_init_IRQ(void)
         }
 
         if (ATARIHW_PRESENT(SCC) && !atari_SCC_reset_done) {
-                scc.cha_a_ctrl = 9;
+                atari_scc.cha_a_ctrl = 9;
                 MFPDELAY();
-                scc.cha_a_ctrl = (char) 0xc0; /* hardware reset */
+                atari_scc.cha_a_ctrl = (char) 0xc0; /* hardware reset */
         }
 
         if (ATARIHW_PRESENT(SCU)) {
diff --git a/arch/m68k/atari/config.c b/arch/m68k/atari/config.c
index ae2d96e5d618..4203d101363c 100644
--- a/arch/m68k/atari/config.c
+++ b/arch/m68k/atari/config.c
@@ -315,7 +315,7 @@ void __init config_atari(void)
                 ATARIHW_SET(SCC_DMA);
                 printk("SCC_DMA ");
         }
-        if (scc_test(&scc.cha_a_ctrl)) {
+        if (scc_test(&atari_scc.cha_a_ctrl)) {
                 ATARIHW_SET(SCC);
                 printk("SCC ");
         }
diff --git a/arch/m68k/atari/debug.c b/arch/m68k/atari/debug.c
index 28efdc33c1ae..5a484247e493 100644
--- a/arch/m68k/atari/debug.c
+++ b/arch/m68k/atari/debug.c
@@ -53,9 +53,9 @@ static inline void ata_scc_out(char c)
 {
         do {
                 MFPDELAY();
-        } while (!(scc.cha_b_ctrl & 0x04)); /* wait for tx buf empty */
+        } while (!(atari_scc.cha_b_ctrl & 0x04)); /* wait for tx buf empty */
         MFPDELAY();
-        scc.cha_b_data = c;
+        atari_scc.cha_b_data = c;
 }
 
 static void atari_scc_console_write(struct console *co, const char *str,
@@ -140,9 +140,9 @@ int atari_scc_console_wait_key(struct console *co)
 {
         do {
                 MFPDELAY();
-        } while (!(scc.cha_b_ctrl & 0x01)); /* wait for rx buf filled */
+        } while (!(atari_scc.cha_b_ctrl & 0x01)); /* wait for rx buf filled */
         MFPDELAY();
-        return scc.cha_b_data;
+        return atari_scc.cha_b_data;
 }
 
 int atari_midi_console_wait_key(struct console *co)
@@ -185,9 +185,9 @@ static void __init atari_init_mfp_port(int cflag)
 
 #define SCC_WRITE(reg, val)                             \
         do {                                            \
-                scc.cha_b_ctrl = (reg);                 \
+                atari_scc.cha_b_ctrl = (reg);           \
                 MFPDELAY();                             \
-                scc.cha_b_ctrl = (val);                 \
+                atari_scc.cha_b_ctrl = (val);           \
                 MFPDELAY();                             \
         } while (0)
 
@@ -240,7 +240,7 @@ static void __init atari_init_scc_port(int cflag)
         reg3 = (cflag & CSIZE) == CS8 ? 0xc0 : 0x40;
         reg5 = (cflag & CSIZE) == CS8 ? 0x60 : 0x20 | 0x82 /* assert DTR/RTS */;
 
-        (void)scc.cha_b_ctrl;           /* reset reg pointer */
+        (void)atari_scc.cha_b_ctrl;     /* reset reg pointer */
         SCC_WRITE(9, 0xc0);             /* reset */
         LONG_DELAY();                   /* extra delay after WR9 access */
         SCC_WRITE(4, (cflag & PARENB) ? ((cflag & PARODD) ? 0x01 : 0x03)
diff --git a/arch/m68k/include/asm/atarihw.h b/arch/m68k/include/asm/atarihw.h
index a714e1aa072a..f51f709bbf30 100644
--- a/arch/m68k/include/asm/atarihw.h
+++ b/arch/m68k/include/asm/atarihw.h
@@ -449,7 +449,7 @@ struct SCC
   u_char char_dummy3;
   u_char cha_b_data;
  };
-# define scc ((*(volatile struct SCC*)SCC_BAS))
+# define atari_scc ((*(volatile struct SCC*)SCC_BAS))
 
 /* The ESCC (Z85230) in an Atari ST. The channels are reversed! */
 # define st_escc ((*(volatile struct SCC*)0xfffffa31))
diff --git a/arch/m68k/include/asm/string.h b/arch/m68k/include/asm/string.h
index 2936dda938d7..65b131282837 100644
--- a/arch/m68k/include/asm/string.h
+++ b/arch/m68k/include/asm/string.h
@@ -81,18 +81,6 @@ static inline char *strncpy(char *dest, const char *src, size_t n)
         strcpy(__d + strlen(__d), (s));         \
 })
 
-#define __HAVE_ARCH_STRCHR
-static inline char *strchr(const char *s, int c)
-{
-        char sc, ch = c;
-
-        for (; (sc = *s++) != ch; ) {
-                if (!sc)
-                        return NULL;
-        }
-        return (char *)s - 1;
-}
-
 #ifndef CONFIG_COLDFIRE
 #define __HAVE_ARCH_STRCMP
 static inline int strcmp(const char *cs, const char *ct)
diff --git a/arch/parisc/kernel/pdc_cons.c b/arch/parisc/kernel/pdc_cons.c
index 11bdd68e5762..fc770be465ff 100644
--- a/arch/parisc/kernel/pdc_cons.c
+++ b/arch/parisc/kernel/pdc_cons.c
@@ -169,11 +169,11 @@ static int __init pdc_console_tty_driver_init(void)
 
         struct console *tmp;
 
-        acquire_console_sem();
+        console_lock();
         for_each_console(tmp)
                 if (tmp == &pdc_cons)
                         break;
-        release_console_sem();
+        console_unlock();
 
         if (!tmp) {
                 printk(KERN_INFO "PDC console driver not registered anymore, not creating %s\n", pdc_cons.name);
diff --git a/arch/powerpc/kernel/perf_event_fsl_emb.c b/arch/powerpc/kernel/perf_event_fsl_emb.c
index 4dcf5f831e9d..b0dc8f7069cd 100644
--- a/arch/powerpc/kernel/perf_event_fsl_emb.c
+++ b/arch/powerpc/kernel/perf_event_fsl_emb.c
@@ -596,6 +596,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
                         if (left <= 0)
                                 left = period;
                         record = 1;
+                        event->hw.last_period = event->hw.sample_period;
                 }
                 if (left < 0x80000000LL)
                         val = 0x80000000LL - left;
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index ae555569823b..8a9011dced14 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -15,6 +15,7 @@ config SUPERH
         select HAVE_KERNEL_GZIP
         select HAVE_KERNEL_BZIP2
         select HAVE_KERNEL_LZMA
+        select HAVE_KERNEL_XZ
         select HAVE_KERNEL_LZO
         select HAVE_SYSCALL_TRACEPOINTS
         select HAVE_REGS_AND_STACK_ACCESS_API
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 9c8c6e1a2a15..e3d8170ad00b 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -200,7 +200,7 @@ endif
 libs-$(CONFIG_SUPERH32)         := arch/sh/lib/ $(libs-y)
 libs-$(CONFIG_SUPERH64)         := arch/sh/lib64/ $(libs-y)
 
-BOOT_TARGETS = uImage uImage.bz2 uImage.gz uImage.lzma uImage.lzo \
+BOOT_TARGETS = uImage uImage.bz2 uImage.gz uImage.lzma uImage.xz uImage.lzo \
                uImage.srec uImage.bin zImage vmlinux.bin vmlinux.srec \
                romImage
 PHONY += $(BOOT_TARGETS)
@@ -230,5 +230,6 @@ define archhelp
         @echo '* uImage.gz                 - Kernel-only image for U-Boot (gzip)'
         @echo '  uImage.bz2                - Kernel-only image for U-Boot (bzip2)'
         @echo '  uImage.lzma               - Kernel-only image for U-Boot (lzma)'
+        @echo '  uImage.xz                 - Kernel-only image for U-Boot (xz)'
         @echo '  uImage.lzo                - Kernel-only image for U-Boot (lzo)'
 endef
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 33b662999fc6..701667acfd89 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -1294,6 +1294,7 @@ static int __init arch_setup(void)
         i2c_register_board_info(1, i2c1_devices,
                                 ARRAY_SIZE(i2c1_devices));
 
+#if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE)
         /* VOU */
         gpio_request(GPIO_FN_DV_D15, NULL);
         gpio_request(GPIO_FN_DV_D14, NULL);
@@ -1325,6 +1326,7 @@ static int __init arch_setup(void)
 
         /* Remove reset */
         gpio_set_value(GPIO_PTG4, 1);
+#endif
 
         return platform_add_devices(ecovec_devices,
                                     ARRAY_SIZE(ecovec_devices));
diff --git a/arch/sh/boot/Makefile b/arch/sh/boot/Makefile
index 1ce63624c9b9..ba515d800245 100644
--- a/arch/sh/boot/Makefile
+++ b/arch/sh/boot/Makefile
@@ -24,12 +24,13 @@ suffix-y := bin
 suffix-$(CONFIG_KERNEL_GZIP)    := gz
 suffix-$(CONFIG_KERNEL_BZIP2)   := bz2
 suffix-$(CONFIG_KERNEL_LZMA)    := lzma
+suffix-$(CONFIG_KERNEL_XZ)      := xz
 suffix-$(CONFIG_KERNEL_LZO)     := lzo
 
 targets := zImage vmlinux.srec romImage uImage uImage.srec uImage.gz \
-           uImage.bz2 uImage.lzma uImage.lzo uImage.bin
+           uImage.bz2 uImage.lzma uImage.xz uImage.lzo uImage.bin
 extra-y += vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma \
-           vmlinux.bin.lzo
+           vmlinux.bin.xz vmlinux.bin.lzo
 subdir- := compressed romimage
 
 $(obj)/zImage: $(obj)/compressed/vmlinux FORCE
@@ -76,6 +77,9 @@ $(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
 $(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
         $(call if_changed,lzma)
 
+$(obj)/vmlinux.bin.xz: $(obj)/vmlinux.bin FORCE
+        $(call if_changed,xzkern)
+
 $(obj)/vmlinux.bin.lzo: $(obj)/vmlinux.bin FORCE
         $(call if_changed,lzo)
 
@@ -88,6 +92,9 @@ $(obj)/uImage.gz: $(obj)/vmlinux.bin.gz
 $(obj)/uImage.lzma: $(obj)/vmlinux.bin.lzma
         $(call if_changed,uimage,lzma)
 
+$(obj)/uImage.xz: $(obj)/vmlinux.bin.xz
+        $(call if_changed,uimage,xz)
+
 $(obj)/uImage.lzo: $(obj)/vmlinux.bin.lzo
         $(call if_changed,uimage,lzo)
 
diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile
index cfa5a087a886..e0b0293bae63 100644
--- a/arch/sh/boot/compressed/Makefile
+++ b/arch/sh/boot/compressed/Makefile
@@ -6,7 +6,7 @@
 
 targets         := vmlinux vmlinux.bin vmlinux.bin.gz \
                    vmlinux.bin.bz2 vmlinux.bin.lzma \
-                   vmlinux.bin.lzo \
+                   vmlinux.bin.xz vmlinux.bin.lzo \
                    head_$(BITS).o misc.o piggy.o
 
 OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc.o $(obj)/cache.o
@@ -50,6 +50,8 @@ $(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y) FORCE
         $(call if_changed,bzip2)
 $(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE
         $(call if_changed,lzma)
+$(obj)/vmlinux.bin.xz: $(vmlinux.bin.all-y) FORCE
+        $(call if_changed,xzkern)
 $(obj)/vmlinux.bin.lzo: $(vmlinux.bin.all-y) FORCE
         $(call if_changed,lzo)
 
diff --git a/arch/sh/boot/compressed/misc.c b/arch/sh/boot/compressed/misc.c
index 27140a6b365d..95470a472d2c 100644
--- a/arch/sh/boot/compressed/misc.c
+++ b/arch/sh/boot/compressed/misc.c
@@ -61,6 +61,10 @@ static unsigned long free_mem_end_ptr;
 #include "../../../../lib/decompress_unlzma.c"
 #endif
 
+#ifdef CONFIG_KERNEL_XZ
+#include "../../../../lib/decompress_unxz.c"
+#endif
+
 #ifdef CONFIG_KERNEL_LZO
 #include "../../../../lib/decompress_unlzo.c"
 #endif
diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h
index 083ea068e819..db85916b9e95 100644
--- a/arch/sh/include/asm/pgtable.h
+++ b/arch/sh/include/asm/pgtable.h
@@ -134,6 +134,7 @@ typedef pte_t *pte_addr_t;
 extern void pgtable_cache_init(void);
 
 struct vm_area_struct;
+struct mm_struct;
 
 extern void __update_cache(struct vm_area_struct *vma,
                            unsigned long address, pte_t pte);
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index c2b0aaaedcae..672944f5b19c 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -230,10 +230,10 @@ static struct platform_device *sh7750_devices[] __initdata = {
 static int __init sh7750_devices_setup(void)
 {
         if (mach_is_rts7751r2d()) {
-                platform_register_device(&scif_device);
+                platform_device_register(&scif_device);
         } else {
-                platform_register_device(&sci_device);
-                platform_register_device(&scif_device);
+                platform_device_register(&sci_device);
+                platform_device_register(&scif_device);
         }
 
         return platform_add_devices(sh7750_devices,
diff --git a/arch/sh/kernel/topology.c b/arch/sh/kernel/topology.c
index 948fdb656933..38e862852dd0 100644
--- a/arch/sh/kernel/topology.c
+++ b/arch/sh/kernel/topology.c
@@ -17,6 +17,7 @@
 static DEFINE_PER_CPU(struct cpu, cpu_devices);
 
 cpumask_t cpu_core_map[NR_CPUS];
+EXPORT_SYMBOL(cpu_core_map);
 
 static cpumask_t cpu_coregroup_map(unsigned int cpu)
 {
diff --git a/arch/x86/include/asm/cacheflush.h b/arch/x86/include/asm/cacheflush.h
index 63e35ec9075c..62f084478f7e 100644
--- a/arch/x86/include/asm/cacheflush.h
+++ b/arch/x86/include/asm/cacheflush.h
@@ -1,48 +1,8 @@
 #ifndef _ASM_X86_CACHEFLUSH_H
 #define _ASM_X86_CACHEFLUSH_H
 
-/* Keep includes the same across arches.  */
-#include <linux/mm.h>
-
 /* Caches aren't brain-dead on the intel. */
-static inline void flush_cache_all(void) { }
-static inline void flush_cache_mm(struct mm_struct *mm) { }
-static inline void flush_cache_dup_mm(struct mm_struct *mm) { }
-static inline void flush_cache_range(struct vm_area_struct *vma,
-                                     unsigned long start, unsigned long end) { }
-static inline void flush_cache_page(struct vm_area_struct *vma,
-                                    unsigned long vmaddr, unsigned long pfn) { }
-#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
-static inline void flush_dcache_page(struct page *page) { }
-static inline void flush_dcache_mmap_lock(struct address_space *mapping) { }
-static inline void flush_dcache_mmap_unlock(struct address_space *mapping) { }
-static inline void flush_icache_range(unsigned long start,
-                                      unsigned long end) { }
-static inline void flush_icache_page(struct vm_area_struct *vma,
-                                     struct page *page) { }
-static inline void flush_icache_user_range(struct vm_area_struct *vma,
-                                           struct page *page,
-                                           unsigned long addr,
-                                           unsigned long len) { }
-static inline void flush_cache_vmap(unsigned long start, unsigned long end) { }
-static inline void flush_cache_vunmap(unsigned long start,
-                                      unsigned long end) { }
-
-static inline void copy_to_user_page(struct vm_area_struct *vma,
-                                     struct page *page, unsigned long vaddr,
-                                     void *dst, const void *src,
-                                     unsigned long len)
-{
-        memcpy(dst, src, len);
-}
-
-static inline void copy_from_user_page(struct vm_area_struct *vma,
-                                       struct page *page, unsigned long vaddr,
-                                       void *dst, const void *src,
-                                       unsigned long len)
-{
-        memcpy(dst, src, len);
-}
+#include <asm-generic/cacheflush.h>
 
 #ifdef CONFIG_X86_PAT
 /*
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index 4fab24de26b1..6e6e7558e702 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -32,5 +32,6 @@ extern void arch_unregister_cpu(int);
 
 DECLARE_PER_CPU(int, cpu_state);
 
+int __cpuinit mwait_usable(const struct cpuinfo_x86 *);
 
 #endif /* _ASM_X86_CPU_H */
diff --git a/arch/x86/include/asm/jump_label.h b/arch/x86/include/asm/jump_label.h
index f52d42e80585..574dbc22893a 100644
--- a/arch/x86/include/asm/jump_label.h
+++ b/arch/x86/include/asm/jump_label.h
@@ -14,7 +14,7 @@
         do {                                                    \
                 asm goto("1:"                                   \
                         JUMP_LABEL_INITIAL_NOP                  \
-                        ".pushsection __jump_table,  \"a\" \n\t"\
+                        ".pushsection __jump_table,  \"aw\" \n\t"\
                         _ASM_PTR "1b, %l[" #label "], %c0 \n\t" \
                         ".popsection \n\t"                      \
                         : :  "i" (key) :  : label);             \
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 2071a8b2b32f..ebbc4d8ab170 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -558,13 +558,12 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
                               pmd_t *pmdp, pmd_t pmd)
 {
-#if PAGETABLE_LEVELS >= 3
         if (sizeof(pmdval_t) > sizeof(long))
                 /* 5 arg words */
                 pv_mmu_ops.set_pmd_at(mm, addr, pmdp, pmd);
         else
-                PVOP_VCALL4(pv_mmu_ops.set_pmd_at, mm, addr, pmdp, pmd.pmd);
-#endif
+                PVOP_VCALL4(pv_mmu_ops.set_pmd_at, mm, addr, pmdp,
+                            native_pmd_val(pmd));
 }
 #endif
 
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 7283e98deaae..ec2c19a7b8ef 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -45,6 +45,7 @@ static const struct _cache_table __cpuinitconst cache_table[] =
         { 0x0a, LVL_1_DATA, 8 },        /* 2 way set assoc, 32 byte line size */
         { 0x0c, LVL_1_DATA, 16 },       /* 4-way set assoc, 32 byte line size */
         { 0x0d, LVL_1_DATA, 16 },       /* 4-way set assoc, 64 byte line size */
+        { 0x0e, LVL_1_DATA, 24 },       /* 6-way set assoc, 64 byte line size */
         { 0x21, LVL_2,      256 },      /* 8-way set assoc, 64 byte line size */
         { 0x22, LVL_3,      512 },      /* 4-way set assoc, sectored cache, 64 byte line size */
         { 0x23, LVL_3,      MB(1) },    /* 8-way set assoc, sectored cache, 64 byte line size */
@@ -66,6 +67,7 @@ static const struct _cache_table __cpuinitconst cache_table[] =
         { 0x45, LVL_2,      MB(2) },    /* 4-way set assoc, 32 byte line size */
         { 0x46, LVL_3,      MB(4) },    /* 4-way set assoc, 64 byte line size */
         { 0x47, LVL_3,      MB(8) },    /* 8-way set assoc, 64 byte line size */
+        { 0x48, LVL_2,      MB(3) },    /* 12-way set assoc, 64 byte line size */
         { 0x49, LVL_3,      MB(4) },    /* 16-way set assoc, 64 byte line size */
         { 0x4a, LVL_3,      MB(6) },    /* 12-way set assoc, 64 byte line size */
         { 0x4b, LVL_3,      MB(8) },    /* 16-way set assoc, 64 byte line size */
@@ -87,6 +89,7 @@ static const struct _cache_table __cpuinitconst cache_table[] =
         { 0x7c, LVL_2,      MB(1) },    /* 8-way set assoc, sectored cache, 64 byte line size */
         { 0x7d, LVL_2,      MB(2) },    /* 8-way set assoc, 64 byte line size */
         { 0x7f, LVL_2,      512 },      /* 2-way set assoc, 64 byte line size */
+        { 0x80, LVL_2,      512 },      /* 8-way set assoc, 64 byte line size */
         { 0x82, LVL_2,      256 },      /* 8-way set assoc, 32 byte line size */
         { 0x83, LVL_2,      512 },      /* 8-way set assoc, 32 byte line size */
         { 0x84, LVL_2,      MB(1) },    /* 8-way set assoc, 32 byte line size */
diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c
index e12246ff5aa6..6f8c5e9da97f 100644
--- a/arch/x86/kernel/cpu/mcheck/therm_throt.c
+++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c
@@ -59,6 +59,7 @@ struct thermal_state {
 
 /* Callback to handle core threshold interrupts */
 int (*platform_thermal_notify)(__u64 msr_val);
+EXPORT_SYMBOL(platform_thermal_notify);
 
 static DEFINE_PER_CPU(struct thermal_state, thermal_state);
 
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index d8286ed54ffa..e764fc05d700 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -14,6 +14,7 @@
 #include <linux/utsname.h>
 #include <trace/events/power.h>
 #include <linux/hw_breakpoint.h>
+#include <asm/cpu.h>
 #include <asm/system.h>
 #include <asm/apic.h>
 #include <asm/syscalls.h>
@@ -505,7 +506,7 @@ static void poll_idle(void)
 #define MWAIT_ECX_EXTENDED_INFO         0x01
 #define MWAIT_EDX_C1                    0xf0
 
-static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c)
+int __cpuinit mwait_usable(const struct cpuinfo_x86 *c)
 {
         u32 eax, ebx, ecx, edx;
 
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 763df77343dd..0cbe8c0b35ed 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -1402,8 +1402,9 @@ static inline void mwait_play_dead(void)
         unsigned int highest_subcstate = 0;
         int i;
         void *mwait_ptr;
+        struct cpuinfo_x86 *c = __this_cpu_ptr(&cpu_info);
 
-        if (!cpu_has(__this_cpu_ptr(&cpu_info), X86_FEATURE_MWAIT))
+        if (!(cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)))
                 return;
         if (!cpu_has(__this_cpu_ptr(&cpu_info), X86_FEATURE_CLFLSH))
                 return;